QUANTA ZRT, ZRTA Schematics

5

ZRT/ZRTA_GDDR3 BWD ULT SYSTEM BLOCK DIAGRAM

DDR3

L-SODIMM CHA

D D

DDR3L-SODIMM CHB

SATA - HDD

SATA ODD

Cardreader
CONN. 2in 1

RTS5170
(cardreader)

P27

CCD(Camera)

C C

Touch Screen

Blue Too th

I/O board

I/O Board Conn.USB2 IO*1

4

P1

P27

P27

7

P2

P22

P22

P2

4

P27

4

Dual Channel DDR III
1066/1333/1600 MHZ

SATA0

SATA1

USB2-7

USB2-6

B2-5

US

USB2-4

US

B2-2

P8 RT

BATTERY

Azalia

DWELL ULT 15W

BRO

MC

P 11 68pins

IMC

D

40 mm X 24 mm

SATA

In

tegrate d PCH

USB2.0

C

IHDA

C+GT3

3

2

1

BOM

: For 15W CPU

15@
28@ : For 28W CPU
6515@ : For 6515 stuff
AC@ : For IOAC
DM@ : Dual MIC
DR@ : For Dual Ran k
EV@ : Optimus
GM@ :N16V-GM /WO GC6
GS@ : G sensor
GT@ :N16S-GT /GC6
IV@ : iG PU
KBL@ : Keyboard backlight
NAC@ : Non IOAC
NGS@ : Non G se nsor
NTPM@ : Non TPM
S28@ : 28W Change BOM
SM@ : Single MIC
SP@ : Special
SR@ : Single Rank
TPM@ : TPM
TPN_N@ : For TPM 2.0
TPN_S@ : For TPM 1.2

RJ45

P25

TAL 27MHz

X'

PCIE-4

PCIE-3

VRAM

DDR3

eDP Conn.

VG

A Conn.

HDMI Conn.

P2

P2

P2

P24

USB3 Port*2
MB side

NGFF CARD
WLAN+BT

RTL8111H

10/100/1G

0,P21

3

3

P3

0

P28

P2

5

X'

TAL 25MHz

U

GP

N1

IE-5

PC

PCI-E x4
TX/RX

CLKP15

EDP

eDP

DDI2

DP

DDI1

USB3-1,-2

USB3.0/2.0

~P13

P2

LPC

CL

PCI-E x1

CLK

SPI

B2-0,-1

US

K

TAL

X'

32.768KHz

X'TAL 24MHz

SPI ROM
8M

6S-GT

N16V-GM

P8

P1

6~P19

ITE6515

P22

B B

D-MIC

D-MIC

A A

Int. D- MIC

P2

8

8

P2

5

ALC2 55
AUDIO COD EC

Universal HP

P28 P28

Speaker*2

P2

8

BACKLIGHT
(OPTION)

4

K/B Con.

P29

9

P2

EC

IT8987

Touch PAD

TP

M(option)

7

P3

1

Fan Driver

an signal)

(F

P29

3

P29

P2

BQ24737R GRR

tery Charger

Ba

TPS51225RUKR

+

3V/+5V

TPS51624RSM

VCCIN

+

TPS51211DSCR

1.05V_S5/+1.05V

+

2

TPS51216RUKR

1.35V_SUS

+

P31

TPS54318RTER

+1

.5V

2

P3

UP1658RQKF

VGPU_CORE

+

3

P3

PS51211DSCR

1.5V_GFX/1.05V_GFX/3V_GFX

+

P34

ze Document Number Rev

ze Document Number Rev

ze Document Number Rev

Si

Si

Si

Date: Sheet of

Date: Sheet of

Date: Sheet of

Thermal Protection

5

P3

Discharger

P36

7

P3

P38

Qu

Qu

Qu

anta Computer Inc.

anta Computer Inc.

anta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

ock Diagram

ock Diagram

ock Diagram

Bl

Bl

Bl

1

6

P3

T/ZRTA

T/ZRTA

T/ZRTA

ZR

ZR

ZR

14

14

14

4Wednesday, February 11, 2015

4Wednesday, February 11, 2015

4Wednesday, February 11, 2015

3A

3A

3A

5

4

3

2

1

Haswell ULT (DISPLAY,eDP)

U37A

HSW_ULT_DDR3L

D D

HDMI

CRT

ITE FAE suggest CAP
should be at PCH side.

C C

B B

INT_HDMITX0N[24]
INT_HDMITX0P[24]
INT_HDMITX1N[24]
INT_HDMITX1P[24]
INT_HDMITX2N[24]
INT_HDMITX2P[24]

INT_HDMICLK -[24]
INT_HDMICLK +[24]

CRT_TXN0[22]
CRT_TXP0[22]
CRT_TXN1[22]
CRT_TXP1[22]

PCH_BRIGHT[23]

PCH_BLON[23]

EDP_VDD_EN[23]

TP87

BOARD_ID4[10]
BOARD_ID1[10]
BOARD_ID2[10]

PCH_BRIGHT
PCH_BLON

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PME#

TPD_INT#_ D
DGPU_SELECT#
BOARD_ID4
BOARD_ID1
BOARD_ID2

C54
C55
B58
C58
B55
A55
A57
B57

C51
C50
C53
B54
C49
B50
A53
B53

AD4

B8
A9
C6

U6
P4
N4
N2

U7

L1
L3

R5

L4

DDI1_TXN0
DDI1_TXP0
DDI1_TXN1
DDI1_TXP1
DDI1_TXN2
DDI1_TXP2
DDI1_TXN3
DDI1_TXP3

DDI2_TXN0
DDI2_TXP0
DDI2_TXN1
DDI2_TXP1
DDI2_TXN2
DDI2_TXP2
DDI2_TXN3
DDI2_TXP3

U37I

EDP_BKLCTL
EDP_BKLEN
EDP_VDDEN

PIRQA/GPIO77
PIRQB/GPIO78
PIRQC/GPIO79
PIRQD/GPIO80
PME

+3V

GPIO55

+3V

GPIO52

+3V

GPIO54

+3V

GPIO51

+3V

GPIO53

eDP SIDEBAND

+3V
+3V
+3V
+3V
+3V_S5

PCIE

HSW_ULT_DDR3L

1 OF 19

9 OF 19

EDPDDI

DISPLAY

EDP_RCOMP

EDP_DISP_UTIL

DDPB_CTRLCLK

DDPB_CTRLDATA

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPB_AUXN
DDPC_AUXN
DDPB_AUXP
DDPC_AUXP

DDPC_HPD

EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1

EDP_TXN2
EDP_TXP2
EDP_TXN3
EDP_TXP3

EDP_AUXN
EDP_AUXP

DDPB_HPD

EDP_HPD

C45
B46
A47
B47

C47
C46
A49
B49

A45
B45

D20
A43

B9
C9
D9
D11

C5
B6
B5
A6

C8
A8
D6

EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1

EDP_TXN2
EDP_TXP2
EDP_TXN3
EDP_TXP3

EDP_AUXN
EDP_AUXP

EDP_RCOMP

CRT_CLK
CRT_DATA

CRT_AUXN

CRT_AUXP

R360

100K_4

EDP_TXN0 [23]
EDP_TXP0 [23]
EDP_TXN1 [23]
EDP_TXP1 [23]

EDP_TXN2 [23]
EDP_TXP2 [23]
EDP_TXN3 [23]
EDP_TXP3 [23]

EDP_AUXN [23]
EDP_AUXP [23]

R353 24.9/F_4

R705 *0_4

R706 *0_4

HDMI_DDCCLK_SW [24]
HDMI_DDCDATA_SW [24]

CRT_AUXN [22]

CRT_AUXP [22]

INT_HDMI_HP D [24]
CRT_HPD [22]
EDP_HPD [23]

R686

4.7K_4

PCH_BRIGHTDP_UTIL

eDP Panel

+VCCIOA_OUT

eDP_RCOMP
Trace length < 100 mils
Trace width = 20 mils
Trace spacing = 25 mils

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
DGPU_SELECT#
CRT_CLK
CRT_DATA
TPD_INT#_ D

CRT_AUXN

CRT_AUXP

R316 10K_4
R635 10K_4
R328 10K_4
R640 10K_4
R653 10K_4
R365 2.2K_4
R363 2.2K_4
R327 100K_4

+3V

+3V

R691 *100K_4

R692 *100K_4

+3V

2

TPD_INT#[29,31]

A A

5

3

Q23

2N7002K

1

4

TPD_INT#_ D

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Wednesday, February 11, 2015

Wednesday, February 11, 2015

Wednesday, February 11, 2015

3

Date: Sheet

2

PROJECT :

Haswell 3/5 (DDI/eDP)

Haswell 3/5 (DDI/eDP)

Haswell 3/5 (DDI/eDP)

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

of

244

244

244

1

3A

3A

3A

5

4

3

2

1

Change Data and DQS to interleave.

Haswell ULT (DDR3L) Haswell Processor (DDR3)

U37C

AH63

M_A_DQ0[14]
M_A_DQ1[14]
M_A_DQ2[14]
M_A_DQ3[14]
M_A_DQ4[14]

D D

C C

B B

M_A_DQ5[14]
M_A_DQ6[14]
M_A_DQ7[14]
M_A_DQ8[14]
M_A_DQ9[14]
M_A_DQ10[14]
M_A_DQ11[14]
M_A_DQ12[14]
M_A_DQ13[14]
M_A_DQ14[14]
M_A_DQ15[14]
M_B_DQ0[15]
M_B_DQ1[15]
M_B_DQ2[15]
M_B_DQ3[15]
M_B_DQ4[15]
M_B_DQ5[15]
M_B_DQ6[15]
M_B_DQ7[15]
M_B_DQ8[15]
M_B_DQ9[15]
M_B_DQ10[15]
M_B_DQ11[15]
M_B_DQ12[15]
M_B_DQ13[15]
M_B_DQ14[15]
M_B_DQ15[15]
M_A_DQ16[14]
M_A_DQ17[14]
M_A_DQ18[14]
M_A_DQ19[14]
M_A_DQ20[14]
M_A_DQ21[14]
M_A_DQ22[14]
M_A_DQ23[14]
M_A_DQ24[14]
M_A_DQ25[14]
M_A_DQ26[14]
M_A_DQ27[14]
M_A_DQ28[14]
M_A_DQ29[14]
M_A_DQ30[14]
M_A_DQ31[14]
M_B_DQ16[15]
M_B_DQ17[15]
M_B_DQ18[15]
M_B_DQ19[15]
M_B_DQ20[15]
M_B_DQ21[15]
M_B_DQ22[15]
M_B_DQ23[15]
M_B_DQ24[15]
M_B_DQ25[15]
M_B_DQ26[15]
M_B_DQ27[15]
M_B_DQ28[15]
M_B_DQ29[15]
M_B_DQ30[15]
M_B_DQ31[15]

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8

M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15

M_B_DQ0

M_B_DQ1

M_B_DQ2

M_B_DQ3

M_B_DQ4

M_B_DQ5

M_B_DQ6

M_B_DQ7

M_B_DQ8

M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31

SA_DQ0

AH62

SA_DQ1

AK63

SA_DQ2

AK62

SA_DQ3

AH61

SA_DQ4

AH60

SA_DQ5

AK61

SA_DQ6

AK60

SA_DQ7

AM63

SA_DQ8

AM62

SA_DQ9

AP63

SA_DQ10

AP62

SA_DQ11

AM61

SA_DQ12

AM60

SA_DQ13

AP61

SA_DQ14

AP60

SA_DQ15

AP58

SA_DQ16

AR58

SA_DQ17

AM57

SA_DQ18

AK57

SA_DQ19

AL58

SA_DQ20

AK58

SA_DQ21

AR57

SA_DQ22

AN57

SA_DQ23

AP55

SA_DQ24

AR55

SA_DQ25

AM54

SA_DQ26

AK54

SA_DQ27

AL55

SA_DQ28

AK55

SA_DQ29

AR54

SA_DQ30

AN54

SA_DQ31

AY58

SA_DQ32

AW58

SA_DQ33

AY56

SA_DQ34

AW56

SA_DQ35

AV58

SA_DQ36

AU58

SA_DQ37

AV56

SA_DQ38

AU56

SA_DQ39

AY54

SA_DQ40

AW54

SA_DQ41

AY52

SA_DQ42

AW52

SA_DQ43

AV54

SA_DQ44

AU54

SA_DQ45

AV52

SA_DQ46

AU52

SA_DQ47

AK40

SA_DQ48

AK42

SA_DQ49

AM43

SA_DQ50

AM45

SA_DQ51

AK45

SA_DQ52

AK43

SA_DQ53

AM40

SA_DQ54

AM42

SA_DQ55

AM46

SA_DQ56

AK46

SA_DQ57

AM49

SA_DQ58

AK49

SA_DQ59

AM48

SA_DQ60

AK48

SA_DQ61

AM51

SA_DQ62

AK51

SA_DQ63

HSW_ULT_ DDR3 L

DDR CHANNEL A

3 OF 19

SA_CLK#0

SA_CLK0

SA_CLK#1

SA_CLK1

SA_CKE0
SA_CKE1
SA_CKE2
SA_CKE3

SA_CS#0
SA_CS#1

SA_ODT0

SA_RAS

SA_WE

SA_CAS

SA_BA0
SA_BA1
SA_BA2

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8

SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15

SA_DQSN0
SA_DQSN1
SA_DQSN2
SA_DQSN3
SA_DQSN4
SA_DQSN5
SA_DQSN6
SA_DQSN7

SA_DQSP0
SA_DQSP1
SA_DQSP2
SA_DQSP3
SA_DQSP4
SA_DQSP5
SA_DQSP6
SA_DQSP7

SM_VREF_CA
SM_VREF_DQ0
SM_VREF_DQ1

AU37
AV37
AW36
AY36

AU43
AW43
AY42
AY43

AP33
AR32

AP32

AY34
AW34
AU34

AU35
AV35
AY41

AU36
AY37
AR38
AP36
AU39
AR36
AV40
AW39
AY39
AU40
AP35
AW41
AU41
AR35
AV42
AU42

AJ61
AN62
AM58
AM55
AV57
AV53
AL43
AL48

AJ62
AN61
AN58
AN55
AW57
AW53
AL42
AL49

AP49
AR51
AP51

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_DQS#0
M_A_DQS#1
M_B_DQS#0
M_B_DQS#1
M_A_DQS#2
M_A_DQS#3
M_B_DQS#2
M_B_DQS#3

M_A_DQS0
M_A_DQS1
M_B_DQS0
M_B_DQS1
M_A_DQS2
M_A_DQS3
M_B_DQS2
M_B_DQS3

+VREF_CA_CPU
+VREFDQ_SA_M3
+VREFDQ_SB_M3

M_A_CLK0# [14]

M_A_CLK0 [14]

M_A_CLK1# [14]

M_A_CLK1 [14]

M_A_CKE0 [14]
M_A_CKE1 [14]

M_A_CS#0 [14]
M_A_CS#1 [14]

TP26

M_A_RAS# [14]
M_A_WE# [14]
M_A_CAS# [14]

M_A_BS#0 [14]
M_A_BS#1 [14]
M_A_BS#2 [14]
M_A_A[15:0] [14]

M_A_DQS#0 [14]
M_A_DQS#1 [14]
M_B_DQS#0 [15]
M_B_DQS#1 [15]
M_A_DQS#2 [14]
M_A_DQS#3 [14]
M_B_DQS#2 [15]
M_B_DQS#3 [15]

M_A_DQS0 [14]
M_A_DQS1 [14]
M_B_DQS0 [15]
M_B_DQS1 [15]
M_A_DQS2 [14]
M_A_DQS3 [14]
M_B_DQS2 [15]
M_B_DQS3 [15]

U37D

AY31

M_A_DQ32[14]
M_A_DQ33[14]
M_A_DQ34[14]
M_A_DQ35[14]
M_A_DQ36[14]
M_A_DQ37[14]
M_A_DQ38[14]
M_A_DQ39[14]
M_A_DQ40[14]
M_A_DQ41[14]
M_A_DQ42[14]
M_A_DQ43[14]
M_A_DQ44[14]
M_A_DQ45[14]
M_A_DQ46[14]
M_A_DQ47[14]
M_B_DQ32[15]
M_B_DQ33[15]
M_B_DQ34[15]
M_B_DQ35[15]
M_B_DQ36[15]
M_B_DQ37[15]
M_B_DQ38[15]
M_B_DQ39[15]
M_B_DQ40[15]
M_B_DQ41[15]
M_B_DQ42[15]
M_B_DQ43[15]
M_B_DQ44[15]
M_B_DQ45[15]
M_B_DQ46[15]
M_B_DQ47[15]
M_A_DQ48[14]
M_A_DQ49[14]
M_A_DQ50[14]
M_A_DQ51[14]
M_A_DQ52[14]
M_A_DQ53[14]
M_A_DQ54[14]
M_A_DQ55[14]
M_A_DQ56[14]
M_A_DQ57[14]
M_A_DQ58[14]
M_A_DQ59[14]
M_A_DQ60[14]
M_A_DQ61[14]
M_A_DQ62[14]
M_A_DQ63[14]
M_B_DQ48[15]
M_B_DQ49[15]
M_B_DQ50[15]
M_B_DQ51[15]
M_B_DQ52[15]
M_B_DQ53[15]
M_B_DQ54[15]
M_B_DQ55[15]
M_B_DQ56[15]
M_B_DQ57[15]
M_B_DQ58[15]
M_B_DQ59[15]
M_B_DQ60[15]
M_B_DQ61[15]
M_B_DQ62[15]
M_B_DQ63[15]

M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

SB_DQ0

AW31

SB_DQ1

AY29

SB_DQ2

AW29

SB_DQ3

AV31

SB_DQ4

AU31

SB_DQ5

AV29

SB_DQ6

AU29

SB_DQ7

AY27

SB_DQ8

AW27

SB_DQ9

AY25

SB_DQ10

AW25

SB_DQ11

AV27

SB_DQ12

AU27

SB_DQ13

AV25

SB_DQ14

AU25

SB_DQ15

AM29

SB_DQ16

AK29

SB_DQ17

AL28

SB_DQ18

AK28

SB_DQ19

AR29

SB_DQ20

AN29

SB_DQ21

AR28

SB_DQ22

AP28

SB_DQ23

AN26

SB_DQ24

AR26

SB_DQ25

AR25

SB_DQ26

AP25

SB_DQ27

AK26

SB_DQ28

AM26

SB_DQ29

AK25

SB_DQ30

AL25

SB_DQ31

AY23

SB_DQ32

AW23

SB_DQ33

AY21

SB_DQ34

AW21

SB_DQ35

AV23

SB_DQ36

AU23

SB_DQ37

AV21

SB_DQ38

AU21

SB_DQ39

AY19

SB_DQ40

AW19

SB_DQ41

AY17

SB_DQ42

AW17

SB_DQ43

AV19

SB_DQ44

AU19

SB_DQ45

AV17

SB_DQ46

AU17

SB_DQ47

AR21

SB_DQ48

AR22

SB_DQ49

AL21

SB_DQ50

AM22

SB_DQ51

AN22

SB_DQ52

AP21

SB_DQ53

AK21

SB_DQ54

AK22

SB_DQ55

AN20

SB_DQ56

AR20

SB_DQ57

AK18

SB_DQ58

AL18

SB_DQ59

AK20

SB_DQ60

AM20

SB_DQ61

AR18

SB_DQ62

AP18

SB_DQ63

HSW_ULT_ DDR3 L

DDR CHANNEL B

4 OF 19

SB_CK#0

SB_CK0

SB_CK#1

SB_CK1

SB_CKE0
SB_CKE1
SB_CKE2
SB_CKE3

SB_CS#0
SB_CS#1

SB_ODT0

SB_RAS

SB_WE

SB_CAS

SB_BA0
SB_BA1
SB_BA2

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8

SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15

SB_DQSN0
SB_DQSN1
SB_DQSN2
SB_DQSN3
SB_DQSN4
SB_DQSN5
SB_DQSN6
SB_DQSN7

SB_DQSP0
SB_DQSP1
SB_DQSP2
SB_DQSP3
SB_DQSP4
SB_DQSP5
SB_DQSP6
SB_DQSP7

AM38
AN38
AK38
AL38

AY49
AU50
AW49
AV50

AM32
AK32

AL32

AM35
AK35
AM33

AL35
AM36
AU49

AP40
AR40
AP42
AR42
AR45
AP45
AW46
AY46
AY47
AU46
AK36
AV47
AU47
AK33
AR46
AP46

AW30
AV26
AN28
AN25
AW22
AV18
AN21
AN18

AV30
AW26
AM28
AM25
AV22
AW18
AM21
AM18

M_B_ODT0

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_A_DQS#4
M_A_DQS#5
M_B_DQS#4
M_B_DQS#5
M_A_DQS#6
M_A_DQS#7
M_B_DQS#6
M_B_DQS#7

M_A_DQS4
M_A_DQS5
M_B_DQS4
M_B_DQS5
M_A_DQS6
M_A_DQS7
M_B_DQS6
M_B_DQS7

M_B_CLK0# [15]

M_B_CLK0 [15]

M_B_CLK1# [15]

M_B_CLK1 [15]

M_B_CKE0 [15]
M_B_CKE1 [15]

M_B_CS#0 [15]
M_B_CS#1 [15]

TP25

M_B_RAS# [15]
M_B_WE# [15]
M_B_CAS# [15]

M_B_BS#0 [15]
M_B_BS#1 [15]
M_B_BS#2 [15]
M_B_A[15:0] [15]

M_A_DQS#4 [14]
M_A_DQS#5 [14]
M_B_DQS#4 [15]
M_B_DQS#5 [15]
M_A_DQS#6 [14]
M_A_DQS#7 [14]
M_B_DQS#6 [15]
M_B_DQS#7 [15]

M_A_DQS4 [14]
M_A_DQS5 [14]
M_B_DQS4 [15]
M_B_DQS5 [15]
M_A_DQS6 [14]
M_A_DQS7 [14]
M_B_DQS6 [15]
M_B_DQS7 [15]

A A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

ZRT/ZRTA

PROJECT :

ZRT/ZRTA

PROJECT :

1

ZRT/ZRTA

of

344

344

344

3A

3A

3A

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Haswell 2/5 (DDR3 I/F)

Haswell 2/5 (DDR3 I/F)

Haswell 2/5 (DDR3 I/F)

Date: Sheet

Date: Sheet of

Date: Sheet of

Wednesday, February 11, 2015

Wednesday, February 11, 2015

5

4

3

2

Wednesday, February 11, 2015

5

4

3

2

1

H_PECI (50ohm)
Route on microstrip only

D D

C C

B B

Spacing >18 mils
Trace Length: 0.4~6.125 iches

H_PWRGOOD (50ohm)
Trace Length: 1~11.25 inches

CPU_PLTRST# (50ohm)
Trace Length: 10~17 inches

H_PECI[31] XDP_PRDY# [13]

H_PROCHOT#[31,32,36]

SM_RCOMP[0:2]
Trace length < 500 mils
Trace width = 12~15 mils
Trace spacing = 20 mils

R662 56_4

TP106
TP99

DRAM COMP

R663 *62_4

R664 62_4

R682 10K_4

5

SM_RCOMP_0

SM_RCOMP_1

SM_RCOMP_2

+VCCIO_OUT

+1.05V_VCCST

DRAMRST

+1.35V_SUS

CPU DRAM

CPU_DRAMRST#

R254 200/F_4

R250 120/F_4

R260 100/F_4

PU/PD of CPU

H_PROCHOT#

A A

H_PWRGOOD_R

Haswell ULT (SIDEBAND)

U37B

R551
470_4

AU60
AV60
AU61
AV15
AV61

XDP_TDO_CPU

XDP_TCK0
XDP_TRST#

D61

PROC_DETECT

K61

CATERR

N62

PECI

K63

PROCHOT

C61

PROCPWRGD

SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
SM_DRAMRST
SM_PG_CNTL1

R659 51_4

R340 51_4
R578 *51_4

R552 *short_4

DSW

+1.05V_VCCST

12

C488

*0.1u/10V_4

MISC

THERMAL

PWR

DDR3L

PROC_DETECT
CATERR#
H_PECI

H_PROCHOT#_RH_PROCHOT#

H_PWRGOOD_R

SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2

DDR_PG_CTRL

12

4

HSW_ULT_DDR3L

DDR3_DRAMRST# [14,15]

3

JTAG

2 OF 19

PRDY

PREQ
PROC_TCK
PROC_TMS

PROC_TRST

PROC_TDI

PROC_TDO

BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7

DDR3L ODT GENERATIONXDP PU/PD

J62

XDP_PRDY#

K62

XDP_PREQ#

E60

XDP_TCK0

E61

XDP_TMS_CPU

E59

XDP_TRST#

F63

XDP_TDI_CPU

F62

XDP_TDO_CPU

J60

XDP_BPM#0

H60

XDP_BPM#1

H61

XDP_BPM#2

H62

XDP_BPM#3

K59

XDP_BPM#4

H63

XDP_BPM#5

K60

XDP_BPM#6

J61

XDP_BPM#7CPU_DRAMRST#

DDR_VTTT_PG_CTRL[35]

R164

220K/F_4

XDP_PREQ# [13]
XDP_TCK0 [8, 13]
XDP_TMS_CPU [13]
XDP_TRST# [8,13]
XDP_TDI_CPU [13]
XDP_TDO_CPU [13]

XDP_BPM#0 [13]

XDP_BPM#1 [13]
TP103
TP102
TP46
TP104
TP100
TP47

+5V_S5

12

R162

*220K/F_4

2

+3VSUS

12

0.1u/10V_4

+1.35V_SUS

2

TCK,TMS
Trace Length < 9000mils

BPM#[0: 7]
Trace Length 1~6 inches
Length match < 300 mils

+1.35V_SUS

U7

5

12

C152

4

3

1

74AUP1G07GW

R87 66.5/F_4
Q8
2N7002K

R86 66.5/F_4

R84 66.5/F_4

R85 66.5/F_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Wednesday, February 11, 2015

Wednesday, February 11, 2015

Wednesday, February 11, 2015

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

NC

VCC

2

A

3

GND

Y

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

Haswell 1/5 (PEG/DMI/FDI)

Haswell 1/5 (PEG/DMI/FDI)

Haswell 1/5 (PEG/DMI/FDI)

R167 *short_4

M_A_ODT0_DIMM [14]

M_A_ODT1_DIMM [14]

M_B_ODT0_DIMM [15]

M_B_ODT1_DIMM [15]

1

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

DDR_PG_CTRL

3A

3A

444

444

444

3A

VDDQ Output Deco upling Recommenda tions

330uFx2 7343

22uFx11

10uFx10

D D

+1.35V_SUS

R208 *short_1206
R209 *short_1206

+

C C

+1.05V_VCCST

VRON_CPU IMVP_PWRGD

B B

5

BOT socket s ide

5 onTOP, 6 on BOT insi de socket cavity

0805

5 onTOP, 5 on BOT insi de socket cavity

0805

C187

C190

10u/6.3V_6

10u/6.3V_6

C217

C489

2.2u/6.3V_6

*470u/2V_7343

+VCCIN

VCC_SENSE[36]

R332 *10K_4

R333 10K_4

PWR_DEBUG[13]

+1.05V_VCCST

+1.35V_CPU 1.4A

C226
10u/6.3V_6

C227

2.2u/6.3V_6

300mA
300mA

+1.35V_CPU

+1.35V_CPU

C220
10u/6.3V_6

C181

2.2u/6.3V_6

R666 100/F_4

R676 *short_4

VCCST_PWRGD[13]

VRON_CPU[36]

IMVP_PWRGD[10,36]

R319 *short_4 C253

R323 150_6

C188
10u/6.3V_6

+VCCIO_OUT

+VCCIOA_OUT

1006 add

C219

2.2u/6.3V_6

+VCCIN

TP43
TP44
TP49
TP97

C191
10u/6.3V_6

VCC_SENSE_R

H_CPU_SVIDART#
H_CPU_SVIDCLK
H_CPU_SVIDDAT
VCCST_PWRGD
VRON_CPU
IMVP_PWRGD

PWR_DEBUG_ R

ULT_RVSD_69
ULT_RVSD_70
ULT_RVSD_71
ULT_RVSD_72

1006 Del

R345 *short_8

+1.05V_VCCST+1.05V

C235
*4.7u/10V_6

+1.05V_VCCST

+VCCIN

HWPG_1.05V for DDR=1.5V

Q9
*MMBT3904-7-F

+3V

R94
*4.7K_4

C73
*1000p/50V_4

2

A A

+1.05V

R99 *4.7K_4

C72
*1000p/50V_4

5

2

1 3

4

Haswell ULT (POWER)

U37L

L59

RSVD

J58

RSVD

AH26

VDDQ

AJ31

VDDQ

AJ33

VDDQ

AJ37

VDDQ

AN33

VDDQ

AP43

VDDQ

AR48

VDDQ

AY35

VDDQ

AY40

VDDQ

AY44

VDDQ

AY50

VDDQ

F59

VCC

N58

RSVD

AC58

RSVD

E63

VCC_SENSE

AB23

RSVD

A59

VCCIO_OU T

E20

VCCIOA_OU T

AD23

RSVD

AA23

RSVD

AE59

RSVD

L62

VIDALERT

N63

VIDSCLK

L63

VIDSOUT

B59

VCCST_PWR GD

F60

VR_EN

C59

VR_READY

D63

VSS

H59

PWR_DEBUG

P62

VSS

P60

RSVD_TP

P61

RSVD_TP

N59

RSVD_TP

N61

RSVD_TP

T59

RSVD

AD60

RSVD

AD59

RSVD

AA59

RSVD

AE60

RSVD

AC59

RSVD

AG58

RSVD

U59

RSVD

V59

RSVD

AC22

VCCST

AE22

VCCST

AE23

VCCST

AB57

VCC

AD57

VCC

AG57

VCC

C24

VCC

C28

VCC

C32

VCC

+3V

R78

1 3

*4.7K_4

Q7
*DTC144EU

R77
*100K/F_4

10/30 reserve
DDR=1.5V ,This block POP

4

HWPG_1.05V [31]

HSW_ULT_DDR3L

HSW ULT POWER

12 OF 19

3

+

C556
*470u/2V_7343

C36

VCC

C40

VCC

C44

VCC

C48

C256

VCC

C52

VCC

C56

VCC

E23

VCC

E25

VCC

E27

VCC

E29

VCC

E31

VCC

E33

VCC

E35

VCC

E37

VCC

E39

VCC

E41

VCC

E43

VCC

E45

VCC

E47

VCC

E49

VCC

E51

VCC

E53

VCC

E55

VCC

E57

VCC

F24

VCC

F28

VCC

F32

VCC

F36

VCC

F40

VCC

F44

VCC

F48

VCC

F52

VCC

F56

VCC

G23

VCC

G25

VCC

G27

VCC

G29

VCC

G31

VCC

G33

VCC

G35

VCC

G37

VCC

G39

VCC

G41

VCC

G43

VCC

G45

VCC

G47

VCC

G49

VCC

G51

VCC

G53

VCC

G55

VCC

G57

VCC

H23

VCC

J23

VCC

K23

VCC

K57

VCC

L22

VCC

M23

VCC

M57

VCC

P57

VCC

U57

VCC

W57

VCC

3

C329

22u/6.3V_8

22u/6.3V_8

C245

C270

22u/6.3V_8

22u/6.3V_8

C548

C252

22u/6.3V_8

22u/6.3V_8

C246

C283

22u/6.3V_8

22u/6.3V_8

C549
*22u/6.3V_8

*22u/6.3V_8

VCC Output Deco upling Recommend ations

470uFx4 7343

22uFx8

0805

22uFx11

0805

10uFx11

0805

C289

C312

22u/6.3V_8

22u/6.3V_8

C552

C275

22u/6.3V_8

22u/6.3V_8

C260

C339

22u/6.3V_8

22u/6.3V_8

C251

C250

22u/6.3V_8

22u/6.3V_8

C236

C334

*22u/6.3V_8

*22u/6.3V_8

TOP socket side

4 on TOP, 4 on BOT near soc ket edge

TOP, inside socket cavity

BOT, insi de socket cavity

C279
22u/6.3V_8

C240
22u/6.3V_8

C550
22u/6.3V_8

C337
22u/6.3V_8

C545
*22u/6.3V_8

2

+VCCIN 32A

C335
22u/6.3V_8

C259
22u/6.3V_8

C261
22u/6.3V_8

C554
22u/6.3V_8

C234
*22u/6.3V_8

2

VCCST PWRGD

VCCST_PWRGD

+VCCIN

SVID

H_CPU_SVIDDAT

H_CPU_SVIDART#

H_CPU_SVIDCLK

CRB is via +1.05V PG

+1.05V_VCCST

C465
*0.1u/10V_4

VCCST_PWRGD _EN

1A-6 2013/10/21 Del APWORK.

+VCCIO_OUT

Place PU resistor
close to CPU

Place PU resistor
close to CPU

+3V_S5

5

C466
R681
10K_4

R503 *short_4

R489 *0_4

0.1u/10V_4

VCCST_PWRGD _R

Layout note: need routing together
and ALERT need between CLK and DATA.

+1.05V_VCCST

R651
*130/F_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Wednesday, February 11, 2015

Wednesday, February 11, 2015

Wednesday, February 11, 2015

Date: Sheet of

Date: Sheet of

Date: Sheet

4

HWPG_1.05V_EC

Q43

*2N7002K

R107 *short_4
R108 *0_4

+VCCIO_OUT+1.05V

R351 *0_8

R652
130/F_4

R650 *short_4

+1.05V_VCCST

R631 43_4

R628 *short_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

Haswell 4/5 (POWER)

Haswell 4/5 (POWER)

Haswell 4/5 (POWER)

1

U28

NC1VCC

A

GND3Y

74AUP1G07GW

3

Reserve from EC

2

1

PCH_PWROK [7,31]
EC_PWROK [7,31]

C263
*4.7u/10V_6

+VCCIO_OUT

R637
75_4

1

2

VCCST_PWRGD _EN

HWPG_1.05V_EC# [31]

VR_SVID_DATA [36]

R636
*75_4

VR_SVID_ALERT# [36 ]

VR_SVID_CLK [36]

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

of

544

544

544

3A

3A

3A

5

4

3

2

1

Haswell ULT (CFG,RSVD)

U37S

HSW_ULT_DDR3L

D D

C C

1A-10 20131025 reserve A5 ball to 100k PU 3VPCU.
1A-12 20131028 reserve A5 ball toTP.

NOA_STBN_0[13]
NOA_STBN_1[13]
NOA_STBP_0[13]
NOA_STBP_1[13]

R618 49.9/F_4

TP109

CFG0[13]
CFG1[13]
CFG2[13]
CFG3[13]
CFG4[8,13]
CFG5[13]
CFG6[13]
CFG7[13]
CFG8[13]

CFG9[13]
CFG10[13]
CFG11[13]
CFG12[13]
CFG13[13]
CFG14[13]
CFG15[13]

R689 8.2K_4

Processor Strapping

CFG0
EAR-STALL/NOT STALL RESET SEQUENCE
AFTER PCU PLL IS LOCKED
CFG1
PCH/ PCH LESS MODE SELECTION

B B

CFG3
PHYSICAL_DEBUG_ENABLED (DFX PRIVACY)

CFG 8
ALLOW THE USE OF NOA O N LOCKED UNITS

CFG9
NO SVID PRO TOCOL CAPABLE VR
CONNECTED

A A

CFG10
SAFE MODE BOOT

5

(DEFAULT) NORMAL OPERATION; NO STALL

(DEFAULT) NORMAL OPERATION

DISABLED
NO PHYSICAL DISPLAY PORT ATTACHED
TO
EMBEDDED DISPLAY PORT

DISABLED(DEFAULT); IN THIS CASE, NOA
WILL BE DISABLED IN LOCKED UNITS AND
ENABLED IN UN-LOCKED UNITS

VRS SUPPORTING SVID PROTOCOL ARE
PRESENT

POWER FEATURES ACTIVATED
DURING RESET

4

AC60

CFG0

CFG0

AC62

CFG1

CFG1

AC63

CFG2

CFG2

AA63

CFG3

CFG3

AA60

CFG4

CFG4

Y62

CFG5

CFG5

Y61

CFG6

CFG6

Y60

CFG7

CFG7

V62

CFG8

CFG8

V61

CFG9

CFG9

V60

CFG10

CFG10

U60

CFG11

CFG11

T63

CFG12

CFG12

T62

CFG13

CFG13

T61

CFG14

CFG14

T60

CFG15

CFG15

AA62

NOA_STBN_0
NOA_STBN_1
NOA_STBP_0
NOA_STBP_1

CFG_RCOMP

REFPKG_OCC

TD_IREF

AA61

U63

U62

V63

A5

E1
D1

J20
H18
B12

CFG16
CFG18
CFG17
CFG19

CFG_RCOMP

RSVD

RSVD
RSVD
RSVD
RSVD
TD_IREF

1 0

STALL

PCH-LESS MODE

ENABLED
AN EXTERNAL DISPLAY PORT DEVICE IS
CONNECTED
TO THE EMBEDDED DISPLAY PORT

ENABLED; NOA WILL BE AVAILABLE
REGARDLESS OF THE LOCKING OF THE UNIT

NO VR SUPPORT ING SVID IS PRESENT. THE
CHIP WI LL NOT GENERATE (OR RE SPOND TO)
SVID ACTIVITY

POWER FEATURES (ESPECIALLY CLOCK
GATINE ARE NOT ACTIVATED

RESERVED

PROC_OPI_RCOMP

19 OF 19

3

RSVD_TP
RSVD_TP

RSVD_TP
RSVD_TP

RSVD

RSVD_TP
RSVD_TP

RSVD_TP

RSVD

RSVD
RSVD

RSVD
RSVD

RSVD
RSVD

AV63
AU63

C63
C62
B43

A51
B51

L60

N60

W23
Y22
AY15

OPI_COMP1

CFG0

CFG1

CFG3

CFG9

CFG10

R555 49.9/F_4

R289 *1K_4

R606 *1K_4

R610 *1K_4

R614 *1K_4

R619 *1K_4

R295 *1K_4

2

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Wednesday, February 11, 2015

Wednesday, February 11, 2015

Wednesday, February 11, 2015

Date: Sheet

Date: Sheet of

Date: Sheet of

PROJECT :

Haswell 5/5 (CFG/GND)

Haswell 5/5 (CFG/GND)

Haswell 5/5 (CFG/GND)

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

of

644

644

644

1

3A

3A

3A

AV62
D58

P22

VSS

N21

VSS

P20
R20

CFG8

5

PCH_SUSACK#[31]

PCH_SUSPWRACK

SYS_RESET#[1 3]

DNBSWON#[31]
ACPRESENT[32]

RSMRST#[31]

R276 *short_4
R279 *0_4
R282 *0_4

D D

1C1-1 2014/02/19 add R692 for SUSPWRACK# to EC.

SYS_PWROK

EC_PWROK

PCH_SUSPWRACK_R[31]

R597 *0_4

R596 *0_4

C237 *1u/6.3V_4

R546 *0_4
R283 *0_4

R548 *short_4
R583 *0_4
R265 *short_4
R294 *short_4

TP77
TP28

SUSACK#_R

SUSACK#_R
SYS_RESET#

SYS_PWROK_R
EC_PWROK_R
APWROK_R
PCI_PLTRST#

PCH_RSMRST#

PCH_SUSPWRACK

PCH_PWRBTN#
PCH_ACPRESENT
PCH_BATLOW#
PCH_SLP_S0#_R
PCH_SLP_WLAN#

4

Haswell ULT PCH (PM)

U37H

AK2

SUSACK

AC3

SYS_RESET

AG2

SYS_PWROK

AY7

PCH_PWROK

AB5

APWROK

AG7

PLTRST

AW6

RSMRST

AV4

SUSWARN/SUSPW RDNACK/GPIO30

AL7

PWRBTN

AJ8

ACPRESENT/GPIO31

AN4

BATLOW/GPIO72

AF3

SLP_S0

AM5

SLP_WLAN/GPIO29

+3V_S5

HSW_ULT_DDR3L

SYSTEM POWER MANAGEMENT

+3V_S5
DSW
DSW
DSW
+3V_S5
DSW

8 OF 19

3

+3V
+3V_S5
+3V_S5
DSW

DSWVRMEN

DPWROK

DSW

WAKE

CLKRUN/GPIO32

SUS_STAT/GPIO61

SUSCLK/GPIO62
SLP_S5/GPIO63

DSW

SLP_S4

DSW

SLP_S3

DSW

SLP_A

DSW

SLP_SUS

DSW

SLP_LAN

AW7

DSWVREN

AV5

DPWROK_R

AJ5

PCIE_LAN_WAKE#

V5

CLKRUN#

AG4

GPIO61

AE6

PCH_SUSCLK

AP5

PCH_SLP_S5#

AJ6

SUSC#

AT4

SUSB#

AL5

PCH_SLP_A#

AP4

PCH_SLP_SUS#

AJ7

PCH_SLP_LAN#

2

Deep Sx

R543 *0_4

TP74

TP32

DSWVREN [8]
DPWROK [31 ]
PCIE_LAN_WAKE# [25,28]

CLKRUN# [27,31]

PCH_SUSCLK [ 28]
PCH_SLP_S5# [13]

SUSC# [13,3 1]
SUSB# [13,31]
PCH_SLP_A# [13]
PCH_SLP_SUS# [ 31]

1

C C

PCH PM PU/PD

+3V

CLKRUN#
SYS_RESET#

B B

PCH_RSMRST#
SYS_PWROK
DPWROK_R
PCH_SUSCLK

PCH_SUSPWRACK
GPIO61

1C-5 2014/01/16 Change R264 from 10k to 1k

for wake on lan issue.

PCH_ACPRESENT
PCH_BATLOW#
PCIE_LAN_WAKE#
PCH_PWRBTN#

A A

R638 8.2K_4
R612 10K_4

R554 10K_4
R277 *10K_4
R553 100K/F_4
R306 *10K_4

R590 *10K_4
R603 *10K_4

R287 10K_4
R255 8.2K_4
R298 1K_4
R267 *10K_4

R293 *10K_4
R256 *8.2K_4
R296 *1K_4
R264 *10K_4

5

+3V_S5

+3V_S5

+3VPCU

DSW PU

Power Sequence

PCH_PWROK[5,31]

R106

100K_4

EC_PWROK SYS_PWROK_R

R559 *short_4

R284 *0_4

R549 *short_4

Non Deep Sx

EC_PWROK_R

DPWROK_RRSMRST#

PLTRST# Buffer Deep Sx Circuit

+3V

PCI_PLTRST#

2

1

C202 0.1u/10V_4

4

U15

3 5

TC7SH08FU

R227
100K_4

PLTRST# [13,16,25,27,2 8,31]

+3V_S5 +3VCC_S5

SYSPWOK

+3V_S5

C249 *0.1u/10V_4

2

4

SYS_PWROK[13]

4

SYS_PWROK

U17
TC7SH08FU

R305 *0_4

EC_PWROK

1

3 5

3

R297
10K_4

EC_PWROK [5,31]

IMVP_PWRGD_3V [10]

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

Date: Sheet

Wednesday, February 11, 2015

Wednesday, February 11, 2015

Wednesday, February 11, 2015

Date: Sheet of

Date: Sheet of

2

APWORK[31]

Speed up 250ms to boot up
for EC power on 250 ms

R285 *short_4

Non Deep Sx

R220 *Short_6

1

R212

C178

*100K_4

*0.33u/10V_ 6

PCH_SLP_SUS#

LPT 1/6 (DMI/FDI/VGA)

LPT 1/6 (DMI/FDI/VGA)

LPT 1/6 (DMI/FDI/VGA)

2

3

2

Q16
*2N7002K

1

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

APWROK_R

R280
10K_4

3

Q14
*AO3413

R211
*0_6

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

of

744

744

744

1

3A

3A

3A

RTC Cl ock 32 .768KHz (RTC)

C506 15p/50V_4

C498 15p/50V_4

RTC Ci rcuit ry (RTC )

D D

R528 *Short_6

+3VPCU

R525 1K_4

VCCRTC _2

+3V_RTC_[0:2]
Trace width = 20 mils

12

BT1

BAT_CONN

1A-2

2013/10/16 Chage +3V_RTC_0 to VCCTC_2.

HDA

PCH_AZ_CODEC_RST#[26]

PCH_AZ_CODEC_SDOUT[26]

PCH_AZ_CODEC_BITCLK[26]

C C

PCH_AZ_CODEC_SYNC[26]

PCH JTA G

JTAG_TCK,JTAG_TM S
Trace Length < 9000mils

B B

ULT Strapping Table

Pin Name Strap description

GPIO81(SPKR)

HDA_SDO

INTVRMEN

GPIO66

GPIO86

GPIO15

A A

CFG4

DSWVREN

5

RTC_X1

12

R577

Y2

10M_4

32.768KHZ

RTC_X2

1B-1

+3V_RTC

D25

+3V_RTC_2

+3V_RTC_1

BAT54C

C185
1u/6.3V_4

R236 33_4

R572 33_4

R570 33_4

C490
*10p/50V_4

R237 33_4

C221 *10p/50V_4

MP remove(Intel)

XDP_TM S

R585 51_4

XDP_TD I

R586 51_4

PCH_JTAG_TDO

R591 51_4

PCH_JTAGX

R587 *1K_4

XDP_TC K1

R580 *51_4

No reboot on TCO Timer
expiration

Flash Descriptor Sec urity
Override / Intel ME Debug Mode

Integr ated 1 .05V VR M enab le ALWAYS

Top-Block Swap override

Boot BIOS Strap Bit

TLS(Transport layer security)

DP presence strap

Deep Sx well on die VR enable

5

+3V_RTC
Trace width = 30 mils

R219

20K/F_4

C182

2.2u/6.3V_4

R214

20K/F_4

C186

2.2u/6.3V_4

+1.05V_S5

12

SRTC_RST#

HDA_RST#_R

HDA_SDO_R

HDA_BCLK_R

HDA_SYNC_R

RTC_RST#

J1
*JUMP

Sampled

PWROK

PWROK

+3V_RTC

PCH_AZ_CODEC_SDIN0[26]

XDP_TR ST#[4,13]

XDP_TC K1[13]

XDP_TD I[13]
XDP_TD O[13]
XDP_TM S[13]

XDP_TC K0[4,13]

1A-10
1A-12

0 = Default en able (iPD 20K )

1 =Disable No- Reboot mode

0 = Default can program ME ( iPD 20K)

1 =can't progr am ME

1=Should be al ways pull- up

0 = Default d isable (iPD 20K)

1 = Enable TBS function

0 = Default SP I (iPD 20K )

1 =LPC

0 = Default en able w/o

confidenti ality(i PD 20K)

1 =Default enable wi th

confidentiality

0 = Enable an extern al display

port is connected to the eDP

1 =disable

1=Should be al ways pull- up

4

Haswell ULT PCH (RTC/HDA/SATA/SPI)

U37E

AW5

RTC_X1

RTCX1

AY5

RTC_X2

RTCX2

AU6

SM_INTRUDER#

R562 1M_4

RTC_RST#[13]

R592 *short _4

R581 *short _4

TP70

2013/10/25 reserve AV2 ball to GND.
2013/10/28 reserve AV2 ball to TP.

Configuration note

PCH_INTVRMEN

RTC_RST#

HDA_BCLK_R
HDA_SYNC_R
HDA_RST#_R

HDA_SDO_R

XDP_TC K1
XDP_TD I
PCH_JTAG_TDO

PCH_JTAGX

PCH_EDM

4

INTRUD ER

AV7

INTVRME N

AV6

SRTCRST

AU7

RTCRST

AW8

HDA_BCLK/I2S0_SCLK

AV11

HDA_SYNC/I2S0_SFRM

AU8

HDA_RST/I2S_MCLK

AY10

HDA_SDI0/I2S0_RXD

AU12

HDA_SDI1/I2S1_RXD

AU11

HDA_SDO/I2S0_TXD

AW10

HDA_DOCK_EN/I2S1_TXD

AV10

HDA_DOCK_RST/I2S1_SFRM

AY8

I2S1_SC LK

AU62

PCH_TRST

AE62

PCH_TCK

AD61

PCH_TDI

AE61

PCH_TDO

AD62

PCH_TMS

AL11

RSVD

AC4

RSVD

AE63

JTAGX

AV2

RSVD

+3V

+3V_RTC

+3V

+3V

+3V_S5

+3V_RTC

R304 *1K_4

HDA_SDO_R

R545 330K_4

R356 *1K_4

GPIO86[10]

R343 *1K_4

GPIO15[10]

R317 8.2K_4

DSWVREN[7]

R557 330K_4

JTAG

CFG4[6,13]

HSW_ULT_DDR3L

RTC

AUDIO SATA

5 OF 19

SPKR

PCH_INTVRMEN

GPIO66

GPIO86

GPIO15

CFG4

DSWVREN

SPKR [10,26]

ME_WR# [31]

R558 *330K_4

R361 *1K_4

R346 *1K_4

R307 *1K_4

R611 1K_4

R567 *330K_4

R573 *short_4

+3V
+3V
+3V
+3V

3

SATA_RN0/PERN6_L3
SATA_RP0/PERP6_L3
SATA_TN0/PETN6_L3
SATA_TP0/PETP6_L3

SATA_RN1/PERN6_L2
SATA_RP1/PERP6_L2
SATA_TN1/PETN6_L2
SATA_TP1/PETP6_L2

SATA_RN2/PERN6_L1
SATA_RP2/PERP6_L1
SATA_TN2/PETN6_L1
SATA_TP2/PETP6_L1

SATA_RN3/PERN6_L0
SATA_RP3/PERP6_L0
SATA_TN3/PETN6_L0
SATA_TP3/PETP6_L0

SATA0GP/GPIO34
SATA1GP/GPIO35
SATA2GP/GPIO36
SATA3GP/GPIO37

SATA_IREF

SATA_RCOMP

SATALED

3

J5
H5
B15
A15

J8
H8
A17
B17

J6
H6
B14
C15

F5
E5
C17
D17

V1

VGPU_EN

U1

ODD_PRSNT#

V6

DEVSLP_ODD

AC1

GPIO37

A12

SATA_IREF

L11

RSVD

K10

RSVD

C12

SATA_RCOMP

U3

SATA_LED#

SATA_RCOMP
Impedance = 50 ohm
Trace length < 500 mils
Trace spacing = 15 mils

PCH SPI ROM(8M +4M)

15ohm CS01502JB12

R690 *short_4

R688 3.01K/F_4
R626 10K_4

PCH_SPI_CLK_EC[31]

PCH_SPI_SI_EC[31]GPIO66[10]

+3V_PCH_ME

SATA_RXN0 [27]
SATA_RXP0 [27]

HDD

SATA_TXN0 [27]
SATA_TXP0 [27]

SATA_RXN1 [27]
SATA_RXP1 [27]

ODD

SATA_TXN1 [27]
SATA_TXP1 [27]

VGPU_EN [ 38]
ODD_PRSNT# [27]
DEVSLP_ODD [27]

TP91

+V1.05S_ASATA3PLL

+V1.05S_ASATA3PLL
+3V

U38

1

PCH_SPI_CS0#

CS#

2

SPI_SO_8M

IO1/DO

3

SPI_WP_IO2_ME

IO2/WP#

4

GND

W25Q64FW -- 8MB

PCH_SPI_CLK_EC

PCH_SPI_CLK

PCH_SPI_SI_EC

PCH_SPI_SI

+3V_PCH_ME

PCH_SPI_SO_EC[31]

+3V_PCH_ME

SPI_CS0#_UR_ME[31]

R600 15_4

R648 *1K_4

PCH_SPI_IO2 SPI_WP_IO2_ME

R657 15_4

PCH_SPI_SO_EC

PCH_SPI_SO

R313 10K_4

2

Haswell ULT PCH(LPC,SPI,SMBUS,C-LINK,THERMAL)

HSW_ULT_DDR3L

U37G

LPC_LFRAME#[27,28,31]

R308 *Short_6

VCC

IO3/HOL D#

CLK

IO0/DI

R593 15_4

R602 15_4

R598 15_4

R604 15_4

R605 *1K_4

R649 15_4

R658 15_4

LPC_LAD0[27,28,31]
LPC_LAD1[27,28,31]
LPC_LAD2[27,28,31]
LPC_LAD3[27,28,31]

PCH_SPI_CLK

PCH_SPI_SI
PCH_SPI_SO
PCH_SPI_IO2
PCH_SPI_IO3

GPIO37

DEVSLP_ODD

R622*10K_4

1A-14

2013/12/02 change GPIO36 to PD.

1B-2

2013/12/04 change GPIO36/GPI037 to PU.

+3V_PCH_ME+3V_S5

8

7

SPI_HOLD_IO3_ME

6

SPI_CLK_8M

5

SPI_CLK_8M

C522 *22p/50V_4

SPI_SI_8M

SPI_HOLD_IO3_MEPCH_SPI_IO3

R639 *short_4

2

VGPU_EN

SPI_SI_8M

SPI_SO_8M

PCH_SPI_CS0#

AU14

LAD0

AW12

LAD1

AY12

LAD2

AW11

LAD3

AV12

LFRAME

AA3

SPI_CLK

Y7

SPI_CS0

Y4

SPI_CS1

AC2

SPI_CS2

AA2

SPI_MOSI

AA4

SPI_MISO

Y6

SPI_IO2

AF1

SPI_IO3

R61510K_4

R312*10K_4

R62510K_4

+3V_PCH_ME

C254

0.1u/10V_4

+3V_S5

SMBALERT/GPIO11

+3V_S5

LPC

+3V_S5

SMBUS

+3V_S5

SML0ALERT/GPIO60

+3V_S5
+3V_S5

+3V_S5

SML1ALERT/PCHHOT/GPIO73

+3V_S5

SML1CLK/GPIO75

+3V_S5

SML1DATA/GPIO74

C-LINKSPI

7 OF 19

+3V

SMBus

SMBus(PCH)

SMB_PCH_DAT

SMB_PCH_CLK

PCH_XDP_WLAN/S5 DDR_TP/S0

SMBus(EC)

2ND_MBCLK[19,31]

2ND_MBDATA[19,31]

EC/S5 PCH/S5

1

AN2

SMBALERT#SRTC_RST#

AP2

SMB_PCH_CLK

SMBCLK

AH1

SMB_PCH_DAT

SMBDATA

AL2

SMB0ALERT#

AN1

VGA_MBCL K

SML0CLK

AK1

VGA_MBDAT A

SML0DATA

AU4

SMB1ALERT#

AU3

SMB_ME1_CLK

AH3

SMB_ME1_DAT

AF2

CL_CLKPCH_SPI_CS0#

CL_CLK

AD2

CL_DAT

CL_DATA

AF4

CL_RST#

CL_RST

+3V_S5

R589 10K_4
R556 10K_4
R271 10K_4

R238 2.2K_4
R249 2.2K_4
R595 2.2K_4
R258 2.2K_4

+3V

Q18

5

621

2N7002DW

+3V_S5

Q19

5

621

*2N7002DW

R240 *short_4

2ND_MBDATA

R263 *short_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LPT 2/6 (SATA/HDA/SPI)

LPT 2/6 (SATA/HDA/SPI)

LPT 2/6 (SATA/HDA/SPI)

Date: Sheet of

Date: Sheet of

Date: Sheet

Wednesday, February 11, 2015

Wednesday, February 11, 2015

Wednesday, February 11, 2015

SMB1ALERT# [29]

TP83
TP85
TP40

SMB0ALERT#
SMB1ALERT#
SMBALERT#

SMB_PCH_CLK
SMB_PCH_DAT
VGA_MBDAT A
VGA_MBCL K

R252

R235

4.7K_4

4.7K_4

43

CLK_SDATA [13,14,15,29]

CLK_SCLK [13,14,15,29]

R241

R259

*2.2K_4

*2.2K_4

43

SMB_ME1_CLK

SMB_ME1_DAT

SMB_ME1_CLK2ND_MBCLK
SMB_ME1_DAT

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

ZRT/ZRTA

PROJECT :

ZRT/ZRTA

PROJECT :

ZRT/ZRTA

of

844

844

1

844

3A

3A

3A

5

1A-6 2013/10/21 reversal PEG lan for layout.
1A-8 2013/10/21 Swap PEG to nomroal mode.

PEG_RX#0[16]

D D

C C

B B

A A

PEG_RX0[16]

PEG_TX#0[16]

PEG_TX0[16]

PEG_RX#1[16]

PEG_RX1[16]

PEG_TX#1[16]

PEG_TX1[16]

PEG x4

PEG_RX#2[16]

PEG_RX2[16]

PEG_TX#2[16]

PEG_TX2[16]

PEG_RX#3[16]

PEG_RX3[16]

PEG_TX#3[16]

PEG_TX3[16]

PCIE_RX3-_LAN[2 5]
PCIE_RX3+_LAN[25]

PCIE_TX3-_LAN[25]

LANWLAN

PCIE_TX3+_LAN[25]

PCIE_RX4-_WLAN[28]
PCIE_RX4+_WLAN[28]

PCIE_TX4-_WLAN[28]
PCIE_TX4+_WLAN[28 ]

+V1.05S_AUSB3PLL

Haswell ULT PCH (PCIE,USB3.0,USB2.0)

U37K

F10

PERN5_L0

E10

PERP5_L0

C23

C532 [email protected]/10V_4
C533 [email protected]/10V_4

C525 [email protected]/10V_4
C526 [email protected]/10V_4

C530 [email protected]/10V_4
C531 [email protected]/10V_4

C527 [email protected]/10V_4
C528 [email protected]/10V_4

C538 0.1u/10V_4
C537 0.1u/10V_4

C536 0.1u/10V_4
C535 0.1u/10V_4

R339 3.01K/F_4

R338 *short_4

5

C_PEG_TX#0
C_PEG_TX0

C_PEG_TX#1
C_PEG_TX1

C_PEG_TX#2
C_PEG_TX2

C_PEG_TX#3
C_PEG_TX3

PCIE_TX3­PCIE_TX3+

PCIE_TX4­PCIE_TX4+

PCIE_RCOMP
PCIE_IREF

C22

F8
E8

B23
A23

H10

G10

B21
C21

E6
F6

B22
A21

G11

F11

C29
B30

F13

G13

B29
A29

G17

F17

C30
C31

F15

G15

B31
A31

E15
E13
A27
B27

PETN5_L0
PETP5_L0

PERN5_L1
PERP5_L1

PETN5_L1
PETP5_L1

PERN5_L2
PERP5_L2

PETN5_L2
PETP5_L2

PERN5_L3
PERP5_L3

PETN5_L3
PETP5_L3

PERN3
PERP3

PETN3
PETP3

PERN4
PERP4

PETN4
PETP4

PERN1/USB3RN3
PERP1/USB3RP3

PETN1/USB3TN3
PETP1/USB3TP3

PERN2/USB3RN4
PERP2/USB3RP4

PETN2/USB3TN4
PETP2/USB3TP4

RSVD
RSVD
PCIE_RCOMP
PCIE_IREF

+3V_S5
+3V_S5

+3V_S5
+3V_S5

4

HSW_ULT_D DR3L

PCIE USB

11 OF 19

4

+3V_S5
+3V_S5
+3V_S5
+3V_S5

+3V_S5
+3V_S5

+3V_S5
+3V_S5

1A-1 2013/10/15 following up acer define and swap USB3 and USB2

USB2 port.

AN8

DSW
DSW

DSW
DSW

DSW
DSW

DSW
DSW

DSW
DSW

DSW
DSW

DSW
DSW

DSW
DSW

USB3RN1
USB3RP 1

USB3RN2
USB3RP 2

USBRBI AS

USBRBI AS

OC0/GPIO40
OC1/GPIO41
OC2/GPIO42
OC3/GPIO43

USB2N0
USB2P0

USB2N1
USB2P1

USB2N2
USB2P2

USB2N3
USB2P3

USB2N4
USB2P4

USB2N5
USB2P5

USB2N6
USB2P6

USB2N7
USB2P7

USB3TN1
USB3TP 1

USB3TN2
USB3TP 2

RSVD
RSVD

USBP0- [30]

AM8

USBP0+ [3 0]

AR7

USBP1- [30]

AT7

USBP1+ [3 0]

AR8
AP8

AR10

USBP3- [3 0]

AT10

USBP3+ [3 0]

AM15

USBP4- [28]

AL15

USBP4+ [2 8]

AM13

USBP5- [23]

AN13

USBP5+ [2 3]

AP11

USBP6- [23]

AN11

USBP6+ [2 3]

AR13

USBP7- [30]

AP13

USBP7+ [3 0]

G20

USB3_RX N0 [3 0]

H20

USB3_RX P0 [30 ]

C33

USB3_TX N0 [30]

B34

USB3_TX P0 [30]

E18

USB3_RX N1 [3 0]

F18

USB3_RX P1 [30 ]

B33

USB3_TX N1 [30]

A33

USB3_TX P1 [30]

AJ10

USBCOMP

R257 22.6/F_4

AJ11
AN10
AM10

AL3

USB_OC0 #
USB_OC1 #
USB_OC2 #
USB_OC3 #

USB_OC0 # [3 0]
USB_OC1 # [3 0]

AT1
AH2
AV3

MB USB3.0

MB USB3.0

DB USB2.0

DB USB2.0

BT

Touch screen

CCD

Card reader

MB USB3.0

USBCOMP
Impedance = 50 ohm
Trace length < 500 mils
Trace spacing = 15 mils

MB U3
DB U2

3

CLK_PCIE_N0

TP111

CLK_PCIE_P0

TP108

CLK_PCIE_REQ0#

TP96

CLK_PCIE_REQ1#

USB Overcurrent

+3V_S5

USB_OC0 #
USB_OC1 #
USB_OC2 #
USB_OC3 #

TP42

R608 *short_4

R647 *short_4

R344 *short_4

RP2

10

9
8
7 4

10K_10P8R

CLK_PCIE_REQ2#

CLK_PCIE_REQ3#

CLK_PCIE_REQ4#

CLK_PCIE_REQ5#

1
2
3

56

CLK_PCIE_LANN[25]
CLK_PCIE_LANP[2 5]

LANWLANVGA

CLK_PCIE_LAN_REQ#[25]

CLK_PCIE_WLANN[28]
CLK_PCIE_WLANP[28]

PCIE_CLKREQ_WLAN#[28]

CLK_PCIE_VGA#[16 ]

CLK_PCIE_VGA[16]

CLK_PEGA_REQ#[16]

3

2

Haswell ULT PCH (CLOCK)

2

+3V

+3V

+3V

+3V

+3V

+3V

CLK_PCIE_REQ0#
CLK_PCIE_REQ1#
CLK_PCIE_REQ2#
CLK_PCIE_REQ3#
CLK_PCIE_REQ5#

TESTLOW_C35
TESTLOW_C34
TESTLOW_AK8
TESTLOW_AL8

CLK_PCIE_REQ4#

HSW_ULT_D DR3L

R341 10K_4
R334 *1K_4

CLOCK

SIGNALS

6 OF 19

R630 10K_4
R311 10K_4
R607 10K_4
R646 10K_4
R629 10K_4

R685 10K_4
R407 10K_4
R218 10K_4
R217 10K_4

U37F

C43

CLKOUT_PCIE_N0

C42

CLKOUT_PCIE_P0

U2

PCIECLKRQ0/GPIO18

B41

CLKOUT_PCIE_N1

A41

CLKOUT_PCIE_P1

Y5

PCIECLKRQ1/GPIO19

C41

CLKOUT_PCIE_N2

B42

CLKOUT_PCIE_P2

AD1

PCIECLKRQ2/GPIO20

B38

CLKOUT_PCIE_N3

C37

CLKOUT_PCIE_P3

N1

PCIECLKRQ3/GPIO21

A39

CLKOUT_PCIE_N4

B39

CLKOUT_PCIE_P4

U5

PCIECLKRQ4/GPIO22

B37

CLKOUT_PCIE_N5

A37

CLKOUT_PCIE_P5

T2

PCIECLKRQ5/GPIO23

1

XTAL24_IN

XTAL24_OUT

XTAL24_IN

XTAL24_OUT

RSVD
RSVD

DIFFCLK_BIASREF

TESTLOW_C35
TESTLOW_C34
TESTLOW_AK8
TESTLOW_AL8

CLKOUT_LPC_0
CLKOUT_LPC_1

CLKOUT_ITPXDP

CLKOUT_ITPXDP_P

+3V

+3V

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet

R707
1M_4

A25

XTAL24_IN

B25

XTAL24_OUT

K21
M21
C26

ICLK_BIAS

C35

TESTLOW_C35

C34

TESTLOW_C34

AK8

TESTLOW_AK8

AL8

TESTLOW_AL8

AN15

CLK_PCH_PCI3

AP15

CLK_PCH_PCI4

B35
A35

C68

*18p/50V _4

LPT 3/6 (PCIE/USB/CLK )

LPT 3/6 (PCIE/USB/CLK )

LPT 3/6 (PCIE/USB/CLK )

Wednesday, February 11, 2015

Wednesday, February 11, 2015

Wednesday, February 11, 2015

C539 12p/50V_4

Y3
24MHz

2 4

1 3

C541 12p/50V_4

R382 3.01K/F_4

R247 TPM@22_4
R248 22_4
R246 22_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

1

*18p/50V _4

C486

+V1.05S_AXCK_L CPLL

PCLK_TPM [27]
CLK_PCI_LPC [28]
CLK_PCI_EC [31]

CLK_PCIE_XDPN [13]
CLK_PCIE_XDPP [13]

PCLK_TPMCLK_PCI_LPCCLK_PCI_EC

C86

*18p/50V _4

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

of

944

944

944

3A

3A

3A

5

4

3

2

1

Haswell ULT PCH (GPIO,CPU/MISC,NCTF)

LowHigh

GPIO8

Touch panel No touch panel

TP36
TP72
TP31
TP21

TP30
TP39

BOARD_ID0
GPIO8
LAN_DISABLE#
GPIO15
SKU_ID0
DGPU_PWROK
GPIO24
WK_GPIO27
GPIO28
GPIO26

GPIO56
GPIO57
GPIO58
GPIO59
GPIO44
GPIO47
DGPU_HOLD_RST#
DGPU_PWR_EN
DGPU_PW_CTRL#
MODPHY _EN
GPIO13
GPIO14
GPIO25
GPIO45
ACCEL_INTA

GPIO9
GPIO10
DEVSLP0
BOARD_ID3
DEVSLP1
SKU_ID1
SPKR

D D

C C

GPIO8[23]

GPIO15[8]

DGPU_PWROK[18]

DGPU_HOLD_RST#[16]

DGPU_PWR_EN[39]

MODPHY _EN[34]

ACCEL_INTA[29]

DEVSLP0[27]

SPKR[8,26]

Board ID

R642 SR@10K_4

R325 GS@10K_4

B B

R645 NAC@10K_4

R687 NTPM@10K_4

R656 10K_4

BOARD_ID0

BOARD_ID1

BOARD_ID2

BOARD_ID3

BOARD_ID4

R632 DR@10K_4

R324 NGS@10K_4

R644 AC@10K_4

R684 TPM@10K_4

R655 *10K_4

BOARD_ID1[2]

BOARD_ID2[2]

BOARD_ID4[2]

+3V

P1

AU2

AM7

AD6

Y1

T3
AD5
AN5
AD7
AN3

AG6

AP1
AL4
AT5
AK4
AB6

U4

Y3

P3

Y2
AT3
AH4

AM4
AG5
AG3

AM3
AM2

P2

C4

L2

N5

V2

RAM ID

U37J

BMBUSY/GPIO76
GPIO8
LAN_PHY_PWR_CTRL/GPIO12
GPIO15
GPIO16
GPIO17
GPIO24
GPIO27
GPIO28
GPIO26

GPIO56
GPIO57
GPIO58
GPIO59
GPIO44
GPIO47
GPIO48
GPIO49
GPIO50
HSIOPC/GPIO71
GPIO13
GPIO14
GPIO25
GPIO45
GPIO46

GPIO9
GPIO10
DEVSLP0/GPIO33
SDIO_POWER_EN/GPIO70
DEVSLP1/GPIO38
DEVSLP2/GPIO39
SPKR/GPIO81

SKU ID

UMA Only

dGPU Only

Switchable
(Mux)

Optimize
(Muxless)

R624 IV@10K_4

R331 IV@10K_4

Low

BOARD_ID0

BOARD_ID1

A A

(Default)

BOARD_ID2

BOARD_ID3

BOARD_ID4

No TPM

Non-Dolly
(Default)

5

High

Dual rank SKUsingle rank SKU

ReserveReserved

IOACNo IOAC

TPM

Dolly

HSW_ULT_DDR3L

+3V

+3V_S5

+3V_S5
+3V
+3V
+3V_S5
DSW
+3V_S5
+3V_S5

+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V
+3V
+3V

+3V_S5
+3V_S5
DSW
+3V_S5
+3V_S5

+3V_S5
+3V_S5

SKU_ID1 SKU_ID0 VGA H/W

0

0

1

1

+3V

GPIO

+3V

+3V
+3V
+3V
+3V

SKU_ID0

SKU_ID1

0

1

0

1

4

+3V_S5

10 OF 19

Signal

UMA

GPU

UMA+GPU dGPU/SG UMA boot

UMA

+3V

CPU/
MISC

+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V

UART0_RTS/GPIO93

SERIAL IO

+3V

UART0_CTS/GPIO94

+3V
+3V
+3V

UART1_RST/GPIO2

+3V

UART1_CTS/GPIO3

+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V

R623 EV@10K_4

R330 EV@10K_4

Setup
Menu

Hidden

UMA boot

Hidden

GPU boot

UMA/SG

UMA boot

THRMTRIP

RCIN/GPIO82

SERIRQ

PCH_OPI_RCOMP

RSVD
RSVD

GSPI0_CS/GPIO83

GSPI0_CLK/GPIO84
GSPI0_MISO/GPIO85
GSPI0_MOSI/GPIO86

GSPI1_CS/GPIO87

GSPI1_CLK/GPIO88
GSPI1_MISO/GPIO89

GSPI_MOSI/GPIO90
UART0_RXD/GPIO91
UART0_TXD/GPIO92

UART1_RXD/GPIO0

UART1_TXD/GPIO1

I2C0 _SDA/G PIO4
I2C0 _SCL /GPIO5
I2C1 _SDA/G PIO6
I2C1 _SCL /GPIO7

SDIO_CLK/GPIO64

SDIO_CMD/GPIO65

SDIO_D0/GPIO66
SDIO_D1/GPIO67
SDIO_D2/GPIO68
SDIO_D3/GPIO69

+3V

D60

THRMTRIP#

V4

SIO_RCIN#

T4

IRQ_SERIR Q

AW15

OPI_COMP2

TP_INT_PCH
GPIO84
GPIO85
GPIO86
GPIO87
GPIO88
GPIO89
GPIO90
GPIO91
GPIO92
GPIO93
GPIO94
SIO_EXT_SMI#
SIO_EXT_SCI#
DGPU_EVENT#
GC6_FB_EN
I2C0_SDA_ GPIO4
I2C0_SCL _GPIO5
I2C1_SDA_ GPIO6
I2C1_SCL _GPIO7
PCH_ODD_EN
GPIO65
GPIO66
GPIO67
GPIO68
GPIO69

R547 49.9/F_4

AF20
AB21

R6
L6
N6
L8
R7
L5
N7
K2
J1
K3
J2
G1
K4
G2
J3
J4
F2
F3
G4
F1
E3
F4
D3
E4
C3
E2

CPU thermal trip

IMVP_PWR GD_3V

+1.05V_VCCST

THRMTRIP#

IMVP_PWR GD[5,36]

3

TP_INT_PCH [23]

SIO_EXT_SMI# [31]
SIO_EXT_SCI# [31]

DGPU_EVENT# [19]

GC6_FB_EN [17,19]
I2C0_SDA_ GPIO4 [ 29]
I2C0_SCL _GPIO5 [ 29]
I2C1_SDA_ GPIO6 [ 23]
I2C1_SCL _GPIO7 [ 23]

PCH_ODD_EN [27]

+1.05V_VCCST

3

2

1

R281

2

1K_4

1 3

Q21 MMBT3904-7-F

U18

NC1VCC

2

A

GND3Y

74AUP1G07GW

SIO_RCIN# [31]
IRQ_SERIR Q [27,31 ]

GPIO86 [8]

GPIO66 [8]

GPU GC6 2.0 function use
GPIO2/3.

Q22

FDV301N

R292
1K_4

+1.05V_VCCST

5

C255

0.1u/10V_4

4

SYS_SHDN# [33,37]

+3V

12

R301
10K_4

IMVP_PWR GD_3V [7]

2

PCH GPIO PU/PD

IRQ_SERIR Q
DEVSLP0
DEVSLP1
SIO_RCIN#
SIO_EXT_SMI#
SIO_EXT_SCI#

GPIO85
GPIO87
GPIO88
GPIO89
GPIO90
GPIO91
GPIO92
GPIO93
GPIO94

R680 *10K_4

R621 *100K_4

R671 *10K_4

high UMA Only

low

R634 EV@100K_4

PCH_ODD_EN
GPIO65
TP_INT_PCH
GPIO84
I2C0_SDA_ GPIO4
I2C0_SCL _GPIO5
GPIO67
GPIO68
GPIO69
DGPU_PWR_EN
I2C1_SDA_ GPIO6
I2C1_SCL _GPIO7
DGPU_HOLD_RST#
GC6_FB_EN

1A-1 20131015 For GC6 NV DG GC6_FB_EN PD.

1A-8 20131022 Change GPIO83/84 GPU GC6 pin

to GPIO2/3.

1A-12 20131029 Change GPIO45 to PU S5,

duble GPIO58 one is GPIO56.

GPU power is control by PCH
GPIO (Discrete, SG or Optimize)

DGPU_PW_CTRL#
DGPU_PWROK

DGPU_PWROK PD on GPU side

LAN_DISABLE#

GPIO8
ACCEL_INTA
GPIO24
GPIO28
GPIO47
GPIO57
GPIO56
GPIO59
GPIO26
GPIO58
GPIO44
GPIO13
GPIO14
GPIO9
GPIO10
GPIO45

GPIO25

WK_GPIO27

1B-7 20131220 Change +3VPCU to +3V_S5

GPIO27 : If not used then use

8.2-kΩ to 10-kΩ pull-down to GND.

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

LPT 4/6 (GPIO/MISC)

LPT 4/6 (GPIO/MISC)

LPT 4/6 (GPIO/MISC)

Wednesday, February 11, 2015

Wednesday, February 11, 2015

Wednesday, February 11, 2015

R643 10K_4
R641 *10K_4
R654 *10K_4
R627 10K_4
R342 10K_4
R668 10K_4

R336 10K_4
R326 10K_4
R348 10K_4
R329 10K_4
R660 10K_4
R661 10K_4
R337 10K_4
R670 10K_4
R669 10K_4
R679 10K_4
R673 10K_4
R322 10K_4
R352 10K_4
R674 2.2K_4
R675 2.2K_4
R677 10K_4
R683 10K_4
R678 10K_4
R620 *10K_4
R349 2.2K_4
R350 2.2K_4
R347 10K_4
R667 *10K_4

R633 IV@1K_4

R321 *10K_4

R224 10K_4

R243 10K_4
R303 *10K_4
R315 10K_4
R609 10K_4
R617 10K_4
R588 10K_4
R310 10K_4
R226 10K_4
R262 10K_4
R288 10K_4
R599 10K_4
R582 10K_4
R302 10K_4
R261 10K_4
R272 10K_4
R309 10K_4
R275 10K_4
R244 *10K_4

R278 *10K_4
R251 *10K_4
R245 10K_4

non deep sx

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

+3V_S5

+3VPCU

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

10 44

10 44

10 44

1

+3V

+3V

3A

3A

3A

5

+1.05V_S5

+1.05V_DCPSUS2

R565 *0_6

+3VPCU

R566 *Short_6

+3V_S5

R380 *short_8

C242 1u/6.3V_4

+1.05V_MODPHY

1.741A

C284
*1u/6.3V_4

R377 *0_6

C278

10u/6.3V_6

C494

1u/6.3V_4

+3VCC_S5

10mA

1u/6.3V_4

0.114A

41mA

C274
22u/6.3V_8

63mA

+V1.05S_AIDLE

C271

+1.05V

+1.05V

25mA

C238
1u/6.3V_4

R397 *short_8

Deep Sx

D D

R286 *0_4

+1.05V_S5

Non Deep Sx

+3V

C C

+1.05V

WW15 4/10 Intel VCCDSW3
G3 can't boot issue.

C492

+PCH_VCCDSW+VCCPDSW

0.47u/25V_6

PCH VCCHSIO Power

B B

1A-1 2013/10/11 del LDO change to MOS.

+1.05V_MODPHY +V1.05S_AUSB3PLL +1.05V_MODPHY +V1.05S_ASATA3PLL

A A

L27 2.2uH/210mA_8

C542

C543

47u/6.3V_8

5

47u/6.3V_8

C524
1u/6.3V_4

2013/10/31 PN change to H=0.85.L17 H=0.9

4

C268 *1u/6.3V_4
C265 1u/6.3V_4
C262 1u/6.3V_4

+V1.05S_AUSB3PLL
+V1.05S_ASATA3PLL

+V1.05S_APLLOPI

+1.05V_DCPSUS3

+V3.3DX_1.5DX_1.8DX_AUDIO

C197 22u/6.3V_8

+3VCC_S5

+VCCPDSW
+V3.3S_VCCPCORE

+V1.05S_AXCK_DCB

+V1.05S_AXCK_LCPLL

C276 1u/6.3V_4

L26 2.2uH/120mA_6

C534

47u/4V_8

4

1.838A

Haswell ULT PCH (Power)

LPT LP POWER

C529
1u/6.3V_4

GPIO/LPC

HSW_ULT _DD R3L

HSIO

OPI

USB3

HDA

VRM

13 OF 19

VCCAPLL power

PCH HDA Power

AA21

AH14

AH13

AH10

AE20
AE21

L10

B18
B11

Y20

W21

J13

AC9
AA9

J18
K19
A20

J17
R21

T21
K18
M20
V21

K9

M9

N8
P9

V8

W9

42mA41mA

C540
47u/4V_8

U37M

VCCHSIO
VCCHSIO
VCCHSIO
VCC1_05
VCC1_05
VCCUSB3PLL
VCCSATA3PLL

RSVD
VCCAPLL
VCCAPLL

DCPSUS3

VCCHDA

DCPSUS2

VCCSUS3_3
VCCSUS3_3
VCCDSW3_3
VCC3_3
VCC3_3

VCCCLK
VCCCLK
VCCACLKPLL
VCCCLK
VCCCLK
VCCCLK
RSVD
RSVD
RSVD
VCCSUS3_3
VCCSUS3_3

3

RTC

SPI

DCPSUSBYP

CORE

DCPSUSBYP

THERMAL SENSOR

SERIAL IO

SUS OSCILLATOR

USB2

L21 2.2uH/210mA_8

*47u/6.3V_8

+V3.3DX_1.5DX_1.8DX_AUDIO

+3V_S5

R222 *Short_6

3

AH11

VCCSUS3_3

AG10

VCCRTC

AE7

DCPRTC

Y8

VCCSPI

AG14

VCCASW

AG13

VCCASW

J11

VCC1_05

H11

VCC1_05

H15

VCC1_05

AE8

VCC1_05

AF22

VCC1_05

AG19
AG20
AE9

VCCASW

AF9

VCCASW

AG8

VCCASW

AD10

DCPSUS1

AD8

DCPSUS1

J15

VCCTS1_5

K14

VCC3_3

K16

VCC3_3

U8

VCCSDIO

T9

VCCSDIO

AB8

DCPSUS4

AC20

RSVD

AG16

VCC1_05

AG17

VCC1_05

C303

11mA

C199

0.1u/10V_4

Place close to ball

+VCCRTCEXT

+V3.3M_PSPI

PCH_VCC_1_1_21

+V1.05S_CORE_PCH

+1.05V_DCPSUS1

+V1.05S_APLLOPI+1.05V

57mA

C293
*47u/6.3V_8

18mA

+PCH_VCCDSW

+V1.05M_VCCASW

109mA

R290 *0_4

C241
1u/6.3V_4

+V3.3S_VCCSDIO

+1.05V_DCPSUS4

+V1.05S_VCCUSBCORE

C282
1u/6.3V_4

2

R335 *Short_6

+V1.05M_VCCASW

+1.05V_S5

3mA

41mA

17mA

R300 *0_ 4

C244
1u/6.3V_4

2

C243
1u/6.3V_4

C184

0.1u/10V_4

C257

0.1u/10V_4

+1.05V
+1.05V

C233
1u/6.3V_4

658mA

C248
1u/6.3V_4

+V1.5S_VCCATS

+V3.3S_VCCPTS

+1.05V_S5

R291 *short_8

C231
1u/6.3V_4

+1.05V +V1.05S_AXCK_DCB

+1.05V +V1.05S_AXCK_LCPLL

L19 2.2uH/210mA_8

+3VCC_S5

1mA

C232
1u/6.3V_4

R314 *short_8

C247
22u/6.3V_8

L20 2.2uH/210mA_8

C487

0.1u/10V_4

R320 *Short_6

R318 *0_6

C258

0.1u/10V_4

2.063A

C239
10u/6.3V_6

C230
1u/6.3V_4

R378 *Short_6

R379 *Short_6

C272
1u/6.3V_4

C266
1u/6.3V_4

C311

47u/6.3V_8

+3V_RTC

C183
1u/6.3V_4

+3V_S5

+3V

R299 *short_8

+1.05V

R364 *Short_6

+1.05V

+1.5V

+3V

0.2A

C319
47u/6.3V_8

+1.05V

+3V

31mA

C292

47u/6.3V_8

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Wednesday, February 11, 2015

Date: Sheet of

Wednesday, February 11, 2015

Date: Sheet of

Wednesday, February 11, 2015

C297
47u/6.3V_8

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

LPT 5/6 (POWER)

LPT 5/6 (POWER)

LPT 5/6 (POWER)

1

1

C273
1u/6.3V_4

C288
1u/6.3V_4

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

11 44

11 44

11 44

3A

3A

3A

5

4

3

2

1

Haswell ULT (GND)

HSW_UL T_DD R3L

AA58
AB10
AB20
AB22

AC61
AD21

AD63
AE10

AE58
AF11
AF12
AF14
AF15
AF17
AF18

AG11
AG21
AG23
AG60
AG61
AG62
AG63
AH17
AH19
AH20
AH22
AH24
AH28
AH30
AH32
AH34
AH36
AH38
AH40
AH42
AH44
AH49
AH51
AH53
AH55
AH57

U37N

A11

VSS

A14

VSS

A18

VSS

A24

VSS

A28

VSS

A32

VSS

A36

VSS

A40

VSS

A44

VSS

A48

VSS

A52

VSS

A56

VSS

AA1

VSS
VSS
VSS
VSS
VSS

AB7

VSS
VSS
VSS

AD3

VSS
VSS
VSS

AE5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AG1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AJ13

VSS

AJ14

VSS

AJ23

VSS

AJ25

VSS

AJ27

VSS

AJ29

VSS

14 OF 19

AJ35

VSS

AJ39

VSS

AJ41

VSS

AJ43

VSS

AJ45

VSS

AJ47

VSS

AJ50

VSS

AJ52

VSS

AJ54

VSS

AJ56

VSS

AJ58

VSS

AJ60

VSS

AJ63

VSS

AK23

VSS

AK3

VSS

AK52

VSS

AL10

VSS

AL13

VSS

AL17

VSS

AL20

VSS

AL22

VSS

AL23

VSS

AL26

VSS

AL29

VSS

AL31

VSS

AL33

VSS

AL36

VSS

AL39

VSS

AL40

VSS

AL45

VSS

AL46

VSS

AL51

VSS

AL52

VSS

AL54

VSS

AL57

VSS

AL60

VSS

AL61

VSS

AM1

VSS

AM17

VSS

AM23

VSS

AM31

VSS

AM52

VSS

AN17

VSS

AN23

VSS

AN31

VSS

AN32

VSS

AN35

VSS

AN36

VSS

AN39

VSS

AN40

VSS

AN42

VSS

AN43

VSS

AN45

VSS

AN46

VSS

AN48

VSS

AN49

VSS

AN51

VSS

AN52

VSS

AN60

VSS

AN63

VSS

AN7

VSS

AP10

VSS

AP17

VSS

AP20

VSS

D D

C C

B B

AP22
AP23
AP26
AP29

AP31
AP38
AP39
AP48
AP52
AP54
AP57
AR11
AR15
AR17
AR23
AR31
AR33
AR39
AR43
AR49

AR52

AU16
AU18
AU20
AU22
AU24
AU26
AU28
AU30
AU33
AU51
AU53
AU55
AU57
AU59
AV14
AV16
AV20
AV24
AV28
AV33
AV34
AV36
AV39
AV41
AV43
AV46
AV49
AV51
AV55

AT13
AT35
AT37
AT40
AT42
AT43
AT46
AT49
AT61
AT62
AT63

HSW_UL T_DD R3L

U37O

VSS
VSS
VSS
VSS

AP3

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AR5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AU1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

15 OF 19

AV59

VSS

AV8

VSS

AW16

VSS

AW24

VSS

AW33

VSS

AW35

VSS

AW37

VSS

AW4

VSS

AW40

VSS

AW42

VSS

AW44

VSS

AW47

VSS

AW50

VSS

AW51

VSS

AW59

VSS

AW60

VSS

AY11

VSS

AY16

VSS

AY18

VSS

AY22

VSS

AY24

VSS

AY26

VSS

AY30

VSS

AY33

VSS

AY4

VSS

AY51

VSS

AY53

VSS

AY57

VSS

AY59

VSS

AY6

VSS

B20

VSS

B24

VSS

B26

VSS

B28

VSS

B32

VSS

B36

VSS

B4

VSS

B40

VSS

B44

VSS

B48

VSS

B52

VSS

B56

VSS

B60

VSS

C11

VSS

C14

VSS

C18

VSS

C20

VSS

C25

VSS

C27

VSS

C38

VSS

C39

VSS

C57

VSS

D12

VSS

D14

VSS

D18

VSS

D2

VSS

D21

VSS

D23

VSS

D25

VSS

D26

VSS

D27

VSS

D29

VSS

D30

VSS

D31

VSS

D33
D34
D35
D37
D38
D39
D41
D42
D43
D45
D46
D47
D49

D50
D51
D53
D54
D55
D57
D59
D62

E11
E17
F20
F26
F30
F34
F38
F42
F46
F50
F54
F58
F61
G18
G22

H13

HSW_UL T_DD R3L

U37P

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

D5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

D8

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

G3

VSS

G5

VSS

G6

VSS

G8

VSS
VSS

16 OF 19

VSS_SENSE

H17

VSS

H57

VSS

J10

VSS

J22

VSS

J59

VSS

J63

VSS

K1

VSS

K12

VSS

L13

VSS

L15

VSS

L17

VSS

L18

VSS

L20

VSS

L58

VSS

L61

VSS

L7

VSS

M22

VSS

N10

VSS

N3

VSS

P59

VSS

P63

VSS

R10

VSS

R22

VSS

R8

VSS

T1

VSS

T58

VSS

U20

VSS

U22

VSS

U61

VSS

U9

VSS

V10

VSS

V3

VSS

V7

VSS

W20

VSS

W22

VSS

Y10

VSS

Y59

VSS

Y63

VSS

V58

VSS

AH46

VSS

V23

VSS

E62

VSS_SENS E_R

AH16

VSS

U37R

AT2

RSVD

AU44

RSVD

AV44

RSVD

D15

RSVD

F22

RSVD

H22

RSVD

J21

RSVD

R672 *short_4

R665 100/F_4

HSW_UL T_DD R3L

18 OF 19

VSS_SENS E [36]

RSVD
RSVD
RSVD
RSVD

RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD

N23
R23
T23
U10

AL1
AM11
AP7
AU10
AU15
AW14
AY14

U37Q

DC_TEST_AY2_AW2
DC_TEST_AY3_AW3
TP_DC_TEST_AY60

TP66

DC_TEST_AY61_AW61
DC_TEST_AY62_AW62

A A

5

TP112

TP_DC_TEST_B2
DC_TEST_A3_B3
DC_TEST_A61_B61
DC_TEST_B62_B63

DC_TEST_C1_C2

AY2

DAISY_CHAIN_NCTF_AY2

AY3

DAISY_CHAIN_NCTF_AY3

AY60

DAISY_CHAIN_NCTF_AY60

AY61

DAISY_CHAIN_NCTF_AY61

AY62

DAISY_CHAIN_NCTF_AY62

B2

DAISY_CHAIN_NCTF_B2

B3

DAISY_CHAIN_NCTF_B3

B61

DAISY_CHAIN_NCTF_B61

B62

DAISY_CHAIN_NCTF_B62

B63

DAISY_CHAIN_NCTF_B63

C1

DAISY_CHAIN_NCTF_C1

C2

DAISY_CHAIN_NCTF_C2

4

HSW_UL T_DD R3L

17 OF 19

DAISY_CHAIN_NCTF_A3
DAISY_CHAIN_NCTF_A4

DAISY_CHAIN_NCTF_A60
DAISY_CHAIN_NCTF_A61
DAISY_CHAIN_NCTF_A62

DAISY_CHAIN_NCTF_AV1
DAISY_CHAIN_NCTF_AW1
DAISY_CHAIN_NCTF_AW2
DAISY_CHAIN_NCTF_AW3

DAISY_CHAIN_NCTF_AW61
DAISY_CHAIN_NCTF_AW62
DAISY_CHAIN_NCTF_AW63

3

A3

DC_TEST_A3_B3

A4

TP_DC_TEST_A4

A60

TP_DC_TEST_A60

A61

DC_TEST_A61_B61

A62

TP_DC_TEST_A62

AV1

TP_DC_TEST_AV1

AW1

TP_DC_TEST_AW 1

AW2

DC_TEST_AY2_AW2

AW3

DC_TEST_AY3_AW3

AW61

DC_TEST_AY61_AW61

AW62

DC_TEST_AY62_AW62

AW63

TP_DC_TEST_AW 63

TP113

TP110

TP107
TP69
TP71

TP67

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Wednesday, February 11, 2015

Wednesday, February 11, 2015

Wednesday, February 11, 2015

Date: Sheet of

2

Date: Sheet of

PROJECT :

LPT 6/6 (GND)

LPT 6/6 (GND)

LPT 6/6 (GND)

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

1

of

12 44

12 44

12 44

3A

3A

3A

5

4

3

2

1

H_SYS_PW ROK_XDP

D D

C C

B B

XDP_DBRESET_N

R274 *1K _4

R613 *1K _4

R137 *0_6

APS

CN2

1

APS1

APS3

APS7

R133 *0_6

R130 *0_4

R132 *0_6
R138 *0_4
R139 *0_4
R142 *0_4

R131 *0_6

R144 *0_4

R146 *0_4

R149 *0_4

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

A A

14

14

15

15

16

16

17

17

18

18

*ACES_88511-180N

5

+3V_S5

+3V

HWPG_1.0 5V_S5[31,34]

SYS_PWROK[7]

APS3

+3VCC_S5

SYS_RESET#

R125 *1K _4

R273 *0_4

R136 *0_6

SUSB# [7,31]

PCH_SLP_S5# [7]
SUSC# [7,31]
PCH_SLP_A# [7]

RTC_RST# [8]

NBSWON# [ 29,31]

SYS_RESET# [7]

4

XDP_PREQ#[4]

XDP_PRDY#[4]

CFG0[6]
CFG1[6]

CFG2[6]
CFG3[6]

XDP_BPM#0[4]
XDP_BPM#1[4]

CFG4[6,8]
CFG5[6]

CFG6[6]
CFG7[6]

PWR_DEBUG[5]

CLK_SDATA[8,14,15,29]

CLK_SCLK[8,14,15,29]
XDP_TCK1[8]
XDP_TCK0[4,8]

APS7APS1

+3VPCU

+3VPCU

VCCST_PWRGD[5]

CFG0
CFG1

CFG2
CFG3

CFG4
CFG5

CFG6
CFG7

VCCST_PWRGD_XDP
NBSWON#

H_SYS_PW ROK_XDP

2

U14

NC1VCC

A

GND3Y

*74AUP1G07GW

3

TP98
TP101

TP33
TP73

TP80
TP78

TP48
TP105

TP81
TP82

TP38

TP64
TP12

TP45
TP27

TP23
TP24
TP76
TP50

5

C198

*0.1u/10V_4

4

TP79
TP75

TP84
TP86

TP34
TP41

TP89
TP90

TP94
TP92

TP93
TP95TP37

TP122
TP127

TP20
TP88

TP14
TP19
TP15
TP18

XDP_TDO[8]

XDP_TMS[8]

XDP_TDI[8]

+1.05V

+3V

12

XDP_TDO

XDP_TDI

XDP_TMS

XDP_TRST_N

R216
*10K_4

NOA_STBP_0
NOA_STBN_0

CFG8
CFG9

CFG10
CFG11

NOA_STBP_1
NOA_STBN_1

CFG12
CFG13

CFG14
CFG15

CK_XDP_P_R
CK_XDP_N_R

XDP_RST_R_N
XDP_DBRESET_N

XDP_TDO
XDP_TRST_N
XDP_TDI
XDP_TMS

+3V

NOA_STBP_0 [6]
NOA_STBN_0 [ 6]

CFG8 [6]
CFG9 [6]

CFG10 [6]
CFG11 [6]

NOA_STBP_1 [6]
NOA_STBN_1 [ 6]

CFG12 [6]
CFG13 [6]

CFG14 [6]
CFG15 [6]

R721 *0_4
R720 *0_4

R225 *1K_4
R616 *0_4

R198 *51_4

C180
*0.1u/10V_4

U13

14

VCC

2

1A

1

1OE

5

2A

4

2OE

9

3A

10

3OE

12

4A

13

4OE

*74CBTLV3126

2

SYS_RESET#

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Wednesday, February 11, 2015

Wednesday, February 11, 2015

Wednesday, February 11, 2015

Date: Sheet of

Date: Sheet of

CLK_PCIE_XDPP [9]
CLK_PCIE_XDPN [9]

PLTRST# [7,16,25,27,28,31]

+1.05V_S5

3

1B

6

2B

8

3B

11

4B

15

DPAD

7

GND

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

CPU/PCH XDP

CPU/PCH XDP

CPU/PCH XDP

XDP_TDO_CPU [4]

XDP_TDI_CPU [4]

XDP_TMS_CPU [4]

XDP_TRST# [4,8]

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

13 44

13 44

13 44

1

3A

3A

3A

of

1

M_A_A[15:0][3]

A A

M_A_BS#0[3]
M_A_BS#1[3]
M_A_BS#2[3]
M_A_CS#0[3]
M_A_CS#1[3]
M_A_CLK0[3]
M_A_CLK0#[3]
M_A_CLK1[3]
M_A_CLK1#[3]
M_A_CKE0[3]
M_A_CKE1[3]
M_A_CAS#[3]
M_A_RAS#[3]

R119 10K_4
R116 10K_4

1A-8

2013/10/23 Change DIMM1_SA0/SA1

B B

to DIMM0_SA0/SA1.

+1.35V_SUS

C78

10u/6.3V_6

+3V

1A-2

Place these Caps near SO-DIMM

C111
10u/6.3V_6

C77
10u/6.3V_6

C106

2.2u/6.3V_6

1

C C

D D

M_A_WE#[3]

CLK_SCLK[8,13,15,29]

CLK_SDATA[8,13,15,29]

M_A_ODT0_DIMM[4]
M_A_ODT1_DIMM[4]

M_A_DQS[7:0][3]

M_A_DQS#[7:0][3]

2013/10/16 Chage net name M_B_DQS#[7:0] to
M_A_DQS#[7:0].

C75

C110

10u/6.3V_6

10u/6.3V_6

C112
10u/6.3V_6

+DDR_VTT_RUN

C81

C101

0.1u/10V_4

1u/6.3V_4

C80

0.1u/10V_4

C113

0.1u/10V_4

C82
1u/6.3V_4

2

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

DIMM0_SA0
DIMM0_SA1

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

C114

0.1u/10V_4

2

C79

0.1u/10V_4

C115

0.1u/10V_4

C103
1u/6.3V_4

98
97
96
95
92
91
90
86
89
85

107

84
83

119

80
78

109
108

79
114
121
101
103
102
104

73

74
115
110
113
197
201
202
200

116
120

11

28

46

63
136
153
170
187

12

29

47

64
137
154
171
188

10

27

45

62
135
152
169
186

JDIM1A

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

ODT0
ODT1

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

PC2100 DDR3 SDRAM SO-DIMM

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

DDR3-DIMM1_H=4.0_STD

+SMDDR_VREF_D IMM

+

C107

C74

330u/2V_7343

0.1u/10V_4

C109

C98

1u/6.3V_4

4.7u/10V_6

3

DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46

(204P)

DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

2.2u/6.3V_6

3

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

+SMDDR_VREF_D Q0

C76

0.1u/10V_4

C84

4.7u/10V_6

C100

2.2u/6.3V_6

C88

4.7u/10V_6

4

M_A_DQ2 [3]
M_A_DQ6 [3]
M_A_DQ7 [3]
M_A_DQ3 [3]
M_A_DQ0 [3]
M_A_DQ1 [3]
M_A_DQ5 [3]
M_A_DQ4 [3]
M_A_DQ9 [3]

M_A_DQ8 [3]
M_A_DQ15 [3]
M_A_DQ11 [3]
M_A_DQ12 [3]
M_A_DQ13 [3]
M_A_DQ14 [3]
M_A_DQ10 [3]
M_A_DQ16 [3]
M_A_DQ17 [3]
M_A_DQ19 [3]
M_A_DQ18 [3]
M_A_DQ21 [3]
M_A_DQ20 [3]
M_A_DQ23 [3]
M_A_DQ22 [3]
M_A_DQ25 [3]
M_A_DQ24 [3]
M_A_DQ31 [3]
M_A_DQ26 [3]
M_A_DQ28 [3]
M_A_DQ29 [3]
M_A_DQ27 [3]
M_A_DQ30 [3]
M_A_DQ33 [3]
M_A_DQ32 [3]
M_A_DQ35 [3]
M_A_DQ34 [3]
M_A_DQ36 [3]
M_A_DQ37 [3]
M_A_DQ39 [3]
M_A_DQ38 [3]
M_A_DQ46 [3]
M_A_DQ44 [3]
M_A_DQ41 [3]
M_A_DQ45 [3]
M_A_DQ40 [3]
M_A_DQ42 [3]
M_A_DQ43 [3]
M_A_DQ47 [3]
M_A_DQ49 [3]
M_A_DQ52 [3]
M_A_DQ54 [3]
M_A_DQ53 [3]
M_A_DQ48 [3]
M_A_DQ55 [3]
M_A_DQ51 [3]
M_A_DQ50 [3]
M_A_DQ56 [3]
M_A_DQ60 [3]
M_A_DQ58 [3]
M_A_DQ62 [3]
M_A_DQ57 [3]
M_A_DQ61 [3]
M_A_DQ63 [3]
M_A_DQ59 [3]

+VREF_CA_CP U

C99

+VREFDQ_SA_ M3

CHA

00

CHB

4

5

DDR3_DRAMRST#[4,15]

R80 *S hort_6

M3 solution

R129 *Short_6

M3 solution

SA0SA1

01

5

R104 *10K_4

+3V

+SMDDR_VREF_D Q0

+SMDDR_VREF_D IMM

R81 2/F_6

C69

0.022u/16V_4

1 2

R89

24.9/F_4

R118 2/F_6

C104

0.022u/16V_4

1 2

R126

24.9/F_4

6

+1.35V_SUS

2.48A

+3V

PM_EXTTS#0

C83 *0.1u/10V_4

+SMDDR_VREF_D Q0

M1 solution

+1.35V_SUS

R90

1.8K/F_4

R79

1.8K/F_4

M1 solution

+1.35V_SUS

R127

1.8K/F_4

R128

1.8K/F_4

6

7

JDIM1B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM1_H=4.0_STD

Vref_CA

+SMDDR_VREF_D IMM

C66
470p/50V_4

Vref_DQ

+SMDDR_VREF_D Q0

C105
470p/50V_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Wednesday, February 11, 2015

Wednesday, February 11, 2015

Wednesday, February 11, 2015

Date: Sheet

44

VSS16

48

VSS17

49

VSS18

54

VSS19

55

VSS20

60

VSS21

61

VSS22

65

VSS23

66

VSS24

71

VSS25

72

VSS26

127

VSS27

128

VSS28

133

VSS29

134

VSS30

138

VSS31

139

VSS32

144

VSS33

145

VSS34

150

VSS35

151

VSS36

155

VSS37

156

VSS38

161

VSS39

162

VSS40

167

VSS41

168

VSS42

172

VSS43

173

VSS44

178

VSS45

179

VSS46

184

VSS47

185

VSS48

189

VSS49

190

VSS50

195

VSS51

196

VSS52

(204P)

PC2100 DDR3 SDRAM SO-DIMM

203

VTT1
VTT2

GND
GND

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

DDR3 MEMORY SO-DIMM A

DDR3 MEMORY SO-DIMM A

DDR3 MEMORY SO-DIMM A

7

+DDR_VTT_RUN

204

205
206

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

8

of

14 44

14 44

14 44

8

3A

3A

3A

5

M_B_A[1 5:0][3]

D D

M_B_BS# 0[3]
M_B_BS# 1[3]
M_B_BS# 2[3]
M_B_CS# 0[3]
M_B_CS# 1[3]
M_B_CLK 0[3]
M_B_CLK 0#[3]
M_B_CLK 1[3]
M_B_CLK 1#[3]
M_B_CKE 0[3]
M_B_CKE 1[3]
M_B_CAS #[3]
M_B_RAS #[3]

CLK_SDATA[8,13,14,29]

C122
10u/6.3V_6

C149

0.1u/10V_4

CLK_SCLK[8,13,14,29]

M_B_OD T0_DI MM[4]
M_B_OD T1_DI MM[4]

M_B_DQ S[7:0][3]

M_B_DQ S#[7:0 ][3]

C125
10u/6.3V_6

+DDR_VTT_RUN

5

M_B_W E#[3]

C124
10u/6.3V_6

C116
1u/6.3V_4

R134 10K_4
R157 10K_4

+3V

C C

B B

1A-2

2013/10/16 Swap M_B_DQS2/M_B_DQS3 and swap
M_B_DQS#2/M_B_DQS#3.

+1.35V_SUS

C137

10u/6.3V_6

A A

Place these Caps near SO-DIMM

C138
10u/6.3V_6

C136
10u/6.3V_6

+3V

C150

2.2u/6.3V_6

C134

0.1u/10V_4

C133

0.1u/10V_4

C118
1u/6.3V_4

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

DIMM1_SA0
DIMM1_SA1

M_B_DQ S2
M_B_DQ S0
M_B_DQ S1
M_B_DQ S3
M_B_DQ S4
M_B_DQ S5
M_B_DQ S6
M_B_DQ S7
M_B_DQ S#2
M_B_DQ S#0
M_B_DQ S#1
M_B_DQ S#3
M_B_DQ S#4
M_B_DQ S#5
M_B_DQ S#6
M_B_DQ S#7

C135

0.1u/10V_4

C119

0.1u/10V_4

C121

0.1u/10V_4

C143
1u/6.3V_4

107

119

109
108

114
121
101
103
102
104

115
110
113
197
201
202
200

116
120

136
153
170
187

137
154
171
188

135
152
169
186

JDIM2A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9
A10/AP

84

A11

83

A12/BC#
A13

80

A14

78

A15

BA0
BA1

79

BA2
S0#
S1#
CK0
CK0#
CK1
CK1#

73

CKE0

74

CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

ODT0
ODT1

11

DM0

28

DM1

46

DM2

63

DM3
DM4
DM5
DM6
DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3
DQS4
DQS5
DQS6
DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

DDR3-DIMM1_H=4.0_RVS

+SMDDR_VREF_DIMM

+

C108
330u/2V_7343

0.1u/10V_4

C142
1u/6.3V_4

4

PC2100 DDR3 SDRAM SO-DIMM

C120

4.7u/10V_6

4

C147

(204P)

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

C123

2.2u/6.3V_6

C126

4.7u/10V_6

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

+SMDDR_VREF_DQ1

C146

0.1u/10V_4

2.2u/6.3V_6

C128

4.7u/10V_6

C145

M_B_DQ 23 [3]
M_B_DQ 22 [3]
M_B_DQ 19 [3]
M_B_DQ 20 [3]
M_B_DQ 16 [3]
M_B_DQ 17 [3]
M_B_DQ 21 [3]
M_B_DQ 18 [3]

M_B_DQ 4 [3]
M_B_DQ 2 [3]
M_B_DQ 7 [3]
M_B_DQ 6 [3]
M_B_DQ 3 [3]
M_B_DQ 5 [3]
M_B_DQ 1 [3]

M_B_DQ 0 [3]
M_B_DQ 13 [3]
M_B_DQ 12 [3]
M_B_DQ 11 [3]
M_B_DQ 10 [3]

M_B_DQ 9 [3]

M_B_DQ 8 [3]
M_B_DQ 15 [3]
M_B_DQ 14 [3]
M_B_DQ 30 [3]
M_B_DQ 27 [3]
M_B_DQ 29 [3]
M_B_DQ 28 [3]
M_B_DQ 31 [3]
M_B_DQ 26 [3]
M_B_DQ 24 [3]
M_B_DQ 25 [3]
M_B_DQ 36 [3]
M_B_DQ 37 [3]
M_B_DQ 34 [3]
M_B_DQ 38 [3]
M_B_DQ 33 [3]
M_B_DQ 32 [3]
M_B_DQ 35 [3]
M_B_DQ 39 [3]
M_B_DQ 42 [3]
M_B_DQ 43 [3]
M_B_DQ 45 [3]
M_B_DQ 47 [3]
M_B_DQ 41 [3]
M_B_DQ 40 [3]
M_B_DQ 44 [3]
M_B_DQ 46 [3]
M_B_DQ 55 [3]
M_B_DQ 51 [3]
M_B_DQ 48 [3]
M_B_DQ 54 [3]
M_B_DQ 52 [3]
M_B_DQ 49 [3]
M_B_DQ 53 [3]
M_B_DQ 50 [3]
M_B_DQ 56 [3]
M_B_DQ 61 [3]
M_B_DQ 58 [3]
M_B_DQ 60 [3]
M_B_DQ 57 [3]
M_B_DQ 62 [3]
M_B_DQ 59 [3]
M_B_DQ 63 [3]

CHA

CHB

3

+VREFDQ_SB_M3

M3 solution

00

3

SA0SA1

01

DDR3_DRAMRST#[4,14]

R158 *Short_6

R135 *10K_4

+3V

+SMDDR_VREF_DQ1

+SMDDR_VREF_DIMM

R156 2/F_6

C140

0.022u/16V_4

1 2

R151

24.9/F_4

2

+1.35V_SUS

2.48A

+3V

PM_EXTTS#1

C127 *0.1u/10V_4

+SMDDR_VREF_DQ1

M1 solution

+1.35V_SUS

R154

1.8K/F_4

R155

1.8K/F_4

2

1

JDIM2B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_D Q

126

VREF_C A

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM1_H=4.0_RVS

44

VSS16

48

VSS17

49

VSS18

54

VSS19

55

VSS20

60

VSS21

61

VSS22

65

VSS23

66

VSS24

71

VSS25

72

VSS26

127

VSS27

128

VSS28

133

VSS29

134

VSS30

138

VSS31

139

VSS32

144

VSS33

145

VSS34

150

VSS35

151

VSS36

155

VSS37

156

VSS38

161

VSS39

162

VSS40

167

VSS41

168

VSS42

172

VSS43

173

VSS44

178

VSS45

179

VSS46

184

VSS47

185

VSS48

189

VSS49

190

VSS50

195

VSS51

196

VSS52

(204P)

PC2100 DDR3 SDRAM SO-DIMM

VTT1
VTT2

GND
GND

203
204

205
206

+DDR_VTT_RUN

Vref_DQ

+SMDDR_VREF_DQ1

C144
470p/50V_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

DDRIII Memory SO-DIMM B

DDRIII Memory SO-DIMM B

DDRIII Memory SO-DIMM B

Date: Sheet

Date: Sheet

Date: Sheet

PROJECT :

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

15 44Wednesday, February 11, 2015

15 44Wednesday, February 11, 2015

15 44Wednesday, February 11, 2015

1

of

of

of

3A

3A

3A

1

2

3

4

5

6

7

8

+1.05V_GFX

Near GPU

C588 EV @22U/6.3VS_6
C379 EV @22U/6.3VS_6
C373 EV @10U/6.3VS_6
C340 EV @10U/6.3VS_6
C388 EV @4.7u/10V_6

A A

C354 EV @1U/6.3V_4
C361 EV @1U/6.3V_4

Under GPU

PEX_IOVDD + PEX_IOVDDQ = 1.042A

+1.05V_GFX

PEX_PLL_HVDD +
PEX_SVDD_3V3 = 143mA

B B

C C

R414 * Short_6

+1.05V_GFX

D D

C314 E [email protected]/10V_4
C309 [email protected] u/10V_6

C315 EV@4 .7u/10V_6

VGA_VCCSENSE[38]

VGA_VSSSENSE[38]

R735 * 200/F_4

CX300T30001 Change to 0ohm

Near GPU

C371[email protected]/10V_6
C355EV@1U/6.3V_4

C360[email protected]/10V_4

Under GPU

PEX_PLLVDD = 130mA

EV@10K/F_4

1

C387 EV @22U/6.3VS_6
C364 * 22U/6.3VS_6
C386 * 10U/6.3VS_6
C359 EV @10U/6.3VS_6
C590 EV @4.7u/10V_6

Near GPU

Under GPU

C325 EV @1U/6.3V_4

+3V_GFX

Near GPU

PEX_TSTCLK
PEX_TSTCLK#

PEX_PLLVDD

R408

TESTMODE

R736[email protected]/F _4

PEX_TERMP

AA22
AB23
AC24
AD25
AE26
AE27

AA10
AA12
AA13
AA16
AA18
AA19
AA20
AA21
AB22
AC23
AD24
AE25
AF26
AF27

AA8
AA9

AB8

AF22
AE22

AA14
AA15

AD9

AF25

F2

F1

2

U39A

PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD

PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ

PEX_PLL_HVDD
PEX_PLL_HVDD

PEX_SVDD_3V3

VDD_SENSE

GND_SENSE

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT

PEX_PLLVDD
PEX_PLLVDD

TESTMODE

PEX_TERMP

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

1/14 PCI_EXPRESS

PEX_WAKE

PEX_RST

PEX_CLKREQ

PEX_REFCLK
PEX_REFCLK

PEX_TX0
PEX_TX0

PEX_RX0
PEX_RX0

PEX_TX1
PEX_TX1

PEX_RX1
PEX_RX1

PEX_TX2
PEX_TX2

PEX_RX2
PEX_RX2

PEX_TX3
PEX_TX3

PEX_RX3
PEX_RX3

PEX_TX4
PEX_TX4

PEX_RX4
PEX_RX4

PEX_TX5
PEX_TX5

PEX_RX5
PEX_RX5

PEX_TX6
PEX_TX6

PEX_RX6
PEX_RX6

PEX_TX7
PEX_TX7

PEX_RX7
PEX_RX7

PEX_TX8
PEX_TX8

PEX_RX8
PEX_RX8

PEX_TX9
PEX_TX9

PEX_RX9
PEX_RX9

PEX_TX10
PEX_TX10

PEX_RX10
PEX_RX10

PEX_TX11
PEX_TX11

PEX_RX11
PEX_RX11

PEX_TX12
PEX_TX12

PEX_RX12
PEX_RX12

PEX_TX13
PEX_TX13

PEX_RX13
PEX_RX13

PEX_TX14
PEX_TX14

PEX_RX14
PEX_RX14

PEX_TX15
PEX_TX15

PEX_RX15
PEX_RX15

GF119GF117

COMMONbga595-nvidia-n13p-gv2-s-a2

3

AB6

AC7

AC6

AE8
AD8

AC9
AB9

AG6
AG7

AB10
AC10

AF7
AE7

AD11
AC11

AE9
AF9

AC12
AB12

AG9
AG10

AB13
AC13

AF10
AE10

AD14
AC14

AE12
AF12

AC15
AB15

AG12
AG13

AB16
AC16

AF13
AE13

AD17
AC17

AE15
AF15

AC18
AB18

AG15
AG16

AB19
AC19

AF16
AE16

AD20
AC20

AE18
AF18

AC21
AB21

AG18
AG19

AD23
AE23

AF19
AE19

AF24
AE24

AE21
AF21

AG24
AG25

AG21
AG22

VGA_RST#

PEX_CLKREQ#

PEG_RXP0_C
PEG_RXN0_C

PEG_RXP1_C
PEG_RXN1_C

PEG_RXP2_C
PEG_RXN2_C

PEG_RXP3_C
PEG_RXN3_C

C310 * 0.1U/10V_4

R400 *short_4

R395 E V@10K/F_4

C557 EV @0.22U/10V_4

C566 EV @0.22U/10V_4
C564 EV @0.22U/10V_4

C567 EV @0.22U/10V_4
C583 EV @0.22U/10V_4

C584 EV @0.22U/10V_4
C586 EV @0.22U/10V_4

PLTRST#[7,13,25,27,28,31]

DGPU_HOLD_RST#[10]

GPU_PEX_RST_HOLD#[19 ]

PEX_CLKREQ#

EV@MC74VHC1G08DFT2G

SYS_PEX_RST_MON#

4

PEGX_RST# [19]

+3V_GFX

CLK_PCIE_VGA [9]
CLK_PCIE_VGA# [9]

PEG_RX0 [9]
PEG_RX#0 [9]

PEG_TX0 [9]
PEG_TX#0 [9]

PEG_RX1 [9]
PEG_RX#1 [9]

PEG_TX1 [9]
PEG_TX#1 [9]

PEG_RX2 [9]
PEG_RX#2 [9]

PEG_TX2 [9]
PEG_TX#2 [9]

PEG_RX3 [9]
PEG_RX#3 [9]

PEG_TX3 [9]
PEG_TX#3 [9]

U19

2

1

GPU_PEX_RST_HOLD#

+3V

C264
[email protected]/10V_4

4

SYS_PEX_RST

3 5

GT@MC74VHC1G08DFT2G

2

1

R366 GM@0_4

SYS_PEX_RST

+3V_GFX

Follow Z09 to isolate CLK_REQ#

2

3

1

Q31
EV@2N7002K

R394 * 0_4

NVDD = 32.22 ~ 26.66 A

Under GPU

C363 EV @1U/6.3V_4
C318 EV @1U/6.3V_4
C322 EV @1U/6.3V_4
C316 EV @1U/6.3V_4
C336 EV @4.7u/10V_6
C365 EV @4.7u/10V_6
C330 EV @4.7u/10V_6
C338 EV @4.7u/10V_6
C327 EV @4.7u/10V_6C555 EV @0.22U/10V_4
C357 EV @4.7u/10V_6
C342 EV @4.7u/10V_6
C332 EV @4.7u/10V_6
C321 EV @4.7u/10V_6
C323 EV @4.7u/10V_6

C366
EV@330u_2.5V_352 8

C287 EV @22U/6.3V_8
C294 EV @47u/6.3V_8

C286 EV @4.7U/6.3VS_6
C305 EV @4.7U/6.3VS_6
C299 EV @4.7U/6.3VS_6
C296 EV @4.7U/6.3VS_6
C281 EV @4.7U/6.3VS_6

Near GPU

R354 *short_4

SYS_PEX_RST_MON# [19 ]

+3V

U21

4

3 5

CLK_PEGA_REQ# [9]

PU at page 9

5

12

+

C269
[email protected]/10V_4

PEGX_RST#

+VGPU_CORE

SYS_PEX_RST_MON#

R355
GT@100K/F_4

R374
EV@100K/F_4

U39E

11/14 NVVDD

K10

VDD

K12

VDD

K14

VDD

K16

VDD

K18

VDD

L11

VDD

L13

VDD

L15

VDD

L17

VDD

M10

VDD

M12

VDD

M14

VDD

M16

VDD

M18

VDD

N11

VDD

N13

VDD

N15

VDD

N17

VDD

P10

VDD

P12

VDD

P14

VDD

P16

VDD

P18

VDD

R11

VDD

R13

VDD

R15

VDD

R17

VDD

T10

VDD

T12

VDD

T14

VDD

T16

VDD

T18

VDD

U11

VDD

U13

VDD

U15

VDD

U17

VDD

V10

VDD

V12

VDD

V14

VDD

V16

VDD

V18

VDD

bga595-nvidia-n13p-gv2-s-a2

COMMON

6

AD10

AD7
B19

F11

TP57

W1
W2
W3
W4

ALL 3.3V
+3VGFX & +3V3_AON

+VGACORE

PEX_VDD
+1.05V_GFX

FBVDDQ
+1.5V_GFX

VDD33
VDD33

VDD33
VDD33

G10
G12

G8
G9

VDD33 = 56mA

+3V_GFX

C331 EV @0.1U/10V_4

C300 E [email protected]/10V_6
C307 EV@1U/10V_6

1 2

+3V_MAIN

C301 E [email protected]/10V_6
C308 EV@1U/10V_6

1 2

C324 EV @0.1U/10V_4C328 EV @1U/6.3V_4
C320 EV @0.1U/10V_4

Under GPU

Power up
sequence

U39C

14/14 XVDD/VDD33

NC
NC
NC

3V3AUX_NC

V5

FERMI_RSVD1_NC

V6

FERMI_RSVD2_NC

CONFIGURABLE

POWER CHANNELS

* nc on substrate

G1

XPWR_G1

G2

XPWR_G2

G3

XPWR_G3

G4

XPWR_G4

G5

XPWR_G5

G6

XPWR_G6

G7

XPWR_G7

V1

XPWR_V1

V2

XPWR_V2

XPWR_W1
XPWR_W2
XPWR_W3
XPWR_W4

bga595-nvidia-n13p-gv2-s-a2 COMMON

t>0NVVDD

t>=0

Power down
sequence

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

ZRT/ZRTA

PROJECT :

ZRT/ZRTA

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

N16S-GT (PCIE I/F) /NVDD

N16S-GT (PCIE I/F) /NVDD

N16S-GT (PCIE I/F) /NVDD

Date: Sheet

Wednesday, F ebruary 1 1, 2015

Date: Sheet of

Wednesday, F ebruary 1 1, 2015

Date: Sheet of

Wednesday, F ebruary 1 1, 2015

7

ZRT/ZRTA

16 44

16 44

16 44

8

of

Under GPU

Near GPU

3A

3A

3A

1

R696 E V@10K/F_4

A A

FBA_CKE_L

FBA_ODT_H

FBA_CKE_H

FBA_RST#

B B

C C

+1.5V_GFX

FBA_CMD3

FBA_CMD16

FBA_CMD19

FBA_CMD20

R423 E V@10K/F_4

R433 E V@10K/F_4

R439 E V@10K/F_4

R758 E V@10K/F_4

FBA_CMD0[20,21]
FBA_CMD1[2 1]
FBA_CMD2[2 0]
FBA_CMD3[20,21]
FBA_CMD4[20,21]
FBA_CMD5[20,21]
FBA_CMD6[20,21]
FBA_CMD7[20,21]
FBA_CMD8[20,21]

FBA_CMD9[20,21]
FBA_CMD10[2 0,21]
FBA_CMD11[2 0,21]
FBA_CMD12[2 0,21]
FBA_CMD13[2 0,21]
FBA_CMD14[2 0,21]
FBA_CMD15[2 0,21]
FBA_CMD16[2 0,21]

FBA_CMD17[21]

FBA_CMD18[20]
FBA_CMD19[2 0,21]
FBA_CMD20[2 0,21]
FBA_CMD21[2 0,21]
FBA_CMD22[2 0,21]
FBA_CMD23[2 0,21]
FBA_CMD24[2 0,21]
FBA_CMD25[2 0,21]
FBA_CMD26[2 0,21]
FBA_CMD27[20]
FBA_CMD28[2 0,21]
FBA_CMD29[2 0,21]
FBA_CMD30[21]

VMA_CLK0[20,21 ]

VMA_CLK0#[20,21]

VMA_CLK1[20,21 ]

VMA_CLK1#[20,21]

R424 E V@10K/F_4

FBA_CMD0

FBA_ODT_L

FB_PLLAVDD = 55mA

L22 EV@PBY160808T-300Y-N R459EV@100/F_4

+1.05V_GFX

D D

C372 EV@22U/6.3VS_ 6
C375 [email protected]/10V_4
C362 [email protected]/10V_4
C374 [email protected]/10V_4

FB_DLLAVDD = 15mA

1

PS_FB_CLAMP

R405 * 60.4_4
R399 * 60.4_4

+FB_PLLAVDD

2

C27
C26
E24
F24
D27
D26
F25
F26

F23
G22
G23
G24

F27
G25
G27
G26
M24
M23

K24

K23
M27
M26
M25

K26

K22

J23
J25

J24
K27
K25

J27

J26

F22

J22

D24
D25
N22

M22

D18
C18
D17
D16
T24
U24
V24
V25

F16

P22

H22

2

U39B

F3

FB_CLAMP

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31

FBA_DEBUG0
FBA_DEBUG1

FBA_CLK0
FBA_CLK0
FBA_CLK1
FBA_CLK1

FBA_WCK01
FBA_WCK01
FBA_WCK23
FBA_WCK23
FBA_WCK45
FBA_WCK45
FBA_WCK67
FBA_WCK67

FB_PLLAVDD

FB_PLLAVDD

FB_DLLAVDD

bga595-nvidia-n13p-gv2-s-a2

3

2/14 FBA

E18

GF119NC

GF117

GF119

GF117FB_PLLAVDD

INT

FBA_D0

F18

FBA_D1

E16

FBA_D2

F17

FBA_D3

D20

FBA_D4

D21

FBA_D5

F20

FBA_D6

E21

FBA_D7

E15

FBA_D8

D15

FBA_D9

F15

FBA_D10

F13

FBA_D11

C13

FBA_D12

B13

FBA_D13

E13

FBA_D14

D13

FBA_D15

B15

FBA_D16

C16

FBA_D17

A13

FBA_D18

A15

FBA_D19

B18

FBA_D20

A18

FBA_D21

A19

FBA_D22

C19

FBA_D23

B24

FBA_D24

C23

FBA_D25

A25

FBA_D26

A24

FBA_D27

A21

FBA_D28

B21

FBA_D29

C20

FBA_D30

C21

FBA_D31

R22

FBA_D32

R24

FBA_D33

T22

FBA_D34

R23

FBA_D35

N25

FBA_D36

N26

FBA_D37

N23

FBA_D38

N24

FBA_D39

V23

FBA_D40

V22

FBA_D41

T23

FBA_D42

U22

FBA_D43

Y24

FBA_D44

AA24

FBA_D45

Y22

FBA_D46

AA23

FBA_D47

AD27

FBA_D48

AB25

FBA_D49

AD26

FBA_D50

AC25

FBA_D51

AA27

FBA_D52

AA26

FBA_D53

W26

FBA_D54

Y25

FBA_D55

R26

FBA_D56

T25

FBA_D57

N27

FBA_D58

R27

FBA_D59

V26

FBA_D60

V27

FBA_D61

W27

FBA_D62

W25

FBA_D63

D19

FBA_DQM0

D14

FBA_DQM1

C17

FBA_DQM2

C22

FBA_DQM3

P24

FBA_DQM4

W24

FBA_DQM5

AA25

FBA_DQM6

U25

FBA_DQM7

E19

FBA_DQS_WP0

C15

FBA_DQS_WP1

B16

FBA_DQS_WP2

B22

FBA_DQS_WP3

R25

FBA_DQS_WP4

W23

FBA_DQS_WP5

AB26

FBA_DQS_WP6

T26

FBA_DQS_WP7

F19

FBA_DQS_RN0

C14

FBA_DQS_RN1

A16

FBA_DQS_RN2

A22

FBA_DQS_RN3

P25

FBA_DQS_RN4

W22

FBA_DQS_RN5

AB27

FBA_DQS_RN6

T27

FBA_DQS_RN7

D23

FB_VREF_PROBE

COMMON

3

VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
VMA_DQ4
VMA_DQ5
VMA_DQ6
VMA_DQ7
VMA_DQ8
VMA_DQ9
VMA_DQ10
VMA_DQ11
VMA_DQ12
VMA_DQ13
VMA_DQ14
VMA_DQ15
VMA_DQ16
VMA_DQ17
VMA_DQ18
VMA_DQ19
VMA_DQ20
VMA_DQ21
VMA_DQ22
VMA_DQ23
VMA_DQ24
VMA_DQ25
VMA_DQ26
VMA_DQ27
VMA_DQ28
VMA_DQ29
VMA_DQ30
VMA_DQ31
VMA_DQ32
VMA_DQ33
VMA_DQ34
VMA_DQ35
VMA_DQ36
VMA_DQ37
VMA_DQ38
VMA_DQ39
VMA_DQ40
VMA_DQ41
VMA_DQ42
VMA_DQ43
VMA_DQ44
VMA_DQ45
VMA_DQ46
VMA_DQ47
VMA_DQ48
VMA_DQ49
VMA_DQ50
VMA_DQ51
VMA_DQ52
VMA_DQ53
VMA_DQ54
VMA_DQ55
VMA_DQ56
VMA_DQ57
VMA_DQ58
VMA_DQ59
VMA_DQ60
VMA_DQ61
VMA_DQ62
VMA_DQ63

VMA_DM0
VMA_DM1
VMA_DM2
VMA_DM3
VMA_DM4
VMA_DM5
VMA_DM6
VMA_DM7

VMA_WDQS0
VMA_WDQS1
VMA_WDQS2
VMA_WDQS3
VMA_WDQS4
VMA_WDQS5
VMA_WDQS6
VMA_WDQS7

VMA_RDQS0
VMA_RDQS1
VMA_RDQS2
VMA_RDQS3
VMA_RDQS4
VMA_RDQS5
VMA_RDQS6
VMA_RDQS7

TP60

4

VMA_DQ[63:0]

FBVDDQ + FBVDD = 3.116 A

VMA_DM[7:0] [20 ,21]

VMA_WDQS[7:0] [2 0,21]

VMA_RDQS[7:0] [20,2 1]

4

VMA_DQ[63:0] [20,21]

+1.5V_GFX

C380 EV @0.1U/10V_4
C367 EV @0.1U/10V_4

C356 EV@1U/10V_6

1 2

C378 EV@1U/10V_6

1 2
C377 EV @4.7u/10V_6
C382 EV @4.7u/10V_6
C368 EV @10U/6.3V_6
C369 EV @22U/6.3V_8

R752EV@100/F_4
R750EV@100/F_4
R435EV@100/F_4
R431EV@100/F_4
R763EV@100/F_4
R440EV@100/F_4
R462EV@100/F_4
R422EV@100/F_4
R756EV@100/F_4
R458EV@100/F_4
R759EV@100/F_4
R420EV@100/F_4
R465EV@100/F_4
R451EV@100/F_4
R468EV@100/F_4
R442EV@100/F_4

R457EV@100/F_4
R452EV@100/F_4
R426EV@100/F_4
R430EV@100/F_4
R446EV@100/F_4

5

U39D

12/14 FBVDDQ

B26

FBVDDQ

C25

FBVDDQ

E23

FBVDDQ

E26

FBVDDQ

F14

FBVDDQ

F21

FBVDDQ

G13

FBVDDQ

G14

FBVDDQ

G15

FBVDDQ

G16

FBVDDQ

G18

FBVDDQ

G19

FBVDDQ

G20

FBVDDQ

G21

FBVDDQ

H24

FBVDDQ

H26

FBVDDQ

J21

FBVDDQ

K21

FBVDDQ

L22

FBVDDQ

L24

FBVDDQ

L26

FBVDDQ

M21

FBVDDQ

N21

FBVDDQ

R21

FBVDDQ

T21

FBVDDQ

V21

FBVDDQ

W21

FBVDDQ

FB_CAL_PD_VDDQ

FB_CAL_PU_GND

FB_CALTERM_GND

bga595-nvidia-n13p-gv2-s-a2

COMMON

FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30

5

6

D22

FB_CAL_PD_VDDQ

C24

FB_CAL_PU_GND

B25

FB_CAL_TERM_GND

+1.5V_GFX

R753EV@100/F_4
R751EV@100/F_4
R436EV@100/F_4
R432EV@100/F_4
R764EV@100/F_4
R441EV@100/F_4
R463EV@100/F_4
R421EV@100/F_4
R757EV@100/F_4

R760EV@100/F_4
R419EV@100/F_4
R464EV@100/F_4
R450EV@100/F_4
R467EV@100/F_4
R443EV@100/F_4
R428EV@100/F_4R4 27EV@100/F_4
R456EV@100/F_4
R453EV@100/F_4
R425EV@100/F_4
R429EV@100/F_4
R447EV@100/F_4

6

R402 E [email protected]/F_4

R413 E [email protected]/F_4

R415 E [email protected]/F_4

For support GC6 2.0

EC_FB_CLAMP[19,31]

GC6_FB_EN[10 ,19]

GPU_PWR_GD[38]

7

U39F

13/14 GND

A2

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND

GND

+1.5V_GFX

AB17
AB20
AB24

AC2
AC22
AC26

AC5

AC8
AD12
AD13

A26
AD15
AD16
AD18
AD19
AD21
AD22
AE11
AE14
AE17
AE20
AB11

AF1
AF11
AF14
AF17
AF20
AF23

AF5

AF8

AG2
AG26
AB14

B1
B11
B14
B17
B20
B23
B27

B5

B8
E11
E14
E17

E2
E20
E22
E25

E5

E8

H2
H23
H25

H5
K11
K13
K15
K17
L10
L12
L14
L16
L18

L2
L23
L25

L5

M11

bga595-nvidia-n13p-gv2-s-a2 COMMON

+3V

R358 * 0_4

R357 G T@0_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

7

C267
[email protected]/10V_4

2

1

3 5

U20
GT@NL17SZ32DFT2G

R359 G M@0_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

N16S-GT (MEMORY/GND)

N16S-GT (MEMORY/GND)

N16S-GT (MEMORY/GND)

Wednesday, F ebruary 1 1, 2015

Wednesday, F ebruary 1 1, 2015

Wednesday, F ebruary 1 1, 2015

4

FBVDDQ_EN [39]

R362
EV@100K/F_4

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

8

M13
M15
M17
N10
N12
N14
N16
N18
P11
P13
P15
P17
P2
P23
P26
P5
R10
R12
R14
R16
R18
T11
T13
T15
T17
U10
U12
U14
U16
U18
U2
U23
U26
U5
V11
V13
V15
V17
Y2
Y23
Y26
Y5

AA7
AB7

17 44

17 44

17 44

8

3A

3A

3A

1

U39G

4/14 IFPAB

GF119

GF119

GF119

IFPD

GF117

GF117GF119

NC

NC

GF117

GF117

NC

NC

NC

GF119

GF117

NC

AA6

IFPAB_RSET

V7

TP114

TP117

A A

TP121

TP120

B B

TP53
TP126

C C

TP116

TP118

TP54

D D

TP52

IFPAB_PLLVDD

W7

IFPAB_PLLVDD

W6

IFPA_IOVDD

Y6

IFPB_IOVDD

IFPAB

bga595-nvidia-n13p-gv2-s-a2

U39H

5/14 IFPC

T6

IFPC_RSET

M7

IFPC_PLLVDD

N7

IFPC_PLLVDD

P6

IFPC_IOVDD

bga595-nvidia-n13p-gv2-s-a2

U39I

6/14 IFPD

U6

IFPD_RSET

T7

IFPD_PLLVDD

R7

IFPD_PLLVDD

R6

IFPD_IOVDD

1

2

GF119

GF117

NC
NC

NC

NC
NC

NC

NC

NC

NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC

NC

NC

NC
NC

NC

NC
NC

NC
NC

NC
NC

NC
NC

NC

NC

GF117

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC

2

AC4

IFPA_TXC

AC3

IFPA_TXC

Y3

IFPA_TXD0

Y4

IFPA_TXD0

AA2

IFPA_TXD1

AA3

IFPA_TXD1

AA1

IFPA_TXD2

AB1

IFPA_TXD2

AA5

IFPA_TXD3

AA4

IFPA_TXD3

AB4

IFPB_TXC

AB5

IFPB_TXC

AB2

IFPB_TXD4

AB3

IFPB_TXD4

AD2

IFPB_TXD5

AD3

IFPB_TXD5

AD1

IFPB_TXD6

AE1

IFPB_TXD6

AD5

IFPB_TXD7

AD4

IFPB_TXD7

GPIO14

B3

COMMON

IFPC

GF119GF1 17

DVI/HDMI DP

I2CW_SDA
I2CW_SCL

TXC
TXC

TXD0
TXD0

TXD1
TXD1

TXD2
TXD2

GF119

I2CX_SDA
I2CX_SCL

TXC
TXC

TXD0
TXD0

TXD1
TXD1

TXD2
TXD2

TP51

TP119

TP125

TP124

IFPC_AUX
IFPC_AUX

IFPD_AUX
IFPD_AUX

IFPC_L3
IFPC_L3

IFPC_L2
IFPC_L2

IFPC_L1
IFPC_L1

IFPC_L0
IFPC_L0

DPDVI/HDMI

IFPD_L3
IFPD_L3

IFPD_L2
IFPD_L2

IFPD_L1
IFPD_L1

IFPD_L0
IFPD_L0

GPIO15

COMMON

GPIO17

COMMONbga595-nvidia-n13p-gv2-s-a2

3

U39J

J7

IFPEF_PLLVDD

K7

IFPEF_PLLVDD

K6

IFPEF_RSET

H6

IFPE_IOVDD

J6

IFPF_IOVDD

bga595-nvidia-n13p-gv2-s-a2

N5
N4

N3
N2

+1.05V_GFX

R3
R2

R1
T1

T3
T2

+1.05V_GFX

C3

P4
P3

R5
R4

T5
T4

U4
U3

V4
V3

D4

3

7/14 IFPEF

GF119

GF119

HWPG_1.5VGFX[39]

4

GF117

DVI-DL

NC

I2CY_SDA

GF117

NC

I2CY_SCL

NC

NC

TXC

NC

TXC

NC

NC

TXD0

NC

TXD0

NC

NC

TXD1

NC

TXD1

NC

TXD2

NC

TXD2

GF119

DVI-SL/HDMI

I2CY_SDA
I2CY_SCL

TXC
TXC

TXD0
TXD0

TXD1
TXD1

TXD2
TXD2

DP

IFPE_AUX
IFPE_AUX

IFPE_L3
IFPE_L3

IFPE_L2
IFPE_L2

IFPE_L1
IFPE_L1

IFPE_L0
IFPE_L0

5

J3
J2

J1
K1

K3
K2

M3
M2

M1
N1

TP115

TP128

IFPE

GPIO18

DP

IFPF_AUX
IFPF_AUX

IFPF_L3
IFPF_L3

IFPF_L2
IFPF_L2

IFPF_L1
IFPF_L1

IFPF_L0
IFPF_L0

GPIO19

9/14 XTAL_PLL

PLLVDD
SP_PLLVDD

VID_PLLVDD

XTALSSIN

XTALIN

DGPU_PGOK-1

Q34
EV@METR3904-G

COMMON

C2

H4
H3

J5
J4

K5
K4

L4
L3

M5
M4

+3V_MAIN_EN[19]

F7

R385 E [email protected]_4

+3V_MAIN

GF119

NC

GF117

XTALOUTBUFF

+3V_GFX

+3V

5

R403
[email protected]_4

2

C304
EV@1000P/50V_4

R381
[email protected]_4

Q29

EV@DTC144EUA

1 3

HPD_E

HPD_ENC

GF117

NC

GF117

NC

NC
NC

NC
NC

NC
NC

IFPF

L17 EV@HCB1005KF-181T15 (180,1500MA)

NC
NC

NC
NC

NC

PLLVDD = 38mA

L18 EV@PBY160808T-300Y-N Q33

C313 [email protected]/10V_4
C291 EV@22U/6.3VS_ 6

SP_PLLVDD = 17mA

C317 EV @0.1U/10V_4

C290 [email protected]/10V_4
C295 [email protected]/10V_ 6
C302 EV@22U/6.3VS_ 6

DVI-DL

GF119

DVI-SL/HDMI

I2CZ_SDA
I2CZ_SCL

TXC
TXC

TXD0

TXD3

TXD0

TXD3

TXD1

TXD4

TXD1

TXD4

TXD2

TXD5

TXD2

TXD5

HPD_F

NV_PLLVDD

U39M

SP_PLLVDD

L6

M6

N6

VID_PLLVDD = 41mA

R703 E V@10K/F_4

DB-->SI change 10/25
Use G-CLK

R401 E [email protected]_4

4

A10

XTAL_SSIN

C11

27M_XTAL_IN_R 27M_XTAL_OUT

DGPU_POK2

C306
*1000P/50V_4

2

1 3

bga595-nvidia-n13p-gv2-s-a2

U39K

W5

AE2

AF2

bga595-nvidia-n13p-gv2-s-a2

C285
*1000p/50V_4

XTALOUT

COMMON

R386
EV@100K/F_4

3/14 DACA

GF119

DACA_VDD

DACA_VREF

DACA_RSET

+3V_GFX

C10

B10

6

GF117

TSEN_VREF

R369
EV@10K_4

2

2

1 3

EV@MMBT3904-7-F

BXTALOUT

DGPU_PWROK [10]

6

GF117

NC

NC

3V MAIN POWER

R371
GT@10K_4

R370 G T@200K_4

3

Q24
GT@2N7002K

1

+3V

R718 E V@10K/F_4

7

GF119

I2CA_SCL

NC

I2CA_SDA

NC

DACA_HSYNC

NC

DACA_VSYNC

NC

DACA_RED

NC

DACA_GREEN

NC

DACA_BLUE

NC

COMMON

B7
A7

AE3
AE4

AG3

AF4

AF3

I2CA_SCL
I2CA_SDA

R700 [email protected]_4
R716 [email protected]_4

+3V_GFX+3V_GFX

C277

[email protected]/25V_4

C280

[email protected]/25V_4

1A-7

60mil

1

2

3

Q30
GT@AO3413

60mil

R390
GM@0_8

+3V_MAIN

N15V stuff not support GC6.

+3V_GFX

R396

R404
[email protected]_4

C298
EV@1000p/50V_4

[email protected]/F_4

3V_MAIN_PWGD

2

Q35

1 3

EV@DTC144EU

27M_XTAL_IN_R
27M_XTAL_OUT

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Wednesday, F ebruary 1 1, 2015

Date: Sheet of

Wednesday, F ebruary 1 1, 2015

Date: Sheet of

Wednesday, F ebruary 1 1, 2015

7

R398
*100K/F_4

+1.05V_GFX and GPU core power EN

DB-->SI change 10/25
Use G-CLK

41

Y4

EV@27MHZ +-10PPM

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

N16S-GT (DISPLAY)

N16S-GT (DISPLAY)

N16S-GT (DISPLAY)

8

3V_MAIN_PWGD [38,39]

C546

EV@12p/50V_4

C544

2 3

EV@12p/50V_4

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

18 44

18 44

18 44

8

3A

3A

3A

of

1

TP56
TP55

A A

+3V_GFX

R767 *10K/F_4

R709 [email protected]/F_4

U39N

8/14 MISC1

B B

TP58

TP59

TP130
TP129
TP131
TP132

C C

GPU_THROTTING#[32]

D D

JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST#

PEGX_RST#[16]

VGA_OVT#

THERM-

THERM+

1

E12

F12

AE5
AD6
AE6
AF6

AG4

1

R777 *0_4

THERMDN

THERMDP

JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST

bga595-nvidia-n13p-gv2-s-a2

2

3

Q25

EV@2N7002K

GPIO12_ACIN

2

E10
F10

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

dGPU_OTP # [31]

dGPU_OPP# = EC control

1

2

+3V_GFX

2

3

U39L

10/14 MISC2

VMON_IN0
VMON_IN1

D1

STRAP0

D2

STRAP1

E4

STRAP2

E3

STRAP3

D3

STRAP4

GF119

C1

F6

F4

F5

GF117

Q32
EV@2N7002K

GPIO12 AC detect
AC high
DC low

GF117

STRAP5_NC

NC

MULTISTRAP_REF0_GND

GF119

MULTISTRAP_REF1_GND

MULTISTRAP_REF2_GND

bga595-nvidia-n13p-gv2-s-a2 COMMON

I2CS_SCL

I2CS_SDA

I2CC_SCL
I2CC_SDA

GF119

I2CB_SCL

NC

I2CB_SDA

NC

GPIO10
GPIO11
GPIO12
GPIO13

GF117

GF119

GPIO16

NC

GPIO20

NC

GPIO21

NC

COMMON

3

dGPU_OPP # [31]

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
OVERT
GPIO9

D9

GPUT_CLK_L

D8

GPUT_DATA_L

A9

DGPU_EDIDCLK

B9

DGPU_EDIDDATA

C9

N12E_SCL

C8

N12E_SDA

C6

FB_CLAMP_MON
B2
D6
C7
F9
A3

+3V_MAIN_EN

A4

GPU_EVENT#
B6
A6

VGA_OVT#
F8

ALERT
C5
E7
D7

GPIO12_ACIN

B4

D5

GPU_GPIO16
E6
C4

GPU_PEX_RST_HOLD#

GF117

NC

NC

R719 [email protected]_4
R702 [email protected]_4

R701 [email protected]_4
R717 [email protected]_4

TP123

GPIO12_ACIN

DGPU_PSI

VGA_OVT#

ALERT

GPU_PEX_RST_HOLD#

GPU_EVENT#

JTAG_TMS

JTAG_TDI

JTAG_TRST#

JTAG_TCK

3

ROM_CS

ROM_SI

ROM_SO

ROM_SCLK

BUFRST

PGOOD

CEC

R372 EV@0_4

1

2

+3V_GFX

+3V_MAIN_EN [18]

PWM-VID [38]

DGPU_PSI [38]

GPU_PEX_RST_HOLD# [16]

R392 EV@10K/F_4

R699 EV@10K/F_4

R376 EV@10K/F_4

R708 EV@10K/F_4

R715 EV@10K/F_4

R704 EV@10K/F_4

R722 *10K/F_4

R731 *10K/F_4

R732 EV@10K/F_4

R723 *10K/F_4

D12

ROM_CS

B12

ROM_SI

A12

ROM_SO

C12

ROM_SCLK

D11

D10

R391 EV@10K/F_4

E9

SYS_PEX_RST_MON#

3

Q27
*2N7002K

R393 *10K/F_4

2ND_MBDATA[8,31]

2ND_MBCLK[8,31]

+3V_GFX

4

+3V_GFX

+3V_GFX

SYS_PEX_RST_MON# [1 6]

+3V_MAIN

5

Dual

2ND_MBDATA GPUT_DATA_L

2

6

2ND_MBCLK

Dual

R368 *0_4

R367 EV@0_4
R373
EV@10K/F_4

R384 GT@0_4

1

5

Q28

43

R387 [email protected]_4
R388 [email protected]_4

1

EV@2N7002DW

EC_FB_CLAMP [17,31]

GC6_FB_EN [10,17]

+3V_GFX

R389
*10K/F_4

3

Q26
*2N7002K

2

N15S -> GPIO0 un-stuff Q3013 and R3183
GPIO6 un-stuff Q3012 \ R3181 and R3166

+3V_GFX

N15V -> GPIO0 stuff Q3013 and R3183, un-stuff R3180 \ R3188
GPIO6 stuff Q3012 \ R3181 and R3162, un-stuff R3177,R3166.

N16S-GS/N16V-GM Straping table

ROM_SI N16S
2G Hynix 128Mx16 -->34.8K PD
2G Micron 128M x16 -->45.3K PD
2G Samsumg 128Mx16 -->4.99K PU
4G Hynix 256Mx16 -->4.99K PD
4G Micron 256M x16 -->10K PD
4G Samsumg 256Mx16 -->15K PD

ROM_SI N16V
2G Hynix 128Mx16 -->20K PD
2G Micron 128M x16 -->30.1K PD
2G Samsumg 128Mx16 -->34.8K PD
4G Micron 256M x16 -->10K PD
4G Hynix 256Mx16 -->15K PD
4G Samsumg 256Mx16 -->24.9K PD

N16V-GM strap0~3 table

STRAP0 = Stuff 45.3k pull up. (EDID Panel)

STRAP1 = Stuff 4.99k pull down.(Gen3 support)

STRAP2 = Stuff 10k pull up.(DID 0x1299)

STRAP3 = Stuff 4.99k pull down.(No display out)

STRAP4 = Stuff 45.3k pull down. (Gen3/max speed)

4

5

6

R724

R726

R725
[email protected]/F_4

ROM_SI STRAP0
ROM_SO
ROM_SCLK

R729
[email protected]/F_4

+3V_GFX
+3V_GFX

GPUT_CLK_L

R375 *0_4
R383 GT@0_4

[email protected]/F_4

[email protected]/F_4

R730

R728

[email protected]/F_4

[email protected]/F_4

FB_CLAMP_REQ# [31]

DGPU_EVENT# [10]

Resistor P/N

4.99K---> CS24992FB26
10K ---> CS31002FB26
15K ---> CS31502FB24
20K ---> CS32002FB29

24.9K --->CS32492FB16

30.1K --->CS33012FB18

34.8K---> CS33482FB22

45.3K ---> CS34532FB18 GM

49.9K ---> CS34992FB10 GT

ROM_SO
N16S-GT --> 4.99K PD
N16V-GM --> 4.99K PU

6

ROM_SCLK
N16S-GT --> 4.99K PD
N16V-GM --> 4.99K PU

STRAP1
STRAP2
STRAP3
STRAP4

7

R3626
GMGT45.3k pull up

49.9K pull up

R711

R713
*10K/F_4

R697
[email protected]/F_4

PU-VDD PD

1000 0000
1001 0001

10K
15K

1011 0011

20K

1100
1101
1110 0110
1111

STRAP0
N16S-GT --> 49.9K PU
N16V-GM --> 45.3K PU

Wednesday, February 11, 2015

Wednesday, February 11, 2015

Wednesday, February 11, 2015

7

R712
GM@10K/F_4

R695
*15K/F_4

1 2

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

N16S-GT (GPIO /STRAPS)

N16S-GT (GPIO /STRAPS)

N16S-GT (GPIO /STRAPS)

[email protected]/F_4

R694
*24.9K/F_4

Logical Strap Bit Mapping

4.99K

24.9K

30.1K

34.8K

45.3K

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet

R710
*10K/F_4

R693
[email protected]/F_4

00101010

0100
0101

0111

+3V_GFX+3V_MAIN

R714
*10K/F_4

R698
[email protected]/F_4

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

8

of

19 44

19 44

19 44

8

3A

3A

3A

HYU 256Mx16, H5TC4G63AFR-11C QBC PN
MIC 256Mx16, MT41J256M16HA-093G:E QBC PN
SAM 256Mx16, K4W4G1646D-BC1A QBC PN

VREFC_VMA1[21]
VREFD_VMA1[21]

D D

FBA_CMD7[17,21]
FBA_CMD10[17,21]
FBA_CMD24[17,21]
FBA_CMD6[17,21]
FBA_CMD22[17,21]
FBA_CMD26[17,21]
FBA_CMD5[17,21]
FBA_CMD21[17,21]
FBA_CMD8[17,21]
FBA_CMD4[17,21]
FBA_CMD25[17,21]
FBA_CMD23[17,21]
FBA_CMD9[17,21]
FBA_CMD12[17,21]
FBA_CMD14[17,21]

FBA_CMD29[17,21]
FBA_CMD13[17,21]
FBA_CMD27[17]

VMA_CLK0[17,21]
VMA_CLK0#[17,21]
FBA_CMD3[17,21]

C C

FBA_CMD0[17,21]
FBA_CMD2[17]
FBA_CMD11[17,21]
FBA_CMD15[17,21]
FBA_CMD28[17,21]

VMA_WDQS1[17,21]
VMA_RDQS1[17,21]

VMA_DM1[17,21]
VMA_DM2[17,21]

VMA_WDQS2[17,21]
VMA_RDQS2[17,21]

FBA_CMD20[17,21]

B B

5

󶁪󶁪󶁪󶁪

AKD5PGWTW08---TOP B/S PN : AKD5PGWTW07

󶁪󶁪󶁪󶁪

AKD5PZSTL01---TOP B/S PN : AKD5PZSTL00

󶁪󶁪󶁪󶁪

AKD5PGWT501---TOP B/S PN : AKD5PGWT502

U41

E3

M8

VREFC_VMA1
VREFD_VMA1

FBA_ZQ0

GND

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

VDDQ#C1

K3

CAS

VDDQ#C9

L3

WE

VDDQ#D2

F3

DQSL

G3

DQSL

E7

DML

D3

DMU

C7

DQSU

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

96-BALL
SDRAM DDR3

EV@VRAM _DDR3_HYNIX_256MX16

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

B2

VDD#B2

D9

VDD#D9

G7

VDD#G7

K2

VDD#K2

K8

VDD#K8

N1

VDD#N1

N9

VDD#N9

R1

VDD#R1

R9

VDD#R9

A1

VDDQ#A1

A8

VDDQ#A8

C1
C9
D2
E9

VDDQ#E9

F1

VDDQ#F1

H2

VDDQ#H2

H9

VDDQ#H9

A9

VSS#A9

B3

VSS#B3

E1

VSS#E1

G8

VSS#G8

J2

VSS#J2

J8

VSS#J8

M1

VSS#M1

M9

VSS#M9

P1

VSS#P1

P9

VSS#P9

T1

VSS#T1

T9

VSS#T9

B1

VSSQ#B1

B9

VSSQ#B9

D1

VSSQ#D1

D8

VSSQ#D8

E2

VSSQ#E2

E8

VSSQ#E8

F9

VSSQ#F9

G1

VSSQ#G1

G9

VSSQ#G9

VMA_DQ11 [17,21]
VMA_DQ12 [17,21]
VMA_DQ10 [17,21]
VMA_DQ15 [17,21]
VMA_DQ8 [17,21]
VMA_DQ14 [17,21]
VMA_DQ9 [17,21]
VMA_DQ13 [17,21]

VMA_DQ17 [17,21]
VMA_DQ21 [17,21]
VMA_DQ18 [17,21]
VMA_DQ23 [17,21]
VMA_DQ19 [17,21]
VMA_DQ22 [17,21]
VMA_DQ16 [17,21]
VMA_DQ20 [17,21]

+1.5V_GFX

C592[email protected]/10V_6

C560[email protected]/10V_4
C577[email protected]/10V_4

GND

+1.5V_GFX

C399[email protected]/10V_6

C579[email protected]/10V_4
C578[email protected]/10V_4

GND

GND

4

U40

E3

M8

VREFC_VMA1
VREFD_VMA1

FBA_CMD7
FBA_CMD10
FBA_CMD24
FBA_CMD6
FBA_CMD22
FBA_CMD26
FBA_CMD5
FBA_CMD21
FBA_CMD8
FBA_CMD4
FBA_CMD25
FBA_CMD23
FBA_CMD9
FBA_CMD12
FBA_CMD14

FBA_CMD29
FBA_CMD13
FBA_CMD27

VMA_CLK0
VMA_CLK0#
FBA_CMD3

FBA_CMD0
FBA_CMD2
FBA_CMD11
FBA_CMD15
FBA_CMD28

VMA_WDQS0[17,21]
VMA_RDQS0[17,21]

VMA_DM0[17,21]
VMA_DM3[17,21]

VMA_WDQS3[17,21]
VMA_RDQS3[17,21]

FBA_CMD20

FBA_ZQ1

GND

R734EV@243_4

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

G3

DQSL

E7

DML

D3

DMU

C7

DQSU

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

96-BALL
SDRAM DDR3

EV@VRAM _DDR3_HYNIX_256MX16

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

B2

+1.5V_GFX

VDD#B2

D9

VDD#D9

G7
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

VSS#A9
VSS#B3
VSS#E1
VSS#G8

VSS#J2

VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8

VSSQ#F9
VSSQ#G1
VSSQ#G9

C565[email protected]/10V_6

K2
K8

C574[email protected]/10V_4

N1

C571[email protected]/10V_4

N9
R1
R9

A1

+1.5V_GFX

A8
C1

C411[email protected]/10V_6

C9
D2

C390[email protected]/10V_4

E9

C381[email protected]/10V_4

F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1

GND

B9
D1
D8
E2
E8
F9
G1
G9

VMA_DQ4 [17,21]
VMA_DQ1 [17,21]
VMA_DQ5 [17,21]
VMA_DQ0 [17,21]
VMA_DQ6 [17,21]
VMA_DQ2 [17,21]
VMA_DQ7 [17,21]
VMA_DQ3 [17,21]

VMA_DQ24 [17,21]
VMA_DQ25 [17,21]
VMA_DQ26 [17,21]
VMA_DQ30 [17,21]
VMA_DQ29 [17,21]
VMA_DQ28 [17,21]
VMA_DQ27 [17,21]
VMA_DQ31 [17,21]

3

U43

E3

M8

VREFC_VMA3

VREFC_VMA3[21]

VREFD_VMA3

VREFD_VMA3[21]

FBA_CMD7
FBA_CMD10
FBA_CMD24
FBA_CMD6
FBA_CMD22
FBA_CMD26
FBA_CMD5
FBA_CMD21
FBA_CMD8
FBA_CMD4
FBA_CMD25
FBA_CMD23
FBA_CMD9
FBA_CMD12
FBA_CMD14

FBA_CMD29
FBA_CMD13
FBA_CMD27

GND

GND

VMA_CLK1[17,21]
VMA_CLK1#[17,21]
FBA_CMD19[17,21]

FBA_CMD16[17,21]
FBA_CMD18[17]

FBA_CMD11
FBA_CMD15
FBA_CMD28

VMA_WDQS4[17,21]

VMA_RDQS4[17,21]

VMA_DM4[17,21]
VMA_DM7[17,21]

VMA_WDQS7[17,21]

VMA_RDQS7[17,21]

FBA_CMD20

FBA_ZQ4

GND

R747EV@243_4R733EV@243_4

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

G3

DQSL

E7

DML

D3

DMU

C7

DQSU

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

96-BALL
SDRAM DDR3

EV@VRAM _DDR3_HYNIX_256MX16

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

B2

VDD#B2

D9

VDD#D9

G7

VDD#G7

K2

VDD#K2

K8

VDD#K8

N1

VDD#N1

N9

VDD#N9

R1

VDD#R1

R9

VDD#R9

A1

VDDQ#A1

A8

VDDQ#A8

C1

VDDQ#C1

C9

VDDQ#C9

D2

VDDQ#D2

E9

VDDQ#E9

F1

VDDQ#F1

H2

VDDQ#H2

H9

VDDQ#H9

A9

VSS#A9

B3

VSS#B3

E1

VSS#E1

G8

VSS#G8

J2

VSS#J2

J8

VSS#J8

M1

VSS#M1

M9

VSS#M9

P1

VSS#P1

P9

VSS#P9

T1

VSS#T1

T9

VSS#T9

B1

VSSQ#B1

B9

VSSQ#B9

D1

VSSQ#D1

D8

VSSQ#D8

E2

VSSQ#E2

E8

VSSQ#E8

F9

VSSQ#F9

G1

VSSQ#G1

G9

VSSQ#G9

2

U42

M8

VMA_DQ32 [17,21]
VMA_DQ39 [17,21]
VMA_DQ34 [17,21]
VMA_DQ38 [17,21]
VMA_DQ33 [17,21]
VMA_DQ37 [17,21]
VMA_DQ35 [17,21]
VMA_DQ36 [17,21]

VMA_DQ57 [17,21]
VMA_DQ62 [17,21]
VMA_DQ59 [17,21]
VMA_DQ63 [17,21]
VMA_DQ58 [17,21]
VMA_DQ60 [17,21]
VMA_DQ56 [17,21]
VMA_DQ61 [17,21]

+1.5V_GFX

C563[email protected]/10V_6

C585[email protected]/10V_4
C370[email protected]/10V_4

GND

+1.5V_GFX

C611[email protected]/10V_6

C559[email protected]/10V_4
C613[email protected]/10V_4

GND

GND

VREFC_VMA3

VREFCA

H1

VREFD_VMA3

VREFDQ

N3

FBA_CMD7

A0

P7

FBA_CMD10

A1

P3

FBA_CMD24

A2

N2

FBA_CMD6

A3

P8

FBA_CMD22

A4

P2

FBA_CMD26

A5

R8

FBA_CMD5

A6

R2

FBA_CMD21

A7

T8

FBA_CMD8

A8

R3

FBA_CMD4

A9

L7

FBA_CMD25

A10/AP

R7

FBA_CMD23

A11

N7

FBA_CMD9

A12/BC

T3

FBA_CMD12

A13

T7

FBA_CMD14

A14

M7

A15

M2

FBA_CMD29

BA0

N8

FBA_CMD13

BA1

M3

FBA_CMD27

BA2

J7

VMA_CLK1

CK

K7

VMA_CLK1#

CK

K9

FBA_CMD19

CKE

K1

FBA_CMD16

ODT

L2

FBA_CMD18

CS

J3

FBA_CMD11

RAS

K3

FBA_CMD15

CAS

L3

FBA_CMD28

WE

FBA_CMD20

F3

DQSL

G3

DQSL

E7

DML

D3

DMU

C7

DQSU

B7

DQSU

T2

RESET

L8

FBA_ZQ5

ZQ

R738EV@243_4

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

EV@VRAM _DDR3_HYNIX_256MX16

VMA_WDQS5[17,21]
VMA_RDQS5[17,21]

VMA_DM5[17,21]
VMA_DM6[17,21]

VMA_WDQS6[17,21]
VMA_RDQS6[17,21]

GND

96-BALL
SDRAM DDR3

1

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

B2

VDD#B2

D9

VDD#D9

G7

VDD#G7

K2

VDD#K2

K8

VDD#K8

N1

VDD#N1

N9

VDD#N9

R1

VDD#R1

R9

VDD#R9

A1

VDDQ#A1

A8

VDDQ#A8

C1

VDDQ#C1

C9

VDDQ#C9

D2

VDDQ#D2

E9

VDDQ#E9

F1

VDDQ#F1

H2

VDDQ#H2

H9

VDDQ#H9

A9

VSS#A9

B3

VSS#B3

E1

VSS#E1

G8

VSS#G8

J2

VSS#J2

J8

VSS#J8

M1

VSS#M1

M9

VSS#M9

P1

VSS#P1

P9

VSS#P9

T1

VSS#T1

T9

VSS#T9

B1

VSSQ#B1

B9

VSSQ#B9

D1

VSSQ#D1

D8

VSSQ#D8

E2

VSSQ#E2

E8

VSSQ#E8

F9

VSSQ#F9

G1

VSSQ#G1

G9

VSSQ#G9

VMA_DQ44 [17,21]
VMA_DQ43 [17,21]
VMA_DQ45 [17,21]
VMA_DQ40 [17,21]
VMA_DQ47 [17,21]
VMA_DQ42 [17,21]
VMA_DQ46 [17,21]
VMA_DQ41 [17,21]

VMA_DQ52 [17,21]
VMA_DQ51 [17,21]
VMA_DQ54 [17,21]
VMA_DQ50 [17,21]
VMA_DQ53 [17,21]
VMA_DQ48 [17,21]
VMA_DQ55 [17,21]
VMA_DQ49 [17,21]

+1.5V_GFX

C621[email protected]/10V_6

C599[email protected]/10V_4
C403[email protected]/10V_4

GND

+1.5V_GFX

C397[email protected]/10V_6

C636[email protected]/10V_4
C437[email protected]/10V_4

GND

GND

+1.5V_GFX +1.5V_GFX +1.5V_GFX

A A

+1.5V_GFX

C601 EV@1U/6.3V_4
C581 EV@1U/6.3V_4
C569 EV@1U/6.3V_4 C587 *120P/50V_4
C561 EV@1U/6.3V_4

+1.5V_GFX

C580 EV@1U/6.3V_4
C413 EV@1U/6.3V_4
C575 EV@1U/6.3V_4 C632 [email protected]/10V_4
C626 EV@1U/6.3V_4

5

C615 EV@10U/6.3V_6

C568 EV@10U/6.3V_6

C591 EV@10U/6.3V_6

C640 [email protected]/10V_4
C408 [email protected]/10V_4
C349 [email protected]/10V_4

C346 [email protected]/10V_4
C570 [email protected]/10V_4
C595 [email protected]/10V_4

R743
[email protected]/F_4

VREFC_VMA1 VREFD_VMA1 VMA_CLK0

C602

[email protected]/F_4

[email protected]/25V_4

162_1% ohm CS11622FB07 RES CHIP 162 1/16W +-1%(0402)
CS11622FB15 RES CHIP 162 1/16W +-1%(0402)

R411
[email protected]/F_4

R410

C333

[email protected]/F_4

[email protected]/25V_4

4

VMA_CLK0#

FOR EMI Request

+1.5V_GFX

C405 *120P/50V_4

R412
EV@162_4

C430 *120P/50V_4
C385 *120P/50V_4
C607 *120P/50V_4
C630 *120P/50V_4

C350 *120P/50V_4
C609 *120P/50V_4

3

+1.5V_GFX

C628 EV@1U/6.3V_4
C343 EV@1U/6.3V_4
C618 EV@1U/6.3V_4
C624 EV@1U/6.3V_4

+1.5V_GFX

C573 EV@1U/6.3V_4
C635 EV@1U/6.3V_4
C629 EV@1U/6.3V_4
C625 EV@1U/6.3V_4

2

+1.5V_GFX

C634 EV@10U/6.3V_6

C404 EV@10U/6.3V_6

C638 EV@10U/6.3V_6

C598 [email protected]/10V_4
C582 [email protected]/10V_4
C603 [email protected]/10V_4R739

C631 [email protected]/10V_4
C633 [email protected]/10V_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

ZRT/ZRTA

PROJECT :

ZRT/ZRTA

PROJECT :

DDR3L - RANK0

DDR3L - RANK0

DDR3L - RANK0

ZRT/ZRTA

20 44

20 44

20 44

of

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet

Wednesday, February 11, 2015

Wednesday, February 11, 2015

Wednesday, February 11, 2015

1

3A

3A

3A

5

U23

E3

M8

VREFC_VMA1

VREFC_VMA1[20]

D D

C C

B B

VREFD_VMA1

VREFD_VMA1[20]

FBA_CMD9[17,20]
FBA_CMD24[17,20]
FBA_CMD10[17,20]
FBA_CMD13[17,20]
FBA_CMD26[17,20]
FBA_CMD22[17,20]
FBA_CMD21[17,20]
FBA_CMD5[17,20]
FBA_CMD8[17,20]
FBA_CMD23[17,20]
FBA_CMD28[17,20]
FBA_CMD4[17,20]
FBA_CMD7[17,20]
FBA_CMD14[17,20]
FBA_CMD12[17,20]

FBA_CMD29[17,20]
FBA_CMD6[17,20]
FBA_CMD30[17]

VMA_CLK0[17,20]
VMA_CLK0#[17,20]
FBA_CMD3[17,20]

FBA_CMD0[17,20]
FBA_CMD1[17]
FBA_CMD11[17,20]
FBA_CMD15[17,20]
FBA_CMD25[17,20]

VMA_WDQS1[17,20]
VMA_RDQS1[17,20]

VMA_DM1[17,20]
VMA_DM2[17,20]

VMA_WDQS2[17,20]
VMA_RDQS2[17,20]

FBA_CMD20[17,20]

R409 DR@243_4

GND

FBA_ZQ2

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

G3

DQSL

E7

DML

D3

DMU

C7

DQSU

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

96-BALL
SDRAM DDR3

DR@VRAM _DDR3_HYNIX_256MX16

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

B2

VDD#B2

D9

VDD#D9

G7

VDD#G7

K2

VDD#K2

K8

VDD#K8

N1

VDD#N1

N9

VDD#N9

R1

VDD#R1

R9

VDD#R9

A1

VDDQ#A1

A8

VDDQ#A8

C1

VDDQ#C1

C9

VDDQ#C9

D2

VDDQ#D2

E9

VDDQ#E9

F1

VDDQ#F1

H2

VDDQ#H2

H9

VDDQ#H9

A9

VSS#A9

B3

VSS#B3

E1

VSS#E1

G8

VSS#G8

J2

VSS#J2

J8

VSS#J8

M1

VSS#M1

M9

VSS#M9

P1

VSS#P1

P9

VSS#P9

T1

VSS#T1

T9

VSS#T9

B1

GND

VSSQ#B1

B9

VSSQ#B9

D1

VSSQ#D1

D8

VSSQ#D8

E2

VSSQ#E2

E8

VSSQ#E8

F9

VSSQ#F9

G1

VSSQ#G1

G9

VSSQ#G9

+1.5V_GFX

+1.5V_GFX

C341[email protected]/1 0V_6

C637[email protected]/1 0V_6

C639[email protected]/10V_4
C596[email protected]/10V_4

C393DR@0. 1U/10V _4
C576DR@0. 1U/10V _4

VMA_DQ12 [17,20]
VMA_DQ11 [17,20]
VMA_DQ15 [17,20]
VMA_DQ10 [17,20]
VMA_DQ13 [17,20]
VMA_DQ9 [17,20]
VMA_DQ14 [17,20]
VMA_DQ8 [17,20]

VMA_DQ23 [17,20]
VMA_DQ17 [17,20]
VMA_DQ21 [17,20]
VMA_DQ18 [17,20]
VMA_DQ20 [17,20]
VMA_DQ16 [17,20]
VMA_DQ22 [17,20]
VMA_DQ19 [17,20]

GND

GND

HYU 256Mx16, H5TC4G63AFR-11C QBC PN
MIC 256Mx16, MT41J256M16HA-093G:E QBC PN
SAM 256Mx16, K4W4G1646D-BC1A QBC PN

4

󶁪󶁪󶁪󶁪

AKD5PGWTW08---TOP B/S PN : AKD5PGWTW07

󶁪󶁪󶁪󶁪

AKD5PZSTL01---TOP B/S PN : AKD5PZSTL00

󶁪󶁪󶁪󶁪

AKD5PGWT501---TOP B/S PN : AKD5PGWT502

U22

E3

M8

VREFC_VMA1
VREFD_VMA1

FBA_CMD9
FBA_CMD24
FBA_CMD10
FBA_CMD13
FBA_CMD26
FBA_CMD22
FBA_CMD21
FBA_CMD5
FBA_CMD8
FBA_CMD23
FBA_CMD28
FBA_CMD4
FBA_CMD7
FBA_CMD14
FBA_CMD12

FBA_CMD29
FBA_CMD6
FBA_CMD30

VMA_CLK0
VMA_CLK0#
FBA_CMD3

FBA_CMD0
FBA_CMD1
FBA_CMD11
FBA_CMD15
FBA_CMD25

VMA_WDQS0[17,20]

VMA_RDQS0[17,20]

VMA_DM0[17,20]
VMA_DM3[17,20]

VMA_WDQS3[17,20]

VMA_RDQS3[17,20]

FBA_CMD20

R416 DR@243_4

GND

FBA_ZQ3

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

VDDQ#A1

ODT

L2

CS

VDDQ#A8

J3

RAS

VDDQ#C1

K3

CAS

VDDQ#C9

L3

WE

VDDQ#D2
VDDQ#E9
VDDQ#F1

F3

DQSL

VDDQ#H2

G3

DQSL

VDDQ#H9

E7

DML

D3

DMU

C7

DQSU

B7

DQSU

T2

RESET

L8

ZQ

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2

J1

NC#J1

VSSQ#E8

L1

NC#L1

VSSQ#F9

J9

NC#J9

VSSQ#G1

L9

VSSQ#G9

NC#L9

96-BALL
SDRAM DDR3

DR@VRAM _DDR3_HYNIX_256MX16

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

B2

VDD#B2

D9

VDD#D9

G7

VDD#G7

K2

VDD#K2

K8

VDD#K8

N1

VDD#N1

N9

VDD#N9

R1

VDD#R1

R9

VDD#R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9

VSS#A9

B3

VSS#B3

E1

VSS#E1

G8

VSS#G8

J2

VSS#J2

J8

VSS#J8

M1

VSS#M1

M9

VSS#M9

P1

VSS#P1

P9

VSS#P9

T1

VSS#T1

T9

VSS#T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

VMA_DQ1 [17,20]
VMA_DQ4 [17,20]
VMA_DQ0 [17,20]
VMA_DQ5 [17,20]
VMA_DQ3 [17,20]
VMA_DQ7 [17,20]
VMA_DQ2 [17,20]
VMA_DQ6 [17,20]

VMA_DQ25 [17,20]
VMA_DQ26 [17,20]
VMA_DQ30 [17,20]
VMA_DQ24 [17,20]
VMA_DQ31 [17,20]
VMA_DQ27 [17,20]
VMA_DQ28 [17,20]
VMA_DQ29 [17,20]

+1.5V_GFX

C606[email protected]/1 0V_6

C435DR@0. 1U/10V _4
C395DR@0. 1U/10V _4

+1.5V_GFX

C416[email protected]/1 0V_6

C620DR@0. 1U/10V _4
C345DR@0. 1U/10V _4

GND

3

U25

M8

VREFC_VMA3
VREFC_VMA3[20]
VREFD_VMA3[20]

GND

GND

VMA_CLK1[17,20]
VMA_CLK1#[17,20]
FBA_CMD19[17,20]

FBA_CMD16[17,20]
FBA_CMD17[17]

VMA_WDQS4[17,20]

VMA_RDQS4[17,20]

VMA_DM4[17,20]
VMA_DM7[17,20]

VMA_WDQS7[17,20]

VMA_RDQS7[17,20]

R417 DR@243_4

GND

VREFD_VMA3

FBA_CMD9
FBA_CMD24
FBA_CMD10
FBA_CMD13
FBA_CMD26
FBA_CMD22
FBA_CMD21
FBA_CMD5
FBA_CMD8
FBA_CMD23
FBA_CMD28
FBA_CMD4
FBA_CMD7
FBA_CMD14
FBA_CMD12

FBA_CMD29
FBA_CMD6
FBA_CMD30

FBA_CMD11
FBA_CMD15
FBA_CMD25

FBA_CMD20

FBA_ZQ6

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

G3

DQSL

E7

DML

D3

DMU

C7

DQSU

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

96-BALL
SDRAM DDR3

DR@VRAM _DDR3_HYNIX_256MX16

2

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

B2

VDD#B2

D9

VDD#D9

G7

VDD#G7

K2

VDD#K2

K8

VDD#K8

N1

VDD#N1

N9

VDD#N9

R1

VDD#R1

R9

VDD#R9

A1

VDDQ#A1

A8

VDDQ#A8

C1

VDDQ#C1

C9

VDDQ#C9

D2

VDDQ#D2

E9

VDDQ#E9

F1

VDDQ#F1

H2

VDDQ#H2

H9

VDDQ#H9

A9

VSS#A9

B3

VSS#B3

E1

VSS#E1

G8

VSS#G8

J2

VSS#J2

J8

VSS#J8

M1

VSS#M1

M9

VSS#M9

P1

VSS#P1

P9

VSS#P9

T1

VSS#T1

T9

VSS#T9

B1

VSSQ#B1

B9

VSSQ#B9

D1

VSSQ#D1

D8

VSSQ#D8

E2

VSSQ#E2

E8

VSSQ#E8

F9

VSSQ#F9

G1

VSSQ#G1

G9

VSSQ#G9

VMA_DQ39 [17,20]
VMA_DQ32 [17,20]
VMA_DQ38 [17,20]
VMA_DQ34 [17,20]
VMA_DQ36 [17,20]
VMA_DQ35 [17,20]
VMA_DQ37 [17,20]
VMA_DQ33 [17,20]

VMA_DQ62 [17,20]
VMA_DQ57 [17,20]
VMA_DQ63 [17,20]
VMA_DQ59 [17,20]
VMA_DQ61 [17,20]
VMA_DQ56 [17,20]
VMA_DQ60 [17,20]
VMA_DQ58 [17,20]

+1.5V_GFX

C376[email protected]/1 0V_6

C326DR@0. 1U/10V _4
C394DR@0. 1U/10V _4

GND

+1.5V_GFX

C358[email protected]/1 0V_6

C384DR@0. 1U/10V _4
C407DR@0. 1U/10V _4

GND

GND

VREFC_VMA3
VREFD_VMA3

FBA_CMD9
FBA_CMD24
FBA_CMD10
FBA_CMD13
FBA_CMD26
FBA_CMD22
FBA_CMD21
FBA_CMD5
FBA_CMD8
FBA_CMD23
FBA_CMD28
FBA_CMD4
FBA_CMD7
FBA_CMD14
FBA_CMD12

FBA_CMD29
FBA_CMD6
FBA_CMD30

VMA_CLK1
VMA_CLK1#
FBA_CMD19

FBA_CMD16
FBA_CMD17
FBA_CMD11
FBA_CMD15
FBA_CMD25

VMA_WDQS5[17,20]

VMA_RDQS5[17,20]

VMA_DM5[17,20]
VMA_DM6[17,20]

VMA_WDQS6[17,20]

VMA_RDQS6[17,20]

FBA_CMD20

FBA_ZQ7

R437 DR@243_4

GND

U24

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

G3

DQSL

E7

DML

D3

DMU

C7

DQSU

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

96-BALL
SDRAM DDR3

DR@VRAM _DDR3_HYNIX_256MX16

1

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

B2

VDD#B2

D9

VDD#D9

G7

VDD#G7

K2

VDD#K2

K8

VDD#K8

N1

VDD#N1

N9

VDD#N9

R1

VDD#R1

R9

VDD#R9

A1

VDDQ#A1

A8

VDDQ#A8

C1

VDDQ#C1

C9

VDDQ#C9

D2

VDDQ#D2

E9

VDDQ#E9

F1

VDDQ#F1

H2

VDDQ#H2

H9

VDDQ#H9

A9

VSS#A9

B3

VSS#B3

E1

VSS#E1

G8

VSS#G8

J2

VSS#J2

J8

VSS#J8

M1

VSS#M1

M9

VSS#M9

P1

VSS#P1

P9

VSS#P9

T1

VSS#T1

T9

VSS#T9

B1

VSSQ#B1

B9

VSSQ#B9

D1

VSSQ#D1

D8

VSSQ#D8

E2

VSSQ#E2

E8

VSSQ#E8

F9

VSSQ#F9

G1

VSSQ#G1

G9

VSSQ#G9

VMA_DQ43 [17,20]
VMA_DQ44 [17,20]
VMA_DQ40 [17,20]
VMA_DQ45 [17,20]
VMA_DQ41 [17,20]
VMA_DQ46 [17,20]
VMA_DQ42 [17,20]
VMA_DQ47 [17,20]

VMA_DQ51 [17,20]
VMA_DQ52 [17,20]
VMA_DQ50 [17,20]
VMA_DQ54 [17,20]
VMA_DQ49 [17,20]
VMA_DQ55 [17,20]
VMA_DQ48 [17,20]
VMA_DQ53 [17,20]

+1.5V_GFX

C418[email protected]/1 0V_6

C619DR@0. 1U/10V _4
C420DR@0. 1U/10V _4

GND

+1.5V_GFX

C396[email protected]/1 0V_6

C562DR@0. 1U/10V _4
C428DR@0. 1U/10V _4

GND

GND

+1.5V_GFX

A A

+1.5V_GFX

C412 DR@1U/6.3V_4

C351 DR@1U/6.3V_4
C347 DR@1U/6.3V_4

+1.5V_GFX

C389 DR@1U/6.3V_4 C432 [email protected]/10V_4C594
C344 DR@1U/6.3V_4
C558 DR@1U/6.3V_4
C353 DR@1U/6.3V_4

5

C402 DR@10U/6.3V_6

C392 DR@10U/6.3V_6 C597 DR@10U/6.3V_6

C438 DR@10U/6.3V_6

C400 [email protected]/10V_4
C398 [email protected]/10V_4
C352 [email protected]/10V_4

C348 [email protected]/10V_4
C572 [email protected]/10V_4
C589 [email protected]/10V_4

+1.5V_GFX

+1.5V_GFX

4

C415
[email protected]/25V_4

R737
[email protected]/F_4

R740
[email protected]/F_4

R448
[email protected]/F_4

VREFC_VMA3 VREFD_VMA3

R449
[email protected]/F_4

[email protected]/25V_4

162_1% ohm CS11622FB07 RES CHIP 162 1/16W +-1%(0402)
CS11622FB15 RES CHIP 162 1/16W +-1%(0402)

VMA_CLK1

R418
EV@162_4

VMA_CLK1#

3

+1.5V_GFX

C600 DR@1U/6.3V_4
C433 DR@1U/6.3V_4
C627 DR@1U/6.3V_4
C429 DR@1U/6.3V_4

+1.5V_GFX

C593 DR@1U/6.3V_4
C391 DR@1U/6.3V_4
C409 DR@1U/6.3V_4
C436 DR@1U/6.3V_4

2

+1.5V_GFX

C434 DR@10U/6.3V_6

C401 DR@10U/6.3V_6

C431 [email protected]/10V_4C426 DR@1U/6.3V_4
C424 [email protected]/10V_4

C406 [email protected]/10V_4
C383 [email protected]/10V_4
C427 [email protected]/10V_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

ZRT/ZRTA

PROJECT :

ZRT/ZRTA

PROJECT :

DDR3L - RANK1

DDR3L - RANK1

DDR3L - RANK1

ZRT/ZRTA

21 44

21 44

21 44

of

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Wednesday, February 11, 2015

Wednesday, February 11, 2015

Wednesday, February 11, 2015

Date: Sheet

1

3A

3A

3A

DP TO VGA

5

4

3

2

1

20mils

R266 6515@0_6

DDCCLK_R
DDCDAT_R

VSYNC
HSYNC

C505

0.1u/10V_4

CRT_RED

CRT_GRE

CRT_BLU

IVDDO

TP22

R228 22/J_4

VSYNC [23]
HSYNC [23]

DAC_VDDC

C501

TP29

R253 200/F_4

C510

0.1u/10V_4

CRTVDD5

DAC_VDDC

CRT_RED [23]

CRT_GRE [23]

CRT_BLU [23]

DAC_VDDC

20mils

DDCCLK [23]
DDCDAT [23]

20mils

L2480ohm_100MHz

IVDDO

+3V

D D

C204
10u/6.3V_6

CRT_HPD[2]

C C

IVDDO

30mils

L25 80ohm_100MHz

C520
10u/6.3V_6

B B

20mils

+5V

CRT_TXP0[2]
CRT_TXN0[2]

CRT_TXP1[2]
CRT_TXN1[2]

CRT_AUXP[2]
CRT_AUXN[2]

R268 [email protected]_4
R269 [email protected]_4

IT6515 stuff 0 ohm
IT6516 un-stuff 0 ohm

C209 0.1u/10V_4
C212 0.1u/10V_4

C214 0.1u/10V_4
C218 0.1u/10V_4

C205 0.1u/10V_4
C203 0.1u/10V_4 R229 22/J_4

RX_AVCC

RX_AVCC

RX_IVDD33

C223

C222

*0.1u/10V_4

0.1u/10V_4

CRT_HPD

CRT_TXP0_C
CRT_TXN0_C

CRT_TXP1_C
CRT_TXN1_C

CRT_AUXP_CCRT_AUXP
CRT_AUXN_CCRT_AUXN

+3V

0929 modify

10mils

C4990.1u/10V_4 4.7u/10V_6

10mils

C508*0.1u/10V_4

10mils

C5110.1u/10V_4

20mils

15mils

10

U16

33

HPD

22

RX0P

23

RX0N

25

RX1P

26

RX1N

19

RXAUXP

18

RXAUXN

15

DCAUXP

14

DCAUXN

21

AVCC

27

AVCC

40

OVDD

OVDD

IT6515FN

28

ASPVCC

36

PCSDA

35

PCSCL

PWD

31

R270
*10K_4

RX_IVDD

IVDDO

11

32

30

IVDDO

IVDD3329IVDD33

GND

41

C518

0.1u/10V_4

39

37

IVDD

IVDD20IVDD

IVDD

VGADDCCLK
VGADDCSDA

IT6515FN_ QFN-40

MCUVDDH

URDBG

ISPSCL
ISPSDA

VSYNC

HSYNC

VDDC

RSVD

RSET

VDDA

COMP

IORP

IOGP

IOBP

20mils

C497

0.1u/10V_4

38

24

12
13

17
16

1
2

6

9

8

7

34

3

5

4

5VMCU

R576 *Short_6L16 80ohm_100MHz

IT6515 stuff 0 ohm
IT6516 un-stuff 0 ohm

URDBG

VGA_RST

A A

+3V[2,5,7,8,9,10,11,13,14,15,16,17,18,23,24,25,26,27,28,29,30,31,33,34,35,36,37,38,39]
+5V[23,24,26,27,29,33,37]

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

DP to VGA iT6165

DP to VGA iT6165

DP to VGA iT6165

1

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

22 44Wednesday, February 11, 2015

22 44Wednesday, February 11, 2015

22 44Wednesday, February 11, 2015

3A

3A

3A

1

CRT

1C-1 2014/01/10 Remove U29 and add U40 and U41.

U32

1

A A

HSYNC[22]

VSYNC[22]

OE#

2

HSYNC CRTHSYNC

A

3

GND

M74VHC1GT125DF2G

U34

1

OE#

2

VSYNC CRTVSYNC

A

3

GND

M74VHC1GT125DF2G

LCD CONNECTOR

B B

EDP_AUX_C
EDP_AUX#_C

TP_RST#

R745 *100K_ 4
R746 100 K_4
R475 *10K_4

R748 100 K_4
R749 *100K_ 4

C C

D D

1

2

+5V

C512

0.1u/10V_4

5

VCC

4

Y

+5V

C521

0.1u/10V_4

5

VCC

4

Y

VIN

C410

4.7u/25V_8

C414

1000p/50V_4

+3V

Touch Panel interrupt

TP_INT_PCH[10]

eDP

CCD-USB

Touch Panel

TS_EN[31]

C782
180P/50V_4

2

CRT_RED[22]

CRT_GRE[22]

CRT_BLU[22]

3

Q39
*2N7002K

R471 *0_4

PCH_BRIGHT[2]

EDP_HPD[2]

EDP_AUXP[2]
EDP_AUXN[2]

EDP_TXP1[2]

EDP_TXN1[2 ]

EDP_TXP0[2]

EDP_TXN0[2 ]

EDP_TXP2[2]

EDP_TXN2[2 ]

EDP_TXP3[2]

EDP_TXN3[2 ]

+3V

USBP6+[9]
USBP6-[9]

USBP5+[9]
USBP5-[9]

2

GPIO8[10]

3

1

LCDVCC

3

R472
*10K_4

R469 *short_8

+5V
+3V

C783 180P/50V_4

I2C1_SCL_GPIO7_CONN

I2C1_SDA_GPIO6_CONN

R232

R234

75/F_4

75/F_4

CRTHSYNC CRTHSYNC

CRTVSYNC CRTVSYNC
DDCCLK

DDCDAT DDCDAT

TP_INT

VIN

MAX 1.5A

C419

*1u/6.3V_4

LCDVCC_R

+3V

R742 *Short_6

R741 *Short_6
R744 *0_4

R788 33_4

C604 .1U/16V_4
C605 .1U/16V_4

C616 .1U/16V_4
C617 .1U/16V_4

C622 .1U/16V_4
C623 .1U/16V_4

R761 *short_4
R762 *short_4
R775 *0_4
R754 0_4
R755 0_4
R776 *0_4
C776 *.1U/16V_4
C777 *.1U/16V_4
R765 33_4
C774 *.1U/16V_4
C775 *.1U/16V_4

R786 33_4

C781
180P/50V_4

1C1-2 2014/03/11 Add R698 for TS_EN short TP_INT,

for issue debug.

Hall Sensor (HSR)

+3VPCU

D5
*VPORT_6

21

4

C207
R242
75/F_4

10p/50V_4

CRT_R1 CRT_R1
CRT_G1

TP_PWR

C614

0.1u/10V_4_X7R

R444 *short_8
R445 *short_8

C417

*1u/6.3V_4

USBP5+ _R/TP _CLK

USBP5- _R/TP _DATA

R766 *0_4

R1 *100K_4

R6
*Short_6

C1

4.7u/10V_6

1st:AL009249000 -- BCD
2nd:AL009132001 -- ANC

4

+5V

U35

1

1

2

2

3

GND_3/8

4

4
556

*RClamp0524P

U33

1

1

2

2

3

GND_3/8

4

4
556

*RClamp0524P

C612

1000p/50V_4

CCD_PWR

TP_PWR
TP_RST#

BL_ON
EDP_HPD_R

EDP_AUX_C
EDP_AUX#_C

EDP_TX1_C
EDP_TX1#_C

EDP_TX0_C
EDP_TX0#_C

USBP6+ _R
USBP6- _R

EDP_TX2_C
EDP_TX2#_C

EDP_TX3_C
EDP_TX3#_C

TP_INT

TP_INTTS_EN

MR1
AH9249NTR -G1

231

C211

10p/50V_4

V_BLIGHT

Q20

1

3

OUT

IN

2

GND

AP2331 SA-7

L13 BLM15BB470SN1D

L14 BLM15BB470SN1D

L15 BLM15BB470SN1D

C216

10p/50V_4

10

10

9

CRTVDD5CRTVDD5

9

7

7

6

DDCCLK

10

10

9

CRT_G1

9

7

7

6

CRT_B1CRT_B1

CCD_PWR

C610

0.1u/10V_4_X7R

CN19

G_5

40
39
38
37
36
35
34
33
32

G_4

31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

G_1
9
8
7
6
5
4
3
2
1

G_0

R789 33_ 4

21

D6
*VPORT_6

5

C215

10p/50V_4

C608

1000p/50V_4

50398-04071-001

LID#

C784
180P/50V_4

5

CRTVDD5

C224 *0.1u/10V_4

CRTVDD5

CRT_R1

CRT_G1

CRT_B1 CRTHSYNC

C206

C210

10p/50V_4

10p/50V_4

C225 *0.22u/6.3V_4

C228 *220p/50V_4

C229 0.1u/10V_4

C517 10p/50V_4

C515 10p/50V_4

C519 *10p/50V_4

C507 *10p/50V_4

LCD Power

R466 *short_4

EDP_VDD_EN[2 ]

Touch screen level shift I2C(reserve)

I2C1_SDA_GPIO6[10]
I2C1_SCL_GPIO7[10]

PCH_BLON[2]

PCH_BLON_EC[31]

6

CN17

1617

6

111

CRT_11

7

12

2

DDCDAT

8

13

3
9

14

4

CRTVSYNC

10

15

5

DDCCLK

CRT CONN

CRTVDD5

CRTVSYNC

CRTHSYNC

DDCCLK

DDCDAT

+3V

C440

1u/6.3V_4

EDP_VDD_EN_R

R470

100K_4

R476 *0_4

1

4 3

*2N7002DW

R474 *0_4

R454 *short_4
R461 *short_4

1B-3 2013/12/10 change Q3.3 from +3V to +3VPCU.

6

U26

6

4

3

G5243AT11U

Q40

PCH_BLON_R

R460
100K_4

2N7002DW

TP68

IN

IN

ON/OFF

6

2

5

Q38

I2C1_SDA_GPIO6_CONN

I2C1_SCL_GPIO7_CONN

R434

10K_4

7

DDCDAT [22]

DDCCLK [22 ]

DDCDAT
DDCCLK

R5792.2K_4
R5942.2K_4

Power trace tracking

+3VPCU[7,8,10,11,13,25,26,27,28,2 9,31,32,33,37,38,39]

1

OUT

2

GND

5

GND

+3V

R473

R477

*10K_4

*10K_4

+3V

+3V

R455

10K_4

BL#

6

215

4 3

7

C439

C423

*2.2u/10V_8

*0.1u/10V_4

TPD->100kHz,TS=400Khz
Intel design guide suggestion
MCP PIN 10u.
Per inch 3u TS=3x5inch
400kHz10~100u =2.4~0.4k.
100Khz 10~100u=9k~1k.

+3VPCU

R438
*100K_4

LID#

LID591#,EC intrnal PU

D22
1N4148WS

BL_ON

2

Q37
DTC144EUA

1 3

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

PROJECT :

CRT/LVDS/CAMERA/LID

CRT/LVDS/CAMERA/LID

CRT/LVDS/CAMERA/LID

8

CRTVDD5

+3V[2,5,7,8,9,10,11,13,14,15,16 ,17,18,22,24,25,26,27,28,29,30,31,33,34,35,36,37,38,39]
+5V[22,24 ,26,27,29,33,37]

VIN[27 ,29,32,33,34,35,36,37,38,39 ]

LCDVCC

LCDVCC

C421

C422

0.01U/25V_4

LID# [31]

EC_FPBACK# [31]

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

of

of

of

23 44Wednesday, February 11, 2015

23 44Wednesday, February 11, 2015

23 44Wednesday, February 11, 2015

8

C425

22u/6.3V_8

1A

1A

1A

0.1u/10V_4

5

4

3

2

1

HDMI

From PCH

INT_HDMITX2 N[2]
INT_HDMITX2 P[2]

INT_HDMITX1 N[2]
INT_HDMITX1 P[2]

INT_HDMITX0 N[2]
INT_HDMITX0 P[2]

D D

INT_HDMICL K+[2 ]
INT_HDMICL K-[2 ]

C C

C130 0.1u/10V_4
C129 0.1u/10V_4

C141 0.1u/10V_4
C139 0.1u/10V_4

C132 0.1u/10V_4
C131 0.1u/10V_4

C148 0.1u/10V_4
C151 0.1u/10V_4

1B-1 20131108 Change +5V to +3V for DG.

INT_HDMITX2 N_C
INT_HDMITX2 P_C

INT_HDMITX1 N_C
INT_HDMITX1 P_C

INT_HDMITX0 N_C
INT_HDMITX0 P_C

INT_HDMICL K+_C
INT_HDMICL K-_C

+5V

*100K/F_4

2

R521

12

12

12

R145

R161

R159

470_4

470_4

470_4

3

Q44

2N7002E

1

12

12

R148

470_4

12

12

R150

470_4

12

R153

R140

R143

470_4

470_4

470_4

+5V

Q10

1

3

OUT

IN

2

AP2331SA-7

GND

C153
*220p/50V_4

D21
*AZ5125-01J

HDMI_MB_HPD

HDMI-detect

INT_HDMI_H PD[2]

INT_HDMITX0 P_C

INT_HDMITX0 N_C
INT_HDMITX1 P_C

INT_HDMITX1 N_C
INT_HDMITX2 P_C

INT_HDMITX2 N_C
INT_HDMICL K+_C

INT_HDMICL K-_C

HDMI_DDCCLK_MB
HDMI_DDCDATA_MB

HDMI_5V

R527 *short_4

12

R529
20K_4

R526
1M_4

1

+3V+3V

HP_DET_CN

2

Q47
2N7002K

HDMI connector

3

HDMI_MB_HPD

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19

CN12

D2+
D2 Shield
D2­D1+
D1 Shield
D1­D0+
D0 Shield
D0­CK+
CK Shield
CK­CE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET

HDMI connector

SHELL1

SHELL2

20

23

GND

22

GND

21

I2C

B B

From PCH

HDMI_DDCCLK_SW[2]

HDMI_DDCDATA_SW[2]

A A

5

4

+3V

R519

2.2K_4

1

+3V

R523

2.2K_4

1

+5V+3 V

21

D24
RB501V-40

Q45

2N7002K

Q46

2N7002K

R520

2.2K_4

3

3

+5V

21

D26
RB501V-40

R524

2.2K_4

HDMI_DDCCLK_MB

HDMI_DDCDATA_MB

Power trace tracking

+3V[2,5,7,8,9,10,1 1,13,14,15,16 ,17,18,22,23 ,25,26,27,28,29,30,31,33,34,35,36,37,38,39]
+5V[22,23,26,27 ,29,33,37]

3

2

EMI

INT_HDMITX2 P_C

R141 *120/F_4

INT_HDMITX2 N_C

INT_HDMITX1 P_C

R152 *120/F_4

INT_HDMITX1 N_C

INT_HDMITX0 P_C

R147 *120/F_4

INT_HDMITX0 N_C

INT_HDMICL K+_C

R160 *120/F_4

INT_HDMICL K-_C

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

PROJECT :

HDMI (PS8101)

HDMI (PS8101)

HDMI (PS8101)

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

24 44Wednesday, February 11, 2015

24 44Wednesday, February 11, 2015

24 44Wednesday, February 11, 2015

1

1A

1A

1A

of

of

of

2

+3V

2

5

LAN

D D

LANVCC

40 mils (Iout=1A)

C157

C156

0.1U/10V_4

C C

10U/6.3V_6

LANVCC

LANVCC

4

VDD10

33

1
2
3
4
5
6
7
8

U9

GND

MDIP0
MDIN0
AVDD10(NC)
MDIP1
MDIN1
MDIP2(NC)
MDIN2(NC)
AVDD10

RSET

10 mils

RTL8111H-CG

R203 2.49K/F_4

MDI_0+
MDI_0-

VDD10

MDI_1+
MDI_1­MDI_2+
MDI_2- GPP_TX3N_LAN

VDD10

MDI_3+
MDI_3-

C179 *10P/50V/COG_4

TP16
TP17
TP13

C169 *10P/50V/COG_4

27

28

31

32

30

26

25

LED0

RSET

AVDD33

AVDD10

CKXTAL229CKXTAL1

LED1/GPO

LED2(LED1)

REGOUT

VDDREG(VDD33)

DVDD10(NC)
LANWAKEB

ISOLATEB

PERSTB

HSON
HSOP

HSIP13HSIN14REFCLK_P15REFCLK_N

CLKREQB

AVDD33(NC)11MDIP3(NC)9MDIN3(NC)

16

12

10

PCIE_REQ_LAN#_R

3

LAN_XTALI

C167 10p/50V_4

1

2

Y1

25MHZ +-30PPM

4

3

LAN_XTAL2

C168 10p/50V_4

24

REGOUT

23

LANVCC

22

VDD10

21

PCIE_LAN_WAKE#_R

20

ISOLATEB

19
18
17

GPP_TX3P_LAN

ISOLATEB

C159 0.1U/10V_4
C158 0.1U/10V_4

+3V

R191
1K_4

R186
15K_4

CLK_PCIE_LANN [9]
CLK_PCIE_LANP [9]

PCIE_TX3-_LAN [9]

PCIE_TX3+_LAN [9]

R187 *0_4

R184 AC@0_4

R182 NAC@0_4

PCIE_RX3-_LAN [9]

PCIE_RX3+_LAN [9]

2

(1.5A) 60 mils

IOAC_LANPWR#[31 ]

PCIERST# [28]

IOAC_RST# [28,31]

PLTRST# [7,13,16,27,28,31]

PCIE_LAN_WAKE#[7 ,28]

+3V_S5

+3VPCU

C176

AC@1u/6 .3V_4

R202 AC@10K_4

CLK_PCIE_LAN_REQ#[9]

LAN_WAKE#[31 ]

R215 NAC@0_8

3

1

Q15
AC@AO341 3

2

R210
AC@100 K_4

S0 IOAC

3

S5 IOAC

R195 *short_4

R194 0_4

R188 *0_4

R205 *short_8

R204 *0_8

LANVCC

2

Q11
AC@2N70 02K

R174 NAC@0_4

LANVCC

R193 1K_4

2

Q13
DTC144EUA

13

1

40 mils

LANVCC

REGOUT

50 mils

+3V

R175
AC@10K/ J_4

1

PCIE_REQ_LAN#_R

PCIE_LAN_WAKE#_R

* Place 0.1uF CAP close to pin-- 24

LANVCC

40 mils (Iout=1A)

C173

C165

0.1U/10V_4

0.1U/10V_4

* Place 0.1uF CAP close to each
VDD33 pin-- 11, 32

B B

Tramsformer

U12

1

IO1

2

REF5GND

IO23IO3

*CM1293A-04SO

U8

1

IO1

2

REF5GND

IO23IO3

*CM1293A-04SO

1003 modify

Reserve for Surge

A A

Line to GND TVS

IO4

IO4

6

MDI_0-_CMDI _0+_C

4

MDI_1+_CMDI_1-_C

6

MDI_2-_CMDI_2+_C

4

MDI_3+_CMDI_3-_C

5

For Surge improvement
C5117\C5111 cl ose
to pin 11,23.

LANVCC

LANVCC

C166

*4.7U/6.3V_6

C164

0.01U/50V/X7R_4

C171

40 mils (Iout=1A)

*4.7U/6.3V_6

MDI_0+

MDI_0-

MDI_1+

MDI_1- MDI_1-_C

MDI_2+

MDI_2-

MDI_3+

MDI_3-

R199 1/F_4

R196 1/F_4

R190 1/F_4

R185 1/F_4

R181 1/F_4

R179 1/F_4

R172 1/F_4

R173 1/F_4

MDI_0+_C

MDI_0-_C

MDI_1+_C

MDI_2+_C

MDI_2-_C

MDI_3+_C

MDI_3-_C

U31

24

MCT0

1

TCT0

2

TD0+

3

TD0-

4

TCT1

5

TD1+

6

TD1-

7

TCT2

8

TD2+

9

TD2-

10

TCT3

11

TD3+

12

TD3-

4

GND_LAN

GND

GST5009B LF

25

23

TX0+

22

TX0-

21

MCT1

20

TX1+

19

TX1-

18

MCT2

17

TX2+

16

TX2-

15

MCT3

14

TX3+

13

TX3-

LAN_MCT3

LAN_MX0+

LAN_MX0-

LAN_MCT2

LAN_MX1+

LAN_MX1-

LAN_MCT1

LAN_MX2+

LAN_MX2-

LAN_MCT0

LAN_MX3+

LAN_MX3-

1003 change 0603 type

R201 75/F_ 6

R197 75/F_ 6

R183 75/F_ 6

R178 75/F_ 6

LANCT3

220p/3KV_1808

C485

REGOUT

GND_LAN

3

C482

0.1U/10V_4

40 mils (Iout=1A)

R530 *short_8

* Place 1uF CAP close to each VDD10 pin-- 22 (reserve)

* Place 0.1uF CAP close to each
VDD10 pin-- 3, 8, 22, 30

40 mils (Iout=1A)

C476

C480

0.1U/10V_4

0.1U/10V_4

RJ45 Connector

0930 modify

2

C479

0.1U/10V_4

LAN_MX0+
LAN_MX0­LAN_MX1+
LAN_MX2+
LAN_MX2­LAN_MX1­LAN_MX3+
LAN_MX3-

C481

0.1U/10V_4

VDD10

C477

C478

1U/6.3V_4

0.1U/10V_4

CN13

1
2
3
4
5
6
7

9

8

10

LAN_RJ45

GND_LAN

Power trace tracking

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROJECT :

LAN (RTL8111GS )

LAN (RTL8111GS )

LAN (RTL8111GS )

Wednesday, February 11, 2015

Wednesday, February 11, 2015

Wednesday, February 11, 2015

R221 *Short_6
C195 *0.1U/10V_4
C194 *0.1U/10V_4
C193 *0.1U/10V_4
C192 *0.1U/10V_4

GND_LAN

+3V[2,5,7,8,9,10,11,13,14,15,16 ,17,18,22,23,24,26,27,28,29,30,31,33,34,35,36,37,38,39]

+3V_S5[5,7,8,9,10,11,13,27 ,29,31,33,36,38]

+3VPCU[7,8,10,11,13,23,26,27 ,28,29,31,32,33,37,38,39]

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

1

1A

1A

1A

4425

4425

4425

5

Codec(ADO)

D D

+1.5VA

C35

C34

10u/6.3V_4

0.1u/10V_4

ADOGND

Place next to pin 40

Analog

Digital

+5VAA

+5VAA

C C

C49

10u/6.3V_4

C39

10u/6.3V_4

C50

0.1u/10V_4

near Codec

R37 *shor t_4
R57 *shor t_4
R22 *shor t_4
R55 *shor t_4
R35 *shor t_4

C20 *1000p/50 V_4

ADOGND

+5V

C22

*0.1u/10V_4

C54 *1000p/50 V_4

C33

*10u/6.3V_6

R38 *0_4

B B

A A

C730, C787 close U37 pin3 and L65

5

placed close to codec

ADOGND

C29 10u/6 .3V_4

L_SPK+

C41

L_SPK-

0.1u/10V_4
R_SPK-

near Codec

Low is power down
amplifier output

R_SPK+

PD#

TP10

R71 *Short_6

+3V

Place next to pin 1

DMIC_DAT_L

DMIC_CLK_L

+5V

1U/6.3V_4

ANALOG DIGITAL

L7 HCB2012KF220T60/6A/22ohm_8

U3

4

3

OUT

IN

2

GND

5

1

SHDN

*G923-330T1UF

R46 *29.4K/F _4

SET

R41
*10K/F_4

ADOGND

C30

1u/10V_4

C58

0.1u/10V_4

C46

+AZA_VDD

37

CBP

38

AVSS2

39

LDO2-CAP

40

AVDD2

41

PVDD1

42

SPK-L+

43

SPK-L-

44

SPK-R-

45

SPK-R+

46

PVDD2

47

PDB

48

SPDIFO/GPIO2

49

DGND

+AZA_VDD

C59

10u/6.3V_4

R73 *shor t_4

R83 22_4

C67
10p/50V_4

L10

PBY160808T-600Y- N(60,3A)

C47

10u/6.3V_4

+3VPCU[7,8,10,11,13,23,25,27,28,29,31,32,33,37,38,39]

+1.5V[11,28,37]

4

HPR

HPL

LINE1L-VREFO

LINE1R-VREFO

MIC2-VREFO

CODEC_VREF

32

31

30

HP-OUT-L

LINE1-VREFO- L

ALC255

C57

10u/6.3V_4

+5VAA

INT_AMIC-VREFO

27

29

28

VREF

LDO1-CAP

MIC2-VREFO

LINE1-VREFO- R

ACZ_SDIN

C63 *22p/50V_4

26

MIC2-R/SLEEVE

R82 33_4

C251u/10V _4

C2710u/6.3V _4

35

34

36

33

CBN

CPVEE

CPVDD

HP-OUT-R

DVDD1GPIO0/DMIC-DATA2GPIO1/DMIC-CLK3DVSS4SDATA-OUT5BIT-CLK6LDO3-CAP7SDATA-IN8DVDD-IO9SYNC10RESETB11PCBEEP

DMIC_DAT_R

DMIC_CLK_R

Mute(ADO)Codec PWR 5V(ADO)

+5VA

C31

C32

*0.1u/10V_4

*10u/6.3V_6

ADOGND

+3V[2,5,7,8,9,10,11,13,14,15,16,17,18,22,23,24,25,27,28,29,30,31,33,34,35,36,37,38,39]
+5V[22,23,24,27,29,33,37]

Internal Speaker

4

C24 2.2U/6. 3V_4

C23 10u/6.3V_ 4

R42 100K_4

25

U4

AVSS1

AVDD1

24

LINE2-L

23

LINE2-R

22

LINE1-L

21

LINE1-R

20

NC

19

MIC1-CAP

18

17

MIC2-L/RING2

16

MONO-OUT

15

JDREF

14

Sense B

13

Sense A

12

1.6Vrms

PCBEEP BEEP_1

C61 0.1u/10V_ 4

PCH_AZ_CODEC_RST#

40mil for each signal

R_SPK+

R18 *Shor t_6

R_SPK-

R17 *Shor t_6

L_SPK-

R16 *Shor t_6

L_SPK+

R14 *Shor t_6

ADOGND

ADOGND

+5VA

C26

C28

0.1u/10V_4

10u/6.3V_4

Place next to pin 26

ADOGND

LINE2-L

T1

LINE2-R

T2

LINE1L_R

LINE1R_R

R52 0_6

+3VPCU

C37 10u/6.3V_4

SLEEVE

RING2

R63 200K_ 4

R68 100K_ 4

Placement near Audio Codec

C65

100p/50V_4

PCH_AZ_CODEC_RST# [8]

PCH_AZ_CODEC_SYNC [8]

PCH_AZ_CODEC_SDIN0 [8]

PCH_AZ_CODEC_BITCLK [8]

PCH_AZ_CODEC_SDOUT [8]

R75

4.7K_4

+AZA_VDD

R74 22K_4

DVDD_IO

R69

*1K_4

R65
*10K_4

ADOGND

1003 change 0603type

C6

C7

*68p/50V_4

*68p/50V_4

3

HP_JD#SENSEA

D20 RB500V -40

D19 RB500V -40

C70

0.1u/10V_4

D18 RB500V-40

D17 RB500V-40

R_SPK+_1
R_SPK-_1
L_SPK-_1
L_SPK+_1

C5

*68p/50V_4

3

+3V

Analog

Digital

R92 *shor t_4

R93 *0_ 4

C55

10u/6.3V_4

Place next to pin 9

AMP_MUTE#

PCH_AZ_CODEC_RST#PD#

SPK_CONN_4P

C4

*68p/50V_4

Grounding circuit(ADO)

PIN1, PIN4, PIN3, PIN6 are ANALOG

ADOGND

D-Mic

+3V

DMIC_DAT_L

R166 0_4

DMIC_CLK_L DMIC_CLK_C

R165 0_4

1.Single DMIC
KMM47237626-06DT (AL472376000) (MAIN)



SPM0437HD4H (AL000437000)

2.Dual DMIC

KMM47237622-10DT(AL472376001) (MAIN)

NSM0410DT (W/ Fortemedia algorithm)



Main MIC CS need connect to second MIC DATA



SPKR [8,10]

Universal Audio Jack

PCBEEP_EC [31]

+3V +1.5V

HPL HPL_SY S

LINE1R_R

LINE1L_R

LINE1R-VREFO

LINE1L-VREFO

AMP_MUTE# [31]

Codec PWR 3V/1.5V(ADO)

CN4

6
345
2
1

1

4 3

R180 0_4

C163

*0.1u/10V_4

MIC2-VREFO

40mils

RING2

SLEEVE

40mils

R21

*1K_4

4.7u/6.3V_4C10

4.7u/6.3V_4C8

R20 4.7K_4

R19 4.7K_4

+1.5V

2

*2N7002DW

Q5

+3VDMIC2

L3 *Short_6R11 *shor t_4

L2 *Short_6

R15

*1K_4

1U/6.3V_4

2

+3VPCU

R67

6

SLEEVE

2

RING2

5

C160 10p/50V_4
C161 10u/6.3V_4

6

5

4

C162
*0.1u/10V_4

R31

2.2K_4

C17

U10

VDD

DATA

D-MIC

*100K_4

1

Dual_EN

GND

2

CS

GND3CLK

Dual_EN

R176 DM@0_ 4

R170 SM@0_ 4

DMIC_CS DMIC_ CS2

R207 *0_ 4

R206 SM@0_ 4

R12

2.2K_4

L1 *short_4

L4 *short_4

HPR-1

R23 56/F_4

HPL-1

R13 56/F_4

C3

2200P/50V_4

SLEEVE_R

D10 *VPORT 0402 151 MV0521

HPR_SY S

D9 *VPORT 0402 151 MV0 521

HPL_SY S

D8 *VPORT 0402 151 MV0 521

RING2_R

D7 *VPORT 0402 151 MV0 521

ESD 2'nd CY00G050B00

R40 *shor t_4

1

+3V

R88

3

*100K_4

2

R91 *10 K_4

Q6

*2N7002K

C71
*1u/10V_4

1

+3V

DMIC_CS

DMIC_CLK_L

C154

*0.1u/10V_4

RING2_R

SLEEVE_R

C13

2200P/50V_4

C14

*100P/50V_4

ANALOG DIGITAL

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

+3VDMIC

R213 DM@0_4

R163 DM@0_4

DMIC_DAT_DDMIC_DAT_L

R169 *0_4

DMIC_CLK_D

R168 DM@0_4

C155
*0.1u/10V_4

+3VDMIC2

+3VDMIC2 +3VDMIC

SLEEVE_R
HPR_SY SHPR
HP_JD#

RING2_R

C2

*100P/50V_4

ADOGNDADOGND ADOGND

ADOGND

+1.5VA

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

ALC283/HP/SPK

ALC283/HP/SPK

ALC283/HP/SPK

Wednesday, February 11, 2015

Wednesday, February 11, 2015

Wednesday, February 11, 2015

1

PCH_AZ_CODEC_RST#

C170 DM@10p/50V_4
C177 DM@10u/6.3V_4

U11

6

VDD

5

DATA

4

DM@D-MIC

R177 *0_ 4

R171 DM@0_ 4

CN3

4
2
6
5
7
1
3

COMBOJACK

Normal Open
PIN1 --> L
PIN2 --> R
PIN3 --> GND/MIC
PIN4 --> MIC/GND
PIN5 --> GND
PIN6 --> JD
PIN7 --> Shielding

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

1

+3VDMIC

GND

2

DMIC_CS2DMIC_DAT_C

CS

GND3CLK

4426

4426

4426

3B

3B

3B

5

4

3

2

1

2.5" SATA HDD (HDD) SATA ODD Connector(ODD)

CN10

23

GND23

1

GND1

2

RXP
RXN

GND2

D D

TXN
TXP

GND3

3.3V

3.3V

3.3V
GND
GND
GND

GND

RSVD

GND

12V
12V
12V

GND24

HDD CONN

SATA_TXP0_C

3

SATA_TXN0_C
4
5

SATA_RXN0_C
6

SATA_RXP0_C
7

8
9
10

DEVSLP0_R
11
12
13
14

5V

15

5V

16

5V

17
18
19
20
21
22

24

R97 *0_4

+5V_HDD

R778 *0_4

60mil

DEVSLP0 [10]

G_INT2 [29]

C52 0.01U/25V_4
C53 0.01U/25V_4

C42 0.01U/25V_4
C43 0.01U/25V_4

C97

0.01U/25V_4

C96

0.01U/25V_4

SATA_TXP0 [8]
SATA_TXN0 [8]

SATA_RXN0 [8]
SATA_RXP0 [8]

C92
*0.1u/16V_4

C91
*0.1u/16V_4

C89
10u/6.3V_6

R111 *short_8

+

C102

*100u/6.3V_3528

CN15

14

GND14

1

GND1

2

RXP

RXN

GND2

TXN
TXP

GND3

GND
GND

GND15

6030D-13G20

+5V
+5V

MD

+5V

SATA_TXP1_C

3

SATA_TXN1_C
4
5

SATA_RXN1_C
6

SATA_RXP1_C
7

SSD_ID

8

DP

9
10
11
12
13

15

R231 10K_4
R780 33_4

C503

0.01U/25V_4

R785 33_4

C189 0.01U/25V_4
C196 0.01U/25V_4

C200 0.01U/25V_4
C201 0.01U/25V_4
R781 10K_4

+3V

C208 180P/50V_4

+5VODD

C496

C509

*0.1u/16V_4

0.01U/25V_4

R239 10K_4

C780 180P/50V_4

+3V

SATA_TXP1 [8]
SATA_TXN1 [8]

SATA_RXN1 [8]
SATA_RXP1 [8]

ODD_PRSNT# [8]

C500

*0.1u/16V_4

EC_ODD_EJ [31]

C495

10u/6.3V_6

+3V

R782
100K_4

R561 *short_8

+

C493

*100u/6.3V_3528

H:SSD
L:ODD

DEVSLP_ODD [8]

+5V_ODD

C C

ODD Power (ODD) EMI

PLTRST#

ODD_EN

12

LPC_LAD3[8,28,31]
LPC_LAD2[8,28,31]
LPC_LAD1[8,28,31]
LPC_LAD0[8,28,31]

LPC_LFRAME#[8,28,31]

IRQ_SERIRQ[10,31]

PCLK_TPM[9]

R493 TPM_N@0_4
R492 *short_4

R109 *4.7K_4

ODD_POWER[31 ]

PCH_ODD_EN[10]

B B

TPM NPCT650 (TPM)

TPMM 1.2

TPMM 2.0

A A

R571 AC@0_4

R575 *0_4

AL009655K01

AL000650K01

CLKRUN#[7,31]
PLTRST#[7,13,16,25,28,31]

5

R574
*100K

+3VPCU

12

R544
AC@100K

ODD_EN_Q

4 3

+3V

R491 *Short_6

LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0
LPC_LFRAME#
IRQ_SERIRQ
PCLK_TPM

TPM_CL KRUN#CLKRUN#
TPM_L RESET#

LPCPD

215

TPM@10 u/6.3 V_6C458
TPM@0. 1u/10 V_4C459
TPM@0. 1u/10 V_4C460
TPM@0. 1u/10 V_4C469

17
20
23
26
22
27
21

15
16
28

+15V

6

U29

LAD3
LAD2/SPI_IRQ
LAD1/MOSI
LAD0/MISO
LFRAME/SCS
SERIRQ
LCLK/SCLK

CLKRUN/GPIO04
LRESET/SPI_RST
LPCPD

+5V

R560

12

AC@100K

AC@2N7002DW
Q51

+3V3_TPM

24

19

VDD3

4

Q49
AC@AO6402A

6
5
2
1

MOD_EN_5V

3

12

+3V3_TPM_VS B

R512 TPM_N@0_6
R516 *0_6

10

5

VSB

VDD1

VDD2

GPIO0/XOR_OUT

GPIO3/BADD

GND2

GND14GND318GND4

TPM@NP CT650

11

25

4

ODD_EN_Q

C491
[email protected]/25V_6

SLB9655 STUFF

R517 TPM_S@0_6

TPM@10 u/6.3 V_6C467
TPM@0. 1u/10 V_4C468

7

PP

6

GPX/GPIO2

2

GPIO1

1
9
8

TEST

3

NC1

12

NC2

13

NC3

14

NC4

+5V_ODD

R537 NAC@0_8

R538
AC@22_8

3

2

Q48

AC@DMN601K-7

1

+3V

+3V_S5

+3VSUS

SLB9655 STUFF

TPM_P P

R513 *4.7K_4

GPX

R507 TPM_S@0_4

TPM_B ADD

R508 *10K_4

R509

SLB9655 STUFF

BADD SELECTION

01EEh - EFh

7Eh - 7Fh

'1' - pin is left open.
'0' - pin is pulled down.

GPXLPCPD

R506 [email protected]_4

SLB9655 STUFFSLB9655 STUFF

+5V

TPM_L RESET#
TPM_S @0_4

+3V3_TPM+3V3_TPM

3

+3V3_TPM

HOLE1
*H-TC315BC354D118P2

1

HOLE8

HOLE9

*O-ZRTA-3

*O-ZRTA-2

1

1

HOLE16
*H-TC315BC354D134P2

1

HOLE23
*O-ZRZ-7

1

VIN VIN

C766
*0.1u/50V_6

+1.5V_GFX

HOLE2
*O-ZRTA-5

1

HOLE10
*o-zrt-1

1

HOLE17
*H-TC315BC354D217P2

1

VIN

C767
*0.1u/50V_6

+1.5V_GFX

HOLE3
*H-TC315BC354D118P2

1

HOLE11
*h-tc256ic201bc236d16 1p2

1

HOLE18
H-C236D142P2

1

2

VIN

C768

C769

*0.1u/50V_6

*0.1u/50V_6

+1.5V_GFX

HOLE5

HOLE4

*H-O138X114D138X11 4N

*H-C118D118

1

1

HOLE12
*h-tc256ic201bc236d16 1p2

1

HOLE19
EV@MBZRQ001010

1

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

HOLE6
*H-TC315BC354D134P2

1

HOLE13

HOLE14

*O-ZRTA-1

*O-ZRTA-4

1

1

HOLE20
EV@MBZRQ001010

HOLE21
*H-C256D134P2

1

HDD/ODD/TPM NPCT650

HDD/ODD/TPM NPCT650

HDD/ODD/TPM NPCT650

1

+3VPCU[7,8,10 ,11,13,23,25,26,28,29,31,32 ,33,37,38,39]

+3V_S5[5,7,8,9,10,11,13,25,2 9,31,33,36,38]

+3V[2,5,7,8,9,10,11,13,14 ,15,16,17,18,22,23,24,25,26 ,28,29,30,31,33,34,35,36,37,38,39]
+5V[22,23,24,26,29,33,37]

+3VSUS[4,29,33]

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

1

HOLE7
*H-O152X92DO152X92 N

1

HOLE15
*h-tc256ic201bc236d16 1p2

1

HOLE22
*O-ZRZ-6

1

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

27 44Wednesday, February 11, 2015

27 44Wednesday, February 11, 2015

27 44Wednesday, February 11, 2015

of

of

of

1A

1A

1A

5

NGFF WiFi & BT (NGF)

4

3

2

1

+3VPCU[7,8,10,11,13,23,25,26,27,29,31,32,33,37,38,39]

+1.5V[11,26,37]

+3V[2,5,7,8,9,10,11,13,14,15,16,17,18,22,23,24,25,26,27,29,30,31,33,34,35,36,37,38, 39]

CN14

NGFF

1

GND

+1.5V

IOAC_WLANPWR#

+WL_VDD

5

2

6

4

3

USB_D+

5

USB_D-

7

GND

9

SDIO CLK(O)

11

SDIO CMDIO)

13

SDIO DAT0(IO)

15

SDIO DAT1(IO)

17

SDIO DAT2(IO)

19

SDIO DAT3(IO)

21

SDIO Wake(I)

23

SDIO Reset

25

KEY1

27

KEY2

29

KEY3

31

KEY4

33

GND

35

PETp0

37

PETn0

39

GND

41

PERp0

43

PERn0

45

GND

47

REFCLKP0

49

REFCLKN0

51

GND

53

CLKREQ0#

55

PEWake0#

57

GND

59
61
63
65
67
69
71
73
75

+WL_VDD

NFC I2C SM DATA

PETp1

NFC I2C SM CLK
PETn1
GND
PERp1
PERn1
GND
Reserved1
Reserved2
GND

WLAN_NGFF CONN(Type 2230)

1

R189
*100K_4

R540

IOAC

4.7K_4

WLAN_CLKREQ#

R569 *short_4

R568 *0_4

PCM_SYNC

PCM_OUT

UART Wake

UART CTS
UART RTS

Clink RESET

CLink DATA

CLink CLK

SUSCLK(32KHz)

W_DISABLE#2
W_DISABLE#1

NFC I2C IRQ

NFC Reset#
RESERVED3
RESERVED4
RESERVED5

2

D D

C C

B B

PCIE_CLKREQ_WLAN#[9]

A A

USBP4+[9]

USBP4-[9]

PCIE_TX4+_WLAN[9]
PCIE_TX4-_WLAN[9]

PCIE_RX4+_WLAN[9]
PCIE_RX4-_WLAN[9]

CLK_PCIE_W LANP[9]
CLK_PCIE_W LANN[9]

CLK_PCI_LPC[9]

LPC_LFRAME#[8,27,31]

WLAN_WAKE_R#

5

USBP4+
USBP4-

PCIE_TX4+_WLAN
PCIE_TX4-_WLAN

PCIE_RX4+_WLAN
PCIE_RX4-_WLAN

CLK_PCIE_W LANP
CLK_PCIE_W LANN

CLK_PCI_LPC
LPC_LFRAME#

R536 * 0_4
R535 * 0_4

R564

4.7K_4

S0

S5

WLAN_CLKREQ#
WLAN_WAKE_R#

CLK_PCI_LPC_C
LPC_LFRAME#_C

Q50

4 3

1

2N7002DW

R539 *0_4

R563 *0_4

3.3Vaux

3.3Vaux
LED#1

PCM_CLK

PCM_IN

LED#2

GND

UART Rx

Key 5
Key 6
Key 7
Key 8

UART Tx

COEX3
COEX2
COEX1

PERST0#

3.3Vaux

3.3Vaux

3

Q12
*AO3413

WLAN_WAKE# [31]

PCIE_LAN_WAKE# [7,25]

+WL_VDD

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64

LPC_LAD0_C

66

LPC_LAD1_C

68

LPC_LAD2_C

70

LPC_LAD3_C

72

+WL_VDD

74

+1.5V_WLAN_R

SUSCLK
WLAN_RST#

RF_EN_R

R200 *0_6

3

10u/6.3V_6C213

0.1u/10V_4C483

0.1u/10V_4C484

0.1u/10V_4C502

0.1u/10V_4C504

R542 *0_4

R541 AC@0_4

R550 NAC@0_4

R783 33_4

R534 *0_4
R533 *0_4
R532 *0_4
R531 *0_4

+1.5V_WLAN

IOAC_WLANPWR#[31]

C779 180P /50V_4

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

+3VPCU

Mini card +3V power disableHigh

R792
*10K_4

SUSCLK

C684
*22P/50V_4

PCIERST# [25]

IOAC_RST# [25,31]

PLTRST# [7,13,16,25,27,31]
BT_POWERON [31]
RF_EN [31]

LPC_LAD0 [8,27,31]

LPC_LAD1 [8,27,31]

LPC_LAD2 [8,27,31]

LPC_LAD3 [8,27,31]

1

R223

Q17

*100K_4

AC@AO3413

2

+WL_VDD

Q57

2

*2N7002K

1

500mA for +1.5V

C175
*1000p/50V_4

+3V

R233
NAC@0_8

3

2

3

R791 *0_4

+1.5V_WLAN

C174

*10u/6.3V_8

*0.1u/10V_4

Low

High

+WL_VDD

+WL_VDD

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

PCH_SUSCLK [7]

APU 3V_S5(Ext PU)+WL_VDD

R192 *0_6

C172

Mini card +3V power enable

Mini card +3V power disable

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

Mini-Card/WL/3G/SIM

Mini-Card/WL/3G/SIM

Mini-Card/WL/3G/SIM

+1.5V

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

28 44Wednesday, February 11, 2015

28 44Wednesday, February 11, 2015

28 44Wednesday, February 11, 2015

1

1A

1A

1A

of

of

of

K/B (KBC)

5

CN5

D29
*TVS AZ5125-01H.R7G

2 1

C778
*0.1u/10V_4

+5V

1

2

3

D23 G S@RB500V-40
D27 G S@RB500V-40

G_MBDATA_R

G_MBCLK_R

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
272829

30

KB_CONN

C547 KB [email protected]/6.3V_ 6

Q52
KBL@AO3413

C553

[email protected]/10V_6

+G_SEN_PW

C474

C473
[email protected]/10V_4

GS@10u/6.3V_6

R518 * short_4
R514 * short_4
R515 * short_4

+G_SEN_PW

C470 * 33P/50V_4

C471 * 33P/50V_4

G_MBDATA_R
G_MBCLK_R

R727 * Short_6

C551

[email protected]/25V_4

ACCEL_INTA_R
G_INT2_R

G_MBDATA_R
G_MBCLK_R

MX0

MX0[3 1]

MX1

MX1[3 1]

MX2

MX2[3 1]

MX3

MX3[3 1]

MX4

MX4[3 1]

MX5

MX5[3 1]

MX6

MX6[3 1]

MX7

MX7[3 1]

MY17

TP61

KB_BL_LED[31]

ACCEL_INTA

C472
*22P/50V_4

NBSWON#[13,31]

3

5
6

MY17[31]
MY16[31]
MY15[31]
MY14[31]
MY13[31]
MY12[31]
MY11[31]
MY10[31]
MY9[3 1]
MY8[3 1]
MY7[3 1]
MY6[3 1]
MY5[3 1]
MY4[3 1]
MY3[3 1]
MY2[3 1]
MY1[3 1]
MY0[3 1]

Power Switch

KBL@DTC144EU

+G_SEN_PW

MY16
MY15
MY14
MY13
MY12
MY11
MY10
MY9
MY8
MY7
MY6
MY5
MY4
MY3
MY2
MY1
MY0

SW1

2

NBSWON#

14

TP62

+5V

R406

KBL@10K_4

2

Q36

1 3

+3V

R522 * Short_6

ACCEL_INTA[1 0]

G_INT2[27 ]

CLK_SDATA

CLK_SDATA[8 ,13,14,15]

CLK_SCLK

CLK_SCLK[8,13,14,1 5]

+G_SEN_PW

R510 * 4.7K_4
R511 * 4.7K_4

5

D D

C C

For test only

KB_BL LED (KBL)

B B

G-sensor(ACS)

A A

4

7 8
5
3
1

CP2 *100p /50Vx4
7 8
5
3
1

CP6 *100p /50Vx4
7 8
5
3
1

CP1 *100p /50Vx4
7 8
5
3
1

CP3 *100p /50Vx4
7 8
5
3
1

CP4 *100p /50Vx4
7 8
5
3
1

CP5 *100p /50Vx4

C447 * 100p/50V_4

C448 * 100p/50V_4

+3VPCU

RP1 *10K_1 0P8R

10

9

MX4

8

MX6

7 4

MX5 MX0

MX7

+5V_KB_R+5V_KB

U30

1

Vdd_IO

14

VDD

RESERVED

11

INT1

RESERVED

9

INT2

7

SA0

6

SDA

4

SCL

8

CS

GS@LIS3DHTR

4

6
4
2

6
4
2

6
4
2

6
4
2

6
4
2

6
4
2

1
2
3

56

CN18

KBL@KB_backlight

NC
NC

GND
GND
GND
GND

TOUCHPAD BOARD CONN (TPD I2C/PS2 co-lay)

MX6
MX7
MY17
MY16

MX2
MX3
MX4
MX5

MY3
MY2
MY1
MY0

MY7
MY6
MY5
MY4

MY11
MY10
MY9
MY8

MY15
MY14
MY13
MY12

MX1
MX0

MX3

MX2

MX1

TPD->100kHz,TS=400Khz
Intel design guide suggestion
MCP PIN 10u.
Per inch 3u TS=3x5inch
400kHz10~100u =2.4~0.4k.
100Khz 10~100u=9k~1k.

I2C0_SDA_GPIO4[10]
I2C0_SCL_GPIO5[10]

3

R33 * 0_4

1

4 3

R34 * 0_4R779 0_4

1006 Del

2N7002DW

Q41

+3V

CPU FAN (THM)

SMB1ALERT#[8]

6

2

5

1006 add

R584

*10K_4

CPUFAN#[31]

+TPVDD

TPCLK[31]

TPDATA[31]

I2C_TP_SDA_R
I2C_TP_SCL_R

+3V

2.2U_6

R484

10K_4

PTP_PWR_EN#

*DTC144EU

C516

R480 2.2K_4
R479 2.2K_4

2

Q3

+5V

1 2

+3V_S5

+3VSUS

R483

10K_4

R481 * short_4
R482 * short_4

+TPVDD

+3V VIN

R51
*10K_4

2

1 3

*DTC144EU

U36

VIN2VO

GND

1

/FON

GND
GND

4

VSET

GND

G991P11U

2

Q2

PTP_PWR_EN#[31]

3
5
6
7
8

L6 0_6

L5 *0_6

C444
*0.1u/10V_4

1 3

FANSIG[31]

TH_FAN_POWERTH_FAN_POWER

1 2

C514

2.2U_6

R48
*1M_6

R56
*1M_6

R487
*100K_4

R486 * 0_4

C445

*0.1u/10V_4

+TPVDD

2

C513

0.01U/25V_4

R485 0 _6

1

R26
*22_8

3

Q1
*2N7002K

1

30mils

C523

*0.01U/25V_4

*AO3413

3

Q42

2

C450 *1000p/5 0V_4

TPD_INT#[2,31]

TPD_EN[31]

+3V

R601

10K_4

C446

0.22u/25V_6

+TPVDD

CN16

1
2
3

FAN_3P

+

R784 3 3_4
R790 3 3_4

C785
180P/50V_4

R478 * 10K_4

TPD_INT#

1

C443

0.1u/10V_4

TPCLK_R
TPDATA_R

I2C_TP_SDA_R
I2C_TP_SCL_R

+TPVDD

50mil

TPD_EN_R

R768
*10K_4

C641
180P/50V_4

+TPVDD

TPD_INT#_R
TPD_EN_R

TP CN

789
6
5
4
3
2
1

CN7

10

FANPWR = 1.6*VS ET

346
2

5

1

2
3

10
15

5
12
13
16

POWER LED(UIF)

Power LED

PWRLED#[31]

SUSLED#[31]

Battery

BATLED0#[31 ]

BATLED1#[31 ]

R7 *1M_4

R8 *1M_4

R2 7 1.5/F_4

R3 1 30/F_4

R9 *1M_4

R10 *1M_4

R4 7 1.5/F_4

R5 1 30/F_4

3

+3V_S5

D1 *5.5V/25V/410P_ 4

1 2

Blue

LED1

2 3

1

LED_AMBER/BLUE

Amber

1 2

D2 *5.5V/25V/410P_ 4

+3VPCU

D3 *5.5V/25V/410P_ 4

1 2

Blue

LED2

2 3

1

LED_AMBER/BLUE

Amber

1 2

D4 *5.5V/25V/410P_ 4

2

+3V_S5

+3VPCU

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

+3VPCU[7,8,1 0,11,13,23,25 ,26,27,28,31 ,32,33,37,38,3 9]

+5V[22,23,24,26,27 ,33,37]

+3V[2,5,7,8,9,10,1 1,13,14,15,16 ,17,18,22,23 ,24,25,26,27,28,30,31,33,34,35,36,37,38,39]
+5VPCU[30,33,34,35]
+3VSUS[4,27,33]
+3V_S5[5,7,8,9,10,11,13,25,27,3 1,33,36,38]

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

KB/TP/FAN/LED

KB/TP/FAN/LED

KB/TP/FAN/LED

1

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

29 44Wednesday, F ebruary 1 1, 2015

29 44Wednesday, F ebruary 1 1, 2015

29 44Wednesday, F ebruary 1 1, 2015

3A

3A

3A

5

USB 3.0 Connector(UB3)

USBP0-_R

R54 *short_4

USBP0+_R

R50 *short_4

USB3_RXN0[9]
USB3_RXP0[9 ]

USB3_TXN0[9]

D D

USB3_TXP0[9]

R47 *short_4
R49 *short_4

C40 0.1u/10V_4
C45 0.1u/10V_4

4

USBP0-_C
USBP0+_C

USB3_RXN0_R
USB3_RXP0_R

USB3_TXN0_R
USB3_TXP0_R

USBPWR1

CN8
USB3.0 CONN

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

VBUS
D­D+
GND
SSRX­SSRX+
GND
SSTX­SSTX+

3

2

1

USB Charger for USB3.0 Port0 (UBC)

CLT1

ILIM_SEL

R124 *100K_4

R114 *100K_4

11111010131312

12

R122 *0_4

R113 *0_4

+5VPCU

1 2

USBP0-_C

1 2

USBP0+_C

USB3_RXN0_R

USB3_RXP0_R

USB3_TXN0_R

USB3_TXP0_R

RV3 *EGA_4

1 2

RV1 *EGA_4

1 2

RV2 *EGA_4

1 2

RV5 *EGA_4

1 2

RV6 *EGA_4

USB_CHARGE_ON[31]

USB 3.0 Connector(UB3)

C C

USBPWR2

CN11
USB3.0 CONN

1

VBUS

1

C1171u/6.3V_4

USBON#

+5VPCU

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

U6

5

IN

4

EN

AP22802BW5- 7

SSRX-

D­D+
GND

SSRX+
GND
SSTX­SSTX+

12

11111010131312

1

OUT

2

GND

3

/OC

USBP1­USBP1+

USB3_RXN1
USB3_RXP1

R105 *short_4
R101 *short_4

R96 *short_4
R100 *short_4

C85 0.1u/10V_4
C90 0.1u/10V_4

USBP1-[9]
USBP1+[9]

USB3_RXN1[9]
USB3_RXP1[9]

USB3_TXN1[9]
USB3_TXP1[9]

B B

USBP1-_R
USBP1+_R

USB3_RXN1_R
USB3_RXP1_R

USB3_TXN1_R
USB3_TXP1_R

USBON#[31]

USB_OC0#[9]

USBP1-_R

USBP1+_R

USB3_RXN1_R

USB3_RXP1_R

USB3_TXN1_R

USB3_TXP1_R

Close USB3.0

1 2

RV10 *EGA_4

1 2

RV9 *EGA_4

1 2

RV7 *EGA_4

1 2

RV8 *EGA_4

1 2

RV11 *EGA_4

1 2

RV12 *EGA_4

USBPWR2

C93

C94

0.1u/10V_4

470P/50V_4

+

C95
100u/6.3V_12

USBP0+ USBP0+_R

USBP0+[9]

USBP0-

USBP0-[9]

USB_CLT1[31]

+5VPCU

R117 *short_4

R123 *short_4
R121 100K_4
R120 100K_4

Card Reader (CRD)

+5VPCU

C871u/6.3V_4

USB_CHARGE_EN USB_OC0#

CLT1
CLT2
CLT3

AL003703000GMT

TI AL002544001

USBP7-[9]

USBP7+[9]

R27 6.2K/F_4

VCC_XD

C15

C16

4.7u/10V_6

0.1u/10V_4

Enable: Low Active /2.5A

USB IO D/B (UB2)

USB_OC1#[9]

A A

D/B USB Port

+5V_S5

U1

5

C111u/6.3V_4

USBON#

IN

4

EN

AP22802BW5- 7

1

OUT

2

GND

3

/OC

Enable: Low Active /2.5A

USBPWR3

USBP3-[9]

USBP3+[9]

5

Close CN37

CN6
1
2
3
4
5
6
7
8
91011

USB_CONN

USBPWR3

C442

470P/50V_4

12

C441

0.1u/10V_4

4

SD/MMC CARD READER (CRD)

+

C9
*100u/6.3V_12

SD_WP/MS_D1 SD_WP_R
SD_CDZ
SD_D2/MS_D5
SD_D1/MS_D7
SD_D0/MS_D6

SD_CLK

SD_CMD
SD_D3/MS_D4

3

R45 *short_4
R36 *short_4
R25 *short_4
R44 *short_4
R43 *short_4

R32 *short_4

VCC_XD

R28 *short_4
R24 *short_4

4.7u/10V_6

SD_CD#_R
SD_DATA2_R
SD_DATA1_R
SD_DATA0_R

SD_CLK_R

SD_CMD_R
SD_DATA3_R

C19

C18

0.1u/16V_4

1

IN

3

DP_OUT

2

DM_OUT

5

EN

9

STATUS

6

CLT1

7

CLT2

8

CLT3

C21

0.1u/16V_4

11
10

9
8
7
6
5
4
3
2
1

U5

OUT
DP_IN
DM_IN
FAULT

ILIM_HI

ILIM_LO

ILIM_SEL

GND

GND1

17

G3703R41D

R29 *short_4
R30 *short_4

USBP7-_R
USBP7+_R
DVDD
VCC_XD
SDREG

CN1

WP
CD
DATA2
DATA1
DATA0
VSS2
CLK
VDD
VSS1
CMD
CD/DATA3

2

12

USBPWR
10
11

USBP0-_R
13
16
15
4
14

USBP7-_R
USBP7+_R

TP1

C120.1u/10V_4

V18

24

U2

1

RREF

2

DM

3

RTS5170

DP

4

QFN24

3V3_IN

5

CARD_3V3

6

SDREG

GND

25

TP9

NC

NC

GND

GND

GND12GND

SD-CARD

14

13

15

Close USB3.0

R72 *short_8RV4 *EGA_4

R103 22K_4
R102 48.7K_4

ILIM_SEL

R115 *short_4

TP2

SD_D2/MS_D5
SD_D3/MS_D4

TP3

22

23

V18

SP1119SP1220SP1321SP14

18

XD_D7

SP10

17

GPIO0

16

SP9

15

SP8

14

SP7

13

SP6

XD_CD#7SP18SP29SP310SP411SP5

12

TP7

TP8

SD_D0/MS_D6

SD_D1/MS_D7

SD_WP/MS_D1

16
17

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

USBPWR1

C56

+

C51

C62
100u/6.3V_12

0.1u/10V_4

470P/50V_4

USB_BC_ON [31]

R39 *Short_6

SD_CMDRREF

TP4
TP5

SD_CLK

TP6

SD_CDZ

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

USB Port/ DB

USB Port/ DB

USB Port/ DB

1007 change footprint

DVDD+3V

+5V_S5[4,33,36,38,39]

+5VPCU[33,34,3 5]

+3V[2,5,7,8,9,10,11,13,14,15 ,16,17,18,22,23 ,24,25,26,27,28,29,31,33,34,35,36,37,38,39]

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

30 44Wednesday, February 11, 2015

30 44Wednesday, February 11, 2015

30 44Wednesday, February 11, 2015

of

of

1

of

1A

1A

1A

R70
100K_4

C455
1u/6.3V_4

+3VPCU

2 1

5

R490 2.2_6

1 2

D16
SDMK0340L-7-F

5

L9
BLM15AG121SN1D(120,500MA)_4

12 mils

C38

C463

0.1u/10V_4

0.1u/10V_4

+3V

LPC_LAD0[8,27,28]
LPC_LAD1[8,27,28]
LPC_LAD2[8,27,28]
LPC_LAD3[8,27,28]

PLTRST#[7,13,16 ,25,27,28]

CLK_PCI_EC[9]

LPC_LFRAME#[8,27,28]

IRQ_SERIRQ[10,27]
SIO_EXT_SMI#[1 0]
SIO_EXT_SCI#[10]

SIO_RCIN#[10]

WLAN_WAKE#[28]

KB_BL_LED[29]

DNBSWON#[7]

APWORK[7]

EC_PWROK[5,7]

PCH_BLON_EC[23]

CPUFAN#[29]

LAN_WAKE#[25 ]

ME_WR#[8]

AMP_MUTE#[26]

ODD_POWER[27]

TEMP_MBAT[32]

IOAC_WLANPWR#[2 8]

PCBEEP_EC[26]

HWPG_ 1.05 V_EC#[5]

AC_Prot ect[32]

EC_ODD_EJ[27]

PCH_SPI_CLK_EC[8]
SPI_CS0#_UR_ME[8 ]

PCH_SPI_SI_EC[8 ]

PCH_SPI_SO_EC[8]

PTP_PWR_EN#[29]

C48

0.1u/10V_4

ECAGND

C457

0.1u/10V_4

PLTRST#

PROCHOT_EC

S5_ON

WRST#

C449

0.1u/10V_4

C64

0.1u/10V_4

MX0[29]
MX1[29]
MX2[29]
MX3[29]
MX4[29]
MX5[29]
MX6[29]
MX7[29]

C462

0.1u/10V_4

R76 2.2_6

1 2

TP63

SUSB#[7,13]

ACIN[32]

MY16[29]
MY17[29]

TS_EN[23]

S5_ON[33,34,37]

MY0[29]
MY1[29]
MY2[29]
MY3[29]
MY4[29]
MY5[29]
MY6[29]
MY7[29]
MY8[29]

MY9[29]
MY10[29]
MY11[29]
MY12[29]
MY13[29]
MY14[29]
MY15[29]

EC(KBC)

+3VPCU_EC and +3V_RTC
minimum trace width 12mils.

D D

+3VPCU

1 2

CLK_PCI_EC

C C

R488

*22_4

C456
*10p/50V_4

B B

A A

4

+A3VPCU

+3VPCU

+3VPCU_EC

C44

0.1u/10V_4

+3V_EC

U27

11

10

LAD0/GPM0(3)

9

LAD1/GPM1(3)

VCC

8

LAD2/GPM2(3)

7

LAD3/GPM3(3)

22

LPCRST#/GPD2

13

LPCCLK/GPM4(3)

6

LFRAME#/GPM5(3)

17

LPCPD#/GPE6

126

GA20/GPB5(3)

5

SERIRQ/GPM6(3)

15

ECSMI#/GPD4(3)

23

ECSCI#/GPD3

14

WRST#

4

KBRST#/GPB6(3)

16

PWUREQ#/BBO/SMCLK2ALT/GPC7(3)

113

CRX0/GPC0

123

CTX0/TMA0/GPB2(3)

80

DAC4/DCD0#/GPJ4(3)

119

DSR0#/GPG6

33

GINT/CTS0#/GPD5

88

PS2DAT1/RTS0#/GPF3

81

DAC5/RIG0#/GPJ5(3)

87

PS2CLK1/DTR0#/GPF2

109

TXD/SOUT0/GPB1

108

RXD/SIN0/GPB0

71

ADC5/DCD1#/GPI5(3)

72

ADC6/DSR1#/GPI6(3)

73

ADC7/CTS1#/GPI7(3)

35

RTS1#/GPE5

34

PWM7/RIG1#/GPA7

122

DTR1#/SBUSY/GPG1/ID7

95

CTX1/SOUT1/GPH2/SMDAT3/ID2

94

CRX1/SIN1/SMCLK3/GPH1/ID1

105

FSCK/GPG7

101

FSCE#/GPG3

102

FMOSI/GPG4

103

FMISO/GPG5

56

KSO16/SMOSI/GPC3(3)

57

KSO17/SMISO/GPC5(3)

32

PWM6/SSCK/GPA6

100

SSCE0#/GPG2

125

SSCE1#/GPG0

36

KSO0/PD0

37

KSO1/PD1

38

KSO2/PD2

39

KSO3/PD3

40

KSO4/PD4

41

KSO5/PD5

42

KSO6/PD6

43

KSO7/PD7

44

KSO8/ACK#

45

KSO9/BUSY

46

KSO10/PE

51

KSO11/ERR#

52

KSO12/SLCT

53

KSO13

54

KSO14

55

KSO15

KSI0/STB#58KSI1/AFD#59KSI2/INIT#60KSI3/SLIN#61KSI462KSI563KSI664KSI7

HWPG(KBC)

4

+3VPCU_ECPLL

C464

C461

0.1u/10V_4

114

0.1u/10V_4

TP11

121

74

106

84

127

82

AVCC

VSTBY

VSTBY(PLL)

EGAD/GPE1

VSTBY_FSPI

EGCS#/GPE283EGCLK/GPE3

12 mils

VSTBY26VSTBY50VSTBY92VSTBY

LPC

IT8987
LQFP

CIR

UART port

EXTERNAL SERIAL FLASH

SPI ENABLE

KBMX

VSS

VSS

VSS27VSS

VSS

1

65

49

91

104

L11
BLM15AG121SN1D(120,500MA)_4

DDR=1.5V, D1 DNP and D2 POP
DDR=1.35V, D1 POP and D2 DNP

HWPG_ 1.5V[37]

HWPG_ 1.05 V[5]

HWPG_ VDDR[35]

HWPG_ 1.05 V_S5[13,34]

SYS_HWPG[33]

L23
BLM15AG121SN1D(120,500MA)_4

(For PLL Power)

BT_POWERON

FB_CLAMP_REQ#

19

3

97

93

20

SM BUS

GPH7

ID5/GPH598ID6/GPH699ID3/GPH396ID4/GPH4

SMDAT2/PECIRQT#/GPF7(3)

L80LLAT/GPE7

CLKRUN#/ID0/GPH0

L80HLAT/BAO/GPE0

GPIO

PS/2

PS2CLK0/CEC/TMB0/GPF0

PWM

TACH1A/TMA1/GPD7(3)

WAKE UP

RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7

A/D D/A

CLOCK

VCORE

AVSS

12

75

C60

0.1u/10V_4

ECAGND

D1

D11 RB500V-40

D2

D15 *RB500V-40

D13 RB500V-40

D14 RB500V-40

D12 RB500V-40

+3VPCU_EC

SB_ACDC [32]

BT_POWERON [28]

PCH_SLP_SUS# [7]
FB_CLAMP_REQ# [19]
D/C# [32]
USBON# [30]
TPD_EN [29]
USB_BC _ON [30]
USB_CHAR GE_ON [3 0]
CLKRUN# [7,27]

SMCLK0/GPB3
SMDAT0/GPB4
SMCLK1/GPC1
SMDAT1/GPC2

PECI/SMCLK2/GPF6(3)

PS2DAT0/TMB1/GPF1

PS2CLK2/GPF4

PS2DAT2/GPF5

PWM0/GPA0
PWM1/GPA1
PWM2/GPA2
PWM3/GPA3
PWM4/GPA4
PWM5/GPA5

TACH0A/GPD6(3)

TMRI0/GPC4(3)
TMRI1/GPC6(3)

PWRSW/GPE4

RI1#/GPD0(3)

RI2#/GPD1

ADC0/GPI0(3)
ADC1/GPI1(3)
ADC2/GPI2(3)
ADC3/GPI3(3)
ADC4/GPI4(3)

TACH2/GPJ0(3)

GPJ1(3)
DAC2/TACH0B/GPJ2(3)
DAC3/TACH1B/GPJ3(3)

+3V

R64
10K_4

HWPG

3

110

MBCLK

111

MBDATA

115

2ND_MBCLK

116

2ND_MBDATA

117

EC_PECR_R

118

85
86
89
90

24
25
28

SUSLED#

29
30
31

47
48

120
124

dGPU_OTP#

107

NBSWO N#

18
21

HWPG

112

ICMNT

66
67

C36 10u/6.3V_6

68

dGPU_OPP#

69
70

76
77

EC_FB_CLAMP

78
79

2

R95 *0_4

GPJ7

128

R98 0_4

GPJ6

IT8987

MBCLK [32]
MBDATA [32]
2ND_MBCLK [8,19]
2ND_MBDATA [8,19]

R498 43_4

SM BUS ARRANGEMENT TABLE

SM Bus 1

SM Bus 2

LID# [23]

IOAC_RST# [25,28]
EC_FPBACK# [23]
TPCLK [2 9]
TPDATA [29 ]

PWRLED# [29]
BATLED1# [29]
SUSLED# [29]
BATLED0# [29]
MAINON [3 5,37]
USB_CL T1 [ 30]

FANSIG [29]
PCH_SUSACK# [7]

SUSON [33,35]
dGPU_OTP# [19]

NBSWO N# [13,29 ]
SUSC# [7,13]

RSMRST# [7]

RF_EN [28]
ICMNT [32]

ECAGND

dGPU_OPP# [19]
VRON [36]
IOAC_LANPWR# [25]

DPWROK [7]
EC_FB_CLAMP [17,19]
PCH_PWROK [5,7]
PCH_SUSPWRACK_R [7]

TPD_INT# [2,29]

Battery

PCH/VGA

H_PECI [4]

SM Bus 3

2

S5_ON

NBSWO N#

dGPU_OTP#
dGPU_OPP#

FB_CLAMP_REQ#

MAINON

SUSON

VRON

PCH_SPI_SI_EC

PCH_SPI_SO_EC

SM BUS PU(KBC)

MBCLK
MBDATA

2ND_MBCLK
2ND_MBDATA

Battery B/I SW

BI[32]

3

Q55
PJA138K

2

12

C773
*0.1U/25V_4

1

Vgs = 1.5V Vgs = 1.5V

PROCHOT_EC

R62

100K_4

R494 10K_4

R499 10K_4

R502 EV@10K_4
R58 EV@10K_4
R66 EV@10K_4

R53 100K_4

R497 100K_4

R60 100K_4

R495 *10K_4

R496 *10K_4

+3V_RTC

R771
100K_4

42

3

1

2

1

R500 4.7K_ 4
R501 4.7K_ 4

R504 4.7K_ 4
R505 4.7K_ 4

+3V_RTC+3 VPCU

R772
*0_4

12

BI_GATE

SW3
BI_SW

6

5

3

Q4

2N7002K

1

+3VPCU

+3V_GFX

R774
*10K_4

C772
*0.1U/16V_4

+3VPCU

+3V_S5

R773
*0_4

4 3

H_PROCHO T# [4, 32,3 6]

WRST#

6

215

Q54
*PJ4N3KDW

SM Bus 4

+3VPCU[7,8,10,11,13,23,25,26 ,27,28,29,32,33,37,38,39]
+3V_GFX[16,18,19 ,39]

+3V[2,5,7,8,9,10,11,13,14,15,16 ,17,18,22,23,24,25,26,27,28,29,30,33,34,35,36,37,38,39]

+3V_S5[5,7,8,9,10,11,13,25 ,27,29,33,36,38]

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

ZRT/ZRTA

PROJECT :

ZRT/ZRTA

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

3

2

Date: Sheet

KBC IT8587

KBC IT8587

KBC IT8587

1

ZRT/ZRTA

of

of

of

31 44Wednesday, February 11, 2015

31 44Wednesday, February 11, 2015

31 44Wednesday, February 11, 2015

3A

3A

3A

5

4

3

2

1

34

PQ56
AOL1413

4

5

4

16

24737_REGN

17

24737_BST

18

24737_DH

19

24737_LX

15

14

PR112 10_6

13

PR113 7.5_6

12

Check with HW side

PR220

*100K_4

PR109

*short_4

VA2

PD8

SV1040

1

52

2

PR214
*short_4

PR116
*Short_6

24737_SRP

24737_SRN

+1.05V

3

2

PQ19
2N7002K

1

24737_CMPOUT

For BATT Only

PC53

0.1u/25V_4

TEMP_MBAT [31]

UMA-45W

DIS-65W

VA1

PC62

0.1u/50V_6

PD3
1N4148WS

recommend 200mA at least.

PR128
*Short_6

PR124
20_1206

MBDATA

PR222
10K_4

PR125

316K/F_4

PQ20
*2N7002K

MBCLK

PR227
10K_4

PR115

*100K_4

PR118
100K/F_4

3

2

1

+3VPCU

24737_BM#

R1 R2

115K(CS41152FB08) 100K

4

PR229
10K/F_4

PR226
*short_4

PR225
*short_4

PC54

0.01U/25V_4

PD5
P4SMAFJ20A

2 1

PR127

63.4K/F_4

24737_ACDET

24737_VCC

24737_BM#

24737_CMPOUT

24737_ILIM

24737_CMPIN

ICMNT[3 1]

PC163

0.47u/25V_6

PR228
100K/F_4

R2

R1

100K51K(CS35102FB04)

PC52

0.1u/50V_6

0.1u/50V_6

6

20

5

8

9

11

3

10

4

PC63

ACDET

VCC

ACOK#

SDA

SCL

BM#

CMPOUT

ILIM

CMPIN

PR126
SP@51K/F_4

IOUT

7

PR105
220K_4

PR104
220K_4

PC61

0.1u/50V_6

2

ACP

BQ24737RGRR

PC59
100p/50V_4

3

PJ1

1
2

D D

C C

B B

A A

3
4

Power conn

PC58

PC55

0.1u/50V_6

2200p/50V_6

+3VPCU

PR108

PR110

PR107
*10K_4

ACIN[31]

ACPRESENT[7]

SB_ACDC[31]

PJ2

89
7
6
5
4
3
2
1

10

C114F3-10 8A1-L_Bat t_Conn

PC56

*47p/50V_4

PR100
*short_4

PC159

0.1u/50V_6

PC152

*100p/50V_4

PD6

PDZ5.6B

5

PR119
100_4

2 1

PR99
*0_4

PR221 *0_4

PR122 100_ 4

PR120
100_4

2 1

PD4

PDZ5.6B

BI [31]

*47p/50V_4

100K_4

6

215

TEMP_MBAT

PR121 1M_4

MBCLK [31]

MBDATA [31]

PC57

100K_4

PQ18
2N7002DW

4 3

+3VPCU

PU11

GND

GND22GND24GND23GND

21

1 6

2

3

IMD2AT108

24737_ACP

24737_ACN

0.1u/50V_6

1

ACN

25

24737_CMPOUT

AC_Protect[31]

1

3

PQ55

PC165

REGN

BTST

HIDRV

PHASE

LCDRV

PGND

SRP

SRN

PR111
*0_4

3

PC157
1u/16V_6

PD9
RB500V-40

PC160
47n/50V_6

0.1u/25V_4

PC156

0.1u/25V_4

0.1u/25V_4

H_PROCHOT# [4 ,31,36]

2

PQ57

AON7410

PC153

PC154

3

1

PR203

0.02/F_0612

1 2

D/C# [31]

4

4

PQ59
*2N7002K

2

PR202
*short_4

PR205
*short_4

52

PQ58

AON7410

3

1

52

3

1

bq24707A

bq24737

GPU_THROTTING# [19]

24737_ACN

24737_ACP

PC162

2200p/50V_6

PR123
*4.7_6

PC60
*680p/50V_6

PL11

6.8uH_7X7X3

PC139

0.1u/50V_6

24737_SRPBAT-V

24737_SRN

VIN

VIN

PR224
*short_4

PC161

10u/25V_8

PR230

0.01/F_0612

1 2

PC138
2200p/50V_6

PR223
*short_4

1

3

PR117
33K/F_4

PQ21
2N7002K

PC155

2200p/50V_6

PQ22
AOL1413

2

SRP󶁟󶁟󶁟󶁟SRN

4-Cells Others

0󶁟󶁟󶁟󶁟010󶁟󶁟󶁟󶁟7.5

10󶁟󶁟󶁟󶁟7.5 10 󶁟󶁟󶁟󶁟7.5

REGN MAX voltage 6.5V
V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr
=0.793V for 3.965A current limit

Pin10 ILIM=0.793V
Rsr = 0.01ohm

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROJECT :

Charger(BQ24737RGRR)

Charger(BQ24737RGRR)

Charger(BQ24737RGRR)

1

52

4

PR114
10K_4

3

1

BAT-V24737_DL

PC164

10U/25V_8

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

32 44Wednesday, F ebruary 1 1, 2015

32 44Wednesday, F ebruary 1 1, 2015

32 44Wednesday, F ebruary 1 1, 2015

PC158

10U/25V_8

2A

2A

2A

5

PL1

2.2uH_7X7X3

PR8
*4.7_6

PC5
*680p/50V_6

2

PC1

0.1u/50V_6

PR7
22_8

+5V_S5+3V_S5

3

1

PR1
22_8

PQ1
2N7002K

SYS_SHDN#

PC6
2200p/50V_6

+15V_ALWP

2

MAIND

D D

C C

B B

A A

VIN

+5VPCU

+5VPCU

5 Volt +/- 5%
TDC : 6.9A

12

PEAK : 9.1A
OCP : 11A
Width : 280mil

JP7

*short_3720

+5V_SRC

+

PC65

220u/6.3V_6X4.2

OCP:11A

L(ripple current)
=(9-5)*5/(2.2u*0.3M*9)
=3.367A
Iocp=11-(3.367/2)=9.316A
Vth=9.316A*14.5mOhm+1mV=136.082mV
R(Ilim)=(136.082mV*8)/10uA
=108.86K

2

S5_ON

PQ2

DTC144EU

1 3

5

12

+

PC64

0.1u/50V_6

JP2
*short_3720

1 2

PC77
33U/25V_6x4.5

PR3
1M_6

PR2
1M_6

MAIND [34,37]

PR133

15.4K/F_4

PR134
10K/F_4

2

+5VPCU_VIN

PC73
10u/25V_8

+15V

PR16
22_8

3

PQ4
2N7002K

1

4

SYS_SHDN# [10,37]

PR138
*100K/F_4

PR130
*Short_6

20

16

17

18

15

14

7

PGOOD

EN1

DRVH1

VBST1

SW1

DRVL1

2

VFB1

VO1

4

3

TDC : 3.86A
PEAK : 5.14A
Width : 160mil

VL 3V_LDO

PC69 10u/6.3V_6

51225_VIN

13

12

VIN

VREG5

PU4

TPS51225RUKR

CS11CS25VCLK

19

26

51225_CS1

51225_CS2

51225_VCLK

PR4 11 0K/F_4

PR11 48.7K/F_4

52

PQ24

1

MDV1528Q

+5V

PR131
*short_4

PR132

1/F_6

PC2

3

PQ25
AO3404

1

+5V_S5

TDC : 0.75A
PEAK : 1A
Width : 40mil

+3VPCU

PR139
*short_4

51225_EN1

51225_DH1

51225_VBST1

51225_SW1

51225_DL1

51225_FB1

PC66

0.1u/50V_6

SYS_HWPG[31]

SYS_SHDN#

52

PQ26

AON7410

4

3

1

PC67

0.1u/50V_6

52

4

PQ27

3

1

AON7752

2

PD2
1PS302

PD1
1PS302

PC3

0.1u/50V_6

+15VVIN

PR9
1M_6

3

PQ3

2N7002K

1

0.1u/50V_6

3

1

2

3

1

VIN +5VPCU

PR5
*1M_6

2

S5D MAIND MAIND S5D

PC4
*2.2n/50V_4

4

3

PC71 0.1u/25V_4

3

PR6
*Short_6

3

VREG3

PR137
*Short_6

PR10
10K/F_4

PC70 4.7u/6.3V_6

EN2

DRVH2

VBST2

SW2

DRVL2

VFB2

GND

GND

GND23GND24GND25GND

+3VPCU

2

TDC : 0.62A
PEAK : 0.83A
Width : 40mil

6

10

9

8

11

4

21

22

3

1

SYS_SHDN#

51225_DH2

51225_VBST2

51225_SW2

51225_DL2

51225_FB2

PQ6
AO3404

PQ29

AON7410

4

3

PC74

PR140

0.1u/50V_6

1/F_6

4

PQ30

3

AON7752

1/13 Adding +3VSUS power for touch pad
(By acer request)

SUSON[31,35]

+3VPCU+5VPCU

3

2

PQ8
AO3404

+3V +3V_S5

1

TDC : 0.68A
PEAK : 0.91A
Width : 40mil

52

52

1

1

*DTC144EU

+3VPCU_VIN

2

PQ35

2

1

35

JP3
*short_3720

1 2

VIN

PL3

3.3uH_7X7X3

PR153
*1M_6

PR152
*1M_6

PC75
10u/25V_8

+3VPCU

3.3 Volt +/- 5%
TDC : 3A
PEAK : 4A
OCP : 5A
Width : 120mil

+3V_SRC

PR136

6.81K/F_4

PR135
10K/F_4

2

+3VPCU

12

JP5

*short_3720

+

PC80

PC90

0.1u/50V_6

220u/6.3V_6X4.2

OCP:5A

L(ripple current)
=(9-3.3)*3.3/(3.3u*0.355M*9)
~1.784A
Iocp=5-(1.784/2)=4.108A
Vth=4.108A*14.5mOhm+1mV=60.56mV
R(Ilim)=(60.56mV*8)/10uA
~48.45K

+15VVIN

+3VSUS

PR160
*22_8

3

PQ36
*2N7002K

1

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

VIN +3VPCU

PR151

PR150

*1M_6

*1M_6

SUSD

3

2

PQ34

*2N7002K

PC82

1

*2.2n/50V_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

SYSTEM 5V/3V (TPS5122 5)

SYSTEM 5V/3V (TPS5122 5)

SYSTEM 5V/3V (TPS5122 5)

1

2

3

PQ37
*AO3404

1

TDC : 0.038A
PEAK : 0.05A
Width : 20mil

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

33 44Wednesday, February 11, 2015

33 44Wednesday, February 11, 2015

33 44Wednesday, February 11, 2015

+3VSUS

2A

2A

2A

of

of

of

PC7
2200p/50V_6

PR12
*4.7_6

PC8
*680p/50V_6

1 3

2

5

4

3

2

1

JP8
*short_3720

D D

+3V

PR13
100K/F_4

HWPG_1.0 5V_S5[13,31]

S5_ON[31,33,37]

C C

B B

MODPHY_E N[10]

A A

PR146 *short_4

PR14 121K/F_4

PR15
*100K/F_4

OCP=12A
L ripple current
=(19-1.05)*1.05/(1u*290k*19)
=3.42A
Vtrip=12-(3.42/2)*14.5mohm
=149.2mV
Rlimit=149.2mV/10uA*8=119.36Kohm

PR20
*0_4

PC12

*1u/10V_4

5

PR149 470K/F_4

2

12

PR23
*100K_4

51211V_EN 51211V_VBST

51211V_TRIP

51211V_TST

12

VIN

PQ9

1 3

*PDTC143TT

4

1

3

2

5

PGOOD

EN

TRIP

TPS51211DSCR

TST

GND

GND13GND14GND15GND

PR22
*1M_4

PR21
*1M_4

7

V5IN

PU1

16

2

DRVH

VBST

DRVL

GND

+5VPCU

PC9
1u/10V_4

51211V_DRVH

9

10

8

51211V_SW +1V_SRC

SW

6

51211V_DRVL

11

FB

4

51211V_FB

PR17
*Short_6

PQ40

AON7410

PC10

0.1u/50V_6

PQ38

AON7752

52

4

3

1

52

4

3

1

PC11
2200p/50V_6

PL4

1uH_7X7X3

PR169
*4.7_6

PC87
*680p/50V_6

VFB=0.7V

PC13
*2.2n/50V_4

+1.05V_S5

3

2

1

PQ50
*AO3404

+1.05V_MODPHY

+1.05V_MODPHY
TDC : 1.38A
PEAK : 1.84A
Width : 60mil

+1.05V_MODPHY +1.05V

+15V+1.05V_MODPHY

PR188
*22_8

3

PQ49
*2N7002K

1

PR24
*1M_4

MODPHY_D

3

2

PQ10
*2N7002K

1

3

1 2

PC86
10u/25V_8

PR148

5.1K/F_4

PC98

0.1u/50V_6

PR145
10K/F_4

PR58 *short_8

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

2

VIN

+

PC95
330u/2.5V_6X4.2

PC97

*22u/6.3V_8

MAIND[33,37]

MAIND

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

+1.05V_S5 (TPS51211)

+1.05V_S5 (TPS51211)

+1.05V_S5 (TPS51211)

1 2

JP9
*short_3720

4

36

+1.05V_S5

+1.05V

1.05 Volt +/- 5%
TDC : 7.91A
PEAK : 10.5A
OCP : 12A
Width : 320mil

+1.05V_S5

5

PQ43
AON6414AL

213

+1.05V

TDC : 4.5A
PEAK : 6A
Width : 180mil

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

of

of

of

34 44Wednesday, February 11, 2015

34 44Wednesday, February 11, 2015

34 44Wednesday, February 11, 2015

1

2A

2A

2A

5

TDC : 0.75A
PEAK : 1A
Width : 40mil

51216_S3

MAINON[31,37]

SUSON[31,33]

TDC : 0.38A
PEAK : 0.5A
Width : 20mil

PR157

PR155

51216_S551216_S3

PR156
*0_4

PR163
*short_4

PC89

0.22u/10V_4

+3V

PR168

100K/F_4

*0_4

*short_4

PR166
200K/F_4

PR161

84.5K/F_4

VREF=1.8V

0.1u/10V_4

DDR_VTTT_PG_CTRL [4]

DDR_VTTREF

51216_S3

51216_S5

51216_MODE

51216_TRIP

PC88

20

17

16

19

18

26

51216_REF

PR165
10K/F_4

PR159

30.1K/F_4

22

PGOOD

S3

S5

MODE

TRIP

PAD

6

D D

HWPG_VDDR[31]

C C

B B

+DDR_VTT_RUN

PC91
10u/6.3V_6

PAD21PAD

51216_REFIN

5

VTTREF

TPS51216RUKR

VDDQSNS9REFIN8REF

PC85

0.01U/25V_4

4

PU5

4

VTTGND

25

PC92
10u/6.3V_6

1

3

2

1

37

Close to IC

PC93

VBST

DRVL

10u/6.3V_6

12

V5IN

14

51216_DRVH

PR154

51216_VBST

51216_SW

51216_DRVL

2/F_6

SW

PR19
*Short_6

15

13

11

10

2

3

VTT

VLDOIN

VTTSNS

DRVH

PGND

GND

PAD23PAD24PAD

7

Mode Frequency Discharge mode

+5VPCU

0.1u/50V_6

PC83

PC84
1u/10V_4

Greater than or equal 40mil

PQ32

AON7410

52

4

3

1

52

4

3

1

PQ33

AON7752

RDSon=14.5mohm

51216_VIN

PC81
2200p/50V_4

PR147
*4.7_6

PC78
*680p/50V_6

PL2

2.2uH_7X7X3

PC79
10u/25V_8

+1.35VSUS_SRC

PC72

0.1u/50V_6

Close to output cap

JP4
*short_3720

1 2

1 2

+

PC68
330u/2.5V_6X4.2

JP1
*short_3720

VIN

+1.35V_SUS

1.35 Volt +/- 5%
TDC : 4.5A
PEAK : 6A
OCP : 8A
Width : 180mil

+1.35V_SUS

+1.35V_SUS [4,5,14,15]

200K 400K Tracking Discharge

OCP=8A
L ripple current

A A

=(19-1.35)*1.35/(2.2u*400k*19)
=1.425A
Vtrip=8-(1.425/2)*14.5mohm
=105.668mV
Rlimit=105.668mV/10uA*8=84.53Kohm

5

DDR=1.35V
PR84=10K/F_4
PR86=30.1K/F_4

4

100K 300K Tracking Discharge

S3 S5

S0

S3 (mainon off)

1

1

1

0

S4/S5

3

ON

ON ON

ON ON

OFF

OFF OFF00

VTTREF+1.35VSUS

OFF

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

DDR 1.35V(TPS51216)

DDR 1.35V(TPS51216)

DDR 1.35V(TPS51216)

Date: Sheet

Date: Sheet

2

Date: Sheet

PROJECT :

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

35 44Wednesday, February 11, 2015

35 44Wednesday, February 11, 2015

35 44Wednesday, February 11, 2015

1

2A

2A

2A

of

of

of

5

4

3

2

1

100U/25V_6x4.5

PC127

*330u/2V_7343

VIN

+VCCIN

+VCCIN

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

38

of

of

of

2A

2A

2A

JP6

IMON offset

+VIN_VCCIN

PR79

D D

C C

B B

2M/F_4

PR80

2M/F_4

PR81

30K/F_4

PC50

0.1u/10V_4

H_PROCHO T#[4,31,32]

VR_SVID_ CLK[5]

VR_SVID_ ALERT#[5]

VR_SVID_ DATA[5]

VR_SVID_ CLK

VR_SVID_ ALERT#

VR_SVID_ DATA

IMVP_PWRGD[5,10]

PR209 *short_4

VRON[31]

PR198 *0_4

VRON_CPU[5]

PR197 *short_4

VCC_SENS E[5]

VSS_SENS E[12]

51624_OCP-I

PR98

51624_VRON

+1.05V

PR216

*75/F_4

130/F_4

+3V

PR96

PR207

*100K/F_4

*100K/F_4

+VCCIN

Parallel

BW-U 15W (1 phase)

Icc TDC PL2󶁪14A

Icc Max󶁪32A

OCP󶁪37A

A A

Fsw󶁪1.2MHz

VCORE L/L󶁪󶁪󶁪󶁪

R_DC_LL󶁪- 2.0mV/A

R_AC_LL󶁪- 7.0mV/A

5

+3V_S5 51624_VREF +5V_S5

PR87
100K/F_4

1_6

PR211

PC49

1u/6.3V_4

PR201

PR200

36.5K/F_4

S28@665K/F_4

PR85

20K/F_4

PR86

PC148

0.33u/6.3V_4
S28@100K/F_4

Close to VR

51624_O-USR

51624_VREF

56_4

PR219

+3V+3V

PR206

*100K/F_4

PR187
*10_4

PR186
*10_4

Close to the
CPU side.

*56_4

PR103

PR217 *short_4

PR218 *short_4

PR213 *short_4

PC147
*330p/50V_4

PC146
*0.01u/50V_4

51624_CLK

51624_ALERT#

51624_DATA

51624_SKIP#

51624_VRON

51624_VFB

51624_GFB

PR212 *short_4

PR210 *short_4

51624_VREF

51624_VDD

2

9

27

VDD

VREF

O-USR

30

VR_HOT

31

VCLK

32

ALERT

1

VDIO

3

PGOOD

7

SKIP

8

VR_ON

24

VFB

23

GFB

OCP-I12IMON

DROOP25COMP

26

51624_DROOP

51624_COMP

PR101 [email protected]/F_4

51624_OCP-I

PC151

PR215

10K/F_4

*100p/50V_4

PR102

PC51

1500p/50V_4

[email protected]/F_4

BW-U 28W (1 phase)

Icc TDC PL2󶁪19A

Icc Max󶁪40A

OCP󶁪47A

Fsw󶁪800KHz

VCORE L/L󶁪󶁪󶁪󶁪

R_DC_LL󶁪- 2.0mV/A

R_AC_LL󶁪- 7.0mV/A

4

Place NTC close to the
VCORE Hot-Spot.

PR78

PR196

PR199

*39.2K/F_4

*90.9K/F_4

PR89

150K/F_4

51624_F-IMAX

51624_B-RAMP

10

11

F-IMAX

B-RAMP

PU10

TPS51624RSM

GND29PAD34PAD35PAD36PAD37PAD38PAD39PAD40PAD41PAD

13

51624_IMON

PR82

S28@340K/F_4

PR88

39K/F_4

100K/F_4_4250NTC

PR90

39K/F_4

PR83

9.09K/F_4

51624_THERM

51624_V5A

51624_VBAT

51624_SLEWA

15

16

14

28

V5A

VBAT

SLEWA

THERM

6

PWM1

5

PWM2

4

MODE

17

CSP1

18

CSN1

19

CSN2

20

CSP2

21

NC

22

N/C

PAD

33

42

PC140

4700p/25V_4

S28@

Location Value

Block 1. Stuff

BW-U 28W 2 phase

PL8 CV+24P0MZ00

PR71 CS21822FB14

PR70 CS22672FB12

PC142

CH4152K9B02

20/F_6

PR106

PC47

1000P/50V_4

51624_PWM1

51624_PWM2

51624_MODE

51624_CSP1

51624_CSN1

51624_CSN2

51624_CSP2

PR97
*short_8

For BW 1 Phase

51624_CSP2

51624_PWM2

51624_CSN2

Location Value

PR85 CS35622FB10

PR101 CS22372FB11

PR102 CS31002FB26PR82 CS41502FB18

PR200 CS42942FB13

PC149
1U/10V_6

PR204

PR94
150K/F_4

10K/F_4

PR92
15@0_4

+5V_S5

PC129
1u/10V_4

1

51624_SKIP#

51624_PWM1

PR208

*short_4

51624_PWM1_R

PR194

2.2/F_6

CS_BSTR1

SKIP#

8

PWM

6

BOOT_R

7

CS_BST1

BOOT

PC46

CSD97374CQ4M

0.22u/25V_6

Add 11 GND VIAs
for thermal pad

51624_CSP1

51624_CSN1

PU8

PS3 OSR

100K Ohm

Rmode

150K OhmONON

+5V_S5

+3V_S5

PR95
15@0_4

PR91
*0_4

3

PR84

PR92
PC143

PR195
[email protected]/F_6







51624_SKIP#

51624_PWM2

CS_BSTR2

PR93

PR95

PC145

PC130
28@1u/10V_4

1

SKIP#

8

PWM

6

BOOT_R

7

CS_BST2

BOOT

PC135

[email protected]/25V_6

Add 11 GND VIAs
for thermal pad

51624_CSP2

51624_CSN2

0.24uH_7X7X4PL9
*22.6K/F_4
*0_4
*0.1u/25V_4

ON

OFF

PU9
28@CSD97374CQ4M

+VIN_VCCIN

2

5

VDD

VIN

4

VSW

3

PGND

9

PAD

PC141
*0.1u/25V_4

PC48
*0.1u/25V_4

Close to the
VR side.

For BW 2 Phase

+VIN_VCCIN

2

5

VDD

VIN

4

VSW

3

PGND

9

PAD

PC145
*0.1u/25V_4

PC143
*0.1u/25V_4

Close to the
VR side.

2

CS_SW1

CS_SW2

PC132

0.1u/50V_6

PR70

PC142

[email protected]/10V_4

PR190

Close with
phase1 inductor

PC133

[email protected]/50V_6

PR68

PC144

[email protected]/10V_4

Close with
phase1 inductor

[email protected]/F_4

10K/F_4_3435KNTC

[email protected]/F_4

PR191

PC42

2200p/50V_4

[email protected]_7X7X4

1 2

PR74

2.2_6

PC38

1000p/50V_6

PR84

[email protected]/F_4

PC44

28@2200p/50V_4

[email protected]_7X7X4

1 2

[email protected]_6

PR73

PC37

28@1000p/50V_6

PR93

*22.6K/F_4

28@10K/F_4_3435KNTC

PL8

3

PR71 [email protected]/F_4

PL9

3

PR69 [email protected]/F_4

*short_3720

1 2

12

PC43

PC134

10u/25V_8

10u/25V_8

+

PC137

DCR= 0.66mOhm

4

PC33

0.1u/10V_4

PR67 *short_4

PC41

PC131

[email protected]/25V_8

[email protected]/25V_8

DCR= 0.66mOhm

4

PC32

[email protected]/10V_4

PR66 28@0_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Wednesday, February 11, 2015 36 44

Wednesday, February 11, 2015 36 44

Wednesday, February 11, 2015 36 44

+

PC29

PC28

22u/6.3V_8

22u/6.3V_8

PC31

PC30

28@22u/6.3V_8

28@22u/6.3V_8

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

+VCCIN(TPS51624)

+VCCIN(TPS51624)

+VCCIN(TPS51624)

1

1

+3VPCU

1 2

+3V

PR181

MAINON

100K/F_4

PR49
*short_4

PC103

1000p/50V_4

A A

HWPG_1.5V[31]

JP11
*short_3720

*100p/50V_4

PC115

PC110

10u/6.3V_6

8.06K/F_4

PC26

1500p/50V_4

PR50

PC109

0.1u/25V_6

PR182
121K/F_4

2

PU7 TPS543 18RTER

16

VIN

1

VIN

2

VIN

14

PWRGD

15

EN

7

COMP

8

RT/CLK

9

SS

PC114

0.01U/25V_4

3

PC107

10u/6.3V_6

+1.5V

12

PC105
10u/6.3V_6

+1.5V

1.5Volt +/- 5%
TDC : 0.64A

10

PH

11

PH

12

PH

PR180 *Shor t_6

13

BOOT

6

VSNS

3

GND

4

GND

5

AGND

PAD17PAD18PAD19PAD20PAD21PAD

22

PC102

0.1u/50V_6

1.5V_VSNS

VFB=0.8V

1uH_7X7X3

PEAK : 0.85A
Width : 40mil

PL5

PR183

R1

100K/F_4

PC111

0.1u/10V_4

PR184

R2

113K/F_4

JP10
*short_3720

4

5

39

V0=0.8*(R1+R2)/R2

B B

Thermal protection

Need fine tune
for thermal protect point

Note placement position

TEMP=85C

S5_ON[3 1,33,34]

C C

11/4 Change to 1.47K/F

PR185

10K/F_4_3435NTC

3

2

S5_ON

PQ7
2N7002K

1

PR162

1.47K/F_4

LM393_PIN2

VLVL

S5_ON

PR158
200K/F_4

2.469V

PR164
200K/F_4

PQ39

DTC144EU

VIN

PD7
DA2J10100L

PR167
1M_6

1

PQ41
AO3409

2

2

PR143
*100K/F_6

84

+

-

1 3

PU6A
AS393MTR-E1

3

PR170
*Short_6

PC94

0.1u/50V_6

1

PR171
200K_6

PC96

0.1u/50V_6

3

2

PQ42
2N7002K

1

2

3

2

MAINON[31,35]

SYS_SHDN# [10,33]

1 3

PQ31
DTC144EU

VIN

PR142
1M_4

MAINON_ON_G

PR144
1M_4

+1.05V

PR129
220_8

PQ23
2N7002K

PR25
22_8

3

2

PQ11
2N7002K

1

PR18
22_8

3

3

2

2

PQ5
2N7002K

1

1

+15V+5V+3V

PR141
1M_4

MAIND

3

2

PQ28
2N7002K

1

PC76
*2200p/50V_4

MAIND [33,34]

D D

For EC control thermal protection (output 3.3V)

1

5

+

7

6

-

PU6B
AS393MTR-E1

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

3

4

Date: Sheet of

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

ZRT/ZRTA

ZRT/ZRTA

+1.5V/Thermal Protect

+1.5V/Thermal Protect

+1.5V/Thermal Protect

ZRT/ZRTA

5

2A

2A

2A

37 44Wednesday, F ebruary 1 1, 2015

37 44Wednesday, F ebruary 1 1, 2015

37 44Wednesday, F ebruary 1 1, 2015

5

4

3

2

1

+5V_S5

JP12

PR44

PU2

OCS/CB

EN

PSI

EV@UP1658RQKF

VID

VREF

REFADJ

REFIN

FB

11

1658R-FB

PR31

*short_4

*22P/50V_4

*Short_6

PR42

12

PC22
EV@1U/10V_4

1658R-PVCC

18

1

1658R-BOOT1

BOOT1

2

PVCC

1658R-UGATE1

UGATE1

20

1658R-PHASE1

PHASE1

19

1658R-LGATE1

LGATE1

15

1658R-BOOT2

BOOT2

14

1658R-UGATE2

UGATE2

16

1658R-PHASE2

PHASE2

17

1658R-LGATE2

LGATE2

13

1658R-PG

PGOOD

12

1658R-COMP

COMP

10

FBRTN

GND

21

1658R-FBRTN

PR30

*short_4

PR178 EV@10K_4

1 2

PR41 *short_4

12

PC19

12

EV@4700P/25V_4

PR37

PC100

EV@16K/F_6

EV@22P/50V_4

+3V

GPU_PWR_GD [17]

1658R-BOOT1

1658R-UGATE1

1658R-PHASE1

1658R-LGATE1

1658R-BOOT2

1658R-UGATE2

1658R-PHASE2

1658R-LGATE2

[email protected]/F_6

PC20

[email protected]/25V_6

[email protected]/F_6

[email protected]/25V_6

PR43

PC21

PQ45
EV@AON6752

PQ46
EV@AON6752

D D

EV@20K/F_4

EV@2700P/50V_4

2

12

VGA_VCCSENSE[16 ]

VGA_VSSSENSE[16]

Parallel

PR175 EV@10K/F_4

PC99 *0.01U/25V_4

1 2

PR174 *1/F_4

PR40 *short_4

PR39 *short_4

PR36 *short_4

1 2

PC17 EV@1U/10V_4

R1

PR33

12

PC14

PR29
*5.1K/F_4

3

PQ12
*2N7002K

1

C

[email protected]/F_4

PR54 *short_4

PR55 *short_4

EV@20K/F_4

EV@2K/F_4

3V_MAIN_PWGD

PR176
EV@100K/F_4

VGPU_EN[8]

3V_MAIN_PWGD[18,39]

DGPU_PSI[19]

PWM-VID[19]

C C

DGPU_PSI

+3V_S5

PR35
*10K_4

PR38
*0_4

+3VPCU

1658R-VREF

+VIN_GPU_COR E

PR177 *0_4

3V_MAIN_PWGD

DGPU_PSI

PWM-VID

PR34
*10K_4

Phase Number of Operation

PWM-SVID : Config B

B B

A A

Check PWM-SVID by SKU

Standby
Function

*1U/10V_4

PC15

EV@0_4

PR32

PR28

PR27

PR26

PR172

*499K/F_4

R2

R3

R4

R5

+VGPU_CORE

PR173 EV@20K/F_4

9

1658R-OCS/CB

3

1658R-EN

4

1658R-PSI

5

1658R-VID

8

1658R-VREF

6

1658R-REFADJ

7

PC18

*0.01U/25V_4

1658R-REFIN

12

PC16

PR53
*short_4

PR56
*short_4

+VIN_GPU_COR E

PC108

PC112

PC118

5

4

PQ48
EV@AON6414AL

213

5

4

213

+VIN_GPU_COR E

5

4

213

PQ47
EV@AON6414AL

5

4

213

EV@2200p/50V_4

[email protected]_7X7X3

PR52
[email protected]/F_6

PC25
EV@1000p/50V_6

PC117

EV@2200p/50V_4

[email protected]_7X7X3

PR51
[email protected]/F_6

PC24
EV@1000p/50V_6

[email protected]/50V_6

PL7

DCR=1.1m ohm

PC106

PC119

[email protected]/50V_6

PL6

DCR=1.1m ohm

*short_3720

1 2

PC113

EV@10u/25V_8

EV@10u/25V_8

+

PC123

EV@10u/25V_8

PC124

PC121

PC126

[email protected]/10V_4

EV@10u/6.3V_8

EV@330u/2V_7343

PC116

EV@10u/25V_8

+

PC120

PC125

[email protected]/10V_4

EV@10u/6.3V_8

EV@330u/2V_7343

N16S-GT(23W)

+VGPU_CORE
Countinue current:26A
Peak current:51A
OCP:A
FSW:300KHz
L/L=0mV/A

40

VIN

12

+

PC104

100U/25V_6x4.5

+VGPU_CORE

+VGPU_CORE

+

PC122

EV@330u/2.5V_6X4.2

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

ZRT/ZRTA

ZRT/ZRTA

1

ZRT/ZRTA

2A

2A

2A

of

of

of

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

+VGPU_CORE(UP1642PQAG)

+VGPU_CORE(UP1642PQAG)

+VGPU_CORE(UP1642PQAG)

Date: Sheet

Date: Sheet

Date: Sheet

Wednesday, February 11, 2015 38 44

Wednesday, February 11, 2015 38 44

5

4

3

2

Wednesday, February 11, 2015 38 44

5

+1.05V_GFX[16,17,18]
+1.5V_GFX[17,20,21,27]
+3V_GFX[16,18,19,31]

D D

PR192

3V_MAIN_PWGD[18,38]

*short_4

PC128

*1u/10V_4

4

12

PR193
EV@100K_4

3

2

1

41

VIN

PR75
EV@1M_4

3

2

1

PQ16
EV@PDTC143TT

PR72
EV@1M_4

2

1 3

PR189
EV@22_8

PQ51
EV@2N7002K

+15V+1.05V_GFX

PR65
EV@1M_4

dGPU_D1

3

2

PQ17
EV@2N7002K

1

4

PC34
*2.2n/50V_4

+1.05V_S5

52

3

EV@MDV1528Q

1

PQ52

+1.05V_GFX

+1.05V_GFX
TDC : 1.57 A
PEAK : 2.1A
Width : 80mil

VIN

C C

PR47

PC27

*1u/10V_4

*short_4

PC23

*1u/10V_4

+3V

PR64 [email protected]/F_4

PR63 EV@470K/F_4

DGPU_PWR_EN[10]

B B

HWPG_1.5VGFX[18]

FBVDDQ_EN[17]

A A

PR61
EV@100K/F_4

PR59 *short_4

OCP=8A
L ripple current
=(19-1.5)*1.5/(2.2u*290k*19)
=2.165A
Vtrip=8-(2.165/2)*14.5mohm
=100.3mV
Rlimit=100.3mV/10uA*8=80.2Kohm

12

PR48
EV@100K_4

HWPG_1.5VGFX

1.5GFX_EN

1.5GFX_TRIP

1.5GFX_TST

2

1 3

1

PGOOD

3

EN

2

TRIP

5

TST

12

GND

PQ13
EV@PDTC143TT

7

V5IN

PU3

EV@TPS51211DSCR

GND13GND14GND15GND

16

PR45
EV@1M_4

PR46
EV@1M_4

DRVH

VBST

SW

DRVL

GND

FB

4

9

10

8

6

11

2

+5V_S5

1.5GFX_DRVH

1.5GFX_VBST

1.5GFX_SW

1.5GFX_DRVL

1.5GFX_FB

3

1

PC35
EV@1u/10V_4

PR57
EV@22_8

PQ15
EV@2N7002K

PR76
*Short_6

2

+15V+3V_GFX

PR179
EV@1M_4

3

PQ44
EV@2N7002K

1

PC36

[email protected]/50V_6

PQ54

EV@AON7752

dGPU_D

4

4

VFB=0.704V

3

3

PC101
*2.2n/50V_4

52

1

52

1

+3VPCU

2

PQ53
EV@AON7410

3

PQ14
EV@AO3404

1

PC39
EV@2200p/50V_6

PL10

[email protected]_7X7X3

PR77
*4.7_6

PC40
*680p/50V_6

+3V_GFX

PC45
EV@10u/25V_8

PR60
[email protected]/F_4

PR62
EV@10K/F_4

+3V_GFX
TDC : 0.05 A
PEAK : 0.06A
Width : 20mil

VIN

+

PC136
[email protected]/50V_6

PC150
EV@330u/2V_7343

+1.5V_GFX

+1.5V_GFX

1.5 Volt +/- 5%
TDC : 3.06 A
PEAK : 4.08A
OCP : 5A
Width : 140mil

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

Wednesday, February 11, 2015 39 44

Wednesday, February 11, 2015 39 44

Wednesday, February 11, 2015 39 44

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

PROJECT :

+1.5V_GFX/+1.05V_GFX/+3V_GFX

+1.5V_GFX/+1.05V_GFX/+3V_GFX

+1.5V_GFX/+1.05V_GFX/+3V_GFX

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

1

2A

2A

2A

of

of

of

1

VGA power up sequence

+3VPCU

PCH +3V_GFXMOSFET

A A

dGPU_PWR_EN

+3V_GFX

GPU 3V_MAIN_EN

B B

VGA Reset

PCH

I/O 3.3V

PEX_RST

C C

D D

PLTRST#

DGPU_HOLD_RST#

PEX_RST timing

Trise >= 1uS Tfail <=500nS

MOSFET

2

+3V_MAIN

3V_MAIN_PWGD

PEGX_RST#

3

VIN

Power States

POWER PLANE

VIN

+3V_RTC

+3VPCU

+5VPCU

+15V

+5V_S5

+5V

+1.35VSUS

+DDR_VTT_RUN

LCDVCC

+1.5V

+1.05V

+VCCIN

+3V_GFX

+1.05V_GFX

+VGPU_CORE

+1.35V_GFX

VGA_VID

3V_MAIN_PWGD

VOLTAGE

+10V~+19V

+3V~+3.3V

+3.3V

+5V

+15V

+3.3V

+5V

+5V

+3.3V

+1.35V

+0.675V

+3.3V

+1.5V

+1.05V

variation

variation

+3.3V

+1.35V

+1.05V

4

+VGPU_CORE

GPU_PWR_GD

VIN

OR
Gate

PWM

EC_FB_CLAMP

EC

+1.05V_S5

3V_MAIN_PWGD

MOSFET +1.05V_GFX

DESCRIPTION

RTC POWER

EC POWER

USB CHARGE POWER

CHARGE PUMP POWER

LAN/BT POWER

USB POWER

HDD/SPK/HD MI POWER

PCH/GPU/ Periphe ral c omponen t POW ER+3V

CPU/SODIMM/MD POWER

SODIMM/MD Termination POW ER

LCD POWER

MINI CARD/NEW CARD POWER

PCH CO RE VCC ST POW ER MAINON

CPU CORE POWER

External GPU POWER S0

External GPU POWER

External GPU POWER FBVDDQ_EN

FBVDDQ_EN

CONTROL
SIGNAL

ALWAYSMAIN POWER

ALWAYS

ALWAYS

ALWAYS

S5_ON+3V_S5

S5_ON

MAINON

MAINON

SUSON

MAINON

LVDS_VDDEN

MAINON

VRON

3V_MAIN_EN

3V_MAIN_EN S0

5

6

7

8

39

+1.35V_GFX

PWM

MOSFET

H_PROCHOT#

dGPU_OPP#

DGPU_PWROK

H/W Throttling

GPIO12_ACIN

HSW ULT

SM-Bus1

EC

dGPU_ALT#

dGPU_OTP#

dGPU

PM_THRMTRIP# SYS_SHDN#

FAN_PWM

SM-Bus1

GPIO12 HW throttle
over power protect

WIRE-AND

CPU FAN

3V/5 V
SYS PWR

ACTIVE IN

ALWAYS

ALWAYS

ALWAYS

ALWAYS

ALWAYSALWAYS

S0-S5

S0-S5

S0

S0

S0-S3

S0

S0

S0

S0

S0

S0DGPU_PWR_ENExternal GPU POWER

S0

HWPG_1.5VGFX

Thermal Follow Ch art

CPU
CORE PWR

dGPU_OPP# EC notify HW throttle over power protect
dGPU_OTP# VGA thrmtrip# => inform EC over temperature protect

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

1

2

3

4

5

6

Date: Sheet of

7

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

ZRT/ZRTA

PROJECT :

ZRT/ZRTA

PROJECT :

PWR Status & GPU PWR CRL & THRM

PWR Status & GPU PWR CRL & THRM

PWR Status & GPU PWR CRL & THRM

ZRT/ZRTA

40 44Wednesday, February 11, 2015

40 44Wednesday, February 11, 2015

40 44Wednesday, February 11, 2015

8

3A

3A

3A

5

Battery Mode

PG

DDR_PG_CTRL

MAINON

+0.75V_ON

SUSON

PG

G

26

PG

S5_ON

MAINON

+5V_S5

+3V_S5

S5_ON

+1.35V_SUS

DDR_VTTREF

+DDR_VTT_RUN

HWPG_VDDR

+1.5V

HWPG_1.5V

MAINON

+5V

+3V

+1.05V

MAINON

9

+1.05V_S5

HWPG_1.05V

8

21

11

10

8

18

19

23

24

22

21

?

17

24

12

2929

21

28

27

25

21

12

+5VPCU

3

3

+5VPCU

+3VPCU

+1.05V_S5

S5 PWR

VIN

1

DDR VDDQ
VR

S3

S5

+3VPCU

1.5V
VR

EN

RUN PWR

MOS1

MOS2

MOS3

VIN

1

+1.05V_S5

VR

EN

+3VPCU

D D

3

C C

B B

3

3

9

A A

PCH

5

4

VIN

3V/5V

VR

EN2

1

EN1

NBSWON#

3 3

+3VPCU +5VPCU

3V_LDO

2

PWR
BTN

7

30

HWPG

HWPG_VDDR

HWPG_1.05V

HWPG_1.5V

SVID

37

+1.05V

VIN

1

IMVP
VR

0 ohm

EN

+0.75V_ON

?

+1.05V_VCCST

PG

+VCCIN

IMVP_PWRGD

VRON_CPU

VRON

CPU

4

VL

2

+15V

4

EC

EC_PWROK

32b30a

HWPG_1.05V_EC#

33

34

32a

32b

3

depend on A measure
result to implement
for B test

DSW_ON

5a

6

13

14

15

VRON

MAINON

SUSON

S5_ON

8172131

3

DPWROK

RSMRST#

SB_ACDC

DNBSWON#

SUSC#

SUSB#

PCH_SUSACK#

PCH_SUSPWARN#

PCH_SLP_SUS#

31

35

38

34

31

12

31

36

HWPG_1.05V_EC#

30a

HWPG+1ms

+3VPCU

3

+3.3V_DSW

16
20

IMVP_PWRGD

EC_PWROK

HWPG_1.05V

EC_PWROK

SYS_PWROK

2

+3.3V_DSW

EN

Delay DSW power well 10ms

EC_PWROK

PCH_CLK

PLTRST#

VCCST_PWRGD_EN

2

1

5b

SYS_PWROK

10K ohm

1

BAT-VVIN

CHARGER

DPWROK

RSMRST#

ACPRESENT

PWRBTN#

SLP_S4#

SLP_S3#

SUSACK

SUSWRAN

SLP_SUS#

APWROK

PCH_PWROK

PLTRST#

SYS_PWROK

36

38

PLTRST#

PROCPWRGD

SVID

SVID

37

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Battery

3

+3VPCU or +3.3V_DSW

DSW PWR

SUS PWR

ASW PWR

SPI PWR

HSIO PWR

PLL PWR

PCH

CORE PWR

SDIO PWR

HDA PWR

CORE PWR

CPU

VDDQ PWR

RESET#

VCCST PWR

VR_READY

SM_PG_CNTL1

VCCST_PWRGD

DDR_PG_CTRL

IMVP_PWRGD

VCCST_PWRGD_EN

22

34

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

Power Sequence

Power Sequence

Power Sequence

1

+3VCC_S5

+V1.05DX_MODPHY

VR_ENVRON_CPU

32a

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

41 44Wednesday, February 11, 2015

41 44Wednesday, February 11, 2015

41 44Wednesday, February 11, 2015

40

+1.05V

+3V_S5

+1.05V

+1.05V

+3V

+3V_S5

+VCCIN

+1.35V_SUS

+1.05V_VCCST

3A

3A

3A

1

2

3

4

5

6

7

8

+3V_S5

+3V

41

SDRAM

A A

AP2

SMB_PCH_DAT

AH1

SMB_PCH_CLK

2.2K2.2K

+3.3V_RUN

2N7002DW
Level shift

CLK_SCLK

CLK_SDATA

4.7K4.7K

WLAN

XDP

Brodwell
ULT

SMB_ME0_CLK

B B

AN1

SMB_ME0_DAT

AK1

+3V_S5

SMB_ME1_CLK

AU3

SMB_ME1_DAT

AH3

+3V_S5

C C

2ND_MBDATA

116

2ND_MBCLK

115

110

MBCLK

111 MBDATA

SIO

D D

ITE8987

1

94

G_MBCLK

95 G_MBDATA

2

+3V_S5

2.2K2.2K

*2.2K*2.2K

+3V_S5

*2N7002DW
Level shift

3V3MISC

4.7K4.7K

4.7K4.7K

+3V_GFX

+3VPCU

2N7002DW
Level shift

100

10K10K

100

Battery

dGPU

Charger

+G_SEN_PW

*4.7K*4.7K

*Accelerometer Sensor

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

3

4

5

6

Date: Sheet of

PROJECT :

Block Diagram

Block Diagram

Block Diagram

7

ZRT/ZRTA

ZRT/ZRTA

ZRT/ZRTA

42 44Wednesday, February 11, 2015

42 44Wednesday, February 11, 2015

42 44Wednesday, February 11, 2015

8

3A

3A

3A

󱬯󱬯󱬯󱬯󳴣󳴣󳴣󳴣󴞱󴞱󴞱󴞱defult
󴖤󴖤󴖤󴖤󳴣󳴣󳴣󳴣󴞱󴞱󴞱󴞱reserve

1

PWR

D D

5

SYS_HWPG

PWRGD3V_LDO

EN!

3V_LDO

1

EN2

3V/5V

TPS51225

Vin

S5_Vout

S3_Vout

VIN

C C

4

+5VPCU

+3VPCU

PCH

S5D

2

MAIND

4

S5D

2

MAIND

4

dGPU_PWR_EN

MDV1528Q

MDV1528Q

AO3404

AO3404

AO3404

3

+5V_S5

+5V

+3V_S5

+3V

+3V_GFX

EC

EC_FB_CLAMP

GPU_PWR_GD

8

2

VIN

6

3V_MAIN_P WGD

VIN

OR Gate

Vin

PWRGD

VGPU Core

uP1642

EN

Vin

FBVDDQ_EN

VGPU_PWRGD

Vout

PWRGD

+1.35V_GFX

TPS51211

EN

HWPG_1.5VGFX

Vout

1

45

7

+VGPU_CORE

9

+1.35V_GFX

HWPG_1.05V

PWRGD

VIN

2

EC

B B

4

EC

3

EC

PCH

A A

EC

+1.05V_S5

Vin

S5_ON

MAINON

DDR_VTTT_PG_CTRL

MAINON

4

+0.75V_ON

TPS51211

EN

Vout

S5 EN

S3 EN

6

PWRGDSUSON

+1.35V_SUS

TPS51216

Vin

3V_MAIN_P WGD

HWPG_VDDR

S5_Vout

S3_Vout

+1.05V_S5

AND Gate

+1.35V_SUS

DDR_VTTREF

+DDR_VTT_RUN

VIN

5

4

AO3430

MAIND

4

MDV1528Q

dGPU_D1

+1.05V

+1.05V_GFX

IMVP_PWRGD

PWRGD

VRON_CPU

VRON

Vin

Vin

MAINON

CPU VCCIN

+1.5V

2

TPS51622

EN

PWRGD

TPS54318

EN

Vout

HWPG_1.5V

Vout

VIN

5

+3VPCU

4

3

+VCCIN

+1.5V

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

ZRT/ZRTA

ZRT/ZRTA

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

ZRT/ZRTA

ULT PWR CONTROL

ULT PWR CONTROL

ULT PWR CONTROL

1

of

of

of

43 44Wednesday, February 11, 2015

43 44Wednesday, February 11, 2015

43 44Wednesday, February 11, 2015

3A

3A

3A

Model

ZQ0

5

Version

1A-1

2013/10/15 change pin define and add pwm IC.(page31)1

2 2013/10/15 Change VGA ITE solution to NXP.(page 23)

4

CHANGE LIST

3

2

1

3 2013/10/15 power board CN change to 6pin.(Page 23)

4 2013/10/15 U5017.12 change 27M crystal to VGA IC.(Page 23)

2013/10/15 U5017.14 add power rail +3V_RTC(page23)5

6 2013/10/15 strap0 R672 DG 50k PU.(P age 19)

7 2013/10/15 Change AND gat to Q63 D-MOS.(Page 19)

8 2013/10/15 change pin define and add pwm IC U17.(Page 46)

D D

9 2013/10/15 for GC6 stuff R228\R1013\R226\R1012.un-stuff Q24\Q26\R227\R1011. (Page19)

10 20131015 F or GC6 NV DG GC6_FB_EN PD.(Page10)

11 2013/10/15 following up acer define and swap USB3 and USB2 port.(Page9)

12 2013/10/15 swap CAP C8579/C8580 to Vrefo and resistor R5214/R5215 to Line in.(Page30)

13 2013/10/15 U27.30/U27.31 del fan Pwm signal.(Page32)

14 20131015 change LVDS\USB3\RJ45\FAN\TPD\USB DB CN\DC-IN CN\Power Button\Cardreader\KB BLK CN\Power board, footprint.

1 2013/10/16 JDIM5 Swap M _B_DQS2/M_B_DQS3 and swap M_B_DQS#2/M_B_DQS#3.(page15)

1A-2

2 2013/10/16 JDIM6 Chage net name M_B_DQS#[7:0] to M_A_DQS#[7:0].(page14)

3 2013/10/16 Add RTC charge circuit.(page8)

4 2013/10/16 BT1.1 Chage +3V_RTC_0 to VCCTC_2.(page8)

5 2013/10/15 change power rail from +3V_RTC_0 to VCCRTC_2.(page23)

C C

B B

A A

DOC NO.

PROJECT MODEL
:

PART NUMBER: DRAWING BY: REVISON:

5

ZQ0 APPR OVED BY :

4

DATE:

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

ZRT/ZRTA

PROJECT :

ZRT/ZRTA

PROJECT :

Change list-1

Change list-1

Change list-1

ZRT/ZRTA

44 44Wednesday, February 11, 2015

44 44Wednesday, February 11, 2015

44 44Wednesday, February 11, 2015

1

3A

3A

3A