QUANTA ZQ2 Schematics

VER : 1A

BOM P/N

31ZQ2MB00A0

31ZQ2MB00E0

A A

31ZQ2MB00H0

PCB STACK UP

LAYER 1 : TOP LAYER 2 : GND LAYER 3 : IN1 LAYER 4 : IN2 LAYER 5 : VCC LAYER 6 : BOT

IV@ -----> iGPU

B B

SP@ -----> Option Notice SIDE@ -----> SidePort VRAM GA@ ----> Green Adapter (Default stuff)

Sideport-L75,L76,R583,R392,C832,R455,R550,R502 NB A11-R105,R108 SB A12-R267,R271 JV/JM-CN16,R450,R456 EC-D8,D27 UMA-R461 VRAM-R358,R359,R360,R363,R365,R72

C C

CHARGER (ISL88731A)

AMD CPU CORE (ISL6265)

NB_CORE (UP6111AQDD)

0.9V/DDR 1.5V(RT8207)

SYSTEM 5V/3V (RT8206)

D D

1.1V(UP6111AQDD)

Discharge /Thermal protec

Description

ZQ2B 6L JM MB (W/GRN,SAM,W/O CPU)ASSY

ZQ2B 6L JM MB (W/GRN,HYU,W/O CPU)ASSY

ZQ2B 6L JV MB (W/GRN,W/O CPU,VRAM)ASSY

PAGE 26

PAGE 28

PAGE 30

PAGE 31

PAGE 27

PAGE 29

PAGE 32

CPU

Model SidePort ODD

Sansung

Hynix

No Support

25MHz

Slim

Standard

LAN

Atheros PCIE-LAN AR8151

(10/100/1000)

JM JM

RJ45

SATA - HDD

SATA - ODD

CPU SideBand TemperatureSense I2C

ZQ2B SOLE UMA SYSTEM DIAGRAM

DDR3- SODIMM1

PAGE 5

DDR3- SODIMM2

PAGE 5

CPU SideBand TemperatureSense I2C

Mini PCI-E Card

(Wireless LAN)

PAGE 17

SATA0 150MB

PAGE 25

3 Gb/s

SATA1 150MB

3 Gb/s

CLK_PCI_775

Keyboard TouchPad

PAGE 19

Green ADP.

DDR3 channel A

DDR3 channel B

PCI-Expresss

PAGE 18

Winbond KBC

NPCE781L & Green Adapter

PAGE 24 PAGE 25

AMD Champlain

S1G4 Processor

35mm X 35mm

638P (PGA) 35W

HT3

1.8GHz

NORTH BRIDGE

RS880M A11

21mm X 21mm, 528pin BGA

TDP: 13W

0.95 ~ 1.1V

A-LINK

SOUTH BRIDGE SB820M

A12

23mm X 23mm, 605pin BGA

No PCI I/F

TDP: 4.9W

LPC

PAGE 25

SPI ROM

PAGE 2,3,4

Side Port

GFX Engine: 500MHz

HDMI

CRT

PAGE 6,7,8,9

PAGE 10,11,12,13, 14

LVDS

Azalia

Audio CODEC

RTL ALC271X

Digital MIC AUDIO CONN

PAGE 15 & 20

CPU THERMAL SENSOR

(Reserve Only)

CPU_CLK NBGFX_CLK NBGPP_CLK SBLINK_CLK

USB2.0 Port

on board x1

PAGE 30

PCLK_DEBUG

PAGE 20

(H.P./ MIC)

PAGE 20 PAGE 20

PAGE 4

gDDR3 VRAM

DDR III-800MHz

HDMI

CRT

LVDS

Mini Card

WLAN & Debug

PAGE 18

Speaker CN

PWM FAN SCH.

PAGE 24

PAGE 6

PAGE 16

PAGE 15

PAGE 23

Blue Tooth

PAGE 22

CardReader

AU6347

CPU (PROCHOT) E.C. (CPUFAN#)

From SB

CLK GEN

SB820M

PAGE 10

32.768KHz25MHz

P13

Web-Camera

PAGE 15

P10

PAGE 21

12MHz

FFC

PROJECT : ZQ2

Quanta Computer Inc.

Size Document Number Rev

Block Diagram

Date: Sheet of

Thursday, March 04, 2010

Date: Sheet of

Thursday, March 04, 2010

Date: Sheet of

Thursday, March 04, 2010

Danube Platform

(Main Stream)

CLK_PCI_775

PCLK_DEBUG

FFC

P8, 11, 12

USB BOARD

USB2.0 Ports x3

PAGE 22

Power BOARD

PAGE 22

Switch BOARD

PAGE 22

There are three Daughter boards.

SSID: 035E SVID: 1025

1 36

S1G4 (CPU)

1.1V@1.5A

+1.1V +1.1V_VLDT

R108 0_6R108 0_6 R109 0_6R109 0_6

D D

HT_CADINP0[6] HT_CADINN0[6] HT_CADINP1[6] HT_CADINN1[6] HT_CADINP2[6] HT_CADINN2[6] HT_CADINP3[6] HT_CADINN3[6] HT_CADINP4[6] HT_CADINN4[6] HT_CADINP5[6] HT_CADINN5[6] HT_CADINP6[6] HT_CADINN6[6] HT_CADINP7[6] HT_CADINN7[6] HT_CADINP8[6] HT_CADINN8[6] HT_CADINP9[6] HT_CADINN9[6] HT_CADINP10[6] HT_CADINN10[6] HT_CADINP11[6] HT_CADINN11[6] HT_CADINP12[6] HT_CADINN12[6]

C C

FOX PZ63826-284R-41F DG0^8000004 IC SOCKET SMD 638P S1(P1.27,H3.2) MLX 47296-4131 DG0^8000003 IC SOCKET SMD 638P S1(P1.27,H3.2) TYC 4-1903401-2 DG0^8000005 IC SOCKET SMD 638P S1(P1.27,H3.2)

HT_CADINP13[6] HT_CADINN13[6] HT_CADINP14[6] HT_CADINN14[6] HT_CADINP15[6] HT_CADINN15[6]

HT_CLKINP0[6] HT_CLKINN0[6] HT_CLKINP1[6] HT_CLKINN1[6]

HT_CTLINP0[ 6] HT_CTLINN0[6] HT_CTLINP1[ 6] HT_CTLINN1[6]

2.5V@250mA

C316 10u/6.3V_8C316 10u/6.3V_8 C158 10u/6.3V_8C158 10u/6.3V_8 C162 .22u/6.3V_4C162 .22u/6.3V_4 C336 180p/50V_4C336 180p/50V_4

HT_CADINP0 HT_CADINN0 HT_CADINP1 HT_CADINN1 HT_CADINP2 HT_CADINN2 HT_CADINP3 HT_CADINN3 HT_CADINP4 HT_CADINN4 HT_CADINP5 HT_CADINN5 HT_CADINP6 HT_CADINN6 HT_CADINP7 HT_CADINN7 HT_CADINP8 HT_CADINN8 HT_CADINP9 HT_CADINN9 HT_CADINP10 HT_CADINN10 HT_CADINP11 HT_CADINN11 HT_CADINP12 HT_CADINN12 HT_CADINP13 HT_CADINN13 HT_CADINP14 HT_CADINN14 HT_CADINP15 HT_CADINN15

HT_CLKINP0 HT_CLKINN0 HT_CLKINP1 HT_CLKINN1

HT_CTLINP0 HT_CTLINN0 HT_CTLINP1 HT_CTLINN1

BLM21PG221SN1D(220,100M,2A)_8

+2.5V

C374

4.7u/6.3V_6

+1.1V_VLDT +1.1V_VLDT +1.1V_VLDT +1.1V_VLDT

L41

LS0805-100M-N

U17A

VLDT_A0

VLDT_A1

VLDT_A2

VLDT_A3

L0_CADIN_H0

L0_CADIN_L0

L0_CADIN_H1

L0_CADIN_L1

L0_CADIN_H2

L0_CADIN_L2

L0_CADIN_H3

L0_CADIN_L3

L0_CADIN_H4

L0_CADIN_L4

L0_CADIN_H5

L0_CADIN_L5

L0_CADIN_H6

L0_CADIN_L6

L0_CADIN_H7

L0_CADIN_L7

L0_CADIN_H8

L0_CADIN_L8

L0_CADIN_H9

L0_CADIN_L9

L0_CADIN_H10

L0_CADIN_L10

L0_CADIN_H11

L0_CADIN_L11

L0_CADIN_H12

L0_CADIN_L12

L0_CADIN_H13

L0_CADIN_L13

L0_CADIN_H14

L0_CADIN_L14

L0_CADIN_H15

L0_CADIN_L15

L0_CLKIN_H0

L0_CLKIN_L0

L0_CLKIN_H1

L0_CLKIN_L1

L0_CTLIN_H0

L0_CTLIN_L0

L0_CTLIN_H1

L0_CTLIN_L1

SOCKET_638_PIN

HT LINK

+CPUVDDA

C368

4.7u/6.3V_6

VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3

L0_CADOUT_H0 L0_CADOUT_L0 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H9

L0_CADOUT_L9 L0_CADOUT_H10 L0_CADOUT_L10 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H15 L0_CADOUT_L15

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CLKOUT_H1

L0_CLKOUT_L1 L0_CTLOUT_H0

L0_CTLOUT_L0 L0_CTLOUT_H1 L0_CTLOUT_L1

W/S= 15 mil/20mil

C367

.22u/6.3V_4

AE2 AE3 AE4 AE5

AD1 AC1 AC2 AC3 AB1 AA1 AA2 AA3 W2 W3 V1 U1 U2 U3 T1 R1 AD4 AD3 AD5 AC5 AB4 AB3 AB5 AA5 Y5 W5 V4 V3 V5 U5 T4 T3

Y1 W1 Y4 Y3

R2 R3 T5 R5

C369

C369 3300p/50V_4

3300p/50V_4

+1.1V_VLDT +1.1V_VLDT +1.1V_VLDT +1.1V_VLDT

HT_CADOUTP0 HT_CADOUTN0 HT_CADOUTP1 HT_CADOUTN1 HT_CADOUTP2 HT_CADOUTN2 HT_CADOUTP3 HT_CADOUTN3 HT_CADOUTP4 HT_CADOUTN4 HT_CADOUTP5 HT_CADOUTN5 HT_CADOUTP6 HT_CADOUTN6 HT_CADOUTP7 HT_CADOUTN7 HT_CADOUTP8 HT_CADOUTN8 HT_CADOUTP9 HT_CADOUTN9 HT_CADOUTP10 HT_CADOUTN10 HT_CADOUTP11 HT_CADOUTN11 HT_CADOUTP12 HT_CADOUTN12 HT_CADOUTP13 HT_CADOUTN13 HT_CADOUTP14 HT_CADOUTN14 HT_CADOUTP15 HT_CADOUTN15

HT_CLKOUTP0 HT_CLKOUTN0 HT_CLKOUTP1 HT_CLKOUTN1

HT_CTLOUTP0 HT_CTLOUTN0 HT_CTLOUTP1 HT_CTLOUTN1

+CPUVDDA

C373

C373 *10u/6.3V_8

*10u/6.3V_8

CPU CLK

CLK_CPU_BCLKP_PR[10] CLK_CPU_BCLKN_PR[10]

Keep trace from resisor to CPU within 0.6" keep trace from caps to CPU within 1.2"

CLK_CPU_BCLKP_C CLK_CPU_BCLKN_C

C16110u/6.3 V_8 C16110u/6.3 V_8 C334.22u/6.3 V_4 C334.22u/6.3V_4 C320180p/50 V_4 C320180p/50V_4

HT_CADOUTP0 [6] HT_CADOUTN0 [6] HT_CADOUTP1 [6] HT_CADOUTN1 [6] HT_CADOUTP2 [6] HT_CADOUTN2 [6] HT_CADOUTP3 [6] HT_CADOUTN3 [6] HT_CADOUTP4 [6] HT_CADOUTN4 [6] HT_CADOUTP5 [6] HT_CADOUTN5 [6] HT_CADOUTP6 [6] HT_CADOUTN6 [6] HT_CADOUTP7 [6] HT_CADOUTN7 [6] HT_CADOUTP8 [6] HT_CADOUTN8 [6] HT_CADOUTP9 [6] HT_CADOUTN9 [6] HT_CADOUTP10 [6] HT_CADOUTN10 [6] HT_CADOUTP11 [6] HT_CADOUTN11 [6] HT_CADOUTP12 [6] HT_CADOUTN12 [6] HT_CADOUTP13 [6] HT_CADOUTN13 [6] HT_CADOUTP14 [6] HT_CADOUTN14 [6] HT_CADOUTP15 [6] HT_CADOUTN15 [6]

HT_CLKOUTP0 [6] HT_CLKOUTN0 [6] HT_CLKOUTP1 [6] HT_CLKOUTN1 [6]

HT_CTLOUTP0 [6] HT_CTLOUTN0 [6] HT_CTLOUTP1 [6] HT_CTLOUTN1 [6]

CLK_CPU_BCLKP_PR CLK_CPU_BCLKN_PR

SideBand Temp sense I2C

Eliot (02/26) Current Agesa bios doesnˇt program ALERT_L and SB wonˇt process alert.

R292 169/F_4R292 16 9/F_4

+1.1V_VLDT

+1.5VSUS

CLK_CPU_BCLKP_PR CLK_CPU_BCLKN_PR

C370 3900p/25V_4C370 3900p/25V_4 C371 3900p/25V_4C371 3900p/25V_4

CPU_VDD0_FB_H[28] CPU_VDD0_FB_L[28]

CPU_VDD1_FB_H[28] CPU_VDD1_FB_L[28]

+1.5VSUS

R255 1K_4R255 1K_4 R256 *300/F_4R256 *300/F_4

CPU_LDT_RST#[10]

CPU_PWRGD[10,28]

CPU_LDT_STOP#[8,10]

CPU_SIC[4] CPU_SID[4]

T9T9

R67 44.2/F_4R67 44.2/F_4 R62 44.2/F_4R62 44.2/F_4

place them to CPU within 1.5"

T1T1 T3T3 T6T6 T7T7 T2T2

R122 510/F_4R122 510/F_4 R123 510/F_4R123 510/F_4

+CPUVDDA

250mA

W/S= 15 mil /20mil

+CPUVDDA +CPUVDDA

CLK_CPU_BCLKP_C CLK_CPU_BCLKN_C

CPU_LDT_RST# CPU_PWRGD CPU_LDT_STOP# CPU_LDT_REQ#_CPU

CPU_ALERT#

CPU_HTREF0 CPU_HTREF1

CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST#

CPU_TDI CPUTEST23 CPUTEST18

CPUTEST19

CPUTEST25H

CPUTEST25L

place them to CPU within 1.5"

CPUTEST21 CPUTEST20 CPUTEST24 CPUTEST22 CPUTEST12 CPUTEST27

F8 F9

A9 A8

B7 A7

F10

AF4 AF5 AE6

R6 P6

F6 E6

AB6 G10

AA9 AC9 AD9

AF9 AD7

H10

G9 E9

AB8

AF7

AE7

AE8 AC8

AF8

AA6

A3 A5 B3 B5 C1

SOCKET_638_PIN

CPU_LDT_RST# CPU_LDT_REQ#_CPU CPU_LDT_STOP#

U17D

VDDA1 VDDA2

CLKIN_H CLKIN_L

RESET_L PWROK LDTSTOP_L LDTREQ_L

SIC SID ALERT_L

HT_REF0 HT_REF1

VDD0_FB_H VDD0_FB_L

VDD1_FB_H VDD1_FB_L

DBRDY TMS TCK TRST_L TDI

TEST23 TEST18

TEST19 TEST25_H

TEST25_L TEST21

TEST20 TEST24 TEST22 TEST12 TEST27

TEST9 TEST6

RSVD1 RSVD2 RSVD3 RSVD4 RSVD5

RSVD11

THERMTRIP_L

PROCHOT_L

MEMHOT_L

THERMDC

THERMDA

VDDIO_FB_H VDDIO_FB_L

VDDNB_FB_H

VDDNB_FB_L

DBREQ_L

TEST28_H

TEST28_L

TEST17 TEST16 TEST15 TEST14

TEST7

TEST10

TEST8

TEST29_H

TEST29_L

RSVD10

RSVD9 RSVD8 RSVD7 RSVD6

R301300/F_4 R301300/F_4

+1.5V

R298*300/F_4 R298*300/F_4 R120300/F_4 R120300/F_4

M11

VSS

W18

CPU_SVC

SVC

CPU_SVD

SVD

CPU_THERMTRIP_L#

AF6

CPU_PROCHOT_L#

AC7 AA8

W7 W8

VDDIO_FB_H

VDDIO_FB_L

Y9 H6

CPU_DBREQ#

E10

CPU_TDO

AE9

TDO

J7 H8

CPUTEST17

CPUTEST16

CPUTEST15

CPUTEST14

C7 C3

K8 C4

CPUTEST29H

C9 C8

H18 H19

CPUTEST29L

AA7 D5 C5

H_THRMDC [4] H_THRMDA [4]

T4T4 T8T8

CPU_VDDNB_FB_H [28] CPU_VDDNB_FB_L [28]

R121 300/F_4R121 300/F_4

T5T5

T19T19 T29T29 T28T28 T27T27

T26T26

R126

80.6/F_4

T25T25

+1.5VSUS

B B

A A

+1.5VSUS

R22 20K/F_4R22 20 K/F_4

+3V

CPU_LDT_REQ#_CPU

The RS880 family does not support CLMC architecture The LDTREQ# connection from the CPU to ALLOW_LDTSTOP of the Northbridge is no longer required.

NB_PWRGD_IN[8,11,14]

R261 1K_4R261 1K_4

CPU_THERMTRIP_L#

C300 .1u/10V _4C300 .1u/10V_4

R247 34.8K/F_4R247 34.8K/F_4

Q21 *BSS138_NL/SOT23Q21 *BSS138_NL/SOT23

R243 *0_4R243 *0_4

+1.5VSUS

ECN: B3A

Change Q23 to BSS138

Q23

BSS138_NL/SOT23

R249

R249 1K_4

1K_4

Q24

Q24 MMBT3904

MMBT3904

1 3

CNTR_VREF [4]

CPU_LDT_REQ# [8]

+1.5VSUS

SYS_SHDN# [27,32]

CNTR_VREF

CPU_LDT_RST#

R31 10K_4R31 10K_4

R262 300/F_4R262 300/F_4

CPU_PROCHOT_L#

G2 *SHORT_ PAD1

*SHORT_ PAD1

for debug only

R26 0_4R26 0_4

John (02/26) SB SCL mentions that you donˇt need level shift between CPU and SB, But, you need level shift below CPU and FAN control c ircuit.

1 3

MMBT3904Q4MMBT3904

Q3 BSS138_NL/SOT23

BSS138_NL/SOT23

To FAN

To SB

+3V

R20

4.7K_4

+3V/S0 PU at FAN side.

PM_THERM# [4,24]

+3V/S5 PU at SB side. (Reserve)

CPU_PROCHOT# [10]

Serial VID

+1.5V +1.5VSUS +1.5V

CPU_SVC CPU_SVDCPU_LDT_RST_HTPA# CPU_PWRGD

HDT Connector

T46T46 T47T47 T41T41 T42T42 T43T43 T44T44

+1.5VSUS

T45T45

C206 *.1u/10V_4C206 *.1u/10V_4

R303 300/F_4R303 300/F_4 R295 1K_4R295 1K_4 R300 1K_4R300 1K_4

R299 *220_4R299 *220_4 R297 *220_4R297 *220_4 R302 *220_4R302 *220_4

CN8

CN8 *HDT CONN

*HDT CONN

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

KEY

2/10 Confirmed AMD

CPU_SVC [28] CPU_SVD [28]

T33T33

VFIX MODE

SVC SVD Voltage Output

0 0 001 1 1 1

CPUTEST24 CPUTEST23 CPUTEST20 CPUTEST22 CPUTEST12 CPUTEST15 CPUTEST14 CPUTEST19 CPUTEST18 CPUTEST21

Size Documen t Number Rev

Date: Sheet of

VID Override Circuit

1.1V

1.0V

0.9V

0.8V

R258 1K_4R258 1K_4 R260 1K_4R260 1K_4 R259 1K_4R259 1K_4 R257 1K_4R257 1K_4 R34 1K_4R34 1K_4 R127 *300/F_4R127 *300/F_4 R128 *300/F_4R128 *300/F_4 R98 1K_4R98 1K_4 R99 1K_4R99 1K_4 R35 1K_4R35 1K_4

PROJECT : ZQ2

Quanta Computer Inc.

S1G4 HT,CTL I/F 1/3

Thursday, March 04, 2010

2 36

+1.5VSUS CPU_VDDR

PLACE THEM CLOSE TO CPU WITHIN 1"

R250

R250 0_4

0_4

4 4

C307

C307 10u/6.3V_8

10u/6.3V_8

3 3

2 2

CPU_VDDR

C168

C168 1000P/50V_4

1000P/50V_4

+1.5VSUS

1 1

R253 39.2/F_4R253 39.2/F_4 R254 39.2/F_4R254 39.2/F_4

M_A_RST#[5] M_A_ODT0[5]

M_A_ODT1[5]

M_A_CS#0[5] M_A_CS#1[5]

M_A_CKE0[5] M_A_CKE1[5]

M_A_CLKP1[5] M_A_CLKN1[5]

M_A_CLKP2[5] M_A_CLKN2[5]

M_A_A[0..15][5] M_B_A[0..15] [5]

M_A_BANK0[5] M_A_BANK1[5] M_A_BANK2[5]

M_A_RAS#[5] M_A_CAS#[5] M_A_WE#[5]

C171

C171 1000P/50V_4

1000P/50V_4

R24

R24 1K/F_4

1K/F_4

R25

C29

1K/F_4

*.47u/10V_4

1 2

CPU_VDDR

C174

4.7u/6.3V_6

C145

C145 1000P/50V_4

1000P/50V_4

+3VPCU

3 4

R23 *0_4R23 *0_4 R27 *0_4R27 *0_4

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

35W CPU support 0.9V 45W CPU support 1.05V

U17B

D10

VDDR1

C10

VDDR2

B10

VDDR3

AD10

VDDR4

M_ZP

AF10

MEMZP

M_ZN

AE10

MEMZN

H16

MA_RESET_L

T19

MA0_ODT0

V22

MA0_ODT1

U21

MA1_ODT0

V19

MA1_ODT1

T20

MA0_CS_L0

U19

MA0_CS_L1

U20

MA1_CS_L0

V20

MA1_CS_L1

J22

MA_CKE0

J20

MA_CKE1

N19

MA_CLK_H5

N20

MA_CLK_L5

E16

MA_CLK_H1

F16

MA_CLK_L1

Y16

MA_CLK_H7

AA16

MA_CLK_L7

P19

MA_CLK_H4

P20

MA_CLK_L4

N21

MA_ADD0

M20

MA_ADD1

N22

MA_ADD2

M19

MA_ADD3

M22

MA_ADD4

L20

MA_ADD5

M24

MA_ADD6

L21

MA_ADD7

L19

MA_ADD8

K22

MA_ADD9

R21

MA_ADD10

L22

MA_ADD11

K20

MA_ADD12

V24

MA_ADD13

K24

MA_ADD14

K19

MA_ADD15

R20

MA_BANK0

R23

MA_BANK1

J21

MA_BANK2

R19

MA_RAS_L

T22

MA_CAS_L

T24

MA_WE_L

SOCKET_638_PIN

Place close to socket

C34

C33

4.7u/6.3V_6

C40

C172

1000P/50V_4

180p/50V_4

R30 0_4R30 0_4

C27

*.1u/10V_4

*OPA343NA/3K

R28 *10_ 4R28 *10_ 4

1 2

VDDR=>1.75A

MEM:CMD/CTRL/CLK

VDDR_SENSE

MB_RESET_L

C175

4.7u/6.3V_6

C38

180p/50V_4

VDDR=> 0.9V support 1066 / 800 DDR VDDR= >1.05V support 1333 / 1066 / 800 DDR

CPU_VDDR

W10

VDDR5

AC10

VDDR6

AB10

VDDR7

AA10

VDDR8

A10

VDDR9

CPU_VTT_SENSE

Y10

MEMVREF_CPU

W17

MEMVREF

B18 W26

MB0_ODT0

W23

MB0_ODT1

Y26

MB1_ODT0

V26

MB0_CS_L0

W25

MB0_CS_L1

U22

MB1_CS_L0

J25

MB_CKE0

H26

MB_CKE1

P22

MB_CLK_H5

R22

MB_CLK_L5

A17

MB_CLK_H1

A18

MB_CLK_L1

AF18

MB_CLK_H7

AF17

MB_CLK_L7

R26

MB_CLK_H4

R25

MB_CLK_L4

MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15

MB_BANK0 MB_BANK1 MB_BANK2

MB_RAS_L MB_CAS_L

MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8 MB_ADD9

MB_WE_L

P24 N24 P26 N23 N26 L23 N25 L24 M26 K26 T26 L26 L25 W24 J23 J24

R24 U26 J26

U25 U24 U23

C169

.22u/6.3V_4

C166

180p/50V_4

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8

M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

C170

.22u/6.3V_4

C36

180p/50V_4

Reserved for AMD suggest

MEMVREF_CPU

R29

R29 *10K_4

*10K_4

R37 *0 _4R37 *0_4

M_B_RST# [5] M_B_ODT0 [5]

M_B_ODT1 [5]

M_B_CS#0 [5] M_B_CS#1 [5]

M_B_CKE0 [5] M_B_CKE1 [5]

M_B_CLKP1 [5] M_B_CLKN1 [5]

M_B_CLKP2 [5] M_B_CLKN2 [5]

M_B_BANK0 [5] M_B_BANK1 [5] M_B_BANK2 [5]

M_B_RAS# [5] M_B_CAS# [5] M_B_WE# [5]

C39

.22u/6.3V_4

CPU_VDDR

C37

.22u/6.3V_4

+SMDDR_VREF

C31

C31 .1u/10V_4

.1u/10V_4

R33

R33 *0_4

*0_4

1000P/50V_4

M_B_DQ[0..63][5]

C35

M_B_DM[0..7][5]

M_B_DQSP0[5] M_B_DQSN0[5] M_B_DQSP1[5] M_B_DQSN1[5] M_B_DQSP2[5] M_B_DQSN2[5] M_B_DQSP3[5] M_B_DQSN3[5] M_B_DQSP4[5] M_B_DQSN4[5] M_B_DQSP5[5] M_B_DQSN5[5] M_B_DQSP6[5] M_B_DQSN6[5] M_B_DQSP7[5] M_B_DQSN7[5]

Processor Memory Interface

U17C

MEM:DATA

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11

AE14 AF14 AF11 AD11

AB26 AE22 AC16 AD12

AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12

C11

A11 A14 B14

G11

E11

D12

A13 A15 A16 A19

A20 C14 D14 C18 D18 D20

A21 D24 C25

B20 C20

B24 C24

E23

E24 G25 G26 C26 D26 G23 G24

Y11

A12

B16

A22

E25

C12

B12 D16 C16

A24

A23

F26

E26

MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63

MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7

MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7

SOCKET_638_PIN

MEM:DATA

MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8

MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63

MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7

MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7

M_A_DQ0

G12

M_A_DQ1

F12

M_A_DQ2

H14

M_A_DQ3

G14

M_A_DQ4

H11

M_A_DQ5

H12

M_A_DQ6

C13

M_A_DQ7

E13

M_A_DQ8

H15

M_A_DQ9

E15

M_A_DQ10

E17

M_A_DQ11

H17

M_A_DQ12

E14

M_A_DQ13

F14

M_A_DQ14

C17

M_A_DQ15

G17

M_A_DQ16

G18

M_A_DQ17

C19

M_A_DQ18

D22

M_A_DQ19

E20

M_A_DQ20

E18

M_A_DQ21

F18

M_A_DQ22

B22

M_A_DQ23

C23

M_A_DQ24

F20

M_A_DQ25

F22

M_A_DQ26

H24

M_A_DQ27

J19

M_A_DQ28

E21

M_A_DQ29

E22

M_A_DQ30

H20

M_A_DQ31

H22

M_A_DQ32

Y24

M_A_DQ33

AB24

M_A_DQ34

AB22

M_A_DQ35

AA21

M_A_DQ36

W22

M_A_DQ37

W21

M_A_DQ38

Y22

M_A_DQ39

AA22

M_A_DQ40

Y20

M_A_DQ41

AA20

M_A_DQ42

AA18

M_A_DQ43

AB18

M_A_DQ44

AB21

M_A_DQ45

AD21

M_A_DQ46

AD19

M_A_DQ47

Y18

M_A_DQ48

AD17

M_A_DQ49

W16

M_A_DQ50

W14

M_A_DQ51

Y14

M_A_DQ52

Y17

M_A_DQ53

AB17

M_A_DQ54

AB15

M_A_DQ55

AD15

M_A_DQ56

AB13

M_A_DQ57

AD13

M_A_DQ58

Y12

M_A_DQ59

W11

M_A_DQ60

AB14

M_A_DQ61

AA14

M_A_DQ62

AB12

M_A_DQ63

AA12

M_A_DM0

E12

M_A_DM1

C15

M_A_DM2

E19

M_A_DM3

F24

M_A_DM4

AC24

M_A_DM5

Y19

M_A_DM6

AB16

M_A_DM7

Y13 G13

H13 G16 G15 C22 C21 G22 G21 AD23 AC23 AB19 AB20 Y15 W15 W12 W13

Quanta Computer Inc.

Size Documen t Number Rev

Date: Sheet of

Thursday, March 04, 2010

Date: Sheet of

Thursday, March 04, 2010

Date: Sheet of

Thursday, March 04, 2010

M_A_DQ[0..63] [5]

M_A_DM[0..7] [5]

M_A_DQSP0 [5] M_A_DQSN0 [5] M_A_DQSP1 [5] M_A_DQSN1 [5] M_A_DQSP2 [5] M_A_DQSN2 [5] M_A_DQSP3 [5] M_A_DQSN3 [5] M_A_DQSP4 [5] M_A_DQSN4 [5] M_A_DQSP5 [5] M_A_DQSN5 [5] M_A_DQSP6 [5] M_A_DQSN6 [5] M_A_DQSP7 [5] M_A_DQSN7 [5]

PROJECT : ZQ2

S1G4 DDRIII MEMORY I/F 2/3

3 36

U17E

VDD_1

VDD_2

VDD_3

J11

VDD_4

J13

VDD_5

J15

VDD_6

VDD_7

K10

VDD_8

K12

VDD_9

K14

VDD_10

VDD_11

VDD_12

VDD_13

L11

VDD_14

L13

VDD_15

L15

VDD_16

VDD_17

VDD_18

VDD_19

M10

VDD_20

VDD_21

VDD_22

N11

VDD_23

K16

VDDNB_1

M16

VDDNB_2

P16

VDDNB_3

T16

VDDNB_4

V16

VDDNB_5

H25

VDDIO1

J17

VDDIO2

K18

VDDIO3

K21

VDDIO4

K23

VDDIO5

K25

VDDIO6

L17

VDDIO7

M18

VDDIO8

M21

VDDIO9

M23

VDDIO10

M25

VDDIO11

N17

VDDIO12

SOCKET_63 8_PIN

Q25

BSS138_ NL/SOT23

D D

CPU_VDDNB_ CORE

+1.5VSUS

C C

CNTR_VREF[2]

CPU_SMBCL K

B B

CPU_SMBDA TA

VDD_24

P10

VDD_25

VDD_26

VDD_27

VDD_28

R11

VDD_29

VDD_30

VDD_31

VDD_32

T10

VDD_33

T12

VDD_34

T14

VDD_35

VDD_36

VDD_37

U11

VDD_38

U13

VDD_39

U15

VDD_40

VDD_41

VDD_42

V10

VDD_43

V12

VDD_44

V14

VDD_45

VDD_46

VDD_47

AC4

VDD_48

AD2

VDD_49

Y25

VDDIO27

V25

VDDIO26

V23

VDDIO25

V21

VDDIO24

V18

VDDIO23

U17

VDDIO22

T25

VDDIO21

T23

VDDIO20

T21

VDDIO19

T18

VDDIO18

R17

VDDIO17

P25

VDDIO16

P23

VDDIO15

P21

VDDIO14

P18

VDDIO13

Q22

Q22 BSS138_ NL/SOT23

BSS138_ NL/SOT23

R263

R263 1K_4

1K_4

+VCORE+VCORE

+1.5VSUS

R245

R245 1K_4

1K_4

1.5V@2A

CPU_SIC [2]

CPU_SID [2]

AA11 AA13 AA15 AA17 AA19

AB23 AB25 AC11 AC13 AC15 AC17 AC19 AC21

AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23

AA4

AB2 AB7 AB9

AD6 AD8

B4 B6 B8

B9 B11 B13 B15 B17 B19 B21 B23 B25

D9 D11 D13 D15 D17 D19 D21 D23 D25

F2 F11 F13 F15 F17 F19 F21 F23 F25

H9 H21 H23

U17F

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65

SOCKET_63 8_PIN

VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129

J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6

BOTTOM SIDE DECOUPLING

+VCORE

C118

C63

10u/6.3V _8

+VCORE

C137

10u/6.3V _8

CPU_VDDNB_ CORE

C87

10u/6.3V _8

C105

10u/6.3V _8

C297

C88

C298

10u/6.3V _8

C86

10u/6.3V _8

C116

+1.5VSUS

C136

10u/6.3V _8

C156

C156 10u/6.3V _8

10u/6.3V _8

C296

.22u/6.3V_4

C117

.22u/6.3V_4

C157

10u/6.3V _8

C131

C118 .01u/16V _4

.01u/16V _4

C119

C119 .01u/16V _4

.01u/16V _4

C96

.22u/6.3V_4

DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE

+1.5VSUS

C91

C95

C114

180p/50V_4

C95

.22u/6.3V_4

+1.5VSUS

C90

4.7u/6.3V_6

C93

.22u/6.3V_4

C148

4.7u/6.3V_6

C94

.22u/6.3V_4

4.7u/6.3V_6

C140

.01u/16V _4

C92

C159

.01u/16V _4

4.7u/6.3V_6

C133

.22u/6.3V_4

C98

.22u/6.3V_4

C112

180p/50V_4

C146

180p/50V_4

C138

.01u/16V _4

C97

180p/50V_4

C121

180p/50V_4

PROCESSOR POWER AND GROUND

MSOP

+3V+3V

R286

*200/F_6

VCC

DXP DXN GND

C362 *.1u/10V_4C362 *.1u/10V_ 4

G786_PWR

1 2 3 5

C366

C366 *1000P/5 0V_4

*1000P/5 0V_4

H_THRMDA [2 ]

H_THRMDC [2]

PROJECT : ZQ2

Quanta Computer Inc.

Size Document Nu mber Rev

S1G4 PWR & GND 3/3

Date: Sheet of

Thursday, March 04, 2010

Date: Sheet of

Thursday, March 04, 2010

Date: Sheet of

Thursday, March 04, 2010

4 3 6

THERMAL IC (Reserve only)

R291

R291 *10K_4

*10K_4

U19

A A

CPU_SMBCL K[25] CPU_SMBDA TA[25]

PM_THERM#[2,24]

CPU_SMBCL K CPU_SMBDA TA

PM_THERM# G768_OV T#

R294 *0_4R294 *0_4

1 2

G786_ALT#

SCLK

SDA

ALERT#

OVERT#

Adress ID: 9A

*G786P8

M_A_BANK0 M_A_BANK1 M_A_BANK2

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

C30

1000P/50V_4

C67

2.2u/6.3V_6

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

DIM1_SA0 DIM1_SA1

C32

C32 .01u/16V_4

.01u/16V_4

+1.5VSUS

R66

R66 *1K/F_4

*1K/F_4

R73

R73 *1K/F_4

*1K/F_4

98 97 96 95 92 91 90 86 89 85

107

84 83

119

80 78

109 108

79 11

28 46

63 136 153 170 187

64 137 154 171 188

62 135 152 169 186

101 103 102 104

74 110

115 113 114 121

116 120

197 201

200 202

199

30 198

1 126 203

204

13 14 19 20 25 26 31 32

H=8

A0 A1

VDD075VDD176VDD281VDD382VDD487VDD588VDD693VDD899VDD794VDD9

A2 A3/A4 A4/A3 A5/A6 A6/A5 A7/A8 A8/A7 A9 A10/AP A11 A12_BC# A13 A14 A15/BA3

BA0/BA1 BA1/BA0 BA2

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7

DQS0# DQS1# DQS2# DQS3# DQS4# DQS5# DQS6# DQS7#

CK0 CK0# CK1 CK1#

CKE0 CKE1

RAS# CAS# WE# S0# S1#

ODT0 ODT1

SA0 SA1

SDA SCL

VDDspd RST# EVENT# VREF VrefCA VTT1

VTT2 VSS0

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11

VSS1237VSS1338VSS1443VSS1544VSS16

R246 10K_ 4R246 10K_4 R248 10K_ 4R248 10K_4

SMbus address A0

100

105

106

111

112

VDD10

VDD11

VDD12

VDD13

DDR3 SO-DIMM

(Standard )

DDR3 SO-DIMM

(Standard )

VSS1854VSS1955VSS20

VSS17

DIM1_SA0 DIM1_SA1

M_A_A[0..15][3] M_B_A[0..15][3]

D D

M_A_BANK[0..2][3]

M_A_DM[0..7][3]

M_A_DQSP0[3] M_A_DQSP1[3] M_A_DQSP2[3] M_A_DQSP3[3] M_A_DQSP4[3] M_A_DQSP5[3] M_A_DQSP6[3] M_A_DQSP7[3]

M_A_DQSN0[3]

C C

B B

M_A_DQSN1[3] M_A_DQSN2[3] M_A_DQSN3[3] M_A_DQSN4[3] M_A_DQSN5[3] M_A_DQSN6[3] M_A_DQSN7[3]

M_A_CLKP1[3] M_A_CLKN1[3] M_A_CLKP2[3] M_A_CLKN2[3]

M_A_CKE0[3] M_A_CKE1[3]

M_A_RAS#[3] M_A_CAS#[3] M_A_WE#[3] M_A_CS#0[3] M_A_CS#1[3]

M_A_ODT0[3] M_A_ODT1[3]

PDAT_SMB[11,17 ,18] PCLK_SMB[11,17,18]

M_A_RST#[3] M_B_RST#[3]

+0.75VSMVREF_SUSA

+VREF_CA_A

+0.75V_DDR_VTT +0.75V_DDR_VTT

A A

+SMDDR_VREF

C28

*10u/6.3V_6

+VREF_CA_A

C308

.1u/10V_4

R57 0_4R 57 0_4

C73

C73 .1u/10V_4

.1u/10V_4

117

118

123

124

CN20

M_A_DQ1

DQ0

M_A_DQ0

DQ1

M_A_DQ7

VDD14

VDD15

VDD16

VDD17

DQ2

M_A_DQ6

DQ3

M_A_DQ5

DQ4

M_A_DQ4

DQ5

M_A_DQ2

DQ6

M_A_DQ3

DQ7

M_A_DQ9

DQ8

M_A_DQ8

DQ9

M_A_DQ15

DQ10

M_A_DQ11

DQ11

M_A_DQ13

DQ12

M_A_DQ12

DQ13

M_A_DQ14

DQ14

M_A_DQ10

DQ15

M_A_DQ16

DQ16

M_A_DQ21

DQ17

M_A_DQ18

DQ18

M_A_DQ23

DQ19

M_A_DQ17

DQ20

M_A_DQ20

DQ21

M_A_DQ22

DQ22

M_A_DQ19

DQ23

M_A_DQ25

DQ24

M_A_DQ24

DQ25

M_A_DQ30

DQ26

M_A_DQ27

DQ27

M_A_DQ28

DQ28

M_A_DQ29

DQ29

M_A_DQ31

DQ30

M_A_DQ26

DQ31

M_A_DQ37

129

DQ32

M_A_DQ36

131

DQ33

M_A_DQ35

141

DQ34

M_A_DQ39

143

DQ35

M_A_DQ38

130

DQ36

M_A_DQ32

132

DQ37

M_A_DQ33

140

DQ38

M_A_DQ34

142

DQ39

M_A_DQ40

147

DQ40

M_A_DQ41

149

DQ41

M_A_DQ46

157

DQ42

M_A_DQ47

159

DQ43

M_A_DQ44

146

DQ44

M_A_DQ45

148

DQ45

M_A_DQ42

158

DQ46

M_A_DQ43

160

DQ47

M_A_DQ52

163

DQ48

M_A_DQ49

165

DQ49

M_A_DQ54

175

DQ50

M_A_DQ51

177

DQ51

M_A_DQ53

164

DQ52

M_A_DQ48

166

DQ53

M_A_DQ50

174

DQ54

M_A_DQ55

176

DQ55

M_A_DQ61

181

DQ56

M_A_DQ60

183

DQ57

M_A_DQ59

191

DQ58

M_A_DQ58

193

DQ59

M_A_DQ57

180

DQ60

M_A_DQ56

182

DQ61

M_A_DQ62

192

DQ62

M_A_DQ63

194

DQ63

NC1

122

NC2

125

TEST

196

VSS51

195

VSS50

190

VSS49

189

VSS48

185

VSS47

184

VSS46

179

VSS45

178

VSS44

173

VSS43

172

VSS42

168

VSS41

167

VSS40

162

VSS39

161

VSS38

156

VSS37

155

VSS36

151

VSS35

150

VSS34

145

VSS33

144

VSS32

139

VSS31

138

VSS30

134

VSS29

133

VSS28

128

VSS27

VSS26

VSS2572VSS2471VSS2366VSS2265VSS21

127

DDR3_SO-DIMM_H=8_ 1.5V_Standard

+0.75VSMVREF_SUSA

C386

.1u/10V_4

2.2u/6.3V_6

+SMDDR_VREF

T17T17

+1.5VSUS

C390

R52 0_4R 52 0_4

199

R314

R314 1K/F_4

1K/F_4

R312

R312 1K/F_4

1K/F_4

+VREF_CA_B

C72

C72 .1u/10V_4

.1u/10V_4

Standard

Connector

CON_SODIMM200_STD_V1

105

110

117

123

130

137

143

150

158

163

170

176

183

190

196

+0.75VSMVREF_SUSB

+VREF_CA_B

+1.5VSUS

R56

R56 *1K/F_4

*1K/F_4

R65

C65

*1K/F_4

*1K/F_4 C152

2.2u/6.3V_6

M_B_BANK[0..2][3]

M_B_DM[0..7][3]

M_B_DQSP0[3] M_B_DQSP1[3] M_B_DQSP2[3] M_B_DQSP3[3] M_B_DQSP4[3] M_B_DQSP5[3] M_B_DQSP6[3] M_B_DQSP7[3]

M_B_DQSN0[3] M_B_DQSN1[3] M_B_DQSN2[3] M_B_DQSN3[3] M_B_DQSN4[3] M_B_DQSN5[3] M_B_DQSN6[3] M_B_DQSN7[3]

M_B_CLKP1[3] M_B_CLKN1[3]

M_B_CLKP2[3] M_B_CLKN2[3]

M_B_CKE0[3] M_B_CKE1[3]

M_B_RAS#[3] M_B_CAS#[3] M_B_WE#[3]

M_B_CS#0[3] M_B_CS#1[3]

M_B_ODT0[3] M_B_ODT1[3]

200

+3V+3V

C51

C42

*10u/6.3V_6

.1u/10V_4

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_BANK0 M_B_BANK1 M_B_BANK2

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

DIM2_SA0 DIM2_SA1

PDAT_SMB PCLK_SMB

C309

C309 .01u/16V_4

.01u/16V_4

C43

C43 1000P/50V_4

1000P/50V_4

+1.5VSUS

98 97 96 95 92 91 90 86 89 85

107

84 83

119

80 78

109 108

79 11

28 46

63 136 153 170 187

64 137 154 171 188

62 135 152 169 186

101 103 102 104

74 110

115 113 114 121

116 120

197 201

200 202

199

30 198

1 126 203

204

13 14 19 20 25 26 31 32

A0 A1

VDD075VDD176VDD281VDD382VDD487VDD588VDD693VDD899VDD794VDD9

A2 A3/A4 A4/A3 A5/A6 A6/A5 A7/A8 A8/A7 A9 A10/AP A11 A12_BC# A13 A14 A15/BA3

BA0/BA1 BA1/BA0 BA2

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7

DQS0# DQS1# DQS2# DQS3# DQS4# DQS5# DQS6# DQS7#

CK0 CK0# CK1 CK1#

CKE0 CKE1

RAS# CAS# WE# S0# S1#

ODT0 ODT1

SA0 SA1

SDA SCL

VDDspd RST# EVENT# VREF

VrefCA VTT1

VTT2 VSS0

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11

VSS1237VSS1338VSS1443VSS1544VSS16

100

105

DDR3 SO-DIMM

VSS1854VSS1955VSS20

VSS17

H=4

DIM2_SA0

R36 10K_4R 36 10K_4

DIM2_SA1

R32 10K_4R 32 10K_4

106

111

112

117

118

VDD10

VDD11

VDD12

VDD13

VDD14

VDD15

(Standard )

VSS2572VSS2471VSS2366VSS2265VSS21

123

124

CN19

DQ0

DQ1

VDD16

VDD17

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

DQ16

DQ17

DQ18

DQ19

DQ20

DQ21

DQ22

DQ23

DQ24

DQ25

DQ26

DQ27

DQ28

DQ29

DQ30

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

NC1

122

NC2

125

TEST

196

VSS51

195

VSS50

190

VSS49

189

VSS48

185

VSS47

184

VSS46

179

VSS45

178

VSS44

173

VSS43

172

VSS42

168

VSS41

167

VSS40

162

VSS39

161

VSS38

156

VSS37

155

VSS36

151

VSS35

150

VSS34

145

VSS33

144

VSS32

139

VSS31

138

VSS30

134

VSS29

133

VSS28

128

VSS27

VSS26

127

DDR3_SO-DIMM_H=4_ 1.5V_Standard

+3V

SMbus address A2

M_B_DQ5 M_B_DQ4 M_B_DQ7 M_B_DQ6 M_B_DQ0 M_B_DQ1 M_B_DQ3 M_B_DQ2 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ20 M_B_DQ21 M_B_DQ23 M_B_DQ22 M_B_DQ17 M_B_DQ16 M_B_DQ19 M_B_DQ18 M_B_DQ24 M_B_DQ28 M_B_DQ30 M_B_DQ31 M_B_DQ29 M_B_DQ25 M_B_DQ27 M_B_DQ26 M_B_DQ33 M_B_DQ32 M_B_DQ34 M_B_DQ35 M_B_DQ37 M_B_DQ36 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ44 M_B_DQ41 M_B_DQ43 M_B_DQ42 M_B_DQ53 M_B_DQ52 M_B_DQ54 M_B_DQ50 M_B_DQ48 M_B_DQ49 M_B_DQ55 M_B_DQ51 M_B_DQ60 M_B_DQ61 M_B_DQ59 M_B_DQ58 M_B_DQ57 M_B_DQ56 M_B_DQ62 M_B_DQ63

MEM_MB_TESTMEM_MA_TEST

M_B_DQ[0..63] [3]M_A_DQ[0..63] [3]

Place these Caps near So-Dimm H=8.

+1.5VSUS

C139

C127

10u/6.3V_6

C152

10u/6.3V_6

C110

C102

10u/6.3V_6

Place these Caps near So-Dimm H=4.

+1.5VSUS

C150

C149

10u/6.3V_6

C124

C124 10u/6.3V_6

10u/6.3V_6

199

T18T18

+0.75VSMVREF_SUSB

C186

.1u/10V_4

10u/6.3V_6

C111

C89

10u/6.3V_6

Standard

Connector

6667

CON_SODIMM200_STD_V1

107

112

119

120

127

132

140

147

152

160

165

172

180

185

192

200

+1.5VSUS +1.5VSUS

Place on each DIMM Connector

200

+1.5VSUS

R139

R139 1K/F_4

1K/F_4

C190

R136

R136 1K/F_4

1K/F_4

2.2u/6.3V_6

PROJECT : ZQ2

Quanta Computer Inc.

Size Document Number Rev

DDR2 SODIMMS: A/B CHANNEL

Date: Sheet of

Thursday, March 04, 2010

Date: Sheet of

Thursday, March 04, 2010

Date: Sheet of

Thursday, March 04, 2010

C153

C153 10u/6.3V_6

10u/6.3V_6

C151

C151 10u/6.3V_6

10u/6.3V_6

C163

C163 330u/2V_7343

330u/2V_7343

C144

C144 *.1u/16V_4

*.1u/16V_4

C125

C125 *.1u/16V_4

*.1u/16V_4

C80

C80 .1u/10V_4

.1u/10V_4

C134

C134 .1u/10V_4

.1u/10V_4

C115

C115 .1u/10V_4

.1u/10V_4

C99

C99 *.1u/16V_4

*.1u/16V_4

C126

C126 .1u/10V_4

.1u/10V_4

C104

C104 *.1u/16V_4

*.1u/16V_4

C164

C164 330u/2V_7343

330u/2V_7343

5 36

C154

C154 *.1u/16V_4

*.1u/16V_4

C155

C155 *.1u/16V_4

*.1u/16V_4

SIDE PORT

C312

C311

R242 SIDE@10K/F_4R242 SIDE@10K/F_4

SP_DDR3_RST#[11]

+1.5V_MEM_VDDQ

R251

R251 SIDE@1K/F_4

SIDE@1K/F_4

R252

R252 SIDE@1K/F_4

SIDE@1K/F_4

SPM_VREFCA SPM_VREFDQ

SPM_A0 SPM_A1 SPM_A2 SPM_A3 SPM_A4 SPM_A5 SPM_A6 SPM_A7 SPM_A8 SPM_A9 SPM_A10 SPM_A11 SPM_A12 SPM_A13

SPM_BA0 SPM_BA1 SPM_BA2

SPM_CLKP SPM_CLKN SPM_CKE

SPM_ODT SPM_CS# SPM_RAS# SPM_CAS# SPM_WE#

SPM_DQS0P SPM_DQS1P

SPM_DM0 SPM_DM1

SPM_DQS0N SPM_DQS1N

VMA_ZQ2

R237

R237 SIDE@240/F_4

SIDE@240/F_4

SIDE@.1u/10V_4

U13

VREFCA

VREFDQ

A10/AP

A11

A12/BC

A13

A14

A15

BA0

BA1

BA2

K10

CKE

ODT

RAS

CAS

DQSL

DQSU

DML

DMU

DQSL

DQSU

RESET

NC#J2

NC#L2

J10

NC#J10

L10

NC#L10

100-BALL

100-BALL SDRAM DDR3

SDRAM DDR3

SIDE@H5TQ1G63AFR-14C

SPM_VREFCA

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B3

VDD#D10

VDD#G8 VDD#K3 VDD#K9 VDD#N2

VDD#N10

VDD#R2

VDD#R10

VDDQ#A2 VDDQ#A9 VDDQ#C2

VDDQ#C10

VDDQ#D3

VDDQ#E10

VDDQ#F2

VDDQ#H3

VDDQ#H10

VSS#A10

VSS#B4 VSS#E2

VSS#G9

VSS#J3 VSS#J9

VSS#M2

VSS#M10

VSS#P2

VSS#P10

VSS#T2

VSS#T10

VSSQ#B2

VSSQ#B1 0

VSSQ#D2 VSSQ#D9 VSSQ#E3 VSSQ#E9

VSSQ#F10

VSSQ#G2

VSSQ#G1 0

C11

C13

E4 F8 F3 F9 H4 H9 G3 H8

D8 C4 C9 C3 A8 A3 B9 A4

B3 D10 G8 K3 K9 N2 N10 R2 R10

A2 A9 C2 C10 D3 E10 F2 H3 H10

A10 B4 E2 G9 J3 J9 M2 M10 P2 P10 T2 T10

B2 B10 D2 D9 E3 E9 F10 G2 G10

D D

SIDE@.1u/10V_4

SPM_VREFDQ

SIDE@.1u/10V_4

C C

R17 *100/F_4R17 *100/F_4

B B

+1.5V_MEM_VDDQ

A A

+1.5V_MEM_VDDQ

R12

R12 SIDE@1K/F_4

SIDE@1K/F_4

R13

R13 SIDE@1K/F_4

SIDE@1K/F_4

SPM_DQ2 SPM_DQ1 SPM_DQ5 SPM_DQ3 SPM_DQ7 SPM_DQ0 SPM_DQ4 SPM_DQ6

SPM_DQ13 SPM_DQ8 SPM_DQ10 SPM_DQ12 SPM_DQ15 SPM_DQ11 SPM_DQ14 SPM_DQ9

+1.5V_MEM_VDDQ

HT_CADOUTP0[2] HT_CADOUTN0[2] HT_CADOUTP1[2] HT_CADOUTN1[2] HT_CADOUTP2[2] HT_CADOUTN2[2] HT_CADOUTP3[2] HT_CADOUTN3[2] HT_CADOUTP4[2] HT_CADOUTN4[2] HT_CADOUTP5[2] HT_CADOUTN5[2] HT_CADOUTP6[2] HT_CADOUTN6[2] HT_CADOUTP7[2] HT_CADOUTN7[2]

HT_CADOUTP8[2] HT_CADOUTN8[2] HT_CADOUTP9[2] HT_CADOUTN9[2] HT_CADOUTP10[ 2] HT_CADOUTN10[2] HT_CADOUTP11[ 2] HT_CADOUTN11[2] HT_CADOUTP12[ 2] HT_CADOUTN12[2] HT_CADOUTP13[ 2] HT_CADOUTN13[2] HT_CADOUTP14[ 2] HT_CADOUTN14[2] HT_CADOUTP15[ 2] HT_CADOUTN15[2]

HT_CLKOUTP0[2] HT_CLKOUTN0[2] HT_CLKOUTP1[2] HT_CLKOUTN1[2]

HT_CTLOUTP0[2] HT_CTLOUTN0[2] HT_CTLOUTP1[2] HT_CTLOUTN1[2]

R274 301/F_4R274 301/F_4

R268 SIDE@40.2/F_4R268 SIDE@40.2/F_4 R269 SIDE@40.2/F_4R269 SIDE@40.2/F_4

SIDE@.1u/10V_4

U16A

AC24 AC25 AB25 AB24 AA24 AA25

AB23 AA22

Y25

Y24 V22 V23 V25 V24 U24 U25

T25

T24 P22 P23 P25 P24 N24 N25

Y22

Y23 W21 W20 V21 V20 U20 U21 U19 U18

T22

T23

M22 M23 R21 R20

C23 A24

U16A

HT_RXCAD0P HT_RXCAD0N HT_RXCAD1P HT_RXCAD1N HT_RXCAD2P HT_RXCAD2N HT_RXCAD3P HT_RXCAD3N HT_RXCAD4P HT_RXCAD4N HT_RXCAD5P HT_RXCAD5N HT_RXCAD6P HT_RXCAD6N HT_RXCAD7P HT_RXCAD7N

HT_RXCAD8P HT_RXCAD8N HT_RXCAD9P HT_RXCAD9N HT_RXCAD10P HT_RXCAD10N HT_RXCAD11P HT_RXCAD11N HT_RXCAD12P HT_RXCAD12N HT_RXCAD13P HT_RXCAD13N HT_RXCAD14P HT_RXCAD14N HT_RXCAD15P HT_RXCAD15N

HT_RXCLK0P HT_RXCLK0N HT_RXCLK1P HT_RXCLK1N

HT_RXCTL0P HT_RXCTL0N HT_RXCTL1P HT_RXCTL1N

HT_RXCALP HT_RXCALN

RS880/RX881

PART 1 OF 6

HYPER TRANSPORT CPU I/F

HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N

HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P

HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N

HT_TXCLK0P HT_TXCLK0N HT_TXCLK1P HT_TXCLK1N

HT_TXCTL0P HT_TXCTL0N HT_TXCTL1P HT_TXCTL1N

HT_TXCALP HT_TXCALN

D24 D25 E24 E25 F24 F25 F23 F22 H23 H22 J25 J24 K24 K25 K23 K22

F21 G21 G20 H21 J20 J21 J18 K17 L19 J19 M19 L18 M21 P21 P18 M18

H24 H25 L21 L20

M24 M25 P19 R18

B24 B25

HT_CADINP0 HT_CADINN0 HT_CADINP1 HT_CADINN1 HT_CADINP2 HT_CADINN2 HT_CADINP3 HT_CADINN3 HT_CADINP4 HT_CADINN4 HT_CADINP5 HT_CADINN5 HT_CADINP6 HT_CADINN6 HT_CADINP7 HT_CADINN7

HT_CADINP8 HT_CADINN8 HT_CADINP9 HT_CADINN9 HT_CADINP10 HT_CADINN10 HT_CADINP11 HT_CADINN11 HT_CADINP12 HT_CADINN12 HT_CADINP13 HT_CADINN13 HT_CADINP14 HT_CADINN14 HT_CADINP15 HT_CADINN15

HT_CLKINP0 HT_CLKINN0 HT_CLKINP1 HT_CLKINN1

HT_CTLINP0 HT_CTLINN0 HT_CTLINP1 HT_CTLINN1

HT_TXCALN

HT_CADOUTP0 HT_CADOUTN0 HT_CADOUTP1 HT_CADOUTN1 HT_CADOUTP2 HT_CADOUTN2 HT_CADOUTP3 HT_CADOUTN3 HT_CADOUTP4 HT_CADOUTN4 HT_CADOUTP5 HT_CADOUTN5 HT_CADOUTP6 HT_CADOUTN6 HT_CADOUTP7 HT_CADOUTN7

HT_CADOUTP8 HT_CADOUTN8 HT_CADOUTP9 HT_CADOUTN9 HT_CADOUTP10 HT_CADOUTN10 HT_CADOUTP11 HT_CADOUTN11 HT_CADOUTP12 HT_CADOUTN12 HT_CADOUTP13 HT_CADOUTN13 HT_CADOUTP14 HT_CADOUTN14 HT_CADOUTP15 HT_CADOUTN15

HT_CLKOUTP0 HT_CLKOUTN0 HT_CLKOUTP1 HT_CLKOUTN1

HT_CTLOUTP0 HT_CTLOUTN0 HT_CTLOUTP1 HT_CTLOUTN1

HT_RXCALP HT_TXCALP

HT_RXCALN

This block is for Side-Port only

U16D

PAR 4 OF 6

MEM_A0(NC) MEM_A1(NC) MEM_A2(NC) MEM_A3(NC) MEM_A4(NC) MEM_A5(NC) MEM_A6(NC) MEM_A7(NC) MEM_A8(NC) MEM_A9(NC) MEM_A10(NC) MEM_A11(NC) MEM_A12(NC) MEM_A13(NC)

MEM_BA0(NC) MEM_BA1(NC) MEM_BA2(NC)

MEM_RASb(NC) MEM_CASb(NC) MEM_WEb(NC) MEM_CSb(NC) MEM_CKE(NC) MEM_ODT(NC)

MEM_CKP(NC) MEM_CKN(NC)

MEM_COMPP (NC) MEM_COMPN(NC)

RS880/RX881

SIDE@1u/6.3V_4

PAR 4 OF 6

MEM_DQS0P/DVO_IDCKP(NC)

MEM_DQS0N/DVO_IDCK N(NC)

SBD_MEM/DVO_I/F

C12

C14

SIDE@1u/6.3V_4

MEM_DQ0/DV O_VSYNC(NC) MEM_DQ1/DV O_HSYNC(NC)

MEM_DQ2/DV O_DE(NC) MEM_DQ3/DV O_D0(NC)

MEM_DQ4(NC) MEM_DQ5/DV O_D1(NC) MEM_DQ6/DV O_D2(NC) MEM_DQ7/DV O_D4(NC) MEM_DQ8/DV O_D3(NC) MEM_DQ9/DV O_D5(NC)

MEM_DQ10/DVO_D6(NC) MEM_DQ11/DVO_D7(NC)

MEM_DQ12(NC)

MEM_DQ13/DVO_D9(NC) MEM_DQ14/DVO_D10(NC) MEM_DQ15/DVO_D11(NC)

MEM_DQS1P(NC) MEM_DQS1N(NC)

MEM_DM0(NC)

MEM_DM1/DV O_D8(NC)

IOPLLVDD18(NC)

IOPLLVDD(NC) IOPLLVSS(NC)

MEM_VREF(NC)

40 mil~50 mil

R244 SIDE@0_8R244 SIDE@0_8

C310

C310 SIDE@10u/6.3V_6

SIDE@10u/6.3V_6

AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21

Y17 W18 AD20 AE21

W17 AE19

IOPLLVDD18_SIDE_PORT

AE23

IOPLLVDD_SIDE_PORT

AE24 AD23 AE18

SIDE@.1u/10V_4

C305

SPM_A0 SPM_A1 SPM_A2 SPM_A3 SPM_A4 SPM_A5 SPM_A6 SPM_A7 SPM_A8 SPM_A9 SPM_A10 SPM_A11 SPM_A12 SPM_A13

SPM_BA0 SPM_BA1 SPM_BA2

SPM_RAS# SPM_CAS# SPM_WE# SPM_CS# SPM_CKE SPM_ODT

SPM_CLKP SPM_CLKN

SPM_COMPP SPM_COMPN

C301

SIDE@10u/6.3V_6

AB12 AE16

V11 AE15 AA12 AB16 AB14 AD14 AD13 AD15 AC16 AE13 AC14

Y14 AD16

AE17 AD17

W12

Y12 AD18 AB13 AB18

V14

V15

W14

AE12 AD12

C15

SPM_VREF1

+1.5V+1.5V_MEM_VDDQ

R273 301/F_4R273 301/F_4

SPM_DQ0 SPM_DQ1 SPM_DQ2 SPM_DQ3 SPM_DQ4 SPM_DQ5 SPM_DQ6 SPM_DQ7 SPM_DQ8 SPM_DQ9 SPM_DQ10 SPM_DQ11 SPM_DQ12 SPM_DQ13 SPM_DQ14 SPM_DQ15

SPM_DQS0P SPM_DQS0N SPM_DQS1P SPM_DQS1N

SPM_DM0 SPM_DM1

SIDE@2.2u/6.3V_6

HT_CADINP0 [2] HT_CADINN0 [2] HT_CADINP1 [2] HT_CADINN1 [2] HT_CADINP2 [2] HT_CADINN2 [2] HT_CADINP3 [2] HT_CADINN3 [2] HT_CADINP4 [2] HT_CADINN4 [2] HT_CADINP5 [2] HT_CADINN5 [2] HT_CADINP6 [2] HT_CADINN6 [2] HT_CADINP7 [2] HT_CADINN7 [2]

HT_CADINP8 [2] HT_CADINN8 [2] HT_CADINP9 [2] HT_CADINN9 [2] HT_CADINP10 [2] HT_CADINN10 [2] HT_CADINP11 [2] HT_CADINN11 [2] HT_CADINP12 [2] HT_CADINN12 [2] HT_CADINP13 [2] HT_CADINN13 [2] HT_CADINP14 [2] HT_CADINN14 [2] HT_CADINP15 [2] HT_CADINN15 [2]

HT_CLKINP0 [2] HT_CLKINN0 [2] HT_CLKINP1 [2] HT_CLKINN1 [2]

HT_CTLINP0 [2] HT_CTLINN0 [2] HT_CTLINP1 [2] HT_CTLINN1 [2]

Signals RS880 RX880

HT_TXCALP

HT_TXCALN

HT_RXCALP

HT_RXCALN

C323

SIDE@.1u/10V_4

SPM_VREF1

C322

SIDE@.1u/10V_4

IOPLLVDD18 - memory PLL

L37 SP@BLM18PG221SN1D(220_1.4A)_6L37 SP@BLM18PG221SN1D(220_1.4A)_6 L38 SP@BLM18PG221SN1D(220_1.4A)_6L38 SP@BLM18PG221SN1D(220_1.4A)_6

C319

0ohm size 0603 CS00003J951 size 0402 C S00002JB38 1K ohm CS21002FB24 Bead CX8PG221003

not applicable to RX881

C332

C332 SIDE@2.2u/6.3V_6

SIDE@2.2u/6.3V_6

PROJECT : ZQ2

Quanta Computer Inc.

Size Document Number Rev

RS880M-HT LINK I/F 1/4

Date: Sheet of

Thursday, March 04, 2010

Date: Sheet of

Thursday, March 04, 2010

Date: Sheet of

Thursday, March 04, 2010

Ra 301 ohm 1%Ra1.21k ohm 1%

301 ohm 1%

1.21k ohm 1%

RES CHIP 1.21K 1/16W +-1%(0402) P/N : CS21212FB18

+1.5V_MEM_VDDQ

R267

R267 SIDE@1K/F_4

SIDE@1K/F_4

R266

R266 SP@1K/F_4

SP@1K/F_4

+1.8V +1.1V

W/O SP

W/I SP

R266

1K Bead Bead

0 0 0

6 36

L37 L38

15mA 26mA

D4 C4

AE3 AD4 AE2 AD3 AD1 AD2

AA8 AA7 AA5

AA6

A3 B3 C2 C1 E5 F5 G5 G6 H5 H6

J6 J5 J7 J8 L5 L6

R8 P8 R6 R5 P4 P3 T4 T3

U5 U6 U8 U7

Y8 Y7

D D

C C

PCIE_RX1+[17] PCIE_RX1-[17]

PCIE_RXP2[18] PCIE_RXN2[18]

B B

A_RXP0[10] A_RXN0[10] A_RXP1[10] A_RXN1[10] A_RXP2[10] A_RXN2[10] A_RXP3[10] A_RXN3[10]

A A

T16T16 T12T12

U16B

GFX_RX0P GFX_RX0N GFX_RX1P GFX_RX1N GFX_RX2P GFX_RX2N GFX_RX3P GFX_RX3N GFX_RX4P GFX_RX4N GFX_RX5P GFX_RX5N GFX_RX6P GFX_RX6N GFX_RX7P GFX_RX7N GFX_RX8P GFX_RX8N GFX_RX9P GFX_RX9N GFX_RX10P GFX_RX10N GFX_RX11P GFX_RX11N GFX_RX12P GFX_RX12N GFX_RX13P GFX_RX13N GFX_RX14P GFX_RX14N GFX_RX15P GFX_RX15N

GPP_RX0P GPP_RX0N GPP_RX1P GPP_RX1N GPP_RX2P GPP_RX2N GPP_RX3P GPP_RX3N GPP_RX4P GPP_RX4N GPP_RX5P GPP_RX5N

SB_RX0P SB_RX0N SB_RX1P SB_RX1N SB_RX2P SB_RX2N SB_RX3P SB_RX3N

RS880/RX881

PART 2 OF 6

PCIE I/F GFX

PCIE I/F GPP

PCIE I/F SB

PCE_CALRP(PCE_BCALRP) PCE_CALRN(PCE_BCALRN)

GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P

GFX_TX9N GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N

GPP_TX0P

GPP_TX0N

GPP_TX1P

GPP_TX1N

GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N GPP_TX4P GPP_TX4N GPP_TX5P GPP_TX5N

SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N

A5 B5 A4 B4 C3 B2 D1 D2 E2 E1 F4 F3 F1 F2 H4 H3 H1 H2 J2 J1 K4 K3 K1 K2 M4 M3 M1 M2 N2 N1 P1 P2

AC1 AC2 AB4 AB3 AA2 AA1 Y1 Y2 Y4 Y3 V1 V2

AD7 AE7 AE6 AD6 AB6 AC6 AD5 AE5

AC8 AB8

TX2_HDMI+_C TX2_HDMI-_C TX1_HDMI+_C TX1_HDMI-_C TX0_HDMI+_C TX0_HDMI-_C TXC_HDMI+_C TXC_HDMI-_C

PCIE_TXP0_C PCIE_TXN0_C

PCIE_TXP2_C PCIE_TXN2_C

A_TXP0_C A_TXN0_C A_TXP1_C A_TXN1_C A_TXP2_C A_TXN2_C A_TXP3_C A_TXN3_C

NB_PCIECALRP NB_PCIECALRN

T11T11 T14T14

C356 .1u/10V_4C356 .1u/10V_4 C355 .1u/10V_4C355 .1u/10V_4 C352 .1u/10V_4C352 .1u/10V_4 C351 .1u/10V_4C351 .1u/10V_4 C350 .1u/10V_4C350 .1u/10V_4 C349 .1u/10V_4C349 .1u/10V_4 C348 .1u/10V_4C348 .1u/10V_4 C347 .1u/10V_4C347 .1u/10V_4

C338 .1u/10V_4C338 .1u/10V_4 C339 .1u/10V_4C339 .1u/10V_4

C340 .1u/10V_4C340 .1u/10V_4 C341 .1u/10V_4C341 .1u/10V_4

C324 .1u/10V_4C324 .1u/10V_4 C325 .1u/10V_4C325 .1u/10V_4 C327 .1u/10V_4C327 .1u/10V_4 C326 .1u/10V_4C326 .1u/10V_4 C329 .1u/10V_4C329 .1u/10V_4 C328 .1u/10V_4C328 .1u/10V_4 C331 .1u/10V_4C331 .1u/10V_4 C330 .1u/10V_4C330 .1u/10V_4

R265 1.27K/F_4R265 1.27K/F_4 R264 2K/F_4R264 2K/F_4

TX2_HDMI+ [16] TX2_HDMI- [16] TX1_HDMI+ [16] TX1_HDMI- [16] TX0_HDMI+ [16] TX0_HDMI- [16] TXC_HDMI+ [16] TXC_HDMI- [16]

HDMI

RS880 Display Port Support (muxed on GFX)

GFX_TX0,TX1,TX2 and TX3

DP0

AUX0 and HPD0

GFX_TX4,TX5,TX6 and TX7

DP1

AUX1 and HPD1

PCIE_TX1+ [17] PCIE_TX1- [17]

PCIE_TXP2 [18] PCIE_TXN2 [18]

A_TXP0 [10] A_TXN0 [10] A_TXP1 [10] A_TXN1 [10] A_TXP2 [10] A_TXN2 [10] A_TXP3 [10] A_TXN3 [10]

+1.1V

PROJECT : ZQ2

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

RS880M-PCIE I/F 2/4

Thursday, March 04, 2010

LAN WLAN

7 36

For Check list JTAG

R279 *4.7K_4R27 9 *4.7K_4 R88 *4.7K_4R88 *4.7K_4

+3V

R96 *4.7K_4R96 *4.7K_4 R94 *4.7K_4R94 *4.7K_4

+3V

D D

NB_PWRGD_IN INT_EDIDDATA INT_EDIDCLK HDMI_DDC_DATA

All RS880 variants do not support analog TV-out functionality. As such, Y, C_Pr, and COMP_Pb

VGA

For A11 version

(02/10) Donˇt need 49.9 ohm PD.

C C

R47 *49.9/F_4R47 *49.9/F_ 4 R48 *49.9/F_4R48 *49.9/F_ 4

CLK_SBLINKP CLK_SBLINKN

HDMI_DDC_DATA[16]

HDMI_DDC_CLK[16]

STRAP_DEBUG_BUS_GPIO_ENABLEb

Enables the Test Debug Bus using GPIO. RS880M

1 Disable

B B

0 Enable

RS880M: Enables Side port memory

RS880M:INT_CRT_HSYNC

INT_CRT_VSYNC

Selects if Memory SIDE PORT is available or not 1 = Memory Side port Not available

R277 3K_4R277 3K_4

+3V_AVDD_NB +1.8V_AVDDDI_NB +1.8V_AVDDQ_NB

INT_CRT_RED[15] INT_CRT_GRE[15] INT_CRT_BLU[15]

+3V

R102 140/F_4R102 140/F_4 R103 150/F_4R103 150/F_4 R104 150/F_4R104 150/F_4

INT_CRT_HSYNC[15] INT_CRT_VSYNC[15]

INT_DDCDATA[15 ] INT_DDCCLK[15 ]

R79 715/F_6R79 715/F_6

A_RST#_SB[10,25]

NB_PWRGD_IN[2,11,14]

CLK_NB_HTREFP_PR[10] CLK_NB_HTREFN_PR[10]

CLK_NB_REF_CLKP[10] CLK_NB_REF_CLKN[10]

R46 4.7K_4R46 4.7K_4 R45 4.7K_4R45 4.7K_4

CLK_SBLINKP[10] CLK_SBLINKN[10]

INT_EDIDDATA[15] INT_EDIDCLK[15]

DDC_DATA & DDC_CLK Not applicable to RX881

+NB_CORE_ON[30]

RS880M --- ADD

+3V

L11

L11 BLM18PG221SN1D(220_1.4A) _6

BLM18PG221SN1D(220_1.4A) _6

+1.8V +1.8V

R86 0_6R86 0_6

L9 BLM18PG221SN1D(220_1.4A) _6

BLM18PG221SN1D(220_1.4A) _6

20mA 120mA

T74T74

T15T15 T13T13

INT_CRT_HSYNC INT_CRT_VSYNC

DAC_RSET_NB +1.1V_PLLVDD

+1.8V_PLLVDD18

+1.8V_VDDA18HTPLL +1.8V_VDDA18PCIEPLL

NB_LDT_STOP# NB_ALLOW_LDTSTOP

CLK_NB_REF_CLKP CLK_NB_REF_CLKN

NBGFX_CLKP NBGFX_CLKN

GPP_REFCLKP GPP_REFCLKN

+NB_CORE_ON

RS880_AUX_CAL

C120

C120 *10u/6.3V_8

*10u/6.3V_8

C113

C113 .1u/10V_4

.1u/10V_4

C108

2.2U/6.3V_6

AVDD-DAC Analog not applicable to RX780

C123

2.2U/6.3V_6

+1.8V_AVDDDI_NB

AVDDI-DAC Digital not applicable to RX780

+1.8V_AVDDQ_NB

AVDDQ-DAC Bandgap Reference not applicable to RX780

U16C

F12

AVDD1(NC)

E12

AVDD2(NC)

F14

AVDDDI(NC)

G15

AVSSDI(NC)

H15

AVDDQ(NC)

H14

AVSSQ(NC)

E17

C_Pr(DFT_GPIO5)

F17

Y(DFT_GPIO2)

F15

COMP_Pb(DFT_GPIO4)

G18

RED(DFT_GPIO0)

G17

REDb(NC)

E18

GREEN(DFT_GPIO1)

F18

GREENb(NC)

E19

BLUE(DFT_GPIO3)

F19

BLUEb(NC)

A11

DAC_HSYNC(PWM_GPIO4)

B11

DAC_VSYNC(PWM_GPIO6)

DAC_SDA(PCE_TCALRN)

DAC_SCL(PCE_RCALRN)

G14

DAC_RSET(PWM_GPIO1)

A12

PLLVDD(NC)

D14

PLLVDD18(NC)

B12

PLLVSS(NC)

H17

VDDA18HTPLL

VDDA18PCIEPLL1

VDDA18PCIEPLL2

SYSRESETb

A10

POWERGOOD

C10

LDTSTOPb

C12

ALLOW_LDTSTOP

C25

HT_REFCLKP

C24

HT_REFCLKN

E11

REFCLK_P/OSCIN(OSCIN)

F11

REFCLK_N(PWM_GPIO3)

GFX_REFCLKP

GFX_REFCLKN

GPP_REFCLKP

GPP_REFCLKN

GPPSB_REFCLKP(SB_REFCLKP)

GPPSB_REFCLKN(SB_REFCLKN)

I2C_DATA

I2C_CLK

DDC_DATA/AUX0N(NC)

DDC_CLK/AUX0P(NC)

AUX1P(NC)

AUX1N(NC)

B10

STRP_DATA

G11

RSVD

AUX_CAL(NC)

RS880/RX881

PART 3 OF 6

+1.1V

L39

L39 BLM18PG221SN1D(220_1.4A) _6

BLM18PG221SN1D(220_1.4A) _6

L13

L13 BLM18PG221SN1D(220_1.4A) _6

BLM18PG221SN1D(220_1.4A) _6

C147

C147 *10u/6.3V_8

*10u/6.3V_8

TXOUT_L0P(NC) TXOUT_L0N(NC) TXOUT_L1P(NC) TXOUT_L1N(NC) TXOUT_L2P(NC)

TXOUT_L2N(DBG_GPIO0)

TXOUT_L3P(NC)

TXOUT_L3N(DBG_GPIO2)

TXOUT_U0P(NC)

TXOUT_U0N(NC) TXOUT_U1P(PCIE_RESET_GPIO3) TXOUT_U1N(PCIE_RESET_GPIO2)

TXOUT_U2P(NC)

TXOUT_U2N(NC) TXOUT_U3P(PCIE_RESET_GPIO5)

CRT/TVOUT

TXOUT_U3N(NC)

TXCLK_LP(DBG_GPIO1)

TXCLK_LN(DBG_GPIO3) TXCLK_UP(PCIE_RESET_GPIO4) TXCLK_UN(PCIE_RESET_GPIO1)

LVTM

LVDS_DIGON(PCE_TCALRP)

LVDS_BLON(PCE_RCALRP)

LVDS_ENA_BL(PWM_GPIO2)

CLOCKs PLL PWR

MIS.

TVCLKIN(PWM_GPIO5)

THERMALDIODE_P THERMALDIODE_N

+1.8V_PLLVDD18

VDDLTP18(NC) VSSLTP18(NC)

VDDLT18_1(NC) VDDLT18_2(NC) VDDLT33_1(NC) VDDLT33_2(NC)

VSSLT1(VSS) VSSLT2(VSS) VSSLT3(VSS) VSSLT4(VSS) VSSLT5(VSS) VSSLT6(VSS) VSSLT7(VSS)

TMDS_HPD(NC)

HPD(NC)

TESTMODE

PLLVDD - Graphics PLL not applicable to RX780

C359

2.2U/6.3V_6

PLLVDD18 - Graphics PLL not applicable to RX780

C128

4.7u/6.3V_6

A22 B22 A21 B21 B20 A20 A19 B19

B18 A18 A17 B17 D20 D21 D18 D19

B16 A16 D16 D17

A13 B13

A15 B15 A14 B14

C14 D15 C16 C18 C20 E20 C22

E9 F7 G12

D9 D10

D12 AE8

AD8 D13

+1.8V_VDDLTP18_NB

+1.8V_VDDLT_18_NB

SUS_STAT#_NB

TEST_EN

LA_DATAP0 [15] LA_DATAN0 [15] LA_DATAP1 [15] LA_DATAN1 [15] LA_DATAP2 [15] LA_DATAN2 [15]

LA_CLK [15]

LA_CLK# [15]

15mA 300mA

INT_LVDS_DIGON [15] INT_DPST_PWM [15] INT_LVDS_BLON [15]

R111 *0/short_4R111 *0/short_4

R112

R112 *3K_4

*3K_4

R87

1.8K/F_4

+1.8V

L15

L15 BLM18PG221SN1D(220_1.4A) _6

BLM18PG221SN1D(220_1.4A) _6

L40

L40 BLM21PG221SN1D(220,100M,2A) _8

BLM21PG221SN1D(220,100M,2A) _8

Made provision for external pull-down which is not installed by default. Pulled up externally for bypassing EEPROM strapping and using default values.

C360

4.7u/6.3V_6

INT_HDMI_HPD [16]

SUS_STAT# [11]

+1.8V_VDDLTP18_NB+1.1V_PLLVDD+3V_AVDD_NB

C135

VDDLTP18 - LVDS or DVI/HDMI PLL

2.2U/6.3V_6

not applicable to RX780

+1.8V_VDDLT_18_NB

VDDLT18 - LVDS or DVI/HDMI digital

C357

not applicable to RX780

.1u/10V_4

0 = Memory Side port available Register Readback of strap: NB_CLKCFG:CLK_TOP_SPARE_D[1]

INT_CRT_HSYNC

A A

For extrnal EEPROM Debug only

+NB_CORE_ON

R276 *SP@3K_4R276 * SP@3K_4 R100 SIDE@3K_4R100 SIDE@3K_4

RS780/RX780/RS880

R278 2K/F_4R278 2K/F_4

+3V

Display Port interface from PCIeGraphics (RS880/rs880M only)

RS880_AUX_CAL

R282 *150/F_4R282 * 150/F_4

+1.8V

VDDA18PCIEPLL -PCIE PLL

L10

L10 BLM18PG221SN1D _6

BLM18PG221SN1D _6

VDDA18HTPLL -HT LINK PLL

L14

L14 BLM18PG221SN1D _6

BLM18PG221SN1D _6

20mils width

+1.8V_VDDA18PCIEPLL

C122

2.2U/6.3V_6

20mils width

+1.8V_VDDA18HTPLL

C106

2.2U/6.3V_6

+1.8V

Open

CPU_LDT_STOP#[2,10]

CPU_LDT_REQ#[2]

ALLOW_LDTSTOP[10]

The RS880 family does not support CLMC architecture The LDTREQ# connection from the CPU to ALLOW_LDTSTOP of the Northbridge is no longer required.

R284 *0_4R28 4 *0_4

R283 0_4R283 0_4

Drain

74LVC07+-

74LVC07

3 5

9/16 need modify PN

R107

2.2K_4

NB_LDT_STOP#

R285 1K_4R285 1K_4

NB_ALLOW_LDTSTOP

DDR3 based CPU : Level shifted to 1.8 V on the Northbridge side using an open -drain buffer and pulled up to 1.8V_S0 throug h a 2.2k Ohm 5% resistor on the Northbridge side.

+1.8V

PROJECT : ZQ2

Quanta Computer Inc.

Size Document Numbe r Rev

RS880M-SYSTEM I/F 3/4

Date: Sheet of

Thursday, March 04, 2010

Date: Sheet of

Thursday, March 04, 2010

Date: Sheet of

Thursday, March 04, 2010

8 36

D D

U16F

VSSAPCIE1A2VSSAPCIE2B1VSSAPCIE3D3VSSAPCIE4D5VSSAPCIE5E4VSSAPCIE6G1VSSAPCIE7G2VSSAPCIE8G4VSSAPCIE9

PART 6/6

VSSAHT1

VSSAHT2

VSSAHT3

VSSAHT4

VSSAHT5

VSSAHT6

A25

E22

D23

G22

G24

G25

VSSAPCIE10J4VSSAPCIE11R7VSSAPCIE12L1VSSAPCIE13L2VSSAPCIE14L4VSSAPCIE15

VSSAPCIE16M6VSSAPCIE17N4VSSAPCIE18P6VSSAPCIE19R1VSSAPCIE20R2VSSAPCIE21R4VSSAPCIE22V7VSSAPCIE23U4VSSAPCIE24V8VSSAPCIE25V6VSSAPCIE26W1VSSAPCIE27W2VSSAPCIE28W4VSSAPCIE29W7VSSAPCIE30W8VSSAPCIE31Y6VSSAPCIE32

VSSAHT7

VSSAHT8

VSSAHT9

VSSAHT10

VSSAHT11

VSSAHT12

VSSAHT13

VSSAHT14

VSSAHT15

VSSAHT16

VSSAHT17

J22

L17

L22

H19

VSSAHT18

L24

L25

P20

N22

R19

R22

R24

M20

D11

E14

E15

J12

AA4

AB5

AB1

AB7

AC3

AC4

AE1

AE4

AB2

VSSAPCIE33

VSSAPCIE34

VSSAPCIE35

VSSAPCIE36

VSSAPCIE37

VSSAPCIE38

VSSAPCIE39

GROUND

VSSAHT19

VSSAHT21

VSSAHT22

VSSAHT23

VSSAHT24

VSSAHT25

VSSAHT26

VSSAHT27

VSS11

VSS12

VSSAHT20

V19

R25

U22

H20

W22

VSS13

L12

Y21

P12

N13

M14

W24

W25

AD25

VSSAPCIE40

VSS14

VSS15

VSS16

VSS17

VSS18

VSS19

VSS20

VSS21

VSS22

VSS23

T12

P15

V12

R11

R14

U14

U11

U15

W11

K14

AE14

J15

VSS2

VSS3G8VSS4

VSS5

VSS7

VSS1

VSS6

VSS24

VSS25

VSS26

VSS27

VSS28

VSS29

VSS30

VSS31

Y18

W15

AA14

AB11

AB15

AB17

AB19

AE20

AC12

M11

L15

VSS8

VSS9

VSS10

VSS32

VSS34

VSS33

K11

AB21

C C

+1.1V

0.68A

L7 0_8L70_8

L12

L12 0_8

0_8

+1.1V 2A for RS880M

L36

+1.1V

0_6

B B

+1.8V

BLM21PG221SN1D(220,100M,2A)_8

0.7A

+1.8V

C54

4.7u/6.3V_6

VDD18-RS880 I/O Transform

+1.8V

VDD18_MEM For UMA RS880 only Not applicable to RX780

A A

memory I/O transform

+1.1V 2A for RS880M

C68

4.7u/6.3V_6

C132

4.7u/6.3V_6

C55

C317

.1u/10V_4

4.7u/6.3V_6

+1.8V 1A for RS780M+SB700

C101

C44

.1u/10V_4

4.7u/6.3V_6

R81 0_6R81 0_6

R40 SIDE@0_6R40 SIDE@0_6

25mA

0.68A

C321

C321 .1u/10V_4

.1u/10V_4

C71

C71 .1u/10V_4

.1u/10V_4

C129

C129 .1u/10V_4

.1u/10V_4

C58

C58 .1u/10V_4

.1u/10V_4

C109

C109 1u/10V_4

1u/10V_4

C41

C41 1u/10V_4

1u/10V_4

+1.1V_VDDHT

C64

C64 .1u/10V_4

.1u/10V_4

+1.1V_VDDHTRX

C141

C141 .1u/10V_4

.1u/10V_4

+1.1V_VDDHTTX

C337

C337 .1u/10V_4

.1u/10V_4

+1.8V_VDDA18PCIE

C50

C50 .1u/10V_4

.1u/10V_4

+1.8V_VDDG18_NB

+1.8V_VDD18_MEM

C79

C79 .1u/10V_4

.1u/10V_4

C130

C130 .1u/10V_4

.1u/10V_4

C335

C335 .1u/10V_4

.1u/10V_4

C45

C45 .1u/10V_4

.1u/10V_4

U16E

J17

VDDHT_1

K16

VDDHT_2

L16

VDDHT_3

M16

VDDHT_4

P16

VDDHT_5

R16

VDDHT_6

T16

VDDHT_7

H18

VDDHTRX_1

G19

VDDHTRX_2

F20

VDDHTRX_3

E21

VDDHTRX_4

D22

VDDHTRX_5

B23

VDDHTRX_6

A23

VDDHTRX_7

AE25

VDDHTTX_1

AD24

VDDHTTX_2

AC23

VDDHTTX_3

AB22

VDDHTTX_4

AA21

VDDHTTX_5

Y20

VDDHTTX_6

W19

VDDHTTX_7

V18

VDDHTTX_8

U17

VDDHTTX_9

T17

VDDHTTX_10

R17

VDDHTTX_11

P17

VDDHTTX_12

M17

VDDHTTX_13

J10

VDDA18PCIE_1

P10

VDDA18PCIE_2

K10

VDDA18PCIE_3

M10

VDDA18PCIE_4

L10

VDDA18PCIE_5

VDDA18PCIE_6

VDDA18PCIE_7

T10

VDDA18PCIE_8

R10

VDDA18PCIE_9

VDDA18PCIE_10

AA9

VDDA18PCIE_11

AB9

VDDA18PCIE_12

AD9

VDDA18PCIE_13

AE9

VDDA18PCIE_14

U10

VDDA18PCIE_15

VDDG18_1 (VDD18_1)

VDDG18_2 (VDD18_2)

AE11

VDD18_MEM1(NC)

AD11

VDD18_MEM2(NC)

RS880/RX881

PART 5/6

VDDPCIE_1 0 VDDPCIE_1 1 VDDPCIE_1 2 VDDPCIE_1 3 VDDPCIE_1 4 VDDPCIE_1 5 VDDPCIE_1 6 VDDPCIE_1 7

POWER

VDD_MEM1(NC) VDD_MEM2(NC) VDD_MEM3(NC) VDD_MEM4(NC) VDD_MEM5(NC) VDD_MEM6(NC)

VDDG33_1 (NC) VDDG33_2 (NC)

VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8 VDDPCIE_9

VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8

VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22

A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9

K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16

AE10 AA11 Y11 AD10 AB10 AC10

H11 H12

+1.1V_VDD_PCIE

C85

C85 .1u/10V_4

.1u/10V_4

C62

C62 .1u/10V_4

.1u/10V_4

C76

C76 .1u/10V_4

.1u/10V_4

C313 (Ra)

C313

SP@.1u/10V_4

+3V_VDDG33

C84

C84 .1u/10V_4

.1u/10V_4

C69

C69 .1u/10V_4

.1u/10V_4

0.95~1.1V@10A

C66

C66 .1u/10V_4

.1u/10V_4

C74

C74 .1u/10V_4

.1u/10V_4

W/I SP

0.1U

VDD_MEM_SIDE

C333

SIDE@.1u/10V_4

R74 0_4R74 0_4

C83

C83 .1u/10V_4

.1u/10V_4

1.1A

C77

C107

1u/10V_4

C59

C78

.1u/10V_4

C100

C100 .1u/10V_4

.1u/10V_4

W/O SP

0 ohm

100mA

C314

C318

SIDE@.1u/10V_4

SIDE@4.7u/6.3V_6

RS880

60mA

VDD33 - 3.3V I/O Not applicable to RX780

R63 0_8R63 0_8

C60

4.7u/6.3V_6

C344

C344 10u/6.3V_8

10u/6.3V_8

C346

10u/6.3V_8

C315

3.3V(0.03A)

+1.1V

VDDPCIE - PCIE-E Main power

NB_CORE

VDDC - Core Logic power

SIDE@0_8

L35

+3V

Size Document Number Rev

Date: Sheet of

+1.5V

DIS remove this BEAS , add Ra(C832) as ohm to GND

0_4 CS00002JB38 .1u/10V_4 CH41002KB93

PROJECT : ZQ2

Quanta Computer Inc.

RS880M-POWER4/4

Thursday, March 04, 2010

9 36

C471 180p/50V_4C471 180p/50V_4

NB & EC

PCIE_RST#[18,21]

A_RST#_SB[8,25]

A_RXP0[7] A_RXN0[7] A_RXP1[7] A_RXN1[7]

D D

A_RXP2[7] A_RXN2[7] A_RXP3[7] A_RXN3[7]

A_TXP0[7] A_TXN0[7] A_TXP1[7] A_TXN1[7] A_TXP2[7] A_TXN2[7] A_TXP3[7] A_TXN3[7]

+1.1V_PCIE_VDDR

C C

CLK_NB_HTREFP_PR[8] CLK_NB_HTREFN_PR[8]

CLK_CPU_BCLKP_PR[2] CLK_CPU_BCLKN_PR[2]

B B

A A

CLK_PCIE_WLANP_2[18] CLK_PCIE_WLANN_2[18]

C396 27p/50V_4C396 27p/50V_4

C395 27p/50V_4C395 27p/50V_4

CLK_SBLINKP[8] CLK_SBLINKN[8]

CLK_NB_REF_CLKP[8] CLK_NB_REF_CLKN[8]

CLK_PCIE_LOM[17] CLK_PCIE_LOM#[17]

R317 590/F_4R 317 590/F_4 R145 2K/F_4R145 2K/F_4

1 2

PLACE CAPS VERY CLOSE TO

BALL OF SB800M

R380 33_4R380 33_4

C403 .1u/ 10V_4C403 .1u/10V_4 C402 .1u/ 10V_4C402 .1u/10V_4 C399 .1u/ 10V_4C399 .1u/10V_4 C398 .1u/ 10V_4C398 .1u/10V_4 C405 .1u/ 10V_4C405 .1u/10V_4 C404 .1u/ 10V_4C404 .1u/10V_4 C401 .1u/ 10V_4C401 .1u/10V_4 C400 .1u/ 10V_4C400 .1u/10V_4

PCIE_CALRP_SB PCIE_CALRN_SB

CLK_SBLINKP CLK_SBLINKN

CLK_NB_REF_CLKP CLK_NB_REF_CLKN

CLK_NB_HTREFP_PR CLK_NB_HTREFN_PR

CLK_CPU_BCLKP_PR CLK_CPU_BCLKN_PR

CLK_PCIE_LOM CLK_PCIE_LOM#

CLK_PCIE_WLANP_2 CLK_PCIE_WLANN_2

25MHzY225MHz

R319

1M_4

U21A

PCIE_RST#_SB A_RST#_AND A_RST#_SB

A_RX0P_C A_RX0N_C A_RX1P_C A_RX1N_C A_RX2P_C A_RX2N_C A_RX3P_C A_RX3N_C

A_TXP0 A_TXN0 A_TXP1 A_TXN1 A_TXP2 A_TXN2 A_TXP3 A_TXN3

25M_X1

25M_X2

U21A

P1 L1

AD26 AD27 AC28 AC29 AB29 AB28 AB26 AB27

AE24 AE23 AD25 AD24 AC24 AC25 AB25 AB24

AD29 AD28

AA28 AA29

Y29 Y28 Y26

Y27 W28 W29

AA22

Y21

AA25 AA24

W23

V24 W24 W25

M23

P23 U29

U28

T26

T27

V21

T21

V23

T23

L29

L28 N29

N28 M29

M28

T25

V25

L24

L23

P25 M25

P29

P28 N26

N27

T29

T28

L25

L26

L27

SB800 A11

IC CTRL(528P) SB710 A14(218-0660017) P/N : AJ066000T01

SB800

PCIE_RST# A_RST#

A_TX0P A_TX0N A_TX1P A_TX1N A_TX2P A_TX2N A_TX3P A_TX3N

A_RX0P A_RX0N A_RX1P A_RX1N A_RX2P A_RX2N A_RX3P A_RX3N

PCIE_CALRP PCIE_CALRN

GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N

GPP_RX0P GPP_RX0N GPP_RX1P GPP_RX1N GPP_RX2P GPP_RX2N GPP_RX3P GPP_RX3N

PCIE_RCLK P/NB_LNK _CLKP PCIE_RCLK N/NB_LNK_CLKN

NB_DISP_CLKP NB_DISP_CLKN

NB_HT_CLKP NB_HT_CLKN

CPU_HT_CLKP CPU_HT_CLKN

SLT_GFX_CLKP SLT_GFX_CLKN

GPP_CLK0P GPP_CLK0N

GPP_CLK1P GPP_CLK1N

GPP_CLK2P GPP_CLK2N

GPP_CLK3P GPP_CLK3N

GPP_CLK4P GPP_CLK4N

GPP_CLK5P GPP_CLK5N

GPP_CLK6P GPP_CLK6N

GPP_CLK7P GPP_CLK7N

GPP_CLK8P GPP_CLK8N

14M_25M_ 48M_OSC

25M_X1

25M_X2

SB800

PCI EXPRESS INTERFACES

Part 1 of 5

PCICLK1/G PO36 PCICLK2/G PO37 PCICLK3/G PO38

PCICLK4/1 4M_OSC/G PO39

PCI CLKS

AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17 AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22 AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26 AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31

PCI INTERFACELPC

REQ1#/GP IO40 REQ2#/CLK_REQ8#/GPIO41 REQ3#/CLK_REQ5#/GPIO42

GNT1#/GPO44 GNT2#/GPO45

GNT3#/CLK_ REQ7#/GPIO46

INTE#/GPIO32 INTF#/GPIO3 3 INTG#/GPIO34 INTH#/GPIO3 5

LDRQ1#/CL K_REQ6# /GPIO49

CLOCK GENERATOR

SERIRQ/GP IO48

ALLOW _LDTSTP/DMA_ ACTIVE#

CPU

RTC

INTRUDER_ALE RT#

VDDBT_RTC_G

PROCHOT#

PCICLK0

PCIRST#

AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8 AD9/GPIO9

CBE0# CBE1# CBE2# CBE3#

FRAME#

DEVSEL#

IRDY#

TRDY# STOP#

PERR# SERR# REQ0#

GNT0#

CLKRUN#

LOCK#

LPCCLK0 LPCCLK1

LAD0 LAD1 LAD2 LAD3

LFRAME#

LDRQ0#

LDT_PG LDT_STP# LDT_RST#

32K_X1 32K_X2

RTCCLK

For AMD RST

PCI_CLK0

W2 W1 W3 W4 Y1

AA1 AA4 AA3 AB1 AA5 AB2 AB6 AB5 AA6 AC2 AC3 AC4 AC1 AD1 AD2 AC6 AE2 AE1 AF8 AE3 AF1 AG1 AF2 AE9 AD9 AC11 AF6 AF4 AF3 AH2 AG2 AH3 AA8 AD5 AD8 AA10 AE8 AB9 AJ3 AE7 AC5

PAR

AF5 AE6 AE4 AE11 AH5 AH4 AC12 AD12 AJ5 AH6 AB12 AB11 AD7

AJ6 AG6 AG4 AJ4

H24 H25 J27 J26 H29 H28 G28 J25 AA18 AB19

G21 H21 K19 G22 J24

C1 C2 D2

B2 B1

PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4

BOARD_ID0 BOARD_ID1 BOARD_ID2 BOARD_ID3 BOARD_ID4

LDRQ0#_SB LDRQ1#_SB

RTC_X1 RTC_X2

INTRUDER_ALERT#

G1 *SHORT_ PAD1

*SHORT_ PAD1

T115T115

PCI_CLK1 [14] PCI_CLK2 [14] PCI_CLK3 [14] PCI_CLK4 [14]

T111T111

BOARD_ID0 [12] BOARD_ID1 [12] BOARD_ID2 [12] BOARD_ID3 [12] BOARD_ID4 [12]

T113T113

AD23 [14] AD25 [14]

AD26 [14] AD27 [14]

T112T112 T60T60

T55T55 T66T66

R335 22_4R335 22_4 R326 22_4R326 22_4

T50T50 T52T52

R60 *10K_4R60 *10K_4

LPC_LAD0 [18,25] LPC_LAD1 [18,25] LPC_LAD2 [18,25] LPC_LAD3 [18,25] LPC_LFRAME# [18,25]

IRQ_SERIRQ [25]

ALLOW_LDTSTOP [8]

CPU_PWRGD [2,28]

CPU_LDT_STOP# [2,8]

CPU_LDT_RST# [2]

RTC_CLK [25]

+AVBAT

C468

C468 .1u/10V_4

.1u/10V_4

20mil

A_RST#[17,18]

GPU MINI-PCIE Card reader

+3V

AD24 [14]

VDDR_1.05_EN [12]

C417

C417 *5.6p/50V_4

*5.6p/50V_4

R185 0_4R185 0_4

for EMI suggestion

R372 *1M/F_4R372 *1M/F_4

INTRUDER_ALERT# Left not connected (Southbridge has 50-kohm internal pull-up to VBAT).

R208

R208 33_4

33_4

For STRAPS

C423

C423 *22P/50V_4

*22P/50V_4

R148 *10K/F_4R148 *10K/F_4

20MIL

VCCRTC_1

20MIL

R290

R290 1K_4

1K_4

BAT1

BAT1 BAT_CONN

BAT_CONN

ML2032

PCH_ODD_EN [19]

CLKRUN# [25]

LPC_CLK0 [14] LPC_CLK1 [14]

PCLK_DEBUG [18] CLK_PCI_775 [25]

CPU_PROCHOT# [2]

+AVBAT

C289 .1u/ 10V_4C289 .1u/10V_4

C287

C287 10p/50V_4

10p/50V_4

D20

BAT54C

+BAT

ML2032 (Chargerable) AHL03001034

CR2032 (Non-Chargeable) AHL03003003 AHL03003014 AHL030M0009

+3V_S5

2 1

U11

3 5

TC7SH08FU

R206 *0_4R206 *0_4

+BAT [25]

R288 10_4R288 10_4

20MIL

RTC_N01

1 3

Q26

Q26 GA@MMBT3904

GA@MMBT3904

RTC_N03

RTC_X1

RTC_X2

C472

C472 18p/50V_4

18p/50V_4

PROJECT : ZQ2

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

Thursday, March 04, 2010

Date: Sheet of

Thursday, March 04, 2010

Date: Sheet of

Thursday, March 04, 2010

A_RST#_SB

SB_GPIO_PCIE_RST# [11]

ECN: B3A Add it for Green Adpapter. It can decrease drop voltage.

+3VRTC_1+3VRTC

R287 499/F_4R 287 499/F_4

ECN: B3A Change R289 from22K to 12K

R289 GA@12K_6R289 GA@12K_6

R293

R293 GA@68.1K/F_4

GA@68.1K/F_4

R296

R296 GA@150K/F_6

GA@150K/F_6

Non-Green Remove those parts. Add "NGA@"

2 3

32.768KHZY532.768KHZ R392 20M_6R392 20M_6

C470

C470 18p/50V_4

18p/50V_4

SB820-PCIE/PCI/CPU/LPC 1/4

10 36

C364

C364 1u/10V_4

1u/10V_4

20MIL20MIL

R384

R384 *20M_6

*20M_6

20mil

+AVBAT+3VPCU

+5VPCU

NC only ,Can't be install

+3V_S5

R368 *2.2K_4R368 *2.2K_4

R217 *2.2K_4R217 *2.2K_4

R210 *2.2K_4R210 *2.2K_4

D D

SCL0/SDATA0 is 3V tolerance. AMD datasheet define it

Clk Gen/ Robson/ TV tuner/ DDR2/ Thermal/ Accelerometer

+3V

R150 2.2K_4R150 2.2K_4 R147 2.2K_4R147 2.2K_4

SCL1/SDATA1 is 3V/S5 tolerance AMD datasheet define it

+3V_S5

R188 10K_4R188 10K_4 R215 10K_4R215 10K_4

SCL2/SDATA2 is 3V/S5 tolerance.

C C

AMD datasheet define it

+3V_S5

R153 10K_4R153 10K_4 R149 10K_4R149 10K_4

+3V

R195 4.7K_4R195 4.7K_4

+3V

R316 8.2K_4R316 8.2K_4 R178 8.2K_4R178 8.2K_4

JTAG DEBUG

B B

CN13

1 2 3 4 5 6 7 8

*S/W JTAG DEBUG

+3V_S5

PCLK_SMB PDAT_SMB

CLK_PCIE_LAN_REQ# CLK_PCIE_2_REQ#

SB_JTAG_TCK SB_JTAG_TDO SB_JTAG_TDI SB_TEST1

SB_JTAG_RST#

SB_TEST0

SB_TEST1

SB_TEST2

SB_SCLK2 SB_SDATA2

SUS_STAT#

SB_SMBCLK1

SB_SMBDATA1

C279

C279 10P/50V_4

10P/50V_4

T59T59

Eliot (02/26) Current Agesa bios doesnˇt program ALERT_L and SB wonˇt process alert.

To Azalia

ACZ_SDOUT

ACZ_SYNC

A A

ACZ_BCLK

ACZ_RST#

ACZ_SDIN0

R200 33_4R200 33_4

R202 33_4R202 33_4

R203 33_4R203 33_4

R201 33_4R201 33_4

C283 *10P/50V_4C283 *10P/50V_4

C284 *10P/50V_4C284 *10P/50V_4

C285 *10P/50V_4C285 *10P/50V_4

ACZ_SDOUT_AUDIO [20]

ACZ_SYNC_AUDIO [20]

ACZ_BITCLK_AUDIO [20]

ACZ_RST#_AUDIO [20]

ACZ_SDIN0 [20]

T71T71

SUSB#[25] SUSC#[ 25]

DNBSWON#[25]

SB_PWRGD_IN[14]

SUS_STAT#[8]

SIO_A20GATE[25]

SIO_RCIN#[25]

T114T114

SIO_EXT_SMI#[25] SIO_EXT_SCI#[25]

PCIE_WAKE#[17,18]

NB_PWRGD_IN[2,8,14]

SB_GPIO_PCIE_RST#[10] CLK_PCIE_LAN_REQ#[17]

CLK_PCIE_2_REQ#[18]

T116T116

T117T117

T69T69

ICH_RSMRST#[25]

T51T51

SPKR[20] PCLK_SMB[5,17, 18] PDAT_SMB[5,17,18]

SP_DDR3_RST#[6]

T109T109

OC_7#[22] OC_6#[22]

OC_4#[22]

SB_JTAG_TDO SB_JTAG_TCK SB_JTAG_TDI SB_JTAG_RST#

HD audio interface is +3VS5 voltage

ACZ_SDOUT[14]

+3V_S5

T49T49

R197 10K_4R197 10K_4 R191 10K_4R191 10K_4

R182 10K_4R182 10K_4

R196 10K_4R196 10K_4

R190 10K_4R190 10K_4

[02/22] AMD FAE and checklist request PL.

SB_PCI_PME#

SUSC#

SB_TEST0 SB_TEST1 SB_TEST2

SIO_RCIN# LANLINK_STATE#

SYS_RST# IR_RX1

SB_THERMTRIP#

SB_GPIO_PCIE_RST# CLK_PCIE_LAN_REQ#

SB_GPIO59 PCLK_SMB

PDAT_SMB SB_SMBCLK1 SB_SMBDATA1

E_SB_OSC

SB_PM_THERM#

GBE_COL GBE_CRS

GBE_MDIO

GBE_RXERR

GBE_PHY_INTR ADP_PRES0

ACZ_BCLK ACZ_SDOUT ACZ_SDIN0

ACZ_SYNC ACZ_RST#

U21D

PCI_PME#/GEVENT4#

RI#/GEVENT22#

SPI_CS3# /GBE_STAT1/GEVENT21 #

SLP_S3#

SLP_S5#

PWR_BTN#

PWR_GO OD

SUS_STAT#

TEST0

TEST1/TMS

TEST2

AD21

GA20IN/GEVENT0#

AE21

KBRST#/GEVENT1#

LPC_PME# /GEVENT3#

J29

LPC_SMI#/GEVENT23#

GEVENT5#

SYS_RESET#/GEVENT19#

WAKE# /GEVENT8#

IR_RX1/GE VENT20#

THRMTRIP#/SMBA LERT#/GEV ENT2#

AC19

NB_PWRGD

RSMRST#

AD19

CLK_REQ4 #/SATA_IS 0#/GPIO 64

AA16

CLK_REQ3 #/SATA_IS 1#/GPIO 63

AB21

SMARTVOLT1/S ATA_IS2#/GPIO50

AC18

CLK_REQ0 #/SATA_IS 3#/GPIO 60

AF20

SATA_IS4# /FANOUT3/GP IO55

AE19

SATA_IS5# /FANIN3/GPIO59

AF19

SPKR/GPIO66

AD22

SCL0/GPIO43

AE22

SDA0/GPIO47

SCL1/GPIO227

SDA1/GPIO228

AH21

CLK_REQ2 #/FANIN4/GPIO62

AB18

CLK_REQ1 #/FANOUT4/GPIO61

IR_LED#/L LB#/GPIO184

AJ21

SMARTVOLT2/S HUTDOWN#/GPIO51

DDR3_RST#/GEVENT7#

GBE_LED0/GPIO18 3

GBE_LED1/GEVENT9#

GBE_LED2/GEVENT10#

GBE_STAT0/G EVENT11#

AA20

CLK_REQG #/GPIO65/OSCIN

BLINK/USB _OC7#/GEVENT18#

USB_OC6# /IR_TX1/GE VENT6#

USB_OC5# /IR_TX0/GE VENT17#

USB_OC4# /IR_RX0/G EVENT16#

USB_OC3# /AC_PRES /TDO/GEVENT15#

USB_OC2# /TCK/GEVENT14#

USB_OC1# /TDI/GEVENT13#

USB_OC0# /TRST#/GEVE NT12#

AZ_BITCLK

AZ_SDOUT

AZ_SDIN0/GPIO167

AZ_SDIN1/GPIO168

AZ_SDIN2/GPIO169

AZ_SDIN3/GPIO170

AZ_SYNC

AZ_RST#

GBE_COL

GBE_CRS

GBE_MDCK

GBE_MDIO

GBE_RXCL K

GBE_RXD3

GBE_RXD2

GBE_RXD1

GBE_RXD0

GBE_RXCTL/ RXDV

GBE_RXERR

GBE_TXCLK

GBE_TXD3

GBE_TXD2

GBE_TXD1

GBE_TXD0

GBE_TXCTL/TXE N

GBE_PHY_PD

GBE_PHY_RST#

GBE_PHY_INTR

E23

PS2_DAT/SDA4/GPIO187

E24

PS2_CLK/SCL4/GP IO188

F21

SPI_CS2# /GBE_STAT2/GPIO166

G29

FC_RST#/GPO 160

D27

PS2KB_DAT/GPIO189

F28

PS2KB_CLK/GPIO1 90

F29

PS2M_DAT/G PIO191

E27

PS2M_CLK /GPIO19 2

SB800 A11

SB800

Part 4 of 5

GBE LAN

USBCLK/14M_25M_4 8M_OSC

ACPI / WAKE UP EVENTS

EC_PWM0/EC_TIMER0 /GPIO19 7 EC_PWM1/EC_TIMER1 /GPIO19 8 EC_PWM2/EC_TIMER2 /GPIO19 9

HD AUDIO

EC_PWM3/EC_TIMER3 /GPIO20 0

EMBEDDED CTRL

USB_FSD1P/GPIO18 6

USB_FSD0P/GPIO18 5

USB 1.1 USB MISCEMBEDDED CTRL

USB 2.0

GPIO

USB OC

USB_RCOMP

USB_FSD1N

USB_FSD0N

USB_HSD13P USB_HSD13N

USB_HSD12P USB_HSD12N

USB_HSD11P USB_HSD11N

USB_HSD10P USB_HSD10N

USB_HSD9P USB_HSD9N

USB_HSD8P USB_HSD8N

USB_HSD7P USB_HSD7N

USB_HSD6P USB_HSD6N

USB_HSD5P USB_HSD5N

USB_HSD4P USB_HSD4N

USB_HSD3P USB_HSD3N

USB_HSD2P USB_HSD2N

USB_HSD1P USB_HSD1N

USB_HSD0P USB_HSD0N

SCL2/GPIO193

SDA2/GPIO194 SCL3_LV/GPIO195 SDA3_LV/GPIO196

KSI_0/GP IO201

KSI_1/GP IO202

KSI_2/GP IO203

KSI_3/GP IO204

KSI_4/GP IO205

KSI_5/GP IO206

KSI_6/GP IO207

KSI_7/GP IO208

KSO_0/GPIO209 KSO_1/GPIO210 KSO_2/GPIO211 KSO_3/GPIO212 KSO_4/GPIO213 KSO_5/GPIO214 KSO_6/GPIO215 KSO_7/GPIO216 KSO_8/GPIO217

KSO_9/GPIO218 KSO_10/GPIO219 KSO_11/GPIO220 KSO_12/GPIO221 KSO_13/GPIO222 KSO_14/GPIO223 KSO_15/GPIO224 KSO_16/GPIO225 KSO_17/GPIO226

USBCLK/41M_25M_48M_OSC pin is CLK input pin when EXT CLKGEN mode. It is output CLK source when INT CLKGEN mode.

USB_14_48M

A10 G19

J10 H11

H9 J8

B12 A12

F11 E11

E14 E12

J12 J14

A13 B13

D13 C13

G12 G14

G16 G18

D16 C16

B14 A14

E18 E16

J16 J18

B17 A17

A16 B16

D25 F23 B26 E26 F25 E22 F22 E21

G24 G25 E28 E29 D29 D28 C29 C28

B28 A27 B27 D26 A26 C26 A24 B25 A25 D24 B24 C24 B23 A23 D22 C22 A22 B22

USB_RCOMP_SB

USB_FDS12P USB_FSD12N

USBP1+ USBP1-

SB_SCLK2 SB_SDATA2 SB_GPIO195 SB_GPIO196

R169 11.8K/F_6R 169 11.8K/F_6

T63T63 T58T58

USBP13+ [15] USBP13- [15]

USBP12+ [22] USBP12- [22]

USBP11+ [22] USBP11- [22]

USBP10+ [21] USBP10- [21]

USBP9+ [ 22] USBP9- [22]

USBP8+ [ 22] USBP8- [22]

USBP4+ [ 18] USBP4- [18]

T54T54 T53T53

USBP0+ [ 22] USBP0- [22]

T48T48

Check list

T110T110

CAMERA USBX3 board USBX3 board Card reader BLUETOOTH USBX3 board

WLAN Min-Card

On Board USB Connector

Only USB Port0 can be configured as debug port.

GPIO199 [14] GPIO200 [14]

SB_GPIO195

SB_GPIO196

PROJECT : ZQ2

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet of

Thursday, March 04, 2010

Date: Sheet of

Thursday, March 04, 2010

Date: Sheet of

Thursday, March 04, 2010

R146 10K_4R146 10K_4

R144 10K_4R144 10K_4

SB820-ACPI/GPIO/USB 2/4

EHCI1/ OHCI1EHCI2/ OHCI2EHCI3/ OHCI3

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