QUANTA ZN5 Schematics

5

4

3

2

1

Tonga-e (ZN5)

D D

01--SCHMETICS INDEX

01

02--BLOCK DIAGRAM
03--CLK. GEN./CK505
04--CPU(1/2) Host Bus
05--CPU(2/2) Power
06--NB(1/5) Host
07--NB(2/5) VGA,DMI,PCIE
08--NB(3/5) DDR III
09--NB(4/5) Power
10--NB(5/5) VSS
11--SB(1/4) HOST
12--SB(2/4) PCIE, PCI, USB, DMI
13--SB(3/4) SATA, GPIO
14--SB(4/4) Power, VSS

C C

15--DDR III SO-DIMM
16--MXM3.0
17--LVDS TRANSMITTER
18--SATA HDD/ODD
19--MINI PCIE (WLAN/TV), IR
20--LCD PANEL, INVERTER
21--LAN PHY BOAZMAN
22--TPM, RJ45
23--JMB380 (Card Reader, 1394)
24--ON Board USB
25--FAN, CCD, PS2
26--SUPER IO SCH5327
27--AUDIO CODEC ALC272
28--LINE OUT, CRT
29--LED/SERIAL PORT/XDP

B B

30--CIR
31--DC-IN,+12V
32--VRD1.1 NCP5392
33--V_1P1_CORE
34--5VSB,3VSB,VCC3,VCC
35--V_3P3_CL/V_1V_1P1
36--DDR3_V-SM_V-SM-VTT
37--SCREW HOLE
38--SCHEMATICS CHANGE LIST(EVT1 to EVT2)
39--SCHEMATICS CHANGE LIST(EVT2 to DVT)

BOM Option Note

IV@

INSTALL FOR UMA SKU

EV@

INSTALL FOR DISCRETE GRAPHIC SKU
INSTALL FOR PROTO ONLY

PROTO
NI UNINSTALL

INSTALL FOR ALL SKU

A A

5

4

I

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Schematics Index

Schematics Index

Schematics Index

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

PROJECT :

ZN5

ZN5

ZN5

1 40Friday, March 05, 2010

1 40Friday, March 05, 2010

1

1 40Friday, March 05, 2010

X4

X4

X4

1

2

3

4

5

6

7

8

VCCP

V_1P1_CORE
V_1P1_PCIEXPRESS
V_1P1_ICH
V_FSB_VTT

A A

V_1P1_CL_MCH
V_3P3_CL

VCC3
3VSB

VCC
5VSB

+12V

V_SM
V_1P5_ICH

System Power

B B

C C

SATA - HDD(3.5)

SATA - ODD

Camera

USB/wirless KB

Dongle

USB*4(Rear)

USB-0 for DEBUG

USB*2(Side)

Page 23

Page 23

Page 17

Page 17

Page 24

USB-0,7,8,9

USB-3,5

Tonga-E _ZN5 System Block Diagram

Intel
Yorkfield LP
Wolfdale/Conroe
E7XX0/E8XX0

USB-1

USB-4

SATA 1

SATA 2

USB 2.0

Azalia

LGA775

NB
Eaglelake
Q43

1254 pin

SB
ICH10D

676 pin

Page 3,4

FSB(800/1067/1333HZ)

PCI-E 2.0 16X

Page 5,6,7,8,9

DMI

Page 10,11,12,13

800/1067 MHZ DDR III

MUX

PI3PCIE2612-A

MUX

PI3PCIE2612-A

PCI-Express 1X

PCIE-2 PCIE-1

MINI CARD-1

USB-10

Page 18

WLAN

Bluetooth

USB-11

SPI

CLOCK GENERATOR

CK505
CV193

CH A/B: DDRIII-SO-DIMM

Page 14

SDVO

PCI-E(0-3)
PCI-E(7-15)
PCI-E(4-6)

PCIE-3

MINI CARD-2
TV card

Page 18

TV antenna or WLAN antenna

(F connect)

Page 2

LVDS Transmitter
CH7308B

MXM CONNECTOR

VER:3.0

LAN
82567QM

Page 20

RJ45

Page 16

Page 15

PCIE-4

Card Reader

/JMB380

Media Slot

LCD PANEL

LVDS

LVDS

DP

/JMB385

Page 20

21.5" Full HD

LVDS_CONNECT 1

LVDS_CONNECT 2

DP connect

1394a

02

LPC_BUS

SUPER IO

32.768KHz

TPM EC ITE8512

Page 22

Page 30

FLASH
ROM

SMSC SCH5327

H.P

Page 26

A_MIC IN

Page 26

D D

2WX2

INT SPK

Page 26

DMIC IN

Page 26

1

2

AUDIO CODEC
ALC272

Page 26

LINE OUT

Page 27

PS2
Keyboard

Page 25

3

FAN

Page 24

4

PS2
Mouse

Page 25

Page 25

IR
Blaster

Page 30

5

6

CIR

Page 30

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

System Block Diagram

System Block Diagram

System Block Diagram

Date: Sheet of

Date: Sheet of

Date: Sheet of

7

PROJECT :

ZN5

ZN5

ZN5

8

2 40Friday, March 05, 2010

2 40Friday, March 05, 2010

2 40Friday, March 05, 2010

X4

X4

X4

5

Clock Generator

4

3

CKVDD_IO

2

1

03

CKVDD

PM_STPPCI#

R5012.2K

R5012.2K

0402I 5%

0402I 5%

PM_STPCPU#

R5022.2K

R5022.2K

0402I 5%

0402I 5%

D D

1A600 oh m 0603I

1A600 oh m 0603I

1A6

1A6

C102 10U

C102 10U

0805

0805
I

I
X5R

X5R

6.3V

6.3V

CKVDD_IO

3VSB

Q47_D

L5 PBY16 0808T-601 Y-N

L5 PBY16 0808T-601 Y-N

Q47_G

3

Q47

Q47
AO3413

AO3413

S

S

OT23-3

OT23-3

2

L4 PBY16 0808T-601 Y-N

L4 PBY16 0808T-601 Y-N

20V

20V
3A

3A
I

I

00 ohm 0603I

00 ohm 0603I

1

R493 47K

R493 47K

SLP_M3 5,36

C C

CKVDD

0402I 5%

0402I 5%

C499

C499
1U

1U

0603

0603
10V

10V

7R

7R

X

X
I

I

R107

R107
1K

1K

0402

0402
5

5

%

%

I

I

SEL_SRC1

R115

R115
1K

1K

0402

0402
I

I

%

%

5

5

CKVDD

CKVDD

PCLK_TPM22
PCLK_EC29,30
PCLK_DEB UG19
PCLK_SIO26

PCLK_ICH12

R146 0

R146 0

R148 0

R148 0

R147 0

R147 0

R101 0

R101 0
R100 0

R100 0
R109 0

R109 0

5%

5%

0805I 5%

0805I 5%

0805I 5%

0805I 5%

0805I 5%

0805I 5%

0805I 5%

0805I 5%
0805I 5%

0805I 5%
0805I

0805I

PCLK_TPM

PCICLK_PCI4
PCLK_ICH

PM_STPCPU#11

PM_STPPCI#11

CK_PWRGD11

C127 0.1U

C131 0.1U
C122 10U

C130 0.1U
C129 0.1U

C112 0.1U
C111 0.1U
C105 0.1U

C105 0.1U

0402I X7R

0402I X7R

0402I X7R

0402I X7R
0603I X5R

0603I X5R

0402I X7R

0402I X7R
0402I X7R

0402I X7R

0402I X7R

0402I X7R
0402I X7R

0402I X7R
0402I

0402I

R136 33

R136 33
R149 33

R149 33
R527 33 0402I5%R527 33 0402I5%
R528 33 0402I5%R528 33 0402I5%
R170 33 0402I5%R170 33 0402I5%
R522 33 0402I5%R522 33 0402I5%

10VC127 0.1U

10V

10VC131 0.1U

10V

6.3VC1 22 10U

6.3V

10VC130 0.1U

10V
10VC129 0.1U

10V

10VC112 0.1U

10V
10VC111 0.1U

10V
10V

10V
X7R

X7R

%

%
%

%

SMBCLK_MAIN16,20,26 ,29

SMBDATA_MAIN16,20,26 ,29

R508 0

R508 0

5%

5%

0402I5

0402I5
0402I5

0402I5

0402I

0402I

VDD_CK_VDD_PLL3

VDD_CK_VDD_PCI

VDD_CK_VDD_48
VDD_CK_VDD_REF
VDD_CK_VDD_CPU
VDD_CK_VDD_SRC

PCLK_TPM_R
PCLK_EC_ RPCLK_EC
PCLK_DEB UG_RPCLK_DEB UG
PCLK_SIO _RPCLK_SIO
PCICLK_PCI4_R
PCLK_ICH_ R

SEL_SRC1
PM_STPCPU#

PM_STPPCI#
CK_PWRGD_R

SMBCLK_MAIN
SMBDATA_MAIN

CG_XIN
CG_XOUT

CKVDD_IO

C116

C116
10U

10U

0805

0805
10V

10V
X7R

X7R
N

N

Pin17-18. SRC1 enabled

Strap Configuration

R518 10K

CKVDD

CKVDD

CKVDD

B B

CKVDD

R518 10K

R517 10K

R517 10K

R520 10K

R520 10K

R519 10K

R519 10K

R521 10K

R521 10K

R529 10K

R529 10K

R530 10K

R530 10K

R531 10K

R531 10K

I 5%

I 5%

PCLK_DEB UG_R

0402NI 5%

0402NI 5%

0402I 5%

0402I 5%

PCLK_SIO _R

0402NI 5%

0402NI 5%

0402I 5%

0402I 5%

PCICLK_PCI4

0402NI 5%

0402NI 5%

0402I 5%

0402I 5%

PCLK_ICH_ R

0402I 5%

0402I 5%

0402N

0402N

Internal 33 ohm resistor enabled

SATA output from PLL2

CPUSTP#/PCISTP enabled

ITPCLK enabled

C528 27P

C528 27P

C530 27P

C530 27P

21

CG_XIN

Y1

Y1

14.318MHZ

14.318MHZ

CG_XOUT

Critical

Critical
30PPM

30PPM
I

I

BSEL0

NPO

NPO

0402I

50V

0402I

50V

NPO

NPO

0402I

50V

0402I

50V

I

I

48
37

38
56

64
63

60
59

12
20
26
36
45
49

16

61
55
39

42
52
23
19
15
11

29
58

R545 4.7K

R545 4.7K

C133

C133
10U

10U

0805

0805

6.3V

6.3V
X5R

X5R
I

I

U6

U6

1

PCI0/CR#_A

3

PCI1/CR#_B

4

*PCI2/SR_ENABLE

5

**PCI3/SATA_SEL

6

PCI4/SRC5_EN

7

PCI_F5/ITP_EN

SEL_SRC1_25_24.576**
CPU_STOP#/SRCC5

PCI_STOP#/SRCT5
CKPWRGD/PD#

SCL
SDA

XTAL_IN
XTAL_OUT

VDDIO
VDDPLL3IO
VDDSRCIO
VDDSRCIO
VDDSRCIO
VDDCPUIO

VDDPLL3

2

VDDPCI

9

VDD48
VDDREF
VDDCPU
VDDSRC

GNDSRC
GNDCPU
GNDSRC
GND
GND
GND48

8

GNDPCI
GNDSRC
GNDREF

CV193

CV193

SSOP64

SSOP64

T

T
Critical

Critical
I

I

Q54_B

0402I 5%

0402I 5%

C126

CLK_CPU_BCLK_R

54

CLK_CPU_BCLK#_R

53

CLK_MCH_B CLK_R

51

CLK_MCH_B CLK#_R

50

XDP_DCLKOUT_DP_R

47

XDP_DCLKOUT_DN_R

46

DREFCLK_R

13

DREFCLK#_ R

14

DREFSSCLK _R

17

DREFSSCLK #_R

18

CLK_PCIE_SATA_R

21

CLK_PCIE_SATA#_R

22

MXM_PEGCLK_R

24

MXM_PEGCLK#_R

25

CLK_PCIE_EXP_R

27

CLK_PCIE_EXP#_R

28

CLK_PCIE_ICH_R

41

CLK_PCIE_ICH#_R

40

U6_44

44

U6_43

43

CLK_PCIE_MINI_R

30

CLK_PCIE_MINI#_R

31

CLK_PCIE_MINI2_R

34

CLK_PCIE_MINI2#_R

35

CLK_PCIE_JMB385_ R

33

CLK_PCIE_JMB385# _R

32

10
57
62

R494 4.7K

R494 4.7K

C126

0.1U

0.1U

0402

0402
10V

10V
X7R

X7R
I

I

Q48_B

0402I 5%

0402I 5%

C113

C128

Q54_C

CK505

CK505

R532

R532
1K

1K

0402

0402
5%

5%
I

I

I

I

2

C128

0.1U

0.1U

0402

0402
10V

10V
X7R

X7R
I

I

SRCC1/25MHz1/24.576MHz

*Internal 100K Pull High
**Internal 100K Pull Low

Q55_C FSA

Q55

Q55
MMBT3904-7-F

MMBT3904-7-F

SOT23-3

SOT23-3

1 3

40V

40V
200mA

200mA
I

I

C114

C114

0.1U

0.1U

0402

0402
10V

10V
X7R

X7R
I

I

CKVDD CKVDD

Q54

Q54
MMBT3904-7-F

MMBT3904-7-F

SOT23-3

SOT23-3

2

40V

40V
200mA

200mA

1 3

C113

0.1U

0.1U

0402

0402
10V

10V
X7R

X7R
I

I

CPUT0
CPUC0

CPUT1
CPUC1

SRCT8/CPU_ITPT
SRCC8/CPU_ITPC

DOT96T/SRCT0
DOT96C/SRCC0

SRCT1/25MHz0

SRCT2/SATAT

SRCC2/SATAC
SRCT3/CR#_C

SRCC3/CR#_D

SRCT4
SRCC4

SRCT6
SRCC6

SRCT7/CR#_F
SRCC7/CR#_E

SRCT9
SRCC9

SRCT10
SRCC10

SRCT11/CR#_H

SRCC11/CR#_G

USB48/FS_A

FS_B/TESTMODE

REF/FS_C/TESTSEL

R5231K

R5231K

0402I 5%

0402I 5%

BSEL2

C125

C115

C115

0.1U

0.1U

0402

0402
10V

10V
X7R

X7R
I

I

FSA
FSB BSEL1

FSC

2

C125

0.1U

0.1U

0402

0402
10V

10V
X7R

X7R
I

I

RP2 33X 2

RP2 33X 2

5%

5%

RP3 33X 2

RP3 33X 2

RP4 33X 2

RP4 33X 2

5%

5%

RP8 IV@2 2X2

RP8 IV@2 2X2

RP9 IV@3 3X2

RP9 IV@3 3X2

RP10 33X2

RP10 33X2

RP11 EV@33X2

RP11 EV@33X2

RP12 33X2

RP12 33X2

RP5 33X 2

RP5 33X 2

5%

5%

RP13 33X2

RP13 33X2

RP6 33X 2

RP6 33X 2

RP7 33X 2

RP7 33X 2

R507 1K 040 2I5%R507 1K 040 2I
R114 33 0402I5%R114 33 0402I
R503 IV@22 04 02NI5%R503 IV@22 04 02NI
R102 33 0402I5%R102 33 0402I

R489

R489
1K

1K

0402

0402
5%

5%
I

I

Q49

Q49

Q48_C

MMBT3904-7-F

MMBT3904-7-F

2

S

Q48

Q48
MMBT3904-7-F

MMBT3904-7-F

SOT23-3

SOT23-3
40V

40V
200mA

200mA

1 3

S
40V

40V

1 3

200mA

200mA

I

I

1
3

1
3

1
3

3
1

3
1

3
1

3
1

3
1

1
3

3
1

3
1

1
3

R524 33

R524 33

5%
5%
5%
5%

Q49_C

OT23-3

OT23-3

I

I

2

4P2RI

4P2RI

4
2

4P2RI 5%

4P2RI 5%

4
2

4P2RI

4P2RI

4

4

4P2RI 5%

4P2RI 5%

2
4

4P2RI 5%

4P2RI 5%

2
4

4P2RI 5%

4P2RI 5%

2
4

4P2RI 5%

4P2RI 5%

2
4

4P2RI 5%

4P2RI 5%

2
2

4P2RI

4P2RI

4

4

4P2RI 5%

4P2RI 5%

2
4

4P2RI 5%

4P2RI 5%

2
2

4P2RI 5%

4P2RI 5%

4

0402I 5%

0402I 5%

R104 47K

R104 47K
R103 33K

R103 33K

FSC

R4991K

R4991K

0402I 5%

0402I 5%

ICH_VRMPW RGD11,29

0402I 5%

0402I 5%
0402I 5%

0402I 5%

CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4

CLK_MCH_B CLK 6
CLK_MCH_B CLK# 6

XDP_DCLKOUT_DP 4 ,29
XDP_DCLKOUT_DN 4,29

DREFCLK 7
DREFCLK# 7

DREFSSCLK 7
DREFSSCLK # 7

CLK_PCIE_SATA 13
CLK_PCIE_SATA# 13

MXM_PEGCLK 16
MXM_PEGCLK# 16

CLK_PCIE_EXP 7
CLK_PCIE_EXP# 7

CLK_PCIE_ICH 12
CLK_PCIE_ICH# 12

T173T173
T174T174

CLK_PCIE_MINI 19
CLK_PCIE_MINI# 19

CLK_PCIE_MINI2 19
CLK_PCIE_MINI2# 19

CLK_PCIE_JMB385 23
CLK_PCIE_JMB385# 23

CLKUSB_4 8 12

CLK14SMC 26
14M_CH7308B 17
14M_ICH 11

CKVDD

R491 10K

R491 10K

0402NI 5%

0402NI 5%

Q44_B

R167 47K

R167 47K

5%

5%

R166 33K

R166 33K

R487

R487
10K

10K

0402

0402
5%

5%
NI

NI

2

To CPU

To NB

To CPU

To NB

To NB

To SB

To MXM

To NB

To SB

To WLAN

To TV

To Card Reader

CKVDD

0402I

0402I
0402I 5%

0402I 5%

CKVDD

Q44_C

Q44

Q44

2

MMBT3904-7-F

MMBT3904-7-F

SOT23-3

SOT23-3
40V

40V
200mA

200mA

1 3

NI

NI

R486

R486
10K

10K

CK_PWRGD_R

Q43

Q43
MMBT3904-7-F

MMBT3904-7-F

SOT23-3

SOT23-3

1 3

40V

40V
200mA

200mA
NI

NI

0402 NI

0402 NI
5%

5%

BSEL0

R548 10K

R547 0

FREQ. SEL TABLE

BSEL Frequency Select Table

FSC FSB FSA Frequency

0

0

0

0

1

0

A A

1

1

0

1

1

101

1

266Mhz0

1

133Mhz

1

166Mhz

0

200Mhz

333Mhz

001

1

100Mhz

0

400Mhz

Reserved

5

CPU_BSEL 04

V_FSB_VTT

CPU_BSEL 14

V_FSB_VTT

CPU_BSEL 24

V_FSB_VTT

R547 0

R546 0

R546 0

R549 470

R549 470

5%

5%

R504 0

R504 0

R497 0

R497 0

R498 470

R498 470

5%

5%

R490 0

R490 0

R492 0

R492 0

R496 470

R496 470

5%

5%

0402I 5%

0402I 5%

0402NI 5%

0402NI 5%

0402I

0402I

0402I 5%

0402I 5%

0402NI 5%

0402NI 5%

0402I

0402I

0402I 5%

0402I 5%

0402NI 5%

0402NI 5%

0402I

0402I

R548 10K

BSEL1

R500 10K

R500 10K

BSEL2

R488 10K

R488 10K

4

MCH_BSEL0

0402I 5%

0402I 5%

MCH_BSEL1

0402I 5%

0402I 5%

MCH_BSEL2

0402I 5%

0402I 5%

MCH_BSEL0 7

MCH_BSEL1 7

MCH_BSEL2 7

PCICLK_PCI4

C542 10P

PCLK_SIO

C541 22P

CLKUSB_4 8

C155 10P

14M_ICH

C103 10P

PCLK_ICH

C163 22P

PCLK_DEB UG

C540 22P

14M_CH7308B

C517 10P

C517 10P

I COG

I COG

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

CLK. GEN./ CK505

CLK. GEN./ CK505

CLK. GEN./ CK505

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

50VC542 10P

50V

0402NI COG

0402NI COG

50VC541 22P

50V

0402I COG

0402I COG

50VC155 10P

50V

0402NI COG

0402NI COG

50VC103 10P

50V

0402I COG

0402I COG

50VC163 22P

50V

0402I COG

0402I COG

50VC540 22P

50V

0402I NPO

0402I NPO

50V

50V

0402N

0402N

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

1

ZN5

ZN5

ZN5

3 40Friday, March 05, 2010

3 40Friday, March 05, 2010

3 40Friday, March 05, 2010

X4

X4

X4

5

H_A#[3..1 6]6

D D

H_REQ#[0..4]6

H_ADSTB#06
H_A#[17..35]6

H_ADSTB#16

C C

B B

H_ADS#6
H_BNR#6

H_BPRI#6

H_DBSY#6

H_DRDY#6

H_HITM#6
H_IERR#29

H_INIT#13

H_LOCK#6

H_TRDY#6

H_DEFER#6

H_BREQ#6

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

TP_LGA775_N4

T82T82

TP_LGA775_P5

T93T93

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_ADSTB#0

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
TP_LGA775_AC4

T77T77

TP_LGA775_AE5

T91T91

H_ADSTB#1
H_ADS#

H_BNR#
H_HIT#

H_HIT#6

TP_LGA775_H4

T83T83

H_BPRI#
H_DBSY#
H_DRDY#
H_HITM#
H_IERR#
H_INIT#
H_LOCK#
H_TRDY#
TP_LGA775_AD3

T76T76

H_DEFER#
TP_LGA775_AB3

T80T80

TP_LGA775_U2

T81T81

TP_LGA775_U3

T87T87

H_BREQ#
BPMb#3
BPMb#2
CPU_TEST10

TP_LGA775_J16

T101T101

TP_LGA775_H15

T106T106

TP_LGA775_H16

T104T104

TP_LGA775_J17

T110T110

CPU_GTLREF0
CPU_GTLREF1
TP_LGA775_E24

T132T132

TP_LGA775_H29

T137T137

H_CPURST#5,6 ,29

H_RS#06
H_RS#16
H_RS#26

H_CPURST#
H_RS#0
H_RS#1
H_RS#2

AB6

AA4
AD6
AA5
AB5
AC5
AB4
AF5
AF4
AG6
AG4
AG5
AH4
AH5
AJ5
AJ6
AC4
AE4
AD5

AB2

AD3

AB3

H15
H16

E24
H29

G23

L5
P6

M5

L4
M4
R4

T5
U6

T4
U5
U4

V5

V4
W5
N4

P5

K4

J5
M6

K6

J6
R6

W6

Y6

Y4

D2
C2
D4
H4
G8

B2
C1

E4

P3
C3

E3
G7

U2
U3

F3
G3
G4
H5

J16

J17
H1

H2

B3

F5

A3

XU1A

XU1A

H_A3
H_A4
H_A5
H_A6
H_A7
H_A8
H_A9
H_A10
H_A11
H_A12
H_A13
H_A14
H_A15
H_A16
RSVD_0
RSVD_1
REQ_0
REQ_1
REQ_2
REQ_3
REQ_4
H_ADSTB_0

H_A17
H_A18
H_A19
H_A20
H_A21
H_A22
H_A23
H_A24
H_A25
H_A26
H_A27
H_A28
H_A29
H_A30
H_A31
H_A32
H_A33
H_A34
H_A35
RSVD_2
RSVD_3
H_ADSTB_1

ADS#
BNR#
HIT#
FC35
BPRI#
DBSY#
DRDY#
HITM#
IERR#
INIT#
LOCK#
TRDY#
FC36
DEFER#

FC37
FC29

FC30
BR0#

BPMb#3
BPMb#2
TESTHI10

FC31
FC32
FC33
FC34

GTLREF0
GTLREF1
FC10
FC15

RESET#
RS0#
RS1#
RS2#

I

I

H_DSTBP0
H_DSTBN0

H_DINV0

H_DSTBP1
H_DSTBN1

H_DINV1

H_DSTBP2
H_DSTBN2

H_DINV2

H_DSTBP3
H_DSTBN3

H_DINV3

LGA775_ C_ELCritical

LGA775_ C_ELCritical

H_D0
H_D1
H_D2
H_D3
H_D4
H_D5
H_D6
H_D7
H_D8

H_D9
H_D10
H_D11
H_D12
H_D13
H_D14
H_D15

H_D16
H_D17
H_D18
H_D19
H_D20
H_D21
H_D22
H_D23
H_D24
H_D25
H_D26
H_D27
H_D28
H_D29
H_D30
H_D31

H_D32
H_D33
H_D34
H_D35
H_D36
H_D37
H_D38
H_D39
H_D40
H_D41
H_D42
H_D43
H_D44
H_D45
H_D46
H_D47

H_D48
H_D49
H_D50
H_D51
H_D52
H_D53
H_D54
H_D55
H_D56
H_D57
H_D58
H_D59
H_D60
H_D61
H_D62
H_D63

IC design

XDP

XDP_TDO

R388 62 0402I 5%R388 62 0402I 5%

XDP_TDI

R384 62 0402I 5%R384 62 0402I 5%

XDP_TMS

R383 62 0402I 5%R383 62 0402I 5%

XDP_TCK

R386 62 0402I 5%R386 62 0402I 5%

XDP_TRST#

R390 62 0402I 5%R390 62 0402I 5%

A A

VTT_OUT_RIGHT

4

H_D#0

B4

H_D#1

C5

H_D#2

A4

H_D#3

C6

H_D#4

A5

H_D#5

B6

H_D#6

B7

H_D#7

A7

H_D#8

A10

H_D#9

A11

H_D#10

B10

H_D#11

C11

H_D#12

D8

H_D#13

B12

H_D#14

C12

H_D#15

D11

H_DSTBP0

B9

H_DSTBN0

C8

H_DINV#0

A8

H_D#16

G9

H_D#17

F8

H_D#18

F9

H_D#19

E9

H_D#20

D7

H_D#21

E10

H_D#22

D10

H_D#23

F11

H_D#24

F12

H_D#25

D13

H_D#26

E13

H_D#27

G13

H_D#28

F14

H_D#29

G14

H_D#30

F15

H_D#31

G15

H_DSTBP1

E12

H_DSTBN1

G12

H_DINV#1

G11

H_D#32

G16

H_D#33

E15

H_D#34

E16

H_D#35

G18

H_D#36

G17

H_D#37

F17

H_D#38

F18

H_D#39

E18

H_D#40

E19

H_D#41

F20

H_D#42

E21

H_D#43

F21

H_D#44

G21

H_D#45

E22

H_D#46

D22

H_D#47

G22

H_DSTBP2

G19

H_DSTBN2

G20

H_DINV#2

D19

H_D#48

D20

H_D#49

D17

H_D#50

A14

H_D#51

C15

H_D#52

C14

H_D#53

B15

H_D#54

C18

H_D#55

B16

H_D#56

A17

H_D#57

B18

H_D#58

C21

H_D#59

B21

H_D#60

B19

H_D#61

A19

H_D#62

A22

H_D#63

B22

H_DSTBP3

C17

H_DSTBN3

A16

H_DINV#3

C20

R379

R379

57.6

57.6

0402

0402
1%

1%
I

I

V_FSB_VTT

Layout note:
H_GTLREF: Zo=55 ohm,L<0.5"

0.635*VCC1.2 +/-2%

R379_1 CPU_GTLREF1R362_1

R380 10 0402

R380 10 0402

I 5%

I 5%

C329

C329

R367

R367

1U

1U

100

100

0603

0603

0402

0402

10V

10V

I

I

X

X

7R

7R

1%

1%

I

I

H_D#[0..15] 6

H_FERR#

H_DSTBP0 6
H_DSTBN0 6
H_DINV#0 6

H_D#[16..31] 6

VCC_VRM_S ENSE32

VSS_VRM_ SENSE32

H_DSTBP1 6
H_DSTBN1 6
H_DINV#1 6

H_D#[32..47] 6

H_DSTBP2 6
H_DSTBN2 6
H_DINV#2 6

H_D#[48..63] 6

Connected with VR's PSI#

H_DSTBP3 6
H_DSTBN3 6
H_DINV#3 6

XDP_BPM# 3_R29
XDP_BPM# 2_R29
XDP_BPM# 1_R29
XDP_BPM# 0_R29

0402I 5%

0402I 5%

XDP_BPM# 3_R
XDP_BPM# 1_R

XDP_BPM# 0_R

Stuff them for Kentsfield support

CPU_GTLREF0

C334

C334
220P

220P

0402

0402
50V

50V
X7R

X7R
I

I

CPU_GTLREF3CPU_GTLREF0 CPU_GTLREF1 CPU_GTLREF2

R4040

R4040

R560 62

R560 62

V_1P5_I CH

V_FSB_VTT

R554

R554
51

51

0402

0402
NI

NI
5%

5%

R370 0 0402NI 5%R370 0 0402NI 5%
R385 0 0402NI 5%R385 0 0402NI 5%
R403 0 0402NI 5%R403 0 0402NI 5%
R394 0 0402NI 5%R394 0 0402NI 5%

0402I

0402I

5%

5%

as design guide page 113

R450 0 0402

5%R450 0 0402

5%

I

I

R362

R362

57.6

57.6

0402

0402
NI

NI
1%

1%

R366

R366
100

100

0402

0402
NI

NI
1%

1%

H_VID_SEL32

VTT_OUT_LEFT

R371

R371
51

51

0402

0402
1%

1%
I

I

BPMb#3
BPMb#2XDP_BPM# 2_R
BPMb#1
BPMb#0

R35 680 0402

I

I

VCC_VRM_S ENSE
VSS_VRM_ SENSE

VCCP

Layout note:
H_GTLREF: Zo=55 ohm,L<0.5"

0.635*VCC1.2 +/-2%

R365 0

R365 0
R378 10

R378 10

R381 0

R381 0

V_FSB_VTT

ICH_DPRSTP#

V_FSB_VTT

VTT_OUT_RIGHT

C407

C407
10U

10U

0805

0805
I

I
X

X

5R

5R

6.3V

6.3V
5%R35 680 0402

5%

H_PECI26

V_FSB_VTT
VTT_OUT_LEFT
V_FSB_VTT

VTT_OUT_LEFT
VTT_OUT_LEFT

H_DPSLP#11

H_CPUSLP#7,26

VTT_OUT_LEFT

ICH_DPRSTP#7,11

CPU_PSI5 ,32

VTT_OUT_RIGHT

12

12

R374

R374

R411

R411

51

51

51

51

0402

0402

0402

0402

1%

1%

1%

1%

I

I

I

I

0402I 5%

0402I 5%
0402I 5%

0402I 5%

C327

C327
1U

1U

0603

0603
I

I
X7R

X7R
10V

10V

3

C418

C418

0.01U

0.01U

0402

0402
I

I
X

X

7R

7R

25V

25V

R419 0 0402NI 5%R419 0 0 402NI 5 %
R421 0 0402NI 5%R421 0 0402NI 5 %
R418 0 0402I 5%R418 0 0402I 5%
R423 0 0402I 5%R423 0 0402I 5%
R425 0 0402NI 5%R425 0 0 402NI 5 %
R34 0 0402NI 5%R34 0 0402NI 5%

CPU_THERMTRIP# _ICH13,26

12

R412

R412
51

51

0402

0402
1%

1%
I

I

R405 0 0402

R405 0 0402

NI 5%

NI 5%

0402I 5%

0402I 5%

H_SMI#13
H_A20M#13

H_FERR#13

H_INTR13
H_NMI13
H_IGNNE#13
H_STPCLK#13

T17T17
T128T128
T120T120

CLK_CPU_BCLK3

CLK_CPU_BCLK#3

H_SKTOCC#11,26,27

T134T134

R422 51 0402

I

I

R449 51 0402I 5%R449 51 0402I 5%
R402 51 0402I 5%R402 51 0402I 5%
R447 51 0402I 5%R447 51 0402I 5%

R369 51 0402NI 5%R369 51 040 2NI 5%
R398 51 0402NI 5%R398 51 040 2NI 5%

H_PWRGD11,2 9

H_PROCHOT#31

12

GTLR1

C335

C335
220P

220P

0402

0402
I

I
X

X

7R

7R

50V

50V

XU1B

XU1_M3

PSI#

XU1_A24

XU1B

P2

SMI#

K3

A20M#

R3

FERR#/PBE#

K1

LINT0

L1

LINT1

N2

IGNNE#

M3

STPCLK#

A23

VCCA

B23

VSSA

C23

VCCIOPLL

D23

VCC_PLL

AM2

VID_0

AL5

VID_1

AM3

VID_2

AL6

VID_3

AK4

VID_4

AL4

VID_5

AM5

VID_6

AM7

VID_7

AN7

VID_SELECT

F28

BCLK_0

G28

BCLK_1

AE8

SKTOCC#

AL1

FC25

AK1

FC24

AJ7

VSS_1

AH7

VSS_2

AN3

VCC_SENSE

AN4

VSS_SENSE

AN5

VCC_MB_REGULATION

AN6

VSS_MB_REGULATION

AL8

VCC_1

AL7

VSS_3

F29

RSVD_4

F6

FC21

G6

RSVD_5

G5

PECI

AL3

VRDSEL

F26

TESTHI_0

W3

TESTHI_1

F25

TESTHI_2

G25

TESTHI_3

G27

TESTHI_4

G26

TESTHI_5

G24

TESTHI_6

F24

TESTHI_7

P1

DPSLP#

W2

TDI_M

L2

SLP#

AK6

FC8

N1

PWRGOOD

AL2

PROCHOT#

M2

THERMTRIP#

A13

COMP_0

T1

COMP_1

G2

COMP_2

R1

COMP_3

J2

FC3

T2

DPRSTP#

Y3

PSI#

AE3

FC18

B13

COMP_8

G1

BPMb#0

U1

TDO_M

A24

FC23

E29

FC26

I

I

VTT_OUT_RIGHT

VTT_OUT_LEFT

FC0/BOOTSELECT

LGA775_ C_ELCritical

LGA775_ C_ELCritical

H_SMI#
H_A20M#
H_FERR#
H_INTR
H_NMI
H_IGNNE#

R399 0

R399 0

0402I 5%

0402I 5%

XU1_A23
XU1_B23
XU1_C23

H_VCCPLL

H_VID032
H_VID132
H_VID232
H_VID332
H_VID432
H_VID532
H_VID632
H_VID732

5%R422 51 0402

5%

T97T97

T84T84

T94T94

R444 1K 0 402

NI

NI

T138T138

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
H_VID7
H_VID_SEL

CLK_CPU_BCLK
CLK_CPU_BCLK#

H_SKTOCC#

XU1_AL1

T2T2

XU1_AK1

T1T1

VCC_SENSE_R
VSS_SENSE_R
VCC_PKGS ENSE_R
VSS_PKG SENSE_R
TP_LGA775_AL8
TP_LGA775_AL7
TP_LGA775_F29

H_CPU_PD_ F6
TP_LGA775_G6
H_PECI

VRDSEL

CPU_TEST0
CPU_TEST1
XU1_F25

H_DPSLP#
H_TDI_TDO_M
H_CPUSLP#
H_FORCEPH#

H_PWRGD
H_PROCHOT#

CPU_THERMTRIP# _ICH

COMP0

R43049.9 0402 I1% R43049.9 0402 I1%

COMP1

R40149.9 0402 I1% R40149.9 0402 I1%

COMP2

R40649.9 0402 I1% R40649.9 0402 I1%

COMP3

R40049.9 0402 I1% R40049.9 0402 I1%

COMP4

R39549.9 0402 NI1% R39549.9 0402 NI1%

ICH_DPRSTP#

R3770 0402 NI5% R3770 0402 NI5%

COMP7

R38749.9 0402 I1% R38749.9 0402 I1%

COMP8

R42624.9 0402 I1% R42624.9 0402 I1%

BPMb#0
H_TDI_TDO_M

5%R444 1K 0 402

5%

TP_LGA775_G7 CPU_GTLREF2

Thermal Sensor

SBDATA16,26
SBCLK16,26

2

TRST#
BPM#0

BPM#1
BPM#2
BPM#3
BPM#4
BPM#5

DBR#

ITPCLK_0
ITPCLK_1

BSEL_0
BSEL_1
BSEL_2

RSVD_8
BPMb#1

RSVD_9
RSVD_10
RSVD_11
RSVD_12
RSVD_13

VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8

VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24

FC40

VTT_SEL

RSVD_14
RSVD_15
RSVD_16
RSVD_17

FC20
FC22

FC39

RSVD_7

MSID_0
MSID_1

RSVD_6

GTLREF3
GTLREF2

AE1

TCK

AD1

TDI

AF1

TDO

AC1

TMS

AG1
AJ2

AJ1
AD2
AG2
AF2
AG3

AC2
AK3

AJ3
G29

H30
G30

N5
C9
E7
AE6
D16
A20
E23

A29
B25
B29
B30
C29
A26
B27
C28
A25
A28
A27
C30
A30
C25
C26
C27
B26
D27
D28
D25
D26
B28
D29
D30
AM6

AA1
J1
F27

F23
D14
E6
D1
E5
J3

AA2
V2
Y1

W1
V1

AH2
G10

F2

XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#

XDP_BPM# 0
XDP_BPM# 1
XDP_BPM# 2
XDP_BPM# 3
XDP_BPM# 4
XDP_BPM# 5

XDP_DBRESET#
XDP_R_DCL KOUT_DP

XDP_R_DCL KOUT_DN

CPU_BSEL 0
CPU_BSEL 1
CPU_BSEL 2

TP_LGA775_N5
BPMb#1
TP_LGA775_E7
TP_LGA775_AE6
TP_LGA775_D16
TP_LGA775_A20
TP_LAG775_E23

V_FSB_VTT

C456

C456
1U

1U

0603

0603
I

I

7R

7R

X

X
10V

10V

VRMPWG_R

R33 0

R33 0

R413 51

R413 51

3VSB

R356 0

R356 0

U32

U32

7

THERM

SDAT

8

SCLK

1

VDD

5

GND

EMC1402-2 -ACZL-TR

EMC1402-2 -ACZL-TR

MSOP8

MSOP8
Critical

Critical
I

I

1 2

1 2

ALERT

DP
DN

VTT_OUT_RIGHT
VTT_OUT_LEFT
TP_VTT_SEL

TP_LAG775_F23
TP_LAG775_D14
TP_LAG775_E6
TP_LAG775_D1
H_DCLKPH
H_ACLKPH

TP_LAG775_AA2
TP_LAG775_V2
CPU_BOOT

as design guide page 113

TP_LGA775_AH2
CPU_GTLREF3

Address: 9AH

XDP_TCK 29
XDP_TDI 29

XDP_TDO 29
XDP_TMS 29
XDP_TRST# 29

XDP_BPM# 0 29

XDP_BPM# 1 29

XDP_BPM# 2 29

XDP_BPM# 3 29

XDP_BPM# 4 29

XDP_BPM# 5 29

XDP_DBRESET# 29

R416 PO@0 0402I 5%R416 PO@0 0402I 5%
R414 PO@0 0402I5%R414 PO@0 0402I

5%

T88T88
T96T96

T92T92
T105T105
T115T115
T129T129

C442

C442

10U

10U

0805

0805

I

I

5R

5R

X

X

6.3V

6.3V

T135T135

T121T121
T100T100
T95T95
T78T78
T90T90
T89T89

T86T86
T79T79

0402I 5%

0402I 5%

T85T85

CTRL_GTLREF211

CTRL_GTLREF112

0603I 5%

0603I 5%

4
6
2
3

CPU_BSEL 0 3
CPU_BSEL 1 3
CPU_BSEL 2 3

C424

C424

0.1U

0.1U

0402

0402
I

I

7R

7R

X

X
10V

10V

VRMPWG

0402I 5%

0402I 5%

C336

C336

0.1U

0.1U

0402

0402
10V

10V
X7R

X7R
I

I

LM86VCC

H_THERMDA

C321

C321
100P

100P

0603

0603
50V

50V
NPO

NPO
I

I

H_THERMDC

XDP_BPM# 0
XDP_BPM# 1
XDP_BPM# 2
XDP_BPM# 3
XDP_BPM# 4
XDP_BPM# 5

VTT_OUT_LEFT

C332

C332

0.1U

0.1U

0402

0402
10V

10V
X7R

X7R
I

I

0402 I

0402 I

0402 I5%

0402 I5%

C672 100P

0402I NPO

0402I NPO

C671 10U

0805I X5R

0805I X5R

C320 0.1U

0402I X7R

0402I X7R

1

R368 51 0402I 5%R368 51 0402I 5%

1 2

R393 51 0402I 5%R393 51 0402I 5%

1 2

R375 51 0402I 5%R375 51 0402I 5%

1 2

R391 51 0402I 5%R391 51 0402I 5%

1 2

R389 51 0402I 5%R389 51 0402I 5%

1 2

R392 51 0402I 5%R392 51 0402I 5%

1 2

XDP_DCLKOUT_DP 3,29
XDP_DCLKOUT_DN 3,29

Termination

VTT_OUT_LEFT

VTT_OUT_RIGHT

VTT_OUT_RIGHT

VTT_OUT_LEFT

VRMPWG 11,32

C331

C331

0.1U

0.1U

0402

0402
10V

10V
X7R

X7R
I

I

S1 S0
000

111

V_FSB_VTT

GTLR1
U35_4

R3610

5% R3610

5%

U35_3

R3600

R3600

50VC672 100P

50V

6.3VC6 71 10U

6.3V
10VC320 0.1U

10V

2

C55

C55
100P

100P

0603

0603
NI

NI
NPO

NPO
50V

50V

Near SO-DIMMNear Thermal Sensor

01

6
5
4

Q12

Q12
MMBT3904-7-F

MMBT3904-7-F

1 3

100mA

100mA
SOT23-3

SOT23-3
I

I
50V

50V

VTT_OUT_RIGHT

H_TDI_TDO_M

Near CPU

5%

5%
5%

5%

C330

C330

0.1U

0.1U

0402

0402
10V

10V
X7R

X7R
I

I

RATIO SET

0.615xVTT

0.63xVTT

0.65xVTT

0.67xVTT

U35

U35

VTT
GTLR
S1

GTL3004

GTL3004

I

I

VTT_OUT_LEFT

R37262

R37262

0402I 5%

0402I 5%

R44062

R44062

0402I 5%

0402I 5%

R39662

R39662

0402I

0402I

R373680

R373680

0402I

0402I

R37651

R37651

0402I 5%

0402I 5%

1

VDD

2

GND

3

S0

04

R397

R397
51

51

0402

0402

1 2

I

I
5

5

%

%

H_BREQ#

H_CPURST#

H_IERR#
PSI#
CPU_TEST10

VTT_OUT_RIGHT

C341

C341
1U

1U

0603

0603
10V

10V
X7R

X7R
I

I

VCC3

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

CPU(1/2)- Host Bus

CPU(1/2)- Host Bus

CPU(1/2)- Host Bus

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

1

ZN5

ZN5

ZN5

X4

X4

4 40Friday, March 05, 2010

4 40Friday, March 05, 2010

4 40Friday, March 05, 2010

X4

5

XU1D

XU1D

C10

VSS_4

D12

VSS_5

C24

VSS_6

K2

VSS_7

C22

VSS_8

AN1

VSS_9

B14

VSS_10

K7

VSS_11

AE16

VSS_12

B11

VSS_13

AL10

VSS_14

D D

C C

B B

A A

AK23

AL16
AL24
AK13

AL20

AK16
AK20
AM27

AL13
AL17

AK30
AL23

AE28
AE29

AE30
AN20
AF10
AE24
AM24
AN23

AM16
AE25
AE27
AJ28

AH13
AH16

AK17
AH17

AH20
AH23
AM13

AH24
AJ30
AJ10

AJ16
AK29

AJ17

AK10
AM10

AJ23

AM23
AH10

AJ29
AK27
AK28

AM20

AJ24
AM17

VSS_15

H12

VSS_16

AF7

VSS_17

AK7

VSS_18

H7

VSS_19

E14

VSS_20

L28

VSS_21

Y5

VSS_22

E11

VSS_23
VSS_24
VSS_25
VSS_26

D21

VSS_27
VSS_28

D18

VSS_29

AN2

VSS_30
VSS_31
VSS_32
VSS_33

AM1

VSS_34
VSS_35
VSS_36

C19

VSS_37

E28

VSS_38
VSS_39

D24

VSS_40
VSS_41

A12

VSS_42

L25

VSS_43

J7

VSS_44
VSS_45
VSS_46

K5

VSS_47

J4

VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54

H9

VSS_55

H8

VSS_56

H13

VSS_57

AC6

VSS_58

AC7

VSS_59

AH6

VSS_60

C16

VSS_61
VSS_62
VSS_63
VSS_64
VSS_65

F19

VSS_66
VSS_67

AD7

VSS_68
VSS_69
VSS_70

E17

VSS_71
VSS_72
VSS_73

AE5

VSS_74
VSS_75

AE7

VSS_76
VSS_77
VSS_78
VSS_79
VSS_80

AF3

VSS_81

AK5

VSS_82
VSS_83

AF6

VSS_84
VSS_85
VSS_86

F22

VSS_87

AH3

VSS_88
VSS_89
VSS_90

F16

VSS_91
VSS_92

F13

VSS_93

AG7

VSS_94

F10

VSS_95

L26

VSS_96

AD4

VSS_97

H11

VSS_98

L24

VSS_99

L23

VSS_100
VSS_101

A15

VSS_102
VSS_103

B24

VSS_104

L3

VSS_105

H27

VSS_106

A21

VSS_107

AE2

VSS_108
VSS_109
VSS_110
VSS_111

B20

VSS_112
VSS_113

H26

VSS_114

B17

VSS_115

H25

VSS_116

H24

VSS_117

AA3

VSS_118

AA7

VSS_119

H23

VSS_120

AA6

VSS_121

H10

VSS_122

H22

VSS_123

H21

VSS_124

H20

VSS_125

H19

VSS_126

H18

VSS_127

AB7

VSS_128

H17

VSS_129
VSS_130
VSS_131

AC3

VSS_132

H14

VSS_133

P28

VSS_134

V6

VSS_135

AK2

VSS_136

P27

VSS_137

Critical

Critical
I

I

5

VSS_268
VSS_267
VSS_266
VSS_265
VSS_264
VSS_263
VSS_262
VSS_261
VSS_260
VSS_259
VSS_258
VSS_257
VSS_256
VSS_255
VSS_254
VSS_253
VSS_252
VSS_251
VSS_250
VSS_249
VSS_248
VSS_247
VSS_246
VSS_245
VSS_244
VSS_243
VSS_242
VSS_241
VSS_240
VSS_239
VSS_238
VSS_237
VSS_236
VSS_235
VSS_234
VSS_233
VSS_232
VSS_231
VSS_230
VSS_229
VSS_228
VSS_227
VSS_226
VSS_225
VSS_224
VSS_223
VSS_222
VSS_221
VSS_220
VSS_219
VSS_218
VSS_217
VSS_216
VSS_215
VSS_214
VSS_213
VSS_212
VSS_211
VSS_210
VSS_209
VSS_208
VSS_207
VSS_206
VSS_205
VSS_204
VSS_203
VSS_202
VSS_201
VSS_200
VSS_199
VSS_198
VSS_197
VSS_196
VSS_195
VSS_194
VSS_193
VSS_192
VSS_191
VSS_190
VSS_189
VSS_188
VSS_187
VSS_186
VSS_185
VSS_184
VSS_183
VSS_182
VSS_181
VSS_180
VSS_179
VSS_178
VSS_177
VSS_176
VSS_175
VSS_174
VSS_173
VSS_172
VSS_171
VSS_170
VSS_169
VSS_168
VSS_167
VSS_166
VSS_165
VSS_164
VSS_163
VSS_162
VSS_161
VSS_160
VSS_159
VSS_158
VSS_157
VSS_156
VSS_155
VSS_154
VSS_153
VSS_152
VSS_151
VSS_150
VSS_149
VSS_148
VSS_147
VSS_146
VSS_145
VSS_144
VSS_143
VSS_142
VSS_141
VSS_140
VSS_139
VSS_138

LGA775_C_EL

LGA775_C_EL

AG13
AG16
AG17
E8
AG20
AG23
AF20
AL28
AA23
V26
AM4
AB1
AJ27
R30
T7
E27
AE17
AE20
P24
Y2
H3
AN24
AF17
AG24
AF23
AF24
AN27
AN28
AF25
AF26
AF27
AF28
AF29
F7
H28
AF30
AE13
AG10
F4
AA30
N3
AB23
AB24
AB25
M7
AN16
AB26
AB27
AN17
AB28
M1
AB29
L7
L6
AB30
AK24
C13
V7
AH1
AE26
AJ4
B8
B5
B1
D3
A9
D5
D6
A6
C4
D9
E2
A2
A18
H6
AF13
AE10
AF16
P29
V3
P30
R23
R24
U7
R25
R26
R27
R28
R29
E25
T6
V23
V24
T3
V25
AN10
E20
R7
V27
R5
V28
V29
R2
V30
E26
P7
AA24
AA25
P4
AA26
AA27
AN13
AA28
N7
N6
AA29
L27
Y7
AL27

RC delay to turn the switch

D15
L29

on only after 50 msec after

L30

RESER# is high

C7
P23
W7
AJ20
P25
W4
AJ13
AM28
P26

H_CPURST#4,6,29

For fast switch off of the IC if RESET# is asserted
( needed because BIOS uses processor only resets
that will restart the invaild PSI assertion.

4

In CPU socket

C30

C38
10U

10U

X5R

X5R
25V

25V
1206

1206
I

I

10U

10U

10U

10U

X5R

X5R

X5R

X5R

25V

25V

25V

25V

1206

1206

1206

1206

I

I

I

I

C27

C27

C40

C40

C38

C30

C23

C23

10U

10U

10U

10U

X5R

X5R

X5R

X5R

25V

25V

25V

25V

1206

1206

1206

1206

I

I

I

I

ON CPU socket bottom side.

C371

C371

C363

C360

C353

C353
10U

10U

X5R

X5R
25V

25V
1206

1206
I

I

C360

C352

C352

10U

10U

10U

10U

X5R

X5R

X5R

X5R

25V

25V

25V

25V

1206

1206

1206

1206

I

I

I

I

Voltage translation
required for the swith IC

4

C363

10U

10U

10U

10U

X5R

X5R

X5R

X5R

25V

25V

25V

25V

1206

1206

1206

1206

I

I

I

I

Yorkfield/Wolfdale CPU Power Status and max current table

POWER PLANE

VCC_CORE
VCC_CORE
VTT
VTT
VCC_PLL

R27 5.11K

R27 5.11K

04021

04021

%I

%I

R32 1K

R32 1K

04025%I

04025%I

Place these parts reference
to Intel demo board.

C31

C31

C36

C36

10U

10U

10U

10U

X5R

X5R

X5R

X5R

25V

25V

25V

25V

1206

1206

1206

1206

I

I

I

I

C369

C369

C372

C372

10U

10U

10U

10U

X5R

X5R

X5R

X5R

25V

25V

25V

25V

1206

1206

1206

1206

I

I

I

I

S0

O
O
O
O
O

Q4_B

2

C19

C19
10U

10U

0603

0603

5R

5R

X

X

6.3V

6.3V
I

I

Q7_B

2

C29

C29
10U

10U

X5R

X5R
25V

25V
1206

1206
I

I

C361

C361
10U

10U

X5R

X5R
25V

25V
1206

1206
I

I

VCC

1 3

VCC

1 3

C32

C32
10U

10U

X5R

X5R
25V

25V
1206

1206
I

I

C370

C370
10U

10U

X5R

X5R
25V

25V
1206

1206
I

I

S3

X
X
X
X
X

R29

R29
1K

1K

0402

0402

%

%

5

5
I

I

Q4_C

Q4

Q4
MMBT3904-7-F

MMBT3904-7-F

200mA

200mA
SOT23-3

SOT23-3
40V

40V
I

I

R30

R30
1K

1K

0402

0402
5%

5%
I

I

Q7

Q7
MMBT3904-7-F

MMBT3904-7-F

200mA

200mA
SOT23-3

SOT23-3
40V

40V
I

I

3

C28

C28

C33

C374

C374
10U

10U

X5R

X5R
25V

25V
1206

1206
I

I

1 3

Voltage

C24

C24
10U

10U

X5R

X5R
25V

25V
1206

1206
I

I

VID
VID
VCC1.2
VCC1.2
VCC1.5

Q3_C

Q3

Q3
MMBT3904-7-F

MMBT3904-7-F

200mA

200mA
SOT23-3

SOT23-3
40V

40V
I

I

C33

10U

10U

10U

10U

X5R

X5R

X5R

X5R

25V

25V

25V

25V

1206

1206

1206

1206

I

I

I

I

C350

C350

C351

C351

10U

10U

10U

10U

X5R

X5R

X5R

X5R

25V

25V

25V

25V

1206

1206

1206

1206

I

I

I

I

I(max)

100A
75A

4.6A

4.5A
260mA

VCC VCC

R28

R28
1K

1K

0402

0402
5%

5%
I

I

Q6

Q6

2

MMBT3904-7-F

MMBT3904-7-F

1 3

200mA

200mA
S

S

OT23-3

OT23-3

40V

40V
I

I

C354

C354
10U

10U

X5R

X5R
25V

25V
1206

1206
I

I

S4/S5

Q7_C

C25

C25
10U

10U

X5R

X5R
25V

25V
1206

1206
I

I

X
X
X
X
X

2

C-step Erratum for PSI

3

C39

C39

C37

C37

10U

10U

10U

10U

X5R

X5R

X5R

X5R

25V

25V

25V

25V

1206

1206

1206

1206

I

I

I

I

C358

C358
10U

10U

X5R

X5R
25V

25V
1206

1206
I

I

Note

Yorkfield@65W
Wolfdale
After VCC stable
Before VCC stable

C20

C20

0.1U

0.1U

0402

0402
X7R

X7R
10V

10V
I

I

5
4

Q5

Q5
ME2N7002E

ME2N7002E

S

S

OT23-3

OT23-3

3

60V

60V
250mA

250mA

I

I

2

1

VCCP

C26

C26

C35

C362

C362
10U

10U

X5R

X5R
25V

25V
1206

1206
I

I

VCC
C

74V1G66CTR

74V1G66CTR

I

I

Q5_G

C35
10U

10U

X5R

X5R
25V

25V
1206

1206
I

I

C34

C34

10U

10U

10U

10U

X5R

X5R

X5R

X5R

25V

25V

25V

25V

1206

1206

1206

1206

I

I

I

I

VCCP

C373

C373

C359

C359

C349

C349
10U

10U

X5R

X5R
25V

25V
1206

1206
I

I

Switch for PSI# connection between
processor and VR.This type of switch
neded as we can not tolerate a delay to
be placed on PSI# assertions.

10U

10U

X5R

X5R
25V

25V
1206

1206
I

I

U56

U56

1

IO

2

OI

3

GND

R31 100

R31 100

%I

%I

10U

10U

X5R

X5R
25V

25V
1206

1206
I

I

R19 0

R19 0

04025

04025

04025%NI

04025%NI

AUTO_PSI_DISABLE 11,32

VRM_PSI 32

CPU_PSI 4,32

VCCP

2

1

05

XU1C

XU1C

AG22

VCC_CORE_1

K29

VCC_CORE_2

AM26

VCC_CORE_3

AE12

VCC_CORE_4

AE11

VCC_CORE_5

W23

VCC_CORE_6

W24

VCC_CORE_7

W25

VCC_CORE_8

T25

VCC_CORE_9

Y28

VCC_CORE_10

AL18

VCC_CORE_11

AC25

VCC_CORE_12

W30

VCC_CORE_13

Y30

VCC_CORE_14

AN14

VCC_CORE_15

AD28

VCC_CORE_16

Y26

VCC_CORE_17

AC29

VCC_CORE_18

M29

VCC_CORE_19

U24

VCC_CORE_20

J23

VCC_CORE_21

AC27

VCC_CORE_22

AM18

VCC_CORE_23

AM19

VCC_CORE_24

AB8

VCC_CORE_25

AC26

VCC_CORE_26

J8

VCC_CORE_27

J28

VCC_CORE_28

T30

VCC_CORE_29

AM9

VCC_CORE_30

AF15

VCC_CORE_31

AC8

VCC_CORE_32

AE14

VCC_CORE_33

N23

VCC_CORE_34

W29

VCC_CORE_35

U29

VCC_CORE_36

AC24

VCC_CORE_37

AC23

VCC_CORE_38

Y23

VCC_CORE_39

AN26

VCC_CORE_40

AN25

VCC_CORE_41

AN18

VCC_CORE_42

AN11

VCC_CORE_43

Y27

VCC_CORE_44

Y25

VCC_CORE_45

U27

VCC_CORE_46

AD24

VCC_CORE_47

AE23

VCC_CORE_48

AE22

VCC_CORE_49

AN19

VCC_CORE_50

V8

VCC_CORE_51

K8

VCC_CORE_52

AE21

VCC_CORE_53

AM30

VCC_CORE_54

AE19

VCC_CORE_55

AC30

VCC_CORE_56

AE15

VCC_CORE_57

M30

VCC_CORE_58

K27

VCC_CORE_59

M24

VCC_CORE_60

AN21

VCC_CORE_61

T8

VCC_CORE_62

AC28

VCC_CORE_63

N25

VCC_CORE_64

AE18

VCC_CORE_65

W26

VCC_CORE_66

AD25

VCC_CORE_67

M8

VCC_CORE_68

N30

VCC_CORE_69

AD26

VCC_CORE_70

AJ26

VCC_CORE_71

AM29

VCC_CORE_72

M25

VCC_CORE_73

M26

VCC_CORE_74

L8

VCC_CORE_75

U25

VCC_CORE_76

Y8

VCC_CORE_77

AJ12

VCC_CORE_78

AD27

VCC_CORE_79

U23

VCC_CORE_80

M23

VCC_CORE_81

AG29

VCC_CORE_82

N27

VCC_CORE_83

AM22

VCC_CORE_84

U28

VCC_CORE_85

K28

VCC_CORE_86

U8

VCC_CORE_87

AK18

VCC_CORE_88

AD8

VCC_CORE_89

K24

VCC_CORE_90

AH28

VCC_CORE_91

AH21

VCC_CORE_92

AK12

VCC_CORE_93

AH22

VCC_CORE_94

T29

VCC_CORE_95

AM14

VCC_CORE_96

AM25

VCC_CORE_97

AE9

VCC_CORE_98

Y29

VCC_CORE_99

AK25

VCC_CORE_100

AK19

VCC_CORE_101

AG15

VCC_CORE_102

J22

VCC_CORE_103

T24

VCC_CORE_104

AG21

VCC_CORE_105

AM21

VCC_CORE_106

J25

VCC_CORE_107

U30

VCC_CORE_108

AL21

VCC_CORE_109

AG25

VCC_CORE_110

AJ18

VCC_CORE_111

J19

VCC_CORE_112

AH30

VCC_CORE_113

Critical

Critical
I

I

2

VCC_CORE_225
VCC_CORE_224
VCC_CORE_223
VCC_CORE_222
VCC_CORE_221
VCC_CORE_220
VCC_CORE_219
VCC_CORE_218
VCC_CORE_217
VCC_CORE_216
VCC_CORE_215
VCC_CORE_214
VCC_CORE_213
VCC_CORE_212
VCC_CORE_211
VCC_CORE_210
VCC_CORE_209
VCC_CORE_208
VCC_CORE_207
VCC_CORE_206
VCC_CORE_205
VCC_CORE_204
VCC_CORE_203
VCC_CORE_202
VCC_CORE_201
VCC_CORE_200
VCC_CORE_199
VCC_CORE_198
VCC_CORE_197
VCC_CORE_196
VCC_CORE_195
VCC_CORE_194
VCC_CORE_193
VCC_CORE_192
VCC_CORE_191
VCC_CORE_190
VCC_CORE_189
VCC_CORE_188
VCC_CORE_187
VCC_CORE_186
VCC_CORE_185
VCC_CORE_184
VCC_CORE_183
VCC_CORE_182
VCC_CORE_181
VCC_CORE_180
VCC_CORE_179
VCC_CORE_178
VCC_CORE_177
VCC_CORE_176
VCC_CORE_175
VCC_CORE_174
VCC_CORE_173
VCC_CORE_172
VCC_CORE_171
VCC_CORE_170
VCC_CORE_169
VCC_CORE_168
VCC_CORE_167
VCC_CORE_166
VCC_CORE_165
VCC_CORE_164
VCC_CORE_163
VCC_CORE_162
VCC_CORE_161
VCC_CORE_160
VCC_CORE_159
VCC_CORE_158
VCC_CORE_157
VCC_CORE_156
VCC_CORE_155
VCC_CORE_154
VCC_CORE_153
VCC_CORE_152
VCC_CORE_151
VCC_CORE_150
VCC_CORE_149
VCC_CORE_148
VCC_CORE_147
VCC_CORE_146
VCC_CORE_145
VCC_CORE_144
VCC_CORE_143
VCC_CORE_142
VCC_CORE_141
VCC_CORE_140
VCC_CORE_139
VCC_CORE_138
VCC_CORE_137
VCC_CORE_136
VCC_CORE_135
VCC_CORE_134
VCC_CORE_133
VCC_CORE_132
VCC_CORE_131
VCC_CORE_130
VCC_CORE_129
VCC_CORE_128
VCC_CORE_127
VCC_CORE_126
VCC_CORE_125
VCC_CORE_124
VCC_CORE_123
VCC_CORE_122
VCC_CORE_121
VCC_CORE_120
VCC_CORE_119
VCC_CORE_118
VCC_CORE_117
VCC_CORE_116
VCC_CORE_115
VCC_CORE_114

LGA775_C_EL

LGA775_C_EL

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

VCCP

AK9
M28
AF12
N8
AF19
K26
J14
AN22
N24
AH8
W8
AD29
AL29
AG8
AA8
AG18
J30
AF14
M27
J9
AK14
Y24
AF21
AD30
AL9
AG19
J27
J12
W28
T28
J13
J24
AM12
AL26
AG28
AH27
AH29
AH19
AJ14
AH11
AF22
AF9
N26
AG9
AN12
AK8
T27
AJ19
U26
AJ8
AN15
AL22
AH12
N28
T26
AM8
AL19
K23
P8
K25
J11
J29
AH9
AJ25
AL30
N29
AG14
AK11
AJ9
AL12
AH25
AN30
AL14
K30
AJ11
AL11
AM11
AJ21
AG30
AK21
AF8
AM15
AD23
AF11
AK15
AG27
J21
J18
J26
AL15
AF18
AH15
AN9
AG26
AJ15
J10
AK26
AG11
AN29
AK22
R8
T23
AH14
AN8
AL25
W27
AH26
AH18
J20
AJ22
AG12
J15

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

CPU(2/2)- Power

CPU(2/2)- Power

CPU(2/2)- Power

ZN5

ZN5

ZN5

5 40Friday, March 05, 2010

5 40Friday, March 05, 2010

1

5 40Friday, March 05, 2010

X4

X4

X4

5

V_FSB_VTT

R443

R443
301

301

0402

0402

%

%

1

1
I

D D

C C

B B

A A

I

R443_1

R442

R442
100

100

0402

0402
I

I

%

%

1

1

R448

R448

16.5

16.5

0402

0402
I

I
1

1

%

%

V_FSB_VTT

R455

R455

57.6

57.6

0402

0402
1%

1%
I

I

R452

R452
100

100

0402

0402
I

I
1%

1%

49.9/F as schematic checklist

R441 49.9

R441 49.9

0402I 1%

0402I 1%

C395

C395

0.1U

0.1U

0402

0402
I

I
X7R

X7R
10V

10V

H_RCOMP

49.9/F as schematic checklist

R451 49.9

R451 49.9

C431

C431

0.1U

0.1U

0402

0402
I

I
X7R

X7R
10V

10V

0402I 1%

0402I 1%

0.25*VCCP
W:10,S:10 , L<3"
BreakoutL<0.25"

H_SWING

W:10,S:7 , L<0.5"
BreakoutL<0.25"

0.365*VCCP
W:10,S:20 , L<1.5"

C430

C430
220P

220P

0402

0402
I

I
X7R

X7R
50V

50V

MCH_GTLREF0R455_1

4

H_A#[3..16]4

H_A#[17..35]4

H_REQ#[0..4]4

H_ADSTB#04

H_DSTBP[3..0]4

H_DSTBN[3..0]4

H_DINV#[3..0]4

H_RS#[2..0]4

H_DSTBP0
H_DSTBP1
H_DSTBP2
H_DSTBP3
H_DSTBN0
H_DSTBN1
H_DSTBN2
H_DSTBN3

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_ADSTB#14

H_ADS#4

H_TRDY#4

H_DRDY#4
H_DEFER#4
H_HITM#4
H_HIT#4

H_LOCK#4

H_BREQ#4

H_BNR#4
H_BPRI#4

H_DBSY#4

H_CPURST#4,5,29

T133T133

3

U3A

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8

H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_ADSTB#0
H_ADSTB#1

H_DSTBP0
H_DSTBN0
H_DINV#0
H_DSTBP1
H_DSTBN1
H_DINV#1
H_DSTBP2
H_DSTBN2
H_DINV#2
H_DSTBP3
H_DSTBN3
H_DINV#3

H_ADS#
H_TRDY#
H_DRDY#
H_DEFER#
H_HITM#
H_HIT#

H_LOCK#

H_BREQ#
H_BNR#
H_BPRI#
H_DBSY#
H_RS#0
H_RS#1
H_RS#2
H_CPURST#

TP_MCH_N25

U3A

L36

FSB_AB_3

L37

FSB_AB_4

J38

FSB_AB_5

F40

FSB_AB_6

H39

FSB_AB_7

L38

FSB_AB_8

L43

FSB_AB_9

N39

FSB_AB_10

N35

FSB_AB_11

N37

FSB_AB_12

J41

FSB_AB_13

N40

FSB_AB_14

M45

FSB_AB_15

R35

FSB_AB_16

T36

FSB_AB_17

R36

FSB_AB_18

R34

FSB_AB_19

R37

FSB_AB_20

R39

FSB_AB_21

U38

FSB_AB_22

T37

FSB_AB_23

U34

FSB_AB_24

U40

FSB_AB_25

T34

FSB_AB_26

Y36

FSB_AB_27

U35

FSB_AB_28

AA35

FSB_AB_29

U37

FSB_AB_30

Y37

FSB_AB_31

Y34

FSB_AB_32

Y38

FSB_AB_33

AA37

FSB_AB_34

AA36

FSB_AB_35

G38

FSB_REQB_0

K35

FSB_REQB_1

J39

FSB_REQB_2

C43

FSB_REQB_3

G39

FSB_REQB_4

J40

FSB_ADSTBB_0

T39

FSB_ADSTBB_1

C39

FSB_DSTBPB_0

B39

FSB_DSTBNB_0

B40

FSB_DINVB_0

K31

FSB_DSTBPB_1

J31

FSB_DSTBNB_1

F33

FSB_DINVB_1

J25

FSB_DSTBPB_2

K25

FSB_DSTBNB_2

F26

FSB_DINVB_2

C32

FSB_DSTBPB_3

D32

FSB_DSTBNB_3

D30

FSB_DINVB_3

J42

FSB_ADSB

L40

FSB_TRDYB

J43

FSB_DRDYB

G44

FSB_DEFERB

K44

FSB_HITMB

H45

FSB_HITB

H40

FSB_LOCKB

L42

FSB_BREQ0B

J44

FSB_BNRB

H37

FSB_BPRIB

H42

FSB_DBSYB

G43

FSB_RSB_0

L44

FSB_RSB_1

G42

FSB_RSB_2

D27

FSB_CPURSTB

N25

RSVD_05

EAGLELAKE_FCBGA1254

EAGLELAKE_FCBGA1254

Critical

Critical
I

I

EAGLELAKE_DDR3

EAGLELAKE_DDR3

SYM_REV = 1.5GC

SYM_REV = 1.5GC

1 OF 9

1 OF 9

FSB

FSB

2

FSB_DB_0
FSB_DB_1
FSB_DB_2
FSB_DB_3
FSB_DB_4
FSB_DB_5
FSB_DB_6
FSB_DB_7
FSB_DB_8

FSB_DB_9
FSB_DB_10
FSB_DB_11
FSB_DB_12
FSB_DB_13
FSB_DB_14
FSB_DB_15
FSB_DB_16
FSB_DB_17
FSB_DB_18
FSB_DB_19
FSB_DB_20
FSB_DB_21
FSB_DB_22
FSB_DB_23
FSB_DB_24
FSB_DB_25
FSB_DB_26
FSB_DB_27
FSB_DB_28
FSB_DB_29
FSB_DB_30
FSB_DB_31
FSB_DB_32
FSB_DB_33
FSB_DB_34
FSB_DB_35
FSB_DB_36
FSB_DB_37
FSB_DB_38
FSB_DB_39
FSB_DB_40
FSB_DB_41
FSB_DB_42
FSB_DB_43
FSB_DB_44
FSB_DB_45
FSB_DB_46
FSB_DB_47
FSB_DB_48
FSB_DB_49
FSB_DB_50
FSB_DB_51
FSB_DB_52
FSB_DB_53
FSB_DB_54
FSB_DB_55
FSB_DB_56
FSB_DB_57
FSB_DB_58
FSB_DB_59
FSB_DB_60
FSB_DB_61
FSB_DB_62
FSB_DB_63

FSB_SWING

FSB_RCOMP

FSB_DVREF

FSB_ACCVREF

HPL_CLKINP
HPL_CLKINN

F44
C44
D44
C41
E43
B43
D40
B42
B38
F38
A38
B37
D38
C37
D37
B36
E37
J35
H35
F37
G37
J33
L33
G33
L31
M31
M30
J30
G31
K30
M29
G30
J29
F29
H29
L25
K26
L29
J26
M26
H26
F25
F24
G25
H24
L24
J24
N24
C28
B31
F35
C35
B35
D35
D31
A34
B32
F31
D28
A29
C30
B30
E27
B28

B24
A23

C22
B23

P29
P30

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10

H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_SWING
H_RCOMP

MCH_GTLREF0

CLK_MCH_BCLK
CLK_MCH_BCLK#

1

H_D#[0..15] 4

H_D#[16..31] 4

H_D#[32..47] 4

H_D#[48..63] 4

CLK_MCH_BCLK 3
CLK_MCH_BCLK# 3

06

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

NB (1/5) HOST

NB (1/5) HOST

NB (1/5) HOST

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

ZN5

ZN5

ZN5

X4

X4

X4

6 40Friday, March 05, 2010

6 40Friday, March 05, 2010

6 40Friday, March 05, 2010

1

5

MCH_BSEL0

MCH_BSEL03
MCH_BSEL13
MCH_BSEL23

R457 1K 0402NI 5%R 457 1K 0402NI 5%
R467 1K 0402NI 5%R 467 1K 0402NI 5%

R454 0 0402I 5%R454 0 0402I 5%
R461 1K 0402NI 5%R 461 1K 0402NI 5%

55
50
34
27
22
17
6

19
18

43
42
41
40

54
53
52
51

39
38
37
36

47
46
45
44

26
25
24
23

33
32
31
30

CL_DATA013
CL_CLK013

CL_RST#13

CL_PWROK 13

U38_19

C_EXT_DPTX0P
C_EXT_DPTX0N
C_EXT_DPTX1P
C_EXT_DPTX1N

C_PEG_TXP4_R
C_PEG_TXN4_R
C_PEG_TXP5_R
C_PEG_TXN5_R

C_EXT_DPTX2P
C_EXT_DPTX2N
C_EXT_DPTX3P
C_EXT_DPTX3N

C_PEG_TXP6_R
C_PEG_TXN6_R
C_PEG_TXP7_R

UMADP_AUXDP
UMADP_AUXDN
UMA_HPD
U38_23

PEG_RXP6_R
PEG_RXN6_R
PEG_RXP7_R
PEG_RXN7_R

R453 1K 0402NI 5%R 453 1K 0402NI 5%

R456 1K

R456 1K

VCC3

C511

C511

2.2U

2.2U

0603

0603
I

I
X5R

X5R

6.3V

6.3V

0402 I5%

0402 I5%

0402I 5%

0402I 5%

T147T147
T145T145
T143T143
T146T146

T99T99
T22T22
T11T11
T20T20
T13T13

T9T9
T148T148
T21T21
T12T12

R5090

R5090

C683 0.1U 0402I X7R 10VC683 0.1U 0402I X7R 10V
C684 0.1U 0402I X7R 10VC684 0.1U 0402I X7R 10V
C685 0.1U 0402I X7R 10VC685 0.1U 0402I X7R 10V
C686 0.1U 0402I X7R 10VC686 0.1U 0402I X7R 10V

C56 0.1U 0402I X7 R 10VC56 0.1U 0402I X7R 10V
C57 0.1U 0402I X7 R 10VC57 0.1U 0402I X7R 10V
C73 0.1U 0402I X7 R 10VC73 0.1U 0402I X7R 10V
C72 0.1U 0402I X7 R 10VC72 0.1U 0402I X7R 10V

C687 0.1U 0402I X7R 10VC687 0.1U 0402I X7R 10V
C688 0.1U 0402I X7R 10VC688 0.1U 0402I X7R 10V
C689 0.1U 0402I X7R 10VC689 0.1U 0402I X7R 10V
C690 0.1U 0402I X7R 10VC690 0.1U 0402I X7R 10V

C59 0.1U 0402I X7 R 10VC59 0.1U 0402I X7R 10V
C58 0.1U 0402I X7 R 10VC58 0.1U 0402I X7R 10V
C75 0.1U 0402I X7 R 10VC75 0.1U 0402I X7R 10V
C74 0.1U 0402I X7 R 10VC74 0.1U 0402I X7R 10V

D D

V_FSB_VTT

CLPWROK sequence request

1. asserted after VCC_CL ramp to 1.0V

2. asserted before PWROK

V_1P1_CL_MCH

Layout note:
H_GTLREF: Zo=55 ohm,L<0.5"

R462

R462

0.316*VCC_CL+-2%

1K

1K

0402

0402
1%

1%
I

I

CL_VREF

C461

C461

R465

R465

0.1U

0.1U

464

464

0402

0402

0402

0402

I

I

I

I

X7R

X7R

1%

1%

10V

10V

C C

R474 0

PEG_TXP4
PEG_TXN4
PEG_TXP5
PEG_TXN5

PEG_TXP6
PEG_TXN6
PEG_TXP7
PEG_TXN7

PEG_RXP6
PEG_RXN6
PEG_RXP7
PEG_RXN7

R474 0
R473 0

R473 0

U38

U38

1
11
16
20
21
28
29
35
48
49
56

2

3

4

5

7

8

9
10

12
13
14
15

PWRGD_140MS1 1,26,29

MCH_CLPWROK35

B B

57

A A

T

T
Critical

Critical
I

I

QFN56

QFN56

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

IN_0+
IN_0­IN_1+
IN_1-

IN_2+
IN_2­IN_3+
IN_3-

OUT+
OUT­X+
X-

GND

CL_PWROK

0402NI 5%

0402NI 5%
0402I 5%

0402I 5%

PI3PCIE2612-AZFE

PI3PCIE2612-AZFE

SEL: (H,L)=(Dx,Tx)

SEL: (H,L)=(Dx,Tx)

VDD
VDD
VDD
VDD
VDD
VDD
VDD

LE#
SEL

D0+

D0-

D1+

D1-

TX0+

TX0-

TX1+

TX1-

D2+

D2-

D3+

D3-

TX2+

TX2-

TX3+

TX3-

AUX+
AUX-

HPD

NC

RX0+

RX0-

RX1+

RX1-

MCH_BSEL1
MCH_BSEL2

TP_MCH_K16
EXP_SLR

EXP_SM
U3_L17

TCEN

DUALX8_ENABLE

CL_DATA0
CL_CLK0
CL_VREF
CL_RST#
CL_PWROK

JTAG_TDI
JTAG_TDO
JTAG_TCK
JTAG_TMS

TP_MCH_A44
TP_MCH_BD1
TP_MCH_BD45
TP_MCH_BE2
TP_MCH_BE44

TP_MCH_A45
TP_MCH_B2
TP_MCH_BE1
TP_MCH_BE45

C532

C532

0.1U

0.1U

0402

0402
I

I
X7R

X7R
10V

10V

MXM_PRSNT#

UMADP_AUXDP 16
UMADP_AUXDN 16
UMA_HPD 16

T149T149

PEG_RXP6_R 16
PEG_RXN6_R 1 6
PEG_RXP7_R 16
PEG_RXN7_R 1 6

F17
G16
P15
M20
N17
K16
F15
G15
H17

L17

M17

J17

G20

J16

M16

J15
J20

F20

AY4
AY2

AN13

AW2

AN8

AR7
AN10
AN11

AN9

R31

R32

U30

U31

R15

R14

T15
T14

AN17

AB15

A44

BD1
BD45

BE2
BE44

A45

B2

BE1
BE45

C524

C524

0.1U

0.1U

0402

0402
I

I
X7R

X7R
10V

10V

4

U3E

U3E

EAGLELAKE_DDR3

EAGLELAKE_DDR3

SYM_REV = 1.5GC

SYM_REV = 1.5GC

BSEL0
BSEL1
BSEL2
ALLZTEST
XORTEST
PRIMARY_PEG_PRESENCE
EXP_SLR
RSVD_17
EXP_SM
ITPM_EN#

RSVD_10
CEN
RSVD_11
RSVD_12
RSVD_13
RSVD_14
RSVD_15
DUALX8_ENABLE

CL_DATA
CL_CLK
CL_VREF
CL_RSTB
CL_PWROK

JTAG_TDI
JTAG_TDO
JTAG_TCK
JTAG_TMS

RSVD_31
RSVD_30
RSVD_33
RSVD_32

RSVD_25
RSVD_26
RSVD_27
RSVD_28

NC_01

MISC

MISC

RSVD_29

NC_13
NC_12
NC_11
NC_10
NC_09

RSVD_18
RSVD_19
RSVD_20
RSVD_21

EAGLELAKE_FCBGA1254

EAGLELAKE_FCBGA1254

Critical

Critical
I

I

EXT_DPTX0P
EXT_DPTX0N
EXT_DPTX1P
EXT_DPTX1N

PEG_TXP4_R
PEG_TXN4_R
PEG_TXP5_R
PEG_TXN5_R

EXT_DPTX2P
EXT_DPTX2N
EXT_DPTX3P
EXT_DPTX3N

PEG_TXP6_R
PEG_TXN6_R
PEG_TXP7_R
PEG_TXN7_RC_PEG_TXN7_R

5 OF 9

5 OF 9

C508

C508

C505

C505

0.1U

0.1U

0.1U

0.1U

0402

0402

0402

0402

I

I

I

I

X7R

X7R

X7R

X7R

10V

10V

10V

10V

H:PCIE to DP
L:For MXM lane to DP

CRT_HSYNC
CRT_VSYNC

CRT_GREEN

CRT_DDC_DATA

VGA

VGA

CRT_DDC_CLK

DPL_REFCLKINP
DPL_REFCLKINN

DDPC_CTRLCLK

DDPC_CTRLDATA

C510

C510

0.1U

0.1U

0402

0402
I

I
X7R

X7R
10V

10V

EXT_DPTX0P 16
EXT_DPTX0N 16
EXT_DPTX1P 16
EXT_DPTX1N 16

PEG_TXP4_R 16
PEG_TXN4_R 16
PEG_TXP5_R 16
PEG_TXN5_R 16

EXT_DPTX2P 16
EXT_DPTX2N 16
EXT_DPTX3P 16
EXT_DPTX3N 16

PEG_TXP6_R 16
PEG_TXN6_R 16
PEG_TXP7_R 16
PEG_TXN7_R 16

CRT_RED

CRT_BLUE

CRT_IRTN

DAC_IREF

VCC_95

VSS_370

RSVD_35
RSVD_34

NC_19
RSTINB
PWROK

ICH_SYNCB

HDA_BCLK
HDA_RSTB

HDA_SDI

HDA_SDO

HDA_SYNC

DPRSTPB

NC_02

NC_18

NC_05

NC_04

NC_06

NC_03

NC_08

NC_07

3

CRT_R#
CRT_G#

ICH_DPRSTP#

VCC3

DREFCLK
DREFSSCLK

DREFSSCLK#
DREFCLK#

T142T142

CRT_B#

R42

R42
150

150

0402

0402
I

I
5%

5%

CRT_DDC_DATA 28

CRT_DDC_CLK 28

R43 EV@10K 0402NI 5%R43 EV@10K 0402NI 5%
R45 EV@10K 0402NI 5%R45 EV@10K 0402NI 5%

R46 EV@0 04 02NI 5%R46 EV@0 0402NI 5%
R41 EV@0 04 02NI 5%R41 EV@0 0402NI 5%

PLT_RST# 12

PM_SYNC# 11

ICH_DPRSTP#
The Daisy chain topology should
be routed from ICH10 to IMVP ,
then to (G)MCH and CPU, in that
order.

SDVO_CTRLDATA17
SDVO_CTRLCLK17

ICH_DPRSTP# 4,11

H_CPUSLP# 4,26

U8

U8

PI3PCIE2612-BZFE

PI3PCIE2612-BZFE

1

GND

11

GND

16

GND

20

GND

21

GND

28

GND

29

GND

35

GND

48

GND

49

GND

56

GND

4

IN_0+

5

IN_0-

7

IN_1+

8

IN_1-

9

IN_2+

10

IN_2-

12

IN_3+

13

IN_3-

14

OUT+

15

OUT-

18

X+

19

X-

57

GND

SEL: (H,L)=(Dx,Tx)

SEL: (H,L)=(Dx,Tx)

QFN56

QFN56

T

T
Critical

Critical
I

I

R39

R39
150

150

0402

0402
I

I
5%

5%

V_1P1_CL_MCH

SDVO_CTRLCLK

Enable Digital Port B
had PU 5.6K to VCC2.5 on CH7308 side
need to check with intel

VDD
VDD
VDD
VDD
VDD
VDD
VDD

LE#

SEL

D0+

D0-

D1+

D1-

TX0+
TX0­TX1+
TX1-

D2+

D2-

D3+

D3-

TX2+
TX2­TX3+
TX3-

AUX+

AUX-

HPD

NC

RX0+

RX0-

RX1+

RX1-

U3_D14

R775 0 0402NI 5 %R775 0 040 2NI 5%

D14

R776 0 0402NI 5 %R776 0 040 2NI 5%

U3_C14

C14

CRT_R#

R769 0 0402NI 5 %R769 0 040 2NI 5%

B18

CRT_G#

R770 0 0402NI 5 %R770 0 040 2NI 5%

D18

R771 0 0402NI 5 %R771 0 040 2NI 5%

CRT_B#

C18
F13

CRT_DDC_DATA_R

L15

CRT_DDC_CLK_ R

M15

U3_B15

R466 1.02K 0402

1%R466 1.02K 040 2

DREFCLK
DREFCLK#
DREFSSCLK
DREFSSCLK#

TP_MCH_B14

PM_SYNC#_MCH

DDPC_CTRL_CL K
DDPC_CTRL_DATA

MCH_DPRSTP#
H_CPUSLP#

TP_MCH_B45
TP_MCH_AK15
TP_MCH_AD42
TP_MCH_AN16

TP_MCH_AW44
TP_MCH_R42

C512

C512

0.1U

0.1U

0402

0402
I

I
X7R

X7R
10V

10V

1%

I

I

0402

0402

B15
E15

D15
G8
G9

L13
L11
B14
AN6
AR4
K15

AU4
AV4
AU2
AV1
AU3

J11
F11

P43
P42

SLPB

B45
AK15
AD42
AN16
W30
AW44
R42
U32

C531

C531

0.1U

0.1U

0402

0402
I

I
X7R

X7R
10V

10V

R711 0 0402I 5%R711 0 0402I 5%
R470 1K 0402I 5%R470 1K 0402I 5%
R471 1K 0402I 5%R471 1K 0402I 5%
R710 0 0402I 5%R710 0 0402I 5%

%

R36 0 0402I5%R36 0 0402I5%

DREFCLK 3
DREFCLK# 3
DREFSSCLK 3
DREFSSCLK# 3

PLT_RST#U3_AN6

R4800402 I5% R4800402 I5%
R47500402 I5% R47500402 I5%

PWRGD_140MSU3_AR4

R4630

I5%R4630

I5

DDPC_CTRL_CL K 16
DDPC_CTRL_DATA 16

T10T10
T144T144
T103T103
T139T139

T4T4
T98T98

SDVO_CTRLDATA_R

SDVO_CTRLCLK_R

CRT_HSYNC 28
CRT_VSYNC 28

CRT_R 28
CRT_G 28
CRT_B 28

PEG_TXN3
PEG_TXP3
PEG_TXN2
PEG_TXP2

PEG_TXN1
PEG_TXP1
PEG_TXN0
PEG_TXP0

PEG_RXP2
PEG_RXN2

R40

R40
150

150

0402

0402
I

I
5%

5%

55
50
34
27
22
17
6

3
2

54
53
52
51

43
42
41
40

47
46
45
44

39
38
37
36

33
32
31
30

26
25

U8_24

24

U8_23

23

PEG_RXP016
PEG_RXN016
PEG_RXP116
PEG_RXN116

PEG_RXP316
PEG_RXN316
PEG_RXP416
PEG_RXN416
PEG_RXP516
PEG_RXN516

PEG_RXP816
PEG_RXN816
PEG_RXP916
PEG_RXN916
PEG_RXP1016
PEG_RXN101 6
PEG_RXP1116
PEG_RXN111 6
PEG_RXP1216
PEG_RXN121 6
PEG_RXP1316
PEG_RXN131 6
PEG_RXP1416
PEG_RXN141 6
PEG_RXP1516
PEG_RXN151 6

DMI_RXP01 2
DMI_RXN012
DMI_RXP11 2
DMI_RXN112
DMI_RXP21 2
DMI_RXN212
DMI_RXP31 2
DMI_RXN312

CLK_PCIE_EXP3

CLK_PCIE_EXP#3

R469 IV@0 040 2N I5%R469 IV@0 0402NI5%
R468 IV@0 040 2

R468 IV@0 040 2

NI5%

NI5%

U8_3

0402 I5%

0402 I5%

C_SDVO_CLK#
C_SDVO_CLK
C_SDVO_BLUE#
C_SDVO_BLUE

C_PEG_TXN3_R
C_PEG_TXP3_R
C_PEG_TXN2_R
C_PEG_TXP2_R

C_SDVO_GREEN#
C_SDVO_GREEN
C_SDVO_RED#
C_SDVO_RED

C_PEG_TXN1_R
C_PEG_TXP1_R

C_PEG_TXP0_R
SDVO_STALL

SDVO_STALL#
SDVO_CTRLDATA
SDVO_CTRLCLK

PEG_RXP2_R

PEG_RXN2_R

PEG_RXP0
PEG_RXN0
PEG_RXP1
PEG_RXN1
PEG_RXP2
PEG_RXN2
PEG_RXP3
PEG_RXN3
PEG_RXP4
PEG_RXN4
PEG_RXP5
PEG_RXN5
PEG_RXP6
PEG_RXN6
PEG_RXP7
PEG_RXN7
PEG_RXP8
PEG_RXN8
PEG_RXP9
PEG_RXN9
PEG_RXP10
PEG_RXN10
PEG_RXP11
PEG_RXN11
PEG_RXP12
PEG_RXN12
PEG_RXP13
PEG_RXN13
PEG_RXP14
PEG_RXN14
PEG_RXP15
PEG_RXN15

DMI_RXP0
DMI_RXN0
DMI_RXP1
DMI_RXN1
DMI_RXP2
DMI_RXN2
DMI_RXP3
DMI_RXN3

CLK_PCIE_EXP
CLK_PCIE_EXP#

SDVO_CTRLDATA_RSDVO_CTRLDATA
SDVO_CTRLCLK_R

TP_MCH_AB13

T140T140

TP_MCH_AD13

T141T141

VCC3

C243

C243

2.2U

2.2U

0603

0603
I

I
X5R

X5R

6.3V

6.3V

VCC3

R700

R700

C54 0.1U 0402I X7R 10VC54 0.1U 0402I X7R 10V
C53 0.1U 0402I X7R 10VC53 0.1U 0402I X7R 10V
C52 0.1U 0402I X7R 10VC52 0.1U 0402I X7R 10V
C51 0.1U 0402I X7R 10VC51 0.1U 0402I X7R 10V

C706 0.1U 0402I X7R 10VC706 0.1U 0402I X7R 10V
C705 0.1U 0402I X7R 10VC705 0.1U 0402I X7R 10V
C707 0.1U 0402I X7R 10VC707 0.1U 0402I X7R 10V
C708 0.1U 0402I X7R 10VC708 0.1U 0402I X7R 10V

C48 0.1U 0402I X7R 10VC48 0.1U 0402I X7R 10V
C47 0.1U 0402I X7R 10VC47 0.1U 0402I X7R 10V
C46 0.1U 0402I X7R 10VC46 0.1U 0402I X7R 10V
C45 0.1U 0402I X7R 10VC45 0.1U 0402I X7R 10V

C702 0.1U 0402I X7R 10VC702 0.1U 0402I X7R 10V
C701 0.1U 0402I X7R 10VC701 0.1U 0402I X7R 10V
C703 0.1U 0402I X7R 10VC703 0.1U 0402I X7R 10V
C704 0.1U 0402I X7R 10VC704 0.1U 0402I X7R 10V

SDVO_STALL 17
SDVO_STALL# 17

PEG_RXP2_R 16
PEG_RXN2_R 1 6

R4900402 I5% R4900402 I5%
R5000402 I5% R5000402 I5%

C492

C492

0.1U

0.1U

0402

0402
I

I
X7R

X7R
10V

10V

R69

R69

2.2K

2.2K

0402

0402

%

%

5

5
I

I

SDVO_CTRLDATA_R

SDVO_CTRLCLK_R

2

U3B

U3B

F6

PEG_RXP_0

G7

PEG_RXN_0

H6

PEG_RXP_1

G4

PEG_RXN_1

J6

PEG_RXP_2

J7

PEG_RXN_2

L6

PEG_RXP_3

L7

PEG_RXN_3

N9

PEG_RXP_4

N10

PEG_RXN_4

N7

PEG_RXP_5

N6

PEG_RXN_5

R7

PEG_RXP_6

R6

PEG_RXN_6

R9

PEG_RXP_7

R10

PEG_RXN_7

U10

PEG_RXP_8

U9

PEG_RXN_8

U6

PEG_RXP_9

U7

PEG_RXN_9

AA9

PEG_RXP_10

AA10

PEG_RXN_10

R4

PEG_RXP_11

P4

PEG_RXN_11

AA7

PEG_RXP_12

AA6

PEG_RXN_12

AB10

PEG_RXP_13

AB9

PEG_RXN_13

AB3

PEG_RXP_14

AA2

PEG_RXN_14

AD10

PEG_RXP_15

AD11

PEG_RXN_15

AD7

DMI_RXP_0

AD8

DMI_RXN_0

AE9

DMI_RXP_1

AE10

DMI_RXN_1

AE6

DMI_RXP_2

AE7

DMI_RXN_2

AF9

DMI_RXP_3

AF8

DMI_RXN_3

D9

EXP_CLKP

E9

EXP_CLKN

J13

SDVO_CTRLDATA

G13

SDVO_CTRLCLK

AB13

RSVD_23

AD13

RSVD_22

EAGLELAKE_FCBGA1254

EAGLELAKE_FCBGA1254

Critical

Critical
I

I

C493

C493

0.1U

0.1U

0402

0402
I

I
X7R

X7R
10V

10V

H:SDVO TO LVDS
L:for MXM lane

MXM_PRSNT# 13,16

SDVO_CLK#
SDVO_CLK
SDVO_BLUE#
SDVO_BLUE

PEG_TXN3_R
PEG_TXP3_R
PEG_TXN2_R
PEG_TXP2_R

SDVO_GREEN#
SDVO_GREEN
SDVO_RED#
SDVO_RED

PEG_TXN1_R
PEG_TXP1_R
PEG_TXN0_RC_PEG_TXN0_R
PEG_TXP0_R

Q11

Q11
ME2N7002E

ME2N7002E

S

S

OT23-3

OT23-3

60V

60V
250mA

250mA
NI

NI

3

3

Q9

Q9
ME2N7002E

ME2N7002E

250mA

250mA
SOT23-3

SOT23-3
I

I
60V

60V

EAGLELAKE_DDR3

EAGLELAKE_DDR3

SYM_REV = 1.5GC

SYM_REV = 1.5GC

PCIEDMI

PCIEDMI

2 OF 9

2 OF 9

C491

C491

0.1U

0.1U

0402

0402
I

I
X7R

X7R
10V

10V

1

2

2

1

C489

C489

0.1U

0.1U

0402

0402
I

I
X7R

X7R
10V

10V

SDVO_CLK# 17
SDVO_CLK 17
SDVO_BLUE# 17
SDVO_BLUE 17

PEG_TXN3_R 16
PEG_TXP3_R 16
PEG_TXN2_R 16
PEG_TXP2_R 16

SDVO_GREEN# 17
SDVO_GREEN 17
SDVO_RED# 17
SDVO_RED 17

PEG_TXN1_R 16
PEG_TXP1_R 16
PEG_TXN0_R 16
PEG_TXP0_R 16

Q11_S

Q9_S

PEG_TXP_0
PEG_TXN_0
PEG_TXP_1
PEG_TXN_1
PEG_TXP_2
PEG_TXN_2
PEG_TXP_3
PEG_TXN_3
PEG_TXP_4
PEG_TXN_4
PEG_TXP_5
PEG_TXN_5
PEG_TXP_6
PEG_TXN_6
PEG_TXP_7
PEG_TXN_7
PEG_TXP_8
PEG_TXN_8
PEG_TXP_9

PEG_TXN_9
PEG_TXP_10
PEG_TXN_10
PEG_TXP_11
PEG_TXN_11
PEG_TXP_12
PEG_TXN_12
PEG_TXP_13
PEG_TXN_13
PEG_TXP_14
PEG_TXN_14
PEG_TXP_15
PEG_TXN_15

DMI_TXP_0
DMI_TXN_0
DMI_TXP_1
DMI_TXN_1
DMI_TXP_2
DMI_TXN_2
DMI_TXP_3
DMI_TXN_3

EXP_RCOMPO

EXP_COMPI

EXP_ICOMPO

EXP_RBIAS

1

R257

R257
1M

1M

0402

0402

I

I

N

N
5%

5%

R792

R792
1M

1M

0402

0402
NI

NI
5%

5%

1

C487

C487

0.1U

0.1U

0402

0402
I

I
X7R

X7R
10V

10V

Q8

Q8
ME2N7002E

ME2N7002E

S

S

OT23-3

OT23-3

60V

60V
250mA

250mA
NI

NI

Q10

Q10
ME2N7002E

ME2N7002E

250mA

250mA
SOT23-3

SOT23-3
I

I
60V

60V

C11
B11
A10
B9
C9
D8
B8
C7
B7
B6
B3
B4
D2
C2
H2
G2
J2
K2
K1
L2
P2
M2
T2
R1
U2
V2
W4
V3
AA4
Y4
AC1
AB2

AC2
AD2
AD4
AE4
AE2
AF2
AF4
AG4

Y7
Y8
Y6

AG1

2

2

C_PEG_TXP8
C_PEG_TXN8
C_PEG_TXP9
C_PEG_TXN9
C_PEG_TXP10
C_PEG_TXN10
C_PEG_TXP11
C_PEG_TXN11
C_PEG_TXP12
C_PEG_TXN12
C_PEG_TXP13
C_PEG_TXN13
C_PEG_TXP14
C_PEG_TXN14
C_PEG_TXP15
C_PEG_TXN15

DMI_TXP0
DMI_TXN0
DMI_TXP1
DMI_TXN1
DMI_TXP2
DMI_TXN2
DMI_TXP3
DMI_TXN3

GRCOMP

GRBIAS

C494

C494

0.1U

0.1U

0402

0402
I

I
X7R

X7R
10V

10V

VCC3

VCC3

3

MXM_PRSNT#

3

R47 2.2K

R47 2.2K

DDPC_CTRL_DATA

R44 2.2K

R44 2.2K

SDVO_CTRLDATA

SDVO_CTRLCLK

C60 EV@0.1U 0402I X7R 10VC60 EV@0.1U 0402I X7R 10V
C61 EV@0.1U 0402I X7R 10VC61 EV@0.1U 0402I X7R 10V
C76 EV@0.1U 0402I X7R 10VC76 EV@0.1U 0402I X7R 10V
C77 EV@0.1U 0402I X7R 10VC77 EV@0.1U 0402I X7R 10V
C63 EV@0.1U 0402I X7R 10VC63 EV@0.1U 0402I X7R 10V
C62 EV@0.1U 0402I X7R 10VC62 EV@0.1U 0402I X7R 10V
C79 EV@0.1U 0402I X7R 10VC79 EV@0.1U 0402I X7R 10V
C78 EV@0.1U 0402I X7R 10VC78 EV@0.1U 0402I X7R 10V
C64 EV@0.1U 0402I X7R 10VC64 EV@0.1U 0402I X7R 10V
C65 EV@0.1U 0402I X7R 10VC65 EV@0.1U 0402I X7R 10V
C67 EV@0.1U 0402I X7R 10VC67 EV@0.1U 0402I X7R 10V
C66 EV@0.1U 0402I X7R 10VC66 EV@0.1U 0402I X7R 10V
C69 EV@0.1U 0402I X7R 10VC69 EV@0.1U 0402I X7R 10V
C68 EV@0.1U 0402I X7R 10VC68 EV@0.1U 0402I X7R 10V
C71 EV@0.1U 0402I X7R 10VC71 EV@0.1U 0402I X7R 10V
C70 EV@0.1U 0402I X7R 10VC70 EV@0.1U 0402I X7R 10V

R472 49.9 0402

1%R472 49.9 0402

1%

1%R477 750 040 2

1%

U7_2

0402I 5%

0402I 5%

U47_2

1

X

3

GND

2

Y

74V1G66CTR

74V1G66CTR

I

I

1

X

3

GND

2

Y

74V1G66CTR

74V1G66CTR

I

I

V_1P1_CORE

U7

U7

U47

U47

I

I

R477 750 0402

I

I

C488

C488

0.1U

0.1U

0402

0402
I

I
X7R

X7R
10V

10V

DDPC_CTRL_CL K

0402I

0402I

5%

5%

VCC

CTRL

VCC

CTRL

PEG_TXP0
PEG_TXN0
PEG_TXP1
PEG_TXN1
PEG_TXP2
PEG_TXN2
PEG_TXP3
PEG_TXN3
PEG_TXP4
PEG_TXN4
PEG_TXP5
PEG_TXN5
PEG_TXP6
PEG_TXN6
PEG_TXP7
PEG_TXN7

1

5

4

5

4

PEG_TXP8
PEG_TXN8
PEG_TXP9
PEG_TXN9
PEG_TXP10
PEG_TXN10
PEG_TXP11
PEG_TXN11
PEG_TXP12
PEG_TXN12
PEG_TXP13
PEG_TXN13
PEG_TXP14
PEG_TXN14
PEG_TXP15
PEG_TXN15

MXM_PRSNT#

SDVO -> LVDS

PEG_TXP8 16
PEG_TXN8 1 6
PEG_TXP9 16
PEG_TXN9 1 6
PEG_TXP10 16
PEG_TXN10 16
PEG_TXP11 16
PEG_TXN11 16
PEG_TXP12 16
PEG_TXN12 16
PEG_TXP13 16
PEG_TXN13 16
PEG_TXP14 16
PEG_TXN14 16
PEG_TXP15 16
PEG_TXN15 16

DMI_TXP0 12
DMI_TXN0 12
DMI_TXP1 12
DMI_TXN1 12
DMI_TXP2 12
DMI_TXN2 12
DMI_TXP3 12
DMI_TXN3 12

MXM_PRSNT#

07

VCC3

VCC3

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

PROJECT :

NB (2/5)- VGA, DMI, PCIE

NB (2/5)- VGA, DMI, PCIE

NB (2/5)- VGA, DMI, PCIE

1

ZN5

ZN5

ZN5

X4

X4

X4

7 40Friday, March 05, 2010

7 40Friday, March 05, 2010

7 40Friday, March 05, 2010

of

of

of

5

4

3

2

1

08

U3D

U3D

EAGLELAKE_DDR3

U3C

U3C

EAGLELAKE_DDR3

EAGLELAKE_DDR3

SYM_REV = 1.5GC

D D

C C

B B

M_A_A[0..14]15

M_A_CAS#15
M_A_RAS#15

M_A_BS#015
M_A_BS#115
M_A_BS#215

M_SA_CS#015

T3T3
T8T8

M_SA_CKE015
M_SA_CKE115

T16T16
T15T15

M_SA_ODT015
M_SA_ODT115

T5T5
T7T7

M_SA0_CK015
M_SA0_CK#015

M_SA0_CK215
M_SA0_CK#215

T113T113
T114T114

T109T109
T107T107

M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8

M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14

M_A_CAS#
M_A_RAS#

M_A_BS#0
M_A_BS#1
M_A_BS#2

M_SA_CS#0
M_SA_CS#2

M_SA_CS#3
M_SA_CKE0

M_SA_CKE1
M_SA_CKE2
M_SA_CKE3

M_SA_ODT0
M_SA_ODT1
M_SA_ODT2
M_SA_ODT3

M_SA0_CK0
M_SA0_CK#0

M_SA0_CK2
M_SA0_CK#2
M_SA1_CK3
M_SA1_CK#3

M_SA1_CK5
M_SA1_CK#5

BC41
BC35

BB32
BC32
BD32

BB31

AY31

BA31
BD31
BD30
AW43
BC30

BB30
AM42
BD28

AW42

AU42

AV42

AV45

AY44
BC28

AU43
AR40

AU44
AM43

BB27
BD27

BA27

AY26
AR42

AM44
AR44

AL40

AY37

BA37
AW29

AY29

AU37

AV37

AU33

AT33

AT30
AR30
AW38

AY38

DRAM_PWROK generated circuit

V_SM

R480

R480
10K

10K

0402

0402
5%

5%
I

I

H_DRAMPWRGD

C479

C479
1U

1U

5V_LDO

0402

0402
I

I
X

X

5R

5R

R481

R481

6.3V

6.3V

1K

1K

0402

0402
I

I
5%

5%

Q42_D

Q42

Q42
ME2N7002E

ME2N7002E

250mA

250mA

OT23-3

OT23-3

S

S
I

I
60V

60V

2

3

A A

SLP_S4#11,29,30,36

R482 1K

R482 1K

Q42_G

2

0402I

0402I

5%

5%

1

DDR_A_MA_0
DDR_A_MA_1
DDR_A_MA_2
DDR_A_MA_3
DDR_A_MA_4
DDR_A_MA_5
DDR_A_MA_6
DDR_A_MA_7
DDR_A_MA_8
DDR_A_MA_9
DDR_A_MA_10
DDR_A_MA_11
DDR_A_MA_12
DDR_A_MA_13
DDR_A_MA_14

DDR_A_WEB
DDR_A_CASB
DDR_A_RASB

DDR_A_BS_0
DDR_A_BS_1
DDR_A_BS_2

DDR_A_CSB_0
DDR_A_CSB_1
DDR_A_CSB_2
DDR_A_CSB_3

DDR_A_CKE_0
DDR_A_CKE_1
DDR_A_CKE_2
DDR_A_CKE_3

DDR_A_ODT_0
DDR_A_ODT_1
DDR_A_ODT_2
DDR_A_ODT_3

DDR_A_CK_0
DDR_A_CKB_0
DDR_A_CK_1
DDR_A_CKB_1
DDR_A_CK_2
DDR_A_CKB_2
DDR_A_CK_3
DDR_A_CKB_3
DDR_A_CK_4
DDR_A_CKB_4
DDR_A_CK_5
DDR_A_CKB_5

DDR_Channel_A

DDR_Channel_A

EAGLELAKE_FCBGA1254

EAGLELAKE_FCBGA1254

Critical

Critical
I

I

3

I

I

Q41

Q41
ME2N7002E

ME2N7002E

OT23-3

OT23-3

S

S

1

60V

60V
250mA

250mA

SYM_REV = 1.5GC

3 OF 9

3 OF 9

DDR_A_DQS_0

DDR_A_DQSB_0

DDR_A_DM_0
DDR_A_DQ_0

DDR_A_DQ_1
DDR_A_DQ_2
DDR_A_DQ_3
DDR_A_DQ_4
DDR_A_DQ_5
DDR_A_DQ_6
DDR_A_DQ_7

DDR_A_DQS_1

DDR_A_DQSB_1

DDR_A_DM_1
DDR_A_DQ_8

DDR_A_DQ_9
DDR_A_DQ_10
DDR_A_DQ_11
DDR_A_DQ_12
DDR_A_DQ_13
DDR_A_DQ_14
DDR_A_DQ_15

DDR_A_DQS_2

DDR_A_DQSB_2

DDR_A_DM_2
DDR_A_DQ_16

DDR_A_DQ_17
DDR_A_DQ_18
DDR_A_DQ_19
DDR_A_DQ_20
DDR_A_DQ_21
DDR_A_DQ_22
DDR_A_DQ_23

DDR_A_DQS_3

DDR_A_DQSB_3

DDR_A_DM_3
DDR_A_DQ_24

DDR_A_DQ_25
DDR_A_DQ_26
DDR_A_DQ_27
DDR_A_DQ_28
DDR_A_DQ_29
DDR_A_DQ_30
DDR_A_DQ_31

DDR_A_DQS_4

DDR_A_DQSB_4

DDR_A_DM_4
DDR_A_DQ_32

DDR_A_DQ_33
DDR_A_DQ_34
DDR_A_DQ_35
DDR_A_DQ_36
DDR_A_DQ_37
DDR_A_DQ_38
DDR_A_DQ_39

DDR_A_DQS_5

DDR_A_DQSB_5

DDR_A_DM_5
DDR_A_DQ_40

DDR_A_DQ_41
DDR_A_DQ_42
DDR_A_DQ_43
DDR_A_DQ_44
DDR_A_DQ_45
DDR_A_DQ_46
DDR_A_DQ_47

DDR_A_DQS_6

DDR_A_DQSB_6

DDR_A_DM_6
DDR_A_DQ_48

DDR_A_DQ_49
DDR_A_DQ_50
DDR_A_DQ_51
DDR_A_DQ_52
DDR_A_DQ_53
DDR_A_DQ_54
DDR_A_DQ_55

DDR_A_DQS_7

DDR_A_DQSB_7

DDR_A_DM_7
DDR_A_DQ_56

DDR_A_DQ_57
DDR_A_DQ_58
DDR_A_DQ_59
DDR_A_DQ_60
DDR_A_DQ_61
DDR_A_DQ_62
DDR_A_DQ_63

BC5
BD4
BC3

BC2
BD3
BD7
BB7
BB2
BA3
BE6
BD6

BB9
BC9
BD9

BB8
AY8
BD11
BB11
BC7
BE8
BD10
AY11

BD15
BB15
BD14

BB14
BC14
BC16
BB16
BC11
BE12
BA15
BD16

AR22
AT22
AV22

AW21
AY22
AV24
AY24
AU21
AT21
AR24
AU24

AH43
AH42
AK42

AL41
AK43
AG42
AG44
AL42
AK44
AH44
AG41

AD43
AE42
AE45

AF43
AF42
AC44
AC42
AF40
AF44
AD44
AC41

Y43
Y42
AA45

AB43
AA42
W42
W41
AB42
AB44
Y44
Y40

T44
T43
T42

V42
U45
R40
P44
V44
V43
R41
R44

M_A_DQS0
M_A_DQS#0
M_A_DM0

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7

M_A_DQS1
M_A_DQS#1
M_A_DM1

M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15

M_A_DQS2
M_A_DQS#2
M_A_DM2

M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23

M_A_DQS3
M_A_DQS#3
M_A_DM3

M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31

M_A_DQS4
M_A_DQS#4
M_A_DM4

M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39

M_A_DQS5
M_A_DQS#5
M_A_DM5

M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47

M_A_DQS6
M_A_DQS#6
M_A_DM6

M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55

M_A_DQS7
M_A_DQS#7
M_A_DM7

M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8

M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_DQ[0..7] 15

M_A_DQ[8..15] 15

M_A_DQ[16..23] 15

M_A_DQ[24..31] 15

M_A_DQ[32..39] 15

M_A_DQ[40..47] 15

M_A_DQ[48..55] 15

M_A_DQ[56..63] 15

M_A_DM[0..7] 15

M_A_DQS[0..7] 15

M_A_DQS#[0..7] 15

V_SM

R429 249

R429 249

R427 80.6

R427 80.6

1%

1%

R37

R37
1K

1K

0402

0402
I

I
1%

1%

0402I 1%

0402I 1%

0402I

0402I

R38

R38
1K

1K

0402

0402
1

1

%

%

I

I

MCH_DDR_SPD

MCH_DDR_RPD

M_DDR3_DRAMRST#15

H_DRAMPWRGD11

DDR_VREF

C21

C21

0.1U

0.1U

0402

0402
I

I
X7R

X7R
10V

10V

M_B_A[0..14]15

M_B_WE#15
M_B_CAS#15
M_B_RAS#15

M_B_BS#015

M_B_BS#115

M_B_BS#215

M_SB_CS#015
M_SB_CS#115

M_SB_CKE015
M_SB_CKE115

M_SB_ODT015
M_SB_ODT115

M_SB0_CK015
M_SB0_CK#015

M_SB0_CK215
M_SB0_CK#215

M_SA_CS#115
M_A_A015
M_A_WE#15

T6T6

T131T131
T127T127
T112T112
T102T102

C22

C22
1000P

1000P

0402

0402
I

I
X7R

X7R
50V

50V

T111T111
T14T14

T18T18
T19T19

T108T108

T125T125
T119T119

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14

M_B_WE#
M_B_CAS#
M_B_RAS#

M_B_BS#0
M_B_BS#1
M_B_BS#2

M_SB_CS#0
M_SB_CS#1
M_SB_CS#2
M_SB_CS#3

M_SB_CKE0
M_SB_CKE1
M_SB_CKE2
M_SB_CKE3

M_SB_ODT0
M_SB_ODT1
M_SB_ODT2

M_SB0_CK0
M_SB0_CK#0

M_SB0_CK2
M_SB0_CK#2

M_SB1_CK4
M_SB1_CK#4

M_SA_CS#1
M_A_A0
M_A_WE#
M_SB_ODT3
H_DRAMPWRGD
M_DDR3_DRAMRST#

TP_MCH_AN29
TP_MCH_AN30
TP_MCH_AJ33
TP_MCH_AK33

MCH_DDR_RPD
MCH_DDR_RPU
MCH_DDR_SPD
MCH_DDR_SPU

R433 80.6

R433 80.6

C357

C357
1U

1U

0402

0402
I

I
X7R

X7R

6.3V

6.3V

BD24
BB23
BB24
BD23
BB22
BD22
BC22
BC20
BB20
BD20
BC26
BD19
BB19
BE38
BA19

BD36
BC37
BD35

BD26
BB26
BD18

BB35
BD39
BB37
BD40

BC18
AY20
BE17
BB18

BD37
BC39
BB38
BD42

AY33

AW33

AV31
AW31
AW35

AY35

AT31

AU31

AP31

AP30
AW37

AV35

AR43

BB40

AT44

AV40

AR6

BC24

AN29

AN30

AJ33

AK33

BB44

AY42

BA43

BC43

BC44

0402I 1%

0402I 1%

EAGLELAKE_DDR3

SYM_REV = 1.5GC

SYM_REV = 1.5GC

DDR_B_MA_0
DDR_B_MA_1
DDR_B_MA_2
DDR_B_MA_3
DDR_B_MA_4
DDR_B_MA_5
DDR_B_MA_6
DDR_B_MA_7
DDR_B_MA_8
DDR_B_MA_9
DDR_B_MA_10
DDR_B_MA_11
DDR_B_MA_12
DDR_B_MA_13
DDR_B_MA_14

DDR_B_WEB
DDR_B_CASB
DDR_B_RASB

DDR_B_BS_0
DDR_B_BS_1
DDR_B_BS_2

DDR_B_CSB_0
DDR_B_CSB_1
DDR_B_CSB_2
DDR_B_CSB_3

DDR_B_CKE_0
DDR_B_CKE_1
DDR_B_CKE_2
DDR_B_CKE_3

DDR_B_ODT_0
DDR_B_ODT_1
DDR_B_ODT_2
DDR_B_ODT_3

DDR_B_CK_0
DDR_B_CKB_0
DDR_B_CK_1
DDR_B_CKB_1
DDR_B_CK_2
DDR_B_CKB_2
DDR_B_CK_3
DDR_B_CKB_3
DDR_B_CK_4
DDR_B_CKB_4
DDR_B_CK_5
DDR_B_CKB_5

DDR3_A_CSB1
DDR3_A_MA0
DDR3_A_WEB
DDR3_B_ODT3
DDR3_DRAM_PWROK
DDR3_DRAMRSTB

RSVD_01
RSVD_02
RSVD_03
RSVD_04

DDR_Channel_B

DDR_Channel_B

DDR_VREF
DDR_RPD

DDR_RPU
DDR_SPD
DDR_SPU

E

E

AGLELAKE_FCBGA1254

AGLELAKE_FCBGA1254

Critical

Critical
I

I

4 OF 9

4 OF 9

DDR_B_DQS_0

DDR_B_DQSB_0

DDR_B_DM_0
DDR_B_DQ_0

DDR_B_DQ_1
DDR_B_DQ_2
DDR_B_DQ_3
DDR_B_DQ_4
DDR_B_DQ_5
DDR_B_DQ_6
DDR_B_DQ_7

DDR_B_DQS_1

DDR_B_DQSB_1

DDR_B_DM_1
DDR_B_DQ_8

DDR_B_DQ_9
DDR_B_DQ_10
DDR_B_DQ_11
DDR_B_DQ_12
DDR_B_DQ_13
DDR_B_DQ_14
DDR_B_DQ_15

DDR_B_DQS_2

DDR_B_DQSB_2

DDR_B_DM_2
DDR_B_DQ_16

DDR_B_DQ_17
DDR_B_DQ_18
DDR_B_DQ_19
DDR_B_DQ_20
DDR_B_DQ_21
DDR_B_DQ_22
DDR_B_DQ_23

DDR_B_DQS_3

DDR_B_DQSB_3

DDR_B_DM_3
DDR_B_DQ_24

DDR_B_DQ_25
DDR_B_DQ_26
DDR_B_DQ_27
DDR_B_DQ_28
DDR_B_DQ_29
DDR_B_DQ_30
DDR_B_DQ_31

DDR_B_DQS_4

DDR_B_DQSB_4

DDR_B_DM_4
DDR_B_DQ_32

DDR_B_DQ_33
DDR_B_DQ_34
DDR_B_DQ_35
DDR_B_DQ_36
DDR_B_DQ_37
DDR_B_DQ_38
DDR_B_DQ_39

DDR_B_DQS_5

DDR_B_DQSB_5

DDR_B_DM_5
DDR_B_DQ_40

DDR_B_DQ_41
DDR_B_DQ_42
DDR_B_DQ_43
DDR_B_DQ_44
DDR_B_DQ_45
DDR_B_DQ_46
DDR_B_DQ_47

DDR_B_DQS_6

DDR_B_DQSB_6

DDR_B_DM_6
DDR_B_DQ_48

DDR_B_DQ_49
DDR_B_DQ_50
DDR_B_DQ_51
DDR_B_DQ_52
DDR_B_DQ_53
DDR_B_DQ_54
DDR_B_DQ_55

DDR_B_DQS_7

DDR_B_DQSB_7

DDR_B_DM_7
DDR_B_DQ_56

DDR_B_DQ_57
DDR_B_DQ_58
DDR_B_DQ_59
DDR_B_DQ_60
DDR_B_DQ_61
DDR_B_DQ_62
DDR_B_DQ_63

R434 80.6

R434 80.6

V_SMV_SM

C443

C443

0.01U

0.01U

0402

0402
I

I
X7R

X7R
25V

25V

M_B_DQS#0

AW9

M_B_DM0

AY6

M_B_DQ0

AV7

M_B_DQ1

AW4

M_B_DQ2

BA9

M_B_DQ3

AU11

M_B_DQ4

AU7

M_B_DQ5

AU8

M_B_DQ6

AW7

M_B_DQ7

AY9

M_B_DQS1

AT15

M_B_DQS#1

AU15

M_B_DM1

AR15

M_B_DQ8

AY13

M_B_DQ9

AP15

M_B_DQ10

AW15

M_B_DQ11

AT16

M_B_DQ12

AU13

M_B_DQ13

AW13

M_B_DQ14

AP16

M_B_DQ15

AU16

M_B_DQS2

AR20

M_B_DQS#2

AR17

M_B_DM2

AU17

M_B_DQ16

AY17

M_B_DQ17

AV17

M_B_DQ18

AR21

M_B_DQ19

AV20

M_B_DQ20

AP17

M_B_DQ21

AW16

M_B_DQ22

AT20

M_B_DQ23

AN20

M_B_DQS3

AU26

M_B_DQS#3

AT26

M_B_DM3

AV25

M_B_DQ24

AT25

M_B_DQ25

AV26

M_B_DQ26

AU29

M_B_DQ27

AV29

M_B_DQ28

AW25

M_B_DQ29

AR25

M_B_DQ30

AP26

M_B_DQ31

AR29

M_B_DQS4

AR38

M_B_DQS#4

AR37

M_B_DM4

AU39

M_B_DQ32

AR36

M_B_DQ33

AU38

M_B_DQ34

AN35

M_B_DQ35

AN37

M_B_DQ36

AV39

M_B_DQ37

AW39

M_B_DQ38

AU40

M_B_DQ39

AU41

M_B_DQS5

AK34

M_B_DQS#5

AL34

M_B_DM5

AL37

M_B_DQ40

AL35

M_B_DQ41

AL36

M_B_DQ42

AK36

M_B_DQ43

AJ34

M_B_DQ44

AN39

M_B_DQ45

AN40

M_B_DQ46

AK37

M_B_DQ47

AL39

M_B_DQS6

AF37

M_B_DQS#6

AF36

M_B_DM6

AJ35

M_B_DQ48

AJ38

M_B_DQ49

AJ37

M_B_DQ50

AF38

M_B_DQ51

AE37

M_B_DQ52

AK40

M_B_DQ53

AJ40

M_B_DQ54

AF34

M_B_DQ55

AE35

M_B_DQS7

AB35

M_B_DQS#7

AD35

M_B_DM7

AD37

M_B_DQ56

AD40

M_B_DQ57

AD38

M_B_DQ58

AB40

M_B_DQ59

AA39

M_B_DQ60

AE36

M_B_DQ61

AE39

M_B_DQ62

AB37

M_B_DQ63

AB38

MCH_DDR_RPUMCH_DDR_SPU

0402I 1%

0402I 1%

M_B_DQS0

AW8

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8

M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_DQ[0..7] 15

M_B_DQ[8..15] 15

M_B_DQ[16..23] 15

M_B_DQ[24..31] 15

M_B_DQ[32..39] 15

M_B_DQ[40..47] 15

M_B_DQ[48..55] 15

M_B_DQ[56..63] 15

M_B_DM[0..7] 15

M_B_DQS[0..7] 15

M_B_DQS#[0..7] 15

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

NB (3/5)- DDRIII

NB (3/5)- DDRIII

NB (3/5)- DDRIII

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

1

ZN5

ZN5

ZN5

X4

X4

8 40Friday, March 05, 2010

8 40Friday, March 05, 2010

8 40Friday, March 05, 2010

X4

5

4

3

2

1

Close to GMCH

Close to GMCH

Note

ZN5

ZN5

ZN5

9 40Friday, March 05, 2010

9 40Friday, March 05, 2010

9 40Friday, March 05, 2010

09

X4

X4

X4

V_SM

C49

C49

C458

C458

2.2U

2.2U

2.2U

2.2U

0603

0603

0603

0603

I

I

I

I

X5R

X5R

X5R

X5R

6.3V

6.3V

6.3V

6.3V

C475

C475
22U

22U

0805

0805
I

I
X5R

X5R

6.3V

6.3V

C422

C439

C439

2.2U

2.2U

0603

0603
I

I

5R

5R

X

X

6.3V

6.3V

S0

S3

S4/S5

O

O
O
O
O
O XX
O X X
O
O
O
O
O
O
O

O X X

O

X
X

O

X

X

X

X

X

X
X

X
X

X

X

X

X

X

X

X

X

X

XXO

XXXXO

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

NB (4/5)- Power

NB (4/5)- Power

NB (4/5)- Power

Date: Sheet of

Date: Sheet of

Date: Sheet of

C422

C397

C397

0.1U

0.1U

1U

1U

0402

0402

0603

0603

I

I

I

I

7R

7R

7R

7R

X

X

X

X

10V

10V

10V

10V

Voltage

GMCH_CORE

GMCH_CORE

GMCH_CORE

I(max)

1963mA1.5VSUS
288mA

1.5VSUS
3082mA

VCC1.5

6mA
914mA

VCC1.2VTT_FSB

17984mA
4666mA

VCC3

14mA

VCC3

74mA

VCC1.5

0mA

VCC1.1

20mA

VCC1.1

X
59mA

VCC1.1
VCC1.1

59mA

VCC1.1

31mA

VCC1.1

X

VCC1.1

83mA

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

1

SDVO, PCIE, DMI
SDVO, PCIE Analog

AA32
AA33
AB32
AB33
AD32
AD33
AE32
AE33
AF32
AJ32
AK31
AL30
AM15
AM16
AM17
AM20
AM21
AM22
AM24
AM25
AM26
AM29
AP1
AP2
Y32
Y33
Y31
AA31
AB31
AC31
AD31
AE31
AF31
AG30
AG31
AJ30
AJ31
AK16
AK17
AK19
AK20
AK21
AK22
AK23
AK24
AK25
AK26
AK27
AK29
AK30
AL1
AL10
AL11
AL12
AL14
AL15
AL16
AL17
AL19
AL2
AL20
AL21
AL22
AL23
AL24
AL25
AL26
AL27
AL29
AL4
AL5
AL6
AL7
AL8
AL9
AM2
AM3
AM4
AJ15
AK14
AJ27
AJ29

AK32
AL31
AL32
AM31

AM30

R505 40.2

R505 40.2

R697

R697

39.2

39.2

0603

0603
I

I
1%

1%

3

V_1P1_CL_MCH

0603I 1%

0603I 1%

C717

C717
1U

1U

0603

0603
I

I
X7R

X7R
10V

10V

C385

C385
10U

10U

0805

0805
I

I

5R

5R

X

X

6.3V

6.3V

C384

C384

0.1U

0.1U

0402

0402
I

I

7R

7R

X

X
10V

10V

U3_AM30

C382

C382

0.1U

0.1U

0402

0402
10V

10V
X7R

X7R
I

I

Close to each pins

+1.5VSUS_SM_CLK

L47

L47

PBY160808T-601Y-N

PBY160808T-601Y-N

1A

1A

00 ohm

00 ohm

6

6
0603

0603
I

I

C420

2.2U

2.2U

2.2U

2.2U

0603

0603

0603

0603

I

I

I

I

X5R

X5R

X5R

X5R

6.3V

6.3V

6.3V

6.3V

C386

C386
10U

10U

0805

0805
I

I

5R

5R

X

X

6.3V

6.3V

V_1P1_CL_MCH

C421

C421

0.1U

0.1U

0402

0402
I

I
X7R

X7R
10V

10V

V_FSB_VTT

C415

C415
10U

10U

0805

0805
I

I

5R

5R

X

X

6.3V

6.3V

SKU

GMCH_CORE

NB Power Status and max current table

POWER PLANE

L23

L23

1UH

1UH

500mA

500mA

518

518

2

2
I

I
20%

20%

0.065 ohm max

0.065 ohm max

VCC3

V_SM

V_1P1_CL_MCH

C399

C399
22U

22U

0805

0805

6.3V

6.3V
X5R

X5R

I

I

L25

L25

0.1UH

0.1UH

250mA

250mA
0805

0805
I

I
10%

10%

VCC_SM
VCC_SMCLK
VCC_EXP
VCCA_EXP

VCC
VCC_CL
VCC3_3
VCCA_DAC
VCCDQ_CRT
VCCAPLL_EXP
VCCDPLL_EXP
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCD_HPLL
VCCA_MPLL

2

2.2U

2.2U

0603

0603
I

I
X5R

X5R

6.3V

6.3V

C428

C428

0.22U

0.22U

0402

0402
I

I
X5R

X5R

6.3V

6.3V

C42

C42

2.2U

2.2U

0603

0603
I

I
X5R

X5R

6.3V

6.3V

C390

C390

0.22U

0.22U

0402

0402
I

I
X5R

X5R

6.3V

6.3V

C427

C427

C438

C438

2.2U

2.2U

2.2U

2.2U

0603

0603

0603

0603

I

I

I

I

5R

5R

5R

5R

X

X

X

X

6.3V

6.3V

6.3V

6.3V

G45 P43

1.125V 1.1V

C50

C50

C41

C41

C420

U3G

R460EV@0

NI5% R460EV@0

NI5%

R445

R445
1

1

0402

0402
I

I
1%

1%

U3G

EAGLELAKE_DDR3

EAGLELAKE_DDR3

YM_REV = 1.5GC

YM_REV = 1.5GC

S

S

VTT_FSB_36
VTT_FSB_35
VTT_FSB_34
VTT_FSB_32
VTT_FSB_31
VTT_FSB_30
VTT_FSB_29
VTT_FSB_28
VTT_FSB_27
VTT_FSB_26
VTT_FSB_25
VTT_FSB_24
VTT_FSB_23
VTT_FSB_22
VTT_FSB_21
VTT_FSB_20
VTT_FSB_19
VTT_FSB_18
VTT_FSB_17

Host Bus PowerSystem Memory Power

Host Bus PowerSystem Memory Power

VTT_FSB_16
VTT_FSB_15
VTT_FSB_14
VTT_FSB_13
VTT_FSB_12
VTT_FSB_11
VTT_FSB_10
VTT_FSB_09
VTT_FSB_08
VTT_FSB_07
VTT_FSB_06
VTT_FSB_05
VTT_FSB_04
VTT_FSB_03
VTT_FSB_02
VTT_FSB_01

POWER

POWER

VCC_SM_15
VCC_SM_14
VCC_SM_13
VCC_SM_12
VCC_SM_11
VCC_SM_10
VCC_SM_09
VCC_SM_08
VCC_SM_07
VCC_SM_06
VCC_SM_05
VCC_SM_04
VCC_SM_03
VCC_SM_02
VCC_SM_01

VCCA_DAC_01
VCCA_DAC_02
VCCA_EXP

VCCDQ_CRT
VSS_369

EAGLELAKE_FCBGA1254

EAGLELAKE_FCBGA1254

Critical

Critical
I

I

VCCA_DAC L47_2
VCCA_EXP

System Memory

System Memory
CLK Power

CLK Power

7 OF 9

7 OF 9

R464 1 0402

R464 1 0402

I 1%

I 1%

R495 1 0402

R495 1 0402

I 1%

I 1%

Controller Link Aux Power

Controller Link Aux Power

VCC_SMCLK_04
VCC_SMCLK_03
VCC_SMCLK_02
VCC_SMCLK_01

VCCCML_DDR

BE36
BE31
BE27
BE23
BD38
BD34
BD29
BD25
BD21
BB39
BA41
AY40
AV44
AT45
AP44

R22
R24
R23
R21
R20

P24
P22
P21

P20
N22
N21
N20
M22
M21

L22

L21

K22

K21

J22

J21
H22
H21
G22
G21

F22

F21

E23
D24
D23
D22
C26
C24

B26

B25

A25

D19

B19

A17

B20

B17

VCC_CL_24
VCC_CL_23
VCC_CL_22
VCC_CL_21
VCC_CL_20
VCC_CL_19
VCC_CL_18
VCC_CL_17
VCC_CL_16
VCC_CL_15
VCC_CL_14
VCC_CL_13
VCC_CL_12
VCC_CL_11
VCC_CL_10
VCC_CL_09
VCC_CL_08
VCC_CL_07
VCC_CL_06
VCC_CL_05
VCC_CL_04
VCC_CL_03
VCC_CL_28
VCC_CL_27
VCC_CL_26
VCC_CL_25
VCC_CL_80
VCC_CL_79
VCC_CL_78
VCC_CL_77
VCC_CL_76
VCC_CL_75
VCC_CL_74
VCC_CL_73
VCC_CL_72
VCC_CL_71
VCC_CL_70
VCC_CL_69
VCC_CL_68
VCC_CL_67
VCC_CL_66
VCC_CL_65
VCC_CL_64
VCC_CL_63
VCC_CL_62
VCC_CL_61
VCC_CL_60
VCC_CL_59
VCC_CL_58
VCC_CL_57
VCC_CL_56
VCC_CL_48
VCC_CL_47
VCC_CL_46
VCC_CL_45
VCC_CL_44
VCC_CL_43
VCC_CL_42
VCC_CL_41
VCC_CL_55
VCC_CL_40
VCC_CL_39
VCC_CL_38
VCC_CL_37
VCC_CL_36
VCC_CL_35
VCC_CL_34
VCC_CL_33
VCC_CL_32
VCC_CL_54
VCC_CL_53
VCC_CL_52
VCC_CL_51
VCC_CL_50
VCC_CL_49
VCC_CL_31
VCC_CL_30
VCC_CL_29
VCC_CL_02
VCC_CL_01
VCC_CL_82
VCC_CL_81

R505_1

V_1P1_CORE

C463

C463

C366

C366

22U

22U

22U

22U

0805

0805

0805

0805

6.3V

6.3V

6.3V

6.3V

X5R

X5R

X5R

X5R

I

I

I

I

C453

C453

C398

22U

22U

0805

0805
I

I
X5R

X5R

6.3V

6.3V

5R

5R

C417

C417
10U

10U

0805

0805
I

I
X5R

X5R

6.3V

6.3V

C446

C446

0.1U

0.1U

0402

0402
I

I
X7R

X7R
10V

10V

L27

L27

10UH

10UH

450mA

450mA

210

210

1

1
I

I
10%

10%

0.39 ohm max

0.39 ohm max

L21

L21

1UH

1UH

60mA

60mA

805

805

0

0
I

I
30%

30%

0.1 ohm typ

0.1 ohm typ

L22

L22

1UH

1UH

60mA

60mA
0805

0805
I

I
30%

30%

0.1 ohm typ

0.1 ohm typ

C379

C379
10U

10U

0805

0805

6.3V

6.3V
X

X
I

I

C454

C454
10U

10U

0805

0805

6.3V

6.3V
X5R

X5R
I

I

C429

C429

0.1U

0.1U

0402

0402
10V

10V
X7R

X7R
I

I

R4380

R4380

0402I5%

0402I5%

5R

5R

C451

C451
10U

10U

0805

0805
I

I
X5R

X5R

6.3V

6.3V

C404

C404

0.1U

0.1U

0402

0402
I

I
X7R

X7R
10V

10V

+

+

L21_2

L22_2

C398
22U

22U

0805

0805
I

I
X5R

X5R

6.3V

6.3V

C481

C481
220U

220U

18 mohm

18 mohm
7343

7343
I

I
20%

20%

6.3V

6.3V

R47800402 NI 5% R47800402 NI 5%
R45900402 I 5% R45900402 I 5%

VCCDPLL_EXP
VCCD_HPLL
VCCAPLL_EXP

VCCA_HPLL

VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB

R428 0402

I 1%

I 1%

R431

R431

R432 1 0402

R432 1 0402

I 1%

I 1%

R435

R435

D D

C381

C381
10U

10U

0805

0805

6.3V

6.3V
X

X
I

I

C400

C400
10U

10U

0805

0805

6.3V

6.3V
X5R

X5R
I

I

C434

C434

0.1U

0.1U

0402

0402
10V

10V
X7R

X7R

C C

I

I

VCCDPLL_EXP

V_1P1_CL_MCH

VCCAPLL_EXP

VCCA_HPLL

VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB

B B

V_1P5_ICH

VCC3

V_1P1_CORE

V_1P1_CORE

A A

U3_AR2
U3_E19

R476

R476
0

0

0402

0402
I

I

%

%

5

5

VCCA_DPLLA

1R428 0402

1

1

1

1%

1%

1

1

5

U3F

U3F

AA19

VCC_01

AA21

VCC_02

AA23

VCC_03

AA25

VCC_04

AA27

VCC_05

AA29

VCC_06

AA30

VCC_07

AB20

VCC_08

AB22

VCC_09

AB24

VCC_10

AB26

VCC_11

AB29

VCC_12

AB30

VCC_13

AC16

VCC_14

AC17

VCC_15

AC19

VCC_16

AC21

VCC_17

AC23

VCC_18

AC25

VCC_19

AC27

VCC_20

AC29

VCC_21

AD16

VCC_22

AD17

VCC_23

AD20

VCC_24

AD22

VCC_25

AD24

VCC_26

AD26

VCC_27

AD29

VCC_28

AE16

VCC_29

AE17

VCC_30

AE19

VCC_31

AE21

VCC_32

AE23

VCC_33

AE25

VCC_34

AE27

VCC_35

AE29

VCC_36

AF16

VCC_37

AF17

VCC_38

AF19

VCC_39

AF20

VCC_40

AF21

VCC_41

AF22

VCC_42

AF23

VCC_43

AF24

VCC_44

AF25

VCC_45

AF26

VCC_46

AF27

VCC_47

AF29

VCC_48

AG16

VCC_49

AG17

VCC_50

AG20

VCC_51

AG22

VCC_52

AG24

VCC_53

AG26

VCC_54

AG29

VCC_55

AJ16

VCC_56

AJ17

VCC_57

AJ19

VCC_58

AJ21

VCC_59

B12

VCCDPLL_EXP

U33

VCCD_HPLL

B16

VCCAPLL_EXP

B22

VCCA_HPLL

A21

VCCA_MPLL

D20

VCCA_DPLLA

C20

VCCA_DPLLB

AR2

VCC3_HDA

E19

VCC3_3

E

E

AGLELAKE_FCBGA1254

AGLELAKE_FCBGA1254

C

C

ritical

ritical

I

I

C476

C476

0.1U

0.1U

0402

0402
I

I
X7R

X7R
10V

10V

0402I

0402I

0402I 1%

0402I 1%

V_1P1_CORE

VCCDPLL_EXP

C356

C356

0.1U

0.1U

0603

0603
I

I
X7R

X7R
16V

16V

VCCAPLL_EXP

C367

C367

0.1U

0.1U

0603

0603
I

I
X7R

X7R
16V

16V

EAGLELAKE_DDR3

EAGLELAKE_DDR3

SYM_REV = 1.5GC

SYM_REV = 1.5GC

Core Power

Core Power

POWER

POWER

PCIE and DMI Power

PCIE and DMI Power

6 OF 9

6 OF 9

L28

L28

10UH

10UH

450mA

450mA
1210

1210
I

I
10%

10%

0.39 ohm max

0.39 ohm max

C355

C355
10U

10U

0805

0805
I

I
X5R

X5R

6.3V

6.3V

C377

C377
10U

10U

0805

0805
I

I
X5R

X5R

6.3V

6.3V

VCC_76
VCC_75
VCC_74
VCC_73
VCC_72
VCC_71
VCC_70
VCC_69
VCC_66
VCC_65
VCC_64
VCC_63
VCC_62
VCC_61
VCC_60
VCC_85
VCC_84
VCC_83
VCC_82
VCC_81

Core Power

Core Power

VCC_80
VCC_79
VCC_78
VCC_77
VCC_97
VCC_96
VCC_91
VCC_90
VCC_89
VCC_88
VCC_87
VCC_86

VCC_EXP_43
VCC_EXP_44
VCC_EXP_45
VCC_EXP_39
VCC_EXP_40
VCC_EXP_31
VCC_EXP_32
VCC_EXP_33
VCC_EXP_41
VCC_EXP_42
VCC_EXP_26
VCC_EXP_27
VCC_EXP_28
VCC_EXP_29
VCC_EXP_30
VCC_EXP_17
VCC_EXP_18
VCC_EXP_23
VCC_EXP_24
VCC_EXP_25
VCC_EXP_21
VCC_EXP_22
VCC_EXP_14
VCC_EXP_15
VCC_EXP_16

VCC_EXP_2

VCC_EXP_1
VCC_EXP_34
VCC_EXP_35
VCC_EXP_36
VCC_EXP_37
VCC_EXP_38
VCC_EXP_10
VCC_EXP_11
VCC_EXP_12
VCC_EXP_13
VCC_EXP_06
VCC_EXP_07
VCC_EXP_08
VCC_EXP_09
VCC_EXP_19
VCC_EXP_20

VCC_EXP_5

VCC_EXP_4

VCC_EXP_3

VCCAVRM_EXP

VCC_94
VCC_92
VCC_93

+

+

C477

C477
220U

220U

18 mohm

18 mohm

343

343

7

7
I

I
20%

20%

6.3V

6.3V

V_1P1_CL_MCH

U23
U22
U21
T29
T27
T26
T25
T24
T21
R29
R27
R26
R25
AJ25
AJ23
W25
W23
W21
W19
U29
U27
U26
U25
U24
T23
T22
Y26
Y24
Y22
Y20
W29
W27

L3
H4
F9
AF3
AC4
AB14
AA15
AA14
V4
P3
AE15
AE14
AD15
AD14
AC15
AJ11
AJ10
AG15
AF15
AF14
AJ7
AJ6
AJ14
AJ13
AJ12
AJ2
AJ1
Y15
Y14
W15
U15
U14
AK9
AK8
AK7
AK6
AK13
AK12
AK11
AK10
AJ9
AJ8
AK4
AK3
AK2

AG2
W31
Y30
Y29

VCCA_DPLLB

L24

L24

270NH

270NH

50mA

50mA
0

0

603

603

I

I
10%

10%

0.8 ohm max

0.8 ohm max

V_1P1_CORE

C414

C414
1U

1U

0603

0603
10V

10V
X7R

X7R
I

I

C447

C447
1U

1U

0603

0603
10V

10V
X7R

X7R
I

I

C425

C425
1U

1U

0603

0603
10V

10V

7R

7R

X

X
I

I

V_1P1_CORE

V_1P1_CORE

C472

C472

2.2U

2.2U

0603

0603
I

I
X5R

X5R

6.3V

6.3V

C468

C468

0.1U

0.1U

0402

0402
NI

NI
X7R

X7R
10V

10V

VCCAVRM_EXP: 1.125V for G45/G43

V_1P1_CL_MCH

U3_AG2

C478

C478

4.7U

4.7U

0603

0603

6.3V

6.3V
X5R

X5R

V_1P5_ICH

PBY160808T-601Y-N

PBY160808T-601Y-N

1A

1A

00 ohm

00 ohm

6

6
0603

0603
I

I

C471

C471

0.1U

0.1U

0402

0402
I

I

7R

7R

X

X
10V

10V

VCCA_HPLL

C392

C392

2.2U

2.2U

0603

0603
I

I
X5R

X5R

6.3V

6.3V

C413

C413
1U

1U

0603

0603
10V

10V
X7R

X7R
I

I

C448

C448
1U

1U

0603

0603
I

I

7R

7R

X

X
10V

10V

C426

C426
1U

1U

0603

0603
10V

10V
X7R

X7R
I

I

JS8 DFS_0805

JS8 DFS_0805

V_1P1_CORE_EXP

C473

C473

2.2U

2.2U

0603

0603
I

I
X5R

X5R

6.3V

6.3V

C470

C470

C465

C465

0.1U

0.1U

0.1U

0.1U

0402

0402

0402

0402

NI

NI

NI

NI

X7R

X7R

X7R

X7R

10V

10V

10V

10V

R4790

R4790

0402 I5%

0402 I5%

I

I

L46

L46

L46_2

V_1P1_CL_MCH

C393

C393

0.1U

0.1U

0402

0402
I

I
X7R

X7R
10V

10V

4

NOBOM

NOBOM

L26

L26

2.2UH

2.2UH

150mA

150mA
0805

0805
I

I
30%

30%

0.364 ohm max

0.364 ohm max

V_1P1_CORE

0402

0402

R458
C449

C449
1U

1U

0603

0603
I

I
X7R

X7R
10V

10V

C474

C474

2.2U

2.2U

0603

0603
I

I
X5R

X5R

6.3V

6.3V

VCCA_DAC
VCCA_EXP

1R458

1

0402I 1%

0402I 1%

R446

R446
1

1

0402

0402
I

I
1%

1%

C387_1

V_FSB_VTT

V_SM

U3_B20

VCCA_MPLL

C387

C387
10U

10U

0805

0805
I

I
X

X

5R

5R

6.3V

6.3V

5

4

3

2

1

10

A12

AJ22

BD43

AJ24

BA5

A15

AJ26

A19

BB21

BB25

A27

AJ36

AJ39

BB28

A31

AJ44

BB6

A36

BD12

A40

AJ45

AK35

BD17

AK38

BD8

AA1

BE10

AA11

AK39

BE15

AL38

AA12

AA13

BE19

AL44

AA16

AL45

BE21

BE25

AN21

AA17

BE29

AA20

AN22

AA22

AN24

BE34

AA24

AN25

BE40

AN26

AA26

C16

AA34

AN33

AN36

AA38

AN38

D11

AA40

AA44

AN7

D16

AP20

AA8

D21

D25

AP21

AB11

AP22

AB12

D26

D39

AP24

AB16

AB17

AP25

AP29

AB19

AB21

AP45

AB23

AR10

E31

AR11

E41

AB25

AR13

AB27

AB34

AR16

F16

AR26

AB36

F30

AR3

AB39

AR31

AB4

F42

AR33

AB6

AR35

F45

AB7

AB8

G11

AR39

AR8

AC20

G17

AC22

AR9

G24

AT1

G26

AC24

AC26

G29

AT11

AT13

AC45

AT17

G35

AC5

H1

U3H

D D

C C

B B

A A

VSS_001

VSS_091

VSS_371

VSS_092

VSS_181

VSS_002

VSS_093

VSS_003

VSS_182

VSS_183

VSS_004

VSS_094

VSS_095

VSS_184

VSS_005

VSS_096

VSS_185

VSS_006

VSS_186

VSS_007

VSS_097

VSS_098

VSS_008A8VSS_187

VSS_099

VSS_189

VSS_009

VSS_190

VSS_010

VSS_100

VSS_191

VSS_101

VSS_011

VSS_012

VSS_192

VSS_102

VSS_013

VSS_103

VSS_193

VSS_194

VSS_104

VSS_014

VSS_195

VSS_015

VSS_105

VSS_016

VSS_106

VSS_196

VSS_017

VSS_107

VSS_197

VSS_108

VSS_018

VSS_372

VSS_019

VSS_199C3VSS_109

VSS_110

VSS_020

VSS_200C5VSS_111

VSS_201

VSS_021

VSS_022

VSS_112

VSS_202

VSS_113

VSS_023

VSS_203

VSS_204

VSS_114

VSS_024

VSS_115

VSS_025

VSS_205

VSS_206

VSS_116

VSS_026

VSS_027

VSS_207D6VSS_117

VSS_118

VSS_028

VSS_208D7VSS_029

VSS_209E3VSS_119

VSS_030

VSS_120

VSS_210

VSS_121

VSS_211

VSS_031

VSS_212E5VSS_122

VSS_032

VSS_033

VSS_123

VSS_213

VSS_214F2VSS_124

VSS_034

VSS_215

VSS_125

VSS_035

VSS_126

VSS_036

VSS_216F4VSS_217

VSS_127

VSS_037

VSS_128

VSS_218

VSS_038

VSS_039

VSS_220

VSS_129

VSS_130

VSS_040

VSS_221

VSS_041

VSS_131

VSS_222

VSS_132

VSS_223

VSS_042

VSS_043

VSS_224

VSS_133

VSS_225G3VSS_134

VSS_044

VSS_135

GND

GND

EAGLELAKE_DDR3

EAGLELAKE_DDR3

VSS_228

VSS_137

VSS_048

VSS_138

VSS_229

VSS_049

VSS_230

VSS_139

VSS_231

VSS_140

VSS_050

VSS_051

VSS_232

VSS_141

VSS_233

VSS_142

VSS_052

VSS_143

VSS_053

VSS_234

VSS_054

VSS_235

VSS_144

VSS_236

VSS_055

VSS_145

VSS_146

VSS_237

VSS_056

VSS_057

VSS_238

VSS_147

VSS_058

VSS_148

VSS_239H7VSS_240H8VSS_149

VSS_059

VSS_150

VSS_241H9VSS_060

VSS_242J3VSS_061

VSS_151

VSS_152

VSS_243

VSS_062

VSS_063

VSS_153

VSS_244J4VSS_245J5VSS_064

VSS_154

VSS_065

VSS_246J8VSS_155

VSS_247J9VSS_156

VSS_066

VSS_067

VSS_248

VSS_157

VSS_158

VSS_249

VSS_068

VSS_159

VSS_069

VSS_250

VSS_160

VSS_070

VSS_251

VSS_071

VSS_161

VSS_252

VSS_253

VSS_072

VSS_162

VSS_073

VSS_163

VSS_254

VSS_074

VSS_164

VSS_255

VSS_165

VSS_256

VSS_075

VSS_076

VSS_166

VSS_257

VSS_258

VSS_077

VSS_167

VSS_168

VSS_078

VSS_318

VSS_319

VSS_169

VSS_079

VSS_170

VSS_320

VSS_080

VSS_321

VSS_171

VSS_081

VSS_172

VSS_082

VSS_322

VSS_323

VSS_083

VSS_173

VSS_084

VSS_174

VSS_324

VSS_325

VSS_175

VSS_085

VSS_326

VSS_086

VSS_176

VSS_087

VSS_177

VSS_327

VSS_178

VSS_088

VSS_328U8VSS_089

VSS_329W1VSS_179

VSS_090

VSS_330

VSS_180

VSS_219F8VSS_331

L10

L16

B34

U44

AH3

AH4

W16

W17

AJ20

BA23

U3I

U3I

EAGLELAKE_DDR3

EAGLELAKE_DDR3

YM_REV = 1.5GC

YM_REV = 1.5GC

S

S

N16

VSS_272

N13

VSS_271

F1

VSS_362

N11

VSS_270

C45

VSS_363

C1

VSS_364

M44

VSS_269

M25

VSS_268

BE43

VSS_356

M24

VSS_267

BE3

VSS_357

BD44

VSS_358

M1

VSS_266

BD2

VSS_359

L9

VSS_265

BC45

VSS_360

L8

VSS_264

BC1

VSS_361

L4

VSS_263

L39

VSS_262

B44

VSS_365

A6

VSS_367

L35

VSS_261

A43

VSS_366

L30

VSS_260

A3

VSS_368

L26

VSS_259

Y9

VSS_355

Y39

VSS_354

Y35

VSS_353

Y3

VSS_352

Y27

VSS_351

Y25

VSS_350

Y23

VSS_349

Y21

VSS_348

Y2

VSS_347

Y19

VSS_346

Y17

VSS_345

Y16

VSS_344

Y13

VSS_343

Y12

VSS_342

Y11

VSS_341

Y10

VSS_340

W5

VSS_339

W45

VSS_338

W44

VSS_337

W26

VSS_336

W24

VSS_335

EAGLELAKE_FCBGA1254

EAGLELAKE_FCBGA1254

Critical

Critical
I

I

5

AH2

GND

GND

9 OF 9

9 OF 9

AG5

U39

AG45

VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_332
VSS_333
VSS_334

NC_14
NC_15
NC_16
NC_17

U36

U17

U19

U20

AY45

AG27

N26
N29
N30
N33
N36
N38
N8
P16
P17
P25
P26
P31
R11
R12
R16
R17
R19
R2
R30
R38
R45
R5
R8
T10
T11
T12
T13
T16
T17
T19
T20
T3
T30
T31
T32
T33
T35
T38
T4
T40
T6
T7
T8
T9
U1
W2
W20
W22

AD30
AC30
AF30
AE30

AY25

AY30

AG23

AG25

AF7

U13

U16

AY15

AY16

AY21

AG19

AG21

B10

B21

B27

B29

L20

AF6

U11

U12

AY1

AF39

AW30

K45

AW3

AF33

AF35

AW24

AW26

4

K29

K33

AF11

AF12

AF13

AW20

AW22

K17

K20

K24

AE8

AF10

AW11

AW17

K11

K13

AV6

AV8

AV9

AE38

AE40

AE44

AV30

AE26

AV33

AV38

AE34

3

J37

AV2

AV16

AE20

AE22

AV21

AE24

AV13

AE11

AV15

AE12

AE13

H38

H44

AE1

AU6

AD6

AD9

AU9

AV11

H30

H31

H33

AU5

AD39

AD3

AU25

AU30

AD34

AD36

AU35

2

H16

H20

H25

AT35

AU20

AD25

AD27

AU22

H11

H13

H15

AT24

AT29

AD21

AD23

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

VSS_226

VSS_045

VSS_227

VSS_136

VSS_046

VSS_047

AT2

AD12

AD19

NB (5/5)- VSS

NB (5/5)- VSS

NB (5/5)- VSS

U3H
EAGLELAKE_FCBGA1254

EAGLELAKE_FCBGA1254

SYM_REF = 1.5GC

SYM_REF = 1.5GC
8 OF 9

8 OF 9
Critical

Critical
I

I

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

1

ZN5

ZN5

ZN5

X4

X4

10 40Friday, March 05, 2010

10 40Friday, March 05, 2010

10 40Friday, March 05, 2010

X4

5

RTC CRYSTAL

C582 15P

C588 15P

D D

50VC582 15P

50V

0402I COG

0402I COG

50VC588 15P

50V

0402I COG

0402I COG

23

Y5

Y5

32.768KHZ

32.768KHZ

Critical

Critical

4 1

I

I
10PPM

10PPM

R576

R576
10M

10M

0603

0603
5%

5%
I

I

CLK_32KX1

CLK_32KX2

RESET JUMP

VCCRTC

An RC delay circuit with a time delay in the range of
18 ms to 25 ms should be provided

R688 20K

R688 20K

0603 I5%

0603 I5%

VCCRTC

R542 20K

R542 20K

C C

VCCRTC

R221 1M 0402I 5%R221 1M 0402I 5%
R215 330K 0402I 5%R215 330K 0402I 5%
R220 330K 0402I 5%R220 330K 0402I 5%

3VSB

R224 10K 0402I 5%R224 10K 0402I 5%
R597 10K 0402NI 5%R597 10K 0402NI 5%

R244 2.2K 0402I 5%R244 2.2K 0402I 5%
R235 2.2K 0402I 5%R235 2.2K 0402I 5%

R598 10K 0402I 5%R598 10K 0402I 5%
R602 10K 0402I 5%R602 10K 0402I 5%
R595 10K 0402I 5%R595 10K 0402I 5%
R229 10K 0402I 5%R229 10K 0402I 5%
R218 10K 0402I 5%R218 10K 0402I 5%

B B

C649

C649
1U

1U

0402

0402
I

I
X5R

X5R

6.3V

6.3V

0603I 5%

0603I 5%

1
2

C559

C559
1U

1U

0402

0402
I

I
X5R

X5R

6.3V

6.3V

HOOD_SENSE#
ICH_INTVRMEN
ICH_LAN100SLP_EN

CTRL_GTLREF2
PLTRST#

SMBCLK_RESUME

SMBDATA_RESUME

SMB_CLK_ME
SMB_DATA_ME
SMB_ALERT#
ICH_RI#
SYS_RST#

SW50

SW50

CLEAR CMOS

CLEAR CMOS

I

I

G2

G2
SHORT_ PAD

SHORT_ PAD

NI

NI

1 2

SRTC_RST#

3
4
5

CLEAR_CMOS

D46

D46

D46_P

1N4148WS

1N4148WS

200mA

200mA
DSM

DSM
I

I
75V

75V

If Intel LAN is not used, LAN_RSTB pull down 10k.

GLAN_CLK21

LAN_RSTSYNC21

LAN_RXD021

VCC3

3VSB

LAN_RXD121
LAN_RXD221
LAN_TXD021
LAN_TXD121
LAN_TXD221

SMBCLK_RESUME15,19,26

SMBDATA_RESUME15,19,26

CTRL_GTLREF24

3VSB

HD Audio I/F(CODEC& iHDMI)

R639 33

HDA_SDOUT_R

HDA_SYNC_R

HDA_RST#_R

R639 33

R636 33

R636 33

5%

5%

R638 33

R638 33

0402I 5%

0402I 5%

0402I

0402I

0402I 5%

0402I 5%

ACZ_SDOUT_AUDIO 27

ACZ_SYNC_AUDIO 27

ACZ_RST#_AUDIO 27

South Bridge Strap Pin (1/3)

Pin Name

HDA_DOCK_EN/
GPIO33

A A

SATALED#

TP3

HDA_SDOUT

Strap description

Flash Descriptor Security
Override Strap

PCI Express Lane Reversal
(Lanes 1-4)

XOR Chain Entrance

XOR Chain Entrance /PCI Express*
Port Config 1 bit 1(Port 1-4)

5

Sampled

PWROK

PWROK

PWROK

PWROK

0 = The Flash Descriptor Security will be overridden.
1 = The security measures defined
in the Flash Descriptor will be in effect

Internal PU

HDA_SDOUT

ICH_TP3

0
0

1

4

ICH10

ICH10

LPC AUDIO

LPC AUDIO

LAN

LAN

RTC

RTC

SPISMB

SPISMB

4OF6 IC

4OF6 IC

R637

R637
0

0

0402

0402
I

I
5%

5%

C607_1

C607

C607
10P

10P

0402

0402
I

I

OG

OG

C

C
50V

50V

LAD019,22,26,29,30
LAD119,22,26,29,30
LAD219,22,26,29,30
LAD319,22,26,29,30

LDRQ#026

LFRAME#19,22,26,29,30

ACZ_SDIN027

14M_ICH3

R260 10K 0402I 5%R260 10K 0402I 5%
R288 10K 0402I 5%R288 10K 0402I 5%
R607 10K 0402I 5%R607 10K 0402I 5%
R289 10K 0402I 5%R289 10K 0402I 5%
R630 8.2K 0402I 5%R630 8.2K 0402I 5%
R563 8.2K 0402I 5%R563 8.2K 0402I 5%
R274 10K 0402I 5%R274 10K 0402I 5%
R622 10K 0402I 5%R622 10K 0402I 5%

R621 1K 0402I 5%R621 1K 0402I 5%
R264 3.3K 0402I 5%R264 3.3K 0402I 5%
R196 20K 0603NI 5%R196 20K 0603NI 5%

R601 20K 0402I 5%R601 20K 0402I 5%
R285 10K 0402I 5%R285 10K 0402I 5%
R234 10K 0402I 5%R234 10K 0402I 5%

R574 10K 0402I 5%R574 10K 0402I 5%
R620 4.7K 0402NI 5%R620 4.7K 0402NI 5%

LDRQ0/1# : Internal PU 20K

RISER_DET#
LAD0
LAD1
LAD2
LAD3
LDRQ#0
LFRAME#

HDA_BIT_CLK_R
HDA_RST#_R
ACZ_SDIN0
ACZ_SDIN1

T75T75

ACZ_SDIN2

T164T164

ACZ_SDIN3

T162T162

HDA_SDOUT_R
HDA_SYNC_R
14M_ICH

LAN_PWROK

CLK_32KX1
CLK_32KX2
CLEAR_CMOS
SRTC_RST#
SMB_ALERT#
SMBCLK_RESUME
SMBDATA_RESUME
CTRL_GTLREF2
SMB_CLK_ME
SMB_DATA_ME

SPI_MOSI
SPI_MISO
SPI_CS0#
SPI_CLK

FDT_OVRD#
BBR#
GP72
ICH_BM_BUSY
HOOD_SW_DET#_R
THERM#
RISER_DET#
LPC_SMI#

TPM_PP
HOOD_LOCK_DET

12

ICH_RSMRST#

AUTO_PSI_DISABLE
ICH_PWRBT#
WAKE#

H_DRAMPWRGD_R

TPM_PP

HDA_BIT_CLK_R

J3

LDRQ1B/GP23

K3

FWH0/LAD0

H1

FWH1/LAD1

M7

FWH2/LAD2

J1

FWH3/LAD3

L6

LDRQ0B

L5

FWH4/LFRAMEB

AH3

HDA_BIT_CLK

AJ1

HDA_RSTB

AK3

HDA_SDIN0

AH4

HDA_SDIN1

AH1

HDA_SDIN2

AJ3

HDA_SDIN3

AJ2

HDA_SDOUT

AK1

HDA_SYNC

M5

CLK14

F25

GLAN_CLK

E14

LAN_RSTSYNC

C21

LAN_RSTB

G15

LAN_RXD0

H14

LAN_RXD1

E13

LAN_RXD2

F15

LAN_TXD0

F14

LAN_TXD1

G14

LAN_TXD2

A21

RTCX1

B21

RTCX2

A25

RTCRSTB

H20

SRTCRSTB

C16

SMBALERTB/GP11/JTAGTDO

H16

SMBCLK

E16

SMBDATA

F18

LINKALERTB/GP60/JTAGRST

A15

SMLINK0

B15

SMLINK1

C26

SPI_MOSI

B26

SPI_MISO

E25

SPI_CS0B

G23

SPI_CLK

F23

SPI_CS1B

ICH10

ICH10

Critical

Critical
I

I

Disable TPM
WOL function don't supported

R632 33

R632 33

%

%

0402

5

0402

5

I

I

Configuration PU/PD

This strap should only be enabled in manufacturing
environments using an external pull-up resistor.

0
1
01
1

Description
RSVD
Enter XOR Chain

Normal opration(Default)
Set PCIE port config bit 1

4

ICH_TP3

HDA_SDOUT_R

R228 1K

R228 1K

R633 3.3K

R633 3.3K

3

U1LBU4D

U1LBU4D

REV = 0.72

REV = 0.72

GP0/BMBUSYB

DRAMPWROK/GP8

GP10/CPU_MISSING/JTAGTMS

GP14/JTAGTDI/QST_BMBUSYB

GP9/WOL_EN

GP12
GP13

STP_PCIB/GP15

DPRSLPVR/GP16

GP18
GP20

GP24/MEM_LED

STP_CPUB/GP25

S4_STATEB/GP26

GP27
GP28
GP32
GP33
GP34

SATACLKREQB/GP35

GP57/TPM_PP/JTAGTCK

SUS_STATB/LPCPD/GP61

MISC

MISC

GP56

CPUPWRGD
LAN100_SLP

THRMB

VRMPWRGD

MCH_SYNCB

PWRBTNB

SUSCLK/GP62

SYS_RESETB

PLTRSTB

WAKEB

INTRUDERB

PWROK

RSMRSTB

INTVRMEN

SPKR

SLP_S3B
SLP_S4B

SLP_S5B/GPIO63

SLP_MB

CK_PWRGD

GP72

DPRSTPB

DPSLPB

U19 ROM SOCKET
PROTO

BIT_CLK_AUDIO 27

0402NI 5%

0402NI 5%

+3V_HDA_IO_ICH

0402NI 5%

0402NI 5%

3

R282 0

5%R282 0

ICH_BM_BUSY

N7

H_DRAMPWRGD_R

A20

WOL_EN

A18

H_SKTOCC#_R

C17

PM_LAN_ENABLE

A8

EC_SCI#

A19

LPC_SMI#

A9

STPPCI#

C15

PM_DPRSLPVR

M2

U4_K1 BBR#

K1
AF5

AUTO_PSI_DISABLE

A14

STPCPU#

B18

ICH_GPIO26

C11

BOARD_ID0

A11

BOARD_ID2

G18

U4_K2

K2

U4_AF6

AF6

HOOD_LOCK_DET

AH5

BOARD_REV0

L1
F16

TPM_PP

C12

H_PWRGD

AD23

ICH_LAN100SLP_EN

E21

THERM#

AK26

ICH_VRMPWRGD

C22

PM_SYNC#_ICH PM_SYNC#

AH25

ICH_PWRBT#

T3

ICH_RI#

G19

RIB

HOOD_SW_DET#

R1

SUSCLK

R5

SYS_RST#

F19

PLTRST#

C14

WAKE#

E20

HOOD_SENSE#

G21

ICH_PWROK_SB

C25

ICH_RSMRST#

F22

ICH_INTVRMEN

E23

SPKR

N8
A13

SLP_S4#_R SLP_S4#

B13

SLP_S5#_R

G17

ICH_SLP_M#

F17

CK_PWRGD

T8

GP72

C13

H_DPRSTP#_R

AK28

H_DPSLP#_R

AE24

ICH_TP3

F20

TP3

5%

R577 0

5%R577 0

5%

R594 0

5%R594 0

5%

R600 0

5%R600 0

5

%

R629 1K

5%R629 1K

5%

R591 0 0402I 5%R591 0 0402I 5%
R623 0 0402I 5%R623 0 0402I 5%

R642 1K0402I 5%R642 1K0402I 5%
R263 1K0402I 5%R263 1K0402I 5%

R187 0

5%R187 0

5% R200 15 0402I 5%R200 15 0402I 5%

R606 0 0402I 5%R606 0 0402I 5%
R608 0 0402I 5%R608 0 0402I 5%
R230 0 0402I 5%R230 0 0402I 5%

R558 0 0402I 5%R558 0 0402I 5%
R177 0 0402I 5%R177 0 0402I 5%

T60T60

HOOD_SENSE#

RTC BATTERY

BT1
CR2032 ATTERY
Critical
I

RTC Battery P/N: AHL03003002

3VSB

R333

R333
200

200

0402

0402
5%

5%
I

I

RTC_N03
RTC_N02

R327

R327
1K

1K

0402

0402
5%

5%
I

I

XBT1_1

12

XBT1

XBT1
CR2032-SOCKET

CR2032-SOCKET

I

I

BM_BUSY#

0402I

0402I

H_DRAMPWRGD

0402NI

0402NI
0402I

0402I

EC_SCI# 30

0402I

0402I
0402I

0402I

FDT_OVRD#

0402I

0402I

R276 0 0402I 5%R276 0 0402I 5%
R275 0 0402I 5%R275 0 0402I 5%

SLP_S3#SLP_S3#_R
SLP_S5#

R117 1K 0402

5%R117 1K 0402

5%

I

I

VRMPWG4,32

D13 SS0540

D13 SS0540

I DSM

I DSM

D12 SS0540

D12 SS0540

I DSM

I DSM

2

Layout note:
DPRSTP# , Daisy Chain
(SB>Power>NB>CPU)

BM_BUSY# 26

H_DRAMPWRGD 8

WOL_EN 35

H_SKTOCC# 4,26,27

PM_LAN_ENABLE 21

LPC_SMI# 26,29,30

PM_STPPCI# 3

T163T163

BBR# 13

AUTO_PSI_DISABLE 5,32
PM_STPCPU# 3
S4_STATE_ICH# 26,27,29,31,34
BOARD_ID0 13
BOARD_ID2 13

MXM_PWR_LEVEL 16

FDT_OVRD# 13
BOARD_REV0 13

AUDIO_AMP_DIS# 27
H_PWRGD 4,29

ICH_VRMPWRGD 3,29

PM_SYNC# 7

ICH_PWRBT# 26,30
ICH_RI# 26
SUS_CLK_SIO 26
SUS_CLK_TPM 22

SYS_RST# 29
PLTRST# 12,26,30

WAKE# 26

ICH_RSMRST# 26

SPKR 13,27
SLP_S3# 26,27,29,30

SLP_S4# 8,29,30,36
SLP_S5# 26
ICH_SLP_M# 29,35
CK_PWRGD 3

ICH_DPRSTP# 4,7
H_DPSLP# 4

HOOD_SW_DET#_RHOOD_SW_DET#

HOOD SENSOR I

HOOD SENSOR I

SLP_S3#

R197 20K

R197 20K

VCCRTC

40V

40V
500mA

500mA
40V

40V
500mA

500mA

C299

C299
1U

1U

0603

0603
I

I
X7R

X7R
10V

10V

2

SPI_CS0#

MXM_PWRGD16

P125

P125

1
2
3

R604 0

5%R604 0

5%

R605 0

5%R605 0

5%

SLP_M_G_V3P3_CL35

1

ROM recovery

R777 0

5%R777 0

5%

0402NI

0402NI

E16

E16

SPI_MOSI_R
SPI_MISO_R
SPI_CLK_R

E16(1-2)

PO@MINI_JUMP_2P_FM_2.54MM_BLACK
I

R194 15 0402I 5%R194 15 0402I 5%

SPI_CLK
SPI_MOSI SPI_MOSI_R

R184 15 0402I 5%R184 15 0402I 5%
R296 33 0402I 1%R296 33 0402I 1%

SPI_MISO

R564 0

R564 0

NI 04025%

NI 04025%

R603 10K

R603 10K

R603_1 Q57_BVRMPWG

0402I

0402I

0402NI

0402NI

3VSB

Q28_BICH_RSMRST#

2

0603I 5%

0603I 5%

1 3

R202 4.7K

R202 4.7K

SPI_CS0#_C

3VSB

ICH_PWROK

1

5

2 4

U26

IU26

I

74AHC1G125

74AHC1G125

2

0402I 5%

0402I 5%

R190

R190

8.2K

8.2K

0402

0402
I

I
5

5

%

%

Q28_C

2

Q28

Q28
MMBT3904-7-F

MMBT3904-7-F

200mA

200mA
S

S

OT23-3

OT23-3

I

I
40V

40V

0402I 5%

0402I 5%

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

1
3
526

R796 1K

R796 1K

PWRGD_140MS7,26,29

SB (1/4)- HOST

SB (1/4)- HOST

SB (1/4)- HOST

SPI_CS0#_RSPI_CS0#_C

87

PO@4P*2_4 Wall_2.54MM_ST_Black

PO@4P*2_4 Wall_2.54MM_ST_Black

I

I

V_3P3_CL

R300

R300
1K

1K

0402

0402

%

%

5

5
I

I

U19

U19

1

CE#

6

SCK

5

SI

2

SO

SPI_WP#

3

WP#

W25Q32

W25Q32

OIC8

OIC8

S

S

3VSB

Critical

Critical
I

I

R565

R565
10K

10K

0402

0402
5

5

%

%

I

I

3VSB VCC3

R584

R584
1K

1K

0402

0402
NI

NI
5%

5%

Q56

Q56

2

MMBT3904-7-F

MMBT3904-7-F

S

S

OT23-3

OT23-3

1 3

40V

40V
200mA

200mA

I

I

R180

R180
1K

1K

0402

0402
I

I
5

5

%

%

3

Q30

Q30
ME2N7002E

ME2N7002E

250mA

250mA
SOT23-3

SOT23-3
I

I
60V

60V

1

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

1

3VSB

1 3

1 3

Q30_G

SPI_CS0#_R
SPI_CLK_R

SPI_MISO_R

0402NI 5%

0402NI 5%

U55_2

R586

R586
680

680

0402

0402
I

I
5%

5%

Q57_C

Q57

Q57
MMBT3904-7-F

MMBT3904-7-F

200mA

200mA
S

S

OT23-3

OT23-3

I

I
40V

40V

Q29_C

Q29

Q29
MMBT3904-7-F

MMBT3904-7-F

200mA

200mA
SOT23-3

SOT23-3
I

I
40V

40V

2

2
1

HOLD#

3VSB

3 5

V_3P3_CL

V_3P3_CL

R301

R301
1K

1K

0402

0402

%

%

5

5
I

I

8

VDD

7
4

VSS

U55

U55
TC7SH08FU

TC7SH08FU

I

I

R575

R575
1K

1K

0402

0402
I

I
5%

5%

R208

R208
100K

100K

0402

0402
I

I
5%

5%

R195

R195
20K

20K

0603

0603
I

I
5

5

%

%

LAN_PWROK

C180

C180

0.22U

0.22U

0603

0603
I

I
X

X

7R

7R

25V

25V

ZN5

ZN5

ZN5

C276

C276

0.1U

0.1U

0402

0402
10V

10V
X7R

X7R

I

I

SPI_HD#

C266

C266

0.1U

0.1U

0402

0402
10V

10V
X7R

X7R

ICH_PWROK

4

R791 33

R791 33

1%

1%

ICH_PWROK_SB

ICH_VRMPWRGD

C581

C581
1U

1U

0603

0603
10V

10V
X7R

X7R
I

I

11 40Friday, March 05, 2010

11 40Friday, March 05, 2010

11 40Friday, March 05, 2010

11

I

I

0402I

0402I

X4

X4

X4

5

PCI/PCI-E/USB/DMI/SPI

ICH10

ICH10

U4A

U4A

E3
C6
B3
R2

J8
R3
K5

F10

H8
E6
F5

G12

H5
A7
C7
F7

K7

G13
F13

G8

J5
E1
F1
A3
K6
L7
F2

G2

PAR
DEVSELB
PCICLK
PCIRSTB
IRDYB
PMEB
SERRB
STOPB
PLOCKB
TRDYB
PERRB
FRAMEB

GNT0B
GNT1B/GP51
GNT2B/GP53
GNT3B/GP55

REQ0B
REQ1B/GP50
REQ2B/GP52
REQ3B/GP54

PIRQAB
PIRQBB
PIRQCB
PIRQDB
PIRQEB/GP2
PIRQFB/GP3
PIRQGB/GP4
PIRQHB/GP5

I

I

CH10

CH10

Critical

Critical
I

I

R596 0

R596 0

PCI

PCI

0402I 5%

0402I 5%

DEVSEL#

PCLK_ICH3
PCIRST#19

PME_IN#26

D D

CTRL_GTLREF1

C C

B B

BOOT_BLK_EN#13

R265 10K

R265 10K

I 5%

I 5%

CTRL_GTLREF14

PLTRST#11,26,30

0402N

0402N

R121 10K

R121 10K

VCC3

PCLK_ICH
PCIRST#
IRDY#

SERR#
STOP#
LOCK#
TRDY#
PERR#
FRAME#

GNT0#
U4_C7

T74T74

CTRL_GTLREF1

REQ0#
REQ1#
REQ2#
REQ3#

0402I 5%

0402I 5%

INTA#
INTB#
INTC#
INTD#
INTE#
INTF#
INTG#
INTH#

PLTRST# PLT_RST#

U1LB

U1LB

1OF6

1OF6

3VSB_USBOC

4

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8

AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE0B
C/BE1B
C/BE2B
C/BE3B

REV = 0.72

REV = 0.72

3

2

1

12

C10
C8
E9
C9
A5
E12
E10
B7
B6
B4
E7
A4
H12
F8
C5
D2
E5
G7
E11
G10
G6
D3
H6
G5
C1
C2
C3
D1
J7
F3
G1
H3

F11
G9
C4
E8

Giga LAN

WLAN Card

TV Card

Card Reader

IC

IC

5VSB

3VSB

R108

R108

R81

R81

0

0

1K

1K

0603

0603

0603

0603

I

I

NI

NI

5

5

1%

1%

%

%

R83

R83
2K

2K

0603

0603

I

I

N

N
1%

1%

PCIE_RX#621
PCIE_RX621
PCIE_TX#621
PCIE_TX621

PCIE_RX#219
PCIE_RX219
PCIE_TX#219
PCIE_TX219
PCIE_RX#319
PCIE_RX319
PCIE_TX#319
PCIE_TX319
PCIE_RX#423
PCIE_RX423
PCIE_TX#423
PCIE_TX423

V_1P5_ICH

CLK_PCIE_ICH#3

CLK_PCIE_ICH3PLT_RST# 7

MXM_PRSNT_L#16

DMI_TXN07

DMI_TXP07
DMI_RXN07
DMI_RXP07

DMI_TXN17

DMI_TXP17
DMI_RXN17
DMI_RXP17

DMI_TXN27

DMI_TXP27
DMI_RXN27
DMI_RXP27

DMI_TXN37

DMI_TXP37
DMI_RXN37
DMI_RXP37

C171 0.1U0402I X7R 10VC171 0.1U0402I X7R 10V
C172 0.1U0402I X7R 10VC172 0.1U0402I X7R 10V

C181 0.1U0402I X7R 10VC181 0.1U0402I X7R 10V
C178 0.1U0402I X7R 10VC178 0.1U0402I X7R 10V

C551 0.1U0402I X7R 10VC551 0.1U0402I X7R 10V
C552 0.1U0402I X7R 10VC552 0.1U0402I X7R 10V

C549 0.1U0402I X7R 10VC549 0.1U0402I X7R 10V
C550 0.1U0402I X7R 10VC550 0.1U0402I X7R 10V

R543 24.9

R543 24.9

0402I 1%

0402I 1%

2

DMI_TXN0
DMI_TXP0
DMI_RXN0
DMI_RXP0
DMI_TXN1
DMI_TXP1
DMI_RXN1
DMI_RXP1
DMI_TXN2
DMI_TXP2
DMI_RXN2
DMI_RXP2
DMI_TXN3
DMI_TXP3
DMI_RXN3
DMI_RXP3

PCIE_TX#2_C
PCIE_TX2_C

PCIE_TX#3_C
PCIE_TX3_C

PCIE_TX#4_C
PCIE_TX4_C

DMI_IRCOMP_R

CLK_PCIE_ICH#
CLK_PCIE_ICH

3VSB

R66

R66
10K

10K

0402

0402
I

I
5%

5%

3

Q14

Q14
ME2N7002E

ME2N7002E

250mA

250mA
SOT23-3

SOT23-3
I

I
60V

60V

1

PCIE_TX#6_C
PCIE_TX6_C

AA26
AA28

AC26
AC28
AB30
AB29
AF26
AE26
AD29
AD30

AF28
AF30

W28
W26

D29
D30

R26
R28
M30
M29
N26
N28

H30
H29

G26
G28

U26
U25

V30
V29

Y30
Y29

E26
E28
P30
P29

K30
K29
L26
L28

J26
J28
F30
F29

U4B

U4B

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP

PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP
PERN1
PERP1
PETN1
PETP1
PERN2
PERP2
PETN2
PETP2
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PERN5
PERP5
PETN5
PETP5

DMI_IRCOMP
DMI_ZCOMP

DMI_CLKN
DMI_CLKP

ICH10

ICH10

Critical

Critical
I

I

MXM_PRSNT 31

DMI

DMI

PCI-E

PCI-E

ICH10

ICH10

U1LB

U1LB

REV = 0.72

REV = 0.72

USB

USB

OC10B/GP46
OC11B/GP47

Integrated 15K pull down

USB#0

AD6

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

USBP2P

USBP3N

USBP3P

USBP4N

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP8N

USBP8P

USBP9N

USBP9P

USBP10N

USBP10P

USBP11N

USBP11P

OC0B/GP59
OC1B/GP40
OC2B/GP41
OC3B/GP42
OC4B/GP43
OC5B/GP29
OC6B/GP30
OC7B/GP31
OC8B/GP44
OC9B/GP45

USBRBIASB

USBRBIAS

2OF6

2OF6

CLK48

USB0

AD5

USB#1

AE3

USB1

AE2

USB#2

AD1

USB2

AD2

USB#3

AB6

USB3

AB5
AC3
AC2

USB#5

AB1

USB5

AB2

USB#6

Y6

USB6

Y5

USB#7

AA3

USB7

AA2

USB#8

Y1

USB8

Y2

USB#9

V6

USB9

V5

USB#10

W2

USB10

W3

USB#11

V1

USB11

V2

USBOC#0

P5

USBOC#1

N3

USBOC#2

P7

USBOC#3

R7

USBOC#4

N2

USBOC#5

N1

USBOC#6

N5

USBOC#7

M1

USBOC#8

P3

USBOC#9

R6

USBOC#10

T7

USBOC#11

P1

USBRBIAS_PN

AG1
AG2

CLKUSB_48

AG3

IC

IC

R631 22.6

R631 22.6

DMI_TXP0
DMI_TXN0

DMI_TXP1
DMI_TXN1

DMI_TXP2
DMI_TXN2

DMI_TXP3
DMI_TXN3

USB#0 24

USB0 24
USB#1 25
USB1 25
USB#2 24
USB2 24
USB#3 19
USB3 19

USB#5 19
USB5 19
USB#6 24
USB6 24
USB#7 24
USB7 24
USB#8 24
USB8 24
USB#9 24
USB9 24
USB#10 24
USB10 24
USB#11 24
USB11 24

USBOC#0 24
USBOC#2 24

USBOC#6 24
USBOC#7 24
USBOC#8 24
USBOC#9 24
USBOC#10 24
USBOC#11 24

0402I

0402I

1%

1%

CLKUSB_48 3

DMI DEBUG HEADER

DMI DEBUG HEADER

DMI DEBUG HEADER

USB1(Rear IO)
CAREMA
Dongle USB
TV CARD

WLAN CARD/BLUETOOTH
Bluetooh
USB2(Rear IO)
USB3(Rear IO)
USB4(Rear IO)
USB2(Side IO)
USB1(Side IO)

DMI_RXP0

12

DMI_RXN0

34
56

DMI_RXP1

78

DMI_RXN1

910

1112

DMI_RXP2

1314

DMI_RXN2

1516
1718

DMI_RXP3

1920

DMI_RXN3

2122
2324
2526
2728
29

P153

P153

NI

NI

South Bridge Strap Pin (2/3)

Pin Name Strap description

HDA_SYNC

GNT2# / GPIO53 PWROK

GNT1# / GPIO51

GNT3# / GPIO55

A A

GNT0#

SPI_CS1# /
GPIO58 / CLGPIO6

PCI Express Port
Config 1 bit 0 (Port 1-4)

PCI Express Port
Config 2 bit 2 (Port 5-6)

ESI Strap(Server Only)

Top-Block Swap Override

Boot BIOS Selection 0

5

Sampled

PWROK

PWROK

PWROK

PWROK

CLPWROKBoot BIOS Selection 1

Configuration PU/PD

0 = Default
1 = Setting bit 0

0 = Setting bit 2
1 = Default

0 = DMI for ESI-compatible
1 = Default

0 = "top-block swap" mode
1 = Default

SPI_CS#1PCI_GNT#0

Boot Location

SPI(Default)

10

PCI

01

LPC

11

4

CTRL_GTLREF1

GNT0#

R266 1K

R266 1K

R270 1K

R270 1K
R271 1K

R271 1K

0402NI 5%

0402NI 5%

0402NI 5%

0402NI 5%
0402I 5%

0402I 5%

3

VCC3

PCI PULL-UP

REQ0#
IRDY#
LOCK#
STOP#
INTB#
TRDY#
REQ1#
REQ2#
DEVSEL#
FRAME#
INTD#
INTH#
INTG#
INTC#
PERR#
INTF#
SERR#
INTA#
INTE#

R283 8.2K

R283 8.2K
R720 8.2K

R720 8.2K
R721 8.2K

R721 8.2K
R722 8.2K

R722 8.2K
R723 8.2K

R723 8.2K
R724 8.2K

R724 8.2K
R725 8.2K

R725 8.2K
R726 8.2K

R726 8.2K
R727 8.2K

R727 8.2K
R728 8.2K

R728 8.2K
R729 8.2K

R729 8.2K
R730 8.2K

R730 8.2K
R731 8.2K

R731 8.2K
R732 8.2K

R732 8.2K
R733 8.2K

R733 8.2K
R734 8.2K

R734 8.2K
R735 8.2K

R735 8.2K
R736 8.2K

R736 8.2K
R737 8.2K

R737 8.2K

0402I 5%

0402I 5%
0402I 5%

0402I 5%
0402I 5%

0402I 5%
0402I 5%

0402I 5%
0402I 5%

0402I 5%
0402I 5%

0402I 5%
0402I

0402I

5%

5%

0402I 5%

0402I 5%
0402I 5%

0402I 5%
0402I 5%

0402I 5%
0402I 5%

0402I 5%
0402I 5%

0402I 5%
0402I 5%

0402I 5%
0402I 5%

0402I 5%
0402I 5%

0402I 5%
0402I 5%

0402I 5%
0402I 5%

0402I 5%
0402I 5%

0402I 5%
0402I 5%

0402I 5%

VCC3

2

USBOC# PULL-UP

RP14

USBOC#8
USBOC#11
USBOC#9

3VSB_USBOC

USBOC#1
USBOC#5
USBOC#4
USBOC#3

USBOC#6

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

SB (2/4) PCIE/PCI/USB/DMI

SB (2/4) PCIE/PCI/USB/DMI

SB (2/4) PCIE/PCI/USB/DMI

Date: Sheet of

Date: Sheet of

Date: Sheet of

RP14

6
7
8
9

10

10K

10K

10P8R

10P8R
5%

5%
NI

NI

R110 10K

R110 10K

5
4

USBOC#0

3

USBOC#2USBOC#7

2

USBOC#10

1

R797 10K

R797 10K

0402I 5%

0402I 5%

R798 10K

R798 10K

0402I 5%

0402I 5%

R799 10K

R799 10K

0402I 5%

0402I 5%

R800 10K

R800 10K

0402I 5%

0402I 5%

0402I 5%

0402I 5%

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

ZN5

ZN5

ZN5

1

3VSB_USBOC

3VSB_USBOC

12 40Friday, March 05, 2010

12 40Friday, March 05, 2010

12 40Friday, March 05, 2010

3VSB_USBOC

X4

X4

X4