QUANTA ZN1 Schematics

5
4
3
2
1
Amazon LCD PC Block Diagram
V
D D
DDRII X2
page:8
18.
5" panel
page:19
CHA
/B
AMD AM2
uP
GA940
CORE:+1.196 ~ +0.748
V VCCP:+1.1V VCCA:+1.8V or +1.5V
page:4-7
+/- CP
+/- HCLK
U_CLK
HT-LINK
LV
ID[0:6]
DS
LV
C C
MXM MODULE (MXM3.0)
page:20
10/100 Et
RJ-45
page:25
B B
6 in 1
page:27
SPK
page:29
LINE OUT
page:23
A A
H/P OUT
page:29
Int
. Mic
page:29
5
hernet
TL8103EL
R
page:24
ard Reader
C
JR385
page:27
HDA CODEC
ALC269
page:29
B X2
US
side USB
page:26
4
DS
PCIEX1
PCI­PCI-
A
zalia
US
6
E E
RS780MN
ST
HO LVDS, DMI, DDR CLK POWER GND
page:10-13
A_
LINK
PCI
SA
-E/USB
TA
SB700
RTC, AC97, S PCI-E, USB, DMI, PCI SMB, GPIO, CLK
B
ATA, IDE, LPC, CPU
page:14-18
EC
ITE8512
page:32
3
LP
C BUS
US
B
USB
Camera Conn.
USB PORT X4 Rear
SPI Fl
page:32
CPU VCORE
page:34
Clock Gengerator
page:3
INI CARD
M
page:30
HDD, ODD
page:28
page:22
page:26
ash
2
W
LAN
Module
Bluetooth
USB
Camera M
odule
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
RESERVE
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
am
am
am
ZN1
ZN1
ZN1
1
1
B
B
14
14
14
B
1Friday, May 08, 2009
1Friday, May 08, 2009
1Friday, May 08, 2009
of
of
of
5
4
3
2
1
2
3&%67$&.83
LAYER 1 : LAYER 2 : VCC LAYER 3 : IN1
D D
LAYER 4 : IN2 LAYER 5 : LAYER 6 : BOT
C C
B B
TOP
GND
Pow
er S0~S2
5VPCU
1 5
VPCU
3VPCU
CC3
RV
5VSUS
1.8VSUS CC5
V VCC3
CC1.8 1.8V
V VCC1.5
CC1.2 1.2V
V CP
U_VDDA NB_CORE SMDDR_VTERM CP
U_CORE
36B216/3B66/3B6
Volta
15V 5V 3V
3V
5V
1. 5V 3V
1.5V
2.
1.2V
0.9V By CP
9$/:
560567
999
9'50B3:5*'
9&&B1%B3:5*'
950B3:5*'
1%B3:5*'
6%B3:5*'
&38B3:5*'
3&,B567
&38B567
8V SUSON
5V
Voltage Rails
ge
U
%21(),6+32:(5836(48(1&(
VV V VV
V
VV V V V V V V V V V
T
1>= 70 ms
VV
VV VV
VV
1m 1ms < T3 < 5ms
T2
T3T1
s < T2 < 10ms
S4
V
V
S5
V V V
V V
Ctl Sign
VI
N
VIN
CC_ON
RV RVCC_ONRVCC1.2 1.2V V
SUSD
MAIND MA
IND MAIND MAINON MAINON V
CC3
ON
VR SU
SON
VR_ON
alS3
Power On Sequence
From AC IN
5VPCU 3VPCU
From PWM
From Power Button
From EC
SYS_HWPG(PCU)
NBSWON#
RVCC_ON
RVCC5
RVCC3
From EC From EC From SB
From SB to EC
From EC
RVCC1.2
RSMRST#
DNBSWON#
PCIE_WAKE#
SUSB#,SUSC#
SUSON
>10ms
>100ms
SUSON
3VSUS 1.8VSUS SMDDR_VREF SMDDR_VTERM
From PWM From EC
HWPG_1.8V (SUS)
MAINON
MAINON
VCC5 VCC3 VCC2.5 VCC1.8 VCC1.5 NB_CORE 1.1V_NB
From PWM From EC
HWPG_1.5V,HWPG_2.5V,GFXPG(MAIN) HWPG_1.2_NB
VRON
CPU_CORE0, CPU_CORE1, CPU VDDNB_CORE, VCC1.2
From PWM
VRM_PWRGD (CPU)
HWPG
From EC
From SB From SB From SB From SB
ECPWROK
SB_PWRGD
NB_PWRGD
CPU_PWRGD/LDT_PG
PLTRST# PCIRST#
CPU_LDT_RST#
CPU_LDT_STOP#
0ns~30ns
99ms~108ms
A A
Qu
Qu
Qu
anta Computer Inc.
anta Computer Inc.
anta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
SYST
SYST
SYST
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT :
EM INFORMATION
EM INFORMATION
EM INFORMATION
ZN1
ZN1
ZN1
24
24
1
24
B
B
B
1Friday, May 08, 2009
1Friday, May 08, 2009
1Friday, May 08, 2009
of
of
of
5
4
3
2
1
CLK_
D D
C C
B B
GEN_SLG8SP628
V
CC3
B
B
K1608HS600
K1608HS600
C
LK_VDD
R
R
315 8.2K_4
315 8.2K_4
LK_PD#
C
V
CC3
L27
L27
L26
L26
B
B
K1608HS600
K1608HS600
CL
K_VDD_USB
266 33P
266 33P
C
C
264 33P
264 33P
C
C
C
63
63
C2
C2
0.1u/10V_4
0.1u/10V_4
LK_VDD
52
52
C2
C2
22U/6.3V_8
22U/6.3V_8
255
255
C
C
2.2U_0805
2.2U_0805
21
Y2
Y2
14.
14.
318MHZ/20P
318MHZ/20P
C2
C2 10uF_0805
10uF_0805
_XIN
CG
_XOUT
CG
LK_SMB8,15,19,30
PC PD
AT_SMB8,15,19,30
56
56
260
260
C
C
0.1u/10V_4
0.1u/10V_4
1 2
C2
C2
0.1u/10V_4
0.1u/10V_4
CL
K_VDDIO
58
58
C
LK_VDD
T80T8 T85T8
T84T8
22U/6.3V_8
22U/6.3V_8
CG CG
C
0 5
4
C2
C2
0.1u/10V_4
0.1u/10V_4
50
50
C2
C2
_XIN _XOUT
LK_PD#
70
70
LKREQ2#
C
69
69
75
75
C2
C2
C2
C2
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
,&6/356
6/*63
5701
U1
U1
2
2
4
VDDDOT
16
VDDSRC
26
VDDAT
IG
35
VDDSB_
SRC
40
VDDSAT
A
48
VDDCPU
55
VDDHT
T
56
VDDREF
63
8
VDD4
11
VDDSRC_
17
VDDSRC_
25
VDDAT
IG_IO
34
VDDSB_
SRC_IO
47
VDDCPU_
1
GND48
7
GNDDOT
10
GNDSRC0
18
GNDSRC1
24
IG
GNDAT
33
GNDSB_
SRC
43
GNDSAT
46
GNDCPU
52
T
GNDHT
60
GNDREF
61
X1
62
X2
2
BCLK
SM
3
BDAT
SM
51
PD#
23
CL
KREQ0#
45
KREQ1#
CL
44
KREQ2#
CL
39
KREQ3#
CL
38
KREQ4#
CL
SLG8SP628
SLG8SP628
68
68
C2
C2
0.1u/10V_4
0.1u/10V_4
31$/356
31$/63
31$/
IO0 IO1
IO
QFN64
QFN64
A
GND0
GND1
T
T
65
66
C
GND2 T
67
68
LK_VDD
GND3 T
GND4 T
69
76
76
C2
C2
0.1u/10V_4
0.1u/10V_4
SRC6
SRC6
RC7T/27M_SS
S SRC7
REF
REF1
GND5
GND6
GND7
T
T
T
70
71
72
C2
C2
0.1u/10V_4
0.1u/10V_4
PUK8_0T
C
CPUK8
A
TIG0T
A
TIG0C
A
TIG1T
A
TIG1C
SRC0T
SB_
SRC0C
SB_
SRC1T
SB_ SB_
SRC1C
SRC0 SRC0 SRC1T SRC1 SRC2 SRC2 SRC3 SRC3 SRC4 SRC4
T/SATAT C/SATAC
C/27M_NS
TT0T/66M
H
T0C/66M
HT
48M
Hz_0
0/SEL_HTT66
/SEL_SATA EF2/SEL_27
R
GND8
GND9
T
T
73
74
CL
L28
CC1.2
CP
UCLKP_R
CP
UCLKN_R
BGFX_CLKP_R
N NB
GFX_CLKN_R
INK_CLKP_R
SBL
INK_CLKN_R
SBL SBSR S
BSRC_CLKN_R
CL
K_PCIE_MINI_R
CL
K_PCIE_MINI#_R
LK_PCIE_MXM_R
C
LK_PCIE_MXM#_R
C
LK_PCIE_LAN_R
C C
LK_PCIE_LAN#_R
LK_PCIE_JM385_R
C
LK_PCIE_JM385#_R
C
NB
HT_REFCLKP_R HT_REFCLKN_R
NB
C
LK_48M_USB_R
SEL SEL SEL
C2
C2
65
65
*10p/50V_4
*10p/50V_4
V
T83T8 T82T8
C_CLKP_R
T81T8 T77T7 T79T7 T78T7
T76T7 T75T7
_HTT66 _SATA _27
3 2
1 7 9 8
6 5
C2
C2 *10p/50V_4
*10p/50V_4
59
59
73
73
50 49
_0C
30 29 28 27
37 36 32 31
22
T
21
C
20 19
C
15
T
14
C
13
T
12
C
9
T
8
C
42 41 6 5
54 53
64
59 58 57
L28
B
B
K1608HS600
K1608HS600
lock chip has internal serial terminations
C for differencial pairs, external resistors are reserved for debug purpose.
lace within 0.5"
P of CLKGEN
RP
RP
7 0X2
7 0X2
4 0X2
4 0X2
RP
RP
9 0X2
9 0X2
RP
RP
RP
RP
6
6
RP
RP
3 0X2
3 0X2
RP
RP
2 0X2
2 0X2 1 0X2
1 0X2
RP
RP
RP
RP
8 0X2
8 0X2
RP
RP
5 0X2
5 0X2
177 33_4
177 33_4
R
R
180 158/F_4
180 158/F_4
R
R
181 90.9/F_4
181 90.9/F_4
R
R
2
1
4
3
2
1
4
3
2
1
4
3 1 3
1 3 1 3 1 3
1 3
1 3
0X2
0X2
2 4
2 4 2 4 2 4
2 4
2 4
Ra
Rb
K_VDDIO
*261/F_4
*261/F_4
GFX_CLKP
NB NB
GFX_CLKN
INK_CLKPSBLINK_CLKP
SBL
INK_CLKNSBLINK_CLKN
SBL S
BSRC_CLKPSBSRC_CLKP
S
BSRC_CLKNSBSRC_CLKN
C
LK_PCIE_WLANCLK_PCIE_WLAN
C
LK_PCIE_WLAN#CLK_PCIE_WLAN#
K_MXM
CL
LK_MXM#
C
LK_PCIE_LANCLK_PCIE_LAN
C C
LK_PCIE_LAN#CLK_PCIE_LAN#
LK_PCIE_JM385CLK_PCIE_JM385
C
LK_PCIE_JM385#CLK_PCIE_JM385#
C
NB
HT_REFCLKPNBHT_REFCLKP HT_REFCLKNNBHT_REFCLKN
NB
C
LK_48M_USB
_NB_OSC
EXT
22U/6.3V_8
22U/6.3V_8
182
182
R
R
72
72
C2
C2
74
74
C2
C2
0.1u/10V_4
0.1u/10V_4
CP
UCLKP
CP
UCLKN
SBL
INK_CLKP 12
SBL
INK_CLKN 12
S
BSRC_CLKP 14 BSRC_CLKN 14
S
LK_PCIE_WLAN 30
C
LK_PCIE_WLAN# 30
C
K_MXM 20
CL C
LK_MXM# 20
C
LK_PCIE_LAN 24
C
LK_PCIE_LAN# 24
LK_PCIE_JM385 27
C C
LK_PCIE_JM385# 27
HT_REFCLKP 12
NB
HT_REFCLKN 12
NB
CL
K_48M_USB 15
EXT
_NB_OSC 12
262
262
C
C
0.1u/10V_4
0.1u/10V_4
CP CP
NB NB
278
278
C
C
C
C
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
UCLKP 6 UCLKN 6
GFX_CLKP 12 GFX_CLKN 12
To NB
100 Mhz
To SB
To Mini PCIE Slot(WLAN) To MXM MODULE To LAN Controller
o 6 in 1 Controller
T
To NB HT BUS
To SB USB
NB
To
257
257
C2
C2
0.1u/10V_4
0.1u/10V_4
CPU
To
To NB
RS780 for VGA
100 Mhz
100 Mhz
48 Mhz
C
LOCK INPUT TABLE
CLOCKS HT_REFCLKP HT_REFCLKN REFCLK_P REFCLK_N GFX_REFCLK GPP_REFCLK GPPSB_REFCLK
77
77
267
267
C
C
0.1u/10V_4
0.1u/10V_4
200 Mhz
RS780
100M D
IFF 100M DIFF 14M SE (1.1V) vref
100M DIFF(IN/OUT)*
r 100M DIFF OUTPUT
NC o
100M DIFF
R3
R3
27
27
*8.2K_4
*8.2K_4
A A
26
26
R3
R3
8.2K_4
8.2K_4
5
4
R3
R3
8.2K_4
8.2K_4
SEL_SATA SEL_HTT66 S
EL_27
316
316
28
28
R
R
8.2K_4
8.2K_4
3
SEL_HTT66
SEL_SATA
_27
SEL
6
1
6 MHz 3.3V single ended HTT clock
*0
z differential HTT clock
100 MH 100 MHz non-spreading differential SRC clock
1* 0
100 MHz spreading differential SRC clock 27MHz and 27M SS outputs
1
Hz SRC clock
0*
100 M
* default
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
ize Document Number Rev
ize Document Number Rev
S
S
Cl
Cl
Cl
Date: Sheet
Date: Sheet
2
Date: Sheet
PROJECT :
ock Generator
ock Generator
ock Generator
ZN1
ZN1
ZN1
1A
1A
1A
of
of
of
341Friday, May 08, 2009
341Friday, May 08, 2009
341Friday, May 08, 2009
1
5
4
3
2
1
4
CPU Hy
D D
.2
VCC1
98 *short0805
98 *short0805
R
R R
R
100 *short0805
100 *short0805
C C
B B
DT_RUN
VL
VDDLDTRUNCPU is connected to the VDD_LDT_RUN power supply through the package or on the die. It is only connected
VL
H
T_CADIN15_P10
H
T_CADIN15_N10 T_CADIN14_P10
H H
T_CADIN14_N10 T_CADIN13_P10
H H
T_CADIN13_N10 T_CADIN12_P10
H H
T_CADIN12_N10
H
T_CADIN11_P10
H
T_CADIN11_N10 T_CADIN10_P10
H
T_CADIN10_N10
H H
T_CADIN9_P10 T_CADIN9_N10
H H
T_CADIN8_P10 T_CADIN8_N10
H H
T_CADIN7_P10 T_CADIN7_N10
H
T_CADIN6_P10
H H
T_CADIN6_N10
H
T_CADIN5_P10
H
T_CADIN5_N10 T_CADIN4_P10
H H
T_CADIN4_N10 T_CADIN3_P10
H H
T_CADIN3_N10 T_CADIN2_P10
H H
T_CADIN2_N10 T_CADIN1_P10
H H
T_CADIN1_N10 T_CADIN0_P10
H
T_CADIN0_N10
H
T_CLKIN1_P10
H H
T_CLKIN1_N10
H
T_CLKIN0_P10 T_CLKIN0_N10
H
T_CTLIN1_P10
H H
T_CTLIN1_N10
H
T_CTLIN0_P10
H
T_CTLIN0_N10
perTransport Interface
on the boar
DT_RUN
d to decoupling near the CPU package.
A
A
U9
U9
AJ4
LDT_06
V
AJ3
LDT_05
V
AJ2
V
LDT_02
AJ1
LDT_01
V
U6
L0_C
ADIN_H15
V6
ADIN_L15
L0_C
T4
L0_C
ADIN_H14
T5
ADIN_L14
L0_C
R6
L0_C
ADIN_H13
T6
ADIN_L13
L0_C
P4
ADIN_H12
L0_C
P5
L0_C
ADIN_L12
M4
L0_C
ADIN_H11
M5
L0_C
ADIN_L11
L6
ADIN_H10
L0_C
M6
L0_C
ADIN_L10
K4
ADIN_H9
L0_C
K5
L0_C
ADIN_L9
J6
L0_C
ADIN_H8
K6
L0_C
ADIN_L8
U3
L0_C
ADIN_H7
U2
ADIN_L7
L0_C
R1
L0_C
ADIN_H6
T1
ADIN_L6
L0_C
R3
L0_C
ADIN_H5
R2
ADIN_L5
L0_C
N1
L0_C
ADIN_H4
P1
ADIN_L4
L0_C
L1
L0_C
ADIN_H3
M1
ADIN_L3
L0_C
L3
ADIN_H2
L0_C
L2
ADIN_L2
L0_C
J1
L0_C
ADIN_H1
K1
L0_C
ADIN_L1
J3
ADIN_H0
L0_C
J2
L0_C
ADIN_L0
N6
L0_C
LKIN_H1
P6
LKIN_L1
L0_C
N3
L0_C
LKIN_H0
N2
L0_C
LKIN_L0
V4
0_CTLIN_H1
L
V5
L0_C
TLIN_L1
U1
L
0_CTLIN_H0
V1
TLIN_L0
L0_C
At
hlon 64 M2
rocessor Socket
P
L0_C
0_CADOUT_L15
L
L0_C
0_CADOUT_L14
L
L0_C
0_CADOUT_L13
L
L0_C
L
0_CADOUT_L12
L0_C
L
0_CADOUT_L11
L0_C
L
0_CADOUT_L10
L0_C
L
0_CADOUT_L9
L0_C
L
0_CADOUT_L8
L0_C
LINK
LINK
0_CADOUT_L7
L
L0_C
HT
HT
0_CADOUT_L6
L
L0_C
0_CADOUT_L5
L
L0_C
0_CADOUT_L4
L
L0_C
0_CADOUT_L3
L
L0_C
0_CADOUT_L2
L
L0_C
L
0_CADOUT_L1
L0_C
L
0_CADOUT_L0
L0_C
L0_C
L0_C
L0_C
0_CTLOUT_H1
L
L0_C
L
0_CTLOUT_H0
L0_C
DT_08
VL
DT_07
VL VL
DT_04 DT_03
VL
ADOUT_H15 ADOUT_H14 ADOUT_H13 ADOUT_H12 ADOUT_H11 ADOUT_H10
ADOUT_H9 ADOUT_H8 ADOUT_H7 ADOUT_H6 ADOUT_H5 ADOUT_H4 ADOUT_H3 ADOUT_H2 ADOUT_H1 ADOUT_H0
LKOUT_H1
LKOUT_L1
LKOUT_H0
LKOUT_L0
TLOUT_L1
TLOUT_L0
H6 H5 H2 H1
Y5 Y4 AB6 AA6 AB5 AB4 AD6 AC6 AF6 AE6 AF5 AF4 AH6 AG6 AH5 AH4 Y1 W1 AA2 AA3 AB1 AA1 AC2 AC3 AE2 AE3 AF1 AE1 AG2 AG3 AH1 AG1
AD5 AD4
AD1 AC1
Y6 W6
W2 W3
49
49
C1
C1
4.7U_0603
4.7U_0603
HT
_CADOUT15_P 10 _CADOUT15_N 10
HT HT
_CADOUT14_P 10 _CADOUT14_N 10
HT HT
_CADOUT13_P 10 _CADOUT13_N 10
HT
_CADOUT12_P 10
HT HT
_CADOUT12_N 10
HT
_CADOUT11_P 10
HT
_CADOUT11_N 10 _CADOUT10_P 10
HT HT
_CADOUT10_N 10
T_CADOUT9_P 10
H H
T_CADOUT9_N 10
H
T_CADOUT8_P 10
H
T_CADOUT8_N 10
H
T_CADOUT7_P 10 T_CADOUT7_N 10
H H
T_CADOUT6_P 10 T_CADOUT6_N 10
H H
T_CADOUT5_P 10 T_CADOUT5_N 10
H H
T_CADOUT4_P 10 T_CADOUT4_N 10
H H
T_CADOUT3_P 10 T_CADOUT3_N 10
H
T_CADOUT2_P 10
H
T_CADOUT2_N 10
H H
T_CADOUT1_P 10
H
T_CADOUT1_N 10 T_CADOUT0_P 10
H H
T_CADOUT0_N 10
H
T_CLKOUT1_P 10 T_CLKOUT1_N 10
H H
T_CLKOUT0_P 10
H
T_CLKOUT0_N 10 T_CTLOUT1_P 10
H H
T_CTLOUT1_N 10
H
T_CTLOUT0_P 10 T_CTLOUT0_N 10
H
VL
DT_RUN
C1
C1 180P
180P
12
C1
C1
50
47
47
180P
180P
50
uanta Computer Inc.
uanta Computer Inc.
uanta Computer Inc.
Q
Q
Q
PROJECT :
PROJECT :
ze Document Number Rev
ze Document Number Rev
Si
Si
Size Document Num b er Rev
Date: Sheet
Date: Sheet
2
Date: Sheet of
D AM2 HT I/F
D AM2 HT I/F
D AM2 HT I/F
AM
AM
AM
PROJECT :
ZN1
ZN1
ZN1
44
44
44
1
1A
1A
1A
1Friday, May 08, 2009
of
1Friday, May 08, 2009
of
1Friday, May 08, 2009
C1
C1
46
46
4.7U_0603
4.7U_0603
A A
5
4
C1
C1
45
45
4.7U_0603
4.7U_0603
C1
C1
0.22U
0.22U
C1
C1
51
51
0.22U
0.22U
12
48
48
3
5
U9
U9
C
M_
M
_B_DQS0
M
_B_DQS1
M_B_DQS2
_B_DQS3
M M
_B_DQS4 _B_DQS5
M M
_B_DQS6 _B_DQS7
M
_B_DQS#0
M
_B_DQS#1
M M
_B_DQS#2 _B_DQS#3
M
_B_DQS#4
M
_B_DQS#5
M
_B_DQS#6
M M_B_DQS#7
M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_ M_
M_ M_ M_ M_ M_ M_ M_ M_
B_DQ63 B_DQ62 B_DQ61 B_DQ60 B_DQ59 B_DQ58 B_DQ57 B_DQ56 B_DQ55 B_DQ54 B_DQ53 B_DQ52 B_DQ51 B_DQ50 B_DQ49 B_DQ48 B_DQ47 B_DQ46 B_DQ45 B_DQ44 B_DQ43 B_DQ42 B_DQ41 B_DQ40 B_DQ39 B_DQ38 B_DQ37 B_DQ36 B_DQ35 B_DQ34 B_DQ33 B_DQ32 B_DQ31 B_DQ30 B_DQ29 B_DQ28 B_DQ27 B_DQ26 B_DQ25 B_DQ24 B_DQ23 B_DQ22 B_DQ21 B_DQ20 B_DQ19 B_DQ18 B_DQ17 B_DQ16 B_DQ15 B_DQ14 B_DQ13 B_DQ12 B_DQ11 B_DQ10 B_DQ9 B_DQ8 B_DQ7 B_DQ6 B_DQ5 B_DQ4 B_DQ3 B_DQ2 B_DQ1 B_DQ0
B_DM7 B_DM6 B_DM5 B_DM4 B_DM3 B_DM2 B_DM1 B_DM0
M
_B_DQS7
M
_B_DQS#7
M_B_DQS6
_B_DQS#6
M M
_B_DQS5 _B_DQS#5
M M
_B_DQS4 _B_DQS#4
M
_B_DQS3
M
_B_DQS#3
M
_B_DQS2
M M
_B_DQS#2 _B_DQS1
M
_B_DQS#1
M
_B_DQS0
M
_B_DQS#0
M
M
_B_DQ[0..63]8
D D
C C
B B
M
_B_DM[0..7]8
A A
_B_DQS[0..7]8
M
M
_B_DQS#[0..7]8
5
AH13
AL13 AL15
AJ15
AF13
AG13
AL14 AK15 AL16 AL17 AK21 AL21
AH15
AJ16
AH19
AL20
AJ22 AL22 AL24 AK25
AJ21
AH21 AH23
AJ24 AL27 AK27
AH31 AG30
AL25 AL26
AJ30
AJ31
E31 E30 B27 A27
A29 A28 A25 A24 C22 D21 A26 B25 B23 A22 B21 A20 C16 D15 C21 A21 A17 A16 B15 A14 E13
C15 A15 A13 D13
G30 G29
H31 G31
AJ14
AH17
AJ23 AK29
C30 A23 B17 B13
AK13
AJ13 AK17
AJ17 AK23 AL23 AL28 AL29
D31 C31 C24 C23 D17 C17 C14 C13
F29 F31
F13
K29 K31
L29 L28
J29
J31 J30
C
B_DATA63
M M
B_DATA62
M
B_DATA61
M
B_DATA60 B_DATA59
M
B_DATA58
M M
B_DATA57 B_DATA56
M M
B_DATA55 B_DATA54
M M
B_DATA53 B_DATA52
M
B_DATA51
M
B_DATA50
M M
B_DATA49 B_DATA48
M
B_DATA47
M M
B_DATA46 B_DATA45
M
B_DATA44
M
B_DATA43
M M
B_DATA42 B_DATA41
M M
B_DATA40 B_DATA39
M M
B_DATA38 B_DATA37
M
B_DATA36
M M
B_DATA35
M
B_DATA34
M
B_DATA33 B_DATA32
M M
B_DATA31 B_DATA30
M M
B_DATA29
M
B_DATA28
M
B_DATA27
M
B_DATA26 B_DATA25
M M
B_DATA24 B_DATA23
M M
B_DATA22 B_DATA21
M M
B_DATA20 B_DATA19
M M
B_DATA18 B_DATA17
M
B_DATA16
M
B_DATA15
M M
B_DATA14
M
B_DATA13 B_DATA12
M M
B_DATA11 B_DATA10
M M
B_DATA9 B_DATA8
M M
B_DATA7
M
B_DATA6
M
B_DATA5 B_DATA4
M
B_DATA3
M M
B_DATA2 B_DATA1
M M
B_DATA0
B_CHECK7
M
B_CHECK6
M M
B_CHECK5
M
B_CHECK4
M
B_CHECK3 B_CHECK2
M M
B_CHECK1 B_CHECK0
M
_DM8
MB MB
_DM7 _DM6
MB MB
_DM5 _DM4
MB
_DM3
MB
_DM2
MB
_DM1
MB
_DM0
MB MB_DQS_H8
B_DQS_L8
M M
B_DQS_H7 B_DQS_L7
M MB_DQS_H6 MB_DQS_L6 M
B_DQS_H5
M
B_DQS_L5 B_DQS_H4
M MB_DQS_L4 MB_DQS_H3 M
B_DQS_L3
M
B_DQS_H2
M
B_DQS_L2 MB_DQS_H1 MB_DQS_L1 M
B_DQS_H0 M
B_DQS_L0
hlon 64 M2
At P
rocessor Socket
4
M M M M M M M M M M M M M M M M M M M M M
DDRII: DATA
DDRII: DATA
M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M
M M M M M M M M
MA_DQS_H8
M
M
M
MA_DQS_H6
MA_DQS_L6
M
M
M
MA_DQS_L4
MA_DQS_H3
M
M
M
MA_DQS_H1
MA_DQS_L1
M
M
4
Processor DDR2 M
M_
A_DQ63
AE14
A_DATA63 A_DATA62 A_DATA61 A_DATA60 A_DATA59 A_DATA58 A_DATA57 A_DATA56 A_DATA55 A_DATA54 A_DATA53 A_DATA52 A_DATA51 A_DATA50 A_DATA49 A_DATA48 A_DATA47 A_DATA46 A_DATA45 A_DATA44 A_DATA43 A_DATA42 A_DATA41 A_DATA40 A_DATA39 A_DATA38 A_DATA37 A_DATA36 A_DATA35 A_DATA34 A_DATA33 A_DATA32 A_DATA31 A_DATA30 A_DATA29 A_DATA28 A_DATA27 A_DATA26 A_DATA25 A_DATA24 A_DATA23 A_DATA22 A_DATA21 A_DATA20 A_DATA19 A_DATA18 A_DATA17 A_DATA16 A_DATA15 A_DATA14 A_DATA13 A_DATA12 A_DATA11 A_DATA10
M
A_DATA9 A_DATA8
M M
A_DATA7
M
A_DATA6
M
A_DATA5 A_DATA4
M
A_DATA3
M M
A_DATA2 A_DATA1
M M
A_DATA0
A_CHECK7 A_CHECK6 A_CHECK5 A_CHECK4 A_CHECK3 A_CHECK2 A_CHECK1 A_CHECK0
_DM8
MA MA
_DM7 _DM6
MA MA
_DM5 _DM4
MA
_DM3
MA
_DM2
MA
_DM1
MA
_DM0
MA
A_DQS_L8
A_DQS_H7
A_DQS_L7
A_DQS_H5
A_DQS_L5
A_DQS_H4
A_DQS_L3
A_DQS_H2
A_DQS_L2
A_DQS_H0
A_DQS_L0
AG14 AG16 AD17 AD13 AE13 AG15 AE16 AG17 AE18 AD21 AG22 AE17 AF17 AF21 AE21 AF23 AE23 AJ26 AG26 AE22 AG23 AH25 AF25 AJ28 AJ29 AF29 AE26 AJ27 AH27 AG29 AF27 E29 E28 D27 C27 G26 F27 C28 E27 F25 E25 E23 D23 E26 C26 G23 F23 E22 E21 F17 G17 G22 F21 G18 E17 G16 E15 G13 H13 H17 E16 E14 G14
K25 J26 G28 G27 L24 K27 H29 H27
J25 AF15 AF19 AJ25 AH29 B29 E24 E18 H15
J28 J27 AD15 AE15 AG18 AG19 AG24 AG25 AG27 AG28 D29 C29 C25 D25 E19 F19 F15 G15
M_
A_DQ62
M_
A_DQ61 A_DQ60
M_
A_DQ59
M_
A_DQ58
M_ M_
A_DQ57 A_DQ56
M_ M_
A_DQ55 A_DQ54
M_
A_DQ53
M_
A_DQ52
M_
A_DQ51
M_ M_
A_DQ50 A_DQ49
M_ M_
A_DQ48 A_DQ47
M_ M_
A_DQ46 A_DQ45
M_ M_
A_DQ44
M_
A_DQ43
M_
A_DQ42
M_
A_DQ41 A_DQ40
M_ M_
A_DQ39 A_DQ38
M_ M_
A_DQ37 A_DQ36
M_ M_
A_DQ35 A_DQ34
M_ M_
A_DQ33 A_DQ32
M_
A_DQ31
M_
A_DQ30
M_ M_
A_DQ29
M_
A_DQ28 A_DQ27
M_ M_
A_DQ26 A_DQ25
M_ M_
A_DQ24 A_DQ23
M_ M_
A_DQ22
M_
A_DQ21
M_
A_DQ20 A_DQ19
M_
A_DQ18
M_ M_
A_DQ17 A_DQ16
M_ M_
A_DQ15 A_DQ14
M_ M_
A_DQ13 A_DQ12
M_
A_DQ11
M_ M_
A_DQ10
M_
A_DQ9
M_
A_DQ8 A_DQ7
M_ M_
A_DQ6 A_DQ5
M_ M_
A_DQ4 A_DQ3
M_ M_
A_DQ2 A_DQ1
M_ M_
A_DQ0
M_
A_DM7
M_
A_DM6 A_DM5
M_ M_
A_DM4 A_DM3
M_ M_
A_DM2
M_
A_DM1
M_
A_DM0
M
_A_DQS7
M
_A_DQS#7
M_A_DQS6
_A_DQS#6
M M
_A_DQS5 _A_DQS#5
M M
_A_DQS4 _A_DQS#4
M
_A_DQS3
M
_A_DQS#3
M
_A_DQS2
M M
_A_DQS#2 _A_DQS1
M
_A_DQS#1
M
_A_DQS0
M
_A_DQS#0
M
M M M_A_DQS2 M M M M M
M M M M M M M M_A_DQS#7
o SODIMM socket A (near)To SODIMM socket B (Far)
T
_A_DQS0 _A_DQS1
_A_DQS3 _A_DQS4 _A_DQS5 _A_DQS6 _A_DQS7
_A_DQS#0 _A_DQS#1 _A_DQS#2 _A_DQS#3 _A_DQS#4 _A_DQS#5 _A_DQS#6
3
emory Interface
M
_A_DQ[0..63] 8
M
_A_DM[0..7] 8
_A_DQS[0..7] 8
M
M_A_DQS#[0..7] 8
3
PL
ACE THEM CLOSE TO
U WITHIN 1"
CP
8VSUS
1.
R3
R3
58
58
39.2F
39.2F
1 2
63
63
R3
R3
39.2F
39.2F
1 2
A_CS#38,9
M_ M_
A_CS#28,9
M_
A_CS#18,9
M_
A_CS#08,9 B_CS#38,9
M_ M_
B_CS#28,9 B_CS#18,9
M_ M_
B_CS#08,9
M
_CKE38,9 _CKE28,9
M M
_CKE18,9 _CKE08,9
M
_A_A[0..15]8,9
M
M
_A_BS#28,9 _A_BS#18,9
M
_A_BS#08,9
M M
_A_RAS#8,9
M
_A_CAS#8,9
A_WE#8,9
M_
0.9V
DDR_VTERM
SM
T122T122
M_
ZN ZP
M_
499
499
C
C
4.7U_0603
4.7U_0603
C
C
186
186
1000P
1000P
2
0.9V
CPU_
CPU_
M_VREF
VTT_SEN
M
_A_A15 _A_A14
M M
_A_A13 _A_A12
M
_A_A11
M M
_A_A10
M
_A_A9
M
_A_A8 _A_A7
M M
_A_A6 _A_A5
M M
_A_A4 _A_A3
M M
_A_A2 _A_A1
M M
_A_A0
2
M_VREF
SE
15
15
C5
C5
4.7U_0603
4.7U_0603
C1
C1
77
77
1000P
1000P
D1 C1 B1 A1
AK1
AJ AH1 AG
L12
A
F12 E1
AH11
AJ11 AD27
AA25 AC25 AA24
AE29 AB31 AE30 AC31
M31 M29
L27
M25 M27
N24
AC26
N26
P25
Y25 N27 R24
P27 R25 R26 R27
T25 U25
T27
W24
N25
Y27
AA27 AA26
AB25 AB27
C
C
0.1U
0.1U
12 12
517
517
2 2 2 2 2
2
2
1
1.
8VSUS
R
R
351
351
2K/F
2K/F
C
C
R
R
518
518
352
352
1000P
1000P
2K/F
2K/F
B
B
U9
VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 VTT9
ME VTT_SENSE ME
ME M
M M M
M M M M
M M M M
M M M M M M M M M M M M M M M M
M M M
M M MA
U9
M
A1_CLK_H2
A1_CLK_L2
M
A1_CLK_H1
M
A1_CLK_L1
M M
A1_CLK_H0
A1_CLK_L0
M M
A0_CLK_H2
A0_CLK_L2
M M
MVREF
MZN MZP
A1_CS_L1 A1_CS_L0 A0_CS_L1 A0_CS_L0
B1_CS_L1 B1_CS_L0 B0_CS_L1 B0_CS_L0
B_CKE1 B_CKE0 A_CKE1 A_CKE0
A_ADD15 A_ADD14 A_ADD13 A_ADD12 A_ADD11 A_ADD10 A_ADD9 A_ADD8 A_ADD7 A_ADD6 A_ADD5 A_ADD4 A_ADD3 A_ADD2 A_ADD1 A_ADD0
A_BANK2 A_BANK1 A_BANK0
A_RAS_L A_CAS_L
_WE_L
A
thlon 64 M2
Processor Socket
491
491
C
C
4.7U_0603
4.7U_0603
C
C
188
188
1000P
1000P
Si
Si
Si
Date: Sheet
Date: Sheet
Date: Sheet
A0_CLK_H1
A0_CLK_L1
M
A0_CLK_H0
M M
A0_CLK_L0
M
B1_CLK_H2
B1_CLK_L2
M M
B1_CLK_H1
B1_CLK_L1
M M
B1_CLK_H0
M
B1_CLK_L0
M
B0_CLK_H2
M
B0_CLK_L2
B0_CLK_H1
M M
B0_CLK_L1
B0_CLK_H0
M M
B0_CLK_L0
DDR II: CMD/CTRL/CLK
DDR II: CMD/CTRL/CLK
M M M M
M M
M
509
509
C
C
4.7U_0603
4.7U_0603
C
C
179
179
1000P
1000P
ze Document Number Rev
ze Document Number Rev
ze Document Number Rev
AM
AM
AM
AE20 AE19 G20 G21 V27 W27 AG21 AG20 G19 H19 U27 U26
AL19 AL18 C19 D19 W29 W28 AJ19 AK19 A18 A19 U31 U30
AD31
B1_ODT0
AD29
B0_ODT0
AC27
A1_ODT0
AC28
A0_ODT0 B_ADD15
B_ADD14
M
B_ADD13 B_ADD12
M M
B_ADD11 B_ADD10
M
M
B_ADD9 B_ADD8
M M
B_ADD7
M
B_ADD6
M
B_ADD5 B_ADD4
M
B_ADD3
M M
B_ADD2 B_ADD1
M M
B_ADD0
B_BANK2 B_BANK1
M
B_BANK0
M M
B_RAS_L
M
B_CAS_L
_WE_L
MB
526
526
C
C
0.22U
0.22U
C
C
190
190
180P
180P
D AM2 DDR II Memory I/F
D AM2 DDR II Memory I/F
D AM2 DDR II Memory I/F
M
_B_A15
N28
_B_A14
M
N29
M
_B_A13
AE31
_B_A12
M
N30
_B_A11
M
P29
M
_B_A10
AA29
M
_B_A9
P31
M
_B_A8
R29
_B_A7
M
R28
M
_B_A6
R31
_B_A5
M
R30
M
_B_A4
T31
_B_A3
M
T29
M
_B_A2
U29
_B_A1
M
U28
M
_B_A0
AA30 N31
AA31 AA28
AB29 AC29 AC30
521
521
24
24
C
C5
C5
0.22U
0.22U
C1
C1 180P
180P
Q
Q
Q
PROJECT :
PROJECT :
PROJECT :
C
0.22U
0.22U
C
C
82
82
191
191
180P
180P
uanta Computer Inc.
uanta Computer Inc.
uanta Computer Inc.
1
M
_CLKOUT1 8 _CLKOUT1# 8
M M
_CLKOUT0 8 _CLKOUT0# 8
M
M
_CLKOUT4 8
M
_CLKOUT4# 8 _CLKOUT3 8
M M
_CLKOUT3# 8
M_
ODT3 8,9 ODT2 8,9
M_ M_
ODT1 8,9 ODT0 8,9
M_
_B_A[0..15] 8,9
M
M
_B_BS#2 8,9 _B_BS#1 8,9
M
_B_BS#0 8,9
M M
_B_RAS# 8,9
M
_B_CAS# 8,9
B_WE# 8,9
M_
DDR_VTERM
SM
25
25
C5
C5
0.22U
0.22U
C1
C1
84
84
180P
180P
ZN1
ZN1
ZN1
of
of
of
54
54
54
5
1Friday, May 08, 2009
1Friday, May 08, 2009
1Friday, May 08, 2009
1A
1A
1A
5
V
CC3
D D
Vout =1.25(1+R1/R2) = 1.25 (1+20K/20K) = 2.5V
If AMD SI is not used, the SID pin can be left unconnected and SIC should have a 300-ȍ (±5%) pulldown to VSS.
1
.8VSUS
CP
U_SIC15
CP
U_SID15
C C
CP
UCLKP3
CP
UCLKN3
R105
R105
300_4
R103
R103 R102
R102
300_4 300_4
300_4 300_4
300_4
H_PROCHOT#
R93
R93
R95
R95
5
.8VSUS
1
U_PWRGD14
CP
CP
U_LDT_STOP#12,14
CP
U_LDT_RST#12,14
B B
V
CC3
V
CC3
A A
V
CC3
PU
PU
10
10
1
S
VO
HDN
2
D
GN
3
N
VI
SET
G923-330T1UF
G923-330T1UF
PC
PC
139
139
10U_0805
10U_0805
R114
R114
*300
*300
R137
R137
*300
*300
*0
R130*0R130
*0
R115*0R115
3900P
3900P
C166
C166
R134
R134 169_0603F
169_0603F
3900P
3900P
C163
C163
R104
R104
R107
R107
*
*
*6
*6
680
680
80
80
1.8VSUS
1.8VSUS
R361
R361 *1
*1
R362
R362
0K
0K
300
300
2
1 3
*
*
MMBT3904
MMBT3904
Q27
Q27
R372 0R372 0
R960R96
*10K
*10K
TH
MDAT
1
2 2
*10K
*10K
THMCLK
1
R3840R384
4
5
U_SIC_R
CP CP
U_SID_R
R1100R110
R1110R111
R1090R109
R106
R106 *6
*6
80
80
V
0 Q29
Q29
2N7002E-LF
2N7002E-LF
*
*
3
3
Q30
Q30
2N7002E-LF
2N7002E-LF
*
* 0
CC3
CP
CP
R370
R370 *4
*4
MB
MBCLK
0.2A
R150
R150
P
P 20K_0603F
20K_0603F
P
P
R149
R149
20K_0603F
20K_0603F
R135300 R135300
U_CLKIN_SC_P
U_CLKIN_SC_N
0
0
0
.7K
.7K
DATA
2.5V
149
149
PC
PC 100U/6.3V/3528
100U/6.3V/3528
CP
U_ALL_PWROK
CP
U_LDTSTOP#
C
PU_HT_RESET#
U_PROCHOT# 14
CP
MBDATA 12,32
CLK 12, 32
MB
CP
U_VDDA
4
CP
U_TEST27_SINGLECHAIN
CP
U_TEST26_BURNIN#
PU_PRESENT#
C
PU_TEST25_H_BYPASSCLK_H
C CP
U_TEST21_SCANEN
CP
U_TEST20_SCANCLK2
CP
U_TEST24_SCANCLK1
CP
U_TEST22_SCANSHIFTEN
CP
U_TEST12_SCANSHI FTENB
PU_TEST15_BP1
C
PU_TEST14_BP0
C
PU_TEST25_L_BYPASSCLK_L
C
PU_TEST19_PLLTEST0
C C
PU_TEST18_PLLTEST1
1
.8VSUS
R97
R97 300_4
300_4
U_DBREQ#
CP
CP
T127T1 T136T1 T129T1 T128T128 T123T1
T66T6
U_DBRDY
6
27
U_TCK
CP
CP
U_TMS
36
CP
U_TDI
29
CP
U_TRST#
CP
U_TDO
23
C144
C144
CPU Thermal Senser
0.1U
0.1U
C567
C567
2200P_0603
2200P_0603
C128
C128
R88
R88
_4
_4
*0
*0
4
R381
R381 R113
R113 R112
R112 R140
R140 R142
R142 R139
R139 R141
R141 R144
R144 R143
R143 R375
R375 R108
R108 R371
R371 R369
R369 R374
R374
CP
CO
REFB+V34
CO
REFB-34
Connector
HDT
1.
8VSUS
*0.1U/10V_4
*0.1U/10V_4
R385
R385
H_T
HERMDA
HERMDC
H_T
SHDN#1
SYS_
U_CORE
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
KEY
KEY
CN10
CN10 *HDT CONN
*HDT CONN
200_6
200_6
U6
U6
1
VCC
2
P
DX
3
DX
N
4
-OVT
G781-1
G781-1
SOP8-4_9-65
SOP8-4_9-65
M
M
.8VSUS
1
*300
*300 300
300 1K/F
1K/F 510/F
510/F 300
300 *300
*300 *300
*300 *300
*300 *300
*300 *300
*300 *300
*300 510/F
510/F 300
300 300
300
close to CPU
.8VSUS
1
25
CC3
V
sub-address:9Ah
SMCLK
SM
PR
PR
PR
PR
DATA
-A GND
C564
C564
*0.1U
*0.1U
CP
LT
3110/F
3110/F
3010/F
3010/F
U_VDDA
CC3
V
8 7 6 5
3
L51
L51
V
LDT_RUN
R145*0R145
CC3
V
THMCLKTHERM_VCC TH
MDAT
HERM_ALERT#
T
3
R82
R82 *4
*4
.7K
.7K
40ohm_600mA
40ohm_600mA
*0
1
.8VSUS
*
*
MMBT3904
MMBT3904
Q15
Q15
1K
1K
R448
R448
C541
C541
7U_0603
7U_0603
4.
4.
7
T67T6
30
T130T1 T135T1
35
R379
R379 R380
R380
place them to CPU within 1"
25
T125T1 T124T1
24
T61T6
1 33
T133T1
T65T6
5
T142T1
42
T132T1
32 37
T137T1
38
T138T1
40
T140T1 T107T1
07
T101T1
01
T94T9
4 7
T97T9
00
T100T1 T103T1
03
T98T9
8
T99T9
9
T108T1
08
R81
R81 *
*
10K
10K
2
C
PU_HT_RESET#
13
/F_4
/F_4
A
DDA_RUN
V
C
PU_HT_RESET# CP CP
CP CP
CP
CP CP
CP CP
CP CP
CP CP CP
C
PU_TEST25_H_BYPASSCLK_H CP C
PU_TEST19_PLLTEST0 C
PU_TEST18_PLLTEST1
PU_TEST17_BP3
C C
PU_TEST16_BP2 C
PU_TEST15_BP1 C
PU_TEST14_BP0 CP
CP CP H_T H_T CP CP
CP CP
CP CP
THLON Control and Debug
12
C543
C543
C544
C544
0.
0.
22U
22U
3300pF
3300pF
U_ALL_PWROK U_LDTSTOP#
U_SIC_R U_SID_R
CP CP
_SHDN#112
CP
SYS_
M_THERM#20,32
MX
HERM_ALERT# 15
U_HTREF1 U_HTREF0
U_THERMTRIP#
44.2F
44.2F
44.2F
44.2F
U_VDDIO_SUS_FB_H
U_VDDIO_SUS_FB_H U_VDDIO_SUS_FB_L
U_CLKIN_SC_P U_CLKIN_SC_N
U_DBRDY U_TMS
U_TCK U_TRST# U_TDI
U_TEST25_L_BYPASSCLK_L
U_TEST12_SCANSHIFTENB U_TEST07_ANALOG_T
U_TEST6_DIECRACKMON
HERMDC
HERMDA U_TEST3_GATE0 U_TEST2_DRAIN0
U_RSVD_MA0_CLK3_P U_RSVD_MA0_CLK3_N
U_RSVD_MB0_CLK3_P U_RSVD_MB0_CLK3_N
NB
T
R790R79
SHDN#1
2
C10
VD
D10
VD
C7
R
C9
PW
D8
LD
AL6
SI
AK6
SI
V8
HT
V7
HT
G2
VD
G1
VD
AK11
V
AL11
V
A8
CL
B8
CL
B6
DB
AL9
TM
AH10
TC
AJ10
TR
AL10
TD
A10
T
B10
T
F10
T
E9
T
AJ7
T
F6
T
D6
T
E7
T
F8
T
C5
T
AH9
T
E5
T
AJ5
T
AG9
T
AG8
T
AH7
T
AJ6
T
L25
R
L26
R
L31
R
L30
R
W26
R
W25
R
AE27
R
U24
R
V24
R
AE28
R
AD25
R
AE24
R
AE25
R
AJ18
R
AJ20
R
C18
R
C20
R
G24
R
G25
RSVD18
H25
R
V29
R
W30
R
AM Processor Socket
CC3
V
0
R780R78
0
R3870R387
0
R80*0R80
*0
SMBUS SLAVE ADDRESS
G781
2
U9D
U9D
DA2 DA1
ESET_L
ROK
TSTOP_L
C D
_REF1 _REF0
C D_FB_H D_FB_L
DDIO_FB_H DDIO_FB_L
KIN_H KIN_L
RDY
S K ST_L I
EST25_H EST25_L EST19 EST18 EST13 EST9 EST17 EST16 EST15 EST14 EST12
EST7 EST6 EST5 EST4 EST3 EST2
SVD0 SVD1 SVD2 SVD3
SVD4 SVD5 SVD6 SVD7 SVD8 SVD9
SVD10 SVD11 SVD12 SVD13 SVD14 SVD15 SVD16 SVD17
SVD19 SVD20 SVD21
D NPT M2 SOCKET
VCC3
R390
R390 10K
10K
2
1 3
T3904
T3904
MMB
MMB
Q14
Q14
98 (CPU)
HERMTRIP_L
T
P
ROCHOT_L
PU_PRESENT_L
PSI
NC# NC# NC# NC#
DB
REQ_L
T
EST29_H
EST29_L
T
NC# NC# NC# NC#
T
EST24
T
EST23 EST22
T
EST21
T
EST20
T
T
EST28_H
T
EST28_L
T
EST27 EST26
T
EST10
T
EST8
T
R
SVD22
R
SVD23 SVD24
R
SVD25
R
SVD26
R
MISC
MISC
R
SVD27
R
SVD28 SVD29
R
SVD30
R R
SVD31
R
SVD32 SVD33
R
SVD34
R
SVD35
R R
SVD36
RSVD37
R77
R77 300
300
D5
VI
D4
VI VI
D3
VI
D2
VI
D1 D0
VI
_L
1 2 3 4
O
TD
5 6 7 8
SYS_
1
Add component to BOM
Vender suggest
.8VSUS
1
HERMTRIP#
H_T
AK7
ROCHOT#
H_P
AL7
D2 D1 C1 E3 E2 E1
PU_PRESENT#
C
AL3 F1 H3
H4 H20 H21
CP
U_DBREQ#
A5
CP
U_TDO
AK10
CP
U_TEST29_H_FBCLKOUT_P
C11
CP
U_TEST29_L_FBCLKOUT_N
D11 AE7 AD19 AE8 AD18
U_TEST24_SCANCLK1
CP
AK8
CP
U_TEST23_TSTUPD
AH8
CP
U_TEST22_SCANSHIFTEN
AJ9
CP
U_TEST21_SCANEN
AL8
CP
U_TEST20_SCANCLK2
AJ8
U_TEST28_H_PLLCHRZ_P
CP
J10
U_TEST28_L_PLLCHRZ_N
CP
H9
CP
U_TEST27_SINGLECHAIN
AK9
CP
U_TEST26_BURNIN#
AK5
C
PU_TEST10_ANALOGOUT
G7
CP
U_TEST08_DIG_T
D4
PU_MA_RESET#
C
E20
PU_MB_RESET#
C
B19 AL4
AK4 AK3
CP
U_RSVD_VIDSTRB1
F2
U_RSVD_VIDSTRB0
CP
F3
CP
U_VDDNB_FB_H
G4
CP
U_VDDNB_FB_L
G3
CP
U_CORE_TYPE
G5
Y31 Y30 AG31 V31 W31 AF31
SHDN# 38
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Shee t
Date: Shee t
.8VSUS1.8VSUS
1
R376
R376 10K
R373
R373 300
300
PSI#
9
T59T5
PLACE IT CLOSE TO CPU WITHIN 1" ROUTE AS 80 Ohm DIFFERENTIAL PAIR
AM
AM
AM
D AM2 CTRL & DEBUG
D AM2 CTRL & DEBUG
D AM2 CTRL & DEBUG
10K
R101
R101 300
300
2
1 3
T3904
T3904
MMB
MMB
Q28
Q28
34
PSI_L is a Power Status Indicator signal. This signal is asserted when the processor is in a low powerstate. PSI_L should be connected to the power supply controller, if the controller supports “skipmode, or diode emulation mode”. PSI_L is asserted by the processor during the C3 and S1 states.
R368
R368
80.6F
80.6F
139T139
T
T
126T126
T
131T131
134T134
T
4
T64T6 T
115T115
T
119T119
T
143T143 144T144
T T58T5
8
T57T5
7
T62T6
2
T63T6
3 0
T60T6
T92T9
2
T96T9
6
T91T9
1
T90T9
0
T95T9
5
T93T9
3
uanta Computer Inc.
uanta Computer Inc.
uanta Computer Inc.
Q
Q
Q
PROJECT :
PROJECT :
PROJECT :
1
CP
U_THERMTRIP# 15
VID
5 34
VID
4 34 3 34
VID VID
2 34 1 34
VID
0 34
VID
141T141
T
R3830R383 0
ZN1
ZN1
ZN1
64
64
64
6
1A
1A
1A
1Friday, May 08, 2009
1Friday, May 08, 2009
1Friday, May 08, 2009
of
of
of
5
4
3
2
1
PROCESSOR POWER AND GROUND
H
H
U9
G
G
U9
U9
A3
VSS1
A7
CPU_
CORE
8VSUS
O28 O27 O26 O25 O24 O23 O22 O21 O20 O19 O18 O17 O16 O15 O14 O13 O12 O11 O10
1.
Y29 Y28 Y26 Y24 V30 V28 V26 V25 T30 T28 T26 T24 P30 P28 P26 P24 M30 M28 M26 M24
O9
AF30
O
AD30
O8
AD28
O7
AD26
O6
AC24
O5
AB30
O4
AB28
O3
AB26
O2
AB24
O1
Y23 W22 V23 U22 T23 R22 P23 P21 N22 N20 M23 M21 L22 L20 AF11 AE12 AD23 AD11 AC22 AC20 AC18 AC16 AC14 AC12
51
51
C5
C5 10U_0603
10U_0603
52
52
C5
C5 10U_0603
10U_0603
CORE
U9
U9
E
E10
G10 G12
AA8 AA1 AA1 AA1 AA1 AA1
AB7
AB9 AB11
AC4 AC5 AC8
AC10
AD2 AD3 AD7 AD9
AE10
AF7
AF9
AG4 AG5 AG7 AH2 AH3
H11
H23
C5
C5
0.01U
0.01U
E
A4
VDD1
A6
VDD2
B5
9
VDD2
B7
0
VDD3
C6
3
VDD3
C8
VDD3
4
D7
7
VDD3
D9
8
VDD3
E8
VDD4
1 2
VDD4
F9
5
VDD4
F11
6
VDD4 VDD4
9 0
VDD5 VDD3
0
VDD4
2
VDD5
4
VDD6
6
VDD7
8
VDD8 VDD9 VDD1
0 1
VDD1 VDD1
2
ER1
ER1
3
VDD1 VDD1
4
POW
5 6 7 8 9 0 1 2 3 4 5 6 7 8 1 2 5 6 9 0 3 4 7 8 1 2 3
At
hlon 64 M2
rocessor Socket
P
60
60
C5
C5 180P
180P
C4
C4
0.22U
0.22U
POW
32
32
VDD1 VDD1 VDD1 VDD1 VDD1 VDD2 VDD2 VDD2 VDD2 VDD2 VDD2 VDD2 VDD2
B3
VDD2
C2
VDD3
C4
VDD3
D3
VDD3
D5
VDD3
E4
VDD3
E6
VDD4
F5
VDD4
F7
VDD4
G6
VDD4
G8
VDD4
H7
VDD5 VDD5 VDD5
57
57
C
C
459
459
0.22U
0.22U
D D
C C
B B
CORE
CPU_
61
1.
C5
C5
0.22U
0.22U
8VSUS
61
22U/6.3V_8
22U/6.3V_8
556
556
559
559
C
C
C
C
0.22U
0.22U
0.22U
0.22U
C
C
C
C
426
426
427
427
22U/6.3V_8
22U/6.3V_8
VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1
VDD9 VDD9 VDD9 VDD9 VDD9 VDD9 VDD9 VDD9 VDD9 VDD9 VDD8 VDD8 VDD8 VDD8 VDD8 VDD8 VDD8 VDD8 VDD8 VDD8 VDD7 VDD7 VDD7 VDD7 VDD7 VDD7 VDD7 VDD7 VDD7 VDD7 VDD6 VDD6 VDD6 VDD6 VDD6 VDD6 VDD6 VDD6 VDD6 VDD6 VDD5 VDD5 VDD5 VDD5 VDD5 VDD5
CPU_
06 05 04 03 02 01 00
9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4
CORE
CPU_
R10 R8 R5 R4 P19 P17 P15 P13 P11 P9 P7 N18 N16 N14 N12 N10 N8 M19 M17 M15 M13 M11 M9 M7 M3 M2 L18 L16 L14 Y19 Y17 L12 L10 L8 L5 L4 K23 K21 K19 K17 K15 K13 K11 K9 K7 J24 J22 J20 J18 J16 J14 J12 J8
47
47
C5
C5 10U_0603
10U_0603
CORE
CPU_
R12
07
VDD1
R14
VDD1
08
R16
09
VDD1
R18
10
VDD1
R20
11
VDD1
T2
VDD1
12
T3
13
VDD1
T7
14
VDD1
T9
VDD1
15
T11
16
VDD1
T13
17
VDD1
T15
18
VDD1
T17
VDD1
19
T19
20
VDD1
T21
VDD1
21
U8
22
VDD1
U10
VDD1
23
U12
24
VDD1
U14
25
VDD1
U16
VDD1
26
U18
VDD1
27
U20
VDD1
28
V9
29
VDD1
V11
VDD1
30
V13
31
VDD1
V15
VDD1
32
V17
VDD1
33
V19
VDD1
34
V21
VDD1
35
W4
36
VDD1
W5
VDD1
37
W8
38
VDD1
W10
VDD1
39
W12
40
VDD1
W14
VDD1
41
W16
42
VDD1
W18
VDD1
43
W20
44
VDD1
Y2
45
VDD1
Y3
46
VDD1
Y7
VDD1
47
Y9
VDD1
48
Y11
49
VDD1
Y13
VDD1
50
Y15
51
VDD1
Y21
VDD1
52
AA20
53
VDD1
AA22
VDD1
54
AB13
VDD1
55
AB15
VDD1
56
AB17
57
VDD1
AB19
58
VDD1
AB21
VDD1
59
AB23
60
VDD1
BOT
TOMSIDE DECOUPLING
46
548
548
C
C 10U_0603
10U_0603
46
C5
C5 10U_0603
10U_0603
549
549
C
C 10U_0603
10U_0603
U9
U9
F
F
VDDI VDDI VDDI VDDI VDDI VDDI VDDI VDDI VDDI VDDI VDDI VDDI VDDI VDDI VDDI VDDI VDDI VDDI VDDI
VDDI
VDDI
VDDI
ER2
ER2
VDDI VDDI
POW
POW
VDDI VDDI VDDI VDDI VDDI
V
DD184 DD183
V V
DD182 DD181
V V
DD180 DD179
V V
DD178 DD177
V
DD176
V
DD175
V V
DD174
V
DD173 DD172
V V
DD171 DD170
V V
DD169 DD168
V V
DD167
V
DD166
V
DD165 DD164
V
DD163
V V
DD162 DD161
V
50
50
C5
C5 10U_0603
10U_0603
A9
A1 AA4 AA5 AA7 AA9
AA1 AA13 AA15 AA17 AA19 AA21 AA23
AB2 AB3 AB8
AB10 AB12 AB14 AB16 AB18 AB20 AB22
AC7 AC9
AC11 AC13 AC15 AC17 AC19 AC21 AC23
AD8
AD10 AD12 AD14 AD16 AD20 AD22 AD24
AE4 AE5 AE9
AE11
AF2
AF3
AF8
AF10 AF12 AF14 AF16 AF18 AF20 AF22 AF24 AF26 AF28
AG10
54
54
C5
C5 10U_0603
10U_0603
VSS2 VSS3
1
VSS4 VSS5 VSS6 VSS7 VSS8
1
VSS9 VSS1 VSS1 VSS1 VSS1 VSS1 VSS1 VSS1 VSS1 VSS1 VSS1 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS3 VSS3 VSS3 VSS3 VSS3 VSS3 VSS3 VSS3 VSS3 VSS3 VSS4 VSS4 VSS4 VSS4 VSS4 VSS4 VSS4 VSS4 VSS4 VSS4 VSS5 VSS5 VSS5 VSS5 VSS5 VSS5 VSS5 VSS5 VSS5 VSS5 VSS6
At
hlon 64 M2
rocessor Socket
P
6090022000_4
6090022000_4
0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 1
CPU_
53
53
C5
C5 10U_0603
10U_0603
GND1
GND1
CORE
VSS1
21 20
VSS1
19
VSS1 VSS1
18 17
VSS1 VSS1
16 15
VSS1 VSS1
14 13
VSS1
12
VSS1
11
VSS1 VSS1
10 09
VSS1
08
VSS1 VSS1
07 06
VSS1
05
VSS1
04
VSS1 VSS1
03 02
VSS1 VSS1
01 00
VSS1
VSS9
9 8
VSS9
7
VSS9 VSS9
6
VSS9
5
VSS9
4 3
VSS9 VSS9
2 1
VSS9 VSS9
0
VSS8
9
VSS8
8
VSS8
7 6
VSS8 VSS8
5 4
VSS8 VSS8
3 2
VSS8 VSS8
1 0
VSS8 VSS7
9 8
VSS7
7
VSS7
6
VSS7 VSS7
5
VSS7
4 3
VSS7 VSS7
2 1
VSS7 VSS7
0 9
VSS6 VSS6
8
VSS6
7
VSS6
6 5
VSS6
4
VSS6 VSS6
3 2
VSS6
154
154
C
C
*22U/6.3V_8
*22U/6.3V_8
H10 H8 G11 G9 F30 F28 F26 F24 F22 F20 F18 F16 F14 F4 E11 D30 D28 D26 D24 D22 D20 D18 D16 D14 C3 B30 B28 B26 B24 B22 B20 B18 B16 B14 B11 B9 B4 AL5 AK30 AK28 AK26 AK24 AK22 AK20 Y16 Y14 AK18 AK16 AK14 AK2 AH30 AH28 AH26 AH24 AH22 AH20 AH18 AH16 AH14 AG11
53
53
C1
C1
*22U/6.3V_8
*22U/6.3V_8
52
52
C1
C1
*22U/6.3V_8
*22U/6.3V_8
1
.8VSUS
.8VSUS
1
U9
T22
VSS1
83
T20
VSS1
82
T18
81
VSS1
T16
80
VSS1
T14
VSS1
79
T12
78
VSS1
T10
VSS1
77
T8
76
VSS1
R23
VSS1
75
R21
74
VSS1
R19
73
VSS1
R17
72
VSS1
R15
VSS1
71
R13
70
VSS1
R11
69
VSS1
R9
VSS1
68
R7
67
VSS1
P22
66
VSS1
P20
65
VSS1
P18
VSS1
64
P16
63
VSS1
P14
VSS1
62
P12
61
VSS1
P10
VSS1
60
P8
59
VSS1
P3
58
VSS1
P2
VSS1
57
N23
VSS1
56
N21
VSS1
55
N19
54
VSS1
N17
VSS1
53
Y18
52
VSS1
K22
VSS1
51
K20
VSS1
50
K18
VSS1
49
K16
VSS1
48
K14
47
VSS1
K12
VSS1
46
K10
45
VSS1
K8
VSS1
44
K3
43
VSS1
K2
VSS1
42
J23
41
VSS1
J21
VSS1
40
J19
39
VSS1
J17
38
VSS1
J15
37
VSS1
J13
VSS1
36
J11
VSS1
35
J9
34
VSS1
J7
VSS1
33
J5
32
VSS1
J4
VSS1
31
H30
30
VSS1
H28
VSS1
29
H26
VSS1
28
H24
VSS1
27
H22
26
VSS1
H18
25
VSS1
H16
VSS1
24
H14
23
VSS1
H12
VSS1
22
6090022000_4
6090022000_4
DECOUPLI
GND2
GND2
NG BETWEEN PROCESSOR AND DIMMs
VSS1 VSS1 VSS1 VSS1 VSS1 VSS1 VSS1 VSS1 VSS1 VSS1 VSS1 VSS1 VSS1 VSS1 VSS1 VSS1 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2 VSS2
U4
84
U5
85
U7
86
U9
87
U11
88
U13
89
U15
90
U17
91
U19
92
U21
93
U23
94
V2
95
V3
96
V10
97
V12
98
V14
99
V16
00
V18
01
V20
02
V22
03
W9
04
W11
05
W13
06
W15
07
W17
08
W19
09
W21
10
W23
11
Y8
12
Y10
13
Y12
14
W7
15
Y20
16
Y22
17
K24
18
K26
19
K28
20
K30
21
L7
22
L9
23
L11
24
L13
25
L15
26
L17
27
L19
28
L21
29
L23
30
M8
31
M10
32
M12
33
M14
34
M16
35
M18
36
M20
37
M22
38
N4
39
N5
40
N7
41
N9
42
N11
43
N13
44
N15
45
PLACE CLOSE TO PROCESSOR AS POSSIBLE
29
28
28
C4
C4
4.7U_0603
4.7U_0603
31
31
C4
C4
4.7U_0603
4.7U_0603
30
30
C4
C4
4.7U_0603
4.7U_0603
29
C4
C4
4.7U_0603
4.7U_0603
C4
C4
0.22U
0.22U
C
C
C
453
453
0.22U
0.22U
C
460
460
0.22U
0.22U
C
C
462
462
0.22U
0.22U
C
C
34
34
456
456
0.22U
0.22U
C
C
438
438
0.22U
0.22U
C
C
442
442
0.01U
0.01U
7
C4
C4 180P
180P
50
50
CPU_
CORE
C4
C
C
C
C
C
C
C
531
531
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
A A
C
527
527
528
528
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
5
C
C5
C5
506
506
32
32
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
C
C
C
507
507
504
504
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
C4
C4
C5
C5
08
08
79
79
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
4
C4
C4
C4
C4
80
80
22U/6.3V_8
22U/6.3V_8
81
81
C4
82
82
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
C5
C5
C4
C4
85
85
22U/6.3V_8
22U/6.3V_8
30
30
C5
C5
03
03
22U/6.3V_8
22U/6.3V_8
3
C4
C4
0.01U
0.01U
C4
C4
43
43
39
39
180P
180P
C
C
454
454
180P
180P
uanta Computer Inc.
uanta Computer Inc.
uanta Computer Inc.
Q
Q
Q
PROJECT :
PROJECT :
Size Document Number Rev
ze Do cument Number Rev
ze Do cument Number Rev
Si
Si
Date: Sheet
Date: Sheet
2
Date: Sheet
D AM2 PWR & GND
D AM2 PWR & GND
D AM2 PWR & GND
AM
AM
AM
PROJECT :
ZN1
ZN1
ZN1
74
74
74
1
1A
1A
1A
of
1Friday, May 08, 2009
of
1Friday, May 08, 2009
of
1Friday, May 08, 2009
5
1.
8VSUS
4
3
.8VSUS
1
2
1
8
103
111
104
112
117
_B_A[0..15]5,9
313 4.7K
313 4.7K
09 *4.7K
09 *4.7K
M
_B_DM[0..7]5
_B_DQS[0..7]5
M
M
_B_DQS#[0..7]5
C
C
411 0.1U
411 0.1U
2.2U_0805
2.2U_0805
3080R3080 R
M
12
M M M M
M M
M M M_ M_ M_
M_ M_
PDAT_ PCL
C
C
C435
C435
1.5P
1.5P
C
C
1.5P
1.5P
SA0
SA1
12
312*0R312*0 R
M M M
_CLKOUT35 _CLKOUT3#5 _CLKOUT45 _CLKOUT4#5
_CKE25,9 _CKE35,9
_B_RAS#5,9 _B_CAS#5,9
B_WE#5,9 B_CS#05,9 B_CS#15,9
ODT25,9 ODT35,9
SMB3,15,19,30
K_SMB3,15,19,30
395
395
M
_CLKOUT3
M
_CLKOUT3#
M
_CLKOUT4
441
441
M
_CLKOUT4#
_B_BS#05,9 _B_BS#15,9 _B_BS#25,9
_B
_B
1 2
3
_CLKOUT3
M
_CLKOUT3#
M M
_CLKOUT4
M
_CLKOUT4#
S
A0_B A1_B
S
394 0.1U
394 0.1U
C
C
M
VREF_DIM
C
C
402
402
0.1U
0.1U
M
_B_A0 _B_A1
M
_B_A2
M
_B_A3
M M
_B_A4 _B_A5
M M
_B_A6 _B_A7
M
_B_A8
M
_B_A9
M
_B_A10
M M
_B_A11 _B_A12
M M
_B_A13 _B_A14
M M
_B_A15
B_DM0
M_ M_
B_DM1 B_DM2
M_ M_
B_DM3 B_DM4
M_ M_
B_DM5 B_DM6
M_ M_
B_DM7
_B_DQS0
M
_B_DQS1
M M
_B_DQS2
M
_B_DQS3 _B_DQS4
M M
_B_DQS5 _B_DQS6
M M
_B_DQS7
M
_B_DQS#0
M
_B_DQS#1
M
_B_DQS#2 _B_DQS#3
M
_B_DQS#4
M M
_B_DQS#5 _B_DQS#6
M M
_B_DQS#7
102
A0
101
A1 A2 A3 A4 A5 A6 A7 A8 A9
0
A1
1
A1 A1
2 3
A1
4
A1 A1
5
BA0 BA1 BA2
DM DM DM DM DM DM DM DM
DQ DQ DQ DQ DQ DQ DQ DQ
DQ DQ DQ DQ DQ DQ DQ DQ
CK0 CK0 CK1 CK1
CKE0 CKE1
RAS CAS WE S0 S1
OD OD
SA0 SA1
SDA SCL
VDDs
1
VREF
2
VSS0
3
VSS1
8
VSS2
9
VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS1 VSS11 VSS12 VSS1 VSS1 VSS1 VSS16 VSS17 VSS1 VSS1 VSS2
VDD081VDD182VDD287VDD388VDD495VDD596VDD6
0 1 2 3 4 5 6 7
S0 S1 S2 S3 S4 S5 S6 S7
S0 S1 S2 S3 S4 S5 S6 S7
T0 T1
pd
(H=11)
0
3 4 5
4
3
1
8 9 0
VSS2
VSS2
VSS2260VSS2
66
65
59
71
5
VSS2
72
100
99 98 97 94 92 93 91
105
90 89
116
86 84
107 106
85 10
26 52
67 130 147 170 185
13
31
51
70 131 148 169 188
11
29
49
68 129 146 167 186
30
32 164 166
79
80 108
113 109 110 115
114 119
198 200
195 197
199
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
117
118
103
111
104
M
_A_A[0..15]5,9
720R2720 R2
M M M M
M M
M M M_ M_ M_
M_ M_
PDAT_ PCL
C3
C3
2.2U_0805
2.2U_0805
M
C4
C4
1.5P
1.5P
M M
C4
C4
1.5P
1.5P
M
_A
SA0
A1_A
S
12
12
810R2810 R2
_A_BS#05,9
M M
_A_BS#15,9
M
_A_BS#25,9
_CLKOUT05 _CLKOUT0#5 _CLKOUT15 _CLKOUT1#5
_CKE05,9 _CKE15,9
_A_RAS#5,9 _A_CAS#5,9
A_WE#5,9 A_CS#05,9 A_CS#15,9
ODT05,9 ODT15,9
SMB3,15,19,30
K_SMB3,15,19,30
67
67
1 2
_CLKOUT0
36
36
_CLKOUT0# _CLKOUT1
37
37
_CLKOUT1#
5
273 *4.7K
273 *4.7K
R
R
VCC3
R
R
259 *4.7K
259 *4.7K
D D
_A : 00
SA
_A_DM[0..7]5
M
C C
M
_A_DQS[0..7]5
_A_DQS#[0..7]5
M
B B
VCC3
383 0.1U
383 0.1U
C
C
8VSUS
1.
A A
_CLKOUT0
M M
_CLKOUT0#
M
_CLKOUT1
M
_CLKOUT1#
A0_A
S S
A1_A
361 0.1U
361 0.1U
C
C
M
VREF_DIM
C
C
370
370
0.1U
0.1U
_A_A0
M
_A_A1
M
_A_A2
M M
_A_A3 _A_A4
M M
_A_A5 _A_A6
M
_A_A7
M
_A_A8
M
_A_A9
M M
_A_A10 _A_A11
M M
_A_A12 _A_A13
M M
_A_A14 _A_A15
M
M_
A_DM0 A_DM1
M_ M_
A_DM2 A_DM3
M_ M_
A_DM4 A_DM5
M_ M_
A_DM6 A_DM7
M_
_A_DQS0
M M
_A_DQS1
M
_A_DQS2 _A_DQS3
M M
_A_DQS4 _A_DQS5
M M
_A_DQS6 _A_DQS7
M M
_A_DQS#0
M
_A_DQS#1 _A_DQS#2
M
_A_DQS#3
M M
_A_DQS#4 _A_DQS#5
M M
_A_DQS#6 _A_DQS#7
M
102
A0
101
A1
1 2
3 8 9
VDD081VDD182VDD287VDD388VDD495VDD596VDD6
A2 A3 A4 A5 A6 A7 A8 A9
0
A1 A1
1 2
A1
3
A1 A1
4 5
A1 BA0
BA1 BA2
0
DM DM
1 2
DM
3
DM DM
4
DM
5
DM
6 7
DM
S0
DQ DQ
S1
DQ
S2
DQ
S3
DQ
S4 S5
DQ DQ
S6 S7
DQ
S0
DQ DQ
S1 S2
DQ DQ
S3 S4
DQ
S5
DQ
S6
DQ DQ
S7
CK0 CK0 CK1 CK1
CKE0 CKE1
RAS CAS WE S0 S1
T0
OD
T1
OD SA0
SA1 SDA
SCL
pd
VDDs VREF VSS0
VSS1
(H=6.5)
VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11
2
VSS1 VSS1
3 4
VSS1 VSS15 VSS16 VSS1
7
2
1
VSS1
8
VSS1
9
VSS20
VSS2
VSS2
60
59
3
VSS2
65
100
99 98 97 94 92 93 91
105
90 89
116
86 84
107 106
85 10
26 52
67 130 147 170 185
13
31
51
70 131 148 169 188
11
29
49
68 129 146 167 186
30
32 164 166
79
80 108
113 109 110 115
114 119
198 200
195 197
199
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
112
VDD8
VDD7
VDD9
SO-DIMM
SO-DIMM
0
9
8
7
6
5
4
VSS3
VSS2
VSS2
VSS2
VSS2
VSS2
VSS2
78
77
72
71
66
122
121
CN2
CN2
0
1
DQ DQ DQ
VDD1
VDD1
DQ DQ DQ DQ DQ DQ DQ
10
DQ DQ
11 12
DQ
13
DQ DQ
14 15
DQ
16
DQ
17
DQ DQ
18 19
DQ DQ
20 21
DQ DQ
22 23
DQ
24
DQ DQ
25
DQ
26
DQ
27 28
DQ DQ
29 30
DQ DQ
31
DQ
32
DQ
33
DQ
34 35
DQ DQ
36 37
DQ DQ
38 39
DQ DQ
40 41
DQ DQ
42 43
DQ
44
DQ
45
DQ DQ
46
DQ
47 48
DQ DQ
49 50
DQ DQ
51 52
DQ DQ
53
DQ
54
DQ
55 56
DQ
57
DQ DQ
58 59
DQ DQ
60 61
DQ DQ
62 63
DQ
NC1 NC2 NC3 NC4
NC/
TEST
G
uidePin uidePin
G
VSS5 VSS5 VSS5 VSS5 VSS5 VSS5 VSS5 VSS4 VSS48 VSS4 VSS4 VSS4 VSS44 VSS43 VSS4 VSS4 VSS4 VSS39 VSS38 VSS3
3
2
1
VSS3 VSS3 VSS34
VSS3
VSS3
VSS3
132
128
127
DDRII_SODIMM_H_6.5
DDRII_SODIMM_H_6.5
4
2
2
A_DQ0
M_
5
0 1 2 3 4 5 6 7 8 9
6 5 4 3 2 1 0 9
7 6 5
2 1 0
7 6 5
A_DQ1
M_
7
A_DQ2
M_
17
M_
A_DQ3
19
A_DQ5
M_
4
M_
A_DQ4
6
A_DQ7
M_
14
A_DQ6
M_
16
A_DQ12
M_
23
A_DQ8
M_
25
M_
A_DQ10
35
A_DQ14
M_
37
M_
A_DQ13
20
A_DQ9
M_
22
M_
A_DQ15
36
A_DQ11
M_
38
M_
A_DQ21
43
M_
A_DQ17
45
M_
A_DQ19
55
M_
A_DQ18
57
A_DQ20
M_
44
M_
A_DQ16
46
A_DQ22
M_
56
M_
A_DQ23
58
A_DQ29
M_
61
M_
A_DQ28
63
A_DQ31
M_
73
M_
A_DQ30
75
A_DQ25
M_
62
A_DQ24
M_
64
A_DQ27
M_
74
M_
A_DQ26
76
M_
A_DQ36
123
A_DQ32
M_
125
M_
A_DQ38
135
A_DQ35
M_
137
M_
A_DQ33
124
A_DQ37
M_
126
M_
A_DQ34
134
M_
A_DQ39
136
M_
A_DQ40
141
A_DQ41
M_
143
A_DQ42
M_
151
M_
A_DQ46
153
A_DQ44
M_
140
M_
A_DQ45
142
A_DQ43
M_
152
M_
A_DQ47
154
A_DQ49
M_
157
A_DQ53
M_
159
M_
A_DQ55
173
M_
A_DQ51
175
M_
A_DQ52
158
A_DQ48
M_
160
M_
A_DQ50
174
A_DQ54
M_
176
M_
A_DQ56
179
A_DQ61
M_
181
M_
A_DQ58
189
A_DQ59
M_
191
M_
A_DQ57
180
A_DQ60
M_
182
A_DQ62
M_
192
A_DQ63
M_
194 50
69 83 120 163
201 202
196 193 190 187 184 183 178 177 172 171 168 165 162 161 156 155 150 149 145 144 139 138 133
M
_A_DQ[0..63] 5
VCC3
_B : 10
SA
M
_A_CS#2 5,9 _A_CS#3 5,9
M
.8VSUS
1
R
R R3
R3
VCC3
118
CN2
CN2
0
DQ DQ
VDD8
VDD7
VDD9
VDD1
VDD11
DQ DQ DQ DQ DQ DQ DQ
DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ
NC1
NC2
NC3
NC4 TEST
NC/
uidePin
G
SO-DIMM
SO-DIMM
G
uidePin
VSS5 VSS5 VSS5 VSS5 VSS5 VSS5 VSS5 VSS4 VSS4 VSS47 VSS4 VSS4 VSS4 VSS43 VSS42 VSS4 VSS4 VSS3 VSS38 VSS37
3
1
0
9
8
6
VSS2777VSS2
78
VSS2
121
VSS2
122
VSS3
VSS3 VSS3 VSS3
VSS3
VSS32
VSS3
132
128
127
DDRII_SODIMM_H_11
DDRII_SODIMM_H_11
2
1
1
M_
B_DQ4
5
0 1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
6
5
4
3
2
1
0
9
8
6
5
4
1
0
9
6
5
4
B_DQ1
M_
7
B_DQ2
M_
17
B_DQ3
M_
19
M_
B_DQ5
4
B_DQ0
M_
6
M_
B_DQ6
14
B_DQ7
M_
16
B_DQ8
M_
23
B_DQ9
M_
25
B_DQ10
M_
35
M_
B_DQ15
37
B_DQ12
M_
20
M_
B_DQ13
22
B_DQ14
M_
36
M_
B_DQ11
38
B_DQ20
M_
43
M_
B_DQ16
45
M_
B_DQ19
55
M_
B_DQ23
57
M_
B_DQ21
44
B_DQ17
M_
46
M_
B_DQ18
56
B_DQ22
M_
58
M_
B_DQ29
61
B_DQ28
M_
63
M_
B_DQ26
73
B_DQ27
M_
75
M_
B_DQ24
62
B_DQ25
M_
64
B_DQ30
M_
74
B_DQ31
M_
76
M_
B_DQ33
123
M_
B_DQ36
125
B_DQ39
M_
135
M_
B_DQ35
137
B_DQ32
M_
124
M_
B_DQ37
126
B_DQ34
M_
134
M_
B_DQ38
136
M_
B_DQ40
141
M_
B_DQ41
143
B_DQ46
M_
151
B_DQ43
M_
153
M_
B_DQ44
140
B_DQ45
M_
142
M_
B_DQ47
152
B_DQ42
M_
154
M_
B_DQ53
157
B_DQ49
M_
159
B_DQ55
M_
173
M_
B_DQ54
175
M_
B_DQ48
158
M_
B_DQ52
160
B_DQ50
M_
174
M_
B_DQ51
176
B_DQ60
M_
179
M_
B_DQ57
181
B_DQ62
M_
189
M_
B_DQ59
191
B_DQ61
M_
180
M_
B_DQ56
182
B_DQ63
M_
192
B_DQ58
M_
194 50
69 83 120 163
201 202
196 193 190 187 184 183 178 177 172 171 168 165 162 161 156 155 150 149 145 144 139 138 133
Si
Si
Si
Date: Sheet
Date: Sheet
Date: Sheet
M
_B_DQ[0..63] 5
.8VSUS
1
*
10U_0805C415*10U_0805C415
*
10U_0805C371*10U_0805C371
_0805C321
_0805C321
10U
10U
_0805C373
_0805C373
10U
10U
0.
1UC4160.1UC416
0.
1UC3760.1UC376 1UC3770.1UC377
0.
0.
1UC4170.1UC417 1UC3780.1UC378
0. 1UC4210.1UC421
0. 1UC4230.1UC423
0. 1UC4180.1UC418
0. 1UC3800.1UC380
0. 1UC4190.1UC419
0.
0.
1UC3740.1UC374
0.
1UC3750.1UC375
0.
1UC3790.1UC379
0.
1UC3810.1UC381
0.
1UC3820.1UC382 1UC3270.1UC327
0. 1UC3280.1UC328
0.
0.
1UC3220.1UC322 1UC3230.1UC323
0.
0.
1UC3250.1UC325
1.
8VSUS
*0
.1UC422*0.1UC422
*0
.1UC420*0.1UC420 .1UC324*0.1UC324
M_
B_CS#2 5,9
M_
B_CS#3 5,9
*0
.1UC326*0.1UC326
*0
For EMI
DDR_
ze Do cument Number Rev
ze Do cument Number Rev
ze Do cument Number Rev
DDRII S
DDRII S
DDRII S
ODIMM x2
ODIMM x2
ODIMM x2
1
VREF
.8VSUS
R256
R261*0R261 *0
M
VREF_DIM
C352
C352 *1
*1
U
U
Q
Q
Q
PROJECT :
PROJECT :
PROJECT :
R256 1K/F
1K/F
0.9V
R
R
274
274
1K/F
1K/F
uanta Computer Inc.
uanta Computer Inc.
uanta Computer Inc.
ZN1
ZN1
ZN1
84
84
84
1
of
1Friday, May 08, 2009
of
1Friday, May 08, 2009
of
1Friday, May 08, 2009
1A
1A
1A
5
4
3
2
1
9
SM
DDR_VTERM
288 47_4
288 47_4
R
M
D D
0.9V
1.
DDR_VTERM
SM
_0805C372
_0805C372
10U
10U
10U_0805C414*10U_0805C414
*
1UC3990.1UC399
0.
0.
1UC3980.1UC398 1UC3970.1UC397
0. 1UC3890.1UC389
C C
0. 1UC3860.1UC386
0. 1UC3960.1UC396
0.
0.
1UC3850.1UC385 1UC3460.1UC346
0.
0.
1UC3620.1UC362 .1UC390*0.1UC390
*0 *0
.1UC401*0.1UC401 1UC4000.1UC400
0.
0.
1UC3910.1UC391
0.
1UC3880.1UC388
0.
1UC4120.1UC412
0.
1UC3510.1UC351 .1UC413*0.1UC413
*0
0.
1UC3870.1UC387 1UC3630.1UC363
0.
0.
1UC3640.1UC364
*0
.1UC365*0.1UC365
0.
1UC3660.1UC366 1UC3470.1UC347
0. 1UC3480.1UC348
0.
*0
.1UC349*0.1UC349 1UC3500.1UC350
0.
8VSUS
0.9V
DDR_VTERM
SM
1UC4040.1UC404
0.
0.
1UC4030.1UC403 1UC3320.1UC332
0. 1UC3370.1UC337
0. 1UC4100.1UC410
0. 1UC4050.1UC405
0.
0.
1UC4060.1UC406 1UC4070.1UC407
0.
0.
1UC4080.1UC408 1UC4090.1UC409
0.
0.
1UC3310.1UC331 1UC3380.1UC338
0.
0.
1UC3330.1UC333
0.
1UC3340.1UC334
0.
1UC3350.1UC335
0.
1UC3360.1UC336
_CKE05,8
M
_CKE15,8
M
_CKE25,8 _CKE35,8
M
ODT05,8
M_ M_
ODT15,8 ODT25,8
M_ M_
ODT35,8
_A_BS#05,8
M
_A_BS#15,8
M
_A_BS#25,8
M M_
A_WE#5,8
M
_A_CAS#5,8 _A_RAS#5,8
M
_B_BS#05,8
M M
_B_BS#15,8 _B_BS#25,8
M M_
B_WE#5,8
M
_B_CAS#5,8 _B_RAS#5,8
M M_
A_CS#05,8 A_CS#15,8
M_ M_
A_CS#25,8 A_CS#35,8
M_
B_CS#05,8
M_
B_CS#15,8
M_ M_
B_CS#25,8
M_
B_CS#35,8
M
_A_A[0..15]5,8
_A_A13
M M
_A_A10 _A_A0
M M
_A_A2 _A_A4
M M
_A_A6 _A_A7
M
_A_A11
M M
_A_A12
M
_A_A9
M
_A_A3 _A_A1
M M
_A_A8 _A_A5
M M
_A_A14 _A_A15
M
R R
R
265 47_4
265 47_4 317 47_4
317 47_4
R
R R
R
310 47_4
310 47_4
R
R
268 47_4
268 47_4
R
R
296 47_4
296 47_4 304 47_4
304 47_4
R
R
325 47_4
325 47_4
R
R R
R
293 47_4
293 47_4 266 47_4
266 47_4
R
R R
R
290 47_4
290 47_4
R
R
292 47_4
292 47_4 295 47_4
295 47_4
R
R
267 47_4
267 47_4
R
R R
R
322 47_4
322 47_4
R
R
302 47_4
302 47_4 319 47_4
319 47_4
R
R
321 47_4
321 47_4
R
R R
R
323 47_4
323 47_4 303 47_4
303 47_4
R
R
269 47_4
269 47_4
R
R R
R
294 47_4
294 47_4 289 47_4
289 47_4
R
R
271 47_4
271 47_4
R
R
305 47_4
305 47_4
R
R R
R
324 47_4
324 47_4 318 47_4
318 47_4
R
R R
R
307 47_4
307 47_4
R
R
270 47_4
270 47_4
R
R
291 47_4
291 47_4
R
R
P16 0404-47X2
P16 0404-47X2
1 2 3 4
P15 0404-47X2
P15 0404-47X2
R
R
1 2 3 4
P14 0404-47X2
P14 0404-47X2
R
R
1 2 3 4
R
R
P17 0404-47X2
P17 0404-47X2
1 2 3 4
P19 0404-47X2
P19 0404-47X2
R
R
1 2 3 4
R
R
P18 0404-47X2
P18 0404-47X2
1 2 3 4
R
R
P13 0404-47X2
P13 0404-47X2
1 2 3 4
M
B B
A A
5
4
_B_A[0..15]5,8
3
_B_A2
M
_B_A0
M
_B_A6
M M
_B_A4 _B_A11
M M
_B_A7 _B_A3
M M
_B_A1 _B_A8
M M
_B_A5
M
_B_A12
M
_B_A9
M
_B_A10 _B_A13
M M
_B_A15 _B_A14
M
R
R
P23 0404-47X2
P23 0404-47X2
1 2 3 4
R
R
P22 0404-47X2
P22 0404-47X2
1 2 3 4
P21 0404-47X2
P21 0404-47X2
R
R
1 2 3 4
P26 0404-47X2
P26 0404-47X2
R
R
1 2 3 4
P25 0404-47X2
P25 0404-47X2
R
R
1 2 3 4
P24 0404-47X2
P24 0404-47X2
R
R
1 2 3 4
320 47_4
320 47_4
R
R
306 47_4
306 47_4
R
R
R
R
P20 0404-47X2
P20 0404-47X2
1 2 3 4
2
uanta Computer Inc.
uanta Computer Inc.
uanta Computer Inc.
Q
Q
Q
PROJECT :
PROJECT :
ze Do cument Number Rev
ze Do cument Number Rev
ze Do cument Number Rev
Si
Si
Si
DDRII TE
DDRII TE
DDRII TE
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
RMINATION
RMINATION
RMINATION
ZN1
ZN1
ZN1
94
94
94
1
of
of
of
1A
1A
1A
1Friday, May 08, 2009
1Friday, May 08, 2009
1Friday, May 08, 2009
5
_CADOUT0_P4
HT
_CADOUT0_N4
HT
_CADOUT1_P4
HT
_CADOUT1_N4
HT
_CADOUT2_P4
HT HT
_CADOUT2_N4
HT
_CADOUT3_P4
HT
_CADOUT3_N4
HT
_CADOUT4_P4
HT
_CADOUT4_N4
HT
_CADOUT5_P4
HT
_CADOUT5_N4 _CADOUT6_P4
R151
R151
HT HT
_CADOUT6_N4 _CADOUT7_P4
HT
_CADOUT7_N4
HT
_CADOUT8_P4
HT
_CADOUT8_N4
HT
_CADOUT9_P4
HT HT
_CADOUT9_N4
HT
_CADOUT10_P4
HT
_CADOUT10_N4
HT
_CADOUT11_P4
HT
_CADOUT11_N4
HT
_CADOUT12_P4
HT
_CADOUT12_N4
HT
_CADOUT13_P4
HT
_CADOUT13_N4
HT
_CADOUT14_P4 _CADOUT14_N4
HT
_CADOUT15_P4
HT
_CADOUT15_N4
HT
_CLKOUT0_P4
HT HT
_CLKOUT0_N4
HT
_CLKOUT1_P4
HT
_CLKOUT1_N4
HT
_CTLOUT0_P4
HT
_CTLOUT0_N4
HT
_CTLOUT1_P4
HT
_CTLOUT1_N4
300/F_4
300/F_4
D D
C C
H
T_RXCALP
H
T_RXCALN
4
Y2
Y2 V22 V23 V25 V24 U24 U25
T25
T24 P22 P23 P25 P24 N24 N25
AC24 AC25 AB25 AB24 AA24 AA25
Y2
Y2
W2 W2
V21 V20 U20 U21 U19 U18
T22
T23
AB23 AA22
M22 M23 R21 R20
C23 A24
5 4
2 3 1 0
U10A
U10A
HT_RXCAD0P HT_RXCAD0N HT_RXCAD1P HT_RXCAD1N HT_RXCAD2P HT_RXCAD2N HT_RXCAD3P HT_RXCAD3N HT_RXCAD4P HT_RXCAD4N HT_RXCAD5P HT_RXCAD5N HT_RXCAD6P HT_RXCAD6N HT_RXCAD7P HT_RXCAD7N
HT_RXCAD8P HT_RXCAD8N HT_RXCAD9P HT_RXCAD9N HT_RXCAD10P HT_RXCAD10N HT_RXCAD11P HT_RXCAD11N HT_RXCAD12P HT_RXCAD12N HT_RXCAD13P HT_RXCAD13N HT_RXCAD14P HT_RXCAD14N HT_RXCAD15P HT_RXCAD15N
HT_RXCLK0P HT_RXCLK0N HT_RXCLK1P HT_RXCLK1N
HT_RXCTL0P HT_RXCTL0N HT_RXCTL1P HT_RXCTL1N
HT_RXCALP HT_RXCALN
RS780
RS780
PART
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
/F
/F
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N
HT_TXCLK0P HT_TXCLK0N HT_TXCLK1P HT_TXCLK1N
HYPER TRANSPORT CPU I
HYPER TRANSPORT CPU I
HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N
HT_TXCALP HT_TXCALN
s block is for UMA RS780 only
Thi
HT_TXCAD0P
1 OF 6
1 OF 6
PART
D24 D25 E24 E25 F24 F25 F23 F22 H23 H22 J25 J24 K24 K25 K23 K22
F21 G21 G20 H21 J20 J21 J18 K17 L19 J19 M19 L18 M21 P21 P18 M18
H24 H25 L21 L20
M24 M25 P19 R18
B24 B25
HT HT
3
_TXCALP _TXCALN
_CADIN0_P 4
HT
_CADIN0_N 4
HT
_CADIN1_P 4
HT
_CADIN1_N 4
HT
_CADIN2_P 4
HT
_CADIN2_N 4
HT HT
_CADIN3_P 4
HT
_CADIN3_N 4
HT
_CADIN4_P 4
HT
_CADIN4_N 4
HT
_CADIN5_P 4
HT
_CADIN5_N 4
HT
_CADIN6_P 4
HT
_CADIN6_N 4
HT
_CADIN7_P 4 _CADIN7_N 4
HT
_CADIN8_P 4
HT
_CADIN8_N 4
HT
_CADIN9_P 4
HT
_CADIN9_N 4
HT HT
_CADIN10_P 4
HT
_CADIN10_N 4
HT
_CADIN11_P 4
HT
_CADIN11_N 4
HT
_CADIN12_P 4
HT
_CADIN12_N 4
HT
_CADIN13_P 4
HT
_CADIN13_N 4
HT
_CADIN14_P 4
HT
_CADIN14_N 4 _CADIN15_P 4
HT
_CADIN15_N 4
HT
_CLKIN0_P 4
HT
_CLKIN0_N 4
HT HT
_CLKIN1_P 4
HT
_CLKIN1_N 4
HT
_CTLIN0_P 4
HT
_CTLIN0_N 4
HT
_CTLIN1_P 4
HT
_CTLIN1_N 4
R149
R149
300/F_4
300/F_4
2
1
10
U10D
U10D
AB12
MEM_A0(
AE16
MEM_A1(
V11
MEM_A2(
AE15
MEM_A3(
AA12
MEM_A4(
AB16
MEM_A5(
AB14
MEM_A6(
AD14
MEM_A7(
B B
A A
5
AD13
MEM_A8(
AD15
MEM_A9(NC)
AC16
MEM_A10(
AE13
MEM_A11(
AC14
MEM_A12(
Y14
MEM_A13(
AD16
MEM_BA0(
AE17
MEM_BA1(
AD17
MEM_BA2(
W12
MEM_RASb(
Y12
MEM_CASb(
AD18
MEM_W
AB13
MEM_CSb(
AB18
MEM_CKE(
V14
MEM_ODT(
V15
MEM_CKP(
W14
MEM_CKN(
AE12
MEM_COMPP(
AD12
MEM_COMPN(
RS780
RS780
4
P
P
AR 4 OF 6
AR 4 OF 6
NC)
MEM_DQ0/
NC)
MEM_DQ1/ NC) NC) NC) NC) NC) NC) NC)
NC) NC) NC) NC)
NC) NC) NC)
Eb(NC)
NC) NC) NC)
NC) NC)
NC) NC)
MEM_DQ2/ MEM_DQ3/
MEM_DQ5/ MEM_DQ6/ MEM_DQ7/ MEM_DQ8/
MEM_DQ9/DVO_D5(NC) MEM_DQ10/ MEM_DQ11/
MEM_DQ13/
MEM_DQ14/ MEM_DQ15/
MEM_DQS0P/
MEM_DQS0N/
MEM_DM1/
SBD_MEM/DVO_I/F
SBD_MEM/DVO_I/F
NC) NC)
DVO_VSYNC(NC) DVO_HSYNC(NC)
DVO_DE(NC) DVO_D0(NC)
MEM_DQ4(
DVO_D1(NC) DVO_D2(NC) DVO_D4(NC) DVO_D3(NC)
DVO_D6(NC) DVO_D7(NC)
MEM_DQ12(
DVO_D9(NC) DVO_D10(NC) DVO_D11(NC)
DVO_IDCKP(NC)
DVO_IDCKN(NC) MEM_DQS1P( MEM_DQS1N(
MEM_DM0(
DVO_D8(NC)
OPLLVDD18(NC)
I
OPLLVDD(NC)
I
I
OPLLVSS(NC)
MEM_VREF(
NC)
NC)
NC) NC)
NC)
NC)
AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21
Y17 W18 AD20 AE21
W17 AE19
AE23 AE24
AD23 AE18
+1.8_I
OPLLVDD18_NB
+1.1V_IOPLLVDD
3
R133
R133
*0_6
*0_6
R129 *0_6R129 *0_6
VCC1.8
1.1V_NB
Qu
Qu
Qu
anta Computer Inc.
anta Computer Inc.
anta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
RS7
RS7
RS7
Date: Sheet
Date: Sheet
2
Date: Sheet
PROJECT :
80M HT LINK I/F 1/4
80M HT LINK I/F 1/4
80M HT LINK I/F 1/4
ZN1
ZN1
ZN1
1A
1A
1A
of
of
of
41Friday, May 08, 2009
41Friday, May 08, 2009
41Friday, May 08, 2009
10
10
10
1
5
PC
IE_RXP020 IE_RXN020
PC
IE_RXP120
PC PC
IE_RXN120
PC
IE_RXP220
PC
IE_RXN220 IE_RXP320
PC
IE_RXN320
PC PC
D D
PC
PCIE_RXP[15..0]20 PC
IE_RXN[15..0]20
IE_TXP[15..0]20
PC PC
IE_TXN[15..0]20
C C
B B
IE_RXP[15..0] IE_RXN[15..0]
PC PC
IE_TXP[15..0] IE_TXN[15..0]
PC
IE_RXP420
PC
IE_RXN420
PC
IE_RXP520 IE_RXN520
PC PCIE_RXP620 PC
IE_RXN620
PC
IE_RXP720
PC
IE_RXN720 IE_RXP820
PC PC
IE_RXN820
PC
IE_RXP920
PC
IE_RXN920 IE_RXP1020
PC PCIE_RXN1020 PC
IE_RXP1120
PC
IE_RXN1120
PC
IE_RXP1220
PC
IE_RXN1220
PC
IE_RXP1320 IE_RXN1320
PC PC
IE_RXP1420
PC
IE_RXN1420 IE_RXP1520
PC PC
IE_RXN1520
GP
P_RX0P_WLAN30
GP
P_RX0N_WLAN30
GP
P_RX2P_LAN24
GP
P_RX2N_LAN24
G
PP_RX4P_CARD27
G
PP_RX4N_CARD27
PC
IE_SB_NB_RX0P14
PC
IE_SB_NB_RX0N14 IE_SB_NB_RX1P14
PC
IE_SB_NB_RX1N14
PC
IE_SB_NB_RX2P14
PC
PC
IE_SB_NB_RX2N14
PC
IE_SB_NB_RX3P14 IE_SB_NB_RX3N14
PC
4
U
U
10B
10B
D4
GFX
_RX0P
C4
GFX
_RX0N
A3
GFX
_RX1P
B3
_RX1N
GFX
C2
_RX2P
GFX
C1
GFX
_RX2N
E5
GFX
_RX3P
F5
GFX
_RX3N
G5
_RX4P
GFX
G6
_RX4N
GFX
H5
GFX
_RX5P
H6
GFX
_RX5N
J6
GFX
_RX6P
J5
_RX6N
GFX
J7
_RX7P
GFX
J8
GFX
_RX7N
L5
GFX
_RX8P
L6
GFX
_RX8N
M8
_RX9P
GFX
L8
_RX9N
GFX
P7
GFX
_RX10P
M7
GFX
_RX10N
P5
GFX
_RX11P
M5
_RX11N
GFX
R8
_RX12P
GFX
P8
GFX
_RX12N
R6
GFX
_RX13P
R5
GFX
_RX13N
P4
_RX14P
GFX
P3
GFX_RX14N
T4
GFX
_RX15P
T3
GFX
_RX15N
AE3
PP_RX0P
G
AD4
G
PP_RX0N
0
T70T7
21
T121T1
04
T104T1
17
T117T1
AE2 AD3 AD1 AD2
AA8
AA7
AA5
AA6
V5
W6
U5 U6 U8 U7
Y8 Y7
W5
Y5
G
PP_RX1P
G
PP_RX1N
G
PP_RX2P GPP_RX2N G
PP_RX3P G
PP_RX3N G
PP_RX4P G
PP_RX4N G
PP_RX5P
PP_RX5N
G SB_
RX0P RX0N
SB_ SB_
RX1P
SB_
RX1N
SB_
RX2P
SB_
RX2N RX3P
SB_
RX3N
SB_
RS780
RS780
2 OF 6
2 OF 6
PART
PART
PCIE I/F GFX
PCIE I/F GFX
GPP
GPP
PCIE I/F
PCIE I/F
PCIE I/F SB
PCIE I/F SB
PC
E_CALRP(PCE_BCALRP)
E_CALRN(PCE_BCALRN)
PC
GFX GFX GFX GFX GFX GFX GFX GFX GFX GFX_TX14N GFX GFX
GFX
_TX0P
GFX
_TX0N
GFX
_TX1P _TX1N
GFX
_TX2P
GFX
GFX
_TX2N
GFX
_TX3P
GFX
_TX3N _TX4P
GFX
_TX4N
GFX
GFX
_TX5P
GFX
_TX5N
GFX
_TX6P _TX6N
GFX
_TX7P
GFX
GFX
_TX7N
GFX
_TX8P
GFX
_TX8N _TX9P
GFX
_TX9N
GFX
_TX10P
_TX10N
_TX11P
_TX11N
_TX12P
_TX12N
_TX13P
_TX13N
_TX14P _TX15P
_TX15N
PP_TX0P
G
G
PP_TX0N
G
PP_TX1P
G
PP_TX1N
G
PP_TX2P
GPP_TX2N
G
PP_TX3P
G
PP_TX3N
G
PP_TX4P
G
PP_TX4N
G
PP_TX5P PP_TX5N
G
SB_
TX0P TX0N
SB_ SB_
TX1P
SB_
TX1N
SB_
TX2P
SB_
TX2N TX3P
SB_
TX3N
SB_
3
G
A5 B5 A4 B4 C3 B2 D1 D2 E2 E1 F4 F3 F1 F2 H4 H3 H1 H2 J2 J1 K4 K3 K1 K2 M4 M3 M1 M2 N2 N1 P1 P2
AC1 AC2 AB4 AB3 AA2 AA1 Y1 Y2 Y4 Y3 V1 V2
AD7 AE7 AE6 AD6 AB6 AC6 AD5 AE5
AC8 AB8
FX_TXP0
GFX
_TXN0
G
FX_TXP1
_TXN1
GFX
FX_TXP2
G GFX
_TXN2
G
FX_TXP3
GFX
_TXN3
FX_TXP4
G
_TXN4
GFX G
FX_TXP5
GFX
_TXN5
G
FX_TXP6
_TXN6
GFX
FX_TXP7
G GFX
_TXN7
G
FX_TXP8
GFX
_TXN8
FX_TXP9
G
_TXN9
GFX G
FX_TXP10
GFX
_TXN10
G
FX_TXP11
_TXN11
GFX
FX_TXP12
G GFX
_TXN12
G
FX_TXP13
GFX
_TXN13
FX_TXP14
G
_TXN14
GFX G
FX_TXP15
GFX
_TXN15
IE_TXP0_C
PC
IE_TXN0_C
PC
PC
IE_TXP2_C IE_TXN2_C
PC
PC
IE_TXP4_C
PC
IE_TXN4_C
A A_ A A_ A A_ A A_TX3N_C
NB NB
_TX0P_CA_TX0P_C
TX0N_CA_TX0N_C
_TX1P_CA_TX1P_C
TX1N_CA_TX1N_C
_TX2P_C
TX2N_C
_TX3P_C
_PCIECALRP _PCIECALRN
C
C
243 0.1U/10V/4
243 0.1U/10V/4 245 0.1U/10V/4
245 0.1U/10V/4
C
C
238 0.1U/10V/4
238 0.1U/10V/4
C
C
240 0.1U/10V/4
240 0.1U/10V/4
C
C C
C
239 0.1U/10V/4
239 0.1U/10V/4
C
C
241 0.1U/10V/4
241 0.1U/10V/4 234 0.1U/10V/4
234 0.1U/10V/4
C
C
236 0.1U/10V/4
236 0.1U/10V/4
C
C C237 0.1U/10V/4C237 0.1U/10V/4 C
C
235 0.1U/10V/4
235 0.1U/10V/4
C
C
232 0.1U/10V/4
232 0.1U/10V/4 229 0.1U/10V/4
229 0.1U/10V/4
C
C
233 0.1U/10V/4
233 0.1U/10V/4
C
C C
C
231 0.1U/10V/4
231 0.1U/10V/4
C
C
226 0.1U/10V/4
226 0.1U/10V/4
C
C
228 0.1U/10V/4
228 0.1U/10V/4 225 0.1U/10V/4
225 0.1U/10V/4
C
C C227 0.1U/10V/4C227 0.1U/10V/4 C
C
218 0.1U/10V/4
218 0.1U/10V/4
C
C
222 0.1U/10V/4
222 0.1U/10V/4
C
C
213 0.1U/10V/4
213 0.1U/10V/4 216 0.1U/10V/4
216 0.1U/10V/4
C
C C
C
221 0.1U/10V/4
221 0.1U/10V/4 224 0.1U/10V/4
224 0.1U/10V/4
C
C C
C
217 0.1U/10V/4
217 0.1U/10V/4
C
C
215 0.1U/10V/4
215 0.1U/10V/4 C209 0.1U/10V/4C209 0.1U/10V/4 C
C
206 0.1U/10V/4
206 0.1U/10V/4 C
C
208 0.1U/10V/4
208 0.1U/10V/4 C
C
211 0.1U/10V/4
211 0.1U/10V/4 C
C
199 0.1U/10V/4
199 0.1U/10V/4 C
C
202 0.1U/10V/4
202 0.1U/10V/4
C
C
496 0.1u/10V_4
496 0.1u/10V_4
C
C
502 0.1u/10V_4
502 0.1u/10V_4
120T120
T
116T116
T
C
C
193 0.1u/10V_4
193 0.1u/10V_4
C
C
195 0.1u/10V_4
195 0.1u/10V_4
111T111
T
112T112
T
201 0.1u/10V_4
201 0.1u/10V_4
C
C C
C
204 0.1u/10V_4
204 0.1u/10V_4
C
C
175 0.1u/10V_4
175 0.1u/10V_4
C
C
174 0.1u/10V_4
174 0.1u/10V_4
C
C
178 0.1u/10V_4
178 0.1u/10V_4 176 0.1u/10V_4
176 0.1u/10V_4
C
C
180 0.1u/10V_4
180 0.1u/10V_4
C
C C
C
181 0.1u/10V_4
181 0.1u/10V_4
C
C
185 0.1u/10V_4
185 0.1u/10V_4
C
C
183 0.1u/10V_4
183 0.1u/10V_4
353 1.27K/F_4
353 1.27K/F_4
R
R R
R
349 2K/F_4
349 2K/F_4
GP GP
GP GP
G G
PC
IE_NB_SB_TX0P 14 IE_NB_SB_TX0N 14
PC
IE_NB_SB_TX1P 14
PC
IE_NB_SB_TX1N 14
PC PC
IE_NB_SB_TX2P 14
PC
IE_NB_SB_TX2N 14 IE_NB_SB_TX3P 14
PC
IE_NB_SB_TX3N 14
PC
2
IE_TXP0 20
PC
IE_TXN0 20
PC PC
IE_TXP1 20
PC
IE_TXN1 20
PC
IE_TXP2 20 IE_TXN2 20
PC
IE_TXP3 20
PC PC
IE_TXN3 20
PC
IE_TXP4 20
PC
IE_TXN4 20 IE_TXP5 20
PC PCIE_TXN5 20 PC
IE_TXP6 20
PC
IE_TXN6 20
PC
IE_TXP7 20 IE_TXN7 20
PC PC
IE_TXP8 20
PC
IE_TXN8 20
PC
IE_TXP9 20 IE_TXN9 20
PC PCIE_TXP10 20 PC
IE_TXN10 20
PC
IE_TXP11 20
PC
IE_TXN11 20
PC
IE_TXP12 20
PC
IE_TXN12 20 IE_TXP13 20
PC PC
IE_TXN13 20
PC
IE_TXP14 20 IE_TXN14 20
PC PC
IE_TXP15 20
PC
IE_TXN15 20
P_TX0P_WLAN 30 P_TX0N_WLAN 30
P_TX2P_LAN 24 P_TX2N_LAN 24
PP_TX4P_CARD 27 PP_TX4N_CARD 27
1V_NB
1.
1
11
TO MXM MODULE
TO WLAN
TO LAN
TO CARD READER
To A-Link
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
S
S
Size Document Number Rev
ize Document Number Rev
ize Document Number Rev
RS780M-
RS780M-
RS780M-
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT :
PCIE I/F 2/4
PCIE I/F 2/4
PCIE I/F 2/4
ZN1
ZN1
ZN1
1A
1A
1A
41Friday, May 08, 2009
41Friday, May 08, 2009
41Friday, May 08, 2009
of
11
of
11
of
11
1
5
V
Thermal
R128
U7
U7
VC
C
DX
P
DX
N
-OV
T
781
781
G
G
MSOP8-4_9-65
MSOP8-4_9-65
*0_4
*0_4
0_4
0_4
CRT
R128
C162
C162
SMBUS Add. : 98h
SMBUS Add. : 98h
_RST#_IN
NB
V
CC3
_RED
_GRN
CRT CRT
_BLU
SM
SM
DATA
Senser
C165
C165
0.1U_4
0.1U_4
1
2200P_0603
2200P_0603
C171
C171
D D
NB
_SHDN#16
R
X780
CP
U_LDT_RST#6,14
RS780
_PLTRST#14
NB
+NB
C C
_CORE_ON
_THRMDA
R_NB
_THRMDC
R_NB
R337
R337
R336
R336
orth Bridge RESET
N
R162
R162
R164
R164
2 3 4
*10K/F_4
*10K/F_4
2.2K_4
2.2K_4
CC3
0R_6
0R_6
*0.
*0.
1U
1U
8
CLK
7 6
-A
LT
5
GN
D
CC3
V
/F_4
/F_4
1K
1K
R449
R449
4
SMBUS SLAVE ADDRESS
G
781
98 (NB)
G
781-1
9A (CPU)
BCLK 6,32
M M
BDATA 6,32 N
B_TALERT# 15
Change BOM value
NB
_PWRGD_IN18
LLOW_LDTSTOP14
A
NB
HT_REFCLKP3
NB
HT_REFCLKN3
EXT
_NB_OSC3
1.
1V_NB
R330
R330
4.
4.
NB
GFX_CLKP3 GFX_CLKN3
NB
INK_CLKP3
SBL
INK_CLKN3
SBL
7K_4
7K_4
RS7
3
U10C
+3V
_AVDD_NB
+1.8V
_AVDDDI_NB
+
1.8V_AVDDQ_NB
I
NT_TV_C/R
09
T109T1
CRT
_RED21 _GRN21
CRT CRT
_BLU21
CRT C
RT_VSYNC21 CRT CRT
IV@715/F_6
IV@715/F_6
R346
R346
R331
R331
RS7
80
80
4.
4.
7K_4
7K_4
DS_DAT19,20
LV
DS_CLK19,20
LV
_HSYNC21 _DDCDAT21
_DDCCLK21
T110T1 T113T1
+NB
R332
R332 R333
R333
10 13
T73T7 T74T7
_CORE_ON
T118T1 T114T1
R343
R343 R344
R344 R345
R345
DA
1.1V_PLLVDD
+
1.8V_PLLVDD18
+
+1.
1.8V_VDDA18PCIEPLL
+
NB NB NB NB
NB NB
0_4
0_4 0_4
0_4
NB NB
SBL SBL
3 4
T72T7
2
18 14
0_4
0_4 0_4
0_4 0_4
0_4
C_RSET_NBDAC_RSET_NB
8V_VDDA18HTPLL
_RST#_IN _PWRGD_IN _LDT_STOP# _ALLOW_LDTSTOP
HT_REFCLKP HT_REFCLKN
NB
_REFCLK_PNB_REFCLK_P _REFCLK_NNB_REFCLK_N
NB
GFX_CLKP GFX_CLKN
N
BGPP_CLKP
N
BGPP_CLKN
INK_CLKP INK_CLKN
RS
740_DFT_GPIO1
780_AUX_CAL
RS
U10C
F12
VDD1(NC)
A
E12
VDD2(NC)
A
F14
VDDDI(NC)
A
G15
I(NC)
AVSSD
H15
VDDQ(NC)
A
H14
(NC)
AVSSQ
E17
C
_Pr(DFT_GPIO5)
F17
DFT_GPIO2)
Y(
F15
OMP_Pb(DFT_GPIO4)
C
G18
RE
D(DFT_GPIO0)
G17
RE
Db(NC)
E18
EEN(DFT_GPIO1)
GR
F18
G
REENb(NC)
E19
BL
UE(DFT_GPIO3)
F19
B
LUEb(NC)
A11
DA
C_HSYNC(PWM_GPIO4)
B11
DA
C_VSYNC(PWM_GPIO6)
E8
D
AC_SDA(PCE_TCALRN)
F8
DA
C_SCL(PCE_RCALRN)
G14
DA
C_RSET(PWM_GPIO1)
A12
P
LLVDD(NC)
D14
P
LLVDD18(NC)
B12
PL
LVSS(NC)
H17
V
DDA18HTPLL
D7
VD
DA18PCIEPLL1
E7
VD
DA18PCIEPLL2
D8
SYSR
ESETb
A10
OWERGOOD
P
C10
DTSTOPb
L
C12
LLOW_LDTSTOP
A
C25
HT
_REFCLKP
C24
_REFCLKN
HT
E11
EFCLK_P/OSCIN(OSCIN)
R
F11
EFCLK_N(PWM_GPIO3)
R
T2
X_REFCLKP
GF
T1
X_REFCLKN
GF
U1
PP_REFCLKP
G
U2
PP_REFCLKN
G
V4
PPSB_REFCLKP(SB_REFCL KP)
G
V3
PPSB_REFCLKN(SB_REFCLKN)
G
A9
2C_DATA
I
B9
I
2C_CLK
B8
DDC_
DATA/AUX0N(NC)
A8
CLK/AUX0P(NC)
DDC_
B7
X1P(NC)
AU
A7
UX1N(NC)
A
B10
ST
RP_DATA
G11
R
SVD
C8
A
UX_CAL(NC)
RS
RS
780
780
I
I/O
I/O
PART 3 OF 6
PART 3 OF 6
T
XOUT_U1P(PCIE_RESET_GPIO3)
T
XOUT_U1N(PCIE_RESET_GPIO2)
/TVOUT
/TVOUT
T
XOUT_U3P(PCIE_RESET_GPIO5)
CRT
CRT
T
XCLK_UP(PCIE_RESET_GPIO4)
T
XCLK_UN(PCIE_RESET_GPIO1)
LVTM
LVTM
PM
PM
I
CLOCKs PLL PWR
CLOCKs PLL PWR
MIS.
MIS.
T T T T T
OUT_L2N(DBG_GPIO0)
TX
T
TX
OUT_L3N(DBG_GPIO2)
T
T
T T
T
T
XCLK_LP(DBG_GPIO1)
T
XCLK_LN(DBG_GPIO 3)
VDS_DIGON(PCE_TCALRP)
L
VDS_BLON(PCE_RCALRP)
L
DS_ENA_BL(PWM_GPIO2)
LV
VCLKIN(PW M_GPIO5)
T
TH
ERMALDIODE_P
T
HERMALDIODE_N
XOUT_L0P(NC)
XOUT_L0N(NC)
XOUT_L1P(NC)
XOUT_L1N(NC)
XOUT_L2P(NC) XOUT_L3P(NC)
XOUT_U0P(NC) XOUT_U0N(NC)
XOUT_U2P(NC) XOUT_U2N(NC)
XOUT_U3N(NC)
V
DDLTP18(NC)
VSSL
TP18(NC)
V
DDLT18_1(NC)
V
DDLT18_2(NC)
V
DDLT33_1(NC)
V
DDLT33_2(NC)
VSSL
T1(VSS)
VSSL
T2(VSS)
VSSL
T3(VSS) T4(VSS)
VSSL
T5(VSS)
VSSL
T6(VSS)
VSSL VSSL
T7(VSS)
T
MDS_HPD(NC)
HP
D(NC)
T
ESTMODE
2
A22 B22 A21 B21 B20 A20 A19 B19
B18 A18 A17 B17 D20 D21 D18 D19
B16 A16 D16 D17
A13 B13
A15 B15 A14 B14
C14 D15 C16 C18 C20 E20 C22
E9 F7 G12
D9 D10
D12 AE8
AD8 D13
8V_VDDLTP18_NB
+1.
1.8V_VDDLT_18_NB
+
TM
DS_HPD0
TM
DS_HPD1
SU
S_STAT#_NB
R_NB
_THRMDA
R_NB
_THRMDC
T
EST_EN
XLOUT0+ 19
T
XLOUT0- 19
T
XLOUT1+ 19
T
XLOUT1- 19
T
XLOUT2+ 19
T
XLOUT2- 19
T T
XLOUT3+ 19
T
XLOUT3- 19 XUOUT0+ 19
T T
XUOUT0- 19
T
XUOUT1+ 19
T
XUOUT1- 19 XUOUT2+ 19
T T
XUOUT2- 19
T
XUOUT3+ 19
T
XUOUT3- 19
TX
LCLKOUT+ 19
T
XLCLKOUT- 19
T
XUCLKOUT+ 19
T
XUCLKOUT- 19
3V_VDLT33_NB
+
IGON 19
D
T
ON 19
BL
R334
R334
1.
1.
82K/F_4
82K/F_4
105T105
02
T102T1
06
T106T1
T68T6 T69T6
To LVDS panel
LVDS POWER
R329
R329
D48
D48
*1SS355
8 9
*1SS355
1
*0_4
*0_4
S_STAT# 15
SU
LTRST# 14,16,20,24,27,30
P
12
LM18PG201SN1D(200_1.4A)_6
LM18PG201SN1D(200_1.4A)_6
B
R197140/FR197140/
R205150/FR205150/
R202150/F R202150/F
F
F
B B
RS
780_AUX_CAL
C
RT_VSYNC
_HSYNC
CRT
A A
R166
R166
*3K_4
*3K_4
R160
R160
3K_4
3K_4
V
CC3
*3K_4
*3K_4
R161
R161
R159
R159
3K_4
3K_4
V
*3K_4
*3K_4
CC3
4
R158
R158
5
L48
L48
V
CC3
LM18PG201SN1D(200_1.4A)_6
LM18PG201SN1D(200_1.4A)_6
B
B
CC1.8
V
L25
L25
BLM18PG201SN1D(200_1.4A)_6
BLM18PG201SN1D(200_1.4A)_6
C230
C230
6.3V_8
6.3V_8
10u/
10u/
V
CC1.8
VDDA18PCIEPLL -PCIE PLL
L46
L46
LM18PG221SN1D(220_1.4A)_6
LM18PG221SN1D(220_1.4A)_6
B
B
VDDA18HTPLL -HT LINK PLL
L24
L24
BLM18PG201SN1D(200_1.4A)_6
BLM18PG201SN1D(200_1.4A)_6
+3V
C474
C474
2.
2.
2u/6.3V_6
2u/6.3V_6
20mils width
+
1.8V_VDDA18PCIEPLL
20mils width
+1.8V_VDDA18HTPLL
_AVDD_NB
C461
C461
.2u/6.3V_6
.2u/6.3V_6
2
2
+1.8V_PLLVDD18
C440
C440
2u/6.3V_6
2u/6.3V_6
2.
2.
C223
C223
2u/6.3V_6
2u/6.3V_6
2.
2.
U_LDT_STOP#6,14
CP
B
1.
1V_NB
CC1.8
V
BLM18PG201SN1D(200_1.4A)_6
BLM18PG201SN1D(200_1.4A)_6
L43
L43
3
R339
R339
L22
L22
VCC1.8
*short0603
*short0603
C466
C466
1u/10V_4
1u/10V_4
0.
0.
R169
R169 *300_4
*300_4
*BSS138_NL/SOT23
*BSS138_NL/SOT23
+1.8V
_AVDDDI_NB
+
1.8V_AVDDQ_NB
C433
C433 2
2
.2u/6.3V_6
.2u/6.3V_6
7
7
Q1
Q1
1
R167
R167
RS780
1.1V_PLLVDD
1.1V_PLLVDD
+
+
C219
C219
2u/6.3V_6
2u/6.3V_6
2.
2.
CC1.8
V
2
CC1.8
V
LM18PG201SN1D(200_1.4A)_6
LM18PG201SN1D(200_1.4A)_6
B
B
L21
L21
L20
L20
DDG_NB
+V
R165
R165
7K_4
7K_4
*4.
*4.
NB
3
0_4
0_4
_LDT_STOP#
2
C455
C455
.2u/6.3V_6
.2u/6.3V_6
2
2
B
B
LM21PG201SN1D(200_100M_2A)_8
LM21PG201SN1D(200_100M_2A)_8
C210
C210
4
4
.7u/6.3V_6
.7u/6.3V_6
8V_VDDLTP18_NB
+1.
8V_VDDLT_18_NB
+1.
C207
C207
0.
0.
1u/10V_4
1u/10V_4
R163
R163
0_6
VC
C3
CC3
V
LM21PG221SN1D(220_100M_2A)_8
LM21PG221SN1D(220_100M_2A)_8
*B
*B
Size Document Number Rev
ize Document Number Rev
ize Document Number Rev
S
S
Date: Sheet
Date: Sheet
Date: Sheet
0_6
L47
L47
80M-SYSTEM I/F 3/4
80M-SYSTEM I/F 3/4
80M-SYSTEM I/F 3/4
RS7
RS7
RS7
+V
DDG_NB
3V_VDLT33_NB
+
C444
C444
*
*
2.2u/6.3V_6
2.2u/6.3V_6
Q
Q
Q
uanta Computer Inc.
uanta Computer Inc.
uanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZN1
ZN1
ZN1
12
12
12
1
of
of
of
1A
1A
1A
41Friday, May 08, 2009
41Friday, May 08, 2009
41Friday, May 08, 2009
5
4
3
2
1
C470
C470 *0.1u
*0.1u
/10V_4
/10V_4
13
NB_CORE
C483
C483
10u
10u
/6.3V_8
/6.3V_8
ER DIFFERENCE TABLE
R
S780
+1.1V +1.1V +1.2V +1.8V +1.8V +1.8V +1.1V +1.1V
+1.8V/1.5V
+3.3V +1.8V
E
C468
C468
C476
C476
0.1u
0.1u
0.1u
0.1u
/10V_4
/10V_4
C487
C487
C513
C513
0.1u
0.1u
0.1u
0.1u
/10V_4
/10V_4
C512
C512
0.1u
0.1u
/10V_4
/10V_4
EM
+1.8V_VDD_M
+3V_VDDG33
C469
C469
0.1u
0.1u
/10V_4
/10V_4
C477
C477
0.1u
0.1u
PIN NAME IOPLLVDD
DD AVDDDI A
VDDQ PLLVDD PLLVDD18 VDDA18PCIEPLL VDDA18HTPLL VDDLTP18 VDDLT18 VDDLT33
C489
C489 1u
1u
/10V_4
/10V_4
C519
C519
0.1u
0.1u
/10V_4
/10V_4
C493
C493
0.1u
0.1u
/10V_4
/10V_4
R335
R335
/10V_4
/10V_4
RS
780
+1.1V +3.3VAV +1.8V +1.8V +1.1V
+1.8V +1.8V +1.8V +1.8V NC
VDDPCIE - PCIE-E Main power
R348
R348
C497
C497
C445
C445
4.7U/6.3V_6
4.7U/6.3V_6
1u
1u
/10V_4
/10V_4
/10V_4
/10V_4
C449
C449
C501
C501
10u
10u
0.1u
0.1u
/10V_4
/10V_4
C523
C523
0.1u
0.1u
*BLM
*BLM
21PG221SN1D(220_100M_2A)_8
21PG221SN1D(220_100M_2A)_8
L50
L50 R356
R356
RS780
*short0603
*short0603
/10V_4
/10V_4
/10V_4
/10V_4
/6.3V_8
/6.3V_8
0_6
0_6
10u
10u
VDD33 - 3.3V I/O
*short0805
*short0805
1.1V_NB
VDDC - Core Logic power
C533
C533
C467
C467
0.1u
0.1u
0.1u
0.1u
/10V_4
/10V_4
/10V_4
/10V_4
C457
C457
/6.3V_8
/6.3V_8
VDD_MEM For UMA RS780
VCC1.8
VCC3
C473
C473
0.1u
0.1u
/10V_4
/10V_4
RX
A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9
K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16
AE10 AA11 Y11 AD10 AB10 AC10
H11 H12
RS780 POW
+1.1V_VDD_PCI
A2
D3
G1
H7
J4
R7
L1
L2
L4
L7
M6
N4
P6
R1
R2
R4
V7
U4
V8
V6
W1
W2
W4
W7
W8
Y6
AA4
AB5
AB1
AB7
AC3
U10F
U10F
VSSAPCIE1
VSSAPCIE2B1VSSAPCIE3
VSSAPCIE4D5VSSAPCIE5E4VSSAPCIE6
VSSAPCIE7G2VSSAPCIE8G4VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
Y21
W25
AD25
C514
C514
0.1u
0.1u
C486
C486
4.7U/6.3V_6
4.7U/6.3V_6
R338
R338
R136
R136
VSSAPCIE30
VSS11
VSS12
L12
M14
C538
C538
4.7U/6.3V_6
4.7U/6.3V_6
C205
C205
4.7U/6.3V_6
4.7U/6.3V_6
/10V_4
/10V_4
N13
C516
C516
0.1u
0.1u
D D
C C
B B
VDDA18PCIE ­PCIE TX stage I/O for RS780
6/6
6/6
PART
PART
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
J22
L17
L22
L24
H19
L25
M20
1.1V_NB
N22
P20
A25
E22
D23
G22
G24
G25
VDDHT - HT LINK digital I/O for RS780
VDDHTRX - HT LINK RX I/O for RS780
2V 2A for RS780M+SB700
+1.
L17
VCC1.2
L17
BLM
BLM
21PG221SN1D(220_100M_2A)_8
21PG221SN1D(220_100M_2A)_8
VDDHTTX - HT LINK TX I/O for RS780
+1.8V 1A for RS780M+SB700
L52
VCC1.8
BLM
BLM
21PG221SN1D(220_100M_2A)_8
21PG221SN1D(220_100M_2A)_8
L52
VDD18 - RS780 I/O transform
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT21
VSSAHT20
R19
R22
R24
R25
U22
H20
+1.1V 2A
L53
L53 BLM
BLM
21PG221SN1D(220_100M_2A)_8
21PG221SN1D(220_100M_2A)_8
L23
L23
21PG221SN1D(220_100M_2A)_8
21PG221SN1D(220_100M_2A)_8
BLM
BLM
C161
C161
4.7U/6.3V_6
4.7U/6.3V_6
C522
C522
4.7U/6.3V_6
4.7U/6.3V_6
VCC1.8
VCC1.8
VSSAHT22
VSSAHT23
V19
W22
W24
for RS780M
AC4
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
GROUND
GROUND
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
T12
P12
P15
R11
R14
U14
C495
C495
0.1u
0.1u
C490
C490
0.1u
0.1u
C535
C535
0.1u
0.1u
/10V_4
/10V_4
C500
C500
0.1u
0.1u
/10V_4
/10V_4
*short0603
*short0603
C458
C458 1u/10V_4
1u/10V_4
*short0603
*short0603
VDD18_MEM For UMA RS780
AE1
AE4
AB2
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS20
VSS21
VSS22
V12
U11
U15
W11
/10V_4
/10V_4
/10V_4
/10V_4
/10V_4
/10V_4
C170
C170 1u/10V_4
1u/10V_4
AE14
VSS1
VSS23
VSS24
VSS25
W15
AC12
C510
C510
0.1u
0.1u
C203
C203
0.1u
0.1u
C529
C529
0.1u
0.1u
+1.8V_VDDA
C472
C472
0.1u
0.1u
D11
AA14
+1.1V_VDDHT
+1.1V_VDDHT
+1.2V_VDDHT
/10V_4
/10V_4
VSS2
VSS3G8VSS4
VSS26
VSS27
Y18
/10V_4
/10V_4
/10V_4
/10V_4
/10V_4
/10V_4
+1.8V_VDDG18_NB
+1.8V_VDD18_M
E14
VSS28
AB11
E15
VSS5
VSS29
AB15
J12
J15
VSS6
VSS30
AB17
AB19
C505
C505
0.1u
0.1u
C200
C200
0.1u
0.1u
C555
C555
0.1u
0.1u
18PCIE
C492
C492
0.1u
0.1u
K14
VSS7
VSS8
VSS31
VSS32
AE20
RX
TX
M11
VSS9
VSS33
AB21
/10V_4
/10V_4
/10V_4
/10V_4
/10V_4
/10V_4
/10V_4
/10V_4
L15
VSS10
VSS34
K11
EM
M16
AE25 AD24 AC23 AB22 AA21
W1
M17
M10
AD9
AE11 AD11
J17 K16 L16
P16 R16 T16
H18 G19 F20 E21 D22 B23 A23
Y2 V18
U17 T17 R17 P17
J10 P10 K10
L10
T10 R10
AA9 AB9
AE9 U10
W9
H9
Y9
F9
G9
U10E
U10E
VDDHT_1 VDDHT_2 VDDHT_3 VDDHT_4 VDDHT_5 VDDHT_6 VDDHT_7
VDDHTRX_1 VDDHTRX_2 VDDHTRX_3 VDDHTRX_4 VDDHTRX_5 VDDHTRX_6 VDDHTRX_7
VDDHTTX_1 VDDHTTX_2 VDDHTTX_3 VDDHTTX_4 VDDHTTX_5
0
VDDHTTX_6
9
VDDHTTX_7 VDDHTTX_8 VDDHTTX_9 VDDHTTX_10 VDDHTTX_11 VDDHTTX_12 VDDHTTX_13
VDDA18PCI VDDA18PCI VDDA18PCI VDDA18PCI VDDA18PCI VDDA18PCI VDDA18PCI VDDA18PCI VDDA18PCI VDDA18PCI VDDA18PCI VDDA18PCI VDDA18PCI VDDA18PCI VDDA18PCI
VDDG18_1( VDDG18_2( VDD18_MEM1( VDD18_MEM2(
RS780
RS780
PART
PART
E_1 E_2 E_3 E_4 E_5 E_6 E_7 E_8 E_9 E_10 E_11 E_12 E_13 E_14 E_15
VDD18_1) VDD18_2)
NC) NC)
VDDPCI
5/6
5/6
VDDPCI VDDPCI VDDPCI VDDPCI VDDPCI VDDPCI VDDPCI
VDDPCI VDDPCI VDDPCI VDDPCI VDDPCI VDDPCI VDDPCI VDDPCI VDDPCI
POWER
POWER
VDD_MEM1( VDD_MEM2( VDD_MEM3( VDD_MEM4( VDD_MEM5( VDD_MEM6(
VDDG33_1( VDDG33_2(
PIN NAME VDDHT VDDHT VDDHTTX VDDA18PCIE VDDG18 VDD18_MEM +1.8V VDDPCIE VDDC VDD_MEM VDDG33
OPLLVDD18
I
E_1 E_2 E_3 E_4 E_5 E_6 E_7 E_8
E_9 E_10 E_11 E_12 E_13 E_14 E_15 E_16 E_17
VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8
VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22
NC) NC) NC) NC) NC) NC)
NC) NC)
A A
Qu
Qu
Qu
anta Computer Inc.
anta Computer Inc.
anta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
R
R
R
S780M-POWER4/4
S780M-POWER4/4
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
S780M-POWER4/4
PROJECT :
ZN1
ZN1
ZN1
1A
1A
1A
of
of
of
41Friday, May 08, 2009
41Friday, May 08, 2009
41Friday, May 08, 2009
13
13
13
1
5
R42
RST#12
R42
+1.
2V_PCIE_VDDR
L13
L13
#32
LPC_RST
NB_PLT PLT
RST#12,16,20,24,27,30
D D
-Link
To A
VCC1.2_SB
PCIE_PVDD-- PCIE PLL POWER
C C
Vender suggest
Reserve componet
C612
C612
*10P/50V_4
*10P/50V_4
C613
C613
*10P/50V_4
*10P/50V_4
B B
R399
R399
*20M
*20M
_6
_6
A A
*14.318M
*14.318M
21
4
R400
R400
C591
C591 18p/50V_4
18p/50V_4
HZ/20P
HZ/20P
Y6
Y6
Y5
Y5
32.768KHZ
32.768KHZ 20M_6
20M_6
_X1
25M
R441
R441
_6
_6
*10M
*10M
25M
_X2
C_X1
RT
23
RT
C_X2
1
C592
C592 18p/50V_4
18p/50V_4
AL
CPU_PROCHOT CPU_PW CPU_LDT CPU_LDT
R45
R45 R41
R41
PCI
E_SB_NB_RX0P11
PCI
E_SB_NB_RX0N11
PCI
E_SB_NB_RX1P11
PCI
E_SB_NB_RX1N11
PCI
E_SB_NB_RX2P11
PCI
E_SB_NB_RX2N11 E_SB_NB_RX3P11
PCI
E_SB_NB_RX3N11
PCI
E_NB_SB_TX0P11
PCI
E_NB_SB_TX0N11
PCI
E_NB_SB_TX1P11
PCI
E_NB_SB_TX1N11
PCI PCI
E_NB_SB_TX2P11
PCI
E_NB_SB_TX2N11
PCI
E_NB_SB_TX3P11
PCI
E_NB_SB_TX3N11
SBSRC_CLKP3 SBSRC_CLKN3
VCC1.8
VCC3
LOW_LDTSTOP12
RGD6
_STOP#6,12 _RST#6,12
0_4
0_4
0_4
0_4 0_4
0_4
BLM18PG221SN1D(220_1.4A)_6
BLM18PG221SN1D(220_1.4A)_6
#6
R92
R92 R91
R91
T51T5
1
T50T5
0
T146T1
46
T145T1
45
T41T4
1 9
T39T3
47
T147T1
5
T55T5
9
T49T4 T44T4
4
T40T4
0
T42T4
2
T46T4
6
8
T38T3
R87 1K/FR87 1K/F R386
R386
C569
C569 C570
C570 C568
C568 C566
C566 C563
C563 C565
C565 C120
C120 C121
C121
*1K/F
*1K/F
12
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
562/F_4
562/F_4
2.05K/F_4
2.05K/F_4
C140
C140
2.2U_0805
2.2U_0805
ALLOW_LDTSTOP CPU_PW
CPU_LDT CPU_LDT
R46
R46
PCI PCI PCI PCI PCI PCI PCI PCI
33_4
33_4
_RX0P_C
A
_RX0N_C
A
_RX1P_C
A A
_RX1N_C _RX2P_C
A A
_RX2N_C
A
_RX3P_C
A
_RX3N_C
E_NB_SB_TX0P E_NB_SB_TX0N E_NB_SB_TX1P E_NB_SB_TX1N E_NB_SB_TX2P E_NB_SB_TX2N E_NB_SB_TX3P E_NB_SB_TX3N
PCI
E_CALRP_SB
PCI
E_CALRN_SB
+1.2V_PCI
E_PVDD
C136
C136 1u
1u
/10V_4
/10V_4
SBSRC_CLKPSBSRC_CLKPSBSRC_CLKPSBSRC_CLKP SBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKN
NB_DI
SP_CLKP
NB_DI
SP_CLKN
_CLKP
NB_HT
_CLKN
NB_HT
_CLKP
CPU_HT
_CLKN
CPU_HT SLT
_GFX_CLKP _GFX_CLKN
SLT GPP_CLK0P
GPP_CLK0N GPP_CLK1P
GPP_CLK1N GPP_CLK2P
C_X1
RT
RTC_X2
RGD
_STOP# _RST#
4
A
25M
25M
U20A
U20A
_RST#_SB
N2
A
_RST#
V23
PCI
E_TX0P
V22
PCI
E_TX0N
V24
PCI
E_TX1P
V25
PCI
E_TX1N
U25
PCI
E_TX2P
U24
PCI
E_TX2N
T23
E_TX3P
PCI
T22
E_TX3N
PCI
U22
E_RX0P
PCI
U21
E_RX0N
PCI
U19
E_RX1P
PCI
V19
PCI
E_RX1N
R20
PCI
E_RX2P
R21
PCI
E_RX2N
R18
PCI
E_RX3P
R17
PCI
E_RX3N
T25
PCI
E_CALRP
T24
PCI
E_CALRN
P24
E_PVDD
PCI
P25
E_PVSS
PCI
N25
E_RCLKP/NB_LNK_CLKP
PCI
N24
E_RCLKN/NB_LNK_CLKN
PCI
K23
SP_CLKP
NB_DI
K22
SP_CLKN
NB_DI
M24
NB_HT
_CLKP
M25
NB_HT
_CLKN
P17
CPU_HT
M18 M23
M22
M1 M2
N22
_X1
_X2
G25 G24
_CLKP
CPU_HT
_CLKN
SLT
_GFX_CLKP
SLT
_GFX_CLKN
J19
GPP_CLK0P
J18
GPP_CLK0N
L20
GPP_CLK1P
L19
GPP_CLK1N
9
GPP_CLK2P
0
GPP_CLK2N GPP_CLK3P
P22
GPP_CLK3N
L18
25M
_48M_66M_OSC
J21
_X1
25M
J20
_X2
25M
A3
X1
B3
X2
F23
LLOW_LDTSTP
A
F24
PROCHOT#
F22
LDT
_PG _STP#
LDT LDT
_RST#
SB700
SB700
IC CTRL(528P) SB700 A11(218S7EALA11FG) P/N : AJA12FG0T25
100M
TAL
TAL
RTC X
RTC X
HZ
P
P
U
U CP
CP
S
S
art 1 of 5
art 1 of 5
I EXPRESS INTERFACE
I EXPRESS INTERFACE PC
PC
B700
B700
PCI CLKS
PCI CLKS
CI INTERFACE
CI INTERFACE P
P
OCK GENERATOR
OCK GENERATOR CL
CL
LPC
LPC
LDRQ1#/GNT
REQ#/REQ5#/GPIO65
BM
I
C
C RT
RT
PCI
CLK0
PCI
CLK1
PCI
CLK2
PCI
CLK3
PCI
CLK4
PCI
CLK5/GPIO41
RST#
PCI
AD AD AD AD AD AD AD AD AD
AD AD AD AD AD AD AD AD AD AD AD AD AD AD AD AD AD AD AD AD AD AD AD
CBE0# CBE1# CBE2# CBE3#
F
RAME#
DEVSEL#
I
RDY#
T
RDY#
PA OP#
ST PERR# SERR# REQ0# REQ1# REQ2#
REQ3#/GPI
O70
REQ4#/GPI
O71 GNT GNT GNT
GNT
3#/GPIO72
GNT
4#/GPIO73
CLKRUN#
LOCK#
TE#/GPIO33
IN
TF#/GPIO34
IN
TG#/GPIO35
IN
TH#/GPIO36
IN
LPCCLK0 LPCCLK1
LA LA LAD2 LA
LFRAME#
LDRQ0#
5#/GPIO68
SERI
RTCCLK
NTRUDER_ALERT#
VBA
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
0# 1# 2#
D0 D1
D3
RQ
0 1 2 3 4 5 6 7 8 9
R
T
3
P4 P3 P1 P2 T4 T3
N1
U2 P7 V4 T1 V3 U1 V1 V2 T2 W1 T9 R6 R7 R5 U8 U5 Y7 W8 V9 Y8 AA8 Y4 Y3 Y2 AA2 AB4 AA1 AB3 AB2 AC1 AC2 AD1 W2 U7 AA7 Y1 AA6 W5 AA5 Y5 U6 W6 W4 V7
3
AC
4
AD
7
AB AE6 AB6 AD2 AE4 AD5 AC6 AE5 AD
6
V5 AD3
AC4 AE2 AE3
G22 E22 H24 H23 J25 J24 H25 H22 AB8 AD7 V15
C3 C2 B2
_CLK0_R
PCI
_CLK2_R
PCI
_CLK3_R
PCI
_CLK4_R
PCI PCI
_CLK5_R
PCI
RST#_L
AD
23
AD
24
AD
25
AD
26
AD
27
AD
28
O1
PE_GPI
CLKRUN#_R
IN
TE#
IN
TF#
IN
TG#
IN
TH#
LPC_CLK0
D0
LA
D1
LA LAD2 LA
D3 LFRAME# LDRQ0#_SB LDRQ1#_SB
O65
SB_GPI SERIRQ
RT
C_CLK I
NTRUDER_ALERT#
C
VCCRT
R446
R446
2
PE_GPI
R61
R61
O1
R58
R58
T19T1
9 3
R420
R420 R419
R419 R417
R417 R418
R418
R401
R401
33_4
33_4
172T172
T
R412
R412
2.2K
2.2K
T14T1
4
T166T1
66 63
T163T1
7
T17T1
64
T164T1
0
T20T2
67
T167T1
65
T165T1
73
T173T1 T168T1
68
R85
R85
T54T54 T18T1
8
T21T2
1
SERI
RT
T178T178
VCC3
300_4
300_4
T13T1
22_4
22_4 22_4
22_4 22_4
22_4 22_4
22_4
PCI
RST#
3VPCU
A
D23 18
A
D24 18
A
D25 18
A
D26 18 D27 18
A
D28 18
A
T
R413
R413
2.2K
2.2K
LCD_ON
22_4
22_4
PCLK_EC
LA
D0 30,32 D1 30,32
LA
D2 30,32
LA LAD3 30,32
LFRAME#
RQ 32
C_CLK 18
PCI
_CLK2 18
PCI
_CLK3 18
PCI
_CLK4 18
PCI
_CLK5 18
RST# 30
PCI
All the PCI bus has build-in Pull-UP/Down resistors
RTC
D2
D2
179T179
DFHS02FS561
DFHS02FS561
CR_W
19
BA
BA
AKE# 27
CN7
CN7
T_CONN
T_CONN
18,32
CH500H-40
CH500H-40
R392
R392
R455
R455
12
VCCRT
5VPCU
22_4
22_4
FOR EMI
VCCRTC
C593
C593
/10V_4
/10V_4
0.1u
0.1u
PCI
RST#
O65
SB_GPI
R209
R209
C
12
G2
/10V_4
/10V_4
G2 *SHORT
*SHORT
_PAD
_PAD
R25
R25 510_0603
510_0603
C53
C53
0.1u
0.1u
R571+R667 = (5V - 0.2V-2V)/0.2mA = 14k
R26
R26
2.2K
2.2K
R39
R39
4.7K
4.7K
R38
R38 15K_6
15K_6
22_4
22_4
PCLK_EC
PCLK_DBC
PCLK_DBC1
PCLK_DBC
PCLK_DBC1 18
D0
LA
R442
R442
D1
LA
R443
R443
LA
D2
R444
R444
D3
LA
R445
R445
*0_6
*0_6
30
R422
R422
R65
R65
VCCRT
CLEA
C59
C59 1u
1u
/10V_4
/10V_4
C_3
C620
C620
1 2
C621
C621
1 2
C622
C622
1 2
10K/F_4
10K/F_4 10K/F_4
10K/F_4 10K/F_4
10K/F_4 10K/F_4
10K/F_4
8.2K_4
8.2K_4 *8.2K_4
*8.2K_4
10K/F_4
10K/F_4
10K/F_4
10K/F_4
R_CMOS 32
*10P
*10P
*10P
*10P
*10P
*10P
Q13
Q13
MBT3904
MBT3904
M
M
2
FOR EMI
VCC3
14
VCC3
C60
C60
0.1u
0.1u
/10V_4
/10V_4
13
VCC3
1
ME#_EC30,32
LFRA
5
4
D59
Si
Si
Size Document Number Rev
ze Document Number Rev
ze Document Number Rev
S
S
S
B700-PCIE/PCI/CPU/LPC 1/4
B700-PCIE/PCI/CPU/LPC 1/4
B700-PCIE/PCI/CPU/LPC 1/4
Date: Sheet
Date: Sheet
3
2
Date: Sheet
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZN1
ZN1
ZN1
of
14
of
14
of
14
41Friday, May 08, 2009
41Friday, May 08, 2009
1
41Friday, May 08, 2009
B
B
B
LFRAME#LFRAME#_EC
CH500H-40
CH500H-40
D59
5
RVCC3
R
R
408 *2.2K_4
408 *2.2K_4
R
R
35 *2.2K_4
35 *2.2K_4
34 *2.2K_4
34 *2.2K_4
R
R
RVCC3
D D
C C
409 *10K/F_4
409 *10K/F_4
R
R
VCC3
Clock gen /DDR2 /MINI CARD/NEW CARD
R8
R8
3 2.2K_4
3 2.2K_4
R8
R8
4 2.2K_4
4 2.2K_4
RVCC3
406 2.2K_4
406 2.2K_4
R
R R
R
405 2.2K_4
405 2.2K_4
RVCC3
R
R
391 2.2K_4
391 2.2K_4
R
R
388 2.2K_4
388 2.2K_4
VCC3
R
R
407 *3K_4
407 *3K_4
T
BITCLK_AUDIO29
ACZ_
B B
SDOUT_AUDIO29
ACZ_
SYNC_AUDIO29
ACZ_
ACZ_
RESET#_AUDIO29
ACZ_
TEST0
SB_
SB_
TEST1
SB_
TEST2
SW
P
CLK_SMB
PDAT_
SMBCLK1
SB_
SMBDATA1
SB_
SB_ SB_
o Azalia
SDIN029
I#
SMB
SCLK2 SDATA2
SUS_
STAT#
04 33
04 33
R4
R4
595 *10P/50V_4
595 *10P/50V_4
C
C
02 33
02 33
R4
R4
594 *10P/50V_4
594 *10P/50V_4
C
C
8 33
8 33
R2
R2
58 *10P/50V_4
58 *10P/50V_4
C
C
R3
R3
3 33
3 33
R3
R3
1 *33
1 *33
R30 33R30 33
ADD for BIOS Write Protect
THERM
BITCLK
AZ_
AZ_
SDOUT
AZ_
SYNC
AZ_
SDIN0
AZ_SDIN1
RST#
AZ_
PCI SW CPU_ WD
RSM
del power control to MXM 12V&RST MXM
d
GPU_PWR_EN#20 IOS_WP#32
B
d
RT
_ALERT#6
NB_
TALERT#12
GPU_RUNPWROK20
2824
E_WAKE#24,30 I#32
_PWRGD18
W
R4
R4 *10K_4
*10K_4
R3
R3 *10K_4
*10K_4
SUSB#32 SUSC#32 DNBSW SB_ SUS_
ATEA2032
G RCI SCI KBSM
THERMTRIP#6
RST#32
RITE_EDID_ROM19
d
GPU_PRSNT#20,32
R
R
03
03
2
2
4
ON#32
PWRGD_IN18
STAT#12
N#32 #32
I#32
T183T183
SPKR29
PCL
K_SMB3,8,19,30
SMB3,8,19,30
PDAT_
ENERG
CR_
CPPE#27
USB_ USB_ USB_ USB_ USB_ USB_
27 0_4
27 0_4
NB_
AZ_
T175T175 T170T170 T27T27
T176T176 T181T181
Y_DET24
T45T45
OCP5#26 OCP4#26 OCP3#26 OCP2#26 OCP1#26 OCP0#26
TALERT#
RST#18
d
GPU_PWR_EN#
395 0_4
395 0_4
R
R
USB_ USB_ USB_ USB_ USB_ USB_
BALERT#_1
SM
#
RI SL
P_S2 SUSB# SUSC# DNBSW SB_
PWRGD_IN
STAT#
SUS_
TEST2
SB_
TEST1
SB_ SB_
TEST0
G
ATEA20
N#
RCI SCI
#
KBSM
S_RST#
SY
E_WAKE#
PCI
THERMTRIP#
CPU_ WD
_PWRGD
RSM
RST#
ACZ_
SPKR
K_SMB
PCL PDAT_
SMBCLK1
SB_ SB_
SMBDATA1
SES_
INT
410 *0_4
410 *0_4
R
R
OCP5# OCP4# OCP3# OCP2# OCP1# OCP0#
AZ_
BITCLK
AZ_
SDOUT SDIN0
AZ_ AZ_
SDIN1
SYNC
AZ_
RST#
AZ_
HD audio interface is
3.3V voltage
SW
SMB
ON#
T156T156
CR_
I#
I#
CPPE#R
3
U2
U2
0D
0D
E1
_PME#/GEVENT4#
PCI
E2
RI
#/EXTEVNT0#
H7
SL
P_S2/GPM9#
F5
P_S3#
SL
G1
P_S5#
SL
H2
PW
R_BTN#
H1
P
WR_GOOD
K3
STAT#
SUS_
H5
TEST2
H4
TEST1
H3
TEST0
Y15
A20IN/GEVENT0#
G
AE18 AD18 AA19
AA18
AA20
W15
W14
W17 W20
W21 W18
/GEVENT1#
KBRST#
K4
L
PC_PME#/GEVENT3#
K24
L
PC_SMI#/EXTEVNT1#
F1
S3
_STATE/GEVENT5#
J2
S_RESET#/GPM7#
SY
H6
AKE#/GEVENT8#
W
F2
B
LINK/GPM6#
J6
SM
BALERT#/THRMTRIP#/GEVENT2#
PWRGD
NB_
D3
RSM
RST#
ATA_IS0#/GPIO10
S CL
K_REQ3#/SATA_IS1#/GPIO6
MARTVOLT/SATA_IS2#/GPIO4
S
K_REQ0#/SATA_IS3#/GPIO0
CL
V17
LK_REQ1#/SATA_IS4#/FANOUT3/GPIO39
C C
LK_REQ2#/SATA_IS5#/FANIN3/GPIO40
GPIO2
SPKR/
CL0/GPOC0#
S
DA0/GPOC1#
S
K1
CL1/GPOC2#
S
K2
S
DA1/GPOC3#
_SCL/GPIO9
DDC1
Y18
D
DC1_SDA/GPIO8
C1
LB#/GPIO66
L
Y19
S
HUTDOWN#/GPIO5
G5
_RST#/GEVENT7#
DDR3
B9
USB_
OC6#/IR_TX1/GEVENT6#
B8
U
SB_OC5#/IR_TX0/GPM5#
A8
SB_OC4#/IR_RX0/GPM4#
U
A9
SB_OC3#/IR_RX1/GPM3#
U
E5
U
SB_OC2#/GPM2#
F8
SB_OC1#/GPM1#
U
E4
U
SB_OC0#/GPM0#
M1
AZ_
BITCLK
M2
AZ_
SDOUT
J7
SDIN0/GPIO42
AZ_
J8
SDIN1/GPIO43
AZ_
L8
SDIN2/GPIO44
AZ_
M3
AZ_
SDIN3/GPIO46
L6
SYNC
AZ_
M4
AZ_
RST#
L5
DOCK_RST#/GPM8#
AZ_
H19
C_GPIO0
IM
H20
IM
C_GPIO1
H21
PI_CS2#/IMC_GPIO2
S
F25
ID
E_RST#/F_RST#/IMC_GPO3
D22
IM
C_GPIO4
E24
IM
C_GPIO5
E25
IMC_GPIO6
D23
IM
C_GPIO7
SB700
SB700
UDIO
UDIO HD A
HD A
SB700
SB700
USB OC
USB OC
TEGRATED uC
TEGRATED uC IN
IN
U
PI / WAKE UP EVENTS
PI / WAKE UP EVENTS AC
AC
rt 4 of 5
rt 4 of 5
Pa
Pa
SBCLK/14M_25M_48M_OSC
USB MISC
USB MISC
IO
IO GP
GP
IM
IM
IM IM
INTEGRATED uC
INTEGRATED uC
RCOMP
USB_
USB_
FSD13P FSD13N
USB_
FSD12P
USB_
FSD12N
USB_
SB 1.1
SB 1.1 U
U
USB_
HSD11P
USB_
HSD11N HSD10P
USB_ USB_
HSD10N
HSD9P
USB_
HSD9N
USB_
HSD8P
USB_ USB_
HSD8N HSD7P
USB_ USB_
HSD7N HSD6P
USB_
HSD6N
USB_
HSD5P
USB_
HSD5N
USB_
SB 2.0
SB 2.0
HSD4P
USB_
U
U
USB_
HSD4N
USB_
HSD3P HSD3N
USB_
HSD2P
USB_
HSD2N
USB_
HSD1P
USB_ USB_
HSD1N
USB_
HSD0P
USB_
HSD0N
C_GPIO8
IM
C_GPIO9
IM
C_PWM0/IMC_GPIO10
CL2/IMC_GPIO11
S S
DA2/IMC_GPIO12
CL3_LV/IMC_GPIO13
S S
DA3_LV/IMC_GPIO14
C_PWM1/IMC_GPIO15
C_PWM2/IMC_GPO16 C_PWM3/IMC_GPO17
IM
C_GPIO18 C_GPIO19
IM IM
C_GPIO20 C_GPIO21
IM IM
C_GPIO22
IM
C_GPIO23 C_GPIO24
IM IM
C_GPIO25
IM
C_GPIO26 C_GPIO27
IM IM
C_GPIO28
IM
C_GPIO29
IM
C_GPIO30
IM
C_GPIO31 C_GPIO32
IM IM
C_GPIO33 C_GPIO34
IM IM
C_GPIO35 C_GPIO36
IM IM
C_GPIO37 C_GPIO38
IM IM
C_GPIO39
IM
C_GPIO40
IMC_GPIO41
2
K_48M_USB
CL
C8
RCOMP_SB
USB_
G8
DELETE T159(E7)
FSD13P
USB_
E6 E7
USB_
FDS12P
F7
FSD12N
USB_
E8 H11
DELETE T31(H11) and T35(J10)
J10 E11
F11 A11
B11 C10
D10 G11
H12 E12
E14 C12
D12 B12
A12 G12
G14 H14
H15 A13
B13 B14
A14 A18
B18 F21 D21 F19 E20 E21 E19 D19 E18
G20 G21 D25 D24 C25 C24 B25 C23
B24 B23 A23 C22 A22 B22 B21 A21 D20 C20 A20 B20 B19 A19 D18 C18
SCLK2
SB_ SB_
SDATA2
B_GPIO16
S S
B_GPIO17
USBP8 USBP8
USBP7 USBP7
USBP6 USBP6
USBP5 USBP5
USBP4 USBP4
USBP3 USBP3
USBP2 USBP2
USBP1 USBP1
USBP0 USBP0
T36T36 T34T34
+ 22
- 22 + 30
- 30 + 30
- 30 + 26
- 26 + 26
- 26 + 26
- 26 + 26
- 26 + 26
- 26 + 26
- 26
K_48M_USB 3
CL
67 11.8K/F_6
67 11.8K/F_6
R
R
CPU_ CPU_
T10T10
T30T30 T24T24
T32T32 T33T33
TO WEBCAM
TO BLUETOOTH
TO WLAN
TO SIDE USB
TO SIDE USB
To M/B USB
To M/B USB
To M/B USB
To M/B USB
SIC 6 SID 6
T182T182
B_GPIO16 18
S S
B_GPIO17 18
SPI
/LPC define
K_48M_USB
CL
R6
R6
4
4
*10_6
*10_6
2
2
C7
C7 *10p/50V_4
*10p/50V_4
for EMI
1
15
A A
uanta Computer Inc.
uanta Computer Inc.
uanta Computer Inc.
Q
Q
Q
PROJECT :
PROJECT :
Size Document Number Rev
ze Documen t Number Rev
ze Documen t Number Rev
Si
Si
SB700-ACPI/GPIO/USB 2/4
SB700-ACPI/GPIO/USB 2/4
SB700-ACPI/GPIO/USB 2/4
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT :
ZN1
ZN1
ZN1
1A
1A
1A
of
15
of
15
of
15
41Friday, May 08, 2009
41Friday, May 08, 2009
1
41Friday, May 08, 2009
5
4
3
2
1
16
PL
ACE SATA AC COUPLING
CAPS CLOSE TO SB700
TA_TXP0_C
0.01u/16V_4
0.01u/16V_4
C585
SA
TA_TXP028
SA
D D
To H
DD
To OD
C C
NOTE:
R361 IS 1K 1% FOR 25MHz XTAL, 4.99K 1% FOR 100MHz INTERNAL CLOCK
B B
VCC1.2_SB
(
1.2V @ 60mA)
BLM
BLM
18PG221SN1D(220_1.4A)_6
18PG221SN1D(220_1.4A)_6
L9
L9
2.2u
2.2u
/6.3V_6
/6.3V_6
+1.2V_PLLVDD_SA
C90
C90
TA_TXN028
SA
TA_RXN028 TA_RXP028
SA
D
ACE SATA_CAL
PL RES VERY CLOSE TO BALL OF SB700
TA
77mA
C88
C88
0.1u
0.1u
/10V_4
/10V_4
SA
TA_TXP328
SA
TA_TXN328
TA_RXN328
SA
TA_RXP328
SA
PLVDD_SATA-­SATA PLL POWER
C585
0.01u/16V_4
0.01u/16V_4
C588
C588 C85
C85
0.01u/16V_4
0.01u/16V_4
C79
C79
0.01u/16V_4
0.01u/16V_4
C575
C575
0.01U/16V_4
0.01U/16V_4
C580
C580
0.01U/16V_4
0.01U/16V_4
C104
C104
0.01U/16V_4
0.01U/16V_4
C108
C108
0.01U/16V_4
0.01U/16V_4
7
T37T3
48
T148T1 T149T1
49
T150T1
50
R361
R72
R72
1K/F_4
1K/F_4
SA
TA_LED#28,31
XTLVDD_SATA-- SATA crystal power
C95
C95
33P/50V_4
33P/50V_4
Y1
Y1
C91
C91
33P/50V_4
33P/50V_4
change value to 33p
Vender suggest
SA SA
SA SA
SA SA
SA SA
SA SA
SA SA
SA
TA_RBIAS_PN
SA
TA_LED#
+1.2V_PLLVDD_SA
TLVDD_SATA
+3V_X
Hz/20pF/25ppm
Hz/20pF/25ppm
25M
25M
R71
R71 10M
2 1
10M
TA_TXN0_C TA_RXN0_C
TA_RXP0_C
TA_TXP3_C TA_TXN3_C
TA_RXN3_C TA_RXP3_C
TA_TXP5_C TA_TXN5_C
TA_RXN5_C TA_RXP5_C
SA
TA_X1
SA
TA_X2
TA
TA_X1
SA
_6
_6
SA
TA_X2
AD9 AE9
AB10
AC10
AE10
AD10 AD11
AE11 AB12
AC12
AE12
AD12 AD13
AE13 AB14
AC14
AE14
AD14 AD15
AE15 AB16
AC16
AE16
AD16
AA12
W11
AA11
W1
V12 Y1
U20B
U20B
SATA_TX0P SATA_TX0N
SATA_RX0N SATA_RX0P
SATA_TX1P SATA_TX1N
SATA_RX1N SATA_RX1P
SATA_TX2P SATA_TX2N
SATA_RX2N SATA_RX2P
SATA_TX3P SATA_TX3N
SATA_RX3N SATA_RX3P
SATA_TX4P SATA_TX4N
SATA_RX4N SATA_RX4P
SATA_TX5P SATA_TX5N
SATA_RX5N SATA_RX5P
SATA_CAL
2
SATA_X1 SATA_X2 SATA_ACT#/
PLLVDD_SATA
2
XTLVDD_SATA
SB700
SB700
GPIO67
SB7
SB7
Part
Part
IAL ATA
IAL ATA SER
SER
A PWR
A PWR SAT
SAT
00
00
2 of 5
2 of 5
ROM
ROM SPI
SPI
TEMPI
HW MONITOR
HW MONITOR
ID
E_IORDY
ID
E_IRQ
I
DE_A0 I
DE_A1 DE_A2
I
DE_DACK#
I
DE_DRQ
I
E_IOR#
ID
E_IOW#
ID
I
DE_CS1#
ID
E_CS3#
I
DE_D0/GPIO15
I
DE_D1/GPIO16 DE_D2/GPIO17
I
DE_D3/GPIO18
I
DE_D4/GPIO19
I
DE_D5/GPIO20
I I
DE_D6/GPIO21
I
DE_D7/GPIO22
A 66/100/133
A 66/100/133
I
DE_D8/GPIO23
AT
AT
I
DE_D9/GPIO24
I
DE_D10/GPIO25
IDE_D11/GPIO26
DE_D12/GPIO27
I
DE_D13/GPIO28
I
DE_D14/GPIO29
I I
DE_D15/GPIO30
PI_DI/GPIO12
S
_DO/GPIO11
SPI
_CLK/GPIO47
SPI
_HOLD#/GPIO31
SPI
_CS#/GPIO32
SPI
LAN_RST#/
GPIO13
ROM_RST#/
GPIO14
FANOUT0/
GPIO3
FANOUT1/
GPIO48 GPIO49
FANOUT2/
N0/GPIO50
FANI
N1/GPIO51
FANI
N2/GPIO52
FANI
TEMP_COMM
TEMPI
N0/GPIO61
TEMPI
N1/GPIO62
TEMPI
N2/GPIO63
N3/TALERT#/GPIO64
N0/GPIO53
VI
N1/GPIO54
VI
N2/GPIO55
VI VI
N3/GPIO56
VI
N4/GPIO57
VI
N5/GPIO58
VI
N6/GPIO59
VIN7/GPIO60
AVDD AVSS
AA24 AA25 Y22 AB23 Y23 AB24 AD25 AC25 AC24 Y25 Y24
AD24 AD23 AE22 AC22 AD21 AE20 AB20 AD19 AE19 AC20 AD20 AE21 AB22 AD22 AE23 AC23
G6 D2 D1 F4 F3
U15 J1
M8 M5 M7
P5 P8 R8
C6 B6 A6 A5 B5
A4 B4 C4 D4 D5 D6 A7 B7
F6 G7
ROM
SB_FA
SB_FA
T13 T25
TE
5m
PW
MPIN0
VI VI VI VI
VI VI
A
_RST#
D_RST
NOUT1
NTACH0
N0 N1 N2 N3
R36
R36
N6 N7
+3V_VDD_HW
C75
C75
0.1u
0.1u
/10V_4
/10V_4
T177T1
77 1
T11T1 T171T1
71
69
T169T1
T22T2
2
T
162T162
T
161T161
T12T1
2
T9T9
*33
*33
T
157T157 158T158
T
M
C74
C74
2.2u
2.2u
D_RST
PW
N PASS WORD
CLEA
PW
Clear CMOS
N PASS WORD
CLEA
T15T1
5
160T160
T
RST_LAN# 24
PLT
RST_CARD# 27
PLT
RST_MINI# 30
PLT
PLT
RST# 12,14,20,24,27,30
L5
L6
/6.3V_6
/6.3V_6
AVDD--H/W monitor Analog power
JP3
JP3
2
1
4
3
6
5
8
7
4x2
4x2
CONN RCPT
CONN RCPT
JP2
D_RST
JP2
1 2
PAD
PAD
SHORT
SHORT
Clear Password
12
G3
G3 *SHORT
*SHORT
_PAD
_PAD
AMD suggest to connect to GND
RVCC3
0_6L50_6
VCC3
*0_6L6*0_6
VCC3
( 3.3V @ 1.2mA)
L8
L8
BLM18PG221SN1D(220_1.4A)_6
BLM18PG221SN1D(220_1.4A)_6
A A
5
1mA
+3V_XTLVDD_SATA
C93
C93
1u
1u
/10V_4
/10V_4
Place near ball
anta Computer Inc.
anta Computer Inc.
anta Computer Inc.
Qu
Qu
Qu
PROJECT :
PROJECT :
Size Document Number Rev
ze Document Number Rev
ze Document Number Rev
Si
Si
SB7
SB7
SB7
00-SATA/IDE/HWM/SPI 3/4
00-SATA/IDE/HWM/SPI 3/4
Date: Sheet
Date: Sheet
4
3
2
Date: Sheet
00-SATA/IDE/HWM/SPI 3/4
PROJECT :
ZN1
ZN1
ZN1
1A
1A
1A
of
of
of
41Friday, May 08, 2009
41Friday, May 08, 2009
16
16
16
1
41Friday, May 08, 2009
5
R44
R44
VCC3
100u
D D
C C
B B
2.2u
2.2u
A A
100u
VCC1.2_SB
VCC1.2_SB
F
or support USB wakeup-->3V_S5
C118
C118
/6.3V_6
/6.3V_6
*short0805
*short0805
12
C62
C62
/6.3V_3528
/6.3V_3528
R90
R90
VCC3
R89
R89
VCC1.8
L15
L15
BLM
BLM
18PG221SN1D(220_1.4A)_6
18PG221SN1D(220_1.4A)_6
BLM
BLM
18PG221SN1D(220_1.4A)_6
18PG221SN1D(220_1.4A)_6
RVCC3
18PG221SN1D(220_1.4A)_6
18PG221SN1D(220_1.4A)_6
BLM
BLM
12
C579
C579
1u
1u
1u
1u
/10V_4
/10V_4
RVCC_ON32,38
12
+
+
L10
L10
L54
L54
C98
C98
/10V_4
/10V_4
5
C63
C63 22U/6.3V_8
22U/6.3V_8
12 12
12
C577
C577
1u
1u
/10V_4
/10V_4
R591KR59
1 2
VDDQ--3.3V I/O power
12
0_8
0_8 *0_8
*0_8
12
C78
C78
C80
C80
0.1u
0.1u
/10V_4
/10V_4
/10V_4
/10V_4
0.1u
0.1u
.8V : FLASH MEMORY MODE(DE FAULT)
1
3.
3V: IDE MODE
VDD33_18--3.3V IDE I/O power
1.8V flash memory I/O power
12
C134
C134
C135
C135
*4.7U_0603
*4.7U_0603
*0.1u
*0.1u
PCIE_VDDR--PCIE I/O power
12
C142
C142
4.7U_0603
4.7U_0603
C139
C139
0.1u
0.1u
/10V_4
/10V_4
AVDD_SATA--SATA phy power
12
C101
C101
C103
C103
/10V_4
/10V_4
0.1u
0.1u
22U/6.3V_8
22U/6.3V_8
AVDDTX--USB Phy Analog I/O power
12
C581
C581
/6.3V_8
/6.3V_8
10u
10u
12
12
C576
C576
0.1u
0.1u
/10V_4
/10V_4
3VPCU
C73
C73
1u
1u
1K
/10V_4
/10V_4
12
C76
C76
0.1U_4
0.1U_4
U4
5
VIN
GND
4
VEN
G961U4G961
ADJ
12
12
C87
C87
C89
C89
/10V_4
/10V_4
/10V_4
/10V_4
1u
1u
0.1u
0.1u
12
C124
C124
/10V_4
/10V_4
/10V_4
/10V_4
*0.1u
*0.1u
12
12
C137
C137
C126
C126
/10V_4
/10V_4
/10V_4
/10V_4
1u
1u
0.1u
0.1u
12
C102
C102
/10V_4
/10V_4
0.1u
0.1u
12
12
C574
C574
C573
C573
/6.3V_8
/6.3V_8
10u
10u
0.1u
0.1u
12
12
C572
C572
C571
C571
0.1u
0.1u
0.1u
0.1u
/10V_4
/10V_4
1 2 3
VO
12
C127
C127 *0.1u
*0.1u
12
/10V_4
/10V_4
/10V_4
/10V_4
RVCC1.2
+3.3V_SB_R
12
C86
C86
/10V_4
/10V_4
1u
1u
+VDD33_18
/10V_4
/10V_4
+1.2V_PCI
12
C132
C132
/10V_4
/10V_4
1u
1u
+1.2V_A
C114
C114
/10V_4
/10V_4
1u
1u
+3V_A
VDD_USB
12
12
R74 0R74 0
1 2
R1
C96
C96 1u
1u
/10V_4
/10V_4
4
12
12
C122
C122 *0.1u
*0.1u
12
VDD_SATA
12
C578
C578
/10V_4
/10V_4
0.1u
0.1u
C97
C97
0.1u
0.1u
/10V_4
/10V_4
R2
4
C70
C70
/10V_4
/10V_4
1u
1u
/10V_4
/10V_4
E_VDDR
C117
C117
/10V_4
/10V_4
1u
1u
C109
C109
/10V_4
/10V_4
1u
1u
12
R73
R73 10K/F
10K/F
P
LACE ALL THE DECOUPLING CAPS ON
HIS SHEET CLOSE TO SB AS POSSIBLE.
T
U20C
U20C
L9
VDDQ_1
M9
VDDQ_2
T15
VDDQ_3
U9
VDDQ_4
U16
VDDQ_5
U17
VDDQ_6
V8
VDDQ_7
W7
VDDQ_8
Y6
VDDQ_9
AA4
VDDQ_10
AB5
VDDQ_11
AB21
VDDQ_12
Y2
0
VDD33_18_1
AA21
VDD33_18_2
AA22
VDD33_18_3
AE25
VDD33_18_4
P18
E_VDDR_1
PCI
P19
PCI
E_VDDR_2
P20
PCI
E_VDDR_3
P21
PCI
E_VDDR_4
R22
PCI
E_VDDR_5
R24
PCI
E_VDDR_6
R25
E_VDDR_7
PCI
AA14
AVDD_SATA_1
AB18
AVDD_SATA_4
AA15
AVDD_SATA_2
AA17
AVDD_SATA_3
AC18
AVDD_SATA_5
AD17
AVDD_SATA_6
AE17
AVDD_SATA_7
A16
AVDDTX_0
B16
AVDDTX_1
C16
AVDDTX_2
D16
AVDDTX_3
D17
AVDDTX_4
E17
AVDDTX_5
F15
AVDDRX_0
F17
AVDDRX_1
F18
AVDDRX_2
G15
AVDDRX_3
G17
AVDDRX_4
G18
AVDDRX_5
R397 *short0603R397 *short0603
12
C583
C583
0.1u
0.1u
/10V_4
/10V_4
VCC1.2_SB
L12
L12
BLM18PG221SN1D(220_1.4A)_6
BLM18PG221SN1D(220_1.4A)_6
0.1u
0.1u
00
00
SB7
SB7
Part
Part
3 of 5
3 of 5
CI/GPIO I/O
CI/GPIO I/O P
P
/FLSH I/O
/FLSH I/O IDE
IDE
WER
WER
PO
PO
-LINK I/O
-LINK I/O A
A
A I/O
A I/O SAT
SAT
SB I/O
SB I/O U
U
SB700
SB700
12
/10V_4
/10V_4
C584
C584
12
10u
10u
CKVDD_1. CKVDD_1. CKVDD_1. CKVDD_1.
LKGEN I/O
LKGEN I/O
3V_S5 I/OCORE S5
3V_S5 I/OCORE S5
3.
3.
USB_PHY USB_PHY
AVDDCK_3. AVDDCK_1.
PLL C
PLL C
+1.2V_USB_PHY_RRVCC1.2
C582
C582
/6.3V_8
/6.3V_8
3
L15
VDD_1
M12
VDD_2
M14
VDD_3
N13
VDD_4
P12
VDD_5
P14
VDD_6
RE S0
RE S0 CO
CO
+1.2V_A
R11
VDD_7
R15
VDD_8
T16
VDD_9
L21
2V_1
L22
2V_2
L24
2V_3
L25
2V_4
A17
S5_3.
3V_1
A24
S5_3.
3V_2
B17
S5_3.
3V_3
J4
3V_4
S5_3.
J5
3V_5
S5_3.
L1
3V_6
S5_3.
L2
3V_7
S5_3.
G2
S5_1.
2V_1
G4
S5_1.
2V_2
A10
_1.2V_1
B10
_1.2V_2
AE7
V5_VREF
J16
3V
K17
2V
E9
AVDDC
USB_PHY_1.2V--USB Phy digital power
12
VDDCK
AVDDCK_1.2--USB Phy digital power
12
C119
C119
2.2u
2.2u
/6.3V_6
/6.3V_6
3
VDD-- S/B CORE power
+1.2V_VCC_SB_R
12
12
C100
C100
/10V_4
/10V_4
1u
1u
CKVDD_1.2V-- Internal
12
C133
C133 *2.2u
*2.2u
LW_R
+3VA
C107
C107
2.2u
2.2u
+1.2V_USB_PHY
+3V_A
VDDCK
+1.2V_A
VDDCK
VDDC
+3V_A
clock Generator I/O power
/6.3V_6
/6.3V_6
/6.3V_6
/6.3V_6
_R
RVCC3
VCC3 +3V_A
+1.2V_CKVDD
+5V_VREF
C92 1u
1u
12
/10V_4
/10V_4
C138
C138 *0.1u
*0.1u
/50V_6
/50V_6
C94
C94
0.1u
0.1u
/10V_4
/10V_4
12
C143
C143 *0.1u
*0.1u
C99
C99
0.1u
0.1u
/50V_6
/50V_6
12
12
C92
S5_3.3--3.3v standby power
R76
R76
ange to 0603
Ch
12
C71
C71
2.2u
2.2u
+1.2VA
/6.3V_6
/6.3V_6
LW_R
12
C110
C110 10u
10u
/6.3V_8
/6.3V_8
S5_1.2V--1.2V standby power
R70
R70
12
C83
C83
C84
C84
/10V_4
/10V_4
1u
1u
1u
1u
V5_VREF--PCI 5V TOLERANCE
R398
R398
1 2
D57
/10V_4
/10V_4
/10V_4
/10V_4
D57
D56
D56
12
C81
C81
12
C590
C590 1u
1u
L7
L7
18PG221SN1D(220_1.4A)_6
18PG221SN1D(220_1.4A)_6
BLM
BLM
0.1u
0.1u
L11
L11
BLM18PG221SN1D(220_1.4A)_6
BLM18PG221SN1D(220_1.4A)_6
2
12
C77
C77
/10V_4
/10V_4
/6.3V_8
/6.3V_8
10u
10u
L14
L14
12
C141
C141
/6.3V_6
/6.3V_6
*2.2u
*2.2u
*short0603
*short0603
12
*short0603
*short0603
12
/10V_4
/10V_4
1K/F_4
1K/F_4
21
CH501H-40PT
CH501H-40PT
21
*CH501H-40PT
*CH501H-40PT
*:reserve
+3V_A
VDDC
AVDDC--USB Analog PLL power
C82
C82
2.2u/6.3V_6
2.2u/6.3V_6
VDDCK
AVDDCK_3.3--Analog system PLL power
12
C106
C106
/6.3V_6
/6.3V_6
2.2u
2.2u
2
1
R60
R60 *sh
*sh
ort0805
ort0805
12
VCC1.2_SB
*short0603
*short0603
12
VCC1.2_SB
RVCC3
RVCC1.2
VCC5
VCC3
VCC1.8
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
U20E
U20E
B700
B700
S
S
T10
AVSS_SATA_1
U10
AVSS_SATA_2
U11
AVSS_SATA_3
U12
AVSS_SATA_4
V11
AVSS_SATA_5
V14
AVSS_SATA_6
W9
AVSS_SATA_7
Y9
AVSS_SATA_8
Y1
1
AVSS_SATA_9
Y1
4
AVSS_SATA_10
7
Y1
AVSS_SATA_11
AA9
AVSS_SATA_12
AB9
AVSS_SATA_13
AB11
AVSS_SATA_14
AB13
AVSS_SATA_15
AB15
AVSS_SATA_16
AB17
AVSS_SATA_17
AC8
AVSS_SATA_18
AD8
AVSS_SATA_19
AE8
AVSS_SATA_20
A15
AVSS_USB_1
B15
AVSS_USB_2
C14
AVSS_USB_3
D8
AVSS_USB_4
D9
AVSS_USB_5
D11
AVSS_USB_6
D13
AVSS_USB_7
D14
AVSS_USB_8
D15
AVSS_USB_9
E15
AVSS_USB_10
F12
AVSS_USB_11
F14
AVSS_USB_12
G9
AVSS_USB_13
H9
AVSS_USB_14
H17
AVSS_USB_15
J9
AVSS_USB_16
J11
AVSS_USB_17
J12
AVSS_USB_18
J14
AVSS_USB_19
J15
AVSS_USB_20
K10
AVSS_USB_21
K12
AVSS_USB_22
K14
AVSS_USB_23
K15
AVSS_USB_24
H18
E_CK_VSS_1
PCI
J17
PCI
E_CK_VSS_2
J22
PCI
E_CK_VSS_3
K25
PCI
E_CK_VSS_4
M16
PCI
E_CK_VSS_5
M17
PCIE_CK_VSS_6
M21
E_CK_VSS_7
PCI
P16
E_CK_VSS_8
PCI
F9
AVSSC
SB7
SB7
SB7
00-PWR/DECOUPLING 4/4
00-PWR/DECOUPLING 4/4
00-PWR/DECOUPLING 4/4
PCI PCI PCI PCI PCI PCI PCI PCI PCI PCI PCIE_CK_VSS_19 PCI PCI
Part
Part
5 of 5
5 of 5
SB700
SB700
Qu
Qu
Qu
anta Computer Inc.
anta Computer Inc.
anta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8
VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40
OUND
OUND
VSS_41 VSS_42
GR
GR
VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50
E_CK_VSS_9 E_CK_VSS_10 E_CK_VSS_11 E_CK_VSS_12 E_CK_VSS_13 E_CK_VSS_14 E_CK_VSS_15 E_CK_VSS_16 E_CK_VSS_17 E_CK_VSS_18
E_CK_VSS_20 E_CK_VSS_21
AVSSCK
1
ZN1
ZN1
ZN1
17
17
17
17
A2 A25 B1 D7 F20 G19 H8 K9 K11 K16 L4 L7 L10 L11 L12 L14 L16 M6 M10 M11 M13 M15 N4 N12 N14 P6 P9 P10 P11 P13 P15 R1 R2 R4 R9 R10 R12 R14 T11 T12 T14 U4 U14 V6
1
Y2 AB1 AB19 AB25 AE1 AE24
P23 R16 R19 T17 U18 U20 V18 V20 V21 W19 W22 W24 W25
L17
of
of
of
1A
1A
1A
41Friday, May 08, 2009
41Friday, May 08, 2009
41Friday, May 08, 2009
5
VCC3 VCC3
D D
_RST#15
AZ
C_CLK14
RT
PCLK_DBC114
PCLK_EC14,32 PCI
_CLK514
PCI
_CLK414
PCI
_CLK314
PCI
_CLK214
P
CI_CLK2
C C
PUL HIGH
PUL LOW
L
L
DEBUG STRA
AD
2814
AD
PUL HIGH
PUL LOW
2714
AD
2614
AD
2514
AD
2414
AD
2314
P
CI_AD28
USE
L
LONG RESET
DEF
AULT
USE
L
SHORT RESET
B B
A A
12
R421
R421
*10K/F_4
*10K/F_4
12
BO
OTFAIL TIMER ENABLED
BO
OTFAIL TIMER DISABLED
DEF
AULT
PS
12
R430
R430 *2.2K_4
*2.2K_4
PC
I_AD27 PCI_AD26
U
SE PCI
PLL
DEF
AULT
B
YPASS
PCI PLL
12
R427
R427
*10K/F_4
*10K/F_4
12
R429
R429 10K/F_4
10K/F_4
P
CI_CLK3
USE DEBUG STRAPS
I
GNORE DEBUG STRAPS
DEF
AULT
SB700 HAS 15K INT
12
R431
R431 *2.2K_4
*2.2K_4
USE ACPI BCLK
DEF
AULT
B
YPASS ACPI BCLK
VCC3 VCC3 RVCC3
12
R423
R423
10K/F_4
10K/F_4
12
R424
R428
R428 10K/F_4
10K/F_4
R424 *10K/F_4
*10K/F_4
P
CI_CLK4 PCI_CLK5
R
ESERVED
ERNAL PU FOR PCI_AD[28:23]
12
12
R414
R414
R411
R411
*2.2K_4
*2.2K_4
*2.2K_4
*2.2K_4
P
CI_AD25PCI_AD24
U
SE IDE
L
PL
DEF
AULT
B
YPASS IDE
PLL
12
R426
R426 *10K/F_4
*10K/F_4
12
R
ESERVED
12
R415
R415 *2.2K_4
*2.2K_4
US
E DEFAULT
IE STRAPS
PC
DEF
AULT
U
SE EEPROM
PCIE STRAPS
4
R425
R425 *10K/F_4
*10K/F_4
L
PC_CLK0
E
NABLE PCI
ME
DI
SABLE PCI
ME
DEF
EC E
NABLED
12
R416
R416 *2.2K_4
*2.2K_4
P
R
12
R86
R86 10K/F_4
10K/F_4
M BOOT
M BOOT
AULT
Use 2.
CI_AD23
ESERVED
L
PC_CLK1
CLKG E
NABLED
CLKG DI
SABLED
DEF
2K PD.
12
EN
EN
AULT
must ready
It refore RSMRST#
12
R37
R37 *10K/F_4
*10K/F_4
R389
R389 10K/F_4
10K/F_4
RTC_
CLK
I
NTERNAL
RTC
AULT
DEF
E
XT. RTC
(
PD on X1, apply 32KHz to
C_CLK)
RT
AZ
_RST#
EC E
NABLED
EC DI
SABLED
DEF
AULT
NABLE PCI
E ME
M BOOT
RVCC3
VCC3
SBPW
3
REQUIRED STRA
12
R29
R29 10K/F_4
10K/F_4
10K/F_4
10K/F_4
R47
R47
R43
R43
*10K/F_4
*10K/F_4
C67
C67
*2.2u
*2.2u
/6.3V_6
/6.3V_6
D3
D3
CH501H-40PT
CH501H-40PT
ROK32
21
2
OVER
LAP COMMON PADS WHERE
POSSIB
LE FOR DUAL-OP RESISTORS.
A11 stuff 2.2K A12 stuff 10K
RVCC3
12
PS
O1715
SB_GPI
O1615
SB_GPI
GPIO16
TYPE
FWH
LPC
SPI
RSVD
SB_PWRGD A11 use external ckt A12 Asserting SYS_RESET# will de-assert SB PWRGOOD internally
SB_PW
VCC1.8
2G
2G
*0_4
*0_4
SB_PW
C69
C69
R48
R48
R51
R51
U3
U3
1 2 3
PWRGD_IN:
NB_ RS780/RX780 = 1.8V; RS740 = 3.3V Do NOT share it with SB_PWRGD when use Internal Clk Gen (Need SB PLL initialize firstly)
NC
VCC A GND
Y
*NL17SZ17DFT
*NL17SZ17DFT
SOT
-353
5
4
GPIO16
L : 2.2K pull down
L : 2.2K pull down
RGD_IN
RGD_IN
*0.1u/10V_4
*0.1u/10V_4
*33_4
*33_4
12
R393
R393
2.2K_4
2.2K_4
R394
R394 *2.2K_4
*2.2K_4
NC
NC
12
R75
R75
2.2K_4
2.2K_4
VCC1.8
GPIO17
L : 2.2K pull down
L : 2.2K pull down
R52
R52 300_4
300_4
780,RS780
RX
C68
C68 *0.01u
*0.01u
GPIO17
NC
NC
NB_PW
RGD_IN
D5
D5
/16V_4
/16V_4
2 1
*CH501H-40PT
*CH501H-40PT
1
18
RGD_IN 15
SB_PW
D4
D4 *CH501H-40PT
*CH501H-40PT
2 1
RGD_IN 12
NB_PW
R68
R68
*10K/F_4
*10K/F_4
VCC1.8
R690_4 R690_4
WD
_PWRGD 15
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Si
Si
ze Document Number Rev
ze Document Number Rev
Size Document Number Rev
S
S
S
B700-STRAPS
B700-STRAPS
B700-STRAPS
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT :
ZN1
ZN1
ZN1
1A
1A
1A
of
18
of
18
of
18
41Friday, May 08, 2009
41Friday, May 08, 2009
1
41Friday, May 08, 2009
5
CKLIGHT CONTROL
BA
D D
R1
R1 0R_4
0R_4
8
8
VCC3
D1 R2
R2
R2
R2 10K
10K
1 3
R1
R1
4
4
5
5
R1
R1
7
7
R1
R1 *10K_4
*10K_4
2 0R_4
2 0R_4
_4
_4
L
CD_ON14
BL
ON12
V_LVDS_BLON20
E
Q2
Q2
C C
LVDS_VDDEN20
EV_
2
C144EU
C144EU
DT
DT
D
IGON12
2
Q1
Q1 DT
DT
C144EU
C144EU
0R_4
0R_4
0R_4
0R_4
1SS355D11SS355
21
VCC3
R1
R1 10K
10K
_4
_4
1 3
PANEL VCC CONTROL
VCC3
C5
C5
4 0.1U/25V/4
4 0.1U/25V/4
R1
R1
2
2
*10K_4
*10K_4
R1
R1
0R_4
0R_4
R1
R1 10K_4
10K_4
VCC3
R2
R2 10K_4
10K_4
3
3
9
9
0
0
2 1
VCC5
D
4
2 0.1U/25V/4
2 0.1U/25V/4
C5
C5
4
U1
U1
7SH08FU
7SH08FU
TC
TC
3 5
6 4
IGON_R
3
SPON
DI
1
1
C5
C5 *1000P/50V/4
*1000P/50V/4
1 2
0
0
Q1
Q1
OU
IN
D
GN
IN ON
GN
/OFF
D
AAT4280IGU-1-T1
AAT4280IGU-1-T1
3
CN6
CN6
VCC5
M_SCL M_SDA
*
*
EDID CONNECTOR
EDID CONNECTOR
53398-0410-4P-L
53398-0410-4P-L
W
RITE_EDID_ROM15
VCC3
2 2.2K_4
2 2.2K_4
R6
R6
1 2 3 4
RITE_EDID_ROM
W
LV
DS_CLK12,20 DS_DAT12,20
LV
K_SMB3,8,15,30
PCL
PDAT_
SMB3,8,15,30
CDVCC
L
C5
C5
5
5
10U/6.3V/6
10U/6.3V/6
C5
C5
7
7
0.1U/25V/4
0.1U/25V/4
2
6
6
Q3
Q3 DTC144EU
DTC144EU
1 3
05
05
C1
C1
0.22u_4
0.22u_4
VCC5
Q1
Q1
1
1
DTC144EU
DTC144EU
D
IGON_R
2
5 11 14
3
6 10 13
1
S
S
EEPRO EEPRO
2A
2A
F2
F2
1
T
1 2
R
R
C1206
2 5
C1206
EEPROM
U5
U5
D
VCC16GN
0
IA
YA
IB
0 0
IC
0
YB
ID
YC
IA
1 1
IB IC
YD
1 1
ID
S
OE
N74CBT3257CPWR
N74CBT3257CPWR
VCC5
2
1 3
8
4 7 9 12
15
R2
R2 20K_4
20K_4
EEPRO EEPRO
4
4
12
C5
C5
2
M_SCL M_SDA
CDVCC
L
2
6
6
3300P/50V/4
3300P/50V/4
IIC Selection
R4
R4
0
0
10K_4
10K_4
12
SHORT_PAD
SHORT_PAD
*
*
3
3
2
2
Q1
Q1 ME2N7002E
ME2N7002E
VCC3
1 0.1U_4
1 0.1U_4
C6
C6
pass(default)
By
3 *0_4
3 *0_4
R5
R5 R5
R5
5 *0_4
5 *0_4
Discharge panel power
LV LV
3
1
VCC3
G1
G1
DS_CLK DS_DAT
R2
R2 169R_4
169R_4
PANEL EDID DATA
Address:A8/A9
U2
U2
8
VCC
7
WC
6
SCL
5
SDA
24LC
24LC
#
02
02
A0 A1 A3
GN
EEPRO EEPRO
D
1 2 3 4
M_SCL M_SDA
EMI
1
W
RITE_EDID_ROM
VCC3 VCC3
6
6
R5
R5
4.7K_4
4.7K_4
61000PC661000P
12
C6
19
4
4
R5
R5
4.7K_4
4.7K_4
12
C651000P C651000P
L
B B
TO INVERTER POWER
LCD PA
F1
3A
3A
98
98
C5
C5
0.1U/25V/4
0.1U/25V/4
C1
C1 *
*
1000P/50V/4
1000P/50V/4
1 2
F1
C1206
C1206
R
R
12
C2
C2
1U/25V/4
1U/25V/4
0.
0.
C4
C4 10U
10U
/25V/12
/25V/12
19V
N
VI
SHIELD GND
VADJ
32
SHIELD GND
SHIELD GND
PWM CONTROL
4
SHIELD GND
CN1
CN1
1 2 3 4
DI
5
VADJ
6 7 8 9 10
NV CONNECTOR
NV CONNECTOR
I
I
A A
SPON
5
N_LCD
VI
C3
-1
C3
/25V/12
/25V/12
10U
10U
L1
0R_4L10R_4
NEL CONNECTOR
T
3
XUCLKOUT+
T
XUCLKOUT-
TXUOUT0+ T
XUOUT0-
T
XUOUT1+
T
XUOUT1­XUOUT2+
T T
XUOUT2­XUOUT3+
T T
XUOUT3-
87216-300x-30p-ldv
87216-300x-30p-ldv
XUCLKOUT+12
T
XUCLKOUT-12
T T
XUOUT0+12 XUOUT0-12
T
XUOUT1+12
T
XUOUT1-12
T TXUOUT2+12
XUOUT2-12
T
XUOUT3+12
T
XUOUT3-12
T
CN9
CN9
29 30 27 28 25 26 23 24 21 22 19 20 17 18 15 16 13 14 11 12 9 10 7 8 5 6 3 4 1 2
L
L
VDS CONNECTOR
VDS CONNECTOR
L
CDVCC
TX
LCLKOUT+
TX
LCLKOUT-
TXLOUT0+ TX
LOUT0-
TX
LOUT1+
TX
LOUT1­LOUT2+
TX TX
LOUT2­LOUT3+
TX TX
LOUT3-
2
LKOUT+ 12
TXLC
LKOUT- 12
TXLC TX
LOUT0+ 12 LOUT0- 12
TX
LOUT1+ 12
TX
LOUT1- 12
TX TXLOUT2+ 12
LOUT2- 12
TX
LOUT3+ 12
TX
LOUT3- 12
TX
SHIELD GND SHIELD GND
SHIELD GND SHIELD GND
ze Do cument Number Rev
ze Do cument Number Rev
Si
Si
Size Document Num b er Rev
LCD P
LCD P
LCD P
Date: Sheet
Date: Sheet
Date: Sheet of
CDVCC
13
13
C1
C1
0.1U/25V/4
0.1U/25V/4
uanta Computer Inc.
uanta Computer Inc.
uanta Computer Inc.
Q
Q
Q
PROJECT :
PROJECT :
PROJECT :
ANEL/WEBCAM
ANEL/WEBCAM
ANEL/WEBCAM
1
ZN1
ZN1
ZN1
A
A
A
41Friday, May 08, 2009
of
41Friday, May 08, 2009
of
19
19
19
41Friday, May 08, 2009
5
MX
M Module
VI
N_MXM
A
A
CN2
V_MXM
+5
V_MXM
+3
1
_PWR_EN#
CN2
E1
PW
E2
PW
E3
GN
E4
GN
1
5V
1,
1,
280
3V
278, 280 = 3V3RUN
278, 280 = 3V3RUN
11
GN
13, 15, 17 = GND
13, 15, 17 = GND
36
GN
37
GN
46
GN
47
GN
52
GN
53
GN
58
GN
59
GN
64
GN
65
GN
70
GN
71
GN
76
GN
77
GN
82
GN
83
GN
88
GN
89
GN
94
GN
95
GN
100
GN
101
GN
106
GN
107
GN
112
GN
113
GN
118
GN
119
GN
124
GN
125
GN
133
GN
134
GN
139
GN
140
GN
145
GN
146
GN
151
GN
152
GN
157
GN
166
GN
173
GN
174
GN
179
GN
180
GN
185
GN
186
GN
191
GN
192
GN
197
GN
198
GN
203
GN
204
GN
209
GN
210
GN
215
GN
216
GND
221
GN
222
GN
228
GN
244
GN
250
GN
251
GN
256
GN
257
GN
262
GN
263
GN
268
GND
269
GN
275
GN
MXM3_2.0 CONNECTOR
MXM3_2.0 CONNECTOR
+5
V_MXM
C45
C45
4.7u/25V_8
4.7u/25V_8
Q31
Q31 AO3413
AO3413
2
R_SRC R_SRC
D D
RUN
3, 5, 7, 9 = 5VRUN
3, 5, 7, 9 = 5VRUN
3RUN
D
D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D
D D D D D D D D D D
D D
C44
C44 1u_4
1u_4
3
C596
C596
7u/25V_8
7u/25V_8
4.
4.
SNT_R#
PR
PR
SNT_L#
STD_SW#
PEX_
RST#
PEX_
PEX_
CLK_REQ#
REFCLK#
PEX_
REFCLK
PEX_
RX0#
PEX_
RX1#
PEX_ PEX_
RX2# RX3#
PEX_
RX4#
PEX_ PEX_
RX5#
PEX_
RX6# RX7#
PEX_ PEX_
RX8# RX9#
PEX_
PEX_
RX10#
PEX_
RX11# RX12#
PEX_ PEX_
RX13#
PEX_
RX14# RX15#
PEX_
PEX_
RX0 RX1
PEX_
RX2
PEX_ PEX_
RX3 RX4
PEX_
RX5
PEX_ PEX_
RX6 RX7
PEX_ PEX_
RX8 RX9
PEX_
RX10
PEX_ PEX_
RX11
PEX_
RX12 RX13
PEX_ PEX_
RX14
PEX_
RX15
TX0#
PEX_
TX1#
PEX_ PEX_
TX2# TX3#
PEX_ PEX_
TX4# TX5#
PEX_
TX6#
PEX_ PEX_
TX7# TX8#
PEX_
TX9#
PEX_
PEX_
TX10#
PEX_
TX11#
PEX_
TX12# TX13#
PEX_
TX14#
PEX_ PEX_
TX15#
PEX_
TX0 TX1
PEX_ PEX_
TX2 TX3
PEX_ PEX_
TX4
PEX_
TX5 TX6
PEX_
TX7
PEX_ PEX_TX8 PEX_
TX9
TX10
PEX_ PEX_
TX11 TX12
PEX_
TX13
PEX_ PEX_
TX14 TX15
PEX_
IO0
GP GPIO1 GP
IO2
C47
C47
C25
C25
.1u/16V_4
1u_4
1u_4
V
CC5
+3
V_MXM
97
97
C5
C5 1u_4
1u_4
5
$PS
$PS
D D
$PS
C C
B B
M
XM 3V/5V Power switch
CC3
V
A A
dGPU
2 281
19 156
154 153
155
147 141 135 121 115 109 103 97 91 85 79 73 67 61 55 49
149 143 137 123 117 111 105 99 93 87 81 75 69 63 57 51
At Modify Net Name
148 142 136 120 114 108 102 96 90 84 78 72 66 60 54 48
150 144 138 122 116 110 104 98 92 86 80 74 68 62 56 50
26 28 30
C28
C28 .1u/16V_4
.1u/16V_4
R5
MX
M_RST#
P
E_RXN0
P
E_RXN1 E_RXN2
P P
E_RXN3
P
E_RXN4
P
E_RXN5 E_RXN6
P
E_RXN7
P P
E_RXN8
P
E_RXN9 E_RXN10
P
E_RXN11
P P
E_RXN12 E_RXN13
P P
E_RXN14 E_RXN15
P
XP0
PE_R PE_R
XP1
PE_R
XP2
PE_R
XP3 XP4
PE_R
XP5
PE_R PE_R
XP6
PE_R
XP7 XP8
PE_R PE_R
XP9
PE_R
XP10 XP11
PE_R PE_R
XP12 XP13
PE_R PE_R
XP14
PE_R
XP15
11/13
PC
IE_TXN0 IE_TXN1
PC PC
IE_TXN2 IE_TXN3
PC
IE_TXN4
PC PC
IE_TXN5
PC
IE_TXN6 IE_TXN7
PC PC
IE_TXN8 IE_TXN9
PC PC
IE_TXN10
PC
IE_TXN11 IE_TXN12
PC PC
IE_TXN13
PC
IE_TXN14 IE_TXN15
PC
PC
IE_TXP0 IE_TXP1
PC
IE_TXP2
PC PC
IE_TXP3 IE_TXP4
PC
IE_TXP5
PC PC
IE_TXP6 IE_TXP7
PC PCIE_TXP8 PC
IE_TXP9 IE_TXP10
PC PCIE_TXP11 PC
IE_TXP12 IE_TXP13
PC PCIE_TXP14
IE_TXP15
PC
1
R11
R11 10K_4
10K_4
dGPU_PRSNT#
Low Hi
gh
_PRSNT# 15,32
dGPU
CL
K_MXM# 3 K_MXM 3
CL
8 .1u_4
8 .1u_4
C
C C
C
31 .1u_4
31 .1u_4
C
C
10 .1u_4
10 .1u_4 33 .1u_4
33 .1u_4
C
C C
C
12 .1u_4
12 .1u_4
C
C
35 .1u_4
35 .1u_4 14 .1u_4
14 .1u_4
C
C C
C
37 .1u_4
37 .1u_4 16 .1u_4
16 .1u_4
C
C C
C
39 .1u_4
39 .1u_4
C
C
18 .1u_4
18 .1u_4 41 .1u_4
41 .1u_4
C
C
20 .1u_4
20 .1u_4
C
C C
C
43 .1u_4
43 .1u_4
C
C
22 .1u_4
22 .1u_4
C
C
24 .1u_4
24 .1u_4
7 .1u_4
7 .1u_4
C
C
30 .1u_4
30 .1u_4
C
C C9 C
C
32 .1u_4
32 .1u_4 11 .1u_4
11 .1u_4
C
C
34 .1u_4
34 .1u_4
C
C
13 .1u_4
13 .1u_4
C
C C
C
36 .1u_4
36 .1u_4
C
C
15 .1u_4
15 .1u_4 38 .1u_4
38 .1u_4
C
C C
C
17 .1u_4
17 .1u_4
C
C
40 .1u_4
40 .1u_4
C
C
19 .1u_4
19 .1u_4
C
C
42 .1u_4
42 .1u_4 21 .1u_4
21 .1u_4
C
C C
C
23 .1u_4
23 .1u_4
PC
PC
3
Q6 AO3413Q6AO3413
2
3
2
Q5
Q5
E2N7002E
E2N7002E
M
M
1
u
Sk MXM WO/ MXM
*0_4R5*0_4
PEX_Swing adjust
PC
IE_RXN0
PC
IE_RXN1 IE_RXN2
PC PC
IE_RXN3
PC
IE_RXN4
PC
IE_RXN5 IE_RXN6
PC
IE_RXN7
PC PC
IE_RXN8
PC
IE_RXN9 IE_RXN10
PC
IE_RXN11
PC PC
IE_RXN12 IE_RXN13
PC PC
IE_RXN14 IE_RXN15
PC
IE_RXP0
PC PC
IE_RXP1
PC
IE_RXP2
.1u_4C9.1u_4
PC
IE_RXP3 IE_RXP4
PC
IE_RXP5
PC PC
IE_RXP6
PC
IE_RXP7 IE_RXP8
PC PC
IE_RXP9
PC
IE_RXP10 IE_RXP11
PC PC
IE_RXP12 IE_RXP13
PC PC
IE_RXP14
PC
IE_RXP15
IE_TXN[15:0]
IE_TXP[15:0]
IE_TXN[15:0] 11
PC
PC
IE_TXP[15:0] 11
M_ACIN
MX
To low power status mode
N_MXM
VI
C4
C4
8
8
10u/25V_1206
10u/25V_1206
V_MXM
+5
V
CC5
R1
R1
0
0
10K_4
10K_4
_5V_EN
dGPU
3
Q4
Q4 M
M
E2N7002E
E2N7002E
1
4
LVD LVD
IE_RXN[15:0] 11
PC
PC
IE_RXP[15:0] 11
Change BOM value
MX
M_THERM#6,32
V_MXM
+3
R4
R4
35
35
10K_4
10K_4
8
8
D5
D5
2 1
RB500V-40
RB500V-40
C29
C29
C49
C49
1u/25V_6
1u/25V_6
4.7u/25V_8
4.7u/25V_8
dGPU
_PWR_EN#
2
4
3
MX
S_BLON19
T8T8 T185T1
85
T186T1
86
T6T6 T5T5
T4T4 T3T3
80
T180T1 T2T2 T1T1
SHIELD GND SHIELD GND
SHIELD GND SHIELD GND
MX
LVD
S_MXM_UCLK# S_MXM_UCLK
LVD
S_MXM_UTX0#
LVD LVD
S_MXM_UTX1# S_MXM_UTX2#
LVD
S_MXM_UTX3#
LVD
LVD
S_MXM_UTX0 S_MXM_UTX1
LVD
S_MXM_UTX2
LVD LVD
S_MXM_UTX3
LVD
S_MXM_LCLK#
LVD
S_MXM_LCLK S_MXM_LTX0#
LVD
S_MXM_LTX1#
LVD LVD
S_MXM_LTX2#
LVD
S_MXM_LTX3#
LVD
S_MXM_LTX0 S_MXM_LTX1
LVD LVD
S_MXM_LTX2 S_MXM_LTX3
LVD
R
R
434 10K_4
434 10K_4
R4
R4
33 10K_4
33 10K_4
C26
C26 .1u/25V_4
.1u/25V_4
M_DDCCK M_DDCDAT
MX
M_DDCDAT
MX
M_DDCCK
MPWR_EN_R
MX MX
M_ACIN
MX
MDATA MCLK
MX
T7T7
C2
C2 *100u/25V_3528
*100u/25V_3528.1u/16V_4
7
7
B
B
CN2
CN2
169
LV
DS_UCLK#
171
LV
DS_UCLK
193
LV
DS_UTX0#
187
DS_UTX1#
LV
181
LV
DS_UTX2#
175
LV
DS_UTX3#
195
LV
DS_UTX0
189
DS_UTX1
LV
183
LV
DS_UTX2
177
DS_UTX3
LV
176
DS_LCLK#
LV
178
DS_LCLK
LV
200
LV
DS_LTX0#
194
DS_LTX1#
LV
188
LV
DS_LTX2#
182
DS_LTX3#
LV
202
DS_LTX0
LV
196
LV
DS_LTX1
190
LV
DS_LTX2
184
DS_LTX3
LV
23
DS_PWREN
LV
25
LV
DS_BLEN
27
LV
DS_BRIGHT_PWM
33
DS_DDC_DAT
LV
35
LV
DS_DDC_CLK
158
CRT
160
CRT
162
A_VSYNC
VG
164
VG
A_HSYNC
168
A_RED
VG
170
VG
A_GREEN
172
VG
A_BLUE
4
AKE#
W
6
WR_GOOD
P
8
R_EN
PW
18
R_LEVEL
PW
21
ain_VGA_DIS#
M
20
TH
_OVERT#
22
T
H_ALERT#
24
FA
N_PWM
32
B_DAT
SM
34
SM
B_CLK
126
KEY
127
KEY
128
KEY
129
KEY
130
KEY
131
KEY
132
KEY
38
M
OE
39
OEM
40
OE
M
41
M
OE
42
OE
M
43
M
OE
44
M
OE
45
OE
M
10
SVD
R
12
R
SVD
14
SVD
R
16
RSVD
MXM3_2.0 CONNECTOR
MXM3_2.0 CONNECTOR
S_MXM_UCLK
LVD LVD
S_MXM_UCLK#
LVDS_MXM_UTX0 LVD
S_MXM_UTX0# S_MXM_UTX1
LVD LVDS_MXM_UTX1#
S_MXM_UTX2
LVD LVDS_MXM_UTX2# LVD
S_MXM_UTX3 S_MXM_UTX3#
LVD
XM footprint to mxm-mm70-314-310b1-1-270p
update M
Up
Up per-CH
per-CH
L
L ower-CH
ower-CH
_DDC_DAT _DDC_CLK
LCD P
ANEL CONNECTOR(WITH MXM)
29 30 27 28 25 26 23 24 21 22 19 20 17 18 15 16 13 14 11 12 9 10 7 8 5 6 3 4 1 2
LCD_CON30
LCD_CON30
87216-
87216-
300x-30p-ldv
300x-30p-ldv
3
LVDS
LVDS
CRT TH
CRT TH
ERMPM
ERMPM
CON1
CON1
DP-ADP-B
DP-ADP-B
isplay Port
isplay Port D
D
-CDP-D
-CDP-D DP
DP
L
CDVCC
277
DP
_A_AUX#
279
DP
_A_AUX
253
DP
_A_L0#
259
_A_L1#
DP
265
DP
_A_L2#
271
DP
_A_L3#
255
DP
_A_L0
261
_A_L1
DP
267
DP
_A_L2
273
_A_L3
DP
276
DP
_A_HPD
270
DP
_B_AUX#
272
DP
DP
DP
DP
DP
DP
DP
DP
HDM
_B_AUX
DP
_B_L0# _B_L1#
DP DP
_B_L2#
DP
_B_L3#
DP DP DP DP
_B_HPD
_C_AUX#
_C_AUX
DP
_C_L0# _C_L1#
DP DP
_C_L2# _C_L3#
DP
DP DP DP DP
_C_HPD
_D_AUX#
_D_AUX
DP
_D_L0# _D_L1#
DP DP
_D_L2# _D_L3#
DP
DP DP DP DP
_D_HPD
DV
_B_L0 _B_L1 _B_L2 _B_L3
_C_L0 _C_L1 _C_L2 _C_L3
_D_L0 _D_L1 _D_L2 _D_L3
I_CEC I_HPD
R R R R R R R R R RSVD R R R R R R R R R R
SVD SVD SVD SVD SVD SVD SVD SVD SVD
SVD SVD SVD SVD SVD SVD SVD SVD SVD SVD
MXM3
246 252
LVDS
258 264
DP_D DP
248 254
DP
260 266
DP
274
223 225
199 205 211 217
201 207 213 219
234
230 232
206 212 218 224
208 214 220 226
236 29
31 159
161 163 165 167 227 229 231 233 235 237 238 239 240 241 242 243 245 247 249
pin28 connect to LCDVCC
S_MXM_LCLK
LVD LVD
S_MXM_LCLK#
LVDS_MXM_LTX0 LVD
S_MXM_LTX0# S_MXM_LTX1
LVD LVDS_MXM_LTX1#
S_MXM_LTX2
LVD LVDS_MXM_LTX2# LVD
S_MXM_LTX3 S_MXM_LTX3#
LVD
CDVCC
L
SHIELD GND SHIELD GND
SHIELD GND SHIELD GND
C64
C64
0.1U/25V/4
0.1U/25V/4
_A _C _B
7 0_4
7 0_4
R5
+3
V_MXM
C46
C46 *1u/25V_6
*1u/25V_6
R5 R6
R6
3 0_4
3 0_4
V_LVDS_VDDEN19
E EV_LVD
1K/F_4
1K/F_4 32
32
R4
R4
GPU_RUNPWROK15
d
+3
V_MXM
MX
M_ALERT#
M
XM_PWR_LEVEL# 32
C6 .1u/25V_4C6.1u/25V_4
S_CLK12,19 S_DAT12,19
R6
R6 2K/
2K/
n-
.0
LVDS In HDM
E
xt. DP/DVI
2
+3
V_MXM
R7
R7 2K/
2K/
F_4
F_4
F_4
F_4
Vidia AMD
LVDS/Int. DP
t. DP
N/
X
HDM
I
A N/A
I
Ext. DP/DVI
MX
M VIN Power switch
R9
100K_6R9100K_6
2
MX
SMBus
MX
M_12V
L4
L4 L3
L3 L2
L2
C5
C5
0
0
.1u/25V_6
.1u/25V_6
MX
M Reset
M_SCL32
MX
M_SDA32
MX
80ohm
/5A
Q7
1 2 3
AO4427Q7AO4427
4
R1
R1
33K_6
33K_6
3
Q9 ME2N7002EQ9ME2N7002E
1
1
V
CC3
53
MPWR_EN_R
600 *.1u_4
600 *.1u_4
C
C
M_RST#
MX
*HI0805R800R-00_8
*HI0805R800R-00_8 *HI0805R800R-00_8
*HI0805R800R-00_8 *HI0805R800R-00_8
*HI0805R800R-00_8
8 7 6 5
6
6
_VIN_EN
dGPU
2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
4
CC3
V
53
4
V_MXM
+3
2
3
438 0_4
438 0_4
R
R
V_MXM
+3
2
3
R
R
437 0_4
437 0_4
VI
12.
5A
CC5
V
R2
R2 10K_4
10K_4
3
1
1 2
U2
U2
2
2
TC7SH08FU
TC7SH08FU
1 2
1
1
U2
U2 TC7SH08FU
TC7SH08FU
Q32
Q32
N7002
N7002
*2
*2
Q33
Q33 *2
*2
N7002
N7002
N_MXM
1
1
2
Q8
Q8
E2N7002E
E2N7002E
M
M
MPWR_EN 32
MX
436 0_4
436 0_4
R
R
C
C
599
599
*.1u_4
*.1u_4
PLT
RST# 12,14,16,24,27,30
39
39
40
40
R4
R4
R4
R4
4.7K_4
4.7K_4
4.7K_4
4.7K_4
MCLK
1
1
MX
MX
MDATA
MAINON
MXMPWR_EN
PLTRST#
MAINON
Low
gh
Hi
R8 10K_4R810K_4
Qu
Qu
Qu
anta Computer Inc.
anta Computer Inc.
anta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
MX
MX
MX
M3.0
M3.0
M3.0
1
+3
V_MXM
Behavior Enable dGPU PWR Disable dGPU PWR
dGPU
ZN1
ZN1
ZN1
20
20
20
20
_PWR_EN# 15
of
of
of
3B
3B
3B
41Friday, May 08, 2009
41Friday, May 08, 2009
41Friday, May 08, 2009
5
4
3
2
1
CC5
0
0
7
7
D1
D1 DA204U
DA204U
VC
C3
21
V
CC5
CN2
CN2
3
3
6
11
1
C3
C3
39
39
0.1U_4
0.1U_4
7
12
2 8
13
3 9
14
4 10 15
5
*DFDB15FR029
*DFDB15FR029
16 17
D1
D1 DA204U
DA204U
2 1
3
3
D1
D1
6
6
DA204U
DA204U
V
CC3
3
DDCDA
DDCCL
CRT
CRT
C
C
298
298
47p_6
47p_6
3
2 1
V
D2
D2 DA204U
DA204U
2 1
TA_L1
K_L1
_HSYNC_L1
_VSYNC_L1
V
CC3
1
1
D1
D1 DA204U
DA204U
3
L36
L36 27nH
27nH L32
L32 27nH
27nH
85
85
2 1
D1
D1
2
2
DA204U
DA204U
2 1
3
C3
C3
01
01
*220p
*220p
L29
D D
CRT
_RED12
CRT
_GRN12
C
RT_BLU12
201150/FR201150/F
198140/FR198140/F R
CRT
_DDCDAT12
C C
CRT
_DDCCLK12
V
CC5
84
84
C2
C2
0.1U_4
0.1U_4
_HSYNC12
CRT
B B
CRT
_VSYNC12
1
5
2 4
1
5
2 4
U1
U1 AHCT1G125DCH
AHCT1G125DCH
U1
U1
4
4
AHCT1G125DCH
AHCT1G125DCH
R1
R1 1K_0603
1K_0603
5
5
99
99
206150/FR206150/F
R
28212P_4C28212P_4
R
C
L29 100nH
100nH
L30
L30 100nH
100nH
L31
L31 100nH
100nH
28612P_4C28612P_4
29012P_4C29012P_4
C
C
C2
C2 15P_6
15P_6
83
83
CRT
CRT
4.7K_0603
4.7K_0603
_HSYNC_L
_VSYNC_L
C2
C2 15P_6
15P_6
R2
R2
88
88
10
10
C2
C2
95
95
15P_6
15P_6
R2
R2
4.7K_0603
4.7K_0603
V
60
60
CC5
R
R
258 33_4
258 33_4
211 33_4
211 33_4
R
R
248 33_4
248 33_4
R
R
236 33_4
236 33_4
R
R
C
RT_R_1
CRT
CRT
_G_1
_B_1
3
C2
C2 *220p
*220p
2 1
D2
D2
1
1
DA204U
DA204U
3
2 1
3
C2
C2
89
89
47p_6
47p_6
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
S
S
Size Document Number Rev
ize Document Number Rev
ize Document Number Rev
CRT (Reser
CRT (Reser
CRT (Reser
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT :
ved for Debug only)
ved for Debug only)
ved for Debug only)
ZN1
ZN1
ZN1
1A
1A
1A
41Friday, May 08, 2009
41Friday, May 08, 2009
41Friday, May 08, 2009
of
21
of
21
of
21
1
5
4
3
2
1
22
D D
R1
R1
32
32
0R_8
0R_8
C C
T
O WEB CAM MODULE
B B
FOR EMI
SBP8+15
U
U
D
MIC_CLK29
IC_DAT29
DM
C
C
160 *22P/50V/4
160 *22P/50V/4 167 0.1U/25V/4
167 0.1U/25V/4
C
C
U
SBP8+ SBP8-
U
SBP8-15
12
,400mA
,400mA
2
R
R
126 0R_4
126 0R_4
R
R
127 0R_4
127 0R_4
&$0(5$32:(5&21752/
CC5
V
L1890ohm
L1890ohm
CC3
V
R1
R1
38
38
*0R_8
*0R_8
R1
R1
Q16
Q16
0R_8
0R_8
O3403
O3403
*A
*A
1
2
MIC_CLK
D
PWR
CCD_
change BOM value
U
SB_8_FB
1
SB_8_FB#
U
34
PWR
CCD_
CN12CN1
1 2 3 4 5 6
31
31
3
2
POWER
CCD_
+
+
C
C
168 10U/10V/8
168 10U/10V/8
C
C
173 1000P/50V/4
173 1000P/50V/4 172 0.1U/25V/4
172 0.1U/25V/4
C
C
CCD_
POWER_ON# 32
CCD_
PWR
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
S
S
Size Document Number Rev
ize Document Number Rev
ize Document Number Rev
W
W
W
EBCAM
EBCAM
EBCAM
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT :
ZN1
ZN1
ZN1
1A
1A
1A
41Friday, May 08, 2009
41Friday, May 08, 2009
41Friday, May 08, 2009
of
22
of
22
of
22
1
5
3
VPCU
4
3
2
1
AR3
AR3
5
5
22K/F/0402
1S
1S
S355
S355
1SS355
1SS355
2
MMBT3906
MMBT3906
AQ
AQ
C3
C3
68
68
369
369
C
C
22K/F/0402
13
2
2
22U/6.3V_8
22U/6.3V_8
R
R
22U/6.3V_8
22U/6.3V_8
R
R
A
A
R36 10K_4
R36 10K_4
AC3
AC3 22u/6.3V_8
22u/6.3V_8
300 75/F_6
300 75/F_6
301 75/F_6
301 75/F_6
AR3
AR3
8
8
220K_4
220K_4
NEOUT_JD#29
LI
D D
AD2
AD3
AD3
LI
NEOUT_L
LI
AD2
NEOUT_R
PD#29
129
EAPD#
C C
NEOUT_L29
LI
NEOUT_R29
LI
B B
PD_
MUTE
AQ
AQ
1
3
1 3
VPCU
1
MMBT3906
MMBT3906
AC3
AC3
*0.1u/10V_4
*0.1u/10V_4
UT_L1
9
9
PD_
MUTE
HPO
UT_L1
HPO
UT_R1
VCC3
R3
R3
11
11
470K/F/0402
470K/F/0402
2
Q2
Q2
2N7002
2N7002
3
3
3
1
HPO
HPO
UT_R1
R
R
451
1 3
2SD1781KPT
2SD1781KPT
Q3
Q3
3
3
D4
D4
2 1
451
*30K_04
*30K_04
2
5
5
BC00SM24Z00
BC00SM24Z00
R4
R4
53
53
30K_04
30K_04
1 3
L39
L39
L40
L40
BC0
BC0
92
92
C3
C3
0SM24Z00
0SM24Z00
1000P/50V/X7R/0603
2
2
D4
D4
1000P/50V/X7R/0603
2 1
14
14
R3
R3 22K/F/0402
22K/F/0402
C
C
1000P/50V/X7R/0603
1000P/50V/X7R/0603
393
393
MNB-160808-0600A-N2Q
MNB-160808-0600A-N2Q
NB-160808-0600A-N2Q
NB-160808-0600A-N2Q
M
M
R
R
450 1K/F
450 1K/F
B
B C00SM24Z00
C00SM24Z00
D4
D4
1
1
2SD1781KPT
2SD1781KPT
4
4
Q3
Q3
R4
R4
52 1K/F
52 1K/F
2
2
7
7
23
ACN1
ACN1
1 3 5
4 2
LI
LI
NE OUT
NE OUT
Nor
mal Close Type
Green Type
2 1
A A
Quant
Quant
Quant
a Computer Inc.
a Computer Inc.
a Computer Inc.
PROJECT :
PROJECT :
Si
Si
Size Document Nu mber Rev
ze Document Number Rev
ze Document Number Rev
Line
Line
Line
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Out
Out
Out
PROJECT :
ZN1
ZN1
ZN1
1A
1A
1A
23 41Friday, May 08, 2009
23 41Friday, May 08, 2009
23 41Friday, May 08, 2009
of
of
1
of
LAN Pow
A
er
RVCC3
Delete Q26,C475
4 4
R447
R447 *
*
short0603
short0603
LANVCC
WIDE TRACE
change L value to 0 in 8103EL
CTRL12A EVDD12_R
L49
L49
0_8
0_8
C451
0_8
0_8
*
*
C537
C537
C484
C484
.
.
1U/10V/X5R_4
1U/10V/X5R_4
C451
2U/6.3V/X5R_8
2U/6.3V/X5R_8
2
2
GND
C536
C536 1U/
1U/
6.3V/X5R_4
6.3V/X5R_4
1U/10V/X5R_4
1U/10V/X5R_4
.
.
.
.
1U/10V/X5R_4
1U/10V/X5R_4
3 3
R366
R342
R342
0_8
0_8
*
*
C189
C189
.1U/10V/X5R_4
.1U/10V/X5R_4
*
*
.
.
1U/10V/X5R_4
1U/10V/X5R_4
R366
1U/10V/X5R_4
1U/10V/X5R_4
.
.
C464
C464
EVDD12_R
2 2
C488
C488
C542
C542 1
1
1U/10V/X5R_4
1U/10V/X5R_4
.
.
C463
C463
C452
C452
1U/10V/X5R_4
1U/10V/X5R_4
.
.
EVDD12
U/6.3V/X5R_4
U/6.3V/X5R_4
C465
C465
.
.
1U/10V/X5R_4
1U/10V/X5R_4
1U/10V/X5R_4
1U/10V/X5R_4
.
.
ANVCC
L
C511
C511
C498
C498
LAN0_MDI LAN0_MDI
LAN0_MDI LAN0_MDI
LAN0_MDI LAN0_MDI
LAN0_MDI LAN0_MDI
B
LANVCC
0+25 0-25
DVDD12
1+25 1-25
GND
2+25 2-25
DVDD12
3+25 3-25
DVDD1
2
for 8103EL
C192
C192
1U/10V/X5R_4
1U/10V/X5R_4
.
.
GPP_TX2P_LAN11
GPP_TX2N_LAN11
C194
C194
2U/6.3V/X5R_8
2U/6.3V/X5R_8
2
2
U1
U1
1
AVDD3
2
MD
3
MD
4
NC/
5
MD
6
MD
7
GN
8
NC/
9
NC/
10
DVDD1
11
NC/
12
NC/
CTRL12A
8
8
IP0 IN0
FB12 IP1 IN1 D
MDIP2
MDIN2
MDIP3
MDIN3
R341
R341
49K/F_4
49K/F_4
2.
2.
3
2/AVDD12
RSET
CTRL12/VDD
GND
46
48
47
GND
RSET
CTRL12A/SROUT12 V
RTL8103EL
RTL8103EL
2
DVDD1
GND14HSIP15HSIN16R
13
GND
DVDD12
LANVCC
R154
R154 *
*
0_8
0_8
R153 *0_8@NCR153 *0_8@NC
XTAL25_R
CTRL12/VDD
CTRL15/VDD33
45
42
41
43
44
AL2
REG
CKT
NC/VDDSR
NC/ENSW
CTR12DVDDSR V
2
EFCLK_P
EFCLK_N R
EVDD1
17
18
19
EVDD12
REFCLK-
REFCLK+
LED0
LANVCC
LANVCC
DVDD12
40
38
37
39
3
3
D0
AL1
LE
VDD3
CKT
C/LV_PLL N
NC/AVDD3
L
L
L
DATA
CLK
HSOP20HSON21EGND22NC/SM
NC/SM
24
23
GND
C
R340
R340
EC-A-01
36
DVDD1
2
35
ED1/EESK
34
ED2/EEDI
L
33
ED3/EEDO
32
EECS
31
GN
D
30
2
DVDD1
29
VDD3
3
28
I
SOLATEB
27
PERSTB
26
ANWAKEB
25
CL
KREQB
C539
C539 C540
C540
0_4
0_4
33P/
33P/
CLK_PCI CLK_PCI
XTAL25
XTAL25_1
C447
C447
50V_4
50V_4
Vender suggest
DVDD12
EESK
LED1/ LED2/
EEDI
LED3/
EEDO EECS GND DVDD12 LANVCC
SOLATEB
I LAN_REST#
R350
R350
R357
R357
.1U/10V/X5R_4
.1U/10V/X5R_4 .1U/10V/X5R_4
.1U/10V/X5R_4
E_LAN# 3 E_LAN 3
Y4
21
25MHZY425MHZ
E_WAKE# 15,30
PCI
10K/F_4
10K/F_4
ENERGY
GPP_RX2N_LAN GPP_RX2P_LAN
0_4
0_4
C448
C448
50V/_4
50V/_4
33P/
33P/
PLTRST#
_DET 15
LANVCC
11
11
LED0
EESK
LED1/
LED3/
EEDO
12,14,16,20,27,30
D53
D53 D54
D54
D
for 8103EL
R382
R382
EECS
LED1/EESK
EEDI
LED2/
EEDO
LED3/
R378
R378
21 21
R458
R458
*0_6
*0_6
R459
R459
*0_6
*0_6
VCC3
R364
R364 1K_4
1K_4
D55
D55
R360
R360 15K_4
15K_4
LAN_REST#
1K_4
1K_4
U19
U19
1
CS
2
SK
3
DI DO4GN
*
*
AT93C46A(3.3V)
AT93C46A(3.3V)
3.6K_6
3.6K_6
1SS355
1SS355 1SS355
1SS355
RB501V-40
RB501V-40
R355
R355
VCC
OR
DC
G D
LANVCC
*0_4
*0_4
8 7 6 5
LAN_ACT# LAN_LI
NK# 25
LAN_LI
NK1# 25
RT28
25
15
PLTRST_LAN#
LANVCC
C562
C562 *
*
0.1U/16V/Y5V_4@NC
0.1U/16V/Y5V_4@NC
16
E
24
DVDD1
1 1
A
2
B
R148
R148
0_8
0_8
CTRL12/
VDD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Si
Si
Size Document Number Rev
ze Document Number Rev
ze Document Number Rev
LAN RTL8111DL/RTL8103E
LAN RTL8111DL/RTL8103E
LAN RTL8111DL/RTL8103E
Date: Sheet
Date: Sheet
C
D
Date: Sheet
PROJECT :
ZN1
ZN1
ZN1
1A
1A
L
L
L
of
24
of
24
of
24
1A
41Friday, May 08, 2009
41Friday, May 08, 2009
41Friday, May 08, 2009
E
5
D D
10/100M
U8
U8
TC
.
.
01u/16V_4
01u/16V_4
.01u/16V_4
.01u/16V_4
.
01u/16V_4C534.01u/16V_4C534
01u/16V_4C545.01u/16V_4C545
.
T1
1
TC
T1
2
1+
TD
3
TD
1-
TC
T2
4
TC
T2
5
TD
2+
6
TD2-
7
T3
TC
8
TD
3+
9
TD
3-
10
TC
T4
11
TD
4+
12
TD
4-
S892405
S892405
N
N
MC
MX
MX
MC
MX
MX2-
MC
MX
MX
MC
MX
MX
24
T1
23
1+
22
1-
21
T2
20
2+
19
18
T3
17
3+
16
3-
15
T4
14
4+
13
4-
C494
C494
L
AN0_MDI0+24 AN0_MDI0-24
L
C520
C520
L
AN0_MDI1+24
L
AN0_MDI1-24
C C
L
AN0_MDI2+24 AN0_MDI2-24
L
L
AN0_MDI3+24 AN0_MDI3-24
L
100/1000 Base T NS892402
B B
10/100 Base T NS892405
4
10/100M
L
ANCT1
R347 75/F_0805R347 75/F_0805
X
-INT_TRDP0
X
-INT_TRDM0
L
ANCT2
R
R
354 75/F_0805
354 75/F_0805
-INT_TRDP1
X
-INT_TRDM1
X
ANCT4
L
L
ANCT5
R
R
359 75/F_0805
359 75/F_0805
365 75/F_0805
365 75/F_0805
R
R
X
-INT_TRDP2
X
-INT_TRDM2
X-INT_TRDP3 X
-INT_TRDM3
change the footprint and BOM
C4
C4
78
78
1500P/3KV_1808
1500P/3KV_1808
3
LA
N Transformer & WIRE CONN to RJ45
2
RJ45
C
C
187 *1500p/50V_6
187 *1500p/50V_6
C558 *1500p/50V_6C558 *1500p/50V_6
GLED-LAN_LINK# GLE
C1
C1 *1500p/50V_6
*1500p/50V_6
T2
R
R
T1
R
R
L3
13
L4
14
R10
10
R9
R8
R7
R6
R6
R5
R5
R4
R3
R2
R1
L11
11
L12
D+
12
69
69
462 *0_4
462 *0_4
465 *0_4
465 *0_4
9 8 7 6 5 4 3 2 1
RJ45-CONN
RJ45-CONN
AN0_MDI1-
L
AN0_MDI1+
L
AN0_MDI0-
L L
AN0_MDI0+
LA
-INT_TRDM3
X X
-INT_TRDP3
-INT_TRDM2
X X
-INT_TRDP2
X
-INT_TRDM1
-INT_TRDP1
X X
-INT_TRDM0
X
-INT_TRDP0
463 *0_4
463 *0_4
R
R R
R
464 *0_4
464 *0_4 466 *0_4
466 *0_4
R
R R
R
467 *0_4
467 *0_4
N_ACT#
ANVCC
L
LANVCC
X X X X
LA
N_ACT#24
L
AN_LINK#24 AN_LINK1#24
L
60 0_4
60 0_4
R4
R4 R4
R4
61 0_4
61 0_4
R
R R
R
*1500p/50V_6
*1500p/50V_6
-INT_TRDM1
-INT_TRDP1
-INT_TRDM0
-INT_TRDP0
R
R
377 510_6
377 510_6
367 510_6
367 510_6 457 0_6
457 0_6
C1
C1
64
64
TC
TC
CN1
CN1
Y­Y+
3-
NC/ NC/
3+ 2-
NC/ NC/
2+
NC/
6
NC/
5
RX
-/1­RX+/1+ TX
-/0-
TX
+/0+
G­G+
R6
R5
1
25
3
3
18
NC1
17
NC
16
GN
D
15
GN
D
delete RV1-RV8
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
S
S
ize Document Number Rev
ize Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT :
LAN Tr
LAN Tr
LAN Tr
ansformer & RJ45
ansformer & RJ45
ansformer & RJ45
ZN1
ZN1
ZN1
1A
1A
1A
41Friday, May 08, 2009
41Friday, May 08, 2009
41Friday, May 08, 2009
of
25
of
25
of
25
1
5
W
W
CM2012-110
CM2012-110
L44
L44
1
SBP0-15
U U
SBP0+15
D D
change BOM value
3 4
2
12
D51
D51
19
19
RV
RV
A-0402
A-0402 EG
EG
U
2 1
U
SBP0+R
*
*
PESD5V0U1BB
PESD5V0U1BB
SBP0-R
*
*
PESD5V0U1BB
PESD5V0U1BB
US
BVCC0
12
D49
D49
17
17
RV
RV
A-0402
A-0402 EG
EG
2 1
ADD ESD protect component
CM2012-110
CM2012-110
W
W
L41
L41
U
SBP1-R
1
U
SBP1-15
U
SBP1+15
change BOM value
C C
SBP2-15
U U
SBP2+15
change BOM value
3 4
W
W
CM2012-110
CM2012-110
L42
L42
1 3 4
2
U
SBP1+R
12
D46
D46
RV
RV
15
15
GA-0402
GA-0402 E
E
2 1
SBP2-R
U
2
U
SBP2+R
RV
RV
*
*
PESD5V0U1BB
PESD5V0U1BB
12
D47
D47
16
16
A-0402
A-0402 EG
EG
2 1
BVCC1
US
*
*
*
*
PESD5V0U1BB
PESD5V0U1BB
PESD5V0U1BB
PESD5V0U1BB
D44
D44
12
RV
RV
13
13
2 1
GA-0402
GA-0402 E
E
ADD ESD protect component
U
SBVCC2
*
*
PESD5V0U1BB
PESD5V0U1BB
D45
D45
12
RV
RV
14
14
A-0402
A-0402
2 1
EG
EG
4
US
US
US
BVCC0
B
B
1 2 3 4 5 6
US
US
B
B
1 2 3 4 5 6
US
US
B
B
1 2 3 4 5 6
CN16
CN16
CN20
CN20
CN19
CN19
US
US
BVCC1
BVCC2
40 mils
C197
C197
0.
0.
1U/25V/4
1U/25V/4
40 mils
C248
C248
0.
0.
1U/25V/4
1U/25V/4
40 mils
C251
C251
0.
0.
1U/25V/4
1U/25V/4
C446
C446
6.3V/3528
6.3V/3528
100U/
100U/
C425
C425
C424
C424
6.3V/3528
6.3V/3528
100U/
100U/
6.3V/3528
6.3V/3528
100U/
100U/
C249
C249
6.3V/3528
6.3V/3528
100U/
100U/
C253
C253
6.3V/3528
6.3V/3528
100U/
100U/
C212
C212
6.3V/3528
6.3V/3528
100U/
100U/
PESD
PESD
5V0U1BB
5V0U1BB
PESD
PESD
5V0U1BB
5V0U1BB
PESD
PESD
5V0U1BB
5V0U1BB
D7
D7
2 1
D10
D10
2 1
D9
D9
2 1
3
F7
P
P
OLY_SWITCH
OLY_SWITCH
/50V/4
/50V/4
1 2
P
P
OLY_SWITCH
OLY_SWITCH
/50V/4
/50V/4
POLY_SWITCH
POLY_SWITCH
/50V/4
/50V/4
F7
1 2
R157
R157 20K
20K
_4
_4
F8
F8
R175
R175 20K
20K
_4
_4
F1
F1
1 2
R203
R203
_4
_4
20K
20K
R156
R156
10K
10K
0
0
R204
R204
10K
10K
R176
R176
10K
10K
US
_4
_4
BVCC2
US
_4
_4
_4
_4
5V
U
SB_OCP0#15
5V
U
SB_OCP2#15
SB_OCP4#15
U
40 mils
SUS
C220
C220 470P
470P
40 mils
SUS
C254
C254 470P
470P
40 mils
5V
SUS
C287
C287 470P
470P
BVCC0USBVCC0
US
BVCC4
2
F9
P
P
OLY_SWITCH
OLY_SWITCH
/50V/4
/50V/4
1 2
P
P
OLY_SWITCH
OLY_SWITCH
POLY_SWITCH
POLY_SWITCH
/50V/4
/50V/4
1 2
R179
R179 20K
20K
_4
_4
F6
F6
1 2
R208
R208
_4
_4
20K
20K
F9
C198
C198 470P
470P
F1
F1
R178
R178
10K
10K
1
1
R207
R207
10K
10K
_4
_4
/50V/4
/50V/4
_4
_4
R150
R150 20K
20K
US
BVCC1
BVCC3
US
R152
R152
10K
10K
_4
_4
US
BVCC5
40 mils
SUS
5V
SB_OCP1#15
U
5V
SUS
5V
SB_OCP5#15
U
SUS
C261
C261 470P
470P
40 mils
U
SB_OCP3#15
40 mils
C294
C294 470P
470P
1
26
_4
_4
ADD ESD protect component
B
B
US
US
US
CM2012-110
CM2012-110
W
W
L45
L45
U
SBP3-R
1
U
SBP3-15 SBP3+15
U
B B
change BOM value
A A
3 4
2
SBP3+R
U
12
D52
D52
RV
RV
20
20
A-0402
A-0402 EG
EG
2 1
BVCC3
US
*
*
*
*
PESD5V0U1BB
PESD5V0U1BB
PESD5V0U1BB
PESD5V0U1BB
12
D50
D50
18
18
RV
RV
A-0402
A-0402 EG
EG
2 1
BVCC3
CN17
CN17
40 mils
C214
C214
1U/25V/4
1U/25V/4
0.
0.
C471
C471
6.3V/3528
6.3V/3528
100U/
100U/
C196
C196
6.3V/3528
6.3V/3528
100U/
100U/
PESD
PESD
5V0U1BB
5V0U1BB
40 mils
D8
D8
2 1
SBP5+15
U
U
SBP5-15
change BOM value
USBP4+15
USBP4-15
W
W
CM2012-110
CM2012-110
L34
L34
1 3 4
WCM2012-110
WCM2012-110
1 3 4
C300
CN26
CN26
1
4
V
GN
SB_5_FB
2
RV12
RV12
L33
L33
RV10
RV10
*AZ2015-01H_ESD
*AZ2015-01H_ESD
12
D27
D27
2 1
2 1
EGA-0402
EGA-0402
2
D25
D25
D24
D24
*AZ2015-01H_ESD
*AZ2015-01H_ESD
12
EGA-0402
EGA-0402
2 1
2 1
U
U
SB_5_FB#
*AZ2015-01H_ESD
*AZ2015-01H_ESD
D26
D26
12
RV11
RV11
EGA-0402
EGA-0402
USB_4_FB
USB_4_FB#
*AZ2015-01H_ESD
*AZ2015-01H_ESD
12
RV9
RV9
EGA-0402
EGA-0402
D
3
D
D+
GN
D
GN
2
D-
GN
D
GN
D
SI
SI
DE_USB
DE_USB
For EMI
CN25
CN25
1
V
GN
3
D+
GND GN
2
D-
GN GN
SIDE_USB
SIDE_USB
For EMI
5 6 7 8
4
D
5 6
D
7
D
8
D
C300
0.
0.
1U/25V/4
1U/25V/4
C299
C299
0.1U/25V/4
0.1U/25V/4
1 2 3 4 5 6
C297
C297
C296
C296
US
BVCC4
PESD5V0U1BB
PESD5V0U1BB
D14
D14
C292
C292
2 1
100U/6.3V/3528
100U/6.3V/3528
100U/6.3V/3528
100U/6.3V/3528
VCC
DATA+
DATA-
USBVCC5
PESD5V0U1BB
PESD5V0U1BB
C293
C293
D15
D15
2 1
100U/6.3V/3528
100U/6.3V/3528
100U/6.3V/3528
100U/6.3V/3528
GND
Qu
Qu
Qu
anta Computer Inc.
anta Computer Inc.
anta Computer Inc.
PROJECT :
PROJECT :
B Port X6
B Port X6
B Port X6
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
US
US
US
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
ZN1
ZN1
ZN1
26 41F riday, May 08, 2009
26 41F riday, May 08, 2009
1
26 41F riday, May 08, 2009
A
A
A
5
4
3
2
1
27
Me
V
CC3_CARD
V
R264
R264
R242
R242 R229
R229
V
CC3_CARD
/MS_3V
SD
V
CC3_CARD
MS_CD_CLK/XD_CD_R
VCC3_CARD
CC3_CARD
C303
C303
6.3V_6
6.3V_6
10u/
10u/
10K_4
10K_4
200K_4
200K_4 200K_4
200K_4
V
CC3_CARD
SD
S_CD_CLK/XD_CD_R
M MS_
S_D3/SD_D3/XD_D3
M M
S_D2/SD_D2/XD_D2 S_D1/SD_D1/XD_D1
M M
S_D0/SD_D0/XD_D0
PL
TRST#12,14,16,20,24,30
R193
R193 R262
R262
R230
R230
R234 4.7K_4R234 4.7K_4
R233 4.7K_4R233 4.7K_4
C313
C313
1u/10V_4
1u/10V_4
0.
0.
D_C_L
X
XD
_READ
X
D_ADD_L
+
1.8V_VDD
X
_WP#/XD_WP
BS/SD_CMD/XD_WE
_PCIE_JM385#3
CLK
CLK
_PCIE_JM3853
10K_4
10K_4 10K_4
10K_4 1K/F_4
1K/F_4
R263 22_4R263 22_4
D_C_L
R124
R124
MS_CD#
C343
C343
1u/10V_4
1u/10V_4
0.
0.
0_4
0_4
R244
R244
SD
_WP#/XD_WP
MS_
BS/SD_CMD/XD_WE
XD
SD_CD#/XD_CD#
V
CC3_CARD
C341
C341
C305
C305
1u/10V_4
1u/10V_4
1u/10V_4
1u/10V_4
0.
0.
*0.
*0.
34
NC36NC35NC
37
18
DV
38
IES_EN
PC
39
PC
IES
40
MD
IO7
41
MD
IO6
42
MD
IO5
43
IO4
MD
44
DV
33
45
MD
IO3
46
MD
IO2
47
MD
IO1
48
IO0
MD
STN
EST
XR
XT
1
2
3
CA
RD_REST#
12 mil
8.2K_4
8.2K_4
Change Netlist
_R/B
MS_CD_CLK/XD_CD
C342
C342 *22p_4
*22p_4
+
1.8V_VDD
C304
C304
1u/10V_4
1u/10V_4
0.
0.
Three capacitor close the pin 10 , 18 and 37
CC3_CARD
V
_READ
_D4XD_D5XD_D6XD_D7
XD
33
32
31
30
D
D
D
GN
GN
GN
AV33 T
JMB385
JMB385
D
ND
LKN
LKP
EXT
APC
APC
APVD
APG
APR
4
5
7
6
EXT PR
XD
29
28
IO8
IO9
MD
MD
XP
XN
APR
APR
8
9
V
27
D
10
CC3_CARD
26
25
U16
U16
IO10
IO11
IO12
24
MD
MD
MD
D
GN
23
IO13
MD
22
MD
IO14
21
CR1
_LEDN
20
DV
33
19
DV
33
18
18
DV
17
CR1
_PCTLN
16
CR1
_CD0N
15
CR1
_CD1N
14
NC
13
3E_WAKEN 8
XN
XP
APV1
APT
APT
11
12
MICRON
MICRON
J
J
AP
RXP_C
A
PRXN_C
PVDD(pin5) must put 1000pF close to
A APVDD(pin5) (length must under 120mil) and trace width = 20mil, after 1000pF, pls put 0.1uF and then 10uF for it.
D D
C C
B B
C344
C344
1u/10V_4
1u/10V_4
0.
0.
XD
_R/B
X
D_ADD_L
RD_LED
CA
D_CD#/XD_CD#
S
M
S_CD#
+
1.8V_VDD
0.
1u/10V_4C3080.1u/10V_4C308 1u/10V_4C3090.1u/10V_4C309
0.
For A
C318
C318 10u/
10u/
+
1.8V_VDD
C310
C310
1u/10V_4
1u/10V_4
0.
0.
+
1.8V_VDD
20mil
SD
G
PP_RX4P_CARD 11 PP_RX4N_CARD 11
G
G
PP_TX4P_CARD 11 PP_TX4N_CARD 11
G
PVDD(pin5)
C317
C317
0.
0.
6.3V_6
6.3V_6
*B
*B
K1608HS220_6_1A
K1608HS220_6_1A
S
D_CD#/XD_CD#
/MS_3V
R3
1.8V_VDD
+
1u/10V_4
1u/10V_4
L37
L37
MS_
D_CD#/XD_CD#
S
22_4R322_4
2
C316
C316 1000p/
1000p/
Reserve
CD#
V
CC3
1
3
50V_4
50V_4
V
CC1.8
D22
D22
R4
R4 10K
10K
Q3
Q3 *2N7002E
*2N7002E
D19
D19
D18
D18
_4
_4
to SB700
C
R_CPPE# 15
*1SS355
*1SS355
-LF
-LF
1SS355
1SS355
1SS355
1SS355
SD
SD
/MS_3V
/MS_3V
CR_W
C357
C357
0.
0.
C353
C353
0.
0.
AKE# 14
1U
1U
SD
1U
1U
CARD_REST#
X
D_CD#
/MS_3V
CC3
V
RV
SD
C354
C354
0.
0.
R253
R253
CC3
R257
R257
X
D_CD#
XD
_R/B _READ
XD M
S_CD_CLK/XD_CD
D_C_L
X X
D_ADD_L
MS_
BS/SD_CMD/XD_WE
_WP#/XD_WP
SD
S_D0/SD_D0/XD_D0
M M
S_D1/SD_D1/XD_D1
M
S_D2/SD_D2/XD_D2 S_D3/SD_D3/XD_D3
M XD
_D4 _D5
XD XD
_D6
XD
_D7
/MS_3V
BS/SD_CMD/XD_WE
MS_ M
S_D1/SD_D1/XD_D1
SD
1U
1U
R125 *0_4R125 *0_4
0_6
0_6
*0_6
*0_6
/MS_3V
10u/
10u/
C302
C302
6.3V_6
6.3V_6
PLTRST_CARD# 16
V
CC3_CARD
Reserve for EMI
R21433R214
33 33
R21333R213 R21233R212
33
R21833R218
33
R22033R220
33
R22233R222
33 33
R22433R224 R22633R226
33
R22833R228
33
R22733R227
33 33
R22533R225 R22333R223
33
R22133R221
33
R21933R219
33
R21733R217
33 33
R21633R216
R27533R275
33
R27633R276
33
CA
RD_LED
CN24
CN24
1
D-GND1
X
2
D-CD#
X
3
XD
-R/B
4
XD
-RE
5
XD
-CE
6
XD
-CLE
7
-ALE
XD
8
XD
-WE
9
XD
-WP
10
X
D-GND2
11
XD
-D0
12
-D1
XD
13
-D2
XD
14
XD
-D3
15
-D4
XD
16
XD
-D5
17
XD
-D6
18
-D7
XD
19
-VCC
XD
20
S-GND1
M
21
MS
DAT1
22 44
-BS
MS
-D1
n-GND1
Co
T
T
AI TWUN 6 IN 1 PUSH TYPE
AI TWUN 6 IN 1 PUSH TYPE
MS_
mory Card Power Supply
S S
SD
S
M
MS
M M
MS
Co
SD
D-GND1
S
D-CD#
D-GND2
SD SD SD
SD
-GND
SD
_VCC D-GND3 SD
-CMD
SD S-GND2 MS
-VCC
-SCLK
S-P-D3
MS
S-P-D2
-SDIO
n-GND2
GN
-CLK
/MS_3V
SD
R215
R215 150/
150/
F_4
F_4
21
LE
LE
D2
D2
LED17-21VGC-TR8
LED17-21VGC-TR8
LED17-21VGC-TR8
LED17-21VGC-TR8
43
D
42
-WP
41 40 39 38
-D2
37
-D1
36
-D0
35 34 33 32 31 30
-D3
29 28 27 26 25
-INS
24 23 45
S/SD_DAT3
M
MS_
MS/
DAT2
SD_DAT0
M M M
SD
_WP#/XD_WP
R19533 R19533
S_D2/SD_D2/XD_D2SD_CD#/XD_CD# S_D1/SD_D1/XD_D1 S_D0/SD_D0/XD_D0
S_CD_CLK/XD_CD
M
BS/SD_CMD/XD_WE
MS_ M
S_D3/SD_D3/XD_D3
M
S_CD_CLK/XD_CD
S_D3/SD_D3/XD_D3
M
R27833 R27833
S_D2/SD_D2/XD_D2
M
R27933 R27933
M
S_D0/SD_D0/XD_D0
R27733 R27733
R196*10K R196*10K
/MS_3V
SD
/MS_3V
SD
V
CC3_CARD
M
S_CD#
R280*10K R280*10K
V
CC3_CARD
A A
anta Computer Inc.
anta Computer Inc.
anta Computer Inc.
Qu
Qu
Qu
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Card
Card
Card
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Reader
Reader
Reader
PROJECT :
ZN1
ZN1
ZN1
1A
1A
27 41F riday, May 08, 2009
27 41F riday, May 08, 2009
1
27 41F riday, May 08, 2009
1A
5
4
3
2
1
DD_12V
H
12
F5
F5 3A
3A
RC1
RC1
206
C1
C1
+
+
100U/16V
100U/16V
206
1
2VSATA
C1
C1
23
30
30
23
0.1U/25V/4
0.1U/25V/4
10U/25V/12
10U/25V/12
D D
C C
V
CC5
60 mils
12
F3
F3 3A
3A
RC1
RC1
206
206
0103
VSATA
5
C1
C1
25
25
V
CC3
12
RC1
RC1
3A
3A F4
F4
C
C
+
+
100U/16V
100U/16V
129
129
206
206
+
+
C1
C1
31
31
100U/16V
100U/16V
3
VSATA
12
12
C1
C1
0.1U/25V/4
0.1U/25V/4
C
C
111
111
0.1U/25V/4
0.1U/25V/4
C1
C1 10U/6.3V/6
10U/6.3V/6
16
16
C1
C1
15
15
10U/6.3V/6
10U/6.3V/6
SAT SAT
SAT SAT
A_TXP016 A_TXN016
A_RXN016 A_RXP016
SAT SAT
SAT SAT
5
VSATA
1
2VSATA
A_TXP0 A_TXN0
A_RXN0 A_RXP0
3
VSATA
1 2 3 4 5 6 7
8
9 10 11 12 13 14 15 16 17 18 19 20 21
ATA HDD CONN
ATA HDD CONN
S
S
SATA HDD CONNECT
CN8
CN8
G
ND1
TX
P N
TX
ND2
G RX
N
RX
P
G
ND3 3V
3.
3.
3V
3.
3V
GN
D D
GN
D
GN 5V 5V 5V GN
SVD
R GN 12V 12V 12V22XX
28
D
XX
27
XX
26
XX
D
25
XX
23
XX
24
SATA_LED#16,31
CC3
V
R5
R5 150/F_4
150/F_4
21
LE
LE LED12-21SYGC-Green
LED12-21SYGC-Green
28
0
0
D1
D1
B B
DD_CONN
DD_CONN
O
V
CC5
F1
F1
2
2
5
1 2
3A
3A
RC1206
C
C
587
587
0.1U/25V/4
0.1U/25V/4
A A
5
C
C
589
589
10U/6.3V/6
10U/6.3V/6
C5
C5
86
86
100U/6.3V/3528
100U/6.3V/3528
RC1206
VSATA_ODD
4
3
SATA ODD CONNECTOR
SAT
A_RXN316
SAT
A_RXP316
SAT
A_TXN316
SAT
A_TXP316
SAT
2
A_RXN3
SAT
A_RXP3 A_TXN3
SAT SAT
A_TXP3
Size Document Number Rev
S
S
ize Document Number Rev
ize Document Number Rev
S
S
S
ATA HDD/ODD
ATA HDD/ODD
Date: Sheet
Date: Sheet
Date: Sheet
ATA HDD/ODD
VSATA_ODD
5
DP
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
O
CN5
CN5
12 11 10 9 8 7 6 5 4 3 2 1
ZN1
ZN1
ZN1
A
A
A
41Friday, May 08, 2009
41Friday, May 08, 2009
41Friday, May 08, 2009
of
28
of
28
of
28
1
5
CC5
V
14
14
AC
AC
0.1U/25V/X7R/4
0.1U/25V/X7R/4
Place next to pin 39
D D
PC
PC
0.1U/25V/X7R/4
0.1U/25V/X7R/4
Place next to pin 46
VA
+5
Place next to pin 38
C C
B B
P_GND
AM
Tied at one point only under the ALC269 or near the ALC269
15
15
AC
AC 10U/6.3V/X5R/0603
10U/6.3V/X5R/0603
AM
P_GND
CC5
V
81
81
9
9
AC
AC 10U/6.3V/X5R/0603
10U/6.3V/X5R/0603
AM
P_GND
Spilt by DGND
34
34
AC
AC 10U/6.3V/X5R/0603
10U/6.3V/X5R/0603
0V : Power down Class D SPK amplifer
3.3V : Power up Class D SPK amplifer
8 0_4AR8 0_4
AR
9 0_4AR9 0_4
AR
AR
10 0_4AR10 0_4
33
33
AC
AC
0.1U/25V/X7R/4
0.1U/25V/X7R/4
AM
AM
AR
AR
AR
P_GND
CC5
V
EAP
P_GND
CC3
V
DMIC_
MIC_CLK22
D
14 0_4AR14 0_4
7 0_4AR7 0_4
6 0_4AR6 0_4
VC
D#123
digital_ground
AC
AC
29
29
2.2U/6.3V/X5R/0603
2.2U/6.3V/X5R/0603
37 38
C5
39
K+
L_SP
40
K-
L_SP
41 42 43
SPK-
R_
44
SPK+
R_
45 46
EAP
D#1
47 48 49
36
36
AC
AC
0.1U/25V/X7R/4
0.1U/25V/X7R/4
Place next to pin 1
DAT22
P_GND
AM
AC
AC
2.2U/6.3V/X5R/0603
2.2U/6.3V/X5R/0603
+
+
36
P CB
AVSS2
VDD2
A P
VDD1
L+
SPK­SPK-
L-
(Vista Premium Version)
PVSS1 PVSS2
R-
SPK­SPK-
R+
P
VDD2
SPD
IFO2/EAPD IFO
SPD PGN
D
DD1 DV
1
37
37
AC
AC 10U/6.3V/X5R/0603
10U/6.3V/X5R/0603
299 0R_4
299 0R_4
R
R
298 0R_4
298 0R_4
R
R
#
PD
23 0_4AR23 0_4
AR
AR
16 0_4AR16 0_4
AR
24 0_4AR24 0_4
Analog_ground
OUT_R
HP HP
OUT_L
+
+
27
27
32
33
34
35
N CB
PVEE
-OUT-L
C
-OUT-R HP
HP
#
ATA-OUT
PIO0/DMIC-DATA
PIO1/DMIC-CLK
G
G
PD
SD
2
3
4
5
Z_BITCLK_AUDIO_R AC
4
4
AC
AC
10p/50V_4
10p/50V_4
de-pop sound circuit
AD1
5 1M /J_4AR5 1M /J_4
AR
AD1
SDM10K45-7-F
SDM10K45-7-F
5
AU
AU
1 6
7WZ14
7WZ14
1
1
AC
AC
10U/6.3V/X7R/0603
10U/6.3V/X7R/0603
AR3 0_4AR3 0_4
1A
1A
4 10R /J_4AR4 10R /J_4
AR
ACZ_RESET#_AUDIO15
A A
4
R1
R1
83
KR15
SP
MIC1
-VREFO-R
-VREFO-L
MIC1
10K_4
10K_4
83
R1
R1
84
84
1K/F_4
1K/F_4
Place next to pin 27
28
28
AC
AC
10U/6.3V/X5R/0603
10U/6.3V/X5R/0603
25
27
31
30
PVREF C
T-CLK BI
7
6
-VREFO-R MIC1
VSS2 D
Z_BITCLK_R AC
29
-VREFO MIC2
ATA-IN SD
8
AC
AC
28
EF VR
IC1-VREFO-L M
C
DD-IO DV
SYN
9
10
35 *10p/50V_4
35 *10p/50V_4
AR13 22_4AR13 22_4
17 *0_4AR17 *0_4
AR
AR15 0_4AR15 0_4
22 *0_4AR22 *0_4
AR
AR38 *0_4AR38 *0_4
26
VDD1
AVSS1
A
LI
LI
MO
NO-OUT
Se
LI
LI Se
BEEP ESET# R
PC
ALC269
ALC269
11
12
100P/50V_6
100P/50V_6
AC
Z_RESET#_AUDIO
MIC1 MIC1
MIC2 MIC2
JDRE
NE1-R NE1-L
NE2-R NE2-L
nse-B
nse A
-R
-L
F
-R
-L
C2
C2
1u/10V_6
1u/10V_6
C2
C2
AR
34 22_4AR34 22_4
AU
AU
5
5
24 23 22 21 20 19 18 17 16 15 14 13
DIGITAL
81
81
BEEP
80
80
ZA_VDD
+A
SEN
AM
AC
AC
32
32
0.1U/25V/X7R/4
0.1U/25V/X7R/4
AR
AR
31 20K/F/4
31 20K/F/4
SE#
ANALOG
185 0_4R185 0_4
R
_1
R1
R1
86
86
*1K_4
*1K_4
ACZ_RESET#_AUDIO 15 ACZ_SYNC_AUDIO 15 AC
Z_SDIN0 15
AC
Z_SDOUT_AUDIO 15
ACZ_BITCLK_AUDIO 15
12 0_4AR12 0_4
AR
P_GND
0.1U/25V/X7R/4
0.1U/25V/X7R/4
NEOUT_R 23
LI
NEOUT_L 23
LI
MICIN
-R
-L
MICIN
32 39.2K/F/4
32 39.2K/F/4
AR
AR
R
R
297 10K/F_4
297 10K/F_4
AR
AR
33 20K/F/4
33 20K/F/4
C_BEEP
P
Place next to pin 9
AC
AC
31
31
PSENSE#
H
ICSENSE#
M
AC
AC
5
5
0.1U/25V/X7R/4
0.1U/25V/X7R/4
For EMI
For EMI
1 *0_4AR1 *0_4
V
CC3
5
3 4
AU
AU
7WZ14
7WZ14
AR
1B
1B
2 1
3 5
4
2
2
AU
AU
TC7SH08FU(F)
TC7SH08FU(F)
*1000P/50V/X7R/4
*1000P/50V/X7R/4
VO
LMUTE#32
EAP
D#
AC
AC
2
2
3
71
71
C2
C2
P
C_BEEP
1U_6
1U_6
+5
VA
AC
AC
30
30
10U/6.3V/X5R/0603
10U/6.3V/X5R/0603
Place next to pin 25
NEOUT_JD# 23
LI
V
CC1.5
94
94
R1
R1 *0_8
*0_8
189 0_8R189 0_8
R
AC
AC
7
7
10U/6.3V/X5R/0603
10U/6.3V/X5R/0603
VCC3
53
AU
AU
6
6
1
4
2
NL17SZ32DF T2G
NL17SZ32DF T2G
2
Demodulation Filter
Place close to Codec
AL1
VC
C5
AC
AC
16
16
0.1U/25V/X7R/4
0.1U/25V/X7R/4
Close to AU5
Close to AU5
V
CC3
MICIN MICIN
M
ICSENSE#
-L
26
26
AC
AC
-R
AC
AC
25 4.7U/6.3V/X5R/0603
25 4.7U/6.3V/X5R/0603
4.7U/6.3V/X5R/0603
4.7U/6.3V/X5R/0603
Max. 100mVrms input for Mic-IN
OUT_L
HP
OUT_R
HP
H
PSENSE#
PD
# 2 3
*
*
TI201209U220/0805
TI201209U220/0805
3
IN
2
GN
D
1
S
HDN
MAX8863SEUK+T
MAX8863SEUK+T
2nd Source G913
AR
18 0_4AR18 0_4
K+
L_SP
AL6
AL6 0_8
0_8
AL7
AL7
K-
L_SP
_SPK-
R
AL8
AL8 0_8
0_8
R
_SPK+
-L1
MICIN MICIN
-R1
27 75R/F/0402
27 75R/F/0402
AR
AR AR
AR
25 75R/F/0402
25 75R/F/0402
AL1
4
4
AU
AU
0_8
0_8
AM
AL9
AL9 0_8
0_8
28 1K/F_4
28 1K/F_4
AR
AR AR
AR
26 1K/F_4
26 1K/F_4
OU
SET
AM
MIC1
MIC1
T
P_GND
P_GND
4
5
-VREFO-R
-VREFO-L
OUT_L1HPOUT_L1
HP
OUT_R1
HP
21 29.4K/F/4
21 29.4K/F/4
AR
AR
AR
AR
20
20
10K/F/4
10K/F/4
AC
AC
6
6
*1000P/50V/X7R/0603
*1000P/50V/X7R/0603
AC
AC
10
10
*1000P/50V/X7R/0603
*1000P/50V/X7R/0603
AC
AC
11
11
*1000P/50V/X7R/0603
*1000P/50V/X7R/0603
13
13
AC
AC
*1000P/50V/X7R/0603
*1000P/50V/X7R/0603
29
29
AR
AR
4.7K/F_4
4.7K/F_4
-L2
MICIN MICIN
-R2
AL3
AL3
AL2
AL2
VA
+5
Vset =1.25V Vout =Vset[1+AR(1,2)/AR(2,GND)]
AC
AC
18
18
AC
AC
19
BK1608H
BK1608H
M241-T
M241-T
BK1608HM241-T
BK1608HM241-T
PESD
PESD
23
23
5V0U1BB
5V0U1BB
21
21
AC
AC
50V/X7R/4
50V/X7R/4
1000P/
1000P/
19
0.1U/25V/X7R/4
0.1U/25V/X7R/4
change BOM value change footprint
24
24
AC
AC
1
1
D3
D3
2 1
20P/50V/X7R/4
20P/50V/X7R/4 2
2
HP HP
22
22
AC
AC
PESD
PESD
5V0U1BB
5V0U1BB
9
9
D2
D2
50V/X7R/4
50V/X7R/4
2 1
1000P/
1000P/
10U/25V_1206
10U/25V_1206
AC
AC
*1U/16V/X5R/0603
*1U/16V/X5R/0603
AC
AC
*1U/16V/X5R/0603
*1U/16V/X5R/0603
30
30
AR
AR
4.7K/F_4
4.7K/F_4
AL5
AL5
AL4
AL4
220P/50V/X7R/4
220P/50V/X7R/4
M241-T
M241-T
BK1608H
BK1608H
BK1608HM241-T
BK1608HM241-T
8
8
12
12
AC
AC
Speaker OUT
ACN2AC
N2
Internal SPK_L+
1
Internal SPK_L-
2
Internal SPK_R-
3
Internal SPK_R+
4
PESD5V0U1BB
PESD5V0U1BB
D3
D3
2 1
OUT_L2 OUT_R2
PESD
PESD
5V0U1BB
5V0U1BB
AC
AC
0.1U/25V/X7R/4
0.1U/25V/X7R/4
-L3
MICIN MICIN
-R3
0
0
2
2
D3
D3
2 1
20
20
MI
1
AC
AC
17
17
0.1U/25V/X7R/4
0.1U/25V/X7R/4
C-IN Jack
AC
AC
6 1 2
3 4 5 7
MIC_JACK
MIC_JACK
8
He
adphone-OUT
ACN4
ACN4
6 1 2
3 4 5 7 8
Headphone_JACK
Headphone_JACK
N3
N3
29
Vender suggest (Reltek)
Q
Q
Q
uanta Computer Inc.
uanta Computer Inc.
uanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
Realtek ALC269
Realtek ALC269
Realtek ALC269
ZN1
ZN1
ZN1
29
29
1
29
1A
1A
1A
41Friday, May 08, 2009
41Friday, May 08, 2009
41Friday, May 08, 2009
5
4
3
2
1
Mini Card (WLA
CN11
D D
GP
P_TX0P_WLAN11
GP
P_TX0N_WLAN11
GP
P_RX0P_WLAN11
GP
P_RX0N_WLAN11
PC
LK_DBC14
PC
IRST#14
C
LK_PCIE_WLAN3 LK_PCIE_WLAN#3
C
C C
94 *0R_4
94 *0R_4
R
R
R 1K_4
1K_4
456
456
R
V
CC3
3
MX
7 8
0
MX
5
6
MX
3
MX
5
1
10
MY
7 8
MY
14
5
MY
11
3
2
MY
1
MY
4
7 8
MY
1
5
3
MY
3
5
MY
1
6
MY
7 8
7
MY
5
MY
8
3
MY
9
1
2
MX
7 8
4
MX
5
MX
1
3
MX
7
1
0
MY
7 8
12
MY
5
13
MY
3
MY
15
1
0402 size
IE_WAKE#15,24
PC
88502-2401-24P-L
88502-2401-24P-L
2
MX
B B
A A
24
24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1
CO
CO
N2
N2
4
MX
23
MX
1
22
7
MX
21
MX
3
20
MX
0
19
6
MX
18
MX
5
17
MY
4
16
1
MY
15
3
MY
14
5
MY
13
6
MY
12
MY
7
11
MY
8
10
9
MY
9
10
MY
8
MY
14
7
MY
11
6
2
MY
5
0
MY
4
12
MY
3
MY
13
2
MY
15
1
EC debug port
5
51 49 47 45 43 41 39 37 35 33 31 29 27 25 23 21 19 17
15 13 11
CP
CP
6
*220P X 4_4
*220P X 4_4
4 2
CP
CP
6
*220P X 4_4
*220P X 4_4
4 2
CP
CP
6
*220P X 4_4
*220P X 4_4
4 2
CP
CP
6
*220P X 4_4
*220P X 4_4
4 2
CP
CP
6
*220P X 4_4
*220P X 4_4
4 2
CP
CP
6
*220P X 4_4
*220P X 4_4
4 2
CN11
Res Res Res Res Res Res Res Res GN
D PET PET GN
D GN
D PER PER
D
GN Res Res
D
GN REFCLK+ RE
FCLK-
9
GN
D
7
C
LKREQ#
5
Res
3
Res
1
W
AKE#
Mini PCI-E
Mini PCI-E
67910-0002
1
1
6
6
2
2
3
3
4
4
5
5
4
erved erved erved erved erved erved erved erved
p0 n0
erved erved
erved erved
N)
4
4
1
30
ZN1
ZN1
ZN1
30
30
30
A
A
A
41Friday, May 08, 2009
41Friday, May 08, 2009
41Friday, May 08, 2009
of
of
of
INI_REST#
23
23
R1
R1 0R_6
0R_6
CM2012-110
CM2012-110
W
W
L16
L16
1 3 4
R
R
WL
LA LA LA LA LF
M
P
DAT_SMB 3,8,15,19 CLK_SMB 3,8,15,19
P
122 0R_4
122 0R_4
SW
D0 14,32 D1 14,32 D2 14,32 D3 14,32 RAME#_EC 14,32
C1
C1
0.1U/25V/4
0.1U/25V/4
V
V
CC3
CC1.5
52
3V
+3.
50
GN
D
48
+1.
5V
GN
U
SB_D+
U
SB_D-
GN
B_DATA
SM
B_CLK
+1.
GN
3Vaux
+3.
PER
Res
erved
GN
erved
Res Reserved Res
erved
Res
erved
Res
erved
+1.
GN
+3.
4 5 6 7
8 9 10 11
4 5 6 7
X[7..0]32
M
Y[15..0]32
M
D
D
5V
D
ST#
D
5V
D
3V
VPCU
3
10
9 8 7 4
10
9 8 7 4
10
9 8 7 4
46 44 42 40 38 36 34 32 30 28 26 24 22 20 18
16 14 12 10 8 6 4 2
RP
RP
10KX8
10KX8 RP
RP
10KX8
10KX8 RP
RP
10KX8
10KX8
R
R
120 0R_4
120 0R_4
R
R
119 0R_4
119 0R_4
R
R
118 0R_4
118 0R_4
R
R
117 0R_4
117 0R_4 116 0R_4
116 0R_4
R
R
12
12
11
11
10
10
3
MY
1
MY
2
2
1
MY
3
MY
0
56
15
MY
1
14
MY
2
13
MY
3
MY
12
56
3
MX
1
2
MX
2
1
MX
3
MX
0
56
L
ED_WPAN#
D_WLAN#
LE
ED_WWAN#
L
SM
p0 n0
MY MY MY MY
MY MY MY MY
MX MX MX MX
INI_REST#
M
D6 1SS355D6 1SS355
3
V
CC3
R
R
121 *0_4
121 *0_4
PL
TRST_MINI# 16
change BOM value
2
V
CC3
55
55
SBP6+ 15
U U
SBP6- 15
P
LTRST# 12,14,16,20,24,27
WL
SW 32
C1
C1 10U/6.3V/6
10U/6.3V/6
C1
C1
59
59
0.01U/50V/4
0.01U/50V/4
C1
C1
57
57
58
58
0.1U/25V/4
0.1U/25V/4
USB(BLUET
V
CC1.5
C1
C1
56
56
10U/6.3V/6
10U/6.3V/6
OOTH)
L19 change * from Footprint to value
*W
*W
SBP7+15
U
U
SBP7-15
2
1 3 4
S
S
Size Document Number Rev
ize Document Number Rev
ize Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
R
R
146
146
*0R_6
*0R_6
CM2012-110
CM2012-110
L19
L19
SB_7_FB
U
2
SB_7_FB#
U
T71T7
1
MINI CARD & BT
MINI CARD & BT
MINI CARD & BT
VC
VC
C3
C5
R1
R1
47
47
*0R_6
*0R_6
CN1
CN1
1 2 3
D_BT
LE
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
4 5
*BT_CONN
*BT_CONN
5
4
3
2
1
SYST
D D
R
R
170 0R_4
CP
170 0R_4
U_VFAN
H
DD_12V
CP
U_VFAN32
C C
2 3 4
EM FAN CONN
F
ANPWR = 1.6*VSET
U1
U1
1
VI FON VSET
G994
G994
1
VO
N
GN GN
#
GN GN
R
R
168 0R_4
168 0R_4
1 5
D
6
D
7
D
8
D
FA
NSIG132
3
VPCU
3
1
C
C
242
242
10U/25V_1206
10U/25V_1206
R1
R1
74
74
100K_4
100K_4
Q18
Q18
E2N7002E
E2N7002E
M
M
2
HDD_
1 2
C2
C2
46
46
0.01U/50V/4
0.01U/50V/4
12V
R1
R1
73
73
10K_8
10K_8
47
47
C2
C2 4700P/25V/4
4700P/25V/4
CN1
CN1
8
8
3 2 1
FAN CONNECTOR
FAN CONNECTOR
Change footprint
change BOM value
HDD_
12V
C2
C2
44
44
0.1U/25V/4
0.1U/25V/4
31
FOR EMI
CC3
CN3
B B
PW
RLED1#32
RLED0#32
PW
N
BL BL O SAT
3
VPCU
CC3
V
BSWON#32
_UP#32 _DW#32
DD_EJT#32
A_LED#16,28
CN3
1 2 3 4 5 6 7 8 9
10
OWER CONNECTOR
OWER CONNECTOR
P
P
V
C5
C5
0.
0.
1U/25V/4
1U/25V/4
C
C
614 0.1U/25V/4
614 0.1U/25V/4
C
C
615 0.1U/25V/4
615 0.1U/25V/4 616 0.1U/25V/4
616 0.1U/25V/4
C
C C
C
617 0.1U/25V/4
617 0.1U/25V/4 618 0.1U/25V/4
618 0.1U/25V/4
C
C
N
BSWON#
BL
_UP# _DW#
BL O
DD_EJT#
CC3
V
TO POWER BUTTON & LED LIGHT
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
S
S
Size Document Number Rev
ize Document Number Rev
ize Document Number Rev
FAN
FAN
FAN
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT :
ZN1
ZN1
ZN1
A
A
A
41Friday, May 08, 2009
41Friday, May 08, 2009
41Friday, May 08, 2009
of
31
of
31
of
31
1
5
3VPC
U
11
11
58
06
06
C3
C3
0.1U
0.1U
Layout Note:
D D
C C
B B
A A
net "3VPCU" and "RTC_VCC" minimum trace width 12mils.
GAT
3VPC
U
R
R
247
247
470K
470K
CURST#
P
19
19
C3
C3
0.1U
0.1U
58
C3
C3
C3
C3
0.1U
0.1U
0.1U
0.1U
C
C
320
320
*10P
*10P
EA2015
SER
IRQ14
KBSM
I#15
I#15
SC
CURST#
P
RCIN#15
Layout Note: Place all capacitors close to IT8512.
45
45
C3
C3
C3
C3
0.1U
0.1U
0.1U
0.1U
LK_EC
PC
51
51
R2
R2 *22
*22
014,30
LAD
114,30
LAD LAD
214,30 314,30
LAD
L
PC_RST#14
LK_EC14,18
PC RAME#_EC14,30
LF
35 1SS355
35 1SS355
D
D
37 1SS355
37 1SS355
D
D D
D
38 1SS355
38 1SS355 36 1SS355
36 1SS355
D
D
86 10K
86 10K
R2
R2
R
R
287 *100K
287 *100K
MY
[15..0]30
MX
[7..0]30
C3
C3
C
C3
14
14
312
12
0.1U
59
59
40
40
-LI
D
LK_EC
PC
1000P/16V_4
1000P/16V_4
C3
C3
0.1U
0.1U
330
330
C
C
0.1U
0.1U
10
LA
D0
9
LA
D1
8
D2
LA
7
LA
D3
22
CRST#/WUI4/GPD2
LP
13
LP
CCLK
6
LF
RAME#
17
CPD#/WUI6/GPE6
LP
126
A20/GPB5
G
5
IRQ
SER
15
EC
SMI#/GPD4
23
SCI#/GPD3
EC
14
WR
ST#
4
ST#/GPB6
KBR
16
UREQ#/GPC7
PW
119
G
PC0/CRX
123
T87T8
7
G
PB2/CTX
0.1U
V
3VPC
CC3
U
11
26
50
92
114
121
C
BY
BY
BY
BY
BY
VC
VST
VST
VST
VST
VST
LPC
LPC
CIR
CIR
Note 1 : Since all GPIO belong to VSTBY power domain, and (1) If it is output to external VCC derived power domain
8512_SC 8512_SO
8512_SI 8512_SC
MY MY1 MY MY MY4 MY MY MY MY MY MY MY MY12 MY MY MY15
circuit, this sig nal should be isolated by a diode such as (2) If it is input from external VCC derived power domain
circuit, this external circuit must consider not to float the GPIO input.
ote 2 :
N (1) Each input pin should be driven or pulled. (2) Each output-drain output pin should be pulled.
106
F
LRST#/WUI7/GPG0/TM
K
105
LCLK/SCK
F
104
FL
AD3/GPG6
103
F
LAD2/SO
102
LAD1/SI
F
E#
101
LAD0/SCE#
F
100
FLFRAME#/GPG2
0
36
0/PD0
KSO
37
KSO
38 39 40 41 42 43 44 45 46 51 52 53 54 55
1/PD1 2/PD2
KSO
3/PD3
KSO KSO
4/PD4 5/PD5
KSO
6/PD6
KSO KSO
7/PD7 8/ACK#
KSO KSO9/BUSY KSO
10/PE 11/ERR#
KSO KSO12/SLCT KSO
13 14
KSO KSO15
2 3
5 6 7 8 9 10 11
13 14
58
MX0MX
KBRST# and GA20.
FLASH
FLASH
KBMX
KBMX
0/STB#
1/AFD#
3/SLIN#
4
5
6
SI2/INIT#
KSI
KSI
K
KSI
KSI
KSI
KSI
59
61
62
63
64
65
60
1
2
4
6
MX3MX
MX5MX
MX7MX
0.1U
0.1U
CCRTC V
127
74
83
84
3
C
BY
VBAT
AVC
VST
PE3/ISCLK G
IT8512
IT8512
7 KSI
VSS1VSS12VSS27VSS49VSS
C3
C3
29
29
0.1U
0.1U
4
(For PLL Power)
L35
L35 L38
L38 60
60
C3
C3
16
17
MY
MY
82
20
33
19
57
56
T/GPE7
T/GPE0
17/GPC5
16/GPC3
NT/GPD5
PE2/ISAS
PE1/ISAD
G
G
GI
KSO
KSO
L80LLA
L80HLA
GPIO
GPIO
there are some special considerations below:
VSS
AVSS
VSS
75
91
122
113
245
45
R
R2 0
0
BK1608HS121-T
BK1608HS121-T BK1608HS121-T
BK1608HS121-T
99
96
97
94
95
107
G1/ID7
PH6/ID6
PH3/ID3
PH4/ID4
GPH5/ID598G
G
G
GP
PH2/ID2/BADDR1 G
WAKE UP
WAKE UP
NG#/PWRFAIL#/LPCRST#/GPB7
RI
UART
UART
A/D D/A
A/D D/A
3VPC
U U
3VPC
Pull Up for Low Active Pin
HWP
G
SC# 15
SU
XM_PWR_LEVEL# 20
M
MRST# 15
RS
ON 34
VR SBPW
ROK 18
AINON 33,35,36,37,38
93
SM BUS
SM BUS
PH0/ID0/SHBM G
PH1/ID1/BADDR0 G
PS/2
PS/2
PWM
PWM
CLOCK
CLOCK
T8512
T8512
AJ085120F03
AJ085120F03
M
MR0/WUI2/GPC4
T T
MR1/WUI3/GPC6
RI RI
SON 35,38
SU
RV
CC_ON 17,38
MX
M_THERM# 6,20
CLK
MB
110
SM
CLK0/GPB3
SM
DAT0/GPB4 CLK1/GPC1
SM
SM
DAT1/GPC2 CLK2/GPF6
SM SM
DAT2/GPF7 CLK0/GPF0
PS2
DAT0/GPF1
PS2 PS2
CLK1/GPF2 DAT1/GPF3
PS2
CLK2/GPF4
PS2 PS2
DAT2/GPF5
PW
M0/GPA0 M1/GPA1
PW PW
M2/GPA2
PW
M3/GPA3
PW
M4/GPA4
PW
M5/GPA5 M6/GPA6
PW PW
M7/GPA7
ACH0/GPD6
T
ACH1/GPD7
T
RSW/GPE4
PW
1#/WUI0/GPD0 2#/WUI1/GPD1
W
UI5/GPE5
T
XD/GPB1
D/GPB0
RX
DC0/GPI0
A A
DC1/GPI1 DC2/GPI2
A A
DC3/GPI3
A
DC4/GPI4 DC5/GPI5
A
DC6/GPI6
A ADC7/GPI7
C0/GPJ0
DA DA
C1/GPJ1 C2/GPJ2
DA
C3/GPJ3
DA DA
C4/GPJ4 C5/GPJ5
DA
32KE
CK
CK32K
U17I
U17I
Layout Note:
32.768kHz clock lines: a. If possible, please avoid u s ing any through-hole. b. Please make the trace length short, and the trace width wide enough. c. Th e s pacing to the closest neig hbor shou ld be wide enou gh.
111 115 116 117 118
85 86 87 88 89 90
24 25 28 29 30 31 32 34
47 48
120 124
125 18 21
35 112
109 108
66 67 68 69 70 71 72 73
76 77 78 79 80 81
2 128
12
VF
4 1
32.
32.
768KHZ
768KHZ
C355
C355 10P
10P
MB
-
AN2
PM PMUX1
Y3
Y3
DATA
PCUHOLD
UX2
23
40 1SS355
40 1SS355
D
D
DID_PRODECT
E MX
MPWR_EN 20
_PRSNT# 15,20
dGPU
BL_U
BL_D
W# 31
T88T8
8
T86T8
6
12
C356
C356 10P
10P
3
P# 31
N
BSWON#
SB#
SU AC
IN
39 1SS355
39 1SS355
D
D
15
15
C3
C3
0.1U
0.1U
PM
UX2
PMUX1
SMBUS
MB M MX MX
D
VAD PW PW CCD_
O
CLK 6,12
BDATA 6,12
M_SCL 20 M_SDA 20
NBSWON# 15
J 19 RLED1# 31 RLED0# 31
POWER_ON# 22
WL
SW 30
SW
I# 15
UTE# 29
VOLM C
LEAR_CMOS 14
FA
NSIG1 31
DD_EJT# 31
1 2
CP
U_VFAN 31
MY
16
MY
17 CLK
MB MB
DATA
BSWON#
N WL
SW
IN
AC
DD_EJT#
O M
XM_PWR_LEVEL#
GPU_PRSNT#
d
BL_U
P#
BL_D
W#
1
1
JP
JP
SHORT PAD
SHORT PAD
231 *10K_4
231 *10K_4
R
R R
R
232 *10K_4
232 *10K_4
284 4.7K_4
284 4.7K_4
R
R
283 4.7K_4
283 4.7K_4
R
R
R
R
200 10K_4
200 10K_4 239 *10K_4
239 *10K_4
R
R
243 100K_6
243 100K_6
R
R
282 10K_4
282 10K_4
R
R
285 10K_4
285 10K_4
R
R R
R
252 10K_4
252 10K_4 254 10K_4
254 10K_4
R
R R
R
255 10K_4
255 10K_4
BSWON#31
N
SUSB#15
N
BSWON#
3VPC
U
2
1SS355
1SS355
2
Layout Note: Place R471,R498,R534 within 500 mils from SPI Flash.Place R567 within 500mils from R534; R520 within 500mils from R498 and R570 within 500mils from R471.
8M
bit , SPI
U
V
CC3
8512_SC
E#
8512_SC
K
R1
R1
88 47
88 47 92 47
R1
R1 R1
R1
R2
R2
50 *0
50 *0
92 47 91 15
91 15
8512_SI 8512_SO
BI
OS_WP#15
3VPC
90
90
R1
R1 10K
10K
3
3
U1
U1
1
#
CE
6
SC
K
5
SI
2
SO
3
#
WP
W25X80
W25X80
C3
VC
R2
R2 *4.7K
*4.7K
U
3VPC
249
249
46
46
R
R *8.2K
*8.2K
2
Q21
Q21
DTC144EU
DTC144EU
*
*
1 3
1
32
187
187
R
R 10K
10K
8
D
VD
7
LD#
HO
4
VSS
79
79
C2
C2
0.1U_4
0.1U_4
3
2
Q22
Q22 *
*
2N7002E
2N7002E
1
8M Winbond P/N:AKE3GZN0N00
SPI Socket P/N:DG008000031 A stage be use first
240 10K_4
240 10K_4
R
R
CC3
VR
M_PWRGD34
WPG35,37,38
SYS_H
N
B_CORE_PG36
U
3VPC
13
Q20
Q20
TA124EU
TA124EU
D
D
PCUHOLD
-
D3
D3
4
4
V
R2
R2
37 10K_4
37 10K_4
CC3
V
38 10K_4
38 10K_4
R2
R2
V
CC3
R2
R2
41
41
100K_4
100K_4
Please reserve this connector for serial debug port & KBS download usage.
NBSWON#
D HWP
SC#
SU
C
C2
G
291
91 *39P
*39P
33 1SS355
33 1SS355
D
D
D
D
23 1SS355
23 1SS355
28 1SS355
28 1SS355
D
D
*39P
*39P
UART_TXD
UART_RXD
C3
C3
07
07
V
CC3
35
35
R2
R2 10K_4
10K_4
G
HWP
C3
C3
84
84
*39P
*39P
T96
T98
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
ize Document Number Rev
ize Document Number Rev
ize Document Number Rev
S
S
S
EC ITE8512
EC ITE8512
EC ITE8512
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT :
ZN1
ZN1
ZN1
32
32
1
32
1A
1A
1A
41Friday , M ay 08, 2009
41Friday , M ay 08, 2009
41Friday , M ay 08, 2009
of
of
of
5
POWER_JACK
POWER_JACK
PJ
PJ
18
18
PC
PC
*68P/50V_4
*68P/50V_4
XM_GND
PC
PC
151
151
*68P/50V_4
*68P/50V_4
DC-I
5 4 3 2 1
1
1
dcjk-2dc1003-000113- 5p-v
XM_GND
PR
PR
16.2K/F_6
16.2K/F_6
XM_GND
PR
PR 21K/F_6
21K/F_6
158
158
15
15
ND
dcjk-2dc1003-000113- 5p-v
15026_M
1
5026_HDD_GND
ACIN/HDD_12V/MXM_12V
VA
165
165
PR
PR
4.64K/F_6
NON
NON
4.64K/F_6
21
D3
D3
LE
LE LED17-21VGC-TR8
LED17-21VGC-TR8
LED17-21VGC-TR8
LED17-21VGC-TR8
157 0R_6
157 0R_6
PR
PR
9 *0R_6
9 *0R_6
PR
PR
R16 0R_6
R16 0R_6
P
P P
P
R155 *0R_6
R155 *0R_6
5
15026_M
PC
PC
14
14
4.7U/10V_8
4.7U/10V_8
15026_M
15026_HDD_G
25
25
PC
PC
4.7U/10V_8
4.7U/10V_8
5026_HDD_GND
1
D D
MAI
NON32,35, 36,37,38
MAI
C C
B B
MAI
MAINON32, 35,36,37,38
A A
N JACK
10
10
PR
PR
4.64K/F_6
4.64K/F_6
19
19
PC
PC
0.018U/25V_6
0.018U/25V_6
154
154
PR
PR
4.64K/F_6
4.64K/F_6
152
152
PC
PC
0.018U/25V_6
0.018U/25V_6
P
PR
PR153
PR153
R163
163
4
Vender suggest
C161 1U/25V_8
C161 1U/25V_8
P
P
5026M 5026M
T153T1
53
5026M
20
20
PC
PC
220P/50V_6
220P/50V_6
XM_FB
5026M
*short
*short
15026_M
XM_GND
PC21 1U/25V_8PC21 1U/25V_8
5026H 5026H
T53T5
3
5026H
153
153
PC
PC
220P/50V_6
220P/50V_6
5026H
D_FB
*short
*short
5026_HDD_GND
1
4
VA
43
43
PC
PC
0.1U/25V_6
0.1U/25V_6
XM_VCC XM_PG XM_EN
R2
XM_GND
15026_M
5V
D_VCC D_PG D_EN
R2
15026_HDD_GND
PL
PL
4
4
HI0805R800R-10/0805
HI0805R800R-10/0805
PL
PL
5
5
HI0805R800R-10/0805
HI0805R800R-10/0805
41
41
PC
PC
2200P/50V_6
2200P/50V_6
P
P
U11
U11
MAX15026BETD+
MAX15026BETD+
5V
SUS
1
IN
2
VC
C
3
P
GOOD
4
EN
5
LI
M
6
CO
MP
7
FB
R1
R161 196K/F_6
R161 196K/F_6
P
P
P
P
R159 300R_6
R159 300R_6
R160
R160
P
P
Vout=0.59(1+R1/R2)=12V
10K_6
10K_6
PU
PU
2
2
MAX15026BETD+
MAX15026BETD+
SUS
1
IN
2
VCC
3
PGOOD
4
EN
5
LIM COMP6GND
7
FB
R1
PR12 196K/F_6PR12 196K/F_6
P
P
R13 300R_6
R13 300R_6
PR14
PR14
Vout=0.59(1+R1/R2)=12V
10K_6
10K_6
15
PAD
GN
15
PAD
DH
LX
BST
DL
DRV
RT
DH
LX
BST
DL
DRV
RT
D
15026_M
14 13 12 11 10 9 8
15026_HDD_G
14 13 12 11 10 9 8
PC
PC
0.1U/25V_6
0.1U/25V_6
XM_GND
5026M 5026M
5026M
P
P
50 5026HD_LX
50
P
P
PF
PF
10A/125VF_6125
10A/125VF_6125
44
44
XM_DH XM_LX
164 2.2R_6
164 2.2R_6
PR
PR
XM_DL
162
162
PR
PR
57.6K/F_4
57.6K/F_4
C158 0. 01U/50V_6
C158 0. 01U/50V_6
ND
26HD_DH
PR8 2.2R_6PR8 2.2R_6
26HD_DL
PR11
PR11
57.6K/F_4
57.6K/F_4
C154 0. 01U/50V_6
C154 0. 01U/50V_6
1
1
3
PC
PC
39
39
0.1U/25V_6
0.1U/25V_6
XM_GND
15026_M
1
5026_HDD_GND
3
VA1
38
38
PR
PR 200K/F_6
200K/F_6
PR
PR
36
36
200K/F_6
200K/F_6
C163 0.47U/ 25V_6
C163 0.47U/ 25V_6
P
P
C162 2.2U/10V_6
C162 2.2U/10V_6
P
P
PC15 0.47U/25V_6PC15 0.47U/25V_6
C160 2.2U/10V_6
C160 2.2U/10V_6
P
P
1 2 3
PQ12
PQ12
F
F
DS6675BZ
DS6675BZ
2
VI
IN_5026MXM
V
N
PC
PC
29
29
0.1U/25V_6
0.1U/25V_6
1
1
PL
PL
1 2
15UH/MSCDRI-1280-4.5A
15UH/MSCDRI-1280-4.5A
5
5
PR
PR
2.2R_6
2.2R_6
PC
PC
13
13
2200P/50V_6
2200P/50V_6
AO4932 Rdson=23mOhm OCP=4-0.5A
Rds*OCP=RILIM*50uA/10
3
3
PL
PL
1 2
15UH/MSCDRI-1280-4.5A
15UH/MSCDRI-1280-4.5A
6
6
PR
PR
2.2R_6
2.2R_6
PC
PC
12
12
2200P/50V_6
2200P/50V_6
AO4932 Rdson=23mOhm OCP=5-0.5A
Rds*OCP=RILIM*50uA/10
2
165
165
PC
PC
2200P/50V_4
2200P/50V_4
PC
PC
17
17
2200P/50V_4
2200P/50V_4
C166
C166
P
P
0.1U/25V_6
0.1U/25V_6
C167
C167
P
P
0.1U/25V_6
0.1U/25V_6
PC
PC
0.1U/25V_6
0.1U/25V_6
C156
C156
P
P
0.1U/25V_6
0.1U/25V_6
164
164
PC
PC
10U/25V_1206
10U/25V_1206
12V
MXM_
16
16
HDD_
2
2
PC
PC
+
+
100U/16V_R6_24
100U/16V_R6_24
L(ripple current) =(19-12)*12/(15u*300k*19) ~0.982A
23m*3.5A=RILIM*50uA/10 RILIM=16.2K
PC
PC
157
157
10U/25V_1206
10U/25V_1206
OCP=5A
12V
24
24
PC
PC
+
+
100U/16V_R6_24
100U/16V_R6_24
L(ripple current) =(19-12)*12/(15u*300k*19) ~0.982A
23m*4.5A=RILIM*50uA/10 RILIM=20.7K
10U/25V_1206
10U/25V_1206
OCP=4A
+
+
10U/25V_1206
10U/25V_1206
HDD_12V
+
+
Size Documen t Number Rev
ize Document Number Rev
ize Document Number Rev
S
S
Date: Sheet
Date: Sheet
Date: Sheet
8 7 6 5
4
PR
PR
2.2R_6
2.2R_6
26
26
PR
PR 200K/F_6
200K/F_6
15V
PCU
PC
PC
28
PR
PR 820K/F_6
820K/F_6
7
7
28
23
23
*0.1U/25V_6
*0.1U/25V_6
PQ
PQ
2
2
G1
G1
D1
D1
1 2 3 4
8
D1
D1
S1/D2
S1/D2
7
G2
G2
6
S2
S2
5
AO4932
AO4932
RF=17.3*10^9/300kHz+(1x10^-7)(300kHz^2)=57.6K
IN_5026HD
V
PQ3
PQ3
G1
G1
D1
D1
8
D1
D1
S1/D2
S1/D2
7
G2
G2
6
S2
S2
5
AO4932
AO4932
PR156
PR156
2.2R_6
2.2R_6
1 2 3 4
RF=17.3*10^9/300kHz+(1x10^-7)(300kHz^2)=57.6K
10
10
PC
PC
3
3
PC
PC
100U/16V_R6_24
100U/16V_R6_24
PC
PC
159
159
22
22
PC
PC
100U/16V_R6_24
100U/16V_R6_24
1
2
2
PL
PL
HI0805R800R-10/0805
HI0805R800R-10/0805
+
+
8
8
PC
PC
*27U/25V/6R/40m
*27U/25V/6R/40m
MXM_
12V
1
1
PC
PC
+
+
100U/16V_R6_24
100U/16V_R6_24
P
P
L20
L20
HI0805R800R-10/0805
HI0805R800R-10/0805
+
+
PC
PC
23
23
*27U/25V/6R/40m
*27U/25V/6R/40m
26
26
PC
PC
+
+
100U/16V_R6_24
100U/16V_R6_24
Q
Q
Q
uanta Computer Inc.
uanta Computer Inc.
uanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ACIN/ HDD_12V
ACIN/ HDD_12V
ACIN/ HDD_12V
1
VI
VIN
ZN1
ZN1
ZN1
N
33
11
11
PC
PC 10U/25V_1206
10U/25V_1206
PC
PC
155
155
10U/25V_1206
10U/25V_1206
of
of
of
33
33
33
1A
1A
1A
41Friday, May 08, 2009
41Friday, May 08, 2009
41Friday, May 08, 2009
5
4
3
2
1
CPU_CORE and CPU_VDDNB_RUN
8774VC
C
146
146
PR
37 17
1
31 32 33 34 35 36 40
38 39
9
6
8
10
S
2
4
3
5
PR
10R_4
10R_4
19
C VC
TW
O-PH
PH
ASEG RGD
PW
D0 D1 D2 D3 D4 D5 IC
HDN
S
P
SKI
CCI
ME
TI
CCV
RE
F
OF
S
V
RHOT
POUT
HRM
T
PU
PU
9
9
MAX8774GTL+(TQFN)
MAX8774GTL+(TQFN)
68
68
PR
PR
short
short
8774VC
CC3
V
PR
PR
139
PR
PR
PR
PR
56
56
131
for power on sequence
D D
C C
B B
Vender suggest
VLD
T_ON37
PR
PR
138 10K_6
138 10K_6
V
CC3
PR
PR
137 10K_6
137 10K_6
PSI
#6
69
69
PR
PR *100K_4
*100K_4
5VSU
T
POU
PQ26
PQ26 DT
DT
S
470P/50V_4
470P/50V_4
2
C144EU
C144EU
T_ON
VLD
VR
M_PWRGD32
VI
D06
VI
D16
VI
D26
VI
D36
VI
D46 D56
VI
2
PQ24
PQ24
C144EU
C144EU
DT
DT
1 3
PSI
#
59
59
PC
PC
131
100K_4
100K_4
100K_4
100K_4
PR
PR
148 0R_4
148 0R_4 145 0R_4
145 0R_4
PR
PR
143 0R_4
143 0R_4
PR
PR PR
PR
142 0R_4
142 0R_4
PR
PR
141 0R_4
141 0R_4
PR
PR
140 0R_4
140 0R_4
58 0R_4
58 0R_4
PR
VR
PR
ON32
PR
PR
59 0R_4
59 0R_4
U_CORE
CP
PR
PR
PR
PQ25
PQ25
C144EU
C144EU
DT
DT
1 3
PR
PR
PR
PR
PR
PR
C
PR
PC
PC
PC
PC
65 180K/F_4
65 180K/F_4
61 100K_4
61 100K_4
66 10K/F_4
66 10K/F_4
135 10K/F_4
135 10K/F_4
1 3
2
8774VC
139
0R_4
0R_4
57 0R_4
57 0R_4
PR
PR
132 0R_4
132 0R_4
PR
PR
PR
PR
130
130
PC
PC
130 470P/50V_4
130 470P/50V_4
20K/F_4
20K/F_4
67 150K/F_4
67 150K/F_4
60 470P/50V_4
60 470P/50V_4
131 1U/6.3V_4
131 1U/6.3V_4
470P/50V_4
470P/50V_4
PC
PC
C
135
135
PC
PC
4.7U/10V_6
4.7U/10V_6
ASEPG
8774_PH 8774_PW
RGD
D0 D1 D2 D3 D4 D5
8
774SHDN#
8774SKI
P#
8774T
IME
8774C
CV
EF
8774R
133
133
PR
PR 20K/F_4
20K/F_4
8774OF
129
129
V
RHOT#
THRM
PR134
PR134 10K/F_4
10K/F_4
5VSU
S
56
56
PC
PC
4.7U/10V_6
25
D VD
N
TO
DH1
BST
LX1
DL
P
GND1
GN
D
C
SP1 SP2
C
FB
G
NDS
PAD
GN
DS_1
GN
DS_2
GN
DS_3 DS_4
GN
DS_5
GN GN
DS_6 DS_7
GN GN
DS_8
GN
DS_9
DH2
BST
LX2
DL
C
SP2
CS
N2
GND2
P
4.7U/10V_6
delete component
136 200K/F_4
136 200K/F_4
PR
H1
1
L1
SP1 SP2
H2
2
L2
SN1 SN2
PR
PR
PR
144 2.2R_6
144 2.2R_6
PR
PR
63 *1.5K/F_4
63 *1.5K/F_4 62 2.49K/F_4
62 2.49K/F_4
PR
PR
PR
PR
57
57
PC
PC 1000P/50V_4
1000P/50V_4
PR
PR
147 2.2R_6
147 2.2R_6
4
PC
PC
0.22U/25V_6
0.22U/25V_6
5
4
213
60 10R/F_4
60 10R/F_4
5
PQ
PQ
20
20
AOL1412
AOL1412
213
136
136
PQ
PQ AOL1412
AOL1412
137
137
PC
PC
0.22U/25V_6
0.22U/25V_6
23
23
4
PC
PC 1000P/50V_4
1000P/50V_4
4
5
213
4
PC
PC
58 *1000P/50V_4
58 *1000P/50V_4 64 10R/F_4
64 10R/F_4
PR
PR
132
132
5
4
213
5
213
PC
PC
22
22
PQ
PQ
2200P/50V_6
2200P/50V_6
AOL1414
AOL1414
5
PQ
PQ
41
41
AOL1412
AOL1412
213
2200P/50V_6
2200P/50V_6
PQ
PQ
21
21
AOL1414
AOL1414
PR
PR
152
152
2.2R_6
2.2R_6
PQ
PQ
42
42
AOL1412
AOL1412
148
148
PC
PC
2200P/50V_6
2200P/50V_6
delete component
146
146
PR
PR
151
151
2.2R_6
2.2R_6
147
147
PC
PC 2200P/50V_6
2200P/50V_6
delete component
PC
PC
141
141
PR
PR
50
50
3.01K/F_6
3.01K/F_6
142
142
PC
PC
0.1U/25V_6
0.1U/25V_6
3.01K/F_6
3.01K/F_6
0.1U/25V_6
0.1U/25V_6
2.74K/F_6
2.74K/F_6
PR
PR
CO CO
PC
PC
PR
PR
PC
PC
PC
PC
10U/25V_1206
10U/25V_1206
0.
0.
49
49
PR
PR
2.74K/F_6
2.74K/F_6 PC
PC
REFB+V 6 REFB- 6
145
145
PL7
PL7
0.
0.
45UH/PCMB-1040-25A
45UH/PCMB-1040-25A
1 2 3 4
PR
PR
4.99K/F_6
4.99K/F_6
51
51
PR
PR
10K(+/-5%,0603)NTC
10K(+/-5%,0603)NTC
133 0.22U/25V_6
133 0.22U/25V_6
49
49
PL6
PL6
45UH/PCMB-1040-25A
45UH/PCMB-1040-25A
1 2 3 4
4.99K/F_6
4.99K/F_6
48
48
10K(+/-5%,0603)NTC
10K(+/-5%,0603)NTC
134 0.22U/25V_6
134 0.22U/25V_6
PC
PC
144
144
10U/25V_1206
10U/25V_1206
46
46
45
45
143
143
PC
PC
10U/25V_1206
10U/25V_1206
PR
PR
43
43
44
44
PR
PR
10U/25V_1206
10U/25V_1206
PC
PC
48
48
7
8774D
29
8774BST
30
1
8774LX1
28
8774D
26
1
27
18
8774C
16
8774C
15
11
12 41
42 43 44 45 46 47 48 49 50
8774D
21
8774BST
20
2
8774LX2 CP
22
8774D
24
2
8774C
13
8774C
14
23
+
+
*27U/25V_R6_40
*27U/25V_R6_40
CP
U_CORE
+
+
+
+
138
138
PC
PC
+
PC
+
PC
560U/2.5V_R6_16
560U/2.5V_R6_16
PC
PC
50
50
27U/25V_R6_40
27U/25V_R6_40
PC
PC
35
35
560U/2.5V_R6_16
560U/2.5V_R6_16
33
33
VI
N_8774_1
+
+
27U/25V_R6_40
27U/25V_R6_40
VI
N_8774_2
+
+
+
+
F
F
BMJ3216HS480NT/1206
BMJ3216HS480NT/1206
51
51
PC
PC
CP
U_CORE
+
PC
+
PC
560U/2.5V_R6_16
560U/2.5V_R6_16
BMJ3216HS480NT/1206
BMJ3216HS480NT/1206
F
F
PC
PC
140
140
*27U/25V_R6_40
*27U/25V_R6_40
U_CORECPU_CORE
PC
PC
34
34
560U/2.5V_R6_16
560U/2.5V_R6_16
34
VI
CP
U_CORE
N
10U/25V_1206
10U/25V_1206
VI
N
10U/25V_1206
10U/25V_1206
PC
PC
150
150
0.1U/25V_6
0.1U/25V_6
54
54
PC
PC
PC
PC
52
52
PL8
PL8
36
36
PL9
PL9
A A
Qu
Qu
Qu
anta Computer Inc.
anta Computer Inc.
For AMD AM2 CORE
S
S
Size Document Number Rev
ize Document Number Rev
ize Document Number Rev
U CORE(MAX8774)
U CORE(MAX8774)
U CORE(MAX8774)
CP
CP
CP
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
anta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
ZN1
ZN1
ZN1
34
34
34
1A
1A
1A
of
of
of
41Friday, May 08, 2009
41Friday, May 08, 2009
41Friday, May 08, 2009
5
4
3
2
1
35
D D
S
MDDR_VTERM
PC
PC
102
102
10U/6.3V_8
10U/6.3V_8
DDR_
VREF
PR
PR 0R_6
0R_6
C C
51116GN
D
PR
PR
91 *0R_4
91 *0R_4
8VSUS
1.
92 0R_4
92 0R_4
PR
PR
B B
_MODE
DIS
51116GN
110
110
D
104
104
PC
PC
0.033u/25V_6
0.033u/25V_6
8VSUS
1.
0.6A
PC
PC
99
99
10U/6.3V_8
10U/6.3V_8
DIS
14.3K/F_4
14.3K/F_4
SYS_H
5VPC
PR
PR
10K/F_4
10K/F_4
MA
1.
_MODE
PR
PR
5VSU
8VSUS
U
122
122
121
121
51116GN
WPG32,37,38
INON32,33,36,37,38
S
1 2 3 4 5 6
D
PC
PC
51116GN
VT VT GN MO VT CO
87 10U/6.3V_8
87 10U/6.3V_8
D
25
D GN
TGND TSNS
D DE
TREF
MP
PC
PC
*22P/50V_4
*22P/50V_4
PR
PR PR
PR
PC
PC 10U/6.3V_8
10U/6.3V_8
8VSUS
1.
PR
PR
104 0R_6
104 0R_6
19
21
23
24
22
20
9
VBST
PU
PU
DQSET VD
PR
PR *0R_4
*0R_4
H DRV
6
6
S310S511NC
84
84
5VPC
LL
12
S5_1. S3_1.
U
53
53
PC
PC
0.1U/25V_6
0.1U/25V_6
L DRV
T VT
DOIN VL
TPS51116REGR
TPS51116REGR
DDQSNS
NC7V
8
106
106
FOR DDR II
VDDQSET=0.75V, Vo=1.82V
1.8VSUS adjustable
55 *0R_6
55 *0R_6 54 0R_6
54 0R_6
55
55
PG
ND
_GND
CS
CS
IN
V5 FILT
V5
GOOD
P
PR
PR
116 *620K/F_4
116 *620K/F_4
8V 8V
966-25ADJF1UF
966-25ADJF1UF
G
G
1 2
4 3
PU4
PU4
PO VEN
VPP VI
PC
PC
18 17 16 15 14 13
K
N
98 0.1U/25V_6
98 0.1U/25V_6
PR
PR
95 8.02K/F_6
95 8.02K/F_6
PR
PR
117 0R_4
117 0R_4
PR
PR PR
PR
83 *0R_4
83 *0R_4 118 0R_4
118 0R_4
PR
PR
51116GN
NC VO
D
ND
J
AD
GN
PG
8
9
12
111 *100K/F_4
111 *100K/F_4
PR
PR
97 short
97 short
D
5 6
PR53 33K/F_6PR53 33K/F_6
7
PR
PR
R2
37.4K/F_6
37.4K/F_6
PR
PR
108
108
5.1R_6
5.1R_6
PC
PC
105
105
1U/6.3V_4
1U/6.3V_4
U
3VPC
HWP
G_1.8V
N
VI
SON 32,38
SU M
AINON 32,33,36,37,38
SU
SON 32,38
R1
52
52
12
PC
PC 1U/6.3V_4
1U/6.3V_4
PL18
PL18
BMJ3216HS480NT/1206
BMJ3216HS480NT/1206
F
F
+
PC
PC
96
96
10U/25V_1206
10U/25V_1206
OCP: 12A
+
PC
+
PC
92
92
+
PC
PC
91
91
*27U/25V_R6_40
*27U/25V_R6_40
8VSUS
1.
+
PC
+
PC
560U/2.5V_R6_16
560U/2.5V_R6_16
PC
PC
97
97
10U/25V_1206
10U/25V_1206
PC
PC
94
93
93
94
0.1U/25V_6
0.1U/25V_6
578
PC
PC
PQ29
PQ29
89
89
AO4468
AO4468
0.1U/25V_6
0.1U/25V_6
2200P/50V_6
2200P/50V_6
3 6
241
578
5VPC
U
103
103
3 6
241
PQ28
PQ28 F
F
DS6676AS_NL
DS6676AS_NL
2.
2.
PR
PR
103
103
2.2R_6
2.2R_6
PC
PC
95
95
2200P/50V_6
2200P/50V_6
PC
PC
90
90
10U/25V_1206
10U/25V_1206
PL17
PL17
2UH/PCMB-1040-14A
2UH/PCMB-1040-14A
PC
PC
88
88
*560U/2.5V_R6_16
*560U/2.5V_R6_16
N
VI
CC1.8
IND 38
MA
V
85
85
PC
PC
0.1U
0.1U
6 5
4 2 1
A
A
O6402
O6402
3
PQ27
PQ27
PR
PR
98
98
0R_4
0R_4
PC
PC
84
84
*22P/50V_4
*22P/50V_4
(10u*PR117)/Rdson+Delta_I/2=Iocp
Delta IL=(19-1.8)*1.8/(2.2uH*0.4MHz*19) =1.852A
PR117=(12-1.852/2)*12.5m/10u=13.7K
V
CC1.5
80 mils1.5A
PC
PC
PC
47
47
10U/6.3V_8
10U/6.3V_8
PC
46
46
0.1U/25V_6
0.1U/25V_6
PC
PC
45
45
10U/6.3V_8
10U/6.3V_8
A A
Qu
Qu
Qu
anta Computer Inc.
anta Computer Inc.
anta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT :
DDR 1
DDR 1
DDR 1
.8V(TPS51116 &VTERM)
.8V(TPS51116 &VTERM)
.8V(TPS51116 &VTERM)
ZN1
ZN1
ZN1
35
35
1
35
2B
2B
2B
41Friday, May 08, 2009
41Friday, May 08, 2009
41Friday, May 08, 2009
of
of
of
A
VGACORE
B
C
D
E
F
G
H
36
1 1
C120
12
+
+
PC
PC
390U/2.5V_R6_10
390U/2.5V_R6_10
C120
P
P
10U/25V_1206
10U/25V_1206
75
75
12
+
+
PC
PC
*390U/2.5V_R6_10
*390U/2.5V_R6_10
77
77
C121
C121
P
8
8
PU
5
C107
C107 P
P
VSUS
8792V
8792P 8792E
8
792SKIP#
8792RE
REF-2V
8792RE
0.01U/25V_4
0.01U/25V_4
CC
GD N
C113 4.7U/10V_6
C113 4.7U/10V_6
P
P
P
P
C79 1U/6.3V_4
8792G
ND
C79 1U/6.3V_4
R77 0R_4
R77 0R_4
P
P
P
P
R76 0R_4
R76 0R_4
P
P
R120
R120
60.4K/F_4
60.4K/F_4
PR
PR
80
80
75K/F_4
75K/F_4
8792G
ND
N
B_CORE_PG32
R74 0R_4
R74 0R_4
P
P
MAI
MAI
NON32,33,35,37,38
2 2
NON
PC
PC
*0.01U/25V_4
*0.01U/25V_4
78
78
PU MAX8792
MAX8792
2
VD
D
13
C
VC
14
P
GOOD
1
EN
12
P#
SKI
FIN
10
FIN
RE
11
F
RE
F
PR
PR
57.6K/F_4
57.6K/F_4
PR
PR 75K/F_4
75K/F_4
EP
15
119
119
79
79
8792T
7
TO
N
8792DH
5
DH
8792B
6
BST
8792LX
4
LX
8792DL
3
DL
8
FB
8792I
9
IM
IL
ON
LIM
ST
R125 200K/F_4
R125 200K/F_4
P
P
PR
PR
126
126
1 2
1R_6
1R_6
PC
PC
112
112
0.22U/25V_6
0.22U/25V_6
5
PQ36
4
4
PQ36
AOL1414
AOL1414
213
5
PQ31
PQ31
4
AOL1412
AOL1412
213
P
2200P/50V_4
2200P/50V_4
1UH/PCMB-1040-15A
1UH/PCMB-1040-15A
5
213
PQ30
PQ30
*AOL1412
*AOL1412
R127
R127
P
P
2.2R_6
2.2R_6
124
124
PC
PC
2200P/50V_6
2200P/50V_6
C119
C119
P
P
0.1U/25V_6
0.1U/25V_6
P
P
L14
L14
68
68
PC
PC
10U/25V_1206
10U/25V_1206
+
+
V
IN_8792
L19
L19
P
P
FBMJ3216HS480NT_1206
FBMJ3216HS480NT_1206
+
+
72
72
PC
PC
27U/25V_R6_40
27U/25V_R6_40
NB
_CORE
PC
PC
76
76
12
2.5V_R6_10
2.5V_R6_10
390U/
390U/
14A@1.1V
PC
PC
110
110
0.1U/25V_6
0.1U/25V_6
VI
N
10U/25V_1206
10U/25V_1206
_CORE
NB
P
P
L13 *HI0805R800R-10/0805
L13 *HI0805R800R-10/0805
PL
PL
12
12
PC
PC
111
111
10U/6.3V_6
10U/6.3V_6
PC
PC
125
125
1.
1V_NB
*HI0805R800R-10/0805
*HI0805R800R-10/0805
1.
1V_NB
AOL1412 Rdson=4.6mOhm
1.1V_NB_CORE OCP:16A 300K
L(ripple current)
ND
8792G
3 3
8792G
ND
75
75
PR
PR
short
short
=(19-1.1)*1.1/(1u*300k*19) ~3.45A
Iocp=16-(3.45/2)~14.275A Vth=14.275A*4.6mOhm=65.6mV
4 4
uanta Computer Inc.
uanta Computer Inc.
uanta Computer Inc.
Q
Q
Q
PROJECT :
PROJECT :
S
S
ize Document Number Rev
ize Document Number Rev
Size Document Number Rev
POWER_
POWER_
POWER_
Date: Sheet
Date: Sheet
A
B
C
D
E
F
Date: Sheet
G
PROJECT :
VGA_CORE
VGA_CORE
VGA_CORE
ZN1
ZN1
ZN1
H
A
A
36 41Friday, May 08, 2009
36 41Friday, May 08, 2009
36 41Friday, May 08, 2009
A
of
of
of
5
4
3
2
1
VCC1.2 & VCC1.2SB
Change netlist for HT BUS power
Vender suggest
PR
PR
166 10K/F/0603
T_ON34
VLD
D D
C C
INON32,33,35,36,38
MA
1.
8VSUS
MA
INON32,33,35,36,38
1.
8VSUS
166 10K/F/0603
29 *10K/F/0603
29 *10K/F/0603
PR
PR
PC
PC
30
30
10U/6.3V_8
10U/6.3V_8
2 10K_6
2 10K_6
PR
PR
PC
PC
6
6
10U/6.3V_8
10U/6.3V_8
PC
PC
31
31
0.1U/25V_6
0.1U/25V_6
PC
PC
5 0.1U/25V_6
5 0.1U/25V_6
PC
PC
7
7
0.1U/25V_6
0.1U/25V_6
37 0.1U/25V_6
37 0.1U/25V_6
PC
PC
Colsed to CPU/NB
S
5VSU
4 2 3
8 9
PC
PC
32
32
*0.1U/25V_6
*0.1U/25V_6
Colsed to SB
5VSU
S
PU1
PU1 RT9025-
RT9025-
4 2 3
8 9
PC
PC
9
9
*0.1U/25V_6
*0.1U/25V_6
PU3
PU3 RT9025-
RT9025-
VPP VEN VI
GN GN
VPP VEN VI
N GN GN
25PSP
25PSP
33 *0R_4
33 *0R_4
PR
PR
1
GOOD
P
6
VO
N
J
D
5
D
NC
AD
7
25PSP
25PSP
1
GOOD
P
6
VO
J
D
5
D
NC
AD
7
0.8V
PR
PR
4 *0R_4
4 *0R_4
PR
PR
17.4K/F_6
17.4K/F_6
0.8V
PR
PR
PR
PR
17.4K/F_6
17.4K/F_6
1
1
3
3
34K/F_6
34K/F_6
40
40
PR
PR
42
42
34K/F_6
34K/F_6
SYS_H
WPG
SYS_H
V
CC1.2
2A
PC
PC
42
42
10U/6.3V_8
10U/6.3V_8
Vout =0.8(1+R1/R2) =1.2V
WPG
SYS_H
CC1.2_SB
V
2A
4
4
PC
PC 10U/6.3V_8
10U/6.3V_8
Vout =0.8(1+R1/R2) =1.2V
WPG 32,35,38
SYS_H
WPG 32,35,38
37
B B
Colsed to NB
PU5
PU5
S
5VSU
RT9025-25PSP
64 0.1U/25V_6
64 0.1U/25V_6
PC
PC
73 10K_6
73 10K_6
PR
PR
INON32,33,35,36,38
MA
1.
8VSUS
PC65
PC67
PC67 10U/6.3V_8
10U/6.3V_8
A A
5
PC65
0.1U/25V_6
0.1U/25V_6
PC
PC
*0.1U/25V_6
*0.1U/25V_6
RT9025-25PSP
4
VPP
2
VEN
3
VIN
8
GN
D
9
D
GN
66
66
P
4
GOOD
7
PR
PR
72 *0R_4
72 *0R_4
1 6
VO
J
NC
AD
PR
PR
70
70
5
13K/F_6
13K/F_6
SYS_H
PC
PC
61
61
10U/6.3V_8
10U/6.3V_8
WPG 32,35,38
1V_NB
1.
2A
0.8V
PR71
PR71 34K/F_6
34K/F_6
Vout =0.8(1+R1/R2) =1.1V
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
ize Document Number Rev
ize Document Number Rev
S
S
VCC1.2
VCC1.2
VCC1.2
Date: Sheet
Date: Sheet
3
2
Date: Sheet
PROJECT :
ZN1
ZN1
ZN1
37
37
1
37
1A
1A
1A
41Friday , M ay 08, 2009
41Friday , M ay 08, 2009
41Friday , M ay 08, 2009
of
of
of
5
3VPCU & 5VPCU & Discharge
VI
N
PL
PL
16
16
FBMJ3216HS480NT/1206
FBMJ3216HS480NT/1206
+
+
74
74
PC
D D
MA
IND
4
PQ
PQ AO4468
AO4468
PQ
PQ AO4468
AO4468
VSUS
5 7
8
38
38
CC5
V
SU
SD
4
5 7
8
39
39
VSUS
5
MDDR_VTERM5,9,35
S
HDD_ CP
3 6 2 1
120mils
3 6 2 1
C C
B B
5
160mils
PC
27U/25V/6R/40m
27U/25V/6R/40m
5
126
126
PC
PC
10U/25V_1206
10U/25V_1206
FDS6690AS Rdson=15mOhm
5VPCU OCP:10A 400K
L(ripple current) =(19-5)*5/(3.3u*400k*19) ~2.79A
Iocp=10-(2.79/2)~8.6A Vth=8.6A*15mOhm=129mV R(Ilim)=(129mV*10)/5uA ~255K
CC1.529,30,35
V
CC1.810,12,13,14,17,18,27,35
V
CC33,6,8,12,13,14,15,16,17,18,19,20,21,22,23,24,27,28,29,30,31,32,34
V
CC517,19,20,21,22,28,29,30
V
CC315,16,17,18,24,27
RV
.8VSUS5,6,7,8,9,35,37
1
VSUS26,33,34,35,36,37
5
VPCU14,35
5
VPCU14,17,23,30,31,32,35
3
N19,33,34,35,36
VI
12V28,31,33
U_VDDA6
VPCU
+
+
330U/6.3V_R6_16
330U/6.3V_R6_16
73
73
115
PC
PC 10U/25V_1206
10U/25V_1206
63
63
PC
PC
115
PC
PC
10U/25V_1206
10U/25V_1206
10U/25V_1206
10U/25V_1206
OCP: 10A OCP : 8A
5
VPCU
89
89
PR
PR *0R_4
*0R_4
127
127
PC
PC
0.1U/50V_6
0.1U/50V_6
86
86
PR
PR 0R_4
0R_4
SYS_
HWPG32,35,37
V
117
117
PC
PC
87
87
PR
PR
0R_4
0R_4
in_8206B_5V
FB
1
HDD_
2
4
PC
PC
0.1U/50V_6
0.1U/50V_6
10
10
PL
PL
3.3UH/PCMB-1040-11A
3.3UH/PCMB-1040-11A
SYS_
SHDN#6
3
VPCU
113
113
PR
PR *100K_4
*100K_4
12V
396
396
R
R 22R_2512
22R_2512
31
PQ
PQ
43
43
AO3404
AO3404
70
70
RE
FIN2
VL
69
69
PC
PC 2200P/50V_6
2200P/50V_6
AO4468
AO4468
128
128
PR
PR
2.2R_6
2.2R_6
122
122
PC
PC 2200P/50V_6
2200P/50V_6
1 2
39K/F_4
39K/F_4
114 0R_4
114 0R_4
PR
PR
M_12V
MX
9
9
R4
R4 22R_2512
22R_2512
31
PQ
PQ
2
AO3404
AO3404
33
33
PQ
PQ
241
FDS6690AS
FDS6690AS
R100 *0R_4
R100 *0R_4
P
P PR
PR
85
85
PR
PR
R82 255K/F_6
R82 255K/F_6
P
P
R96 220K/F_6
R96 220K/F_6
P
P
99
99
PR
PR
1
1
0.1U/50V_6
0.1U/50V_6
578
5V
_DH
3 6
578
PQ
PQ
32
32
3 6
241
12
101 0R_4
101 0R_4
12
C83 0.1U/50V_6
C83 0.1U/50V_6
P
P
115 0R_4
115 0R_4
PR
PR
R81 0R_4
R81 0R_4
P
P
1 2 1 2
*short
*short
3
PC
PC
80
94
94
PR
PR
*10R_6
*10R_6
PU
PU
RT8206B
RT8206B
37
80
1U/16V_6
1U/16V_6
19
C
O
LD
PVC
2
BST
DH2
2
LX
2
DL
7
7
T2
OU
FIN2
RE
P
SKI
_LDO
EN
REFIN
LDO
ND
AG
5
4
3
2
1
ND
NC
PG
PAD
PAD
PAD
PAD
PAD
33
34
35
36
22
86
86
PC
PC 1U/16V_6
1U/16V_6
93
93
PR
PR
RE
FIN2
12
0R_4
1 2
108
108
V
in_8206A_3V
123
123
PR
PR
1R_6
1R_6
5V
5V
DDP
WRGD_R
_LX
_DL
RE
C100
C100
P
P
*1U//16V_6
*1U//16V_6
0R_4
3
C
6
N
VI
VC
17
1
BST
15
DH1
16
1
LX
18
1
DL
9
BYP
10
T1
OU
11
1
FB
2
N
TO
F
1
F
RE
14
1
EN
27
2
EN
12
1
ILIM
31
2
ILIM
13
OOD1
PG
28
OOD2
PG
5
NC
in_8206B_3V
V
C101
C101
P
P
PC
PC
0.1U/50V_6
0.1U/50V_6
7
24
26
25
23
30
32
29
4
8
21
20
1 2
3V
_DH
3V
3V
SKI
P
PR
PR
78 *0R_4
78 *0R_4
PR
PR
VL
1 2
R124
R124
P
P
1R_6
1R_6
_LX
_DL
102 0R_4
102 0R_4
82
82
PC
PC
4.7U/10V_8
4.7U/10V_8
C109
C109
P
P
0.1U/50V_6
0.1U/50V_6
R109
R109
P
P
*0R_4
*0R_4
R112 0R_4
R112 0R_4
P
P
R106 *0R_4
R106 *0R_4
P
P
VL
578
3 6
RV
578
3 6
241
PQ
PQ
35
35
FDS6690AS
FDS6690AS
241
RE
FIN2
RE
FIN2
CC_ON17,32
PQ
PQ
DTC144EUA-7- F
DTC144EUA-7- F
2
FBMJ3216HS480NT/1206
118
118
PQ
PQ
14
14
ME2N7002E
ME2N7002E
3
VPCU
62
62
PC
PC
+
+
330U/6.3V_R6_16
330U/6.3V_R6_16
FBMJ3216HS480NT/1206
PC
PC
10U/25V_1206
10U/25V_1206
RVCCD
*0.01U/50V_6
*0.01U/50V_6
V
in_8206B_3V
114
116
116
PC
PC
0.1U/50V_6
0.1U/50V_6
34
34
PQ
PQ
AO4468
AO4468
L11
L11
P
P
3.3UH/PCMB-1040-11A
3.3UH/PCMB-1040-11A
129
129
PR
PR
2.2R_6
2.2R_6
123
123
PC
PC 2200P/50V_6
2200P/50V_6
in_8206B_3V
V
107
107
PR
PR
845K/F_4
845K/F_4
105
105
PR
PR
150K/F_4
150K/F_4
VIN
24
24
PR
PR 1M_6
1M_6
RVCCG
PR
2
6
6
PR 1M_6
1M_6
1 3
RVCC3
25
25
1
114
PC
PC
2200P/50V_6
2200P/50V_6
88
88
PR
PR 0R_4
0R_4
90
90
PR
PR
*0R_4
*0R_4
27
27
PR
PR
22R_6
22R_6
32
PQ
PQ
10
10
ME2N7002E
ME2N7002E
PC
PC 10U/25V_1206
10U/25V_1206
C128
C128
P
P
0.1U/50V_6
0.1U/50V_6
FDS6690AS Rdson=15mOhm
3VPCU OCP:8A 500K
L(ripple current) =(19-3.3)*3.3/(3.3u*500k*19) ~1.65A
Iocp=8-(1.65/2)~7.1A Vth=7.1A*15mOhm=106mV R(Ilim)=(106mV*10)/5uA ~215K
15VPCU
34
34
PR
PR 1M_6
1M_6
32
1
1
PL
PL
15
15
VI
N
71
71
PQ
PQ
40
3
VPCU
PC38
PC38
8 7
5
40
AO4468
AO4468
PQ
PQ FDC653N
FDC653N
6 524
1
38
1 2
CC3
V
36
4
MA
IND
37
37
CC3
RV
RV
CCD
3
PR
PR
21
21
PQ
PQ ME2N7002E
ME2N7002E
2
SMDDR_VTERM
22R_6
22R_6
7
7
32
1
VIN
17
17
PR
PR 1M_6
VIN
PR
PR
19
A A
MAINON
INON32,33,35,36,37
MA
PQ
PQ
DTC144EUA-7-F
DTC144EUA-7-F
19
1M_6
1M_6
PR
PR
2
1M_6
5
5
1M_6
1 3
5
VCC5 VCC1.8 15VPCU
PR
PR
PR
28
28
22R_6
22R_6
MAING
32
PQ
PQ
11
20
20
11
1
ME2N7002E
ME2N7002E
PR
35
35
22R_6
22R_6
32
PQ
PQ
15
15
1
ME2N7002E
ME2N7002E
39
39
PR
PR
*22R_6
*22R_6
32
PQ
PQ
17
17
1
*ME2N7002E
*ME2N7002E
4
VCC1.5VCC3
41
41
PR
PR *22R_6
*22R_6
32
PQ
PQ
18
18
1
*ME2N7002E
*ME2N7002E
CPU_VDDA
1
32
PR
PR
47
47
*22R_6
*22R_6
PQ
PQ *ME2N7002E
*ME2N7002E
IND 35
MA
PC27
PC27 *0.01U/50V_6
*0.01U/50V_6
SON32,35
SU
DTC144EUA-7-F
DTC144EUA-7-F
22
22
PR
PR
470K_6
470K_6
MAIND
32
PQ
PQ
8
19
19
8
1
ME2N7002E
ME2N7002E
3
1M_6
PR
2
PQ
PQ
4
4
PR 1M_6
1M_6
1 3
5VSUS
22R_6
22R_6
18
18
32
1
R9
R9
9
9
PQ
PQ ME2N7002E
ME2N7002E
1.8VSUS
PR32
PR32
22R_6
22R_6
32
PQ
PQ
13
9
9
13
1
ME2N7002E
ME2N7002E
15VPCU
PR
PR
37
37
1M_6
1M_6
SUSDSUSG
32
PQ
PQ
16
16
40
40
PC
ME2N7002E
ME2N7002E
3VPCU/ 5VPCU
3VPCU/ 5VPCU
3VPCU/ 5VPCU
1
PC *0.01U/50V_6
*0.01U/50V_6
uanta Computer Inc.
uanta Computer Inc.
uanta Computer Inc.
Q
Q
Q
PROJECT :
PROJECT :
PROJECT :
ZN1
ZN1
ZN1
of
38
of
38
of
38
1
S
S
Size Document Number Rev
ize Document Number Rev
ize Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
1A
1A
1A
41Friday, May 08, 2009
41Friday, May 08, 2009
41Friday, May 08, 2009
5
4
3
2
1
39
D D
H1
H1
H1
7
7
h-c236d236n
h-c236d236n
h-c
h-c
236d236n
236d236n
H8
H8
H1
8
8
h-c236d236n
h-c236d236n
h-c
h-c
H9
H9
236d236n
236d236n
1
1
1
1
For cpu
C C
H-C276D126P2
H-C276D126P2
B B
H1
H1
9
9
1
H1
H1
3
3
h-c252d79p2
h-c252d79p2
1
H-C276D126P2
H-C276D126P2
H2
H2
2
2
1
H1
H1
5
5
h-c252d79p2
h-c252d79p2
1
H6
H6
H
H
-C276D126P2
-C276D126P2
1
h-c
h-c
276d146p2
276d146p2
H1
H1
h-c252d79p2
h-c252d79p2
H1
H1
1
4
4
1
h-c252d79p2
h-c252d79p2
H3
H3
H
H
-C276D126P2
-C276D126P2
1
H1
H1
2
2
1
For mini card
H2
H2
H-C2
H-C2
76D126P2
76D126P2
1
H2
H2
0
0
h-c276d146p2
h-c276d146p2
1
H1
H1
1
1
H-C276D126P2
H-C276D126P2
1
H4
H4
H
H
-C276D126P2
-C276D126P2
1
H1
H1
0
0
H-C276D126P2
H-C276D126P2
1
H-C2
H-C2
H5
H5
76D126P2
76D126P2
1
H1
H1
6
6
h-c276d150p2
h-c276d150p2
1
h-c
h-c
276d150p2
276d150p2
H7
H7
1
H2
H2
1
1
H-C276D126P2
H-C276D126P2
1
H2
H2
3
3
H-C276D126P2
H-C276D126P2
1
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
S
S
S
ize Document Number Rev
ize Document Number Rev
ize Document Number Rev
S
S
S
CREW HOLE & EMI
CREW HOLE & EMI
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
CREW HOLE & EMI
PROJECT :
ZN1
ZN1
ZN1
A
A
A
41Friday, May 08, 2009
41Friday, May 08, 2009
41Friday, May 08, 2009
of
39
of
39
of
39
1
5
4
3
2
1
DATE
Description Note Page
1.change RP1-RP9 to 47 ohm (AMD suggestion)----PAGE 3
D D
2009
0320
2.add R448 10k to VCC3---PAGE 6
3.add R101 300ohm to 1.8VSUS---PAGE 6
4.add R449 10K ohm to VCC3---PAGE12
5.Reserve C612,C613,R441,Y6 to schmatic---page14
6.add D59 and R446 10k to VCC3---page14
7.add R455,C621,C622 to schmatic for EMI---page14
8.add write EDID rom net to control ---page15
9.delete R403 and R32 --page 15
10.change C91,c95 value to 33p---page 16
11.Add 2 short pin for clear cmos and clear password --page16
12.add R86 10k--page 18
13.delete D4,D5 ,C68 component and add R69 0ohm---page18
14.change netlist to SB control (write_edid _rom)and add R62 2.2k ohm--- page19
C C
15.change Q8 control pin to main pin---page 20
B2B
16.change MXM reset from pltrst.---page20
17.add ine out mute function---page23 add component ar35,ar36,ar37,ac38,aq1,aq2,ad2,ad3,q34,q35,r450,r452--page23
18.delete Q26,c475 and change LANVCC net to RVCC3 to control ---page24
19.change C447,C448 to 33p---page 24
20.change CN13 footprint for LED pin change---page 25
21.add ESD protect RV17,RV19,RV13,RV15,RV14,RV16, RV18,RV20,RV9,RV10,RV11,RV12---PAGE 26
22.Change CN25,CN26 footprint for ME---page26
23.add D18,D19 for XD detect and change net SD_WP#/XD_WP for SD write protect ---page27
24.change LED2 to Green type---page 27
B B
25.change CN8 to rightangle and change odd connect to vertical type for ME---page 28
26.change au6 to OR-gate from AND-gate for pop sound---page 29
27.change fan control net from Vender suggestion.---page 31
28.add c614--618 0.1u for EMI--- page 31
29.add pr165 ,led3 for power line in ---page33
30.change VLDT_ON net for power on sequence--PAGE 34
31.change pr137,pr138 type to BOM---page 34
33.LED RT value need to change
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
S
S
S
ize Document Number Rev
ize Document Number Rev
ize Document Number Rev
CHANG
CHANG
CHANG
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT :
E LIST
E LIST
E LIST
ZN1
ZN1
ZN1
C
C
C
41Friday, May 08, 2009
41Friday, May 08, 2009
41Friday, May 08, 2009
of
40
of
40
of
40
1
DATE
5
ZN1 Board file
4
ZN1 Schematic
3
2
1
11th Mar. 2009
31th Mar. 2009
D D
C C
ZN1-0325-1830.brd
AH1_A_FEB23_01.DSNZN1-0311-17-152.brd
ZN1_B_HP_MAR31.DSN
B B
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
S
S
S
ize Document Number Rev
ize Document Number Rev
ize Document Number Rev
CHANG
CHANG
CHANG
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT :
E LIST
E LIST
E LIST
ZN1
ZN1
ZN1
C
C
C
41Friday, May 08, 2009
41Friday, May 08, 2009
41Friday, May 08, 2009
of
41
of
41
of
41
1
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