QUANTA ZM3 Schematics

5

Vinafix.com

4

3

2

1

Benetton_EDU(ZHNB) SHB ULT SYSTEM BLOCK DIAGRAM

01

Memory Down

D D

P14

P15

C C

Cardreader GL823

P28

B B

Channel A 1Rx16

Channel B 1Rx16

NGFF SATA

P20

Daughter Board

I/O Board Conn.

USB2 Port DB side

Google Debug conn

P28

PWR GATED

Dual Channel DDR3L 1600 MHZ

SATA0

USB2-6

USB2-4

Azalia

Haswell ULT 15W

IMC

MCP 1168pins

DC+GT3

40 mm X 24 mm

SATA

Integrated PCH

USB2.0

IHDA

LPC

P2~P13

SMBUS

eDP

DDI

USB3.0/2.0

CLK

PCI-E x1

I2C

SPI

eDP USB2-2

DDI1

USB3-1 USB2-1

USB2-0

PCIECLOCK-0

X'TAL

32.768KHz

X'TAL 24MHz

SPI ROM

W25Q64FVSSIG

EDP Conn. CCD(Camera)

HDMI Conn.

PWR GATED

P18

USB3 Port MB side

PWR GATED

LTE Mini Card

P16

P10

P21

SIM card

PCIE-1 USB2-3

I2C1

I2C0

TRACKPAD

PWR GATED

P8

LGA Wireless-AC 7260

PWR GATED

ALS

ISL29023

TOUCH SCREEN

P25

BQ24707A

Batery Charger

P19

P28

TPS51216

PP1350

P29 P30

TPS51225

AMIC

A A

5

Int. MIC

P23 P26P23

Combo HP

AUDIO CODEC

Speaker

PWR GATED

4

X'TAL

32.768KHz

Thermal IC

TI TM4E1G31H6ZRBIALC283

EC

P28

K/B Con.

Fan Driver

(PWM Type)

P25 P25

3

SLB9655TT1.2 FW4.32

TPM

HALL SENSOR

P27

P22

2

PP3300_DSW/PP5000

TPS51622

+VCCIN

TPS51211

PP1050_PCH_SUS

TPS54318

PP1500_PCH_TS

Thermal Protection

P32

Discharger

P31

Size Document Number Rev

Date: Sheet of

P33P34

P33

Quanta Computer Inc.

PROJECT :

Block Diagram

ZHNB

1 39Thursday, December 04, 2014

1

1 39Thursday, December 04, 2014

A

1

Vinafix.com

2

PP3300_PCH_SUS

3

4

5

6

7

8

PP3300_DX

37

2.2K2.2K

AP2

SMB_PCH_CLK

AH1

A A

SMB_PCH_DAT

PP3300_DX

2N7002DW Level shift

CLK_SCLK CLK_SDATA

4.7K4.7K

LVDS Bridge

PP3300_PCH_SUS

XDP

2.2K2.2K

SMBUS

Haswell ULT

B B

AN1

SMB_ME0_CLK

AK1

SMB_ME0_DAT

AU3

SMB_ME1_CLK

AH3

SMB_ME1_DAT

G4

I2C1_SDA_GPIO6

F1

I2C1_SCL_GPIO7

PP3300_PCH_SUS

2.2K2.2K PP3300_PCH

PP3300_PCH

4.7K4.7K

2N7002DW Level shift

ALS

PP3300_PCH_SUS

*10K*10K

PP3300_PCH

TOUCH SCREEN

TP_PWR

I2C

I2C0_SDA_GPIO4

F2

I2C0_SCL_GPIO5

F3

4.7K4.7K

PP3300_PCH

2N7002DW Level shift

*10K*10K

TRACK PAD

PP3300_EC

C C

100

4.7K4.7K

Battery

100

EC_SMB0_CLK

E10

EC_SMB0_DATA

D3

Charger

PP3300_DX

KBC

M4

TI

SMBUS

D D

1

EC_SMB1_CLK

N2 EC_SMB1_DATA

F4

EC_SMB2_CLK

F3 EC_SMB2_DATA

2

3

4.7K4.7K PP3300_DX

4.7K4.7K

Thermal sensor

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

SMBUS_I2C

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

4

5

6

Thursday, December 04, 2014

7

PROJECT :

ZHNB

A

3937

8

5

Vinafix.com

(ALW)

PP5000_DSW

SYS_HWPG

PWRGDPP5000_EN

D D

EC

PP3300_DSW_EN

VIN

C C

EC

VCORE_EN

EC

B B

PCH

PCH_SLP_S3_L

EN1

EN2

Vin

VREG5

3V/5V

TPS51225

Vin

VREG3

PWRGD

CPU VCCIN

TPS51622 EN

S5 EN

+1.35V_SUS

S3 EN

S5_Vout

S3_Vout

VCORE_PGOOD

Vout

PP1350_PGOOD

PWRGDPP1350_EN

TPS51216

Vin

S5_Vout

S3_Vout

PP3300_RTC

(S3)

PP1350 PP1350_VREF

+DDR_VTT_RUN

VIN

(S3)

PP5000

PP3300_DSW

(ALW)

(S0)

+VCCIN

(S3)

(S0)

4

(DSW)

PCH

EC

PCH

EC

PCH

EC

PCH

3

TPS22965DSGR

PP3300_CODEC_EN

UP7534ARA8-15

USB1_PWR_EN

UP7534ARA8-15

USB2_PWR_EN

TPS22930

PCH_SLP_S5_L

TPS22964CYZPR

PP3300_DX_EN

(S0)

+5VA

USBPWR1

USBPWR2

(S3)

PP3300_PCH_SUS

(S0)

PP3300_DX

(S0)

TPS22930

PCH_SLP_S3_L

TPS22964CYZPR

PP3300_WLAN_EN

TPS22965DSGR

PP3300_LTE_EN

TPS22930

TP_SHDN_L

PWRGD

+1.5V

Vin TPS22966DPUR

TPS54318

PCH_SLP_S3_L

Vout

EN

PP3300_PCH

PP3300_WLAN

+3V_LTE

(S3)

TP_PWR

EC

EC_EDP_VDD_EN

(S0) (S0)

PP1500_PCH_TS

2

TPS22965DSGR

TPS22966DPUR

G5243AT11U

TPS22966DPUR

1

38

(S0)

+3V_SATA

(S0)

CCD_PWR

(S0)

LCDVCC

(S0)

+3V_ADO

+1.5VA

PP1050_PGOOD

A A

VIN

SUSP_VR_EN

EC

Vin

+1.05V_S3

TPS51211

5

PWRGD

EN

Vout

PP1050_PCH_SUS

4

PCH_SLP_S3_L

TPS22964CYZPR

PP1050_PCH

3

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

ULT PWR CONTROL

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

2

Thursday, December 04, 2014

PROJECT :

ZHNB

A

3938

1

3938

5

Vinafix.com

4

3

2

1

Haswell ULT (DISPLAY,eDP)

U24A

HSW_ULT_DDR3L

02

D D

HDMI

INT_HDMITX2N[18] INT_HDMITX2P[18] INT_HDMITX1N[18] INT_HDMITX1P[18] INT_HDMITX0N[18] INT_HDMITX0P[18]

INT_HDMICLK-[18] INT_HDMICLK+[18]

DP

C C

PCH_BL_PWM[16,26] PCH_BL_EN[16,26]

PCH_EDP_VDD_EN[16,26]

TP97

SIM_DET[21] TOUCH_INT_L_DX[16] ALS_INT_L[28]

B B

TRACKPAD_INT_DX[25]

PCH_BL_PWM PCH_BL_EN PCH_EDP_VDD_EN

PCH_GPIO77 PCH_GPIO78 PCH_GPIO79 PCH_GPIO80 SIM_DET

PCI_PME#

SIM_DET TOUCH_INT_L_DX ALS_INT_L TRACKPAD_INT_DX

C54 C55

B58

C58

B55 A55 A57 B57

C51 C50 C53

B54

C49

B50 A53 B53

AD4

B8 A9 C6

U6 P4 N4 N2

U7 L1 L3 R5 L4

DDI1_TXN0 DDI1_TXP0 DDI1_TXN1 DDI1_TXP1 DDI1_TXN2 DDI1_TXP2 DDI1_TXN3 DDI1_TXP3

DDI2_TXN0 DDI2_TXP0 DDI2_TXN1 DDI2_TXP1 DDI2_TXN2 DDI2_TXP2 DDI2_TXN3 DDI2_TXP3

U24I

EDP_BKLCTL EDP_BKLEN EDP_VDDEN

PIRQA/GPIO77 PIRQB/GPIO78 PIRQC/GPIO79 PIRQD/GPIO80 PME

+3V

GPIO55

+3V

GPIO52

+3V

GPIO54

+3V

GPIO51

+3V

GPIO53

eDP SIDEBAND

+3V +3V +3V +3V +3V_S5

PCIE

1 OF 19

HSW_ULT_DDR3L

9 OF 19

EDPDDI

DISPLAY

EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1

EDP_TXN2 EDP_TXP2 EDP_TXN3 EDP_TXP3

EDP_AUXN EDP_AUXP

EDP_RCOMP

EDP_DISP_UTIL

DDPB_CTRLCLK

DDPB_CTRLDATA

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPB_AUXN DDPC_AUXN

DDPB_AUXP

DDPC_AUXP

DDPB_HPD DDPC_HPD

EDP_HPD

C45 B46 A47 B47

C47 C46 A49 B49

A45 B45

D20 A43

B9 C9 D9 D11

C5 B6 B5 A6

C8 A8 D6

EDP_TXN0 EDP_TXP0

EDP_AUXN EDP_AUXP

EDP_RCOMP

R25 24.9/F_4

HDMI_DDCCLK_SW [18] HDMI_DDCDATA_SW [18]

R342 100K_4

EDP_TXN0 [16] EDP_TXP0 [16]

EDP_AUXN [16] EDP_AUXP [16]

R343 *0_4

R356 *0_4

DP_UTIL [16]

INT_HDMI_HPD [18] EDP_HPD [16]

PCH_BL_PWMDP_UTIL

Haswell C-1 2c BGA 1.6GHz ULV 15W 2+2 i5-4200U QS for proto/AJ0QEVEVT01

eDP Panel

+VCCIOA_OUT

eDP_RCOMP Trace length < 100 mils Trace width = 20 mils Trace spacing = 25 mils

PCH_GPIO77 PCH_GPIO78 PCH_GPIO79 PCH_GPIO80

TOUCH_INT_L_DX ALS_INT_L TRACKPAD_INT_DX

DDPB/C_CTRLDATA has an iPD 20K, When PU at rising edge of

PCH_PWROK, the DDI port will be detected

R30 10K_4 R391 10K_4 R27 10K_4 R383 10K_4 R376 10K_4 R378 10K_4 R24 10K_4 R385 10K_4

PP3300_PCH

A A

Quanta Computer Inc.

5

PROJECT :

Size Document Number Rev

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

4

3

Thursday, December 04, 2014

2

PROJECT :

Haswell 1/5 (DDI/eDP)

ZHNB

2 39

1

A

5

Vinafix.com

4

3

2

1

Haswell ULT (DDR3L) Haswell Processor (DDR3L)

U24C

M_A_DQ<0>[14] M_A_DQ<1>[14] M_A_DQ<2>[14] M_A_DQ<3>[14] M_A_DQ<4>[14]

D D

C C

M_A_DQ<5>[14] M_A_DQ<6>[14] M_A_DQ<7>[14] M_A_DQ<8>[14] M_A_DQ<9>[14] M_A_DQ<10>[14] M_A_DQ<11>[14] M_A_DQ<12>[14] M_A_DQ<13>[14] M_A_DQ<14>[14] M_A_DQ<15>[14] M_A_DQ<16>[14] M_A_DQ<17>[14] M_A_DQ<18>[14] M_A_DQ<19>[14] M_A_DQ<20>[14] M_A_DQ<21>[14] M_A_DQ<22>[14] M_A_DQ<23>[14] M_A_DQ<24>[14] M_A_DQ<25>[14] M_A_DQ<26>[14] M_A_DQ<27>[14] M_A_DQ<28>[14] M_A_DQ<29>[14] M_A_DQ<30>[14] M_A_DQ<31>[14] M_A_DQ<32>[14] M_A_DQ<33>[14] M_A_DQ<34>[14] M_A_DQ<35>[14] M_A_DQ<36>[14] M_A_DQ<37>[14] M_A_DQ<38>[14] M_A_DQ<39>[14] M_A_DQ<40>[14] M_A_DQ<41>[14] M_A_DQ<42>[14] M_A_DQ<43>[14] M_A_DQ<44>[14] M_A_DQ<45>[14] M_A_DQ<46>[14] M_A_DQ<47>[14] M_A_DQ<48>[14] M_A_DQ<49>[14] M_A_DQ<50>[14] M_A_DQ<51>[14] M_A_DQ<52>[14] M_A_DQ<53>[14] M_A_DQ<54>[14] M_A_DQ<55>[14] M_A_DQ<56>[14] M_A_DQ<57>[14] M_A_DQ<58>[14] M_A_DQ<59>[14] M_A_DQ<60>[14] M_A_DQ<61>[14] M_A_DQ<62>[14] M_A_DQ<63>[14]

AH63 AH62 AK63 AK62 AH61 AH60 AK61

AK60 AM63 AM62

AP63

AP62 AM61 AM60

AP61

AP60

AP58

AR58 AM57

AK57

AL58

AK58

AR57

AN57

AP55

AR55 AM54

AK54

AL55

AK55

AR54

AN54

AY58 AW58

AY56 AW56

AV58

AU58

AV56

AU56

AY54 AW54

AY52 AW52

AV54

AU54

AV52

AU52

AK40

AK42 AM43 AM45

AK45

AK43 AM40 AM42 AM46

AK46 AM49

AK49 AM48

AK48 AM51

AK51

SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63

HSW_ULT_DDR3L

DDR CHANNEL A

SA_CLK#0

SA_CLK0

SA_CLK#1

SA_CLK1 SA_CKE0

SA_CKE1 SA_CKE2 SA_CKE3

SA_CS#0 SA_CS#1

SA_ODT0

SA_RAS

SA_WE

SA_CAS SA_BA0

SA_BA1 SA_BA2

SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8

SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15

SA_DQSN0 SA_DQSN1 SA_DQSN2 SA_DQSN3 SA_DQSN4 SA_DQSN5 SA_DQSN6 SA_DQSN7

SA_DQSP0 SA_DQSP1 SA_DQSP2 SA_DQSP3 SA_DQSP4 SA_DQSP5 SA_DQSP6 SA_DQSP7

SM_VREF_CA SM_VREF_DQ0 SM_VREF_DQ1

AU37 AV37 AW36 AY36

AU43 AW43 AY42 AY43

AP33 AR32

AP32 AY34

AW34 AU34

AU35 AV35 AY41

AU36 AY37 AR38 AP36 AU39 AR36 AV40 AW39 AY39 AU40 AP35 AW41 AU41 AR35 AV42 AU42

AJ61 AN62 AM58 AM55 AV57 AV53 AL43 AL48

AJ62 AN61 AN58 AN55 AW57 AW53 AL42 AL49

AP49 AR51 AP51

TP127 TP128 TP129

TP41 TP40

+VREF_CA_CPU +VREFDQ_SA_M3 +VREFDQ_SB_M3

M_A_DIM0_CK_DDR0_DN [14]

M_A_DIM0_CK_DDR0_DP [14]

M_A_DIM0_CKE0 [14]

M_A_DIM0_CS0_N [14]

M_A_RAS_N [14] M_A_WE_N [14] M_A_CAS_N [14]

M_A_BS0 [14] M_A_BS1 [14] M_A_BS2 [14]

M_A_A<0> [14] M_A_A<1> [14] M_A_A<2> [14] M_A_A<3> [14] M_A_A<4> [14] M_A_A<5> [14] M_A_A<6> [14] M_A_A<7> [14] M_A_A<8> [14] M_A_A<9> [14] M_A_A<10> [14] M_A_A<11> [14] M_A_A<12> [14] M_A_A<13> [14] M_A_A<14> [14] M_A_A<15> [14]

M_A_DQS_DN<0> [14] M_A_DQS_DN<1> [14] M_A_DQS_DN<2> [14] M_A_DQS_DN<3> [14] M_A_DQS_DN<4> [14] M_A_DQS_DN<5> [14] M_A_DQS_DN<6> [14] M_A_DQS_DN<7> [14]

M_A_DQS_DP<0> [14] M_A_DQS_DP<1> [14] M_A_DQS_DP<2> [14] M_A_DQS_DP<3> [14] M_A_DQS_DP<4> [14] M_A_DQS_DP<5> [14] M_A_DQS_DP<6> [14] M_A_DQS_DP<7> [14]

U24D

M_B_DQ<0>[15] M_B_DQ<1>[15] M_B_DQ<2>[15] M_B_DQ<3>[15] M_B_DQ<4>[15] M_B_DQ<5>[15] M_B_DQ<6>[15] M_B_DQ<7>[15] M_B_DQ<8>[15] M_B_DQ<9>[15] M_B_DQ<10>[15] M_B_DQ<11>[15] M_B_DQ<12>[15] M_B_DQ<13>[15] M_B_DQ<14>[15] M_B_DQ<15>[15] M_B_DQ<16>[15] M_B_DQ<17>[15] M_B_DQ<18>[15] M_B_DQ<19>[15] M_B_DQ<20>[15] M_B_DQ<21>[15] M_B_DQ<22>[15] M_B_DQ<23>[15] M_B_DQ<24>[15] M_B_DQ<25>[15] M_B_DQ<26>[15] M_B_DQ<27>[15] M_B_DQ<28>[15] M_B_DQ<29>[15] M_B_DQ<30>[15] M_B_DQ<31>[15] M_B_DQ<32>[15] M_B_DQ<33>[15] M_B_DQ<34>[15] M_B_DQ<35>[15] M_B_DQ<36>[15] M_B_DQ<37>[15] M_B_DQ<38>[15] M_B_DQ<39>[15] M_B_DQ<40>[15] M_B_DQ<41>[15] M_B_DQ<42>[15] M_B_DQ<43>[15] M_B_DQ<44>[15] M_B_DQ<45>[15] M_B_DQ<46>[15] M_B_DQ<47>[15] M_B_DQ<48>[15] M_B_DQ<49>[15] M_B_DQ<50>[15] M_B_DQ<51>[15] M_B_DQ<52>[15] M_B_DQ<53>[15] M_B_DQ<54>[15] M_B_DQ<55>[15] M_B_DQ<56>[15] M_B_DQ<57>[15] M_B_DQ<58>[15] M_B_DQ<59>[15] M_B_DQ<60>[15] M_B_DQ<61>[15] M_B_DQ<62>[15] M_B_DQ<63>[15]

AY31

AW31

AY29

AW29

AV31 AU31 AV29 AU29 AY27

AW27

AY25

AW25

AV27 AU27 AV25 AU25 AM29 AK29 AL28 AK28 AR29 AN29 AR28 AP28 AN26 AR26 AR25 AP25 AK26 AM26 AK25 AL25 AY23

AW23

AY21

AW21

AV23 AU23 AV21 AU21 AY19

AW19

AY17

AW17

AV19 AU19 AV17 AU17 AR21 AR22 AL21 AM22 AN22 AP21 AK21 AK22 AN20 AR20 AK18 AL18 AK20 AM20 AR18 AP18

SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63

HSW_ULT_DDR3L

DDR CHANNEL B

SB_CK#0

SB_CK0

SB_CK#1

SB_CK1

SB_CKE0 SB_CKE1 SB_CKE2 SB_CKE3

SB_CS#0 SB_CS#1

SB_ODT0

SB_RAS

SB_WE

SB_CAS SB_BA0

SB_BA1 SB_BA2

SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8

SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15

SB_DQSN0 SB_DQSN1 SB_DQSN2 SB_DQSN3 SB_DQSN4 SB_DQSN5 SB_DQSN6 SB_DQSN7

SB_DQSP0 SB_DQSP1 SB_DQSP2 SB_DQSP3 SB_DQSP4 SB_DQSP5 SB_DQSP6 SB_DQSP7

AM38 AN38 AK38 AL38

AY49 AU50 AW49 AV50

AM32 AK32

AL32 AM35

AK35 AM33

AL35 AM36 AU49

AP40 AR40 AP42 AR42 AR45 AP45 AW46 AY46 AY47 AU46 AK36 AV47 AU47 AK33 AR46 AP46

AW30 AV26 AN28 AN25 AW22 AV18 AN21 AN18

AV30 AW26 AM28 AM25 AV22 AW18 AM21 AM18

TP130 TP131 TP132

TP35 TP31

M_B_A<0> [15] M_B_A<1> [15] M_B_A<2> [15] M_B_A<3> [15] M_B_A<4> [15] M_B_A<5> [15] M_B_A<6> [15] M_B_A<7> [15] M_B_A<8> [15] M_B_A<9> [15] M_B_A<10> [15] M_B_A<11> [15] M_B_A<12> [15] M_B_A<13> [15] M_B_A<14> [15] M_B_A<15> [15]

M_B_DIM0_CK_DDR0_DN [15]

M_B_DIM0_CK_DDR0_DP [15]

M_B_DIM0_CKE0 [15]

M_B_DIM0_CS0_N [15]

M_B_RAS_N [15] M_B_WE_N [15] M_B_CAS_N [15]

M_B_BS0 [15] M_B_BS1 [15] M_B_BS2 [15]

M_B_DQS_DN<0> [15] M_B_DQS_DN<1> [15] M_B_DQS_DN<2> [15] M_B_DQS_DN<3> [15] M_B_DQS_DN<4> [15] M_B_DQS_DN<5> [15] M_B_DQS_DN<6> [15] M_B_DQS_DN<7> [15]

M_B_DQS_DP<0> [15] M_B_DQS_DP<1> [15] M_B_DQS_DP<2> [15] M_B_DQS_DP<3> [15] M_B_DQS_DP<4> [15] M_B_DQS_DP<5> [15] M_B_DQS_DP<6> [15] M_B_DQS_DP<7> [15]

03

B B

3 OF 19

A A

5

4

3

4 OF 19

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

2

Thursday, December 04, 2014

PROJECT :

Haswell 2/5 (DDR3 I/F)

ZHNB

A

3 39

1

3 39

A

5

Vinafix.com

4

3

2

1

04

D D

C C

DRAM COMP

B B

H_PECI (50ohm) Route on microstrip only Spacing >18 mils Trace Length: 0.4~6.125 iches

H_PWRGOOD (50ohm) Trace Length: 1~11.25 inches

CPU_PLTRST# (50ohm) Trace Length: 10~17 inches

H_PECI[26]

H_PROCHOT#[17,26,29,32]

CPU_PGOOD[26]

R90 200/F_4

R91 120/F_4

R92 100/F_4

SM_RCOMP_0

SM_RCOMP_1

SM_RCOMP_2

TP71 TP80

R380 56_4

R360 *Short_4

SM_RCOMP[0:2] Trace length < 500 mils Trace width = 12~15 mils Trace spacing = 20 mils

TP108

XDP PU/PD

PROC_DETECT CATERR# H_PECI

H_PROCHOT#_RH_PROCHOT#

H_PWRGOOD_R

SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2

DDR_PG_CTRL

Haswell ULT (SIDEBAND)

D61

PROC_DETECT

K61

CATERR

N62

PECI

K63

PROCHOT

C61

PROCPWRGD

AU60

SM_RCOMP0

AV60

SM_RCOMP1

AU61

SM_RCOMP2

AV15

SM_DRAMRST

AV61

SM_PG_CNTL1

XDP_TDO_CPU

XDP_TCK0 XDP_TRST#

U24B

R29 *51_4

R433 51_4 R462 *51_4

MISC

THERMAL

PWR

DDR3L

DSW

+1.05V_VCCST

HSW_ULT_DDR3L

JTAG

2 OF 19

PRDY

PREQ PROC_TCK PROC_TMS

PROC_TRST

PROC_TDI

PROC_TDO

BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7

J62

XDP_PRDY#

K62

XDP_PREQ#

E60

XDP_TCK0

E61

XDP_TMS_CPU

E59

XDP_TRST#

F63

XDP_TDI_CPU

F62

XDP_TDO_CPU

J60

XDP_BPM#0

H60

XDP_BPM#1

H61

XDP_BPM#2

H62

XDP_BPM#3

K59

XDP_BPM#4

H63

XDP_BPM#5

K60

XDP_BPM#6

J61

XDP_BPM#7CPU_DRAMRST#

XDP_PRDY# [13]

XDP_PREQ# [13] XDP_TCK0 [8,13] XDP_TMS_CPU [13] XDP_TRST# [8,13] XDP_TDI_CPU [8,13] XDP_TDO_CPU [8,13]

XDP_BPM#0 [13]

XDP_BPM#1 [13]

TP73 TP75 TP76 TP74 TP10 TP9

TCK,TMS Trace Length < 9000mils

BPM#[0:7] Trace Length 1~6 inches Length match < 300 mils

PU/PD of CPU

+1.05V_VCCST

H_PROCHOT#

A A

H_PWRGOOD_R

R386 62_4

R359 10K_4

5

DRAMRST

CPU DRAM

CPU_DRAMRST#

PP1350

12

R130 470_4

R140 *Short_4

4

12

C285

*0.1u/10V_4

3

DDR3_DRAMRST# [14,15]

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

2

Thursday, December 04, 2014

PROJECT :

Haswell 3/5 (SideBand)

ZHNB

4 39

1

A

5

Vinafix.com

4

3

2

1

VDDQ Output Decoupling Recommendations

330uFx2 7343

C281 10u/6.3V_6

C386 10u/6.3V_6

+VCCIN

C68 *4.7u/6.3V_6

22uFx11 10uFx10

+1.35V_CPU 1.4A

C92 10u/6.3V_6

C387

2.2u/6.3V_6

R367 100/F_4

R368 *Short_4

300mA 300mA

VCCST_PWRGD[13]

VRON_CPU[32]

VCORE_PGOOD[10,32]

R26 150_6

PP1350

D D

C388

2.2u/6.3V_6

C385 22u/6.3V_8

C C

+1.05V_VCCST

VRON_CPU VCORE_PGOOD

R59 *SHORT_8

B B

C91 10u/6.3V_6

C384 10u/6.3V_6

VCC_SENSE[32]

R358 *10K_4 R357 10K_4

+1.05V_VCCSTPP1050_PCH

PWR_DEBUG[13]

+1.05V_VCCST

BOT socket side 5 onTOP, 6 on BOT inside socket cavity

0805

5 onTOP, 5 on BOT inside socket cavity

0805

TP5 TP8

C90 10u/6.3V_6

+VCCIN

C282 10u/6.3V_6

TP17 TP29

TP30 TP69

TP36 TP24 TP42

TP12 TP13 TP11 TP81 TP22 TP34 TP33 TP25 TP39 TP32 TP43 TP15 TP26

ULT_RVSD_63 ULT_RVSD_64

VCC_SENSE_R ULT_RVSD_65 +VCCIO_OUT

ULT_RVSD_66 ULT_RVSD_67 ULT_RVSD_68

H_CPU_SVIDART# H_CPU_SVIDCLK H_CPU_SVIDDAT VCCST_PWRGD VRON_CPU VCORE_PGOOD

PWR_DEBUG

ULT_RVSD_69 ULT_RVSD_70 ULT_RVSD_71 ULT_RVSD_72 ULT_RVSD_73 ULT_RVSD_74 ULT_RVSD_75 ULT_RVSD_76 ULT_RVSD_77 ULT_RVSD_78 ULT_RVSD_79 ULT_RVSD_80 ULT_RVSD_81

+1.05V_VCCST

+VCCIN

C283 10u/6.3V_6

+VCCIOA_OUT

ULT_RVSD_61 ULT_RVSD_62

Haswell ULT (POWER)

HSW_ULT_DDR3L

HSW ULT POWER

12 OF 19

L59

AH26

AJ31 AJ33 AJ37

AN33

AP43

AR48

AY35 AY40 AY44 AY50

F59 N58

AC58

E63

AB23

A59 E20

AD23

AA23 AE59

L62 N63 L63 B59 F60 C59

D63 H59 P62 P60 P61 N59 N61

T59 AD60 AD59

AA59

AE60 AC59 AG58

U59 V59

AC22

AE22

AE23

AB57 AD57 AG57

C24 C28 C32

J58

U24L

RSVD RSVD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VCC RSVD RSVD

VCC_SENSE RSVD VCCIO_OUT VCCIOA_OUT RSVD RSVD RSVD

VIDALERT VIDSCLK VIDSOUT VCCST_PWRGD VR_EN VR_READY

VSS PWR_DEBUG VSS RSVD_TP RSVD_TP RSVD_TP RSVD_TP RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD

VCCST VCCST VCCST

VCC VCC VCC VCC VCC VCC

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

C36 C40 C44 C48 C52 C56 E23 E25 E27 E29 E31 E33 E35 E37 E39 E41 E43 E45 E47 E49 E51 E53 E55 E57 F24 F28 F32 F36 F40 F44 F48 F52 F56 G23 G25 G27 G29 G31 G33 G35 G37 G39 G41 G43 G45 G47 G49 G51 G53 G55 G57 H23 J23 K23 K57 L22 M23 M57 P57 U57 W57

C35 *22u/6.3V_8

C49 47u/6.3V_8

C246 *22u/6.3V_8

C44 *22u/6.3V_8

C266 *22u/6.3V_8

C262 *22u/6.3V_8

C21 47u/6.3V_8

C27 47u/6.3V_8

C22 *22u/6.3V_8

C244 47u/6.3V_8

C260 *22u/6.3V_8

C267 *22u/6.3V_8

C26 *22u/6.3V_8

C247 47u/6.3V_8

C62 *22u/6.3V_8

C41 *22u/6.3V_8

C23 47u/6.3V_8

C24 *22u/6.3V_8

C245 *22u/6.3V_8

VCC Output Decoupling Recommendations

470uFx4 7343 22uFx8 22uFx11 10uFx11

TOP socket side 4 on TOP, 4 on BOT near socket edge

0805 0805

TOP, inside socket cavity

0805

BOT, inside socket cavity

+VCCIN 32A

C248 *22u/6.3V_8

C46 *22u/6.3V_8

C20 47u/6.3V_8

C43 *22u/6.3V_8

05

+VCCIN

C42 *22u/6.3V_8

C25 47u/6.3V_8

C45 *22u/6.3V_8

SVID

H_CPU_SVIDDAT

A A

Place PU resistor close to CPU

H_CPU_SVIDART# H_CPU_SVIDCLK

+1.05V_VCCST

R379 130/F_4

R381 *Short_4

R389 43_4

R388 *Short_4

5

Layout note: need routing together and ALERT need between CLK and DATA.

+1.05V_VCCST

R387 75_4

VR_SVID_DATA [32]

VR_SVID_ALERT# [32] VR_SVID_CLK [32]

4

VCCST PWRGD

+1.05V_VCCST

R336 10K_4

R312

C233 *0.1u/10V_4

PP3300_DSW

VCCST_PWRGD_RVCCST_PWRGD

*Short_4

3

C1

0.1u/10V_4

U20

5

VCC

4

Y

74AUP1G07GW

GND

1

NC

2

VCCST_PWRGD_EN

A

3

2

R306 *0_4 R307 *Short_4 R305 *0_4

Size Document Number Rev

Date: Sheet of

Haswell 4/5 (POWER)

Thursday, December 04, 2014

PP1050_PGOOD [26,31]

PCH_PWROK [7,26]

SYS_PWROK [7,13,26]

Quanta Computer Inc.

PROJECT :

ZHNB

1

G Path

5 39

A

5

Vinafix.com

4

3

2

1

Haswell ULT (CFG,RSVD)

U24S

HSW_ULT_DDR3L

06

D D

C C

CFG0[13] CFG1[13] CFG2[13] CFG3[13] CFG4[8,13] CFG5[13] CFG6[13] CFG7[13] CFG8[13]

CFG9[13] CFG10[13] CFG11[13] CFG12[13] CFG13[13] CFG14[13] CFG15[13]

NOA_STBN_0[13] NOA_STBN_1[13] NOA_STBP_0[13] NOA_STBP_1[13]

R57 49.9/F_4

R352 8.2K_4

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15

NOA_STBN_0 NOA_STBN_1 NOA_STBP_0 NOA_STBP_1

CFG_RCOMP

TD_IREF

AC60 AC62 AC63 AA63 AA60

Y62 Y61 Y60 V62 V61 V60 U60 T63 T62 T61 T60

AA62

U63

AA61

U62 V63

J20 H18 B12

A5 E1

D1

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15

CFG16 CFG18 CFG17 CFG19

CFG_RCOMP RSVD RSVD

RSVD RSVD RSVD TD_IREF

RESERVED

PROC_OPI_RCOMP

19 OF 19

RSVD_TP RSVD_TP

RSVD

RSVD_TP RSVD_TP

RSVD_TP

RSVD RSVD

RSVD

RSVD RSVD

VSS VSS

RSVD RSVD

AV63 AU63

C63 C62 B43

A51 B51

L60 N60 W23

Y22 AY15

AV62 D58

P22 N21

P20 R20

OPI_COMP1

R461 49.9/F_4

Processor Strapping

1 0

CFG0 EAR-STALL/NOT STALL RESET SEQUENCE AFTER PCU PLL IS LOCKED CFG1 PCH/ PCH LESS MODE SELECTION

B B

CFG3 PHYSICAL_DEBUG_ENABLED (DFX PRIVACY)

CFG 8 ALLOW THE USE OF NOA ON LOCKED UNITS

(DEFAULT) NORMAL OPERATION; NO STALL

(DEFAULT) NORMAL OPERATION

DISABLED NO PHYSICAL DISPLAY PORT ATTACHED TO EMBEDDED DISPLAY PORT

DISABLED(DEFAULT); IN THIS CASE, NOA WILL BE DISABLED IN LOCKED UNITS AND ENABLED IN UN-LOCKED UNITS

STALL

PCH-LESS MODE

ENABLED AN EXTERNAL DISPLAY PORT DEVICE IS CONNECTED TO THE EMBEDDED DISPLAY PORT

ENABLED; NOA WILL BE AVAILABLE REGARDLESS OF THE LOCKING OF THE UNIT

CFG0

CFG1

CFG3

CFG8

R417 *1K_4

R423 *1K_4

R409 *1K_4

R403 *1K_4

CFG9 NO SVID PROTOCOL CAPABLE VR CONNECTED

A A

CFG10 SAFE MODE BOOT

5

VRS SUPPORTING SVID PROTOCOL ARE PRESENT

POWER FEATURES ACTIVATED DURING RESET

4

NO VR SUPPORTING SVID IS PRESENT. THE CHIP WILL NOT GENERATE (OR RESPOND TO) SVID ACTIVITY

POWER FEATURES (ESPECIALLY CLOCK GATINE ARE NOT ACTIVATED

3

CFG9

CFG10

R394 *1K_4

R56 *1K_4

2

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

PROJECT :

Haswell 5/5 (CFG/GND)

ZHNB

1

6 39

A

5

Vinafix.com

4

3

2

1

Haswell ULT PCH (PM)

U24H

PCH_SUSPWRACK

TP37

SUSACK#_R SYS_RESET#

SYS_PWROK_R PCH_PWROK_R APWROK_RPCH_PWROK PCI_PLTRST#

PCH_RSMRST# PCH_PWRBTN#

PCH_ACPRESENT PCH_BATLOW# PCH_SLP_S0#_R

AK2

SUSACK

AC3

SYS_RESET

AG2

SYS_PWROK

AY7

PCH_PWROK

AB5

APWROK

AG7

PLTRST

AW6

RSMRST

AV4

SUSWARN/SUSPWRDNACK/GPIO30

AL7

PWRBTN

AJ8

ACPRESENT/GPIO31

AN4

BATLOW/GPIO72

AF3

SLP_S0

AM5

SLP_WLAN/GPIO29

+3V_S5

PCH_SUSACK_L[26]

D D

SYS_PWROK[5,13,26]

PCH_SUSWARN_L[26]

PCH_PWRBTN_L[26]

C C

SYS_RESET#[13,17]

SYS_PWROK

PCH_RSMRST_L[26]

ACPRESENT[29]

PCH_SLP_S0_L[13,26]

R478 *Short_4 R453 *0_4 R147 *Short_4 R61 *Short_4

R415 *Short_4

R428 *0_4

C265 *1u/6.3V_4

R421 *Short_4 R482 *Short_4

HSW_ULT_DDR3L

SYSTEM POWER MANAGEMENT

+3V +3V_S5 +3V_S5 DSW

DSW DSW DSW +3V_S5 DSW

+3V_S5

DSWVRMEN

DSW

SUS_STAT/GPIO61

DSW DSW DSW DSW DSW

DPWROK

WAKE

CLKRUN/GPIO32

SUSCLK/GPIO62 SLP_S5/GPIO63

SLP_S4 SLP_S3

SLP_A

SLP_SUS

SLP_LAN

AW7

DSWVREN

AV5

DPWROK_R

AJ5

PCIE_PCH_WAKE#

V5

CLKRUN#

AG4

PCH_SUS_STAT

AE6

PCH_SUSCLK

AP5

PCH_SLP_S5_L

AJ6

PCH_SLP_S4_L

AT4

PCH_SLP_S3_L

AL5

PCH_SLP_A_L

AP4

PCH_SLP_SUS_L

AJ7

PCH_SLP_LAN#

Deep Sx

R477 *Short_4

R74 *Short_4

R38 *Short_4

LPC_CLKRUN_L

TP27

TP38

07

DSWVREN [8] PCH_DPWROK [26] PCH_WAKE_L [26]

LPC_CLKRUN_L [26]

PCH_SUSCLK [19] PCH_SLP_S5_L [13,26,30,35]

PCH_SLP_S4_L [13] PCH_SLP_S3_L [13,26,30,31,33,35] PCH_SLP_A_L [13]

PCH_SLP_SUS_L [26,35]

R427 0_4

SUSACK#_RPCH_SUSPWRACK

8 OF 19

4/22 modify, default skip EC control

PCH PM PU/PD

PP3300_PCH

CLKRUN#

B B

A A

SYS_RESET#

PCH_RSMRST# SYS_PWROK DPWROK_R

PCH_SUSPWRACK SYS_PWROK

PCH_ACPRESENT PCH_BATLOW# PCIE_PCH_WAKE# PCH_PWRBTN#

R37 8.2K_4 R406 10K_4

R479 10K_4 R80 *10K_4 R473 100K/F_4

R454 10K_4 R426 *1K_4

R62 10K_4 R444 8.2K_4 R75 10K_4 R151 *10K_4

5

PP3300_PCH_SUS

PP3300_DSW

PCH PWROK

PCH_PWROK[5,26]

100K_4

PLTRST# Buffer

PP3300_PCH

2

PCI_PLTRST#

4/22 modify, default is bypass PLTRST#

4

1

PCH_PWROK PCH_PWROK_R

R487

PCI_PLTRST# PLTRST#

C94 *0.1u/10V_4

4

U6

3 5

*TC7SH08FU

3

R155 100K_4

R483 *Short_4

R474 *0_4

Non Deep Sx

R152 *Short_4

PLTRST# [13,19,21,22,26]

DPWROK_RPCH_RSMRST_L

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

2

PROJECT :

PCH 1/6 (PM)

ZHNB

7 39

1

A

RTC Clock 32.768KHz (RTC)

Vinafix.com

C278 15 p/50V_4

C286 15 p/50V_4

D D

RTC Circuitry (RTC)

PP3300_RTC

HDA

C C

PCH JTAG

JTAG_TCK,JTAG_TMS Trace Length < 9000mils

B B

ULT Strapping Table

+3V_RTC Trace width = 20 mils

PCH_AZ_CODEC_RST#[23]

PCH_AZ_CODEC_SDOUT[23]

PCH_AZ_CODEC_BITCLK[23]

PCH_AZ_CODEC_SYNC[23]

XDP_TCK1[13]

XDP_TDI_CPU[4,13]

R168 *SHORT_6

20MIL

XDP_TMS XDP_TDI PCH_JTAG_TDO PCH_JTAGX

Pin Name Strap description

GPIO81(SPKR)

HDA_SDO

INTVRMEN

GPIO66

GPIO86

GPIO15

A A

CFG4

DSWVREN

5

23

4 1

RTC_X1

R460

Y3

10M_4

32.768KHZ

RTC_X2

+3V_RTC Trace width = 30 mils

+3V_RTC

R160

20K/F_4

C98 1u/6.3V_4

R159

20K/F_4

C105

C97

1u/6.3V_4

R488 33_4 R82 *0_4 R492 33_4 R490 33_4

C302 *10p/50V_4

R494 33_4 C312 * 10p/50V_4

MP remove(Intel)

R47 *0_4

PP1050_PCH_SUS

PCH_JTAG_TDO

R418 *51_4 R78 *51_4 R73 51_4 R420 *1K_4

XDP_TCK1

R83 *51_4

No reboot on TCO Timer expiration

Flash Descriptor Security Override / Intel ME Debug Mode

Integrated 1.05V VRM enable ALW AYS

Top-Block Swap override

Boot BIOS Strap Bit

TLS(Transport layer security)

DP presence strap

Deep Sx well on die VR enable

5

PCH_RTCRST_R

PCH_SRTCRST_R

HDA_RST#_R HDA_SDO_R HDA_BCLK_R

HDA_SYNC_R

Sampled

PWROK

+3V_RTC

PCH_SRTCRST[26] PCH_RTCRST[13,26]

XDP_TRST#[4,13]

XDP_TDO_CPU[4,13]

0 = Default enable (iPD 20K)

1 =Disable No-Reboot mode

0 = Default can program ME (iPD 20K)

1 =can't program ME

R157 *0_4 R156 *0_4

RTCRST_L and SRTCRST_L please take out layout

PCH_AZ_CODEC_SDIN0[23]

XDP_TCK0

XDP_TDI[13] XDP_TDO[13] XDP_TMS[13]

XDP_TCK0[4,13]

Configuration note

1=Should be always pull-up

0 = Default disable (iPD 20K)

1 = Enable TBS function

0 = Default SPI (iPD 20K)

1 =LPC

0 = Default enable w/o confidentiality(iPD 20K)

1 =Default enable with confidentiality

0 = Enable an external display port is connected to the eDP

1 =disable

1=Should be always pull-up

R475 1M_4

R55 *Short_4

R429 *Short_4

R35 *0_4

4

Haswell ULT PCH (RTC/HDA/SATA/SPI)

HSW_ULT_DDR3L

RTC

AUDIO SATA

JTAG

5 OF 19

PCH_INTVRMEN

x86 stuff

CFG4

DSWVREN

SPKR

R485 *330K_4

GPIO66

GPIO86

GPIO15

R64 1K_4

R472 *330K_4

R400 *1K_4

R493 *0_4

+3V +3V +3V +3V

SPKR [10,23]

PCH_HDA_SDO [26]

R340 *1K_4

R7 *1K_4

R58 *1K_4

SATA_RN0/PERN6_L3 SATA_RP0/PERP6_L3 SATA_TN0/PETN6_L3

SATA_TP0/PETP6_L3

SATA_RN1/PERN6_L2 SATA_RP1/PERP6_L2 SATA_TN1/PETN6_L2

SATA_TP1/PETP6_L2

SATA_RN2/PERN6_L1 SATA_RP2/PERP6_L1 SATA_TN2/PETN6_L1

SATA_TP2/PETP6_L1

SATA_RN3/PERN6_L0 SATA_RP3/PERP6_L0 SATA_TN3/PETN6_L0

SATA_TP3/PETP6_L0

RTC_X1 RTC_X2 SM_INTRUDER# PCH_INTVRMEN PCH_SRTCRST_R PCH_RTCRST_R

HDA_BCLK_R HDA_SYNC_R HDA_RST#_R

HDA_SDO_R

XDP_TCK1 XDP_TDI PCH_JTAG_TDO

PCH_JTAGX

4

U24E

AW5

RTCX1

AY5

RTCX2

AU6

INTRUDER

AV7

INTVRMEN

AV6

SRTCRST

AU7

RTCRST

AW8

HDA_BCLK/I2S0_SCLK

AV11

HDA_SYNC/I2S0_SFRM

AU8

HDA_RST/I2S_MCLK

AY10

HDA_SDI0/I2S0_RXD

AU12

HDA_SDI1/I2S1_RXD

AU11

HDA_SDO/I2S0_TXD

AW10

HDA_DOCK_EN/I2S1_TXD

AV10

HDA_DOCK_RST/I2S1_SFRM

AY8

I2S1_SCLK

AU62

PCH_TRST

AE62

PCH_TCK

AD61

PCH_TDI

AE61

PCH_TDO

AD62

PCH_TMS

AL11

RSVD

AC4

RSVD

AE63

JTAGX

AV2

RSVD

PP3300_PCH

+3V_RTC

PP3300_PCH

PP3300_PCH_SUS

DSWVREN[7]

+3V_RTC

Note: R493 need stuff on MP.

HDA_SDO_R

R484 330K_4

GPIO66[10]

R330 *1K_4

GPIO86[10]

R1 *1K_4

GPIO15[10]

R50 *8.2K_4

CFG4[6,13]

R476 330K_4

3

SATA0GP/GPIO34 SATA1GP/GPIO35 SATA2GP/GPIO36 SATA3GP/GPIO37

SATA_IREF

RSVD RSVD

SATA_RCOMP

SATALED

3

J5 H5 B15 A15

J8 H8 A17 B17

J6 H6 B14 C15

F5 E5 C17 D17

V1

EC_SMI_L

U1

PCH_NMI_DBG_L

V6

EC_SCI_L

AC1

GPIO37

A12

SATA_IREF

L11 K10 C12 U3

R351 *Short_4

SATA_RCOMP

R350 3.01K/F_4

SATA_LED#

R395 10K_4

SATA_RCOMP Impedance = 50 ohm Trace length < 500 mils Trace spacing = 15 mils

PCH dual I/O SPI ROM

PP3300_DSW

PCH_SPI_CS0#_R[17] PCH_SPI_CLK_R[17] PCH_SPI_SI_R[17]

PCH_SPI_SO_R[17]

PCH_SPI_CS0# PCH_SPI_CLK PCH_SPI_SI PCH_SPI_SO

SATA_RXN0_SSD [20] SATA_RXP0_SSD [20] SATA_TXN0_SSD [20] SATA_TXP0_SSD [20]

iSSD

R408 *SHORT_6 R407 *0_6

near SPI ROM as possible

R413 33_4 R450 33_4 R449 33_4 R412 33_4

SPI_WP_ME

SPI_WP_ME SPI_HOLD_ME

2

Haswell ULT PCH(LPC,SPI,SMBUS,C-LINK,THERMAL)

LPC_LAD0[22,26] LPC_LAD1[22,26] LPC_LAD2[22,26] LPC_LAD3[22,26]

LPC_LFRAME#[22,26]

PCH_SPI_CLK PCH_SPI_CS1#

TP93

PCH_SPI_SI PCH_SPI_SO PCH_SPI_IO2

TP14

PCH_SPI_IO3

EC_SMI_L [26] EC_SCI_L [26]

+V1.05S_ASATA3PLL

PP3300_PCH

R451 * Short_4

R459 *Short_4

R411 * Short_4

C280 *22p/50V_4

R105 *Short_4 R458 *Short_4

1

TP94

PCH_NMI_DBG_L [26]

EC_SMI_L

EC_SCI_L

PCH_NMI_DBG_L

GPIO37

W25Q64FVSSIG(SOIC) / AKE3EFP0N06----->8MB

D23 RB500V-40

R414 * Short_4

SPI_WP_ME_ROM

2 1

near SPI ROM as possible

Q12N7002K

3

2

SPI_WP_ME

+3V_PCH_MEPP3300_PCH

R424 4.7K_4

U25

+3V_PCH_ME

3 5

1 6 5 2

3

C80 0.1u/10V_4

U3 TC7SH08FU

CE# SCK SI SO

WP#

ROM-8M

VDD

HOLD#

VSS

4

SPI_WP_ME_ROM

R410 10K_4

8

7 4

GPIO_SPI_WP [17] SPI_HOLD#_BIOS [17]

PCH_SPI_WP_D co nnect to GPIO5 8 at GRB

SPI_WP_ME [26,27]

2

SPI_HOLD_ME

PCH_SPI_WP_D [10 ]

U24G

AU14

LAD0

AW12

LAD1

AY12

LAD2

AW11

LAD3

AV12

LFRAME

AA3

SPI_CLK

Y7

SPI_CS0

Y4

SPI_CS1

AC2

SPI_CS2

AA2

SPI_MOSI

AA4

SPI_MISO

Y6

SPI_IO2

AF1

SPI_IO3

R401 10 K_4

R32 10K_4 R396 10 K_4

R404 10 K_4

+3V_PCH_ME

From Screw/EC

HSW_ULT_DDR3L

LPC

PP3300_PCH

+3V_PCH_ME

R452 100K_4

C275

0.1u/10V_4

To debug header

To PCH

+3V_S5 +3V_S5 +3V_S5

SMBUS

+3V_S5 +3V_S5 +

3V_S5

+3V_S5

SML1ALERT/PCHHOT/GPIO73

+3V_S5 +3V_S5

C-LINKSPI

SMBus

1

AN2

SMBALERT/GPIO11

SML0ALERT/GPIO60

SML1CLK/GPIO75

SML1DATA/GPIO74

7 OF 19

PP3300_PCH_SUS

R430 10K_4 R448 10K_4 R437 10K_4

R106 2.2K_4 R110 2.2K_4 R126 2.2K_4 R121 2.2K_4

R118 2.2K_4 R113 2.2K_4

SMBALERT#

AP2

SMB_PCH_CLK

SMBCLK

AH1

SMB_PCH_DAT

SMBDATA

AL2

SMB0ALERT#

AN1

SMB_ME0_CLK

SML0CLK

AK1

SMB_ME0_DAT

SML0DATA

AU4

SMB1ALERT#

AU3

SMB_ME1_CLK

AH3

SMB_ME1_DAT

AF2

CL_CLKPCH_SPI_CS0#

CL_CLK

AD2

CL_DAT

CL_DATA

AF4

CL_RST#

CL_RST

SMB0ALERT# SMB1ALERT# SMBALERT#

SMB_PCH_CLK SMB_PCH_DAT SMB_ME0_CLK SMB_ME0_DAT SMB_ME1_CLK SMB_ME1_DAT

Quanta Computer Inc.

PROJECT :

Size Doc ument Number Rev

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

PROJECT :

PCH 2/6 (RTC/HDA/SATA/SPI)

1

LVDS Bridge

SMB_PCH_CLK [13] SMB_PCH_DAT [13]

TP95 TP96 TP102

ZHNB

8 39

08

A

5

Vinafix.com

4

3

2

1

Haswell ULT PCH (PCIE,USB3.0,USB2.0)

PCIE USB

+3V_S5 +3V_S5

HSW_ULT_DDR3L

11 OF 19

4

+3V_S5 +3V_S5

+3V_S5 +3V_S5 +3V_S5 +3V_S5

DSW

USB2N0

DSW

USB2P0

DSW

USB2N1

DSW

USB2P1

DSW

USB2N2

DSW

USB2P2

DSW

USB2N3

DSW

USB2P3

DSW

USB2N4

DSW

USB2P4

DSW

USB2N5

DSW

USB2P5

DSW

USB2N6

DSW

USB2P6

DSW

USB2N7

DSW

USB2P7

USB3RN1 USB3RP1

USB3TN1 USB3TP1

USB3RN2 USB3RP2

USB3TN2 USB3TP2

USBRBIAS

OC0/GPIO40 OC1/GPIO41 OC2/GPIO42 OC3/GPIO43

RSVD RSVD

AN8 AM8

AR7 AT7

AR8 AP8

AR10 AT10

AM15 AL15

AM13 AN13

AP11 AN11

AR13 AP13

G20 H20

C33 B34

E18 F18

B33 A33

AJ10 AJ11 AN10 AM10

AL3 AT1 AH2 AV3

USBP0- [21] USBP0+ [21]

USBP1- [27] USBP1+ [27]

USBP2- [16] USBP2+ [16]

USBP3- [19] USBP3+ [19]

USBP4- [28] USBP4+ [28]

USBP5- [21] USBP5+ [21]

USBP6- [28] USBP6+ [28]

USB3_RXN0 [27] USB3_RXP0 [27]

USB3_TXN0 [27] USB3_TXP0 [27]

USBCOMP

USBCOMP Impedance = 50 ohm Trace length < 500 mils Trace spacing = 15 mils

USB_OC0# USB_OC1# USB_OC2# USB_OC3#

USB_OC0# [26] USB_OC2# [26]

USB Overcurrent

PP3300_PCH_SUS

USB_OC0# USB_OC1# USB_OC2# USB_OC3#

RP2

10

9 8 7 4

10K_10P8R

LTE MB USB3.0_A CCD BT MB USB2.0 SIM USB2.0 CardReader

MB USB3.0_A

MB U3 MB U2

1 2 3

56

3

CLK_PCIE_WLANN[19] CLK_PCIE_WLANP[19]

WLAN

CLK_PCIE_NGFFN[21] CLK_PCIE_NGFFP[21]

NGFF

TP64 TP66

PCIE_CLKREQ_WLAN#[19] PCIE_CLKREQ_NGFF#[21]

CLK_PCIE_REQ0# CLK_PCIE_REQ1# CLK_PCIE_REQ2# CLK_PCIE_REQ3# CLK_PCIE_REQ4# CLK_PCIE_REQ5#

TESTLOW_C35 TESTLOW_C34 TESTLOW_AK8 TESTLOW_AL8

U24K

F10

D D

C C

PCIE_RX3-_WLAN[19]

PCIE_RX3+_WLAN[19]

WLAN

PCIE_TX3-_WLAN[19] PCIE_TX3+_WLAN[19]

PCIE_RX2-_NGFF[21]

B B

PCIE_RX2+_NGFF[21]

NGFF

PCIE_TX2-_NGFF[21] PCIE_TX2+_NGFF[21]

TP2 TP1

TP4 TP3

C256 0.1u/16V_4 C257 0.1u/16V_4 R135 22.6/F_4

C254 0.1u/16V_4 C255 0.1u/16V_4

PCIE_RXN1 PCIE_RXP1

PCIE_TXN1 PCIE_TXP1

PCIE_TX3PCIE_TX3+

PCIE_TX2PCIE_TX2+

20141126 EOD parts, change PN.

R354 3.01K/F_4

+V1.05S_AUSB3PLL

A A

R355 *Short_4

5

PCIE_RCOMP

PCIE_IREF

E10 C23

C22

F8 E8

B23 A23

H10 G10

B21 C21

E6 F6

B22 A21

G11 F11

C29 B30

F13 G13

B29 A29

G17 F17

C30 C31

F15 G15

B31 A31

E15 E13 A27 B27

PERN5_L0 PERP5_L0

PETN5_L0 PETP5_L0

PERN5_L1 PERP5_L1

PETN5_L1 PETP5_L1

PERN5_L2 PERP5_L2

PETN5_L2 PETP5_L2

PERN5_L3 PERP5_L3

PETN5_L3 PETP5_L3

PERN3 PERP3

PETN3 PETP3

PERN4 PERP4

PETN4 PETP4

PERN1/USB3RN3 PERP1/USB3RP3

PETN1/USB3TN3 PETP1/USB3TP3

PERN2/USB3RN4 PERP2/USB3RP4

PETN2/USB3TN4 PETP2/USB3TP4

RSVD RSVD PCIE_RCOMP PCIE_IREF

Haswell ULT PCH (CLOCK)

CLK_PCIE_REQ2#

CLK_PCIE_REQ1# CLK_PCIE_N0

CLK_PCIE_P0 CLK_PCIE_REQ0#

CLK_PCIE_REQ3#

CLK_PCIE_REQ4#

CLK_PCIE_REQ5#

R416 10K_4 R43 10K_4 R397 10K_4 R384 10K_4 R31 10K_4 R390 10K_4

R299 10K_4 R298 10K_4 R136 10K_4 R137 10K_4

U24F

C43

CLKOUT_PCIE_N0

C42

CLKOUT_PCIE_P0

U2

PCIECLKRQ0/GPIO18

B41

CLKOUT_PCIE_N1

A41

CLKOUT_PCIE_P1

Y5

PCIECLKRQ1/GPIO19

C41

CLKOUT_PCIE_N2

B42

CLKOUT_PCIE_P2

AD1

PCIECLKRQ2/GPIO20

B38

CLKOUT_PCIE_N3

C37

CLKOUT_PCIE_P3

N1

PCIECLKRQ3/GPIO21

A39

CLKOUT_PCIE_N4

B39

CLKOUT_PCIE_P4

U5

PCIECLKRQ4/GPIO22

B37

CLKOUT_PCIE_N5

A37

CLKOUT_PCIE_P5

T2

PCIECLKRQ5/GPIO23

R398 *Short_4 R253 *Short_4

PP3300_PCH

+3V

CLK_PCIE_REQ2# CLK_PCIE_REQ1#

2

HSW_ULT_DDR3L

CLOCK

SIGNALS

6 OF 19

*18p/50V_4

XTAL24_IN

XTAL24_OUT

A25

XTAL24_IN

B25

XTAL24_OUT

K21

RSVD

M21

RSVD

DIFFCLK_BIASREF

TESTLOW_C35 TESTLOW_C34 TESTLOW_AK8 TESTLOW_AL8

CLKOUT_LPC_0 CLKOUT_LPC_1

CLKOUT_ITPXDP

CLKOUT_ITPXDP_P

C86

C26 C35

C34 AK8 AL8

AN15 AP15

B35 A35

PCLK_TPMCLK_PCI_EC

C89

*18p/50V_4

Size Document Number Rev

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

C253 12p/50V_4

R345

Y2

1M_4

24MHz

2 4

1 3

C252 12p/50V_4

XTAL24_IN XTAL24_OUT

ICLK_BIAS

R353 3.01K/F_4

TESTLOW_C35 TESTLOW_C34 TESTLOW_AK8 TESTLOW_AL8

CLK_PCH_PCI3 CLK_PCH_PCI4

CLK_PCIE_XDPN CLK_PCIE_XDPP

Quanta Computer Inc.

PROJECT :

PCH 3/6 (PCIE/USB/CLK)

1

+V1.05S_AXCK_LCPLL

R14122_4 R13122_4

CLK_PCIE_XDPN [13] CLK_PCIE_XDPP [13]

ZHNB

9 39

09

PCLK_TPM [22] CLK_PCI_EC [26]

A

5

Vinafix.com

4

3

2

1

PCH GPIO PU/PD

Haswell ULT PCH (GPIO,CPU/MISC,NCTF)

U24J

P1

BMBUSY/GPIO76

AU2

GPIO8

AM7

LAN_PHY_PWR_CTRL/GPIO12

AD6

GPIO15

Y1

GPIO16

T3

GPIO17

AD5

GPIO24

AN5

GPIO27

AD7

GPIO28

AN3

GPIO26

AG6

GPIO56

AP1

GPIO57

AL4

GPIO58

AT5

GPIO59

AK4

GPIO44

AB6

GPIO47

U4

GPIO48

Y3

GPIO49

P3

GPIO50

Y2

HSIOPC/GPIO71

AT3

GPIO13

AH4

GPIO14

AM4

GPIO25

AG5

GPIO45

AG3

GPIO46

AM3

GPIO9

AM2

GPIO10

P2

DEVSLP0/GPIO33

C4

SDIO_POWER_EN/GPIO70

L2

DEVSLP1/GPIO38

N5

DEVSLP2/GPIO39

V2

SPKR/GPIO81

R39 RID@10K_4 R434 RID@10K_4 R446 RID@10K_4

RAM_ID

ID2 ID1 ID0

0 0

0

0 1

0 0 0 1

1

1 0

PP3300_WLAN_EN[19,26,35]

WLAN_WAKE_L_Q

PP3300_LTE_EN[21,26]

LTE_WAKE_L_Q

+3V_S5 +3V_S5

+3V +3V +3V_S5 DSW +3V_S5 +3V_S5

+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V +3V +3V

+3V_S5 +3V_S5 DSW +3V_S5 +3V_S5

+3V_S5 +3V_S5

AKD5JGSTL10 AKD5JGETW04 AKD5PGSTW13

01

AKD5JGSTL10 AKD5JGETW04 1600MHz AKD5PGSTW13

TP19 TP20

TP28

PP3300_CCD_EN PCH_SPI_WP_D LTE_DISABLE_L PP3300_SSD_EN RAM_ID2 TPM_LP_EN_L

PP3300_SSD_IO_EN

GPIO50 MODPHY_EN RAM_ID0 GPIO14 TOUCH_INT_L

PCH_GPIO76 LTE_WAKE_L_Q TRACKPAD_INT_L

PCH_SSD_12_EN PCH_SSD_18_EN GPIO24 WK_GPIO27 GPIO28 ODD_PRSNT#

GPIO56

RAM_ID1 WLAN_WAKE_L_Q DEVSLP0 GPIO70 GPIO38 GPIO39

RAM ID

Vender Freq. Micron(4G) Hynix(4G)

D D

TRACKPAD_INT_L[25]

GPIO15[8]

LTE_DISABLE_L need PU to +3V_LTE

PCH_SPI_WP_D[8]

LTE_DISABLE_L[21]

MODPHY_EN[11]

EC_IN_RW[25]

TOUCH_INT_L[16]

PP5000_CODEC_EN[23]

WLAN_DISABLE_L[19]

C C

R88 *Short_4

DEVSLP0[20]

6/24 Connect DEVSLP0 to SSD.

SPKR[8,23]

PP3300_PCH_SUS

PP3300_PCH_SUSPP3300_PCH

LTE_WAKE_L_Q WLAN_WAKE_L_Q

I PathG Path

R101 *0_4

R146 10K_4 R145 10K_4

B B

R97 0_4

Micron(2G) Hynix(2G)11 Hynix(2G)

G PathI Path

R144 0_4

PCH_SPI_WP_D

GPIO14

TRACKPAD_INT_L

TOUCH_INT_L

5

R89 10K_4 R81 10K_4

PP3300_PCH_SUSPP3300_DSW

R150 *0_4

A A

R143 10K_4 R139 10K_4

HSW_ULT_DDR3L

+3V

DSW

GPIO

+3V

+3V +3V +3V +3V

RAM_ID2 RAM_ID1 RAM_ID0

Q PN Mfr. PN

MT41K256M16HA-125:E H5TC4G63AFR-PBA H5TC4G63AFR-PBA(25nm) MT41K256M16HA-125:E H5TC4G63AFR-PBA H5TC4G63AFR-PBA(25nm)

5

2 6

4

Q23

2N7002DW

SERIAL IO

10 OF 19

R45 *RID@10K_4 R435 *RID@10K_4 R447 *RID@10K_4

43

1

THRMTRIP

+3V

CPU/ MISC

+3V +3V +3V +3V +3V +3V +3V +3V +3V +3V +3V +3V +3V +3V +3V +3V +3V +3V +3V +3V +3V +3V +3V +3V +3V +3V

RCIN/GPIO82

PCH_OPI_RCOMP

GSPI0_CS/GPIO83

GSPI0_CLK/GPIO84 GSPI0_MISO/GPIO85 GSPI0_MOSI/GPIO86

GSPI1_CS/GPIO87

GSPI1_CLK/GPIO88 GSPI1_MISO/GPIO89

GSPI_MOSI/GPIO90 UART0_RXD/GPIO91

UART0_TXD/GPIO92 UART0_RTS/GPIO93 UART0_CTS/GPIO94

UART1_RXD/GPIO0

UART1_TXD/GPIO1 UART1_RST/GPIO2 UART1_CTS/GPIO3

I2C0_SDA/GPIO4 I2C0_SCL/GPIO5 I2C1_SDA/GPIO6 I2C1_SCL/GPIO7

SDIO_CLK/GPIO64

SDIO_CMD/GPIO65

SDIO_D0/GPIO66 SDIO_D1/GPIO67 SDIO_D2/GPIO68 SDIO_D3/GPIO69

PP3300_PCH_SUS

1600MHz0 1600MHz 1600MHz0Hynix(4G) 1600MHz

1600MHz

VCORE_PGOOD[5,32]

WLAN_WAKE_L [19]

LTE_WAKE_L [21]

D60 V4 T4

SERIRQ

AW15 AF20

RSVD

AB21

RSVD

R6 L6 N6 L8 R7 L5 N7 K2 J1 K3 J2 G1 K4 G2 J3 J4 F2 F3 G4 F1 E3 F4 D3 E4 C3 E2

CPU thermal trip

THRMTRIP# EC_RCIN_L IRQ_SERIRQ

OPI_COMP2

GPIO84 GPIO85 GPIO86 GPIO87 GPIO88 GPIO89 GPIO90 GPIO91 GPIO92 GPIO93 GPIO94 GPIO0 GPIO1 GPIO2 GPIO3 I2C0_SDA_GPIO4 I2C0_SCL_GPIO5 I2C1_SDA_GPIO6 I2C1_SCL_GPIO7 GPIO64 GPIO65 GPIO66 GPIO67 GPIO68 GPIO69

IMVP_PWRGD_3V

+1.05V_VCCST

THRMTRIP#

3

R463 49.9/F_4

+1.05V_VCCST

2

R314 1K_4

U23

NC1VCC

2

A

GND3Y

74AUP1G07GW

I2C0_SDA_GPIO4 [25] I2C0_SCL_GPIO5 [25] I2C1_SDA_GPIO6 [16,28] I2C1_SCL_GPIO7 [16,28]

3

Q11 FDV301N

1

R313 1K_4

2

1 3

Q12 MMBT3904-7-F

+1.05V_VCCST

5

C249

0.1u/10V_4

4

EC_RCIN_L [26]

IRQ_SERIRQ [22,26]

GPIO86 [8]

strapping

TRACKPAD TOUCHSCREEN / ALS

GPIO66 [8]

12

strapping

SYS_SHDN# [26,33,34]

PP3300_PCH

R344 10K_4

4/23 modify, those 3 power enable pin are PD 100K already

4/23 modify, follow Intel suggestion to un-stuff for unused GPIO

IMVP_PWRGD_3V [26]

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

EC_RCIN_L IRQ_SERIRQ PCH_SSD_12_EN PCH_SSD_18_EN DEVSLP0

PCH_GPIO76 ODD_PRSNT# TPM_LP_EN_L PP3300_SSD_IO_EN GPIO50 GPIO70 GPIO38GPIO83 GPIO39

GPIO83 GPIO84 GPIO85 GPIO87 GPIO88 GPIO89 GPIO90 GPIO91 GPIO92 GPIO93 GPIO94 GPIO0 GPIO1 GPIO2 GPIO3 GPIO64 GPIO65 GPIO67 GPIO68 GPIO69

I2C0_SDA_GPIO4 I2C0_SCL_GPIO5 I2C1_SDA_GPIO6 I2C1_SCL_GPIO7

WK_GPIO27

GPIO27 : If not used then use

8.2-kΩ to 10-kΩ pull-down to GND.

GPIO28 PP3300_CCD_EN PP3300_SSD_EN

PP3300_CCD_EN PP3300_SSD_EN

PCH 4/6 (GPIO/MISC)

Thursday, December 04, 2014

R44 10K_4 R36 10K_4 R399 *10K_4 R33 *10K_4 R382 10K_4

R393 10K_4 R440 10K_4 R402 10K_4 R405 *10K_4 R392 10K_4 R348 10K_4 R375 10K_4 R6 10K_4

R28 *10K_4 R8 *10K_4 R5 *10K_4 R20 *10K_4 R2 *10K_4 R4 *10K_4 R377 *10K_4 R364 *10K_4 R369 *10K_4 R365 *10K_4 R363 *10K_4 R3 *10K_4 R362 *10K_4 R366 *10K_4 R370 *10K_4 R329 *10K_4 R349 *10K_4 R335 *10K_4 R341 *10K_4 R339 *10K_4

R333 4.7K_4 R334 4.7K_4 R331 4.7K_4 R332 4.7K_4

R96 10K_4 R79 *10K_4

R49 10K_4 R16 *10K_4 R575 *10K_4

R15 100K_4 R570 100K_4

Quanta Computer Inc.

PROJECT :

1

ZHNB

10

PP3300_PCH

PP3300_DSW

PP3300_PCH_SUS

10 39

GSPUARTI2C SDIO useless GPIO

A

5

Vinafix.com

C225 *1u/6.3V_4 C13 1u/6.3V_4 C29 1u/6.3V_4

PP1050_PCH

D D

+1.05V_DCPSUS2

C87 *1u/6.3V_4

PP3300_DSW

PP3300_PCH_SUS

R48 *SHORT_8

Deep Sx

Non Deep Sx

PP3300_PCH

C C

PP1050_PCH

0412 MOW-WW15 a 0.47uF cap between VccDSW3_3 and DcpSusByp is required if the 1.9A inrush current requirement cannot meet

+V1.05DX_MODPHY

*10u/6.3V_6

R54 *SHORT_6 R46 *0_6

C37

1u/6.3V_4

R22 *SHORT_8

C17 1u/6.3V_4

PP3300_PCH_SUS

1

.741A

C32 *1u/6.3V_4

C5

+V1.05S_AIDLE

C18

*1u/6.3V_4

+V3.3DX_1.5DX_1.8DX_AUDIO

0.114A

PP3300_PCH_SUS

41mA

C14 22u/6.3V_8

PP1050_PCH

63mA

PCH VCCHSIO Power

C227

PP5000

B B

PP3300_PCH

PP3300_DSW

R301

100K_4

MODPHY_EN[10]

+V1.05DX_MODPHY +V1.05S_AUSB3PLL +V1.05DX_MODPHY +V1.05S_ASATA3PLL

A A

L11 2.2uH/210mA_8

22u/6.3V_8

C237

R296 *100K_4

5

R295 *100K_4

1 2

R297 *Short_4

C243 *47u/6.3V_8

0.1u/10V_4

12

C228 1u/6.3V_4

C250 1u/6.3V_4

U21 SLG59M1470V

1

VDD

2

D_01 D_02_033S_02_03

GND S_01

ON

9

12

C226 *0.047u/25V_4

L8 2.2uH/210mA_8

4

+V1.05S_AUSB3PLL

+V1.05S_ASATA3PLL

+V1.05S_APLLOPI

+1.05V_DCPSUS3

C84 22u/6.3V_8

+VCCPDSW +V3.3S_VCCPCORE

+V1.05S_AXCK_DCB

+V1.05S_AXCK_LCPLL

C48 1u/6.3V_4

8 7 5

C240

22u/6.3V_8

4

1.838A

U24M

K9

VCCHSIO

L10

VCCHSIO

M9

VCCHSIO

N8

VCC1_05

P9

VCC1_05

B18

VCCUSB3PLL

B11

VCCSATA3PLL

Y20

RSVD

AA21

VCCAPLL

W21

VCCAPLL

J13

DCPSUS3

AH14

VCCHDA

AH13

DCPSUS2

AC9

VCCSUS3_3

AA9

VCCSUS3_3

AH10

VCCDSW3_3

V8

VCC3_3

W9

VCC3_3

J18

VCCCLK

K19

VCCCLK

A20

VCCACLKPLL

J17

VCCCLK

R21

VCCCLK

T21

VCCCLK

K18

RSVD

M20

RSVD

V21

RSVD

AE20

VCCSUS3_3

AE21

VCCSUS3_3

R303 *SHORT_8 R304 *SHORT_8

12

C229

0.1u/10V_4

42mA41mA

C234 *47u/6.3V_8

3

Haswell ULT PCH (Power)

HSW_ULT_DDR3L

+V1.05DX_MODPHYPP1050_PCH_SUS

GPIO/LPC

LPT LP POWER

C258 1u/6.3V_4

HSIO

OPI

USB3

HDA

VRM

VCCAPLL power

PCH HDA Power

+3V_ADO

RTC

SPI

CORE

THERMAL SENSOR

SERIAL IO

SUS OSCILLATOR

USB2

13 OF 19

PP1050_PCH +V1.05S_AXCK_DCB

VCCSUS3_3

DCPSUSBYP DCPSUSBYP

L9 2.2uH/210mA_8

R17 *SHORT_8

*47u/6.3V_8

VCCRTC DCPRTC

VCCSPI

VCCASW VCCASW

VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05

VCCASW VCCASW

VCCASW DCPSUS1 DCPSUS1

VCCTS1_5

VCC3_3 VCC3_3

VCCSDIO

DCPSUS4

RSVD VCC1_05 VCC1_05

C241

47u/6.3V_8

C9

AH11 AG10 AE7

Y8

AG14 AG13

J11 H11 H15 AE8 AF22 AG19 AG20 AE9 AF9 AG8 AD10 AD8

J15 K14 K16

U8 T9

AB8

AC20 AG16 AG17

11mA

PP3300_PCH

R128 *0_6

+V3.3DX_1.5DX_1.8DX_AUDIO

R125 *SHORT_6

3

C88 1u/6.3V_4

Place close to ball

+V3.3A_DSW_PRTCSUS

+VCCRTCEXT

+V3.3M_PSPI

PCH_VCC_1_1_20 PCH_VCC_1_1_21

+V1.05S_CORE_PCH

+PCH_VCCDSW

+1.05V_DCPSUS1

0.109A

+V3.3S_VCCSDIO +1.05V_DCPSUS4

0.2A

C235 47u/6.3V_8

+V1.05S_APLLOPIPP1050_PCH

57mA

C15

*47u/6.3V_8

C60 1u/6.3V_4

2

18mA

R52 *SHORT_6 R53 *SHORT_6

C73

1u/6.3V_4

+V1.05M_VCCASW

C51 *1u/6.3V_4

3mA 1mA

C40 *1u/6.3V_4

+V1.05S_VCCUSBCORE

C30 1u/6.3V_4

2

R67 *SHORT_6

C74 1u/6.3V_4

C75

0.1u/10V_4

C47

0.1u/10V_4

PP1050_PCH PP1050_PCH

C78

C52

1u/6.3V_4

+V1.05M_VCCASW

0.658A

C50

C61

22u/6.3V_8

1u/6.3V_4

+V1.5S_VCCATS

+V3.3S_VCCPTS

17mA

R84 *SHORT_8

C79 1u/6.3V_4

PP1050_PCH +V1.05S_AXCK_LCPLL

L10 2.2uH/210mA_8

PP3300_PCH_SUS

PP3300_RTC

C57

C58

0.1u/10V_4

1u/6.3V_4

R42 *0_6 R40 0_6

C33

0.1u/10V_4

R34 *SHORT_8

C36 10u/6.3V_6

R68 *SHORT_8

R9 *SHORT_6

R18 *SHORT_6

C31

0.1u/10V_4

R19 *SHORT_6

C39 1u/6.3V_4

PP1050_PCH

PP1500_PCH_TS PP3300_PCH

PP3300_PCH

PP1050_PCH

31mA

C236

47u/6.3V_8

Size Document Number Rev

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

C242 47u/6.3V_8

Quanta Computer Inc.

PROJECT :

PCH 5/6 (POWER)

1

PP3300_DSW PP3300_PCH

PP1050_PCH

+VCCPDSW

+PCH_VCCDSW

C251 1u/6.3V_4

1

C63

0.47u/25V_6

place near CPU

ZHNB

11 39

11

A

5

Vinafix.com

4

3

2

1

Haswell ULT (GND)

HSW_ULT_DDR3L

D D

C C

B B

A11 A14 A18 A24 A28 A32 A36 A40 A44 A48 A52 A56

AA1 AA58 AB10 AB20 AB22

AB7 AC61 AD21

AD3 AD63 AE10

AE5 AE58 AF11 AF12 AF14 AF15 AF17 AF18

AG1 AG11 AG21 AG23 AG60 AG61 AG62 AG63 AH17 AH19 AH20 AH22 AH24 AH28 AH30 AH32 AH34 AH36 AH38 AH40 AH42 AH44 AH49 AH51 AH53 AH55 AH57

AJ13 AJ14 AJ23 AJ25 AJ27 AJ29

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

U24N

14 OF 19

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AJ35 AJ39 AJ41 AJ43 AJ45 AJ47 AJ50 AJ52 AJ54 AJ56 AJ58 AJ60 AJ63 AK23 AK3 AK52 AL10 AL13 AL17 AL20 AL22 AL23 AL26 AL29 AL31 AL33 AL36 AL39 AL40 AL45 AL46 AL51 AL52 AL54 AL57 AL60 AL61 AM1 AM17 AM23 AM31 AM52 AN17 AN23 AN31 AN32 AN35 AN36 AN39 AN40 AN42 AN43 AN45 AN46 AN48 AN49 AN51 AN52 AN60 AN63 AN7 AP10 AP17 AP20

AP22 AP23 AP26 AP29

AP3 AP31 AP38 AP39 AP48 AP52 AP54 AP57 AR11 AR15 AR17 AR23 AR31 AR33 AR39 AR43 AR49

AR5 AR52 AT13 AT35 AT37 AT40 AT42 AT43 AT46 AT49 AT61 AT62 AT63

AU1 AU16 AU18 AU20 AU22 AU24 AU26 AU28 AU30 AU33 AU51 AU53 AU55 AU57 AU59 AV14

AV16 AV20 AV24 AV28

AV33 AV34 AV36 AV39 AV41 AV43 AV46 AV49 AV51 AV55

U24O

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

HSW_ULT_DDR3L

15 OF 19

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AV59 AV8 AW16 AW24 AW33 AW35 AW37 AW4 AW40 AW42 AW44 AW47 AW50 AW51 AW59 AW60 AY11 AY16 AY18 AY22 AY24 AY26 AY30 AY33 AY4 AY51 AY53 AY57 AY59 AY6 B20 B24 B26 B28 B32 B36 B4 B40 B44 B48 B52 B56 B60 C11 C14 C18 C20 C25 C27 C38 C39 C57 D12 D14 D18 D2 D21 D23 D25 D26 D27 D29 D30 D31

D33 D34 D35 D37 D38 D39 D41 D42 D43 D45 D46 D47 D49

D50 D51 D53 D54 D55 D57 D59 D62

E11 E17 F20 F26 F30 F34 F38 F42 F46 F50 F54 F58 F61 G18 G22

H13

HSW_ULT_DDR3L

U24P

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

D5

VSS VSS VSS VSS VSS VSS VSS VSS VSS

D8

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

G3

VSS

G5

VSS

G6

VSS

G8

VSS VSS

16 OF 19

VSS_SENSE

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS

VSS

H17 H57 J10 J22 J59 J63 K1 K12 L13 L15 L17 L18 L20 L58 L61 L7 M22 N10 N3 P59 P63 R10 R22 R8 T1 T58 U20 U22 U61 U9 V10 V3 V7 W20 W22 Y10 Y59 Y63

V58 AH46 V23 E62 AH16

VSS_SENSE_R

U24R

AT2

RSVD

AU44

RSVD

AV44

RSVD

D15

RSVD

F22

RSVD

H22

RSVD

J21

RSVD

R374 *Short_4

R373 100/F_4

HSW_ULT_DDR3L

18 OF 19

VSS_SENSE [32]

RSVD RSVD RSVD RSVD

RSVD RSVD RSVD RSVD RSVD RSVD RSVD

12

N23 R23 T23 U10

AL1 AM11 AP7 AU10 AU15 AW14 AY14

U24Q

DC_TEST_AY2_AW2 DC_TEST_AY3_AW3 TP_DC_TEST_AY60

TP106

DC_TEST_AY61_AW 61 DC_TEST_AY62_AW 62 TP_DC_TEST_B2

A A

5

TP65

DC_TEST_A3_B3 DC_TEST_A61_B61 DC_TEST_B62_B63

DC_TEST_C1_C2

AY2

DAISY_CHAIN_NCTF_AY2

AY3

DAISY_CHAIN_NCTF_AY3

AY60

DAISY_CHAIN_NCTF_AY60

AY61

DAISY_CHAIN_NCTF_AY61

AY62

DAISY_CHAIN_NCTF_AY62

B2

DAISY_CHAIN_NCTF_B2

B3

DAISY_CHAIN_NCTF_B3

B61

DAISY_CHAIN_NCTF_B61

B62

DAISY_CHAIN_NCTF_B62

B63

DAISY_CHAIN_NCTF_B63

C1

DAISY_CHAIN_NCTF_C1

C2

DAISY_CHAIN_NCTF_C2

4

HSW_ULT_DDR3L

17 OF 19

DAISY_CHAIN_NCTF_A3 DAISY_CHAIN_NCTF_A4

DAISY_CHAIN_NCTF_A60 DAISY_CHAIN_NCTF_A61 DAISY_CHAIN_NCTF_A62

DAISY_CHAIN_NCTF_AV1 DAISY_CHAIN_NCTF_AW1 DAISY_CHAIN_NCTF_AW2 DAISY_CHAIN_NCTF_AW3

DAISY_CHAIN_NCTF_AW61 DAISY_CHAIN_NCTF_AW62 DAISY_CHAIN_NCTF_AW63

3

A3

DC_TEST_A3_B3

A4

TP_DC_TEST_A4

A60

TP_DC_TEST_A60

A61

DC_TEST_A61_B61

A62

TP_DC_TEST_A62

AV1

TP_DC_TEST_AV1

AW1

TP_DC_TEST_AW 1

AW2

DC_TEST_AY2_AW2

AW3

DC_TEST_AY3_AW3

AW61

DC_TEST_AY61_AW 61

AW62

DC_TEST_AY62_AW 62

AW63

TP_DC_TEST_AW 63

TP67 TP68 TP70

TP104 TP105

TP107

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

2

Thursday, December 04, 2014

PROJECT :

PCH 6/6 (GND)

1

ZHNB

12 39

A

5

Vinafix.com

PP3300_PCH_SUS

D D

C C

H_SYS_PWROK_XDP

VCCST_PWRGD[5,13]

PWR_DEBUG[5]

SYS_PWROK[5,7,26]

R591 *1K_4

R590 *1K_4

R597 *0_4

4

XDP_PREQ#[4]

XDP_PRDY#[4]

CFG0[6] CFG1[6]

CFG2[6] CFG3[6]

XDP_BPM#0[4] XDP_BPM#1[4]

CFG4[6,8] CFG5[6]

CFG6[6] CFG7[6]

VCCST_PWRGD_XDP PWR_BTN_L PP1050_PCH_SUS PP1050_PCH_SUS

H_SYS_PWROK_XDP

SMB_PCH_DAT[8]

SMB_PCH_CLK[8]

XDP_TCK1[8] XDP_TCK0[4,8]

XDP_PREQ_N XDP_PRDY_N

CFG0 CFG1

CFG2 CFG3

CFG4 CFG5

CFG6 CFG7

31

*SEC_BSH-030-01-L-D-A-TR

3

CN15

31 323229 333328 343427 353526 363625 373724 383823 393922 404021 414120 424219 434318 444417 454516 464615 474714 484813 494912 505011 515110 52529 53538 54547 55556 56565 57574 58583 59592 60601

2

30

29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

NOA_STBP_0 NOA_STBN_0

CFG8 CFG9

CFG10 CFG11

NOA_STBP_1 NOA_STBN_1

CFG12 CFG13

CFG14 CFG15

CK_XDP_P_R CK_XDP_N_R

XDP_RST_R_N XDP_DBRESET_N

XDP_TDO XDP_TRST_N XDP_TDI XDP_TMS

NOA_STBP_0 [6] NOA_STBN_0 [6]

CFG8 [6] CFG9 [6]

CFG10 [6] CFG11 [6]

NOA_STBP_1 [6] NOA_STBN_1 [6]

CFG12 [6] CFG13 [6]

CFG14 [6] CFG15 [6]

R595 *0_4 R596 *0_4

R593 *1K_4 R594 *0_4

XDP_DBRESET_N

SYS_RESET#

R592 *1K_4

CLK_PCIE_XDPP [9] CLK_PCIE_XDPN [9]

PLTRST# [7,19,21,22,26]

1

13

PP3300_PCH

20141021 Intel require modify ITP CN15 P9/P51 add PP1050_PCH_SUS, P50 PP1050_PGOOD change to VCCST_PWRGD.

PP1050_PCH_SUS

Y

XDP_TDO[8]

XDP_TDI

XDP_TMS[8]

5

0.1u/10V_4

4

TP63

PP1050_PCH

C231

R72

12

B B

R309 *0_6

APS3

R302 *0_6

APS7APS1

XDP_TDI[8]

APS

CN2

A A

*APS conn_ACS_88511-180N

1

APS1

1

2

3

APS3

3

4

5

6

7

APS7

7

8

9

10

11

12

13

14

15

16

17

18

5

R308 *0_6 R322 *0_4 R310 *0_6 R321 *0_4 R320 *0_4 R319 *0_4 R311 *0_6

R318 *0_4 R317 *0_4 R316 *0_4 R315 *0_4

PP3300_PCH_SUS

PWR_BTN_L SYS_RESET#

PCH_SLP_S3_L [7,26,30,31,33,35] PCH_SLP_S5_L [7,26,30,35]

PCH_SLP_S4_L [7] PCH_SLP_A_L [7]

PCH_RTCRST [8,26] PWR_BTN_L [17,25,26] SYS_RESET# [7,17] PCH_SLP_S0_L [7,26]

4

PP3300_DSW

VCCST_PWRGD[5,13]

U19

NC1VCC

2

A

3

GND

*74AUP1G07GW

3

R63 *51_4

XDP_TDO

XDP_TDI_R

*Short_4

XDP_TMS

XDP_TRST_N

PP3300_PCH

R300 10K_4

PP3300_PCH

C230

0.1u/10V_4

U22

14

2 1 5 4

9 10 12 13

*74CBTLV3126

2

VCC 1A 1OE 2A 2OE 3A 3OE 4A 4OE

Size Document Number Rev

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

3

1B

6

2B

8

3B

11

4B

15

DPAD

7

GND

CPU/PCH XDP

XDP_TDO_CPU [4,8]

XDP_TDI_CPU [4,8]

XDP_TMS_CPU [4]

XDP_TRST# [4,8]

Quanta Computer Inc.

PROJECT :

ZHNB

1

13 39

A

1

Vinafix.com

<DDR>

+SMDDR_V REF_DIMM +SMDDR_V REF_DIMM +SMDDR_V REF_DQ0

M_A_A<0>[3] M_A_A<1>[3] M_A_A<2>[3] M_A_A<3>[3] M_A_A<4>[3] M_A_A<5>[3] M_A_A<6>[3] M_A_A<7>[3] M_A_A<8>[3]

A A

M_A_DIM0_CK _DDR0_DP[3] M_A_DIM0_CK _DDR0_DN[3]

B B

DDR3_DRAMR ST#[4,15]

P/NVendor

M_A_A<9>[3] M_A_A<10 >[3] M_A_A<11 >[3] M_A_A<12 >[3] M_A_A<13 >[3] M_A_A<14 >[3] M_A_A<15 >[3]

M_A_BS[2: 0][3]

M_A_DIM0_CK E0[3]

M_A_DIM0_CS 0_N[3]

M_A_RAS_ N[3] M_A_CAS_ N[3] M_A_W E_N[3]

M_A_DQS_DP <2>[3] M_A_DQS_DP <3>[3]

M_A_DQS_DN <2>[3] M_A_DQS_DN <3>[3]

M_A_BS0 M_A_BS1 M_A_BS2

M_A_DIM0_CK _DDR0_DP M_A_DIM0_CK _DDR0_DN M_A_DIM0_CK E0

M_A_ODT0 M_A_DIM0_CS 0_N M_A_RAS_ N M_A_CAS_ N M_A_W E_N

DDR3_DRAMR ST# DDR3_DRAMR ST#

R183 240/F_4

1 2

M_A_A<0> M_A_A<1> M_A_A<2> M_A_A<3> M_A_A<4> M_A_A<5> M_A_A<6> M_A_A<7> M_A_A<8> M_A_A<9> M_A_A<10 > M_A_A<11 > M_A_A<12 > M_A_A<13 > M_A_A<14 > M_A_A<15 >

2

BYTE2_16-23

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1

VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1

VSSQ#D8

VSSQ#E2 VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

BYTE3_24-31

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

M_A_DQ<16 > [3] M_A_DQ<18 > [3] M_A_DQ<21 > [3] M_A_DQ<19 > [3] M_A_DQ<17 > [3] M_A_DQ<23 > [3] M_A_DQ<20 > [3] M_A_DQ<22 > [3]

M_A_DQ<27 > [3] M_A_DQ<24 > [3] M_A_DQ<26 > [3] M_A_DQ<28 > [3] M_A_DQ<30 > [3] M_A_DQ<29 > [3] M_A_DQ<31 > [3] M_A_DQ<25 > [3]

PP1350 PP135 0 PP1350 PP1350

M_A_DQS_DP <7>[3] M_A_DQS_DP <5>[3]

M_A_DQS_DN <7>[3] M_A_DQS_DN <5>[3] M_A_DQS_DN <6>[3]

U9

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

100-BALL SDRAM DDR 3

RAM _DDR3L

Micron/MT41K256M16HA-125:E/AKD5JGSTL02 for proto board

3

M_A_DIM0_CK _DDR0_DP M_A_DIM0_CK _DDR0_DN

+SMDDR_V REF_DQ0

M_A_A<0> M_A_A<1> M_A_A<2> M_A_A<3> M_A_A<4> M_A_A<5> M_A_A<6> M_A_A<7> M_A_A<8> M_A_A<9> M_A_A<10 > M_A_A<11 > M_A_A<12 > M_A_A<13 > M_A_A<14 > M_A_A<15 >

M_A_BS0 M_A_BS1 M_A_BS2

M_A_DIM0_CK E0

M_A_ODT0

M_A_DIM0_CS 0_N

M_A_RAS_ N M_A_CAS_ N M_A_W E_N

M_A_ZQ2M_A_ZQ1

R188 240/F_4

1 2

M8 H1

N3 P7 P3 N2 P8 P2 R8 R2

T8

R3

L7 R7 N7

T3

T7 M7

M2 N8 M3

J7

K7

K9

K1

L2

J3

K3

L3

F3 C7

E7 D3

G3

B7

T2

L8

J1

L1

J9

L9

U30

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

BA0 BA1 BA2

CK CK CKE

ODT CS RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET ZQ

NC#J1 NC#L1 NC#J9 NC#L9

100-BALL SDRAM DDR 3

RAM _DDR3L

4

BYTE7_56-63 BYTE5_40-47 BYTE6_48-55

E3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1 VSSQ#B9

VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

M_A_DQ<60 > [3]

F7

M_A_DQ<58 > [3]

F2

M_A_DQ<56 > [3]

F8

M_A_DQ<62 > [3]

H3

M_A_DQ<61 > [3]

H8

M_A_DQ<63 > [3]

G2

M_A_DQ<57 > [3]

H7

M_A_DQ<59 > [3]

D7

M_A_DQ<45 > [3]

C3

M_A_DQ<42 > [3]

C8

M_A_DQ<40 > [3]

C2

M_A_DQ<46 > [3]

A7

M_A_DQ<41 > [3]

A2

M_A_DQ<47 > [3]

B8

M_A_DQ<44 > [3]

A3

M_A_DQ<43 > [3]

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

M_A_DQS_DP <0>[3] M_A_DQS_DP <1>[3]

M_A_DQS_DN <0>[3] M_A_DQS_DN <1>[3]

5

+SMDDR_V REF_DIMM +SMDDR_V REF_DQ0

M_A_A<0> M_A_A<1> M_A_A<2> M_A_A<3> M_A_A<4> M_A_A<5> M_A_A<6> M_A_A<7> M_A_A<8> M_A_A<9> M_A_A<10 > M_A_A<11 > M_A_A<12 > M_A_A<13 > M_A_A<14 > M_A_A<15 >

M_A_BS0 M_A_BS1 M_A_BS2

M_A_DIM0_CK _DDR0_DP M_A_DIM0_CK _DDR0_DN

M_A_DIM0_CK E0

M_A_ODT0 M_A_DIM0_CS 0_N

M_A_RAS_ N M_A_CAS_ N M_A_W E_N

DDR3_DRAMR ST#

M_A_ZQ3

R495 240/F_4

1 2

M8

H1 N3

P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7

M7

M2

N8

M3

J7 K7 K9

K1 L2 J3 K3 L3

F3 C7

E7 D3

G3

B7

T2 L8

J1 L1 J9 L9

U31

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

BA0 BA1 BA2

CK CK CKE

ODT CS RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET ZQ

NC#J1 NC#L1 NC#J9 NC#L9

100-BALL SDRAM DDR 3

RAM _DDR3L

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

6

BYTE0_0-7 BYTE1_8-15

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

M_A_DQ<2> [3]

M_A_DQ<3> [3] M_A_DQ<6> [3] M_A_DQ<1> [3] M_A_DQ<7> [3] M_A_DQ<4> [3] M_A_DQ<5> [3] M_A_DQ<0> [3]

M_A_DQ<13 > [3] M_A_DQ<10 > [3]

M_A_DQ<8> [3]

M_A_DQ<14 > [3]

M_A_DQ<9> [3]

M_A_DQ<15 > [3] M_A_DQ<12 > [3] M_A_DQ<11 > [3]

M_A_DQS_DP <4>[3] M_A_DQS_DP <6>[3]

M_A_DQS_DN <4>[3]

+SMDDR_V REF_DIMM +SMDDR_V REF_DQ0

M_A_A<0> M_A_A<1> M_A_A<2> M_A_A<3> M_A_A<4> M_A_A<5> M_A_A<6> M_A_A<7> M_A_A<8> M_A_A<9> M_A_A<10 > M_A_A<11 > M_A_A<12 > M_A_A<13 > M_A_A<14 > M_A_A<15 >

M_A_BS0 M_A_BS1 M_A_BS2

M_A_DIM0_CK _DDR0_DP M_A_DIM0_CK _DDR0_DN

M_A_DIM0_CK E0

M_A_ODT0 M_A_DIM0_CS 0_N

M_A_RAS_ N M_A_CAS_ N M_A_W E_N

DDR3_DRAMR ST#

M_A_ZQ4

R178 240/F_4

1 2

M8

H1 N3

P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7

M7

M2

N8

M3

J7 K7 K9

K1 L2 J3 K3 L3

F3 C7

E7 D3

G3 B7

T2 L8

J1 L1 J9 L9

7

U10

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

BA0 BA1 BA2

CK CK CKE

ODT CS RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET ZQ

NC#J1 NC#L1 NC#J9 NC#L9

RAM _DDR3L

100-BALL SDRAM DDR 3

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9

VSSQ#B1

VSSQ#B9 VSSQ#D1 VSSQ#D8

VSSQ#E2

VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

BYTE4_32-39

M_A_DQ<32 > [3] M_A_DQ<38 > [3] M_A_DQ<35 > [3] M_A_DQ<36 > [3] M_A_DQ<33 > [3] M_A_DQ<37 > [3] M_A_DQ<34 > [3] M_A_DQ<39 > [3]

M_A_DQ<48 > [3] M_A_DQ<53 > [3] M_A_DQ<49 > [3] M_A_DQ<52 > [3] M_A_DQ<55 > [3] M_A_DQ<51 > [3] M_A_DQ<54 > [3] M_A_DQ<50 > [3]

8

14

Hynix

AKD5JGST400

Elpida

C C

DDR3L 1333Mhz 4 Gb

DDR3L 1600Mhz 4 GbAKD5JGST404

PP1350

Distributed around all DRAM devices (CHA and CHB)

C104 10u/6.3V_6

C167 10u/6.3V_6

C168 10u/6.3V_6

C99 10u/6.3V_6

Place these Caps near each X16 Memory Down

C114

C153 1u/6.3V_4

C100

C334

1u/6.3V_4 C293

1u/6.3V_4

M_A_RAS_ N M_A_CAS_ N M_A_W E_N M_A_BS0 M_A_BS1 M_A_BS2 M_A_DIM0_CK E0 M_A_DIM0_CS 0_N M_A_A<0> M_A_A<1>

C341

C340 10u/6.3V_6

1u/6.3V_4

C295

10u/6.3V_6 R540 34.8/F_4

10u/6.3V_6

C322 1u/6.3V_4

C292 1u/6.3V_4

C329 1u/6.3V_4

C305 1u/6.3V_4

M_A_A<2> M_A_A<3> M_A_A<4> M_A_A<5> M_A_A<6> M_A_A<7> M_A_A<8> M_A_A<9> M_A_A<10 > M_A_A<11 > M_A_A<12 > M_A_A<13 > M_A_A<14 > M_A_A<15 >

R226 34.8/F_4 R225 34.8/F_4 R524 34.8/F_4 R224 34.8/F_4 R223 34.8/F_4 R232 34.8/F_4 R545 34.8/F_4 R523 34.8/F_4 R221 34.8/F_4 R528 34.8/F_4 R234 34.8/F_4

R543 34.8/F_4 R526 34.8/F_4 R527 34.8/F_4 R542 34.8/F_4 R541 34.8/F_4 R235 34.8/F_4 R222 34.8/F_4 R231 34.8/F_4 R544 34.8/F_4 R525 34.8/F_4 R230 34.8/F_4 R233 34.8/F_4

M_A_ODT0

M_A_DIM0_CK _DDR0_DP M_A_DIM0_CK _DDR0_DN

R189 30/F_4

R236 26.1/F_4 R539 26.1/F_4

PP1350+DDR_VTT_RUN

+DDR_VTT_RUN

C150

C116

C157

C107 1u/6.3V_4

+DDR_VTT_RUN

C358 1u/6.3V_4

D D

1

1u/6.3V_4

C357 1u/6.3V_4

1u/6.3V_4

C356 1u/6.3V_4

C124 1u/6.3V_4

C359 1u/6.3V_4

C166

C122

1u/6.3V_4

+SMDDR_V REF_DIMM

C354 10u/6.3V_6

2

+SMDDR_V REF_DQ0

C118

C101 1u/6.3V_4

12

C135

0.047u/25V_ 4

1u/6.3V_4

12

C146

0.047u/25V_ 4

1u/6.3V_4

12

C321

0.047u/25V_ 4

12

C147

0.047u/25V_ 4

12

C326

0.047u/25V_ 4

Place these Caps near Memory Down CA & DQ pin

12

C314

0.047u/25V_ 4

12

C319

0.047u/25V_ 4

3

12

C120

0.047u/25V_ 4

12

C123

0.047u/25V_ 4

12

C129

0.047u/25V_ 4

C142

0.047u/25V_ 4

M1 solution

PP1350

S_CLIP2

*SUL-12A2M

+SMDDR_V REF_DIMM

1

6

Vref_CA

S_CLIP4

*SUL-12A2M

1

C144 470p/50V_4

+VREFDQ_SA _M3

R456 *SHORT_6

M3 solution

7

Size Documen t Number Rev

Date: Sheet of

R184

1.8K/F_4

+VREF_CA_ CPU

4

R149 *SHORT_6

M3 solution

5

R153 2/F_6

C96

0.022u/16V_ 4

1 2

R154

24.9/F_4

S_CLIP1

*SUL-12A2M

1

S_CLIP3

*SUL-12A2M

R187

1.8K/F_4

1

M1 solution

R468 5.1/F_ 6

C284

0.022u/16V_ 4

1 2

R455

24.9/F_4

DDR3L MEMORY DOWNx16 A

Thursday, Decem ber 04, 20 14

PP1350

Vref_DQ

R481

1.8K/F_4

+SMDDR_V REF_DQ0

8

ZHNB

C300 470p/50V_4

14 39

R486

1.8K/F_4

Quanta Computer Inc.

PROJECT :

A

5

Vinafix.com

<DDR>

U29

M_B_A<0> M_B_A<1> M_B_A<2> M_B_A<3> M_B_A<4> M_B_A<5> M_B_A<6> M_B_A<7> M_B_A<8> M_B_A<9> M_B_A<10 > M_B_A<11 > M_B_A<12 > M_B_A<13 > M_B_A<14 > M_B_A<15 >

M_B_BS0 M_B_BS1 M_B_BS2

M_B_ODT0

M_B_ZQ1

R496 2CH@240/F_4

M8 H1

N3

P7 P3

N2

P8

P2 R8 R2

T8 R3

L7 R7 N7

T3

T7 M7

M2 N8 M3

J7

K7

K9

K1

L2

J3

K3

L3

F3 C7

E7 D3

G3

B7

T2

L8

J1

L1

J9

L9

C70

2CH@10u/6.3V _6

C67

2CH@2.2U/6.3 V_4

C111

2CH@1u/6.3V _4

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

BA0 BA1 BA2

CK CK CKE

ODT CS RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET ZQ

NC#J1 NC#L1 NC#J9 NC#L9

100-BALL SDRAM DDR 3

2CH@RAM _D DR3L

C339

2CH@10u/6.3V _6

C66

2CH@2.2U/6.3 V_4

C162

2CH@1u/6.3V _4

+SMDDR_V REF_DIMM +SMDDR_V REF_DQ1

M_B_A<0>[3] M_B_A<1>[3] M_B_A<2>[3] M_B_A<3>[3] M_B_A<4>[3] M_B_A<5>[3] M_B_A<6>[3] M_B_A<7>[3] M_B_A<8>[3]

D D

M_B_DIM0_CK _DDR0_DP[3] M_B_DIM0_CK _DDR0_DN[3] M_B_DIM0_CK E0[3]

C C

DDR3_DRAMR ST#[4,14]

M_B_A<9>[3] M_B_A<10 >[3] M_B_A<11 >[3] M_B_A<12 >[3] M_B_A<13 >[3] M_B_A<14 >[3] M_B_A<15 >[3]

M_B_BS[2: 0][3]

M_B_DIM0_CK _DDR0_DP M_B_DIM0_CK _DDR0_DN M_B_DIM0_CK E0

M_B_DIM0_CS 0_N[3] M_B_RAS_ N[3] M_B_CAS_ N[3] M_B_W E_N[3 ]

M_B_DQS_DP <2>[3] M_B_DQS_DP <1>[3]

M_B_DQS_DN <2>[3] M_B_DQS_DN <1>[3]

M_B_DIM0_CS 0_N M_B_RAS_ N M_B_CAS_ N M_B_W E_N

DDR3_DRAMR ST#

1 2

P/NVendor

Hynix

AKD5JGETW04 DDR3L 1600Mhz 4Gb

Elpida AKD5JGST407

Micron

B B

DDR3L 1600Mhz 4 Gb

DDR3L 1600Mhz 4 GbAKD5JGSTL10

PP1350

C164

2CH@10u/6.3V _6

Place these Caps near each X16 Memory Down

C125

2CH@1u/6.3V _4

C330

2CH@1u/6.3V _4

C338

C169

2CH@10u/6.3V _6

C71

C109 2CH@1u/6.3V _4 R244 2CH@34.8/F_4

2CH@2.2U/6.3 V_4

C163

C121

2CH@1u/6.3V _4

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

B2

VDD#B2

D9

VDD#D9

G7

VDD#G7

K2

VDD#K2

K8

VDD#K8

N1

VDD#N1

N9

VDD#N9

R1

VDD#R1

R9

VDD#R9

A1

VDDQ#A1

A8

VDDQ#A8

C1

VDDQ#C1

C9

VDDQ#C9

D2

VDDQ#D2

E9

VDDQ#E9

F1

VDDQ#F1

H2

VDDQ#H2

H9

VDDQ#H9

A9

VSS#A9

B3

VSS#B3

E1

VSS#E1

G8

VSS#G8

J2

VSS#J2

J8

VSS#J8

M1

VSS#M1

M9

VSS#M9

P1

VSS#P1

P9

VSS#P9

T1

VSS#T1

T9

VSS#T9

B1

VSSQ#B1

B9

VSSQ#B9

D1

VSSQ#D1

D8

VSSQ#D8

E2

VSSQ#E2

E8

VSSQ#E8

F9

VSSQ#F9

G1

VSSQ#G1

G9

VSSQ#G9

Micron/MT41K256M16HA-125:E/AKD5JGSTL02 for proto board

C294 2CH@10u/6.3V _6

C65

C110

2CH@1u/6.3V _4

2CH@2.2U/6.3 V_4

C155

C102

2CH@1u/6.3V _4

4

U28

M_B_A<0> M_B_A<1> M_B_A<2> M_B_A<3> M_B_A<4> M_B_A<5> M_B_A<6> M_B_A<7> M_B_A<8> M_B_A<9> M_B_A<10 > M_B_A<11 > M_B_A<12 > M_B_A<13 > M_B_A<14 > M_B_A<15 >

M_B_BS0 M_B_BS1 M_B_BS2

M_B_ODT0

M_B_ZQ2

R503 2CH@240/F_4

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

2CH@RAM _D DR3L

100-BALL SDRAM DDR 3

M_B_DQ<23 > [3] M_B_DQ<20 > [3] M_B_DQ<18 > [3] M_B_DQ<17 > [3] M_B_DQ<22 > [3] M_B_DQ<16 > [3] M_B_DQ<19 > [3] M_B_DQ<21 > [3]

M_B_DQ<13 > [3] M_B_DQ<10 > [3]

M_B_DQ<8> [ 3]

M_B_DQ<14 > [3]

M_B_DQ<9> [ 3] M_B_DQ<15 > [3] M_B_DQ<12 > [3] M_B_DQ<11 > [3]

PP1350 PP1350 PP13 50 PP1350

+SMDDR_V REF_DIMM +SMDDR_V REF_DQ1

M_B_DIM0_CK _DDR0_DP M_B_DIM0_CK _DDR0_DN M_B_DIM0_CK E0

M_B_DIM0_CS 0_N M_B_RAS_ N M_B_CAS_ N M_B_W E_N

M_B_DQS_DP <6>[3] M_B_DQS_DP <5>[3]

M_B_DQS_DN <6>[3] M_B_DQS_DN <5>[3]

DDR3_DRAMR ST# DDR3_DRAMR ST#

1 2

C103

C145

2CH@1u/6.3V _4

C308

C309

2CH@1u/6.3V _4

BYTE6_48-55 BYTE7_56-63BYTE2_16-23 BYTE3_24-31

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

B2

VDD#B2

D9

VDD#D9

G7

VDD#G7

K2

VDD#K2

K8

VDD#K8

N1

VDD#N1

N9

VDD#N9

R1

VDD#R1

R9

VDD#R9

A1

VDDQ#A1

A8

VDDQ#A8

C1

VDDQ#C1

C9

VDDQ#C9

D2

VDDQ#D2

E9

VDDQ#E9

F1

VDDQ#F1

H2

VDDQ#H2

H9

VDDQ#H9

A9

VSS#A9

B3

VSS#B3

E1

VSS#E1

G8

VSS#G8

J2

VSS#J2

J8

VSS#J8

M1

VSS#M1

M9

VSS#M9

P1

VSS#P1

P9

VSS#P9

T1

VSS#T1

T9

VSS#T9

B1

VSSQ#B1

B9

VSSQ#B9

D1

VSSQ#D1

D8

VSSQ#D8

E2

VSSQ#E2

E8

VSSQ#E8

F9

VSSQ#F9

G1

VSSQ#G1

G9

VSSQ#G9

3

M_B_DQ<53 > [3] M_B_DQ<49 > [3] M_B_DQ<50 > [3] M_B_DQ<55 > [3] M_B_DQ<48 > [3] M_B_DQ<51 > [3] M_B_DQ<54 > [3] M_B_DQ<52 > [3]

M_B_DQ<45 > [3] M_B_DQ<42 > [3] M_B_DQ<40 > [3] M_B_DQ<46 > [3] M_B_DQ<41 > [3] M_B_DQ<47 > [3] M_B_DQ<44 > [3] M_B_DQ<43 > [3]

M_B_DQS_DP <0>[3] M_B_DQS_DP <3>[3]

M_B_DQS_DN <0>[3] M_B_DQS_DN <3>[3]

2

BYTE0_0-7BYTE1_8-15

U11

+SMDDR_V REF_DIMM +SMDDR_V REF_DQ1

M_B_DIM0_CK _DDR0_DP M_B_DIM0_CK _DDR0_DN M_B_DIM0_CK E0

M_B_DIM0_CS 0_N M_B_RAS_ N M_B_CAS_ N M_B_W E_N

DDR3_DRAMR ST#

1 2

M8

VREFCA

H1

VREFDQ

N3

M_B_A<0>

A0

P7

M_B_A<1>

A1

P3

M_B_A<2>

A2

N2

M_B_A<3>

A3

P8

M_B_A<4>

A4

P2

M_B_A<5>

A5

R8

M_B_A<6>

A6

R2

M_B_A<7>

A7

T8

M_B_A<8>

A8

R3

M_B_A<9>

A9

L7

M_B_A<10 >

A10/AP

R7

M_B_A<11 >

A11

N7

M_B_A<12 >

A12/BC

T3

M_B_A<13 >

A13

T7

M_B_A<14 >

A14

M7

M_B_A<15 >

A15

M2

M_B_BS0 M_B_BS1 M_B_BS2

M_B_ODT0 M_B_ ODT0

M_B_ZQ3

R208 2CH@240/F_4

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

2CH@RAM _D DR3L

100-BALL SDRAM DDR 3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

M_B_DQ<1> [3] M_B_DQ<3> [3] M_B_DQ<2> [3] M_B_DQ<7> [3] M_B_DQ<4> [3] M_B_DQ<5> [3] M_B_DQ<6> [3] M_B_DQ<0> [3]

M_B_DQ<30 > [3] M_B_DQ<24 > [3] M_B_DQ<26 > [3] M_B_DQ<29 > [3] M_B_DQ<31 > [3] M_B_DQ<28 > [3] M_B_DQ<27 > [3] M_B_DQ<25 > [3]

M_B_DQS_DP <4>[3] M_B_DQS_DP <7>[3]

M_B_DQS_DN <4>[3] M_B_DQS_DN <7>[3]

+SMDDR_V REF_DIMM +SMDDR_V REF_DQ1

M_B_BS0 M_B_BS1 M_B_BS2

M_B_DIM0_CK _DDR0_DP M_B_DIM0_CK _DDR0_DN M_B_DIM0_CK E0

M_B_DIM0_CS 0_N M_B_RAS_ N M_B_CAS_ N M_B_W E_N

M_B_ZQ4

R181 2CH@240/F_4

1 2

M_B_RAS_ N M_B_CAS_ N M_B_W E_N M_B_BS0 M_B_BS1 M_B_BS2 M_B_DIM0_CK E0 M_B_DIM0_CS 0_N

M_B_A<0> M_B_A<1> M_B_A<2> M_B_A<3> M_B_A<4> M_B_A<5> M_B_A<6> M_B_A<7> M_B_A<8> M_B_A<9> M_B_A<10 > M_B_A<11 > M_B_A<12 > M_B_A<13 > M_B_A<14 > M_B_A<15 >

M8

H1 N3

M_B_A<0>

P7

M_B_A<1>

P3

M_B_A<2>

N2

M_B_A<3>

P8

M_B_A<4>

P2

M_B_A<5>

R8

M_B_A<6>

R2

M_B_A<7>

T8

M_B_A<8>

R3

M_B_A<9>

L7

M_B_A<10 >

R7

M_B_A<11 >

N7

M_B_A<12 >

T3

M_B_A<13 >

T7

M_B_A<14 >

M7

M_B_A<15 >

M2

N8

M3

J7 K7 K9

K1 L2 J3 K3 L3

F3 C7

E7 D3

G3 B7

T2 L8

J1 L1 J9 L9

R246 2CH@34.8/F_4 R245 2CH@34.8/F_4 R531 2CH@34.8/F_4 R530 2CH@34.8/F_4 R533 2CH@34.8/F_4 R227 2CH@34.8/F_4 R522 2CH@34.8/F_4 R529 2CH@34.8/F_4 R534 2CH@34.8/F_4 R535 2CH@34.8/F_4 R537 2CH@34.8/F_4 R240 2CH@34.8/F_4 R238 2CH@34.8/F_4 R239 2CH@34.8/F_4 R237 2CH@34.8/F_4 R241 2CH@34.8/F_4 R536 2CH@34.8/F_4 R520 2CH@34.8/F_4

R521 2CH@34.8/F_4 R229 2CH@34.8/F_4 R243 2CH@34.8/F_4 R228 2CH@34.8/F_4 R538 2CH@34.8/F_4

U12

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

BA0 BA1 BA2

CK CK CKE

ODT CS RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET ZQ

NC#J1 NC#L1 NC#J9 NC#L9

100-BALL SDRAM DDR 3

2CH@RAM _D DR3L

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1 VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9

VSSQ#B1

VSSQ#B9 VSSQ#D1 VSSQ#D8

VSSQ#E2

VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

BYTE4_32-39BYTE5_40-47

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

M_B_DIM0_CK _DDR0_DP M_B_DIM0_CK _DDR0_DN

1

M_B_ODT0

M_B_DQ<36 > [3] M_B_DQ<35 > [3] M_B_DQ<32 > [3] M_B_DQ<39 > [3] M_B_DQ<37 > [3] M_B_DQ<34 > [3] M_B_DQ<33 > [3] M_B_DQ<38 > [3]

M_B_DQ<58 > [3] M_B_DQ<61 > [3] M_B_DQ<62 > [3] M_B_DQ<60 > [3] M_B_DQ<59 > [3] M_B_DQ<56 > [3] M_B_DQ<63 > [3] M_B_DQ<57 > [3]

R190 2CH@30/F_4

R242 2CH@26.1/F_4 R532 2CH@26.1/F_4

15

PP1350+DDR_VTT_RUN

+DDR_VTT_RUN

C315

C112

2CH@1u/6.3V _4

C306

2CH@1u/6.3V _4

C182

2CH@1u/6.3V _4

C304

2CH@1u/6.3V _4

C307

2CH@1u/6.3V _4

C185 2CH@1u/6.3V _4

2CH@1u/6.3V _4

C316

2CH@1u/6.3V _4

+DDR_VTT_RUN

C355

2CH@1u/6.3V _4

C183

2CH@1u/6.3V _4

5

C184

A A

2CH@1u/6.3V _4

C303

2CH@1u/6.3V _4

C333

2CH@1u/6.3V _4

C186

2CH@1u/6.3V _4

C320

2CH@1u/6.3V _4

C331

2CH@1u/6.3V _4

C180 2CH@10u/6.3V _6

C301

2CH@1u/6.3V _4

C296

2CH@1u/6.3V _4

+SMDDR_V REF_DIMM

12

C134 2CH@0.047u/2 5V_4

+SMDDR_V REF_DQ1

12

C130 2CH@0.047u/2 5V_4

C311

2CH@1u/6.3V _4

C337 2CH@1u/6.3V _4

12

C138 2CH@0.047u/2 5V_4

C317

2CH@1u/6.3V _4

C328

2CH@1u/6.3V _4

12

C324 2CH@0.047u/2 5V_4

12

C136 2CH@0.047u/2 5V_4

Place these Caps near Memory Down CA & DQ pin

12

C318 2CH@0.047u/2 5V_4

4

12

C313 2CH@0.047u/2 5V_4

12

C119 2CH@0.047u/2 5V_4

12

C115 2CH@0.047u/2 5V_4

M1 solution

PP1350

Vref_DQ

R163 2CH@1.8K/F_4

R165 2CH@1.8K/F_4

+SMDDR_V REF_DQ1

ZHNB

15 39Thursday, Dece mber 04, 2 014

C108 2CH@470p/50 V_4

+VREFDQ_SB _M3

R466 2CH@0_6

M3 solution

3

2

R471 2CH@ 5.1/F_6

C290 2CH@0.022u/1 6V_4

1 2

R480 2CH@24.9/F_4

Quanta Computer Inc.

PROJECT :

Size Documen t Number Rev

DDR3L MEMORY DOWNx16 B

Date: Sheet of

PROJECT :

1

A

1

Vinafix.com

LVDS Power(LDS)

A A

EC_EDP_VDD_EN[26]

PCH_EDP_VDD_EN[2,26]

Touch Panel INT/RST(TPS)

20140821 Q13 FET change to PJT138K 20141125 Change TPS to un-stuff,

B B

because no touch panel.

PP3300_DX

C85

1u/6.3V_4

R94 *Short_4 R77 *0_4

TOUCH_INT_L[10]

TOUCH_INT_L_DX[2]

TOUCH_RST_L[26]

TP_SHDN_L[26]

CCD power(CCD)

C C

PP3300_DX

C7

1U/6.3V_4

PP3300_DSW

D D

C8

1U/6.3V_4

1

C11 *10p/50V_4

TOUCHPANEL_PWR_R

A2 B2

C10 1000p/50V_4

U2

IN EN

TPS22930

2

U5

6

IN

4

IN

3

ON/OFF

R87

G5243AT11U

100K_4

D22 *TPL@RB500V-40

R13 *Short_4

R23 *SHORT_6

A1

OUT

B1

GND

2

1

OUT GND GND

Q10 *TPL@2N7002K

D21

*TPL@RB500V-40

CCD_PWR

LCDVCC_1

2

C82

5

*0.1u/10V_4

PP3300_PCH_SUS PP3300_PCH_SUS

2

3

1

R21 *TPL@10K_4

SOC3V3_RSTOUT_L

0.5A

C12

*TPL@10p/50V_4

R41 *SHORT_6 C19 TPL@1000p/50V_4

3

R76 *SHORT_8

C76 *2.2u/6.3V_6

R325 *TPL@10K_4

TP_INT

TOUCHPANEL_PWR_R

3

TP_PWR

R14 100K_4

0.5A

C28

0.1u/10V_4

20140912 E

OD parts, change PN.

PP3300_PCH_SUS

C16

0.01u/16V_4

LCDVCC

4

LVDS(LDS)

C38

22u/6.3V_8

EC_BL_PWM[26]

PCH_BL_PWM[2,26]

DP_UTIL[2]

EC_BL_EN[26]

PCH_BL_EN[2,26]

CCD(CCD)

USBP2+[9] USBP2-[9]

20141201 Stuff L12, remove R371/R372.

Touch Panel level shift(TPS)

20140821 Q13 FET change to PJT138K. 20141125 Change Q13 to un-stuff.

I2C1_SDA_GPIO6[10,28] I2C1_SCL_GPIO7[10,28]

4

5

R104 *0_4

R93 *Short_4

R98 *0_4

R51 *Short_4

R66 *0_4

L12

443

1

DLW21HN900SQ2L_C/330mA/90ohm

5

EC_BL_PWM_CONN

EC_BL_EN_CONN

3 2

2

1

4 3

LCD_VIN

C81

4.7u/25V_8

R85

*100K_4

USBP2+_R USBP2-_R

R337 *0_4

*PJT138K

R347 *0_4

R60

*100K_4

Q13

6 2

5

6

C72 1000p/50V_4

C64 *0.1u/10V_4

eDP

CCD

Touch Panel

R346 *4.7K_4

I2C1_SDA_GPIO6_CONN

PP3300_PCH

I2C1_SCL_GPIO7_CONN

6

VIN

EDP_HPD[2]

EDP_AUXN[2]

EDP_AUXP[2]

EDP_TXP0[2] EDP_TXN0[2]

R107 *SHORT_6 R103 *SHORT_6

EC_BL_PWM_CONN EC_BL_EN_CONN

R425 *Short_4

C264 0.1u/16V_4 C263 0.1u/16V_4

C261 0.1u/16V_4 C259 0.1u/16V_4

20141126 EOD parts, change PN.

CCD_PWR

C393 *15p/50V_4

R361 *0_6

PP5000

20140821 Reserve C393 capacitor. 20141125 Change R361 to un-stuff. because no touch panel.

PP3300_PCH_SUS

R338 *4.7K_4

Size Document Number Rev

Date: Sheet of

7

LCD_VIN

EDP_HPD_CONN

EDP_AUXN_C EDP_AUXP_C

EDP_TXP0_C EDP_TXN0_C

LCDVCC

USBP2+_R USBP2-_R

SOC3V3_RSTOUT_L TP_INT I2C1_SDA_GPIO6_CONN I2C1_SCL_GPIO7_CONN

PP5000_TS

7

8

16

LVDS CONN (follow zqk) DFHS40FS095 DFHS40FS063

footprint gs12401-1011-40p-r-nh-smt

CN3

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27 28 29

20140827 Change CN3 footprint.

Quanta Computer Inc.

PROJECT :

LVDS/CCD/DMIC/TS

27 28 29 303031

LCD CONN

34

33

32

31

ZHNB

16 39Thursday, December 04, 2014

8

A

5

Vinafix.com

4

3

2

1

D D

17

PIN7 OD PIN14 OD PIN19 OD PIN22 OD

CN11

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

AXK750347G

PIN28 OD PIN30 OD PIN37 OD PIN38 OD

2 4 6

8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50

Debug Port(DBG)

PCH_SPI_CS0#_R[8] PCH_SPI_SI_R [8]

PCH_SPI_SO_R[8]

SPI_HOLD#_BIOS[8]

C C

PCH_UART_TXD[20,26] PP3300_EC

SD_CDZ[28] EC_JTAG_TCK[26] PWR_BTN_L [13,25,26] EC_JTAG_TMS[26] EC_JTAG_TDI [26]

EC_JTAG_TDO[26]

EC_UARTTX[20,26]

HDMI_MB_HP[18]

H_PROCHOT#[4,26,29,32]

B B

R555 *Short_4

PP3300_EC

R563 *Short_4

SPI_CS#_BIOS SPI_DI_BIOS SPI_DO_BIOS SPI_HOLD#_BIOS

PCH_UART_TXD

GPIO_SD_DECT EC_JTAG_TCK EC_JTAG_TMS EC_JTAG_TDI

EC_JTAG_TDO EC_JTAG_RTCK

EC_UART_TXD

GPO_HPD GPIO_SPI_WP

R56410_4

GPIO_PROC_HOT#

R56510_4

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50

PIN39 OD PIN41 OD PIN43 OD PIN44 OD PIN45 OD PIN46 OD PIN47 OD PIN48 OD

SPI_CLK_BIOS

GPIO_EC_RST# PCH_UART_RXD

GPIO_PWR_BTN#

GPIO_REC_MODE_L EC_UART_RXD

PIN49 OD PIN50 OD

R560 10_4

PCH SPI

+3V_PCH_ME

PCH UART

R557 10_4 R559 *Short_4

EC JTAG

R284 *Short_4 R561 10_4

R562 *Short_4

PP3300_EC

EC UART

PCH_SPI_CLK_R [8]

EC_RST# [25,26]

PCH_UART_RXD [20,26]

SYS_RESET# [7,13]

RECOVERY_L [26]

EC_UARTRX [20,26]

GPIO_SPI_WP [8] LID_OPEN_L [26,27]

EC_JTAG_TCK

A A

Size Document Number Rev

Date: Sheet of

5

4

3

Date: Sheet of

2

Quanta Computer Inc.

PROJECT :

Google Debug

ZHNB

17 39Thursday, December 04, 2014

1

A

5

Vinafix.com

HDMI Cost Reduced level shift (HDM) H

INT_HDMITX2N[2] INT_HDMITX2P[2]

INT_HDMITX1N[2] INT_HDMITX1P[2]

D D

INT_HDMITX0N[2] INT_HDMITX0P[2]

INT_HDMICLK+[2] INT_HDMICLK-[2]

Layout Notes: Place decoupling CAPs close to Connector

C C

C274 0.1u/16V_4 C277 0.1u/16V_4

C272 0.1u/16V_4 C273 0.1u/16V_4

C276 0.1u/16V_4 C279 0.1u/16V_4

C271 0.1u/16V_4 C269 0.1u/16V_4

INT_HDMITX0N_C INT_HDMITX0P_C

INT_HDMICLK+_C INT_HDMICLK-_C

20141126 EOD parts, change PN.

PP3300_HDMI

R464

*100K/F_4

2

3

1

Q19

2N7002K

4

INT_HDMITX2N_C INT_HDMITX2P_C

INT_HDMITX1N_C INT_HDMITX1P_C

12

R116 470_4

1 2

R111 470_4

1 2

R142 470_4

12

R134 470_4

INT_HDMICLK+_CONN

INT_HDMICLK-_CONN

R127 470_4

3

2

1

DMI connector (HDM)

CN5

INT_HDMITX2P_C INT_HDMITX2N_C

R100 *Short_4

12

RV1 *5V/0.2p_4

INT_HDMITX1P_C INT_HDMITX1N_C

INT_HDMITX0P_C INT_HDMITX0N_C

INT_HDMICLK+_CONN INT_HDMICLK-_CONN

HDMI_DDCCLK_MB HDMI_DDCDATA_MB

HDMI_5V

C83

*1000p/50V_4

HP_DET_CNHDMI_MB_HP

INT_HDMICLK+_C INT_HDMICLK-_C

12

R119 470_4

12

R129

R138

470_4

PP5000

Q15

3

IN

AP2331SA-7

OUT GND

R445 *Short_4 R443 *Short_4

1 2

INT_HDMICLK+_CONN INT_HDMICLK-_CONN

C268 *220p/50V_4

D24 *14V/100p_4

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19

C270 *1000p/50V_4

D2+ D2 Shield D2D1+ D1 Shield D1D0+ D0 Shield D0CK+ CK Shield CKCE Remote NC DDC CLK DDC DATA GND +5V HP DET

ABA-HDM-022-P05

20140827 Change CN5 footprint.

SHELL1 SHELL3

SHELL4 SHELL2

20 22

23 21

18

HDMI DDC (HDM)

PP3300_DX

LCDVCC

B B

HDMI_DDCCLK_SW[2]

A A

HDMI_DDCDATA_SW[2]

R95 *SHORT_6 R86 *0_6

5

R124

R109

PP3300_HDMI

HDMI_DDCCLK_COM HDMI_DDCCLK_MB

*Short_4

PP3300_HDMI PP3300_HDMI

R123

2.2K_4

R108

2.2K_4

PP3300_HDMI

1

PP3300_HDMI

1

4

2

R117

*Short_4

Q18 BSN20

R102

*Short_4

Q16 BSN20

PP5000

D6

RB500V-40

R120

3

RB500V-40

3

2.2K_4

PP5000

D5

R99

2.2K_4

Follow CRB 1.0 change to

2.2K

Follow CRB 1.0 change to

2.2K

HDMI_DDCDATA_MBHDMI_DDCDATA_COM

EMI (EMC) HDMI-detect (HDM)

INT_HDMITX2P_C

R133 *100/F_4

INT_HDMITX2N_C

INT_HDMITX1P_C

R122 *100/F_4

INT_HDMITX1N_C

INT_HDMITX0P_C

R457 *100/F_4

INT_HDMITX0N_C

INT_HDMICLK+_CONN

R114 *100/F_4

INT_HDMICLK-_CONN

3

INT_HDMI_HPD[2]

2

PP3300_HDMI

R422 *Short_4

R431 1M_4

Size Document Number Rev

Date: Sheet of

2

1

3

HDMI_MB_HP

12

Q14 2N7002K

Quanta Computer Inc.

PROJECT :

HDMI

1

R419 20K_4

ZHNB

18 39Thursday, December 04, 2014

HDMI_MB_HP [17]

A

1

Vinafix.com

WLAN\BT LGA Combo Card

2

3

4

5

6

7

8

19

A A

+WL_VDD

81

124

123

122

121

120

119

118

117

116

115

114

113

112

111

110

109

108

107

106

105

104

103

102

101

127

126

+WL_VDD

R216

10K/J_4

B B

WLAN_WAKE_L[10]

PP3300_WLAN_EN[10,26,35]

2

PCIE_CLKREQ_WLAN#[9]

1

2N7002K Q4

3

+WL_VDD

(RF_On High)

R215 10K/J_4

PCIE_RX3-_WLAN[9] PCIE_RX3+_WLAN[9]

2014.08.26 Swap TX/RX, and RX add capacitor.

PCH_SUSCLK[7] WLAN_OFF_L[26]

PLTRST#[7,13,21,22,26] CLK_PCIE_WLANN[9] CLK_PCIE_WLANP[9]

PCIE_TX3-_WLAN[9] PCIE_TX3+_WLAN[9]

C396 0.1u/16V_4 C397 0.1u/16V_4

PCH_SUSCLK

R167 *Short_4

PCIE_CLKREQ_WLAN#_Q

R217 *Short_4

RF_OFF

WLAN_WAKE_L

PCIE_RX3PCIE_RX3+

20141126 EOD parts, change PN.

C C

U27

1

2 68 69

24 25 26 27 28 30 31 33 34 36 37 39 40 41 42 43 44 45 46 47 48 49

125

3.3V

GND_G35

GND_G34

GND_G33

3.3V

SUSCLK_32KHz W_DISABLE# PEWAKE# CLKREQ# PERST# REFCLKN0 REFCLKP0 PETN0 PETP0 PERN0 PERP0 CLINK_CLK CLINK_DATA CLINK_RST SDIO_RESET SDIO_WAKE SDIO_DAT3 SDIO_DAT2 SDIO_DAT1 SDIO_DAT0 SDIO_CMD SDIO_CLK

GND_G32

GND_G31

GND_G30

GND_G29

GND_G28

GND_G27

GND_G26

GND_G25

GND_G24

GND_G23

GND_G22

GND_G21

GND_G20

GND_G19

GND_G18

GND_G17

GND_G16

GND_G15

NC

NC4NC

5

NC11NC

NC6NC

7

9

8

12

10

100

GND_G9

GND_G14

NC

GND_G8

GND_G13

GND_G12

GND_G11

GND_G10

NC

NC19NC

NC

22

15

21

18

13

16

GND_G799GND_G698GND_G597GND_G496GND_G395GND_G294GND_G1

NC

NC91NC

63

90

92

93

GND89GND88GND87GND86GND85GND84GND83GND

82

GND

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

USB_D+

USB_D-

LED#1 LED#2

W_DISABLE#2

PCMCLK PCMOUT

PCMIN

PCMFR1

UART_RTS

UART_RX UART_TX

UART_CTS

UART_WAKE

7260SDW

80 79 78 77 76 75 74 73 72 71 70 67 64 59 38 35 32 29 23 20 17 14 3

66 65 62 61 60 58 57 56 55 54 53 52 51 50

WLAN_LED1# WLAN_OFF BT_OFF

R161 *Short_4

2014.08.25 Change capacitor value.

C95 10u/6.3V_6

RF_OFF BT_OFF

2014.08.27 Add 100K resistance pulldown.

2014.09.02 100K resistance pulldown mark *.

C398

0.1u/10V_4

R631 *100K_4 R632 *100K_4

USBP3+ [9]

USBP3- [9]

TP45 TP44

C394 1U/6.3V_4

WLAN_DISABLE_L [10]

C93 *0.1u/10V_4

(BT_On High)

20140820 On board IC change to same as ZS8 connector 20140822 Return to another wifi onboard module 7260SDW

D D

20140826 Change wifi onboard module 7260SDW footprint 20140909 Change wifi onboard module 7260SDW footprint 20141014 Change wifi onboard module 7260SDW PN.

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

1

2

3

4

5

6

Thursday, December 04, 2014

7

PROJECT :

WIFI / BT

ZHNB

A

3819

8

5

Vinafix.com

4

3

2

1

NGFF SSD connector.

San Disk SSD Card.

D D

PP3300_DX

C216

*0.1u/10V_4

C218 *10U/6.3V_8

1.5A

R289 *SHORT_8

+3V_SATA

C373

10u/6.3V_4

+3V_SATA

Close mSATA conn.

+3V_SATA

C222

0.1U/16V_4

C223

0.1U/16V_4

C224

0.1U/16V_4

C383

0.1U/16V_4

20

20141126 EOD parts, change PN.

rating = 1000mA @ 128G

+3V_SATA

C C

PCH_UART_TXD[17,26] PCH_UART_RXD[17,26]

EC_UARTTX[17,26] EC_UARTRX[17,26]

SATA_RXP0_SSD[8]

B B

SATA_RXN0_SSD[8] SATA_TXN0_SSD[8]

SATA_TXP0_SSD[8]

R580 *Short_4

R589 *0_4 R588 *0_4

R587 *0_4 R586 *0_4

C379 0.01u/25V_4 C381 0.01u/25V_4

C380 0.01u/25V_4 C382 0.01u/25V_4

20140912 EOD parts, change PN.

R581 0_4

IFDET Module Type

01SSD - SATA

SSD - PCIE

SSD_PRESENCE

SATA_RXP0_C SATA_RXN0_C

SATA_TXN0_C SATA_TXP0_C

IFDET

1 3 5 7

9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75

CN14

PRESENCE GND NC NC NC NC NOTCH NOTCH NOTCH NOTCH SSD GND NC NC GND NC NC GND NC NC GND SATA B+ SATA BGND SATA ASATA A+ GND NC NC GND NOTCH NOTCH NOTCH NOTCH NC PEDET GND GND GND

NGFF

SUSCLK(32KHz)

GND76GND

77

3.3Vaux

3.3Vaux NC NC

DAS NOTCH NOTCH NOTCH NOTCH

NC NC NC NC NC NC NC NC NC

DEVSLP

NC NC NC NC NC NC NC NC

MFG_DATA

MFG_CLK

NOTCH NOTCH NOTCH NOTCH

3.3Vaux

NGFF CONN_SSD

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74

DAS

DEVSLP

TP124

DEVSLP0 [10]

R577 *10K_4

A A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

NGFF SSD

1

ZHNB

20 39Thursday, December 04, 2014

A

1

Vinafix.com

NGFF 3G connector

R582 *3G@0_4

A A

USBP0+[9]

USBP0-[9]

LTE_WAKE_L[10]

B B

PLTRST#[7,13,19,22,26]

C C

R201 *0_4 R207 *0_4

R263 *0_4

PCIE_RX2-_NGFF[9] PCIE_RX2+_NGFF[9]

PCIE_TX2-_NGFF[9] PCIE_TX2+_NGFF[9]

CLK_PCIE_NGFFN[9] CLK_PCIE_NGFFP[9]

R251 *0_4

TP133

PLTRST#_3G

TP134

C189

*3G@33p/50V_4

USBP0+_R USBP0-_R

LTE_WAKE_L_R

2

LTE_CFG3

TP135

CN8

1

CONFIG_3

3

GND

5

GND

7

USB_D+

9

USB_D-

11

GND

13

NC

15

NC

17

NC

19

NC

21

CONFIG_0

23

Wake_On_WWAN#

25

BODYSAR_N

27

GND

29

NC

31

NC

33

GND

35

NC

37

NC

39

GND

41

NC

43

NC

45

GND

47

NC

49

NC

51

GND

53

NC

55

NC

57

GND

59

ANTCTL0

61

ANTCTL1

63

ANTCTL2

65

ANTCTL3

67

Reset#

69

CONFIG_1

71

GND

73

GND

75

CONFIG_2

3

+3V_LTE

NGFF

GPS_DISABLE#

GND76GND

77

2

3.3Vaux

4

3.3Vaux

6

Power_On_Off

8

W_DISABLE#

10

LED#

12

NC

14

NC

16

NC

18

NC

20

RESERVED

22

RESERVED

24

RESERVED

26 28

RESERVED

30

UIM-RESET

32

UIM-CLK

34

UIM-DATA

36

UIM-PWR

38

NC

40

RESERVED

42

RESERVED

44

RESERVED

46

RESERVED

48

RESERVED

50

NC

52

NC

54

NC

56

NC

58

NC

60

RESERVED

62

RESERVED

64

RESERVED

66

SIM_DET

68

NC

70

3.3Vaux

72

3.3Vaux

74

3.3Vaux

*3G@LOTES_APCI0019-P00*A

PLTRST#_NGFF PLTRST# CLKREQ_NGFF# NGFF_WAKE#_R

20140827 Change CN8 footprint.

+3V_LTE

R256 *10K/J_4

R219 *3G@10K/J_4

R248 *0_4

UIM_VPP UIM_RST UIM_CLK UIM_DATA UIM_PWR

R280 *3G@0_4 R279

*3G@0_4

SIM_DET

LTE_WAKE_L_R

R218 *3G@10K_4

CLKREQ_NGFF#

4

LTE_DISABLE_L [10]

R255

*10K/J_4

3

Q5 *2N7002K

+3V_LTE

2

PLTRST#

R507 *3G@0_4

1

PCIE_CLKREQ_NGFF# [9]

5

USBP0+ USBP0-

USB_SEL

SEL OE# Y+ Y-

X L

U32

7 6 5 4

10

8

*3G@PI3USB102

HHHi-ZHi-Z L

M+ M-

L

D-D+

*3G@1U/6.3V_4

D+ DM+ M-

SEL OE#

PP3300_DSW

C132

VCC

Y+

Y-

GND

+3V_LTE

R508 *3G@10K_4

USB_SEL

9 1

2

3

+3V_LTE

USBP0+_R USBP0-_R

PP5000_DSW

*3G@2200p/50V_4

6

U13 *3G@TPS22965DSGR

1

LTE_PWREN_R

C141

3 4

C140 *3G@0.1u/10V_4

+3V_LTE

+

C365

*3G@330u/6.3V_7343

Place near NGFF connector

20130109 Add 3G SIM card hot swap circuit.

+3V_LTE

VOUT_02

VIN_01 VIN_022VOUT_01 ON VBIAS

PAD

9

C353 *3G@100U/6.3V_1206

C151 *3G@22u/6.3V_8

8 7 6

CT

5

GND

Peak:2.75A Normal:1.1A

C221 *3G@1u/10V_4

7

C154 *3G@470p/50V_4

PP3300_LTE_EN[10,26]

C220

*3G@0.1u/16V_4

R598 *0_8

C156 *3G@0.1u/10V_4

C170

*3G@0.1u/16V_4

+3V_LTE

R182 *0_4

R170 *100K_4

2nd source: CH4471K9B03

12

C219

*3G@0.1u/16V_4

*3G@0.47u/6.3V_4

C174

8

21

LTE_PWREN_R

12

C133 *3G@0.047u/25V_4

C152 *3G@10p/50V_4

MultiMedia SIM (MNC)

R69 *10K/J_4

USBP5+[9] USBP5-[9]

SIM_DET

SIM_DET[2]

+3V_LTE

D D

1

<Layout Notes> Keep USIM signals max length within 8000mils.

JSIM1 *3G@SIM-CONN

USBP5-_R USBP5+_R

UIM_CLK

R71 *0_4 R70 *0_4

6

CLK(C3) D-(C8)7VCC(C1)

8

D+(C4)

9

CT

10

CD

13

2

GND(C5)

VPP(C6) RST(C2)

DATA(C7)

GND14GND12GND11GND

1 2 3 4 5

USBP5+_R USBP5-_R

Max: 7.5mA (Option)

UIM_PWR_R UIM_VPP UIM_RST UIM_DATA

R65 *0_4

UIM_PWR

<20121004(A1A)_Huawei design guide> Place 0.1uF near connector's VCC pin

UIM_PWR

C59

*3G@1u/6.3V_4

3

C69 *3G@0.1u/16V_4

SIM_DET

C217 *470P/50V_4

UIM_PWR

C77 *3G@33p/50V_4

UIM_DATA

C55 *3G@33p/50V_4

UIM_CLK

C56 *3G@33p/50V_4

UIM_RST

C54 *3G@33p/50V_4

UIM_VPP

C53 *3G@33p/50V_4

<20110609> Un-stuff since EM820W doesn't use Vpp

4

U4

1 2

UIM_CLK

5

SIM_DET

*3G@CM1293-04SO

D4 *5V/0.2p_4

CH1 VN CH23CH3

1 2

6

CH4

5

VP

4

UIM_VPPUIM_RST

UIM_DATA

6

+3V_LTE

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

7

PROJECT :

NGFF/ SIM conn

ZHNB

8

A

3921

1

Vinafix.com

2

3

4

TPM (TPM)

4 x100nF (place close to device VDD/GND pins)

20141201 Change TPM power.

PP3300_PCH

22

A A

TPM_VDD

12

R467 *20K_4

U7

TPM_GPIO

B B

TPM_VDD

R465 0_4

R469 *4.7K_4

TPM_PP

0411 FAE : install R80 value is 4K7, and PIN7 wo an internal PD

C C

6

GPIO

2

NC2

7

PP

13

NC13

14

NC14

8

NC8

12

NC12

3

NC3

1

NC1

TPM SLB9655

GND[1]4GND[2]11GND[3]18GND[4]

25

SLB9655

TPM_VDD

VDD[4] VDD[3] VDD[2] VDD[1]

LCLK

LFRAME#

LAD3 LAD2 LAD1 LAD0

NC28

LRESET#[1] LRESET#[2]

SERIRQ

NC15

C297

0.1U/10V_4

10 5 24 19

21 22

17 20 23 26

28 16

9 27

15

C287

0.1U/10V_4

TPM_RST_R

SERIRQ_R

C298

0.1U/10V_4

C288

0.1U/10V_4

near pin 21 as possible

C291 *10p/50V_4

R148 *Short_4

R491 *Short_4

0411 FAE : a 0ohm between pin9 to LRESET signals

R470

2.2_6

PCLK_TPM [9]

LPC_LFRAME# [8,26]

LPC_LAD3 [8,26] LPC_LAD2 [8,26] LPC_LAD1 [8,26] LPC_LAD0 [8,26]

PLTRST# [7,13,19,21,26]

IRQ_SERIRQ [10,26]

D D

Size Document Number Rev

Date: Sheet of

1

2

3

Date: Sheet of

Quanta Computer Inc.

PROJECT :

TPM SLB9655 / LED

ZHNB

22 39Thursday, December 04, 2014

4

A

5

Vinafix.com

4

3

2

1

Codec(ADO)

HPR [24]

MIC1-VREFO

33

CPVEE

HP-OUT-R

ALC283

31

32

HP-OUT-L

MIC1-VREFO-R

30

29

MIC2-VREFO

LINE1-VREFO-L

LINE1-VREFO-R

C192 10u/6.3V_4

ACZ_SDIN

C195 *22p/50V_4

MIC2-VREFO

CODEC_VREF

INT_AMIC-VREFO

27

28

VREF

LDO1-CAP

R262 33_4

25

26

AVDD1

MIC2-R/SLEEVE

MIC2-L/RING2

MONO-OUT

12

PCH_AZ_CODEC_RST#

D D

placed close to codec

C206 1u/10V_4

+AZA_VDD

+1.5VA

C215 10u/6.3V_4

ADOGND

Place next to pin 40

Analog

Digital

C C

+5VPVDD

C367

0.1u/10V_4

near Codec

C372

0.1u/10V_4

ADOGND

C368

0.1u/10V_4

near Codec

Low is power down amplifier output

C213 10u/6.3V_4

TP59

+AZA_VDD

L_SPK+ L_SPKR_SPKR_SPK+

PD#

C199

0.1u/10V_4

37 38 39 40 41 42 43 44 45 46 47 48

49

C205 10u/6.3V_4

CBP AVSS2 LDO2-CAP AVDD2 PVDD1 SPK-L+ SPK-LSPK-RSPK-R+ PVDD2 PDB SPDIFO/GP IO2

DGND

Place next to pin 1

TP58 TP57

R204 *Short_4 R567 *Short_4

ADOGND

R569 *Short_4 R206 *Short_4 R519 *Short_4 R287 *Short_4

C369 *1000p/50V_4 C363 *1000p/50V_4

B B

C2001u/10V_4

C20210u/6.3V_4

34

35

36

CBN

CPVDD

DVDD1GPIO0/DMIC-DATA2GPIO1/DMIC-CLK3DVSS4SDATA-OUT5BIT-CLK6LDO3-CAP7SDATA-IN8DVDD-IO9SYNC10RESETB11PCBEEP

DMIC_DAT_L

DMIC_CLK_L

HPL [24]

T5

MIC2-VREFO [24]

20141112 C193 change to 0.1uF

C193 0.1u/10V_4 C191 10u/6.3V_4

R630 100K_4

20141029 Add R620 100K resistance

ADOGND ADOGND

C188

0.1u/10V_4

+5VA

C181 10u/6.3V_4

Place next to pin 26

U16

AVSS1

24

LINE2-L LINE2-R LINE1-L LINE1-R

MIC1-CAP

Sense B Sense A

LINE2-L

23

LINE2-R

22

MIC1_INT_R

21

MIC1_INT_L

20

NC

19 18

SLEEVE

17

RING2

16 15

CODEC_JDREF

JDREF

14 13

1.6Vrms

PCBEEP BEEP_1 BEEP_2

C178 1u/10V_4

C179 100p/50V_4

ADOGND

T3 T1

C172 1u/10V_6 C173 1u/10V_6

C389 10u/6.3V_4

R212 39.2K/F_4

R211 20K/F_4

MIC1_INT_L_C

ADOGND SLEEVE [24] RING2 [24]

Placement near Audio Codec

R254 47K_4

R247

4.7K_4

PCH_AZ_CODEC_RST# [8] PCH_AZ_CODEC_SYNC [8]

PCH_AZ_CODEC_SDIN0 [8] PCH_AZ_CODEC_BITCLK [8]

PCH_AZ_CODEC_SDOUT [8]

MIC1_INT_R_C

MIC1_INT_L_C

R511 1K_4 R510 1K_4

HP_JD#SENSEA

C190

0.1u/10V_4

Place next to pin 9

C345

*1000p/50V_4

ADOGND ADOGND

ADOGND

HP_JD# [24]

Analog

Digital

SPKR [8,10]

HDA_DVDD-IO

C187 10u/6.3V_4

*1000p/50V_4

MIC1_INTL1MIC1_INT_R_C

C346

Grounding circuit(ADO)

PIN1, PIN4, PIN3, PIN6 are ANALOG

ADOGND

Q22

1

4 3

2N7002DW

6

SLEEVE

2

RING2

5

INT MIC array

DNQTZEA0000 mic-a-m-qtzea01hf-2p-top

CN1

1

MIC1_INTL1 MIC1-VREFO

1

2

ADOGND

C238 0.1u/10V_4

C239 *22p/50V_4

INT_AMIC_SMD

ADOGND

cap place close to MIC-connector

Codec PWR 3V/1.5V(ADO)

R200

2.2K_4

PP3300_RTC

R506

100K_4

3

2N7002K

1

Q21

PP3300_DX

2

R501

*100K_4

R505 10K_4

C327 *1u/10V_4

23

PCH_AZ_CODEC_RST#

Mute(ADO)Codec PWR 5V(ADO)

VOUT_02

PAD

AUDIO_+5V_EN

12

C158 *0.047u/25V_4

8

DIGITAL

+5V_ADO

R202 *SHORT_6

C159 470p/50V_4

L4 HCB1608KF_1.5A_6

20140912 EOD parts, change PN.

C175

0.1u/10V_4

7 6

CT

5

GND

ANALOG

C171 10u/6.3V_4

AVDD1

+5VPVDD

4

+5VA

Internal Speaker

R_SPK+ R_SPKL_SPKL_SPK+

40mil for each signal

C148

0.047u/25V_4

R192 *Short_4

R193 100K_4

U14 TPS22965DSGR

1

VIN_01 VIN_022VOUT_01

3

ON

4

VBIAS

9

PP5000_CODEC_EN[10]

G

PP5000

A A

AUDIO_+5V_EN

C160

*0.1u/10V_4

PP5000_DSW

C165 *10U/6.3V_8

C139

0.1u/10V_4

12

5

+AZA_VDD

R566 *1K_4

PD#

R568 *10K_4

R273 *SHORT_6 R272 *SHORT_6 R271 *SHORT_6 R270 *SHORT_6

20141118 Change D27 PN.

C212

C211

*68p/50V_4

PCH_AZ_CODEC_RST#

D27BAS316

footprint 88266-040xx-xxx-4p-l

CN12

SPK_CONN_4P

C210

*68p/50V_4

3

R_SPK+_1 R_SPK-_1 L_SPK-_1 L_SPK+_1

C209

*68p/50V_4

PP1500_PCH_TS

1 2 345

6

PP3300_DX

1U/6.3V_4

2

C201

C194

R264 *SHORT_6

20130520: Add R264

L7 HCB1608KF_1.5A_6

+3V_ADO

R220 *SHORT_6

R252 *SHORT_6

+1.5VA

ANALOG DIGITAL

20140912 EOD parts, change PN.

HDA_DVDD-IO

+AZA_VDD

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

ALC283/HP/SPK

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

PROJECT :

1

ZHNB

3923

A

5

Vinafix.com

HEADPHONE/Mic combo(ADO)

D D

4

MIC2-VREFO[23]

RING2

RING2[23]

L21 0_4

MIC2-VREFO

R214

2.2K_4

3

R283

2.2K_4

RING2_R

2

1

24

C344 *100P/50V_4

SLEEVE_R

SLEEVE_R HP_JD#

HPL_SYS

RING2_R

C371 *100P/50V_4

3

CN7

4 2 6 5 7 1 3

COMBOJACK_2SJ3080-003111F

DFTJ06FR463

Normal Open PIN1 --> L PIN2 --> R PIN3 --> GND/MIC PIN4 --> MIC/GND PIN5 --> GND PIN6 --> JD PIN7 --> Shielding

combo jack Normal open

SLEEVE_R

HPR_SYS

HPL_SYS

RING2_R

ESD 2'nd CY00G050B00

Size Document Number Rev

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

2

Thursday, December 04, 2014

D14 *VPORT 0402 151 MV0521

D15 *VPORT 0402 151 MV0521

D18 *VPORT 0402 151 MV0521

D19 *VPORT 0402 151 MV0521

Quanta Computer Inc.

PROJECT :

Audio Headset SW

ZHNB

1

ADOGND

A

3924

SLEEVE

SLEEVE[23]

HPR[23]

C C

B B

A A

HPL[23]

HP_JD#[23]

5

HPR HPR-1 HPR_SYS

HPL HPL-1_TIP_SENSE

HP_JD#

R548 *1K_4

R547 56_4

R553 56_4

R554 *1K_4

4

L16 0_4

L17 *SHORT_6

L20 *SHORT_6

C349

2200P/50V_4 C370 2200P/50V_4

ADOGND ADOGND ADOGND

5

Vinafix.com

4

3

K/B (KBC) TOUCHPAD BOARD CONN (TPD)

2

1

CN13

6 5 4

24 25 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2 1

KB_CONN

KB_COL02_SW

PP5000_DSW

KB_ROW02_SW

26

I2C0_SDA_GPIO4[10]

I2C0_SCL_GPIO5[10]

Touch Panel interrupt

TRACKPAD_INT_L[10]

TRACKPAD_INT_DX[2]

PP3300_RTC

DSW

DX

D20

TPL@RB500V-40

KB_ROW00[26] KB_ROW01[26]

D D

U33

KB_ROW00

KB_ROW01

KB_ROW05

KB_ROW06

KB_ROW09

KB_ROW10 KB_ROW11

C C

KB_COL03

KB_COL07

1

I/O 1

2

GND I/O 23I/O 3

AZC099 U34

1

I/O 1

2

GND I/O 23I/O 3

AZC099 U35

1

I/O 1

2

GND I/O 23I/O 3

AZC099 U37

1

I/O 1

2

GND I/O 23I/O 3

AZC099

I/O 4 VDD

6

KB_ROW03

5

PP5000_DSW

4

KB_ROW04

6

KB_ROW07

5

PP5000_DSW

4

KB_ROW08

PWR_BTN_L[13,17,26]

6

KB_ROW12

5

PP5000_DSW

4

6

KB_COL06

5

PP5000_DSW

4

KB_COL05

KB_ROW03[26] KB_ROW04[26] KB_ROW05[26] KB_ROW06[26] KB_ROW07[26] KB_ROW08[26] KB_ROW09[26] KB_ROW10[26] KB_ROW11[26]

KB_ROW12[26] KB_COL07[26] KB_COL06[26] KB_COL05[26] KB_COL04[26] KB_COL03[26]

KB_COL01[26] KB_COL00[26]

KB_COL04

KB_COL00

KB_PWR_ON_L KB_COL01

KB_ROW02_SW

R276 *Short_4

U36

1

I/O 1

2

GND I/O 23I/O 3

AZC099

KB_ROW00 KB_ROW01

KB_ROW03 KB_ROW04 KB_ROW05 KB_ROW06 KB_ROW07 KB_ROW08 KB_ROW09 KB_ROW10 KB_ROW11 KB_ROW12 KB_COL07 KB_COL06 KB_COL05 KB_COL04 KB_COL03 KB_COL02_SW KB_COL01 KB_COL00 KB_PWR_ON_L

I/O 4 VDD

1 2

D32 5V/0.2p_4

1 2

D33 5V/0.2p_4

HOLELESS RESET

TP_PWR

1

4 3

TP_PWR TP_PWR

3

Q9 TPL@2N7002K

2-CHIP(KBC)

R624

R625

*4.7K_4

PP3300_RTC

B B

A A

R626 4.7K_4 R627 *4.7K_4 R628 *4.7K_4

Pin 3,5,8,11 Open Drain

ACIN[26,29]

R285 *Short_4

KB_ROW02_SW KB_COL02 EC_IN_RW

R268

10K_4

U17

PWR_BTN_L BATT_ENABLE ACPRESENT_4137 KB_ROW02_SW KB_COL02_SW

20141119 U17 change part NO. same as 0C7.

5

2

PWR_BTN_L

3

BATT_ENABLE

4

AC_PRESENT

5

KSO_SW

6

KSI_SW

PP3300_RTC

0.1U/16V_4

1

VDD

EC_ENTERING_RW

GND

PAD_GND

7

13

C198

EC_RST_L

EC_IN_RW

KSO_INV

SLG4K4350VTR

BATT_ENABLE

2.2U/6.3V_4

20141126 EOD parts, change PN.

12

EC_RST#

11

EC_IN_RW

10

EC_ENTERING_RW

9 8

KSI

co-layout 4K4108 and 4K4137 SLG4K4108 (AL004108000) SLG4K4137 (AL004137000) 4K4137 PIN3 is BATT_ENABLE 4K4137 PIN4 is AC_PRESENT

4

KB_ROW02 [26]

KB_COL02 [26]

1M_4

3

2

C392

EC_RST# [17,26]

EC_IN_RW [10]

EC_ENTERING_RW [26]

1

BATT_EN#

Q33

2N7002K

Connect to EC reset pin Connect to GPIO on CPU

with PU to GPIO power well

Connect to EC pin C5 (must be low when EC IN RESET)

3

BATT_EN# [27,29]

L6 *SHORT_6

R286 *Short_4

Q8

6 2

5

*2N7002DW

R278 *Short_4

PP3300_PCH

R274

2

1

TPL@10K_4

FAN_GATED_EN[26]

CPU FAN1 (THM)

EC_FAN_PWM[26]

C203

0.1u/10V_4

2

12

TP_PWR

D31 *VPORT_6

30mil

TRACKPAD_INT_L_CONN

TP110

R599

100K_4

PP3300_FAN

R442 1K_4

2

1 3

Q17 MMBT3904-7-F

DFFC08FR093

50501-0080n-001-8p-l

CN10

TPCLK_CN TPDATA_CN

I2C_TP_SDA_R I2C_TP_SCL_R

+TPVDD

8 7 6 5 4 3 219

Touch_Pad_8P

10

20140827 Change CN10 footprint.

R277 *10K_4 R288 *10K_4 R266 *10K_4 R267 *10K_4

2

1

I2C_TP_SDA_R I2C_TP_SCL_R TPCLK_CN TPDATA_CN

3

Q26*2N7002K

1 2

D29 *5V/0.2p_4

1 2

D30 *5V/0.2p_4

R600 *1M_4

2

Check pin define 0321 footprint 88266-040xx-xxx-4p-l

PP5000

R441 10K_4

EC_FAN_TACH[26]

PP3300_FAN

R438 10K_4

+5V_FAN1

FAN_PWM_CN1

30mil

PP3300_DXPP3300_DSW

R439 *0_4 R436 *Short_4

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

PROJECT :

KB/TP/FAN/HW Reset

1

25

PP5000

1

Q27 *AO3409

3

Check FAN power leakage

FAN_CONN_4P

PP3300_FAN

CN4

1 2 345

ZHNB

25 39Thursday, December 04, 2014

R432 0_8

+5V_FAN1

6

A

5

Vinafix.com

EC(KBC)

D D

H_PECI[4]

C C

B B

PP3300_EC

A A

PP3300_EC

KB_COL07 KB_COL06 KB_COL05 KB_COL04

R518

*100K_4

R516

100K_4

PP3300_EC

RP1 10K_10P8R

10

9 8 7 4

PP1050_PCH

EC_PECI_TX

R25043_4

USB2_PWR_EN[28]

USB2_OC_L[28]

USB_OC2#[9]

ICMNT[29]

USB1_PWR_EN[27]

USB1_OC_L[27]

USB_OC0#[9]

EC_RST#[17,25] EC_RST#_R[28]

R197

100K_4

R203

*100K_4

C362

C149

1u/6.3V_4

1

KB_COL03

2

KB_COL02

3

KB_COL01 KB_COL00

56

EC_PECI_RX

D/C#[29]

R514

*100K_4

R509

100K_4

5

C332

1u/6.3V_4

0.1U/10V_4

3

Q3

2

2N7002K

1

R249 330_4

WLAN_OFF_L[19]

CPU_PGOOD[4]

VCORE_EN[32]

IMVP_PWRGD_3V[10]

SUSP_VR_EN[31]

PP1050_PGOOD[5,31]

PP1350_EN[30]

PP1350_PGOOD[30]

PP5000_EN[33,34]

PP5000_PGOOD[34]

PP3300_DSW_EN[34]

BAT_LED0[28] PWR_LED0[28]

R258 *Short_4

R205 *Short_4

R576 0_4

ID2 change to High, ID3 change to Low, because EC change code.

EC_BRD_ID1 EC_BRD_ID2 EC_BRD_ID3

C342

C335

0.1U/10V_4

20141107 Change U5 PN. 20141201 Change U5 new PN.

LPC_LAD0[8,22] LPC_LAD1[8,22] LPC_LAD2[8,22] LPC_LAD3[8,22]

CLK_PCI_EC[9]

LPC_LFRAME#[8,22]

PLTRST#[7,13,19,21,22]

EC_SCI_L[8]

IRQ_SERIRQ[10,22]

KB_COL00[25] KB_COL01[25] KB_COL02[25] KB_COL03[25] KB_COL04[25] KB_COL05[25] KB_COL06[25] KB_COL07[25]

KB_ROW00[25] KB_ROW01[25] KB_ROW02[25] KB_ROW03[25] KB_ROW04[25] KB_ROW05[25] KB_ROW06[25] KB_ROW07[25] KB_ROW08[25] KB_ROW09[25] KB_ROW10[25] KB_ROW11[25] KB_ROW12[25]

PWR_BTN_L[13,17,25]

RECOVERY_L[17] FAN_ALERT#[28]

BAT_TEMP[29]

TP49

PP3300_LTE_EN[10,21]

EC_ENTERING_RW[25]

TP_SHDN_L[16]

PWR_LED1[28]

PP3300_DX_EN[35]

FAN_GATED_EN[25]

R261 *0_4 R260 *Short_4

TP50 TP52

TP54 TP55

TP56

TP51

TP47 TP46

C325 0.1U/10V_4

C143

C343

1000p/50V_4

0.1U/10V_4

EC_LPCPD#

KB_COL00 KB_COL01 KB_COL02 KB_COL03 KB_COL04 KB_COL05 KB_COL06 KB_COL07

KB_ROW00 KB_ROW01 KB_ROW02 KB_ROW03 KB_ROW04 KB_ROW05 KB_ROW06 KB_ROW07 KB_ROW08 KB_ROW09 KB_ROW10 KB_ROW11 KB_ROW12

PWR_BTN_L LID_OPEN_R EC_SPI_WP_D RECOVERY_L FAN_ALERT# PROCHOT_EC BAT_TEMP DC_LED PP3300_LTE_EN EC_ENTERING_RW

TP_SHDN_L PWR_LED1 PP3300_DX_EN FAN_GATED_EN WLAN_OFF_L

CPU_PGOOD

VCORE_EN_R

IMVP_PWRGD_3V_R SUSP_VR_EN PP1050_PGOOD PP1350_EN PP1350_PGOOD PP5000_EN PP5000_PGOOD PP3300_DSW_EN

BAT_LED0 PWR_LED0 USB2_CTL3 USB2_PWR_EN USB2_ILIM_SEL USB2_STATUS_L USB2_OC_L USB1_CTL1 USB1_CTL2 ICMNT USB1_PWR_EN USB1_ILIM_SEL D/C# USB1_OC_L

EC_BRD_ID1 EC_BRD_ID2 EC_BRD_ID3

EC_RST#_R

4

C137 1000p/50V_4

D7

E6

E8

E9

J10

U15

B13

PL3/LPC0AD0/T1CCP1/WT1CCP1

A13

PL2/LPC0AD1/T1CCP0/WT1CCP0

C12

PL1/LPC0AD2/T0CCP1/WT0CCP1

D11

PL0/LPC0AD3/T0CCP0/WT0CCP0

H12

PM5/LPC0CLK

D12

PL4/LPC0FRAME_L/T2CCP0/WT2CCP0

F13

PM0/LPC0PD_L/T4CCP0/WT4CCP0

C13

PL5/LPC0RESET_L/T2CCP1/WT2CCP1

F12

PM1/LPC0SCI_L/T4CCP1/WT4CCP1

H13

PM4/LPC0SERIRQ

G2

PK0/AIN16/SSI3CLK

G1

PK1/AIN17/SSI3FSS

H1

PK2/AIN18/SSI3RX

H2

PK3/AIN19/SSI3TX

B11

PK4/RTCCLK/U7RX

B12

PK5/U7TX

C11

PK6/FAN0PWM1/WT1CCP0

A12

PK7/FAN0TACH1/W T1CCP1

M13

PP0/T4CCP0

L12

PP1/T4CCP1

M5

PP2/T5CCP0

J12

PP3/T5CCP1

J13

PP4/WT0CCP0

L5

PP5/WT0CCP1

D8

PP6/WT1CCP0

K6

PP7/WT1CCP1

D4

PQ0/WT2CCP0

E4

PQ1/WT2CCP1

F5

PQ2/WT3CCP0

N5

PQ3/WT3CCP1

N6

PQ4/WT4CCP0

M2

PA2/SSI0CLK

M3

PA3/SSI0FSS

L4

PA4/SSI0RX

N1

PA5/SSI0TX

F11

PB0/T2CCP0/U1RX

E11

PB1/T2CCP1/U1TX

B6

PB4/AIN10/SSI2CLK/T1CCP0

A6

PB5/AIN11/SSI2FSS/T1CCP1

C2

PD2/AIN13/SSI1RX/SSI3RX/WT3CCP0

C1

PD3/AIN12/SSI1TX/SSI3TX/WT3CCP1

B8

PN1/AIN22

N11

PN6/FAN0PWM4/WT4CCP0

A9

PJ2/T2CCP0/U5RX

C8

PJ3/T2CCP1/U5TX

D5

PJ4/C2_P/T3CCP0/U6RX

L2

PC4/C1_M/U1RX/U4RX/WT0CCP0

L1

PC5/C1_P/U1TX/U4TX/WT0CCP1

K1

PC6/C0_P/U3RX/W T1CCP0

K2

PC7/C0_M/U3TX/W T1CCP1

J3

PH4/SSI2CLK/WT3CCP0

H4

PH5/SSI2FSS/WT3CCP1

H3

PH6/SSI2RX/WT4CCP0

G4

PH7/SSI2TX/WT4CCP1

A8

PN0/AIN23

M12

HIB_L

B2

PD0/AIN15/I2C3SCL/SSI1CLK/SSI3CLK/WT2CCP0

B1

PD1/AIN14/I2C3SDA/SSI1FSS/SSI3FSS/W T2CCP1

A4

PD4/AIN7/U6RX/W T4CCP0

B4

PD5/AIN6/U6TX/WT4CCP1

A3

PD6/AIN5/U2RX/W T5CCP0

B3

PD7/AIN4/NMI/U2TX/WT5CCP1

F1

PE0/AIN3/U7RX

F2

PE1/AIN2/U7TX

E1

PE2/AIN1

E2

PE3/AIN0

A5

PE4/AIN9/I2CSCL/U5RX

B5

PE5/AIN8/I2CSDA/U5TX

A7

PE6/AIN21

B7

PE7/AIN20

K5

PQ5/WT4CCP1

M6

PQ6/WT5CCP0

L6

PQ7/WT5CCP1

G12

OSC0

G13

OSC1

G10

RST_L

TM4E1G31H6ZRBI

F10

VDD1

VDD2

VDD3

VDD4

VDD6

VDD5

PERIPHERAL INTF

20141118 Change D28 PN.20141120 Change EC_BRD_ID,

D28 BAS316

PP1350_EN PP5000_EN PP3300_DSW_EN

4

SYS_SHDN#EC_RST#_R

R176 100K_4

J9

J7

VDD7

D3

VDD8

VDDA

LPC

SMBUS INTF

TO PCH

KB

FAN

PECI

LOAD SW

UNUSED

UART

VR CTRL

JTAG

USB CHARGE CTRL

BRD ID

SYS_SHDN# [10,33,34]

R257

R513

100K_4

3

C323

C336

2.2U/6.3V_4

10u/6.3V_4

K13

VDDC1D6VDDC2J1VDDC3J6VDDC4

PB6/I2C5SCL/SSI2RX/T0CCP0 PB7/I2C5SDA/SSI2TX/T0CCP1

PF0/NMI/SSI1RX/T0CCP0/TRD2

PF1/SSI1TX/T0CCP1/TRD1

PF2/NMI/SSI1CLK/T1CCP0/TRD0

PF3/SSI1FSS/T1CCP1/TRCLK

PG4/I2C1SCL/U2RX/WT0CCP0 PG5/I2C1SDA/U2TX/W T0CCP1

PG7/I2C5SDA/U2TX/W T1CCP0

PH2/FAN0PWM5/SSI3RX/WT5CCP0

PH3/FAN0TACH5/SSI3TX/WT5CCP1

PM2/LPC0CLKRUN_L/T5CCP0/WT5CCP0

PN2/FAN0PWM2/WT2CCP0

PN3/FAN0TACH2/W T2CCP1

PN4/FAN0PWM3/WT3CCP0

PN5/FAN0TACH3/W T3CCP1

PM6/FAN0PWM0/WT0CCP0 PM7/FAN0TACH0/W T0CCP1 PN7/FAN0TACH4/W T4CCP1

EC_SPI_WP_D

VREFA_P

VREFA_M

PB2/I2C0SCL/T3CCP0

PB3/I2C0SDA/T3CCP1

PA6/I2C1SCL PA7/I2C1SDA

PF4/T2CCP0/TRD3

PF5/T2CCP1

PF6/I2C2SCL/T3CCP0 PF7/I2C2SDA/T3CCP1 PG0/I2C3SCL/T4CCP0

PG1/I2C3SDA/T4CCP1

PG2/I2C4SCL/T5CCP0

PG3/I2C4SDA/T3CCP1

PG6/I2C5SCL/W T1CCP0 PH0/SSI3CLK/WT2CCP0

PH1/SSI3FSS/WT2CCP1

PL6/T3CCP0/WT3CCP0 PL7/T3CCP1/WT3CCP1

PJ7/PECI0RX PJ6/PECI0TX

PM3/T5CCP1/WT5CCP1

PJ0/T1CCP0/U4RX

PJ1/T1CCP1/U4TX

PJ5/C2_M/T3CCP1/U6TX

PA0/U0RX

PA1/U0TX

PC0/SWCLK/T4CCP0/TCK PC1/SWDIO/T4CCP1/TMS

PC3/SWO/T5CCP0/TDO

PC2/T5CCP1/TDI

VBAT

WAKE_L

XOSC1 XOSC0

GNDX

GNDA1 GNDA2

GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9

GND10

PP3300_EC

3

C350

0.1U/10V_4

D2 D1

E10

EC_SMB0_CLK

D13

EC_SMB0_DATA

M4

EC_SMB1_CLK

N2

EC_SMB1_DATA

F4

EC_SMB2_CLK

F3

EC_SMB2_DATA

M9

PCH_WAKE_L

N9

PCH_RSMRST_L

L10

NMI_DBG_L

K10

PCH_SUSACK_L

L9

EC_SMI_L

K9

PCH_PWROK

N8

PCH_RTCRST

M8

PCH_SRTCRST

L8

PCH_DPWROK

K8

PCH_HDA_SDO

N7

PCH_SUSWARN_L

M7

PCH_SLP_SUS_L

K7

PCH_UART_RXD_R

L7

PCH_UART_TXD_R

N4

PCH_SLP_S0_L

N3

PCH_SLP_S3_L

K3

PCH_PWRBTN_L

K4

PCH_SLP_S5_L

J4

SYS_PWROK

J2

EC_ACIN

G11

LPC_CLKRUN_L

E12

EC_RCIN_L_R

E13

PCH_BL_PWM_R

G3 D10 L11 N12

C4 C6

H10

PCH_BL_EN_R

H11

EC_BL_PWM

L13

EC_BL_EN

M11

TOUCH_RST_L

C9

PP3300_WLAN_EN

B9

PCH_EDP_VDD_EN_R

C5

EC_EDP_VDD_EN

L3 M1

C10 A10 A11 B10

A2

NC

K12 N13

N10 M10 K11

C3 E3

A1 C7 D9 E5 F9 H5 H9 J11 J5 J8

R517 100K_4 R515 100K_4

BLM18AG121SN1D/0.2A/120ohm_6

20140912 EOD parts, change PN.

C347 1u/6.3V_4

EC_FAN_PWM EC_FAN_TACH BAT_LED1

EC_PECI_RX EC_PECI_TX

EC_UART0_RX EC_UART0_TX

EC_JTAG_TCK EC_JTAG_TMS EC_JTAG_TDO EC_JTAG_TDI

PP3300_RTC EC_WAKE_L

R546 *Short_4

ECGND

SM Bus 0

SM Bus 1 NA

SM Bus 2

PP3300_ECPP3300_EC_ANA

L15

PP3300_EC_ANA

C361

C360

C351

0.01U/16V_4

0.1U/10V_4

R558 *Short_4 R512 *Short_4

R578 0_4 R172 *0_4

TP48

R502 *Short_4

R198 *Short_4

TP53

PP3300_RTC

ECGND

SM BUS ARRANGEMENT TABLE

1u/6.3V_4

ECGND

EC_SMB0_CLK [29]

EC_SMB0_DATA [29]

EC_SMB2_CLK [28]

EC_SMB2_DATA [28]

PCH_WAKE_L [7] PCH_RSMRST_L [7]

PCH_SUSACK_L [7]

EC_SMI_L [8]

PCH_PWROK [5,7] PCH_RTCRST [8,13] PCH_SRTCRST [8]

PCH_DPWROK [7]

PCH_HDA_SDO [8]

PCH_SUSWARN_L [7]

PCH_SLP_SUS_L [7,35] PCH_UART_RXD [17,20] PCH_UART_TXD [17,20]

PCH_SLP_S0_L [7,13]

PCH_SLP_S3_L [7,13,30,31,33,35]

PCH_PWRBTN_L [7]

PCH_SLP_S5_L [7,13,30,35]

SYS_PWROK [5,7,13]

LPC_CLKRUN_L [7]

EC_RCIN_L [10]

PCH_BL_PWM [2,16]

EC_FAN_PWM [25] EC_FAN_TACH [25] BAT_LED1 [28]

PCH_BL_EN [2,16]

EC_BL_PWM [16]

EC_BL_EN [16]

TOUCH_RST_L [16] PP3300_WLAN_EN [10,19,35]

PCH_EDP_VDD_EN [2,16]

EC_EDP_VDD_EN [16]

EC_UARTRX [17,20] EC_UARTTX [17,20]

EC_JTAG_TCK [17] EC_JTAG_TMS [17] EC_JTAG_TDO [17] EC_JTAG_TDI [17]

EC32K_X1

R180 20M_4

EC32K_X2

12

BATT and CHARGER

THERMAL SENSOR

SPI_WP_ME [8,27]

2

12

PP3300_DSW

R1962.2_6

20140912 EOD parts, change PN.

C352

C348

0.01U/16V_4

0.1U/10V_4

ECGND

C128 18p/50V_4

Y1

32.768KHZ C127 18p/50V_4

2

NMI_DBG_L

D8 RB500V-40

NMI_DBG_L FAN_ALERT# PWR_LED1 EC_ACIN TOUCH_RST_L EC_RST#_R EC_LPCPD# LID_OPEN_R

LID_OPEN_R

ACIN[25,29]

D3

RB500V-40

LID_OPEN_L[17,27]

ACIN EC_ACIN

C196

0.1U/10V_4

D/C#

SM BUS/I2C PU(KBC)

BATT and CHARGER / LCD BL

EC_SMB0_CLK EC_SMB0_DATA

Light BAR

EC_SMB1_CLK EC_SMB1_DATA

THERMAL SENSOR

EC_SMB2_CLK EC_SMB2_DATA

PROCHOT_EC

R265 100K_4

EC HIB WAKE SOURCES

ACIN

PWR_BTN_L

C197 0.1U/10V_4

D17 RB500V-40

3

2

R269 47K_4

1

For test only

Size Document Number Rev

KBC TI TM4E1G31H6ZRBI

Date: Sheet of

1

PCH_NMI_DBG_L [8]

R175 10K_4 R174 10K_4 R210 *10K_4 R259 10K_4 R177 10K_4 R504 10K_4 R173 10K_4 R10 10K_4

D16 RB500V-40

R199 *100K_4

R185 4.7K_4 R186 4.7K_4

R209 4.7K_4 R213 4.7K_4

R498 4.7K_4 R499 4.7K_4

3

2

1

Q6

2N7002K

*SHORT_ PAD1

PP3300_EC

R282 10K_4

LID_OPEN_L

PP3300_EC

PP3300_DX

Q24

2N7002K

LID_OPEN_L

C208 0.01U/16V_4

20140912 EOD parts, change PN.

J1

12

PWR_BTN_L

Quanta Computer Inc.

PROJECT :

1

26

PP3300_RTC

H_PROCHOT# [4,17,29,32]

PP3300_RTC

R281 1K_4

EC_WAKE_L

3

Q7

2

R275

2N7002K

47K_4

1

ZHNB

26 39Thursday, December 04, 2014

A

5

Vinafix.com

USB3.0(USB)

D D

C C

PP5000

USBP1-[9]

USBP1+[9]

USB3_RXN0[9] USB3_RXP0[9]

USB3_TXN0[9] USB3_TXP0[9]

20140924 Add C399/D34

12

C117 1u/6.3V_4

C399

*100U/6.3V_3528

USB1_PWR_EN[26]

USBP1USBP1+

USB3_RXN0 USB3_RXP0

C131 0.1u/16V_4 C126 0.1u/16V_4

D34 BZT52-B5V6S(5.6V)

2 1

USB1_OC_L[26]

USB3_TXN0_C USB3_TXP0_C

R497 *Short_4 R500 *Short_4

R194 *Short_4 R191 *Short_4

R179 *Short_4 R171 *Short_4

20141126 EOD parts, change PN.

U8

2

IN1 IN23OUT2

4

EN

1

GND

UP7534ARA8-15

4

OUT3 OUT1

OC#

8 7 6

+

5

220U/6.3V/ESR35_3528

USBP1-_R USBP1+_R USB3_RXN0_R USB3_RXP0_R USB3_TXN0_R USB3_TXP0_R

USBPWR1

C310

USBP1-_R USBP1+_R

USB3_RXN0_R USB3_RXP0_R

USB3_TXN0_R USB3_TXP0_R

1 2

D25 *5V/0.2p_4

1 2

D26 *5V/0.2p_4

1 2

D13 *5V/0.2p_4

1 2

D12 *5V/0.2p_4

1 2

D11 *5V/0.2p_4

1 2

D7 *5V/0.2p_4

C113 1000p/50V_4

3

USB 3.0 Connector

CN6

1

VBUS

1

2

D-

2

3

D+

3

4

GND

5

SSRX-

5

6

SSRX+

7

GND

8

SSTX-

9

SSTX+

9

11111010131312

USB3.0 CONN

12

ADOGND

PP3300_RTC

2

Lid Switch (HSR)

R11

*SHORT_6

12

D2

*VPORT_6

C6

1u/6.3V_4

R12 *100K_4

2

1

3

MR1 YB8251ST23

LID_OPEN_L

12

D1 *VPORT_6

1

27

LID_OPEN_L [17,26]

HOLE(OTH)

HOLE20

*HG-C295D197P2

67 5

8

4

9

123

B B

HOLE22

*HG-C295D98P2

67 5

8

4

9

123

HOLE16

*HG-C295D98P2

8 9

123

HOLE26

*OG-ZHN_MB-1

8 9

123

67 5 4

HOLE18

*HG-C295D98P2

8 9

123

HOLE19 *h-c197d98p2

1

HOLE21

67 5 4

*HG-C295D98P2

8 9

123

HOLE1 *H-C221D150P2

1

67 5 4

CPU

HOLE17

*HG-C295D98P2

8 9

123

HOLE6 *H-C221D150P2

1

HOLE23

67 5 4

*HG-C295D98P2

8 9

123

HOLE2 *H-C221D150P2

1

20140909 Change HOLE19 footprint.

67 5 4

HOLE7 *H-C221D150P2

1

ROM WP#

EMI Cap

HOLE3 *SPAD-C236PT

1

A A

HOLE10 *SPAD-C236PT

1

5

HOLE9 *SPAD-C236PT

1

HOLE5 *SPAD-C236PT

1

HOLE4 *SPAD-C236PT

1

HOLE12 *SPAD-C236PT

1

HOLE8 *SPAD-C236PT

1

HOLE15 *H-C91D91NP

1

HOLE11 *SPAD-C236PT

1

4

HOLE14 *SPAD-C236PT

1

HOLE13 *SPAD-C236PT

1

3

VIN PP3300_DSW

+VCCIN

PP3300_DSW

BATT Enable short pad

HOLE24 *O-ZHN_MB-3

132

HOLE25 *H-te295x295i98bc295d98pt

C106 0.1u/50V_6

1 2

C3 0.1u/50V_6

1 2

C2 0.1u/50V_6

1 2

C4 0.1u/10V_4

1 2

C34 0.1u/10V_4

1 2

SPI_WP_ME_R

132

+VCCIN PP1050_PCH

PP1050_PCH

2

SW1

3

*Lid Switch

20141119 HOLE24 remove BATT_EN# pin3. SW1 change to un-stuff, because enable control by U17.

R573 1K_4

Size Document Number Rev

Date: Sheet of

2

BATT_EN#

14

SPI_WP_ME [8,26]

Quanta Computer Inc.

PROJECT :

USB3/Hole

BATT_EN# [25,29]

1

ZHNB

A

27 39Thursday, December 04, 2014

A

Vinafix.com

B

C

D

E

Thermal Sensor(THM)

4 4

3 3

20140925 Q25/R585 mark OVERT# power PP3300_DX change to PP3300_EC.

2 2

Light sensor & TP (SER)

1 1

FAN_ALERT#[26]

EC_RST#_Q OVERT#

EC_RST#_R[26]

I2C1_SDA_GPIO6[10,16]

I2C1_SCL_GPIO7[10,16]

EC_SMB2_CLK[26] EC_SMB2_DATA[26]

ALS_INT_L[2]

R489 *Short_4 R583 *0_4 R584 *Short_4

EC_RST#_Q

2

1

Q25 *AO3409

*

un-stuff.

R324 R323 R326

U26

8

SCLK

7

SDA

6

ALERT#

4

OVERT#

G781P8

ADDR=7H_0x4C

Place oo PCB BOT Local Temp.

3

SEN_SDATA

*Short_4

SEN_SCLK

*Short_4

ALS_INT_R LS_SET

*Short_4

INT PU at CPU side

A

PP3300_DX

1

VCC

2

DXP

3

DXN

5

GND

OVERT#

SDA6VDD

5 4

SCL INT

GND

REXT

*ISL29023

ADDR: 1000100

C289 0.1u/10V_4

C299 2200p/50V_4

R585 *10K_4

PP3300_DX

U1

1 2 3

B

THM_DXP

THM_DXN

Place oo PCB TOP Remote Temp.

PP3300_EC

R327 *Short_4

+3V_LS

R328 *499K/F_4

2

Q20

MMBT3904-7-F

1 3

C232 *0.1u/10V_4

FUNCTION DB

USB2_PWR_EN[26]

USB2_OC_L[26]

L19

USBP4-[9]

USBP4+[9]

USBP4USBP4+

1

DLW21HN900SQ2L_C/330mA/90ohm

20141201 stuff L18/L19, remove R549/R550/R551/R552.

HSR

+3VPCU LID_OPEN_L GND +3VPCU

LED

LED x 4 GND +3V x 2

USB

GND x 2 USBP0+ USBP0CR_DET

CR +3V x 2

USBP6+ USBP6GND x 2

C

443 1

3 2

2

PP5000

USBP4-_R USBP4+_R

C214 1u/6.3V_4

U18

2

IN1 IN23OUT2

4

EN

1

GND

UP7534ARA8-15

OUT3 OUT1

D

OC#

8 7 6

5

USBPWR2

12

C364

*100u/6.3V_1206

Need place on DB side

USBP6+[9]

USBP6-[9]

PP3300_DX

USBPWR2

Size Document Number Rev

Date: Sheet of

28

USBPWR2

C204 1000p/50V_4

L18

1

DLW21HN900SQ2L_C/330mA/90ohm

footprint 88511-2001-20p-l DFFC20FR043

PP3300_DSW

BAT_LED0[26] BAT_LED1[26] PWR_LED0[26] PWR_LED1[26]

SD_CDZ[17]

USBP4+_R USBP4-_R

USBP6+_R USBP6-_R

Quanta Computer Inc.

PROJECT :

DB/ALS/Thermal sensor

1 443

2

2 3

CN9

20 19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2 1

FUNCTION/B

E

20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

USBP6+_R USBP6-_R

22 21

ZHNB

28 39Thursday, December 04, 2014

22 21

A

5

Vinafix.com

dcjk-2dc3079-007511f-2p

PJ1

2 1 3 4

POWER_JACK

D D

20140912 EOD parts, change PN. 20141016 Change DC-in Part number. (new module) 20141201 Change DC-in footprint.

C C

ACIN[25,26]

ACPRESENT[7]

PC7

0.1u/50V_6

2200p/50V_6

D10RB500V-40

PC8

PP3300_RTC

PR55 10K_4

VA

6

0410 please confirm battery_en

PC25

0.1u/50V_6

B B

PJ2

89 7 6 5 4 3 2 1

10

C114F3-108A1-L_Batt_Conn

A A

20140909 Implant for battery enable. 20141119 Change PR73 to un-stuff, because enable control by U17.

PR73

BATT_EN#

*0_4

PC30

*100p/50V_4

PR76 100_4

PC28

*47p/50V_4

PR74 100_4

Add ESD diode base on EC FAE suggestion

5

PR75 100_4

PU6

1

CH1

2

VN CH23CH3

*IP4223-CZ6

PC29 *47p/50V_4

CH4

PL2 0_8

PL1 0_8

PR52

4.7K_4

EC_SMB0_CLK [26]

VP

PR53 100K_4

215

PQ7 2N7002DW

4 3

BAT_TEMP

PR77 1M_4

EC_SMB0_DATA [26]

6

EC_SMB0_DATA

5

PP3300_RTC

4

EC_SMB0_CLKBAT_TEMP

VA1

PC21

0.1u/25V_4

PP3300_RTC

BAT-V

BATT_EN# [25,27] BAT_TEMP [26]

PP3300_EC

4

PC9

0.1u/50V_6

PD4 1N4148WS

recommend 200mA at least.

PR135 *SHORT_6

EC_SMB0_DATA

EC_SMB0_CLK

PR153 10K_4

PR139 *10K_4

PR59 316K/F_4

PR60 *100K_4

PR150 100K/F_4

3

2

24737_BM#

PQ8 *2N7002K

1

4

PD2 SMAJ20A

2 1

PR136

PR145 *Short_4

PR147 *Short_4

PC87

0.01u/25V_4

ICMNT[26]

63.4K/F_4

24737_ACDET

24737_VCC

24737_ILIM

24737_CMPIN

PC78

0.47u/25V_6

PR138 *100K_4

PC79

68n/10V_4

PR140 10K/F_4

PR137 20_1206

24737_BM#

24737_CMPOUT

20140912 EOD parts, change PN.

PC10

0.1u/50V_6

PC73

0.1u/50V_6

6

20

5

8

9

11

3

10

4

PR56 *1.62K/F_4

ACDET

VCC

ACOK#

SDA

SCL

BM#

CMPOUT

ILIM

CMPIN

IOUT

7

PC82 100p/50V_4

PR26 220K/F_4

PR27 220K/F_4

PC77

0.1u/50V_6

2

ACP

PU13

BQ24707A

21

3

PQ12 AOL1413

1 3

4

1 6 2

5

3

4

PQ3

IMD2AT108

24737_ACP

24737_ACN

PC74

0.1u/50V_6

1

ACN

GND

GND22GND24GND23GND

24737_CMPOUT

16

24737_REGN

REGN

17

24737_BST

BTST

18

24737_DH

HIDRV

19

24737_LX

PHASE

15

LCDRV

14

PGND

13

PR152

SRP

12

PR151

SRN

25

PR54

*0_4

Limit set on 60W/3.16A

3

52

PR146 *SHORT_6

PP3300_DX

PR49

*100K_4

2

VA2

PD3

SBR1045SP5-13

1 2

PR34 *Short_4

24737_SRP

10_6

24737_SRN

7.5_6

3

PQ6 *2N7002K

1

3

1 2

D/C# [26]

PC88 1u/16V_6

PD5 RB500V-40

PC83 47n/50V_6

PQ19

MDV1528

PQ18 MDV1595S

PC93

0.1u/25V_4

PC91

0.1u/25V_4

PC92

0.1u/25V_4

H_PROCHOT# [4,17,26,32]

PR125

0.01/F_0612

4

2

VIN

PR129 *Short_4

24737_ACN

PC62

0.1u/50V_6

24737_ACP

PR130 *Short_4

VIN

PC81

52

3

52

3

2200p/50V_6

1

PL7

6.8uH_7X7X3

PR58 *4.7_6

1

PC22 *680p/50V_6

PC75

10u/25V_8

20141201 Capacitor 4.7uF Change to 10uF.

PR155

0.01/F_0612

1 2

PR154 *Short_4

24737_SRP 24737_SRN

REGN MAX voltage 6.5V V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr =0.793V for 3.965A current limit

Pin10 ILIM=0.793V Rsr = 0.01ohm

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

PC61 2200p/50V_6

PR156 *Short_4

1

PQ9 AOL1413

1 3

PR127 33K/F_4

PQ15 2N7002K

PC26

2200p/50V_6

Charger(BQ24737RGRR)

52

4

PR131 10K_4

3

2

1

BAT-V24737_DL

PC98

10u/25V_1206

1

PC94

10u/25V_1206

Quanta Computer Inc.

PROJECT :

ZHNB

29 39Thursday, December 04, 2014

29

A

5

Vinafix.com

4

3

2

1

TDC : 0.75A PEAK : 1A Width : 40mil

D D

TDC : 0.38A PEAK : 0.5A Width : 20mil

PC102

0.22u/10V_4

+DDR_VTT_RUN

PP1350_VREF

PR66 *SHORT_6

PC108 10u/6.3V_6

PC109 10u/6.3V_6

PP5000_DSW

30

Greater than or equal 40mil

PP5000

PP3300_EC

PC104

5

PAD21PAD

VTTREF

TPS51216RUKR

VDDQSNS9REFIN8REF

51216_REFIN

PC100

0.01u/25V_4

20140912 EOD parts, change PN.

PU15

VTTSNS

VTTGND

PAD

24

25

2

VTT

VLDOIN

V5IN

DRVH

VBST

SW

DRVL

PGND

GND

PAD23PAD

7

20

PGOOD

17

S3

16

S5

19

MODE

18

TRIP

26

PAD

51216_REF

PR68 10K/F_4

PR67

30.1K/F_4

22

6

PR164

100K/F_4

C C

PP1350_PGOOD[26]

51216_S3

PP1350_EN[26]

PR162

*Short_4 PR78

200K/F_4 PR79

61.9K/F_4

51216_S5

51216_MODE

51216_TRIP

VREF=1.8V

PC101

B B

A A

51216_S3 51216_S5

PR81

*0_4

PCH_SLP_S3_L PCH_SLP_S5_L

OCP=6A L ripple current =(19-1.35)*1.35/(3.3u*400k*19) =0.95A Vtrip=[6-(0.95/2)]*14mohm =0.07735V Rlimit=0.07335/10uA*8=61.88Kohm

PR163

*Short_4

PR80

*0_4

0.1u/10V_4

51216_S3

3

1

4

10u/6.3V_6

12

14

51216_DRVH

15

51216_VBST

13

51216_SW

11

51216_DRVL

10

PR158 *SHORT_6

Mode Frequency Discharge mode

200K 400K Tracking Discharge

100K 300K Tracking Discharge

S0

S3 (mainon off)

*Short_4

PR161

2/F_6

PR160

PC105

0.1u/50V_6

S3 S5 1 0

S4/S5

5

4

PC103 1u/10V_4

3

PR159 *0_4

PQ21 MDV1528

4

PQ20 MDV1595S

1 1

52

3

1

51216_SW

52

3

1

ON ON ON OFF

PC106

2200p/50V_4

3.3uH_7X7X3

PR72 *4.7_6

PC27 *680p/50V_6

ON ON

OFF OFF0 0

10u/25V_8

PL9

20141201

PC31

Capacitor 4.7uF Change to 10uF.

PC107

0.1u/50V_6

Close to output cap

VTTREF+1.35VSUS

OFF

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

VIN

+

PC99

330u/2V_7343

Quanta Computer Inc.

PROJECT :

DDR 1.35V(TPS51216)

Thursday, December 04, 2014

1.35 Volt +/- 5% TDC : 3.35A PEAK : 4.46A OCP : 6A Width : 140mil

PP1350

ZHNB

1

A

3930

5

Vinafix.com

4

3

2

1

PP5000_DSW

DRVH

VBST

SW

DRVL

GND

4

FB

PR82

*Short_4

9 10 8 6 11

51211V_DRVH

51211V_SW 51211V_DRVL

51211V_FB

D D

PP3300_EC

PR90 100K/F_4

PP1050_PGOOD[5,26]

SUSP_VR_EN[26]

C C

OCP=6A L ripple current =(19-1.05)*1.05/(3.3u*290k*19) =1.036A Vtrip=[6-(1.036/2)]*14mohm =0.0767V Rlimit=0.0767/10uA*8=61.36Kohm

PR88 *Short_4

PR87 100K/F_4

PR89 61.9K/F_4 PR83 470K/F_4

20140912 EOD parts, change PN.

51211V_EN 51211V_VBST 51211V_TRIP 51211V_TST

1

PGOOD

3

EN

2

TRIP

5

TST

12

GND

7

V5IN

PU7

TPS51211DSCR

GND13GND14GND15GND

16

PC33 1u/10V_4

PP5000

PR91 *SHORT_6

PR85 *0_4

PC36

0.1u/50V_6

PQ11

MDV1595S

VIN

PC32

52

PQ10

4

MDV1528

3

1

52

3

1

2200p/50V_6

PL3

3.3uH_7X7X3

PR1 *4.7_6

PC2 *680p/50V_6

PC1 10u/25V_8

20141201 Capacitor 4.7uF Change to 10uF.

PR84

5.1K/F_4

PR86 10K/F_4

PC38

0.1u/50V_6

+

PC43

330u/2V_7343

1.05 Volt +/- 5% TDC : 3.63A PEAK : 4.84A OCP : 6A Width : 150mil

31

PP1050_PCH_SUS

place at PQ37 area

B B

A A

5

PP1050_PCH_SUS

PC39 1u/10V_4

PR165 *Short_4

PCH_SLP_S3_L_RPCH_SLP_S3_L

4

PR92

100K/F_4

PU8

A2

IN1

B2

IN2

C2

EN

TPS22964CYZPR

OUT1 OUT2

GND

A1 B1 C1

3

PP1050_PCH

PCH_SLP_S3_L[7,13,26,30,33,35]

Size Document Number Rev

+1.05V(TPS51211)

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

2

Thursday, December 04, 2014

PCH_SLP_S3_L

Quanta Computer Inc.

PROJECT :

ZHNB

1

3931

A

5

Vinafix.com

PP3300_DSW 51622_VREF

PR7

56_4

PR108

PC58 *330p/50V_4

PC57 *0.01u/50V_4

1_6

PC45

1u/6.3V_4

PR11

*56_4

VR_SVID_CLK VR_SVID_ALERT# VR_SVID_DATA

PR116 *Short_4

D D

H_PROCHOT#[4,17,26,29]

VR_SVID_CLK[5] VR_SVID_ALERT#[5] VR_SVID_DATA[5]

PR101 *Short_4

PR105 *0_4

PR6 *Short_4

PR100 *Short_4

PP1050_PCH

C C

VCORE_PGOOD[5,10]

VCORE_EN[26]

VRON_CPU[5]

VCC_SENSE[5] VSS_SENSE[12]

Parallel

B B

51622_VRON

PR8 100K/F_4

Close to VR

PR103

PR106

PC46

*75/F_4

130/F_4

0.1u/10V_4

PP3300_DXPP3300_DX

PR5

PR102

*100K/F_4

+VCCIN

PR94 *10_4

PR95 *10_4

Close to the CPU side.

PC50

0.33u/6V_4

51622_SKIP# 51622_VRON

51622_VFB

51622_GFB

51622_VREF

PR115 *Short_4

PR104

PR12

30 31 32

1 3 7

8 24 23

51622_COMP

PC52

*100p/50V_4

PR112 2.55K/F_4

PR113

5.76K/F_4

9.31K/F_4

150K/F_4

VR_HOT VCLK ALERT VDIO PGOOD SKIP VR_ON VFB GFB

PR24

PR107

PR13

51622_VDD

2

VDD

26

10K/F_4

PC54

1500p/50V_4

4

Place NTC close to the VCORE Hot-Spot.

PR109

499K/F_4

PR15

75K/F_4

51622_O-USR

51622_F-IMAX

51622_VREF

9

10

27

VREF

O-USR

F-IMAX

PU10

TPS51622ARSM

OCP-I12IMON

DROOP25COMP

13

51622_DROOP

51622_IMON

51622_OCP-I

3

PP5000_DSW

PR23 *Short_4

PP5000

PR22 *0_4

*90.9K/F_4

150K/F_4

51622_B-RAMP

51622_SLEWA

14

11

15

SLEWA

B-RAMP

GND

29

42

PR111

523K/F_4

PR110

100K/F_4

PR18

THERM

PC49

39K/F_4

51622_THERM 51622_V5A

51622_VBAT

28

16

V5A

33

4700p/25V_4

PP3300_DSW

VBAT

PAD

PAD34PAD35PAD36PAD37PAD38PAD39PAD40PAD41PAD

PWM1 PWM2

CSP1 CSN1 CSN2 CSP2

PR16

N/C

PU3 N/C

100K/F_4_4250NTC

9.09K/F_4

6 5 4 17 18 19 20 21 22

PR14 *SHORT_8

PC51

1000p/50V_4

51622_PWM1 51622_PWM2 51622_NC 51622_CSP1 51622_CSN1 51622_CSN2 51622_CSP2 51622_PU3

PR96

PR114

*39.2K/F_4

PR17

20/F_6

PP3300_DSW

PC48

2.2u/10V_4

PR9 *0_4

PR20

10K/F_4

PP5000_DSW

PP5000

PR128 *Short_4

PR134 *0_4

51622_SKIP# 51622_PWM1

CS_BSTR1

CS_BST1

PR93

2.2/F_6

20141029 PC40 EOD, change PN.

PC41 1u/10V_4

1

SKIP#

8

PWM

6

BOOT_R

7

BOOT

PC40

CSD97374CQ4M

0.22u/25V_6

20140827 Change PU9 footprint.

51622_CSP1

51622_CSN1

PU9

2

VDD

VSW

PGND

PC55 *0.1u/25V_4

PC56 *0.1u/25V_4

VIN

PAD

2

5 4 3 9

Close to the VR side.

CS_SW1

PR98

2.94K/F_4

PC53

0.12u/10V_4 PR97

10K/F_4_3435KNTC

Close with phase1 inductor

1 2

PR4

2.2_6

PC5

1000p/50V_6

PR25

20141201 Capacitor 4.7uF Change to 10uF.

PC4

10u/25V_8

DCR= 1mOhm

PC35

0.1u/10V_4

PC6

10u/25V_8

PC37

47u/6.3V_8

PC44

0.1u/50V_6 PL4

0.24uH_7X7X4

3

4

PR2 2.21K/F_4

22.6K/F_4

PR3 *Short_4

1

PCN1

1

2

PC42

PC3

2

2200p/50V_4

ECAP_CONN

+

PC34

47u/6.3V_8

*330u/2V_7343

+VCCIN TDC : 10A PEAK : 32A OCP : 40A

VCORE Load Line :

-2mV/A

32

VIN

+VCCIN

PR118 *Short_4

51622_PU3

A A

5

4

51622_CSP2

51622_PWM2

51622_CSN2

PR117 *Short_4

PR19 *Short_4

PR10 *0_4

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

+VCCIN(TPS51622)

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

3

2

Thursday, December 04, 2014

PROJECT :

ZHNB

1

A

3932

1

Vinafix.com

2

3

4

5

PP3300_DSW

PR141 *SHORT_8

PP3300_DX

PR148

A A

PCH_SLP_S3_L

PP3300_DSW

PCH_SLP_S3_L[7,13,26,30,31,35]

B B

*100K/F_4

*Short_4

PC84

1000p/50V_4

PP3300_DSW

PCH_SLP_S3_L

*100p/50V_4

Thermal protection

PC86

PC80

10u/6.3V_6

8.06K/F_4

PC85

1500p/50V_4

PC76

0.1u/25V_6

PR57

VIN

4/22 modify, SEL un-stuff.for thernal protection need discuss before next build

PD1 DA2J10100L

PR33 1M_6

2

customer's circuit is VIN = PP3300_PCH EN = PP3300_PCH

16

14 15

PR61 121K/F_4

PC89

0.01u/25V_4

20140912 EOD parts, change PN.

1

PQ5 AO3409

PU14 TPS54318RTER

VIN

1

VIN

2

VIN PWRGD EN

7

COMP

8

RT/CLK

9

SS

22

PAD17PAD18PAD19PAD20PAD21PAD

BOOT

VSNS

GND GND

AGND

PP1500_PCH_TS

1.5Volt +/- 5% TDC : 0.38A

100K/F_4PR143

PR144 113K/F_4

PEAK : 0.5A Width : 20mil

PC95

0.1u/10V_4

10

PH

11

PH

12

PH

13

PR149 *SHORT_6

6 3 4 5

PC90

0.1u/50V_6 PR142

1.5V_VSNS

PL8

1uH_7X7X3

R1

R2

V0=0.8*(R1+R2)/R2

PC96

10u/6.3V_6

PR157 *SHORT_8

PC97 10u/6.3V_6

33

PR28

PP5000_EN[26,34]

C C

Need fine tune for thermal protect point

Note placement position

PP5000_EN

3

PR21

2

*Short_4

1

D D

PP5000_EN

PR99

10K/F_4_4250NTC

PQ1 2N7002K

PR30

1.96K/F_4

LM393_PIN2

*Short_4

PP5000_DSWPP5000_DSW

PR31 200K/F_4

2.469V

PR32 200K/F_4

2

PQ2

DTC144EU

1 3

84

3

+

2

-

5

+

6

-

For EC control thermal protection (output 3.3V)

1

PU11A BA10393F

7

PU11B BA10393F

3

PC14

0.1u/50V_6

PR39 *SHORT_6

SYS_SHDN# [10,26,34]

PR38 200K_6

PC13

0.1u/50V_6

2

3

2

PQ4 2N7002K

1

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

+1.2V/+1.5V/+1.8V/Thermal protect

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

3

4

Thursday, December 04, 2014

PROJECT :

ZHNB

A

3933

5

3933

5

Vinafix.com

4

3

2

1

SYS_SHDN#

D D

PP5000

VIN

PP5000 5 Volt +/- 5% TDC : 3.08A

PCN2

1

2

ECAP_CONN

PC67 10u/25V_8

20141201 Capacitor 4.7uF Change to 10uF.

PEAK : 4.1A OCP : 5A Width : 125mil

PL6

2.2uH_7X7X3

C C

+

PC68

150u/6.3V_3528

PC71

0.1u/50V_6

PR126

15.4K/F_4

PR44 10K/F_4

PR48 *4.7_6

PC18

*680p/50V_6

PC17 2200p/50V_6

PQ17

MDV1528

PQ16

MDV1595S

PP5000_PGOOD[26]

52

1

52

1

SYS_SHDN# [10,26,33] PP3300_DSW_EN [26]

PP5000_DSW PP3300_RTC

PR40 100K/F_4

PC69 10u/6.3V_6

13

7

PGOOD EN1 DRVH1 VBST1 SW1 DRVL1 VFB1 VO1

VCLK

19

VREG5

TPS51225RUKR

CS11CS2

51225_CS1

20 16 17 18 15

2

14

5

51225_CS2

PU12

PC65 0.1u/25V_4

51225_VIN

12

3

VIN

VREG3

DRVH2

VBST2

DRVL2

GND23GND24GND25GND

26

EN2

SW2

VFB2

GND GND

PR45

*SHORT_6

PC66 4.7u/6.3V_6

6 10 9 8 11 4 21 22

PR132 *0_4

PP3300_EC

PR120 *Short_4

PP5000_EN 51225_DH1 51225_VBST1 51225_SW1 51225_DL1 51225_FB1

PP5000_PGOOD

SYS_SHDN#

PP5000_EN[26,33]

4

3

PC70

PR133

0.1u/50V_6

1/F_6

4

3

PP3300_DSW_EN

PR119 *Short_4

51225_DH2 51225_VBST2 51225_SW2 51225_DL2 51225_FB2

PR123 *SHORT_6

SYS_SHDN#

PR36 *0_4

PP3300_DSW_EN

PC60

PR121

0.1u/50V_6

1/F_6

34

VIN

PC16 2200p/50V_6

52

PQ13

4

MDV1528

3

1

PL5

2.2uH_7X7X3

52

PQ14 MDV1595S

3

1

PR37 *4.7_6

PC15 *680p/50V_6

PC64

4.7u/25V_8

PP3300_DSW

3.3 Volt +/- 5% TDC : 5.01A PEAK : 6.68A OCP : 8A Width : 210mil

PR124

6.81K/F_4

PR43 10K/F_4

PC59

0.1u/50V_6

PP3300_DSW

+

PC63 150u/6.3V_3528

OCP:8A

OCP:5A

L(ripple current) =(9-5)*5/(2.2u*0.3M*9) =3.367A

B B

A A

Iocp=5-(3.367/2)=3.316A Vth=(3.316A*14mOhm)+1mV=47.43mV R(Ilim)=(47.43mV*8)/10uA =37.94K

5

PR50

VIN PP3300_RTC

4

*0_6

PC19

*10u/25V_8

20141201 Capacitor 4.7uF Change to 10uF.

2

1

PU3

IN

GND

*TLV70433

OUT

NC NC

PR42 76.8K/F_4

PR47 38.3K/F_4

3 5 4

3

PR122 *SHORT_6

PR51 *0_6

PC20 *1u/10V_4

Size Document Number Rev

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

2

Thursday, December 04, 2014

L(ripple current) =(9-3.3)*3.3/(2.2u*0.355M*9) ~2.676A Iocp=8-(2.676/2)=6.662A Vth=(6.662A*14mOhm)+1mV=94.27mV R(Ilim)=(94.27mV*8)/10uA =75.41K

Quanta Computer Inc.

PROJECT :

SYSTEM 5V/3V (TPS51225)

1

ZHNB

A

3934

5

Vinafix.com

4

3

2

1

35

D D

PCH_SLP_S3_L[7,13,26,30,31,33]

PP3300_DX_EN[26]

PP3300_WLAN_EN[10,19,26]

C C

PP3300_DSW

PCH_SLP_S3_L_R PCH_SLP_S5_L_R

PC24 1u/10V_4

PR65

*100K/F_4

PCH_SLP_S3_L

PP3300_DX_EN

PP3300_WLAN_EN

PU5

A2

IN

B2

EN

TPS22930

OUT

GND

PR166 *Short_4

PR167 *Short_4

PR168 *Short_4

A1

PR70 *SHORT_8

B1

PCH_SLP_S3_L_R

PP3300_DX_EN_R

PP3300_WLAN_EN_R

PP3300_PCH

PP3300_DSW

PC12 1u/10V_4

PC11 1u/10V_4

PP3300_DX_EN_R

PR41

100K/F_4

PR29

100K/F_4

PU2

A2

IN1

B2

IN2

C2

EN

TPS22964CYZPR

PU1

A2

IN

B2

EN

TPS22930

OUT

GND

OUT1 OUT2

GND

A1 B1 C1

A1 B1

PR46 *SHORT_8

PR35 *SHORT_8

PP3300_DX

PP3300_PCH_SUS

please near cpu

PR71 *SHORT_8

PP3300_DX

B B

20140902 Power line layout width non-enough, change to PP3300_DSW. PR71 cancel

*

PR62 mark

PR62 *0_8

PC23 1u/10V_4

*

PP3300_WLAN_R

PP3300_WLAN_EN_R

PR63

100K/F_4

PR69 *0_8

PU4

A2

IN1

OUT1

B2

IN2

OUT2

C2

EN

GND

TPS22964CYZPR

please near cpu

+WL_VDDPP3300_WLAN

A1 B1 C1

PR64 *SHORT_8

PCH_SLP_SUS_L[7,26] PCH_SLP_S5_L[7,13,26,30]

4/24 modify

R115 *Short_4

PCH_SLP_S5_L

PCH_SLP_S5_L_R

R112 *0_4

20140901 Change PU4 switch

A A

Quanta Computer Inc.

5

PROJECT :

Size Document Number Rev

Load Switch

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

Thursday, December 04, 2014

Date: Sheet of

4

3

2

Thursday, December 04, 2014

PROJECT :

ZHNB

A

3935

1

3935

5

Vinafix.com

Version

Model

1A-1

ZHNB

D D

C C

2014/08/21 Page16: LCD conn. I2C1_SDA_GPIO6_CONN pin reserve a 15pF capacitor. 2014/08/21 Page16: Touch panel level shift Q13 FET change to PJT138K. 2014/08/22 Page19: Wifi U27 change to another onboard module 7260SDW. 2014/08/22 Page21: NGFF 3G / SIM mark *.

1A-2

2014/08/27 Page19: Change wifi onboard module 7260SDW footprint. 2014/08/27 Page19: Pin W_DISABLE# / W_DISABLE#2 add 100K resis tance pulldown. 2014/08/27 Page16: Change LVDS conn. CN3 footprint. 2014/08/27 Page18: Change HDMI conn. CN5 footprint. 2014/08/27 Page21: Change NGFF 3G conn. CN8 footprint. 2014/08/27 Page25: Change touchpad board conn. CN10 footprint. 2014/08/27 Page32: Change VCORE PU9 footprint.

1A-3

2014/09/1 Page34: Change LDO PU4 switch.

1A-4

2014/09/2 Page35: LDO PR71 cancel *PR62 mark *. 2014/09/2 Page19: Wifi 100K resistance R631/R632 mark *

1A-5

2014/09/9 Page29: Implant PR73 for battery enable. 2014/09/9 Page19: Change wifi onboard module 7260SDW footprint.

1A-6

2014/09/12 Page16: C16 EOD, change PN. 2014/09/12 Page21: C379/C380/C381/C382 EOD, change PN. 2014/09/12 Page23: L4/L7 EOD, change PN. 2014/09/12 Page26: C208/C352/C360/L15 EOD, change PN. 2014/09/12 Page29: PC87/PJ1 EOD, change PN. 2014/09/12 Page30: PC100 EOD, change PN. 2014/09/12 Page31: PR83 EOD, change PN. 2014/09/12 Page33: PR89 EOD, change PN.

1B-1

2014/09/24 Page26: USB3.0 U8 P1/P2 add C399/D34.

1B-2

2014/09/25 Page28: Thermal MOSFET Q25/Resistance R585 mark *un-stuff. OVERT# power PP 3300_DX change to PP3300_EC.

1B-3

2014/10/14 Page19: Change wifi onboard module 7260SDW PN.

1B-4

2014/10/16 Page29: Change DC-in PN. (new module)

1B-5

2014/10/21 Page13: Intel require modify ITP CN15 P9/P51 add PP1050_PCH_SUS, P 50 PP1050_PGOOD change to VCCST_PWRGD.

1C-1

2014/10/29 Page23: Codec pin27 add 100K resistance 2014/10/29 Page31: PC40 EOD, change PN.

1C-2

2014/11/07 Page26: Change U5 EC PN.

1C-3

2014/11/12 Page23: C193 change to 0.1uF. 2014/11/12 Page all: 0 ohm resistance change to short pad.

1C-4

2014/11/18 Page23/Page26: change D27/D28 PN.

1C-5

2014/11/19 Page25: U17 change part NO. same as 0C7, add MOSFET Q33. 2014/11/19 Page27: Remove HOLE24 BATT_EN# pin3, because enable control by U17. 2014/11/19 Page27: Lid SW change to un-stuff, because enable by U17. 2014/11/19 Page29: PR73 change to un-stuff, because enable control by U17.

1C-6

2014/11/20 Page26 Change EC_BRD_ID, ID2 change to High, ID3 change to Low, because EC change c ode.

1C-7

2014/11/25 Page16 Change TPS/R361/Q13 to un-stuff, because no touch panel.

1C-8

2014/11/26 CH4102K1B03 EOS parts, change to CH4103K1B08

1D-1

2014/12/01 Page22 Change TPM power. 2014/12/01 Page26 Change EC new PN. 2014/12/01 Page27 Stuff L12/L18/L19, remove R371/R372/R549/R550/R551/R552. 2014/12/01 Page29 Change DC-in footprint. 2014/12/01 PC1/PC19/PC31/PC6/P67/PC75 4.7uF change to 10uF.

4

CHANGE LIST

3

2

1

2A

B B

3A

A A

PROJECT MODEL :

DOC NO.

PART NUMBER: DRAWING BY: REVISON:

5

Chrome APPROVED BY:

4

DATE:

3

2

Quanta Computer Inc.

PROJECT :

ZHNB

PROJECT :

ZHNB

PROJECT :

Size Docum ent Numb er Rev

Change list

Date: Sheet of

Thursday, Dec ember 04, 2 014

Date: Sheet of

Thursday, Dec ember 04, 2 014

Date: Sheet of

Thursday, Dec ember 04, 2 014

ZHNB

1

A

3939

QUANTA ZM3 Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual