Quanta ZL2 DA0ZL2MB8F8, Aspire 1690, Aspire 3510, TravelMate 4100, TravelMate 4600 Schematic

1

5VPCU

5V / 3.3V / 12V

Page : 35

A A

2.5V / 1.25V

Page : 36

1.5V / 1.05V / 1.8V

B B

Page : 37

3V_ALWAYS
+12V
+5V
3V_S5

3VSUS
5VSUS

2.5VSUS
+2.5V
+1.8V
MVREF_DM
SMDDR_VTERM

1.5V_S5
+1.5V
AGP_VCC (+1.5V)

1.2VCCT
VTT

2

CLOCK GEN

ICS
ICS954201

Page : 2

DDR-SODIMM1

Page:9~10

DDR-SODIMM2

Page:9~10

3

CLK_SDRAM0~5,
CLK_SDRAM0~5#

333MHZ DDR

4

Centrino

DORTHAN
CELEROM-M

INTEL Mobile_479 CPU

ALVISO

1257 BGA
915GM/PM

Page : 5 ~ 8

Page : 3 , 4

HOST BUS 400MHz

5

6

CRANE ( ZL2 )

PCIE

LVDS

RGB

TVOUT

ATI

M24P/M26P

64M /
128M

Page : 11 ~ 14

EXT_LVDS

EXT_CRT

EXT_TV-OUT

INT_LVDS

INT_CRT

INT_TV-OUT

7

ED@ INT. VGA WITH DOCK
ID@ INT. VGA WITH DOCK
ND@ W/O DOCKING

要打

SWITCH
CIRCUIT

BOM MARK
E@ EXT VGA
I@ INTVGA
SA@ SATA
F@ FIXED ODD
SW@ SWAPPABLE ODD
3@ 3in1 n
N@ NEW CARD
4@ 4401 n
5@ 5705M
D@ DOCKING

8

要打

要打

要打

要打

打

要打

打

要打

要打

CRT

Page:17

LVDS

Page:16

TV-OUT

Page:16

要打

DVI
CH7307

DOCKING/DVI

SATA - HDD

Page:21

Page:15

Page: 33

IDE - HDD

CPU CORE

Page : 34

+1.2V

Page : 38

BATTERY

C C

CHARGER

Page : 39

VCC_CORE

VGA_CORE

2.5V_VGA

BATTERY
SELECT

Page : 40

Page:21

IDE-ODD

Page:21

MEDIA BAY

Page:21

AUDIO CODEC

CONEXANT
20468-31

Page:27

AMP

MAX9750

Page:28

CONEXANT

MODEM

20493-21

Page:27

SATA

ATA 66/100

AC97

DMI I/F

ICH6-M

609 BGA

Page : 18 ~ 20

LPC

NS

KBC(97551)

Page : 29

PCIE

PCI BUS

USB 2.0

NEW CARD

Page : 32

NS

SIO (87383)

Page : 31

TI

PCMCIA+1394

+3 IN 1

PCI7411

Page: 23

MINI-PCI

Wireless LAN
Modem/LAN

Page : 22

BROADCOM

10/100/1G LAN

4401 / 5705M

Page:25

BOTHHAND

TRANSFORMER

Page:26

3 IN 1

Page: 24

PCMCIA

Page: 24

1394

Page: 23

RJ45

Page:26

MIC IN

D D

PM :

紀明進

EE Laerer :
ME Leader : M

Sunyu Jih

劉鳴豹

林哲敏

1

Page:27

Selmon Liu

LINE
IN

ill Lin

2

SPEKER

Page:28Page:27

LINE
OUT

Page:28

RJ11

Page:27

3

DOCKING
PS2

Page:33

Touchpad

PCI ROUTING TABLE

REQ0# / GNT0#
REQ2# / GNT2#
REQ1# / GNT1#

4

IDSEL

AD24
AD19
AD17

Keyboard

Page:30Page:30

IrDA

Page:31

INTERUPT

INTA#
INTB# , INTD#
INTC#,INTD#,INTA#

DOCKING
Print Port

Page:33

DOCKING
COM Port

Page:33

DEVICE

BROADCOM LAN
MINI-PCI
TI 7411

5

SYSTEM 3
USB PORT

Page : 22

USB2,3,5

6

DOCKING 2
USB PORT

Page : 22

USB0,1

Size Document Number Re v

Date: Sheet

MINI-USB

Page: 22

Quanta Computer Inc.

BLOCK DIAGRAM

7

USB4

REV.E

PROJECT : ZL2

141Wednesday, December 22, 2004

8

F

of

1

2

3

4

5

6

7

8

REVB: POP R203 R468 AND DEPOP R204, R470 FOR DOTHAN B

IREF

R205

2.2

U35

50

XTAL_IN

49

XTAL_OUT

10

VTT_PWRGD#/PD

55

PCI/SRC_STOP#

54

CPU_STOP#

46

SCLK

47

SDATA

12

FSA/USB_48

16

FSB/TEST_MODE

53

FSC/TEST_SEL

48

VDD_REF

1

VDD_PCI_1

7

VDD_PCI_2

42

VDD_CPU

21

VDD_SRC0

28

VDD_SRC1

34

VDD_SRC2

11

VDD_48

39

IREF

*Internal Pull-Down Resistor

14

DOT96

15

DOT96#

12

C722

10U/10V_8

1 2

1 2

R463

1

R212

2.2

VDD_CKG_CPU

R468
1K_4

R470
*0_4

12

C366

12

C373

12

C368
.047U_4

10U/10V_8

10U/10V_8

C369
.047U_4

CLK48_USB<19>

12

C372
.047U_4

12

C707
.047U_4

12

1 2

1 2

12

C361
.047U_4

R489
10K_4

R488
*10K_4

SELPSB1_CLK<4,6>
SELPSB2_CLK<4,6>

VDD_CKGREF

CLKVDD

12

C371
.047U_4

12

C370
.047U_4

B: DEPOP COMPONENTS FOR
DIFFERENT SKUS

C718
33P_4

C709
33P_4

R482 33_4

1 2

12

C706

.047U_4

Iref=5mA,
Ioh=4*Iref

DOT96<6>
DOT96#<6>

12

12

CLK_EN#<34>

STP_PCI#<19>

STP_CPU#<19,34>

CG_XIN

12

Y4

14.318MHZ/20PF

CG_XOUT R_HCLK_CPU

CLK_EN#

SMbus address D2

SMBCK

SMBDT

SELPSB0_CLK
SELPSB1_CLK
SELPSB2_CLK

VDD_CKG_CPU

VDD_CKG_48

R465 475/F_4

1 2

I@4P2R-S-33

4
2

RP15

3
1

R_DOT96
R_DOT96#

SMBUS ADDRESS: D2, D3

+3V

A A

+3V

B B

1 2

L50 ACB2012L-120

+VCCP +3V+VCCP

R203
1K_4

1 2

SELPSB2_CLK SELPSB0_CLKSELPSB1_CLK

R204
*0_4

1 2

1 2

L51 ACB2012L-120

B: DEPOP SSC COMPONENTS

C C

R109

R106

+3V

2

4

2

,32,33>

D D

PCLK_SMB

,32,33> SMBCK <9>

3

Q40
2N7002

+3V

2

3

Q41
2N7002

1

1

3

1

1

*10K_4

RP9
4P2R-S-10K

SMBDT

SMBCK

2

*10K_4

1 2

SMBDT <9>PDAT_SMB

R111
*10K_4

1 2

1 2

SMBUS ADDRESS: D4, D5

SSCD_VDD

DOTHAN-A 400
DOTHAN-A 533

3

CLK_SSC_IN

SMBCK
SMBDT

CLK_EN#

1 2

R117 *10K_4

U9

1

SSC_S3
SSC_S2
SSC_S1

CLKIN

2

S3

3

S2

4

S1

7

SCLK

8

SDATA

5

PWRDWN

6

REFOUT/SEL

*MK1493-05GT

FSC FSB FSA CPU SRC PCI
1 0 1 100 100 33
0 0 1 133 100 33
0 1 1 166 100 33
0 1 0 200 100 33
0 0 0 266 100 33
1 0 0 333 100 33
1 1 0 400 100 33
1 1 1 RSVD 100 33

4

37

VDDA

CK-410M

GND_REF

GND_PCI_26GND_SRC29GND_CPU

GND_PCI_1

GND_48

2

51

13

VDDA

CLKOUT

CLKOUT#

IREF

VSSIREF

VSSA

VDDA_CKG

38

VSSA

CPU2_ITP/SRC5

CPU2#_ITP/SRC5#

*PERREQ1#
*PERREQ2#

PCIF0/ITP_EN

45

ICS954217

250mA ( MAX. )

16
9

VDD

12
11

14
13

10

VSS

15

12

C708
.047U_4

REF

CPU0

CPU0#

CPU1

CPU1#

SRC4

SRC4#

SATACLK

SATACLK#

SRC3

SRC3#

SRC2

SRC2#

SRC1

SRC1#

SRC0

SRC0#

PCI5
PCI4
PCI3
PCI2

PCIF1

SSCD_VDD

R_DREFSSCLK
R_DREFSSCLK#

5

12

C355

10U/10V_8

14M_REF

52
44

R_HCLK_CPU#

43

R_HCLK_MCH

41

R_HCLK_MCH#

40

R_MCH_3GPLL

36

R_MCH_3GPLL#

35
33

32

R_PCIE_VGA

31

R_PCIE_VGA#

30

R_PCIE_SATA

26

R_PCIE_SATA#

27

R_PCIE_EZ1

24

R_PCIE_EZ1#

25

R_PCIE_ICH

22

R_PCIE_I CH#

23

R_PCIE_EZ2

19

R_PCIE_EZ2#

20

R_PCIE_NEWC

17

R_PCIE_NEWC#

18

R_PCLK_591

5

R_PCLK_PCM

4

R_PCLK_LAN

3

R_PCLK_SIO

56

R_PCLK_MINI

9

R_PCLK_ICH

8

PULL HIGH TO SET PIN35,36 TO HOST CLK

*BLM21B331SB

12

12

*.1U_4

C241

4
2

R108
*475/F_4

1 2

C229
*10U/10V_8

RP2

*4P2R-S-33

Place these termination
to close CK410M.

R199 49.9/F_4

1 2

R198 49.9/F_4

1 2

R197 49.9/F_4

1 2

R196 49.9/F_4

1 2

R195 49.9/F_4

1 2

R194 49.9/F_4

1 2

4
2

4
2

4
2

4
2

2
4

2
4

2
4

2
4

2
4

L23

1 2

3
1

R110
*49.9/F_4

CLK_SSC_IN

RP10

3
1

4P2R-S-33
RP11

3
1

4P2R-S-33
RP12

3
1

4P2R-S-33

RP13

3
1

E@4P2R-S-33
RP20

1
3

SA@4P2R-S-33
RP19

1
3

D@4P2R-S-33
RP18

1
3

4P2R-S-33
RP17

1
3

D@4P2R-S-33
RP16

1
3

N@4P2R-S-33
R478 33_4
R477 33_4
R476 33_4
R464 33_4
R481 33_4
R479 33_4

R480 10K_4

1 2

+3V

1 2

1 2

6

R114
*49.9/F_4

12

R104
*33_4

12

C230
*10P_4

1 2
1 2
1 2
1 2
1 2
1 2

DREFSSCLK <6>
DREFSSCLK# <6>

B: DEPOP SSC COMPONENTS

E: R200/202 CHANGE TO 12ohm for EA pass

R201 *24_4

1 2

R200 12_4

1 2

R202 12_4

1 2

HCLK_CPU <3>
HCLK_CPU# <3>

HCLK_MCH <5>
HCLK_MCH# <5>

CLK_MCH_3GPLL <6>
CLK_MCH_3GPLL# <6>

NEW_CLKREQ# <32>
EZ_CLKREQ# <33>

CLK_PCIE_VGA <11>
CLK_PCIE_VGA# <11>

CLK_PCIE_SATA <18>
CLK_PCIE_SATA# <18>

CLK_PCIE_EZ1 <33>
CLK_PCIE_EZ1# <33>

CLK_PCIE_ICH <19>
CLK_PCIE_ICH# <19>

CLK_PCIE_EZ2 <33>
CLK_PCIE_EZ2# <33>

CLK_PCIE_NEWC <32>
CLK_PCIE_NEWC# <32>

PCLK_591 <29>
PCLK_PCM <23>
PCLK_LAN <25>
PCLK_SIO <31>
PCLK_MINI <22>
PCLK_ICH <18>

CLK_SSC_IN

14M_SIO

14M_SIO

D: ADD EMI SOLUTION

E: CHANGE TO 10p

PEREQ1# - SRC0, 2, SATA
PEREQ2# - SRC1, 3, 4

14M_SIO <31>

14M_ICH <19>

DEFALT OFF

DEFALT OFF

B: DEPOP COMPONENTS FOR
DIFFERENT SKUS

EZ_CLKREQ#
NEW_CLKREQ#

C: ADD PULLUPS
D: DEPOP R615

+3V

R615
*1K_4

1 2

1 2

12

R616
1K_4

C915
10P_4

B: DEPOP COMPONENTS FOR DIFFERENT SKUS

DOT96
DOT96#

CLK_PCIE_VGA
CLK_PCIE_VGA#

CLK_PCIE_SATA
CLK_PCIE_SATA#

CLK_PCIE_EZ2
CLK_PCIE_EZ2#

CLK_PCIE_ICH
CLK_PCIE_ICH#

CLK_PCIE_EZ1
CLK_PCIE_EZ1#

CLK_PCIE_NEWC

CLK_PCIE_NEWC#

R490 I@49.9/F_4

1 2

R491 I@49.9/F_4

1 2

R193 E@49.9/F_4

1 2

R192 E@49.9/F_4

1 2

R486 SA@49.9/F_4

1 2

R487 SA@49.9/F_4

1 2

R492 D@49.9/F_4

1 2

R493 D@49.9/F_4

1 2

R209 49.9/F_4

1 2

R208 49.9/F_4

1 2

R207 D@49.9/F_4

1 2

R206 D@49.9/F_4

1 2

R211 N@49.9/F_4

1 2

R210 N@49.9/F_4

1 2

Place these termination
to close CK410M.

QUANTA

Title

Size Document Number Rev

Date: Sheet

COMPUTER

CLOCK GENERATOR

ZL2 F

of

7

241Tuesday, December 21, 2004

8

1

2

3

4

5

6

7

8

1

1

+3V

T171

T157

T155
T156
T158
T160
T163
T161

+3V

2

+3V

2

R448
10K_4

Q38
2N7002

Q37
2N7002

3

3

+VCCP

MBDATA

MBCLK

1 2

BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#

MBDATA <29,40>

MBCLK <29,40>

MAX6648_AL# <29>

MAX6648_OV# <30>

+3V_S5

C640
*.1U_4

DBR#

of

341Tuesday, December 21, 2004

8

R409
150_4

+3V

HD#[0..63]

HDSTBN0# <5>
HDSTBP0# <5>
HDSTBN1# <5>
HDSTBP1# <5>
HDSTBN2# <5>
HDSTBP2# <5>
HDSTBN3# <5>
HDSTBP3# <5>

HDBI0# <5>
HDBI1# <5>
HDBI2# <5>
HDBI3# <5>

DBSY# <5>
DRDY# <5>

HCLK_CPU# <2>
HCLK_CPU <2>

CPUINIT# <18>
CPURST# <5>
DPWR# <5>

AA3
AA2

AF4
AC4
AC7
AC3
AD3
AE4
AD2
AB4
AC6
AD5
AE2
AD6
AF3
AE1
AF1

AE5

A13
A12
C12
C11
B13
A16
A15
B10
A10

B18
A18

C17
B17

P4
U4
V3
R3
V2

W1

T4

W2

Y4
Y1
U1

Y3

U3

R2
P3
T2
P1
T1

N2

A4
N4

J3

L1

J2
K3

K4

L4
C8

B8
A9
C9

M3

H1
K1

L2
C2

D3
A3
E4
B4

A7
D1

D4
C6
A6
B7

G1

U31A

A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#

ADSTB0#
ADSTB1#

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#

ADS#

IERR#
BREQ0#

BPRI#
BNR#
LOCK#

HIT#
HITM#
DEFER#

BPM0#
BPM1#
BPM2#
BPM3#
TRDY#
RS0#
RS1#
RS2#

A20M#
FERR#
IGNNE#
PWRGOOD
SMI#

TCK
TDO
TDI
TMS
TRST#
ITP_CLK0
ITP_CLK1
PREQ#
PRDY#
DBR#

LINT0
LINT1
STPCLK#
SLP#
DPSLP#
DPRSTP#

THERMDA
THERMDC

THERMTRIP#
PROCHOT#

Dothan Processor

Dothan

REQUEST
PHASE
SIGNALS

ERROR
SIGNALS

ARBITRATION
PHASE
SIGNALS

SNOOP PHASE
SIGNALS

RESPONSE
PHASE
SIGNALS

PC
COMPATIBILITY
SIGNALS

DIAGNOSTIC
& TEST
SIGNALS

EXECUTION
CONTROL
SIGNALS

THERMAL DIODE

3

1 OF 3

DATA
PHASE
SIGNALS

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#

D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

DSTBN0#
DSTBP0#
DSTBN1#
DSTBP1#
DSTBN2#
DSTBP2#
DSTBN3#
DSTBP3#

DINV0#
DINV1#
DINV2#
DINV3#

DBSY#
DRDY#

BCLK1
BCLK0

INIT#

RESET#

DPWR#

HD#0

A19

HD#1

A25

HD#2

A22

HD#3

B21

HD#4

A24

HD#5

B26

HD#6

A21

HD#7

B20

HD#8

C20

HD#9

B24

HD#10

D24

HD#11

E24

HD#12

C26

HD#13

B23

HD#14

E23

HD#15

C25

HD#16

H23

HD#17

G25

HD#18

L23

HD#19

M26

HD#20

H24

HD#21

F25

HD#22

G24

HD#23

J23

HD#24

M23

HD#25

J25

HD#26

L26

HD#27

N24

HD#28

M25

HD#29

H26

HD#30

N25

HD#31

K25

HD#32

Y26

HD#33

AA24

HD#34

T25

HD#35

U23

HD#36

V23

HD#37

R24

HD#38

R26

HD#39

R23

HD#40

AA23

HD#41

U26

HD#42

V24

HD#43

U25

HD#44

V26

HD#45

Y23

HD#46

AA26

HD#47

Y25

HD#48

AB25

HD#49

AC23

HD#50

AB24

HD#51

AC20

HD#52

AC22

HD#53

AC25

HD#54

AD23

HD#55

AE22

HD#56

AF23

HD#57

AD24

HD#58

AF20

HD#59

AE21

HD#60

AD21

HD#61

AF25

HD#62

AF22

HD#63

AF26

C23
C22
K24
L24
W25
W24
AE24
AE25

D25
J26
T24
AD20

M2
H2

B14
B15

CPUINIT#

B5

CPURST#

B11
C19

4

HA#[3..31]<5>

A A

B B

C C

+VCCP

R429
150_4

TDI

G1: NC for Dothan and
DPRSTP# for Yonah

D D

THERMTRIP#<6,18>

+VCCP

1

CPUPWRGD<18>

C: UNINSTALL

R441 *0_4

R436 56_4

HA#[3..31]

HADSTB0#<5>
HADSTB1#<5>

HREQ#0<5>
HREQ#1<5>
HREQ#2<5>
HREQ#3<5>
HREQ#4<5>

ADS#<5>

HBREQ0#<5>

BPRI#<5>

BNR#<5>

HLOCK#<5>

HIT#<5>

HITM#<5>

DEFER#<5>

HTRDY#<5>

RS#0<5>
RS#1<5>
RS#2<5>

A20M#<18>

FERR#<18>

IGNNE#<18>

SMI#<18>

T180
T179

DBR#<19>

INTR<18>
NMI<18>
STPCLK#<18>

CPUSLP#<5,18>

DPSLP#<18>

DPRSLP#<18>

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

IERR#

BPM0#
BPM1#
BPM2#
BPM3#

A20M#
FERR#
IGNNE#
CPUPWRGD
SMI#

TCK
TDO
TDI
TMS
TRST#

PREQ#
PRDY#
DBR#

STPCLK#
CPUSLP#
DPSLP#

THERMDA
THERMDC

THERMTRIP#_PWR

CPU_PROCHOT#

2

+3V

THERMDC

THERMDA

HD#[0..63] <5>

R439 47

10 mil trace /
10 mil space

5

15 MIL

3V_THM

C661
.1U_4

C674
2200P

THERMTRIP#_PWR

TDI

TMS
TDO

TRST#

CPURST#

TCK

TCK NO STUB

close to ITP conn

TCK
TRST#

close to CPU

IERR#
CPUPWRGD

R618
56_4

R619

330_4

B: DEPOP R425, R426, R421, C640 WHEN NO JITP

+VCCP +VCCP

R422

54.9/F_4

R425 *22.6/F_4

R421 *22.6/F_4

R430 27.4/F_4
R427 680_4

R393 56_4
R402 200/F_4

6

U33

1

VCC

3

DXN

2

DXP

-OVT4GND

MAX6657

+VCCP+VCCP

1 3

Q53 MMBT3904

R426
*54.9/F_4

+VCCP

R442
10K_4

+3V

R435
10K_4

KBSMDAT

7

SMDATA

KBSMCLK

8

SMCLK

6

-ALT

5

R449
*10K_4

+3V

B: DEPOP R449
D: POP R449

R617
330_4

2

E: DEPOP R449

1999_SHT# <35>

C: ADD SHUTDOWN CIRCUITS

R428

39.2/F_4

T177
T173

T166
T176

T162

T178

JITP CONN

QUANTA

Title

Size Document Number Rev

Date: Sheet

COMPUTER

Dothan Processor (HOST)

ZL2 F

7

1

2

3

4

5

6

7

8

+VCCP

T152
T153

T181

CPU_VCCA

*0_8
0_8

COMP0
COMP1
COMP2
COMP3

GTLREF0

TEST1
TEST2

VCC_CORE

COMP0
COMP1
COMP2
COMP3

A A

27.4/F_4

B B

12

C262

10U_6.3V

12

C325

10U_6.3V

C C

12

C672

10U_6.3V

C660

10U_6.3V

1 2

R457

R458

54.9/F_4

27.4/F_4

Place pulldown resistors within

0.5" of COMP pins

.01U/16V_4

VCC_CORE

12

12

12

C250
10U_6.3V

VCC_CORE

12

C320

10U_6.3V

12

C301

10U_6.3V

VCC_CORE

C292

10U_6.3V

1 2

C328

10U_6.3V

12

C281

10U_6.3V

12

C309

10U_6.3V

C666

10U_6.3V

1 2

C286

10U_6.3V

12

C294

10U_6.3V

12

C671

10U_6.3V

C279

10U_6.3V

1 2

R132

R124

54.9/F_4

C704

12

C298

10U_6.3V

12

C300

10U_6.3V

12

C653

10U_6.3V

C299

10U_6.3V

1 2

1 2

12

C702

10U_6.3V

12

C255

10U_6.3V

12

C313

10U_6.3V

C663

10U_6.3V

1 2

1K/F

2K/F_4

CPU_VCCA

12

C649

10U_6.3V

12

C322

10U_6.3V

10U_6.3V

1 2

R455

R456

VCC_CORE

VCC_CORE

VCC_COREVCC_CORE

C668

Place voltage
divider within

0.5" of GTLREF
pin

R407

*1K_4

T182
T128
T151

+1.8V
+1.5V

12

12

C310

C656

10U_6.3V

10U_6.3V

12

12

C329

C321

10U_6.3V

10U_6.3V

C305

C659

10U_6.3V

10U_6.3V

1 2

1 2

R459
*1K_4

R461
R462

12

C683
10U_6.3V

12

C684

10U_6.3V

C657

10U_6.3V

1 2

Total caps = 2633 uF
ESR = 15m oh m/5 // 5m ohm / 25 // 5m ohm /15

D D

+VCCP

12

C351

+

150U/4V

<Type>
CC3528

12

C304

.1U_4

1

12

C681
.1U_4

12

.1U_4

C327

12

C652

.1U_4

2

12

C651

.1U_4

+VCCP

C285
.1U_4

3

C307

.1U_4

C650
.1U_4

C678

.1U_4

C682

.1U_4

4

P25
P26
AB2
AB1

AD26

AF7
AC1
E26

AC26

D18
D20
D22

E17
E19
E21

G21
H22

K22

V22

W21

Y22
AA5
AA7

AA9
AA11
AA13
AA15
AA17
AA19
AA21

AB6

AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22

AC9
AC11
AC13
AC15
AC17
AC19

AD8
AD10
AD12
AD14
AD16
AD18

AE9
AE11
AE13
AE15
AE17
AE19

AF8
AF10
AF12
AF14
AF16
AF18

C5

F23

B2
C3

N1
B1

F26

D6
D8

E5
E7
E9

F6

F8
F18
F20
F22

G5
H6

J5

J21

U5
V6

W5

Y6

U31B

COMP0
COMP1
COMP2
COMP3

GTLREF0

TEST1
TEST2

NC1
RSVD2

RSVD3
RSVD4
RSVD5

VCCA3
VCCA2
VCCA1
VCCA0

VCC00
VCC01
VCC02
VCC03
VCC04
VCC05
VCC06
VCC07
VCC08
VCC09
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71

Dothan Processor

Dothan

2 OF 3

POWER,
GROUND,
RESERVED
SIGNALS

A2

VSS00

A5

VSS01

A8

VSS02

A11

VSS03

A14

VSS04

A17

VSS05

A20

VSS06

A23

VSS07

A26

VSS08

B3

VSS09

B6

VSS10

B9

VSS11

B12

VSS12

B16

VSS13

B19

VSS14

B22

VSS15

B25

VSS16

C1

VSS17

C4

VSS18

C7

VSS19

C10

VSS20

C13

VSS21

C15

VSS22

C18

VSS23

C21

VSS24

C24

VSS25

D2

VSS26

D5

VSS27

D7

VSS28

D9

VSS29

D11

VSS30

D13

VSS31

D15

VSS32

D17

VSS33

D19

VSS34

D21

VSS35

D23

VSS36

D26

VSS37

E3

VSS38

E6

VSS39

E8

VSS40

E10

VSS41

E12

VSS42

E14

VSS43

E16

VSS44

E18

VSS45

E20

VSS46

E22

VSS47

E25

VSS48

F1

VSS49

F4

VSS50

F5

VSS51

F7

VSS52

F9

VSS53

F11

VSS54

F13

VSS55

F15

VSS56

F17

VSS57

F19

VSS58

F21

VSS59

F24

VSS60

G2

VSS61

G6

VSS62

G22

VSS63

G23

VSS64

G26

VSS65

H3

VSS66

H5

VSS67

H21

VSS68

H25

VSS69

J1

VSS70

J4

VSS71

J6

VSS72

J22

VSS73

J24

VSS74

K2

VSS75

K5

VSS76

K21

VSS77

K23

VSS78

K26

VSS79

L3

VSS80

L6

VSS81

L22

VSS82

L25

VSS83

M1

VSS84

M4

VSS85

M5

VSS86

M21

VSS87

M24

VSS88

N3

VSS89

N6

VSS90

N22

VSS91

N23

VSS92

N26

VSS93

P2

VSS94

P5

VSS95

P21

VSS96

P24

VSS97

R1

VSS98

R4

VSS99

5

CPU_VID0<34>
CPU_VID1<34>
CPU_VID2<34>
CPU_VID3<34>
CPU_VID4<34>
CPU_VID5<34>

T159

T154

SELPSB2_CLK<2,6>
SELPSB1_CLK<2,6>

SELPSB2_CLK
SELPSB1_CLK

DOTHAN-A NC
DOTHAN-B POP

6

1 2
1 2

T146

+VCCP

Z0501
Z0502

0_4

BSEL0

R433

BSEL1

R432

0_4

Title

Size Document Number Rev

Date: Sheet

U31C

W23

D10

VCCP0

D12

VCCP1

D14

VCCP2

D16

VCCP3

E11

VCCP4

E13

VCCP5

E15

VCCP6

F10

VCCP7

F12

VCCP8

F14

VCCP9

F16

VCCP10

K6

VCCP11

L5

VCCP12

L21

VCCP13

M6

VCCP14

M22

VCCP15

N5

VCCP16

N21

VCCP17

P6

VCCP18

P22

VCCP19

R5

VCCP20

R21

VCCP21

T6

VCCP22

T22

VCCP23

U21

VCCP24

P23

VCCQ0

W4

VCCQ1

E2

VID0

F2

VID1

F3

VID2

G3

VID3

G4

VID4

H4

VID5

AE7

VCCSENSE

AF6

VSSSENSE

C16

BSEL0

C14

BSEL1

E1

PSI

R6

VSS100

R22

VSS101

R25

VSS102

T3

VSS103

T5

VSS104

T21

VSS105

T23

VSS106

T26

VSS107

U2

VSS108

U6

VSS109

U22

VSS110

U24

VSS111

V1

VSS112

V4

VSS113

V5

VSS114

V21

VSS115

V25

VSS116

W3

VSS117

W6

VSS118

W22

VSS119

Dothan Processor

Dothan

3 OF 3

POWER, GROUND AND NC

VID

VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191

W26
Y2
Y5
Y21
Y24
AA1
AA4
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA25
AB3
AB5
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AC2
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC21
AC24
AD1
AD4
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD22
AD25
AE3
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE23
AE26
AF2
AF5
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF24

QUANTA
COMPUTER

Dothan Processor (POWER)

ZL2 F

of

7

441Tuesday, December 21, 2004

8

1

2

3

4

5

6

7

8

U34E

AF23

VSS136

H23

VSS137

AL22

VSS138

AH22

VSS139

J22

VSS140

E22

VSS141

D22

VSS142

A22

VSS143

AN21

VSS144

AF21

VSS145

F21

VSS146

C21

VSS147

A A

B B

C C

D D

1

AK20

AN19
AG19

AL18

AN17
AF17

AL16

AN14
AL14

AG14

AN11
AL11

AG11
AF11
AA11

AA10

AN24
AL24

VSS148

V20

VSS149

G20

VSS150

F20

VSS151

E20

VSS152

D20

VSS153

A20

VSS154
VSS155
VSS156

W19

VSS157

T19

VSS158

J19

VSS159

H19

VSS160

C19

VSS161
VSS162

U18

VSS163

B18

VSS164

A18

VSS165
VSS166

AJ17

VSS167
VSS168

G17

VSS169

C17

VSS170
VSS171

K16

VSS172

H16

VSS173

D16

VSS174

A16

VSS175

K15

VSS176

C15

VSS177
VSS178
VSS179

AJ14

VSS180
VSS181

K14

VSS182

J14

VSS183

F14

VSS184

B14

VSS185

A14

VSS186

J12

VSS187

D12

VSS188

B12

VSS189
VSS190
VSS191

AJ11

VSS192
VSS193
VSS194
VSS195

Y11

VSS196

H11

VSS197

F11

VSS198
VSS199

Y10

VSS200

L10

VSS201

D10

VSS202

AN9

VSS203

AH9

VSS204

AE9

VSS205

AC9

VSS206

AA9

VSS207

V9

VSS208

T9

VSS209

K9

VSS210

H9

VSS211

A9

VSS212

AL8

VSS213

Y8

VSS214

P8

VSS215

L8

VSS216

E8

VSS217

C8

VSS218

AN7

VSS219

AK7

VSS220

AG7

VSS221

AA7

VSS222

V7

VSS223

G7

VSS224

AJ6

VSS225

AE6

VSS226

AC6

VSS227

AA6

VSS228

T6

VSS229

P6

VSS230

L6

VSS231

J6

VSS232

B6

VSS233

AP5

VSS234

AL5

VSS235

W5

VSS236

E5

VSS237

AN4

VSS238

AF4

VSS239

Y4

VSS240

U4

VSS241

P4

VSS242

L4

VSS243

H4

VSS244

C4

VSS245

AJ3

VSS246

AC3

VSS247

AB3

VSS248

AA3

VSS249

C3

VSS250

A3

VSS251

AN2

VSS252

AL2

VSS253

AH2

VSS254

AE2

VSS255

AD2

VSS256

V2

VSS257

T2

VSS258

P2

VSS259

L2

VSS260

B27

VSS261

J26

VSS262

G26

VSS263

E26

VSS264

A26

VSS265
VSS266
VSS267

J2

VSS268

G2

VSS269

D2

VSS270

Y1

VSS271

B36

VSSALVDS

VSS

2

AG37

VSS0

Y37

VSS1

V37

VSS2

T37

VSS3

P37

VSS4

M37

VSS5

K37

VSS6

H37

VSS7

E37

VSS8

AN36

VSS9

AL36

VSS10

AJ36

VSS11

AF36

VSS12

AE36

VSS13

AD36

VSS14

AC36

VSS15

AB36

VSS16

AA36

VSS17

C36

VSS18

AE35

VSS19

Y35

VSS20

W35

VSS21

V35

VSS22

U35

VSS23

T35

VSS24

R35

VSS25

P35

VSS26

N35

VSS27

M35

VSS28

L35

VSS29

K35

VSS30

J35

VSS31

H35

VSS32

G35

VSS33

F35

VSS34

E35

VSS35

D35

VSS36

B35

VSS37

AN34

VSS38

AH34

VSS39

AD34

VSS40

AC34

VSS41

AB34

VSS42

AA34

VSS43

C34

VSS44

AL33

VSS45

AF33

VSS46

AD33

VSS47

W33

VSS48

V33

VSS49

U33

VSS50

T33

VSS51

R33

VSS52

P33

VSS53

N33

VSS54

M33

VSS55

L33

VSS56

K33

VSS57

J33

VSS58

H33

VSS59

G33

VSS60

F33

VSS61

E33

VSS62

D33

VSS63

AN32

VSS64

AJ32

VSS65

AD32

VSS66

AC32

VSS67

AB32

VSS68

AA32

VSS69

Y32

VSS70

C32

VSS71

A32

VSS72

AL31

VSS73

AG31

VSS74

AD31

VSS75

W31

VSS76

V31

VSS77

U31

VSS78

T31

VSS79

R31

VSS80

P31

VSS81

N31

VSS82

M31

VSS83

L31

VSS84

K31

VSS85

J31

VSS86

H31

VSS87

G31

VSS88

F31

VSS89

E31

VSS90

D31

VSS91

AP30

VSS92

AE30

VSS93

AC30

VSS94

AB30

VSS95

AA30

VSS96

Y30

VSS97

C30

VSS98

AM29

VSS99

AJ29

VSS100

AG29

VSS101

AD29

VSS102

AA29

VSS103

W29

VSS104

V29

VSS105

U29

VSS106

P29

VSS107

L29

VSS108

H29

VSS109

G29

VSS110

F29

VSS111

E29

VSS112

D29

VSS113

A29

VSS114

AC28

VSS115

AB28

VSS116

AA28

VSS117

W28

VSS118

E28

VSS119

AN27

VSS120

AL27

VSS121

AJ27

VSS122

AG27

VSS123

AF27

VSS124

AB27

VSS125

AA27

VSS126

W27

VSS127

G27

VSS128

E27

VSS129

AJ24

VSS130

AG24

VSS131

J24

VSS132

F24

VSS133

D24

VSS134

B24

VSS135

@ALVISO_GM/GML

221/F_4

100/F_4

24.9/F_4

R453
221/F_4

R452
100/F_4

R438

R437

R454

+VCCP

+VCCP

+VCCP

+VCCP

HXRCOMP

R434

24.9/F_4

R150

54.9/F_4

HXSCOMP

HYRCOMP

R451

54.9/F_4

HYSCOMP

HXSWING

C665

.1U_4

1 2

HYSWING

C690

.1U_4

1 2

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8

HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

U34A

E4

HD0#

E1

HD1#

F4

HD2#

H7

HD3#

E2

HD4#

F1

HD5#

E3

HD6#

D3

HD7#

K7

HD8#

F2

HD9#

J7

HD10#

J8

HD11#

H6

HD12#

F3

HD13#

K8

HD14#

H5

HD15#

H1

HD16#

H2

HD17#

K5

HD18#

K6

HD19#

J4

HD20#

G3

HD21#

H3

HD22#

J1

HD23#

L5

HD24#

K4

HD25#

J5

HD26#

P7

HD27#

L7

HD28#

J3

HD29#

P5

HD30#

L3

HD31#

U7

HD32#

V6

HD33#

R6

HD34#

R5

HD35#

P3

HD36#

T8

HD37#

R7

HD38#

R8

HD39#

U8

HD40#

R4

HD41#

T4

HD42#

T5

HD43#

R1

HD44#

T3

HD45#

V8

HD46#

U6

HD47#

W6

HD48#

U3

HD49#

V5

HD50#

W8

HD51#

W7

HD52#

U2

HD53#

U1

HD54#

Y5

HD55#

Y2

HD56#

V4

HD57#

Y7

HD58#

W1

HD59#

W3

HD60#

Y3

HD61#

Y6

HD62#

W2

HD63#

C1

HXRCOMP

C2

HXSCOMP

D1

HXSWING

T1

HYRCOMP

L1

HYSCOMP

P1

HYSWING

@ALVISO_GM/GML

HOST

HA3#
HA4#
HA5#
HA6#
HA7#
HA8#

HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#

HADS#

HADSTB0#
HADSTB1#

HVREF
HBNR#

HBPRI#

BREQ0#

HCPURST#

HCLKINN
HCLKINP

HDBSY#

HDEFER#

HDINV#0
HDINV#1
HDINV#2
HDINV#3
HDPWR#

HDRDY#
HDSTBN0#
HDSTBN1#
HDSTBN2#
HDSTBN3#

HDSTBP0#
HDSTBP1#
HDSTBP2#
HDSTBP3#

HEDRDY#

HHIT#

HHITM#

HLOCK#

HPCREQ#

HREQ0#

HREQ1#

HREQ2#

HREQ3#

HREQ4#

HRS0#
HRS1#
HRS2#

HCPUSLP#

HTRDY#

G9
C9
E9
B7
A10
F9
D8
B10
E10
G10
D9
E11
F10
G11
G13
C10
C11
D11
C12
B13
A12
F12
G12
E12
C13
B11
D13
A13
F13

F8
B9
E13
J11
A5
D5
E7
H10

AB1
AB2

C6
E6
H8
K3
T7
U5
G6
F7
G4
K1
R3
V3
G5
K2
R2
W4
F6
D4
D6
B3
A11
A7
D7
B8
C7
A8
A4
C5
B4
G8
B5

HD#[0..63]<3>

HD#[0..63]

HXRCOMP
HXSCOMP
HXSWING
HYRCOMP
HYSCOMP
HYSWING

HA#[3.. 31]
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

HCPUSLP#_GMC H

HA#[3..31] <3>

ADS# <3>
HADSTB0# <3>
HADSTB1# <3>

BNR # <3>
BPRI# <3>
HBREQ0# <3>
CPURS T# <3>

HCLK_MCH# <2>
HCLK_MCH <2>

DBSY# <3>
DEFER# <3>
HDBI0# <3>
HDBI1# <3>
HDBI2# <3>
HDBI3# <3>

DPWR# <3>

DRDY# <3>
HDSTBN0# <3>
HDSTBN1# <3>
HDSTBN2# <3>
HDSTBN3# <3>
HDSTBP0# <3>
HDSTBP1# <3>
HDSTBP2# <3>
HDSTBP3# <3>

HIT# <3>
HITM# <3>
HLOCK# <3>

HREQ#0 <3>
HREQ#1 <3>
HREQ#2 <3>
HREQ#3 <3>
HREQ#4 <3>
RS#0 <3>
RS#1 <3>
RS#2 <3>

HTRDY# <3>

+VCCP

R178
100/F_4

HVREF

R173
200/F_4

T60
*PAD

T170
*PAD

B: POP FOR DOTHAN B

R162

1 2

0_4

CPUSLP # <3,18>

DO NOT INSTALL FOR DOTHAN-A AND INSTALL FOR DOTHAN-B

C331

.1U_4

1 2

QUANTA

Title

Size Doc u m en t N u m be r Re v

3

4

5

6

Date: Sheet

7

COMPUTER

Alviso (Host)

ZL2 F

C

541Tuesday, De ce mber 21, 2004

8

of

1

DMI_TXN0<19>
DMI_TXN1<19>

12

R184
*40.2/F_4

R190

80.6/F_4

M_RCOMPN
M_RCOMPP

R188

80.6/F_4

DREFSSCLK_R
DREFSSCLK#_R

DREFSSCLK#_R
DREFSSCLK_R

DMI_TXN2<19>
DMI_TXN3<19>

DMI_TXP0<19>
DMI_TXP1<19>
DMI_TXP2<19>
DMI_TXP3<19>

DMI_RXN0<19>
DMI_RXN1<19>
DMI_RXN2<19>
DMI_RXN3<19>

DMI_RXP0<19>
DMI_RXP1<19>
DMI_RXP2<19>
DMI_RXP3<19>

CLK_SDRAM0<9>
CLK_SDRAM1<9>

T79 T54

CLK_SDRAM3<9>
CLK_SDRAM4<9>

T74

CLK_SDRAM0#<9>
CLK_SDRAM1#<9>

T78

CLK_SDRAM3#<9>
CLK_SDRAM4#<9>

T73

CKE0<9,10>
CKE1<9,10>
CKE2<9,10>
CKE3<9,10>

SM_CS0#<9,10>
SM_CS1#<9,10>
SM_CS2#<9,10>
SM_CS3#<9,10>

CLK_SDRAM2

CLK_SDRAM5

CLK_SDRAM2#

CLK_SDRAM5#

CKE0
CKE1
CKE2
CKE3

SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#

M_OCDCOMP0
M_OCDCOMP1

E: DEPOP

M_RCOMPN

+2.5V

R606

1 2
1 2

R607

RP7

4
2

*4P2R-S-0

M_RCOMPP

SMXSLEW
SMYSLEW

R171 10K_4

1 2

R170 10K_4

1 2

*0
*0

3
1

+1.25VSUS

It's point to point,
55ohm trace, keep as
short as possible.

A A

B B

12

R186
*40.2/F_4

Route as short
as possible.

C C

+2.5VSUS

12

12

D D

D: DEPOP RP7

1

2

CFG[0:2]=100 FOR FSB 533
CFG[0:2]=101 FOR FSB 400

U34C

AA31

DMIRXN0

AB35

DMIRXN1

AC31

DMIRXN2

AD35

DMIRXN3

Y31

DMIRXP0

AA35

DMIRXP1

AB31

DMIRXP2

AC35

DMIRXP3

AA33

DMITXN0

AB37

DMITXN1

AC33

DMITXN2

AD37

DMITXN3

Y33

DMITXP0

AA37

DMITXP1

AB33

DMITXP2

AC37

DMITXP3

AM33

SM_CK0

AL1

SM_CK1

AE11

SM_CK2

AJ34

SM_CK3

AF6

SM_CK4

AC10

SM_CK5

AN33

SM_CK0#

AK1

SM_CK1#

AE10

SM_CK2#

AJ33

SM_CK3#

AF5

SM_CK4#

AD10

SM_CK5#

AP21

SM_CKE0

AM21

SM_CKE1

AH21

SM_CKE2

AK21

SM_CKE3

AN16

SM_CS0#

AM14

SM_CS1#

AH15

SM_CS2#

AG16

SM_CS3#

AF22

SM_OCDCOMP0

AF16

SM_OCDCOMP1

AP14

SM_ODT0

AL15

SM_ODT1

AM11

SM_ODT2

AN10

SM_ODT3

AK10

SMRCOMPN

AK11

SMRCOMPP

AF37

SMVREF0

AD1

SMVREF1

AE27

SMXSLEWIN

AE28

SMXSLEWOUT

AF9

SMYSLEWIN

AF10

SMYSLEWOUT

@ALVISO_GM/GML

PM_EXTTS#0

PM_EXTTS#1

DREFSSCLK <2>
DREFSSCLK# <2>

DOT96# <2>
DOT96 <2>

2

DMIDDR MUXING

CFG/RSVDPMLCKNC

THRMTRIP#

DREF_CLKN

DREF_CLKP
DREF_SSCLKN
DREF_SSCLKP

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8

CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27

BM_BUSY#

EXT_TS0#
EXT_TS1#

PWROK

RSTIN#

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8

NC9
NC10
NC11

3

CFG3

R168

*1K_4

R174 4.7K_4

CFG0

G16
H13
G14
F16
F15
G15
E16
D17
J16
D15
E15
D14
E14
H12
C14
H15
J15
H14
G22
G23
D23
G25
G24
J17
A31
A30
D26
D25

J23
J21
H22
F5
AD30
AE29

A24
A23
C37
D37

AP37
AN37
AP36
AP2
AP1
AN1
B1
A2
B37
A36
A37

3

1 2

R164 1K_4
R167 1K_4

CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

CFG[17:3] have internal pullup resistors.
CFG[19:18] have internal pulldown resistors

PM_EXTTS#0
PM_EXTTS#1

DOT96#
DOT96
DREFSSCLK#_R
DREFSSCLK_R

TP_NC1
TP_NC2
TP_NC3
TP_NC4
TP_NC5
TP_NC6
TP_NC7
TP_NC8

TP_NC9
TP_NC10
TP_NC11

T56

R177 0_4

1 2

R460 100

T187
T183
T186
T185
T184
T188
T175
T167
T172
T165
T164

TXLCLKOUT-<11,16>
TXLCLKOUT+<11,16>
TXUCLKOUT-<11,16>
TXUCLKOUT+<11,16>

TXLOUT0-<11,16>
TXLOUT0+<11,16>
TXLOUT1-<11,16>
TXLOUT1+<11,16>
TXLOUT2-<11,16>
TXLOUT2+<11,16>

TXUOUT0-<11,16>
TXUOUT0+<11,16>
TXUOUT1-<11,16>
TXUOUT1+<11,16>
TXUOUT2-<11,16>
TXUOUT2+<11,16>

DISP_ON<11,16>
BLON<11,16>

R166 *1K_4
R157

*1K_4

T50
T70

R153

T58

R161

T52
T63
T49
T72
T69
T67
T66
T59
T55
T64
T68
T71
T169
T168

T51

PM_BMBUSY# <19>

IMVP_PWRGD <19,34>
PLTRST# <11,15,18,21,29,31,32,33>

4

FOR DDR533

+VCCP

SELPSB1_CLK <2,4>
SELPSB2_CLK <2,4>

*1K_4
1K_4

THERMTRIP# <3,18>

B: POP ALWAYS

R147 150/F_4

1 2

R148 150/F_4

1 2

R151 150/F_4

1 2

R143 150/F_4

1 2

R152 150/F_4

1 2

R159 150/F_4

1 2

TXLCLKOUT+
TXUCLKOUT­TXUCLKOUT+

TXLOUT0­TXLOUT1-

TXLOUT1+
TXLOUT2­TXLOUT2+

TXUOUT0­TXUOUT0+
TXUOUT1­TXUOUT1+
TXUOUT2­TXUOUT2+

DISP_ON
BLON

4

CFG5 Low=DMIx2
High=DMIx4
CFG6 Low=DDR2
High=DDR

CFG9 Low=REVERSE LANE
High=NORMAL

CFG11 FOR CPU533

INT_DDCCLK<17>
INT_DDCDAT<17>

INT_VGA_BLU<17>
INT_VGA_GRN<17>
INT_VGA_RED<17>

INT_VSYNC<17>

INT_HSYNC<17>

INT_TV_C/R
INT_TV_COMP
INT_TV_Y/G

INT_VGA_RED
INT_VGA_GRN
INT_VGA_BLU

241
241

241
241
241

241
241
241

R134I@0_4
R139I@0_4

I_EDIDCLK<16>
I_EDIDDATA<16>

RN110I@4P2R-S-0

3

RN9I@4P2R-S-0

3

RN107I@4P2R-S-0

3

RN108I@4P2R-S-0

3

RN109I@4P2R-S-0

3

RN12I@4P2R-S-0

3

RN11I@4P2R-S-0

3

RN10I@4P2R-S-0

3

5

SDVO_CTRLDATA<15>

SDVO_CTRLCLK<15>
CLK_MCH_3GPLL#<2>
CLK_MCH_3GPLL<2>

INT_TV_COMP<16>

INT_TV_Y/G<16>
INT_TV_C/R<16>

R156 1.5K/F

INT_TXLCLKOUT-TXLCLKOUT­INT_TXLCLKOUT+
INT_TXUCLKOUT­INT_TXUCLKOUT+

INT_TXLOUT0-

INT_TXLOUT0+TXLOUT0+

INT_TXLOUT1-

INT_TXLOUT1+

INT_TXLOUT2-

INT_TXLOUT2+

INT_TXUOUT0-

INT_TXUOUT0+

INT_TXUOUT1-

INT_TXUOUT1+

INT_TXUOUT2-

INT_TXUOUT2+

INT_DISP_ON
INT_BLON

5

R169 4.99K/F

R176 255/F_4

INT_BLON

T47
T48

INT_DISP_ON

T53
T62
T61

INT_TXLCLKOUT­INT_TXLCLKOUT+
INT_TXUCLKOUT­INT_TXUCLKOUT+

INT_TXLOUT0­INT_TXLOUT1­INT_TXLOUT2-

INT_TXLOUT0+
INT_TXLOUT1+
INT_TXLOUT2+

INT_TXUOUT0­INT_TXUOUT1­INT_TXUOUT2-

INT_TXUOUT0+
INT_TXUOUT1+
INT_TXUOUT2+

6

GMCHEXP_TXP[0..15]<11>
GMCHEXP_TXN[0..15]<11>
GMCHEXP_RXP[0..15]<11,15>

GMCHEXP_RXN[0..15]<11,15>

U34F

H24

SDVOCTRL_DATA

H25

SDVOCTRL_CLK

AB29

GCLKN

AC29

GCLKP

INT_TV_COMP
INT_TV_Y/G
INT_TV_C/R
TV_REFSET

REFSET

A15

TVDAC_A

C16

TVDAC_B

A17

TVDAC_C

J18

TV_REFSET

B15

TV_IRTNA

B16

TV_IRTNB

B17

TV_IRTNC

E24

DDCCLK

E23

DDCDATA

E21

BLUE

D21

BLUE#

C20

GREEN

B20

GREEN#

A19

RED

B19

RED#

H21

VSYNC

G21

HSYNC

J20

REFSET

T57

E25

LBKLT_CTRL

F25

LBKLT_EN

C23

LCTLA_CLK

C22

LCTLB_DATA

F23

LDDC_CLK

F22

LDDC_DATA

F26

LVDD_EN

C33

LIBG

C31

LVBG

F28

LVREFH

F27

LVREFL

B30

LACLKN

B29

LACLKP

C25

LBCLKN

C24

LBCLKP

B34

LADATAN0

B33

LADATAN1

B32

LADATAN2

A34

LADATAP0

A33

LADATAP1

B31

LADATAP2

C29

LBDATAN0

D28

LBDATAN1

C27

LBDATAN2

C28

LBDATAP0

D27

LBDATAP1

C26

LBDATAP2

@ALVISO_GM/GML

B: NO STUFF WHEN NO DOCKING

6

7

GMCHEXP_TXP[0..15]
GMCHEXP_TXN[0..15]

GMCHEXP_RXP[0..15]
GMCHEXP_RXN[0..15]

R158 24.9/F_4

MISC

TV VGA LVDS

PCI-EXPRESS GRAPHICS

CGMCHEXP_TXP0
CGMCHEXP_TXN0

CGMCHEXP_TXP1
CGMCHEXP_TXN1

CGMCHEXP_TXP2
CGMCHEXP_TXN2

CGMCHEXP_TXP3
CGMCHEXP_TXN3

EXP_COMPI

EXP_ICOMPO

EXP_RXN0
EXP_RXN1
EXP_RXN2
EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8

EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15

EXP_RXP0

EXP_RXP1

EXP_RXP2

EXP_RXP3

EXP_RXP4

EXP_RXP5

EXP_RXP6

EXP_RXP7

EXP_RXP8

EXP_RXP9

EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15

EXP_TXN0

EXP_TXN1

EXP_TXN2

EXP_TXN3

EXP_TXN4

EXP_TXN5

EXP_TXN6

EXP_TXN7

EXP_TXN8

EXP_TXN9

EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15

EXP_TXP0

EXP_TXP1

EXP_TXP2

EXP_TXP3

EXP_TXP4

EXP_TXP5

EXP_TXP6

EXP_TXP7

EXP_TXP8

EXP_TXP9

EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15

D36
D34

GMCHEXP_RXN0

E30

GMCHEXP_RXN1

F34

GMCHEXP_RXN2

G30

GMCHEXP_RXN3

H34

GMCHEXP_RXN4

J30

GMCHEXP_RXN5

K34

GMCHEXP_RXN6

L30

GMCHEXP_RXN7

M34

GMCHEXP_RXN8

N30

GMCHEXP_RXN9

P34

GMCHEXP_RXN10

R30

GMCHEXP_RXN11

T34

GMCHEXP_RXN12

U30

GMCHEXP_RXN13

V34

GMCHEXP_RXN14

W30

GMCHEXP_RXN15

Y34

GMCHEXP_RXP0

D30

GMCHEXP_RXP1

E34

GMCHEXP_RXP2

F30

GMCHEXP_RXP3

G34

GMCHEXP_RXP4

H30

GMCHEXP_RXP5

J34

GMCHEXP_RXP6

K30

GMCHEXP_RXP7

L34

GMCHEXP_RXP8

M30

GMCHEXP_RXP9

N34

GMCHEXP_RXP10

P30

GMCHEXP_RXP11

R34

GMCHEXP_RXP12

T30

GMCHEXP_RXP13

U34

GMCHEXP_RXP14

V30

GMCHEXP_RXP15

W34

CGMCHEXP_TXN0

E32

CGMCHEXP_TXN1

F36

CGMCHEXP_TXN2

G32

CGMCHEXP_TXN3

H36

CGMCHEXP_TXN4

J32

CGMCHEXP_TXN5

K36

CGMCHEXP_TXN6

L32

CGMCHEXP_TXN7

M36

CGMCHEXP_TXN8

N32

CGMCHEXP_TXN9

P36

CGMCHEXP_TXN10

R32

CGMCHEXP_TXN11

T36

CGMCHEXP_TXN12

U32

CGMCHEXP_TXN13

V36

CGMCHEXP_TXN14

W32

CGMCHEXP_TXN15

Y36

CGMCHEXP_TXP0

D32

CGMCHEXP_TXP1

E36

CGMCHEXP_TXP2

F32

CGMCHEXP_TXP3

G36

CGMCHEXP_TXP4

H32

CGMCHEXP_TXP5

J36

CGMCHEXP_TXP6

K32

CGMCHEXP_TXP7

L36

CGMCHEXP_TXP8

M32

CGMCHEXP_TXP9

N36

CGMCHEXP_TXP10

P32

CGMCHEXP_TXP11

R36

CGMCHEXP_TXP12

T32

CGMCHEXP_TXP13

U36

CGMCHEXP_TXP14

V32

CGMCHEXP_TXP15

W36

C629ID@.1U_4

12

C627ID@.1U_4

12

C308ID@.1U_4

12

C312ID@.1U_4

12

C625ID@.1U_4

12

C620ID@.1U_4

12

C318ID@.1U_4

12

C323ID@.1U_4

12

1 2

SDVOB_R+
SDVOB_R-

SDVOB_G+
SDVOB_G-

SDVOB_B+

SDVOB_B-

SDVOB_CLK+

SDVOB_CLK-

QUANTA

Title

Size Document Number Rev

Custom

Date: Sheet

COMPUTER

Alviso (VGA,DMI)

ZL2 F

7

8

VCC3G_PCIE

GMCHEXP_TXN0

C626E@.1U_4

GMCHEXP_TXN1

C667E@.1U_4

GMCHEXP_TXN2

C619E@.1U_4

GMCHEXP_TXN3

C673E@.1U_4

GMCHEXP_TXN4

C613E@.1U_4

GMCHEXP_TXN5

C685E@.1U_4

GMCHEXP_TXN6

C605E@.1U_4

GMCHEXP_TXN7

C689E@.1U_4

GMCHEXP_TXN8

C599E@.1U_4

GMCHEXP_TXN9

C692E@.1U_4

GMCHEXP_TXN10

C594E@.1U_4

GMCHEXP_TXN11

C695E@.1U_4

GMCHEXP_TXN12

C592E@.1U_4

GMCHEXP_TXN13

C698E@.1U_4

GMCHEXP_TXN14

C590E@.1U_4

GMCHEXP_TXN15

C587E@.1U_4

GMCHEXP_TXP0

C628E@.1U_4

GMCHEXP_TXP1

C664E@.1U_4

GMCHEXP_TXP2

C624E@.1U_4

GMCHEXP_TXP3

C669E@.1U_4

GMCHEXP_TXP4

C616E@.1U_4

GMCHEXP_TXP5

C679E@.1U_4

GMCHEXP_TXP6

C608E@.1U_4

GMCHEXP_TXP7

C686E@.1U_4

GMCHEXP_TXP8

C601E@.1U_4

GMCHEXP_TXP9

C691E@.1U_4

GMCHEXP_TXP10

C595E@.1U_4

GMCHEXP_TXP11

C693E@.1U_4

GMCHEXP_TXP12

C593E@.1U_4

GMCHEXP_TXP13

C697E@.1U_4

GMCHEXP_TXP14

C591E@.1U_4

GMCHEXP_TXP15

C588E@.1U_4

SDVOB_R+ <15>
SDVOB_R- <15>

SDVOB_G+ <15>
SDVOB_G- <15>

SDVOB_B+ <15>
SDVOB_B- <15>

SDVOB_CLK+ <15>
SDVOB_CLK- <15>

641Tuesday, December 21, 2004

8

of

1

2

3

4

5

6

7

8

MD[0..63]
SM_DQS[0..7]
SDM[0..7]

RN26

A A

4P2R-S-10
RN43

4P2R-S-10

RN25
4P2R-S-10
RN42
4P2R-S-10

RN24
4P2R-S-10
RN41
4P2R-S-10

RN40
4P2R-S-10

RN23
4P2R-S-10

RN32
4P2R-S-10
RN44
4P2R-S-10

B B

RN35
4P2R-S-10

RN31
4P2R-S-10

RN30
4P2R-S-10

RN50
4P2R-S-10

RN29
4P2R-S-10

RN49
4P2R-S-10

RN28
4P2R-S-10
RN48
4P2R-S-10

RN27
4P2R-S-10

RN47
4P2R-S-10

C C

RN34
4P2R-S-10
RN46
4P2R-S-10

RN45
4P2R-S-10

RN33
4P2R-S-10

RN22
4P2R-S-10
RN39
4P2R-S-10

RN21
4P2R-S-10
RN38
4P2R-S-10

RN37
4P2R-S-10

RN20
4P2R-S-10

D D

RN19
4P2R-S-10
RN36
4P2R-S-10

MD31 R_MD31
MD26 R_MD26
MD30
MD27

MD25 R_MD25
MD24 R_MD24
MD28 R_MD28
MD29 R_MD29

MD18 R_MD18
MD22 R_MD22
MD23

MD21
MD20
MD16
MD17

MD35 R_MD35
MD34 R_MD34
MD39 R_MD39
MD38 R_MD38

MD36
MD37
MD33
MD32

MD59
MD58
MD62
MD63

MD56
MD60
MD61
MD57

MD51 R_MD51
MD50 R_MD50
MD55 R_MD55
MD54 R_MD54

MD48
MD49

MD52

MD47 R_MD47
MD46 R_MD46
MD42 R_MD42
MD43 R_MD43

MD44
MD45
MD40
MD41

MD14 R_MD14

MD13
MD9

MD12 R_MD12

MD6
MD3
MD2
MD7

MD5 R_MD5

1

2

1

4

3
3
1

1
3
1
3

1
3
1
3

3
1
3
1

1
3
1
3

3
1
1
3

3
1
3
1

3
1
1
3

1
3
1
3

3
1
3
1

1
3
1
3

3
1
3
1

1
3
1
3

1
3
1
3

3
1
1
3

1
3
1
3

R_MD30

4

R_MD27

2

2
4
2
4

R_MD19MD19

2
4
2

R_MD23

4

R_MD21

4

R_MD20

2

R_MD16

4

R_MD17

2

2
4
2
4

R_MD36

4

R_MD37

2

R_MD33

2

R_MD32

4

R_MD59

4

R_MD58

2

R_MD62

4

R_MD63

2

R_MD56

4

R_MD60

2

R_MD61

2

R_MD57

4

2
4
2
4

R_MD48

4

R_MD53MD53

2

R_MD49

4

R_MD52

2

2
4
2
4

R_MD44

4

R_MD45

2

R_MD40

4

R_MD41

2

R_MD10MD10

2

R_MD11MD11

4

R_MD15MD15

2
4

R_MD13

2

R_MD8MD8

4

R_MD9

2
4

R_MD6

4

R_MD3

2

R_MD2

2

R_MD7

4

R_MD1MD1

2

R_MD0MD0

4

R_MD4MD4

2
4

R_SDM0
R_SDM1

R_SDM6 R_SM_DQS6
R_SDM7

2

R_MD0
R_MD1
R_MD2
R_MD3
R_MD4
R_MD5
R_MD6
R_MD7
R_MD8
R_MD9
R_MD10
R_MD11
R_MD12
R_MD13
R_MD14
R_MD15
R_MD16
R_MD17
R_MD18
R_MD19
R_MD20
R_MD21
R_MD22
R_MD23
R_MD24
R_MD25
R_MD26
R_MD27
R_MD28
R_MD29
R_MD30
R_MD31
R_MD32
R_MD33
R_MD34
R_MD35
R_MD36
R_MD37
R_MD38
R_MD39
R_MD40
R_MD41
R_MD42
R_MD43
R_MD44
R_MD45
R_MD46
R_MD47
R_MD48
R_MD49
R_MD50
R_MD51
R_MD52
R_MD53
R_MD54
R_MD55
R_MD56
R_MD57
R_MD58
R_MD59
R_MD60
R_MD61
R_MD62
R_MD63

1 2

R236 10_4

1 2

R241 10_4

1 2

R242 10_4

1 2

R237 10_4

1 2

R235 10_4

1 2

R238 10_4

1 2

R239 10_4

1 2

R240 10_4

U34B

AG35

SADQ0

AH35

SADQ1

AL35

SADQ2

AL37

SADQ3

AH36

SADQ4

AJ35

SADQ5

AK37

SADQ6

AL34

SADQ7

AM36

SADQ8

AN35

SADQ9

AP32

SADQ10

AM31

SADQ11

AM34

SADQ12

AM35

SADQ13

AL32

SADQ14

AM32

SADQ15

AN31

SADQ16

AP31

SADQ17

AN28

SADQ18

AP28

SADQ19

AL30

SADQ20

AM30

SADQ21

AM28

SADQ22

AL28

SADQ23

AP27

SADQ24

AM27

SADQ25

AM23

SADQ26

AM22

SADQ27

AL23

SADQ28

AM24

SADQ29

AN22

SADQ30

AP22

SADQ31

AM9

SADQ32

AL9

SADQ33

AL6

SADQ34

AP7

SADQ35

AP11

SADQ36

AP10

SADQ37

AL7

SADQ38

AM7

SADQ39

AN5

SADQ40

AN6

SADQ41

AN3

SADQ42

AP3

SADQ43

AP6

SADQ44

AM6

SADQ45

AL4

SADQ46

AM3

SADQ47

AK2

SADQ48

AK3

SADQ49

AG2

SADQ50

AG1

SADQ51

AL3

SADQ52

AM2

SADQ53

AH3

SADQ54

AG3

SADQ55

AF3

SADQ56

AE3

SADQ57

AD6

SADQ58

AC4

SADQ59

AF2

SADQ60

AF1

SADQ61

AD4

SADQ62

AD5

SADQ63

SDM0 SM_DQS0
SDM1 SM_DQS1

SDM6 SM_DQS6
SDM7 R_SM_DQS7

3

MD[0..63] <9,10>
SM_DQS[0..7] <9,10>
SDM[0..7] <9,10>

SA_BS0#
SA_BS1#
SA_BS2#

SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7

SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7

SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8

SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13

DDR SYSTEM MEMORY A

SA_CAS#
SA_RAS#

SA_RCVENIN#

SA_RCVENOUT#

SA_WE#

@ALVISO_GM/GML

R_SM_DQS0
R_SM_DQS1
R_SM_DQS2R_SDM2
R_SM_DQS3R_SDM3

R_SM_DQS4R_SDM4

R_SM_DQS5R_SDM5 SDM5

M_A_BA0

AK15

M_A_BA1

AK16
AL21

R_SDM0

AJ37

R_SDM1

AP35

R_SDM2

AL29

R_SDM3

AP24

R_SDM4

AP9

R_SDM5

AP4

R_SDM6

AJ2

R_SDM7

AD3

R_SM_DQS0

AK36

R_SM_DQS1

AP33

R_SM_DQS2

AN29

R_SM_DQS3

AP23

R_SM_DQS4

AM8

R_SM_DQS5

AM4

R_SM_DQS6

AJ1

R_SM_DQS7

AE5
AK35

AP34
AN30
AN23
AN8
AM5
AH1
AE4

M_A_MA0

AL17

M_A_MA1

AP17

M_A_MA2

AP18

M_A_MA3

AM17

M_A_MA4

AN18

M_A_MA5

AM18

M_A_MA6

AL19

M_A_MA7

AP20

M_A_MA8

AM19

M_A_MA9

AL20

M_A_MA10

AM16

M_A_MA11

AN20

M_A_MA12

AM20

M_A_MA13

AM15

M_A_SCASA#

AN15

M_A_SRASA#

AP16

SA_RCVENIN#

AF29

SA_RCVENOUT#

AF28

M_A_BMWEA#

AP15

1 2

R214 10_4

1 2

R215 10_4

1 2

R216 10_4

1 2

R217 10_4

1 2

R220 10_4

1 2

R221 10_4

1 2

R218 10_4

1 2

R219 10_4

4

SM_DQS2SDM2
SM_DQS3SDM3
SM_DQS4SDM4
SM_DQS5

SM_DQS7

M_A_BA0 <9,10>
M_A_BA1 <9,10>

M_A_MA[0..13] <9,10>

M_A_SCASA# <9,10>
M_A_SRASA# <9,10>

T77
T80

M_A_BMWEA# <9,10>

5

AE31
AE32
AG32
AG36
AE34
AE33

AF31

AF30
AH33
AH32
AK31
AG30
AG34
AG33
AH31

AJ31
AK30

AJ30
AH29
AH28
AK29
AH30
AH27
AG28

AF24
AG23

AJ22
AK22
AH24
AH23
AG22

AJ21
AG10

AG9
AG8

AH8
AH11
AH10

AK9

AK6

AH5

AK8

AK4

AG5

AG4

AD8

AD9

AH4

AG6

AE8

AD7

AC5

AB8

AB6

AA8

AC8

AC7

AA4

AA5

U34G

SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
SBDQ8
SBDQ9
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
SBDQ17
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
SBDQ37

AJ9

SBDQ38
SBDQ39

AJ7

SBDQ40
SBDQ41

AJ4

SBDQ42
SBDQ43
SBDQ44

AJ8

SBDQ45

AJ5

SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63

SB_BS0#
SB_BS1#
SB_BS2#

SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7

SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7

SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8

SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13

DDR SYSTEM MEMORY B

SB_CAS#
SB_RAS#

SB_RCVENIN#

SB_RCVENOUT#

SB_WE#

@ALVISO_GM/GML

AJ15
AG17
AG21

AF32
AK34
AK27
AK24
AJ10
AK5
AE7
AB7

AF34
AK32
AJ28
AK23
AM10
AH6
AF8
AB4

AF35
AK33
AK28
AJ23
AL10
AH7
AF7
AB5

AH17
AK17
AH18
AJ18
AK18
AJ19
AK19
AH19
AJ20
AH20
AJ16
AG18
AG20
AG15

AH14
AK14
AF15
AF14
AH16

M_B_BA0
M_B_BA1

M_B_MA0
M_B_MA1
M_B_MA2
M_B_MA3
M_B_MA4
M_B_MA5
M_B_MA6
M_B_MA7
M_B_MA8
M_B_MA9
M_B_MA10
M_B_MA11
M_B_MA12
M_B_MA13

M_B_SCASA#
M_B_SRASA#
SB_RCVENIN#
SB_RCVENOUT#
M_B_BMWEA#

M_B_BA0 <9,10>
M_B_BA1 <9,10>

M_B_MA[0..13] <9,10>

M_B_SCASA# <9,10>
M_B_SRASA# <9,10>

T75
T76

M_B_BMWEA# <9,10>

QUANTA

Title

Size Document Number Rev

Custom

6

Date: Sheet

COMPUTER

Alviso (DDR)

ZL2 F

of

7

741Tuesday, December 21, 2004

8

5

+VCCP

3900mA

12

12

C687

C340

.1U_4

.1U_4

D D

12

12

12

C334

C332

10U_6.3V

.1U_4

C330
10U_6.3V

12

C336
10U_6.3V

B: DEPOP C259, C248, C306, C303 WHEN NO EXT.VGA

L31

VCCA_DPLLA

+1.5V

60mA

+1.5V

C C

+1.5V

60mA

+1.5V

60mA

10UH

10UH

1UH

L69

1UH

12

L28

12

L70

12

12

12

12

C306
I@.1U_4

VCCA_DPLLB

12

C303
I@.1U_4

12

C701
.1U_4

C696
.1U_4

C259

+

I@470U/2.5V

C248

+

I@470U/2.5V

C699

+

470U/2.5V

C688

+

470U/2.5V

.1U_4

+2.5V

C319

+1.5V

12

VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL

VCCA_CRTDAC

12

C291
10U_6.3V

B: CHANGE FROM RB751

R142

VCCGFOLLOW

10

B B

+2.5V

68mA

+VCCP

12

@BLM18PG181S N 1/ 0_6

12

C341

2.2U_6.3V

L39

C333

4.7U/10V_8

12

C293
I@.022U_4

D11

CH551

VCCA_CRTDAC

12

C287
I@.1U_4

21

+VCCP

C646 .47 U /25V

1 2

C658 .47 U /25V

1 2

C694 .22U

C670 .22U

+VCCP

810mA

VCCP_GMCH_CAP1

VCCP_GMCH_CAP2
VCCP_GMCH_CAP3

VCCP_GMCH_CAP4

T29
R29

N29
M29
K29

J29
V28
U28
T28
R28
P28
N28
M28

L28
K28

J28
H28
G28
V27
U27
T27
R27
P27
N27
M27

L27
K27

J27
H27
K26
H26
K25

J25
K24
K23
K22
K21
W20
U20
T20
K20
V19
U19
K19
W18
V18
T18
K18
K17

AC2
AC1
B23
C35
AA1
AA2

F19
E19
G19

H20
K13

J13
K12
W11
V11
U11
T11
R11
P11
N11
M11

L11
K11
W10
V10
U10
T10
R10
P10
N10
M10
K10

J10

Y9

W9

U9
R9
P9
N9
M9

L9

J9
N8
M8
N7
M7
N6
M6
A6
N5
M5
N4
M4
N3
M3
N2
M2
B2
V1
N1
M1
G1

U34H

VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48

VCCH_MPLL1
VCCH_MPLL0
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL

VCCA_CRTDAC0
VCCA_CRTDAC1
VVSSA_CRTDAC

VCC_SYNC
VTT0

VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32
VTT33
VTT34
VTT35
VTT36
VTT37
VTT38
VTT39
VTT40
VTT41
VTT42
VTT43
VTT44
VTT45
VTT46
VTT47
VTT48
VTT49
VTT50
VTT51

@ALVISO_GM/GML

4

POWER

VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1

VCCA_TVBG
VSSA_TVBG

VCCD_TVDAC

VCCDQ_TVDAC

VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2

VCCA_LVDS

VCCHV0
VCCHV1
VCCHV2

VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8

VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCSM37
VCCSM38
VCCSM39
VCCSM40
VCCSM41
VCCSM42
VCCSM43
VCCSM44
VCCSM45
VCCSM46
VCCSM47
VCCSM48
VCCSM49
VCCSM50
VCCSM51
VCCSM52
VCCSM53
VCCSM54
VCCSM55
VCCSM56
VCCSM57
VCCSM58
VCCSM59
VCCSM60
VCCSM61
VCCSM62
VCCSM63
VCCSM64

VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2

VCCA_SM0
VCCA_SM1
VCCA_SM2
VCCA_SM3

VCC3G0

VCC3G1

VCC3G2

VCC3G3

VCC3G4

VCC3G5

VCC3G6

VCCA_3GPLL0
VCCA_3GPLL1
VCCA_3GPLL2

VCCA_3GBG
VSSA_3GBG

F17
E17
D18
C18
F18
E18

H18
G18

D19
H17

B26
B25
A25

A35
B22

B21
A21

AM37
AH37
AP29
AD28
AD27
AC27
AP26
AN26
AM26
AL26
AK26
AJ26
AH26
AG26
AF26
AE26
AP25
AN25
AM25
AL25
AK25
AJ25
AH25
AG25
AF25
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AE17
AE16
AE15
AE14
AP13
AN13
AM13
AL13
AK13
AJ13
AH13
AG13
AF13
AE13
AP12
AN12
AM12
AL12
AK12
AJ12
AH12
AG12
AF12
AE12
AD11
AC11
AB11
AB10
AB9
AP8
AM1
AE1

B28
A28
A27

AF20
AP19
AF19
AF18

AE37
W37
U37
R37
N37
L37
J37

Y29
Y28
Y27

F37
G37

VCC_TVBG

+1.5V

VCC_QTVDAC

V1.8_DDR_CAP6
V1.8_DDR_CAP3
V1.8_DDR_CAP4

B: NO FILTER WHEN EXT. VGA

12

C273
I@.1U_4

C296
.1U_4

Note: All VCCSM
pins shorted
internally.

+2.5VSUS

12

C346

10U_6.3V

C358 .1U_4

1 2

C354 .1U_4

1 2

C348 .1U_4

1 2

12

C315
.1U_4

L32
@BLM18PG181S N 1/ 0_6

+2.5V

12

2mA

C280
10U_6.3V

C356 .1U_4

1 2

C705 .1U_4

1 2

C357 .1U_4

1 2

12

C344
10U_6.3V

+

C339

220U/2.5V

12

+2.5V

150mA

VCC_TVDACC

C264
I@.022U_4

V1.8_DDR_CAP1

V1.8_DDR_CAP2

V1.8_DDR_CAP5

+2.5V

60mA

VCC_DDRDLL

VCC3G_PCIE

12

12

Note: All VCCSM
pins shorted
internally.

3

C274

I@.022U_4

+3V

12

12

C290
.1U_4

C272

I@.022U_4

C260

.022U_4

C360

VCC_QTVDAC

C271

I@.022U_4

+

330U/6.3V-7343

B: NO FILTER WHEN EXT. VGA

12

12

C703

C345

10U_6.3V

10U_6.3V

12

C343

C342
.1U_4

10U_6.3V

VCC_TVDACA

12

C265
I@.1U_4

10mA

+2.5V

12

C302
.01U/16V_4

VCC_TVBG

12

C266
I@.1U_4

12

C261
.1U_4

12

C263
I@.1U_4

+

C359

100U/10V

VCC3G_PCIE

12

+3V

L33

12

@BLM18PG1 81SN1/0_6

120mA

VCC_TVDACB

12

C275

C267

I@.022U_4

I@.1U_4

+1.5V

60mA

12

12

C918
I@10U_6.3V

12

C295
.1U_4

L34

12

@BLM18PG1 81SN1/0_6

C277
10U_6.3V

+3V

E: Add bulk cap. for acer TV

+1.5V

close to PIN D19

L30

@BLM18PG181SN1/0_6

L49

BLM18PG181SN1

12

C349
.1U_4

L71

BLM18PG181SN1
C700
.1U_4

R182

1 2

0.5/F

24mA

12

+1.5V

12

12

+1.5V

+1.5V

30mA

1A

VCCA_3GPLL_1VCCA_3GPLL

L46

BLM18PG181SN1

R133

V1_5VFOLLOW

10

L35

12

@BLM18PG181SN1/0_6

+VCCP

12

+1.5V

2

B: CHANGE FROM RB751

D10

21

+1.5V

CH551

+3V

W13

V13
U13
T13
R13
P13
N13

M13

L13

W12

V12
U12
T12
R12
P12
N12

M12

L12

AB26
AA26

Y26
AB25
AA25

Y25
AB24
AA24

Y24
AB23
AA23

Y23
AB22
AA22

Y22
AB21
AA21

Y21

R21
AB20
AA20
AB19
AA19
AB18
AA18
AB17
AA17

Y17

R17
AB16
AA16

Y16

W16

V16

U16

T16

R16

P16

N16

M16

L16
AB15
AA15

Y15

W15

V15

U15

T15

R15

P15

N15

M15

L15
AB14
AA14

Y14

W14

V14

U14

T14

R14

P14

N14

M14

L14
AA13

Y13
AA12

Y12

U34D

VTT_NCTF0
VTT_NCTF1
VTT_NCTF2
VTT_NCTF3
VTT_NCTF4
VTT_NCTF5
VTT_NCTF6
VTT_NCTF7
VTT_NCTF8
VTT_NCTF9
VTT_NCTF10
VTT_NCTF11
VTT_NCTF12
VTT_NCTF13
VTT_NCTF14
VTT_NCTF15
VTT_NCTF16
VTT_NCTF17

VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8
VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12
VSS_NCTF13
VSS_NCTF14
VSS_NCTF15
VSS_NCTF16
VSS_NCTF17
VSS_NCTF18
VSS_NCTF19
VSS_NCTF20
VSS_NCTF21
VSS_NCTF22
VSS_NCTF23
VSS_NCTF24
VSS_NCTF25
VSS_NCTF26
VSS_NCTF27
VSS_NCTF28
VSS_NCTF29
VSS_NCTF30
VSS_NCTF31
VSS_NCTF32
VSS_NCTF33
VSS_NCTF34
VSS_NCTF35
VSS_NCTF36
VSS_NCTF37
VSS_NCTF38
VSS_NCTF39
VSS_NCTF40
VSS_NCTF41
VSS_NCTF42
VSS_NCTF43
VSS_NCTF44
VSS_NCTF45
VSS_NCTF46
VSS_NCTF47
VSS_NCTF48
VSS_NCTF49
VSS_NCTF50
VSS_NCTF51
VSS_NCTF52
VSS_NCTF53
VSS_NCTF54
VSS_NCTF55
VSS_NCTF56
VSS_NCTF57
VSS_NCTF58
VSS_NCTF59
VSS_NCTF60
VSS_NCTF61
VSS_NCTF62
VSS_NCTF63
VSS_NCTF64
VSS_NCTF65
VSS_NCTF66
VSS_NCTF67
VSS_NCTF68

NCTF

VCCSM_NCTF0
VCCSM_NCTF1
VCCSM_NCTF2
VCCSM_NCTF3
VCCSM_NCTF4
VCCSM_NCTF5
VCCSM_NCTF6
VCCSM_NCTF7
VCCSM_NCTF8

VCCSM_NCTF9
VCCSM_NCTF10
VCCSM_NCTF11
VCCSM_NCTF12
VCCSM_NCTF13
VCCSM_NCTF14
VCCSM_NCTF15
VCCSM_NCTF16
VCCSM_NCTF17
VCCSM_NCTF18
VCCSM_NCTF19
VCCSM_NCTF20
VCCSM_NCTF21
VCCSM_NCTF22
VCCSM_NCTF23
VCCSM_NCTF24
VCCSM_NCTF25
VCCSM_NCTF26
VCCSM_NCTF27
VCCSM_NCTF28
VCCSM_NCTF29
VCCSM_NCTF30
VCCSM_NCTF31

VCC_NCTF0
VCC_NCTF1
VCC_NCTF2
VCC_NCTF3
VCC_NCTF4
VCC_NCTF5
VCC_NCTF6
VCC_NCTF7
VCC_NCTF8

VCC_NCTF9
VCC_NCTF10
VCC_NCTF11
VCC_NCTF12
VCC_NCTF13
VCC_NCTF14
VCC_NCTF15
VCC_NCTF16
VCC_NCTF17
VCC_NCTF18
VCC_NCTF19
VCC_NCTF20
VCC_NCTF21
VCC_NCTF22
VCC_NCTF23
VCC_NCTF24
VCC_NCTF25
VCC_NCTF26
VCC_NCTF27
VCC_NCTF28
VCC_NCTF29
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCC_NCTF45
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VCC_NCTF49
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
VCC_NCTF67
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCC_NCTF71
VCC_NCTF72
VCC_NCTF73
VCC_NCTF74
VCC_NCTF75
VCC_NCTF76
VCC_NCTF77
VCC_NCTF78

@ALVISO_GM/GML

AD26
AC26
AD25
AC25
AD24
AC24
AD23
AC23
AD22
AC22
AD21
AC21
AD20
AC20
AD19
AC19
AD18
AC18
AD17
AC17
AD16
AC16
AD15
AC15
AD14
AC14
AD13
AC13
AB13
AD12
AC12
AB12

W26
V26
U26
T26
R26
P26
N26
M26
L26
W25
V25
U25
T25
R25
P25
N25
M25
L25
W24
V24
U24
T24
R24
P24
N24
M24
L24
W23
V23
U23
T23
R23
P23
N23
M23
L23
W22
V22
U22
T22
R22
P22
N22
M22
L22
W21
V21
U21
T21
P21
N21
M21
L21
Y20
R20
P20
N20
M20
L20
Y19
R19
P19
N19
M19
L19
Y18
R18
P18
N18
M18
L18
W17
V17
U17
T17
P17
N17
M17
L17

1

+2.5VSUS

+VCCP

A A

12

C289
.1U_4

12

C288

4.7U/10V_8

+2.5V

close to PIN B28,A28,A27

QUANTA

Title

Size Doc u m en t N u m be r Re v

5

4

3

2

Date: Sheet

COMPUTER

Alviso (Power)

ZL2 F

C

1

841Tuesday, De ce mber 21, 2004

of

1

+1.25VSUS

1

MD1
MD0 MD4 MD0

A A

CLK_SDRAM0<6>

CLK_SDRAM0#<6>

B B

R224 200
R228 200

C C

D D

+3V +3V

SM_DQS0
MD7

MD2
MD8 MD9

SM_DQS1
MD11 MD14

MD10 MD15

CLK_SDRAM0
CLK_SDRAM0#

MD16
MD17

SM_DQS2
MD19

MD18 MD22
MD24 MD28

MD25
SM_DQS3

MD26 MD30
MD31 MD27

CKE1 CKE3 CKE2
M_A_MA12 M_A_MA11

M_A_MA9 M_B_MA9 M_B_MA8
M_A_MA7
M_A_MA3

M_A_MA10
M_A_BA0

M_A_BMWEA#

SM_CS0#
M_A_MA13

MD33
MD32

SM_DQS4
MD34 MD38

MD35
MD40

MD41
SM_DQS5

MD46 MD43
MD47

MD53
MD48 MD52

SM_DQS6
MD50 MD54

MD51
MD56

MD60
SM_DQS7

MD59
MD58

SMBDT
SMBCK

R225 *10K_4
C408
.1U_4

1

3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99

101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

2

+1.25VSUS +1.25VSUS+1.25VSUS

SODIMM0 SODIMM1

CN27

VREF
VSS
DQ0
DQ1
VDD
DQS0
DQ2
VSS
DQ3
DQ8
VDD
DQ9
DQS1
VSS
DQ10
DQ11
VDD
CK0
CK0
VSS

DQ16
DQ17
VDD
DQS2
DQ18
VSS
DQ19
DQ24
VDD
DQ25
DQS3
VSS
DQ26
DQ27
VDD
CB0
CB1
VSS
DQS8
CB2
VDD
CB3
DU
VSS
CK2
CK2
VDD
CKE1
DU
A12
A9
VSS
A7
A5
A3
A1
VDD
A10/AP
BA0
WE
S0
DU(A13)
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
DQ42
DQ43
VDD
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD
DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDD(SPD)
VDD(ID)

QTC_DDR_SODIMM_H4.0

CLOCK 0,1,2 CLOCK 3,4,5

VREF

VSS
DQ4

DQ5
VDD
DM0

DQ6

VSS

DQ7

DQ12

VDD

DQ13

DM1

VSS

DQ14
DQ15

VDD
VDD

VSS

VSS

DQ20
DQ21

VDD
DM2

DQ22

VSS

DQ23
DQ28

VDD

DQ29

DM3

VSS

DQ30
DQ31

VDD

CB4

CB5

VSS
DM8

CB6
VDD

CB7

DU/RESET

VSS

VSS
VDD
VDD

CKE0

DU/BA2

A11

A8

VSS

A6
A4
A2
A0

VDD

BA1

RAS

CAS

S1

DU

VSS

DQ36
DQ37

VDD
DM4

DQ38

VSS

DQ39
DQ44

VDD

DQ45

DM5

VSS

DQ46
DQ47

VDD

CK1

CK1

VSS

DQ52
DQ53

VDD
DM6

DQ54

VSS

DQ55
DQ60

VDD

PC2100 DDR SDRAM SO-DIMM (200P)

DQ61

DM7

VSS

DQ62
DQ63

VDD

SA0

SA1

SA2

DU

2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

MD5

SDM0
MD6

MD3

MD12MD13
SDM1

MD20
MD21

SDM2

MD29
SDM3

CKE0

M_A_MA8
M_A_MA6

M_A_MA4M_A_MA5
M_A_MA2
M_A_MA0 M_B_MA1

M_A_BA1
M_A_SRASA#
M_A_SCASA#
SM_CS1#

MD37
MD36

SDM4

MD39
MD45

MD44
SDM5

MD42
CLK_SDRAM1#

CLK_SDRAM1
MD49

SDM6

MD55
MD61

MD57
SDM7

MD62
MD63

SMbus address A0

3

CLK_SDRAM3<6>

CLK_SDRAM3#<6>

+2.5VSUS+2.5VSUS

CLK_SDRAM1# <6>

3

R252 200
R263 200

SMBDT<2>
SMBCK<2>

MD1

SM_DQS0
MD7

MD2
MD8

MD13
SM_DQS1

MD11
MD10

CLK_SDRAM3
CLK_SDRAM3#

MD16
MD17

SM_DQS2
MD19

MD18
MD24

MD25
SM_DQS3

MD26
MD31

M_B_MA12

M_B_MA7
M_B_MA3

M_B_MA10
M_B_BA0
M_B_BMWEA#

M_B_MA13

MD33
MD32

SM_DQS4
MD34

MD35
MD40

MD41
SM_DQS5

MD46
MD47

MD53
MD48

SM_DQS6
MD50

MD51
MD56

MD60
SM_DQS7

MD59
MD58

SMBDT

SMBCK

R251 *10K_4
C499
.1U_4

4

+2.5VSUS +2.5VSUS+2.5VSUS+2.5VSUS

CN29

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

35

CK0

37

CK0

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

71

CB0

73

CB1

75

VSS

77

DQS8

79

CB2

81

VDD

83

CB3

85

DU

87

VSS

89

CK2

91

CK2

93

VDD

95

CKE1

97

DU

99

A12

101

A9

103

VSS

105

A7

107

A5

109

A3

111

A1

113

VDD

115

A10/AP

117

BA0

119

WE

121

S0

123

DU(A13)

125

VSS

127

DQ32

129

DQ33

131

VDD

133

DQS4

135

DQ34

137

VSS

139

DQ35

141

DQ40

143

VDD

145

DQ41

147

DQS5

149

VSS

151

DQ42

153

DQ43

155

VDD

157

VDD

159

VSS

161

VSS

163

DQ48

165

DQ49

167

VDD

169

DQS6

171

DQ50

173

VSS

175

DQ51

177

DQ56

179

VDD

181

DQ57

183

DQS7

185

VSS

187

DQ58

189

DQ59

191

VDD

193

SDA

195

SCL

197

VDD(SPD)

199

VDD(ID)

QTC_DDR_SODIMM_H9.2

CKE 2,3CKE 0,1

4

VREF

VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7

DQ12

VDD

DQ13

DM1

VSS
DQ14
DQ15

VDD

VDD

VSS

VSS
DQ20

DQ21

VDD

DM2
DQ22

VSS
DQ23
DQ28

VDD
DQ29

DM3

VSS
DQ30
DQ31

VDD

CB4

CB5

VSS

DM8

CB6

VDD

CB7

DU/RESET

VSS

VSS

VDD

VDD
CKE0

DU/BA2

A11

A8

VSS

A6
A4
A2

A0
VDD
BA1
RAS
CAS

S1

DU

VSS

DQ36
DQ37

VDD
DM4

DQ38

VSS

DQ39
DQ44

VDD

DQ45

DM5
VSS

DQ46
DQ47

VDD
CK1
CK1
VSS

DQ52
DQ53

VDD
DM6

DQ54

VSS

DQ55
DQ60

VDD

PC2100 DDR SDRAM SO-DIMM (200P)

DQ61

DM7
VSS

DQ62
DQ63

VDD
SA0
SA1
SA2

DU

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

SMbus address A1

5

MD5
MD4

SDM0
MD6

MD3
MD9

MD12
SDM1

MD14
MD15

MD20
MD21

SDM2
MD23MD23

MD22
MD28

MD29
SDM3

MD30
MD27

M_B_MA11

M_B_MA6
M_B_MA4M_B_MA5
M_B_MA2
M_B_MA0M_A_MA1

M_B_BA1
M_B_SRASA#
M_B_SCASA#
SM_CS3#SM_CS2#

MD37
MD36

SDM4
MD38

MD39
MD45

MD44
SDM5

MD43
MD42

CLK_SDRAM4#
CLK_SDRAM4

MD49
MD52

SDM6
MD54

MD55
MD61

MD57
SDM7

MD62
MD63

+3V

5

+2.5VSUS

C833
.1U_4

+2.5VSUS

C821
.1U_4

+2.5VSUS

C438
.1U_4

+2.5VSUS

C447
.1U_4

+2.5VSUS

C440
.1U_4

+1.25VSUS

C834
.1U_4

CLK_SDRAM4# <6>
CLK_SDRAM4 <6>CLK_SDRAM1 <6>

6

C823
.1U_4

C827
.1U_4

C441
.1U_4

C443
.1U_4

C819
.1U_4

C395
.1U_4

C822
.1U_4

C407
.1U_4

C432
.1U_4

C404
.1U_4

C820
.1U_4

C434
.1U_4

C830
.1U_4

C405
.1U_4

C439
.1U_4

C448
.1U_4

C442
.1U_4

C456
.1U_4

6

7

C825
.1U_4

C832
.1U_4

C435
.1U_4

C396
.1U_4

C402
.1U_4

+2.5VSUS

C424
150U/6.3V_7

M_A_MA[0..13]
M_A_BA0
M_A_BA1
M_A_SRASA#
M_A_SCASA#
M_A_BMWEA#

M_B_MA[0..13]
M_B_BA0
M_B_BA1
M_B_SRASA#
M_B_SCASA#
M_B_BMWEA#

MD[0..63]
SM_DQS[0..7]
SDM[0..7]

SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#

CKE0
CKE1
CKE2
CKE3

Size Document Number Re v

DDR SO-DIMM ( 200P )

Date: Sheet

7

C828

C829
.1U_4

C818
.1U_4

C436
.1U_4

C398
.1U_4

C412
.1U_4

C835
150U/6.3V_7

C826

.1U_4

.1U_4

C831

C433

.1U_4

.1U_4

C444

C437

.1U_4

.1U_4

C400

C399

.1U_4

.1U_4

C410

C411

.1U_4

.1U_4

M_A_MA[0..13] <7,10>

M_A_BA0 <7,10>

M_A_BA1 <7,10>
M_A_SRASA# <7,10>
M_A_SCASA# <7,10>

M_A_BMWEA# <7,10>

M_B_MA[0..13] <7,10>
M_B_BA0 <7,10>
M_B_BA1 <7,10>
M_B_SRASA# <7,10>
M_B_SCASA# <7,10>
M_B_BMWEA# <7,10>

MD[0..63] <7,10>
SM_DQS[0..7] <7,10>
SDM[0..7] <7,10>

SM_CS0# <6,10>
SM_CS1# <6,10>
SM_CS2# <6,10>
SM_CS3# <6,10>

CKE0 <6,10>
CKE1 <6,10>
CKE2 <6,10>
CKE3 <6,10>

PROJECT : ZL2

Quanta Computer Inc.

C406
.1U_4

C824
.1U_4

C445
.1U_4

C401
.1U_4

C403
.1U_4

8

941Tuesday, December 21, 2004

of

8

C397
.1U_4

C449
.1U_4

C446
.1U_4

C394
.1U_4

F

1

2

3

4

5

6

7

8

+1.25V

C385

C425

.1U_4

.1U_4

A A

B B

+1.25V

C384
.1U_4

C487
.1U_4

C486
.1U_4

C458
.1U_4

C377
.1U_4

C388
.1U_4

For terminal R-pack.

C416

C459

.1U_4

.1U_4

C417

C490

.1U_4

.1U_4

C468
.1U_4

C427
.1U_4

C485
.1U_4

C426
.1U_4

C383
.1U_4

C472
.1U_4

C461
.1U_4

C492
.1U_4

C467
.1U_4

C489
.1U_4

C462
.1U_4

C483
.1U_4

C479
.1U_4

C460
.1U_4

C478
.1U_4

C457
.1U_4

C415
.1U_4

C481
.1U_4

C378
.1U_4

C482
.1U_4

C466
.1U_4

C480
.1U_4

C484
.1U_4

C477
.1U_4

C463
.1U_4

C476
.1U_4

19 PCS

19 PCS

+1.25V

C491
.1U_4

C464
.1U_4

C465
.1U_4

C488
.1U_4

C494
150U/6.3V_7

+1.25V+1.25V +1.25V

R264 56_4
RN78
4P2R-S-56
RN77
4P2R-S-56

RN75
4P2R-S-56
RN74
4P2R-S-56

RN73
4P2R-S-56
RN72
4P2R-S-56

RN64
4P2R-S-56
RN86
4P2R-S-56

C C

RN63
4P2R-S-56
RN62
4P2R-S-56

RN61
4P2R-S-56
RN60
4P2R-S-56

RN81
4P2R-S-56
RN59
4P2R-S-56

RN58
4P2R-S-56
RN57
4P2R-S-56

MD58 MD62
MD59

MD56

MD53 MD55 M_B_MA8
MD47
MD46 MD50

MD41
MD34 MD44

MD26 MD39
MD31
MD27
MD30

MD24 MD28 M_A_MA9
MD19
MD18

MD17
MD16
MD11 MD5
MD10

MD9
MD12
MD8
MD13

MD2
MD7
MD0
MD1

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

RN100
4P2R-S-56

MD63
MD57

RN99

MD61

4P2R-S-56

MD54

RN98
4P2R-S-56

MD51

RN76
4P2R-S-56

RN71
4P2R-S-56

MD32 M_B_MA1
MD45

RN95
4P2R-S-56

RN94

MD38

4P2R-S-56

MD37

RN93
4P2R-S-56

MD36

MD29

RN85
4P2R-S-56

MD23

RN84
4P2R-S-56

MD22

MD3

RN80

MD6

4P2R-S-56
RN79
4P2R-S-56

MD4

MD20

RN83
4P2R-S-56

MD21
MD14

RN82

MD15

4P2R-S-56

MD43

RN96
4P2R-S-56

MD42

MD49

RN97

MD52

4P2R-S-56

SDM0

SDM1

SDM2

SDM3

SM_DQS0

SM_DQS1

SM_DQS2

SM_DQS3

MD[0..63]
SM_DQS[0..7]
SDM[0..7]
M_A_MA[0..13]

M_A_BA0
M_A_BA1
M_A_SRASA#
M_A_SCASA#
M_A_BMWEA#

SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#

CKE[0..3]

1 2

R265 56_4

1 2

R266 56_4

1 2

R267 56_4

1 2

R254 56_4

1 2

R255 56_4

1 2

R256 56_4

1 2

R257 56_4

1 2

R268 56_4

1 2

R269 56_4

1 2

R270 56_4

1 2

R271 56_4

1 2

R258 56_4

1 2

R259 56_4

1 2

R260 56_4

1 2

R261 56_4

1 2

MD[0..63] <7,9>
SM_DQS[0..7] <7,9>
SDM[0..7] <7,9>
M_A_MA[0..13] <7,9>

M_A_BA0 <7,9>

M_A_BA1 <7,9>
M_A_SRASA# <7,9>
M_A_SCASA# <7,9>

M_A_BMWEA# <7,9>

SM_CS0# <6,9>
SM_CS1# <6,9>
SM_CS2# <6,9>
SM_CS3# <6,9>

CKE[0..3] <6,9>

SDM4

SDM5

SDM6

SDM7

SM_DQS4

SM_DQS5

SM_DQS6

SM_DQS7

M_B_MA[0..13]
M_B_BA0
M_B_BA1
M_B_SRASA#
M_B_SCASA#
M_B_BMWEA#

M_B_MA[0..13] <7,9>
M_B_BA0 <7,9>
M_B_BA1 <7,9>
M_B_SRASA# <7,9>
M_B_SCASA# <7,9>
M_B_BMWEA# <7,9>

RN92
4P2R-S-56
RN69
4P2R-S-56

RN65
4P2R-S-56
RN88
4P2R-S-56

RN68
4P2R-S-56
RN67
4P2R-S-56

RN55
4P2R-S-56
RN18
4P2R-S-56

RN13
4P2R-S-56
RN15
4P2R-S-56

RN51
4P2R-S-56

RN87
4P2R-S-56

2

M_B_SCASA#
M_B_BA0
M_B_BMWEA#

M_B_MA12
CKE3 M_B_MA0MD48

M_B_MA6

M_B_MA10
M_B_MA3

M_B_MA9 M_A_MA10MD35

M_A_MA0
M_A_SCASA#
M_A_BA0
M_A_BMWEA#

CKE1
M_A_MA12
M_A_MA1
M_A_MA5

M_A_MA11
CKE0

CKE2
M_B_MA11 M_B_MA13

1
3
1
3

1
3
1
3

1
3
1
3

1
3
3
1

1
3
1
3

1
3

1
3

1

4

3

2

1

4

3

1

2

3

4

1

2

3

4

2

1

4

3
1

2

3

4

1

2

3

4

4

1

2

3

2

1

4

3
1

2

3

4

2

1

4

3

2

1

4

3

2
4
2
4

2
4
2
4

2
4
2
4

2
4
2
4

2
4
2
4

2
4

2
4

SM_CS3#
M_B_SRASA#
M_B_BA1
M_B_MA4MD60

M_B_MA2
M_B_MA5

M_B_MA7

M_A_SRASA#
SM_CS1#MD40 MD33
M_A_MA3

M_A_BA1
M_A_MA4
M_A_MA2

M_A_MA8
M_A_MA6MD25

M_A_MA7

SM_CS0#
M_A_MA13

SM_CS2#

RN91
4P2R-S-56
RN90
4P2R-S-56

RN89
4P2R-S-56
RN66
4P2R-S-56

RN56
4P2R-S-56
RN16
4P2R-S-56

RN54
4P2R-S-56
RN53
4P2R-S-56

RN52
4P2R-S-56
RN14
4P2R-S-56

RN17
4P2R-S-56

RN70
4P2R-S-56

D D

Size Document Number Re v

DDR TERMINATION

1

2

3

4

5

6

Date: Sheet

7

PROJECT : ZL2

Quanta Computer Inc.

10 41Tuesday, December 21, 2004

of

8

F

5

GMCHEXP_TXP[0..15]<6>

GMCHEXP_TXN[0..15]<6>

GMCHEXP_RXP[0..15]<6,15>
GMCHEXP_RXN[0..15]<6,15>

D D

GMCHEXP_RXP0
GMCHEXP_RXN0
GMCHEXP_RXP1
GMCHEXP_RXN1
GMCHEXP_RXP2
GMCHEXP_RXN2
GMCHEXP_RXP3

VGA1.2V

+3V

+3V

R74 *10K_4

GMCHEXP_RXN3
GMCHEXP_RXP4
GMCHEXP_RXN4
GMCHEXP_RXP5
GMCHEXP_RXN5
GMCHEXP_RXP6
GMCHEXP_RXN6
GMCHEXP_RXP7
GMCHEXP_RXN7
GMCHEXP_RXP8
GMCHEXP_RXN8
GMCHEXP_RXP9
GMCHEXP_RXN9
GMCHEXP_RXP10
GMCHEXP_RXN10
GMCHEXP_RXP11
GMCHEXP_RXN11
GMCHEXP_RXP12
GMCHEXP_RXN12
GMCHEXP_RXP13
GMCHEXP_RXN13
GMCHEXP_RXP14
GMCHEXP_RXN14
GMCHEXP_RXP15
GMCHEXP_RXN15

CLK_PCIE_VGA<2>
CLK_PCIE_VGA#<2>

C C

B B

C231 E@.1U_4
C234 E@.1U_4
C227 E@.1U_4
C224 E@.1U_4
C211 E@.1U_4
C205 E@.1U_4
C212 E@.1U_4
C207 E@.1U_4
C194 E@.1U_4
C188 E@.1U_4
C195 E@.1U_4
C191 E@.1U_4
C178 E@.1U_4
C171 E@.1U_4
C160 E@.1U_4
C154 E@.1U_4
C159 E@.1U_4
C151 E@.1U_4
C182 E@.1U_4
C172 E@.1U_4
C140 E@.1U_4
C131 E@.1U_4
C141 E@.1U_4
C135 E@.1U_4
C116 E@.1U_4
C112 E@.1U_4
C117 E@.1U_4
C113 E@.1U_4
C96 E@.1U_4

C98 E@.1U_4
C95 E@.1U_4

R101 E@150/F_4
R90 E@100/F_4
R89 E@10K/F
R77 *10K_4
R76 E@10K_4

PLTRST#<6,15,18,21,29,31,32,33>

R72
E@1K_4

F: NEW ADD 1K PULLDOWN

R120
*1M_4

XT_IN

XT_OUT

+3V

5

C258 E@22P_4

A A

E@TXC=27MHz

Y2

C242 E@22P_4

GMCHEXP_TXP0
GMCHEXP_TXN0
GMCHEXP_TXP1
GMCHEXP_TXN1
GMCHEXP_TXP2
GMCHEXP_TXN2
GMCHEXP_TXP3
GMCHEXP_TXN3
GMCHEXP_TXP4
GMCHEXP_TXN4
GMCHEXP_TXP5
GMCHEXP_TXN5
GMCHEXP_TXP6
GMCHEXP_TXN6
GMCHEXP_TXP7
GMCHEXP_TXN7
GMCHEXP_TXP8
GMCHEXP_TXN8
GMCHEXP_TXP9
GMCHEXP_TXN9
GMCHEXP_TXP10
GMCHEXP_TXN10
GMCHEXP_TXP11
GMCHEXP_TXN11
GMCHEXP_TXP12
GMCHEXP_TXN12
GMCHEXP_TXP13
GMCHEXP_TXN13
GMCHEXP_TXP14
GMCHEXP_TXN14
GMCHEXP_TXP15
GMCHEXP_TXN15

V_GMCHEXP_RXP0
V_GMCHEXP_RXN0
V_GMCHEXP_RXP1
V_GMCHEXP_RXN1
V_GMCHEXP_RXP2
V_GMCHEXP_RXN2
V_GMCHEXP_RXP3
V_GMCHEXP_RXN3
V_GMCHEXP_RXP4
V_GMCHEXP_RXN4
V_GMCHEXP_RXP5
V_GMCHEXP_RXN5
V_GMCHEXP_RXP6
V_GMCHEXP_RXN6
V_GMCHEXP_RXP7
V_GMCHEXP_RXN7
V_GMCHEXP_RXP8
V_GMCHEXP_RXN8
V_GMCHEXP_RXP9
V_GMCHEXP_RXN9
V_GMCHEXP_RXP10
V_GMCHEXP_RXN10
V_GMCHEXP_RXP11
V_GMCHEXP_RXN11
V_GMCHEXP_RXP12
V_GMCHEXP_RXN12
V_GMCHEXP_RXP13
V_GMCHEXP_RXN13
V_GMCHEXP_RXP14
V_GMCHEXP_RXN14
V_GMCHEXP_RXP15
V_GMCHEXP_RXN15

VPCIE_CR+
VPCIE_CR­VPCIE_CAL
VPCIE_TIN

B: POP R76

R127
E@715/F

T134
T142

R648

E@1K_4

T145

R121 *33_4
R119 *33_4

R122 E@1K_4
R57 E@0_4

R347 E@0_4

T39

R126
E@10K_4

R125 *10K_4

-VPCIE_RSTM
V_R2SET
EXT_TV_Y/G

EXT_TV_C/R
EXT_TV_COMP

VTHM_CLK
VTHM_DAT

27M_IN
27M_O

Z_V0101
Z_V0102
Z_V0103

Z_V0104

AH30
AG30
AG29
AF29
AE29
AE30
AD30
AD29
AC29
AB29
AB30
AA30
AA29

W29
W30

U29

R30
R29

N29
N30
M30
M29

AF26
AE26
AC25
AB25
AC27
AB27
AC26
AB26

W25
W27
W26

U25
U27
U26

N25
N27
N26

AF27
AE27

AC23
AB24
AB23

AE25
AD25

AD24
AH21
AK21

AJ22

AK22

AJ24

AK24
AG22

AG23

AJ23

AH24

AH28

AJ29

AH27

AF25
AH25

Y29

V30
V29

T29
T30

P29

L29
K29
K30

J30

Y25
Y27
Y26

T25
T27
T26

P25
P27
P26
L25

K25
L27
K27
L26
K26

E8
B6

U29A

PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_RX8P
PCIE_RX8N
PCIE_RX9P
PCIE_RX9N
PCIE_RX10P
PCIE_RX10N
PCIE_RX11P
PCIE_RX11N
PCIE_RX12P
PCIE_RX12N
PCIE_RX13P
PCIE_RX13N
PCIE_RX14P
PCIE_RX14N
PCIE_RX15P
PCIE_RX15N

PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N

PCIE_REFCLKP
PCIE_REFCLKN

PCIE_CALRP
PCIE_CALRN
PCIE_CALI

PCIE_TESTIN
PERSTb

PERSTb_MASK
R2SET
Y_G

C_R_PR
COMP_B_PB

H2SYNC
V2SYNC

DDC3CLK
DDC3DATA

SSIN
SSOUT

XTALIN
XTALOUT

TESTEN
TEST_YCLK
TEST_MCLK
PLLTEST

STEREOSYNC

E@M24/M22/M26

DAC2

SS PCI EXPRESSCLK

4

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8

GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14

GPIO_PWRCNTL

GPIO_MEMSSIN

DVOMODE

DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8

DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DPVDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23

DVPCNTL_0

DVPCNTL_1

DVPCNTL_2

DVPCNTL_3

VREFG

TXOUT_L0N

TXOUT_L0P

TXOUT_L1N

TXOUT_L1P

TXOUT_L2N

TXOUT_L2P

TXOUT_L3N

TXOUT_L3P

TXCLK_LN

TXCLK_LP
TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P

LVDS DVO / EXT TMDS / GPIOTHERM TMDSDAC1

TXOUT_U2N
TXOUT_U2P
TXOUT_U3N
TXOUT_U3P

TXCLK_UN
TXCLK_UP

DIGON

BLON

TXCM

DDC2CLK

DDC2DATA

HSYNC
VSYNC

DDC1DATA

DDC1CLK

GPIO_AUXWIN

DPLUS

DMINUS

4

TX0M
TX0P
TX1M
TX1P
TX2M
TX2P

TXCP

HPD1

RSET

R
G
B

AJ5
AH5
AJ4
AK4
AH4
AF4
AJ3
AK3
AH3
AJ2
AH2
AH1
AG3
AG1
AG2
AF3
AF2

AE10
AH6

AJ6
AK6
AH7
AK7
AJ7
AH8
AJ8
AH9
AJ9
AK9
AH10
AE6
AG6
AF6
AE7
AF7
AE8
AG8
AF8
AE9
AF9
AG10
AF10

AJ10
AK10
AJ11
AH11

AG4

AH15
AH16
AJ16
AJ17
AJ18
AK18
AJ20
AJ21
AK19
AJ19
AG16
AG17
AF16
AF17
AE18
AE19
AF19
AF20
AG19
AG20

AE12
AG12

AK13
AJ13
AJ14
AJ15
AK15
AK16
AJ12
AK12

AE13
AE14

AF12
AK27

AJ27
AJ26

AJ25
AK25

AH26
AG25

AF24
AG24

AF11
AE11

T148
T143
T141
T33
T130
T136
T127
T129
T132

T37
T123
T126

DVOMODE

DVPDATA_16
DVPDATA_17

DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23

DVPCNTL0

R374 E@10K_4

DVPCNTL1

R389 E@10K_4

DVPCNTL2

R401 E@10K_4

DVPCNTL3

R392 E@10K_4
R116 E@1K_4

VREFG

R115 E@1K_4
C236 E@.1U_4

EXT_TXLOUT0­EXT_TXLOUT0+
EXT_TXLOUT1­EXT_TXLOUT1+
EXT_TXLOUT2­EXT_TXLOUT2+

EXT_TXLCLKOUT­EXT_TXLCLKOUT+
EXT_TXUOUT0­EXT_TXUOUT0+
EXT_TXUOUT1­EXT_TXUOUT1+
EXT_TXUOUT2­EXT_TXUOUT2+

EXT_TXUCLKOUT­EXT_TXUCLKOUT+

DISP_ON
BLON

TMDS_TX0M
TMDS_TX0P
TMDS_TX1M
TMDS_TX1P
TMDS_TX2M
TMDS_TX2P
TMDS_TXCM
TMDS_TXCP

TMDS_DDCCLK
TMDS_DDCDATA

EXT_VGA_RED
EXT_VGA_GRN
EXT_VGA_BLU

EXT_HSYNC
EXT_VSYNC

V_RST

R112 E@499/F

EXT_DDCDAT
EXT_DDCCLK

VGATHRM+
VGATHRM-

B: POP R369

R369 E@10K_4
R367 *10K_4

ROMIDCFG0 <13>

VGA_PWR_SW

V_MEMSSIN

C245 E@10P_4

R102 E@0_4
T139

T150
T147
T138
T149
T137
T140
T131
T43
T42
T45
T41
T31
T40
T44
T36

DVPDATA_16 <13>
DVPDATA_17 <13>

EDIDDATA <16>

EDIDCLK <16>

DVPDATA_21 <13>
DVPDATA_22 <13>
DVPDATA_23 <13>

241
241
241

T135
T144

241

241
241
241

T38
T35

241

EXT_DDCDAT <17>
EXT_DDCCLK <17>

-VGA_ALERT

R113
*10K_4

3

+3V

R128 E@33_4

+3V

+3V

TXLOUT0-

RN101E@4P2R-S-0

TXLOUT0+

3

TXLOUT1-

RN102E@4P2R-S-0

TXLOUT1+

3

TXLOUT2-

RN103E@4P2R-S-0

TXLOUT2+

3

RN104E@4P2R-S-0

TXLCLKOUT­TXLCLKOUT+

3

TXUOUT0-

RN8E@4P2R-S-0

3

TXUOUT0+
TXUOUT1-

RN7E@4P2R-S-0

3

TXUOUT1+
TXUOUT2-

RN6E@4P2R-S-0

3

TXUOUT2+

TXUCLKOUT-

TXUCLKOUT+

3

RN5E@4P2R-S-0

DISP_ON <6,16>
BLON <6,16>

TMDS_DDCCLK <15,33>
TMDS_DDCDATA <15,33>

TMDS_HPD <15,33>
EXT_VGA_RED <17>

EXT_VGA_GRN <17>
EXT_VGA_BLU <17>

EXT_HSYNC <17>
EXT_VSYNC <17>

Close to pin ASIC

TMDS_TX0M
TMDS_TX0P

TMDS_TX1M
TMDS_TX1P

TMDS_TX2M
TMDS_TX2P

TMDS_TXCM
TMDS_TXCP

3

MEMORY CLOCK SPREAD
SPECTRUM

F: NEW ADD PWR PLAY

VGA_PWR_SW <38>

+3V

R440 E@47

VGATHRM-

10 mil trace /
10 mil space

VGATHRM+

R381 ED@330_4

R382 ED@330_4

R383 ED@330_4

R380 ED@330_4

Hi: 1.0V
Lo: 1.2V

XT_IN
1726_S0

1726_CKO

TXLOUT0- <6,16>
TXLOUT0+ <6,16>
TXLOUT1- <6,16>
TXLOUT1+ <6,16>
TXLOUT2- <6,16>
TXLOUT2+ <6,16>

TXLCLKOUT- <6,16>
TXLCLKOUT+ <6,16>
TXUOUT0- <6,16>
TXUOUT0+ <6,16>
TXUOUT1- <6,16>
TXUOUT1+ <6,16>
TXUOUT2- <6,16>
TXUOUT2+ <6,16>

TXUCLKOUT- <6,16>
TXUCLKOUT+ <6,16>

1
2
3

R93 ED@0_4

1 2

R94 ED@0_4

1 2

R95 ED@0_4

1 2

R96 ED@0_4

1 2

R97 ED@0_4

1 2

R98 ED@0_4

1 2

R91 ED@0_4

1 2

R92 ED@0_4

1 2

U13

XIN
VSS
SRS
SSCLK4REF

E@CY25819

MK1726-8

15 MIL

3V_THM1

C662
E@.1U_4

C638
E@2200P_4

2

+3V

R123
*10K_4

R131
*10K_4

XT_OUT

8

XOUT

VDD

MK1726_VDD

7

MK_PD

6

PD

MK_27M

5

R144 E@33_4

C297
E@10P_4

B: CHANGE FROM 27M_O TO 27M_IN

27M_IN

27M_O

R378E@0_4

R379*0_4

VGA27M

R398
E@71.5/F

PLACE CLOSE TO ASIC

EXT_TV_Y/G<16>

EXT_TV_C/R<16>

EXT_TV_COMP<16>

2

U32

VCC1/ALERT

3

DXN

2

DXP
GND5/THERM

E@MAX6657

TX0- <15,33>

TX0+ <15,33>

TX1- <15,33>

TX1+ <15,33>

TX2- <15,33>

TX2+ <15,33>
CLK- <15,33>

CLK+ <15,33>

6
7

SDA

8

SCLK

4

B: DEPOP WHEN NO DOCKING

Size Document Number Rev
Custom

Date: Sheet

MK_PD1726_S0

R146

*10K_4

1

SRS= 1 DOWN -2.5%
0 DOWN -1.8%
M DOWN -0.6%

27MOUT

VTHM_DAT
VTHM_CLK

R397E@121/F

VTHM_CLK
VTHM_DAT
DVPDATA_20

EXT_VGA_RED
EXT_VGA_GRN
EXT_VGA_BLU

EXT_TV_Y/G
EXT_TV_C/R
EXT_TV_COMP

+3V

R424 *0_4

C278
E@.1U_4

R385 E@150/F_4
R386 E@150/F_4
R384 E@150/F_4

+3V

R420
E@10K_4

2

PROJECT : ZL2

Quanta Computer Inc.

VGA HOST(ATI M24)

1

L38

+3V

E@0
C270
E@22U/10V_8

+3V

R88 E@6.8K/F
R86 E@6.8K/F
R100 E@10K_4

PLACE CLOSE TO ASIC

R375 E@150/F_4
R376 E@150/F_4
R377 E@150/F_4C94 E@.1U_4

R423
E@10K_4

Q36
E@2N7002

-VGA_ALERT

MEMVMODE0 <13>

3

1

R419
E@0_4

M26

of

11 41Tuesday, December 2 1, 2004

F

5

4

3

2

1

VDD1

C204

4

U29D

VDD15_AC11
VDD15_AC20

VDDR3_AD19
VDDR3_AD21
VDDR3_AC22

VDDR3_AC21
VDDR3_AC19

VDDR4_AC10
VDDR4_AD10

PCIE_VDDR_12_AG26

PCIE_VDDR_12_AK29

PCIE_VDDR_12_AJ30
PCIE_VDDR_12_AG28
PCIE_VDDR_12_AG27

PCIE_PVDD_12_N24
PCIE_PVDD_12_N23
PCIE_PVDD_12_P23

PCIE_PVDD_18_U23
PCIE_PVDD_18_T23
PCIE_PVDD_18_V23

PCIE_PVDD_18_W23

LVSSR_AF18
LVSSR_AH17
LVSSR_AG15
LVSSR_AG18

TXVSSR_AH14
TXVSSR_AG13
TXVSSR_AG14

I/O POWER

A2VSSN_AH20

A2VSSN_AG21

E@M24/M22/M26

C222
E@.1U_4

VDDC_AC13
VDDC_AD13
VDDC_AD15
VDDC_AC15
VDDC_AC17

VDD15_H20
VDD15_H11
VDD15_M23
VDD15_Y23

VDDR3_AD7

VDDR3_AC8

VDDR4_AG7
VDDR4_AD9
VDDR4_AC9

V_AVDD

VDD1

PVDD

MPVDD

AA1
AA4
AA7
AA8

A15
A21
A28

B30
D26
D23
D20
D17
D14
D11

E27

G10
G13
G15
G19
G22
G27
H22
H19
AD4

AE16
AE17
AF15
AE15

AH19
AH13

AF13
AF14

AF21
AE20

AF23
AH23

AE23
AE22

AK28

K23
K24

H10
H13
H15
H17

L23

F18

T7
R4
R1
N8
N7
M4

L8

N4

J8

J7

J4

J1

T8
V4
V7
V8

A3
A9

B1

D8
D5

F4
G7

N6

A7

VDDR1_T7
VDDR1_R4
VDDR1_R1
VDDR1_N8
VDDR1_N7
VDDR1_M4
VDDR1_L8
VDDR1_K23
VDDR1_K24
VDDR1_N4
VDDR1_J8
VDDR1_J7
VDDR1_J4
VDDR1_J1
VDDR1_H10
VDDR1_H13
VDDR1_H15
VDDR1_H17
VDDR1_T8
VDDR1_V4
VDDR1_V7
VDDR1_V8
VDDR1_AA1
VDDR1_AA4
VDDR1_AA7
VDDR1_AA8
VDDR1_A3
VDDR1_A9
VDDR1_A15
VDDR1_A21
VDDR1_A28
VDDR1_B1
VDDR1_B30
VDDR1_D26
VDDR1_D23
VDDR1_D20
VDDR1_D17
VDDR1_D14
VDDR1_D11
VDDR1_D8
VDDR1_D5
VDDR1_E27
VDDR1_F4
VDDR1_G7
VDDR1_G10
VDDR1_G13
VDDR1_G15
VDDR1_G19
VDDR1_G22
VDDR1_G27
VDDR1_H22
VDDR1_H19
VDDR1_AD4
VDDR1_L23

LVDDR_25_AE16
LVDDR_25_AE17
LVDDR_18_AF15
LVDDR_18_AE15

LPVDD
TPVDD

TXVDDR_AF13
TXVDDR_AF14

VDDRH0
VDDRH1

A2VDD_AF21
A2VDD_AE20

A2VDDQ
AVDD

VDD1DI
VDD2DI

PVDD
MPVDD

E@10U/10V_8

VGA_MEM_IO

C580

E@10U/10V_8

C581

E@1000P_4

C578

E@1000P_4

C589

E@1000P_4

C597

E@1000P_4

(350mA)

D D

VGA_MEM_IO

VGA_MEM_IO

(125mA)

C C

(30mA)

+1.8V

B B

+2.5V

L27

E@BLM18PG181SN1/0_6

E@10U/10V_8

+2.5V
+3V

E@10U/10V_8

+1.8V

L20 E@0_8
C161
E@10U/10V_8

12

C244

E@.1U_4

(80mA)

(28mA)

A A

(5.8mA)

C225

+1.8V

(6mA)

C220
E@.1U_4

C243

C585

E@10U/10V_8

C105
E@.1U_4

L22 E@0_8

E@10U/10V_8

L66 E@0_8

E@10U/10V_8

C219

VGA_MEM_IO

E@.1U_4

C214

+1.8V

E@.1U_4

+1.8V

+1.8V

5

C164

C119

E@.1U_4

E@.1U_4

C177

C156

E@.1U_4

E@.1U_4

L24 *0_8

D9

2 1

C202

E@RB500

E@.1U_4

C203
E@10U/10V_8

C186

C217
E@.1U_4

C233

C632

E@.1U_4

L16 E@0_8

C100
C142 E@.1U_4

L25 E@BLM18PG181SN1/0_6

(67mA)

+1.8V
+1.8V

(7mA)

C240 E@.1U_4

E@BLM18PG181SN1/0_6

L21 E@0_8

L68 E@0_8

C642

E@10U/10V_8

L13 E@0_8

C70

E@10U/10V_8

C110

C109

E@.1U_4

E@.1U_4

C106

C99

E@.1U_4

E@.1U_4

LVDR25

C216
E@.1U_4

LVDDR18

C218
E@.1U_4

LPVDD

C228
E@.1U_4

TXVDDR18

E@.1U_4

VDDRH

A2VDD25

V_A2VDDQ

12

C637 E@.1U_4

L67

12

C641
E@.1U_4

C71
E@.1U_4

VDD15_P8
VDD15_Y8

NC_D9
NC_D13
NC_D19
NC_D25

NC_E4

NC_T4
NC_AB4

AVSSQ

LPVSS

TPVSS

VSSRH0
VSSRH1

A2VSSQ

AVSSN

VSS1DI
VSS2DI

PVSS

MPVSS

C213
E@.1U_4

AC13
AD13
AD15
AC15
AC17

P8
Y8
AC11
AC20
H20
H11
M23
Y23

AD7
AD19
AD21
AC22
AC8
AC21
AC19

AG7
AD9
AC9
AC10
AD10

AG26
AK29
AJ30
AG28
AG27

N24
N23
P23

U23
T23
V23
W23

D9
D13
D19
D25
E4
T4
AB4

AD22

AF18
AH17
AG15
AG18

AH18
AH12

AH14
AG13
AG14

F19
M6

AH20
AG21

AF22
AH22

AE24
AE21

AJ28
A6

C173

C183

E@1000P_4

E@1000P_4

C107

C111
E@1000P_4

E@1000P_4

C215

C192

E@.1U_4

E@.1U_4

C206

C199

E@.1U_4

E@.1U_4

C635 E@.1U_4
C209 E@.1U_4
C634 E@.1U_4

VGA_PCIE12

C143 E@.1U_4
C157 E@.1U_4
C158 E@.1U_4

C168 E@.1U_4
C174 E@.1U_4
C185 E@.1U_4

T14
T19
T16
T18
T17
T25
T29

E@10U/10V_8

C121

E@1U/10V

E@1U/10V

C176
E@.1U_4

C187

C118

E@1000P_4

E@10U/10V_8

C189

C190

E@1000P_4

E@1000P_4

C201

C208

E@.1U_4

E@.1U_4

C200

C198

E@.1U_4

E@.1U_4

C636 E@10U/10V_8
C633 E@.1U_4

L18 E@0_8

C123

C122
E@1000P_4

+1.5V

C148
E@10U/10V_8

C196

(IO.POWER)

E@10U/10V_8

+3V

C197

(EXT.TMDS)

E@10U/10V_8

VGA1.2V

E@1000P_4

VGA1.2V

(PCIE 1.2V)

(40mA)

(2.7mA)

(2mA)

(1034mA)

(85mA)

(QUIET PCIE 1.2V)

(PCIE PLL/IO 1.8V)

+1.8V

(350mA)

B: ADD 220UF

VGA1.2V

+

VGA_MEM_IO

R118 E@0_1206

+2.5V

+1.8V

C919

R45 *0_1206

V_AVDD V_A2VDDQ

C920

E@10U/10V_8

E: Add bulk cap. for acer CRT

C129

C179
E@.1U_4

3

C221
E@1000P_4

C175
E@.1U_4

C146

E@1000P_4

C169
E@.1U_4

C126
E@1000P_4

C153
E@.1U_4

C124

E@1000P_4

C152
E@.1U_4

C166
E@1000P_4

C139
E@.1U_4

C914

E@220U/2.5V

C162

E@1000P_4

C138
E@.1U_4

+1.2V

+3V

(VGA CORE=1.2 OR 1.0V)

(6.2A)

+1.2V

+1.2V

C193

C127
E@1U/10V

E@1U/10V

+1.2V

C149

C155

E@.1U_4

E@.1U_4

A2

VSS_A2

A10

VSS_A10

A16

VSS_A16

A22

VSS_A22

A29

VSS_A29

C1

VSS_C1

C3

VSS_C3

C28

VSS_C28

C30

VSS_C30

D27

VSS_D27

D24

VSS_D24

D21

VSS_D21

D18

VSS_D18

D15

VSS_D15

D12

VSS_D12

D10

VSS_D10

D6

VSS_D6

D4

VSS_D4

F27

VSS_F27

G9

VSS_G9

G12

VSS_G12

G16

VSS_G16

G18

VSS_G18

G21

VSS_G21

G24

VSS_G24

H27

VSS_H27

H23

VSS_H23

H21

VSS_H21

H18

VSS_H18

H16

VSS_H16

H14

VSS_H14

H12

VSS_H12

H9

VSS_H9

H8

VSS_H8

H4

VSS_H4

J23

VSS_J23

J24

VSS_J24

AD12

VSS_AD12

AG5

VSS_AG5

AG9

VSS_AG9

AG11

VSS_AG11

R7

VSS_R7

P4

VSS_P4

M7

VSS_M7

M8

VSS_M8

L4

VSS_L4

K1

VSS_K1

K7

VSS_K7

K8

VSS_K8

R8

VSS_R8

T1

VSS_T1

P17

VDDC_P17

P18

VDDC_P18

P19

VDDC_P19

U12

VDDC_U12

U13

VDDC_U13

U14

VDDC_U14

U17

VDDC_U17

U18

VDDC_U18

U19

VDDC_U19

V19

VDDC_V19

V18

VDDC_V18

V17

VDDC_V17

V14

VDDC_V14

V13

VDDC_V13

V12

VDDC_V12

N18

VDDC_N18

N17

VDDC_N17

N14

VDDC_N14

W17

VDDC_W17

W18

VDDC_W18

W12

VDDC_W12

W13

VDDC_W13

W14

VDDC_W14

N13

VDDC_N13

N19

VDDC_N19

M19

VDDC_M19

M18

VDDC_M18

M12

VDDC_M12

N12

VDDC_N12

M13

VDDC_M13

M14

VDDC_M14

P12

VDDC_P12

P13

VDDC_P13

P14

VDDC_P14

M17

VDDC_M17

W19

VDDC_W19

Size Document Number Rev
Custom

2

Date: Sheet

U29E

PCIE_VSS_K28

PCIE_VSS_L28
PCIE_VSS_M27
PCIE_VSS_M26
PCIE_VSS_M24

CORE GND

PCIE_VSS_M25
PCIE_VSS_M28

PCIE_VSS_P28
PCIE_VSS_N28
PCIE_VSS_R25
PCIE_VSS_R23
PCIE_VSS_R24
PCIE_VSS_R26
PCIE_VSS_R27
PCIE_VSS_R28

PCIE_VSS_T28

PCIE_VSS_T24

PCIE_VSS_U28
PCIE_VSS_V24
PCIE_VSS_V26
PCIE_VSS_V27
PCIE_VSS_V25
PCIE_VSS_V28

PCIE_VSS_Y28
PCIE_VSS_W24
PCIE_VSS_W28

PCIE_VSS_AA26
PCIE_VSS_AA27

PCIE_VSS_A23

PCIE_VSS_AA24
PCIE_VSS_AA25
PCIE_VSS_AA28

PCIE_VSS_AB28
PCIE_VSS_AC28
PCIE_VSS_AD28
PCIE_VSS_AD26
PCIE_VSS_AD27

PCIE_VSS_AE28

PCIE_VSS_AF28
PCIE_VSS_AH29

CENTER ARRAY

VDDC1_W16
VDDC1_M15

VDDC1_R19
VDDC1_T12

E@M24/M22/M26

VSS_U4

VSS_U8
VSS_W7
VSS_W8

VSS_Y4

VSS_AB8
VSS_AB7
VSS_AB1

VSS_ AC4
VSS_AC12
VSS_AC14
VSS_AD16
VSS_AC16
VSS_AC18
VSS_AD18

VSS_AK2

VSS_AJ1

VSS_M16

VSS_N16
VSS_N15
VSS_P15
VSS_P16
VSS_R18
VSS_R17
VSS_R16
VSS_R15
VSS_R14
VSS_R13
VSS_R12
VSS_T13
VSS_T14
VSS_T15

VSS_W15

VSS_V16
VSS_V15
VSS_U15
VSS_U16
VSS_T19
VSS_T18
VSS_T17
VSS_T16

U4
U8
W7
W8
Y4
AB8
AB7
AB1
AC4
AC12
AC14
AD16
AC16
AC18
AD18
AK2
AJ1

K28
L28
M27
M26
M24
M25
M28
P28
N28
R25
R23
R24
R26
R27
R28
T28
T24
U28
V24
V26
V27
V25
V28
Y28
W24
W28
AA26
AA27
AA23
AA24
AA25
AA28
AB28
AC28
AD28
AD26
AD27
AE28
AF28
AH29

M16
N16
N15
P15
P16
R18
R17
R16
R15
R14
R13
R12
T13
T14
T15
W15
V16
V15
U15
U16
T19
T18
T17
T16

W16
M15
R19
T12

VGA_VDDC

PROJECT : ZL2

Quanta Computer Inc.

ATI M24(POWER)

1

L19 E@0_8

+1.2V

C163 E@1U/10V
C165 E@1U/10V
C145 E@1U/10V
C125 E@1U/10V

of

12 41Tuesday, December 2 1, 2004

F

5

4

3

2

1

R54
E@100

MDB[0..63]<14>

C570
E@.1U_4

R342

E@100

R341
E@100

MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8

MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63

AA2
AA6
AA5
AB6

AB5
AD6
AD5

AE5

AE4

AB2

AB3
AC2
AC3
AD3

AE1

AE2

AE3

VDDR1

1.8V

2.5V

D7

F7

E7
G6
G5

F5

E5
C4

B5
C5

A4

B4
C2
D3
D1
D2
G4
H6
H5

J6
K5
K4
L6
L5

G2

F3

H2

E2
F2

J3
F1

H3
U6
U5
U3

V6

W5
W4

Y6
Y5

U2

V2
V1
V3

W3

Y2
Y3

U29C

DQB0
DQB1
DQB2
DQB3
DQB4
DQB5
DQB6
DQB7
DQB8
DQB9
DQB10
DQB11
DQB12
DQB13
DQB14
DQB15
DQB16
DQB17
DQB18
DQB19
DQB20
DQB21
DQB22
DQB23
DQB24
DQB25
DQB26
DQB27
DQB28
DQB29
DQB30
DQB31
DQB32
DQB33
DQB34
DQB35
DQB36
DQB37
DQB38
DQB39
DQB40
DQB41
DQB42
DQB43
DQB44
DQB45
DQB46
DQB47
DQB48
DQB49
DQB50
DQB51
DQB52
DQB53
DQB54
DQB55
DQB56
DQB57
DQB58
DQB59
DQB60
DQB61
DQB62
DQB63

E@M24/M22/M26

MEMVMODE_0

GND

+VDDC_CT

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8

MAB9
MAB10
MAB11
MAB12
MAB13
MAB14

DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7

QSB0

QSB1

QSB2

QSB3

QSB4

QSB5

QSB6

QSB7
RASB#
CASB#

WEB#
CSB0#
CSB1#

MEMORY INTERFACE B

CLKB0#

CLKB1#

DIMB_0
DIMB_1

ROMCS#

MEMVMODE_0
MEMVMODE_1

MEMTEST

MEMVMODE_1

+VDDC_CT

CKEB
CLKB0

CLKB1

M1
M3
L3
L2
M2
M5
P6
N3
K2
K3
J2
P5
P3
P2

E6
B2
J5
G3
W6
W2
AC6
AD2

F6
B3
K6
G1
V5
W1
AC5
AD1

R2
T5
T6
R5
R6
R3
N1

N2
T2

T3

E3
AA3

AF5
C6

C7
C8

R53
E@47

MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13

-DQMB0

-DQMB1

-DQMB2

-DQMB3

-DQMB4

-DQMB5

-DQMB6

-DQMB7
QSB0

QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7

-RASB

-CASB

-WEB

-CSB0

-CSB1

CKEB

CLKB0

-CLKB0
CLKB1

-CLKB1

MEMVMODE0
MEMVMODE1

MBMTEST

MAB0

N5

GND

R355 E@10K_4

R353 E@10
R354 E@10

R356 E@10
R357 E@10

DIMB0
DIMB1

R349
E@4.7K_4

MDA[0..63]<14>

MDA0

H28

G26
G30
D29
D28
E28
E29
G29
G28

G25
E26
E24
E23

D22
B29
C29
C25
C27
B28
B25
C26
B26

E17
D16

E15
E14
C17

B18
B17
B15
C13
B14
C14
C16
A13
A12
C12
B12
C10

B10
E13
E12
E10

H29
J28
J29
J26
H25
H26

F28
F26
F25
F23

F17

F16
F14
F13

F12
F11

DQA0
DQA1
DQA2
DQA3
DQA4
DQA5
DQA6
DQA7
DQA8
DQA9
DQA10
DQA11
DQA12
DQA13
DQA14
DQA15
DQA16
DQA17
DQA18
DQA19
DQA20
DQA21
DQA22
DQA23
DQA24
DQA25
DQA26
DQA27
DQA28
DQA29
DQA30
DQA31
DQA32
DQA33
DQA34
DQA35
DQA36
DQA37
DQA38
DQA39
DQA40
DQA41
DQA42
DQA43
DQA44
DQA45
DQA46
DQA47
DQA48
DQA49
DQA50
DQA51
DQA52

C9

DQA53

B9

DQA54
DQA55
DQA56
DQA57
DQA58
DQA59
DQA60

E9

DQA61

F9

DQA62

F8

DQA63

MDA1
MDA2
MDA3
MDA4
MDA5
MDA6

D D

C C

B B

MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16

MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46

MDA47

MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63

U29B

MEMORY INTERFACE A

E@M24/M22/M26

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8

MAA9
MAA10
MAA11
MAA12
MAA13
MAA14

DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7

QSA0

QSA1

QSA2

QSA3

QSA4

QSA5

QSA6

QSA7
RASA#
CASA#

WEA#
CSA0#
CSA1#

CKEA

CLKA0

CLKA0#

CLKA1

CLKA1#

MVREFD
MVREFS

DIMA_0
DIMA_1

E22
B22
B23
B24
C23
C22
F22
F21
C21
A24
C24
A25
E21
B20
C19

J25
F29
E25
A27
F15
C15
C11
E11

J27
F30
F24
B27
E16
B16
B11
F10

A19
E18
E19
E20
F20
B19

B21
C20

C18
A18

B7
B8

D30
B13

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13

-DQMA0

-DQMA1MDA17

-DQMA2

-DQMA3

-DQMA4

-DQMA5

-DQMA6

-DQMA7
QSA0

QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7

-RASA

-CASA

-WEA

-CSA0

-CSA1
CKEA

R348 E@10K_4

CLKA0

R346 E@10

-CLKA0

R345 E@10

CLKA1

R343 E@10

-CLKA1

R344 E@10

DIMA0
DIMA1

MVREFD

MVREFS

-RASA <14>

-CASA <14>

-WEA <14>

-CSA0 <14>

-CSA1 <14>

MAA[0..13] <14>

-DQMA[0..7] <14>

QSA[0..7] <14>

CKEA <14>

M_CLKA0 <14>

-M_CLKA0 <14>
M_CLKA1 <14>

-M_CLKA1 <14>

T112

C72

T13

E@.1U_4

VGA_MEM_IO VGA_MEM_IO

R51
E@100

Place close to ASIC

MAB[0..13] <14>

-DQMB[0..7] <14>

QSB[0..7] <14>

-RASB <14>

-CASB <14>

-WEB <14>

-CSB0 <14>

-CSB1 <14>

M_CLKB0 <14>

-M_CLKB0 <14>
M_CLKB1 <14>

-M_CLKB1 <14>

T21

T27

R351 E@4.7K_4

R350 *4.7K_4

R352
*4.7K_4

CKEB <14>

MEMVMODE0 <11>

+1.8V

DVPDATA_16
DVPDATA_17
DVPDATA_21
DVPDATA_22
DVPDATA_23

R391
*10K_4

R400
E@10K_4

R107
*10K_4

R105
E@10K_4

ROMIDCFG0

2

STRAPS PIN

STRAPS PIN

GPIO_0

0: use reference voltage from Bandgap

GPIO_6

1: use refer e n c e v o l t a g e f ro m resistor divider

PCI-Express Current Calibration Bandgap Backup

GPIO_1

PCI-Express PLL Calibration force enable

0: Disable PLL force calibration

GPIO_8

1: Enable PLL force calibration

00: PCI Expr es s 1.0 mode

GPIO_(3,2)

A A

01: RESERVED
10: PCI Express 1.0 mode

GPIO(9,13:11)

INT P/D

11: RESERVED
Turn off PCI- Express impedance / strength calibration

GPIO_4

GPIO_5

0: enable

1: disable
Bypass PCI-Express PLL

5

DVPDATA_21~23

MEM TYPE

4

PCI-Express transmitter current compensation

0: Normal

1: Inject extra current for output buffer switching
Strap to set t h e d e b u g m u x es to bting out DEBUG signals

even if regis t e r s a r e i n a c cessible
ROMIDCFG

0x0x: No ROM, CHG_ID=0

0x1x: No Rom, CHG_ID=1
1000: Parallel ROM, Chip ID'S from ROM
1000: Parallel ROM, Chip ID'S from ROM

DVPDATA_21: 0=4Mx32 1=8Mx32
DVPDATA_22: 0=128M 1=64M
DVPDATA_23: 0=Hynix 1=Samsung

3

FOR M26P ONLY
0: 128M
1: 256M

ROMIDCFG0 <11>

+3V

R406
*10K_4

DVPDATA_23

R410
E@10K_4

R390
E@10K_4

DVPDATA_22 DVPDATA_21 DVPDATA_17 DVPDATA_16ROMIDCFG0

R399
*10K_4

C: FOR HYNIX MEMORY

Size Document Number Rev
Custom

Date: Sheet

DVPDATA_16 <11>
DVPDATA_17 <11>
DVPDATA_21 <11>
DVPDATA_22 <11>
DVPDATA_23 <11>

R372
*10K_4

R387
E@10K_4

R373
*10K_4

R388
E@10K_4

PROJECT :ZL2

Quanta Computer Inc.

ATI M24 MEM/STRAPS PIN

1

of

13 41Tuesday, December 2 1, 2004

F

5

M4
M5

L5
M6
M7

L8
M8
M9

M10

M3

L4

L7

K5

L6

A2

G11

G2

A11

L1

K1

K2
M1
L10
L11

M11

L12

M12

M2

B3

B10

G3

G10
K11
K12

L2

L3
G7

G8

H5
H6
H7

H8
G5
G6

E5

E6

E7

E8

F5

F6

F7

F8

D6

D7

D9

J5
J6
J7

J8
K4
K9
D4
C8
C9

C10

D5
D8
E4
E9
F4
F9

G4
G9

H4
H9

J4

J9
A3
C3
C4
C5

A10

VGA_MEM_IO

U4

A0
A1
A2
A3
A4
A5
A6
A7
A8(AP)
BA0
BA1
A9
A10
A11
DQM0
DQM1
DQM2
DQM3
RAS
CAS
WE
CS
CLK
CLK#
CKE
MCL
VREF

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9

NC/TH1
NC/TH2
NC/TH3
NC/TH4
NC/TH5
NC/TH6
NC/TH7
NC/TH8
NC/TH9
NC/TH10
NC/TH11
NC/TH12
NC/TH13
NC/TH14
NC/TH15
NC/TH16

VSS_0
VSS_1

VDDQ_0

VSS_2

VDDQ_1

VSS_3

VDDQ_2

VSS_4

VDDQ_3

VSS_5

VDDQ_4

VSS_6

VDDQ_5

VSS_7

VDDQ_6

VSS_8

VDDQ_7

VSS_9

VDDQ_8

VSSQ_0

VDDQ_9

VSSQ_1

VDDQ_10

VSSQ_2

VDDQ_11

VSSQ_3

VDDQ_12

VSSQ_4

VDDQ_13

VSSQ_5

VDDQ_14

VSSQ_6
VSSQ_7

VDDQ_15
VSSQ_8
VSSQ_9
VSSQ_10
VSSQ_11
VSSQ_12
VSSQ_13
VSSQ_14
VSSQ_15
VSSQ_16
VSSQ_17
VSSQ_18
VSSQ_19

E@VRAM_4MX32-33

PBGA144-VRAM

R336
E@4.99K/F

MAVREF0_A

R337
E@4.99K/F

MDA3

A6

DQ0

MDA0

B5

DQ1

MDA1

A5

DQ2

MDA2

A4

DQ3

MDA7

B1

DQ4

MDA6

C2

DQ5

MDA4

C1

DQ6

MDA5

D1

DQ7

MDA14

J12

DQ8

MDA8

J11

DQ9

MDA15

H12

DQ10

MDA13

H11

DQ11

MDA12

F12

DQ12

MDA9

F11

DQ13

MDA11

E12

DQ14

MDA10

E11

DQ15

MDA17

E2

DQ16

MDA18

E1

DQ17

MDA16

F2

DQ18

MDA19

F1

DQ19

MDA20

H2

DQ20

MDA22

H1

DQ21

MDA23

J1

DQ22

MDA21

J2

DQ23

MDA25

D12

DQ24

MDA24

C12

DQ25

MDA27

C11

DQ26

MDA28

B12

DQ27

MDA31

A9

DQ28

MDA29

A8

DQ29

MDA30

B8

DQ30

MDA26

A7

DQ31

QSA0

A1

DQS0

QSA1

G12

DQS1

QSA2

G1

DQS2

QSA3

A12

DQS3

VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7

C571 E@.022U_4

C6

C574 E@.022U_4

C7

C573 E@.022U_4

D3

C572 E@.022U_4

D10

C565 E@.022U_4

K3

C568 E@.022U_4

K6

C567 E@.022U_4

K7

C569 E@.022U_4

K10

C566 E@.022U_4
C560 E@10U/10V_8

C561 E@22U/10V_8

VGA_MEM_IO

More Memory
decoupling

C559 E@220P

B2
B4

C579 E @4700P

B6
B7

C586 E@.1U_4

B9
B11
D2

C577 E@10U/10V_8 C53 E@10U/10V_8

D11
E3

C576 E@22U/10V_8

E10
F3
F10
H3

Memory

H10

decoupling

J3
J10

VGA_MEM_IO

VGA DDR MEMORY A

@64/128MBytes DDR 128Mbit 1MX32X4 uBGA

MAA[0. .13] <13>
MDA[ 0..63] <13>

-DQMA[0..7] <13>
QSA[ 0..7] <13>

T10
T11
T5
T7
T4
T107
T108
T9

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA12
MAA13
MAA9
MAA10

MAVREF0_A

-CSA1

E@1U/10V

E@1U/10V

MAA11

-DQMA0

-DQMA1

-DQMA2

-DQMA3

-RASA

-CASA

-WEA

-CSA0
M_CLKA0

-M_CLKA0
CKEA

C563

C562

D D

T111
T8
T6
T12
T109
T2
T3
T110

C C

B B

Place close to memor y

-RASA<13>

-CASA<13>

-WEA<13>

-CSA0<13>

CKEA<13>

-CSA1<13>

E@1U/10V

E@1U/10V

C45

C42

4

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA12
MAA13
MAA9
MAA10
MAA11

-DQMA5

-DQMA6

-DQMA4

-DQMA7

-RASA

-CASA

-WEA

-CSA0

M_CLKA1

-M_CLKA1
CKEA

MAVREF1_A

-CSA1

VGA_MEM_IO

R36
E@4.99K/F

MAVREF1_A

R38
E@4.99K/F

U25

M4

A0

M5

A1

L5

A2

M6

A3

M7

A4

L8

A5

M8

A6

M9

A7

M10

A8(AP)

M3

BA0

L4

BA1

L7

A9

K5

A10

L6

A11

A2

DQM0

G11

DQM1

G2

DQM2

A11

DQM3

L1

RAS

K1

CAS

K2

WE

M1

CS

L10

CLK

L11

CLK#

M11

CKE

L12

MCL

M12

VREF

M2

NC1

B3

NC2

B10

NC3

G3

NC4

G10

NC5

K11

NC6

K12

NC7

L2

NC8

L3

NC9

G7

NC/TH1

G8

NC/TH2

H5

NC/TH3

H6

NC/TH4

H7

NC/TH5

H8

NC/TH6

G5

NC/TH7

G6

NC/TH8

E5

NC/TH9

E6

NC/TH10

E7

NC/TH11

E8

NC/TH12

F5

NC/TH13

F6

NC/TH14

F7

NC/TH15

F8

NC/TH16

D6

VSS_0

D7

VSS_1

D9

VDDQ_0

VSS_2

J5

VDDQ_1

VSS_3

J6

VDDQ_2

VSS_4

J7

VDDQ_3

VSS_5

J8

VDDQ_4

VSS_6

K4

VDDQ_5

VSS_7

K9

VDDQ_6

VSS_8

D4

VDDQ_7

VSS_9

C8

VDDQ_8

VSSQ_0

C9

VDDQ_9

VSSQ_1

C10

A10

VDDQ_10

VSSQ_2

D5

VDDQ_11

VSSQ_3

D8

VDDQ_12

VSSQ_4

E4

VDDQ_13

VSSQ_5

E9

VDDQ_14

VSSQ_6

F4

VSSQ_7

VDDQ_15

F9

VSSQ_8

G4

VSSQ_9

G9

VSSQ_10

H4

VSSQ_11

H9

VSSQ_12

J4

VSSQ_13

J9

VSSQ_14

A3

VSSQ_15

C3

VSSQ_16

C4

VSSQ_17

C5

VSSQ_18
VSSQ_19

E@VRAM_4MX32-33

PBGA144-VRAM

8Mx32 AKD56WCT503 K4D55323QF-GC33 1.8V
4Mx32 AKD35W-T506 K4D263238E-GC33 2.5V

DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30

DQ31
DQS0
DQS1
DQS2
DQS3

VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9

A6
B5
A5
A4
B1
C2
C1
D1
J12
J11
H12
H11
F12
F11
E12
E11
E2
E1
F2
F1
H2
H1
J1
J2
D12
C12
C11
B12
A9
A8
B8
A7
A1
G12
G1
A12

C6
C7
D3
D10
K3
K6
K7
K10

B2
B4
B6
B7
B9
B11
D2
D11
E3
E10
F3
F10
H3
H10
J3
J10

VGA_MEM_IO

MDA44
MDA43
MDA46
MDA45
MDA40
MDA47
MDA42
MDA41
MDA54
MDA53
MDA55
MDA52
MDA50
MDA49
MDA51
MDA48
MDA38
MDA39
MDA34
MDA37
MDA36
MDA33
MDA32
MDA35
MDA63
MDA61
MDA62
MDA58
MDA60
MDA59
MDA57
MDA56
QSA5
QSA6
QSA4
QSA7

More Memory
decoupling

C50 E@.022U_4
C44 E@.022U_4
C62 E@.022U_4
C60 E@.022U_4
C51 E@.022U_4
C52 E@.022U_4
C56 E@.022U_4
C55 E@.022U_4
C61 E@.022U_4

C54 E@10U/10V_8
C58 E@22U/10V_8

C43 E@220P
C49 E@4700P
C63 E@.1U_4

C57 E@22U/10V_8

VGA_MEM_IO

3

C137

E@1U/10V

C136

E@1U/10V

U28

M4

A0

M5

A1

L5

A2

M6

A3

M7

A4

L8

A5

M8

A6

M9

A7

M10

A8(AP)

M3

BA0

L4

BA1

L7

A9

K5

A10

L6

A11

A2

DQM0

G11

DQM1

G2

DQM2

A11

DQM3

L1

RAS

K1

CAS

K2

WE

M1

CS

L10

CLK

L11

CLK#

M11

CKE

L12

MCL

M12

VREF

M2

NC1

B3

NC2

B10

NC3

G3

NC4

G10

NC5

K11

NC6

K12

NC7

L2

NC8

L3

NC9

G7

NC/TH1

G8

NC/TH2

H5

NC/TH3

H6

NC/TH4

H7

NC/TH5

H8

NC/TH6

G5

NC/TH7

G6

NC/TH8

E5

NC/TH9

E6

NC/TH10

E7

NC/TH11

E8

NC/TH12

F5

NC/TH13

F6

NC/TH14

F7

NC/TH15

F8

NC/TH16

D6

VSS_0

D7

VSS_1

D9

VSS_2

J5

VSS_3

J6

VSS_4

J7

VSS_5

J8

VSS_6

K4

VSS_7

K9

VSS_8

D4

VSS_9

C8

VSSQ_0

C9

VSSQ_1

C10

VSSQ_2

D5

VSSQ_3

D8

VSSQ_4

E4

VSSQ_5

E9

VSSQ_6

F4

VSSQ_7

F9

VSSQ_8

G4

VSSQ_9

G9

VSSQ_10

H4

VSSQ_11

H9

VSSQ_12

J4

VSSQ_13

J9

VSSQ_14

A3

VSSQ_15

C3

VSSQ_16

C4

VSSQ_17

C5

VSSQ_18

A10

VSSQ_19

E@VRAM_4MX32-33

PBGA144-VRAM

VGA_MEM_IO

VDDQ_0
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8

VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
VDDQ_13
VDDQ_14
VDDQ_15

R67
E@4.99K/F

MBVREF0_B

R66
E@4.99K/F

MDB3

A6

DQ0

MDB1

B5

DQ1

MDB4

A5

DQ2

MDB5

A4

DQ3

MDB6

B1

DQ4

MDB2

C2

DQ5

MDB7

C1

DQ6

MDB0

D1

DQ7

MDB31

J12

DQ8

MDB29

J11

DQ9

MDB24

H12

DQ10

MDB26

H11

DQ11

MDB28

F12

DQ12

MDB30

F11

DQ13

MDB25

E12

DQ14

MDB27

E11

DQ15

MDB15

E2

DQ16

MDB14

E1

DQ17

MDB13

F2

DQ18

MDB12

F1

DQ19

MDB11

H2

DQ20

MDB10

H1

DQ21

MDB8

J1

DQ22

MDB9

J2

DQ23

MDB21

D12

DQ24

MDB23

C12

DQ25

MDB22

C11

DQ26

MDB20

B12

DQ27

MDB16

A9

DQ28

MDB18

A8

DQ29

MDB17

B8

DQ30

MDB19

A7

DQ31

QSB0

A1

DQS0

QSB3

G12

DQS1

QSB1

G1

DQS2

QSB2

A12

DQS3

VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7

C86 E@.022U_4

C6

C89 E@.022U_4

C7

C101 E@.022U_4

D3

C114 E@.022U_4

D10

C90 E@.022U_4

K3

C102 E@.022U_4

K6

C128 E@.022U_4

K7

C120 E@.022U_4

K10

C81 E@.022U_4

C108 E@10U/10V_8
C92 E@22U/10V_8

VGA_MEM_IO VGA_MEM_IO

More Memory
decoupling

C132 E@220P

B2
B4

C80 E@4700P

B6
B7

C85 E@. 1U_4

B9
B11
D2

C97 E@10U/10V_8

D11
E3

C88 E@22U/10V_8

E10
F3
F10
H3
H10
J3
J10

VGA_MEM_IO

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB12
MAB13
MAB9
MAB10
MAB11

-DQMB0

-DQMB3

-DQMB1

-DQMB2

-RASB

-CASB

-WEB

-CSB0
M_CLKB0

-M_CLKB0
CKEB

MBVREF0_B

T115
T20
T15
T23
T22
T113
T114
T116

-CSB1 -CSB1

2

-RASB<13>

-CASB<13>

-WEB<13>

-CSB0<13>

CKEB<13>

T26
T124
T125
T121
T122
T32
T28
T24

-CSB1<13>

Memory
decoupling

VGA DDR MEMORY B

@64/128MBytes DDR 128Mbit 1MX32X4 uBGA

MAB[0. .13] <13>
MDB[ 0..63] <13>

-DQMB[0..7] <13>
QSB[ 0..7] <13>

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB12
MAB13
MAB9
MAB10
MAB11

-DQMB6

-DQMB5

-DQMB7

-DQMB4

-RASB

-CASB

-WEB

-CSB0

M_CLKB1

-M_CLKB1
CKEB

MBVREF1_B

U8

M4

A0

M5

A1

L5

A2

M6

A3

M7

A4

L8

A5

M8

A6

M9

A7

M10

A8(AP)

M3

BA0

L4

BA1

L7

A9

K5

A10

L6

A11

A2

DQM0

G11

DQM1

G2

DQM2

A11

DQM3

L1

RAS

K1

CAS

K2

WE

M1

CS

L10

CLK

L11

CLK#

M11

CKE

L12

MCL

M12

VREF

M2

NC1

B3

NC2

B10

NC3

G3

NC4

G10

NC5

K11

NC6

K12

NC7

L2

NC8

L3

NC9

G7

NC/TH1

G8

NC/TH2

H5

NC/TH3

H6

NC/TH4

H7

NC/TH5

H8

NC/TH6

G5

NC/TH7

G6

NC/TH8

E5

NC/TH9

E6

NC/TH10

E7

NC/TH11

E8

NC/TH12

F5

NC/TH13

F6

NC/TH14

F7

NC/TH15

F8

NC/TH16

D6

VSS_0

D7

VSS_1

D9

VSS_2

J5

VSS_3

J6

VSS_4

J7

VSS_5

J8

VSS_6

K4

VSS_7

K9

VSS_8

D4

VSS_9

C8

VSSQ_0

C9

VSSQ_1

C10

VSSQ_2

D5

VSSQ_3

D8

VSSQ_4

E4

VSSQ_5

E9

VSSQ_6

F4

VSSQ_7

F9

VSSQ_8

G4

VSSQ_9

G9

VSSQ_10

H4

VSSQ_11

H9

VSSQ_12

J4

VSSQ_13

J9

VSSQ_14

A3

VSSQ_15

C3

VSSQ_16

C4

VSSQ_17

C5

VSSQ_18

A10

VSSQ_19

E@VRAM_4MX32-33

PBGA144-VRAM

C603

E@1U/10V

C610

E@1U/10V

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

DQS0
DQS1
DQS2
DQS3

VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7

VDDQ_0
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8

VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
VDDQ_13
VDDQ_14
VDDQ_15

VGA_MEM_IO

A6
B5
A5
A4
B1
C2
C1
D1
J12
J11
H12
H11
F12
F11
E12
E11
E2
E1
F2
F1
H2
H1
J1
J2
D12
C12
C11
B12
A9
A8
B8
A7
A1
G12
G1
A12

C6
C7
D3
D10
K3
K6
K7
K10

B2
B4
B6
B7
B9
B11
D2
D11
E3
E10
F3
F10
H3
H10
J3
J10

R362
E@4.99K/F

MBVREF1_B

R363
E@4.99K/F

1

MDB49
MDB48
MDB51
MDB50
MDB53
MDB52
MDB54
MDB55
MDB42
MDB40
MDB41
MDB43
MDB44
MDB45
MDB46
MDB47
MDB58
MDB59
MDB57
MDB56
MDB60
MDB61
MDB63
MDB62
MDB32
MDB35
MDB34
MDB33
MDB37
MDB39
MDB36
MDB38
QSB6
QSB5
QSB7
QSB4

C621 E@.022U_4
C604 E@.022U_4
C623 E@.022U_4
C612 E@.022U_4
C618 E@.022U_4
C622 E@.022U_4
C609 E@.022U_4
C611 E@.022U_4
C617 E@.022U_4

C251 E@10U/10V_8
C252 E@22U/10V_8

C600 E@220P
C607 E@4700P
C606 E@.1U_4

C79 E@10U/10V_8
C78 E@22U/10V_8

VGA_MEM_IO

More Memory
decoupling

Memory
decoupling

Place close to memor y

M_CLKA0<13>

-M_CLKA0<13>

A A

M_CLKA1<13>

-M_CLKA1<13>

At least a 2.5:1 spacing between the pair At least a 2.5:1 spacing between the pair

These resistors and caps must be placed to minimize
any stubs. These must also be placed after the
memory

5

R340 E@56_4

R339 E@56_4
R43 E@56_4

R41 E@56_4

M_CLKA0-1

C564 E@.01U/ 16V_4

M_CLKA1-1 M_CLKB1-1

C47 E@.01U/16V_4

4

M_CLKB0<13>

-M_CLKB0<13>
M_CLKB1<13>

-M_CLKB1<13>

These resistors and caps must be placed to minimize
any stubs. These must also be placed after the
memory

R62 E@56_4

R59 E@56_4
R360 E@56_4

R361 E@56_4

3

M_CLKB0-1

C115 E@.01U/ 16V_4

C602 E@.01U/ 16V_4

Size Doc u m en t N u m be r Re v
C

2

Date: Sheet

PROJECT : ZL2

Quanta Computer Inc.

VGA DDR VRAM-A CANNEL

1

of

14 41Tuesday, De ce m ber 21, 2004

F

5

4

3

2

1

D D

SDVOB_R+<6>
SDVOB_R-<6>

B: DEPOP WHEN EXT. VGA

+2.5V

+2.5V

R60 ID@1K_4

1 2

R63 ID@1K_4

1 2

SDVO_CTRLCLK

SDVO_CTRLDATA

SDVOB_G+<6>
SDVOB_G-<6>

SDVOB_B+<6>
SDVOB_B-<6>

SDVOB_CLK+<6>
SDVOB_CLK-<6>

DVI_AVDD

SDVOB_R+
SDVOB_R-

SDVOB_G+
SDVOB_G­DVI_AVDD
SDVOB_B+
SDVOB_B-

SDVOB_CLK+
SDVOB_CLK-

INT-

INT+

C223

1 2

ID@.01U/16V_4
C226

1 2

ID@.01U/16V_4

GMCHEXP_RXN1 <6,11>
GMCHEXP_RXP1 <6,11>

PULL LOW FOR DVO NOT PRESENT(INTERNAL PULLLOW IN 915GM)

+2.5V 250mA
+3V 190mA

L14
ID@BLM11A601S

C C

B B

+3V +2.5V

+2.5V

1 2

L17
ID@BLM11A601S

1 2

12

12

C91
ID@.1U_4

C150
ID@.1U_4

DVI_AVDD_PLL

12

C87
ID@10U/10V_8

DVI_DVDD

12

C130
ID@.1U_4

SDVO_CTRLCLK<6>

SDVO_CTRLDATA<6>

12

C147
ID@10U/10V_8

+2.5V

TMDS_DDCDATA<11,33>
TMDS_DDCCLK<11,33>

R58
ID@10K_4

1 2

PLTRST#<6,11,18,21,29,31,32,33>

R56
*100K_4

1 2

DVODATA
DVOCLK

ID@CH7307C-DE

DVI_CLK­DVI_CLK+

DVI_TX0­DVI_TX0+

DVI_TX1­DVI_TX1+

DVI_TX2­DVI_TX2+

1
2
3
4
5
6
7
8

9
10
11
12

47

48

U5

AVDD3

AVDD_PLL
RESET*
AS
SPC
SPD
AGND_PLL
DGND1
SD_PROM
SC_PROM
SD_DDC
SC_DDC
DVDD1

SDVOB_CLK-

TLC*13TLC14TVDD115TDC0*16TDC017TGND118TDC1*19TDC120TVDD221TDC2*22TDC223TGND2

45

46

AGND3

SDVOB_CLK+

43

44

SDVOB_B-

42

41

AVDD2

SDVOB_G-

SDVOB_B+

38

40

39

37

AGND2

SDVOB_R-

SDVOB_R+

SDVOB_G+

AVDD1

SDVOB_STALL-

SDVOB_STALL+

SDVOB_INT-

SDVOB_INT+

AGND1
DGND2
HPDET
DVDD2

VSWING

24

ATPG
SCEN

36
35
34
33
32
31
30
29
28
27
26
25

INT­INT+

DVI_DVDD

R71
ID@1.2K_4

1 2

12

C83
ID@.1U_4

R65 ID@10K_4
R69 ID@10K_4

12

C103

C84

ID@.1U_4

ID@.1U_4

TMDS_HPD <11,33>

12
12

12

C181

C180

ID@.1U_4

ID@.1U_4

12

12

DVI_AVDD

12

C93
ID@10U/10V_8

DVI_TVDD

12

C596
ID@10U/10V_8

L15
ID@BLM11A601S

1 2

L65
ID@BLM11A601S

1 2

+3V

B: ALWAYS NOT ON, TEST ONLY

+3V

DVOCLK
DVODATA

A A

1 2

+3V

1 2

+3V

5

6
5

7

R359 *1K_4

R358 *1K_4

U7

SCL
SDA

WP

*AT24C16

DVOCLK

DVODATA

VCC

GND

1

A0

2

A1

3

A2

8
4

+3V

C170
*.1U_4

4

DVI_CLK­DVI_CLK+

DVI_TX0­DVI_TX0+

DVI_TX1­DVI_TX1+

DVI_TX2­DVI_TX2+

3

R78 ID@0_4

1 2

R79 ID@0_4

1 2

R80 ID@0_4

1 2

R81 ID@0_4

1 2

R82 ID@0_4

1 2

R83 ID@0_4

1 2

R84 ID@0_4

1 2

R85 ID@0_4

1 2

CLK­CLK+

TX0­TX0+

TX1­TX1+

TX2­TX2+

CLK- <11,33>

CLK+ <11,33>

TX0- <11,33>

TX0+ <11,33>

TX1- <11,33>

TX1+ <11,33>

TX2- <11,33>

TX2+ <11,33>

2

QUANTA

Title

Size Document Number Rev

Custom

Date: Sheet

COMPUTER

CH7306/7

ZL2 F

of

15 41Tuesday, December 21, 2004

1

5

+3V

R10
10K_4

D D

D15

2 1

BAS316

D16

2 1

BAS316

PULL HIGH TO +3V_S5 AT PAGE19

BLON <6,11>

4

LID591#DISPON LCDVCC_1 LCDVCC

1
2

MISAKI_LID

SW2

LID591# <19,29>

3
4

3

+3VSUS

C551
.1U_4

DISP_ON<6,11>

DISP_ON

U23

6

IN

4

IN

3

ON/OFF

AAT4280_3

TRACE
80MIL

OUT
GND
GND

2

1

C552

2

.1U_4

5

R334 0_8

C553
10U/10V_8

C555
.1U_4

C556
.01U/16V_4

1

C554
10U/10V_8

Lid Switch

Q2

DTC144EU

C C

2

1 3

EC_FPBACK# <29>

I_EDIDCLK<6>

EDIDCLK<11>

I_EDIDDATA<6>

EDIDDATA<11>

+2.5V

+2.5V

R322

2.2K_4

R332

2.2K_4

+2.5V

2

1

Q55 I@2N7002

1

Q56 I@2N7002

3

+2.5V

2

3

+3V

R328

2.2K_4

EDIDCLK

+3V

R331

2.2K_4

EDIDDATA

E: ADD LEVEL SHIFT FOR EDID

TXUCLKOUT-<6,11>

TXUCLKOUT+<6,11>

TXUOUT0-<6,11>

TXUOUT0+<6,11>

TXLOUT2-<6,11>

TXLOUT2+<6,11>

TXLOUT1-<6,11>

TXLOUT1+<6,11>

TXLOUT0-<6,11>

TXLOUT0+<6,11>

TXLCLKOUT-<6,11>

TXLCLKOUT+<6,11>

D: FOOTPRINT CHANGED

TXUCLKOUT­TXUCLKOUT+

TXUOUT0- TXUOUT1­TXUOUT0+

TXLOUT2­TXLOUT2+

TXLOUT1­TXLOUT1+

TXLOUT0­TXLOUT0+

TXLCLKOUT­TXLCLKOUT+

EDIDCLK
EDIDDATA

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
414243

45

21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

44

46

TXUOUT2­TXUOUT2+

TXUOUT1+
INVCC0

R335 0_8

VADJ
DISPON

LCDVCC

CN2
FOXCONN_LVDS

+5V

+3VSUS

TXUOUT2- <6,11>
TXUOUT2+ <6,11>

TXUOUT1- <6,11>
TXUOUT1+ <6,11>

VIN

L64 BK1608LL121

C34 .1U_4

VIN

12

C558

+

*10U/25V-T

C: DEPOP C558

CONTRAST <29>

C557
1000P_4

PR_INSERT_5V<17,33>

B B

+5V

C256
.1U_4

+5V

C247
.1U_4

+5V

C254
.1U_4

A A

PR_INSERT_5V

TV_Y/G

PR_INSERT_5V

TV_C/R

PR_INSERT_5V

TV_COMP

TV_Y/G

TV_C/R

TV_COMP

U12

6
4

2

6
4

2

6
4

2

VCC

SEL

IN_B1

COM

IN_B0

GND

D@SN74LVC1G3157DCKR
U10

VCC

SEL

IN_B1

COM

IN_B0

GND

D@SN74LVC1G3157DCKR

U11

VCC

SEL

IN_B1

COM

IN_B0

GND

D@SN74LVC1G3157DCKR

R620 ND@0_4

1 2

R621 ND@0_4

1 2

R622 ND@0_4

1 2

TV_Y/G_SYS

TV_C/R_SYS

TV_COMP_SYS

5
1
3

5
1
3

5
1
3

+5V

TV_Y/G_PR
TV_Y/G_SYS

+5V

TV_C/R_PR
TV_C/R_SYS

+5V

TV_COMP_PR
TV_COMP_SYS

TV_Y/G_PR <33>

TV_C/R_PR <33>

TV_COMP_PR <33>

S-VIDEO

INT_TV_Y/G<6>
INT_TV_C/R<6>

INT_TV_COMP<6>

EXT_TV_Y/G<11>
EXT_TV_C/R<11>

EXT_TV_COMP<11>

L26

FBM-10-160808-151T

C246

R129

6P_4

150/F_4

R416 I@0_4
R417 I@0_4
R415 I@0_4

R404 E@0_4
R405 E@0_4
R403 E@0_4

TV_Y/G
TV_C/R
TV_COMP

TV_Y/G
TV_C/R
TV_COMP

C: ADD CIRCUITS WHEN NO DOCKING

5

4

3

B: CHANGE FILTERS' VALUES

TV-CHROMA TV_Y/G_SYSTV_C/R_SYS

C239
6P_4

CN23

6

6

9

9

3

7

7

5

5

TV-COMP TV_COMP_SYS

TV-LUMA

4

4

8

8

13

2

2

2

L36

FBM-10-160808-151T
C268
6P_4

FBM-10-160808-151T
C249
6P_4

C257

R136

6P_4

150/F_4

L29

R135

C253

150/F_4

6P_4

Size Document Number Re v

Date: Sheet

Quanta Computer Inc.

DVO CH7011A & RJ45-11 CON

PROJECT : ZL2

1

16 41Tuesday, December 21, 2004

F

of

1

2

3

4

5

6

7

8

INT_VGA_RED<6>
INT_VGA_GRN<6>
INT_VGA_BLU<6>

INT_VSYNC<6>
INT_HSYNC<6>

A A

INT_DDCCLK<6>

INT_DDCDAT<6>

EXT_VGA_RED<11>
EXT_VGA_GRN<11>
EXT_VGA_BLU<11>

EXT_VSYNC<11>
EXT_HSYNC<11>

EXT_DDCCLK<11>

EXT_DDCDAT<11>

B B

R412 I@0_4
R413 I@0_4
R414 I@0_4

RN111 I@4P2R-S-0

RN112 I@4P2R-S-0

RN105 E@4P2R-S-0

RN106 E@4P2R-S-0

2

1

4

3

4

3

2

1

R394 E@0_4
R395 E@0_4
R396 E@0_4

4

3

2

1

2

1

4

3

VGA_RED
VGA_GRN
VGA_BLU

VSYNC
HSYNC

CRTDCLK
CRTDDAT

VGA_RED
VGA_GRN
VGA_BLU

VSYNC
HSYNC

CRTDCLK
CRTDDAT

SEL
LOW

PR_INSERT_5V<16,33>

FUNCTION

IN_B0
IN_B1HIGH

PR_INSERT_5V
VGA_RED

PR_INSERT_5V
VGA_GRN

PR_INSERT_5V
VGA_BLU

VGA_RED

VGA_GRN

VGA_BLU

C: ADD CIRCUITS WHEN NO DOCKING

VGA_RED_SYS CRT_R_1
VGA_GRN_SYS
VGA_BLU_SYS CRT_B_2

TO CRT

R5

150/F_4

U20

6

SEL

4

COM

2

GND

D@SN74LVC1G3157D C KR
U19

6

SEL

4

COM

2

GND

D@SN74LVC1G3157D C KR
U18

6

SEL

4

COM

2

GND

D@SN74LVC1G3157D C KR

1 2

1 2

1 2

R4

R3

150/F_4

150/F_4

VCC
IN_B1
IN_B0

VCC
IN_B1
IN_B0

VCC
IN_B1
IN_B0

R623 ND@0_4

R624 ND@0_4

R625 ND@0_4

5
1
3

5

VGA_GRN_PR

1

VGA_GRN_SYS

3

5

VGA_BLU_PR

1

VGA_BLU_SYS

3

VGA_RED_SYS

VGA_GRN_SYS

VGA_BLU_SYS

C12

10P_4

+5V

VGA_RED_PR
VGA_RED_SYS

+5V

+5V

C10

C11

10P_4

10P_4

VGA_RED_PR <33>

VGA_GRN_PR <33>

VGA_BLU_PR <33>

L5 0
L6 0
L7 0

+5V

C31
.1U_4

+5V

C30
.1U_4

+5V

C29
.1U_4

C: CHANGE VALUES

CRT_G_1
CRT_B_1

C7

C6

C5

*22P_4

*22P_4

*22P_4

L2 BLM18BA220SN1D
L3 BLM18BA220SN1D
L4 BLM18BA220SN1D

CRT_R_2
CRT_G_2

C4

10P_4

10P_4

+3V
+2.5V

CRTDDAT

CRTDCLK

C3

R316 E@0_4
R317 I@0_4

R318

2.2K_4

CRTDDCPU

R319

2.2K_4

C2

10P_4

CRTDDCPU

1

2N7002

1

2N7002

CRTVDD3

CRTVDD3

R315

2.2K_4

2

R314

2.2K_4

1617

CRT_CONN

CN15

111
12
13
14
15

DDCDAT_1

DDCDAT_1 <33>

DDCCLK_1

DDCCLK_1 <33>

DDCDAT_1
CRT_HS_1
CRT_VS_1
DDCCLK_1

Q29

Q30

3

CRTVDD3

2

3

6
7

2
8
3
9
4

10

5

+3V+2.5V

R2
I@0_8

C C

C8

.1U_4

R6
E@0_8

D2
DA204U

1

2

D7
DA204U

1

2

D3
DA204U

1

2

3

3

3

VGA_RED_SYS

VGA_BLU_SYS

VGA_GRN_SYS

C534 .1U_4

VSYNC

C535 .1U_4

HSYNC

+5V

2 4

+5V

2 4

AHCT1G125DCH

1

53

U21

1

53

U22

AHCT1G125DCH

R8 0_4

R323

1K_4

1 2

R9 0_4

1 2

1 2

CRTVSYNC <33>

CRTVSYNC

CRT HSYN C <33>

CRTHSYNC

CLOSE TO U41, U42

B: CHANGE FROM BEAD

L8 0

L12 0

*22P_4

C33 .1U_4

CRT_VS_1

CRT_HS_1

C9

C32
*22P_4

+5V

F2

POLY_SW I T C H _1.1A

12

CRTVDD2 CRTVDD3

D8
CH551

2 1

E: CHANGE TO 0ohm for Acer LCD

D D

Size Document Number Re v

CRT & S-VIDEO

1

2

3

4

5

6

Date: Sheet

7

PROJECT : ZL2

Quanta Computer Inc.

17 41Tuesday, December 21, 2004

of

8

F

1

VCCRTC

R543
*330K

INTVRMEN

R540

R561

0_4

1 2

3V_ALWAYS

R_3VRTC

12

BT2
BATCON

2 1

2 1

A A

1K_4

B B

D30

RB500

D29

RB500

VCCRTC

1 3

2

2.2U_6.3V

RTC_N013VRTC

Q47
MMBT3904

RTC_N02

C801

RTC

PCLK_ICH<2>

C C

PDD[0..15]<21>

PDDREQ<21>
PDIOW#<21>
PDIOR#<21>
PIORDY<21>
PDDACK#<21>
IRQ14<21>
PDA1<21>
PDA0<21>
PDCS1#<21>
PDA2<21>
PDCS3#<21>

D D

+3V

1

1 2

1 2

B: NOT INSTALL

PDD[0..15]
PDDREQ

PDIOW#
PDIOR#
PIORDY
PDDACK#
IRQ14
PDA1
PDA0
PDCS1#
PDA2
PDCS3#

R513 4.7K_4

12

R541

180K_4

R249

*33_4

C450
*18P_4

PIORDY

R572
3K

2

2

12

C795
.1U_4

RTC_RST#

12

G2
*SHORT_ PAD1

5VPCU

R569
47K

R567
150K

12

12

R546 1M

NMI<3>
A20M#<3>

FERR#<3>

IGNNE#<3>
INTR<3>

CPUINIT#<3>

RCIN#<29>

GATEA20<29>

AD[0..31]<22,23,25>

PME#<22,23,25>

+3V

CD_BITCLKA

*22P_4

3

CLK_32KX1

CLK_32KX2

R234 0_4

R501 10K_4

R226

*47_4

1 2

C409

1 2

3

C803 15P_4

Y7

32.768KHZ

C804 15P_4

VCCRTC

PME# INTERNAL 20K PULLUP

PCIRST#<22,23,24,25>
PLTRST#<6,11,15,21,29,31,32,33>

CLKRUN#<22,23,25,29,31>

R539
10M_4

1 2

RTC_RST#
SM_INTRUDER#

INTVRMEN

R474 56_4

RCIN#
GATEA20

12

R_FERR#

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

12

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

PDCS1#
PDCS3#
PDA0
PDA1
PDA2
PDIOR#

PDIOW#

PIORDY
IRQ14
PDDREQ

PDDACK#

AA2
AA3

AA5

AF25
AF23

AF24
AG26
AG24

AF27
AD23

AF22

AF19

AD14

AF15

AF14
AD12
AE14
AC11
AD11
AB11
AE13

AF13
AB12
AB13
AC13
AE15
AG15
AD13

AD16
AE17
AC16
AB17
AC17
AE16
AC14

AF16
AB16
AB14
AB15

Y1
Y2

E2
E5

C2

F5
F3
E9
F2

D6

E6

D3

A2
D2
D5
H3

B4

J5
K2
K5

D4

L6

G3
H4
H2
H5

B3

M6

B2
K6
K3
A5
L1
K4

P6

G6
R2
R5

4

U38A

RTCX1
RTCX2

RTCRST#
INTRUDER#

INTVRMEN

NMI
A20M#
FERR#
IGNNE#
INTR
INIT#
RCIN#
A20GATE

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

PME#
PCICLK
PCIRST#
PLTRST#
CLKRUN#/GPIO32

DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15

DCS1#
DCS3#
DA0
DA1
DA2
DIOR#
DIOW#
IORDY
IDEIRQ
DDREQ
DDACK#

ICH6-M

4

RTC

CPU

PCI

IDE

5

LAD0
LAD1/FB1
LAD2/FB2
LAD3/FB3

LDRQ0#

LDRQ1#/GPI41

LFRAME#

LPC

CPUPWRGD/GPO49

INIT3_3V#

THRMTRIP#

SMI#
STPCLK#
CPUSLP#

DPSLP#/TP[2]

DPRSLP#/TP[4]

C/BE0#
C/BE1#
C/BE2#
C/BE3#

FRAME#

IRDY#

TRDY#

DEVSEL#

STOP#

PAR
SERR#
PERR#

PLOCK#

REQ0#
REQ1#
REQ2#
REQ3#

REQ4#/GPI40

REQ5#/GPI1
REQ6#/GPI0

GNT0#
GNT1#
GNT2#

GNT3#
GNT4#/GPO48
GNT5#/GPO17
GNT6#/GPO16

PIRQA#
PIRQB#
PIRQC#

PIRQD#
PIRQE#/GPI2
PIRQF#/GPI3

PIRQG#/GPI4
PIRQH#/GPI5

SATALED#

SATA0_RXN
SATA0_RXP

SATA0_TXN
SATA0_TXP

SATA2_RXN
SATA2_RXP

SATA2_TXN
SATA2_TXP

SATA_CLKN
SATA_CLKP

SATA

SATARBIAS#

SATARBIAS

ACZ_BIT_CLK

ACZ_SYNC

ACZ_RST#

ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2

ACZ_SDO

AC-97/

AZALIA

5

6

P2
N3
N5
N4

LPC_DRQ0#

N6

LPC_DRQ1#

P4

1 2

P3

R608 10_4

B: SUPRESS AUDIO NOISE

AG25
AE22
AE23
AG27
AE26
AE27
AD27
AE24

J6
H6
G4
G2

J3
A3
J2
C3
J1
E1
G5
E3
C5

L5
B5
M5
B8
F7
E8
B7

C1
B6
F1
C8
E7
F6
D8

N2
L2
M1
L3
D9
C7
C6
M3

AC19
AE3

AD3
AG2
AF2

AD7
AC7
AF6
AG6

AC2
AC1

AG11
AF11

C10
B9
A10

F11
F10
B10
C9

T84

THERMTRIP#_ICH

R_CPUSLP#

1 2

Depop for Dothan. Populate for Yonah

R4690_4

PLOCK#
REQ0#

REQ1#
REQ2#
REQ3#
REQ4#
RBAYID1
RBAYID0

GNT0#
GNT1#
GNT2#

T192
T98
T100

LUSB1# LUSB1#
MB_ID0
MB_ID1
MB_ID2

SATA_RXN0_C
SATA_RXP0_C
SATA_TXN0_C
SATA_TXP0_C

T194
T195

SATARBIAS

CD_BITCLKA <27>
CD_RESET# <27>
CD_SDIN0 <27>

R231 39_4

LAD0/FWH0 <29,31>
LAD1/FWH1 <29,31>
LAD2/FWH2 <29,31>
LAD3/FWH3 <29,31>

LPC_DRQ0# <31>
LFRAME#/FWH4 <29,31>

CPUPWRGD <3>

R483 56_4

SMI# <3>
STPCLK# <3>

DPSLP# <3>

CBE0# <22,23,25>
CBE1# <22,23,25>
CBE2# <22,23,25>
CBE3# <22,23,25>

FRAME# <22,23,25>
IRDY# <22,23,25>
TRDY# <22,23,25>
DEVSEL# <22,23,25>
STOP# <22,23,25>
PAR <22,23,25>
SERR# <22,23,25>
PERR# <22,23,25>
PLOCK# <23>

REQ0# <25>
REQ1# <23>
REQ2# <22>

RBAYID1 <21>
RBAYID0 <21>

GNT0# <25>
GNT1# <23>
GNT2# <22>

PIRQA# <23,25>
PIRQB# <22>
PIRQC# <23>
PIRQD# <22,23>
LUSB1# <33>
MB_ID0 <19>
MB_ID1 <19>
MB_ID2 <19>

CLK_PCIE_SATA# <2>
CLK_PCIE_SATA <2>

R516 24.9/F_4

R229 39_4

T96
T190

12

C419

6

+VCCP

1 2

DPRSLP# <3>

B: POP R469

REQ1 : 1394/CARDBUS

REQ2 : MINI PCI

E: LUSB1/2 NEW ADD FOR EZ4
LEGACY USB

Place within 500mils
of ICH6 ball

C414

*10P_4

CD_SDOUTA <27>

*10P_4

7

PCI Pullups

REQ1#
RBAYID0
RBAYID1
REQ3#

+3V

PERR#
SERR#
FRAME#

R484

REQ0#

75/F_4

+3V

THERMTRIP# <3,6>

R467*0_4

CPUSLP# <3,5>

INSTALL FOR DOTHAN-A AND NOT INSTALL FOR DOTHAN-B

SERIRQ<19,22,23,29,31>

LUSB2#<19,33>

RBAYON# <21>

-HDD0_LED <30>

SATA_RXN0_C

SATA_RXP0_C

SATA_TXN0_C

SATA_TXP0_C

RP22

6
7
8
9

10

10P8R-8.2K

RP23

6
7
8
9

10

10P8R-8.2K

B: DEPOP R467

LPC_DRQ1#
PIRQA#
PIRQC#
PIRQB#

GATEA20
SERIRQ

IRQ14

FERR#

DPRSLP#

Depop for Dothan. Populate for Yonah

RCIN#

R475 10K_4

R645 10K_4

12

Distance between the ICH-6 M and
cap on the "P" signal should be
identical distance between the
ICH-6 M and cap on the "N" signal
for same pair.

C774 SA@3900PF_4

1 2

C777 SA@3900PF_4

1 2

C779 SA@3900PF_4

1 2

C781 SA@3900PF_4

1 2

1 2

R473 56_4

1 2

R471 *56_4

5
4
3
2
1

5
4
3
2
1

8P4R-10K

8P4R-10K

1 2
3 4
5 6
7 8

RP21

+3V

REQ4#
IRDY#
DEVSEL#
PLOCK#

+3V

PIRQD#
REQ2#
TRDY#
STOP#

RP24

12

8

78
56
34
12

+3V

+3V

+VCCP

+VCCP

SATA_RXN0 <21>

SATA_RXP0 <21>

SATA_TXN0 <21>

SATA_TXP0 <21>

B: NOT STUFF WHEN NO SATA

CD_SYNC <27>

1 2

QUANTA

Title

Size Document Number Rev

Date: Sheet

COMPUTER

ICH6-M (CPU,PCI,IDE,SATA,AC97)

ZL2 F

of

7

18 41Tuesday, December 21, 2004

8

+3V

1

2

3

4

5

6

7

8

A A

B B

C C

+3V_S5

R550
10K_4

R544
*10K_4

D D

CLK48_USB

12

R472
10_4

C719

12

10P_4

+3V_S5

SMLINK0
SMLINK1

BATLOW#
RING#
SCI#

B: BOM CHANGE

PCLK_SMB
SMB_LINK_ALERT#
LID591#
PDAT_SMB

THRM#

+3V_S5

+3V_S5

+3V

R248 10K_4
R232 10K_4

RP25

7 8
5 6
3 4
1 2

8P4R-10K

RP26

7 8
5 6
3 4
1 2

8P4R-10K

R496 8.2K_4

PWRBTN# HAS INTERNAL PULLUP

ICH_PWROK
RSMRST#

14M_ICH<2>

E: C428 CHANGE TO 6P

MB_ID0 <18>
MB_ID1 <18>
MB_ID2 <18>

R262 10K_4

R545 10K_4

+3V

R246
10K_4

R247
*10K_4

R538 10K_4
R250 10K_4

KBSMI#

PR_STS

R244
10K_4

MB_ID0
MB_ID1

MB_ID2

R245
*10K_4

BT

CLK_PCIE_ICH#<2>
CLK_PCIE_ICH<2>

PCIE_RXN0<32>

PCIE_RXP0<32>

PCIE_TXN0<32>

PCIE_TXP0<32>
PCIE_RXN1<33>

PCIE_RXP1<33>

PCIE_TXN1<33>

PCIE_TXP1<33>

USBP0+<22>

USBP0-<22>

T90
T87

T91
T88

T93
T92

CLK48_USB<2>

DMI_RXN0<6>
DMI_RXP0<6>

DMI_TXN0<6>
DMI_TXP0<6>

DMI_RXN1<6>
DMI_RXP1<6>

DMI_TXN1<6>
DMI_TXP1<6>

1 2

C721 N@.1U_4

1 2

C711 D@.1U_4

PCLK_SMB<2,25,32,33>
PDAT_SMB<2,25,32,33>

LID591#<16,29>

B: REMOVE RING FUNCTION

ICH_PWROK<29>

DPRSLPVR<34>

DNBSWON#<29>

RSMRST#<29>

IMVP_PWRGD<6,34>

PM_BMBUSY#<6>

SUSCLK<32>

PCSPK<27>

R243
33_4

C428
6P_4

+3V

12

R227
10K_4

R635
*10K_4

LUSB2#<18,33>

KBSMI#<29>

PR_STS<29,33>

1 2

1 2

SCI#<29>

EMAIL_LED#<30>

RST_HDD#<21>

RST_RBAY#<21>

T201

B: CHANGE EMAIL_LED# FROM
GPIO24

T103
T101
T197
T198
T97

MB_ID3

CLK48_USB

1 2

C720 N@.1U_4

1 2

C710 D@.1U_4

LID591#

RING#
THRM#
ICH_PWROK
DPRSLPVR
BATLOW#

RSMRST#
IMVP_PWRGD

KBSMI#
PR_STS
SCI#

OC0#

OC2#

OC4#

HSON0
HSOP0

HSON1
HSOP1

D: ADD ONE MB_ID E: ADD PULLLOW

1

2

3

U38B

D21

USBP0P

C21

USBP0N

C27

OC0#

C19

USBP2P

D19

USBP2N

B26

OC2#

D17

USBP4P

E17

USBP4N

C23

OC4#/GPI9

D15

USBP6P

C15

USBP6N

C25

OC6#/GPI14

A27

CLK48

T25

DMI0_RXN

T24

DMI0_RXP

R27

DMI0_TXN

R26

DMI0_TXP

V25

DMI1_RXN

V24

DMI1_RXP

U27

DMI1_TXN

U26

DMI1_TXP

AD25

DMI_CLKN

AC25

DMI_CLKP

H25

HSIN0

H24

HSIP0

G27

HSON0

G26

HSOP0

K25

HSIN1

K24

HSIP1

J27

HSON1

J26

HSOP1

Y4

SMBCLK

W5

SMBDATA

W6

SMBALERT#/GPI11

T2

RI#

AC20

THRM#

AA1

PWROK

AE20

DPRSLPVR/TP1

V2

BATLOW#/TP0

U1

PWRBTN#

Y3

RSMRST#

AF21

VRMPWRGD

AD19

BM_BUSY#/GPIO6

W3

SUS_STAT#/LPCPD#

V6

SUSCLK

E10

CLK14

F8

SPKR

AE19

GPI7

R1

GPI8

M2

GPI12

R6

GPI13

AB21

GPO19

AD20

GPO21

AD21

GPO23

V3

GPIO24

D12

EE_CS

B12

EE_SHCLK

D11

EE_DOUT

F13

EE_DIN

AC5

RSVD1

AD5

RSVD2

AF4

RSVD3

AG4

RSVD4

AC9

RSVD5

ICH6-M

USB

DMI

PCI-EXPRESS

SM&SMI

PM

STP_PCI#/GPO18

STP_CPU#/GPO20

SATA0GP/GPIO26

MISC&GPIO

SATA1GP/GPIO29
SATA2GP/GPIO30
SATA3GP/GPIO31

LAN

LAN_RSTSYNC

RESERVED

DPRSLPVR

R640
100K_4

4

USBP1P
USBP1N

OC1#
USBP3P
USBP3N

OC3#
USBP5P
USBP5N

OC5#/GPI10

USBP7P
USBP7N

OC7#/GPI15

USBRBIAS

USBRBIAS#

DMI2_RXN

DMI2_RXP
DMI2_TXN
DMI2_TXP

DMI3_RXN

DMI3_RXP
DMI3_TXN
DMI3_TXP

DMI_ZCOMP

DMI_IRCOMP

HSIN2

HSIP2
HSON2
HSOP2

HSIN3

HSIP3
HSON3
HSOP3

SMLINK0
SMLINK1

LINKALERET#

SLP_S3#
SLP_S4#
SLP_S5#

LAN_RST#

SYS_RESET#

WAKE#

MCH_SYNC#

SERIRQ

GPIO25
GPIO27

GPIO28

GPIO33
GPIO34

LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2

LAN_CLK

RSVD6
RSVD7
RSVD8
RSVD9

B20
A20
B27
B18
A18
C26
A16
B16
D23
B14
A14
C24
B22
A22

Y25
Y24
W27
W26

AB24
AB23
AA27
AA26

F24
F23

M25
M24
L27
L26

P24
P23
N27
N26

W4
U6
Y5

T4
T5
T6
V5
U2
U5
AG21

AC21
AD22
AB20

P5
AF17
R3
T3
AE18
AF18
AG18

MPCIACT#

AF20
AC18

E12
E11
C13
C12
C11
E13

F12
B11

AD9
AF8
AG8
U3

RSVD9=TP3

5

OC1#

OC3#

OC5#

OC7#OC6#

HSON2
HSOP2

T83
T85
T81
T82

SMLINK0
SMLINK1
SMB_LINK_ALERT#

RSMRST#
PCIE_WAKE#

MCH_SYNC#

MB_ID3

USBP1+ <32>
USBP1- <32>

USBP3+ <22>
USBP3- <22>
OC3# <22>
USBP5+ <22>
USBP5- <22>
OC5# <22>
USBP7+ <22>
USBP7- <22>
OC7# <22>

USBRBIAS

DMI_RXN2 <6>

DMI_RXP2 <6>

DMI_TXN2 <6>

DMI_TXP2 <6>
DMI_RXN3 <6>

DMI_RXP3 <6>

DMI_TXN3 <6>

DMI_TXP3 <6>

DMICOMP

12

C712
D@.1U_4

12

C713
D@.1U_4

B: BOM CHANGE

SUSB# <29>
SUSC# <29>

T99

DBR# <3>

STP_PCI# <2>
STP_CPU# <2,34>LPC_PD#<23,31>
SERIRQ <18,22,23,29,31>

T102
T200

T105

T189

T95
T193
T191
T104

NEWCARD

M/B USB

+3V_S5

M/B USB

M/B USB

Place within 500mils of ICH-6

R485 22.6/F_4

12

R213 24.9/F_4

12

PCIE_RXN2 <33>

PCIE_RXP2 <33>

PCIE_TXN2 <33>

6

Place within 500mils of ICH-6

+1.5V

PCIE_TXP2 <33>

R503

33_4

1 2

Title

Size Document Number Rev

Date: Sheet

OC4#
OC0#

OC6#

MCH_SYNC#

PCIE_WAKE#

needs to be pulled down if
programmed as SATA

ICH6-M (USB,DMI,LPC)

ZL2 F

RP14

6
7
8
9

10

10P8R-10K

R494 10K_4

R233 1K_4

QUANTA
COMPUTER

7

OC1#
OC2#

+3V_S5

of

8

5
4
3
2
1

+3V

+3V_S5

19 41Wednesday, December 22, 2004

1

L52

1 2

+1.5V

+5V

A A

+3V

+5VSUS

+3V_S5

B B

+1.5V

C715

10U_6.3V

C C

+3V_S5

+3V_S5

R514 10

2 1

RB751V

2 1

CH551

2 1

RB751V

1 2

1 2

+3V

C362

.1U_4

1 2

39mA

BLM41P600SPG

D27

C759

1U/10V

CC0603

D25

D26

C733

1U/10V

CC0603

R466

1/F_4

+1.5V

C792

.1U_4

1 2

C391

.1U_4

1 2

VDMIPLL

23mA

+3V_S5

D D

C393

.1U_4

1 2

1

578mA

+1_5V_PCIE

+

C379

220U/2.5V

12

C382
.1U_4

1 2

E: CHANGED FROM RB751V

V5REF_SUS

12

C734

.1U_4

1 2

L72

1UH

+3V

C766

.1U_4

1 2

C387

.1U_4

1 2

C740

.1U_4

1 2

C453

.1U_4

1 2

2

C364

.1U_4

1 2

C420

.1U_4

1 2

VCCDMIPLL

1 2

1 2

C374

.1U_4

C413

.1U_4

AA22
AA23
AA24
AA25
AB25
AB26
AB27

G22
G23
G24
G25
H21
H22

K21
K22

M21
M22
N21
N22
N23
N24
N25
P21
P25
P26
P27
R21
R22

U21
U22
V21

V22
W21
W22

Y21

Y22

AA6

AB4

AB5

AB6

AC4

AD4

AE4

AE5

AF5

AG5

AA7

AA8

AA9

AB8

AC8

AD8

AE8

AE9

AF9

AG9

AC27

E26

AE1

AG10

A13

G13

G14

A11

A17

B17

C17

G17

G18

F25
F26
F27

J21
J22

L21
L22

T21
T22

F14

U4
V1
V7

W2

Y7

F18

C375

.1U_4

1 2

V5REF

1mA

10mA

+1.5V +1.5V_S5

+1.5V

12

C714

.01U/16V_4

1 2

2

3

U38C

VCC1_5_1
VCC1_5_2
VCC1_5_3
VCC1_5_4
VCC1_5_5
VCC1_5_6
VCC1_5_7
VCC1_5_8
VCC1_5_9
VCC1_5_10
VCC1_5_11
VCC1_5_12
VCC1_5_13
VCC1_5_14
VCC1_5_15
VCC1_5_16
VCC1_5_17
VCC1_5_18
VCC1_5_19
VCC1_5_20
VCC1_5_21
VCC1_5_22
VCC1_5_23
VCC1_5_24
VCC1_5_25
VCC1_5_26
VCC1_5_27
VCC1_5_28
VCC1_5_29
VCC1_5_30
VCC1_5_31
VCC1_5_32
VCC1_5_33
VCC1_5_34
VCC1_5_35
VCC1_5_36
VCC1_5_37
VCC1_5_38
VCC1_5_39
VCC1_5_40
VCC1_5_41
VCC1_5_42
VCC1_5_43
VCC1_5_44
VCC1_5_45

VCC1_5_46
VCC1_5_47
VCC1_5_48
VCC1_5_49
VCC1_5_50
VCC1_5_51
VCC1_5_52
VCC1_5_53
VCC1_5_54
VCC1_5_55

VCC1_5_56
VCC1_5_57
VCC1_5_58
VCC1_5_59
VCC1_5_60
VCC1_5_61
VCC1_5_62
VCC1_5_63
VCC1_5_64
VCC1_5_65

VCCDMIPLL
VCC3_3_1

VCCSATAPLL
VCC3_3_22

VCCLAN3_3/VCCSUS3_3_1
VCCLAN3_3/VCCSUS3_3_2
VCCLAN3_3/VCCSUS3_3_3
VCCLAN3_3/VCCSUS3_3_4

VCCSUS3_3_1
VCCSUS3_3_2
VCCSUS3_3_3
VCCSUS3_3_4
VCCSUS3_3_5
VCCSUS3_3_6

VCCSUS3_3_7
VCCSUS3_3_8
VCCSUS3_3_9
VCCSUS3_3_10
VCCSUS3_3_11
VCCSUS3_3_12

ICH6-M

PCIESATA

3

VCC1_5_79
VCC1_5_80
VCC1_5_81
VCC1_5_82
VCC1_5_83
VCC1_5_84
VCC1_5_85
VCC1_5_86
VCC1_5_87
VCC1_5_88
VCC1_5_89
VCC1_5_90
VCC1_5_91

COREIDEPCI

VCC1_5_92
VCC1_5_93
VCC1_5_94
VCC1_5_95
VCC1_5_96
VCC1_5_97
VCC1_5_98

VCC3_3_2
VCC3_3_3
VCC3_3_4
VCC3_3_5
VCC3_3_6
VCC3_3_7
VCC3_3_8

VCC3_3_9
VCC3_3_10
VCC3_3_11

VCC3_3_12
VCC3_3_13
VCC3_3_14
VCC3_3_15
VCC3_3_16
VCC3_3_17
VCC3_3_18
VCC3_3_19
VCC3_3_20
VCC3_3_21

USB

VCCSUS1_5_1
VCCSUS1_5_2

VCCSUS1_5_3

VCC1_5_67
VCC1_5_68

VCC1_5_69
VCC1_5_70
VCC1_5_71
VCC1_5_72
VCC1_5_73
VCC1_5_74
VCC1_5_75
VCC1_5_76
VCC1_5_77

USB CORE

VCC1_5_78

VCC2_5_2

VCC2_5_4

REF

PCE/IDE

V5REF1

V5REF2
V5REF_SUS
VCCUSBPLL

VCCSUS3_3_20

VCCRTC

VCCLAN1_5/VCCSUS1_5_1
VCCLAN1_5/VCCSUS1_5_2

V_CPU_IO1
V_CPU_IO2
V_CPU_IO3

VCCSUS3_3_13
VCCSUS3_3_14
VCCSUS3_3_15
VCCSUS3_3_16
VCCSUS3_3_17
VCCSUS3_3_18
VCCSUS3_3_19

4

AA19
AA20
AA21
L11
L12
L14
L16
L17
M11
M17
P11
P17
T11
T17
U11
U12
U14
U16
U17
F9

A6
B1
E4
H1
H7
J7
L4
L7
M7
P1

AA12
AA14
AA15
AA17
AC15
AD17
AG13
AG16
AG19
AA10

G19
R7

U7
G8
D24

D25
D26
D27
E20
E21
E22
E23
E24
F20
G20

P7
AB18

A8
AA18

F21
A25

A24
AB3

G10
G11

AB22
AD26
AG23

C16
D16
E16
F15
F16
G15
G16

4

V5REF

V5REF_SUS

.1U_4

1 2

C423

1 2

.1U_4

C422

.1U_4

1 2

C469

.1U_4

1 2

+1.5V

VCCRTC

C418

C376

1 2

.1U_4

+3_3V_PCI

C455

.1U_4

1 2

+3_3V_ICH

C761

.1U_4

1 2

5uA

+1.5V_S5

6mA

C363

.1U_4

C771

1 2

C392

.1U_4

1 2

C381

.1U_4

1 2

C421

.1U_4

1 2

C390

.1U_4

1 2

C380

.1U_4

1 2

C367

.1U_4

1 2

1 2

.1U_4

5

C389

1 2

+3V

204mA

+3V

C430

.1U_4

1 2

C768

.1U_4

1 2

+3V_S5

5

.1U_4

C386

1 2

+VCCP

.01U/16V_4

+1.5V_S5

170mA

C365

.01U/16V_4

1 2

14mA

1U/10V

+1.5V

+2.5V

+1.5V

+1.5V

VCCRTC

C470

1 2

25mA

1.77A

C473

1 2

.1U_4

6

C451

1 2

.1U_4

A12
A15
A19
A21
A23
A26

AA11
AA13
AA16

AA4

AB1
AB10
AB19

AB2

AB7

AB9

AC10
AC12
AC22
AC23
AC24
AC26

AC3
AC6

AD1
AD10
AD15
AD18

AD2
AD24

AD6

AE10
AE11
AE12

AE2
AE21
AE25

AE6

AE7

AF1
AF10
AF12
AF26

AF3

AF7

AG1
AG12
AG14
AG17
AG20
AG22

AG3

AG7

B13
B15
B19
B21
B23
B24
B25
C14
C18
C20
C22

D10
D13
D14
D18
D20
D22

E14
E15
E18
E19
E25

7

U38D

A1

VSS001
VSS002
VSS003
VSS004
VSS005
VSS006
VSS007

A4

VSS008

A7

VSS009

A9

VSS010
VSS011
VSS012
VSS013
VSS014
VSS015
VSS016
VSS017
VSS018
VSS019
VSS020
VSS021
VSS022
VSS023
VSS024
VSS025
VSS026
VSS027
VSS028
VSS029
VSS030
VSS031
VSS032
VSS033
VSS034
VSS035
VSS036
VSS037
VSS038
VSS039
VSS040
VSS041
VSS042
VSS043
VSS044
VSS045
VSS046
VSS047
VSS048
VSS049
VSS050
VSS051
VSS052
VSS053
VSS054
VSS055
VSS056
VSS057
VSS058
VSS059
VSS060
VSS061
VSS062
VSS063
VSS064
VSS065
VSS066
VSS067
VSS068

C4

VSS069

D1

VSS070
VSS071
VSS072
VSS073
VSS074
VSS075
VSS076

D7

VSS077
VSS078
VSS079
VSS080
VSS081
VSS082

F17

VSS083

F19

VSS084

F22

VSS085

F4

VSS086

ICH6-M

GND

VSS087
VSS088
VSS089
VSS090
VSS091
VSS092
VSS093
VSS094
VSS095
VSS096
VSS097
VSS098
VSS099
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172

8

G1
G12
G21
G7
G9
H23
H26
H27
J23
J24
J25
J4
K1
K23
K26
K27
K7
L13
L15
L23
L24
L25
M12
M13
M14
M15
M16
M23
M26
M27
M4
N1
N11
N12
N13
N14
N15
N16
N17
N7
P12
P13
P14
P15
P16
P22
R11
R12
R13
R14
R15
R16
R17
R23
R24
R25
R4
T1
T12
T13
T14
T15
T16
T23
T26
T27
T7
U13
U15
U23
U24
U25
V23
V26
V27
V4
W1
W23
W24
W25
W7
Y23
Y26
Y27
Y6
E27

QUANTA

Title

Size Document Number Rev

6

Date: Sheet

COMPUTER

ICH6-M (POWER&GND)

ZL2 F

of

7

20 41Tuesday, December 21, 2004

8

1

PDD[0..15]<18>

A A

PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7

C510
.1U_4

CN30HDD_CON

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

C501
1000P_4

-IDERST
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0

PDDREQ<18>

PDIOW#<18>

PDIOR#<18>

PIORDY<18>

PDDACK#<18>

IRQ14<18>

PDA1<18>

IDELED#<30>

R580 0_4

PDA0<18>

PIORDY
IRQ14

HDLED#

PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

PSEL

-PDIAG

2

R563 470_4

R571 10K_4

C508
.1U_4

PDA2 <18>
PDCS3# <18>PDCS1#<18>

HDD_VDDHDD_VDD

C872
150U/6.3V_7

HDD_VDD

C509
.1U_4

+5V

CSEL:
0 DRIVE0
1 DRIVE1

C503
.1U_4

CN31

GND23

GND1

RXP
RXN

GND2

TXN
TXP

GND3

3.3V

3.3V

3.3V
GND
GND
GND

5V
5V
5V

GND

RSVD

GND

12V
12V
12V

GND24

SA@Serial_ATA

3

23
1

2
3
4
5
6
7

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

24

SATA_TXP0 <18>
SATA_TXN0 <18>

SATA_RXN0 <18>
SATA_RXP0 <18>

+3.3VSATA

R273

HDD_VDD

R286

+3.3VSATA +3.3VSATA +3.3VSATA

SA@0_8

0_8

+3V

+5V

C495
SA@4.7U/10V_8

C497
SA@4.7U/10V_8

C475
SA@.1U_4

1442

43

4

1442

RST

GND

20

GND

X

43

B B

+5V

U27

2
3
4
5
6
1

7
8

9
10
11
13

14
15
16
17
18
35

19
20
21
22
23
47

SW@PI5C16861

U3

2

3

4

5

6

7

8

9
10
11

1
13

SW@TI6800

RBAYVCC

VCC_136VCC_2
A0

A1
A2
A3
A4
NC_1

A5
A6
A7
A8
A9
NC_2

A10
A11
A12
A13
A14
BE2

A15
A16
A17
A18
A19
BE1

GND_112GND_2

A0
A1
A2
A3
A4

A5
A6
A7
A8
A9

/ON
/VBIAS

+5V +5V

PDD0
PDD1
PDD2
PDD3
PDD4

PDD5
PDD6
PDD7
PDD8
PDD9

PDD10
PDD11
PDD12
PDD13
PDD14
LBAYON_HDD#

PDD15
PDCS1#
PDCS3#

C C

D D

PDA0
PDA1
LBAYON_HDD#

+5V

PDA2
PDIOR#
PDIOW#
PIORDY
IRQ14

R39

PDDREQ
PDDACK#

-IDERST
IDELED#

-PDIAG -LPDIAG

SW@10K_4

LBAYON_HDD#

-LVBIAS

R37
SW@22K

B10
B11
B12
B13
B14

B15
B16
B17
B18
B19

VCC

B0
B1
B2
B3
B4

B5
B6
B7
B8
B9

GND

R35

SW@10K_4

2

48
46

B0

45

B1

44

B2

43

B3

42

B4

41

B5

40

B6

39

B7

38

B8

37

B9

34
33
32
31
30

29
28
27
26
25

24

24
23

22
21
20
19

18
17
16
15
14

12

RST_RBAY#<19>

LBAYON_HDD#

Q12
SW@PDTC143TT

1 3

1

LPDD0
LPDD1
LPDD2
LPDD3
LPDD4

LPDD5
LPDD6
LPDD7
LPDD8
LPDD9

LPDD10
LPDD11
LPDD12
LPDD13
LPDD14

LPDD15
LPDCS1#
LPDCS3#
LPDA0
LPDA1

LPDA2
LPDIOR#
LPDIOW#
LPIORDY
LIRQ14

LPDDREQ
LPDDACK#

LIDE_LED_1#

+5V

C582

10K_4

SW@.1U_4

-RBAYINS<29>

+5V

+5V

C46
SW@.1U_4

LBAYRST#

12

R40 *33_4

R42 SW@0_4

E: DEPOP R40 AND POP
R42 FOR SWAP BAY

LBAYRST#
LPDD7
LPDD6 LPDD9

R70

RBAYVCC

LPDD5
LPDD4

LPDD3
LPDD2
LPDD1
LPDD0
LPDIOW#
LPIORDY

LIRQ14 LPDDACK#
LPDA1
LPDA0
LPDCS1# RBAYID0
LIDE_LED_1#

-RBAYINS

-IDERST
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0

PDIOW#
PIORDY
IRQ14
PDA1
PDA0
PDCS1#
IDELED#

RCSEL

B: REMOVE PULLDOWN R50 D: C82 CHANGED FROM .1U/12V

CN21

1

1

2

3

3

4

5

5

6

7

7

8

9

9

10

11

11

12

13

13

14

15

15

16

17

17

18

19

19

20

21

21

22

23

23

24

25

25

26

27

27

28

29

29

30

31

31

32

33

33

34

35

35

36

37

37

38

39

39

40

41

41

42

43

43

44

45

45

46

47

47

48

49

49

50

515253

54

SW@BAY CO N _50P

ODD Connector

CN18

1
3
5
7
9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

515152

52

F@ODD_CONN

Media Bay Connector

S : DFHS60FR311
F : DFHS50FR156

2
4

LPDD8

6
8

LPDD10

10

LPDD11

12
14

LPDD12

16

LPDD13

18

LPDD14

20

LPDD15

22

LPDDREQ

24

LPDIOR#

26
28
30

LPDA2

32

LPDCS3#

34
36

RBAYID1

38

RCSEL

40
42
44
46
48
50

2
4
6
8

2

RBAYVCC

-LPDIAG

NC FOR SLAVE

F: CHANGE TO -LPDIAG

PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDDREQ
PDIOR#

PDDACK#

-PDIAG
PDA2
PDCS3#

R68
*470_4

RBAYVCC

RBAYON#<18>

+12V

R73
F@0_4

R55

SW@10K_4

2

B: CHANGE FROM PDTC143TT

RST_HDD#<19>

PLTRST#<6,11,15,18,29,31,32,33>

RBA YID0 <18>
RBA YID1 <18>

RBAYVCC

C65
1000P_4

+5V

C67
.1U_4

+5V

8
7

5

Z1422

3

Q15

SW@2N7002

1

R511 0_4

R222 *0_4

C66
.1U_4

C69
.1U_4

R48 F@0_8
R46 F@0_8

Q14
SW@AO4414

4

C82
SW@.1U/25V_8

BAY ID STATUS

+3V +5V+3V

2

1 3

Q23

DTC144EU

C104

C134

.1U_4

.1U_4

C76

C74

.1U_4

.1U_4

RBAYVCC

1
2
36

3

C68
1000P_4

C64
150U/6.3V_7

C73
.1U_4

R230
10K_4

-IDERST

R650 SW@22-0805

C77

C75

.1U_4

.1U_4

SW@2N7002

Size Document Number Re v

Date: Sheet

RBAYID0/
LBAYID0

F:ADD DISCHARGE CIRCUIT

3

Q59

1

HDD & CDROM & MEDIA BAY

0
0
1

2

RBAYON#

RBAYID1/
LBAYID1

0
1
0

STATUS

FDD
HDD

CD/DVD

PROJECT : ZL2

Quanta Computer Inc.

4

21 41Wednesday, December 22, 2004

F

of

1

ID Select : AD20
Interrupt Pin : I N T B# , INTC#
Request Indicate : REQ1#
Grant Indicate : GNT1#

2

3

4

MINI-PCI

+5VSUS

C338
.1U_4

+5VSUS

5

U15

5
4

2

AAT4610AIGV-T1

1

IN

OUT

ON#
GND

SET

R175 6.34K/F

3

6

USBPWR3

R180 470K_4
R181 560K

OC3# <19>

7

8

+5VSUS

+5VSUS

A A

WIRELESS_LED<30>

RF_EN<29>
PIRQD#<18, 23>

PCLK_MINI<2>

REQ2#<18>

AD31<18,23,25>
AD29<18,23,25>

AD27<18,23,25>
AD25<18,23,25>

CBE3#<18,23,25>

AD23<18,23,25>
AD21<18,23,25>

AD19<18,23,25>

AD17<18,23,25>
CBE2#<18,23,25>
IRDY#<18,23,25>

CLKRUN#<18,23,25,29,31>

SERR#<18,23,25>

C644
.1U_4

PERR#<18,23,25>
CBE1#<18,23,25>

AD14<18,23,25>

AD12<18,23,25>

AD10<18,23,25>

C615
.1U_4

AD8<18,23,25>
AD7<18,23,25>

AD5<18,23,25>
AD3<18,23,25>
AD1<18,23,25>

B B

C C

D21

21

BAS316

PCLK_MINI

+3V +5V

C639

C598

.1U_4

.1U_4

+5V

+5V

C144
.1U_4

PCLK_MINI

CN22

1

TIP

3

LAN1

5

LAN3

7

LAN5

9

LAN7

11

LED_GP

13

LED_GN

15

NC1

17

-INTB

19

+3V

21

R(IRQ3)

23

GND

25

PCICLK

27

GND

29

-REQ

31

+3V

33

AD31

35

AD29

37

GND

39

AD27

41

AD25

43

(V)

45

-CBE3

47

AD23

49

GND

51

AD21

53

AD19

55

GND

57

AD17

59

-CBE2

61

-IRDY

63

+3V

65

-CLKRUN

67

-SERR

69

GND

71

-PERR

73

-CBE1

75

AD14

77

GND

79

AD12

81

AD10

83

GND

85

AD8

87

AD7

89

+3V

91

AD5

93

(V)

95

AD3

97

+5V

99

AD1

101

GND

103

SYNC

105

SDIN0

107

BITCLK

109

-AC_PRIMARY

111

BEEP

113

AGND

115

+MIC

117

-MIC

119

AGND

121

-RI

123

+5VA

R408 *22_4

C655
.1U_4

GND

125

RING
LAN2
LAN4
LAN6
LAN8

LED_YP

LED_YN

NC2

+5V

-INTA
R(IRQ4)
+3VAUX

-RST
+3V

-GNT

GND

-PME

(V)

AD30

+3V

AD28
AD26
AD24

IDSEL

GND
AD22
AD20

PAR
AD18
AD16

GND

-FRAME

-TRDY

-STOP
+3V

-DEVSEL
GND

AD15
AD13
AD11

GND

AD9

-CBE0
+3V
AD6
AD4
AD2
AD0

(V)

SERIRQ

GND

M66EN

SDOUT

SDIN1

-RESET

-MPCICACK
AGND

+SPK

-SPK

AGND

NC4

+3VAUX

GND

QTC_MINIPCI_H7.95

126

C645 *10P_4

2

+3V+3V

4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

+5V

+3V_S5

PME#

R366 150_4

AD20

+3V_S5

PIRQB# <18>

PCIRST# <18, 23,24,25>
GNT2# <18>
PME# <18,23,25>
AD30 <18,23,25>
AD28 <18,23,25>

AD26 <18,23,25>
AD24 <18,23,25>

AD22 <18,23,25>
AD20 <18,23,25>
PAR <18,23,25>
AD18 <18,23,25>
AD16 <18,23,25>

FRAME# <18,23,25>
TRDY # <18,23,25>
STOP# <18,23,25>

DEVSEL# <18,23,25>
AD15 <18,23,25>

AD13 <18,23,25>
AD11 <18,23,25>

AD9 <18,23,25>
CBE0# <18,23,25>

AD6 <18,23,25>
AD4 <18,23,25>
AD2 <18,23,25>
AD0 <18,23,25>

SERIRQ <18,19,23,29,31>

AD19

C352
.1U_4

+5VSUS

+5VSUS

C871
.1U_4

USBPWR3

USBP3-<19>

USBP3+<19>

USBPWR5

USBP5-<19>

USBP5+<19>

USBPWR7

BK2125HS330

USBP7-<19>

USBP7+<19>

B: REMOVE CHOKE PADS

L45

BK2125HS330

R165 0
R163 0

L48

BK2125HS330

R185 0
R183 0

L80

R584 0
R583 0

U16

5

IN

4

ON#

2

GND

AAT4610AIGV-T1

U47

5

IN

4

ON#

2

GND

AAT4610AIGV-T1

USB3POWER

100U/6.3V-3528

USB5POWER

100U/6.3V-3528

USB7POWER

100U/6.3V-3528

1

OUT

R187 6.34K/F

3

SET

1

OUT

R582 6.34K/F

3

SET

F: CHANGE TO 100UF

+

C335

BUSBP3­BUSBP3+

C311
*22P_4

+

C353

BUSBP5­BUSBP5+

C347
*22P_4

+

C876

BUSBP7­BUSBP7+

C882
*22P_4

C324
*22P_4

C350
*22P_4

C883
*22P_4

USBPWR5

USBPWR7

SYUIN_USB

SYUIN_USB

SYUIN_USB

R189 470K_4
R191 560K

R590 470K_4
R588 560K

CN25

1

5

2

6

3

7

4

8

CN26

1

5

2

6

3

7

4

8

CN33

1

5

2

6

3

7

4

8

OC5# <19>

OC7# <19>

BOT

G
+

­P

G1414
+

­P

+3VSUS

Size Doc u m en t N u m be r Re v

Date: Sheet

7

C284
.01U/16V_4

CN6

1
2
3
4
5
6
7
8

PTWO_MINIUSB

BT_LED<30>

C282
*22P_4

BT_POWER

6

D D

1

2

3

4

USBP0+<19>

USBP0-<19>

R137 0
R138 0

5

BUSBP0+
BUSBP0-

C283
*22P_4

Q21
AO3403

L40

1

3

BK2125HS330

2

PROJECT : ZL2

Quanta Computer Inc.

MINI PCI,USB

BT_POWER

C269 10U/10V_8

BT_POWERON# <29>

22 41Tuesday, De ce m ber 21, 2004

8

F

of

5

+3V

U45-1

W3

VCCP

W10

W12

W13

W11

U2
V1
V2
U3

W2

V3
U4
V4
V5
U5
R6
P6

W6

V6
U6
R7
V9
U9
R9

N9
V10
U10
R10
N10
V11
U11
R11

V12
U12
N11

W4
W7
W9

P9

V7

R8

U7

W8

N8

W5

V8

U8

U1

T2

P5

R3

T1
T3

PCI7411GHK

VCCP
AD31

AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

C/BE3
C/BE2
C/BE1
C/BE0

PAR
FRAME

TRDY
IRDY
STOP
DEVSEL
IDSEL

PERR
SERR

REQ
GNT

PCLK
PRST
GRST

RI_OUT/PME

C791 *10P_4

SUSPEND

DATA
CLOCK
LATCH

SPKROUT

MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6

CLK_48

R2

N1
L6
N2

L7

N3
M5
P1
P2
P3
N5
R1

M1

D D

C C

AD[31..0]<18,22,25>

CBE3#<18,22,25>
CBE2#<18,22,25>
CBE1#<18,22,25>
CBE0#<18,22,25>

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

PAR<18,22,25>

FRAME#<18,22,25>

TRDY#<18,22,25>

IRDY#<18,22,25>

STOP#<18,22,25>

DEVSEL#<18,22,25>

PERR#<18,22,25>
SERR#<18,22,25>

REQ1#<18>
GNT1#<18>

PCLK_PCM<2>

PCIRST#<18,22,24,25>

PME#<18,22,25>

B B

AD17

R552 100/F_4

GRST#_7411

R534 0_4

PCLK_PCM

PCM_PME#

R536 *22_4

+3V

CLK48M

4

R527
10K_4

D28 *BAS316

2 1

TPS_DATA
TPS_CLOCK
TPS_LATCH

PCMSPK

TPS_DATA <24>
TPS_CLOCK <24>
TPS_LATCH <24>

PCMSPK <27>

PIRQC# <18>
PIRQD# <18,22>
PIRQA# <18,25>
SERIRQ < 1 8,19,22,29,31>
PLOCK# <18>

T202

CLKR U N # < 18,22,25,29,31>

48MHz Clock

Y5

3

OUT

VDD

2

OE

GND

TXC-48MHz-30PPM-15Pf

LPC_PD# <19,31>

+3V

4
1

B: REMOVE RING FUNCTION

C756
.01U/16V_4

3

PCMSPK

E: ADD PULL-LOW

GRST#_7411

R639
100K_4

+3V

R532
22K

C775
.1U/50V

U45-7

PHY_TEST_MA

PC0 (TEST1)
PC1 (TEST2)
PC2 (TEST3)

PCI7411GHK

TPBIAS0

2

AVDD
AVDD
AVDD
AVDD

VDPLL

TPBIAS0

TPA0+

TPA0-

TPB0+

TPB0-

CPS

CNA

VSPLL

AGND
AGND
AGND
AGND

TPBIAS1

TPA1+

TPA1-

TPB1+

TPB1-

R0

R1

XO

XI

R570

56.2/F_4

R13
R14
V17
V19
T18

U18

U19
U15

V15
W15

V14
W14

R17

M11
P15

R19

R18
R12

U13
V13

T17
N12
P14
U14
U16
U17

V18
W18

V16
W16

C848 .1U_4

R0

R1

PHY_TEST_MA

CPS
CNA

1394_XOUT

1394_XIN

C839

R568

1U/10V

56.2/F_4

+3V

1394_AVDD

R578

6.34K/F

TPBIAS0
TPA0P

TPA0N
TPB0P

TPB0N

R576

4.7K_4

R574 390K_4

C864 12P_4

Y8

24.576MHZ

1 2

C865 12P_4

C852 1U/10V

C837
270P_4

L77

BK2125HS330

1394_AVDD

12

T106

C853
1000P_4

1

C846
.01U/16V_4

L1394_TPB0­L1394_TPA0­L1394_TPA0+
L1394_TPB0+

C845
.1U_4

CN32

1
3
4
2

SUYIN_1394

C851
1U/10V

5
6

+3V

U45-4

H8

VCC

H9

VCC

H10

VCC

H11

VCC

H12

VCC

J8

VCC

M7

VCC

J12

VCC

M9

VCC

M10

VCC

M12

VCC

K8

VCC

K12

VCC

N7

VCC

G7

GND

G8

GND

G13

GND

H13

GND

J9

GND

J10

GND

J11

GND

K9

GND

K10

GND

K11

A A

L8

L9
L10
L11
L12
M8

GND
GND
GND
GND
GND
GND
GND

PCI7411GHK

1.5V

1.5V

VR_EN

M19
H1

H2

5

C: DEPOP

C776
1U/10V

C854
1U/10V

+3V

C784

C805

C806

1000P_4

.01U/16V_4

.1U_4

C815
1U/10V

U45-10

A_USB_EN

B_USB_EN

PCI7411GHK

+3V

C849

C800
1000P_4

C786
.01U/16V_4

.1U_4

C855
1U/10V

4

E2

E1

U45-5

M3

SCL

M2

SDA

PCI7411GHK

+3V

R528
*10K_4

R518

2.2K_4

SCL_CARD
SDA_CARD

R526
*220_4

R529
*10K_4

U45-6

W17

NC

T19

VCO_LF

+3V

R515

2.2K_4

PCI7411GHK

IF EEPROM NOT USE ,
CLK & DAT PULL DOWN

U41

8

VCC

7

NC

6

SCL

5

GND

SDA

AT24C08AN-10SI-2.7

R525

2ND SOURCE: AKE3L8S0A03

*220_4

3

R600 0_4
R593 0_4

TEST0

TPA0P

P12

TPA0N
TPB0P

TPB0N

R566

56.2/F_4

R565

56.2/F_4

R602 0_4
R603 0_4

L1394_TPA0+
L1394_TPA0-

L1394_TPB0+
L1394_TPB0-

B: REMOVE 1394CHOKE PADS

R564

+3V

1

A0

2

A1

3

A3

4

C773
.1U_4

2

5.1K/F

C836
270P_4

Size Document Number Re v

PCMCIA CONTROLLER

Date: Sheet

PROJECT : ZL2

Quanta Computer Inc.

of

1

23 41Tuesday, December 21, 2004

F

5

A_VCC

U45-3

D D

C C

B_CSTSCHG/B_BVD1(STSCHG/RI)

B_CCLKRUN/B_WP(IOIS16)

VCCB
VCCB

B_CAD31/B_D10

B_CAD30/B_D9
B_CAD29/B_D1
B_CAD28/B_D8
B_CAD27/B_D0
B_CAD26/B_A0
B_CAD25/B_A1
B_CAD24/B_A2
B_CAD23/B_A3
B_CAD22/B_A4
B_CAD21/B_A5
B_CAD20/B_A6

B_CAD19/B_A25

B_CAD18/B_A7
B_CAD17/B_A24
B_CAD16/B_A17

B_CAD15/B_IOWR

B_CAD14/B_A9

B_CAD13/B_IORD

B_CAD12/B_A11

B_CAD11/B_OE

B_CAD10/B_CE2

B_CAD9/B_A10

B_CAD8/B_D15

B_CAD7/B_D7

B_CAD6/B_D13

B_CAD5/B_D6

B_CAD4/B_D12

B_CAD3/B_D5

B_CAD2/B_D11

B_CAD1/B_D4
B_CAD0/B_D3

B_CC/BE3/B_REG

B_CC/BE2/B_A12

B_CC/BE1/B_A8

B_CC/BE0/B_CE1

B_CPAR/B_A13

B_CFRAME/B_A23

B_CTRDY/B_A22

B_CIRDY/B_A15

B_CSTOP/B_A20
B_CDEVSL/B_A21
B_CBLOCK/B_A19

B_CPERR/B_A14

B_CSERR/B_WAIT

B_CREQ/B_INPACK

B_CGNT/B_WE

B_CCLK/B_A16

B_CINT/B_READY(IREQ)

B_CRST/B_RESET

B_CAUDIO/B_BVD2(SPKR)

B_CCD1/B_CD1
B_CCD2/B_CD2

B_CVS1/B_VS1

B B

B_CVS2/B_VS2

B_RSVD/B_D14

B_RSVD/B_D2

B_RSVD/B_A18

PCI7411GHK

U45-2

D19
K19

B15
A16
B16
A17
C16
D17
C19
D18
E17
E19
G15
F18
H14
H15
G17
K17
L13
K18
L15
L17
L18
L19
M17
M14
M15
N19
N18
N15
M13
P18
P17
P19

F15
G18
K14
M18

K13
G19

H17
J13
J17
H19
J19

J18
B18

E18
J15

F14

A_CSTSCHG/A_BVD1(STSCHG/RI)

A18
H18

B19
F17
C17
N13

B17
C18
F19

N17
A15
K15

PCI7411GHK

VCCA
VCCA

A_CAD31/A_D10

A_CAD30/A_D9
A_CAD29/A_D1
A_CAD28/A_D8
A_CAD27/A_D0
A_CAD26/A_A0
A_CAD25/A_A1
A_CAD24/A_A2
A_CAD23/A_A3
A_CAD22/A_A4
A_CAD21/A_A5
A_CAD20/A_A6

A_CAD19/A_A25

A_CAD18/A_A7
A_CAD17/A_A24
A_CAD16/A_A17

A_CAD15/A_IOWR

A_CAD14/A_A9

A_CAD13/A_IORD

A_CAD12/A_A11

A_CAD11/A_OE

A_CAD10/A_CE2

A_CAD9/A_A10

A_CAD8/A_D15

A_CAD7/A_D7

A_CAD6/A_D13

A_CAD5/A_D6

A_CAD4/A_D12

A_CAD3/A_D5

A_CAD2/A_D11

A_CAD1/A_D4
A_CAD0/A_D3

A_CC/BE3/A_REG

A_CC/BE2/A_A12

A_CC/BE1/A_A8

A_CC/BE0/A_CE1

A_CPAR/A_A13

A_CFRAME/A_A23

A_CTRDY/A_A22

A_CIRDY/A_A15

A_CSTOP/A_A20

A_CDEVSL/A_A21
A_CBLOCK/A_A19

A_CPERR/A_A14

A_CSERR/A_WAIT

A_CREQ/A_INPACK

A_CGNT/A_WE

A_CCLKRUN/A_WP(IOIS16)

A_CCLK/A_A16

A_CINT/A_READY(IREQ)

A_CRST/A_RESET

A_CAUDIO/A_BVD2(SPKR)

A_CCD1/A_CD1
A_CCD2/A_CD2

A_CVS1/A_VS1

A_CVS2/A_VS2

A_RSVD/A_D14

A_RSVD/A_D2

A_RSVD/A_A18

A5
A11

D1
C1
D3
C2
B1
B4
A4
E6
B5
C6
B6
G9
C7
B7
A7
A10
E11
G11
C11
B11
C12
B12
A12
E12
C13
F12
A13
C14
E13
A14
B14
E14

C5
F9
B10
G12

G10
C8

A8
B8
A9
C9
E10

F10
B3

E7
B9

B2
C3
E9

C4
A6
A2
C15

E5
A3
E8

B13
D2
C10

A_CAD31
A_CAD30
A_CAD29
A_CAD28
A_CAD27
A_CAD26
A_CAD25
A_CAD24
A_CAD23
A_CAD22
A_CAD21
A_CAD20
A_CAD19
A_CAD18
A_CAD17
A_CAD16
A_CAD15
A_CAD14
A_CAD13
A_CAD12
A_CAD11
A_CAD10
A_CAD9
A_CAD8
A_CAD7
A_CAD6
A_CAD5
A_CAD4
A_CAD3
A_CAD2
A_CAD1
A_CAD0

A_CC/BE3#
A_CC/BE2#
A_CC/BE1#
A_CC/BE0#

A_CPAR
A_CFRAME#

A_CTRDY#
A_CIRDY#
A_CSTOP#

A_CDEVSEL#

A_CBLOCK#
A_CPERR#

A_CSERR#
A_CREQ#

A_CGNT#
A_CSTSCHG

A_CCLKRUN#

A_CCLK
A_CINT#
A_CRST#
A_CAUDIO
A_CCD1#

A_CCD2#
A_CVS1#
A_CVS2#

A_RSVD/D14

A_CRSVD/D2

A_CRSVD/A18

+5V +5V

AVPP

A_VCC

TPS_DATA
TPS_CLOCK
TPS_LATCH

T196R523

TPS_CLOCK

*47K

TPS_DATA<23>
TPS_CLOCK<23>
TPS_LATCH<23>

PCIRST#<18,22,23,25>

A A

+5V+3V

A_VCC

1

5V_0

2

5V_1

3

DATA

4

CLOCK

5

LATCH

6

NC_0

7

12V_0

8

AVPP/AVCORE

9

AVCC0

10

AVCC1

11

GND

12

RESET#

A_CCLK1

U40

4

R556
33/F_4

BVPP/BVCORE

NC

25

A_CAD0
A_CAD1
A_CAD3
A_CAD5
A_CAD7
A_CC/BE0#

A_CAD9
A_CAD11
A_CAD12
A_CAD14
A_CC/BE1#
A_CPAR

A_CPERR#
A_CGNT#
A_CINT#

A_CCLK1
A_CIRDY#
A_CC/BE2#
A_CAD18
A_CAD20
A_CAD21
A_CAD22
A_CAD23
A_CAD24
A_CAD25
A_CAD26
A_CAD27
A_CAD29
A_CRSVD/D2
A_CCLKRUN#

A_CCD1#
A_CAD2
A_CAD4
A_CAD6
A_RSVD/D14
A_CAD8
A_CAD10
A_CVS1#
A_CAD13
A_CAD15
A_CAD16
A_CRSVD/A18
A_CBLOCK#
A_CSTOP#
A_CDEVSEL#

A_CTRDY#
A_CFRAME#
A_CAD17
A_CAD19
A_CVS2#
A_CRST#
A_CSERR#
A_CREQ#
A_CC/BE3#
A_CAUDIO
A_CSTSCHG
A_CAD28
A_CAD30
A_CAD31
A_CCD2#

5V_2
NC_3
NC_2

SHDN#

12V_1

BVCC1
BVCC0

NC_1

OC#

3.3VIN0

3.3VIN1

TPS2220APWP

A_VCC

CN28

1

GND1

2

SKTAAD0/D3

3

SKTAAD1/D4

4

SKTAD3/D5

5

SKTAD5/D6

6

SKTAAD7/D7

7

-SKTACBE0/CE1#

8

SKTAAD9/A10

9

SKTABAD11/OE#

10

SKTAAD12/A11

11

SKTAAD14/A9

12

-SKTACBE1/A8

13

SKTAPAR/A13

14

-SKTAPERR/A14

15

-SKTAGNT/WE#

16

-SKTAINT/RDY

19

SKTAPCLK/A16

20

-SKTAIRDY/A15

21

-SKTACBE2/A12

22

SKTAAD18/A7

23

SKTAAD20/A6

24

SKTAAD21/A5

25

SKTAAD22/A4

26

SKTAAD23/A3

27

SKTAAD24/A2

28

SKTAAD25/A1

29

SKTAAD26/A0

30

SKTAAD27/D0

31

SKTAAD29/D1

32

SKTARSVD/D2

33

-SKTACLKRUN/WP

34

GND2

35

GND3

36

-SKTACD1/CD1#

37

SKTAAD2/D11

38

SKTAD4/D12

39

SKTAAD6/D13

40

SKTARSVD/D14

41

SKTAAD8/D15

42

SKTAAD10/CE2#

43

-SKTAVS1/VS1#

44

SKTAAD13/IORD#

45

SKTAAD15/IOWR#

46

SKTAAD16/A17

47

-SKTRSVD/A18

48

-SKTALOCK/A19

49

-SKTASTOP/A20

50

-SKTADEVSEL/A21

53

-SKTATRDY/A22

54

-SKTAFRAME/A23

55

SKTAAD17/A24

56

SKTAAD19/A25

57

-SKTAVS2VS2#

58

-SKTARST/RESET

59

0SKTASERR/WAIT#

60

-SKTAREQ/INPACK#

61

-SKTACBE3/REG#

62

SKTAAUDIO/BVD2

63

-SKTASTSCHG/BVD1

64

SKTAAD28/D8

65

SKTAAD30/D9

66

SKTAAD31/D10

67

-SKTACD2/CD2#

68

GND4

CARDBUS SLOT

FOX_1CA4C5G2-TC

24
23
22
21
20
19
18
17
16
15
14

+3V

13

UPPER PIN

LOWER PIN

3

SKTA/VCC1
SKTA/VCC2

SKTA/VPP1
SKTA/VPP2

GND5
GND6
GND7
GND8

GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20

MC_PWR_CTRL_0#

A_VCC

17
51

AVPP

18
52

69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84

REVB P/N&FT CHANGE C P/N&FT CHANGE

U45-8

F1

MC_PWR_CTRL_0

F2

MC_PWR_CTRL_1

PCI7411GHK

2

SD_CD
MS_CD

MS_CLK/SD_CLK/SM_EL_WP

MS_BS/SD_CMD/SM_WE
MS_DATA3/SD_DAT3/SM_D3
MS_DATA2/SD_DAT2/SM_D2
MS_DATA1/SD_DAT1/SM_D1

MS_SDIO(DATA0)/SD_DAT0/SM_D0

SD_CLK/SM_RE/SC_GPIO1

SD_CMD/SM_ALE/SC_GPIO2

SD_DAT0/SM_D4/SC_GPIO6
SD_DAT1/SM_D5/SC_GPIO5
SD_DAT2/SM_D6/SC_GPIO4
SD_DAT3/SM_D7/SC_GPIO3

SM_PHYS_WP/SC_FCB

SM_CD

SD_WP/SM_CE

SM_CLE/SC_GPIO0

SM_R/B/SC_RFU

E3
F5
F6

G5
F3
H5
G3
G2
G1

J5
J3
H3
J6
J1
J2
H7

J7
K1
K2

SD_CDZ
MS_CDZ

MS_CLK_SD_CLK_SM_ELWPZ_R MS_CLK_SD_CLK_SM_ELWPZ

MS_BS_SD_CMD_SM_WEZ
MS_DATA3_SD_DAT3_SM_D3
MS_DATA2_SD_DAT2_SM_D2
MS_DATA1_SD_DAT1_SM_D1
MS_DATA0_SD_DAT0_SM_D0

SD_WP_SM_CEZ

1

R547
3@33/F_4

3 IN1 CARD READER

VCC_XD

85

NC

86

NC

87

NC

88

NC

MS_DATA3_SD_DAT3_SM_D3
MS_BS_SD_CMD_SM_WEZ

MS_CLK_SD_CLK_SM_ELWPZ
MS_DATA0_SD_DAT0_SM_D0

MS_DATA1_SD_DAT1_SM_D1
MS_DATA2_SD_DAT2_SM_D2
SD_CDZ

SD_WP_SM_CEZ

18
15
12
10

7
4
3

2
20
21
23

1
22

24
25
26

CN11

SD-1(DAT3)
SD-2(CMD)
SD-3(VSS)
SD-4(VCC)
SD-5(CLK)
SD-6(VSS)
SD-7(DAT0)
SD-8(DAT1)
SD-9(DAT2)
SD-CD1
SD-CD2(G)
SD-WP1
SD-WP-COM

NAIL1
NAIL2
NAIL3

(VSS)MS-1

(BS)MS-2
(DAT1)MS-3
(DAT0)MS-4
(DAT2)MS-5

(INS)MS-6
(DAT3)MS-7
(SCLK)MS-8

(VCC)MS-9

(VSS)MS-10

5
6
8
9
11
13
14
16
17
19

MS_BS_SD_CMD_SM_WEZ
MS_DATA1_SD_DAT1_SM_D1
MS_DATA0_SD_DAT0_SM_D0
MS_DATA2_SD_DAT2_SM_D2
MS_CDZ
MS_DATA3_SD_DAT3_SM_D3
MS_CLK_SD_CLK_SM_ELWPZ

3@3IN1_DFHD23MS069

+3V +3V

C922

U45-9

L5

SC_PWR_CTRL

SC_CD

SC_CLK

SC_RST

SC_VCC_5V

SC_DATA

SC_OC

L2

K5
K3
K7

L1
L3

3@.1U_4

MC_PWR_CTRL_0#

+5V

R542
0_4

+5V_SCVCC

C798
.1U_4

R649
3@10K_4

F: CHANGE TO TPS2061

1
2
3

4

Q45

GND
IN
IN

EN#

OUTNC

3@TPS2061

OUT
OUT
OUT

8
7
6

5

CLOSE TO XD SOCKET

PCI7411GHK

VCC_XD

VCC_XD

C814
3@10U/10V_8

C754
.1U_4

C755
10U/10V_8

C767

C760

.1U_4

10U/10V_8

5

C793
.01U/16V_4

C816
.01U/16V_4

C787
.1U_4

C817
1000P_4

C780
10U/10V_8

4

C769
.01U/16V_4

C770
10U/10V_8

Size Document Number Re v

PCMCIA & 3 IN 1

3

2

Date: Sheet

PROJECT : ZL2

Quanta Computer Inc.

of

1

24 41Tuesday, December 21, 2004

F

C796
10U/6.3V

C797
.1U_4

C809
.1U_4

5

FOR 10/100
FOR GIGA

C808
.1U_4

C788
.01U/16V_4

+3V_S5

+3V

R533 4@0_8
R535 5@0_8

C794
.01U/16V_4

C807
.01U/16V_4

VDDIO_LAN

C789
.01U/16V_4

B: CHANGE SIZE OF C796 FOR ME

D D

Voltage Rail

57024401

VDDIO_PCI 3V_S5 +3V

AD[31..0]<18,22,23>

5705M
+3V

2.5V3.3V 2.5V+3V_2.5V_LAN

1.2V1.8V 1.2V+1.8V_1.2V_LAN

C C

CBE0#<18,22,23>
CBE1#<18,22,23>
CBE2#<18,22,23>

CBE3#<18,22,23>

+3V_S5
REQ0#<18>
GNT0#<18>

FRAME#<18,22,23>

IRDY#<18,22,23>

DEVSEL#<18,22,23>

STOP#<18,22,23>

TRDY#<18,22,23>

PAR<18,22,23>
PERR#<18,22,23>
SERR#<18,22,23>

PIRQA#<18,23>

PCIRST#<18,22,23,24>

PCLK_LAN<2>

LAN_PME#<29>

PME#<18,22,23>

CLKRUN#<18,22,23,29,31>
PCLK_SMB<2,19,32,33>

C751
.1U_4

L73

BK1608HS330

PDAT_SMB<2,19,32,33>

C750
.1U_4

B B

+3V_2.5V_LAN

+1.8V_1.2V_LAN

A A

C758
.01U/16V_4

10mils

AD24

C772 27P_4

C778 27P_4

LAN_PLLVDD2

C752
.1U_4

AD[31..0]

R504 4.7K_4

R530 0_4
R524 0_4

R554 5@0_4
R520 *0_4
R522 *0_4
R521 5@4.7K_4

C: CHANGED FROM 200OHM

T199

C739

4.7U/6.3V-8

LAN_PME#

CLK_LAN_X1

1 2

CLK_LAN_X2

Y6
25MHZ

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

4

+1.8V_1.2V_LAN

P2

VDDIO_PCIA7VDDIO_PCIB3VDDIO_PCIC5VDDIO_PCIE1VDDIO_PCIE4VDDIO_PCIG1VDDIO_PCIK3VDDIO_PCIL4VDDIO_PCIN6VDDIO_PCI

N7

AD0

M7

AD1

P6

AD2

P5

AD3

N5

AD4

M5

AD5

P4

AD6

N4

AD7

P3

AD8

N3

AD9

N2

AD10

M1

AD11

M2

AD12

M3

AD13

L1

AD14

L2

AD15

K1

AD16

E3

AD17

D1

AD18

D2

AD19

D3

AD20

C1

AD21

B1

AD22

B2

AD23

B4

AD24

A5

AD25

B5

AD26

B6

AD27

C6

AD28

C7

AD29

A8

AD30

B8

AD31

M4

CBE_0#

L3

CBE_1#

F3

CBE_2#

C4

CBE_3#

J12

VAUXPRSNT

C3

REQ#

J3

GNT#

F2

FRAME#

F1

IRDY#

H3

DEVSEL#

H1

STOP#

G3

TRDY#

J1

PAR

J2

PERR#

A2

SERR#

H2

INTA#

C2

PCI_RST#

A3

PCI_CLK

A4

IDSEL

A6

PME#

C8

CSTSCHG

H4

CLKRUN#

A10

SMB_CLK

C9

SMB_DATA

M11

LOW_PWR

F4

M66EN

J14

XTALVDD

N11

XTALI

N10

XTALO

R531
0

P7

NC/PLLVDD3

H14

PLLVDD2

L8

NC

M9

NC

N8

NC

VSSB7VSSD4VSSD5VSSD6VSSD7VSSD8NC/VSSD9VSSE2VSSE5VSSE6VSSE7VSSE8VSSE9VSSF5VSSF6VSSF7VSSF8VSSF9VSS

15mm x 15mm

E12

H6

VDDCH7VDDCH8VDDCJ5VDDCJ6VDDCJ7VDDCJ8VDDCJ9VDDC

VDDC

VDDCH5VDDC

@BCM4401/5788

BGA196

J10

VSSG4VSSG5VSSG6VSSG7VSSG8VSSG9VSS

F10

K10

L10

M14

N14

VDDCK5VDDCK6VDDCK7VDDCK8VDDCK9VDDC

VDDCL5VDDC

VDDC

VDDC

BIASVDD

NC/VDDP
NC/VDDP

NC/AVDD
NC/AVDD

EPHY_AVDD/AVDDL
EPHY_AVDD/AVDDL

NC/TRD[3]-

NC/TRD[3]+

NC/TRD[2]-

NC/TRD[2]+

RDN/TRD[1]-

RDP/TRD[1]+

TDN/TRD[0]­TDP/TRD[0]+

LINK_LED10#/LINKLEDB

LINK_LED100#/SPD100LEDB

COL_LED#/SPD1000LEDB
ACT_LED#/TRAFFICLEDB

SPROM_CLK/EECLK

SPROM_CS/EEDATA

SPROMDOUT/NC

SPROMDIN/NC

REGIN33/REGSUP25

NC/REGCTL25

OUT33/REGSEN25

NC/REGSUP12
NC/REGCTL12

REGOUT18/REGSEN12

VSS/NC
VSS/NC

NC/CS#

EECLK_PXE/SCLK

EEDATA_PXE/SI

VSSH9VSSK2VSSL6VSSL9VSS

ND/VSS

VSS

M6

G10

M12

M13

3

P12

P13

P14

U42

VDDCP8VDDC

VDDC

VDDIO
VDDIO
VDDIO
VDDIO

VESD1
VESD2
VESD3

VDDP

RDAC
GPIO0

GPIO1
GPIO2

TRST#

NC/SO

VSSN1VSS

N12

TCK
TMS
TDO

VDDC

TDI

NC
NC
NC
NC
NC
NC
NC

VSS

N13

10mils

BIASVDD

A14
A11
F11

+3V_S5

K12
L12

P1
G2
A1

K14

+3V_2.5V_LAN

L13
P11
A13
F14

F12

LAN_AVDDL

F13
E14

E13
D14

D13
C14

C13
B14

B13

10MBPS#

G13

-100MBPS

H13

1GBPS#

G12

ACT#

G14

LAN_RDAC

D10
H12

EEWP#

K13
J13

EECLK

M10

EEDATA

P10

BCM_DI

N9

BCM_DO

P9

BCM_TRST#

D11
D12
C12
A12
B12

B11
C11
C10

B9
B10
A9
L7

K11
K4
J11
J4
H10
M8
L14
L11

H11
E11
E10
G11

1.5" AWAY FROM CHIP

Use Philips BCP69-16, hfe=75~275

BCM4401 is for 10/100(1.8)
BCM5702 is for giga
BCM5705M is for giga cost-down(12)

+3V_S5

LAN_AVDD

R510 0_4
R509 *0_4

3

E

1

B

C

2

3

E

1

B

C

2

C749
1000P_4

C757
.1U_4

R495 1K_4

R512 5@1K_4
R502 5@1K_4

R517 1K_4

Q42
5@BCP69T1

1G

4

C

Q43
5@BCP69T1

1G

4

C

L74

PBY201209T-300Y-S

BK1608HS330

B: CORRECT PIN B11, C11 SHORT

40mils

40mils

+3V_2.5V_LAN

+3V_2.5V_LAN

L76

T94

B: ALWAYS USE -100MBPS

100MBPS# <26,33>
ACT# <26,33>

C729
.01U/16V_4

+3V_S5

+3V_S5

+3V_S5

C732
10U/10V_8

2.5V@88mA 0.564W

C727
.01U/16V_4

C728
.01U/16V_4

C730
10U/10V_8

1.2V@618mA 0.803W

C723
.01U/16V_4

C724
.01U/16V_4

C731
10U/10V_8

C738 5@.1U_4

R500

5@49.9/F_4

C: CHANGED FROM 1.24K OHM FOR 5788

R519 @1.2K/F_1.27K

C742
5@.1U_4

40mils

2

EEWP#
EECLK
EEDATA

+3V_2.5V_LAN

C726
.01U/16V_4

+1.8V_1.2V_LAN

C725
.01U/16V_4

C737 5@.1U_4

R499

R508

5@49.9/F_4

5@49.9/F_4

4401 1.27K

U37

8

VCC

7

WP#

6

SCL

5

SDA

5@24C128

GND

1

C736 .1U_4

R507

R498

5@49.9/F_4

49.9/F_4

LAN_AVDDL

1

A0

2

A1

3

A3

4

EEDATA
EECLK
BCM_DI
BCM_DO

R506

49.9/F_4

C735 .1U_4

R497

49.9/F_4

BK1608HS330

C753
.1U_4

1
2
3
4

L75

U39

CS
SK
DI
DO

4@AT93C46

R505

49.9/F_4

TX3N
TX3P

TX2N
TX2P

TX1N
TX1P

TX0N
TX0P

+1.8V_1.2V_LAN

VCC

NC
ORG
GND

TX3N <26>
TX3P <26>

TX2N <26>
TX2P <26>

TX1N <26>
TX1P <26>

TX0N <26>
TX0P <26>

+3V_S5

8
7
6

C743

5

4@.1U_4

PCLK_LAN

C: DEPOP

R549

*22_4

+3V_2.5V_LAN

C799

*10P_4

5

B: CHANGE SIZE OF C741 FOR ME

4

C741
10U/6.3V

C748
.1U_4

C763
.1U_4

+1.8V_1.2V_LAN

C762
.1U_4

C765
10U/10V_8

3

C764
.1U_4

C747
.1U_4

C746
.1U_4

C782
.01U/16V_4

C744
.01U/16V_4

C785
.01U/16V_4

2

C745
.01U/16V_4

Size Document Number Re v

BCM4401/5705M LAN

Date: Sheet

PROJECT : ZL2

Quanta Computer Inc.

25 41Tuesday, December 21, 2004

1

of

F

5

D D

+3V_S5

4

3

2

1

C717

C716

D@.1U_4

D@.1U_4

U36

0: A to B1
1: A to B2

D@PI3L301DA

2

A0

4

A1

8

A2

10

A3

15

A4

17

A5

21

A6

23

A7

24

SEL

GND3GND5GND7GND9GND11GND13GND16GND18GND20GND22GND27GND

TX0P

TX0N

TX1P

TX1N

TX2P

TX2N

TX3P

TX3N

TX0P<25>
TX0N<25>

10/100

TX1P<25>
TX1N<25>

C C

B B

TX2P<25>
TX2N<25>

TX3P<25>
TX3N<25>

DOCKIN#<33>

36

VDD1VDD6VDD12VDD19VDD

R626 ND@0_4

1 2

R627 ND@0_4

1 2

R628 ND@0_4

1 2

R629 ND@0_4

1 2

R630 ND@0_4

1 2

R631 ND@0_4

1 2

R632 ND@0_4

1 2

R633 ND@0_4

1 2

46

30

TX0P_SYS

TX0N_SYS

TX1P_SYS

TX1N_SYS

TX2P_SYS

TX2N_SYS

TX3P_SYS

TX3N_SYS

X-TX0P-PR

48

0B1
1B1

GND33GND37GND40GND43GND

2B1
3B1

4B1
5B1

6B1
7B1

0B2
1B2

2B2
3B2

4B2
5B2

6B2
7B2

NC

14

X-TX0N-PR

47

X-TX1P-PR

42

X-TX1N-PR

41

X-TX2P-PR

35

X-TX2N-PR

34

X-TX3P-PR

29

X-TX3N-PR

28

TX0P_SYS

45

TX0N_SYS

44

TX1P_SYS

39

TX1N_SYS

38

TX2P_SYS

32

TX2N_SYS

31

TX3P_SYS

26

TX3N_SYS

25

X-TX0P-PR <33>
X-TX0N-PR <33>

X-TX1P-PR <33>
X-TX1N-PR <33>

X-TX2P-PR <33>
X-TX2N-PR <33>

X-TX3P-PR <33>
X-TX3N-PR <33>

+3V_2.5V_LAN

+3V_2.5V_LAN
TX0P_SYS
TX0N_SYS

+3V_2.5V_LAN
TX1P_SYS
TX1N_SYS

+3V_2.5V_LAN
TX2P_SYS
TX2N_SYS

+3V_2.5V_LAN
TX3P_SYS
TX3N_SYS

U6

1

TCT1

MCT1

2

TD1+

MX1+

3

TD1-

MX1-

4

TCT2

MCT2

5

TD2+

MX2+

6

TD2-

MX2-

7

TCT3

MCT3

8

TD3+

MX3+

9

TD3-

MX3-

10

TCT4

MCT4

11

TD4+

MX4+

12

TD4-

@24ST1285A-3B/24HST1041A-3B

MX4-

10/100 DB0ZL1LAN04

24
23
22

21
20
19

18
17
16

15
14
13

R64

1G DB0ZL2LAN09

75/F_4

C210

5@.1U_4

+3V_2.5V_LAN

C167

C184

5@.1U_4

C133

.1U_4

.1U_4

B: DEPOP C210, C184, R87, R99 WHEN NO 1G LAN

R75

X-TX0P
X-TX0N

X-TX1P
X-TX1N

X-TX2P
X-TX2N

X-TX3P
X-TX3N

R87

R99

75/F_4

5@75/F_4

5@75/F_4

C232
1500P/2KV

MGND

+3V_S5

R61 220_4

ACT#<25,33>

+3V_S5 MGND

100MBPS#<25,33>

ACT#

X-TX3N
X-TX3P
X-TX1N
X-TX2N
X-TX2P
X-TX1P
X-TX0N
X-TX0P

R103 220_4

100MBPS#

RINGL
TIPL

12
18

10

15

13
14

TIPL

RINGL

CN20

LED1_YELP_Y
LED1_YELN_Y

3

RX2-

4

RX2+

5

RX1-

6
7
8
9

2

1

NC

TX2-

GND17

TX2+

GND16
RX1+
TX1­TX1+
LED2_AMBER_A1
LED2_P_A2
LED2_GRNN_A3

RING
TIP

FOXCONN_JM34F23-P2053

C584
470pF/3KV_C

C583
470pF/3KV_C

11
17
16

CN4

1
2

FI-S2P-HF(JAE)

C238 .1U_4
C237 .01U/16V_4
C235 1500P/2KV

C: ADD CIRCUITS WHEN NO DOCKING

E: ADD FOR EMI REQUEST

A A

Size Docu ment Number R ev

DVO CH7011A & RJ45-11 CON

5

4

3

2

Date: Sheet

PROJECT : ZL2

Quanta Computer Inc.

of

26 41Tuesday, December 21, 2004

1

F

1

2

3

4

5

6

7

8

The AMC20463-004 modem is used for mother board family MBAMC20463-004.

+3VA

+3VSUS

C843

C838

C812

.1U_4

.1U_4

A A

.01U/16V_4

C813
.1U_4

B: CHANGE FROM 1K

DIB_DATAN
DIB_DATAP LINEINL

PWRCLKP
PWRCLKN

R274 0_4
R275 0_4

CHANGED FROM 33OHM

CD_RESET#<18>

CD_SYNC<18>

CD_SDOUTA<18>

CD_BITCLKA<18>

CD_SDIN0<18>

B B

HPS_IN<28>

CD_SDIN0 SDIN0_A

R577 33/F_4

CK28

R579 *1M_4

1 2

C844
22P_4

R558 10K_4

Y9

24.576MHZ

R272 0_4

R575 33/F_4
R573 33/F_4

CK26
CK27

C856
22P_4

C811
10U/10V_8

RC_OSC

BITCLK_C

11
12

14
17

16
15

22
21
20

47
48

24
25

R557
249K/F

1

3
4

7
8

U46

RCOSC1

DIB_DATAN
DIB_DATAP

PWRCLKP
PWRCLKN

ID0#
ID1#

PRIMARY_DN
AC_RESET#

SYNC
SDATA_OUT

BITCLK
SDATA_IN0
SDATA_IN1

GPIO_4
GPIO_5

XTLO
XTLI

23

5

10

VDD

VDDC18VDDC

SmartAMC

GNDC2GNDC9GNDC

GND

6

19

VDD_CLK

44

AVDD33AVDD

LINE_OUT_L
LINE_OUT_R

CD_IN_GND

MBIAS/AVDD

AVSS_CLK26AGND35AGND

41

AUDGND

DSPKOUT

PC_BEEP

LINE_IN_L

LINE_IN_R

HP_OUT_L

HP_OUT_R

MIC_IN
CD_IN_L
CD_IN_R

SPDIF

REF_FLT

VC_SCA

VREF_SCA

20468-31

C841
10U/10V_8

13
45
27
28
39
40
42
43
29
30
32
31
46

38
37
36

34

PC_BEEP

LINEINR
AOUTL
AOUTR

MIC_1
CD_L
CD_R
CD_GND

MBIAS

C840
.1U_4

C860

C861

1000P_4

AUDGND

BK2125HS330

.1U_4

B: ADD A 4700P FOR NOISE

C910 4700P
C512 4.7U/10V_8
C511 4.7U/10V_8

AOUTL <28>
AOUTR <28>

B: CHANGE FROM 1U

C863 10U/10V_8
C857 1000P_4
C859 1000P_4
C858 1000P_4

SPDIF_OUT <28,33>

C862

C850

.1U_4

.1U_4

+3V

L78

BEEP
LINEINL_AMP
LINEINR_AMP

C: CHANGED FROM 10U

C847

C842

1U/10V

.1U_4

AUDGND

AUDGND

MBIAS

R581
3K

MIC1

+3V

C783
.1U_4

PCMSPK<23>

PCSPK<19>

CN9

MODEM_B2B

+3V

U43
74AHCT1G86GW

1

BEEP

4

2

3 5

910
78
56
34
12

DIB_DATAN
DIB_DATAP

PWRCLKP
PWRCLKN

PWRCLKP

PWRCLKN

C908
150P_4

C909
150P_4

MIC

R297

SYS_MIC

C C

D D

R301
*1K_4

AUDGND

CN12

INT_MIC

PR_MIC<33>

1

SYS_MIC_2 SYS_MIC_1

0_4

1
2

AUDGND

PR_MIC
SYS_MIC

INT_MIC1

AUDGND

C885
.1U_4

L57 BK1608LL121

R284

0_4

AVDD

U49

5

VCC

1

IN_B1

3

IN_B0

D@SN74LVC1G3157D C KR

AUDGND

INT_MIC

R285
*1K_4

AUDGND

C515
22P_4

AUDGND

SYS_MIC MIC1

C: ADD CIRCUITS WHEN NO DOCKING

PR_MIC_IN

6

SEL

MIC1

4

COM

2

GND

AUDGND

2

C524
*.1U_4

INT_MIC

B: CHANGE TO HIGH ACTIVE

R634 ND@0_4

1 2

R592
100K_4

AUDGND

3

AUDGND

C: CHANGE FROM 4.7K

1
2
6
3
4
5

FOXCONN_JACK_MIC

PR_MIC_IN <33>

CN34

7

8

SEL
LOW
HIGH

FUNCTION

IN_B0
IN_B1

4

LINE IN

CN36

LINEINL_SYS
LINEINR_SYS

R294

R296

*0_4

*0_4

R288

0_4

R289

0_4

LINEINL_AMP1

LINEINR_AMP1

LINEINL_AMP

AUDGND

LINEINR_AMP

AUDGND

5

6

L58

BK1608LL121

L59

BK1608LL121

C525
*.1U_4

AUDGND

C526
*.1U_4

AUDGND

1
2
6
3
4
5

FOXCONN_JACK_LINEIN

R293 D@0_4

R295 D@0_4

Size Document Number Re v

AUDIO

Date: Sheet

7

7

8

AUDGNDAUDGND

LINEINL_SYS
LINEINL_PR

LINEINR_SYS
LINEINR_PR

LINEINL_PR <33>

LINEINR_PR <33>

PROJECT : ZL2

Quanta Computer Inc.

27 41Tuesday, December 21, 2004

of

8

F

5

GAIN1

0
1

D D

MODE

10.5
9

HPSPKR

MODE

3
0

AVDD

AUDGND

R587
*1K_4

R589
1K_4

GAIN1

AMP POWER

+5V

D14
*BAS316

3
2

5
6

+12V

+

-

+

-

84

U17A
*LM358ADR

U17B
*LM358ADR

1

7

R277 * 10

C504
*100P_4

R278 *100K

21

R279
*100K

R276
*3.3M

C C

C505
*1U/10V

+5V

578

3 6

AUDGND

241

C514
.1U/16V_4

C513
.1U/16V_4

Q27
*AO4414

TO AUDIO

4

C518
10U/10V_8

C517
10U/10V_8

C516
10U/10V_8

AVDD

R292

3

AUDGND

R282
100K

AOUTL<27>
AOUTR<27>

AMP_MUTE#<29>

R302

0_8

0_8

R283 1K_4

R281 1K_4

AUDGND

HPSENCE_PR

B: CHANGE EZ4'S HEADPHONE SOURCE

R280
100K

D32

BAS316

C867 1U/10V
C873 1U/10V

21

Q28
*2N7002

2

AVDD

R591
10K_4

3

1

AUDGND

C888

1U/10V

GAIN1

AUDGND

MUTE

AUDGND

AVDD

AUDGND

C875
.1U_4

28

27

24
23
22
21

2

1

U48

INL
INR
NC
NC

GAIN_SEL
GND
/SHDN
VBIAS

AUDGND

C874
1U/10V

8

15

25

C1P

VDD

HPVDD

GND26CPGND9CPVSS11VSS

AUDGND

SPEAKER CON.

INSPKR+

L56 BK1608LL121

INSPKR-

R312 0
R313 0
R311 0

AUDGND

L55 BK1608LL121

INSPKL+

L54 BK1608LL121

INSPKL-

L53 BK1608LL121

7

10

HPS

C1N

HPL

CPVDD

HPR

OUTL+

OUTL­OUTR­OUTR+

PVDDL
PGNDL

PVDDR
PGNDR

MAX9755AETI

12

C877
1U/10V

2

20
14
13
4

5
17
18

6
3
16
19

AUDGND

INSPKR+N
INSPKR-N

INSPKL+N
INSPKL-N

AVDD

AUDGND

HPS

SPKL
SPKR
INSPKL+

INSPKL­INSPKR­INSPKR+

AUDGND

C866
.1U_4

C886
.1U_4

D33

BAS316

C884
10U/10V_8

HPS_PLUGIN

C868
.1U_4

C879
*.1U_4

C880
*.1U_4

2 1

C878
*.1U_4

C881
*.1U_4

AUDGND AUDGND

4

U50

SN74AHC1G32DCKR

AVDD

C869
10U/10V_8

AUDGND

CN13

4
3

6

2

5

1

R_L_SPEAKERS

1

5

2
1

3

AUDGNDAUDGND

REV:B MODIFY FOR EMI

R586 0
R585 0
C887 .1U_4
C870 1000P_4

AUDGND

R601
100K

SPKPLG

R594
100K

HPSENCE_PR <33>

AVDD

C890
.1U_4

SPKL SPKL1

SPKR

R303
470_4

R300
470_4

.01U/16V_4C519

C529 1000P_4

.01U/16V_4C520

B B

C528 1000P_4
C527 100P_4

AUDGND

R290 0
R291 0
R287 0C530 100P_4

AUDGND

B: CHANGE EZ4'S HEADPHONE SOURCE

F: RESTORE PAD26 FOR EMI REQUEST
E: REMOVE PAD26, AND PAD35 CHANGE LOCATION

SPKPLG

3

B: ADD SPRING FOR MODEM CABLE

A A

PAD26

1

*EMIPAD142X91

5

PAD34

1

EMIPAD142X91

PAD35

1

EMIPAD142X91

PAD36

*EMIPAD142X91

1

PAD37

1

EMIPAD142X91

4

1

AUDGND

R298
1K_4

SPKR1

2N7002

2

L61 BK1608LL121

R299
1K_4

AUDGND

L60 BK1608LL121

AVDD

R637
100K

Q54

SPKPLG-

3

1

+5V

3

2

D34
DA204U

SPKL_SYS

C522
470P_4

AUDGND

SPKR_SYS

C523
470P_4

AUDGNDAUDGND

SPDIF_OUT<27,33>

F: NEW ADD FOR ESD

CLOSE TO CN35

HPS_IN<27>

SPKL_SYS <33>

SPKR_SYS <33>

+3V

HPS_IN

D: CHANGE TO SPDIF CONN

AUDGND

+5V

C916
.1U_4

+3V

R646
10K_4

2

1 3

Q57 MMBT3904

SPKPLG-

R555

D31

100K

2 1

BAS316

2

2

+5V

R647
1K_4

1 3

HPS_PLUGIN

Q58
DTC144EU

SPKPLG-

SPKL_SYS
SPKR_SYS

SPDIF

F:TURN OFF LED WHEN NO PLUG

Size Document Number Re v

AUDIO AMP

Date: Sheet

CN35

5
4
2
3
1

8

Drive

7
9

FOX=2F11381-TJ1-TR

C917 *.1U_4

PROJECT : ZL2

Quanta Computer Inc.

LED

IC

1

LINE OUT&SPDIF

6
11

10

AUDGND

28 41Tuesday, December 21, 2004

of

F

5

4

3

2

1

LDRQ#(pin 8) internal is no use

REF3V VCCRTC

3V_ALWAYS

CN7

1
2

5

TX_551

3

6

4

R418
470K_4

Y3

32.768KHZ

+5V

*551_DEBUG

LFRAME#/FWH4<18,31>

LAD0/FWH0<18,31>
LAD1/FWH1<18,31>
LAD2/FWH2<18,31>
LAD3/FWH3<18,31>

RN113

8P4R-4.7K

1 2

3 4

5 6

7 8

TBCLK
TBDATA
CAPSLED#
NUMLED#

R179

121K/F

CHANGED FROM PR_INSERT#

C: CHANGED FROM IOPL3,4

C337

10P_4

BT_POWERON#<22>

+3V

C648
.1U_4

SERIRQ<18,19,22,23,31>

PCLK_591<2>

KBSMI#<19>

GATEA20<18>

RCIN#<18>

BATLED0#<30>
BATLED1#<30>

RF_EN<22>

RSMRST#<19>

VRON<34>
MAINON<33,35,36,37,38>
SUSON<33,35,36>
S5_ON<35,37>

SERIRQ

LFRAME#/FWH4
LAD0/FWH0
LAD1/FWH1
LAD2/FWH2
LAD3/FWH3
PCLK_591

KBSMI#

2 1

D12 BAS316

SCI#

GATEA20
RCIN#

MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15

-RBAYINS<21>
PR_STS<19,33>

BT_POWERON#

4

D13 BAS316

VRON
MAINON

SUSON

S5_ON

CS#

2 1

2 1

D23 BAS316

2 1

D22 BAS316

591_32KX1
591_32KX2

-RBAYINS
PR_STS

T119
T117

T65

SCI#<19>

MX0<30>
MX1<30>
MX2<30>
MX3<30>
MX4<30>
MX5<30>
MX6<30>
MX7<30>

MY0<30>
MY1<30>
MY2<30>
MY3<30>
MY4<30>
MY5<30>
MY6<30>
MY7<30>
MY8<30>

MY9<30>
MY10<30>
MY11<30>
MY12<30>
MY13<30>
MY14<30>
MY15<30>

3V_ALWAYS

C276
.1U_4

MSCLK<33>

MSDATA<33>

KPCLK<33>

KPDATA<33>

TBCLK<30>

TBDATA<30>
CAPSLED#<30>
NUMLED#<30>

R172 20M

C326
10P_4

3V_ALWAYS

23

4 1

A0
A1
A2

VCC

GND

R411
*22_4

C647
*10P_4

13

Q16
*PDTA124EU

13

Q17
*PDTA124EU

13

Q18
*PDTA124EU

13

Q19
*PDTA124EU

1
2
3

8
4

PCLK_591

HOLD#

HOLD#

HOLD#

HOLD#

5

3V_ALWAYS

BT1#

BT2#

BT3#

BT4#

U14

6

SCL

5

SDA

7

WP

AT24C08AN

C: DEPOP

3VH_591

2

3VH_591

2

3VH_591

2

3VH_591

2

MBCLK

D D

MBDATA

C C

B B

A A

U30

7

SERIRQ

8

LDRQ

9

LFRAME

15

LAD0

14

LAD1

13

LAD2

10

LAD3

18

LCLK

19

LREST

22

SMI

23

PWUREQ

31

IOPD3/ECSCI

5

GA20/IOPB5

6

KBRST/IOPB6

71

KBSIN0

72

KBSIN1

73

KBSIN2

74

KBSIN3

77

KBSIN4

78

KBSIN5

79

KBSIN6

80

KBSIN7

49

KBSOUT0

50

KBSOUT1

51

KBSOUT2

52

KBSOUT3

53

KBSOUT4

56

KBSOUT5

57

KBSOUT6

58

KBSOUT7

59

KBSOUT8

60

KBSOUT9

61

KBSOUT10

64

KBSOUT11

65

KBSOUT12

66

KBSOUT13

67

KBSOUT14

68

KBSOUT15

105

TINT

106

TCK

107

TDO

108

TDI

109

TMS

110

PSCLK1/IOPF0

111

PSDAT1/IOPF1

114

PSCLK2/IOPF2

115

PSDAT2/IOPF3

116

PSCLK3/IOPF4

117

PSDAT3/IOPF5

118

PSCLK4/IOPF6

119

PSDAT4/IOPF7

158

32KX1/32KCLKOUT

160

32KX2

62

IOPJ2/BST0

63

IOPJ3/BST1

69

IOPJ4/BST2

70

IOPJ5/PFS

75

IOPJ6/PLI

76

IOPJ7/BRKL_RSTO

148

IOPM0/D8

149

IOPM1/D9

155

IOPM2/D10

156

IOPM3/D11

3

IOPM4/D12

4

IOPM5/D13

27

IOPM6/D14

28

IOPM7/D15

173

SEL0

174

SEL1

47

CLK

PC97551

REFP<39,40>

C675
.1U_4

16

VDD

3V_ALWAYS

VCC134VCC245VCC3

Host interface

Key matrix scan

JTAG debug port

PS2 interface

PORTJ-2

PORTM

GND117GND235GND346GND4

122

123

159

GND5

136

VCC4

GND6

167

157

PORTD-1

137

VCC5

GND7

2

166

VCC6

PORTE

3

R450

1

0_4

591_AVCC

95

AD Input

DA output

PWM
or PORTA

PORTB

PORTC

PORTH

PORTJ-1

PORTD-2

PORTK

PORTL

AGND

96

3

R447
*0_4

*2N7002

Q39

C630
.1U_4

161

VBAT

AVCC

IOPE0AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7

DP/AD8
DN/AD9

IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7

IOPB0/URXD
IOPB1/UTXD

IOPB2/USCLK

IOPB3/SCL1

IOPB4/SDA1

IOPB7/RING/PFAIL

IOPC0

IOPC1/SCL2

IOPC2/SDA2

IOPC3/TA1

IOPC4/TB1/EXWINT22

IOPC5/TA2

IOPC6/TB2/EXWINT23

IOPC7/CLKOUT

IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21

IOPD2/EXWINT24

IOPE4/SWIN

IOPE5/EXWINT40

IOPE6/LPCPD/EXWIN45

IOPE7/CLKRUN/EXWINT46

IOPH0/A0/ENV0

IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1

IOPH4/A4/TRIS

IOPH5/A5/SHBM

IOPH6/A6
IOPH7/A7

IOPI0/D0
IOPI1/D1
IOPI2/D2

PORTI

IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7

IOPJ0/RD

IOPJ1/WR0

IOPK0/A8

IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12

IOPK5/A13/BE0
IOPK6/A14/BE1

IOPK7/A15/CBRD

IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19

IOPL4/WR1

NC212NC320NC421NC585NC686NC791NC892NC997NC10

NC1

11

C643
1U/10V

SELIO

IOPD4
IOPD5
IOPD6
IOPD7

C677
*.1U_4

TEMP_MBAT

81

AD0

TEMP_ABAT

82

AD1
AD2
AD3

DA0
DA1
DA2
DA3

98

83
84
87
88
89
90
93
94

99
100
101
102

32
33
36
37
38
39
40
43

153
154
162
163
164
165

168
169
170
171
172
175
176
1

26
29
30

2
44
24
25

124
125
126
127
128
131
132
133

138
139
140
141
144
145
146
147

150
151

152
41

42
54
55

143
142
135
134
130
129
121
120

113
112
104
103
48

T120

T118

WIRELESS_SW#
BLUETOOTH_SW#
SUSC#

CC-SET
CV-SET
CONTRAST
VFAN

BT1#
BT2#
BT3#
BT4#

TX_551
MBCLK

MBDATA
PLTRST#

REFON
LID591#

FANSIG
EC_FPBACK#
MAX6648_AL

PWROK_1

HOLD#
ACIN
591_PME#

NBSWON#
SUSB#
LPCPD#
CLKRUN#

ENV0
ENV1
BADDR0
BADDR1
TRIS
SHBM
A6
A7

D0
D1
D2
D3
D4
D5
D6
D7

RD#
WR#

M/A#
CELL-SET
D/C#
BL/C#

A8
A9
A10
A11
A12
A13
A14
A15

A16
A17
A18

R431 0_4

FOR 97551 ONLY

INTERNAL PULLUP IN SB

LAN_PME#<25>

M/A# <40>
CELL-SET < 39,40>
D/C# <39,40>
BL/C # <40>

TEMP_MBAT <40>
TEMP_ABAT <40>

WIRE LESS_SW# <30>
BLUETO OTH_SW# <30>
SUSC # <19>

CC-SET <39>
CV-SET <39>
CONTRAST <16>
VFAN <30>

AMP_MUTE# <28>
BT1# <30>
BT2# <30>
BT3# <30>
BT4# <30>

PWRLED# <30>
SUSLED# <30>

MBCLK < 3, 40>
MBDATA < 3,40>
PLTRST# <6,11,15,18,21,31,32,33>

REF ON <39>
LID591# <16,19>

FANS IG <30>
EC_FPBACK# <16>

ICH _PWRO K <19>

NBSWON# <30>

CLKRUN# <18,22,23,25,31>

R368
*4.7K_4

+3V_S5+3V_S5

2

1 3

2

D24

BAS316

Q35
PDTC143TT

MAX6648_AL

21

3V_ALWAYS

C680
10U/10V_8

Should have a 0.1uF capacitor close to every
GND-VCC pair + one larger cap on the supply.

+3V

R370

10K_4

HWPG <34,35,36,37 ,38>

+3V

R160
10K_4

3

Q22

2

2N7002

1

MAX6648_AL# <3>

DNB SWON# <19>

REV:C MODIFY

If Pin 24 is not pull-high,
System will not able to boot.

SUSB#

SUSB#<19>

ACIN

ACIN<39>

U24

12

A0

11

A1

10

A2

9

A3

8

A4

7

A5

6

A6

5

A7

27

A8

26

A9

23

A10

25

A11

4

A12

28

A13

29

A14

3

A15

2

A16

30

CS#

RD#

WR#

BIU configuration should match flash speed used

R371
*4.7K_4

591_PME#

A17

22

CE#

24

OE#

31

WE#

PLCC32

Size Doc u m en t N u m be r Re v

97551 & FLASH

Date: Sheet

C676

C654

.1U_4

.1U_4

ENV1

R443 10K_4

BADDR0

R444 *10K_4

BADDR1

R445 *10K_4

LPCPD#

R140 10K_4

SHBM

R446 10K_4

SHBM=1: Enable shared memory with host BIOS

BADDR1-0

0 0
0 1
1 0
1 1

MBCLK
MBDATA

WIRELESS_SW#
BLUETOOTH_SW#

NBSWON#

D20

2 1

D19

2 1

13

D0

14

D1

15

D2

17

D3

18

D4

19

D5

20

D6

21

D7

1

VPP

3V_ALWAYS

32

VCC

C48
.1U_4

16

GND

PROJECT : ZL2

Quanta Computer Inc.

3V_ALWAYS

C631
.1U_4

I/O Address

Index

2E
4E

(HCFGBAH, HCFGBAL)

Reserved

R145 4.7K_4
R149 4.7K_4

R365 4.7K_4
R364 4.7K_4

BAS316

BAS316

D0
D1
D2
D3
D4
D5
D6
D7

A18

1

C614
.1U_4

3V_ALWAYS

Data

2F
4F

(HCFGBAH, HCFGBAL)+1

3V_ALWAYS

3V_ALWAYS

R141
1K_4

3VH_591

13

2

Q20
PDTA124EU

HOLD#

R130
100K_4

29 41Tuesday, De ce m ber 21, 2004

of

+3V

F

5

INT K/B FAN CONTROL

MY15<29>
MY14<29>
MY13<29>
MY12<29>
MY11<29>
MY10<29>
MY9<29>
MY8<29>
MY7<29>
MY6<29>
MY5<29>

D D

MY4<29>
MY3<29>
MX7<29>
MX6<29>
MY2<29>
MX5<29>
MX4<29>
MX3<29>
MX2<29>
MY1<29>
MY0<29>
MX1<29>
MX0<29>

REVB P/N&FT CHANGE

MY15
MY14
MY13
MY12
MY11
MY10
MY9
MY8
MY7
MY6
MY5
MY4
MY3
MX7
MX6
MY2
MX5
MX4

MX2
MY1
MY0
MX1
MX0

CN5

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25

PTWO_KB

MX7
MX6
MX5
MY0
MY1
MY2
MX4
MY3
MY4
MY5
MY6
MY7
MY8
MX3
MY9
MX2
MX1
MY10
MY11
MX0

MY13
MY14
MY15

3V_ALWAYS

RP4

10

MY4

9

MY5

8

MY6

7 4

MY7

10KX8
RP6

10

9
8

MY14 MY8

7 4

MY15

3V_ALWAYS

MX4
MX5
MX6
MX7

10KX8
RP5

10

9
8
7 4

10KX8

4

MY3

1

MY2

2

MY1

3

MY0

56

MY11

1

MY10MY12

2

MY9MY13

3
56

MX3MX3

1

MX2

2

MX1MY12

3

MX0

56

CA5 220PX4

MY1

1
3
5
7

CA9 220PX4

1
3
5
7

CA8 220PX4

1
3
5
7

2
4
6
8

2
4
6
8

2
4
6
8

MY2
MX4
MY3

MY12
MY13
MY14
MY15

MX1
MY10 MX5
MY11
MX0

CA6 220PX4

1
3
5
7

CA7 220PX4

1
3
5
7

CA4 220PX4

1
3
5
7

3

MY7

2

MY6

4

MY5

6

MY4

8

MX2

2

MY9

4

MX3

6

MY8

8

MY0

2
4

MX6

6

MX7

8

+12V

VFAN<29>

C575
.1U/25V_8

+12V

84

3

+

2

-

R49 3.9K/F
R52
3K

1

U26A
LM358ADR

5
6

+5VFAN

2

U26B

LM358ADR

+

7

-

R47

10

+5V

65241

65241

Q13
AO6402

3

FAN_PWR

C59
10U/10V_8

Q33
*AO6402

3

+12V

3

1

R338
*100K_4

2

Q34
*2N7002

1

D: CHANGED FROM 10K

E: DEPOP R338, Q33, Q34

MAX6648_OV# <3>

FANSIG<29>

30 MIL

+3V

R44
10K_4

CN19

1
2
345

FAN

TOUCH PAD

20 MIL

L43

+5V

C C

R154
10K_4

TBDATA<29>

TBCLK<29>

BK2125HS330

R155
10K_4

LZA10-2ACB104MT
L41
L42

LZA10-2ACB104MT

+5V_TP

C314 .1U_4

C316
*.1U_4

C317
*.1U_4

REVB P/N&FT CHANGE

CN8

1

TP_DATA
TP_CLK

2
3
4
5
6

PTWO_TOUCHPAD

3V_ALWAYS

R609 330_4
R610 330_4

R611 330_4
R612 330_4

-PWRLED

-SUSLED

-BATLED0

-BATLED1

B CHANGE LED RESISTORS FROM 200 TO 680 OHM

+3V

B B

NUMLED#<29>

A A

EMAIL_LED#<19>

5

4

NUMLED#

EMAIL_LED#

R32

330_4

3

2

1

+3V

R33

330_4

3

2

1

B MODIFY

LED3

LED_G/Y_LTST-C155GYKT

LED2

LED_G/Y_LTST-C155GYKT

NUMLED

2N7002
Q9

EMAIL_LED

2N7002
Q11

B: CHANGE FROM +3VSUS

135

7

PWRLED# <29>
SUSLED# <29>

BATLED0# <29>
BATLED1# <29>

+3V

+5V

R23
10K_4

IDELED#<21>

-HDD0_LED<18>

3

IDELED#

+3V

R223
SA@10K_4

CAPSLED#<29>

CAPSLED#

R31

330_4

IDE_LED

3

2N7002

2

Q8

1

3

Q7
SA@2N7002

2

1

+3V

R34

330_4

CAPSLED

3

2N7002

2

Q10

1

2

EMAIL_LED

IDE_LED
CAPSLED
NUMLED

WIRELESS_SW#<29>

BLUETOOTH_SW#<29>

WIRELESS_LED<22>

BT_LED<22>

CA3

*220PX4

246

8

C40
*.1U_4

WIRELESS_SW#

BLUETOOTH_SW#

Size Document Number Re v

Date: Sheet

CN3

QTC_LED_14P

SW3

MISAKI_SWITCH_WL

SW4

MISAKI_SWITCH_BT

R309 330_4

R310 330_4

PWRLED2

1314

BT1#

1112

BT2#

910

BT3#

78

BT4#NBSWON#

56
34
12

2

2

PROJECT : ZL2

Quanta Computer Inc.

T/P,FAN, S W ITCH,LED,K/B

1

7

8

1
3
4

1
3
4

R17 200

135

CA2

*220PX4

246

LED4

LED_Y_LTST-C190KFKT

LED5

LED_B_LTST-C190TBKT

30 41Tuesday, December 21, 2004

BT1# <29>
BT2# <29>
BT3# <29>
BT4# <29>NBSWON#<29>

21

21

of

+3V

F

5

D D

LPC_PD#<19,23>

+5V

C C

B B

R19

C35

*22_4

*10P_4

RN4

4

3

2

1

4P2R_4.7K
RN3

4

3

2

1

4P2R_4.7K
RN2

4

3

2

1

4P2R_4.7K

R21 4.7K_4
R12 4.7K_4

R16 4.7K_4
R24 4.7K_4
R25 4.7K_4
R15 4.7K_4
R26 4.7K_4
R27 4.7K_4
R18 4.7K_4
R13 4.7K_4
R14 4.7K_4

C891 * 180P_4
C892 * 180P_4
C893 * 180P_4
C894 * 180P_4
C895 * 180P_4
C896 * 180P_4
C897 * 180P_4
C898 * 180P_4
C899 * 180P_4
C900 * 180P_4
C901 * 180P_4
C902 * 180P_4
C903 * 180P_4
C904 * 180P_4
C905 * 180P_4
C906 * 180P_4
C907 * 180P_4

PCLK_SIO

D18

*BAS316

PD0
PD1

PD2
PD4

PD5
PD6

PD3
PD7

SLCT
ERROR#
SLIN#
PE
INIT#
AFD#
STRB#
ACK#
BUSY

R333
10K_4

21

PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
SLCT
ERROR#
SLIN#
PE
INIT#
AFD#
STRB#
ACK#
BUSY

LAD0/FWH0<18,29>
LAD1/FWH1<18,29>
LAD2/FWH2<18,29>
LAD3/FWH3<18,29>

+3V

PCLK_SIO<2>

LPC_DRQ0#<18>

LFRAME#/FWH4<18,29>

PLTRST#<6,11,15,18,21,29,32,33>

SERIRQ<18,19,22,23,29>

CLKRUN#<18,22,23,25,29>

INIT#<33>

ERROR#<33>

BUSY<33>

AFD#<33>
ACK#<33>

STRB#<33>

SLIN#<33>

SLCT<33>

PD[0..7]<33>

LAD0/FWH0
LAD1/FWH1
LAD2/FWH2
LAD3/FWH3
PCLK_SIO
LPC_DRQ0#
LFRAME#/FWH4
PLTRST#
SERIRQ
SUS_STAT_3V#LPC_PD#
CLKRUN#

INIT#

ERROR#

BUSY
AFD#
ACK#
STRB#

SLIN#

SLCT
PE

PE<33>

PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0

4

U2

42

LAD0

46

LAD1

51

LAD2

53

LAD3

33

LCLK

22

LDRQ/XOR_OUT

38

LFRAME

35

LRESET

36

SERIRQ

29

LPCPD/GPIO21

27

CLKRUN/GPO22

56

INIT

54

ERR

26

BUSY_WAIT

57

AFD_DSTRB/TRIS

28

ACK/GPO24

14

STB_WRITE/TEST

55

SLIN_ASTRB

24

SLCT

25

PE

30

PD7/PGIO23

34

PD6

37

PD5

39

PD4

6

PD3

43

PD2

50

PD1

52

PD0

PC87383

2

17

NC1NC

NC18NC

NS PC87383

VSS12VSS31VSS44VCORF

13

C36
.1U_4

45

VDD11VDD32VDD

NC47NC48NC

C38
.1U_4

GPIO00
GPIO01
GPIO02
GPIO20
GPIO03
GPIO04
GPIO05
GPIO06
GPIO07

CLKIN

IRRX1

CTS1/GPIO11

DCD1/GPIO16

DSR1/GPIO15
RTS1/GPIO13

SIN1/GPIO14

SOUT1/GPIO12

NC

49

64

IRTX

RI1/GPIO10

IRRX2_IRSL0/GPIO17

DTR1_BOUT1/BADDR

3

+3V

C37

C39

.1U_4

10U/10V_8

2

1

STRAP PINS

15
16
19
23
20
21
40
7
41

14M_SIO

58

R20

IRRX

8

IRTXOUT

9

IRMODE

10

3
59
60
62
61
63
5
4

10K_4

MCTS1# <33>
MDCD1# <33>
MDSR1# <33>
MRTS1# <33>
MRXD1 <33>
MTXD1 <33>
MRI1 <33>
MDTR1# <33>

+3V

R28
18nH_4

C41
6P_4

B: INSTALL
D: ADD EMI SOLUTION

E: C41 CHANGE TO 6p (CH00606TB04)

MDTR1#
MRTS1#
MTXD1

14M_SIO <2>

R22 *10K_4
R29 *10K_4
R30 *10K_4

IRTXOUT
IRRX
IRMODE

U51

3

TXD

4

RXD

5

SD

8

GND

VISHAY_TF D U 6102_8P

6

VCC

7

MODE

2

LED_C

1

LED_A

B: REMOVE C889

+3V

T = 20mil

C531

C532

.1U_4

10U/10V_8

T = 20mil

R306 5.6_1206_5%
R307 5.6_1206_5%

C533
10U/10V_8

+5V

C521
10U/10V_8

A A

Size Document Number Re v

EZ PORT & SIO (87383)

5

4

3

2

Date: Sheet

PROJECT : ZL2

Quanta Computer Inc.

31 41Tuesday, December 21, 2004

1

of

F

5

+1.5V

D D

SUSCLK<19>

PLTRST#

C790
N@.1U_4

HOLE4
*H-C276D118P2

3

Q46
N@2N7002

C810
N@.1U_4

HOLE3
*H-C276D118P2

2

6,11,15,18,21,29,31,33>

C C

B B

HOLE2
*H-C276D118P2

+3V_S5

+3V+12V

1

C802
N@.1U_4

HOLE6
*H-C276D118P2

+3V

R560
*150K

OZ_SCLK

C500
N@.1U_4

HOLE8
*H-C276D118P2

+1.5V+3V+3V_S5

C498
N@.1U_4

4

U44
N@OZ2710

11

1.5VIN1

13

1.5VIN2

4

3.3V1

6

3.3V2

1

AUX_IN

2

RST#

8

CLK32K

PCLK_SMB<2,19,25,33>

HOLE11
*H-C276D118P2

1.5VOUT1

1.5VOUT2

3.3VOUT1

3.3VOUT2
AUX_OUT

CPERST#

PDAT_SMB<2,19,25,33>

HOLE14
*H-C276D118P2

CPUSB#

CPPE#

GND1

10
12

5
7

16
14

15
3

9

Q26 N@2N7002

+NEW_1.5V

+NEW_3V

+NEW_3VAUX
CPUSB#

CPPE#

PERST# PERST#

+NEW_3V

2

3

Q25 N@2N7002

+NEW_3V

2

3

HOLE18
*H-C276D118P2

R548

N@10K_4

2

4

1

3

1

1

HOLE19
*H-C276D118P2

3

+3V_S5

RP3

N@4P2R-S-10K

NEW_SMDATA

NEW_SMCLK

R537

N@10K_4

PAD3
*EMIPAD

E: REVERSE RX AND TX

PCIE_TXP0<19>
PCIE_TXN0<19>

PCIE_RXP0<19>
PCIE_RXN0<19>

CLK_PCIE_NEWC<2>
CLK_PCIE_NEWC#<2>

NEW_CLKREQ#<2>

PAD7

PAD4

PAD2

*EMIPAD

*EMIPAD

*EMIPAD

USBP1+<19>
USBP1-<19>

+NEW_3VAUX

+NEW_3V

PAD8
*EMIPAD

2

C429

C474
N@.1U_4

C471

N@4.7U/10V_8

PAD9
*EMIPAD

N@.1U_4

C431

CPPE#

+NEW_3V

+NEW_3VAUX
+NEW_1.5V
NEW_SMDATA

NEW_SMCLK

CPUSB#

USBP1- USBP1+

N@10P_4

C454
N@.1U_4

PAD16
*EMIPAD

N@.1U_4

C506

PAD6
*EMIPAD

PERP0
PERN0

+NEW_1.5V

C452
N@.1U_4

PAD18
*EMIPAD

26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

C502

N@10P_4

PAD19
*EMIPAD

CN10

1

GND29
GND30

29
30

C496
N@.1U_4

PAD22
*EMIPAD

GND1
PETp0
PETn0
GND2
PERp0
PERn0
GND3
REFCLK+
REFCLK­CPPE#
CLKREQ#
+3.3V1
+3.3V2
PERST#
+3.3VAUX
WAKE#
+1.5V1
+1.5V2
SMB_DATA
SMB_CLK
RESERVED1
RESERVED2
CPUSB#
USB_D+
USB_D­GND4

N@331-1CX43201-ZG-X2

C493

N@4.7U/10V_8

PAD20
*EMIPAD

1

1

HOLE20
*H-C276D118P2

1

A A

HOLE12
*H-C236D138P2

1

1

HOLE26
*H-C276D118P2

1

HOLE9
I@H-C236D138P2

1

1

HOLE25
*H-C276D118P2

1

HOLE15
I@H-C236D138P2

1

1

HOLE24
*H-C276D118P2

1

1

HOLE22
*H-C276D118P2

1

HOLE17
H-C335D157P2-BOT

1

VGA

5

1

HOLE13
H-C335D157P2-BOT

1

1

HOLE7
*H-C197D118P2

1

HOLE16
H-C335D157P2-BOT

1

CPU HEATSINK MODEM BD SW BD

4

1

1

B: DEL HOLE23

HOLE10
*H-C177D59P2-BOT

1

HOLE21
H-C276D157P2-TOP

1

3

1

PAD11

PAD10

*EMIPAD

*EMIPAD

1

HOLE5
H-C177D59I99P2-TOP

1

1

1

PAD13

PAD14

*EMIPAD

*EMIPAD

1

1

AUDGND AUDGND

1

1

PAD15

PAD12

*EMIPAD

*EMIPAD

1

1

1

2

1

PAD21

PAD17

*EMIPAD

*EMIPAD

1

Size Document Number Rev

EZ PORT & SIO (87383)

Date: Sheet

1

1

PAD23
*EMIPAD

1

1

PAD24

PAD25

*EMIPAD

*EMIPAD

1

1

PROJECT : ZL2

Quanta Computer Inc.

1

1

1

PAD5
*EMIPAD

1

1

32 41Tuesday, December 21, 2004

of

F

5

CN16-4

100MBPS#<25,26>
ACT#<25,26>

KPCLK<29>

HPSENCE_PR<28>

LINEINR_PR<27>

PR_MIC_IN<27>

SPDIF_OUT<27,28>

SPKR_SYS<28>

SPKL_SYS<28>

LINEINL_PR<27>

KPDATA<29>
MSCLK<29>
MSDATA<29>

MDSR1#<31>

MRTS1#<31>

MCTS1#<31>
MRI1<31>
MDCD1#<31>

MRXD1<31>

MTXD1<31>

MDTR1#<31>

AUDGND1

PR_MIC<27>

AUDGND1

D D

100MBPS#

ACT#

SUSON_PR
MAINON_PR
DOCKPRG

KPCLK
KPDATA
MSCLK
MSDATA

MDSR1#
MRTS1#
MCTS1#
MRI1
MDCD1#
MRXD1
MTXD1
MDTR1#

SPKR_SYS
SPKL_SYS
LINEINR_PR
LINEINL_PR
PR_MIC

B: DOCKING CIRCUITS MODIFIED

C C

DOCKIN#

B B

A A

D: ADD EMI SOLUTION

2

Q52

D@2N7002

SPKL_SYS
SPKR_SYS
LINEINL_PR
LINEINR_PR
PR_MIC_IN
PR_MIC
100MBPS#
ACT#
TV_COMP_PR
TV_C/R_PR
TV_Y/G_PR

8

LANLED_LINK

31

LANLED_ACT

33

GND33

55

SUSON

56

MAINON

85

BRG_PWROK

52

PS2KBCK

51

PS2KBDT

54

PS2MSCK

53

PS2MSDT

48

DSR#

46

RTS#

44

CTS#

42

RI

49

DCD#

47

RXD#

45

TXD#

43

DTR#

50

GND50

41

SPDIF_OUT

72

AGND72

74

LINEOUT_R

75

LINEOUT_L

70

LINEIN_R

71

LINEIN_L

73

MICIN

76

AGND76

69

PRMIC_DET

40

HPSENSE_PR

124

G2

D@EZ4_Acer_define

+3V_S5

R613

D@10K_4

DOCKIN

3

1

C543 D@220P_4
C542 D@220P_4
C27 D@220P_4
C28 D@220P_4
C13 D@47P_4
C23 D@47P_4

C22 D@10P_4
C21 D@10P_4

R641 *330_4

CLK­CLK+

DOCKPRG

D@1000P_4C14
D@1000P_4C17
D@10P_4C20

D@EZ4_Acer_define

+3V_S5

1
2

R614

D@1M

CN16-3

GND100

TV_COMPS

TV_LUMA

TV_CRMA

GND104

STRB#

PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7

PE

AFD#

ERROR#

INIT#

SLIN#

ACK#

BUSY

SLCT

GND58
GND77

GND110

RESERVE32
RESERVE82

G1

GND126

C911
D@.1U_4

53

4

U53
D@TC7SH08FU

PR_CRTHSYNC
PR_CRTVSYNC
PR_BLU
PR_GRN
PR_RED
CRTHSYNC
CRTVSYNC

DDCCLK_1
DDCDAT_1
X-TX1P-PR
X-TX1N-PR
X-TX0P-PR
X-TX0N-PR
X-TX3P-PR
X-TX3N-PR
X-TX2P-PR
X-TX2N-PR

TX0-

TX0+

4

100

TV_COMP_PR

101

TV_Y/G_PR

102

TV_C/R_PR

103
104

STRB#

9

PD0

11

PD1

13

PD2

15

PD3

17

PD4

18

PD5

19

PD6

20

PD7

21

PE

24

AFD#

10

ERROR#

12

INIT#

14

SLIN#

16

ACK#

22

BUSY

23

SLCT

25
58

77
110

32
82

123
126

AUDGND1

C544 *10P_4
C545 *10P_4
C24 D@10P_4
C25 D@10P_4
C26 D@10P_4
C549 *10P_4
C550 *10P_4

C547 D@10P_4
C546 D@10P_4
C16 D@10P_4
C15 D@10P_4
C18 D@10P_4
C19 D@10P_4
C539 D@10P_4
C540 D@10P_4
C537 D@10P_4
C538 D@10P_4

R642 *330_4

TV_COMP_PR <16>
TV_Y/G_PR <16>

TV_C/R_PR <16>

STRB# <31>

PE <31>
AFD# <31>
ERROR# <31>
INIT# <31>
SLIN# <31>
ACK# <31>
BUSY <31>
SLCT <31>

+5V

C921
D@.1U_4

R7 D@0_4

TMDS_DDCDATA<11,15>

PR_STS <19,29>

TMDS_DDCCLK<11,15>

3

L63
D@BK1608LL121

L11D@BK1608LL680
L10D@BK1608LL680
L9D@BK1608LL680

PR_CRTHSYNC
PR_CRTVSYNC

PR_RED

PR_GRN

PR_BLU

VGA_RED_PR<17>
VGA_GRN_PR<17>

VGA_BLU_PR<17>

E: CHANGE FOR EMI

PD[0..7] <31>

PLTRST#<6,11,15,18,21,29,31,32>
LUSB1# <18>

L62
D@BK1608LL121

PCIE_TXP1<19>
PCIE_TXN1<19>

PCIE_RXP1<19>
PCIE_RXN1<19>

PCIE_TXP2<19>
PCIE_TXN2<19>

PCIE_RXP2<19>
PCIE_RXN2<19>

D@BAS316

21

LUSB2#<18,19>

PDAT_SMB<2,19,25,32>
PCLK_SMB<2,19,25,32>

EZ_CLKREQ#<2>

CRTHSYNC

CRTVSYNC
DDCCLK_1
DDCDAT_1

CRTHSYNC<17>
CRTVSYNC<17>

DDCCLK_1<17>
DDCDAT_1<17>

CLK_PCIE_EZ1<2>
CLK_PCIE_EZ1#<2>

CLK_PCIE_EZ2<2>
CLK_PCIE_EZ2#<2>

D4

E: ADD FOR EZ4

VA

+3V

R330

2.2K_4

1

Q3

D@2N7002

+3V

R329

2.2K_4 C912

1

Q4

D@2N7002

+5V

R325

D@10K_4

2

TMDS_DDCDATA_5V

3

+5V

R324

D@10K_4

C536
D@.1U/50V

2

TMDS_DDCCLK_5V

3

E: POP C24,25,26 FOR EMI

DOCKIN#<26>

R320
D@100K_4

+3V_S5

DOCKIN#

C541
D@.1U_4

Q6

D@2N7002

B: CHANGED FROM 10K

CN16-2

78

CRT_HS

79

CRT_VS

81

CRT_DDCK

80

CRT_DDCDT

105

GND105

106

VGA_R

107

VGA_G

108

VGA_B

109

GND109

117

GND117

119

PCIE1_CLK+

120

PCIE1_CLK-

118

GND118

115

PCIE1_TP

116

PCIE1_TN

114

GND114

111

PCIE1_RP

112

PCIE1_RN

113

GND113

29

PCIE2_CLK+

30

PCIE2_CLK-

27

GND27

59

PCIE2_TP

60

PCIE2_TN

28

GND28

89

PCIE2_RP

90

PCIE2_RN

88

GND88

57

PCIERST

26

PCIEWAKE

86

PCIESMBDT

83

PCIESMBCK

87

PCIEREQ#

122

P2

125

GND125

D@EZ4_Acer_define

VA

C548
D@.1U/50V

+5V

R11

D@10K_4

3

2

1

2

DVI_HPD

DVI_CLK-

DVI_CLK+

DVI_D0-

DVI_D0+

DVI_D1-

DVI_D1+

DVI_D2-

DVI_D2+

DVI_DDCCK
DVI_DDCDT

DOCK_IN#

DOCKED#

D@EZ4_Acer_define

B: DOCKING CIRCUITS MODIFIED

SUSON_PR

MAINON_PR

U52A
D@7W125FU

PR_INSERT_5V <16,17>

CN16-1

GND99

GND96

GND93

GND63

GND66

TX3P
TX3N

GND39

TX2P
TX2N

GND36

TX1P
TX1N

GND6

TX0P

TX0N
GND3
GND7

P1

7

U52B
D@7W125FU

+3V_S5

1

84

64

CLK-

98

CLK+

97
99

TX0-

94

TX0+

95
96

TX1-

91

TX1+

92
93

TX2-

61

TX2+

62
63

TMDS_DDCCLK_5V

67

TMDS_DDCDATA_5V

65
66

37
38
39
34
35
36
4
5
6
1
2
3
7

DOCKIN#

68

R321 D@1K_4

84

121

DOCKIN#

53

DOCKIN#

D@.1U_4

26

X-TX3P-PR
X-TX3N-PR

X-TX2P-PR
X-TX2N-PR

X-TX1P-PR
X-TX1N-PR

X-TX0P-PR
X-TX0N-PR

CLK- <11,15>
CLK+ <11,15>

TX0- <11,15>
TX0+ <11,15>

TX1- <11,15>
TX1+ <11,15>

TX2- <11,15>
TX2+ <11,15>

1

R326
100K_4

X-TX3P-PR <26>
X-TX3N-PR <26>

X-TX2P-PR <26>
X-TX2N-PR <26>

X-TX1P-PR <26>
X-TX1N-PR <26>

X-TX0P-PR <26>
X-TX0N-PR <26>

VA

SUSON <29,35,36>

MAINON <29,35,36,37,38>

TMDS_HPD <11,15>

R644 *330_4

TX1-

TX1+

E: RESERVE FOR EMI REQUEST

5

4

3

2

Size Document Number Rev

EZ PORT & SIO (87383)

Date: Sheet

PROJECT : ZL2

Quanta Computer Inc.

33 41Tuesday, December 21, 2004

1

of

F

5

4

3

2

1

D D

HWPG<29,35,36,37,38>

IMVP_PWRGD<6,19>

CLK_EN#<2>

CPU_VID0<4>
CPU_VID1<4>
CPU_VID2<4>
CPU_VID3<4>
CPU_VID4<4>
CPU_VID5<4>

C C

DPRSLPVR<19>
STP_CPU#<2,19>

VRON<29>

B B

A A

OCP = 28A

5

+3V

12

PR138
*10K

1907VCC

1907B0
1907B1
1907B2

PC51 .22U

12

PR124
301K/F

12

PR123

49.9K/F

12

PR136

2.2K_4

PR34

12

0

PR139

PR125

0
PR132

62K/F

1 2

PC133 270P

1907REF

12

12

PR134
10K

12

0

12

12

12

PC132
100P

PC52

1 2

10U/6.3V

36
37
38

26
25
24
23
22
21

6
5
4

1
2
3

35
20

7

39

12

8

9

27

PU13

SYSPOK
IMVP_OK
CLK_EN

D0
D1
D2
D3
D4
D5

S2
S1
S0

B0
B1
B2

SUS
DPSLP
SHDN

TIME

CC

REF

ILIM
DD

MAX1907A

1907VCC

10

VCC

PR37

5VPCU

PC135

12

1 2

10

13

PGND

POS

30

VDD

GND

TON

OA+

CSN

CSP

NEG

BST

OA-

10U/6.3V

V+

DH

LX

DL

FB

4

VIN_1907A

34
31

33

32

29

11
28

40

17
16

15
19

18

14

21

1907BST

MAX1907DH

MAX1907LX

1907VCC

PR30

12

*10K

OPEN:300KHz

1907FB

12

PC134
1000P_4

1907FB

12

PR33

1.24K/F

12

PR131
100K/F

PD10
BAS316

PC67

12

.1U/50V

1

43

PQ59
FDD6688

1

PR137

VCC_CORE

12

200

PR135

CM+

12

200

D: CHANGE SETTING

SUSPEND MODE (SUS=HIGH)
S2

S1 S0 Output
VCCOPEN 0.748VGND

43

PQ57

FDD6035AL

1

12

12

PR31
*0

43

PR133

1.5K/F

PC62
.1U/50V

PQ58
FDD6688

PD24
SKS30-04A

2 1

12

PC58

100P

12

PR126
0

1907B1 1907B01907B2

12

PR32
*NC

D: CHANGE SETTING

3

PC137
10U/25V-T

PL20

0.6UH

12

PC64

220P

12

PR35

1 2

750/F

PR36

1 2

1K/F

PR128
0

VCC_BOOT
B2

B1
GNDGND

OPEN

OPEN
VCC

VCC

VCC

REF

VIN_1907A

PC172
10U/25V-T

12

PR29
*0

12

PR127
*NC

B0 Output
GND
REFREFREF
OPEN
VCC

PL19

N20122PS800
PC176
10U/25V-T

CM+

0.001-2512

12

REV:B MODIFY

1.708V

1.372V

1.036V

0.700V

1.212VVCC

PR140

PR129
0

VIN

PC136

10U/25V-T

25A

VCC_CORE

+

+

+

PC60
.1U/50V

PC76

PC142

470U/2V

470U/2V

1907REF1907VCC 1907VCC1907REF1907VCC1907REF

12

PR28
*0

12

PR130
*NC

2

PC82

PC61
.1U/50V

*470U/2.5V

D5

D4 D3 D2 D1 OutputD0

1

0

00000000
1
1
1
1

0

1

0
1

0

0
1

0

011
1

0

0

1

1

0

0

1
1

0

0

1

0

0

1

1
1

0

0

1
1

001

1
1

0

1

1

0

1

1

1

1

1

1

1

0000

1

1

1

1

0

1

1

000

1

1

1

0

1

1

0

1

1

1

0

1

1

1

0

1

1

1

0

1

1

1

0

1

1

1

0

1

1

1

0

1

1

1

1

1

1

1

1

1

1

11

1

1

1

1

1

1

Size Document Number Rev

CPU CORE (MAX1907)

Date: Sheet

1.196V

1.180V

1

1.164V

11000000

0

1.148V

1

1.132V

0

0

1.116V

0

1

1.100V

1

0

1.084V

1

1

1.068V

0

0

1.052V

0

1

1.036V

1

0

1.020V

1

1

1.004V

0

0

0.988V

0

1

0.972V

1

0

0.956V

1

1

0

0.940V

0

0

0.924V

1

1

0.908V

0

1

1

0.892V

0

0

0.876V

0

1

0.860V

1

0

0.844V

1

1

0.828V

0

0.812V

0

1

0

0.796V

0

1

0.780V

1

1

0.764V

0

0

0.748V

1

0

0.732V

0

1

0.716V

1

1

0.700V

PROJECT : ZL2

Quanta Computer Inc.

D3

D4
0

0

0

0

0

0
0

0
0

0

0

0

0

0

0

0

0
0

0

0
0

0

0

1

0
0

0

1

0

0

1

0

0

01

0

0

1

0

0

1

0

0

0

1

0

0

1

0

1

0

0

1
1

0

0
0

0

1

0

0

1

0

0

1

0

1

0

0

1

1

1

0

1

0

10

1

0

1

1

0

1

1

0

1

1

0

1

1

0

1

1

D2
0

0
0
1
1
1
1
0
0
001
0
1
1
1
1
0
00
0
0
1
1
1
1
0
0

0
1
1
1
11

34 41Tuesday, December 21, 2004

D1

D0 OutputD5
0

0
00

1
0

1

1

1

0

0
001
1

0

1

1

0

0
1

0

0
111
0

0
0

1

0

1

1

1
0

0

1

0

0

1
1

1
0

0
0

1
1

0

1

1

0

0

1

0

0

1
1

111.276V

0

0
0

0

1

1

1

of

1.708V

1.692V

1.676V

1.660V

1.644V

1.628V

1.612V

1.596V

1.580V

1.564V

1.548V

1.532V

1.516V

1.500V

1.484V

1.468V

1.452V

1.436V

1.420V

1.404V

1.388V

1.372V

1.356V

1.340V

1.324V

1.308V

1.292V

1.260V

1.244V

1.228V

1.212V

F

A

PR55

PC77

*6.81K/F

*100P

D: CHANGE FROM 12K/F

PR56
0

4 4

MAX6648_OV#<3,30>

PR50
10K/F

PR47
100K/F

3 3

ILIM3

C913
1U/10V

5VPCU

MAX6648_OV#

REF2V

PR49

3.16K/F

ILIM5

PR46
200K/F

HWPG<29,34,36,37,38>

MAIND

PR60

100K

PR143 0

1999VCC

2

3V_ALWAYS

PR148 0

3

PQ23
2N7002

1

PR142
*100K

VL

PR40
47

VL

PR144

PR145 0

D

1999VCC

SKIP_SEL

3

2

PQ22
2N7002

1

B

PD25

2 1

ZD5.6V

PR249

3.3K

1999_SHT#<3>

D

PC72
1U/10V

1 2

1999VCC

1 2

PC141 1U/10V

ILIM3
ILIM5

0

PR147 100K

PU14

17

REF2V

8
5

11

7
9

3VON VIN1999

3

5VON

4
23
12

2

1
25
13

PR146
*0

VCC
REF
ILIM3
ILIM5
FB3
FB5
ON3
ON5
GND
SKIP
PGOOD
N.C.
LDO3
TON

SHDN

MAX1999

OUT3

BST3

LDO5

BST5

OUT5

DH3

LX3

DL3

PRO

DL5

LX5

DH5

12

PC69
1U/25V-X6S

PR42

100K/F

PC171 .22U

22
26
27
28
24
6
20

V+

18
10
19
14
15
16
21

12

VIN1999

D

1999_SHT#

PR38

1 2

4.7

1999LX3
1999DH3

1999DL3

VL

12

PC68
10U/25V-T

1999BST3

3

1999BST5
1999LX5
1999DH5

1999DL5

12

PC43
.1U/50V

12

2

1

PQ20
AO4912

PC70
.1U/50V

PD9
DAP202U

12

C

PC138
.1U/50V

D

3V_ALWAYS

5VPCU

PC30
1000P

VIN

PC31
.1U/50V

MAIND
SUSD

MAIND
SUSD

VIN1999-3

PC49

+

*10U/25V-X6S

PC53
.1U/50V

STQ125A-7322A

PL18

3R8UH

43

PL15

12

PC42

+

10U/25V-T

12

PC57

+

10U/25V-T

1999LX15

21

PC29
.1U/50V

VIN1999-5

12

PC56

+

10U/25V-T

PD8

2 1

EP05FA20

330U/6.3V-7343

PL8

N20122PS800

PC28

PC130
330U/4V

15V

12

+

PC55

+

10U/25V-T

+

12

123

4

D1

D1 S1/D2

G2

S2

G1

876

5

123

4

D1

D1 S1/D2

G2

S2

G1

PQ54
AO4912

876

5

PC46
.1U/50V

PC131
10U/10V

PC36
10U/10V

PL7

N20122PS800

VIN

PC44
1000P_4

PC40
.1U/50V

PC139
.1U/50V

3V_ALWAYS

876

123

5VPCU

876

123

E

5

PQ19
AO4812

4

+3VSUS

PC66
.1U/50V

+3V

PC65
.1U/50V

5

PQ11
AO4812

4

+5VSUS

PC25
.1U/50V

+5V

PC24
.1U/50V

VGA1.2V

PR162
E@22-0805

3

2

PQ67

E@2N7002

1

+VCCP +1.2V VCC_CORE +1.8V

PR87

PR88

1M

1M

PR73

22-0805

3

2

PQ33
2N7002

1

3

2

1

SUSON<29,33,36>

PR14

E@22-0805

PQ10

E@2N7002

PQ38
2N7002

PR79

22-0805

3

2

1

3

2

PQ44
2N7002

1

PR92

22-0805

PQ37
2N7002

3

2

1

3

2

1

PR86

1M

PQ40

PDTC143TT

1 3

3

PQ12
E@2N7002

1

PR18

E@22-0805

PR81

1M

3

2

1

2

PR13

22-0805

3

1

PQ9
2N7002

2

2

PQ36
2N7002

PR94

22-0805

PQ42
2N7002

PR82

22-0805

3

2

1

PR91

22-0805

3

2

PQ43
2N7002

1

C: DEPOP WHEN INT. VGA

Size Doc u m en t N u m be r Re v

5V/3.3V(MA X1999)

D

Date: Sheet

3

1

PR72
22-0805

2

PQ61

2N7002

PR20 1K/F

PR21 0

+3V_S5

2

3

1

PR150
22-0805

15V

PQ60
2N7002

3 1

12

PC38

+

10U/25V-T

B

12VOUT

2

PQ15
MMBT3906

3

1

PR141
1M

12VOUT

PC78
2200P

PC48
.1U/50V

MAINON<29,33,36,37,38>

3V_ALWAYS+1. 5V_S5

PC80

3

.1U/50V

2

PQ24
SI2304

1

+3V_S5

PC81
.1U/50V

PQ48

PDTC143TT

MAINON

2

+12V

1 3

C

PR25

220K

2

1 3

3

PQ17
IRLML5103

PQ18
PDTC143TT

1

2

VIN

2 2

PQ62

PDTC143TT

S5_ON<29,37>

REF2V

1 1

PR23

15K

1000P_4

5

+

7

6

-

PU4B
LM358ADR

A

2

PC39

PR26

20K/F

PR149
1M

PR151

2

PQ32

1M

PU4A
LM358ADR

1

2N7002

PC34 .1U/50V

PR22 1K/F

PR24 100K/F

PC47 1000P_4

1 3

84

3

+

2

-

12VOUT+3VSUSVIN +2.5VSUS +5VSUS

PQ39
2N7002

PR80

1M

3

2

1

12VOUT+5VVIN +1.5V +3V+2.5V

PR84

3

2

PQ46
2N7002

1

SUSD

PC98

2200P

1M

MAIND <36,37>

PC101

2200P

PR78

22-0805

PR93

22-0805

PQ45
2N7002

PROJECT : ZL2

Quanta Computer Inc.

of

E

35 41Tuesday, De ce m ber 21, 2004

F

1

2

3

4

5

VIN2V5

PC165

5VPCU

A A

12

PC105

4.7U/6.3V-8

HWPG<29,34,35,37,38>
SUSON<29,33,35>

B B

PR97 0

PR98 34K/F

PR95
100K/F

PC107
.1U/50V

PC168 4.7U/6.3V-8

VCCA-2V5

PC103
1U/10V

12

PR101
22

VCCA-2V5

1714REF-2V5

PR160 *0

14
15
18
10

16

3
6
2
7

8

PU10

VDD
VCC
SKIP
PGOOD
SHDN
ILIM
N/C
REF
TON
AGND

MAX1714A

BST

PGND
N/C_1
N/C_2

OUT

V+

DH

LX
DL

FB

17

PR100 2.2

19
1
20
13
12
9
11
5
4

DH-2V5
LX-2V5
DL-2V5

PR99
15K/F

PR96
10K/F

21

PD14
BAS316

PC106 .1U/50V-8

PC104
.1U/50V

1

1

43

PQ65

SUD50N03-09P

43

PQ66

SUD50N03-09P

.1U/50V

PL24 3R6UH

PD28
SKS30-04A

2 1

12

PC164
10U/25V-T

PL23

N20122PS800

+

PC169
560U/4V

VIN

PC166
.1U/50V

12

PC167

+

10U/10V

+

PC173
560U/4V

+2.5VSUS

+1.25VSUS

PC160
.1U/50V

+1.25V

+

+

PC162
10U/10V

PC159
*100U/2V-7343

Size Document Number Rev

2.5VSUS / +1.25TERM

Date: Sheet

PROJECT : ZL2

Quanta Computer Inc.

36 41Tuesday, December 21, 2004

5

of

F

241

PQ41
AO4414

PC92
.1U/50V

+2.5VSUS

+2.5V

PC96
.1U/50V

2
5
6

7

G2996

PU16

SD
VDDQ
AVIN

PVIN

GND1TGND

VREF

VSENSE

VTT

9

4

3
8

+2.5VSUS

3

PR159 0

+2.5V

PC94
10U/6.3V

+

MAINON<29,33,35,37,38>

2

+

PC174
10U/10V

PC163
.1U/50V

4

578

C C

MAIND<35,37>

3 6

D D

1

5

4

3

2

1

VIN1845

1

2

PD13

4

V+

MAX1845

9

DAP202U

1845VCC

22

VDD

VCC

BST1

DH1

LX1
DL1

CS1

OUT1

FB1

TON

REF

SKIP

GND

OVP8UVP

PR156

10

21
25
26
27
24
28
1
2
5

10
6

23

1845BST1

1845DH1
1845LX1

1845DL1

1845FB1

1845REF

3

PC100
1U/10V

5VPCU

12

PC158

4.7U/6.3V-8

PC97
*100P

PR154

5.1K/F

PR155
10K/F

SI4392DY

PC95

.1U/50V-8

PQ31

1

SUD50N03-09P

1845REF

PR83

60.4K/F

PR85
100K/F

578

43

PQ35

1845ILIM1

3 6

241

PL25

1R5UH

*3R6UH

PD26
SKS30-04A

2 1

PC157
.1U/50V

12

PC93

+

10U/25V-T

PL22

3R6UH

43

PD27
SKS30-04A

2 1

PQ34

SUD50N03-09P

1

PQ47

43

SUD50N03-09P

1

HWPG<29,34,35,36,38>
S5_ON<29,35>

PR158

5.23K/F

PR157
100K/F

12

PC102
*100P

HWPG
S5_ON

PC161

.1U/50V-8

HWPG
S5_ON
MAINON

1845BST2

1845LX2
1845DH2

1845FB2

1845ILIM2
1845ILIM1

D D

1.05V

+VCCP

PC155

12

+

+

2 1

PC179

PD32

*SSM14-LOW VF

C C

*470U/2V

470U/2V

+

PC156
10U/10V

PU9

19
20
17
18
16
15
14

7
11
12

13

3

1845VCC

PC99

4.7U/6.3V-8

VIN1845

BST2
DL2
LX2
DH2
CS2
OUT2
FB2

PGOOD
ON1
ON2

ILIM2
ILIM1

PC90
.1U/50V

PL21

PR89
15K/F

1845ILIM2

PR90
14K/F

VIN1845

12

+

10U/25V-T

PC153
.1U/50V

PC91

PL11

N20122PS800

12

+

PC151
10U/10V

PC146

+

470U/2V

VIN

PC178

+

470U/2V

+1.5V_S5

PQ64

8
7

5

PD31
SSM14-LOW VF

2 1

MAIND<35,36>

AO4414

4

1
2
36

PC145

10U/10V

+1.5V

12

+

B B

MAINON<29,33,35,36,38>

+1.5V

12

PC150
E@2.2U/6.3V

A A

5

HWPG<29,34,35,36,38>

10/20 Modify

PU8

1

EN

2

IN

3

IN

4

IN

5

IN

6

POK

7

NC

E@MAX8527

15

OUT
OUT
OUT
OUT

GND
GND

14

NC

13
12
11
10
9

FB

8

4

PR74
E@14K/F-0603

PR77
E@10K/F-0603

VGA1.2V

2A

PC147

E@10U/4V

Size Document Number Rev

+1.5 / CPUIO

3

2

Date: Sheet

PROJECT : ZL2

Quanta Computer Inc.

37 41Tuesday, December 21, 2004

1

of

F

1

5VPCU

12

A A

HWPG<29,34,35,36,37>

MAINON<29,33,35,36,37>

B B

5VPCU

12

C C

PC41
E@10U/25V-T

PC26 E@4.7U/6.3V-8

HWPG
MAINON

PR19 E@34K/F

PR17
E@100K/F

PC75
E@10U/25V-T

HWPG

PR57

E@15K

PR58
E@100K/F

PC32
E@.1U/50V

12

VCC-1.8

PC33
E@1U/10V

PC73
E@.1U/50V

12

PC140 E@4.7U/6.3V-8

VCC-VGA

PC79
E@1U/10V

PR120
E@22

VCC-1.8

1714REF-1.8

PR119 *0

1714REF-VGA

PR59 *0

14
15
18
10

3
6
2
7

16

8

PR45
E@22

VCC-VGA

PU3

VDD
VCC
SKIP
PGOOD
SHDN
ILIM
N/C
REF
TON
AGND

E@MAX1714A

2

14
15
18
10

3
6
2
7

16

8

BST

PGND
N/C_1
N/C_2

OUT

PU5

VDD
VCC
SKIP
PGOOD
SHDN
ILIM
N/C
REF
TON
AGND

E@MAX1714A

17

V+

19
1

DH

20

LX

13

DL

12
9
11
5
4

FB

PR16

PGND
N/C_1
N/C_2

E@2.2

DH-1.8
LX-1.8
DL-1.8

PR118
E@16K/F

V+

BST

DH

LX

DL

OUT

FB

17

E@2.2

PR44

19

DH-VGA

1

LX-VGA

20

DL-VGA

13
12
9
11
5
4

PR51
E@2K/F

PR48
E@10K/F

21

PD6
E@BAS316

PC20 E@.1U/50V-8

PR121

E@100/F_4

PC128

E@2200P

3

21

PD11
E@BAS316

PC71 E@.1U/50V-8

PR54

E@100/F_4

PC74

E@2200P

PR250

*12.7K/F

PQ68
*2N7002E

43

1

43

1

1

1

3

2

12

1

PC177
*2.2U

PQ5

E@SUD50N03-09P

PQ6

E@SUD50N03-09P

43

PQ55

E@SUD50N03

43

PQ56

E@SUD50N03

+5V

PR251
*3.24K/F

PR252
*100

1 3

PL14

E@3R6UH

PD30
E@SKS30-04A

2 1

PL16

E@3R3UH

PD29
E@SKS30-04A

2 1

F: RESERVE PWR PLAY

PR51=2.2K; PR48=47K

HI=1.05V
LO=1.2V

2

VGA_PWR_SW <11>

PQ69
*DTC144EUA

VIN-VGACORE

PC22
E@.1U/50V

12

PC18
E@10U/25V-T

4

VIN-VGACORE

PC59
E@.1U/50V

E@470U/2.5V

PL4

E@N20122PS800

PC27

+

E@470U/2.5V

12

PC63
E@10U/25V-T

PC54

+

PL17

E@N20122PS800

PC50

+

E@470U/2.5V

VIN

PC37
E@.1U/50V

12

PC35

+

PC129
E@.1U/50V

E@10U/10V

VIN

12

PC45

+

E@10U/10V

D: ADD PC175

5

+1.2V

PC175
E@10P_4

+1.8V

D D

C: DEPOP WHEN INT. VGA

PR116
E@20K/F

1

2

3

4

Size Document Number Rev

+1.2V/+1.8V

Date: Sheet

PROJECT : ZL2

Quanta Computer Inc.

38 41Tuesday, December 21, 2004

5

of

F

8

7

6

5

4

3

2

1

D D

CN14

1
2
3
4

5

6

2DC-S726I201-V

POWER_JACK

C C

REFP

B B

PR9
22K

PC123
220P

PD16

RB500

PR113 47K

OSC
200KHz

1

PC108
.1U/50V

PC116
.1U/50V

PC109
.1U/50V

VAD

PD2

RB500

84

3

+

2

-

PU12A
LM393

PC110
.1U/50V

PR2
10K

5

PF3

1 2

TR/3216FF-6.5A

1 2

PF2

*TR/3216FF-6.5A

PC4 .01U/50V

4

PQ49
IMZ2

321 6

PR11
47K

PR112
10K

CV-SET<29>
CC-SET<29>

D/C#<29,40>

PL13

N20122PS800

PL12

N20122PS800

3

PD3
DA204U

D/C#

2

1

VA

PD15
BAS316

PC2
.1U/50V

2

REF3V

3

PQ50
*2N7002

1

VH

1
2

PD4 SBM 1040

CSIP
CSIN

LDO

BST

DHI

LX

DLO

REF

CLS

CSSP
CSSN

1772CELLS

PR111
10K

16

1772LDO

2
22
25

24
23
21
20
19

18

17
4

3

PR102
12K/F

PR3 18

PR7

0.02-3720
PR4 18

PR109
10K

PR110 33.2/F

1772BST

PD5 BAS316

PC117
.1U/50V

CSIP
CSIN

BAT-V

1772REF

PR103 24.3K/F

3

PC112

1 2

1U/25V-X6S

PU11

27

26

MAX1772EEI

1

DCIN

CELLS

CSSP

CSSN

PC120
1000P

PC119
.1U/50V

PC121
1000P

PR106
10K

PC118
.1U/50V

PR105
0

PC115
.01U/50V

PR104
10K

PC114
.01U/50V

DLOV

11

ACIN

15

VCTL

14

ICTL

13

REFIN

12

ACOK

10

ICHG

PGND

28

IINP

7

CCV

6

CCI

BATT

5

CCS

GND8GND

9

PC122

1 2

1U/25V-X6S

1772DH
1772LX

1772DL

PC11 .1U/50V

PC12 .1U/50V

PC14

1 2

1U/25V-X6S

PC113

1 2

1U/25V-X6S

PC17 .1U/50V

PQ7

G1

8
7
6
5

AO4912

PC19

+

10U/25V-T

PC15
.1U/50V

12

D1

D1S1/D2
G2

S2

1
2
3
4

PR107 18
PR108 18

PC13
.1U/50V

PL3
N20122PS800

PL2 1 0UH- SI L104

REFON<29>

VIN

PQ63

1 6
2
3

IMD2

5
4

VA2 <40>

PR8

0.05-3720

REFP

PC154

10U/10V

PC7
10U/25V-T

12

+

REFP <29,40>

VL

PU15

1
2

G914D

12

+

PC8

10U/25V-T

Vin
GND
SD3BP

PC6
10U/25V-T

PC143
.1U/50V

PC9
.01U/50V

REF3V

12

PC144
1U/10V

BAT-V <40>

REF3V <29,40>

5

Vout

4

12

+

FOR 120W 6.2A

12VOUT

ACIN<29>

PR64 10K/F

FOR 4S3P CELL-SET HIGH

AC

VAD

PR66

6.8K/F

A A

8

7

21

PD12 ZD12V

PR65
10K/F

6

FOR 3S3P CELL-SET LOW

3V_ALWAYS

CELL-SET<29,40>

5

2

PR10

PQ3
DTC144EU

1 3

1772LDO

3

1M

PQ4

2

2N7002

1

1772CELLS

Size Doc u m en t N u m be r Re v

BATTERY CHARGER

4

3

Date: Sheet

2

PROJECT : ZL2

Quanta Computer Inc.

of

39 41Tuesday, De ce m ber 21, 2004

1

F

1

2

3

4

5

1ST_BATT_CONN

CN17

1
2
3
4

8

5

9

6

A A

B B

7

SUYIN_BATTERY

MBAT
TEMP_MBAT

PR114

330

2 1

12

PC124
47P

PR115
330

MBDATA_MBAT

PD18
ZD5.6V

CLOSE TO BATTERY CON

REF3V

PR117
10K/F

TEMP_MBAT

12

PC126
.01U/50V

PC12547P

PC21.1U/50V

12

12

MBCLK <3,29>

PD19
ZD5.6V

2 1

2ND_BATT_CONN

12

MBCLK

PC86
SW@47P

TEMP_ABAT <29>

12

PC89
SW@.1U/50V

CN24

1
2
3
4

8

5

9

C C

6
7

SW@SUYIN_BATTERY

ABAT
TEMP_ABAT

PR152
SW@330

MBDATA_ABAT

PD21
SW@ZD5.6V

2 1

12

PC85
SW@47P

PR153
SW@330

2 1

PD22
SW@ZD5.6V

PD17ZD5.6V

2 1

TEMP_MBAT <29>

12

PC127
47P

10U/25V-T

PD23
SW@ZD5.6V

2 1

PC23

12

+

12

PC88
SW@47P

PL5 N20122PS800

PL6 N20122PS800

ADISCHG

PQ51
PDTC143TT

BAT-V<39>

PL10 SW@N20122PS800

PL9 SW@ N2012 2PS800

12

PC84

+

SW@10U/25V-T

MDISCHG

PQ28
PDTC143TT

2

12

2

PC10
.01U/50V

8
7
6
54

8

8

7

7

6

6

5 4

54

PQ16

8
7
6
5 4

AO4411

2 1

2 1

PQ29

AO4411

CELL-SET<29,39>

D/C#<29,39>
BL/C#<29>

PD7
ZD15V

PD20
ZD15V

1
2
3

470K

PR62

1
2
3

PR53

470K

200mil

1 3

PC83
.1U/50V

PR71
10K

1

7

2

PQ30
PDTC143TT

PR27
10K

PQ53

PDTC143TT

MDISCHG

2

1 3

VH

VH

PR61
1M

PU6A

84

LM358ADR

MCHG

3

+

2

-

1 2

VA2

REFP

PR5
160K/F

REF3V

PR6
120K/F

12

PC3

.01U/50V

VIN

PC5
.01U/50V

VA2 <39>

REFP <29,39>

+

-

PU6B
LM358ADR

5
6

ADISCHG

PC16
.1U/50V

VL

ACHG

PR52
100K

PU2

16

Y015Y114Y213Y312Y411Y510Y69Y7

VDD

A1B2C3GL4G16G2

5

74HCT237

7

8

GND

12

+

PC111
10U/25V-T

2

VH

1 3

PR63
10K

PQ25
PDTC143TT

VL

PR15

10K

PR12
100K

2

36

241

PQ2

AO4414

578

PU12B

5

+

7

6

-

LM393

3

PQ8
2N7002

1

PR67
10K

1
2
3

1
2
3

PR122
10K

4
3
2
1

PQ27

AO4411

PQ13

AO4411

MBAT+

3216

PQ52
IMD2

1 3

5

4

ACHG

5
6
7
8

PQ14 AO4812

ABAT+

3216

PQ26
IMD2

1 3

5

4

MCHG

CLOSE TO BATTERY CON

REF3V

D D

TEMP_ABAT

1

12

PR70
10K/F

PC87
.01U/50V

REF3V <29,39>

1ST_BATT

MBDATA_MBAT
MBDATA_ABAT

2ND_BATT

2

PR69
10K/F

PR68
10K/F

3V_ALWAYS

PR161

*0

PU7

5

VCC

1

IN_B1

3

COM

IN_B0

GND

SN74LVC1G3157DCKR

SEL
LOW

FUNCTION

IN_B0

HIGH IN_B1

6

SEL

4

2

M/A#

3

M/A# <29>

MBDATA <3,29>

4

Size Document Number Re v

BATTERY SELECT

Date: Sheet

PROJECT : ZL2

Quanta Computer Inc.

40 41Tuesday, December 21, 2004

5

of

F

5

MODEL: TO

ZL2

D D

MotherBoard

C C

REV:

CHANGE LIST:

B 2. UNSTUFF SSC COMPONENTS

C

1. CHANGE FREQ. SETTINGS FOR DOTHANB

PAGE2

1. REMOVE R449, PULL HIGH AT POWER SIDE

PAGE3

1. STUFF R432, R433 FOR AUTO-SELECT

PAGE4

1. STUFF R162 FOR DOTHAN-B

PAGE5

1. STUFF R147, R148, R151, R143, R152, R159 ALWAYS

PAGE6

1. NOT STUFF FILTER COMPONENTS WHEN EXT. VGA

PAGE8
PAGE9

1. STUFF R76, PCIE_TESTIN PULL LOW

PAGE12

1. ADD 220UF IN VGA1.2V

PAGE15

1. NOT STUFF R60, R63 WHEN NO DVO DEVICE 2. NOT STUFF DVO COMPONENTS WHEN NO DOCKING

PAGE16

1. CHANGE TV-OUT LC VALUES

PAGE18

1. ADD DAMPING ON LFRAME# FOR AUDIO NOISE 2. STUFF R469 AND UNSTUFF R467 FOR DOTHAN-B 3. NOT STUFF COMPONENTS FOR SATA WHEN NO SATA

PAGE19

1. NOT STUFF PCIE COMPONENTS WHEN NO PCIE DEVICES 2. CHANGE EMAIL LED GPIO 3. CHANGE MB_ID SETTING

PAGE21

1. REMOVE R50 2. CHANGE Q15 FROM BJT TO 2N7002

PAGE23

1. REMOVE RING FUNCTION

PAGE24

1. CHANGE 3IN1 CONNECTOR

PAGE25

1. CHANGE LED CONNECTION FOR 1G LAN 2. CORRECT U42 PIN.B11 PIN.C11 SHORT 3. CHANGE C741 AND C792'S SIZE FOR ME

PAGE26

1. UNINSTALL C210, C184, R87, R99 WHEN 10-100

PAGE27

1. INSERT 4700P IN BEEP SIGNALS 2. REMOVE SPK_PR FROM CODEC 3. CHANGE C863 TO 10U 4. REVERSE MIC-SELECT

PAGE28

1. CHANGE CONNECTION FOR SPKL-R TO EZ4

PAGE29

1. CHANGE PR_INSERT# TO PR_STS

PAGE30

1. CHANGE KB AND TP'S CONNECTOR 2. CHANGE LED CIRCUITS

PAGE31

1. REMOVE C889

PAGE33

1. MODIFY EZ4 INTERFACE
PAGE 35 1. INCREASE CAPACITOR PC171 NEAR PR42
PAGE 35
PAGE 40
PAGE 22
PAGE 39
PAGE 37
PAGE 17

DA0ZL2MB8C3

PAGE2
PAGE3
PAGE13
PAGE16
PAGE17
PAGE16, 17, 26 ADD 0 OHM RESISTORS TO SUBSTITUE SWITCHES WHEN NO DOCKING
PAGE25
PAGE27
PAGE28
PAGE29
PAGE24

PAGE 34
PAGE 35
PAGE 36

PAGE 37
PAGE 38 1. CHANGE MOSFET SUD50N03-09P TO PQ5 PQ6 PQ55 AND PQ56 2. TAKE OFF JUMP 3. CHANGE CHOKE PL16 TO 3R3UH 4.CHANGE CAPACITOR PC27 TO E@470U/2.5V
PAGE 39

3. INCREASE CAPACITOR C913

1. INCREASE RESISTOR PR161 NEAR PU7

1. REMOVE CHOKE PADS

1. TAKE OFF PQ50

1. CHANGE PU8 NET NAME TO +2.5V

1. CHANGE HSYNC& VSYNC'S BEADS TO 0 OHM

1. ADD PULLUPS ON CLKREQ PINS

1. ADD THEMAL SHUTDOWN CIURCUITS

1. CHANGE OPTIONS TO HYNIX MEMORY

1. DEPOP C558

1. CHANGE LC VALUES FOR RGB

1. CHANGE R531 TO 0 OHM 1. CHANGE R519 TO 1.2K/F

1. CHANGE C512, C511 TO .7UF 1. CHANGE R592 TO 100K

1. DEPOP Q28

1. CHANGE BATLED0,1# PINS TO IOPJ6,7

1. CHANGE 3-IN-1 CONNECTOR

1. INCREASE CAPACITOR PC172 10U/25V IN VIN_1907A 2. INCREASE SCHOTTKY DIODE PD24 SKS30-04A IN MAX1907LX .

1. INCREASE ZENER DIODE PD25 ZD5.6V SERIES WITH VIN1999 AND PR249 2. CHANGE NET NAME TO 1999_CHT#

1. CHANGE MOSFET SUD50N03-09P TO PQ65 PQ66 2. INCREASE CAPACITOR PC173 560U/4V IN +2.5VSUS 3. INCREASE CAPACITOR PC174
10U/10V IN +1.25VSUS 4. INSERT PR250 BETWEEN PU16 PIN2 AND PIN 5 .

1. CHANGE MOSFET SUD50N03-09P TO PQ34 PQ47 AND PQ35 2. TAKE OFF JUMP 3.CHANGE CAPACITOR PC155 PC146 TO 560U/4V

1. EXCHANGE NET NAME 3V_ALWAYS AND CELL-SET

2. STUFF AC TERMINATIONS FOR 14M_SIO

1. REMOVE 1394 CHOKE PADS

4. ADD DISCHARGE FOR VGA1.2V

PAGE 23,25,29,31 1. DEPOP RC FILTERS ON PCI CLOCKS

D

PAGE2

1. DEPOP R615

PAGE3

1. POP R449

B B

A A

Size Document Number Rev

CHANGE LIST

Date: Sheet

PAGE6

1. DEPOP RP7

PAGE16

1. LID SW FOOTPRINT CHANGED

PAGE19

1. ADD MB_ID3
PAGE21

1. CHANGE C82'S RATING TO 25V
PAGE28

1. PHONE JACK CHANGED TO SPDIF

PAGE30

1. CHANGE R338 TO 100K

PAGE31

1. CHANGE R28 AND C41'S VALUE

PAGE33

1. ADD EMI CAPS

PAGE34

1. ADD CAP PC176

PAGE35

1. CHANGE CAP PC69 COMPONENT

E

PAGE2
PAGE3,30
PAGE6
PAGE8
PAGE12
PAGE16
PAGE16
PAGE19
PAGE21
PAGE23
PAGE24
PAGE32

Change R200, R202, C915 value to pass EA
DEPOP COMPONENTS FOR MAX6648_OV#

1. DEPOP R186, R184
Add C918 to solve TV issue
Add C919,920, change L25,27,67

1. ADD LEVEL SHIFT FOR EDID
Change R8, R9, remove C9, C32 for pass Acer LCD
ADD 100K PULLLOW ON DPRSLPVR, change C428

1. CHANGE SWAP-ODD RESET

1. ADD PULL-LOW ON PCMSPK

1. ADD 33OHM CURRENT LIMIT ON VCC_XD

1. REVERSE RX AND TX

PROJECT : ZL2

Quanta Computer Inc.

5

2. ADD 47P ON 14M_SIO

41 41Tuesday, December 21, 2004

of

F

PROJECT : ZL2

MB ASSY'S P/N : 31ZL1MB0004

4

2. UNSTUFF ITP COMPONENTS

2. NOT STUFF DVO COMPONENTS WHEN NO DOCKING

2. STUFF R369, GPIO0 PULL HIGH 3. CHANGE CLK OUTPUT TO XTALIN 4. NOT STUFF DVI COMPONENTS WHEN NO DOCKING

2. CHANGE D10, D11 TO CH551

3. UNSTUFF COMPONENTS FOR DIFFERENT SKUS

3. STUFF R441 FOR THEMTRIP#

3

2

4. NOT STUFF AC TERMINATION FOR PCLK_ICH

2. ADD SPRINGS FOR MODEM CABLE

2. CHANGE COMPONENT PR38 SERIAL NUMBER FROM 0603 TO 1206

3. TAKE OFF PR39 PR43 PQ21 AND CHANGE NET NAME TO MAX6648_OV#

5. CHANGE R272 TO 0 OHM

2. CHANGE CAP PC72 CONNECT POINT 3. CHANGE RESISTOR PR147 COMPONENT

PAGE18
PAGE20
PAGE31
PAGE33

PAGE 35
PAGE 36
PAGE 37
PAGE 38
PAGE 39

4

Change GPIO pin define, add R645
D25 change to CH551
Change C41 to 6pF
Modify EZ4 pin define, add R641, 642, 644 for EMI

1. CHANGE PC68 COMPONENT.

1. CHANGE PR99 PD28 COMPONENT.

1. CHANGE PD26 PD27 COMPONENT. 2. CHANGE PR74 PR77 PU8 PC147 PC150 COMPONENT.

1. CHANGE PR51 COMPONENT.

1. CHANGE PQ7 COMPONENT.

APPROVE BY: SELMON LIU DRAWING BY:JOE LIN

PROJECT LEADER: SELMON LIU DOCUMENT NO:

3

2. CHANGE PD29 PD30 COMPONENT.

REV

DATE :2004/06/01

2

1

FROM

PAGE

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35

COVER SHEET 1 OF 1

1