QUANTA ZK8 Schematics

5

ZK8 BLOCK DIAGRAM

DDRII-SODIMM1

DDRII-SODIMM2

D D

LVDS CONN

LVDS(2ch)

C C

PG 7,8

PG 7,8

CRT CONN

PG 20

LVDS MUX*2

MXM 3.0 CONN

HDMI

SATA HDD

SATA ODD

PG 18

HDMI CONN

PG 25

PG 25

PI2EQX3201
eSATA reDriver

Type A

B B

eSATA CONN

PG 30

A A

Side port

PG 19PG 19

CRT MUX

CRT

PG 21

DDR II 667 MHZ

PG 9

PG 20

PCI-E X16

HDMI

SATA0

SATA4

PG 30

HT_LINK

LVDS(2ch)

CRT

A_LINK (X4)

SATA2

4

AMD S1g3

Caspian Processor

(638 S1g3 socket)

PG 4,5,6

RS880M

21mm X 21mm, 528pin BGA

PG 9,10,11,12

SB710

21mm X 21mm, 528pin BGA

4.5W(Ext)

4.3W(Int)

PG 13,14,15,16,17

LPC

EC

WPCE775

CPU_CLK
NBGFX_CLK
NBGPP_CLK
SBLINK_CLK

PCI-E, 1X (port4)

PCI-E, 1X (port2)

PCI-E, 1X (port3)

SBSRC_CLK

USB2.0 (P5)

USB2.0 (P9)

USB2.0 (P4)

USB2.0 (P10)

Azalia

MDC CONN

PG 26

3

CLOCK GENERATOR

ICS9LPRS476AKLFT
SLG8SP628VTR
RTM880N-795

GIGALAN
AR8131

Mini Card (WLAN)

MINI CARD (TV)

CCD

Fingerprint

Card Reader
RTS5159

Bluetooth

MDC
Board

PG 32

USB Board

RJ11

RJ45

PG 20

PG 31

PG 23

PG 3

PG 23PG 22

PG 24

PG 24

HOST 200MHz
PCIE 100MHz
USB 48MHz
REF 14MHz

USB2.0 (P3/11)

USB2.0 (P8)

USB2.0 (P1/2)

USB2.0 (P0)

Azalia Audio Codec

ALC888S

PORT-A

HP+Speaker
Amplifier
AN12947A

H.P/
SPDIF

PG 27

2

CPU_CORE0

CPU VDDNB_CORE

+NB_CORE

+2.5V
+1.5V
+1.1V_NB
+1.2V_S5

+1.2V

+1.8VSUS
+1.8V

+SMDDR_VTERM

+3VPCU
+3V_S5
+3VSUS
+3V
+5VPCU
+5V

USB2.0 MINI CARD Ports X2

(MB)

High speed EXT USB

(MB)

USB2.0 I/O Ports X2

(MB)

USB2.0 I/O Ports X1

PG 24

PG 30

PG 30

PG 30(DB)

PG 26

PORT-B

PG 27

INT.
S.P.

PG 27

MIC

Line in

JACK

Jack

PG 27 PG 27

CPU CORE

NB CORE

(1.0~1.2V)

+2.5V
+1.5V
+1.1V_NB
+1.2V_S5

+1.2V
+1.8VSUS

SMDDR
VTERM

3V/5V

Sub woofer Amp
MAX9737

Sub woofer

PG 27

PCB STACK UP

PG 35

LAYER 1 : TOP
LAYER 2 : GND
LAYER 3 : IN1

PG 36

LAYER 4 : IN2
LAYER 5 : VCC
LAYER 6 : BOT

PG 38

Daughter Board

MMB Board

PG 38

USB Board

PG 37

Touch Pad board

Touch Pad board
(with Fingerprinter)

PG 34

Power Buttom board

Programming Buttom
board

Digital MIC

PG 27

1

01

SPI

Quanta Computer Inc.

Quanta Computer Inc.

PWM FAN

PG 31

5

Keyboard

PG 31

4

Flash
ROM

PG 32 PG 31

Touch
Pad

CIR

PG 32

Palm Rest
thermal sensor

PG 32

3

Size Document Number Rev

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Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

BLOCK DIAGRAM

BLOCK DIAGRAM

BLOCK DIAGRAM

ZK8

ZK8

ZK8

1 42Monday, May 04, 2009

1 42Monday, May 04, 2009

1

1 42Monday, May 04, 2009

3A

3A

3A

5

4

3

2

1

ZK8 Power On Sequence

02

BOM naming rule

From AC,Battery VIN

D D

From Power Button

From PWM

From EC

SYS_HWPG(PCU)

NBSWON#

S5_ON

+3V_S5

+5VPCU +3VPCU

From EC
From EC
From SB

From SB to EC

From EC

+1.2V_S5

RSMRST#
DNBSWON#
PCIE_WAKE#
SUSB#,SUSC#

SUSON

30ms

>100ms

SUSON

+3VSUS +1.8VSUS SMDDR_VREF,SMDDR_VTERM

From PWM
From EC

C C

From LDO
From EC

HWPG_1.8V

MAINON

+5V +3V +2.5V +1.8V +1.5V

HWPG_1.5V

VRON

MAINON

MAINON

CPU_CORE0,CPU VDDNB_CORE

From PWM
From EC

CPU_COREPG(CPU)

+1.2V_ON

+1.2V,+NB_CORE,+1.1V_NB

HWPG_1V_NB,HWPG_NBCORE,HWPG_1.2VFrom PWM
HWPG

From EC

From SB

From SB

B B

From SB

From SB

From SB

PWROK_EC
SB_PWRGD_IN
WD_PWRGD

NB_PWRGD_IN(level shift)

CPU_PWRGD

PLTRST# ,PCIRST#
CPU_LDT_RST#
CPU_LDT_STOP#

0~30ns

99ms~108ms

102ms~113ms

1.9ms~2.3ms

>1us

Items Function BTO Name Description

CIR

1

HDMI port

2

HDMI transmitter

3

HDMI-CEC

4

Discrete VGA

5

UMA

6

New Card

7

RJ11

8

RJ45-10/100

9

RJ45-1000

10

Option for RJ45-10/100 and RJ45-1000

11

TV

12

Cardbus

13

FM transmitter

14

Mainstream ID LED

15

Low cost ID LED

16

CCD

17

INT MIC

18

AMD Hyper Flash

19

North bridge(690MC/RS780MC)

20

North bridge(RX780)

21

PowerXpress

22

PowerXpress with UMA SKU

23

PowerXpress with Discrete VGA SKU

24

Power player/Power Shift

25

CIR@

v

HDM@

v

SI@

v

CEC@

v

EV@

IV@

NEW@

MD@

v

40@

55@

40@55@

TV@

v

CB@

FM@

v

MID@

LID@

CCD@

v

I_MIC@

v

HF@

MC@

RX@

PX@

PX@IV@

PX@EV@

PP@

Silicon image SiI 1392/1932

Renesas R8C/1B

External VGA stuff

Internal VGA stuff

Modem

Marvell 8040T(10/100)

Marvell 8055(Giga)

Option for 8040/8055

Only for AMD platform

Only for AMD platform

Only for AMD platform

Only for AMD platform

Only for AMD platform

Only for AMD platform

Only for AMD platform

*Note: EC will sampling SUSB# &
SUSC# every 5ms.

AMD SB710 SMBUS Table

CLK GEN RAM Mini Card TV) Mini-card(WL) LAN

SB710 SDATA0/SCLK0(+3V)

A A

SB710 SDATA1/SCLK1(+3V_S5)
SB710 SDATA2/SCLK2(+3V_S5)
Power
Reserve MOS ckt

5

V

+3V +3V +3V +3V (Atheros)

X X

+3V

VVV

4

VVVV

EC775 SDATA1/SCLK1(+3VPCU)
EC775 SDATA2/SCLK2(+3VPCU)
EC775 SDATA3/SCLK3(+3VPCU)
EC775 SDATA4/SCLK4(+3VPCU)
Power
Reserve MOS ckt

3

Battery CPU thermal Sensor EC EEPROM VGA thermal Sensor MMB

V

+3VPCU +3V +3VPCU +3V +3VPCU

X X X

EC SMBUS Table

V V

V

X X

2

V

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

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Date: Sheet of

Date: Sheet of

Date: Sheet of

PROJECT :

SYSTEM INFORMATION

SYSTEM INFORMATION

SYSTEM INFORMATION

1

ZK8

ZK8

ZK8

2 42Monday, May 04, 2009

2 42Monday, May 04, 2009

2 42Monday, May 04, 2009

3A

3A

3A

5

CLK_GEN_SLG8SP628(CLK)

4

3

2

1

03

+3V

2

1

Q32

Q32
*2N7002E

*2N7002E

1

4

3

1

RP38

RP38
*4.7KX2

*4.7KX2

CGCLK_SMB

CGDAT_SMB

D D

Q31

Q31

2

*2N7002E

*2N7002E

PCLK_SMB7,8,14,24

PDAT_SMB7,8,14,24

3

R258 0_4R258 0_4

+3V

2

3

R274 0_4R274 0_4

Add 0216

BK1608HS600/500mA/60ohm_6

BK1608HS600/500mA/60ohm_6

C C

R96

R96

*10K_4

*10K_4

CLKREQ3#

R104

R104

*10K_4

*10K_4

CLKREQ2#

R92

R92

*10K_4

*10K_4

CLKREQ4#

B B

+3V_CLK_VDD

R108 8.2K_4R108 8.2K_4

NBGFX_CLKP
NBGFX_CLKN

MXM_REFCLKP
MXM_REFCLKN

A A

NBGPP_CLKP
NBGPP_CLKN

SBLINK_CLKP
SBLINK_CLKN RP1003 STUFF RP1003 STUFF

+3V

Q8

Q8

*RHU002N06

*RHU002N06

2

+3V

*RHU002N06

*RHU002N06

2

+3V

*RHU002N06

*RHU002N06

2

CLK_PD#

3

Q9

Q9

3

Q5

Q5

3

Add 0216

1

1

1

Add 0226

CLKREQ_TV# 24

CLKREQ_WLAN# 24

CLKREQ_LAN# 22

RX780 RS780CLOCKS name

RP1001 STUFF

RP66 STUFF to M82-S external reference clock -RX780 only

RP1001 STUFF

RP66 NC

RP1005 STUFF RP1005 NC

5

+3V +3V_CLK_VDD +1.2V +1.2V_CLK_VDDIO

L56

L56

BK1608HS600/500mA/60ohm_6

L16

L16

C160

C160

2.2U/6.3V_6

2.2U/6.3V_6

+3V_CLK_VDD

BK1608HS600/500mA/60ohm_6

+3V_CLK_48

C158

C158

0.1u/10V_4

0.1u/10V_4

R463 *0_6R463 *0_6

C163 33p/50V_4C163 33p/50V_4

33p/50V_4

33p/50V_4
C162

C162

+1.2V_CLK_VDDIO

T6T6
T17T17

1 2

1 2

C549

C549
10u/10V_8

10u/10V_8

+3V_CLK_VDD+3V

CG_XIN
CG_XOUT

CGCLK_SMB
CGDAT_SMB

CLK_PD#

CLKREQ0#
CLKREQ1#
CLKREQ2#
CLKREQ3#
CLKREQ4#

21

Y2

Y2

14.318MHZ

14.318MHZ

C559

C559

0.1u/10V_4

0.1u/10V_4

CG_XIN

CG_XOUT

Clock pin function

to NB for VGA reference clock

to NB for RX780 for PCIEX2 interface reference clock only
RS780 is internal share with AC-LINK clock,RS780 not need

to NB for AC-LINK reference clock

4

C563

C557

C557

0.1u/10V_4

0.1u/10V_4

C553

C553

0.1u/10V_4

0.1u/10V_4

C555

C555

0.1u/10V_4

0.1u/10V_4

C563

0.1u/10V_4

0.1u/10V_4

ICS9LPRS480 P/N : ALPRS480000

SLG8SP628

RTM880N-796

U11

U11

4

VDDDOT

16

VDDSRC

26

VDDATIG

35

VDDSB_SRC

40

VDDSATA

48

VDDCPU

55

VDDHTT

56

VDDREF

63

VDD48

11

VDDSRC_IO0

17

VDDSRC_IO1

25

VDDATIG_IO

34

VDDSB_SRC_IO

47

VDDCPU_IO

1

GND48

7

GNDDOT

10

GNDSRC0

18

GNDSRC1

24

GNDATIG

33

GNDSB_SRC

43

GNDSATA

46

GNDCPU

52

GNDHTT

60

GNDREF

61

X1

62

X2

2

SMBCLK

3

SMBDAT

51

PD#

23

CLKREQ0#

45

CLKREQ1#

44

CLKREQ2#

39

CLKREQ3#

38

CLKREQ4#

SLG8SP628

SLG8SP628

P/N : AL8SP628000

P/N : AL000880000

CPUK8_0T

CPUK8_0C

ATIG0T
ATIG0C
ATIG1T
ATIG1C

SB_SRC0T
SB_SRC0C
SB_SRC1T
SB_SRC1C

SRC0T
SRC0C
SRC1T
SRC1C
SRC2T

QFN64

QFN64

TGND065TGND166TGND267TGND368TGND469TGND570TGND671TGND772TGND873TGND9

+3V_CLK_VDD

SRC2C
SRC3T
SRC3C
SRC4T
SRC4C

SRC6T/SATAT

SRC6C/SATAC

SRC7T/27M_SS

SRC7C/27M_NS

HTT0T/66M

HTT0C/66M

48MHz_0

REF0/SEL_HTT66

REF1/SEL_SATA

REF2/SEL_27

74

10/17 Add 10p for EMI issue (Suggestion by Seligo)

R109

R109

8.2K_4

8.2K_4

R110

R110

R115

R115

8.2K_4

8.2K_4

*8.2K_4

*8.2K_4

C560

C550

C550

0.1u/10V_4

0.1u/10V_4

50
49

30
29
28
27

37
36
32
31

22
21
20
19
15
14
13
12
9
8

42
41
6
5

54
53

64

59
58
57

R119

R119

8.2K_4

8.2K_4

CLK_48M_USB_R

SEL_SATA
SEL_HTT66
SEL_27

C560

C551

C551

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

MXM_REFCLKP_R CLK_MXM
MXM_REFCLKN_R

NBGPP_CLKP_R
NBGPP_CLKN_R

T4T4
T7T7

T10T10
T9T9
T11T11
T12T12

SEL_HTT66
SEL_SATA

C175

C175
*10p/50V_4

*10p/50V_4

3

RP1 EV@0_4P2RRP1 EV@0_4P2R

R117 158/F_4R117 158/F_4
R118 90.9/F_4R118 90.9/F_4

C155

C155
*10p/50V_4

*10p/50V_4

SEL_HTT66

SEL_SATA

SEL_27

BK1608HS600/500mA/60ohm_6

BK1608HS600/500mA/60ohm_6

Clock chip has internal serial terminations
for differencial pairs, external resistors are
reserved for debug purpose.

Place within 0.5"
of CLKGEN

2

1

4

3

T5T5
T8T8

B2A to C3A

R98 *22_4R98 *22_4
R102 22_4R102 22_4
R101 *22_4R101 *22_4

R452 33_4R452 33_4

Ra

Rb

RES CHIP 130 1/16W +-1%(0402)L-F -->CS11302FB15
RES CHIP 158 1/16W +-1%(0402) -->CS11582FB00
RES CHIP 90.9 1/16W +-1%(0402) -->CS09092FB15
RES CHIP 82.5 1/16W +-1%(0402) -->CS08252FB11

1

*0 100 MHz differential HTT clock
1*
0
1
0*

* default

L58

L58

C568

C568
10u/10V_8

10u/10V_8

R113

R113

*261/F_4

*261/F_4

NBGFX_CLKP
NBGFX_CLKN

CLK_MXM#

SBLINK_CLKP
SBLINK_CLKN
SBSRC_CLKP
SBSRC_CLKN

CLK_PCIE_MINI1
CLK_PCIE_MINI1#
CLK_PCIE_TV
CLK_PCIE_TV#
CLK_PCIE_LAN
CLK_PCIE_LAN#

NBHT_REFCLKP
NBHT_REFCLKN

CLK_48M_USB

EXT_NB_OSCSEL_27

RS780RX780

1.8V

82.5RRa

130RRb

66 MHz 3.3V single ended HTT clock

100 MHz non-spreading differential SRC clock
100 MHz spreading differential SRC clock
27MHz and 27M SS outputs
100 MHz SRC clock

1.1V

158R

90.9R

C564

C564

0.1u/10V_4

0.1u/10V_4

CPUCLKP
CPUCLKN

CLK_Card48 30
CLK_48M_USB 14
LAN_48 22

SB_OSC 13
EXT_NB_OSC 11

2

C562

0.1u/10V_4

0.1u/10V_4

Add 0217 14.318M for SB

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

CPUCLKP 4
CPUCLKN 4

NBGFX_CLKP 11
NBGFX_CLKN 11

CLK_MXM 18
CLK_MXM# 18

SBLINK_CLKP 11
SBLINK_CLKN 11
SBSRC_CLKP 13
SBSRC_CLKN 13

CLK_PCIE_MINI1 24
CLK_PCIE_MINI1# 24
CLK_PCIE_TV 24
CLK_PCIE_TV# 24
CLK_PCIE_LAN 22
CLK_PCIE_LAN# 22

NBHT_REFCLKP 11
NBHT_REFCLKN 11

To SB
To LAN

To NB

RS780/RX780 for VGA

NB CLOCK INPUT TABLE

NB CLOCKS
HT_REFCLKP
HT_REFCLKN
REFCLK_P
REFCLK_N
GFX_REFCLK
GPP_REFCLK
GPPSB_REFCLK

Size Document Number Rev

Size Document Number Rev

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Date: Sheet of

Date: Sheet of

Date: Sheet

C552

C552

C565

C565

C562

C558

C561

C561

0.1u/10V_4

0.1u/10V_4

To CPU

To NB

To MXM

To NB
To SB

To Mini PCIE Slot
To Mini PCIE Slot
To LAN Controller

C558

0.1u/10V_4

0.1u/10V_4

To NB

RX780 RS780
100M DIFF
100M DIFF
14M SE (1.8V)
NC vref
100M DIFF
100M DIFF
100M DIFF

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

CLOCK GENERATOR_SLG8SP628

CLOCK GENERATOR_SLG8SP628

CLOCK GENERATOR_SLG8SP628

1

100M DIFF
100M DIFF
14M SE (1.1V)

100M DIFF(IN/OUT)*

NC or 100M DIFF OUTPUT

100M DIFF

ZK8

ZK8

ZK8

3 42Thursday, May 21, 2009

3 42Thursday, May 21, 2009

3 42Thursday, May 21, 2009

3A

3A

3A

of

5

change 0212

C496 10U/6.3V_6C496 10U/6.3V_6
C497 10U/6.3V_6C497 10U/6.3V_6
C498 0.22U/6.3V_4C498 0.22U/6.3V_4
C499 180p/50V_4C499 180p/50V_4

CNTR_VREF

CPU_LDT_REQ# 11

C511

C511

*100p/50V_4

*100p/50V_4

+2.5V

HT_NB_CPU_CAD_H0
HT_NB_CPU_CAD_L0
HT_NB_CPU_CAD_H1
HT_NB_CPU_CAD_L1
HT_NB_CPU_CAD_H2
HT_NB_CPU_CAD_L2
HT_NB_CPU_CAD_H3
HT_NB_CPU_CAD_L3
HT_NB_CPU_CAD_H4
HT_NB_CPU_CAD_L4
HT_NB_CPU_CAD_H5
HT_NB_CPU_CAD_L5
HT_NB_CPU_CAD_H6
HT_NB_CPU_CAD_L6
HT_NB_CPU_CAD_H7
HT_NB_CPU_CAD_L7
HT_NB_CPU_CAD_H8
HT_NB_CPU_CAD_L8
HT_NB_CPU_CAD_H9
HT_NB_CPU_CAD_L9
HT_NB_CPU_CAD_H10
HT_NB_CPU_CAD_L10
HT_NB_CPU_CAD_H11
HT_NB_CPU_CAD_L11
HT_NB_CPU_CAD_H12
HT_NB_CPU_CAD_L12
HT_NB_CPU_CAD_H13
HT_NB_CPU_CAD_L13
HT_NB_CPU_CAD_H14
HT_NB_CPU_CAD_L14
HT_NB_CPU_CAD_H15
HT_NB_CPU_CAD_L15

HT_NB_CPU_CLK_H0
HT_NB_CPU_CLK_L0
HT_NB_CPU_CLK_H1
HT_NB_CPU_CLK_L1

HT_NB_CPU_CTL_H0
HT_NB_CPU_CTL_L0
HT_NB_CPU_CTL_H1
HT_NB_CPU_CTL_L1

+1.2V +1.2V_VLDT

R407 SHORT_PADR407 SHORT_PAD
R404 SHORT_PADR404 SHORT_PAD

+1.2V_VLDT

B2A to C3A

D D

HT_NB_CPU_CAD_H[15..0]9
HT_NB_CPU_CAD_L[15..0]9
HT_NB_CPU_CLK_H[1..0]9
HT_NB_CPU_CLK_L[1..0]9
HT_NB_CPU_CTL_H[1..0]9
HT_NB_CPU_CTL_L[1..0]9
HT_CPU_NB_CAD_H[15..0]9
HT_CPU_NB_CAD_L[15..0]9
HT_CPU_NB_CLK_H[1..0]9
HT_CPU_NB_CLK_L[1..0]9
HT_CPU_NB_CTL_H[1..0]9
HT_CPU_NB_CTL_L[1..0]9

C C

+1.2V_VLDT

R406 *51_4R406 *51_4
R405 *51_4R405 *51_4

R428 20K/F_4R428 20K/F_4

+3V

CPU_LDT_REQ#_CPU

C508

C508

*100p/50V_4

*100p/50V_4

B B

HT_NB_CPU_CAD_H[15..0]
HT_NB_CPU_CAD_L[15..0]

HT_NB_CPU_CLK_H[1..0]

HT_NB_CPU_CLK_L[1..0]

HT_NB_CPU_CTL_H[1..0]

HT_NB_CPU_CTL_L[1..0]
HT_CPU_NB_CAD_H[15..0]
HT_CPU_NB_CAD_L[15..0]

HT_CPU_NB_CLK_H[1..0]

HT_CPU_NB_CLK_L[1..0]

HT_CPU_NB_CTL_H[1..0]

HT_CPU_NB_CTL_L[1..0]

HT_NB_CPU_CTL_H1
HT_NB_CPU_CTL_L1

CNTR_VREF

C512 0.1U/10V_4C512 0.1U/10V_4

R427 34.8K/F_4R427 34.8K/F_4

2

Q41 *BSS138_NL/SOT23Q41 *BSS138_NL/SOT23

1

3

R425 *0_6R425 *0_6

C220

C220

10U/6.3V_8

10U/6.3V_8

+1.2V_VLDT
+1.2V_VLDT
+1.2V_VLDT
+1.2V_VLDT

CNTR_VREF

BLM21PG221SN1D

BLM21PG221SN1D

C222

C222

180p/50V_4

180p/50V_4

add 0223

CPU_LDT_RST#

L28

L28

LS0805-100M-N

U22A

U22A

D1

VLDT_A0

D2

VLDT_A1

D3

VLDT_A2

D4

VLDT_A3

E3

L0_CADIN_H0

E2

L0_CADIN_L0

E1

L0_CADIN_H1

F1

L0_CADIN_L1

G3

L0_CADIN_H2

G2

L0_CADIN_L2

G1

L0_CADIN_H3

H1

L0_CADIN_L3

J1

L0_CADIN_H4

K1

L0_CADIN_L4

L3

L0_CADIN_H5

L2

L0_CADIN_L5

L1

L0_CADIN_H6

M1

L0_CADIN_L6

N3

L0_CADIN_H7

N2

L0_CADIN_L7

E5

L0_CADIN_H8

F5

L0_CADIN_L8

F3

L0_CADIN_H9

F4

L0_CADIN_L9

G5

L0_CADIN_H10

H5

L0_CADIN_L10

H3

L0_CADIN_H11

H4

L0_CADIN_L11

K3

L0_CADIN_H12

K4

L0_CADIN_L12

L5

L0_CADIN_H13

M5

L0_CADIN_L13

M3

L0_CADIN_H14

M4

L0_CADIN_L14

N5

L0_CADIN_H15

P5

L0_CADIN_L15

J3

L0_CLKIN_H0

J2

L0_CLKIN_L0

J5

L0_CLKIN_H1

K5

L0_CLKIN_L1

N1

L0_CTLIN_H0

P1

L0_CTLIN_L0

P3

L0_CTLIN_H1

P4

L0_CTLIN_L1

SOCKET_638_PIN

SOCKET_638_PIN

12

G3

G3
*SHORT_ PAD1

*SHORT_ PAD1

for debug only

1/31 leakage issue ,add R687, no stuff R686

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

R189 *10K/F_4R189 *10K/F_4

R185 *300_4R185 *300_4

CPU_MEMHOT_L#

R388 10K/F_4R388 10K/F_4

R401 300_4R401 300_4

CPU_PROCHOT_L#

0225
unstuff for S1g3 CPU not support this function

2

2

Q40

Q40

1 3

MMBT3904

MMBT3904

R390 0_4R390 0_4

Q25

Q25
*MMBT3904

*MMBT3904

13

CPU_MEMHOT#

+3V

CPU_PROCHOT_SB# 13

3/19 double check

CPU_MEMHOT# 8,14,32

R389

R389

*10K_4

*10K_4

EC_PROCHOT# 32

+1.8VSUS

3/19 double check

CPU_THERMTRIP_L#

HDT Connector

CN17

CN17

1

A A

T50T50

5

GND1

3

RSVD1

5

RSVD0

7

DBREQ_L

9

DBRDY

11

TCK

13

TMS

15

TDI

17

TRST_L

19

TDO

21

VCC_PROC_IO_21

23

VCC_PROC_IO_23

KEY

KEY

ASP-68200-07-25P-LDV

ASP-68200-07-25P-LDV

GND2
GND4
GND6

GND8
GND10
GND12
GND14
GND16
GND18
GND20
GND22

RESET_L

GND26

2
4
6
8
10
12
14
16
18
20
22
24
25

HWPG32

HT LINK

HT LINK

1

4

+CPUVDDA

C221

C221

4.7U/6.3V_6

4.7U/6.3V_6

L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9

L0_CADOUT_H10

L0_CADOUT_L10

L0_CADOUT_H11

L0_CADOUT_L11

L0_CADOUT_H12

L0_CADOUT_L12

L0_CADOUT_H13

L0_CADOUT_L13

L0_CADOUT_H14

L0_CADOUT_L14

L0_CADOUT_H15

L0_CADOUT_L15

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CLKOUT_H1

L0_CLKOUT_L1

L0_CTLOUT_H0

L0_CTLOUT_L0

L0_CTLOUT_H1

L0_CTLOUT_L1

2

+1.8VSUS

R402 300_4R402 300_4

4

W/S= 15 mil/20mil

C224

C224

0.22U/6.3V_4

0.22U/6.3V_4

VLDT_B0
VLDT_B1
VLDT_B2
VLDT_B3

+3V

3

Q42

Q42
BSS138_NL/SOT23

BSS138_NL/SOT23

3

2

1

2

1 3

Q39

Q39

MMBT3904

MMBT3904

3

C223
3300p/50V_4

3300p/50V_4

AMD Suggestion 3/29 modify

change 0212

+1.2V_VLDT

AE2

+1.2V_VLDT

AE3

+1.2V_VLDT CPU_SVC_R

AE4

+1.2V_VLDT

AE5

HT_CPU_NB_CAD_H0

AD1

HT_CPU_NB_CAD_L0

AC1

HT_CPU_NB_CAD_H1

AC2

HT_CPU_NB_CAD_L1

AC3

HT_CPU_NB_CAD_H2

AB1

HT_CPU_NB_CAD_L2

AA1

HT_CPU_NB_CAD_H3

AA2

HT_CPU_NB_CAD_L3

AA3

HT_CPU_NB_CAD_H4

W2

HT_CPU_NB_CAD_L4

W3

HT_CPU_NB_CAD_H5

V1

HT_CPU_NB_CAD_L5

U1

HT_CPU_NB_CAD_H6

U2

HT_CPU_NB_CAD_L6

U3

HT_CPU_NB_CAD_H7

T1

HT_CPU_NB_CAD_L7

R1

HT_CPU_NB_CAD_H8

AD4

HT_CPU_NB_CAD_L8

AD3

HT_CPU_NB_CAD_H9

AD5

HT_CPU_NB_CAD_L9

AC5

HT_CPU_NB_CAD_H10

AB4

HT_CPU_NB_CAD_L10

AB3

HT_CPU_NB_CAD_H11

AB5

HT_CPU_NB_CAD_L11

AA5

HT_CPU_NB_CAD_H12

Y5

HT_CPU_NB_CAD_L12

W5

HT_CPU_NB_CAD_H13

V4

HT_CPU_NB_CAD_L13

V3

HT_CPU_NB_CAD_H14

V5

HT_CPU_NB_CAD_L14

U5

HT_CPU_NB_CAD_H15

T4

HT_CPU_NB_CAD_L15

T3

HT_CPU_NB_CLK_H0

Y1

HT_CPU_NB_CLK_L0

W1

HT_CPU_NB_CLK_H1

Y4

HT_CPU_NB_CLK_L1

Y3

HT_CPU_NB_CTL_H0

R2

HT_CPU_NB_CTL_L0

R3

HT_CPU_NB_CTL_H1

T5

HT_CPU_NB_CTL_L1

R5

R426

R426
1K/F_4

1K/F_4

CPU_LDT_RST_HTPA#

Q38

Q38

FDV301N

FDV301N

R385

R385
1K_4

1K_4

R387 *0_6R387 *0_6

T144T144

0225 delete

R386 100K_6R386 100K_6

CPU_THERMTRIP# 14
SYS_SHDN# 34,39

CPU CLK

CPUCLKP3
CPUCLKN3

Keep trace from resisor to CPU within 0.6"
keep trace from caps to CPU within 1.2"

CPUCLKIN

C49510U/6.3V_6 C49510U/6.3V_6
C4940.22U/6.3V_4 C4940.22U/6.3V_4

CPUCLKP

C493180p/50V_4 C493180p/50V_4

CPUCLKN

SideBand Temp sense I2C

AMD Suggestion 3/29 modify

Add 0210

+1.8VSUS

R398 *300_4R398 *300_4

AMD Suggestion 3/29 modify

SB_SCLK314

SB_SDATA314

CPU Thermal monitor

CPUCLKP
CPUCLKN

CPU_LDT_RST#11,13

CPU_PWRGD13

CPU_LDT_STOP#11,13

CPU_VDD0_FB_H35
CPU_VDD0_FB_L35

CPU_VDD1_FB_L35

T28T28
T48T48
T47T47
T49T49
T45T45

+1.8VSUS
+1.8VSUS

SB_SCLK3

SB_SDATA3

R412 1K/F_4R412 1K/F_4
R417 1K/F_4R417 1K/F_4

R416 0_4R416 0_4
R414 0_4R414 0_4
R420 0_4R420 0_4

R418 *220_4R418 *220_4
R413 *220_4R413 *220_4
R421 *220_4R421 *220_4

CPUCLKIN#

R174 44.2/F_4R174 44.2/F_4
R173 44.2/F_4R173 44.2/F_4

place them to CPU within 1.5"

T46T46

CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI

R163 *510/F_4R163 *510/F_4
R162 510/F_4R162 510/F_4
R160 510/F_4R160 510/F_4

R159 *510/F_4R159 *510/F_4

R411 0_4R411 0_4

R394 *0_4R394 *0_4

R395 *0_4R395 *0_4

*BSS138_NL/SOT23

*BSS138_NL/SOT23

CPU_SVC

CPU_PWRGD_SVID_REG

+3V

R192

R192

*8.2K_4

*8.2K_4

+3V

10/30 change to G781

R410 169/F_4R410 169/F_4

C505 3900p/25V_4C505 3900p/25V_4
C504 3900p/25V_4C504 3900p/25V_4

+1.2V_VLDT

10/9 AMD suggest
remove MOS and connect directly

THERM_ALERT#_R

+1.8VSUS

CPU_SVC_R
CPU_SVD_R CPU_SVD
CPU_PWRGD

2ND_MBCLK18,32

2ND_MBDATA18,32

THERM_ALERT#15

CPUFAN#_ON31

3

+CPUVDDA

W/S= 15 mil/20mil

+CPUVDDA
+CPUVDDA

CPUCLKIN
CPUCLKIN#

CPU_LDT_RST#
CPU_PWRGD
CPU_LDT_STOP#
CPU_LDT_REQ#_CPU

CPU_SIC
CPU_SID
CPU_ALERT

CPU_HTREF0
CPU_HTREF1

CPU_VDD1_FB_H

CPU_VDD1_FB_L

CPUTEST23

R392300_4 R392300_4

CPUTEST18

R172*300_4 R172*300_4

CPUTEST19

R157*300_4 R157*300_4

CPUTEST25H

CPUTEST25H
CPUTEST25L

CPUTEST25L

CPUTEST21

R184300_4 R184300_4

CPUTEST20

R396300_4 R396300_4

CPUTEST24

R403300_4 R403300_4

CPUTEST22

R397*300_4 R397*300_4

CPUTEST12

R183*300_4 R183*300_4

CPUTEST27

CNTR_VREF

CPU_SIC

2

Q27

Q27

3

Serial VID

WINDBOND AL83L771001
GMT AL000780003

2

3

Q26*2N7002E-LF Q26*2N7002E-LF

R188 10K_4R188 10K_4

2

Accord to NDA PID:41258,M11
should be GND

U22D

U22D

F8

VDDA1

F9

VDDA2

A9

CLKIN_H

A8

CLKIN_L

B7

RESET_L

A7

PWROK

F10

LDTSTOP_L

C6

LDTREQ_L

AF4

SIC

AF5

SID

AE6

ALERT_L

R6

HT_REF0

P6

HT_REF1

F6

VDD0_FB_H

E6

VDD0_FB_L

Y6

VDD1_FB_H

AB6

VDD1_FB_L

G10

DBRDY

AA9

TMS

AC9

TCK

AD9

TRST_L

AF9

TDI

AD7

TEST23

H10

TEST18

G9

TEST19

E9

TEST25_H

E8

TEST25_L

AB8

TEST21

AF7

TEST20

AE7

TEST24

AE8

TEST22

AC8

TEST12

AF8

TEST27

C2

TEST9

AA6

TEST6

A3

RSVD1

A5

RSVD2

B3

RSVD3

B5

RSVD4

C1

RSVD5

SOCKET_638_PIN

SOCKET_638_PIN

+1.8VSUS

R393

R393
390_4

390_4

CPU_SID

CPU_ALERT

1

CPU_SVC 35
CPU_SVD 35
CPU_PWRGD_SVID_REG 35

+3V

R191

R191
*10K_4

*10K_4

THERM_ALERT#_R

1

<check list>
Layout Note:Routing 10:10 mils and away
from noise source with ground gard

2

KEY1
KEY2

SVC
SVD

THERMTRIP_L

PROCHOT_L

MEMHOT_L

THERMDC
THERMDA

VDDIO_FB_H
VDDIO_FB_L

VDDNB_FB_H
VDDNB_FB_L

DBREQ_L

TDO

TEST28_H

TEST28_L

TEST17
TEST16
TEST15
TEST14

TEST7

TEST10

TEST8

TEST29_H

TEST29_L

RSVD10

RSVD9
RSVD8
RSVD7
RSVD6

2/4 pull up R691 CPU_BDREQ# to avoid noise cause system shut down

R391

R391

R190

R190

390_4

390_4

1K/F_4

1K/F_4

U13

U13

8

SCLK

7

SDA

6

ALERT#

4

OVERT#

GMT780

GMT780

ADDRESS change to 0x9AH
090225

+3V

CPU_LDT_RST#
CPU_LDT_STOP#

CPU_LDT_REQ#_CPU
CPU_PWRGD

R156 *0_4R156 *0_4

M11
W18

A6

CPU_SVD_R

A4

CPU_THERMTRIP_L#

AF6

CPU_PROCHOT_L#

AC7

CPU_MEMHOT_L#

AA8

CPU_THERMDC

W7

CPU_THERMDA

W8

VDDIO_FB_H

W9

VDDIO_FB_L

Y9
H6

G6

CPU_DBREQ#

E10

CPU_TDO

AE9

CPUTEST28H

J7

CPUTEST28L

H8

CPUTEST17

D7

CPUTEST16

E7

CPUTEST15

F7

CPUTEST14

C7
C3

CPU_TEST10_ANALOGOUT

K8
C4

CPUTEST29H

C9

CPUTEST29L

C8

H18
H19
AA7
D5
C5

+1.8VSUS

CPU_DBREQ#

R164

R164
300_4

300_4

C502

C502
*0.1U/10V_4

*0.1U/10V_4

Add 0210

R182 0_4R182 0_4
R181 0_4R181 0_4

VDDIO_FB_H 37

VDDIO_FB_L 37

CPU_VDDNB_FB_H 35
CPU_VDDNB_FB_L 35

T30T30
T27T27

T22T22
T23T23

T25T25
T24T24

CPU_TEST10_ANALOGOUT

VFIX MODE

T26T26
T51T51

1

R424300_4 R424300_4
R165300_4 R165300_4

R415*300_4 R415*300_4C223
R419300_4 R419300_4

1/30 leakage issue , change
+1.8Vsus to +1.8V

10/9 AMD suggest

1. pull up CPU_PWRGD to +1.8SUS

2. pop R5563 pull up to +1.8SUS

H_THERMDC
H_THERMDA

R158*300_4 R158*300_4
R161*300_4 R161*300_4

T142T142

VID Override Circuit

SVC SVD Voltage Output

0 0
001
1

1 1

2/19 change G781 to G786P81U

LM86VCC

VCC
DXP
DXN
GND

C325

C325

0.1U/10V_4

0.1U/10V_4

1
2
3
5

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

H_THERMDA

C324

C324
2200p/50V_4

2200p/50V_4

H_THERMDC

R186 *0_4R186 *0_4

2/18 G781 reverse R718 0 ohm for
Griffin CPU

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

S1g3 HT, CTL I/F 1/3

S1g3 HT, CTL I/F 1/3

S1g3 HT, CTL I/F 1/3

1

+1.8V

+1.8V

ZK8

ZK8

ZK8

04

R422*300_4 R422*300_4

Add 0216

1.4V

1.2V

1.0V

0.8V

4 42Thursday, May 21, 2009

4 42Thursday, May 21, 2009

4 42Thursday, May 21, 2009

+1.2V_VLDT

3A

3A

3A

A

B

C

D

E

+SMDDR_VTERM +SMDDR_VTERM

PLACE THEM CLOSE TO
CPU WITHIN 1"

R400 39.2/F_4R400 39.2/F_4

MEM_MA0_ODT07,8
MEM_MA0_ODT17,8

MEM_MA0_CS#07,8
MEM_MA0_CS#17,8

MEM_MA_CLK1_P7
MEM_MA_CLK1_N7
MEM_MA_CLK7_P7
MEM_MA_CLK7_N7

MEM_MA_BANK07,8
MEM_MA_BANK17,8
MEM_MA_BANK27,8

MEM_MA_RAS#7,8
MEM_MA_CAS#7,8
MEM_MA_WE#7,8

MEM_MA_CKE07,8
MEM_MA_CKE17,8

R399 39.2/F_4R399 39.2/F_4

T29T29

T39T39
T42T42

T41T41
T43T43

T31T31
T32T32

T35T35
T34T34

A

+1.8VSUS

4 4

MEM_MA_ADD[0..15]7,8

3 3

2 2

1 1

M_ZP
M_ZN

MEM_MA_RESET#

MEM_MA1_ODT0
MEM_MA1_ODT1

CPU_MA1_CS_L0
CPU_MA1_CS_L1

CPU_MA_CLK_H5
CPU_MA_CLK_L5

CPU_MA_CLK_H4
CPU_MA_CLK_L4

MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15

MEM_MB_CLK7_P

MEM_MB_CLK7_N
MEM_MB_CLK1_P

MEM_MB_CLK1_N

U22B

U22B

D10

VTT1

C10

VTT2

B10

VTT3

AD10

VTT4

AF10

MEMZP

AE10

MEMZN

H16

RSVD_M1

T19

MA0_ODT0

V22

MA0_ODT1

U21

MA1_ODT0

V19

MA1_ODT1

T20

MA0_CS_L0

U19

MA0_CS_L1

U20

MA1_CS_L0

V20

MA1_CS_L1

J22

MA_CKE0

J20

MA_CKE1

N19

MA_CLK_H5

N20

MA_CLK_L5

E16

MA_CLK_H1

F16

MA_CLK_L1

Y16

MA_CLK_H7

AA16

MA_CLK_L7

P19

MA_CLK_H4

P20

MA_CLK_L4

N21

MA_ADD0

M20

MA_ADD1

N22

MA_ADD2

M19

MA_ADD3

M22

MA_ADD4

L20

MA_ADD5

M24

MA_ADD6

L21

MA_ADD7

L19

MA_ADD8

K22

MA_ADD9

R21

MA_ADD10

L22

MA_ADD11

K20

MA_ADD12

V24

MA_ADD13

K24

MA_ADD14

K19

MA_ADD15

R20

MA_BANK0

R23

MA_BANK1

J21

MA_BANK2

R19

MA_RAS_L

T22

MA_CAS_L

T24

MA_WE_L

SOCKET_638_PIN

SOCKET_638_PIN

+SMDDR_VTERM

C510

C510

4.7U/6.3V_6

4.7U/6.3V_6

+SMDDR_VTERM

C321

C321

1000p/50V_4

1000p/50V_4

C490

C490

1.5p/50V_4

1.5p/50V_4

C501

C501

1.5p/50V_4

1.5p/50V_4

W10

MEM:CMD/CTRL/CLK

MEM:CMD/CTRL/CLK

VTT5
VTT6
VTT7
VTT8
VTT9

VTT_SENSE

MEMVREF

RSVD_M2

MB0_ODT0
MB0_ODT1
MB1_ODT0

MB0_CS_L0
MB0_CS_L1
MB1_CS_L0

MB_CKE0
MB_CKE1

MB_CLK_H5

MB_CLK_L5

MB_CLK_H1

MB_CLK_L1

MB_CLK_H7

MB_CLK_L7

MB_CLK_H4

MB_CLK_L4

MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8

MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15

MB_BANK0
MB_BANK1
MB_BANK2

MB_RAS_L
MB_CAS_L

MB_WE_L

AC10
AB10
AA10
A10

CPU_VTT_SENSE

Y10

MEMVREF_CPU

W17

MEM_MB_RESET#

B18
W26

W23

MEM_MB1_ODT0

Y26
V26

W25
U22

J25
H26

CPU_MB_CLK_H5

P22

CPU_MB_CLK_HL5

R22
A17
A18
AF18
AF17

CPU_MB_CLK_H4

R26

CPU_MB_CLK_L4

R25
P24

N24
P26
N23
N26
L23
N25
L24
M26
K26
T26
L26
L25
W24
J23
J24

R24
U26
J26

U25
U24
U23

Place close to socket

C323

C322

C322

4.7U/6.3V_6

4.7U/6.3V_6

C217

C217

1000p/50V_4

1000p/50V_4

Close to CPU within 1500 mils

C323

4.7U/6.3V_6

4.7U/6.3V_6

C503

C503

1000p/50V_4

1000p/50V_4

B

4.7U/6.3V_6

4.7U/6.3V_6

1000p/50V_4

1000p/50V_4

MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15

C509

C509

C317

C317

MEM_MA_CLK7_P

MEM_MA_CLK7_N
MEM_MA_CLK1_P

MEM_MA_CLK1_N

750 mA

CPU_VTT_SENSE 37

T141T141

MEM_MB0_ODT0 7,8
MEM_MB0_ODT1 7,8

T44T44

MEM_MB0_CS#0 7,8
MEM_MB0_CS#1 7,8

T40T40

MEM_MB_CKE0 7,8
MEM_MB_CKE1 7,8

T33T33
T38T38

MEM_MB_CLK1_P 7
MEM_MB_CLK1_N 7
MEM_MB_CLK7_P 7

MEM_MB_CLK7_N 7

T37T37
T36T36

MEM_MB_BANK0 7,8

MEM_MB_BANK1 7,8

MEM_MB_BANK2 7,8

MEM_MB_RAS# 7,8

MEM_MB_CAS# 7,8

MEM_MB_WE# 7,8

C216

C216

0.22U/6.3V_4

0.22U/6.3V_4

C318

C318

180p/50V_4

180p/50V_4

R175

R175

2K/F_4

2K/F_4

R176

R176

2K/F_4

2K/F_4

MEM_MB_ADD[0..15] 7,8

C507

C507

0.22U/6.3V_4

0.22U/6.3V_4

C316

C316

180p/50V_4

180p/50V_4

C491

C491

1.5p/50V_4

1.5p/50V_4

C506

C506

1.5p/50V_4

1.5p/50V_4

+1.8VSUS

C319

C319

0.22U/6.3V_4

0.22U/6.3V_4

C320

C320

180p/50V_4

180p/50V_4

+SMDDR_VREF

R187

R187
*0_4

*0_4

C311

C311

0.1U/10V_4

0.1U/10V_4

0.22U/6.3V_4

0.22U/6.3V_4

180p/50V_4

180p/50V_4

C215

C215

C500

C500

MEM_MB_DATA[0..63]7

Reserved

1000p/50V_4

1000p/50V_4

MEM_MB_DM[0..7]7

C

C315

C315

Processor Memory Interface

U22C

U22C

MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63

MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7

MEM_MB_DQS0_P7
MEM_MB_DQS0_N7
MEM_MB_DQS1_P7
MEM_MB_DQS1_N7
MEM_MB_DQS2_P7
MEM_MB_DQS2_N7
MEM_MB_DQS3_P7
MEM_MB_DQS3_N7
MEM_MB_DQS4_P7
MEM_MB_DQS4_N7
MEM_MB_DQS5_P7
MEM_MB_DQS5_N7
MEM_MB_DQS6_P7
MEM_MB_DQS6_N7
MEM_MB_DQS7_P7
MEM_MB_DQS7_N7

G11

G25
G26

G23

G24
AA24
AA23
AD24
AE24
AA26
AA25
AD26
AE25
AC22
AD22
AE20
AF20
AF24
AF23
AC20
AD20
AD18
AE18
AC14
AD14
AF19
AC18
AF16
AF15
AF13
AC12
AB11

AE14
AF14
AF11
AD11

AB26
AE22
AC16
AD12

AC25
AC26
AF21
AF22
AE16
AD16
AF12
AE12

C11
A11
A14
B14

E11
D12
A13
A15
A16
A19
A20
C14
D14
C18
D18
D20
A21
D24
C25
B20
C20
B24
C24
E23
E24

C26
D26

Y11

A12
B16
A22
E25

C12
B12
D16
C16
A24
A23
F26
E26

MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63

MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7

MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7

SOCKET_638_PIN

SOCKET_638_PIN

D

MEM:DATA

MEM:DATA

MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8

MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63

MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7

MA_DQS_H0

MA_DQS_L0

MA_DQS_H1

MA_DQS_L1

MA_DQS_H2

MA_DQS_L2

MA_DQS_H3

MA_DQS_L3

MA_DQS_H4

MA_DQS_L4

MA_DQS_H5

MA_DQS_L5

MA_DQS_H6

MA_DQS_L6

MA_DQS_H7

MA_DQS_L7

MEM_MA_DATA0

G12

MEM_MA_DATA1

F12

MEM_MA_DATA2

H14

MEM_MA_DATA3

G14

MEM_MA_DATA4

H11

MEM_MA_DATA5

H12

MEM_MA_DATA6

C13

MEM_MA_DATA7

E13

MEM_MA_DATA8

H15

MEM_MA_DATA9

E15

MEM_MA_DATA10

E17

MEM_MA_DATA11

H17

MEM_MA_DATA12

E14

MEM_MA_DATA13

F14

MEM_MA_DATA14

C17

MEM_MA_DATA15

G17

MEM_MA_DATA16

G18

MEM_MA_DATA17

C19

MEM_MA_DATA18

D22

MEM_MA_DATA19

E20

MEM_MA_DATA20

E18

MEM_MA_DATA21

F18

MEM_MA_DATA22

B22

MEM_MA_DATA23

C23

MEM_MA_DATA24

F20

MEM_MA_DATA25

F22

MEM_MA_DATA26

H24

MEM_MA_DATA27

J19

MEM_MA_DATA28

E21

MEM_MA_DATA29

E22

MEM_MA_DATA30

H20

MEM_MA_DATA31

H22

MEM_MA_DATA32

Y24

MEM_MA_DATA33

AB24

MEM_MA_DATA34

AB22

MEM_MA_DATA35

AA21

MEM_MA_DATA36

W22

MEM_MA_DATA37

W21

MEM_MA_DATA38

Y22

MEM_MA_DATA39

AA22

MEM_MA_DATA40

Y20

MEM_MA_DATA41

AA20

MEM_MA_DATA42

AA18

MEM_MA_DATA43

AB18

MEM_MA_DATA44

AB21

MEM_MA_DATA45

AD21

MEM_MA_DATA46

AD19

MEM_MA_DATA47

Y18

MEM_MA_DATA48

AD17

MEM_MA_DATA49

W16

MEM_MA_DATA50

W14

MEM_MA_DATA51

Y14

MEM_MA_DATA52

Y17

MEM_MA_DATA53

AB17

MEM_MA_DATA54

AB15

MEM_MA_DATA55

AD15

MEM_MA_DATA56

AB13

MEM_MA_DATA57

AD13

MEM_MA_DATA58

Y12

MEM_MA_DATA59

W11

MEM_MA_DATA60

AB14

MEM_MA_DATA61

AA14

MEM_MA_DATA62

AB12

MEM_MA_DATA63

AA12

MEM_MA_DM0

E12

MEM_MA_DM1

C15

MEM_MA_DM2

E19

MEM_MA_DM3

F24

MEM_MA_DM4

AC24

MEM_MA_DM5

Y19

MEM_MA_DM6

AB16

MEM_MA_DM7

Y13
G13

H13
G16
G15
C22
C21
G22
G21
AD23
AC23
AB19
AB20
Y15
W15
W12
W13

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

S1G3 DDRII MEMORY I/F 2/3

S1G3 DDRII MEMORY I/F 2/3

S1G3 DDRII MEMORY I/F 2/3

MEM_MA_DATA[0..63] 7

MEM_MA_DM[0..7] 7

MEM_MA_DQS0_P 7
MEM_MA_DQS0_N 7
MEM_MA_DQS1_P 7
MEM_MA_DQS1_N 7
MEM_MA_DQS2_P 7
MEM_MA_DQS2_N 7
MEM_MA_DQS3_P 7
MEM_MA_DQS3_N 7
MEM_MA_DQS4_P 7
MEM_MA_DQS4_N 7
MEM_MA_DQS5_P 7
MEM_MA_DQS5_N 7
MEM_MA_DQS6_P 7
MEM_MA_DQS6_N 7
MEM_MA_DQS7_P 7
MEM_MA_DQS7_N 7

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

E

ZK8

ZK8

ZK8

05

5 42Thursday, May 21, 2009

5 42Thursday, May 21, 2009

5 42Thursday, May 21, 2009

3A

3A

3A

5

U22E

U22E

G4

VDD0_1

H2

VDD0_2

J9

VDD0_3

J11

VDD0_4

J13

VDD0_5

D D

CPU VDDNB_CORE

3A

+1.8VSUS

2A

C C

B B

J15

VDD0_6

K6

VDD0_7

K10

VDD0_8

K12

VDD0_9

K14

VDD0_10

L4

VDD0_11

L7

VDD0_12

L9

VDD0_13

L11

VDD0_14

L13

VDD0_15

L15

VDD0_16

M2

VDD0_17

M6

VDD0_18

M8

VDD0_19

M10

VDD0_20

N7

VDD0_21

N9

VDD0_22

N11

VDD0_23

K16

VDDNB_1

M16

VDDNB_2

P16

VDDNB_3

T16

VDDNB_4

V16

VDDNB_5

H25

VDDIO1

J17

VDDIO2

K18

VDDIO3

K21

VDDIO4

K23

VDDIO5

K25

VDDIO6

L17

VDDIO7

M18

VDDIO8

M21

VDDIO9

M23

VDDIO10

M25

VDDIO11

N17

VDDIO12

SOCKET_638_PIN

SOCKET_638_PIN

VDD1_1
VDD1_2
VDD1_3
VDD1_4
VDD1_5
VDD1_6
VDD1_7
VDD1_8

VDD1_9
VDD1_10
VDD1_11
VDD1_12
VDD1_13
VDD1_14
VDD1_15
VDD1_16
VDD1_17
VDD1_18
VDD1_19
VDD1_20
VDD1_21
VDD1_22
VDD1_23
VDD1_24
VDD1_25
VDD1_26

VDDIO27
VDDIO26
VDDIO25
VDDIO24
VDDIO23
VDDIO22
VDDIO21
VDDIO20
VDDIO19
VDDIO18
VDDIO17
VDDIO16
VDDIO15
VDDIO14
VDDIO13

CPU_CORE0CPU_CORE0 CPU_CORE0

P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
U15
V6
V8
V10
V12
V14
W4
Y2
AC4
AD2

Y25
V25
V23
V21
V18
U17
T25
T23
T21
T18
R17
P25
P23
P21
P18

+1.8VSUS

4

U22F

U22F

AA4

VSS1

AA11

VSS2

AA13

VSS3

AA15

VSS4

AA17

VSS5

AA19

VSS6

AB2

VSS7

AB7

VSS8

AB9

VSS9

AB23

VSS10

AB25

VSS11

AC11

VSS12

AC13

VSS13

AC15

VSS14

AC17

VSS15

AC19

VSS16

AC21

VSS17

AD6

VSS18

AD8

VSS19

AD25

VSS20

AE11

VSS21

AE13

VSS22

AE15

VSS23

AE17

VSS24

AE19

VSS25

AE21

VSS26

AE23

VSS27

B4

VSS28

B6

VSS29

B8

VSS30

B9

VSS31

B11

VSS32

B13

VSS33

B15

VSS34

B17

VSS35

B19

VSS36

B21

VSS37

B23

VSS38

B25

VSS39

D6

VSS40

D8

VSS41

D9

VSS42

D11

VSS43

D13

VSS44

D15

VSS45

D17

VSS46

D19

VSS47

D21

VSS48

D23

VSS49

D25

VSS50

E4

VSS51

F2

VSS52

F11

VSS53

F13

VSS54

F15

VSS55

F17

VSS56

F19

VSS57

F21

VSS58

F23

VSS59

F25

VSS60

H7

VSS61

H9

VSS62

H21

VSS63

H23

VSS64

J4

VSS65

SOCKET_638_PIN

SOCKET_638_PIN

VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129

3

J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
AC6
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6

+

+

C291

C291

22U/6.3V_8

22U/6.3V_8

330u/2V_7343

330u/2V_7343

CPU_CORE0

+

+

C299

C299

330u/2V_7343

330u/2V_7343

CPU VDDNB_CORE

DECOUPLING BETWEEN PROCESSOR AND DIMMs
P

+1.8VSUS

+1.8VSUS

BOTTOM SIDE DECOUPLING

C278

C278

C290

C290

22U/6.3V_8

22U/6.3V_8

C313

C313

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

C292

C292

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

LACE CLOSE TO PROCESSOR AS POSSIBLE

C304

C304

4.7U/6.3V_6

C302

C302

4.7U/6.3V_6

0.22U/6.3V_4

0.22U/6.3V_4

4.7U/6.3V_6

4.7U/6.3V_6

0.22U/6.3V_4

0.22U/6.3V_4

C308

C308

C296

C296

C312

C312

C271

C271

2

C277

C277

22U/6.3V_8

22U/6.3V_8

C306

C306

22U/6.3V_8

22U/6.3V_8

C280

C280

22U/6.3V_8

22U/6.3V_8

4.7U/6.3V_6

4.7U/6.3V_6

C265

C265

0.01U/16V_4

0.01U/16V_4

22U/6.3V_8

22U/6.3V_8

+1.8VSUS

C269

C269

C276

C276

C297

C297

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8
C294

C294

4.7U/6.3V_6

4.7U/6.3V_6

C301

C301

0.01U/16V_4

0.01U/16V_4

C282

C282

0.22U/6.3V_4

0.22U/6.3V_4

0.22U/6.3V_4

0.22U/6.3V_4

C273

C273

22U/6.3V_8

22U/6.3V_8

C300

C300

C303

C303

180p/50V_4

180p/50V_4

C309

C309

0.22U/6.3V_4

0.22U/6.3V_4

C281

C281

0.01U/16V_4

0.01U/16V_4

C307

C307

0.01U/16V_4

0.01U/16V_4

C268

C268

0.22U/6.3V_4

0.22U/6.3V_4

C238

C238

C283

C283

180p/50V_4

180p/50V_4

C310

C310

180p/50V_4

180p/50V_4

C264

C264

0.22U/6.3V_4

0.22U/6.3V_4

C258

C258

0.22U/6.3V_4

0.22U/6.3V_4

1

C293

C293

0.01U/16V_4

0.01U/16V_4

C279

C279

180p/50V_4

180p/50V_4

06

C305

C305

180p/50V_4

180p/50V_4

PROCESSOR POWER AND GROUND

A A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

S1G3 PWR & GND 3/3

S1G3 PWR & GND 3/3

S1G3 PWR & GND 3/3

ZK8

ZK8

ZK8

3A

3A

6 42Monday, May 04, 2009

6 42Monday, May 04, 2009

6 42Monday, May 04, 2009

1

3A

5

+1.8VSUS +1.8VSUS

117

103

111

104

SO-DIMM

SO-DIMM

112

VDD8

VDD7

VDD9

VDD10

VSS31

VSS30

VSS29

VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21

127

122

121

MEM_MA_ADD[0..15]5,8

D D

MEM_MA_BANK[0..2]5,8

MEM_MA_DQS0_P5
MEM_MA_DQS1_P5
MEM_MA_DQS2_P5
MEM_MA_DQS3_P5
MEM_MA_DQS4_P5
MEM_MA_DQS5_P5
MEM_MA_DQS6_P5

MEM_MA_CLK1_P5
MEM_MA_CLK1_N5
MEM_MA_CLK7_P5
MEM_MA_CLK7_N5

MEM_MA_CKE05,8
MEM_MA_CKE15,8

MEM_MA_RAS#5,8
MEM_MA_CAS#5,8
MEM_MA_WE#5,8
MEM_MA0_CS#05,8
MEM_MA0_CS#15,8

MEM_MA0_ODT05,8
MEM_MA0_ODT15,8

PDAT_SMB3,8,14,24
PCLK_SMB3,8,14,24

MEM_MA_DQS7_P5
MEM_MA_DQS0_N5

MEM_MA_DQS1_N5
MEM_MA_DQS2_N5
MEM_MA_DQS3_N5
MEM_MA_DQS4_N5
MEM_MA_DQS5_N5
MEM_MA_DQS6_N5
MEM_MA_DQS7_N5

+3V

C196

C196

2.2U/6.3V_6

2.2U/6.3V_6

C C

B B

A A

C199

C199

0.1U/10V_4

0.1U/10V_4

MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8

MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15

MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2

MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7

DIM1_SA0
DIM1_SA1

PDAT_SMB
PCLK_SMB

C314

C314

0.1U/10V_4

0.1U/10V_4

C200

C200

1000p/50V_4

1000p/50V_4

102

A0

101

A1

100

105

116

107
106

130
147
170
185

131
148
169
188

129
146
167
186

164
166

108
113
109
110
115

114
119

198
200

195
197

199

VDD081VDD182VDD287VDD388VDD495VDD596VDD6

A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9
A10

90

A11

89

A12
A13

86

A14

84

A15
BA0

BA1

85

BA2

10

DM0

26

DM1

52

DM2

67

DM3
DM4
DM5
DM6
DM7

13

DQS0

31

DQS1

51

DQS2

70

DQS3
DQS4
DQS5
DQS6
DQS7

11

DQS0

29

DQS1

49

DQS2

68

DQS3
DQS4
DQS5
DQS6
DQS7

30

CK0

32

CK0
CK1
CK1

79

CKE0

80

CKE1
RAS

CAS
WE
S0
S1

ODT0
ODT1

SA0
SA1

SDA
SCL

VDDspd

1

VREF

2

VSS0

3

VSS1

8

VSS2

9

VSS3

12

VSS4

15

VSS5

18

VSS6

21

VSS7

24

VSS8

27

VSS9

28

VSS10

33

VSS11

34

VSS12

39

VSS13

40

VSS14

41

VSS15

42

VSS16

47

VSS17

48

VSS18

53

VSS19

54

VSS20

59

H=5.2

R178 10K/F_4R178 10K/F_4
R180 10K/F_4R180 10K/F_4

SMbus address A0

5

4

118

CN18

CN18

MEM_MA_DATA0

5

DQ0

MEM_MA_DATA1

7

DQ1

MEM_MA_DATA2

17

VDD11

DQ2

MEM_MA_DATA3

19

DQ3

MEM_MA_DATA4

4

DQ4

MEM_MA_DATA5

6

DQ5

MEM_MA_DATA6

14

DQ6

MEM_MA_DATA7

16

DQ7

MEM_MA_DATA8

23

DQ8

MEM_MA_DATA9

25

DQ9

MEM_MA_DATA10

35

DQ10

MEM_MA_DATA11

37

DQ11

MEM_MA_DATA12

20

DQ12

MEM_MA_DATA13

22

DQ13

MEM_MA_DATA14

36

DQ14

MEM_MA_DATA15

38

DQ15

MEM_MA_DATA16

43

DQ16

MEM_MA_DATA17

45

DQ17

MEM_MA_DATA18

55

DQ18

MEM_MA_DATA19

57

DQ19

MEM_MA_DATA20

44

DQ20

MEM_MA_DATA21

46

DQ21

MEM_MA_DATA22

56

DQ22

MEM_MA_DATA23

58

DQ23

MEM_MA_DATA24

61

DQ24

MEM_MA_DATA25

63

DQ25

MEM_MA_DATA26

73

DQ26

MEM_MA_DATA27

75

DQ27

MEM_MA_DATA28

62

DQ28

MEM_MA_DATA29

64

DQ29

MEM_MA_DATA30

74

DQ30

MEM_MA_DATA31

76

DQ31

MEM_MA_DATA36

123

DQ32

MEM_MA_DATA37

125

DQ33

MEM_MA_DATA35

135

DQ34

MEM_MA_DATA39

137

DQ35

MEM_MA_DATA38

124

DQ36

MEM_MA_DATA32

126

DQ37

MEM_MA_DATA33

134

DQ38

MEM_MA_DATA34

136

DQ39

MEM_MA_DATA40

141

DQ40

MEM_MA_DATA41

143

DQ41

MEM_MA_DATA46

151

DQ42

MEM_MA_DATA47

153

DQ43

MEM_MA_DATA44

140

DQ44

MEM_MA_DATA45

142

DQ45

MEM_MA_DATA42

152

DQ46

MEM_MA_DATA43

154

DQ47

MEM_MA_DATA52

157

DQ48

MEM_MA_DATA49

159

DQ49

MEM_MA_DATA54

173

DQ50

MEM_MA_DATA55

175

DQ51

MEM_MA_DATA53

158

DQ52

MEM_MA_DATA48

160

DQ53

MEM_MA_DATA51

174

DQ54

MEM_MA_DATA50

176

DQ55

MEM_MA_DATA61

179

DQ56

MEM_MA_DATA60

181

DQ57

MEM_MA_DATA63

189

DQ58

MEM_MA_DATA62

191

DQ59

MEM_MA_DATA56

180

DQ60

MEM_MA_DATA57

182

DQ61

MEM_MA_DATA58

192

DQ62

MEM_MA_DATA59

194

DQ63

MEMHOT_SODIMM#_1

50

NC1

MEM_MA_RESET#1

69

NC2

83

NC3

120

NC4

MEM_MA_NC5

163

NC/TEST

196

VSS56

193

VSS55

190

VSS54

187

VSS53

184

VSS52

183

VSS51

178

VSS50

177

VSS49

172

VSS48

171

VSS47

168

VSS46

165

VSS45

162

VSS44

161

VSS43

156

VSS42

155

VSS41

150

VSS40

149

VSS39

145

VSS38

144

VSS37

139

VSS36

138

VSS35

133

VSS34

VSS33

VSS32

132

128

DDR SO-DIMM SOCKET 1.8V

DDR SO-DIMM SOCKET 1.8V

DIM1_SA0
DIM1_SA1

4

MEM_MA_DATA[0..63] 5

MEMHOT_SODIMM# MEMHOT_SODIMM#

R144 *0_4R144 *0_4

T139T139

T137T137

+0.9VSMVREF_DIMM+0.9VSMVREF_DIMM

+0.9VSMVREF_DIMM+SMDDR_VREF

R124 *0_4R124 *0_4

Only for reserved

1/18 Change CN23 footprint from
DDR-C-1734071-200P to
DDR-C-1734071-200P-BD3A (SMT open
issue)

3

MEM_MB_ADD[0..15]5,8 MEM_MB_DATA[0..63] 5

MEM_MB_BANK[0..2]5,8

MEM_MB_DM[0..7]5MEM_MA_DM[0..7]5

MEM_MB_DQS0_P5
MEM_MB_DQS1_P5
MEM_MB_DQS2_P5
MEM_MB_DQS3_P5
MEM_MB_DQS4_P5
MEM_MB_DQS5_P5
MEM_MB_DQS6_P5
MEM_MB_DQS7_P5

MEM_MB_DQS0_N5
MEM_MB_DQS1_N5
MEM_MB_DQS2_N5
MEM_MB_DQS3_N5
MEM_MB_DQS4_N5
MEM_MB_DQS5_N5
MEM_MB_DQS6_N5
MEM_MB_DQS7_N5

MEM_MB_CLK1_P5
MEM_MB_CLK1_N5
MEM_MB_CLK7_P5
MEM_MB_CLK7_N5

MEM_MB_CKE05,8
MEM_MB_CKE15,8

MEM_MB_RAS#5,8
MEM_MB_CAS#5,8

MEM_MB_WE#5,8
MEM_MB0_CS#05,8
MEM_MB0_CS#15,8

MEM_MB0_ODT05,8
MEM_MB0_ODT15,8

+3V

C530

C531

C531

2.2U/6.3V_6

2.2U/6.3V_6

+0.9VSMVREF_DIMM

C530

0.1U/10V_4

0.1U/10V_4

+1.8VSUS

R123

R123
2K/F_4

2K/F_4

R122

R122
2K/F_4

2K/F_4

MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8

MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15

MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2

MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7

DIM2_SA0
DIM2_SA1

PDAT_SMB
PCLK_SMB

C492

C492

0.1U/10V_4

0.1U/10V_4

C525

C525
1000p/50V_4

1000p/50V_4

102

A0

101

A1

100

105

116

107
106

130
147
170
185

131
148
169
188

129
146
167
186

164
166

108
113
109
110
115

114
119

198
200

195
197

199

VDD081VDD182VDD287VDD388VDD495VDD596VDD6

A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9
A10

90

A11

89

A12
A13

86

A14

84

A15
BA0

BA1

85

BA2

10

DM0

26

DM1

52

DM2

67

DM3
DM4
DM5
DM6
DM7

13

DQS0

31

DQS1

51

DQS2

70

DQS3
DQS4
DQS5
DQS6
DQS7

11

DQS0

29

DQS1

49

DQS2

68

DQS3
DQS4
DQS5
DQS6
DQS7

30

CK0

32

CK0
CK1
CK1

79

CKE0

80

CKE1
RAS

CAS
WE
S0
S1

ODT0
ODT1

SA0
SA1

SDA
SCL

VDDspd

1

VREF

2

VSS0

3

VSS1

8

VSS2

o

9

VSS3

12

VSS4

15

VSS5

18

VSS6

21

VSS7

24

VSS8

27

VSS9

28

VSS10

33

VSS11

34

VSS12

39

VSS13

40

VSS14

41

VSS15

42

VSS16

47

VSS17

48

VSS18

53

VSS19

54

VSS20

59

DIM2_SA0
DIM2_SA1

SMbus address A2

3

2

117

118

103

111

104

112

VDD8

VDD7

VDD9

VDD10

VDD11

NC/TEST

SO-DIMM

SO-DIMM

VSS33

VSS32

VSS31

VSS30

VSS29

VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21

132

128

127

122

121

R179 10K/F_4R179 10K/F_4
R177 10K/F_4R177 10K/F_4

2

CN19

CN19

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

NC1

NC2

NC3

NC4

VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34

H=9.2

MEM_MB_DATA4

5

MEM_MB_DATA5

7

MEM_MB_DATA2

17

MEM_MB_DATA3

19

MEM_MB_DATA0

4

MEM_MB_DATA1

6

MEM_MB_DATA6

14

MEM_MB_DATA7

16

MEM_MB_DATA13

23

MEM_MB_DATA12

25

MEM_MB_DATA11

35

MEM_MB_DATA10

37

MEM_MB_DATA8

20

MEM_MB_DATA9

22

MEM_MB_DATA14

36

MEM_MB_DATA15

38

MEM_MB_DATA16

43

MEM_MB_DATA17

45

MEM_MB_DATA18

55

MEM_MB_DATA19

57

MEM_MB_DATA20

44

MEM_MB_DATA21

46

MEM_MB_DATA22

56

MEM_MB_DATA23

58

MEM_MB_DATA24

61

MEM_MB_DATA25

63

MEM_MB_DATA26

73

MEM_MB_DATA27

75

MEM_MB_DATA28

62

MEM_MB_DATA29

64

MEM_MB_DATA30

74

MEM_MB_DATA31

76

MEM_MB_DATA37

123

MEM_MB_DATA36

125

MEM_MB_DATA34

135

MEM_MB_DATA35

137

MEM_MB_DATA33

124

MEM_MB_DATA32

126

MEM_MB_DATA38

134

MEM_MB_DATA39

136

MEM_MB_DATA40

141

MEM_MB_DATA45

143

MEM_MB_DATA47

151

MEM_MB_DATA46

153

MEM_MB_DATA44

140

MEM_MB_DATA41

142

MEM_MB_DATA43

152

MEM_MB_DATA42

154

MEM_MB_DATA52

157

MEM_MB_DATA53

159

MEM_MB_DATA50

173

MEM_MB_DATA51

175

MEM_MB_DATA48

158

MEM_MB_DATA49

160

MEM_MB_DATA54

174

MEM_MB_DATA55

176

MEM_MB_DATA56

179

MEM_MB_DATA60

181

MEM_MB_DATA58

189

MEM_MB_DATA59

191

MEM_MB_DATA61

180

MEM_MB_DATA57

182

MEM_MB_DATA62

192

MEM_MB_DATA63

194

MEMHOT_SODIMM#_2

50

MEM_MB_RESET#2

69
83
120

MEM_MB_NC5

163

196
193
190
187
184
183
178
177
172
171
168
165
162
161
156
155
150
149
145
144
139
138
133

+3V

R529 *0_4R529 *0_4

T140T140

T138T138

DDR SO-DIMM SOCKET 1.8V

DDR SO-DIMM SOCKET 1.8V

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

DDR2 SODIMMS: A/B CHANNEL

DDR2 SODIMMS: A/B CHANNEL

DDR2 SODIMMS: A/B CHANNEL

1

07

MEMHOT_SODIMM# 8

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

ZK8

ZK8

ZK8

7 42Thursday, May 21, 2009

7 42Thursday, May 21, 2009

7 42Thursday, May 21, 2009

1

3A

3A

3A

5

4

3

2

1

4
2
4
2
4
2
4
2
2
4
4
2
2
4
4
2

2
4
2
4

4
2

4
2

2
4

4
2

MEM_MA_ADD[0..15]
MEM_MA_BANK[0..2]

+SMDDR_VTERM

3
1
3
1
3
1
3
1
1
3
3
1
1
3
3
1

1
3
1
3

3
1

3
1

1
3

3
1

C255 0.1U/10V_4C255 0.1U/10V_4
C250 0.1U/10V_4C250 0.1U/10V_4
C285 0.1U/10V_4C285 0.1U/10V_4
C263 0.1U/10V_4C263 0.1U/10V_4
C257 0.1U/10V_4C257 0.1U/10V_4
C232 0.1U/10V_4C232 0.1U/10V_4
C243 0.1U/10V_4C243 0.1U/10V_4
C251 0.1U/10V_4C251 0.1U/10V_4

C240 0.1U/10V_4C240 0.1U/10V_4
C253 0.1U/10V_4C253 0.1U/10V_4
C247 0.1U/10V_4C247 0.1U/10V_4
C235 0.1U/10V_4C235 0.1U/10V_4

C275 0.1U/10V_4C275 0.1U/10V_4
C260 0.1U/10V_4C260 0.1U/10V_4
C249 0.1U/10V_4C249 0.1U/10V_4
C289 0.1U/10V_4C289 0.1U/10V_4

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

MEM_MB_ADD[0..15]5,7
MEM_MB_BANK[0..2]5,7

MEM_MB_CKE05,7

MEM_MB_WE#5,7
MEM_MB_CAS#5,7
MEM_MB0_ODT15,7
MEM_MB0_CS#15,7
MEM_MB_CKE15,7

MEM_MB0_CS#05,7MEM_MA0_CS#05,7
MEM_MB_RAS#5,7

MEM_MB0_ODT05,7

MEM_MB_CKE0
MEM_MB_BANK2
MEM_MB_ADD9
MEM_MB_ADD12
MEM_MB_ADD8
MEM_MB_ADD5
MEM_MB_ADD3
MEM_MB_ADD1
MEM_MB_ADD10
MEM_MB_BANK0
MEM_MB_WE#
MEM_MB_CAS#
MEM_MB0_ODT1
MEM_MB0_CS#1
MEM_MB_CKE1
MEM_MB_ADD15

MEM_MB_ADD14
MEM_MB_ADD11

MEM_MB_ADD6
MEM_MB_ADD7

MEM_MB_ADD2
MEM_MB_ADD4

MEM_MB_BANK1
MEM_MB_ADD0

MEM_MB0_CS#0
MEM_MB_RAS#MEM_MA_RAS#

MEM_MB0_ODT0
MEM_MB_ADD13

+1.8VSUS+1.8VSUS

MEM_MA_ADD[0..15]5,7
MEM_MA_BANK[0..2]5,7

MEM_MA_BANK2
MEM_MA_ADD12

D D

C C

MEM_MA_CKE05,7

MEM_MA_WE#5,7
MEM_MA_CAS#5,7
MEM_MA0_ODT15,7
MEM_MA0_CS#15,7

MEM_MA_CKE15,7

MEM_MA_RAS#5,7

MEM_MA0_ODT05,7

MEM_MA_CKE0
MEM_MA_ADD9
MEM_MA_ADD5
MEM_MA_ADD8
MEM_MA_ADD3
MEM_MA_ADD1
MEM_MA_BANK0
MEM_MA_ADD10
MEM_MA_WE#
MEM_MA_CAS#
MEM_MA0_ODT1
MEM_MA0_CS#1
MEM_MA_ADD15
MEM_MA_CKE1

MEM_MA_ADD14
MEM_MA_ADD6
MEM_MA_ADD11
MEM_MA_ADD7

MEM_MA_ADD2
MEM_MA_ADD4

MEM_MA_BANK1
MEM_MA_ADD0

MEM_MA0_CS#0

MEM_MA_ADD13
MEM_MA0_ODT0

RP13 47_4P2R_4RP13 47_4P2R_4
RP16 47_4P2R_4RP16 47_4P2R_4
RP21 47_4P2R_4RP21 47_4P2R_4
RP25 47_4P2R_4RP25 47_4P2R_4
RP28 47_4P2R_4RP28 47_4P2R_4
RP33 47_4P2R_4RP33 47_4P2R_4
RP36 47_4P2R_4RP36 47_4P2R_4
RP11 47_4P2R_4RP11 47_4P2R_4

RP15 47_4P2R_4RP15 47_4P2R_4
RP19 47_4P2R_4RP19 47_4P2R_4

RP22 47_4P2R_4RP22 47_4P2R_4

RP26 47_4P2R_4RP26 47_4P2R_4

RP32 47_4P2R_4RP32 47_4P2R_4

RP34 47_4P2R_4RP34 47_4P2R_4

PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH

MEM_MB_ADD[0..15]
MEM_MB_BANK[0..2]

RP12 47_4P2R_4RP12 47_4P2R_4

4

3

2

RP17 47_4P2R_4RP17 47_4P2R_4
RP20 47_4P2R_4RP20 47_4P2R_4
RP23 47_4P2R_4RP23 47_4P2R_4
RP27 47_4P2R_4RP27 47_4P2R_4
RP30 47_4P2R_4RP30 47_4P2R_4
RP35 47_4P2R_4RP35 47_4P2R_4
RP10 47_4P2R_4RP10 47_4P2R_4

RP14 47_4P2R_4RP14 47_4P2R_4

RP18 47_4P2R_4RP18 47_4P2R_4

RP24 47_4P2R_4RP24 47_4P2R_4

RP29 47_4P2R_4RP29 47_4P2R_4

RP31 47_4P2R_4RP31 47_4P2R_4

RP37 47_4P2R_4RP37 47_4P2R_4

PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH

1

4

3

2

1

4

3

2

1

4

3

2

1

2

1

4

3

2

1

4

3

4

3

2

1

2

1

4

3

4

3

2

1

4

3

2

1

4

3

2

1

2

1

4

3

2

1

4

3

4

3

2

1

+SMDDR_VTERM

C239 0.1U/10V_4C239 0.1U/10V_4
C288 0.1U/10V_4C288 0.1U/10V_4
C270 0.1U/10V_4C270 0.1U/10V_4
C252 0.1U/10V_4C252 0.1U/10V_4
C254 0.1U/10V_4C254 0.1U/10V_4
C237 0.1U/10V_4C237 0.1U/10V_4
C236 0.1U/10V_4C236 0.1U/10V_4
C272 0.1U/10V_4C272 0.1U/10V_4
C256 0.1U/10V_4C256 0.1U/10V_4
C287 0.1U/10V_4C287 0.1U/10V_4
C248 0.1U/10V_4C248 0.1U/10V_4
C274 0.1U/10V_4C274 0.1U/10V_4
C246 0.1U/10V_4C246 0.1U/10V_4

C284 0.1U/10V_4C284 0.1U/10V_4
C245 0.1U/10V_4C245 0.1U/10V_4
C231 0.1U/10V_4C231 0.1U/10V_4

08

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

C259

C259

0.1U/10V_4

0.1U/10V_4

C266

C266

0.1U/10V_4

0.1U/10V_4

C298

C298

0.1U/10V_4

0.1U/10V_4

C267

0.1U/10V_4

0.1U/10V_4

C261

C261

0.1U/10V_4

0.1U/10V_4

C295

C295

0.1U/10V_4

0.1U/10V_4

PLACE CLOSE TO SOCKET( PER EMI/EMC)

B B

stuff for S1G3 CPU

+3V

R541

R541
*10K/F_4

Q62

Q62

3

2

1

*10K/F_4

R540 *33_4R540 *33_4

3

Close DDR2 DIMM

U41

U41

7

A0
A1
A2

SDA
SCL

*DS75U+T&R

*DS75U+T&R

+VS

O.S

GND

MEMHOT_SODIMM#

+3V

PDAT_SMB3,7,14,24

A A

5

PCLK_SMB3,7,14,24

PDAT_SMB
PCLK_SMB

+3V

6
5

1
2

R553 *10K/F_4R553 *10K/F_4

4

+3.3V
I(max):0.001A
Power:0.0033W

+3V

C704 *0.1u/10V_4C704 *0.1u/10V_4

8

MEMHOT_SODIMM#

3

4

Address:92h

*ME2N7002E

*ME2N7002E

MEMHOT_SODIMM# 7

2

Q61

Q61

*ME2N7002E

*ME2N7002E

+3V

R538

R538
*10K/F_4

*10K/F_4

3

1

C242

C242

0.1U/10V_4

0.1U/10V_4

C262

C262

0.1U/10V_4

0.1U/10V_4

C286

C286

0.1U/10V_4

0.1U/10V_4

PLACE CLOSE TO SOCKET( PER EMI/EMC)

CPU_MEMHOT# 4,14,32

Add 0317

2

C205

C205

0.1U/10V_4

0.1U/10V_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

C230

C230

0.1U/10V_4

0.1U/10V_4

DDR2 SODIMMS TERMINATIONS

DDR2 SODIMMS TERMINATIONS

DDR2 SODIMMS TERMINATIONS

C244

C244

0.1U/10V_4

0.1U/10V_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

ZK8

ZK8

ZK8

8 42Thursday, May 21, 2009

8 42Thursday, May 21, 2009

8 42Thursday, May 21, 2009

1

3A

3A

3A

C267

5

HT_CPU_NB_CAD_H0
HT_CPU_NB_CAD_L0
HT_CPU_NB_CAD_H1
HT_CPU_NB_CAD_L1
HT_CPU_NB_CAD_H2
HT_CPU_NB_CAD_L2
HT_CPU_NB_CAD_H3
HT_CPU_NB_CAD_L3
HT_CPU_NB_CAD_H4
HT_CPU_NB_CAD_L4
HT_CPU_NB_CAD_H5
HT_CPU_NB_CAD_L5

D D

C C

HT_CPU_NB_CAD_H6
HT_CPU_NB_CAD_L6
HT_CPU_NB_CAD_H7
HT_CPU_NB_CAD_L7

HT_CPU_NB_CAD_H8
HT_CPU_NB_CAD_L8
HT_CPU_NB_CAD_H9
HT_CPU_NB_CAD_L9
HT_CPU_NB_CAD_H10
HT_CPU_NB_CAD_L10
HT_CPU_NB_CAD_H11
HT_CPU_NB_CAD_L11
HT_CPU_NB_CAD_H12
HT_CPU_NB_CAD_L12
HT_CPU_NB_CAD_H13
HT_CPU_NB_CAD_L13
HT_CPU_NB_CAD_H14
HT_CPU_NB_CAD_L14
HT_CPU_NB_CAD_H15
HT_CPU_NB_CAD_L15

HT_CPU_NB_CLK_H0
HT_CPU_NB_CLK_L0
HT_CPU_NB_CLK_H1
HT_CPU_NB_CLK_L1

HT_CPU_NB_CTL_H0
HT_CPU_NB_CTL_L0
HT_CPU_NB_CTL_H1
HT_CPU_NB_CTL_L1

R432 301/F_4R432 301/F_4

HT_RXCALP
HT_RXCALN

4

Y25
Y24
V22
V23
V25

V24
U24
U25

T25

T24

P22

P23

P25

P24
N24
N25

AC24
AC25
AB25
AB24
AA24
AA25

Y22

Y23

W21
W20

V21

V20
U20
U21
U19
U18

T22

T23

AB23
AA22

M22
M23
R21
R20

C23

A24

U24A

U24A

HT_RXCAD0P
HT_RXCAD0N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD7P
HT_RXCAD7N

HT_RXCAD8P
HT_RXCAD8N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD15P
HT_RXCAD15N

HT_RXCLK0P
HT_RXCLK0N
HT_RXCLK1P
HT_RXCLK1N

HT_RXCTL0P
HT_RXCTL0N
HT_RXCTL1P
HT_RXCTL1N

HT_RXCALP
HT_RXCALN

RS880

RS880

PART 1 OF 6

PART 1 OF 6

HYPER TRANSPORT CPU I/F

HYPER TRANSPORT CPU I/F

HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N

HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P

HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N

HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N

HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N

HT_TXCALP
HT_TXCALN

HT_NB_CPU_CAD_H0

D24

HT_NB_CPU_CAD_L0

D25

HT_NB_CPU_CAD_H1

E24

HT_NB_CPU_CAD_L1

E25

HT_NB_CPU_CAD_H2

F24

HT_NB_CPU_CAD_L2

F25

HT_NB_CPU_CAD_H3

F23

HT_NB_CPU_CAD_L3

F22

HT_NB_CPU_CAD_H4

H23

HT_NB_CPU_CAD_L4

H22

HT_NB_CPU_CAD_H5

J25

HT_NB_CPU_CAD_L5

J24

HT_NB_CPU_CAD_H6

K24

HT_NB_CPU_CAD_L6

K25

HT_NB_CPU_CAD_H7

K23

HT_NB_CPU_CAD_L7

K22

HT_NB_CPU_CAD_H8

F21

HT_NB_CPU_CAD_L8

G21

HT_NB_CPU_CAD_H9

G20

HT_NB_CPU_CAD_L9

H21

HT_NB_CPU_CAD_H10

J20

HT_NB_CPU_CAD_L10

J21

HT_NB_CPU_CAD_H11

J18

HT_NB_CPU_CAD_L11

K17

HT_NB_CPU_CAD_H12

L19

HT_NB_CPU_CAD_L12

J19

HT_NB_CPU_CAD_H13

M19

HT_NB_CPU_CAD_L13

L18

HT_NB_CPU_CAD_H14

M21

HT_NB_CPU_CAD_L14

P21

HT_NB_CPU_CAD_H15

P18

HT_NB_CPU_CAD_L15

M18

HT_NB_CPU_CLK_H0

H24

HT_NB_CPU_CLK_L0

H25

HT_NB_CPU_CLK_H1

L21

HT_NB_CPU_CLK_L1

L20

HT_NB_CPU_CTL_H0

M24

HT_NB_CPU_CTL_L0

M25

HT_NB_CPU_CTL_H1

P19

HT_NB_CPU_CTL_L1

R18

HT_TXCALP

B24

HT_TXCALN

B25

3

R641R655

R429 301/F_4R429 301/F_4

2

HT_CPU_NB_CAD_H[15..0]
HT_CPU_NB_CAD_L[15..0]
HT_CPU_NB_CLK_H[1..0]
HT_CPU_NB_CLK_L[1..0]
HT_CPU_NB_CTL_H[1..0]
HT_CPU_NB_CTL_L[1..0]
HT_NB_CPU_CAD_H[15..0]
HT_NB_CPU_CAD_L[15..0]
HT_NB_CPU_CLK_H[1..0]
HT_NB_CPU_CLK_L[1..0]
HT_NB_CPU_CTL_H[1..0]
HT_NB_CPU_CTL_L[1..0]

HT_CPU_NB_CAD_H[15..0] 4
HT_CPU_NB_CAD_L[15..0] 4

HT_CPU_NB_CLK_H[1..0] 4

HT_CPU_NB_CLK_L[1..0] 4

HT_CPU_NB_CTL_H[1..0] 4

HT_CPU_NB_CTL_L[1..0] 4
HT_NB_CPU_CAD_H[15..0] 4
HT_NB_CPU_CAD_L[15..0] 4

HT_NB_CPU_CLK_H[1..0] 4

HT_NB_CPU_CLK_L[1..0] 4

HT_NB_CPU_CTL_H[1..0] 4

HT_NB_CPU_CTL_L[1..0] 4

signals RS780 RX780

HT_TXCALP

HT_TXCALN

HT_RXCALP

HT_RXCALN

R641
300 ohm 1%

R655
300 ohm 1%

R641

1.21k ohm 1%

R655

1.21k ohm 1%

1

11/4 modify

RES CHIP 1.21K 1/16W +-1%(0402)
P/N : CS21212FB18

RES CHIP 300 1/16W +-1%(0402)
P/N : CS13002FB00

08

A12 version
RS780M AJ067400T05 100-CK2612(216-0674008-00)
RS780MC AJ067400T06 100-CK2613(216-0674010-00)
RX781 AJ067400T10 100-CK2642(215-0674024)
SB700 AJA12FG0T18 100-CK2614(218S7EALA12FG)

A13 version
RS780M AJ067400T18 100-CK2699(216-0674022)
RS780MC AJ067400T20 100-CK2704(216-0674024)
RX781 AJ067400T21 100-CK2706(215-0674034)
A12 version
SB700 AJA12FG0T18

B B

R436

R436

SPM@1K/F_4

SPM@1K/F_4

VMREFA1

R437

R437

SPM@1K/F_4

SPM@1K/F_4

+1.8V

C528

C528
SPM@0.1u/10V_4

SPM@0.1u/10V_4

C529

C529
SPM@0.1u/10V_4

SPM@0.1u/10V_4

Add 0225

U24D

U24D

VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11

T19T19

A A

R440 SPM@40.2/F_4R440 SPM@40.2/F_4
R442 SPM@40.2/F_4R442 SPM@40.2/F_4

+1.8V

VMA_MA12

VMA_BA0
VMA_BA1
VMA_BA2

VMA_RAS#
VMA_CAS#
VMA_WE#
VMA_CS0#
VMA_CKE
VMA_ODT

VMA_CLK0
VMA_CLK0#

5

SPM_COMPP
SPM_COMPN

AB12
AE16

V11
AE15
AA12
AB16
AB14
AD14
AD13
AD15
AC16
AE13
AC14

AD16
AE17
AD17

W12

AD18
AB13
AB18

V14

V15

W14

AE12
AD12

Y14

Y12

MEM_A0(NC)
MEM_A1(NC)
MEM_A2(NC)
MEM_A3(NC)
MEM_A4(NC)
MEM_A5(NC)
MEM_A6(NC)
MEM_A7(NC)
MEM_A8(NC)
MEM_A9(NC)
MEM_A10(NC)
MEM_A11(NC)
MEM_A12(NC)
MEM_A13(NC)

MEM_BA0(NC)
MEM_BA1(NC)
MEM_BA2(NC)

MEM_RASb(NC)
MEM_CASb(NC)
MEM_WEb(NC)
MEM_CSb(NC)
MEM_CKE(NC)
MEM_ODT(NC)

MEM_CKP(NC)
MEM_CKN(NC)

MEM_COMPP(NC)
MEM_COMPN(NC)

RS880

RS880

PAR 4 OF 6

PAR 4 OF 6

MEM_DQ0/DVO_VSYNC(NC)
MEM_DQ1/DVO_HSYNC(NC)

MEM_DQ2/DVO_DE(NC)
MEM_DQ3/DVO_D0(NC)

MEM_DQ4(NC)
MEM_DQ5/DVO_D1(NC)
MEM_DQ6/DVO_D2(NC)
MEM_DQ7/DVO_D4(NC)
MEM_DQ8/DVO_D3(NC)
MEM_DQ9/DVO_D5(NC)

MEM_DQ10/DVO_D6(NC)
MEM_DQ11/DVO_D7(NC)

MEM_DQ12(NC)

MEM_DQ13/DVO_D9(NC)
MEM_DQ14/DVO_D10(NC)
MEM_DQ15/DVO_D11(NC)

MEM_DQS0P/DVO_IDCKP(NC)

MEM_DQS0N/DVO_IDCKN(NC)

MEM_DQS1P(NC)
MEM_DQS1N(NC)

MEM_DM0(NC)

MEM_DM1/DVO_D8(NC)

SBD_MEM/DVO_I/F

SBD_MEM/DVO_I/F

IOPLLVDD18(NC)

IOPLLVDD(NC)
IOPLLVSS(NC)

MEM_VREF(NC)

AA18
AA20
AA19
Y19
V17
AA17
AA15
Y15
AC20
AD19
AE22
AC18
AB20
AD22
AC22
AD21

Y17
W18
AD20
AE21

W17
AE19

AE23
AE24

AD23
AE18

4

VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
VMA_DQ4
VMA_DQ5
VMA_DQ6
VMA_DQ7
VMA_DQ8
VMA_DQ9
VMA_DQ10
VMA_DQ11
VMA_DQ12
VMA_DQ13
VMA_DQ14
VMA_DQ15

VMA_WDQS0
VMA_RDQS0
VMA_WDQS1
VMA_RDQS1

VMA_DM0
VMA_DM1

+1.8_IOPLLVDD18_NB
+1.1V_IOPLLVDD

VMREFA1

R438

R438
*EV@0_4

*EV@0_4

This block is for UMA RS780 only , RX780 can
remove all component

U23

IOPLLVDD18
Connect ball to a thick
trace (at least 15 mils
wide with 10-mil
spacing from adjacent
nets) tied to a 1.8-V
power rail and filter
with a ferrite bead.

IOPLLVDD
Connect ball to a thick
trace (at least 15 mils
wide with 1-mil
spacing to adjacent nets)
that is tied to a 1.1-V
power rail and filter with
a ferrite bead

+1.8V +1.1V_NB

L50

L51

L51

BLM18PG221SN1D

BLM18PG221SN1D C539

C524

C524
SPM@2.2u/6.3V_6

SPM@2.2u/6.3V_6

L50
BLM18PG221SN1D

BLM18PG221SN1D

C523

C523

SPM@2.2u/6.3V_6

SPM@2.2u/6.3V_6

IOPLLVDD- memory PLL
not applicable to RX780

3

VMA_DQ15
VMA_DQ11
VMA_DQ13
VMA_DQ12
VMA_DQ8
VMA_DQ10
VMA_DQ9
VMA_DQ14
VMA_DQ3
VMA_DQ7
VMA_DQ1
VMA_DQ6
VMA_DQ5
VMA_DQ0
VMA_DQ4
VMA_DQ2

VMA_DM1
VMA_DM0

VMA_WDQS1
VMA_RDQS1
VMA_WDQS0
VMA_RDQS0

VMA_CLK0
VMA_CLK0#
VMA_BA2
VMA_BA1
VMA_BA0

VMA_MA12
VMA_MA11
VMA_MA10
VMA_MA9
VMA_MA8
VMA_MA7
VMA_MA6
VMA_MA5
VMA_MA4
VMA_MA3
VMA_MA2
VMA_MA1
VMA_MA0

VMA_ODT
VMA_CKE
VMA_CS0#
VMA_WE#
VMA_RAS#
VMA_CAS#

U23

B9

UDQ7

B1

UDQ6

D9

UDQ5

D1

UDQ4

D3

UDQ3

D7

UDQ2

C2

UDQ1

C8

UDQ0

F9

LDQ7

F1

LDQ6

H9

LDQ5

H1

LDQ4

H3

LDQ3

H7

LDQ2

G2

LDQ1

G8

LDQ0

B3

UDM

F3

LDM

B7

UDQS

A8

UDQS

F7

LDQS

E8

LDQS

J8

CK

K8

CK

L1

BA2

L3

BA1

L2

BA0

R2

A12

P7

A11

M2

A10

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K9

ODT

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

SPM@K4N1G164QE-HC25

SPM@K4N1G164QE-HC25

2/1 R480,R479 no stuff when RS780M without
side port / RX781

VMREFA0

J2

VREF

15mil

A1

VDD1

E1

VDD2

J9

VDD3

M9

VDD4

R1

VDD5

A9

VDDQ1

C1

VDDQ2

C3

VDDQ3

C7

VDDQ4

C9

VDDQ5

E9

VDDQ6

G1

VDDQ7
VDDQ8
VDDQ9

VDDQ10

VDDL

NC1
NC2

NC4
NC5
NC6

VSS1
VSS2
VSS3
VSS4
VSS5

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSSDL

G3
G7
G9

J1

A2
E2

R3
R7
R8

A3
E3
J3
N1
P9

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

J7

VDDL

2

C198

C198
SPM@0.1u/10V_4

SPM@0.1u/10V_4

L23

L23
SPM@BLM18PG221SN1D

SPM@BLM18PG221SN1D

C204

C204
SPM@1U/10V_4

SPM@1U/10V_4

C208

C208
SPM@0.1u/10V_4

SPM@0.1u/10V_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet

+1.8V

+1.8V

R125

R125

SPM@1K/F_4

SPM@1K/F_4

VMREFA0

R127

R127

SPM@1K/F_4

SPM@1K/F_4

Add 0225

+1.8V

C206

C206
SPM@1U/10V_4

SPM@1U/10V_4

C207

C207
SPM@1U/10V_4

SPM@1U/10V_4

SPM@10U/6.3V_6

SPM@10U/6.3V_6

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

RS880-HT LINK I/F 1/5

RS880-HT LINK I/F 1/5

RS880-HT LINK I/F 1/5

1

C537

C537

ZK8

ZK8

ZK8

C194

C194
SPM@0.1u/10V_4

SPM@0.1u/10V_4

C197

C197
SPM@0.1u/10V_4

SPM@0.1u/10V_4

VMA_CLK0

R129

R129
*SPM@100/F_4

*SPM@100/F_4

VMA_CLK0#

C539
*SPM@10U/6.3V_6

*SPM@10U/6.3V_6

of

9 42Thursday, May 21, 2009

9 42Thursday, May 21, 2009

9 42Thursday, May 21, 2009

3A

3A

3A

5

U24B

AE3
AD4
AE2
AD3
AD1
AD2

AA8
AA7
AA5

AA6

D4
C4

C2
C1

G5
G6
H5
H6

M8

M7
M5

R8
R6

R5

W6

U5
U6
U8
U7

W5

A3
B3

E5
F5

J6
J5
J7
J8
L5
L6

L8
P7

P5

P8

P4
P3
T4
T3

V5

Y8
Y7

Y5

U24B

GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N

GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
GPP_RX4P
GPP_RX4N
GPP_RX5P
GPP_RX5N

SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N

RS880

RS880

PART 2 OF 6

PART 2 OF 6

PCIE I/F GFX

PCIE I/F GFX

PCIE I/F GPP

PCIE I/F GPP

PCIE I/F SB

PCIE I/F SB

PCE_CALRP(PCE_BCALRP)
PCE_CALRN(PCE_BCALRN)

PEG_RXP15
PEG_RXN15
PEG_RXP14
PEG_RXN14
PEG_RXP13

PEG_RXP12
PEG_RXN12
PEG_RXP11
PEG_RXN11
PEG_RXP10

D D

C C

PCIE_SB_NB_RX0P13
PCIE_SB_NB_RX0N13
PCIE_SB_NB_RX1P13
PCIE_SB_NB_RX1N13
PCIE_SB_NB_RX2P13
PCIE_SB_NB_RX2N13
PCIE_SB_NB_RX3P13
PCIE_SB_NB_RX3N13

PEG_RXN10
PEG_RXP9
PEG_RXN9
PEG_RXP8
PEG_RXN8
PEG_RXP7
PEG_RXN7
PEG_RXP6
PEG_RXN6
PEG_RXP5
PEG_RXN5
PEG_RXP4
PEG_RXN4
PEG_RXP3
PEG_RXN3
PEG_RXP2
PEG_RXN2
PEG_RXP1
PEG_RXN1
PEG_RXP0
PEG_RXN0

GLAN_RXP

GLAN_RXN22

PCIE_RXP224
PCIE_RXN224
PCIE_RXP324
PCIE_RXN324

T14T14
T13T13

GLAN_RXN

PCIE_RXP2
PCIE_RXN2
PCIE_RXP3
PCIE_RXN3

4

GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P

GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N

GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N

SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N

A5
B5
A4
B4
C3
B2
D1
D2
E2
E1
F4
F3
F1
F2
H4
H3
H1
H2
J2
J1
K4
K3
K1
K2
M4
M3
M1
M2
N2
N1
P1
P2

AC1
AC2
AB4
AB3
AA2
AA1
Y1
Y2
Y4
Y3
V1
V2

AD7
AE7
AE6
AD6
AB6
AC6
AD5
AE5

AC8
AB8

C_PEG_TXP15
C_PEG_TXN15
C_PEG_TXP14
C_PEG_TXN14
C_PEG_TXP13
C_PEG_TXN13PEG_RXN13
C_PEG_TXP12
C_PEG_TXN12
C_PEG_TXP11
C_PEG_TXN11
C_PEG_TXP10
C_PEG_TXN10
C_PEG_TXP9
C_PEG_TXN9
C_PEG_TXP8
C_PEG_TXN8
C_PEG_TXP7
C_PEG_TXN7
C_PEG_TXP6
C_PEG_TXN6
C_PEG_TXP5
C_PEG_TXN5
C_PEG_TXP4
C_PEG_TXN4
C_PEG_TXP3
C_PEG_TXN3
C_PEG_TXP2
C_PEG_TXN2
C_PEG_TXP1
C_PEG_TXN1
C_PEG_TXP0
C_PEG_TXN0

PCIE_TXP4_C
PCIE_TXN4_C

PCIE_TXP2_C
PCIE_TXN2_C
PCIE_TXP3_C
PCIE_TXN3_C

A_TX0P_CA_TX0P_C
A_TX0N_CA_TX0N_C
A_TX1P_CA_TX1P_C
A_TX1N_CA_TX1N_C
A_TX2P_C
A_TX2N_C
A_TX3P_C
A_TX3N_C

NB_PCIECALRP
NB_PCIECALRN

C599 0.1U/10V_4C599 0.1U/10V_4
C600 0.1U/10V_4C600 0.1U/10V_4
C581 0.1U/10V_4C581 0.1U/10V_4
C582 0.1U/10V_4C582 0.1U/10V_4
C597 0.1U/10V_4C597 0.1U/10V_4
C598 0.1U/10V_4C598 0.1U/10V_4
C579 0.1U/10V_4C579 0.1U/10V_4
C580 0.1U/10V_4C580 0.1U/10V_4
C611 EV@0.1U/10V_4C611 EV@0.1U/10V_4
C612 EV@0.1U/10V_4C612 EV@0.1U/10V_4
C591 EV@0.1U/10V_4C591 EV@0.1U/10V_4
C592 EV@0.1U/10V_4C592 EV@0.1U/10V_4
C609 EV@0.1U/10V_4C609 EV@0.1U/10V_4
C610 EV@0.1U/10V_4C610 EV@0.1U/10V_4
C589 EV@0.1U/10V_4C589 EV@0.1U/10V_4
C590 EV@0.1U/10V_4C590 EV@0.1U/10V_4
C607 EV@0.1U/10V_4C607 EV@0.1U/10V_4
C608 EV@0.1U/10V_4C608 EV@0.1U/10V_4
C587 EV@0.1U/10V_4C587 EV@0.1U/10V_4
C588 EV@0.1U/10V_4C588 EV@0.1U/10V_4
C605 EV@0.1U/10V_4C605 EV@0.1U/10V_4
C606 EV@0.1U/10V_4C606 EV@0.1U/10V_4
C585 EV@0.1U/10V_4C585 EV@0.1U/10V_4
C586 EV@0.1U/10V_4C586 EV@0.1U/10V_4
C603 EV@0.1U/10V_4C603 EV@0.1U/10V_4
C604 EV@0.1U/10V_4C604 EV@0.1U/10V_4
C583 EV@0.1U/10V_4C583 EV@0.1U/10V_4
C584 EV@0.1U/10V_4C584 EV@0.1U/10V_4
C601 EV@0.1U/10V_4C601 EV@0.1U/10V_4
C602 EV@0.1U/10V_4C602 EV@0.1U/10V_4
C577 EV@0.1U/10V_4C577 EV@0.1U/10V_4
C578 EV@0.1U/10V_4C578 EV@0.1U/10V_4

C153 0.1U/10V_4C153 0.1U/10V_4
C152 0.1U/10V_4C152 0.1U/10V_4

C149 0.1U/10V_4C149 0.1U/10V_4
C148 0.1U/10V_4C148 0.1U/10V_4
C150 0.1U/10V_4C150 0.1U/10V_4
C151 0.1U/10V_4C151 0.1U/10V_4

C543 0.1U/10V_4C543 0.1U/10V_4
C544 0.1U/10V_4C544 0.1U/10V_4
C546 0.1U/10V_4C546 0.1U/10V_4
C545 0.1U/10V_4C545 0.1U/10V_4
C547 0.1U/10V_4C547 0.1U/10V_4
C548 0.1U/10V_4C548 0.1U/10V_4
C556 0.1U/10V_4C556 0.1U/10V_4
C554 0.1U/10V_4C554 0.1U/10V_4

R107 1.27K/F_4R107 1.27K/F_4
R105 2K/F_4R105 2K/F_4

B2A to C3A

PEG_TXP15
PEG_TXN15
PEG_TXP14
PEG_TXN14
PEG_TXP13
PEG_TXN13
PEG_TXP12
PEG_TXN12
PEG_TXP11
PEG_TXN11
PEG_TXP10
PEG_TXN10
PEG_TXP9
PEG_TXN9
PEG_TXP8
PEG_TXN8
PEG_TXP7
PEG_TXN7
PEG_TXP6
PEG_TXN6
PEG_TXP5
PEG_TXN5
PEG_TXP4
PEG_TXN4
PEG_TXP3
PEG_TXN3
PEG_TXP2
PEG_TXN2
PEG_TXP1
PEG_TXN1
PEG_TXP0
PEG_TXN0

GLAN_TXP 22GLAN_RXP22

GLAN_TXN 22

PCIE_TXP2 24

PCIE_TXN2 24

PCIE_TXP3 24

PCIE_TXN3 24

T16T16
T15T15

PCIE_NB_SB_TX0P 13
PCIE_NB_SB_TX0N 13
PCIE_NB_SB_TX1P 13
PCIE_NB_SB_TX1N 13
PCIE_NB_SB_TX2P 13
PCIE_NB_SB_TX2N 13
PCIE_NB_SB_TX3P 13
PCIE_NB_SB_TX3N 13

3

+1.1V_NB

PEG_RXN[15:0]18

PEG_RXP[15:0]18

TO PCIE-LAN

TO TV CARD
TO WLAN

2

PEG_RXN[15:0]
PEG_RXP[15:0]

PEG_TXN[15:0]
PEG_TXP[15:0]

PEG_TXN[15:0] 18
PEG_TXP[15:0] 18

Close to North Bridge

PEG_TXN15
PEG_TXP15

PEG_TXN14
PEG_TXP14

PEG_TXN13
PEG_TXP13

PEG_TXN12
PEG_TXP12

RP2 IV@0_4P2RRP2 IV@0_4P2R

1
3

RP3 IV@0_4P2RRP3 IV@0_4P2R

1
3

RP4 IV@0_4P2RRP4 IV@0_4P2R

1
3

RP5 IV@0_4P2RRP5 IV@0_4P2R

1
3

B2A to C3A B2A to C3A

NOTE:

RS780MC no support Graphic / HDMI

1

9

2
4

2
4

2
4

2
4

To HDMI CONN

INT_HDMITXN2 21
INT_HDMITXP2 21

INT_HDMITXN1 21
INT_HDMITXP1 21

INT_HDMITXN0 21
INT_HDMITXP0 21

INT_HDMITXN3 21
INT_HDMITXP3 21

11/4 modify

B B

A A

RX780/RS740/RS780 difference table (PCIE LINK)

NB_PCIECALRP

GPP4

GPP5

5

RS740 RX780/RS780

562R (GND)

NC

NC

1.27K (GND)

GPP4

GPP5

RS780 Display Port Support (muxed on GFX)

DP0

DP1

4

GFX_TX0,TX1,TX2 and TX3
AUX0 and HPD0

GFX_TX4,TX5,TX6 and TX7
AUX1 and HPD1

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet

PROJECT :

RS880-PCIE I/F 2/5

RS880-PCIE I/F 2/5

RS880-PCIE I/F 2/5

ZK8

ZK8

ZK8

3A

3A

3A

of

10 42Thursday, May 21, 2009

10 42Thursday, May 21, 2009

10 42Thursday, May 21, 2009

1

5

RX780: Powered from the 1.8-V rail
and driven by SB600 LDT_RST#, or
SB700 LDT_RST# or A_RST#.
RS780: Powered from the 3.3-V rail
and driven by SB600 LDT_RST#, or
SB700 LDT_RST# or A_RST#.

CPU_LDT_RST#4,13

D D

NB_PLTRST#13

R459 *0_4R459 *0_4

R100 0_4R100 0_4

North Bridge RESET

+3V

Power Xpress

D27

D27

*EV@CH501H-40PT

*EV@CH501H-40PT

D28 EV@CH501H-40PTD28 EV@CH501H-40PT

+3V

HDTV_DET

C C

RX780

+1.1V_NB

10/9 add 2K pull up to DDCDAT /DDCCLK for RX780

R106 *2.2K_4R106 *2.2K_4

R103 *2.2K_4R103 *2.2K_4

R460

R460
EV@4.7K_4

EV@4.7K_4

LVDS_SWHDTV_DET

RS780

R461 *EV@0_4R461 *EV@0_4

Q45

Q45
EV@BSS138_NL/SOT23

EV@BSS138_NL/SOT23

3

2

INT_CRT_DDCDAT

INT_CRT_DDCCLK

NB_PLTRST#_NB

+3V

1

PX_EN 13

R88

R88
*10K_4

*10K_4

R462

R462
*IV@10K_4

*IV@10K_4

PX_LVDS_SW 19,20

11/4 no stuff for RS780M/MC/RX781

12/22 stuff R48 2.2K for power play

STRP_DATA

selects Loading of straps from
EPROM
1 : use default vaule , default
0 : I2C Master can load strap
values from EEPROM

B B

if connected, or use default
values if not connected
RX780 --RS780_AUX_CAL
RS780 -- SUS_ATAT

Enables Debug Bus acess
through memory T/O pads and GPIO.
1 : Enable RX780 , Default
0 : Disable RX780

R455 *10K/F_4R455 *10K/F_4

R454 2.2K_4R454 2.2K_4

+3V

RS780_AUX_CAL

INT_TV_C/R

RX780

R457 *3K_4R457 *3K_4

RX780

R121 *1K_4R121 *1K_4

Reserved only

Enables Debug Bus acess
through memory T/O pads and GPIO.
1 : Enable RS780 , Default
0 : Disable RS780
(RS780 use VSYNC#)

A A

Indicates if memory Side port
is available or not
0: available RS780 , Default
1: Not available RS780
( RS780 use HSYNC#)

INT_VSYNC

INT_HSYNC

10/19 RS780M Databook rev 1.01 define High disable

5

RS780

R450 3K_4R450 3K_4
R453 *3K_4R453 *3K_4

RS780

R445 3K_4R445 3K_4
R446 SPM@3K_4R446 SPM@3K_4

4

+3V_AVDD_NB
+1.8V_AVDDDI_NB
+1.8V_AVDDQ_NB

INT_TV_C/R

INT_CRT_RED20
INT_CRT_GRN20
INT_CRT_BLU20

INT_HSYNC20

INT_VSYNC20
INT_CRT_DDCDAT20
INT_CRT_DDCCLK20

NB_PWRGD_IN17

NBHT_REFCLKP3

NBHT_REFCLKN3

EXT_NB_OSC3

+1.1V_NB

NBGFX_CLKP3
NBGFX_CLKN3

SBLINK_CLKP3

SBLINK_CLKN3

INT_LVDS_EDIDDATA19
INT_LVDS_EDIDCLK19

B2A to C3A

SDVO_CTRLCLK21
SDVO_CTRLDATA21

4.7K_4

4.7K_4R458 *4.7K_4R458 *4.7K_4
R111

R111

+NB_CORE_ON36

R128 140/F_4R128 140/F_4
R130 150/F_4R130 150/F_4
R133 150/F_4R133 150/F_4

R126 715/F_6R126 715/F_6

4.7K_4

4.7K_4

022409 remove for AMD suggest

T152T152

B2A to C3A

L18

L18

+3V

BLM18PG221SN1D

BLM18PG221SN1D

AVDD-DAC Analog
not applicable to
RX780

+1.8V

L20

L20

BLM18PG221SN1D

BLM18PG221SN1D

C174

C174
10U/6.3V_6

10U/6.3V_6

PLLVDD18 - Graphics PLL
not applicable to RX780

INT_CRT_RED
INT_CRT_GRN
INT_CRT_BLU

INT_HSYNC
INT_VSYNC
INT_CRT_DDCDAT
INT_CRT_DDCCLK

DAC_RSET_NBDAC_RSET_NB
+1.1V_PLLVDD

+1.8V_PLLVDD18

+1.8V_VDDA18HTPLL
+1.8V_VDDA18PCIEPLL

NB_PLTRST#_NB
NB_PWRGD_IN
NB_LDT_STOP#
NB_ALLOW_LDTSTOP

NBHT_REFCLKP
NBHT_REFCLKN

R114 0_4R114 0_4
R116 0_4R116 0_4

T151T151

+3V_AVDD_NB

C171

C171
10U/6.3V_6

10U/6.3V_6

+1.8V_PLLVDD18

C186

C186
10U/6.3V_6

10U/6.3V_6

NBGFX_CLKP
NBGFX_CLKN

SBLINK_CLKP
SBLINK_CLKN

R112

R112

INT_LVDS_EDIDDATA
INT_LVDS_EDIDCLK

SDVO_CTRLCLK
SDVO_CTRLDATA

R456 SHORT_PAD_4R456 SHORT_PAD_4

HDTV_DET

+1.1V_NB

11/4 no stuff for RS780M/MC

+1.8V

VDDA18PCIEPLL -PCIE PLL

L57

L57

BLM18PG221SN1D

BLM18PG221SN1D

+3V

VDDA18HTPLL -HT LINK PLL

L22

L22

BLM18PG221SN1D

+3V

BLM18PG221SN1D

4

20mils width

+1.8V_VDDA18PCIEPLL

C165

C165

2.2U/6.3V_6

2.2U/6.3V_6

20mils width

+1.8V_VDDA18HTPLL

C195

C195

2.2U/6.3V_6

2.2U/6.3V_6

3

U24C

U24C

F12

AVDD1(NC)

E12

AVDD2(NC)

F14

AVDDDI(NC)

G15

AVSSDI(NC)

H15

AVDDQ(NC)

H14

AVSSQ(NC)

E17

C_Pr(DFT_GPIO5)

F17

Y(DFT_GPIO2)

F15

COMP_Pb(DFT_GPIO4)

G18

RED(DFT_GPIO0)

G17

REDb(NC)

E18

GREEN(DFT_GPIO1)

F18

GREENb(NC)

E19

BLUE(DFT_GPIO3)

F19

BLUEb(NC)

A11

DAC_HSYNC(PWM_GPIO4)

B11

DAC_VSYNC(PWM_GPIO6)

E8

DAC_SDA(PCE_TCALRN)

F8

DAC_SCL(PCE_RCALRN)

G14

DAC_RSET(PWM_GPIO1)

A12

PLLVDD(NC)

D14

PLLVDD18(NC)

B12

PLLVSS(NC)

H17

VDDA18HTPLL

D7

VDDA18PCIEPLL1

E7

VDDA18PCIEPLL2

D8

SYSRESETb

A10

POWERGOOD

C10

LDTSTOPb

C12

ALLOW_LDTSTOP

C25

HT_REFCLKP

C24

NB_REFCLK_P
NB_REFCLK_N

STRP_DATA

RS780_AUX_CAL

BLM18PG221SN1D

BLM18PG221SN1D

+1.8V

L21

L21

1/31 voltage leakage issue
remove Q5,Q3,R83,R80,R97
stuff R88,R77

E11
F11

T2
T1

U1
U2

V4
V3

A9
B9
B8
A8
B7

A7
B10
G11

C8

L19

L19

R120 0_6R120 0_6

BLM18PG221SN1D

BLM18PG221SN1D

CPU_LDT_STOP#4,13

CPU_LDT_REQ#4

ALLOW_LDTSTOP13

3

HT_REFCLKN
REFCLK_P/OSCIN(OSCIN)

REFCLK_N(PWM_GPIO3)
GFX_REFCLKP

GFX_REFCLKN
GPP_REFCLKP

GPP_REFCLKN
GPPSB_REFCLKP(SB_REFCLKP)

GPPSB_REFCLKN(SB_REFCLKN)
I2C_DATA

I2C_CLK
DDC_DATA/AUX0N(NC)
DDC_CLK/AUX0P(NC)
AUX1P(NC)
AUX1N(NC)

STRP_DATA
RSVD
AUX_CAL(NC)

RS880

RS880

+1.8V_AVDDDI_NB

I

I/O

I/O

+1.1V_PLLVDD

C185

C185

2.2U/6.3V_6

2.2U/6.3V_6

C180

C180

2.2U/6.3V_6

2.2U/6.3V_6

+1.8V_AVDDQ_NB

C187

C187

2.2U/6.3V_6

2.2U/6.3V_6

Q43

Q43
*BSS138_NL/SOT23

*BSS138_NL/SOT23

Q44

Q44

*BSS138_NL/SOT23

*BSS138_NL/SOT23

R441 *0_4R441 *0_4

PART 3 OF 6

PART 3 OF 6

TXOUT_L2N(DBG_GPIO0)
TXOUT_L3N(DBG_GPIO2)

TXOUT_U1P(PCIE_RESET_GPIO3)
TXOUT_U1N(PCIE_RESET_GPIO2)

TXOUT_U3P(PCIE_RESET_GPIO5)

CRT/TVOUT

CRT/TVOUT

TXCLK_LP(DBG_GPIO1)

TXCLK_LN(DBG_GPIO3)
TXCLK_UP(PCIE_RESET_GPIO4)
TXCLK_UN(PCIE_RESET_GPIO1)

LVTM

LVTM

PM

PM

I

LVDS_DIGON(PCE_TCALRP)

LVDS_BLON(PCE_RCALRP)

LVDS_ENA_BL(PWM_GPIO2)

CLOCKs PLL PWR

CLOCKs PLL PWR

MIS.

MIS.

TVCLKIN(PWM_GPIO5)

THERMALDIODE_P

THERMALDIODE_N

PLLVDD - Graphics PLL
not applicable to
RX780

AVDDI-DAC Digital
not applicable to RX780

AVDDQ-DAC Bandgap Reference
not applicable to RX780

+1.8V +1.8V

2

+1.8V

3

+1.8V

2

3

1

R433 0_4R433 0_4

RS780

1

R439 0_4R439 0_4

RS780

TXOUT_L0P(NC)
TXOUT_L0N(NC)
TXOUT_L1P(NC)
TXOUT_L1N(NC)
TXOUT_L2P(NC)

TXOUT_L3P(NC)

TXOUT_U0P(NC)

TXOUT_U0N(NC)

TXOUT_U2P(NC)
TXOUT_U2N(NC)

TXOUT_U3N(NC)

VDDLTP18(NC)

VSSLTP18(NC)

VDDLT18_1(NC)
VDDLT18_2(NC)
VDDLT33_1(NC)
VDDLT33_2(NC)

VSSLT1(VSS)
VSSLT2(VSS)
VSSLT3(VSS)
VSSLT4(VSS)
VSSLT5(VSS)
VSSLT6(VSS)
VSSLT7(VSS)

TMDS_HPD(NC)

HPD(NC)

TESTMODE

+3V

R431

R431
*4.7K_4

*4.7K_4

RX780 RS780

+3V

R434

R434
*4.7K_4

*4.7K_4

RX780 RS780

modify 0310

2

A22
B22
A21
B21
B20
A20
A19
B19

B18
A18
A17
B17
D20
D21
D18
D19

B16
A16
D16
D17

A13
B13

A15
B15
A14
B14

C14
D15
C16
C18
C20
E20
C22

+1.8V_VDDLTP18_NB

+1.8V_VDDLT_18_NB

INT_TXLOUT0+ 19
INT_TXLOUT0- 19
INT_TXLOUT1+ 19
INT_TXLOUT1- 19
INT_TXLOUT2+ 19
INT_TXLOUT2- 19

INT_TXUOUT0+ 19
INT_TXUOUT0- 19
INT_TXUOUT1+ 19
INT_TXUOUT1- 19
INT_TXUOUT2+ 19
INT_TXUOUT2- 19

INT_TXLCLKOUT+ 19
INT_TXLCLKOUT- 19
INT_TXUCLKOUT+ 19
INT_TXUCLKOUT- 19

+3V_VDLT33_NB

T146T146
T147T147

T148T148
T145T145

11/01 exchange LVDS_PWM /LVDS_BLON

E9
F7
G12

TMDS_HPD0

D9

TMDS_HPD1

D10

SUS_STAT#_NB

D12

R_NB_THRMDA

AE8

R_NB_THRMDC

AD8

TEST_EN

D13

1/17 RX781 connect to GND
C104,C110,C646,C98,C136,C103,C118 change to CS00003J951

+1.8V

BLM18PG221SN1D

BLM18PG221SN1D

L55

L55

L52

L52

R430

R430
*4.7K_4

*4.7K_4

NB_LDT_STOP#

R435

R435
*4.7K_4

*4.7K_4

NB_ALLOW_LDTSTOP

NB_ALLOW_LDTSTOP

2

L_BKLT_CTRL

R91 *IV@1.27K/F_4R91 *IV@1.27K/F_4
R90 *IV@1.27K/F_4R90 *IV@1.27K/F_4

T18T18

R451 0_4R451 0_4

T149T149
T150T150

R447

R447

1.82K/F_4

1.82K/F_4

C179

C179

2.2U/6.3V_6

2.2U/6.3V_6

BLM21PG221SN1D

BLM21PG221SN1D

C533

C533

0.1U/10V_4

0.1U/10V_4

4.7U/6.3V_6

4.7U/6.3V_6

*BLM21PG221SN1D

*BLM21PG221SN1D

VDDLT33 - LVDS or DVI/HDMI ANALOG
RS740 only

INT_LVDS_DIGON 19
L_BKLT_CTRL 19
INT_LVDS_BLON 19

For RX780 only

9/25 Del R205

TMDS_HPD0 21

SUS_STAT# 14

R449

R449
*3K_4

*3K_4

+1.8V_VDDLTP18_NB

VDDLTP18 - LVDS or DVI/HDMI PLL
not applicable to RX780

+1.8V_VDDLT_18_NB

1/17 RX781 no stuff them

C534

C534

L2,L12,C124,L52,R76,L17,L51,L10,C115

VDDLT18 - LVDS or
DVI/HDMI digital
not applicable to
RX780

L53

L53

+3V

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

+3V_VDLT33_NB

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

RS880-SYSTEM I/F 3/5

RS880-SYSTEM I/F 3/5

RS880-SYSTEM I/F 3/5

1

C536

C536
*2.2u/6.3V_6

*2.2u/6.3V_6

1

ZK8

ZK8

ZK8

11

11 42Thursday, May 21, 2009

11 42Thursday, May 21, 2009

11 42Thursday, May 21, 2009

3A

3A

3A

5

4

3

2

1

+1.8V

12

C516

C516

0.1U/10V_4

0.1U/10V_4

+NB_CORE

H7

VSSAPCIE10J4VSSAPCIE11R7VSSAPCIE12L1VSSAPCIE13L2VSSAPCIE14L4VSSAPCIE15

VSSAHT9

VSSAHT10

L17

L22

L24

L7

VSSAPCIE16M6VSSAPCIE17N4VSSAPCIE18P6VSSAPCIE19R1VSSAPCIE20R2VSSAPCIE21R4VSSAPCIE22V7VSSAPCIE23U4VSSAPCIE24V8VSSAPCIE25V6VSSAPCIE26W1VSSAPCIE27W2VSSAPCIE28W4VSSAPCIE29W7VSSAPCIE30W8VSSAPCIE31Y6VSSAPCIE32

VSSAHT11

VSSAHT12

VSSAHT13

VSSAHT14

VSSAHT15

VSSAHT16

VSSAHT17

VSSAHT18

VSSAHT19

VSSAHT20

L25

P20

N22

R19

R22

R24

R25

U22

M20

+1.1V_NB

H20

+1.1V 2A for RS780M

0.6A

L54

L54
BLM21PG221SN1D

BLM21PG221SN1D

0.45A

L49

L49
BLM21PG221SN1D

BLM21PG221SN1D

0.5A

C518

C518

4.7U/6.3V_6

4.7U/6.3V_6

12/14 del L15 stuff L36 for A12

600mA

C176

C176

4.7U/6.3V_6

4.7U/6.3V_6

VSSAHT21

VSSAHT22

VSSAHT23

VSSAHT24

VSSAHT25

V19

Y21

W22

W24

W25

C177

C177

4.7U/6.3V_6

4.7U/6.3V_6

U24F

U24F

D D

C C

VSSAPCIE1A2VSSAPCIE2B1VSSAPCIE3D3VSSAPCIE4D5VSSAPCIE5E4VSSAPCIE6G1VSSAPCIE7G2VSSAPCIE8G4VSSAPCIE9

PART 6/6

PART 6/6

VSSAHT1

VSSAHT2

VSSAHT3

VSSAHT4

VSSAHT5

VSSAHT6

VSSAHT7

VSSAHT8

A25

D23

VDDHTRX - HT
LINK RX I/O for
RX780/RS780

J22

E22

H19

G22

G24

G25

VDDHT - HT
LINK digital
I/O for
RX780/RS780

+1.2V 2A for RS780M+SB700

L48

L48

+1.2V

BLM21PG221SN1D

BLM21PG221SN1D

+1.35V for
A1-1 chip
bug , A1-2
can remove

B B

VDDA18PCIE ­PCIE TX stage
I/O for
RX780/RS780

VDDHTTX - HT
LINK TX I/O for
RX780/RS780

+1.8V 1A for RS780M+SB700

L17

+1.8V

BLM21PG221SN1D

BLM21PG221SN1D

L17

B2A to C3A

VDD18 - RS780 I/O
transform

+1.8V

VDD18_MEM For UMA RS780 only
Not applicable to RX780

A A

memory I/O transform

+1.8V

R95 short0603R95 short0603

R443 short0603R443 short0603

VSSAHT26

VSSAHT27

L12

AD25

C189

C189

0.1U/10V_4

0.1U/10V_4

GROUND

GROUND

VSS11

VSS12

VSS13

N13

M14

C535

C535

4.7U/6.3V_6

4.7U/6.3V_6

C519

C519

4.7U/6.3V_6

4.7U/6.3V_6

C184

C184

0.1U/10V_4

0.1U/10V_4

AA4

AB5

VSS14

P12

P15

AB1

AB7

VSSAPCIE33

VSSAPCIE34

VSSAPCIE35

VSS15

VSS16

VSS17

R11

R14

C202

C202

0.1U/10V_4

0.1U/10V_4

AC3

AC4

VSSAPCIE36

VSSAPCIE37

VSS18

VSS19

T12

U14

C190

C190

0.1U/10V_4

0.1U/10V_4

C193

C193

0.1U/10V_4

0.1U/10V_4

C168

C168

0.1U/10V_4

0.1U/10V_4

0.005A

C169

C169
1U/10V_4

1U/10V_4

0.005A

D11

AE14

AE1

AE4

AB2

VSS2

VSS3G8VSS4

VSS1

VSSAPCIE38

VSSAPCIE39

VSSAPCIE40

VSS20

VSS21

VSS22

VSS23

VSS24

VSS25

VSS26

VSS27

V12

U11

C538

C538
1U/10V_4

1U/10V_4

Y18

U15

W11

W15

AA14

AC12

+1.1V_VDDHT

C188

C188

0.1U/10V_4

0.1U/10V_4

+1.1V_VDDHTRX

C517

C517

0.1U/10V_4

0.1U/10V_4

+1.2V_VDDHTTX

C521

C521

0.1U/10V_4

0.1U/10V_4

+1.8V_VDDA18PCIE

C173

C173

0.1U/10V_4

0.1U/10V_4

+1.8V_VDDG18_NB

+1.8V_VDD18_MEM

1/17 RX781 no stuff them
R484

1/17 RX781 connect to GND
C616 change to CS00002JB38

E14

AB11

VSS28

E15

J15

VSS5

VSS29

AB15

AB17

J12

K14

VSS7

VSS8

VSS6

VSS30

VSS31

VSS32

AB19

AE20

C532

C532

0.1U/10V_4

0.1U/10V_4

C201

C201

0.1U/10V_4

0.1U/10V_4

C192

C192

0.1U/10V_4

0.1U/10V_4

C170

C170

0.1U/10V_4

0.1U/10V_4

L15

M11

VDDPCIE_1
VDDPCIE_2
VDDPCIE_3
VDDPCIE_4
VDDPCIE_5
VDDPCIE_6
VDDPCIE_7
VDDPCIE_8

VDDPCIE_9
VDDPCIE_10
VDDPCIE_11
VDDPCIE_12
VDDPCIE_13
VDDPCIE_14
VDDPCIE_15
VDDPCIE_16
VDDPCIE_17

VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8

VDDC_9
VDDC_10
VDDC_11

POWER

POWER

VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22

VDD_MEM1(NC)
VDD_MEM2(NC)
VDD_MEM3(NC)
VDD_MEM4(NC)
VDD_MEM5(NC)
VDD_MEM6(NC)

VDDG33_1(NC)
VDDG33_2(NC)

PIN NAME
VDDHT
VDDHTRX
VDDHTTX
VDDA18PCIE

VDD18_MEM
VDDPCIE
VDDC
VDD_MEM
VDDG33
IOPLLVDD18

VSS9

VSS10

VSS34

VSS33

K11

AB21

U24E

U24E

J17

VDDHT_1

K16

L16
M16
P16
R16

T16
H18

G19

F20
E21
D22
B23
A23

AE25
AD24
AC23
AB22
AA21

Y20

W19

V18
U17

T17
R17
P17
M17

J10
P10
K10
M10

L10

T10
R10

AA9
AB9
AD9
AE9
U10

AE11
AD11

W9

H9

Y9

F9
G9

PART 5/6

PART 5/6

VDDHT_2
VDDHT_3
VDDHT_4
VDDHT_5
VDDHT_6
VDDHT_7

VDDHTRX_1
VDDHTRX_2
VDDHTRX_3
VDDHTRX_4
VDDHTRX_5
VDDHTRX_6
VDDHTRX_7

VDDHTTX_1
VDDHTTX_2
VDDHTTX_3
VDDHTTX_4
VDDHTTX_5
VDDHTTX_6
VDDHTTX_7
VDDHTTX_8
VDDHTTX_9
VDDHTTX_10
VDDHTTX_11
VDDHTTX_12
VDDHTTX_13

VDDA18PCIE_1
VDDA18PCIE_2
VDDA18PCIE_3
VDDA18PCIE_4
VDDA18PCIE_5
VDDA18PCIE_6
VDDA18PCIE_7
VDDA18PCIE_8
VDDA18PCIE_9
VDDA18PCIE_10
VDDA18PCIE_11
VDDA18PCIE_12
VDDA18PCIE_13
VDDA18PCIE_14
VDDA18PCIE_15

VDDG18_1(VDD18_1)
VDDG18_2(VDD18_2)
VDD18_MEM1(NC)
VDD18_MEM2(NC)

RS880

RS880

RX780/RS780 POWER DIFFERENCE TABLE

RX780

+1.1V
+1.1V
+1.2V
+1.8V
+1.8VVDDG18
NC
+1.1V +1.1V +1.8V
+1.1V
NC

+1.8V/1.5V

NC

+1.1V_VDD_PCIE

A6
B6
C6
D6
E6
F6
G7
H8
J9
K9
M9
L9
P9
R9
T9
V9
U9

K12
J14
U16
J11
K15
M12
L14
L11
M13
M15
N12
N14
P11
P13
P14
R12
R15
T11
T15
U12
T14
J16

AE10
AA11
Y11
AD10
AB10
AC10

H11
H12

C166

C166

0.1U/10V_4

0.1U/10V_4

C191

C191

0.1U/10V_4

0.1U/10V_4

C178

C178

0.1U/10V_4

0.1U/10V_4

1.8V(0.15A)

+1.8V_VDD_MEM

+3V_VDDG33

C172

C172

0.1U/10V_4

0.1U/10V_4

PIN NAME

RS780

+1.1V

IOPLLVDD

+1.1V

AVDDDI

+1.2V

AVDDQ

+1.8V

PLLVDD

+1.8V

PLLVDD18

+1.8V

VDDA18PCIEPLL
VDDA18HTPLL

+1.1V

VDDLTP18

+3.3V

VDDLT18

+1.8VNC

VDDLT33

C164

C164

C159

C159

1U/10V_4

1U/10V_4

0.1U/10V_4

0.1U/10V_4

C514

C514

C183

C183

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

C182

C182

0.1U/10V_4

0.1U/10V_4

10/18 follow AMD design guide 1.0

C167

C167
SPM@4.7u/6.3V_6

SPM@4.7u/6.3V_6

R448 0_6R448 0_6

R97 short0603R97 short0603

C154

C154

0.1U/10V_4

0.1U/10V_4

B2A to C3A

RX780 RS780

NC

+1.1V
+3.3VAVDD

NC
NC +1.8V
NC +1.8V

+1.1V

NC
NC

+1.8V
+1.8V

+1.8V

+1.8V

NC

+1.8V

NC

+1.8V

NC

NC

B2A to C3A

0.7A

C157

C157
1U/10V_4

1U/10V_4

C520

C520

0.1U/10V_4

0.1U/10V_4

C181

C181

0.1U/10V_4

0.1U/10V_4

VDDPCIE - PCIE-E Main power

R99 short0805R99 short0805

C156

C156

4.7U/6.3V_6

4.7U/6.3V_6

2/13 EMI
stuff C804~C807 for +NB_CORE

VDDC - Core Logic power

7A

C522

C522

C513

C527

C527

10U/6.3V_8

10U/6.3V_8

C513

0.1U/10V_4

0.1U/10V_4

10U/6.3V_8

10U/6.3V_8

0.23A

C542

C542

C540

C540
SPM@0.1u/10V_4

SPM@0.1u/10V_4

SPM@0.1u/10V_4

SPM@0.1u/10V_4

RS780

3.3V(0.03A)

VDD33 - 3.3V I/O
Not applicable to RX780

+3V

+1.1V_NB

C526

C526

0.1U/10V_4

0.1U/10V_4

R444 SPM@0_6R444 SPM@0_6

C541

C541
SPM@0.1u/10V_4

SPM@0.1u/10V_4

C515

C515

0.1U/10V_4

0.1U/10V_4

C161

C161
SPM@0.1u/10V_4

SPM@0.1u/10V_4

Side port support

VDD_MEM For UMA RS780 only
Not applicable to RX780
memory I/O transform

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

RS880-POWER5/5

RS880-POWER5/5

RS880-POWER5/5

ZK8

ZK8

ZK8

3A

3A

12 42Thursday, May 07, 2009

12 42Thursday, May 07, 2009

12 42Thursday, May 07, 2009

1

3A

5

4

3

2

1

2/4 reserve C800 PLTRST#

Q30

Q30
MMBT3904

MMBT3904

13

2

ZK8

ZK8

ZK8

13

+3V

C351

C351
1U/10V_4

1U/10V_4

13 42Thursday, May 21, 2009

13 42Thursday, May 21, 2009

13 42Thursday, May 21, 2009

C348

C348

0.1U/10V_4

0.1U/10V_4

3A

3A

3A

R235 562/F_4R235 562/F_4
R231 2.05K/F_4R231 2.05K/F_4

T65T65
T125T125

T68T68
T69T69

T112T112
T111T111

T67T67
T117T117

T124T124

T127T127
T122T122

T116T116
T115T115

T118T118
T113T113

R211 1K_4R211 1K_4

R234 33_4R234 33_4
R232 33_4R232 33_4

C364 0.1U/10V_4C364 0.1U/10V_4
C366 0.1U/10V_4C366 0.1U/10V_4
C363 0.1U/10V_4C363 0.1U/10V_4
C362 0.1U/10V_4C362 0.1U/10V_4
C360 0.1U/10V_4C360 0.1U/10V_4
C361 0.1U/10V_4C361 0.1U/10V_4
C358 0.1U/10V_4C358 0.1U/10V_4
C359 0.1U/10V_4C359 0.1U/10V_4

PCIE_NB_SB_TX0P
PCIE_NB_SB_TX0N
PCIE_NB_SB_TX1P
PCIE_NB_SB_TX1N
PCIE_NB_SB_TX2P
PCIE_NB_SB_TX2N
PCIE_NB_SB_TX3P
PCIE_NB_SB_TX3N

+1.2V_PCIE_PVDD

C354

C354
10U/6.3V_8

10U/6.3V_8

T119T119

T123T123

ALLOW_LDTSTOP
CPU_PROCHOT_SB#
CPU_PWRGD
CPU_LDT_STOP#
CPU_LDT_RST#

A_RST#_SB

A_RX0P_C
A_RX0N_C
A_RX1P_C
A_RX1N_C
A_RX2P_C
A_RX2N_C
A_RX3P_C
A_RX3N_C

PCIE_CALRP_SB
PCIE_CALRN_SB

40mA

C350

C350
1U/10V_4

1U/10V_4

SBSRC_CLKPSBSRC_CLKPSBSRC_CLKPSBSRC_CLKP
SBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKN

NB_DISP_CLKP
NB_DISP_CLKN

NB_HT_CLKP
NB_HT_CLKN

CPU_HT_CLKP
CPU_HT_CLKN

SLT_GFX_CLKP
SLT_GFX_CLKN

GPP_CLK0P

GPP_CLK1P
GPP_CLK1N

GPP_CLK2P
GPP_CLK2N

GPP_CLK3P
GPP_CLK3N

RTC_X1

RTC_X2

4

U14A

U14A

N2

A_RST#

V23

PCIE_TX0P

V22

PCIE_TX0N

V24

PCIE_TX1P

V25

PCIE_TX1N

U25

PCIE_TX2P

U24

PCIE_TX2N

T23

PCIE_TX3P

T22

PCIE_TX3N

U22

PCIE_RX0P

U21

PCIE_RX0N

U19

PCIE_RX1P

V19

PCIE_RX1N

R20

PCIE_RX2P

R21

PCIE_RX2N

R18

PCIE_RX3P

R17

PCIE_RX3N

T25

PCIE_CALRP

T24

PCIE_CALRN

P24

PCIE_PVDD

P25

PCIE_PVSS

N25

PCIE_RCLKP/NB_LNK_CLKP

N24

PCIE_RCLKN/NB_LNK_CLKN

K23

NB_DISP_CLKP

K22

NB_DISP_CLKN

M24

NB_HT_CLKP

M25

NB_HT_CLKN

P17

CPU_HT_CLKP

M18

CPU_HT_CLKN

M23

SLT_GFX_CLKP

M22

SLT_GFX_CLKN

J19

GPP_CLK0P

J18

GPP_CLK0N

L20

GPP_CLK1P

L19

GPP_CLK1N

M19

GPP_CLK2P

M20

GPP_CLK2N

N22

GPP_CLK3P

P22

GPP_CLK3N

L18

25M_48M_66M_OSC

J21

25M_X1

J20

25M_X2

A3

X1

B3

X2

F23

ALLOW_LDTSTP

F24

PROCHOT#

F22

LDT_PG

G25

LDT_STP#

G24

LDT_RST#

SB710

SB710

IC CTRL(528P) SB700 A11(218S7EALA11FG)
P/N : AJALA110T00

100MHZ

RTC XTAL

RTC XTAL

SB700

SB700

Part 1 of 5

Part 1 of 5

PCI EXPRESS INTERFACE

PCI EXPRESS INTERFACE

CPU

CPU

CLOCK GENERATOR

CLOCK GENERATOR

LPC

LPC

LDRQ1#/GNT5#/GPIO68

BMREQ#/REQ5#/GPIO65

RTC

RTC

PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4

PCICLK5/GPIO41

PCI CLKS

PCI CLKS

PCIRST#

FRAME#

PCI INTERFACE

PCI INTERFACE

DEVSEL#

REQ3#/GPIO70
REQ4#/GPIO71

GNT3#/GPIO72
GNT4#/GPIO73

CLKRUN#

INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36

LPCCLK0
LPCCLK1

LFRAME#

LDRQ0#

SERIRQ

RTCCLK

INTRUDER_ALERT#

3

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8

AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

CBE0#
CBE1#
CBE2#
CBE3#

IRDY#

TRDY#

PAR

STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#

GNT0#
GNT1#
GNT2#

LOCK#

LAD0
LAD1
LAD2
LAD3

VBAT

P4
P3
P1
P2
T4
T3

N1

U2
P7
V4
T1
V3
U1
V1
V2
T2
W1
T9
R6
R7
R5
U8
U5
Y7
W8
V9
Y8
AA8
Y4
Y3
Y2
AA2
AB4
AA1
AB3
AB2
AC1
AC2
AD1
W2
U7
AA7
Y1
AA6
W5
AA5
Y5
U6
W6
W4
V7
AC3
AD4
AB7
AE6
AB6
AD2
AE4
AD5
AC6
AE5
AD6
V5

AD3
AC4
AE2
AE3

G22
E22
H24
H23
J25
J24
H25
H22
AB8
AD7
V15

C3
C2
B2

PE_GPIO1

PCI_CLK0_R
PCI_CLK2_R

PCI_CLK3_R
PCI_CLK4_R
PCI_CLK5_R

PCIRST#_L

AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30

INT_VGA_TV_EN#

T100T100
T76T76

T75T75
T73T73

CLKRUN#_R

INTE#
INTF#

LPC_CLK0
LPC_CLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#_SB
LDRQ1#_SB
SB_GPIO65
SERIRQ

RTC_CLK
INTRUDER_ALERT#

VBAT

LOCK#

PE_GPIO0

C478

C478

0.1U/10V_4

0.1U/10V_4

R269 short0402R269 short0402

T80T80

T99T99

R381 510_4R381 510_4

T109T109

R239 22_4R239 22_4
R241 22_4R241 22_4
R363 22_4R363 22_4
R243 22_4R243 22_4

R365 33_4R365 33_4

AD23 17
AD24 17
AD25 17
AD26 17
AD27 17

AD28 17

T94T94
T97T97

T84T84

T82T82

T104T104

R209 22_4R209 22_4
R210 22_4R210 22_4

T126T126
T92T92
T93T93

T59T59

LAD0 24,32
LAD1 24,32
LAD2 24,32
LAD3 24,32
LFRAME# 24,32

SERIRQ 32

RTC_CLK 17,32

T108T108

PCIRST#

All the PCI bus has
build-in Pull-UP/Down
resistors

RTC

+3VPCU

PE_GPIO1 18,32

VCCRTC

D13 CH500H-40D13 CH500H-40

CLKRUN# 32

B2A to C3A
B2A to C3A

PX_EN 11
PE_GPIO0 18

2

PCLK_DEBUG 17,24
PCLK_591 17,32

PCI_CLK2 17
PCI_CLK3 17
PCI_CLK4 17
PCI_CLK5 17

PCIRST# 24

A11 default PCICLK5
A12 default GPIO41

PE_GPIO1

R359 8.2K_4R359 8.2K_4
R355 *8.2K_4R355 *8.2K_4

SB_GPIO65

R356 10K_4R356 10K_4

Maybe can remove

VCCRTC

D12

D12
CH500H-40

CH500H-40

R226

R226
1K_6

1K_6

12

CN6

CN6
RTC_CONN

RTC_CONN

+5VPCU

R571+R667 = (5V - 0.2V-2V)/0.2mA = 14k

R230

R230

68.1K/F_4

68.1K/F_4

R222

R222
150K/F_6

150K/F_6

4/14

527, change from 2k to 0.

R
R524 change from 2K to 16K
R529,change from 6.8k to 68.1k
R531 change form 15k to 150k

VCCRTC

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

12

G2

G2
*SHORT_PAD

*SHORT_PAD

RTC_CHG

R236

R236

SB710-PCIE/PCI/CPU/LPC 1/4

SB710-PCIE/PCI/CPU/LPC 1/4

SB710-PCIE/PCI/CPU/LPC 1/4

VCCRTC_3

16K/F_4

16K/F_4

PE_GPIO0

R354

R354
*2.2K_4

*2.2K_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

1

NB_PLTRST#11

C357

C357

PLTRST#

*0.1U/10V_4

*0.1U/10V_4

D D

PLACE THESE
PCIE AC
COUPLING CAPS
CLOSE TO U600

+1.2V

PLTRST#18,22,24,30,32

PCIE_SB_NB_RX0P10
PCIE_SB_NB_RX0N10
PCIE_SB_NB_RX1P10
PCIE_SB_NB_RX1N10
PCIE_SB_NB_RX2P10
PCIE_SB_NB_RX2N10
PCIE_SB_NB_RX3P10
PCIE_SB_NB_RX3N10

PCIE_NB_SB_TX0P10

To RS780

PCIE_NB_SB_TX0N10
PCIE_NB_SB_TX1P10
PCIE_NB_SB_TX1N10
PCIE_NB_SB_TX2P10
PCIE_NB_SB_TX2N10
PCIE_NB_SB_TX3P10
PCIE_NB_SB_TX3N10

+1.2V_PCIE_VDDR

L39 BLM18PG221SN1DL39 BLM18PG221SN1D

PCIE_PVDD-- PCIE PLL POWER

C C

A_RST#_SB

R237

R237
1K_4

1K_4

B test

SBSRC_CLKP3
SBSRC_CLKN3

9/22 Del T41

B B

Y3

Y3

RTC_X1

23

SB_OSC3

Add 0217 for SB710 only

RTC_X2

1

4

32.768KHZ

32.768KHZ

R200 20M_6R200 20M_6

C331

C332

C332
18p/50V_4

18p/50V_4

A A

C331
18p/50V_4

18p/50V_4

+1.8V

R380 *10K/F_4R380 *10K/F_4

+1.8VSUS

ALLOW_LDTSTOP11

CPU_PROCHOT_SB#4

CPU_PWRGD4

CPU_LDT_STOP#4,11

CPU_LDT_RST#4,11

1/31 voltage leakage remove R349

5