QUANTA ZGB Schematics

Page 1
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2
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5
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01
ZGB Block Diagram
A A
CK505
P2
Pineview
Graphics Interfaces
INT_LVDS
CH7036
PCIE-4
P22
USB-5
11.6"Panel
Up to 1280*800 or 1366*768
HDMI
P22
3G/WiMAX
P19
USB-1
P14
SIM Card
P19
Charger
+3VPCU +5VPCU +3V_S5 +5V_S5 +3V
P24
DDRIII-SODIMM
P3
667 MT/s
N570 1.66G
CPU
P4,5,6,7
DDR SYSTEM MEMORY
DMI
DMI(x2)
B B
SATA - SSD
P18
SATA 0
SATA
DMI
+5V
PCI-Express(Port1~4)
Tigerpoint
CCD
4 in 1 Card Reader
Realtek RTS5138
C C
USB port*2
Bluetooth module
USB-2
P14
USB-4
P19
USB-0,3
P17
USB-6
P15
USB 2.0 (Port0~7)
BATTERY
P11
Intel High Definition Audio
USB
RTC
IHDA
SB
P8,9,10,11,12,13
PN : AJ0QMJN0T07
LPC
LPC
PCI-E
SMBUS
PCIE-2
SPI Flash
TPM
SLB9635TT1.2
P11
P23
USB-7
WLAN/WiMAX
P19
VCC_CORE
+1.5VSUS +SMDDR_VREF +0.75V_DDR_VTT +1.5V
+1.05V
+1.5V Discharge VCCGFX
P25
P26
P27
P28
P29
Audio Codec
D D
Int. SPK CONN
1
Int. DMIC CONN
2
Realtek ALC271
MIC Jack
HP Jack
3
P16
K/B Con.
EC
4
Charger
P24
NPCE781L
SPI Flash
P21P15 P15
5
Touch Pad /B Con.
P21
Light Sensor
TSL2561FN
6
P23
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
PROJECT :
Block Diagram
Block Diagram
Block Diagram
ZGB
ZGB
ZGB
1 34Friday, April 08, 2011
1 34Friday, April 08, 2011
1 34Friday, April 08, 2011
8
Page 2
5
CLK GEN (CLK)
+3V
PBY160808T-301Y-N/2A/300ohm_6
+1.05V
R615 *Short_6R615 *Short_6
Place close to L18
C779
C779 33P/50V_4
33P/50V_4
CL=20p
C782
C782 33P/50V_4
33P/50V_4
PBY160808T-301Y-N/2A/300ohm_6
Place close to L8
PBY160808T-301Y-N/2A/300ohm_6
PBY160808T-301Y-N/2A/300ohm_6
CG_XIN
Y8
14.318MHzY814.318MHz
CG_XOUT
D D
VDD_IO can be ranging from 1.05V to 3.3V.
C C
<Layout note> Crystal place within 500mil of CK505
Follow Silego schematic
B B
R631 *10K/J_4R631 *10K/J_4
+3V
+3V
R632 10K/J_4R632 10K/J_4
R636 10K/J_4R636 10K/J_4 R638 *10K/J_4R638 *10K/J_4
A A
ITP_EN
pin 10 has internal pull down resistor.
33M_SEL
5
VDD_CLK_3.3V
L39
L39
C772
C772 10u/6.3V_6
10u/6.3V_6
0.1uF near every power pin
L40
L40
C773
C773 10U/10V_8
10U/10V_8
0.1uF near every power pin
CLK_Card48(20) CLKUSB_48(8)
14M_ICH(11)
PCLK_ICH(10) PCLK_DEBUG(19)
LCLK_EC(21)
PCLK_TPM(23)
1 = Pin 43/44as CPU_ITP
0 = Pin 43/44 as SRC_1
1 = Pin 11 as 33MHz
0= Pin 11 as 25MHz
C769
C769
C770
C770
C771
.1U/10V_4
.1U/10V_4
C775
C775
.1U/10V_4
.1U/10V_4
C771 .1U/10V_4
.1U/10V_4
C776
C776 .1U/10V_4
.1U/10V_4
R616 1K_4R616 1K_4 R617 22/J_4R617 22/J_4 R618 22/J_4R618 22/J_4
R619 33/J_4R619 33/J_4 R620 10K_4R620 10K_4 R622 22/J_4R622 22/J_4
R623 22/J_4R623 22/J_4 R624 22/J_4R624 22/J_4 R621 22/J_4R621 22/J_4
no connect FSA to CPU, due to there is no FSA PIN for CPU. need to check check how to handle it in CPU CLK_BESEL0
.1U/10V_4
.1U/10V_4
VDD_CLKIO_1.05V
C774
C774 10u/6.3V_6
10u/6.3V_6
CLK_BSEL1_FSB FSB
CLK_BSEL2_FSC
FSC FSB Frequency 0 0 133MHz 0 1 166MHz 1 1 200MHz
1 0 100MHz
4
3
2
1
02
VDD_CLK_1.5V
C766 .1U/10V_4
.1U/10V_4
C767
C767 .1U/10V_4
.1U/10V_4
R606 2.2/J_6R606 2.2/J_6
C768
C768 10u/6.3V_6
10u/6.3V_6
1 2
PBY160808T-301Y-N/2A/300ohm_6
PBY160808T-301Y-N/2A/300ohm_6
<20100819_FAE Poyueh> Add 2.2ohm resistor for noise suppress
Place close to L13
0.1uF near every power pin
U25
U25
1/19 : 439549_439549_CorbettPark_Schm_Rev0.5: If this pin is used as PCI_STOP#, it is required to provide a 10-k pull-up to Vcc3_3. It is not recommended to connect this signal to the Tiger Point(NM10) as it may cause unexpected system behavior.
PM_STPPCI# (11) PM_STPCPU# (11)
CLK_CPU_BCLK (4) CLK_CPU_BCLK# (4)
CLK_MCH_BCLK (4) CLK_MCH_BCLK# (4)
CLK_PCIE_Dec (23) CLK_PCIE_Dec# (23)
PE1CLK+ (19) PE1CLK- (19)
CLK_PCIE_DMIP (4) CLK_PCIE_DMIN (4)
PE4CLK+ (19) PE4CLK- (19)
CLK_PCIE_ICH (8) CLK_PCIE_ICH# (8)
DREFCLK (4) DREFCLK# (4)
DREFSSCLK (4) DREFSSCLK# (4)
CLK_PCIE_SATA (9) CLK_PCIE_SATA# (9)
CLKREQ_Dec# (23)
CLKREQ_WLAN# (19)
CLKREQ_3G# (19)
To SB
To CPU (Core CLK)
To CPU (Host CLK)
To CPU (DMI CLK) 100 MHz
To Mini Card 2 (3G/Wimax) 100 MHz
To SB (DMI CLK) 100 MHz
To CPU (DPLSS CLK) 100 MHz
Control SRC_1 Control SRC_3 Control SRC_5
<20100819> Add 475 ohm for current leakage
CG_XOUT CG_XIN
SMBDT1 SMBCK1
USB_48M
FSC
ITP_EN 33M_SEL
5
VDD_REF_3.3
9
VDD_PCI_3.3
14
VDD_48M_3.3
30
VDD_SRC_IO_1.05
35
VDD_SRC_IO_1.05
48
VDD_CPU_IO_1.05
1
NC
2
NC
13
NC
54
NC
3
XTAL_OUT
4
XTAL_IN
7
SDA
8
SCL
15
USB48_1/FSB
17
USB48_2
6
REF/FSC
10
PCIF/ITP_EN
11
25MHz/PCI_2/SEL_33MHz
12
VSS_PCI
16
VSS_48M
22
VSS_LCD
24
VSS_SATA
39
VSS_SRC
51
VSS_CPU
56
VSS_REF
57
Thermal Pad
SLG8LV631V
SLG8LV631V
VDD_CORE_1.5 VDD_CORE_1.5
PCI_STOP#
CPU_STOP#
CPU_0
CPU_0#
CPU_1
CPU_1#
SRC_1/CPU_ITP
SRC_1/CPU_ITP#
SRC_2
SRC_2#
SRC_3
SRC_3#
SRC_4
SRC_4#
SRC_5
SRC_5#
SRC_6
SRC_6#
DOT96/SRC7
DOT96#/SRC7#
LCD_CLK
LCD_CLK#
SATA
SATA#
CLKREQ_A# CLKREQ_B# CLKREQ_C#
CKPWRGD/PD#
23 45
PM_STPPCI#_R
36
PM_STPCPU#_R
42 53
52 50
49 44
43
41 40
38 37
34 33
32 31
28 27
DREFCLK
18
DREFCLK#
19 20
21 26
25
CLKREQ_Dec#_R
47
CLKREQ_WLAN#_R
46
CLKREQ_3G#_R
29
VR_PWRGD_CK410
55
R613 *0/J_4R613 *0/J_4
R614 *Short_4R614 *Short_4
T43T43 T40T40
R625 475/F_4R625 475/F_4 R626 475/F_4R626 475/F_4 R627 475/F_4R627 475/F_4
VR PWRGD
VR_PWRGD_CK410#(26)
R633 *1K_4R633 *1K_4
+1.05V
+1.05V
4
R635 0_4R635 0_4 R637 *0_4R637 *0_4
R639 *1K_4R639 *1K_4 R640 0_4R640 0_4 R641 *0_4R641 *0_4
CPU_BSEL1(4)
CPU_BSEL2(4)
CLK_BSEL1_FSB
CLK_BSEL2_FSC
<20090721(B2A)> Change Q3,Q5,Q6 from BAM700200F6 to BAM70020002 (with ESD protection function)
3
1
2N7002K
2N7002K
2
Q32
Q32
R630 *10K_4R630 *10K_4
R634 10K_4R634 10K_4
3
VR_PWRGD_CK410
VR_PWRGD_CK410 (11)
+1.5V
L38
L38
Register B5b6 for CLKREQ_A# 0 = SRC1, 1=SRC2 Register B5b4 for CLKREQ_B# 0 = SRC3, 1=SRC4 Register B5b3 for CLKREQ_C# 0 = SRC5, 1=SRC6
+3V
2
166 MHz
166 MHz
100 MHzTo Decoder
100 MHzTo Mini Card 1 (WLAN)
96 MHzTo CPU (PLL CLK)
100 MHzTo SB (SATA CLK)
CFG input hardware strapping to allocate PLL assignment. LOW = Both CPU and SRC clock drive from PLL3 HIGH = CPU clock drive from PLL1, SRC clock drive from PLL3. Contains 100kΩ pull-down resistor.
<EMI>
USB_48M
ITP_EN
FSB
FSC
33M_SEL
Clock Gen I2C
PCLK_SMB(11,19)
PDAT_SMB(11,19)
3
3
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PM_STPPCI#_R
PM_STPCPU#_R
CLKREQ_WLAN#_R
CLKREQ_3G#_R
CLKREQ_Dec#_R
USB_48M
C777 *10P/50V_4C777 *10P/50V_4
C778 *10P/50V_4C778 *10P/50V_4
C780 *10P/50V_4C780 *10P/50V_4
C781 *10P/50V_4C781 *10P/50V_4
C783 *10P/50V_4C783 *10P/50V_4
+3V
R628
R628
2.2K_4
2.2K_4
2
SMBCK1
1
2N7002K
2N7002K
+3V
Q30
Q30
R629
R629
2.2K_4
2.2K_4
2
SMBDT1
1
2N7002K
2N7002K
Q31
Q31
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
CLOCK GENERATOR
CLOCK GENERATOR
CLOCK GENERATOR
1
R607 10K/J_4R607 10K/J_4C766
R608 10K/J_4R608 10K/J_4
R609 10K/J_4R609 10K/J_4
R610 10K/J_4R610 10K/J_4
R611 10K/J_4R611 10K/J_4
R612 20K/F_4R612 20K/F_4
SMBCK1 (3,19,22,23)
SMBDT1 (3,19,22,23)
ZGB
ZGB
ZGB
2 34Friday, April 08, 2011
2 34Friday, April 08, 2011
2 34Friday, April 08, 2011
+3V
2A
2A
2A
Page 3
5
DDR_STD(DDR)
M_A_A[14:0](5)
D D
M_A_BS0(5) M_A_BS1(5) M_A_BS2(5) M_CS#0(5) M_CS#1(5) M_CLK0(5) M_CLK0#(5) M_CLK1(5) M_CLK1#(5) M_CKE0(5) M_CKE1(5) M_A_CAS#(5) M_A_RAS#(5)
R353 10K_4R353 10K_4 R357 10K_4R357 10K_4
C C
B B
M_A_WE#(5)
SMBCK1(2,19,22,23)
SMBDT1(2,19,22,23)
M_ODT0(5) M_ODT1(5)
M_A_DM[7:0](5)
M_A_DQS[7:0](5)
M_A_DQS#[7:0](5)
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14
DIMM0_SA0 DIMM0_SA1 SMBCK1 SMBDT1
M_A_DM0 M_A_DM1 M_A_DM3 M_A_DM2 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7
M_A_DQS0 M_A_DQS1 M_A_DQS3 M_A_DQS2 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#3 M_A_DQS#2 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7
107
119
109 108
114 121 101 103 102 104
115 110 113 197 201 202 200
116 120
136 153 170 187
137 154 171 188
135 152 169 186
98 97 96 95 92 91 90 86 89 85
84 83
80 78
79
73 74
11 28 46 63
12 29 47 64
10 27 45 62
4
JDIM1A
JDIM1A
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15
BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA
ODT0 ODT1
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7
DDR3-DIMM0_H=4_STD
DDR3-DIMM0_H=4_STD
3
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
(204P)
(204P)
160
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
M_A_DQ5 M_A_DQ1 M_A_DQ7 M_A_DQ6 M_A_DQ4 M_A_DQ0 M_A_DQ2 M_A_DQ3 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ24 M_A_DQ28 M_A_DQ27 M_A_DQ26 M_A_DQ29 M_A_DQ25 M_A_DQ30 M_A_DQ31 M_A_DQ20 M_A_DQ16 M_A_DQ19 M_A_DQ22 M_A_DQ21 M_A_DQ17 M_A_DQ23 M_A_DQ18 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ47 M_A_DQ46 M_A_DQ49 M_A_DQ48 M_A_DQ51 M_A_DQ55 M_A_DQ53 M_A_DQ52 M_A_DQ50 M_A_DQ54 M_A_DQ61 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ56 M_A_DQ60 M_A_DQ62 M_A_DQ63
M_A_DQ[63:0] (5)
+SMDDR_VREF
R171
R171
1K/F_4
1K/F_4
R184 *0_6R184 *0_6
R181
R181
1K/F_4
1K/F_4
PM_EXTTS#0(4)
DDR3_DRAMRST#(5)
+1.5VSUS
+SMDDR_VREF_DIMM
R381 *10K_4R381 *10K_4
+3V
C183
C183 470p/50V_4
470p/50V_4
2
+1.5VSUS
2.48A
+3V
+SMDDR_VREF_DQ0 +SMDDR_VREF_DIMM
+SMDDR_VREF_DIMM
JDIM1B
JDIM1B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3-DIMM0_H=4_STD
DDR3-DIMM0_H=4_STD
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
(204P)
(204P)
VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52
VTT1 VTT2
GND GND
44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196
203 204
205 206
+1.5VSUS
1
+0.75V_DDR_VTT
R53
R53
1K/F_4
Place these Caps near So-Dimm0.
+1.5VSUS
C319
C104
C104 10u/6.3V_6
10u/6.3V_6
C339
C339
0.1u/10V_4
0.1u/10V_4
5
C319 10u/6.3V_6
10u/6.3V_6
C314
C154
C154 10u/6.3V_6
10u/6.3V_6
C341
C341
2.2u/6.3V_6
2.2u/6.3V_6
C314 10u/6.3V_6
10u/6.3V_6
C127
C127 10u/6.3V_6
10u/6.3V_6
C100
C100
10u/6.3V_6
10u/6.3V_6
A A
+3V
C108
C108
0.1u/10V_4
0.1u/10V_4
+0.75V_DDR_VTT
C353
C353
0.1u/10V_4
0.1u/10V_4
C136
C136
0.1u/10V_4
0.1u/10V_4
C144
C144
0.1u/10V_4
0.1u/10V_4
C352
C352
0.1u/10V_4
0.1u/10V_4
C315
C315
0.1u/10V_4
0.1u/10V_4
C313
C313
0.1u/10V_4
0.1u/10V_4
C344
C344
0.1u/10V_4
0.1u/10V_4
+
+
+SMDDR_VREF_DIMM
C90
C90
C169
C169
330u/2V_7343
330u/2V_7343
0.1u/10V_4
0.1u/10V_4
C184
C184
2.2u/6.3V_6
2.2u/6.3V_6
2011/03/29 EMI add 100pf CAP*4
+1.5VSUS
C342
C342
0.1u/10V_4
0.1u/10V_4 C258
C258
100p/50V_4
100p/50V_4
4
+SMDDR_VREF_DQ0
C59
C59
0.1u/10V_4
0.1u/10V_4
100p/50V_4
100p/50V_4 C261
C261
C260
C260 100p/50V_4
100p/50V_4
C56
C56
2.2u/6.3V_6
2.2u/6.3V_6
C259
C259
100p/50V_4
100p/50V_4
3
+SMDDR_VREF
2
R55 *0_6R55 *0_6
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDRIII SO-DIMM-0
DDRIII SO-DIMM-0
DDRIII SO-DIMM-0
Date: Sheet of
Date: Sheet of
Date: Sheet of
1K/F_4
+SMDDR_VREF_DQ0
R54
R54
1K/F_4
1K/F_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZGB
ZGB
ZGB
3 34Friday, April 08, 2011
3 34Friday, April 08, 2011
3 34Friday, April 08, 2011
1
2A
2A
2A
Page 4
5
PINEVIEW_M
DMI_RXP_0 DMI_RXN_0 DMI_RXP_1 DMI_RXN_1
EXP_CLKINN EXP_CLKINP
RSVD RSVD RSVD RSVD
RSVD_K2 RSVD_J1 RSVD_M4 RSVD_L3
PINEVIEW_M
REV = 1.1
REV = 1.1
VGA
VGA
PM_EXTTS#_1/DPRSLPVR
MISC
MISC
3 OF 6
3 OF 6
PINEVIEW_M
PINEVIEW_M
REV = 1.1
REV = 1.1
DMI
DMI
1 OF 6
1 OF 6
CRT_HSYNC CRT_VSYNC
CRT_RED
CRT_GREEN
CRT_BLUE
CRT_IRTN
CRT_DDC_DATA
CRT_DDC_CLK
DAC_IREF
DPL_REFCLKINP DPL_REFCLKINN
DPL_REFSSCLKINP
DPL_REFSSCLKINN
PM_EXTTS#_0
PWROK
RSTINB
HPL_CLKINN
HPL_CLKINP
DMI_TXP_0 DMI_TXN_0 DMI_TXP_1 DMI_TXN_1
EXP_RCOMPO
EXP_ICOMPI
EXP_RBIAS
RSVD_TP RSVD_TP
RSVD_K3
RSVD_L2 RSVD_M2 RSVD_N2
M30 M29
N31 P30 P29 N30
L31 L30
P28 Y30
Y29 AA30 AA31
K29 J30 L5 AA3
W8 W9
G2 G1 H3 J2
L10 L9 L8
N11 P11
K3 L2 M2 N2
U21C
U21C
D12
XDP_RSVD_00
A7
XDP_RSVD_01
D6
XDP_RSVD_02
C5
XDP_RSVD_03
C7
XDP_RSVD_04
T32T32
C6
XDP_RSVD_05
D8
XDP_RSVD_06
B7
XDP_RSVD_07
A9
R303 1K/F_4R303 1K/F_4
D D
C C
DMI_TXP0(8) DMI_TXN0(8) DMI_TXP1(8) DMI_TXN1(8)
CLK_PCIE_DMIN(2) CLK_PCIE_DMIP(2)
B B
XDP_RSVD_08
D9
XDP_RSVD_09
C8
XDP_RSVD_10
T33T33
B8
XDP_RSVD_11
C10
XDP_RSVD_12
D10
XDP_RSVD_13
B11
XDP_RSVD_14
B10
XDP_RSVD_15
B12
XDP_RSVD_16
T34T34
C11
XDP_RSVD_17
L11
RSVD
AA7
RSVD_TP
AA6
RSVD_TP
R5
RSVD_TP
R6
RSVD_TP
AA21
RSVD_TP
W21
RSVD_TP
T21
RSVD_TP
V21
RSVD_TP
Pineview-M 1.66G
Pineview-M 1.66G
U21A
U21A
F3 F2 H4 G3
N7 N6
R10
R9
N10
N9
K2
J1 M4 L3
Pineview-M 1.66G
Pineview-M 1.66G
4
R344 *0/short_4R344 *0/short_4
CLK_MCH_BCLK# (2) CLK_MCH_BCLK (2)
<Layout note> Place within 500mil from CPU pin
EXP_COMP
R162 49.9/F_4R162 49.9/F_4
EXP_RBIAS
R159 750/F_4R159 750/F_4
<Layout note> Place within 500mil from CPU pin
PM_EXTTS#0
R343 10K_4R343 10K_4
DREFCLK (2) DREFCLK# (2)
DREFSSCLK (2) DREFSSCLK# (2)
PM_DPRSLPVR (11,26)
PM_EXTTS#0 (3)
IMVP_PWRGD (11,26)
PLTRST# (11,19,21,22,23)
<20090610(A1A)_Sighting Report Rev002_Number:3359187> Avoid a glitch during system power up
LCD Panel Backlight
U23
IMVP_PWRGD LBKLT_EN
DMI_RXP0 (8) DMI_RXN0 (8) DMI_RXP1 (8) DMI_RXN1 (8)
U23
2 1
R352
R352 100K_4
100K_4
R350 *0_4R350 *0_4
<Layout note>
PLACE TCK/TDI/TMS TERMINATION NEAR CPU
XDP PU
XDP_TMS XDP_TDI H_PREQ#
+3V
XDP_TCK XDP_TRST#
INT_LVDS_PWM(14)
+3V
LVDS_CLK(14) LVDS_DATA(14)
INT_LVDS_DIGON(14)
+3V
C338 0.1u/10V_4C338 0.1u/10V_4
TC7SH08FU
TC7SH08FU
4
3 5
R165 51/J_4R165 51/J_4 R168 51/J_4R168 51/J_4 R173 51/J_4R173 51/J_4 R315 51/J_4R315 51/J_4 R170 51/J_4R170 51/J_4
XDP_BPM#5 : Length<200mil
3
INT_TXLCLKN(22) INT_TXLCLKP(22) INT_TXLOUTN0(22) INT_TXLOUTP0(22) INT_TXLOUTN1(22) INT_TXLOUTP1(22) INT_TXLOUTN2(22) INT_TXLOUTP2(22)
R189 2.37K/F_4R189 2.37K/F_4
R193 *2.2K/J_4R193 *2.2K/J_4 R196 *2.2K/J_4R196 *2.2K/J_4
INT_LVDS_BLON (14)
+1.05V
LBKLT_EN
+3V
U25 U26 R23 R24 N26 N27 R26 R27
LIBG
R22
J28 N22 N23
L27
L26
LCTLA_CLK
L23
LCTLB_DATA
K25
K23
K24 H26
T19T19
G11
T36T36
E15
T23T23
G13
T21T21
F13
T37T37
B18
T39T39
B20
T41T41
C20
T42T42
B21
T18T18
G5
XDP_TDI
D14
T35T35
D13
XDP_TCK
B14
XDP_TMS
C14
XDP_TRST#
C16
H_THERMDA
D30
H_THERMDC
E30
C30 D31
R347 2.2K/J_4R347 2.2K/J_4 R346 2.2K/J_4R346 2.2K/J_4
<EMI>
C215
C215
*220P/50V_4
*220P/50V_4
U21D
U21D
LVD_A_CLKM LVD_A_CLKP LVD_A_DATAM_0 LVD_A_DATAP_0 LVD_A_DATAM_1 LVD_A_DATAP_1 LVD_A_DATAM_2 LVD_A_DATAP_2
LVD_IBG LVD_VBG LVD_VREFH LVD_VREFL LBKLT_EN LBKLT_CTL LCTLA_CLK LCTLB_CLK LDDC_CLK LDDC_DATA LVDD_EN
BPM_1B_0 BPM_1B_1 BPM_1B_2 BPM_1B_3
BPM_2_0#/RSVD BPM_2_1#/RSVD BPM_2_2#/RSVD BPM_2_3#/RSVD
RSVD TDI TDO TCK TMS TRST_B
THRMDA_1 THRMDC_1
RSVD_C30 RSVD_D31
Pineview-M 1.66G
Pineview-M 1.66G
LVDS_CLK LVDS_DATA
C214
C214
*220P/50V_4
*220P/50V_4
2
PINEVIEW_M
PINEVIEW_M
REV = 1.1
REV = 1.1
ICH
ICH
LVDS
LVDS
THERMTRIP_B
CPUPWRGOOD
CPU
CPU
4 OF 6
4 OF 6
<Layout note> Place within 500mil from CPU pin and 5mil spacing
Max 500mil Near CPU pin
R126
R126 976/F_4
976/F_4
R119
R119
3.32K/F_4
3.32K/F_4
SMI_B A20M_B FERR_B
LINT00 LINT10
IGNNE_B
STPCLK_B
DPRSTP_B
DPSLP_B
INIT_B PRDY_B PREQ_B
PROCHOT_B
GTLREF
RSVD RSVD
BCLKN
BCLKP
BSEL_0 BSEL_1 BSEL_2
VID_0 VID_1 VID_2 VID_3 VID_4 VID_5 VID_6
RSVD RSVD RSVD RSVD
RSVD_TP RSVD_TP
EXTBGREF
C138
C138 1U/6.3V_4
1U/6.3V_4
E7 H7 H6 F10 F11 E5 F8
G6 G10 G8
T20T20
E11
H_PREQ#
F15
H_THRMTRIP#
E13
R318 68_4R318 68_4
C18
H_PWRGD
W1
H_GTLREF
A13 H27
VSS
L6 E17
H10 J10
CPU_BSEL0
K5
CPU_BSEL1
H5
CPU_BSEL2
K6 H30
H29 H28 G30 G29 F29 E29
L7 D20 H13 D18
K9 D19
H_EXBGREF
K7
1
H_SMI# (9) H_A20M# (9)
H_FERR# (9)
H_INTR (9) H_NMI (9) H_IGNNE# (9) H_STPCLK# (9)
ICH_DPRSTP# (11,26) H_DPSLP# (11) H_INIT# (9)
<20090511(A1A)_ Checklist Rev0 .7>
+1.05V
PROCHOT_B:68ohm±5% pull-up to Vcc1_05 (VCCP) at both CPU side and Intel MVP
H_PROCHOT# (26)
H_PWRGD (11)
CLK_CPU_BCLK# (2) CLK_CPU_BCLK (2)
CPU_BSEL1 (2) CPU_BSEL2 (2)
VID0 (26) VID1 (26) VID2 (26) VID3 (26) VID4 (26) VID5 (26) VID6 (26)
CPU_BSEL0 CPU_BSEL1 CPU_BSEL2
R123 470/J_4R123 470/J_4 R121 470/J_4R121 470/J_4 R122 470/J_4R122 470/J_4
<Layout note> Place within 500mil from CPU pin
+1.05V+1.05V
R309
R309 1K/F_4
1K/F_4
1D: No Stuff C8007 (CRB v1.0)
H_GTLREFH_EXBGREF
R311
R311
C316
C316
2K/F_4
2K/F_4
1U/6.3V_4
1U/6.3V_4
+1.05V
C317
C317 *220P/50V_4
*220P/50V_4
04
CPU FAN CTRL(THM)
CPU Thermal monitor(THM)
8/11 B-test : for EMI
C33
C33 *220p/50V_6
*220p/50V_6
5
FAN_SIG
FAN_PWM_B
CPUFAN#
THERM_ALERT#(11)
FAN_SIG (21)
2ND_MBCLK(21)
2ND_MBDATA(21)
R355 *0_4R355 *0_4
THERM_ALERT#_R
FAN_ON#
ALERT#:pull up at SB side
3
C32
C32 *220p/50V_6
*220p/50V_6
+5V
+3V
R50
R50
R52
R52
+3V
R43
R43 10K_4
10K_4
Q3
2
MMBT3904Q3MMBT3904
1 3
2
1 3
10K_4
10K_4
Q1 MMBT3904Q1MMBT3904
10K_4
10K_4
FAN_PWM_CNFAN_PWM_E
+3V
R49
R49 10K_4
10K_4
FAN_SIG
+5V
CN13
CN13
6 345 2 1
FAN
FAN
4
FAN_PWM_CN
A A
R40 10K_4R40 10K_4
FAN_ON#
CPUFAN#(21)
+3V
R349
R349
R354
R354
10K_4
10K_4
*10K_4
*10K_4
IC CTRL(8P) EMC1412-1-ACZL-TR
IC CTRL(8P) EMC1412-1-ACZL-TR
+3V
R342 *0/short_4R342 *0/short_4
U22
U22
8
SCLK
7
SDA
6
ALERT#
4
OVERT#
SMSC ADDRESS: 98H
VCC DXP DXN GND
1 2 3 5
SMSC : AL001412003
C336 0.1u/10V_4C336 0.1u/10V_4
H_THERMDA
C333
C333 2200p/50V_4
2200p/50V_4
H_THERMDC
<Layout Note> Routing 10:10 mils and away from noise source with ground gard
2
125 Degree Protection(CPU)
IMVP_PWRGD
+1.05V
R167
CPU
H_THRMTRIP#
R167 56_4
56_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, April 08, 2011
Date: Sheet of
Friday, April 08, 2011
Date: Sheet of
Friday, April 08, 2011
+1.05V
3
Q10
Q10 2N7002K
2N7002K
2
R146
R146 1K_4
1K_4
R163 *0_4R163 *0_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Pineview DMI/Display
Pineview DMI/Display
Pineview DMI/Display
Q12
Q12
1 3
MMBT3904
MMBT3904
1
2
1
<20090721(B2A)> Change Q7 from BAM700200F6 to BAM70020002 (with ESD protection function)
SYS_SHDN# (17,25,26)
PM_THRMTRIP# (9)
ZGB
ZGB
ZGB
Tigerpoint
2A
2A
2A
344
344
344
Page 5
5
D D
C C
DDR3 PWROK
SUSON(21,27,29)
HWPG_1.5V(21,27)
B B
A A
+3V_S5
53
1
4
2
U9
U9 TC7SH08FU
TC7SH08FU
+SMDDR_VREF
5
R142
R142
12.1K/F_4
12.1K/F_4
DDRAM_PWROK
R143
R143 10K_4
10K_4
<EMI>
DG 2.1 : It is strongly recommended that the SODIMM VREF motherboard traces, going from their VREF resistor dividers to their specified SODIMM VREF pins, be ground referenced on the motherboard where ever possible to help minimize risks of any possible noise being coupled onto VREF. If they can't be referenced to ground we recommend placing a site for a 0603 capacitor near the VREF divider. These 0603 capacitor sites must be connected on one end to the non ground reference plane the VREF trace is referenced to and the other end must be connected to ground.
DDR3_DRAMRST#(3)
<Layout note> Close to DDR_VREF pin
R330 *0_4R330 *0_4
C324
C324 *1000p/50V_4
*1000p/50V_4
<Layout note> Close to pin
+1.5VSUS
4
M_A_A[14..0](3)
M_A_WE#(3) M_A_CAS#(3) M_A_RAS#(3)
M_A_BS0(3) M_A_BS1(3) M_A_BS2(3)
M_CS#0(3) M_CS#1(3)
M_CKE0(3) M_CKE1(3)
M_ODT0(3) M_ODT1(3)
M_CLK0(3) M_CLK0#(3) M_CLK1(3) M_CLK1#(3)
R339 80.6/F_4R339 80.6/F_4 R323 80.6/F_4R323 80.6/F_4
+1.5VSUS
R325
R325 1K/F_4
1K/F_4
DDR_VREF
R335 1K/F_4
1K/F_4
4
+1.5VSUS
R296
R296 *10K_4
*10K_4
C329 0.1U/10V_4C329 0.1U/10V_4
C322 0.01U/25V_4C322 0.01U/25V_4
C330
C330R335
0.1u/16V_6
0.1u/16V_6
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8
M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14
M_A_WE# M_A_CAS# M_A_RAS#
M_A_BS0 M_A_BS1 M_A_BS2
M_CS#0 M_CS#1
M_CKE0 M_CKE1
M_ODT0 M_ODT1
M_CLK0 M_CLK#0 M_CLK1 M_CLK#1
DDRAM_PWROK
DDR_VREF SM_RCOMP SM_RCOMP#
AH19
AJ18 AK18 AK16
AJ14
AH14
AK14
AJ12
AH13
AK12 AK20
AH12
AJ11
AJ24
AJ10
AK22
AJ22 AK21
AJ20
AH20
AK11
AH22
AK25
AJ21
AJ25
AH10
AH9
AK10
AK24
AH26 AH24
AK27
AG15
AF15
AD13 AC13
AC15 AD15
AF13
AG13
AD17 AC17
AB15 AB17
AB4 AK8
AB11 AB13
AL28 AK28
AJ26 AK29
AJ8
U21B
U21B
DDR_A_MA_0 DDR_A_MA_1 DDR_A_MA_2 DDR_A_MA_3 DDR_A_MA_4 DDR_A_MA_5 DDR_A_MA_6 DDR_A_MA_7 DDR_A_MA_8 DDR_A_MA_9 DDR_A_MA_10 DDR_A_MA_11 DDR_A_MA_12 DDR_A_MA_13 DDR_A_MA_14
DDR_A_W EB DDR_A_CASB DDR_A_RASB
DDR_A_BS_0 DDR_A_BS_1 DDR_A_BS_2
DDR_A_CSB_0 DDR_A_CSB_1 DDR_A_CSB_2 DDR_A_CSB_3
DDR_A_CKE_0 DDR_A_CKE_1 DDR_A_CKE_2 DDR_A_CKE_3
DDR_A_ODT_0 DDR_A_ODT_1 DDR_A_ODT_2 DDR_A_ODT_3
DDR_A_CK_0 DDR_A_CKB_0 DDR_A_CK_1 DDR_A_CKB_1
DDR_A_CK_3 DDR_A_CKB_3 DDR_A_CK_4 DDR_A_CKB_4
RSVD_AD17 RSVD_AC17 RSVD_AB15 RSVD_AB17
VSS RSVD
RSVD_TP RSVD_TP
DDR_VREF DDR_RPD DDR_RPU
RSVD
Pineview-M 1.66G
Pineview-M 1.66G
DDR_A
DDR_A
3
3
PINEVIEW_M
PINEVIEW_M
REV = 1.1
REV = 1.1
2 OF 6
2 OF 6
DDR_A_DQS_0
DDR_A_DQSB_0
DDR_A_DM_0 DDR_A_DQ_0
DDR_A_DQ_1 DDR_A_DQ_2 DDR_A_DQ_3 DDR_A_DQ_4 DDR_A_DQ_5 DDR_A_DQ_6 DDR_A_DQ_7
DDR_A_DQS_1
DDR_A_DQSB_1
DDR_A_DM_1 DDR_A_DQ_8
DDR_A_DQ_9 DDR_A_DQ_10 DDR_A_DQ_11 DDR_A_DQ_12 DDR_A_DQ_13 DDR_A_DQ_14 DDR_A_DQ_15
DDR_A_DQS_2
DDR_A_DQSB_2
DDR_A_DM_2 DDR_A_DQ_16
DDR_A_DQ_17 DDR_A_DQ_18 DDR_A_DQ_19 DDR_A_DQ_20 DDR_A_DQ_21 DDR_A_DQ_22 DDR_A_DQ_23
DDR_A_DQS_3
DDR_A_DQSB_3
DDR_A_DM_3 DDR_A_DQ_24
DDR_A_DQ_25 DDR_A_DQ_26 DDR_A_DQ_27 DDR_A_DQ_28 DDR_A_DQ_29 DDR_A_DQ_30 DDR_A_DQ_31
DDR_A_DQS_4
DDR_A_DQSB_4
DDR_A_DM_4 DDR_A_DQ_32
DDR_A_DQ_33 DDR_A_DQ_34 DDR_A_DQ_35 DDR_A_DQ_36 DDR_A_DQ_37 DDR_A_DQ_38 DDR_A_DQ_39
DDR_A_DQS_5
DDR_A_DQSB_5
DDR_A_DM_5 DDR_A_DQ_40
DDR_A_DQ_41 DDR_A_DQ_42 DDR_A_DQ_43 DDR_A_DQ_44 DDR_A_DQ_45 DDR_A_DQ_46 DDR_A_DQ_47
DDR_A_DQS_6
DDR_A_DQSB_6
DDR_A_DM_6 DDR_A_DQ_48
DDR_A_DQ_49 DDR_A_DQ_50 DDR_A_DQ_51 DDR_A_DQ_52 DDR_A_DQ_53 DDR_A_DQ_54 DDR_A_DQ_55
DDR_A_DQS_7
DDR_A_DQSB_7
DDR_A_DM_7 DDR_A_DQ_56
DDR_A_DQ_57 DDR_A_DQ_58 DDR_A_DQ_59 DDR_A_DQ_60 DDR_A_DQ_61 DDR_A_DQ_62 DDR_A_DQ_63
AD3 AD2 AD4
AC4 AC1 AF4 AG2 AB2 AB3 AE2 AE3
AB8 AD7 AA9
AB6 AB7 AE5 AG5 AA5 AB5 AB9 AD6
AD8 AD10 AE8
AG8 AG7 AF10 AG11 AF7 AF8 AD11 AE10
AK5 AK3 AJ3
AH1 AJ2 AK6 AJ7 AF3 AH2 AL5 AJ6
AG22 AG21 AD19
AE19 AG19 AF22 AD22 AG17 AF19 AE21 AD21
AE26 AG27 AJ27
AE24 AG25 AD25 AD24 AC22 AG24 AD27 AE27
AE30 AF29 AF30
AG31 AG30 AD30 AD29 AJ30 AJ29 AE29 AD28
AB27 AA27 AB26
AA24 AB25 W24 W22 AB24 AB23 AA23 W27
M_A_DQS0 M_A_DQS#0 M_A_DM0
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7
M_A_DQS1 M_A_DQS#1 M_A_DM1
M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15
M_A_DQS2 M_A_DQS#2 M_A_DM2
M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23
M_A_DQS3 M_A_DQS#3 M_A_DM3
M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31
M_A_DQS4 M_A_DQS#4 M_A_DM4
M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39
M_A_DQS5 M_A_DQS#5 M_A_DM5
M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47
M_A_DQS6 M_A_DQS#6 M_A_DM6
M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55
M_A_DQS7 M_A_DQS#7 M_A_DM7
M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
2
1
05
M_A_DQ[63..0] (3)
M_A_DM[7..0] (3)
M_A_DQS[7..0] (3) M_A_DQS#[7..0] (3)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, April 08, 2011
Date: Sheet of
Friday, April 08, 2011
Date: Sheet of
2
Friday, April 08, 2011
PROJECT :
Pineview DDR
Pineview DDR
Pineview DDR
ZGB
ZGB
ZGB
2A
2A
2A
345
345
1
345
Page 6
1
A A
B B
C C
D D
1
<Layout note> Close to pin
+1.5VSUS
<Layout note> VCCA_DDR and VCCACK_DDR rails can be on the same source but make sure the plane shapes are split near Pineview-M to avoid noise coupling
VCCGFX
2
R148 *Short_6R148 *Short_6
R351 *Short_6R351 *Short_6
2
C123
C123 22U/6.3V_8
22U/6.3V_8
C193 2.2U/6.3V_6C193 2.2U/6.3V_6 C162 1U/6.3V_4C162 1U/6.3V_4 C157 1U/6.3V_4C157 1U/6.3V_4 C176 1U/6.3V_4C176 1U/6.3V_4 C187 1U/6.3V_4C187 1U/6.3V_4 C177 1U/6.3V_4C177 1U/6.3V_4 C166 1U/6.3V_4C166 1U/6.3V_4 C168 1U/6.3V_4C168 1U/6.3V_4
+1.5VSUS
C194 2.2U/6.3V_6C194 2.2U/6.3V_6 C161 1U/6.3V_4C161 1U/6.3V_4 C178 1U/6.3V_4C178 1U/6.3V_4 C201 1U/6.3V_4C201 1U/6.3V_4 C205 1U/6.3V_4C205 1U/6.3V_4
C141
C141 1U/6.3V_4
1U/6.3V_4
C101 22u/6.3V_8C101 22u/6.3V_8 C133 4.7U/6.3V_6C133 4.7U/6.3V_6 C143 1U/6.3V_4C143 1U/6.3V_4
<Layout note> Close to pin AA19
C114 *0.1u/10V_4C114 *0.1u/10V_4 C189 *0.1u/10V_4C189 *0.1u/10V_4
+1.8V
C207 1U/6.3V_4C207 1U/6.3V_4 C208 1U/6.3V_4C208 1U/6.3V_4
VCCGFX_VCCACRTDAC
C337
C337 1u/6.3V_4
1u/6.3V_4
+1.05V +1.05V
+1.05V
3
R176 *Short_8R176 *Short_8
VCC1.5_VCCCK_DDR
+1.05V
C149 1U/6.3V_4C149 1U/6.3V_4
C113 1U/6.3V_4C113 1U/6.3V_4 C119 1U/6.3V_4C119 1U/6.3V_4
3
VCCGFX
AK13 AK19
AL11 AL16 AL21 AL25
AA10 AA11
AA19
AC31
+3V
C321
C321 *1u/6.3V_4
*1u/6.3V_4
W14 W16 W18 W19
AK9
AK7 AL7
U10
W10 W11
V11
A21
T13 T14 T16 T18 T19 V13 V19
T30
T31 J31
U5 U6 U7 U8 U9 V2 V3 V4
C3 B2 C2
U21E
U21E
VCCGFX
1.38A
VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX
VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM
2.27A
VCCCK_DDR VCCCK_DDR
VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR
VCCACK_DDR VCCACK_DDR
VCCD_AB_DPL
VCCD_HMPLL
VCCSFR_AB_DPL
0.154A
VCCACRTDAC
0.006A
VCC_GIO VCCRING_EAST VCCRING_WEST VCCRING_WEST VCCRING_WEST VCC_LGI_VID
5 OF 6
5 OF 6
Pineview-M 1.66G
Pineview-M 1.66G
GFX/MCH
GFX/MCH
1.32A
0.33A
4
PINEVIEW_M
PINEVIEW_M
DDR
DDR
EXP\CRT\PLL
EXP\CRT\PLL
4
REV = 1.1
REV = 1.1
POWER
POWER
DMI
DMI
3.5A
CPU
CPU
0.08A
0.06A
LVDS
LVDS
0.104A
VCCSFR_DMIHMPLL
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
VCCSENSE VSSSENSE
VCCA
VCC
VCCP VCCP
VCCALVD VCCDLVD
0.48A
VCCA_DMI VCCA_DMI VCCA_DMI
RSVD
VCCP
5
VCC_CORE
A23 A25 A27
C170 1U/6.3V_4C170 1U/6.3V_4
B23 B24
C192 1U/6.3V_4C192 1U/6.3V_4
B25 B26
C202 1U/6.3V_4C202 1U/6.3V_4
B27 C24
C199 1U/6.3V_4C199 1U/6.3V_4
C26 D23
C198 22u/6.3V_8C198 22u/6.3V_8
D24 D26
C171 22u/6.3V_8C171 22u/6.3V_8
D28 E22
C188 22u/6.3V_8C188 22u/6.3V_8
E24 E27 F21 F22
12/17: power suggest to add PC75
F25
03/25: move PC75 to page 29
G19 G21 G24 H17 H19 H22 H24 J17 J19 J21 J22 K15 K17 K21 L14 L16 L19 L21 N14 N16 N19 N21
C29 B29
VCC1.5_VCCA
Y2
C303 0.01U/25V_4C303 0.01U/25V_4
D4
C129 *0.1u/10V_4C129 *0.1u/10V_4
B4
VCCP_VCCP
B3
VCC1.8_LCCALVD
V30 W31
VCCP_DMI
T1
C304 1U/6.3V_4C304 1U/6.3V_4
T2
C110 1U/6.3V_4C110 1U/6.3V_4
T3
VCCP_VCCAPLL_DMI
P2
VCC1.8_DMIHMPLL
AA1 E2
+1.05V
5
+1.05V
R298 *Short_4R298 *Short_4
R279 *Short_6R279 *Short_6
R280 *Short_4R280 *Short_4
C302
C302 1u/6.3V_4
1u/6.3V_4
6
R281 *Short_6R281 *Short_6
<Layout note> Close to pin
<20090526(A1A)_EDS Rev0.7> D4 pin is VCCP, not VCC
+1.05V
R345 0.1uH/300mA_6R345 0.1uH/300mA_6
C335
C335 22U/6.3V_8
22U/6.3V_8
+1.05V
+1.8V
6
+1.5V
R282 *0_4R282 *0_4
C305
C305 *1u/6.3V_4
*1u/6.3V_4
+1.8V
C334
C334
1u/6.3V_4
1u/6.3V_4
+1.05V
7
8
06
VCC_CORE
R212
R212 100/F_4
100/F_4
VCCSENSE (26) VSSSENSE (26)
R213
R213 100/F_4
100/F_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, April 08, 2011
Date: Sheet of
Friday, April 08, 2011
Date: Sheet of
Friday, April 08, 2011
7
PROJECT :
Pineview Power
Pineview Power
Pineview Power
ZGB
ZGB
ZGB
346
346
8
346
2A
2A
2A
Page 7
1
PINEVIEW_M
PINEVIEW_M
U21F
U21F
REV = 1.1
A11 A16 A19 A29
A3
A30
A4 AA13 AA14 AA16 AA18
AA2 AA22 AA25 AA26 AA29
AA8 AB19 AB21 AB28 AB29 AB30
AC10 AC11 AC19
AC2 AC21 AC28 AC30 AD26
AD5
AE1 AE11 AE13 AE15 AE17 AE22 AE31 AF11 AF17 AF21 AF24 AF28
AG10
AG3 AH18 AH23 AH28
AH4
A A
AH6
AH8
AJ1 AJ16 AJ31
AK1
AK2 AK23 AK30 AK31 AL13 AL19
AL2 AL23 AL29
AL3 AL30
AL9
B13
B16
B19
B22
B30
B31
C12
C21
C22
C25
C31
D22
E10
E19
E21
E25
F17
F19
B5 B9 C1
E1
E8
REV = 1.1
VSS VSS VSS RSVD_NCTF RSVD_NCTF RSVD_NCTF RSVD_NCTF VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS RSVD_NCTF VSS VSS RSVD_NCTF RSVD_NCTF VSS RSVD_NCTF RSVD_NCTF VSS VSS RSVD_NCTF VSS RSVD_NCTF RSVD_NCTF RSVD_NCTF VSS VSS VSS VSS VSS RSVD_NCTF RSVD_NCTF VSS VSS RSVD_NCTF VSS VSS VSS VSS RSVD_NCTF VSS RSVD_NCTF VSS VSS VSS VSS VSS VSS VSS
Pineview-M 1.66G
Pineview-M 1.66G
GND
GND
6 OF 6
6 OF 6
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS
F24 F28 F4 G15 G17 G22 G27 G31 H11 H15 H2 H21 H25 H8 J11 J13 J15 J4 K11 K13 K19 K26 K27 K28 K30 K4 K8 L1 L13 L18 L22 L24 L25 L29 M28 M3 N1 N13 N18 N24 N25 N28 N4 N5 N8 P13 P14 P16 P18 P19 P21 P3 P4 R25 R7 R8 T11 U22 U23 U24 U27 V14 V16 V18 V28 V29 W13 W2 W23 W25 W26 W28 W30 W4 W5 W6 W7 Y28 Y3 Y4
T29
07
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, April 08, 2011
Date: Sheet of
Friday, April 08, 2011
Date: Sheet of
1
Friday, April 08, 2011
PROJECT :
Pineview GND
Pineview GND
Pineview GND
ZGB
ZGB
ZGB
2A
2A
2A
347
347
347
Page 8
1
08
TGP
U20B
U20B
DMI_RXN0(4)
DMI_RXP0(4) DMI_TXN0(4) DMI_TXP0(4)
DMI_RXN1(4)
DMI_RXP1(4) DMI_TXN1(4) DMI_TXP1(4)
2011/04/06 SWAP PCIE2 to PCIE1 becasue close PCIE1 all port is closed.
PE1RX-(19)
WLAN
PE1RX+(19) PE1TX-(19) PE1TX+(19)
C167 0.1U/10V_4C167 0.1U/10V_4 C173 0.1U/10V_4C173 0.1U/10V_4
C190 0.1U/10V_4C190 0.1U/10V_4 C179 0.1U/10V_4C179 0.1U/10V_4
C137 0.1U/10V_4C137 0.1U/10V_4 C131 0.1U/10V_4C131 0.1U/10V_4
3/11 : cancel Lan function
PE3RX-(23)
A A
Decoder
3G
PE3RX+(23) PE3TX-(23) PE3TX+(23)
PE4RX-(19)
PE4RX+(19) PE4TX-(19) PE4TX+(19)
C148 0.1U/10V_4C148 0.1U/10V_4
C159 0.1U/10V_4C159 0.1U/10V_4 C156 0.1U/10V_4C156 0.1U/10V_4
T65T65 T66T66 T67T67 T68T68
DMI_TXN0_C DMI_TXP0_C
DMI_TXN1_C DMI_TXP1_C
PCIE_TXN1_C PCIE_TXP1_C
PCIE_TXN3_C PCIE_TXP3_C
PCIE_TXN4_C PCIE_TXP4_C
R23 R24 P21 P20 T21 T20 T24 T25 T19 T18 U23 U24 V21 V20 V24 V23
K21 K22
J23
J24 M18 M19 K24 K25
L23
L24
L22 M21 P17 P18 N25 N24
DMI0RXN DMI0RXP DMI0TXN DMI0TXP DMI1RXN DMI1RXP DMI1TXN DMI1TXP DMI2RXN DMI2RXP DMI2TXN DMI2TXP DMI3RXN DMI3RXP DMI3TXN DMI3TXP
PERN1 PERP1 PETN1 PETP1 PERN2 PERP2 PETN2 PETP2 PERN3 PERP3 PETN3 PETP3 PERN4 PERP4 PETN4 PETP4
TGP
H7
USBP0N
H6
USBP0P
H3
USBP1N
H2
USBP1P
J2
USBP2N
J3
DMI
DMI
USB
USB
PCI-E
PCI-E
USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P
OC0# OC1# OC2# OC3#
OC4# OC5#/GPIO29 OC6#/GPIO30 OC7#/GPIO31
USBRBIAS
USBRBIAS#
CLK48
K6 K5 K1 K2 L2 L3 M6 M5 N1 N2
USBOC#R1
D4
USBOC#
C5
USBOC#
D3
USBOC#L1
D2
USBOC#
E5
USBOC#
E6
USBOC#
C2
USBOC#
C3
G2 G3
CLKUSB_48
F4
USBRBIAS
USBP0- (17) USBP0+ (17) USBP1- (19) USBP1+ (19) USBP2- (14) USBP2+ (14) USBP3- (17) USBP3+ (17) USBP4- (20) USBP4+ (20) USBP5- (19) USBP5+ (19) USBP6- (15) USBP6+ (15) USBP7- (19) USBP7+ (19)
2011/04/08: change OC6# to oC0#
R285 *Short_4R285 *Short_4
R294 *Short_4R294 *Short_4
<Layout note> Close to pin within 200mil ; keep away from CLK/High speed signals
R302 22.6/F_4R302 22.6/F_4C142 0.1U/10V_4C142 0.1U/10V_4
CLKUSB_48 (2)
SYSTEM (Right down) SIM CCD System (Left) Card reader 3G BT WLAN
USBOC#R (17,21)
USBOC#L (17,21)
USBOC#R1
USBOC#L1 USBOC#
12/21: CRB ties some unused OC pins together with 1k
R290 8.2K_4R290 8.2K_4
+3V_S5
R291 8.2K_4R291 8.2K_4 R284 1K/F_4R284 1K/F_4
+1.5V
<Layout note> Close to pin within 500mil
R153 24.9/F_4R153 24.9/F_4
CLK_PCIE_ICH#(2) CLK_PCIE_ICH(2)
DMI_COMP
H24
J22
W23 W24
DMI_ZCOMP DMI_IRCOMP
DMI_CLKN DMI_CLKP
Tiger Point
Tiger Point
EMI
CLKUSB_48
R297
R297 *10/F_4
2
2
1
*10/F_4
C311
C311 *10P/50V_4
*10P/50V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, April 08, 2011
Date: Sheet of
Friday, April 08, 2011
Date: Sheet of
Friday, April 08, 2011
PROJECT :
Tiger Point DMI/PCIE/USB
Tiger Point DMI/PCIE/USB
Tiger Point DMI/PCIE/USB
ZGB
ZGB
ZGB
348
348
348
2A
2A
2A
Page 9
5
4
3
2
1
09
TGP
U20C
U20C
TGP
INIT# INTR
NMI
SMI#
AE6 AD6 AC7 AD7 AE8 AD8 AD9 AC9
AD4 AC4
AD11 AC11 AD25
U16 Y20 Y21 Y18 AD21 AC25 AB24 Y22 T17 AC21 AA16 AA21 V18 AA20
SATARBIAS#
GA20
KBRST#
SATA_RXN0 (18) SATA_RXP0 (18) SATA_TXN0 (18) SATA_TXP0 (18)
CLK_PCIE_SATA# (2) CLK_PCIE_SATA (2)
SATALED#
R334 10K/J_4R334 10K/J_4
GA20 (21)
H_A20M# (4) H_IGNNE# (4) H_INIT# (4)
H_INTR (4) H_NMI (4)
KBRST# (21)
SERIRQ (21,23)
H_SMI# (4) H_STPCLK# (4)
SATA SSD
<Layout note> Close to pin within 500mil
R327 24.9/F_4R327 24.9/F_4
T69T69
+3V
+1.05V
R186
R186 56/J_4
56/J_4
<20090514(A1A)_Checklist Rev0.7> SERIRQ:8.2K pull-up A20GATE:10K pull-up
SERIRQ GA20 KBRST# PCH_GPIO36
<Layout note> Close to pin within 200mil
<Layout note> Close to pin
+1.05V
H_FERR# (4)
R187
R187 56/J_4
56/J_4
R332 8.2K_4R332 8.2K_4 R204 10K_4R204 10K_4 R200 10K/J_4R200 10K/J_4 R197 *10K/J_4R197 *10K/J_4
<20100105(A1A)> SY3 GA20: 8.2K pull-up
<Layout note> Close to pin within 1"
PM_THRMTRIP# (4)
+3V
D D
C C
B B
PCH_GPIO36
R12 AE20 AD17 AC15 AD18
Y12 AA10 AA12
Y10 AD15
W10
V12 AE21 AE18 AD19
U12 AC17
AB13 AC13 AB15
Y14 AB16
AE24 AE23
AA14
V14
AD16 AB11 AB10 AD23
RSVD03 RSVD04 RSVD05 RSVD06 RSVD07 RSVD08 RSVD09 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18
RSVD19 RSVD20 RSVD21 RSVD22 RSVD23
RSVD24 RSVD25 RSVD26
RSVD27 RSVD28
RSVD29 RSVD30 RSVD31 GPIO36
SATA0RXN SATA0RXP
SATA0TXN
SATA0TXP SATA1RXN SATA1RXP
SATA1TXN
SATA1TXP
SATA
SATA
SATA_CLKN SATA_CLKP
SATARBIAS#
SATARBIAS
SATALED#
A20GATE
A20M#
CPUSLP#
IGNNE#
INIT3_3V#
HOST
HOST
FERR#
RCIN#
SERIRQ
STPCLK#
THERMTRIP#
3
3
Tiger Point
Tiger Point
NOTE
:
1. CPUSLP# is supported only on nettop platforms.
A A
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
Date: Sheet of
Friday, April 08, 2011
Friday, April 08, 2011
Friday, April 08, 2011
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Tiger Point Sata/Host
Tiger Point Sata/Host
Tiger Point Sata/Host
ZGB
ZGB
ZGB
2A
2A
2A
349
349
1
349
Page 10
5
PCI_DEVSEL#
PCLK_ICH(2)
PCI_IRDY#
D D
<20090601(A1A)_Checklist Rev0.7> Strap1#/strap2#: signals have weak internal pull-ups
C C
EC_SCI#(21)
PCI_INTG#(17)
+3V
B B
EC_SCI#
PCI_INTH#(23)
T30T30 R132 10K/J_4R132 10K/J_4 R139 8.2K/J_4R139 8.2K/J_4
PCI_SERR# PCI_STOP# PCI_LOCK# PCI_TRDY# PCI_PERR# PCI_FRAME#
PCI_REQ1# PCI_REQ2#
PCH_GPIO48 PCH_GPIO17 PCH_GPIO22
PCI_INTA# PCI_INTB# PCI_INTC# PCI_INTD# PCI_INTE# PCI_INTF# PCI_INTG# PCI_INTH#
PCH_A16WP
ICH Boot BIOS select
PCH_GPIO17 (INT PU)
0 1 SPI 1 0 PCI 1 1 LPC
R138*1K_4 R138*1K_4 R2781K_4 R2781K_4
PCH_GPIO48 (INT PU)
PCH_GPIO48 PCH_GPIO17
T29T29
T16T16
4
A5
B15
J12
A23
B7
C22
B11 F14
A8
A10
D10
A16
A18 E16
G16
A20
G14
A2
C15
C9
B2
D7
B3
H10
E8 D6 H8
F8
D11
K9
M13
Boot BIOS Location
(Default)
R137*1K_4 R137*1K_4 R266*1K_4 R266*1K_4
U20A
U20A
PAR DEVSEL# PCICLK PCIRST# IRDY# PME# SERR# STOP# PLOCK# TRDY# PERR# FRAME#
GNT1# GNT2#
REQ1# REQ2#
GPIO48/ STRAP1# GPIO17/ STRAP2# GPIO22 GPIO1
PIRQA# PIRQB# PIRQC# PIRQD# PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5
STRAP0# RSVD01 RSVD02
Tiger Point
Tiger Point
PCI
PCI
TGP
TGP
+3V
3
C/BE0# C/BE1# C/BE2# C/BE3#
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8
AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
1
1
B22 D18 C17 C18 B17 C19 B18 B19 D16 D15 A13 E14 H14 L14 J14 E10 C11 E12 B9 B13 L12 B8 A3 B5 A6 G12 H12 C8 D9 C7 C1 B1
H16 M15 C13 L16
2
PCI_INTA# PCI_INTC# PCI_INTF# PCI_INTB#
PCI_IRDY# PCI_LOCK# PCI_PERR# PCI_TRDY#
PCI_DEVSEL# PCI_FRAME# PCI_REQ1# PCI_REQ2#
PCI_STOP# PCI_SERR# EC_SCI#
PCI_INTD# PCI_INTH# PCI_INTG# PCI_INTE#
PCH_GPIO22
IRQ
PIRQA PIRQB PIRQC PIRQD PIRQE PIRQF PIRQG PIRQH
PCI_GNT#2 Internal PU
RP2 8.2K_8P4RRP2 8.2K_8P4R
RP4 8.2K_8P4RRP4 8.2K_8P4R
1 3 5 7
RP3 8.2K_8P4RRP3 8.2K_8P4R
1 3 5 7
1 3 5 7
R268 8.2K/J_4R268 8.2K/J_4T15T15 R267 8.2K/J_4R267 8.2K/J_4 R140 10K_4R140 10K_4
RP1 8.2K_8P4RRP1 8.2K_8P4R
1 3 5 7
USB UHCI Controller #1, #4
AC'97 Codec; option for SMBUS USB UH Controller #3; SATA/IDE Native Mode USB UHCI Controller #2 Internal LAN; Option for SCI, TCO, HPET#0,1,2 Option for SCI, TCO, HPET#0,1,2 Option for SCI, TCO, HPET#0,1,2 USB EHCI Controller; Option for SCI, TCO, HPET#0,1,2
Should not be PD
2 4 6 8
2 4 6 8
2 4 6 8
2 4 6 8
R2698.2K_4 R2698.2K_4
Description
+3V
+3V
+3V
+3V
+3V
+3V
1
10
A A
A16 SWAP Override strap
PCH_A16WP (INT PU)
5
Low = A16 swap override enabled High = Default
4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
3
Date: Sheet of
Friday, April 08, 2011
Friday, April 08, 2011
Friday, April 08, 2011
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
TigerPoint PCI(3/6)
TigerPoint PCI(3/6)
TigerPoint PCI(3/6)
ZGB
ZGB
ZGB
1
2A
2A
2A
3410
3410
3410
Page 11
5
EMI
14M_ICH
R320
R320 *33/J_4
*33/J_4
C323
C323 *10P/50V_4
D D
*10P/50V_4
debug port for google require
SPI_MISO_R SPI_MOSI
SPI_CS#
C332
C332
1u/10V_6
1u/10V_6
R338
R338
20K/F_6
20K/F_6
C331
C331
1u/10V_6
1u/10V_6
SPI_CS# SPI_MISO SPI_MOSI_R
RTCRST#VCCRTC_3
R348
R348 1K_4
1K_4
SPI_MISO_R(17)
SPI_MOSI(17)
R151 10K_4R151 10K_4 R308 10K_4R308 10K_4 R312 10K_4R312 10K_4
place near to Tiger point.
R307 49.9/F_4R307 49.9/F_4
SPI_CLK(17)
SPI_CS#(17)
VCCRTC
D30
D30
CH500H-40
CH500H-40
D31
D31
CH500H-40
CH500H-40
+3V
C C
SPI FLASH(CLG)
SPI_MISO
R152 10K_4R152 10K_4
+3V_deg
2011/04/06 change power plant to +3V_deg.
1/13 Comfirm by vendor mail : If the Southbridge enables 'Long Wait Abort' by default, the flash device should be 50MHz (or faster)
RTC(RTC)
B B
+3VPCU
ACZ_BITCLK_AUDIO(16) ACZ_RESET#_AUDIO(16)
ACZ_SDIN0(16)
ACZ_SDOUT_AUDIO(16)
ACZ_SYNC_AUDIO(16)
14M_ICH(2)
+3V_deg
D34
D34
RSX101M-30
VDD
HOLD
VSS
WP
RSX101M-30
8
R120 3.3K_4R120 3.3K_4
7
MANU_SW_R1SPI_CLK
3 4
U11
U11
2
SO
5
SI
6
SCK
1
CE
W25Q32BVSSIG
W25Q32BVSSIG
for ZGA use: Winbond W25Q32BVSSIG AKE391P0N00 MXIC MX25L3205DM2I-12G AKE39FP0Z00
G3
G3
12
*SHORT_PAD
*SHORT_PAD
20MIL 20MIL
1 3
Q26
Q26
MMBT3904
MMBT3904
2
A A
12
CN22
CN22 RTC SOCKET
RTC SOCKET
5
R415 4.7K_4R415 4.7K_4
4
LPCAD0(19,21,23) LPCAD1(19,21,23) LPCAD2(19,21,23) LPCAD3(19,21,23)
LPCFRAME#(19,21,23)
R160 33/J_4R160 33/J_4 R161 33/J_4R161 33/J_4
R185 33/J_4R185 33/J_4 R175 33/J_4R175 33/J_4
<20090529(A1A)_Checklist Rev0.7> If integrated LAN is not used LAN_RST# tie it to GND.
C318 15P/50V_4C318 15P/50V_4
Y3
Y3
32.768K/10PPM
32.768K/10PPM
C320 15P/50V_4C320 15P/50V_4
PCLK_SMB(2,19) PDAT_SMB(2,19)
SPI_MOSI
+3V
21
2011/04/06 change power plant to +3V_deg.
C96
C96 .1u/10V_4
.1u/10V_4
VCCRTC_2VCCRTC_1VCCRTC_4
R310 49.9/F_4R310 49.9/F_4 R361 49.9/F_4R361 49.9/F_4
SPI_CLK
R305 49.9/F_4R305 49.9/F_4
+3V_deg
MANU_SW_R1
2011/04/07 change power plant to +3V_deg.
DEG_RST#(17)
4
ACZ_BITCLK_R ACZ_RST#_R
ACZ_SDOUT_R ACZ_SYNC_R
14M_ICH
21
R319
R319 10M/J_4
10M/J_4
RTCRST#
SMBALERT#
PCLK_SMB
PDAT_SMB SMB_LINK_ALERT# SMLINK0 SMLINK1
+3V_deg
R438
R438 100K/F_4
100K/F_4
D26 BAS316D26 BAS316
+3V
R211
R211
4.7K_4
4.7K_4
R422 4.7K_4R422 4.7K_4
1.Level 1 Environment-related Substances Should NEVER be Used.
2.Purchase ink, paint, wire rods, and Molding resins only from the business Partners that Sony approves as Green Partners.
T24T24
AA5
V6
AA6
Y5
W8
T25T25
Y8 Y4
P6 U2
W2
V2 P8
AA1
Y1
AA3
U3
AE2
T6 V3
T4
P7 B23 AA2
AD1 AC2
W3
T7
U4
RTC_X1
W4
RTC_X2
V5
T5 E20
H18 E23 H21
F25 F24
SPI_MISO
R2
SPI_MOSI_R
T1
SPI_CS#_RSPI_CS#
M8
SPI_CLK_R
P9
T22T22
R4
Platform Reset
PLT_RST#
+5V_S5
R421
R421
68.1K/F_4
68.1K/F_4
R414
R414
150K/F_4
150K/F_4
3
TGP
EPROM
EPROM
TC7SH08FU
TC7SH08FU
4
TGP
MISC
MISC
R286
R286 100K_4
100K_4
CPUPWRGD/GPIO49
SUS_STAT#/LPCPD#
BM_BUSY#/GPIO0
VRMPWRGD MCH_SYNC#
SYS_RESET#
INTRUDER#
PLTRST# (4,19,21,22,23)
LPC AUDIO LAN
LPC AUDIO LAN
RTC SMB SPI
RTC SMB SPI
3
U20D
U20D
LDRQ1#/GPIO23 LAD0/FW H0 LAD1/FW H1 LAD2/FW H2 LAD3/FW H3 LDRQ0# LFRAME#
HDA_BIT_CLK HDA_RST# HDA_SDI0 HDA_SDIN1 HDA_SDIN2 HDA_SDOUT HDA_SYNC CLK14
EE_CS EE_DIN EE_DOUT EE_SHCLK
LAN_CLK LANR_STSYNC LAN_RST# LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2
RTCX1 RTCX2 RTCRST#
SMBALERT#/GPIO11 SMBCLK SMBDATA SMLALERT# SMLINK0 SMLINK1
SPI_MISO SPI_MOSI SPI_CS# SPI_CLK SPI_ARB
Tiger Point
Tiger Point
MANU_SW_R (17,21)
+3V
C299 0.1u/10V_4C299 0.1u/10V_4
U19
U19
2 1
3 5
R283 *0_4R283 *0_4
<2011/04/07> Stuff U19 and C299 and un-stuff R283 follow up Intel CRB. 2011/4/8 add U19 pin1 to Deg_RST# from debug port.
GPIO6 GPIO7 GPIO8
GPIO9 GPIO10 GPIO12 GPIO13 GPIO14 GPIO15
DPRSLPVR
STP_PCI#
STP_CPU#
GPIO24 GPIO25 GPIO26 GPIO27 GPIO28
CLKRUN#
GPIO33 GPIO34 GPIO38 GPIO39
THRM#
PWRBTN#
RI#
SUSCLK
PLTRSTB
WAKE#
PWROK
RSMRST#
INTVRMEN
SPKR
SLP_S3# SLP_S4# SLP_S5#
BATLOW #
DPRSTP#
DPSLP# RSVD31
ACZ_SDOUT (INT PD)
0
0
1
D23,D24 are just for preventing EC/SB F/W error to cause to leakage current.If test OK, they can be connected directly.
BM_BUSY#
T15
RECOVER_KEY#_R1
W16
DEVELOPER#_R1
W14
EC_SMI#
K18
LID#_ICH
H19
MANU
M17
SINT_TP
A24
MBID1
C23
MBID0
P5
HDMI_CON_HP_TP
E24 AB20 Y16 AB19
PCH_GPIO24
R3
DMI_AC_ENABLE
C24
HINT_TP
D19
PCH_GPIO27
D20
PCH_GPIO28
F22
CLKRUN#
AC19
PCH_GPIO33
U14
PCH_GPIO34
AC1
PCH_GPIO38
AC23
PCH_GPIO39
AC24 AB22 AB17
V16
MCH_SYNC#
AC18
DNBSWON#
E21
ICH_RI#
H23
TPM_LPCPD#
G22
SUSCLK
D22
SYS_RST#
G18
PLT_RST#
G23
PCIE_WAKE#
C25
SM_INTRUDER#
T8
TPT_PWROK
U10
EC_RSMRST#
AC3
ICH_INTVRMEN
AD3 J16
H20 E25 F21
B25 AB23 AA18 F20
T17T17
PM_BATLOW#
<20090721(B2A)> Stuff U19 and C275 and un-stuff R205 for power sequence
2
D24 BAS316D24 BAS316 D23 BAS316D23 BAS316
D21 BAS316D21 BAS316
R1180_4 R1180_4
1C: Intel suggestion enable AC mode
T51T51 T46T46 T47T47
CLKRUN# (21,23)
T48T48 T49T49 T50T50 T45T45
H_PWRGD (4)
THERM_ALERT# (4)
VR_PWRGD_CK410 (2) DNBSWON# (21)
TPM_LPCPD# (23)
SUSCLK (21)
PCIE_WAKE# (19)
EC_RSMRST# (21) SB_BEEP (16) SUSB# (21)
SUSC# (21)
ICH_DPRSTP# (4,26) H_DPSLP# (4)
TPT Power OK
HWPG(21)
IMVP_PWRGD(4,26)
ECPWROK(21)
ACZ_SYNC (INT PD)
0
0
1
1 1 x 4s(1 port/4 lanes)
Description
4 x 1s
*
Reserved1
Reserved
2
RECOVER_KEY#_R (17,21) DEVELOPER#_R (17,21) EC_SMI# (17,21) LID# (14,17,21) MANU_SW_TPT (21)
HDMI_CON_HP_TP (22)
PM_DPRSLPVR (4,26) PM_STPPCI# (2) PM_STPCPU# (2)
PCH_GPIO24 (17)
R164 1M/F_6R164 1M/F_6
R328 332K/F_4R328 332K/F_4
+3V
U14
U14
2 1
3 5
R207 *0/short_4R207 *0/short_4 R205 *0_4R205 *0_4
MBID1 MBID0 SINT_TP
1
R130 2.2K_4R130 2.2K_4 R127 2.2K_4R127 2.2K_4
R273 8.2K_4R273 8.2K_4 R188 8.2K_4R188 8.2K_4 R117 *10K_4R117 *10K_4 R150 8.2K_4R150 8.2K_4
R154 10K_4R154 10K_4 R115 10K_4R115 10K_4 R129 10K_4R129 10K_4 R128 10K_4R128 10K_4 R274 10K_4R274 10K_4 R276 10K_4R276 10K_4 R277 10K_4R277 10K_4 R272 *8.2K_4R272 *8.2K_4 R116 10K_4R116 10K_4
R182 1K/F_4R182 1K/F_4 R183 8.2K_4R183 8.2K_4 R331 1K/F_4R331 1K/F_4 R333 8.2K_4R333 8.2K_4 R195 8.2K_4R195 8.2K_4
R275 1K_4R275 1K_4 R172 10K_4R172 10K_4 R190 10K_4R190 10K_4
+3V_S5
R359
R359
R271
R271
10K_4
10K_4
10K_4
10K_4
R270
R270
R262
R262
*10K_4
*10K_4
*10K_4
*10K_4
11
+3V_S5
+3V
R304
R304 10K_4
10K_4
R306
R306 *10K_4
*10K_4
VCCRTC
C209 *0.1u/10V_4C209 *0.1u/10V_4
*TC7SH08FU
*TC7SH08FU
4
<20090515(A1A)_Checklist Rev0.7> BATLOW#:8.2K pull-up to V3ALWAYS WAKE#:10K pull-up to VccSus3_3 SYS_RST#:10K pull-up to VccSus3_3
PCLK_SMB PDAT_SMB
PM_BATLOW# THERM_ALERT# DNBSWON# LID#_ICH
EC_SMI# SYS_RST# SMBALERT# SMB_LINK_ALERT# PCIE_WAKE# SMLINK1 SMLINK0 HDMI_CON_HP_TP ICH_RI#
RECOVER_KEY#_R1 DEVELOPER#_R1 MCH_SYNC# CLKRUN# BM_BUSY#
DMI_AC_ENABLE TPT_PWROK EC_RSMRST#
TPT_PWROK
INTVRMEN
Enable internal VccSus1_5 VRM
1
(default)
Disable
0
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, April 08, 2011
Date: Sheet of
Friday, April 08, 2011
Date: Sheet of
Friday, April 08, 2011
PROJECT :
TigerPoint GPIO
TigerPoint GPIO
TigerPoint GPIO
ZGB
ZGB
ZGB
3411
3411
1
3411
2A
2A
2A
Page 12
1
<Layout note> Place 0402 caps close to ball Place 0603/0805 caps close to ICH
12
D20 1SS355D20 1SS355
VCC5_VCC5REF
TGP
U20E
U20E
A A
TGP
VCCRTC
F12
F5 Y6 AE3 Y25 F6
W18
AA8 M9 M20 N22
J10 K17 P15 V10
H25 AD13 F10 G10 R10 T9
VCCP_VCC1_05
VCC1.5_VCC1.5
VCCP_VCC1_05
VCC3_VCC3
6mA
VCC5REF
10mA
VCC5REF_SUS
45mA
VCCSATAPLL
6uA
24mA
VCCDMIPLL
10mA
VCCUSBPLL
14mA
V_CPU_IO
1.422A
POWER
POWER
0.955A
0.216A
VCC1_5_1 VCC1_5_2 VCC1_5_3 VCC1_5_4
VCC1_05_1 VCC1_05_2 VCC1_05_3 VCC1_05_4
VCC3_3_1 VCC3_3_2 VCC3_3_3 VCC3_3_4 VCC3_3_5 VCC3_3_6
RVCC5_VCC5REF_SUS
VCC1.5_SATAPLL
VCC1.5_VCCDMIPLL
C195 1U/6.3V_4C195 1U/6.3V_4 C130 1U/6.3V_4C130 1U/6.3V_4 C155 1U/6.3V_4C155 1U/6.3V_4 C164 0.1U/10V_4C164 0.1U/10V_4 C120 0.1U/10V_4C120 0.1U/10V_4
1u/10V_4C91 1u/10V_4C91
C132 0.1u/10V_4C132 0.1u/10V_4
C191 0.1u/10V_4C191 0.1u/10V_4 C328 0.1U/10V_4C328 0.1U/10V_4
C325 0.01U/25V_4C325 0.01U/25V_4
C326 0.01U/25V_4C326 0.01U/25V_4
C153 0.1U/10V_4C153 0.1U/10V_4 C146 0.1U/10V_4C146 0.1U/10V_4 C124 1U/6.3V_4C124 1U/6.3V_4 C186 1U/6.3V_4C186 1U/6.3V_4 C206 10U/6.3V_8C206 10U/6.3V_8
C172 1U/6.3V_4C172 1U/6.3V_4 C152 1U/6.3V_4C152 1U/6.3V_4 C197 10U/6.3V_8C197 10U/6.3V_8
R329 *Short_6R329 *Short_6
R111 100/F_4R111 100/F_4
D22 1SS355D22 1SS355
R145 10/F_4R145 10/F_4
VCCRTC
21
21
R209 *Short_8R209 *Short_8
R194 *Short_8R194 *Short_8
+3V
R202 *Short_6R202 *Short_6
C204
C204 10u/6.3V_8
10u/6.3V_8
+3V +5V
+3V_S5 +5V_S5
+1.5V
+1.05V
+1.5V
L30 *Short_6L30 *Short_6
C327
C327 *4.7u/6.3V_6
*4.7u/6.3V_6
+1.5V
Tiger Point
Tiger Point
RVCC3_VCCSUS3
0.092A
VCCSUS3_3_1 VCCSUS3_3_2 VCCSUS3_3_3 VCCSUS3_3_4
1.Level 1 Environment-related Substances Should NEVER be Used.
2.Purchase ink, paint, wire rods, and Molding resins only from the business Partners that Sony approves as Green Partners.
F18
C140 1U/6.3V_4C140 1U/6.3V_4
N4
C116 1U/6.3V_4C116 1U/6.3V_4
K7
C147 0.1U/10V_4C147 0.1U/10V_4
F1
5
5
R141 *Short_6R141 *Short_6
1
+3V_S5
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, April 08, 2011
Date: Sheet of
Friday, April 08, 2011
Date: Sheet of
Friday, April 08, 2011
PROJECT :
TigerPoint Power
TigerPoint Power
TigerPoint Power
ZGB
ZGB
ZGB
3412
3412
3412
2A
2A
2A
Page 13
1
13
U1LB
U1LB
TGP
U20F
U20F
A A
TGP
A1
VSS01
A25
VSS02
B6
VSS03
B10
VSS04
B16
VSS05
B20
VSS06
B24
VSS07
E18
VSS08
F16
VSS09
G4
VSS10
G8
VSS11
H1
VSS12
H4
VSS13
H5
VSS14
K4
VSS15
K8
VSS16
K11
VSS17
K19
VSS18
K20
VSS19
L4
VSS20
M7
VSS21
M11
VSS22
N3
VSS23
N12
VSS24
N13
VSS25
N14
VSS26
N23
VSS27
P11
VSS28
P13
VSS29
P19
VSS30
R14
VSS31
R22
VSS32
T2
VSS33
T22
VSS34
V1
VSS35
V7
VSS36
V8
VSS37
V19
VSS38
V22
VSS39
V25
VSS40
W12
VSS41
W22
VSS42
Y2
VSS43
Y24
VSS44
AB4
VSS45
AB6
VSS46
AB7
VSS47
AB8
VSS48
AC8
VSS49
AD2
VSS50
AD10
VSS51
AD20
VSS52
AD24
VSS53
AE1
VSS54
AE10
VSS55
AE25
VSS56
G24
VSS57
AE13
VSS58
F2
VSS59
AE16
RSVD32
Tiger Point
Tiger Point
1.Level 1 Environment-related Substances Should NEVER be Used.
2.Purchase ink, paint, wire rods, and Molding resins only from the business Partners that Sony approves as Green Partners.
1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, April 08, 2011
Date: Sheet of
Friday, April 08, 2011
Date: Sheet of
Friday, April 08, 2011
PROJECT :
TigerPoint GND
TigerPoint GND
TigerPoint GND
ZGB
ZGB
ZGB
3413
3413
3413
2A
2A
2A
Page 14
<20090724(B2A)> Change R5 from CS41002JB20 to CS44702JB15 (Follow vendor's suggestion and reduce power)
PT3661-BB: AL003661003 ; pull-up: 470K ohm
D D
C C
+3V
R218
R218 10K_4
10K_4
DISPON
Q16
Q16
2N7002K
2N7002K
Q15
Q15 DTC144EU
DTC144EU
1 3
CRT(CRT)
B B
5
HALL SENSOR(HSR) CAMERA POWER(CCD)
+3VPCU
+3V
3
BL#
2
1
Q17
Q17
2N7002K
2N7002K
2
R25 100K_4R25 100K_4
LID#
2
1
C23
C23
3
0.1u/25V_6
0.1u/25V_6 MR1
R219
R219 10K_4
10K_4
<20090721(B2A)> Change Q13,Q14 from BAM700200F6 to
3
BAM70020002 (with ESD protection function)
2
1
MR1 PT3661-BB
PT3661-BB
D25 BAS316D25 BAS316
R220
R220 100K_4
100K_4
D5
D5
*VPORT_6
*VPORT_6
INT_LVDS_BLON (4)
EC_FPBACK# (21)
3/11 : cancel CRT function
4
21
LID# (11,17,21)
3
LED Panel POWER SWITCH(LDS)
Irush=1.5A
LCDVCC_1 LCDVCC
R256 *Short_8R256 *Short_8
12
C265
LCDVCC_1
1 2 5
C265
4.7U/10V/8
4.7U/10V/8
C34
C34
C44
C63
C63 *0.1u/10V_4
*0.1u/10V_4
+3V
U6
R70
R70
100K_4
100K_4
U6
6
IN
4
IN
3
ON/OFF
IC(5P) G5243AT11U
IC(5P) G5243AT11U
C55
C55 1u/10V_6
1u/10V_6
INT_LVDS_DIGON(4)
0.1u/10V_4
0.1u/10V_4
C44 33p/50V_4
33p/50V_4
OUT GND GND
2
+3V
+5V
R59 *Short_8R59 *Short_8
R369 *0_8R369 *0_8
LED Panel(LDS)
VIN
R46 *Short_8R46 *Short_8
C47
C269
C269
10u/25V_1206
10u/25V_1206
INT_LVDS_PWM(4)
CONTRAST(21)
C47 1000p/50V_4
1000p/50V_4
R44 *Short_4R44 *Short_4
R45 *0_4R45 *0_4
C35 *3300P/50V_4C35 *3300P/50V_4
CCD_POWER
C49 10u/10V_8
C49 10u/10V_8 C50 1000p/50V_4C50 1000p/50V_4 C46 *0.1u/10V_4C46 *0.1u/10V_4
V_BLIGHT
C36
C36
0.1u/50V_6
0.1u/50V_6
LVDS_CLK(4) LVDS_DATA(4)
INT_TXLOUTN0_L1(22) INT_TXLOUTP0_L1(22)
INT_TXLOUTN1_L1(22) INT_TXLOUTP1_L1(22)
INT_TXLOUTN2_L1(22) INT_TXLOUTP2_L1(22)
INT_TXLCLKN_L1(22) INT_TXLCLKP_L1(22)
CCD_POWER
+
+
CCD_POWER
LCD_VADJ
LCDVCC
C40
C40
0.1u/10V_4
0.1u/10V_4
0.15A
LVDS_CLK LVDS_DATA
INT_TXLOUTN0_L1 INT_TXLOUTP0_L1
INT_TXLOUTN1_L1 INT_TXLOUTP1_L1
INT_TXLOUTN2_L1 INT_TXLOUTP2_L1
INT_TXLCLKN_L1 INT_TXLCLKP_L1
DISPON
USBP2-_CCD USBP2+_CCD
DMIC_CLK_R
DMIC_DAT_R
14
+3V
1
V_BLIGHT
CN1
CN1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
31
26
26
32
27
27
33
28
28
34
29
29
30
30
LCD(111C30-000001-G4 )
LCD(111C30-000001-G4 )
31 32 33 34
B-test 8/11: for EMI
R42 *0_4R42 *0_4
L7
L7
WCM-2012-900T
WCM-2012-900T
2 3
R41 *0_4R41 *0_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
CRT/LVDS
CRT/LVDS
CRT/LVDS
1
1
2
443
ZGB
ZGB
ZGB
14 34Friday, April 08, 2011
14 34Friday, April 08, 2011
14 34Friday, April 08, 2011
1
USBP2-_CCD
USBP2+_CCD
2A
2A
2A
DMIC_CLK(16)
DMIC_DAT(16)
A A
5
4
3
R254 *Short_4R254 *Short_4
R255 *Short_4R255 *Short_4
2
C263
C263
*220P/50V_4
*220P/50V_4
C264
C264
*220P/50V_4
*220P/50V_4
DMIC_CLK_R
USBP2-(8)
USBP2+(8)
DMIC_DAT_R
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Page 15
5
4
3
2
1
TOUCH PAD(TPD)
2011/3/28 Remove 4pin connector
+3V_TP
D D
196047-06021
196047-06021
1 2 3 4 5
7
6
8
CN3
CN3
TPCLK_8 TPDATA_8
C312
C312
T31T31 T58T58
10p/50V_4
10p/50V_4
L29 0_6L29 0_6 L28 0_6L28 0_6
C310
C310
10p/50V_4
10p/50V_4
+3V_TP
R299
R299
R295
R295
4.7K_4
4.7K_4
4.7K_4
4.7K_4
+3V_TP +3V_S5
TPCLK (21) TPDATA (21)
<EMI>
L27 0_8L27 0_8
CX121T30001:3A/120ohm_8
C309
C309
0.1u/10V_4
C C
0.1u/10V_4
BLUETOOTH(BTM)
2011/03/31 for BT soft star
+3V_S5
0.33u/10V_6
0.33u/10V_6
BT_POWERON#(21)
C410
C410
R261
R261 47K_4
47K_4
10K_4
10K_4
R221
R221
AO3413
AO3413
1
2
3
Q18
Q18
C222
C222 1000p/50V_4
1000p/50V_4
+
+
C223
C223
0.22u/25V_6
0.22u/25V_6
BT_POWER
C224
C224 1000p/50V_4
1000p/50V_4
CN6
CN6
5
USBP6+(8)
USBP6-(8)
T26T26
BT_LED
4 3 2
7
1
6
BT_CONN
BT_CONN
Connector (UIF)
CN4
CN4
1 2
WLAN_LED#
3
3G_MINI_LED#
4
PWRLED#
5
SUSLED#
6
BATLED0#
7
BATLED1#
8
9 10 11
14
1213
AF712L-N2G1Z
AF712L-N2G1Z
TOUCH PAD I2C(TPD)
2011/3/28 Remove I2C function.
+3VPCU +3V
WLAN_LED# (19) 3G_MINI_LED# (19) PWRLED# (21) SUSLED# (21) BATLED0# (21) BATLED1# (21)
KEYBOARD(KBC)
<EMI>
KB
26 25
28
24
27 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1
CN2KBCN2
12
D18
D18 *Uclamp0511P_4_ESD
*Uclamp0511P_4_ESD
2 1
CAPSLED#_1
NBSWON#
+5V
MX0(21) MX1(21) MX2(17,21) MX3(21) MX4(17,21) MX5(21) MX6(21) MX7(21) MY12(21) MY11(17,21) MY10(21) MY9(21) MY8(21) MY7(21) MY6(21) MY5(21) MY4(21) MY3(21) MY2(17,21) MY1(21) MY0(17,21)
CAPSLED#_1 NBSWON#
MX0 MX1 MX2 MX3 MX4 MX5 MX6 MX7 MY12 MY11 MY10 MY9 MY8 MY7 MY6 MY5 MY4 MY3 MY2 MY1 MY0
use key matrix to power on, so, need to add two pin for NBSWON# and GND
*5.5V/19V/330p_4
*5.5V/19V/330p_4
SW5
SW5
SW6
SW6
R93330_6 R93330_6
D16
D16
3 5
6
3 5
6
CAPSLED#(21)
B B
A A
NBSWON#(17,21)
NBSWON#
NBSWON#
2 1 4
DIP-TJG-533-S-V-T/R
DIP-TJG-533-S-V-T/R
2 1 4
DIP-TJG-533-S-V-T/R
DIP-TJG-533-S-V-T/R
place on top and botton for A2 test
5
4
3
MY3 MY2 MY1 MY0 MX0 MX1 MX2 MX3 MX4 MX5 MX6 MX7 MY12 MY11 MY10 MY9
MY8 MY7 MY6 MY5 MY4
7 8 5 3 1 7 8 5 3 1 7 8 5 3 1 7 8 5 3 1 7 8 5 3 1 7 8 5 3 1
6
*220p_8P4R
*220p_8P4R
4 2
6
*220p_8P4R
*220p_8P4R
4 2
6
*220p_8P4R
*220p_8P4R
4 2
6
*220p_8P4R
*220p_8P4R
4 2
6
*220p_8P4R
*220p_8P4R
4 2
6
*220p_8P4R
*220p_8P4R
4 2
CP6
CP6
CP1
CP1
CP2
CP2
CP3
CP3
CP4
CP4
CP5
CP5
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT :
KB/BT/TP/LED/Power Connector
KB/BT/TP/LED/Power Connector
KB/BT/TP/LED/Power Connector
ZGB
ZGB
ZGB
2A
2A
15 34Friday, April 08, 2011
15 34Friday, April 08, 2011
15 34Friday, April 08, 2011
1
2A
Page 16
5
Codec(ADO)
ADOGND
C126
C126
+
+
2.2u/6.3V_6
D D
+5VA
C107
C107
C105
C105
0.1u/10V_4
0.1u/10V_4
10u/6.3V_6
10u/6.3V_6
ADOGND
+5V
C93
C93 10u/6.3V_6
10u/6.3V_6
Place next to pin 38
C3C
R125 *Short_6R125 *Short_6
C95
C95
0.1u/10V_4
0.1u/10V_4
+5VPVDD1
C97
C97 10u/6.3V_6
10u/6.3V_6
Spilt by AGND
C103
C103
0.1u/10V_4
0.1u/10V_4
Place next to pin 39
C3C
C92
C92 10u/6.3V_6
10u/6.3V_6
R124 *Short_6R124 *Short_6
C94
C94
0.1u/10V_4
0.1u/10V_4
Place next to pin 46
C98
C98 10u/6.3V_6
10u/6.3V_6
+5V
C C
+5VPVDD2
Spilt by PGND
C102
C102
Spilt by DGND
0.1u/10V_4
0.1u/10V_4
+3V
ANALOG
GND_EARTH
C3C
R131 *Short_6R131 *Short_6
ADOGND
L_SPK+ L_SPK-
R_SPK­R_SPK+
EAPD# SPDIF_OUT_R
0.1u/10V_4
0.1u/10V_4
Place next to pin 1
0V : Power down Class D SPK amplifer
Close to codec
R144
DMIC_DAT(14) DMIC_CLK(14)
C118
C118 150p/50V_4
150p/50V_4
R144 R149
R149
C134
C134 150p/50V_4
150p/50V_4
3.3V : Power up Class D SPK amplifer
BLM15AG601SS1D(600,0.3A)
BLM15AG601SS1D(600,0.3A) BLM15AG601SS1D(600,0.3A)
BLM15AG601SS1D(600,0.3A)
DMIC_DAT_L DMIC_CLK_L
2.2u/6.3V_6
C125
C125
+
+
2.2u/6.3V_6
2.2u/6.3V_6
34
35
36
U13
U13
CBP
CBN
37
AVSS2
38
AVDD2
39
PVDD1
40
SPK-L+
41
SPK-L-
42
PVSS1
43
PVSS2
44
SPK-R-
45
SPK-R+
46
PVDD2
47
SPDIFO2/EAPD
48
SPDIFO
49
PGND
+AZA_VDD
C111
C111
C106
C106 10u/6.3V_6
10u/6.3V_6
DMIC_DAT_L DMIC_CLK_L
PD#
CPVEE
(Vista Premium Version)
DVDD11GPIO0/DMIC-DATA2GPIO1/DMIC-CLK3PD#4SDATA-OUT5BIT-CLK6DVSS27SDATA-IN8DVDD-IO9SYNC10RESET#11PCBEEP
RF suggest to add R144,R149,C118,C134
B B
SPDIF(22)
L12 0_4L12 0_4
C99
C99 *33p/50V_4
*33p/50V_4
SPDIF_OUT_R
Power (ADO)
Demodulation Filter
+5V
C211
C211
C213
C213
+
+
0.1u/10V_4
0.1u/10V_4
10u/10V_3216
A A
10u/10V_3216
C730, C787 close U37 pin3 and L65
L65 Place close to Codec
ANALOG DIGITAL
L13 PBY201209T-300Y-N/4A/30ohm_8L13 PBY201209T-300Y-N/4A/30ohm_8
U15
U15
3 2 1
R208 *0_4R208 *0_4
4
OUT
IN GND SHDN
*G923-330T1UF
*G923-330T1UF
5
SET
R201 *29.4K/F_4R 201 *29.4K/F_4
5
R203
R203 *10K/F_4
*10K/F_4
ADOGND
Vset =1.25V Vout =Vset[1+AR(1,2)/AR(2,GND)]
10/29 modify
+
+
C196
C196 10u/10V_3216
10u/10V_3216
+5VA
ADOGND
C200
C200
0.1u/10V_4
0.1u/10V_4
4
R157 *0_4R157 *0_4
MIC1-VREFO-L
HPR HPL
reverse R441
ADOGND
MIC1-VREFO-R
R156 *0_4R156 *0_4
C151 10u/6.3V_6C151 10u/6.3V_6
reverse R429
MIC1-VREFO-L
ADOGND
3
2
HEADPHONE
HPL-1HPL
R300 47_6R300 47_6 R301 47_6R301 47_6
R292 *Short_6R292 *Short_6
HPR-1HPR
R293 *Short_6R293 *Short_6
Place next to pin 27
C160
C160
C163
25
26
AVSS1
AVDD1
LINE1-R
LINE1-L MIC1-R
MIC1-L
MONO-OUT
JDREF
Sense-B
MIC2-R
MIC2-L
LINE2-R
LINE2-L
Sense A
ALC271X
ALC271X
12
DIGITAL
ACZ_RESET#_AUDIO
R158 22_4R158 22_4
C163
0.1u/10V_4
0.1u/10V_4
2.2u/6.3V_6
2.2u/6.3V_6
24 23
MIC1_R1
22
MIC1_L1
21 20 19 18 17
Placement near Audio Codec
16 15 14
SENSEA
13
ANALOG
PCBEEP dont coupling any signals if possible 8/17 separate PCBEEP to Digital from Realtek suggestion
1.6Vrms
C174 1u/10V_6C174 1u/10V_6
R180 20K/F_4R180 20K/F_4
R179 39.2K/F_4R179 39.2K/F_4 R178 20K/F_4R178 20K/F_4 R206 5.1K/F_4R206 5.1K/F_4
BEEP_1PCBEEP
C180
C180 100p/50V_4
100p/50V_4
ACZ_RESET#_AUDIO (11) ACZ_SYNC_AUDIO (11) ACZ_SDIN0 (11) ACZ_SDOUT_AUDIO (11)
ACZ_BITCLK_AUDIO (11)
Place next to pin 25
R177
R177
4.7K_4
4.7K_4
ADOGND
27
28
29
30
31
32
33
VREF
LDO-CAP
HP-OUT-L
HP-OUT-R
MIC2-VREFO
MIC1-VREFO-L
MIC1-VREFO-R
ACZ_SDIN
C139 22p/50V_4C139 22p/50V_4
+5VA
C185
C185
C175
C175
0.1u/10V_4
0.1u/10V_4
ADOGND
10u/6.3V_6
10u/6.3V_6
ADOGND
LINEOUT_JD MIC1_JD SPDIF_JD
R174 47K_4R174 47K_4
If either HDA device io power use +1.5V, all device IO power change to +1.5V
C150
C150
0.1u/10V_4
0.1u/10V_4
SPDIF_JD (22)
R169 *Short_6R169 *Short_6
C158
C158 10u/6.3V_6
10u/6.3V_6
SB_BEEP (11)
+AZA_VDD
C-test
Place next to pin 9
+5VA
R316
R316 22K_4
22K_4
HP_JD
System MIC
+5VA
R317
R317 10K_4
10K_4
LINE_JD#
3
2
Q21
Q21 2N7002K
2N7002K
1
ADOGND
2
MIC1-VREFO-R MIC1-VREFO-L
3
1
ADOGND
LINEOUT_JD
Q22
Q22 2N7002K
2N7002K
C3C
R322
R322
4.7K/F_4
4.7K/F_4
2011/03/29 EMI add 0ohm
R17 0_6R17 0_6 R16 0_6R16 0_6
R258 *Short_6R258 *Short_6
R259 *0_6R259 *0_6
R324 *Short_6R324 *Short_6
R98 *Short_6R98 *Short_6 R95 *0_6R95 *0_6 R336 *0_6R336 *0_6 R109 *0_6R109 *0_6
R265 *Short_6R265 *Short_6 R313 *0_6R313 *0_6
R210 *Short_6R210 *Short_6 R326 *0_6R326 *0_6
R337 *Short_6R337 *Short_6
C203 0_4C203 0_4 C306 1000p/50V_4C306 1000p/50V_4
6/15:C203,R210,R98 short for EMI request
ADOGND
Mute(ADO) Internal Speaker
AMP_MUTE#(21)
ACZ_RESET#_AUDIO
4
GND_EARTH don't coupling AGND and SPK signals
+5VA +5VA
R155
R155
4.7K_4
4.7K_4
AMP_PD
3
2
Q13
Q13 2N7002K
2N7002K
1 3
2
Q14
Q14
2N7002K
2N7002K
1
GND_EARTH
Tied at one point only under the ALC269 or near the ALC269
2
3
1
R147
R147 1K_4
1K_4
Q11
Q11 2N7002K
2N7002K
R287 *Short_6R287 *Short_6
R289 *0_6R289 *0_6 R288 *0_6R288 *0_6
PD#
EAPD#
3
MIC1_L1
C181 4.7u/6.3V_6C181 4.7u/6.3V_6
MIC1_R1
C182 4.7u/6.3V_6C182 4.7u/6.3V_6
+5VA
R314
R314 10K_4
10K_4
EAPD_HP
3
Q19
Q19 2N7002K
2N7002K
2
1
ADOGND
apply for codec suggestion
MIC1_L2
R191 1K/F_4R191 1K/F _4
MIC1_R2
R192 1K/F_4R192 1K/F _4
MIC1_JD
ADOGND
C3C
2
MIC1_L3
MIC1_L3 MIC1_R3
12
D28
D28 *VPORT_6
*VPORT_6
Near CN28
40mil for each signal
R_SPK+ R_SPK-
L_SPK+ L_SPK+_1
C307
C307
C308
100P/50V/NPO_4
100P/50V/NPO_4
EAPD_HP
R321
R321
4.7K/F_4
4.7K/F_4
R198 *Short_6R198 *Short_6 R199 *Short_6R199 *Short_6
R217 *Short_6R217 *Short_6
R216 *Short_6R216 *Short_6 R215 PBY160808T-221Y-N/2A/220ohm_6R215 PBY160808T-221Y-N/2A/220ohm_6 R214 PBY160808T-221Y-N/2A/220ohm_6R214 PBY160808T-221Y-N/2A/220ohm_6
C3C
C308 100P/50V/NPO_4
100P/50V/NPO_4
ADOGND
HP_JD
2
2
apply for codec suggestion 03/31: vendor suggest that don't need to add Q9 and Q20
C301
C301 *470p/50V_4
*470p/50V_4
C219
C219
*0.22u/25V_6
*0.22u/25V_6
*0.22u/25V_6
*0.22u/25V_6
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
HPL-2 HPR-2
HPL-2
Q9 *MMBT3904Q9*MMBT3904
1 3
ADOGND
HPR-2
Q20
Q20 *MMBT3904
*MMBT3904
1 3
ADOGND
C285
C285 *470p/50V_4
*470p/50V_4
C218
C218
Friday, April 08, 2011
Friday, April 08, 2011
Friday, April 08, 2011
1
1 6 2
3 4
5
Normal Open Jack
01/22 change connector pin define Main:P/N not ready
ADOGND
HP_JD
MIC1_L MIC1_R
MIC1_JD
C300
C300 *0.1u/16V_6
*0.1u/16V_6
ADOGND
R_SPK+_1 R_SPK-_1 L_SPK-_1L_SPK-
C216
C216
C217
C217
68p/50V_6
68p/50V_6
68p/50V_6
68p/50V_6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
AUO/AMP
AUO/AMP
AUO/AMP
1
CN21
CN21
010030FR006G119ZR
010030FR006G119ZR
12
D29
D29
Near CN25
*VPORT_6
*VPORT_6
ADOGND
CN19
CN19
1 6 2
3 4
5
010030FR006G119ZR
010030FR006G119ZR
Normal Open Jack
01/22 change connector pin define Main:P/N not ready
R-L-SPEAKERS
R-L-SPEAKERS
4 3 2 1
CN5
CN5
ZGB
ZGB
ZGB
2A
2A
2A
3416
3416
3416
Page 17
5
4
3
2
1
+5VPCU
+3VPCU
*10K_4
*10K_4
USB_EN(21)
D D
+3VPCU
USB_EN_1(21)
C C
C54
C54
4.7u/10V _6
4.7u/10V _6
R56
R56
USB_EN
+5VPCU
R51
R51
*10K_4
*10K_4
C48
C48
4.7u/10V _6
4.7u/10V _6
USB_EN_1
U5
U5 IC(8P)G547 E1P81U
IC(8P)G547 E1P81U
2
IN1 IN23OUT2
4
EN
1
GND
9
GND-C
U4
U4 IC(8P)G547 E1P81U
IC(8P)G547 E1P81U
2
IN1 IN23OUT2
4
EN
1
GND
9
GND-C
OUT3 OUT1
5VUSB_1
8 7 6
5
OC#
OUT3 OUT1
OC#
USBOC#L (8,21)
USBP3-(8) USBP3+(8)
5VUSB_3
8 7 6
5
USBOC#R (8,21)
USBP0-(8) USBP0+(8)
R63 *0/short_4R63 *0/short_4 *WCM-201 2-900T
*WCM-201 2-900T
2
1
2
3
443
L9
L9
R64 *0/short_4R64 *0/short_4
R60 *0/short_4R60 *0/short_4 *WCM-201 2-900T
*WCM-201 2-900T
1
2
1
2
3
443
L8
L8
R58 *0/short_4R58 *0/short_4
+
+
C268
C268 100u/6.3 V_3216
100u/6.3 V_3216
USBP3-_CN
1
USBP3+_CN
12
+
+
C266
C266 100u/6.3 V_3216
100u/6.3 V_3216
USBP0-_CN USBP0+_CN
D15
D15 *5V/30V/0.2p_4
*5V/30V/0.2p_4
12
D12
D12 *5V/30V/0.2p_4
*5V/30V/0.2p_4
C274
C274
0.1u/10V _4
0.1u/10V _4
12
D14
D14 *5V/30V/0.2p_4
*5V/30V/0.2p_4
12
C267
C267
0.1u/10V _4
0.1u/10V _4
D13
D13 *5V/30V/0.2p_4
*5V/30V/0.2p_4
CN18
CN18
1 2 3 4
USB_CONN
USB_CONN
CN12
CN12
1 2 3 4
USB_CONN
USB_CONN
VDD D­D+ GND1
VDD D­D+ GND1
GND6 GND5
GND7 GND8
GND6 GND5
GND7 GND8
6 5
7 8
6 5
7 8
VIN_SRC VIN_ SRC VIN_SRC
C12
C12
C14
C14
0.1u/25V _4
0.1u/25V _4
0.1u/25V _4
0.1u/25V _4
VIN VIN VIN
C221
C221
C43
C43
0.1u/25V _4
0.1u/25V _4
0.1u/25V _4
0.1u/25V _4
+3V +3V +3V +3V +3V
C220
C220
C45
C45
0.1u/10V _4
0.1u/10V _4
0.1u/10V _4
0.1u/10V _4
+5V +5V+5V
C86
C86
C38
C38
0.1u/10V _4
0.1u/10V _4
0.1u/10V _4
0.1u/10V _4
+1.5V
C226
C226
0.1u/10V _4
0.1u/10V _4
+3V
C381
C381 *33p/50V _4
*33p/50V _4
+3V
C382
C382 *33p/50V _4
*33p/50V _4
VIN_SRC VIN_ SRC
C117
C117
0.1u/25V _4
0.1u/25V _4
VIN
C165
C165
0.1u/25V _4
0.1u/25V _4
C65
C65
0.1u/10V _4
0.1u/10V _4
C210
C210
0.1u/10V _4
0.1u/10V _4
VIN +3V VIN +3V
C15
C15
0.1u/25V _4
0.1u/25V _4
C225
C225
0.1u/25V _4
0.1u/25V _4
C359
C359
0.1u/10V _4
0.1u/10V _4
C122
C122
0.1u/25V _4
0.1u/25V _4
VIN
C227
C227
0.1u/25V _4
0.1u/25V _4
C212
C212
0.1u/10V _4
0.1u/10V _4
+3V
C62
C62 *1000p/5 0V_4
*1000p/5 0V_4
C230 *0.1u/25V_4C230 *0.1 u/25V_4 C231 *0.1u/25V_4C231 *0.1 u/25V_4
VIN
+3V
C255
C255
0.1u/25V _4
0.1u/25V _4
C228
C228
0.1u/10V _4
0.1u/10V _4
+3V
C229
C229
0.1u/10V _4
0.1u/10V _4
+3V_S5
PCH_GPIO24
1
R365 10K_ 4R365 10K_4
ZGB
ZGB
ZGB
17 34Friday, April 08, 2011
17 34Friday, April 08, 2011
17 34Friday, April 08, 2011
2A
2A
2A
HOLE7
HOLE3
HOLE2
HOLE2
2 3
1
B B
*O-ZGA-2
*O-ZGA-2
HOLE13
HOLE13
2 3 4
1
8
*HG-C276D9 4P2
*HG-C276D9 4P2
HOLE23
HOLE23
H-TC197BC276D122P2
H-TC197BC276D122P2
1
PAD2PAD2
A A
PAD7PAD7
5 6 7
9
HOLE14
HOLE14
2 3 4
1
8
9
*HG-C276D9 5P2
*HG-C276D9 5P2
HOLE4
HOLE4
2 3 4
1
8
9
*O-ZGA-6
*O-ZGA-6
HOLE24
HOLE24
H-TC197BC276D122P2
H-TC197BC276D122P2
1
PAD4PAD4
PAD8PAD8
5
HOLE9
HOLE9
2
5
3
6
4
7
8
*HG-C276D9 5P2
*HG-C276D9 5P2
HOLE10
HOLE10
2
5
3
6
4
7
8
*HG-C276D9 5P2
*HG-C276D9 5P2
HOLE20
HOLE20
H-TC197BC157D106P2
H-TC197BC157D106P2
PAD5PAD5
HOLE27
HOLE27
2 3 4
8
*O-ZGA-5
*O-ZGA-5
1
9
1
9
1
1
9
2
5
3
6
4
7
*HG-C276D9 5P2
*HG-C276D9 5P2
2
5
3
6
4
7
*HG-C276D9 5P2
*HG-C276D9 5P2
H-TC197BC157D106P2
H-TC197BC157D106P2
5 6 7
HOLE3
8
HOLE12
HOLE12
8
HOLE21
HOLE21
PAD3PAD3
1
9
1
9
1
5 6
2
7
5
2
6
3
7
4
H-TC197BC276D106P2
H-TC197BC276D106P2
*H-O110x94D110x94N
*H-O110x94D110x94N
HOLE1
HOLE1
*O-ZGA-1
*O-ZGA-1
HOLE8
HOLE8
*O-ZGA-4
*O-ZGA-4
HOLE19
HOLE19
PAD1PAD1
HOLE11
HOLE11
1
1
1
1
2 3 4
2
5
3
6
4
4
HOLE16
HOLE16
1
8
*HG-C276D9 5P2
*HG-C276D9 5P2
HOLE5
HOLE5
1
8
*HG-TC236BC2 76D95P2
*HG-TC236BC2 76D95P2
HOLE22
HOLE22
1
H-TC197BC157D106P2
H-TC197BC157D106P2
PAD6PAD6
5 6 7
9
5 6 7
9
H-TC177BC158D102P2
H-TC177BC158D102P2
HOLE7
2 3 4
1
8
9
*O-ZGA-3
*O-ZGA-3
HOLE17
HOLE17
2 3 4
1
8
9
*HG-C276D9 5P2
*HG-C276D9 5P2
HOLE26
HOLE26
1
PAD9PAD9
PAD10PAD10
5
2
6
3
7
4
2
5
3
6
4
7
H-TC177BC158D102P2
H-TC177BC158D102P2
HOLE15
HOLE15
1
8
9
*HG-C276D9 5P2
*HG-C276D9 5P2
HOLE18
HOLE18
1
8
9
*HG-C276D9 5P2
*HG-C276D9 5P2
HOLE25
HOLE25
1
CN23
5 6 7
5 6 7
3
CN23
42
FFC CONN 40 P
FFC CONN 40 P
39 384041 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1
2
T57T57 T56T56 T55T55 T38T38 T44T44
T54T54 T53T53 T52T52
PCH_GPIO24
MY11 (15,21)
MY2 (15,21) MY0 (15,21)
MX4 (15,21) MX2 (15,21)
MANU_SW _R (11 ,21) NBSWON# (15,21) LID# (11,14,21)
SYS_SHDN# (4,25,26)
RECOVER_KEY#_R (11 ,21) DEVELOPER#_R (11,21) DEG_RST# (11)
VCC_POR# (21)
EC_SMI# (1 1,21) PCI_INTG# (10) PCH_GPIO24 (11 )
SPI_SDO_ uR_R (21)
SPI_SCK_ uR_R (21)
SPI_CS0# _uR (21 )
SPI_SDI_uR_R (21) SPI_MISO_R (11)
SPI_MOSI (11) SPI_CS# (11) SPI_CLK (11)
Size Document Nu mber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
USB on Board/LED/SW/HOLE/Debug port
USB on Board/LED/SW/HOLE/Debug port
USB on Board/LED/SW/HOLE/Debug port
Date: Sheet of
Date: Sheet of
Date: Sheet of
2011/04/08 change net name to DEG_RST#
+3V_deg_S PI
+3V_deg
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Page 18
5
D D
3V_SATA
C87
C87 *0.1u/10V_4
*0.1u/10V_4
C C
5V_SATA
C89
C89
0.1u/10V_4
0.1u/10V_4
C84
C84 *10u/10V_8
*10u/10V_8
C88
C88
0.1u/10V_4
0.1u/10V_4
+
+
C298
C298 *100u/6.3V_3528
*100u/6.3V_3528
4
R263 *0_8R263 *0_8
C85
C85 10u/10V_8
10u/10V_8 0.01u/16V_4C121 0.01u/16V_4C121
+3V
+
+
C297
C297 100u/6.3V_3216
100u/6.3V_3216
R264 *Short_8R264 *Short_8
+5V
3
SATA_RXP0A
SATA_TXN0A
SATA_TXP0A SATA_TXN0A
SATA_RXN0A SATA_RXP0A
U10
U10 *CM1213-04SO
*CM1213-04SO
1
CH1
2
VN CH23CH3
CH4
VP
0.01u/16V_4C112 0.01u/16V_4C112
0.01u/16V_4C128 0.01u/16V_4C128
0.01u/16V_4C135 0.01u/16V_4C135
SATA_RXN0A
6 5
SATA_TXP0A
4
SATA_TXP0 SATA_TXN0
SATA_RXN0 SATA_RXP0
2
+5V
C109
C109 *0.1u/10V_4
*0.1u/10V_4
SATA_TXP0 (9) SATA_TXN0 (9)
SATA_RXN0 (9) SATA_RXP0 (9)
SATA_TXP0A
SATA_TXN0A
SATA_RXN0A
SATA_RXP0A
3V_SATA
5V_SATA
1
CN20
CN20
23
GND23
1
GND1
2
RXP
3
RXN
4
GND2
5
TXN
6
TXP
7
GND3
8
3.3V
9
3.3V
10
3.3V
11
GND
12
GND
13
GND
14
5V
15
5V
16
5V
17
GND
18
RSVD
19
GND
20
12V
21
12V
22
12V
24
GND24
SATA-HDD(C166S4-12205-L)
SATA-HDD(C166S4-12205-L)
B B
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
SATA-HDD/SSD
SATA-HDD/SSD
SATA-HDD/SSD
ZGB
ZGB
ZGB
2A
2A
2A
18 34Friday, April 08, 2011
18 34Friday, April 08, 2011
18 34Friday, April 08, 2011
1
Page 19
5
Mini Card(MNC)
+3V_Mini1_VDD
PLTRST#
PCLK_DEBUG(2)
20110407 change PE2 to PE1, PE2CLK to PE1CLK.
D D
PCIE_WAKE#(11)
+3V_Mini1_VDD
C C
PE1TX+(8) PE1TX-(8)
PE1RX+(8) PE1RX-(8)
PE1CLK+(2) PE1CLK-(2)
CLKREQ_WLAN#(2)
3
2
R23 *0_4R23 *0_4 R24 *0_4R24 *0_4
CLKREQ_WLAN#
Q8
MINI1_WAKE#
1
*2N7002EQ8*2N7002E R91 *10K_4R91 *10K_4
CN17
CN17
51
Reserved
49
Reserved
47
Reserved
45
Reserved
43
GND
41
+3.3Vaux
39
+3.3Vaux
37
GND
35
GND
33
PETp0
31
PETn0
29
GND
27
GND
25
PERp0
23
PERn0
21
GND
19
UIM_C4
17
UIM_C8
15
GND
13
REFCLK+
11
REFCLK-
9
GND
7
CLKREQ#
5
Reserved
3
Reserved
1
WAKE#
MINI-CARD1
MINI-CARD1
53
Mini Card 2 / GPS(MNC)
+3V_Mini2_VDD
CN16
CN16
51
Reserved
49
Reserved
47
T3T3
PE4TX+(8) PE4TX-(8)
PE4RX+(8) PE4RX-(8)
B B
PE4CLK+(2) PE4CLK-(2)
CLKREQ_3G#(2)
T28T28
3G_WAKE_R
CLKREQ_3G#
3G_WAKE_2_R
Reserved
45
Reserved
43
GND
41
+3.3Vaux
39
+3.3Vaux
37
GND
35
GND
33
PETp0
31
PETn0
29
GND
27
GND
25
PERp0
23
PERn0
21
GND
19
UIM_C4
17
UIM_C8
15
GND
13
REFCLK+
11
REFCLK-
9
GND
7
CLKREQ#
5
Reserved
3
Reserved
1
WAKE#
3G@MINI-CARD2
3G@MINI-CARD2
53
SIM
R81 *0/short_4R81 *0/short_4 *3G@WCM-2012-900T
*3G@WCM-2012-900T
5
2
2
3
L14
L14
R80 *0/short_4R80 *0/short_4
USBP1-(8)
A A
USBP1+(8)
USBP1-_R
1
1
USBP1+_R
443
UIM_CLK
6 8
9
10
3G@SIM-Conn
3G@SIM-Conn
4
+3V_Mini1_VDD
52
+3.3V
50
GND
48
+1.5V
46
LED_WPAN#
44
LED_WLAN#
LED_WWAN#
W_DISABLE#
LED_WWAN#
W_DISABLE#
42 40
GND
38
USB_D+
36
USB_D-
34
GND
32
SMB_DATA
30
SMB_CLK
28
+1.5V
26
GND
24
+3.3Vaux
22
PERST#
20 18
GND
16
UIM_VPP
14
UIM_RESET
12
UIM_CLK
10
UIM_DATA
8
UIM_PWR
6
+1.5V
4
GND
2
+3.3V
GND54GND
52
+3.3V
50
GND
48
+1.5V
46
LED_WPAN#
44
LED_WLAN#
42 40
GND
38
USB_D+
36
USB_D-
34
GND
32
SMB_DATA
30
SMB_CLK
28
+1.5V
26
GND
24
+3.3Vaux
22
PERST#
20 18
GND
16
UIM_VPP
14
UIM_RST
12
UIM_CLK
10
UIM_DATA
8
UIM_PWR
6
+1.5V
4
GND
2
+3.3V
GND54GND
JSIM1
JSIM1
CLK(C3)
GND(C5)
N/A(C8)7VCC(C1)
VPP(C6)
N/A(C4)
RST(C2)
CT
DATA(C7)
CD
13
4
+1.5V_Mini2_VDD
+3V_Mini2_VDD
Max: 7.5mA (Option)
1 2 3 4 5
GND14GND12GND11GND
+1.5V_Mini1_VDD
WLAN_LED#_R
R27 *0/short_4R27 *0/short_4
WL_SMDATA WL_SMCLK
RF_EN
USBP5+_R USBP5-_R
3G_SMDATA 3G_SMCLK
PLTRST#_1
UIM_VPP UIM_RST UIM_CLK UIM_DATA UIM_PWR
UIM_PWR UIM_VPP UIM_RST UIM_DATA
3
+3V_Mini1_VDD
RF_LED_ON
R340
R340
4.7K/F_4
4.7K/F_4
2
1
USBP7+ (8)
USBP7- (8)
R67 *0/short_4R67 *0/short_4
RF_EN (21)
LPCFRAME# (11,21,23) LPCAD3 (11,21,23) LPCAD2 (11,21,23) LPCAD1 (11,21,23) LPCAD0 (11,21,23)
no matter have 3G function or not, need to stuff R32
WLAN_LED# 3G_MINI_LED#
R68 *3G@0_4R68 *3G@0_4
3G_EN (21)
USBP5+_R USBP5-_R
UIM_PWR
UIM_DATA
UIM_CLK
UIM_RST
UIM_VPP
3
Q2 2N7002KQ22N7002K
PLTRST#PLTRST#_2
+3V_Mini2_VDD
R32
R32 3G@10K_4
3G@10K_4
PLTRST#
R435 *0/short_4R435 *0/short_4 *3G@WCM-2012-900T
*3G@WCM-2012-900T
2
2
3
L35
L35
R429 *0/short_4R429 *0/short_4
C22 3G@27p/50V_4C22 3G@27p/50V_4
C25 3G@10p/50V_4C25 3G@10p/50V_4
C26 3G@10p/50V_4C26 3G@10p/50V_4
C42 3G@27p/50V_4C42 3G@27p/50V_4
C41 3G@33p/50V_4C41 3G@33p/50V_4
R424 *0/J_4R424 *0/J_4 R423 *0/short_4R423 *0/short_4
WLAN_LED# (15)
PLTRST# (4,11,21,22,23)
1
1 443
3
3G_MINI_LED#
3G_MINI_LED# (15)
RF_LED_EN (21)
+3V_S5
R30 *3G@0_8R30 *3G@0_8
+3V
R31 *3G@0_8R31 *3G@0_8
+1.5V
R84 *3G@0_8R84 *3G@0_8
USBP5+ (8) USBP5- (8)
UIM_RST
UIM_CLK
+3V
+3V_S5
+1.5V
R85 *0_8R85 *0_8
ESD4
ESD4
1
CH1
2
VN CH23CH3
*3G@CM1293-04SO
*3G@CM1293-04SO
R38 *Short_8R38 *Short_8
R39 *0_8R39 *0_8
+3V_Mini2_VDD
C29
C29 3G@10u/10V_8
3G@10u/10V_8
+1.5V_Mini2_VDD
C21
C21 *3G@1000p/50V_4
*3G@1000p/50V_4
6
CH4
5
VP
4
+3V_Mini1_VDD
+1.5V_Mini1_VDD
C52
C52
*1000p/50V_4
*1000p/50V_4
1.1A
0.5A
UIM_VPP
UIM_DATA
2
C37
C37 *10u/10V_8
*10u/10V_8
0.5A
C76
C76 3G@0.1u/10V_4
3G@0.1u/10V_4
C51
C51 *3G@0.1u/10V_4
*3G@0.1u/10V_4
+3V
UIM_PWR
2
0.75A
C53
C53 *0.1u/10V_4
*0.1u/10V_4
C58
C58 3G@0.1u/10V_4
3G@0.1u/10V_4
C31
C31 3G@1u/10V_6
3G@1u/10V_6
1 2
C249
C249
C60
C60
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
C69
C69 *10u/10V_8
*10u/10V_8
C17
C17 3G@0.1u/10V_4
3G@0.1u/10V_4
PDAT_SMB(2,11)
PCLK_SMB(2,11)
<20090604(A1A)_Qualcomm design guide> Place 0.1uF near connector's VCC pin
C27
C27 3G@0.1u/10V_4
3G@0.1u/10V_4
1
C250
C250
C75
C75
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
SMBDT1(2,3,22,23)
SMBCK1(2,3,22,23)
12
C28
C28 3G@0.1u/10V_4
3G@0.1u/10V_4
C16
C16 3G@0.47u/6.3V_4
3G@0.47u/6.3V_4
3G@2N7002E
3G@2N7002E
3G@2N7002E
3G@2N7002E
PCLK_SMB 3G_SMCLK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
+3V_Mini1_VDD
Q7
2
*2N7002EQ7*2N7002E
3
R66 *0/short_4R66 *0/short_4
3
R57 *0/short_4R57 *0/short_4
C57
C57 3G@10p/50V_4
3G@10p/50V_4
+3V_Mini2_VDD
Q4
Q4
3
R48 *3G@0_4R48 *3G@0_4
+3V_Mini2_VDD
Q6
Q6
3
R62 *3G@0_4R62 *3G@0_4
Mini-Card/WL/3G/SIM
Mini-Card/WL/3G/SIM
Mini-Card/WL/3G/SIM
1
+3V_Mini1_VDD
Q5
2
*2N7002EQ5*2N7002E
1
+3V_Mini2_VDD
R47
R47
3G@10K_4
3G@10K_4
2
1
2
1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
4
3
R61
R61 3G@10K_4
3G@10K_4
3G_SMDATAPDAT_SMB
2
1
ZGB
ZGB
ZGB
19 34Friday, April 08, 2011
19 34Friday, April 08, 2011
19 34Friday, April 08, 2011
RN5
RN5 *4.7K_4P2R
*4.7K_4P2R
WL_SMDATA
WL_SMCLK
20
2A
2A
2A
Page 20
5
4
3
2
1
RTS5138
VCC_XD
CN7
CN7
13
SD-VCC
1
SD-CD-SW
2
SD-WP-SW
3
SD-DAT1
4
SD-DAT0
10
SD-CLK
19
SD-CMD
23
SD-DATA3
25
SD-DAT2
5
MMC-DATA7
8
MMC-DATA6
17
MMC-DATA5
21
MMC-DATA4
7
SD-GND1
15
SD-GND2
26
SD-WP-GND
27
SD-CD-GND
22
MS-VCC
9
MS-BS
11
MS-DATA1
12
MS-DATA0
14
MS-DATA2
16
MS-INS
18
MS-DATA3
20
MS-SCLK
6
MS-GND1
24
MS-GND2
R013-P13-HM
R013-P13-HM
VCC_XD
45
XD-VCC
XD_CD#
28
XD-CD
XD-R/B
XD-RE XD-CE
XD-CLE
XD-ALE
XD-WE XD-WP
XD-D0 XD-D1 XD-D2 XD-D3 XD-D4 XD-D5 XD-D6 XD-D7
XD-GND1 XD-GND2
01/29 change connector pin define Main:DFHS44FR012
XD_RDY
29
XD_RE#
30
XD_CE#
31
XD_CLE
32
XD_ALE
33
XD_WE#
34
XD_WP
35
XD_D0
37
XD_D1
38
XD_D2
39
XD_D3
40
XD_D4
41
XD_D5
42
XD_D6
43
XD_D7
44
36 46
03/11 change connector footprint for Dip type.
CLK_Card48(2)
C358 *100P/50V_4C358 *100P/50V_4
D D
Differential pair,Zdiff= 90ohm
+3V
R397 2.2/F_6R397 2.2/F_6
C365
C365
4.7u/10V_6
4.7u/10V_6
R390 6.2K/F_4R390 6.2K/F_4
C363
C363
0.1u/10V_4
0.1u/10V_4
USBP4-_R USBP4+_R
VREG
C372
C372 1u/6.3V_4
1u/6.3V_4
RREFRREF
VCC_XD
IC Bottom Ground
R86 *0/short_4R86 *0/short_4
L15
C C
B B
USBP4-(8)
USBP4+(8)
XD_CD# SP1 XD_RDY SD_WP MS_CLK SP2 XD_RE# MS_INS# SP3 XD_CE# SD_D1 SP4 XD_CLE SD_D0 SP5 XD_ALE SD_D7 MS_D3 SP6 XD_WE# SD_CD# SP7 XD_WP SD_D6 SP8 XD_D0 SD_CLK MS_D2 SP9 XD_D1 SD_D5 MS_D0 SP10 XD_D2 SD_CMD SP11 XD_D3 SD_D4 SP12 XD_D4 SD_D3 MS_D1 SP13 XD_D5 SD_D2 SP14 XD_D6 MS_BS
XD_D7
L15
3 2
*WCM-2012-900T
*WCM-2012-900T R87 *0/short_4R87 *0/short_4
4
4
3
1
1
2
C355 *22p/50V_4C355 *22p/50V_4
GND
USBP4-_R USBP4+_R
R382 *0/short_4R382 *0/short_4
24
U24
U24
1
RREF DM DP 3V3_IN CARD_3V3 V18
GND
CLK_IN
RTS5138
RTS5138
QFN24
XD_CD#7SP18SP29SP310SP411SP5
XD_CD#
VCC_XD
2 3 4 5 6
25
XD_D7
SP14
SP13
SP12
SP11
22
23
SP1119SP1220SP1321SP14
XD_D7
SP10
GPIO0
12
SP1
SP2
SP3
SP4
SP5
C368
C368
0.1u/10V_4
0.1u/10V_4
SP9 SP8 SP7 SP6
18 17 16 15 14 13
SP10 SP9
SP8 SP7 SP6
C370
C370
0.1u/10V_4
0.1u/10V_4
C373
C373
0.1u/10V_4
0.1u/10V_4
SD_CD# SD_WP
SD_CMD SD_D3 SD_D3_R SD_D2 SD_D7 SD_D6 SD_D5 SD_D4
MS_CLK
C357
C357
*10p/50V_4
*10p/50V_4
R356 33_4R356 33_4 R358 33_4R358 33_4 R362 33_4R362 33_4 R364 33_4R364 33_4 R383 33_4R383 33_4 R401 33_4R401 33_4 R407 33_4R407 33_4 R410 33_4R410 33_4 R372 33_4R372 33_4 R380 33_4R380 33_4 R396 33_4R396 33_4 R405 33_4R405 33_4
R402 33_4R402 33_4
SD_CLK_R
12/23 FAE suggestion: the value of C346 need smaller than 10p
SD_CD#_R SD_WP_R SD_D1_RSD_D1 SD_D0_RSD_D0 SD_CLK_RSD_CLK SD_CMD_R
SD_D2_R SD_D7_R SD_D6_R SD_D5_R SD_D4_R
MS_BS MS_D1 MS_D0 MS_D2 MS_INS# MS_D3 MS_CLK_R
Share Pin
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
RTS5138
RTS5138
RTS5138
ZGB
ZGB
ZGB
2A
2A
2A
20 34Friday, April 08, 2011
20 34Friday, April 08, 2011
20 34Friday, April 08, 2011
1
Page 21
5
EC(KBC)
L10 PBY160808T-250Y-N/3A/25ohm_6L10 PBY160808T-250Y-N/3A/25ohm_6
30mil
+3VPCU
1 2
R29 2.2_6R29 2.2_6
D D
LCLK_EC LCLK_EC
R34
R34 *22_4
*22_4
C24
C24 *10p/50V/COG_4
*10p/50V/COG_4
+3VPCU
RP6 10K_10P8RRP6 10K_10P8R
MX7 MX6 MX5 MX4
10
9 8 7 4
C C
+3VPCU_EC
C30
C30
4.7U/6.3V_6
4.7U/6.3V_6
MX3
1
MX2
2
MX1
3
MX0
56
2011/03/30 : EC suggest to add 10k PU resistor.
1'st SMBUS for Smart Battery / Charger
2nd SMBUS for CPU thermal sensor.
B B
SW2 : connect pin2 and pin3, MANU_SW_R is low. connect pin1 and pin3, MANU_SW_R is high.(default)
to EC
MANU_SW
R399 0/J_4R399 0/J_4
A A
to TPT
10K_4
10K_4 Q29
MANU_SW_TPT(11)
MANU_SW_TPT
5
0.03A(30mils)
C83
C83
C82
*.1u/16V_4
*.1u/16V_4
BT_POWERON#(15)
R427
R427
10K_4
10K_4
Q28
Q28
3
2N7002E
2N7002E
2
1
MANU_SW_R
Q29
2N7002E
2N7002E
1
C82 .1u/10V_4
.1u/10V_4
MX0(15) MX1(15) MX2(15,17) MX3(15) MX4(15,17) MX5(15) MX6(15) MX7(15)
MY0(15,17) MY1(15) MY2(15,17) MY3(15) MY4(15) MY5(15) MY6(15) MY7(15) MY8(15)
MY9(15) MY10(15) MY11(15,17) MY12(15)
T7T7 T6T6 T5T5
USBOC#R USBOC#L
MBCLK(24)
MBDATA(24)
2ND_MBCLK(4)
2ND_MBDATA(4)
R443 *Short_4R443 *Short_4 R444 *Short_4R444 *Short_4
MAINON(27,28,29)
TPM_LPC_PD#(23)
R103 *0/short_4R103 *0/short_4
D32
D32
*Uclamp0511P_4_ESD
*Uclamp0511P_4_ESD
2 1
C66
C66
.1u/10V_4
.1u/10V_4
LPCFRAME#(11,19,23)
LPCAD0(11,19,23) LPCAD1(11,19,23) LPCAD2(11,19,23) ICMNT (24) LPCAD3(11,19,23)
LCLK_EC(2)
CLKRUN#(11,23)
GA20(9)
KBRST#(9)
EC_SCI#(10) EC_FPBACK#(14) HDMI_PD#(22)
PLTRST#(4,11,19,22,23) USB_EN(17)
SERIRQ(9,23)
EC_SMI#(11,17)
USBOC#R(8,17)
USBOC#L(8,17)
TPCLK(15)
TPDATA(15)
SUSCLK(11)
12/21 : EC suggest to remove extrernal OSC
+3VPCU
MANU_SW_1
+3V_S5
R434
R434
2
3
C68
C68
*.1u/16V_4
*.1u/16V_4
D7 BAS316D7 BAS316
EC_FPBACK#
D11 *BAS316D11 *BAS316
PLTRST# USB_EN SERIRQ
MX0 MX1 MX2 MX3 MX4 MX5 MX6 MX7
MY0 MY1 MY2 MY3 MY4 MY5 MY6 MY7 MY8 MY9 MY10 MY11 MY12
R445 *0_4R445 *0_4 R446 *0_4R446 *0_4
MBCLK MBDATA 2ND_MBCLK 2ND_MBDATA
TPCLK_R
TPDATA_R
E775_32KX1
C366
C366 *0.1u/10V_4
*0.1u/10V_4
E781AGND
C39
C39 .1u/10V_4
.1u/10V_4
4
+A3VPCU
C72
C72
C71
C71
10u/10V_6
10u/10V_6
.1u/10V_4
.1u/10V_4
19
46
76
88
102
115
U7
U7
VCC1
VCC2
VCC3
VCC4
VCC5
3
LFRAME
126
LAD0
127
LAD1
128
LAD2
1
LAD3
2
LCLK
8
GPIO11/CLKRUN
121
GPIO85/GA20
122
KBRST/GPIO86
29
ECSCI/GPIO54
6
GPIO24/LDRQ
124
GPIO10/LPCPD
7
LREST
123
GPIO67/PWUREQ
125
SERIRQ
9
GPIO65/SMI
54
KBSIN0
55
KBSIN1
56
KBSIN2
57
KBSIN3
58
KBSIN4
59
KBSIN5
60
KBSIN6
61
KBSIN7
53
KBSOUT0/JENK
52
KBSOUT1/TCK
51
KBSOUT2/TMS
50
KBSOUT3/TDI
49
KBSOUT4/JEN0
48
KBSOUT5/TDO
47
KBSOUT6/RDY
43
KBSOUT7
42
KBSOUT8
41
KBSOUT9/SDP_VIS
40
KBSOUT10/P80_CLK
39
KBSOUT11/P80_DAT
38
KBSOUT12/GPIO64
37
KBSOUT13/GPIO63
36
KBSOUT14/GPIO62
35
KBSOUT15/GPIO61/XOR_OUT
34
GPIO60/KBSOUT16
33
GPIO57/KBSOUT17
70
GPIO17/SCL1
69
GPIO22/SDA1
67
GPIO73/SCL2
68
GPIO74/SDA2
72
GPIO37/PSCLK1
71
GPIO35/PSDAT1
10
GPIO26/PSCLK2
11
GPIO27PSDAT2
12
GPIO25/PSCLK3
13
GPIO12/PSDAT3
77
GPIO00/32KCLKIN
79
GPIO02
NPCE781
NPCE781
2011/4/7 Stuff R89
MANU_SW_R
R89 0_4R89 0_4
R398 2.2K/J_4R398 2.2K/J_4
+3VPCU
to debug CON and SPI Flash Rom
MANU_SW_R(11,17)
4
AVCC
LPC
LPC
KB
KB
SMB
SMB
PS/2
PS/2
GND1
GND2
GND3
GND4
GND5
5
18
45
78
89
116
L11
L11 PBY160808T-250Y-N/3A/25ohm_6
PBY160808T-250Y-N/3A/25ohm_6
E781AGND
SW2
SW2
3 2
1
SS3-CM-W-V-T/R(505)
SS3-CM-W-V-T/R(505)
+3VPCU
R403 *2.2K/J_4R403 *2.2K/J_4
MANU_SW_R
MANU_SW_R
GND6
A/D
A/D
D/A
D/A
GPIO06/IOX_DOUT
GPIO30/CIRTX2
GPIO32/D_PWM GPIO33/H_PWM
GPIO40/F_PWM
GPIO
GPIO
GPIO45/E_PWM
GPIO46/CIRRXM/TRST
GPIO52/CIRTX2/RDY
GPIO20/TA2/IOX_DIN
TIMER
TIMER
GPIO15/A_PWM GPIO21/B_PWM GPIO13/C_PWM GPIO66/G_PWM
SPI
SPI
GPO76/SPI_DO/SHBM
GPIO75/SPI_SCK
GPIO72/IRRX1/SIN2
GPIO70/IRRX2_IRSL0
GPIO71/IRTX/SOUT2
IR
IR
GPIO87/CIRRXM/SIN_CR
GPIO34/CIRRXL
GPO83/SOUT_CR/XORTR
FIU
FIU
GPIO55/CLKOUT/IOX_DIN
VCORF
AGND
44
103
VCORF_uR
C64
C64 1u/6.3V_4
1u/6.3V_4
SW3
SW3
2
1
SS3-CM-W-V-T/R(505)
SS3-CM-W-V-T/R(505)
10mA
+3V_VDD_EC
4
VDD
97
GPIO90/AD0
98
GPIO91/AD1
99
GPIO92/AD2
100
GPIO93/AD3
108
GPIO05
96
GPIO04
101
GPIO94/DA0
105
GPI95/DA1
106
GPI96/DA2
107
GPI97
64
GPIO01/TB2
GPIO23/SCL3 GPIO31/SDA3
GPIO42/TCK GPIO43/TMS
GPIO44/TDI
GPO47/SCL4
GPIO50/TDO
GPIO53/SDA4
GPO82/TEST
GPO84/TRIST
GPIO56/TA1
GPIO14/TB1
GPIO77/SPI_DI
GPIO16/CIRTX
VCC_POR
GPIO03 GPIO07
GPIO36
GPIO51
GPIO81
GPIO41
F_SDI
F_SDO
F_CS0
F_SCK
VREF
NBSWON#
95 93 94 119 109 120 65 66 15 16 17 20 21 22 23 24 25 26 27 28
DNBSWON#_uR
91 110 112 80
31 117 63
32 118
PWRLED#
62 81
MANU_SW
84 83 82
EC_RSMRST#
75 73
ECPWROK
74
RF_EN
113 14 114 111
SPI_SDI_uR
86
SPI_SDO_uR
87
SPI_CS0#_uR_R
90
SPI_SCK_uR
92
ECDB_CLOCK
30
VCC_POR#
85
+A3VPCU
104
LID#
T14T14
T13T13
default connect to EC
RECOVER_KEY#_R(11,17)
RECOVER_KEY#(23)
to TP
DEVELOPER#_R(11,17)
high is developer mode. low is normal mode.(default)
3
R33 *0/J_6R33 *0/J_6
D8
BAS316D8BAS316
0.1U/10V_4
0.1U/10V_4
HDMI_trigger#
R880/J_4 R880/J_4
21
C19
C19
T70T70
DEVELOPER#
+3V
C20
C20
4.7U/6.3V_6
4.7U/6.3V_6
use keyboard matrix to power on, not bottom
ACIN (24) NBSWON# (15,17)
LID# (11,14,17)
SUSB# (11)
3RD_MBCLK (23)
3RD_MBDATA (23)
BATLED0# (15) BATLED1# (15) VRON (26) SUSLED# (15)
LS_ALERT# (23)
AMP_MUTE# (16) CPUFAN# (4) 4TH_MBCLK (22)
D/C# (24) S5_ON (25)
HDMI_CON_HP (22)
DNBSWON# (11)
RF_LED_EN (19) VIN_ON (24)
USB_EN_1 (17) SUSON (5,27,29)
FAN_SIG (4)
CONTRAST (14)
T12T12
PWRLED# (15) CAPSLED# (15)
3G_EN (19)
EC_RSMRST# (11)
SUSC# (11)
ECPWROK (11)
RF_EN (19)
SPI_SDO_uR_R
SPI_CS0#_uR
SPI_SCK_uR_R
+3VPCU
VCC_POR# (17)
HWPG
D19 BAS316D19 BAS316
R105*0/short_4 R105*0/short_4
RECOVER_KEY#
R1040/J_4 R1040/J_4
R114 49.9/F_4R114 49.9/F_4 R360 49.9/F_4R360 49.9/F_4 R107 49.9/F_4R107 49.9/F_4
T4T4
R113 47K/J_4R113 47K/J_4
SM BUS ARRANGEMENT TABLE
SM Bus 1
SM Bus 2
SM Bus 3
to TP
R408 0/J_4R408 0/J_4
to TPM
RECOVER_KEY#
DEVELOPER#_R DEVELOPER#
3
R245 0/J_4R245 0/J_4
+A3VPCU
R97
R97 100K/F_6
100K/F_6
12
E781AGND
4TH_MBDATA (22)
Battery
CPU thermal sensor
Light sensor
to EC
D27
D27 *Uclamp0511P_4_ESD
*Uclamp0511P_4_ESD
2 1
<20090602(A1A)_Vendor suggest> Place 10nF-0.1uF capacitors for every AD input. And close to the AD input.
TEMP_MBAT (24)
C81
C81
0.01U/16V_4
0.01U/16V_4
E781AGND
C79
C79 3300P/50V_4
3300P/50V_4
1 2
E781AGND
E781AGND
3rd SMBUS for Light sensor.
4th SMBUS for HDMI.
<20090721(B2A)_FAE suggestion> Stuff 100K and close to EC side for improving power consumption
R106 100K_4R106 100K_4
SPI_SDI_uR
10/27 Modify
to EC
RECOVER_KEY#RECOVER_KEY#_R
D33
D33 *Uclamp0511P_4_ESD
*Uclamp0511P_4_ESD
2 1
C248
C248 *0.1u/10V_4
*0.1u/10V_4
2
I/O ADDRESS SETTING(KBC)
SM BUS PU(KBC)
SPI FLASH(KBC)
SPI_SDI_uR_R(17)
SPI_SDI_uR
SPI_SDO_uR_R(17)
SPI_SCK_uR_R(17)
R136 10K_4R136 10K_4
+3V_deg_SPI
SPI_CS0#_uR(17)
2011/04/06 change power plant to +3V_deg_SPI.
1/13 Comfirm by vendor mail : If the Southbridge enables 'Long Wait Abort' by default, the flash device should be 50MHz (or faster)
+3VPCU
R133
R133 *3.3K_4
*3.3K_4
MANU_SW_R
R134
R134
10K_4
10K_4
HWPG
HWPG_2.5V(29) HWPG_VCCGFX(29)
SW4
SW4
2 1 4
C374
C374
DIP-TJG-533-S-V-T/R
DIP-TJG-533-S-V-T/R
*0.1u/10V_4
*0.1u/10V_4
default connect pin1 and pin3
2
3 5
6
SW1
SW1
3 2
1
SS3-CM-W-V-T/R(505)
SS3-CM-W-V-T/R(505)
1
SHBM=0: Enable shared memory with host BIOS
SHBM
HWPG_1.5V(5,27) HWPG_1.05V(28,29) HWPG_1.8V(29) SYS_HWPG(25)
3G_EN
1/13 Comfirm by vendor mail : Disabled ('1') if using FWH device on LPC. Enabled ('0') if using SPI flash for both system BIOS and EC firmware
RECOVER_KEY# DEVELOPER#
MBCLK MBDATA
3RD_MBCLK 3RD_MBDATA
4TH_MBCLK 4TH_MBDATA
2ND_MBCLK 2ND_MBDATA
R135 49.9/F_4R135 49.9/F_4
SPI_SDI_uR_R SPI_SDO_uR_R
SPI_CS0#_uR
U17 colay with U12 for small size SPI FLASH
SPI_SDI_uR_R SPI_SDO_uR_R
SPI_CS0#_uR
R112 *10K_4R112 *10K_4
R426 *10K_4R426 *10K_4 R425 *10K_4R425 *10K_4
R102 10K_4R102 10K_4 R101 10K_4R101 10K_4
R69 10K_4R69 10K_4 R65 10K_4R65 10K_4
R36 10K_4R36 10K_4 R35 10K_4R35 10K_4
R99 10K_4R99 10K_4 R100 10K_4R100 10K_4
U12
U12
2
SO
VDD
5
SI
HOLD
6
WP
SCK
1
CE
VSS
W25X40BVSSIG
W25X40BVSSIG
due to ZGA need to use block write protect function, so, only can use as the below parts Winbond W25X40BVSSIG AKE37FN0N01 EON EN25F40-100HIP AKE37ZN0Q00
U17
U17
2
SO
VDD
5
SI
HOLD
6
WP
SCK
1
CE
VSS
*EN25F40-100HIP
*EN25F40-100HIP
D3 *BAS316D3 *BAS316 D2 BAS316D2 BAS316 D10 BAS316D10 BAS316 D6 BAS316D6 BAS316 D4 BAS316D4 BAS316 D9 *BAS316D9 *BAS316
+3V
+3VPCU
+3V
8
HOLD#
7
MANU_SW_RSPI_SCK_uR_R
3 4
8
HOLD#
7
MANU_SW_RSPI_SCK_uR_R
3 4
R73 *Short_4R73 *Short_4
+3V_deg_SPI
R166
R166
3.3K_4
3.3K_4
+3V
R75
R75
10K_4
10K_4
INTERNAL KEYBOARD STRIP SET(KBC)
10/26 UnStuff
MY0
R78 *10K_4R78 *10K_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
WPCE781 & FLASH
WPCE781 & FLASH
WPCE781 & FLASH
ZGB
ZGB
ZGB
1
+3VPCU
+3VPCU
21 34Friday, April 08, 2011
21 34Friday, April 08, 2011
21 34Friday, April 08, 2011
RSX101M-30
RSX101M-30
C145
C145 .1u/10V_4
.1u/10V_4
HWPG (11)
21
D35
D35
2A
2A
2A
Page 22
5
4
3
2
1
PLTRST#(4,11,19,21,23)
+3V
R251 6.8K_4R251 6.8K_4 R252 *6.8K_4R 252 *6.8K_4
R37 * 0_4R37 *0_4 R28 * 0_4R28 *0_4
R71 *Short_4R71 *Short_4 R72 *Short_4R72 *Short_4
AVDD_PLL
HGND VDDMS
DGND
HGND HDMICLK­HDMICLK+ HDMITX0N HDMITX0P VDDH VDDH HDMITX1N HDMITX1P HDMITX2N HDMITX2P
HGND
DGND DVDD AVDD_PLL
HGND
HGND
R253 *6.8K_4R253 *6.8K_4
U16
U16
1
AVDD_PLL
2
AGND_PLL
3
RESERVED
4
VDDMS
5
GNDMS
6
VSSH
7
TLCB
8
TLC
9
TDC0B
10
TDC0
11
VDDH
12
VDDH
13
TDC1B
14
TDC1
15
TDC2B
16
TDC2
17
VSSH
18
DGND
19
DVDD
20
AVDD_PLL
21
AGND_PLL
22
VSSR
CH7036
CH7036
HGND
HDMI_HPD
PLTRST#
PROM_SC
PROM_SD
SPC
SPD
88
86
85
84
83
82
IRQ
SPD87SPC
HPD
RSTB
AGND
VCC _EN
PROM_SC81PROM_SD
CH7036
CH7036
VDDR23RX0B25RX126RX1B27RX228RX2B29RX330RX3B31RXC32RXCB
RX0
24
VDDR
INT_TXLOUTP0
INT_TXLOUTN0
INT_TXLOUTP1
INT_TXLOUTN1
INT_TXLOUTP2
INT_TXLOUTN2
+3V
80
D D
4TH_MBCLK(21) 4TH_MBDATA(21)
SMBCK1(2,3,19,23) SMBDT1(2,3,19,23)
C C
4TH_MBCLK 4TH_MBDATA
SMBCK1
SMBDT1
R247
R247 10K_4
10K_4
INT_TXLOUTP0(4) INT_TXLOUTN0(4)
INT_TXLOUTP1(4) INT_TXLOUTN1(4)
INT_TXLOUTP2(4) INT_TXLOUTN2(4)
INT_TXLCLKP(4) INT_TXLCLKN(4)
R250 1.2K_4R250 1.2K_4 R12
XO
Y1
XI
C253
AVDD
ISET
79
77
76
AVDD
GPI O178GPI O2
LDC034LDC0B35LDC136LDC1B37LDC238LDC2B39LDC341LDC3B
33
INT_TXLOUTN0_L
INT_TXLOUTP0_L
INT_TXLCLKP
INT_TXLCLKN
C253
27p/50V_4
HGND
AVDD_DACXOXI
71
70
69
72
DAC2
DAC1
AGND_DAC
AVD D_DAC
I2S_D/SPDIF
VDDT
40
42
VDDT
INT_TXLCLKP_L
INT_TXLOUTN2_L
27p/50V_4
67XO68
XI
66
CEC
65
DDC_SD
64
DDC_SC
63
GNDMQ
62
VDDMQ
61
VDDMS
60
GNDMS
59
VSO
58
HSO
57
DVDD
56
DGND
55
GNDMQ
54
VDDMQ
53 52
I2S_WS
51
I2S_CK
50
AGND
49
PDB
48
AUDDAC
47
PWM
46
AVDD
45
VSST
LLC43LLCB
44
Address : ECh
INT_TXLCLKN_L
HGND
AVDD_DAC
75
74
73
ISET
DAC0
AGND_DAC
AVDD_DA C
INT_TXLOUTP2_L
INT_TXLOUTN1_L
INT_TXLOUTP1_L
27MHzY127MHz
HDMI_CON_DDCDATA HDMI_CON_DDCCLK
DGND VDDMQ VDDMS DGND
DVDD DGND
DGND VDDMQ I2S/SPDIF
HGND
AVDD
HGND
HDMI_PD#(21)
C254
C254 27p/50V_4
27p/50V_4
HDMI_PD#
T27T27
+3V
R241
R241 10K_4
10K_4
2011/04/6 EMI change to 0.1uf
+3V
B B
A A
C272
C272
C271
C271
0.1u/10V_4
0.1u/10V_4
+1.8V_HDMI
+3V_HDMI
C273
C273
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
+3V +3V_HDMI +1.8V +1.8V_HDMI
R74 *Short_8R74 *Short_8
L23 BLM21PG221SN1D_8L23 BLM21PG221SN1D_8
L22 BLM21PG221SN1D_8L22 BLM21PG221SN1D_8
L19 BLM21PG221SN1D_8L19 BLM21PG221SN1D_8
L21 BLM21PG221SN1D_8L21 BLM21PG221SN1D_8
2011/03/29 EMI change to 100pf
5
Remove bypassed resistor2011/0221
VDDMS
C247
C247 10u/10V_8
10u/10V_8
C246
C246 10u/10V_8
10u/10V_8
C240
C240 10u/10V_8
10u/10V_8
C242
C242 10u/10V_8
10u/10V_8
VDDMQ
AVDD_PLL
DVDD
C251
C251
0.1u/10V_4
0.1u/10V_4
C252
C252
0.1u/10V_4
0.1u/10V_4
C241
C241 100p/50V_4
100p/50V_4
C244
C244
0.1u/10V_4
0.1u/10V_4
R77 *Short_8R77 *Short_8
+3V_HDMI
L18 BLM21PG221SN1D_8L18 BLM21PG221SN1D_8
L17 BLM21PG221SN1D_8L17 BLM21PG221SN1D_8
L24 BLM21PG221SN1D_8L24 BLM21PG221SN1D_8
L20 BLM21PG221SN1D_8L20 BLM21PG221SN1D_8
L25 BLM21PG221SN1D_8L25 BLM21PG221SN1D_8
C234
C234 10u/10V_8
10u/10V_8
C232
C232 10u/10V_8
10u/10V_8
C245
C245 10u/10V_8
10u/10V_8
C237
C237 10u/10V_8
10u/10V_8
C257
C257 10u/10V_8
10u/10V_8
VDDR
VDDT
VDDH
AVDD
AVDD_DAC
C235
C235
0.1u/10V_4
0.1u/10V_4
C233
C233
0.1u/10V_4
0.1u/10V_4
C243
C243 100p/50V_4
100p/50V_4
2011/03/29 EMI change to 100pf
C238
C238
0.1u/10V_4
0.1u/10V_4
C256
C256
0.1u/10V_4
0.1u/10V_4
4
due to DDC voltage level is too low issue, delete D1.
2011/04/6 EMI change to 0.1uf
+3V_HDMI
+3V
R10
R10
R15
R15
R14
R14
*10K_4
*10K_4
*10K_4
*10K_4
*10K_4
*10K_4
SPDIF level is from 0~3.3V CH7035:SPDIF voltage level is 0~2.5V, so, need to add level shift CH7036:SPDIF voltage level is 0~3.3V
I2S/SPDIF
U3
U3
1
A0
2
A1
3
A2 VSS4SDA
*AT24C16BN-SH-T(SOIC)
*AT24C16BN-SH-T(SOIC)
+2.5V
R248
R248 *330/F_6
*330/F_6
8
VCC
7
WP
6
SCL
5
R249 *0/short_4R249 *0/short_4
R13 *0_4R13 *0_4
+3V +3V
C11
C11 *0.1u/10V_4
*0.1u/10V_4
SPDIF
R12
5.6K_4
5.6K_4
for SPDIF level shift
WCM-2012-900T
WCM-2012-900T
2
+5V
2
3
WCM-2012-900T
WCM-2012-900T
2
2
3
WCM-2012-900T
WCM-2012-900T
2
2
3
WCM-2012-900T
WCM-2012-900T
2
2
3
F2
F2
1 2
SMD1206P110TFT
SMD1206P110TFT C236
C236 *HM@10u/10V_8
*HM@10u/10V_8
C270
C270
0.1u/10V_4
0.1u/10V_4
INT_TXLOUTP0_L
INT_TXLOUTN1_L INT_TXLOUTP1_L
INT_TXLOUTN2_L INT_TXLOUTP2_L
INT_TXLCLKN_L INT_TXLCLKP_L
6/29 : RF team suggest to add L16,L26,L33,L34 2011/03/29 :remove bypass resistor.
01/15 Modify
C262
C262
0.1u/10V_4
0.1u/10V_4
INT_TXLOUTN0_L1
1
1
INT_TXLOUTP0_L1
443
L16
L16
INT_TXLOUTN1_L1
1
1
INT_TXLOUTP1_L1
443
L26
L26
INT_TXLOUTN2_L1
1
1
INT_TXLOUTP2_L1
443
L33
L33
INT_TXLCLKN_L1
1
1
INT_TXLCLKP_L1
443
L34
L34
30mils
C13
C13 HM@0.1u/10V_4
HM@0.1u/10V_4
3
INT_TXLOUTP0_L1 (14)
INT_TXLOUTN1_L1 (14) INT_TXLOUTP1_L1 (14)
INT_TXLOUTN2_L1 (14) INT_TXLOUTP2_L1 (14)
INT_TXLCLKN_L1 (14) INT_TXLCLKP_L1 (14)
DDC5V HDMI_HPD
HDMITX2P HDMITX2N
HDMITX1P HDMITX1N
HDMITX0P HDMITX0N
HDMICLK+ HDMICLK-
HDMI_CON_DDCCLK HDMI_CON_DDCDATA
1 2 3 4 5
1 2 3 4 5
1 2 3 4 5
R11
R11
5.6K_4
5.6K_4
PROM_SC PROM_SD
SPDIF (16)
ESD1
ESD1
1 2 VCC 4 5
*RCIamp0514M
*RCIamp0514M
ESD2
ESD2
1 2 VCC 4 5
*RCIamp0514M
*RCIamp0514M
ESD3
ESD3
1 2 VCC 4 5
*RCIamp0514M
*RCIamp0514M
HDMI_HPD
HGNDDGND GND
2011/04/06 Remove RN2/3/4 and L3/4/5/6.
10
10
9
9
8
GND
7
7
6
6
10
10
9
9
8
GND
7
7
6
6
10
10
9
9
8
GND
7
7
6
6
DDC5V
HDMI_HPD
HDMITX2P HDMITX2N
HDMITX1P HDMITX1N
HDMITX0P HDMITX0N
HDMICLK+ HDMICLK-
HDMI_CON_DDCCLK HDMI_CON_DDCDATA
2
R436 0_4R436 0_4
R437 0_4R437 0_4
HDMI_CON_HP_TP
HDMI_CON_HP
HDMI_HPD
+5V
R246 HM@2.2K_4R 246 HM@2.2K_4 R244 HM@2.2K_4R 244 HM@2.2K_4
R243 20K/F_4R243 20K/F _4
R242
R242 47K/J_4
47K/J_4
HDMI_CON_HP_TP (11)
HDMI_CON_HP (21)
SPDIF_JD(16)INT_TXLOUTN0_L1 (14)
SPDIF_JDINT_TXLOUTN0_L
2N7002K
2N7002K
3
HDMI_CON_HP1
2
Q27
Q27
1
HDMI CONN
CN10
CN10
20
HDMITX2P HDMITX2N
HDMITX1P HDMITX1N
HDMITX0P HDMITX0N
HDMICLK+ HDMICLK-
HDMI_CON_DDCCLK HDMI_CON_DDCDATA
DDC5V HDMI_CON_HP1
12
C239
C239 *0.22U/6.3V_4
*0.22U/6.3V_4
vendor suggest to devide the the voltage.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, April 08, 2011
Date: Sheet of
Friday, April 08, 2011
Date: Sheet of
Friday, April 08, 2011
SHELL1
1
D2+
2
D2 Shield
3
D2-
4
D1+
5
D1 Shield
6
D1-
7
22
D0+
GND
8
D0 Shield
9
D0-
10 11 12 13 14 15 16 17 18 19
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
HDMI(2/2)
HDMI(2/2)
HDMI(2/2)
1
CK+ CK Shield CK­CE Remote NC DDC CLK DDC DATA GND +5V HP DET
SHELL2
HDMI CONN
HDMI CONN
23
GND
21
ZGB
ZGB
ZGB
2A
2A
2A
3422
3422
3422
Page 23
5
4
3
2
1
TPM
D D
PLTRST#(4,11,19,21,22)
+3V
C C
+3V
R82 *0/short_4R82 *0/short_4
R79 *15K/J_4R79 *15K/J_4
R433 *Short_4R433 *Short_4R400 *Short_6R400 *Short_6
LPCAD0(11,19,21) LPCAD1(11,19,21) LPCAD2(11,19,21) LPCAD3(11,19,21)
PCLK_TPM(2) LPCFRAME#(11,19,21)
SERIRQ(9,21)
CLKRUN#(11,21)
+3V_S5
RECOVER_KEY#(21)
C115
C115
0.1U_4
0.1U_4
C80
C80
10u/6.3V_8
10u/6.3V_8
PCLK_TPM LPCFRAME# PLTRST#_TPM SERIRQ
1 2
12
R108 4.7KR108 4.7K
1 2
R370 *Short_4R370 *Short_4
C765
C765 15P/50V_4
15P/50V_4
+3V_S5
+3V
D17
D17
2 1
RSX101M-30
R605
R605
TPM_XTALI
*1M_4
*1M_4
32.768K/10PPM
32.768K/10PPM
RSX101M-30
Y7
Y7
21
TPM_XTALO
R110*0/J_4 R110*0/J_4
20110406 R605 un-staff.
TPM_LPCPD# (11)
TPM_LPC_PD# (21)
C756
C756 15P/50V_4
15P/50V_4
+3V_S5
R431
R431
4.7K_4
4.7K_4
R430
R430
*4.7K_4
*4.7K_4
12
C74
C74
0.1U_4
0.1U_4
19
U8
U8
26
LAD0
23
LAD1
20
LAD2
17
LAD3
21
LCLK
22
LFRAME#
16
LRESET#
27
R4320/J_4 R4320/J_4
12
R413*0/J_4 R413*0/J_4
SERIRQ
15
CLKRUN#
R924.7K R924.7K
7
PP
R96*4.7K R96*4.7K
5
VSB
VDD24VDD
TESTB1/BADD
TPM
TPM SLB 9635 TT 1.2
SLB 9635 TT 1.2
GND4GND11GND18GND
25
28
LPCPD#
9 8
TEST1
14
XTALO
13
XTALI
2
GPIO2
6
GPIO
1
NC
3
NC
12
NC
10
NC
SLB9635TT_TSSOP28
SLB9635TT_TSSOP28
12
C77
C77
0.1U_4
0.1U_4
LPCPD#
TPM_BADD
TPM_XTALO TPM_XTALI
R83 *Short_4R83 *Short_4
Resiger Base Address
BADD=0
BADD=1 (default)
2E / 2F
4E / 4F
Light Sensor(LSR)
C1
C1 *0.1u/10V_4
*0.1u/10V_4
+3V
R376
R376 *Short_6
*Short_6
1 2
TSL2561FN
TSL2561FN
Address 52H
5
U1
U1
VDD ADDR SEL GND3SCL
B B
0.6mA
A A
connector to EC, just stuff R2,R26,R257,R260 connector to TPT, just stuff R341,R373,R412
B2A
SDA
6 5
INT
4
R26 *0/J_4R26 *0/J_4 R257 *0/J_4R257 *0/J_4 R260 *0/J_4R260 *0/J_4
R341 0/J_4R341 0/J_4 R373 0/J_4R373 0/J_4 C78 R412 0/J_4R412 0/J_4
3RD_MBDATA LS_ALERT# 3RD_MBCLK
SMBCK1 PCI_INTH# SMBDT1
change interrupt pin from GPIO15 to GPIO5 at TPT, then their power plane are the same(+3V), so no leakage issue.
4
LS_ALERT#
R2 *10K/J_4R2 *10K/J_4
3RD_MBDATA (21) LS_ALERT# (21) 3RD_MBCLK (21)
SMBCK1 (2,3,19,22)
PCI_INTH# (10)
SMBDT1 (2,3,19,22)
+3V
pull high at EC side
Video Decoder
3
CLK_PCIE_Dec(2) CLK_PCIE_Dec#(2)
CLKREQ_Dec#(2)
dont need to stuff first, use innr document to add it.
+3V
R76
R76 *0_6
*0_6
+3V_decoder
PE3TX+(8) PE3TX-(8)
PE3RX+(8) PE3RX-(8)
CN15
CN15
51
Reserved
49
Reserved
47
Reserved
45
Reserved
43
Reserved
41
Reserved
39
Reserved
37
Reserved
35
GND
33
PETp0
31
PETn0
29
GND
27
GND
25
PERp0
23
PERn0
21
GND
19
Reserved
17
Reserved
15
GND
13
REFCLK+
11
REFCLK-
9
GND
7
CLKREQ#
5
Reserved
3
Reserved
1
WAKE#
1827680-1
1827680-1
2
+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_D-
GND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
Reserved
GND
Reserved Reserved Reserved Reserved Reserved
+1.5V
GND
+3.3V
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, April 08, 2011
Date: Sheet of
Friday, April 08, 2011
Date: Sheet of
Friday, April 08, 2011
+3V_decoder
52 50 48 46 44 42 40 38 36 34 32 30 28 26 24 22 20 18
16 14 12 10 8 6 4 2
Light/G-Sensor/GPS/TPM/Deco
Light/G-Sensor/GPS/TPM/Deco
Light/G-Sensor/GPS/TPM/Deco
R22 *0_6R22 *0_6
PLTRST# (4,11,19,21,22)
C78 *0.1U/10V_4
*0.1U/10V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
+3V
C61
C61 *0.1U/10V_4
*0.1U/10V_4
ZGB
ZGB
ZGB
C18
C18 *10U/6.3V_8
*10U/6.3V_8
2A
2A
2A
3423
3423
3423
Page 24
POWER_JACK
POWER_JACK
dcjk-2dc2003-000111-3p-v
dcjk-2dc2003-000111-3p-v
PJ1
PJ1
1 2
5
PL1
PL1
HI0805R800R-00_8
VAVA
HI0805R800R-00_8
3
456
7
D D
VA
PR2
PR2 *10_1210
*10_1210
PC2
PC2
*1u/16V_1210
C C
B B
A A
*1u/16V_1210
PJ2
PJ2
C114F3-108A1-L_Batt_Conn
C114F3-108A1-L_Batt_Conn
1
10
2 3 4 5 6 7 89
PR18
PR18
*0/short_4
*0/short_4
PC54
PC54
0.1u/50V_6
0.1u/50V_6
PR1
PR1 *10_1210
*10_1210
PC1
PC1 *1u/16V_1210
*1u/16V_1210
TEMP_MBAT_C
PC11
PC11 47p/50V_6
47p/50V_6
PR17
PR17 100_4
100_4
5
PC51
PC51 *22u/25V_1206
*22u/25V_1206
*22u/25V_1206
*22u/25V_1206
PR16
PR16 100_4
100_4
PC50
PC50
PC70
PC70 1u/25V_8
1u/25V_8
100p/50V_6
100p/50V_6
MBAT+
PC10
PC10 47p/50V_6
47p/50V_6
PC55
PC55
2200p/50V_6
2200p/50V_6
BQ24765_DCIN
PR106
PR106
4.7K/F_4
4.7K/F_4
PC62
PC62
12
0.1u/50V_6
0.1u/50V_6
MBCLK (21)
MBDATA (21)
PR15
PR15 100_4
100_4
PC60
PC60
PR111
PR111 22_8
22_8
PR35
PR35 22_8
22_8
PC6
PC6
0.01u/16V_4
0.01u/16V_4
PR13
PR13
49.9K/F_4
49.9K/F_4
120P/50V_4
120P/50V_4
PC12
PC12 *0.01u/16V_4
*0.01u/16V_4
HI0805R800R-00_8
HI0805R800R-00_8
HI0805R800R-00_8
HI0805R800R-00_8
PR104
PR104 200K/F_4
200K/F_4
PC63
PC63
PL4
PL4
PL2
PL2
PR22
PR22 100K_4
100K_4
4
VA1
PC52
PC52
0.1u/50V_6
0.1u/50V_6
PD4
PD4 SW1010CPT
SW1010CPT
PC57
PC4
PC4
0.1u/50V_6
0.1u/50V_6
PC58
PC58
56p/50V_4
56p/50V_4
TEMP_MBAT (21)
PU1
PU1 CM1293A-04SO
CM1293A-04SO
1
CH1
2
VN
PC57 2200p/50V_6
2200p/50V_6
PC59 1u/16V_6PC59 1u/16V_6
PR103
PR103
7.5K/F_4
7.5K/F_4
CH4
VP
PC5
PC5
10u/25V_1206
10u/25V_1206
PR21 316K/F_4
316K/F_4
PC61
PC61 2200p/50V_4
2200p/50V_4
PC8
PC8 *0.01u/16V_4
*0.01u/16V_4
BAT-V
+3VPCU
CH23CH3
Add ESD diode base on EC FAE suggestion
4
PD5
PD5 SX34
SX34
CSIP
0.1u/50V_6
0.1u/50V_6
6 5 4
PC56
PC56
PC7
PC7 *0.01u/16V_4
*0.01u/16V_4
MBDATA
MBCLKTEMP_MBAT_C
VIN_SRC
MBDATA(21)
MBCLK(21)
+3VPCU
PD6
PD6 SMAJ20A
SMAJ20A
2 1
VIN_SRC
BQ24765_REF
BQ24765_ACIN BQ24765_EAO BQ24765_EAI BQ24765_FBO
BQ24765_REF
ICMNT(21)
PL10
PL10 HI0805R800R-00_8
HI0805R800R-00_8
1 2 3 4 5 6 7 8
9 10 11 12
PR108
PR108
8.45K/F_4
8.45K/F_4
+3VPCU
PR107
PR107 10K_4
10K_4
PR115
PR115 0_4
0_4
PR116
PR116 0_4
0_4
VA2
PGND DCIN_P DCIN_P DCIN_P CSSN CSSP VREF ICREF ACIN EAO EAI FBO
PC53
PC53
0.1u/50V_6
0.1u/50V_6
34
35
TP
PGND
BQ24765RUVR
BQ24765RUVR
CE
13
PC64
PC64
100p/50V_4
100p/50V_4
3
PU5
PU5
14
3
2
PR102
PR102
0.01_0612
0.01_0612
8
1 2
7 6 5
VIN_SRC CSIP
PC74
PC74
0.1u/50V_6
0.1u/50V_6
VIN_SRC
PC73
PC73 2200p/50V_6
2200p/50V_6
PR100
PR100 220K_4
220K_4
PQ22
PQ22 AO4427
AO4427
1 2 3
4
1 6
PR99
PR99
2
220K_4
220K_4
3
31
33
32
30
PGND
PGND
PHASE
PHASE
29
PHASE
28
PHASE
27
PHASE
DCIN_A
ICOUT
SDA15VICM
VDDSMB17SCL
BOOT
VDDP
CSOP
CSON
AGND
ACOK
VFB
BQ24765_BOOT
26
BQ24765_DCIN
25
BQ24765_VDDP
24 23 22 21
BQ24765_VFB
20 19 18
16
PC117
PC117 *0.1u/50V_6
*0.1u/50V_6
PC66
PC66 1u/16V_6
1u/16V_6
PQ23
PQ23
IMD2AT108
IMD2AT108
T2T2
CSOP BAT-V
BQ24765_REF
VIN_SRC
PR34
PR34 10K_4
10K_4
5 4
BQ24765_LX
PR110
PR110
2.2_6
2.2_6
ACIN (21)
PC133
PC133 *0.1u/50V_6
*0.1u/50V_6
For RF reqirement
PR101
PR101 *0/short_4
*0/short_4
PC69
PC69
0.1u/50V_8
0.1u/50V_8 PD7
PD7 RB500V-40
RB500V-40PR21
PR33 100_4PR33 100_4
PC17
PC17 *0.1u/50V_6
*0.1u/50V_6
PC20
PC20
1u/25V_6
1u/25V_6
PC72
PC72 1u/16V_6
1u/16V_6
BAT-V
PC105
PC105
0.1u/50V_6
0.1u/50V_6
VIN_SRC VIN
PR109
PR109 *4.7_6
*4.7_6
PC67
PC67
*680p/50V_6
*680p/50V_6
1 3
PR38
PR38 150K_4
150K_4
VIN_ON(21)
PQ18
PQ18 DMN601K-7
DMN601K-7
2
D/C# (21)
PQ26
PQ26
AOL1413
AOL1413
4
3
2
1
0.01_0612
0.01_0612 PR105
PL3
PL3
3.3uH
3.3uH
PC71
PC71 1u/25V_8
1u/25V_8
CSOP
BAT-V
PR105
1 2
PC68
PC68
0.1u/50V_6
0.1u/50V_6
52
PR39
PR39 39K_4
39K_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Charger(BQ24765)
Charger(BQ24765)
Charger(BQ24765)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
PQ24
PQ24 AO4427
AO4427
8 7 6 5
4
PR114
PR114 10K_4
10K_4
PR113
PR113 33K/F_4
33K/F_4
1 2 3
3
2
PQ25
PQ25
DMN601K-7
DMN601K-7
PC13
PC13 2200p/50V_6
2200p/50V_6
PR148
PR148 *0/short_4
*0/short_4
PR112
PR112 *0/short_4
*0/short_4
VIN_SRC
PC135
PC135 *10u/25V_1206
*10u/25V_1206
For RF reqirement
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
PC134
PC134 *10u/25V_1206
*10u/25V_1206
1
1
PC14
PC14
10u/25V_1206
10u/25V_1206
ZGB
ZGB
ZGB
24 34Friday, April 08, 2011
24 34Friday, April 08, 2011
24 34Friday, April 08, 2011
BAT-V
PC65
PC65
10u/25V_1206
10u/25V_1206
2A
2A
2A
Page 25
5
4
3
2
1
MAIND
VIN_SRC
D D
OCP:5.5A
3.8A
152mil
+5VPCU
C C
+
+
PC127
PC98
PC98 *10u/25V_1206
*10u/25V_1206
PC127 330u/6.3V_7343
330u/6.3V_7343
OCP:5.5A
L(ripple current)
B B
=(9-5)*5/(2.2u*0.4M*9) ~2.525A
Iocp=5.5-(2.525/2)=4.24A Vth=4.24A*14.2mOhm=0.06V R(Ilim)=(0.06V*10)/5uA ~120K
PC119
PC119
2.2n/50V_6
2.2n/50V_6
PR54
PR54 *0_4
*0_4
PC102
PC102
0.1u/50V_6
0.1u/50V_6
PR55
PR55 0_4
0_4
MAIND (27,29)
VIN_SRC
PC122
PC122
4.7u/25V_0805
4.7u/25V_0805
PL8
PL8
2.2uH_7X7X3
2.2uH_7X7X3
PC131
PC131 3G@2.2n/50V_6
3G@2.2n/50V_6
SYS_SHDN#(4,17,26)
4.7u/25V_0805
4.7u/25V_0805
PR169
PR169 3G@2.2/F_6
3G@2.2/F_6
PC121
PC121
PD10
PD10 *SX34
*SX34
+5VPCU_FB
+15V
VL
PR64
PR64
0_4
0_4
PR60
PR60
0_4
0_4
578
PQ34
PQ34 AO4468
AO4468
3 6
241
5V_LX SKIP
578
PQ37
PQ37 AO4710
AO4710
3 6
241
PC41
PC41
0.1u/50V_6
0.1u/50V_6
PR81
PR81 22_8
22_8
5V_EN
5V_DH
5V_DL
3V5V_EN
+15V_ALWP
12
3V_EN
PR67
PR67 39K/F_4
39K/F_4
PR66
PR66 0_4
0_4
PD2
PD2 CHN217
CHN217
PD3
PD3 CHN217
CHN217
1 2
PR59
PR59 118K/F_4
118K/F_4
PC31
PC31
0.1u/50V_6
0.1u/50V_6
2
1
2
1
PC44
PC44
0.1u/50V_6
0.1u/50V_6
PR47
PR47 390K_4
390K_4
PR48
PR48 150K_4
150K_4
+5VPCU
DDPWRGD_R
0.1u/50V_6
0.1u/50V_6
3
3
1 2
1 2
PC33
PC33
PR83
PR83 *200K/F_4
*200K/F_4
PC28
PC28
0.1u/50V_6
0.1u/50V_6
5V_EN
PR63
PR63 1/F_6
1/F_6
PC36
PC36
0.1u/50V_6
0.1u/50V_6
1u/10V_4
1u/10V_4
8206_ONLDO
9
BYP
10
OUT1
11
FB1
12
ILIM1
13
PGOOD1
14
EN1
15
DH1
16
LX1
37
PAD
36
PAD
35
PC29
PC29
PAD33PAD34PAD
VL
PC34
PC34 1u/16V_6
1u/16V_6
VL
PC25
PC25
4.7u/10V_8
4.7u/10V_8
1 2
PR49
PR49 0_4
0_4
1 2
3
4NC5
6
7
8
VIN
LDO
ONLDO
LDOREFIN
PU3
PU3 RT8206B
RT8206B
BST117DL118PVCC19NC20GND21PGND22DL223BST2
12
PR72
PR72 *39K/F_4
*39K/F_4
1 2
1
REF
TON2VCC
24
PR42
PR42 *0/short_4
*0/short_4
PR147
PR147 *0/short_4
*0/short_4
REFIN2
PGOOD2
PR73
PR73 *0/short_6
*0/short_6
PC27
PC27
0.1u/50V_6
0.1u/50V_6
REF
ILIM2
OUT2
SKIP#
EN2 DH2
LX2
1 2
VIN_SRC
32 31 30 29 28 27 26 25
PR74
PR74 1/F_6
1/F_6
PR43
PR43 0_4
0_4
12
PR44
PC26
PC26 1u/16V_6
1u/16V_6
PR45
PR45 *0_6
*0_6
REFIN2
DDPWRGD_R
3V_EN 3V_LX
PR44 *0_4
*0_4
PR53
PR53 169K/F_4
169K/F_4
PC35
PC35
0.1u/50V_6
0.1u/50V_6
3V_DL
SKIP REF
OCP:5A
L(ripple current) =(9-3.3)*3.3/(2.2u*0.5M*9) ~1.267A
Iocp=5-(1.267/2)=4.37A Vth=4.37A*19.6mOhm=85.59mV R(Ilim)=(85.59mV*10)/5uA ~171K
2.2n/50V_4
2.2n/50V_4
PQ35
PQ35 AO4932
AO4932
D1
D1
1
D1 S1/D2
D1 S1/D2
2
G2
G2
3
S2
S2
4
+3VPCU_OUT
1 2
PR51
PR51 *0_4
*0_4
1 2
PR50
PR50 *0/short_4
*0/short_4
PC114
PC114
3V_DH
PD9
PD9 *SX34
*SX34
PC115
PC115
4.7u/25V_0805
4.7u/25V_0805
G1
G1
8 7
3V_LX
6 5
1 2
PR57 0_4PR57 0_4
1 2
PR56 *0_4PR56 *0_4
DDPWRGD_R
PL9
PL9
3.3uH_7X7X3
3.3uH_7X7X3
PR140
PR140 3G@2.2/F_6
3G@2.2/F_6
PC108
PC108 3G@2.2n/50V_6
3G@2.2n/50V_6
+3VPCU
PR62
PR62 100K/F_4
100K/F_4
PR65
PR65 *0/short_4
*0/short_4
+3VPCU
VIN_SRC
148mil
OCP:5A
3.7A
+3VPCU
PC101
PC101
150u/6.3V_3528
150u/6.3V_3528
+
PR58
PR58 *0_4
*0_4
1 2
PR52
PR52 *0_4
*0_4
1 2
+
PC96
PC96
0.1u/50V_6
0.1u/50V_6
SYS_HWPG (21)
+15VVIN_SRC
PR28
PR28 1M_6
1M_6
3
PQ15
PQ15
1
DMN601K-7
DMN601K-7
VIN_SRC
PR27
PR27 *1M_6
*1M_6
S5D MAIND MAIND
PC15
PC15 *2.2n/50V_4
*2.2n/50V_4
3
2
PQ38
PQ38 AO3404
AO3404
1
+5V_S5
+5V_S5+3V_S5
PR29
PR29 1M_6
1M_6
A A
S5_ON(21)
2
PQ14
PQ14
DTC144EU
DTC144EU
PR30
1 3
PR30 1M_6
1M_6
PR26
PR26 22_8
22_8
3
2
PQ17
PQ17 DMN601K-7
DMN601K-7
1
PR25
PR25 22_8
22_8
3
2
1
PQ16
PQ16 DMN601K-7
DMN601K-7
2
0.0075A
10mil
5
4
+5VPCU
3
2
PQ28
PQ28 AO3404
AO3404
1
+5V
0.717A
30mil
3
2
+3VPCU
3
1
PQ21
PQ21 AO3404
AO3404
2.154A
86mil
+3VPCU+5VPCU
3
2011/02/16 Remove PQ22
S5D
2
PQ19
PQ19 AO3404
AO3404
1
+3V
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
40mil
+3V_S5
0.906A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
SYSTEM 5V/3V (RT8206)
SYSTEM 5V/3V (RT8206)
SYSTEM 5V/3V (RT8206)
ZGB
ZGB
ZGB
2A
2A
25 34Friday, April 08, 2011
25 34Friday, April 08, 2011
25 34Friday, April 08, 2011
1
2A
Page 26
5
6/24 : PR127 need to add after thermal final tune.
D D
1 2
PC39
PC39 1u/10V_6
1 2
PC43
PC43 1u/10V_6
1u/10V_6
PWR
20 19 18 17 16 15 14
6
7
1
8
PR89
PR89 200K/F_4
200K/F_4
1u/10V_6
D6 D5 D4 D3 D2 D1 D0
DPRSTP
DPRSLPVR
PWR
THRM
+5V
VID6(4) VID5(4) VID4(4)
PC32
PC32
8796VCC
VR_PWRGD_CK410#(2)
12
PR68
PR68
*2.7K/F_4
*2.7K/F_4
IMVP_PWRGD(4,11)
VID3(4) VID2(4) VID1(4) VID0(4)
PR88
PR88
15K/F_4
15K/F_4
PR158
PR158
100K/F_4_NTC
100K/F_4_NTC
+3V
VRON(21)
PR85 *0/short_4PR85 *0/short_4
PR86 499/F_4PR86 499/F_4
PR69
PR69 *2.7K/F_4
*2.7K/F_4
8796THRM
VIN
PR168 4.7K_4PR168 4.7K_4
PR167 10K/F_4PR167 10K/F_4
C C
ICH_DPRSTP#(4,11)
PM_DPRSLPVR(4,11)
*0.1U/50V_6
*0.1U/50V_6
B B
+1.05V H_PROCHOT#(4) SYS_SHDN#(4,17,25)
PR75
PR75
60.4K/F_4
60.4K/F_4
8796VCC
PR80
PR80
10/F_6
10/F_6
23
VDD
TON
9
*0/short_4
*0/short_4
PR90
PR90 PR91 *0/short_4PR91 *0/short_4
PR92 *0/short_4PR92 *0/short_4
31
VCC
PWRGD
10
4
PR170
PR170
*100K/F_4
*100K/F_4
PR70 *68/F_4PR70 *68/F_4 PR71 *0_4PR71 *0_4 PR127 *0_4PR127 *0_4
PR76
PR76
29
30
ILIM
TIME
PU4
PU4
MAX8796
MAX8796
SHDN
CLKEN
11
12
+3V
+3V
PR143
PR143 10K/F_4
10K/F_4
1 2
12.7K/F_4
12.7K/F_4
27
32
PR93
PR93 *0/short_4
*0/short_4
PGDIN
CCV
PC38
PC38
100P/50V_4
100P/50V_4
24
BST
PGND
21
28
VRHOT
V3P3
13
PC40
PC40
PR77
PR77
0.22U/25V_6
0.22U/25V_6
2.2_6
2.2_6
26
25
LX
DH
DL
CSP
CSN
FB
GNDS
AGND
33
PR155 *0/short_4PR155 *0/short_4
PR152 *0/short_4PR152 *0/short_4
22
5
4
3 2
PC48 1000p/50V_4PC48 1000p/50V_4
12
PC47
PC47
0.22u/6.3V_4
0.22u/6.3V_4
PC45 1000p/50V_4PC45 1000p/50V_4
3
8796DH
8796LX 8796DL
PR82
PR82
4.02K/F_4
4.02K/F_4
PC42 1000p/50V_4PC42 1000p/50V_4
FB_SRC
PR79 10/F_4PR79 10/F_4
GNDS
PR78 10/F_4PR78 10/F_4
PC37 1000p/50V_4PC37 1000p/50V_4
FB_SRC
PR40 *10/F_4PR40 *10/F_4
GNDS
PR41 *10/F_4PR41 *10/F_4
PC46
PC46
1000p/50V_4
1000p/50V_4
4
4
VCCSENSE (6) VSSSENSE (6)
VCC_CORE
PQ43
PQ43 AOL1448
AOL1448
5
213
PQ44
PQ44 AOL1718
AOL1718
5
PR138
PR138
213
3G@2.2/F_6
3G@2.2/F_6
PC109
PC109
3G@2.2n/50V_6
3G@2.2n/50V_6
PC120
PC120
2200p/50V_6
2200p/50V_6
PR156
PR156
1.8K/F_4
1.8K/F_4
8796CSP 8796CSN
PR154
PR154
2.74K/F_4
2.74K/F_4
2
12
PC129
PC129
4.7u/25V_0805
4.7u/25V_0805
DCR=3m
PL7
PL7 1uH
1uH
PR121
PR121
10K_6_NTC
10K_6_NTC
12
PC126
PC126
4.7u/25V_0805
4.7u/25V_0805
VCC_CORE
PR150
PR150 *0/short_4
*0/short_4
PR151
PR151 10K/F_4
10K/F_4
VIN
12
+3VPCU
PC132
PC132
4.7u/25V_0805
4.7u/25V_0805
+
+
PC111
PC111 330u/2V_7343
330u/2V_7343
+3VPCU
Load-line=-5.9mV/A
PR96 *0_4PR96 *0_4
PR97 *0_4PR97 *0_4
PR98 *0_4PR98 *0_4
PR95 *0_4PR95 *0_4
PR94 *0_4PR94 *0_4
PR87 *0_4PR87 *0_4
PR84 *0_4PR84 *0_4
VID 1.0V
+
+
PC75
PC75 330u/2V_7343
330u/2V_7343
1
OCP:3.5A
VCC_CORE
VID0
VID1
VID2
VID3
VID4
VID5
VID6
+3V
PC49
PC49
*470P/50V_4
A A
5
*470P/50V_4
4
Connect to output cap GND
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
VCore( IMAX8796GTJ+)
VCore( IMAX8796GTJ+)
VCore( IMAX8796GTJ+)
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT :
ZGB
ZGB
ZGB
2A
2A
26 34Friday, April 08, 2011
26 34Friday, April 08, 2011
26 34Friday, April 08, 2011
1
2A
Page 27
5
4
3
2
1
[PWM]
PC106
PC106 10u/10V_8
30mil
0.75A
D D
+0.75V_DDR_VTT
15mil
PC112
PC112
10u/10V_8
10u/10V_8
PC118
PC118 10u/10V_8
10u/10V_8
+1.5VSUS
0.375A
+SMDDR_VREF
PC124
PC124
0.033u/50V_6
0.033u/50V_6
+5V_S5
C C
PR166
PR166 *0/short_4
*0/short_4
PR162
PR162 *0/short_4
*0/short_4
10u/10V_8
24
25
VTT
GND
1
VTTGND
2
VTTSNS
3
GND
4
MODE
5
VTTREF
6
COMP
NC7VDDQSNS8VDDQSET9S310S511NC
23
VLDOIN
22
RT8207A
RT8207A
PU9
PU9
8207A_VBST
21
VBST
PR160
PR160 *0_4
*0_4
DRVH
S3_1.8V
S5_1.8V
PR139
PR139 *0/short_6
*0/short_6
19LL20
DRVL
PGND
CS_GND
V5IN
V5FILT
PGOOD
12
+5V_S5
PC107
PC107
0.1u/50V_6
0.1u/50V_6
8207A_DH 8207A_LX 8207A_DL
18
17
16
CS
15
14
13
PR161
PR161 620K/F_4
620K/F_4 PR165
PR165 *0/short_4
*0/short_4 PR164
PR164 *0/short_4
*0/short_4
PR145
PR145 13K/F_4
13K/F_4
PR149
PR149
5.1/F_6
5.1/F_6
12
PC123
PC123 1u/6.3V_4
1u/6.3V_4
PR153
PR153 100K/F_4
100K/F_4
(For RT8207A 400KHZ) close to PC2016
VIN
SUSON (5,21,29)
MAINON (21,28,29)
+3V_S5 HWPG_1.5V (5,21)
12
+5V_S5
PC116
PC116 1u/10V_4
1u/10V_4
578
3 6
578
3 6
PQ31
PQ31 AO4468
AO4468
PL6
PR118
PR118
2.2/F_6
2.2/F_6
PC80
PC80
2.2n/50V_6
2.2n/50V_6
PL6
2.2uH
2.2uH
241
PQ32
PQ32 AO4710
AO4710
241
VIN
PC91
PC91
2200p/50V_6
2200p/50V_6
+1.5VSUS
PC100
PC100
4.7u/25V_0805
4.7u/25V_0805
+
+
PC87
PC87 330u/2.5V
330u/2.5V
PC93
PC93
4.7u/25V_0805
4.7u/25V_0805
PC85
PC85 10u/10V_8
10u/10V_8
268mil
OCP 10A
6.683A
+1.5VSUS
VIN
PR163
PR163 10K/F_4
PC130
PC130
*33p/50V_6
B B
A A
5
*33p/50V_6
10K/F_4
8207A_SET
PR159
PR159 10K/F_4
10K/F_4
Vout = (PR150/PR149) X 0.75 + 0.75
PR157 *0_4PR157 *0_4
4
S3_1.8VS5_1.8V
MAIND(25,29)
2
+1.5VSUS
3
1
3
PQ27
PQ27 AO3404
AO3404
+1.5V
1.996A
80mil
AO4710 Rdson=11.7~14.2mOhm
L(ripple current) =(19-1.5)*1.5/(2.2u*400k*9) ~1.57A
Vtrip= (10-1.57/2)*14.2mohm=0.130853V RILIM=Vtrip/10uA~13.085Kohm
S3 S5
S0
S3
S4/S5
1 1
10
0 0
2
ON ON ON
ON ON
OFF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDR 1.5V(TPS51116)
DDR 1.5V(TPS51116)
DDR 1.5V(TPS51116)
Date: Sheet of
Date: Sheet of
Date: Sheet of
VTTREF+1.5VSUS
OFF
OFFOFF
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
ZGB
ZGB
PROJECT :
PROJECT :
PROJECT :
ZGB
27 34Friday, April 08, 2011
27 34Friday, April 08, 2011
27 34Friday, April 08, 2011
1
2A
2A
2A
Page 28
5
4
3
2
1
[PWM]
+5V_S5
D D
PR134
PR134 10_6
10_6
PR123
PR123
2.2/F_6
BOOT UGATE PHASE
OC
VDDP
LGATE
PGND
TPAD
1.05V_FB
2.2/F_6
13 12 11 10 9 8 7 17
PR133
PR133 1M/F_4
1M/F_4
PU6
PU6 G5602
PR131
PR131 *0/short_4
MAINON(21,27,29)
PR61
PR61 10K/F_4
10K/F_4
C C
HWPG_1.05V(21,29)
B B
+3V
*0/short_4
PC92
PC92
*0.1u/50V_6
*0.1u/50V_6
PC97
PC97 1u/16V_6
1u/16V_6 PC77
PC95
PC95
*1000p/50V_6
*1000p/50V_6
15 16
1 2 3 4 6 5
14
G5602
EN/DEM TON VOUT VDD FB PGOOD GND NC NC
PR122
PR122 0_6
0_6
PD8
PD8 RB500V-40
RB500V-40
PC86
PC86
0.1u/50V_6
0.1u/50V_6
PC89
PC89 1u/16V_6
1u/16V_6
R1
12
UGATE-1.05V PHASE-1.05V
PR46
PR46
4.87K/F_4
4.87K/F_4
LGATE-1.05V
PR135
PR135
4.02K/F_4
4.02K/F_4
PC90
PC90
4.7u/10V_6
4.7u/10V_6
LGATE-1.05V
PC30
PC30 *33p/50V_6
*33p/50V_6
AO4932
AO4932
G1
D1
D1
1
D1 S1/D2
D1 S1/D2
2
G2
G2
3
S2
S2
4
PQ30
PQ30
G1
VOUT=(1+R1/R2)*0.75
2.2n/50V_4
2.2n/50V_4
UGATE-1.05V
8 7 6 5
PC82
PC82
PL5
PL5
2.2uH_7X7X3
2.2uH_7X7X3
PR117
PR117 3G@2.2/F_6
3G@2.2/F_6
PC79
PC79 3G@2.2n/50V_6
3G@2.2n/50V_6
4.7u/25V_0805
4.7u/25V_0805
PC78
PC78
330u/2.5V
330u/2.5V
+
+
PC84
PC84
+1.05V
PC77 *10u/10V_8
*10u/10V_8
PC76
PC76
0.1u/50V_6
0.1u/50V_6
OCP: 5A
140mil
3.5A
+1.05V
VIN
PR136
PR136 10K/F_4
10K/F_4
R2
TON=3.85p*RTON*Vout/(Vin-0.5)
Frequency=Vout/(Vin*TON)
A A
TON=3.85p*1M*1/(Vin-0.5)
AO4932 Rdson=15.8~19.6mOhm
L(ripple current) =(19-1.05)*1.05/(2.2u*272k*19) ~1.658A
Rth=19.6m*(5-0.829)/20uA
Frequency=1/(0.0036767)=272K
5
RILIM=4.087Kohm
4
3
PR171
PR171 *0/short_4
*0/short_4
PR130
PR130 *0/short_4
*0/short_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
ZGB
ZGB
1
ZGB
2A
2A
2A
28 34Friday, April 08, 2011
28 34Friday, April 08, 2011
28 34Friday, April 08, 2011
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
+1.05V(UP6111AQDD)
+1.05V(UP6111AQDD)
+1.05V(UP6111AQDD)
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT :
Page 29
5
VIN_SRC
PR20
PR20 1M_4
1M_4
PR24
PR24
PQ9
PQ9
PC24
PC24
80mil
0.89V
1.98A
VCCGFX
2
2
+
+
10U/10V_8
10U/10V_8
PC23
PC23
SUSON(5,21,27)
D D
MAINON(21,27,28)
C C
330u/2V_7343
330u/2V_7343
DTC144EU
DTC144EU
1 3
PQ5
PQ5 DTC144EU
DTC144EU
1 3
VIN_SRC
1M_4
1M_4
PR19
PR19 1M_4
1M_4
PR23
PR23 1M_4
1M_4
PR128
PR128 102/F_4
102/F_4
PR129
PR129 127/F_4
127/F_4
2
Rg
Rh
3
1
1
PR8
PR8 22_8
22_8
PQ7
PQ7 DMN601K-7
DMN601K-7
AO3402
AO3402
2
2
2
PQ29
PQ29
PR125
PR125 47/F_4
47/F_4
PC88
PC88 33N/25V_4
33N/25V_4
+1.5VSUS
3
1
3
1
3
PR11
PR11 *22_8
*22_8
PQ12
PQ12 *DMN601K-7
*DMN601K-7
2011/02/18 remove PQ13 dischard circuit
PR9
PR9 22_8
22_8
2
PQ8
PQ8 DMN601K-7
DMN601K-7
+1.05V
PC81
PC81
10U/10V_8
10U/10V_8
PU7
PU7 G9334 ADJ
G9334 ADJ
5
DRV
3
FB
2
3
1
PGD
EN
VCC
GND
PR7
PR7 *22_8
*22_8
PQ6
PQ6 *DMN601K-7
*DMN601K-7
PC83
PC83
0.1U/25V_4
0.1U/25V_4
4
1
6
4
+15V
PR14
PR14 1M_4
1M_4
SUSDSUS_ON_G
3
2
PQ11
PQ11 DMN601K-7
DMN601K-7
1
+1.5V
PR3
PR3 22_8
22_8
3
2
PQ4
PQ4
DMN601K-7
DMN601K-7
1
+3V
PR124
PR124 100K_4
100K_4
HWPG_VCCGFX (21)
PR132
PR132
10K/F_4
PC99
PC99
0.1U/25V_4
0.1U/25V_4
PC94
PC94
0.1U/25V_4
0.1U/25V_4
10K/F_4
+5V
PC9
PC9 *2200p/50V_4
*2200p/50V_4
+2.5V
3
2
1
SUSD
PR4
PR4 *22_8
*22_8
PQ10
PQ10
*DMN601K-7
*DMN601K-7
MAINON(21,27,28)
24mil
0.58A
+1.8V
PC104
PC104
10u/10V_8
10u/10V_8
HWPG_1.05V (21,28)
+3V_S5
+15V+5V+3V +1.05V
3
2
1
PC110
PC110
10u/10V_8
10u/10V_8
Vout1 = (1+Rg/Rh)*0.5
PR6
PR6 1M_4
1M_4
MAINDMAINON_ON_G
PQ3
PQ3 DMN601K-7
DMN601K-7
PR31
PR31 *0/short_4
*0/short_4
PC19
PC19
*10u/10V_8
*10u/10V_8
PR141
PR141 261/F_4
261/F_4
PR137
PR137 100/F_4
100/F_4
3
PC22
PC22
*1u/16V_6
*1u/16V_6
12
PC18
PC18
*0.1u/50V_6
*0.1u/50V_6
Vout =0.8(1+R1/R2) =2.5V
MAIND (25,27)
PC3
PC3 *2200p/50V_4
*2200p/50V_4
PQ36
PQ36 AO4468
AO4468
1 2 3 6
Rg
Rh
+5V_S5
PC16
PC16 *0.1u/50V_6
*0.1u/50V_6
4
PR142
PR142 47/F_4
47/F_4
PC103
PC103 33N/25V_4
33N/25V_4
4 2 3
8 9
8 7
5
PU2
PU2 *RT9025-25PSP
*RT9025-25PSP
PGOOD
VPP VEN VIN
GND GND
7
+3V_S5
10u/25V_1206
10u/25V_1206
PU8
PU8 G9334 ADJ
G9334 ADJ
5
DRV
3
FB
2
PR32
PR32 *100K_4
*100K_4
+3V
1 6
VO
5
NC
ADJ
0.8V
PC125
PC125
PGD
EN
VCC
GND
2
1 2
4
1
6
R1
R2
PC128
PC128
0.1u/25V_6
0.1u/25V_6
+5V
1 2
+3V
PC113
PC113
0.1u/25V_6
0.1u/25V_6
PR37
PR37 *73.2K/F_6
*73.2K/F_6
PR36
PR36 *34K/F_6
*34K/F_6
PR146
PR146 100K_4
100K_4
HWPG_2.5V (21)
+2.5V
0.012A
10mil
PC21
PC21
*10u/10V_8
*10u/10V_8
HWPG_1.8V (21)
HWPG_1.05V (21,28)
1
5
Vout1 = (1+Rg/Rh)*0.5
HWPG_1.05V(21,28)
VIN_SRC VCCGFX +1.8V
PR10
PR119
PR119 *1M_4
*1M_4
PR126
PR126
PQ39
PQ39
2
*DTC144EU
*DTC144EU
1 3
*1M_4
*1M_4
PR144
PR144 *22_8
*22_8
3
2
PQ41
PQ41 *DMN601K-7
*DMN601K-7
1
4
PR10 *22_8
*22_8
3
2
PQ40
PQ40 *DMN601K-7
*DMN601K-7
1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Discharge/1.8V)
Discharge/1.8V)
Discharge/1.8V)
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
PROJECT :
ZGB
ZGB
ZGB
29 34Friday, April 08, 2011
29 34Friday, April 08, 2011
1
29 34Friday, April 08, 2011
B B
A A
Page 30
5
4
3
2
1
30
DDR3 SO-DIMM
D D
Page 03
CLOCK GEN CK505 (SLG8SP513VTR ,ICS9LPRS365BKLFT)
DMI (100MHz)
SATA (100MHz)
LVDS CLK (Max. 200MHz)
11.6" LED Panel
Page 14
Tigerpoint
MEM (333MHz)
Intel@Pineview-M
CPU FSB (166MHz)
MCH FSB (166MHz)
PCI (33MHz)
REF (14.31818MHz)
USB (48MHz)
BIT CLK (24MHz)
SUSCLK (32KHz)
Audio ALC272
Page 16
Page 9~13
MCH DMI (100MHz)
C C
Page 4~7
LCD CLK (100MHz)
DOT 96 (96MHz)
Page 2
PCIE (100MHz)
PCIE (100MHz)
Y2(32.768K KHz)
Video Decoder
Page 23
WLAN(Mini Card 1)
Page 19
PCIE (100MHz)
B B
PCI CLK (33MHz)
WLAN(Mini Card 2)
Page 19
EC (WPCE781L/FLASH)
Y4(32.768 KHz)
Page 21
PCI CLK (33MHz)
Debug Card
Page 19
48MHz
Card Reader RTS5138
Y5(12 MHz)
Page 22
A A
Quanta Computer Inc.
Quanta Computer Inc.
Y1(14.318 MHz)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Clock Distribution Diagram
Clock Distribution Diagram
Clock Distribution Diagram
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZGB
ZGB
ZGB
30 34Friday, April 08, 2011
30 34Friday, April 08, 2011
30 34Friday, April 08, 2011
1
2A
2A
2A
Page 31
5
4
3
2
1
31
D D
ISL6261A
PU3
VCC_CORE
<VRON>
+5VPCU
<AC/DC Insert>
AO3404
PQ0009
+5V_S5
<S5D>
+5VPCU+3VPCU
+1.5VSUS
AO3404
PQ0010
+3VPCU
<AC/DC Insert>
AO3404
PQ0008
AO3404
PQ0005
RT9025-25PSP
PU1
+1.5VSUS
<SUSON>
AO3404
PQ2002
VINVIN
SYSTEM 5V/3V
C C
ADAPTER
CHARGER
(ISL88731)
VIN
(RT8206BGQW)
PU0001
BATTERY PU2
B B
RT8207A
PU2000
+5V
<MAIND>
+3V_S5
<S5D>
+3V
<MAIND>
+2.5V
<MAINON>
+1.5V
<MAINON>
POWER Distribution
VIN
VCC_CORE
+5VPCU
LCD Backlight CPU USB Connecter
+5V_S5 RTC, TPT
+5V
+3VPCU
+3V_S5
+3V
+1.5VSUS
+1.8V +1.5V
+0.75V_DDR_VTT
+SMDDR_VREF
TPT , CRT , TouchPad , Codec , SATA , FAN , HDMI RTC, Hall Sensor, Light Sensor, EC, BIOS
TPT , LAN , LAN EEPROM , RJ45 LED
CLK_GEN, CPU, TPT , LCD , CCD, DMIC, BT, Codec, WLAN/Wimax, Card reader, EC, DDR, HDMI
DDR
CPU, HDMI
CPU, TPT
DDR
CPU, DDR
,3G
+1.05V CLK_GEN , CPU, TPT
+0.75V_DDR_VTT
<MAINON>
+SMDDR_VREF
<SUSON>
VCCGFX
+2.5V HDMI
CPU
G9334ADJ
UP6111AQDD
A A
5
+1.05V
+1.05V
<MAINON + (RC)>
G9334ADJ
PU9004
G9334ADJ
PU9003
4
VCCGFX
<HWPG_1.05V>
+1.8V
<HWPG_1.05V>
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
ZGB
PROJECT :
ZGB
PROJECT :
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Power Tree
Power Tree
Power Tree
Date: She et o f
Date: She et o f
3
2
Date: She et o f
1
ZGB
31 34Friday, April 0 8, 2011
31 34Friday, April 0 8, 2011
31 34Friday, April 0 8, 2011
2A
2A
2A
Page 32
5
ZGA Power On Sequence
4
3
2
1
32
From AC,BATT
D D
From PWM to EC
From Button to EC
From EC to PWM
From EC to SB From EC to SB
From SB to EC
From EC to PWM
VIN +5VPCU +3VPCU VCCRTC
HWPG_SYS(PCU)
RTCRST# NBSWON#
S5_ON
+5V_S5 +3V_S5
EC_RSMRST# DNBSWON#
SUSB#,SUSC#
SUSON
(VCCRTC to RTCRST#)(t200)
>=18ms
(VCCRTC to S5 well)(t203)
>=0ms
+5V_S5 power up before +3V_S5, or after +3V_S5 within 0.7V (t201)
>=5ms
(S5 well to EC_RSMRST#)(t205)
(EC define)
100ms
1~2 RTCCLK (SUSC# to SUSB#)(t234)
+3V_S5 power down before +5V_S5, or after +5V_S5 within 0.7V
+3VSUS +1.5VSUS +SMDDR_VREF
From PWM to EC
C C
From EC to PWM
From PWM to EC,PWM
From PWM to EC
HWPG_1.5V (SUS)
MAINON
+5V +3V +1.5V +0.75V_DDR_VTT
MAINON + (RC)From PWM to EC,PWM
+1.05V
HWPG_1.05V
+1.8V VCCGFX
HWPG_VCCGFX
+5V power up before +3V, or after +3V within 0.7V (t209)
+1.5V power up before +1.05V, or after +1.05V within 0.7V (t211)
>=0ms (+3.3V to +1.05V)(T1)
>=0ms (+1.05V to +1.8V)(T2)
+3V power down before +5V, or after +5V within 0.7V
+1.05V power down before +1.5V, or after +1.5V within 0.7V
>=0ms (+1.8V to +1.05V)(T3)
HWPGFrom PWM to EC
From EC to PWM
B B
From CLK Gen
VRON
VCC_CORE
VR_PWRGD_CK410#From PWM to CLK,SB
BCLK
10~100us (VCC_CORE=1.2V)(Tc)
0~0.6ms (VCC_CORE@VID value)(Td)
From PWM to EC,CPU IMVP_PWRGD
To SB
From SB to CPU
From SB
TPT_PWROK
H_PWRGD PLTRST#
99ms
(S0 well of TPT to TPT_PWROK)(t214)
0.05~200ms;Typ=20ms
>=10BLK=60ns
1~10ms
(H_PWRGD to PLTRST#)(Th)
(VCC_CORE to H_PWRGD)(Te)
(BCLK stable to H_PWRGD)(Tf)
*Note: EC will sampling SUSB# & SUSC# every 5ms.
ICH SMBUS Table
A A
(SMB_DATA)/(SMB_CLK) (+3V_S5)
Power Plane
MOS CKT (Level shift)
CLK GEN RAM Mini Card (WLAN)
V
+3V +3V
Stuff Stuff
VV
+3V
*Reserve
*Reserve: There is not SMBUS function in AVL
5
4
Mini Card (3G)
V
+3V_SUS
Stuff
EC781 SDA1 / SCL1 (+3VPCU) EC781 SDA2 / SCL2 (+3V) EC781 SDA3 / SCL3 (+3VPCU)
Power Plane +3VPCU MOS CKT (Level shift)
3
EC SMBUS Table
V
X
Light SensorCPU thermal SensorBattery
V
V
+3V
X
2
+3VPCU
X
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
SYSTEM INFORMATION
SYSTEM INFORMATION
SYSTEM INFORMATION
1
ZGB
ZGB
ZGB
32 34Friday, April 08, 2011
32 34Friday, April 08, 2011
32 34Friday, April 08, 2011
2A
2A
2A
Page 33
5
SLP_S3#(SUSB#): Control non-critical power plane when system into S3(Suspend to RAM)/S4(Suspend to Disk)/S5(Soft off).
SLP_S4#(SUSC#): Control non-critical power plane when system into S4(Suspend to Disk)/S5(Soft off).Used to control DRAM power
AC Adapter
D D
BATT Charger
PU9001
Battery
9
12
MAINON
1
VIN
4
Always System power
Regulator
PQ9007
2
1b
+3VPCU
+5VPCU
NBSWON#
3
3
4
S5_ON
6
EC_RSMRST#
7
DNBSWON#
2
+3VPCU/+5VPCU
MOS
PQ0008/PQ0009
5
+5V_S5 power up before +3V_S5
+5V_S5
+3V_S5
RSMRST#
PWRBTN#
1
33
8
SUSC#SUSON
SUSB#
EC
SLP_S4#
SLP_S3#
TigerPoint
ECPWROK
19
VRON
C C
VIN
Regulator
PU3
20
VCC_CORE
IMVP_PWRGD
22
U23
TPT_PWROK
PWROK
23
U8003
CPUPWRGD
PLTRST#
VRMPWRGD
24
H_PWRGD
25
PLTRST#
Pineview
U8002
CPUPWRGOOD
RSTIN# PWROK
VR_PWRGD_CK410#
+1.8VSUS
MOS
PQ9021
+1.05V
LDO
PU9004
B B
MAINON +(RC)
VIN
Regulator
PU6000
+3VPCU
LDO
PU1
+1.5VSUS
LDO
PQ2002
+3VPCU/+5VPCU
MOS
PQ0005/PQ0010
16
+1.8V
1.05V power up before 1.8V
16
VCCGFX(0.89V)
14
+1.05V
+2.5V
+1.5V
+5V
+5V power up before +3V
+3V
17
15
1.5V power up before 1.05V
13
SYS_HWPG
HWPG_1.8V
HWPG_VCCGFX
HWPG_1.05V
HWPG_2.5V
HWPG_1.5V
18
HWPG
21
VR_PWRGD_CK410
CKPWRGD
CK505
U9
11
A A
VIN
Regulator
PU2000
5
+0.75V_DDR_VTT
+1.5VSUS +SMDDR_VREF
13
10
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
ZGB
PROJECT :
ZGB
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
power sequence block diagram
power sequence block diagram
power sequence block diagram
Date: Sheet of
Date: Sheet of
4
3
2
Date: Sheet of
1
ZGB
2A
2A
2A
33
33
33
34Friday, April 08, 20 11
34Friday, April 08, 20 11
34Friday, April 08, 20 11
Page 34
5
Model
ZGB MB
D D
C C
B B
A A
REV
page 29 :Change PQ33 to PQ43,PQ44 for CPU change to dual core. page 29 : change PC75 from 220uf to 330uf. becasue dual core CPU need adjustment. page 29 : change PC111 from 330uf to 220uf becasue dual core CPU need adjustment. page 29 : change PR151 from 1.8K to 10K becasue dual core CPU need adjustment. page 29 : change PR156 from 1.6K to 1.8K becasue dual core CPU need adjustment. page 29 : change PR154 from 1.1K to 2.7K becasue dual core CPU need adjustment. page 29 : change PC47 from 0.1uf to 0.22uf becasue dual core CPU need adjustment.
A1
page 29 : change PR82 from 1.2k to 4.02k becasue dual core CPU need adjustment.
(V1.0)
page 29 : change PR88 from 15k to 13k becasue dual core CPU need adjustment. page 29 : change PR76 from 18k to 12.7k becasue dual core CPU need adjustment. page 29 : change PR57 from 53.6k to 60.4k becasue dual core CPU need adjustment. page 2: change CLK GEN from SLG8SP513VTR to SLG8LV631VTR for power saving. page 11: change RTC from connector to socket for SMT request. page 23: TPM change to Infineon replacement R428,R38,R433,C77,R83,R82,R96,R431,C756,C765,Y7,R432 page 29 : change net name VCC_CORE to VCC_CORE_1 for net name adjustment. page 17 : Add debug port 40pin for customer reqeust.(2011/02/27) page 09 : Delete 10pin debug port and add test point on PCH debug pin.(2011/01/31) page 15: Base on customer request Reserve BT circuit.(2011/02/01) page 17: CN23 add test point Pin7,8,11,12,13,21,27,28,29,35,36,37,38,39 for NC pin.(2011/02/01)
A1
page 21: Add 0ohm on SMB clk and SMB Data for test use.(2011/02/01)
(V1.1)
page 15: Add PCH SMB CLK and data to TP SMB clk and data and additional MOS to prevent electric leakage for reserve test use.(2011/02/01) page 14: Add +5V CCD power for OV9726 CCD and reserve +3V CCD power.(2011/02/01) page 14: Change to +3V CCD power and reserve +5V CCD power.(2011/02/01) page 23: 1.remove break net U8.10 to U8.24. 2.R96->NI, change R92 to pull to +3V_S5 (leave NI)3.populate Y7/C756/C765/R605. R605->1M,
A1
C756/C765->12pF4.populate R428, populate R431. Change R431 pull to +3V_S5.5.add populated 0R jumper U8.28 to U20.G22,
(V1.2)
change R108 pullup to +3V_S5 page 17: R359-361, R363, R366 are not required remove CN23 Pin7,8,11,12,13 conector to KBC EC ROM. CN23 Pin22 connector to SYS_SHDN#(2011/02/10) page 14: add resistor between Rom and Tigerpoint of U20 pin M8(2011/02/10) page 21: add resistor between SPI Rom and KBC of U7pin 90,Remove 0ohm on U7 pin71,72. because separate I2C circuit.2011/02/10) page 15: Add a connector and circuit for TPD I2C circuit, but SPEC acer not yet confirm.(2011/02/10) page 15: Follow up synatic pin define modify TPD I2C circuit.(2011/02/11) Pin 6 => CLK/Pin 5 => GND/Pin 4 => DAT/Pin 3 => VDD/Pin 2 => NC/Pin 1 => INT(interrupt)
A1
page 17: Change CN23 Pin15 PCH_GPIO24_D net name to PCH_GPIO24(2011/02/11).
(V1.3)
page 23: Add one 0R ahead U1 pin1,R76 and R22 change from 0402 to 0603,for power consumption measure.(2011/02/11). page 23: LPCPD R108 change +3V_S5 to +3V well.Add diode between U20.G22 and U8.28 to ensure well isolation.(2011/02/14).
A1
page 15: 1.Remove R439,L37 becasue not use +5VSUS option.2.Change CN3 from 4pin to 6pin 3.Add CN8 for PS2 TPD option.(2011/02/15)
(V1.4)
page 02: C768, C774 and C772 change from 10U/10V_8 to 10U/6.3V_6. .(2011/02/15) page 17: C268, C266 and C297 change from 100u/6.3V_3528 to 100u/6.3V_3216 .(2011/02/15) page 11: D34 change to 30V 1A diode .(2011/02/15) page 17: D35 change to 30V 1A diode and Delet D36 only use one diode.D4/6/10 remove NI.(2011/02/15) . page 15: Follow up pin define modify TPD I2C circuit.(2011/02/15) Pin 6 => VDD/Pin 5 => SCL/Pin 4 => SDA/Pin 3 => HINT/Pin 2 => SINT/Pin 1 => GND page 25: Remove PQ42 becasue not +5VSUS supply(2011/02/16) page 12: change R209 and R194 from 0603 to 0805 for current limitation .(2011/02/16) page 11: Change U20 A24 net name from MBID2 to SNIT_TP U20 D19 net name change PCH_GPI026 to HINT_TP, for TP I2C interrup,
A1
CN3 pin3 change net to HINT_TP and pull up +3V_S5,PCH_GPI039 leave test point.
(V1.5)
page 08: R294 and R285 to remove NI for PCH control. page 21: R112 leave NI,R97 pull up change to +A3PCU power wall,remove U7 pin96 net name because dulipcate, add NI 0 ohm on U7 PIN34/33 for EC option. page 11: R277,R276 from 8.2k change to 10k ,R195/R188 10k to 8.2k pull up following intel spec.
A1
page 17: Update CN23 P/N and footprint for pitch0.5.
(V1.6)
page 21: R102/R101/R69/R65/R36/R35/R99/R100 change to 4.7k 0402 for supplier NVO suggestion. page 23: D17 change diode to 30V 1A. page 15: Swap CN3 pin define Pin 1 => VDD/Pin 2 => SCL/Pin 3 => SDA/Pin 4 => HINT/Pin 5 => SINT/Pin 6 => GND page 23: U8. PP pull down to GND.{2011/02/18) page 11: Change TPD power well to +3V_S5.{2011/02/18)
A1
page 25: Remove PQ22 +3VSUS power well.{2011/02/18)
(V1.7)
page 29: Remove PQ13 and PR12 discharge circuit.{2011/02/18) page 21: R102/R101/R69/R65/R36/R35/R99/R100 change to 10k 0402 for supplier NVO suggestion. Change All +3VSU to +3V_S5 power plant. page 22: Remove LVDS bypass resistor.(cancel LVDS stub trace) page 16: Change C163 from 10u to 2.2uf.(follow Codec FAE suggestion.) page 03: Add EMI CAP C258,C261,C260,C259 100pf.(EMI request.)
B1
page 11/15: Remove I2C cricirt SNIT/HNIT and Change RTC charge limitation resistor to prevent charge current to large,R415 and R422.
(V2.0)
unstaff U14 and add R207 0ohm.(Follow Google commend to use 6pin P/S2 touch pad.) page 15: Remove CN8 TP 4pin.(Following Google suggestion use 6pin connector.) CN6 from DFHD05MRD98 to DFWF05MR042 and BT power plant from +3VPUC to +3V_S5.(Follow acer AVAP to use new BT , so we have to use new connector, Correct wrong BT power supply.) page 16: R16/R17 add 0ohm for EMI.(EMI request) page 26: Remove vcore jump.(throse R for power consumption measurement, we won't use they after A stage.) R615,R176,R148,R351,R280,R279,R281,R298,R207,R202,L30,R194,R329,R141,R256,R46,R56,R44,R254,R255, R125,R124,R131,R17,R16,R258,R324,,R98,R256,R210,R337,R287,R196,R292,R293,R198,R199,R217,R216,r26 4,R382,R73,R443,R444,R74,R78,R400,R433,R83,R370,R376, (Change 0ohm to short pad.(throse R for power )consumption measurement, we won't use they after A stage.) page 15: add R261 and C410 for BT soft star.
B1
page 11: change R152/210 power plant from +3V to +3V_deg.(for google suggestion.)
(V2.1)
page 21: Add RP6 PU 10K .(for keyboard lose key issue.) page 21: R136 change power plant from +3VPCU to +3V_deg_SPI.(for google suggestion.) page 22: Add C271/272/273/262/270 0.1uf(for EMI suggestion) page 22: Remove RN2/3/4/5 and L3/4/5/6.(avoide HDMI stub trace.) page 23: R605 un-staff.(for supplier suggestion becasue internal Rd 1Mohm.) page 08: PE2RX+/- and PE2TX+/- swap to PE1RX+/- and PE1TX+/-.(WLAN change from PCIE2 to PCIE1. So BIOS can turn off PCIE2 alone and save power consumption)
B1
page 19: PE2CLK+/- net name change to PE1CLK+/-.(PE2 already swap to PE1 so change net name.)
(V2.2)
page 11: C96 change power plant to +3V_deg.(for google suggestion.) page 11: Change R283 from short-pad to 0ohm and unstuff.Stuff U19 (AND gate) to increase fan-out (There are many devices use PLTRST#. TPT may not drive them so use AND gate to fan out) page 21: Add R89 0ohm on SW2.2.(for google suggestion,reserve 0ohm.) page 8: Change USBOC#R1 from OC6# to OC#0 base on usb port.(Wrong assign for USB OC change to correct)
B1
page 11: Change U19 Pin1 to Deg_RST# pull 4.7K to +3V.(for google suggestion control PLTRST#)
(V2.3)
page 17: Change CN23 Pin19 net name from PLTRST# to DEG_RST#.
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APPROVED BY:PROJECT MODEL : 11.6
PART NUMBER: DRAWING BY: REVISON:
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Change list
Change list
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Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
ZGB
PROJECT :
ZGB
PROJECT :
ZGB
34 3 4Friday, April 08, 20 11
34 3 4Friday, April 08, 20 11
34 3 4Friday, April 08, 20 11
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