Quanta ZE6, Aspire One AOD257 Schematic

1

2

3

4

5

6

7

8

01

ZE6 Block Diagram

A A

CK505

Graphics Interfaces

PCI-E

INT_LVDS

CRT

PCI-Express(Port1~4)

Pineview

DDRIII-SODIMM

B B

SATA - HDD

667 MT/s

P3

N570 1.66G: AJSLBXEVT05 N475 1.83G: AJSLBX5UT08 N455 1.66G: AJSLBX9VT05

SATA 0

P19

SATA

CPU

P4,5,6,7

DDR SYSTEM MEMORY

DMI

DMI(x2)

DMI

Tigerpoint

USB port*3

CCD

C C

Bluetooth module

3G

WLAN

USB-0,1,3

P17

USB-2

P14

USB-6

P15

USB-5

P20

USB-7

P20

USB 2.0 (Port0~7)

BATTERY

P11

Intel High Definition Audio

USB

RTC

IHDA

SB

P8,9,10,11,12,13

PN : AJSLGXX0T14

LPC

10.1 "Panel

Up to 1280*800 or 1366*768

CRT

PCIE-4

USB-5

PCIE-2

USB-7

PCIE-1

PCIE-3

P14

3G/WiMAX

WLAN/WiMAX

LAN

RTL8105TA

Card Reader RTS5209-GR

Charger

+3VPCU +5VPCU

SIM Card

P20

USB-4

P20

P18

P20

+3V_S5 +5V_S5 +3VSUS +3V +5V

VCC_CORE

+1.5VSUS +SMDDR_VREF +0.75V_DDR_VTT +1.5V

+1.05V

P21

+1.5V Discharge VCCGFX

P2

P27

P28

P29

P30

P31

P32

LPC

K/B Con.

EC

Touch Pad /B Con.

4

NPCE791L

SPI Flash

P22P15 P15

5

Charger

P22

P24

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

6

Date: Sheet of

7

PROJECT :

Block Diagram

ZE6

1B

1 35Friday, March 11, 2011

8

Audio Codec

D D

Int. SPK CONN

1

Realtek ALC271X

Int. AMIC CONN

2

MIC Jack

Combo Jack

P16

3

CLK GEN (CLK)

5

L21

1 = Pin 43/44 as CPU_ITP

0 = Pin 43/44 as SRC_1

1 = Pin 11 as 33MHz

0= Pin 11 as 25MHz

5

L20

C178

4.7U/10V/8

VDD_CLK_3.3V

C185

4.7U/10V/8

CLKUSB_48[8]

14M_ICH[11]

PCLK_ICH[10 ]

LCLK_EC[22]

PCLK_DEBUG[20 ]

C157

C188

.1U/10V_4

0.1uF near every power pin

VDD_CLKIO_1.05 V

C162

C145

.1U/10V_4

0.1uF near every power pin

SMBDT1[3,20] SMBCK1[3,20]

CLK_BSEL1_F SB FSB

R217 1K_4R217 1K_4 R218 33/J_4R218 33/J_4 R191 33/J_4R191 33/J_4

CLK_BSEL2_F SC

R190 10K_4R190 10K_4 R205 22/J_4R205 22/J_4

R204 22/J_4R204 22/J_4 R219 33/J_4R219 33/J_4

FSC FSB Frequency 0 0 133MHz 0 1 166MHz 1 1 200MHz 1 0 100MHz

C163

C163 .1U/10V_4

.1U/10V_4

C171

C171 .1U/10V_4

.1U/10V_4

+3V

PBY160808T-3 01Y-N/2A/300ohm_6

VDD_IO can be ranging from 1.05V to 3.3V.

+1.05V

R209 0_6R209 0_6

Place close to L18

CL=20p

PBY160808T-3 01Y-N/2A/300ohm_6

C154

CG_XIN

33P/50V_4

21

Y2

14.318MHZY214.318MHZ

C152

CG_XOUT

33P/50V_4

Place close to L8

D D

C C

<Layout note> Crystal place within 500mil o f CK505

Follow Silegro schematic

B B

R206 *10K/J_4R206 *10K/J_ 4

+3V

R207 10K/J_4R207 10K/J_4

A A

0221 : follow vendor's suggestion, change from 10K to 4.7K

R208 4.7K/J_4R20 8 4.7K/J_4

+3V

R197 *10K/J_4R197 *10K/J_ 4

ITP_EN

pin 10 has internal pull down resistor.

33M_SEL

4

U9

5

VDD_REF_3.3

9

VDD_PCI_3.3

14

VDD_48M_3.3

30

VDD_SRC_IO_1.05

35

VDD_SRC_IO_1.05

48

VDD_CPU_IO_1.05

1

NC

2

NC

13

NC

54

NC

CG_XOUT

3

XTAL_OUT

CG_XIN

4

XTAL_IN

SMBDT1

7

SDA

SMBCK1

8

SCL

15

USB48_1/FSB

USB_48M

17

USB48_2

FSC

6

REF/FSC

ITP_EN

10

PCIF/ITP_EN

33M_SEL

11

25MHz/PCI_2/SEL_33MHz

12

VSS_PCI

16

VSS_48M

22

VSS_LCD

24

VSS_SATA

39

VSS_SRC

51

VSS_CPU

56

VSS_REF

57

Thermal Pad

SLG8LV631V

no connect FSA to CPU, due to there is no FSA PIN for CPU. need to check check how to handle it in CPU CLK_BESEL0

CPU_BSEL1[4]

CPU_BSEL2[4]

+1.05V

R215 *1K_4R215 *1K_4

CLK_BSEL1_F SB

R214 0_4R214 0_4 R216 *0_4R216 *0_4

R188 *1K_4R188 *1K_4

CLK_BSEL2_F SC

R187 0_4R187 0_4 R189 *0_4R189 *0_4

4

VDD_CORE_1.5 VDD_CORE_1.5

PCI_STOP#

CPU_STOP#

CPU_0

CPU_0#

CPU_1

CPU_1#

SRC_1/CPU_ITP

SRC_1/CPU_ITP#

SRC_2

SRC_2#

SRC_3

SRC_3#

SRC_4

SRC_4#

SRC_5

SRC_5#

SRC_6

SRC_6#

DOT96/SRC7

DOT96#/SRC7#

LCD_CLK

LCD_CLK#

SATA#

CLKREQ_A# CLKREQ_B# CLKREQ_C#

CKPWRGD/PD#

3

2

1

02

VDD_CLK_1.5V

C191

C146

.1U/10V_4

0.1uF near every power pin

23 45

PM_STPPCI#_R PM_STPCPU#_R

DREFCLK DREFCLK#

CLKREQ_LAN#_R CLKREQ_MPC#_R CLKREQ_MNC#_R

R164 *0/J_4R164 *0/J_4 R157 *0/short_J_4R157 *0/short_J_4

R141 475/F_4R141 475/F_4 R142 475/F_4R142 475/F_4 R201 475/F_4R201 475/F_4

36 42

53 52

50 49

44 43

41 40

38 37

34 33

32 31

28 27

18 19

20 21

26

SATA

25

47 46 29

55

R212 2.2/J_6R212 2.2/J_6

1 2

C195

<20100819_FAE Poyueh> Add 2.2ohm resistor for noise suppress

4.7U/10V/8

Place close to L13

1/19 : 439549_439549_CorbettPark_Schm_Rev0.5: If this pin is used as PCI_STOP#, it is required to provide a 10-k pull-up to Vcc3_3. It is not recommended to connect this signal to the Tiger Point(NM10) as it may cause unexpected system behavior.

PM_STPPCI# [11] PM_STPCPU# [11]

CLK_CPU_BCLK [4] CLK_CPU_BCLK# [4]

CLK_MCH_BCLK [4 ] CLK_MCH_BCLK# [4]

CLK_PCIE_LANP [18] CLK_PCIE_LANN [18]

PE4CLK+ [20] PE4CLK- [20]

PE2CLK+ [20] PE2CLK- [20]

CLK_PCIE_DMIP [4] CLK_PCIE_DMIN [4]

CLK_CARDREADER [21] CLK_CARDREADER# [21]

CLK_PCIE_ICH [8] CLK_PCIE_ICH# [8]

DREFCLK [4] DREFCLK# [4]

DREFSSCLK [4 ] DREFSSCLK# [ 4]

CLK_PCIE_SATA [9] CLK_PCIE_SATA# [9 ]

CLKREQ_LAN# [1 8] CLKREQ_WLAN# [20] CLKREQ_CARD# [21]

VR_PWRGD_CK41 0 [11]

To CPU (Core C LK)

To CPU (Host C LK)

To Mini Card 2 (3G/Wimax)

<20100819> Add 475 ohm for current leakage

VR PWRGD

VR_PWRGD_CK41 0#[23,26]

1

<20090721(B2A)> Change Q3,Q5,Q6 from BAM700200F6 to BAM70020002 (with ESD protection function)

3

2

2N7002KQ92N7002K

Q9

R146 *10K_4R146 *10K_4

R147 10K_4R147 10K_4

3

VR_PWRGD_CK41 0

C182

C182 .1U/10V_4

.1U/10V_4

+1.5V

L22

PBY160808T-3 01Y-N/2A/300ohm_6

To SB

166 MHz

To LAN (LAN)

100 MHz

100 MHzTo Mini Card 1 (WLAN)

To CPU (DMI CL K) 100 MHz

To Card Reader

100 MHz

To SB (DMI CLK ) 100 MHz

96 MHzTo CPU (PLL CL K)

To CPU (DPLSS CLK) 100 MHz

Control SRC_1 Control SRC_3 Control SRC_5

+3V

VR_PWRGD_CK41 0 [11]

100 MHzTo SB (SATA CL K)

Register B5b6 for CLKREQ_A# 0 = SRC1, 1=SRC2 Register B5b4 for CLKREQ_B# 0 = SRC3, 1=SRC4 Register B5b3 for CLKREQ_C# 0 = SRC5, 1=SRC6

2

PM_STPPCI#_R

R163 10 K/J_4R163 10 K/J_4

PM_STPCPU#

R153 10 K/J_4R153 10 K/J_4

CLKREQ_MPC#_R

R149 10 K/J_4R149 10 K/J_4

CLKREQ_MNC#_R

R202 10 K/J_4R202 10 K/J_4

CLKREQ_LAN#_R

R148 10 K/J_4R148 10 K/J_4

USB_48M

CFG input hardware strapping to allocate PLL assignment. LOW = Both CPU and SRC clock drive from PLL3 HIGH = CPU clock drive from PLL1, SRC clock drive from PLL3. Contains 100kΩ pull-down resistor.

<EMI>

USB_48M

ITP_EN

FSB

FSC

33M_SEL

Clock Gen I2C

PCLK_SMB[11,20]

PDAT_SMB[11,20]

3

Size Document Number Rev

Date: Sheet of

R374 20 K/F_4R374 20K/F_ 4

C190 *10P/50V_4C190 *10P/50V_4

C192 *10P/50V_4C192 *10P/50V_4

C189 *10P/50V_4C189 *10P/50V_4

C176 *10P/50V_4C176 *10P/50V_4

C172 *10P/50V_4C172 *10P/50V_4

+3V

R203

2.2K_4

2

SMBCK1

1

2N7002K

+3V

Q16

R186

2.2K_4

2

SMBDT1

1

2N7002K

Q15

Quanta Computer Inc.

PROJECT :

CLOCK GENERATOR

1

ZE6

2 35Friday, March 11 , 2011

+3V

SMBCK1 [3,20]

SMBDT1 [3,20]

1C

5

DDR_STD(DDR)

M_A_A[14:0][5]

D D

M_A_BS0[5] M_A_BS1[5] M_A_BS2[5] M_CS#0[5] M_CS#1[5] M_CLK0[5] M_CLK0#[5] M_CLK1[5] M_CLK1#[5] M_CKE0[5] M_CKE1[5] M_A_CAS#[5] M_A_RAS#[5]

R130 10K_4R130 10K_4 R129 10K_4R129 10K_4

C C

B B

M_A_WE#[5]

SMBCK1[2,20]

SMBDT1[2,20]

M_ODT0[5] M_ODT1[5]

M_A_DM[7:0][5]

M_A_DQS[7:0][5]

M_A_DQS#[7:0][5]

Place these Caps near So-Dimm0.

+1.5VSUS

C115

4.7U/6.3V_6

A A

C112

4.7U/6.3V_6

+3V

C129

2.2u/6.3V_6

C126

4.7U/6.3V_6

C116

4.7U/6.3V_6

C125

4.7U/6.3V_6

C123

0.1u/10V_4

5

C124

4.7U/6.3V_6

C113

0.1u/10V_4

+0.75V_DDR_VTT

C118

0.1u/10V_4

C114

0.1u/10V_4

C117

0.1u/10V_4

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14

DIMM0_SA0 DIMM0_SA1 SMBCK1 SMBDT1

M_A_DM0 M_A_DM1 M_A_DM3 M_A_DM2 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS0 M_A_DQS1 M_A_DQS3 M_A_DQS2 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#3 M_A_DQS#2 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

C111

0.1u/10V_4

C127

0.1u/10V_4

C128

0.1u/10V_4

C122

107

119

109 108

114 121 101 103 102 104

115 110 113 197 201 202 200

116 120

136 153 170 187

137 154 171 188

135 152 169 186

JDIM1A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9 A10/AP

84

A11

83

A12/BC# A13

80

A14

78

A15 BA0

BA1

79

BA2 S0# S1# CK0 CK0# CK1 CK1#

73

CKE0

74

CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA

ODT0 ODT1

11

DM0

28

DM1

46

DM2

63

DM3 DM4 DM5 DM6 DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3 DQS4 DQS5 DQS6 DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

DDR3-DIMM0_H=4_RVS

+SMDDR_VREF_DIMM

+

C110

C108

C108 220u/2V_7343

220u/2V_7343

0.1u/10V_4

C119

0.1u/10V_4

4

PC2100 DDR3 SDRAM SO-DIMM

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46

(204P)

DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

C107

2.2u/6.3V_6

5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

+SMDDR_VREF_DQ0

C132

0.1u/10V_4

M_A_DQ7 M_A_DQ6 M_A_DQ3 M_A_DQ2 M_A_DQ0 M_A_DQ5 M_A_DQ1 M_A_DQ4 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ24 M_A_DQ25 M_A_DQ27 M_A_DQ26 M_A_DQ29 M_A_DQ28 M_A_DQ30 M_A_DQ31 M_A_DQ18 M_A_DQ23 M_A_DQ22 M_A_DQ19 M_A_DQ21 M_A_DQ17 M_A_DQ16 M_A_DQ20 M_A_DQ33 M_A_DQ32 M_A_DQ35 M_A_DQ34 M_A_DQ37 M_A_DQ36 M_A_DQ38 M_A_DQ39 M_A_DQ44 M_A_DQ45 M_A_DQ42 M_A_DQ46 M_A_DQ40 M_A_DQ41 M_A_DQ47 M_A_DQ43 M_A_DQ48 M_A_DQ49 M_A_DQ55 M_A_DQ54 M_A_DQ53 M_A_DQ52 M_A_DQ51 M_A_DQ50 M_A_DQ61 M_A_DQ56 M_A_DQ63 M_A_DQ58 M_A_DQ57 M_A_DQ60 M_A_DQ59 M_A_DQ62

C131

2.2u/6.3V_6

3

M_A_DQ[63:0] [5]

+SMDDR_VREF

3

R116

1K/F_4

R115 *0_6R115 *0_6

R117

1K/F_4

DDR3_DRAMRST#[5]

+1.5VSUS

+SMDDR_VREF_DIMM

2

+1.5VSUS

2.48A

+3V

R119 *10K_4R119 *10K_4

+3V

PM_EXTTS#0[4]

+SMDDR_VREF_DQ0 +SMDDR_VREF_DIMM

+SMDDR_VREF_DIMM

C109

C109 470p/50V_4

470p/50V_4

+SMDDR_VREF

2

JDIM1B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM0_H=4_RVS

Size Document Number Rev

Date: Sheet of

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

(204P)

PC2100 DDR3 SDRAM SO-DIMM

VTT1 VTT2

GND GND

R138

1K/F_4

R140 *0_6R140 *0_6

R139

1K/F_4

Quanta Computer Inc.

PROJECT :

DDRIII SO-DIMM-0

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205 206

+1.5VSUS

1

+0.75V_DDR_VTT

+SMDDR_VREF_DQ0

ZE6

3 35Friday, March 11, 2011

1

1A

5

PINEVIEW_M

U21C

D12

XDP_RSVD_00

A7

XDP_RSVD_01

D6

XDP_RSVD_02

C5

XDP_RSVD_03

C7

XDP_RSVD_04

T34T34

C6

XDP_RSVD_05

D8

XDP_RSVD_06

B7

XDP_RSVD_07

A9

R292 1K/F_4R292 1K/F_4

D D

C C

DMI_TXP0[8] DMI_TXN0[8] DMI_TXP1[8] DMI_TXN1[8]

CLK_PCIE_DMIN[2] CLK_PCIE_DMIP[2]

B B

XDP_RSVD_08

D9

XDP_RSVD_09

C8

XDP_RSVD_10

T29T29

B8

XDP_RSVD_11

C10

XDP_RSVD_12

D10

XDP_RSVD_13

B11

XDP_RSVD_14

B10

XDP_RSVD_15

B12

XDP_RSVD_16

T40T40

C11

XDP_RSVD_17

L11

RSVD

AA7

RSVD_TP

AA6

RSVD_TP

R5

RSVD_TP

R6

RSVD_TP

AA21

RSVD_TP

W21

RSVD_TP

T21

RSVD_TP

V21

RSVD_TP

Pineview-M 1.66G

U21A

F3

DMI_RXP_0

F2

DMI_RXN_0

H4

DMI_RXP_1

G3

DMI_RXN_1

N7

EXP_CLKINN

N6

EXP_CLKINP

R10

RSVD

R9

RSVD

N10

RSVD

N9

RSVD

K2

RSVD_K2

J1

RSVD_J1

M4

RSVD_M4

L3

RSVD_L3

Pineview-M 1.66G

REV = 1.1

VGA

DPL_REFSSCLKINP DPL_REFSSCLKINN

PM_EXTTS#_1/DPRSLPVR

MISC

3 OF 6

PINEVIEW_M

REV = 1.1

DMI

1 OF 6

CRT_HSYNC CRT_VSYNC

CRT_RED

CRT_GREEN

CRT_BLUE

CRT_IRTN

CRT_DDC_DATA

CRT_DDC_CLK

DAC_IREF

DPL_REFCLKINP DPL_REFCLKINN

PM_EXTTS#_0

PWROK RSTINB

HPL_CLKINN HPL_CLKINP

DMI_TXP_0 DMI_TXN_0 DMI_TXP_1 DMI_TXN_1

EXP_RCOMPO

EXP_ICOMPI

EXP_RBIAS

RSVD_TP RSVD_TP

RSVD_K3 RSVD_M2

RSVD_N2

RSVD_L2

M30 M29

N31 P30 P29 N30

L31 L30

P28 Y30

Y29 AA30 AA31

K29 J30 L5 AA3

W8 W9

4

<Layout note> Place within 750mil from CPU

VGA_HSYNC_R

R81 15/F_4R81 15/F_4

VGA_VSYNC_R

R80 15/F_4R80 15/F_4

CRT_R CRT_G CRT_B

VGA_IREF

G2 G1 H3 J2

L10 L9 L8

N11 P11

K3 L2 M2 N2

CRT_SDA [14]

R96 665/F_4R96 665/F_4

Close pin < 500mil

R79 *0/short_4R79 *0/short_4

<Layout note> Place within 500mil from CPU pin

EXP_COMP

R91 49.9/F_4R91 49.9/F_4

EXP_RBIAS

R310 750/F_4R310 750/F_4

<Layout note> Place within 500mil from CPU pin

PM_EXTTS#0

R77 10K_4R77 10K_4

CRT_R [14] CRT_G [14] CRT_B [14]

CRT_SCL [14]

CLK_MCH_BCLK# [2] CLK_MCH_BCLK [2]

3

CRT_HSYNC [14] CRT_VSYNC [14]

<Layout note> Close to pin within 250mil

CRT_R CRT_G

R94

150/F_4

<Layout note> Close to pin within 500mil

DREFCLK [2] DREFCLK# [2] DREFSSCLK [2] DREFSSCLK# [2]

PM_DPRSLPVR [11,26 ]

PM_EXTTS#0 [3]

IMVP_PWRGD [11,23,26]

PLTRST# [11,18,20,21,22,23]

IMVP_PWRGD LBKLT_EN

R93

R93 100K_4

100K_4

DMI_RXP0 [8] DMI_RXN0 [8] DMI_RXP1 [8] DMI_RXN1 [8]

CRT_B

R92

R95

150/F_4

<20090610(A1A) _Sighting Repor t Rev002_Number: 3359187> Avoid a glitch during system power up

LCD Panel Backlight

+3V

C82 0.1u/10V _4C82 0.1u/10V_4

U5

TC7SH08FUU5TC7SH08FU

2 1

3 5

R99 *0_4R99 *0_4

<Layout note> PLACE TCK/TDI/TMS TERMINATION NEAR CPU

INT_TXLCLKN[14] INT_TXLCLKP[14] INT_TXLOUTN0[14] INT_TXLOUTP0[14] INT_TXLOUTN1[14] INT_TXLOUTP1[14] INT_TXLOUTN2[14] INT_TXLOUTP2[14]

INT_LVDS_PWM[14]

+3V

LVDS_CLK[14] LVDS_DATA[14]

INT_LVDS_DIGON[14]

4

XDP PU

XDP_TMS

R63 51/J_4R63 5 1/J_4

XDP_TDI

R62 51/J_4R62 5 1/J_4

H_PREQ# XDP_TCK XDP_TRST#

XDP_BPM#5 : Length<200mil

R294 51/J_4R294 51/J_4

R293 51/J_4R293 51/J_4

R61 51/J_4R61 5 1/J_4

+3V

R90 2.37K/F_4R90 2.37K/F_4

LBKLT_EN

R89 *2.2K/J _4R89 *2.2K/J _4 R88 *2.2K/J _4R88 *2.2K/J _4

INT_LVDS_BLON [14]

+1.05V

+3V

U25 U26 R23 R24 N26 N27 R26 R27

LIBG

R22

J28 N22 N23 L27 L26

LCTLA_CLK

L23

LCTLB_DATA

K25 K23 K24 H26

T8T8

G11

T39T39

E15

T13T13

G13

T10T10

F13

T33T33

B18

T41T41

B20

T36T36

C20

T37T37

B21

T9T9

G5

XDP_TDI

D14

T35T35

D13

XDP_TCK

B14

XDP_TMS

C14

XDP_TRST#

C16

H_THERMDA

D30

H_THERMDC

E30

C30 D31

R74 2.2K/J _4R74 2.2K/J_4 R69 2.2K/J _4R69 2.2K/J_4

<EMI>

C52

*220P/50V_4

U21D

LVD_A_CLKM LVD_A_CLKP LVD_A_DATAM_0 LVD_A_DATAP_0 LVD_A_DATAM_1 LVD_A_DATAP_1 LVD_A_DATAM_2 LVD_A_DATAP_2

LVD_IBG LVD_VBG LVD_VREFH LVD_VREFL LBKLT_EN LBKLT_CTL LCTLA_CLK LCTLB_CLK LDDC_CLK LDDC_DATA LVDD_EN

BPM_1B_0 BPM_1B_1 BPM_1B_2 BPM_1B_3

BPM_2_0#/RSVD BPM_2_1#/RSVD BPM_2_2#/RSVD BPM_2_3#/RSVD

RSVD TDI TDO TCK TMS TRST_B

THRMDA_1 THRMDC_1

RSVD_C30 RSVD_D31

Pineview-M 1.66G

LVDS_CLK LVDS_DATA

C61

*220P/50V_4

2

PINEVIEW_M

REV = 1.1

ICH

LVDS

CPU

4 OF 6

<Layout note> Place within 500mil from CPU pin and 5mil spacing

Max 500mil Near CPU pin

R51

R51 976/F_4

976/F_4

R55

3.32K/F_4

SMI_B A20M_B FERR_B

LINT00 LINT10

IGNNE_B

STPCLK_B

DPRSTP_B

DPSLP_B

INIT_B PRDY_B PREQ_B

THERMTRIP_B

PROCHOT_B

CPUPWRGOOD

GTLREF

RSVD RSVD

BCLKN

BCLKP

BSEL_0 BSEL_1 BSEL_2

VID_0 VID_1 VID_2 VID_3 VID_4 VID_5 VID_6

RSVD RSVD RSVD RSVD

RSVD_TP RSVD_TP

EXTBGREF

C36

C36 1U/6.3V_4

1U/6.3V_4

E7 H7 H6 F10 F11 E5 F8

G6 G10 G8

T30T30

E11

H_PREQ#

F15

H_THRMTRIP#

E13

R295 68_4R295 68_4

C18

H_PWRGD

W1

H_GTLREF

A13 H27

VSS

L6 E17

H10 J10

CPU_BSEL0

K5

CPU_BSEL1

H5

CPU_BSEL2

K6 H30

H29 H28 G30 G29 F29 E29

L7 D20 H13 D18

K9 D19

H_EXBGREF

K7

1

H_SMI# [9] H_A20M# [9]

H_FERR# [9]

H_INTR [9] H_NMI [9] H_IGNNE# [9] H_STPCLK# [9]

ICH_DPRSTP# [11,26] H_DPSLP# [11] H_INIT# [9]

<20090511(A1A)_Checklist Rev0.7>

+1.05V

PROCHOT_B:68ohm±5% pull-up to Vcc1_05 (VCCP) at both CPU side and Intel MVP

H_PROCHOT# [26]

H_PWRGD [11]

CPU_BSEL1 [2] CPU_BSEL2 [2]

VID0 [26] VID1 [26] VID2 [26] VID3 [26] VID4 [26] VID5 [26] VID6 [26]

CLK GEN no FSA pin for CPU_BSEL0, so just pull high to fix it.

CPU_BSEL0

R65 470/J_4R65 470/J_4

CPU_BSEL1

R66 470/J_4R66 470/J_4

CPU_BSEL2

R64 470/J_4R64 470/J_4

<Layout note> Place within 500mil from CPU pin

+1.05V+1.05V

R280

R280 1K/F_4

1K/F_4

1D: No Stuff C 8007 (CRB v1.0)

H_GTLREFH_EXBGREF

C251

R281

1U/6.3V_4

2K/F_4

CLK_CPU_BCLK# [2] CLK_CPU_BCLK [2]

+1.05V

C257

C257 *220P/50V_4

*220P/50V_4

04

CPU FAN CTRL(THM)

CPU Thermal monitor(THM)

8/11 B-test : for EMI

C130

C130 *220p/50V_6

*220p/50V_6

FAN_PWM_B

5

FAN_SIG

CPUFAN#

6

FAN_SIG [22]

2ND_MBCLK[22]

2ND_MBDATA[22]

THERM_ALERT#[11,22]

R59 *0_4R59 *0_4

ALERT#:pull up at SB side

FAN_ON#

C121

C121 *220p/50V_6

*220p/50V_6

+3V

R137

R133

+3V

R128

R128 10K_4

10K_4

Q6

2

MMBT3904Q6MMBT3904

1 3

2

1 3

10K_4

Q8 MMBT3904Q8MMBT3904

+3V

+5V

10K_4

FAN_PWM_CNFAN_PWM_E

R126

R126 10K_4

10K_4

FAN_SIG

+5V

CN16

345 2 1

FAN

4

FAN_PWM_CN

A A

FAN_ON#

R124 10K_4R124 10K_4

CPUFAN#[22]

R76

R76 10K_4

10K_4

THERM_ALERT#_R

3

+3V

R52

U4

*10K_4

8

SCLK

7

SDA

6

ALERT#

4

OVERT#

IC CTRL(8P) EMC1412-1-ACZL-TR

SMSC ADDRESS: 98H

SMSC : AL001412003

R75 *0/short_4R75 *0/short_4

1

VCC

2

DXP

3

DXN

5

GND

C54 0.1u/10V_4C54 0.1u/10V _4

H_THERMDA

C40

C40 2200p/50V_4

2200p/50V_4

H_THERMDC

<Layout Note> Routing 10:10 mils and away from noise source with ground gard

125 Degree Protection(CPU)

IMVP_PWRGD

+1.05V

CPU

H_THRMTRIP#

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

R60

R60 56_4

56_4

Friday, March 11, 2011

+1.05V

3

Q2 2N7002KQ22N7002K

2

<20090721(B2A)> Change Q7 from BAM700200F6 to BAM70020002 (with ESD protection function)

1

R47

R47 1K_4

1K_4

2

Q1

1 3

MMBT3904Q1MMBT3904

R67 *0 _4R67 *0_4

Quanta Computer Inc.

PROJECT :

Pineview DMI/Display

1

SYS_SHDN# [25,26,30]

PM_THRMTRIP# [9]

ZE6

Tigerpoint

1B

354

5

D D

C C

DDR3 PWROK

SUSON[22,23,27,29]

HWPG_1.5V[22,23,27]

B B

A A

+3V_S5

53

1

4

2

U7

R121

TC7SH08FUU7TC7SH08FU

12.1K/F_4

DDRAM_PWROK

R120

R120 10K_4

10K_4

DDR3_DRAMRST#[3]

<Layout note> Close to DDR_VREF pin

+SMDDR_VREF

<EMI>

DG 2.1 : It is strongly recommended that the SODIMM VREF motherboard traces, going from their VREF resistor dividers to their specified SODIMM VREF pins, be ground referenced on the motherboard where ever possible to help minimize risks of any possible noise being coupled onto VREF. If they can't be referenced to ground we recommend placing a site for a 0603 capacitor near the VREF divider. These 0603 capacitor sites must be connected on one end to the non ground reference plane the VREF trace is referenced

5

to and the other end must be connected to ground.

R352 *0_4R352 *0_4

C297

C297 *1000p/50V_4

*1000p/50V_4

<Layout note> Close to pin

+1.5VSUS

4

M_A_A[14..0][3]

M_A_WE#[3] M_A_CAS#[3] M_A_RAS#[3]

M_A_BS0[3] M_A_BS1[3] M_A_BS2[3]

M_CS#0[3] M_CS#1[3]

M_CKE0[3] M_CKE1[3]

M_ODT0[3] M_ODT1[3]

M_CLK0[3] M_CLK0#[3] M_CLK1[3] M_CLK1#[3]

R348 80.6/F_4R348 80.6/F_4 R349 80.6/F_4R349 80.6/F_4

+1.5VSUS

R351

R351 1K/F_4

1K/F_4

DDR_VREF

R353

R353 1K/F_4

1K/F_4

4

+1.5VSUS

R350

R350 *10K_4

*10K_4

C294 0.1U/10V_4C294 0.1U/10V_4

C295 0.01U/25V_4C295 0.01U/25V_4

C296

0.1u/16V_6

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8

M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14

M_A_WE# M_A_CAS# M_A_RAS#

M_A_BS0 M_A_BS1 M_A_BS2

M_CS#0 M_CS#1

M_CKE0 M_CKE1

M_ODT0 M_ODT1

M_CLK0 M_CLK0# M_CLK1 M_CLK1#

DDRAM_PWROK

DDR_VREF SM_RCOMP SM_RCOMP#

AH19 AK18

AK16 AH14

AK14 AH13

AK12 AK20 AH12

AK22 AK21

AH20 AK11

AH22 AK25

AH10 AK10

AK24 AH26 AH24 AK27

AG15 AF15 AD13 AC13

AC15 AD15 AF13 AG13

AD17 AC17 AB15 AB17

AB11 AB13

AL28 AK28

AK29

AJ18

AJ14

AJ12

AJ11 AJ24 AJ10

AJ22

AJ20

AJ21 AJ25

AH9 AJ8

AB4 AK8

AJ26

U21B

DDR_A_MA_ 0 DDR_A_MA_ 1 DDR_A_MA_ 2 DDR_A_MA_ 3 DDR_A_MA_ 4 DDR_A_MA_ 5 DDR_A_MA_ 6 DDR_A_MA_ 7 DDR_A_MA_ 8 DDR_A_MA_ 9 DDR_A_MA_ 10 DDR_A_MA_ 11 DDR_A_MA_ 12 DDR_A_MA_ 13 DDR_A_MA_ 14

DDR_A_W EB DDR_A_CAS B DDR_A_RAS B

DDR_A_BS_0 DDR_A_BS_1 DDR_A_BS_2

DDR_A_CSB _0 DDR_A_CSB _1 DDR_A_CSB _2 DDR_A_CSB _3

DDR_A_CKE _0 DDR_A_CKE _1 DDR_A_CKE _2 DDR_A_CKE _3

DDR_A_ODT_0 DDR_A_ODT_1 DDR_A_ODT_2 DDR_A_ODT_3

DDR_A_CK_ 0 DDR_A_CKB _0 DDR_A_CK_ 1 DDR_A_CKB _1

DDR_A_CK_ 3 DDR_A_CKB _3 DDR_A_CK_ 4 DDR_A_CKB _4

RSVD_AD17 RSVD_AC17 RSVD_AB1 5 RSVD_AB1 7

VSS RSVD

RSVD_TP RSVD_TP

DDR_VREF DDR_RPD DDR_RPU

RSVD

Pineview-M 1.66G

DDR_A

3

PINEVIEW_M

REV = 1.1

2 OF 6

DDR_A_DQS _0

DDR_A_DQS B_0

DDR_A_DM_0 DDR_A_DQ_ 0

DDR_A_DQ_ 1 DDR_A_DQ_ 2 DDR_A_DQ_ 3 DDR_A_DQ_ 4 DDR_A_DQ_ 5 DDR_A_DQ_ 6 DDR_A_DQ_ 7

DDR_A_DQS _1

DDR_A_DQS B_1

DDR_A_DM_1 DDR_A_DQ_ 8

DDR_A_DQ_ 9 DDR_A_DQ_ 10 DDR_A_DQ_ 11 DDR_A_DQ_ 12 DDR_A_DQ_ 13 DDR_A_DQ_ 14 DDR_A_DQ_ 15

DDR_A_DQS _2

DDR_A_DQS B_2

DDR_A_DM_2 DDR_A_DQ_ 16

DDR_A_DQ_ 17 DDR_A_DQ_ 18 DDR_A_DQ_ 19 DDR_A_DQ_ 20 DDR_A_DQ_ 21 DDR_A_DQ_ 22 DDR_A_DQ_ 23

DDR_A_DQS _3

DDR_A_DQS B_3

DDR_A_DM_3 DDR_A_DQ_ 24

DDR_A_DQ_ 25 DDR_A_DQ_ 26 DDR_A_DQ_ 27 DDR_A_DQ_ 28 DDR_A_DQ_ 29 DDR_A_DQ_ 30 DDR_A_DQ_ 31

DDR_A_DQS _4

DDR_A_DQS B_4

DDR_A_DM_4 DDR_A_DQ_ 32

DDR_A_DQ_ 33 DDR_A_DQ_ 34 DDR_A_DQ_ 35 DDR_A_DQ_ 36 DDR_A_DQ_ 37 DDR_A_DQ_ 38 DDR_A_DQ_ 39

DDR_A_DQS _5

DDR_A_DQS B_5

DDR_A_DM_5 DDR_A_DQ_ 40

DDR_A_DQ_ 41 DDR_A_DQ_ 42 DDR_A_DQ_ 43 DDR_A_DQ_ 44 DDR_A_DQ_ 45 DDR_A_DQ_ 46 DDR_A_DQ_ 47

DDR_A_DQS _6

DDR_A_DQS B_6

DDR_A_DM_6 DDR_A_DQ_ 48

DDR_A_DQ_ 49 DDR_A_DQ_ 50 DDR_A_DQ_ 51 DDR_A_DQ_ 52 DDR_A_DQ_ 53 DDR_A_DQ_ 54 DDR_A_DQ_ 55

DDR_A_DQS _7

DDR_A_DQS B_7

DDR_A_DM_7 DDR_A_DQ_ 56

DDR_A_DQ_ 57 DDR_A_DQ_ 58 DDR_A_DQ_ 59 DDR_A_DQ_ 60 DDR_A_DQ_ 61 DDR_A_DQ_ 62 DDR_A_DQ_ 63

AD3 AD2 AD4

AC4 AC1 AF4 AG2 AB2 AB3 AE2 AE3

AB8 AD7 AA9

AB6 AB7 AE5 AG5 AA5 AB5 AB9 AD6

AD8 AD10 AE8

AG8 AG7 AF10 AG11 AF7 AF8 AD11 AE10

AK5 AK3 AJ3

AH1 AJ2 AK6 AJ7 AF3 AH2 AL5 AJ6

AG22 AG21 AD19

AE19 AG19 AF22 AD22 AG17 AF19 AE21 AD21

AE26 AG27 AJ27

AE24 AG25 AD25 AD24 AC22 AG24 AD27 AE27

AE30 AF29 AF30

AG31 AG30 AD30 AD29 AJ30 AJ29 AE29 AD28

AB27 AA27 AB26

AA24 AB25 W24 W22 AB24 AB23 AA23 W27

M_A_DQS0 M_A_DQS#0 M_A_DM0

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7

M_A_DQS1 M_A_DQS#1 M_A_DM1

M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15

M_A_DQS2 M_A_DQS#2 M_A_DM2

M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23

M_A_DQS3 M_A_DQS#3 M_A_DM3

M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31

M_A_DQS4 M_A_DQS#4 M_A_DM4

M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39

M_A_DQS5 M_A_DQS#5 M_A_DM5

M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47

M_A_DQS6 M_A_DQS#6 M_A_DM6

M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55

M_A_DQS7 M_A_DQS#7 M_A_DM7

M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

2

1

05

M_A_DQ[63..0] [3]

M_A_DM[7..0] [3]

M_A_DQS[7..0] [3] M_A_DQS#[7..0] [3]

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Friday, March 11, 2011

Date: Sheet of

Friday, March 11, 2011

Date: Sheet of

2

Friday, March 11, 2011

PROJECT :

Pineview DDR

ZE6

1

1B

355

1

A A

B B

C C

D D

1

<Layout note> Close to pin

+1.5VSUS

<Layout note> VCCA_DDR and VCCACK_DDR rails can be on the same source but make sure the plane shapes are split near Pineview-M to avoid noise coupling

+1.8V

2

R112 *0/short_6R112 *0/short_6

R98

0.2A/600ohm_6

2

C106

C106 22U/6.3V_8

22U/6.3V_8

VCC1.8_VCCA CRTDAC

C79

C79 1u/6.3V_4

1u/6.3V_4

C102

C102 1U/6.3V_4

1U/6.3V_4

<Layout note> Close to pin AA19

+1.8V

C323

C323 *22U/6.3V_8

*22U/6.3V_8

+1.05V +1.05V

+1.05V

C84 2.2U/6.3V_6C84 2.2U/6.3V_6 C85 1U/6.3V_4C85 1U/6.3V_4 C74 1U/6.3V_4C74 1U/6.3V_4 C72 1U/6.3V_4C72 1U/6.3V_4 C77 1U/6.3V_4C77 1U/6.3V_4 C88 1U/6.3V_4C88 1U/6.3V_4 C78 1U/6.3V_4C78 1U/6.3V_4 C86 1U/6.3V_4C86 1U/6.3V_4

+1.5VSUS

R111 *0/short_8R111 *0/short_8

C101 2.2U/6.3V_6C101 2.2U/6.3V_6 C100 1U/6.3V_4C 100 1U/6.3V_4 C99 1U/6.3V_4C99 1U/6.3V_4 C96 1U/6.3V_4C96 1U/6.3V_4 C103 1U/6.3V_4C 103 1U/6.3V_4

VCC1.5_VCCC K_DDR

C278 22u/6.3V_8C278 22u/6.3 V_8 C81 4.7U/6.3V_6C81 4.7U/6.3V_6 C76 1U/6.3V_4C76 1U/6.3V_4

C80 *0.1u/10V_4C 80 *0.1u/10V_4 C94 *0.1u/10V_4C 94 *0.1u/10V_4

C91 1U/6.3V_4C91 1U/6.3V_4 C93 1U/6.3V_4C93 1U/6.3V_4

C75 1U/6.3V_4C75 1U/6.3V_4

C253 1U/6.3V_4C 253 1U/6.3V_4 C254 1U/6.3V_4C 254 1U/6.3V_4

3

VCCGFX

U21E

T13

VCCGFX

T14

VCCGFX

T16

VCCGFX

T18

VCCGFX

T19

VCCGFX

V13

VCCGFX

V19

VCCGFX

W14

VCCGFX

W16

VCCGFX

W18

VCCGFX

W19

VCCGFX

AK13

VCCSM

AK19

VCCSM

AK9

VCCSM

AL11

VCCSM

AL16

VCCSM

AL21

VCCSM

AL25

VCCSM

AK7

VCCCK_DDR

AL7

VCCCK_DDR

U10

+1.05V

3

+3V

C256

C256 *1u/6.3V_4

*1u/6.3V_4

AC31

U5 U6 U7 U8 U9 V2 V3

V4 W10 W11

AA10 AA11

AA19

V11

T30

T31

J31

C3

B2

C2 A21

VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR

VCCACK_DDR VCCACK_DDR

VCCD_AB_DPL

VCCD_HMPLL

VCCSFR_AB_DPL

0.154A

VCCACRTDAC

0.006A

VCC_GIO VCCRING_EAST VCCRING_WEST VCCRING_WEST VCCRING_WEST VCC_LGI_VID

Pineview-M 1.66G

1.38A

2.27A

5 OF 6

1.32A

PINEVIEW_M

GFX/MCH

DDR

0.33A

4

EXP\CRT\PLL

4

REV = 1.1

POWER

DMI

3.5A

CPU

VCCSENSE

VSSSENSE

0.08A

0.06A

LVDS

VCCA_DMI VCCA_DMI VCCA_DMI

0.104A

VCCSFR_DMIHMPLL

VCCA

VCCP VCCP

VCCALVD VCCDLVD

0.48A

RSVD

VCCP

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

VCC

VCORE

A23 A25 A27 B23 B24 B25 B26 B27 C24 C26 D23 D24 D26 D28 E22 E24 E27 F21 F22 F25 G19 G21 G24 H17 H19 H22 H24 J17 J19 J21 J22 K15 K17 K21 L14 L16 L19 L21 N14 N16 N19 N21

C29 B29

VCC1.5_VCCA

Y2

D4

C255 *0.1u/10V_4C255 *0.1u/10V_4

B4

VCCP_VCCP

B3

V30 W31

VCCP_DMI

T1

C273 1U/6.3V_4C 273 1U/6.3V_4

T2

C272 1U/6.3V_4C 272 1U/6.3V_4

T3

VCCP_VCCA PLL_DMI

P2

VCC1.8_DMIHMPLL

AA1 E2

+1.05V

5

C69 1U/6.3V_4C69 1U/6.3V_4 C58 1U/6.3V_4C58 1U/6.3V_4 C39 1U/6.3V_4C39 1U/6.3V_4 C57 1U/6.3V_4C57 1U/6.3V_4 C32 22u/6.3V_8C 32 22u/6.3V_8 C34 22u/6.3V_8C 34 22u/6.3V_8 C33 22u/6.3V_8C 33 22u/6.3V_8

C280 0.01U/25V_4C280 0.01U/25V_4

R291 *0/short_4R291 *0/short_4

VCC1.8_LCCA LVD

5

R322 *0/short_6R322 *0/short_6

<Layout note> Close to pin

+1.05V

<20090526(A1A)_EDS Rev0.7> D4 pin is VCCP, not VCC

R315 *0/short_6R315 *0/short_6

R326 *0/short_4R326 *0/s hort_4

C284

C284 1u/6.3V_4

1u/6.3V_4

6

+1.5V

+1.05V

R100 0.1uH/300mA_ 6R100 0.1uH/300mA_ 6

C87

C87 22U/6.3V_8

22U/6.3V_8

+1.05V

R313 *0_4R313 *0_4

+1.8V

C267

C267 *1u/6.3V_4

*1u/6.3V_4

6

7

VCORE

R56

R56 100/F_4

100/F_4

VCC_SENSE [26] VSS_SENSE [26]

R57

R57 100/F_4

100/F_4

+1.8V

C92

1u/6.3V_4

+1.05V

Quanta Computer Inc.

PROJECT :

7

PROJECT :

Pineview Power

Size D ocument Numb er Rev

Date: Sheet of

Friday, March 11, 2 011

Date: Sheet of

Friday, March 11, 2 011

Date: Sheet of

Friday, March 11, 2 011

ZE6

8

06

1B

356

8

1

PINEVIEW_M

U21F

REV = 1.1

A11

VSS

A16

VSS

A19

VSS

A29

RSVD_NCTF

A3

RSVD_NCTF

A30

RSVD_NCTF

A4

RSVD_NCTF

AA13

VSS

AA14

VSS

AA16

VSS

AA18

VSS

AA2

VSS

AA22

VSS

AA25

VSS

AA26

VSS

AA29

VSS

AA8

VSS

AB19

VSS

AB21

VSS

AB28

VSS

AB29

VSS

AB30

VSS

AC10

VSS

AC11

VSS

AC19

VSS

AC2

VSS

AC21

VSS

AC28

VSS

AC30

VSS

AD26

VSS

AD5

VSS

AE1

VSS

AE11

VSS

AE13

VSS

AE15

VSS

AE17

VSS

AE22

VSS

AE31

VSS

AF11

VSS

AF17

VSS

AF21

VSS

AF24

VSS

AF28

VSS

AG10

VSS

AG3

VSS

AH18

VSS

AH23

VSS

AH28

VSS

AH4

VSS

AH6

A A

AJ16 AJ31

AK23 AK30 AK31 AL13 AL19

AL23 AL29

AL30

AH8

AJ1

AK1 AK2

AL2

AL3 AL9

B13 B16 B19 B22 B30 B31

B5 B9

C1 C12 C21 C22 C25 C31 D22

E1

E10 E19 E21 E25

E8

F17 F19

VSS VSS RSVD_NCTF VSS VSS RSVD_NCTF RSVD_NCTF VSS RSVD_NCTF RSVD_NCTF VSS VSS RSVD_NCTF VSS RSVD_NCTF RSVD_NCTF RSVD_NCTF VSS VSS VSS VSS VSS RSVD_NCTF RSVD_NCTF VSS VSS RSVD_NCTF VSS VSS VSS VSS RSVD_NCTF VSS RSVD_NCTF VSS VSS VSS VSS VSS VSS VSS

Pineview-M 1.66G

6 OF 6

F24

VSS

F28

VSS

F4

VSS

G15

VSS

G17

VSS

G22

VSS

G27

VSS

G31

VSS

H11

VSS

H15

VSS

H2

VSS

H21

VSS

H25

VSS

H8

VSS

J11

VSS

J13

VSS

J15

VSS

J4

VSS

K11

VSS

K13

VSS

K19

VSS

K26

VSS

K27

VSS

GND

K28

VSS

K30

VSS

K4

VSS

K8

VSS

L1

VSS

L13

VSS

L18

VSS

L22

VSS

L24

VSS

L25

VSS

L29

VSS

M28

VSS

M3

VSS

N1

VSS

N13

VSS

N18

VSS

N24

VSS

N25

VSS

N28

VSS

N4

VSS

N5

VSS

N8

VSS

P13

VSS

P14

VSS

P16

VSS

P18

VSS

P19

VSS

P21

VSS

P3

VSS

P4

VSS

R25

VSS

R7

VSS

R8

VSS

T11

VSS

U22

VSS

U23

VSS

U24

VSS

U27

VSS

V14

VSS

V16

VSS

V18

VSS

V28

VSS

V29

VSS

W13

VSS

W2

VSS

W23

VSS

W25

VSS

W26

VSS

W28

VSS

W30

VSS

W4

VSS

W5

VSS

W6

VSS

W7

VSS

Y28

VSS

Y3

VSS

Y4

VSS

T29

VSS

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Friday, March 11, 2011

Date: Sheet of

Friday, March 11, 2011

Date: Sheet of

1

Friday, March 11, 2011

PROJECT :

Pineview GND

ZE6

07

357

1B

1

0110 : exchange USB port 1 and port 3

TGP

U20B

DMI_RXN0[4]

DMI_RXP0[4] DMI_TXN0[4] DMI_TXP0[4]

DMI_RXN1[4]

DMI_RXP1[4] DMI_TXN1[4] DMI_TXP1[4]

PE1RX-[18]

LAN

PE1RX+[18] PE1TX-[18] PE1TX+[18]

PE2RX-[20]

WLAN

PE2RX+[20] PE2TX-[20] PE2TX+[20]

PE3RX-[21]

A A

Card Reader

PE3RX+[21] PE3TX-[21] PE3TX+[21]

PE4RX-[20]

PE4RX+[20]

3G

PE4TX-[20] PE4TX+[20]

C53 0.1U/10V_4C53 0.1U/10V_4 C46 0.1U/10V_4C46 0.1U/10V_4

C65 0.1U/10V_4C65 0.1U/10V_4 C59 0.1U/10V_4C59 0.1U/10V_4

C259 0.1U/10V_4C259 0.1U/10V_4 C262 0.1U/10V_4C262 0.1U/10V_4

C263 0.1U/10V_4C263 0.1U/10V_4 C266 0.1U/10V_4C266 0.1U/10V_4

C270 0.1U/10V_4C270 0.1U/10V_4 C268 0.1U/10V_4C268 0.1U/10V_4

C271 *3G@0.1U/10V_4C271 *3G@0.1U/10V_4 C274 *3G@0.1U/10V_4C274 *3G@0.1U/10V_4

DMI_TXN0_C DMI_TXP0_C

DMI_TXN1_C DMI_TXP1_C

PCIE_TXN1_C PCIE_TXP1_C

PCIE_TXN2_C PCIE_TXP2_C

PCIE_TXN3_C PCIE_TXP3_C

PCIE_TXN4_C PCIE_TXP4_C

R23

DMI0RXN

R24

DMI0RXP

P21

DMI0TXN

P20

DMI0TXP

T21

DMI1RXN

T20

DMI1RXP

T24

DMI1TXN

T25

DMI1TXP

T19

DMI2RXN

T18

DMI2RXP

U23

DMI2TXN

U24

DMI2TXP

V21

DMI3RXN

V20

DMI3RXP

V24

DMI3TXN

V23

DMI3TXP

K21

PERN1

K22

PERP1

J23

PETN1

J24

PETP1

M18

PERN2

M19

PERP2

K24

PETN2

K25

PETP2

L23

PERN3

L24

PERP3

L22

PETN3

M21

PETP3

P17

PERN4

P18

PERP4

N25

PETN4

N24

PETP4

TGP

DMI

USB

PCI-E

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P

OC0# OC1# OC2# OC3#

OC4# OC5#/GPIO29 OC6#/GPIO30 OC7#/GPIO31

USBRBIAS

USBRBIAS#

CLK48

H7 H6 H3 H2 J2 J3 K6 K5 K1 K2 L2 L3 M6 M5 N1 N2

USBOC#R_1

D4

USBOC#L_1

C5

USBOC#

D3

USBOC#R_1

D2

USBOC#

E5

USBOC#

E6

USBOC#

C2

USBOC#

C3

G2

USBRBIAS

G3

placed within 500 mil of the chipset

CLKUSB_48

F4

to fix charger port will auto wake up issue.

USBP0- [17] USBP0+ [17] USBP1- [17] USBP1+ [17] USBP2- [14] USBP2+ [14] USBP3- [17] USBP3+ [17] USBP4- [20] USBP4+ [20] USBP5- [20] USBP5+ [20] USBP6- [15] USBP6+ [15] USBP7- [20] USBP7+ [20]

R303 *0/short_4R303 *0/short_4 R297 *0/short_4R297 *0/short_4

R314 22.6/F_4R314 22.6/F_4

CLKUSB_48 [2]

SYSTEM (Right down) SYSTEM (Right up) CCD SYSTEM (Left) SIM 3G BT WLAN

USBOC#R [17,22] USBOC#L [17,22]

USBOC#R_1 USBOC#L_1 USBOC#

R305 8.2K_4R305 8.2K_4 R298 8.2K_4R298 8.2K_4 R306 1K/F_4R306 1K/F_4

+3V_S5

+1.5V

R78 24.9/F_4R78 24.9/F_4

CLK_PCIE_ICH#[2] CLK_PCIE_ICH[2]

DMI_COMP

W23 W24

H24

J22

DMI_ZCOMP DMI_IRCOMP

DMI_CLKN DMI_CLKP

Tiger Point

CLKUSB_48

R309

R309 *10/F_4

2

1

*10/F_4

C258

C258 *10P/50V_4

*10P/50V_4

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Friday, March 11, 2011

Date: Sheet of

Friday, March 11, 2011

Date: Sheet of

Friday, March 11, 2011

PROJECT :

Tiger Point DMI/PCIE/USB

ZE6

358

1B

5

4

3

2

1

09

TGP

U20C

D D

C C

B B

PCH_GPIO36

R12

AE20 AD17 AC15 AD18

Y12 AA10 AA12

Y10

AD15

W10

V12 AE21 AE18

AD19

U12

AC17

AB13

AC13

AB15

Y14 AB16

AE24 AE23

AA14

V14

AD16

AB11 AB10

AD23

RSVD03 RSVD04 RSVD05 RSVD06 RSVD07 RSVD08 RSVD09 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18

RSVD19 RSVD20 RSVD21 RSVD22 RSVD23

RSVD24 RSVD25 RSVD26

RSVD27 RSVD28

RSVD29 RSVD30 RSVD31 GPIO36

TGP

A20M#

IGNNE#

INIT# INTR

FERR#

NMI

RCIN#

SERIRQ

SMI#

AE6 AD6 AC7 AD7 AE8 AD8 AD9 AC9

AD4 AC4

AD11 AC11 AD25

U16 Y20 Y21 Y18 AD21 AC25 AB24 Y22 T17 AC21 AA16 AA21 V18 AA20

GA20

KBRST#

SATA0RXN SATA0RXP SATA0TXN

SATA0TXP SATA1RXN SATA1RXP SATA1TXN

SATA1TXP

SATA

SATA_CLKN SATA_CLKP

SATARBIAS#

SATARBIAS

SATALED#

A20GATE CPUSLP#

INIT3_3V#

HOST

STPCLK#

THERMTRIP#

SATA_RXN0 [19]

SATA_RXP0 [19] SATA_TXN0 [19] SATA_TXP0 [19]

CLK_PCIE_SATA# [2]

CLK_PCIE_SATA [2]

SATARBIAS#

SATALED#

R340 10K/J_4R340 10K/J_4

SATA HDD

R335 24.9/F_4R335 24.9/F_4

+3V

GA20 [22]

H_A20M# [4] H_IGNNE# [4] H_INIT# [4]

H_INTR [4] H_NMI [4]

KBRST# [22]

SERIRQ [22]

H_SMI# [4] H_STPCLK# [4]

<Layout note> Close to pin within 500mil

SATALED# [15]

+1.05V

R84

R84 56/J_4

56/J_4

<Layout note> Close to pin

<20090514(A1A)_Checklist Rev0.7> SERIRQ:8.2K pull-up A20GATE:10K pull-up

SERIRQ GA20 KBRST# PCH_GPIO36

H_FERR# [4]

R107 8.2K_4R107 8.2K_4 R108 10K_4R108 10K_4 R338 10K/J_4R338 10K/J_4 R339 *10K/J_4R339 *10K/J_4

<Layout note> Close to pin within 200mil

+1.05V

<Layout note> Close to pin within 1"

R103

R103 56/J_4

56/J_4

+3V

PM_THRMTRIP# [4]

3

Tiger Point

NOTE

：

1. CPUSLP# is supported only on nettop platforms.

A A

5

3

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Friday, March 11, 2011

Date: Sheet of

Friday, March 11, 2011

Date: Sheet of

4

3

Friday, March 11, 2011

PROJECT :

Tiger Point Sata/Host

2

ZE6

1B

359

1

5

PCLK_ICH[2]

D D

<20090601(A1A)_Checklist Rev0.7> Strap1#/strap2#: signals have weak internal pull-ups

C C

EC_SCI#[22]

B B

+3V

EC_SCI#

T38T38 R271 10K/J_4R271 10K/J_4 R73 8.2K/J_4R73 8.2K/J_4

ICH Boot BIOS select

R71*1K_4 R71*1K_4 R299*1K_4 R299*1K_4

PCH_GPIO48 (INT PU)

PCH_GPIO48 PCH_GPIO17

Low = A16 swap override enabled High = Default

PCH_GPIO17 (INT PU) Boot BIOS Location

0 1 SPI 1 0 PCI 1 1 LPC

A A

A16 SWAP Override strap

PCH_A16WP (INT PU)

5

4

PCI_DEVSEL#

T27T27

PCI_IRDY# PCI_SERR#

PCI_STOP# PCI_LOCK# PCI_TRDY# PCI_PERR# PCI_FRAME#

T26T26 T31T31

PCI_REQ1# PCI_REQ2#

PCH_GPIO48 PCH_GPIO17 PCH_GPIO22

PCI_INTA# PCI_INTB# PCI_INTC# PCI_INTD# PCI_INTE# PCI_INTF# PCI_INTG# PCI_INTH#

PCH_A16WP

4

U20A

A5

B15

J12

A23

B7 C22 B11

F14

A8 A10 D10 A16

A18 E16

G16 A20

G14

A2 C15

C9

B2

D7

B3 H10

E8

D6

H8

F8 D11

K9 M13

(Default)

R72*1K_4 R72*1K_4 R300*1K_4 R300*1K_4

PAR DEVSEL# PCICLK PCIRST# IRDY# PME# SERR# STOP# PLOCK# TRDY# PERR# FRAME#

GNT1# GNT2#

REQ1# REQ2#

GPIO48/ STRAP1# GPIO17/ STRAP2# GPIO22 GPIO1

PIRQA# PIRQB# PIRQC# PIRQD# PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5

STRAP0# RSVD01 RSVD02

Tiger Point

3

TGP

B22

AD0

D18

AD1

C17

AD2

C18

AD3

B17

AD4

C19

AD5

B18

AD6

B19

AD7

D16

PCI

AD8

AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

C/BE0# C/BE1# C/BE2# C/BE3#

D15 A13 E14 H14 L14 J14 E10 C11 E12 B9 B13 L12 B8 A3 B5 A6 G12 H12 C8 D9 C7 C1 B1

H16 M15 C13 L16

PCI_INTA# PCI_INTC# PCI_INTF# PCI_INTB#

PCI_IRDY# PCI_LOCK# PCI_PERR# PCI_TRDY#

PCI_DEVSEL# PCI_FRAME# PCI_REQ1# PCI_REQ2#

PCI_STOP# PCI_SERR# EC_SCI#

PCI_INTD# PCI_INTH# PCI_INTG# PCI_INTE#

PCH_GPIO22

IRQ

PIRQA PIRQB PIRQC PIRQD

1

PIRQE PIRQF PIRQG PIRQH

+3V

Size Document Number Rev

Date: Sheet of

3

Date: Sheet of

2

RP4 8.2K_8P4RRP4 8.2K_8P4R

1

2

3

4

5

6

7

8

RP3 8.2K_8P4RRP3 8.2K_8P4R

1

2

3

4

5

6

7

8

RP5 8.2K_8P4RRP5 8.2K_8P4R

1

2

3

4

5

6

7

8

R272 8.2K/J_4R272 8.2K/J_4 R283 8.2K/J_4R283 8.2K/J_4 R54 10K_4R54 10K_4

RP1 8.2K_8P4RRP1 8.2K_8P4R

1

2

3

4

5

6

7

8

Description

USB UHCI Controller #1, #4 AC'97 Codec; option for SMBUS

USB UH Controller #3; SATA/IDE Native Mode USB UHCI Controller #2 Internal LAN; Option for SCI, TCO, HPET#0,1,2 Option for SCI, TCO, HPET#0,1,2 Option for SCI, TCO, HPET#0,1,2 USB EHCI Controller; Option for SCI, TCO, HPET#0,1,2

PCI_GNT#2 Internal PU

Friday, March 11, 2011

Should not be PD

Quanta Computer Inc.

PROJECT :

TigerPoint PCI(3/6)

2

1

+3V

R2848.2K_4 R2848.2K_4

+3V

ZE6

1

10

3510

1B

5

EMI

14M_ICH

R327

R327 *33/J_4

*33/J_4

C285

C285 *10P/50V_4

D D

C C

B B

*10P/50V_4

debug port for google require

RTC(RTC)

+3VPCU

VCCRTC

D33

C293

CH500H-40

1u/10V_6

D32

R344

CH500H-40

CH500H-40 G1

20K/F_6

1u/10V_6

R354

R354 1K_4

1K_4

1u/10V_6

ACZ_BITCLK_AUDIO[16] ACZ_RESET#_AUDIO[16]

ACZ_SDIN0[16]

ACZ_SDOUT_AUDIO[16]

ACZ_SYNC_AUDIO[16]

14M_ICH[2]

RTCRST#VCCRTC_3

G1

12

C288

*SHORT_PAD

20MIL 20MIL

1 3

Q10

MMBT3904

2

12

A A

CN5

CN5 RTC SOCKET

RTC SOCKET

5

R160 2K/F_4R160 2K/F_4

C279 15P/50V_4C279 15P/50V_4

32.768KHz,+-20PPM

C275 15P/50V_4C275 15P/50V_4

VCCRTC_2VCCRTC_1VCCRTC_4

4

U20D

T18T18

AA5

LDRQ1#/GPIO23

T17T17

ACZ_BITCLK_R ACZ_RST#_R

ACZ_SDOUT_R ACZ_SYNC_R

14M_ICH

RTC_X1 RTC_X2

RTCRST#

PCLK_SMB PDAT_SMB

T43T43 T46T46 T14T14 T15T15 T45T45

Platform Reset

U17

PLT_RST#

R302 *0/short_4R302 *0/short_4

R161

68.1K/F_4

R162

150K/F_4

V6

LAD0/FW H0

AA6

LAD1/FW H1

Y5

LAD2/FW H2

W8

LAD3/FW H3

Y8

LDRQ0#

Y4

LFRAME#

P6

HDA_BIT_CLK

U2

HDA_RST#

W2

HDA_SDI0

V2

HDA_SDIN1

P8

HDA_SDIN2

AA1

HDA_SDOUT

Y1

HDA_SYNC

AA3

CLK14

U3

EE_CS

AE2

EE_DIN

T6

EE_DOUT

V3

EE_SHCLK

T4

LAN_CLK

P7

LANR_STSYNC

B23

LAN_RST#

AA2

LAN_RXD0

AD1

LAN_RXD1

AC2

LAN_RXD2

W3

LAN_TXD0

T7

LAN_TXD1

U4

LAN_TXD2

W4

RTCX1

V5

RTCX2

T5

RTCRST#

E20

SMBALERT#/ GPIO11

H18

SMBCLK

E23

SMBDATA

H21

SMLALERT#

F25

SMLINK0

F24

SMLINK1

R2

SPI_MISO

T1

SPI_MOSI

M8

SPI_CS#

P9

SPI_CLK

R4

SPI_ARB

+3V

2 1

+5V_S5

Tiger Point

C252 *0.1u/10V_4C252 *0.1u/10V_4

3 5

LPCAD0[20,22] LPCAD1[20,22] LPCAD2[20,22] LPCAD3[20,22]

LPCFRAME#[20,22]

R321 33/J_4R 321 33/J_4 R316 33/J_4R 316 33/J_4

R324 33/J_4R 324 33/J_4 R323 33/J_4R 323 33/J_4

<20090529(A1A)_Checklist Rev0.7> If integrated LAN is not used LAN_RST# tie it to GND.

R320

R320 10M/J_4

Y3

PCLK_SMB[2,20] PDAT_SMB[2,20]

4

10M/J_4

1 4

2 3

SMBALERT#

SMB_LINK_ALERT# SMLINK0 SMLINK1

R165 2K/F_4R165 2K/F_4

1.Level 1 Environment-related Substances Should NEVER be Used.

2.Purchase ink, paint, wire rods, and Molding resins only from the business Partners that Sony approves as Green Partners.

*TC7SH08FU

4

EPROM

3

LPC AUDIO LAN

R307

R307 100K_4

100K_4

3

TGP

RTC SMB SPI

BM_BUSY#/GPIO0

DPRSLPVR

STP_PCI#

STP_CPU#

CLKRUN#

CPUPWRG D/GPIO49

VRMPWRG D MCH_SYNC#

MISC

PWRBTN#

SUS_STAT#/LPCPD#

SYS_RESET#

PLTRSTB

INTRUDER#

RSMRST#

INTVRMEN

BATLOW#

DPRSTP#

PLTRST# [4,18,20,21,22,23]

ACZ_SDOUT (INT PD)

GPIO6 GPIO7 GPIO8

GPIO9 GPIO10 GPIO12 GPIO13 GPIO14 GPIO15

GPIO24 GPIO25 GPIO26 GPIO27 GPIO28

GPIO33 GPIO34 GPIO38 GPIO39

THRM#

SUSCLK

WAKE#

PWROK

SPKR

SLP_S3# SLP_S4# SLP_S5#

DPSLP# RSVD31

BM_BUSY#

T15

PCH_GPIO6

W16

PCH_GPIO7

W14

EC_SMI#

K18

PCH_GPIO9

H19

PCH_GPIO10

M17

PCH_GPIO12

A24

PCH_GPIO13

C23

PCH_GPIO14

P5

PCH_GPIO15

E24 AB20 Y16 AB19

PCH_GPIO24

R3

DMI_AC_ENABLE

C24

PCH_GPIO26

D19

PCH_GPIO27

D20

PCH_GPIO28

F22

CLKRUN#

AC19

PCH_GPIO33

U14

MBID0

AC1

MBID1

AC23

MBID2

AC24 AB22 AB17

V16

MCH_SYNC#

AC18

DNBSWON#

E21

ICH_RI#

H23

RI#

G22

SUSCLK

D22

SYS_RST#

G18

PLT_RST#

G23

PCIE_WAKE#

C25

SM_INTRUDER#

T8

TPT_PWROK

U10

EC_RSMRST#

AC3

ICH_INTVRMEN

AD3 J16

H20 E25 F21

PM_BATLOW#

B25 AB23 AA18 F20

ACZ_SYNC (INT PD)

0

1

2

T20T20 T19T19

EC_SMI# [22]

PM_DPRSLPVR [4,26] PM_STPPCI# [2] PM_STPCPU# [2]

T44T44

1C: Intel suggestion enable AC mode

T28T28 T32T32 T11T11

CLKRUN# [22]

T16T16

H_PWRGD [4]

THERM_ALERT# [4,22]

VR_PWRGD_CK410 [2] DNBSWON# [22,23]

T42T42

SUSCLK [22]

PCIE_WAKE# [18,20]

EC_RSMRST# [22,23] SB_BEEP [16] SUSB# [22]

SUSC# [22]

ICH_DPRSTP# [4,26] H_DPSLP# [4]

<20090721(B2A)> Stuff U19 and C275 and un-stuff R205 for power sequence

TPT Power OK

HWPG[22,23]

IMVP_PWRGD[4,23,26]

ECPWROK[22,23]

T12T12

R347 1M/F_6R347 1M/F_6

R331 332K/F_4R331 332K/F_4

+3V

C98 *0.1u/10V_4C98 *0.1u/10V_4

U6

2 1

3 5

R135 0_4R135 0_4

R110 *0_4R110 *0_4

Description

4 x 1s

0

*

Reserved1

0

1

Reserved

1 1 x 4s(1 port/4 lanes)

2

Size Document Number Rev

Date: Sheet of

<20090515(A1A)_Checklist Rev0.7> BATLOW#:8.2K pull-up to V3ALWAYS WAKE#:10K pull-up to VccSus3_3 SYS_RST#:10K pull-up to VccSus3_3

PCLK_SMB PDAT_SMB PCH_GPIO10 PM_BATLOW# THERM_ALERT# DNBSWON# PCH_GPIO9

EC_SMI# SYS_RST# SMBALERT# SMB_LINK_ALERT# PCIE_WAKE# SMLINK1 SMLINK0 PCH_GPIO15 ICH_RI# PCH_GPIO12 PCH_GPIO13 PCH_GPIO14

MCH_SYNC# CLKRUN# BM_BUSY#

VCCRTC

DMI_AC_ENABLE TPT_PWROK EC_RSMRST#

*TC7SH08FUU6*TC7SH08FU

4

INTVRMEN

1

0

Friday, March 11, 2011

TPT_PWROK

Enable internal VccSus1_5 VRM (default)

Disable

Quanta Computer Inc.

PROJECT :

TigerPoint GPIO

MBID2 MBID1 MBID0

1

R273 2.2K_4R273 2.2K_4 R288 2.2K_4R288 2.2K_4 R277 8.2K_4R277 8.2K_4 R282 8.2K_4R282 8.2K_4 R104 8.2K_4R104 8.2K_4 R276 *10K_4R276 *10K_4 R275 8.2K_4R275 8.2K_4

R286 10K_4R286 10K_4 R274 10K_4R274 10K_4 R285 10K_4R285 10K_4 R278 10K_4R278 10K_4 R296 10K_4R296 10K_4 R304 10K_4R304 10K_4 R308 10K_4R308 10K_4 R301 8.2K_4R301 8.2K_4 R279 10K_4R279 10K_4 R289 10K/J_4R289 10K/J_4 R287 10K/J_4R287 10K/J_4 R317 10K/J_4R317 10K/J_4

R337 1K/F_4R337 1K/F_4 R106 8.2K_4R106 8.2K_4 R333 8.2K_4R333 8.2K_4

R290 1K_4R290 1K_4 R336 10K_4R336 10K_4 R334 10K_4R334 10K_4

+3V

R329

R343

10K_4

*10K_4

R332

R328

10K_4

*10K_4

TPT_PWROK [23]

ZE6

11

+3V_S5

+3V

R342

R342 *10K_4

*10K_4

R330

R330 *10K_4

*10K_4

3511

1A

<Layout note> Place 0402 caps close to ball Place 0603/0805 caps close to ICH

TGP

U20E

A A

TGP

VCC5REF

VCC5REF_SUS

VCCSATAPLL

6uA

VCCRTC VCCDMIPLL VCCUSBPLL

V_CPU_IO

VCC1_5_1 VCC1_5_2 VCC1_5_3 VCC1_5_4

VCC1_05_1 VCC1_05_2 VCC1_05_3 VCC1_05_4

F12

F5 Y6 AE3 Y25 F6

W18

AA8 M9 M20 N22

J10 K17 P15 V10

VCCP_VCC1_05

VCC1.5_VCC1.5

VCCP_VCC1_05

6mA

10mA

45mA

24mA 10mA

14mA

1.422A

POWER

0.955A

1

VCC5_VCC5REF

1u/10V_4C37 1u/10V_4C37

RVCC5_VCC5REF_SUS

C264 0.1u/10V_4C264 0.1u/10V_4

VCC1.5_SATAPLL

C83 0.1u/10V_4C83 0.1u/10V_4 C291 0.1U/10V_4C291 0.1U/10V_4

C290 0.01U/25V_4C290 0.01U/25V_4

VCC1.5_VCCDMIPLL

C281 0.01U/25V_4C281 0.01U/25V_4

C66 0.1U/10V_4C66 0.1U/10V_4 C67 0.1U/10V_4C67 0.1U/10V_4 C60 1U/6.3V_4C60 1U/6.3V_4 C89 1U/6.3V_4C89 1U/6.3V_4 C289 4.7U/10V/8C289 4.7U/10V/8

C71 1U/6.3V_4C71 1U/6.3V_4 C68 1U/6.3V_4C68 1U/6.3V_4 C277 4.7U/10V/8C277 4.7U/10V/8

D30 1SS355D30 1SS355

21

R270 100/F_4R270 100/F_4

D31 1SS355D31 1SS355

21

R312 10/F_4R312 10/F_4

R109 *0/short_6R109 *0/short_6

C97

4.7U/10V/8

VCCRTC

R341 *0/short_6R341 *0/short_6

R319 *0/short_6R319 *0/short_6

+3V +5V

+3V_S5 +5V_S5

+1.5V

+1.05V

+1.5V

L26 *0/short_6L26 *0/short_6

C283

C283 *4.7u/6.3V_6

*4.7u/6.3V_6

12

+1.5V

Tiger Point

VCC3_3_1 VCC3_3_2 VCC3_3_3 VCC3_3_4 VCC3_3_5 VCC3_3_6

VCCSUS3_3_1 VCCSUS3_3_2 VCCSUS3_3_3 VCCSUS3_3_4

5

H25 AD13 F10 G10 R10 T9

F18 N4 K7 F1

C90 1U/6.3V_4C90 1U/6.3V_4 C48 1U/6.3V_4C48 1U/6.3V_4 C70 1U/6.3V_4C70 1U/6.3V_4 C73 0.1U/10V_4C73 0.1U/10V_4 C47 0.1U/10V_4C47 0.1U/10V_4

RVCC3_VCCSUS3

C261 1U/6.3V_4C261 1U/6.3V_4 C51 1U/6.3V_4C51 1U/6.3V_4 C260 0.1U/10V_4C260 0.1U/10V_4

0.216A

0.092A

1.Level 1 Environment-related Substances Should NEVER be Used.

2.Purchase ink, paint, wire rods, and Molding resins only from the business Partners that Sony approves as Green Partners.

VCC3_VCC3

R105 *0/short_6R105 *0/short_6

R311 *0/short_6R311 *0/short_6

1

+3V

+3V_S5

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Friday, March 11, 2011

Date: Sheet of

Friday, March 11, 2011

Date: Sheet of

Friday, March 11, 2011

PROJECT :

TigerPoint Power

ZE6

3512

1B

1

13

U1LB

TGP

U20F

A A

Tiger Point

VSS01 VSS02 VSS03 VSS04 VSS05 VSS06 VSS07 VSS08 VSS09 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56

VSS57 VSS58 VSS59

RSVD32

A1 A25 B6 B10 B16 B20 B24 E18 F16 G4 G8 H1 H4 H5 K4 K8 K11 K19 K20 L4 M7 M11 N3 N12 N13 N14 N23 P11 P13 P19 R14 R22 T2 T22 V1 V7 V8 V19 V22 V25 W12 W22 Y2 Y24 AB4 AB6 AB7 AB8 AC8 AD2 AD10 AD20 AD24 AE1 AE10 AE25

G24 AE13 F2

AE16

1.Level 1 Environment-related Substances Should NEVER be Used.

2.Purchase ink, paint, wire rods, and Molding resins only from the business Partners that Sony approves as Green Partners.

1

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Friday, March 11, 2011

Date: Sheet of

Friday, March 11, 2011

Date: Sheet of

Friday, March 11, 2011

PROJECT :

TigerPoint GND

ZE6

3513

1B

3

Q5

1

2

Q4 DTC144EUQ4DTC144EU

C38

0.1u/10V_4

0.1u/10V_4 C43 0.22u/25V_6C43 0.22u/25V_6

C49

0.1u/10V_4

5

+3VPCU

C95

0.1u/25V_6

+3V

R83

R83 10K_4

10K_4

BL#

2

<20090721(B2A)> Change Q13,Q14 from BAM700200F6 to

3

BAM70020002 (with ESD protection function)

2

Q3

2N7002KQ32N7002K

1

+5V

R86

R85

R87

150/F_4

CRTVDD5

CRT_BYP

CRT_R1 CRT_G1 CRT_B1

5

HALL SENSOR(HSR) CAMERA POWER(CCD)

R102 100K_4R102 100K_4

D6

LID#

231

MR1

MR1 PT3661-BB

PT3661-BB

D5 BAS316D5 BAS316

R82

R82 100K_4

100K_4

21

*VPORT_6D6*VPORT_6

LID# [22]

INT_LVDS_BLON [4]

EC_FPBACK# [22]

01/15 Modify

SMD1206P110TFT

C62

C62 *10p/50V_4

*10p/50V_4

U3

1

VCC_SYNC

7

VCC_DDC

8

BYP

2

VCC_VIDEO

3

VIDEO_1

4

VIDEO_2

5

VIDEO_3

6

GND

IP4772_Rout=10ohm

F1

1 2

C63

C63 *10p/50V_4

*10p/50V_4

SYNC_OUT2 SYNC_OUT1

DDC_OUT1 DDC_OUT2

CRTVDD5

L14 PBY160808T-220Y-NL14 PBY160808T-220Y-N L16 PBY160808T-220Y-NL16 PBY160808T-220Y-N L15 PBY160808T-220Y-NL15 PBY160808T-220Y-N

C64

C64 *10p/50V_4

*10p/50V_4

CRT_VSYNC1

16

CRT_HSYNC1

14

15

SYNC_IN2

13

SYNC_IN1

CRT_SCL

10

DDC_IN1

CRT_SDA

11

DDC_IN2

DDCCLK_1

9

DDCDAT_1

12

<20090724(B2A)> Change R5 from CS41002JB20 to CS44702JB15 (Follow vendor's suggestion and reduce power)

PT3661-BB: AL003661003 ; pull-up: 470K ohm

+3V

D D

R101

R101 10K_4

10K_4

DISPON

2N7002KQ52N7002K

C C

1 3

CRT(CRT)

CRT_R[4]

B B

CRT_G[4] CRT_B[4]

+3V

A A

4

LED Panel POWER SWITCH(LDS)

LCDVCC_1 LCDVCC

R257 *0/short_8R257 *0/short_8

C230

C230 *0.1u/10V_4

*0.1u/10V_4

+3V

C235

C235 1u/10V_6

1u/10V_6

6 4 3

R259

100K_4

CN10

1617

6

CRT_11

111

7

DDCDAT_1

12

2 8

13

3 9

CRTVSYNC

14

4

DDCCLK_1

15

5

CRT CONN

CRTVDD5

+3V

R46

2.2K_4

C56

C56 10p/50V_4

10p/50V_4

R45 22_4R45 22_4 R44 22_4R44 22_4

CRT_VSYNC [4] CRT_HSYNC [ 4]

CRT_SCL [4] CRT_SDA [4]

INT_LVDS_DIGON[4]

C250 0.1u/10V_4C250 0.1u/10V_4

CRT_R1 CRT_G1 CRT_B1 CRTHSYNC

C55

C50

10p/50V_4

VSYNC_R

L10 BLM18BA220SN1D_22_6L10 BLM18BA220SN1D_22_6

HSYNC_R

L9 BLM18BA220SN1D_22_6L9 BLM18BA220SN1D_22_6

CRT_SCL

R53 2.2K_4R53 2.2K_4 R32 *0/short_4R32 *0/short_4R42

CRT_SDA

4

10

3

+3V

Irush=1.5A

12

C232

C239

0.1u/10V_4

U16

IN IN ON/OFF

IC(5P) G5243AT11U

CRTVSYNC CRTHSYNC

R42

2.2K_4

2.2K_4R58 2.2K_4R 58 2.2K_4

C232

C233

10u/10V_8

33p/50V_4

LCDVCC_1

1

OUT

2

GND

5

GND

T7T7

CRTVDD5

C249 *10p/50V_4C249 *10p/50V_4 R40 *0/short_4R40 *0/short_4

C20 *33p/50V_4C20 *33p/50V_4

12

C21 *33p/50V_4C21 *33p/50V_4

12

DDCCLK_1

C31 *10p/50V_4C31 *10p/50V_4

DDCDAT_1

C27 *10p/50V_4C27 *10p/50V_4

3

CRTVSYNC CRTHSYNC

LED Panel(LDS)

INT_TXLOUTN0[4]

INT_TXLOUTP0[4]

INT_TXLOUTN1[4]

INT_TXLOUTP1[4]

INT_TXLOUTN2[4]

INT_TXLOUTP2[4]

INT_TXLCLKN[4] INT_TXLCLKP[4]

R260 *0/short_8R260 *0/short_8

2

CCD_POWER

C242 4.7U/10V/8

C242 4.7U/10V/8 C245 1000p/50V_4C245 1000p/50V_4 C236 *0.1u/10V_4C236 *0.1u/10V_4

+5V

R33 *0/short_4R33 *0/short_4

R35 *0/short_4R35 *0/short_4F1

R39 *0/short_4R39 *0/short_4

R41 *0/short_4R41 *0/short_4

R34 *0/short_4R34 *0/short_4

R37 *0/short_4R37 *0/short_4

R38 *0/short_4R38 *0/short_4

2

CCD_POWER

+

R385 0_8R385 0_8

reserve for IVO panel

INT_LVDS_PWM[4]

CONTRAST[22]

INT_TXLOUTN0_L INT_TXLOUTP0_L

INT_TXLOUTN1_L INT_TXLOUTP1_L

INT_TXLOUTN2_L INT_TXLOUTP2_L

INT_TXLCLKN_L INT_TXLCLKP_L

0.15A

VIN

C325

*4.7U/25V_8

R48 *0/short_J_4R48 *0/short_J_4 R43 *0/J_4R43 *0/J_4

C25 *3300P/50V_4C25 *3300P/50V_4

1

R269 *0/short_8R269 *0/short_8

C324

C324 *0.1U/50V_6

*0.1U/50V_6

V_BLIGHT

C248

C247

4.7U/25V_8

0.1U/50V_6

LCDVCC

+3V

CCD_POWER

USBP2-_CCD USBP2+_CCD

DISPON LCD_VADJ

INT_TXLOUTN2_L INT_TXLOUTP2_L

INT_TXLOUTN1_L INT_TXLOUTP1_L

INT_TXLOUTN0_L INT_TXLOUTP0_L

INT_TXLCLKN_L INT_TXLCLKP_L

LVDS_CLK[4] LVDS_DATA[4]

USBP2+[8] USBP2-[8]

Size Document Number Rev

Date: Sheet of

LVDS_CLK LVDS_DATA

R384 *0_8R384 *0_8

LCDVCC

Quanta Computer Inc.

PROJECT :

CRT/LVDS

LCDVCC LCDVCC

R31 *0/short_4R31 *0/short_4

1

ZE6

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

14 35Friday, March 11, 2011

CN1

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

LCD CONN

USBP2+_CCD

USBP2-_CCD

31

32

1B

5

TOUCH PAD (TPD)

CN3

1

TP_R#

2

TP_L#

3

8

TP_CONN

3 4 5 6

4 567

D D

TP switch

TPDATA_CN TPCLK_CN

+5V_TP

10P/50V_4

SW2

TP_L# TP_R#

1 2

12

D36

D36 *14V/38V/100P_4

*14V/38V/100P_4

C29

<EMI>

L25 0.4A/120o hm_6L25 0.4A/120 ohm_6 L24 0.4A/120o hm_6L24 0.4A/120 ohm_6

CX08T121000:0.4A/120ohm_6 CX121T04000:0.4A/120ohm_6

C28

10P/50V_4

3 4 5 6

TP switch

4

+5V_TP

4.7K/J_4

R262

R261

TPDATA [22] TPCLK [22]

SW3

1 2

12

D35

D35 *14V/38V/100P_4

*14V/38V/100P_4

3mA

+5V_TP

<EMI>

L12 3A/120o hm_8L12 3A/120oh m_8

C30

C30 .1U/10V_4

.1U/10V_4

3

CX121T30001:3A/120ohm_8

BLUETOOTH(BTM)

+5V

BT_POWERON#[20,22]

2

BT@AO3413

3

1

+3V

R169

BT@10K_4

Q14

2

C156

*BT@1000p/50V_4

+

C160

BT@0.22u/25V_6

BT_POWER

C159

C159 BT@1000p/50V_4

BT@1000p/50V_4

1

CN6

USBP6+[8] USBP6-[8]

T22T22

BT_LED

456 3 2

7

1

BT@CONN

KEYBOARD (KBC)

C C

<20100303(C3A)> 20110117 : add CP1~CP6 for EMI issue

CN2

B B

KB CONN

MX7

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

25 26

MX7 [22]

MX6

MX6 [22]

MX5

MX5 [22]

MY0

MY0 [22]

MY1

MY1 [22]

MY2

MY2 [22]

MX4

MX4 [22]

MY3

MY3 [22]

MY4

MY4 [22]

MY5

MY5 [22]

MY6

MY6 [22]

MY7

MY7 [22]

MY8

MY8 [22]

MX3

MX3 [22]

MY9

MY9 [22]

MX2

MX2 [22]

MX1

MX1 [22]

MY10

MY10 [22]

MY11

MY11 [22]

MX0

MX0 [22]

MY12

MY12 [22]

MY13

MY13 [22]

MY14

MY14 [22]

MY15

MY15 [22]

<EMI>

MX7 MX6 MX5 MY0 MY1 MY2 MX4 MY3 MY4 MY5 MY6 MY7 MY8 MX3 MY9 MX2 MX1 MY10 MY11 MX0 MY12 MY13 MY14 MY15

7 8 5 3 1 7 8 5 3 1 7 8 5 3 1 7 8 5 3 1 7 8 5 3 1 7 8 5 3 1

0402 size

CP1

6

220P_8P4R

4 2

CP2

6

220P_8P4R

4 2

CP3

6

220P_8P4R

4 2

CP4

6

220P_8P4R

4 2

CP5

6

220P_8P4R

4 2

CP6

6

220P_8P4R

4 2

PWR LED

SUS LED

FULL LED

CHG LED

3G LED

WLAN LED

HDD LED

+3VPCU

+3V

+5V

LED_AMBER/BLUE

side view

LED_AMBER/BLUE

side view

LED_AMBER/BLUE

side view

LED4

*LED_BULE

side view

A A

+3V

PWR indicator

5

4

3

D15 *5.5V/25V/410P_4D15 *5.5V/25V/410P_4

LED2

LED3

LED5

3 1

LED_BLUE

1 2

R222 200/J_4R22 2 2 00/J_4

23

R223 470/J_4R22 3 4 70/J_4

1

D16 *5.5V/25V/410P_4D16 *5.5V/25V/410P_4

1 2

D17 *5.5V/25V/410P_4D17 *5.5V/25V/410P_4

1 2

R224 200/J_4R22 4 2 00/J_4

23

R225 470/J_4R22 5 4 70/J_4

1

D18 *5.5V/25V/410P_4D18 *5.5V/25V/410P_4

1 2

D20 *3G@5.5V/25V/410P_4D20 *3G@5 .5V/25V/410P_4

1 2

R228 *3G@270/J_4R228 *3G@270/J_4

23

R229 470/J_4R22 9 4 70/J_4

1

D21 *5.5V/25V/410P_4D21 *5.5V/25V/410P_4

1 2

R226 *330/J_4R226 *330/J_4

D19 *5.5V/25V/410P_4D19 *5.5V/25V/410P_4

1 2

PWR: Blue Vf: 2.55~3.15V, If=20mA SUS: Orange Vf=1.6~2.0V, If=20mA

LED1

2 1

R238 120/J_4R23 8 1 20/J_4

1

PWRLED# [22] SUSLED# [22]

BATLED0# [22] BATLED1# [22]

3G_MINI_LED# [20] WLAN_LED# [20]

2

*BSS84

*BSS84 Q18

Q18

3

PWR ButtonLED/SW (UIF)

SATALED# [9]

SW1

3 5

6

power switch

3 5

6

*DIP-TJG-533-S-V-T/R

W/O 3G: use BE0R0083Z00 W 3G: use BEB00023ZA0

<20090609(A1A)_Checklist Rev1.0> Need the buffer for LED driving capability since the IOL is 6mA only.

Size Document Number Rev

KB/BT/TP/LED/Power Connector

Date: Sheet of

NBSWON#

2 14

12

D22

D22 *5.5V/25V/410P_4

*5.5V/25V/410P_4

SW4

NBSWON#

2 14

Quanta Computer Inc.

PROJECT :

ZE6

15 35Fr iday, March 11, 2011

1

NBSWON# [22,23]

1B

Codec(ADO)

5

ADOGND

Place near codec

C134

2.2u/6.3V_6

ADOGND

37 38 39

L_SPK+

40

L_SPK-

41 42 43

R_SPK-

44

R_SPK+

45 46

EAPD#

47 48 49

+AZA_VDD

C170

0.1u/10V_4

Place next to pin 1

DMIC_DAT_L

T49T49

DMIC_CLK_L

T50T50

PD#

2.2u/6.3V_6

C133

+

2.2u/6.3V_6

36

U8

CBP

AVSS2 AVDD2 PVDD1 SPK-L+ SPK-L-

(Vista Premium Version)

PVSS1 PVSS2 SPK-RSPK-R+ PVDD2 SPDIFO2/EAPD SPDIFO PGND

DVDD11GPIO0/DMIC-DATA2GPIO1/DMIC-CLK3PD#4SDATA-OUT5BIT-CLK6DVSS27SDATA-IN8DVDD-IO9SYNC10RESET#11PCBEEP

C174

4.7U/6.3V_6

D D

+5VA

C141

C142

4.7U/6.3V_6

0.1u/10V_4

ADOGND

Place next to pin 38

C3C

R151 *0/short_6R151 *0/short_6

+5V

C149

C148

0.1u/10V_4

4.7U/6.3V_6

Place next to pin 39

C3C

+5VPVDD2

R174 *0/short_6R174 *0/short_6

+5V

C165

4.7U/6.3V_6

C C

B B

C166

0.1u/10V_4

Place next to pin 46

C167

4.7U/6.3V_6

ANALOG

Spilt by AGND

+5VPVDD1

C150

C147

0.1u/10V_4

4.7U/6.3V_6

Spilt by PGND

C168

Spilt by DGND

0.1u/10V_4

C3C

R200 *0/short_6R200 *0/short_6

+3V

0V : Power down Class D SPK amplifer

3.3V : Power up Class D SPK amplifer

Power (ADO)

Demodulation Filter

+5V

A A

L17 Place close to Codec

L17 0_8L17 0_8

5

ANALOG DIGITAL

+5VA

+

34

35

CBN

CPVEE

4

30

31

32

33

HP-OUT-L

HP-OUT-R

MIC1-VREFO-L

MIC1-VREFO-R

Mute(ADO)

4

HPR HPL

MIC1-VREFO-L

MIC1-VREFO-R

MIC2-VREFO

IN_MIC-VREFO

ADOGND

2.2U/6.3V_6

26

27

28

29

VREF

AVSS1

LDO-CAP

MIC2-VREFO

MONO-OUT

ACZ_RESET#_AUDIO

ACZ_SDIN

R185 33/J_4R185 33/J_4

C175 *22p/50V_4C175 *22p/50V_4

+5V

R184

R184 *10K_4

*10K_4

R375 0_4R375 0_4

C140 4.7U/6.3V_6C140 4.7U/6.3V_6

Place next to pin 27

C135

+

C136

*10u/6.3V_6

25

AVDD1

24

LINE1-R

23

LINE1-L

22

MIC1-R

21

MIC1-L

20 19

JDREF

18

Sense-B

17

MIC2-R

16

MIC2-L

15

LINE2-R

14

LINE2-L

13

Sense A

ANALOG

ALC271XU8ALC271X

12

DIGITAL

1.6Vrms

C181 1u/10V_6C181 1u/10V_6

D13*BAS316 D13*BAS316

D14*BAS316 D14*BAS316

D12*BAS316 D12*BAS316

C151 place near to codec

ADOGND

C137

0.1u/10V_4

Place next to pin 25

MIC1_R1 MIC1_L1

Placement near Audio Codec

R152 20K/F_4R152 20K/F_4

SENSEB MIC2_R2 MIC2_L2 LINE2_R2 LINE2_L2

SENSEA

PCBEEP dont coupling any signals if possible 8/17 separate PCBEEP to Digital from Realtek suggestion

ADOGND

ACZ_RESET#_AUDIOPD#

EAPD#

ADOGND

R155 20K/F_4R155 20K/F_4

R179 39.2K/F_4R179 39.2K/F_4 R175 20K/F_4R175 20K/F_4

BEEP_1PCBEEP_1

C193

R213

4.7K_4

100p/50V_4

ACZ_RESET#_AUDIO [11] ACZ_SYNC_AUDIO [11] ACZ_SDIN0 [11] ACZ_SDOUT_AUDIO [11]

ACZ_BITCLK_AUDIO [11]

R363 *Short_4R363 * Short_4 R136 *0_6R136 *0_6 R193 *0_6R193 *0_6 R178 *0_6R178 *0_6 R144 *0_6R144 *0_6 R97 *0_6R97 *0_6 R158 *0_6R158 *0_6 R127 *0_6R127 *0_6

R357 *0_6R357 *0_6 R132 *0_6R132 *0_6 R325 *0_6R325 *0_6 R168 *0_6R168 *0_6 R180 *0_6R180 *0_6

C292 *1000p/50V_4C292 *1000p/50V_4 C282 *1000p/50V_4C282 *1000p/50V_4

6/15:C203,R210,R98 short for EMI request

AMP_MUTE# [22]

3

+5VA

C139

C138

4.7U/6.3V_6

ADOGND

MIC2-JD#

HP_JD# MIC1_JD#

R199 47K/J_4R199 47K/J_4 R220 47K_4R220 47K_4

If either HDA device io power use +1.5V, all device IO power change to +1.5V

C173

0.1u/10V_4

R196 *0/short_6R196 *0/short_6

C183

4.7U/6.3V_6

PCBEEP [22]

SB_BEEP [11]

+AZA_VDD

C-test

Place next to pin 9

3

HEADPHONE

HPL HPR

R361 47/F_4R361 47/F_4 R359 47/F_4R359 47/F_4

COMBO MIC

12

*14V/38V/100P_4

ADOGND

COMBO MIC

HPL-1 HPR-1

R358

R358 *1K/J_4

*1K/J_4

R122

2.2K/J_4

R118

D39

22K/F_4

ADOGND

R125 22K/F_4R125 22K/F_4

System MIC

MIC1_L1

C151 4.7u/6.3V_6C151 4.7u/6.3V_6

MIC1_R1

C144 4.7u/6.3V_6C144 4.7u/6.3V_6

C105

C326

*22P-50V_4

ADOGNDADOGND

place near codec IC

Internal Analog MIC

CN4

1 2

INT_MIC

Internal Speaker

40mil for each signal

R_SPK+ R_SPK-

L_SPK+ L_SPK+_1

2

L28 *0/short_6L28 *0/short_6 L27 *0/short_6L27 *0/short_6

R360

C299

*1K/J_4

2200P/50V_4

MIC2-VREFO

R123 1K/J_4R123 1K/J_4

<20100917> Add 22k PD by FAE suggestion for discharing

C120

4.7U/10V/8

ADOGND

MIC1-VREFO-R MIC1-VREFO-L

MIC1_L2

R113 1K/F_4R113 1K/F_4

MIC1_R2

R114 1K/F_4R114 1K/F_4

MIC1_JD#

12

ADOGND

IN_MIC-VREFO

ADOGND

ADOGND ADOGND

R210 *0/short_6R210 *0/short_6 R198 *0/short_6R198 *0/short_6 R192 *0/short_6R192 *0/short_6 R176 *0/short_6R176 *0/short_6

2

ADOGND

C153 2.2U/6.3V_6C153 2.2U/6.3V_6

C155 2.2U/6.3V_6C155 2.2U/6.3V_6

2

D34

D34 *VPORT_6

*VPORT_6

12

D38

*14V/38V/100P_4

C194

*68p/50V_6

C300

C300 2200P/50V_4

2200P/50V_4

3

Q7 2SK3018Q72SK3018

1

MIC1_L3

MIC1_L3 MIC1_R3

MIC2-JD#

R356

4.7K/F_4

Near CN13

C186

*68p/50V_6

12

D8

*14V/38V/100P_4D8*14V/38V/100P_4

ADOGND ADOGND

MIC2_R2

MIC2_L2

R355

4.7K/F_4

R346 *0/short_6R346 *0/short_6 R345 *0/short_6R345 *0/short_6

R131

R131 10K_4

10K_4

R539 1K/J_4R539 1K/J_4

C104

C104 *22P-50V_4

*22P-50V_4

C177

*68p/50V_6

1

COMBO MIC HPL_SYS HPR_SYS

12

HP_JD#

D9

12

*14V/38V/100P_4D9*14V/38V/100P_4

D7

*14V/38V/100P_4D7*14V/38V/100P_4

ADOGND

MIC1_L MIC1_R

MIC1_JD#

C286

C287

C298

*470p/50V_4

*0.1u/16V_6

Normal Open Jack

ADOGND

place near codec IC

C327

C328

*22P-50V_4

ADOGND ADOGND

CN7

4 3

5

2

6

1

SPEAKER-CON

Quanta Computer Inc.

PROJECT :

AUO/AMP

1

LINE2_R2

LINE2_L2

C158 1u/10V_6C158 1u/10V_6 C161 1u/10V_6C161 1u/10V_6

R_SPK+_1 R_SPK-_1 L_SPK-_1L_SPK-

C169

*68p/50V_6

Size Document Number Rev

Date: Sheet of

Friday, March 11, 2011

Date: Sheet of

Friday, March 11, 2011

Date: Sheet of

Friday, March 11, 2011

Universal Jack

CN14

3 6 1

2 4 5

UNIVERSAL JACK

010030FR006G119ZR

CN13

3 6 1

2 4 5

UNIVERSAL JACK

010030FR006G119ZR

ZE6

3516

1A

5

USB for iPod charge (USB)

D D

USBP3-

R380 *0/J_4R380 *0/J_4

USBP3+

USBP3-

USBP3-[8]

USBP3+

USBP3+[8]

C C

R381 *0/J_4R381 *0/J_4

USBP3-

R382 0/J_4R 382 0/J_4

USBP3+

R383 0/J_4R 383 0/J_4

CHARGE_IC_O N[22]

System Status: . > Lo: AM, autodetection charger identification active. > HI: PM, pass-through mode active, DP/DM connected to TDP/TDM.

4

USBP3-_L1 USBP3+_L1

USBP3-_L2 USBP3+_L2

3

+3VPCU

R369

C317 *0.1u/10V_4C317 *0.1u/10V_4

*47K_4

USBP3-_L USBP3+_L

USBP3-_L2 USBP3+_L2

*47K_4

2 1

R368 0/J_4R368 0/J_4

R376 *0/J_4R376 *0/J_4 R377 *0/J_4R377 *0/J_4

R378 0/J_4R 378 0/J_4 R379 0/J_4R 379 0/J_4

3 5

4

U23

U23 *TC7SH08FU

*TC7SH08FU

USBP3-_R USBP3+_R

USB_BC_EN

BC_CEN

USB_CHARGE_O N[22]

B-test: have charge IC function: stuff U10,U23,R369,C179,R376,R377,R380,R381 no charge IC function : stuff R368,R378,R379,R382,R383

+5VPCU

C179 *0.1u/10V_4C179 *0.1u/10V_4

5

VCC

USBP3-_L

2

DM

USBP3+_L

3

DP

4

GND

9

USBP3-_L1 USBP3+_L1

U10

U10 *IC(8P)MAX14566 AE

*IC(8P)MAX14566 AE

1

CEN

7

TDM

6

TDP CB8EPAD

QCI P/N & Footprint

<Layout note>3528 type H=1.9mm

<Layout note> Co-lay

R177 *0/shor t_4R177 *0/sho rt_4

USBP3-_R USBP3+_R

R181 *0/shor t_4R181 *0/sho rt_4

2

G547E1P81U: Enable: high active Need infrom EC engineer modify

+5VPCU

U22

U22 G547E1P81U

G547E1P81U

2

IN1

OUT3

3

IN2

OUT2 OUT1

4

EN

1

GND

<Layout note> Close to CONN

+

C313

C313 100U/6.3V_352 8

100U/6.3V_352 8

12

D11

D11 *5V/30V/0.2P_4

*5V/30V/0.2P_4

OC#

C314

1u/6.3V_4

5VUSB_1

8 7 6

5

5VUSB_1

2A

C307

C307 .1U/10V_4

.1U/10V_4

12

D10

D10 *5V/30V/0.2P_4

*5V/30V/0.2P_4

USBP3-_CN USBP3+_CN

CN19

1

VDD

2

D-

3

D+

4

GND1

USB_CONN

<20100128(B2A)> Change CN14,16,17(USB CONN) from DFHS04FR201 to DFHS04FR362.

1

USBOC#L [8,22]

Left

GND6 GND5

GND7 GND8

17

6 5

7 8

USB(USB)

+5VPCU

C276

*10K_4

C276

4.7u/10V_6

R318

USB_EN#

U19

U19 IC(8P)G547E2P8 1U

IC(8P)G547E2P8 1U

2

IN1 IN23OUT2

4

EN#

1

GND

9

GND-C

2A

5VUSB_0

8

OUT3

7 6

OUT1

5

OC#

USBOC#R [8,22]

USBP1-[8] USBP1+[8]

R18 *0/short_4R18 *0/short_4

R16 *0/short_4R16 *0/short_4

USBP1-_CN USBP1+_CN

<Layout note> Close to CONN

+

C35

C35 220u/6.3V_7343

220u/6.3V_7343

12

D1 *5V/30V/0.2p_4D1*5V/30V/0.2p_4

C17

0.1u/10V_4

12

D2 *5V/30V/0.2p_4D2*5V/30V/0.2p_4

CN9

1 2 3 4

USB_CONN

VDD DD+ GND1

Right up

GND6 GND5

GND7 GND8

6 5

7 8

+3VPCU

USB_EN#[22]

B B

5VUSB_0

R70 *0/short_4R70 *0/short_4

USBP0-[8] USBP0+[8]

A A

5

4

R68 *0/short_4R68 *0/short_4

USBP0-_CN USBP0+_CN

3

<Layout note> Close to CONN

+

C16

C16 *100u/6.3V_3528

*100u/6.3V_3528

12

D3 *5V/30V/0.2p_4D3*5V/30V/0.2p_4

C269

0.1u/10V_4

12

D4 *5V/30V/0.2p_4D4*5V/30V/0.2p_4

Right down

CN12

1

VDD

2

D-

3

D+

4

GND1

USB_CONN

2

6

GND6

5

GND5

7

GND7

8

GND8

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

PROJECT :

USB on Board/LED/SW/HOLE

ZE6

17 35Friday, March 11, 2011

1

1B

LAN (LAN)

5

4

3

2

1

18

+3V_S5 +3V_LAN

R252 *0/short_6R252 *0/short_6

12

C224

C5

D D

0.1U/16V_4C50.1U/16V_4

0.1U/16V_4

C15

C243

C224 *4.7U/10V/8

*4.7U/10V/8

VDD10 EVDD10

Close To IC Close To IC Pin 13.

C228

0.1U/16V_4

C229

0.1U/16V_4

Close to IC

LAN_ACTLED#

GPOCTRL12 LAN_LINKLED#

32

31

29

28

27

26

25

RSET

VDD3

CTRL12

CKXTAL230CKXTAL1

GPOUTPIN

LEDPIN/SPICSB

EESKPIN/LED1/TCLK/SPISCK

RTL8105TA-VC-CG

HSIP9HSIN10REFCLK_P11REFCLK_N12VDDTX13HSOP14HSON

GNDTX

16

15

R265 1K/J_4R265 1K/J_4

EEDIPIN/TDI/SPISI/SDA

EEDOPIN/LED3/SPISO

EECSPIN/TCS/SCL

LANWAKEBPIN

ISOLATEBPIN

PERSTBPIN

U2

33 34 35

1 2 3 4 5 6 7 8

36 37 38 39

GND GND GND

HV MDIP0 MDIN0 MDIP1 MDIN1 NC VDD1 CLKREQBPIN

GND GND GND GND

GND40GND41GND

EVDD10 PCIE_RXP0_LAN PCIE_RXN0_LAN

25MCLKX1

25MCLKX2

RSET

42

C10 33P/50V_4C10 33P/50V_4

Y1

25MHz-LANY125MHz-LAN

2 1

C8 33P/50V_4C8 33P/50V_4

C C

CLKREQ_LAN#[2]

25MCLKX1 25MCLKX2

PU in CLK Gen.

R13 *0/short_4R13 *0/short_4

PE1RX+[8] PE1RX-[8]

+3V_LAN

TX0P TX0N TX1P

VDD10

CLKREQ_LAN#_L

R15 2.49K/F_4R15 2.49K/F_4

PE1TX+[8] PE1TX-[8]

CLK_PCIE_LANP[2]

CLK_PCIE_LANN[2]

C11 .1U/10V_4C11 .1U/10V_4 C12 .1U/10V_4C12 .1U/10V_4

C246

0.1U/16V_4

VDD1 VDD3

R255 *0/short_6R255 *0/short_6

R256 *0/short_6R256 *0/short_6

24 23 22 21

PCIE_WAKE#TX1N

20 19

ISOLATE#

18 17

12

+3V_LAN

EEDI/SDA LED3/EEDO EECS/SCL

VDD10

+3V_LAN

R268 *0/short_4R268 *0/short_4

C244

C244 *4.7U/10V/8

*4.7U/10V/8

12

C237

C237 1U/10V_4

1U/10V_4

C241

0.1U/16V_4

C238

0.1U/16V_4

T6T6

PCIE_WAKE# [11,20]

R30 1K/J_4R30 1K/J_4 R27 15K/J_4R27 15K/J_4

CTRL12

Close To IC Pin 31.

CLKREQ_LAN#_L PCIE_WAKE# EEDI/SDA EECS/SCL

+3V

PLTRST# [4,11,20,21,22,23]

+3V_LAN

R251 *10K/J_4R251 *10K/J_4 R28 *10K/J_4R28 *10K/J_4 R266 10K/J_4R266 10K/J_4 R267 10K/J_4R267 10K/J_4

Int. PU in SB

For Rural

TRANSFORMER (LAN)

B B

U13

TX0P TX0P_R

R9 0/J_4R9 0/J_4

TX0N

R8 0/J_4R8 0/J_4 R7 0/J_4R7 0/J_4

TX1P TX1N

R6 0/J_4R6 0/J_4

with ESD solution:R22,R13,R20,R26 need to use 1 ohm. without ESD solution:R22,R13,R20,R26 need to use 0 ohm.

C215

C216

*10p/50V_4

A A

TX0N_R TX1P_R TX1N_R

C214

C214 *10p/50V_4

*10p/50V_4

5

C213

C213 *10p/50V_4

*10p/50V_4

U13

1

2

3

3 445

*UCLAMP2512T.TCT

TX1N_R

TX1P_R

TX0N_R

TX0P_R

C210

0.01U/25V_4

The value should be

0.01uF-0.4uF.

8

7

6

5

8 7 6 5 4 3 2

U14

TDTD+ CT NC NC CT RDRD+1RX+

NS0014 LF_Bothhand

X-TX1N X-TX1P X-TX0N X-TX0P

X-TX1N

9

TX-

TX+

RX-

CT NC NC CT

4

10 11 12 13 14 15 16

1000P/3KV_1808

X-TX1P

TERM0

X-TX0N X-TX0P

C223

U15

1 2 3

with ESD solution: stuff R35,U3,U8,D8 without ESD solution: remove R35,U3,U8,D8

R242 *0/J_4R242 *0/J_4

R240

R240 75/F_8

75/F_8

TERM9

1

8

2

7

3

6

445

*UCLAMP2512T.TCT

R243

R243 75/F_8

75/F_8

1 2

8 7 6 5

D28

*BS3500N-C

3

RJ45 Connector (LAN)

LAN_LINKLED#

C240

C240 *0.1U/50V_8

*0.1U/50V_8

LAN_ACTLED#

C209

C209 *0.1U/50V_8

*0.1U/50V_8

2

CN8

R254 *510/J_6R254 *510/J_6

+3V_LAN

TERM9

X-TX1N

TERM9

X-TX1P X-TX0N X-TX0P

R239 *510/J_6R239 *510/J_6

+3V_LAN

11/18 change connector pin define Main:DFTJ12FR087 White LED:pin9(-),pin10(+) Amber LED:pin11(-),pin12(+)

Size Document Number Rev

LAN RTL8105TA-VC-CG

Date: Sheet of

CN8

11

Y-

12

Y+

8

NC4/3-

7

NC/3+

6

RX-/1-

5

NC2/2-

4

NC1/2+

3

RX+/1+

2

TX-/0-

1

TX+/0+

14

GND

13

GND

9

W-

10

W+

RJ45-CONN

Quanta Computer Inc.

PROJECT :

1

ZE6

18 35Friday, March 11, 2011

1B

5

D D

CN11

1

SATA_TXP0A

2

SATA_TXN0A

3 4

SATA_RXN0A

5

SATA_RXP0A

6 7

8 9 10

14

11

15

12

C C

16 17

MAIN_SATA

13

C18

C18 .1U/10V_4

.1U/10V_4

5V_SATA

C19

C19 *0.1U/10V_4

*0.1U/10V_4

4

1A

C26

4.7U/10V/8

SATA_TXP0 SATA_TXN0

SATA_RXN0 SATA_RXP0

R36 *0/short_8R36 *0/short_8

+

C22

C22 *100U/6.3V_3528

*100U/6.3V_3528

SATA_TXP0 [9] SATA_TXN0 [9]

SATA_RXN0 [9] SATA_RXP0 [9]

+5V

0.01u/16V_4C45 0.01u/16V_4C45

0.01u/16V_4C44 0.01u/16V_4C44

0.01u/16V_4C42 0.01u/16V_4C42

0.01u/16V_4C41 0.01u/16V_4C41

3

SATA_RXP0A

SATA_TXN0A

U18

U18 *CM1213-04SO

*CM1213-04SO

1

CH1

2

VN CH23CH3

2

SATA_RXN0A

6

CH4

5

VP

SATA_TXP0A

4

+5V

C265

C265 *0.1u/10V_4

*0.1u/10V_4

1

C test: unstuff C22 for Cost down

B B

A A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

SATA-HDD

ZE6

19 35Friday, March 11, 2011

1

1B

5

Mini Card(MNC)

BT_POWERON #[15,22]

PLTRST#

PCLK_DEBUG[2 ]

D D

PCIE_WAKE#[11,18]

+3V_Mini1_VDD

C C

CLKREQ_WL AN#[2]

3

PE2TX+[8] PE2TX-[8]

PE2RX+[8] PE2RX-[8]

PE2CLK+[2] PE2CLK-[2]

2

Q20

*2N7002E

*2N7002E R373 *10K_ 4R3 73 *10K_4

1

R372 *0/J_4R372 *0/J _4 R371 *0_4R371 * 0_4

R370 *0_4R370 * 0_4

CLKREQ_WL AN#

MINI1_WAKE#

+3V_Mini1_VDD

CN20

51

Reserved

49

Reserved

47

Reserved

45

Reserved

43

GND

41

+3.3Vaux

39

+3.3Vaux

37

GND

35

GND

33

PETp0

31

PETn0

29

GND

27

GND

25

PERp0

23

PERn0

21

GND

19

UIM_C4

17

UIM_C8

15

GND

13

REFCLK+

11

REFCLK-

9

GND

7

CLKREQ#

5

Reserved

3

Reserved

1

WAKE#

MINI-CARD1

Mini Card 2 / GPS(MNC)

+3V_Mini2_VDD

CN17

51

Reserved

49

Reserved

47

3G_WAKE_R

T47T47

PE4TX+[8] PE4TX-[8]

PE4RX+[8]

B B

PE4RX-[8]

PE4CLK+[2] PE4CLK-[2]

T48T48

T23T23

CLKREQ_3G#

3G_WAKE_2_ R

Reserved

45

Reserved

43

GND

41

+3.3Vaux

39

+3.3Vaux

37

GND

35

GND

33

PETp0

31

PETn0

29

GND

27

GND

25

PERp0

23

PERn0

21

GND

19

UIM_C4

17

UIM_C8

15

GND

13

REFCLK+

11

REFCLK-

9

GND

7

CLKREQ#

5

Reserved

3

Reserved

1

WAKE#

*3G@MINI-CARD 2

SIM

UIM_CLK

USBP4-_R

A A

USBP4+[8] USBP4-[8]

R14 *3G@0_4R14 *3G@0 _4

R11 *3G@0_4R11 *3G@0 _4

5

USBP4+_R USBP4-_R

USBP4+_R

53

LED_WPAN# LED_WLAN#

LED_WW AN#

USB_D+ USB_D-

SMB_DATA

SMB_CLK

+3.3Vaux

PERST#

W_DISABLE#

UIM_VPP

UIM_RESET

UIM_CLK

UIM_DATA

UIM_PWR

GND54GND

LED_WPAN# LED_WLAN#

LED_WW AN#

USB_D+ USB_D-

SMB_DATA

SMB_CLK

+3.3Vaux

PERST#

W_DISABLE#

UIM_VPP UIM_RST UIM_CLK

UIM_DATA

UIM_PWR

GND54GND

6 8

9

10

4

+3V_Mini1_VDD

52

+3.3V

50

GND

48

+1.5V

46 44 42 40

GND

38 36 34

GND

32 30 28

+1.5V

26

GND

24 22 20 18

GND

16 14 12 10 8 6

+1.5V

4

GND

2

+3.3V

+3V_Mini2_VDD

52

+3.3V

50

GND

48

+1.5V

46 44 42 40

GND

38 36 34

GND

32 30 28

+1.5V

26

GND

24 22 20 18

GND

16 14 12 10 8 6

+1.5V

4

GND

2

+3.3V

JSIM1

CLK(C3) D-(C8)7VCC(C1) D+(C4) CT CD

*3G@SIM-Conn

13

4

+1.5V_Mini2_VDD

GND(C5)

VPP(C6) RST(C2)

DATA(C7)

GND14GND12GND11GND

+1.5V_Mini1_VDD

+3V_Mini1_VDD

R367

4.7K/F_4

WLAN_LED# _R

R366 *0/short_4R366 *0/short_4

WL_SMDATA WL_SMCLK

R365 *0/short_4R365 *0/short_4

RF_EN

3G sku: stuff R362, Q12, don't stuff R386 W/O 3G sku: don't stuff R362,Q12, stuff R386

WLAN_LED# _R 3G_MINI_LED#

USBP5+_R USBP5-_R

3G_SMDATA 3G_SMCLK

PLTRST#_1

R364 *3G@0_4R364 *3G@0_4

UIM_VPP UIM_RST UIM_CLK UIM_DATA UIM_PWR

USBP7+ [8] USBP7- [8]

RF_EN [22]

LPCFRAME# [11,22]

LPCAD3 [1 1,22] LPCAD2 [1 1,22] LPCAD1 [1 1,22] LPCAD0 [1 1,22]

3G_EN [22]

USBP5+_R USBP5-_R

1

R386 WL AN@0_4R386 W LAN@0_4

PLTRST#PL TRST#_2

+3V_Mini2_VDD

R362

R362 *3G@100K/F_4

*3G@100K/F_4

PLTRST#

Max: 7.5mA (Option)

1

UIM_PWR

2

UIM_VPP

3

UIM_RST

4

UIM_DATA

5

UIM_PWR

UIM_DATA

UIM_CLK

UIM_RST

UIM_VPP

3

+3V

R159 *0/short_4R159 *0/short_ 4

2

3

Q12

Q12 *3G@2N7002K

*3G@2N7002K

PLTRST# [4,11,18,21,22 ,23]

3G_MINI_LED# [15]

R145 *3G@0 _4R14 5 *3G@0_4

R150 *3G@0 _4R15 0 *3G@0_4

C227 *3G@27p/50 V_4C227 *3G@27p/50V_4

C221 *3G@10p/50 V_4C221 *3G@10p/50V_4

C231 *3G@10p/50 V_4C231 *3G@10p/50V_4

C222 *3G@27p/50 V_4C222 *3G@27p/50V_4 C2 26

C219 *3G@33p/50 V_4C219 *3G@33p/50V_4

3

3G_MINI_LED#RF_LED_ON

WLAN_LED# [15]

+3VSUS

+1.5V

+3VSUS

+1.5V

R172 *0_8R172 *0_ 8

R143 *3 G@0_8R143 *3G@0_8

+3V

R173 *3 G@0_8R173 *3G@0_8

R134 *3G@0 _8R134 *3G@0_8

USBP5+ [8] USBP5- [8]

UIM_RST

UIM_CLK

UIM_PWR

R170 *0/shor t_8R170 *0/short_8

+1.5V_Mini1_VDD

+3V_Mini2_VDD

+1.5V_Mini2_VDD

ESD1

1

CH1

CH4

2

VP

VN CH23CH3

*3G@CM1293- 04SO

C225

C225 *3G@1u/10V_6

*3G@1u/10V_6

1 2

2

0.75A

+3V_Mini1_VDD

C322

C321

*10u/10V_8

0.1u/10V_4

0.5A

C310

C311

*1000p/50V_4

*0.1u/10V_4

1.1A

C143

C302

*3G@4.7u/10V_8

*3G@0.1u/10V_4

0.5A

C318

C304

*3G@0.1u/10V_4

*3G@1000p/50V_4

+3V

UIM_VPP

6 5

UIM_DATA

4

<20090604(A1A)_Qualcomm design guide> Place 0.1uF near connector's VCC pin

C226 *3G@0.1u/10V_4

*3G@0.1u/10V_4

2

C308

0.1u/10V_4

C164

C164 *10u/10V_8

*10u/10V_8

C303

C303 *3G@0.1u/10V_4

*3G@0.1u/10V_4

1

C309

C312

0.1u/10V_4

0.1u/10V_4R171 *0_8R171 *0_ 8

SMBDT1[2 ,3]

SMBCK1[2,3]

C305

C319

*3G@0.1u/10V_4

PDAT_SMB[2,11]

PCLK_SMB[2,11]

Size Document Number Rev

Date: Sheet of

+3V_Mini1_VDD

Q19

2

*2N7002E

3

R237 *0/shor t_4R237 *0/sho rt_4

+3V_Mini1_VDD

Q17

2

*2N7002E

3

R227 *0/shor t_4R227 *0/sho rt_4

12

C301

C320

*3G@10p/50V_4

*3G@0.47u/6.3V_4

+3V_Mini2_VDD

Q11

*3G@10K_4

2

*3G@2N7002E

PDAT_SMB

3

1

R156 *3G@0_4R156 *3G@0_4

+3V_Mini2_VDD

Q13

2

*3G@2N7002E

PCLK_SMB 3G_SM CLK

3

1

R167 *3G@0 _4R16 7 *3G@0_4

Quanta Computer Inc.

PROJECT :

Mini-Card/WL/3G/SIM

1

+3V_Mini2_VDD

R154

4

3

2

1

R166

R166 *3G@10K_4

*3G@10K_4

3G_SMDATA

ZE6

20 3 5Friday, March 11, 2011

RN1

RN1 *4.7K_4P2R

*4.7K_4P2R

WL_SMDATA

WL_SMCLK

20

1B

5

RTS5209

PLTRST#[4, 11,18,20,22,2 3]

D D

CLKREQ_CARD#[2]

Zdiff = 100 ohm

C C

Zdiff = 100 ohm

PE3TX+[8]

PE3TX-[8] CLK_CARDREADER[2] CLK_CARDREADER#[2]

PE3RX+[8]

PE3RX-[8]

R230 *0/short_6R2 30 *0 /short_6

+3V

C204

4.7U/10V/8

C197 4.7U/6.3 V_6XC197 4.7U/6.3V_6X C198 0.1U/10 V_4XC198 0 .1U/10V_4X C199 0.1U/10 V_4XC199 0 .1U/10V_4X

C200 0.1U/10 V_4XC200 0 .1U/10V_4X

C201

0.1U/10V_4X

AV12 PCIE_RXP2_R PCIE_RXN2_R

GND

DV12

VCC_XD

+3V3_IN

TP8TP8

4

C180 0.1U/10 V_4XC180 0 .1U/10V_4X

R194 6.2K/F_4R1 94 6.2K/F_4

U11

1

HSIP

2

HSIN

3

REFCLKP

4

REFCLKN

5

AV12

6

HSOP

7

HSON

8

GND

9

DV12

10

Card1_3V3

11

3V3_IN

12

Card2_3V3

+3V3_IN

R195

R195 *100K_4

*100K_4

C184

C184 *1U/6.3V_4X

*1U/6.3V_4X

+3V3_IN

CARDREF

48

RREF

TP6TP6

TP5TP5

EEDO

EECS

CLKREQ_CARD#

PLTRST#

43

44

45

46

47

EECS

EEDO

3V3_IN

PERST#

CLK_REQ#

RTS5209-GR

3

for EMI issue: change R232,R2 33,R234, R235,R236,R231 ,R211 to 33 ohm .

R232 33/J_4R232 33/J_4 R233 33/J_4R233 33/J_4 R234 33/J_4R234 33/J_4

SD_CMD

R235 33/J_4R235 33/J_4

SD_D3 SD_D3_R

R236 33/J_4R236 33/J_4

SD_D2

R231 33/J_4R231 33/J_4

TP7TP7

XD_D6

EESK

SD_CD#

MS_INS#

39

40

41

42

EESK

SD_CD#

MS_INS#

GPIO/EEDI

R221 *0/shor t_4R221 *0/shor t_4

XD_D6

SD_WP/XD_D7

38

SP1437SP15

SP13 SP12 SP11 SP10

SP9 SP8 SP7 SP6 SP5

DV12_S

GND

SD_D2

MS_CLK

add C196 for E MI.

MS_D7/XD_D5

36

MS_D3/XD_D4

35

MS_D6/XD_D3

34

MS_D2/XD_D2

33

MS_D0/XD_D1

32

MS_D4/XD_D0

31

MS_D1/XD_WP#

30

MS_D5/XD_ALE

29

MS_BS/XD_CLE

28

DV12_S

27

GND

26

SD_D2

25

C196

10P/50V_4

MS_CLK

C203 4.7U/6.3 V_6XC203 4.7U/6.3V_6X

C202 0.1U/10 V_4XC202 0 .1U/10V_4X

R211 33/J_4R211 33/J_4

VCC_XD

2

SD_CD# SD_WP/XD_D7 SD_D1_RSD_D1 SD_D0_RSD_D0 SD_CLK_RSD_CLK SD_CMD_R

SD_D2_R SD_D7/XD_RDY SD_D6/XD_RE# SD_D5/XD_CE# SD_D4/XD_WE#

MS_BS/XD_CLE MS_D1/XD_WP# MS_D0/XD_D1 MS_D2/XD_D2 MS_INS# MS_D3/XD_D4 MS_CLK_R

C315

0.1u/10V_4

C306

0.1u/10V_4

VCC_XD

CN18

13

SD-VCC

1

SD-CD-SW

2

SD-WP-SW

3

SD-DAT1

4

SD-DAT0

10

SD-CLK

19

SD-CMD

23

SD-DATA3

25

SD-DAT2

5

MMC-DATA7

8

MMC-DATA6

17

MMC-DATA5

21

MMC-DATA4

7

SD-GND1

15

SD-GND2

26

SD-WP-GND

27

SD-CD-GND

22

MS-VCC

9

MS-BS

11

MS-DATA1

12

MS-DATA0

14

MS-DATA2

16

MS-INS

18

MS-DATA3

20

MS-SCLK

6

MS-GND1

24

MS-GND2

CM7R-052-H-D

12/06 change c onnector pin de fine and footpri nt Main:DFHS44FR0 15

C208

C316

4.7U/10V/8

0.1u/10V_4

XD-VCC

XD-CD XD-R/B XD-RE

XD-CE XD-CLE XD-ALE

XD-WE

XD-WP

XD-GND1 XD-GND2 XD-GND3

1

VCC_XD

45

XD_CD#

28

SD_D7/XD_RDY

29

SD_D6/XD_RE#

30

SD_D5/XD_CE#

31

MS_BS/XD_CLE

32

MS_D5/XD_ALE

33

SD_D4/XD_WE#

34

MS_D1/XD_WP#

35

MS_D4/XD_D0

37

XD-D0

MS_D0/XD_D1

38

XD-D1

MS_D2/XD_D2

39

XD-D2

MS_D6/XD_D3

40

XD-D3

MS_D3/XD_D4

41

XD-D4

MS_D7/XD_D5

42

XD-D5

XD_D6

43

XD-D6

SD_WP/XD_D7

44

XD-D7

36 46 47

AV12

L23 *PBY160808 T-601Y-N_1AL23 *PBY160808 T-601Y-N_1A

B B

A A

5

DV12

XD_CD#13DV33_1814GND15SP116SP217SP318SP419SD_D120SD_D021SD_CLK22SD_CMD23SD_D3

GND

XD_CD#

DV33_18

C205

C207

0.1U/10V_4X

*4.7U/6.3V_6X

4

24

SD_D1

SD_D0

SD_CLK

SD_CMD

SD_D7/XD_RDY

SD_D6/XD_RE#

SD_D5/XD_CE#

SD_D3

SD_D4/XD_WE#

add C206 for E MI and close to chip pin

C206

SD_CLK_R

10P/50V_4

Quanta Computer Inc.

PROJECT :

ZE6

PROJECT :

ZE6

PROJECT :

Size Document Number Rev

RTS5138

Date: Sheet of

3

2

Date: Sheet of

ZE6

21 35Friday, March 11, 2011

1

1A

5

EC (KBC)

BT_POWERON#[15,20]

C13

C13 .1U/10V_4

.1U/10V_4

MBCLK[24]

MBDATA[24] 2ND_MBCLK[4] 2ND_MBDATA[4]

TPCLK[15]

TPDATA[15]

30mil

E791AGND

C220

C220 .1U/10V_4

.1U/10V_4

LCLK_EC

MX0[15] MX1[15] MX2[15] MX3[15] MX4[15] MX5[15] MX6[15] MX7[15]

MY0[15] MY1[15] MY2[15] MY3[15] MY4[15] MY5[15] MY6[15] MY7[15] MY8[15] MY9[15] MY10[15] MY11[15] MY12[15] MY13[15] MY14[15] MY15[15]

T4T4 T5T5

R21 *0/short_4R21 *0/short_4

R3 *0/short_4R3 *0/short_4

L1 PBY160808T-250Y-N/3A/25ohm_6L1 PBY160808T-250Y-N/3A/25ohm_6

+3VPCU

R249 2.2/J_6R249 2.2/J_6

<EMI>

1 2

LCLK_EC

R4 *22/J_4R4*22/J_4

C2 *10P/50V_4C2*10P/50V_4

FOR CPU Thermal Sensor FOR VGA

D D

C C

B B

0.03A (30mils)

+3VPCU_EC

C212

C3

C14

4.7U/6.3V_6

C14

.1U/10V_4C3.1U/10V_4

.1U/10V_4

LPCFRAME#[11,20] LPCAD0[11,20] LPCAD1[11,20] LPCAD2[11,20] LPCAD3[11,20]

LCLK_EC[2]

CLKRUN#[11]

GA20[9] KBRST#[9]

EC_SCI#[10]

EC_FPBACK#[14]

AMP_MUTE#[16]

PLTRST#[4,11,18,20,21,23]

RF_EN[20] SERIRQ[9] EC_SMI#[11]

SUSCLK[11]

If PECI 3.0 access functionality is not used, connect VTT pin to GND.

4

+A3VPCU

C6

C7

4.7U/6.3V_6C64.7U/6.3V_6

.1U/10V_4C7.1U/10V_4

E791AGND

C1 4.7U/6.3V_6

.1U/10V_4C1.1U/10V_4

U1

3 126 127 128

1

2

8 121 122

29

6 124

7 123 125

9

MX0

54

MX1

55

MX2

56

MX3

57

MX4

58

MX5

59

MX6

60

MX7

61

MY0

53

MY1

52

MY2

51

MY3

50

MY4

49

MY5

48

MY6

47

MY7

43

MY8

42

MY9

41

MY10

40

MY11

39

MY12

38

MY13

37

MY14

36

MY15

35 34 33

MBCLK

70

MBDATA

69

2ND_MBCLK

67

2ND_MBDATA

68 119 120

TPCLK

72

TPDATA

71

10

11

E775_32KX1

77

12

13

NPCE791L

<Layout note> Place every 0.1uF close to every power pin

19

46

76

88

102

115

VCC1

VCC2

VCC3

VCC4

VCC5

AVCC

LFRAME LAD0 LAD1 LAD2 LAD3 LCLK

GPIO11/CLKRUN GPIO85/GA20 KBRST/GPIO86 ECSCI/GPIO54 GPIO24/LDRQ GPIO10/LPCPD LREST GPIO67/PWUR EQ SERIRQ GPIO65/SMI

KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7

KBSOUT0/JENK KBSOUT1/TCK KBSOUT2/TMS KBSOUT3/TDI KBSOUT4/JEN0 KBSOUT5/TDO KBSOUT6/RDY KBSOUT7 KBSOUT8 KBSOUT9/SDP_VIS KBSOUT10/P80_C LK KBSOUT11/P80_D AT KBSOUT12/GPIO64 KBSOUT13/GPIO63 KBSOUT14/GPIO62 KBSOUT15/GPIO61/XO R_OUT GPIO60/KBSOUT16 GPIO57/KBSOUT17

GPIO17/SCL1 GPIO22/SDA1 GPIO73/SCL2 GPIO74/SDA2 GPIO23/SCL3 GPIO31/SDA3

GPIO37/PSCLK1 GPIO35/PSDAT1 GPIO26/PSCLK2 GPIO27PSDAT2

GPIO00/32KCLKIN

VTT PECI

GND1

GND2

5

18

L3

L3 PBY160808T-250Y-N/3A/25ohm_6

PBY160808T-250Y-N/3A/25ohm_6

E791AGND

A/D

D/A

LPC

GPIO

KB

TIMER

SMB

IR

PS/2

FIU

PS/2

FIU

GND3

GND4

GND5

GND6

45

78

89

116

GPIO06/IOX_DOUT /RTS1

GPO84/IOX_SCLK/XOR TR

GPIO20/TA2/IOX_DIN_ DIO

GPIO87/CIRRXM/SIN_ CR

GPO83/SOUT_CR /TRIST

GPIO55/CLKOUT/IOX_ DIN_DIO

AGND

103

GPIO90/AD0 GPIO91/AD1 GPIO92/AD2 GPIO93/AD3

GPIO94/DA0

GPI95/DA1 GPI96/DA2

GPIO01/TB2

GPIO02 GPIO03 GPIO04 GPIO05

GPIO07 GPIO16 GPIO30

GPIO36/CTS1

GPIO41 GPIO42/SCL3B/TCK GPIO43/SDA3B/TMS

GPIO44/TDI

GPO47/SCL4

GPIO50/PSCLK3/TDO

GPIO51

GPIO52/PSDAT3/RDY

GPIO53/SDA4

GPIO70

GPIO71

GPIO72

GPIO75/SPI_SCK

GPO76/SHBM

GPIO77

GPIO81

GPO82/IOX_LDSH /TEST

GPIO97

GPIO56/TA1 GPIO14/TB1

GPIO15/A_PWM GPIO21/B_PWM GPIO13/C_PWM GPIO32/D_PWM GPIO45/E_PWM

GPIO40/F_PWM/R I1

GPIO66/G_PWM

GPIO33/H_PWM /SOUT1

GPIO34/SIN1/CIRRXL

GPIO46/CIRRXM/TR ST

F_SDI/F_SDIO1

F_SDO/F_SDIO0

F_CS0

F_SCK

VCC_POR

VCORF

44

VCORF_uR

C4 1U/6.3V_4C41U/6.3V_4

VREF

10mA

+3V_VDD_EC

4

VDD

3

R250 *0/J_6R250 *0/J_6

D26

21

BAS316

C217

.1U/10V_4

C9 .01U/16V_4C9 .01U/16V_4

E791AGND

97 98 99 100

101 105 106

64 79 95 96 108 93 94 114 109 15 80 17 20 21 24 25 26 27 28 73 74 75 82 83 84 91 110 112 107

31 117 63

32 118 62 65 22 16 81 66

113 14 23 111

86 87 90 92

30 85 104

R258 *0/short_4R258 *0/short_4

ICMNT_EC

C234 3300P/50V_4C234 3300P/50V_4

E791AGND

R24 *0/J_4R24 *0/J_4 R10 *0/J_4R10 *0/J_4

T3T3

HWPG THERM_ALERT#_1

R5 *0/J_4R5 *0/J_4

S5_ON HDMI_IN

T1T1

PWROK_EC_uR

R25 *0/short_4R25 *0/short_4 R26 *0/short_4R26 *0/short_4

RSMRST#_uR

T25T25

D37 BAS316D37 BAS316

T24T24

SPI_SDI_uR SPI_SDO_uR SPI_SDO_uR_R

R248 22/J_4R248 22/J_4

SPI_CS0#_uR

R247 22/J_4R247 22/J_4

SPI_SCK_uR SPI_SCK_uR_R ECDB_CLOCK

T2T2

VCC_POR#

R23 47K/J_4R23 47K/J_4

VREF_uR +A3VPCU

R12 *0/short_4R12 *0/short_4

+3V

<20090602(A1A)_Vendor suggest>

C218

Place 10nF-0.1uF capacitors for every AD input. And close to the AD

4.7U/6.3V_6

input.

TEMP_MBAT [24]

ICMNT [24]

ACIN [24] NBSWON# [15,23]

USBOC#R [8,17] USBOC#L [8,17] LID# [14]

CHARGE_IC_ON [17]

VRON [23,26] THERM_ALERT# [4,11]

SUSB# [11] USB_CHARGE_ON [17] D/C# [24] S5_ON [23,25,30]

SUSC# [11] ECPWROK [11,23] EC_RSMRST# [11,23]

MAINON [23,27,28,29]

3G_EN [20] DNBSWON# [11,23] USB_EN# [17]

SUSON [5,23,27,29] FAN_SIG [4]

CONTRAST [14] PCBEEP [16] PWRLED# [15] BATLED0# [15] CPUFAN# [4] SUSLED# [15]

BATLED1# [15]

+3VPCU

<20090721_FAE suggestion> Stuff 100K and close to EC side for improving power consumption

SPI_SDI_uR

R244

R244 100K/J_4

100K/J_4

2

I/O ADDRESS SETTING(KBC)

SHBM

1/13 Comfirm by vendor mail : Disabled ('1') if using FW H device on LPC. Enabled ('0') if using SPI flash for both system BI OS and EC firmware

<20090831(A1A)_EC team suggest>

1.change R7027/R7028 to 1M or 100K ohm

2.change PWR/SUS LED's power from +3VPCU to +3V_S5 or +3VSUS can reduce pull-high resistor of SUSLED#/PWRLED#

SM BUS PU(KBC)

SPI FLASH(KBC)

SPI_SDI_uR

R246 10K_4R246 10K_4

+3VPCU

1/13 Comfirm by vendor mail : If the Southbridge enables 'Long W ait Abort' by default, the flash device should be 50MHz (or faster)

HWPG

HWPG_VCCGFX[23,29]

HWPG_1.5V[5,23,27] HWPG_1.05V[23,28,29] HWPG_1.8V[29] SYS_HWPG[25]

SHBM=0: Enable shared memory with host BIOS

3G_EN

R22 10K_4R22 10K_4

BATLED0#

R17 100K/J_4R17 100K/J_4

BATLED1#

R29 100K/J_4R29 100K/J_4

R245 22_4R245 22_4

MBCLK MBDATA

2ND_MBCLK 2ND_MBDATA

R20 4.7K/J_4R20 4.7K/J_4 R19 4.7K/J_4R19 4.7K/J_4

R264 10K_4R264 10K_4 R263 10K_4R263 10K_4

U12

SPI_SDI_uR_R

2

SO

SPI_SDO_uR_R

5

SI

SPI_SCK_uR_R

6

SCK

SPI_CS0#_uR

1

CE

MX25L1606EM2I-12G

Winbond W25Q16CVSSIG AKE38ZP0N02 EON EN25F40-100HIP AKE38ZA0Q00 MXIC MX25L1606EM2I-12G AKE38FP0Z01

D27 BAS316D27 BAS316 D29 *BAS316D29 *BAS316 D23 *BAS316D23 *BAS316 D24 *BAS316D24 *BAS316 D25 *BAS316D25 *BAS316

1

+3VPCU

+3V

+3VPCU

8

VDD

R241

HOLD#

7

HOLD

3

WP

4

VSS

R1

*0/short_4R1*0/short_4

C211

3.3K_4

3.3K_4 .1u/10V_4

.1u/10V_4

+3V

R2

10K_4R210K_4

HWPG [11,23]

INTERNAL KEYBOARD STRIP SET (KBC)

A A

+3VPCU

RP2 10K/J_10P8RRP2 10K/J_10P8R

MX3

10

1

MX4 MX2

9

2

MX5

MX1

8

3

MX6

MX0

7 4

MX7

56

+3VPCU

5

4

SM BUS ARRANGEMENT TABLE

SM Bus 1

SM Bus 2

3

Battery

CPU thermal sensor

2

INTERNAL KEYBOARD STRIP SET(KBC)

10/26 UnStuff

MY0

R253 *10K_4R253 *10K_4

Size Document Number Rev

Date: Sheet of

+3VPCU

Quanta Computer Inc.

PROJECT :

WPCE781 & FLASH

ZE6

22 35Friday, March 11, 2011

1

1A

5

EMI Hole

D D

C C

B B

A A

5

4

HOLE5

2 3 4

1

8

9

*HG-C276D98P2

HOLE9

2 3 4

1

8

9

*hg-tc276bc256d98p2

HOLE7

2 3 4

1

8

9

*HG-TC276BC315D98P2

HOLE21

*3G@h-c197d63p2

1

HOLE11

HOLE11 *O-ZE6-3

*O-ZE6-3

1

4

5

2

6

3

7

4

*HG-C276D98P2

2

5

3

6

4

7

*HG-C276D98P2

2

5

3

6

4

7

*HG-TC276BC315D98P2

HOLE18

h-tc177bc295d126 p2

HOLE8

8

HOLE14

8

HOLE2

8

PAD1PAD1

1

5 6 7

9

5 6 7

9

5 6 7

9

HOLE12

2

5

3

6

4

7

1

8

9

*HG-C276D98P2

HOLE16

2

5

3

6

4

7

1

8

9

*HG-C276D98P2

HOLE3

2

5

3

6

4

7

1

8

9

*HG-TC276BC315D98P2

HOLE17

h-tc177bc295d126 p2

1

HOLE15

2 3 4

1

8

*HG-C276D98P2

HOLE4

2 3 4

1

8

*HG-C276D98P2

HOLE19

h-c197d63p2

1

HOLE1

HOLE1 *hg-c276do94x106p2

*hg-c276do94x106p2

2 3 4

8

5 6 7

9

5 6 7

9

1

9

3

2 3 4

*HG-C276D98P2

2 3 4

*HG-TC276BC315D98P2

HOLE20

*3G@h-c197d63p2

HOLE6

HOLE6 *O-ZE6-2

*O-ZE6-2

5 6 7

3

HOLE13

8

HOLE10

8

2

1

Power Sequence Connector 30pin (CPU)

5 6 7

1

9

NBSWON#[15 ,22] EC_RSMRST#[11,22]

5 6 7

1

9

1

SUSON[5,2 2,27,29] MAINON[22,27,28 ,29]

HWPG_VCCGFX[2 2,29] VRON[22,26] VR_PWRGD_CK410#[2,26]

ECPWROK[11,22]

PLTRST#[4,11 ,18,20,21,22]

NBSWON#

+3V_S5

SUSON

+1.5VSUS

+5V

+1.5V

+1.5V +1.8V

1

GND

2

NBSWON#

3

S5_ON

4

+3V_S5

5

+5V_S5

6

EC_RSMRST#

7

DNBSWON#

8

SUSON

9

+3VSUS

10

2

CN15

12

S5_ON+3V_S5

34

+5V_S5EC_RSMRST#

*30pin POWER SEQ CONN

11

HWPG_1.5V MAINON

12 13

+3V

14

+5V

15

+1.05V

16

+1.5V

17

HWPG_1.05V

18

+1.8V

19

VCCGFX

20+1.5VSU S

HWPG_VCCGFX

56 78 910 1112 1314 1516 1718 1920 2122 2324 2526 2728 2930

+5V_S5

DNBSWON# +3VSUS+1.5VSUS

+3VSUS

HWPG_1.5VMAINON +3V

+3V

+1.05V

HWPG_1.05V+1.8V VCCGFXHWPG_VCCGFX

VCCGFX

HWPGVRON VCOREVR_PW RGD_CK410#

VCORE

IMVP_PWRGDECPWROK TPT_PWROKP LTRST# PLTRST#

21

HWPG VRON

22

VCORE

23 24

VR_PWRGD_CK410#

25

IMVP_PWRGD

26

ECPWROK

27

TPT_PWROK

28

H_PWRGD

29

PLTRST#

30

RESERVE

Size Document Number Rev

Date: Sheet of

Friday, March 11, 2 011

Date: Sheet of

Friday, March 11, 2 011

Date: Sheet of

Friday, March 11, 2 011

S5_ON [22,2 5,30] DNBSWON# [11,22] HWPG_1.5V [5,22,27]

HWPG_1.05V [22,28,2 9] HWPG [11 ,22] IMVP_PWRGD [4,11,2 6]

TPT_PWROK [1 1] PLTRST# [4,11,18, 20,21,22]

Quanta Computer Inc.

PROJECT :

ZE6

PROJECT :

ZE6

PROJECT :

ZE6

HDMI(1/2)

1

1A

3523

456

PR111

*0/short_4

5

PL3

HI0805R800R-00/5A/80ohm_8

1 2

3

PC65

0.1u/50V_6

ACIN[22]

PR107 100_4PR107 100_4

TEMP_MBAT_C

PC69

47p/50V_4

PR109

PR109 100_4

100_4

5

VAVA

47p/50V_4

PR110

PR110 100_4

100_4

HI0805R800R-00/5A/80ohm_8

PC66

2200p/50V_6

+3VPCU

PR112

PR112 100K_4

100K_4

PC70

MBCLK [22]

MBDATA [22]

+3VPCU

PR2

PR2 100K/F_4

100K/F_4

PC68

0.1u/25V_4

Add ESD diode base on EC FAE suggestion

POWER_JACK

dcjk-2dc2003-000111- 3p-v

PJ1

7

D D

C C

B B

1

10

2 3 4 5 6 7 89

PJ2

bat-btj-08tc0b-8p-l-v

Batt_Conn

A A

VA1

PC64

0.1u/50V_6

PD8

PD8 SW1010CPT

SW1010CPT

HI0805R800R-00/5A/80ohm_8

PL4

HI0805R800R-00/5A/80ohm_8

PL5

PC72

PC72 100p/50V_4

100p/50V_4

PU6

PU6 *CM1293A-04SO

*CM1293A-04SO

1

CH1

CH4

2

VP

VN CH23CH3

4

PD9

SBR1045SP5-13

TEMP_MBAT [22]

MBDATA

6 5

MBCLKTEMP_MBAT

4

BAT-VMBAT+

+3VPCU

1 2

82.5K/F_4

22K/F_4

49.9/F_4

PR105

PR1

PC1

*1u/10V_4

SMAJ20A

PR5

3

PD10

88731ACSET

+3VPCU

MBDATA

MBCLK

DCIN

PC2

0.01u/25V_4

2 1

PC73

PC73 1u/10V_4

1u/10V_4

PC75

0.1u/25V_4

PC3

PC3 *0.01u/25V_4

*0.01u/25V_4

11

VDDSMB

9

SDA

10

SCL

13

ACOK

22

DCIN

2

ACIN

3

VREF

4

ICOMP

5

NC

6

VCOMP

PR104

2.21K/F_4

PC4

0.01u/25V_4

3

VA2

PC63

PR102

PR102 220K/F_6

PU7

ISL88731C

ICM

8

ICMNT

3

220K/F_6

PR101

PR101 220K/F_6

220K/F_6

PR108

PR108 10/F_6

10/F_6

PR4

4.7_6

CSIN

27

21

26

VCC

CSSN

VDDP

BOOT

UGATE

PHASE

LGATE

PGND

CSOP

CSON

VBF GND GND

NC

12

14

ICMNT [22]

1u/10V_4

ISL88731_VDDP

88731B_2

25

24

23

20

19

18

17

16

NC

15 29

ISL88731 thermal pad tie to Pin12

0.1u/50V_6

VIN_SRC

CSIP_1

PR106

10/F_6

PC67

0.1u/25V_4

CSIP

28

1

30

NC

GND33GND32GND31GND

CSSP

NC

7

1 6 2 3

PQ34

IMD2AT108

PC71

PR113

2.7_6

ISL88731_UGATE

ISL88731_PHASE

ISL88731_LGATE

CSOP

CSON

PR117

PR117 *0/short_4

*0/short_4

88731B_1

PC77

0.1u/25V_4

1 2 3

5 4

10/F_6

PQ33

PQ33 AO4427

AO4427

1u/10V_4

PD11

PD11 *RB500V-40

*RB500V-40 PC74

PC74

0.1u/50V_6

PR121

PR120

4

PC78

CSOP_1

PR114

PR114 100_4

100_4

BAT-V

8 7 6 5

1 2

PR103

PR103 *0/short_4

*0/short_4

BAT-V

2

CSIP_1 VIN_SRC

4

PQ2

AON7410

4

PQ43

AON7410

2

PR116

0.01_0612

1 2

52

3

52

3

PC6

2200p/50V_4

1

VIN

PC79

PC79 2200p/50V_4

2200p/50V_4

DMN601K-7

VIN

PC7

PC76

4.7u/25V_8

PR115

0.01_0612

PL6

1 2

PC10

2200p/50V_4

BAT-V

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

PROJECT :

CHARGER (ISL88731)

D/C# [22]

PC80

0.1u/50V_6

6.8uH_7X7X3

PR3

2.2/F_4

PC5

PC5 2200p/50V_4

2200p/50V_4

0.1u/50V_6

CSOP_1

1

1 2 3

PR6

PR6 33K_6

33K_6

2

PQ1

PC8

10u/25V_1206

1

PQ35

PQ35 AO4427

AO4427

4

10K_6

3

1

PC9

10u/25V_1206

ZE6

24 35Frid ay, March 11, 2011

30

8 7 6 5

PR7

BAT-V

PC11

0.01u/25V_4

1A

5

MAIND SUSD

TP9TP9

TP11TP11

DTC144EU

2

PQ48

VIN

+5VPCU 5 Volt +/- 5% TDC : 4.7A PEAK : 6.2A OCP : 7A Width : 180mil

+

PC130

0.1u/50V_6

1 3

5

D D

+5VPCU

C C

PC117

PC117 220u/6.3V_6X4.2

220u/6.3V_6X4.2

OCP:7A

L(ripple current) =(9-5)*5/(2.2u*0.4M*9) =2.525A

B B

Iocp=7-(2.525/2)=5.74A Vth=5.74A*14mOhm=80mV R(Ilim)=(80mV*10)/10uA ~80.323K

A A

S5_ON

MAIND [27,29] SUSD [29]

TP13TP13

TP14TP14

VIN

12

+

PC119

*100u/25V_6X5.8

PR175

15.4K/F_4

15.4K/F_4 PR178

PR179

PR179 10K/F_4

10K/F_4

PR190

PR190 1M_6

1M_6

PR195

PR195 1M_6

1M_6

PC120

4.7u/25V_8

PL10

2.2uH_7X7X3

PR177

PR177 *4.7_6

*4.7_6

PC133

PC133 *680p/50V_6

*680p/50V_6

PC137

0.1u/50V_6

+15V

PR189

PR189 22_8

22_8

+5V_S5+3V_S5

PR191

PR191 22_8

22_8

3

2

1

PQ49

PQ49 DMN601K-7

DMN601K-7

PR192

PR192 22_8

22_8

3

2

1

SYS_SHDN#

PC121

PC121 2200p/50V_6

2200p/50V_6

PQ50

PQ50 DMN601K-7

DMN601K-7

SYS_HWPG[22]

PQ44

AON7410

PQ46

AON7702

+15V_ALWP

2

+15VVIN

3

1

4

SYS_SHDN# [4,26,30]

3

Ven=7.23V

8223_VIN

16

VIN

ENC

18

PR182

80.6K/F_4

VL

8223_EN

PC127 4.7u/6.3V_6P C127 4.7u/6.3V_6

17

8

VREG5

VREG3

PU3

PU3 RT8223M

RT8223M

ENTRIP1

ENTRIP2

1

6

PR183

56.2K/F_4

+5V

+3VPCU

PR165

PR165 10_8

PR171

PR171 330K/F_4

330K/F_4

+3V_PG +5V_DH

+5V_LX

+5V_DL +5VPCU +5V_FB

PC122

0.1u/25V_4

+5V_B

1 2

PR185

PR185 *0_6

*0_6

PR187

PR187 *0/short_6

*0/short_6

13 23 21 22 20 19 24

2

PR180

PR180 *Short_4

*Short_4

PC134

0.1u/10V_4

2

10_8

EN PGOOD UGATE1 BOOT1 PHASE1 LGATE1 VOUT1 FB1

+5V_DL

+3V_DL

+5VPCU

3

PQ19

PQ19 AO3404

AO3404

1

TDC : 1.627A PEAK : 2.2A Width : 70mil

3

PR164

PR164 665K/F_4

665K/F_4

PR168

PR168 *0/short_4

*0/short_4

PR170

PR170 100K/F_4

PC128

0.1u/50V_6

PC135

0.1u/50V_6

2

100K/F_4

PC136

0.1u/50V_6

+5VPCU

3

PQ32

PQ32 AO3404

AO3404

1

TDC : 0.008A PEAK : 0.01A Width : 10mil

PR173

PR173 1/F_6

1/F_6

+5V_S5

8223_EN

PR181

PR181 100K/F_4

100K/F_4

SYS_SHDN#

52

4

3

1

52

4

3

1

2

PD12

3

CHN217

1

2

PD13

3

CHN217

1

PC138

0.1u/50V_6

VIN

PR194

PR193

*1M_6

1M_6

S5D MAIND MAIND S5D

PC139

PQ51

1000p/50V_4

DMN601K-7

4

PC123 4.7u/6.3V_6P C123 4.7u/6.3V_6

SKIPSEL TONSEL UGATE2

BOOT2

PHASE2

LGATE2

GND

15

25

2

8223REF +3VPCUVINVIN

PC124

PC124 1u/6.3V_4

1u/6.3V_4

3

REF

14 4 10 9 11 12 7

OUT2

5

FB2

+3VPCU

3

PQ26

PQ26 AO3404

AO3404

1

TDC : 1.496A PEAK : 2A Width : 60mil

PR172

PR172 *0/short_4

*0/short_4

+3V_SKIP +3V_TON

+3V_DH +3V_B +3V_LX +3V_DL +3VPCU +3V_FB

PR186

PR188

*0/short_6

+3V

PR166

PR166 *0_4

*0_4

PR174

PR174 1/F_6

1/F_6

PR169

PR169 *0_4

*0_4

2

PC125

PC125 2200p/50V_6

PR167

PR167 *0/short_4

*0/short_4

52

PQ45

PQ45 AON7410

AON7410

4

3

1

PC129

0.1u/50V_6

52

4

PQ47

3

1

AON7702

OCP:5A

L(ripple current) =(9-3.3)*3.3/(2.2u*0.5M*9) ~1.9A

Iocp=5-(1.9/2)=4.05A Vth=4.05A*14mOhm=56.7mV R(Ilim)=(56.7mV*10)/10uA ~56.7K

+3VPCU

3

1

2

PQ25

PQ25 AO3404

AO3404

TDC : 0.148A PEAK : 0.2A Width : 10mil

+3V_S5

2

2200p/50V_6

PL11

2.2uH_7X7X3

+3VPCU

PR176

PR176 *4.7_6

*4.7_6

PC132

PC132 *680p/50V_6

*680p/50V_6

SUSD

Size Document Number Rev

SYSTEM 5V/3V (RT8223M)

Date: Sheet of

1

TP15TP15

TP16TP16

VIN

PC126

4.7u/25V_8

+3VPCU

3.3Volt +/- 5% TDC : 3A PEAK : 4A OCP : 5A Width : 120mil

+3VPCU

3

2

PQ24

PQ24 AO3404

AO3404

1

Quanta Computer Inc.

PROJECT :

TP10TP10

TP12TP12

PR178

6.81K/F_4

PC131

0.1u/50V_6

PR184

PR184 10K/F_4

10K/F_4

TDC : 1.32A PEAK : 1.76A Width : 60mil

+3VSUS

ZE6

1

25 35Friday, March 11, 2011

+3VPCU

+

PC118

PC118 220u/6.3V_6X4.2

220u/6.3V_6X4.2

1A

5

4

3

2

1

12/10 : PR141 need to add after thermal final tune.

PR8 *68/F_4PR8 *68/F_4

+1.05V H_PROCHOT#[4] SYS_SHDN#[4,25,30]

D D

8796VCC

PC81

PC81 1u/10V_4

1u/10V_4

+5V

PC85

PC85 1u/10V_4

1u/10V_4

VID6[4] VID5[4] VID4[4]

C C

B B

tSW = 16.3pF x (RTON + 6.5K )

fsw=300KHz

A A

VID3[4] VID2[4] VID1[4] VID0[4]

12

*2.7K/F_4

PC84

0.1u/50V_6

0.1u/50V_6 PR126

PR126

VRON[22,23]

PR20

13K/F_4

+3V

PR22 *0/short_4PR22 *0/short_4

PR23 499/F_4PR23 499/F_4

PR125

2.7K/F_4

PWR

8796THRM8796VCC

8796THRM

PR140

*100K/F_4_NTC

VIN

PR137 1K/J_4PR137 1K/J_4

PR138 10K/F_4PR138 10K/F_4

ICH_DPRSTP#[4,11]

PM_DPRSLPVR[4,11]

IMVP_PWRGD[4,11,23]

VR_PWRGD_CK410#[2,23]

20

D6

19

D5

18

D4

17

D3

16

D2

15

D1

14

D0

6

DPRSTP

7

DPRSLPVR

1

PWR

8

THRM

PR130

PR130 200K/F_4

200K/F_4

PR131 *0/short_4PR131 *0/short_4 PR132 *0/short_4PR132 *0/short_4

PR133 *0/short_4PR133 *0/short_4

PR11

10/F_6

23

VDD

PR9 *0_4PR9 *0_4 PR141 *0_4PR14 1 *0_4

PR118

60.4K/F_4

PR119

31

30

ILIM

VCC

TON

SHDN

PWRGD

9

11

10

C187

+3V

*.1U/10V_4

12.7K/F_4

29

28

TIME

VRHOT

PU8

MAX8796GTJ+

V3P3

CLKEN

13

12

*470p/50V_4

PR134

PR134 *0/short_4

*0/short_4

PC91

+5V

27

PGDIN

CCV

32

PR12

PR12 10K/F_4

10K/F_4

PC83

100p/50V_4

24

BST

PGND

21

1 2

PR123

2.2_6

26

DH

PC82

0.22u/25V_6

25

LX

DL

CSP

CSN

FB

GNDS

AGND

33

PR129 *0/short_8PR129 *0/short_8

PR146 *0/short_8PR146 *0/short_8

22

PC89 1000p/50V_4PC89 1000p/50V_4

5

12

PC87

0.22u/6.3V_4

4

PC88 1000p/50V_4PC88 1000p/50V_4

3 2

PR19

4.02K/F_4

PC12 1000p/50V_4PC12 1000p/50V_4

FB_SRC GNDS

PC86 1000p/50V_4PC86 1000p/50V_4

FB_SRC GNDS

Connect to output cap GND

8796DH

8796LX 8796DL

PR21 10/F_4PR21 10/F_4 PR14 10/F_4PR14 10/F_4

PR13 *10/F_4PR13 *10/F_4 PR10 *10/F_4PR10 *10/F_4

PC13

2200p/50V_6

PQ36

PQ36 AOL1448

AOL1448

5

4

213

PQ37

PQ37 AOL1718

AOL1718

5

4

PC16 2200p/50V_4PC16 2200p/50V_4

213

*680p/50V_6

Load-line=-5.9mV/A for Pine Trial-M

VCC_SENSE [6] VSS_SENSE [6]

VCORE

PR24

PR24 *4.7_6

*4.7_6

PC15

12

PC14

4.7u/25V_8

8796CSP

8796CSN

PR18

1.8K/F_4

PR16

2.74K/F_4

12

+

PC90

100u/25V_6X5.8

DCR=3m

PL7

PL7 1uH

1uH

10K_6_NTC

PR17

PR17 *0/short_4

*0/short_4 PR122

PR122

PR15

PR15 10K/F_4

10K/F_4

TP1TP1TP2TP2

VIN

+3VPCU

+

PC92

PC92 330u/2V_7343

330u/2V_7343

ESR=9m

TP3TP3

+

PC17

PC17 330u/2V_7343

330u/2V_7343

PR136 *0_8PR136 *0_8

PR25 *0_8PR25 *0_8

PR139 *0_8PR139 *0_8

PR135 *0_8PR135 *0_8

PR128 *0_8PR128 *0_8

PR127 *0_8PR127 *0_8

PR124 *0_8PR124 *0_8

VID 1.0V

TP4TP4

VID0

VID1

VID2

VID3

VID4

VID5

VID6

OCP:14A

VCORE

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

VCore( IMAX8796GTJ+)

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

ZE6

26 35Friday, March 11, 2011

1

1A

5

[PWM]

PC26

PC26 10u/6.3V_8

+5V_S5

10u/6.3V_8

24

25

VTT

GND

1

VTTGND

2

VTTSNS

3

GND

4

MODE

5

VTTREF

6

COMP

NC7VDDQSNS8VDDQSET9S310S511NC

30mil

0.75A

D D

C C

+0.75V_DDR_VTT

15mil

0.375A

+SMDDR_VREF

10u/6.3V_8

PR41

PR41 *0/short_6

*0/short_6

PR40

PR40 *0/short_6

*0/short_6

PC23

PC22

10u/6.3V_8

+1.5VSUS

PC21

0.033u/50V_6

4

3

2

1

33

PC27

PR45

0.1u/50V_6

*0/short_6

21

DRVH

S5_1.8V

S3_1.8V

PR34

PR34 *0_4

*0_4

*0/short_6

19LL20

DRVL

18

PGND

17

CS_GND

16

CS

15

V5IN

14

V5FILT

13

PGOOD

12

PR30

PR30 620K/F_4

620K/F_4

1 2

PR27 *0/short_4PR27 *0/short_4

1 2

PR28 *0/short_4PR28 *0/short_4

+5V_S5

8207A_DH 8207A_LX 8207A_DL

PR36

PR36 13K/F_4

13K/F_4

PR33

5.1/F_6

PC19

PC19 1u/10V_4

1u/10V_4

PR29

PR29 100K/F_4

100K/F_4

VIN

+3V_S5

HWPG_1.5V [5,22,23]

(For RT8207A 400KHZ) close to PC2016

SUSON [5,22,23,29]

MAINON [22,23,28,29]

PC20

PC20 1u/10V_4

1u/10V_4

+5V_S5

52

4

PQ39

PQ39 AON7410

AON7410

3

1

52

4

PQ38

PQ38 AON7702

AON7702

3

1

PR48

2.2/F_4

PC29

PC29 1000p/50V_4

1000p/50V_4

PL8

2.2uH

add for EMI

PC96

0.1uF/50V_6

PC101

PC101 330u/2V_7343

330u/2V_7343

+1.5VSUS

+

PC94

2200p/50V_6

PC35

PC35 10u/6.3V_8

10u/6.3V_8

PC28

4.7u/25V_8

PC32

PC32 1000pF/50V_4

1000pF/50V_4

add for EMIadd for EMI

PC93

4.7u/25V_8

4.7u/25V_8PC22

+1.5VSUS

1.5 Volt +/- 5% TDC : 7A PEAK : 9A OCP : 10A Width : 280mil

VIN

+1.5VSUS

8207A_VBST

22

23

VBST

VLDOIN

PU1

PU1 RT8207L

RT8207L

PR32

PC18

10K/F_4

*33p/50V_6

B B

A A

5

*33p/50V_6

10K/F_4

8207A_SET

PR31

PR31 10K/F_4

10K/F_4

Vout = (PR150/PR149) X 0.75 + 0.75

PR26 *0_4PR26 *0_4

4

S3_1.8VS5_1.8V

MAIND[25,2 9]

MAIND

+1.5VSUS

3

2

1

TDC : 2A PEAK : 2.7A Width : 80mil

3

PQ27

PQ27 AO3404

AO3404

+1.5V

L(ripple current) =(19-1.5)*1.5/(2.2u*400k*9) ~1.57A

Vtrip= (10-1.57/2)*14mohm=0.129V RILIM=Vtrip/10uA~12.901Kohm

S3 S5

S0

1 1

S3

S4/S5

2

0 0

10

Size Document Number Rev

Date: Sheet of

ON ON ON

ON ON

OFF

Quanta Computer Inc.

PROJECT :

DDR 1.5V(TPS51116)

VTTREF+1.5VSUS

OFF

OFFOFF

ZE6

27 35Friday, March 11, 2011

1

1A

5

4

3

2

1

34

+1.05V

VIN

1A

3

PR93

PR93 *0/short_6

*0/short_6

PC61

PC61 1u/10V_4

1u/10V_4

R1

+5V_S5

R2

PD7

PD7 RB500V-40

RB500V-40

PC62

0.1u/50V_6

UGATE-1.05V PHASE-1.05V

PR95

5.62K/F_4

LGATE-1.05V

PR89

4.02K/F_4

PR88

PR88 10K/F_4

10K/F_4

12

PC58

4.7u/10V_6

4

3

4

3

VOUT=(1+R1/R2)*0.75

PC54

PC54 *33p/50V_6

*33p/50V_6

PR86

PR86 *0/short_6

*0/short_6

PR85

PR85 *0/short_6

*0/short_6

PC116

PL9

330u/2.5V_6X4.2

4.7u/25V_8

PC111

+

PC116

PC112

PC112 *10u/6.3V_8

*10u/6.3V_8

12

PC113

0.1u/10V_4

PC114

2.2n/50V_4

52

PQ41

PQ41 AON7410

AON7410

1

2.2uH_7X7X3

52

PR163

PR163 *4.7_6

*4.7_6

PQ42

PQ42 AON7702

AON7702

1

PC115

PC115 *680p/50V_6

*680p/50V_6

+1.05VSUS

1.05 Volt +/- 5% TDC : 5.5A PEAK : 7.3A OCP : 9A Width : 220mil

Quanta Computer Inc.

ZE6

1

ZE6

28 35Friday, March 11, 2011

PROJECT :

Size Document Number Rev

+1.05V(G5602)

Date: Sheet of

2

PROJECT :

D D

PR90

PR90 1M/F_4

1M/F_4

PR92

PR92 *0/short_4

MAINON[22,23,27,29]

C C

HWPG_1.05V[22,23,29]

B B

A A

*0/short_4 PC62

+3V

PR91

PR91 10K_4

10K_4

TON=3.85p*RTON*Vout/(Vin-0.5) Frequency=Vout/(Vin*TON)

TON=3.85p*1M*1/(Vin-0.5) Frequency=1/(0.0036767)=272K

PC56

*0.1u/50V_6

PC57

1u/10V_4

PC55

*1000p/50V_6

5

4

PR87

PR87 10_6

10_6

15

EN/DEM

16

TON

1

VOUT

2

VDD

3

FB

4

PGOOD

6

GND

5

NC

14

NC

L(ripple current) =(19-1.05)*1.05/(2.2u*272k*19) ~1.658A

Rth=14m*(9-0.829)/20uA

PU5

PU5 G5602

G5602

BOOT

UGATE

PHASE

VDDP

LGATE

PGND TPAD

1.05V_FB

PR94

2.2/F_6

13 12 11 10

OC

9 8 7 17

RILIM=5.719Kohm

5

VIN

+1.5VSUS

PR49

PR64

1M_4

*22_8

D D

PQ9

SUSON[5,22,23 ,27]

C C

MAINON[22,23,27,28]

2

DTC144EU

1 3

VIN

PQ18

2

DTC144EU

1 3

3

PR58

PR58 1M_4

1M_4

PR67

PR67 1M_4

1M_4

PR68

PR68 1M_4

1M_4

2

PQ17

PQ17 *DMN601K-7

*DMN601K-7

1

PR53

PR53 22_8

22_8

3

2

PQ13

PQ13 DMN601K-7

DMN601K-7

1

4

+3VSUS +15V

PR56

PR56 22_8

22_8

3

2

PQ11

PQ11 DMN601K-7

DMN601K-7

1

PR52

PR52 22_8

22_8

3

2

PQ12

PQ12 DMN601K-7

DMN601K-7

1

3

1

3

1

PR59

PR59 1M_4

1M_4

SUSDSUS_ON_G

PQ8

PQ8 DMN601K-7

DMN601K-7

PR50

PR50 *22_8

*22_8

PQ14

PQ14 *DMN601K-7

*DMN601K-7

3

VCCGFX

0.89Volt +/- 5%

SUSD [25]

PC30

PC30 *2200p/50V_4

*2200p/50V_4

+1.5V

3

2

1

PR51

PR51 22_8

22_8

PQ15

DMN601K-7

+15V+5V+3V +1.05V

PR60

PR60 1M_4

1M_4

MAINDMAINON_ON_G

3

2

PQ16

PQ16 DMN601K-7

DMN601K-7

1

PC33

PC33 *2200p/50V_4

*2200p/50V_4

MAIND [25,27]

TDC : 1.98A PEAK : 2.64A Width : 80mil

VCCGFX

+

PC103

PC40

330u/2V_7343

330u/2V_7343 PC95

PC40

10u/6.3V_8

2

1

PR142

Rg

102/F_4

PR144

Rh

127/F_4

Vout1 = (1+Rg/Rh)*0.5

AO3402

2

PQ40

PR147

PR147 47/F_4

47/F_4

PC102

PC102 33n/25V_4

33n/25V_4

1

+1.05V

12

+3V

PC105

0.1u/10V_4

PC106

10u/6.3V_8

PU9

3

G9334

5

PGD

DRV

EN

3

FB

VCC

GND

2

PR145

PR145 100K_4

100K_4

4

1

+5V

6

12

PC100

0.1u/10V_4

12

PC95 *0.1u/10V_4

*0.1u/10V_4

HWPG_VCCGFX [22,23]

PR143

10K/F_4

HWPG_1.05V

+5VPCU

PU4

PU4 G9661

G9661

4

PGOOD1VPP

2

VEN

3

VIN

8

GND

9

GND

ADJ

7

PC144

PC144 *0.1u/50V_6

*0.1u/50V_6

Vout =0.8(1+R1/R2) =1.8V

2

PR197 *0/short_4PR197 *0/short_4

PC142

0.1u/50V_6

10u/6.3V_8

PC140 1u/16V_6PC140 1u/16V_6

PR199

100K_4

PC143

B B

VIN VCCGFX

PR66

PR55

PR55 1M_4

1M_4

PR54

PQ7

1M_4

1 3

DTC144EU

1M_4

4

HWPG_1.05V[22,23,28]

A A

5

2

PR66 22_8

22_8

3

2

PQ10

PQ10 DMN601K-7

DMN601K-7

1

HWPG_1.05V

+3VSUS

3

PR196 100K_4PR196 100K_4

+3V

6

VO

NC

5

0.8V

PR198

R1

43.2K/F_4

PR200

PR200 34K/F_4

34K/F_4

R2

HWPG_1.8V [22]

+1.8V

1.8Volt +/- 5%

PC141

10u/6.3V_8

TDC : 0.5A PEAK : 0.7A Width : 20mil

Quanta Computer Inc.

PROJECT :

Discharge/1.8V

PROJECT :

Size Document Number Rev

Date: Sheet of

ZE6

29 35Frid ay, March 11, 2011

1

1A

1

Thermal Protection (DCD)

A A

B B

2

3

4

5

36

VIN

PD2

PD2 SW1010CPT

SW1010CPT

PR47

S5_ON

VLVL

2

PQ6

DTC144EU

PR47 1M/F_4

1M/F_4

1 3

TSNS_ON

1

PQ3

PQ3 AO3409

AO3409

2

3

1

PQ4

PQ4 DMN601K-7

DMN601K-7

SYS_SHDN# [4,25,26]

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

4

Date: Sheet of

PROJECT :

Thermal protect

ZE6

30 35Friday, March 11, 2011

5

1A

PR35

PR42

200K/F_4

1.3K/F_4

PR43

10K/J(NTC) _6

3

C C

D D

S5_ON[22,23,25]

1

2

PQ5

PQ5 DMN601K-7

DMN601K-7

1

2.469V

PR39

PR39 200K/F_4

200K/F_4

2

3 2

5 6

84

+

-

PU2A

PU2A AS393MTR-E1

AS393MTR-E1

PU2B

+

-

AS393MTR-E1

1

7

PC24

0.1U/25V_4

PR44

PR44 200K/F_4

200K/F_4

PC25

0.1U/25V_4

2

3

5

4

3

2

1

30

DDR3 SO-DIMM

D D

C C

Page 03

MEM (333MHz)

Intel@Pineview-M

Page 5~8

CPU FSB (166MHz)

MCH FSB (166MHz)

MCH DMI (100MHz)

LCD CLK (100MHz)

DOT 96 (96MHz)

CLOCK GEN CK505 (SLG8SP513VTR ,ICS9LPRS365BKLFT)

Page 2

DMI (100MHz)

SATA (100MHz)

PCI (33MHz)

REF (14.31818MHz)

USB (48MHz)

PCIE (100MHz)

Tigerpoint

Page 9~14

Y2(32.768K KHz)

LAN AR8131L

Page 19

WLAN(Mini Card 1)

LVDS CLK (Max. 200MHz)

BIT CLK (24MHz)

SUSCLK (32KHz)

Y3(25 MHz)

11.6" LED Panel

Page 15

Audio ALC272

Page 26

Page 21

PCIE (100MHz)

B B

PCI CLK (33MHz)

WLAN(Mini Card 2)

Page 21

EC (WPCE781L/FLASH)

Y4(32.768 KHz)

Page 23

PCI CLK (33MHz)

48MHz

A A

Y1(14.318 MHz)

5

4

Debug Card

Page 21

Card Reader RTS5138

Page 22

3

Y5(12 MHz)

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Clock Distribution Diagram

Date: Sheet of

2

Date: Sheet of

PROJECT :

ZE6

31 35Friday, March 11, 2011

1

1B

5

4

3

2

1

31

D D

C C

ADAPTER

BATTERY PU2

B B

A A

CHARGER

(ISL88731)

VIN

VINVIN

ISL6261A

PU3

SYSTEM 5V/3V

(RT8206BGQW)

PU0001

RT8207A

PU2000

G9334ADJ

UP6111AQDD

+5VPCU+3VPCU

+1.5VSUS

+1.05V

VCC_CORE

<VRON>

+5VPCU

AO3404

PQ0009

AO3404

PQ0010

+3VPCU

AO3404

PQ0008

AO3404

PQ0013

AO3404

PQ0005

RT9025-25PSP

PU1

+1.5VSUS

<SUSON>

AO3404

PQ2002

+0.75V_DDR_VTT

+SMDDR_VREF

<SUSON>

+1.05V

G9334ADJ

PU9004

G9334ADJ

PU9003

+5V_S5

<S5D>

+5V

<MAIND>

+3V_S5

<S5D>

+3VSUS

<SUSD>

+3V

<MAIND>

+2.5V

+1.5V

VCCGFX

<HWPG_1.05V>

+1.8V

<HWPG_1.05V>

POWER Distribution

VIN

LCD Backlight

VCC_CORE

CPU

+5VPCU

USB Connecter

+5V_S5 RTC, TPT

+5V

TPT , CRT , TouchPad , Codec , SATA , FAN , HDMI

+3VPCU

RTC, Hall Sensor, Light Sensor, EC, BIOS

+3V_S5

TPT , LAN , LAN EEPROM , RJ45 LED

3G

+3VSUS

+3V

CLK_GEN, CPU, TPT , LCD , CCD, DMIC, BT, Codec, WLAN/Wimax, Card reader, EC, DDR, HDMI

DDR

+1.5VSUS

CPU, HDMI

+1.8V

CPU, TPT

+1.5V

+0.75V_DDR_VTT

+SMDDR_VREF

DDR

CPU, DDR

+1.05V CLK_GEN , CPU, TPT

CPU

VCCGFX

+2.5V HDMI

Quanta Computer Inc.

PROJECT :

ZE6

PROJECT :

ZE6

PROJECT :

Size Document Number Rev

Power Tree

Date: Sheet of

5

4

3

2

Date: Sheet of

1

ZE6

1B

32 35Friday, March 11, 2011

5

ZGA Power On Sequence

4

3

2

1

32

From AC,BATT

D D

From PWM to EC

From Button to EC

From EC to PWM

From EC to SB From EC to SB

From SB to EC

From EC to PWM

From PWM to EC

C C

From EC to PWM

From PWM to EC,PWM

From PWM to EC From PWM to EC From EC to PWM

From PWM to CLK,SB

B B

From CLK Gen

From PWM to EC,CPU

From SB to CPU

VIN +5VPCU +3VPCU VCCRTC

HWPG_SYS(PCU)

RTCRST# NBSWON#

S5_ON

+5V_S5 +3V_S5

EC_RSMRST# DNBSWON#

SUSB#,SUSC#

SUSON

+3VSUS +1.5VSUS +SMDDR_VREF

HWPG_1.5V (SUS)

MAINON

+5V +3V +1.5V +0.75V_DDR_VTT

MAINON + (RC)

+1.05V

HWPG_1.05V

+1.8V VCCGFX

HWPG_VCCGFX HWPG

VRON

VCC_CORE

VR_PWRGD_CK410#

BCLK

IMVP_PWRGD

To SB

TPT_PWROK

H_PWRGD

From SB

PLTRST#

(VCCRTC to RTCRST#)(t200)

>=18ms

(VCCRTC to S5 well)(t203)

>=0ms

+5V_S5 power up before +3V_S5, or after +3V_S5 within 0.7V (t201)

>=5ms

(S5 well to EC_RSMRST#)(t205)

(EC define)

100ms

1~2 RTCCLK (SUSC# to SUSB#)(t234)

+5V power up before +3V, or after +3V within 0.7V (t209)

+1.5V power up before +1.05V, or after +1.05V within 0.7V (t211)

>=0ms (+3.3V to +1.05V)(T1)

>=0ms (+1.05V to +1.8V)(T2)

10~100us (VCC_CORE=1.2V)(Tc)

0~0.6ms (VCC_CORE@VID value)(Td)

99ms

(S0 well of TPT to TPT_PWROK)(t214)

0.05~200ms;Typ=20ms

>=10BLK=60ns

(BCLK stable to H_PWRGD)(Tf)

1~10ms

(H_PWRGD to PLTRST#)(Th)

>=0ms (+1.8V to +1.05V)(T3)

(VCC_CORE to H_PWRGD)(Te)

+3V_S5 power down before +5V_S5, or after +5V_S5 within 0.7V

+3V power down before +5V, or after +5V within 0.7V

+1.05V power down before +1.5V, or after +1.5V within 0.7V

*Note: EC will sampling SUSB# & SUSC# every 5ms.

ICH SMBUS Table

A A

(SMB_DATA)/(SMB_CLK) (+3V_S5)

Power Plane

MOS CKT (Level shift)

CLK GEN RAM Mini Card (WLAN)

V

+3V +3V

Stuff Stuff

VV

+3V

*Reserve

*Reserve: There is not SMBUS function in AVL

5

4

Mini Card (3G)

V

+3V_SUS

Stuff

EC781 SDA1 / SCL1 (+3VPCU) EC781 SDA2 / SCL2 (+3V) EC781 SDA3 / SCL3 (+3VPCU)

Power Plane +3VPCU MOS CKT (Level shift)

3

EC SMBUS Table

CPU thermal SensorBattery

V

X

V

+3V

X

2

Size Document Number Rev

Date: Sheet of

Quanta Computer Inc.

PROJECT :

SYSTEM INFORMATION

1

ZE6

33 35Friday, March 11, 2011

1B

5

SLP_S3#(SUSB#): Control non-critical power plane when system into S3(Suspend to RAM)/S4(Suspend to Disk)/S5(Soft off).

SLP_S4#(SUSC#): Control non-critical power plane when system into S4(Suspend to Disk)/S5(Soft off).Used to control DRAM power

D D

AC Adapter

Battery

BATT Charger

PU9001

9

12

MAINON

19

VRON

C C

VIN

Regulator

PU3

20

VCC_CORE

IMVP_PWRGD

22

1

VIN

4

Always System power

Regulator

PQ9007

2

1b

+3VPCU

+5VPCU

NBSWON#

3

4

S5_ON

6

EC_RSMRST#

7

DNBSWON#

8

SUSC#SUSON

SUSB#

EC

ECPWROK

U23

2

+3VPCU/+5VPCU

MOS

PQ0008/PQ0009

5

+5V_S5 power up befor e +3V_S5

+5V_S5

+3V_S5

TPT_PWROK

23

RSMRST#

PWRBTN#

SLP_S4#

SLP_S3#

TigerPoint

CPUPWRGD

PWROK

VRMPWRGD

U8003

PLTRST#

24

H_PWRGD

25

PLTRST#

1

CPUPWRGOOD

RSTIN# PWROK

Pineview

U8002

33

VR_PWRGD_CK410#

5

16

+1.8V

1.05V power up befo re 1.8V

16

VCCGFX(0.89V)

14

+1.05V

+2.5V

+1.5V

+5V

+5V power up befor e +3V

+3V

+0.75V_DDR_VTT

+1.5VSUS +SMDDR_VREF

+3VPCU

+3VSUS

MOS

PQ0013

17

15

1.5V power up befo re 1.05V

13

10

SYS_HWPG

HWPG_1.8V

HWPG_VCCGFX

18

HWPG

21

VR_PWRGD_CK410

HWPG_1.05V

HWPG_2.5V

HWPG_1.5V

CKPWRGD

CK505

U9

11

Quanta Computer Inc.

PROJECT :

ZE6

PROJECT :

ZE6

PROJECT :

Size Documen t Number Rev

Date: Sheet of

4

3

2

Date: Sheet of

1

ZE6

power sequen ce block diagram

34

35Friday, Marc h 11, 2011

+1.8VSUS

MOS

PQ9021

+1.05V

LDO

MAINON +(RC)

PU9004

VIN

Regulator

PU6000

+3VPCU

LDO

PU1

+1.5VSUS

LDO

PQ2002

+3VPCU/+5VPCU

MOS

PQ0005/PQ0010

VIN

Regulator

B B

A A

PU2000

+3VPCU

SUSD

MOS

1B

5

Model

ZE6 MB

D D

REV

FIRST RELEASED: (PCB:A)

A1

Page 2 : add R374 for CLK GEN change version Page 11 : change RTC connector type from SMT to holder. Page 15 : modify TP connector pin define Page 16 : modify audio and mic connector pin define. Page 17 : modify USB charger IC circuit to support or not support charger function. Page 29 : modify 1.8V IC enable signal to HWPG_1.05V

B

20110117 Page 15 : add CP1~CP6 for EMI issue 20110117 Page 15 : for EMI issue: change R232,R233,R234,R235,R236,R231,R211 to bead CX5BB121001 20110118 Page 27 : for EMI issue: add PC96 ,PC32 and stuff PR48, PC29 20110118 Page 30 : Thermal temperature setting at 75C, change PR42 from 1.54K/F to 1.3K/F 20110131 Page 14 : add 5V into LCD connector for IVO panel to use.

4

CHANGE LIST

3

2

MODEL

1

ZE6

FROM To

X 1A

B

C C

B B

1D

A A

Quanta Computer Inc.

DOC NO.

PART NUMBER:

5

APPROVED BY:PROJECT MODEL : 11.6

DATE:

DRAWING BY: REVISON:

4

3

2009/12/05

1B

2

Size Document Number Rev

Date: Sheet of

Quanta Computer Inc.

PROJECT :

Change list

ZE6

35 35Friday, March 11, 2011

1

1B

Quanta ZE6, Aspire One AOD257 Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual