How it Works
QUANTA
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ZE2
Schematics
42 pgs1 Mb0

QUANTA ZE2 Schematics

1
2
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4
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6
7
8
INT@:UMA EXT@:Discrete V6@:64M VRAM V12@:128M VRAM
ZE2
REV:A1A
G5@:LAN 5705E G7@:LAN 5787
A A
G9@:LAN 5709
AC/BATT CONNECTOR
Page 41
Yonah/Celeron-M
(479 Micro-FCPGA)
BATT CHARGER
+0.9V +0.9VSUS +1.8VSUS
DDR-SODIMM1
Page 10,11
B B
DDR-SODIMM2
Page 10,11
Parallel-HDD
Page 32
DDR2 533/667 MHz
DDR2 533/667 MHz
ATA 66/100
Multi-Bay
Page 32
C C
ALC833 (Codec) & 2 AMP
Page 30
MDC1.5
Page 30
Page 40
ATA 66/100
Azalia
CALISTOGA-GM/PM
+1.5V
+1.8VSUS
DMI interface
+1.5V +1.05V +2.5V +3V +3VSUS +1.5VSUS
Page 4,5
HOST BUS 533/667 MHz
+1.05V
1466 FCBGA
+2.5V
Page 6,7,8,9
ICH7-M
652 BGA
Page 18,19,20
RJ11
Head phone
Page 31
Page 24
INT SPK
Page 31
Internal-MIC
D D
Page 31
SUPER I/O
PC87391
Page 26
EC NSC97551
MIC-IN
Page 31
LINE-IN
Page 31
1
COM A COM B
Digitizer
Page 26
2
FIR
Page 26
+5V +3VPCU
JOGDIAL
Page 28 Page 27 Page 27
3
3V_591
176 Pins LQFP
+5V
Keyboard
Page 27
FLASH
4
DC/DC
NVDD/+1.2V +3V/+5V +1.05V/+1.8VSUS/+1.8V/+0.9V +1.5V/+2.5V
EXT. VGA n-VIDIA NV72MV
Page 12,13,14,15
INT_LVDS INT_TVOUT INT_VGA
DVI CH7307
Page 16
PCIe
33MHz PCI
USB
+5V
FAN 1
Page 25
USB PORT X 3
Page 25
Mini-Bluetooth (USB bus)
Page 25
Finger Printer
5
Page 28
Page 35,37,38,39
EXT_LVDS
EXT_TVOUT EXT_VGA
MINI card
Page 29
LAN (10M/100M/1G) BCM5787M/5789M
LAN (10M/100M/1G) BCM 5705E
AD22 / REQ1# / GNT1# /INTA#
CARDBUS/1394/3-IN-1
AD25 / REQ0# / GNT0# /INT E/F/G#
3 in 1 socket
MMC,SD,MS
Page 22
6
TI 7411
CLOCKS GeneratorCPU VR
ICS954310BGLFSC452
Page 36 Page 3
SWITCH
CIRCUIT
Page 17
DOCKING
Page 33
Page 23
Page 23
Page 21,22
CARDBUS CON.
Page 22
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Schematic Block Diagram
Schematic Block Diagram
Schematic Block Diagram
Date: Sheet
Date: Sheet
Date: Sheet
VGA
PROJECT : ZE2
PROJECT : ZE2
Quanta Computer Inc.
Quanta Computer Inc.
7
LCD Connector
Page 28
CRT
Page 17
EZ4 DVI
RJ45
Page 24
1394 PORT
Page 21
142Thursday, June 08, 2006
142Thursday, June 08, 2006
142Thursday, June 08, 2006
E2C
E2C
of
of
of
8
E2C
1
5/5 page29 MINI CARD pin define changed for debug card 5/8 page31 Audio Jack GND connect to DGND 5/10 page09 modify GMCH power for G72MV(original some parts no stuff for descrete,modify to stuff) 5/10 page37,38 change PQ36,PQ37,PQ38,PQ40,PQ41,PQ45,PQ53 part number to BAM64020009 for EOL issue 5/10 page31 change D19,D20,D22 part number to BC1SS355Z05 for EOL issue 6/4 page26,27 change S_SERIRQ net name to SERIRQ for fix KB no function issue, and add a cap of SERIRQ if noise 6/4 page30 ,stuff U53 ,no stuff L60 for audio noise 6/4 page31 R633 change from 15K to 22K to fix speaker voice is too low issue 6/4 page31 tie SURR-L and SURR-R for fix no sound when volume bar adjust to right channel 6/4 page30 change R627,R629 from 0 ohm to 4.7K ohm for fix HP voice is too loud 6/4 page31 change R635,R640 change from 0 to 75 ohm for fix noise by ZC3 solution
A A
6/4 page31 add cap on linein_PR for fix audio noise from docking Line in 6/4 page28 LCD connector pin34 change to +3V for fix EDID LCD issue 6/4 page13 add LCDID to VGA for Toshiba LCD that is no EDID support issue 6/4 page19 change USB I/O port from port1 to port2 for Bluetooth detection issue 6/4 page13 stuff R496 for fix no CRT issue by VGA SKU 6/4 page27 change 1M BIOS ROM from B-stage 6/4 page35 change PR55,PR146 to 100K and PC44,PC141 to 0.1uF to meet Nvidia power sequence requirement 6/4 page32 add ODD RST PU resistor for S/W not ready 6/4 page38 PL22 chagne p/n to CV-33D5MZ04 for package and footprint are difference issue 6/4 page42 add modem hole for modem NUT issue 6/4 page31 R630 change to LF part 6/4 page36 change PC15,PC16,PR16,PR18 value for power requirement 6/4 page35 change PR150 from 20K to 24K value for power requirement 6/4 page36 Add snubber of 2.2 ohm/2200pf on CPU core 6/4 page35,38,39 del short PAD 6/4 page28 un stuff CN3 PCI debug card 6/4 page15 R452,R478 change from 1K to 1.3K,R453,R469 change from 1K to 510 ohm ,Vref change from 0.5VDDQ to 0.7VDDQ for VRAM CLK un-stable issue 6/4 page14 R462, change from 1K to 1.3K,R461 change from 1K to 510 ohm ,Vref change from 0.5VDDQ to 0.7VDDQ for VRAM CLK un-stable issue 6/4 page42 change DIM H26,H35,H37 for SMT A open issue 6/7 page19 stuff R340 for PCI LAN wake up 6/7 page20,add RBAYID0,RBAYID1 PU for Swap Bay 6/8 page31,reserve 0 ohm resistor for EMI request 6/8 page19,change USB port for BT detection issue 6/9 page31 C836 change to 0.1uf for background noise 6/9 page40 change PD19 p/n for EOL issue
B B
2
3
4
5
6
7
8
C C
SKU MB ID ASSY PN DescriptionBOM Property A test SKU1 A test SKU2 A test SKU3 B test SKU3 ZE2D 31ZE2MB0031 ZE2 M/B ASSY (GM)
D D
1
ZE2A ZE2B ZE2C
2
31ZE2MB0006 31ZE2MB0014 31ZE2MB0022
ZE2 M/B ASSY (GM/5705E) ZE2 M/B ASSY (PM/G72MV/64M/5787) ZE2 M/B ASSY(PM/G72MV/128M/5789)
3
4
VRAM vender
Samsung 8M*32 Samsung 16M*32
5
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
6
Date: Sheet
7
8
E2C
E2C
E2C
of
of
of
242Friday, June 09, 2006
242Friday, June 09, 2006
242Friday, June 09, 2006
A
L54
L54 BK2125HS121-T_8
BK2125HS121-T_8
+3V
120 ohms@100Mhz
L:300mA
4 4
L28
L28
+3V
BK2125HS121-T_8
BK2125HS121-T_8
L:300mA
3 3
R540 2.2/F_6R540 2.2/F_6
25 mils
R263 2.2/F_6R263 2.2/F_6
R218 1_6R218 1_6
25 mils
VDD_SRC_CPU
C401
C401
.1U-10V_4
.1U-10V_4
VDD_PCI
C399
C399
.1U-10V_4
.1U-10V_4
VDD_A
.1U-10V_4
.1U-10V_4
C442
C442 .1U-10V_4
.1U-10V_4
VDD_48
VDD_REF
C400
C400
C440
C440
.1U-10V_4
.1U-10V_4
C443
C443 .1U-10V_4
.1U-10V_4
C444
C444 .1U-10V_4
.1U-10V_4
C398
C398 .1U-10V_4
.1U-10V_4
.1U-10V_4
.1U-10V_4
C386
C386
10U-10V_8
10U-10V_8
C441
C441
C451
C451 10U-10V_8
10U-10V_8
C457
C457 10U-10V_8
10U-10V_8
C389
C389 10U-10V_8
10U-10V_8
C756
C756 10U-10V_8
10U-10V_8
B
PM_STPPCI#[20] CGCLK_SMB[10]
CGDAT_SMB[10]
CLK_BSEL0 CLK_BSEL1
1 3
R558 33_4R558 33_4 R548 22RR548 22R
R221 33_4R221 33_4 C392
C392 *10P-50V_4
*10P-50V_4
R541 475/F_6R541 475/F_6
Close to IC <500mils
21
Y2
Y2
14.318MHZ
14.318MHZ
R259 *10K_4R259 *10K_4
+3V
CGCLK_SMB
CGDAT_SMB
R547 4.7K_4R547 4.7K_4 R220 4.7K_4R220 4.7K_4
VDD_REF VDD_SRC_CPU R_CLK_PCIE_EZ1
VDD_PCI
VDD_SRC_CPU
VDD_48
CLKGN_REQ3_PCIE CLKGN_REQ4_PCIE
Iref=5mA, Ioh=4*Iref
2 4
R_14M_SIO
C409 27P-50V_4C409 27P-50V_4
C437 27P-50V_4C437 27P-50V_4
VR_PWRGD_CK410#[20,36]
PM_STPCPU#[20]
EZ_CLKREQ#[33]
DREFCLK
DREFCLK[7] DREFCLK#[7]
CLKUSB_48[20]
RP42 INT@33_4P2R_SRP42 INT@33_4P2R_S
DREFCLK#
TI-48M[21]
14M_SIO[26]
C
VDD_A
CG_XIN
CG_XOUT R_HCLK_CPU
PM_STPCPU# PM_STPPCI#
IREF
T51T51
INTERNAL PULL HIGH
R_48M
R_48M
R_14M_SIOCLK_BSEL2
R_DOT96 R_DOT96#
U20
U20
58
X1
57
X2
10
Vtt_PwrGd#/PD
62
CPU_STOP#
63
PCI/PCIE_STOP#
54
SCLK
55
SDATA
12
FSA/USB_48MHz
16
FSB/TEST_MODE
61
REF1/FSLC/TEST_SEL
56
VDD_REF
50
VDDCPU
1
VDD_PCI_1
7
VDD_PCI_2
21
VDD_PCIE
28
VDDPCIE
42
VDD_PCIE
11
VDD_48
32
REQ3(PCIE)
33
REQ4(PCIE)
47
IREF
14
DOT96MHz
15
DOT96MHz#
34
PWRSAVE#
45
VDDA
CK-410M
CK-410M
27Mfix/LCD_SSCGT/PCIE0T
27SS/LCD_SSCGC/PCIE0C
selPCIEX0_LCD#/PCI5
GND
GND_PCI_26GND_SRC
GND_PCI_1
GND_48
GND
2
59
37
29
13
53
46
GNDA
CPUCLKT0 CPUCLKC0
CPUCLKT1 CPUCLKC1
CPUCLKT2/PCIET8
CPUCLKC2/PCIEC8
REQ1#/PCIET7 REQ2#/PCIEC7
SATA_CKT SATA_CKC
PCICLK2/REQ_SEL
PCIF1/selLCD_27#
PCIF0/ITP_EN
GND
ICS954310BGLF
ICS954310BGLF
pin5,pin9,pin32,pin33,pin34 internal PU pin64 internal PD
Place these termination to close CK410M.
60
REF0
52 51
49 48
R_CLK_PCIE_MINI1
44
R_CLK_PCIE_MINI1#
43
R_CLK_PCIE_EZ2
41
R_CLK_PCIE_EZ2#
40 39
PCIET6
38
PCIEC6
36
PCIET5 PCIEC5
PCIET4 PCIEC4
PCIET3 PCIEC3
PCIET2 PCIEC2
PCIET1 PCIEC1
PCI4 PCI3
R_CLK_PCIE_EZ1#
35
R_CLK_PCIE_VGA
30
R_CLK_PCIE_VGA#
31 26
27 24
25
R_CLK_PCIE_LAN
22
R_CLK_PCIE_LAN#
23 19
20 17
18
R_PCLK_SIO
5
R_PCLK_LAN
4
R_PCLK_PCM
3
R_PCLK_DEBUG
64
R_PCLK_ICH
9
R_PCLK_591
8
D
14M_REF
R_HCLK_CPU# R_HCLK_MCH
R_HCLK_MCH#
R_SRC_MCH R_SRC_MCH#
R_SRC_ICH R_SRC_ICH#
R_DREFSSCLK R_DREFSSCLK#
R543 33_4R543 33_4 RP33 33_4P2R_SRP33 33_4P2R_S
RP34 33_4P2R_SRP34 33_4P2R_S
RP35 33_4P2R_SRP35 33_4P2R_S
RP36 33_4P2R_SRP36 33_4P2R_S
RP37 33_4P2R_SRP37 33_4P2R_S
RP38 33_4P2R_SRP38 33_4P2R_S
RP41 EXT@33_4P2R_SRP41 EXT@33_4P2R_S
RP40 33_4P2R_SRP40 33_4P2R_S
RP39 G7_G9@33_4P2R_SRP39 G7_G9@33_4P2R_S
RP43 INT@33_4P2R_SRP43 INT@33_4P2R_S
R258 33_4R258 33_4 R257 G5@33_4R257 G5@33_4 R552 33_4R552 33_4 R219 33_4R219 33_4 R553 33_4R553 33_4 R551 33_4R551 33_4
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
CLK_CPU_BCLK [4] CLK_CPU_BCLK# [4]
CLK_MCH_BCLK [6] CLK_MCH_BCLK# [6]
CLK_PCIE_MINI1 [29] CLK_PCIE_MINI1# [29]
CLK_PCIE_EZ2 [33] CLK_PCIE_EZ2# [33]
CLK_PCIE_3GPLL [7] CLK_PCIE_3GPLL# [7]
CLK_PCIE_EZ1 [33] CLK_PCIE_EZ1# [33]
CLK_PCIE_VGA [12] CLK_PCIE_VGA# [12]
CLK_PCIE_ICH [19] CLK_PCIE_ICH# [19]
CLK_PCIE_LAN [23] CLK_PCIE_LAN# [23]
DREFSSCLK [7] DREFSSCLK# [7]
PCLK_SIO [26] PCLK_LAN [23] PCLK_PCM [21] PCLK_DEBUG [28,29]
PCLK_ICH [19]
PCLK_591 [27]
E
14M_ICH [20]
C742
C742 *10P-50V_4
*10P-50V_4
PCIE CLK enable/disable control
+3V
R265 10K_4R265 10K_4
REQ3 Latched Select "0" : CLK Enable "1" : CLK Disable Control : PCIE 2,4
2 2
+3V
R203 10K_4R203 10K_4
REQ4 Latched Select "0" : CLK Enable "1" : CLK Disable Control : PCIE 3,5,7
CLKGN_REQ3_PCIE
CLKGN_REQ4_PCIE
SM BUS level shift
1 1
PDAT_SMB[20,23,29,33]
PCLK_SMB[20,23,29,33]
A
RHU002N06
RHU002N06
RHU002N06
RHU002N06
Starpping
R_PCLK_SIO
Latched Select. (Pin 17,18)
"0" : LCD CLK
"1" : PCIEX CLK
R_PCLK_591
ITP/SRC7 SELECT
0: SRC7
1: ITP
R_PCLK_ICH
SELLCD_27# Select. (Pin 17,18) "0" : 27MHzSS/27MHzSS# pair
"1" : LCD CLK pair
R_PCLK_DEBUG
PCIE CLK/REQ select
"0" : PCIE CLK
"1" : REQ pin
+3V
R534
Q34
Q34
3
Q35
Q35
3
R534
2
10K_4
10K_4
1
+3V
2
1
CGCLK_SMB/CGDAT_SMB(CLK GEN&DDR,+3V)PCLK_SMB/PDAT_SMB(SB&LAN&MINI CARD&EZ,+3V_S5)
R535
R535 10K_4
10K_4
R261 10K_4R261 10K_4
R556 10K_4R556 10K_4
R554 10K_4R554 10K_4
R262 *10K_4R262 *10K_4
CGDAT_SMB
CGCLK_SMB
B
+3V
+3V
Frequence select
+1.05V
CPU_BSEL0[4]
+1.05V
CPU_BSEL1[4]
+1.05V
CPU_BSEL2[4] MCH_BSEL2 [7]
Power check
C
FSC FSB FSA CPU SRC PCI
BSEL strappings need to be set for 533MHz Moby Dick (Intel?915GM - Calistoga Interposer) (if Calistoga is designed for 667MHz board).
R268 *1K_4R268 *1K_4
R269 0_4R269 0_4 R272 *1K_4R272 *1K_4
R550 *1K_4R550 *1K_4
R549 0_4R549 0_4 R557 *0_4R557 *0_4
R533 *1K_4R533 *1K_4
R532 0_4R532 0_4 R542 *0_4R542 *0_4
+3V [4,7,9,10,12,13,16,17,18,19,20,21,22,23,26,27,28,29,30,32,33,34,35,36,37,38,39] +1.05V [4,5,6,9,18,20,36,37,38]
SEL0SEL1SEL2
1 0 1 100 100 33
0 0 1 133 100 33
0 1 1 166 100 33 0 1 0 200 100 33 0 0 0 266 100 33 1 0 0 333 100 33 1 1 0 400 100 33 1 1 1 200 100 33
CLK_BSEL0
R270 1K_4R270 1K_4
CLK_BSEL1
R545 1K_4R545 1K_4
CLK_BSEL2
R531 1K_4R531 1K_4
Default
MCH_BSEL0 [7]
MCH_BSEL1 [7]
D
Terminal Resistor
CLK_CPU_BCLK
CLK_CPU_BCLK# CLK_MCH_BCLK
CLK_MCH_BCLK# CLK_PCIE_VGA
CLK_PCIE_VGA# CLK_PCIE_LAN
CLK_PCIE_LAN# CLK_PCIE_3GPLL
CLK_PCIE_3GPLL# CLK_PCIE_MINI1
CLK_PCIE_MINI1# CLK_PCIE_ICH
CLK_PCIE_ICH# DREFSSCLK
DREFSSCLK# DREFCLK
DREFCLK# CLK_PCIE_EZ2
CLK_PCIE_EZ2# CLK_PCIE_EZ1
CLK_PCIE_EZ1#
R208 49.9/F_4R208 49.9/F_4
R209 49.9/F_4R209 49.9/F_4 R210 49.9/F_4R210 49.9/F_4
R211 49.9/F_4R211 49.9/F_4
RP46 EXT@49.9_4P2R_SRP46 EXT@49.9_4P2R_S
RP44 G7_G9@49.9_4P2R_SRP44 G7_G9@49.9_4P2R_S
RP31 49.9_4P2R_SRP31 49.9_4P2R_S
RP29 49.9_4P2R_SRP29 49.9_4P2R_S
RP45 49.9_4P2R_SRP45 49.9_4P2R_S
RP48 INT@49.9_4P2R_SRP48 INT@49.9_4P2R_S
RP47 INT@49.9_4P2R_SRP47 INT@49.9_4P2R_S
RP30 49.9_4P2R_SRP30 49.9_4P2R_S
RP32 49.9_4P2R_SRP32 49.9_4P2R_S
4
3
2
1
4
3
2
1
2
1
4
3
2
1
4
3
4
3
2
1
4
3
2
1
4
3
2
1
2
1
4
3
2
1
4
3
Reserve for EMI
PCLK_SIO PCLK_LAN PCLK_PCM PCLK_DEBUG PCLK_ICH PCLK_591
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Clock Gen.
Clock Gen.
Clock Gen.
Date: Sheet
Date: Sheet
Date: Sheet
C450 *10P-50V_4C450 *10P-50V_4 C449 *G5@10P-50V_4C449 *G5@10P-50V_4 C753 *10P-50V_4C753 *10P-50V_4 C393 *10P-50V_4C393 *10P-50V_4 C754 *10P-50V_4C754 *10P-50V_4 C752 *10P-50V_4C752 *10P-50V_4
PROJECT : ZE2
PROJECT : ZE2
Quanta Computer Inc.
Quanta Computer Inc.
342Thursday, June 08, 2006
342Thursday, June 08, 2006
342Thursday, June 08, 2006
of
of
E
of
B2A
B2A
B2A
5
U46A
H_A#[31:3][6]
D D
H_STPCLK#[18]
C C
H_ADSTB0#[6] H_REQ#[4:0][6]
H_A#[31:3][6]
H_ADSTB1#[6]
H_A20M#[18]
H_FERR#[18]
H_IGNNE#[18]
R127 0_4R127 0_4
T9T9 T13T13
T113T113
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_INTR[18]
H_NMI[18]
H_SMI#[18]
H_STPCLK_R#
TP_A32# TP_A33# TP_A34# TP_A35# TP_A36# TP_A37# TP_A38# TP_A39# TP_APM0# TP_APM1#
TP_HFPLL
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16
H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
U46A
J4
A[3]#
L4
A[4]#
M3
A[5]#
K5
A[6]#
M1
A[7]#
N2
A[8]#
J1
A[9]#
N3
A[10]#
P5
A[11]#
P2
A[12]#
L1
A[13]#
P4
A[14]#
P1
A[15]#
R1
A[16]#
L2
ADSTB[0]#
K3
REQ[0]#
H2
REQ[1]#
K2
REQ[2]#
J3
REQ[3]#
L5
REQ[4]#
Y2
A[17]#
U5
A[18]#
R3
A[19]#
W6
A[20]#
U4
A[21]#
Y5
A[22]#
U2
A[23]#
R4
A[24]#
T5
A[25]#
T3
A[26]#
W3
A[27]#
W5
A[28]#
Y4
A[29]#
W2
A[30]#
Y1
A[31]#
V4
ADSTB[1]#
A6
A20M#
A5
FERR#
C4
IGNNE#
D5
STPCLK#
C6
LINT0
B4
LINT1
A3
SMI#
AA1
RSVD[01]#
AA4
RSVD[02]#
AB2
RSVD[03]#
AA3
RSVD[04]#
M4
RSVD[05]#
N5
RSVD[06]#
T2
RSVD[07]#
V3
RSVD[08]#
B2
RSVD[09]#
C3
RSVD[10]#
B25
RSVD[11]#
PZ47903-2741-01
PZ47903-2741-01
ADDR GROUP 0
ADDR GROUP 0
DEFER#
DRDY# DBSY#
CONTROL
CONTROL
LOCK#
RESET#
TRDY#
BPM[0]# BPM[1]# BPM[2]# BPM[3]#
PRDY# PREQ#
XDP/ITP SIGNALS
XDP/ITP SIGNALS
PROCHOT THERMDA THERMDC
THERMTRIP#
THERMH CLK
THERMH CLK
BCLK[0] BCLK[1]
RSVD[12]#
RSVD[13]# RSVD[14]# RSVD[15]# RSVD[16]#
RESERVED
RESERVED
RSVD[17]# RSVD[18]# RSVD[19]# RSVD[20]#
ADS# BNR#
BPRI#
BR0#
IERR#
INIT#
RS[0]# RS[1]# RS[2]#
HIT#
HITM#
TCK TDO
TMS
TRST#
DBR#
H1 E2 G5
H5 F21 E1
F1 D20
B3 H4 B1
F3 F4 G3 G2
G6 E4
AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6
TDI
AB3 AB5 AB6 C20
D21 A24 A25
C7
A22 A21
T22
D2 F6 D3 C1 AF1 D22 C23 C24
4
H_IERR#
H_RS#0 H_RS#1 H_RS#2
BPM#0 BPM#1 BPM#2 BPM#3 BPM#4
XDP_BPM#5
XDP_TCK XDP_TDI XDP_TDO XDP_TMS XDP_TRST#
XDP_DBRESET#
H_PROCHOT_R# THERMDA THERMDC
THERMTRIP#_PWR
TP_EXTBREF
TP_SPARE0 TP_SPARE1 TP_SPARE2 TP_SPARE3 TP_SPARE4 TP_SPARE5 TP_SPARE6 TP_SPARE7
T49T49
H_ADS# [6] H_BNR# [6] H_BPRI# [6]
H_DEFER# [6] H_DRDY# [6] H_DBSY# [6]
H_BREQ#0 [6]
H_INIT# [18] H_LOCK# [6]
H_CPURST# [6]
H_RS#[2:0] [6]
H_TRDY# [6] H_HIT# [6]
H_HITM# [6]
+1.05V
R502
R502 68_4
68_4
R132 *0_4R132 *0_4
CLK_CPU_BCLK [3] CLK_CPU_BCLK# [3]
T19T19
T5T5 T15T15 T11T11 T4T4
T20T20 T115T115 T110T110
+1.05V
R500
R500
56.2/F_4
56.2/F_4
T8T8
T52T52
PM_THRMTRIP# [7,18]
R507
R507 1K/F_4
1K/F_4
R511
R511 2K/F_6
2K/F_6
3
+1.05V
H_D#[63:0][6]
H_DSTBN#0[6] H_DSTBP#0[6] H_DINV#0[6] H_D#[63:0][6]
H_DSTBN#1[6] H_DSTBP#1[6] H_DINV#1[6]
H_GTLREF
modify C
CPU_BSEL0[3] CPU_BSEL1[3] CPU_BSEL2[3]
R508
R508 R509 51_4R509 51_4
XDP_DBRESET#
U46B
U46B
H_D#0
E22
D[0]#
H_D#1
F24
D[1]#
H_D#2
E26
D[2]#
H_D#3
H22
D[3]#
H_D#4
F23
D[4]#
H_D#5
G25
D[5]#
H_D#6
E25
D[6]#
H_D#7
E23
D[7]#
H_D#8
K24
D[8]#
H_D#9
G24
D[9]#
H_D#10
J24
D[10
H_D#11
J23
D[11]#
H_D#12
H26
D[12]#
H_D#13
F26
D[13]#
H_D#14
K22
D[14]#
H_D#15
H25
D[15]#
H23
DSTBN[0]#
G22
DSTBP[0]#
J26
DINV[0]#
H_D#16
N22
D[16]#
H_D#17
K25
D[17]#
H_D#18
P26
D[18]#
H_D#19
R23
D[19]#
H_D#20
L25
D[20]#
H_D#21
L22
D[21]#
H_D#22
L23
D[22]#
H_D#23
M23
D[23]#
H_D#24
P25
D[24]#
H_D#25
P22
D[25]#
H_D#26
P23
D[26]#
H_D#27
T24
D[27]#
H_D#28
R24
D[28]#
H_D#29
L26
D[29]#
H_D#30
T25
D[30]#
H_D#31
N24
D[31]#
M24
DSTBN[1]#
N25
DSTBP[1]#
M26
DINV[1]#
AD26
GTLREF
*1K/F_4
*1K/F_4
C26
TEST1
D25
TEST2
B22
BSEL[0]
B23
BSEL[1]
C21
BSEL[2]
PZ47903-2741-01
PZ47903-2741-01
R499 0_4R499 0_4
2
DATA GRP 0 DATA GRP 1
DATA GRP 0 DATA GRP 1
DATA GRP 2
DATA GRP 2
DSTBN[2]# DSTBP[2]#
DATA GRP 3
DATA GRP 3
DSTBN[3]# DSTBP[3]#
MISC
MISC
PWRGOOD
D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]# D[42]# D[43]# D[44]# D[45]# D[46]# D[47]#
DINV[2]#
D[48]# D[49]# D[50]# D[51]# D[52]# D[53]# D[54]# D[55]# D[56]# D[57]# D[58]# D[59]# D[60]# D[61]# D[62]# D[63]#
DINV[3]# COMP[0]
COMP[1] COMP[2] COMP[3]
DPRSTP#
DPSLP#
DPWR#
SLP#
PSI#
H_D#32
AA23
H_D#33
AB24
H_D#34
V24
H_D#35
V26
H_D#36
W25
H_D#37
U23
H_D#38
U25
H_D#39
U22
H_D#40
AB25
H_D#41
W22
H_D#42
Y23
H_D#43
AA26
H_D#44
Y26
H_D#45
Y22
H_D#46
AC26
H_D#47
AA24 W24 Y25 V23
H_D#48
AC22
H_D#49
AC23
H_D#50
AB22
H_D#51
AA21
H_D#52
AB21
H_D#53
AC25
H_D#54
AD20
H_D#55
AE22
H_D#56
AF23
H_D#57
AD24
H_D#58
AE21
H_D#59
AD21
H_D#60
AE25
H_D#61
AF25
H_D#62
AF22
H_D#63
AF26 AD23 AE24 AC20
COMP0
R26
COMP1
U26
COMP2
U1
COMP3
V1 E5
B5 D24 D6 D7 AE6
SYS_RST# [20]
27.4/F_6
27.4/F_6
T14T14
ICH_DPRSTP# [18,36] H_DPSLP# [18]
H_D#[63:0] [6]
H_DSTBN#2 [6] H_DSTBP#2 [6] H_DINV#2 [6] H_D#[63:0] [6]
H_DSTBN#3 [6] H_DSTBP#3 [6] H_DINV#3 [6]
R510
R510 R50654.9/F_4 R50654.9/F_4 R8327.4/F_6 R8327.4/F_6 R9854.9/F_4 R9854.9/F_4
H_CPUSLP# [6,18] PSI# [36]
1
+1.05V
25/25mils
R130
R130 *200/F_6
*200/F_6
T50T50
C MODIFY : 5mil
H_PWRGD is CMOS driving by ICH
H_DPWR# [6] H_PWRGD [18]
Thermal IC
B B
MBCLK[27,41]
MBDATA[27]
THERM_ALERT#[20]
+3V
2
3 1
+3V
2
3 1
+3V
2
3 1
Q31
Q31 RHU002N06
RHU002N06
THCLK_SMB
Q32
Q32 RHU002N06
RHU002N06
THDAT_SMB
Q33
Q33 RHU002N06
RHU002N06
THERM_ALERT#_RR
+3V
VCC
DXP
GND
280VCC
1 3 2
R513
R513 0_4
0_4
C733
C733 .1U
.1U
THERMDA
C730
C730 2200P
2200P
THERMDC
R512
R512 10K
10K
R516
R516
R522 100RR522 100R
R520
R520
U47
U47
10K
10K
10K
10K
4
SCLK
5
SDA
6
ALERT#
MAX6642ATT98-T
MAX6642ATT98-T
Address 1001 100----98
Thermal protect
PU/PD
XDP_TMS
XDP_TDI
THERMTRIP#_PWR
R491 39.2/F_4R491 39.2/F_4
R492 150/F_4R492 150/F_4
+1.05V
+1.05V
R131
R131 56_4
56_4
R134
R134
330_4
330_4
+1.05V
D25
D25
BAS316
BAS316
2 1
1 3
Q11 MMBT3904Q11 MMBT3904
R498
R498 10K_4
10K_4
C238
C238 1U-16V_6
2
1U-16V_6
1999_SHT# [37]
XDP PU_R < 0.2"
A A
Power check
+3V [3,7,9,10,12,13,16,17,18,19,20,21,22,23,26,27,28,29,30,32,33,34,35,36,37,38,39] +1.05V [3,5,6,9,18,20,36,37,38]
5
4
XDP_BPM#5
XDP_TCK
XDP_TRST#
3
R487 54.9/F_4R487 54.9/F_4
R493 27.4/F_4R493 27.4/F_4
R494 680/F_4R494 680/F_4
XDP_TCK PD 27.4/1% ? XDP_TRST PD 680ohm /5% ? XDP_TDI PU 150ohm /1.05V XDP_TMS PU 39.2/1%? XDP_TDO PU 54.9ohm? For ITP700
2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
YOHNA (HOST)
YOHNA (HOST)
YOHNA (HOST)
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT : ZE2
PROJECT : ZE2
Quanta Computer Inc.
Quanta Computer Inc.
442Thursday, June 08, 2006
442Thursday, June 08, 2006
442Thursday, June 08, 2006
of
of
1
of
B2A
B2A
B2A
5
U46D
U46D
A4
VSS[001]
A8
VSS[002]
A11
VSS[003]
A14
VSS[004]
A16
VSS[005]
A19
VSS[006]
A23
VSS[007]
A26
VSS[008]
B6
D D
C C
B B
A A
VSS[009]
B8
VSS[010]
B11
VSS[011]
B13
VSS[012]
B16
VSS[013]
B19
VSS[014]
B21
VSS[015]
B24
VSS[016]
C5
VSS[017]
C8
VSS[018]
C11
VSS[019]
C14
VSS[020]
C16
VSS[021]
C19
VSS[022]
C2
VSS[023]
C22
VSS[024]
C25
VSS[025]
D1
VSS[026]
D4
VSS[027]
D8
VSS[028]
D11
VSS[029]
D13
VSS[030]
D16
VSS[031]
D19
VSS[032]
D23
VSS[033]
D26
VSS[034]
E3
VSS[035]
E6
VSS[036]
E8
VSS[037]
E11
VSS[038]
E14
VSS[039]
E16
VSS[040]
E19
VSS[041]
E21
VSS[042]
E24
VSS[043]
F5
VSS[044]
F8
VSS[045]
F11
VSS[046]
F13
VSS[047]
F16
VSS[048]
F19
VSS[049]
F2
VSS[050]
F22
VSS[051]
F25
VSS[052]
G4
VSS[053]
G1
VSS[054]
G23
VSS[055]
G26
VSS[056]
H3
VSS[057]
H6
VSS[058]
H21
VSS[059]
H24
VSS[060]
J2
VSS[061]
J5
VSS[062]
J22
VSS[063]
J25
VSS[064]
K1
VSS[065]
K4
VSS[066]
K23
VSS[067]
K26
VSS[068]
L3
VSS[069]
L6
VSS[070]
L21
VSS[071]
L24
VSS[072]
M2
VSS[073]
M5
VSS[074]
M22
VSS[075]
M25
VSS[076]
N1
VSS[077]
N4
VSS[078]
N23
VSS[079]
N26
VSS[080]
P3
VSS[081]
PZ47903-2741-01
PZ47903-2741-01
5
VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162]
P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 AF3 AF6 AF8 AF11 AF13 AF16 AF19 AF21 AF24
+VCC_CORE
4
power plane
C271
C271 10U-6.3V_8
10U-6.3V_8
C273
C273 10U-6.3V_8
10U-6.3V_8
C674
C674 10U-6.3V_8
10U-6.3V_8
C702
C702 10U-6.3V_8
10U-6.3V_8
C214
C214 10U-6.3V_8
10U-6.3V_8
C677
C677 10U-6.3V_8
10U-6.3V_8
C233
C233 10U-6.3V_8
10U-6.3V_8
C700
C700 10U-6.3V_8
10U-6.3V_8
4
C272
C272 10U-6.3V_8
10U-6.3V_8
C279
C279 10U-6.3V_8
10U-6.3V_8
C280
C280 10U-6.3V_8
10U-6.3V_8
C671
C671 10U-6.3V_8
10U-6.3V_8
C234
C234 10U-6.3V_8
10U-6.3V_8
C672
C672 10U-6.3V_8
10U-6.3V_8
C235
C235 10U-6.3V_8
10U-6.3V_8
C681
C681 10U-6.3V_8
10U-6.3V_8
C224
C224 10U-6.3V_8
10U-6.3V_8
C278
C278 10U-6.3V_8
10U-6.3V_8
C680
C680 10U-6.3V_8
10U-6.3V_8
C673
C673 10U-6.3V_8
10U-6.3V_8
C239
C239 10U-6.3V_8
10U-6.3V_8
C683
C683 10U-6.3V_8
10U-6.3V_8
C240
C240 10U-6.3V_8
10U-6.3V_8
C675
C675 10U-6.3V_8
10U-6.3V_8
C274
C274 10U-6.3V_8
10U-6.3V_8
C232
C232 10U-6.3V_8
10U-6.3V_8
C216
C216 10U-6.3V_8
10U-6.3V_8
C701
C701 10U-6.3V_8
10U-6.3V_8
C241
C241 10U-6.3V_8
10U-6.3V_8
C682
C682 10U-6.3V_8
10U-6.3V_8
C678
C678 10U-6.3V_8
10U-6.3V_8
C679
C679 10U-6.3V_8
10U-6.3V_8
3
U46C
U46C
A7
A9 A10 A12 A13 A15 A17 A18 A20
B7
B9 B10 B12 B14 B15 B17 B18 B20
C9
C10 C12 C13 C15 C17 C18
D9
D10 D12 D14 D15 D17 D18
E7
E9 E10 E12 E13 E15 E17 E18 E20
F7
F9 F10 F12 F14 F15 F17 F18 F20
AA7
AA9 AA10 AA12 AA13 AA15 AA17 AA18 AA20
AB9 AC10 AB10 AB12 AB14 AB15 AB17 AB18
PZ47903-2741-01
PZ47903-2741-01
3
VCC[001] VCC[002] VCC[003] VCC[004] VCC[005] VCC[006] VCC[007] VCC[008] VCC[009] VCC[010] VCC[011] VCC[012] VCC[013] VCC[014] VCC[015] VCC[016] VCC[017] VCC[018] VCC[019] VCC[020] VCC[021] VCC[022] VCC[023] VCC[024] VCC[025] VCC[026] VCC[027] VCC[028] VCC[029] VCC[030] VCC[031] VCC[032] VCC[033] VCC[034] VCC[035] VCC[036] VCC[037] VCC[038] VCC[039] VCC[040] VCC[041] VCC[042] VCC[043] VCC[044] VCC[045] VCC[046] VCC[047] VCC[048] VCC[049] VCC[050] VCC[051] VCC[052] VCC[053] VCC[054] VCC[055] VCC[056] VCC[057] VCC[058] VCC[059] VCC[060] VCC[061] VCC[062] VCC[063] VCC[064] VCC[065] VCC[066] VCC[067]
VCC[68] VCC[69] VCC[70] VCC[71] VCC[72] VCC[73] VCC[74] VCC[75] VCC[76] VCC[77] VCC[78] VCC[79] VCC[80] VCC[81] VCC[82] VCC[83] VCC[84] VCC[85] VCC[86] VCC[87] VCC[88] VCC[89] VCC[90] VCC[91] VCC[92] VCC[93] VCC[94] VCC[95] VCC[96] VCC[97] VCC[98] VCC[99]
VCC[100]
VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]
VCCA
VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]
VCCSENSE VSSSENSE
AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20
V6 G21 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21
B26
AD6 AF5 AE5 AF4 AE3 AF2 AE2
AF7 AE7
2
+VCC_CORE+VCC_CORE
+1.05V +VCC_CORE +1.5V
+VCC_CORE
C215
C215 10U-6.3V_8
10U-6.3V_8
+1.05V [3,4,6,9,18,20,36,37,38] +VCC_CORE [36] +1.5V [9,19,20,29,37,39]
C217
C223
C223 10U-6.3V_8
10U-6.3V_8
C217 10U-6.3V_8
10U-6.3V_8
reserve dummy cap--Allen
1
C222
C222 10U-6.3V_8
10U-6.3V_8
power plane
+1.05V
+1.05V
+
+
C732
C732
C283
C283 .1U-10V_4
.1U-10V_4
330U-2.5V_7343
330U-2.5V_7343
C669
C669 .1U-10V_4
.1U-10V_4
+1.5V
C284
C284 .1U-10V_4
.1U-10V_4
C204
C204 .1U-10V_4
.1U-10V_4
+1.5V
C285
C285 .1U-10V_4
.1U-10V_4
C729
C729 .01U-16V_4
.01U-16V_4
C205
C205 .1U-10V_4
.1U-10V_4
20 mil
H_VID0 [36] H_VID1 [36] H_VID2 [36] H_VID3 [36] H_VID4 [36] H_VID5 [36]
R497 100/F_4R497 100/F_4
R495 100/F_4R495 100/F_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
YOHNA (POWER)
YOHNA (POWER)
YOHNA (POWER)
Date: Sheet
Date: Sheet
Date: Sheet
2
H_VID6 [36]
+VCC_CORE
VCCSENSE [36] VSSSENSE [36]
PROJECT : ZE2
PROJECT : ZE2
Quanta Computer Inc.
Quanta Computer Inc.
542Thursday, June 08, 2006
542Thursday, June 08, 2006
542Thursday, June 08, 2006
of
of
of
1
C724
C724 10U/X5R-6.3V_8
10U/X5R-6.3V_8
B2A
B2A
B2A
5
H_D#[63:0][4]
D D
C C
H_XRCOMP H_XSCOMP
+1.05V
CLK_MCH_BCLK[3] CLK_MCH_BCLK#[3]
H_XSWING H_YRCOMP
H_YSCOMP H_YSWING
Short Stub < 100mils extract from same point
+1.05V [3,4,5,9,18,20,36,37,38]
B B
A A
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
5
AA10
AB11 AC11
AD10
W11
AB7 AA9
AB8 AA4
AA7 AA2 AA6
AA1 AB4 AC9
AB3 AC2 AD1 AD9 AC1 AD7 AC6 AB5
AD4 AC8
AG2 AG1
K11 T10
U11 T11
W9
W7
W6
W4 W3
W5
Y10
W2
W1
F1 J1 H1 J6 H3 K2 G1 G2 K9 K1 K7 J8 H4 J3
G4
T3 U7 U9
T1 T8 T4
U5 T9
T5
Y3 Y7
Y8
E1 E2 E4
Y1 U1
R546
R546
24.9/F_4
24.9/F_4
U48A
U48A
H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63
H_XRCOMP H_XSCOMP H_XSWING
H_YRCOMP H_YSCOMP H_YSWING
H_CLKIN H_CLKIN#
Calistoga
Calistoga
H_XRCOMP
H_YRCOMP
R242
R242
24.9/F_4
24.9/F_4
HOST
HOST
15 mils/10mils
15 mils/10mils
H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8
H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31
H_ADS# H_ADSTB#_0 H_ADSTB#_1
H_VREF_0
H_BNR# H_BPRI#
H_BREQ#0
H_CPURST#
H_DBSY# H_DEFER# H_DPWR#
H_DRDY#
H_VREF_1
H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3
H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3
H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3
H_HIT# H_HITM# H_LOCK#
H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4
H_RS#_0 H_RS#_1 H_RS#_2
H_SLPCPU#
H_TRDY#
+1.05V
R231
R231
54.9/F_4
54.9/F_4
+1.05V
4
H9 C9 E11 G11 F11 G12 F9 H11 J12 G14 D9 J14 H13 J15 F14 D12 A11 C11 A12 A13 E13 G13 F12 B12 B14 C12 A14 C14 D14
E8 B9 C13 J13 C6 F6 C7 B7 A7 C3 J9 H8 K13
J7 W8 U3 AB10
K4 T7 Y5 AC4
K3 T6 AA5 AC5
D3 D4 B3
D8 G8 B8 F8 A8
B4 E6 D6
E3 E7
H_XSCOMP
R241
R241
54.9/F_4
54.9/F_4
H_YSCOMP
4
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
R544 0_4R544 0_4
H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3
H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3
H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_RS#0 H_RS#1 H_RS#2
H_A#[31:3] [4]
H_VREF :10 mils/20 mils space
H_ADS# [4] H_ADSTB0# [4] H_ADSTB1# [4]
H_BNR# [4] H_BPRI# [4] H_BREQ#0 [4] H_CPURST# [4] H_DBSY# [4] H_DEFER# [4] H_DPWR# [4] H_DRDY# [4]
H_DINV#[3:0] [4]
H_DSTBN#[3:0] [4]
H_DSTBP#[3:0] [4]
H_HIT# [4] H_HITM# [4] H_LOCK# [4]
H_REQ#[4:0] [4]
H_RS#[2:0] [4]
H_CPUSLP# [4,18] H_TRDY# [4]
+1.05V
R249
R249 221/F_4
221/F_4
R229
R229 100/F_4
100/F_4
H_XSWING
C439
C439 .1U-10V_4
.1U-10V_4
+1.05V
H_VREF
C397
C397 .1U-10V_4
.1U-10V_4
H_VREF
C396
C396 .1U-10V_4
.1U-10V_4
R246
R246 221/F_4
221/F_4
H_YSWING
R254
R254 100/F_4
100/F_4
+1.05V
R217
R217 100/F_4
100/F_4
R213
R213 200/F_4
200/F_4
C438
C438 .1U-10V_4
.1U-10V_4
3
U48I
U48I
AC41
VSS_0
AA41
VSS_1
W41
VSS_2
T41
VSS_3
P41
VSS_4
M41
VSS_5
J41
VSS_6
F41
VSS_7
AV40
VSS_8
AP40
VSS_9
AN40
VSS_10
AK40
VSS_11
AJ40
VSS_12
AH40
VSS_13
AG40
VSS_14
AF40
VSS_15
AE40
VSS_16
B40
VSS_17
AY39
VSS_18
AW39
VSS_19
AV39
VSS_20
AR39
VSS_21
AN39
VSS_22
AJ39
VSS_23
AC39
VSS_24
AB39
VSS_25
AA39
VSS_26
Y39
VSS_27
W39
VSS_28
V39
VSS_29
T39
VSS_30
R39
VSS_31
P39
VSS_32
N39
VSS_33
AT38
AM38
AH38 AG38 AF38 AE38
AK37 AH37 AB37 AA37
W37
AY36
AW36
AN36 AH36 AG36 AF36 AE36 AC36
BA35 AV35 AR35 AH35 AB35 AA35
W35
AN34
M39
L39
J39 H39 G39
F39 D39
C38
Y37 V37
T37 R37 P37 N37 M37
L37
J37 H37 G37
F37 D37
C36 B36
Y35 V35
T35 R35 P35 N35 M35
L35
J35 H35 G35
F35 D35
Calistoga
Calistoga
VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96
VSS
VSS
COMPONENTS
945PM 945GM AJSL8Z20T25
ICH7-M AJSL8YB0T21
3
VSS_97 VSS_98
VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179
2
AK34 AG34 AF34 AE34 AC34 C34 AW33 AV33 AR33 AE33 AB33 Y33 V33 T33 R33 M33 H33 G33 F33 D33 B33 AH32 AG32 AF32 AE32 AC32 AB32 G32 B32 AY31 AV31 AN31 AJ31 AG31 AB31 Y31 AB30 E30 AT29 AN29 AB29 T29 N29 K29 G29 E29 C29 B29 A29 BA28 AW28 AU28 AP28 AM28 AD28 AC28 W28 J28 E28 AP27 AM27 AK27 J27 G27 F27 C27 B27 AN26 M26 K26 F26 D26 AK25 P25 K25 H25 E25 D25 A25 BA24 AU24 AL24 AW23
P/N
AJSL8Z40T51
2
1
U48J
U48J
AT23
VSS_180
AN23
VSS_181
AM23
VSS_182
AH23
VSS_183
AC23
VSS_184
W23
VSS_185
K23
VSS_186
J23
VSS_187
F23
VSS_188
C23
VSS_189
AA22
VSS_190
K22
VSS_191
G22
VSS_192
F22
VSS_193
E22
VSS_194
D22
VSS_195
A22
VSS_196
BA21
VSS_197
AV21
VSS_198
AR21
VSS_199
AN21
VSS_200
AL21
VSS_201
AB21
VSS_202
Y21
VSS_203
P21
VSS_204
K21
VSS_205
J21
VSS_206
H21
VSS_207
C21
VSS_208
AW20
VSS_209
AR20
VSS_210
AM20 AA20
AN19 AC19
W19
AH18
AY17 AR17 AP17 AM17 AK17 AV16 AN16
AL16
AN15 AM15 AK15
M15
BA14
AT14 AK14 AD14 AA14
AV13 AR13 AN13 AM13
AL13 AG13
AY12 AC12
AD11 AA11
K20 B20 A20
K19 G19 C19
P18 H18 D18 A18
J16 F16 C16
N15
L15 B15 A15
U14 K14 H14 E14
P13 F13 D13 B13
K12 H12 E12
Y11
VSS
VSS
VSS_211 VSS_212 VSS_213 VSS_214 VSS_215 VSS_216 VSS_217 VSS_218 VSS_219 VSS_220 VSS_221 VSS_222 VSS_223 VSS_224 VSS_225 VSS_226 VSS_227 VSS_228 VSS_229 VSS_230 VSS_231 VSS_232 VSS_233 VSS_234 VSS_235 VSS_236 VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242 VSS_243 VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252 VSS_253 VSS_254 VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272
Calistoga
Calistoga
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
GMCH (HOST/GND)
GMCH (HOST/GND)
GMCH (HOST/GND)
Date: Sheet
Date: Sheet
Date: Sheet
J11
VSS_273
D11
VSS_274
B11
VSS_275
AV10
VSS_276
AP10
VSS_277
AL10
VSS_278
AJ10
VSS_279
AG10
VSS_280
AC10
VSS_281
W10
VSS_282
U10
VSS_283
BA9
VSS_284
AW9
VSS_285
AR9
VSS_286
AH9
VSS_287
AB9
VSS_288
Y9
VSS_289
R9
VSS_290
G9
VSS_291
E9
VSS_292
A9
VSS_293
AG8
VSS_294
AD8
VSS_295
AA8
VSS_296
U8
VSS_297
K8
VSS_298
C8
VSS_299
BA7
VSS_300
AV7
VSS_301
AP7
VSS_302
AL7
VSS_303
AJ7
VSS_304
AH7
VSS_305
AF7
VSS_306
AC7
VSS_307
R7
VSS_308
G7
VSS_309
D7
VSS_310
AG6
VSS_311
AD6
VSS_312
AB6
VSS_313
Y6
VSS_314
U6
VSS_315
N6
VSS_316
K6
VSS_317
H6
VSS_318
B6
VSS_319
AV5
VSS_320
AF5
VSS_321
AD5
VSS_322
AY4
VSS_323
AR4
VSS_324
AP4
VSS_325
AL4
VSS_326
AJ4
VSS_327
Y4
VSS_328
U4
VSS_329
R4
VSS_330
J4
VSS_331
F4
VSS_332
C4
VSS_333
AY3
VSS_334
AW3
VSS_335
AV3
VSS_336
AL3
VSS_337
AH3
VSS_338
AG3
VSS_339
AF3
VSS_340
AD3
VSS_341
AC3
VSS_342
AA3
VSS_343
G3
VSS_344
AT2
VSS_345
AR2
VSS_346
AP2
VSS_347
AK2
VSS_348
AJ2
VSS_349
AD2
VSS_350
AB2
VSS_351
Y2
VSS_352
U2
VSS_353
T2
VSS_354
N2
VSS_355
J2
VSS_356
H2
VSS_357
F2
VSS_358
C2
VSS_359
AL1
VSS_360
PROJECT : ZE2
PROJECT : ZE2
Quanta Computer Inc.
Quanta Computer Inc.
1
B2A
B2A
B2A
of
of
of
642Thursday, June 08, 2006
642Thursday, June 08, 2006
642Thursday, June 08, 2006
5
U48B
CLK_MCH_OE#
T121T121
MCH_RSVD_1
T30T30
MCH_RSVD_2
T29T29
MCH_RSVD_3
T55T55
MCH_RSVD_4
T54T54
MCH_RSVD_5
T47T47
MCH_RSVD_6
T48T48
MCH_RSVD_7
T53T53
MCH_RSVD_8
T40T40
TV_DCONSEL0 TV_DCONSEL1
T33T33
MCH_RSVD_11
T111T111
MCH_RSVD_12
D D
8/27 A1B:Change PM_EXTTS#1 to PM_DPRSLPVR
PM_DPRSLPVR[20,36]
C C
B B
DELAY_VR_PWRGOOD[20,36]
PLT_RST-R#[19]
+3V
GMCH Strap pin LCD Internal and Extenal switch
MCH_CFG_5
MCH_CFG_5 DMI speed mode Low = DMI X2
High=DMIX4
MCH_CFG_6
MCH_CFG_6 DDR Low =Moby Dick
High= Calistoga (Default)
MCH_CFG_7
MCH_CFG_7 CPU Strap Low=RSVD
High=Mobile CPU
MCH_CFG_9
MCH_CFG_9 PCI Exp Graphics Lane Low =Reserved
High=Normal
A A
MCH_CFG_10
MCH_CFG_10 Host PLL VCC Select Low=Reserved
High=Mobility
T21T21 T25T25 T37T37 T125T125
MCH_BSEL0[3] MCH_BSEL1[3]
MCH_BSEL2[3]
T45T45 T46T46
T44T44
T126T126 T42T42
T127T127
PM_BMBUSY#[20] PM_EXTTS#0[10]
R184 0_4R184 0_4
PM_THRMTRIP#[4,18]
R176 100/F_4R176 100/F_4
SDVO_CTRLCLK[16] SDVO_CTRLDATA[16]
MCH_ICH_SYNC[19]
T137T137 T114T114 T136T136 T112T112 T116T116 T118T118 T130T130 T132T132 T133T133 T108T108 T131T131 T109T109 T134T134 T107T107 T135T135 T117T117 T128T128 T119T119 T129T129
R527 10K/F_4R527 10K/F_4 R526 *10K/F_4R526 *10K/F_4
R539 *2.2K_4R539 *2.2K_4
R207 *2.2K_4R207 *2.2K_4
R201 *2.2K_4R201 *2.2K_4
R204 *2.2K_4R204 *2.2K_4
R536 *2.2K_4R536 *2.2K_4
MCH_RSVD_13 MCH_RSVD_14 MCH_RSVD_15
MCH_CFG_3 MCH_CFG_4 MCH_CFG_5 MCH_CFG_6 MCH_CFG_7 MCH_CFG_8 MCH_CFG_9 MCH_CFG_10 MCH_CFG_11 MCH_CFG_12 MCH_CFG_13 MCH_CFG_14 MCH_CFG_15 MCH_CFG_16 MCH_CFG_17 MCH_CFG_18 MCH_CFG_19 MCH_CFG_20
RST IN# MCH
TP_MCH_NC0 TP_MCH_NC1 TP_MCH_NC2 TP_MCH_NC3 TP_MCH_NC4 TP_MCH_NC5 TP_MCH_NC6 TP_MCH_NC7 TP_MCH_NC8 TP_MCH_NC9 TP_MCH_NC10 TP_MCH_NC11 TP_MCH_NC12 TP_MCH_NC13 TP_MCH_NC14 TP_MCH_NC15 TP_MCH_NC16 TP_MCH_NC17 TP_MCH_NC18
PM_EXTTS#0 PM_EXTTS#1
CFG[3..17] has internal PU CFG[18..20] has internal PD
5
U48B
H32
RSVD_0
T32
RSVD_1
R32
RSVD_2
F3
RSVD_3
F7
RSVD_4
AG11
RSVD_5
AF11
RSVD_6
H7
RSVD_7
J19
RSVD_8
K30
RSVD_9
J29
RSVD_10
A41
RSVD_11
A35
RSVD_12
A34
RSVD_13
D28
RSVD_14
D27
RSVD_15
K16
CFG_0
K18
CFG_1
J18
CFG_2
F18
CFG_3
E15
CFG_4
F15
CFG_5
E18
CFG_6
D19
CFG_7
D16
CFG_8
G16
CFG_9
E16
CFG_10
D15
CFG_11
G15
CFG_12
K15
CFG_13
C15
CFG_14
H16
CFG_15
G18
CFG_16
H15
CFG_17
J25
CFG_18
K27
CFG_19
J26
CFG_20
G28
PM_EXTTS#0 PM_EXTTS#1
PM_BMBUSY#
F25
PM_EXTTS#_0
H26
PM_EXTTS#_1
G6
PM_THRMTRIP#
AH33
PWROK
AH34
RSTIN#
H28
SDVO_CTRLCLK
H27
SDVO_CTRLDATA
K28
LT_RESET#
D1
NC0
C41
NC1
C1
NC2
BA41
NC3
BA40
NC4
BA39
NC5
BA3
NC6
BA2
NC7
BA1
NC8
B41
NC9
B2
NC10
AY41
NC11
AY1
NC12
AW41
NC13
AW1
NC14
A40
NC15
A4
NC16
A39
NC17
A3
NC18
MCH_CFG_11
MCH_CFG_12
MCH_CFG_13
R524 *1K/F_4R524 *1K/F_4
R214 *2.2K_4R214 *2.2K_4
R216 *2.2K_4R216 *2.2K_4
R206 *2.2K_4R206 *2.2K_4
R530 *2.2K_4R530 *2.2K_4
MCH_CFG_11 PSB 4x CLK ENABLE Low=Reserved
High=Calistoga
MCH_CFG_12,13 XOR/ALLZ 0,0=Partial clock gating disable 0,1=All-Z mode enable 1,0=XOR mode enable
1,1=Normal
MCH_CFG_16
MCH_CFG_16 FSB Dynmic ODT Low=Dynamic ODT Disabled
High=Dynamic ODT Enabled.
MCH_CFG_18 CFG_RSVD_0_R
MCH_CFG_18 VCC Select
LOW=1.05V
High=1.5V
PM
PM
MISC
MISC
NC
NC
Calistoga
Calistoga
CFGRSVD
CFGRSVD
SM_CK#_0 SM_CK#_1 SM_CK#_2 SM_CK#_3
SM_CKE_0 SM_CKE_1 SM_CKE_2 SM_CKE_3
SM_CS#_0 SM_CS#_1 SM_CS#_2 SM_CS#_3
SM_OCDCOMP_0 SM_OCDCOMP_1
SM_ODT_0 SM_ODT_1 SM_ODT_2 SM_ODT_3
SM_RCOMP#
SM_RCOMP
DDR MUXINGCLKDMI
DDR MUXINGCLKDMI
SM_VREF_0 SM_VREF_1
D_REFCLKIN#
D_REFCLKIN
D_REFSSCLKIN#
D_REFSSCLKIN
DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3
DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3
DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3
DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3
SM_CK_0 SM_CK_1 SM_CK_2 SM_CK_3
G_CLKIN#
G_CLKIN
R525 *0_4R525 *0_4
4
AY35 AR1 AW7 AW40
AW35 AT1 AY7 AY40
AU20 AT20 BA29 AY29
AW13 AW12 AY21 AW21
AL20 AF10
BA13 BA12 AY20 AU21
AV9 AT9
SMDDR_VREF_MCH
AK1 AK41
AF33 AG33 A27 A26 C40 D41
AE35 AF39 AG35 AH39
AC35 AE39 AF35 AG39
DMI_RXN0
AE37
DMI_RXN1
AF41
DMI_RXN2
AG37
DMI_RXN3
AH41
AC37 AE41 AF37 AG41
< 0.1" . 15mils/15mils space use 1% R
CLK_SDRAM0 [10] CLK_SDRAM1 [10] CLK_SDRAM3 [10] CLK_SDRAM4 [10]
CLK_SDRAM0# [10] CLK_SDRAM1# [10] CLK_SDRAM3# [10] CLK_SDRAM4# [10]
CKE0 [10,11] CKE1 [10,11] CKE2 [10,11] CKE3 [10,11]
SM_CS0# [10,11] SM_CS1# [10,11] SM_CS2# [10,11]
M_OCDCOMP_0 M_OCDCOMP_1
M_RCOMP# M_RCOMP
SM_CS3# [10,11]
M_ODT0 [10,11] M_ODT1 [10,11] M_ODT2 [10,11] M_ODT3 [10,11]
15mils/15mils
Layout as short as passable
R505 0_6R505 0_6
*40.2/F_4
*40.2/F_4
NC from WW45
20 mil
CLK_PCIE_3GPLL# [3] CLK_PCIE_3GPLL [3] DREFCLK# [3] DREFCLK [3] DREFSSCLK# [3] DREFSSCLK [3]
DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3
DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3
DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3
+3V
MCH_CFG_19
MCH_CFG_20
DMI_TXN[3:0] [19]
DMI_TXP[3:0] [19] DMI_RXN[3:0] [19]
DMI_RXP[3:0] [19]
R523 *1K/F_4R523 *1K/F_4
MCH_CFG_19 DMI LANE Reversal
Low=Normal
High=LANES Reversed
R521 *1K/F_4R521 *1K/F_4
MCH_CFG_20 PCIE Backward interpoerability mode
Low= only SDVO or PCIE x1 is operational (defaults)
High=SDVO and PCIE x1 are operation simultaneously via the PEG port
4
R199
R199
R223
R223
*40.2/F_4
*40.2/F_4
+0.9VSUS
+1.8VSUS
R225
R225
80.6/F_4
80.6/F_4
M_RCOMP#
15mils/10mils
M_RCOMP
R226
R226
80.6/F_4
80.6/F_4
+3V
+3V
+3V
R517 10K/F_4R517 10K/F_4 R519 10K/F_4R519 10K/F_4
R167
R167
1.5K/F_4
1.5K/F_4
TXLCLKOUT+[28] TXLCLKOUT-[28]
+V1.5_PCIE +3V +0.9VSUS +1.8VSUS
L_IBG
TXLOUT0+[28] TXLOUT0-[28]
TXLOUT1-[28] TXLOUT1+[28]
TXLOUT2+[28] TXLOUT2-[28]
3
U48C
U48C
D32
INT_BLON
R514 INT@0_4R514 INT@0_4
L_CLKCTLA L_CLKCTLB
INT_TV_COMP[17]
INT_TV_Y/G[17] INT_TV_C/R[17]
I_EDIDCLK[28] I_EDIDDATA[28]
R200 INT@150/F_4R200 INT@150/F_4 R202 INT@150/F_4R202 INT@150/F_4 R205 INT@150/F_4R205 INT@150/F_4
< 0.1" . 15mils/15mils space
INT_VGA_BLU[17] INT_VGA_GRN[17] INT_VGA_RED[17]
INT_HSYNC[17]
INT_VSYNC[17]
DISP_ON[13,28] BLON[13,28]
INT_DDCCLK[17] INT_DDCDAT[17]
TXLCLKOUT+ TXLCLKOUT-
TXLOUT0+ TXLOUT0-
TXLOUT1­TXLOUT1+
TXLOUT2+ TXLOUT2-
R195 INT@150/F_4R195 INT@150/F_4 R197 INT@150/F_4R197 INT@150/F_4 R187 INT@150/F_4R187 INT@150/F_4
INT_HSYNC
R188
R188
INT_VSYNC
6/30 Add 39 in HSYNC and VSYNC
BLON
T120T120
L_CLKCTLA L_CLKCTLB I_EDIDCLK I_EDIDDATA
L_IBG L_VBG
T22T22
INT_DISP_ON
L_VREFH L_VREFL
INT_TXLCLKOUT­INT_TXLCLKOUT+
TXUCLKOUT­TXUCLKOUT+
INT_TXLOUT0­INT_TXLOUT1­INT_TXLOUT2-
INT_TXLOUT0+ INT_TXLOUT1+ INT_TXLOUT2+
TXUOUT0­TXUOUT1­TXUOUT2-
TXUOUT0+ TXUOUT1+ TXUOUT2+
INT_TV_COMP INT_TV_Y/G INT_TV_C/R
R193
R193
4.99K/F_6
4.99K/F_6
INT_VGA_BLU INT_VGA_GRN INT_VGA_RED
R191 INT@39_4R191 INT@39_4
CRTIREF
255/F_6
255/F_6
R192 INT@39_4R192 INT@39_4
R175 INT@0RR175 INT@0R R515 INT@0RR515 INT@0R
RN8 INT@0X2RN8 INT@0X2
RN5 INT@0X2RN5 INT@0X2
RN6 INT@0X2RN6 INT@0X2
RN7 INT@0X2RN7 INT@0X2 C304 INT@.1UC304 INT@.1U
RN19 EXT@0X2RN19 EXT@0X2
RN16 EXT@0X2RN16 EXT@0X2
RN17 EXT@0X2RN17 EXT@0X2
RN18 EXT@0X2RN18 EXT@0X2
TVIREF
J30 H30 H29 G26 G25 B38 C35
F32 C33 C32
A33 A32 E27 E26
C37 B35 A37
B37 B34 A36
G30 D30
F29
F30 D29
F28
A16 C18 A19
J20 B16 B18 B19
E23 D23 C22 B22 A21 B21
C26 C25 G23
J22 H23
241
241
241
241
1
3
3
1
L_BKLTCTL L_BKLTEN L_CLKCTLA L_CLKCTLB L_DDC_CLK L_DDC_DATA L_IBG L_VBG L_VDDEN L_VREFH L_VREFL
LA_CLK# LA_CLK LB_CLK# LB_CLK
LA_DATA#_0 LA_DATA#_1 LA_DATA#_2
LA_DATA_0 LA_DATA_1 LA_DATA_2
LB_DATA#_0 LB_DATA#_1 LB_DATA#_2
LB_DATA_0 LB_DATA_1 LB_DATA_2
TV_DACA_OUT TV_DACB_OUT TV_DACC_OUT
TV_IREF TV_IRTNA TV_IRTNB TV_IRTNC
CRT_BLUE CRT_BLUE# CRT_GREEN CRT_GREEN# CRT_RED CRT_RED#
CRT_DDC_CLK CRT_DDC_DATA CRT_HSYNC CRT_IREF CRT_VSYNC
Calistoga
Calistoga
INT_DISP_ONDISP_ON INT_BLON
R518
R518 INT@100K
INT@100K
3 3
3
3
423
241 241
423
EXT VGA Staff(Place back RN12/RN13/RN14/RN15)
+V1.5_PCIE [9] +3V [3,4,9,10,12,13,16,17,18,19,20,21,22,23,26,27,28,29,30,32,33,34,35,36,37,38,39] +0.9VSUS [10,38] +1.8VSUS [9,10,35,37,38]
3
2
LVDS
LVDS
TV
TV
VGA
VGA
INT_TXLCLKOUT+ INT_TXLCLKOUT-
INT_TXLOUT0+ INT_TXLOUT0-
INT_TXLOUT1­INT_TXLOUT1+
INT_TXLOUT2+ INT_TXLOUT2-
EXT_TXLCLKOUT­EXT_TXLCLKOUT+
EXT_TXLOUT0+ EXT_TXLOUT0-
EXT_TXLOUT1­EXT_TXLOUT1+
EXT_TXLOUT2­EXT_TXLOUT2+
2
20mils/20mils space
EXP_A_COMPX
D40
EXP_A_COMPI
EXP_A_RXN_0 EXP_A_RXN_1 EXP_A_RXN_2 EXP_A_RXN_3 EXP_A_RXN_4 EXP_A_RXN_5 EXP_A_RXN_6 EXP_A_RXN_7 EXP_A_RXN_8 EXP_A_RXN_9
EXP_A_RXP_0 EXP_A_RXP_1 EXP_A_RXP_2 EXP_A_RXP_3 EXP_A_RXP_4 EXP_A_RXP_5 EXP_A_RXP_6 EXP_A_RXP_7 EXP_A_RXP_8 EXP_A_RXP_9
EXP_A_TXN_0 EXP_A_TXN_1 EXP_A_TXN_2 EXP_A_TXN_3 EXP_A_TXN_4 EXP_A_TXN_5 EXP_A_TXN_6 EXP_A_TXN_7 EXP_A_TXN_8 EXP_A_TXN_9
EXP_A_TXP_0 EXP_A_TXP_1 EXP_A_TXP_2 EXP_A_TXP_3 EXP_A_TXP_4 EXP_A_TXP_5 EXP_A_TXP_6 EXP_A_TXP_7 EXP_A_TXP_8 EXP_A_TXP_9
D38
GMCHEXP_RXN0
F34
GMCHEXP_RXN1
G38
GMCHEXP_RXN2
H34
GMCHEXP_RXN3
J38
GMCHEXP_RXN4
L34
GMCHEXP_RXN5
M38
GMCHEXP_RXN6
N34
GMCHEXP_RXN7
P38
GMCHEXP_RXN8
R34
GMCHEXP_RXN9
T38
GMCHEXP_RXN10
V34
GMCHEXP_RXN11
W38
GMCHEXP_RXN12
Y34
GMCHEXP_RXN13
AA38
GMCHEXP_RXN14
AB34
GMCHEXP_RXN15
AC38
GMCHEXP_RXP0
D34
GMCHEXP_RXP1
F38
GMCHEXP_RXP2
G34
GMCHEXP_RXP3
H38
GMCHEXP_RXP4
J34
GMCHEXP_RXP5
L38
GMCHEXP_RXP6
M34
GMCHEXP_RXP7
N38
GMCHEXP_RXP8
P34
GMCHEXP_RXP9
R38
GMCHEXP_RXP10
T34
GMCHEXP_RXP11
V38
GMCHEXP_RXP12
W34
GMCHEXP_RXP13
Y38
GMCHEXP_RXP14
AA34
GMCHEXP_RXP15
AB38
CGMCHEXP_TXN0
F36
CGMCHEXP_TXN1
G40
CGMCHEXP_TXN2
H36
CGMCHEXP_TXN3
J40
CGMCHEXP_TXN4
L36
CGMCHEXP_TXN5
M40
CGMCHEXP_TXN6
N36
CGMCHEXP_TXN7
P40
CGMCHEXP_TXN8
R36
CGMCHEXP_TXN9
T40
CGMCHEXP_TXN10
V36
CGMCHEXP_TXN11
W40
CGMCHEXP_TXN12
Y36
CGMCHEXP_TXN13
AA40 AB36
CGMCHEXP_TXN15
AC40
CGMCHEXP_TXP0
D36
CGMCHEXP_TXP1
F40
CGMCHEXP_TXP2
G36
CGMCHEXP_TXP3
H40
CGMCHEXP_TXP4
J36
CGMCHEXP_TXP5
L40
CGMCHEXP_TXP6
M36
CGMCHEXP_TXP7
N40
CGMCHEXP_TXP8
P36
CGMCHEXP_TXP9
R40
CGMCHEXP_TXP10
T36
CGMCHEXP_TXP11
V40
CGMCHEXP_TXP12
W36
CGMCHEXP_TXP13
Y40 AA36
CGMCHEXP_TXP15
AB40
EXP_A_COMPO
EXP_A_RXN_10 EXP_A_RXN_11 EXP_A_RXN_12 EXP_A_RXN_13 EXP_A_RXN_14 EXP_A_RXN_15
EXP_A_RXP_10 EXP_A_RXP_11 EXP_A_RXP_12 EXP_A_RXP_13 EXP_A_RXP_14 EXP_A_RXP_15
EXP_A_TXN_10 EXP_A_TXN_11 EXP_A_TXN_12
PCI-EXPRESS GRAPHICS
PCI-EXPRESS GRAPHICS
EXP_A_TXN_13 EXP_A_TXN_14 EXP_A_TXN_15
EXP_A_TXP_10 EXP_A_TXP_11 EXP_A_TXP_12 EXP_A_TXP_13 EXP_A_TXP_14 EXP_A_TXP_15
R165 24.9/F_4R165 24.9/F_4
EXT VGA Staff
C721 EXT@.1UC721 EXT@.1U C719 EXT@.1UC719 EXT@.1U C717 EXT@.1UC717 EXT@.1U C715 EXT@.1UC715 EXT@.1U C326 EXT@.1UC326 EXT@.1U C713 EXT@.1UC713 EXT@.1U C324 EXT@.1UC324 EXT@.1U C711 EXT@.1UC711 EXT@.1U C322 EXT@.1UC322 EXT@.1U C709 EXT@.1UC709 EXT@.1U C320 EXT@.1UC320 EXT@.1U C707 EXT@.1UC707 EXT@.1U C318 EXT@.1UC318 EXT@.1U C705 EXT@.1UC705 EXT@.1U C316 EXT@.1UC316 EXT@.1U C703 EXT@.1UC703 EXT@.1U
C722 EXT@.1UC722 EXT@.1U C720 EXT@.1UC720 EXT@.1U C718 EXT@.1UC718 EXT@.1U C716 EXT@.1UC716 EXT@.1U C327 EXT@.1UC327 EXT@.1U C714 EXT@.1UC714 EXT@.1U C325 EXT@.1UC325 EXT@.1U C712 EXT@.1UC712 EXT@.1U C323 EXT@.1UC323 EXT@.1U C710 EXT@.1UC710 EXT@.1U C321 EXT@.1UC321 EXT@.1U C708 EXT@.1UC708 EXT@.1U C319 EXT@.1UC319 EXT@.1U C706 EXT@.1UC706 EXT@.1U C317 EXT@.1UC317 EXT@.1U C704 EXT@.1UC704 EXT@.1U
+V1.5_PCIE
Internal DVO and PCIE switch
INT VGA Staff
EXT_TXLCLKOUT- [13] EXT_TXLCLKOUT+ [13]
EXT_TXLOUT0+ [13] EXT_TXLOUT0- [13]
EXT_TXLOUT1- [13] EXT_TXLOUT1+ [13]
EXT_TXLOUT2- [13] EXT_TXLOUT2+ [13]
CGMCHEXP_TXP0
CGMCHEXP_TXN0
CGMCHEXP_TXP1
CGMCHEXP_TXN1
CGMCHEXP_TXP2
CGMCHEXP_TXN2
CGMCHEXP_TXP3
CGMCHEXP_TXN3
C310 INT@.1UC310 INT@.1U C309 INT@.1UC309 INT@.1U C308 INT@.1UC308 INT@.1U C307 INT@.1UC307 INT@.1U C306 INT@.1UC306 INT@.1U C305 INT@.1UC305 INT@.1U
C303 INT@.1UC303 INT@.1U
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
GMCH (DMI&PCIE&VGA )
GMCH (DMI&PCIE&VGA )
GMCH (DMI&PCIE&VGA )
Date: Sheet
Date: Sheet
Date: Sheet
1
GMCHEXP_TXP[15..0] [12] GMCHEXP_TXN[15..0] [12] GMCHEXP_RXP[15..0] [12,16] GMCHEXP_RXN[15..0] [12,16]
GMCHEXP_TXN0 GMCHEXP_TXN1 GMCHEXP_TXN2 GMCHEXP_TXN3 GMCHEXP_TXN4 GMCHEXP_TXN5 GMCHEXP_TXN6 GMCHEXP_TXN7 GMCHEXP_TXN8 GMCHEXP_TXN9 GMCHEXP_TXN10 GMCHEXP_TXN11 GMCHEXP_TXN12 GMCHEXP_TXN13 GMCHEXP_TXN14CGMCHEXP_TXN14 GMCHEXP_TXN15
GMCHEXP_TXP0 GMCHEXP_TXP1 GMCHEXP_TXP2 GMCHEXP_TXP3 GMCHEXP_TXP4 GMCHEXP_TXP5 GMCHEXP_TXP6 GMCHEXP_TXP7 GMCHEXP_TXP8 GMCHEXP_TXP9 GMCHEXP_TXP10 GMCHEXP_TXP11 GMCHEXP_TXP12 GMCHEXP_TXP13 GMCHEXP_TXP14CGMCHEXP_TXP14 GMCHEXP_TXP15
SDVOB_R+
SDVOB_R-
SDVOB_G+
SDVOB_G­SDVOB_B+ SDVOB_B-
SDVOB_CLK+
SDVOB_CLK-
PROJECT : ZE2
PROJECT : ZE2
Quanta Computer Inc.
Quanta Computer Inc.
742Thursday, June 08, 2006
742Thursday, June 08, 2006
1
742Thursday, June 08, 2006
SDVOB_R+ [16] SDVOB_R- [16] SDVOB_G+ [16] SDVOB_G- [16] SDVOB_B+ [16] SDVOB_B- [16] SDVOB_CLK+ [16] SDVOB_CLK- [16]
of
of
of
B2A
B2A
B2A
5
4
3
2
1
R_A_MD[63:0][10]
D D
C C
B B
R_A_MD0 R_A_MD1 R_A_MD2 R_A_MD3 R_A_MD4 R_A_MD5 R_A_MD6 R_A_MD7 R_A_MD8 R_A_MD9 R_A_MD10 R_A_MD11 R_A_MD12 R_A_MD13 R_A_MD14 R_A_MD15 R_A_MD16 R_A_MD17 R_A_MD18 R_A_MD19 R_A_MD20 R_A_MD21 R_A_MD22 R_A_MD23 R_A_MD24 R_A_MD25 R_A_MD26 R_A_MD27 R_A_MD28 R_A_MD29 R_A_MD30 R_A_MD31 R_A_MD32 R_A_MD33 R_A_MD34 R_A_MD35 R_A_MD36 R_A_MD37 R_A_MD38 R_A_MD39 R_A_MD40 R_A_MD41 R_A_MD42 R_A_MD43 R_A_MD44 R_A_MD45 R_A_MD46 R_A_MD47 R_A_MD48 R_A_MD49 R_A_MD50 R_A_MD51 R_A_MD52 R_A_MD53 R_A_MD54 R_A_MD55 R_A_MD56 R_A_MD57 R_A_MD58 R_A_MD59 R_A_MD60 R_A_MD61 R_A_MD62 R_A_MD63
AJ35
AJ34 AM31 AM33
AJ36
AK35
AJ32 AH31 AN35
AP33
AR31
AP31 AN38 AM36 AM34 AN33
AK26
AL27 AM26 AN24
AK28
AL28 AM24
AP26
AP23
AL22
AP21 AN20
AL23
AP24
AP20
AT21 AR12 AR14
AP13
AP12
AT13
AT12
AL14
AL12
AK9 AN7 AK8 AK7 AP9 AN9 AT5
AL5 AY2
AW2
AP1 AN2 AV2 AT3 AN1
AL2 AG7 AF9 AG4 AF6 AG9 AH6 AF4 AF8
U48D
U48D
SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63
Calistoga
Calistoga
AU12
SA_BS_0
AV14
SA_BS_1
BA20
SA_BS_2
AY13
SA_CAS#
AJ33
SA_DM_0
AM35
SA_DM_1
AL26
SA_DM_2
AN22
SA_DM_3
AM14
SA_DM_4
AL9
SA_DM_5
AR3
SA_DM_6
AH4
SA_DM_7
SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8 SA_MA_9
SA_RAS#
SA_WE#
AK33 AT33 AN28 AM22 AN12 AN8 AP3 AG5 AK32 AU33 AN27 AM21 AM12 AL8 AN3 AH5
AY16 AU14 AW16 BA16 BA17 AU16 AV17 AU17 AW17 AT16 AU13 AT17 AV20 AV12
AW14 AK23 AK24 AY14
SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6
SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_RCVENIN#
SA_RCVENOUT#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
R_A_BS0# R_A_BS1# R_A_BS2#
R_A_SCASA#
R_A_DM0 R_A_DM1 R_A_DM2 R_A_DM3 R_A_DM4 R_A_DM5 R_A_DM6 R_A_DM7
R_A_DQS0 R_A_DQS1 R_A_DQS2 R_A_DQS3 R_A_DQS4 R_A_DQS5 R_A_DQS6 R_A_DQS7 R_A_DQS#0 R_A_DQS#1 R_A_DQS#2 R_A_DQS#3 R_A_DQS#4 R_A_DQS#5 R_A_DQS#6 R_A_DQS#7
R_A_MA0 R_A_MA1 R_A_MA2 R_A_MA3 R_A_MA4 R_A_MA5 R_A_MA6 R_A_MA7 R_A_MA8 R_A_MA9 R_A_MA10 R_A_MA11 R_A_MA12 R_A_MA13
TP_MA_RCVENIN# TP_MA_RCVENOUT#
R_A_BS1# [10,11] R_A_BS2# [10,11] R_A_SCASA# [10,11]
R_A_DM[7:0] [10]
R_A_DQS[7:0] [10]
R_A_DQS#[7:0] [10]
R_A_MA[13:0] [10,11]
R_A_SRASA# [10,11]
T39T39 T38T38
R_A_BMWEA# [10,11]
R_B_MD[63:0][10]R_A_BS0# [10,11]
R_B_MD0 R_B_MD1 R_B_MD2 R_B_MD3 R_B_MD4 R_B_MD5 R_B_MD6 R_B_MD7 R_B_MD8 R_B_MD9 R_B_MD10 R_B_MD11 R_B_MD12 R_B_MD13 R_B_MD14 R_B_MD15 R_B_MD16 R_B_MD17 R_B_MD18 R_B_MD19 R_B_MD20 R_B_MD21 R_B_MD22 R_B_MD23 R_B_MD24 R_B_MD25 R_B_MD26 R_B_MD27 R_B_MD28 R_B_MD29 R_B_MD30 R_B_MD31 R_B_MD32 R_B_MD33 R_B_MD34 R_B_MD35 R_B_MD36 R_B_MD37 R_B_MD38 R_B_MD39 R_B_MD40 R_B_MD41 R_B_MD42 R_B_MD43 R_B_MD44 R_B_MD45 R_B_MD46 R_B_MD47 R_B_MD48 R_B_MD49 R_B_MD50 R_B_MD51 R_B_MD52 R_B_MD53 R_B_MD54 R_B_MD55 R_B_MD56 R_B_MD57 R_B_MD58 R_B_MD59 R_B_MD60 R_B_MD61 R_B_MD62 R_B_MD63
AK39
AJ37
AP39
AR41
AJ38
AK38
AN41
AP41 AT40 AV41
AU38
AV38
AP38 AR40 AW38
AY38
BA38
AV36 AR36
AP36
BA36 AU36
AP35
AP34
AY33
BA33
AT31 AU29 AU31 AW31
AV29 AW29 AM19
AL19
AP14 AN14 AN17 AM16
AP15
AL15
AJ11
AH10
AJ9
AN10
AK13 AH11
AK10
AJ8
BA10 AW10
BA4
AW4
AY10
AY9
AW5
AY5
AV4 AR5 AK4 AK3 AT4 AK5
AJ5
AJ3
U48E
U48E
SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63
Calistoga
Calistoga
AT24
SB_BS_0
AV23
SB_BS_1
AY28
SB_BS_2
AR24
SB_CAS# SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7
SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6
SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7
SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8
SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_WE#
AK36 AR38 AT36 BA31 AL17 AH8 BA5 AN4
AM39 AT39 AU35 AR29 AR16 AR10 AR7 AN5 AM40 AU39 AT35 AP29 AP16 AT10 AT7 AP5
AY23 AW24 AY24 AR28 AT27 AT28 AU27 AV28 AV27 AW27 AV24 BA27 AY27 AR23
AU23 AK16 AK18 AR27
R_B_DM0 R_B_DM1 R_B_DM2 R_B_DM3 R_B_DM4 R_B_DM5 R_B_DM6 R_B_DM7
R_B_DQS0 R_B_DQS1 R_B_DQS2 R_B_DQS3 R_B_DQS4 R_B_DQS5 R_B_DQS6 R_B_DQS7 R_B_DQS#0 R_B_DQS#1 R_B_DQS#2 R_B_DQS#3 R_B_DQS#4 R_B_DQS#5 R_B_DQS#6 R_B_DQS#7
R_B_MA0 R_B_MA1 R_B_MA2 R_B_MA3 R_B_MA4 R_B_MA5 R_B_MA6 R_B_MA7 R_B_MA8 R_B_MA9 R_B_MA10 R_B_MA11 R_B_MA12 R_B_MA13
TP_MB_RCVENIN# TP_MB_RCVENOUT#
R_B_BS0# [10,11] R_B_BS1# [10,11] R_B_BS2# [10,11] R_B_SCASA# [10,11] R_B_DM[7:0] [10]
R_B_DQS[7:0] [10]
R_B_DQS#[7:0] [10]
R_B_MA[13:0] [10,11]
R_B_SRASA# [10,11]
T43T43 T41T41
R_B_BMWEA# [10,11]
A A
5
4
3
2
<OrgName>
<OrgName>
<OrgName> <OrgAddr1>
<OrgAddr1>
<OrgAddr1> <OrgAddr2>
<OrgAddr2>
<OrgAddr2> <OrgAddr3>
<OrgAddr3>
<OrgAddr3> <OrgAddr4>
<OrgAddr4>
<OrgAddr4> Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
GMCH (DDR2)
GMCH (DDR2)
GMCH (DDR2)
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT : ZE1
PROJECT : ZE1
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT : ZE2
PROJECT : ZE2
Quanta Computer Inc.
Quanta Computer Inc.
of
of
of
842Thursday, June 08, 2006
842Thursday, June 08, 2006
842Thursday, June 08, 2006
1
B2A
B2A
B2A
5
U48G
S:GM--3500mA,PM----1500mA
+1.05V
power plane
C755
C755
+
+
220U-2.5V_3528
220U-2.5V_3528
D D
C C
B B
A A
U48G
AA33
VCC_0
W33
VCC_1
P33
VCC_2
N33
VCC_3
L33
VCC_4
J33
VCC_5
AA32
VCC_6
Y32
VCC_7
W32
VCC_8
V32
VCC_9
P32
VCC_10
N32
VCC_11
M32
VCC_12
L32
VCC_13
J32
VCC_14
AA31
VCC_15
W31
VCC_16
V31
VCC_17
T31
VCC_18
R31
VCC_19
P31
VCC_20
N31
VCC_21
M31
VCC_22
AA30
VCC_23
Y30
VCC_24
W30
VCC_25
V30
VCC_26
U30
VCC_27
T30
VCC_28
R30
VCC_29
P30
VCC_30
N30
VCC_31
M30
VCC_32
L30
VCC_33
AA29
VCC_34
Y29
VCC_35
W29
VCC_36
V29
VCC_37
U29
VCC_38
R29
VCC_39
P29
VCC_40
M29
VCC_41
L29
VCC_42
AB28
VCC_43
AA28
VCC_44
Y28
VCC_45
V28
VCC_46
U28
VCC_47
T28
VCC_48
R28
VCC_49
P28
VCC_50
N28
VCC_51
M28
VCC_52
L28
VCC_53
P27
VCC_54
N27
VCC_55
M27
VCC_56
L27
VCC_57
P26
VCC_58
N26
VCC_59
L26
VCC_60
N25
VCC_61
M25
VCC_62
L25
VCC_63
P24
VCC_64
N24
VCC_65
M24
VCC_66
AB23
VCC_67
AA23
VCC_68
Y23 P23 N23
M23
L23 AC22 AB22
Y22
W22
P22
N22
M22
L22 AC21 AA21
W21
N21
M21
L21 AC20 AB20
Y20
W20
P20
N20
M20
L20 AB19 AA19
Y19
N19
M19
L19
N18
M18
L18
P17
N17
M17
N16
M16
L16
VCC_69 VCC_70 VCC_71 VCC_72 VCC_73 VCC_74 VCC_75 VCC_76 VCC_77 VCC_78 VCC_79 VCC_80 VCC_81 VCC_82 VCC_83 VCC_84 VCC_85 VCC_86 VCC_87 VCC_88 VCC_89 VCC_90 VCC_91 VCC_92 VCC_93 VCC_94 VCC_95 VCC_96 VCC_97 VCC_98 VCC_99 VCC_100 VCC_101 VCC_102 VCC_103 VCC_104 VCC_105 VCC_106 VCC_107 VCC_108 VCC_109 VCC_110
5
VCC
VCC
Calistoga
Calistoga
VCC_SM_0 VCC_SM_1 VCC_SM_2 VCC_SM_3 VCC_SM_4 VCC_SM_5 VCC_SM_6 VCC_SM_7 VCC_SM_8
VCC_SM_9 VCC_SM_10 VCC_SM_11 VCC_SM_12 VCC_SM_13 VCC_SM_14 VCC_SM_15 VCC_SM_16 VCC_SM_17 VCC_SM_18 VCC_SM_19 VCC_SM_20 VCC_SM_21 VCC_SM_22 VCC_SM_23 VCC_SM_24 VCC_SM_25 VCC_SM_26 VCC_SM_27 VCC_SM_28 VCC_SM_29 VCC_SM_30 VCC_SM_31 VCC_SM_32 VCC_SM_33 VCC_SM_34 VCC_SM_35 VCC_SM_36 VCC_SM_37 VCC_SM_38 VCC_SM_39 VCC_SM_40 VCC_SM_41 VCC_SM_42 VCC_SM_43 VCC_SM_44 VCC_SM_45 VCC_SM_46 VCC_SM_47 VCC_SM_48 VCC_SM_49 VCC_SM_50 VCC_SM_51 VCC_SM_52 VCC_SM_53 VCC_SM_54 VCC_SM_55 VCC_SM_56 VCC_SM_57 VCC_SM_58 VCC_SM_59 VCC_SM_60 VCC_SM_61 VCC_SM_62 VCC_SM_63 VCC_SM_64 VCC_SM_65 VCC_SM_66 VCC_SM_67 VCC_SM_68 VCC_SM_69 VCC_SM_70 VCC_SM_71 VCC_SM_72 VCC_SM_73 VCC_SM_74 VCC_SM_75 VCC_SM_76 VCC_SM_77 VCC_SM_78 VCC_SM_79 VCC_SM_80 VCC_SM_81 VCC_SM_82 VCC_SM_83 VCC_SM_84 VCC_SM_85 VCC_SM_86 VCC_SM_87 VCC_SM_88 VCC_SM_89 VCC_SM_90 VCC_SM_91 VCC_SM_92 VCC_SM_93 VCC_SM_94 VCC_SM_95 VCC_SM_96 VCC_SM_97 VCC_SM_98 VCC_SM_99
VCC_SM_100 VCC_SM_101 VCC_SM_102 VCC_SM_103 VCC_SM_104 VCC_SM_105 VCC_SM_106 VCC_SM_107
S:3200mA
power plane
+1.8VSUS
AU41 AT41 AM41 AU40 BA34 AY34 AW34 AV34 AU34 AT34 AR34 BA30 AY30 AW30 AV30 AU30 AT30 AR30 AP30 AN30 AM30 AM29 AL29 AK29 AJ29 AH29 AJ28 AH28 AJ27 AH27 BA26 AY26 AW26 AV26 AU26 AT26 AR26 AJ26 AH26 AJ25 AH25 AJ24 AH24 BA23 AJ23 BA22 AY22 AW22 AV22 AU22 AT22 AR22 AP22 AK22 AJ22 AK21 AK20 BA19 AY19 AW19 AV19 AU19 AT19 AR19 AP19 AK19 AJ19 AJ18 AJ17 AH17 AJ16 AH16 BA15 AY15 AW15 AV15 AU15 AT15 AR15 AJ15 AJ14 AJ13 AH13 AK12 AJ12 AH12 AG12 AK11 BA8 AY8 AW8 AV8 AT8 AR8 AP8 BA6 AY6 AW6 AV6 AT6 AR6 AP6 AN6 AL6 AK6 AJ6 AV1 AJ1
25mils
C728 .47U-10V_6C728 .47U-10V_6
VCC_SM1 V15_TVDAC_R VCC_SM2
C334 .47U-10V_6C334 .47U-10V_6
25mils
C369
C369 .47U-10V_6
.47U-10V_6
C394
C394 .47U-10V_6
.47U-10V_6
25mils
VCC_SM106
C746 .47U-10V_6C746 .47U-10V_6
VCC_SM107
C429 .47U-10V_6C429 .47U-10V_6
C360
C360 .47U-10V_6
.47U-10V_6
4
+1.05V
+1.8VSUS
150U-4V_3528
150U-4V_3528
C747
C747
220U-2.5V_3528
220U-2.5V_3528
4
U48F
U48F
AD27
VCC_NCTF0
AC27
VCC_NCTF1
AB27
VCC_NCTF2
AA27
VCC_NCTF3
Y27
VCC_NCTF4
W27
VCC_NCTF5
V27
VCC_NCTF6
U27
VCC_NCTF7
T27
VCC_NCTF8
R27
VCC_NCTF9
AD26
VCC_NCTF10
AC26
VCC_NCTF11
AB26
VCC_NCTF12
AA26
VCC_NCTF13
Y26
VCC_NCTF14
W26
VCC_NCTF15
V26
VCC_NCTF16
U26
VCC_NCTF17
T26
VCC_NCTF18
R26
VCC_NCTF19
AD25
VCC_NCTF20
AC25
VCC_NCTF21
AB25
VCC_NCTF22
AA25
VCC_NCTF23
Y25
VCC_NCTF24
W25
VCC_NCTF25
V25
VCC_NCTF26
U25
VCC_NCTF27
T25
VCC_NCTF28
R25
VCC_NCTF29
AD24
VCC_NCTF30
AC24
VCC_NCTF31
AB24
VCC_NCTF32
AA24
VCC_NCTF33
Y24
VCC_NCTF34
W24
VCC_NCTF35
V24
VCC_NCTF36
U24
VCC_NCTF37
T24
VCC_NCTF38
R24
VCC_NCTF39
AD23
VCC_NCTF40
V23
VCC_NCTF41
U23
VCC_NCTF42
T23
VCC_NCTF43
R23
VCC_NCTF44
AD22
VCC_NCTF45
V22
VCC_NCTF46
U22
VCC_NCTF47
T22
VCC_NCTF48
R22
VCC_NCTF49
AD21
VCC_NCTF50
V21
VCC_NCTF51
U21
VCC_NCTF52
T21
VCC_NCTF53
R21
VCC_NCTF54
AD20
VCC_NCTF55
V20
VCC_NCTF56
U20
VCC_NCTF57
T20
VCC_NCTF58
R20
VCC_NCTF59
AD19
VCC_NCTF60
V19
VCC_NCTF61
U19
VCC_NCTF62
T19
VCC_NCTF63
AD18
VCC_NCTF64
AC18
VCC_NCTF65
AB18
VCC_NCTF66
AA18
VCC_NCTF67
Y18
VCC_NCTF68
W18
VCC_NCTF69
V18
VCC_NCTF70
U18
VCC_NCTF71
T18
VCC_NCTF72
120mils/near VCC_SM#
+
+
+1.05V
+
+
C736
C736
C370
C370
C390
C390
10U/X5R-6.3V_8
10U/X5R-6.3V_8
10U/X5R-6.3V_8
10U/X5R-6.3V_8
near VCC_NCTF#
C371
C371
C374
C374
10U/X5R-6.3V_8
10U/X5R-6.3V_8
10U/X5R-6.3V_8
10U/X5R-6.3V_8
NCTF
NCTF
Calistoga
Calistoga
C414
C414 .47U-10V_6
.47U-10V_6
C349
C349
1U-16V_6
1U-16V_6
C341
C341
.1U-10V_4
.1U-10V_4
VSS_NCTF0 VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7 VSS_NCTF8
VSS_NCTF9 VSS_NCTF10 VSS_NCTF11 VSS_NCTF12
VCCAUX_NCTF0 VCCAUX_NCTF1 VCCAUX_NCTF2 VCCAUX_NCTF3 VCCAUX_NCTF4 VCCAUX_NCTF5 VCCAUX_NCTF6 VCCAUX_NCTF7 VCCAUX_NCTF8
VCCAUX_NCTF9 VCCAUX_NCTF10 VCCAUX_NCTF11 VCCAUX_NCTF12 VCCAUX_NCTF13 VCCAUX_NCTF14 VCCAUX_NCTF15 VCCAUX_NCTF16 VCCAUX_NCTF17 VCCAUX_NCTF18 VCCAUX_NCTF19 VCCAUX_NCTF20 VCCAUX_NCTF21 VCCAUX_NCTF22 VCCAUX_NCTF23 VCCAUX_NCTF24 VCCAUX_NCTF25 VCCAUX_NCTF26 VCCAUX_NCTF27 VCCAUX_NCTF28 VCCAUX_NCTF29 VCCAUX_NCTF30 VCCAUX_NCTF31 VCCAUX_NCTF32 VCCAUX_NCTF33 VCCAUX_NCTF34 VCCAUX_NCTF35 VCCAUX_NCTF36 VCCAUX_NCTF37 VCCAUX_NCTF38 VCCAUX_NCTF39 VCCAUX_NCTF40 VCCAUX_NCTF41 VCCAUX_NCTF42 VCCAUX_NCTF43 VCCAUX_NCTF44 VCCAUX_NCTF45 VCCAUX_NCTF46 VCCAUX_NCTF47 VCCAUX_NCTF48 VCCAUX_NCTF49 VCCAUX_NCTF50 VCCAUX_NCTF51 VCCAUX_NCTF52 VCCAUX_NCTF53 VCCAUX_NCTF54 VCCAUX_NCTF55 VCCAUX_NCTF56 VCCAUX_NCTF57
C332
C332
C336
C336
.1U-10V_4
.1U-10V_4
.1U-10V_4
.1U-10V_4
C430
C430
.1U-10V_4
.1U-10V_4
.1U-10V_4
.1U-10V_4
AE27 AE26 AE25 AE24 AE23 AE22 AE21 AE20 AE19 AE18 AC17 Y17 U17
100mils or shape
+1.5V_AUX
AG27 AF27 AG26 AF26 AG25 AF25 AG24 AF24 AG23 AF23 AG22 AF22 AG21 AF21 AG20 AF20 AG19 AF19 R19 AG18 AF18 R18 AG17 AF17 AE17 AD17 AB17 AA17 W17 V17 T17 R17 AG16 AF16 AE16 AD16 AC16 AB16 AA16 Y16 W16 V16 U16 T16 R16 AG15 AF15 AE15 AD15 AC15 AB15 AA15 Y15 W15 V15 U15 T15 R15
C385
C385 .1U-10V_4
.1U-10V_4
C387
C387
3
+2.5V
.1U-10V_4
.1U-10V_4
+V1.5_3GPLL
60mils
C727
C727
C340
C340
10U/X5R-6.3V_8
10U/X5R-6.3V_8
.1U-10V_4
.1U-10V_4
+V2.5_CRTDAC
C373
C373
C375
C375
.022U-16V_4
.022U-16V_4
.1U-10V_4
.1U-10V_4
+2.5V
C335
C335
C330
C330
.01U-16V_4
.01U-16V_4
.1U-10V_4
.1U-10V_4
+V3.3_ATVBG
C388
C388
C383
C383
.1U-10V_4
.1U-10V_4
.022U-16V_4
.022U-16V_4
+1.5V
near VCCD_HMPLL#
C353
C353
C350
C350
.1U-10V_4
.1U-10V_4
10U/X5R-6.3V_8
10U/X5R-6.3V_8
+3V
near VCC_HV#
C367
C367
C734
C734
.1U-10V_4
.1U-10V_4
10U/X5R-6.3V_8
10U/X5R-6.3V_8
+2.5V
C348
C348
C351
C351
.1U-10V_4
.1U-10V_4
4.7U-10V_8
4.7U-10V_8
+1.5V +V1.5_DPLLA
S:50mA
L49
L49
L:155mA
10uH_8
10uH_8
+
+
C735
C735
330U-2.5V_7343
330U-2.5V_7343
S:50mA
L48
L48
L:155mA
10uH_8
10uH_8
+
+
C731
C731
330U-2.5V_7343
330U-2.5V_7343
S:45mA
L52
L52
L:150mA
BK1608LL121_6
BK1608LL121_6
C749
C749
10U/X5R-6.3V_8
10U/X5R-6.3V_8
S:45mA
L53
L53
L:150mA
BK1608LL121_6
BK1608LL121_6
C748
C748
10U/X5R-6.3V_8
10U/X5R-6.3V_8
3
C372
C372
+2.5V
+2.5V
S:70mA
+V1.5_DPLLB
S:10mA
S:120mA
40mils or shape
20 mil
C362
C362 .1U-10V_4
.1U-10V_4
+V1.5_DPLLB
20 mil
C333
C333 .1U-10V_4
.1U-10V_4
+V1.5_HPLL
20 mil
C432
C432 .1U-10V_4
.1U-10V_4
+V1.5_MPLL
20 mil
C421
C421
.1U-10V_4
.1U-10V_4
C342
C342
10U/X5R-6.3V_8
10U/X5R-6.3V_8
S:60mA
+V1.5_PCIE
C352
C352 .1U-10V_4
.1U-10V_4
S:2mA
+V1.5_HPLL
+V1.5_MPLL
+V3.3_ATVBG
+V3.3_ATVBG
+1.5V
+V1.5_TVDAC
+3V
+V1.5_QTVDAC
+1.5V_AUX
20mils
80mils
+V1.5_DPLLA
S:45mA
S:45mA
+V3.3_ATVBG
40 mil
40 mil
C412
C412
.22U-6.3V_4
.22U-6.3V_4
S:50mAS:50mA
S:150mA
S:20mA
.22U-6.3V_4
.22U-6.3V_4
2
U48H
U48H
H22
VCCSYNC
C30
VCC_TXLVDS0
B30
VCC_TXLVDS1
A30
VCC_TXLVDS2
AJ41
VCC3G0
AB41
VCC3G1
Y41
VCC3G2
V41
VCC3G3
R41
VCC3G4
N41
VCC3G5
L41
VCC3G6
AC33
VCCA_3GPLL
G41
VCCA_3GBG
H41
VSSA_3GBG
F21
VCCA_CRTDAC0
E21
VCCA_CRTDAC1
G21
VSSA_CRTDAC
B26
VCCA_DPLLA
C39
VCCA_DPLLB
AF1
VCCA_HPLL
A38
VCCA_LVDS
B39
VSSA_LVDS
AF2
VCCA_MPLL
H20
VCCA_TVBG
G20
VSSA_TVBG
E19
VCCA_TVDACA0
F19
VCCA_TVDACA1
C20
VCCA_TVDACB0
D20
VCCA_TVDACB1
E20
VCCA_TVDACC0
F20
AH1 AH2
A28 B28 C28
D21 A23
B23 B25
H19
AK31 AF31 AE31 AC31 AL30 AK30 AJ30 AH30
AG30
AF30 AE30 AD30 AC30
AG29
AF29 AE29 AD29 AC29
AG28
AF28 AE28 AH22 AJ21 AH21 AJ20 AH20 AH19
P19 P16
AH15
P15
AH14
AG14
AF14 AE14
Y14 AF13 AE13 AF12 AE12 AD12
C425
C425
POWER
POWER
VCCA_TVDACC1 VCCD_HMPLL0
VCCD_HMPLL1 VCCD_LVDS0
VCCD_LVDS1 VCCD_LVDS2
VCCD_TVDAC VCC_HV0
VCC_HV1 VCC_HV2
VCCD_QTVDAC VCCAUX0
VCCAUX1 VCCAUX2 VCCAUX3 VCCAUX4 VCCAUX5 VCCAUX6 VCCAUX7 VCCAUX8 VCCAUX9 VCCAUX10 VCCAUX11 VCCAUX12 VCCAUX13 VCCAUX14 VCCAUX15 VCCAUX16 VCCAUX17 VCCAUX18 VCCAUX19 VCCAUX20 VCCAUX21 VCCAUX22 VCCAUX23 VCCAUX24 VCCAUX25 VCCAUX26 VCCAUX27 VCCAUX28 VCCAUX29 VCCAUX30 VCCAUX31 VCCAUX32 VCCAUX33 VCCAUX34 VCCAUX35 VCCAUX36 VCCAUX37 VCCAUX38 VCCAUX39 VCCAUX40
Calistoga
Calistoga
+1.05V +1.05V
C410
C410
.47U-10V_6
.47U-10V_6
.47U-10V_6
.47U-10V_6
C395
C395
2
120mils/near VTT_#
+
+
220U-2.5V_3528
220U-2.5V_3528
C391
C391
VTT_0 VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8
VTT_9 VTT_10 VTT_11 VTT_12 VTT_13 VTT_14 VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22 VTT_23 VTT_24 VTT_25 VTT_26 VTT_27 VTT_28 VTT_29 VTT_30 VTT_31 VTT_32 VTT_33 VTT_34 VTT_35 VTT_36 VTT_37 VTT_38 VTT_39 VTT_40 VTT_41 VTT_42 VTT_43 VTT_44 VTT_45 VTT_46 VTT_47 VTT_48 VTT_49 VTT_50 VTT_51 VTT_52 VTT_53 VTT_54 VTT_55 VTT_56 VTT_57 VTT_58 VTT_59 VTT_60 VTT_61 VTT_62 VTT_63 VTT_64 VTT_65 VTT_66 VTT_67 VTT_68 VTT_69 VTT_70 VTT_71 VTT_72 VTT_73 VTT_74 VTT_75 VTT_76
4.7U-10V_8
4.7U-10V_8
C364
C364
AC14 AB14 W14 V14 T14 R14 P14 N14 M14 L14 AD13 AC13 AB13 AA13 Y13 W13 V13 U13 T13 R13 N13 M13 L13 AB12 AA12 Y12 W12 V12 U12 T12 R12 P12 N12 M12 L12 R11 P11 N11 M11 R10 P10 N10 M10 P9 N9 M9 R8 P8 N8 M8 P7 N7 M7 R6 P6 M6 A6 R5 P5 N5 M5 P4 N4 M4 R3 P3 N3 M3 R2 P2 M2 D2 AB1 R1 P1 N1 M1
2.2U-6.3V_6
2.2U-6.3V_6
+1.05V
S:800mA
C416
C416
1
40 mil
+V1.5_TVDAC +1.5V
C378
C378 .022U-16V_4
.022U-16V_4
40 mil
+V1.5_QTVDAC
C380
C380 .1U-10V_4
.1U-10V_4
R212
R212 10_4
10_4
L22 BK1608LL121_6L22 BK1608LL121_6
L:150mA S:70mA
80mils
C726
C726
C725
C725
10U/X5R-6.3V_8
10U/X5R-6.3V_8
10U/X5R-6.3V_8
10U/X5R-6.3V_8
R503
R503
0.5/F_6
0.5/F_6
60mils
+1.5V_AUX +1.5V
100mil or shape
R555 0_8R555 0_8
C346
C346 .1U-10V_4
.1U-10V_4
+V3.3_TVDAC
L21
L21
10uH_8
10uH_8
C739
C739
22U-6.3V_8
22U-6.3V_8
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
80mils
C354
C354
.1U-10V_4
.1U-10V_4
+V1.5_PCIE
+V3.3_TVDAC
L:155mA S:120mA
C363
C363
10U/X5R-6.3V_8
10U/X5R-6.3V_8
C376
C376 .1U-10V_4
.1U-10V_4
C384
C384 .022U-16V_4
.022U-16V_4
+
+
3GPLL_FB_R
S:1900mA
.1U-10V_4
.1U-10V_4
.1U-10V_4
.1U-10V_4
GMCH (POWER)
GMCH (POWER)
GMCH (POWER)
L50
L50
BK1608LL121_6
BK1608LL121_6
L:150mA
L51
L51
BK1608LL121_6
BK1608LL121_6
L:150mA
D5 PDZ5.6BD5PDZ5.6B
21
L47
L47 91nH
91nH
L:1500mA
C723
C723
S:1500mA
220U-2.5V_3528
220U-2.5V_3528
L46
L46 1uH_6
1uH_6
L:25mA S: ? mA
30mils
V1_5SFOLLOW
R198
R198 10_4
10_4
R196 0_8R196 0_8
C738
C738
C379
C379
C740
C740 .1U-10V_4
.1U-10V_4
Quanta Computer Inc.
Quanta Computer Inc.
1
R528
R528
S:24mA
60mils
+1.05V +V2.5_CRTDAC
R215 *0_6R215 *0_6
+1.05V+2.5V
+V2.5_CRTDAC
20mils
+1.5V
R504
R504 0_8
0_8
PCIE_L
+1.5V+V1.5_3GPLL
R501
R501 0_8
0_8
3GPLL_FB_L
D4 PDZ5.6BD4 PDZ5.6B
60mils
+3V
+1.5V
21
80mils
+V3.3_ATVBG
+V3.3_ATVBG
C382
C382
.022U-16V_4
.022U-16V_4
+V3.3_ATVBG
+V3.3_ATVBG
C377
C377 022U-16V_4
022U-16V_4
+V3.3_ATVBG
+V3.3_ATVBG
C381
C381 .022U-16V_4
.022U-16V_4
PROJECT : ZE2
PROJECT : ZE2
942Thursday, June 08, 2006
942Thursday, June 08, 2006
942Thursday, June 08, 2006
0_8
0_8
B2A
B2A
B2A
of
of
of
1
+1.8VSUS +1.8VSUS
1
3
R_A_MD5 R_A_DQS#0
A A
B B
CKE0[7,11]
R_A_BS2#[8,11]
R_A_BS0#[8,11]
R_A_BMWEA#[8,11]
R_A_SCASA#[8,11]
SM_CS1#[7,11] M_ODT1[7,11]
C C
D D
R_A_DQS0 R_A_MD3
R_A_MD2 R_A_MD14
R_A_MD8 R_A_DQS#1
R_A_DQS1 R_A_MD9
R_A_MD15
R_A_MD17 R_A_MD21
R_A_DQS#2 R_A_DQS2
R_A_MD23 R_A_MD19
R_A_MD29 R_A_MD28
R_A_DM3
R_A_MD26 R_A_MD27
CKE0
R_A_BS2# R_A_MA12
R_A_MA9 R_A_MA8
R_A_MA5 R_A_MA3 R_A_MA1
R_A_MA10 R_A_BS0#
R_A_BMWEA# R_A_SCASA#
SM_CS1# M_ODT1 R_A_MD36
R_A_MD35 R_A_DQS#4
R_A_DQS4 R_A_MD34
R_A_MD33 R_A_MD44
R_A_MD45 R_A_DM5 R_A_MD47
R_A_MD46 R_A_MD49
R_A_MD48
R_A_DQS#6 R_A_DQS6
R_A_MD62 R_A_MD63 R_A_MD58 R_A_MD59
R_A_DM7 R_A_DQS#7 R_A_MD56
R_A_MD60 R_A_MD61 CGDAT_SMB
CGCLK_SMB
+3V
5
7
9
11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97
99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199
SMbus address A0
1
2
+0.9VSUS
JDIM2
JDIM2
VREF VSS47 DQ0 DQ1 VSS37 DQS#0 DQS0 VSS48 DQ2 DQ3 VSS38 DQ8 DQ9 VSS49 DQS#1 DQS1 VSS39 DQ10 DQ11 VSS50
VSS18 DQ16 DQ17 VSS1 DQS#2 DQS2 VSS19 DQ18 DQ19 VSS22 DQ24 DQ25 VSS23 DM3 NC4 VSS9 DQ26 DQ27 VSS4 CKE0 VDD7 NC1 A16_BA2 VDD9 A12 A9 A8 VDD5 A5 A3 A1 VDD10 A10/AP BA0 WE# VDD2 CAS# S1# VDD3 ODT1 VSS11 DQ32 DQ33 VSS26 DQS#4 DQS4 VSS2 DQ34 DQ35 VSS27 DQ40 DQ41 VSS29 DM5 VSS51 DQ42 DQ43 VSS40 DQ48 DQ49 VSS52 NCTEST VSS30 DQS#6 DQS6 VSS31 DQ50 DQ51 VSS33 DQ56 DQ57 VSS3 DM7 VSS34 DQ58 DQ59 VSS14 SDA SCL VDD(SPD)
PC4800_DDR2_5.2MM_RVS
PC4800_DDR2_5.2MM_RVS
2
VSS46
4
DQ4
6
DQ5
8
VSS15
10
DM0
12
VSS5
14
DQ6
16
DQ7
18
VSS16
20
DQ12
22
DQ13
24
VSS17
26
DM1
28
VSS53
30
CK0
32
CK0#
34
VSS41
36
DQ14
38
DQ15
40
VSS54
42
VSS20
44
DQ20
46
DQ21
48
VSS6
50
NC3
52
DM2
54
VSS21
56
DQ22
58
DQ23
60
VSS24
62
DQ28
64
DQ29
66
VSS25
68
DQS#3
70
DQS3
72
VSS10
74
DQ30
76
DQ31
78
VSS8
80
CKE1
82
VDD8
84
A15
86
A14
88
VDD11
90
A11
92
A7
94
A6
96
VDD4
98
A4
100
A2
102
A0
104
VDD12
106
BA1
108
RAS#
110
S0#
112
VDD1
114
ODT0
116
A13
118
PC4800 DDR2 SDRAM
SO-DIMM (200P)
PC4800 DDR2 SDRAM
SO-DIMM (200P)
VDD6
120
NC2
122
VSS12
124
DQ36
126
DQ37
128
VSS28
130
DM4
132
VSS42
134
DQ38
136
DQ39
138
VSS55
140
DQ44
142
DQ45
144
VSS43
146
DQS#5
148
DQS5
150
VSS56
152
DQ46
154
DQ47
156
VSS44
158
DQ52
160
DQ53
162
VSS57
164
CK1
166
CK1#
168
VSS45
170
DM6
172
VSS32
174
DQ54
176
DQ55
178
VSS35
180
DQ60
182
DQ61
184
VSS7
186
DQS#7
188
DQS7
190
VSS36
192
DQ62
194
DQ63
196
VSS13
198
SA0
200
SA1
CLOCK 0,1,2
CKE 0,1
2
R_A_MD4 R_A_MD0R_A_MD1
R_A_DM0 R_A_MD7
R_A_MD6 R_A_MD13
R_A_MD12 R_A_DM1
CLK_SDRAM0
CLK_SDRAM0#
R_A_MD10 R_A_MD11
R_A_MD20 R_A_MD16
R_A_DM2 R_A_MD18
R_A_MD22 R_A_MD25
R_A_MD24 R_A_DQS#3
R_A_DQS3 R_A_MD30
R_A_MD31 CKE1
R_A_MA11 R_A_MA7 R_A_MA6
R_A_MA4 R_A_MA2 R_A_MA0
R_A_BS1# R_A_SRASA#
SM_CS0#
M_ODT0 R_A_MA13
R_A_MD32 R_A_MD37
R_A_DM4 R_A_MD39
R_A_MD38 R_A_MD41
R_A_MD40 R_A_DQS#5
R_A_DQS5 R_A_MD43
R_A_MD42 R_A_MD52
R_A_MD53 CLK_SDRAM1
CLK_SDRAM1# R_A_DM6 R_A_MD54R_A_MD55
R_A_MD50R_A_MD51
R_A_DQS7
R_A_MD57
R178
R178 10K
10K
3
CLK_SDRAM0 [7] CLK_SDRAM0# [7]
CKE1 [7,11]
R_A_BS1# [8,11] R_A_SRASA# [8,11] SM_CS0# [7,11]
M_ODT0 [7,11]
R174
R174 10K
10K
3
R_A_DM[7:0] [8] R_A_MD[63:0] [8] R_A_DQS[7:0] [8] R_A_DQS#[7:0] [8] R_A_MA[13:0] [8,11]
CLK_SDRAM1 [7] CLK_SDRAM1# [7]
4
+1.8VSUS +1.8VSUS
R_B_MD1 R_B_MD5
R_B_DQS#0 R_B_DQS0
R_B_MD2 R_B_MD3
R_B_MD8 R_B_MD9
R_B_DQS#1 R_B_DQS1
R_B_MD11 R_B_MD10
R_B_MD17 R_B_MD20
R_B_DQS#2 R_B_DQS2
R_B_MD19
R_B_MD29 R_B_MD28
R_B_DM3
R_B_MD26 R_B_MD27
+3V
CKE2
R_B_BS2# R_B_MA12
R_B_MA9
R_B_MA5 R_B_MA3 R_B_MA1
R_B_MA10 R_B_BS0#
R_B_BMWEA# R_B_SCASA#
SM_CS3# M_ODT3 R_B_MD32
R_B_MD33 R_B_DQS#4
R_B_DQS4 R_B_MD34
R_B_MD35 R_B_MD44
R_B_MD45 R_B_DM5
R_B_MD42 R_B_MD52
R_B_MD53
R_B_DQS#6 R_B_DQS6
R_B_MD54 R_B_MD50
R_B_MD57 R_B_MD60
R_B_DM7 R_B_MD59
R_B_MD62 CGDAT_SMB
CGCLK_SMB
CKE2[7,11] CKE3 [7,11]
R_B_BS2#[8,11]
R_B_BS0#[8,11]
R_B_BMWEA#[8,11]
R_B_SCASA#[8,11]
SM_CS3#[7,11] M_ODT3[7,11]
CGDAT_SMB[3] CGCLK_SMB[3]
SMbus address A1
4
5
+0.9VSUS
JDIM1
JDIM1
1
VREF
3
VSS47
5
DQ0
7
DQ1
9
VSS37
11
DQS#0
13
DQS0
15
VSS48
17
DQ2
19
DQ3
21
VSS38
23
DQ8
25
DQ9
27
VSS49
29
DQS#1
31
DQS1
33
VSS39
35
DQ10
37
DQ11
39
VSS50
41
VSS18
43
DQ16
45
DQ17
47
VSS1
49
DQS#2
51
DQS2
53
VSS19
55
DQ18
57
DQ19
59
VSS22
61
DQ24
63
DQ25
65
VSS23
67
DM3
69
NC4
71
VSS9
73
DQ26
75
DQ27
77
VSS4
79
CKE0
81
VDD7
83
NC1
85
A16_BA2
87
VDD9
89
A12
91
A9
93
A8
95
VDD5
97
A5
99
A3
101
A1
103
VDD10
105
A10/AP
107
BA0
109
WE#
111
VDD2
113
CAS#
115
S1#
117
VDD3
119
ODT1
121
VSS11
123
DQ32
125
DQ33
127
VSS26
129
DQS#4
131
DQS4
133
VSS2
135
DQ34
137
DQ35
139
VSS27
141
DQ40
143
DQ41
145
VSS29
147
DM5
149
VSS51
151
DQ42
153
DQ43
155
VSS40
157
DQ48
159
DQ49
161
VSS52
163
NCTEST
165
VSS30
167
DQS#6
169
DQS6
171
VSS31
173
DQ50
175
DQ51
177
VSS33
179
DQ56
181
DQ57
183
VSS3
185
DM7
187
VSS34
189
DQ58
191
DQ59
193
VSS14
195
SDA
197
SCL
199
VDD(SPD)
PC4800_DDR2_9.2MM_RVS
PC4800_DDR2_9.2MM_RVS
CLOCK 3,4,5
CKE 2,3
5
6
2
VSS46
4
DQ4
6
DQ5
8
VSS15
10
DM0
12
VSS5
14
DQ6
16
DQ7
18
VSS16
20
DQ12
22
DQ13
24
VSS17
26
DM1
28
VSS53
30
CK0
32
CK0#
34
VSS41
36
DQ14
38
DQ15
40
VSS54
42
VSS20
44
DQ20
46
DQ21
48
VSS6
50
NC3
52
DM2
54
VSS21
56
DQ22
58
DQ23
60
VSS24
62
DQ28
64
DQ29
66
VSS25
68
DQS#3
70
DQS3
72
VSS10
74
DQ30
76
DQ31
78
VSS8
80
CKE1
82
VDD8
84
A15
86
A14
88
VDD11
90
A11
92
A7
94
A6
96
VDD4
98
A4
100
A2
102
A0
104
VDD12
106
BA1
108
RAS#
110
S0#
112
VDD1
114
ODT0
116
A13
118
PC4800 DDR2 SDRAM
SO-DIMM (200P)
PC4800 DDR2 SDRAM
SO-DIMM (200P)
VDD6
120
NC2
122
VSS12
124
DQ36
126
DQ37
128
VSS28
130
DM4
132
VSS42
134
DQ38
136
DQ39
138
VSS55
140
DQ44
142
DQ45
144
VSS43
146
DQS#5
148
DQS5
150
VSS56
152
DQ46
154
DQ47
156
VSS44
158
DQ52
160
DQ53
162
VSS57
164
CK1
166
CK1#
168
VSS45
170
DM6
172
VSS32
174
DQ54
176
DQ55
178
VSS35
180
DQ60
182
DQ61
184
VSS7
186
DQS#7
188
DQS7
190
VSS36
192
DQ62
194
DQ63
196
VSS13
198
SA0
200
SA1
R_B_MD0 R_B_MD4
R_B_DM0 R_B_MD7
R_B_MD6 R_B_MD12
R_B_MD13 R_B_DM1 CLK_SDRAM4
CLK_SDRAM4# R_B_MD15
R_B_MD14
R_B_MD16 R_B_MD21
R_B_DM2 R_B_MD18
R_B_MD22R_B_MD23 R_B_MD24
R_B_MD25 R_B_DQS#3
R_B_DQS3 R_B_MD31
R_B_MD30 CKE3
R_B_MA11 R_B_MA7 R_B_MA6R_B_MA8
R_B_MA4 R_B_MA2 R_B_MA0
R_B_BS1# R_B_SRASA#
SM_CS2#
M_ODT2 R_B_MA13
R_B_MD37 R_B_MD36
R_B_DM4 R_B_MD38
R_B_MD39 R_B_MD40
R_B_MD41 R_B_DQS#5
R_B_DQS5 R_B_MD47R_B_MD46
R_B_MD43 R_B_MD48
R_B_MD49
CLK_SDRAM3
CLK_SDRAM3#
R_B_DM6 R_B_MD55
R_B_MD51 R_B_MD56
R_B_MD61 R_B_DQS#7
R_B_DQS7 R_B_MD63
R_B_MD58
R179
R179 10K
10K
+3V
R177
R177 10K
10K
6
R_B_DM[7:0] [8] R_B_MD[63:0] [8] R_B_DQS[7:0] [8] R_B_DQS#[7:0] [8] R_B_MA[13:0] [8,11]
CLK_SDRAM4 [7] CLK_SDRAM4# [7]
PM_EXTTS#0 [7]PM_EXTTS#0 [7]
R_B_BS1# [8,11] R_B_SRASA# [8,11]
SM_CS2# [7,11]
M_ODT2 [7,11]
CLK_SDRAM3 [7]
CLK_SDRAM3# [7]
7
+1.8VSUS
2.2U
2.2U
+1.8VSUS
+1.8VSUS
2.2U
2.2U
+1.8VSUS
C181
C181
C260
C260 .1U
.1U
C236
C236
C218
C218 .1U
.1U
Close to JDIMM1
C228
C228
C211
C211
2.2U
2.2U
2.2U
2.2U
C191
C182
C182 .1U
.1U
C191 .1U
.1U
C209
C209 .1U
.1U
Close to JDIMM2
C265
C265
C212
C212
2.2U
2.2U
2.2U
2.2U
C229
C180
C180 .1U
.1U
+0.9VSUS
C229 .1U
.1U
C50
C50 .1U
.1U
C226
C226 .1U
.1U
2.2U
2.2U
2.2U
2.2U
C261
C261
+3V
C267
C267
+3V
C343
C343
2.2U
2.2U
C339
C339
2.2U
2.2U
C43
C43
2.2U
2.2U
2.2U
2.2U
2.2U
2.2U
8
C268
C268
C221
C221
C344
C344 .1U
.1U
C347
C347 .1U
.1U
Place Close to JDIMM1
+0.9VSUS
C45
C45
C41
C41
.1U
.1U
2.2U
2.2U
Place Close to JDIMM2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDR2 SO-DIMM (200P)
DDR2 SO-DIMM (200P)
DDR2 SO-DIMM (200P)
Date: Sheet
Date: Sheet
Date: Sheet
7
PROJECT : ZE2
PROJECT : ZE2
Quanta Computer Inc.
Quanta Computer Inc.
of
of
of
10 42Thursday, June 08, 2006
10 42Thursday, June 08, 2006
10 42Thursday, June 08, 2006
8
B2A
B2A
B2A
1
A A
2
3
+0.9V
C300
C300 .1U
.1U
C294
C294 .1U
.1U
4
C150
C150 .1U
.1U
C179
C179 .1U
.1U
C276
C276 .1U
.1U
C287
C287 .1U
.1U
5
C292
C292 .1U
.1U
C293
C293 .1U
.1U
C227
C227 .1U
.1U
C299
C299 .1U
.1U
6
C311
C311
C290
C290
.1U
.1U
.1U
.1U
C281
C281 .1U
.1U
7
8
Layout note: Place one cap close to every 2 pullup resistors terminated to SMDDR_VTERM
+0.9V
C270
R_A_MA[0..13] [8,10]
C156
C156 .1U
.1U
C314
C314 .1U
.1U
C178
C178 .1U
.1U
C288
C288 .1U
.1U
C313
C313 .1U
.1U
C168
C168 .1U
.1U
C153
C153 .1U
.1U
C295
C295 .1U
.1U
C289
C289 .1U
.1U
C302
C302 .1U
.1U
C277
C277 .1U
.1U
C171
C171 .1U
.1U
C270 .1U
.1U
R_B_MA[0..13] [8,10]
B B
R_B_MA0 R_B_MA2
CKE0[7,10]
R_A_BS2#[8,10]
R_B_SRASA#[8,10]
SM_CS2#[7,10] M_ODT1[7,10] SM_CS1#[7,10]
R_A_BS0#[8,10]
C C
M_ODT2[7,10]
CKE1[7,10]
R_B_BS2#[8,10]
CKE2[7,10]
R_B_BS1#[8,10]
CKE0 R_A_BS2# R_A_MA4 R_A_MA2
R_B_SRASA# SM_CS2# M_ODT1 SM_CS1# R_A_MA10 R_A_BS0# M_ODT2 R_B_MA13 CKE1 R_A_MA11 R_B_MA6 R_B_MA7
R_B_BS2# CKE2 R_B_MA4 R_B_BS1# R_B_MA5 R_B_MA9
2
RP18 56X2RP18 56X2
4 2
RP2 56X2RP2 56X2
4 2
RP14 56X2RP14 56X2
4
2
RP20 56X2RP20 56X2
4 4
RP25 56X2RP25 56X2
2 4
RP17 56X2RP17 56X2
2 2
RP24 56X2RP24 56X2
4 2
RP4 56X2RP4 56X2
4 2
RP9 56X2RP9 56X2
4
2
RP3 56X2RP3 56X2
4 2
RP12 56X2RP12 56X2
4 2
RP11 56X2RP11 56X2
4
1 3 1 3 1 3
1 3 3 1 3 1 1 3 1 3 1 3
1 3 1 3 1 3
Layout note: Place one cap close to every 2 pullup resistors terminated to SMDDR_VTERM
R_A_MA9 R_A_MA12
M_ODT3[7,10] SM_CS3#[7,10]
+0.9V +0.9V
+0.9V
+0.9V
R_B_SCASA#[8,10]
R_B_BMWEA#[8,10]
CKE3[7,10]
R_A_BMWEA#[8,10]
R_A_SCASA#[8,10]
R_B_BS0#[8,10]
M_ODT3 SM_CS3# R_B_SCASA# R_B_BMWEA#
CKE3 R_B_MA11 R_B_MA8 R_B_MA12 R_A_MA1 R_A_MA8 R_A_MA7 R_A_MA6
R_A_BMWEA# R_A_SCASA# R_B_MA1 R_B_MA3 R_B_BS0# R_B_MA10
2
RP7 56X2RP7 56X2
4 2
RP26 56X2RP26 56X2
4 2
RP22 56X2RP22 56X2
4
2
RP6 56X2RP6 56X2
4 2
RP5 56X2RP5 56X2
4 2
RP10 56X2RP10 56X2
4 2
RP8 56X2RP8 56X2
4
4
RP21 56X2RP21 56X2
2 2
RP15 56X2RP15 56X2
4 2
RP19 56X2RP19 56X2
4
1 3 1 3 1 3
1 3 1 3 1 3 1 3
3 1 1 3 1 3
+0.9V
+0.9V
R_A_MA5 R_A_MA3
SM_CS0#[7,10]
D D
R_A_SRASA#[8,10]
M_ODT0[7,10]
R_A_BS1#[8,10]
1
SM_CS0# R_A_SRASA# R_A_MA13 M_ODT0 R_A_MA0 R_A_BS1#
2
4
RP13 56X2RP13 56X2
2 4
RP23 56X2RP23 56X2
2 2
RP27 56X2RP27 56X2
4 2
RP16 56X2RP16 56X2
4
3 1 3 1 1 3 1 3
3
+0.9V
PROJECT : ZE2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDR2 RES. ARRAY
DDR2 RES. ARRAY
DDR2 RES. ARRAY
Date: Sheet
Date: Sheet
4
5
Date: Sheet
6
PROJECT : ZE2
Quanta Computer Inc.
Quanta Computer Inc.
11 42Thursday, June 08, 2006
11 42Thursday, June 08, 2006
11 42Thursday, June 08, 2006
of
of
7
of
8
B2A
B2A
B2A
5
GMCHEXP_TXP[0..15][7] GMCHEXP_TXN[0..15][7]
GMCHEXP_RXP[0..15][7,16]
D D
C C
+1.2V
L13 EXT@BLM11A121S_6L13 EXT@BLM11A121S_6
1 2
L:200mA
NVDD
B B
+1.2V
L15 EXT@10NH_8L15 EXT@10NH_8
L:300mA
A A
5
GMCHEXP_RXN[0..15][7,16]
S:10mA
20mil
G72_PLLVDD
S:7200mA
12
C141
C141 EXT@100P_4
EXT@100P_4
12
C174
C174 EXT@220P_4
EXT@220P_4
12
C165
C165 EXT@220P_4
EXT@220P_4
12
C147
C147 EXT@10U_6.3V_6
EXT@10U_6.3V_6
12
C676
C676 EXT@4.7U_6.3V_6
EXT@4.7U_6.3V_6
12
C132
C132 EXT@4.7U_6.3V_6
EXT@4.7U_6.3V_6
power plane
12
C159
C159 EXT@0.01U_4
EXT@0.01U_4
12
C173
C173 EXT@100P_4
EXT@100P_4
12
C160
C160 EXT@0.01U_4
EXT@0.01U_4
12
C197
C197 EXT@1U_6.3V_4
EXT@1U_6.3V_4
12
C142
C142 EXT@0.1U_4
EXT@0.1U_4
12
C163
C163 EXT@0.01U_4
EXT@0.01U_4
12
C138
C138 EXT@220P_4
EXT@220P_4
12
C162
C162 EXT@220P_4
EXT@220P_4
12
C148
C148 EXT@10U_6.3V_6
EXT@10U_6.3V_6
12
C208
C208 EXT@1U_6.3V_4
EXT@1U_6.3V_4
12
C164
C164 EXT@100P_4
EXT@100P_4
12
C161
C161 EXT@100P_4
EXT@100P_4
12
C140
C140 EXT@220P_4
EXT@220P_4
PLACE NEAR BALLS
S:120mA
40mil
PEX_PLL_VDD
12
C155
C155 EXT@0.1U_4
EXT@0.1U_4
Kevin:4/20 vender suggestion for L97 to IND 10nH
4
CLK_PCIE_VGA[3] CLK_PCIE_VGA#[3]
12
C172
C172 EXT@0.01U_4
EXT@0.01U_4
12
C137
C137 EXT@1U_6.3V_4
EXT@1U_6.3V_4
12
C143
C143 EXT@10U_6.3V_6
EXT@10U_6.3V_6
12
C184
C184 EXT@0.01U_4
EXT@0.01U_4
4
GMCHEXP_TXP0 GMCHEXP_TXN0
GMCHEXP_TXP1 GMCHEXP_TXN1
GMCHEXP_TXP2 GMCHEXP_TXN2
GMCHEXP_TXP3 GMCHEXP_TXN3
GMCHEXP_TXP4 GMCHEXP_TXN4
GMCHEXP_TXP5 GMCHEXP_TXN5
GMCHEXP_TXP6 GMCHEXP_TXN6
GMCHEXP_TXP7 GMCHEXP_TXN7
GMCHEXP_TXP8 GMCHEXP_TXN8
GMCHEXP_TXP9 GMCHEXP_TXN9
GMCHEXP_TXP10 GMCHEXP_TXN10
GMCHEXP_TXP11 GMCHEXP_TXN11
GMCHEXP_TXP12 GMCHEXP_TXN12
GMCHEXP_TXP13 GMCHEXP_TXN13
GMCHEXP_TXP14 GMCHEXP_TXN14
GMCHEXP_TXP15 GMCHEXP_TXN15
G72_PLLVDD
S:100mA
S:20mA
AG10
AF10 AF11
AG12 AG13
AG15 AG16
AF16 AF17
AG18 AG19
AF19 AF20
AG21 AG22
AF22 AF23
AG24 AG25
AG26
AF27
W13 M14
M15
W15 M16
W16 M17
AF1 AG2
AG3 AG4
AF4 AF5
AG6 AG7
AF7 AF8
AG9
AE3 AE4
M9
J10
J11 M11 N11 R11 T11
L12 M12 T12 U12
L13 M13 T13 U13
T14
L15 T15
U15
L16 T16
U16
N17 R17 T17
AA5
AA6
U45A
U45A
PEX_RX0P PEX_RX0N
PEX_RX1P PEX_RX1N
PEX_RX2P PEX_RX2N
PEX_RX3P PEX_RX3N
PEX_RX4P PEX_RX4N
PEX_RX5P PEX_RX5N
PEX_RX6P PEX_RX6N
PEX_RX7P PEX_RX7N
PEX_RX8P PEX_RX8N
PEX_RX9P PEX_RX9N
PEX_RX10P PEX_RX10N
PEX_RX11P PEX_RX11N
PEX_RX12P PEX_RX12N
PEX_RX13P PEX_RX13N
PEX_RX14P PEX_RX14N
PEX_RX15P PEX_RX15N
PEX_REFCLK PEX_REFCLK#
J9
VDD_01 VDD_02
N9
VDD_03
R9
VDD_04
T9
VDD_05 VDD_06 VDD_07 VDD_08 VDD_09 VDD_10 VDD_11 VDD_12 VDD_13 VDD_14 VDD_15 VDD_16 VDD_17 VDD_18 VDD_19 VDD_20 VDD_21 VDD_22 VDD_23 VDD_24 VDD_25 VDD_26 VDD_27 VDD_28 VDD_29 VDD_30 VDD_31 VDD_32 VDD_33 VDD_34 VDD_35 VDD_36
Y6
PEX_PLLAVDD
PEX_PLLDVDD
PEX_PLLGND
EXT@G72M
EXT@G72M
Clock
Clock
PART 1 OF 4
PART 1 OF 4
P
P C
C I
I
-
­E
E X
X P
P R
R E
E S
S S
S
I
I N
N T
T E
E R
R F
F A
A C
C E
E
PCIE Power
PCIE Power
3
PEX_TX0P PEX_TX0N
PEX_TX1P PEX_TX1N
PEX_TX2P PEX_TX2N
PEX_TX3P PEX_TX3N
PEX_TX4P PEX_TX4N
PEX_TX5P PEX_TX5N
PEX_TX6P PEX_TX6N
PEX_TX7P PEX_TX7N
PEX_TX8P PEX_TX8N
PEX_TX9P PEX_TX9N
PEX_TX10P PEX_TX10N
PEX_TX11P PEX_TX11N
PEX_TX12P PEX_TX12N
PEX_TX13P PEX_TX13N
PEX_TX14P PEX_TX14N
PEX_TX15P PEX_TX15N
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#
PEX_RST#
PEX_IOVDD_01 PEX_IOVDD_02 PEX_IOVDD_03 PEX_IOVDD_04 PEX_IOVDD_05 PEX_IOVDD_06 PEX_IOVDD_07 PEX_IOVDD_08
PEX_IOVDDQ_01 PEX_IOVDDQ_02 PEX_IOVDDQ_03 PEX_IOVDDQ_04 PEX_IOVDDQ_05 PEX_IOVDDQ_06 PEX_IOVDDQ_07 PEX_IOVDDQ_08 PEX_IOVDDQ_09 PEX_IOVDDQ_10 PEX_IOVDDQ_11 PEX_IOVDDQ_12 PEX_IOVDDQ_13 PEX_IOVDDQ_14 PEX_IOVDDQ_15 PEX_IOVDDQ_16 PEX_IOVDDQ_17 PEX_IOVDDQ_18 PEX_IOVDDQ_19
VDD_LP_01 VDD_LP_02 VDD_LP_03 VDD_LP_04
VDD33_01 VDD33_02 VDD33_03 VDD33_04 VDD33_05 VDD33_06
NC_01 NC_02 NC_03 NC_04
3
V_GMCHEXP_RXP0 GMCHEXP_RXP0
AD5
V_GMCHEXP_RXN0
AD6 AE6
V_GMCHEXP_RXN1
AE7 AD7
AC7
V_GMCHEXP_RXP3
AE9
V_GMCHEXP_RXN3
AE10
V_GMCHEXP_RXP4
AD10
V_GMCHEXP_RXN4
AC10 AE12
AE13
V_GMCHEXP_RXP6 GMCHEXP_RXP6
AD13
V_GMCHEXP_RXN6
AC13
V_GMCHEXP_RXP7
AC15
V_GMCHEXP_RXN7
AD15
V_GMCHEXP_RXP8
AE15
V_GMCHEXP_RXN8
AE16
V_GMCHEXP_RXP9
AC18
V_GMCHEXP_RXN9 GMCHEXP_RXN9
AD18
V_GMCHEXP_RXP10 GMCHEXP_RXP10
AE18
V_GMCHEXP_RXN10
AE19
V_GMCHEXP_RXP11
AC21
V_GMCHEXP_RXN11
AD21
V_GMCHEXP_RXP12
AE21
V_GMCHEXP_RXN12
AE22
V_GMCHEXP_RXP13
AD22
V_GMCHEXP_RXN13
AD23 AF25
V_GMCHEXP_RXN14
AE25
V_GMCHEXP_RXP15 GMCHEXP_RXP15
AE24 AD24
PEX_TSTCLK
AF13
PEX_TSTCLK#
AF14
R_PLTRST_DELAY#
AC6
AB10 AB11 AB14 AB15 W17 W18 AB20 AB21
AA4 AB5 AB6 AB7 AB8 AB9 AC9 AC11 AB12 AC12 AB13 AB16 AC16 AB17 AC17 AB18 AB19 AC19 AC20
W9 W10 W11 W12
J12 F13 J13 F14 J15 J16
D12 E12 F12 C13
C699EXT@.1U C699EXT@.1U C698EXT@.1U C698EXT@.1U
C697EXT@.1U C697EXT@.1U C696EXT@.1U C696EXT@.1U
C256EXT@.1U C256EXT@.1U C257EXT@.1U C257EXT@.1U
C695EXT@.1U C695EXT@.1U C694EXT@.1U C694EXT@.1U
C254EXT@.1U C254EXT@.1U C255EXT@.1U C255EXT@.1U
C693EXT@.1U C693EXT@.1U C692EXT@.1U C692EXT@.1U
C252EXT@.1U C252EXT@.1U C253EXT@.1U C253EXT@.1U
C251EXT@.1U C251EXT@.1U C250EXT@.1U C250EXT@.1U
C691EXT@.1U C691EXT@.1U C690EXT@.1U C690EXT@.1U
C249EXT@.1U C249EXT@.1U C248EXT@.1U C248EXT@.1U
C689EXT@.1U C689EXT@.1U C688EXT@.1U C688EXT@.1U
C247EXT@.1U C247EXT@.1U C246EXT@.1U C246EXT@.1U
C687EXT@.1U C687EXT@.1U C686EXT@.1U C686EXT@.1U
C245EXT@.1U C245EXT@.1U C244EXT@.1U C244EXT@.1U
C685EXT@.1U C685EXT@.1U C684EXT@.1U C684EXT@.1U
C243EXT@.1U C243EXT@.1U C242EXT@.1U C242EXT@.1U
T106T106 T105T105
12
C198
C198 EXT@0.1U_4
EXT@0.1U_4
12
C127
C127 EXT@0.1U_4
EXT@0.1U_4
PLACE NEAR BALLS
GMCHEXP_RXN0
GMCHEXP_RXP1V_GMCHEXP_RXP1
GMCHEXP_RXN1
GMCHEXP_RXP2V_GMCHEXP_RXP2
GMCHEXP_RXN2V_GMCHEXP_RXN2
GMCHEXP_RXP3
GMCHEXP_RXN3
GMCHEXP_RXP4
GMCHEXP_RXN4
GMCHEXP_RXP5V_GMCHEXP_RXP5
GMCHEXP_RXN5V_GMCHEXP_RXN5
GMCHEXP_RXN6
GMCHEXP_RXP7
GMCHEXP_RXN7
GMCHEXP_RXP8
GMCHEXP_RXN8
GMCHEXP_RXP9
GMCHEXP_RXN10 GMCHEXP_RXP11
GMCHEXP_RXN11
GMCHEXP_RXP12
GMCHEXP_RXN12
GMCHEXP_RXP13
GMCHEXP_RXN13
GMCHEXP_RXP14V_GMCHEXP_RXP14
GMCHEXP_RXN14
GMCHEXP_RXN15V_GMCHEXP_RXN15
PLACE NEAR BALLS PLACE NEAR GPU
12
C139
C139 EXT@220P_4
EXT@220P_4
12
C135
C135 EXT@4700P_4
EXT@4700P_4
12
C196
C196 EXT@0.022U_4
EXT@0.022U_4
12
C183
C183 EXT@0.022U_4
EXT@0.022U_4
12
C206
C206 EXT@10U_6.3V_6
EXT@10U_6.3V_6
PLACE NEAR BALLS
12
C129
C129 EXT@0.01U_4
EXT@0.01U_4
12
C110
C110 EXT@0.022U_4
EXT@0.022U_4
COMPONENTS
G72MV
2
R_PLTRST_DELAY#
12
C188
C188 EXT@0.022U_4
EXT@0.022U_4
12
C119
C119 EXT@0.1U_4
EXT@0.1U_4
+3V
S:110mA
30 mil
12
C118
C118 EXT@1U_6.3V_4
EXT@1U_6.3V_4
2
12
C203
C203 EXT@0.022U_4
EXT@0.022U_4
12
C202
C202 EXT@0.1U_4
EXT@0.1U_4
NVDD
power plane
AJ073000T14
4
12
C207
C207 EXT@10U_6.3V_6
EXT@10U_6.3V_6
P/N
+3V
3 5
12
C194
C194 EXT@0.1U_4
EXT@0.1U_4
1
12
C266
C266 *EXT@0.1U
U13
U13
*EXT@TC7SH08FU
*EXT@TC7SH08FU
2 1
R145
R145
12
C195
C195 EXT@1U_6.3V_4
EXT@1U_6.3V_4
12
C189
C189 EXT@1U_6.3V_4
EXT@1U_6.3V_4
<OrgName>
<OrgName>
<OrgName> <OrgAddr1>
<OrgAddr1>
<OrgAddr1> <OrgAddr2>
<OrgAddr2>
<OrgAddr2> <OrgAddr3>
<OrgAddr3>
<OrgAddr3> <OrgAddr4>
<OrgAddr4>
<OrgAddr4> Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
*EXT@0.1U
PLTRST#
12
EXT@0_4
EXT@0_4
+1.2V
12
C187
C187 EXT@4.7U_6.3V_6
EXT@4.7U_6.3V_6
S:1400mA
+1.2V
plane or 120 mil
12
C201
C201 EXT@4.7U_6.3V_6
EXT@4.7U_6.3V_6
+1.2V
C638
C638
+
+
EXT@150U-4V_3528
EXT@150U-4V_3528
PROJECT : ZE2
PROJECT : ZE2
Quanta Computer Inc.
Quanta Computer Inc.
VGA-G72M (PCIe,POWER)
PLTRST# [16,19,20,23,26,27,29,32,33]
of
12 42Thursday, June 08, 2006
12 42Thursday, June 08, 2006
1
12 42Thursday, June 08, 2006
B2A
B2A
B2A
A
U45B
3GIO_ADR_0 3GIO_ADR_1
3GIO_ADR_2
MOBILE_GPIO
PLLVDD
XTALSSIN
XTALIN_VGA
BXTALOUT
I2CH_SCL I2CH_SDA
U45B
A2 B3 A3
D4
A4 B4 B6
P4 C6 G5
V4 C4 G2
G3
J2
J1
K4
K1 M2 M1 N1 N2 N3 R3
F2 G1
G4
F1 R2
K2
K3
F6 G6
J6
K5
K6
L6
J5 M3
J4
A9 D9
A10 B10 C10 C12 B12 A12 A13 B13 B15 A15 B16
C9
B9
H4 H5
C1
B1 C3
C2
AE27 AD26 AD27 AE26 AD25
D1
F3 D3 D2
D11
C7
B7
AC8
EXT@G72M
EXT@G72M
R473
R473 EXT@2K/F_4
EXT@2K/F_4
1 2
+3V
R471 EXT@2K/F_4R471 EXT@2K/F_4
1 2
R472 *EXT@2K/F_4R472 *EXT@2K/F_4
1 2
R484 *EXT@2K/F_4R484 *EXT@2K/F_4
1 2
RAM_CFG0
4 4
3 3
R_THERMATRIP_VGA#
SSFOUT
2 2
RAM_CFG1 PCI_DEVID2
PCI_DEVID0 PCI_DEVID1
RAM_CFG2 RAM_CFG3
PCI_DEVID3
R126 EXT@10K_4R126 EXT@10K_4
R474 EXT@10K_4R474 EXT@10K_4
12
R70 EXT@0RR70 EXT@0R
BLON[7,28]
R466 EXT@0_4R466 EXT@0_4
1 2
GPIO10_FBVREFCTL[14,15]
R481 EXT@10K_4R481 EXT@10K_4
1 2
R483 EXT@0_4R483 EXT@0_4
1 2
Maximum down spread of -3%
12
R482
R482 EXT@10K_4
EXT@10K_4
+3V
RP56 EXT@4P2R-10KRP56 EXT@4P2R-10K
1 3
12
C131
C131 EXT@0.1U_4
EXT@0.1U_4
PEX_PLL_EN_TERM100 SUB_VENDOR USER_STRAP_0
T89T89
USER_STRAP_1
T92T92
USER_STRAP_2
T87T87
USER_STRAP_3
T80T80
T10T10
T101T101 T79T79
T93T93
T95T95 T98T98
T100T100
T91T91
12
S:10mA
20 mil
+3V
C128 EXT@0.1U_4C128 EXT@0.1U_4
12
S:10mA
+3V
T6T6 T97T97
T82T82
R142 EXT@10K_4R142 EXT@10K_4
20 mil
C107 EXT@0.1U_4C107 EXT@0.1U_4
12
MIOBCAL_PD_VDDQ MIOBCAL_PU_GND
T94T94
DVI_DET[16,33]
DISP_ON1 BLON_R
T76T76 T78T78 T88T88
T84T84 T77T77
T83T83
VGA_THERMDN VGA_THERMDP
CLK_VGA_27M_OUT
R141 EXT@10K_4R141 EXT@10K_4
1 2
T102T102 T104T104 T103T103
1 2
T90T90
T85T85
2 4
MIO_A_D0 MIO_A_D1 MIO_A_D2 MIO_A_D3 MIO_A_D4 MIO_A_D5 MIO_A_D6 MIO_A_D7 MIO_A_D8 MIO_A_D9 MIO_A_D10
MIO_A_HSYNC MIO_B_D0
MIO_B_D1 MIO_B_D2 MIO_B_D3 MIO_B_D4 MIO_B_D5 MIO_B_D6 MIO_B_D7 MIO_B_D8 MIO_B_D9 MIO_B_D10 MIO_B_D11
MIO_B_CTL3 MIO_B_DE
MIO_B_HSYNC MIO_B_VSYNC
MIO_B_CLKIN MIO_B_CLKOUT
MIO_B_CLKOUT#
MIO_A_VDDQ1 MIO_A_VDDQ2 MIO_A_VDDQ3
MIO_B_VDDQ1 MIO_B_VDDQ2 MIO_B_VDDQ3
MIO_B_CAL_PD_VDDQ MIO_B_CAL_PU_GND
MIO_B_VREF
GPIO[0] GPIO[1] GPIO[2]
General
General
GPIO[3]
Purpose
Purpose
GPIO[4]
I/O
I/O
GPIO[5] GPIO[6] GPIO[7] GPIO[8] GPIO[9] GPIO[10] GPIO[11] GPIO[12]
THERMDN
Thermal
Thermal Diode
Diode
THERMDP
PLLVDD PLLGND
PLL &
PLL &
XTALSSIN
XTAL
XTAL
XTALIN XTALOUTBUFF
XTALOUT
JTAG_TCK JTAG_TMS
Test
Test
JTAG_TDI JTAG_TDO JTAG_TRST#
ROM_CS# ROM_SI
ROM
ROM
ROM_SO ROM_SCLK
CLAMP I2CH_SCL
I2CH_SDA
RFU_GND
PART 2 OF 4
PART 2 OF 4
V
V I
I D
D E
E O
O
&
&
M
M U
U L
L T
T I
I M
M E
E
Multi-Use Input/Output Interface
Multi-Use Input/Output Interface
D
D I
I A
A
MISC
MISC
27M XTAL
C660 EXT@18P_4C660 EXT@18P_4
1 2
1 2
C663 EXT@18P_4C663 EXT@18P_4
21
Y6
EXT@27MHZY6EXT@27MHZ
XTALIN_VGA
DISP_ON1
CLK_VGA_27M_OUT
Thermal Sensor for Graphic
SCLK
SDA
R455
R455
EXT@10K_4
EXT@10K_4
6 7 8 4
+3V
THERMATRIP_VGA# R_VGA_MBDATA R_VGA_MBCLK
*EXT@10K
*EXT@10K
S:500mW
C655
C655
EXT@2200P_4
EXT@2200P_4
20 mil
6642VCC_VGA
C656
C656 EXT@0.1U_4
EXT@0.1U_4
R460 EXT@200_4R460 EXT@200_4
U43
U43
VCC1/ALERT
3
DXN
2
DXP GND5PWM
EXT@MAX6649
EXT@MAX6649
1 1
VGA_THERMDN
VGA_THERMDP
SLAVE ADDRESS: 1001 100-----98
A
+3V+3V
Q29
Q29
*EXT@RHU002N06
*EXT@RHU002N06
2
31
R456
R456
R448
R448
+3V
*EXT@10K
*EXT@10K
Q28
Q28
2
*EXT@RHU002N06
*EXT@RHU002N06
31
Integrated
Integrated TMDS
TMDS
IFPC_TXD0N IFPC_TXD0P IFPC_TXD1N IFPC_TXD1P IFPC_TXD2N IFPC_TXD2P
IFPC_TXCN IFPC_TXCP
IFPCD_RSET
IFPCD_VPROBE
I2CB_SCL I2CB_SDA
IFPC_IOVDD
IFPCD_PLLVDD
IFPCD_PLLGND
DACA / CRT
DACA / CRT
DACA_RED
DACA_GREEN
DACA_BLUE
DACA_HSYNC DACA_VSYNC
I2CA_SCL I2CA_SDA
DACA_RSET
DACA_IDUMP
DACA_VDD
DACA_VREF
DACB (TV/CRT2)
DACB (TV/CRT2)
DACB_R_C DACB_G_Y
DACB_B_COMP
DACB_HSYNC DACB_VSYNC
DACB_RSET
DACB_IDUMP
DACB_VDD
DACB_VREF
LVDS
LVDS
IFPA_TXD0N IFPA_TXD0P IFPA_TXD1N IFPA_TXD1P IFPA_TXD2N IFPA_TXD2P IFPA_TXD3N IFPA_TXD3P
IFPA_TXCN
IFPA_TXCP IFPB_TXD4N IFPB_TXD4P IFPB_TXD5N IFPB_TXD5P IFPB_TXD6N IFPB_TXD6P IFPB_TXD7N IFPB_TXD7P
IFPB_TXCN
IFPB_TXCP IFPAB_RSET
IFPAB_VPROBE
IFPA_IOVDD IFPB_IOVDD
IFPAB_PLLVDD
IFPAB_PLLGND
I2CC_SCL I2CC_SDA
BUFRST#
STEREO
SWAPRDY
TESTMODE
R467 *EXT@10KR467 *EXT@10K
+3V
R468 EXT@0RR468 EXT@0R
R464
R464 EXT@10K
EXT@10K
VGA_MBDATA [27]
VGA_MBCLK [27]
B
EXT_TMDS_TX0M_PR
R1
EXT_TMDS_TX0P_PR
T1
EXT_TMDS_TX1M_PR
T2
EXT_TMDS_TX1P_PR
T3
EXT_TMDS_TX2M_PR
V3
EXT_TMDS_TX2P_PR
V2
EXT_TMDS_TXCM_PR
W1
EXT_TMDS_TXCP_PR
V1 J3
M5 F9
F10
IFPC_IOVDD
L4
IFPCD_PLLVDD
M4
M6
EXT_VGA_RED
AE1
EXT_VGA_GRN
AD1
EXT_VGA_BLU
AD2
EXT_HSYNC
AD4
EXT_VSYNC
AC4
EXT_DDCCLK
D10
EXT_DDCDAT
E10
DACA_RSET
AD3 U9
DACA_VDD
AE2
DACA_VREF
AB4
EXT_TV_C/R
F4
EXT_TV_Y/G
E4
EXT_TV_COMP
D5 E6
F5
DACB_RSET
D6 L9
DACB_VDD
F8
DACB_VREF
E7
N5 N4 R4 R5 T6 T5 P6 R6 U4 T4 W2 W3 AA3 AA2 AA1 AB1 AB2 AB3 W6 W5
U6 N6
W4 Y4
V5
V6
E9 D8
A6 F7 A7 D7
R_VGA_MBDATA R_VGA_MBCLK
THERMATRIP_VGA#
B
R112 *EXT@1K_4R112 *EXT@1K_4
12
T7T7
EXT_VGA_RED [17] EXT_VGA_GRN [17] EXT_VGA_BLU [17]
EXT_HSYNC [17] EXT_VSYNC [17]
EXT_DDCCLK [17] EXT_DDCDAT [17]
1 2
R496 EXT@124/FR496 EXT@124/F
6/4 Kevin stuff R496 for fix no CRT issue
EXT_TV_C/R [17] EXT_TV_Y/G [17] EXT_TV_COMP [17]
R475
R475 EXT@124/F_4
EXT@124/F_4
1 2
R129 *EXT@1K_4R129 *EXT@1K_4
12
+3V
EDIDCLK EDIDDATA
C77
C77
EXT@100P_4
EXT@100P_4
T86T86
12
DISP_ON [7,28]
R449 EXT@0_4R449 EXT@0_4
1 2
R458 EXT@0_4R458 EXT@0_4
1 2
+3V
U42
U42
EXT@TC7SH08FU
EXT@TC7SH08FU
2 1
3 5
1 2
T12T12
IFPA_IOVDD
1
2
12
EXT@10K
EXT@10K
4
IFPA_IOVDD
IFPB_IOVDD
IFPAB_PLLVDD
R470 EXT@10K_4R470 EXT@10K_4
R459 *EXT@0_4R459 *EXT@0_4
EXT_TMDS_TX0M_PR [16] EXT_TMDS_TX0P_PR [16] EXT_TMDS_TX1M_PR [16] EXT_TMDS_TX1P_PR [16] EXT_TMDS_TX2M_PR [16] EXT_TMDS_TX2P_PR [16] EXT_TMDS_TXCM_PR [16] EXT_TMDS_TXCP_PR [16]
TMDS_DDCCLK [16,33]
TMDS_DDCDATA [16,33]
EXT_TXLOUT0- [7] EXT_TXLOUT0+ [7] EXT_TXLOUT1- [7] EXT_TXLOUT1+ [7] EXT_TXLOUT2- [7] EXT_TXLOUT2+ [7]
EXT_TXLCLKOUT- [7] EXT_TXLCLKOUT+ [7]
3
RP1
RP1 EXT@4P2R-2.2K
EXT@4P2R-2.2K
4
EDIDCLK [28]
EDIDDATA [28]
12
C76
C76 EXT@100P_4
EXT@100P_4
BLON_R
R79
EDIDDATA EDIDCLK
+3V
12
C648
C648 EXT@0.1U
EXT@0.1U
R_THERMATRIP_VGA#
C
Strapging
PCI DEVICE
+3V
12
12
R120
R120
*EXT@2K/F_4
*EXT@2K/F_4
R488
R488
EXT@2K/F_4
EXT@2K/F_4
+3V
12
R102
R102
V6_V12_EXT@10K_4
V6_V12_EXT@10K_4
12
R110
R110
*EXT@10K_4
*EXT@10K_4
12
12
R117
R117
R113
R113
EXT@2K/F_4
EXT@2K/F_4
EXT@2K/F_4
EXT@2K/F_4
For ZE2 A-test stuff samsung 8M*32 and 16M*32
samsung 8M*32 stuff R957,R947,R946,R945 samsung 16M*32 stuff R957,R956,R946,R945
PCI_DEVID0 PCI_DEVID1 PCI_DEVID2 PCI_DEVID3
12
12
R655
R655
R654
R654
EXT@2K/F_4
EXT@2K/F_4
EXT@2K/F_4
EXT@2K/F_4
12
R486
R486
V6_V12_EXT@10K_4
V6_V12_EXT@10K_4
12
R485
R485
*EXT@10K_4
*EXT@10K_4
12
R656
R656
EXT@2K/F_4
EXT@2K/F_4
12
R119
R119
V6_EXT@10K_4
V6_EXT@10K_4
12
R124
R124
V12_EXT@10K_4
V12_EXT@10K_4
DAC power
S:130mA
30 mil
DACA_VDD DACA_VREF
12
C668
C668 EXT@0.1U_4
EXT@0.1U_4
S:200mA
30 mil
DACB_VDD DACB_VREF
12
C97
C97 EXT@0.1U_4
EXT@0.1U_4
LVDS I/Opower
12
12
C258
C258
C225
C225
EXT@4700P_4
EXT@4700P_4
EXT@470P_4
EXT@470P_4
12
12
C112
C112
C115
C115
EXT@470P_4
EXT@470P_4
EXT@4700P_4
EXT@4700P_4
+1.8V
L45 EXT@TB160808G301L45 EXT@TB160808G301
L:200mA
C219
C219 EXT@4.7U
EXT@4.7U
L18
L18 EXT@BLM11A121S_6
EXT@BLM11A121S_6
L:200mA
12
C230
C230 EXT@2.2U_6.3V_6
EXT@2.2U_6.3V_6
L10
L10 EXT@BLM11A121S_6
EXT@BLM11A121S_6
L:200mA
12
C665
C665 EXT@2.2U_6.3V_6
EXT@2.2U_6.3V_6
C670
C670 EXT@4.7U
EXT@4.7U
TMDS I/O power and backdrive circuit
Q8
Q8 EXT@SI2305DS
EXT@SI2305DS
VGA_GD#
R80 EXT@10KR80 EXT@10KR79
3
R60
R60
HWPG_NVDD[27,35]
EXT@0R
EXT@0R
2
Q6
Q6 EXT@2N7002E
EXT@2N7002E
1
VGA SS
U5
SSFOUT
U5
1
XIN/CLKIN
2
VSS
3
SO
4
SSCLK
EXT@PG1819G-08SR
EXT@PG1819G-08SR
REFCLK
XOUT
VDD
BXTALOUT
R97 EXT@0_4R97 EXT@0_4
1 2
C
D
MIO_A_D0-->PCIE PLL termination enable
0:enable(default,internal PD)
1:disable MIO_A_D1-->SUB vender
0:No VBIOS ROM
1:With VBIOS ROM(default) MIO_A_D2~D5 -->User strap(Panel ID)
1XXX:Customer define MIO_A_D9/MIO_A_D8/MIO_A_D6-->
Configure GPU PCIE I/F
001:G72
010:G71
6/4 Kevin add LCDID to
+3V
12
R657
R657
EXT@2K/F_4
EXT@2K/F_4
USER_STRAP_0 USER_STRAP_1 USER_STRAP_2 USER_STRAP_3
12
R490
R490
*EXT@10K_4
*EXT@10K_4
12
R489
R489
V6_V12_EXT@10K_4
V6_V12_EXT@10K_4
Nvidia for Toshiba LCD that is no support EDID issue
LCDID0 LCDID1 00 01
12
R465
R465
*EXT@10K_4
*EXT@10K_4
PEX_PLL_EN_TERM100
LVDS/TMDS PLL power
+3V
+3V
S:260mA
60 mil
IFPA_IOVDD
IFPA_IOVDD
C190
C190
C177
C177
EXT@470P
EXT@470P
EXT@4700P
EXT@4700P
+3V
32
R100
1
PD#
G
G
R53
R53 EXT@10K_4
EXT@10K_4
5 6 7 8
SD
SD
C114
C114 EXT@4.7U
EXT@4.7U
+3V
R100 *EXT@0R
*EXT@0R
IFPC_3V
L9 EXT@TB160808G301L9 EXT@TB160808G301
L:200mA
C86
C86 EXT@4.7U
EXT@4.7U
R52
R52 EXT@10K_4
EXT@10K_4
S:30mA
1 2
1 2
20 mil
+3VL
12
C658
C658 EXT@10U_10V_8
EXT@10U_10V_8
D
Toshiba Hydis
LCDID0 [20,28] LCDID1 [20,28]
RAM_CFG0 RAM_CFG1 RAM_CFG2 RAM_CFG3
S:30mA
20 mil
+2.5V
L16 EXT@TB160808G301L16 EXT@TB160808G301
S:35mA
20 mil
IFPCD_PLLVDD
SOT23_132 1
G
3
D
S
2
C124
C124 EXT@4700P
EXT@4700P
-1.75% (DOWN)10
0.85% (CENTER)
L6
L6
L:200mA
12
EXT@BLM11A121S_6
EXT@BLM11A121S_6
12
C69
C69 EXT@0.1U_4
EXT@0.1U_4
MIO_A_D10/MIO_A_D7-->setting TV mode 00:SECAM
01:NTSC(default)
10:PAL 11:VGA
MIO_A_HSYNC-->Slot CLK CFG strap 0:GPU and NB does't share a common reference CLK
1:GPU and NB does share a common reference CLK(default)
MIO_B_D11/MIO_B_D3/MIO_B_D5/MIO_B_D4-->PCI device
PCI_DEVICE[3:0] DESCRIPTION
1000
0111
others
MIO_B_D7-->Mobile Mode
0:enable(default)
1:disable MIO_B_VSYNC/MIO_B_D10-->ROM type
00:Parallel
01:Serial(default)
10:reserved 11:LPC
MIO_B_D9/MIO_B_D8/MIO_B_D1/MIO_B_D0-->RAM CFG G72MV VRAM GDDR3 Configuration Table
RAM_CFG[3:0]
0000 0001 0010
0011
0100 0101 0110
0111
1000 1001 1010 1011 1100 1101 1110 1111
MIO_B_D6/MIO_B_D2-->X'tal strap 00:13.5MHz 01:14.318MHz
10:27MHz(default)
11:reserved
PLLVDD
12
C98
C98
C99
C99
EXT@4700P_4
EXT@4700P_4
EXT@470P_4
EXT@470P_4
L:200mA
12
12
C666
C666 EXT@470P_4
EXT@470P_4
S:150mA
40 mil
IFPC_IOVDD
C123
C123 EXT@470P
EXT@470P
E
G72M
G72M-V
Reserved
DESCRIPTION
Reserved 16Mx32 DDR3/64-bit 16Mx32 DDR3/64-bit
16Mx32 DDR3/64-bit
Reserved 8Mx32 DDR3/64bit 8Mx32 DDR3/64bit
8Mx32 DDR3/64bit
Reserved 16Mx32 DDR3/32bit 16Mx32 DDR3/32bit 16Mx32 DDR3/32bit Reserved 8Mx32 DDR3/32bit 8Mx32 DDR3/32bit 8Mx32 DDR3/32bit
12
C125
C125
EXT@2.2U_6.3V_6
EXT@2.2U_6.3V_6
C192
C192 EXT@4.7U
EXT@4.7U
12
C133
C133
C667
C667
EXT@4.7U_6.3V_6
EXT@4.7U_6.3V_6
EXT@4700P_4
EXT@4700P_4
EXT_TV_C/R
EXT_TV_Y/G
EXT_TV_COMP
EXT_VGA_RED
EXT_VGA_GRN
EXT_VGA_BLU
Place close to VGA Chip
+2.5V
L11EXT@BLM11A121S_6L11EXT@BLM11A121S_6
12
L:200mA
S:35mA
20 mil
IFPAB_PLLVDD
C169
C169
C166
C166
EXT@470P
EXT@470P
EXT@4700P
EXT@4700P
L12
L12 EXT@BLM11A121S_6
EXT@BLM11A121S_6
+2.5V
L:200mA
R95 EXT@150/F_4R95 EXT@150/F_4
1 2
R71 EXT@150/F_4R71 EXT@150/F_4
1 2
R63 EXT@150/F_4R63 EXT@150/F_4
1 2
R139 EXT@150/F_4R139 EXT@150/F_4
1 2
R137 EXT@150/F_4R137 EXT@150/F_4
1 2
R135 EXT@150/F_4R135 EXT@150/F_4
1 2
S0
+3V
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT : ZE2
PROJECT : ZE2
Quanta Computer Inc.
Quanta Computer Inc.
VGA-G72M (VIDEO)
13 42Thursday, June 08, 2006
13 42Thursday, June 08, 2006
13 42Thursday, June 08, 2006
of
of
E
of
Vendor
Infineon Hynix
Samsung
Infineon Hynix
Samsung
Infineon Hynix Samsung
Infineon Hynix Samsung
B2A
B2A
B2A
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