5
X'TAL
14.318MHZ
Clock Generator
DVI
D D
P25
TVOUT
P25
DVI
TFT LCD Panel
15.4"
WSXGA+
P25
TVout
LVDS
VGA
CRT
C C
P26
ICS954310BGLF
VRAM X 4(GDDR3)
256MB/500MHZ
VGA
ATI M56P
P18,P19,P20,P21,
P22,P24
X'TAL
27M
HDD
P35
Bluetooth
USB6 P29
Camera Module(1.3M)
X'TAL
USB7 P25
6M
6 in 1 Cardreader
(SMSC 2228)
USB4
B B
USB Port x 4
USB0~3
P31
P29
Media-Bay
ODD/2nd HDD/2nd Battery
P35
Int MIC
P37
4
P2
P23
SATA
USB 2.0
3
ZC1 SYSTEM BLOCK DIAGRAM
Yonah/Merom 479
uFCPGA
533/667 MHZ FSB
PCI-Express
16X Lan
CALISTOGA-945PM
1466
FCBGA
P6,P7,P8,P9,P10,P11
DMI X4 interface
ICH7-M Digital Home
652 BGA
P14,P15,P16,P17
SMBUS
G-SENSOR
P35
X'TAL
32.768KHZ
P3,P4
Thermal Sensor
Dual Channel DDR2
533/667 Mhz
PCI-Express
PCI Bus interface
CPU
DDR II
SODIMM0
DDR II
SODIMM1
PCMCIA+1394
+Cardreader
Controller
2
P5
P12,P13
X'TAL24.576MHZ
EV@: Stuff when external VGA used
SH@: Stuff when SATA HDD used
PH@: Stuff when PATA HDD used
EZ4 Docking
Connector
PCIE1~2 , Lan
Ser & Par Port
PS2 , VGA, DVI
SPDIF,SM BUS
P32
MiniCard /
WLAN
P29
PCI-Express X 2
TV out / CRT
Audio
DVI
10/100/1G
Intel Tekoa
GigaLAN
82573E
P27
1
Switch
MAX4892
USB5
New Card
X'TAL
25M
Switch
Switch
P25,P28
P33
P25,26
P37
LPC
KBC PC97551
P39
OSC
48MHZ
Audio Amplifier
Maxim Max 9750
P37
Azalia Audio
Controller
Realtek ALC883
P36
Azalia
X'TAL
32.768K
IEEE 1394
Port
MIC Jack
A A
Speaker
P37
Phone Jack
5
P37 P37
P37
Line in
Azalia MDC
RJ11
P28
4
P36
BIOS
Touch Pad
(Dual-Point)
P39
P40
G sensor
P35
Super I/O
NS PC87383
P38
3
O2 711MP1
P31
FIR
P30,P31
Smart card
P30
TPM 1.2
P38 P38
(Option)
2
SPI FLASH
PCMCIA Slot
Transformer
P27
P30
P28
Fan Header
P5
RJ45
P28
Primary Battery
Secod Battery
P45,P46
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
Date: Sheet of
Date: Sheet
Date: Sheet
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
of
of
14 6 Monday, November 07, 2005
14 6 Monday, November 07, 2005
14 6 Monday, November 07, 2005
1
1A
1A
1A
A
B
C
D
E
FSC FSB FSA CPU SRC PCI
1 0 1 100 100 33
0 0 1 133 100 33
Default
0 1 1 166 100 33
0 1 0 200 100 33
0 0 0 266 100 33
1 0 0 333 100 33
4 4
1 1 0 400 100 33
1 1 1 200 100 33
L68
+3V
120 ohms@100Mhz
L68
BK2125HS121-T_8
BK2125HS121-T_8
25 mils
VDD_SRC_CPU
C794
C794
.1U-10V_4
.1U-10V_4
R580 2.2_6 R580 2.2_6
C496
C496
.1U-10V_4
.1U-10V_4
VDD_A
.1U-10V_4
.1U-10V_4
C498
C498
C523
C523
.1U-10V_4
.1U-10V_4
.1U-10V_4
.1U-10V_4
C497
C497
10U-10V_8
10U-10V_8
C814
C814
25 mils
3 3
2 2
+3V
L69
L69
BK2125HS121-T_8
BK2125HS121-T_8
NEW_CLKREQ# 33
EZ_CLKREQ# 32
PREQ3(PCIE) Latched Select
"0" : CLK Enable
"1" : CLK Disable Control : PCIE 2,4,6,8
PREQ4(PCIE) Latched Select
"0" : CLK Enable
"1" : CLK Disable Control : PCIE 1,3,5,7
VDD_PCI
R608 2.2_6 R608 2.2_6
R577 1_6 R577 1_6
C813
C813
.1U-10V_4
.1U-10V_4
VDD_48
VDD_REF
C800
C800
.1U-10V_4
.1U-10V_4
CLKGN_REQ3_PCIE
CLKGN_REQ4_PCIE
C526
C526
.1U-10V_4
.1U-10V_4
C525
C525
.1U-10V_4
.1U-10V_4
R590 10K_4 R590 10K_4
R289 10K_4 R289 10K_4
C805
C805
10U-10V_8
10U-10V_8
C541
C541
10U-10V_8
10U-10V_8
C801
10U-10V_8
10U-10V_8
A1A-change X1,X2 capacitor from 27pf to 33pf(CL=20pf)
Close to IC <500mils
1 2
1 2
+3V
1
3
CG_XIN
2 1
Y6
Y6
14.318MHZ
14.318MHZ
CG_XOUT
R599 *10K_4 R599 *10K_4
PM_STPCPU#
PM_STPPCI#
R600 33_4 R600 33_4
R604 4.7K_4 R604 4.7K_4
R574 4.7K_4 R574 4.7K_4
R581 33_4 R581 33_4
VDD_REF
VDD_SRC_CPU
VDD_PCI
VDD_SRC_CPU
VDD_48
CLKGN_REQ3_PCIE
CLKGN_REQ4_PCIE
RP61
RP61
2
4
33_4P2R_S
33_4P2R_S
T151T151
INTERNAL PULL HIGH
IREF
R_DOT96#
CGCLK_SMB 13
CGDAT_SMB 13
CLKUSB_48 16
SIO_14M 38
C804
C804
10U-10V_8
10U-10V_8
DREFCLK 8
DREFCLK# 8
+-20PPM,20PF
Iref=5mA,
Ioh=4*Iref
+3V
VR_PWRGD_CK410# 16,41
PM_STPCPU# 16
PM_STPPCI# 16
CGCLK_SMB
CGDAT_SMB
CLK_BSEL0
CLK_BSEL1
CLK_BSEL2
DREFCLK
DREFCLK#
C807
C807
33P-50V_4
33P-50V_4
C809
C809
33P-50V_4
33P-50V_4
C798
C798
*10P_4
*10P_4
R575 475/F_6 R575 475/F_6
A1A-FSB Frequency Select:by CPU driven
+1.05V
CPU_BSEL0 3
R328 *56.2/F_4 R328 *56.2/F_4
R338 0_4 R338 0_4
R336 *1K_4 R336 *1K_4
CLK_BSEL0
U46
U46
58
X1
57
X2
10
Vtt_PwrGd#/PD
62
CPU_STOP#
63
PCI/PCIE_STOP#
54
SCLK
55
SDATA
12
FSA/USB_48MHz
16
FSB/TEST_MODE
61
REF1/FSLC/TEST_SEL
56
VDD_REF
50
VDDCPU
1
VDD_PCI_1
7
VDD_PCI_2
21
VDD_PCIE
28
VDDPCIE
42
VDD_PCIE
11
VDD_48
32
REQ3(PCIE)
33
REQ4(PCIE)
47
IREF
14
DOT96MHz
15
DOT96MHz#
34
PWRSAVE#
53
R339 1K_4 R339 1K_4
VDD_A
45
VDDA
CK-410M
CK-410M
CPUCLKC2/PCIEC8
27Mfix/LCD_SSCGT/PCIE0T
27SS/LCD_SSCGC/PCIE0C
selPCIEX0_LCD#/PCI5
PCICLK2/REQ_SEL
GND
GND
GND_PCI_26GND_SRC
GND_PCI_1
GND_48
GND
2
59
37
29
13
A1A:Change pin 3 PCLK_LAN to PCLK_TPM
46
REF0
GNDA
CPUCLKT0
CPUCLKC0
CPUCLKT1
CPUCLKC1
CPUCLKT2/PCIET8
REQ1#/PCIET7
REQ2#/PCIEC7
PCIET6
PCIEC6
PCIET5
PCIEC5
PCIET4
PCIEC4
SATA_CKT
SATA_CKC
PCIET3
PCIEC3
PCIET2
PCIEC2
PCIET1
PCIEC1
PCI4
PCI3
PCIF1/selLCD_27#
PCIF0/ITP_EN
ICS954310BGLF
ICS954310BGLF
MCH_BSEL0 8
Place these termination to close CK410M.
14M_REF
60
RHCLK_CPU
52
RHCLK_CPU#
51
RHCLK_MCH
49
RHCLK_MCH#
48
44
A1A:Remove PCIE clock
43
CLK_PCIE_EZ2_L
41
CLK_PCIE_EZ2#_L
40
RSRC_MCH
39
RSRC_MCH#
38
CLK_PCIE_EZ1_L
36
CLK_PCIE_EZ1#_L
35
CLK_PCIE_NEW
30
CLK_PCIE_NEW#
31
RSRC_SATA
26
RSRC_SATA#
27
RSRC_ICH
24
RSRC_ICH#
25
CLK_PCIE_LAN_L
22
CLK_PCIE_LAN#_L
23
CLK_PCIE_MINI_
19
CLK_PCIE_MINI_#
20
R_DREFSSCLK R_DOT96
17
R_DREFSSCLK#
18
R_PCLK_SIO
5
R_PCLK_711
4
R_PCLK_TPM
3
PCLK_MINI_LPC
64
R_PCLK_ICH
9
R_PCLK_591
8
R597 10K_4 R597 10K_4
ITP/SRC7 SELECT
0: SRC7 1: ITP
swap
R_DREFSSCLK#
R_DREFSSCLK
RP59 33_4P2R_S RP59 33_4P2R_S
RP60 33_4P2R_S RP60 33_4P2R_S
RP56 33_4P2R_S RP56 33_4P2R_S
RP57 33_4P2R_S RP57 33_4P2R_S
RP58 33_4P2R_S RP58 33_4P2R_S
RP67 33_4P2R_S RP67 33_4P2R_S
RP66 33_4P2R_S RP66 33_4P2R_S
RP65 33_4P2R_S RP65 33_4P2R_S
RP64 33_4P2R_S RP64 33_4P2R_S
RP63 33_4P2R_S RP63 33_4P2R_S
RP62 EV@33_4P2R_S RP62 EV@33_4P2R_S
1
3
1
3
1
3
1
3
1
3
3
1
3
1
3
1
3
1
3
1
R596 33_4 R596 33_4
R595 33_4 R595 33_4
R594 33_4 R594 33_4
R588 33_4 R588 33_4
R324 33_4 R324 33_4
R602 33_4 R602 33_4
1
3
2
4
2
4
2
4
2
4
2
4
4
2
4
2
4
2
4
2
4
2
C539
C539
*10P_4
*10P_4
C538
C538
C817
C817
*10P_4
*10P_4
*10P_4
*10P_4
C803
C803
*10P_4
*10P_4
2
4
R576 33_4 R576 33_4
CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3
CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6
CLK_PCIE_EZ2 32
CLK_PCIE_EZ2# 32
CLK_PCIE_3GPLL 8
CLK_PCIE_3GPLL# 8
CLK_PCIE_EZ1 32
CLK_PCIE_EZ1# 32
CLK_PCIE_NEW_C 33
CLK_PCIE_NEW_C# 33
CLK_PCIE_SATA 14
CLK_PCIE_SATA# 14
CLK_PCIE_ICH 15
CLK_PCIE_ICH# 15
CLK_PCIE_LAN 27
CLK_PCIE_LAN# 27
CLK_PCIE_MINI 29
CLK_PCIE_MINI# 29
C819
C819
*10P_4
*10P_4
C818
C818
*10P_4
*10P_4
CLK_PCIE_M56# 18
CLK_PCIE_M56 18
PCI_CLK_SIO 38
PCI_CLK_711 30
PCLK_TPM 38
PCLK_MINI 29
PCLK_ICH 15
PCLK_591 39
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_PCIE_LAN
CLK_PCIE_LAN#
CLK_PCIE_3GPLL
CLK_PCIE_3GPLL#
CLK_PCIE_SATA
CLK_PCIE_SATA#
CLK_PCIE_MINI
CLK_PCIE_MINI#
CLK_PCIE_ICH
CLK_PCIE_ICH#
CLK_PCIE_NEW_C
CLK_PCIE_NEW_C#
DREFCLK
DREFCLK#
CLK_PCIE_EZ2
CLK_PCIE_EZ2#
CLK_PCIE_EZ1
CLK_PCIE_EZ1#
CLK_PCIE_M56#
CLK_PCIE_M56
14M_ICH 16
C799
C799
*10P_4
*10P_4
2
1
4
3
RP54 49.9_4P2R_S RP54 49.9_4P2R_S
RP55 49.9_4P2R_S RP55 49.9_4P2R_S
RP73 49.9_4P2R_S RP73 49.9_4P2R_S
RP52 49.9_4P2R_S RP52 49.9_4P2R_S
RP75 49.9_4P2R_S RP75 49.9_4P2R_S
RP72 49.9_4P2R_S RP72 49.9_4P2R_S
RP74 49.9_4P2R_S RP74 49.9_4P2R_S
RP69 49.9_4P2R_S RP69 49.9_4P2R_S C801
RP70 49.9_4P2R_S RP70 49.9_4P2R_S
RP51 49.9_4P2R_S RP51 49.9_4P2R_S
RP53 49.9_4P2R_S RP53 49.9_4P2R_S
RP71 49.9_4P2R_S RP71 49.9_4P2R_S
2
1
4
3
4
3
2
1
2
1
4
3
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
2
1
4
3
2
1
4
3
2
1
4
3
+3V
R579
Q34
Q34
RHU002N06
RHU002N06
1 1
PDAT_SMB 16,27,29,32,33,35
PCLK_SMB 16,27,29,32,33,35
3
Q35
Q35
RHU002N06
RHU002N06
3
A
R578
R578
2
10K_4
10K_4
+3V
2
R579
10K_4
10K_4
1
CGDAT_SMB
Stuff 0 ohm for 533MHz, NC for 667MHz
1
CGCLK_SMB
+1.05V
CPU_BSEL1 3
+1.05V
CPU_BSEL2 3 MCH_BSEL2 8
B
R327 *1K_4 R327 *1K_4
R322 0_4 R322 0_4
R326 *0_4 R326 *0_4
R573 *1K_4 R573 *1K_4
R571 0_4 R571 0_4
R572 *0_4 R572 *0_4
CLK_BSEL1
CLK_BSEL2
R323 1K_4 R323 1K_4
R570 1K_4 R570 1K_4
MCH_BSEL1 8
C
R_PCLK_SIO
PCLK_MINI_LPC
R_PCLK_ICH
R337 10K_4 R337 10K_4
R325 *10K_4 R325 *10K_4
R587 *10K_4 R587 *10K_4
R586 10K_4 R586 10K_4
R603 10K_4 R603 10K_4
R598 *10K_4 R598 *10K_4
Latched Select. (Pin 17,18)
+3V
"0" : LCD CLK(UMA)
"1" : PCIEX CLK(M56)
Latched Select. (Pin 40,41)
+3V
"0" : PCIEX CLK
"1" : PEREQ#
SELLCD_27# Select. (Pin 17,18)
+3V
"0" : 27MHzSS/27MHzSS# pair
"1" : LCD CLK pair
D
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
CLOCK GENERATOR
CLOCK GENERATOR
CLOCK GENERATOR
Date: Sheet
Date: Sheet
Date: Sheet of
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
24 6 Friday, December 09, 2005
24 6 Friday, December 09, 2005
24 6 Friday, December 09, 2005
of
E
of
1A
1A
1A
5
U43A
H_A#[31:3] 6
D D
H_ADSTB0# 6
H_REQ#[4:0] 6
H_A#[31:3] 6
C C
H_ADSTB1# 6
H_A20M# 14
H_FERR# 14
H_IGNNE# 14
H_STPCLK# 14
B B
XDP_DBRESET#
XDP_TMS
XDP_TDI
XDP_BPM#5
A A
XDP_TCK
XDP_TRST#
R210 0_4 R210 0_4
H_INTR 14
H_NMI 14
H_SMI# 14
T112 T112
T114 T114
T115 T115
T113 T113
T110 T110
T109 T109
T111 T111
T26T26
T124 T124
T125 T125
T145 T145
R275 *54.9/F_4 R275 *54.9/F_4
R211 54.9/F_4 R211 54.9/F_4
R209 54.9/F_4 R209 54.9/F_4
R206 54.9/F_4 R206 54.9/F_4
R213 54.9/F_4 R213 54.9/F_4
R215 54.9/F_4 R215 54.9/F_4
5
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_STPCLK_R#
TP_A32#
TP_A33#
TP_A34#
TP_A35#
TP_A36#
TP_A37#
TP_A38#
TP_A39#
TP_APM0#
TP_APM1#
TP_HFPLL
U43A
J4
A[3]#
L4
A[4]#
M3
A[5]#
K5
A[6]#
M1
N2
J1
N3
P5
P2
L1
P4
P1
R1
L2
K3
H2
K2
J3
L5
Y2
U5
R3
W6
U4
Y5
U2
R4
T5
T3
W3
W5
Y4
W2
Y1
V4
A6
A5
C4
D5
C6
B4
A3
AA1
AA4
AB2
AA3
M4
N5
T2
V3
B2
C3
B25
+1.05V
XDP_TCK PD 27.4/1% ?
XDP_TRST PD 510ohm /5% ?
XDP_TDI PU 150ohm /1.05V
XDP_TMS PU 39.2/1%?
XDP_TDO PU 54.9ohm?
For ITP700
ADDR GROUP 0
ADDR GROUP 0
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#
REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#
A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
ADSTB[1]#
A20M#
FERR#
IGNNE#
STPCLK#
LINT0
LINT1
SMI#
RSVD[01]#
RSVD[02]#
RSVD[03]#
RSVD[04]#
RSVD[05]#
RSVD[06]#
RSVD[07]#
RSVD[08]#
RSVD[09]#
RSVD[10]#
RSVD[11]#
PZ47823-2743-42
PZ47823-2743-42
DEFER#
DRDY#
DBSY#
CONTROL
CONTROL
LOCK#
RESET#
TRDY#
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
XDP/ITP SIGNALS THERM H CLK
XDP/ITP SIGNALS THERM H CLK
PROCHOT
THERMDA
THERMDC
THERMTRIP#
BCLK[0]
BCLK[1]
RSVD[12]#
RSVD[13]#
RSVD[14]#
RSVD[15]#
RSVD[16]#
RESERVED
RESERVED
RSVD[17]#
RSVD[18]#
RSVD[19]#
RSVD[20]#
4
T116 T116
H1
ADS#
E2
BNR#
G5
BPRI#
H5
F21
E1
F1
BR0#
D20
IERR#
B3
INIT#
H4
B1
H_RS#0
F3
RS[0]#
RS[1]#
RS[2]#
HIT#
HITM#
TCK
TDO
TMS
TRST#
DBR#
H_RS#1
F4
H_RS#2
G3
G2
G6
E4
AD4
AD3
AD1
AC4
AC2
XDP_BPM#5
AC1
XDP_TCK
AC5
XDP_TDI
AA6
TDI
XDP_TDO
AB3
XDP_TMS
AB5
XDP_TRST#
AB6
XDP_DBRESET#
C20
D21
A24
A25
THERMTRIP#_PWR
C7
A22
A21
TP_EXTBREF
T22
TP_SPARE0
D2
TP_SPARE1
F6
TP_SPARE2
D3
TP_SPARE3
C1
TP_SPARE4
AF1
TP_SPARE5
D22
TP_SPARE6
C23
TP_SPARE7
C24
E2A:Add Q58,remove D42,R554,C338
to resolve System can't boot
when battery under 30% issue
DELAY_VR_PWRGOOD 8,16,41
THERMTRIP#_PWR
4
H_ADS# 6
H_BNR# 6
H_BPRI# 6
H_DEFER# 6
H_DRDY# 6
H_DBSY# 6
H_BREQ#0 6
H_INIT# 14
H_LOCK# 6
H_CPURST# 6
H_TRDY# 6
H_HIT# 6
H_HITM# 6
T117 T117
H_PROCHOT_R#
H_THERMDA 5
H_THERMDC 5
R214 0_4 R214 0_4
A1A:Stuff R1406
T138 T138
CLK_CPU_BCLK 2
CLK_CPU_BCLK# 2
T137 T137
T59T59
T28T28
T27T27
T32T32
T121 T121
T120 T120
T63T63
T58T58
T142 T142
+1.05V
R217
R217
56_4
56_4
R216
R216
330_4
330_4
H_RS#[2:0] 6
T31T31
T30T30
T119 T119
T33T33
T118 T118
+1.05V
Q58
Q58
BSS301
BSS301
+1.05V
R268
R268
56.2/F_4
56.2/F_4
T127 T127
T29T29
XDP PU_R < 0.2"
R274
R274
68_4
68_4
R273 0_4 R273 0_4
PM_THRMTRIP# 8,14
+1.05V
R267
R267
1K/F_4
1K/F_4
D2C:Intel WW46,suggest Stuff R563(CS21002FB24)
R266
R266
2K/F_4
2K/F_4
+1.05V
3
2
1
2
1 3
Q19 MMBT3904 Q19 MMBT3904
3
+1.05V
+1.05V 2,4,6,8,9,10,14,17,44
Near to MCH <500mils
H_D#[63:0] 6
H_DSTBN#0 6
H_DSTBP#0 6
H_DINV#0 6
H_D#[63:0] 6
H_PROCHOT# 41
H_DSTBN#1 6
H_DSTBP#1 6
H_DINV#1 6
H_GTLREF
R563
20/15mils
CPU_BSEL0 2
CPU_BSEL1 2
CPU_BSEL2 2
R563
R562 51_4 R562 51_4
A1A:Intel 2005 WW25 update
R554
3
R554
*10K_4
*10K_4
C338
C338
*1U-16V_6
*1U-16V_6
XDP_DBRESET#
1999_SHT# 42
2 1
D42
D42
*BAS316
*BAS316
U43B
E22
F24
E26
H22
F23
G25
E25
E23
K24
G24
J24
J23
H26
F26
K22
H25
H23
G22
J26
N22
K25
P26
R23
L25
L22
L23
M23
P25
P22
P23
T24
R24
L26
T25
N24
M24
N25
M26
U43B
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
AD26
1K/F_4
1K/F_4
C26
D25
B22
B23
C21
PZ47823-2743-42
PZ47823-2743-42
+1.05V
R271
R271
*330_6
*330_6
2
Q20
Q20
1 3
*MMBT3904
*MMBT3904
R276 0_4 R276 0_4
D[0]#
D[1]#
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#
D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#
GTLREF
TEST1
TEST2
BSEL[0]
BSEL[1]
BSEL[2]
DATA GRP 0 DATA GRP 1
DATA GRP 0 DATA GRP 1
DATA GRP 2
DATA GRP 2
DSTBN[2]#
DSTBP[2]#
DATA GRP 3
DATA GRP 3
DSTBN[3]#
DSTBP[3]#
MISC
MISC
DPRSTP#
PWRGOOD
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
DINV[2]#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DINV[3]#
COMP[0]
COMP[1]
COMP[2]
COMP[3]
DPSLP#
DPWR#
SLP#
PSI#
2
AA23
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
W24
Y25
V23
AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26
AD23
AE24
AC20
R26
U26
U1
V1
E5
B5
D24
D6
D7
AE6
SYS_RST# 16
2
1
H_D#[63:0] 6
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
COMP0
COMP1
COMP2
COMP3
27.4/F_4
27.4/F_4
T34T34
ICH_DPRSTP# 14
H_DPSLP# 14
H_DSTBN#2 6
H_DSTBP#2 6
H_DINV#2 6
H_D#[63:0] 6
H_DSTBN#3 6
H_DSTBP#3 6
H_DINV#3 6
R264
R264
R265 54.9/F_4 R265 54.9/F_4
R207 27.4/F_4 R207 27.4/F_4
R208 54.9/F_4 R208 54.9/F_4
H_CPUSLP# 6,14
PSI# 41
+1.05V
25/25mils
H_PWRGD is CMOS driving by ICH
T60T60
R212
R212
*200/F_6
*200/F_6
H_DPWR# 6
H_PWRGD 14
TO VRD
PROJECT : ZC1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
CPU(1 OF 2 )
CPU(1 OF 2 )
CPU(1 OF 2 )
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
34 6 Sunday, December 04, 2005
34 6 Sunday, December 04, 2005
34 6 Sunday, December 04, 2005
1
1A
1A
1A
5
U43D
U43D
A4
VSS[001]
A8
VSS[002]
A11
VSS[003]
A14
VSS[004]
A16
VSS[005]
A19
VSS[006]
A23
VSS[007]
A26
VSS[008]
B6
D D
C C
B B
A A
VSS[009]
B8
VSS[010]
B11
VSS[011]
B13
VSS[012]
B16
VSS[013]
B19
VSS[014]
B21
VSS[015]
B24
VSS[016]
C5
VSS[017]
C8
VSS[018]
C11
VSS[019]
C14
VSS[020]
C16
VSS[021]
C19
VSS[022]
C2
VSS[023]
C22
VSS[024]
C25
VSS[025]
D1
VSS[026]
D4
VSS[027]
D8
VSS[028]
D11
VSS[029]
D13
VSS[030]
D16
VSS[031]
D19
VSS[032]
D23
VSS[033]
D26
VSS[034]
E3
VSS[035]
E6
VSS[036]
E8
VSS[037]
E11
VSS[038]
E14
VSS[039]
E16
VSS[040]
E19
VSS[041]
E21
VSS[042]
E24
VSS[043]
F5
VSS[044]
F8
VSS[045]
F11
VSS[046]
F13
VSS[047]
F16
VSS[048]
F19
VSS[049]
F2
VSS[050]
F22
VSS[051]
F25
VSS[052]
G4
VSS[053]
G1
VSS[054]
G23
VSS[055]
G26
VSS[056]
H3
VSS[057]
H6
VSS[058]
H21
VSS[059]
H24
VSS[060]
J2
VSS[061]
J5
VSS[062]
J22
VSS[063]
J25
VSS[064]
K1
VSS[065]
K4
VSS[066]
K23
VSS[067]
K26
VSS[068]
L3
VSS[069]
L6
VSS[070]
L21
VSS[071]
L24
VSS[072]
M2
VSS[073]
M5
VSS[074]
M22
VSS[075]
M25
VSS[076]
N1
VSS[077]
N4
VSS[078]
N23
VSS[079]
N26
VSS[080]
P3
VSS[081]
PZ47823-2743-42
PZ47823-2743-42
5
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
AF3
AF6
AF8
AF11
AF13
AF16
AF19
AF21
AF24
VCC_CORE
4
C370
C370
22U-6.3V_8
22U-6.3V_8
C363
C363
22U-6.3V_8
22U-6.3V_8
C427
C427
22U-6.3V_8
22U-6.3V_8
C341
C341
22U-6.3V_8
22U-6.3V_8
C386
C386
22U-6.3V_8
22U-6.3V_8
C409
C409
22U-6.3V_8
22U-6.3V_8
C400
C400
22U-6.3V_8
22U-6.3V_8
C443
C443
22U-6.3V_8
22U-6.3V_8
C340
C340
22U-6.3V_8
22U-6.3V_8
C359
C359
22U-6.3V_8
22U-6.3V_8
C339
C339
22U-6.3V_8
22U-6.3V_8
C389
C389
22U-6.3V_8
22U-6.3V_8
C349
C349
22U-6.3V_8
22U-6.3V_8
C399
C399
22U-6.3V_8
22U-6.3V_8
C368
C368
22U-6.3V_8
22U-6.3V_8
C375
C375
22U-6.3V_8
22U-6.3V_8
change to 0805
4
C402
C402
22U-6.3V_8
22U-6.3V_8
C423
C423
22U-6.3V_8
22U-6.3V_8
C421
C421
22U-6.3V_8
22U-6.3V_8
C378
C378
22U-6.3V_8
22U-6.3V_8
C401
C401
22U-6.3V_8
22U-6.3V_8
C422
C422
22U-6.3V_8
22U-6.3V_8
C373
C373
22U-6.3V_8
22U-6.3V_8
C390
C390
22U-6.3V_8
22U-6.3V_8
C420
C420
22U-6.3V_8
22U-6.3V_8
C442
C442
22U-6.3V_8
22U-6.3V_8
C385
C385
22U-6.3V_8
22U-6.3V_8
C410
C410
22U-6.3V_8
22U-6.3V_8
C388
C388
22U-6.3V_8
22U-6.3V_8
C372
C372
22U-6.3V_8
22U-6.3V_8
C428
C428
22U-6.3V_8
22U-6.3V_8
C369
C369
22U-6.3V_8
22U-6.3V_8
3
A10
A12
A13
A15
A17
A18
A20
B10
B12
B14
B15
B17
B18
B20
C10
C12
C13
C15
C17
C18
D10
D12
D14
D15
D17
D18
E10
E12
E13
E15
E17
E18
E20
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18
3
A7
A9
B7
B9
C9
D9
E7
E9
F7
F9
U43C
U43C
VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]
PZ47823-2743-42
PZ47823-2743-42
VCC[100]
VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]
VCCSENSE
VSSSENSE
VCC[68]
VCC[69]
VCC[70]
VCC[71]
VCC[72]
VCC[73]
VCC[74]
VCC[75]
VCC[76]
VCC[77]
VCC[78]
VCC[79]
VCC[80]
VCC[81]
VCC[82]
VCC[83]
VCC[84]
VCC[85]
VCC[86]
VCC[87]
VCC[88]
VCC[89]
VCC[90]
VCC[91]
VCC[92]
VCC[93]
VCC[94]
VCC[95]
VCC[96]
VCC[97]
VCC[98]
VCC[99]
VCCA
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
2
VCC_CORE VCC_CORE
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
V6
G21
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
B26
VCCA (1.5v) is a power source required by the PLL clock
AD6
AF5
AE5
AF4
AE3
AF2
AE2
+1.05V
+1.05V
+
+
C781
C781
330U-2.5V_7343
330U-2.5V_7343
+1.05V
VCC_CORE
+1.5V
VCC_CORE
C350
C350
22U-6.3V_8
22U-6.3V_8
C449
C449
.1U-10V_4
.1U-10V_4
H_VID0 41
H_VID1 41
H_VID2 41
H_VID3 41
H_VID4 41
H_VID5 41
H_VID6 41
C419
C419
22U-6.3V_8
22U-6.3V_8
C361
C361
.1U-10V_4
.1U-10V_4
+1.5V
+1.05V 2,3,6,8,9,10,14,17,44
VCC_CORE 41
+1.5V 8,10,15,17,29,33,42,43
C371
C371
22U-6.3V_8
22U-6.3V_8
C360
C360
C448
C448
.1U-10V_4
.1U-10V_4
.1U-10V_4
.1U-10V_4
VCC_CORE
R221
R221
*100/F_4
*100/F_4
AF7
AE7
R220 *100/F_4 R220 *100/F_4
A1A:Reversed VCCSENSE/VSSSENSE on
Vcore side
PROJECT : ZC1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
CPU(2 OF 2 )
CPU(2 OF 2 )
CPU(2 OF 2 )
Date: Sheet
Date: Sheet
Date: Sheet
2
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
1
C398
C398
22U-6.3V_8
22U-6.3V_8
C450
C450
.1U-10V_4
.1U-10V_4
near CPU B26
+1.5V
C472
C472
.01U-16V_4
.01U-16V_4
VCCSENSE 41
VSSSENSE 41
44 6 Monday, November 28, 2005
44 6 Monday, November 28, 2005
44 6 Monday, November 28, 2005
1
C362
C362
.1U-10V_4
.1U-10V_4
of
of
of
C475
C475
10U/X5R-6.3V_8
10U/X5R-6.3V_8
1A
1A
1A
5
4
3
2
1
+3V
Q17
Q17
3
Q18
Q18
3
+3V
2
1
R192
R192
10K_4
10K_4
2
1
1 2
THERM_ALERT# 16
R205 *0_4 R205 *0_4
+3V
R776 10K_4 R776 10K_4
RHU002N06
RHU002N06
D D
MBCLK 19,39,46
MBDATA 19,39,46
RHU002N06
RHU002N06
D2B:Add R776 for CPU thermal sensor
C C
+5V
D2B:Add R545 for VGA thermal sensor
VGA_THERM# 19
THERM_OVER# G993_VEN
B B
CPUFAN# 39
R545 0_4 R545 0_4
R529 0_4 R529 0_4
+5V
1 2
1 2
R80 *0_4 R80 *0_4
G993_VEN
U38
U38
VIN2VO
1
FON#
4
VSET
G995P1U
G995P1U
*AO3403
*AO3403
GND
GND
GND
GND
Q13
Q13
1
2
3
5
6
7
8
TH_FAN_POWER
3
30 MIL
A1A:Change FAN driver to G995
+3V
R196
R196
10K_4
10K_4
LM86__SMC
LM86_SMD
THERM_OVER#
R81
R81
10K_4
10K_4
THERM_OVER#
FANSIG 39
.01U-16V_4
.01U-16V_4
R193
R193
200_4
200_4
C112
C112
LM86VCC
U12
U12
8
SCLK
7
SDA
6
ALERT#
4
OVERT#
MAX6657/GMT-781
MAX6657/GMT-781
ADDRESS: 98H
C732
C732
*.01U-16V_4
*.01U-16V_4
A1A:Remove FANSIG capacitor
25mils
VCC
DXP
DXN
GND
CPU FAN
+3V
R547
R547
10K_4
10K_4
1
2
3
5
CN28
CN28
1
2
345
FAN_CON
FAN_CON
C287
C287
.1U-10V_4
.1U-10V_4
H_THERMDA
C305
C305
2200P-50V_4
2200P-50V_4
H_THERMDC
10/20mils
H_THERMDA 3
H_THERMDC 3
A1A:Change FAN CONN footprint
F3B:Add R793,C974 to prevent FAN noise
PROJECT : ZC1
A A
5
4
3
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Thermal Sensor,FAN
Thermal Sensor,FAN
Thermal Sensor,FAN
Date: Sheet
Date: Sheet
Date: Sheet of
2
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
54 6 Friday, December 02, 2005
54 6 Friday, December 02, 2005
54 6 Friday, December 02, 2005
of
of
1
1A
1A
1A
5
H_XRCOMP
H_XSWING
C484
C484
.1U-10V_4
.1U-10V_4
H_YSWING
C792
C792
.1U-10V_4
.1U-10V_4
5
10 mils/20mils
10 mils/20mils
10 mils/20mils
10 mils/20mils
R280
R280
24.9/F_4
24.9/F_4
D D
C C
B B
A A
+1.05V
+1.05V
+1.05V
+1.05V
R278
R278
54.9/F_4
54.9/F_4
H_XSCOMP
R272
R272
221/F_4
221/F_4
R277
R277
100/F_4
100/F_4
R565
R565
54.9/F_4
54.9/F_4
H_YSCOMP
R566
R566
221/F_4
221/F_4
R567
R567
100/F_4
100/F_4
H_YRCOMP
R568
R568
24.9/F_4
24.9/F_4
CLK_MCH_BCLK 2
CLK_MCH_BCLK# 2
H_D#[63:0] 3
H_XRCOMP
H_XSCOMP
H_XSWING
H_YRCOMP
H_YSCOMP
H_YSWING
Short Stub < 100mils
extract from same point
T65T65
T66T66
4
U44A
K11
T10
W11
U11
T11
W9
W7
W6
AB7
AA9
W4
W3
W5
Y10
AB8
W2
AA4
AA7
AA2
AA6
AA10
AA1
AB4
AC9
AB11
AC11
AB3
AC2
AD1
AD9
AC1
AD7
AC6
AB5
AD10
AD4
AC8
W1
AG2
AG1
F1
J1
H1
J6
H3
K2
G1
G2
K9
K1
K7
J8
H4
J3
G4
T3
U7
U9
T1
T8
T4
U5
T9
T5
Y3
Y7
Y8
E1
E2
E4
Y1
U1
U44A
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
H_XRCOMP
H_XSCOMP
H_XSWING
H_YRCOMP
H_YSCOMP
H_YSWING
H_CLKIN
H_CLKIN#
Calistoga(945PM)
Calistoga(945PM)
HOST
HOST
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
4
3
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_VREF_0
H_BNR#
H_BPRI#
H_BREQ#0
H_CPURST#
H_DBSY#
H_DEFER#
H_DPWR#
H_DRDY#
H_VREF_1
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
H_HIT#
H_HITM#
H_LOCK#
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
H_RS#_0
H_RS#_1
H_RS#_2
H_SLPCPU#
H_TRDY#
3
H9
C9
E11
G11
F11
G12
F9
H11
J12
G14
D9
J14
H13
J15
F14
D12
A11
C11
A12
A13
E13
G13
F12
B12
B14
C12
A14
C14
D14
E8
B9
C13
J13
C6
F6
C7
B7
A7
C3
J9
H8
K13
J7
W8
U3
AB10
K4
T7
Y5
AC4
K3
T6
AA5
AC5
D3
D4
B3
D8
G8
B8
F8
A8
B4
E6
D6
E3
E7
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
R561 0_4 R561 0_4
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
2
H_A#[31:3] 3
H_ADS# 3
H_ADSTB0# 3
H_ADSTB1# 3
H_BNR# 3
H_BPRI# 3
H_BREQ#0 3
H_CPURST# 3
H_DBSY# 3
H_DEFER# 3
H_DPWR# 3
H_DRDY# 3
H_DINV#[3:0] 3
H_DSTBN#[3:0] 3
H_DSTBP#[3:0] 3
H_HIT# 3
H_HITM# 3
H_LOCK# 3
H_REQ#[4:0] 3
H_RS#[2:0] 3
H_CPUSLP# 3,14
H_TRDY# 3
2
1
+1.05V
+1.05V
C467
C467
.1U-10V_4
.1U-10V_4
C469
C469
.1U-10V_4
.1U-10V_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet
Date: Sheet
+1.05V 2,3,4,8,9,10,14,17,44
H_VREF :10 mils/20 mils space
R261
R261
100/F_4
100/F_4
R257
R257
200/F_4
200/F_4
GMCH HOST(1 OF 6 )
GMCH HOST(1 OF 6 )
GMCH HOST(1 OF 6 )
Place within 100 mils
H_VREF
H_VREF
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
64 6 Friday, December 02, 2005
64 6 Friday, December 02, 2005
64 6 Friday, December 02, 2005
1
1A
1A
of
of
1A
5
4
3
2
1
M_B_DQ[63:0] 13
D D
M_A_DQ[63:0] 13
C C
B B
A A
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
5
AJ35
AJ34
AM31
AM33
AJ36
AK35
AJ32
AH31
AN35
AP33
AR31
AP31
AN38
AM36
AM34
AN33
AK26
AL27
AM26
AN24
AK28
AL28
AM24
AP26
AP23
AL22
AP21
AN20
AL23
AP24
AP20
AT21
AR12
AR14
AP13
AP12
AT13
AT12
AL14
AL12
AK9
AN7
AK8
AK7
AP9
AN9
AT5
AL5
AY2
AW2
AP1
AN2
AV2
AT3
AN1
AL2
AG7
AF9
AG4
AF6
AG9
AH6
AF4
AF8
U44D
U44D
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
Calistoga(945PM)
Calistoga(945PM)
AU12
SA_BS_0
AV14
SA_BS_1
BA20
SA_BS_2
AY13
SA_CAS#
AJ33
SA_DM_0
AM35
SA_DM_1
AL26
SA_DM_2
AN22
SA_DM_3
AM14
SA_DM_4
AL9
SA_DM_5
AR3
SA_DM_6
AH4
SA_DM_7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_RAS#
SA_WE#
AK33
AT33
AN28
AM22
AN12
AN8
AP3
AG5
AK32
AU33
AN27
AM21
AM12
AL8
AN3
AH5
AY16
AU14
AW16
BA16
BA17
AU16
AV17
AU17
AW17
AT16
AU13
AT17
AV20
AV12
AW14
AK23
AK24
AY14
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_RCVENIN#
SA_RCVENOUT#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
4
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CAS#
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
TP_MA_RCVENIN#
TP_MA_RCVENOUT#
M_A_BS#0 12,13
M_A_BS#1 12,13
M_A_BS#2 12,13
M_A_CAS# 12,13
M_A_DM[7:0] 13
M_A_DQS[7:0] 13
M_A_DQS#[7:0] 13
M_A_A[13:0] 12,13
M_A_RAS# 12,13
T45T45
T44T44
M_A_WE# 12,13
3
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AK39
AJ37
AP39
AR41
AJ38
AK38
AN41
AP41
AT40
AV41
AU38
AV38
AP38
AR40
AW38
AY38
BA38
AV36
AR36
AP36
BA36
AU36
AP35
AP34
AY33
BA33
AT31
AU29
AU31
AW31
AV29
AW29
AM19
AL19
AP14
AN14
AN17
AM16
AP15
AL15
AJ11
AH10
AJ9
AN10
AK13
AH11
AK10
AJ8
BA10
AW10
BA4
AW4
AY10
AY9
AW5
AY5
AV4
AR5
AK4
AK3
AT4
AK5
AJ5
AJ3
U44E
U44E
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
Calistoga(945PM)
Calistoga(945PM)
AT24
SB_BS_0
AV23
SB_BS_1
AY28
SB_BS_2
AR24
SB_CAS#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_WE#
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
GMCH DDR(2 OF 6 )
GMCH DDR(2 OF 6 )
GMCH DDR(2 OF 6 )
Date: Sheet of
Date: Sheet
2
Date: Sheet
AK36
AR38
AT36
BA31
AL17
AH8
BA5
AN4
AM39
AT39
AU35
AR29
AR16
AR10
AR7
AN5
AM40
AU39
AT35
AP29
AP16
AT10
AT7
AP5
AY23
AW24
AY24
AR28
AT27
AT28
AU27
AV28
AV27
AW27
AV24
BA27
AY27
AR23
AU23
AK16
AK18
AR27
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
TP_MB_RCVENIN#
TP_MB_RCVENOUT#
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
M_B_BS#0 12,13
M_B_BS#1 12,13
M_B_BS#2 12,13
M_B_CAS# 12,13
M_B_DM[7:0] 13
M_B_DQS[7:0] 13
M_B_DQS#[7:0] 13
M_B_A[13:0] 12,13
M_B_RAS# 12,13
T52T52
T48T48
M_B_WE# 12,13
74 6 Friday, December 02, 2005
74 6 Friday, December 02, 2005
74 6 Friday, December 02, 2005
1
1A
1A
of
of
1A
5
U44B
CLK_MCH_OE#
T36T36
MCH_RSVD_1
T37T37
MCH_RSVD_2
T35T35
MCH_RSVD_3
T64T64
MCH_RSVD_4
T61T61
MCH_RSVD_5
T54T54
MCH_RSVD_6
T57T57
MCH_RSVD_7
T62T62
MCH_RSVD_8
T46T46
TV_DCONSEL0
T40T40
TV_DCONSEL1
T38T38
MCH_RSVD_11
T126T126
MCH_RSVD_12
D D
A1A:Change PM_EXTTS#1
to DPRSLPVR
C C
DELAY_VR_PWRGOOD 3,16,41
PLT_RST-R# 15
+3V
B B
R226 10K/F_4 R226 10K/F_4
R224 *10K/F_4 R224 *10K/F_4
T132T132
MCH_RSVD_13
T136T136
MCH_RSVD_14
T39T39
MCH_RSVD_15
T43T43
MCH_BSEL0 2
MCH_BSEL1 2
MCH_BSEL2 2
PM_BMBUSY# 16
PM_EXTTS#0 13
DPRSLPVR 16
PM_THRMTRIP# 3,14
T41T41
T42T42
MCH_ICH_SYNC 15
T150T150
T123T123
T149T149
T135T135
T134T134
T133T133
T139T139
T140T140
T143T143
T122T122
T147T147
T129T129
T144T144
T130T130
T148T148
T128T128
T141T141
T131T131
T146T146
MCH_CFG_3
MCH_CFG_4
T47T47
MCH_CFG_5
T56T56
MCH_CFG_6
MCH_CFG_7
MCH_CFG_8
MCH_CFG_9
T50T50
MCH_CFG_10
MCH_CFG_11
MCH_CFG_12
MCH_CFG_13
MCH_CFG_14
MCH_CFG_15
T55T55
MCH_CFG_16
T49T49
MCH_CFG_17
MCH_CFG_18
T51T51
MCH_CFG_19
MCH_CFG_20
R228 0_4 R228 0_4
RST IN# MCH
R231 100/F_4 R231 100/F_4
SDVO_CTRLCLK
SDVO_CTRLDATA
TP_MCH_NC0
TP_MCH_NC1
TP_MCH_NC2
TP_MCH_NC3
TP_MCH_NC4
TP_MCH_NC5
TP_MCH_NC6
TP_MCH_NC7
TP_MCH_NC8
TP_MCH_NC9
TP_MCH_NC10
TP_MCH_NC11
TP_MCH_NC12
TP_MCH_NC13
TP_MCH_NC14
TP_MCH_NC15
TP_MCH_NC16
TP_MCH_NC17
TP_MCH_NC18
PM_EXTTS#0
DPRSLPVR
U44B
H32
RSVD_0
T32
RSVD_1
R32
RSVD_2
F3
RSVD_3
F7
RSVD_4
AG11
RSVD_5
AF11
RSVD_6
H7
RSVD_7
J19
RSVD_8
K30
RSVD_9
J29
RSVD_10
A41
RSVD_11
A35
RSVD_12
A34
RSVD_13
D28
RSVD_14
D27
RSVD_15
K16
CFG_0
K18
CFG_1
J18
CFG_2
F18
CFG_3
E15
CFG_4
F15
CFG_5
E18
CFG_6
D19
CFG_7
G16
E16
D15
G15
K15
C15
H16
G18
H15
G28
H26
AH33
AH34
K28
BA41
BA40
BA39
AY41
AW41
AW1
D16
J25
K27
J26
F25
H28
H27
C41
BA3
BA2
BA1
B41
AY1
A40
A39
G6
D1
C1
B2
A4
A3
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
PM_BMBUSY#
PM_EXTTS#_0
PM_EXTTS#_1
PM_THRMTRIP#
PWROK
RSTIN#
SDVO_CTRLCLK
SDVO_CTRLDATA
LT_RESET#
NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
CFG RSVD
CFG RSVD
PM
PM
MISC
MISC
NC
NC
Calistoga(945PM)
Calistoga(945PM)
A1A:don't stuff PM_EXTTS#1 pull high resistor
A1A:Reversed for SDVO CLK/DATA
+2.5V
+2.5V
R229 *4.7K_4 R229 *4.7K_4
R225 *4.7K_4 R225 *4.7K_4
SDVO_CTRLCLK
SDVO_CTRLDATA
PULL LOW FOR DVO NOT PRESENT(INTERNAL PULLLOW IN 915GM)
1.MCH_CFG_5 Low = DMI X2, High=DMIX4
2.MCH_CFG_6 DDR : Low =Moby Dick, High= Calistoga (Default)
3.MCH_CFG_7 CPU Strap Low=RSVD, High=Mobile CPU
4.MCH_CFG_9 PCI Exp Graphics Lane: Low =Reserved,High=Mobility
5.MCH_CFG_10 Host PLL VCC Select: Low=Reserved, High=Mobility
6.MCH_CFG_11: PSB 4x CLK ENABLE Low=Reserved, High=Calistoga
7.MCH_CFG_16 FSB Dynmic ODT: Low=Dynamic ODT Disabled,
A A
High=Dynamic ODT Enabled.
8.MCH_CFG_18 VCC Select: LOW=1.05V, High=1.5V
9.MCH_CFG_19 DMI LANE Reversal: Low=Normal,High=LANES Reversed.
10.MCH_CFG_20 PCIE Backward interpoerability mode: Low= only
SDVO or PCIE x1 is operational (defaults) ,High=SDVO and
PCIE x1 are operation simultaneously via the PEG port.
5
SM_CKE_0
SM_CKE_1
SM_CKE_2
SM_CKE_3
SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3
SM_OCDCOMP_0
SM_OCDCOMP_1
SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3
SM_RCOMP#
SM_RCOMP
DDR MUXING CLK DMI
DDR MUXING CLK DMI
SM_VREF_0
SM_VREF_1
D_REFCLKIN#
D_REFCLKIN
D_REFSSCLKIN#
D_REFSSCLKIN
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
4
AY35
SM_CK_0
AR1
SM_CK_1
AW7
SM_CK_2
AW40
SM_CK_3
AW35
SM_CK#_0
AT1
SM_CK#_1
AY7
SM_CK#_2
AY40
SM_CK#_3
AU20
AT20
BA29
AY29
AW13
AW12
AY21
AW21
AL20
AF10
BA13
BA12
AY20
AU21
AV9
AT9
SMDDR_VREF_MCH
AK1
AK41
AF33
G_CLKIN#
AG33
G_CLKIN
A27
A26
DREFSSCLK#
C40
DREFSSCLK
D41
DMI_TXN0
AE35
DMI_TXN1
AF39
DMI_TXN2
AG35
DMI_TXN3
AH39
DMI_TXP0
AC35
DMI_TXP1
AE39
DMI_TXP2
AF35
DMI_TXP3
AG39
DMI_RXN0
AE37
DMI_RXN1
AF41
DMI_RXN2
AG37
DMI_RXN3
AH41
DMI_RXP0
AC37
DMI_RXP1
AE41
DMI_RXP2
AF37
DMI_RXP3
AG41
< 0.1" . 15mils/15mils space
use 1% R
M_OCDCOMP_0
M_OCDCOMP_1
M_RCOMP#
M_RCOMP
M_CLK_DDR0 13
M_CLK_DDR1 13
M_CLK_DDR2 13
M_CLK_DDR3 13
M_CLK_DDR#0 13
M_CLK_DDR#1 13
M_CLK_DDR#2 13
M_CLK_DDR#3 13
M_CKE0 12,13
M_CKE1 12,13
M_CKE2 12,13
M_CKE3 12,13
M_CS#0 12,13
M_CS#1 12,13
M_CS#2 12,13
M_CS#3 12,13
M_ODT0 12,13
M_ODT1 12,13
M_ODT2 12,13
M_ODT3 12,13
R569 0_6 R569 0_6
CLK_PCIE_3GPLL# 2
CLK_PCIE_3GPLL 2
DREFCLK# 2
DREFCLK 2
T184T184
T185T185
DMI_TXN[3:0] 15
DMI_TXP[3:0] 15
DMI_RXN[3:0] 15
DMI_RXP[3:0] 15
GMCH Strap pin
MCH_CFG_5
MCH_CFG_6
MCH_CFG_7
MCH_CFG_9
MCH_CFG_10
A1A:MCH_CFG_11->intel WW31 recommand remove
MCH_CFG_11
MCH_CFG_12
MCH_CFG_13
MCH_CFG_16
MCH_CFG_18 CFG_RSVD_0_R
MCH_CFG_19
MCH_CFG_20
4
R248 *2.2K_4 R248 *2.2K_4
R247 *2.2K_4 R247 *2.2K_4
R245 *2.2K_4 R245 *2.2K_4
R250 *2.2K_4 R250 *2.2K_4
R249 *2.2K_4 R249 *2.2K_4
R253 *2.2K_4 R253 *2.2K_4
A1A:intel WW12 recommand remove
R252 *2.2K_4 R252 *2.2K_4
R251 *2.2K_4 R251 *2.2K_4
R246 *2.2K_4 R246 *2.2K_4
R230 1K/F_4 R230 1K/F_4
R219 *1K/F_4 R219 *1K/F_4
R222 *1K/F_4 R222 *1K/F_4
3
+V1.5_PCIE
+3V
SMDDR_VREF
+1.8VSUS
If the LVDS interface is
not implemented, all
signals associated with
the interface can be left
as No Connects
+V1.5_PCIE 10
+3V 2,5,10,13,14,15,16,17,18,19,20,24,25,26,27,29,30,31,32,33,34,35,36,37,38,39,40,41,42,44
SMDDR_VREF 13,43
+1.8VSUS 9,13,20,42,43
15mils/15mils
R259
R259
R242
NC from WW45
SMDDR_VREF
R242
*40.2/F_4
*40.2/F_4
*40.2/F_4
*40.2/F_4
Layout as short as passable
15mils/10mils
80.6/F_4
80.6/F_4
M_RCOMP#
M_RCOMP
80.6/F_4
80.6/F_4
+1.8VSUS
R262
R262
R263
R263
+1.5V
R737 0_6 R737 0_6
B1B:TV disable connect to +1.5V
B1B:CRT disable connect to GMCH VCC Core
R738 0_6 R738 0_6
+1.05V
+3V
R227
R227
*0_4
*0_4
+3V
+3V
3
2
1
20mils/20mils space
U44C
U44C
D32
L_BKLTCTL
J30
L_BKLTEN
H30
L_CLKCTLA
H29
L_CLKCTLB
G26
L_DDC_CLK
G25
L_DDC_DATA
B38
L_IBG
C35
L_VBG
F32
L_VDDEN
C33
L_VREFH
C32
L_VREFL
A33
LA_CLK#
A32
LA_CLK
E27
LB_CLK#
E26
LB_CLK
C37
LA_DATA#_0
B35
LA_DATA#_1
A37
LA_DATA#_2
B37
LA_DATA_0
B34
LA_DATA_1
A36
LA_DATA_2
G30
LB_DATA#_0
D30
LB_DATA#_1
F29
LB_DATA#_2
F30
LB_DATA_0
D29
LB_DATA_1
F28
LB_DATA_2
A16
TV_DACA_OUT
C18
TV_DACB_OUT
A19
TV_DACC_OUT
J20
TV_IREF
B16
TV_IRTNA
B18
TV_IRTNB
B19
TV_IRTNC
E23
CRT_BLUE
D23
CRT_BLUE#
C22
CRT_GREEN
B22
CRT_GREEN#
A21
CRT_RED
B21
CRT_RED#
C26
CRT_DDC_CLK
C25
CRT_DDC_DATA
G23
CRT_HSYNC
J22
CRT_IREF
H23
CRT_VSYNC
Calistoga(945PM)
Calistoga(945PM)
LVDS
LVDS
TV
TV
VGA
VGA
EXP_A_COMPI
EXP_A_COMPO
EXP_A_RXN_0
EXP_A_RXN_1
EXP_A_RXN_2
EXP_A_RXN_3
EXP_A_RXN_4
EXP_A_RXN_5
EXP_A_RXN_6
EXP_A_RXN_7
EXP_A_RXN_8
EXP_A_RXN_9
EXP_A_RXN_10
EXP_A_RXN_11
EXP_A_RXN_12
EXP_A_RXN_13
EXP_A_RXN_14
EXP_A_RXN_15
EXP_A_RXP_0
EXP_A_RXP_1
EXP_A_RXP_2
EXP_A_RXP_3
EXP_A_RXP_4
EXP_A_RXP_5
EXP_A_RXP_6
EXP_A_RXP_7
EXP_A_RXP_8
EXP_A_RXP_9
EXP_A_RXP_10
EXP_A_RXP_11
EXP_A_RXP_12
EXP_A_RXP_13
EXP_A_RXP_14
EXP_A_RXP_15
EXP_A_TXN_0
EXP_A_TXN_1
EXP_A_TXN_2
EXP_A_TXN_3
EXP_A_TXN_4
EXP_A_TXN_5
EXP_A_TXN_6
EXP_A_TXN_7
EXP_A_TXN_8
EXP_A_TXN_9
EXP_A_TXN_10
EXP_A_TXN_11
EXP_A_TXN_12
PCI-EXPRESS GRAPHICS
PCI-EXPRESS GRAPHICS
EXP_A_TXN_13
EXP_A_TXN_14
EXP_A_TXN_15
EXP_A_TXP_0
EXP_A_TXP_1
EXP_A_TXP_2
EXP_A_TXP_3
EXP_A_TXP_4
EXP_A_TXP_5
EXP_A_TXP_6
EXP_A_TXP_7
EXP_A_TXP_8
EXP_A_TXP_9
EXP_A_TXP_10
EXP_A_TXP_11
EXP_A_TXP_12
EXP_A_TXP_13
EXP_A_TXP_14
EXP_A_TXP_15
If not implemented, the SDVO interface signals can be left as No Connect.
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
GMCH DMI/VEDIO(3 OF 6 )
GMCH DMI/VEDIO(3 OF 6 )
GMCH DMI/VEDIO(3 OF 6 )
Date: Sheet
Date: Sheet
2
Date: Sheet
EXP_A_COMPX
D40
D38
PEG_RXN0
F34
PEG_RXN1
G38
PEG_RXN2
H34
PEG_RXN3
J38
PEG_RXN4
L34
PEG_RXN5
M38
PEG_RXN6
N34
PEG_RXN7
P38
PEG_RXN8
R34
PEG_RXN9
T38
PEG_RXN10
V34
PEG_RXN11
W38
PEG_RXN12
Y34
PEG_RXN13
AA38
PEG_RXN14
AB34
PEG_RXN15
AC38
PEG_RXP0
D34
PEG_RXP1
F38
PEG_RXP2
G34
PEG_RXP3
H38
PEG_RXP4
J34
PEG_RXP5
L38
PEG_RXP6
M34
PEG_RXP7
N38
PEG_RXP8
P34
PEG_RXP9
R38
PEG_RXP10
T34
PEG_RXP11
V38
PEG_RXP12
W34
PEG_RXP13
Y38
PEG_RXP14
AA34
PEG_RXP15
AB38
C_PEG_TXN0
F36
C_PEG_TXN1
G40
C_PEG_TXN2
H36
C_PEG_TXN3
J40
C_PEG_TXN4
L36
C_PEG_TXN5
M40
C_PEG_TXN6
N36
C_PEG_TXN7
P40
C_PEG_TXN8
R36
C_PEG_TXN9
T40
C_PEG_TXN10
V36
C_PEG_TXN11
W40
C_PEG_TXN12
Y36
C_PEG_TXN13
AA40
C_PEG_TXN14
AB36
C_PEG_TXN15
AC40
C_PEG_TXP0
D36
C_PEG_TXP1
F40
C_PEG_TXP2
G36
C_PEG_TXP3
H40
C_PEG_TXP4
J36
C_PEG_TXP5
L40
C_PEG_TXP6
M36
C_PEG_TXP7
N40
C_PEG_TXP8
P36
C_PEG_TXP9
R40
C_PEG_TXP10
T36
C_PEG_TXP11
V40
C_PEG_TXP12
W36
C_PEG_TXP13
Y40
C_PEG_TXP14
AA36
C_PEG_TXP15 PEG_TXP15
AB40
PEG_TXP[15:0] 18
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
R218 24.9/F_4 R218 24.9/F_4
C743 EV@.1U-10V_4 C743 EV@.1U-10V_4
C775 EV@.1U-10V_4 C775 EV@.1U-10V_4
C745 EV@.1U-10V_4 C745 EV@.1U-10V_4
C777 EV@.1U-10V_4 C777 EV@.1U-10V_4
C747 EV@.1U-10V_4 C747 EV@.1U-10V_4
C779 EV@.1U-10V_4 C779 EV@.1U-10V_4
C749 EV@.1U-10V_4 C749 EV@.1U-10V_4
C765 EV@.1U-10V_4 C765 EV@.1U-10V_4
C751 EV@.1U-10V_4 C751 EV@.1U-10V_4
C767 EV@.1U-10V_4 C767 EV@.1U-10V_4
C753 EV@.1U-10V_4 C753 EV@.1U-10V_4
C769 EV@.1U-10V_4 C769 EV@.1U-10V_4
C755 EV@.1U-10V_4 C755 EV@.1U-10V_4
C771 EV@.1U-10V_4 C771 EV@.1U-10V_4
C757 EV@.1U-10V_4 C757 EV@.1U-10V_4
C773 EV@.1U-10V_4 C773 EV@.1U-10V_4
C742 EV@.1U-10V_4 C742 EV@.1U-10V_4
C774 EV@.1U-10V_4 C774 EV@.1U-10V_4
C744 EV@.1U-10V_4 C744 EV@.1U-10V_4
C776 EV@.1U-10V_4 C776 EV@.1U-10V_4
C746 EV@.1U-10V_4 C746 EV@.1U-10V_4
C778 EV@.1U-10V_4 C778 EV@.1U-10V_4
C748 EV@.1U-10V_4 C748 EV@.1U-10V_4
C764 EV@.1U-10V_4 C764 EV@.1U-10V_4
C750 EV@.1U-10V_4 C750 EV@.1U-10V_4
C766 EV@.1U-10V_4 C766 EV@.1U-10V_4
C752 EV@.1U-10V_4 C752 EV@.1U-10V_4
C768 EV@.1U-10V_4 C768 EV@.1U-10V_4
C754 EV@.1U-10V_4 C754 EV@.1U-10V_4
C770 EV@.1U-10V_4 C770 EV@.1U-10V_4
C756 EV@.1U-10V_4 C756 EV@.1U-10V_4
C772 EV@.1U-10V_4 C772 EV@.1U-10V_4
PEG_TXN[15:0] 18
1
+V1.5_PCIE
PEG_RXN[15:0] 18
PEG_RXP[15:0] 18
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
of
of
of
84 6 Tuesday, December 06, 2005
84 6 Tuesday, December 06, 2005
84 6 Tuesday, December 06, 2005
1A
1A
1A
5
U44G
1500mA
C797
C797
+1.05V +1.05V
D D
C C
B B
A A
330U-2.5V_7343
330U-2.5V_7343
+
+
5
AA33
W33
P33
N33
AA32
Y32
W32
P32
N32
M32
AA31
W31
T31
R31
P31
N31
M31
AA30
Y30
W30
U30
T30
R30
P30
N30
M30
AA29
Y29
W29
U29
R29
P29
M29
AB28
AA28
Y28
U28
T28
R28
P28
N28
M28
P27
N27
M27
P26
N26
N25
M25
P24
N24
M24
AB23
AA23
Y23
P23
N23
M23
AC22
AB22
Y22
W22
P22
N22
M22
AC21
AA21
W21
N21
M21
AC20
AB20
Y20
W20
P20
N20
M20
AB19
AA19
Y19
N19
M19
N18
M18
P17
N17
M17
N16
M16
U44G
VCC_0
VCC_1
VCC_2
VCC_3
L33
VCC_4
J33
VCC_5
VCC_6
VCC_7
VCC_8
V32
VCC_9
VCC_10
VCC_11
VCC_12
L32
VCC_13
J32
VCC_14
VCC_15
VCC_16
V31
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
V30
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
L30
VCC_33
VCC_34
VCC_35
VCC_36
V29
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
L29
VCC_42
VCC_43
VCC_44
VCC_45
V28
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
L28
VCC_53
VCC_54
VCC_55
VCC_56
L27
VCC_57
VCC_58
VCC_59
L26
VCC_60
VCC_61
VCC_62
L25
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
L23
VCC_73
VCC_74
VCC_75
VCC_76
VCC_77
VCC_78
VCC_79
VCC_80
L22
VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_86
L21
VCC_87
VCC_88
VCC_89
VCC_90
VCC_91
VCC_92
VCC_93
VCC_94
L20
VCC_95
VCC_96
VCC_97
VCC_98
VCC_99
VCC_100
L19
VCC_101
VCC_102
VCC_103
L18
VCC_104
VCC_105
VCC_106
VCC_107
VCC_108
VCC_109
L16
VCC_110
VCC
VCC
Calistoga(945PM)
Calistoga(945PM)
VCC_SM_0
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
VCC_SM_37
VCC_SM_38
VCC_SM_39
VCC_SM_40
VCC_SM_41
VCC_SM_42
VCC_SM_43
VCC_SM_44
VCC_SM_45
VCC_SM_46
VCC_SM_47
VCC_SM_48
VCC_SM_49
VCC_SM_50
VCC_SM_51
VCC_SM_52
VCC_SM_53
VCC_SM_54
VCC_SM_55
VCC_SM_56
VCC_SM_57
VCC_SM_58
VCC_SM_59
VCC_SM_60
VCC_SM_61
VCC_SM_62
VCC_SM_63
VCC_SM_64
VCC_SM_65
VCC_SM_66
VCC_SM_67
VCC_SM_68
VCC_SM_69
VCC_SM_70
VCC_SM_71
VCC_SM_72
VCC_SM_73
VCC_SM_74
VCC_SM_75
VCC_SM_76
VCC_SM_77
VCC_SM_78
VCC_SM_79
VCC_SM_80
VCC_SM_81
VCC_SM_82
VCC_SM_83
VCC_SM_84
VCC_SM_85
VCC_SM_86
VCC_SM_87
VCC_SM_88
VCC_SM_89
VCC_SM_90
VCC_SM_91
VCC_SM_92
VCC_SM_93
VCC_SM_94
VCC_SM_95
VCC_SM_96
VCC_SM_97
VCC_SM_98
VCC_SM_99
VCC_SM_100
VCC_SM_101
VCC_SM_102
VCC_SM_103
VCC_SM_104
VCC_SM_105
VCC_SM_106
VCC_SM_107
4
4
AU41
AT41
AM41
AU40
BA34
AY34
AW34
AV34
AU34
AT34
AR34
BA30
AY30
AW30
AV30
AU30
AT30
AR30
AP30
AN30
AM30
AM29
AL29
AK29
AJ29
AH29
AJ28
AH28
AJ27
AH27
BA26
AY26
AW26
AV26
AU26
AT26
AR26
AJ26
AH26
AJ25
AH25
AJ24
AH24
BA23
AJ23
BA22
AY22
AW22
AV22
AU22
AT22
AR22
AP22
AK22
AJ22
AK21
AK20
BA19
AY19
AW19
AV19
AU19
AT19
AR19
AP19
AK19
AJ19
AJ18
AJ17
AH17
AJ16
AH16
BA15
AY15
AW15
AV15
AU15
AT15
AR15
AJ15
AJ14
AJ13
AH13
AK12
AJ12
AH12
AG12
AK11
BA8
AY8
AW8
AV8
AT8
AR8
AP8
BA6
AY6
AW6
AV6
AT6
AR6
AP6
AN6
AL6
AK6
AJ6
AV1
AJ1
VCC_SM1
VCC_SM2
VCC_SM106
VCC_SM107
25mils
25mils
C335 .47U-10V_6 C335 .47U-10V_6
C336 .47U-10V_6 C336 .47U-10V_6
DDR2 1.8 V, 667 MTs(2 Channel) 3200mA
+
+
C416
C416
C376
C376
C461
330U-2.5V_7343
330U-2.5V_7343
10U/X5R-6.3V_8
10U/X5R-6.3V_8
C377
C377
.47U-10V_6
.47U-10V_6
C478
C478
.47U-10V_6
.47U-10V_6
C461
10U/X5R-6.3V_8
10U/X5R-6.3V_8
C433
C433
.47U-10V_6
.47U-10V_6
25mils
C487 .47U-10V_6 C487 .47U-10V_6
C793 .47U-10V_6 C793 .47U-10V_6
330U-2.5V_7343
330U-2.5V_7343
+1.8VSUS
C432
C432
.47U-10V_6
.47U-10V_6
3
+
+
C796
C796
10U/X5R-6.3V_8
10U/X5R-6.3V_8
120mils
C477
C477
.1U-10V_4
.1U-10V_4
+1.5V_AUX 10
3
C468
C468
C456
C456
10U/X5R-6.3V_8
10U/X5R-6.3V_8
C406
C406
.1U-10V_4
.1U-10V_4
+1.05V 2,3,4,6,8,10,14,17,44
+1.8VSUS 8,13,20,42,43
C480
C480
1U-16V_6
1U-16V_6
C465
C465
.1U-10V_4
.1U-10V_4
+1.5V_AUX
C408
C408
.1U-10V_4
.1U-10V_4
+1.05V
+1.8VSUS
C453
C453
.1U-10V_4
.1U-10V_4
C463
C463
.1U-10V_4
.1U-10V_4
2
U44F
U44F
AD27
VCC_NCTF0
AC27
VCC_NCTF1
AB27
VCC_NCTF2
AA27
VCC_NCTF3
Y27
VCC_NCTF4
W27
VCC_NCTF5
V27
VCC_NCTF6
U27
VCC_NCTF7
T27
VCC_NCTF8
R27
VCC_NCTF9
AD26
VCC_NCTF10
AC26
VCC_NCTF11
AB26
VCC_NCTF12
AA26
VCC_NCTF13
Y26
VCC_NCTF14
W26
VCC_NCTF15
V26
VCC_NCTF16
U26
VCC_NCTF17
T26
VCC_NCTF18
R26
VCC_NCTF19
AD25
VCC_NCTF20
AC25
VCC_NCTF21
AB25
VCC_NCTF22
AA25
VCC_NCTF23
Y25
VCC_NCTF24
W25
VCC_NCTF25
V25
VCC_NCTF26
U25
VCC_NCTF27
T25
VCC_NCTF28
R25
VCC_NCTF29
AD24
VCC_NCTF30
AC24
VCC_NCTF31
AB24
VCC_NCTF32
AA24
VCC_NCTF33
Y24
VCC_NCTF34
W24
VCC_NCTF35
V24
VCC_NCTF36
U24
VCC_NCTF37
T24
VCC_NCTF38
R24
VCC_NCTF39
AD23
VCC_NCTF40
V23
VCC_NCTF41
U23
VCC_NCTF42
T23
VCC_NCTF43
R23
VCC_NCTF44
AD22
VCC_NCTF45
V22
VCC_NCTF46
U22
VCC_NCTF47
T22
VCC_NCTF48
R22
VCC_NCTF49
AD21
VCC_NCTF50
V21
VCC_NCTF51
U21
VCC_NCTF52
T21
VCC_NCTF53
R21
VCC_NCTF54
AD20
VCC_NCTF55
V20
VCC_NCTF56
U20
VCC_NCTF57
T20
VCC_NCTF58
R20
VCC_NCTF59
AD19
VCC_NCTF60
V19
VCC_NCTF61
U19
VCC_NCTF62
T19
VCC_NCTF63
AD18
VCC_NCTF64
AC18
VCC_NCTF65
AB18
VCC_NCTF66
AA18
VCC_NCTF67
Y18
VCC_NCTF68
W18
VCC_NCTF69
V18
VCC_NCTF70
U18
VCC_NCTF71
T18
VCC_NCTF72
2
NCTF
NCTF
Calistoga(945PM)
Calistoga(945PM)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
GMCH PW & STRAP(4 OF 6)
GMCH PW & STRAP(4 OF 6)
GMCH PW & STRAP(4 OF 6)
Date: Sheet
Date: Sheet
Date: Sheet
VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8
VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12
VCCAUX_NCTF0
VCCAUX_NCTF1
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
VCCAUX_NCTF7
VCCAUX_NCTF8
VCCAUX_NCTF9
VCCAUX_NCTF10
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
VCCAUX_NCTF18
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
VCCAUX_NCTF35
VCCAUX_NCTF36
VCCAUX_NCTF37
VCCAUX_NCTF38
VCCAUX_NCTF39
VCCAUX_NCTF40
VCCAUX_NCTF41
VCCAUX_NCTF42
VCCAUX_NCTF43
VCCAUX_NCTF44
VCCAUX_NCTF45
VCCAUX_NCTF46
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
VCCAUX_NCTF52
VCCAUX_NCTF53
VCCAUX_NCTF54
VCCAUX_NCTF55
VCCAUX_NCTF56
VCCAUX_NCTF57
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
AE27
AE26
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AC17
Y17
U17
AG27
AF27
AG26
AF26
AG25
AF25
AG24
AF24
AG23
AF23
AG22
AF22
AG21
AF21
AG20
AF20
AG19
AF19
R19
AG18
AF18
R18
AG17
AF17
AE17
AD17
AB17
AA17
W17
V17
T17
R17
AG16
AF16
AE16
AD16
AC16
AB16
AA16
Y16
W16
V16
U16
T16
R16
AG15
AF15
AE15
AD15
AC15
AB15
AA15
Y15
W15
V15
U15
T15
R15
1
+1.5V_AUX
100mils
1A
1A
1A
of
of
of
94 6 Friday, December 02, 2005
94 6 Friday, December 02, 2005
94 6 Friday, December 02, 2005
1
5
+1.5V +V1.5_DPLLA
L66
L66
10uH_8
10uH_8
1 2
+
C780
+
C780
C397
C397
.1U-10V_4
C334
C334
+
+
C490
C490
22U-6.3V_8
22U-6.3V_8
C491
C491
22U-6.3V_8
22U-6.3V_8
.1U-10V_4
+V1.5_DPLLB
C337
C337
.1U-10V_4
.1U-10V_4
+V1.5_HPLL
C486
C486
.1U-10V_4
.1U-10V_4
+V1.5_MPLL
C483
C483
A1A:Change to 22UF
.1U-10V_4
.1U-10V_4
A1A:Change to 470UF
A1A:Change to 470UF
A1A:Change to 22UF
470U-2.5V_7343
470U-2.5V_7343
L32
L32
10uH_8
L40
L40
L41
L41
10uH_8
1 2
470U-2.5V_7343
470U-2.5V_7343
BK1608LL121_6
BK1608LL121_6
BK1608LL121_6
BK1608LL121_6
D D
C C
When the LVDS interface is
not implemented, the
VCCTX_LVDS, VCCD_LVDS, and
VCCA_LVDS signals of the
interface can be connected
to ground
B1B:Change L30 to CVA9115MN10(91NH+-20% 1.5A),footprint L32x25-22
+V1.5_PCIE
91nH_L32x25-22
91nH_20%_1.3A
C308
C308
C307
C307
10U/X5R-6.3V_8
10U/X5R-6.3V_8
10U/X5R-6.3V_8
10U/X5R-6.3V_8
R552
R552
0.5/F_6
0.5/F_6
B B
+1.5V_AUX +1.5V
R282 0_8 R282 0_8
C462
C462
.1U-10V_4
.1U-10V_4
91nH_L32x25-22
+
+
C314
C314
220U-6.3V_7343
220U-6.3V_7343
L65
L65
1uH_6
1uH_6
B1B:Remove R282 for +1.5V_AUX
30mils
V1_5SFOLLOW
R284
+V3.3_TVDAC
A A
R284
*10_4
*10_4
R283 *0_8 R283 *0_8
60mils
L30
L30
PCIE_L
60mils 60mils
3GPLL_FB_L 3GPLL_FB_R
D7 *PDZ5.6B D7 *PDZ5.6B
2 1
+1.5V
R200
R200
0_8
0_8
+3V
R553
R553
0_8
0_8
+1.5V
+1.5V +V1.5_3GPLL
C1C:Remove +V3.3_TVDAC
+1.05V
+1.5V
+V1.5_PCIE
+2.5V
+3V
+1.05V 2,3,4,6,8,9,14,17,44
+1.5V 4,8,15,17,29,33,42,43
+V1.5_PCIE 8
+2.5V 8,19,20,42,43
+3V 2,5,8,13,14,15,16,17,18,19,20,24,25,26,27,29,30,31,32,33,34,35,36,37,38,39,40,41,42,44
5
4
A1A:Change to
ground(LVDS disable)
+V1.5_3GPLL
C367
C367
C758
C758
.1U-10V_4
.1U-10V_4
10U/X5R-6.3V_8
+1.05V
R739 0_6 R739 0_6
B1B:CRT disable
+1.5V
80mils
R772 0_6 R772 0_6
C1C:TV disable
+3V +1.5V
C417
C415
C415
10U/X5R-6.3V_8
10U/X5R-6.3V_8
+V1.5_TVDAC +1.5V
C417
.1U-10V_4
.1U-10V_4
C1C:TV disable
C430
C445
C445
.022U-16V_4
.022U-16V_4
+V1.5_QTVDAC
C439
C439
.022U-16V_4
.022U-16V_4
4
C430
.1U-10V_4
.1U-10V_4
C444
C444
.1U-10V_4
.1U-10V_4
10U/X5R-6.3V_8
C436
C436
C440
C440
.022U-16V_4
.022U-16V_4
.1U-10V_4
.1U-10V_4
A1A:Change to
ground(LVDS disable)
+V3.3_ATVBG
C434
C434
C790
C790
.1U-10V_4
.1U-10V_4
.022U-16V_4
.022U-16V_4
A1A:Change to
ground(LVDS disable)
C485
C485
.1U-10V_4
.1U-10V_4
C489
C489
10U/X5R-6.3V_8
10U/X5R-6.3V_8
60mils
+2.5V
+V1.5_HPLL
+V1.5_TVDAC
+V1.5_QTVDAC
+1.5V_AUX
R241
R241
3
+2.5V
C356
C356
C379
C379
10U/X5R-6.3V_8
10U/X5R-6.3V_8
.1U-10V_4
.1U-10V_4
+V1.5_PCIE
C411
C411
.1U-10V_4
.1U-10V_4
+V1.5_DPLLB
R740 0_6 R740 0_6
+1.5V
B1B:TV disable
+1.5V
+3V
1900mA
0_8
0_8
3
1500mA
+V1.5_DPLLA
+V1.5_MPLL
H22
C30
B30
A30
AJ41
AB41
Y41
V41
R41
N41
L41
AC33
G41
H41
F21
E21
G21
B26
C39
AF1
A38
B39
AF2
H20
G20
E19
F19
C20
D20
E20
F20
AH1
AH2
A28
B28
C28
D21
A23
B23
B25
H19
AK31
AF31
AE31
AC31
AL30
AK30
AJ30
AH30
AG30
AF30
AE30
AD30
AC30
AG29
AF29
AE29
AD29
AC29
AG28
AF28
AE28
AH22
AJ21
AH21
AJ20
AH20
AH19
P19
P16
AH15
P15
AH14
AG14
AF14
AE14
Y14
AF13
AE13
AF12
AE12
AD12
U44H
U44H
VCCSYNC
VCC_TXLVDS0
VCC_TXLVDS1
VCC_TXLVDS2
VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
VCCA_3GPLL
VCCA_3GBG
VSSA_3GBG
VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_LVDS
VSSA_LVDS
VCCA_MPLL
VCCA_TVBG
VSSA_TVBG
VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1
VCCD_HMPLL0
VCCD_HMPLL1
VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2
VCCD_TVDAC
VCC_HV0
VCC_HV1
VCC_HV2
VCCD_QTVDAC
VCCAUX0
VCCAUX1
VCCAUX2
VCCAUX3
VCCAUX4
VCCAUX5
VCCAUX6
VCCAUX7
VCCAUX8
VCCAUX9
VCCAUX10
VCCAUX11
VCCAUX12
VCCAUX13
VCCAUX14
VCCAUX15
VCCAUX16
VCCAUX17
VCCAUX18
VCCAUX19
VCCAUX20
VCCAUX21
VCCAUX22
VCCAUX23
VCCAUX24
VCCAUX25
VCCAUX26
VCCAUX27
VCCAUX28
VCCAUX29
VCCAUX30
VCCAUX31
VCCAUX32
VCCAUX33
VCCAUX34
VCCAUX35
VCCAUX36
VCCAUX37
VCCAUX38
VCCAUX39
VCCAUX40
POWER
POWER
Calistoga(945PM)
Calistoga(945PM)
2
2
VTT_0
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
VTT_26
VTT_27
VTT_28
VTT_29
VTT_30
VTT_31
VTT_32
VTT_33
VTT_34
VTT_35
VTT_36
VTT_37
VTT_38
VTT_39
VTT_40
VTT_41
VTT_42
VTT_43
VTT_44
VTT_45
VTT_46
VTT_47
VTT_48
VTT_49
VTT_50
VTT_51
VTT_52
VTT_53
VTT_54
VTT_55
VTT_56
VTT_57
VTT_58
VTT_59
VTT_60
VTT_61
VTT_62
VTT_63
VTT_64
VTT_65
VTT_66
VTT_67
VTT_68
VTT_69
VTT_70
VTT_71
VTT_72
VTT_73
VTT_74
VTT_75
VTT_76
1
+1.05V
800mA
AC14
AB14
W14
V14
T14
R14
P14
N14
M14
L14
AD13
AC13
AB13
AA13
Y13
W13
V13
U13
T13
R13
N13
M13
L13
AB12
AA12
Y12
W12
V12
U12
T12
R12
P12
N12
M12
L12
R11
P11
N11
M11
R10
P10
N10
M10
P9
N9
M9
R8
P8
N8
M8
P7
N7
M7
R6
P6
M6
A6
R5
P5
N5
M5
P4
N4
M4
R3
P3
N3
M3
R2
P2
M2
D2
AB1
R1
P1
N1
M1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
+
C795
+
C795
330U-2.5V_7343
330U-2.5V_7343
GMCH POWER (5 OF 6)
GMCH POWER (5 OF 6)
GMCH POWER (5 OF 6)
4.7U-10V_8
4.7U-10V_8
C470
C470
.22U-6.3V_4
.22U-6.3V_4
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
C404
C404
2.2U-6.3V_6
2.2U-6.3V_6
.22U-6.3V_4
.22U-6.3V_4
C435
C435
.1U-10V_4
.1U-10V_4
C391
C391
.1U-10V_4
.1U-10V_4
.47U-10V_6
.47U-10V_6
C382
C382
4.7U-10V_8
4.7U-10V_8
1
+2.5V
C455
C455
C374
C374
.47U-10V_6
.47U-10V_6
C357
C357
10 46 Friday, December 02, 2005
10 46 Friday, December 02, 2005
10 46 Friday, December 02, 2005
+1.05V
C365
C365
10U/X5R-6.3V_8
10U/X5R-6.3V_8
+1.05V
C414
C414
of
of
of
1A
1A
1A
5
U44I
U44I
AC41
VSS_0
AA41
VSS_1
W41
VSS_2
T41
VSS_3
P41
VSS_4
M41
VSS_5
J41
VSS_6
F41
VSS_7
AV40
VSS_8
D D
C C
B B
A A
5
AP40
AN40
AK40
AJ40
AH40
AG40
AF40
AE40
B40
AY39
AW39
AV39
AR39
AN39
AJ39
AC39
AB39
AA39
Y39
W39
V39
T39
R39
P39
N39
M39
L39
J39
H39
G39
F39
D39
AT38
AM38
AH38
AG38
AF38
AE38
C38
AK37
AH37
AB37
AA37
Y37
W37
V37
T37
R37
P37
N37
M37
L37
J37
H37
G37
F37
D37
AY36
AW36
AN36
AH36
AG36
AF36
AE36
AC36
C36
B36
BA35
AV35
AR35
AH35
AB35
AA35
Y35
W35
V35
T35
R35
P35
N35
M35
L35
J35
H35
G35
F35
D35
AN34
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
Calistoga(945PM)
Calistoga(945PM)
VSS
VSS
4
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
4
AK34
AG34
AF34
AE34
AC34
C34
AW33
AV33
AR33
AE33
AB33
Y33
V33
T33
R33
M33
H33
G33
F33
D33
B33
AH32
AG32
AF32
AE32
AC32
AB32
G32
B32
AY31
AV31
AN31
AJ31
AG31
AB31
Y31
AB30
E30
AT29
AN29
AB29
T29
N29
K29
G29
E29
C29
B29
A29
BA28
AW28
AU28
AP28
AM28
AD28
AC28
W28
J28
E28
AP27
AM27
AK27
J27
G27
F27
C27
B27
AN26
M26
K26
F26
D26
AK25
P25
K25
H25
E25
D25
A25
BA24
AU24
AL24
AW23
3
U44J
U44J
AT23
VSS_180
AN23
VSS_181
AM23
VSS_182
AH23
VSS_183
AC23
VSS_184
W23
VSS_185
K23
VSS_186
J23
VSS_187
F23
VSS_188
C23
VSS_189
AA22
VSS_190
K22
VSS_191
G22
VSS_192
F22
VSS_193
E22
VSS_194
D22
VSS_195
A22
VSS_196
BA21
VSS_197
AV21
VSS_198
AR21
VSS_199
AN21
VSS_200
AL21
VSS_201
AB21
VSS_202
Y21
VSS_203
P21
VSS_204
K21
VSS_205
J21
VSS_206
H21
VSS_207
C21
VSS_208
AW20
VSS_209
AR20
VSS_210
AM20
VSS_211
AA20
VSS_212
K20
VSS_213
B20
VSS_214
A20
VSS_215
AN19
VSS_216
AC19
VSS_217
W19
VSS_218
K19
VSS_219
G19
VSS_220
C19
VSS_221
AH18
VSS_222
P18
VSS_223
H18
VSS_224
D18
VSS_225
A18
VSS_226
AY17
VSS_227
AR17
VSS_228
AP17
VSS_229
AM17
VSS_230
AK17
VSS_231
AV16
VSS_232
AN16
VSS_233
AL16
VSS_234
J16
VSS_235
F16
VSS_236
C16
VSS_237
AN15
VSS_238
AM15
VSS_239
AK15
VSS_240
N15
VSS_241
M15
VSS_242
L15
VSS_243
B15
VSS_244
A15
VSS_245
BA14
VSS_246
AT14
VSS_247
AK14
VSS_248
AD14
VSS_249
AA14
VSS_250
U14
VSS_251
K14
VSS_252
H14
VSS_253
E14
VSS_254
AV13
VSS_255
AR13
VSS_256
AN13
VSS_257
AM13
VSS_258
AL13
VSS_259
AG13
VSS_260
P13
VSS_261
F13
VSS_262
D13
VSS_263
B13
VSS_264
AY12
VSS_265
AC12
VSS_266
K12
VSS_267
H12
VSS_268
E12
VSS_269
AD11
VSS_270
AA11
VSS_271
Y11
VSS_272
3
VSS
VSS
Calistoga(945PM)
Calistoga(945PM)
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
VSS_359
VSS_360
J11
D11
B11
AV10
AP10
AL10
AJ10
AG10
AC10
W10
U10
BA9
AW9
AR9
AH9
AB9
Y9
R9
G9
E9
A9
AG8
AD8
AA8
U8
K8
C8
BA7
AV7
AP7
AL7
AJ7
AH7
AF7
AC7
R7
G7
D7
AG6
AD6
AB6
Y6
U6
N6
K6
H6
B6
AV5
AF5
AD5
AY4
AR4
AP4
AL4
AJ4
Y4
U4
R4
J4
F4
C4
AY3
AW3
AV3
AL3
AH3
AG3
AF3
AD3
AC3
AA3
G3
AT2
AR2
AP2
AK2
AJ2
AD2
AB2
Y2
U2
T2
N2
J2
H2
F2
C2
AL1
2
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
GMCH GND(6 OF 6)
GMCH GND(6 OF 6)
GMCH GND(6 OF 6)
Date: Sheet
Date: Sheet
2
Date: Sheet
1
1A
1A
of
of
of
11 46 Friday, December 02, 2005
11 46 Friday, December 02, 2005
11 46 Friday, December 02, 2005
1
1A
1
2
3
4
5
6
7
8
DDRII DUAL CHANNEL A,B.
A A
DDRII A CHANNEL DDRII B CHANNEL
SMDDR_VTERM
C343
.1U-10V_4
.1U-10V_4
C446
.1U-10V_4
.1U-10V_4
SMDDR_VTERM
C344
C346
C346
.1U-10V_4
.1U-10V_4
.1U-10V_4
.1U-10V_4
M_A_A[13..0]
SMDDR_VTERM
C387
C387
C429
.1U-10V_4
.1U-10V_4
.1U-10V_4
.1U-10V_4
C418
C418
.1U-10V_4
.1U-10V_4
M_A_A[13..0] 7,13
SMDDR_VTERM 42,43
C393
C393
C403
C403
.1U-10V_4
.1U-10V_4
.1U-10V_4
.1U-10V_4
C348
.1U-10V_4
.1U-10V_4
C354
C354
.1U-10V_4
.1U-10V_4
C441
C441
.1U-10V_4
.1U-10V_4
C431
C431
.1U-10V_4
.1U-10V_4
SMDDR_VTERM
C317
C317
.1U-10V_4
.1U-10V_4
C457
C457
.1U-10V_4
.1U-10V_4 C344
C347
C347
.1U-10V_4
.1U-10V_4 C343
C437
C437
.1U-10V_4
.1U-10V_4
C413
C413
.1U-10V_4
.1U-10V_4 C429
C381
C381
.1U-10V_4
.1U-10V_4
C315
C315
.1U-10V_4
.1U-10V_4 C348
C447
C447
.1U-10V_4
.1U-10V_4
C342
C342
.1U-10V_4
.1U-10V_4
C438
C438
.1U-10V_4
.1U-10V_4
C454
C454
.1U-10V_4
.1U-10V_4
C452
C452
.1U-10V_4
.1U-10V_4 C446
C316
C316
.1U-10V_4
.1U-10V_4
Layout note: Place one cap close to every 2 pullup resistors terminated to SMDDR_VTERM
B B
M_ODT0 8,13
M_CKE1 8,13
M_A_BS#0 7,13
M_A_BS#1 7,13
C C
M_A_WE# 7,13
M_A_CAS# 7,13
A1A:Swap net A1A:Swap net
M_A_A13
M_ODT0
M_A_A8
M_A_A5
M_A_A3
M_A_A1
M_CKE1
M_A_A6
M_A_A10
M_A_BS#0
M_A_A7
M_A_A11
M_A_A4
M_A_A0
M_A_BS#1
M_A_A2
M_A_A12
M_A_A9
M_A_WE#
M_A_CAS#
RP33 56_4P2R_S RP33 56_4P2R_S
1
3
RP19 56_4P2R_S RP19 56_4P2R_S
1
3
RP25 56_4P2R_S RP25 56_4P2R_S
1
3
RP11 56_4P2R_S RP11 56_4P2R_S
1
3
RP26 56_4P2R_S RP26 56_4P2R_S
1
3
RP17 56_4P2R_S RP17 56_4P2R_S
1
3
RP21 56_4P2R_S RP21 56_4P2R_S
1
3
RP24 56_4P2R_S RP24 56_4P2R_S
1
3
RP15 56_4P2R_S RP15 56_4P2R_S
1
3
RP29 56_4P2R_S RP29 56_4P2R_S
1
3
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
SMDDR_VTERM
SMDDR_VTERM
SMDDR_VTERM
M_B_BS#1 7,13
M_CKE2 8,13
M_B_BS#2 7,13
M_CS#2 8,13
M_B_RAS# 7,13
M_B_WE# 7,13
M_B_CAS# 7,13
M_B_BS#0 7,13
M_B_BS#1
M_B_A2
M_B_A1
M_B_A3
M_B_A9
M_B_A5
M_B_A0
M_B_A4
M_B_A12
M_B_A8
M_B_A7
M_B_A6
M_CKE2
M_B_BS#2
M_CS#2
M_B_RAS#
M_B_WE#
M_B_CAS#
M_B_A10
M_B_BS#0
A1A:Swap net
M_CS#0 8,13
M_B_A[13..0]
+1.8VSUS
+3V
M_B_A[13..0] 7,13
+1.8VSUS 8,9,13,20,42,43
+3V 2,5,8,10,13,14,15,16,17,18,19,20,24,25,26,27,29,30,31,32,33,34,35,36,37,38,39,40,41,42,44
M_A_RAS# 7,13
M_ODT2 8,13
M_ODT3 8,13
M_CS#3 8,13
M_CS#1 8,13
M_ODT1 8,13
M_CKE3 8,13
M_CKE0 8,13
M_A_BS#2 7,13
RP23 56_4P2R_S RP23 56_4P2R_S
1
3
RP22 56_4P2R_S RP22 56_4P2R_S
1
3
RP18 56_4P2R_S RP18 56_4P2R_S
1
3
RP20 56_4P2R_S RP20 56_4P2R_S
1
3
RP14 56_4P2R_S RP14 56_4P2R_S
1
3
RP16 56_4P2R_S RP16 56_4P2R_S
1
3
RP12 56_4P2R_S RP12 56_4P2R_S
1
3
RP27 56_4P2R_S RP27 56_4P2R_S
1
3
RP32 56_4P2R_S RP32 56_4P2R_S
1
3
RP28 56_4P2R_S RP28 56_4P2R_S
1
3
M_CS#0
M_A_RAS#
M_B_A13
M_ODT2
M_ODT3
M_CS#3
M_CS#1
M_ODT1
M_CKE3
M_B_A11
M_CKE0
M_A_BS#2
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
RP30 56_4P2R_S RP30 56_4P2R_S
1
3
RP31 56_4P2R_S RP31 56_4P2R_S
1
3
RP35 56_4P2R_S RP35 56_4P2R_S
1
3
RP34 56_4P2R_S RP34 56_4P2R_S
1
3
RP10 56_4P2R_S RP10 56_4P2R_S
1
3
RP13 56_4P2R_S RP13 56_4P2R_S
1
3
SMDDR_VTERM
SMDDR_VTERM
SMDDR_VTERM
2
4
2
4
2
4
2
4
2
4
2
4
SMDDR_VTERM
D D
1
2
3
4
5
6
PROJECT : ZC1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDR RES. ARRAY
DDR RES. ARRAY
DDR RES. ARRAY
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
7
of
of
of
12 46 Monday, November 28, 2005
12 46 Monday, November 28, 2005
12 46 Monday, November 28, 2005
8
1A
1A
1A
1
+3V
+1.8VSUS SMDDR_VREF_DIMM
A A
B B
C C
D D
+3V 2,5,8,10,14,15,16,17,18,19,20,24,25,26,27,29,30,31,32,33,34,35,36,37,38,39,40,41,42,44
+1.8VSUS 8,9,20,42,43
M_CKE0 8,12
M_A_BS#2 7,12
M_A_BS#0 7,12
M_A_WE# 7,12
M_A_CAS# 7,12
M_CS#1 8,12
M_ODT1 8,12
+3V
M_A_DQ1
M_A_DQ5
M_A_DQS#0
M_A_DQS0
M_A_DQ2
M_A_DQ3
M_A_DQ14
M_A_DQ8 M_A_DM1
M_A_DQS#1
M_A_DQS1
M_A_DQ9
M_A_DQ15
M_A_DQ21
M_A_DQ17
M_A_DQS#2
M_A_DQS2
M_A_DQ23
M_A_DQ19
M_A_DQ24
M_A_DQ25
M_A_DM3
M_A_DQ30
M_A_DQ31
M_CKE0
M_A_BS#2
M_A_A12
M_A_A9
M_A_A8
M_A_A5
M_A_A3
M_A_A1
M_A_A10
M_A_WE#
M_A_CAS#
M_CS#1
M_ODT1
M_A_DQ37
M_A_DQS#4
M_A_DQS4
M_A_DQ38
M_A_DQ39
M_A_DQ41
M_A_DQ40
M_A_DM5
M_A_DQ42
M_A_DQ43
M_A_DQ53
M_A_DQ52
M_A_DQS#6
M_A_DQS6
M_A_DQ51
M_A_DQ61
M_A_DQ57
M_A_DM7
M_A_DQ63
CGDAT_SMB
CGCLK_SMB
SMDDR_VREF_DIMM
+1.8VSUS
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
1
3
5
7
9
CLOCK 0,1 CLOCK 3,4
1
2
A1A:Swap net
CN31
CN31
VREF
VSS47
DQ0
DQ1
VSS37
DQS#0
DQS0
VSS48
DQ2
DQ3
VSS38
DQ8
DQ9
VSS49
DQS#1
DQS1
VSS39
DQ10
DQ11
VSS50
VSS18
DQ16
DQ17
VSS1
DQS#2
DQS2
VSS19
DQ18
DQ19
VSS22
DQ24
DQ25
VSS23
DM3
NC4
VSS9
DQ26
DQ27
VSS4
CKE0
VDD7
NC1
A16_BA2
VDD9
A12
A9
A8
VDD5
A5
A3
A1
VDD10
A10/AP
BA0
WE#
VDD2
CAS#
S1#
VDD3
ODT1
VSS11
DQ32
DQ33
VSS26
DQS#4
DQS4
VSS2
DQ34
DQ35
VSS27
DQ40
DQ41
VSS29
DM5
VSS51
DQ42
DQ43
VSS40
DQ48
DQ49
VSS52
NCTEST
VSS30
DQS#6
DQS6
VSS31
DQ50
DQ51
VSS33
DQ56
DQ57
VSS3
DM7
VSS34
DQ58
DQ59
VSS14
SDA
SCL
VDD(SPD)
DDR2_SODIMM(1-1734074-1)
DDR2_SODIMM(1-1734074-1)
VSS46
DQ4
DQ5
VSS15
DM0
VSS5
DQ6
DQ7
VSS16
DQ12
DQ13
VSS17
DM1
VSS53
CK0
CK0#
VSS41
DQ14
DQ15
VSS54
VSS20
DQ20
DQ21
VSS6
NC3
DM2
VSS21
DQ22
DQ23
VSS24
DQ28
DQ29
VSS25
DQS#3
DQS3
VSS10
DQ30
DQ31
VSS8
CKE1
PC4800 DDR2 SDRAM
SO-DIMM (200P)
PC4800 DDR2 SDRAM
SO-DIMM (200P)
VDD8
A15
A14
VDD11
A11
A7
A6
VDD4
A4
A2
A0
VDD12
BA1
RAS#
S0#
VDD1
ODT0
A13
VDD6
NC2
VSS12
DQ36
DQ37
VSS28
DM4
VSS42
DQ38
DQ39
VSS55
DQ44
DQ45
VSS43
DQS#5
DQS5
VSS56
DQ46
DQ47
VSS44
DQ52
DQ53
VSS57
CK1
CK1#
VSS45
DM6
VSS32
DQ54
DQ55
VSS35
DQ60
DQ61
VSS7
DQS#7
DQS7
VSS36
DQ62
DQ63
VSS13
SA0
SA1
H 5.2 H 9.2
2
3
+1.8VSUS +1.8VSUS +1.8VSUS
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
A1A:Change DDRII footprint to same as CT6
M_A_DQ4
M_A_DQ0
M_A_DM0
M_A_DQ7
M_A_DQ6
M_A_DQ13
M_A_DQ12
M_CLK_DDR0
M_CLK_DDR#0
M_A_DQ11
M_A_DQ10
M_A_DQ20
M_A_DQ16
PM_EXTTS#0
M_A_DM2
M_A_DQ18
M_A_DQ22
M_A_DQ28
M_A_DQ29
M_A_DQS#3
M_A_DQS3
M_A_DQ27
M_A_DQ26
M_CKE1
M_A_A11
M_A_A7
M_A_A6
M_A_A4
M_A_A2
M_A_A0
M_A_BS#1
M_A_RAS#
M_CS#0
M_ODT0
M_A_A13
M_A_DQ36
M_A_DQ32 M_A_DQ35
M_A_DM4
M_A_DQ33
M_A_DQ34
M_A_DQ45
M_A_DQ44
M_A_DQS#5
M_A_DQS5
M_A_DQ46
M_A_DQ47
M_A_DQ49
M_A_DQ48
M_CLK_DDR1 M_CLK_DDR#2
M_CLK_DDR#1
M_A_DM6
M_A_DQ55
M_A_DQ54 M_A_DQ50
M_A_DQ56
M_A_DQ60
M_A_DQS#7
M_A_DQS7
M_A_DQ58 M_A_DQ59
M_A_DQ62
R285 10K_4 R285 10K_4
R287 10K_4 R287 10K_4
M_A_DM[0..7] 7
M_A_DQS[0..7] 7
M_A_DQS#[0..7] 7
M_A_A[0..13] 7,12
M_CLK_DDR0 8
M_CLK_DDR#0 8
PM_EXTTS#0 8
M_CKE1 8,12
M_A_BS#1 7,12
M_A_RAS# 7,12
M_CS#0 8,12
M_ODT0 8,12
M_CLK_DDR1 8 M_CLK_DDR#2 8
M_CLK_DDR#1 8
CGDAT_SMB 2
CGCLK_SMB 2
2nd source:DGMK00000C0 2nd source:DGMK0002610
3
4
SMDDR_VREF_DIMM
5
A1A:Swap net
CN30
CN30
1
VREF
3
M_B_DQ1
M_B_DQ5
M_B_DQS#0
M_B_DQS0
M_B_DQ2
M_B_DQ3
M_B_DQ8
M_B_DQ9 M_B_DM1
M_B_DQS#1
M_B_DQS1
M_B_DQ11
M_B_DQ10
M_B_DQ17
M_B_DQ20
M_B_DQS#2
M_B_DQS2
M_B_DQ19
M_B_DQ23
M_B_DQ28
M_B_DQ29
M_B_DM3
M_B_DQ30
M_B_DQ31
+3V
M_CKE2
M_B_BS#2
M_B_A12
M_B_A9
M_B_A8
M_B_A5
M_B_A3
M_B_A1
M_B_A10
M_B_BS#0
M_B_WE#
M_B_CAS#
M_CS#3
M_ODT3
M_B_DQ37
M_B_DQ36
M_B_DQS#4
M_B_DQS4
M_B_DQ39
M_B_DQ35
M_B_DQ41
M_B_DQ40
M_B_DM5
M_B_DQ47
M_B_DQ42
M_B_DQS#6
M_B_DQS6
M_B_DQ55
M_B_DQ61
M_B_DQ57
M_B_DM7
M_B_DQ63
M_B_DQ58
CGDAT_SMB
CGCLK_SMB
M_CKE2 8,12 M_CKE3 8,12
M_B_BS#2 7,12
M_B_BS#0 7,12
M_B_WE# 7,12
M_B_CAS# 7,12
M_CS#3 8,12
M_ODT3 8,12
VSS47
5
DQ0
7
DQ1
9
VSS37
11
DQS#0
13
DQS0
15
VSS48
17
DQ2
19
DQ3
21
VSS38
23
DQ8
25
DQ9
27
VSS49
29
DQS#1
31
DQS1
33
VSS39
35
DQ10
37
DQ11
39
VSS50
41
VSS18
43
DQ16
45
DQ17
47
VSS1
49
DQS#2
51
DQS2
53
VSS19
55
DQ18
57
DQ19
59
VSS22
61
DQ24
63
DQ25
65
VSS23
67
DM3
69
NC4
71
VSS9
73
DQ26
75
DQ27
77
VSS4
79
CKE0
81
VDD7
83
NC1
85
A16_BA2
87
VDD9
89
A12
91
A9
93
A8
95
VDD5
97
A5
99
A3
101
A1
103
VDD10
105
A10/AP
107
BA0
109
WE#
111
VDD2
113
CAS#
115
S1#
117
VDD3
119
ODT1
121
VSS11
123
DQ32
125
DQ33
127
VSS26
129
DQS#4
131
DQS4
133
VSS2
135
DQ34
137
DQ35
139
VSS27
141
DQ40
143
DQ41
145
VSS29
147
DM5
149
VSS51
151
DQ42
153
DQ43
155
VSS40
157
DQ48
159
DQ49
161
VSS52
163
NCTEST
165
VSS30
167
DQS#6
169
DQS6
171
VSS31
173
DQ50
175
DQ51
177
VSS33
179
DQ56
181
DQ57
183
VSS3
185
DM7
187
VSS34
189
DQ58
191
DQ59
193
VSS14
195
SDA
197
SCL
199
VDD(SPD)
DDR2_SODIMM(2-1734073-2)
DDR2_SODIMM(2-1734073-2)
CKE 2,3 CKE 0,1
4
5
VSS46
DQ4
DQ5
VSS15
DM0
VSS5
DQ6
DQ7
VSS16
DQ12
DQ13
VSS17
DM1
VSS53
CK0
CK0#
VSS41
DQ14
DQ15
VSS54
VSS20
DQ20
DQ21
VSS6
NC3
DM2
VSS21
DQ22
DQ23
VSS24
DQ28
DQ29
VSS25
DQS#3
DQS3
VSS10
DQ30
DQ31
VSS8
CKE1
VDD8
A15
A14
VDD11
PC4800 DDR2 SDRAM
SO-DIMM (200P)
PC4800 DDR2 SDRAM
SO-DIMM (200P)
A11
A7
A6
VDD4
A4
A2
A0
VDD12
BA1
RAS#
S0#
VDD1
ODT0
A13
VDD6
NC2
VSS12
DQ36
DQ37
VSS28
DM4
VSS42
DQ38
DQ39
VSS55
DQ44
DQ45
VSS43
DQS#5
DQS5
VSS56
DQ46
DQ47
VSS44
DQ52
DQ53
VSS57
CK1
CK1#
VSS45
DM6
VSS32
DQ54
DQ55
VSS35
DQ60
DQ61
VSS7
DQS#7
DQS7
VSS36
DQ62
DQ63
VSS13
SA0
SA1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
M_B_DQ4
M_B_DQ0
M_B_DM0
M_B_DQ7
M_B_DQ6
M_B_DQ12
M_B_DQ13
M_CLK_DDR3
M_CLK_DDR#3
M_B_DQ15
M_B_DQ14
A1A:Change SODIMM1 pin 50 from PM_EXTTS#1
to PM_EXTTS#0(Intel recommend)
M_B_DQ16
M_B_DQ21
PM_EXTTS#0
M_B_DM2
M_B_DQ18
M_B_DQ22
M_B_DQ24
M_B_DQ25
M_B_DQS#3
M_B_DQS3
M_B_DQ26
M_B_DQ27
M_CKE3
M_B_A11
M_B_A7
M_B_A6
M_B_A4
M_B_A2
M_B_A0
M_B_BS#1
M_B_RAS#
M_CS#2
M_ODT2
M_B_A13
M_B_DQ32
M_B_DQ33
M_B_DM4
M_B_DQ34
M_B_DQ38
M_B_DQ44
M_B_DQ45
M_B_DQS#5
M_B_DQS5
M_B_DQ46
M_B_DQ43
M_B_DQ52 M_B_DQ53
M_B_DQ48 M_B_DQ49
M_CLK_DDR2
M_B_DM6
M_B_DQ54 M_B_DQ50
M_B_DQ51
M_B_DQ60
M_B_DQ56
M_B_DQS#7
M_B_DQS7
M_B_DQ59
M_B_DQ62
R286 10K_4 R286 10K_4
R288 10K_4 R288 10K_4
+3V
SMbus address A4 SMbus address A0
6
M_CLK_DDR3 8
M_CLK_DDR#3 8
M_B_BS#1 7,12
M_B_RAS# 7,12
M_CS#2 8,12
M_ODT2 8,12
M_CLK_DDR2 8
6
M_B_DM[0..7] 7 M_A_DQ[0..63] 7
M_B_DQ[0..63] 7
M_B_DQS[0..7] 7
M_B_DQS#[0..7] 7
M_B_A[0..13] 7,12
PM_EXTTS#0 8
R162
R162
7
+1.8VSUS
Place these Caps near So-Dimm1.
C451
C352
C352
2.2U-6.3V_6
2.2U-6.3V_6
C424
C424
.1U-10V_4
.1U-10V_4
C250
C250
2.2U-6.3V_6
2.2U-6.3V_6
C451
2.2U-6.3V_6
2.2U-6.3V_6
C358
C358
.1U-10V_4
.1U-10V_4
+3V
C355
C355
2.2U-6.3V_6
2.2U-6.3V_6
+1.8VSUS
Place these Caps near So-Dimm1.
C396
C396
.1U-10V_4
.1U-10V_4
SMDDR_VREF_DIMM
C267
C267
.1U-10V_4
.1U-10V_4
C425
C425
C405
C405
2.2U-6.3V_6
2.2U-6.3V_6
C395
C395
.1U-10V_4
.1U-10V_4
C493
C493
2.2U-6.3V_6
2.2U-6.3V_6
8
2.2U-6.3V_6
2.2U-6.3V_6
C495
C495
.1U-10V_4
.1U-10V_4
Place these Caps near So-Dimm1.
No Vias Between the Trace of PIN to
CAP.
+1.8VSUS
Place these Caps near So-Dimm2.
C353
C353
C351
C351
C426
C426
C345
C345
C366
C366
2.2U-6.3V_6
2.2U-6.3V_6
2.2U-6.3V_6
+1.8VSUS
SMDDR_VREF_DIMM
2.2U-6.3V_6
2.2U-6.3V_6
2.2U-6.3V_6
2.2U-6.3V_6
2.2U-6.3V_6
2.2U-6.3V_6
C407
C407
.1U-10V_4
.1U-10V_4
C272
C272
2.2U-6.3V_6
2.2U-6.3V_6
2.2U-6.3V_6
C383
C383
.1U-10V_4
.1U-10V_4
+3V
C492
C492
2.2U-6.3V_6
2.2U-6.3V_6
C394
C394
.1U-10V_4
.1U-10V_4
C494
C494
.1U-10V_4
.1U-10V_4
Place these Caps near So-Dimm1.
C384
C384
.1U-10V_4
.1U-10V_4
C264
C264
.1U-10V_4
.1U-10V_4
Place these Caps near So-Dimm2.
No Vias Between the Trace of PIN to
CAP.
SMDDR_VREF
SMDDR_VREF_DIMM
*10K/F_4
*10K/F_4
R160 *10K/F_4 R160 *10K/F_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDRII SO-DIMM(200P)
DDRII SO-DIMM(200P)
DDRII SO-DIMM(200P)
Date: Sheet
Date: Sheet
Date: Sheet
7
R170 0_4 R170 0_4
+1.8VSUS
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
SMDDR_VREF 8,43
13 46 Wednesday, November 30, 2005
13 46 Wednesday, November 30, 2005
13 46 Wednesday, November 30, 2005
8
1A
1A
1A
of
of
of
5
CH500H-40
CH500H-40
D10
D10
CH500H-40
CH500H-40
CN32
CN32
1
2
R333
R333
CKL:1n ~ 20nF
R309
R309
8.2K_4
8.2K_4
INTVRMEN
1
0
5
VCCRTC
R321
R321
1M/F_4
1M/F_4
R314
R314
4.7K_4
4.7K_4
VCCRTC
R340
R340
VCCRTC_4
VCCRTC_2 VCCRTC_1
1K_4
1K_4
SATA_RXN0 34
SATA_RXP0 34
SATA_TXN0 34
SATA_TXP0 34
SATA_RXN2 35
SATA_RXP2 35
SATA_TXN2 35
SATA_TXP2 35
VCCRTC
C533
C533
1U-16V_6
1U-16V_6
20K_4
20K_4
CLK_PCIE_SATA# 2
CLK_PCIE_SATA 2
PIORDY
IRQ14
R334
R334
332K/F_6
332K/F_6
ICH_INTVRMEN
R332
R332
*0_4
*0_4
C543
C543
1U-16V_6
1U-16V_6
Q21
Q21
MMBT3904
MMBT3904
2
SATA_LED# 40
C507 3900P_4 C507 3900P_4
C506 3900P_4 C506 3900P_4
C502 3900P_4 C502 3900P_4
C503 3900P_4 C503 3900P_4
C505 3900P_4 C505 3900P_4
C504 3900P_4 C504 3900P_4
C500 3900P_4 C500 3900P_4
C501 3900P_4 C501 3900P_4
25mils/15mils
Internal PU
1 3
R308 24.9/F_4 R308 24.9/F_4
Place within 500
mils of ICH7
RTC
D9
+3VPCU
D D
A1A:Change RTC
Connector footprint
+5VPCU
R341
R341
R343
R343
4.7K_4
4.7K_4
R342
R342
15K_4
15K_4
C C
B B
A A
D9
VCCRTC_3
R320
R320
1K_4
1K_4
1
2
RTC CONN
RTC CONN
20MIL 20MIL
1.2K_6
1.2K_6
+3V
ICH7 internal VR
enable strap
Enable
(default)
Disable
4
CKL:C1/C2: 18pF -> CL:12.5pF
C1/C: 10pF -> CL Value = 8.5pF
A1A:Change RTXC1/RTXC2 from 10pf to 18pf
C516
C516
18P-50V_4
18P-50V_4
Y3
Y3
32.768KHZ
32.768KHZ
C508
C508
18P-50V_4
18P-50V_4
Internal PU
ACZ_SDIN0 36
ACZ_SDIN1 36
PDIOR# 35
PDIOW# 35
PDDACK# 35
IRQ14 35
PIORDY 35
PDDREQ 35
RTCRST#
SM_INTRUDER#
ICH_INTVRMEN
T157T157
SATA_LED#
4
CLK_32KX1
R313
R313
10M_6
10M_6
2 1
CLK_32KX2
ACZ_BCLK
ACZ_SYNC
ACZ_RST#
ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2
ACZ_SDOUT
SATA_RXN0_C
SATA_RXP0_C
SATA_TXN0_C
SATA_TXP0_C
SATA_RXN2_C
SATA_RXP2_C
SATA_TXN2_C
SATA_TXP2_C
SATA_BIAS
IRQ14
PIORDY
AF18
AG2
AG6
AH10
AG10
AF15
AH15
AF16
AH16
AG16
AE15
AB1
AB2
AA3
AF3
AE3
AH2
AF7
AE7
AH6
AF1
AE1
Y5
W4
W1
Y1
Y2
W3
V3
U3
U5
V4
T5
U7
V6
V7
U1
R6
R5
T2
T3
T1
T4
U48A
U48A
RTXC1
RTCX2
RTCRST#
INTRUDER#
INTVRMEN
EE_CS
EE_SHCLK
EE_DOUT
EE_DIN
LAN_CLK
LAN_RSTSYNC
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
ACZ_BIT_CLK
ACZ_SYNC
ACZ_RST#
ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2
ACZ_SDOUT
SATALED#
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA_CLKN
SATA_CLKP
SATARBIASN
SATARBIASP
DIOR#
DIOW#
DDACK#
IDEIRQ
IORDY
DDREQ
ICH7-M DH
ICH7-M DH
LPC CPU
LPC CPU
RTC LAN
RTC LAN
AC-97/AZALIA
AC-97/AZALIA
SATA
SATA
IDE
IDE
3
LAD0
LAD1
LAD2
LAD3
LDRQ0#
LDRQ1#/GPIO23
LFRAME#
A20GATE
A20M#
CPUSLP#
TP1/DPRSTP#
TP2/DPSLP#
FERR#
GPIO49/CPUPWRGD
IGNNE#
INIT3_3V#
INIT#
INTR
RCIN#
NMI
SMI#
STPCLK#
THERMTRIP#
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15
DA0
DA1
DA2
DCS1#
DCS3#
3
AA6
AB5
AC4
Y6
AC3
AA5
AB3
AE22
AH28
AG27
AF24
AH25
AG26
AG24
AG22
AG21
AF22
AF25
AG23
AH24
AF23
AH22
AF26
AB15
AE14
AG13
AF13
AD14
AC13
AD12
AC12
AE12
AF12
AB13
AC14
AF14
AH13
AH14
AC15
AH17
AE17
AF17
AE16
AD16
LDRQ#0
LDRQ#1
GATEA20
TP_H_CPUSLP#
H_DPRSTP#_R
H_DPSLP#_R
T154T154
RCIN#
H_SMI#_R
H_THERMTRIP_R
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDA0
PDA1
PDA2
LAD0 38,39
LAD1 38,39
LAD2 38,39
LAD3 38,39
LDRQ#0 38
T72T72
LFRAME# 38,39
GATEA20 39
H_A20M# 3
R307 *0_4 R307 *0_4
R305 0_4 R305 0_4
R584 0_4 R584 0_4
R312 0_4 R312 0_4
R304 0_4 R304 0_4
2
RCIN#
+1.05V
R585
R585
*56.2/F_4
*56.2/F_4
PDD[15:0] 35
H_CPUSLP# 3,6
H_PWRGD 3
H_IGNNE# 3
H_INIT# 3
H_INTR 3
RCIN# 39
H_NMI 3
H_SMI# 3
H_STPCLK# 3
Should be 2" close ICH7
A series termination resistor is
required for the PRIMARY CODEC
ACZ_SDOUT
ACZ_SYNC
ACZ_BCLK
ACZ_BCLK
B1B:Per Intel comment,don't stuff R307 for CPUSLP#
PDA[2:0] 35
PDCS1# 35
PDCS3# 35
GATEA20
R292
R292
*56.2/F_4
*56.2/F_4
ICH_DPRSTP# 3
H_DPSLP# 3
R306 24.9/F_4 R306 24.9/F_4
R349 39_4 R349 39_4
R350 39_4 R350 39_4
R605 39_4 R605 39_4
R719 39_4 R719 39_4
B1B:Add R719 for BIT_CLK_MODEM
ACZ_RST#
2
R348 39_4 R348 39_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
ICH7-M HOST (1 OF 4)
ICH7-M HOST (1 OF 4)
ICH7-M HOST (1 OF 4)
Date: Sheet
Date: Sheet
Date: Sheet
1
+3V
+3V
R299
R299
R300
R300
10K_4
10K_4
10K_4
10K_4
+1.05V
R311
R311
56.2/F_4
56.2/F_4
H_FERR# 3
+1.05V
R293
R293
56.2/F_4
56.2/F_4
PM_THRMTRIP# 3,8
ACZ_SDOUT_AUDIO 36
C559
C559
*10P_4
*10P_4
ACZ_SYNC_AUDIO 36
C565
C565
*10P_4
*10P_4
BIT_CLK_AUDIO 36
C816
C816
*10P_4
*10P_4
BIT_CLK_MODEM 36
C957
C957
*10P_4
*10P_4
ACZ_RST#_AUDIO 36
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
of
of
of
14 46 Friday, December 02, 2005
14 46 Friday, December 02, 2005
14 46 Friday, December 02, 2005
1
1A
1A
1A
5
A1A:Change PCIE pin define to meet Acer spec
New card
GLAN
D D
MINI CARD(WLAN)
EZ4_1
EZ4_2
C C
T158T158
T75T75
T160T160
T76T76
T159T159
R355
R355
*10K_4
*10K_4
PCIE_RXN0 33
PCIE_RXP0 33
PCIE_TXN0 33
PCIE_TXP0 33
PCIE_RXN1 27
PCIE_RXP1 27
PCIE_TXN1 27
PCIE_TXP1 27
T78T78
T77T77
T163T163
T162T162
PCIE_RXN3 29
PCIE_RXP3 29
PCIE_TXN3 29
PCIE_TXP3 29
PCIE_RXN4 32
PCIE_RXP4 32
PCIE_TXN4 32
PCIE_TXP4 32
PCIE_RXN5 32
PCIE_RXP5 32
PCIE_TXN5 32
PCIE_TXP5 32
+3V
R352
R352
R616
R616
*10K_4
*10K_4
*10K_4
*10K_4
SPI_SCLK
SPI_CE#
NVM_ARB
SPI_SI
SPI_SO
4
C851 .1U-10V_4 C851 .1U-10V_4
C856 .1U-10V_4 C856 .1U-10V_4
C841 .1U-10V_4 C841 .1U-10V_4
C846 .1U-10V_4 C846 .1U-10V_4
C836 .1U-10V_4 C836 .1U-10V_4
C832 .1U-10V_4 C832 .1U-10V_4
C831 .1U-10V_4 C831 .1U-10V_4
C827 .1U-10V_4 C827 .1U-10V_4
C823 .1U-10V_4 C823 .1U-10V_4
C822 .1U-10V_4 C822 .1U-10V_4
C821 .1U-10V_4 C821 .1U-10V_4
C820 .1U-10V_4 C820 .1U-10V_4
PCIE_TXN0_C
PCIE_TXP0_C
PCIE_TXN1_C
PCIE_TXP1_C
PCIE_RXN2
PCIE_RXP2
PCIE_TXN2_C
PCIE_TXP2_C
PCIE_TXN3_C
PCIE_TXP3_C
PCIE_TXN4_C
PCIE_TXP4_C
PCIE_TXN5_C
PCIE_TXP5_C
SPI_SCLK
SPI_CE#
NVM_ARB
SPI_SI
SPI_SO
USBOC#0
USBOC#1
USBOC#2
USBOC#3
USBOC#4
USBOC#5
USBOC#6
USBOC#7
M26
M25
G28
G27
K26
K25
P26
P25
N28
N27
T25
T24
R28
R27
F26
F25
E28
E27
H26
H25
J28
J27
L28
L27
R2
P6
P1
P5
P2
D3
C4
D5
D4
E5
C3
A2
B3
U48D
U48D
PERn1
PERp1
PETn1
PETp1
PERn2
PERp2
PETn2
PETp2
PERn3
PERp3
PETn3
PETp3
PERn4
PERp4
PETn4
PETp4
PERn5
PERp5
PETn5
PETp5
PERn6
PERp6
PETn6
PETp6
SPI_CLK
SPI_CS#
SPI_ARB
SPI_MOSI
SPI_MISO
OC0#
OC1#
OC2#
OC3#
OC4#
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31
ICH7-M DH
ICH7-M DH
3
V26
DMI0RXN
V25
DMI0RXP
U28
DMI0TXN
U27
DMI0TXP
Y26
DMI1RXN
Y25
DMI1RXP
W28
DMI1TXN
W27
DMI1TXP
AB26
DMI2RXN
AB25
DMI2RXP
AA28
DMI2TXN
AA27
DMI2TXP
AD25
DMI3RXN
AD24
DMI3RXP
AC28
DMI3TXN
AC27
DMI3TXP
PCI-Express
PCI-Express
Direct Media Interface
Direct Media Interface
DMI_ZCOMP
DMI_IRCOMP
SPI
SPI
USB
USB
DMI_CLKN
DMI_CLKP
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBRBIAS#
USBRBIAS
AE28
AE27
C25
D25
F1
F2
G4
G3
H1
H2
J4
J3
K1
K2
L4
L5
M1
M2
N4
N3
D2
USB_RBIAS_PN
D1
Place within 500
mils of ICH7
DMI_RXN0 8
DMI_RXP0 8
DMI_TXN0 8
DMI_TXP0 8
DMI_RXN1 8
DMI_RXP1 8
DMI_TXN1 8
DMI_TXP1 8
DMI_RXN2 8
DMI_RXP2 8
DMI_TXN2 8
DMI_TXP2 8
DMI_RXN3 8
DMI_RXP3 8
DMI_TXN3 8
DMI_TXP3 8
CLK_PCIE_ICH# 2
CLK_PCIE_ICH 2
DRI_IRCOMP_R
USBP0- 29
USBP0+ 29
USBP1- 29
USBP1+ 29
USBP2- 29
USBP2+ 29
USBP3- 29
USBP3+ 29
USBP4- 31
USBP4+ 31
USBP5- 33
USBP5+ 33
USBP6- 29
USBP6+ 29
USBP7- 25
USBP7+ 25
25mils/15mils
R381
R381
22.6/F_6
22.6/F_6
+1.5V
15/15mils
MB USB PORT(RIGHT)
MB USB PORT(RIGHT)
MB USB PORT(REAR)
MB USB PORT(REAR)
6 in 1 card reader
NEW CARD
Bluetooth Module
Camera module
2
R375
R375
24.9/F_4
24.9/F_4
Place within 500
mils of ICH7
REQ2#
FRAME#
REQ1#
+3V
LOCK#
SERR#
PERR#
DEVSEL#
+3V
INTF#
REQ5#
REQ0#
IRDY# INTC#
+3V
INTB#
USBOC#1
USBOC#6
+3V_S5
D2B:Change to +3V_S5
RP41
RP41
6
7
8
9
10
8.2K_10P8R
8.2K_10P8R
RP38
RP38
6
7
8
9
10
8.2K_10P8R
8.2K_10P8R
RP40
RP40
6
7
8
9
10
8.2K_10P8R
8.2K_10P8R
RP39
RP39
6
7
8
9
10
8.2K_10P8R
8.2K_10P8R
CKL use 10Kohm
1
+3V
5
INTG#
4
REQ3# STOP#
3
REQ4#
2
TRDY#
1
+3V
5
4
INTH#
3
2
INTE#
1
+3V
5
USBOC#4
4
INTD#
3
2
USBOC#2
1
+3V_S5
5
USBOC#0
4
USBOC#3
3
USBOC#5 INTA#
2
USBOC#7
1
ICH7 Boot BIOS select
U48B
AD[0..31] 29,30
B B
A A
5
T153T153
T69T69
T67T67
T152T152
T70T70
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
INTA#
INTB#
INTC#
INTD#
TP_ICH_RSVD1
TP_ICH_RSVD2
TP_ICH_RSVD3
TP_ICH_RSVD4
TP_ICH_RSVD5
U48B
E18
AD0
C18
AD1
A16
AD2
F18
AD3
E16
AD4
A18
AD5
E17
AD6
A17
AD7
A15
AD8
C14
AD9
E14
AD10
D14
AD11
B12
AD12
C13
AD13
G15
AD14
G13
AD15
E12
AD16
C11
AD17
D11
AD18
A11
AD19
A10
AD20
F11
AD21
F10
AD22
E9
AD23
D9
AD24
B9
AD25
A8
AD26
A6
AD27
C7
AD28
B6
AD29
E6
AD30
D6
AD31
Interrupt I/F
Interrupt I/F
A3
PIRQA#
B4
PIRQB#
C5
PIRQC#
B5
PIRQD#
AE5
RSVD[1]
AD5
RSVD[2]
AG4
RSVD[3]
AH4
RSVD[4]
AD9
RSVD[5]
ICH7-M DH
ICH7-M DH
PCI
PCI
MISC
MISC
REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#
GNT3#
REQ4#/GPIO22
GNT4#/GPIO48
GPIO1/REQ5#
GPIO17/GNT5#
C/BE0#
C/BE1#
C/BE2#
C/BE3#
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
PLTRST#
PCICLK
PME#
GPIO2/PIRQE#
GPIO3/PIRQF#
GPIO4/PIRQG#
GPIO5/PIRQH#
RSVD[6]
RSVD[7]
RSVD[8]
RSVD[9]
MCH_SYNC#
4
D7
E7
C16
D16
C17
D17
E13
F13
A13
A14
C8
D8
B15
C12
D12
C15
A7
E10
B18
A12
C9
E11
B10
F15
F14
F16
C26
A9
B19
G8
F7
F8
G7
AE9
AG8
AH8
F21
AH20
REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
REQ3#
REQ4#
REQ5#
IRDY#
DEVSEL#
PERR#
LOCK#
SERR#
STOP#
TRDY#
FRAME#
PLT_RST-R#
PCLK_ICH
INTE#
INTF#
INTG#
INTH#
TP_ICH_RSVD6
TP_ICH_RSVD7
TP_ICH_RSVD8
RSVD9
CBE0# 29,30
CBE1# 29,30
CBE2# 29,30
CBE3# 29,30
INTE# 30
T81T81
T68T68
T156T156
T155T155
R365
R365
*1K/F_4
*1K/F_4
REQ0# 30
GNT0# 30
T166T166
GNT2# 29
C877
C877
R661
*10P_4
*10P_4
U17
U17
2
1
TC7SH08FU
TC7SH08FU
R661
*22_4
*22_4
PLT_RST-R# 8
+3V
3 5
PCLK_ICH
C587
C587
.1U-10V_4
.1U-10V_4
4
R379
R379
A1A:Reserve 100k
100K_4
100K_4
pull low to GND
IRDY# 29,30
PAR 30
PCIRST# 29,30
DEVSEL# 29,30
PERR# 30
SERR# 30
STOP# 30
TRDY# 29,30
FRAME# 29,30
PCLK_ICH 2
PCI_PME# 30
MCH_ICH_SYNC 8 PLTRST# 16,18,27,29,32,33,38,39
PLT_RST-R#
Don't connect to PCI device / Express card
3
2
LPC
(default)
PCI UNSTUFF 10 STUFF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
ICH7-M PCI E (2 OF 4)
ICH7-M PCI E (2 OF 4)
ICH7-M PCI E (2 OF 4)
Date: Sheet
Date: Sheet
Date: Sheet
STRAP GNT5#
R1
UNSTUFF 11 UNSTUFF
01 STUFF SPI UNSTUFF
REQ# / GNT# PCI DEVICE Interrupts IDSEL#
AD25
REQ0# / GNT0# INTE# OZ711MP1
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
1
GNT4#
R2
15 46 Friday, December 09, 2005
15 46 Friday, December 09, 2005
15 46 Friday, December 09, 2005
1A
1A
1A
of
of
of
5
PCLK_SMB
PDAT_SMB
PCIE_WAKE#
D D
+3V
R405
R405
*1K/F_4
*1K/F_4
ACZ_SPKR 36
+3V
LPC_PD# 38
SYS_RST# 3
R294
R294
*10K/F_4
*10K/F_4
C C
PM_STPPCI# 2
PM_STPCPU# 2
R290
R290
*10K/F_4
*10K/F_4
PM_BMBUSY# 8
A1A:Add for SMB_ALERT#
No ASF support
R302 0_4 R302 0_4
R298 0_4 R298 0_4
Note: Connect to EC; Reserve PH/3V
+3V
THERM_ALERT# 5
B B
R297
R297
10K/F_4
10K/F_4
CLKRUN# 30,38,39
PCIE_WAKE# 27,29,39
SERIRQ 30,38,39
SCI# 39
KBSMI# 39
to Clock Gen & DIMM
PCLK_SMB 2,27,29,32,33,35
PDAT_SMB 2,27,29,32,33,35
T168 T168
T84T84
T167 T167
RI# 30
LPC_PD#
SYS_RST#
+3V
SMB_ALERT# 27
T82T82
RST_RBAY# 35
VR_PWRGD_CK410
R331 0_4 R331 0_4
R640 0_4 R640 0_4
R406
R406
*10K_4
*10K_4
R407
R407
10K_4
10K_4
BOARD_ID0
BOARD_ID1
BOM
Board ID
ID1
(R409/R410)
Como-P
A A
Reserve
Reserve
Reserve
5
ID0
(R406/R407)
00
0
1
1
0
11
DELAY_VR_PWRGOOD 3,8,41
4
3
A1A:Change SMB_ALERT# to MAIN power
R399 2.2K_4 R399 2.2K_4
R400 2.2K_4 R400 2.2K_4
R364 1K_4 R364 1K_4
U48C
PCLK_SMB
PDAT_SMB
SMB_LINK_ALERT# RST_HDD#
SMLINK0
SMLINK1
RI#
R329 0_4 R329 0_4
SMB_ALERT#
PM_STPPCI_ICH#
PM_STPCPU_ICH#
CLKRUN#
PCIE_WAKE#
SERIRQ
RUNTIME_SCI#_R
EXTSMI#_R
+3V +3V
R409
R409
*10K_4
*10K_4
BOARD_ID1 BOARD_ID0
R410
R410
10K_4
10K_4
+3V
PWROK_EC 39
4
U48C
C22
SMBCLK
B22
SMBDATA
A26
LINKALERT#
B25
SMLINK0
A25
SMLINK1
A28
RI#
A19
SPKR
A27
SUS_STAT#
A22
SYS_RST#
AB18
GPIO0/BM_BUSY#
B23
GPIO11/SMBALERT#
AC20
GPIO18/STPPCI#
AF21
GPIO20/STPCPU#
A21
GPIO26
B21
GPIO27
E23
GPIO28
AG18
GPIO32/CLKRUN#
AC19
GPIO33/AZ_DOCK_EN#
U2
GPIO34/AZ_DOCK_RST#
F20
WAKE#
AH21
SERIRQ
AF20
THRM#
AD22
VRMPWRGD
AC21
GPIO6
AC18
GPIO7
E21
GPIO8
ICH7-M DH
ICH7-M DH
R593
R593
6.8K/F_4
6.8K/F_4
R319
R319
100K_4
100K_4
SMB_LINK_ALERT#
SMLINK0
SMLINK1
EXTSMI#_R
SMB_ALERT#
RBAYID1
RBAYID0
+3VSUS
C815
C815
.022U-16V_4
.022U-16V_4
U47
U47
2
1
TC7SH08FU
TC7SH08FU
3 5
SMB
SMB
SYS
SYS
GPIO
GPIO
4
GPIO
GPIO
R655 10K_4 R655 10K_4
R396 10K_4 R396 10K_4
R395 10K_4 R395 10K_4
R394 10K_4 R394 10K_4
R648 *10K_4 R648 *10K_4
R392 10K_4 R392 10K_4
R303 10K_4 R303 10K_4
R296 10K_4 R296 10K_4
GPIO21/SATA0GP
GPIO19/SATA1GP
GPIO36/SATA2GP
SATA
GPIO
SATA
GPIO
GPIO37/SATA3GP
Clocks
Clocks
GPIO16/DPRSLPVR
TP0/BATLOW#
PWRBTN#
Power MGT
Power MGT
LAN_RST#
ICH_PWROK
3
CLK14
CLK48
SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#
PWROK
RSMRST#
GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
GPIO24
GPIO25
GPIO35
GPIO38
GPIO39
AF19
AH18
AH19
AE19
AC1
B2
C20
B24
D23
F22
AA4
AC22
C21
C23
C19
Y4
E20
A20
F19
E19
R4
E22
R3
D20
AD21
AD20
AE20
R591
R591
10K_4
10K_4
+3V_S5 +3V_S5
SATA0GP
SATA1GP
RBAYON#
14M_ICH
CLKUSB_48
R393 100/F_4 R393 100/F_4
R402 100/F_4 R402 100/F_4 R390 *10K_4 R390 *10K_4
ICH_PWROK
DPRSLPVR
PM_BATLOW#_R
DNBSWON#
R403 *100K_4 R403 *100K_4
R404 0_4 R404 0_4
LOW_G_INT
HIGHT_G_INT
EMAIL_LED#
LAN_DISABLE#
RBAYID1
RBAYID0
VR_PWRGD_CK410
To Lan pwr ok
ICH_PWROK 27
2
+3V_S5
DNBSWON#
SYS_RST#
PM_BATLOW#_R
R401 10K_4 R401 10K_4
R408 8.2K_4 R408 8.2K_4
A1A:Change to 8.2k
T108 T108
RBAYON# 35
14M_ICH 2
CLKUSB_48 2
T83T83
SUSB# 39
SUSC# 39
R232 499_4 R232 499_4
DPRSLPVR 8
PM_DPRSLPVR 41
B1B:R232 place near PR54 and change to 500 ohm series resistor
DNBSWON# 39
R317 100/F_4 R317 100/F_4
LOW_G_INT 35,39
HIGHT_G_INT 35,39
EMAIL_LED# 40
RST_KXP84 35
LID591# 25,39,40
DOCKIN# 25,28,32
LAN_DISABLE# 27
EXPRCRD_STDBY# 33
RBAYID1 35
RBAYID0 35
+3V
A1A:Change to inverter
for VR_PWRGD_CK410
R318
R318
+3V
100K_4
100K_4
U15
U15
5
4 3
SN74LVC1G04DCKR
SN74LVC1G04DCKR
RSMRST# PM_RSMRST#_R
1
2
A1A:Change to PLTRST#
A1A:Add for HDD protect(G-sensor)
C2A:Add for G sensor reset
GPIO17 has an internal pull-up(Main)
A1A:Add for Disable LAN circuit
GPIO24(Not cleared by CF9h reset event
GPIO25 /Suspend rail is a HW strap , don't pull down .
VR_PWRGD_CK410# 2,41
Note: External pull-up 3V
2
1
+3V
CLKRUN# RI#
SERIRQ
RUNTIME_SCI#_R
SATA0GP
SATA1GP
RSMRST#
PLTRST# 15,18,27,29,32,33,38,39
RSMRST# 27,39
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
ICH7-M GPIO (3 OF 4)
ICH7-M GPIO (3 OF 4)
ICH7-M GPIO (3 OF 4)
Date: Sheet
Date: Sheet
Date: Sheet
R301 8.2K_4 R301 8.2K_4
R295 8.2K_4 R295 8.2K_4 R389 10K_4 R389 10K_4
R330 10K_4 R330 10K_4
R315 10K_4 R315 10K_4
R310 10K_4 R310 10K_4
R316 10K_4 R316 10K_4
CLKUSB_48 14M_ICH
R589
R378
R378
*10_4
*10_4
C584
C584
*10P_4
*10P_4
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
*33_4
*33_4
R589
C811
C811
*10P_4
*10P_4
of
of
of
16 46 Tuesday, December 06, 2005
16 46 Tuesday, December 06, 2005
16 46 Tuesday, December 06, 2005
1
1A
1A
1A
5
U48E
U48E
A4
VSS[1]
A23
VSS[2]
B1
VSS[3]
B8
VSS[4]
B11
VSS[5]
B14
VSS[6]
B17
VSS[7]
B20
VSS[8]
B26
VSS[9]
B28
VSS[10]
C2
VSS[11]
C6
VSS[12]
G14
G18
G21
G24
G25
G26
M12
M13
M14
M15
M16
M17
M24
M27
M28
C27
D10
D13
D18
D21
D24
E15
F12
F27
F28
H24
H27
H28
J24
J25
J26
K24
K27
K28
L13
L15
L24
L25
L26
N11
N12
N13
N14
N15
N16
N17
N18
N24
N25
N26
P12
P13
P14
P15
P16
P17
P24
P27
E1
E2
E4
E8
F3
F4
F5
G1
G2
G5
G6
G9
H3
H4
H5
J1
J2
J5
M3
M4
M5
N1
N2
N5
N6
P3
P4
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
ICH7-M DH
ICH7-M DH
D D
C C
B B
A A
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
P28
R1
R11
R12
R13
R14
R15
R16
R17
R18
T6
T12
T13
T14
T15
T16
T17
U4
U12
U13
U14
U15
U16
U17
U24
U25
U26
V2
V13
V15
V24
V27
V28
W6
W24
W25
W26
Y3
Y24
Y27
Y28
AA1
AA24
AA25
AA26
AB4
AB6
AB11
AB14
AB16
AB19
AB21
AB24
AB27
AB28
AC2
AC5
AC9
AC11
AD1
AD3
AD4
AD7
AD8
AD11
AD15
AD19
AD23
AE2
AE4
AE8
AE11
AE13
AE18
AE21
AE24
AE25
AF2
AF4
AF8
AF11
AF27
AF28
AG1
AG3
AG7
AG11
AG14
AG17
AG20
AG25
AH1
AH3
AH7
AH12
AH23
AH27
4
15/15mils
+5V +3V
R291
R291
100/F_4
100/F_4
C499
C499
1U-16V_6
1U-16V_6
2 1
D8
PDZ5.6BD8PDZ5.6B
C515
C515
.1U-10V_4
.1U-10V_4
+1.5V +1.5V_PCIE_ICH
L43
L43
BK1608HS800_6
BK1608HS800_6
220U-4V_7343
220U-4V_7343
V5REF(1)
+5V_S5 +3V_S5
R367
R367
10_4
10_4
C582
C582
1U-16V_6
1U-16V_6
+
+
C562
C562
B1B:Change C562 to CH7222KMJ82(ME height limit H=1.8)
+1.5V +1.5V_GPLL_ICH
R583
+1.5V
R583
0_4
0_4
C520
C520
.1U-10V_4
.1U-10V_4
R582
R582
1_6
1_6
+3V
+3V_S5
L67
L67
1uH_6
1uH_6
C521
C521
.1U-10V_4
.1U-10V_4
C586
C586
.1U-10V_4
.1U-10V_4
.01U-16V_4
.01U-16V_4
+3V
R362
R362
0_4
0_4
+1.5V
2 1
D11
D11
PDZ5.6B
PDZ5.6B
C527
C527
.1U-10V_4
.1U-10V_4
C511
C511
30mils
R360
R360
*0_4
*0_4
C547
C547
.1U-10V_4
.1U-10V_4
3
15/15mils
C579
C579
.1U-10V_4
.1U-10V_4
C536
C536
.1U-10V_4
.1U-10V_4
+3V
30mils
GPLL_R_L GPLL_R
+1.5V
C802
C802
10U/X5R-6.3V_8
10U/X5R-6.3V_8
+1.5V
T71 *PAD T71 *PAD
T74
T74
*PAD
*PAD
V5REF_SUS
C549
C549
.1U-10V_4
.1U-10V_4
C578
C578
.1U-10V_4
.1U-10V_4
C522
C522
1U-16V_6
1U-16V_6
C509
C509
1U-16V_6
1U-16V_6
3VS5_ICH_SUS3
TPVCCSUSLAN1
TPVCCSUSLAN2
U48F
U48F
G10
V5REF[1]
AD17
V5REF[2]
F6
V5REF_Sus
AA22
Vcc1_5_B[1]
AA23
Vcc1_5_B[2]
AB22
Vcc1_5_B[3]
AB23
Vcc1_5_B[4]
AC23
Vcc1_5_B[5]
AC24
Vcc1_5_B[6]
AC25
Vcc1_5_B[7]
AC26
Vcc1_5_B[8]
AD26
Vcc1_5_B[9]
AD27
Vcc1_5_B[10]
AD28
Vcc1_5_B[11]
D26
Vcc1_5_B[12]
D27
Vcc1_5_B[13]
D28
Vcc1_5_B[14]
E24
Vcc1_5_B[15]
E25
Vcc1_5_B[16]
E26
Vcc1_5_B[17]
F23
Vcc1_5_B[18]
F24
Vcc1_5_B[19]
G22
Vcc1_5_B[20]
G23
Vcc1_5_B[21]
H22
Vcc1_5_B[22]
H23
Vcc1_5_B[23]
J22
Vcc1_5_B[24]
J23
Vcc1_5_B[25]
K22
Vcc1_5_B[26]
K23
Vcc1_5_B[27]
L22
Vcc1_5_B[28]
L23
Vcc1_5_B[29]
M22
Vcc1_5_B[30]
M23
Vcc1_5_B[31]
N22
Vcc1_5_B[32]
N23
Vcc1_5_B[33]
P22
Vcc1_5_B[34]
P23
Vcc1_5_B[35]
R22
Vcc1_5_B[36]
R23
Vcc1_5_B[37]
R24
Vcc1_5_B[38]
R25
Vcc1_5_B[39]
R26
Vcc1_5_B[40]
T22
Vcc1_5_B[41]
T23
Vcc1_5_B[42]
T26
Vcc1_5_B[43]
T27
Vcc1_5_B[44]
T28
Vcc1_5_B[45]
U22
Vcc1_5_B[46]
U23
Vcc1_5_B[47]
V22
Vcc1_5_B[48]
V23
Vcc1_5_B[49]
W22
Vcc1_5_B[50]
W23
Vcc1_5_B[51]
Y22
Vcc1_5_B[52]
Y23
Vcc1_5_B[53]
B27
Vcc3_3[1]
AG28
VccDMIPLL
AB7
Vcc1_5_A[1]
AC6
Vcc1_5_A[2]
AC7
Vcc1_5_A[3]
AD6
Vcc1_5_A[4]
AE6
Vcc1_5_A[5]
AF5
Vcc1_5_A[6]
AF6
Vcc1_5_A[7]
AG5
Vcc1_5_A[8]
AH5
Vcc1_5_A[9]
AD2
VccSATAPLL
AH11
Vcc3_3[2]
AB10
Vcc1_5_A[10]
AB9
Vcc1_5_A[11]
AC10
Vcc1_5_A[12]
AD10
Vcc1_5_A[13]
AE10
Vcc1_5_A[14]
AF10
Vcc1_5_A[15]
AF9
Vcc1_5_A[16]
AG9
Vcc1_5_A[17]
AH9
Vcc1_5_A[18]
E3
VccSus3_3[19]
C1
VccUSBPLL
AA2
VccSus1_05/VccLAN1_05[1]
Y7
VccSus1_05/VccLAN1_05[2]
ICH7-M DH
ICH7-M DH
2
Vcc1_05[1]
Vcc1_05[2]
Vcc1_05[3]
Vcc1_05[4]
Vcc1_05[5]
Vcc1_05[6]
Vcc1_05[7]
Vcc1_05[8]
Vcc1_05[9]
CORE
CORE
Vcc1_05[10]
Vcc1_05[11]
Vcc1_05[12]
Vcc1_05[13]
Vcc1_05[14]
Vcc1_05[15]
Vcc1_05[16]
Vcc1_05[17]
Vcc1_05[18]
Vcc1_05[19]
Vcc1_05[20]
VCC PAUX
VCC PAUX
VccSus3_3/VccLAN3_3[1]
VccSus3_3/VccLAN3_3[2]
VccSus3_3/VccLAN3_3[3]
VccSus3_3/VccLAN3_3[4]
Vcc3_3/VccHDA
VccSus3_3/VccSusHDA
V_CPU_IO[1]
V_CPU_IO[2]
VCCA3GP
VCCA3GP
V_CPU_IO[3]
Vcc3_3[3]
Vcc3_3[4]
Vcc3_3[5]
Vcc3_3[6]
Vcc3_3[7]
IDE
IDE
Vcc3_3[8]
Vcc3_3[9]
Vcc3_3[10]
Vcc3_3[11]
Vcc3_3[12]
Vcc3_3[13]
Vcc3_3[14]
Vcc3_3[15]
Vcc3_3[16]
PCI
PCI
Vcc3_3[17]
Vcc3_3[18]
Vcc3_3[19]
Vcc3_3[20]
Vcc3_3[21]
VccRTC
VccSus3_3[1]
VccSus3_3[2]
VccSus3_3[3]
VccSus3_3[4]
VccSus3_3[5]
VccSus3_3[6]
VccSus3_3[7]
VccSus3_3[8]
VccSus3_3[9]
VccSus3_3[10]
VccSus3_3[11]
VccSus3_3[12]
USB
USB
VccSus3_3[13]
VccSus3_3[14]
VccSus3_3[15]
VccSus3_3[16]
VccSus3_3[17]
VccSus3_3[18]
Vcc1_5_A[19]
Vcc1_5_A[20]
Vcc1_5_A[21]
ATX ARX
ATX ARX
Vcc1_5_A[22]
Vcc1_5_A[23]
Vcc1_5_A[24]
Vcc1_5_A[25]
VccSus1_05[1]
VccSus1_05[2]
VccSus1_05[3]
Vcc1_5_A[26]
Vcc1_5_A[27]
Vcc1_5_A[28]
Vcc1_5_A[29]
Vcc1_5_A[30]
USB CORE
USB CORE
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
V5
V1
W2
W7
U6
R7
AE23
AE26
AH26
AA7
AB12
AB20
AC16
AD13
AD18
AG12
AG15
AG19
A5
B13
B16
B7
C10
D15
F9
G11
G12
G16
W5
P7
A24
C24
D19
D22
G19
K3
K4
K5
K6
L1
L2
L3
L6
L7
M6
M7
N7
AB17
AC17
T7
F17
G17
AB8
AC8
K7
C28
G20
A1
H6
H7
J6
J7
C545
C545
.1U-10V_4
.1U-10V_4
+3V
C577
C577
.1U-10V_4
.1U-10V_4
TP_ICHVCCSUS1
TP_ICHVCCSUS2
TP_ICHVCCSUS3
C550
C550
.1U-10V_4
.1U-10V_4
C563
C563
.1U-10V_4
.1U-10V_4
C551
C551
.1U-10V_4
.1U-10V_4
C510
C510
.1U-10V_4
.1U-10V_4
+3V_S5
C594
C594
.1U-10V_4
.1U-10V_4
+3V_S5
C571
C571
.1U-10V_4
.1U-10V_4
+1.5V
C557
C557
.1U-10V_4
.1U-10V_4
C537
C537
.1U-10V_4
.1U-10V_4
C560
C560
.1U-10V_4
.1U-10V_4
+1.05V
C540
C540
.1U-10V_4
.1U-10V_4
C535
C535
.1U-10V_4
.1U-10V_4
+
+
330U-2.5V_7343
330U-2.5V_7343
860mA
B1B:Change +3V_S5 to +3V
+3V
+3V_S5
C534
C534
.1U-10V_4
.1U-10V_4
+3V
C572
C572
.1U-10V_4
.1U-10V_4
C585
C585
.1U-10V_4
.1U-10V_4
C555
C555
.1U-10V_4
.1U-10V_4
T80T80
T165T165
T79T79
C575
C575
.1U-10V_4
.1U-10V_4
C591
C591
C583
C583
.1U-10V_4
.1U-10V_4
.1U-10V_4
.1U-10V_4
C528
C528
.1U-10V_4
.1U-10V_4
B1B:Change +3VSUS to +3V_S5
to prevent leakage
+1.5V
C519
C519
.1U-10V_4
.1U-10V_4
1
C546
C546
C544
C544
.1U-10V_4
.1U-10V_4
C564
C564
.1U-10V_4
.1U-10V_4
C517
C517
.1U-10V_4
.1U-10V_4
VCCRTC
+3V
C513
C513
.1U-10V_4
.1U-10V_4
C532
C532
.1U-10V_4
.1U-10V_4
C514
C514
.1U-10V_4
.1U-10V_4
C530
C530
.1U-10V_4
.1U-10V_4
C518
C518
.1U-10V_4
.1U-10V_4
+1.5V
+1.05V
C531
C531
4.7U-10V_1206
4.7U-10V_1206
C574
C574
.1U-10V_4
.1U-10V_4
+1.5V
C512
C512
.1U-10V_4
.1U-10V_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
ICH7-M POWER (4 OF 4)
ICH7-M POWER (4 OF 4)
ICH7-M POWER (4 OF 4)
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
of
of
of
17 46 Friday, December 02, 2005
17 46 Friday, December 02, 2005
17 46 Friday, December 02, 2005
1
1A
1A
1A
5
PCIE TEST PADS
PCIE TEST POINTS MUST BE WITHIN 250 MILS
OF THE ASIC BALL WITH POSITIVE AND NEGATIVE
SIGNALS THE SAME DISTANCE
D D
ATI FEATURE NOT ENABLED (M52P,M54P,M56P)
B1B:Don't stuff R153,R166 for PCIE_TEST
+3V
R153
R153
*4.7K_4
*4.7K_4
PCIE_TEST
R166
C C
B B
A A
R166
*4.7K_4
*4.7K_4
PLTRST# 15,16,27,29,32,33,38,39
PLTRST#
2
1
R791 *0_4 R791 *0_4
E3A:Add U65 for M56 PLTRST#
5
+3V
U65
U65
EV@TC7SH08FU
EV@TC7SH08FU
3 5
4
PEG_RXP[15:0] 8
PEG_RXN[15:0] 8
PEG_TXP[15:0] 8
PEG_TXN[15:0] 8
U41A
U41A
PEG_TXP0
PEG_TXN0
PEG_TXP1
PEG_TXN1
PEG_TXP2
PEG_TXN2
PEG_TXP3
PEG_TXN3
PEG_TXP4
PEG_TXN4
PEG_TXP5
PEG_TXN5
PEG_TXP6
PEG_TXN6
PEG_TXP7
PEG_TXN7
PEG_TXP8
PEG_TXN8
PEG_TXP9
PEG_TXN9
PEG_TXP10
PEG_TXN10
PEG_TXP11
PEG_TXN11
PEG_TXP12
PEG_TXN12
PEG_TXP13
PEG_TXN13
PEG_TXP14
PEG_TXN14
PEG_TXP15
PEG_TXN15
CLK_PCIE_M56 2
CLK_PCIE_M56# 2
4
4
PLTRST#_M56
PCIE_TEST
AJ31
AH31
AH30
AG30
AG32
AF32
AF31
AE31
AE30
AD30
AD32
AC32
AC31
AB31
AB30
AA30
AA32
Y32
Y31
W31
W30
V30
V32
U32
U31
T31
T30
R30
R32
P32
P31
N31
AL28
AK28
AG24
AA24
AF24
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_RX8P
PCIE_RX8N
PCIE_RX9P
PCIE_RX9N
PCIE_RX10P
PCIE_RX10N
PCIE_RX11P
PCIE_RX11N
PCIE_RX12P
PCIE_RX12N
PCIE_RX13P
PCIE_RX13N
PCIE_RX14P
PCIE_RX14N
PCIE_RX15P
PCIE_RX15N
Clock
Clock
PCIE_REFCLKP
PCIE_REFCLKN
PERSTB
PCIE_TEST
PERSTB_MASK
EV@M56-P B13
EV@M56-P B13
3
PART 1 OF 7
PART 1 OF 7
P
P
C
C
I
I
-
ÂE
E
X
X
P
P
R
R
E
E
S
S
S
S
I
I
N
N
T
T
E
E
R
R
F
F
A
A
C
C
E
E
Tie To VSS
Tie To VSS
3
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
Calibration
Calibration
PCIE_CALRN
PCIE_CALRP
PCIE_CALI
V_GMCHEXP_RXP0
AK27
V_GMCHEXP_RXN0
AJ27
V_GMCHEXP_RXP1
AJ25
V_GMCHEXP_RXN1
AH25
V_GMCHEXP_RXP2
AH28
V_GMCHEXP_RXN2
AG28
V_GMCHEXP_RXP3
AG27
V_GMCHEXP_RXN3
AF27
V_GMCHEXP_RXP4
AF25
V_GMCHEXP_RXN4
AE25
V_GMCHEXP_RXP5
AE28
V_GMCHEXP_RXN5
AD28
V_GMCHEXP_RXP6
AD27
V_GMCHEXP_RXN6
AC27
V_GMCHEXP_RXP7
AC25
V_GMCHEXP_RXN7
AB25
V_GMCHEXP_RXP8
AB28
V_GMCHEXP_RXN8
AA28
V_GMCHEXP_RXP9
AA27
V_GMCHEXP_RXN9
Y27
V_GMCHEXP_RXP10
Y25
V_GMCHEXP_RXN10
W25
V_GMCHEXP_RXP11
W28
V_GMCHEXP_RXN11
V28
V_GMCHEXP_RXP12
V27
V_GMCHEXP_RXN12
U27
V_GMCHEXP_RXP13
U25
V_GMCHEXP_RXN13
T25
V_GMCHEXP_RXP14
T28
V_GMCHEXP_RXN14
R28
V_GMCHEXP_RXP15
R27
V_GMCHEXP_RXN15
P27
R156 EV@2K/F_4 R156 EV@2K/F_4
AE24
R172 EV@562/F_4 R172 EV@562/F_4
AD24
R167 EV@1.47K/F_4 R167 EV@1.47K/F_4
AB24
FOR M52P,M54P,M56P
PCIE_CALRN = 2K
PCIE CALRP = 562R
PCIE CALI = 1.47K
2
C304 EV@.1U-10V_4 C304 EV@.1U-10V_4
C303 EV@.1U-10V_4 C303 EV@.1U-10V_4
C333 EV@.1U-10V_4 C333 EV@.1U-10V_4
C332 EV@.1U-10V_4 C332 EV@.1U-10V_4
C302 EV@.1U-10V_4 C302 EV@.1U-10V_4
C301 EV@.1U-10V_4 C301 EV@.1U-10V_4
C331 EV@.1U-10V_4 C331 EV@.1U-10V_4
C330 EV@.1U-10V_4 C330 EV@.1U-10V_4
C300 EV@.1U-10V_4 C300 EV@.1U-10V_4
C299 EV@.1U-10V_4 C299 EV@.1U-10V_4
C329 EV@.1U-10V_4 C329 EV@.1U-10V_4
C328 EV@.1U-10V_4 C328 EV@.1U-10V_4
C298 EV@.1U-10V_4 C298 EV@.1U-10V_4
C297 EV@.1U-10V_4 C297 EV@.1U-10V_4
C327 EV@.1U-10V_4 C327 EV@.1U-10V_4
C326 EV@.1U-10V_4 C326 EV@.1U-10V_4
C296 EV@.1U-10V_4 C296 EV@.1U-10V_4
C295 EV@.1U-10V_4 C295 EV@.1U-10V_4
C325 EV@.1U-10V_4 C325 EV@.1U-10V_4
C324 EV@.1U-10V_4 C324 EV@.1U-10V_4
C294 EV@.1U-10V_4 C294 EV@.1U-10V_4
C293 EV@.1U-10V_4 C293 EV@.1U-10V_4
C323 EV@.1U-10V_4 C323 EV@.1U-10V_4
C322 EV@.1U-10V_4 C322 EV@.1U-10V_4
C292 EV@.1U-10V_4 C292 EV@.1U-10V_4
C291 EV@.1U-10V_4 C291 EV@.1U-10V_4
C321 EV@.1U-10V_4 C321 EV@.1U-10V_4
C320 EV@.1U-10V_4 C320 EV@.1U-10V_4
C290 EV@.1U-10V_4 C290 EV@.1U-10V_4
C289 EV@.1U-10V_4 C289 EV@.1U-10V_4
C319 EV@.1U-10V_4 C319 EV@.1U-10V_4
C318 EV@.1U-10V_4 C318 EV@.1U-10V_4
PEG_RXP0
PEG_RXN0
PEG_RXP1
PEG_RXN1
PEG_RXP2
PEG_RXN2
PEG_RXP3
PEG_RXN3
PEG_RXP4
PEG_RXN4
PEG_RXP5
PEG_RXN5
PEG_RXP6
PEG_RXN6
PEG_RXP7
PEG_RXN7
PEG_RXP8
PEG_RXN8
PEG_RXP9
PEG_RXN9
PEG_RXP10
PEG_RXN10
PEG_RXP11
PEG_RXN11
PEG_RXP12
PEG_RXN12
PEG_RXP13
PEG_RXN13
PEG_RXP14
PEG_RXN14
PEG_RXP15
PEG_RXN15
B1B:PCIE_CALRN(ball AE24) need change to +1.2V_VPCIE
+1.2V_VPCIE
PROJECT : ZC1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
M56P 1 OF 7
M56P 1 OF 7
M56P 1 OF 7
Date: Sheet of
Date: Sheet
2
Date: Sheet
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
1
1A
1A
of
of
18 46 Friday, December 02, 2005
18 46 Friday, December 02, 2005
18 46 Friday, December 02, 2005
1
1A
5
MEMORY CLOCK SPREAD
SPECTRUM
D D
XT_IN
1726_S0
+3V
1726_CKO
R198
R198
*10K_4
*10K_4
1726_S0
R197
R197
*10K_4
*10K_4
OSC_SPREAD
R199 EV@33_4 R199 EV@33_4
C C
A1A:Add pull low 10k
GPIO15 HI = 1.0V VDDC
GPIO15 LO = 1.1V VDDC
V_PWRCNTL
R127
R127
10K_4
10K_4
FOR M52P,M54P,M56P CONNECT TO +2.5V
1.2V OR 1.0V @ 20MA ASIC MPVDD
B B
A A
CONNECT TO VDDC
+3V
15 MIL
L17
L17
EV@BLM18PG181SN1D_6
EV@BLM18PG181SN1D_6
VGATHRM-
10 mil trace /
10 mil space
VGATHRM+
Close to pin ASIC
3V_THM1
C113
C113
EV@.1U-10V_4
EV@.1U-10V_4
C115
C115
EV@2200P-50V_4
EV@2200P-50V_4
5
C1C:Change GPIO27 instead of GPIO25 for MEMTYPE_1
E3A:Add R792 for MEMTYPE_1
U11
U11
1
2
3
EV@CY25819
EV@CY25819
MK1726-8
+1.1V_VGA
EV@BLM18PG181SN1D_6
EV@BLM18PG181SN1D_6
B1B:Change R177,R181 to 0 ohm for VGA 27MHZ
XT_OUT
XIN
VSS
SRS
SSCLK4REF
27M_IN
8
XOUT
MK1726_VDD
7
VDD
MK_PD
6
PD
MK_27M
5
R550
R550
EV@0_4
EV@0_4
27M_O
EV@71.5/F_4
EV@71.5/F_4
Voltage divider resistor values R181
and R551 to ensure XTALIN/XTALOUT
voltage level matches vddc
A1A:Reversed LVDSCLK,LVDSDATA
pull high to LVDS side
For m26x,m52p,m54p,m56p thermal interrupt
is low edge and connects to gpio17
+2.5V
L60
L60
EV@BLM18PG181SN1D_6
EV@BLM18PG181SN1D_6
+MPVDD
20 mA
L20
L20
C131
C131
EV@22U-16V_12
EV@22U-16V_12
+-10PPM
+3V
R82
R82
10K_4
U7
1
VCC
3
DXN
2
DXP
5
GND
EV@G781-1U7EV@G781-1
10K_4
6
ALERT#
7
SDA
8
SCLK
4
OVERT#
D2B:Connect U7 OVERT to fan driver
SLAVE ADDRESS: 9A
ANY UNUSED GPIO CAN OPTIONALLY
BE MEMORY TYPE CONFIG STRAPS
R177 EV@0_4 R177 EV@0_4
VGA27M
R182 *0_4 R182 *0_4
R551
R551
A1A:Change LVDS_DAT/LVDS_CLK
to DVPDATA18/DVPDATA19
V_PWRCNTL DRIVEN HI SELECT 1.0V VDDC
V_PWRCNTL DRIVEN LO SELECT 1.1V VDDC
C958 *.1U-10V_4 C958 *.1U-10V_4
+PVDD
C139
C139
EV@.1U-10V_4
EV@.1U-10V_4
C288
C288
EV@22P-50V_4
EV@22P-50V_4
Y2
Y2
EV@1M_4
EV@TXC=27MHz
EV@TXC=27MHz
C278
C278
EV@22P-50V_4
EV@22P-50V_4
VTHM_DAT_EC
VTHM_CLK_EC
EV@1M_4
B1B:Don't stuff R82,R95
for thermal sensor
D2B:stuff R82 for thermal sensor
VGA_OVT#
VGA_THERM# 5
4
MEMTYP_1 24
MEMTYP_0 24
MK_PD
R171
R171
*10K_4
*10K_4
C741
C741
EV@22U-16V_12
EV@22U-16V_12
L28 EV@BLM18PG181SN1D_6 L28 EV@BLM18PG181SN1D_6
27MOUT
R181 EV@0_4 R181 EV@0_4
*10P-50V_4
*10P-50V_4
C739
C739
C262
C262
EV@.1U-10V_4
EV@.1U-10V_4
B1B:Don't stuff C739
DC_Strap2 24
DC_Strap3 24
DC_Strap4 24
LVDS_DAT 25
LVDS_CLK 25
DEMUX_SEL 24
GPIO[13..0] 24
T106T106
GPIO7
V_PWRCNTL 44
R129 EV@499/F_4 R129 EV@499/F_4
+3V
R128 EV@499/F_4 R128 EV@499/F_4
B1B:Reserved for VREFG
C153
C153
EV@22U-16V_12
EV@22U-16V_12
EV@1U-6.3V_4
EV@1U-6.3V_4
XT_IN
R186
R186
C728
C728
EV@.1U-10V_4
EV@.1U-10V_4
C145
C145
C141
C141
EV@1U-6.3V_4
EV@1U-6.3V_4
R191 *33_4 R191 *33_4
R185 *33_4 R185 *33_4
XT_OUT
A1A:Reserve for VGA
thermal sensor
D2B:Change R122,R133 to 10K to resolve
Battery can't learning issue
4
C138
C138
EV@1U-6.3V_4
EV@1U-6.3V_4
+3V
VTHM_DAT_EC
VTHM_CLK_EC
C724
C724
EV@1U-6.3V_4
EV@1U-6.3V_4
R122
R122
10K_4
10K_4
T12T12
T11T11
T14T14
T13T13
T107T107
T16T16
T19T19
MEMTYP_1
R792 *0_4 R792 *0_4
T15T15
T17T17
T18T18
T23T23
T22T22
+3V
FOR M52P,M54P,M56P
NOT CONNECTED
VID/DVO_R13
VID/DVO_R14
VID/DVO_R15
R99 EV@0_4 R99 EV@0_4
R111 EV@0_4 R111 EV@0_4
V_PWRCNTL
OSC_SPREAD
VGA_OVT#
PVDD
PVSS
MPVSS
T21T21
R159
R159
R133
R133
10K_4
10K_4
U41B
U41B
AG8
GPIO_34
AH7
GPIO_33
AG9
GPIO_32
AH8
GPIO_31
AJ8
GPIO_30
AH9
GPIO_29
AG10
GPIO_28
AF10
GPIO_27
AH6
GPIO_26
AF8
GPIO_25
AF7
GPIO_24
AE9
GPIO_23
AE10
GPIO_22
AG7
GPIO_21
AF9
GPIO_20
AF13
GPIO_19
AE13
GPIO_18
AK4
NC_DVOVMODE_0
AL4
NC_DVOVMODE_1
AF2
DVPCNTL_0
AF1
DVPCNTL_1
AF3
DVPCNTL_2
AG1
DVPCLK
AG2
DVPDATA_0
AG3
DVPDATA_1
AH2
DVPDATA_2
AH3
DVPDATA_3
AJ2
DVPDATA_4
AJ1
DVPDATA_5
AK2
DVPDATA_6
AK1
DVPDATA_7
AK3
DVPDATA_8
AL2
DVPDATA_9
AL3
DVPDATA_10
AM3
DVPDATA_11
AE6
DVPDATA_12
AF4
DVPDATA_13
AF5
DVPDATA_14
AG4
DVPDATA_15
AJ3
DVPDATA_16
AH4
VID/DVO_R18
VID/DVO_R19
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
VGATHRM+
VGATHRM-
27M_IN
27M_O
EV@1K_4
EV@1K_4
TESTEN
DVPDATA_17
AJ4
DVPDATA_18
AG5
DVPDATA_19
AH5
DVPDATA_20
AF6
DVPDATA_21
AE7
DVPDATA_22
AG6
DVPDATA_23
AD4
GPIO_0
General
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7_BLON
GPIO_8
GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_17
NC_AB6
VREFG
DPLUS
DMINUS
PVDD
PVSS
A6
MPVDD
A5
MPVSS
XTALIN
XTALOUT
PLLTEST
TESTEN
ROMCSb
LVSSR_1
LVSSR_2
LVSSR_3
LVSSR_4
LVSSR_5
LVSSR_6
LVSSR_7
EV@M56-P B13
EV@M56-P B13
General
Purpose
Purpose
I/O
I/O
Thermal
Thermal
Diode
Diode
PLL &
PLL &
XTAL
XTAL
Test
Test
ROM
ROM
LVDS PLL
LVDS PLL
and I/O
and I/O
GND
GND
+3V
AD2
AD1
AD3
AC1
AC2
AC3
AB2
AC6
AC5
AC4
AB3
AB4
AB5
AD5
AB8
AA8
AB7
R120 EV@0_4 R120 EV@0_4
AB6
AC8
AG12
AH12
AJ14
AH14
AL26
AM26
AG14
AG22
AC7
AK17
AJ19
AF18
AH17
AG17
AG19
AH19
2
VTHM_DAT_EC
VTHM_CLK_EC
1
1
2
B1B:Remove Q12,Q31 for VGA thermal sensor
+3V
3
PART 2 OF 7
PART 2 OF 7
V
V
I
I
D
D
E
E
O
O
&
&
Expand GPIO
Expand GPIO
M
M
U
U
L
L
T
T
I
I
M
M
E
E
D
D
I
I
A
A
VIP Host/External TMDS
VIP Host/External TMDS
External
External
SSC
SSC
LVDS PLL
LVDS PLL
and I/O
and I/O
GND
GND
Integrated
Integrated
TMDS
TMDS
TXVDDR_1
TXVDDR_2
TXVDDR_3
TXVDDR_4
TXVSSR_1
TXVSSR_2
TXVSSR_3
TXVSSR_4
TXVSSR_5
DAC / CRT
DAC / CRT
GENERICA
GENERICB
DAC2 (TV/CRT2)
DAC2 (TV/CRT2)
A2VSSN_1
A2VSSN_2
NC_A2VDDQ
Monitor
Monitor
Interface
Interface
DDC1DATA
DDC1CLK
DDC2DATA
DDC2CLK
DDC3DATA
DDC3CLK
GENERICC
LVSSR_10
TXCM
TXCP
TX0M
TX0P
TX1M
TX1P
TX2M
TX2P
TX3M
TX3P
TX4M
TX4P
TX5M
TX5P
TPVDD
TPVSS
HSYNC
VSYNC
RSET
AVDD_1
AVDD_2
AVSSQ
AVSSN_1
AVSSN_2
VDD1DI
VSS1DI
H2SYNC
V2SYNC
COMP
R2SET
A2VDD_1
A2VDD_2
A2VSSQ
VDD2DI
VSS2DI
HPD1
LPVSS
LVSSR_9
LVSSR_8
D2B:The TMDS termination resistor values
(330 ohm) are pcb layout dependent
and may require final tuning
AL9
AM9
R123 EV@180_4 R123 EV@180_4
AK10
AL10
R132 EV@180_4 R132 EV@180_4
AL11
AM11
R130 EV@180_4 R130 EV@180_4
AL12
AM12
R134 EV@180_4 R134 EV@180_4
AK9
AJ9
D2B:Change R123,R130,R132,R134 from 330 to 180 for TMDS
AK11
AJ11
AK12
AJ12
AM8
AL8
AJ6
AK6
AL6
AM6
AJ7
AK7
AL7
AM7
AK8
AK24
R
AM24
G
AL24
B
AJ23
AJ22
AK22
R96 EV@0_4 R96 EV@0_4
AF23
R178 EV@499/F_4 R178 EV@499/F_4
AL22
AL25
AVDD
AM25
AK23
AK25
AJ24
AM23
AL23
AK15
R2
AM15
G2
AL15
B2
AF15
AG15
AJ15
Y
AJ13
C
AH15
R138
R138
AK14
AM16
AL16
AM17
AL17
AL14
AK13
AJ16
AJ17
AF11
AH22
AH23
AH13
AG13
AE12
AF12
B1B:Stuff R125,R126 for VGA thermal sensor SMBus
D2B:Remove R125,R126 for VGA thermal sensor SMBus
AE23
AE18
AF22
AF17
AF21
C2A:Stuff Q12,Q31 for VGA thermal sensor
Q12
Q12
2N7002E
2N7002E
2N7002E
2N7002E
Q31
Q31
3
MBDATA
3
MBCLK
3
MBDATA 5,39,46
MBCLK 5,39,46
C114
C114
EV@22U-16V_12
EV@22U-16V_12
VGA_OVT#
EXT_TV_Y/G
EXT_TV_C/R
EXT_TV_COMP
EV@715/F_4
EV@715/F_4
C196
C196
EV@1U-6.3V_4
EV@1U-6.3V_4
R125 *0_4 R125 *0_4
R126 *0_4 R126 *0_4
2
TXCM_EX 25
TXCP_EX 25
TX0M_EX 25
TX0P_EX 25
TX1M_EX 25
TX1P_EX 25
TX2M_EX 25
TX2P_EX 25
+TPVDD
C723
C723
EV@1U-6.3V_4
EV@1U-6.3V_4
R_DAC1 26
G_DAC1 26
B_DAC1 26
HSYNC_DAC1 24,26
VSYNC_DAC1 24,26
For m26x,m52p,m54p,m56p thermal interrupt
is low edge and connects to gpio17
C265
C265
EV@.1U-10V_4
EV@.1U-10V_4
EV@1U-6.3V_4
EV@1U-6.3V_4
C239
C239
EV@1U-6.3V_4
EV@1U-6.3V_4
+VDD2DI
C209
C209
EV@.1U-10V_4
EV@.1U-10V_4
VTHM_DAT_EC
VTHM_CLK_EC
L58
L58
EV@BLM18PG181SN1D_6
EV@BLM18PG181SN1D_6
C119
C119
EV@22U-16V_12
EV@22U-16V_12
TXVDDR
EV@BLM18PG181SN1D_6
EV@BLM18PG181SN1D_6
C722
C722
C142
C142
EV@.1U-10V_4
EV@1U-6.3V_4
EV@1U-6.3V_4
EV@.1U-10V_4
+AVDD
C738
C738
C251
C251
EV@1U-6.3V_4
EV@1U-6.3V_4
Y_DAC2 25
C_DAC2 25
COMP_DAC2 25
+2.5V
C193
C193
EV@.1U-10V_4
EV@.1U-10V_4
+2.5V
L61
L61
EV@BLM18PG181SN1D_6
EV@BLM18PG181SN1D_6
C218
C218
EV@22U-16V_12
EV@22U-16V_12
TMDS_HPD 25,32
CRT1DDCDATA 26
CRT1DDCCLK 26
TMDS_DDCDATA 32
TMDS_DDCCLK 32
A1A:Reserve for thermal
sensor CLK/DATA
GENERICC 24
2
L56
L56
C261
C261
EV@22U-16V_12
EV@22U-16V_12
C169
C169
EV@22U-16V_12
EV@22U-16V_12
FOR M52P,M54P,M56P
CONNECT TO +2.5V
+2.5V
VDD_PNL_PLL25 (2.5V @ 40mA ASIC LPVDD,TPVDD)
FOR M52P,M54P,M56P
CONNECT TO +2.5V
+2.5V
L64
L64
EV@BLM18PG181SN1D_6
EV@BLM18PG181SN1D_6
C246
C246
C259
C259
EV@.1U-10V_4
EV@.1U-10V_4
FOR M52P,M54P,M56P A2VDDQ
IT IS NO CONNECT
C726
C726
EV@1U-6.3V_4
EV@1U-6.3V_4
The DDC2 is for DVI (TMDS) reading EDID data,
which cannot be shared with other I2C devices.
FOR M52P,M54P,M56P GENERICC
IT IS GPIO
+2.5V
AVDD_2.5 (2.5V @ 65mA ASIC AVDD)
FOR M52P,M54P,M56P
CONNECT TO +2.5V
+2.5V +VDDDI
L63 EV@BLM18PG181SN1D_6 L63 EV@BLM18PG181SN1D_6
EV@22U-16V_12
EV@22U-16V_12
VDDDI_2.5 (2.5V @ 40mA ASIC VDD1DI,VDD2DI)
+A2VDDQ
C178
C178
C140
C140
EV@22U-16V_12
EV@22U-16V_12
EV@.1U-10V_4
EV@.1U-10V_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet
Date: Sheet
PLACE CLOSE TO ASIC
E3B:Add R137,R143,R146,R174,R175,R176
(150 ohm) for CRT/TV can't detect issue
R_DAC1
G_DAC1
B_DAC1
EXT_TV_Y/G
EXT_TV_C/R
EXT_TV_COMP
L59
L59
M56P 2 OF 7
M56P 2 OF 7
M56P 2 OF 7
1
R174 150/F_4 R174 150/F_4
R176 150/F_4 R176 150/F_4
R175 150/F_4 R175 150/F_4
R146 150/F_4 R146 150/F_4
150/F_4
150/F_4
R137
R137
R143
R143
150/F_4
150/F_4
+2.5V
EV@BLM18PG181SN1D_6
EV@BLM18PG181SN1D_6
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
1
1A
1A
1A
of
of
19 46 Saturday, December 10, 2005
19 46 Saturday, December 10, 2005
19 46 Saturday, December 10, 2005
5
VGA_MEM_IO
A1A:Change to VGA_MEM_IO
C208
C208
EV@22U-16V_12
EV@22U-16V_12
C180
C281
C281
EV@1U-6.3V_4
EV@1U-6.3V_4
+3V
R777 *0_6 R777 *0_6
Q56
Q56
1
AO3403
AO3403
3
Q57
Q57
EV@2N7002
EV@2N7002
C180
EV@22U-16V_12
EV@22U-16V_12
C162
C162
EV@22U-16V_12
EV@22U-16V_12
C151
C151
EV@1U-6.3V_4
EV@1U-6.3V_4
D D
+3V_S5
C C
R778
R778
EV@100K/F_4
EV@100K/F_4
+2.5V
2
1
If memory interface has to be up to 600Mhz or above, the
GPU core voltage and memory I/O voltage may need to be
increased to 1.2~1.3V and 2.0V
C156
C156
C283
C283
EV@1U-6.3V_4
EV@1U-6.3V_4
C192
C192
EV@1U-6.3V_4
EV@1U-6.3V_4
EV@1U-6.3V_4
EV@1U-6.3V_4
C236
C236
EV@1U-6.3V_4
EV@1U-6.3V_4
C152
C152
EV@1U-6.3V_4
EV@1U-6.3V_4
C172
C172
EV@1U-6.3V_4
EV@1U-6.3V_4
C150
C150
EV@1U-6.3V_4
EV@1U-6.3V_4
C244
C244
EV@1U-6.3V_4
EV@1U-6.3V_4
C163
C163
EV@1U-6.3V_4
EV@1U-6.3V_4
C120
C120
EV@1U-6.3V_4
EV@1U-6.3V_4
C247
C247
EV@1U-6.3V_4
EV@1U-6.3V_4
C233
C233
EV@1U-6.3V_4
EV@1U-6.3V_4
C166
C166
EV@1U-6.3V_4
EV@1U-6.3V_4
C157
C157
EV@1U-6.3V_4
EV@1U-6.3V_4
D2B:Add R778,Q56,Q57 for VGA +3V power sequence
C127
C127
EV@22U-16V_12
3
EV@22U-16V_12
C205
C205
EV@1U-6.3V_4
EV@1U-6.3V_4
2
L19
L19
EV@BLM18PG181SN1D_6
EV@BLM18PG181SN1D_6
L57
L57
EV@BLM18PG181SN1D_6
EV@BLM18PG181SN1D_6
A1A:Change to VGA_MEM_IO
VGA_MEM_IO
L21
L21
EV@BLM18PG181SN1D_6
EV@BLM18PG181SN1D_6
VDDR4 for DVPDATA[12..23]
C137
C137
EV@1U-6.3V_4
EV@1U-6.3V_4
+VDDR5
C720
C720
EV@1U-6.3V_4
EV@1U-6.3V_4
C270
C270
EV@1U-6.3V_4
EV@1U-6.3V_4
C124
C124
EV@1U-6.3V_4
EV@1U-6.3V_4
C258
C258
EV@1U-6.3V_4
EV@1U-6.3V_4
C171
C171
EV@1U-6.3V_4
EV@1U-6.3V_4
C217
C217
EV@1U-6.3V_4
EV@1U-6.3V_4
C212
C212
EV@1U-6.3V_4
EV@1U-6.3V_4
+1.8V_VDDRH
C269
C269
EV@1U-6.3V_4
EV@1U-6.3V_4
4
C277
C277
C129
C129
EV@1U-6.3V_4
EV@1U-6.3V_4
EV@1U-6.3V_4
EV@1U-6.3V_4
C237
C237
EV@1U-6.3V_4
EV@1U-6.3V_4
C257
C257
EV@1U-6.3V_4
EV@1U-6.3V_4
C176
C176
EV@1U-6.3V_4
EV@1U-6.3V_4
C240
C240
EV@1U-6.3V_4
EV@1U-6.3V_4
EV@1U-6.3V_4
EV@1U-6.3V_4
C134
C134
EV@.1U-10V_4
EV@.1U-10V_4
VDDR5 for DVPDATA[0..11]
C721
C721
EV@.1U-10V_4
EV@.1U-10V_4
C148
C148
EV@1U-6.3V_4
EV@1U-6.3V_4
C282
C282
EV@1U-6.3V_4
EV@1U-6.3V_4
C221
C221
EV@1U-6.3V_4
EV@1U-6.3V_4
C219
C219
+VDDR4
C143
C143
EV@1U-6.3V_4
EV@1U-6.3V_4
C130
C130
EV@1U-6.3V_4
EV@1U-6.3V_4
C214
C214
EV@1U-6.3V_4
EV@1U-6.3V_4
AB10
AC19
AD18
AC20
AD19
AD20
AA1
J10
P10
Y10
J11
A21
M10
N10
J18
J19
K21
A12
H13
A15
J20
J13
K11
K19
A18
L23
K20
K24
L24
H19
A24
K13
J32
A30
C32
F32
L32
AB9
AA9
AJ5
AM5
AL5
AK5
AE2
AE3
AE4
AE5
A27
A28
C1
J1
M1
R1
V1
A3
P9
N9
A9
P8
R9
Y9
Y8
F1
E1
U41E
U41E
VDDR1_1
VDDR1_2
VDDR1_3
VDDR1_4
VDDR1_5
VDDR1_6
VDDR1_7
VDDR1_8
VDDR1_9
VDDR1_10
VDDR1_11
VDDR1_12
VDDR1_13
VDDR1_14
VDDR1_15
VDDR1_16
VDDR1_17
VDDR1_18
VDDR1_20
VDDR1_21
VDDR1_22
VDDR1_23
VDDR1_24
VDDR1_25
VDDR1_26
VDDR1_27
VDDR1_28
VDDR1_29
VDDR1_30
VDDR1_31
VDDR1_32
VDDR1_33
VDDR1_34
VDDR1_35
VDDR1_36
VDDR1_37
VDDR1_38
VDDR1_39
VDDR1_40
VDDR1_41
VDDR1_42
VDDR1_43
VDDR1_45
VDDR1_46
VDDR3_1
VDDR3_2
VDDR3_3
VDDR3_4
VDDR3_5
VDDR3_6
VDDR3_7
VDDR3_8
VDDR4_1
VDDR4_2
VDDR4_3
VDDR4_4
VDDR5_1
VDDR5_2
VDDR5_3
VDDR5_4
VDDRH0
VDDRH1
VSSRH0
VSSRH1
EV@M56-P B13
EV@M56-P B13
Clock
Clock
I/O
I/O
PART 5 OF 7
PART 5 OF 7
Memory I/O
Memory I/O
I/0
I/0
Memory
Memory
3
PCIE_PVDD_12_1
PCIE_PVDD_12_2
PCIE_PVDD_12_3
PCIE_PVDD_12_4
PCIE_VDDR_12_10
PCIE_VDDR_12_11
PCIE_VDDR_12_12
PCIE_VDDR_12_13
PCIE_VDDR_12_14
PCIE_VDDR_12_1
PCIE_VDDR_12_2
PCIE_VDDR_12_3
PCIE_VDDR_12_4
PCIE_VDDR_12_5
PCIE_VDDR_12_6
PCIE_VDDR_12_7
PCIE_VDDR_12_8
PCI-Express
PCI-Express
PCIE_VDDR_12_9
P
P
O
O
W
W
E
E
R
R
LVDDR/VDDL0_1
LVDDR/VDDL0_2
LVDDR/VDDL0_3
LVDDR/VDDL1_1
LVDDR/VDDL1_2
LVDDR/VDDL1_3
LVDDR/VDDL2_1
LVDDR/VDDL2_2
LVDDR/VDDL2_3
LVDS PLL, I/O I/O Internal Core
LVDS PLL, I/O I/O Internal Core
V23
N23
P23
U23
N29
N28
N27
N26
N25
AL31
AM31
AM30
AL32
AL30
AM28
AL29
AM29
AM27
AC11
VDDC_1
AC12
VDDC_2
P14
VDDC_3
U15
VDDC_4
W14
VDDC_5
W15
VDDC_6
R17
VDDC_7
R15
VDDC_8
V15
VDDC_9
V16
VDDC_10
T16
VDDC_11
U16
VDDC_12
T17
VDDC_13
U17
VDDC_14
V14
VDDC_15
R18
VDDC_16
T18
VDDC_17
V18
VDDC_18
P18
VDDC_19
P19
VDDC_20
R19
VDDC_21
W19
VDDC_22
AD11
VDDC_23
AC13
VDD25_1
AC16
VDD25_2
AC18
VDD25_3
AC15
VDDPLL
W10
VDDCI_1
T14
VDDCI_2
W17
VDDCI_3
P16
VDDCI_4
T23
VDDCI_5
K14
VDDCI_6
U19
VDDCI_7
VDD_PNL_PLL25 (2.5V @ 40mA ASIC LPVDD,TPVDD)
AE19
LPVDD/VDDL0
AF20
AE20
AF19
AC21
AC22
AD22
AE21
AD21
AE22
EV@1U-6.3V_4
EV@1U-6.3V_4
EV@1U-6.3V_4
EV@1U-6.3V_4
EV@1U-6.3V_4
EV@1U-6.3V_4
+1.2V_VDDPLL
C195
C195
EV@1U-6.3V_4
EV@1U-6.3V_4
+2.5V_LPVDD
C204
C204
EV@1U-6.3V_4
EV@1U-6.3V_4
C252
C252
C284
C284
C266
C266
C175
C175
EV@1U-6.3V_4
EV@1U-6.3V_4
EV@1U-6.3V_4
EV@1U-6.3V_4
C256
C256
EV@1U-6.3V_4
EV@1U-6.3V_4
C271
C271
EV@1U-6.3V_4
EV@1U-6.3V_4
C174
C174
EV@1U-6.3V_4
EV@1U-6.3V_4
C170
C170
EV@1U-6.3V_4
EV@1U-6.3V_4
L26
L26
EV@BLM18PG181SN1D_6
EV@BLM18PG181SN1D_6
C243
C243
EV@10U-10V_8
EV@10U-10V_8
C220
C220
EV@1U-6.3V_4
EV@1U-6.3V_4
+2.5V
C213
C213
EV@.1U-10V_4
EV@.1U-10V_4
C276
C276
+1.2V_VPCIE
C275
C275
EV@1U-6.3V_4
EV@1U-6.3V_4
C279
C279
EV@1U-6.3V_4
EV@1U-6.3V_4
C274
C274
EV@1U-6.3V_4
EV@1U-6.3V_4
C222
C222
EV@1U-6.3V_4
EV@1U-6.3V_4
C164
C164
EV@1U-6.3V_4
EV@1U-6.3V_4
L62
L62
EV@BLM18PG181SN1D_6
EV@BLM18PG181SN1D_6
C733
C733
EV@22U-16V_12
EV@22U-16V_12
+2.5V_LVDDR
C177
C177
EV@1U-6.3V_4
EV@1U-6.3V_4
2
+1.2V_VPCIE
C313
C313
EV@22U-16V_12
EV@22U-16V_12
C253
C253
EV@1U-6.3V_4
EV@1U-6.3V_4
C263
C263
EV@1U-6.3V_4
EV@1U-6.3V_4
C225
C225
EV@1U-6.3V_4
EV@1U-6.3V_4
C210
C210
EV@1U-6.3V_4
EV@1U-6.3V_4
C203
C203
EV@1U-6.3V_4
EV@1U-6.3V_4
+1.1V_VGA_VDDC
+2.5V
C197
C197
EV@22U-16V_12
EV@22U-16V_12
+1.2V_VPCIE
C312
C312
EV@22U-16V_12
EV@22U-16V_12
+1.2V_VPCIE
C255
C255
EV@1U-6.3V_4
EV@1U-6.3V_4
C224
C224
EV@1U-6.3V_4
EV@1U-6.3V_4
C202
C202
EV@1U-6.3V_4
EV@1U-6.3V_4
C249
C249
EV@1U-6.3V_4
EV@1U-6.3V_4
C242
C242
EV@1U-6.3V_4
EV@1U-6.3V_4
1
1.2V ASIC PCIE_PVDD_12 @ 100mA, PCIE_VDDR_12 @ 2000mA
FOR M52P,M54P,M56P CONNECT TO +1.2V
C309
C309
EV@22U-16V_12
EV@22U-16V_12
C183
C183
EV@1U-6.3V_4
EV@1U-6.3V_4
C201
C201
EV@1U-6.3V_4
EV@1U-6.3V_4
+2.5V
C730
C730
EV@10U-10V_8
EV@10U-10V_8
C182
C182
EV@1U-6.3V_4
EV@1U-6.3V_4
C241
C241
EV@1U-6.3V_4
EV@1U-6.3V_4
C191
C191
EV@1U-6.3V_4
EV@1U-6.3V_4
C234
C234
EV@1U-6.3V_4
EV@1U-6.3V_4
C199
C199
EV@1U-6.3V_4
EV@1U-6.3V_4
L24
L24
EV@BLM18PG181SN1D_6
EV@BLM18PG181SN1D_6
C231
C231
EV@.1U-10V_4
EV@.1U-10V_4
C181
C181
EV@1U-6.3V_4
EV@1U-6.3V_4
C194
C194
EV@1U-6.3V_4
EV@1U-6.3V_4
EV@1U-6.3V_4
EV@1U-6.3V_4
+2.5V
1.2V OR 1.0V @ 18A ASIC VDDC,VDDCI
+1.1V_VGA
C206
C206
C133
C133
EV@22U-16V_12
EV@22U-16V_12
EV@1U-6.3V_4
EV@1U-6.3V_4
C725
C725
EV@22U-16V_12
EV@22U-16V_12
L22 EV@BLM18PG181SN1D_6 L22 EV@BLM18PG181SN1D_6
C254
C254
C190
EV@1U-6.3V_4
EV@1U-6.3V_4
C190
EV@22U-16V_12
EV@22U-16V_12
C223
C223
+1.1V_VGA
B B
C248
C248
EV@.1U-10V_4
EV@.1U-10V_4
C734
C734
EV@10U-10V_8
EV@10U-10V_8
BBN_M56
C160
C160
EV@1U-6.3V_4
EV@1U-6.3V_4
+1.1V_VGA
100 mA
EV@BLM18PG181SN1D_6
EV@BLM18PG181SN1D_6
U9
VPP
VO
VIN3ADJ
VEN
NC
POK
GND
+1.1V_VGA_BBP
C245
C245
EV@22U-16V_12
EV@22U-16V_12
+2.5V
L29
L29
6
7
5
8
+1.2V_VPCIE +5V +1.2V_VPCIE
R549
R549
EV@91K_4
EV@91K_4
R152 0_4 R152 0_4
+3V
+1.8VSUS
E3A:Add R789 for G966_VIN,change
R779
R779
100K/F_4
A A
D2B:Add R778,R780 for +1.2V_VPCIE
VDDCPG 44
MAINON 32,39,42,43,44
PCIEVDDRPG 43
100K/F_4
R780 EV@0_4 R780 EV@0_4
R781 *0_4 R781 *0_4
C972
C972
*.1U-10V_4
*.1U-10V_4
5
source to +1.8VSUS
R789
R789
0_6
0_6
G966_VIN
C729
C729
C198
C198
EV@.1U-10V_4
EV@.1U-10V_4
EV@10U-10V_8
EV@10U-10V_8
4
2
1
EV@G966U9EV@G966
R165 0_4 R165 0_4
C161
C161
C230
C230
EV@1U-6.3V_4
EV@1U-6.3V_4
EV@.1U-10V_4
EV@.1U-10V_4
+2.5V_VDDR25
C260
C260
EV@22U-16V_12
EV@22U-16V_12
R548 EV@45.3K/F_4 R548 EV@45.3K/F_4
4
Y23
BBN_4
K15
BBN_3
R10
BBN_2
AC17
BBN_1
AC14
BBP_4
M23
BBP_3
V10
BBP_2
K18
BBP_1
L10
VDD25_4
K22
VDD25_5
AA10
VDD25_6
C736
C736
EV@.1U-10V_4
EV@.1U-10V_4
U41G
U41G
Forward
Forward
Compatibility
Compatibility
EV@M56-P B13
EV@M56-P B13
PART 7 OF 7
PART 7 OF 7
Control and External SSC
Control and External SSC
LVDS channel
LVDS channel
3
VARY_BL
DIGON
GENERICD
TXCLK_UP
TXCLK_UN
TXOUT_U3P
TXOUT_U3N
TXOUT_U2P
TXOUT_U2N
TXOUT_U1P
TXOUT_U1N
TXOUT_U0P
TXOUT_U0N
TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P
TXOUT_L3N
TXOUT_L3P
TXCLK_LN
TXCLK_LP
RP9 EV@0_4P2R_S RP9 EV@0_4P2R_S
AD12
AE11
AD23
T24T24
AJ21
AK21
AH21
AG21
AG20
AH20
AK20
AJ20
AG18
AH18
AK19
AL19
AL20
AM20
AL21
AM21
AK18
AJ18
AL18
AM18
GENERICD : FOR M56P IT IS A BACK
BIAS REGULATOR CONTROL
4
3
2
1
LVDS_BLON 25
LVDS_DIGON 25
TXUCLKOUT+ 25
TXUCLKOUT- 25
TXUOUT2+ 25
TXUOUT2- 25
TXUOUT1+ 25
TXUOUT1- 25
TXUOUT0+ 25
TXUOUT0- 25
TXLOUT0- 25
TXLOUT0+ 25
TXLOUT1- 25
TXLOUT1+ 25
TXLOUT2- 25
TXLOUT2+ 25
TXLCLKOUT- 25
TXLCLKOUT+ 25
2
Panel power(LCDVCC) control
GENERICD->FOR M56P IT IS A BACK BIAS REGULATOR CONTROL
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
M56P POWER
M56P POWER
M56P POWER
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
of
of
of
20 46 Tuesday, November 29, 2005
20 46 Tuesday, November 29, 2005
1
20 46 Tuesday, November 29, 2005
1A
1A
1A
5
D D
C C
B B
A A
5
4
EV@BLM18PG181SN1D_6
EV@BLM18PG181SN1D_6
4
3
U41F
U41F
AH27
PCIE_VSS_1
AC23
PCIE_VSS_2
AL27
PCIE_VSS_3
R23
PCIE_VSS_4
P25
PCIE_VSS_5
R25
PCIE_VSS_6
T26
PCIE_VSS_7
U26
PCIE_VSS_8
W26
PCIE_VSS_9
Y26
PCIE_VSS_10
AB26
PCIE_VSS_11
AC26
PCIE_VSS_12
AD25
PCIE_VSS_13
AE26
PCIE_VSS_14
AF26
PCIE_VSS_15
AD26
PCIE_VSS_16
AG25
PCIE_VSS_17
AH26
PCIE_VSS_18
AC28
PCIE_VSS_19
Y28
PCIE_VSS_20
U28
PCIE_VSS_21
P28
PCIE_VSS_22
AH29
PCIE_VSS_23
AF28
PCIE_VSS_24
V29
PCIE_VSS_25
AC29
PCIE_VSS_26
W27
PCIE_VSS_27
AB27
PCIE_VSS_28
V26
PCIE_VSS_29
AJ26
PCIE_VSS_30
AJ32
PCIE_VSS_31
AK29
PCIE_VSS_32
P26
PCIE_VSS_33
P29
PCIE_VSS_34
R29
PCIE_VSS_35
T29
PCIE_VSS_36
U29
PCIE_VSS_37
W29
PCIE_VSS_38
Y29
PCIE_VSS_39
AA29
PCIE_VSS_40
AB29
PCIE_VSS_41
AD29
PCIE_VSS_42
AE29
PCIE_VSS_43
AF29
PCIE_VSS_44
AG29
PCIE_VSS_45
AJ29
PCIE_VSS_46
AK26
PCIE_VSS_47
AK30
PCIE_VSS_48
AG26
PCIE_VSS_49
N30
PCIE_VSS_50
R31
PCIE_VSS_51
AF30
PCIE_VSS_52
AC30
PCIE_VSS_53
V31
PCIE_VSS_54
P30
PCIE_VSS_55
AA31
PCIE_VSS_56
U30
PCIE_VSS_57
AD31
PCIE_VSS_58
AK32
PCIE_VSS_59
AJ28
PCIE_VSS_60
Y30
PCIE_VSS_61
AJ30
PCIE_VSS_62
AK31
PCIE_VSS_63
AA23
PCIE_VSS_64
AG31
PCIE_VSS_65
N24
PCIE_VSS_66
AB23
PCIE_VSS_67
P24
PCIE_VSS_68
R24
PCIE_VSS_69
T24
PCIE_VSS_70
U24
PCIE_VSS_71
V24
PCIE_VSS_72
W24
PCIE_VSS_73
Y24
PCIE_VSS_74
AC24
PCIE_VSS_75
AH24
PCIE_VSS_76
V25
PCIE_VSS_77
AA25
PCIE_VSS_78
R26
PCIE_VSS_79
AA26
PCIE_VSS_80
T27
PCIE_VSS_81
AE27
AD10
AF14
AG11
AG16
W23
B1
H1
L1
P1
U1
Y1
AD7
AE8
AL1
A2
AM2
E8
H5
K10
M8
T10
E12
AC9
AD8
C5
F10
J3
L6
M6
P6
AA4
V3
R3
C6
C9
F6
H7
J6
PCIE_VSS_82
PCIE_PVSS
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
EV@M56-P B13
EV@M56-P B13
L27
L27
Part 6 of 7
Part 6 of 7
PCI-Express GND
PCI-Express GND
CORE GND
CORE GND
AD16
VSS_38
AA6
VSS_39
P7
VSS_40
P5
VSS_41
M3
VSS_42
M9
VSS_43
L7
VSS_44
M7
VSS_45
AD17
VSS_46
AH11
VSS_47
A8
VSS_48
U7
VSS_49
C10
VSS_50
E9
VSS_51
F3
VSS_52
J9
VSS_53
N7
VSS_54
N3
VSS_55
Y5
VSS_56
AM13
VSS_57
AC10
VSS_58
Y6
VSS_59
U6
VSS_60
E5
VSS_61
AL13
VSS_62
A11
VSS_63
U8
VSS_64
U9
VSS_65
U10
VSS_66
R6
VSS_67
AD6
VSS_68
V6
VSS_69
AD14
VSS_70
AD13
VSS_71
D11
VSS_72
J12
VSS_73
K12
VSS_74
A13
VSS_75
F13
VSS_76
E13
VSS_77
F15
VSS_78
K16
VSS_79
J21
VSS_80
H16
VSS_81
T15
VSS_82
V17
VSS_83
C15
VSS_84
C4
VSS_85
U14
VSS_86
P15
VSS_87
A16
VSS_88
E16
VSS_89
G13
VSS_90
G16
VSS_91
P17
VSS_92
R16
VSS_93
R14
VSS_94
W16
VSS_95
C18
VSS_96
F16
VSS_97
W18
VSS_98
U18
VSS_99
AE16
VSS_100
AE17
VSS_101
A19
VSS_102
H32
VSS_103
F19
VSS_104
G19
VSS_105
N8
VSS_106
Y7
VSS_107
T19
VSS_108
V19
VSS_109
G21
VSS_110
C21
VSS_111
F21
VSS_112
AE14
VSS_113
AK16
VSS_114
U5
VSS_115
F22
VSS_116
F18
VSS_117
K30
VSS_118
C24
VSS_119
F24
VSS_120
M24
VSS_121
A25
VSS_122
D30
VSS_123
E25
VSS_124
G25
VSS_125
G20
VSS_126
G22
VSS_127
F27
VSS_128
E28
VSS_129
H21
VSS_130
C27
VSS_131
E32
VSS_132
H28
VSS_133
J30
VSS_134
K17
VSS_135
K27
VSS_136
M32
VSS_137
A22
VSS_138
C20
VSS_139
E19
VSS_140
H20
VSS_141
J24
VSS_142
M28
VSS_143
J28
VSS_144
J16
VSS_145
F30
VSS_146
L29
VSS_147
A31
VSS_148
B32
VSS_149
E30
VSS_150
AE15
VSS_151
AG23
VSS_152
AD9
VSS_153
AF16
VSS_154
AH10
VSS_155
AJ10
VSS_156
AD15
VSS_157
AH16
VSS_158
K23
VSS_159
3
2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
M56P 6 OF 7
M56P 6 OF 7
M56P 6 OF 7
Date: Sheet of
Date: Sheet
2
Date: Sheet
1
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
of
of
21 46 Thursday, November 17, 2005
21 46 Thursday, November 17, 2005
1
21 46 Thursday, November 17, 2005
1A
1A
1A
5
Channel A
U41C
M31
M30
L31
L30
H30
G31
G30
F31
M27
M29
L28
L27
J27
H29
G29
G27
M26
L26
M25
L25
J25
G28
H27
H26
F26
G26
H25
H24
H23
H22
J23
J22
E23
D22
D23
E22
E20
F20
D19
D18
B19
B18
C17
B17
C14
B14
C13
B13
D17
E18
E17
F17
E15
E14
F14
D13
H18
H17
G18
G17
G15
G14
H14
J14
C31
C30
U41C
DQA_0
DQA_1
DQA_2
DQA_3
DQA_4
DQA_5
DQA_6
DQA_7
DQA_8
DQA_9
DQA_10
DQA_11
DQA_12
DQA_13
DQA_14
DQA_15
DQA_16
DQA_17
DQA_18
DQA_19
DQA_20
DQA_21
DQA_22
DQA_23
DQA_24
DQA_25
DQA_26
DQA_27
DQA_28
DQA_29
DQA_30
DQA_31
DQA_32
DQA_33
DQA_34
DQA_35
DQA_36
DQA_37
DQA_38
DQA_39
DQA_40
DQA_41
DQA_42
DQA_43
DQA_44
DQA_45
DQA_46
DQA_47
DQA_48
DQA_49
DQA_50
DQA_51
DQA_52
DQA_53
DQA_54
DQA_55
DQA_56
DQA_57
DQA_58
DQA_59
DQA_60
DQA_61
DQA_62
DQA_63
MVREFD_0
MVREFS_0
EV@M56-P B13
EV@M56-P B13
Part 3 of 7
Part 3 of 7
MEMORY INTERFACE A
MEMORY INTERFACE A
MDA[0..63] 23
MDA0
MDA1
MDA2
MDA3
MDA4
D D
C C
VGA_MEM_IO
R194
R194
EV@40.2/F_4
EV@40.2/F_4
VRAM_REF0
C286
C286
R187
R187
EV@.1U-10V_4
EV@.1U-10V_4
EV@100/F_4
EV@100/F_4
VGA_MEM_IO
R189
R189
EV@40.2/F_4
B B
EV@40.2/F_4
VRAM_REF1
C285
C285
R184
R184
EV@.1U-10V_4
EV@.1U-10V_4
EV@100/F_4
EV@100/F_4
Place VRAM_REF0,VRAM_REF1 parts closed M56
Reference voltage per channel (memory data/strobe)
MVREFD_[0:1] (0.7 * VDDR1) (for GDDR3)
MVREFS_[0:1] (0.7 * VDDR1) (for GDDR3)
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9
MAA_10
MAA_11
MAA_12
MAA_13
MAA_14
MAA_15
DQMAb_0
DQMAb_1
DQMAb_2
DQMAb_3
DQMAb_4
DQMAb_5
DQMAb_6
DQMAb_7
QSA_0
QSA_1
QSA_2
QSA_3
QSA_4
QSA_5
QSA_6
QSA_7
QSA_0B
QSA_1B
QSA_2B
QSA_3B
QSA_4B
QSA_5B
QSA_6B
QSA_7B
write strobe read strobe
write strobe read strobe
ODTA
ODTA1
CLKA0
CLKA0b
CKEA0
RASA0b
CASA0b
WEA0b
CSA0b_0
CSA0b_1
CLKA1
CLKA1b
CKEA1
RASA1b
CASA1b
WEA1b
CSA1b_0
CSA1b_1
4
RV410 MEMORY CHANNELS A and B
MAA0
D26
MAA1
F28
MAA2
D28
MAA3
D25
MAA4
E24
MAA5
E26
MAA6
D27
MAA7
F25
MAA8
C26
MAA9
B26
MAA10
D29
MAA11
B27
MAA12
E27
MAA13
E29
MAA14
B25
MAA15
C25
-DQMA0
H31
-DQMA1
J29
-DQMA2
J26
-DQMA3
G23
-DQMA4
E21
-DQMA5
B15
-DQMA6
D14
-DQMA7
J17
J31
K29
K25
F23
D20
B16
D16
H15
K31
K28
K26
G24
D21
C16
D15
J15
F29
D24
D31
E31
B30
B28
C29
B31
B29
C28
B20
C19
C22
B24
B22
B21
B23
C23
RDQSA0
RDQSA1
RDQSA2
RDQSA3
RDQSA4
RDQSA5
RDQSA6
RDQSA7
WDQSA0
WDQSA1
WDQSA2
WDQSA3
WDQSA4
WDQSA5
WDQSA6
WDQSA7
M_CLKA0 23
-M_CLKA0 23
CKEA 23
-RASA 23
-CASA 23
-WEA 23
-CSA0 23
M_CLKA1 23
-M_CLKA1 23
CKEA1 23
-RASA1 23
-CASA1 23
-WEA1 23
-CSAb0 23
MAA[0..15] 23
FOR M56P(Channel A)
PIN B25 IS MA14 (BA0)
PIN C25 IS MA15 (BA1)
PIN E29 IS MA13 (BA2)
PIN E27 IS MA12
MAA12
VGA_MEM_IO
VGA_MEM_IO
3
2
1
Channel B
U41D
MDB[0..63] 23
MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8
MDB9
T25T25
-DQMA[0..7] 23 -DQMB[0..7] 23
RDQSA[0..7] 23
WDQSA[0..7] 23
R97
R97
EV@40.2/F_4
EV@40.2/F_4
VRAM_REF2
R83
R83
C116
C116
EV@100/F_4
EV@100/F_4
R93
R93
EV@40.2/F_4
EV@40.2/F_4
R94
R94
C118
C118
EV@.1U-10V_4
EV@.1U-10V_4
EV@100/F_4
EV@100/F_4
Reference voltage per channel (memory data/strobe)
MVREFD_[0:1] (0.7 * VDDR1) (for GDDR3)
MVREFS_[0:1] (0.7 * VDDR1) (for GDDR3)
VRAM_REF3
MEM_RST 23
EV@.1U-10V_4
EV@.1U-10V_4
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63
TEST_MCLK
TEST_YCLK
R102
R102
R110
R110
R104
R104
NI
EV@4.7K_4
EV@4.7K_4
EV@4.7K_4
EV@4.7K_4
EV@4.7K_4
EV@4.7K_4
U41D
B12
DQB_0
C12
DQB_1
B11
DQB_2
C11
DQB_3
C8
DQB_4
B7
DQB_5
C7
DQB_6
B6
DQB_7
F12
DQB_8
D12
DQB_9
E11
DQB_10
F11
DQB_11
F9
DQB_12
D8
DQB_13
D7
DQB_14
F7
DQB_15
G12
DQB_16
G11
DQB_17
H12
DQB_18
H11
DQB_19
H9
DQB_20
E7
DQB_21
F8
DQB_22
G8
DQB_23
G6
DQB_24
G7
DQB_25
H8
DQB_26
J8
DQB_27
K8
DQB_28
L8
DQB_29
K9
DQB_30
L9
DQB_31
K5
DQB_32
L4
DQB_33
K4
DQB_34
L5
DQB_35
N5
DQB_36
N6
DQB_37
P4
DQB_38
R4
DQB_39
P2
DQB_40
R2
DQB_41
T3
DQB_42
T2
DQB_43
W3
DQB_44
W2
DQB_45
Y3
DQB_46
Y2
DQB_47
T4
DQB_48
R5
DQB_49
T5
DQB_50
T6
DQB_51
V5
DQB_52
W5
DQB_53
W6
DQB_54
Y4
DQB_55
R8
DQB_56
T8
DQB_57
R7
DQB_58
T7
DQB_59
V7
DQB_60
W7
DQB_61
W8
DQB_62
W9
DQB_63
B3
MVREFD_1
C3
MVREFS_1
AA3
DRAM_RST
AA5
TEST_MCLK
AA2
TEST_YCLK
AA7
MEMTEST
R121
R121
EV@M56-P B13
EV@M56-P B13
EV@243/F_4
EV@243/F_4
Part 4 of 7
Part 4 of 7
MAB_0
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8
MAB_9
MAB_10
MAB_11
MAB_12
MAB_13
MAB_14
MAB_15
DQMBb_0
DQMBb_1
DQMBb_2
DQMBb_3
DQMBb_4
DQMBb_5
DQMBb_6
MEMORY INTERFACE B
MEMORY INTERFACE B
DQMBb_7
QSB_0
QSB_1
QSB_2
QSB_3
QSB_4
QSB_5
QSB_6
QSB_7
QSB_0B
QSB_1B
QSB_2B
QSB_3B
QSB_4B
QSB_5B
QSB_6B
QSB_7B
write strobe read strobe
write strobe read strobe
ODTB
ODTB1
CLKB0
CLKB0b
CKEB0
RASB0b
CASB0b
WEB0b
CSB0b_0
CSB0b_1
CLKB1
CLKB1b
CKEB1
RASB1b
CASB1b
WEB1b
CSB1b_0
CSB1b_1
MAB1
E6
MAB2
E4
MAB3
H4
MAB4
J5
MAB5
G5
MAB6
F4
MAB7
H6
MAB8
G3
MAB9
G2
MAB10
D4
MAB11
F2
MAB12
F5
MAB13
D5
MAB14
H2
MAB15
H3
-DQMB0
B8
-DQMB1
D9
-DQMB2
G9
-DQMB3
K7
-DQMB4
M5
-DQMB5
V2
-DQMB6
W4
-DQMB7
T9
RDQSB0
B9
RDQSB1
D10
RDQSB2
H10
RDQSB3
K6
RDQSB4
N4
RDQSB5
U2
RDQSB6
U4
RDQSB7
V8
WDQSB0
B10
WDQSB1
E10
WDQSB2
G10
WDQSB3
J7
WDQSB4
M4
WDQSB5
U3
WDQSB6
V4
WDQSB7
V9
D6
J4
B4
B5
C2
E2
D3
B2
D2
E3
N2
P3
L3
J2
L2
M2
K2
K3
FOR M56P(Channel B)
PIN H2 IS MA14 (BA0)
PIN H3 IS MA15 (BA1)
PIN D5 IS MA13 (BA2)
PIN F5 IS MAB12
M_CLKB0 23
-M_CLKB0 23
CKEB 23
-RASB 23
-CASB 23
-WEB 23
-CSB0 23
M_CLKB1 23
-M_CLKB1 23
CKEB1 23
-RASB1 23
-CASB1 23
-WEB1 23
-CSBb0 23
MAB0
G4
MAB12
MAB[0..15] 23
T9T9
RDQSB[0..7] 23
WDQSB[0..7] 23
A A
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
M56P 3/4 OF 7
M56P 3/4 OF 7
M56P 3/4 OF 7
Date: Sheet of
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
of
of
22 46 Monday, November 28, 2005
22 46 Monday, November 28, 2005
1
22 46 Monday, November 28, 2005
1A
1A
1A
5
-DQMA[0..7] 22
RDQSA[0..7] 22
WDQSA[0..7] 22
MDA[0..63] 22
U10
MDA31
MDA29
MDA28
MDA30
MDA24 MDB27
MDA27
MDA25
MDA26
M_CLKA0 22
R149
R149
EV@2.37K_4
EV@2.37K_4
C227
C227
-CSA0 22
-WEA22
-RASA 22
-CASA 22
CKEA22
-M_CLKA0 22
VREF = .72*VDDQ
VGA_MEM_IO
R201
R201
EV@2.37K_4
EV@2.37K_4
VREF = .72*VDDQ
C311
C311
EV@.1U-10V_4
EV@.1U-10V_4
MDA9
MDA13
MDA10
MDA14
MDA8
MDA11
MDA12
MDA15
MDA2
MDA7
MDA5
MDA0
MDA1
MDA6
MDA3
MDA4
MDA19
MDA18
MDA23
MDA20
MDA16
MDA21
MDA22
MDA17
DDR3_VREF0
DDR3_VREF#0
D D
IN ORDER TO USE
DDR3 VENDOR/REVISION
ID FEATURE
MEMORY DQ[7:0] MUST
CONNECT TO EITHER
MDA[7:0] OR MDA[15:8]
C C
VGA_MEM_IO
R150
R150
EV@.1U-10V_4
EV@.1U-10V_4
EV@5.49K/F_4
EV@5.49K/F_4
R202
R202
B B
EV@5.49K/F_4
EV@5.49K/F_4
PLACE MVREF DIVIDERS
AND CAPS CLOSE TO ASIC
U10
T3
DQ31 | DQ23
T2
DQ30 | DQ22
R3
DQ29 | DQ21
R2
DQ28 | DQ20
M3
DQ27 | DQ19
N2
DQ26 | DQ18
L3
DQ25 | DQ17
M2
DQ24 | DQ16
T10
DQ23 | DQ31
T11
DQ22 | DQ30
R10
DQ21 | DQ29
R11
DQ20 | DQ28
M10
DQ19 | DQ27
N11
DQ18 | DQ26
L10
DQ17 | DQ25
M11
DQ16 | DQ24
G10
DQ15 | DQ7
F11
DQ14 | DQ6
F10
DQ13 | DQ5
E11
DQ12 | DQ4
C10
DQ11 | DQ3
C11
DQ10 | DQ2
B10
DQ9 | DQ1
B11
DQ8 | DQ0
G3
DQ7 | DQ15
F2
DQ6 | DQ14
F3
DQ5 | DQ13
E2
DQ4 | DQ12
C3
DQ3 | DQ11
C2
DQ2 | DQ10
B3
DQ1 | DQ9
B2
DQ0 | DQ8
BA2
H10
BA2 | RAS
BA1
G9
BA1 | BA0
BA0
G4
BA0 | BA1
MAA11
L4
A11 | A7
MAA10
K2
A10 | A8
MAA9
M9
A9 | A3
MAA8
K11
A8/AP | A10
MAA7
L9
A7 | A11
MAA6
K10
A6 | A2
MAA5
H11
A5 | A1
MAA4
K9
A4 | A0
M4
A3 | A9
MAA2
K3
A2 | A6
MAA1
H2
A1 | A5
MAA0
K4
A0 | A4
-CSA0
F9
CS | CAS
-WEA
H9
WE | CKE
-RASA
H3
RAS | BA2
-CASA
F4
CAS | CS
CKEA
H4
CKE | WE
-M_CLKA0
J10
CK
M_CLKA0
J11
CK
RDQSA3
P3
RDQS3 | RDQS2
RDQSA1
P10
RDQS2 | RDQS3
RDQSA0
D10
RDQS1 | RDQS0
RDQSA2
D3
RDQS0 | RDQS1
WDQSA3
P2
WDQS3 | WDQS2
WDQSA1
P11
WDQS2 | WDQS3
WDQSA0
D11
WDQS1 | WDQS0
WDQSA2
D2
WDQS0 | WDQS1
-DQMA3
N3
DM3 | DM2
-DQMA1
N10
DM2 | DM3
-DQMA0
E10
DM1 | DM0
-DQMA2
E3
DM0 | DM1
MEM_RST
V9
RESET
EV@243/F_4 R151 EV@243/F_4 R151
A4
ZQ
H1
VREF
H12
VREF#H12
136 FBGA
EV@GDDR3-512M(500MHZ)
EV@GDDR3-512M(500MHZ)
M54/M52: BA0, 1, 2=MA12, 13, 15
M56: BA0, 1, 2=MA14, 15, 13
MAA14 BA0
R144 EV@0_4 R144 EV@0_4
1 2
MAA15 BA1
R140 EV@0_4 R140 EV@0_4
1 2
MAA13 BA2
1 2
R148 EV@0_4 R148 EV@0_4
VGA_MEM_IO
+1.8V
MAA[0..15] 22
A1
VDDQ
A12
VDDQ#A12
C1
VDDQ#C1
C4
VDDQ#C4
C9
VDDQ#C9
C12
VDDQ#C12
E1
VDDQ#E1
E4
VDDQ#E4
E9
VDDQ#E9
E12
VDDQ#E12
J4
VDDQ#J4
J9
VDDQ#J9
N1
VDDQ#N1
N4
VDDQ#N4
N9
VDDQ#N9
N12
VDDQ#N12
R1
VDDQ#R1
R4
VDDQ#R4
R9
VDDQ#R9
R12
VDDQ#R12
V1
VDDQ#V1
V12
VDDQ#V12
A2
VDD
A11
VDD#A11
F1
VDD#F1
F12
VDD#F12
M1
VDD#M1
M12
VDD#M12
V2
VDD#V2
V11
VDD#V11
B1
VSSQ
B4
VSSQ#B4
B9
VSSQ#B9
B12
VSSQ#B12
D1
VSSQ#D1
D4
VSSQ#D4
D9
VSSQ#D9
D12
VSSQ#D12
G2
VSSQ#G2
G11
VSSQ#G11
L2
VSSQ#L2
L11
VSSQ#L11
P1
VSSQ#P1
P4
VSSQ#P4
P9
VSSQ#P9
P12
VSSQ#P12
T1
VSSQ#T1
T4
VSSQ#T4
T9
VSSQ#T9
T12
VSSQ#T12
A3
VSS
A10
VSS#A10
G1
VSS#G1
G12
VSS#G12
L1
VSS#L1
L12
VSS#L12
V3
VSS#V3
V10
VSS#V10
K1
VDDA
K12
VDDA#K12
C310
C310
EV@.1U-10V_4
EV@.1U-10V_4
J12
VSSA#J12
J1
VSSA
J3
RFU2
J2
RFU1
V4
RFU0
A9
MF
GND | VDD
GND | VDD
PLACE VREF DIVIDER AND CAP
CLOSE TO MEMORY
GDDR3_VDDA0
GDDR3_VDDA#0
C226
C226
EV@.1U-10V_4
EV@.1U-10V_4
R195 EV@0_4 R195 EV@0_4
1 2
136 FBGA(NORMAL)
VGA_MEM_IO
C762 EV@.022U-16V_4 C762 EV@.022U-16V_4
C740 EV@.022U-16V_4 C740 EV@.022U-16V_4
C760 EV@.022U-16V_4 C760 EV@.022U-16V_4
C759 EV@.022U-16V_4 C759 EV@.022U-16V_4
C735 EV@.022U-16V_4 C735 EV@.022U-16V_4
C228 EV@.022U-16V_4 C228 EV@.022U-16V_4
C761 EV@.022U-16V_4 C761 EV@.022U-16V_4
C737 EV@.022U-16V_4 C737 EV@.022U-16V_4
C280 EV@.022U-16V_4 C280 EV@.022U-16V_4
C268 EV@10U-10V_8 C268 EV@10U-10V_8
C306 EV@22U-10V_8 C306 EV@22U-10V_8
C763 EV@220P-50V_4 C763 EV@220P-50V_4
C273 EV@4700P-25V_4 C273 EV@4700P-25V_4
C229 EV@.1U-10V_4 C229 EV@.1U-10V_4
C216 EV@10U-10V_8 C216 EV@10U-10V_8
C179 EV@22U-10V_8 C179 EV@22U-10V_8
VGA_MEM_IO
L25 EV@BLM18PG181SN1D_6 L25 EV@BLM18PG181SN1D_6
L31 EV@BLM18PG181SN1D_6 L31 EV@BLM18PG181SN1D_6
Memory
decoupling
-CSAb0 22
-WEA1 22 -WEB1 22
-RASA1 22
-CASA1 22
CKEA1 22
-M_CLKA1 22
M_CLKA1 22
A1A:Change -DQMA4~7 pin define
R136
R136
EV@2.37K_4
EV@2.37K_4
VREF = .72*VDDQ
C168
C168
R135
R135
EV@.1U-10V_4
EV@.1U-10V_4
EV@5.49K/F_4
EV@5.49K/F_4
R90
R90
EV@5.49K/F_4
EV@5.49K/F_4
B1B:Remove JP5,connect +1.8V to VGA_MEM_IO
A A
4
3
2
256/512 Mbit GDDRIII Channels A and B Rank 1
U40
MDA41
MDA43
MDA40
MDA42
MDA45
MDA44
MDA47
MDA46
MDA53
MDA52
MDA54
MDA55
MDA50
MDA51
MDA49
MDA48
MDA58
MDA56
MDA57
MDA59
MDA62
MDA61
MDA60
MDA63
MDA34
MDA33
MDA32
MDA35
MDA37
MDA38
MDA36
MDA39
MEM_RST 22
VGA_MEM_IO VGA_MEM_IO
R89
R89
EV@2.37K_4
EV@2.37K_4
DDR3_VREF#1
VREF = .72*VDDQ
C117
C117
EV@.1U-10V_4
EV@.1U-10V_4
U40
T3
DQ31 | DQ23
T2
DQ30 | DQ22
R3
DQ29 | DQ21
R2
DQ28 | DQ20
M3
DQ27 | DQ19
N2
DQ26 | DQ18
L3
DQ25 | DQ17
M2
DQ24 | DQ16
T10
DQ23 | DQ31
T11
DQ22 | DQ30
R10
DQ21 | DQ29
R11
DQ20 | DQ28
M10
DQ19 | DQ27
N11
DQ18 | DQ26
L10
DQ17 | DQ25
M11
DQ16 | DQ24
G10
DQ15 | DQ7
F11
DQ14 | DQ6
F10
DQ13 | DQ5
E11
DQ12 | DQ4
C10
DQ11 | DQ3
C11
DQ10 | DQ2
B10
DQ9 | DQ1
B11
DQ8 | DQ0
G3
DQ7 | DQ15
F2
DQ6 | DQ14
F3
DQ5 | DQ13
E2
DQ4 | DQ12
C3
DQ3 | DQ11
C2
DQ2 | DQ10
B3
DQ1 | DQ9
B2
DQ0 | DQ8
BA2
H10
BA2 | RAS
BA1
G9
BA1 | BA0
BA0
G4
BA0 | BA1
MAA11
L4
A11 | A7
MAA10
K2
A10 | A8
MAA9
M9
A9 | A3
MAA8
K11
A8/AP | A10
MAA7
L9
A7 | A11
MAA6
K10
A6 | A2
H11
A5 | A1
MAA4
K9
A4 | A0
MAA3
M4
A3 | A9
MAA2 MAA3
K3
A2 | A6
MAA1
H2
A1 | A5
MAA0
K4
A0 | A4
F9
CS | CAS
H9
WE | CKE
H3
RAS | BA2
F4
CAS | CS
H4
CKE | WE
J10
CK
J11
CK
RDQSA5
P3
RDQS3 | RDQS2
RDQSA6
P10
RDQS2 | RDQS3
RDQSA7
D10
RDQS1 | RDQS0
RDQSA4
D3
RDQS0 | RDQS1
WDQSA5
P2
WDQS3 | WDQS2
WDQSA6
P11
WDQS2 | WDQS3
WDQSA7
D11
WDQS1 | WDQS0
WDQSA4
D2
WDQS0 | WDQS1
-DQMA5
N3
DM3 | DM2
-DQMA6
N10
DM2 | DM3
-DQMA7
E10
DM1 | DM0
-DQMA4
E3
DM0 | DM1
MEM_RST
V9
RESET
EV@243/F_4 R119 EV@243/F_4 R119
A4
ZQ
DDR3_VREF1
H1
VREF
H12
VREF#H12
136 FBGA 136 FBGA
EV@GDDR3-512M(500MHZ)
EV@GDDR3-512M(500MHZ)
-RASB 22
-RASB1 22
-CASB 22
-CASB1 22
-WEB22
-WEB1 22
-CSB0 22
-CSBb0 22
CKEB22
CKEB1 22
-M_CLKB0 22
M_CLKB0 22
-M_CLKB1 22
M_CLKB1 22
A1
VDDQ
A12
VDDQ#A12
C1
VDDQ#C1
C4
VDDQ#C4
C9
VDDQ#C9
C12
VDDQ#C12
E1
VDDQ#E1
E4
VDDQ#E4
E9
VDDQ#E9
E12
VDDQ#E12
J4
VDDQ#J4
J9
VDDQ#J9
N1
VDDQ#N1
N4
VDDQ#N4
N9
VDDQ#N9
N12
VDDQ#N12
R1
VDDQ#R1
R4
VDDQ#R4
R9
VDDQ#R9
R12
VDDQ#R12
V1
VDDQ#V1
V12
VDDQ#V12
A2
VDD
A11
VDD#A11
F1
VDD#F1
F12
VDD#F12
M1
VDD#M1
M12
VDD#M12
V2
VDD#V2
V11
VDD#V11
B1
VSSQ
B4
VSSQ#B4
B9
VSSQ#B9
B12
VSSQ#B12
D1
VSSQ#D1
D4
VSSQ#D4
D9
VSSQ#D9
D12
VSSQ#D12
G2
VSSQ#G2
G11
VSSQ#G11
L2
VSSQ#L2
L11
VSSQ#L11
P1
VSSQ#P1
P4
VSSQ#P4
P9
VSSQ#P9
P12
VSSQ#P12
T1
VSSQ#T1
T4
VSSQ#T4
T9
VSSQ#T9
T12
VSSQ#T12
A3
VSS
A10
VSS#A10
G1
VSS#G1
G12
VSS#G12
L1
VSS#L1
L12
VSS#L12
V3
VSS#V3
V10
VSS#V10
K1
VDDA
K12
VDDA#K12
C125
C125
EV@.1U-10V_4
EV@.1U-10V_4
J12
VSSA#J12
J1
VSSA
J3
RFU2
J2
RFU1
V4
RFU0
A9
MF
GND | VDD
GND | VDD
120 ohm pullups are required on m26x and m56p
control signals.They are not required on M52p,m54p
EV@120/F_4 R64 EV@120/F_4 R64
EV@120/F_4 R70 EV@120/F_4 R70
EV@120/F_4 R65 EV@120/F_4 R65
EV@120/F_4 R68 EV@120/F_4 R68
EV@120/F_4 R62 EV@120/F_4 R62
EV@120/F_4 R71 EV@120/F_4 R71
EV@120/F_4 R61 EV@120/F_4 R61
EV@120/F_4 R72 EV@120/F_4 R72
EV@120/F_4 R63 EV@120/F_4 R63
EV@120/F_4 R69 EV@120/F_4 R69
EV@60.4/F_4 R76 EV@60.4/F_4 R76
EV@60.4/F_4 R78 EV@60.4/F_4 R78
EV@60.4/F_4 R528 EV@60.4/F_4 R528
EV@60.4/F_4 R525 EV@60.4/F_4 R525
Use 60 ohm pull-up to VDDQ on memory side(CLOCK)
Pull up resistor must be
close to the memory side
VGA_MEM_IO VGA_MEM_IO VGA_MEM_IO
C155 EV@.022U-16V_4 C155 EV@.022U-16V_4
C147 EV@.022U-16V_4 C147 EV@.022U-16V_4
C128 EV@.022U-16V_4 C128 EV@.022U-16V_4
C146 EV@.022U-16V_4 C146 EV@.022U-16V_4
C123 EV@.022U-16V_4 C123 EV@.022U-16V_4
C144 EV@.022U-16V_4 C144 EV@.022U-16V_4
C135 EV@.022U-16V_4 C135 EV@.022U-16V_4
C173 EV@.022U-16V_4 C173 EV@.022U-16V_4
C167 EV@10U-10V_8 C167 EV@10U-10V_8
C165 EV@22U-10V_8 C165 EV@22U-10V_8
C132 EV@220P-50V_4 C132 EV@220P-50V_4
C136 EV@4700P-25V_4 C136 EV@4700P-25V_4
C149 EV@.1U-10V_4 C149 EV@.1U-10V_4
C126 EV@10U-10V_8 C126 EV@10U-10V_8
C159 EV@22U-10V_8 C159 EV@22U-10V_8
VGA_MEM_IO VGA_MEM_IO VGA_MEM_IO
GDDR3_VDDA1
GDDR3_VDDA#1
L18 EV@BLM18PG181SN1D_6 L18 EV@BLM18PG181SN1D_6
C154
C154
EV@.1U-10V_4
EV@.1U-10V_4
VGA_MEM_IO
R115 EV@0_4 R115 EV@0_4
1 2
136 FBGA(NORMAL)
VGA_MEM_IO VGA_MEM_IO
-RASA 22
-RASA1 22
-CASA 22
-CASA1 22
-WEA22
-WEA1 22
-CSA0 22
-CSAb0 22
CKEA22
CKEA1 22
M_CLKA0 22
-M_CLKA0 22
M_CLKA1 22
-M_CLKA1 22
EV@120/F_4 R183 EV@120/F_4 R183
EV@120/F_4 R86 EV@120/F_4 R86
EV@120/F_4 R179 EV@120/F_4 R179
EV@120/F_4 R84 EV@120/F_4 R84
EV@120/F_4 R188 EV@120/F_4 R188
EV@120/F_4 R87 EV@120/F_4 R87
EV@120/F_4 R190 EV@120/F_4 R190
EV@120/F_4 R88 EV@120/F_4 R88
EV@120/F_4 R180 EV@120/F_4 R180
EV@120/F_4 R85 EV@120/F_4 R85
EV@60.4/F_4 R204 EV@60.4/F_4 R204
EV@60.4/F_4 R203 EV@60.4/F_4 R203
EV@60.4/F_4 R91 EV@60.4/F_4 R91
EV@60.4/F_4 R92 EV@60.4/F_4 R92
EV@5.49K/F_4
EV@5.49K/F_4
R74
R74
R526
R526
EV@5.49K/F_4
EV@5.49K/F_4
-CSB0 22
-WEB22
-RASB 22
-CASB 22
CKEB22
-M_CLKB0 22
M_CLKB0 22
R75
R75
EV@2.37K_4
EV@2.37K_4
VREF = .72*VDDQ
C101
C101
EV@.1U-10V_4
EV@.1U-10V_4
VGA_MEM_IO
R523
R523
EV@2.37K_4
EV@2.37K_4
VREF = .72*VDDQ
C711
C711
EV@.1U-10V_4
EV@.1U-10V_4
MDB29
MDB28
MDB31
MDB30
MDB25
MDB26
MDB24
MDB7
MDB4
MDB6
MDB5
MDB1
MDB3
MDB2
MDB0
MDB15
MDB13
MDB14
MDB12
MDB10
MDB11
MDB9
MDB8
MDB20
MDB23
MDB22
MDB21
MDB16
MDB17
MDB18
MDB19
U37
U37
T3
DQ31 | DQ23
T2
R3
R2
M3
N2
L3
M2
T10
T11
R10
R11
M10
N11
L10
M11
G10
F11
F10
E11
C10
C11
B10
B11
G3
F2
F3
E2
C3
C2
B3
B2
BBA2
H10
BBA1
G9
BBA0
G4
MAB11
L4
MAB10
K2
MAB9
M9
MAB8
K11
MAB7
L9
MAB6
K10
MAB5 MAA5
H11
MAB4
K9
MAB3
M4
MAB2
K3
MAB1
H2
MAB0
K4
CSB0_0#
F9
WEB0#
H9
RASB0#
H3
CASB0#
F4
CKEB0
H4
CLKB0#
J10
CLKB0
J11
RDQSB3
P3
RDQSB0
P10
RDQSB1
D10
RDQSB2
D3
WDQSB3
P2
WDQSB0
P11
WDQSB1
D11
WDQSB2
D2
-DQMB3
N3
-DQMB0
N10
-DQMB1
E10
-DQMB2
E3
MEM_RST
V9
R66
R66
A4
EV@243/F_4
EV@243/F_4
DDR3_VREF2
H1
H12
DDR3_VREF#2
M54/M52: BA0, 1, 2=MA12, 13, 15
M56: BA0, 1, 2=MA14, 15, 13
VDDQ
DQ30 | DQ22
VDDQ#A12
DQ29 | DQ21
VDDQ#C1
DQ28 | DQ20
VDDQ#C4
DQ27 | DQ19
VDDQ#C9
DQ26 | DQ18
VDDQ#C12
DQ25 | DQ17
VDDQ#E1
DQ24 | DQ16
VDDQ#E4
DQ23 | DQ31
VDDQ#E9
DQ22 | DQ30
VDDQ#E12
DQ21 | DQ29
VDDQ#J4
DQ20 | DQ28
VDDQ#J9
DQ19 | DQ27
VDDQ#N1
DQ18 | DQ26
VDDQ#N4
DQ17 | DQ25
VDDQ#N9
DQ16 | DQ24
VDDQ#N12
DQ15 | DQ7
VDDQ#R1
DQ14 | DQ6
VDDQ#R4
DQ13 | DQ5
VDDQ#R9
DQ12 | DQ4
VDDQ#R12
DQ11 | DQ3
VDDQ#V1
DQ10 | DQ2
VDDQ#V12
DQ9 | DQ1
DQ8 | DQ0
VDD
DQ7 | DQ15
VDD#A11
DQ6 | DQ14
VDD#F1
DQ5 | DQ13
VDD#F12
DQ4 | DQ12
VDD#M1
DQ3 | DQ11
VDD#M12
DQ2 | DQ10
VDD#V2
DQ1 | DQ9
VDD#V11
DQ0 | DQ8
VSSQ
VSSQ#B4
VSSQ#B9
BA2 | RAS
BA1 | BA0
VSSQ#B12
BA0 | BA1
VSSQ#D1
VSSQ#D4
A11 | A7
VSSQ#D9
A10 | A8
VSSQ#D12
A9 | A3
VSSQ#G2
A8/AP | A10
VSSQ#G11
A7 | A11
VSSQ#L2
A6 | A2
VSSQ#L11
A5 | A1
VSSQ#P1
A4 | A0
VSSQ#P4
A3 | A9
VSSQ#P9
A2 | A6
VSSQ#P12
A1 | A5
VSSQ#T1
A0 | A4
VSSQ#T4
VSSQ#T9
CS | CAS
VSSQ#T12
VSS
WE | CKE
VSS#A10
VSS#G1
RAS | BA2
VSS#G12
VSS#L1
CAS | CS
VSS#L12
VSS#V3
CKE | WE
VSS#V10
CK
CK
VDDA
VDDA#K12
RDQS3 | RDQS2
RDQS2 | RDQS3
RDQS1 | RDQS0
RDQS0 | RDQS1
WDQS3 | WDQS2
WDQS2 | WDQS3
WDQS1 | WDQS0
WDQS0 | WDQS1
DM3 | DM2
DM2 | DM3
DM1 | DM0
DM0 | DM1
RESET
ZQ
VREF
VREF#H12
136 FBGA
EV@GDDR3-512M(500MHZ)
EV@GDDR3-512M(500MHZ)
MAB15 BBA1
MAB13 BBA2
VSSA#J12
VSSA
RFU2
RFU1
RFU0
MF
GND | VDD
GND | VDD
PLACE VREF DIVIDER AND CAP
CLOSE TO MEMORY
R79 EV@0_4 R79 EV@0_4
1 2
R77 EV@0_4 R77 EV@0_4
1 2
R527 EV@0_4 R527 EV@0_4
1 2
C102
C102
EV@.1U-10V_4
EV@.1U-10V_4
A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12
A2
A11
F1
F12
M1
M12
V2
V11
B1
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
A3
A10
G1
G12
L1
L12
V3
V10
GDDR3_VDDA2
K1
GDDR3_VDDA#2
K12
J12
J1
J3
J2
V4
R60 EV@0_4 R60 EV@0_4
A9
1 2
136 FBGA(NORMAL) 136 FBGA(NORMAL)
C705 EV@.022U-16V_4 C705 EV@.022U-16V_4
C109 EV@.022U-16V_4 C109 EV@.022U-16V_4
C100 EV@.022U-16V_4 C100 EV@.022U-16V_4
C106 EV@.022U-16V_4 C106 EV@.022U-16V_4
C94 EV@22U-10V_8 C94 EV@22U-10V_8
C96 EV@.022U-16V_4 C96 EV@.022U-16V_4
C700 EV@10U-10V_8 C700 EV@10U-10V_8
C707 EV@.022U-16V_4 C707 EV@.022U-16V_4
C714 EV@.022U-16V_4 C714 EV@.022U-16V_4
C95 EV@220P-50V_4 C95 EV@220P-50V_4
C709 EV@4700P-25V_4 C709 EV@4700P-25V_4
C704 EV@.1U-10V_4 C704 EV@.1U-10V_4
C92 EV@10U-10V_8 C92 EV@10U-10V_8
C107 EV@22U-10V_8 C107 EV@22U-10V_8
C716 EV@.022U-16V_4 C716 EV@.022U-16V_4
A1A:Change channel B pin define
L16 EV@BLM18PG181SN1D_6 L16 EV@BLM18PG181SN1D_6 L23 EV@BLM18PG181SN1D_6 L23 EV@BLM18PG181SN1D_6
L15 EV@BLM18PG181SN1D_6 L15 EV@BLM18PG181SN1D_6
C103
C103
EV@.1U-10V_4
EV@.1U-10V_4
R522
R522
EV@5.49K/F_4
EV@5.49K/F_4
BBA0 MAB14
VGA_MEM_IO VGA_MEM_IO
EV@5.49K/F_4
EV@5.49K/F_4
R520
R520
EV@2.37K_4
EV@2.37K_4
C710
C710
EV@.1U-10V_4
EV@.1U-10V_4
R524
R524
-CSBb0 22
-RASB1 22
-CASB1 22
CKEB1 22
-M_CLKB1 22
M_CLKB1 22
VREF = .72*VDDQ
-DQMB[0..7] 22
RDQSB[0..7] 22
WDQSB[0..7] 22
MDB[0..63] 22
MAB[0..15] 22
R521
R521
EV@2.37K_4
EV@2.37K_4
VREF = .72*VDDQ
C708
C708
EV@.1U-10V_4
EV@.1U-10V_4
MDB38
MDB34
MDB39
MDB33
MDB32
MDB35
MDB37
MDB36
MDB62
MDB63
MDB60
MDB61
MDB58
MDB59
MDB57
MDB56
MDB52
MDB53
MDB55
MDB54
MDB50
MDB51
MDB48
MDB49
MDB41
MDB43
MDB42
MDB40
MDB45
MDB44
MDB47
MDB46
BBA2
BBA1
BBA0
MAB11
MAB10
MAB9
MAB8
MAB7
MAB6
MAB5
MAB4
MAB3
MAB2
MAB1
MAB0
RDQSB4
RDQSB7
RDQSB6
RDQSB5
WDQSB4
WDQSB7
WDQSB6
WDQSB5
-DQMB4
-DQMB7
-DQMB6
-DQMB5
MEM_RST
DDR3_VREF3
DDR3_VREF#3
R67
R67
EV@243/F_4
EV@243/F_4
U6
U6
T3
DQ31 | DQ23
T2
DQ30 | DQ22
R3
DQ29 | DQ21
R2
DQ28 | DQ20
M3
DQ27 | DQ19
N2
DQ26 | DQ18
L3
DQ25 | DQ17
M2
DQ24 | DQ16
T10
DQ23 | DQ31
T11
DQ22 | DQ30
R10
DQ21 | DQ29
R11
DQ20 | DQ28
M10
DQ19 | DQ27
N11
DQ18 | DQ26
L10
DQ17 | DQ25
M11
DQ16 | DQ24
G10
DQ15 | DQ7
F11
DQ14 | DQ6
F10
DQ13 | DQ5
E11
DQ12 | DQ4
C10
DQ11 | DQ3
C11
DQ10 | DQ2
B10
DQ9 | DQ1
B11
DQ8 | DQ0
G3
DQ7 | DQ15
F2
DQ6 | DQ14
F3
DQ5 | DQ13
E2
DQ4 | DQ12
C3
DQ3 | DQ11
C2
DQ2 | DQ10
B3
DQ1 | DQ9
B2
DQ0 | DQ8
H10
BA2 | RAS
G9
BA1 | BA0
G4
BA0 | BA1
L4
A11 | A7
K2
A10 | A8
M9
A9 | A3
K11
A8/AP | A10
L9
A7 | A11
K10
A6 | A2
H11
A5 | A1
K9
A4 | A0
M4
A3 | A9
K3
A2 | A6
H2
A1 | A5
K4
A0 | A4
F9
CS | CAS
H9
WE | CKE
H3
RAS | BA2
F4
CAS | CS
H4
CKE | WE
J10
CK
J11
CK
P3
RDQS3 | RDQS2
P10
RDQS2 | RDQS3
D10
RDQS1 | RDQS0
D3
RDQS0 | RDQS1
P2
WDQS3 | WDQS2
P11
WDQS2 | WDQS3
D11
WDQS1 | WDQS0
D2
WDQS0 | WDQS1
N3
DM3 | DM2
N10
DM2 | DM3
E10
DM1 | DM0
E3
DM0 | DM1
V9
RESET
A4
ZQ
H1
VREF
H12
VREF#H12
EV@GDDR3-512M(500MHZ)
EV@GDDR3-512M(500MHZ)
A1
VDDQ
A12
VDDQ#A12
C1
VDDQ#C1
C4
VDDQ#C4
C9
VDDQ#C9
C12
VDDQ#C12
E1
VDDQ#E1
E4
VDDQ#E4
E9
VDDQ#E9
E12
VDDQ#E12
J4
VDDQ#J4
J9
VDDQ#J9
N1
VDDQ#N1
N4
VDDQ#N4
N9
VDDQ#N9
N12
VDDQ#N12
R1
VDDQ#R1
R4
VDDQ#R4
R9
VDDQ#R9
R12
VDDQ#R12
V1
VDDQ#V1
V12
VDDQ#V12
A2
VDD
A11
VDD#A11
F1
VDD#F1
F12
VDD#F12
M1
VDD#M1
M12
VDD#M12
V2
VDD#V2
V11
VDD#V11
B1
VSSQ
B4
VSSQ#B4
B9
VSSQ#B9
B12
VSSQ#B12
D1
VSSQ#D1
D4
VSSQ#D4
D9
VSSQ#D9
D12
VSSQ#D12
G2
VSSQ#G2
G11
VSSQ#G11
L2
VSSQ#L2
L11
VSSQ#L11
P1
VSSQ#P1
P4
VSSQ#P4
P9
VSSQ#P9
P12
VSSQ#P12
T1
VSSQ#T1
T4
VSSQ#T4
T9
VSSQ#T9
T12
VSSQ#T12
A3
VSS
A10
VSS#A10
G1
VSS#G1
G12
VSS#G12
L1
VSS#L1
L12
VSS#L12
V3
VSS#V3
V10
VSS#V10
GDDR3_VDDA3
K1
VDDA
GDDR3_VDDA#3
K12
VDDA#K12
C713
C713
EV@.1U-10V_4
EV@.1U-10V_4
J12
VSSA#J12
J1
VSSA
J3
RFU2
J2
RFU1
V4
RFU0
R73 EV@0_4 R73 EV@0_4
1 2
A9
MF
GND | VDD
GND | VDD
CHAN B DDR3 136BGA 16MX32 MEMORY
(OPTIONAL MIRRORED LAYOUT
EXAMPLE)
C99 EV@.022U-16V_4 C99 EV@.022U-16V_4 C98 EV@.022U-16V_4 C98 EV@.022U-16V_4
C105 EV@.022U-16V_4 C105 EV@.022U-16V_4
C97 EV@.022U-16V_4 C97 EV@.022U-16V_4 C158 EV@.022U-16V_4 C158 EV@.022U-16V_4
C718 EV@.022U-16V_4 C718 EV@.022U-16V_4
C702 EV@.022U-16V_4 C702 EV@.022U-16V_4
C701 EV@22U-10V_8 C701 EV@22U-10V_8
C111 EV@10U-10V_8 C111 EV@10U-10V_8
C703 EV@.022U-16V_4 C703 EV@.022U-16V_4
C110 EV@.022U-16V_4 C110 EV@.022U-16V_4
C108 EV@.022U-16V_4 C108 EV@.022U-16V_4
C104 EV@220P-50V_4 C104 EV@220P-50V_4
C715 EV@4700P-25V_4 C715 EV@4700P-25V_4
C717 EV@.1U-10V_4 C717 EV@.1U-10V_4
C719 EV@10U-10V_8 C719 EV@10U-10V_8
C93 EV@22U-10V_8 C93 EV@22U-10V_8
C706 EV@.022U-16V_4 C706 EV@.022U-16V_4
L54 EV@BLM18PG181SN1D_6 L54 EV@BLM18PG181SN1D_6
L55 EV@BLM18PG181SN1D_6 L55 EV@BLM18PG181SN1D_6
C712
C712
EV@.1U-10V_4
EV@.1U-10V_4
AKD5FW-T513 SAMSUNG GDDR3 (512M) LF
AKD5JW-T503 SAMSUNG GDDR3 (256M)
AKD5FWBT^00 Infineon GDDR3(512M)
1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
VGA(VEDIO MEM A&B-DDR3)
VGA(VEDIO MEM A&B-DDR3)
VGA(VEDIO MEM A&B-DDR3)
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
23 46 Monday, November 28, 2005
23 46 Monday, November 28, 2005
23 46 Monday, November 28, 2005
of
of
of
1A
1A
1A
1
GPIO[13..0] 19
GPIO[13..0]
Overlap pads to save space
2
OPTION STRAPS
GPIO_[13:0] have internal PD
A1A:Change GPIO0 to high
GPIO0
GPIO1
R109 EV@10K_4 R109 EV@10K_4
R536 EV@10K_4 R536 EV@10K_4
3
+3V
M56-P Strap
STRAPS RECOMMENDED
STRAP_B_PTX_PWRS_ENB
GPIO0
4
DESCRIPTION OF RECOMMENDED SETTING PIN
TRANSMITTER POWER SAVINGS ENABLE
- FULL TX OUTPUT SWING
5
6
INSTALL
10K RESISTOR
7
8
and to prevent assembly of
both resistors.
A A
Layout
High logic voltage Ground
Signal
Add Text "Populate to Enable Debug"
Beside JU23 on Silkscreen.
BOM
B B
GPIO[13:12] = 00:128M memory aperture
GPIO[13:12] = 01:256M memory aperture
GPIO[13:12] = 10:64M memory aperture
GPIO[13:12] = 11:Reversed
VSYNC_DAC1 19,26
HSYNC_DAC1 19,26
GPIO26
MEMTYP_0 19
GPIO25
MEMTYP_1 19
GENERICC 19
C C
BOM
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO8
GPIO9
GPIO11
GPIO12
GPIO13
Memory ID
R537 *10K_4 R537 *10K_4
R103 *10K_4 R103 *10K_4
B1B:Stuff R540 for GPIO5
R539 *10K_4 R539 *10K_4
R540 10K_4 R540 10K_4
R538 *10K_4 R538 *10K_4
R117 *10K_4 R117 *10K_4
R113 EV@10K_4 R113 EV@10K_4
R107 *10K_4 R107 *10K_4
R105 EV@10K_4 R105 EV@10K_4
R100 *10K_4 R100 *10K_4
R542 EV@10K_4 R542 EV@10K_4
R541 EV@10K_4 R541 EV@10K_4
R112 EV@10K_4 R112 EV@10K_4
R116 EV@10K_4 R116 EV@10K_4
R155 EV@10K_4 R155 EV@10K_4
R158 *10K_4 R158 *10K_4
R164 EV@10K_4 R164 EV@10K_4
R168 *10K_4 R168 *10K_4
R531 EV@10K_4 R531 EV@10K_4
R530 EV@10K_4 R530 EV@10K_4
R131 EV@10K_4 R131 EV@10K_4
R124 EV@10K_4 R124 EV@10K_4
R157 *10K_4 R157 *10K_4
R163 EV@10K_4 R163 EV@10K_4
STRAP_B_PTX_DEEMPH_EN
RSVD DO NOT INSTALL
REVERSE LANES
DEBUG ACCESS
STRAP_FORCE_COMPLIANCE
RSVD
COMMON MODE RANGE
DEBUG ACCESS
FORCE_COMPLIANCE
ROMIDCFG(3:0)
MEMORY APERTURE SIZE
VIP_DEVICE VSYNC
NO STRAP FUNCTION
GPIO1
GPIO4
GPIO5
GPIO6
GPIO8
GPIO(9,13:11)
H2SYNC,
V2SYNC,GENERICC
TRANSMITTER DE-EMPHASIS ENABLE
FOR M26X,M50P: INSTALL WITH
ATI RS480,RS400,RX480,
RC410,RS482 CHIPSETS
DO NOT INSTALL WITH INTEL 915PM CHIPSET
FOR M5X - INSTALL
NO ATI FEATURE ENABLED GPIO(3:2)
NO DEBUG ACCESS (M52P,M54P,M56P)
sets the desired PCIE PLL bandwidth for M5x parts
NO ATI FEATURE ENABLED (M52P,M54P,M56P)
DON'T FORCE COMPLIANCE STATE(M52P,M54P,M56P)
IF NO ROM GPIO11(M26X) AND GPIO12,13(M52,M54,M56) SET MEMORY APERTURE SIZE
000x - No ROM, MEM_AP_SIZE=00(128MB)
001x - No ROM,MEM_AP_SIZE=01(256MB)
010x - No Rom, MEM_AP_SIZE=10(64MB)
011x - No ROM,MEM_AP_SIZE=11(Reserved)
1000 - Parallel ROM, chip IDis from ROM
1001 - Serial AT25F1024 ROM (Atmel), chip IDis from ROM
1010 - Serial AT45DB011 ROM (Atmel), chip IDis from ROM
1011 - Serial M25P10 ROM (ST), chip IDis from ROM
1100 - Serial M25P05 ROM (ST), chip IDis from ROM
1100 - Serial NX25F011B ROM (ISSI), chip IDis from ROM
Indicates if any slave VIP host devices drove this pin
low during reset. 0- Slave VIP host port deviced
present. 1-No slave VIP port devices reporting presence
during reset
ATI FEATURE NOT ENABLED (M52P,M54P,M56P)
TBD
10K RESISTORS
DO NOT INSTALL
10K RESISTOR
DO NOT INSTALL
10K RESISTOR
DO NOT INSTALL
10K RESISTOR
DO NOT INSTALL
10K RESISTOR
No default
DO NOT INSTALL
10K RESISTOR
VSYNC RSVD
HSYNC
PCIE_TEST
RSVD
RSVD
A1A:change ROMIDCFG(3:0) to 0010
Board Straps
STRAPS VALUE DESCRIPTION PIN
MEMTYPE(1:0)
+3V VGA_MEM_IO VGA_MEM_IO
R544 *10K_4 R544 *10K_4
R532 EV@10K_4 R532 EV@10K_4
R535 EV@10K_4 R535 EV@10K_4
DEMUX_SEL 19
DC_Strap4 19
DC_Strap2 19
R533 *10K_4 R533 *10K_4
D D
1
DC_Strap3 19
GPIO10 19
R108 EV@10K_4 R108 EV@10K_4
R101 EV@10K_4 R101 EV@10K_4
R106 *10K_4 R106 *10K_4 R534 *10K_4 R534 *10K_4
R114 *10K_4 R114 *10K_4
R118 EV@10K_4 R118 EV@10K_4
2
DC_Strap1
A1A:change video capture
enable setting
3
DC_Strap1
DC_Strap2
DC_Strap3 HDTV out detect
DC_Strap4,
DEMUX_SEL
PAL/NTSC
GPIO25,26
GPIO(10)
LCDDATA(13)
LCDDATA(14)
LCDDATA(15,19)
LCDDATA(18)
MEMORY TYPE AND SPEED SELECT
Memory connected to R420 identification for BIOS
00 - Samsung GDDR 3 memory(256Mb) 136 Ball BGA package
01 - Samsung GDDR 3 memory(512Mb) 136 Ball BGA package
10 - Infineon GDDR 3 memory(256Mb) 136 Ball BGA package
11 - Infineon GDDR 3 memory(512Mb) 136 Ball BGA package
Internal TMDS Enabled
0 - Disabled
1 - Enabled
Video Capture Enabled
0 - Disabled
1 - Enabled
0 - Detected
1 - Not detected
Video capture enable
00 - DAC2 Off
01 - DAC2 On as CRT
10 - DAC2 On as TVOUT
11 - DAC2 On as TVOUT and CRT
TVO Standard Default (Resistor pull-up and switch short to GND)
0 - PAL (on board resistor pull-down and switch closed)
1 -NTSC (on board resistor pull-up)
4
5
REV. 0.3
00
1
1
1
10
1
6
MEMORY TYPE AND SPEED SELECT
7
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
M56P OPTION STRAPS
M56P OPTION STRAPS
M56P OPTION STRAPS
Date: Sheet of
Date: Sheet
Date: Sheet
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
of
of
24 46 Monday, November 28, 2005
24 46 Monday, November 28, 2005
24 46 Monday, November 28, 2005
8
1A
1A
1A
5
DVI-I CONNECTOR (DVI-D)
+5V
1 2
F2
F2
POLY_SWITCH_1.1A
Place close to
TMDS_HPD
Q25
Q25
the connector
R454
R454
10K_4
10K_4
3
2
2N7002Q32N7002
D D
TMDS_HPD 19,32
2N7002
2N7002
1
C C
POLY_SWITCH_1.1A
BLM18PG181SN1D_6
BLM18PG181SN1D_6
L6
L6
+5V_DIN_DVI
C14
C14
.1U-10V_4
.1U-10V_4
+3V +3V
R453
R453
100K_4
100K_4
3
Q3
DVI_DET
2
1
DOCKIN# 16,28,32
D2B:Add D41,R773 to resolve WOL issue
+3V
R663
R663
10K_4
10K_4
B B
2 1
2 1
R397 *1K_4 R397 *1K_4
2
Q39
Q39
DTC144EUA
DTC144EUA
1 3
Pull high to +3V_S5 at SB internal
D22
D22
BAS316
BAS316
D25
D25
BAS316
BAS316
EC_FPBACK# 39
A1A:Add 100k to ground
A1A:Add for prevent panel blinking
A A
5
LVDS_BLON 20
+5V_DIN
D41 BAS316 D41 BAS316
LID591# DISPON
LVDS_BLON
2
DVI_DDCDATA 32
C13
C13
.1U-10V_4
.1U-10V_4
+3V
R773
R773
10K_4
10K_4
2 1
LID591# 16,39,40
A1A:Change lid sw to button board
E3B:Add R787(LVDS_BLON_EC) to EC IOPD2 for S3 workaround
1 2
R787 0_4 R787 0_4
R674
R674
1K_4
1K_4
C1C:Add for VGA backlight control
D2B:Remove R397 for VGA backlight control
E3A:Change R397 from 100K to 1K for boot white screen issue
+3V +3V
R672
R672
*10K_4
*10K_4
2
1 3
Q42
Q42
*DTC144EUA
*DTC144EUA
1 3
4
TX2-_OB_R
TX1-_OB_R
TX0-_OB_R
CLK+_OB_R
B1B:Change DVI connector pin 25,26 to ground
1
3
5
7
9
11
13
15
17
19
21
23
SUYIN 070939FR024S535PR_DVI
SUYIN 070939FR024S535PR_DVI
DVI PORT
+3V
35
TXCM_EX 19
TXCP_EX 19
TX0M_EX 19
TX0P_EX 19
TX1M_EX 19
TX1P_EX 19
TX2M_EX 19
TX2P_EX 19
R662
R662
*10K_4
*10K_4
DISPON
Q41
Q41
*DTC144EUA
*DTC144EUA
4
36
1
2
3
7
8
9
10
4
5
6
27
11
LVDS_BLON_EC 39
MAX4892U5MAX4892
SEL
CN22
CN22
2
1
2
4
3
4
6
5
6
8
7
8
10
9
10
12
11
12
14
13
14
R8 20K_4 R8 20K_4
16
15
16
18
17
18
20
19
20
22
21
22
24
23
24
26
252526
U5
31
0B1
30
1B1
VDD
A0
A1
A2
A3
A4
A5
A6
A7
LED0
LED1
LED2
SEL
GND
26
2B1
25
3B1
22
4B1
21
5B1
18
6B1
17
7B1
12
0LED1
13
1LED1
14
2LED1
29
0B2
28
1B2
24
2B2
23
3B2
20
4B2
19
5B2
16
6B2
15
7B2
34
0LED2
33
1LED2
32
2LED2
FUN
H
B2
LB 1
A1A:Change LVDSCLK,LVDSDATA
pull high voltage
LVDS_CLK 19
LVDS_DAT 19
TX2+_OB_R
TX1+_OB_R
+5V_DIN
DVI_DET
TX0+_OB_R
CLK-_OB_R
CLK-_OB
CLK+_OB
TX0-_OB
TX0+_OB
TX1-_OB
TX1+_OB
TX2-_OB
TX2+_OB
+3V
A1A:change to 4.7K
R53
R53
4.7K_4
4.7K_4
LCD_EDIDCLK
+3V
A1A:change to 4.7K
R54
R54
4.7K_4
4.7K_4
LCD_EDIDDATA
3
For EMI
RP4 0_4P2R_S RP4 0_4P2R_S
4
3
2
1
DVI_DDCCLK 32
4
3
2
1
RP3 0_4P2R_S RP3 0_4P2R_S
RP2 0_4P2R_S RP2 0_4P2R_S
4
3
2
1
4
3
2
1
RP5 0_4P2R_S RP5 0_4P2R_S
DVI_CLK- 32
DVI_CLK+ 32
DVI_TX0- 32
DVI_TX0+ 32
DVI_TX1- 32
DVI_TX1+ 32
DVI_TX2- 32
DVI_TX2+ 32
3
CLK+_OB CLK+_OB_R
TX2+_OB
TX2-_OB TX2-_OB_R
TX1+_OB
TX1-_OB TX1-_OB_R
TX0+_OB
TX0-_OB TX0-_OB_R
CLK-_OB
TV_C/R_SYS TV_COMP_SYS TV_Y/G_SYS
TV_C/R_SYS
S-VIDEO
TO EZ4
R6
150/F_4R6150/F_4
TV Out (SVHS) MiniDIN 7-pin
A1A:Change SVIDEO footprint to
SV-030107FR007S108FU-RVS-7P
C2A:Change CN20 SVIDEO p/n to DFMD07FR206
E3B:Change R4,R5,R6 to 150 ohm for TV can't detect issue
PR_INSERT_5V 26,32
D2B:Add R676 for LCDVCC power control
D2C:Change R676 to 1K(CS21002JB34)
for LCDVCC control
LVDS_DIGON 20
TXUCLKOUT- 20
TXUCLKOUT+ 20
TXUOUT0- 20
TXUOUT0+ 20
TXLOUT2- 20
TXLOUT2+ 20
TXLOUT1- 20
TXLOUT1+ 20
TXLOUT0- 20
TXLOUT0+ 20
TXLCLKOUT- 20
TXLCLKOUT+ 20
LCD_EDIDCLK
LCD_EDIDDATA
CAMERA MODULE CONNECTOR
D44
D44
1
2 1
+5V
*BAS316
*BAS316
R509 0_8 R509 0_8
+3V
D2B:Add R509 for camera module +5V
3
1
2
D16
D16
DA204U
DA204U
L5 BLM18PG181SN1D_6 L5 BLM18PG181SN1D_6
C645
C645
6P-50V_4
6P-50V_4
TV_Y/G
TV_C/R
TV_COMP
PR_INSERT_5V
Y_DAC2 19
C_DAC2 19
COMP_DAC2 19
R48 0_4 R48 0_4
R49 0_4 R49 0_4
Q10
Q10
AO3403
AO3403
3
2
2
3
1
2
D18
D18
DA204U
DA204U
CN20
CN20
6
6
9
9
3
7
7
030107FR007S112FR_TV_OUT
030107FR007S112FR_TV_OUT
VCC
C_A4A0
A1
B0
C_B
B1
C_C
C0
C1
C_D
D0
D1
SE
GND
EN#
5
5
TV-COMP
16
2
3
5
6
11
10
14
13
8
4
8
1 3
2
2
TV_Y/G_SYS
TV_Y/G_PR
TV_C/R_SYS
TV_C/R_PR
TV_COMP_SYS
TV_COMP_PR
TV-CHROMA
C11
C11
6P-50V_4
6P-50V_4
U29
U29
7
9
12
1
15
SN74CBT3257PWR
SN74CBT3257PWR
A1A:Change to SN74CBT3257PWR(Vin 5V)
R464 EV@0_4 R464 EV@0_4
R472 EV@0_4 R472 EV@0_4
R476 EV@0_4 R476 EV@0_4
+3V
R10
R10
0_8
0_8
A1A:Reserved +2.5V for low power panel
+3V_LCDVCC
U3
C26
C26
EV@.1U-10V_4
EV@.1U-10V_4
DISP_ON
TXUCLKOUTÂTXUCLKOUT+
TXUOUT0ÂTXUOUT0+
TXLOUT2ÂTXLOUT2+
TXLOUT1ÂTXLOUT1+
TXLOUT0ÂTXLOUT0+
TXLCLKOUTÂTXLCLKOUT+
1 2
1 2
U3
6
IN
4
IN
3
ON/OFF
R676
R676
AAT4280IGU-3-T1
AAT4280IGU-3-T1
1K_4
1K_4
CN4
CN4
1
21
2
22
3
23
4
24
5
25
6
26
7
27
8
28
9
29
10
30
11
31
12
32
13
33
14
34
15
35
16
36
17
37
18
38
19
39
20
40
414243
44
45
46
FOXCONN_LVDS
FOXCONN_LVDS
CCD_POWER
C83 10U-10V_8 C83 10U-10V_8
C698 1000P-50V_4 C698 1000P-50V_4
CCD_POWERON# 39
2
TXUOUT2ÂTXUOUT2+
TXUOUT1ÂTXUOUT1+
INVCC0
VADJ
DISPON
CCD_POWER
CCDUSBP7ÂCCDUSBP7+
LCDVCC
A1A:Change LVDS conn
p/n to DFHS40FS736
3
1
2
D17
D17
DA204U
TV_Y/G
TV_C/R
TV_COMP
DA204U
A1A:Change to 75 ohmReverse type
L3 BLM18PG181SN1D_6 L3 BLM18PG181SN1D_6
C9
6P-50V_4C96P-50V_4
L4 BLM18PG181SN1D_6 L4 BLM18PG181SN1D_6
C10
C10
6P-50V_4
6P-50V_4
TV_Y/G_PR 32
TV_C/R_PR 32
TV_COMP_PR 32
C647
C647
6P-50V_4
6P-50V_4
C646
C646
6P-50V_4
6P-50V_4
+3V +3V +3V
4
8
+5V
TRACE 80MIL
LCDVCC_1 LCDVCC
1
OUT
2
GND
5
GND
R51 0_8 R51 0_8
R474 0_8 R474 0_8
C16
C16
C17
C17
EV@.1U-10V_4
EV@.1U-10V_4
10U-10V_8
10U-10V_8
TXUOUT2- 20
TXUOUT2+ 20
TXUOUT1- 20
TXUOUT1+ 20
VIN
L53
L53
BLM18PG181SN1D_6
BLM18PG181SN1D_6
C699 EV@.1U-10V_4 C699 EV@.1U-10V_4
CCDUSBP7+
3
CCDUSBP7-
1
RP6 0_4P2R_S RP6 0_4P2R_S
+5V
+3V
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
LVDS DVI-I TV-OUT CONNECTOR
LVDS DVI-I TV-OUT CONNECTOR
LVDS DVI-I TV-OUT CONNECTOR
Date: Sheet
Date: Sheet
Date: Sheet
1
TV_Y/G_SYS TV-LUMA
R4
150/F_4R4150/F_4
TV_COMP_SYS
R5
150/F_4R5150/F_4
C81
C81
C673
EV@.01U-16V_4
EV@.01U-16V_4
CONTRAST 39
USBP7+ 15
USBP7- 15
C90
C90
10U-25V_1210
10U-25V_1210
1
C673
10U-10V_8
10U-10V_8
C91
C91
1000P-50V_4
1000P-50V_4
25 46 Saturday, December 10, 2005
25 46 Saturday, December 10, 2005
25 46 Saturday, December 10, 2005
C82
C82
EV@.1U-10V_4
EV@.1U-10V_4
4
2
VIN
1 2
+
+
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
1A
1A
1A
of
of
of
1
R_DAC1 19
G_DAC1 19
B_DAC1 19
A A
VSYNC_DAC1 19,24
HSYNC_DAC1 19,24
CRT1DDCDATA 19
CRT1DDCCLK 19
R463 EV@0_4 R463 EV@0_4
R462 EV@0_4 R462 EV@0_4
R483 EV@0_4 R483 EV@0_4
RN6 EV@0_4P2R_S RN6 EV@0_4P2R_S
RN7 EV@0_4P2R_S RN7 EV@0_4P2R_S
2
near switch
4
3
2
1
4
3
2
1
VGA_RED
VGA_GRN
VGA_BLU
VSYNC
HSYNC
CRTDDAT
CRTDCLK
3
PR_INSERT_5V 25,32
VGA_RED
VGA_GRN
VGA_BLU
PR_INSERT_5V
4
U31
U31
4
7
9
12
1
15
VCC
C_A
C_B
C_C
C_D
SE
GND
EN#
SN74CBT3257PWR
SN74CBT3257PWR
A0
A1
B0
B1
C0
C1
D0
D1
16
2
3
5
6
11
10
14
13
8
5
+5V
VGA_RED_SYS
VGA_RED_PR
VGA_GRN_SYS
VGA_GRN_PR
VGA_BLU_SYS
VGA_BLU_PR
VGA_RED_PR 32
VGA_GRN_PR 32
VGA_BLU_PR 32
6
+5V
C666 EV@.1U-10V_4 C666 EV@.1U-10V_4
C683 EV@.1U-10V_4 C683 EV@.1U-10V_4
C51 EV@.1U-10V_4 C51 EV@.1U-10V_4
7
8
A1A:Change to SN74CBT3257PWR(Vin 5V)
SEL
LOW
FUNCTION
IN_B0
IN_B1 HIGH
B1B:Remove UMA CRT support
B B
C37 EV@.1U-10V_4 C37 EV@.1U-10V_4
F3
+5V
VGA_RED_SYS
VGA_GRN_SYS
C642
C642
R2
10P-50V_4
150/F_4R2150/F_4
C C
10P-50V_4
A1A:Change to 75 ohm
PLACE RGB TERMINATION RESISTORS,FILTERING CLOSE TO CONNECTOR
F3
POLY_SWITCH_1.1A
POLY_SWITCH_1.1A
R18
R18
150/F_4
150/F_4
CRTVDD2 CRTVDD3
1 2
C34
C34
10P-50V_4
10P-50V_4
2 1
D3 SSM14 D3 SSM14
L2 BLM18BA220SN1_6 L2 BLM18BA220SN1_6
L13 BLM18BA220SN1_6 L13 BLM18BA220SN1_6
L14 BLM18BA220SN1_6 L14 BLM18BA220SN1_6
C39
C39
R24
R24
10P-50V_4
10P-50V_4
150/F_4
150/F_4
25 MIL
C677
C677
10P-50V_4
10P-50V_4
C672
C672
10P-50V_4
10P-50V_4
B1B:Change CRT p/n to DFHS15FR057
CRT_R1
CRT_G1
CRT_B1 VGA_BLU_SYS
C643
C643
10P-50V_4
10P-50V_4
Reverse type
16 17
6
7
2
8
3
9
4
10
5
CN23
CN23
CRT
CRT
11 1
12
13
14
15
A1A:delete CRT_SENSE#
T2T2
E3B:Change R2,R18,R24 to 150 ohm for CRT can't detect issue
+3V
B1B:Change U30 pin1,8,9,12 to CRTVDD3
U30
R23
R23
R22
R22
2.2K_4
2.2K_4
2.2K_4
2.2K_4
CRTDCLK
CRTDDAT
A1A:Pull high to 3.3V
D D
1
CRTVDD3
+5V
CRTVDD3
+3V
VGA_RED_SYS
VGA_GRN_SYS
VGA_BLU_SYS
U30
1
7
8
2
3
4
5
6
2
VCC_SYNC
VCC_DDC
BYP
VCC_VIDEO
VIDEO_1
VIDEO_2
VIDEO_3
GND
CM2009-02QR
CM2009-02QR
SYNC_OUT2
SYNC_OUT1
SYNC_IN2
SYNC_IN1
DDC_IN1
DDC_IN2
DDC_OUT1
DDC_OUT2
16
14
VSYNC
15
HSYNC
13
CRTDCLK
10
CRTDDAT
11
DDCCLK_1
9
DDCDAT_1
12
3
VSYNC_EZ4 32
HSYNC_EZ4 32
L52 BLM18BA220SN1_6 L52 BLM18BA220SN1_6
L51 BLM18BA220SN1_6 L51 BLM18BA220SN1_6
CRTVDD3
R3
R482
R482
2.7K_4R32.7K_4
2.7K_4
2.7K_4
4
C681
C681
10P-50V_4
10P-50V_4
CRTVSYNC
CRTHSYNC
C679
C679
10P-50V_4
10P-50V_4
C684
C684
10P-50V_4
10P-50V_4
C644
C644
10P-50V_4
10P-50V_4
5
DDCCLK_1 32
DDCDAT_1 32
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
CRT-PORT
CRT-PORT
CRT-PORT
Date: Sheet
Date: Sheet
6
Date: Sheet
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
7
1A
1A
1A
of
of
of
26 46 Saturday, December 10, 2005
26 46 Saturday, December 10, 2005
26 46 Saturday, December 10, 2005
8
LANVCC
B1B:Add R723,C959 for LAN_PWR_GOOD
R723
R723
100K_4
100K_4
LAN_PWR_GOOD
C959
C959
1U-16V_6
1U-16V_6
after all power rail OK 80ms
D D
Stuff R488 for D3 wake up
A1A:Leave ball C3, DOCK_IND,unconnected. This
feature is not supported in the 82573.
PCIE_WAKE_LAN
C C
LANVCC
Pull up to +3V_S5 on SB side
A1A:Add PCIE_WAKE# circuit
R518
R518
4.7K_4
4.7K_4
A1A:add 47 ohms for SPI EEPROM program
NVM_SK_LAN
NVM_SI_LAN NVM_SI
A1A:These resistors should be
placed less than 0.5" from
the Shared Flash
B B
R28 47_4 R28 47_4
R29 47_4 R29 47_4
R21 47_4 R21 47_4
1 2
C52
C52
33P-50V_4
33P-50V_4
A1A:These capacitors should be
placed less than 0.5" from
the LAN Controller
5
PCIE_TXP1 15
PCIE_TXN1 15
PCIE_RXP1 15
PCIE_RXN1 15
CLK_PCIE_LAN 2
CLK_PCIE_LAN# 2
PLTRST# 15,16,18,29,32,33,38,39
ICH_PWROK 16
RSMRST# 16,39
PCLK_SMB 2,16,29,32,33,35
PDAT_SMB 2,16,29,32,33,35
R34 *3.3K_4 R34 *3.3K_4
+-30PPM
R488 3.3K_4 R488 3.3K_4
R35 *3.3K_4 R35 *3.3K_4
LANVCC
SMB_ALERT# 16
ICH_PWROK 16
2
1 3
Q30
Q30
DTC144EUA
DTC144EUA
PCIE_WAKE# 16,29,39
Dedicated LAN Flash
NVM_CS#
NVM_SK
NVM_SO NVM_SO_LAN
R26
R26
8.2K_4
8.2K_4
R25 3.3K_4 R25 3.3K_4
1
6
5
2
3
B1B:Change U32(SST25LF080) WP# to LANVCC
NVM_CS#
NVM_SK_LAN
NVM_SI_LAN
NVM_SO_LAN
1 2
C59
C59
33P-50V_4
33P-50V_4
1 2
C54
C54
33P-50V_4
33P-50V_4
1 2
C53
C53
33P-50V_4
33P-50V_4
A1A:Change GLAN from PCIE5 to PCIE1
PCIE_TXP5
PCIE_TXN5
C75 .1U-10V_4 C75 .1U-10V_4
PCIE_RXP5
PCIE_RXN5
C76 .1U-10V_4 C76 .1U-10V_4
CLK_PCIE_LAN
CLK_PCIE_LAN#
PLTRST#
PCIE_WAKE_LAN
R516 *0_4 R516 *0_4
R517 *0_4 R517 *0_4
LAN_DISABLE_A13
T3T3
T6T6
U32
U32
CE#
SCK
SI
SO
WP#
SST25LF080A
SST25LF080A
LAN_DISABLE_D10
LAN_DISABLE_D12
LAN_DISABLE_D14
DOCK_IND
AUX_PRESENT
R491 *619 R491 *619
R490 *649 R490 *649
Reserved for82562
R519 0_4 R519 0_4
R514 *3.3K_4 R514 *3.3K_4
C697 22P-50V_4 C697 22P-50V_4
Y5
25MHZY525MHZ
C696 22P-50V_4 C696 22P-50V_4
C38 .1U-10V_4 C38 .1U-10V_4
8
VDD
7
HOLD#
4
VSS
SMB_ALRT#/ASF_PWRGOOD
T88T88
T89T89
T7T7
T5T5
2 1
LANVCC
R20
R20
3.3K_4
3.3K_4
LANVCC
LAN_PWR_GOOD
DEVICE_OFF#
R489 *0_4 R489 *0_4
R38 *0_4 R38 *0_4
XTAL1
XTAL2
SMB_ALERT#
A1A:No_Stuff R391,It is for Tekoa Validation support only
LAN Disable Circuit
LAN_DISABLE_A13
LAN_DISABLE_D12
R36
R36
R33
R33
4.99K/F_4
4.99K/F_4
3.3K_4
3.3K_4
LANVCC
R55
R55
1K_4
1K_4
A A
LAN_DISABLE# 16
A1A:Stuff R57 and not stuff R55 to disable LAN
GPIO24(Not cleared by CF9h reset event
defaults to high on power up, is powered from
the resume well, and retains its value during
PCI reset
R56 *0_4 R56 *0_4
5
DEVICE_OFF#
R57
R57
*1K_4
*1K_4
4
U35A
U35A
F2
PE_R0p--NC
F1
PE_R0n--NC
D1
PE_T0p--NC
C1
PE_T0n--NC
G1
PE_CLKp--NC
G2
PE_CLKn--NC
P7
PE_RST#--NC
P10
PE_WAKE#--NC
P5
LAN_PWR_GOOD--NC
L7
DEVICE_OFF#--ADV10/LAN_DIS_N
A13
TEST_EN--TEST_EN
D10
NC--ISOL_TEX
D12
PHY_REF--ISOL_TI
D14
NC--ISOL_TCK
C3
DOCK_IND--NC
C6
AUX_PRESENT--NC
B14
PHY_TSTPT--RBIAS10
B13
PHY_HSDACn-RBIAS100
B12
PHY_HSDACp-TOUT
N10
ALT_CLK125--NC
N11
SMB_ALRT#/ASF_PWRGOOD--NC
P11
SMB_CLK-NC
M11
SMB_DATA-NC
L2
THERMn--NC
L3
THERMp--NC
A8
SDP0--NC
B8
SDP1--NC
C8
SDP2--NC
C7
SDP3--NC
K14
XTAL1--X1
J14
XTAL1--X2
PC82573E
PC82573E
U35B
U35B
VSS--NC_A1
VSS--VSS_B3
NC--VSS_B7
VSS--NC_C2
VSS--VSS_C10
VSS--VSS_C12
VSS--NC_D2
VSS--VSS_D4
VSS--VSS_D5
VSS--VSS_D6
VSS--VSS_D7
VSS--VSS_D8
VSS--VSS_D13
VSS--VSS_E2
VSS--VSS_E4
VSS--VSS_E5
VSS--VSS_E6
VSS--VSS_E7
VSS--VSS_E8
VSS--VSS_E9
VSS--VSS_E10
VSS--VSS_F4
VSS--VSS_F5
VSS--VSS_F6
VSS--VSS_F7
VSS--VSS_F8
VSS--VSS_F9
VSS--VSS_F10
VSS--VSS_F11
VSS--NC_G4
VSS--VSS_G7
VSS--VSS_G8
VSS--VSS_G9
VSS--VSS_G10
VSS--VSS_G11
VSS--VSS_G14
VSS--VSS_H9
VSS--VSS_H10
VSS--VSS_K2
NC--VSS_K12
NC--VSS_L6
NC--VSS_L11
NC--VSS_M6
VSS--VSS_N1
VSS--VSS_N12
VSS--VSS_P8
+3V
R391 *10K_4 R391 *10K_4
A1
B3
B7
C2
C10
C12
D2
D4
D5
D6
D7
D8
D13
E2
E4
E5
E6
E7
E8
E9
E10
F4
F5
F6
F7
F8
F9
F10
F11
G4
G7
G8
G9
G10
G11
G14
H9
H10
K2
K12
L6
L11
M6
N1
N12
P8
No Connects
TEST0--NCH1TEST1--NCH2TEST2--NCH3TEST3--NCJ1TEST4--NCJ2TEST5--NCJ3TEST6--NCK1TEST7--NCL1TEST8--NCM1TEST9--NCM3TEST10--NCN2TEST11--NCP1TEST12--NCN3TEST13--NCM8TEST14--NCP9TEST15--NCE3TEST16--NC
4
PCI Express
Thermal
Monitoring
SDP Pins
Crystal
VSS Pins
Test
Voltage
Regulation
NC--NC_D11
NC--NC_J13
J13
A14
D11
Enternet Port
Control
NVM/EEPROM
NVM_SHARED--NC_D3
LEDs
SMBus
JTAG 82570EI
CLK_VIEW--LAN_TXD[2]
NC--LAN_RSTSYNC
LAN Connect Interface
VCC Pins
NC--NC_L8L8NC--NC_M5M5NC--NC_M7M7NC--NC_M9M9NC--NC_N9N9NC--NC_P14
P14
MDI0p--TDP
MDI0n--TDN
MDI1p--RDP
MDI1n--RDN
MDI2p--NC
MDI2n--NC
MDI3p--NC
MDI3n--NC
NVM_CS#--NC
NVM_SK--NC
NVM_SI--NC
NVM_SO--NC
NVM_REQ--NC
NVM_PROT--NC
NVM_TYPE--NC
LED0#--SPDLED
LED1#--ACTLED
LED2#--LILED
JTAG_TMS--NC
JTAG_TDI--NC
JTAG_TCK--NC
JTAG_TDO--NC
NC--LAN_RXD[2]
NC--LAN_RXD[1]
NC--LAN_RXD[0]
NC--LAN_TXD[2]
NC--LAN_TXD[0]
NC--LAN_CLK
VCC1.2--NC-A10
VCC1.2--NC-C5
VCC1.2--NC-C4
VCC1.2--NC-F12
VCC1.2--VCC3.3_G6
VCC1.2--NC-G12
VCC1.2--VCC3.3_G13
VCC1.2--VCC3.3_H6
VCC1.2--VCC3.3_H7
VCC1.2--VCC3.3_H8
VCC1.2--VCC3.3_H11
VCC1.2--NC_H12
VCC1.2--VCC3.3_J6
VCC1.2--VCC3.3_J7
VCC1.2--VCC3.3_J8
VCC1.2--VCC3.3_J9
VCC1.2--VCC3.3_J10
VCC1.2--VCC3.3_J11
VCC1.2--VCC_K3
VCC1.2--VCC_K4
VCC1.2--VCC3.3_K5
VCC1.2--VCC3.3_K6
VCC1.2--VCC3.3_K7
VCC1.2--VCC3.3_K8
VCC1.2--VCC3.3_K9
VCC1.2--VCC3.3_K10
VCC1.2--VCC3.3_K11
VCC1.2--VCC3.3_L5
VCC1.2--VCC3.3_L9
VCC1.2--VCC3.3_L10
IREG2.5_IN--NC_A2
IREG2.5_IN-A3
VCC3.3--VCC_A7
VCC3.3--NC_D9
NC--VCC_E1
NC--VCCT_E11
NC--VCCT_E12
VCC3.3--NC_F3
VCC3.3--NC_J4
NC--VCC_L4
FUSEV--NC
VCC3.3--NC_M10
VCC3.3--VCC_N6
VCC3.3--VCC_N8
VCC3.3--VCC_P2
VCC3.3--VCC_P12
VCC2.5--VCC_A11
VCC2.5--NC_B6
VCC2.5--NC_G3
VCC2.5--VCCR_G5
VCC2.5--NC_H4
VCC2.5--VCCR_H5
VCC2.5--VCC3.3_J5
VCC2.5--NC_J12
VCC2.5--VCC_K13
VCC2.5--NC_L12
VCC2.5--NC_M4
VCC2.5--NC_N7
VCC2.5_OUT--NC_B1
VCC2.5_OUT--NC_B2
CTRL_1.2--NC
CTRL_2.5--NC
EN2.5REG--NC_B5
PC82573E
PC82573E
3
TRD0+
C13
TRD0-
C14
TRD1+
E13
TRD1-
E14
TRD2+
F13
TRD2-
F14
TRD3+
H13
TRD3-
H14
B10
C9
A9
B9
B4
R487 0_4 R487 0_4
A5
R31 3.3K_4 R31 3.3K_4
A6
R37 *3.3K_4 R37 *3.3K_4
D3
B11
C11
A12
N4
P4
N5
P6
M12
N13
P13
L14
L13
M14
M13
N14
A10
C5
C4
F12
G6
G12
G13
H6
H7
H8
H11
H12
J6
J7
J8
J9
J10
J11
K3
K4
K5
K6
K7
K8
K9
K10
K11
L5
L9
L10
A2
A3
A7
D9
E1
E11
E12
F3
J4
L4
M2
M10
N6
N8
P2
P12
A11
B6
G3
G5
H4
H5
J5
J12
K13
L12
M4
N7
B1
B2
P3
A4
B5
A1A:Installed R484 when use shared mode
NVM_CS#
NVM_SK_LAN
NVM_SI_LAN
NVM_SO_LAN
R484 *0_4 R484 *0_4
NAV_ARB
Install R487 to disable NVM protection
LINK_100_LED#
LINK/ACT-ACT_LED#
LINK_1000-LINK_UP_LED#
JTAG_TMS
JTAG_TDI
JTAG_TCK
JTAG_TDO
T104T104
T105T105
T101T101
T98T98
T102T102
T99T99
T103T103
T92T92
T95T95
T94T94
T97T97
T96T96
C71
C71
.1U-10V_4
.1U-10V_4
LANVCC
C682
C682
10U-6.3V_8
10U-6.3V_8
LAN_2.5V
M2(Fuse Supply). This should be connected
to 2.5V for normal operation.
LAN_2.5V
CTRL_1.2
CTRL_2.5
3
T86T86
Install to use SPI FLASH
(Tekoa only)
Install when sharing SPI
Flash with the ICH7
LINK_100_LED# 28
LINK/ACT-ACT_LED# 28
LINK_1000-LINK_UP_LED# 28
LAN_1.2V
C73
C73
C72
C72
.1U-10V_4
.1U-10V_4
.1U-10V_4
.1U-10V_4
C78
C78
C86
C86
.1U-10V_4
.1U-10V_4
10U-6.3V_8
10U-6.3V_8
LAN_2.5V
C79
C79
C88
C70
C70
T100T100
T4T4
C88
.1U-10V_4
.1U-10V_4
.1U-10V_4
.1U-10V_4
.1U-10V_4
.1U-10V_4
LANVCC
2
A1A:Place termination resistors and caps as
close to LAN controller as possible
TRD3ÂTRD3+
TRD2ÂTRD2+
TRD1ÂTRD1+
TRD0ÂTRD0+
C87
C87
4.7U-10V_6
4.7U-10V_6
B1B:Change Q5,Q28 footprint to SOT-223(SMT issue)
C56
C56
C67
C67
C58
C58
.1U-10V_4
.1U-10V_4
.1U-10V_4
.1U-10V_4
.1U-10V_4
R485
R485
*3.3K_4
*3.3K_4
R486
R486
3.3K_4
3.3K_4
.1U-10V_4
C89
C89
C47
C47
4.7U-10V_6
4.7U-10V_6
4.7U-10V_6
4.7U-10V_6
Install to disable
Internal 2.5V regulator
2
C692
LANMDI3
R507
R507
49.9/F_4
49.9/F_4
R492
R492
49.9/F_4
49.9/F_4
LANMDI0 LANMDI1
C689
C689
.1U-10V_4
.1U-10V_4
+3V_S5
R19 0_8 R19 0_8
C693
C693
.1U-10V_4
.1U-10V_4
R506
R506
49.9/F_4
49.9/F_4
R493
R493
49.9/F_4
49.9/F_4
LANVCC
R504
R504
49.9/F_4
49.9/F_4
LANMDI2
R500
R500
49.9/F_4
49.9/F_4
C692
.1U-10V_4
.1U-10V_4
R502
R502
49.9/F_4
49.9/F_4
R501
R501
49.9/F_4
49.9/F_4
C690
C690
.1U-10V_4
.1U-10V_4
add suport S5 wake up on LAN solution
LANVCC
L7
L7
FCM2012VF-131DC10_8
FCM2012VF-131DC10_8
130 ohms@100Mhz
CTRL_2.5
reduce the ripple
CTRL_1.2
LAN_2.5V_L
MMJT9435T1G
MMJT9435T1G
1
Q5
Q5
2 3
4
LANVCC
R473
R473
1_12
1_12
1
2 3
C678
C678
C674
C674
C671
C27
C27
4.7U-10V_6
4.7U-10V_6
.1U-10V_4
.1U-10V_4
R30
R30
C44
C44
10U-6.3V_8
10U-6.3V_8
L50
L50
FCM2012VF-131DC10_8
FCM2012VF-131DC10_8
130 ohms@100Mhz
LAN_1.2V_L
C676
C676
4.7U-10V_6
4.7U-10V_6
MMJT9435T1G
MMJT9435T1G
Q28
Q28
4
R457
R457
C665
C665
4.7U-10V_6
4.7U-10V_6
1_12
1_12
C648
C648
10U-6.3V_8
10U-6.3V_8
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Gigalan Tekoa 82573E
Gigalan Tekoa 82573E
Gigalan Tekoa 82573E
Date: Sheet of
Date: Sheet
Date: Sheet
C671
22U-6.3V_8
22U-6.3V_8
10U-6.3V_8
10U-6.3V_8
LAN_2.5V
C69
C69
1_12
1_12
.1U-10V_4
.1U-10V_4
C48
C48
10U-6.3V_8
10U-6.3V_8
C669
C669
C675
C675
22U-6.3V_8
22U-6.3V_8
.1U-10V_4
.1U-10V_4
10U-6.3V_8
10U-6.3V_8
LAN_1.2V
C685
C685
.1U-10V_4
.1U-10V_4
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
1
TRD3- 28
TRD3+ 28
TRD2- 28
TRD2+ 28
TRD1- 28
TRD1+ 28
TRD0- 28
TRD0+ 28
297mA
C49
C49
.1U-10V_4
.1U-10V_4
C664
C664
551mA
C663
C663
.1U-10V_4
.1U-10V_4
compensate for undershoot
27 46 Monday, November 28, 2005
27 46 Monday, November 28, 2005
1
27 46 Monday, November 28, 2005
1A
1A
1A
of
of
5
4
3
2
1
LANVCC
U34
C687 .1U-10V_4 C687 .1U-10V_4
C686 .1U-10V_4 C686 .1U-10V_4
C688 .1U-10V_4 C688 .1U-10V_4
D D
LINK_100_LED# 27
LINK/ACT-ACT_LED# 27
LINK_1000-LINK_UP_LED# 27
SEL CONNECTION
0
C C
LED0 Input
0LED1 Output. Connects LED0 to 0LED1 when SEL = 0.
0LED2 Output. Connects LED0 to 0LED2 when SEL = 1.
1
TRD0+ 27
TRD0- 27
TRD1+ 27
TRD1- 27
TRD2+ 27
TRD2- 27
TRD3+ 27
TRD3- 27
DOCKIN# 16,25,32
Ax to xB1 ; LEDx to xLED1
Ax to xB2 ; LEDx to xLED2
TRD0+
TRD0-
TRD1+
TRD1-
TRD2+
TRD2-
TRD3+
TRD3-
LINK_100_LED#
LINK/ACT-ACT_LED#
LINK_1000-LINK_UP_LED#
DOCKIN#
U34
35
VDD
36
A0
1
A1
2
A2
3
A3
7
8
9
10
4
12
34
27
11
A4
A5
A6
A7
LED0_I
LED1_I
LED2_I
SEL
GND
MAX4892
MAX4892
LED Output (SEL = 0)
LED Output (SEL = 0)
LED Input
LED Input
LED Output(SEL = 1)
LED Output(SEL = 1)
0LED1_O
1LED1_O
2LED1_O
0LED2_O
1LED2_O
2LED2_O
B1B:Change MAX4892 pin define
31
0B1
30
1B1
26
2B1
25
3B1
22
4B1
21
5B1
18
6B1
17
7B1
100MBPS#
5
ACT#
13
LINK_1000-LINK_UP_LED#_PR
33
29
0B2
28
1B2
24
2B2
23
3B2
20
4B2
19
5B2
16
6B2
15
7B2
LINK_100_LED#_SYS
6
LINK/ACT-ACT_LED#_SYS
14
LINK_1000-LINK_UP_LED#_SYS
32
X-TX0P-PR
X-TX0N-PR
X-TX1P-PR
X-TX1N-PR
X-TX2P-PR
X-TX2N-PR
X-TX3P-PR
X-TX3N-PR
TX0P_SYS
TX0N_SYS
TX1P_SYS
TX1N_SYS
TX2P_SYS
TX2N_SYS
TX3P_SYS
TX3N_SYS
X-TX0P-PR 32
X-TX0N-PR 32
X-TX1P-PR 32
X-TX1N-PR 32
X-TX2P-PR 32
X-TX2N-PR 32
X-TX3P-PR 32
X-TX3N-PR 32
T90T90
100MBPS# 32
ACT# 32
TX0P_SYS
TX0N_SYS
TX1P_SYS
TX1N_SYS
TX2P_SYS
TX2N_SYS
TX3P_SYS
TX3N_SYS
LAN_2.5V
LAN_2.5V
GST5009 LF 1000
A1A:Change RJ45 CONN to C100A2-108A4L
A1A:Change RJ45 TX,RX pin define
CN25
LANVCC
R503 220_4 R503 220_4
LINK/ACT-ACT_LED#_SYS
B B
X-TX3P
X-TX3N
X-TX1N
X-TX1P
X-TX2P
X-TX2N
X-TX0P
X-TX0N
A A
For EMI
3
1
RP50 0_4P2R_S RP50 0_4P2R_S
3
1
RP49 0_4P2R_S RP49 0_4P2R_S
3
1
RP48 0_4P2R_S RP48 0_4P2R_S
3
1
RP47 0_4P2R_S RP47 0_4P2R_S
5
4
2
4
2
X-TX2P_CON
4
X-TX2N_CON
2
X-TX0P_CON
4
X-TX0N_CON
2
X-TX3P_CON
X-TX3N_CON
X-TX1N_CON
X-TX1P_CON
LINK_100_LED#_SYS
LINK_1000-LINK_UP_LED#_SYS
A1A:Add diode for 10/100M
& 1000M led control
swap
LANVCC
2 1
D5 BAS316 D5 BAS316
2 1
D4 BAS316 D4 BAS316
4
X-TX3N_CON
X-TX3P_CON
X-TX1N_CON
X-TX2N_CON
X-TX2P_CON
X-TX1P_CON
X-TX0N_CON
X-TX0P_CON
R513 220_4 R513 220_4
A1(+) A2(-)
LED1 YELLOW BLINKING ACT (Tx/Rx)
B1(+) B2(-)
LED2
CN25
11
YELLOW__P
12
YELLOW_N
1
RX2-
2
RX2+
3
RX1-
4
TX2-
5
TX2+
6
RX1+
7
TX1-
8
TX1+
9
GREEN_P
10
GREEN_N
C100A2-108A4L_RJ45
C100A2-108A4L_RJ45
LINK 10/100/1000
GND1
GND2
3
13
C66 .1U-10V_4 C66 .1U-10V_4
14
C691 .01U-16V_4 C691 .01U-16V_4
C57 1500P-2KV_1808 C57 1500P-2KV_1808
GREEN
10/100
MGND
A1A:Place capacitor near
transformer pin 1,4,7,10
C84
C84
.1U-10V_4
.1U-10V_4
1
2
3
4
5
6
7
8
9
10
11
12
U36
U36
TCT1
TD1+
TD1-
TCT2
TD2+
TD2-
TCT3
TD3+
TD3-
TCT4
TD4+
TD4-
GST5009 LF
GST5009 LF
C80
C80
C74
C74
.1U-10V_4
.1U-10V_4
.1U-10V_4
.1U-10V_4
24
MCT1
23
MX1+
22
MX1-
21
MCT2
20
MX2+
19
MX2-
18
MCT3
17
MX3+
16
MX3-
15
MCT4
14
MX4+
13
MX4-
P/N
DBKN1NLAN03
DB0MW1LAN09 TST1284A LF
2
C85
C85
.1U-10V_4
.1U-10V_4
MCT1
MCT2
MCT3
MCT4
R512
R512
R515
R515
75/F_4
75/F_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
TRANSFORMER/RJ45
TRANSFORMER/RJ45
TRANSFORMER/RJ45
Date: Sheet
Date: Sheet
Date: Sheet of
R42
R42
75/F_4
75/F_4
75/F_4
75/F_4
C68
C68
1500P-2KV_1808
1500P-2KV_1808
MGND
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
R39
R39
75/F_4
75/F_4
X-TX0P
X-TX0N
X-TX1P
X-TX1N
X-TX2P
X-TX2N
X-TX3P
X-TX3N
1
28 46 Monday, November 28, 2005
28 46 Monday, November 28, 2005
28 46 Monday, November 28, 2005
of
of
A
A
A
1
Debug card interface
BOT contact
CN37
CN37
A A
AFN300-N2G1Z_DEBUG
AFN300-N2G1Z_DEBUG
B B
AD0
1
AD1
2
AD2
3
AD3
4
AD4
5
AD5
6
AD6
7
AD7
8
AD8
9
AD9
10
AD11
11
AD13
12
AD15
13
CBE0#
14
CBE1#
15
CBE2#
16
CBE3#
17
PCIK_MINI
18
IRDY#
19
TRDY#
20
PCIRST#
21
GNT2#
22
DEVSEL#
23
FRAME#
24
+3V
25
26
27
28
29
30
+3V
+3V
+5V
+5V
+5V
GND
GND
AD[15:0] 15,30
CBE0# 15,30
CBE1# 15,30
CBE2# 15,30
CBE3# 15,30
PCLK_MINI 2
IRDY# 15,30
TRDY# 15,30
PCIRST# 15,30
GNT2# 15
DEVSEL# 15,30
FRAME# 15,30
D2B:Add C974,C975 for PCIE RX
PCIE_TXP3 15
PCIE_TXN3 15
PCIE_RXP3 15
PCIE_RXN3 15
C C
PCIE_WAKE# 16,27,39
Pull up to +3V_S5 on ICH7
D D
+3VSUS
2
1 3
Q29 DTC144EUA Q29 DTC144EUA
R480
R480
4.7K_4
4.7K_4
CLK_PCIE_MINI 2
CLK_PCIE_MINI# 2
2
CLKREQ# and WAKE# are
open drain signal
MiniCard/WLAN
CN24
CN24
51
Reserved
49
Reserved
47
Reserved
45
Reserved
43
Reserved
41
Reserved
39
Reserved
37
Reserved
35
GND
33
PETp0
31
PETn0
29
GND
27
GND
25
PERp0
23
PERn0
21
GND
19
Reserved
17
Reserved
15
GND
13
REFCLK+
11
REFCLK-
9
GND
7
CLKREQ#
5
Reserved
3
Reserved
1
WAKE#
AS0B226-S80N-7F_MINI CARD(H=8.0)
AS0B226-S80N-7F_MINI CARD(H=8.0)
LED_WPAN#
LED_WLAN#
LED_WWAN#
SMB_DATA
+3.3V
+1.5V
USB_D+
USB_D-
SMB_CLK
+1.5V
+3.3Vaux
PERST#
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
+1.5V
+3.3V
GND
GND
GND
GND
GND
GND
3
4
5
6
7
8
BLUETOOTH MODULE CONNECTOR
+3VSUS
A1A:In adapter mode, should be powered during S0~S5.
In battery only mode, should be powered during S0 and S3, and not powered during S5
80mil
+5V_S5
USBON#
C121
C121
.1U-10V_4
+3.3V:1000mA
3.3Vaux:330mA
+1.5V:500mA
+3V_S5 +3VSUS
+3V
+1.5V
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
+3.3VAUX_MINI2
A1A:Change mini card
+3.3Vaux to +3VSUS
R44
R44
R47
R47
0_6
0_6
*0_6
*0_6
B1B:Mini card WLAN LED low active(LED5)
R43 0_4 R43 0_4
T8T8
T93T93
T91T91
PDAT_SMB 2,16,27,32,33,35
PCLK_SMB 2,16,27,32,33,35
PLTRST# 15,16,18,27,32,33,38,39
R41 0_4 R41 0_4
WIRELESS_LED 40
RF_EN 39
.1U-10V_4
MB USB PORT(RIGHT)
USBP0- 15
USBP0+ 15
R98 0_4 R98 0_4
USBON# 39
+5V_S5 +5V_S5
C791
C791
.1U-10V_4
.1U-10V_4
U13
U13
CM1293-04SO
CM1293-04SO
1
2
USBP1- 15
USBP1+ 15
CH1
VN
CH23CH3
U8
U8
1
GND
2
IN
3
IN
4
EN#
MAX1930ESA-C71091
MAX1930ESA-C71091
R543
R543
*0_4
*0_4
R559 0_4 R559 0_4
C782
C782
.1U-10V_4
.1U-10V_4
6
CH4
5
VP
4
OUT
OUT
OUT
OUTNC
+5V_S5
+5V_S5
R564
R564
*0_4
*0_4
R236 0_6 R236 0_6
R234 0_6 R234 0_6
+5V_S5
R281 0_6 R281 0_6
R279 0_6 R279 0_6
8
7
6
5
USBPWR3
1.1 A min
U42
U42
2
IN1
IN23OUT2
4
EN#
1
GND
9
GND-C
TPS2061DGNR
TPS2061DGNR
U45
U45
2
IN1
IN23OUT2
4
EN#
1
GND
9
GND-C
TPS2061DGNR
TPS2061DGNR
USBPWR1
100U-6.3V_3528
100U-6.3V_3528
USBPWR2
100U-6.3V_3528
100U-6.3V_3528
C482
C482
*22P_4
*22P_4
80mil
1
OUT3
OUT1
OUT3
OUT1
OC#
OC#
C364
C364
C412
C412
*22P_4
*22P_4
C474
C474
USBP6+ 15
USBP6- 15
BT_LED 40
2
8
7
6
5
8
7
6
5
C488
C488
*22P_4
*22P_4
+
+
+
+
Q43
Q43
AO3403
AO3403
L72
L72
3
BK2125HS330_8
BK2125HS330_8
BT_POWERON# 39
USBPWR1
R555 *6.34K/F_4 R555 *6.34K/F_4
USBPWR2
R560 *6.34K/F_4 R560 *6.34K/F_4
C380
C380
A1A:Change p/n to DFHS04FR342
1000P-50V_4
1000P-50V_4
BUSBP0ÂBUSBP0+
BUSBP0+
C392
C392
*22P_4
*22P_4
C479
C479
1000P-50V_4
1000P-50V_4
BUSBP1ÂBUSBP1+
D2B:Change CN8,CN9 footprint to
USB-020133MB004S557ZL-4P-L-H
D2B:Change CN8,CN9 to DFHS04FRD15
BT_POWER
C904 10U-10V_8 C904 10U-10V_8
C903 1000P-50V_4 C903 1000P-50V_4
R710 0_4 R710 0_4
R712 0_4 R712 0_4
MB USB PORT(REAR)
A1A:Change footprint to 88231-10001-L
D2B:Change CN5 pin 4 to +5V_S5
USBP3- 15
USBP3+ 15
USBP2- 15
USBP2+ 15
CN8
CN8
1
5
2
6
3
7
4
8
020133MB004S557ZL_USB
020133MB004S557ZL_USB
CN9
CN9
1
5
2
6
3
7
4
8
020133MB004S557ZL_USB
020133MB004S557ZL_USB
A1A:Change BT CONN to 5 pin
CN38
BT CONN(EIC 3703-05)
BT CONN(EIC 3703-05)
C640
C640
*.01U-16V_4
*.01U-16V_4
CN38
5
4
3
2
1
BUSBP4+
BUSBP4-
BUSBP4-
BT_LED
C948
C948
*22P_4
*22P_4
BT_POWER
C932
C932
*22P_4
*22P_4
B1B:Change CN38 p/n to DFHD05MS061
D2B:Change CN38 pin define(1~5) to
meet vertical connector
USBPWR3
C122
C122
.1U-10V_4
.1U-10V_4
RP8 0_4P2R_S RP8 0_4P2R_S
3
1
3
1
RP7 0_4P2R_S RP7 0_4P2R_S
+5V_S5
USBP3-_CON
4
USBP3+_CON
2
USBP2-_CON
4
USBP2+_CON
2
88231-10001_USB/B
88231-10001_USB/B
CN5
CN5
1
2
3
4
5
6
7
8
9
10
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DEBUG CARD&PCI-E card&USB
DEBUG CARD&PCI-E card&USB
DEBUG CARD&PCI-E card&USB
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet
7
Quanta Computer Inc.
of
of
of
29 46 Monday, November 28, 2005
29 46 Monday, November 28, 2005
29 46 Monday, November 28, 2005
8
1A
1A
1A
+3V
D D
C C
B B
8
Place near U183 K4,P9,E7 ...
C860
C833
C833
10U-10V_8
10U-10V_8
C860
.1U-10V_4
.1U-10V_4
Reserve for EMI
PCI_CLK_711
R628
R628
*68_4
*68_4
1 2
C839
C839
*10P_4
*10P_4
AD[0..31] 15,29
CBE3# 15,29
CBE2# 15,29
CBE1# 15,29
CBE0# 15,29
PCI_CLK_711 2
DEVSEL# 15,29
FRAME# 15,29
IRDY# 15,29
TRDY# 15,29
STOP# 15
PAR 15
PERR# 15
SERR# 15
REQ0# 15
GNT0# 15
PCIRST# 15,29
RI# 16
711_PME#
PCMSPK 36
T164T164
T161T161
CLKRUN# 16,38,39
SERIRQ 16,38,39
INTE# 15
AD25
C850
C850
.1U-10V_4
.1U-10V_4
R634 100_4 R634 100_4
R624 *0_4 R624 *0_4
R626 0_4 R626 0_4
T174T174
C858
C858
.1U-10V_4
.1U-10V_4
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
C861
C861
.1U-10V_4
.1U-10V_4
U51A
U51A
F5
F4
G7
G5
G4
H7
H6
H5
J5
J4
K5
K6
L6
L7
M4
M5
T5
R6
T6
N7
R7
N8
P8
R8
N9
R9
T9
R10
T10
P10
N10
T11
H4
M6
T4
T8
J7
L4
P4
M7
N4
N6
P5
R5
P6
R4
D4
E4
K7
P11
R12
H8
P14
R14
P13
T13
N11
OZ711MP1BN
OZ711MP1BN
7
+3V
F13
AD31
GNDE9GND
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
C/BE3#
C/BE2#
C/BE1#
C/BE0#
IDSEL
PCI_CLK
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PERR#
SERR#
REQ#
GNT#
PCI_RST#
RI_OUT#/PME#
SPKR_OUT#
SKTA_ACTV
ODR_ACTV
MF6(CLKRUN#)
MF4(MS_CD#)
MF3(SIRQ#)
MF0(INTA#)
J15
GNDG6GND
K19
L5
K4
GND
GND
+3V
G15
L14
F11
J6
P9
PCI_VCC
PCI_VCC
CORE_VCC
CORE_VCC
CORE_VCCE7CORE_VCC
XD_WE#/SC_3V#
SD_CD#T7XD_WPI/SD_WP
XD_RE#/SD/MS_3V#
XD_WPO/SC_5V#
XD/SC_CD#
U7
U9
U5
T14
N12
U11
6
R613 22K_4 R613 22K_4
R615 22K_4 R615 22K_4
P12
N5
CORE_VCC
CORE_VCC
CORE_VCC
XD_ALE/SD_CMD/MS_BS
XD/SD/MS_D3
XD/SD/MS_D2
XD/SD/MS_D1
XD/SD/MS_D0
XD_CLE/SD/MS_CLK/VPPD1
R15
XD_R/B#/SC_CLK
C5
T12
K16
N14
R11
XD_D5/SC_IO
XD_D4/SC_FCB
C9
C7
C15
T15
R16
T16
VCCD1#/SCLK
VPPD0/SLATCH
VCCD0#/SDATA
CDEVSEL#
CCLKRUN#
XD_D7/SC_C8
XD_D6/SC_RST
SC_VCC/XD_VCC
C13
C11
MC_PWR_CTRL_0#
D10
SKT_VCC
E5
CAD31
F6
CAD30
E6
CAD29
D6
CAD28
F7
CAD27
D9
CAD26
G10
CAD25
F10
CAD24
D11
CAD23
G11
CAD22
D12
CAD21
F12
CAD20
D13
CAD19
E13
CAD18
G13
CAD17
H15
CAD16
J13
CAD15
H16
CAD14
J16
CAD13
J14
CAD12
K13
CAD11
K14
CAD10
K15
CAD9
L15
CAD8
L13
CAD7
M14
CAD6
M15
CAD5
N16
CAD4
M13
CAD3
N13
CAD2
N15
CAD1
P16
CAD0
E15
CCLK
E14
CFRAME#
D15
CIRDY#
D16
CTRDY#
E16
F15
CSTOP#
G16
CPAR
F16
CPERR#
D8
CSERR#
E11
CREQ#
F14
CGNT#
G9
CINT#
G14
CBLOCK#
G8
E12
CRST#
D5
R2_D2
M16
R2_D14
H13
R2_A18
F9
CVS1
G12
CVS2
P15
CCD1#
D7
CCD2#
E8
CAUDIO
F8
CSTSCHG
E10
CC/BE3#
D14
CC/BE2#
H14
CC/BE1#
L16
CC/BE0#
A_CAD31
A_CAD30
A_CAD29
A_CAD28
A_CAD27
A_CAD26
A_CAD25
A_CAD24
A_CAD23
A_CAD22
A_CAD21
A_CAD20
A_CAD19
A_CAD18
A_CAD17
A_CAD16
A_CAD15
A_CAD14
A_CAD13
A_CAD12
A_CAD11
A_CAD10
A_CAD9
A_CAD8
A_CAD7
A_CAD6
A_CAD5
A_CAD4
A_CAD3
A_CAD2
A_CAD1
A_CAD0
5
A_VCC
R650 33_4 R650 33_4
A_CFRAME#
A_CIRDY#
A_CTRDY#
A_CDEVSEL#
A_CSTOP#
A_CPAR
A_CPERR#
A_CSERR#
A_CREQ#
A_CGNT#
A_CINT#
A_CBLOCK#
A_CCLKRUN#
A_CRST#
A_CRSVD/D2
A_RSVD/D14
A_CRSVD/A18
A_CVS1#
A_CVS2#
A_CCD1#
A_CCD2#
A_CAUDIO
A_CSTSCHG
A_CC/BE3#
A_CC/BE2#
A_CC/BE1#
A_CC/BE0#
4
O2MICRO OZ2211 16PIN SINGLE SLOT PARALLEL
POWER SWITCH(THIS IMPLEMENTATION DOES NOT
SUPPORT 12V VPP.
+5V +3V
3
4
5
6
9
1
2
15
14
7
U59
U59
OZ2211SN
OZ2211SN
+3.3VIN
+3.3VIN
+5VIN
+5VIN
+12VIN
VCC5#(DO)
VCC3#(D1)
VPP_PGM(D0)
VPP_VCC(D1)
GND
Place near U182(power switch)
A_VCC
C926
C926
4.7U-10V_8
4.7U-10V_8
A_VPP +5V
C918
A_CCLK1 A_CCLK
+3V +3V +5V
C918
4.7U-10V_8
4.7U-10V_8
+3V
C928
C928
.1U-10V_4
.1U-10V_4
C1C:Change Smart card schematic
15V
C913
C913
.1U-10V_4
.1U-10V_4
C931
C931
4.7U-10V_8
4.7U-10V_8
3
A1A:Connect A_VPP to A_VCC since the Oz711MP1
do not control the VPP of OZ2211
A_VPP A_VCC
A_VCC
VCC
VCC
VCC
VPP
OC#
SHDN#
C934
C934
.1U-10V_4
.1U-10V_4
C917
C917
.1U-10V_4
.1U-10V_4
13
12
11
10
8
16
C929
C929
.1U-10V_4
.1U-10V_4
C925
C925
4.7U-10V_8
4.7U-10V_8
T172T172
+3V
A_CAD0
A_CAD1
A_CAD3
A_CAD5
A_CAD7
A_CC/BE0#
A_CAD9
A_CAD11
A_CAD12
A_CAD14
A_CC/BE1#
A_CPAR
A_CPERR#
A_CGNT#
A_CINT#
A_CCLK1
A_CIRDY#
A_CC/BE2#
A_CAD18
A_CAD20
A_CAD21
A_CAD22
A_CAD23
A_CAD24
A_CAD25
A_CAD26
A_CAD27
A_CAD29
A_CRSVD/D2
A_CCLKRUN#
A_CCD1#
A_CAD2
A_CAD4
A_CAD6
A_RSVD/D14
A_CAD8
A_CAD10
A_CVS1#
A_CAD13
A_CAD15
A_CAD16
A_CRSVD/A18
A_CBLOCK#
A_CSTOP#
A_CDEVSEL#
A_CTRDY#
A_CFRAME#
A_CAD17
A_CAD19
A_CVS2#
A_CRST#
A_CSERR#
A_CREQ#
A_CC/BE3#
A_CAUDIO
A_CSTSCHG
A_CAD28
A_CAD30
A_CAD31
A_CCD2#
2
A1A:Change cardbus headr to 130601-5(H=0)
TOP MOUNT
CN12
CN12
1
GND1
2
SKTAAD0/D3
3
SKTAAD1/D4
4
SKTAD3/D5
5
SKTAD5/D6
6
SKTAAD7/D7
7
-SKTACBE0/CE1#
8
SKTAAD9/A10
9
SKTABAD11/OE#
10
SKTAAD12/A11
11
SKTAAD14/A9
12
-SKTACBE1/A8
13
SKTAPAR/A13
14
-SKTAPERR/A14
15
-SKTAGNT/WE#
16
-SKTAINT/RDY
19
SKTAPCLK/A16
20
-SKTAIRDY/A15
21
-SKTACBE2/A12
22
SKTAAD18/A7
23
SKTAAD20/A6
24
SKTAAD21/A5
25
SKTAAD22/A4
26
SKTAAD23/A3
27
SKTAAD24/A2
28
SKTAAD25/A1
29
SKTAAD26/A0
30
SKTAAD27/D0
31
SKTAAD29/D1
32
SKTARSVD/D2
33
-SKTACLKRUN/WP
34
GND2
35
GND3
36
-SKTACD1/CD1#
37
SKTAAD2/D11
38
SKTAD4/D12
39
SKTAAD6/D13
40
SKTARSVD/D14
41
SKTAAD8/D15
42
SKTAAD10/CE2#
43
-SKTAVS1/VS1#
44
SKTAAD13/IORD#
45
SKTAAD15/IOWR#
46
SKTAAD16/A17
47
-SKTRSVD/A18
48
-SKTALOCK/A19
49
-SKTASTOP/A20
50
-SKTADEVSEL/A21
53
-SKTATRDY/A22
54
-SKTAFRAME/A23
55
SKTAAD17/A24
56
SKTAAD19/A25
57
-SKTAVS2VS2#
58
-SKTARST/RESET
59
0SKTASERR/WAIT#
60
-SKTAREQ/INPACK#
61
-SKTACBE3/REG#
62
SKTAAUDIO/BVD2
63
-SKTASTSCHG/BVD1
64
SKTAAD28/D8
65
SKTAAD30/D9
66
SKTAAD31/D10
67
-SKTACD2/CD2#
68
GND4
CARDBUS SLOT
SANTA-130601-5-68P
SANTA-130601-5-68P
UPPER PIN
UPPER PIN
LOWER PIN
LOWER PIN
SKTA/VCC1
SKTA/VCC2
SKTA/VPP1
SKTA/VPP2
GND5
GND6
GND7
GND8
1
A_VCC
17
51
A_VPP
18
52
69
70
71
72
+3V +3V
R633
R633
10K_4
10K_4
SMARTCARD_VDD
A A
2
D35
D35
+3V
CH715F
CH715F
1
8
2
PCI_PME# 711_PME#
1
Q36 2N7002 Q36 2N7002
3
PCI_PME# 15
D2B:Add D35,C965,C966 for smart card VCC
C965
C965
4.7U/10V_0805
4.7U/10V_0805
SMARTCARD_711MP1
C966
C966
.1U/10V_0402
.1U/10V_0402
7
3
T175T175
T177T177 T180T180 T176T176 T179T179
T182T182
T181T181
T178T178
T183T183
+5V
R759 47K_4 R759 47K_4
D2B:Change R759 From CS34703J901 to CS34702JB21
+3V
C2A:Ad R774 for SC_DET#
R774
R774
10K_4
10K_4
6
SMARTCARD_711MP1
R749
R749
200_4
200_4
R756
R756
200_4
200_4
R752
R752
200_4
200_4
R757
R757
200_4
200_4
R758
R758
33_4
33_4
SC_IO
SC_DET#
SC_C8
SC_RST
SC_IO
SC_C4
SC_CLK
SC_5V#
SC_3V#
SC_DET#
R750
R753
R753
R754
R754
10K_4
10K_4
10K_4
10K_4
5
D38
D38
1SS355
1SS355
D39
D39
1SS355
1SS355
10K_4
10K_4
2 1
2 1
R755
R755
R750
100K_4
100K_4
1 2
3
2
1
4
Q55
Q55
2N7002
2N7002
R751
R751
33_4
33_4
3
Q54
Q54
2
IRLML2502
IRLML2502
1
SC_C4
SC_CLK
SC_RST
SMARTCARD_VDD
SC_DET#
SC_IO
SC_C8
3
CN10
CN10
1
C4
2
C3
3
C2
4
C1
5
SW-CD
6
NC
7
SW-GND
8
C5
9
C6
10
C7
11
C8
12
NC
85201-12021_SCR_CONN
85201-12021_SCR_CONN
R/A Top Contact
A_CCD1#
A_CCD2#
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
+3V
B1B:Add U63 for Cardbus detect
D2B:Remove U63 for Cardbus detect
U63
U63
2
1
2
4
*TC7SH08FU
*TC7SH08FU
3 5
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
OZ711MP1-PCMCIA-SMART CARD
OZ711MP1-PCMCIA-SMART CARD
OZ711MP1-PCMCIA-SMART CARD
CARDBUS_DET 39
30 46 Monday, November 28, 2005
30 46 Monday, November 28, 2005
30 46 Monday, November 28, 2005
1A
1A
1A
of
of
of
1
5
C864
C864
10U-10V_8
10U-10V_8
U51B
U51B
C830
C830
+3V
K1
F1
.1U-10V_4
.1U-10V_4
H1
AVCCM1AVCC
CORE_VCC
D D
M19
R356
R356
5
SD_PWR
MS_PWR
N19
H19
R13
U13
U15
SD_D0
SD_D1
SD_D2
SD_D3
SD_CLKR
SD_CMD
SD_CD#
SD_WP
MS_D0
MS_D1
MS_D2
MS_D3
MS_CLKR
MS_INS
MS_BS
J19
G1
J1
CPS
RI1
XI
XO
TEST_PHY
NC
NC
NC
NC
C849
C849
10U-6.3V_8
10U-6.3V_8
P10
P3
P2
P20
P18
P7
P15
P21
P1
P22
P23
P4
P12
P17
P9
P8
P11
P14
P16
P13
P6
P19
P5
R013-000-XX_CARD READER
R013-000-XX_CARD READER
R623 5.9K_4 R623 5.9K_4
1394_XIN
SD/MMC
1394_XIN 1394_XOUT
C844
C844
12P-50V_4
12P-50V_4
1394_XOUT
+3V
100K_4
100K_4
Y7
1 2
C852
C852
24.576MHZY724.576MHZ
12P-50V_4
12P-50V_4
C C
SD_DET
R354 10K_4 R354 10K_4
D2B:Connect CN14 pin 4,12,22,23 to GND
MS/MS pro
MS_CLK
R358 33_4 R358 33_4
C580
C580
10P_4
R766
R766
10P_4
B B
+3V
R765
R765
100K_4
100K_4
100K_4
100K_4
MS_INS
SM_CD
A A
CORE_VCC
GNDP1GNDP7GND
GND
GND
F19
P19
G19
CN14
CN14
SD-VCC
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3
SD-CLK
SD-CMD
SD-CD
SD-WP
SD-WP/SDIO GND
SD-CD/SDIO GND
SD-GND
SD-GND
MS-VCC
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3
MS-SCLK
MS-INS
MS-BS
MS-GND
MS-GND
20 mil 20 mil 20 mil
SD_PWR
C641
C641
C962
C962
10U-10V_8
10U-10V_8
1M_4
1M_4
W13
TPA0+
W12
TPA0-
W11
TPB0+
W10
TPB0-
W9
TPA1+
W8
TPA1-
W7
TPB1+
W6
TPB1-
W14
TPBIAS0
N1
TPBIAS1
L1
VR_CPR
L19
VR_CPR
OZ711MP1BN
OZ711MP1BN
GND_PAD
P24
6 IN1 CARD READER
(MS,MS pro,SD, MMC,xD,SDIO)
SM_PWR
C963
C963
C573
C573
10U-10V_8
10U-10V_8
.1U-10V_4
.1U-10V_4
.1U-10V_4
.1U-10V_4
XD-WP-IN
XD-GND
XD-GND
C576
C576
TPA0P
TPA0N
TPBIAS0
XD-VCC
XD-CD
XD-R/B
XD-RE
XD-CE
XD-CLE
XD-ALE
XD-WE
XD-D0
XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7
4
A1A:1394 function of OZ711MP1 do not used the EEPROM , and Oz711MP1
put the GUID in PCI register , So , 24Lc02BT can be remove
TPB0P
TPB0N
C828
C828
1U-16V_6
1U-16V_6
MS_PWR +3V
C964
C964
10U-10V_8
10U-10V_8
D2B:Change C845 to 1M_4(CS51002JB21) D2B:Change C641 to 1M_4(CS51002JB21)
C835
C835
22U-6.3V_8
22U-6.3V_8
18
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
19
C845
C845
1M_4
1M_4
4
TPBIAS0
SM_CD
SM_BR
SM_RE
SM_CE
SM_CLE
SM_ALE
SM_WE
SM_WP_IN
SM_D0
SM_D1
SM_D2
SM_D3
SM_D4
SM_D5
SM_D6
SM_D7
R606
R606
56.2/F_4
56.2/F_4
R610
R610
56.2/F_4
56.2/F_4
R625
R625
5.1K/F_4
5.1K/F_4
SM_PWR
Check GPIO Pin & Det
C826
1U-16V_6
1U-16V_6
R607
R607
56.2/F_4
56.2/F_4
R445 0_4 R445 0_4
R444 0_4 R444 0_4
R442 0_4 R442 0_4
R443 0_4 R443 0_4
R611
R611
56.2/F_4
56.2/F_4
A1A:Change the C1885 filter Cap
value from 270 pf to 820 pf
C838
C838
820P_6
820P_6
Group 1 and 2 not populated:
Firmware in Internal ROM
No unique serial number
Group 2 populated:
Firmware in External FLASH
Unique serial number and configuration in FLASH
R359 2.2K_4 R359 2.2K_4
SM/xD
SM_PWR
R767
R767
100K_4
100K_4
EE_DIO
R369 10K_4 R369 10K_4
Group 1 populated:
Firmware in Internal ROM
Unique serial number and configuration in EEPROM
External EEPROM
C2B:Stuff U16,R368
E3A:Change U16 to AR0ZC1C1009
External FLASH
R361
R361
MC0
MC1
*10K_4
*10K_4
MC2
EE_DIO
EE_CLK
EE_CS
3
USBP4+ 15
USBP4- 15
L1394_TPA0+
L1394_TPA0-
L1394_TPB0+
L1394_TPB0-
CN16
CN16
1
3
4
2
020204FR004S502ZL_1394 CONN
020204FR004S502ZL_1394 CONN
A1A:Change1394 footprint to
1394-020204fr004s502zx-c-4p-v
B1B:Change pin 7,8 to GND
B1B:Change 1394 p/n to DFHS04FS578
E3A:Change 1394 footprint to 1394-020204fr004s109zl-4p-v8
U49
U49
12
DQ0
A0
11
DQ1
A1
10
DQ2
A2
9
A3
DQ3
8
A4
DQ4
7
A5
DQ5
6
A6
DQ6
5
A7
DQ7
27
A8
26
A9
23
A10
25
A11
4
A12
28
A13
29
VCC
A14
3
A15
2
A16
24
OE
31
WE
22
GND
CE
*SST39VF010-70-4C-WHE
*SST39VF010-70-4C-WHE
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
MA15
ROMEN
L1394_TPB0ÂL1394_TPA0ÂL1394_TPA0+
L1394_TPB0+
5
6
7
8
MD0
13
MD1
14
MD2
15
MD3
17
MD4
18
MD5
19
MD6
20
MD7
21
+3V
32
C867
C867
*.1U-10V_4
*.1U-10V_4
16
C2B:Remove U49,C867,R361
R368 1K_4 R368 1K_4
U16
U16
4
DI3DO
2
CLK
6
ORG
1
CS
AT93C66A-10TU-2.7(TSSOP)
AT93C66A-10TU-2.7(TSSOP)
+3V
8
VCC
GND
C853
C853
.1U-10V_4
.1U-10V_4
5
3
R763 0_6 R763 0_6
R762 0_6 R762 0_6
SM_BR
CARD_USBP4+
CARD_USBP4-
SM_PWR
R345
R345
10K_4
10K_4
+3V
100K_4
100K_4
.1U-10V_4
.1U-10V_4
18P-50V_4
18P-50V_4
C553
C553
24MHz(+-30PPM)
24MHz(+-30PPM)
H=1.5
C552 18P-50V_4 C552 18P-50V_4
SD_CMD
SD_WP
R141
R141
C529
C529
MS_INS
C945
C945
.1U-10V_4
.1U-10V_4
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
CARD_XTAL1
1 2
Y1
Y1
CARD_XTAL2
10K_4
10K_4
R370
R370
SD_WP
2
SD_CMD
SM_CD
SM_WPS
2
U1
U1
USBDP88ATEST
87
USBDM
Secure Digital
Secure Digital
30
SD_CMD
25
SD_WP
Smart Media
Smart Media
78
SM_CD
76
SM_WPS
77
SM_B/R
Compact Flash
Compact Flash
53
CF_CD1
54
CF_CD2
55
CF_IRQ
56
CF_IORDY
Memory Stick
Memory Stick
18
MS_INS
Memory Interface
Memory Interface
5
MD0
6
MD1
7
MD2
8
MD3
9
MD4
10
MD5
11
MD6
12
MD7
Miscellaneous
Miscellaneous
115
RESET
96
TEST0
95
TEST1
102
XTAL1
R344
R344
1M_4
1M_4
103
XTAL2
15
VSS
16
VSS
47
VSS
84
VSS
85
VSS
97
VSS
112
VSS
86
VSSA
104
VSSPLL
USB2228-NU-XX_VTQFP128
USB2228-NU-XX_VTQFP128
R1 10K_4 R1 10K_4 C826
R237 *10K_4 R237 *10K_4
RBIAS
USB
USB
SD_DAT0
SD_DAT1
SD_DAT2
SD_DAT3
SD_CLK
SM_D0
SM_D1
SM_D2
SM_D3
SM_D4
SM_D5
SM_D6
SM_D7
SM_ALE
SM_CLE
SM_RE
SM_WE
SM_WP
SM_CE
CF_D0
CF_D1
CF_D2
CF_D3
CF_D4
CF_D5
CF_D6
CF_D7
CF_D8
CF_D9
CF_D10
CF_D11
CF_D12
CF_D13
CF_D14
CF_D15
CF_SA0
CF_SA1
CF_SA2
CF_CS0
CF_CS1
CF_IOR
CF_IOW
CF_RESET
MS_D0
MS_D1
MS_D2
MS_D3
MS_SCLK
MS_BS
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
MA15
MRD
MWR
MCE
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6/ROMEN
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
VDDIO33
VDDIO33
VDDIO33
VDDCORE33
VDDCORE33
VDDA33
VDD18
VDD18
VDD18PLL
1
+3V
SD_PWR
R347 2.2K_4 R347 2.2K_4
99
R346 12K_4 R346 12K_4
98
SD_D0
26
SD_D1
27
SD_D2
28
SD_D3
29
SD_CLK
R254 33_4 R254 33_4
31
SM_D0
65
SM_D1
66
SM_D2
67
SM_D3
68
SM_D4
69
SM_D5
70
SM_D6
71
SM_D7
72
73
75
81
82
74
83
32
33
34
35
36
37
38
39
40
41
45
46
48
50
51
52
62
63
64
60
61
57
58
59
MS_D0
19
MS_D1
20
MS_D2
21
MS_D3
22
MS_CLK
23
MS_BS
24
MA0
116
MA1
117
MA2
118
MA3
119
MA4
120
MA5
121
MA6
122
MA7
123
MA8
124
MA9
125
MA10
126
MA11
127
MA12
128
MA13
1
MA14
2
MA15
4
MC0
13
MC1
14
MC2
17
114
EE_CS
113
94
111
110
109
107
42
105
79
44
93
92
91
90
3
43
80
100
108
89
49
106
101
Check USB2.0 Power
VBUS_DET
EE_DIO
SD_DET
ROMEN
EE_CLK
MS_PWR
SM_PWR
SD_PWR
C471
C471
.1U-10V_4
.1U-10V_4
CARD_VDD18
C946
C946
4.7U-10V_8
4.7U-10V_8
C569
C569
4.7U-10V_8
4.7U-10V_8
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
OZ711MP1-IEEE1394-SMART CARD
OZ711MP1-IEEE1394-SMART CARD
OZ711MP1-IEEE1394-SMART CARD
Date: Sheet of
Date: Sheet
Date: Sheet
5pF attached to SD_D0 and GND
for 48M compatibility issue
R240
R240
*10K_4
*10K_4
SD_CLKR
C1
10P_4C110P_4
*10K_4
*10K_4
R238
R238
R239
R239
*2.2K_4
*2.2K_4
*10K_4
*10K_4
R335 100K_4 R335 100K_4
R764
R764
C961
C961
100K_4
100K_4
1U-16V_6
1U-16V_6
Place C567 at pin 100, C542 at
+3V
pin 108, and C524 at pin 89.
C548
C548
C558
C558
.1U-10V_4
.1U-10V_4
10U-6.3V_8
10U-6.3V_8
C556
C556
.1U-10V_4
.1U-10V_4
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
1
*10K_4
*10K_4
R353
R353
SD_D0
R142
R142
.1U-10V_4
.1U-10V_4
SM_PWR
*10K_4
*10K_4
C524
C524
C944
C944
5P-50V_4
5P-50V_4
R233
R233
+5V
+3V
R235
R235
*2.2K_4
*2.2K_4
SM_ALE
SM_CLE
SM_RE
SM_WE
SM_WP_IN
SM_CE
External xD
resistors
C542
C542
.1U-10V_4
.1U-10V_4
31 46 Wednesday, November 30, 2005
31 46 Wednesday, November 30, 2005
31 46 Wednesday, November 30, 2005
C567
C567
10U-6.3V_8
10U-6.3V_8
1A
1A
1A
of
of
5
100MBPS# 28
ACT# 28
KPCLK 39
KPDATA 39
MSCLK 39
D D
MSDATA 39
MDSR1# 38
MRTS1# 38
MCTS1# 38
MRI1 38
MDCD1# 38
MRXD1 38
MTXD1 38
MDTR1# 38
SPDIF_OUT 36,37
AUDGND1
SPKR_SYS 37
SPKL_SYS 37
LINEINR_PR 37
LINEINL_PR 37
PR_MIC 37
AUDGND1
PR_MIC_IN 37
HPSENCE_PR 37
C C
R745 0_4 R745 0_4
R744 0_4 R744 0_4
R746 0_4 R746 0_4
R747 0_4 R747 0_4
R748 0_4 R748 0_4
R455 0_4 R455 0_4
SUSON_PR
MAINON_PR
DOCKPRG
KPCLK
KPDATA
MSCLK
MSDATA
MDSR1#
MRTS1#
MCTS1#
MRI1
MDCD1#
MRXD1
MTXD1
MDTR1#
R15 0_6 R15 0_6
SPKR_DOCK
SPKL_DOCK
LINEINR_DOCK
LINEINL_DOCK
PR_MIC_DOCK
+3V_S5
R7
10K_4R710K_4
8
31
33
55
56
85
52
51
54
53
48
46
44
42
49
47
45
43
50
41
72
74
75
70
71
73
76
69
40
124
DOCKIN
CN21-4
CN21-4
LANLED_LINK
LANLED_ACT
GND33
SUSON
MAINON
BRG_PWROK
PS2KBCK
PS2KBDT
PS2MSCK
PS2MSDT
DSR#
RTS#
CTS#
RI
DCD#
RXD#
TXD#
DTR#
GND50
SPDIF_OUT
AGND72
LINEOUT_R
LINEOUT_L
LINEIN_R
LINEIN_L
MICIN
AGND76
PRMIC_DET
HPSENSE_PR
G2
EZ4_Acer_define
EZ4_Acer_define
DOCKPRG
3
DOCKIN#
B B
D2B:Reserve 100pf for KPCLK,KPDATA,MSCLK,MSDATA
A A
2
Q2
2N7002Q22N7002
KPCLK
KPDATA
MSCLK
MSDATA
SPKL_SYS
SPKR_SYS
LINEINL_PR
LINEINR_PR
PR_MIC_IN
PR_MIC
100MBPS#
ACT#
TV_COMP_PR
TV_C/R_PR
TV_Y/G_PR
1
C968 *100P-50V_6 C968 *100P-50V_6
C969 *100P-50V_6 C969 *100P-50V_6
C970 *100P-50V_6 C970 *100P-50V_6
C971 *100P-50V_6 C971 *100P-50V_6
C19 220P-50V_4 C19 220P-50V_4
C20 220P-50V_4 C20 220P-50V_4
C23 220P-50V_4 C23 220P-50V_4
C22 220P-50V_4 C22 220P-50V_4
C655 47P-50V_4 C655 47P-50V_4
C21 47P-50V_4 C21 47P-50V_4
C652 10P-50V_4 C652 10P-50V_4
C651 10P-50V_4 C651 10P-50V_4
1000P-50V_4 C653 1000P-50V_4 C653
1000P-50V_4 C649 1000P-50V_4 C649
10P-50V_4 C650 10P-50V_4 C650
CN21-3
CN21-3
RESERVE32
RESERVE82
EZ4_Acer_define
EZ4_Acer_define
1
2
R9
1M/F_4R91M/F_4
GND100
TV_COMPS
TV_LUMA
TV_CRMA
GND104
STRB#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PE
AFD#
ERROR#
INIT#
SLIN#
ACK#
BUSY
SLCT
GND58
GND77
GND110
G1
GND126
+3V_S5
5 3
4
U2
U2
TC7SH08FU
TC7SH08FU
PR_CRTHSYNC
PR_CRTVSYNC
PR_BLU
PR_GRN
PR_RED
CRTHSYNC
CRTVSYNC
DDCCLK_1
DDCDAT_1
X-TX1P-PR
X-TX1N-PR
X-TX0P-PR
X-TX0N-PR
X-TX3P-PR
X-TX3N-PR
X-TX2P-PR
X-TX2N-PR
C15
C15
.1U-10V_4
.1U-10V_4
4
100
TV_COMP_PR
101
TV_Y/G_PR
102
TV_C/R_PR
103
104
STRB#
9
PD0
11
PD1
13
PD2
15
PD3
17
PD4
18
PD5
19
PD6
20
PD7
21
PE
24
AFD#
10
ERROR#
12
INIT#
14
SLIN#
16
ACK#
22
BUSY
23
SLCT
25
58
77
110
32
82
123
126
AUDGND1
C661 *10P_4 C661 *10P_4
C662 *10P_4 C662 *10P_4
C660 10P-50V_4 C660 10P-50V_4
C659 10P-50V_4 C659 10P-50V_4
C658 10P-50V_4 C658 10P-50V_4
C667 *10P_4 C667 *10P_4
C668 *10P_4 C668 *10P_4
C657 10P-50V_4 C657 10P-50V_4
C656 10P-50V_4 C656 10P-50V_4
C12 10P-50V_4 C12 10P-50V_4
C8 10P-50V_4 C8 10P-50V_4
C3 10P-50V_4 C3 10P-50V_4
C4 10P-50V_4 C4 10P-50V_4
C25 10P-50V_4 C25 10P-50V_4
C24 10P-50V_4 C24 10P-50V_4
C6 10P-50V_4 C6 10P-50V_4
C7 10P-50V_4 C7 10P-50V_4
TV_COMP_PR 25
TV_Y/G_PR 25
TV_C/R_PR 25
STRB# 38
PE 38
AFD# 38
ERROR# 38
INIT# 38
SLIN# 38
ACK# 38
BUSY 38
SLCT 38
C18
C18
.1U-10V_4
.1U-10V_4
R456 0_4 R456 0_4
TMDS_DDCDATA 19
PR_STS 39
TMDS_DDCCLK 19
+5V
HSYNC_EZ4 26
VSYNC_EZ4 26
DDCCLK_1 26
DDCDAT_1 26
VGA_RED_PR 26
VGA_GRN_PR 26
VGA_BLU_PR 26
CLK_PCIE_EZ1 2
PD[0..7] 38
A1A:Change EZ1 from PCIE1 to PCIE4
A1A:Change EZ2 from PCIE1 to PCIE5
PLTRST# 15,16,18,27,29,33,38,39
R471
R471
2.2K_4
2.2K_4
CLK_PCIE_EZ1# 2
PCIE_RXP4 15
PCIE_RXN4 15
CLK_PCIE_EZ2 2
CLK_PCIE_EZ2# 2
PCIE_RXP5 15
PCIE_RXN5 15
EZ_CLKREQ# 2
2
1
+3V
R11
R11
2.2K_4
2.2K_4
2
1
3
CRTHSYNC
CRTVSYNC
DDCCLK_1
DDCDAT_1
PCIE_TXP4 15
PCIE_TXN4 15
PCIE_TXP5 15
PCIE_TXN5 15
D19 BAS316 D19 BAS316
PDAT_SMB 2,16,27,29,33,35
PCLK_SMB 2,16,27,29,33,35
+5V +3V
Q26
Q26
3
FDV301N
FDV301N
+5V
Q4
3
FDV301NQ4FDV301N
R475
R475
100K_4
100K_4
L9 BK1608LL121_6 L9 BK1608LL121_6
PR_CRTHSYNC
PR_CRTVSYNC
L8 BK1608LL121_6 L8 BK1608LL121_6
L12 BK1608LL121_6 L12 BK1608LL121_6
L11 BK1608LL121_6 L11 BK1608LL121_6
L10 BK1608LL121_6 L10 BK1608LL121_6
2 1
R452
R452
10K_4
10K_4
DVI_DDCDATA
R12 0_4 R12 0_4
VA
B: CHANGE TO FDV301N
R458
R458
10K_4
10K_4
DVI_DDCCLK
DOCKIN# 16,25,28
+3V_S5
DOCKIN#
C654
C654
.1U-10V_4
.1U-10V_4
PR_RED
PR_GRN
PR_BLU
DVI_DDCDATA 25
DVI_DDCCLK 25
R465
R465
10K_4
10K_4
2
Q27
Q27
2N7002
2N7002
78
79
81
80
105
106
107
108
109
117
119
120
118
115
116
114
111
112
113
29
30
27
59
60
28
89
90
88
57
26
86
83
87
122
125
+5V
3
1
CN21-2
CN21-2
CRT_HS
CRT_VS
CRT_DDCK
CRT_DDCDT
GND105
VGA_R
VGA_G
VGA_B
GND109
GND117
PCIE1_CLK+
PCIE1_CLKÂGND118
PCIE1_TP
PCIE1_TN
GND114
PCIE1_RP
PCIE1_RN
GND113
PCIE2_CLK+
PCIE2_CLKÂGND27
PCIE2_TP
PCIE2_TN
GND28
PCIE2_RP
PCIE2_RN
GND88
PCIERST
PCIEWAKE
PCIESMBDT
PCIESMBCK
PCIEREQ#
P2
GND125
EZ4_Acer_define
EZ4_Acer_define
C5
C5
.1U-50V_6
.1U-50V_6
2
CN21-1
CN21-1
EZ4_Acer_define
EZ4_Acer_define
VA
C2
C2
.1U-50V_6
.1U-50V_6
SUSON_PR
MAINON_PR
PR_INSERT_5V 25,26
R460 0_4 R460 0_4
64
DVI_HPD
98
DVI_CLK-
97
DVI_CLK+
99
GND99
94
DVI_D0-
95
DVI_D0+
96
GND96
91
DVI_D1-
92
DVI_D1+
93
GND93
61
DVI_D2-
62
DVI_D2+
63
GND63
DVI_DDCCK
DVI_DDCDT
GND66
TX3P
TX3N
GND39
TX2P
TX2N
GND36
TX1P
TX1N
GND6
TX0P
TX0N
GND3
GND7
DOCK_IN#
DOCKED#
P1
67
65
66
37
38
39
34
35
36
4
5
6
1
2
3
7
68
R13 1K_4 R13 1K_4
84
121
X-TX3P-PR
X-TX3N-PR
X-TX2P-PR
X-TX2N-PR
X-TX1P-PR
X-TX1N-PR
X-TX0P-PR
X-TX0N-PR
DOCKIN#
DOCKIN#
R461 0_4 R461 0_4
R459 0_4 R459 0_4
7
5 3
U4B
U4B
TC7W125FU
TC7W125FU
DOCKIN#
+3V_S5
C28
1
C28
8 4
.1U-10V_4
.1U-10V_4
2 6
U4A
U4A
TC7W125FU
TC7W125FU
A1A:Change footprint to SSOP8-4-65
DVI_CLK- 25
DVI_CLK+ 25
DVI_TX0- 25
DVI_TX0+ 25
DVI_TX1- 25
DVI_TX1+ 25
DVI_TX2- 25
DVI_TX2+ 25
VA
1
R14
R14
100K_4
100K_4
DVI_DDCCLK
DVI_DDCDATA
X-TX3P-PR 28
X-TX3N-PR 28
X-TX2P-PR 28
X-TX2N-PR 28
X-TX1P-PR 28
X-TX1N-PR 28
X-TX0P-PR 28
X-TX0N-PR 28
SUSON 39,42,43
MAINON 20,39,42,43,44
TMDS_HPD 19,25
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
EZ4 CONN
EZ4 CONN
EZ4 CONN
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet of
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
32 46 Tuesday, December 06, 2005
32 46 Tuesday, December 06, 2005
32 46 Tuesday, December 06, 2005
of
1
of
1A
1A
1A
5
+NEW_1.5V Max. 650mA, Average 500mA.
+NEW_3V Max. 1300mA, Average 1000mA.
A1A:Change New card power sw to Oz27c10
+1.5V +3V +3VSUS
D D
R398 100K_4 R398 100K_4
R413 *0_4 R413 *0_4
1 2
1 2
+3VSUS
EXPRCRD_STDBY# 16
PLTRST# 15,16,18,27,29,32,38,39
Place near U20
C C
C603
C603
.1U-10V_4
.1U-10V_4
C613
C613
.1U-10V_4
.1U-10V_4
C612
C612
.1U-10V_4
.1U-10V_4
U20
U20
17
AUXIN
2
3.3VIN_0
3.3VIN_143.3VOUT_1
12
1.5VIN_0
14
1.5VIN_1
ExpressSwitch
ExpressSwitch
20
SHDN#
1
STBY#
6
SYSRST#
16
NC
7
GND
R5538D001-TR-F/OZ27C10LN
R5538D001-TR-F/OZ27C10LN
+1.5V +3V +3VSUS
C598
C598
.1U-10V_4
.1U-10V_4
C599
C599
.1U-10V_4
.1U-10V_4
3.3VOUT_0
1.5VOUT_0
1.5VOUT_1
D2B:Remove HOLE6
HOLE22
HOLE22
*H-C79D79N
*H-C79D79N
1
B B
HOLE26
HOLE19
HOLE19
*H-C276D106I186A186P2
*H-C276D106I186A186P2
1
HOLE14
HOLE14
*H-C256D106I186A186P2
*H-C256D106I186A186P2
HOLE26
*H-C276D106I186A186P2
*H-C276D106I186A186P2
1
HOLE12
HOLE12
*H-C276D106I186A186P2
*H-C276D106I186A186P2
HOLE21
HOLE21
*H-C236D146I226A226P2
*H-C236D146I226A226P2
1
TPM
HOLE24
HOLE24
*H-C276D106I186A186P2
*H-C276D106I186A186P2
1
HOLE13
HOLE13
*H-C79D79N
*H-C79D79N
HOLE25
HOLE25
*H-C276D106I186A186P2
*H-C276D106I186A186P2
1
HOLE3
HOLE3
*H-C276D106I186A186P2
*H-C276D106I186A186P2
AUXOUT
PERST#
CPPE#
CPUSB#
OC#
RCLKEN
4
+NEW_3VAUX +NEW_3V +NEW_1.5V
15
3
5
11
13
8
10
9
19
PERST#
CPPE#
R386 100K_4 R386 100K_4
CPUSB#
R387 100K_4 R387 100K_4
18
PDAT_SMB 2,16,27,29,32,35
Q23 2N7002 Q23 2N7002
PCLK_SMB 2,16,27,29,32,35
Q24 2N7002 Q24 2N7002
HOLE23
HOLE23
*H-C276D106I186A186P2
*H-C276D106I186A186P2
1
HOLE2
HOLE2
*H-C276D106I186A186P2
*H-C276D106I186A186P2
HOLE17
HOLE17
*H-C276D106I186A186P2
*H-C276D106I186A186P2
1
HOLE4
HOLE4
*H-C276D106I186A186P2
*H-C276D106I186A186P2
3
+NEW_3VAUX
+3VSUS
+NEW_3V
1 2
1 2
+NEW_3V
2
4
RP44
RP44
10K_4P2R
2
3
+NEW_3V
10K_4P2R
1
3
NEW_SMDATA
1
C597
C597
.1U-10V_4
.1U-10V_4
C611
C611
.1U-10V_4
.1U-10V_4
Place near U20
+NEW_1.5V
C600
C600
.1U-10V_4
.1U-10V_4
CLK_PCIE_NEW_C 2
CLK_PCIE_NEW_C# 2
NEW_CLKREQ# 2
USBP5- 15
USBP5+ 15
2
3
NEW_SMCLK
1
HOLE10
HOLE10
*H-C315D146I226A226P2
*H-C315D146I226A226P2
CPU
PAD13
PAD13
*EMIPAD
*EMIPAD
1
PAD14
PAD14
*EMIPAD
*EMIPAD
1
2
PCIE_TXP0 15
PCIE_TXN0 15
PCIE_RXP0 15
PCIE_RXN0 15
1
3
RP68 0_4P2R_S RP68 0_4P2R_S
+NEW_3VAUX
+NEW_3V
PAD8
PAD8
PAD11
PAD11
*EMIPAD
*EMIPAD
*EMIPAD
*EMIPAD
1
USBP5-_CARD
2
USBP5+_CARD
4
C857
C857
1
C869
C869
C837
C837
.1U-10V_4
.1U-10V_4
4.7U-10V_8
4.7U-10V_8
PAD16
PAD16
*EMIPAD
*EMIPAD
1
1
A1A:Change New card to small type(130832-1)
.1U-10V_4
.1U-10V_4
C868
C868
CPPE#
+NEW_3V
PERST#
+NEW_3VAUX
+NEW_1.5V
NEW_SMDATA
NEW_SMCLK
CPUSB#
.1U-10V_4
.1U-10V_4
PERP0
PERN0
USBP5+_CARD
USBP5-_CARD
Reverse
CN35
CN35
26
GND1
25
PETp0
24
PETn0
23
GND2
22
PERp0
21
PERn0
20
GND3
19
REFCLK+
18
REFCLK-
17
CPPE#
16
CLKREQ#
15
+3.3V1
14
+3.3V2
13
PERST#
12
+3.3VAUX
11
WAKE#
10
+1.5V1
9
+1.5V2
8
SMB_DATA
7
SMB_CLK
6
RESERVED1
5
RESERVED2
4
CPUSB#
3
USB_D+
2
USB_D-
1
GND4
130832-1_NEW CARD
130832-1_NEW CARD
Place near CN35
+NEW_1.5V
C843
PAD17
PAD17
*EMIPAD
*EMIPAD
1
C843
.1U-10V_4
.1U-10V_4
PAD4
PAD4
*EMIPAD
*EMIPAD
1
C847
C847
.1U-10V_4
.1U-10V_4
PAD18
PAD18
*EMIPAD
*EMIPAD
1
PAD19
PAD19
*EMIPAD
*EMIPAD
1
C829
C829
4.7U-10V_8
4.7U-10V_8
PAD6
PAD6
*EMIPAD
*EMIPAD
1
C834
C834
.1U-10V_4
.1U-10V_4
PAD3
PAD3
*EMIPAD
*EMIPAD
1
PAD10
PAD10
*EMIPAD
*EMIPAD
1
1
PAD25
HOLE15
HOLE15
*H-C315D146I226A226P2
*H-C315D146I226A226P2
HOLE16
HOLE16
*H-C315D146I226A226P2
*H-C315D146I226A226P2
PAD25
*EMIPAD
*EMIPAD
PAD21
PAD21
*EMIPAD
*EMIPAD
PAD22
PAD22
*EMIPAD
*EMIPAD
PAD24
PAD24
*EMIPAD
*EMIPAD
PAD23
PAD23
*EMIPAD
*EMIPAD
PAD20
PAD20
*EMIPAD
*EMIPAD
PAD15
PAD15
*EMIPAD
*EMIPAD
PAD12
PAD12
*EMIPAD
*EMIPAD
PAD9
PAD9
*EMIPAD
*EMIPAD
PAD7
PAD7
*EMIPAD
*EMIPAD
PAD2
PAD2
*EMIPAD
*EMIPAD
PAD5
PAD5
*EMIPAD
*EMIPAD
1
1
1
HOLE18
HOLE18
*H-C236D146I226A226P2
*H-C236D146I226A226P2
A A
1
1
HOLE20
HOLE20
*H-C236D146I226A226P2
*H-C236D146I226A226P2
1
1
HOLE8
HOLE8
*H-C276D169P2
*H-C276D169P2
1
1
HOLE27
HOLE27
*H-C276D67P2
*H-C276D67P2
1
1
HOLE5
HOLE5
*H-C236D146I226A226P2
*H-C236D146I226A226P2
1
1
HOLE7
HOLE7
*H-C236D146I226A226P2
*H-C236D146I226A226P2
1
1
HOLE9
HOLE9
*H-C236D67I147A147P2
*H-C236D67I147A147P2
1
1
HOLE11
HOLE11
*H-C236D67I147A147P2
*H-C236D67I147A147P2
1
PAD26
PAD26
*EMIPAD
*EMIPAD
1
PAD27
PAD27
*EMIPAD
*EMIPAD
1
PAD28
PAD28
*EMIPAD
*EMIPAD
1
MDC MINI CARD POWER/B Thermal module
B1B:Change HOLE8,27 footprint
5
4
3
1
ADOGND ADOGND
PAD29
PAD29
PAD30
PAD30
*EMIPAD
*EMIPAD
*EMIPAD
*EMIPAD
1
2
1
1
1
PAD31
PAD31
*EMIPAD
*EMIPAD
1
1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
NEW CARD &HOLE
NEW CARD &HOLE
NEW CARD &HOLE
Date: Sheet of
Date: Sheet
Date: Sheet
1
1
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
1
1
1
1
33 46 Monday, November 28, 2005
33 46 Monday, November 28, 2005
33 46 Monday, November 28, 2005
1
C
C
of
of
C
5
+3V
SATA TO PATA
D D
+3V
B_PDCS1#
B_PDCS3#
48
45
46
VSS
IDE_CS1_b47IDE_CS0_b
IDE_DD131IDE_DD02
IDE_DD123IDE_DD035IDE_DD11
2
B_PDD13
B_PDD2
B_PDD12
+3V +1.8V
44
VDDO
4
B_PDD3
U50
U50
Unstuff R629 when
use ULI M5285
B_PDA2
B_PDA0
B_PDA1
R629 PH@0_4 R629 PH@0_4
+1.8V
B_IRQ14
B_PDDACK#
B_PIORDY
B_PDIOR#
B_PDIOW#
B_PDDREQ
B_PDD15
B_PDD0
B_PDD14
B_PDD1
B_PDDREQ
B_IRQ14
B_PDD7
B_PIORDY
+3V
C C
B B
49
IDE_DA2
50
IDE_DA0
51
IDE_DA1
SPIF3811-HV096
52
53
54
55
56
57
58
59
60
61
62
63
64
65
PH@SPIF3811_QFN64
PH@SPIF3811_QFN64
R637 PH@5.6K_4 R637 PH@5.6K_4
R363 PH@10K_6 R363 PH@10K_6
R654 PH@10K_6 R654 PH@10K_6
R632 PH@4.7K_6 R632 PH@4.7K_6
SPIF3811-HV096
VDDO
IDE_INTRQ
IDE_DMACK_b
64pin QFN
64pin QFN
IDE_IORDY
VDDI
VSS
IDE_DIOR_b
IDE_DIOW_b
IDE_DMARQ
IDE_DD15
IDE_DD00
IDE_DD14
IDE_DD01
THERMAL_PAD
R617 ULI@0_4 R617 ULI@0_4
+1.8V
42
41
VSS
VDDI
VDDO
B_PDD11
Reserve38Reserve39Reserve40Reserve43Reserve
VDDI
VSS
IDE_DD047IDE_DD1010IDE_DD0511IDE_DD0912IDE_DD0613IDE_DD0814IDE_DD0715IDE_RESET_b
9
8
6
B_PDD4
B_PDD5
B_PDD10
+3V
R618 ULI@0_4 R618 ULI@0_4
R620 ULI@0_4 R620 ULI@0_4
R619 ULI@0_4 R619 ULI@0_4
R621 ULI@0_4 R621 ULI@0_4
Stuff all when use
ULI M5285
34
33
37
ODCS
Reserve
Reserve35Reserve36Reserve
DD_DISABLE_B
SYS_RESET_b
16
B_PDD6
B_PDD8
B_-IDERST
B_PDD7
B_PDD9
close to IDE Connector
1.8 V Supply current for PHY blocks 120 mA
1.8 V Supply current for core logic 90 mA
A A
3.3 V Supply current ( for I/O) 55 mA
5
4
+3V +1.8V
C593
C593
C824
C824
PH@1U-6.3V_4
PH@1U-6.3V_4
PH@1U-6.3V_4
PH@1U-6.3V_4
Close to power pins(pin4,17,44,52)
A1A:Change p/n to AL003811010
SATA AC coupling is 0.01UF
SATA_RXP0_R
32
TxP
TxN
GNDA
VDDA
RxN
RxP
REXT
GNDA
VDDA
XTALO
XTALI/CLKI
IOINSEL1
IOINPIN
IOINSEL0
SATA_RXN0_R
31
30
AVDDL_1.8
29
SATA_TXN0_R
28
SATA_TXP0_R
27
R627 PH@1K/F_4 R627 PH@1K/F_4
26
25
VDDA_3.3_1.8
24
XTALO
23
XTALI
22
R639 PH@10K_6 R639 PH@10K_6
21
R651 PH@10K_6 R651 PH@10K_6
20
19
R382 PH@10K_6 R382 PH@10K_6
18
R374 ULI@0_4 R374 ULI@0_4
17
R652 PH@100K_4 R652 PH@100K_4
R653 ULI@0_4 R653 ULI@0_4
Stuff R374, R653
when use ULI M5285
Unstuff R382,
R651, R652 when
use ULI M5285
A1A:Change Pin 21 (DD_DISABLE#)
10K ohm PU to +3.3V
C871
C871
ULI@.1U_4
ULI@.1U_4
C870
C870
ULI@.1U_4
ULI@.1U_4
4
R649
R649
ULI@10K_6
ULI@10K_6
Stuff all when use
ULI M5285
C566
C566
PH@1U-6.3V_4
PH@1U-6.3V_4
RP76 PH@0_4P2R_S RP76 PH@0_4P2R_S
1
3
RP78 PH@0_4P2R_S RP78 PH@0_4P2R_S
1
3
+3V
+3V
2
PH@1U-6.3V_4
PH@1U-6.3V_4
2
4
2
4
R366 PH@0_4 R366 PH@0_4
Unstuff R366 when
use ULI M5285
PORn
C595
C595
ULI@1U-6.3V_4
ULI@1U-6.3V_4
A1A:Add 1UF for SYS_RESET
B2B:Unstuff C595 when use SPIF3811
U53
U53
5
ULI@NC7SZ14
ULI@NC7SZ14
4
3
3
C825
C825
C848
C848
PH@1U-6.3V_4
PH@1U-6.3V_4
C592
C592
PH@1U-6.3V_4
PH@1U-6.3V_4
Close to power pins(pin9,41,56)
+1.8V
L42
L42
PH@BLM11A05_6
PH@BLM11A05_6
SATA_RXP0 14
SATA_RXN0 14
SATA_TXN0 14
SATA_TXP0 14
SATA_RXP0_SH 35
SATA_RXN0_SH 35
SATA_TXN0_SH 35
PORn
145mA
R351 PH@0_4 R351 PH@0_4
SATA_GND
3
VDDA_3.3_1.8
C570
C570
PH@.1U-10V_4
PH@.1U-10V_4
RP77 SH@0_4P2R_S RP77 SH@0_4P2R_S
RP79 SH@0_4P2R_S RP79 SH@0_4P2R_S
+3V
L44
L44
ULI@BLM11A05_6
ULI@BLM11A05_6
C568
C568
ULI@.1U_4
ULI@.1U_4
Stuff L448, C568
when use ULI M5285
Y8 PH@25MHZ Y8 PH@25MHZ
+-30PPM
C859
C859
PH@27P-50V_4
PH@27P-50V_4
4
2
4
2
3
1
3
1
R635 PH@10M/F_4 R635 PH@10M/F_4
2
SATA_RXP0 14
SATA_RXN0 14
SATA_TXN0 14
SATA_TXP0 14 SATA_TXP0_SH 35
XTALI
XTALO
C842
C842
PH@27P-50V_4
PH@27P-50V_4
2
1
B_PDD0
B_PDD1
B_PDD2
B_PDD3
B_PDD4
B_PDD5
B_PDD6
B_PDD7
B_PDD8
B_PDD9
B_PDD10
B_PDD11
B_PDD12
B_PDD13
B_PDD14
B_PDD15
B_PDCS1#
B_PDA0
B_PDA2
B_PDCS3#
B_PDA1
B_IRQ14
B_PDDACK#
B_PIORDY
B_PDIOR#
B_PDIOW#
B_PDDREQ
B_-IDERST
B_PDD[0..15] 35
B_PDCS1# 35
B_PDA0 35
B_PDA2 35
B_PDCS3# 35
B_PDA1 35
B_IRQ14 35
B_PDDACK# 35
B_PIORDY 35
B_PDIOR# 35
B_PDIOW# 35
B_PDDREQ 35
B_-IDERST 35
Reference clock select
ATAIOEN
0
1 enable PATA output
Operation Mode
MODE[2..0]
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
Reference clock select
CLKSEL[1..0]
0 0
0 1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
SATA/PATA
SATA/PATA
SATA/PATA
Date: Sheet of
Date: Sheet
Date: Sheet
Note
disable PATA output
Device mode 100MB/S
Device mode 133MB/S
Device mode 150MB/S
RESERVE
Host mode 100MB/S
Host mode 133MB/S
Host mode 150MB/S
RESERVED 1 1 1
External clock
20 MHZ
25 MHZ
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
1
of
of
34 46 Monday, November 28, 2005
34 46 Monday, November 28, 2005
34 46 Monday, November 28, 2005
A
A
A
1
BOM
From SATA -> PATA bridge
B_PDD[0..15] 34
A A
B_PDCS1# 34
B_PDA0 34
B_PDA2 34
B_PDCS3# 34
B_PDA1 34
B_IRQ14 34
B_PDDACK# 34
B_PIORDY 34
B_PDIOR# 34
B_PDIOW# 34
B_PDDREQ 34
B_-IDERST 34
B_PDD0
B_PDD1
B_PDD2
B_PDD3
B_PDD4
B_PDD5
B_PDD6
B_PDD7
B_PDD8
B_PDD9
B_PDD10
B_PDD11
B_PDD12
B_PDD13
B_PDD14
B_PDD15
B_PDCS1#
B_PDA0
B_PDA2
B_PDCS3#
B_PDA1
B_IRQ14
B_PDDACK#
B_PIORDY
B_PDIOR#
B_PDIOW#
B_PDDREQ
B_-IDERST
SH@,PH@
IDELED# 40
L70
L70
+5V HDD_VDD
BK2125HS121-T_8
BK2125HS121-T_8
B_-IDERST
B_PDD7
B_PDD6
B_PDD5
B_PDD4
B_PDD3
B_PDD2
B_PDD1
B_PDD0
B_PDDREQ
B_PDIOW#
B_PDIOR#
B_PIORDY
B_PDDACK#
B_IRQ14
B_PDA1
B_PDA0
B_PDCS1#
R592 PH@0_4 R592 PH@0_4
HDLED#
CN34
CN34
1
2
C810
C810
B_PDD8
4
B_PDD9
6
B_PDD10
8
B_PDD11
10
B_PDD12
12
B_PDD13
14
B_PDD14
16
B_PDD15
18
20
22
24
26
28
30
32
34
36
38
40
42
44
1000P-50V_4
1000P-50V_4
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
PH@C178D4-14401-L_HDD_CON
PH@C178D4-14401-L_HDD_CON
C808
C808
.1U-10V_4
.1U-10V_4
PSEL
B_-PDIAG
B_PDA2
B_PDCS3#
C812
C812
.1U-10V_4
.1U-10V_4
2
R614 470_4 R614 470_4
R601 10K_4 R601 10K_4
HDD_VDD HDD_VDD
C806
C806
150U-6.3V_7343
150U-6.3V_7343
+5V
HDD_VDD
C554
C554
CSEL:
0 DRIVE0
1 DRIVE1
.1U-10V_4
.1U-10V_4
C561
C561
SH@C16654-122A4-L_Serial_ATA
SH@C16654-122A4-L_Serial_ATA
+3.3VSATA
.1U-10V_4
.1U-10V_4
CN33
CN33
GND1
RXP
RXN
GND2
GND3
3.3V
3.3V
3.3V
GND
GND
GND
GND
RSVD
GND
TXN
TXP
12V
12V
12V
A1A:Change SATA to C16654-122A4-L A1A:Change PATA to C178D4-14401-L
1
2
3
4
5
6
7
8
9
10
11
12
13
14
5V
15
5V
16
5V
17
18
19
20
21
22
+3.3VSATA
HDD_VDD
C590
C590
SH@4.7U-10V_8
SH@4.7U-10V_8
R376
R376
R357 SH@0_8 R357 SH@0_8
C596
C596
SH@4.7U-10V_8
SH@4.7U-10V_8
3
SATA_TXP0_SH 34
SATA_TXN0_SH 34
SATA_RXN0_SH 34
SATA_RXP0_SH 34
+3V
SH@0_8
SH@0_8
+5V
C581
C581
SH@.1U-10V_4
SH@.1U-10V_4
+3VSUS
+3V
R736 *0_4 R736 *0_4
R722 0_4 R722 0_4
B1B:Reserved +3V for
security alarm cicuit
HIGHT_G_INT 16,39
LOW_G_INT 16,39
C473
C473
C476
.022U-16V_4
.022U-16V_4
.022U-16V_4
.022U-16V_4
Bandwidth control(250HZ)
A1A:Add for HDD protect(G-sensor)
KXP84_VDD
C481
C481
E3B:Change U14 to KXP84-2050(new version IC)
C466
C466
C464
C464
.1U-10V_4
.1U-10V_4
4.7U-10V_8
4.7U-10V_8
.022U-16V_4
.022U-16V_4
U14
U14
1
GND
2
VDD
3
MOT
4
FF
5
X Output
6
Z Output
7
Y Output
KXP84-2050
KXP84-2050
KXP84_VDD KXP84_VDD
ADDR0
SCL/SCLK
SDA/SDO
ADDR0/SDI
R255
R255
10K_4
10K_4
R256
R256
*10K_4
*10K_4
IO Vdd
RESET
Slave Address = 001100XX = 0x30
DNC
CS#
4
14
T53T53
KXP84_VDD
13
KXP84_SCL
12
KXP84_SDA
11
ADDR0
10
KXP84_CS#
9
8
RST_KXP84_R
R270 *0_4 R270 *0_4
R508 *0_4 R508 *0_4 C476
KXP84_CS#
I2C/SPI mode selection (1
= I2C mode, 0 = SPI mode)
R258
R258
10K_4
10K_4
R260
R260
*10K_4
*10K_4
+3VSUS
RST_KXP84 16
RST_KXP84_EC 39
From ICH7 bridge
B B
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDIOR#
PDIOW#
PDDACK#
IRQ14
PIORDY
PDDREQ
PDA0
PDA1
PDA2
C C
PDCS1#
PDCS3#
D D
PDD[0..15] 14
PDIOR# 14
PDIOW# 14
PDDACK# 14
IRQ14 14
PIORDY 14
PDDREQ 14
PDA[2:0] 14
PDCS1# 14
PDCS3# 14
SATA_RXN2 14
SATA_TXN2 14
RST_RBAY# 16
+5V
C727
C727
+3V
.1U-10V_4
.1U-10V_4
R169
R169
10K_4
10K_4
-RBAYINS 39
+5V
RBAYVCC
1
R546
R546
10K_4
10K_4
2
-RBAYINS
+3V
LBAYON_HDD#
Q33
Q33
PDTC143TT
PDTC143TT
1 3
15V
RBAYON# 16
Media Bay Connector
CN29
CN29
1
2
Z1422
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
BAYCON_50P
BAYCON_50P
+5V
3
2N7002
2N7002
1
LBAYRST#
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0
PDIOW#
PIORDY
IRQ14
PDA1
PDA0
PDCS1#
IDELED#
C2A:Remove R139,R145 for RBAYVCC(FDD)
R154
R154
10K_4
10K_4
2
1
2
4
3
4
PDD8
6
5
6
PDD9
8
7
8
PDD10
10
9
10
PDD11
12
11
12
14
13
14
PDD12
16
15
16
PDD13
18
17
18
PDD14
20
19
20
PDD15
22
21
22
PDDREQ
24
23
24
PDIOR#
26
25
26
28
27
28
PDDACK#
30
29
30
PDA2
32
31
32
PDCS3#
34
33
34
RBAYID0
36
35
36
RBAYID1
38
37
38
RCSEL
40
39
40
42
41
42
44
43
44
46
45
46
B_-PDIAG
48
47
48
50
49
50
515253
54
A1A:change -PDIAG to B_-PDIAG
C2A:Stuff R161,set ODD to Master
+5V
C2A:Remove R173 for RBAYID
C215
C215
C207
C207
.1U-10V_4
.1U-10V_4
.1U-10V_4
.1U-10V_4
R145 F@0_8 R145 F@0_8
R139 F@0_8 R139 F@0_8
Q15
Q15
AO4414
AO4414
8
7
5
4
C211
C211
Q16
Q16
.1U-50V_8
.1U-50V_8
2
1
2
3 6
C185
C185
1000P-50V_4
1000P-50V_4
RBAYVCC
+3V
NC FOR SLAVE
C238
C238
.1U-10V_4
.1U-10V_4
RBAYVCC
C731
C731
150U-6.3V_7343
150U-6.3V_7343
SATA_RXP2 14
SATA_TXP2 14
R161
R161
470_4
470_4
C232
C232
.1U-10V_4
.1U-10V_4
BAY ID STATUS
RBAYID0/
LBAYID0
RBAYVCC
C200
C200
1000P-50V_4
1000P-50V_4
R173
R173
*0_4
*0_4
ADD DISCHARGE CIRCUIT
R147 22_8 R147 22_8
C184
C184
C186
C186
.1U-10V_4
.1U-10V_4
.1U-10V_4
.1U-10V_4
0
0
1
RBAYID0 16
RBAYID1 16
RBAYID1/
LBAYID1
0
1
0
STATUS
FDD
HDD
CD/DVD
B1B:Remove R141,R545,Q32 for -IDERST
C187
C187
C189
.1U-10V_4
.1U-10V_4
2
RBAYON#
C189
.1U-10V_4
.1U-10V_4
3
C235
C235
.1U-10V_4
.1U-10V_4
Q14
Q14
2N7002
2N7002
C188
C188
.1U-10V_4
.1U-10V_4
3
1
PCLK_SMB 2,16,27,29,32,33
G_MBCLK 39
PDAT_SMB 2,16,27,29,32,33
G_MBDATA 39
R373 GS@*0_4 R373 GS@*0_4
R411 GS@0_4 R411 GS@0_4
R429 GS@*0_4 R429 GS@*0_4
R433 GS@0_4 R433 GS@0_4
D2B:Add C967,R775,D43 for G sensor reset
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
HDD & CDROM & MEDIA BAY
HDD & CDROM & MEDIA BAY
HDD & CDROM & MEDIA BAY
Date: Sheet
Date: Sheet
Date: Sheet
Q48
Q48
3
Q49
Q49
3
2
+3VSUS
2
R775
R775
GS@10K_4
GS@10K_4
GS@RHU002N06
GS@RHU002N06
GS@RHU002N06
GS@RHU002N06
B1B:Add MOS for G sensor SMBUS
D2B:Change Q48,Q49 VCC to +3VSUS
D2B:Add R269,R434 for SMBUS PU resistor
D2B:Add R411,R433 for SMBUS
+3VSUS
C967
C967
GS@1U-16V_6
GS@1U-16V_6
RST_KXP84_R
D43
D43
GS@BAS316
GS@BAS316
2 1
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
4
R269
R269
GS@10K_4
GS@10K_4
KXP84_SCL
1
R434
R434
GS@10K_4
GS@10K_4
KXP84_SDA
1
C
C
C
of
of
of
35 46 Friday, December 09, 2005
35 46 Friday, December 09, 2005
35 46 Friday, December 09, 2005
1
+5V +5V_ADO
L71 *TI321611U480_1206 L71 *TI321611U480_1206
C890
C890
C892
C892
.1U-10V_4
.1U-10V_4
10U-25V_1206
10U-25V_1206
+5V +5V_ADO
C1C:Add regulator for +5V_ADO
R705 0_6 R705 0_6
A A
G961-18ADJTEU(SOT89-5)
G961-18ADJTEU(SOT89-5)
+3V
C900
C900
.1U-10V_4
.1U-10V_4
B B
Vo=1.2*(R371+R372)/R371= 4.8V
C909
C909
.1U-10V_4
.1U-10V_4
C952 *100P_6 C952 *100P_6
C891 *100P_6 C891 *100P_6
R700 0_6 R700 0_6
R713 0_6 R713 0_6
R717 0_6 R717 0_6
Tied at one point only
under the codec or near
the codec
ADOGND
U19
U19
4
VEN
5
VIN
C896
C896
.1U-10V_4
.1U-10V_4
C615
C615
.1U-10V_4
.1U-10V_4
VOUT
GND
2
C622
C622
.1U-10V_4
.1U-10V_4
3
ADJ
1
C911
C911
10U-25V_1206
10U-25V_1206
R372
R372
36K_4
36K_4
R371
R371
12K_4
12K_4
2
C619
C619
C907
C907
.1U-10V_4
.1U-10V_4
10U-25V_1206
10U-25V_1206
ADOGND
FRONT-L 37
FRONT-R 37
C908
C908
10U-25V_1206
10U-25V_1206
55mA(AVDD=5.0V)
B1B:Change R414 p/n to CS32003F933
SPDIF_OUT 32,37
SPDIF_OUT SPDIF_OUT_883
C1C:Add C960 for ALC883 DVDD
C915
C915
*22P_4
*22P_4
FRONT-L
FRONT-R
+5V_ADO
R414 20K/F_6 R414 20K/F_6
ADOGND
R416
R416
0_4
0_4
883_AMP_MUTE# 37
C910
C910
*22P_4
*22P_4
3
Option of External Volume
Control or Standby
Mode/De-Pop
+5V_ADO
R415 10K_4 R415 10K_4
35mA(DVDD=3.3V)
C960 10U-10V_8 C960 10U-10V_8
CODEC-RESET#
ACZ_SYNC_AUDIO
CODEC-BITCLK
C906
C906
*22P_4
*22P_4
U24
U24
36
33
35
34
32
DCVOL
Sense B
FRONT-L
FRONT-R
37
LINE1-VREFO-R
38
AVDD2
39
SURR-L
40
JDREF/NC
41
SURR-R
42
AVSS2
43
SURR-VREFO-L
44
SURR-VREFO-R
45
MIC2-VREFO-R
46
LINE2-VREFO-R
47
SPDIFI/EAPD
48
SPDIFO
MIC1-VREFO-R
ALC883
ALC883
DVDD11GPIO02GPIO13DVSS14SDATA-OUT5BIT-CLK6DVSS27SDATA-IN8DVDD29SYNC10RESET#11PCBEEP
+3V
ACZ_SDOUT_AUDIO
4
MIC1-VREFO-L
+5V_ADO
C905 10U-25V_1206 C905 10U-25V_1206
25
AVDD1
LINE1-R
LINE1-L
CD-GND
LINE2-R
LINE2-L
Sense A
MIC1-R
MIC1-L
CD-R
CD-L
MIC2-R
MIC2-L
ADOGND
24
23
22
21
C633 .1U-10V_4 C633 .1U-10V_4
20
C632 .1U-10V_4 C632 .1U-10V_4
19
C631 .1U-10V_4 C631 .1U-10V_4
18
C630 .1U-10V_4 C630 .1U-10V_4
17
C629 .1U-10V_4 C629 .1U-10V_4
16
C628 .1U-10V_4 C628 .1U-10V_4
15
C627 .1U-10V_4 C627 .1U-10V_4
14
13
31
27
VREF
MIC2-VREFO
LINE2-VREFO
AVSS1
MIC1-VREFO-L
LINE1-VREFO-L
26
28
29
30
12
PCBEEP
CODEC-BITCLK
CODEC-RESET#
ACZ_SYNC_AUDIO
ACZ_SDIN0_R
R702 0_4 R702 0_4
R427 39_4 R427 39_4
R697 0_4 R697 0_4
C620 1U-16V_6 C620 1U-16V_6
B1B:Change R697 to 0 ohm
5
MIC1-VREFO-L 37
LINE1-R
LINE1-L
MIC1-R
MIC1-L
BEEP_1 883_AMP_MUTE#
C616
C616
100P-50V_6
100P-50V_6
ACZ_RST#_AUDIO 14
ACZ_SYNC_AUDIO 14
ACZ_SDIN0 14
BIT_CLK_AUDIO 14
ACZ_SDOUT_AUDIO 14
LINE1-R 37
LINE1-L 37
MIC1-R 37
MIC1-L 37
ADOGND
R425 10K_4 R425 10K_4
R424
R424
1K_4
1K_4
6
ACZ_SDOUT_AUDIO
ACZ_SYNC_AUDIO
ACZ_SDIN1 14
U22
U22
BEEP
SN74LVC1G86DCKR
SN74LVC1G86DCKR
4
ACZ_SDIN1
ACZ_RST#_AUDIO BIT_CLK_MODEM
A1A:Add 10k for PCMSPK
noise reduction
+3V
R422 10K_4 R422 10K_4
PCMSPK
1
ACZ_SPKR
2
3 5
A1A:Change p/n to AL07SZ86021
For MDC Module
A1A:Change to 39 ohm
R631 39_4 R631 39_4
C840
C840
*10P_4
*10P_4
PCMSPK 30
ACZ_SPKR 16
11
1
3
5
7
9
7
CN11
CN11
GND
AC_SDO
GND
AC_SYNC
AC_SDI
AC_RST#
MDC
MDC
2
RSV
4
RSV
6
3.3V
8
GND
10
GND
12
AC_BCLK
B1B:Change MDC module pin
12 to BIT_CLK_MODEM
+3V_S5
C862
C862
.1U-10V_4
.1U-10V_4
R641
R641
*22_4
*22_4
C863
C863
*10P_4
*10P_4
8
BIT_CLK_MODEM 14
C C
D D
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
ALC883 & MDC
ALC883 & MDC
ALC883 & MDC
Date: Sheet of
Date: Sheet
1
2
3
4
5
6
Date: Sheet
7
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
of
of
36 46 Tuesday, December 06, 2005
36 46 Tuesday, December 06, 2005
36 46 Tuesday, December 06, 2005
8
1A
1A
1A
5
Audio amplifier
FRONT-L_1
FRONT-R_1
ADOGND
R421
R421
10K_4
10K_4
HPSENCE_PR 32
+5V_ADO
ADOGND
FRONT-L_2
C617 1U-16V_6 C617 1U-16V_6
FRONT-R_2
C614 1U-16V_6 C614 1U-16V_6
VOL_CTRL
GAIN1
GAIN2
MUTE EC_AMP_MUTE#
+5V_ADO
R417
R417
*6.2K_4
*6.2K_4
ADOGND
R696
R696
1K_4
1K_4
VOL_CTRL
MAX : 0 V
MIN : 2.8 V
( 1.5K )
D D
D2C:Change R693,R699 from 0 to 5.1K to
solve audio performance issue.
FRONT-L 36
FRONT-R 36
ADOGND
EC_AMP_MUTE# 39
883_AMP_MUTE# 36
883_AMP_MUTE#
R699 5.1K/F_6 R699 5.1K/F_6
R693 5.1K/F_6 R693 5.1K/F_6
R423 *100K_4 R423 *100K_4
R418 *100K_4 R418 *100K_4
2 1
D23 MTW355 D23 MTW355
2 1
D13 *MTW355 D13 *MTW355
+5V_ADO
E3B:Remove D13 for Audio Bo Bo sound
HP
MODE
0
3
+5V_ADO
R420
R420
1K_4
1K_4
R694
R694
*1K_4
*1K_4
ADOGND ADOGND
R695
R695
R419
R419
1K_4
1K_4
*1K_4
*1K_4
GAIN1
GAIN2
GAIN2
C C
0
1
1
MODE
0
6 0
7.5
1
0
9
1
10.5
SPKR
GAIN1
4
A1A:Change audio amplifier to MAX9750
A1A:Change footprint to tqfn28-5x5-5-33p
C902
C902
C625
C625
.1U-10V_4
.1U-10V_4
10U-25V_1206
10U-25V_1206
U25
U25
1
INL
27
INR
2
BEEP
28
VOL
33
GND5
24
GAIN1
23
GAIN2
22
/SHDN
21
VBIAS
C912
C912
1U-16V_6
1U-16V_6
ADOGND
HPPLG
HPSENCE_PR
100K_4
100K_4
R698
R698
100K_4
100K_4
R426
R426
25
32
GND4
+5V_ADO
C922
C922
1U-16V_6
1U-16V_6
15
8
C1P
VDD
HPVDD
GND26CPGND9CPVSS11VSS
12
ADOGND
+5V_ADO
2
1
ADOGND
7
10
31
ADOGND
20
HPS
C1N
GND3
14
HPL
CPVDD
13
HPR
4
OUTL+
5
OUTL-
17
OUTR-
18
OUTR+
6
PVDDL
3
PGNDL
16
PVDDR
19
PGNDR
29
GND1
GND2
MAX9750CETI
MAX9750CETI
30
C921
C921
1U-16V_6
1U-16V_6
5
U23
U23
SN74AHC1G32DCKR
SN74AHC1G32DCKR
3
C624
C624
1U-16V_6
1U-16V_6
Low--->Speak Mode
Hi ---->HP
HPS
HPL
HPR
INSPKL+
INSPKLÂINSPKRÂINSPKR+
C914
C914
C916
C916
.1U-10V_4
.1U-10V_4
.1U-10V_4
.1U-10V_4
ADOGND
D14 MTW355 D14 MTW355
HPPLG_SYS HPS
4
2 1
+5V_ADO
C901
C901
10U-25V_1206
10U-25V_1206
3
HPL
R769 0_6 R769 0_6
HPR
R768 0_6 R768 0_6
C2A:Change Line out schematic
C2A:Change Line out schematic
HPL_SYS
R770 0_6 R770 0_6
HPR_SYS
R771 0_6 R771 0_6
2
+5V_ADO
R703 330_4 R703 330_4
R708 330_4 R708 330_4
HPPLG
ADOGND
HPOUTR_1 HPOUTR HPR_SYS
R711
R711
1K_4
1K_4
+5V +5V_SPD
R790 0_6 R790 0_6
R430
R430
3
1K_4
1K_4
Q44
Q44
2
2N7002
2N7002
1
L73 BK1608LL121_6 L73 BK1608LL121_6
L74 BK1608LL121_6 L74 BK1608LL121_6
R709
R709
1K_4
1K_4
C927 .1U-10V_4 C927 .1U-10V_4
HPPLG#
SPDIF_OUT 32,36
C933
C933
470P-50V_4
470P-50V_4
E3A:Remove Q45,add R790 for SPDIF can't use issue
SPKL_SYS 32
SPKR_SYS 32
ADOGND
C930
C930
470P-50V_4
470P-50V_4
2
1 3
HPPLG#
R428
R428
10K_4
10K_4
Q47
Q47
MMBT3904
MMBT3904
Q46
Q46
2N7002
2N7002
2
HPPLG#:
HP not insert->H
HP insert->L
HPPLG#
HPL_SYS HPOUTL HPOUTL_1
+5V +3V
R706 0_4 R706 0_4
R707
R707
1K_4
1K_4
SPDIFO
3
C621
C621
*.1U_4
*.1U_4
1
1
LINE OUT/SPDIF
BLACK
Pin5 connect to
+5V_SPD
SPDIFO_R
ADOGND
Pin3 on Jack
CN17
CN17
5
4
2
3
1
8
Drive
Drive
7
IC
IC
9
2FB540L-BRBTC-7F_SPDIF
2FB540L-BRBTC-7F_SPDIF
D2B:Change CN17 to DFTJ10FR356
D15
D15
HPPLG#
3
DA204U
DA204U
For ESD close to audio out connecter
6
11
10
LED
LED
ADOGND
+5V
1
2
C941 1U-16V_6 C941 1U-16V_6
C940 1U-16V_6 C940 1U-16V_6
INSPKR+
INSPKRÂINSPKL+
INSPKL-
5
L78 BK1608LL121_6 L78 BK1608LL121_6
L76 BK1608LL121_6 L76 BK1608LL121_6
LINE1-L_1
LINE1-R_1
L45 BK1608LL121_6 L45 BK1608LL121_6
L47 BK1608LL121_6 L47 BK1608LL121_6
L48 BK1608LL121_6 L48 BK1608LL121_6
LINEINR_SYS
B B
A A
LINE1-L 36
LINE1-R 36
LINEINL_PR LINEINL_SYS
LINEINR_PR
L75 BK1608LL121_6 L75 BK1608LL121_6
L77 BK1608LL121_6 L77 BK1608LL121_6
INSPKR+N
INSPKR-N
INSPKL+N
INSPKL-N
C936
C936
C935
C935
47P-50V_4
47P-50V_4
47P-50V_4
47P-50V_4
LINEINL_PR 32
LINEINR_PR 32
C943
C943
470P-50V_4
470P-50V_4
ADOGND
SPEAKER CONNECTOR
CN15
CN15
1
R716 0_6 R716 0_6 L46 BK1608LL121_6 L46 BK1608LL121_6
2
5
R715 0_6 R715 0_6
3
6
C951 .1U-10V_4 C951 .1U-10V_4
4
C937
C937
C938
C938
47P-50V_4
47P-50V_4
47P-50V_4
47P-50V_4
85204-04001_SPEAKER-CON
85204-04001_SPEAKER-CON
ADOGND
A1A:Change Speaker conn footprint
B1B:Change speaker p/n to DFHD04MR701
C950 1000P-50V_4 C950 1000P-50V_4
ADOGND
4
CN18
CN18
LINEINL_SYS
LINEINR_SYS
C942
C942
470P-50V_4
470P-50V_4
1
2
6
3
4
5
JA6033L- U5S2-7F _LINEIN
JA6033L- U5S2-7F _LINEIN
C2A:Change CN18 to DFTJ06MS716
LINE IN
BLUE
7
8
D2B:Change R435 to 2.2K to meet MIC voltage reference
MIC1-VREFO-L 36
R435 2.2K_4 R435 2.2K_4
C634 1U-16V_6 C634 1U-16V_6
MIC1-L 36
C635 1U-16V_6 C635 1U-16V_6
MIC1-R 36
MIC1_M MIC1 MIC1_SYS
INT_MIC
L49 BK1608LL121_6 L49 BK1608LL121_6
R725 0_4 R725 0_4
C639
C639
470P-50V_4
470P-50V_4
JA6033L-P5S2-7F _MIC
JA6033L-P5S2-7F _MIC
ADOGND
MIC
PINK
CN19
CN19
1
7
2
6
3
4
5
8
C2A:Change CN19 to DFTJ06MS724
+5V_ADO
SEL
FUNCTION
C939
C939
.1U-10V_4
.1U-10V_4
ADOGND
PR_MIC 32
3
PR_MIC MIC1
MIC1_M
LOW
HIGH
U60
U60
5
VCC
1
IN_B1
3
IN_B0
NC7SB3157P6X
NC7SB3157P6X
COM
GND
IN_B0
IN_B1
PR_MIC_IN
6
SEL
4
2
ADOGND
ADOGND
C1C:Reversed for ESD(MIC)
INT_MIC
For ESD close to audio out connecter
2
R704
R704
100K_4
100K_4
PR_MIC_IN 32
D40
D40
3
*DA204U
*DA204U
+5V
1
2
INT MIC
CN2
CN2
85204-0200L_INT_MIC
85204-0200L_INT_MIC
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
AUDIO AMP(MAX9750) / JACK
AUDIO AMP(MAX9750) / JACK
AUDIO AMP(MAX9750) / JACK
Date: Sheet of
Date: Sheet
Date: Sheet
R505 0_6 R505 0_6
D2B:Reserve R726 for EMI request
1
2
MIC_GND
MIC_GND
R726 0_4 R726 0_4
C695
C695
22P-50V_4
22P-50V_4
MIC_GND
MIC_GND
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
1
INT_MIC
R510
R510
*1K_4
*1K_4
1A
1A
1A
of
of
37 46 Saturday, December 10, 2005
37 46 Saturday, December 10, 2005
37 46 Saturday, December 10, 2005
5
C35
C35
R477
R477
D2
*BAS316D2*BAS316
*22_4
*22_4
4
2
4
2
4
2
2 1
R17
R17
10K_4
10K_4
PCI_CLK_SIO
+3V
PD0
PD1
PD2
PD4
PD5
PD6
PD3
PD7
SLCT
ERROR#
SLIN#
PE
INIT#
AFD#
STRB#
ACK#
BUSY
PCI_CLK_SIO 2
PLTRST# 15,16,18,27,29,32,33,39
PD[0..7] 32
D D
LPC_PD# 16
C C
B B
LPC_PD#
+5V
3
1
3
1
3
1
*10P_4
*10P_4
RN8
RN8
4.7K_4P2R_S
4.7K_4P2R_S
RN5
RN5
4.7K_4P2R_S
4.7K_4P2R_S
RN4
RN4
4.7K_4P2R_S
4.7K_4P2R_S
R27 4.7K_4 R27 4.7K_4
R466 4.7K_4 R466 4.7K_4
R470 4.7K_4 R470 4.7K_4
R496 4.7K_4 R496 4.7K_4
R497 4.7K_4 R497 4.7K_4
R469 4.7K_4 R469 4.7K_4
R498 4.7K_4 R498 4.7K_4
R499 4.7K_4 R499 4.7K_4
R478 4.7K_4 R478 4.7K_4
R467 4.7K_4 R467 4.7K_4
R468 4.7K_4 R468 4.7K_4
4
2
U33
U33
LAD0 14,39
LAD1 14,39
LAD2 14,39
LAD3 14,39
LDRQ#0 14
LFRAME# 14,39
SERIRQ 16,30,39
CLKRUN# 16,30,39
INIT# 32
ERROR# 32
BUSY 32
AFD# 32
ACK# 32
STRB# 32
SLIN# 32
SLCT 32
LAD0
LAD1
LAD2
LAD3
PCI_CLK_SIO
LDRQ#0
LFRAME#
PLTRST#
SERIRQ
SUS_STAT_3V#
CLKRUN#
INIT#
ERROR#
BUSY
AFD#
ACK#
STRB#
SLIN#
SLCT
PE
PE 32
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
42
LAD0
46
LAD1
51
LAD2
53
LAD3
33
LCLK
22
LDRQ/XOR_OUT
38
LFRAME
35
LRESET
36
SERIRQ
29
LPCPD/GPIO21
27
CLKRUN/GPO22
56
INIT
54
ERR
26
BUSY_WAIT
57
AFD_DSTRB/TRIS
28
ACK/GPO24
14
STB_WRITE/TEST
55
SLIN_ASTRB
24
SLCT
25
PE
30
PD7/PGIO23
34
PD6
37
PD5
39
PD4
6
PD3
43
PD2
50
PD1
52
PD0
PC87383-VS
PC87383-VS
17
NC18NC
NS PC87383
NS PC87383
VSS12VSS31VSS44VCORF
NC1NC
13
VDD11VDD32VDD
C41
C41
.1U-10V_4
.1U-10V_4
3
45
NC47NC48NC
C680
C680
.1U-10V_4
.1U-10V_4
GPIO00
GPIO01
GPIO02
GPIO20
GPIO03
GPIO04
GPIO05
GPIO06
GPIO07
CLKIN
IRRX1
49
64
IRTX
CTS1/GPIO11
DCD1/GPIO16
DSR1/GPIO15
RTS1/GPIO13
SIN1/GPIO14
SOUT1/GPIO12
RI1/GPIO10
NC
IRRX2_IRSL0/GPIO17
DTR1_BOUT1/BADDR
15
16
19
23
20
21
40
7
41
58
8
9
10
3
59
60
62
61
63
5
4
C670
C670
.1U-10V_4
.1U-10V_4
SIO_14M
IRRX
IRTXOUT
IRMODE
+3V
C50
C50
10U-10V_8
10U-10V_8
R479
R479
10K_4
10K_4
MCTS1# 32
MDCD1# 32
MDSR1# 32
MRTS1# 32
MRXD1 32
MTXD1 32
MRI1 32
MDTR1# 32
2
STRAP PINS
MDTR1#
MRTS1#
MTXD1
C64 *180P_4 C64 *180P_4
C65 *180P_4 C65 *180P_4
C46 *180P_4 C46 *180P_4
C43 *180P_4 C43 *180P_4
C45 *180P_4 C45 *180P_4
C42 *180P_4 C42 *180P_4
C40 *180P_4 C40 *180P_4
C33 *180P_4 C33 *180P_4
C29 *180P_4 C29 *180P_4
C63 *180P_4 C63 *180P_4
C62 *180P_4 C62 *180P_4
C30 *180P_4 C30 *180P_4
C61 *180P_4 C61 *180P_4
C60 *180P_4 C60 *180P_4
C36 *180P_4 C36 *180P_4
C32 *180P_4 C32 *180P_4
C31 *180P_4 C31 *180P_4
+3V
R481 *10K_4 R481 *10K_4
R494 *10K_4 R494 *10K_4
R495 *10K_4 R495 *10K_4
R32
R32
*22_4
*22_4
C55
C55
*10P_4
*10P_4
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
SLCT
ERROR#
SLIN#
PE
INIT#
AFD#
STRB#
ACK#
BUSY
SIO_14M 2
1
FIR
+3V
R701
R701
TPM@10K_4
TPM@10K_4
SERIRQ 16,30,39
PLTRST# 15,16,18,27,29,32,33,39
CLKRUN# 16,30,39
D24 TPM@*BAS316 D24 TPM@*BAS316
+3VSUS
LPC_PD# 16
A A
MB TO TPM1.2 MODULE
2 1
SERIRQ
+3V
PLTRST#
CLKRUN#
CN36
CN36
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
TPM@88018-204G_TPM1.2
TPM@88018-204G_TPM1.2
LAD0
LAD1
LFRAME#
PCLK_TPM
LAD2
LAD3
A1A:Change TPM CONN to 88018-204G(Pitch=0.8,H=2.65)
LAD0 14,39
+3V
LAD1 14,39
LFRAME# 14,39
PCLK_TPM 2
LAD2 14,39
LAD3 14,39
+3VSUS +3V
C920
C920
C924
C924
.1U-10V_4
.1U-10V_4
1U-16V_6
1U-16V_6
C919
C919
.1U-10V_4
.1U-10V_4
C923
C923
1U-16V_6
1U-16V_6
IRTXOUT
IRRX
IRMODE
U28
U28
3
TXD
4
RXD
5
SD
8
GND
VISHAY_TFDU6102_8P
VISHAY_TFDU6102_8P
VCC
MODE
LED_C
LED_A
B1B:Change TPM pin define to same as ZH2
5
4
3
2
+3V
6
7
2
1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
T = 20mil
C955
C955
C953
C953
10U-10V_8
10U-10V_8
.1U-10V_4
.1U-10V_4
+5V_FIR
T = 20mil
R449 5.6_1206 R449 5.6_1206
R718 5.6_1206 R718 5.6_1206
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
SIO (87383),TPM 1.2
SIO (87383),TPM 1.2
SIO (87383),TPM 1.2
+5V
C954
C954
10U-10V_8
10U-10V_8
C956
C956
10U-10V_8
10U-10V_8
1
38 46 Monday, November 28, 2005
38 46 Monday, November 28, 2005
38 46 Monday, November 28, 2005
of
of
of
1A
1A
1A
5
CN13
CN13
1
2
5
3
6
4
*551_DEBUG
R380
R380
470K_4
470K_4
Y10
Y10
32.768KHZ
32.768KHZ
3
4
PWRLED# 40
+5V
5 6
7 8
TBCLK
TBDATA
CAPSLED#
NUMLED#
C885
C885
10P-50V_4
10P-50V_4
1 2
3 4
*551_DEBUG
PCLK_591 2
RP46
RP46
4.7K_8P4R_S
4.7K_8P4R_S
R680
R680
121K/F_6
121K/F_6
CHANGED FROM PR_INSERT#
BATLED0# 40
BATLED1# 40
BT_POWERON# 29
RSMRST# 16,27
CCD_POWERON# 25
+3VPCU
U18
MBCLK
D D
MBDATA
C C
B B
U18
6
SCL
5
SDA
7
WP
24LC08BT_SOIC
24LC08BT_SOIC
1
A0
2
A1
3
A2
8
VCC
4
GND
PCLK_591
R656
R656
*22_4
*22_4
C873
C873
*10P_4
*10P_4
+3VPCU
CAPSLED# 40
NUMLED# 40
C606
C606
.1U-10V_4
.1U-10V_4
+3VPCU
MSCLK 32
MSDATA 32
KPCLK 32
KPDATA 32
TBCLK 40
TBDATA 40
R686 20M_6 R686 20M_6
2 3
4 1
C895
C895
10P-50V_4
10P-50V_4
+3VPCU
A A
A1A:Reserved for debug use
R684 330_4 R684 330_4
NBSWON# 40
ECPWRLED
NBSWON#
LED6
LED6
2 1
LED_G_LTST-C190KGKT
LED_G_LTST-C190KGKT
SW4SW4
1
2
B1B:Change SW4 p/n to DHP00BB1J03
5
4
+3VPCU
RX_551
TX_551
+3V
LDRQ#(pin 8) internal is no use
SERIRQ 16,30,38
LFRAME# 14,38
KBSMI# 16
GATEA20 14
RCIN# 14
RF_EN 29
VRON 41
MAINON 20,32,42,43,44
SUSON 32,42,43
S5_ON 42
SERIRQ
LFRAME#/FWH4
LAD0/FWH0
LAD0 14,38
LAD1/FWH1
LAD1 14,38
LAD2/FWH2
LAD2 14,38
LAD3/FWH3
LAD3 14,38
PCLK_591
KBSMI#
GATEA20
RCIN#
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7
MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
PWRLED# 40
PR_STS 32
USBON# 29
SUSLED# 40
BT_POWERON#
4
SCI#
VRON
MAINON
SUSON
S5_ON
CS#
2 1
D20 BAS316 D20 BAS316
2 1
D21 BAS316 D21 BAS316
591_32KX1
591_32KX2
PR_STS
SCI# 16
MX0 40
MX1 40
MX2 40
MX3 40
MX4 40
MX5 40
MX6 40
MX7 40
MY0 40
MY1 40
MY2 40
MY3 40
MY4 40
MY5 40
MY6 40
MY7 40
MY8 40
MY9 40
MY10 40
MY11 40
MY12 40
MY13 40
MY14 40
MY15 40
C589
C589
.1U-10V_4
.1U-10V_4
U21
U21
7
SERIRQ
8
LDRQ
9
LFRAME
15
LAD0
14
LAD1
13
LAD2
10
LAD3
18
LCLK
19
LREST
22
SMI
23
PWUREQ
31
IOPD3/ECSCI
5
GA20/IOPB5
6
KBRST/IOPB6
71
KBSIN0
72
KBSIN1
73
KBSIN2
74
KBSIN3
77
KBSIN4
78
KBSIN5
79
KBSIN6
80
KBSIN7
49
KBSOUT0
50
KBSOUT1
51
KBSOUT2
52
KBSOUT3
53
KBSOUT4
56
KBSOUT5
57
KBSOUT6
58
KBSOUT7
59
KBSOUT8
60
KBSOUT9
61
KBSOUT10
64
KBSOUT11
65
KBSOUT12
66
KBSOUT13
67
KBSOUT14
68
KBSOUT15
105
TINT
106
TCK
107
TDO
108
TDI
109
TMS
110
PSCLK1/IOPF0
111
PSDAT1/IOPF1
114
PSCLK2/IOPF2
115
PSDAT2/IOPF3
116
PSCLK3/IOPF4
117
PSDAT3/IOPF5
118
PSCLK4/IOPF6
119
PSDAT4/IOPF7
158
32KX1/32KCLKOUT
160
32KX2
62
IOPJ2/BST0
63
IOPJ3/BST1
69
IOPJ4/BST2
70
IOPJ5/PFS
75
IOPJ6/PLI
76
IOPJ7/BRKL_RSTO
148
IOPM0/D8
149
IOPM1/D9
155
IOPM2/D10
156
IOPM3/D11
3
IOPM4/D12
4
IOPM5/D13
27
IOPM6/D14
28
IOPM7/D15
173
SEL0
174
SEL1
47
CLK
PC97551
PC97551
+3VPCU
C872
C872
.1U-10V_4
.1U-10V_4
16
VDD
Host interface
Host interface
Key matrix scan
Key matrix scan
JTAG debug port
JTAG debug port
PS2 interface
PS2 interface
PORTM
PORTM
VCC134VCC245VCC3
PORTJ-2
PORTJ-2
GND117GND235GND346GND4
122
123
136
157
VCC4
PORTD-1
PORTD-1
GND5
GND6
159
167
137
166
VCC5
VCC6
PORTE
PORTE
GND7
3
R441
R441
0_4
0_4
591_AVCC
95
AD Input
AD Input
DA output
DA output
PWM
PWM
or PORTA
or PORTA
PORTB
PORTB
PORTC
PORTC
PORTH
PORTH
PORTJ-1
PORTJ-1
PORTD-2
PORTD-2
PORTK
PORTK
PORTL
PORTL
AGND
96
3
VCCRTC
R412
R412
0_4
0_4
C638
C638
.1U-10V_4
.1U-10V_4
161
VBAT
AVCC
IOPE0AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7
DP/AD8
DN/AD9
IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7
IOPB0/URXD
IOPB1/UTXD
IOPB2/USCLK
IOPB3/SCL1
IOPB4/SDA1
IOPB7/RING/PFAIL
IOPC0
IOPC1/SCL2
IOPC2/SDA2
IOPC3/TA1
IOPC4/TB1/EXWINT22
IOPC5/TA2
IOPC6/TB2/EXWINT23
IOPC7/CLKOUT
IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21
IOPD2/EXWINT24
IOPE4/SWIN
IOPE5/EXWINT40
IOPE6/LPCPD/EXWIN45
IOPE7/CLKRUN/EXWINT46
IOPH0/A0/ENV0
IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1
IOPH4/A4/TRIS
IOPH5/A5/SHBM
IOPH6/A6
IOPH7/A7
IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPJ1/WR0
IOPK2/A10
IOPK3/A11
IOPK4/A12
IOPK5/A13/BE0
IOPK6/A14/BE1
IOPK7/A15/CBRD
IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19
IOPL4/WR1
NC212NC320NC421NC585NC686NC791NC892NC997NC10
NC1
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7
IOPJ0/RD
IOPD4
IOPD5
IOPD6
IOPD7
IOPK0/A8
IOPK1/A9
PORTI
PORTI
11
C588
C588
1U-16V_6
1U-16V_6
Un-define
C610
C610
*.1U_4
*.1U_4
TEMP_MBAT
81
AD0
TEMP_ABAT
82
AD1
83
AD2
84
AD3
WIRELESS_SW#
87
BLUETOOTH_SW#
88
SUSC#
89
90
93
94
CC-SET
99
DA0
CV-SET
100
DA1
CONTRAST
101
DA2
102
DA3
32
VFAN
33
-RBAYINS
36
SELIO
37
38
39
40
43
153
154
162
163
164
165
168
169
170
171
172
175
176
1
26
29
30
2
44
24
25
124
125
126
127
128
131
132
133
138
139
140
141
144
145
146
147
150
151
152
41
42
54
55
143
142
135
134
130
129
121
120
113
112
104
103
48
R384 0_4 R384 0_4
R383 0_4 R383 0_4
D2B:Add RST_KXP84_EC for G sensor reset(IOPA6)
RX_551
TX_551
LID591#
MBCLK
MBDATA
PLTRST#
591_PME#
D12 BAS316 D12 BAS316
FANSIG
R761 0_4 R761 0_4
EC_FPBACK#
PWROK_1
R385 0_4 R385 0_4
CARDBUS_DET
ACIN
D2B:Change Cardbus detect to IOPD0
NBSWON#
SUSB#
CLKRUN#
ENV0
ENV1
BADDR0
BADDR1
TRIS
SHBM
A6
A7
D0
D1
D2
D3
D4
D5
D6
D7
RD#
WR#
M/A#
CELL-SET
D/C#
BL/C#
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
98
FOR 97551 ONLY
INTERNAL PULLUP IN SB
PCIE_WAKE# 16,27,29
Adapter ID
Watt
65W
0.66 +/- 0.1V
90W
1.32 +/- 0.1V
135W
1.98 +/- 0.1V
150W
2.64 +/- 0.1V
3.3 +/- 0.1V
A1A:Reserved GSENSOR-X/Y/Z for
security alarm cicuit
D2B:Add G-sensor SMBUS to EC(SCL2,SDA2)
2 1
BUZZER
M/A# 46
CELL-SET 46
D/C# 46
BL/C# 46
2
Voltage
TEMP_MBAT 46
TEMP_ABAT 46
WIRELESS_SW# 40
BLUETOOTH_SW# 40
SUSC# 16
CC-SET 45
CV-SET 45
CONTRAST 25
T85T85
CPUFAN# 5
T87T87
-RBAYINS 35
EC_AMP_MUTE# 37
HIGHT_G_INT 16,35
LOW_G_INT 16,35
RST_KXP84_EC 35
LID591# 16,25,40
MBCLK 5,19,46
MBDATA 5,19,46
PLTRST# 15,16,18,27,29,32,33,38
G_MBCLK 35
G_MBDATA 35
DNBSWON# 16
FANSIG 5
D2B:Change EC_FPBACK# to IOPC6
EC_FPBACK# 25
PWROK_EC 16
CARDBUS_DET 30
ACIN 45
LVDS_BLON_EC 25
NBSWON# 40
SUSB# 16
CLKRUN# 16,30,38
+3V_S5 +3V_S5
R377
R377
*4.7K_4
*4.7K_4
1 3
2
BADDR1-0
0 0
0 1
1 0
1 1
Index
2E
4E
(HCFGBAH, HCFGBAL)
+3V
R436
R436
10K_4
10K_4
I/O Address
(HCFGBAH, HCFGBAL)+1
Reserved
HWPG 42,43,44
A1A:Remove REFON pin ( DA3 pin 102 )
ENV0
ENV1
BADDR0
BADDR1
TRIS
SHBM
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
SST 1MB BIOS
(AKE35ZAKK17)
B1B:Reversed for G sensor buzzer
D2B:Change buzzer power to
+5V,increase volume
+3VPCU
R388
Q22
Q22
PDTC143TT
PDTC143TT
R388
*4.7K_4
*4.7K_4
2
ST Micro M29W008AB/AMD-29LV081B/SST39VF080
330_4
330_4
BUZZER
R742
R742
CS#
RD#
WR#
BIU configuration should match flash speed used
591_PME#
1
+3VPCU
C609
C609
C637
C637
C601
C601
C618
C618
10U-10V_8
10U-10V_8
Should have a 0.1uF capacitor close to every
GND-VCC pair + one larger cap on the supply.
Data
2F
4F
MBCLK
MBDATA
WIRELESS_SW#
BLUETOOTH_SW#
21
20
19
18
17
16
15
14
36
40
13
37
CS#
22
RD#
24
WR#
SST39VF080-70-4C-EIE_1M BIOS
SST39VF080-70-4C-EIE_1M BIOS
+5V_S5
1
2
2
1 3
U57
U57
12
A0
11
A1
10
A2
9
A3
8
A4
7
A5
6
A6
5
A7
27
A8
26
A9
23
A10
25
A11
4
A12
28
A13
29
A14
3
A15
2
A16
30
A17
22
CE#
24
OE#
31
WE#
*PLCC32_BIOS
*PLCC32_BIOS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
97551 & FLASH
97551 & FLASH
97551 & FLASH
Date: Sheet
Date: Sheet
Date: Sheet
.1U-10V_4
.1U-10V_4
.1U-10V_4
.1U-10V_4
ENV1
R437 10K_4 R437 10K_4
BADDR0
R438 *10K_4 R438 *10K_4
BADDR1
R439 *10K_4 R439 *10K_4
SHBM
R440 10K_4 R440 10K_4
SHBM=1: Enable shared memory with host BIOS
R677 4.7K_4 R677 4.7K_4
R675 4.7K_4 R675 4.7K_4
R431 4.7K_4 R431 4.7K_4
R432 4.7K_4 R432 4.7K_4
U56
U56
R743
R743
0_4
0_4
A0
A1
A2
A3
A4
A5
A6
A7
8
A8
7
A9
A10
6
A11
5
A12
4
A13
3
A14
2
A15
1
A16
A17
A18
A19
CE#
OE#
9
WE#
1
D0
D1
D2
D3
D4
D5
D6
D7
RESET#/NC
RY/BY#/NC
NC1
NC2
NC3
VCC
VCC
GND
GND
BZ1
BZ1
VCC1_PWROK
2
KCVG084B16_BUZZER
KCVG084B16_BUZZER
Q32
Q32
MMBT3904
MMBT3904
D0
13
D0
D1
D2
D3
D4
D5
D6
D7
VPP
VCC
GND
D1
14
D2
15
D3
17
D4
18
D5
19
D6
20
D7
21
A18
1
+3VPCU
32
C875
C875
.1U-10V_4
.1U-10V_4
16
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
1
25
26
27
28
32
33
34
35
10
12
29
38
11
31
30
23
39
.1U-10V_4
.1U-10V_4
C623
C623
.1U-10V_4
.1U-10V_4
+3VPCU
+3VPCU
+3V
D0
D1
D2
D3
D4
D5
D6
D7
VCC1_PWROK
T169T169
+3VPCU
+3VPCU
R692
R692
*10K_4
*10K_4
1 2
C897
C897
*.1U_4
*.1U_4
of
of
of
39 46 Friday, December 02, 2005
39 46 Friday, December 02, 2005
39 46 Friday, December 02, 2005
1A
1A
1A
5
INT K/B
MY15 39
MY14 39
MY13 39
MY12 39
MY11 39
MY10 39
MY9 39
MY8 39
MY7 39
MY6 39
MY5 39
D D
MY4 39
MY3 39
MX7 39
MX6 39
MY2 39
MX5 39
MX4 39
MX3 39
MX2 39
MY1 39
MY0 39
MX1 39
MX0 39
REVB P/N&FT CHANGE
CN6
MY15
MY14
MY13
MY12
MY11
MY10
MY9
MY8
MY7
MY6
MY5
MY4
MY3
MX7
MX6
MY2
MX5
MX4
MX2
MY1
MY0
MX1
MX0
CN6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
PTWO_KB
PTWO_KB
MX7
MX6
MX5
MY0
MY1
MY2
MX4
MY3
MY4
MY5
MY6
MY7
MY8
MX3
MY9
MX2
MX1
MY10
MY11
MX0
MY13
MY14
MY15
+3VPCU
RP42
RP42
10
MY4
9
MY5
8
MY6
7 4
MY7
10K_10P8R
10K_10P8R
RP43
RP43
10
9
8
MY14 MY8
7 4
MY15
+3VPCU
MX4
MX5
MX6
MX7
10K_10P8R
10K_10P8R
RP45
RP45
10
9
8
7 4
10K_10P8R
10K_10P8R
TOUCH PAD
20 MIL
L35
L35
+5V
R244
TBDATA 39
TBCLK 39
+3VPCU
R244
10K_4
10K_4
R450 330_4 R450 330_4
R451 330_4 R451 330_4
C C
B B
A A
+5V_TP
BK2125HS330_8
BK2125HS330_8
R243
R243
10K_4
10K_4
L38 LZA10-2ACB104MT_6 L38 LZA10-2ACB104MT_6
L37
L37
LED2
LED2
3
LED_G/Y_LTST-S326KGJSKT
LED_G/Y_LTST-S326KGJSKT
LED3
LED3
3
LED_G/Y_LTST-S326KGJSKT
LED_G/Y_LTST-S326KGJSKT
5
C460 .1U-10V_4 C460 .1U-10V_4
LZA10-2ACB104MT_6
LZA10-2ACB104MT_6
C459
C459
*.1U_4
*.1U_4
1
2
1
2
C458
C458
*.1U_4
*.1U_4
SUSLED#
PWRLED#
BATLED1#
BATLED0#
TP_DATA
TP_CLK
85201-0405L_MB TO TP/B
85201-0405L_MB TO TP/B
D2B:Change CN7 to
DFFC04FR175(88264-0401)
SUSLED# 39
PWRLED# 39
BATLED1# 39
BATLED0# 39
4
MY3
1
MY2
2
MY1
3
MY0
5 6
MY11
1
MY10 MY12
2
MY9 MY13
3
5 6
MX3 MX3
1
MX2
2
MX1 MY12
3
MX0
5 6
TOP CONTACT
CONNECT TO TP/B
CN7
CN7
1
2
3
6
4 5
4
CA3 220P-50V_8P4C CA3 220P-50V_8P4C
MY1
1
MY2
MX4
MY3
MY12
MY13
MY14
MY15
MX1
MY10 MX5
MY11
MX0
2
3
4
5
6
7
8
CA7 220P-50V_8P4C CA7 220P-50V_8P4C
1
2
3
4
5
6
7
8
CA6 220P-50V_8P4C CA6 220P-50V_8P4C
1
2
3
4
5
6
7
8
CA4 220P-50V_8P4C CA4 220P-50V_8P4C
1
2
3
4
5
6
7
8
CA5 220P-50V_8P4C CA5 220P-50V_8P4C
1
2
3
4
5
6
7
8
CA2 220P-50V_8P4C CA2 220P-50V_8P4C
1
2
3
4
5
6
7
8
WIRELESS_SW# 39
BLUETOOTH_SW# 39
B1B:Mini card WLAN LED low active(LED5)
LED5
WIRELESS_LED 29
R447 330_4 R447 330_4
LED5
LED4
LED4
A1A:Change footprint to LEDLTST-C190TGKT
D2B:Change R40,R46,R52 from 330 to
220,increase LED brightness
E3A:Change R40,R46,R52,R785 from 220 to
150(CS11502JB22) increase LED brightness
+3V
R52
R52
150_4
150_4
3
NUMLED#
EMAIL_LED#
2
1
+3V
3
2
1
NUMLED# 39
EMAIL_LED# 16
MY7
MY6
MY5
MY4
MX2
MY9
MX3
MY8
MY0
MX6
MX7
R58
R58
NUMLED
2N7002Q82N7002
Q8
330_4
330_4
2N7002
2N7002
Q11
Q11
3
WIRELESS_SW#
BLUETOOTH_SW#
EMAIL_LED
3
A1A:Change SW p/n
SW3 SLIDE_SWITCH_WL SW3 SLIDE_SWITCH_WL
4
SW2 SLIDE_SWITCH_BT SW2 SLIDE_SWITCH_BT
4
R448 330_4 R448 330_4
2 1
LED_Y_LTST-C190KFKT
LED_Y_LTST-C190KFKT
2 1
LED_B_LTST-C190TBKT
LED_B_LTST-C190TBKT
IDELED# 35
SATA_LED# 14
CAPSLED# 39
2
To BUTTON board
1
3
2
1
3
2
+3V
BT_LED 29
+3V
+3VPCU
CN3
CN3
C77
C77
.1U-10V_4
.1U-10V_4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
88502-1601_BUTTON
88502-1601_BUTTON
A1A:Change p/n to 85201-16051
D2B:Change CN3 to DFFC16FR089
MX0
MX1
MX2
MX3
MY10
NBSWON#
CAPSLED
EMAIL_LED
IDE_LED
NUMLED
PWRLED#
LID591#
+3VPCU
MX0 39
MX1 39
MX2 39
MX3 39
MY10 39
NBSWON# 39
LID591# 16,25,39
PWRLED# 39
1
eManager
Launch Manager
Internet
E-mail
Power
TOP CONTACT
IDELED#
CAPSLED#
+5V
+3V
SH@10K_4
SH@10K_4
R59
R59
10K_4
10K_4
R50
R50
R40
R40
150_4
150_4
IDELED
3
Q9
2
2N7002Q92N7002
1
+3V
R785
R785
150_4
150_4
SATALED
3
Q7
Q7
2
SH@2N7002
SH@2N7002
1
+3V
R46
R46
150_4
150_4
CAPSLED
3
2N7002Q62N7002
2
Q6
1
2
IDELED
SATALED
D2B:Add U64,R785 for IDELED function
R786 *0_4 R786 *0_4
IDELED IDE_LED
1 2
+3V
5
U64
2
1
U64
SN74AHC1G32DCKR
SN74AHC1G32DCKR
3
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
SWITCH,LED,K/B,TP
SWITCH,LED,K/B,TP
SWITCH,LED,K/B,TP
Date: Sheet
Date: Sheet
Date: Sheet
IDE_LED
4
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
1
1A
1A
1A
of
of
of
40 46 Saturday, December 10, 2005
40 46 Saturday, December 10, 2005
40 46 Saturday, December 10, 2005
1
8736VCC
D2B:Change PR71 143K to 178K(CS41783F918)
D2C:Change PR71 to 178K(CS41783F900)
PC59
PC59
2.2U_8
2.2U_8
B1B:Change PR70 p/n to CS37153F917
B1B:Change PC62 footprint to CC0805(BOM)
8/1 modify for accompany with choke
H_VID0 4
H_VID1 4
H_VID2 4
H_VID3 4
H_VID4 4
H_VID5 4
H_VID6 4
A A
PR61
PR61
100K/F_4
100K/F_4
PR55 0_4 PR55 0_4
VRON 39
PM_DPRSLPVR 16
PSI# 3
DELAY_VR_PWRGOOD 3,8,16
VR_PWRGD_CK410# 2,16
H_PROCHOT# 3
+3V
PR71 178K/F_6 PR71 178K/F_6
PR70 71.5K_6 PR70 71.5K_6
PC61 470P-50V_4 PC61 470P-50V_4
PR68 249K/F_4 PR68 249K/F_4
PC62 .22U-50V_8 PC62 .22U-50V_8
PC54
PC54
100P-50V_6
100P-50V_6
PR54 0_4 PR54 0_4
PR53
PR53
*100K_4
*100K_4
PR52 0_4 PR52 0_4
PR51
PR51
*100K_4
PR106
PR106
*10K_4
*10K_4
PR58
PR58
1.91K_4
1.91K_4
*100K_4
PC112
PC112
100P-50V_6
100P-50V_6
+3V
B1B:Change PR58 p/n to CS21912FB13
PR43
PR43
100K/F_4
100K/F_4
PR109
PR109
1K/F_6
1K/F_6
1.5K/F_6
1.5K/F_6
PR69
PR69
8736EN
PR57 0_4 PR57 0_4
PR42 0_4 PR42 0_4
PR60 0_4 PR60 0_4
14
OSC
15
TIME
17
CCV
16
ILIM
19
REF
18
TRC
34
D0
35
D1
36
D2
37
D3
38
D4
39
D5
40
D6
4
SHDN
3
DPRSLPVR
2
PSI
24
IMVPOK
1
CLKEN
22
VR_HOT
23
THRM
PU8 MAX8736 PU8 MAX8736
+5VPCU
PR64
PR64
10/F_4
10/F_4
21
VCC
B1B:Change PC53 p/n CH5222K9A09
30
VDD
25
BST1
27
DH1
26
LX1
32
DL1
31
PGND
6
CSP1
5
CSN1
29
PWM3
10
CSP3
9
CSN3
33
DRSKP
28
PWM2
8
CSP2
7
CSN2
13
VPS
12
FBS
11
GNDS
20
GND
B1B:Change PC109 footprint to CC0805
PC53
PC53
2.2U_8
2.2U_8
4700P-25V_4
4700P-25V_4
DRSKP#
PWM2_8552
PR67 10.5K/F_4 PR67 10.5K/F_4
PR104 0_6 PR104 0_6
PC55
PC55
.22U-10V_4
.22U-10V_4
PC108
PC108
PR66 0_4 PR66 0_4
PC58
PC58
.22U-10V_4
.22U-10V_4
1 2
PR108
PR108
NTC_10K_6
NTC_10K_6
PR107
PR107
3.01K/F_4
3.01K/F_4
PC111
PC111
4700P-25V_4
4700P-25V_4
PD18
PD18
MTW355
MTW355
PC109
PC109
.22U-50V_8
.22U-50V_8
PQ22
PQ22
NTMS4108
NTMS4108
PR105
PR105
NTC_10K_6
NTC_10K_6
PR103
PR103
3.01K/F_4
3.01K/F_4
PR111 10/F_4 PR111 10/F_4
PC117
PC117
1000P-50V_4
1000P-50V_4
PR110 10/F_4 PR110 10/F_4
PC116
PC116
1000P-50V_4
1000P-50V_4
4
4
8736VCC
5
213
5
213
PR59 1.62K/F_6 PR59 1.62K/F_6
PR56 0_4 PR56 0_4
PR65 *0_4 PR65 *0_4
PR63 1.62K/F_6 PR63 1.62K/F_6
PR62 0_4 PR62 0_4
PR115
PR115
*27.4_4
*27.4_4
PR114
PR114
*27.4_4
*27.4_4
PC101
PC101
.01U-50V_6
.01U-50V_6
PQ23
PQ23
NTMS4707
NTMS4707
C1C:Change PQ23,PQ22 p/n
9/28 change
PR73 0_4 PR73 0_4
8736VCC
VCC_CORE
PR113
PR113
100/F_6
100/F_6
PR112
PR112
100/F_6
100/F_6
PC103
PC103
10U/X7R-25V_1210
10U/X7R-25V_1210
PL8
PL8
0.36uH
0.36uH
PR74
PR74
5.1K/F_4
5.1K/F_4
PR72
PR72
0_4
0_4
VIN_8736_1
PL10
PL10
1 2
PC118
PC118
+
+
470U-25V_ECAP
470U-25V_ECAP
PC104
PC104
10U/X7R-25V_1210
10U/X7R-25V_1210
8/1 Add for Acer request
B1B:Change PC118 p/n to CC74704MZ18
E3B:PC118 change to CC74704MZ26
1 2
1 2
+
+
+
+
PC51
PC50
PC50
470U-2.5V_7343
470U-2.5V_7343
+5VPCU
PC51
470U-2.5V_7343
470U-2.5V_7343
PC60
PC60
.01U-50V_6
.01U-50V_6
B1B:Change PC63 footprint to CC0805
1
PGND
VCC
10
BST
9
DH
8
LX
2
DL
3
4
5
7
6
PU9
PU9
GND
DLY
EN
PWM
MAX8552
MAX8552
A1A:Change p/n to AL008552004
VCCSENSE 4
VSSSENSE 4
1
HI0805R800R-10_8
HI0805R800R-10_8
VIN
VCC_CORE
PC64
PC64
2.2U_8
2.2U_8
PR75
PR75
0_4
0_4
Max Current 36A
PD10
PD10
MTW355
MTW355
4
PC63
PC63
.22U-50V_8
.22U-50V_8
PQ25
PQ25
NTMS4108
NTMS4108
4
+3V
5
213
5
213
PR50 *100K/F_4 PR50 *100K/F_4
PR49 *100K/F_4 PR49 *100K/F_4
PR48 *100K/F_4 PR48 *100K/F_4
PR47 *100K/F_4 PR47 *100K/F_4
PR46 *100K/F_4 PR46 *100K/F_4
PR45 *100K/F_4 PR45 *100K/F_4
PR44 *100K/F_4 PR44 *100K/F_4
PQ24
PQ24
NTMS4707
NTMS4707
C1C:Change PQ24,PQ25 p/n
9/28 change
H_VID0
1 2
H_VID1
1 2
H_VID2
1 2
H_VID3
1 2
H_VID4
1 2
H_VID5
1 2
H_VID6
1 2
0.36uH
0.36uH
VIN_8736_2
PC107
PC106
PC106
.01U-50V_6
.01U-50V_6
PL9
PL9
PC107
10U/X7R-25V_1210
10U/X7R-25V_1210
1 2
+
+
PC52
PC52
.01U-50V_6
.01U-50V_6
470U-2.5V_7343
470U-2.5V_7343
PC56
PC56
PL11
PL11
HI0805R800R-10_8
HI0805R800R-10_8
PC110
PC110
10U/X7R-25V_1210
10U/X7R-25V_1210
1 2
PC57
PC57
+
+
470U-2.5V_7343
470U-2.5V_7343
VIN
VCC_CORE
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
VCORE (MAX8736)
VCORE (MAX8736)
VCORE (MAX8736)
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
1A
1A
1A
of
of
of
41 46 Saturday, December 10, 2005
41 46 Saturday, December 10, 2005
41 46 Saturday, December 10, 2005
5
D D
C C
4
A1A:Change to HWPG
1999_SHT# 3
3
PCN2
PCN2
1
2
3
4
5
6
7
8
9
10
11
S5_ON 39
HWPG 39,43,44
MAIND 43
15V
VL
+5VPCU
SUSD
+5V_S5
+5V
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
88075-05001_POWER
88075-05001_POWER
2
+3VSUS
+3VPCU
+3V_S5
+3V
+5V_S5
+5V
VIN VIN
1
8/2 UPDATE CONN PIN DEFINE
A1A:Del +5VSUS discharge
VIN +3VSUS +1.8VSUS 15V
PR141
PR139
PR139
1M/F_4
1M/F_4
22_8
22_8
PR141
3
SUSON 32,39,43
2
PQ35
PQ35
DTC144EUA
DTC144EUA
1 3
PR140
PR140
1M/F_4
1M/F_4
2
PQ36
PQ36
2N7002
2N7002
1
PR142
PR142
22_8
22_8
3
2
PQ37
PQ37
2N7002
2N7002
1
PR138
PR138
1M/F_4
1M/F_4
SUSD
3
2
1
PQ34
PQ34
2N7002
2N7002
PC139
PC139
*2200P_6
*2200P_6
B B
SMDDR_VTERM +1.8V VIN +2.5V 15V
PR144
PQ40
PQ40
PR144
22_8
22_8
3
1
PQ39
PQ39
2N7002
2N7002
2
2
PR137
PR137
1M/F_4
1M/F_4
PR145
PR145
22_8
22_8
3
PR133
MAINON 20,32,39,43,44
A A
5
2
PQ30
PQ30
DTC144EUA
DTC144EUA
4
PR133
2
1M/F_4
1M/F_4
1 3
1
2N7002
2N7002
+1.5V +1.1V_VGA +3V +5V
PR136
PQ41
PQ41
PR136
22_8
22_8
3
2
2N7002
2N7002
1
2
PQ32
PQ32
PR135
PR135
1M/F_4
1M/F_4
MAIND
3
2
PQ31
PQ31
2N7002
2N7002
1
MAIND 43
PC132
PC132
*2200P_6
*2200P_6
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DISCHARGE/CONNECTOR
DISCHARGE/CONNECTOR
DISCHARGE/CONNECTOR
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
42 46 Monday, November 28, 2005
42 46 Monday, November 28, 2005
42 46 Monday, November 28, 2005
of
of
1
of
1A
1A
1A
PR143
PR143
22_8
22_8
3
2N7002
2N7002
1
3
PQ38
PQ38
PR147
PR147
22_8
22_8
3
2
2N7002
2N7002
1
PQ42
PQ42
PR148
PR148
22_8
22_8
3
2
2N7002
2N7002
1
PQ43
PQ43
PR146
PR146
22_8
22_8
3
2
2N7002
2N7002
1
5
4
3
2
1
1
VIN8743
D D
Max Current 15A
PC128
PC128
PQ29
10U/X7R-25V_1210
10U/X7R-25V_1210
B1B:Remove JP3,4 for +1.8VSUS
+1.8VSUS
1 2
1 2
PC68
PC68
470U-2.5V_7343
470U-2.5V_7343
C C
+3V_S5 15V
PR152
PR152
100K/F_4
100K/F_4
3
+2.5V
B B
2
PQ45
PQ45
2N7002E
2N7002E
1
PC71
PC71
PC69
PC69
1 2
+
+
+
+
10U-25V_1206
10U-25V_1206
470U-2.5V_7343
470U-2.5V_7343
B1B:Change PQ28 to BAM88960010
B1B:Change PR134 p/n to CS38063F911
+1.8VSUS
3
2
PQ46
PQ46
2N7002E
2N7002E
1
PL14
PL14
1.5UH_CDRH125S-1R5_13A
1.5UH_CDRH125S-1R5_13A
PC70
PC70
.1U-50V_6
.1U-50V_6
PQ7
PQ7
FDS6676AS_NL
FDS6676AS_NL
8
7
5
PR153
PR153
100K/F_4
100K/F_4
PQ28
PQ28
FDD8896_NL
FDD8896_NL
1
2
3 6
4
E3B:Change PQ7 p/n to FDS6676(BAM66760018)
R782 *0_4 R782 *0_4
D2B:Add PR152,PR153,PQ45,PQ46 for VGA +1.8V power sequence
B1B:Need add voltage divider for pin 2(SD)
G2996
G2996
PU11
PU11
PC105
PC105
.1U-50V_6
.1U-50V_6
2
SD
VDDQ
AVIN
PVIN
VREF
VSENSE
GND1TGND
9
5
6
7
MAINON 20,32,39,42,44
+1.8VSUS
+1.8V
PC102
PC102
10U-10V_8
10U-10V_8
A A
5
PQ29
4 3
FDD8876
FDD8876
1
4 3
1
1 2
PR134
PR134
82K_6
82K_6
+1.8V
D2B:Change PR134 to 82K CS38203F911
1 2
PC47
PC47
10U-25V_1206
10U-25V_1206
4
3
8
VTT
MAIND 42
PC113
PC113
.1U-50V_6
.1U-50V_6
PR132
PR132
100K/F_4
100K/F_4
HWPG 39,42,44
PC114
PC114
.1U-50V_6
.1U-50V_6
PC115
PC115
10U-10V_8
10U-10V_8
B1B:Stuff PC100 for SMDDR_VTERM
4
PC73
PC73
8743BST2
8743DH2
.1U-50V_8
.1U-50V_8
8743LX2
8743DL2
8743FB2
PC131
PC131
*100P_6
*100P_6
HWPG
MAINON
SUSON 32,39,42
8743ILIM2
8743ILIM1
+3VSUS
PR130
PR130
*100K/F_4
*100K/F_4
B1B:Remove PR130 for HWPG
SMDDR_VREF
SMDDR_VTERM
1 2
+
+
PC100
PC100
150U-4V_3528
150U-4V_3528
19
18
17
16
20
15
14
7
11
12
13
3
8743VCC
HWPG
PU13
PU13
BST2
DH2
LX2
CS2
DL2
OUT2
FB2
PGOOD
ON1
ON2
ILIM2
ILIM1
PCIEVDDRPG 20
PC129
PC129
4.7U-6.3V_8
4.7U-6.3V_8
VIN8743
MAX8743
MAX8743
MAINON 20,32,39,42,44
PD11
PD11
DAP202U
DAP202U
8743VCC
22
4
VDD
V+
VCC
BST1
DH1
LX1
DL1
CS1
OUT1
FB1
TON
REF
SKIP
GND
OVP8UVP
9
2
3
8743DH1
8743LX1
8743DL1
8743REF
+5VPCU
PC72
PC72
1U-10V_6
1U-10V_6
PC134
PC134
4.7U-6.3V_8
4.7U-6.3V_8
1 2
PC130
PC130
*100P_6
*100P_6
S5_ON
PR131
PR131
5.1K/F_4
5.1K/F_4
PR125
PR125
10K/F_4
10K/F_4
PR129
PR129
10/F_4
10/F_4
21
25
26
27
24
28
1
2
5
10
6
23
S5_ON 39,42
8743BST1
8743FB1
D2B:Add R783,remove PR38 for VGA +2.5V power sequence
R783 0_4 R783 0_4
PR38 *0_6 PR38 *0_6
3
Max Power Consumption 1.6W
+3VSUS
PC44
PC44
*.1U_6
*.1U_6
PC36
PC36
10U-10V_8
10U-10V_8
PC133
PC133
.1U-50V_8
.1U-50V_8
8743DL1
8743REF
1
2
3
4
PC88
PC88
.1U-50V_6
.1U-50V_6
4
5
D1
D1 S1/D2
D1
D1 S1/D2
G2
S2
G2
S2
G1
G1
8
7
6
1
2
3
D2B:Change PR126 10K CS31002FB26 to 220K CS42202FB10
PR126
PR126
220K/F_4
220K/F_4
8743ILIM1
PR124
PR124
150K/F_6
150K/F_6
PU6
PU6
NC0
EN
VIN
NC1
15K_4
15K_4
PR101
PR101
ADJ
7
VTT-ADJ
R2
1 2
NC2
VO
GND0
SC4215
SC4215
VIN8743
HI0805R800R-10_8
HI0805R800R-10_8
PC137
PC137
10U/X7R-25V_1210
10U/X7R-25V_1210
PQ33
PQ33
SI4914DY
SI4914DY
8743DH1
PL16
PL16
3R8UH_CDRH104R-3R8_6A
3R8UH_CDRH104R-3R8_6A
PR128
PR128
10K/F_4
10K/F_4
8743ILIM2
PR127
PR127
100K/F_4
100K/F_4
5
6
8
VTT_SRC
R1 0.8V
PR100
PR100
32.4K/F_4
32.4K/F_4
B1B:Change PU6 p/n CS33242FB19
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
VIN
PL15
PL15
Max Current 6A
PC138
PC138
PC136
PC136
PC74
PC74
PC91
PC91
10U-10V_8
10U-10V_8
1 2
.1U-50V_6
.1U-50V_6
10U-25V_1206
10U-25V_1206
B1B:Remove JP2 for +2.5V
PC42
PC42
10U-10V_8
10U-10V_8
+2.5V/+1.8VSUS / +1.5V
+2.5V/+1.8VSUS / +1.5V
+2.5V/+1.8VSUS / +1.5V
+1.5V
1 2
1 2
+
+
PC135
PC135
10U-25V_1206
10U-25V_1206
470U-2.5V_7343
470U-2.5V_7343
Max Current 2A
+2.5V
PC89
PC89
.1U-50V_6
.1U-50V_6
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
of
of
of
43 46 Saturday, December 10, 2005
43 46 Saturday, December 10, 2005
43 46 Saturday, December 10, 2005
1
A
A
A
1
A A
B1B:Remove PR123 for HWPG
A1A:Change to HWPG
HWPG 39,42,43
MAINON 20,32,39,42,43
A1A:Change to MAINON
B B
PL4
PL4
HI0805R800R-10_8
HI0805R800R-10_8
VIN
10U/X7R-25V_1210
10U/X7R-25V_1210
1.2V OR 1.0V @ 18A ASIC VDDC,VDDCI
+1.1V_VGA
1 2
PC2
PC2
.1U-50V_6
.1U-50V_6
C C
2
B1B:Change PU12(VDD) to +5VPCU
+5VPCU
1 2
PC124
PC124
PC121
PC121
+3V
PR123
PR123
*100K/F_6
*100K/F_6
PR122 0_4 PR122 0_4
PR116 0_6 PR116 0_6
1 2
PC75
PC75
4.7U-6.3V_8
4.7U-6.3V_8
PC65 4.7U-6.3V_8 PC65 4.7U-6.3V_8
PR121 34K/F_6 PR121 34K/F_6
PR120
PR120
100K/F_6
100K/F_6
VIN_1993
1 2
PC76
PC76
10U/X7R-25V_1210
10U/X7R-25V_1210
.1U-50V_6
.1U-50V_6
1 2
1714PG
VCCA-1V05
PC125
PC125
1U-10V_6
1U-10V_6
9/30 Modify PL5 rating to 17A
1.5UH_SIQH126-1R5PF_17A
1.5UH_SIQH126-1R5PF_17A
1 2
1 2
+
+
+
+
PC4
PC4
PC3
PC3
470U-2.5V_7343
470U-2.5V_7343
470U-2.5V_7343
470U-2.5V_7343
1 2
PC6
PC6
.47U-10V_6
.47U-10V_6
PR77
PR77
22_6
22_6
1714REF-1V05
PR76 *0_4 PR76 *0_4
PC78
PC78
.1U-50V_6
.1U-50V_6
1 2
PL5
PL5
PR3
PR3
698/F_6
698/F_6
VCCA-1V05
SI7392DP
SI7392DP
14
15
18
10
3
6
2
7
16
8
1 2
PQ9
PQ9
PQ8
PQ8
SI7336ADP
SI7336ADP
PR4 0_6 PR4 0_6
PU12
PU12
VDD
VCC
SKIP
PGOOD
SHDN
ILIM
N/C
REF
TON
AGND
MAX1714A
MAX1714A
213
213
VGA_CSP
VGA_OUT_R
3
1 2
PC122
PC122
10U/X7R-25V_1210
578
2 1
PD19
PD19
MTW355
17
V+
19
BST
1
DH
20
LX
13
DL
12
PGND
9
N/C_1
11
N/C_2
5
OUT
4
FB
PD3
PD3
MTW355
MTW355
PC77 2200P-50V_4 PC77 2200P-50V_4
PR18
PR18
56789
0_6
0_6
VGA_BST
1993_DH
4
1 2
PC9
PC9
.1U-50V_6
.1U-50V_6
1993_LX
56789
1993_DL
4
MTW355
PC119 .1U-50V_8 PC119 .1U-50V_8 PR119 0_6 PR119 0_6
DH-1V05
LX-1V05
DL-1V05
PC120
PC120
PR118
PR118
.1U-50V_6
.1U-50V_6
6.49K/F_4
6.49K/F_4
PR117
PR117
118K/F_4
118K/F_4
B1B:Change PR117 p/n to CS41182FB10
+5VPCU
19
VDD
MAX1993
MAX1993
VGA_P_VCC
24
22
V+
VCC
POK
OVP/UVP
LSAT
SHDN
GATE
REFIN
PU2
PU2
OD
TON
REF
FBLANK
SKIP
ILIM
2
5
13
1 2
PC8
PC8
470P-50V_4
470P-50V_4
PC15
PC15
1U-10V_6
1U-10V_6
PR21 20_6 PR21 20_6
1 2
17
BST
15
DH
16
LX
18
DL
20
GND
11
CSP
12
CSN
10
OUT
9
FB
14
4
3
23
21
7
8
1
6
578
1 2
PC16
PC16
1U-10V_6
1U-10V_6
VIN_1993
1993PG
VGA_REFIN
PR16
PR16
*0_6
*0_6
VGA_P_REF
PR7
PR7
140K/F_4
140K/F_4
PR11
PR11
100K/F_4
100K/F_4
3 6
241
3 6
241
PR6
PR6
75K/F_6
75K/F_6
1 2
10U/X7R-25V_1210
PQ26
PQ26
FDS6612A
FDS6612A
PL13
PL13
CHOKE 1.5UH +-20% 13A(PCMC104T-1R5MN)EP
CHOKE 1.5UH +-20% 13A(PCMC104T-1R5MN)EP
PQ27
PQ27
FDS6690AS
FDS6690AS
+3V
PR8
PR8
100K/F_4
100K/F_4
PR9 0_4 PR9 0_4
PR19 0_4 PR19 0_4
PR5 75K/F_6 PR5 75K/F_6
1 2
PC5
PC5
470P-50V_4
470P-50V_4
PR2
PR2
39K/F_4
39K/F_4
9/30 chnage PR2 to 39K(VGA HI voltage to 1.2V)
PC7
PC7
1U-10V_6
1U-10V_6
4
VIN1V05
PL12
PL12
HI0805R800R-10_8
HI0805R800R-10_8
PC66
PC66
+
+
470U-2.5V_7343
470U-2.5V_7343
VIN
PC126
PC126
.1U-50V_6
.1U-50V_6
1 2
PC127
PC127
+
+
10U-10V_8
10U-10V_8
Max Current 8A
+1.05V
1 2
PC123
PC123
10U/X7R-25V_1210
10U/X7R-25V_1210
PC67
PC67
+
+
470U-2.5V_7343
470U-2.5V_7343
C1C:Change PL13,PC66,PC67 to improve 1.05 efficiency over 80%
D2B:Add R777 for VDDCPG
R784 220_4 R784 220_4
VGA_P_REF
V_PWRCNTL
LO
HI 1.0V
C973 *.1U-10V_4 C973 *.1U-10V_4
HWPG 39,42,43
V_PWRCNTL 19
M56
1.2V
PC17
PC17
*.1U_6
*.1U_6
VDDCPG 20
PR20 0_4 PR20 0_4
+1.1V_VGA=2*(PR2+PR6)/(PR2+PR5+PR6)
5
MAINON 20,32,39,42,43
D D
B1B:Change PR39 p/n to CS32003F933
D2B:Remove PR39,PR40,PR41,PC46,PC48,PC49,PC98,PC99,PU7 for +1.2V_VPCIE
1
2
3
4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
+1.05V/+1.2V_VGA/+1.2V
+1.05V/+1.2V_VGA/+1.2V
+1.05V/+1.2V_VGA/+1.2V
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
44 46 Monday, November 28, 2005
44 46 Monday, November 28, 2005
44 46 Monday, November 28, 2005
of
of
5
of
1A
1A
1A
8
A1A:Change footprint to 20277-05XX-5P-L
C2B:Change PJ2 to DFHD04MS988(4 PIN)
D2B:Change PJ2 footprint to 4 pin
PJ2
PJ2
D D
1
2
3
4
20277-044L_POWER_CONN
20277-044L_POWER_CONN
.1U-50V_6
.1U-50V_6
PC37
PC37
PC38
PC38
.1U-50V_6
.1U-50V_6
VAD
PC43
PC43
.1U-50V_6
.1U-50V_6
5
PR34
PR34
10K/F_4
10K/F_4
4
321 6
C C
B B
VIN
PR23
PR23
22K/F_4
22K/F_4
PC18
PC18
220P-50V_4
220P-50V_4
PD15
PD15
MTW355
MTW355
PR22 47K/F_6 PR22 47K/F_6
OSC
200KHz
PC96
PC96
.1U-50V_6
.1U-50V_6
1
PD9
PD9
MTW355
MTW355
VAD
PU4A
PU4A
8 4
3
+
+
2
-
-
LM393
LM393
7
C1C:Remove fuse,bead
PC35 .01U-50V_6 PC35 .01U-50V_6
PQ6
PQ6
IMZ2
IMZ2
IMD
IMD
7/29 modife connect REF3V to +3VPCU 7/29 modife connect REFP to VIN
PR25
PR25
47K/F_6
47K/F_6
PR24
PR24
10K/F_4
10K/F_4
6
VA
PC97
PC97
.1U-50V_6
.1U-50V_6
PD8
PD8
MTW355
MTW355
PC40
PC40
1U/25V_8
PC30
PC30
.1U-50V_6
.1U-50V_6
PR32
PR32
0_4
0_4
1U/25V_8
1 2
VREFIN
PR36
PR36
0_4
0_4
PC93
PC93
.01U-50V_6
.01U-50V_6
PR151
PR151
*0_6
*0_6
PR35
PR35
0_4
0_4
PC94
PC94
.01U-50V_6
.01U-50V_6
PD7
PD7
2
DA204U
3
REF3V 46
CV-SET 39
CC-SET 39
DA204U
1
PC41
PC41
.1U-50V_6
.1U-50V_6
USE DEFAULT 4.2V/CELL
8724LDO
VH
PR96
PR96
0_6
0_6
PR98 0_6 PR98 0_6
PR97 *0_4 PR97 *0_4
PR150
PR150
*0_6
*0_6
+3VPCU
PR95
PR95
0_4
0_4
PR149
PR149
*0_6
*0_6
PC31
PC31
1000P-50V_4
1000P-50V_4
PC28
PC28
1000P-50V_4
1000P-50V_4
8724LDO
PR33
PR33
1K/F_6
1K/F_6
PC90
PC90
.1U-50V_6
.1U-50V_6
1
10
15
13
12
11
9
28
8
7
6
5
PR99
PR99
0.01_1W_3720
0.01_1W_3720
1 2
DCIN
ACIN
VCTL
ICTL
REFIN
ACOK
ICHG
IINP
SHDN
CCV
CCI
CCS
5
1P
2P
CSSN
CSSP
PU5
PU5
26
27
MAX8724
MAX8724
CELLS
CSSP
CSSN
DLOV
PGND
CSIP
CSIN
BATT
GND
GND
14
29
4
B1B:Change PD17 p/n to LF
1
3
2
PD17
PD17
SBM1040
SBM1040
7/29 Modify for 3 cell setting
PR30
PR30
10K/F_4
10K/F_4
PR31 33_6 PR31 33_6
PC39
PC39
1 2
1U-10V_6
1U-10V_6
PD16
PD16
MTW355
MTW355
8724DH
1 2
VREFIN
PC87
PC87
1 2
1U-10V_6
1U-10V_6
PC95
PC95
1U-10V_6
1U-10V_6
578
8724DH
3 6
578
3 6
8724CELLS
PR94
PR94
10K/F_4
10K/F_4
17
8724LDO
2
LDO
22
8724BST
24
BST
PC34
PC34
.1U-50V_6
.1U-50V_6
25
DHI
8724LX
23
LX
8724DL
21
DLO
20
CSIP
19
CSIN
18
BAT-V
16
8724REF
4
REF
PR37 6.65K/F_6 PR37 6.65K/F_6
3
CLS
PR102
PR102
10K/F_6
10K/F_6
CURRNT LIMIT POINT = 4.5A (95% adapter power)
E3B:PR37 change from 8.25K to 6.65K(CS26653D900)
E3B:PR102 change from 14K to 10K(CS31003B919)
PL7
PL7
HI0805R800R-10_8
HI0805R800R-10_8
PQ20
PQ20
AO4422
AO4422
241
PQ18
PQ18
AO4704
AO4704
241
7/29 change from 4422 to 4704
PC29
PC29
.1U-50V_6
.1U-50V_6
PC26
PC26
10U/X7R-25V_1210
10U/X7R-25V_1210
PL6
PL6
5.6U(PLC-1055-5R6)L-F
5.6U(PLC-1055-5R6)L-F
3
PC27
PC27
10U/X7R-25V_1210
10U/X7R-25V_1210
2
VA2 46
PR93
PR93
0.01_1W_3720
0.01_1W_3720
8/16 Change for 5R6 choke
1 2
PC85
10U/X7R-25V_1210
10U/X7R-25V_1210
PC32
PC32
10U/X7R-25V_1210
10U/X7R-25V_1210
PC85
10U/X7R-25V_1210
10U/X7R-25V_1210
1P
2P
PC86
PC86
10U/X7R-25V_1210
10U/X7R-25V_1210
PC33
PC33
Charge Current max setting = 0.8C
PC25
PC25
.01U-50V_6
.01U-50V_6
1
BAT-V 46
VAD
PR80 10K/F_4 PR80 10K/F_4
2 1
PD12 ZD12V PD12 ZD12V
7
PR81
PR81
10K/F_4
10K/F_4
7/29 delete
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
BATTERY CHARGER
BATTERY CHARGER
BATTERY CHARGER
Date: Sheet of
Date: Sheet
6
5
4
3
Date: Sheet
2
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
of
of
45 46 Saturday, December 10, 2005
45 46 Saturday, December 10, 2005
45 46 Saturday, December 10, 2005
1
1A
1A
1A
ACIN 39
PR79
PR79
6.8K/F_4
6.8K/F_4
A A
8
A1A:Change p/n to DFHD07MR391
B1B:Change CN26 footprint to 20175A-07G1-7P-R
1
1ST_BATT_CONN
CN26
CN26
1
2
3
4
8
5
9
6
A A
7
MAIN_BATTERY
MAIN_BATTERY
TEMP_MBAT
PR14
PR14
330_4
330_4
1 2
MBDATA_MBAT
PD2
PD2
RLZ5.6B
RLZ5.6B
2 1
PC12
PC12
47P-50V_4
47P-50V_4
PR13
PR13
330_4
330_4
TEMP_MBAT 39
1 2
PC11 47P-50V_4 PC11 47P-50V_4
1 2
1 2
PC13 .1U-50V_6 PC13 .1U-50V_6
PC79
PC79
47P-50V_4
47P-50V_4
MBCLK 5,19,39
PD4
PD4
ZD5.6V
ZD5.6V
2 1
CLOSE TO BATTERY CON
REF3V
B B
PR12
PR12
10K/F_4
10K/F_4
TEMP_MBAT
1 2
PC14
PC14
.01U-50V_6
.01U-50V_6
E3B:PQ19 change to FDS6676(BAM66760018)
2ND_BATT_CONN
1 2
MBCLK
PC21
PC21
47P-50V_4
47P-50V_4
TEMP_ABAT 39
1 2
PC24
PC24
.1U-50V_6
.1U-50V_6
1 2
PC22
PC22
47P-50V_4
47P-50V_4
CN27
CN27
1
2
3
4
8
5
9
C C
6
7
SECOND_BATTERY
SECOND_BATTERY
TEMP_ABAT
PR27
PR27
330_4
330_4
MBDATA_ABAT
PD6
PD6
ZD5.6V
ZD5.6V
2 1
1 2
PC20
PC20
47P-50V_4
47P-50V_4
PR28
PR28
330_4
330_4
PD5
PD5
ZD5.6V
ZD5.6V
2 1
2
C1C:Remove fuse
PC19
PC19
10U/X7R-25V_1210
10U/X7R-25V_1210
ADISCHG
2
PQ10
PQ10
PDTC143TT
PDTC143TT
BAT-V 45
C1C:Add PQ44 for charger
C1C:Remove fuse
PC82
PC82
10U/X7R-25V_1210
10U/X7R-25V_1210
MDISCHG
2
PQ13
PQ13
PDTC143TT
PDTC143TT
1 2
PC83
PC83
.01U-50V_6
.01U-50V_6
3
4
5
D2B:Change PQ12 to FDS6679(BAM66790014)
PQ12
1
2
3
PR90
PR90
10K/F_4
10K/F_4
1
2
3
1
2
3 6
1
2
3 6
PQ17
PQ17
AO4411
AO4411
PQ12
FDS6679
FDS6679
PR86
PR86
10K/F_4
10K/F_4
8
7
6
5 4
8
8
7
7
6
6
5 4
5 4
MBAT+
321 6
PQ11
PQ11
IMD2
IMD2
1 3
5
4
ACHG
PQ19
PQ19
AO4414-LF
AO4414-LF
8
7
5
4
PQ44
PQ44
AO4414-LF
AO4414-LF
8
7
5
4
ABAT+
321 6
PQ14
PQ14
IMD2
IMD2
1 3
5
4
MCHG
PQ16
PQ16
8
7
6
5 4
AO4411
AO4411
PD13
PD13
RLZ15B
RLZ15B
2 1
PD14
PD14
RLZ15B
RLZ15B
2 1
PQ15
PQ15
1
2
3
AO4411
AO4411
CELL-SET 39
D/C# 39
BL/C# 39
1
2
3
PR85
PR85
470K_6
470K_6
PR84
PR84
470K_6
470K_6
200mil
PC81
PC81
.1U-50V_6
.1U-50V_6
PR92
PR92
10K/F_4
10K/F_4
1 3
1
7
2
PQ5
PQ5
PDTC143TT
PDTC143TT
1 3
PR89
PR89
10K/F_4
10K/F_4
VH
8 4
+
+
-
-
+
+
-
-
PQ4
PQ4
PDTC143TT
PDTC143TT
2
PU10A
PU10A
LM358ADR
LM358ADR
3
2
PU10B
PU10B
LM358ADR
LM358ADR
5
6
ADISCHG
PC10
PC10
.1U-50V_6
.1U-50V_6
VH
VL
MDISCHG
PR83
PR83
1M/F_4
1M/F_4
MCHG
ACHG
PR82
PR82
100K/F_4
100K/F_4
16
VDD
A1B2C3GL4G16G2
Y015Y114Y213Y312Y411Y510Y69Y7
74HCT237
74HCT237
5
PC92
PC92
10U/X7R-25V_1210
10U/X7R-25V_1210
2
7
PU3
PU3
GND
8
VH
1 3
PR15
PR15
10K/F_4
10K/F_4
PQ2
PQ2
PDTC143TT
PDTC143TT
VL
PR17
PR17
10K/F_4
10K/F_4
PR10
PR10
100K/F_4
100K/F_4
2
VIN
PQ21
PQ21
FDS6612A
FDS6612A
PC84
PC84
1 2
.01U-50V_6
.01U-50V_6
VA2
PR91
PR91
160K/F_6
160K/F_6
REF3V
PR26
PR26
120K/F_4
120K/F_4
REFP
1 2
PC80
PC80
.01U-50V_6
.01U-50V_6
VA2 45
VIN
3 6
241
578
PU4B
PU4B
LM393
LM393
5
+
+
7
6
-
-
3
PQ3
PQ3
2N7002
2N7002
1
CLOSE TO BATTERY CON
REF3V
D D
TEMP_ABAT
1
1 2
PR29
PR29
10K/F_4
10K/F_4
PC23
PC23
.01U-50V_6
.01U-50V_6
REF3V 45
1ST_BATT
MBDATA_MBAT
MBDATA_ABAT
2ND_BATT
2
PR88
PR88
10K/F_4
10K/F_4
PR87
PR87
10K/F_4
10K/F_4
+3VPCU
U39
U39
5
VCC
1
IN_B1
3
IN_B0
NC7SB3157P6X
NC7SB3157P6X
SEL
COM
GND
SEL
LOW
FUNCTION
IN_B0
HIGH IN_B1
6
4
2
M/A#
3
M/A# 39
MBDATA 5,19,39
4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
BATTERY SELECT
BATTERY SELECT
BATTERY SELECT
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT : ZC1
PROJECT : ZC1
Quanta Computer Inc.
Quanta Computer Inc.
of
of
of
46 46 Saturday, December 10, 2005
46 46 Saturday, December 10, 2005
5
46 46 Saturday, December 10, 2005
A
A
A