Quanta ZC1, TravelMate 8200, TravelMate 8202, TravelMate 8210 Schematic

5

X'TAL

14.318MHZ

Clock Generator

DVI

D D

P25

TVOUT

P25

DVI

TFT LCD Panel

15.4"
WSXGA+

P25

TVout
LVDS
VGA

CRT

C C

P26

ICS954310BGLF

VRAM X 4(GDDR3)
256MB/500MHZ

VGA

ATI M56P

P18,P19,P20,P21,
P22,P24

X'TAL
27M

HDD

P35

Bluetooth

USB6 P29

Camera Module(1.3M)

X'TAL

USB7 P25

6M

6 in 1 Cardreader
(SMSC 2228)

USB4

B B

USB Port x 4

USB0~3

P31

P29

Media-Bay
ODD/2nd HDD/2nd Battery

P35

Int MIC

P37

4

P2

P23

SATA

USB 2.0

3

ZC1 SYSTEM BLOCK DIAGRAM

Yonah/Merom 479
uFCPGA

533/667 MHZ FSB

PCI-Express
16X Lan

CALISTOGA-945PM

1466
FCBGA

P6,P7,P8,P9,P10,P11

DMI X4 interface

ICH7-M Digital Home

652 BGA

P14,P15,P16,P17

SMBUS

G-SENSOR

P35

X'TAL

32.768KHZ

P3,P4

Thermal Sensor

Dual Channel DDR2

533/667 Mhz

PCI-Express

PCI Bus interface

CPU

DDR II
SODIMM0

DDR II
SODIMM1

PCMCIA+1394
+Cardreader
Controller

2

P5

P12,P13

X'TAL24.576MHZ

EV@: Stuff when external VGA used
SH@: Stuff when SATA HDD used
PH@: Stuff when PATA HDD used

EZ4 Docking
Connector

PCIE1~2 , Lan
Ser & Par Port
PS2 , VGA, DVI
SPDIF,SM BUS

P32

MiniCard /
WLAN

P29

PCI-Express X 2
TV out / CRT

Audio

DVI
10/100/1G

Intel Tekoa
GigaLAN

82573E

P27

1

Switch
MAX4892

USB5

New Card

X'TAL
25M

Switch

Switch

P25,P28

P33

P25,26

P37

LPC

KBC PC97551

P39

OSC
48MHZ

Audio Amplifier
Maxim Max 9750

P37

Azalia Audio
Controller
Realtek ALC883

P36

Azalia

X'TAL

32.768K

IEEE 1394
Port

MIC Jack

A A

Speaker

P37

Phone Jack

5

P37 P37

P37

Line in

Azalia MDC

RJ11

P28

4

P36

BIOS

Touch Pad
(Dual-Point)

P39

P40

G sensor

P35

Super I/O
NS PC87383

P38

3

O2 711MP1

P31

FIR

P30,P31

Smart card

P30

TPM 1.2

P38 P38

(Option)

2

SPI FLASH

PCMCIA Slot

Transformer

P27

P30

P28

Fan Header

P5

RJ45

P28

Primary Battery
Secod Battery

P45,P46

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

BLOCK DIAGRAM

BLOCK DIAGRAM

BLOCK DIAGRAM

Date: Sheet of

Date: Sheet

Date: Sheet

PROJECT : ZC1

PROJECT : ZC1

Quanta Computer Inc.

Quanta Computer Inc.

of

of

146Monday, November 07, 2005

146Monday, November 07, 2005

146Monday, November 07, 2005

1

1A

1A

1A

A

B

C

D

E

FSC FSB FSA CPU SRC PCI

1 0 1 100 100 33

0 0 1 133 100 33

Default

0 1 1 166 100 33
0 1 0 200 100 33
0 0 0 266 100 33
1 0 0 333 100 33

4 4

1 1 0 400 100 33
1 1 1 200 100 33

L68

+3V

120 ohms@100Mhz

L68
BK2125HS121-T_8

BK2125HS121-T_8

25 mils

VDD_SRC_CPU

C794

C794

.1U-10V_4

.1U-10V_4

R580 2.2_6R580 2.2_6

C496

C496

.1U-10V_4

.1U-10V_4

VDD_A

.1U-10V_4

.1U-10V_4

C498

C498

C523

C523

.1U-10V_4

.1U-10V_4

.1U-10V_4

.1U-10V_4

C497

C497

10U-10V_8

10U-10V_8

C814

C814

25 mils

3 3

2 2

+3V

L69

L69

BK2125HS121-T_8

BK2125HS121-T_8

NEW_CLKREQ#33

EZ_CLKREQ#32

PREQ3(PCIE) Latched Select
"0" : CLK Enable
"1" : CLK Disable Control : PCIE 2,4,6,8

PREQ4(PCIE) Latched Select
"0" : CLK Enable
"1" : CLK Disable Control : PCIE 1,3,5,7

VDD_PCI

R608 2.2_6R608 2.2_6

R577 1_6R577 1_6

C813

C813
.1U-10V_4

.1U-10V_4

VDD_48

VDD_REF

C800

C800

.1U-10V_4

.1U-10V_4

CLKGN_REQ3_PCIE
CLKGN_REQ4_PCIE

C526

C526
.1U-10V_4

.1U-10V_4

C525

C525
.1U-10V_4

.1U-10V_4

R590 10K_4R590 10K_4
R289 10K_4R289 10K_4

C805

C805
10U-10V_8

10U-10V_8

C541

C541
10U-10V_8

10U-10V_8

C801
10U-10V_8

10U-10V_8

A1A-change X1,X2 capacitor from 27pf to 33pf(CL=20pf)

Close to IC <500mils

12

12

+3V

1
3

CG_XIN

21

Y6

Y6

14.318MHZ

14.318MHZ

CG_XOUT

R599 *10K_4R599 *10K_4

PM_STPCPU#
PM_STPPCI#

R600 33_4R600 33_4
R604 4.7K_4R604 4.7K_4

R574 4.7K_4R574 4.7K_4
R581 33_4R581 33_4

VDD_REF
VDD_SRC_CPU

VDD_PCI

VDD_SRC_CPU

VDD_48

CLKGN_REQ3_PCIE
CLKGN_REQ4_PCIE

RP61

RP61

2
4

33_4P2R_S

33_4P2R_S

T151T151

INTERNAL PULL HIGH

IREF

R_DOT96#

CGCLK_SMB13

CGDAT_SMB13

CLKUSB_4816

SIO_14M38

C804

C804
10U-10V_8

10U-10V_8

DREFCLK8
DREFCLK#8

+-20PPM,20PF

Iref=5mA,
Ioh=4*Iref

+3V

VR_PWRGD_CK410#16,41

PM_STPCPU#16

PM_STPPCI#16

CGCLK_SMB
CGDAT_SMB

CLK_BSEL0
CLK_BSEL1
CLK_BSEL2

DREFCLK
DREFCLK#

C807

C807
33P-50V_4

33P-50V_4

C809

C809
33P-50V_4

33P-50V_4

C798

C798
*10P_4

*10P_4

R575 475/F_6R575 475/F_6

A1A-FSB Frequency Select:by CPU driven

+1.05V

CPU_BSEL03

R328 *56.2/F_4R328 *56.2/F_4

R338 0_4R338 0_4
R336 *1K_4R336 *1K_4

CLK_BSEL0

U46

U46

58

X1

57

X2

10

Vtt_PwrGd#/PD

62

CPU_STOP#

63

PCI/PCIE_STOP#

54

SCLK

55

SDATA

12

FSA/USB_48MHz

16

FSB/TEST_MODE

61

REF1/FSLC/TEST_SEL

56

VDD_REF

50

VDDCPU

1

VDD_PCI_1

7

VDD_PCI_2

21

VDD_PCIE

28

VDDPCIE

42

VDD_PCIE

11

VDD_48

32

REQ3(PCIE)

33

REQ4(PCIE)

47

IREF

14

DOT96MHz

15

DOT96MHz#

34

PWRSAVE#

53

R339 1K_4R339 1K_4

VDD_A

45

VDDA

CK-410M

CK-410M

CPUCLKC2/PCIEC8

27Mfix/LCD_SSCGT/PCIE0T

27SS/LCD_SSCGC/PCIE0C

selPCIEX0_LCD#/PCI5

PCICLK2/REQ_SEL

GND

GND

GND_PCI_26GND_SRC

GND_PCI_1

GND_48

GND

2

59

37

29

13

A1A:Change pin 3 PCLK_LAN to PCLK_TPM

46

REF0

GNDA

CPUCLKT0
CPUCLKC0

CPUCLKT1
CPUCLKC1

CPUCLKT2/PCIET8

REQ1#/PCIET7
REQ2#/PCIEC7

PCIET6
PCIEC6

PCIET5
PCIEC5

PCIET4
PCIEC4

SATA_CKT
SATA_CKC

PCIET3
PCIEC3

PCIET2
PCIEC2

PCIET1
PCIEC1

PCI4
PCI3

PCIF1/selLCD_27#

PCIF0/ITP_EN

ICS954310BGLF

ICS954310BGLF

MCH_BSEL0 8

Place these termination to close CK410M.

14M_REF

60

RHCLK_CPU

52

RHCLK_CPU#

51

RHCLK_MCH

49

RHCLK_MCH#

48
44

A1A:Remove PCIE clock

43

CLK_PCIE_EZ2_L

41

CLK_PCIE_EZ2#_L

40

RSRC_MCH

39

RSRC_MCH#

38

CLK_PCIE_EZ1_L

36

CLK_PCIE_EZ1#_L

35

CLK_PCIE_NEW

30

CLK_PCIE_NEW#

31

RSRC_SATA

26

RSRC_SATA#

27

RSRC_ICH

24

RSRC_ICH#

25

CLK_PCIE_LAN_L

22

CLK_PCIE_LAN#_L

23

CLK_PCIE_MINI_

19

CLK_PCIE_MINI_#

20

R_DREFSSCLKR_DOT96

17

R_DREFSSCLK#

18

R_PCLK_SIO

5

R_PCLK_711

4

R_PCLK_TPM

3

PCLK_MINI_LPC

64

R_PCLK_ICH

9

R_PCLK_591

8

R597 10K_4R597 10K_4

ITP/SRC7 SELECT
0: SRC7 1: ITP

swap

R_DREFSSCLK#
R_DREFSSCLK

RP59 33_4P2R_SRP59 33_4P2R_S

RP60 33_4P2R_SRP60 33_4P2R_S

RP56 33_4P2R_SRP56 33_4P2R_S

RP57 33_4P2R_SRP57 33_4P2R_S

RP58 33_4P2R_SRP58 33_4P2R_S

RP67 33_4P2R_SRP67 33_4P2R_S

RP66 33_4P2R_SRP66 33_4P2R_S

RP65 33_4P2R_SRP65 33_4P2R_S

RP64 33_4P2R_SRP64 33_4P2R_S

RP63 33_4P2R_SRP63 33_4P2R_S

RP62 EV@33_4P2R_SRP62 EV@33_4P2R_S

1
3

1
3

1
3

1
3

1
3

3
1

3
1

3
1

3
1

3
1

R596 33_4R596 33_4
R595 33_4R595 33_4
R594 33_4R594 33_4
R588 33_4R588 33_4
R324 33_4R324 33_4
R602 33_4R602 33_4

1
3

2
4

2
4

2
4

2
4

2
4

4
2

4
2

4
2

4
2

4
2

C539

C539
*10P_4

*10P_4

C538

C538

C817

C817

*10P_4

*10P_4

*10P_4

*10P_4

C803

C803
*10P_4

*10P_4

2
4

R576 33_4R576 33_4

CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3

CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6

CLK_PCIE_EZ2 32
CLK_PCIE_EZ2# 32

CLK_PCIE_3GPLL 8
CLK_PCIE_3GPLL# 8

CLK_PCIE_EZ1 32
CLK_PCIE_EZ1# 32

CLK_PCIE_NEW_C 33
CLK_PCIE_NEW_C# 33

CLK_PCIE_SATA 14
CLK_PCIE_SATA# 14

CLK_PCIE_ICH 15
CLK_PCIE_ICH# 15

CLK_PCIE_LAN 27
CLK_PCIE_LAN# 27

CLK_PCIE_MINI 29
CLK_PCIE_MINI# 29

C819

C819
*10P_4

*10P_4

C818

C818
*10P_4

*10P_4

CLK_PCIE_M56# 18
CLK_PCIE_M56 18

PCI_CLK_SIO 38
PCI_CLK_711 30
PCLK_TPM 38
PCLK_MINI 29
PCLK_ICH 15
PCLK_591 39

CLK_CPU_BCLK
CLK_CPU_BCLK#

CLK_MCH_BCLK
CLK_MCH_BCLK#

CLK_PCIE_LAN
CLK_PCIE_LAN#

CLK_PCIE_3GPLL
CLK_PCIE_3GPLL#

CLK_PCIE_SATA
CLK_PCIE_SATA#

CLK_PCIE_MINI
CLK_PCIE_MINI#

CLK_PCIE_ICH
CLK_PCIE_ICH#

CLK_PCIE_NEW_C
CLK_PCIE_NEW_C#

DREFCLK
DREFCLK#

CLK_PCIE_EZ2
CLK_PCIE_EZ2#

CLK_PCIE_EZ1
CLK_PCIE_EZ1#

CLK_PCIE_M56#
CLK_PCIE_M56

14M_ICH 16

C799

C799
*10P_4

*10P_4

2

1

4

3

RP54 49.9_4P2R_SRP54 49.9_4P2R_S

RP55 49.9_4P2R_SRP55 49.9_4P2R_S

RP73 49.9_4P2R_SRP73 49.9_4P2R_S

RP52 49.9_4P2R_SRP52 49.9_4P2R_S

RP75 49.9_4P2R_SRP75 49.9_4P2R_S

RP72 49.9_4P2R_SRP72 49.9_4P2R_S

RP74 49.9_4P2R_SRP74 49.9_4P2R_S

RP69 49.9_4P2R_SRP69 49.9_4P2R_SC801

RP70 49.9_4P2R_SRP70 49.9_4P2R_S

RP51 49.9_4P2R_SRP51 49.9_4P2R_S

RP53 49.9_4P2R_SRP53 49.9_4P2R_S

RP71 49.9_4P2R_SRP71 49.9_4P2R_S

2

1

4

3

4

3

2

1

2

1

4

3

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

2

1

4

3

2

1

4

3

2

1

4

3

+3V

R579

Q34

Q34

RHU002N06

RHU002N06

1 1

PDAT_SMB16,27,29,32,33,35

PCLK_SMB16,27,29,32,33,35

3

Q35

Q35

RHU002N06

RHU002N06

3

A

R578

R578

2

10K_4

10K_4

+3V

2

R579
10K_4

10K_4

1

CGDAT_SMB

Stuff 0 ohm for 533MHz, NC for 667MHz

1

CGCLK_SMB

+1.05V

CPU_BSEL13

+1.05V

CPU_BSEL23 MCH_BSEL2 8

B

R327 *1K_4R327 *1K_4

R322 0_4R322 0_4
R326 *0_4R326 *0_4

R573 *1K_4R573 *1K_4

R571 0_4R571 0_4
R572 *0_4R572 *0_4

CLK_BSEL1

CLK_BSEL2

R323 1K_4R323 1K_4

R570 1K_4R570 1K_4

MCH_BSEL1 8

C

R_PCLK_SIO

PCLK_MINI_LPC

R_PCLK_ICH

R337 10K_4R337 10K_4

R325 *10K_4R325 *10K_4

R587 *10K_4R587 *10K_4
R586 10K_4R586 10K_4

R603 10K_4R603 10K_4

R598 *10K_4R598 *10K_4

Latched Select. (Pin 17,18)

+3V

"0" : LCD CLK(UMA)
"1" : PCIEX CLK(M56)

Latched Select. (Pin 40,41)

+3V

"0" : PCIEX CLK
"1" : PEREQ#

SELLCD_27# Select. (Pin 17,18)

+3V

"0" : 27MHzSS/27MHzSS# pair
"1" : LCD CLK pair

D

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

CLOCK GENERATOR

CLOCK GENERATOR

CLOCK GENERATOR

Date: Sheet

Date: Sheet

Date: Sheet of

PROJECT : ZC1

PROJECT : ZC1

Quanta Computer Inc.

Quanta Computer Inc.

246Friday, December 09, 2005

246Friday, December 09, 2005

246Friday, December 09, 2005

of

E

of

1A

1A

1A

5

U43A

H_A#[31:3]6

D D

H_ADSTB0#6
H_REQ#[4:0]6

H_A#[31:3]6

C C

H_ADSTB1#6

H_A20M#14
H_FERR#14

H_IGNNE#14

H_STPCLK#14

B B

XDP_DBRESET#

XDP_TMS

XDP_TDI

XDP_BPM#5

A A

XDP_TCK

XDP_TRST#

R210 0_4R210 0_4

H_INTR14

H_NMI14

H_SMI#14

T112T112
T114T114
T115T115
T113T113
T110T110
T109T109
T111T111
T26T26
T124T124
T125T125

T145T145

R275 *54.9/F_4R275 *54.9/F_4

R211 54.9/F_4R211 54.9/F_4

R209 54.9/F_4R209 54.9/F_4

R206 54.9/F_4R206 54.9/F_4

R213 54.9/F_4R213 54.9/F_4

R215 54.9/F_4R215 54.9/F_4

5

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_STPCLK_R#

TP_A32#
TP_A33#
TP_A34#
TP_A35#
TP_A36#
TP_A37#
TP_A38#
TP_A39#
TP_APM0#
TP_APM1#

TP_HFPLL

U43A

J4

A[3]#

L4

A[4]#

M3

A[5]#

K5

A[6]#

M1

N2

J1
N3
P5
P2
L1
P4
P1

R1

L2
K3

H2
K2

J3
L5

Y2
U5

R3

W6

U4
Y5
U2

R4

T5
T3

W3
W5

Y4

W2

Y1
V4

A6
A5

C4
D5

C6

B4
A3

AA1
AA4
AB2
AA3

M4

N5
T2
V3
B2

C3

B25

+1.05V

XDP_TCK PD 27.4/1% ?
XDP_TRST PD 510ohm /5% ?
XDP_TDI PU 150ohm /1.05V
XDP_TMS PU 39.2/1%?
XDP_TDO PU 54.9ohm?
For ITP700

ADDR GROUP 0

ADDR GROUP 0

A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#

REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#

A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
ADSTB[1]#

A20M#
FERR#
IGNNE#

STPCLK#
LINT0
LINT1
SMI#

RSVD[01]#
RSVD[02]#
RSVD[03]#
RSVD[04]#
RSVD[05]#
RSVD[06]#
RSVD[07]#
RSVD[08]#
RSVD[09]#
RSVD[10]#

RSVD[11]#

PZ47823-2743-42

PZ47823-2743-42

DEFER#

DRDY#
DBSY#

CONTROL

CONTROL

LOCK#

RESET#

TRDY#

BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#

PRDY#

PREQ#

XDP/ITP SIGNALSTHERMH CLK

XDP/ITP SIGNALSTHERMH CLK

PROCHOT

THERMDA

THERMDC

THERMTRIP#

BCLK[0]
BCLK[1]

RSVD[12]#

RSVD[13]#
RSVD[14]#
RSVD[15]#
RSVD[16]#

RESERVED

RESERVED

RSVD[17]#
RSVD[18]#
RSVD[19]#
RSVD[20]#

4

T116T116

H1

ADS#

E2

BNR#

G5

BPRI#

H5
F21
E1

F1

BR0#

D20

IERR#

B3

INIT#

H4
B1

H_RS#0

F3

RS[0]#
RS[1]#
RS[2]#

HIT#

HITM#

TCK
TDO

TMS

TRST#

DBR#

H_RS#1

F4

H_RS#2

G3
G2

G6
E4

AD4
AD3
AD1
AC4
AC2

XDP_BPM#5

AC1

XDP_TCK

AC5

XDP_TDI

AA6

TDI

XDP_TDO

AB3

XDP_TMS

AB5

XDP_TRST#

AB6

XDP_DBRESET#

C20
D21

A24
A25

THERMTRIP#_PWR

C7

A22
A21

TP_EXTBREF

T22

TP_SPARE0

D2

TP_SPARE1

F6

TP_SPARE2

D3

TP_SPARE3

C1

TP_SPARE4

AF1

TP_SPARE5

D22

TP_SPARE6

C23

TP_SPARE7

C24

E2A:Add Q58,remove D42,R554,C338
to resolve System can't boot
when battery under 30% issue

DELAY_VR_PWRGOOD8,16,41

THERMTRIP#_PWR

4

H_ADS# 6
H_BNR# 6
H_BPRI# 6

H_DEFER# 6
H_DRDY# 6
H_DBSY# 6

H_BREQ#0 6

H_INIT# 14
H_LOCK# 6

H_CPURST# 6

H_TRDY# 6
H_HIT# 6

H_HITM# 6

T117T117

H_PROCHOT_R#

H_THERMDA 5
H_THERMDC 5

R214 0_4R214 0_4

A1A:Stuff R1406

T138T138

CLK_CPU_BCLK 2
CLK_CPU_BCLK# 2

T137T137

T59T59

T28T28
T27T27
T32T32
T121T121
T120T120
T63T63
T58T58
T142T142

+1.05V

R217

R217
56_4

56_4

R216

R216

330_4

330_4

H_RS#[2:0] 6

T31T31
T30T30
T119T119
T33T33
T118T118

+1.05V

Q58

Q58
BSS301

BSS301

+1.05V

R268

R268

56.2/F_4

56.2/F_4

T127T127

T29T29

XDP PU_R < 0.2"

R274

R274
68_4

68_4
R273 0_4R273 0_4

PM_THRMTRIP# 8,14

+1.05V

R267

R267
1K/F_4

1K/F_4

D2C:Intel WW46,suggest Stuff R563(CS21002FB24)

R266

R266
2K/F_4

2K/F_4

+1.05V

3

2

1
2

1 3

Q19 MMBT3904Q19 MMBT3904

3

+1.05V

+1.05V 2,4,6,8,9,10,14,17,44

Near to MCH <500mils

H_D#[63:0]6

H_DSTBN#06
H_DSTBP#06
H_DINV#06
H_D#[63:0]6

H_PROCHOT# 41

H_DSTBN#16
H_DSTBP#16
H_DINV#16

H_GTLREF

R563

20/15mils

CPU_BSEL02
CPU_BSEL12
CPU_BSEL22

R563

R562 51_4R562 51_4

A1A:Intel 2005 WW25 update

R554

3

R554
*10K_4

*10K_4

C338

C338
*1U-16V_6

*1U-16V_6

XDP_DBRESET#

1999_SHT# 42

2 1

D42

D42
*BAS316

*BAS316

U43B

E22
F24
E26
H22
F23
G25
E25
E23
K24
G24

J24

J23
H26
F26
K22
H25
H23
G22

J26

N22
K25
P26
R23
L25
L22
L23

M23

P25
P22
P23
T24

R24

L26
T25
N24

M24

N25

M26

U43B

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31

AD26

1K/F_4

1K/F_4

C26
D25

B22
B23

C21

PZ47823-2743-42

PZ47823-2743-42

+1.05V

R271

R271
*330_6

*330_6

2

Q20

Q20

1 3

*MMBT3904

*MMBT3904

R276 0_4R276 0_4

D[0]#
D[1]#
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#

D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#

GTLREF

TEST1
TEST2

BSEL[0]
BSEL[1]
BSEL[2]

DATA GRP 0 DATA GRP 1

DATA GRP 0 DATA GRP 1

DATA GRP 2

DATA GRP 2

DSTBN[2]#
DSTBP[2]#

DATA GRP 3

DATA GRP 3

DSTBN[3]#
DSTBP[3]#

MISC

MISC

DPRSTP#

PWRGOOD

D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#

DINV[2]#

D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#

DINV[3]#
COMP[0]

COMP[1]
COMP[2]
COMP[3]

DPSLP#

DPWR#

SLP#

PSI#

2

AA23
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
W24
Y25
V23

AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26
AD23
AE24
AC20

R26
U26
U1
V1

E5
B5
D24
D6
D7
AE6

SYS_RST# 16

2

1

H_D#[63:0] 6

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

COMP0
COMP1
COMP2
COMP3

27.4/F_4

27.4/F_4

T34T34

ICH_DPRSTP# 14
H_DPSLP# 14

H_DSTBN#2 6
H_DSTBP#2 6
H_DINV#2 6
H_D#[63:0] 6

H_DSTBN#3 6
H_DSTBP#3 6
H_DINV#3 6

R264

R264
R26554.9/F_4 R26554.9/F_4
R20727.4/F_4 R20727.4/F_4
R20854.9/F_4 R20854.9/F_4

H_CPUSLP# 6,14
PSI# 41

+1.05V

25/25mils

H_PWRGD is CMOS driving by ICH

T60T60

R212

R212
*200/F_6

*200/F_6

H_DPWR# 6
H_PWRGD 14

TO VRD

PROJECT : ZC1

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

CPU(1 OF 2 )

CPU(1 OF 2 )

CPU(1 OF 2 )

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROJECT : ZC1

Quanta Computer Inc.

Quanta Computer Inc.

346Sunday, December 04, 2005

346Sunday, December 04, 2005

346Sunday, December 04, 2005

1

1A

1A

1A

5

U43D

U43D

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

A26

VSS[008]

B6

D D

C C

B B

A A

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F8

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080]

P3

VSS[081]

PZ47823-2743-42

PZ47823-2743-42

5

VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
AF3
AF6
AF8
AF11
AF13
AF16
AF19
AF21
AF24

VCC_CORE

4

C370

C370
22U-6.3V_8

22U-6.3V_8

C363

C363
22U-6.3V_8

22U-6.3V_8

C427

C427
22U-6.3V_8

22U-6.3V_8

C341

C341
22U-6.3V_8

22U-6.3V_8

C386

C386
22U-6.3V_8

22U-6.3V_8

C409

C409
22U-6.3V_8

22U-6.3V_8

C400

C400
22U-6.3V_8

22U-6.3V_8

C443

C443
22U-6.3V_8

22U-6.3V_8

C340

C340
22U-6.3V_8

22U-6.3V_8

C359

C359
22U-6.3V_8

22U-6.3V_8

C339

C339
22U-6.3V_8

22U-6.3V_8

C389

C389
22U-6.3V_8

22U-6.3V_8

C349

C349
22U-6.3V_8

22U-6.3V_8

C399

C399
22U-6.3V_8

22U-6.3V_8

C368

C368
22U-6.3V_8

22U-6.3V_8

C375

C375
22U-6.3V_8

22U-6.3V_8

change to 0805

4

C402

C402
22U-6.3V_8

22U-6.3V_8

C423

C423
22U-6.3V_8

22U-6.3V_8

C421

C421
22U-6.3V_8

22U-6.3V_8

C378

C378
22U-6.3V_8

22U-6.3V_8

C401

C401
22U-6.3V_8

22U-6.3V_8

C422

C422
22U-6.3V_8

22U-6.3V_8

C373

C373
22U-6.3V_8

22U-6.3V_8

C390

C390
22U-6.3V_8

22U-6.3V_8

C420

C420
22U-6.3V_8

22U-6.3V_8

C442

C442
22U-6.3V_8

22U-6.3V_8

C385

C385
22U-6.3V_8

22U-6.3V_8

C410

C410
22U-6.3V_8

22U-6.3V_8

C388

C388
22U-6.3V_8

22U-6.3V_8

C372

C372
22U-6.3V_8

22U-6.3V_8

C428

C428
22U-6.3V_8

22U-6.3V_8

C369

C369
22U-6.3V_8

22U-6.3V_8

3

A10
A12
A13
A15
A17
A18
A20

B10
B12
B14
B15
B17
B18
B20

C10
C12
C13
C15
C17
C18

D10
D12
D14
D15
D17
D18

E10
E12
E13
E15
E17
E18
E20

F10
F12
F14
F15
F17
F18

F20
AA7
AA9

AA10
AA12
AA13
AA15
AA17
AA18
AA20

AB9

AC10
AB10
AB12
AB14
AB15
AB17
AB18

3

A7
A9

B7
B9

C9

D9

E7
E9

F7
F9

U43C

U43C

VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]

PZ47823-2743-42

PZ47823-2743-42

VCC[100]

VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]

VCCSENSE
VSSSENSE

VCC[68]
VCC[69]
VCC[70]
VCC[71]
VCC[72]
VCC[73]
VCC[74]
VCC[75]
VCC[76]
VCC[77]
VCC[78]
VCC[79]
VCC[80]
VCC[81]
VCC[82]
VCC[83]
VCC[84]
VCC[85]
VCC[86]
VCC[87]
VCC[88]
VCC[89]
VCC[90]
VCC[91]
VCC[92]
VCC[93]
VCC[94]
VCC[95]
VCC[96]
VCC[97]
VCC[98]
VCC[99]

VCCA

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

2

VCC_COREVCC_CORE

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

V6
G21
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

B26

VCCA (1.5v) is a power source required by the PLL clock

AD6
AF5
AE5
AF4
AE3
AF2
AE2

+1.05V

+1.05V

+

+

C781

C781

330U-2.5V_7343

330U-2.5V_7343

+1.05V
VCC_CORE
+1.5V

VCC_CORE

C350

C350
22U-6.3V_8

22U-6.3V_8

C449

C449
.1U-10V_4

.1U-10V_4

H_VID0 41
H_VID1 41
H_VID2 41
H_VID3 41
H_VID4 41
H_VID5 41
H_VID6 41

C419

C419
22U-6.3V_8

22U-6.3V_8

C361

C361
.1U-10V_4

.1U-10V_4

+1.5V

+1.05V 2,3,6,8,9,10,14,17,44
VCC_CORE 41
+1.5V 8,10,15,17,29,33,42,43

C371

C371
22U-6.3V_8

22U-6.3V_8

C360

C360

C448

C448

.1U-10V_4

.1U-10V_4

.1U-10V_4

.1U-10V_4

VCC_CORE

R221

R221
*100/F_4

*100/F_4

AF7
AE7

R220 *100/F_4R220 *100/F_4

A1A:Reversed VCCSENSE/VSSSENSE on
Vcore side

PROJECT : ZC1

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

CPU(2 OF 2 )

CPU(2 OF 2 )

CPU(2 OF 2 )

Date: Sheet

Date: Sheet

Date: Sheet

2

PROJECT : ZC1

Quanta Computer Inc.

Quanta Computer Inc.

1

C398

C398
22U-6.3V_8

22U-6.3V_8

C450

C450
.1U-10V_4

.1U-10V_4

near CPU B26

+1.5V

C472

C472
.01U-16V_4

.01U-16V_4

VCCSENSE 41
VSSSENSE 41

446Monday, November 28, 2005

446Monday, November 28, 2005

446Monday, November 28, 2005

1

C362

C362
.1U-10V_4

.1U-10V_4

of

of

of

C475

C475
10U/X5R-6.3V_8

10U/X5R-6.3V_8

1A

1A

1A

5

4

3

2

1

+3V

Q17

Q17

3

Q18

Q18

3

+3V

2

1

R192

R192
10K_4

10K_4

2

1

1 2

THERM_ALERT#16

R205 *0_4R205 *0_4

+3V

R776 10K_4R776 10K_4

RHU002N06

RHU002N06

D D

MBCLK19,39,46

MBDATA19,39,46

RHU002N06

RHU002N06

D2B:Add R776 for CPU thermal sensor

C C

+5V

D2B:Add R545 for VGA thermal sensor

VGA_THERM#19

THERM_OVER# G993_VEN

B B

CPUFAN#39

R545 0_4R545 0_4

R529 0_4R529 0_4

+5V

1 2

1 2

R80 *0_4R80 *0_4

G993_VEN

U38

U38

VIN2VO

1

FON#

4

VSET

G995P1U

G995P1U

*AO3403

*AO3403

GND
GND
GND
GND

Q13

Q13

1

2

3
5
6
7
8

TH_FAN_POWER

3

30 MIL

A1A:Change FAN driver to G995

+3V

R196

R196
10K_4

10K_4

LM86__SMC
LM86_SMD

THERM_OVER#

R81

R81
10K_4

10K_4

THERM_OVER#

FANSIG39

.01U-16V_4

.01U-16V_4

R193

R193
200_4

200_4

C112

C112

LM86VCC

U12

U12

8

SCLK

7

SDA

6

ALERT#

4

OVERT#

MAX6657/GMT-781

MAX6657/GMT-781

ADDRESS: 98H

C732

C732

*.01U-16V_4

*.01U-16V_4

A1A:Remove FANSIG capacitor

25mils

VCC
DXP
DXN

GND

CPU FAN

+3V

R547

R547

10K_4

10K_4

1
2
3
5

CN28

CN28

1
2
345

FAN_CON

FAN_CON

C287

C287
.1U-10V_4

.1U-10V_4

H_THERMDA

C305

C305
2200P-50V_4

2200P-50V_4

H_THERMDC

10/20mils

H_THERMDA 3

H_THERMDC 3

A1A:Change FAN CONN footprint

F3B:Add R793,C974 to prevent FAN noise

PROJECT : ZC1

A A

5

4

3

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Thermal Sensor,FAN

Thermal Sensor,FAN

Thermal Sensor,FAN

Date: Sheet

Date: Sheet

Date: Sheet of

2

PROJECT : ZC1

Quanta Computer Inc.

Quanta Computer Inc.

546Friday, December 02, 2005

546Friday, December 02, 2005

546Friday, December 02, 2005

of

of

1

1A

1A

1A

5

H_XRCOMP

H_XSWING

C484

C484
.1U-10V_4

.1U-10V_4

H_YSWING

C792

C792
.1U-10V_4

.1U-10V_4

5

10 mils/20mils

10 mils/20mils

10 mils/20mils

10 mils/20mils

R280

R280

24.9/F_4

24.9/F_4

D D

C C

B B

A A

+1.05V

+1.05V

+1.05V

+1.05V

R278

R278

54.9/F_4

54.9/F_4

H_XSCOMP

R272

R272
221/F_4

221/F_4

R277

R277
100/F_4

100/F_4

R565

R565

54.9/F_4

54.9/F_4

H_YSCOMP

R566

R566
221/F_4

221/F_4

R567

R567
100/F_4

100/F_4

H_YRCOMP

R568

R568

24.9/F_4

24.9/F_4

CLK_MCH_BCLK2
CLK_MCH_BCLK#2

H_D#[63:0]3

H_XRCOMP
H_XSCOMP
H_XSWING

H_YRCOMP
H_YSCOMP
H_YSWING

Short Stub < 100mils
extract from same point

T65T65

T66T66

4

U44A

K11
T10

W11

U11
T11

W9

W7

W6

AB7
AA9

W4
W3

W5
Y10
AB8

W2
AA4
AA7
AA2
AA6

AA10

AA1
AB4

AC9
AB11
AC11

AB3
AC2
AD1
AD9
AC1
AD7
AC6

AB5

AD10

AD4
AC8

W1

AG2
AG1

F1

J1

H1

J6
H3
K2
G1
G2
K9
K1
K7

J8
H4

J3
G4

T3
U7
U9

T1

T8

T4
U5

T9

T5

Y3
Y7

Y8

E1
E2
E4

Y1
U1

U44A

H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63

H_XRCOMP
H_XSCOMP
H_XSWING

H_YRCOMP
H_YSCOMP
H_YSWING

H_CLKIN
H_CLKIN#

Calistoga(945PM)

Calistoga(945PM)

HOST

HOST

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

4

3

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8

H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31

H_ADS#
H_ADSTB#_0
H_ADSTB#_1

H_VREF_0

H_BNR#

H_BPRI#

H_BREQ#0

H_CPURST#

H_DBSY#

H_DEFER#

H_DPWR#

H_DRDY#

H_VREF_1

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

H_HIT#

H_HITM#

H_LOCK#

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

H_RS#_0
H_RS#_1
H_RS#_2

H_SLPCPU#

H_TRDY#

3

H9
C9
E11
G11
F11
G12
F9
H11
J12
G14
D9
J14
H13
J15
F14
D12
A11
C11
A12
A13
E13
G13
F12
B12
B14
C12
A14
C14
D14

E8
B9
C13
J13
C6
F6
C7
B7
A7
C3
J9
H8
K13

J7
W8
U3
AB10

K4
T7
Y5
AC4

K3
T6
AA5
AC5

D3
D4
B3

D8
G8
B8
F8
A8

B4
E6
D6

E3
E7

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

R561 0_4R561 0_4

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

2

H_A#[31:3] 3

H_ADS# 3
H_ADSTB0# 3
H_ADSTB1# 3

H_BNR# 3
H_BPRI# 3
H_BREQ#0 3
H_CPURST# 3
H_DBSY# 3
H_DEFER# 3
H_DPWR# 3
H_DRDY# 3

H_DINV#[3:0] 3

H_DSTBN#[3:0] 3

H_DSTBP#[3:0] 3

H_HIT# 3
H_HITM# 3
H_LOCK# 3

H_REQ#[4:0] 3

H_RS#[2:0] 3

H_CPUSLP# 3,14
H_TRDY# 3

2

1

+1.05V

+1.05V

C467

C467
.1U-10V_4

.1U-10V_4

C469

C469
.1U-10V_4

.1U-10V_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet

Date: Sheet

+1.05V 2,3,4,8,9,10,14,17,44

H_VREF :10 mils/20 mils space

R261

R261
100/F_4

100/F_4

R257

R257
200/F_4

200/F_4

GMCH HOST(1 OF 6 )

GMCH HOST(1 OF 6 )

GMCH HOST(1 OF 6 )

Place within 100 mils

H_VREF

H_VREF

PROJECT : ZC1

PROJECT : ZC1

Quanta Computer Inc.

Quanta Computer Inc.

646Friday, December 02, 2005

646Friday, December 02, 2005

646Friday, December 02, 2005

1

1A

1A

of

of

1A

5

4

3

2

1

M_B_DQ[63:0]13

D D

M_A_DQ[63:0]13

C C

B B

A A

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

5

AJ35

AJ34
AM31
AM33

AJ36

AK35

AJ32

AH31
AN35
AP33
AR31
AP31

AN38
AM36
AM34

AN33

AK26

AL27

AM26

AN24

AK28

AL28

AM24

AP26

AP23

AL22
AP21
AN20

AL23
AP24
AP20

AT21
AR12
AR14
AP13
AP12

AT13

AT12

AL14

AL12

AK9
AN7
AK8
AK7
AP9
AN9

AT5
AL5

AY2

AW2

AP1
AN2
AV2

AT3

AN1

AL2
AG7
AF9
AG4
AF6
AG9
AH6
AF4
AF8

U44D

U44D

SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63

Calistoga(945PM)

Calistoga(945PM)

AU12

SA_BS_0

AV14

SA_BS_1

BA20

SA_BS_2

AY13

SA_CAS#

AJ33

SA_DM_0

AM35

SA_DM_1

AL26

SA_DM_2

AN22

SA_DM_3

AM14

SA_DM_4

AL9

SA_DM_5

AR3

SA_DM_6

AH4

SA_DM_7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9

SA_RAS#

SA_WE#

AK33
AT33
AN28
AM22
AN12
AN8
AP3
AG5
AK32
AU33
AN27
AM21
AM12
AL8
AN3
AH5

AY16
AU14
AW16
BA16
BA17
AU16
AV17
AU17
AW17
AT16
AU13
AT17
AV20
AV12

AW14
AK23
AK24
AY14

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6

SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13

SA_RCVENIN#

SA_RCVENOUT#

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

4

M_A_BS#0
M_A_BS#1
M_A_BS#2

M_A_CAS#
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13

TP_MA_RCVENIN#
TP_MA_RCVENOUT#

M_A_BS#0 12,13
M_A_BS#1 12,13
M_A_BS#2 12,13
M_A_CAS# 12,13

M_A_DM[7:0] 13

M_A_DQS[7:0] 13

M_A_DQS#[7:0] 13

M_A_A[13:0] 12,13

M_A_RAS# 12,13

T45T45
T44T44

M_A_WE# 12,13

3

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

AK39

AJ37
AP39
AR41

AJ38
AK38
AN41
AP41
AT40
AV41
AU38
AV38
AP38
AR40

AW38

AY38
BA38
AV36
AR36
AP36
BA36
AU36
AP35
AP34
AY33
BA33
AT31
AU29
AU31

AW31

AV29

AW29

AM19

AL19
AP14
AN14
AN17

AM16

AP15
AL15

AJ11
AH10

AJ9
AN10
AK13
AH11
AK10

AJ8
BA10

AW10

BA4

AW4

AY10

AY9

AW5

AY5

AV4

AR5
AK4
AK3

AT4

AK5

AJ5

AJ3

U44E

U44E

SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63

Calistoga(945PM)

Calistoga(945PM)

AT24

SB_BS_0

AV23

SB_BS_1

AY28

SB_BS_2

AR24

SB_CAS#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6

SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8

SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13

SB_RAS#

SB_RCVENIN#

SB_RCVENOUT#

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

SB_WE#

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

GMCH DDR(2 OF 6 )

GMCH DDR(2 OF 6 )

GMCH DDR(2 OF 6 )

Date: Sheet of

Date: Sheet

2

Date: Sheet

AK36
AR38
AT36
BA31
AL17
AH8
BA5
AN4

AM39
AT39
AU35
AR29
AR16
AR10
AR7
AN5
AM40
AU39
AT35
AP29
AP16
AT10
AT7
AP5

AY23
AW24
AY24
AR28
AT27
AT28
AU27
AV28
AV27
AW27
AV24
BA27
AY27
AR23

AU23
AK16
AK18
AR27

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13

TP_MB_RCVENIN#
TP_MB_RCVENOUT#

PROJECT : ZC1

PROJECT : ZC1

Quanta Computer Inc.

Quanta Computer Inc.

M_B_BS#0 12,13
M_B_BS#1 12,13
M_B_BS#2 12,13
M_B_CAS# 12,13
M_B_DM[7:0] 13

M_B_DQS[7:0] 13

M_B_DQS#[7:0] 13

M_B_A[13:0] 12,13

M_B_RAS# 12,13

T52T52
T48T48

M_B_WE# 12,13

746Friday, December 02, 2005

746Friday, December 02, 2005

746Friday, December 02, 2005

1

1A

1A

of

of

1A

5

U44B

CLK_MCH_OE#

T36T36

MCH_RSVD_1

T37T37

MCH_RSVD_2

T35T35

MCH_RSVD_3

T64T64

MCH_RSVD_4

T61T61

MCH_RSVD_5

T54T54

MCH_RSVD_6

T57T57

MCH_RSVD_7

T62T62

MCH_RSVD_8

T46T46

TV_DCONSEL0

T40T40

TV_DCONSEL1

T38T38

MCH_RSVD_11

T126T126

MCH_RSVD_12

D D

A1A:Change PM_EXTTS#1
to DPRSLPVR

C C

DELAY_VR_PWRGOOD3,16,41

PLT_RST-R#15

+3V

B B

R226 10K/F_4R226 10K/F_4
R224 *10K/F_4R224 *10K/F_4

T132T132

MCH_RSVD_13

T136T136

MCH_RSVD_14

T39T39

MCH_RSVD_15

T43T43

MCH_BSEL02
MCH_BSEL12

MCH_BSEL22

PM_BMBUSY#16
PM_EXTTS#013
DPRSLPVR16

PM_THRMTRIP#3,14

T41T41
T42T42

MCH_ICH_SYNC15

T150T150
T123T123
T149T149
T135T135
T134T134
T133T133
T139T139
T140T140
T143T143
T122T122
T147T147
T129T129
T144T144
T130T130
T148T148
T128T128
T141T141
T131T131
T146T146

MCH_CFG_3
MCH_CFG_4

T47T47

MCH_CFG_5

T56T56

MCH_CFG_6
MCH_CFG_7
MCH_CFG_8
MCH_CFG_9

T50T50

MCH_CFG_10
MCH_CFG_11
MCH_CFG_12
MCH_CFG_13
MCH_CFG_14
MCH_CFG_15

T55T55

MCH_CFG_16

T49T49

MCH_CFG_17
MCH_CFG_18

T51T51

MCH_CFG_19
MCH_CFG_20

R228 0_4R228 0_4

RST IN# MCH

R231 100/F_4R231 100/F_4

SDVO_CTRLCLK
SDVO_CTRLDATA

TP_MCH_NC0
TP_MCH_NC1
TP_MCH_NC2
TP_MCH_NC3
TP_MCH_NC4
TP_MCH_NC5
TP_MCH_NC6
TP_MCH_NC7
TP_MCH_NC8
TP_MCH_NC9
TP_MCH_NC10
TP_MCH_NC11
TP_MCH_NC12
TP_MCH_NC13
TP_MCH_NC14
TP_MCH_NC15
TP_MCH_NC16
TP_MCH_NC17
TP_MCH_NC18

PM_EXTTS#0
DPRSLPVR

U44B

H32

RSVD_0

T32

RSVD_1

R32

RSVD_2

F3

RSVD_3

F7

RSVD_4

AG11

RSVD_5

AF11

RSVD_6

H7

RSVD_7

J19

RSVD_8

K30

RSVD_9

J29

RSVD_10

A41

RSVD_11

A35

RSVD_12

A34

RSVD_13

D28

RSVD_14

D27

RSVD_15

K16

CFG_0

K18

CFG_1

J18

CFG_2

F18

CFG_3

E15

CFG_4

F15

CFG_5

E18

CFG_6

D19

CFG_7

G16
E16
D15
G15
K15
C15
H16
G18
H15

G28
H26

AH33
AH34

K28

BA41
BA40
BA39

AY41

AW41

AW1

D16

J25
K27
J26

F25

H28
H27

C41

BA3
BA2
BA1
B41

AY1

A40
A39

G6

D1
C1

B2

A4
A3

CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20

PM_BMBUSY#
PM_EXTTS#_0
PM_EXTTS#_1
PM_THRMTRIP#
PWROK
RSTIN#

SDVO_CTRLCLK
SDVO_CTRLDATA
LT_RESET#

NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18

CFGRSVD

CFGRSVD

PM

PM

MISC

MISC

NC

NC

Calistoga(945PM)

Calistoga(945PM)

A1A:don't stuff PM_EXTTS#1 pull high resistor

A1A:Reversed for SDVO CLK/DATA

+2.5V

+2.5V

R229 *4.7K_4R229 *4.7K_4

R225 *4.7K_4R225 *4.7K_4

SDVO_CTRLCLK

SDVO_CTRLDATA

PULL LOW FOR DVO NOT PRESENT(INTERNAL PULLLOW IN 915GM)

1.MCH_CFG_5 Low = DMI X2, High=DMIX4

2.MCH_CFG_6 DDR : Low =Moby Dick, High= Calistoga (Default)

3.MCH_CFG_7 CPU Strap Low=RSVD, High=Mobile CPU

4.MCH_CFG_9 PCI Exp Graphics Lane: Low =Reserved,High=Mobility

5.MCH_CFG_10 Host PLL VCC Select: Low=Reserved, High=Mobility

6.MCH_CFG_11: PSB 4x CLK ENABLE Low=Reserved, High=Calistoga

7.MCH_CFG_16 FSB Dynmic ODT: Low=Dynamic ODT Disabled,

A A

High=Dynamic ODT Enabled.

8.MCH_CFG_18 VCC Select: LOW=1.05V, High=1.5V

9.MCH_CFG_19 DMI LANE Reversal: Low=Normal,High=LANES Reversed.

10.MCH_CFG_20 PCIE Backward interpoerability mode: Low= only
SDVO or PCIE x1 is operational (defaults) ,High=SDVO and
PCIE x1 are operation simultaneously via the PEG port.

5

SM_CKE_0
SM_CKE_1
SM_CKE_2
SM_CKE_3

SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3

SM_OCDCOMP_0
SM_OCDCOMP_1

SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3

SM_RCOMP#

SM_RCOMP

DDR MUXINGCLKDMI

DDR MUXINGCLKDMI

SM_VREF_0
SM_VREF_1

D_REFCLKIN#

D_REFCLKIN

D_REFSSCLKIN#

D_REFSSCLKIN

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

4

AY35

SM_CK_0

AR1

SM_CK_1

AW7

SM_CK_2

AW40

SM_CK_3

AW35

SM_CK#_0

AT1

SM_CK#_1

AY7

SM_CK#_2

AY40

SM_CK#_3

AU20
AT20
BA29
AY29

AW13
AW12
AY21
AW21

AL20
AF10

BA13
BA12
AY20
AU21

AV9
AT9

SMDDR_VREF_MCH

AK1
AK41

AF33

G_CLKIN#

AG33

G_CLKIN

A27
A26

DREFSSCLK#

C40

DREFSSCLK

D41

DMI_TXN0

AE35

DMI_TXN1

AF39

DMI_TXN2

AG35

DMI_TXN3

AH39

DMI_TXP0

AC35

DMI_TXP1

AE39

DMI_TXP2

AF35

DMI_TXP3

AG39

DMI_RXN0

AE37

DMI_RXN1

AF41

DMI_RXN2

AG37

DMI_RXN3

AH41

DMI_RXP0

AC37

DMI_RXP1

AE41

DMI_RXP2

AF37

DMI_RXP3

AG41

< 0.1" . 15mils/15mils space
use 1% R

M_OCDCOMP_0
M_OCDCOMP_1

M_RCOMP#
M_RCOMP

M_CLK_DDR0 13
M_CLK_DDR1 13
M_CLK_DDR2 13
M_CLK_DDR3 13

M_CLK_DDR#0 13
M_CLK_DDR#1 13
M_CLK_DDR#2 13
M_CLK_DDR#3 13

M_CKE0 12,13
M_CKE1 12,13
M_CKE2 12,13
M_CKE3 12,13

M_CS#0 12,13
M_CS#1 12,13
M_CS#2 12,13
M_CS#3 12,13

M_ODT0 12,13
M_ODT1 12,13
M_ODT2 12,13
M_ODT3 12,13

R569 0_6R569 0_6

CLK_PCIE_3GPLL# 2
CLK_PCIE_3GPLL 2
DREFCLK# 2
DREFCLK 2

T184T184
T185T185

DMI_TXN[3:0] 15

DMI_TXP[3:0] 15
DMI_RXN[3:0] 15

DMI_RXP[3:0] 15

GMCH Strap pin

MCH_CFG_5

MCH_CFG_6

MCH_CFG_7

MCH_CFG_9

MCH_CFG_10

A1A:MCH_CFG_11->intel WW31 recommand remove

MCH_CFG_11

MCH_CFG_12

MCH_CFG_13

MCH_CFG_16

MCH_CFG_18 CFG_RSVD_0_R

MCH_CFG_19

MCH_CFG_20

4

R248 *2.2K_4R248 *2.2K_4

R247 *2.2K_4R247 *2.2K_4

R245 *2.2K_4R245 *2.2K_4

R250 *2.2K_4R250 *2.2K_4

R249 *2.2K_4R249 *2.2K_4

R253 *2.2K_4R253 *2.2K_4

A1A:intel WW12 recommand remove

R252 *2.2K_4R252 *2.2K_4

R251 *2.2K_4R251 *2.2K_4

R246 *2.2K_4R246 *2.2K_4

R230 1K/F_4R230 1K/F_4

R219 *1K/F_4R219 *1K/F_4

R222 *1K/F_4R222 *1K/F_4

3

+V1.5_PCIE
+3V
SMDDR_VREF
+1.8VSUS

If the LVDS interface is
not implemented, all
signals associated with
the interface can be left
as No Connects

+V1.5_PCIE 10
+3V 2,5,10,13,14,15,16,17,18,19,20,24,25,26,27,29,30,31,32,33,34,35,36,37,38,39,40,41,42,44
SMDDR_VREF 13,43
+1.8VSUS 9,13,20,42,43

15mils/15mils

R259

R259

R242

NC from WW45

SMDDR_VREF

R242
*40.2/F_4

*40.2/F_4

*40.2/F_4

*40.2/F_4

Layout as short as passable

15mils/10mils

80.6/F_4

80.6/F_4

M_RCOMP#

M_RCOMP

80.6/F_4

80.6/F_4

+1.8VSUS

R262

R262

R263

R263

+1.5V

R737 0_6R737 0_6

B1B:TV disable connect to +1.5V

B1B:CRT disable connect to GMCH VCC Core

R738 0_6R738 0_6

+1.05V

+3V

R227

R227

*0_4

*0_4

+3V

+3V

3

2

1

20mils/20mils space

U44C

U44C

D32

L_BKLTCTL

J30

L_BKLTEN

H30

L_CLKCTLA

H29

L_CLKCTLB

G26

L_DDC_CLK

G25

L_DDC_DATA

B38

L_IBG

C35

L_VBG

F32

L_VDDEN

C33

L_VREFH

C32

L_VREFL

A33

LA_CLK#

A32

LA_CLK

E27

LB_CLK#

E26

LB_CLK

C37

LA_DATA#_0

B35

LA_DATA#_1

A37

LA_DATA#_2

B37

LA_DATA_0

B34

LA_DATA_1

A36

LA_DATA_2

G30

LB_DATA#_0

D30

LB_DATA#_1

F29

LB_DATA#_2

F30

LB_DATA_0

D29

LB_DATA_1

F28

LB_DATA_2

A16

TV_DACA_OUT

C18

TV_DACB_OUT

A19

TV_DACC_OUT

J20

TV_IREF

B16

TV_IRTNA

B18

TV_IRTNB

B19

TV_IRTNC

E23

CRT_BLUE

D23

CRT_BLUE#

C22

CRT_GREEN

B22

CRT_GREEN#

A21

CRT_RED

B21

CRT_RED#

C26

CRT_DDC_CLK

C25

CRT_DDC_DATA

G23

CRT_HSYNC

J22

CRT_IREF

H23

CRT_VSYNC

Calistoga(945PM)

Calistoga(945PM)

LVDS

LVDS

TV

TV

VGA

VGA

EXP_A_COMPI

EXP_A_COMPO

EXP_A_RXN_0
EXP_A_RXN_1
EXP_A_RXN_2
EXP_A_RXN_3
EXP_A_RXN_4
EXP_A_RXN_5
EXP_A_RXN_6
EXP_A_RXN_7
EXP_A_RXN_8

EXP_A_RXN_9
EXP_A_RXN_10
EXP_A_RXN_11
EXP_A_RXN_12
EXP_A_RXN_13
EXP_A_RXN_14
EXP_A_RXN_15

EXP_A_RXP_0

EXP_A_RXP_1

EXP_A_RXP_2

EXP_A_RXP_3

EXP_A_RXP_4

EXP_A_RXP_5

EXP_A_RXP_6

EXP_A_RXP_7

EXP_A_RXP_8

EXP_A_RXP_9
EXP_A_RXP_10
EXP_A_RXP_11
EXP_A_RXP_12
EXP_A_RXP_13
EXP_A_RXP_14
EXP_A_RXP_15

EXP_A_TXN_0

EXP_A_TXN_1

EXP_A_TXN_2

EXP_A_TXN_3

EXP_A_TXN_4

EXP_A_TXN_5

EXP_A_TXN_6

EXP_A_TXN_7

EXP_A_TXN_8

EXP_A_TXN_9
EXP_A_TXN_10
EXP_A_TXN_11
EXP_A_TXN_12

PCI-EXPRESS GRAPHICS

PCI-EXPRESS GRAPHICS

EXP_A_TXN_13
EXP_A_TXN_14
EXP_A_TXN_15

EXP_A_TXP_0

EXP_A_TXP_1

EXP_A_TXP_2

EXP_A_TXP_3

EXP_A_TXP_4

EXP_A_TXP_5

EXP_A_TXP_6

EXP_A_TXP_7

EXP_A_TXP_8

EXP_A_TXP_9

EXP_A_TXP_10
EXP_A_TXP_11
EXP_A_TXP_12
EXP_A_TXP_13
EXP_A_TXP_14
EXP_A_TXP_15

If not implemented, the SDVO interface signals can be left as No Connect.

PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8

PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

GMCH DMI/VEDIO(3 OF 6 )

GMCH DMI/VEDIO(3 OF 6 )

GMCH DMI/VEDIO(3 OF 6 )

Date: Sheet

Date: Sheet

2

Date: Sheet

EXP_A_COMPX

D40
D38

PEG_RXN0

F34

PEG_RXN1

G38

PEG_RXN2

H34

PEG_RXN3

J38

PEG_RXN4

L34

PEG_RXN5

M38

PEG_RXN6

N34

PEG_RXN7

P38

PEG_RXN8

R34

PEG_RXN9

T38

PEG_RXN10

V34

PEG_RXN11

W38

PEG_RXN12

Y34

PEG_RXN13

AA38

PEG_RXN14

AB34

PEG_RXN15

AC38

PEG_RXP0

D34

PEG_RXP1

F38

PEG_RXP2

G34

PEG_RXP3

H38

PEG_RXP4

J34

PEG_RXP5

L38

PEG_RXP6

M34

PEG_RXP7

N38

PEG_RXP8

P34

PEG_RXP9

R38

PEG_RXP10

T34

PEG_RXP11

V38

PEG_RXP12

W34

PEG_RXP13

Y38

PEG_RXP14

AA34

PEG_RXP15

AB38

C_PEG_TXN0

F36

C_PEG_TXN1

G40

C_PEG_TXN2

H36

C_PEG_TXN3

J40

C_PEG_TXN4

L36

C_PEG_TXN5

M40

C_PEG_TXN6

N36

C_PEG_TXN7

P40

C_PEG_TXN8

R36

C_PEG_TXN9

T40

C_PEG_TXN10

V36

C_PEG_TXN11

W40

C_PEG_TXN12

Y36

C_PEG_TXN13

AA40

C_PEG_TXN14

AB36

C_PEG_TXN15

AC40

C_PEG_TXP0

D36

C_PEG_TXP1

F40

C_PEG_TXP2

G36

C_PEG_TXP3

H40

C_PEG_TXP4

J36

C_PEG_TXP5

L40

C_PEG_TXP6

M36

C_PEG_TXP7

N40

C_PEG_TXP8

P36

C_PEG_TXP9

R40

C_PEG_TXP10

T36

C_PEG_TXP11

V40

C_PEG_TXP12

W36

C_PEG_TXP13

Y40

C_PEG_TXP14

AA36

C_PEG_TXP15 PEG_TXP15

AB40

PEG_TXP[15:0] 18

PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15

PROJECT : ZC1

PROJECT : ZC1

Quanta Computer Inc.

Quanta Computer Inc.

R218 24.9/F_4R218 24.9/F_4

C743 EV@.1U-10V_4C743 EV@.1U-10V_4
C775 EV@.1U-10V_4C775 EV@.1U-10V_4
C745 EV@.1U-10V_4C745 EV@.1U-10V_4
C777 EV@.1U-10V_4C777 EV@.1U-10V_4
C747 EV@.1U-10V_4C747 EV@.1U-10V_4
C779 EV@.1U-10V_4C779 EV@.1U-10V_4
C749 EV@.1U-10V_4C749 EV@.1U-10V_4
C765 EV@.1U-10V_4C765 EV@.1U-10V_4
C751 EV@.1U-10V_4C751 EV@.1U-10V_4
C767 EV@.1U-10V_4C767 EV@.1U-10V_4
C753 EV@.1U-10V_4C753 EV@.1U-10V_4
C769 EV@.1U-10V_4C769 EV@.1U-10V_4
C755 EV@.1U-10V_4C755 EV@.1U-10V_4
C771 EV@.1U-10V_4C771 EV@.1U-10V_4
C757 EV@.1U-10V_4C757 EV@.1U-10V_4
C773 EV@.1U-10V_4C773 EV@.1U-10V_4

C742 EV@.1U-10V_4C742 EV@.1U-10V_4
C774 EV@.1U-10V_4C774 EV@.1U-10V_4
C744 EV@.1U-10V_4C744 EV@.1U-10V_4
C776 EV@.1U-10V_4C776 EV@.1U-10V_4
C746 EV@.1U-10V_4C746 EV@.1U-10V_4
C778 EV@.1U-10V_4C778 EV@.1U-10V_4
C748 EV@.1U-10V_4C748 EV@.1U-10V_4
C764 EV@.1U-10V_4C764 EV@.1U-10V_4
C750 EV@.1U-10V_4C750 EV@.1U-10V_4
C766 EV@.1U-10V_4C766 EV@.1U-10V_4
C752 EV@.1U-10V_4C752 EV@.1U-10V_4
C768 EV@.1U-10V_4C768 EV@.1U-10V_4
C754 EV@.1U-10V_4C754 EV@.1U-10V_4
C770 EV@.1U-10V_4C770 EV@.1U-10V_4
C756 EV@.1U-10V_4C756 EV@.1U-10V_4
C772 EV@.1U-10V_4C772 EV@.1U-10V_4

PEG_TXN[15:0] 18

1

+V1.5_PCIE

PEG_RXN[15:0] 18

PEG_RXP[15:0] 18

PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15

PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14

of

of

of

846Tuesday, December 06, 2005

846Tuesday, December 06, 2005

846Tuesday, December 06, 2005

1A

1A

1A

5

U44G

1500mA

C797

C797

+1.05V +1.05V

D D

C C

B B

A A

330U-2.5V_7343

330U-2.5V_7343

+

+

5

AA33

W33

P33
N33

AA32

Y32

W32

P32
N32

M32

AA31

W31

T31
R31
P31
N31

M31

AA30

Y30

W30

U30
T30
R30
P30
N30

M30

AA29

Y29

W29

U29
R29
P29

M29

AB28
AA28

Y28
U28

T28
R28
P28
N28

M28

P27
N27

M27

P26
N26

N25

M25

P24
N24

M24
AB23
AA23

Y23
P23
N23

M23
AC22

AB22

Y22

W22

P22
N22

M22
AC21

AA21

W21

N21

M21
AC20

AB20

Y20

W20

P20
N20

M20
AB19

AA19

Y19
N19

M19

N18

M18

P17
N17

M17

N16

M16

U44G

VCC_0
VCC_1
VCC_2
VCC_3

L33

VCC_4

J33

VCC_5
VCC_6
VCC_7
VCC_8

V32

VCC_9
VCC_10
VCC_11
VCC_12

L32

VCC_13

J32

VCC_14
VCC_15
VCC_16

V31

VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25

V30

VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32

L30

VCC_33
VCC_34
VCC_35
VCC_36

V29

VCC_37
VCC_38
VCC_39
VCC_40
VCC_41

L29

VCC_42
VCC_43
VCC_44
VCC_45

V28

VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52

L28

VCC_53
VCC_54
VCC_55
VCC_56

L27

VCC_57
VCC_58
VCC_59

L26

VCC_60
VCC_61
VCC_62

L25

VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72

L23

VCC_73
VCC_74
VCC_75
VCC_76
VCC_77
VCC_78
VCC_79
VCC_80

L22

VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_86

L21

VCC_87
VCC_88
VCC_89
VCC_90
VCC_91
VCC_92
VCC_93
VCC_94

L20

VCC_95
VCC_96
VCC_97
VCC_98
VCC_99
VCC_100

L19

VCC_101
VCC_102
VCC_103

L18

VCC_104
VCC_105
VCC_106
VCC_107
VCC_108
VCC_109

L16

VCC_110

VCC

VCC

Calistoga(945PM)

Calistoga(945PM)

VCC_SM_0
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8

VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
VCC_SM_37
VCC_SM_38
VCC_SM_39
VCC_SM_40
VCC_SM_41
VCC_SM_42
VCC_SM_43
VCC_SM_44
VCC_SM_45
VCC_SM_46
VCC_SM_47
VCC_SM_48
VCC_SM_49
VCC_SM_50
VCC_SM_51
VCC_SM_52
VCC_SM_53
VCC_SM_54
VCC_SM_55
VCC_SM_56
VCC_SM_57
VCC_SM_58
VCC_SM_59
VCC_SM_60
VCC_SM_61
VCC_SM_62
VCC_SM_63
VCC_SM_64
VCC_SM_65
VCC_SM_66
VCC_SM_67
VCC_SM_68
VCC_SM_69
VCC_SM_70
VCC_SM_71
VCC_SM_72
VCC_SM_73
VCC_SM_74
VCC_SM_75
VCC_SM_76
VCC_SM_77
VCC_SM_78
VCC_SM_79
VCC_SM_80
VCC_SM_81
VCC_SM_82
VCC_SM_83
VCC_SM_84
VCC_SM_85
VCC_SM_86
VCC_SM_87
VCC_SM_88
VCC_SM_89
VCC_SM_90
VCC_SM_91
VCC_SM_92
VCC_SM_93
VCC_SM_94
VCC_SM_95
VCC_SM_96
VCC_SM_97
VCC_SM_98
VCC_SM_99

VCC_SM_100
VCC_SM_101
VCC_SM_102
VCC_SM_103
VCC_SM_104
VCC_SM_105
VCC_SM_106
VCC_SM_107

4

4

AU41
AT41
AM41
AU40
BA34
AY34
AW34
AV34
AU34
AT34
AR34
BA30
AY30
AW30
AV30
AU30
AT30
AR30
AP30
AN30
AM30
AM29
AL29
AK29
AJ29
AH29
AJ28
AH28
AJ27
AH27
BA26
AY26
AW26
AV26
AU26
AT26
AR26
AJ26
AH26
AJ25
AH25
AJ24
AH24
BA23
AJ23
BA22
AY22
AW22
AV22
AU22
AT22
AR22
AP22
AK22
AJ22
AK21
AK20
BA19
AY19
AW19
AV19
AU19
AT19
AR19
AP19
AK19
AJ19
AJ18
AJ17
AH17
AJ16
AH16
BA15
AY15
AW15
AV15
AU15
AT15
AR15
AJ15
AJ14
AJ13
AH13
AK12
AJ12
AH12
AG12
AK11
BA8
AY8
AW8
AV8
AT8
AR8
AP8
BA6
AY6
AW6
AV6
AT6
AR6
AP6
AN6
AL6
AK6
AJ6
AV1
AJ1

VCC_SM1
VCC_SM2

VCC_SM106
VCC_SM107

25mils

25mils

C335 .47U-10V_6C335 .47U-10V_6
C336 .47U-10V_6C336 .47U-10V_6

DDR2 1.8 V, 667 MTs(2 Channel) 3200mA

+

+

C416

C416

C376

C376

C461

330U-2.5V_7343

330U-2.5V_7343

10U/X5R-6.3V_8

10U/X5R-6.3V_8

C377

C377
.47U-10V_6

.47U-10V_6

C478

C478
.47U-10V_6

.47U-10V_6

C461

10U/X5R-6.3V_8

10U/X5R-6.3V_8

C433

C433
.47U-10V_6

.47U-10V_6

25mils

C487 .47U-10V_6C487 .47U-10V_6
C793 .47U-10V_6C793 .47U-10V_6

330U-2.5V_7343

330U-2.5V_7343

+1.8VSUS

C432

C432
.47U-10V_6

.47U-10V_6

3

+

+

C796

C796

10U/X5R-6.3V_8

10U/X5R-6.3V_8

120mils

C477

C477
.1U-10V_4

.1U-10V_4

+1.5V_AUX10

3

C468

C468

C456

C456

10U/X5R-6.3V_8

10U/X5R-6.3V_8

C406

C406
.1U-10V_4

.1U-10V_4

+1.05V2,3,4,6,8,10,14,17,44

+1.8VSUS8,13,20,42,43

C480

C480

1U-16V_6

1U-16V_6

C465

C465
.1U-10V_4

.1U-10V_4

+1.5V_AUX

C408

C408

.1U-10V_4

.1U-10V_4

+1.05V

+1.8VSUS

C453

C453

.1U-10V_4

.1U-10V_4

C463

C463

.1U-10V_4

.1U-10V_4

2

U44F

U44F

AD27

VCC_NCTF0

AC27

VCC_NCTF1

AB27

VCC_NCTF2

AA27

VCC_NCTF3

Y27

VCC_NCTF4

W27

VCC_NCTF5

V27

VCC_NCTF6

U27

VCC_NCTF7

T27

VCC_NCTF8

R27

VCC_NCTF9

AD26

VCC_NCTF10

AC26

VCC_NCTF11

AB26

VCC_NCTF12

AA26

VCC_NCTF13

Y26

VCC_NCTF14

W26

VCC_NCTF15

V26

VCC_NCTF16

U26

VCC_NCTF17

T26

VCC_NCTF18

R26

VCC_NCTF19

AD25

VCC_NCTF20

AC25

VCC_NCTF21

AB25

VCC_NCTF22

AA25

VCC_NCTF23

Y25

VCC_NCTF24

W25

VCC_NCTF25

V25

VCC_NCTF26

U25

VCC_NCTF27

T25

VCC_NCTF28

R25

VCC_NCTF29

AD24

VCC_NCTF30

AC24

VCC_NCTF31

AB24

VCC_NCTF32

AA24

VCC_NCTF33

Y24

VCC_NCTF34

W24

VCC_NCTF35

V24

VCC_NCTF36

U24

VCC_NCTF37

T24

VCC_NCTF38

R24

VCC_NCTF39

AD23

VCC_NCTF40

V23

VCC_NCTF41

U23

VCC_NCTF42

T23

VCC_NCTF43

R23

VCC_NCTF44

AD22

VCC_NCTF45

V22

VCC_NCTF46

U22

VCC_NCTF47

T22

VCC_NCTF48

R22

VCC_NCTF49

AD21

VCC_NCTF50

V21

VCC_NCTF51

U21

VCC_NCTF52

T21

VCC_NCTF53

R21

VCC_NCTF54

AD20

VCC_NCTF55

V20

VCC_NCTF56

U20

VCC_NCTF57

T20

VCC_NCTF58

R20

VCC_NCTF59

AD19

VCC_NCTF60

V19

VCC_NCTF61

U19

VCC_NCTF62

T19

VCC_NCTF63

AD18

VCC_NCTF64

AC18

VCC_NCTF65

AB18

VCC_NCTF66

AA18

VCC_NCTF67

Y18

VCC_NCTF68

W18

VCC_NCTF69

V18

VCC_NCTF70

U18

VCC_NCTF71

T18

VCC_NCTF72

2

NCTF

NCTF

Calistoga(945PM)

Calistoga(945PM)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

GMCH PW & STRAP(4 OF 6)

GMCH PW & STRAP(4 OF 6)

GMCH PW & STRAP(4 OF 6)

Date: Sheet

Date: Sheet

Date: Sheet

VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8

VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12

VCCAUX_NCTF0
VCCAUX_NCTF1
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
VCCAUX_NCTF7
VCCAUX_NCTF8

VCCAUX_NCTF9
VCCAUX_NCTF10
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
VCCAUX_NCTF18
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
VCCAUX_NCTF35
VCCAUX_NCTF36
VCCAUX_NCTF37
VCCAUX_NCTF38
VCCAUX_NCTF39
VCCAUX_NCTF40
VCCAUX_NCTF41
VCCAUX_NCTF42
VCCAUX_NCTF43
VCCAUX_NCTF44
VCCAUX_NCTF45
VCCAUX_NCTF46
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
VCCAUX_NCTF52
VCCAUX_NCTF53
VCCAUX_NCTF54
VCCAUX_NCTF55
VCCAUX_NCTF56
VCCAUX_NCTF57

PROJECT : ZC1

PROJECT : ZC1

Quanta Computer Inc.

Quanta Computer Inc.

AE27
AE26
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AC17
Y17
U17

AG27
AF27
AG26
AF26
AG25
AF25
AG24
AF24
AG23
AF23
AG22
AF22
AG21
AF21
AG20
AF20
AG19
AF19
R19
AG18
AF18
R18
AG17
AF17
AE17
AD17
AB17
AA17
W17
V17
T17
R17
AG16
AF16
AE16
AD16
AC16
AB16
AA16
Y16
W16
V16
U16
T16
R16
AG15
AF15
AE15
AD15
AC15
AB15
AA15
Y15
W15
V15
U15
T15
R15

1

+1.5V_AUX

100mils

1A

1A

1A

of

of

of

946Friday, December 02, 2005

946Friday, December 02, 2005

946Friday, December 02, 2005

1

5

+1.5V +V1.5_DPLLA

L66

L66

10uH_8

10uH_8

12

+

C780

+

C780

C397

C397
.1U-10V_4

C334

C334

+

+

C490

C490
22U-6.3V_8

22U-6.3V_8

C491

C491
22U-6.3V_8

22U-6.3V_8

.1U-10V_4

+V1.5_DPLLB

C337

C337
.1U-10V_4

.1U-10V_4

+V1.5_HPLL

C486

C486
.1U-10V_4

.1U-10V_4

+V1.5_MPLL

C483

C483

A1A:Change to 22UF

.1U-10V_4

.1U-10V_4

A1A:Change to 470UF

A1A:Change to 470UF

A1A:Change to 22UF

470U-2.5V_7343

470U-2.5V_7343

L32

L32

10uH_8

L40

L40

L41

L41

10uH_8

12

470U-2.5V_7343

470U-2.5V_7343

BK1608LL121_6

BK1608LL121_6

BK1608LL121_6

BK1608LL121_6

D D

C C

When the LVDS interface is
not implemented, the
VCCTX_LVDS, VCCD_LVDS, and
VCCA_LVDS signals of the
interface can be connected
to ground

B1B:Change L30 to CVA9115MN10(91NH+-20% 1.5A),footprint L32x25-22

+V1.5_PCIE

91nH_L32x25-22

91nH_20%_1.3A

C308

C308

C307

C307

10U/X5R-6.3V_8

10U/X5R-6.3V_8

10U/X5R-6.3V_8

10U/X5R-6.3V_8

R552

R552

0.5/F_6

0.5/F_6

B B

+1.5V_AUX +1.5V

R282 0_8R282 0_8

C462

C462
.1U-10V_4

.1U-10V_4

91nH_L32x25-22

+

+

C314

C314
220U-6.3V_7343

220U-6.3V_7343

L65

L65
1uH_6

1uH_6

B1B:Remove R282 for +1.5V_AUX

30mils

V1_5SFOLLOW

R284

+V3.3_TVDAC

A A

R284
*10_4

*10_4

R283 *0_8R283 *0_8

60mils

L30

L30

PCIE_L

60mils60mils

3GPLL_FB_L3GPLL_FB_R

D7 *PDZ5.6BD7 *PDZ5.6B

21

+1.5V

R200

R200
0_8

0_8

+3V

R553

R553
0_8

0_8

+1.5V

+1.5V+V1.5_3GPLL

C1C:Remove +V3.3_TVDAC

+1.05V
+1.5V
+V1.5_PCIE
+2.5V
+3V

+1.05V 2,3,4,6,8,9,14,17,44
+1.5V 4,8,15,17,29,33,42,43
+V1.5_PCIE 8
+2.5V 8,19,20,42,43
+3V 2,5,8,13,14,15,16,17,18,19,20,24,25,26,27,29,30,31,32,33,34,35,36,37,38,39,40,41,42,44

5

4

A1A:Change to
ground(LVDS disable)

+V1.5_3GPLL

C367

C367

C758

C758

.1U-10V_4

.1U-10V_4

10U/X5R-6.3V_8

+1.05V

R739 0_6R739 0_6

B1B:CRT disable

+1.5V

80mils

R772 0_6R772 0_6

C1C:TV disable

+3V +1.5V

C417

C415

C415
10U/X5R-6.3V_8

10U/X5R-6.3V_8

+V1.5_TVDAC +1.5V

C417
.1U-10V_4

.1U-10V_4

C1C:TV disable

C430

C445

C445
.022U-16V_4

.022U-16V_4

+V1.5_QTVDAC

C439

C439
.022U-16V_4

.022U-16V_4

4

C430
.1U-10V_4

.1U-10V_4

C444

C444
.1U-10V_4

.1U-10V_4

10U/X5R-6.3V_8

C436

C436

C440

C440

.022U-16V_4

.022U-16V_4

.1U-10V_4

.1U-10V_4

A1A:Change to
ground(LVDS disable)

+V3.3_ATVBG

C434

C434

C790

C790

.1U-10V_4

.1U-10V_4

.022U-16V_4

.022U-16V_4

A1A:Change to
ground(LVDS disable)

C485

C485

.1U-10V_4

.1U-10V_4

C489

C489

10U/X5R-6.3V_8

10U/X5R-6.3V_8

60mils

+2.5V

+V1.5_HPLL

+V1.5_TVDAC

+V1.5_QTVDAC

+1.5V_AUX

R241

R241

3

+2.5V

C356

C356

C379

C379

10U/X5R-6.3V_8

10U/X5R-6.3V_8

.1U-10V_4

.1U-10V_4

+V1.5_PCIE

C411

C411
.1U-10V_4

.1U-10V_4

+V1.5_DPLLB

R740 0_6R740 0_6

+1.5V

B1B:TV disable

+1.5V

+3V

1900mA

0_8

0_8

3

1500mA

+V1.5_DPLLA

+V1.5_MPLL

H22

C30

B30
A30

AJ41

AB41

Y41

V41

R41

N41
L41

AC33

G41

H41
F21

E21

G21

B26
C39
AF1

A38

B39
AF2

H20
G20

E19

F19
C20
D20

E20

F20
AH1

AH2

A28

B28
C28

D21

A23

B23

B25

H19

AK31
AF31
AE31
AC31
AL30
AK30

AJ30

AH30

AG30

AF30

AE30
AD30
AC30
AG29

AF29

AE29
AD29
AC29
AG28

AF28

AE28

AH22

AJ21

AH21

AJ20
AH20
AH19

P19
P16

AH15

P15

AH14

AG14

AF14
AE14

Y14
AF13
AE13
AF12
AE12

AD12

U44H

U44H

VCCSYNC
VCC_TXLVDS0

VCC_TXLVDS1
VCC_TXLVDS2

VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
VCCA_3GPLL
VCCA_3GBG
VSSA_3GBG

VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC

VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL

VCCA_LVDS
VSSA_LVDS

VCCA_MPLL
VCCA_TVBG

VSSA_TVBG

VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1

VCCD_HMPLL0
VCCD_HMPLL1

VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2

VCCD_TVDAC
VCC_HV0

VCC_HV1
VCC_HV2

VCCD_QTVDAC
VCCAUX0

VCCAUX1
VCCAUX2
VCCAUX3
VCCAUX4
VCCAUX5
VCCAUX6
VCCAUX7
VCCAUX8
VCCAUX9
VCCAUX10
VCCAUX11
VCCAUX12
VCCAUX13
VCCAUX14
VCCAUX15
VCCAUX16
VCCAUX17
VCCAUX18
VCCAUX19
VCCAUX20
VCCAUX21
VCCAUX22
VCCAUX23
VCCAUX24
VCCAUX25
VCCAUX26
VCCAUX27
VCCAUX28
VCCAUX29
VCCAUX30
VCCAUX31
VCCAUX32
VCCAUX33
VCCAUX34
VCCAUX35
VCCAUX36
VCCAUX37
VCCAUX38
VCCAUX39
VCCAUX40

POWER

POWER

Calistoga(945PM)

Calistoga(945PM)

2

2

VTT_0
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8

VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
VTT_26
VTT_27
VTT_28
VTT_29
VTT_30
VTT_31
VTT_32
VTT_33
VTT_34
VTT_35
VTT_36
VTT_37
VTT_38
VTT_39
VTT_40
VTT_41
VTT_42
VTT_43
VTT_44
VTT_45
VTT_46
VTT_47
VTT_48
VTT_49
VTT_50
VTT_51
VTT_52
VTT_53
VTT_54
VTT_55
VTT_56
VTT_57
VTT_58
VTT_59
VTT_60
VTT_61
VTT_62
VTT_63
VTT_64
VTT_65
VTT_66
VTT_67
VTT_68
VTT_69
VTT_70
VTT_71
VTT_72
VTT_73
VTT_74
VTT_75
VTT_76

1

+1.05V

800mA

AC14
AB14
W14
V14
T14
R14
P14
N14
M14
L14
AD13
AC13
AB13
AA13
Y13
W13
V13
U13
T13
R13
N13
M13
L13
AB12
AA12
Y12
W12
V12
U12
T12
R12
P12
N12
M12
L12
R11
P11
N11
M11
R10
P10
N10
M10
P9
N9
M9
R8
P8
N8
M8
P7
N7
M7
R6
P6
M6
A6
R5
P5
N5
M5
P4
N4
M4
R3
P3
N3
M3
R2
P2
M2
D2
AB1
R1
P1
N1
M1

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

+

C795

+

C795

330U-2.5V_7343

330U-2.5V_7343

GMCH POWER (5 OF 6)

GMCH POWER (5 OF 6)

GMCH POWER (5 OF 6)

4.7U-10V_8

4.7U-10V_8

C470

C470

.22U-6.3V_4

.22U-6.3V_4

PROJECT : ZC1

PROJECT : ZC1

Quanta Computer Inc.

Quanta Computer Inc.

C404

C404

2.2U-6.3V_6

2.2U-6.3V_6

.22U-6.3V_4

.22U-6.3V_4

C435

C435

.1U-10V_4

.1U-10V_4

C391

C391

.1U-10V_4

.1U-10V_4

.47U-10V_6

.47U-10V_6

C382

C382

4.7U-10V_8

4.7U-10V_8

1

+2.5V

C455

C455

C374

C374

.47U-10V_6

.47U-10V_6

C357

C357

10 46Friday, December 02, 2005

10 46Friday, December 02, 2005

10 46Friday, December 02, 2005

+1.05V

C365

C365

10U/X5R-6.3V_8

10U/X5R-6.3V_8

+1.05V

C414

C414

of

of

of

1A

1A

1A

5

U44I

U44I

AC41

VSS_0

AA41

VSS_1

W41

VSS_2

T41

VSS_3

P41

VSS_4

M41

VSS_5

J41

VSS_6

F41

VSS_7

AV40

VSS_8

D D

C C

B B

A A

5

AP40
AN40
AK40
AJ40
AH40

AG40

AF40
AE40

B40

AY39

AW39

AV39
AR39
AN39
AJ39
AC39
AB39
AA39

Y39

W39

V39

T39
R39
P39
N39

M39

L39

J39
H39

G39

F39
D39

AT38

AM38

AH38

AG38

AF38
AE38

C38

AK37
AH37
AB37
AA37

Y37

W37

V37

T37
R37
P37
N37

M37

L37

J37
H37

G37

F37
D37

AY36

AW36

AN36
AH36

AG36

AF36
AE36
AC36

C36
B36

BA35
AV35
AR35
AH35
AB35
AA35

Y35

W35

V35

T35
R35
P35
N35

M35

L35

J35
H35

G35

F35
D35

AN34

VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96

Calistoga(945PM)

Calistoga(945PM)

VSS

VSS

4

VSS_97
VSS_98

VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179

4

AK34
AG34
AF34
AE34
AC34
C34
AW33
AV33
AR33
AE33
AB33
Y33
V33
T33
R33
M33
H33
G33
F33
D33
B33
AH32
AG32
AF32
AE32
AC32
AB32
G32
B32
AY31
AV31
AN31
AJ31
AG31
AB31
Y31
AB30
E30
AT29
AN29
AB29
T29
N29
K29
G29
E29
C29
B29
A29
BA28
AW28
AU28
AP28
AM28
AD28
AC28
W28
J28
E28
AP27
AM27
AK27
J27
G27
F27
C27
B27
AN26
M26
K26
F26
D26
AK25
P25
K25
H25
E25
D25
A25
BA24
AU24
AL24
AW23

3

U44J

U44J

AT23

VSS_180

AN23

VSS_181

AM23

VSS_182

AH23

VSS_183

AC23

VSS_184

W23

VSS_185

K23

VSS_186

J23

VSS_187

F23

VSS_188

C23

VSS_189

AA22

VSS_190

K22

VSS_191

G22

VSS_192

F22

VSS_193

E22

VSS_194

D22

VSS_195

A22

VSS_196

BA21

VSS_197

AV21

VSS_198

AR21

VSS_199

AN21

VSS_200

AL21

VSS_201

AB21

VSS_202

Y21

VSS_203

P21

VSS_204

K21

VSS_205

J21

VSS_206

H21

VSS_207

C21

VSS_208

AW20

VSS_209

AR20

VSS_210

AM20

VSS_211

AA20

VSS_212

K20

VSS_213

B20

VSS_214

A20

VSS_215

AN19

VSS_216

AC19

VSS_217

W19

VSS_218

K19

VSS_219

G19

VSS_220

C19

VSS_221

AH18

VSS_222

P18

VSS_223

H18

VSS_224

D18

VSS_225

A18

VSS_226

AY17

VSS_227

AR17

VSS_228

AP17

VSS_229

AM17

VSS_230

AK17

VSS_231

AV16

VSS_232

AN16

VSS_233

AL16

VSS_234

J16

VSS_235

F16

VSS_236

C16

VSS_237

AN15

VSS_238

AM15

VSS_239

AK15

VSS_240

N15

VSS_241

M15

VSS_242

L15

VSS_243

B15

VSS_244

A15

VSS_245

BA14

VSS_246

AT14

VSS_247

AK14

VSS_248

AD14

VSS_249

AA14

VSS_250

U14

VSS_251

K14

VSS_252

H14

VSS_253

E14

VSS_254

AV13

VSS_255

AR13

VSS_256

AN13

VSS_257

AM13

VSS_258

AL13

VSS_259

AG13

VSS_260

P13

VSS_261

F13

VSS_262

D13

VSS_263

B13

VSS_264

AY12

VSS_265

AC12

VSS_266

K12

VSS_267

H12

VSS_268

E12

VSS_269

AD11

VSS_270

AA11

VSS_271

Y11

VSS_272

3

VSS

VSS

Calistoga(945PM)

Calistoga(945PM)

VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
VSS_359
VSS_360

J11
D11
B11
AV10
AP10
AL10
AJ10
AG10
AC10
W10
U10
BA9
AW9
AR9
AH9
AB9
Y9
R9
G9
E9
A9
AG8
AD8
AA8
U8
K8
C8
BA7
AV7
AP7
AL7
AJ7
AH7
AF7
AC7
R7
G7
D7
AG6
AD6
AB6
Y6
U6
N6
K6
H6
B6
AV5
AF5
AD5
AY4
AR4
AP4
AL4
AJ4
Y4
U4
R4
J4
F4
C4
AY3
AW3
AV3
AL3
AH3
AG3
AF3
AD3
AC3
AA3
G3
AT2
AR2
AP2
AK2
AJ2
AD2
AB2
Y2
U2
T2
N2
J2
H2
F2
C2
AL1

2

PROJECT : ZC1

PROJECT : ZC1

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

GMCH GND(6 OF 6)

GMCH GND(6 OF 6)

GMCH GND(6 OF 6)

Date: Sheet

Date: Sheet

2

Date: Sheet

1

1A

1A

of

of

of

11 46Friday, December 02, 2005

11 46Friday, December 02, 2005

11 46Friday, December 02, 2005

1

1A

1

2

3

4

5

6

7

8

DDRII DUAL CHANNEL A,B.

A A

DDRII A CHANNEL DDRII B CHANNEL

SMDDR_VTERM

C343
.1U-10V_4

.1U-10V_4

C446
.1U-10V_4

.1U-10V_4

SMDDR_VTERM

C344

C346

C346

.1U-10V_4

.1U-10V_4

.1U-10V_4

.1U-10V_4

M_A_A[13..0]
SMDDR_VTERM

C387

C387

C429

.1U-10V_4

.1U-10V_4

.1U-10V_4

.1U-10V_4

C418

C418
.1U-10V_4

.1U-10V_4

M_A_A[13..0] 7,13
SMDDR_VTERM 42,43

C393

C393

C403

C403

.1U-10V_4

.1U-10V_4

.1U-10V_4

.1U-10V_4

C348
.1U-10V_4

.1U-10V_4

C354

C354
.1U-10V_4

.1U-10V_4

C441

C441
.1U-10V_4

.1U-10V_4

C431

C431
.1U-10V_4

.1U-10V_4

SMDDR_VTERM

C317

C317
.1U-10V_4

.1U-10V_4

C457

C457
.1U-10V_4

.1U-10V_4C344

C347

C347
.1U-10V_4

.1U-10V_4C343

C437

C437
.1U-10V_4

.1U-10V_4

C413

C413
.1U-10V_4

.1U-10V_4C429

C381

C381
.1U-10V_4

.1U-10V_4

C315

C315
.1U-10V_4

.1U-10V_4C348

C447

C447
.1U-10V_4

.1U-10V_4

C342

C342
.1U-10V_4

.1U-10V_4

C438

C438
.1U-10V_4

.1U-10V_4

C454

C454
.1U-10V_4

.1U-10V_4

C452

C452
.1U-10V_4

.1U-10V_4C446

C316

C316
.1U-10V_4

.1U-10V_4

Layout note: Place one cap close to every 2 pullup resistors terminated to SMDDR_VTERM

B B

M_ODT08,13

M_CKE18,13

M_A_BS#07,13

M_A_BS#17,13

C C

M_A_WE#7,13

M_A_CAS#7,13

A1A:Swap net A1A:Swap net

M_A_A13
M_ODT0
M_A_A8

M_A_A5
M_A_A3
M_A_A1

M_CKE1

M_A_A6
M_A_A10
M_A_BS#0

M_A_A7
M_A_A11
M_A_A4
M_A_A0

M_A_BS#1
M_A_A2

M_A_A12
M_A_A9

M_A_WE#
M_A_CAS#

RP33 56_4P2R_SRP33 56_4P2R_S

1
3

RP19 56_4P2R_SRP19 56_4P2R_S

1
3

RP25 56_4P2R_SRP25 56_4P2R_S

1
3

RP11 56_4P2R_SRP11 56_4P2R_S

1
3

RP26 56_4P2R_SRP26 56_4P2R_S

1
3

RP17 56_4P2R_SRP17 56_4P2R_S

1
3

RP21 56_4P2R_SRP21 56_4P2R_S

1
3

RP24 56_4P2R_SRP24 56_4P2R_S

1
3

RP15 56_4P2R_SRP15 56_4P2R_S

1
3

RP29 56_4P2R_SRP29 56_4P2R_S

1
3

2
4
2
4
2
4

2
4
2
4
2
4
2
4

2
4
2
4
2
4

SMDDR_VTERM

SMDDR_VTERM

SMDDR_VTERM

M_B_BS#17,13

M_CKE28,13

M_B_BS#27,13

M_CS#28,13

M_B_RAS#7,13

M_B_WE#7,13

M_B_CAS#7,13

M_B_BS#07,13

M_B_BS#1
M_B_A2
M_B_A1
M_B_A3
M_B_A9

M_B_A5

M_B_A0

M_B_A4

M_B_A12
M_B_A8
M_B_A7

M_B_A6
M_CKE2
M_B_BS#2

M_CS#2

M_B_RAS#
M_B_WE#
M_B_CAS#
M_B_A10
M_B_BS#0

A1A:Swap net

M_CS#08,13

M_B_A[13..0]
+1.8VSUS
+3V

M_B_A[13..0] 7,13
+1.8VSUS 8,9,13,20,42,43
+3V 2,5,8,10,13,14,15,16,17,18,19,20,24,25,26,27,29,30,31,32,33,34,35,36,37,38,39,40,41,42,44

M_A_RAS#7,13

M_ODT28,13

M_ODT38,13

M_CS#38,13

M_CS#18,13

M_ODT18,13

M_CKE38,13
M_CKE08,13

M_A_BS#27,13

RP23 56_4P2R_SRP23 56_4P2R_S

1
3

RP22 56_4P2R_SRP22 56_4P2R_S

1
3

RP18 56_4P2R_SRP18 56_4P2R_S

1
3

RP20 56_4P2R_SRP20 56_4P2R_S

1
3

RP14 56_4P2R_SRP14 56_4P2R_S

1
3

RP16 56_4P2R_SRP16 56_4P2R_S

1
3

RP12 56_4P2R_SRP12 56_4P2R_S

1
3

RP27 56_4P2R_SRP27 56_4P2R_S

1
3

RP32 56_4P2R_SRP32 56_4P2R_S

1
3

RP28 56_4P2R_SRP28 56_4P2R_S

1
3

M_CS#0
M_A_RAS#
M_B_A13
M_ODT2

M_ODT3

M_CS#3
M_CS#1

M_ODT1

M_CKE3
M_B_A11
M_CKE0
M_A_BS#2

2
4
2
4
2
4

2
4
2
4
2
4
2
4

2
4
2
4
2
4

RP30 56_4P2R_SRP30 56_4P2R_S

1
3

RP31 56_4P2R_SRP31 56_4P2R_S

1
3

RP35 56_4P2R_SRP35 56_4P2R_S

1
3

RP34 56_4P2R_SRP34 56_4P2R_S

1
3

RP10 56_4P2R_SRP10 56_4P2R_S

1
3

RP13 56_4P2R_SRP13 56_4P2R_S

1
3

SMDDR_VTERM

SMDDR_VTERM

SMDDR_VTERM

2
4
2
4
2
4
2
4
2
4
2
4

SMDDR_VTERM

D D

1

2

3

4

5

6

PROJECT : ZC1

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

DDR RES. ARRAY

DDR RES. ARRAY

DDR RES. ARRAY

Date: Sheet

Date: Sheet

Date: Sheet

PROJECT : ZC1

Quanta Computer Inc.

Quanta Computer Inc.

7

of

of

of

12 46Monday, November 28, 2005

12 46Monday, November 28, 2005

12 46Monday, November 28, 2005

8

1A

1A

1A

1

+3V
+1.8VSUS SMDDR_VREF_DIMM

A A

B B

C C

D D

+3V 2,5,8,10,14,15,16,17,18,19,20,24,25,26,27,29,30,31,32,33,34,35,36,37,38,39,40,41,42,44
+1.8VSUS 8,9,20,42,43

M_CKE08,12

M_A_BS#27,12

M_A_BS#07,12

M_A_WE#7,12

M_A_CAS#7,12

M_CS#18,12
M_ODT18,12

+3V

M_A_DQ1
M_A_DQ5

M_A_DQS#0
M_A_DQS0

M_A_DQ2
M_A_DQ3

M_A_DQ14

M_A_DQ8 M_A_DM1
M_A_DQS#1

M_A_DQS1
M_A_DQ9

M_A_DQ15

M_A_DQ21

M_A_DQ17
M_A_DQS#2

M_A_DQS2
M_A_DQ23

M_A_DQ19
M_A_DQ24

M_A_DQ25
M_A_DM3

M_A_DQ30
M_A_DQ31

M_CKE0

M_A_BS#2
M_A_A12

M_A_A9
M_A_A8

M_A_A5
M_A_A3
M_A_A1

M_A_A10
M_A_WE#
M_A_CAS#

M_CS#1
M_ODT1

M_A_DQ37

M_A_DQS#4
M_A_DQS4

M_A_DQ38
M_A_DQ39

M_A_DQ41
M_A_DQ40

M_A_DM5
M_A_DQ42

M_A_DQ43
M_A_DQ53

M_A_DQ52

M_A_DQS#6
M_A_DQS6

M_A_DQ51

M_A_DQ61
M_A_DQ57

M_A_DM7

M_A_DQ63

CGDAT_SMB
CGCLK_SMB

SMDDR_VREF_DIMM

+1.8VSUS

11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97

99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

1
3
5
7
9

CLOCK 0,1 CLOCK 3,4

1

2

A1A:Swap net

CN31

CN31

VREF
VSS47
DQ0
DQ1
VSS37
DQS#0
DQS0
VSS48
DQ2
DQ3
VSS38
DQ8
DQ9
VSS49
DQS#1
DQS1
VSS39
DQ10
DQ11
VSS50

VSS18
DQ16
DQ17
VSS1
DQS#2
DQS2
VSS19
DQ18
DQ19
VSS22
DQ24
DQ25
VSS23
DM3
NC4
VSS9
DQ26
DQ27
VSS4
CKE0
VDD7
NC1
A16_BA2
VDD9
A12
A9
A8
VDD5
A5
A3
A1
VDD10
A10/AP
BA0
WE#
VDD2
CAS#
S1#
VDD3
ODT1
VSS11
DQ32
DQ33
VSS26
DQS#4
DQS4
VSS2
DQ34
DQ35
VSS27
DQ40
DQ41
VSS29
DM5
VSS51
DQ42
DQ43
VSS40
DQ48
DQ49
VSS52
NCTEST
VSS30
DQS#6
DQS6
VSS31
DQ50
DQ51
VSS33
DQ56
DQ57
VSS3
DM7
VSS34
DQ58
DQ59
VSS14
SDA
SCL
VDD(SPD)

DDR2_SODIMM(1-1734074-1)

DDR2_SODIMM(1-1734074-1)

VSS46

DQ4
DQ5

VSS15

DM0

VSS5

DQ6
DQ7

VSS16

DQ12
DQ13

VSS17

DM1

VSS53

CK0

CK0#

VSS41

DQ14
DQ15

VSS54
VSS20

DQ20
DQ21
VSS6

NC3
DM2

VSS21

DQ22
DQ23

VSS24

DQ28
DQ29

VSS25

DQS#3

DQS3

VSS10

DQ30
DQ31
VSS8

CKE1

PC4800 DDR2 SDRAM

SO-DIMM (200P)

PC4800 DDR2 SDRAM

SO-DIMM (200P)

VDD8

A15
A14

VDD11

A11

A7
A6

VDD4

A4
A2
A0

VDD12

BA1

RAS#

S0#
VDD1
ODT0

A13
VDD6

NC2

VSS12

DQ36
DQ37

VSS28

DM4

VSS42

DQ38
DQ39

VSS55

DQ44
DQ45

VSS43

DQS#5

DQS5

VSS56

DQ46
DQ47

VSS44

DQ52
DQ53

VSS57

CK1

CK1#

VSS45

DM6

VSS32

DQ54
DQ55

VSS35

DQ60
DQ61
VSS7

DQS#7

DQS7

VSS36

DQ62
DQ63

VSS13

SA0
SA1

H 5.2 H 9.2

2

3

+1.8VSUS +1.8VSUS +1.8VSUS

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

A1A:Change DDRII footprint to same as CT6

M_A_DQ4
M_A_DQ0

M_A_DM0
M_A_DQ7

M_A_DQ6
M_A_DQ13

M_A_DQ12

M_CLK_DDR0
M_CLK_DDR#0

M_A_DQ11
M_A_DQ10

M_A_DQ20
M_A_DQ16

PM_EXTTS#0
M_A_DM2

M_A_DQ18
M_A_DQ22

M_A_DQ28
M_A_DQ29

M_A_DQS#3
M_A_DQS3

M_A_DQ27
M_A_DQ26

M_CKE1

M_A_A11
M_A_A7
M_A_A6

M_A_A4
M_A_A2
M_A_A0

M_A_BS#1
M_A_RAS#
M_CS#0

M_ODT0
M_A_A13

M_A_DQ36
M_A_DQ32M_A_DQ35

M_A_DM4
M_A_DQ33

M_A_DQ34

M_A_DQ45
M_A_DQ44

M_A_DQS#5
M_A_DQS5

M_A_DQ46

M_A_DQ47

M_A_DQ49
M_A_DQ48

M_CLK_DDR1 M_CLK_DDR#2
M_CLK_DDR#1

M_A_DM6

M_A_DQ55
M_A_DQ54M_A_DQ50

M_A_DQ56
M_A_DQ60

M_A_DQS#7
M_A_DQS7

M_A_DQ58M_A_DQ59
M_A_DQ62

R285 10K_4R285 10K_4
R287 10K_4R287 10K_4

M_A_DM[0..7] 7
M_A_DQS[0..7] 7

M_A_DQS#[0..7] 7
M_A_A[0..13] 7,12

M_CLK_DDR0 8

M_CLK_DDR#0 8

PM_EXTTS#0 8

M_CKE1 8,12

M_A_BS#1 7,12
M_A_RAS# 7,12
M_CS#0 8,12

M_ODT0 8,12

M_CLK_DDR1 8 M_CLK_DDR#2 8
M_CLK_DDR#1 8

CGDAT_SMB2
CGCLK_SMB2

2nd source:DGMK00000C0 2nd source:DGMK0002610

3

4

SMDDR_VREF_DIMM

5

A1A:Swap net

CN30

CN30

1

VREF

3

M_B_DQ1

M_B_DQ5
M_B_DQS#0

M_B_DQS0

M_B_DQ2

M_B_DQ3

M_B_DQ8
M_B_DQ9 M_B_DM1

M_B_DQS#1
M_B_DQS1

M_B_DQ11
M_B_DQ10

M_B_DQ17
M_B_DQ20

M_B_DQS#2
M_B_DQS2

M_B_DQ19
M_B_DQ23

M_B_DQ28
M_B_DQ29

M_B_DM3

M_B_DQ30
M_B_DQ31

+3V

M_CKE2

M_B_BS#2
M_B_A12

M_B_A9
M_B_A8

M_B_A5
M_B_A3
M_B_A1

M_B_A10
M_B_BS#0
M_B_WE#

M_B_CAS#
M_CS#3

M_ODT3
M_B_DQ37

M_B_DQ36

M_B_DQS#4
M_B_DQS4

M_B_DQ39
M_B_DQ35

M_B_DQ41
M_B_DQ40

M_B_DM5

M_B_DQ47
M_B_DQ42

M_B_DQS#6
M_B_DQS6

M_B_DQ55
M_B_DQ61

M_B_DQ57
M_B_DM7

M_B_DQ63
M_B_DQ58

CGDAT_SMB
CGCLK_SMB

M_CKE28,12 M_CKE3 8,12

M_B_BS#27,12

M_B_BS#07,12

M_B_WE#7,12

M_B_CAS#7,12

M_CS#38,12

M_ODT38,12

VSS47

5

DQ0

7

DQ1

9

VSS37

11

DQS#0

13

DQS0

15

VSS48

17

DQ2

19

DQ3

21

VSS38

23

DQ8

25

DQ9

27

VSS49

29

DQS#1

31

DQS1

33

VSS39

35

DQ10

37

DQ11

39

VSS50

41

VSS18

43

DQ16

45

DQ17

47

VSS1

49

DQS#2

51

DQS2

53

VSS19

55

DQ18

57

DQ19

59

VSS22

61

DQ24

63

DQ25

65

VSS23

67

DM3

69

NC4

71

VSS9

73

DQ26

75

DQ27

77

VSS4

79

CKE0

81

VDD7

83

NC1

85

A16_BA2

87

VDD9

89

A12

91

A9

93

A8

95

VDD5

97

A5

99

A3

101

A1

103

VDD10

105

A10/AP

107

BA0

109

WE#

111

VDD2

113

CAS#

115

S1#

117

VDD3

119

ODT1

121

VSS11

123

DQ32

125

DQ33

127

VSS26

129

DQS#4

131

DQS4

133

VSS2

135

DQ34

137

DQ35

139

VSS27

141

DQ40

143

DQ41

145

VSS29

147

DM5

149

VSS51

151

DQ42

153

DQ43

155

VSS40

157

DQ48

159

DQ49

161

VSS52

163

NCTEST

165

VSS30

167

DQS#6

169

DQS6

171

VSS31

173

DQ50

175

DQ51

177

VSS33

179

DQ56

181

DQ57

183

VSS3

185

DM7

187

VSS34

189

DQ58

191

DQ59

193

VSS14

195

SDA

197

SCL

199

VDD(SPD)

DDR2_SODIMM(2-1734073-2)

DDR2_SODIMM(2-1734073-2)

CKE 2,3CKE 0,1

4

5

VSS46

DQ4
DQ5

VSS15

DM0

VSS5

DQ6
DQ7

VSS16

DQ12
DQ13

VSS17

DM1

VSS53

CK0

CK0#

VSS41

DQ14
DQ15

VSS54
VSS20

DQ20
DQ21
VSS6

NC3
DM2

VSS21

DQ22
DQ23

VSS24

DQ28
DQ29

VSS25

DQS#3

DQS3

VSS10

DQ30
DQ31

VSS8
CKE1
VDD8

A15
A14

VDD11

PC4800 DDR2 SDRAM

SO-DIMM (200P)

PC4800 DDR2 SDRAM

SO-DIMM (200P)

A11

A7
A6

VDD4

A4
A2
A0

VDD12

BA1

RAS#

S0#
VDD1
ODT0

A13
VDD6

NC2

VSS12

DQ36
DQ37

VSS28

DM4

VSS42

DQ38
DQ39

VSS55

DQ44
DQ45

VSS43

DQS#5

DQS5

VSS56

DQ46
DQ47

VSS44

DQ52
DQ53

VSS57

CK1

CK1#

VSS45

DM6

VSS32

DQ54
DQ55

VSS35

DQ60
DQ61
VSS7

DQS#7

DQS7

VSS36

DQ62
DQ63

VSS13

SA0
SA1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

M_B_DQ4

M_B_DQ0

M_B_DM0

M_B_DQ7

M_B_DQ6
M_B_DQ12

M_B_DQ13

M_CLK_DDR3
M_CLK_DDR#3

M_B_DQ15
M_B_DQ14

A1A:Change SODIMM1 pin 50 from PM_EXTTS#1
to PM_EXTTS#0(Intel recommend)

M_B_DQ16
M_B_DQ21

PM_EXTTS#0
M_B_DM2

M_B_DQ18
M_B_DQ22

M_B_DQ24
M_B_DQ25

M_B_DQS#3
M_B_DQS3

M_B_DQ26
M_B_DQ27

M_CKE3

M_B_A11
M_B_A7
M_B_A6

M_B_A4
M_B_A2
M_B_A0

M_B_BS#1
M_B_RAS#
M_CS#2

M_ODT2
M_B_A13

M_B_DQ32

M_B_DQ33

M_B_DM4
M_B_DQ34

M_B_DQ38
M_B_DQ44

M_B_DQ45
M_B_DQS#5

M_B_DQS5

M_B_DQ46
M_B_DQ43

M_B_DQ52M_B_DQ53
M_B_DQ48M_B_DQ49

M_CLK_DDR2

M_B_DM6

M_B_DQ54M_B_DQ50
M_B_DQ51

M_B_DQ60
M_B_DQ56

M_B_DQS#7
M_B_DQS7

M_B_DQ59
M_B_DQ62

R286 10K_4R286 10K_4
R288 10K_4R288 10K_4

+3V

SMbus address A4SMbus address A0

6

M_CLK_DDR3 8
M_CLK_DDR#3 8

M_B_BS#1 7,12
M_B_RAS# 7,12

M_CS#2 8,12

M_ODT2 8,12

M_CLK_DDR2 8

6

M_B_DM[0..7] 7M_A_DQ[0..63] 7
M_B_DQ[0..63] 7
M_B_DQS[0..7] 7
M_B_DQS#[0..7] 7
M_B_A[0..13] 7,12

PM_EXTTS#0 8

R162

R162

7

+1.8VSUS

Place these Caps near So-Dimm1.

C451

C352

C352

2.2U-6.3V_6

2.2U-6.3V_6

C424

C424
.1U-10V_4

.1U-10V_4

C250

C250

2.2U-6.3V_6

2.2U-6.3V_6

C451

2.2U-6.3V_6

2.2U-6.3V_6

C358

C358
.1U-10V_4

.1U-10V_4

+3V

C355

C355

2.2U-6.3V_6

2.2U-6.3V_6

+1.8VSUS

Place these Caps near So-Dimm1.

C396

C396
.1U-10V_4

.1U-10V_4

SMDDR_VREF_DIMM

C267

C267
.1U-10V_4

.1U-10V_4

C425

C425

C405

C405

2.2U-6.3V_6

2.2U-6.3V_6

C395

C395
.1U-10V_4

.1U-10V_4

C493

C493

2.2U-6.3V_6

2.2U-6.3V_6

8

2.2U-6.3V_6

2.2U-6.3V_6

C495

C495
.1U-10V_4

.1U-10V_4

Place these Caps near So-Dimm1.
No Vias Between the Trace of PIN to
CAP.

+1.8VSUS

Place these Caps near So-Dimm2.

C353

C353

C351

C351

C426

C426

C345

C345

C366

C366

2.2U-6.3V_6

2.2U-6.3V_6

2.2U-6.3V_6

+1.8VSUS

SMDDR_VREF_DIMM

2.2U-6.3V_6

2.2U-6.3V_6

2.2U-6.3V_6

2.2U-6.3V_6

2.2U-6.3V_6

2.2U-6.3V_6

C407

C407
.1U-10V_4

.1U-10V_4

C272

C272

2.2U-6.3V_6

2.2U-6.3V_6

2.2U-6.3V_6

C383

C383
.1U-10V_4

.1U-10V_4

+3V

C492

C492

2.2U-6.3V_6

2.2U-6.3V_6

C394

C394
.1U-10V_4

.1U-10V_4

C494

C494
.1U-10V_4

.1U-10V_4

Place these Caps near So-Dimm1.

C384

C384
.1U-10V_4

.1U-10V_4

C264

C264
.1U-10V_4

.1U-10V_4

Place these Caps near So-Dimm2.
No Vias Between the Trace of PIN to
CAP.

SMDDR_VREF

SMDDR_VREF_DIMM

*10K/F_4

*10K/F_4

R160 *10K/F_4R160 *10K/F_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

DDRII SO-DIMM(200P)

DDRII SO-DIMM(200P)

DDRII SO-DIMM(200P)

Date: Sheet

Date: Sheet

Date: Sheet

7

R170 0_4R170 0_4

+1.8VSUS

PROJECT : ZC1

PROJECT : ZC1

Quanta Computer Inc.

Quanta Computer Inc.

SMDDR_VREF 8,43

13 46Wednesday, November 30, 2005

13 46Wednesday, November 30, 2005

13 46Wednesday, November 30, 2005

8

1A

1A

1A

of

of

of

5

CH500H-40

CH500H-40

D10

D10

CH500H-40

CH500H-40

CN32

CN32

1
2

R333

R333

CKL:1n ~ 20nF

R309

R309

8.2K_4

8.2K_4

INTVRMEN

1

0

5

VCCRTC

R321

R321

1M/F_4

1M/F_4

R314

R314

4.7K_4

4.7K_4

VCCRTC

R340

R340

VCCRTC_4

VCCRTC_2VCCRTC_1

1K_4

1K_4

SATA_RXN034
SATA_RXP034
SATA_TXN034
SATA_TXP034

SATA_RXN235
SATA_RXP235
SATA_TXN235
SATA_TXP235

VCCRTC

C533

C533

1U-16V_6

1U-16V_6

20K_4

20K_4

CLK_PCIE_SATA#2
CLK_PCIE_SATA2

PIORDY

IRQ14

R334

R334
332K/F_6

332K/F_6

ICH_INTVRMEN

R332

R332
*0_4

*0_4

C543

C543

1U-16V_6

1U-16V_6

Q21

Q21

MMBT3904

MMBT3904

2

SATA_LED#40

C507 3900P_4C507 3900P_4
C506 3900P_4C506 3900P_4
C502 3900P_4C502 3900P_4
C503 3900P_4C503 3900P_4

C505 3900P_4C505 3900P_4
C504 3900P_4C504 3900P_4
C500 3900P_4C500 3900P_4
C501 3900P_4C501 3900P_4

25mils/15mils

Internal PU

13

R308 24.9/F_4R308 24.9/F_4

Place within 500
mils of ICH7

RTC

D9

+3VPCU

D D

A1A:Change RTC
Connector footprint

+5VPCU

R341

R341

R343

R343

4.7K_4

4.7K_4

R342

R342
15K_4

15K_4

C C

B B

A A

D9

VCCRTC_3

R320

R320
1K_4

1K_4

1
2

RTC CONN

RTC CONN

20MIL 20MIL

1.2K_6

1.2K_6

+3V

ICH7 internal VR
enable strap

Enable
(default)

Disable

4

CKL:C1/C2: 18pF -> CL:12.5pF
C1/C: 10pF -> CL Value = 8.5pF

A1A:Change RTXC1/RTXC2 from 10pf to 18pf

C516

C516
18P-50V_4

18P-50V_4

Y3

Y3

32.768KHZ

32.768KHZ

C508

C508
18P-50V_4

18P-50V_4

Internal PU

ACZ_SDIN036
ACZ_SDIN136

PDIOR#35
PDIOW#35

PDDACK#35

IRQ1435
PIORDY35
PDDREQ35

RTCRST#
SM_INTRUDER#

ICH_INTVRMEN

T157T157

SATA_LED#

4

CLK_32KX1

R313

R313
10M_6

10M_6

2 1

CLK_32KX2

ACZ_BCLK
ACZ_SYNC

ACZ_RST#
ACZ_SDIN0

ACZ_SDIN1
ACZ_SDIN2

ACZ_SDOUT

SATA_RXN0_C
SATA_RXP0_C
SATA_TXN0_C
SATA_TXP0_C

SATA_RXN2_C
SATA_RXP2_C
SATA_TXN2_C
SATA_TXP2_C

SATA_BIAS

IRQ14

PIORDY

AF18

AG2

AG6

AH10

AG10

AF15

AH15

AF16
AH16
AG16
AE15

AB1
AB2

AA3

AF3
AE3

AH2
AF7

AE7
AH6
AF1

AE1

Y5

W4
W1

Y1
Y2

W3

V3
U3
U5

V4
T5

U7
V6
V7

U1
R6

R5
T2

T3
T1

T4

U48A

U48A

RTXC1
RTCX2

RTCRST#
INTRUDER#

INTVRMEN
EE_CS

EE_SHCLK
EE_DOUT
EE_DIN

LAN_CLK
LAN_RSTSYNC
LAN_RXD0

LAN_RXD1
LAN_RXD2

LAN_TXD0
LAN_TXD1
LAN_TXD2

ACZ_BIT_CLK
ACZ_SYNC

ACZ_RST#
ACZ_SDIN0

ACZ_SDIN1
ACZ_SDIN2

ACZ_SDOUT
SATALED#
SATA0RXN

SATA0RXP
SATA0TXN
SATA0TXP

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

SATA_CLKN
SATA_CLKP

SATARBIASN
SATARBIASP

DIOR#
DIOW#
DDACK#
IDEIRQ
IORDY
DDREQ

ICH7-M DH

ICH7-M DH

LPCCPU

LPCCPU

RTCLAN

RTCLAN

AC-97/AZALIA

AC-97/AZALIA

SATA

SATA

IDE

IDE

3

LAD0
LAD1
LAD2
LAD3

LDRQ0#

LDRQ1#/GPIO23

LFRAME#
A20GATE

A20M#

CPUSLP#

TP1/DPRSTP#

TP2/DPSLP#

FERR#

GPIO49/CPUPWRGD

IGNNE#

INIT3_3V#

INIT#
INTR

RCIN#

NMI

SMI#

STPCLK#

THERMTRIP#

DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8

DD9
DD10
DD11
DD12
DD13
DD14
DD15

DA0
DA1
DA2

DCS1#
DCS3#

3

AA6
AB5
AC4
Y6

AC3
AA5

AB3
AE22

AH28
AG27
AF24

AH25
AG26
AG24

AG22
AG21
AF22
AF25

AG23
AH24

AF23
AH22
AF26

AB15
AE14
AG13
AF13
AD14
AC13
AD12
AC12
AE12
AF12
AB13
AC14
AF14
AH13
AH14
AC15

AH17
AE17
AF17

AE16
AD16

LDRQ#0
LDRQ#1

GATEA20

TP_H_CPUSLP#
H_DPRSTP#_R

H_DPSLP#_R

T154T154

RCIN#

H_SMI#_R

H_THERMTRIP_R

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

PDA0
PDA1
PDA2

LAD0 38,39
LAD1 38,39
LAD2 38,39
LAD3 38,39

LDRQ#0 38

T72T72

LFRAME# 38,39
GATEA20 39

H_A20M# 3

R307 *0_4R307 *0_4
R305 0_4R305 0_4

R584 0_4R584 0_4

R312 0_4R312 0_4

R304 0_4R304 0_4

2

RCIN#

+1.05V

R585

R585
*56.2/F_4

*56.2/F_4

PDD[15:0] 35

H_CPUSLP# 3,6

H_PWRGD 3

H_IGNNE# 3
H_INIT# 3

H_INTR 3
RCIN# 39
H_NMI 3

H_SMI# 3
H_STPCLK# 3

Should be 2" close ICH7

A series termination resistor is
required for the PRIMARY CODEC

ACZ_SDOUT

ACZ_SYNC

ACZ_BCLK

ACZ_BCLK

B1B:Per Intel comment,don't stuff R307 for CPUSLP#

PDA[2:0] 35

PDCS1# 35
PDCS3# 35

GATEA20

R292

R292

*56.2/F_4

*56.2/F_4

ICH_DPRSTP# 3
H_DPSLP# 3

R306 24.9/F_4R306 24.9/F_4

R349 39_4R349 39_4

R350 39_4R350 39_4

R605 39_4R605 39_4

R719 39_4R719 39_4

B1B:Add R719 for BIT_CLK_MODEM

ACZ_RST#

2

R348 39_4R348 39_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

ICH7-M HOST (1 OF 4)

ICH7-M HOST (1 OF 4)

ICH7-M HOST (1 OF 4)

Date: Sheet

Date: Sheet

Date: Sheet

1

+3V

+3V

R299

R299

R300

R300

10K_4

10K_4

10K_4

10K_4

+1.05V

R311

R311

56.2/F_4

56.2/F_4

H_FERR# 3

+1.05V

R293

R293

56.2/F_4

56.2/F_4

PM_THRMTRIP# 3,8

ACZ_SDOUT_AUDIO 36

C559

C559
*10P_4

*10P_4

ACZ_SYNC_AUDIO 36

C565

C565
*10P_4

*10P_4

BIT_CLK_AUDIO 36

C816

C816
*10P_4

*10P_4

BIT_CLK_MODEM 36

C957

C957
*10P_4

*10P_4

ACZ_RST#_AUDIO 36

PROJECT : ZC1

PROJECT : ZC1

Quanta Computer Inc.

Quanta Computer Inc.

of

of

of

14 46Friday, December 02, 2005

14 46Friday, December 02, 2005

14 46Friday, December 02, 2005

1

1A

1A

1A

5

A1A:Change PCIE pin define to meet Acer spec

New card

GLAN

D D

MINI CARD(WLAN)

EZ4_1

EZ4_2

C C

T158T158
T75T75
T160T160
T76T76

T159T159

R355

R355
*10K_4

*10K_4

PCIE_RXN033
PCIE_RXP033
PCIE_TXN033
PCIE_TXP033

PCIE_RXN127
PCIE_RXP127
PCIE_TXN127
PCIE_TXP127

T78T78
T77T77
T163T163
T162T162

PCIE_RXN329
PCIE_RXP329
PCIE_TXN329
PCIE_TXP329

PCIE_RXN432
PCIE_RXP432
PCIE_TXN432
PCIE_TXP432

PCIE_RXN532
PCIE_RXP532
PCIE_TXN532
PCIE_TXP532

+3V

R352

R352

R616

R616

*10K_4

*10K_4

*10K_4

*10K_4

SPI_SCLK
SPI_CE#
NVM_ARB
SPI_SI
SPI_SO

4

C851 .1U-10V_4C851 .1U-10V_4

C856 .1U-10V_4C856 .1U-10V_4

C841 .1U-10V_4C841 .1U-10V_4

C846 .1U-10V_4C846 .1U-10V_4

C836 .1U-10V_4C836 .1U-10V_4

C832 .1U-10V_4C832 .1U-10V_4

C831 .1U-10V_4C831 .1U-10V_4
C827 .1U-10V_4C827 .1U-10V_4

C823 .1U-10V_4C823 .1U-10V_4

C822 .1U-10V_4C822 .1U-10V_4

C821 .1U-10V_4C821 .1U-10V_4

C820 .1U-10V_4C820 .1U-10V_4

PCIE_TXN0_C
PCIE_TXP0_C

PCIE_TXN1_C
PCIE_TXP1_C

PCIE_RXN2
PCIE_RXP2
PCIE_TXN2_C
PCIE_TXP2_C

PCIE_TXN3_C
PCIE_TXP3_C

PCIE_TXN4_C
PCIE_TXP4_C

PCIE_TXN5_C
PCIE_TXP5_C

SPI_SCLK
SPI_CE#
NVM_ARB

SPI_SI
SPI_SO

USBOC#0
USBOC#1
USBOC#2
USBOC#3
USBOC#4
USBOC#5
USBOC#6
USBOC#7

M26
M25

G28
G27

K26
K25

P26
P25
N28
N27

T25
T24
R28
R27

F26
F25
E28
E27

H26
H25

J28
J27

L28
L27

R2
P6
P1

P5
P2

D3
C4
D5
D4
E5
C3
A2
B3

U48D

U48D

PERn1
PERp1
PETn1
PETp1

PERn2
PERp2
PETn2
PETp2

PERn3
PERp3
PETn3
PETp3

PERn4
PERp4
PETn4
PETp4

PERn5
PERp5
PETn5
PETp5

PERn6
PERp6
PETn6
PETp6

SPI_CLK
SPI_CS#
SPI_ARB

SPI_MOSI
SPI_MISO

OC0#
OC1#
OC2#
OC3#
OC4#
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31

ICH7-M DH

ICH7-M DH

3

V26

DMI0RXN

V25

DMI0RXP

U28

DMI0TXN

U27

DMI0TXP

Y26

DMI1RXN

Y25

DMI1RXP

W28

DMI1TXN

W27

DMI1TXP

AB26

DMI2RXN

AB25

DMI2RXP

AA28

DMI2TXN

AA27

DMI2TXP

AD25

DMI3RXN

AD24

DMI3RXP

AC28

DMI3TXN

AC27

DMI3TXP

PCI-Express

PCI-Express

Direct Media Interface

Direct Media Interface

DMI_ZCOMP

DMI_IRCOMP

SPI

SPI

USB

USB

DMI_CLKN
DMI_CLKP

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P

USBRBIAS#

USBRBIAS

AE28
AE27

C25
D25

F1
F2
G4
G3
H1
H2
J4
J3
K1
K2
L4
L5
M1
M2
N4
N3

D2

USB_RBIAS_PN

D1

Place within 500
mils of ICH7

DMI_RXN0 8
DMI_RXP0 8
DMI_TXN0 8
DMI_TXP0 8

DMI_RXN1 8
DMI_RXP1 8
DMI_TXN1 8
DMI_TXP1 8

DMI_RXN2 8
DMI_RXP2 8
DMI_TXN2 8
DMI_TXP2 8

DMI_RXN3 8
DMI_RXP3 8
DMI_TXN3 8
DMI_TXP3 8

CLK_PCIE_ICH# 2
CLK_PCIE_ICH 2

DRI_IRCOMP_R

USBP0- 29
USBP0+ 29
USBP1- 29
USBP1+ 29
USBP2- 29
USBP2+ 29
USBP3- 29
USBP3+ 29
USBP4- 31
USBP4+ 31
USBP5- 33
USBP5+ 33
USBP6- 29
USBP6+ 29
USBP7- 25
USBP7+ 25

25mils/15mils

R381

R381

22.6/F_6

22.6/F_6

+1.5V

15/15mils

MB USB PORT(RIGHT)
MB USB PORT(RIGHT)
MB USB PORT(REAR)
MB USB PORT(REAR)

6 in 1 card reader
NEW CARD
Bluetooth Module
Camera module

2

R375

R375

24.9/F_4

24.9/F_4

Place within 500
mils of ICH7

REQ2#

FRAME#
REQ1#

+3V

LOCK#
SERR#
PERR#
DEVSEL#

+3V

INTF#
REQ5#
REQ0#
IRDY# INTC#

+3V

INTB#
USBOC#1

USBOC#6

+3V_S5

D2B:Change to +3V_S5

RP41

RP41

6
7
8
9

10

8.2K_10P8R

8.2K_10P8R

RP38

RP38

6
7
8
9

10

8.2K_10P8R

8.2K_10P8R

RP40

RP40

6
7
8
9

10

8.2K_10P8R

8.2K_10P8R

RP39

RP39

6
7
8
9

10

8.2K_10P8R

8.2K_10P8R

CKL use 10Kohm

1

+3V

5

INTG#

4

REQ3#STOP#

3

REQ4#

2

TRDY#

1

+3V

5
4

INTH#

3
2

INTE#

1

+3V

5

USBOC#4

4

INTD#

3
2

USBOC#2

1

+3V_S5

5

USBOC#0

4

USBOC#3

3

USBOC#5INTA#

2

USBOC#7

1

ICH7 Boot BIOS select

U48B

AD[0..31]29,30

B B

A A

5

T153T153
T69T69
T67T67
T152T152
T70T70

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

INTA#
INTB#
INTC#
INTD#

TP_ICH_RSVD1
TP_ICH_RSVD2
TP_ICH_RSVD3
TP_ICH_RSVD4
TP_ICH_RSVD5

U48B

E18

AD0

C18

AD1

A16

AD2

F18

AD3

E16

AD4

A18

AD5

E17

AD6

A17

AD7

A15

AD8

C14

AD9

E14

AD10

D14

AD11

B12

AD12

C13

AD13

G15

AD14

G13

AD15

E12

AD16

C11

AD17

D11

AD18

A11

AD19

A10

AD20

F11

AD21

F10

AD22

E9

AD23

D9

AD24

B9

AD25

A8

AD26

A6

AD27

C7

AD28

B6

AD29

E6

AD30

D6

AD31

Interrupt I/F

Interrupt I/F

A3

PIRQA#

B4

PIRQB#

C5

PIRQC#

B5

PIRQD#

AE5

RSVD[1]

AD5

RSVD[2]

AG4

RSVD[3]

AH4

RSVD[4]

AD9

RSVD[5]

ICH7-M DH

ICH7-M DH

PCI

PCI

MISC

MISC

REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#

GNT3#
REQ4#/GPIO22
GNT4#/GPIO48

GPIO1/REQ5#

GPIO17/GNT5#

C/BE0#
C/BE1#
C/BE2#
C/BE3#

IRDY#

PAR

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR#
STOP#
TRDY#

FRAME#

PLTRST#

PCICLK

PME#

GPIO2/PIRQE#
GPIO3/PIRQF#

GPIO4/PIRQG#

GPIO5/PIRQH#

RSVD[6]
RSVD[7]
RSVD[8]
RSVD[9]

MCH_SYNC#

4

D7
E7
C16
D16
C17
D17
E13
F13
A13
A14
C8
D8

B15
C12
D12
C15

A7
E10
B18
A12
C9
E11
B10
F15
F14
F16

C26
A9
B19

G8
F7
F8
G7

AE9
AG8
AH8
F21
AH20

REQ0#
GNT0#
REQ1#
GNT1#
REQ2#

REQ3#
REQ4#
REQ5#

IRDY#

DEVSEL#
PERR#
LOCK#
SERR#
STOP#
TRDY#
FRAME#

PLT_RST-R#
PCLK_ICH

INTE#
INTF#
INTG#
INTH#

TP_ICH_RSVD6
TP_ICH_RSVD7
TP_ICH_RSVD8

RSVD9

CBE0# 29,30
CBE1# 29,30
CBE2# 29,30
CBE3# 29,30

INTE# 30

T81T81
T68T68

T156T156
T155T155

R365

R365
*1K/F_4

*1K/F_4

REQ0# 30
GNT0# 30

T166T166

GNT2# 29

C877

C877

R661

*10P_4

*10P_4

U17

U17

2
1

TC7SH08FU

TC7SH08FU

R661

*22_4

*22_4

PLT_RST-R# 8

+3V

3 5

PCLK_ICH

C587

C587

.1U-10V_4

.1U-10V_4

4

R379

R379

A1A:Reserve 100k

100K_4

100K_4

pull low to GND

IRDY# 29,30
PAR 30
PCIRST# 29,30
DEVSEL# 29,30
PERR# 30

SERR# 30
STOP# 30
TRDY# 29,30
FRAME# 29,30

PCLK_ICH 2
PCI_PME# 30

MCH_ICH_SYNC 8 PLTRST# 16,18,27,29,32,33,38,39

PLT_RST-R#

Don't connect to PCI device / Express card

3

2

LPC
(default)

PCI UNSTUFF10 STUFF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

ICH7-M PCI E (2 OF 4)

ICH7-M PCI E (2 OF 4)

ICH7-M PCI E (2 OF 4)

Date: Sheet

Date: Sheet

Date: Sheet

STRAP GNT5#

R1

UNSTUFF11 UNSTUFF

01 STUFFSPI UNSTUFF

REQ# / GNT#PCI DEVICE InterruptsIDSEL#

AD25

REQ0# / GNT0# INTE#OZ711MP1

PROJECT : ZC1

PROJECT : ZC1

Quanta Computer Inc.

Quanta Computer Inc.

1

GNT4#
R2

15 46Friday, December 09, 2005

15 46Friday, December 09, 2005

15 46Friday, December 09, 2005

1A

1A

1A

of

of

of