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QUANTA
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Z8V
Schematics
44 pgs1.73 Mb0

QUANTA Z8V Schematics

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RJ45
BOM
P23
D D
Cardreader
C C
CONN. 2in 1
P28
I/O board
B B
Z8V Serials SKL ULT SYSTEM BLOCK DIAGRAM
DDR4-SODIMM CHA
DDR4-SODIMM CHB
SATA - HDD
SATA ODD
RTS5170 (cardreader)
POA
CCD(Camera)
Touch Screen
Blue Tooth
I/O Board Conn.USB2 IO*1
P28
P25
P21
P21
P26
P28
P12
P13
P25
P25
Dual Channel DDR IV 1066/1333/1600 MHZ
SATA0
SATA1
USB2-3
USB2-3
USB2-7
USB2-6
USB2-5
USB2-4
P6
BATTERY
Azalia
SKY LAKE ULT 15W
MCP 1356pins
IMC
DC+GT3e
42 mm X 24 mm
SATA
Integrated PCH
USB2.0
DMIC_CLK0 DMIC_DATA0
RTC IHDA
P2~P10
LPC
PCI-E x4 TX/RX
CLK
eDP
USB3.0/2.0
CLK
PCI-E x1
CLK I2C_0
SPI
DP
PCIE1-4
EDP
DDI2
DDI1
USB3-1 & USB3-2
USB2-1 & USB2-2
X'TAL
32.768KHz
X'TAL 24MHz
SPI ROM 8M
GPU
N16S-GT
P14~P18
RTD2166-CG
P20
PTN3366BS
P22
P7
X'TAL 27MHz
PCIE-6
PCIE-5
VRAM
GDDR5
eDP Conn.
VGA Conn.
HDMI Conn.
P21
P21
P22
USB3 Port MB side CN13 -> USB3 port 2 ( up ) CN16 -> USB3 port 1 ( down )
MINI CARD WLAN+BT
RTL8111H
10/100/1G
P19
P26
P23
X'TAL 25MHz
IV@ : iGPU EV@ : Optimus KBL@ : Keyboard backlight TPM@ : TPM GS@ :G-SENSOR TDI@ : TOUCH PAD I2C TSU@ : TOUCH SCREEN USB TSI@ : TOUCH SCREEN I2C GT3@ : GT3 CPU NAC@ : Non IOAC IOAC@ : For IOAC
P28
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D-MIC
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Int. D-MIC
P24
Universal HP
A A
ALC255
AUDIO CODEC
P24 P24
P24
Speaker*2
LED
P27
K/B Con.
P27
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EC
K/B BL Con.
IT8987
P27
Touch PAD
P27
HALL SENSOR
P17
P29
Fan Driver
(Fan signal)
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3
TPM(option)
P27
BQ24780RUYR
P25
Batery Charger
RT6575AGQ
+3V/+5V
RT8237CZQW
+1V_S5
NB681GD-Z
+VCCOPC/+VCCEOPIO
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G5316RZ1D
+1.2VSUS
P30
MDV1528Q
+5V_S5/+3V_S5/+3V/+5V
P31
ISL95859HRTZ-T
+VCORE/VCCSA/VCCGT
P32
P33
Thermal Protection
P34
UP1658RQKF
+VGPU_CORE
P31
RT8068AZQW
P35
+1.05V_GFX/+3V_GFX +1.5V_GFX
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
P7
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Block Diagram
Block Diagram
Block Diagram
1
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P38
P39
P40
ZRW
ZRW
ZRW
1 46Monday, February 22, 2016
1 46Monday, February 22, 2016
1 46Monday, February 22, 2016
1A
1A
1A
5
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Skylake ULT (DISPLAY,eDP)
3
2
1
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
AT16
AU16
D63 A54 C65 C63 A65
C55 D55 B54 C56
A6
A7 BA5 AY5
H66 H65
SKL_ULT
DDI
DISPLAY SIDEBANDS
+3V_S5 +3V_S5
+3V_S5 +3V_S5
+3V_S5 +3V_S5
U34D
CATERR# PECI PROCHOT# THERMTRIP# SKTOCC#
CPU MISC
BPM#[0] BPM#[1] BPM#[2] BPM#[3]
GPP_E3/CPU_GP0 GPP_E7/CPU_GP1 GPP_B3/CPU_GP2 GPP_B4/CPU_GP3
PROC_POPIRCOMP PCH_OPIRCOMP OPCE_RCOMP OPC_RCOMP
SKL_ULT/BGA
1 OF 20
SKL_ULT
+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5 +3V_S5 +3V_S5
EDP
4 OF 20
EDP_TXN[0] EDP_TXP[0] EDP_TXN[1] EDP_TXP[1] EDP_TXN[2] EDP_TXP[2] EDP_TXN[3] EDP_TXP[3]
EDP_AUXN
EDP_AUXP
EDP_DISP_UTIL
DDI1_AUXN DDI1_AUXP DDI2_AUXN DDI2_AUXP DDI3_AUXN DDI3_AUXP
GPP_E13/DDPB_HPD0 GPP_E14/DDPC_HPD1 GPP_E15/DDPD_HPD2 GPP_E16/DDPE_HPD3
GPP_E17/EDP_HPD
EDP_BKLTEN
EDP_BKLTCTL
EDP_VDDEN
JTAG
PROC_TCK
PROC_TDI PROC_TDO PROC_TMS
PROC_TRST#
PCH_JTAG_TCK
PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TMS
PCH_TRST#
JTAGX
C47
EDP_TXN0
C46
EDP_TXP0
D46
EDP_TXN1
C45
EDP_TXP1
A45
EDP_TXN2
B45
EDP_TXP2
A47
EDP_TXN3
B47
EDP_TXP3
E45
EDP_AUXN
F45
EDP_AUXP
B52 G50
F50 E48
CRT_AUX#_C
F48
CRT_AUX_C
G46 F46
L9
INT_HDMI_HPD
L7
CRT_HPD
L6
SIO_EXT_SMI#
N9
SIO_EXT_SCI#
L10
EDP_HPD
R12
PCH_BLON
R11
PCH_BRIGHT
U13
EDP_VDD_EN
B61
XDP_TCK0
D60
XDP_TDI_CPU
A61
XDP_TDO_CPU
C60
XDP_TMS_CPU
B59
XDP_TRST#
B56
XDP_TCK1
D59
XDP_TDI_CPU
A56
XDP_TDO_CPU
C59
XDP_TMS_CPU
C61 A59
XDP_TRST#
XDP_TCK0
If use Intel DCI USB 3.0 fixture need to short
1. XDP_TDO <--> XDP_TDO_CPU
2. XDP_TDI <--> XDP_TDI_CPU
3. XDP_TMS <--> XDP_TMS_CPU
EDP_TXN0 (20) EDP_TXP0 (20) EDP_TXN1 (20) EDP_TXP1 (20) EDP_TXN2 (20) EDP_TXP2 (20) EDP_TXN3 (20) EDP_TXP3 (20)
EDP_AUXN (20) EDP_AUXP (20)
R432 *0_4 R444 *0_4
C569 *short_4 C568 *short_4
PCH_BRIGHTDP_UTIL
PCH_BLON (20) PCH_BRIGHT (20)
EDP_VDD_EN (20)
CRT_AUXN (19) CRT_AUXP (19)
INT_HDMI_HPD (21) CRT_HPD (19)
TP14
SIO_EXT_SCI# (28) EDP_HPD (20)
eDP Panel
Reserve 2 Lane for 4K x 2K
PCH JTAG
JTAG_TCK,JTAG_TMS Trace Length < 9000mils
TCK,TMS Trace Length < 9000mils
H_PWRGOOD (50ohm) Trace Length: 1~11.25 inches
Don't stuff if we use DP to VGA IC
CRT_AUXN CRT_AUXP
CRT_DATA CRT_CLK
12/25 Change R1 34R135 pull-up to +3V_S5
SIO_EXT_SMI# SIO_EXT_SCI#
CRT_HPD EDP_HPD
R424 *100K_4 R423 *100K_4
R135 2.2K_4 R134 *2.2K_4
R115 10K_4 R123 10K_4
R82 100K_4 R84 100K_4
+3V
+3V_S5
+3V
100k pull-down on PCH side
MP remove(Intel)
XDP_TDO_CPU XDP_TMS_CPU XDP_TDI_CPU
XDP_TCK0 XDP_TCK1 XDP_TRST#
,XDP_TCK1,XDP_TMS don't need pull up or pull down
R448 51_4 R408 *51_4 R409 *51_4
R447 51_4 R425 *51_4 R446 *51_4
+1V_VCCST
D D
HDMICRT
+VCCIO
C C
+1V_VCCST
CPU_THRMTRIP#
R4001K_4
CATERR#
Stuff only for Debug Ramp will not stuff
+VCCIO
R441 1K_4
B B
R40749.9/F_4
H_PROCHOT#
H_PROCHOT#(28,29,34)
Avoid 125Mhz
BPM#[0:7] Trace Length 1~6 inches Length match < 300 mils
H_PECI (50ohm) Route on microstrip only Spacing >18 mils Trace Length: 0.4~6.125 iches
SM_RCOMP[0:2] Trace length < 500 mils Trace width = 12~15 mils Trace spacing = 20 mils
INT_HDMITX2N(21) INT_HDMITX2P(21) INT_HDMITX1N(21) INT_HDMITX1P(21) INT_HDMITX0N(21) INT_HDMITX0P(21)
INT_HDMICLK-(21) INT_HDMICLK+(21)
CRT_TXN0(19) CRT_TXP0(19) CRT_TXN1(19)
ITE FAE suggest CAP should be at PCH side.
HDMI_DDCCLK_SW(21)
HDMI_DDCDATA_SW(21)
CRT_TXP1(19)
PCH_ODD_EN(24)
eDP_RCOMP Trace length < 100 mils Trace width = 20 mils Trace spacing = 25 mils
H_PECI(28)
THRMTRIP#
DGPU_PW_CTRL#(4)
HDMI_DDCCLK_SW HDMI_DDCDATA_SW
CRT_CLK CRT_DATA
EDP_RCOMP
R8724.9/F_4
TP53
R442 499/F_4 R395 100/F_4
TP54 TP52 TP59 TP56
U34A
E55
DDI1_TXN[0]
F55
DDI1_TXP[0]
E58
DDI1_TXN[1]
F58
DDI1_TXP[1]
F53
DDI1_TXN[2]
G53
DDI1_TXP[2]
F56
DDI1_TXN[3]
G56
DDI1_TXP[3]
C50
DDI2_TXN[0]
D50
DDI2_TXP[0]
C52
DDI2_TXN[1]
D52
DDI2_TXP[1]
A50
DDI2_TXN[2]
B50
DDI2_TXP[2]
D51
DDI2_TXN[3]
C51
DDI2_TXP[3]
L13
GPP_E18/DDPB_CTRLCLK
L12
GPP_E19/DDPB_CTRLDATA
N7
GPP_E20/DDPC_CTRLCLK
N8
GPP_E21/DDPC_CTRLDATA
N11
GPP_E22/DDPD_CTRLCLK
N12
GPP_E23/DDPD_CTRLDATA
E52
EDP_RCOMP
SKL_ULT/BGA
CATERR# H_PECI H_PROCHOT#_RH_PROCHOT# CPU_THRMTRIP#
XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3
DGPU_PW_CTRL#
R590 49.9/F_4 R595 49.9/F_4 R100 49.9/F_4 R96 49.9/F_4
XDP_TCK0 R558 Stuff
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Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Monday, February 22, 2016
Monday, February 22, 2016
Monday, February 22, 2016
Date: Sheet of
Date: Sheet of
PROJECT :
Skylake 1/4 (DDI/eDP)
Skylake 1/4 (DDI/eDP)
Skylake 1/4 (DDI/eDP)
ZRW
ZRW
ZRW
of
2 46
2 46
2 46
1
1A
1A
1A
+1V_VCCST
+1V_VCCST
2
R414 *1K_4
1 3
Q33 MMBT3904-7-F
3
Q34 FDV301N_G
1
R454 1K_4
2
SYS_SHDN# (28,30,37)
3
CPU thermal trip
+1V_VCCST
U27
NC1VCC
A A
IMVP_PWRGD(34)
2
A
GND3Y
*74AUP1G07GW
5
R401 *0_4
5
C537
*0.1u/16V_4
4
+3V
12
R402 10K_4
IMVP_PWRGD_3V (8)
IMVP_PWRGD_3V
THRMTRIP#
4
5
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Change Data and DQS to interleave.
D D
M_A_DQ[63:0](11) M_B_DQ[63:0](12)
C C
B B
A A
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8
M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
U34B
AL71
DDR0_DQ[0]
AL68
DDR0_DQ[1]
AN68
DDR0_DQ[2]
AN69
DDR0_DQ[3]
AL70
DDR0_DQ[4]
AL69
DDR0_DQ[5]
AN70
DDR0_DQ[6]
AN71
DDR0_DQ[7]
AR70
DDR0_DQ[8]
AR68
DDR0_DQ[9]
AU71
DDR0_DQ[10]
AU68
DDR0_DQ[11]
AR71
DDR0_DQ[12]
AR69
DDR0_DQ[13]
AU70
DDR0_DQ[14]
AU69
DDR0_DQ[15]
BB65
DDR0_DQ[16]/DDR0_DQ[32]
AW65
DDR0_DQ[17]/DDR0_DQ[33]
AW63
DDR0_DQ[18]/DDR0_DQ[34]
AY63
DDR0_DQ[19]/DDR0_DQ[35]
BA65
DDR0_DQ[20]/DDR0_DQ[36]
AY65
DDR0_DQ[21]/DDR0_DQ[37]
BA63
DDR0_DQ[22]/DDR0_DQ[38]
BB63
DDR0_DQ[23]/DDR0_DQ[39]
BA61
DDR0_DQ[24]/DDR0_DQ[40]
AW61
DDR0_DQ[25]/DDR0_DQ[41]
BB59
DDR0_DQ[26]/DDR0_DQ[42]
AW59
DDR0_DQ[27]/DDR0_DQ[43]
BB61
DDR0_DQ[28]/DDR0_DQ[44]
AY61
DDR0_DQ[29]/DDR0_DQ[45]
BA59
DDR0_DQ[30]/DDR0_DQ[46]
AY59
DDR0_DQ[31]/DDR0_DQ[47]
AY39
DDR0_DQ[32]/DDR1_DQ[0]
AW39
DDR0_DQ[33]/DDR1_DQ[1]
AY37
DDR0_DQ[34]/DDR1_DQ[2]
AW37
DDR0_DQ[35]/DDR1_DQ[3]
BB39
DDR0_DQ[36]/DDR1_DQ[4]
BA39
DDR0_DQ[37]/DDR1_DQ[5]
BA37
DDR0_DQ[38]/DDR1_DQ[6]
BB37
DDR0_DQ[39]/DDR1_DQ[7]
AY35
DDR0_DQ[40]/DDR1_DQ[8]
AW35
DDR0_DQ[41]/DDR1_DQ[9]
AY33
DDR0_DQ[42]/DDR1_DQ[10]
AW33
DDR0_DQ[43]/DDR1_DQ[11]
BB35
DDR0_DQ[44]/DDR1_DQ[12]
BA35
DDR0_DQ[45]/DDR1_DQ[13]
BA33
DDR0_DQ[46]/DDR1_DQ[14]
BB33
DDR0_DQ[47]/DDR1_DQ[15]
AY31
DDR0_DQ[48]/DDR1_DQ[32]
AW31
DDR0_DQ[49]/DDR1_DQ[33]
AY29
DDR0_DQ[50]/DDR1_DQ[34]
AW29
DDR0_DQ[51]/DDR1_DQ[35]
BB31
DDR0_DQ[52]/DDR1_DQ[36]
BA31
DDR0_DQ[53]/DDR1_DQ[37]
BA29
DDR0_DQ[54]/DDR1_DQ[38]
BB29
DDR0_DQ[55]/DDR1_DQ[39]
AY27
DDR0_DQ[56]/DDR1_DQ[40]
AW27
DDR0_DQ[57]/DDR1_DQ[41]
AY25
DDR0_DQ[58]/DDR1_DQ[42]
AW25
DDR0_DQ[59]/DDR1_DQ[43]
BB27
DDR0_DQ[60]/DDR1_DQ[44]
BA27
DDR0_DQ[61]/DDR1_DQ[45]
BA25
DDR0_DQ[62]/DDR1_DQ[46]
BB25
DDR0_DQ[63]/DDR1_DQ[47]
SKL_ULT/BGA
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5
SKL_ULT
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR CH - A
2 OF 20
M_A_A[13:0] M_A_DQS#[7:0] M_A_DQS[7:0]
M_A_A[13:0] (11) M_A_DQS#[7:0] (11) M_A_DQS[7:0] (11)
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4
DDR0_CKN[0] DDR0_CKP[0] DDR0_CKN[1] DDR0_CKP[1]
DDR0_CKE[0] DDR0_CKE[1] DDR0_CKE[2] DDR0_CKE[3]
DDR0_CS#[0] DDR0_CS#[1] DDR0_ODT[0] DDR0_ODT[1]
DDR0_MA[3] DDR0_MA[4]
DDR0_DQSN[0] DDR0_DQSP[0] DDR0_DQSN[1]
DDR0_DQSP[1] DDR0_DQSN[2]/DDR0_DQSN[4] DDR0_DQSP[2]/DDR0_DQSP[4] DDR0_DQSN[3]/DDR0_DQSN[5] DDR0_DQSP[3]/DDR0_DQSP[5] DDR0_DQSN[4]/DDR1_DQSN[0] DDR0_DQSP[4]/DDR1_DQSP[0] DDR0_DQSN[5]/DDR1_DQSN[1] DDR0_DQSP[5]/DDR1_DQSP[1] DDR0_DQSN[6]/DDR1_DQSN[4] DDR0_DQSP[6]/DDR1_DQSP[4] DDR0_DQSN[7]/DDR1_DQSN[5] DDR0_DQSP[7]/DDR1_DQSP[5]
DDR0_ALERT#
DDR0_PAR
DDR_VREF_CA
DDR0_VREF_DQ DDR1_VREF_DQ
DDR_VTT_CNTL
4
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AU53 AT53 AU55 AT55
BA56 BB56 AW56 AY56
AU45 AU43 AT45 AT43
BA51
M_A_A5
BB54
M_A_A9
BA52
M_A_A6
AY52
M_A_A8
AW52
M_A_A7
AY55 AW54
M_A_A12
BA54
M_A_A11
BA55
M_A_ACT#
AY54 AU46
M_A_A13
AU48 AT46 AU50 AU52 AY51
M_A_A2
AT48 AT50
M_A_A10
BB50
M_A_A1
AY50
M_A_A0
BA50
M_A_A3
BB52
M_A_A4
AM70
M_A_DQS#0
AM69
M_A_DQS0
AT69
M_A_DQS#1
AT70
M_A_DQS1
BA64
M_A_DQS#2
AY64
M_A_DQS2
AY60
M_A_DQS#3
BA60
M_A_DQS3
BA38
M_A_DQS#4
AY38
M_A_DQS4
AY34
M_A_DQS#5
BA34
M_A_DQS5
BA30
M_A_DQS#6
AY30
M_A_DQS6
AY26
M_A_DQS#7
BA26
M_A_DQS7
AW50 AT52
AY67 AY68
+VREFDQ_SA_M3
BA67 AW67
R545 *10K_4
M_A_ALERT# M_A_PARITY
DDR_VTT_CTRL
Stuff Q54 for both UMA and GPU in DDR_VTT_CNTL
M_A_CLK0# (11)
M_A_CLK0 (11)
M_A_CLK1# (11)
M_A_CLK1 (11)
M_A_CKE0 (11) M_A_CKE1 (11)
M_A_CS#0 (11) M_A_CS#1 (11) M_A_ODT0_DIMM (11) M_A_ODT1_DIMM (11)
M_A_BG#0 (11)
M_A_ACT# (11) M_A_BG#1 (11)
M_A_CAS# (11) M_A_WE# (11) M_A_RAS# (11) M_A_BA#0 (11)
M_A_BA#1 (11)
M_A_ALERT# (11)
M_A_PARITY (11)
+VREF_CA_CPU
TP77
+VREFDQ_SB_M3
+1.2VSUS
2
1 3
Q36 *DTC144EU
3
+3V_S5
R544 *100K_4
DRAMRST
3
2
https://t.me/schematicslaptop https://t.me/biosarchive
SKL ULT (DDR4)SKL ULT (DDR4)
U34C
AF65
DDR_VTTT_PG_CTRL (33)
M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8
M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
DDR1_DQ[0]/DDR0_DQ[16]
AF64
DDR1_DQ[1]/DDR0_DQ[17]
AK65
DDR1_DQ[2]/DDR0_DQ[18]
AK64
DDR1_DQ[3]/DDR0_DQ[19]
AF66
DDR1_DQ[4]/DDR0_DQ[20]
AF67
DDR1_DQ[5]/DDR0_DQ[21]
AK67
DDR1_DQ[6]/DDR0_DQ[22]
AK66
DDR1_DQ[7]/DDR0_DQ[23]
AF70
DDR1_DQ[8]/DDR0_DQ[24]
AF68
DDR1_DQ[9]/DDR0_DQ[25]
AH71
DDR1_DQ[10]/DDR0_DQ[26]
AH68
DDR1_DQ[11]/DDR0_DQ[27]
AF71
DDR1_DQ[12]/DDR0_DQ[28]
AF69
DDR1_DQ[13]/DDR0_DQ[29]
AH70
DDR1_DQ[14]/DDR0_DQ[30]
AH69
DDR1_DQ[15]/DDR0_DQ[31]
AT66
DDR1_DQ[16]/DDR0_DQ[48]
AU66
DDR1_DQ[17]/DDR0_DQ[49]
AP65
DDR1_DQ[18]/DDR0_DQ[50]
AN65
DDR1_DQ[19]/DDR0_DQ[51]
AN66
DDR1_DQ[20]/DDR0_DQ[52]
AP66
DDR1_DQ[21]/DDR0_DQ[53]
AT65
DDR1_DQ[22]/DDR0_DQ[54]
AU65
DDR1_DQ[23]/DDR0_DQ[55]
AT61
DDR1_DQ[24]/DDR0_DQ[56]
AU61
DDR1_DQ[25]/DDR0_DQ[57]
AP60
DDR1_DQ[26]/DDR0_DQ[58]
AN60
DDR1_DQ[27]/DDR0_DQ[59]
AN61
DDR1_DQ[28]/DDR0_DQ[60]
AP61
DDR1_DQ[29]/DDR0_DQ[61]
AT60
DDR1_DQ[30]/DDR0_DQ[62]
AU60
DDR1_DQ[31]/DDR0_DQ[63]
AU40
DDR1_DQ[32]/DDR1_DQ[16]
AT40
DDR1_DQ[33]/DDR1_DQ[17]
AT37
DDR1_DQ[34]/DDR1_DQ[18]
AU37
DDR1_DQ[35]/DDR1_DQ[19]
AR40
DDR1_DQ[36]/DDR1_DQ[20]
AP40
DDR1_DQ[37]/DDR1_DQ[21]
AP37
DDR1_DQ[38]/DDR1_DQ[22]
AR37
DDR1_DQ[39]/DDR1_DQ[23]
AT33
DDR1_DQ[40]/DDR1_DQ[24]
AU33
DDR1_DQ[41]/DDR1_DQ[25]
AU30
DDR1_DQ[42]/DDR1_DQ[26]
AT30
DDR1_DQ[43]/DDR1_DQ[27]
AR33
DDR1_DQ[44]/DDR1_DQ[28]
AP33
DDR1_DQ[45]/DDR1_DQ[29]
AR30
DDR1_DQ[46]/DDR1_DQ[30]
AP30
DDR1_DQ[47]/DDR1_DQ[31]
AU27
DDR1_DQ[48]
AT27
DDR1_DQ[49]
AT25
DDR1_DQ[50]
AU25
DDR1_DQ[51]
AP27
DDR1_DQ[52]
AN27
DDR1_DQ[53]
AN25
DDR1_DQ[54]
AP25
DDR1_DQ[55]
AT22
DDR1_DQ[56]
AU22
DDR1_DQ[57]
AU21
DDR1_DQ[58]
AT21
DDR1_DQ[59]
AN22
DDR1_DQ[60]
AP22
DDR1_DQ[61]
AP21
DDR1_DQ[62]
AN21
DDR1_DQ[63]
SKL_ULT/BGA
M_A_ALERT# M_B_ALERT#

+1.2VSUS
12
R577 470_4
CPU DRAM
CPU_DRAMRST#
R593 *Short/0_4
12
C650
*0.1u/16V_4
SKL_ULT
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR CH - B
3 OF 20
R312 *0_4 R291 *0_4
DDR3_DRAMRST# (11,12)
2
DDR1_CKN[0] DDR1_CKN[1] DDR1_CKP[0] DDR1_CKP[1]
DDR1_CKE[0] DDR1_CKE[1] DDR1_CKE[2] DDR1_CKE[3]
DDR1_CS#[0] DDR1_CS#[1] DDR1_ODT[0] DDR1_ODT[1]
DDR1_MA[3]
DDR1_DQSN[0]/DDR0_DQSN[2] DDR1_DQSP[0]/DDR0_DQSP[2] DDR1_DQSN[1]/DDR0_DQSN[3] DDR1_DQSP[1]/DDR0_DQSP[3] DDR1_DQSN[2]/DDR0_DQSN[6] DDR1_DQSP[2]/DDR0_DQSP[6] DDR1_DQSN[3]/DDR0_DQSN[7] DDR1_DQSP[3]/DDR0_DQSP[7] DDR1_DQSN[4]/DDR1_DQSN[2] DDR1_DQSP[4]/DDR1_DQSP[2] DDR1_DQSN[5]/DDR1_DQSN[3] DDR1_DQSP[5]/DDR1_DQSP[3]
DDR1_MA[4]
DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]
DDR1_ALERT#
DDR1_PAR DRAM_RESET# DDR_RCOMP[0] DDR_RCOMP[1] DDR_RCOMP[2]
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
AN45 AN46 AP45 AP46
AN56 AP55 AN55 AP53
BB42 AY42 BA42 AW42
AY48
M_B_A5
AP50
M_B_A9
BA48
M_B_A6
BB48
M_B_A8
AP48
M_B_A7
AP52 AN50
M_B_A12
AN48
M_B_A11
AN53
M_B_ACT#
AN52 BA43
M_B_A13
AY43 AY44 AW44 BB44 AY47
M_B_A2
BA44 AW46
M_B_A10
AY46
M_B_A1
BA46
M_B_A0
BB46
M_B_A3
BA47
M_B_A4
AH66
M_B_DQS#0
AH65
M_B_DQS0
AG69
M_B_DQS#1
AG70
M_B_DQS1
AR66
M_B_DQS#2
AR65
M_B_DQS2
AR61
M_B_DQS#3
AR60
M_B_DQS3
AT38
M_B_DQS#4
AR38
M_B_DQS4
AT32
M_B_DQS#5
AR32
M_B_DQS5
AR25
M_B_DQS#6
AR27
M_B_DQS6
AR22
M_B_DQS#7
AR21
M_B_DQS7
AN43
M_B_ALERT#
AP43
M_B_PARITY
AT13
CPU_DRAMRST#
AR18
SM_RCOMP_0
AT18
SM_RCOMP_1
AU18
SM_RCOMP_2
M_B_A[13:0] M_B_DQS#[7:0] M_B_DQS[7:0]
SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2
Skylake 2/3 (DDR3 I/F)
Skylake 2/3 (DDR3 I/F)
Skylake 2/3 (DDR3 I/F)
Monday, February 22, 2016
Monday, February 22, 2016
Monday, February 22, 2016
1

M_B_CLK0# (12) M_B_CLK1# (12)
M_B_CLK0 (12) M_B_CLK1 (12)
M_B_CKE0 (12) M_B_CKE1 (12)
M_B_CS#0 (12) M_B_CS#1 (12) M_B_ODT0_DIMM (12) M_B_ODT1_DIMM (12)
M_B_BG#0 (12)
M_B_ACT# (12) M_B_BG#1 (12)
M_B_CAS# (12) M_B_WE# (12) M_B_RAS# (12) M_B_BA#0 (12)
M_B_BA#1 (12)
M_B_ALERT# (12)
M_B_PARITY (12)
M_B_A[13:0] (12) M_B_DQS#[7:0] (12) M_B_DQS[7:0] (12)

R598120/F_4 R58980.6/F_4 R596100/F_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZRW
ZRW
ZRW
3 46
3 46
1
3 46
1A
1A
1A
5
4
3
2
1
SKL ULT (SIDEBAND ) GPIO
H_PECI (50ohm) If route on microstrip, Spacing need >18 mils Trace Length: 2~15 iches
H_PWRGOOD (50ohm)
Touch PAD Touch Screen
R198*IV@10K_4
R587*100K_4
R188*10K_4
UMA boot
GPU boot
+3V
Trace Length: 1~11.25 inches
UART2 for RMT
HDA
PCH_AZ_CODEC_SYNC(23)
PCH_AZ_CODEC_BITCLK(23)
PCH_AZ_CODEC_SDOUT(23)
PCH_AZ_CODEC_SDIN0(23)
PCH_AZ_CODEC_RST#(23)
SPKR
R549 *20K/F_4
D D
+3V_S5
I2C0_SDA
R1372.2K_4
I2C0_SCL
R1252.2K_4
I2C1_SDA
R119*2.2K_4
I2C1_SCL
R126*2.2K_4
PU 2.2K for touch pad I2C bus(400 KHz)
+3V
+3V
DGPU_PW_CTRL#
C C
high
low
DGPU_PW_CTRL#(2)
R208 EV@100K_4
GPU Control PU/PD
R201*EV@10K_4 R575*10K_4
R192*10K_4
20131015 For GC6 NV DG GC6_FB_EN PD.1A-1
R197 10K_4
UMA Only
GPU power is control by PCH GPIO (Discrete, SG or Optimize)
DGPU_PW_CTRL#
VGPU_EN
DGPU_PWR_EN
GC6_FB_EN
DGPU_HOLD_RST#
DGPU_PWROK
R209 IV@1K_4
R104 *10K_4
DGPU_PWROK PD on GPU side
Setup
DGPU_PW_CTRL#
UMA Only
SG/Optimise
VGA H/W
Menu
Signal
UMA
1
0
Hidden
Hidden
GPU
545659-103
Add GPU Power Control Siganls
Touch PAD
Touch Screen
DGPU_HOLD_RST#(13)
DGPU_PWR_EN(39)
DGPU_PWROK(15) GC6_FB_EN(13,16)
DGPU_EVENT#(16)
ODD_PRSNT#(24)
C636 *10p/50V_4
VGPU_EN(38)
ACCEL_INTA(26)
TPD_INT#(26,28)
TP_INT_PCH(20)
I2C0_SDA(26)
I2C0_SCL(26)
I2C1_SDA(20)
I2C1_SCL(20)
C644 *10p/50V_4 R583 33_4
R553 33_4 R569 33_4
R560 33_4
TP70 TP57
Strapping
SPKR(23)
TPD_INT#
UART2_RXD UART2_TXD UART2_RTS# UART2_CTS#
I2C0_SDA I2C0_SCL
I2C1_SDA I2C1_SCL
HDA_SYNC_R HDA_BCLK_R HDA_SDO_R
HDA_RST#_R
DMIC_CLK0_R DMIC_DATA0_R
SPKR
GSPI0_MOSI
GSPI1_MOSI
Skylake-U Strapping Table
Pin Name Strap description
GPP_B14 (SPKR)
B B
GPP_B18 (GSPI0_MOSI)
GPP_C2 (SMBALERT#)
GPP_B22 (GSPI1_MOSI)
GPP_C5 (SML0ALERT#)
SPI0_MOSI
SPI0_MISO
GPP_B23 (SML1ALERT# /PCHHOT#)
SPI0_IO2
A A
SPI0_IO3
HDA_SDO / I2S_TXD0
GPP_E19 (DDPB_CTRLDATA)
GPP_E21 (DDPC_CTRLDATA)
Top-Block Swap override PCH_PWROK
No reboot PCH_PWROK
TLS Confidentiality
Boot BIOS Strap Bit (BBS)
eSPI or LPC
Reserved
Reserved
Reserved
Reserved
Reserved
Flash Descriptor Security Override / Intel ME Debug Mode
Display Port B Detected
Display Port C Detected
5
Sampled
RSMRST#
PCH_PWROK
RSMRST#
RSMRST#
RSMRST#
RSMRST#
RSMRST#
RSMRST#
PCH_PWROK
PCH_PWROK
PCH_PWROK
Configuration note
0 = *Disable Top Swap (iPD 20K)
1 = Enable Top Swap Mode
0 = *Disable No Reboot (iPD 20K)
1 = Enable No Reboot Mode
0 = *Disable Intel ME Cryp to TLS(iPD 20K)
1 = Enable Intel ME Cryp to TLS
0 = *SPI (iPD 20K)
1 = LPC
0 = *LPC is selected for EC (iPD 20K)
1 = eSPI selected for EC
+3V
+3V
+3V_S5
+3V
+3V_S5
(iPU 15 ~ 40K)
(iPU 15 ~ 40K)
(iPD 20K)
(iPU 15 ~ 40K)
(iPU 15 ~ 40K)
0 = *Enable security in the Flash Description (iPD 20K)
1 = Disable Flash Descriptor Security (Override)
0 = *Port B is not detected (iPD 20K)
1 =Port B is detected
0 = *Port C is not detected (iPD 20K)
1 =Port C is detected
4
R550 *1K_4
R543 *1K_4
R144 *10K_4
R191 *1K_4
change location to near CPU to prevent impact HDA_SDO signal
HDA_SDO_R
AN8 AP7 AP8 AR7
AM5 AN7 AP5 AN5
AB1 AB2
W4
AB3 AD1
AD2 AD3 AD4
U7 U6
U8 U9
AH9
AH10 AH11
AH12 AF11
AF12
BA22 AY22 BB22 BA21 AY21
AW22
J5
AY20
AW20
AK7 AK6 AK9
AK10
H5 D7
D8 C8
AW5
R481 *1K_4
R570 1K_4
U34F
LPSS ISH
GPP_B15/GSPI0_CS# GPP_B16/GSPI0_CLK GPP_B17/GSPI0_MISO GPP_B18/GSPI0_MOSI
GPP_B19/GSPI1_CS# GPP_B20/GSPI1_CLK GPP_B21/GSPI1_MISO GPP_B22/GSPI1_MOSI
GPP_C8/UART0_RXD GPP_C9/UART0_TXD GPP_C10/UART0_RTS# GPP_C11/UART0_CTS#
GPP_C20/UART2_RXD GPP_C21/UART2_TXD GPP_C22/UART2_RTS# GPP_C23/UART2_CTS#
GPP_C16/I2C0_SDA GPP_C17/I2C0_SCL
GPP_C18/I2C1_SDA GPP_C19/I2C1_SCL
GPP_F4/I2C2_SDA GPP_F5/I2C2_SCL
GPP_F6/I2C3_SDA GPP_F7/I2C3_SCL
GPP_F8/I2C4_SDA GPP_F9/I2C4_SCL
SKL_ULT/BGA
U34G
AUDIO
HDA_SYNC/I2S0_SFRM HDA_BLK/I2S0_SCLK HDA_SDO/I2S0_TXD HDA_SDI0/I2S0_RXD HDA_SDI1/I2S1_RXD HDA_RST#/I2S1_SCLK GPP_D23/I2S_MCLK I2S1_SFRM I2S1_TXD
GPP_F1/I2S2_SFRM GPP_F0/I2S2_SCLK GPP_F2/I2S2_TXD GPP_F3/I2S2_RXD
GPP_D19/DMIC_CLK0 GPP_D20/DMIC_DATA0
GPP_D17/DMIC_CLK1 GPP_D18/DMIC_DATA1
+3V_S5
GPP_B14/SPKR
SKL_ULT/BGA
SPKR
GSPI0_MOSI
GSPI1_MOSI
3
+3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5
+3V_S5 +3V_S5
+1.8V_S5 +1.8V_S5
+1.8V_S5 +1.8V_S5
+1.8V_S5 +1.8V_S5
+3V_S5
+1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5
+3V_S5 +3V_S5
+3V_S5 +3V_S5
ME_WR# (28)
SKL_ULT
+3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5 +3V_S5 +3V_S5
SKL_ULT
+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5
7 OF 20
SMBALERT# (7)
SML0ALERT# (7)
+3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5
+3V_S5 +3V_S5
+1.8V_S5 +1.8V_S5
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_C15/UART1_CTS#/ISH_UART1_CTS#
+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5
6 OF 20
SDIO/SDXC
SD GPI SD GPI SD GPI SD GPI SD GPI SD GPI SD GPI SD GPI
GPP_A17/SD_PWR_EN#/ISH_GP7
GPP_D5/ISH_I2C0_SDA GPP_D6/ISH_I2C0_SCL
GPP_D7/ISH_I2C1_SDA GPP_D8/ISH_I2C1_SCL
GPP_F10/I2C5_SDA/ISH_I2C2_SDA
GPP_F11/I2C5_SCL/ISH_I2C2_SCL
GPP_D15/ISH_UART0_RTS#
GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_A18/ISH_GP0 GPP_A19/ISH_GP1 GPP_A20/ISH_GP2 GPP_A21/ISH_GP3 GPP_A22/ISH_GP4 GPP_A23/ISH_GP5
GPP_A12/BM_BUSY#/ISH_GP6
GPP_G0/SD_CMD GPP_G1/SD_DATA0 GPP_G2/SD_DATA1 GPP_G3/SD_DATA2 GPP_G4/SD_DATA3
GPP_G5/SD_CD# GPP_G6/SD_CLK
GPP_G7/SD_WP
GPP_A16/SD_1P8_SEL
SD_RCOMP
GPP_F23
+1.8V_S5
https://t.me/schematicslaptop https://t.me/biosarchive
AB11 AB13 AB12 W12 W11 W10 W8 W7
BA9 BB9
AB7
AF13
GPP_D9 GPP_D10 GPP_D11 GPP_D12
P2 P3 P4 P1
M4 N3
N1 N2
AD11 AD12
U1 U2 U3 U4
AC1 AC2 AC3 AB4
AY8 BA8 BB7 BA7 AY7 AW7 AP13
R148200/F_4
Touchpad INT
Reserve UART FFC TP for Win 7 debug
UART2_RXD UART2_TXD UART2_RTS# UART2_CTS#
TPD_INT#
R490 *49.9K/F_4 R489 *49.9K/F_4 R484 *49.9K/F_4 R488 *49.9K/F_4
TP68 TP69 TP67 TP66
+3V_S5
R117TDI@10K_4
https://t.me/schematicslaptop https://t.me/biosarchive
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Monday, February 22, 2016
Date: Sheet of
Monday, February 22, 2016
Date: Sheet of
Monday, February 22, 2016
2
Date: Sheet
PROJECT :
Skylake 6/7 (PEG/DMI/FDI)
Skylake 6/7 (PEG/DMI/FDI)
Skylake 6/7 (PEG/DMI/FDI)
1
+3V_S5
ZRW
ZRW
ZRW
4 46
4 46
4 46

of
1A
1A
1A
5
Backside cap
C203 1U/6.3V_2
C247 22u/6.3V_6
C227 22u/6.3V_6
C132 22u/6.3V_6
C301 22u/6.3V_6
C273 22u/6.3V_6
C209 22u/6.3V_6
C228 22u/6.3V_6
Backside cap
C312
C235
1U/6.3V_2
1U/6.3V_2
D D
C107
C275 22u/6.3V_6
C208 22u/6.3V_6
22u/6.3V_6
C575 10u/6.3V_4
C327 22u/6.3V_6
C300
C269
10u/6.3V_4
10u/6.3V_4
Backside cap
C223 1U/6.3V_2
C545 10u/6.3V_4
C580 1U/6.3V_2
C552 10u/6.3V_4
Backside cap
C581
C230
C279 1U/6.3V_2
C246 1U/6.3V_2
+VCCEOPIO
C310
GT3@10u/6.3V_4
+1.8V_PRIM
GT3@10u/6.3V_4
C C
B B
A A
C205
C220 GT3@10u/6.3V_4
R92
GT3@0_6
C267
1U/6.3V_2
1U/6.3V_2
C314
C221
1U/6.3V_2
1U/6.3V_2
Backside cap
For 2+3e CPU
C313 GT3@10u/6.3V_4
Backside cap
For 2+3e CPU
+1.8V_PRIM+1.8V_S5
C316 10u/6.3V_4
C210 1U/6.3V_2
C287
1U/6.3V_2
1U/6.3V_2
Backside cap
C214 1U/6.3V_2
C116
C131
10u/6.3V_4
10u/6.3V_4
C237
C239
1U/6.3V_2
1U/6.3V_2
+1.2VSUS
C243 1U/6.3V_2
C195 1U/6.3V_2
Backside cap
C593
C595
GT3@1U/6.3V_2
GT3@10u/6.3V_4
Backside cap
C215 10u/6.3V_4
Backside cap
C265 1U/6.3V_2
C375 10u/6.3V_4
Backside cap
+1V_SUS
+VCCIO
+1V_SUS
C315 1U/6.3V_2
C307 1U/6.3V_2
C241 10u/6.3V_4
C263 1U/6.3V_2
C466 10u/6.3V_4
R181 *short/0_4
1 2
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5
4
C248
C284
22u/6.3V_6
22u/6.3V_6
C558
C252
10u/6.3V_4
10u/6.3V_4
C217
C204
1U/6.3V_2
1U/6.3V_2
C256 1U/6.3V_2
100 ohm near CPU
1.0V_CPU 3A
C589
C591
GT3@1U/6.3V_2
GT3@1U/6.3V_2
For 2+3e CPU
C140 10u/6.3V_4
C262 1U/6.3V_2
Backside cap
C407
C360
1U/6.3V_2
10u/6.3V_4
Primary side cap
C421 10u/6.3V_4
+VDDQC
C322 1U/6.3V_2
R430 *short/0_6
Primary side cap
R81 *short/0_6
R431 *short/0_6
4
+VCCCORE
+1.8V_PRIM
+VCCOPC
+VCCOPC_SRC(32)
681_AGND(32)
For 2+3e CPU
+VCCOPC_SRC 681_AGND
+VCCOPC
C590
C592
GT3@1U/6.3V_2
GT3@1U/6.3V_2
C250
C224
10u/6.3V_4
10u/6.3V_4
C261
C212
1U/6.3V_2
1U/6.3V_2
100 ohm Near CPU
VCCGT_SENSE(34) VSSGT_SENSE(34)
C410
C329
1U/6.3V_2
1U/6.3V_2
C450
C435
10u/6.3V_4
10u/6.3V_4
+1V_VCCST
C308 10u/6.3V_4
C576 1U/6.3V_4
Backside cap
Primary side cap
+VCCOPC
For 2+3e CPU
+1.8V_PRIM
C594 GT3@1U/6.3V_2
+VCCGT
C92 10u/6.3V_4
C213 1U/6.3V_2
C211 1U/6.3V_2
R83 100/F_4
R78 100/F_4
C355 1U/6.3V_2
+VCCSTG
TP13 TP27
R162 GT3@100/F_4
R170 GT3@0_4 R175 GT3@0_4
R179 GT3@100/F_4
+VCCEOPIO
R164 GT3@0_4 R176 GT3@0_4
C80 10u/6.3V_4
C260 1U/6.3V_2
C238 1U/6.3V_2
+VCCGT
+1.2VSUS
C136 1U/6.3V_4
+VCCPLL
C577 1U/6.3V_4
A30 A34 A39
A44 AK33 AK35 AK37 AK38 AK40
AL33 AL37
AL40 AM32 AM33 AM35 AM37 AM38
G30
K32 AK32 AB62
P62
V62
H63
G61 AC63
AE63 AE62
AG62
AL63 AJ62
A48
A53
A58
A62
A66
AA63 AA64 AA66 AA67 AA69 AA70 AA71 AC64 AC65 AC66 AC67 AC68 AC69 AC70 AC71
J43
J45
J46
J48
J50
J52
J53
J55
J56
J58
J60
K48
K50
K52
K53
K55
K56
K58
K60
L62
L63
L64
L65
L66
L67
L68
L69
L70
L71
M62
N63
N64
N66
N67
N69
J70
J69
AU23 AU28 AU35 AU42 BB23 BB32 BB41 BB47 BB51
AM40
A18
A22
AL23
K20
K21
U34L
VCC_A30 VCC_A34 VCC_A39 VCC_A44 VCC_AK33 VCC_AK35 VCC_AK37 VCC_AK38 VCC_AK40 VCC_AL33 VCC_AL37 VCC_AL40 VCC_AM32 VCC_AM33 VCC_AM35 VCC_AM37 VCC_AM38 VCC_G30
RSVD_K32 RSVD_AK32 VCCOPC_AB62
VCCOPC_P62 VCCOPC_V62
VCC_OPC_1P8_H63 VCC_OPC_1P8_G61 VCCOPC_SENSE
VSSOPC_SENSE VCCEOPIO
VCCEOPIO VCCEOPIO_SENSE
VSSEOPIO_SENSE
SKL_ULT/BGA
U34M
CPU POWER 2 OF 4
VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT
VCCGT_SENSE VSSGT_SENSE
SKL_ULT/BGA
U34N
CPU POWER 3 OF 4
S3
VDDQ_AU23 VDDQ_AU28 VDDQ_AU35 VDDQ_AU42 VDDQ_BB23 VDDQ_BB32 VDDQ_BB41 VDDQ_BB47 VDDQ_BB51
VDDQC VCCST VCCSTG_A22
S0
VCCPLL_OC
S0
VCCPLL_K20 VCCPLL_K21
S3
1.0V
SKL_ULT/BGA
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SKL_ULT
CPU POWER 1 OF 4
S0
S0
S0
SKL_ULT
S0
VCCGTX
S0
0.55~1.5V
2+2 X
2+3e peak 6A
2+3e TPY 4A
SKL_ULT
DDR4
1.2V
2A
2+2 peak 5A 2+2 TPY 4A 2+3e peak 5.1A 2+3e TPY 5A
S3
1.0V
1.0V
1.0V
120mA
3
VCC
0.55V~1.5V
2+2 peak 24A 2+2 TPY 17A
2+3e peak 24A 2+3e TPY 17A
1.0V
Sx
1.8V
GT3 CPU
3A
1.0V
12 OF 20
VCCGT
0.55~1.5V
2+2 peak 31A 2+2 TPY 15A
2+3e peak 56A 2+3e TPY 17A
VCCGTX_AM48 VCCGTX_AM50 VCCGTX_AM52 VCCGTX_AM53 VCCGTX_AM56 VCCGTX_AM58 VCCGTX_AU58 VCCGTX_AU63 VCCGTX_BB57 VCCGTX_BB66
VCCGTX_SENSE VSSGTX_SENSE
13 OF 20
S0
0.85V/0.95V
3.0A
S0
1.15V
120mA
40mA
260mA
VCCIO_SENSE VSSIO_SENSE
VSSSA_SENSE VCCSA_SENSE
14 OF 20
3
3A
50mA
VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT
VCCGTX_AK42 VCCGTX_AK43 VCCGTX_AK45 VCCGTX_AK46 VCCGTX_AK48 VCCGTX_AK50 VCCGTX_AK52 VCCGTX_AK53 VCCGTX_AK55 VCCGTX_AK56 VCCGTX_AK58 VCCGTX_AK60 VCCGTX_AK70 VCCGTX_AL43 VCCGTX_AL46 VCCGTX_AL50 VCCGTX_AL53 VCCGTX_AL56 VCCGTX_AL60
VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO
VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA
VCC_G32 VCC_G33 VCC_G35 VCC_G37 VCC_G38 VCC_G40 VCC_G42 VCC_J30 VCC_J33 VCC_J37 VCC_J40 VCC_K33 VCC_K35 VCC_K37 VCC_K38 VCC_K40 VCC_K42 VCC_K43
VCC_SENSE VSS_SENSE
VIDALERT#
VIDSCK
VIDSOUT
VCCSTG_G20
N70 N71 R63 R64 R65 R66 R67 R68 R69 R70 R71 T62 U65 U68 U71 W63 W64 W65 W66 W67 W68 W69 W70 W71 Y62
AK42 AK43 AK45 AK46 AK48 AK50 AK52 AK53 AK55 AK56 AK58 AK60 AK70 AL43 AL46 AL50 AL53 AL56 AL60 AM48 AM50 AM52 AM53 AM56 AM58 AU58 AU63 BB57 BB66
AK62 AL61
AK28 AK30 AL30 AL42 AM28 AM30 AM42
AK23 AK25 G23 G25 G27 G28 J22 J23 J27 K23 K25 K27 K28 K30
AM23 AM22
H21 H20
2
+VCCCORE
G32 G33 G35 G37 G38 G40 G42 J30 J33 J37
J40 K33 K35 K37 K38 K40 K42 K43
E32 E33
B63 A63 D64
G20
+VCCGT
C119 1U/6.3V_4
C531 47u/6.3V_8
C106 10u/6.3V_4
R29 100/F_4
R32 100/F_4
+VCCSTG
Primary side cap
C66 47u/6.3V_8
Primary side cap
C83 10u/6.3V_4
+VCCCORE
100 ohm Near CPU
H_CPU_SVIDART# H_CPU_SVIDCLK H_CPU_SVIDDAT
C74 47u/6.3V_8
C122 10u/6.3V_4
VCORE_SENSE (34) VCORESS_SENSE (34)
Primary side cap
C61
C244 47u/6.3V_8
C59 47u/6.3V_8
47u/6.3V_8
Primary side cap
C599 22u/6.3V_6
C620 22u/6.3V_6
C134 22u/6.3V_6
C621 22u/6.3V_6
Primary side cap
C619 22u/6.3V_6
C93 47u/6.3V_8
C600 22u/6.3V_6
C598 22u/6.3V_6
C202 change back to 47u/6.3v_8 for cost
+VCCGT
C294 22u/6.3V_6
Primary side cap
C292
C604
22u/6.3V_6
GT3@22u/6.3V_6
C609 GT3@22u/6.3V_6
Stuff C277,C274,C275
For 2+3e CPU
Backside cap
C319 GT3@10u/6.3V_4
GT3@10u/6.3V_4
+VCCIO
C305 10u/6.3V_4
C216
10u/6.3V_4
10u/6.3V_4
Backside cap
C304 10u/6.3V_4
C251
C271
Primary side cap
C608
C627
1U/6.3V_4
1U/6.3V_4
Backside cap
C280
C249
10u/6.3V_4
10u/6.3V_4
Backside cap
C303
C194
1U/6.3V_2
1U/6.3V_2
Primary side cap
C245
C133
10u/6.3V_4
10u/6.3V_4
TP28 TP26
R90 100/F_4
VSASS_SENSE (34) VSA_SENSE (34)
R89 100/F_4
100 ohm near CPU
+VCCSA
+VCCSA
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2
C538 47u/6.3V_8
C573 10u/6.3V_4
C296 1U/6.3V_2
C605 1U/6.3V_4
C266 10u/6.3V_4
C207 1U/6.3V_2
C231 10u/6.3V_4
C534 47u/6.3V_8
C100 10u/6.3V_4
SVID
H_CPU_SVIDDAT
H_CPU_SVIDART#
H_CPU_SVIDCLK
C302
C219
47u/6.3V_8
47u/6.3V_8
C617
C114
22u/6.3V_6
22u/6.3V_6
C210 change back to 47u/6.3v_8 for cost
C618
C597
22u/6.3V_6
22u/6.3V_6
C596 GT3@22u/6.3V_6
C270 GT3@10u/6.3V_4
Imax 3(A)
C320 1U/6.3V_2
C628 1U/6.3V_4
C236 10u/6.3V_4
C259 1U/6.3V_2
C87 10u/6.3V_4
C56 47u/6.3V_8
C574 10u/6.3V_4
+1V_VCCST
R418 100/F_4
Place PU resistor close to CPU
Place PU resistor close to CPU
R419 220/F_4
C60 47u/6.3V_8
C96 47u/6.3V_8
C293 22u/6.3V_6
C318
C242
GT3@10u/6.3V_4
10u/6.3V_4
C297
C321
1U/6.3V_2
1U/6.3V_2
C222
C288
10u/6.3V_4
10u/6.3V_4
C285
C295
1U/6.3V_2
1U/6.3V_2
C102
C115
10u/6.3V_4
10u/6.3V_4
1
C138
C570
10u/6.3V_4
10u/6.3V_4
Must close to CPU
C535 1000P/50V_4
+1V_VCCST
R393
54.9/F_4
C277 47u/6.3V_8
C317
C291
22u/6.3V_6
22u/6.3V_6
C225 10u/6.3V_4
C311 10u/6.3V_4
C276 1U/6.3V_2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Monday, February 22, 2016
Date: Sheet of
Monday, February 22, 2016
Date: Sheet of
Monday, February 22, 2016
Date: Sheet
PROJECT :
Skylake 12/13/14 (POWER)
Skylake 12/13/14 (POWER)
Skylake 12/13/14 (POWER)
1

H_CPU_SVIDDAT (34)
VR_SVID_ALERT#_VCORE (34)
H_CPU_SVIDCLK (34)
ZRW
ZRW
ZRW
of
5 46
5 46
5 46
1A
1A
1A
5
4
3
2
1
Skylake ULT (GPU, SATA , ODD, CLK ,USB2&3)
U34H
PCIE/USB3/SATA
PEG_RX#0(13)
PEG_RX0(13)
D
dGPU PEG*4
C
LAN
WIFI
B
N16S VGALANWLAN
M.2
SSD
A
PEG_TX#0(13)
PEG_TX0(13)
PEG_RX#1(13)
PEG_RX1(13)
PEG_TX#1(13)
PEG_TX1(13)
PEG_RX#2(13)
PEG_RX2(13)
PEG_TX#2(13)
PEG_TX2(13)
PEG_RX#3(13)
PEG_RX3(13)
PEG_TX#3(13)
PEG_TX3(13)
PCIE_RX5-_LAN(22)
PCIE_RX5+_LAN(22)
PCIE_TX5-_LAN(22)
PCIE_TX5+_LAN(22)
PCIE_RX6-_WLAN(25)
PCIE_RX6+_WLAN(25)
PCIE_TX6-_WLAN(25)
PCIE_TX6+_WLAN(25)
SATA_RXN1/PEG_RXN10_L2(25)
SATA_RXP1/PEG_RXP10_L2(25)
SATA_TXN1/PEG_TXN10_L2(25)
SATA_TXP1/PEG_TXP10_L2(25)
SATA_RXN3/PEG_RXN9_L0(25)
SATA_RXP3/PEG_RXP9_L0(25)
SATA_TXN3/PEG_TXN9_L0(25)
SATA_TXP3/PEG_TXP9_L0(25)
CLK_PCIE_VGA#(13)
CLK_PCIE_VGA(13)
CLK_PEGA_REQ#(13)
CLK_PCIE_NGFF1_N(25)
CLK_PCIE_NGFF1_P(25)
PCIE_CLKREQ_NGFF1#(25)
CLK_PCIE_LANN(22)
CLK_PCIE_LANP(22)
CLK_PCIE_LAN_REQ#(22)
CLK_PCIE_WLANN(25)
CLK_PCIE_WLANP(25)
PCIE_CLKREQ_WLAN#(25)
CLK_PCIE_REQ0#
CLK_PCIE_REQ1#
CLK_PCIE_REQ2#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
CLK_PCIE_REQ5#
5
HDD
ODD
C564 EV@0.22u/10V_4
C563 EV@0.22u/10V_4
C550 EV@0.22u/10V_4
C549 EV@0.22u/10V_4
C547 EV@0.22u/10V_4
C548 EV@0.22u/10V_4
C542 EV@0.22u/10V_4
C543 EV@0.22u/10V_4
SATA_RXN0(24)
SATA_RXP0(24)
SATA_TXN0(24)
SATA_TXP0(24)
SATA_RXN1(24)
SATA_RXP1(24)
SATA_TXN1(24)
SATA_TXP1(24)
C560 0.1u/16V_4
C561 0.1u/16V_4
C541 0.1u/16V_4
C540 0.1u/16V_4
R440 100/F_4
TP55
TP51
R259
R211
TP31
TP78
R230
R213
R258 10K_4
R205 10K_4
R223 *10K_4
R574 *10K_4
R227 10K_4
R210 10K_4
XDP_PRDY#
XDP_PREQ#
PIRQA#
SATA_RXN1/PEG_RXN10_L2
SATA_RXP1/PEG_RXP10_L2
SATA_TXN1/PEG_TXN10_L2
SATA_TXP1/PEG_TXP10_L2
SATA_RXN3/PEG_RXN9_L0
SATA_RXP3/PEG_RXP9_L0
SATA_TXN3/PEG_TXN9_L0
SATA_TXP3/PEG_TXP9_L0
CLK_PCIE_REQ0#
*Short/0_4
CLK_PCIE_REQ1#
*Short/0_4
CLK_PCIE_REQ2#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
*Short/0_4
CLK_PCIE_REQ5#
*Short/0_4
+3V
C_PEG_TX#0
C_PEG_TX0
C_PEG_TX#1
C_PEG_TX1
C_PEG_TX#2
C_PEG_TX2
C_PEG_TX#3
C_PEG_TX3
PCIE_TX5-
PCIE_TX5+
PCIE_TX6-
PCIE_TX6+
PCIE_RCOMPN
PCIE_RCOMPP
H13
PCIE1_RXN/USB3_5_RXN
G13
PCIE1_RXP/USB3_5_RXP
B17
PCIE1_TXN/USB3_5_TXN
A17
PCIE1_TXP/USB3_5_TXP
G11
PCIE2_RXN/USB3_6_RXN
F11
PCIE2_RXP/USB3_6_RXP
D16
PCIE2_TXN/USB3_6_TXN
C16
PCIE2_TXP/USB3_6_TXP
H16
PCIE3_RXN
G16
PCIE3_RXP
D17
PCIE3_TXN
C17
PCIE3_TXP
G15
PCIE4_RXN
F15
PCIE4_RXP
B19
PCIE4_TXN
A19
PCIE4_TXP
F16
PCIE5_RXN
E16
PCIE5_RXP
C19
PCIE5_TXN
D19
PCIE5_TXP
G18
PCIE6_RXN
F18
PCIE6_RXP
D20
PCIE6_TXN
C20
PCIE6_TXP
F20
PCIE7_RXN/SATA0_RXN
E20
PCIE7_RXP/SATA0_RXP
B21
PCIE7_TXN/SATA0_TXN
A21
PCIE7_TXP/SATA0_TXP
G21
PCIE8_RXN/SATA1A_RXN
F21
PCIE8_RXP/SATA1A_RXP
D21
PCIE8_TXN/SATA1A_TXN
C21
PCIE8_TXP/SATA1A_TXP
E22
PCIE9_RXN
E23
PCIE9_RXP
B23
PCIE9_TXN
A23
PCIE9_TXP
F25
PCIE10_RXN
E25
PCIE10_RXP
D23
PCIE10_TXN
C23
PCIE10_TXP
F5
PCIE_RCOMPN
E5
PCIE_RCOMPP
D56
PROC_PRDY#
D61
PROC_PREQ#
BB11
GPP_A7/PIRQA#
E28
PCIE11_RXN/SATA1B_RXN
E27
PCIE11_RXP/SATA1B_RXP
D24
PCIE11_TXN/SATA1B_TXN
C24
PCIE11_TXP/SATA1B_TXP
E30
PCIE12_RXN/SATA2_RXN
F30
PCIE12_RXP/SATA2_RXP
A25
PCIE12_TXN/SATA2_TXN
B25
PCIE12_TXP/SATA2_TXP
SKL_ULT/BGA
U34J
D42
CLKOUT_PCIE_N0
C42
CLKOUT_PCIE_P0
AR10
GPP_B5/SRCCLKREQ0#
B42
CLKOUT_PCIE_N1
A42
CLKOUT_PCIE_P1
AT7
GPP_B6/SRCCLKREQ1#
D41
CLKOUT_PCIE_N2
C41
CLKOUT_PCIE_P2
AT8
GPP_B7/SRCCLKREQ2#
D40
CLKOUT_PCIE_N3
C40
CLKOUT_PCIE_P3
AT10
GPP_B8/SRCCLKREQ3#
B40
CLKOUT_PCIE_N4
A40
CLKOUT_PCIE_P4
AU8
GPP_B9/SRCCLKREQ4#
E40
CLKOUT_PCIE_N5
E38
CLKOUT_PCIE_P5
AU7
GPP_B10/SRCCLKREQ5#
SKL_ULT/BGA
+3V_S5
4
SKL_ULT
+3V_S5 +3V_S5 +3V_S5
8 OF 20
SKL_ULT
CLOCK SIGNALS
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
10 OF 20
add for EC reset RTC
CLR_CMOS(28)
SSIC / USB3
USB3_2_RXN/SSIC_1_RXN
USB3_2_RXP/SSIC_1_RXP
USB3_2_TXN/SSIC_1_TXN
USB3_2_TXP/SSIC_1_TXP
USB3_3_RXN/SSIC_2_RXN
USB3_3_RXP/SSIC_2_RXP
USB3_3_TXN/SSIC_2_TXN
USB3_3_TXP/SSIC_2_TXP
USB2
+3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5 +3V_S5
GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2
+3V_S5
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
GPD8/SUSCLK
XTAL24_IN
XTAL24_OUT
XCLK_BIASREF
SRTCRST#
RTCRST#
USB3_1_RXN
USB3_1_RXP
USB3_1_TXN
USB3_1_TXP
USB3_4_RXN
USB3_4_RXP
USB3_4_TXN
USB3_4_TXP
USB2N_1
USB2P_1
USB2N_2
USB2P_2
USB2N_3
USB2P_3
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
USB2N_7
USB2P_7
USB2N_8
USB2P_8
USB2N_9
USB2P_9
USB2N_10
USB2P_10
USB2_COMP
USB2_ID
USB2_VBUSSENSE
GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#
GPP_E4/DEVSLP0
GPP_E5/DEVSLP1
GPP_E6/DEVSLP2
GPP_E8/SATALED#
F43
E43
BA17
E37
XTAL24_IN
E35
XTAL24_OUT
E42
XCLK_BIASREF
AM18
RTC_X1
RTCX1
AM20
RTC_X2
RTCX2
AN18
SRTC_RST#
AM16
RTC_RST#
3
2
R594
1
100K_4
H8
G8
C13
D13
J6
H6
B13
A13
J10
H10
B15
A15
E10
F10
C15
D15
AB9
AB10
AD6
AD7
AH3
AJ3
AD9
AD10
AJ1
AJ2
AF6
AF7
AH1
AH2
AF8
AF9
AG1
AG2
AH7
AH8
AB6
AG3
AG4
A9
C9
D9
B9
J1
J2
J3
H2
H3
G4
H1
CLK_PCIE_XDPN
CLK_PCIE_XDPP
SUSCLK
SRTC_RST#
Q41 *2N7002K
USBCOMP
R138 113/F_4
USB2_ID
R492 1K_4
R185 1K_4
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
DEVSLP0
DEVSLP1
DEVSLP2
SATAGP0
SATAGP1
R436 *Short/0_4
R452 2.7K/F_4
3
USB3_RXN0 (27)
USB3_RXP0 (27)
USB3_TXN0 (27)
USB3_TXP0 (27)
USB3_RXN1 (27)
USB3_RXP1 (27)
USB3_TXN1 (27)
USB3_TXP1 (27)
MB USB3.0 CN16 ( Charger IC ) Down
MB USB3.0 CN13 -> Up
1A-1
USBP0- (27)
USBP0+ (27)
USBP1- (27)
USBP1+ (27)
USBP2- (27)
USBP2+ (27)
USBP3- (24)
USBP3+ (24)
USBP4- (25)
USBP4+ (25)
USBP5- (20)
USBP5+ (20)
USBP6- (20)
USBP6+ (20)
USBP7- (27)
USBP7+ (27)
USB_OC0# (27)
USB_OC1# (27)
USB_OC2# (27)
TP6
TP9
SUSCLK (25)
1V power plane
0.71 checklist p14
MB USB3.0 CN16 ( Charger IC ) Down MB USB3.0 CN13 -> Up DB USB2.0 POA (Reserved) BT Touch Screen CCD Card reader
USBCOMP Impedance = 50 ohm Trace length < 500 mils Trace spacing = 15 mils
MB U3 MB U3 DB U2
DEVSLP0 (24)
DEVSLP2 (25)
NGFF3_DET (25)
+1V_S5
3
CLR_CMOS
2
1
Q39 2N7002K
RTC_RST#
Add SSD ID 1/14
Hight is SSD , Low is ODD
SSD_ID(24)
Skylake-U userd 24 MHz (50 Ohm ESR) XTAL
XTAL24_IN
XTAL24_OUT
Note: Change Y4 to 38.4 MHz(ESR 30 ohm) for Cannonlake U
RTC Clock 32.768KHz (RTC)
Trace length < 1000 mils
RTC Circuitry (RTC)
+3VPCU
On SKL voltage at VCCRTC does not exceed 3.2V
R329
1.5K/F_4
VCCRTC_2
R330
45.3K/F_4
2013/10/16 Chage +3V_RTC_0 to VCCTC_2.
1A-2
1. AHL03003057 DBV CR2032
2. AHL03003003 VDE CR2032
2
PCH PU/PD
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
DEVSLP0
DEVSLP1
DEVSLP2
PIRQA#
SATAGP1
R438 10K_4
C349 6.8p/50V_4
C350 6.8p/50V_4
1B-1
R335 1K_4
1
BT1
BAT_CONN
2
SATAGP0
C556 10P/50V_4
3
4
Y3
R426
24MHz
1M_4
2
1
C544 10P/50V_4
1
2
+3V_RTC_2
+3V_RTC_1
+3V_RTC_[0:2] Trace width = 20 mils
BAT54CW_0.2A
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Monday, February 22, 2016
Date: Sheet
Monday, February 22, 2016
Date: Sheet
Monday, February 22, 2016
Date: Sheet
+3V_S5
R411 10K_4
R405 10K_4
R404 10K_4
R422 10K_4
R469 *10K_4
R470 *10K_4
R471 *10K_4
R572 10K_4
R439 *10K_4
+3V_S5
R437 100K_4
CH01006JB08 -> 10p CH01506JB06 -> 15p CH-6806TB01 -> 6.8p
RTC_X1
Y2
R225
32.768KHZ
10M_4
RTC_X2
+3V_RTC
+3V_RTC
Trace width = 30 mils
D9
R237
20K/F_4
R233
20K/F_4
C363 1u/6.3V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Skylake 9/10 (PEG/USB/CLK)
Skylake 9/10 (PEG/USB/CLK)
Skylake 9/10 (PEG/USB/CLK)

+3V
BG624000078 -> HHE(1st) BG624000044 -> TXC(2nd)
BG3327680C6 -> HHE(1st)
BG332768099 -> TXC(2nd)--EOD Change to BG332768104
RTC_RST#
1
J1
C357
*JUMP
1u/6.3V_4
2
SRTC_RST#
C354 1u/6.3V_4
ZRW
ZRW
ZRW
of
6 46
of
6 46
of
1
6 46
D
C
B
A
1A
1A
1A
5
4
3
2
1
D
For M.2 wifi module must
SIO_RCIN#(28)
IRQ_SERIRQ(24,28)
C
PCH_SPI_CLK_EC(28)
PCH_SPI_SI_EC(28)
PCH_SPI_SO_EC(28)
SP@ socket P/N: DFHS08FS023 only for A-TEST
SPI ROM
Skylake
3.3V
Vender Size Quanta P/N Vender P/N
AKE3EFP0N07
8M
AKE2EZN0Q00
8M
PCH_SPI_CLK
PCH_SPI_SO
PCH_SPI_SI
PCH_SPI_IO2
PCH_SPI_IO3
PCH_SPI_CS0#
R573 *short_4
IRQ_SERIRQ
PCH_SPI_CLK_EC
PCH_SPI_SI_EC
PCH_SPI_SO_EC
W25Q64FVSSIQWND GD25B64CSIGRGGD
EC_RCIN#
AW3
AW2
AW13
AY11
AV2
AV3
AU4
AU3
AU2
AU1
M2
M3
J4
V1
V2
M1
G3
G2
G1
U34E
SPI - FLASH
SPI0_CLK
SPI0_MISO
SPI0_MOSI
SPI0_IO2
SPI0_IO3
SPI0_CS0#
SPI0_CS1#
SPI0_CS2#
GPP_D1/SPI1_CLK
GPP_D2/SPI1_MISO
GPP_D3/SPI1_MOSI
GPP_D21/SPI1_IO2
GPP_D22/SPI1_IO3
GPP_D0/SPI1_CS#
CL_CLK
CL_DATA
CL_RST#
GPP_A0/RCIN#
GPP_A6/SERIRQ
SKL_ULT/BGA
+3V_S5
SPI - TOUCH
+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5
C LINK
+3V_S5 +3V_S5
PCH SPI ROM(8M)
15ohm CS01502JB12 33ohm CS03302JB29
PCH_SPI_CS0#
1A-13
PCH_SPI_SO
PCH_SPI_SO_EC
R453 15_4
R457 15_4
+3V_PCH_ME
3.3K is original and for no support fast read function
SKL_ULT
LPC
R433 1K_4
SMBUS, SMLINK
+3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5
GPP_B23/SML1ALERT#/PCHHOT#
+3V_S5
+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5
GPP_A14/SUS_STAT#/ESPI_RESET#
+3V_S5
GPP_A9/CLKOUT_LPC0/ESPI_CLK
+3V_S5 +3V_S5
+3V_S5
5 OF 20
+3V_LDO_EC
+3V_S5
SPI_SO_8M
SPI_WP_IO2_ME
PCH_SPI_IO2
PCH_SPI_IO3
GPP_C0/SMBCLK
GPP_C1/SMBDATA
GPP_C2/SMBALERT#
GPP_C3/SML0CLK
GPP_C4/SML0DATA
GPP_C5/SML0ALERT#
GPP_C6/SML1CLK
GPP_C7/SML1DATA
GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS#
GPP_A10/CLKOUT_LPC1
GPP_A8/CLKRUN#
R462 *0_6
R475 0_6
U29
1
CS#
2
IO1/DO
3
IO2/WP#
4
GND
W25Q64FV -- 8MB
IO3/HOLD#
IO0/DI
PCH_SPI_CLK_EC
PCH_SPI_SI_EC
R415 15_4
R477 15_4
VCC
CLK
R7
PCH_MBCLK0_R
R8
PCH_MBDAT0_R
R10
SMBALERT#
R9
VGA_MBCLK
W2
VGA_MBDATA
W1
SML0ALERT#
W3
SMB_ME1_CLK
V3
SMB_ME1_DAT
AM7
SMB1ALERT#
eSPI change to 15 ohm
AY13
R559 *short_4
BA13
R547 *short_4
BB13
R556 *short_4
AY12
R548 *short_4
BA12
BA11
R226 *0_4
C348 *0.1u/16V_4
eSPI change to 15 ohm
AW9
R551 22/J_4
AY9
AW11
R557 22/J_4
R558 22/J_4
CLKRUN#
2/10 add C806 for EMI request , R748 no stuiff from EC site move at CPU site
+3V_PCH_ME
8
7
SPI_HOLD_IO3_ME
6
SPI_CLK_8M
5
SPI_SI_8M
R463 15_4
R468 15_4
R461 15_4
R465 15_4
SPI_WP_IO2_ME
SPI_HOLD_IO3_ME
Strapping
SMBALERT# (4)
SML0ALERT# (4)
SMB1ALERT# (26)
ckl v0.71 p.24
LPC_LAD0 (24,25,28)
LPC_LAD1 (24,25,28)
LPC_LAD2 (24,25,28)
LPC_LAD3 (24,25,28)
LPC_LFRAME# (24,25,28)
TP36
CLK_PCI_EC (28)
PCLK_TPM (24)
CLK_PCI_LPC (25)
CLKRUN# (24,28)
+3V_PCH_ME
C582 0.1u/16V_4
R466 1K_4
PCH_SPI_CLK
PCH_SPI_SI
C587 *22p/50V_4
reserve for SPI fast read

+3V_S5
CLKRUN#
IRQ_SERIRQ
EC_RCIN#
SMBus
PCH_MBCLK0_R
PCH_MBDAT0_R
VGA_MBDATA
VGA_MBCLK
SMB1ALERT#
Termination Resistor Requirement for PCH PCHHOT# Pin Reserve PU 150K resister
S5 S0
SMBus(PCH)
PCH_MBDAT0_R
PCH_MBCLK0_R
PCH_XDP_WLAN/S5 DDR_TP/S0
SMBus(EC)
R564 8.2K/F_4
R566 10K_4
R546 10K_4
+3V
Change to 2.2k
Q35
5
3
2
6
DMN601DW K-7
+3V_S5
R4732.2K_4
R4722.2K_4
R4792.2K_4
R1452.2K_4
+3V_S5
R187*150K_4
R456
R464
2.2K_4
2.2K_4
4
1
CLK_SDATA (11,12,19,26)
CLK_SCLK (11,12,19,26)
D
C
B
A
5
4
SPI_CS0#_UR_ME(28)
+3V_PCH_ME
R428 *Short/0_4
R445 10K_4
PCH_SPI_CS0#
SPI_CS0#_UR_ME
only 0ohm option
3
2ND_MBCLK(16,28)
2ND_MBDATA(16,28)
EC/S5
2
2ND_MBCLK
2ND_MBDATA
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Monday, February 22, 2016
Date: Sheet
Monday, February 22, 2016
Date: Sheet
Monday, February 22, 2016
Date: Sheet
R480 *Short/0_4
R476 *Short/0_4
Skylake 5 (SATA/HDA/SPI)
Skylake 5 (SATA/HDA/SPI)
Skylake 5 (SATA/HDA/SPI)
SMB_ME1_CLK
SMB_ME1_DAT
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZRW
ZRW
ZRW
of
7 46
of
7 46
of
1
7 46
B
A
1A
1A
1A
5
4
3
2
1
+VCCIO
Reserve PU 10K
R450 *10K_4
D
EC only PD, so PD 10K
PCH_SUSPWRDNACK_C
Board ID
C





B
PLTRST# Buffer
A
PROC_PWRGD
R579 10K_4
R526 10K_4
R524 10K_4
R538 10K_4
R506 10K_4
R504 NAC@10K_4
R521 10K_4
R498 *10K_4
R495 10K_4
R493 10K_4
R519 10K_4
#$
VRAM X32 (R506)
Non IOAC (R504)
Non G-sensor (R521)
No TPM (R498)
No-Touch panel
PCI_PLTRST#
2
1
5
RAM_ID1
RAM_ID2
RAM_ID3
Board_ID0
Board_ID1
Board_ID2
Board_ID3
Board_ID4
Board_ID5
Board_ID6
Board_ID7
 !"
VRAM X16 (R507)
IOAC (R505)
G-sensor (R522)
TPM (R499)
Touch panel (R500)
+3V
C341 0.1u/16V_4
5
U8
3
MC74VHC1G08
RSMRST#(28)
EC_PWROK
R420 *short_4
R568 *0_4
PCH_SUSPWRDNACK(28)
PCIE_LAN_WAKE#(22,25)
+1.8V_S5
R527 *10K_4
R525 *10K_4
R540 *10K_4
R507 *10K_4
R505 IOAC@10K_4
R522 *GS@10K_4
R499 TPM@10K_4
R500 TSU@10K_4
R501 *10K_4
R494 *10K_4
R520 *10K_4


 Reserve
4
R212 100K_4
For 14" (R495)
(Default)
Reserved (Default)
PLTRST# (13,22,24,25,28)
R580 *short_4
R451 10K_4
R597 *0_4
PCI_PLTRST#
SYS_RESET#
VCCST_PWRGD
TP29
PCIE_LAN_WAKE#
 !"#$
For 15" / 17" (R501)
ReserveReserved
PCH_RSMRST#
PROC_PWRGD
SYS_PWROK_R
EC_PWROK_R
DPWROK_R
PCH_SUSPWRDNACK_C
SUSACK#_R
TP25
U34K
SYSTEM POWER MANAGEMENT
AN10
GPP_B13/PLTRST#
B5
SYS_RESET#
AY17
RSMRST#
A68
PROCPWRGD
B65
VCCST_PWRGD
B6
SYS_PWROK
BA20
PCH_PWROK
BB20
DSW_PWROK
AR13
GPP_A13/SUSWARN#/SUSPWRDNACK
AP11
GPP_A15/SUSACK#
BB15
WAKE#
AM15
GPD2/LAN_WAKE#
AW17
GPD11/LANPHYPC
AT15
GPD7/RSVD
SKL_ULT/BGA
A36
CSI2_DN0
B36
CSI2_DP0
C38
CSI2_DN1
D38
CSI2_DP1
C36
CSI2_DN2
D36
CSI2_DP2
A38
CSI2_DN3
B38
CSI2_DP3
C31
CSI2_DN4
D31
CSI2_DP4
C33
CSI2_DN5
D33
CSI2_DP5
A31
CSI2_DN6
B31
CSI2_DP6
A33
CSI2_DN7
B33
CSI2_DP7
A29
CSI2_DN8
B29
CSI2_DP8
C28
CSI2_DN9
D28
CSI2_DP9
A27
CSI2_DN10
B27
CSI2_DP10
C27
CSI2_DN11
D27
CSI2_DP11
U34I
CSI-2
SKL_ULT/BGA
+3V_S5
I I
+3V_S5
+3V_S5 +3V_S5 +3V_S5
SKL_ULT
+1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5
+1.8V_S5 +1.8V_S5 +1.8V_S5
Power Sequence
PCH_PWROK(28)
For platforms not supporting Deep Sx, connect directly to RSMRST#
DPWROK_R
SYSPWOK
EC_PWROK
4
SKL_ULT
+3V_S5
11 OF 20
+3V_S5
9 OF 20
R403 *0_4
+3V_S5 +3V_S5 +3V_S5
+3V_S5
+3V_S5 +3V_S5
+3V_S5 +3V_S5 +3V_S5
+3V_S5
GPP_B11/EXT_PWR_GATE#
+3V_S5 +3V_S5
CSI2_CLKN0
CSI2_CLKP0
CSI2_CLKN1
CSI2_CLKP1
CSI2_CLKN2
CSI2_CLKP2
CSI2_CLKN3
CSI2_CLKP3
CSI2_COMP
GPP_D4/FLASHTRIG
EMMC
GPP_F13/EMMC_DATA0
GPP_F14/EMMC_DATA1
GPP_F15/EMMC_DATA2
GPP_F16/EMMC_DATA3
GPP_F17/EMMC_DATA4
GPP_F18/EMMC_DATA5
GPP_F19/EMMC_DATA6
GPP_F20/EMMC_DATA7
GPP_F21/EMMC_RCLK
GPP_F22/EMMC_CLK
GPP_F12/EMMC_CMD
EMMC_RCOMP
Non Deep Sx
No Deep Sx
R582 0_4
Remove
GPP_B12/SLP_S0#
GPD4/SLP_S3#
GPD5/SLP_S4#
GPD10/SLP_S5#
SLP_SUS#
SLP_LAN#
GPD9/SLP_WLAN#
GPD6/SLP_A#
GPD3/PWRBTN#
GPD1/ACPRESENT
GPD0/BATLOW#
GPP_A11/PME#
INTRUDER#
GPP_B2/VRALERT#
C37
D37
C32
D32
C29
D29
B26
A26
E13
B7
AP2
AP1
AP3
AN3
AN1
AN2
AM4
AM1
AM2
AM3
AP4
AT1
R552 0_4
PCH_RSMRST#
R410 *10K_4
AT11
AP15
BA16
AY16
AN15
AW15
BB17
AN16
BA15
AY15
AU13
AU11
AP16
AM10
AM11
R86 100/F_4
RAM_ID1
RAM_ID2
RAM_ID3
Board_ID0
Board_ID1
Board_ID2
Board_ID3
Board_ID4
Board_ID5
Board_ID6
Board_ID7
R542200/F_4
EC_PWROK_R
IMVP_PWRGD_3V (2)
EC_PWROK (28)
3
SUS0#
SUSB#
SUSC#
PCH_SLP_S5#
PCH_SLP_SUS#
PCH_SLP_LAN#
PCH_SLP_WLAN#
PCH_SLP_A#
PCH_PWRBTN#
PCH_ACPRESENT
PCH_BATLOW#
R222 1M_4
INTRUDER#
MPHY_EXT_PWR
PCH_VRALERT#
TP58
Board_ID4 (20)
REV:E tPLT17(max 200us) ->SLP_S3# assertion to IMVP VR_ON(VRON) deassertion
VRON_R(32,34)
TP33
TP72
R585*short_4
R584*short_4
TP32
TP30
Close to CPU
VCCST_PWRGD
Stuff 1000P/50V
SUS0# (31)
SUSB# (28,31)
SUSC# (28)
TP79
TP23
TP75
TP35
+3V_RTC
+3V_S5
C368 *0.1u/16V_4
5
4
U13
3
*MC74VHC1G08DFT2G
R244 0_4
R427 60.4/F_4
C557 1000P/50V_4
VCCST_PWRGD_EN
DNBSWON# (28)
SB_ACDC (28)
REV:E tPLT15(max 200us)
->SLP_S4# assertion to VDDQ(+1.35VSUS) ramp down start(SUSON)
SUSON_R(31,33)
2
SUSB#
1
VRON
+1V_VCCST
R416 1K_4
VCCST_PWRGD_R
Shortpad change to 60.4 ohm. 11/6
2013/10/21 Del APWORK.1A-6
SYS_RESET#
PCH_ACPRESENT
PCH_BATLOW#
PCIE_LAN_WAKE#
MPHY_EXT_PWR
PCH_VRALERT#
12/25 Change R206 pull-up to +3V_S5
PCH_RSMRST#
PCH_PWROK
SYS_PWROK_R
+3V_S5
C361 *0.1u/16V_4
5
3
R235 0_4
2
1
SUSON_R
4
U12 *TC7SH08FU
12/28 Delete U14/R245/C372 & Change "MAINON_R" to "MAINON"
12/28 Change from "SUSB#" to "MAINON"
VRON (28)
CRB is via +1.05V PGVCCST PWRGD
U25
+3V_S5
5
C528
0.1u/16V_4
4
R390 *0_4
R391 0_4
2
74AUP1G07GW
1
VCC
NC
2
VCCST_PWRGD_EN_L
A
3
Y
GND
PCH_PWROK
HWPG
Rev:D change netmane for HWPG
R429 10K_4
R565 8.2K/F_4
R229 8.2K/F_4
R236 10K_4
R184 *1K_4
R206 10K_4
R567 10K_4
R555 10K_4
R435 10K_4
+3V
+3V_S5
12/28 Delete U12/C361 & Add R695
SUSC#
SUSON
C527 *1000P/50V_4
HWPG (28)
SUSON (28)
B2A S0->S5 & S0->S3 Power of sequence 1us SUSB# -> VCCST_PWRGD
+3V_S5
C529 0.1u/16V_4
5
2
1
3
SUSB#
VCCST_PWRGD_EN
C530 *1000P/50V_4
4
U24 MC74VHC1G08DFT2G
R388 *0_4
Reserve 1000P/50V
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Monday, February 22, 2016
Date: Sheet
Monday, February 22, 2016
Date: Sheet
Monday, February 22, 2016
Date: Sheet
PROJECT :
Skylake 9/11 (PWROK/Board_ID)
Skylake 9/11 (PWROK/Board_ID)
Skylake 9/11 (PWROK/Board_ID)
1

ZRW
ZRW
ZRW
8 46
8 46
8 46
D
C
B
A
1A
1A
1A
of
of
of
5
4
3
2
1
U34S
E68
AL25
AL27
BA70
BA68
B67
D65
D67
E70
C68
D68
C67
F71
G69
F70
G68
H70
G71
H69
G70
E63
F63
E66
F66
E60
E8
AY2
AY1
D1
D3
K46
K45
C71
B70
F60
A52
J71
J68
F65
G65
F61
E61
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
CFG[18]
CFG[19]
CFG_RCOMP
ITP_PMODE
RSVD_AY2
RSVD_AY1
RSVD_D1
RSVD_D3
RSVD_K46
RSVD_K45
RSVD_AL25
RSVD_AL27
RSVD_C71
RSVD_B70
RSVD_F60
RSVD_A52
RSVD_TP_BA70
RSVD_TP_BA68
RSVD_J71
RSVD_J68
VSS_F65
VSS_G65
RSVD_F61
RSVD_E61
SKL_ULT/BGA
D
CFG4
R79 49.9/F_4
+1V_S5
C
B
CFG_RCOMP
R88 1.5K/F_4
SKL_ULT
RESERVED SIGNALS-1
19 OF 20
RSVD_TP_BB68
RSVD_TP_BB69
RSVD_TP_AK13
RSVD_TP_AK12
RSVD_BB2
RSVD_BA3
RSVD_D5
RSVD_D4
RSVD_B2
RSVD_C2
RSVD_B3
RSVD_A3
RSVD_AW1
RSVD_E1
RSVD_E2
RSVD_BA4
RSVD_BB4
RSVD_A4
RSVD_C4
RSVD_A69
RSVD_B69
RSVD_AY3
RSVD_D71
RSVD_C70
RSVD_C54
RSVD_D54
VSS_AY71
ZVM#
RSVD_TP_AW71
RSVD_TP_AW70
MSM#
PROC_SELECT#
TP5
TP6
TP4
TP1
TP2
BB68
BB69
AK13
AK12
Rev:F reserve TP
BB2
BA3
AU5
AT5
D5
D4
B2
C2
B3
A3
AW1
E1
E2
BA4
BB4
A4
C4
BB5
A69
B69
AY3
D71
C70
C54
D54
AY4
BB3
AY71
AR56
R172 GT3@0_4
AW71
AW70
AP56
C64
R417 100K_4
TP24
Rev:F Stuff C699
+1V_VCCST
+1V_S5
+1V_S5
+1V_S5
+1V_S5
+1V_S5
+1V_S5
+3VPCU
+3V_S5
+1.5V
+3V_S5
+1V_S5
+3V_S5
+1V_S5
+1V_S5
+3V
VCCPRIM_1P0 & VCCPRIM_CORE Short
AB19
AB20
C199 1U/6.3V_4
C603 1U/6.3V_4
C554 47u/6.3V_8
C233 1U/6.3V_4
C121 1U/6.3V_4
C117 47u/6.3V_8
C111 1U/6.3V_4
C282 *1U/6.3V_4
R200 *0_6
R194 *short_6
R588 0_6
R600 *0_6
C652 1U/6.3V_4
R174 *short_6
R155 *short_6
LPM_ZVM_N (32)
C108 1U/6.3V_4
C278 1U/6.3V_4
C110 1U/6.3V_4
For 2+3e CPU No Stuff
TP21
+VCCDSW_1P0
C6231U/6.3V_4
C602 1U/6.3V_4
+VCCPDSW_3P3
C336*0.1U/16V_4
+VCCHDA
+VCCPSPI
+VCCPRIM_3P3
P18
AF18
AF19
V20
V21
AL1
K17
N15
N16
N17
P15
P16
K15
V15
AB17
Y18
AD17
AD18
AJ17
AJ19
AJ16
AF20
AF21
AJ21
AK20
N18
L1
L15
T19
T20
SKL_ULT
U34O
CPU POWER 4 OF 4
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
DCPDSW_1P0
VCCMPHYAON_1P0
VCCMPHYAON_1P0
VCCMPHYGT_1P0_N15
VCCMPHYGT_1P0_N16
VCCMPHYGT_1P0_N17
VCCMPHYGT_1P0_P15
VCCMPHYGT_1P0_P16
VCCAMPHYPLL_1P0
VCCAMPHYPLL_1P0
VCCAPLL_1P0
VCCPRIM_1P0_AB17
VCCPRIM_1P0_Y18
VCCDSW_3P3_AD17
VCCDSW_3P3_AD18
VCCDSW_3P3_AJ17
VCCHDA
VCCSPI
VCCSRAM_1P0
VCCSRAM_1P0
VCCSRAM_1P0
VCCSRAM_1P0
VCCPRIM_3P3_AJ21
VCCPRIM_1P0_AK20
VCCAPLLEBB
SKL_ULT/BGA
1.5V
3.3V
1.0V
1.0V
30mA
11mA
1.0V
642mA
1.0V
S5
1.0V
S5
1.0V
22mA
1.0V
1.0V
S5
1.0V
3.3V
118mA
3.3V
1.0V
696mA
2.574A
S5
1.0V
1.258A
26mA
696mA
S5
S5
33mA
44mA
33mA 41mA
75mA with AJ21 pin
1.0V
6mA
1.8V
<1mA
3.0V+
RTC
135mA
S5
+3V
75mA
S5
696mA
S5
15 OF 20
S5
VCCPGPPG
VCCPRIM_3P3_V19
VCCPRIM_1P0_T1
VCCATS_1P8
VCCRTCPRIM_3P3
VCCRTC_AK19
VCCRTC_BB14
1.0V
S5
GPP_B0/CORE_VID0
GPP_B1/CORE_VID1
GPIO Group Power Plane
AK15
VCCPGPPA
VCCPGPPB
VCCPGPPC
VCCPGPPD
VCCPGPPE
VCCPGPPF
DCPRTC
VCCCLK1
VCCCLK2
VCCCLK3
VCCCLK4
VCCCLK5
VCCCLK6
+VCCPGPPA
AG15
+VCCPGPPB
Y16
+VCCPGPPC
Y15
+VCCPGPPD
T16
+VCCPGPPE
AF16
+VCCPGPPF
AD15
+VCCPGPPG
V19
+VCCPRIM_3P3
T1
+VCCPRIM_1P0
AA1
+VCCATS_1P8
AK17
+VCCPRTCPRIM_3P3
AK19
BB14
BB10
A14
K19
L21
N20
L19
A10
AN11
V0P85A_VID0
AN13
C286 1U/6.3V_4
C358 1U/6.3V_4
+VCCPRTC
C352 1U/6.3V_4
DCPRTC
C198 *1U/6.3V_4
C578 1U/6.3V_4
C325 *1U/6.3V_4
C309 1U/6.3V_4
C255 1U/6.3V_4
C274 *1U/6.3V_4
R186*short_6
R180*short_6
R154*short_6
R153*short_6
R161*short_6
R166*short_6
R171*short_6
C283 1U/6.3V_4
C299 *1U/6.3V_4
R165*short_6
R248*short_6
C362 0.1U/16V_4
R231*short_6
C353 0.1U/16V_4
C641 0.1U/16V_4
TP37
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+1.8V_S5
+1V_S5
+1.8V_S5
+3V_S5
+3V_RTC
+1V_S5
%
D
C
B
Pin Name Strap description Configuration
CFG[0] Stall reset sequence after PCU PLL lock until de-asserted
CFG[1]
CFG[2]
CFG[3] Reserved Configuration lane
CFG[4]
CFG[6:5] PCI Express* Bifunction
A
CFG[7] PEG Training
CFG[19:8]
Reserved Configuration lane
PCI Express* Static x16 Lane Numbering Reversal
eDP enable
Reserved Configuration lane
5
1 = *Normal Operation; No stall (iPU 3K)
0 = Stall
1 = *Normal Operation(iPU 3K)
0 = Lan number reversed
1 = Disabled (iPU 3K)
0 = *Enabled
00 = 1x8, 2x4 PCI Express* 01 = reserved 10 = 2x8 PCI Express* 11 = 1x16 PCI Express*
1 = *PEG Train immediatedly follow RESET# de-assertion (iPU 3K)
0 = PEG wait for BIOS for training
4
Note
H & S processor used only
CFG4
R455 1K_4
H & S processor used only
H & S processor used only
3
A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Monday, February 22, 2016
Date: Sheet
Monday, February 22, 2016
Date: Sheet
Monday, February 22, 2016
2
Date: Sheet
PROJECT :
Skylake PCH-LP 15/19 (POWER)
Skylake PCH-LP 15/19 (POWER)
Skylake PCH-LP 15/19 (POWER)
ZRW
ZRW
ZRW
1A
1A
1A
of
9 46
of
9 46
of
1
9 46
5
4
3
2
1
Skylake ULT (GND)
A67
A70
AA2
AA4
AA65
AA68
AB15
AB16
AB18
AB21
AB8
AD13
AD16
AD19
AD20
AD21
AD62
AD8
AE64
AE65
AE66
AE67
AE68
AE69
AF1
AF10
AF15
AF17
AF2
AF4
AF63
AG16
AG17
AG18
AG19
AG20
AG21
AG71
AH13
AH6
AH63
AH64
AH67
AJ15
AJ18
AJ20
AJ4
AK11
AK16
AK18
AK21
AK22
AK27
AK63
AK68
AK69
AK8
AL2
AL28
AL32
AL35
AL38
AL4
AL45
AL48
AL52
AL55
AL58
AL64
A5
SKL_ULT
GND 1 OF 3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SKL_ULT/BGA
D
C
B
A
5
16 OF 20
U34P
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL65
AL66
AM13
AM21
AM25
AM27
AM43
AM45
AM46
AM55
AM60
AM61
AM68
AM71
AM8
AN20
AN23
AN28
AN30
AN32
AN33
AN35
AN37
AN38
AN40
AN42
AN58
AN63
AP10
AP18
AP20
AP23
AP28
AP32
AP35
AP38
AP42
AP58
AP63
AP68
AP70
AR11
AR15
AR16
AR20
AR23
AR28
AR35
AR42
AR43
AR45
AR46
AR48
AR5
AR50
AR52
AR53
AR55
AR58
AR63
AR8
AT2
AT20
AT23
AT28
AT35
AT4
AT42
AT56
AT58
4
AT63
AT68
AT71
AU10
AU15
AU20
AU32
AU38
AV1
AV68
AV69
AV70
AV71
AW10
AW12
AW14
AW16
AW18
AW21
AW23
AW26
AW28
AW30
AW32
AW34
AW36
AW38
AW41
AW43
AW45
AW47
AW49
AW51
AW53
AW55
AW57
AW6
AW60
AW62
AW64
AW66
AW8
AY66
B10
B14
B18
B22
B30
B34
B39
B44
B48
B53
B58
B62
B66
B71
BA1
BA10
BA14
BA18
BA2
BA23
BA28
BA32
BA36
F68
BA45
SKL_ULT
GND 2 OF 3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SKL_ULT/BGA
17 OF 20
U34Q
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
BA49
BA53
BA57
BA6
BA62
BA66
BA71
BB18
BB26
BB30
BB34
BB38
BB43
BB55
BB6
BB60
BB64
BB67
BB70
C1
C25
C5
D10
D11
D14
D18
D22
D25
D26
D30
D34
D39
D44
D45
D47
D48
D53
D58
D6
D62
D66
D69
E11
E15
E18
E21
E46
E50
E53
E56
E6
E65
E71
F1
F13
F2
F22
F23
F27
F28
F32
F33
F35
F37
F38
F4
F40
F42
BA41
3
G10
G22
G43
G45
G48
G52
G55
G58
G60
G63
G66
H15
H18
H71
J11
J13
J25
J28
J32
J35
J38
J42
K16
K18
K22
K61
K63
K64
K65
K66
K67
K68
K70
K71
L11
L16
L17
F8
G5
G6
J8
SKL_ULT
GND 3 OF 3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SKL_ULT/BGA
18 OF 20
U34R
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L18
L2
L20
L4
L8
N10
N13
N19
N21
N6
N65
N68
P17
P19
P20
P21
R13
R6
T15
T17
T18
T2
T21
T4
U10
U63
U64
U66
U67
U69
U70
V16
V17
V18
W13
W6
W9
Y17
Y19
Y20
Y21
AW69
RSVD_AW69
AW68
+1.8V_S5
R491 *0_4
C614
*1U/6.3V_4
Reserve 1uF no stuff in CPU U11,U12 ball support Cannonlake-U PCH
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
RSVD_AW68
AU56
RSVD_AU56
AW48
RSVD_AW48
C7
RSVD_C7
U12
RSVD_U12
U11
RSVD_U11
H11
RSVD_H11
REV = 1
Skylake 10/17/18 (GND)
Skylake 10/17/18 (GND)
Skylake 10/17/18 (GND)
Monday, February 22, 2016
Monday, February 22, 2016
Monday, February 22, 2016
U34T
SKL_ULT/BGA
?
SKL_ULT
SPARE
RSVD_F6
RSVD_E3
RSVD_C11
RSVD_B11
RSVD_A11
RSVD_D12
RSVD_C12
RSVD_F52
20 OF 20
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
ZRW
ZRW
ZRW

F6
E3
C11
B11
A11
D12
C12
F52
?
of
10 46
of
10 46
of
10 46
D
C
B
A
1A
1A
1A
5
4
3
2
1
+2.5V
+3V

D
C
B
+VDDQ
M_A_A[13:0](3)
D
M_A_WE#(3)
M_A_CAS#(3)
M_A_RAS#(3)
+1.2VSUS
R315 240/F_4
M_A_EVENT#
+3V
C
B
R313 *10K_4
CHA_SA0
R322 10K_4
R311 *10K_4
CHA_SA1
R320 10K_4
R332 *10K_4
CHA_SA2
R333 10K_4
DDR3_DRAMRST#(3,12)
M_A_ODT0_DIMM(3)
M_A_ODT1_DIMM(3)
+1.2VSUS
CLK_SCLK(7,12,19,26)
CLK_SDATA(7,12,19,26)
M_A_ACT#(3)
M_A_PARITY(3)
M_A_ALERT#(3)
M_A_BA#0(3)
M_A_BA#1(3)
M_A_BG#0(3)
M_A_BG#1(3)
M_A_CS#0(3)
M_A_CS#1(3)
M_A_CKE0(3)
M_A_CKE1(3)
M_A_CLK0(3)
M_A_CLK0#(3)
M_A_CLK1(3)
M_A_CLK1#(3)
R319 240/F_4
R305 240/F_4
R308 240/F_4
R309 240/F_4
R318 240/F_4
R304 240/F_4
R317 240/F_4
R316 240/F_4
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_EVENT#
C460 *0.1U/16V_4
CHA_SA0
CHA_SA1
CHA_SA2
+1.2VSUS
TP41
TP40
M_A_CB0
M_A_CB1
M_A_CB2
M_A_CB3
M_A_CB4
M_A_CB5
M_A_CB6
M_A_CB7
P/N and F/P
JDIM2A
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10/AP
120
A11
119
A12
158
A13
151
A14/WE#
156
A15/CAS#
152
A16/RAS#
162
S2#/C0
165
S3#/C1
114
ACT#
143
PARITY
116
ALERT#
134
EVENT#
108
RESET#
150
BA0
145
BA1
115
BG0
113
BG1
149
S0#
157
S1#
109
CKE0
110
CKE1
137
CK0
139
CK0#
138
CK1
140
CK1#
155
ODT0
161
ODT1
253
SCL
254
SDA
256
SA0
260
SA1
166
SA2
92
CB0
91
CB1
101
CB2
105
CB3
88
CB4
87
CB5
100
CB6
104
CB7
12
DM0
33
DM1
54
DM2
75
DM3
178
DM4
199
DM5
220
DM6
241
DM7
96
DM8
8
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
(260P)
DDR4 SODIMM 260 PIN
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8
M_A_DQ0
7
M_A_DQ1
20
M_A_DQ3
21
M_A_DQ6
4
M_A_DQ5
3
M_A_DQ4
16
M_A_DQ7
17
M_A_DQ2
28
M_A_DQ9
29
M_A_DQ8
41
M_A_DQ11
42
M_A_DQ10
24
M_A_DQ13
25
M_A_DQ12
38
M_A_DQ14
37
M_A_DQ15
50
M_A_DQ21
49
M_A_DQ16
62
M_A_DQ19
63
M_A_DQ22
46
M_A_DQ17
45
M_A_DQ20
58
M_A_DQ23
59
M_A_DQ18
70
M_A_DQ25
71
M_A_DQ28
83
M_A_DQ27
84
M_A_DQ30
66
M_A_DQ24
67
M_A_DQ29
79
M_A_DQ26
80
M_A_DQ31
174
M_A_DQ33
173
M_A_DQ37
187
M_A_DQ35
186
M_A_DQ34
170
M_A_DQ36
169
M_A_DQ32
183
M_A_DQ38
182
M_A_DQ39
195
M_A_DQ45
194
M_A_DQ41
207
M_A_DQ46
208
M_A_DQ42
191
M_A_DQ44
190
M_A_DQ40
203
M_A_DQ47
204
M_A_DQ43
216
M_A_DQ52
215
M_A_DQ53
228
M_A_DQ50
229
M_A_DQ51
211
M_A_DQ48
212
M_A_DQ49
224
M_A_DQ55
225
M_A_DQ54
237
M_A_DQ63
236
M_A_DQ58
249
M_A_DQ56
250
M_A_DQ61
232
M_A_DQ59
233
M_A_DQ62
245
M_A_DQ60
246
M_A_DQ57
13
M_A_DQS0
34
M_A_DQS1
55
M_A_DQS2
76
M_A_DQS3
179
M_A_DQS4
200
M_A_DQS5
221
M_A_DQS6
242
M_A_DQS7
97
M_A_DQS8
11
M_A_DQS#0
32
M_A_DQS#1
53
M_A_DQS#2
74
M_A_DQS#3
177
M_A_DQS#4
198
M_A_DQS#5
219
M_A_DQS#6
240
M_A_DQS#7
95
M_A_DQS#8
M_A_DQ[63:0] (3)
0-7
8-15
+1.2VSUS
2250mA
16-23
24-31
32-39
40-47
48-55
+1.2VSUS
R306
56-63
M_A_DQS[7:0] (3)
M_A_DQS#[7:0] (3)
M_A_DQS8
M_A_DQS#8
240/F_4
R307
240/F_4
+1.2VSUS
12/21 Change JDIM2 footprint to "ddr4-d4as0-26001-1p52-std-smt " for SMT requset
VREF DQ0 M1 Solution
+VREF_CA_CPU
1
C473
0.022U/25V_4
2
JDIM2B
111
VDD1
112
VDD2
117
VDD3
118
VDD4
123
VDD5
124
VDD6
129
VDD7
130
VDD8
135
VDD9
136
VDD10
141
VDD11
142
VDD12
147
VDD13
148
VDD14
153
VDD15
154
VDD16
159
VDD17
160
VDD18
163
VDD19
1
VSS1
5
VSS2
9
VSS3
15
VSS4
19
VSS5
23
VSS6
27
VSS7
31
VSS8
35
VSS9
39
VSS10
43
VSS11
47
VSS12
51
VSS13
57
VSS14
61
VSS15
65
VSS16
69
VSS17
73
VSS18
77
VSS19
81
VSS20
85
VSS21
89
VSS22
93
VSS23
99
VSS24
103
VSS25
107
VSS26
167
VSS27
171
VSS28
175
VSS29
181
VSS30
185
VSS31
189
VSS32
193
VSS33
197
VSS34
201
VSS35
205
VSS36
209
VSS37
213
VSS38
217
VSS39
223
VSS40
227
VSS41
231
VSS42
235
VSS43
239
VSS44
243
VSS45
247
VSS46
251
VSS47
R327 2/F_6
R334 24.9/F_4
DDR4 SODIMM 260 PIN
VDDSPD
VREF_CA
(260P)
+1.2VSUS
255
257
VPP1
259
VPP2
258
VTT
164
2
VSS48
6
VSS49
10
VSS50
14
VSS51
18
VSS52
22
VSS53
26
VSS54
30
VSS55
36
VSS56
40
VSS57
44
VSS58
48
VSS59
52
VSS60
56
VSS61
60
VSS62
64
VSS63
68
VSS64
72
VSS65
78
VSS66
82
VSS67
86
VSS68
90
VSS69
94
VSS70
98
VSS71
102
VSS72
106
VSS73
168
VSS74
172
VSS75
176
VSS76
180
VSS77
184
VSS78
188
VSS79
192
VSS80
196
VSS81
202
VSS82
206
VSS83
210
VSS84
214
VSS85
218
VSS86
222
VSS87
226
VSS88
230
VSS89
234
VSS90
238
VSS91
244
VSS92
248
VSS93
252
VSS94
261
GND
262
GND
R321 1K/F_4
VREF_CA_DIMM0
R328 1K/F_4
C379 2.2U/6.3V/X7R_6
C377 0.1U/25V_4
R271 *0_4
R282 *short/0_4
0.5A
600mA
VREF_CA_DIMM0
+2.5V_SUS
12/4 Change for +3.3V to +3V
+VDDQ_VTT
R325*0_4
Place these Caps near So-Dimm1.
1uF/10uF 4pcs on each side of connector
+1.2VSUS
C399 1U/6.3V_4
C391 1U/6.3V_4
C408 1U/6.3V_4
C381 1U/6.3V_4
C449 1U/6.3V_4
C414 1U/6.3V_4
A
+1.2VSUS(3,5,12,33)
+VDDQ_VTT(12,33)
+3V(2,4,6,7,8,9,12,13,15,19,20,21,22,23,24,25,26,27,28,30,31,32,33,34,37,38,39)
5
4
C427 1U/6.3V_4
C438 1U/6.3V_4
C392 10U/6.3V_6
C385 10U/6.3V_6
C383 10U/6.3V_6
C382 10U/6.3V_6
C393 10U/6.3V_6
C426 10U/6.3V_6
C416 10U/6.3V_6
C386 10U/6.3V_6
3
+VDDQ_VTT
+3V
C425 1U/6.3V_4
C412 1U/6.3V_4
C423 1U/6.3V_4
C415 1U/6.3V_4
C409 10U/6.3V_6
C444 0.1U/16V_4
C441 2.2U/6.3V_6
VREF_CA_DIMM0
+2.5V_SUS
C465 0.1U/16V_4
C464 2.2U/6.3V_6
C374 0.1U/16V_4
C378 2.2U/6.3V_6
A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Monday, February 22, 2016
Date: Sheet
Monday, February 22, 2016
Date: Sheet
Monday, February 22, 2016
2
Date: Sheet
PROJECT :
DDR4 DIMM-RVS(5.2H) CHA
DDR4 DIMM-RVS(5.2H) CHA
DDR4 DIMM-RVS(5.2H) CHA
ZRW
ZRW
ZRW
11 46
11 46
11 46
1
1A
1A
1A
of
of
of
5
4
3
2
1
M_B_A[13:0](3)
D
M_B_WE#(3)
M_B_CAS#(3)
M_B_RAS#(3)
M_B_ACT#(3)
M_B_PARITY(3)
+1.2VSUS
R301 240/F_4
M_B_EVENT#
+3V
C
R302
R300 *10K_4
CHB_SA0
R294 10K_4
B
10K_4
CHB_SA1
R295 *10K_4
R290 *10K_4
CHB_SA2
R287 10K_4
DDR3_DRAMRST#(3,11)
+1.2VSUS
M_B_ODT0_DIMM(3)
M_B_ODT1_DIMM(3)
CLK_SCLK(7,11,19,26)
CLK_SDATA(7,11,19,26)
M_B_ALERT#(3)
M_B_BA#0(3)
M_B_BA#1(3)
M_B_BG#0(3)
M_B_BG#1(3)
M_B_CS#0(3)
M_B_CS#1(3)
M_B_CKE0(3)
M_B_CKE1(3)
M_B_CLK0(3)
M_B_CLK0#(3)
M_B_CLK1(3)
M_B_CLK1#(3)
R292 240/F_4
R272 240/F_4
R280 240/F_4
R275 240/F_4
R293 240/F_4
R273 240/F_4
R288 240/F_4
R303 240/F_4
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_EVENT#
C461 *0.1U/16V_4
CHB_SA0
CHB_SA1
CHB_SA2
+1.2VSUS
TP39
TP38
M_B_CB0
M_B_CB1
M_B_CB2
M_B_CB3
M_B_CB4
M_B_CB5
M_B_CB6
M_B_CB7
JDIM1A
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10/AP
120
A11
119
A12
158
A13
151
A14/WE#
156
A15/CAS#
152
A16/RAS#
162
S2#/C0
165
S3#/C1
114
ACT#
143
PARITY
116
ALERT#
134
EVENT#
108
RESET#
150
BA0
145
BA1
115
BG0
113
BG1
149
S0#
157
S1#
109
CKE0
110
137
139
138
140
155
161
253
254
256
260
166
92
91
101
105
88
87
100
104
12
33
54
75
178
199
220
241
96
CKE1
CK0
CK0#
CK1
CK1#
ODT0
ODT1
SCL
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
DDR4 SODIMM 260 PIN
(260P)
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8
8
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
M_B_DQ9
7
M_B_DQ8
20
M_B_DQ10
21
M_B_DQ15
4
M_B_DQ13
3
M_B_DQ12
16
M_B_DQ11
17
M_B_DQ14
28
M_B_DQ5
29
M_B_DQ1
41
M_B_DQ6
42
M_B_DQ7
24
M_B_DQ4
25
M_B_DQ0
38
M_B_DQ2
37
M_B_DQ3
50
M_B_DQ17
49
M_B_DQ21
62
M_B_DQ23
63
M_B_DQ19
46
M_B_DQ16
45
M_B_DQ20
58
M_B_DQ22
59
M_B_DQ18
70
M_B_DQ28
71
M_B_DQ25
83
M_B_DQ26
84
M_B_DQ27
66
M_B_DQ29
67
M_B_DQ24
79
M_B_DQ30
80
M_B_DQ31
174
M_B_DQ37
173
M_B_DQ32
187
M_B_DQ39
186
M_B_DQ34
170
M_B_DQ36
169
M_B_DQ33
183
M_B_DQ38
182
M_B_DQ35
195
M_B_DQ44
194
M_B_DQ45
207
M_B_DQ42
208
M_B_DQ47
191
M_B_DQ41
190
M_B_DQ40
203
M_B_DQ43
204
M_B_DQ46
216
M_B_DQ49
215
M_B_DQ53
228
M_B_DQ54
229
M_B_DQ50
211
M_B_DQ52
212
M_B_DQ48
224
M_B_DQ51
225
M_B_DQ55
237
M_B_DQ56
236
M_B_DQ60
249
M_B_DQ58
250
M_B_DQ62
232
M_B_DQ61
233
M_B_DQ57
245
M_B_DQ59
246
M_B_DQ63
13
M_B_DQS1
34
M_B_DQS0
55
M_B_DQS2
76
M_B_DQS3
179
M_B_DQS4
200
M_B_DQS5
221
M_B_DQS6
242
M_B_DQS7
97
M_B_DQS8
11
M_B_DQS#1
32
M_B_DQS#0
53
M_B_DQS#2
74
M_B_DQS#3
177
M_B_DQS#4
198
M_B_DQS#5
219
M_B_DQS#6
240
M_B_DQS#7
95
M_B_DQS#8
M_B_DQ[63:0] (3)
8-15
0-7
16-23
24-31
32-39
40-47
48-55
56-63
M_B_DQS[7:0] (3)
M_B_DQS#[7:0] (3)
M_B_DQS8
M_B_DQS#8
R277
240/F_4
R278
240/F_4
+1.2VSUS
2250mA
+1.2VSUS
+1.2VSUS
JDIM1B
111
VDD1
112
VDD2
117
VDD3
118
VDD4
123
VDD5
124
VDD6
129
VDD7
130
VDD8
135
VDD9
136
VDD10
141
VDD11
142
VDD12
147
VDD13
148
VDD14
153
VDD15
154
VDD16
159
VDD17
160
VDD18
163
VDD19
1
VSS1
5
VSS2
9
VSS3
15
VSS4
19
VSS5
23
VSS6
27
VSS7
31
VSS8
35
VSS9
39
VSS10
43
VSS11
47
VSS12
51
VSS13
57
VSS14
61
VSS15
65
VSS16
69
VSS17
73
VSS18
77
VSS19
81
VSS20
85
VSS21
89
VSS22
93
VSS23
99
VSS24
103
VSS25
107
VSS26
167
VSS27
171
VSS28
175
VSS29
181
VSS30
185
VSS31
189
VSS32
193
VSS33
197
VSS34
201
VSS35
205
VSS36
209
VSS37
213
VSS38
217
VSS39
223
VSS40
227
VSS41
231
VSS42
235
VSS43
239
VSS44
243
VSS45
247
VSS46
251
VSS47
12/21 Change JDIM1 footprint to "ddr4-d4ar0-26001-1p52-rvs-smt " for SMT requset
C395 2.2U/6.3V/X7R_6
C401 0.1U/25V_4
255
257
259
258
164
VREF_CA_DIMM1
2
6
10
14
18
22
26
30
36
40
44
48
52
56
60
64
68
72
78
82
86
90
94
98
102
106
168
172
176
180
184
188
192
196
202
206
210
214
218
222
226
230
234
238
244
248
252
261
262
R276 *0_4
R281 *short/0_4
0.5A
600mA
VDDSPD
VPP1
VPP2
VTT
VREF_CA
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
(260P)
DDR4 SODIMM 260 PIN
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
GND
GND
+2.5V
+3V
+2.5V_SUS
12/4 Change for +3.3V to +3V
+VDDQ_VTT
+3V(2,4,6,7,8,9,11,13,15,19,20,21,22,23,24,25,26,27,28,30,31,32,33,34,37,38,39)
+1.2VSUS(3,5,11,33)
+VDDQ_VTT(11,33)
D
C
B

For EMI RESERVE
+1.2VSUS
EC1 *120P/50V_4
EC8 *120P/50V_4
EC2 *120P/50V_4
EC3 120P/50V_4
EC4 *120P/50V_4
EC5 *120P/50V_4
EC6 *120P/50V_4
5
+VDDQ_VTT
EC7 *120P/50V_4
EC14 *120P/50V_4
A
+1.2VSUS
EC16 *120P/50V_4
EC10 *120P/50V_4
EC12 *120P/50V_4
EC9 *0.1U/16V_4
EC11 *0.1U/16V_4
EC15 *0.1U/16V_4
EC13 *0.1U/16V_4
4
1uF/10uF 4pcs on each side of connector
+1.2VSUS
Place these Caps near So-Dimm0.
C380 1U/6.3V_4
C448 1U/6.3V_4
C458 1U/6.3V_4
C454 1U/6.3V_4
C457 1U/6.3V_4
C456 1U/6.3V_4
C436 1U/6.3V_4
C432 1U/6.3V_4
C469 10U/6.3V_6
C437 10U/6.3V_6
C470 10U/6.3V_6
C468 10U/6.3V_6
C439 10U/6.3V_6
C463 10U/6.3V_6
C462 10U/6.3V_6
C440 10U/6.3V_6
+VDDQ_VTT
VREF_CA_DIMM1
+2.5V_SUS
+3V
C471 1U/6.3V_4
C453 1U/6.3V_4
C459 1U/6.3V_4
C467 1U/6.3V_4
C424 1U/6.3V_4
C411 0.1U/16V_4
C413 2.2U/6.3V_6
C434 0.1U/16V_4
C430 2.2U/6.3V_6
C428 0.1U/16V_4
C431 2.2U/6.3V_6
3
VREF DQ1 M1 Solution
+VREFDQ_SB_M3
+VREFDQ_SB_M3
2
R298 2/F_6
1
C419
0.022U/25V_4
2
R299
24.9/F_4
+1.2VSUS
R286 1K/F_4
VREF_CA_DIMM1
R297 1K/F_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Monday, February 22, 2016
Date: Sheet
Monday, February 22, 2016
Date: Sheet
Monday, February 22, 2016
Date: Sheet
R296*0_4
+VDDQ
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
DDR4 DIMM-STD(5.2H) CHB
DDR4 DIMM-STD(5.2H) CHB
DDR4 DIMM-STD(5.2H) CHB
ZRW
ZRW
ZRW
1
of
12 46
of
12 46
of
12 46
A
1A
1A
1A
+3V_GFX
Z8V
Z8V
Z8V
8

R1471 *EV@10K_4
PEGX_RST#
R1469 EV@100K_4
13 46
13 46
13 46
8
A
B
C
D
1A
1A
1A
of
of
of
6
3V MAIN POWER
+3V_GFX
3/11 GC6 timing issue from 200K change to 100K
R1140 EV@10K_4
R1145 *EV@10K_4
3
2
1
2
1
C1630
EV@1000p/50V_4
R1148 EV@100K_4
Q1017 EV@2N7002K
+3V
5
3
GC6 FBVDDQ_EN
GC6_FB_EN(4,16)
GPU_PWR_GD(38)
6
SYS_PEX_RST_MON#(16)
C1621 EV@0.1U/16V_4X
4
RST_MON#
U1032 EV@74AHC1G09GW
GPU_PEX_RST_HOLD#(16)
RST_MON#
GC6_FB_EN
C1294 EV@0.022U/25V_4
2
C1311 EV@0.022U/25V_4
1A-7
R1470
GC6@BAT54CW_200MA
2
Q1011
5
GC6:+3V_MAIN
GC6 Power control
+3V_MAIN_EN(16)
GC6 PEGX_RST#
+1.05V_GFX
B2A
PLACE NEAR GPU
PLACE NEAR GPU
PLACE UNDER GPU BALLS
3
5
+3V_GFX
already PU@P.17
PLTRST#(8,22,24,25,28)
DGPU_HOLD_RST#(4)
CLK_PEGA_REQ# (6)
AG19
AG21
AG22
AG24
AH21
AH25
AG13
AG15
AG16
AG18
AG25
AH15
AH18
AH26
AH27
AJ27
AK27
AL27
AM28
AN28
AJ28
AL11
AC6
AJ4
AJ5
C15
D19
D20
D23
D26
H31
T8
V32
Y1
Y2
Y3
AA1
AA2
AA3
AA4
AA5
AA6
AA7
AA8
J8
K8
L8
M8
2
U1030A N15P-GT
PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4
PEX_IOVDD_5
PEX_IOVDD_6
PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8
PEX_IOVDDQ_9
PEX_IOVDDQ_10
PEX_IOVDDQ_11
PEX_IOVDDQ_12
PEX_IOVDDQ_13
PEX_IOVDDQ_14
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24
3V3_AON_1
3V3_AON_2
3V3_MAIN_1
3V3_MAIN_2
2
[PEG Interface]
PEX_TSTCLK_OUT_N
1
&)*(
To be placed no further from the GPU than bewteen the PS and GPU
A
B
C
D
+1.05V_GFX
C1175 EV@22U/6.3V_6X
C1139 EV@22U/6.3V_6X
C1143 EV@22U/6.3V_6X
C1140 EV@22U/6.3V_6X
C1138 EV@10U/6.3V_6X
C1104 EV@10U/6.3V_6X
C1102 EV@10U/6.3V_6X
C1103 EV@10U/6.3V_6X
PLACE NEAR BALLS
C1159 EV@1U/6.3V_4X
C1182 EV@1U/6.3V_4X
C1165 EV@1U/6.3V_4X
C1077 EV@1U/6.3V_4X
PLACE UNDER BGA
C1097 EV@4.7U/10V_6X
C1126 EV@4.7U/10V_6X
PLACE CLOSE TO BGA
C1343 EV@4.7U/6.3V_4X
C1210 EV@1U/6.3V_4X
C1209 EV@0.1u/16V_4
C1183 *EV@0.1U/16V_4X
C1188 *EV@0.1U/16V_4X
PLACE CLOSE TO GPU BALLS
+3V_GFX
+3V_MAIN
1
(
PLACE CLOSE TO BGA
C1344 EV@4.7U/6.3V_4X
C1200 EV@1U/6.3V_4X
PLACE CLOSE TO GPU BALLS
C1201 EV@0.1u/16V_4
C1302 EV@0.1u/16V_4
PEX_RX0
PEX_RX0_N
PEX_RX1
PEX_RX1_N
PEX_RX2
PEX_RX2_N
PEX_RX3
PEX_RX3_N
PEX_RX4
PEX_RX4_N
PEX_RX5
PEX_RX5_N
PEX_RX6
PEX_RX6_N
PEX_RX7
PEX_RX7_N
PEX_RX8
PEX_RX8_N
PEX_RX9
PEX_RX9_N
PEX_RX10
PEX_RX10_N
PEX_RX11
PEX_RX11_N
PEX_RX12
PEX_RX12_N
PEX_RX13
PEX_RX13_N
PEX_RX14
PEX_RX14_N
PEX_RX15
PEX_RX15_N
PEX_TX0
PEX_TX0_N
PEX_TX1
PEX_TX1_N
PEX_TX2
PEX_TX2_N
PEX_TX3
PEX_TX3_N
PEX_TX4
PEX_TX4_N
PEX_TX5
PEX_TX5_N
PEX_TX6
PEX_TX6_N
PEX_TX7
PEX_TX7_N
PEX_TX8
PEX_TX8_N
PEX_TX9
PEX_TX9_N
PEX_TX10
PEX_TX10_N
PEX_TX11
PEX_TX11_N
PEX_TX12
PEX_TX12_N
PEX_TX13
PEX_TX13_N
PEX_TX14
PEX_TX14_N
PEX_TX15
PEX_TX15_N
PEX_REFCLK
PEX_REFCLK_N
PEX_TSTCLK_OUT
PEX_RST_N
PEX_CLKREQ_N
PEX_TERMP
TESTMODE
PEX_PLLVDD
PEX_PLL_HVDD
PEX_SVDD_3V3
3.3V_AUX_NC
VDD_SENSE
GND_SENSE
3
AN12
AM12
AN14
AM14
AP14
AP15
AN15
AM15
AN17
AM17
AP17
AP18
AN18
AM18
AN20
AM20
AP20
AP21
AN21
AM21
AN23
AM23
AP23
AP24
AN24
AM24
AN26
AM26
AP26
AP27
AN27
AM27
PEG_RXP0_C
PEG_RXN0_C
PEG_RXP1_C
PEG_RXN1_C
PEG_RXP2_C
PEG_RXN2_C
PEG_RXP3_C
PEG_RXN3_C
&'(
C1186 EV@0.22U/10V_4
C1179 EV@0.22U/10V_4
C1176 EV@0.22U/10V_4
C1167 EV@0.22U/10V_4
C1136 EV@0.22U/10V_4
C1118 EV@0.22U/10V_4
C1162 EV@0.22U/10V_4
C1152 EV@0.22U/10V_4
CLK_PCIE_VGA (6)
CLK_PCIE_VGA# (6)
R1063 *EV@200/F_4
R1092 EV@10K_4
R1056 EV@2.49K/F_4
R1462 EV@10K_4
&##(
PLACE NEAR BGA
VGA_VCCSENSE (38)
VGA_VSSSENSE (38)
AK14
AJ14
AH14
AG14
AK15
AJ15
AL16
AK16
AK17
AJ17
AH17
AG17
AK18
AJ18
AL19
AK19
AK20
AJ20
AH20
AG20
AK21
AJ21
AL22
AK22
AK23
AJ23
AH23
AG23
AK24
AJ24
AL25
AK25
AL13
AK13
AJ26
PEX_TSTCLK
AK26
PEX_TSTCLK#
AJ11
NC
AJ12
PEGX_RST#
AK12
PEX_CLKREQ#
AP29
PEX_TERMP
AK11
TESTMODE
AG26
PEX_PLLVDD
AH12
AG12
P8
3.3V_AUX
L4
L5
3
PEG_TX0 (6)
PEG_TX#0 (6)
PEG_TX1 (6)
PEG_TX#1 (6)
PEG_TX2 (6)
PEG_TX#2 (6)
PEG_TX3 (6)
PEG_TX#3 (6)
C1339EV@0.1u/16V_4
C1203EV@4.7U/6.3V_4X
C1303EV@4.7U/6.3V_4X
TP1016
4
PEGX_RST# (16)
4
+3V_GFX
+3V_GFX
PEG_RX0 (6)
PEG_RX#0 (6)
PEG_RX1 (6)
PEG_RX#1 (6)
PEG_RX2 (6)
PEG_RX#2 (6)
PEG_RX3 (6)
PEG_RX#3 (6)
R1397 EV@0_6
C1575 EV@4.7U/6.3V_4X
C1574 EV@1U/6.3V_4X
C1076 EV@0.1u/16V_4
PEX_CLKREQ#
EV@2N7002KW_115MA
+3V_MAIN
1
7
+3V_GFX
1
Q1023 EV@AO3413
3
*EV@0_4
1
2
D1015
+3V_MAIN
+3V
C1613 EV@0.1U/16V_4X
5
2
1
PEGX_RST#
3
1
R1444 EV@100K_4
2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Monday, February 22, 2016
Monday, February 22, 2016
Date: Sheet
Monday, February 22, 2016
Date: Sheet
Date: Sheet
7
4
3
U1031 EV@MC74VHC1G08
FBVDDQ_EN (39)
C3A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
N16S-GT - 1/5 (PCIE)
N16S-GT - 1/5 (PCIE)
N16S-GT - 1/5 (PCIE)
A
FBA_DBI[7:0](18)
B
FBA_EDC[7:0](18)
PLACE CLOSE TO GPU BALLS
C
D
1
FBA_CMD0(18)
FBA_CMD1(18)
FBA_CMD2(18)
FBA_CMD3(18)
FBA_CMD4(18)
FBA_CMD5(18)
FBA_CMD6(18)
FBA_CMD7(18)
FBA_CMD8(18)
FBA_CMD9(18)
FBA_CMD10(18)
FBA_CMD11(18)
FBA_CMD12(18)
FBA_CMD13(18)
FBA_CMD14(18)
FBA_CMD15(18)
FBA_CMD16(18)
FBA_CMD17(18)
FBA_CMD18(18)
FBA_CMD19(18)
FBA_CMD20(18)
FBA_CMD21(18)
FBA_CMD22(18)
FBA_CMD23(18)
FBA_CMD24(18)
FBA_CMD25(18)
FBA_CMD26(18)
FBA_CMD27(18)
FBA_CMD28(18)
FBA_CMD29(18)
FBA_CMD30(18)
FBA_CMD31(18)
GDDR5 NO USE
+1.35V_GFX
C1065 EV@1U/10V_4X
C1061 EV@1U/10V_4X
C1116 EV@1U/10V_4X
C1107 EV@1U/10V_4X
C1088 EV@0.1U/16V_4X
C1193 EV@0.1U/16V_4X
C1199 EV@0.1U/16V_4X
C1174 EV@0.1U/16V_4X
PLACE CLOSE TO BGA
C1164 EV@4.7U/6.3V_4X
C1137 EV@4.7U/6.3V_4X
C1178 EV@4.7U/6.3V_4X
C1215 EV@4.7U/6.3V_4X
C1028 EV@10U/6.3V_6X
C1084 EV@10U/6.3V_6X
C1051 EV@22U/6.3V_6X
C1075 EV@22U/6.3V_6X
B2A
B2A
1
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31
FBA_DBI0
FBA_DBI1
FBA_DBI2
FBA_DBI3
FBA_DBI4
FBA_DBI5
FBA_DBI6
FBA_DBI7
FBA_EDC0
FBA_EDC1
FBA_EDC2
FBA_EDC3
FBA_EDC4
FBA_EDC5
FBA_EDC6
FBA_EDC7
AA31
AA29
AA28
AC34
AC33
AA32
AA33
W31
AA34
AD31
AL29
AM32
AF34
AE31
AK30
AN33
AF33
AF30
AK31
AM34
AF32
AA27
AA30
AB27
AB33
AC27
AD27
AE27
AF27
AG27
W27
W30
W33
M32
M31
G31
M33
M30
H30
M34
H10
H11
H12
H13
H14
H18
H19
H20
H21
H22
H23
H24
M27
N27
R27
H15
H16
U30
T31
U29
R34
R33
U32
U33
U28
V28
V29
V30
U34
U31
V34
V33
Y32
Y28
Y29
Y30
Y31
Y34
Y33
V31
P30
F31
F34
E33
E34
B13
B19
E13
E19
H8
H9
L27
P27
T27
T30
T33
Y27
B16
E16
V27
2
U1030B N15P-GT
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
FBVDDQ_1
FBVDDQ_2
FBVDDQ_3
FBVDDQ_4
FBVDDQ_5
FBVDDQ_6
FBVDDQ_7
FBVDDQ_8
FBVDDQ_9
FBVDDQ_10
FBVDDQ_12
FBVDDQ_13
FBVDDQ_15
FBVDDQ_16
FBVDDQ_17
FBVDDQ_18
FBVDDQ_19
FBVDDQ_20
FBVDDQ_23
FBVDDQ_24
FBVDDQ_25
FBVDDQ_26
FBVDDQ_27
FBVDDQ_28
FBVDDQ_29
FBVDDQ_30
FBVDDQ_31
FBVDDQ_32
FBVDDQ_33
FBVDDQ_34
FBVDDQ_35
FBVDDQ_36
FBVDDQ_37
FBVDDQ_38
FBVDDQ_39
FBVDDQ_44
FBVDDQ_AON_1
FBVDDQ_AON_2
FBVDDQ_AON_3
FBVDDQ_AON_4
FBVDDQ_AON_5
FBVDDQ_AON_6
FBVDDQ_AON_7
FBVDDQ_AON_8
2
[MEMORY I/F A]
FB_VDDQ_SENSE
FB_GND_SENSE
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CALTERM_GND
FBA_D00
FBA_D01
FBA_D02
FBA_D03
FBA_D04
FBA_D05
FBA_D06
FBA_D07
FBA_D08
FBA_D09
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
FBA_CLK0
FBA_CLK0_N
FBA_CLK1
FBA_CLK1_N
FBA_CMD32
FBA_CMD33
FBA_CMD34
FBA_CMD35
FB_VREF
FBA_WCK01
FBA_WCK01_N
FBA_WCK23
FBA_WCK23_N
FBA_WCK45
FBA_WCK45_N
FBA_WCK67
FBA_WCK67_N
FB_CLAMP
FB_DLL_AVDD
FBA_PLL_AVDD
NC
NC
NC
NC
NC
NC
NC
NC
3
L28
M29
L29
M28
N31
P29
R29
P28
J28
H29
J29
H28
G29
E31
E32
F30
C34
D32
B33
C33
F33
F32
H33
H32
P34
P32
P31
P33
L31
L34
L32
L33
AG28
AF29
AG29
AF28
AD30
AD29
AC29
AD28
AJ29
AK29
AJ30
AK28
AM29
AM31
AN29
AM30
AN31
AN32
AP30
AP32
AM33
AL31
AK33
AK32
AD34
AD32
AC30
AD33
AF31
AG34
AG32
AG33
R30
R31
AB31
AC31
R28
FBA_DEBUG0_K
AC28
FBA_DEBUG1_K
R32
FBA_DEBUG0
AC32
FBA_DEBUG1
H26
K31
L30
H34
J34
AG30
AG31
AJ34
AK34
J30
J31
J32
J33
AH31
AJ31
AJ32
AJ33
E1
PS_FB_CLAMP
K27
U27
F1
FBVDDQ_SENSE
F2
FB_GND_SENSE
J27
FB_CAL_PD_VDDQ
H27
FB_CAL_PU_GND
H25
FB_CAL_TERM_GND
3
VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
VMA_DQ4
VMA_DQ5
VMA_DQ6
VMA_DQ7
VMA_DQ8
VMA_DQ9
VMA_DQ10
VMA_DQ11
VMA_DQ12
VMA_DQ13
VMA_DQ14
VMA_DQ15
VMA_DQ16
VMA_DQ17
VMA_DQ18
VMA_DQ19
VMA_DQ20
VMA_DQ21
VMA_DQ22
VMA_DQ23
VMA_DQ24
VMA_DQ25
VMA_DQ26
VMA_DQ27
VMA_DQ28
VMA_DQ29
VMA_DQ30
VMA_DQ31
VMA_DQ32
VMA_DQ33
VMA_DQ34
VMA_DQ35
VMA_DQ36
VMA_DQ37
VMA_DQ38
VMA_DQ39
VMA_DQ40
VMA_DQ41
VMA_DQ42
VMA_DQ43
VMA_DQ44
VMA_DQ45
VMA_DQ46
VMA_DQ47
VMA_DQ48
VMA_DQ49
VMA_DQ50
VMA_DQ51
VMA_DQ52
VMA_DQ53
VMA_DQ54
VMA_DQ55
VMA_DQ56
VMA_DQ57
VMA_DQ58
VMA_DQ59
VMA_DQ60
VMA_DQ61
VMA_DQ62
VMA_DQ63
VMA_DQ0 (18)
VMA_DQ1 (18)
VMA_DQ2 (18)
VMA_DQ3 (18)
VMA_DQ4 (18)
VMA_DQ5 (18)
VMA_DQ6 (18)
VMA_DQ7 (18)
VMA_DQ8 (18)
VMA_DQ9 (18)
VMA_DQ10 (18)
VMA_DQ11 (18)
VMA_DQ12 (18)
VMA_DQ13 (18)
VMA_DQ14 (18)
VMA_DQ15 (18)
VMA_DQ16 (18)
VMA_DQ17 (18)
VMA_DQ18 (18)
VMA_DQ19 (18)
VMA_DQ20 (18)
VMA_DQ21 (18)
VMA_DQ22 (18)
VMA_DQ23 (18)
VMA_DQ24 (18)
VMA_DQ25 (18)
VMA_DQ26 (18)
VMA_DQ27 (18)
VMA_DQ28 (18)
VMA_DQ29 (18)
VMA_DQ30 (18)
VMA_DQ31 (18)
VMA_DQ32 (18)
VMA_DQ33 (18)
VMA_DQ34 (18)
VMA_DQ35 (18)
VMA_DQ36 (18)
VMA_DQ37 (18)
VMA_DQ38 (18)
VMA_DQ39 (18)
VMA_DQ40 (18)
VMA_DQ41 (18)
VMA_DQ42 (18)
VMA_DQ43 (18)
VMA_DQ44 (18)
VMA_DQ45 (18)
VMA_DQ46 (18)
VMA_DQ47 (18)
VMA_DQ48 (18)
VMA_DQ49 (18)
VMA_DQ50 (18)
VMA_DQ51 (18)
VMA_DQ52 (18)
VMA_DQ53 (18)
VMA_DQ54 (18)
VMA_DQ55 (18)
VMA_DQ56 (18)
VMA_DQ57 (18)
VMA_DQ58 (18)
VMA_DQ59 (18)
VMA_DQ60 (18)
VMA_DQ61 (18)
VMA_DQ62 (18)
VMA_DQ63 (18)
VMA_CLK0 (18)
VMA_CLK0# (18)
VMA_CLK1 (18)
VMA_CLK1# (18)
R1059*EV@60.4/F_4
R1055*EV@60.4/F_4
VMA_WCK01 (18)
VMA_WCK01# (18)
VMA_WCK23 (18)
VMA_WCK23# (18)
VMA_WCK45 (18)
VMA_WCK45# (18)
VMA_WCK67 (18)
VMA_WCK67# (18)
R1512 EV@10K_4
FB_PLLAVDD
+,##(
+1.35V_GFX
R1502 *EV@0_4
R1501 *EV@0_4
R1058 EV@40.2/F_4
R1057 EV@40.2/F_4
R1064 EV@60.4/F_4
PLACE CLOSE TO GPU BALLS
4
TP1003
TP1004
+1.35V_GFX
C1078 EV@0.1U/16V_4X
C1085 EV@0.1U/16V_4X
C1086 EV@22U/6.3V_6X
+1.35V_GFX
4
B2A
5
+1.05V_GFX
L1001EV@HCB1005KF-330T30
C574 close to K27 (under GPU) C575 close to U27 (under GPU)
C576 near to GPU
5
U1030C N15P-GT
D13
E14
F14
A12
B12
C14
B14
G15
F15
E15
D15
A14
D14
A15
B15
C17
D18
E18
F18
A20
B20
C18
B18
G18
G17
F17
D16
A18
D17
A17
B17
E17
E11
E3
A3
C9
F23
F27
C30
A24
D10
D5
C3
B9
E23
E28
B30
A23
D9
E4
B2
A9
D22
D28
A30
B23
FBB_CMD0
FBB_CMD1
FBC_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBC_CMD7
FBB_CMD8
FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBB_CMD29
FBC_CMD30
FBC_CMD31
FBC_DQM0
FBC_DQM1
FBC_DQM2
FBC_DQM3
FBC_DQM4
FBC_DQM5
FBC_DQM6
FBC_DQM7
FBC_DQS_WP0
FBC_DQS_WP1
FBC_DQS_WP2
FBC_DQS_WP3
FBC_DQS_WP4
FBC_DQS_WP5
FBC_DQS_WP6
FBC_DQS_WP7
FBC_DQS_RN0
FBC_DQS_RN1
FBC_DQS_RN2
FBC_DQS_RN3
FBC_DQS_RN4
FBC_DQS_RN5
FBC_DQS_RN6
FBC_DQS_RN7
6
MEMORY I/F C
6
FBC_D00
FBC_D01
FBC_D02
FBC_D03
FBC_D04
FBC_D05
FBC_D06
FBC_D07
FBC_D08
FBC_D09
FBC_D10
FBC_D11
FBC_D12
FBC_D13
FBC_D14
FBC_D15
FBC_D16
FBC_D17
FBC_D18
FBC_D19
FBC_D20
FBC_D21
FBC_D22
FBC_D23
FBC_D24
FBC_D25
FBC_D26
FBC_D27
FBC_D28
FBC_D29
FBC_D30
FBC_D31
FBC_D32
FBC_D33
FBC_D34
FBC_D35
FBC_D36
FBC_D37
FBC_D38
FBC_D39
FBC_D40
FBC_D41
FBC_D42
FBC_D43
FBC_D44
FBC_D45
FBC_D46
FBC_D47
FBC_D48
FBC_D49
FBC_D50
FBC_D51
FBC_D52
FBC_D53
FBC_D54
FBC_D55
FBC_D56
FBC_D57
FBC_D58
FBC_D59
FBC_D60
FBC_D61
FBC_D62
FBC_D63
FBC_CLK0
FBC_CLK0_N
FBC_CLK1
FBC_CLK1_N
FBB_CMD32
FBB_CMD33
FBB_CMD34
FBB_CMD35
FBB_WCK01
FBB_WCK01_N
FBB_WCK23
FBB_WCK23_N
FBB_WCK45
FBB_WCK45_N
FBB_WCK67
FBB_WCK67_N
FBB_PLL_AVDD
7
G9
E9
G8
F9
F11
G11
F12
G12
G6
F5
E6
F6
F4
G4
E2
F3
C2
D4
D3
C1
B3
C4
B5
C5
A11
C11
D11
B11
D8
A8
C8
B8
F24
G23
E24
G24
D21
E21
G21
F21
G27
D27
G26
E27
E29
F29
E30
D30
A32
C31
C32
B32
D29
A29
C29
B29
B21
C23
A21
C21
B24
C24
B26
C26
D12
E12
E20
F20
G14
FBB_DEBUG0_K
G20
FBB_DEBUG1_K
C12
FBB_DEBUG0
C20
FBB_DEBUG1
F8
E8
A5
A6
D24
D25
WCK only for GDDR5
B27
C27
D6
NC
D7
NC
C6
NC
B6
NC
F26
NC
E26
NC
A26
NC
A27
NC
H17
FB_PLLAVDD
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Monday, February 22, 2016
Monday, February 22, 2016
Date: Sheet
Monday, February 22, 2016
Date: Sheet
Date: Sheet
7
R1087 *EV@60.4/F_4
R1069 *EV@60.4/F_4
C262 close to H27 (under GPU)
B2A
C1157 EV@0.1U/16V_4X
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
N16S-GT - 2/5 (Memory)
N16S-GT - 2/5 (Memory)
N16S-GT - 2/5 (Memory)
8
Z8V
Z8V
Z8V
14 45
14 45
14 45
8
TP1009
TP1008
+1.35V_GFX

of
of
of
A
B
C
D
1A
1A
1A
A
B
C
D
+1.05V_GFX
+1.05V_GFX
1
2
PLACE CLOSE TO GPU PLACE CLOSE TO BALLS
L1006 EV@HCB1005KF-330T30
C1253
EV@22U/6.3V_6X
NV_PLLVDD
B2A
PLLVDD
##(
C5092 Close to AE8
L1005 EV@HCB1005KF_1.5A
EV@22U/6.3V_6X
1
C1242
C1204
EV@4.7U/6.3V_4X
C5090 Close to AD7
C1214 EV@0.1U/16V_4X
2
AG10
C1213 EV@0.1U/16V_4X
B2A
C1231 EV@0.1U/16V_4X
AH8
AG8
AG9
AF7
AG7
AF6
AG6
AF8
AN2
AB8
AC7
AC8
AD6
AP9
AP8
AD8
AE8
AD7
AJ8
3
U1030D N15P-GT
IFPAB_PLLVDD
IFPA_IOVDD
IFPB_IOVDD
IFPAB_RSET
IFPC_PLLVDD
IFPD_PLLVDD
IFPC_IOVDD
IFPD_IOVDD
IFPC_RSET
NC
IFPEF_PLLVDD
IFPE_IOVDD
IFPF_IOVDD
IFPEF_RSET
DACA_VDD
DACA_VREF
DACA_RSET
PLLVDD
SP_PLLVDD
VID_PLLVDD
3
[IFPA/B_LVDS]
[IFPC/D_TMDS]
[IFPE/F_DP]
[DACA/B_CRT]
[XTAL IN]
4
IFPA_TXC
IFPA_TXC_N
IFPA_TXD0
IFPA_TXD0_N
IFPA_TXD1
IFPA_TXD1_N
IFPA_TXD2
IFPA_TXD2_N
IFPA_TXD3
IFPA_TXD3_N
IFPB_TXC
IFPB_TXC_N
IFPB_TXD4
IFPB_TXD4_N
IFPB_TXD5
IFPB_TXD5_N
IFPB_TXD6
IFPB_TXD6_N
IFPB_TXD7
IFPB_TXD7_N
IFPC_AUX_I2CW_SCL
IFPC_AUX_I2CW_SDA_N
IFPD_AUX_I2CX_SDA_N
IFPE_AUX_I2CY_SDA_N
IFPF_AUX_I2CZ_SDA_N
IFPC_L0
IFPC_L0_N
IFPC_L1
IFPC_L1_N
IFPC_L2
IFPC_L2_N
IFPC_L3
IFPC_L3_N
IFPD_AUX_I2CX_SCL
IFPD_L0
IFPD_L0_N
IFPD_L1
IFPD_L1_N
IFPD_L2
IFPD_L2_N
IFPD_L3
IFPD_L3_N
IFPE_AUX_I2CY_SCL
IFPE_L0
IFPE_L0_N
IFPE_L1
IFPE_L1_N
IFPE_L2
IFPE_L2_N
IFPE_L3
IFPE_L3_N
IFPF_AUX_I2CZ_SCL
IFPF_L0
IFPF_L0_N
IFPF_L1
IFPF_L1_N
IFPF_L2
IFPF_L2_N
IFPF_L3
IFPF_L3_N
DACA_RED
DACA_GREEN
DACA_BLUE
DACA_HSYNC
DACA_VSYNC
I2CA_SCL
I2CA_SDA
XTAL_IN
XTAL_OUT
XTAL_OUTBUFF
XTAL_SSIN
4
AM6
AN6
AP3
AN3
AN5
AM5
AL6
3V_MAIN_PWGD
AK6
AJ6
AH6
AJ9
AH9
AP6
AP5
AM7
AL7
AN8
AM8
AK8
AL8
+3V_MAIN
AG3
AG2
AK1
AJ1
AJ3
AJ2
AH3
AH4
AG5
AG4
AK3
AK2
AM1
AM2
AM3
AM4
AL3
AL4
AK4
AK5
AB3
AB4
AD2
AD3
AD1
AC1
AC2
AC3
AC4
AC5
AF3
AF2
AE3
AE4
AF4
AF5
AD4
AD5
AG1
AF1
AK9
AL10
AL9
AM9
AN9
R4
R5
I2CA_SCL
I2CA_SDA
HWPG_1.35VGFX(39)
Reserve
XTAL_OUTBUFF
H3
XTAL27_IN
H2
XTAL27_OUT
J4
XTAL_OUTBUFF
H1
XTAL_SSIN
5
R1121 EV@4.7K_4
R1499EV@1.8K/F_4
R1129EV@1.8K/F_4
R1146 *EV@10K_4
R1147 EV@10K_4
R1523 EV@10K_4
5
R1184 EV@1.5K/F_4
3
Q1026
1
EV@DTC144EU
7
3V_MAIN_PWGD
R1182 *100K/F_4
3V_MAIN_PWGD (38,39)
+1.05V_GFX and GPU core power EN
C1245 *1000p/50V_4
2
6
3
Q1019
1
EV@MMBT3904-7-F
+3V
R1192 EV@4.7K_4
C1347 EV@1000p/50V_4
+3V_GFX
2
2/16 Reserve R1539 for DGPU_PWROK doesn't have any sequence requirement
R1539 *0_4
+3V_GFX
R1082 EV@4.7K_4
DGPU_POK2
C1187 *1000P/50V_4
2
DGPU_PGOK-1
3
Q1010 EV@METR3904-G
1
+3V
R1088 EV@4.7K_4
2
C1181 EV@1000P/50V_4
R1105 EV@4.7K_4
3
Q1012
EV@DTC144EUA
1
R1098 EV@100K/F_4
BG627000039 -> HHE(1st)
+3V_GFX
XTAL27_IN
XTAL27_OUT
Y1004
3
4
EV@27MHZ_10
C1637 EV@10P/50V_4C
BG627000035 -> TXC(2nd)
2
1
C1638 EV@10P/50V_4C
B2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Monday, February 22, 2016
Monday, February 22, 2016
Date: Sheet
Monday, February 22, 2016
Date: Sheet
Date: Sheet
6
7
PROJECT :
N16S-GT - 3/5 (Display)
N16S-GT - 3/5 (Display)
N16S-GT - 3/5 (Display)
Z8V
Z8V
Z8V
15 45
15 45
15 45
8

DGPU_PW ROK (4)
of
of
of
8
A
B
C
D
1A
1A
1A
1
2
3
4
5
6
7
8
Resistor P/N
4.99K---> CS24992FB26 10K ---> CS31002FB26 15K ---> CS31502FB24 20K ---> CS32002FB29
24.9K --->CS32492FB16
30.1K --->CS33012FB18
34.8K---> CS33482FB22
45.3K ---> CS34532FB18 GM
49.9K ---> CS34992FB10 GT
A
+3V_GFX
R1494 EV@10K_4
R1500 EV@10K_4
R1188 EV@10K_4
R1518 EV@10K_4
R1152 EV@10K_4
R1492 EV@10K_4
R1171 EV@10K_4
R1521 *EV@10K_4
R1149 EV@10K_4
R1507 EV@10K_4
R1196 EV@10K_4
Reserve PU/PD for Debug
B
+3V_MAIN
R1451 *EV@10K_4
R1443 *EV@10K_4
R1466 *EV@10K_4
R1458 EV@10K_4
TP1087
TP1085
TP1084
TP1082
TP1086
R1517 EV@1.8K/F_4
R1116 EV@1.8K/F_4
R1516 EV@1.8K/F_4
R1498 EV@1.8K/F_4
C
+3V_GFX
R1514 *EV@10K_4
D
GPU_THROTTING#(29)
1
GPU_OVT#
GPU_ALERT
GPU_EVENT#_D
GPIO12_ACIN
+3V_MAIN_EN
SYS_PEX_RST_MON#
GPU_PEX_RST_HOLD#
GPIO10_VREF
DGPU_PSI
GPIO10_VREF
GC6_FB_EN_R
JTAG_TMS
JTAG_TDI
JTAG_TCK
JTAG_TRST#
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST#
I2CB_SCL
I2CB_SDA
I2CC_SCL
I2CC_SDA
GFX_SCL
GFX_SDA
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
MULTISTRAP_REF_GND
R1493 EV@40.2K/F_4
GPU_OVT#
GPIO12_ACIN
R1158
*EV@0_4
GPIO12 AC detect AC high DC low
U1030E N15P-GT
AM10
JTAG_TCK
AP11
JTAG_TMS
AM11
JTAG_TDI
AP12
JTAG_TDO
AN11
JTAG_TRST_N
R7
I2CB_SCL
R6
I2CB_SDA
R2
I2CC_SCL
R3
I2CC_SDA
T4
I2CS_SCL
T3
I2CS_SDA
K4
THERMDN
K3
THERMDP
J2
STRAP0
J7
STRAP1
J6
STRAP2
J5
STRAP3
J3
STRAP4
J1
MULTISTRAP_REF_GND
2
6
1
Q1022A EV@ME2N7002DKW-G_115MA
+3V_GFX
5
4
3
Q1022B EV@ME2N7002DKW-G_115MA
2
[MIOA]
[MIOB]
[MISC_GPIO/I2C/JTAG/THER]
[MISC2_ROM]
PEGX_RST# (13)
dGPU_OTP#
dGPU_OTP# (28)
dGPU_OPP# (28)
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
ROM_SCLK
ROM_CS_N
ROM_SI
ROM_SO
BUFRST_N
OVERT
B2A
*EV@ME2N7002DKW-G_115MA
GC6_FB_EN_R
*EV@ME2N7002DKW-G_115MA
GPU_EVENT#_D
P6
GC6_FB_EN_R
M3
L6
P5
P7
L7
+3V_MAIN_EN
M7
GPU_EVENT#_D
N8
L3
SYS_PEX_RST_MON#
M2
GPU_ALERT
L1
GPIO10_VREF
M5
N3
GPIO12_ACIN
M4
DGPU_PSI
N4
P2
R8
M6
R1
P3
P4
P1
GPU_PEX_RST_HOLD#
H4
ROM_SCLK
H6
H5
ROM_SI
H7
ROM_SO
L2
GPU_BUFRST
M1
GPU_OVT#
3
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
+3V_GFX
Q1025A
2
1
R1191 EV@0_4
+3V_GFX
Q1025B
5
4
R1193 EV@0_4
TP1093
TP1022
TP1020
TP1013
TP1018
R1495 *EV@10K_4
+3V_GFX
R1162 EV@2.2K_4
GFX_SCL
GFX_SDA
STRAP0 DG : STUFF 50KΩ PU TO 3.3V_AON
2
R1515 EV@49.9K/F_4
1
R1496 *EV@4.99K/F_4
6
3
R1179
EV@2.2K_4
EV@ME2N7002DKW-G_115MA
R1103 *EV@45.3K/F_4
R1102 *EV@4.99K/F_4
+3V_MAIN_EN (13)
SYS_PEX_RST_MON# (13)
GPIO10_VREF (18)
PWM-VID (38)
DGPU_PSI (38)
GPU_PEX_RST_HOLD# (13)
4
1
Q1021
4
5
3
2
6
+3V_MAIN
R1111 *EV@15K/F_4
R1109 *EV@24.9K/F_4
GC6_FB_EN (4,13)
DGPU_EVENT# (4)
B2A
,-'.//01 
2ND_MBCLK (7,28)
2ND_MBDATA (7,28)
R1132 *EV@34.8K/F_4
R1131 *EV@4.99K/F_4
+3V_GFX
R1525 *EV@20K/F_4
R1519 *EV@45.3K/F_4
4.99K
24.9K
30.1K
34.8K
45.3K
10K 15K 20K
ROM_SI
ROM_SO
ROM_SCLK
PU +3V_MAIN
1010 0010
1100 1101
R1497 *EV@4.99K
R1513 EV@45.3k
00001000 00011001
00111011 0100 0101 01101110 01111111
+3V_MAIN
R1096 GT1@4.99K/F_4
R1139 *10K/F_4
N16S-GT1-KB 0x179C
R1095 GTR@4.99K/F_4
PD
R1138
4.99K/F_4
Mutil-level mode strapping:
For N16S-GT1-KB-A2 : R490=40.2k PD
1.ROM_SCLK =4.99K PD
2.ROM_SO = 4.99K PU (N16S-GTR = 4.99KPD)
3.ROM_SI= Memory strap setting
4.STRAP0 = 49.9k PU
5.Strap4~1 = Reserve Pull up and Pull down
N16S-GT1-KB-A2 N16S-GTR
ROM_SO
ROM_SI
R93 PU 4.99K R92 PD 4.99K
As below configuration table
N16S-GT1-KB-A2 VRAM Configuration Table:
4GbX2 GDDR5 128MBx32,2500MHz
0011 (0x3) 20K Pull down
(1GB)
4GbX4 GDDR5 256MBx16,2500MHz
0011 (0x3)
(2GB)
0110 (0x6) 0000 (0x8)
(2GB)
0001 (0x9)
8GbX4
0000 (0x8)
(4GB)
0001 (0x9)
DESCRIPTION
GDDR5 128MBx32,2500MHz0110 (0x6)
GDDR5 256MBx16,2500MHz GDDR5 256MBx32,2500MHz8GbX2
GDDR5 256MBx32,2500MHz
GDDR5 512MBx16,2500MHz GDDR5 512MBx16,2500MHz
SAMSUNG
K4G41325FC-HC03 --C die
HYNIX
H5GC4H24AJR-T2C --A die
SAMSUNG
K4G41325FC-HC03 --C die
HYNIX
H5GC4H24AJR-T2C --A die
SAMSUNG
K4G80325FB-HC03 --B die
MICRON
MT51J256M32HF-60:A--A die
SAMSUNG
K4G80325FB-HC03 --B die
MICRON
MT51J256M32HF-60:A--A die
N16S-GTR VRAM Configuration Table:
4GbX2 (1GB)
4GbX4 (2GB)
8GbX2 (2GB)
8GbX4 (4GB)
0011 (0x3) 0110 (0x6)
0011 (0x3) 0110 (0x6)
0000 (0x0) 0001 (0x1)
0000 (0x0) 0001 (0x1)
DESCRIPTION
GDDR5 128MBx32,2500MHz GDDR5 128MBx32,2500MHz
GDDR5 256MBx16,2500MHz GDDR5 256MBx16,2500MHz
GDDR5 256MBx32,2500MHz GDDR5 256MBx32,2500MHz
GDDR5 512MBx16,2500MHz GDDR5 512MBx16,2500MHz
Vendor Vendor P/NROM_SI SAMSUNG
K4G41325FC-HC03 --C die
HYNIX
H5GC4H24AJR-T2C --A die
SAMSUNG
K4G41325FC-HC03 --C die
HYNIX
H5GC4H24AJR-T2C --A die
SAMSUNG
K4G80325FB-HC03 --B die
MICRON
MT51J256M32HF-60:A--A die
SAMSUNG
K4G80325FB-HC03 --B die
MICRON
MT51J256M32HF-60:A--A die
N16S-GT1-KB-A2 (GB4b-128)
Logical
ROM_SCLK 0000
ROM_SI
ROM_SO
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
5
Strapping Bit3
RAMCFG[3]
DEVID_SEL
Strapping Bit2
SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSEDSOR3_EXPOSED RAMCFG[2]
PCIE_CFG
Keep footprint to PU to 3V3_AON and PD to GND [Stuff 49.9K PU]
Keep footprint to PU to 3V3_AON and PD to GND [Do Not Stuff
6
LogicalLogical
Strapping Bit1
RAMCFG[1]
SMB_ALT_ADDR
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
7
Strapping Bit0
RAMCFG[0] VGA_DEVICE
N16S-GT - 4/5 (MISC)
N16S-GT - 4/5 (MISC)
N16S-GT - 4/5 (MISC)
Monday, February 22, 2016
Monday, February 22, 2016
Monday, February 22, 2016

DevIDPackage
GB4b-128
0x134DN16S-GTR GB4b-128
STN P/NVendor Vendor P/NROM_SI
AKG5PGDT505 AKG5PWUTW21
AKG5PGDT505 AKG5PWUTW21
AKG5QGDT502 AKG5LGUTL04
AKG5QGDT502 AKG5LGUTL04
STN P/N
AKG5PGDT505 AKG5PWUTW21
AKG5PGDT505 AKG5PWUTW21
AKG5QGDT502 AKG5LGUTL04
AKG5QGDT502 AKG5LGUTL04
Logical
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ROM_SI
34.8K Pull down
20K Pull down
34.8K Pull down
4.99K Pull up 10K Pull up
4.99K Pull up 10K Pull up
ROM_SI 20K Pull down
34.8K Pull down
20K Pull down
34.8K Pull down
4.99K Pull down 10K Pull down
4.99K Pull down 10K Pull down
XXXX
0000
0001
Z8V
Z8V
Z8V
16 45
16 45
16 45
8
of
of
of
A
B
C
D
1A
1A
1A
A
B
C
D
)&
+VGPU_CORE
1
AA12
AA14
AA16
AA19
AA21
AA23
AB13
AB15
AB17
AB18
AB20
AB22
AC12
AC14
AC16
AC19
AC21
AC23
M12
M14
M16
M19
M21
M23
N13
N15
N17
N18
N20
N22
P12
P14
P16
P19
P21
P23
R13
R15
R17
R18
R20
R22
T12
T14
T16
T19
T21
T23
U13
U15
U17
U18
U20
U22
V13
V15
W12
W14
W16
W19
W21
W23
Y17
1
V17
V18
V20
V22
Y13
Y15
Y18
Y20
Y22
U1030F N15P-GT
VDD_001
VDD_002
VDD_003
VDD_004
VDD_005
VDD_006
VDD_007
VDD_008
VDD_009
VDD_010
VDD_011
VDD_012
VDD_013
VDD_014
VDD_015
VDD_016
VDD_017
VDD_018
VDD_019
VDD_020
VDD_021
VDD_022
VDD_023
VDD_024
VDD_025
VDD_026
VDD_027
VDD_028
VDD_029
VDD_030
VDD_031
VDD_032
VDD_033
VDD_034
VDD_035
VDD_036
VDD_037
VDD_038
VDD_039
VDD_040
VDD_041
VDD_042
VDD_043
VDD_044
VDD_045
VDD_046
VDD_047
VDD_048
VDD_049
VDD_050
VDD_051
VDD_052
VDD_053
VDD_054
VDD_055
VDD_056
VDD_057
VDD_058
VDD_059
VDD_060
VDD_061
VDD_062
VDD_063
VDD_064
VDD_065
VDD_066
VDD_067
VDD_068
VDD_069
VDD_070
VDD_071
VDD_072
[GPU VDD]
Z8V
Z8V
Z8V
17 45
17 45
17 45
8

of
of
of
8
A
B
C
D
1A
1A
1A
6
C1158 EV@1U/6.3V_4X
C1206 EV@1U/6.3V_4X
C1114 EV@1U/6.3V_4X
C1094 EV@1U/6.3V_4X
C1091 EV@1U/6.3V_4X
C1089 EV@1U/6.3V_4X
C1092 EV@1U/6.3V_4X
C1160 EV@1U/6.3V_4X
C1168 EV@4.7U/6.3V_6X
C1197 EV@4.7U/6.3V_6X
C1172 EV@4.7U/6.3V_6X
C1098 EV@4.7U/6.3V_6X
C1166 EV@4.7U/6.3V_6X
C1196 *EV@4.7U/6.3V_6X
C1112 EV@4.7U/6.3V_6X
C1267 EV@4.7U/6.3V_6X
C1099 EV@4.7U/6.3V_6X
C1180 *EV@4.7U/6.3V_6X
C1142 EV@4.7U/6.3V_6X
C1170 *EV@4.7U/6.3V_6X
C1205 *EV@4.7U/6.3V_6X
C1133 EV@4.7U/6.3V_6X
C1122 EV@4.7U/6.3V_6X
2
1
C1131 EV@22U/6.3V_6X
2
1
C1111 EV@22U/6.3V_6X
2
1
C1190 EV@22U/6.3V_6X
2
1
C1171 EV@22U/6.3V_6X
2
1
C1155 EV@22U/6.3V_6X
2
1
C1173 EV@22U/6.3V_6X
2
1
C1177 EV@22U/6.3V_6X
C1189 EV@4.7U/10V_6X
C1184 EV@4.7U/10V_6X
C1639 *EV@4.7U/10V_6X
C1277 EV@4.7U/10V_6X
C1185 EV@4.7U/10V_6X
C1641 330u/2V_7343
+
6
D2
D31
D33
E10
E22
E25
E5
E7
F28
F7
G10
G13
G16
G19
G2
G22
G25
G28
G3
G30
G32
G33
G5
G7
K2
K28
K30
K32
K33
K5
K7
M13
M15
M17
M18
M20
M22
N12
N14
N16
N19
N2
N21
N23
N28
N30
N32
N33
N5
N7
P13
P15
P17
P18
P20
P22
R12
R14
R16
R19
R21
R23
T13
T15
T17
T18
T2
T20
T22
AG11
T28
T32
T5
T7
U12
U14
U16
U19
U21
U23
V12
V14
V16
V19
V21
V23
W13
W15
W17
W18
W20
W22
W28
Y12
Y14
Y16
Y19
Y21
Y23
AH11
C16
W32
5
+VGPU_CORE
5
2
+VGPU_CORE
U1
XVDD_001
U2
XVDD_002
U3
XVDD_003
U4
XVDD_004
U5
XVDD_005
U6
XVDD_006
U7
XVDD_007
U8
XVDD_008
V1
XVDD_009
V2
XVDD_010
V3
XVDD_011
V4
XVDD_012
V5
XVDD_013
V6
XVDD_014
V7
XVDD_015
V8
XVDD_016
W2
XVDD_017
W3
XVDD_018
W4
XVDD_019
W5
XVDD_020
W7
XVDD_021
W8
XVDD_022
Y4
XVDD_026
Y5
XVDD_027
Y6
XVDD_028
Y7
XVDD_029
Y8
XVDD_030
2
3
U1030G N15P-GT
A2
GND_1
AA17
GND_2
AA18
GND_3
AA20
GND_4
AA22
GND_5
AB12
GND_6
AB14
GND_7
AB16
GND_8
AB19
GND_9
AB2
GND_10
AB21
GND_11
A33
GND_12
AB23
GND_13
AB28
GND_14
AB30
GND_15
AB32
GND_16
AB5
GND_17
AB7
GND_18
AC13
GND_19
AC15
GND_20
AC17
GND_21
AC18
GND_22
AA13
GND_23
AC20
GND_24
AC22
GND_25
AE2
GND_26
AE28
GND_27
AE30
GND_28
AE32
GND_29
AE33
GND_30
AE5
GND_31
AE7
GND_32
AH10
GND_33
AA15
GND_34
AH13
GND_35
AH16
GND_36
AH19
GND_37
AH2
GND_38
AH22
GND_39
AH24
GND_40
AH28
GND_41
AH29
GND_42
AH30
GND_43
AH32
GND_44
AH33
GND_45
AH5
GND_46
AH7
GND_47
AJ7
GND_48
AK10
GND_49
AK7
GND_50
AL12
GND_51
AL14
GND_52
AL15
GND_53
AL17
GND_54
AL18
GND_55
AL2
GND_56
AL20
GND_57
AL21
GND_58
AL23
GND_59
AL24
GND_60
AL26
GND_61
AL28
GND_62
AL30
GND_63
AL32
GND_64
AL33
GND_65
AL5
GND_66
AM13
GND_67
AM16
GND_68
AM19
GND_69
AM22
GND_70
AM25
GND_71
AN1
GND_72
AN10
GND_73
AN13
GND_74
AN16
GND_75
AN19
GND_76
AN22
GND_77
AN25
GND_78
AN30
GND_79
AN34
GND_80
AN4
GND_81
AN7
GND_82
AP2
GND_83
AP33
GND_84
B1
GND_85
B10
GND_86
B22
GND_87
B25
GND_88
B28
GND_89
B31
GND_90
B34
GND_91
B4
GND_92
B7
GND_93
C10
GND_94
C13
GND_95
C19
GND_96
C22
GND_97
C25
GND_98
C28
GND_99
C7
GND_100
3
4
[GPU GND]
4
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
GND_137
GND_138
GND_139
GND_140
GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
GND_154
GND_155
GND_156
GND_157
GND_158
GND_159
GND_160
GND_161
GND_162
GND_163
GND_164
GND_165
GND_166
GND_167
GND_168
GND_169
GND_170
GND_171
GND_172
GND_173
GND_174
GND_175
GND_176
GND_177
GND_178
GND_179
GND_180
GND_181
GND_182
GND_183
GND_184
GND_185
GND_186
GND_187
GND_188
GND_189
GND_190
GND_191
GND_192
GND_193
GND_194
GND_195
GND_196
GND_197
GND_198
GND_199
GND_200
GND_OPT_1
GND_OPT_2
7
PLACE UNDER GPU
B2A
B2A
B2A
PLACE NEAR GPU
B2A
B2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Monday, February 22, 2016
Monday, February 22, 2016
Date: Sheet
Monday, February 22, 2016
Date: Sheet
Date: Sheet
7
PROJECT :
N16S-GT - 5/5 (Power)
N16S-GT - 5/5 (Power)
N16S-GT - 5/5 (Power)
5
VDDQ-B1
VDDQ-B3
VDDQ-B12
VDDQ-B14
VDDQ-D1
VDDQ-D3
VDDQ-D12
VDDQ-D14
VDDQ-E5
VDDQ-E10
VDDQ-F1
VDDQ-F3
VDDQ-F12
VDDQ-F14
VDDQ-G2
VDDQ-G13
VDDQ-H3
VDDQ-H12
VDDQ-K3
VDDQ-K12
VDDQ-L2
VDDQ-L13
VDDQ-M1
VDDQ-M3
VDDQ-M12
VDDQ-M14
VDDQ-N5
VDDQ-N10
VDDQ-P1
VDDQ-P3
VDDQ-P12
VDDQ-P14
VDDQ-T1
VDDQ-T3
VDDQ-T12
VDDQ-T14
VDD-C5
VDD-C10
VDD-D11
VDD-G1
VDD-G4
VDD-G11
VDD-G14
VDD-L1
VDD-L4
VDD-L11
VDD-L14
VDD-P11
VDD-R5
VDD-R10
VSSQ-A1
VSSQ-A3
VSSQ-A12
VSSQ-A14
VSSQ-C1
VSSQ-C3
VSSQ-C4
VSSQ-C11
VSSQ-C12
VSSQ-C14
VSSQ-E1
VSSQ-E3
VSSQ-E12
VSSQ-E14
VSSQ-F5
VSSQ-F10
VSSQ-H2
VSSQ-H13
VSSQ-K2
VSSQ-K13
VSSQ-M5
VSSQ-M10
VSSQ-N1
VSSQ-N3
VSSQ-N12
VSSQ-N14
VSSQ-R1
VSSQ-R3
VSSQ-R4
VSSQ-R11
VSSQ-R12
VSSQ-R14
VSSQ-V1
VSSQ-V3
VSSQ-V12
VSSQ-V14
VSS-B5
VSS-B10
VSS-D10
VSS-G5
VSS-G10
VSS-H1
VSS-H14
VSS-K1
VSS-K14
VSS-L5
VSS-L10
VSS-P10
VSS-T5
VSS-T10
4
CHANNEL A: 1G/2G GDDR5x32
+1.35V_GFX
B1
B3
B12
B14
D1
D3
D12
D14
E5
E10
F1
F3
F12
F14
G2
G13
H3
H12
K3
K12
L2
L13
M1
M3
M12
M14
N5
N10
P1
P3
P12
P14
T1
T3
T12
T14
C5
C10
D11
G1
G4
G11
G14
L1
L4
L11
L14
P11
R5
R10
A1
A3
A12
A14
C1
C3
C4
C11
C12
C14
E1
E3
E12
E14
F5
F10
H2
H13
K2
K13
M5
M10
N1
N3
N12
N14
R1
R3
R4
R11
R12
R14
U1
U3
U12
U14
B5
B10
D10
G5
G10
H1
H14
K1
K14
L5
L10
P10
T5
T10
U1021
FBA_CMD24(14 )
3
MF=1 mirrored
FBA_CMD25(14 )
FBA_CMD26(14 )
FBA_CMD27(14 )
FBA_CMD17(14 )
FBA_CMD18(14 )
FBA_CMD20(14 )
FBA_CMD19(14 )
FBA_CMD23(14 )
FBA_CMD22(14 )
VMA_WCK67(14)
VMA_WCK67#(14)
VMA_WCK45(14)
VMA_WCK45#(14)
FBA_EDC4
FBA_EDC5
FBA_EDC6
FBA_EDC7
FBA_DBI4
FBA_DBI5
FBA_DBI6
FBA_DBI7
FBA_CMD31(14 )
FBA_CMD28(14 )
FBA_CMD30(14 )
VMA_CLK1#(14)
VMA_CLK1(14)
FBA_CMD21(14 )
FBA_CMD16(14 )
R1051 EV@120/F_4
FBA_CMD29(14 )
R1049 EV@1K_4
VREFD_VMA2
2
C1533 EV@820P/50V_4
2
C1067 EV@820P/50V_4
VREFC_VMA2
2
C1048 EV@820P/50V_4
VMA_DQ39
VMA_DQ38
VMA_DQ37
VMA_DQ36
VMA_DQ35
VMA_DQ34
VMA_DQ33
VMA_DQ32
VMA_DQ47
VMA_DQ46
VMA_DQ45
VMA_DQ44
VMA_DQ43
VMA_DQ42
VMA_DQ41
VMA_DQ40
VMA_DQ55
VMA_DQ54
VMA_DQ53
VMA_DQ52
VMA_DQ51
VMA_DQ50
VMA_DQ49
VMA_DQ48
VMA_DQ63
VMA_DQ62
VMA_DQ61
VMA_DQ60
VMA_DQ59
VMA_DQ58
VMA_DQ57
VMA_DQ56
1
1
1
Channel 0 <32-63>
U1021
M2
M4
N2
N4
T2
T4
U2
U4
M13
M11
N13
N11
T13
T11
U13
U11
F13
F11
E13
E11
B13
B11
A13
A11
F2
F4
E2
E4
B2
B4
A2
A4
J5
K4
K5
K10
K11
H10
H11
H5
H4
D4
D5
P4
P5
R2
R13
C13
C2
P2
P13
D13
D2
G3
L3
J3
J11
J12
G12
L12
J13
J10
SEN_A
J2
J1
A5
U5
A10
U10
J14
J4
EV@GDDR5
DQ31 | DQ7
DQ30 | DQ6
DQ29 | DQ5
DQ28 | DQ4
DQ27 | DQ3
DQ26 | DQ2
DQ25 | DQ1
DQ24 | DQ0
DQ23 | DQ15
DQ22 | DQ14
DQ21 | DQ13
DQ20 | DQ12
DQ19 | DQ11
DQ18 | DQ10
DQ17 | DQ9
DQ16 | DQ8
DQ15 | DQ23
DQ14 | DQ22
DQ13 | DQ21
DQ12 | DQ20
DQ11 | DQ19
DQ10 | DQ18
DQ9 | DQ17
DQ8 | DQ16
DQ7 | DQ31
DQ6 | DQ30
DQ5 | DQ29
DQ4 | DQ28
DQ3 | DQ27
DQ2 | DQ26
DQ1 | DQ25
DQ0 | DQ24
RFU/A12/NC
A7/A8 | A0/A10
A6/A11 | A1/A9
A5/BA1 | A3/BA3
A4/BA2 | A2/BA0
A3/BA3 | A5/BA1
A2 /BA0 | A4/BA2
A1/A9 | A6/A11
A0/A10 | A7/A8
WCK01 | WCK23
WCK01# | WCK23#
WCK23 | WCK01
WCK23# | WCK01#
EDC3 | EDC0
EDC2 | EDC1
EDC1 | EDC2
EDC0 | EDC3
DBI3# | DBI0#
DBI2 #| DBI1#
DBI1# | DBI2#
DBI0# | DBI3#
RAS# | CAS#
CAS# | RAS#
CKE#
CK#
CK
CS# | WE#
WE# | CS#
ZQ
SEN
RESET#
MF
Vpp,NC
Vpp,NC1
VREFD1
VREFD2
VREFC
ABI#
1
VMA_DQ[63..0](14)
FBA_DBI[7..0](14)
FBA_EDC[7..0](14)
VMA_DQ[63..0]
FBA_DBI[7..0]
FBA_EDC[7..0]
MF=0 Non-mirrored
VMA_DQ31
VMA_DQ30
VMA_DQ29
VMA_DQ28
FBA_EDC3
FBA_EDC2
FBA_EDC1
FBA_EDC0
FBA_DBI3
FBA_DBI2
FBA_DBI1
FBA_DBI0
FBA_CMD12(14 )
FBA_CMD15(14 )
FBA_CMD14(14 )
VMA_CLK0#(14)
VMA_CLK0(14)
FBA_CMD0(14)
FBA_CMD5(14)
R1044 EV@120/F_4
R1045 EV@1K_4
FBA_CMD13(14 )
R1050 EV@1K_4
VREFD_VMA1
2
1
C1060 EV@820P/50V_4
2
1
C1534 EV@820P/50V_4
VREFC_VMA1
2
C1046 EV@820P/50V_4
VMA_DQ27
VMA_DQ26
VMA_DQ25
VMA_DQ24
VMA_DQ23
VMA_DQ22
VMA_DQ21
VMA_DQ20
VMA_DQ19
VMA_DQ18
VMA_DQ17
VMA_DQ16
VMA_DQ15
VMA_DQ14
VMA_DQ13
VMA_DQ12
VMA_DQ11
VMA_DQ10
VMA_DQ9
VMA_DQ8
VMA_DQ7
VMA_DQ6
VMA_DQ5
VMA_DQ4
VMA_DQ3
VMA_DQ2
VMA_DQ1
VMA_DQ0
1
SEN_A
A
QD24~31
QD16~23
QD8~15
QD0~7
FBA_CMD9(14)
FBA_CMD6(14)
FBA_CMD7(14)
FBA_CMD4(14)
FBA_CMD3(14)
FBA_CMD1(14)
FBA_CMD2(14)
FBA_CMD11(14 )
B
C
FBA_CMD10(14 )
VMA_WCK01(14)
VMA_WCK01#(14)
VMA_WCK23(14)
VMA_WCK23#(14)
FBA_CMD8(14)
2
Channel 0 <0-31>
U1022
M2
DQ31 | DQ7
M4
DQ30 | DQ6
N2
DQ29 | DQ5
N4
DQ28 | DQ4
T2
DQ27 | DQ3
T4
DQ26 | DQ2
U2
DQ25 | DQ1
U4
DQ24 | DQ0
M13
DQ23 | DQ15
M11
DQ22 | DQ14
N13
DQ21 | DQ13
N11
DQ20 | DQ12
T13
DQ19 | DQ11
T11
DQ18 | DQ10
U13
DQ17 | DQ9
U11
DQ16 | DQ8
F13
DQ15 | DQ23
F11
DQ14 | DQ22
E13
DQ13 | DQ21
E11
DQ12 | DQ20
B13
DQ11 | DQ19
B11
DQ10 | DQ18
A13
DQ9 | DQ17
A11
DQ8 | DQ16
F2
DQ7 | DQ31
F4
DQ6 | DQ30
E2
DQ5 | DQ29
E4
DQ4 | DQ28
B2
DQ3 | DQ27
B4
DQ2 | DQ26
A2
DQ1 | DQ25
A4
DQ0 | DQ24
J5
RFU/A12/NC
K4
A7/A8 | A0/A10
K5
A6/A11 | A1/A9
K10
A5/BA1 | A3/BA3
K11
A4/BA2 | A2/BA0
H10
A3/BA3 | A5/BA1
H11
A2 /BA0 | A4/BA2
H5
A1/A9 | A6/A11
H4
A0/A10 | A7/A8
D4
WCK01 | WCK23
D5
WCK01# | WCK23#
P4
WCK23 | WCK01
P5
WCK23# | WCK01#
R2
EDC3 | EDC0
R13
EDC2 | EDC1
C13
EDC1 | EDC2
C2
EDC0 | EDC3
P2
DBI3# | DBI0#
P13
DBI2 #| DBI1#
D13
DBI1# | DBI2#
D2
DBI0# | DBI3#
G3
RAS# | CAS#
L3
CAS# | RAS#
J3
CKE#
J11
CK#
J12
CK
G12
CS# | WE#
L12
WE# | CS#
J13
ZQ
J10
SEN
J2
RESET#
J1
MF
A5
Vpp,NC
U5
Vpp,NC1
A10
VREFD1
U10
VREFD2
J14
VREFC
J4
ABI#
EV@GDDR5
VDDQ-B1
VDDQ-B3
VDDQ-B12
VDDQ-B14
VDDQ-D1
VDDQ-D3
VDDQ-D12
VDDQ-D14
VDDQ-E5
VDDQ-E10
VDDQ-F1
VDDQ-F3
VDDQ-F12
VDDQ-F14
VDDQ-G2
VDDQ-G13
VDDQ-H3
VDDQ-H12
VDDQ-K3
VDDQ-K12
VDDQ-L2
VDDQ-L13
VDDQ-M1
VDDQ-M3
VDDQ-M12
VDDQ-M14
VDDQ-N5
VDDQ-N10
VDDQ-P1
VDDQ-P3
VDDQ-P12
VDDQ-P14
VDDQ-T1
VDDQ-T3
VDDQ-T12
VDDQ-T14
VDD-C5
VDD-C10
VDD-D11
VDD-G1
VDD-G4
VDD-G11
VDD-G14
VDD-L1
VDD-L4
VDD-L11
VDD-L14
VDD-P11
VDD-R5
VDD-R10
VSSQ-A1
VSSQ-A3
VSSQ-A12
VSSQ-A14
VSSQ-C1
VSSQ-C3
VSSQ-C4
VSSQ-C11
VSSQ-C12
VSSQ-C14
VSSQ-E1
VSSQ-E3
VSSQ-E12
VSSQ-E14
VSSQ-F5
VSSQ-F10
VSSQ-H2
VSSQ-H13
VSSQ-K2
VSSQ-K13
VSSQ-M5
VSSQ-M10
VSSQ-N1
VSSQ-N3
VSSQ-N12
VSSQ-N14
VSSQ-R1
VSSQ-R3
VSSQ-R4
VSSQ-R11
VSSQ-R12
VSSQ-R14
VSSQ-V1
VSSQ-V3
VSSQ-V12
VSSQ-V14
VSS-B5
VSS-B10
VSS-D10
VSS-G5
VSS-G10
VSS-H1
VSS-H14
VSS-K1
VSS-K14
VSS-L5
VSS-L10
VSS-P10
VSS-T5
VSS-T10
LOWER HALF
+1.35V_GFX
B1
B3
B12
B14
D1
D3
D12
D14
E5
E10
F1
F3
F12
F14
G2
G13
H3
H12
K3
K12
L2
L13
M1
M3
M12
M14
N5
N10
P1
P3
P12
P14
T1
T3
T12
T14
C5
C10
D11
G1
G4
G11
G14
L1
L4
L11
L14
P11
R5
R10
A1
A3
A12
A14
C1
C3
C4
C11
C12
C14
E1
E3
E12
E14
F5
F10
H2
H13
K2
K13
M5
M10
N1
N3
N12
N14
R1
R3
R4
R11
R12
R14
U1
U3
U12
U14
B5
B10
D10
G5
G10
H1
H14
K1
K14
L5
L10
P10
T5
T10
U1022
QD32~39 QD40~47
QD48~55
QD56~63
+1.35V_GFX
6
7
8

A
B
C
VREF_VMA1_MOS
VMA_CLK0
R1046 EV@80.6/F_4
VMA_CLK0#
D
+1.35V_GFX
VMA_CLK1
R1047 EV@80.6/F_4
VMA_CLK1#
+
C1529 EV@330u/2V_7343
EV@0.1u/16V_4C1029
C1025 EV@10U/6.3V_6
C1053 EV@10U/6.3V_6
C1070 EV@10U/6.3V_6
201201117 Add C764 for EMI suggestion.
1
R1037
EV@549/F_4
R1042
EV@1.33K/F_4
+1.35V_GFX
VREFC_VMA1
2
R1038
EV@931/F_4
*EV@549/F_4
1
*EV@1.33K/F_4
+1.35V_GFX
C1535 EV@1u/6.3V_4
C1536 EV@1u/6.3V_4
C1041 EV@1u/6.3V_4
C1059 EV@0.047u/10V_4
C1049 EV@0.047u/10V_4
R1372
R1371
+1.35V_GFX
VREFD_VMA1
EV@0.1u/16V_4C1032
EV@0.1u/16V_4C1056
EV@0.1u/16V_4C1027
EV@0.1u/16V_4C1037
*EV@931/F_4
2
R1373
2
1
R1039
EV@549/F_4
R1048
EV@1.33K/F_4
+1.35V_GFX
+1.35V_GFX
R1040
EV@931/F_4
VREFC_VMA2
C1038 EV@1u/6.3V_4
C1054 EV@1u/6.3V_4
C1039 EV@1u/6.3V_4
C1062 EV@1u/6.3V_4
C1058 EV@0.047u/10V_4
C1064 EV@0.047u/10V_4
VREF_VMA1_MOS
+1.35V_GFX
2
R1368
*EV@549/F_4
1
R1370
*EV@1.33K/F_4
EV@0.1u/16V_4C1033
EV@0.1u/16V_4C1043
EV@0.1u/16V_4C1532
EV@0.1u/16V_4C1055
VREFD_VMA2
R1369
*EV@931/F_4
3
2
1
3
Q1031
EV@2N7002K
1
+1.35V_GFX
C1066 EV@1u/6.3V_4
C1531 EV@1u/6.3V_4
C1068 EV@1u/6.3V_4
C1026 EV@1u/6.3V_4
VREF_VMA1_MOS
2
GPIO10_VREF (16)
+1.35V_GFX
EV@0.1u/16V_4C1074
EV@0.1u/16V_4C1052
EV@0.1u/16V_4C1040
*EV@0.1u/16V_4C1063
*EV@0.1u/16V_4C1042
*EV@0.1u/16V_4C1035
EV@0.1u/16V_4C1050
C1044 EV@1u/6.3V_4
C1034 EV@1u/6.3V_4
C1057 EV@1u/6.3V_4
C1047 EV@0.047u/10V_4
C1530 EV@0.047u/10V_4
EV@0.1u/16V_4C1030
EV@0.1u/16V_4C1036
EV@0.1u/16V_4C1045
EV@0.1u/16V_4C1031
R1053 EV@10K_4
FBA_CMD14
R1054 EV@10K_4
FBA_CMD30
CKE* is strap pin to set ODT value of memory chip
FBA_CMD13
FBA_CMD29
R1041 EV@10K_4
R1043 EV@10K_4
+1.35V_GFX
RST PD place @ the end of daisy-chain.
4
5
6
GDDR5 Mode H Mapping
< 0-31 > < 32-63 > Memory
CMD0 CMD16 CS* CMD1 CMD17 A3_BA3 CMD2 CMD18 A2_BA0 CMD3 CMD19 A4_BA2 CMD4 CMD20 A5_BA1 CMD5 CMD21 WE* CMD6 CMD22 A7_A8 CMD7 CMD23 A6_A11 CMD8 CMD24 ABI* CMD9 CMD25 A12_RFU CMD10 CMD26 A0_A10 CMD11 CMD27 A1_A9 CMD12 CMD28 RAS* CMD13 CMD29 RST* CMD14 CMD30 CKE* CMD15 CMD31 CAS*
7
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
N13PGV GDDR5x32-VRAM
N13PGV GDDR5x32-VRAM
N13PGV GDDR5x32-VRAM
Z8V
Z8V
Z8V
18 45Monday, February 22, 2016
18 45Monday, February 22, 2016
18 45Monday, February 22, 2016
8
D
1A
1A
1A
of
of
of
5
DP TO VGA
4
3
2
1
%
D
Power
CLK_SDATA(7,11,12,26)
CLK_SCLK(7,11,12,26)
C141
0.1U/16V_4
AVCC33
+3V
L7
60ohm@100MHz_6
C137 0.1U/16V_4
C135 0.1U/16V_4
C104 0.1U/16V_4
C97 0.1U/16V_4
C82 0.1U/16V_4
C77 0.1U/16V_4
VDD_DAC_33
CRT_HPD
AUX_CH_N
AUX_CH_P
LANE0_P
LANE0_N
LANE1_P
LANE1_N
+3V
L8
60ohm@100MHz_6
CPU
C
B
CRT_HPD(2)
CRT_AUXN(2)
CRT_AUXP(2)
CRT_TXP0(2)
CRT_TXN0(2)
CRT_TXP1(2)
CRT_TXN1(2)
AVCC33
AUX_CH_P
AUX_CH_N
VCCK_V12
LANE0_P
LANE0_N
LANE1_P
LANE1_N
R95 *0_4
R94 *0_4
1
2
3
4
5
6
7
8
+3V
33
U5
EPAD
AVCC_33
AUX_P
AUX_N
AVCC_12
LANE0_P
LANE0_N
LANE1_P
LANE1_N
R73
+3V
4.7K_4
R693 4.7K_4
R694 *4.7K_4
CRT_HPD
CIIC_SCL
CIIC_SDA
27
29
28
30
31
32
HPD
XI
SMB_SCL
SMB_SDA
EXT1.2V_CTRL
LDO_RSTB
RTD2166
VCC_33
SPI_SO
SPI_SI
SPI_CLK
POL1/SPI_CEB
POL2
9
10
R74
4.7K_4
14
13
12
11
+3V
TP7
+3V
25
26
VCCK_12
PVCC_33
GREEN_P
VDD_DAC_33
HVSYNC_PWR
VGA_SDA
VGA_SCL
16
15
DDCDAT
DDCCLK
C150
0.1U/16V_4
VCCK_V12
GND
RED_P
BLUE_P
HSYNC
VSYNC
24
23
22
21
20
19
18
17
C555
0.1U/16V_4
C559
0.1U/16V_4
CRT_RED
CRT_GRE
CRT_BLU
VDD_DAC_33
HSYNC
VSYNC
+5V
C546
4.7U/6.3V_6
C156
2.2U/6.3V_6
C565
0.1U/16V_4
DDCDAT
DDCCLK
HSYNC
VSYNC
CRT_RED
CRT_GRE
CRT_BLU
VGA
DDCDAT (20)
DDCCLK (20)
HSYNC (20)
VSYNC (20)
CRT_RED (20)
CRT_GRE (20)
CRT_BLU (20)
D
C
B
Note:
1- C1,C3,C4,C5,C11,C16, C21 should be placed close to chip 2- C5 shold be X5R material 3- R6, R7, R8 should be 75 ohm with +/-1% 4- Suggest to connect Pin 29 and Pin 30 to PCH SMBUS for debug purpose. 5- This configuration is for internal ROM mode and using embedded LDO mode.
A
+3V(2,4,6,7,8,9,11,12,13,15,20,21,22,23,24,25,26,27,28,30,31,32,33,34,37,38,39)
+5V(20,21,23,24,26,30,37)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT :
DP to VGA iT6165
DP to VGA iT6165
DP to VGA iT6165
ZRW
ZRW
ZRW
19 46Monday, February 22, 2016
of
19 46Monday, February 22, 2016
of
19 46Monday, February 22, 2016
1
of
A
1A
1A
1A
5
CRT
RTD2166 integrate 5V HSYNC/VSYNC buffer inside IC
HSYNC(19)
D
VSYNC(19)
12/24 Delete R449
HSYNC
12/24 Delete R396
VSYNC
R458 *0_4
R392 *0_4
U30
1
2
3
*M74VHC1GT125DF2G
Co-Layout
U26
1
2
3
*M74VHC1GT125DF2G
12/18 Change R412 to 47ohm for vendor requset
R412 47/F_4
5
VCC
OE#
4
R421 *33_4
Y
A
GND
12/18 Change R399 to 47ohm for vendor requset
R399 47/F_4
5
VCC
OE#
4
R406 *33_4
Y
A
Realtek FAE suggest close to connector
GND
+5V
CRTHSYNC
+5V
CRTVSYNC
C562
0.1u/16V_4
C533
0.1u/16V_4
4
CRT_RED(19)
CRT_GRE(19)
CRT_BLU(19)
Close to RTD2166 IC
R91
75/F_4
R85 75/F_4
R77 75/F_4
CRTHSYNC
CRTVDD5
CRTVSYNC
DDCCLK
CRT_R1
CRT_G1
DDCDAT
CRT_B1
3
Q8
3
+5V
12/18 Change to BLM15BB220SN1D (CX5BB220005) for vendor request
C112
C143
5.6p/16V_4
5.6p/16V_4
U28
1
1
2
2
3
GND_3/8
4
4
5
5
*RClamp0524P
U6
1
1
2
2
3
GND_3/8
4
4
5
5
*RClamp0524P
1
IN
OUT
2
GND
AP2331SA-7
L4 BLM15BB220SN1D_4
L3 BLM15BB220SN1D_4
L2 BLM15BB220SN1D_4
C88
5.6p/16V_4
12/18 Un-Stuff C95/C128/C148 for vendor requset
10
CRTHSYNC
10
9
CRTVDD5
9
7
CRTVSYNC
7
6
DDCCLK
6
10
CRT_R1
10
9
CRT_G1
9
7
DDCDAT
7
6
CRT_B1
6
CRTVDD5
C95 *5.6p/16V_4
C70 *0.1u/16V_4
CRTVDD5
CRT_R1
CRT_G1
CRT_B1
C148
C128
*5.6p/16V_4
*5.6p/16V_4
C67 *0.22u/6.3V_4
C68 *220p/50V_4
C69 0.1u/16V_4
*33P/50V_4
C539
*33P/50V_4
C551
C532 *10p/50V_4
C571 *10p/50V_4
Realtek FAE suggest close to connector
12/18 Un-Stuff C539/C551 for vendor requset
6
1
7
2
8
3
9
4
10
5
16
17
CRTVDD5
CRTVSYNC
CRTHSYNC
DDCCLK
DDCDAT
CN5
CRT CONN
2
12/21 Change CN5 footprint to "dsub-95-0005-01-15p" for layout requset
11
CRT_11
DDCDAT
CRTHSYNC
CRTVSYNC
DDCCLK
TP61
DDCDAT (19)
DDCCLK (19)
DDCDAT
DDCCLK
12
13
14
15
Power trace tracking
1
R4432.2K_4
CRTVDD5
R3982.2K_4
+3V(2,4,6,7,8,9,11,12,13,15,19,21,22,23,24,25,26,27,28,30,31,32,33,34,37,38,39)
+5V(19,21,23,24,26,30,37)
+3VPCU(6,9,22,23,24,25,26,28,29,30,37,38,39)
VIN(23,24,29,30,31,32,33,34,35,36,37,38,39)

D
C
R373 *100K_4
R374 *100K_4
2013/12/12 change eDP pin define colayout FHD Panel for A2 stage
Prevent ESD/EOS Layout near device
EDP_HPD(2)
B
Touch Panel-I2C
Touch Panel-USB
eDP 4k*2k
A
TP_INT_PCH(4)
VIN
+3V
EDP_AUX_C
R371 *100K_4
R372 *100K_4
EDP_AUX#_C
TP_RST#
R23 *TSI@10K_4
TS_EN(28)
USBP5+(6)
USBP5-(6)
I2C1_SCL_C
I2C1_SDA_C
PCH_BRIGHT(2)
USBP5+
USBP5-
EDP_AUXP(2)
EDP_AUXN(2)
EDP_TXP1(2)
EDP_TXN1(2)
EDP_TXP0(2)
EDP_TXN0(2)
R10 *TSI@0_4
R9 *TSI@0_4
R8 TSU@0_4
R7 TSU@0_4
EDP_TXP2(2)
EDP_TXN2(2)
EDP_TXP3(2)
EDP_TXN3(2)
Board_ID4(8)
R18 33_4
C4 180P/50V_4
eDP FHD
S5
R1 *0_4
TS_EN
1C1-2 2014/03/11 Add R698 for TS_EN short TP_INT,
for issue debug.
Touch Panel interrupt
S5 S0
R2 *TSI@0_4
5
+3V
3
Q1 *TSI@2N7002K
TP_INT
R3 *TSI@10K_4
2
1
C21
4.7u/25V_8
1A-5
TP_INT
C19 1000p/50V_4
LCDVCC
EDP_AUXP
EDP_AUXN
EDP_TXP1
EDP_TXN1
EDP_TXP0
EDP_TXN0
EDP_TXP2
EDP_TXN2
EDP_TXP3
EDP_TXN3
TP_PWR
C8
C507
0.1u/16V_4
1000p/50V_4
VIN
MAX 1.5A
C17
PCH_BRIGHT
EDP_HPD_R
USBP6+(6)
*1u/6.3V_4
USBP6-(6)
TS_EN
BOARD_ID4_TOUCH_S
R24 *short/0_8
+3V
+5V
+3V
C508 .1U/16V_4
C509 .1U/16V_4
C504 .1U/16V_4
C503 .1U/16V_4
C500 .1U/16V_4
C499 .1U/16V_4
CCD-USB
C497 .1U/16V_4
C496 .1U/16V_4
C495 .1U/16V_4
C494 .1U/16V_4
R353 33_4
C492 180P/50V_4
Prevent ESD/EOS Layout near device
4
+3V
C11
C10
0.1u/16V_4_X7R
1000p/50V_4
R26 *short/0_8
R27 *short/0_8
C16
LCDVCC_R
C1642 *22U/6.3V_6
R22 *short/0_6
R21 *0_4
R362 *short_4
R359 *short_4
R356 *Short/0_4
*1u/6.3V_4
EDP_AUX_C
EDP_AUX#_C
EDP_TXP1_C
EDP_TXN1_C
EDP_TXP0_C
EDP_TXN0_C
EDP_TXP2_C
EDP_TXN2_C
EDP_TXP3_C
EDP_TXN3_C
TP_PWR
TP_RST#
BL_ON
USBP6+_R
USBP6-_R
TS_EN_R
TP_INT
V_BLIGHT
Hall Sensor (HSR)
+3VPCU
D4 *VPORT_6
1
2
C396
4.7U/6.3V_6
1st:AL009249000 -- BCD 2nd:AL009132001 -- ANC
CN2
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
R678 *100K_4
1
3
MR1 AH9249NTR-G1
G_5
G_0
2
G_4
G_1
50398-04071-001
2
1
3
LID#
D31 *VPORT_6
LCD PowerLCD CONNECTOR
C20
1u/6.3V_4
EDP_VDD_EN(2)
R30 *Short/0_4
Touch screen level shift I2C(reserve)
S5
I2C1_SDA(4)
I2C1_SCL(4)
PCH_BLON(2)
PCH_BLON_R(28)
EDP_VDD_EN_R
+3V
*TSI@DMN601DWK-7
R43 0_4
R42 0_4
2
+3V
U2
6
IN
4
IN
3
ON/OFF
G5245AT11U
R31
100K_4
R13 *TSI@0_4
Q2
6
2
3
5
1
4
R12 *TSI@0_4
10K_4
PCH_BLON_C
R44 100K_4
Q6
DMN601DWK-7
1B-3 2013/12/10 change Q3.3 from +3V to +3VPCU.
I2C1_SDA_C
I2C1_SCL_C
R28
5
1
OUT
2
GND
5
GND
+3V
R16
R6
*TSI@10K_4
*TSI@10K_4
+3V
R20 10K_4
BL#
3
2
6
4
1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
C12
C7
*2.2u/50V_8
*0.1u/16V_4
1st : AL005245000---GMT
2nd : AL007553000---UPI
S0
TPD->100kHz,TS=400Khz Intel design guide suggestion MCP PIN 10u. Per inch 3u TS=3x5inch 400kHz10~100u =2.4~0.4k. 100Khz 10~100u=9k~1k.
+3VPCU
R11 *100K_4
LID#
LID591#,EC intrnal PU
D1 1N4148WS
BL_ON
3
2
Q4 DTC144EUA
1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
CRT/LVDS/CAMERA/LID
CRT/LVDS/CAMERA/LID
CRT/LVDS/CAMERA/LID
1
C6
0.1u/16V_4
LCDVCC
C9
C18
0.01u/50V_4
22u/6.3V_8
LID# (28)
EC_FPBACK# (28)
ZRW
ZRW
ZRW
of
20 46Monday, February 22, 2016
of
20 46Monday, February 22, 2016
of
20 46Monday, February 22, 2016
LCDVCC
C
B
A
1A
1A
1A
D
C
B
HDMI
5
<HDM>
HDMI-detect
S5 input high
INT_HDMI_HPD(2)
From PCH
HDMI_5V
0.1U/16V_4_X7R
CN10
D2+
D2 Shield
D2-
D1+
D1 Shield
D1-
D0+
D0 Shield
D0-
CK+
CK Shield
CK-
CE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET
HDMI connector
+3V
C366
SHELL1
GND
GND
SHELL2
1
0.1U/16V_4_X7R
20
23
22
21

C406
D
C
B
+3V
0.1U/16V_4_X7R
D3 *EGA10402V05AH
2
R250 *10K_4
R249 0_4
INT_HDMITX0P_C
INT_HDMITX0N_C
INT_HDMITX1P_C
INT_HDMITX1N_C
INT_HDMITX2P_C
INT_HDMITX2N_C
INT_HDMICLK+_C
INT_HDMICLK-_C
C365
0.1U/16V_4_X7R
HDMI_MB_HPD
C364
1
2
+3V
R246 *20K_4
HDMI_EQ1
C405
0.1U/16V_4_X7R
INT_HDMITX2P_C
INT_HDMITX2N_C
INT_HDMITX1P_C
INT_HDMITX1N_C
INT_HDMITX0P_C
INT_HDMITX0N_C
INT_HDMICLK+_C
INT_HDMICLK-_C
HDMI_DDCCLK_MB
HDMI_DDCDATA_MB
HDMI_5V
R255 10K_4
R254 *0_4
C367
0.1U/16V_4_X7R
HDMI connector
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
4
C404
0.1U/16V_4_X7R
24
3
Q27 *2N7002K
HDMI_DDCCLK_SW
HDMI_DDCDATA_SW
R283 2.2K_4
R284 2.2K_4
HDMI_DDCDATA_SW
HDMI_DDCCLK_SW
INT_HDMITX0P
INT_HDMITX0N
INT_HDMITX1P
INT_HDMITX1N
INT_HDMITX2P
INT_HDMITX2N
INT_HDMICLK+
INT_HDMICLK-
S0
HDMI_MB_HPD_R
HDMI_DDCCLK_MB
HDMI_DDCDATA_MB
C397 0.1u/16V_4
C394 0.1u/16V_4
C390 0.1u/16V_4
C384 0.1u/16V_4
C376 0.1u/16V_4
C373 0.1u/16V_4
C371 0.1u/16V_4
C370 0.1u/16V_4
INT_HDMITX0P_C_R
INT_HDMITX0N_C_R
INT_HDMITX1P_C_R
INT_HDMITX1N_C_R
INT_HDMITX2P_C_R
INT_HDMITX2N_C_R
INT_HDMICLK+_C_R
INT_HDMICLK-_C_R
0.1U/16V_4
C369
25
IN_D1-
26
IN_D1+
27
IN_D2-
28
IN_D2+
29
IN_D3-
30
IN_D3+
31
IN_D4-
32
IN_D4+
33
CEN_PAD
1
+3V
HDMI_DDCDATA_SW(2)
HDMI_DDCCLK_SW(2)
INT_HDMITX0P(2)
INT_HDMITX0N(2)
INT_HDMITX1P(2)
INT_HDMITX1N(2)
INT_HDMITX2P(2)
INT_HDMITX2N(2)
INT_HDMICLK+(2)
INT_HDMICLK-(2)
+3V
+3V
R274 *1M_4
1
R285 *short/0_4
R251 2.2K_4
R252 2.2K_4
D8 RB500V-40
2
D7 RB500V-40
2
+3V
2
1
1
3
HDMI_EQ0
+3V
C402 0.1U/16V_4_X7R
+3V
HDMI_MB_HPD
HDMI_DDCDATA_MB
HDMI_DDCCLK_MB
U15
17
18
19
20
21
22
23
GND
DDC_EN
SDA_SNK
HPD_SNK
TERM_EN
HPD_SRC
REXT
GND
EQ1
VDD
5
4
3
2
HDMI_EQ1
HDMI_MB_HPD_R
R253 12.4K/F_4
PTN3366BS
VDD
OE_N
SCL_SNK
SCL_SRC
SDA_SRC
7
6
HDMI_DDCDATA_SW
HDMI_DDCCLK_SW
8
HDMI_EQ0
EQ0
OUT_D1-
OUT_D1+
OUT_D2-
OUT_D2+
OUT_D3-
OUT_D3+
OUT_D4-
OUT_D4+
16
15
14
13
12
11
10
9
37
GND
36
GND
35
GND
34
GND
+5V
DDS AL002331000
3
AP2331SA-7
C403
0.1U/16V_4_X7R
Q26
1
IN
OUT
2
GND
C351 *220p/50V_4
EMI
INT_HDMITX2P_C
R261 *120/F_4
INT_HDMITX1P_C
A
INT_HDMITX0P_C
INT_HDMICLK+_C
Power trace tracking
+3V(2,4,6,7,8,9,11,12,13,15,19,20,22,23,24,25,26,27,28,30,31,32,33,34,37,38,39)
+5V(19,20,23,24,26,30,37)
5
4
3
INT_HDMITX2N_C
R264 *120/F_4
INT_HDMITX1N_C
R268 *120/F_4
INT_HDMITX0N_C
R257 *120/F_4
INT_HDMICLK-_C
A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
PROJECT :
HDMI (PS8407 4k*2k)
HDMI (PS8407 4k*2k)
HDMI (PS8407 4k*2k)
ZRW
ZRW
ZRW
1A
1A
1A
of
21 46Monday, February 22, 2016
of
21 46Monday, February 22, 2016
of
21 46Monday, February 22, 2016
1
5
Giga LAN (LAN)
4
3
2
1
D
R196 2.49K/F_4
LANVCC
MDI_0+
MDI_0-
VDD10
MDI_1+
MDI_1-
MDI_2+
MDI_2-
VDD10
C
LANVCC
Leakage circuit (MPC)
CLK_PCIE_REQ4# have PU 10k.
B
Reserve IOAC No Stuff
+3VPCU
A
*IOAC@0.1U/16V_4
S0
CLK_PCIE_LAN_REQ#(6)
PCIE_LAN_WAKE#(8,25)
IOAC_LAN_WAKE#(28)
C206
VDD10
U7
33
1
2
3
4
5
6
7
8
R124 *IOAC@100K/J_4
10 mils
GND
MDIP0
MDIN0
AVDD10
MDIP1
MDIN1
MDIP2(NC)
MDIN2(NC)
AVDD10
MDI_3+
MDI_3-
Q13 IOAC@AO3413
1
2
XTAL2
XTAL1
RSET
26
28
29
30
31
32
27
LED0
RSET
AVDD10
AVDD33
CKXTAL1
CKXTAL2
RTL8111H-CG
MDIN3(NC)
MDIP3(NC)
AVDD33
CLKREQB
HSIN
HSIP
9
10
11
12
15
14
13
PCIE_REQ_LAN#_R
+3V
R168 *10K/F_4
EC_PCU LANVCC
R112 NAC@0_4
R111 IOAC@0_4
3
R118
+3V_LAN
IOAC@0_8
C324 12p/50V_4
2
1
3
4
C306 12p/50V_4
25
LED1
LED2
REGOUT
VDDREG
LANWAKEB
ISOLATEB
REFCLK_N
REFCLK_P
16
3
Q19
2N7002K
R177 *0/J_4
Y1
25MHZ +-30PPM
TP22
TP19
TP20
24
23
22
DVDD10
21
20
19
PERSTB
18
HSON
17
HSOP
CLK_PCIE_LANN (6)
CLK_PCIE_LANP (6)
PCIE_TX5-_LAN (6)
PCIE_TX5+_LAN (6)
+3V
2
1
3
Q12 IOAC@2N7002K
R130 NAC@0/J_4
C234 10u/6.3V_6
PCIE_LAN_WAKE#_R
ISOLATEB
PERSTB
PCIE_RX5-_LAN_C
PCIE_RX5+_LAN_C
+3V
R178 10K/F_4
MAIN POWER(3V_S0)
PCIE_REQ_LAN#_R
LANVCC
2
1
C272
0.1u/16V_4
BG625000081 -> TXC(1st) BG625000085 -> HHE(2nd)
REGOUT
LANVCC
VDD10
FAE suggest to change to 1K
R129 IOAC@1K_4
PCIE_LAN_WAKE#_R
LANVCC
C253 *0.1u/16V_4
R128 NAC@0_4
R131 IOAC@0_4
C226 180P/50V_4
C257 0.1u/16V_4
C258 0.1u/16V_4
Consider VCC33 may be connected to Main Power or chipset/bios's GPO, the pull-low resistor R14 can be NC only when Main Power or chipset/bios's GPO can ensure to drive the ISOLATEB pin to a voltage level < 0.8V at the system state S3~S5. If the ISOLATEB pin can not be well-controlled to a voltage level < 0.8V at S3~S5, the pull-low resistor R14 is needed to make sure the LAN chip is well isolated.
+3V_S5
R105 NAC@0_8
C323 *0.1u/16V_4
LANVCC
40 mils (Iout=1A)
C328
0.1u/16V_4
For RTL8111H Place 0.1uF,4.7uF CAP close to each VDD33 pin-- 11, 32
C337
0.1u/16V_4
RTL8111H (LDO mode)
REGOUT
+3V
R146 1K_4
PLTRST# (8,13,24,25,28)
IOAC_RST# (25,28)
PCIE_RX5-_LAN (6)
PCIE_RX5+_LAN (6)
R147 *15K_4
Tramsformer
MDI_3+
MDI_3-
MDI_2+
MDI_2-
MDI_1+
MDI_1-
MDI_0+
MDI_0-
C346
0.01U/50V/X7R_4
40 mils (Iout=1A) 40 mils (Iout=1A)
U11
1
MCT1
TCT1
2
MX1+
TD1+
3
MX1-
TD1-
4
MCT2
TCT2
5
MX2+
TD2+
6
MX2-
TD2-
7
MCT3
TCT3
8
MX3+
TD3+
9
MX3-
TD3-
10
MCT4
TCT4
11
MX4+
TD4+
12
MX4-
TD4-
GND
TRANSFORMER
25
12/16 Change P/N to CS07504FA11 RES CHIP 75 1/8W +-1%(0805)
24
23
22
21
20
19
18
17
16
15
14
13
R136 *short/0_8
C268
0.1u/16V_4
Layout:All termination signal should have 30 mil trace
LAN_MCT0
LAN_MX3+
LAN_MX3-
LAN_MCT1
LAN_MX2+
LAN_MX2-
LAN_MCT2
LAN_MX1+
LAN_MX1-
LAN_MCT3
LAN_MX0+
LAN_MX0-
4/20 REV:D add TP85 ~TP100 for AZ chip ICT/ATE Capacitor test
C339
4.7U/6.3V_6
C332
4.7U/6.3V_6
close to each VDD10 pin-- 3, 8, 22, 30
C335
C338
0.1u/16V_4
C611
0.1u/16V_4
0.1u/16V_4
RJ45 Connector
R224 75/F_8
R215 75/F_8
R221 75/F_8
R217 75/F_8
TERM9
C342 1000P/3KV_1808
C333
0.1u/16V_4
LAN_MX0+
LAN_MX0-
LAN_MX1+
LAN_MX2+
LAN_MX2-
LAN_MX1-
LAN_MX3+
LAN_MX3-

close to each VDD10 pin-- 22 (reserve)
VDD10
C612
C613
*1U/6.3V_4
*0.1u/16V_4
CN9
1
0+
2
0-
3
1+
4
2+
5
2-
6
1-
7
3+
8
3-
RJ45
9
9
10
10
11
11
12
12
D
C
B
A
LANPWR#(28)
5
R108 IOAC@10K_4
C185 *IOAC@1000p/50V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Monday, February 22, 2016
Monday, February 22, 2016
Date: Sheet
Monday, February 22, 2016
Date: Sheet
4
3
2
Date: Sheet
PROJECT :
LAN(RTL8111H)
LAN(RTL8111H)
LAN(RTL8111H)
ZRW
ZRW
ZRW
1A
1A
1A
of
4622
of
4622
of
1
4622
5
Codec(ADO)
D
+1.5VA
C
B
Analog
Digital
ADOGND
Cap need near AVDD1 and AVDD2 power source input
C704 10u/6.3V_4
ADOGND
Place next to pin 40
L12
PVDD
PBY160808T-600Y-N(60,3A)
Close to codec
Tied at one point only under the codec or near the codec
R660 *0_4
R661 *0_4
R665 *0_4
R655 *0_4
R326 *0_4
R331 *SHORT_4
C728 *1000p/50V_4
C727 *0.1u/16V_4
C706
0.1u/16V_4
Codec PWR 5V(ADO)
+5V
C672
A
C732
*0.1u/16V_4
*10u/6.3V_6
5
Change to 1U from Realtek's suggestion
ADOGND
C707 10u/6.3V_4
+5V_PVDD
L_SPK+
C698
C697 10u/6.3V_4
C691 10u/6.3V_4
+3V
Low is power down amplifier output
0.1u/16V_4
C692
TP83
0.1u/16V_4
R630 *short/0_6
DMIC_DAT_L
DMIC_CLK_L
L_SPK-
R_SPK-
R_SPK+
PD#
C676
0.1u/16V_4
Close to codec
ANALOG DIGITAL
L14 HCB2012KF220T60/6A/22ohm_8
+AZA_VDD
37
CBP
38
AVSS2
39
LDO2-CAP
40
AVDD2
41
PVDD1
42
SPK-L+
43
SPK-L-
44
SPK-R-
45
SPK-R+
46
PVDD2
47
PDB
48
SPDIF-OUT
49
DGND
+AZA_VDD
C685 10u/6.3V_4
R639 *short_4
R638 22_4
C71210u/6.3V_4
36
1
C674 10p/50V_4
C718 *10u/6.3V_6
2
Q43 *AO3404
CLK
DATA
GND
GND
C733 100p/50V_4
1
3
DMIC_CLK_L3
4
DMIC_DAT_L3
7
8
1
PVDD
C734 100p/50V_4
R578 *0_4
R554 *0_4
DMIC_CLK_L2
DMIC_DAT_L2
HP-L3
HP-R3
HP_JD#

DMIC_CLK_L2
DMIC_DAT_L2
1
D16*TVS/6pF_4
C645*10p/50V_4
2
SLEEVE (27)
RING2 (27)
HP-L3 (27)
HP-R3 (27)
HP_JD# (27)
D
1
D15*TVS/6pF_4
C640*10p/50V_4
2
C
B
4
3
DC-DET circuit(ADO)
HP-R2
HP-L2
LINE1-VREFO-L
LINE1-VREFO-R
MIC2-VREFO
CODEC_VREF
INT_AMIC-VREFO
C7201U/6.3V_4
C7161U/6.3V_4
35
34
33
32
31
30
29
28
CBN
CPVEE
CPVDD
HP-OUT-R
VREF
HP-OUT-L
MIC2-VREFO
LINE1-VREFO-L
LINE1-VREFO-R
ALC255
DVDD-IO
SDATA-IN
LDO3-CAP
BIT-CLK
SDATA-OUT
DVSS
GPIO1/DMIC-CLK
GPIO0/DMIC-DATA
DVDD
4
3
2
DC-DET
DMIC_CLK
DMIC_DAT
R323 *Short/0_4
9
8
7
6
5
C455 10u/6.3V_4
ACZ_SDIN
R657 100K_4
27
26
25
U37
AVSS1
AVDD1
LDO1-CAP
LINE2-L
LINE2-R
LINE1-L
LINE1-R
MIC-CAP
MIC2-R/SLEEVE
MIC2-L/RING2
MONO-OUT
SPDIFO/FRO NT JD
MIC2/LIN2 JD
HP/LINE1 JD
PCBEEP
RESETB
SYNC
12
11
10
PCBEEP
R314 33_4
C679 *22p/50V_4
NC
C719 2.2U/6.3V_4
C715 10u/6.3V_4
24
23
22
LINE1-L
21
LINE1-R
20
R324 *short_6
analog digital
19
18
SLEEVE
17
RING2
16
15
14
13
SENSEA
1.6Vrms
C688 0.1u/16V_4
Close to codec
ADOGND
ADOGND
+5VA
C709
C710
0.1u/16V_4
10u/6.3V_4
Place next to pin 26
ADOGND
+3VPCU
C472 10u/6.3V_4
trace width of SLEEVE & RING2 are required at least 40mil and its length should be asshort as possible
Placement near Audio Codec
R643 200K_4
R644 100K_4
BEEP_1
C678 100p/50V_4
R627 22K_4
R632 10K_4
PCH_AZ_CODEC_RST# (4)
PCH_AZ_CODEC_SYNC (4)
DVDD_IO
PCH_AZ_CODEC_SDIN0 (4)
PCH_AZ_CODEC_BITCLK (4)
PCH_AZ_CODEC_SDOUT (4)
Close to codec
ADOGND
HP_JD#
+3V
Analog
Digital
Change 47K to 22K for PCBEEP
D21 1N4148WS
D20 1N4148WS
Change to 10K from Realtek's suggestion
CPU 3.3V
R631 *short/0_4
R628 *0_4
C686
C677
0.1u/16V_4
10u/6.3V_4
Place next to pin 9
+3V
SPKR (4)
PCBEEP_EC (28)
+1.5V
+3V
D-Mic (MIC)
C344 10u/6.3V_4
C345 0.1u/16V_4
C343 10p/50V_4
U10
1
2
5
6
KMM40301026-18DS
Single DMIC DUAL MAIN
3
DMIC_CLK_L1
CLK
VDD
4
DMIC_DAT_L1
DATA
LR
7
GND
GND
8
GND
GND
Left Right
Universal Audio Jack
MIC2-VREFO
SLEEVE
RING2
HP-L2
HP-R2
LINE1-L
LINE1-VREFO-L
LINE1-VREFO-R
LINE1-R
2
R218 *short/0_4
R586 *short/0_4
R646 2.2K/J_4
R645 2.2K/J_4
C711 4.7U/6.3V_6
R654 4.7K_4
R656 4.7K_4
C705 4.7U/6.3V_6
Rev:D change to shortpad
+5V
VIN
DC-DET
R629 *0_4
+5V
R634 *100K_4
2
3
1
R624 *1M_6
Q42 *DTC144EU
C671 *10u/6.3V_4
Single DMIC and Dual DIMC same PN: AL403010A00
Far away rubber
DMIC_CLK_L
DMIC_DAT_L
Place very closed
R219 *0_4
R220 *0_4
DMIC_DAT_L2
1
C347*10p/50V_4
2
DMIC_CLK_L2
+3V
C340 *10u/6.3V_4
C179 *0.1u/16V_4
C181 *10p/50V_4
D2TVS/6pF_4
C648*10p/50V_4
1
D26TVS/6pF_4
2
HEADPHONE/MIC/LINE combo (ADO)
SLEEVE/RING2 trace > 40mils HP/LINE trace > 10mils L/R spacing > 10mils
R420& R422 change to 62 ohm -> 3/11
R663 62/F_4
R664 62/F_4
R653
R649
*10K/J_4
*10K/J_4
ADOGND
C723 100p/50V_4
R626 *short_6
3
U9
1
VDD
2
LR
5
GND
6
GND
*KMM40301026-18DS
DUAL SECOND
C729 100p/50V_4
Mute(ADO)
+1.5V
2
1
C742
*68p/50V_4
3
3
PCH_AZ_CODEC_RST#
Q44
*PJA138K
AMP_MUTE# (28)
R_SPK+_1
R_SPK-_1
L_SPK-_1
L_SPK+_1
C741
*68p/50V_4
1B-2 2013/12/04 Change PN and footprint.
1B-5 2013/12/17 Change CN14 pin define
SPK_CONN_4P
1
2
5
3
6
4
CN18
Codec PWR 1.5V(ADO)
+1.5V
C708
1U/6.3V_4
2
ANALOG DIGITAL
L13 HCB1608KF-121T30_3A
+1.5VA
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Monday, February 22, 2016
Monday, February 22, 2016
Date: Sheet
Monday, February 22, 2016
Date: Sheet
Date: Sheet
PROJECT :
ALC255/HP/SPK
ALC255/HP/SPK
ALC255/HP/SPK
1
ZRW
ZRW
ZRW
of
4623
of
4623
of
4623
A
1A
1A
1A
+5VA
ADOGND
C722 *0.1u/16V_4
+AZA_VDD
R635 1K_4
PD#
R640 *10K/J_4
C690 *1u/10V_4
D28 *RB500V-40
D29 RB500V-40
Internal Speaker
40mil for each signal
R_SPK+
R688 *short_6
R_SPK-
R687 *short_6
L_SPK-
R686 *short_6
L_SPK+
R685 *short_6
Rev:D change to shortpad
4
4 ohm : 40mil for each signal
1003 change 0603type
C744
C743
*68p/50V_4
*68p/50V_4
SATA HDD
26
25
D
MAIN_SATA_CONN
CN11
5
4
3
2
1
SATA ODD Connector
20120921 change Cn10 Pin define following Z09.
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
120mil
C669
+
*100u/6.3V_3528
SATA_RXP0_C
SATA_RXN0_C
SATA_TXN0_C
SATA_TXP0_C
DEVSLP0_R
C670 10u/6.3V_6
R637 *0_4
+5V_HDD
C680 *0.1u/16V_4
R310 *0_4
C689 *0.1u/16V_4
C681 0.01u/50V_4
C682 0.01u/50V_4
C683 0.01u/50V_4
C684 0.01u/50V_4
DEVSLP0 (6)
R625 *short0/J_8
C675
0.01u/50V_4
ACCEL_INT2 (26)
SATA_RXP0 (6)
SATA_RXN0 (6)
SATA_TXN0 (6)
SATA_TXP0 (6)
+5V
Connect to G-sensor INT2
CN7
GND14
GND1
GND2
GND3
GND15
6030D-13G20
14
1
2
RXP
RXN
TXN
TXP
DP
+5V
+5V
MD
GND
GND
SATA_TXP1_C
3
SATA_TXN1_C
4
5
SATA_RXN1_C
6
SATA_RXP1_C
7
8
ODD_PRSNT#_C
9
10
11
12
13
15
SSD_ID (6)
C584
0.01u/50V_4
R97 10K_4
C622 0.01u/50V_4
C616 0.01u/50V_4
C610 0.01u/50V_4
C606 0.01u/50V_4
R101 10K_4
C178 *15p/50V_4
C583
C586
*0.1u/16V_4
0.01u/50V_4
EC_ODD_EJ# (28)
+3V
SATA_TXP1 (6)
SATA_TXN1 (6)
SATA_RXN1 (6)
SATA_RXP1 (6)
R102 33_4
Prevent ESD/EOS Layout near device
+3V
+5VODD
C601
C585
10u/6.3V_6
*0.1u/16V_4
1A-8
C182 180P/50V_4
R483 *short/0_8
+
C588 *100u/6.3V_3528

D
ODD_PRSNT# (4)
+5V_ODD
ODD Power (SATA)
C
Reserve IOAC Power No Stuff
ODD_POWER(28)
PCH_ODD_EN(2)
R141 IOAC@0_4
R152 *IOAC@0_4
TPM NPCT650 (TPM)
B
AL000650K01 :NPCT650AAAWX
CLKRUN#(7,28)
PLTRST#(8,13,22,25,28)
C673
CLKRUN#
TPM@33P/50V_4
AL009655K01 AL000650K01
TPMM 1.2 TPMM 2.0
3/4 EMI request add 33p near TPM IC
A
CLKRUN#
PLTRST#
5
ODD_EN
1
R133 *IOAC@100K
2
LPC_LAD3(7,25,28)
LPC_LAD2(7,25,28)
LPC_LAD1(7,25,28)
LPC_LAD0(7,25,28)
LPC_LFRAME#(7,25,28)
IRQ_SERIRQ(7,28)
PCLK_TPM(7)
R633 TPM@0_4
R636 TPM@0_4
R648 *TPM@4.7K_4
LPCPD
+3VPCU
R167 IOAC@100K
5
VIN
1
2
2
ODD_EN_Q
3
2
6
4
1
SP@ BOM A,B,C P/N:AL009655K01(SLB9655TT1.2- FW4.31) RAMP P/N: AL000650K01 (NPCT650AAAWX)
+3V_S5
R647 TPM@0_6
LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0
LPC_LFRAME#
IRQ_SERIRQ
PCLK_TPM
TPM_CLKRUN#
TPM_LRESET#
LPCPD
+3V3_TPM
+5V
6
5
2
1
R110
1
IOAC@100K
IOAC@DMN601DWK-7 Q15
󱎱󴿓󰵓
NPCT650
+3V3_TPM
TPM@10u/6.3V_6C699
TPM@0.1u/16V_4C696
TPM@0.1u/16V_4C695
TPM@0.1u/16V_4C687
U36
15
LAD3
18
LAD2/SPI_IRQ
21
LAD1/MOSI
24
LAD0/MISO
20
LFRAME/SCS
27
SERIRQ
19
LCLK/SCLK
13
CLKRUN/GPIO04
17
LRESET/SPI_RST
28
LPCPD
26
NC7
31
NC8
Q14 IOAC@AO6402A
3
MOD_EN_5V
1
C189 IOAC@0.1u/25V_6
2
+3V3_TPM_VSB
14
8
22
VDD2
VDD1
VDD3
B.M.
GND1
GND2
9
33
16
4
ODD_EN_Q
R662 TPM@0_6
1
VSB
GPX/GPIO2
GPIO1
GPIO0/XOR_OUT
GPIO3/BADD
TEST
NC1
NC2
NC3
NC4
NC5
NC6
GND4
GND3
TPM@NPCT620/650_QFN32
32
23
4
IOAC@2N7002K
TPM@10u/6.3V_6C721
TPM@0.1u/16V_4C700
PP
+5V_ODD
R121 NAC@0_8
R139 IOAC@22_8
3
2
Q17
1
+3V_S5
4
TPM_PP
3
GPX
30
29
6
TPM_BADD
5
2
7
10
11
12
BADD SELECTION
25
01EEh - EFh
'1' - pin is left open. '0' - pin is pulled down.
+5V
TP84
TP85
TP87
TP86
R642 *TPM@10K_4
7Eh - 7Fh
POA(FPD)
+3V_LDO_EC
+3VPCU
+3V
USBP3+
USBP3-
+3VPCU
R650 *FPD@0_4
HOLE23 MBZAA002010
1
HOLE7 *H-TC315IC186BC146D146PT
1
3
+POA_PWR
R859 FPD@0_4
R860 *FPD@0_4
R865 *FPD@0_4
POA_FP_PWREN#(28)
Can not change to shortpad in ramp stage
R1526 FPD@0_4
R1527 FPD@0_4
USBP3+(6)
USBP3-(6)
C702
*FPD@0.01u/50V_4
R1531*FPD@0_4
R1532*FPD@0_4
R651 *FPD@10_4
MAINON(28,30,33,37)
C703 *FPD@0.1U/16V/X7R_4
HOLE2
*HG-C354D118P2
7
8
9
2
1
12/30 Delete Hole3 & Hole22 for DXF
HOLE11 *H-TC315IC186BC146D146PT
1
HOLE6 *H-TC315IC186BC146D146PT
SSD NUT
HOLE15 MBZAA001010
1
HOLE1 *h-c197d197n
HOLE16 MBZAA001010
1
HOLE14 *H-C118D118N
1
1
12/30 Modify Hole1
R652 FPD@10K/J_4
C927
*FPD@1000p/50V_4
2#13.
USBP3+_R3
USBP3-_R3
3
HOLE17 *H-O118X157D118X157N
R1528 FPD@0_4
R1529 FPD@0_4
USBP3+_U
USBP3-_U
HOLE13
*HG-Z8V-1
6
7
5
8
4
9
1
HOLE20 MBZAA001010
1
1
Hole14Hole17 to NC
2
U39
1
Y+
2
Y-
3
GND
9
VCC
10
SEL
*FPD@PI3USB102
6
5
4
3
2
1
HOLE10 *H-TC315IC186BC146D146PT
1
HOLE21
*HG-Z8V-3
7
8
9
1
2
+POA_PWR
C726 *FPD@2.2u/16V_6
1
Q45 FPD@AO3413
3
20mil 20mil
C731 FPD@4.7u/6.3V_6
USBP3+_R
USBP3-_R
4
M-
5
M+
6
USBP3-_R2
D-
7
USBP3+_R2
D+
8
OE#
6
5
4
3
2
R1530
*FPD@0_4
R666 FPD@0_4
+3V_POA
C724 FPD@0.01u/50V_4
POA_EN#(28)
POA_PWR_INT#(28)
POA_AUTH_ERR(28)
POA_POWERREQ(28)
R659 *FPD@0_4
*HG-C315D118P2
7
8
9
HOLE18
*HG-TC315BC236D118P2
7
8
9
3
2
1
HOLE8
*HG-TC354BC315D118P2
7
8
9
3
2
1
Can not change to shortpad
TP88
TP89
R1534*FPD@0_4
R1533*FPD@0_4
HOLE12
6
5
4
3
2
1
6
5
4
*HG-TC354BC315D118P2
7
6
8
5
9
4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
USBP3-_R
USBP3+_R
SPAD1 *SPAD-C315
HOLE19
USBP3+_R
USBP3-_R
1
3
2
1
HOLE4 *H-C315D118P2
D49 *FPD@D5V0X1B2LP-7B
2
1
USBP3+_R
D50 *FPD@D5V0X1B2LP-7B
2
1
USBP3-_R
+3V_POA_R
CN17
1
2
3
4
R1535FPD@0_4
R1536FPD@0_4
R1537FPD@0_4
R1538FPD@0_4
5
6
7
8
FPD@CONN_AOP
SEL OE# Y+ Y-
X Hi-Z Hi-Z
H
Spec define: High Active
HOLE9 EV@MBZRQ001010
1
SPAD2 *SPAD-C315
1
1/4 Add for DXF
6
5
4
12/31 Add for D-Shape Hole
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
HDD/ODD/TPM NPCT650
HDD/ODD/TPM NPCT650
HDD/ODD/TPM NPCT650
1
1
HOLE24 *o-z8v-1
10
9
H L L
For GPU skuWLAN NUT
SPAD4 *pad-z8v-2-np
1
1
M+ M-L
HOLE5 EV@MBZRQ001010
ZRW
ZRW
ZRW
24 46Monday, February 22, 2016
24 46Monday, February 22, 2016
24 46Monday, February 22, 2016
C
D-D+
B
1
A
1A
1A
1A
of
of
of
5
NGFF_M.2 WiFi & BT (NGF)
USBP4+
USBP4+(6)
USBP4-
USBP4-(6)
D
PCIE_T X6+_W LAN(6)
PCIE_T X6-_WL AN(6)
PCIE_R X6+_W LAN(6)
PCIE_R X6-_WL AN(6)
CLK_PC IE_WL ANP(6)
CLK_PC IE_WL ANN(6)
CLK_PC I_LPC(7)
LPC_LF RAME#(7,24,28)
Reserve only for Intel module no need to stuff by default 11/24
+3V_S5
C
SUSCLK(6)
NGFF_M.2 SSD (NGF)
B
CLK_PC I_LPC
LPC_LF RAME#
R17 **10K_4
SUSCLK
SATA_R XN1/PEG_ RXN10_L 2(6)
SATA_R XP1/PEG _RXP10 _L2(6)
SATA_T XN1/PEG_ TXN10_L 2(6 )
SATA_T XP1/PEG _TXP10 _L2(6)
SATA_R XP3/PEG _RXP9_ L0(6)
SATA_R XN3/PEG_ RXN9_L0(6)
SATA_T XN3/PEG_ TXN9_L0(6)
SATA_T XP3/PEG _TXP9_ L0(6)
CLK_PC IE_NGFF 1_N(6)
CLK_PC IE_NGFF 1_P(6)
PCIE_T X6+_W LAN
PCIE_T X6-_WL AN
PCIE_R X6+_W LAN
PCIE_R X6-_WL AN
CLK_PC IE_WL ANP
CLK_PC IE_WL ANN
WLAN_C LKREQ#
WLAN_W AKE_R #
R5 *0_4
R4 *0_4
For Debud Card use
Low
High
U1
1
NC
2
A
3
GND
*74AUP1G 07GW
SATA_R XN1/PEG_ RXN10_L 2
SATA_R XP1/PEG _RXP10 _L2
SATA_T XN1/PEG_ TXN10_L 2
SATA_T XP1/PEG _TXP10 _L2
SATA_R XP3/PEG _RXP9_ L0
SATA_R XN3/PEG_ RXN9_L0
SATA_T XN3/PEG_ TXN9_L0
SATA_T XP3/PEG _TXP9_ L0
CLK_PC IE_NGFF 1_N
CLK_PC IE_NGFF 1_P
NGFF3_D ET(6)
CLK_PC I_LPC_ C
LPC_LF RAME#_C
VCC
4
CN3
1
GND
3
USB_D+
5
USB_D-
7
GND
9
SDIO CLK(O)
11
SDIO CMDIO)
13
SDIO DAT0(IO)
15
SDIO DAT1(IO)
17
SDIO DAT2(IO)
19
SDIO DAT3(IO)
21
SDIO Wake(I)
23
SDIO Reset
25
KEY1
27
KEY2
29
KEY3
31
KEY4
33
GND
35
PETp0
37
PETn0
39
GND
41
PERp0
43
PERn0
45
GND
47
REFCLKP0
49
REFCLKN0
51
GND
53
CLKREQ0#
55
PEWake0#
57
GND
59
PETp1
61
PETn1
63
GND
65
PERp1
67
PERn1
69
GND
71
Reserved1
73
Reserved2
75
GND
WLAN_NG FF CONN(Typ e 2230)
Mini card +3V power enable
Mini card +3V power disable
+3V_S5
+WL_VD D
5
1
R19
C5
*10K_4
*0.1u/16V_ 4
2
4
WIFI_ SUSCLK
Y
R503 *Short/0_4
R502 *Short/0_4
R497 *Short/0_4
R496 *Short/0_4
12/17 Add R692 for Sata SSD
NGFF3_D ET
3
1
0.1u/16V_ 4C630
0.1u/16V_ 4C629
0.1u/16V_ 4C626
0.1u/16V_ 4C625
Q23
2N7002K
NGFF
2
3
+3VPCU (6,9,20,22,2 3,24,26,2 8,29,30,3 7,38,39)
+1.5V (9,23,37)
3.3Vaux
3.3Vaux
PCM_CLK
PCM_SYNC
PCM_IN
PCM_OUT
UART Wake
UART Rx
UART Tx
UART CTS
UART RTS
Clink RESET
CLink DATA
CLink CLK
COEX3
COEX2
COEX1
SUSCLK(32KHz)
PERST0#
W_DISABLE#2
W_DISABLE#1
NFC I2C SM DATA
NFC I2C SM CLK
NFC I2C IRQ
NFC Reset#
RESERVED3
RESERVED4
RESERVED5
3.3Vaux
3.3Vaux
+3V (2,4 ,6,7,8,9,11 ,12,13,15 ,19,20,21 ,22,23,24 ,26,27,28 ,30,31,32 ,33,34,37 ,38,39)
+WL_VD D
+WL_VD D
2
4
6
LED#1
8
10
12
14
16
LED#2
18
GND
20
22
24
Key 5
26
Key 6
28
Key 7
30
Key 8
32
34
36
38
40
42
44
46
48
50
52
WLAN_R ST#
54
BT_EN
56
RF_EN
58
60
62
64
LPC_LA D0_C
66
LPC_LA D1_C
68
LPC_LA D2_C
70
LPC_LA D3_C
72
+WL_VD D
74
WIFI_ SUSCLK
C498 180P /50V_4
R360 IO AC@0_4
R361 NAC @0_4
BT_EN (28)
RF_EN (28)
R358 *short_4
R357 *short_4
R355 *short_4
R354 *short_4
Rev:D change to shortpad
10u/6.3V_ 6C493
0.1u/16V_ 4C2
0.1u/16V_ 4C14
0.1u/16V_ 4C15
0.1u/16V_ 4C1
S0
S0
IOAC No Stuff
PLTRST #
LPC_LA D0
LPC_LA D1
LPC_LA D2
LPC_LA D3
APU Internal PU APU External nu-PU
WLAN_C LKREQ#
IOAC
WLAN_W AKE_R #
Leakage circuit (MPC)
+WL_VD D
+3V
R14
R15
4.7K/J_4
4.7K/J_4
IOAC_R ST# (22,28)
PLTRST # (8,13,22 ,24,28)
LPC_LA D0 (7,24,28)
LPC_LA D1 (7,24,28)
LPC_LA D2 (7,24,28)
LPC_LA D3 (7,24,28)
12/21 Change CN3 footprint to "ngff-nase0-s6701-ts48-ke-smt " for SMT requset
Q29 IOAC@AO3 413
1
3
R375
R369 *IOAC@10 0K/J_4
R370
1
R367 **IOAC@10 0K/J_4
R366
NGFF
GND
76
2
C506 *IOAC@10 00p/50 V_4
Q28 *IOAC@AO3 413
2
C501 **IOAC@10 00p/50 V_4
3.3V
3.3V
NC
NC
DAS
NOTCH/3.3V
NOTCH/3.3V
NOTCH/3.3V
NOTCH/3.3V
NC
NC
NC
NC
NC
NC
NC
NC
NC
DEVSLP
NC
NC
NC
NC
NC
PERST#
CLKREQ#
PEWake#
N/C
N/C
NOTCH
NOTCH
NOTCH
NOTCH
SUSCLK(32KHz)
3.3V
3.3V
3.3V
GND
NGFF_SS D
77
+3V_WL AN
3
+3V_WL AN
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
IOAC@0_ 8
+3V3_SA TA_N1
TP73
DEVSLP _N1
NGFF1_R ST#
PCIE_C LKREQ_ NGFF1#
TP74
TP76
+3V3_SA TA_N1
WLANPW R#(28)
Reserver +1.5v for WIFI module
SATA_R XN1/PEG_ RXN10_L 2_N
SATA_R XP1/PEG _RXP10 _L2_N
SATA_T XN1/PEG_ TXN10_L 2_N
SATA_T XP1/PEG _TXP10 _L2_N
SATA_R XP3/PEG _RXP9_ L0_N
SATA_R XN3/PEG_ RXN9_L0 _N
SATA_T XN3/PEG_ TXN9_L0 _N
SATA_T XP3/PEG _TXP9_ L0_N
+3V3_SA TA_N1
R692 *10K_ 4
R189 1M_4
NGFF3_P EDET
+3VPCU
C505
*IOAC@0.1 U/16V_4
WLANPW R#
Reserve IOAC No Stuff
+1.5V
C502
**IOAC@0.1 U/16V_4
WLANPW R#
No Stuff
CN8
1
GND
3
GND
5
PERn3
7
PERp3
9
GND
11
PETn3
13
PETp3/NOTCH
15
GND/NOTCH
17
PERn2/NOTCH
19
PERp2/NOTCH
21
GND/CONFIG_0
23
PETn2
25
PETp2
27
GND
29
PERn1
31
PERp1
33
GND
35
PETn1
37
PETp1
39
GND
41
PERn0/SATA-B+
43
PERp0/SATA-B-
45
GND
47
PETn0/SATA-A-
49
PETp0/SATA-A+
51
GND
53
REFCLKn
55
REFCLKp
57
GND
59
NOTCH
61
NOTCH
63
NOTCH
65
NOTCH
67
NC
69
PEDET
71
R183
GND
73
GND
75
*0_4
GND
IOAC@10 K_4
*IOAC@10 K_4
12/21 Change CN8 footprint to "ngff-nasm0-s6701-ts50-km-smt " for SMT requset
2
+3V
2N7002K DW
5
3
4
2
1
6
Q3
R363 *0/J _4
R368 *0/J _4
WIFI card reset (non-IOAC) WIFI card reset (IOAC) Debug card reset
C3
C510
*0.1u/16V_ 4
*10u/6.3V_ 6
10u/6.3V_ 6C638
0.1u/16V_ 4C639
0.1u/16V_ 4C642
0.1u/16V_ 4C643
0.1u/16V_ 4C637
+3V3_SA TA_N1
12/17 Delete R571 & Net "+3V3_SATA_N1_N"
R563 *Sho rt/0_4
DEVSLP 2
R561 *10 K_4
R562 *Sho rt/0_4
PLTRST #
+WL_VD D
R364 *10K_4
IOAC
EC_PCU
R365
*0_4
Stuff
+WL_VD D
R352 NAC @0_8
C13
C511
**0.1u/16V_4
**0.1u/16V_4
+3V3_SA TA_N1
R576 *sho rt/0_8
DEVSLP 2 (6 )
PCIE_C LKREQ_ NGFF1# (6)
1
S0
PCIE_C LKREQ_ WLAN# (6)
IOAC_W LAN_W AKE# (28)
PCIE_L AN_WAK E# (8,22)
S0
+3V
+3V

10u/6.3V_ 6C649
0.1u/16V_ 4C647
D
C
B
A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
ZRW
PROJECT :
ZRW
PROJECT :
Size Do cument Numbe r Rev
Size Do cument Numbe r Rev
Size Do cument Numbe r Rev
Mini-Card/WL/3G/SIM
Mini-Card/WL/3G/SIM
Mini-Card/WL/3G/SIM
Date: Sheet
Date: Sheet
Date: Sheet
5
4
3
2
ZRW
25 46Monday, February 22 , 2016
25 46Monday, February 22 , 2016
25 46Monday, February 22 , 2016
1
A
1A
1A
1A
of
of
of
KEYBOARD (KBC)
CN15
1
2
3
4
5
6
7
8
9
D
KB CONN
C
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
*VPORT_6
MY17
MY16
MY15
MY14
MY13
MY12
MY11
MY10
MY9
MY8
MY7
MY6
MY5
MY4
MY3
MY2
MY1
MY0
D30
KB_BL LED (KBC)
KB_BL_LED(28)
KBL@DTC144EU
B
G-sensor(ACS)
to CPU to SATA HDD
A
ACCEL_INTA
C420 *22P/50V_4
+G_SEN_PW
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7
R674 33_4
1
2
2
Q7
+3V
ACCEL_INTA(4)
ACCEL_INT2(24)
CLK_SDATA(7,11,12,19)
CLK_SCLK(7,11,12,19)
5
5
+5V
3
1
MY17 (28)
MY16 (28)
MY15 (28)
MY14 (28)
MY13 (28)
MY12 (28)
MY11 (28)
MY10 (28)
MY9 (28)
MY8 (28)
MY7 (28)
MY6 (28)
MY5 (28)
MY4 (28)
MY3 (28)
MY2 (28)
MY1 (28)
MY0 (28)
R33 KBL@10K_4
MX0 (28)
MX1 (28)
MX2 (28)
MX3 (28)
MX4 (28)
MX5 (28)
MX6 (28)
MX7 (28)
C735 180P/50V_4
Prevent ESD/EOS Layout near device
2
R265*GS@0_6
CLK_SDATA
CLK_SCLK
+G_SEN_PW
R267 *4.7K_4
R289 *4.7K_4
<EMI>
1
MX4
3
MX5
5
MX6
7
MX7
1
MY3
3
MY2
5
MY1
7
MY0
1
MY7
3
MY6
5
MY5
7
MY4
1
MY11
3
MY10
5
MY9
7
MY8
1
MX0
3
MX1
5
MX2
7
MX3
1
MY15
3
MY14
5
MY13
7
MY12
NBSWON# (28)
+5V
C36 KBL@2.2u/6.3V_6
1
Q5 KBL@AO3413
20mil 20mil
3
+5V_KB
C23 KBL@4.7u/6.3V_6
C388 *GS@0.1U/16V_4
+G_SEN_PW
G_MBDATA_R
G_MBCLK_R
R266 *shortGS@0_4
R269 *shortGS@0_4
R279 *shortGS@0_4
C22 KBL@0.01u/50V_4
+G_SEN_PW
C429
*GS@10u/6.3V_6
D6*GS@RB500V-40
D5*GS@RB500V-40
C389 *33P/50V_4
C400 *33P/50V_4
G_MBDATA_R
G_MBCLK_R
ACCEL_INTA_R
ACCEL_INT2_R
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2013/10/22 change CN25 pin define for spec.1A-7
2013/10/23 change CN25 footprint.1A-8
G_MBDATA_R
G_MBCLK_R
CP4 *220P_8P4R
CP1 *220P_8P4R
CP2 *220P_8P4R
CP3 *220P_8P4R
CP5 *220P_8P4R
CP6 *220P_8P4R
+3VPCU
10
MX4
MX6
MX5
MX7
U16
1
Vdd_IO
14
VDD
11
INT1
9
INT2
7
SA0
6
SDA
4
SCL
8
CS
*GS@LIS3DHTR
4
RP1 *10K_10P8R
1
2
9
3
8
4
7
6
5
CN4
4
3
2
1
KBL@KB_backlight
NC
NC
RESERVED
RESERVED
GND
GND
GND
GND
4
TPCLK_R
TPDATA_R
+3V
R690 10K_4
+TPVDD
1
CN19
1
2
3
FAN_3P

TP CN
10
8
9
7
6
5
4
3
2
1
CN16
4
5
D
C
3
2014/01/13 Change TP power rail from +3V_S5
TOUCHPAD BOARD CONN (TPD I2C/PS2 co-lay)
TPD->100kHz,TS=400Khz Intel design guide suggestion MCP PIN 10u. Per inch 3u TS=3x5inch 400kHz10~100u =2.4~0.4k. 100Khz 10~100u=9k~1k.
R668 TDI@0_4
*TDI@DMN601DWK-7
SMB1ALERT#(7)
1
4
Q48
R677 TDI@0_4
+3V_S5
R691 *10K_4
S5 S5
I2C0_SDA(4)
I2C0_SCL(4)
MX3
MX2
MX0
MX1
CPU FAN (THM)
R667 *short_4
+3V_S5
R670 10K_4
TPCLK(28)
TPDATA(28)
6
2
I2C_TP_SDA_R
I2C_TP_SCL_R
3
5
12/16 Change FAN design from PWM-type to DAC-type
+3V
+3V
2
1
1C-2
R669 10K_4
R672 *short_4
R673 *short_4
2.2U/6.3V_6
Q49 2N7002K
3
FAN1_DAC(28)
EC DAC SIGNAL
to +3V_SUS.
+3V_S5
R675*2.2K_4
R676*2.2K_4
I2C PU at CPU side
C747
2
PTP_PWR_EN#(28)
+TPVDD
C738
*0.1u/16V_4
TPD_INT#(4,28)
+5V
AL000991000 EOD, change to AL005606002
2
U40
1
2
VO
VIN
GND
1
GND
/FON
GND
4
GND
VSET
G991P11U
FANPWR = 1.6*VSET
2014/01/15 reserve TP power rail +3V_S5.1C-4
R671 0_6
1
C730
0.1u/16V_4
R658 *0_4
C737
*0.1u/16V_4
3
5
6
7
8
FAN1_RPM(28)
TH_FAN_POWER
2
1
1C1-1 2014/02/17 Add Q47 for PTP
power EN and soft up R694\C713.
*AO3413
Q47
2
C725 *1000p/50V_4
1A-12
and C712\C686.
3
+
C736
0.22u/25V_6
C739
0.1u/16V_4
50mil
I2C_TP_SDA_R
I2C_TP_SCL_R
TPD_INT#
TPD_EN
TPD_EN(28)
2013/10/18 Change CN21 Pin8 for
1A-5
I2C/PS2 TPD idendify.
2013/10/29 Change CN21 power rail to S5 change Q42 direction and net name, reseve PS2 PU to +3V.
30mils
C745
C746
2.2U/6.3V_6
C748 .01U/50V_4
*.01U/50V_4
1A-12013/10/15 change pin define and add pwm IC U17. 1A-42013/10/17 Change U17 to G991P11U and PU U17 pin1. 1A-92013/10/24 Add alert on U17.1 for CPU themal tempture. 1A-13 2013/10/31CN15 Pin2/3 swap.
6
5
R684 *1M_4
POWER LED(UIF)
R679 *1M_4
R683 *1M_4
Power LED
2
3
10
15
5
12
13
16
PWRLED#(28)
SUSLED#(28)
Battery
BATLED0#(28)
BATLED1#(28)
3
R348 71.5/F_4
R350 130/F_4
Rev:E change
R343 *1M_4
R680 *1M_4
R345 71.5/F_4
R344 130/F_4
Rev:E change
+3VPCU
+3V
+3VPCU
D10 *5.5V/25V/410P_4
2
1
LED_AMBER/BLUE
D11 *5.5V/25V/410P_4
+3VPCU
D13 *5.5V/25V/410P_4
2
1
LED_AMBER/BLUE
D12 *5.5V/25V/410P_4
0. 4"(',25)6
(78"(',25)6
2
1
Blue
LED1
3
Amber
2
1
2
1
Blue
LED2
Amber
1
3
2
R347 0_4
R349 *0_4
R681 0_4
R682 *0_4
2
+3VPCU
+3V_S5
+3VPCU
+3V_S5
+3VPCU
C740
39P/50V_4
for ESD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
ZRW
ZRW
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
KB/TP/FAN
KB/TP/FAN
KB/TP/FAN
ZRW
26 46Monday, February 22, 2016
26 46Monday, February 22, 2016
1
26 46Monday, February 22, 2016
of
of
of
B
A
1A
1A
1A
5
USB Charger to 3.0 (UBC)
+5VPCU
USB_OC0#(6)
USB_BC_ON(28)
D
GMT:AL003703000(G3703) TI:AL002544001(TPS2544) Silergy: AL055544000 (SLGC55544VTR)
USB_CHARGE_ON(28)
USB_CLT1(28)
+5VPCU
R339 100K_4
R337 10K_4
R336 10K_4
80 mils (Iout=2A)
C482 1U/10V_4
CTL2
CTL3
1
9
13
4
5
6
7
8
18
19
20
U19
IN
STATUS
FAULT
ILIM_SEL
EN
CTL1
CTL2
CTL3
GND
GND
GND
TPS2544RTER
ILIM_LO
ILIM_HI
GND_PAD
DM_IN
DP_IN
DM_OUT
DP_OUT
2
IOS_typ(mA) = 50,250/{RILIM_XX(KΩ)+0.1}
C476 470P/50V_4
3
C474
0.1u/16V_4
CTL1 CTL2 CTL3 ILIM_SEL SDP 1 1 1 0 CDP 1 1 1 1 DCP 0 1 1 X
RILIM_LO is optional and the ILIM_LO pin may be left unconnected if the following conditions are met:
1. ILIM_SEL is always set high
2. Load Detection - Port Power Management is not used
3. Mouse / Keyboard wake function is not used If conditions 1 and 2 are met but the mouse / keyboard wake function is also desired, it is recommended to use RILIM_LO < 80.6 kΩ. The following equation programs the typical current limit: (1) RILIM_XX corresponds to either RILIM_HI or RILIM_LO as appropriate.
4
USBPWR0
12
OUT
15
ILIM_LO
(RILIM_LO 1.2A)
16
ILIM_HI
(RILIM_HI 2.3A)
17
14
GND
11
USBP0-_C
10
USBP0+_C
2
3
21
GND
22
GND
80 mils (Iout=2A)
+
C477
R338
R340 20K/F_4
iPAD charging current is about 2.1A so set on 2.3A
1.2A current limit of USB 3.0 SDP mode
USBP0- (6)
USBP0+ (6)
39K/F_4
100u/6.3V_1206
1

D
USB 3.0 Connector (UB3)
C
USBON#(28)
USB_OC1#(6)
B
USB2.0 DB (UB2)
USB_OC2#(6)
A
+5V_S5
C422
1u/6.3V_4
USBON#
Enable: Low Active /2.5A BCD:AL002822000 GMT:AL000524007
1u/6.3V_4 C694
USBON#
USB_OC2#
USBP2-(6)
USBP2+(6)
HP_JD#(23)
SLEEVE(23)
RING2(23)
HP-L3(23)
HP-R3(23)
5
U17
5
IN
4
/EN
G524B2T11U
+5V_S5
5
4
USBP2-
USBP2+
OUT
GND
/OC
U38
IN
/EN
G524B2T11U
USBPWR2
HP_JD#
SLEEVE
RING2
HP-L3
HP-R3
USBP0-_C
USBP1-(6)
USBP1+(6)
C490
0.1u/16V_4
USB3_RXN0(6)
USB3_RXP0(6)
USB3_RXN1(6)
USB3_RXP1(6)
R346 6.2K/F_4
USBP7-(6)
USBP7+(6)
R342 *0_4
3
USBP0+_C
C484 *1.6P/50V_4
C483 *1.6P/50V_4
C481 0.1u/16V_4
C479 0.1u/16V_4
C452 *1.6P/50V_4
C451 *1.6P/50V_4
C445 0.1u/16V_4
C442 0.1u/16V_4
C488 1u/10V_4
C489
0.1u/16V_4
RREF
VCC_XD
SDREG
USB3_TXN0_C
USB3_TXP0_C
USB3_TXN1_C
USB3_TXP1_C
C491 1u/ 10V_4
U21
1
RREF
2
DM
3
DP
4
3V3_IN
5
CARD_3V3
6
SDREG
GND
25
TP44
XD_D7
V18
23
24
V18
RTS5170
XD_CD#
8
7
SD_WP/MS_D1
XD_CD#
TP42
USBPWR0
CN14 USB3.0 CONN
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
13
C480
C478
*1.6P/50V_4
*1.6P/50V_4
USBPWR1
CN12 USB3.0 CONN
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
13
C443
C446
*1.6P/50V_4
*1.6P/50V_4
SD_WP/MS_D1
SD_CDZ
SD_D2/MS_D5
TP49
TP50
TP47
2
SD_D1/MS_D7
SD_D0/MS_D6
SD_CLK
VCC_XD
SD_CMD
SD_D3/MS_D4
R696 *2K/F_4
12/31 Add R696 for discharge
EMI
C1648 *10p/50V_4
TP48
TP46
SP11
SD_D3/MS_D4
SD_D2/MS_D5
SP14
22
21
20
19
SP14
SP13
SP12
SP11
18
XD_D7
SP3
SP2
SP1
9
11
10
SD_D0/MS_D6
SD_D1/MS_D7
SP2
TP45
TP43
SD_CMD
SP10
17
GPIO0
GPIO0
16
SP9
SP9
15
SD_CLK
SP8
14
SP7
SP7
13
SD_CDZ
SP6
SP5
SP4
12
SP5
VBUS D­D+ GND SSRX­SSRX+ GND SSTX­SSTX+
12
13
11
12
10
11
VBUS D­D+ GND SSRX­SSRX+ GND SSTX­SSTX+
12
13
11
12
10
11
R351 0_4
10
10
reserve for EMI
C486
4.7u/6.3V_6
0218 reserve for EMI
C1647 *10p/50V_4
USBPWR0
C475
0.1u/16V_4
USBP0-_C
USB3_RXP0
USB protection diodes for ESD. as close as possible to USB connector pins.
USBPWR1
C447
0.1u/16V_4
C485
0.1u/16V_4
C1643 *10p/50V_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
U20
1
USB3_TXP0_C
I/O 1
10
USB3_TXN0_C
I/O 6
2
VDD
9
GND_2
3
NC_1
8
NC_2
4
I/O 2
7
USBP0+_C
I/O 5
5
I/O 3
6
USB3_RXN0
I/O 4
GND_1
11
USB30_ESD_AZ1065-06F.R7G
U18
1
USB3_TXN1_C
USBP1-
USB3_RXP1
USB protection diodes for ESD. as close as possible to USB connector pins.
SD_CLK_R
I/O 1
10
USB3_TXP1_C
I/O 6
2
VDD
9
GND_2
3
NC_1
8
NC_2
4
I/O 2
7
USBP1+
I/O 5
5
I/O 3
6
USB3_RXN1
I/O 4
GND_1
11
USB30_ESD_AZ1065-06F.R7G
CN1
11
WP
10
CD
9
DATA2
8
DATA1
7
DATA0
6
VSS2
5
CLK
4
VDD
3
VSS1
2
CMD
1
CD/DATA3
C1646
C1645
C1644 *10p/50V_4
USB3/Charger/CR/USB2 DB
USB3/Charger/CR/USB2 DB
USB3/Charger/CR/USB2 DB
*10p/50V_4
*10p/50V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
GND
GND
GND
15
12
13
14
SD_CLK_R
SD_CMD
SD_D2/MS_D5
SD_D1/MS_D7
SD_D0/MS_D6
SD_D3/MS_D4
ZRW
ZRW
ZRW
27 46Monday, February 22, 2016
27 46Monday, February 22, 2016
27 46Monday, February 22, 2016
NC
NC
GND
SD-CARD
C
B
16
17
A
1A
1A
1A
of
of
of
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
4
USBP0-_C
USBP0+_C
USB3_RXN0
USB3_RXP0
USB3_TXN0_C
USB3_TXP0_C
USBP1-
USBP1+
USB3_RXN1
USB3_RXP1
USB3_TXN1_C
USB3_TXP1_C
USBPWR2
C701
C717 10U/6.3V_6
100U/6.3V_1206
Pin Numbers: USBPWR: 5 GND: 7 Audio Signal: 5 ADOGND: 4 NC: 1 USBP2+/-: 2
TP99
TP101
TP90
TP91
TP93
TP111
TP113
TP102
TP103
TP105
TP104
TP92
12/18 Add for ESD
12/18 Add for ESD
Card Reader (CRD)
+3V
R341 *short/0_6
+3V_CR
C487
4.7U/6.3V_6
USB3_TXN0(6)
USB3_TXP0(6)
USB3_TXN1(6)
USB3_TXP1(6)
TP95
TP94
TP97
TP96
TP98
TP100
Close USB3.0
1
2
3
OUT
GND
470P/50V_4
1
2
3
/OC
USBPWR1
C417
C418
C433
0.1u/16V_4
100U/6.3V_1206
TP107
TP106
TP109
TP108
TP110
TP112
C714
C713
470P/50V_4
0.1u/16V_4
Enable: Low Active /2.5A BCD:AL002822000 GMT:AL000524007
ADOGND
CN13
CONN SMD FFC 24P 1R FR(P0.5,H2.0)
EC(KBC)
+3V_LDO_EC
+3VPCU_EC and +3V_RTC minimum trace width 12mils.
D
+3V_LDO_EC
1
2
R603 100K_4
2
1
C653 1u/6.3V_ 4
TS_EN(20)
Prevent ESD/EOS Layout near device
C
12/16 SWAP with "TS_EN_C" to pin81
Prevent ESD/EOS Layout near device
EC_ODD_EJ#(24)
R602 *22_4
B
R270 33_4
C387 180P/50V_4
12/16 SWAP with "FAN1_DAC" to pin32
CLK_PCI_EC
C651 *10p/50V _4
FAN1_DAC(26)
C666 180P/50V_4
5
R616 2.2_6
1
D17 SDMK0340 L-7-F
R621 33_4
2
CLK_PCI_EC(7)
LPC_LFRAME#(7,24,25)
TS_EN_C
SIO_EXT_S CI#(2)
PLTRST#(8,1 3,22,24 ,25)
C662
0.1u/16V _4
PCH_SUSPWRDNACK(8)
IOAC_WLAN_WAKE#(25)
IOAC_LAN_WAKE #(22)
PCH_SPI_CLK_EC(7 )
SPI_CS0# _UR_ME(7 )
TS_EN_C
DDR4_SUSO N_2V5(33)
PCH_SPI_SO_EC(7 )
PCH_BLON_R(20)
PCH_SPI_SI_EC(7)
+3V_S5
EC_PWROK(8)
AMP_MUTE#(23)
ODD_POW ER(2 4)
TEMP_MBAT#(29)
WLANPW R#(25)
PCBEEP_EC(23)
+1V_S5_ON(3 1)
PTP_PWR_EN#(2 6)
L11 BLM15AG121SN1D(1 20,500MA)_4
12 mils
C658
C661
0.1u/16V _4
0.1u/16V _4
R601 *2.2_6
+3V
LPC_LAD0(7,24,25 )
LPC_LAD1(7,24,25 )
LPC_LAD2(7,24,25 )
LPC_LAD3(7,24,25 )
IRQ_SERIRQ(7,24)
SIO_RCIN#(7)
KB_BL_L ED(2 6)
DNBSWON#(8)
SUSB#(8,31)
ME_WR#(4)
1
1
R605 2.2_6
C359 180P/50V_4
PROCHOT_EC
TP81
Pin 80 EC_APWROK reserve TP
TP82
ACIN(29 )
+1V_S5_ON
EC_ODD_EJ_R#
MY16(26 )
MY17(26 )
S5_ON(30,37)
S5_ON
MY0(26)
MY1(26)
MY2(26)
MY3(26)
MY4(26)
MY5(26)
MY6(26)
MY7(26)
MY8(26)
MY9(26)
MY10(26 )
MY11(26 )
MY12(26 )
MY13(26 )
MY14(26 )
MY15(26 )
C660
0.1u/16V _4
2
2
C667
0.1u/16V _4
WRST#
ECAGND
C356
C654
+A3VPCU
+3VPCU_EC
0.1u/16V _4
+3V_EC
0.1u/16V _4
10
9
8
7
22
13
6
17
126
5
15
23
14
4
16
113
123
80
119
33
88
81
87
109
108
71
72
73
35
34
122
95
94
105
101
102
103
56
57
32
100
125
36
37
38
39
40
41
42
43
44
45
46
51
52
53
54
55
MX0(26)
MX1(26)
MX2(26)
MX3(26)
MX4(26)
MX5(26)
MX6(26)
MX7(26)
U35
4
11/11 FAE suggestion pin106 +3V_RTC change to +3VPCU_EC
C665
0.1u/16V _4
VSTBY_FSPI
121
114
92
50
26
11
LAD0/GPM0(3)
LAD1/GPM1(3)
LAD2/GPM2(3)
LAD3/GPM3(3)
LPCRST#/GP D2
LPCCLK/GPM4(3)
LFRAME#/G PM5(3)
LPCPD#/GPE6
GA20/GPB5(3)
SERIRQ/GP M6(3)
ECSMI#/GP D4(3)
ECSCI#/GP D3
WRST#
KBRST#/GPB6(3)
PWUREQ#/BBO/SMCLK2ALT/G PC7(3)
CRX0/GPC0
CTX0/TMA0/GPB2(3)
DAC4/DCD0# /GPJ4(3)
DSR0#/GPG6
GINT/CTS0#/GP D5
PS2DAT1/RTS0 #/GPF3
DAC5/RIG0#/GPJ5(3)
PS2CLK1/DTR0#/GPF2
TXD/SOUT0/GPB1
RXD/SIN0/G PB0
ADC5/DCD1# /GPI5(3)
ADC6/DSR1#/GPI6(3)
ADC7/CTS1#/ GPI7(3)
RTS1#/GPE5
PWM7/RIG1#/GPA 7
DTR1#/SBUSY/GPG1/ID7
CTX1/SOUT1/GPH2/SMDAT3/ID2
CRX1/SIN1/SMCLK3/G PH1/ID1
FSCK/GPG7
FSCE#/GPG3
FMOSI/GPG 4
FMISO/GPG 5
KSO16/SMOSI/GPC3 (3)
KSO17/SMISO/GPC5 (3)
PWM6/SSCK/GPA6
SSCE0#/G PG2
SSCE1#/G PG0
KSO0/PD0
KSO1/PD1
KSO2/PD2
KSO3/PD3
KSO4/PD4
KSO5/PD5
KSO6/PD6
KSO7/PD7
KSO8/ACK #
KSO9/BUS Y
KSO10/PE
KSO11/ERR#
KSO12/SLCT
KSO13
KSO14
KSO15
VCC
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
LPC
CIR
EXTERNAL SERIAL FLASH
SPI ENABLE
KBMX
KSI7
KSI6
KSI5
KSI4
KSI3/SLIN#
KSI2/INIT#
KSI1/AFD#
KSI0/STB#
65
64
63
62
61
60
59
58
+3VPCU_ECPLL
L9
BLM15AG121SN1D(1 20,500MA)_4
C657
0.1u/16V _4
97
99
98
20
19
82
84
83
74
127
106
AVCC
VSTBY(PLL)
VSTBY_FSPI
3
GPH7
ID6/GPH6
EGAD/GPE1
EGCLK/GPE3
EGCS#/GPE2
ID5/GPH5
L80LLAT/GPE7
L80HLAT/BAO/GPE0
GPIO
IT8987E/CX LQFP
UART port
VSS
1
R622*0_4
R609*0_4
R262*Short/0_4
R234*0_4
VSS
49
27
WAKE UP
RING#/PW RFAIL#/CK32KOUT/L PCRST#/GPB 7
VSS
AVSS
VSS
91
VCORE
VSS
75
12
104
C655
ECAGND
L10
EC_GND
BLM15AG121SN1D(1 20,500MA)_4
0.1u/16V _4
(For PLL Power)
93
96
SM BUS
ID4/GPH4
ID3/GPH3
PECI/SMCLK2/GPF6(3 )
SMDAT2/PECIRQT#/GPF7(3 )
CLKRUN#/ID0/GPH0
PS/2
PS2CLK0/CEC/TMB0/GPF0
PS2DAT0/TMB1 /GPF1
PWM
TACH0A/GPD6 (3)
TACH1A/TMA1/G PD7(3)
A/D D/A
DAC2/TACH0B/GPJ2(3)
DAC3/TACH1B/GPJ3(3)
CLOCK
AJ089870F02 IT8987E/CX
3
+3VPCU_EC
SB_ACDC (8 )
POA_EN# (24)
POA_PW R_INT# (24)
POA_POW ERREQ (24)
TP80
USBON# (27)
USB_BC_O N (27)
USB_CHARG E_ON (27)
CLKRUN# (7,24)
SMCLK0/GPB3
SMDAT0/GPB 4
SMCLK1/GPC1
SMDAT1/GPC2
PS2CLK2/GPF4
PS2DAT2/GPF5
PWM0/GPA0
PWM1/GPA1
PWM2/GPA2
PWM3/GPA3
PWM4/GPA4
PWM5/GPA5
TMRI0/GPC4(3)
TMRI1/GPC6(3)
PWRSW /GPE4
RI1#/GPD0 (3)
RI2#/GPD1
ADC0/GPI0 (3)
ADC1/GPI1 (3)
ADC2/GPI2 (3)
ADC3/GPI3 (3)
ADC4/GPI4 (3)
TACH2/GPJ0(3 )
GPJ1(3)
GPJ7
GPJ6
IT8987/CX
Prevent ESD/EOS Layout near device
R617 33_4
C663 180P/50V_4
110
MBCLK
111
MBDATA
115
2ND_MBCLK
116
2ND_MBDATA
117
EC_PECR_R
118
LID#_C
R607 33_4
C659 180P/50V_4
85
86
89
90
24
25
28
SUSLED#
29
30
31
47
48
120
124
107
NBSWON#
18
21
HWPG
112
ICMNT
66
67
C398 10u/6.3 V_6
68
69
70
76
77
SYS_HWP G
78
79
2
128
R606 33_4
Prevent ESD/EOS Layout near device
C656 180P/50V_4
+3V_S5
MBCLK (29)
MBDATA (29 )
2ND_MBCLK (7,16)
2ND_MBDATA (7,1 6)
LID# (20)
R612 *0_4
R613 0_4
TPD_EN (26)
+3V_LDO_EC
R608 43_4
Prevent ESD/EOS Layout near EC
IOAC_RST# (22 ,25)
EC_FPBACK# (20)
TPCLK (26)
TPDATA (26 )
PWRLED# (26)
BATLED1# (26)
SUSLED# (26)
BATLED0# (26)
MAINON (24,3 0,33,37 )
USB_CLT1 (27)
FAN1_RPM (26)
POA_AUTH_E RR (24)
SUSON (8)
DGPU_OTP# (16)
NBSWON# (26)
SUSC# (8)
HWPG (8)
RSMRST# (8)
ICMNT (29)
ECAGND
DGPU_OPP # (16)
VRON (8)
LANPWR# (22)
POA_FP_PWREN# (24)
PCH_PWROK (8)
CLR_CMOS (6)
SYS_SHDN# (2,30,37)
TPD_INT# (4,26)
SM BUS ARRANGEMENT TABLE
SM Bus 1
SM Bus 2
SM Bus 3
SM Bus 4
VSTBY_FSPI
Prevent ESD/EOS Layout near device
R623 33_4
C668 180P/50V_4
12/16 Add D32 for production-line requset
H_PECI (2)
TVS PN: Priority1: CY000220Z00 Priority2: CY402220B00
Prevent ESD/EOS Layout near device
R618 33_4
C664 180P/50V_4
Battery
PCH/VGA
LID#_C
2
RF_EN (25 )
BT_EN (2 5)
2
D32 TVM0G5R5M220R
1
S5_ON
NBSWON#
DGPU_OTP#
DGPU_OPP #
MAINON
SUSON
VRON
PCH_SPI_SI_EC
PCH_SPI_SO_EC
SM BUS PU(KBC)
MBCLK
Battery module
UMA& VGA SKU Need Stuff
HWPG(KBC)
MBDATA
2ND_MBCLK
2ND_MBDATA
PROCHOT_EC
DDR=1.5V, D1 DNP and D2 POP DDR=1.35V, D1 POP and D2 DNP
HWPG_1 .5V(37)
HWPG_1 .8VS5(37)
HWPG_V DDR(33)
HWPG_1 VS5(31)
SYS_HWP G(30)
HWPG_+VCCOPC(32)
HWPG_2 .5V(33)
R599 100K_4
R615 10K_4
R260 10K_4
R232 EV@10K_ 4
R620 EV@10K_ 4
R256 100K_4
R239 100K_4
R619 100K_4
R614 *10K_4
R263 *10K_4
R611 4.7K_4
R610 4.7K_4
R247 2.2K_4
R243 2.2K_4
3
Q40
2
2N7002K
1
D23 RB500V-40
D22 *RB50 0V-40
D27 *RB50 0V-40
D24 *RB50 0V-40
D18 *RB50 0V-40
D19 *RB50 0V-40
D25 *RB50 0V-40
1
+3V_LDO_EC

+3V_GFX
+3V_LDO_EC
+3V_S5
H_PROCHOT# (2,29,34)
+3V
R604 10K_4
HWPG
D
C
B
+3V_LDO_EC
NBSWON#
A
R641 10K_4
C693
0.1u/16V _4
1
2
5
Reserve switch for test (MP remove)
SW2 POWER_ SW
3
4
6
5
Reset SW (FSW)
Battery Detect Switch
R689 *0_4
BI(29)
3
4
4
12/14 Add R689 for Acer requset
SW3
2
1
3
PJA138K
1
Q37
+3V_GFX(13,15,16,39)
Vgs = 1.5V
2
+3VPCU(6,9,20,22,23,24 ,25,26,29,30,37 ,38,39)
+3V(2,4,6,7,8,9,1 1,12,13 ,15,19,20,21,22,23,24, 25,26,27,30,31,32,33,3 4,37,38 ,39)
+3V_S5(2,3,4,6,7 ,8,9,22,24,25,2 6,30,32 ,33,38)
1
C634 *0.1u/25V_6
2
+3V_RTC
1
2
3
1
R536 100K_4
4
2
BI_GATE
SW1 POWER_ SW
6
5
R581 *10K_4
C646 *0.1u/16V_4
*PJ4N3KDW
3
R592 *0_4
R591 *0_4
Q38
+3V_RTC
+3VPCU
WRST#
Vgs = 1.5V
3
5
2
6
4
1
Reserve no stuff
A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
PROJECT :
KBC IT8587
KBC IT8587
KBC IT8587
ZRW
ZRW
ZRW
28 46Monday, February 22, 2016
28 46Monday, February 22, 2016
1
28 46Monday, February 22, 2016
1A
1A
1A
of
of
of
5
Double Check ADP-In Type
12/22 Change PJ2 footprint to "50320-0040n-001-4p-l-smt" & reverse Pin1~4 for SMT request
PJ2
4
3
2
1
D
C
B
Power conn
PC14
0.1u/50V_6
ACIN(28)
UMA-> PR342 CS31542FB14 15.4K 1/16W +-1% (0402) For 78W Dis -> PR342 CS31272FB17 12.7K 1/16W +-1% (0402) For 95W
PC167
0.1u/50V_6
PC168
*100p/50V_4
9
8
7
6
5
4
3
2
10
1
50458-00801-V01
PJ1
PR10 *0_4
PR14 100_4
Double Check BATT-In Type
A
PC10
*47p/50V_4
1
2
PD3
PDZ5.6B
5
PR13 100_4
PC13
2200p/50V_4
PR39 100K/F_4
PR40 100K/F_4
1
2
PD4
PDZ5.6B
REGN6V
BAT-V
TEMP_MBAT#
PR18 1M_4
PR12 100_4
1
2
PMON(34)
PC11
*47p/50V_4
PD2
P4SMAFJ20A
VA
PR23
12.7K/F_4
MBCLK (28)
MBDATA (28)
PD1 SV1040
1
2
ICMNT(28)
TP1
PMON
BI (28)
TEMP_MBAT# (28)
+3VPCU
1
2
BAT-V
PC164
PC165
10U/25V_8
2200p/50V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
%
BAT-V
PC166
10U/25V_8
ZRW
ZRW
ZRW
29 46Monday, February 22, 2016
29 46Monday, February 22, 2016
29 46Monday, February 22, 2016
D
C
B
A
1A
1A
1A
of
of
of
VIN
5
2
3
5
2
3
2
2
PR7 10/F_6
PQ30
AON7410
1
PQ29
AON7410
1
3
1
2
PC7 2200p/50V_4
2200p/50V_4
PR33 *4.7_6
PC19 *680p/50V_6
PQ28 *EV@2N7002K
PQ2 AON6414AL
3
5
2
1
4
PR4 *short_6
VIN
PC172
10u/25V_8
PL5
6.8uH_7X7X3
GPU_THROTTING# (16)
PC170
PC17
*0.01u/50V_4
PR209
0.01/F_0612
1
PR208
PR210
*short_4
*short_4
24780_SRP
24780_SRN
REGN MAX voltage 6.5V V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr =0.793V for 3.965A current limit
ILIM=0.793V Rsr = 0.01ohm
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Charger (BQ24780S)
Charger (BQ24780S)
Charger (BQ24780S)
Date: Sheet
Date: Sheet
Date: Sheet
36
GND
GND
37
0.1u/50V_6
2
BQ24780SRUYR
GND
PROCHOT
38
10
+VCCIO
3
PC25
ACP
PU1
BATPRES
15
22
PR8 *short_4
TEMP_MBAT#
H_PROCHOT#
PR22 *100K_4
PR3
0.01/F_0612
2
1
REGN6V
PR11 0_6
24780_ACN
24780_ACP
PC9
2.2u/10V_6
24780_SRP
24780_SRN
PC15 47n/50V_6
PC3
0.1u/25V_4
PC6
0.1u/25V_4
PC4
0.1u/25V_4
PC12
0.1u/50V_6
4
4
PR2 0_4
PR1 0_4
24780_ACP
24780_ACN
PC35
0.1u/50V_6
1
PAD
GND
30
29
18
24780_BATDRV
BATDRV
ACN
17
24780_BATSRC
BATSRC
24
24780_REGN
REGN
25
24780_BST
BTST
26
24780_DH
HIDRV
27
24780_LX
PHASE
23
24780_DL
LDODRV
PR5 0_6
20
SRP
SRN
GND
GND
GND
GND
GND
34
33
32
31
PR6 0_6
19
$8"18!8 8. 8/8698:"8 !
PR205 *0_4
H_PROCHOT# (2,28,34)
24780_CMPOUT
4
PC1 1n/50V_4
PC20
100P/50V_4
PR204 316K/F_4
PQ1 AON6414AL
5
PR16 20_1206
PC37
PR206 100K/F_4
3
2
1
4
PR30 *short_4
PR19 *short_4
PR17 *short_4
PR32 *short_4
PR26 *short_4
PR25 *short_4
100P/50V_4
PR29
4.02K/F_4
PC16
0.47u/25V_6
PC8
0.01u/50V_4
VA2
PC2
47n/50V_6
24780_CMSRC
24780_ACDRV
24780_VCC
24780_ACDET
24780_BM#
24780_CMPOUT
24780_ILIM
24780_CMPIN
PR207 100K_4
PR28
4.02K/F_4
3
4
28
6
5
11
12
7
8
9
16
14
21
13
PC36
0.1u/50V_6
CMSRC
ACDRV
VCC
ACDET
ACOK
SDA
SCL
IADP
IDCHG
PMON
TB_STAT
CMPOUT
ILIM
CMPIN
GND
35
VA1
3
PC5
0.1u/50V_6
PR31 866K/F_4
PR211 137K/F_4
MBDATA
MBCLK
ICMNT
D/C#
/.99
PC18
+3VPCU
*100P/50V_4
PR9 10K_4
PR15 *10K_4
Check PU high with HW side
4
3
PC139
10u/25V_8
+3VPCU
3.3 Volt +/- 5% TDC : 5.53A PEAK : 7.4A OCP : 10A Width : 240mil
PR188
6.49K/F_4
PC126
0.1u/50V_6
220u/6.3V_6X4.2
PR189
9.31K/F_4
1

VIN
D
C
PC124
+3VPCU
+
PR178
1/F_6
2
PQ22
AON7410
4
3
PC149
0.1u/50V_6
4
PQ24
3
AON7752
Rds(on)=14.5m ohm
PC136
2200p/50V_4
5
1
2
PL3
2.2uH_7X7X3
5
PR168 *4.7_6
1
2
PC131
*680p/50V_6
PR189 change to 9.31K for IR camera
+3VPCU
PR183 10K/F_4
3
PR171 *short_6
13
VREG5
PU9
TPS51225RUKR
CS2
CS1
5
1
51225_CS2
51225_CS1
PR182 120K/F_4
PR190 102K/F_4
3V_LDO
PR186 10K/F_4
PC142 0.1u/25V_4
51225_VIN
12
26
PC151 4.7u/6.3V_6
3
VIN
GND
GND
25
24
PR192 *short_6
6
SYS_SHDN#
EN2
VREG3
10
51225_DH2
DRVH2
9
51225_VBST2
VBST2
8
51225_SW2
SW2
11
51225_DL2
DRVL2
4
51225_FB2
VFB2
21
GND
22
GND
GND
GND
23
OCP:10A
L(ripple current) =(9-3.3)*3.3/(2.2u*0.355M*9) ~2.676A Iocp=10-(2.676/2)=8.662A Vth=(8.662A*14.5mOhm)+1mV=126.599mV R(Ilim)=(126.599mV*8)/10uA =101.279K
VL
PC141 10u/6.3V_6
7
PGOOD
20
EN1
16
DRVH1
17
VBST1
18
SW1
15
DRVL1
2
VFB1
14
VO1
VCLK
19
PR167 *4.7_6
4
SYS_SHDN#(2,28,37)
PC135
2200p/50V_4
PC130
*680p/50V_6
SYS_SHDN#
SYS_HWPG(28)
SYS_SHDN#
PR179
PR181
PC148
100K/F_4
51225_EN1
PR177
1/F_6
PR180
*short_4
51225_DH1
51225_VBST1
51225_SW1
51225_DL1
51225_FB1
*short_4
5
PQ21
AON7410
4
1
2
3
4
PQ23
AON7752
0.1u/50V_6
5
1
2
3
5
VIN
D
C
+5VPCU
PC127
220u/6.3V_6X4.2
1
+
PC128 33u/25V_6x4.5
2
+5VPCU 5 Volt +/- 5% TDC : 7A PEAK : 9.3A OCP : 12A Width : 2800mil
+
PC125
0.1u/50V_6
PR184
15.8K/F_4
PR185 10K/F_4
PC140
10u/25V_8
2.2uH_7X7X3
PL2
Rds(on)=14.5m ohm
OCP:12A
L(ripple current) =(9-5)*5/(2.2u*0.3M*9) =3.367A Iocp=12-(3.367/2)=10.316A Vth=(10.316A*14.5mOhm)+1mV=150.589mV R(Ilim)=(150.589mV*8)/10uA ~120.47K
Power auto recovery
3V_LDO
+3VPCU
PR312 0_6
PR287 *0_6
+3V_LDO_EC
B
PC133 10U/6.3V_6
+3VPCU
PC137
0.1U/16V_4
PC145
0.1U/16V_4
PR172 *short_8
PC143 1u/25V_4
13
14
4
3
PC147 *0.1U/16V_4
1000P/50V_4
VOUT1
VOUT1
VBIAS
ON1
PC129
2
1
2
VIN1
VIN1
PU8
APL3523A
CT1
12
Soft-Start
6
VIN2
7
VIN2
CT2
10
PC132 1000P/50V_4
+3VPCU
PR173 *short_8
PC144 1u/25V_4
8
OUT2
9
OUT2
GND
GND
ON2
PC138
11
0.1U/16V_4
15
5
PR176 *short_4
PC146 *0.1U/16V_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
MAINON
SYSTEM 5V/3V (TPS51225R)
SYSTEM 5V/3V (TPS51225R)
SYSTEM 5V/3V (TPS51225R)
TDC : 3.15A PEAK : 4.2A Width : 140mil
PC134 10U/6.3V_6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
+3V
ZRW
ZRW
ZRW
of
30 46Monday, February 22, 2016
of
30 46Monday, February 22, 2016
of
30 46Monday, February 22, 2016
6
VIN2
10
7
VIN2
OUT2
OUT2
GND
GND
ON2
CT2
PC101 1000P/50V_4
+5VPCU
8
9
11
15
5
PR129 *short_8
PC104 1u/25V_4
PC102
0.1U/16V_4
PR132 *short_4
PC107 *0.1U/16V_4
PC98 10U/6.3V_6
MAINON
TDC : 3.6A PEAK : 4.8A Width : 160mil
+5V
PR127 *short_8
MAINON (24,28,33,37)
TDC : 1.05A PEAK : 1.4A Width : 60mil
+3V_S5
+5VPCU
PR169 *short_8
S5_ON
PR175 *short_4
PR174 *short_4
+5VPCU
PR130
PC99
0.1U/16V_4
PC108
0.1U/16V_4
*short_8
PC103 1u/25V_4
13
14
4
3
PC106 *0.1U/16V_4
1000P/50V_4
VOUT1
VOUT1
VBIAS
ON1
PC100
1
VIN1
2
VIN1
PU5
APL3523A
CT1
12
TDC : 3.38A PEAK : 4.5A Width : 140mil
+5V_S5
PR128 *short_8
+5VPCU
A
S5_ON
S5_ON(28,37)
PC97 10U/6.3V_6
PR136 *short_4
PR131 *short_4
Soft-Start
5
4
3
B
A
1A
1A
1A
5
4
3
2
1

PU16
D
HWPG_1VS5(28)
G5335-AGND-1
+5VPCU
PR275 100K/F_4
+5VPCU
PR98 *0_4
PR272 *short_4
PR104 10_6
+3V
PC234 10U/6.3V_6
PR276 *short_4
G5335-PWRGD-1
Pulse-Skipping mode
C
+1V_S5_ON(28)
PR274 *short_4
PC228
*0.047U/10V_4
G5335-AGND-1
PC232
0.047U/10V_4
G5335-AGND-1
G5335-VCC-1
G5335-PFM-1
G5335-EN-1
G5335-SS-1
21
23
7
1
3
2
NC
VCC
PGOOD
PFM
EN
SS
G5335QT2U
TON
PGND
PGND
PGND
PGND
PGND
AGND
8
IN
9
IN
22
IN
24
IN
6
20
BST
10
LX
11
LX
16
LX
17
LX
18
LX
25
LX
12
13
14
15
19
4
5
FB
G5335-TON-1
G5335-BST-1
G5335-LX-1
G5335-FB-1
Fsw=550KHz
PR268
73.2K/F_4
PR277
2.2_6
G5335-AGND-1
PC235
0.1U/25V_4
PC221 *0.01U/50V_4
PR99 *4.7_6
PC82 *680p/50V_6
PL12
0.68uH_7X7X3
1
PC81
PC218
PC217
*0.1U/25V_4
2
PC230
22U/6.3V_6
10u/25V_8
2200p/50V_4
PC227
PC222
22U/6.3V_6
22U/6.3V_6
VIN
PC220
22U/6.3V_6
VFB=0.8V
D
+1V_S5
1.0 Volt +/- 5% TDC : 6.82A PEAK : 9.1A Width : 280mil
+1V_S5
PC224
22U/6.3V_6
PC231
PC219
*22U/6.3V_6
PC233
0.1U/16V_4
*22U/6.3V_6
R1
PR269
4.99K/F_4
PC225
*1000P/50V_4
C
R2
PR270 20K/F_4
G5335-AGND-1
Vo=0.8*(R1+R2)/R2 =1V
PR273 *short_4
G5335-AGND-1
B
VIN
PR2056 *1M_6
3
PR2055
1
*1M_6
12/28 Change VCCIO design
PR79 1M_6
2
+1V_SUS
3
1
PR105 22_8
PQ10 2N7002K
2
VIN
3
SUSON_R(8,33)
A
2
PQ7
DTC144EU
1
PR80 1M_6
3
1
PQ25
2N7002K
VIN
PC152 *2.2n/50V_4
PR191 1M_6
SUSD
+1V_S5
3
2
1
PC83 22u/6.3V_6
PQ11 AO3404
+1V_SUS
TDC : 0.18A PEAK : 0.24A Width : 20mil
SUS0#(8)
SUSB#(8,28)
+3V
5
2
1
PU20
3
*74AHC1G09GW
4
2
PQ2010
*DTC144EU
2
+VCCIO
PR2057 *22_8
3
1
PQ2009 *2N7002K
MAIND(33,37)
VIN
3
2
1
PR2058 *1M_6
PQ2007 *AO3404
PR2060 0_4
PR2059 *0_4
PC2064 *2200p/50V_4
+1V_S5
TDC : 2.36A PEAK : 3.14A
5
Width : 100mil
4
PQ35
MDV1528Q
1
2
3
+VCCIO
PC236 *22u/6.3V_6
B
A
ZRW Rev F Add
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT :
+1V_S5 (G5335QT2U)
+1V_S5 (G5335QT2U)
+1V_S5 (G5335QT2U)
ZRW
ZRW
ZRW
1A
1A
31 46Monday, February 22, 2016
31 46Monday, February 22, 2016
1
31 46Monday, February 22, 2016
1A
of
of
of
5
4
+3V_S5
3
2
1
PR138 *short_4
D
+VCCOPC_3V3
VIN
PC122
VRON_R(8,34)
C
LPM_ZVM_N(9)
HWPG_+VCCOPC(28)
B
PR141 *short_4
R228
*GT3@10K_4
PR133 *short_4
+3V_S5
PR137 *short_4
PC119
GT3@10u/25V_8
PR144
*100K/F_4
PR148
GT3@100K/F_4
+3V
PC115
GT3@10u/25V_8
+VCCOPC_EN
GT3@2200P/50V_4
+VCCOPC_MODE
PR134
GT3@100K/F_4
+VCCOPC_LP#
PR149 *short_4
1
VIN
PC117
GT3@0.1U/25V_4
5
EN
7
MODE
6
LP#
13
PG
VR RailMode
VCCIO0 ohm
10
3V3
PU6
GT3@NB681GD-Z
AGND
11
LP#
0
+VCCOPC Power only for 2+3e CPU
PC109 GT3@1u/10V_4
BST
SW
VOUT
PGND
9
+VCCOPC_VBST
8
+VCCOPC_SW
12
2
3
4
PR140
*short_6
VCCOPC_VID1_C
VCCOPC_VID0_C
681_AGND (5)
C1
C0
PR135
*short_6
VoC0C1
0VXX
PC105 GT3@0.1u/50V_6
PR146 GT3@10/F_4
+VCCOPC_SRC (5)
PR150 *short_4
PR147 *short_4
PL1
GT3@0.68uH_7X7X3
VCCOPC_VID1
VCCOPC_VID0
PC96
GT3@0.1u/16V_4
+3V_S5
R241 GT3@10K_4
R240 *10K_4
PC95
GT3@22uF/6.3V_6
R238 *10K_4
R242 GT3@10K_4
PC94
GT3@22uF/6.3V_6
VCCOPC_VID0
VCCOPC_VID1
R216 GT3@0_8
R214 GT3@0_8
PC93
GT3@22uF/6.3V_6

D
+VCCOPC TDC : 4.5A PEAK : 6A Width : 200mil
+VCCOPC
+VCCEOPIO
C
B
Floating
PRIMCORE (MSM)
EDRAM/EOPIO100K
VCCEDRAM
1
1 0.95V
150K Other
A
+VCCOPC(5)
VIN(20,23,24,29,30,31,33,34,35,36,37,38,39)
+3V(2,4,6,7,8,9,11,12,13,15,19,20,21,22,23,24,25,26,27,28,30,31,33,34,37,38,39)
+3V_S5(2,3,4,6,7,8,9,22,24,25,26,28,30,33,38)
5
4
00
0.8V
10
1.0V011
111 1.05V
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
2
PROJECT :
+VCCOPC (NB681GD-Z)
+VCCOPC (NB681GD-Z)
+VCCOPC (NB681GD-Z)
ZRW
ZRW
ZRW
1
32 46Monday, February 22, 2016
32 46Monday, February 22, 2016
32 46Monday, February 22, 2016
A
1A
1A
1A
of
of
of
5
4
3
2
1
D
C
TDC : 0.38A PEAK : 0.5A Width : 20mil
DDR_VTTT_PG_CTRL(3)
HWPG_VDDR(28)
SUSON_R(8,31)
MAINON(24,28,30,37)
PR2016 100K/F_4
TDC : 0.45A PEAK : 0.6A Width : 20mil
+VDDQ
PC2034
0.1U/16V_4
1P35V_S3
PR2027 *0_4
PR2029 *0_4
+3V
PR2017 *short_4
PR2018 *short_4
PR2020 *short_4
PR2023
100/F_4
+VDDQ_VTT
PC2030
0.033U/10V_4
+1.2VSUS
1P35V_S5
1P35V_S3
PC2022 *0.1U/16V_4
PC2026 10U/6.3V_6
+5V_S5
VID High Low
OCP=9A L ripple current =(19-1.2)*1.2/(1u*500k*19) =2.248A Vtrip=9-(2.248/2)*14.5mohm =114.202mV Rlimit=114.202mV/5uA*10=228.4Kohm
PC2021 *0.1U/16V_4
20
VTT
2
VTTSNS
1
VTTGND
4
VTTREF
19
VLDOIN
PC2038
*10U/6.3V_6
PR2028 *short_4
PR2030 *short_4
PR2031 *0_4
Ref. Voltage
0.675V
0.75V
1P35V_S3
1P35V_S5
1P35V_PGOOD
10
7
8
S3
S5
PGOOD
PU2001
RT8231BGQW
VID
PGND
GND
3
11
14
1P35V_VID
DDR=1.2V PR2032=7.87K/F_4 PR2033=10K/F_4
1P35V_CS
13
CS
FB
6
1P35V_FB
Ilimit=9A
PR2019 232K/F_4
1P35V_TON
9
TON
VDDQ
5
1P35V_VDDQ
PR2032
7.87K/F_4
PR2033 10K/F_4

VIN(20,23,24,29,30,31,32,34,35,36,37,38,39)
+5V_S5(27,30,34,35,36,38)
+VDDQ_VTT(11,12)
+VDDQ(11,12)
+1.2VSUS(3,5,11,12)
PR2026 *short_4
VIN
PC2025
0.1U/25V_4
Fsw=500KHz
PR2021
499K/F_4
AON7410
17
1P35V_UGATE
UGATE
18
1P35V_BOOT
BOOT1
16
1P35V_PHASE
PHASE
15
1P35V_LGATE
LGATE
12
1P35V_VDD
VDD
PAD
21
PR2024 *short_4
PC2040 1U/6.3V_4
PR2022
2.2_6
PC2029
0.1u/50V_6
+5V_S5
AON7752
PQ2005
PQ2006
5
PC2023
0.1U/25V_4
4
1
2
3
5
PR2025
4
3
*4.7_6
PC2039
1
2
*680p/50V_6
PC2024
10u/25V_8
PL2001
1uH_7X7X3
PC2028
2200P/50V_4
PC2027
10u/25V_8
PC2031
0.1U/16V_4
+1.2VSUS
1.2 Volt +/- 5% TDC : 5A PEAK : 6.67A OCP : 9A Width : 200mil
+1.2VSUS
PC2035
PC2032
22U/6.3V_8
22U/6.3V_8
+
PC2037
PC2036
22U/6.3V_8
PC2033
22U/6.3V_8
*330u/2.5V_6X4.2
Rds(on)=14.5mohm
VDDQ VTTREF VTT
S5S3
ONON OFF
S4/S5
ON
1
1
1S3 (mainon off)S00
OFF0 OFF
0
ONON OFF
D
C
B
+2.5VSUS Power Rail For DDR4
JP18
0.001/F_3720
1
+2.5V_SUS
2.5Volt +/- 5% TDC : 0.91A PEAK : 1.21A Width : 40mil
+2.5V_SUS
2
+3V
Check PU high with HW
HWPG_2.5V(28)
SUSON_R
DDR4_SUSON_2V5(28)
A
5
PR311
100K/F_4
PR304 *0_4
PR305 0_4
PR309 0_4
PR306 10K_4
PC263
0.47uF/6.3V_4
PU19
5
PG
1
EN
G5719BTB1U
R2
4
PC264
4.7U/6.3V_6
4
3
VIN
LX
2
GND
FB
6
R1
PR307
47.5K/F_4
PR308 15K/F_4
PL15
G5719LX2.5V
2.2uH/1.85A_2.5X2X1.2
PR303 0_4
Vo=(0.6(R1+R2)/R2)
PR310 0_6
+3V_S5
+2.5V_SUS (11,12)
+2.5V_SUS_SRC
PC260
10U/6.3V_6
PC261
PC262
0.1U/16V_4
*10U/6.3V_6
3
10/26 Reserve +2.5V for DDR4 VDDSPD
+2.5V_SUS
3
2
MAIND(31,37)
MAIND
2
PQ40 *AO3404
1
TDC : 0.16A PEAK : 0.21A Width : 20mil
+2.5V
+2.5V (11,12,37)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
DDR4_+1.2VSUS (G5316RZ1D)
DDR4_+1.2VSUS (G5316RZ1D)
DDR4_+1.2VSUS (G5316RZ1D)
ZRW
ZRW
ZRW
33 46Monday, February 22, 2016
33 46Monday, February 22, 2016
33 46Monday, February 22, 2016
1
of
of
of
B
A
1A
1A
1A
5
D
12/11 Change to 13.7K
VCCGT_SENSE(5)
C
B
VSSGT_SENSE(5)
ISUMP_B(35)
Close to VCCGT Choke
ISUMN_B(35)
Skylake-U U23e 15W/28W (1+2+1+1 Phase)
VCORE
Icc TDC PL2󶁪23A Icc Max󶁪32A
A
OCP󶁪35A Fsw󶁪800KHz
VCORE L/L
R_DC_LL󶁪2.1mV/A R_AC_LL󶁪2.1mV/A
󶁪
VCCGT VCCGTU
Icc TDC PL2󶁪40A Icc Max󶁪64A OCP󶁪A Fsw󶁪800KHz
VCCGT L/L
R_DC_LL󶁪2mV/A R_AC_LL󶁪2mV/A
5
GT2 : PR224 CS38872FB18 88.7K
GT3 : PR224 CS39312FB15 93.1K
PR224 88 .7K/F_4
PC34 330P/50V_4
PR249 13 .7K/F_4
PC33 33P/50V_ 4
PC169
3300P/50V_4
+VCCGT
PR95 *10_4
no stuff
PR94 *short_4
PR90 *short_4
PR91
no stuff
*10_4
2
2
PR222
2.61K/F_4
1
PR221
11K/F_4
1
PR265 10K/F_4_3435NTC
PC21
0.1U/25V_4
GT2 : PC29 CH31004KB17 0.01uF/25V
GT3 : PC29 CH3473K1B00 47nF/25V
VCCSA
Icc TDC PL2󶁪6A Icc Max󶁪7A OCP󶁪8A Fsw󶁪800KHz
VCCSA L/L
󶁪
R_DC_LL󶁪10.3mV/A R_AC_LL󶁪10.3mV/A
Close to VCCGT MOS
PR262
470K_4_4700NTC
PR260 27.4K/F_4
GT2 : PR225 CS21912FB13 1.91K
PR223
GT3 : PR225 CS22552FB01 2.55K
3K/F_4
PR35
PC31 *0.01U/50V_4
PC29
1K/F_4
PC23
220p/50V_4
PR27
1K/F_4
0.01u/50V_4
PC22
*0.01U/50V_4
PC32
0.01U/50V_4
GT2 : PC30 CH41002KB93 0.1uF/10V
GT3 : PC30 CH4152K9B02 0.15uF/10V
1
PC30
2
0.1U/25V_4
GT2 : PR220 CS12672FB02 267 ohm
GT3 : PR220 CS13572FB10 357 ohm
VCCGTU merge to VCCGT
󶁪
PR36
PR225
1.91K/F_4
PC24
PC28
2200P/50V_4
PR220
267/F_4
PC27 *0.022 U/25V_4
PC26 *0.022 U/25V_4
4
SVID near PU1
ZRW REV:F add 1000p
VR_SVID_ALERT#_VCORE(5)
H_PROCHOT#( 2,28,29)
IMVP_PWRGD(2)
2K/F_4
PMON( 29)
470P/50V_4
PR34 0_4
FCCM_B(35)
PWM1_B(35)
PWM2_B(35)
Rail B
4
Check PU high with HW
+1V_VCCST
PR53
PC43
45.3/F_4
1000P/50V_4
H_CPU_SVIDDAT(5)
H_CPU_SVIDCLK(5)
+VCCIO
+3V
PR47
PR49
10K/F_4
*10K/F_4
PR48 *short_4
PR46 *short_4
VRON_R(8,32)
PR43 *short_4
PR44
*10K/F_4
+3V
PR37 *short_4
ISL95857_PSYS
ISL95857_IMON_B
ISL95857_NTC_B
ISL95857_COMP_B
ISL95857_FB_B
ISL95857_RTN_B
ISL95857_ISUMN_B
ISEN1_B (35)
ISEN2_B (35)
+5V_S5
PR38 *short_4
PR42 *short_4
PR45 *short_4
PR230
GT2 : PR230 CS38872FB18 88.7K
GT3 : PR230 CS38662FB16 86.6K
PR57 100/F_4
PR56 10_4
PR52 49.9/F_4
ISL95857_VR_HOT
ISL95857_VR_READY
ISL95857_VR_EN
1
PSYS
2
IMON_B
3
NTC_B
4
COMP_B
5
FB_B
6
RTN_B
7
ISUMP_B
8
ISUMN_B
9
ISEN1_B
10
ISEN2_B
41
EP
88.7K/F_4
PC40 330P/50V_4
PR250 13.7K/F_4
12/11 Change to 13.7K
ISL95857_SDA
ISL95857_SCLK
39
40
VR_ENABLE
FCCM_B
12
11
ISL95857_PWM1_B
ISL95857_FCCM_B
PR261 27.4K/F_ 4
Close to VCORE MOS
38
37
SCLK
VR_HOT#
VR_READY
ISL95859HRTZ-T
IMON_A
PWM2_B
PWM1_B
14
13
ISL95857_IMON_A
ISL95857_PWM2_B
PR263 4 70K_4_4700NTC
PC41 33P/50V_4
3
+5V_S5
VIN
PR236 *short_8
PR234 1/F_6
ISL95857_PROG2
ISL95857_PROG1
ISL95857_VCC
ISL95857_VIN
31
32
33
35
34
36
VIN
SDA
VCC
PROG1
ALERT#
PU2
FB_A
COMP_A
NTC_A
ISUMP_A
RTN_A
17
16
15
ISL95857_NTC_A
20
19
18
ISL95857_COMP_A
ISL95857_ISUMN_A
ISL95857_RTN_A
ISL95857_FB_A
PR55
2K/F_4
PR231
4.87K/F_4
PR233 1.37K/F_ 4
PC42 470P/50V_4
PC177 2200p/50V_4
GT2 : PR233 CS21372FB19 1.37K
GT3 : PR230 CS21542FB00 1.54K
3
PR235
PR232
63.4K/F_4
78.7K/F_4
GT2 : PR232 CS37872FB15 78.7k
GT3 : PR232 CS38872FB18 88.7k
PROG2
30
ISL95857_PWM_C
PWM_C
29
ISL95857_FCCM_C
FCCM_C
28
ISL95857_ISUMN_C
ISUMN_C
27
ISUMP_C
26
ISL95857_RTN_C
RTN_C
25
ISL95857_FB_C
FB_C
24
ISL95857_COMP_C
COMP_C
23
ISL95857_IMON_C
IMON_C
22
ISL95857_PWM_A
PWM_A
21
ISL95857_FCCM_A
FCCM_A
ISUMN_A
PR58
499/F_4
PC44
1000P/50V_4
PC62
2200p/50V_4
PC48
0.1u/25V_4
PR243
249/F_4
2
GT3 : PR217 CS41003F932 100KGT2 : PR217 Unstuff
GT2 : PR34 CS00002JB38 0 ohm GT2 : PC26 Unstuff GT3 : PC26 CH3224K1B01 0.022U/25V GT2 : PC27 Unstuff GT3 : PC27 CH3224K1B01 0.022U/25V
GT2 : PC29 CH31004KB17 0.01uF/25V GT3 : PC29 CH3473K1B00 47nF/25V
GT2 : PC30 CH41002KB93 0.1uF/10V GT2 : PR224 CS38872FB18 88.7K GT2 : PR232 CS37872FB15 78.7k GT3 : PR232 CS38872FB18 88.7k GT2 : PR239 CS41622FB11 162k
GT2 : PR230 CS38872FB18 88.7K GT2 : PR225 CS21912FB13 1.91K GT3 : PR225 CS22552FB01 2.55K GT2 : PR243 CS12492FB12 249
GT2 : PR233 CS21372FB19 1.37K
PC45
0.1u/25V_4
PR74
1K/F_4
Rail C
PWM_C (36)
FCCM_C (36)
Rail A
PWM_A (35)
FCCM_A (35)
GT2 : PR243 CS12492FB12 249
GT3 : PR243 CS12742FB02 274
PC61
0.1u/25V_4
PC47
*0.01u/50V_4
PC49 *0.01u/50V_4
PC50
0.01u/50V_4
PR239
GT2 : PR239 CS41622FB11 162k
GT3 : PR239 CS41402FB14 140k
PC54
0.1u/25V_4
+VCCCORE
PR60 *10_4
PR67 *10_4
PR65 *short_4
PR68 *short_4
PR72 *short_4
PR71 *short_4
GT3 : PR34 Unstuff
GT3 : PR220 CS13242FB07 324 ohmGT2 : PR220 CS12672FB02 267 ohm
GT3 : PC30 CH4152K9B02 0.15uF/10V GT3 : PR224 CS39312FB15 93.1K
GT3 : PR239 CS41402FB14 140k CQ1A GT3 : PR230 CS39312FB15 93.1K
GT3 : PR243 CS12742FB02 274 GT3 : PR230 CS21542FB00 1.54K
PR77
PC55
1K/F_4
2200p/50V_4
PR238
475/F_4
PR240
162K_4
PC56 330P/50V_4
PC57 33P/50 V_4
1
2
1
PC53
0.022U/25V_4
PR70 11K/F_4
2
no stuff
PR63 *short_4
PR66 *short_4
no stuff
2
PC64
0.1u/25V_4
2.49K/F_4
2200P/50V_4
PC184
Close to Vcore Choke
1
2
PC52
0.015UF/16V_4
*2K/F_4
PR241
PR76 2.05K/F_4
PC185
*680P/50V_4
ISUMN_A (35)
PR266 10K/F_4_3435NTC
PR69
2.61K/F_4
ISUMP_A (35)
VCORE_SENSE (5)
VCORESS_SENSE (5)
2
1
PC60
0.047U/10V_4
PR73
PC63
1

IMVP8 Vcore Controller
Rail A󶁘1 phase󶁙󶁪VCORE Rail B󶁘2 phase󶁙󶁪VCCGT Rail C󶁘1 phase󶁙󶁪VCCSA
Close to VCCSA Choke
1
PR75 11K/F_4
2
301/F_4
PC65
*0.01U/50V_4
1000P/50V_4
PC58 *0.01U/50V_4
PC59
0.01U/50V_4
ISUMN_C (36)
PR264 10K/F_4_3435NTC
1
PR78
2.61K/F_4
2
ISUMP_C (36)
+VCCSA
PR92 *10_4
no stuff
PR93 *short_4
PR89 *short_4
PR88 *10_4
no stuff
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
CPU_CORE (ISL95859HRTZ-T)
CPU_CORE (ISL95859HRTZ-T)
CPU_CORE (ISL95859HRTZ-T)
1
VSA_SENSE (5)
VSASS_SENSE (5)
ZRW
ZRW
ZRW
34 46Monday, February 22, 2016
34 46Monday, February 22, 2016
34 46Monday, February 22, 2016
D
C
B
A
1A
1A
1A
of
of
of
5
VCORE
4
3
2
1

GT3 : PR19 CS41003F932 100KGT2 : PR19 Unstuff
D
C
B
VCCGT = 1 phase for U22 , VCCGT = 2 phase for U23e ,
PR82 *short_6
+5V_S5
Rail A
PWM_A(34)
FCCM_A(34)
VCCGT
PR84 *short_6
+5V_S5
PC196
Rail B
PWM1_B(34)
FCCM_B(34)
PR83 *short_6
+5V_S5
Rail B
PWM2_B(34)
FCCM_B
PC191
4.7U/6.3V_6
PR258 *short_4
PR259 *short_4
VCCGT_VCC1
4.7U/6.3V_6
PR256 *short_4
PR257 *short_4
PC192
GT3@4.7U/6.3V_6
PR254 *short_4
PR255 *short_4
VCORE_VCC
VCCGT_VCC2
PU15 AOZ5049QI
23
PVCC
24
VCC
1
PWM
2
FCCM
21
PU14 AOZ5049QI
23
PVCC
24
VCC
1
PWM
2
FCCM
PGND
9
21
󰵖󰵓󰸿 󰵓󰸿
PU13 GT3@AOZ5049QI
23
PVCC
24
VCC
1
PWM
2
FCCM
PGND
21
10u/25V_8
PC195
10u/25V_8
PR87
2.2/F_6
PC77 1000P/50V_4
ISEN1_B
PC74
PR245 3.65K/F_6
PR244 1/F_6
PC198
10u/25V_8
PR216 3.65K/F_6
PR217 GT3@100K/F_6
PR212 10/F_6
PC199
0.1U/50V_6
2200P/50V_4
PL10
0.15uH_7X7X4
2
1
4
3
PC197
PC193
0.1U/50V_6
2200P/50V_4
PL9
0.15uH_7X7X4
2
1
4
3
PC71
PR253 *short_6
PR252 *short_6
10u/25V_8
PC190
0.1u/50V_6
ISUMP_A(34)
ISUMN_A(34)
PC189
0.1u/50V_6
PR86
2.2/F_6
PC76 1000P/50V_4
ISUMP_B(34)
ISUMN_B(34)
PC73
6
VIN
22
VIN
4
GH
3
VCORE_VBST
BOOT
5
VSWH
13
VCORE_PHASE
VSWH
19
GL
20
GL
PGND
PGND
9
6
VIN
22
VIN
4
GH
3
VCCGT_VBST1
BOOT
5
VSWH
13
VCCGT_PHASE1
VSWH
19
GL
20
GL
PGND
2015/10/2 FAE Suggestion
VIN
6
VIN
22
VIN
4
GH
3
VCCGT_VBST2
BOOT
VSWH
VSWH
GL
GL
PGND
9
5
13
19
20
PR251 *short_6
VCCGT_PHASE2
PC194
GT3@10u/25V_8
PC188 GT3@0.1u/50V_6
PR85 GT3@2.2/F_6
PC75 GT3@1000P/50V_4
PC70
GT3@10u/25V_8
PC69
GT3@0.1U/50V_6
PC72
GT3@2200P/50V_4
PL8
GT3@0.15uH_7X7X4
1
4
3
2
VIN
1
+
PC182
2
33U/25V_6x4.5
DCR=0.66mOhm
PC205
0.1u/16V_4
1
+
2
DCR=0.66mOhm
PC211
0.1u/16V_4
PR218 *100K/F_4
DCR=0.66mOhm
PC214
GT3@0.1u/16V_4
+VCCCORE
+
+
PC78
PC210
PC208
22u/6.3V_8
PC181
33U/25V_6x4.5
PC212
22u/6.3V_8
ISEN2_B (34)
PC216
PC215
GT3@22u/6.3V_8
22u/6.3V_8
VIN
PC213
22u/6.3V_8
+VCCGT
GT3@22u/6.3V_8
+VCCGT
PC203
330u/2V_7343
330u/2V_7343
+
PC209
330u/2V_7343
+
PC207
GT3@330u/2V_7343
VCORE
Icc TDC PL2󶁪23A Icc Max󶁪29A OCP󶁪35A Fsw󶁪800KHz
VCORE L/L
󶁪
R_DC_LL󶁪2.1mV/A R_AC_LL󶁪2.1mV/A
VCCGT
Icc TDC PL2󶁪40A Icc Max󶁪64A OCP󶁪A Fsw󶁪800KHz
VCCGT L/L
󶁪
R_DC_LL󶁪2mV/A R_AC_LL󶁪2mV/A
D
C
B
PR215 GT3@3.65K/F_6
ISUMP_B
ISEN2_B
PR214 GT3@100K/F_6
A
ISUMN_B
PR213 GT3@10/F_6
PR219 *100K/F_4
ISEN1_B (34)
A
2015/10/2 FAE Suggestion
+VCCCORE(5,34)
VIN(20,23,24,29,30,31,32,33,34,36,37,38,39)
+VCCGT(5,34)
+5V_S5(27,30,33,34,36,38)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
ZRW
PROJECT :
ZRW
PROJECT :
VCORE/VCCGT (ISL95808HRZ-T)
VCORE/VCCGT (ISL95808HRZ-T)
VCORE/VCCGT (ISL95808HRZ-T)
ZRW
35 46Monday, February 22, 2016
35 46Monday, February 22, 2016
35 46Monday, February 22, 2016
1
1A
1A
1A
of
of
of
5
4
3
2
1

D
VCCSA
C
B
+5V_S5
Rail C
FCCM_C(34)
PWM_C(34)
PR64 *short_6
PC180
4.7U/6.3V_6
PR242 *short_4
PR237 *short_4
VCCSA_VCC
D
VIN
PQ32
PU12
6
VCC
7
FCCM
3
PWM
9
E_PAD
4
GND
ISL95808
UGATE
BOOT
PHASE
LGATE
1
VCCSA_DRVH
2
VCCSA_VBST
8
VCCSA_SW
5
VCCSA_DRVL
AON7410
PR246 *short_6
PC183
0.1u/50V_6
PQ31 AON7752
5
4
1
2
3
5
4
1
2
3
ISUMP_C(34)
ISUMN_C(34)
PC186
10u/25V_8
PR81
2.2/F_6
PC68 1000P/50V_4
PC66
10u/25V_8
PR248 3.65K/F_6
PR247 1/F_6
PC187
PL7
0.47uH_7X7x3
1
4
3
PC67
0.1U/50V_6
2200P/50V_4
DCR=4.2mOhm
2
+VCCSA
PC204
PC202
0.1u/16V_4
PC206
22u/6.3V_8
22u/6.3V_8
VCCSA
Icc TDC PL2󶁪5A Icc Max󶁪5A OCP󶁪6A Fsw󶁪800KHz
VCCSA L/L
R_DC_LL󶁪10.3mV/A R_AC_LL󶁪10.3mV/A
󶁪
C
B
+VCCSA(5,34)
VIN(20,23,24,29,30,31,32,33,34,35,37,38,39)
+5V_S5(27,30,33,34,35,38)
A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
VCCSA (ISL95808HRZ-T)
VCCSA (ISL95808HRZ-T)
VCCSA (ISL95808HRZ-T)
PROJECT :
ZRW
ZRW
ZRW
of
36 46Monday, February 22, 2016
of
36 46Monday, February 22, 2016
of
36 46Monday, February 22, 2016
1
A
1A
1A
1A
5
4
3
2
1

+5VPCU
PR113
PR281
PC85
*0.1u/50V_6
*short_4
PU3 YB1282PSP8
4
VPP
2
VEN
3
VIN
8
GND
9
GND
PGOOD
VO
NC
ADJ
7
VFB=0.8V
D
+3VPCU
S5_ON
PR112 *short_8
10u/6.3V_6
S5_ON(28,30)
PR282 *short_4
PC88
0.1u/50V_6
PC150 1u/6.3V_4
PC89 *1u/10V_4
100K_4
PC86
Check PU high with HW Check PU high with HW
PR107 100K_4
1
6
PR109
R1
5
R2
43.2K/F_4
PR108 34K/F_4
+3V
HWPG_1.8VS5 (28)
PR110 *short_8
PC87 10u/6.3V_6
+1.8V_S5
+1.8V_S5
1.8Volt +/- 5% TDC : 0.08A PEAK : 0.06A Width : 20mil
PC153 1u/6.3V_4
PC110 *1u/10V_4
PR156 *short_4
PC113
0.1u/50V_6
MAINON(24,28,30,33)
+3VPCU
MAINON
PR151 *short_8
10u/6.3V_6
PC112
100K_4
PR154
+5VPCU
PC123
*0.1u/50V_6
PR143 *short_4
PU7 YB1282PSP8
4
VPP
2
VEN
3
VIN
8
GND
9
GND
PGOOD
VO
NC
ADJ
7
VFB=0.8V
PR155 100K_4
1
6
PR152
R1
5
R2
30K/F_4
PR153 34K/F_4
+3V
HWPG_1.5V (28)
PR145 *short_8
PC111 10u/6.3V_6
+1.5V
+1.5V
1.5Volt +/- 5% TDC : 0.49A PEAK : 0.66A Width : 20mil
D
Vo =0.8(1+R1/R2) =1.8V
PR153 Change to
3
1
PR106 *22_8
PQ12 *2N7002K
220 ohm for bo bo sound issue.
+5V
PR126 *220_8
3
2
PQ19 *2N7002K
1
C
Thermal protection
Need fine tune for thermal protect point
Note placement position TEMP=85C
S5_ON
B
10K/F_4_3435NTC
3
2
S5_ON
A
PQ20 2N7002K
1
PR267
VL
PR117
1.47K/F_4
LM393_PIN2
VL
PR114 200K/F_4
2.469V
PR115 200K/F_4
2
PQ18
DTC144EU
VIN
PD5 DA2J10100L
PR119 1M_6
1
PQ17 AO3409
2
3
3
1
PU4A AS393MTR-E1
7
PU4B AS393MTR-E1
PC91
0.1u/50V_6
PR283 *short_6
PR284 200K_6
PC92
0.1u/50V_6
SYS_SHDN# (2,28,30)
3
2
PQ15 2N7002K
1
1
8
3
+
2
-
4
5
+
6
-
MAINON
2
PR120 *100K/F_6
3
1
PQ16 DTC144EU
VIN
PR116 1M_6
MAINON_ON_G
PR118 1M_6
+3V
2
Vo =0.8(1+R1/R2) =1.5V
+VCCIO
PR111 22_8
3
2
PQ14 2N7002K
1
C
+2.5V
PR298 *22_8
3
2
PQ41 *2N7002K
1
VIN
PR59 1M_6
MAIND
3
2
PQ6 2N7002K
1
MAIND (31,33)
PC51 2200p/50V_4
ZRW Rev:D Stuff
B
A
For EC control thermal protection (output 3.3V)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT :
+1.8V/+1.5V/Thermal Protect
+1.8V/+1.5V/Thermal Protect
+1.8V/+1.5V/Thermal Protect
ZRW
ZRW
ZRW
37 46Monday, February 22, 2016
37 46Monday, February 22, 2016
1
37 46Monday, February 22, 2016
1A
1A
1A
of
of
of
5
4
3
2
1
D
1658R-EN
PR162 EV@100K/F_4
Check PU high with HW
C
DGPU_PSI
Phase Number of Operation
B
1658R-VREF
VIN
VGPU_EN(4)
3V_MAIN_PWGD(15,39)
+3V_S5
DGPU_PSI(16)
PWM-VID(16)
PR165 *EV@10K_4
PR159 *EV@0_4
+3VPCU
PR163 *EV@10K_4
DGPU_PSI
PWM-VID
PWM-SVID : Config B Check PWM-SVID by SKU
Standby Function
PC259
*EV@1U/10V_4
Double Check OCP SETTING
PR299
*EV@499K/F_4
PR166
PR164
PR296
PR160 EV@12.4K/F_4
1658R-OCS/CB
1658R-EN
1658R-PSI
1658R-VID
1658R-VREF
1658R-REFADJ
R2
1658R-REFIN
R3
R4
R5
+VGPU_CORE
PR293 EV@6.81K/F_4
PR302 *EV@1/F_4
PR161 *EV@0_4
PR289 *short_4
PR290 *short_4
PR291 *short_4
PC256 EV@1U/10V_4
R1
PR297
EV@20K/F_4
PC257
EV@2700P/50V_4
3
2
1
1
2
PC258 *EV@0.01U/50V_4
2
1
2
1
EV@20K/F_4
1
C
EV@2K/F_4
2
EV@18.2K/F_4
PR301 *EV@5.1K/F_4
PQ42 *EV@2N7002K
PR300 *short_4
PU18
9
3
4
5
8
6
7
PC255
*EV@0.01U/50V_4
1
2
PC254
*EV@22P/50V_4
+5V_S5
1658R-PVCC
18
OCS/CB
PVCC
EN
PSI
EV@UP1658RQKF
VID
VREF
REFADJ
REFIN
FB
11
1658R-FB
PR292
*short_4
PR157 *short_6
GND
21
BOOT1
UGATE1
PHASE1
LGATE1
BOOT2
UGATE2
PHASE2
LGATE2
PGOOD
COMP
FBRTN
1
2
PC249 EV@1U/10V_4
1
1658R-BOOT1
2
1658R-UGATE1
20
1658R-PHASE1
19
1658R-LGATE1
15
1658R-BOOT2
14
1658R-UGATE2
16
1658R-PHASE2
17
1658R-LGATE2
13
1658R-PG
12
1658R-COMP
10
1658R-FBRTN
PR295

VIN
1658R-BOOT1
PC250
EV@0.22u/25V_6
1658R-UGATE1
1658R-PHASE1
1658R-LGATE1
PQ37
PR286
EV@2.2/F_6
PC251
EV@0.22u/25V_6
EV@AON6752
PQ36 EV@AON6752
2
1
PR158 EV@10K_4
PR288 *short_4
1
PC253
2
1
EV@4700P/25V_4
PC252
2
PR294
EV@16K/F_6
*short_4
EV@22P/50V_4
+3V
GPU_PWR_GD (13)
1658R-BOOT2
1658R-UGATE2
1658R-PHASE2
1658R-LGATE2
5
4
4
4
4
1
2
5
1
2
5
1
2
5
1
2
PQ39 EV@AON6414AL
3
3
3
PQ38 EV@AON6414AL
3
PR139 EV@2.2/F_6
PC114 EV@1000p/50V_4
VIN
PR142 EV@2.2/F_6
PC116 EV@1000p/50V_4
PC121
EV@2200p/50V_4
PC120
EV@2200p/50V_4
PC118
EV@0.1u/50V_6
PL14
EV@0.24uH_7X7X3
PC244
EV@0.1u/50V_6
PL13
EV@0.24uH_7X7X3
PC248
EV@10u/25V_8
DCR=1.1m ohm
PC90
PC238
EV@0.1u/16V_4
PC245
EV@10u/25V_8
DCR=1.1m ohm
PC242
PC241
EV@0.1u/16V_4
PC246
EV@10u/25V_8
+
PC240
EV@10u/6.3V_8
EV@330u/2V_7343
PC247
EV@10u/25V_8
+
PC239
EV@10u/6.3V_8
EV@330u/2V_7343
PR285
EV@2.2/F_6
1
+
PC243
2
*EV@33U/25V_6x4.5
+VGPU_CORE
+VGPU_CORE
+
PC237
EV@330u/2.5V_6X4.2
D
C
B
PR125 *EV@100_4
N16S-GT (23W/GDDR5) OpenVR Config:B
VGA_VCCSENSE(13)
VGA_VSSSENSE(13)
Parallel
A
5
PR123 *short_4
PR122 *short_4
PR124 *EV@100_4
4
+VGPU_CORE Countinue current:26.5A Peak current:53A OCP:72A FSW:300KHz L/L=0mV/A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Monday, February 22, 2016 38 46
Monday, February 22, 2016 38 46
Date: Sheet
Monday, February 22, 2016 38 46
Date: Sheet
3
2
Date: Sheet
PROJECT :
+VGPU_CORE(UP1658RQKF)
+VGPU_CORE(UP1658RQKF)
+VGPU_CORE(UP1658RQKF)
;<
;<
;<
of
of
1
of
A
1A
1A
1A
5
4
3
2
1
D
C
+1.35V_GFX for GDDR5
B
HWPG_1.35VGFX(15)
A
FBVDDQ_EN(13)
+3VPCU
G5335-AGND
+1.05V_GFX(13,14,15)
+3V_GFX(13,15,16,28)
+1.35V_GFX(14,18)
TP2
HWPG_1.05VGFX
DGPU_PWR_EN(4)
+5VPCU
PR2045 EV@100K/F_4
+5VPCU
PR2048 *EV@0_4
PR2049 *short_4
PR2052 *short_4
5
+3V
PR62 *EV@100K/F_4
PC178
EV@0.01U/50V_4
PR2043 EV@10_6
+3V
PR2047 *short_4
Pulse-Skipping mode
PR54 *EV@0_4
PR61
EV@10_6
PC179
EV@10U/6.3V_6
PR50 *short_4
PC38
*EV@1u/10V_4
PC2049 EV@10U/6.3V_6
PC2062
*EV@0.047U/10V_4
G5335-AGND
PC2063
EV@0.047U/10V_4
G5335-AGND
554PG_0.95V
PC46
EV@1U/6.3V_4
G5335-VCC
G5335-PWRGD
G5335-PFM
G5335-EN
G5335-SS
554SVIN_0.95V
1
PR41 EV@100K_4
2
7
21
1
3
2
23
PU11
4
PG
9
PVIN
10
PVIN
8
SVIN
11
GND
EV@RT8068AZQW
2
PU2003
NC
VCC
EV@G5335QT2U
PGOOD
PFM
EN
SS
PC39
*EV@2200P/50V_4
3
PQ4
1
EV@PDTC143TT
VIN
PGND
PGND
PGND
PGND
PGND
AGND
TON
BST
IN
IN
IN
IN
LX
LX
LX
LX
LX
LX
FB
4
PR51
*EV@2.2_6
NC
LX
LX
NC
FB
EN
PR21 EV@1M_6
PR20 EV@1M_6
8
9
22
24
6
20
10
11
16
17
18
25
12
13
14
15
19
4
5
1
554LX_0.95V
2
3
7
554NC_0.95V
6
554FB_0.95V
5
554EN_0.95V
*EV@0.1u/16V_4
2
G5335-TON
G5335-BST
G5335-LX
G5335-AGND
G5335-FB
PR2054 *short_4
G5335-AGND
EV@1uH_7X7X3
PC176
*EV@68P/50V_4
PC173
+3V_GFX
PR121 EV@22_8
3
PQ3 EV@2N7002K
1
Fsw=550KHz
PR2044 EV@73.2K/F_4
PR2046 EV@2.2_6
PL6
PC171
*EV@22P/50V_4
PR227 *short_4
2
PC2051 EV@0.1U/25V_4
554FB_0.95V_S
R1
R2
3V_MAIN_PWGD
VIN
PR24 EV@1M_6
3
PQ5 EV@2N7002K
1
PC2050 *EV@0.01U/50V_4
PR2050 *EV@4.7_6
PC2061 *EV@680p/50V_6
PR229 *short_4
PR226 EV@7.5K/F_4
PR228 EV@10K/F_4
DGPU_D
PC84 *EV@2.2n/50V_4
EV@0.68uH_7X7X3
1
PC175
EV@0.1U/16V_4
Vo=0.6*(R1+R2)/R2
3V_MAIN_PWGD (15,38)
+3VPCU
3
2
PQ13 EV@AO3404
1
PC2046
PC2047
*EV@0.1U/25V_4
EV@2200p/50V_4
PL2003
2
PC2052
EV@22U/6.3V_6
3
%
+1.05V_GFX TDC : 1.58A PEAK : 2.1A Width : 80mil
+1.05V_GFX
PC174
EV@22U/6.3V_6
+3V_GFX
+3V_GFX
TDC : 0.05A PEAK : 0.06A Width : 20mil
VIN
PC2048
EV@10u/25V_8
PC2055
PC2054
PC2053
EV@22U/6.3V_6
EV@22U/6.3V_6
PC2056
EV@22U/6.3V_6
EV@22U/6.3V_6
PC2058
PC2057
*EV@22U/6.3V_6
PC2059
EV@0.1U/16V_4
*EV@22U/6.3V_6
R1
PR2051 EV@14K/F_4
PC2060
*EV@1000P/50V_4
+1.35V_GFX
1.35 Volt +/- 5% TDC : 4.67A PEAK : 6.22A Width : 200mil
+1.35V_GFX
R2
Vo=0.8*(R1+R2)/R2 =1.35V
G5335-AGND
PR2053 EV@20K/F_4
VFB=0.8V
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Monday, February 22, 2016 39 46
Date: Sheet
Monday, February 22, 2016 39 46
Date: Sheet
Monday, February 22, 2016 39 46
2
Date: Sheet
PROJECT :
+1.35V_GFX/+1.05V_GFX/+3V_GFX
+1.35V_GFX/+1.05V_GFX/+3V_GFX
+1.35V_GFX/+1.05V_GFX/+3V_GFX
;<
;<
;<
of
of
1
of
D
C
B
A
1A
1A
1A
1
2
3
4
5
6
7
8
VGA power up sequence
SKYLAKE PCH
GPP_B17
A
B
+3VPCU
DGPU_PWR_EN
3V_MAIN_PWGD
PWM-VID (GPU GPIO11)
MOSFET
+1.05V_S5
VIN
3V_MAIN_PWGD
EC_FB_CLAMP(EC)
+3V_GFX
3V_MAIN_EN (GPU GPIO5)
MOSFET +1.05V_GFX
+VGPU_CORE
PWM
VIN
VGPU_PWRGD
OR Gate
FBVDDQ_EN
PWM
MOSFET
PG
HWPG_1.5VGFX VGPU_PWRGD
+3V_MAIN
3V_MAIN_PWGD
+1.35V_GFX
DGPU_PWROK
All 3.3V
NVVDD
PXE_VDD +1.05V
FBVDDQ
t>0
t>0
N15x Power on sequance
Notes: -All 3.3V includes all rails powered at 3.3V
-PEX_VDD 1.05V inculdes all rails that are shared

A
B
GC6_FB_EN (GPU GPIO0 )
C
C
GPP_B19
VGA Reset
PCH
PLTRST#
DGPU_HOLD_RST#
PEX_RST timing
D
I/O 3.3V
PEX_RST
Trise >= 1uS Tfail <=500nS
1
2
PEGX_RST#
D
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
3
4
5
6
7
PROJECT :
GPU PWR CRL
GPU PWR CRL
GPU PWR CRL
ZRW
ZRW
ZRW
40 46Monday, February 22, 2016
40 46Monday, February 22, 2016
40 46Monday, February 22, 2016
8
1A
1A
1A
of
of
of
5
Battery Mode
Non Deep Sx
+5VPCU
3
+3VPCU
D
3
C
B
A
+5VPCU
3
+3VPCU
3
9
+1V_S5
S5 PWR
VIN
1
DDR VDDQ VR
S3
S5
+3VPCU
3
1.5V VR
EN
RUN PWR
VIN
1
+1V_S5
VR
EN
5
PG
DDR_VTTT_PG_CTRL
MAINON
SUSON
PG
MOS1 MOS2 MOS3
G
26
PG
+1V_S5
+5V_S5
+3V_S5
S5_ON
+1.2VSUS
+VDDQ
+VDDQ_VTT
HWPG_VDDR
+1.5V
HWPG_1.5V
MAINON
+5V
+3V
+VCCIO
MAINON
9
+1V_S5
HWPG_1VS5
Battery
3
DSW PWR
VCCPRIM PWR
VCCMPHY PWR
HSIO PWR
PCH
CORE PWR
VCCSRAM PWR
VCCPGPPA PWR VCCPGPPB PWR VCCPGPPC PWR VCCPGPPD PWR VCCPGPPE PWR VCCPGPPG PWR VCCPGPPF PWR
CORE PWR
CPU
VDDQ PWR
VCCST PWR
VR_READY
VCCST_PWRGD
IMVP_PWRGD
VCCST_PWRGD_EN
34
1
SPI PWR
PLL PWR
HDA PWR
VR_ENVRON
32a

+1V_S5
+1V_S5
+1.8V_S5
V1_MPHY
V1_MPHY
+1V_S5
+1V_S5
+1.5V
+1.8V_S5
+VCCIN
+1.2VSUS
+1V_VCCST
D
C
+3V_S5
B
A
2
Delay DSW power well 10ms
VCCST_PWRGD
31a
31C
EC_PWROK PCH_CLK PLTRST#
36
SYS_PWROK
1
CHARGER
DPWROK
RSMRST#
ACPRESENT PWRBTN# SLP_S4# SLP_S3# SUSACK SUSWRAN SLP_SUS#
VCCST_PWRGD
PCH_PWROK
PLTRST#
SYS_PWROK
38
PLTRST#
BAT-VVIN
+3VPCU or +3V_S5
21
22
17
11
10
8
18
19
23
24
24
12
2929
4
VIN
3V/5V
VR
EN2
1
EN1
NBSWON#
3 3
+3VPCU +5VPCU
5V_LDO
2
PWR BTN
7
30
HWPG
HWPG_VDDR
HWPG_1V_S5
HWPG_1.5V
31C
3
VL
2
+15V
4
6
DPWROK
13
RSMRST#
14
EC
ACPRESENT DNBSWON#
15
SUSC# SUSB#
PCH_SUSACK# PCH_SUSPWARN# PCH_SLP_SUS#
31b
16 20
PCH_PWROK
35
VRON
32b
MAINON
1721
EC_PWROK
S5_ON
SUSON
+1V_S5_ON
8
9
38
31C
IMVP_PWRGD
EC_PWROK
21
28
+1VSUS
27
29
VIN
21
1
IMVP VR
12
8
SVID
0 ohm
EN
PG
+1V_VCCST
+VCC_CORE
+VCCSA
+VCCGT
IMVP_PWRGD
VRON
33
33
33
34
32a
31b
31C
12
36
EC_PWROK
HWPG_1VS5
PCH_PWROK
SYS_PWROK
HWPG+1ms
10K ohm
VCCST_PWRGD_EN
RESET#
PROCPWRGD
SVID
SVID
22
37
SM_PG_CNTL1
DDR_PG_CTRL
37
CPU
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
4
3
2
Date: Sheet
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Power Sequence
Power Sequence
Power Sequence
ZRW
ZRW
ZRW
of
41 46Monday, February 22, 2016
of
41 46Monday, February 22, 2016
of
41 46Monday, February 22, 2016
1
1A
1A
1A
5
Skylake U Non-Deep Sx Platform Power on sequence
4
3
2
1

D
C
D
C
B
A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT :
Power on Sequence
Power on Sequence
Power on Sequence
ZRW
ZRW
ZRW
of
42 46Monday, February 22, 2016
of
42 46Monday, February 22, 2016
of
1
42 46Monday, February 22, 2016
B
A
1A
1A
1A
󱬯󳴣󴞱 󴖤󳴣󴞱
D
C
B
A
defult reserve
PWR
VIN
EC
EC
EC
EC
PCH
5
3V_LDO
VIN
PWRGD
+1.0V_S5
Vin
RT8237CZQW
+1V_S5_ON
MAINON
DDR_VTTT_PG_CTRL
VIN
5
EN
EN1
5V
3V
EN1
HWPG_1VS5
S5 EN
S3 EN
PWRGD5V_LDO
TPS51225
Vout
SYS_HWPG
S5_Vout
S3_Vout
Vin
PWRGDSUSON
+1.2VSUS
G5316RZ1D
Vin
HWPG_VDDR
S5_Vout
S3_Vout
+1V_S5
+5VPCU
+3VPCU
PCH
4
PCH
MAIND
SUSON
MPHY_EXT_PWR
+1.2VSUS +VDDQ_VTT
+VDDQ
4
S5D
MAIND
S5D
MAIND
3V_MAIN_PWGD
dGPU_PWR_EN
MDV1528Q
AO3404
0 ohm
TPS22965DSGR
MDV1528Q
MDV1528Q
AO3404
MDV1528Q
RT8068AZQW
AO3404
+3V_S5
+VCCIO
+1V_SUS
V1_MPHY
Vin
S5_ON
3
+5V_S5
+5V
+3V_S5
+3V
+1.05V_GFX
+3V_GFX
HWPG_1.8VS5
PWRGD
+1.8V_S5
APW8824
EN
3
Vout
+1.8V_S5
VIN
VIN
VIN
VRON
SVID
VRON
SVID
VRON
SVID
VIN
VIN
+3V_S5
3V_MAIN_PWGD
FBVDDQ_EN
+VCC_CORE
Vin
ISL95857HRTZ-T
+VCCSA
Vin
ISL95857HRTZ-T
+VCCGT
Vin
ISL95857HRTZ-T
2
Vin
Vin
IMVP_PWRGD
PWRGD
IMVP_PWRGD
PWRGD
IMVP_PWRGD
PWRGD
Vin
MAINON
2
PWRGD
VGPU Core
up1658 EN
PWRGD
+1.5V_GFX
NB671GQ-Z
EN
PWRGD
+1.5V
APW8824
EN
VGPU_PWRGD
Vout
HWPG_1.5VGFX
Vout
VIN
VIN
VIN
HWPG_1.5V
Vout
1
+VGPU_CORE
+1.5V_GFX
Vin
PWM_A FCCM_A
Vin
PWM_C FCCM_C
Vin
PWM1_B FCCM_B
AOZ5029QI
EN
AOZ5029QI
EN
AOZ5029QI
EN
Vout
Vout
Vout
+VCCCORE
+VCCSA
+VCCGT
+1.5V
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
SKL PCH PWR CONTROL
SKL PCH PWR CONTROL
SKL PCH PWR CONTROL
1
ZRW
ZRW
ZRW
43 46Monday, February 22, 2016
43 46Monday, February 22, 2016
43 46Monday, February 22, 2016

of
of
of
D
C
B
A
1A
1A
1A
1
2
3
4
5
6
7
8
+3V_S5
+3V

SDRAM
2.2K2.2K
R7
A
SMB_PCH_CLK
R8
SMB_PCH_DAT
+3V 2N7002DW
Level shift
CLK_SCLK CLK_SDATA
2.2K2.2K
A
G-Sensor
XDP
Skylake U
+3V_S5
B
R9
VGA_MBCLK
W2
VGA_MBDATA
2.2K2.2K
+3V_S5
*2.2K*2.2K
W3
SMB_ME1_CLK
V3
SMB_ME1_DAT
+3V_S5
+3V_S5 *2N7002DW
Level shift
+3V_GFX
B
C
2ND_MBCLK
115
2ND_MBDATA
116
00
2.2K2.2K
2.2K2.2K
+3V_MAIN
2N7002DW Level shift
GFX_SCL GFX_SDA
VGA
C
EC
IT8987CX
D
110
MBCLK
111 MBDATA
1
2
3
+3VPCU
4.7K4.7K
CHARGER
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
4
5
6
7
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
SMBUS Block Diagram
SMBUS Block Diagram
SMBUS Block Diagram
ZRW
ZRW
ZRW
44 46Monday, February 22, 2016
44 46Monday, February 22, 2016
44 46Monday, February 22, 2016
8
of
of
of
D
1A
1A
1A
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