5
www.schematic-x.blogspot.com
4
3
2
1
BOM
Z8C_GDDR3 SHB ULT SYSTEM BLOCK DIAGRAM
Dual Channel DDR III
P14
P28
1600 MHZ
USB2-3
USB2-6
USB2-5
USB2-7
SATA0
HSW/ BDW ULT 15W
MCP 1168pins
IMC
DC+GT3
40 mm X 24 mm
SATA
Integrated PCH
USB2.0
PCI-E x4
TX/RX
CLK
eDP
USB3.0/2.0
CLK
PCI-E x3
DP
PCIE-5
EDP
DDI2-Lane0~1
DDI1
USB3-1
USB2-0
X'TAL
32.768KHz
Memory Down
D D
Max. 4G
USB3 Port
MB side
C C
2Rx16
P15
P32
DDR3L-SODIMM
SATA - HDD
USB3-2
USB2-1
USB2 IO
CCD(Camera)
Touch Screen(reserve)
Fingerprint(option)
P32
P25
P25
P25
GPU
N15S-GT
840M
820M N15V-GM
Display
P16~P19
DP to VGA
IF6513FN
USB Charger USB3 Port
SLG55584A
P24
P32
I/O board
I/O Board Conn. USB2 IO
P32
USB2-2
Azalia
P8
BATTERY
RTC
IHDA
LPC
P2~P13
CLK
SPI
X'TAL 24MHz
SPI ROM
P8
X'TAL 27MHz
PCIE-4
PCIE-2
USB2-4
PCIE-3
VRAM
GV2-DDR3
eDP Conn.
CRT Conn.
HDMI Conn.
MB side
RTL8411AAR
/RTL8411BAR
8 PCS
P20~P23
P25
P26
MINI CARD
WIGIG
10/100/1G
P24
P32
P27
P29
X'TAL 25MHz
IV@ : iGPU
EV@ : Optimus
SW@ : With DP switch
NSW@ : W/O DP switch
TPL@ : Touch screen
KBL@ : Keyboard backlight
TPM@ : TPM
RJ45
P29
Cardreader
CONN. 2in 1
P30
01
P32
EC
IT8587
G- Sensor
P33
Touch Pad
3
P34
P35
Fan Driver
(PWM Type)
P34
TPM(option)
P28
BQ24737A
Batery Charger
TPS51225
+3V/+5V
TPS51624
+VCCIN
TPS51211
+1.05V_S5/+1.05V
2
TPS51216
+1.35V_SUS
P36
TPS54318
+1.5V
P37
UP1642
+VGPU_CORE
P40
TPS51211
+1.5V_GFX/1.05V_GFX/3V_GFX
P38
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Thermal Protection
P39
Discharger
P41
P42
P43
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Block Diagram
Block Diagram
Block Diagram
1
Z8C
Z8C
Z8C
1 48 Saturday, November 15, 2014
1 48 Saturday, November 15, 2014
1 48 Saturday, November 15, 2014
P41
B B
DMIC Array
Int. MIC
P31
Combo HP
A A
5
ALC3225
AUDIO CODEC
P31 P31
P31
Speaker*2
P34
D/B
HALL SENSOR
K/B Con.
4
3A
3A
3A
5
4
3
2
1
Haswell ULT (DISPLAY,eDP)
U45A
HSW_ULT_DDR3L
02
D D
HDMI
CRT
ITE FAE suggest CAP
should be at PCH side.
C C
B B
INT_HDMITX2N 26
INT_HDMITX2P 26
INT_HDMITX1N 26
INT_HDMITX1P 26
INT_HDMITX0N 26
INT_HDMITX0P 26
INT_HDMICLK- 26
INT_HDMICLK+ 26
CRT_TXN0 24
CRT_TXP0 24
CRT_TXN1 24
CRT_TXP1 24
PCH_BRIGHT 25
PCH_BLON 25
PCH_VDDEN 25
TP61
TPD_INT#_D 35
BOARD_ID4 10
BOARD_ID1 10
BOARD_ID2 10
TP109
TP108
TP114
TP113
PCH_BRIGHT
PCH_BLON
PCH_VDDEN
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PME#
TPD_INT#_D
DGPU_SELECT#
BOARD_ID4
BOARD_ID1
BOARD_ID2
C54
C55
B58
C58
B55
A55
A57
B57
C51
C50
C53
B54
C49
B50
A53
B53
AD4
B8
A9
C6
U6
P4
N4
N2
U7
L1
L3
R5
L4
DDI1_TXN0
DDI1_TXP0
DDI1_TXN1
DDI1_TXP1
DDI1_TXN2
DDI1_TXP2
DDI1_TXN3
DDI1_TXP3
DDI2_TXN0
DDI2_TXP0
DDI2_TXN1
DDI2_TXP1
DDI2_TXN2
DDI2_TXP2
DDI2_TXN3
DDI2_TXP3
U45I
EDP_BKLCTL
EDP_BKLEN
EDP_VDDEN
PIRQA/GPIO77
PIRQB/GPIO78
PIRQC/GPIO79
PIRQD/GPIO80
PME
+3V
GPIO55
+3V
GPIO52
+3V
GPIO54
+3V
GPIO51
+3V
GPIO53
eDP SIDEBAND
+3V
+3V
+3V
+3V
+3V_S5
PCIE
1 OF 19
HSW_ULT_DDR3L
9 OF 19
EDP DDI
DISPLAY
EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1
EDP_TXN2
EDP_TXP2
EDP_TXN3
EDP_TXP3
EDP_AUXN
EDP_AUXP
EDP_RCOMP
EDP_DISP_UTIL
DDPB_CTRLCLK
DDPB_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPB_AUXN
DDPC_AUXN
DDPB_AUXP
DDPC_AUXP
DDPB_HPD
DDPC_HPD
EDP_HPD
C45
B46
A47
B47
C47
C46
A49
B49
A45
B45
D20
A43
B9
C9
D9
D11
C5
B6
B5
A6
C8
A8
D6
EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1
EDP_TXN2
EDP_TXP2
EDP_TXN3
EDP_TXP3
EDP_AUXN
EDP_AUXP
EDP_RCOMP
CRT_CLK
CRT_DATA
R86
100K_4
EDP_TXN0 25
EDP_TXP0 25
EDP_TXN1 25
EDP_TXP1 25
EDP_TXN2 25
EDP_TXP2 25
EDP_TXN3 25
EDP_TXP3 25
EDP_AUXN 25
EDP_AUXP 25
R107 24.9/F_4
R502 *0_4
R503 *0_4
HDMI_DDCCLK_SW 26
HDMI_DDCDATA_SW 26
CRT_AUXN 24
CRT_AUXP 24
INT_HDMI_HPD 26
CRT_HPD 24
EDP_HPD 25
R484
4.7K_4
PCH_BRIGHT DP_UTIL
eDP Panel
+VCCIOA_OUT
eDP_RCOMP
Trace length < 100 mils
Trace width = 20 mils
Trace spacing = 25 mils
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
DGPU_SELECT#
TPD_INT#_D
CRT_CLK
CRT_DATA
R115 10K_4
R570 10K_4
R538 10K_4
R551 10K_4
R543 10K_4
R130 TPL@100K_4
R515 2.2K_4
R514 2.2K_4
+3V
+3V
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
5
4
3
Saturday, November 15, 2014
2
PROJECT :
Haswell 3/5 (DDI/eDP)
Haswell 3/5 (DDI/eDP)
Haswell 3/5 (DDI/eDP)
Z8C
Z8C
Z8C
2 48
2 48
2 48
1
3A
3A
3A
5
4
3
2
1
Haswell ULT (DDR3L) Haswell Processor (DDR3)
U45C
M_A_DQ[63:0] 14
D D
C C
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
AH63
AH62
AK63
AK62
AH61
AH60
AK61
AK60
AM63
AM62
AP63
AP62
AM61
AM60
AP61
AP60
AP58
AR58
AM57
AK57
AL58
AK58
AR57
AN57
AP55
AR55
AM54
AK54
AL55
AK55
AR54
AN54
AY58
AW58
AY56
AW56
AV58
AU58
AV56
AU56
AY54
AW54
AY52
AW52
AV54
AU54
AV52
AU52
AK40
AK42
AM43
AM45
AK45
AK43
AM40
AM42
AM46
AK46
AM49
AK49
AM48
AK48
AM51
AK51
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
HSW_ULT_DDR3L
DDR CHANNEL A
SA_CLK#0
SA_CLK0
SA_CLK#1
SA_CLK1
SA_CKE0
SA_CKE1
SA_CKE2
SA_CKE3
SA_CS#0
SA_CS#1
SA_ODT0
SA_RAS
SA_WE
SA_CAS
SA_BA0
SA_BA1
SA_BA2
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15
SA_DQSN0
SA_DQSN1
SA_DQSN2
SA_DQSN3
SA_DQSN4
SA_DQSN5
SA_DQSN6
SA_DQSN7
SA_DQSP0
SA_DQSP1
SA_DQSP2
SA_DQSP3
SA_DQSP4
SA_DQSP5
SA_DQSP6
SA_DQSP7
SM_VREF_CA
SM_VREF_DQ0
SM_VREF_DQ1
AU37
AV37
AW36
AY36
AU43
AW43
AY42
AY43
AP33
AR32
AP32
AY34
AW34
AU34
AU35
AV35
AY41
AU36
AY37
AR38
AP36
AU39
AR36
AV40
AW39
AY39
AU40
AP35
AW41
AU41
AR35
AV42
AU42
AJ61
AN62
AM58
AM55
AV57
AV53
AL43
AL48
AJ62
AN61
AN58
AN55
AW57
AW53
AL42
AL49
AP49
AR51
AP51
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
+VREF_CA_CPU
+VREFDQ_SA_M3
+VREFDQ_SB_M3
M_A_CLK0# 14
M_A_CLK0 14
M_A_CLK1# 14
M_A_CLK1 14
M_A_CKE0 14
M_A_CKE1 14
M_A_CS#0 14
M_A_CS#1 14
TP80
M_A_RAS# 14
M_A_WE# 14
M_A_CAS# 14
M_A_BS#0 14
M_A_BS#1 14
M_A_BS#2 14
M_A_A[15:0] 14
M_A_DQS#[7:0] 14
M_A_DQS[7:0] 14
U45D
M_B_DQ[63:0] 15
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AY31
AW31
AY29
AW29
AV31
AU31
AV29
AU29
AY27
AW27
AY25
AW25
AV27
AU27
AV25
AU25
AM29
AK29
AL28
AK28
AR29
AN29
AR28
AP28
AN26
AR26
AR25
AP25
AK26
AM26
AK25
AL25
AY23
AW23
AY21
AW21
AV23
AU23
AV21
AU21
AY19
AW19
AY17
AW17
AV19
AU19
AV17
AU17
AR21
AR22
AL21
AM22
AN22
AP21
AK21
AK22
AN20
AR20
AK18
AL18
AK20
AM20
AR18
AP18
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
HSW_ULT_DDR3L
DDR CHANNEL B
SB_CK#0
SB_CK0
SB_CK#1
SB_CK1
SB_CKE0
SB_CKE1
SB_CKE2
SB_CKE3
SB_CS#0
SB_CS#1
SB_ODT0
SB_RAS
SB_WE
SB_CAS
SB_BA0
SB_BA1
SB_BA2
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15
SB_DQSN0
SB_DQSN1
SB_DQSN2
SB_DQSN3
SB_DQSN4
SB_DQSN5
SB_DQSN6
SB_DQSN7
SB_DQSP0
SB_DQSP1
SB_DQSP2
SB_DQSP3
SB_DQSP4
SB_DQSP5
SB_DQSP6
SB_DQSP7
AM38
AN38
AK38
AL38
AY49
AU50
AW49
AV50
AM32
AK32
AL32
AM35
AK35
AM33
AL35
AM36
AU49
AP40
AR40
AP42
AR42
AR45
AP45
AW46
AY46
AY47
AU46
AK36
AV47
AU47
AK33
AR46
AP46
AW30
AV26
AN28
AN25
AW22
AV18
AN21
AN18
AV30
AW26
AM28
AM25
AV22
AW18
AM21
AM18
M_B_ODT0
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_CLK0# 15
M_B_CLK0 15
M_B_CLK1# 15
M_B_CLK1 15
M_B_CKE0 15
M_B_CKE1 15
M_B_CS#0 15
M_B_CS#1 15
TP78
M_B_RAS# 15
M_B_WE# 15
M_B_CAS# 15
M_B_BS#0 15
M_B_BS#1 15
M_B_BS#2 15
M_B_A[15:0] 15
M_B_DQS#[7:0] 15
M_B_DQS[7:0] 15
03
B B
3 OF 19
A A
5
4
3
4 OF 19
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
2
Saturday, November 15, 2014
PROJECT :
Haswell 2/5 (DDR3 I/F)
Haswell 2/5 (DDR3 I/F)
Haswell 2/5 (DDR3 I/F)
Z8C
Z8C
Z8C
3A
3A
3 48
3 48
1
3 48
3A
5
4
3
2
1
04
H_PECI (50ohm)
Route on microstrip only
D D
C C
Spacing >18 mils
Trace Length: 0.4~6.125 iches
H_PWRGOOD (50ohm)
Trace Length: 1~11.25 inches
CPU_PLTRST# (50ohm)
Trace Length: 10~17 inches
H_PECI 35 XDP_PRDY# 13
H_PROCHOT# 35,36,40
TP116
TP28
R542 56_4
SM_RCOMP[0:2]
Trace length < 500 mils
Trace width = 12~15 mils
Trace spacing = 20 mils
PROC_DETECT
CATERR#
H_PECI
H_PROCHOT#_R H_PROCHOT#
H_PWRGOOD_R
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
DDR_PG_CTRL
Haswell ULT (SIDEBAND)
THERMAL
DDR3L
DSW
HSW_ULT_DDR3L
MISC
JTAG
PWR
2 OF 19
D61
K61
N62
K63
C61
AU60
AV60
AU61
AV15
AV61
U45B
PROC_DETECT
CATERR
PECI
PROCHOT
PROCPWRGD
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
SM_DRAMRST
SM_PG_CNTL1
PRDY
PREQ
PROC_TCK
PROC_TMS
PROC_TRST
PROC_TDI
PROC_TDO
BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7
J62
XDP_PRDY#
K62
XDP_PREQ#
E60
XDP_TCK0
E61
XDP_TMS_CPU
E59
XDP_TRST#
F63
XDP_TDI_CPU
F62
XDP_TDO_CPU
J60
XDP_BPM#0
H60
XDP_BPM#1
H61
XDP_BPM#2
H62
XDP_BPM#3
K59
XDP_BPM#4
H63
XDP_BPM#5
K60
XDP_BPM#6
J61
XDP_BPM#7 CPU_DRAMRST#
XDP_PREQ# 13
XDP_TCK0 8,13
XDP_TMS_CPU 13
XDP_TRST# 8,13
XDP_TDI_CPU 13
XDP_TDO_CPU 13
XDP_BPM#0 13
XDP_BPM#1 13
TP118
TP119
TP21
TP117
TP23
TP16
TCK,TMS
Trace Length < 9000mils
BPM#[0:7]
Trace Length 1~6 inches
Length match < 300 mils
B B
DRAM COMP
R639 200/F_4
R645 120/F_4
R640 100/F_4
PU/PD of CPU
H_PROCHOT#
A A
H_PWRGOOD_R
R546 *62_4
R548 62_4
R508 10K_4
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
5
+VCCIO_OUT
+1.05V_VCCST
DRAMRST
CPU DRAM
CPU_DRAMRST#
+1.35V_SUS
1 2
4
XDP_TDO_CPU
XDP_TCK0
XDP_TRST#
470_4
R103 51_4
R152 51_4
R644 *51_4
R376 *SHORT_4
+1.05V_VCCST
1 2
C460
*0.1u/10V_4
DDR3_DRAMRST# 14,15
3
DDR3L ODT GENERATION XDP PU/PD
+5V_S5
1 2
R280
220K/F_4
DDR_VTTT_PG_CTRL 39
2
0.1u/10V_4
+1.35V_SUS
3
2
1
+1.35V_SUS
U23
5
VCC
1 2
C299
4
Y
74AUP1G07GW
Q25
2N7002K
R709 66.5/F_4 R375
R710 66.5/F_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
1
NC
2
A
GND
Haswell 1/5 (PEG/DMI/FDI)
Haswell 1/5 (PEG/DMI/FDI)
Haswell 1/5 (PEG/DMI/FDI)
R649 *SHORT_4
3
M_B_ODT0_DIMM 15
M_B_ODT1_DIMM 15
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
Z8C
Z8C
Z8C
DDR_PG_CTRL
4 48
4 48
4 48
3A
3A
3A
5
VDDQ Output Decoupling Recommendations
330uFx2 7343
22uFx11
10uFx10
D D
+1.35V_SUS
+
C C
+1.05V_VCCST
VRON_CPU IMVP_PWRGD
B B
BOT socket side
5 onTOP, 6 on BOT inside socket cavity
0805
5 onTOP, 5 on BOT inside socket cavity
0805
C269
C270
10u/6.3V_6
10u/6.3V_6
C291
*470u/2V_7343
R144 *SHORT_8
C276
2.2u/6.3V_6
VCC_SENSE 40
R506 *10K_4
R507 10K_4
PWR_DEBUG 13
+1.05V_VCCST +1.05V
+VCCIN
+1.05V_VCCST
C241
*4.7u/6.3V_6
C272
10u/6.3V_6
C242
2.2u/6.3V_6
+1.35V_CPU 1.4A
+1.35V_CPU
C271
10u/6.3V_6
C268
2.2u/6.3V_6
R522 100/F_4
R526 *SHORT_4
300mA
+VCCIO_OUT
300mA
+VCCIOA_OUT
VCCST_PWRGD 13
VRON_CPU 40
IMVP_PWRGD 10,40
R127 *SHORT_4
R109 150_6
C243
10u/6.3V_6
C245
2.2u/6.3V_6
+VCCIN
C244
10u/6.3V_6
TP31
TP56
TP58
TP59
TP66
TP73
TP29
TP27
TP25
TP125
TP37
TP72
TP75
TP49
TP54
TP57
TP71
TP34
TP50
TP24
TP15
ULT_RVSD_61
ULT_RVSD_62
ULT_RVSD_63
ULT_RVSD_64
VCC_SENSE_R
ULT_RVSD_65
ULT_RVSD_66
ULT_RVSD_67
ULT_RVSD_68
H_CPU_SVIDART#
H_CPU_SVIDCLK
H_CPU_SVIDDAT
VCCST_PWRGD
VRON_CPU
IMVP_PWRGD
PWR_DEBUG_R
ULT_RVSD_69
ULT_RVSD_70
ULT_RVSD_71
ULT_RVSD_72
ULT_RVSD_73
ULT_RVSD_74
ULT_RVSD_75
ULT_RVSD_76
ULT_RVSD_77
ULT_RVSD_78
ULT_RVSD_79
ULT_RVSD_80
ULT_RVSD_81
+1.05V_VCCST
+VCCIN
4
Haswell ULT (POWER)
HSW_ULT_DDR3L
HSW ULT POWER
12 OF 19
AH26
AJ31
AJ33
AJ37
AN33
AP43
AR48
AY35
AY40
AY44
AY50
AC58
AB23
AD23
AA23
AE59
AD60
AD59
AA59
AE60
AC59
AG58
AC22
AE22
AE23
AB57
AD57
AG57
L59
J58
F59
N58
E63
A59
E20
L62
N63
L63
B59
F60
C59
D63
H59
P62
P60
P61
N59
N61
T59
U59
V59
C24
C28
C32
U45L
RSVD
RSVD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VCC
RSVD
RSVD
VCC_SENSE
RSVD
VCCIO_OUT
VCCIOA_OUT
RSVD
RSVD
RSVD
VIDALERT
VIDSCLK
VIDSOUT
VCCST_PWRGD
VR_EN
VR_READY
VSS
PWR_DEBUG
VSS
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
VCCST
VCCST
VCCST
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
C36
C40
C44
C48
C52
C56
E23
E25
E27
E29
E31
E33
E35
E37
E39
E41
E43
E45
E47
E49
E51
E53
E55
E57
F24
F28
F32
F36
F40
F44
F48
F52
F56
G23
G25
G27
G29
G31
G33
G35
G37
G39
G41
G43
G45
G47
G49
G51
G53
G55
G57
H23
J23
K23
K57
L22
M23
M57
P57
U57
W57
3
+
C572
*470u/2V_7343
C60
C210
22u/6.3V_8
22u/6.3V_8
C228
22u/6.3V_8
C607
C179
22u/6.3V_8
22u/6.3V_8
C222
C185
22u/6.3V_8
22u/6.3V_8
C595
C180
22u/6.3V_8
*22u/6.3V_8
VCC Output Decoupling Recommendations
470uFx4 7343
22uFx8
22uFx11
10uFx11
0805
0805
0805
+VCCIN 32A
C93
C606
22u/6.3V_8
C219
22u/6.3V_8
C181
22u/6.3V_8
C182
22u/6.3V_8
C586
*22u/6.3V_8
C246
22u/6.3V_8
C224
22u/6.3V_8
C177
22u/6.3V_8
C221
22u/6.3V_8
C94
*22u/6.3V_8
22u/6.3V_8
C602
22u/6.3V_8
C59
22u/6.3V_8
C184
22u/6.3V_8
C90
*22u/6.3V_8
TOP socket side
4 on TOP, 4 on BOT near socket edge
TOP, inside socket cavity
BOT, inside socket cavity
2
C95
22u/6.3V_8
C220
22u/6.3V_8
C183
22u/6.3V_8
C223
22u/6.3V_8
C605
*22u/6.3V_8
VCCST PWRGD
VCCST_PWRGD
C622
*0.1u/10V_4
+VCCIN
SVID
H_CPU_SVIDDAT
H_CPU_SVIDART#
+1.05V_VCCST
R499
10K_4
R497 *SHORT0402
R521 *0_4
VCCST_PWRGD_EN
Layout note: need routing together
and ALERT need between CLK and DATA.
+VCCIO_OUT
R555
*130/F_4
Place PU resistor
close to CPU
Place PU resistor
close to CPU
CRB is via +1.05V PG
+3V_S5
HWPG_1.05V_EC
B-stage DNP
+1.05V_VCCST
R554
130/F_4
R558 *SHORT_4
R565 43_4
C623
0.1u/10V_4
VCCST_PWRGD_R
R495 *0_8
5
4
Q39
*2N7002K
R518 *SHORT0402
R519 *0_4
+VCCIO_OUT +1.05V
+1.05V_VCCST
1
U42
VCC
Y
74AUP1G07GW
3
1
R578
75_4
1
NC
2
A
3
GND
Reserve from EC
2
C621
*4.7u/6.3V_6
+VCCIO_OUT
R568
*75_4
05
VCCST_PWRGD_EN
HWPG_1.05V_EC# 35
PCH_PWROK 7,35
APWORK 7,35
VR_SVID_DATA 40
VR_SVID_ALERT# 40
HWPG_1.05V for DDR=1.5V
+3V
A A
C493
*1000p/50V_4
2
Q33
1 3
*MMBT3904-7-F
+1.05V
R401 *4.7K_4
5
R399
*4.7K_4
C492
*1000p/50V_4
+3V
R402
*4.7K_4
HWPG_1.05V 35
2
Q34
1 3
*DTC144EU
R400
*100K/F_4
10/30 reserve
DDR=1.5V ,This block POP
4
3
2
H_CPU_SVIDCLK
R579 *SHORT_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
PROJECT :
Haswell 4/5 (POWER)
Haswell 4/5 (POWER)
Haswell 4/5 (POWER)
1
VR_SVID_CLK 40
Z8C
Z8C
Z8C
5 48
5 48
5 48
3A
3A
3A
5
4
3
2
1
Haswell ULT (CFG,RSVD)
U45S
HSW_ULT_DDR3L
06
D D
NOA_STBN_0 13
NOA_STBN_1 13
NOA_STBP_0 13
NOA_STBP_1 13
C C
CFG0 13
CFG1 13
CFG2 13
CFG3 13
CFG4 8,13
CFG5 13
CFG6 13
CFG7 13
CFG8 13
CFG9 13
CFG10 13
CFG11 13
CFG12 13
CFG13 13
CFG14 13
CFG15 13
R129 49.9/F_4
R511 8.2K_4
NOA_STBN_0
NOA_STBN_1
NOA_STBP_0
NOA_STBP_1
CFG_RCOMP
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
TD_IREF
AC60
AC62
AC63
AA63
AA60
Y62
Y61
Y60
V62
V61
V60
U60
T63
T62
T61
T60
AA62
U63
AA61
U62
V63
J20
H18
B12
A5
E1
D1
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG18
CFG17
CFG19
CFG_RCOMP
RSVD
RSVD
RSVD
RSVD
RSVD
TD_IREF
RESERVED
PROC_OPI_RCOMP
19 OF 19
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
RSVD
RSVD
VSS
VSS
RSVD
RSVD
AV63
AU63
C63
C62
B43
A51
B51
L60
N60
W23
Y22
AY15
AV62
D58
P22
N21
P20
R20
OPI_COMP1
R654 49.9/F_4
Processor Strapping
1 0
CFG0
EAR-STALL/NOT STALL RESET SEQUENCE
AFTER PCU PLL IS LOCKED
CFG1
PCH/ PCH LESS MODE SELECTION
B B
CFG3
PHYSICAL_DEBUG_ENABLED (DFX PRIVACY)
CFG 8
ALLOW THE USE OF NOA ON LOCKED UNITS
(DEFAULT) NORMAL OPERATION; NO STALL
(DEFAULT) NORMAL OPERATION
DISABLED
NO PHYSICAL DISPLAY PORT ATTACHED
TO
EMBEDDED DISPLAY PORT
DISABLED(DEFAULT); IN THIS CASE, NOA
WILL BE DISABLED IN LOCKED UNITS AND
ENABLED IN UN-LOCKED UNITS
STALL
PCH-LESS MODE
ENABLED
AN EXTERNAL DISPLAY PORT DEVICE IS
CONNECTED
TO THE EMBEDDED DISPLAY PORT
ENABLED; NOA WILL BE AVAILABLE
REGARDLESS OF THE LOCKING OF THE UNIT
CFG0
CFG1
CFG3
CFG8
R153 *1K_4
R136 *1K_4
R142 *1K_4
R125 *1K_4
CFG9
NO SVID PROTOCOL CAPABLE VR
CONNECTED
A A
CFG10
SAFE MODE BOOT
5
VRS SUPPORTING SVID PROTOCOL ARE
PRESENT
POWER FEATURES ACTIVATED
DURING RESET
4
NO VR SUPPORTING SVID IS PRESENT. THE
CHIP WILL NOT GENERATE (OR RESPOND TO)
SVID ACTIVITY
POWER FEATURES (ESPECIALLY CLOCK
GATINE ARE NOT ACTIVATED
3
CFG9
CFG10
R126 *1K_4
R135 *1K_4
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
PROJECT :
Haswell 5/5 (CFG/GND)
Haswell 5/5 (CFG/GND)
Haswell 5/5 (CFG/GND)
1
Z8C
Z8C
Z8C
6 48
6 48
6 48
3A
3A
3A
5
4
3
2
1
Haswell ULT PCH (PM)
PCH_SUSACK# 35
PCH_SUSPWARN# 35
SYS_PWROK
EC_PWROK
RSMRST# 35
DNBSWON# 35
ACPRESENT 36
PCH_SLP_S0# 13
D D
PCH_SUSPWRACK
SYS_RESET# 13
R601 *SHORT_4
R673 *0_4
R656 *0_4
PCI_PLTRST# 35
R678 *SHORT_4
R616 *SHORT_4
R236 *SHORT_4
R239 *SHORT_4
R598 *SHORT_4
R620 *0_4
R615 *0_4
C660 *1u/6.3V_4
R661 *0_4
R653 *0_4
TP79
SUSACK#_R
SYS_RESET#
SYS_PWROK_R
EC_PWROK_R
APWROK_R
PCI_PLTRST#
PCH_RSMRST#
PCH_SUSPWRACK
PCH_PWRBTN#
PCH_ACPRESENT
PCH_BATLOW#
PCH_SLP_S0#_R
PCH_SLP_WLAN#
U45H
AK2
SUSACK
AC3
SYS_RESET
AG2
SYS_PWROK
AY7
PCH_PWROK
AB5
APWROK
AG7
AW6
AV4
AL7
AJ8
AN4
AF3
AM5
+3V_S5
PLTRST
RSMRST
SUSWARN/SUSPWRDNACK/GPIO30
PWRBTN
ACPRESENT/GPIO31
BATLOW/GPIO72
SLP_S0
SLP_WLAN/GPIO29
HSW_ULT_DDR3L
SYSTEM POWER MANAGEMENT
+3V
+3V_S5
+3V_S5
DSW
DSW
DSW
DSW
+3V_S5
DSW
+3V_S5
8 OF 19
DSWVRMEN
DPWROK
DSW
CLKRUN/GPIO32
SUS_STAT/GPIO61
DSW
DSW
DSW
DSW
DSW
WAKE
SUSCLK/GPIO62
SLP_S5/GPIO63
SLP_S4
SLP_S3
SLP_A
SLP_SUS
SLP_LAN
AW7
DSWVREN
AV5
DPWROK_R
AJ5
PCIE_LAN_WAKE#
V5
CLKRUN#
AG4
AE6
PCH_SUSCLK
AP5
PCH_SLP_S5#
AJ6
SUSC#
AT4
SUSB#
AL5
PCH_SLP_A#
AP4
PCH_SLP_SUS#
AJ7
PCH_SLP_LAN#
Deep Sx
R681 *0_4
TP76
R689 0_4
TP67
DSWVREN 8
DPWROK 35
PCIE_LAN_WAKE# 27,29
CLKRUN# 28,35
PCH_WIFI_SUSCLK# 27
PCH_SLP_S5# 13
SUSC# 13,35
SUSB# 13,35
PCH_SLP_A# 13
PCH_SLP_SUS# 35
07
C C
PCH PM PU/PD
+3V
CLKRUN#
SYS_RESET#
B B
A A
PCH_RSMRST#
SYS_PWROK
DPWROK_R
PCH_SUSPWRACK
PCH_ACPRESENT
PCH_BATLOW#
PCIE_LAN_WAKE#
PCH_PWRBTN#
R131 8.2K_4
R581 10K_4
R663 10K_4
R687 *10K_4
R680 100K/F_4
R650 *10K_4
Follow ZQ0
R219 10K_4
R226 8.2K_4
R228 *10K_4
R221 *10K_4
R234 *10K_4
R237 *8.2K_4
R238 1K_4
R235 *10K_4
5
+3V_S5
+3V_S5
+3VPCU
Power Sequence
PCH_PWROK 5,35
R356
100K_4
EC_PWROK SYS_PWROK_R
R352 *SHORT_4
R666 *0_4
R679 *SHORT_4
Non Deep Sx
EC_PWROK_R
DPWROK_R RSMRST#
PLTRST# Buffer Deep Sx Circuit
+3V
PCI_PLTRST#
2
1
3 5
C266 0.1u/10V_4
4
U20
TC7SH08FU
R198
100K_4
PLTRST# 13,16,27,28,29,35
+3V_S5 +3VCC_S5
*0.33u/10V_6
SYSPWOK
+3V_S5
C677 *0.1u/10V_4
2
SYS_PWROK 13
4
SYS_PWROK
4
U47
TC7SH08FU
3 5
R683 *0_4
EC_PWROK
1
3
EC_PWROK 35
IMVP_PWRGD_3V 10
R674
10K_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
2
Saturday, November 15, 2014
APWORK 5,35
R377 *SHORT_4
Speed up 250ms to boot up
for EC power on 250 ms
Non Deep Sx
R273 *SHORT_6
1
R277
C307
PCH_SLP_SUS#
*100K_4
2
Q24
*2N7002K
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LPT 1/6 (DMI/FDI/VGA)
LPT 1/6 (DMI/FDI/VGA)
LPT 1/6 (DMI/FDI/VGA)
2
3
1
Q23
*AO3413
R278
*SHORT_6
Z8C
Z8C
Z8C
R379
10K_4
3
7 48
7 48
7 48
1
APWROK_R
3A
3A
3A
RTC Clock 32.768KHz (RTC)
C664 15p/50V_4
C665 15p/50V_4
RTC Circuitry (RTC)
D D
R349 *SHORT_6
+3VPCU
+3V_RTC_0
HDA
C C
PCH JTAG
JTAG_TCK,JTAG_TMS
Trace Length < 9000mils
B B
ULT Strapping Table
+3V_RTC_2
+3V_RTC_1
R336 1K_4
+3V_RTC_[0:2]
Trace width = 20 mils
1 2
CN9
BAT_CONN
PCH_AZ_CODEC_RST# 31
PCH_AZ_CODEC_SDO UT 3 1
PCH_AZ_CODEC_BITCLK 31
PCH_AZ_CODEC_SYNC 31
XDP_TMS
XDP_TDI
PCH_JTAG_TDO
PCH_JTAGX
XDP_TCK1
Pin Name Strap description
GPIO81(SPKR)
HDA_SDO PWROK
5
RTC_X1
1 2
R655
Y5
10M_4
32.768KHZ
RTC_X2
+3V_RTC
D15
BAT54C
C716
1u/6.3V_4
R659 33_4
R657 33_4
R652 33_4
C679
*10p/50V_4
R684 33_4
C678 *10p/50V_4
MP remove(Intel)
R150 51_4
R151 51_4
R164 51_4
R594 *1K_4
R602 *51_4
No reboot on TCO Timer
expiration
Flash Descriptor Security
Override / Intel ME Debug Mode
+3V_RTC
Trace width = 30 mils
R726
20K/F_4
C711
1u/6.3V_4
R722
20K/F_4
C710
1u/6.3V_4
+1.05V_S5
RTC_RST#
1 2
J2
*JUMP
SRTC_RST#
HDA_RST#_R
HDA_SDO_R
HDA_BCLK_R
HDA_SYNC_R
+3V_RTC_0
1 3
Sampled
PWROK
+3V_RTC
PCH_AZ_CODEC_SDIN 0 3 1
XDP_TRST# 4,13
XDP_TCK1 13
XDP_TDI 13
XDP_TDO 13
XDP_TMS 13
XDP_TCK0 4,13
20MIL
VCCRTC_3 VCCRTC_4
R795 *4.7K_4
Q42
*MMBT3904
2
Configuration note
0 = Default enable (iPD 20K)
1 =Disable No-Reboot mode
0 = Default can program ME (iPD 20K)
1 =can't program ME
RTC_RST# 13
R162 *SHORT_4
R597 *SHORT_4
PCH_INTVRMEN
SRTC_RST#
RTC_RST#
HDA_BCLK_R
HDA_SYNC_R
HDA_RST#_R
HDA_SDO_R
R797 *4.7K_4
RTC_X1
RTC_X2
SM_INTRUDER#
R665 1M_4
INTVRMEN Integrated 1.05V VRM enable ALWAYS 1=Should be always pull-up
GPIO66
GPIO86
GPIO15 TLS(Transport layer security)
A A
CFG4
DSWVREN
Top-Block Swap override
Boot BIOS Strap Bit
DP presence strap
Deep Sx well on die VR enable
5
0 = Default disable (iPD 20K)
1 = Enable TBS function
0 = Default SPI (iPD 20K)
1 =LPC
0 = Default enable w/o
confidentiality(iPD 20K)
1 =Default enable with
confidentiality
0 = Enable an external display
port is connected to the eDP
1 =disable
1=Should be always pull-up
4
Haswell ULT PCH (RTC/HDA/SATA/SPI)
HSW_ULT_DDR3L
RTC
AUDIO SATA
JTAG
5 OF 19
SPKR
R658 *SHORT_4
PCH_INTVRMEN
GPIO66
GPIO86
GPIO15
CFG4
CFG4 6,13
DSWVREN
+3V
+3V
+3V
+3V
SPKR 10,31
ME_WR# 35
R660 *330K_4
R516 *1K_4
R93 *1K_4
R140 *1K_4
R143 1K_4
R662 *330K_4
SATA_RN0/PERN6_L3
SATA_RP0/PERP6_L3
SATA_TN0/PETN6_L3
SATA_TP0/PETP6_L3
SATA_RN1/PERN6_L2
SATA_RP1/PERP6_L2
SATA_TN1/PETN6_L2
SATA_TP1/PETP6_L2
SATA_RN2/PERN6_L1
SATA_RP2/PERP6_L1
SATA_TN2/PETN6_L1
SATA_TP2/PETP6_L1
SATA_RN3/PERN6_L0
SATA_RP3/PERP6_L0
SATA_TN3/PETN6_L0
SATA_TP3/PETP6_L0
XDP_TCK1
XDP_TDI
PCH_JTAG_TDO
PCH_JTAGX
+5V_S5
AW5
AW8
AV11
AY10
AU12
AU11
AW10
AV10
AU62
AE62
AD61
AE61
AD62
AL11
AE63
AY5
AU6
AV7
AV6
AU7
AU8
AY8
AC4
AV2
R794
*68.1K/F_4
R796
*150K/F_4
+3V_RTC
+3V_S5
+3V_RTC
4
U45E
RTCX1
RTCX2
INTRUDER
INTVRMEN
SRTCRST
RTCRST
HDA_BCLK/I2S0_SCLK
HDA_SYNC/I2S0_SFRM
HDA_RST/I2S_MCLK
HDA_SDI0/I2S0_RXD
HDA_SDI1/I2S1_RXD
HDA_SDO/I2S0_TXD
HDA_DOCK_EN/I2S1_TXD
HDA_DOCK_RST/I2S1_SFRM
I2S1_SCLK
PCH_TRST
PCH_TCK
PCH_TDI
PCH_TDO
PCH_TMS
RSVD
RSVD
JTAGX
RSVD
R580 *1K_4
+3V
HDA_SDO_R
R676 330K_4
GPIO66 10
R517 *1K_4
+3V
GPIO86 10
R99 *1K_ 4
+3V
GPIO15 10
R146 8.2K_4
DSWVREN 7
R677 330K_4
SATA0GP/GPIO34
SATA1GP/GPIO35
SATA2GP/GPIO36
SATA3GP/GPIO37
SATA_IREF
SATA_RCOMP
SATALED
3
Haswell ULT PCH(LPC,SPI,SMBUS,C-LINK,THERMAL)
U45G
PCH_SPI_CLK
PCH_SPI_CS1#
PCH_SPI_SI
PCH_SPI_SO
PCH_SPI_IO2
PCH_SPI_IO3
SPI_SO_8M
SPI_WP_IO2_ME
SPI_HOLD_IO3_ME
AU14
AW12
AY12
AW11
AV12
AA3
Y7
Y4
AC2
AA2
AA4
Y6
AF1
U14
1
CS#
2
IO1/DO
3
IO2/WP#
4
GND
W25Q64FW -- 8MB
PCH_SPI_CS0#
LAD0
LAD1
LAD2
LAD3
LFRAME
SPI_CLK
SPI_CS0
SPI_CS1
SPI_CS2
SPI_MOSI
SPI_MISO
SPI_IO2
SPI_IO3
SYS_COM_REQ
IO3/HOLD#
PCH_SPI_CLK_EC
PCH_SPI_SI_EC
LPC_LAD0 27,28,35
LPC_LAD1 27,28,35
J5
H5
B15
A15
J8
H8
A17
B17
J6
H6
B14
C15
F5
E5
C17
D17
V1
VGPU_EN
U1
SYS_COM_REQ
V6
GPIO36
AC1
GPIO37
A12
SATA_IREF
L11
RSVD
K10
RSVD
C12
SATA_RCOMP
U3
SATA_LED#
SATA_RXN0 28
SATA_RXP0 28
SATA_TXN0 28
SATA_TXP0 28
TP14
TP9
TP6
TP4
VGPU_EN 42
TP39
TP36
TP134
R512 *SHORT_4
R513 3.01K/F_4
R575 10K_4
Remove mSATA
+V1.05S_ASATA3PLL
+V1.05S_ASATA3PLL
+3V
LPC_LFRAME# 27,28,35
HDD
SATA_RCOMP
Impedance = 50 ohm
Trace length < 500 mils
Trace spacing = 15 mils
LPC_LAD2 27,28,35
LPC_LAD3 27,28,35
TP48
PCH Quad SPI ROM
(Default for WIN8)
R494 *SHORT_6
+3V_PCH_ME
PCH_SPI_SO_EC 35
+3V_PCH_ME
PCH_SPI_IO2
PCH_SPI_IO3
SPI_CS0#_UR_ME 35
+3V_PCH_ME
R80 10K_4
3
R76 *10K_4
PCH_SPI_CS0#
PCH_SPI_SO
PCH_SPI_SO_EC
R77 *1K_4
+3V_PCH_ME +3V_S5
R78 8M4 M@15_4
R75 8M@1 5_4
SPI_WP_IO2_ME
PCH_SPI_CLK_EC 35
PCH_SPI_SI_EC 35
R74 8M4M@15_4
R105 8M4M@15_4
R85 *8M@SHORT_4
SPI_CS0#_UR_ME
R557 IV@10K_4
R120 *10K_4
R595 *10K_4
IO0/DI
R137 *10K_4
VGPU_EN
8
VCC
7
6
CLK
5
R102 8M@15_4
R100 8M@15_4
HSW_ULT_DDR3L
LPC
GPIO36
GPIO37
SPI_HOLD_IO3_ME
SPI_CLK_8M
SPI_SI_8M
2
+3V_S5
+3V_S5
+3V_S5
2
SMBUS
C-LINK SPI
R112 8M4M@15_4
R111 8M4M@15_4
+3V_S5
SMBALERT/GPIO11
+3V_S5
+3V_S5
SMBDATA
+3V_S5
SML0ALERT/GPIO60
+3V_S5
SML0CLK
+3V_S5
SML0DATA
SML1ALERT/PCHHOT/GPIO73
SML1CLK/GPIO75
SML1DATA/GPIO74
7 OF 19
+3V
R560 *10K_4
R134 10K_4
R599 10K_4
R106 *1K_4
C193
*22p/50V_4
SMBCLK
CL_CLK
CL_DATA
CL_RST
PCH_SPI_CLK
PCH_SPI_SI
AN2
AP2
AH1
AL2
AN1
AK1
AU4
AU3
AH3
AF2
AD2
AF4
SMBALERT#
SMB_PCH_CLK
SMB_PCH_DAT
SMB0ALERT#
SMB_ME0_CLK
SMB_ME0_DAT
SMB1ALERT#
SMB_ME1_CLK
SMB_ME1_DAT
CL_CLK PCH_SPI_C S0#
CL_DAT
CL_RST#
+3V_PCH_ME
C157
0.1u/10V_4
1
08
TP135
TP133
TP140
SMBus
PCH_XDP_WLAN/S5 DDR_TP/S0
+3V_S5
R636 10K_4
R651 10K_4
R643 10K_4
R255 2.2K_4
R244 2.2K_4
R622 2.2K_4
R619 2.2K_4
SMBus(PCH)
SMB_PCH_DAT
SMB_PCH_CLK
SMBus(EC)
2ND_MBCLK 19,35
2ND_MBDATA 19,35
EC/S5 PCH/S5
+3V_S5
2ND_MBCLK
2ND_MBDATA
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
SMB0ALERT#
SMB1ALERT#
SMBALERT#
SMB_PCH_CLK
SMB_PCH_DAT
SMB_ME0_CLK
SMB_ME0_DAT
+3V
R257
4.7K_4
Q20
5
2
6
2N7002DW
*2.2K_4
Q19
5
2
6
*2N7002DW
R242 0_4
R243 0_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LPT 2/6 (SATA/HDA/SPI)
LPT 2/6 (SATA/HDA/SPI)
LPT 2/6 (SATA/HDA/SPI)
Saturday, November 15, 2014
Saturday, November 15, 2014
Saturday, November 15, 2014
1
4 3
1
R260
4 3
1
SMB_ME1_CLK
SMB_ME1_DAT
R241
4.7K_4
CLK_SDATA 13,14,15,33
CLK_SCLK 13,14,15,33
R240
*2.2K_4
SMB_ME1_CLK
SMB_ME1_DAT
Z8C
Z8C
Z8C
8 48
8 48
8 48
3A
3A
3A
5
Haswell ULT PCH (PCIE,USB3.0,USB2.0)
U45K
PEG_RX#0 16
PCIE_RX3-_LAN 29
PCIE_RX3+_LAN 29
PCIE_TX3-_LAN 29
PCIE_TX3+_LAN 29
PCIE_RX4-_WLAN 27
PCIE_RX4+_WLAN 27
PCIE_TX4-_WLAN 27
PCIE_TX4+_WLAN 27
WIGIG_ RX1-_WLAN 27
WIGIG_ RX1+_WLA N 27
WIGIG_ TX1-_WLAN 27
WIGIG_ TX1+_WLAN 27
+V1.05S_ AUSB3PLL
PEG_RX0 1 6
PEG_TX#0 16
PEG_TX0 16
PEG_RX#1 16
PEG_RX1 1 6
PEG_TX#1 16
PEG_TX1 16
PEG_RX#2 16
PEG_RX2 1 6
PEG_TX#2 16
PEG_TX2 16
PEG_RX#3 16
PEG_RX3 1 6
PEG_TX#3 16
PEG_TX3 16
C633 EV@0 .22u/10V_ 4
C632 EV@0 .22u/10V_ 4
C614 EV@0 .22u/10V_ 4
C615 EV@0 .22u/10V_ 4
C637 EV@0 .22u/10V_ 4
C638 EV@0 .22u/10V_ 4
C616 EV@0 .22u/10V_ 4
C617 EV@0 .22u/10V_ 4
C627 0.1u /10V_4
C626 0.1u /10V_4
TP157
TP159
TP158
TP160
WIGIG_ TX3WIGIG_ TX3+
PCIE_TX4-
PCIE_TX4+
PCIE_RCOMP
PCIE_IREF
C613 0.1u/10 V_4
C612 0.1u/10 V_4
C625 0.1u/10V_4
C624 0.1u/10V_4
R510 3.01 K/F_4
R509 *SHORT_4
D D
PEG x4
LAN
C C
WIFI
WIGIG
B B
R_PEG_TX# 0
R_PEG_TX0
R_PEG_TX# 1
R_PEG_TX1
R_PEG_TX# 2
R_PEG_TX2
R_PEG_TX# 3
R_PEG_TX3
PCIE_TX3PCIE_TX3+
F10
E10
C23
C22
F8
E8
B23
A23
H10
G10
B21
C21
E6
F6
B22
A21
G11
F11
C29
B30
F13
G13
B29
A29
G17
F17
C30
C31
F15
G15
B31
A31
E15
E13
A27
B27
PERN5_L0
PERP5_L0
PETN5_L0
PETP5_L0
PERN5_L1
PERP5_L1
PETN5_L1
PETP5_L1
PERN5_L2
PERP5_L2
PETN5_L2
PETP5_L2
PERN5_L3
PERP5_L3
PETN5_L3
PETP5_L3
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PERN1/USB3RN3
PERP1/USB3RP3
PETN1/USB3TN3
PETP1/USB3TP3
PERN2/USB3RN4
PERP2/USB3RP4
PETN2/USB3TN4
PETP2/USB3TP4
RSVD
RSVD
PCIE_RCOMP
PCIE_IREF
PCIE USB
+3V_S5
+3V_S5
+3V_S5
+3V_S5
HSW_ULT_DDR3L
4
11 OF 19
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
DSW
USB2N0
DSW
USB2P0
DSW
USB2N1
DSW
USB2P1
DSW
USB2N2
DSW
USB2P2
DSW
USB2N3
DSW
USB2P3
DSW
USB2N4
DSW
USB2P4
DSW
USB2N5
DSW
USB2P5
DSW
USB2N6
DSW
USB2P6
DSW
USB2N7
DSW
USB2P7
USB3RN1
USB3RP1
USB3TN1
USB3TP1
USB3RN2
USB3RP2
USB3TN2
USB3TP2
USBRBIAS
USBRBIAS
OC0/GPIO40
OC1/GPIO41
OC2/GPIO42
OC3/GPIO43
RSVD
RSVD
AN8
AM8
AR7
AT7
AR8
AP8
AR10
AT10
AM15
AL15
AM13
AN13
AP11
AN11
AR13
AP13
G20
H20
C33
B34
E18
F18
B33
A33
AJ10
AJ11
AN10
AM10
AL3
AT1
AH2
AV3
USBCOMP
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USBP0- 3 2
USBP0+ 3 2
USBP1- 3 2
USBP1+ 3 2
USBP2- 3 2
USBP2+ 3 2
USBP3- 3 2
USBP3+ 3 2
USBP4- 2 7
USBP4+ 2 7
USBP5- 2 5
USBP5+ 2 5
USBP6- 2 5
USBP6+ 2 5
USBP7- 2 5
USBP7+ 2 5
USB3_RXN0 32
USB3_RXP 0 32
USB3_TXN0 32
USB3_TXP0 32
USB3_RXN1 32
USB3_RXP 1 32
USB3_TXN1 32
USB3_TXP1 32
R207 22.6 /F_4
USB_OC0# 32
USB_OC1# 32
3
MB USB3.0
MB USB3.0
DB USB2.0
MB USB2.0
NGFF BT
TP(reserve)
WIGIG VGA
CCD
Fingerprint
WIFI
MB USB3.0
MB USB3.0
USBCOMP
Impedance = 50 ohm
Trace length < 500 mils
Trace spacing = 15 mils
MB U3
MB U2 DB U2
2
Haswell ULT PCH (CLOCK)
U45F
CLK_PCIE_REQ1#
C43
CLKOUT_PCIE_N0
C42
CLKOUT_PCIE_P0
U2
PCIECLKRQ0/GPIO18
B41
CLKOUT_PCIE_N1
A41
CLKOUT_PCIE_P1
Y5
PCIECLKRQ1/GPIO19
C41
CLKOUT_PCIE_N2
B42
CLKOUT_PCIE_P2
AD1
PCIECLKRQ2/GPIO20
B38
CLKOUT_PCIE_N3
C37
CLKOUT_PCIE_P3
N1
PCIECLKRQ3/GPIO21
A39
CLKOUT_PCIE_N4
B39
CLKOUT_PCIE_P4
U5
PCIECLKRQ4/GPIO22
B37
CLKOUT_PCIE_N5
A37
CLKOUT_PCIE_P5
T2
PCIECLKRQ5/GPIO23
CLK_PCIE_N0
TP106
CLK_PCIE_P0
TP107
CLK_PCIE_REQ0#
CLK_PCIE_WIGIGN 27
CLK_PCIE_WIGIGP 27
PCIE_CLKREQ_WIGIG# 27
CLK_PCIE_LANN 29
LAN
CLK_PCIE_LANP 29
CLK_PCIE_LAN_REQ# 29
CLK_PCIE_WLANN 27
CLK_PCIE_WLANP 27
PCIE_CLKREQ_WLAN# 27
CLK_PCIE_VGA# 16
CLK_PCIE_VGA 16
CLK_PEGA_REQ# 16
TP126
R572 *SHORT_4
CLK_PCIE_REQ2#
R600 *SHORT_4
CLK_PCIE_REQ3#
R550 *SHORT_4
CLK_PCIE_REQ4#
R573 *SHORT_4
CLK_PCIE_REQ5#
TP123
USB Overcurrent
+3V_S5
RP2
10
1
9
8
7 4
10K_10P 8R
2
3
5 6
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
HSW_ULT_DDR3L
+3V
+3V
+3V
+3V
+3V
+3V
CLK_PCIE_REQ0#
CLK_PCIE_REQ1#
CLK_PCIE_REQ2#
CLK_PCIE_REQ3#
CLK_PCIE_REQ5#
TESTLOW_C35
TESTLOW_C34
TESTLOW_AK8
TESTLOW_AL8
CLK_PCIE_REQ4#
CLOCK
SIGNALS
6 OF 19
R576 10K_ 4
R582 10K_ 4
R596 10K_ 4
R545 10K_ 4
R569 10K_ 4
R504 10K_ 4
R505 10K_ 4
R225 10K_ 4
R233 10K_ 4
R577 10K_4
R571 *1K_4
CLKOUT_ITPXDP_P
XTAL24_IN
XTAL24_OUT
RSVD
RSVD
DIFFCLK_BIASREF
TESTLOW_C35
TESTLOW_C34
TESTLOW_AK8
TESTLOW_AL8
CLKOUT_LPC_0
CLKOUT_LPC_1
CLKOUT_ITPXDP
+3V
+3V
XTAL24_IN
XTAL24_OUT
A25
B25
K21
M21
C26
C35
C34
AK8
AL8
AN15
AP15
B35
A35
XTAL24_IN
XTAL24_OUT
ICLK_BIAS
TESTLOW_C35
TESTLOW_C34
TESTLOW_AK8
TESTLOW_AL8
CLK_PCH_PCI3
CLK_PCH_PCI4
R501
1M_4
C288
*18p/50V _4
1
C630 12p/50V_4
Y3
24MHz
2 4
1 3
C631 12p/50V_4
R500 3.01 K/F_4
*18p/50V _4
R224 TPM@22_4
R223 22_4
R222 22_4
C289
09
+V1.05S_ AXCK_LCPLL
PCLK_TPM 28
CLK_PCI_LPC 27
CLK_PCI_EC 35
CLK_PCIE_XDPN 13
CLK_PCIE_XDPP 13
PCLK_TPM CLK_PCI_LPC CLK_PCI_EC
C290
*18p/50V _4
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Saturday, November 1 5, 2014
Date: Sheet of
Saturday, November 1 5, 2014
Date: Sheet of
5
4
3
2
Saturday, November 1 5, 2014
PROJECT :
LPT 3/6 (PCIE/USB/CLK)
LPT 3/6 (PCIE/USB/CLK)
LPT 3/6 (PCIE/USB/CLK)
Z8C
Z8C
Z8C
9 48
9 48
1
9 48
3A
3A
3A
5
4
3
2
1
PCH GPIO PU/PD
Haswell ULT PCH (GPIO,CPU/MISC,NCTF)
High Low
GPIO8
D D
DGPU_PWROK 18
DGPU_HOLD_RST# 16
DGPU_PWR_EN 43
C C
DEVSLP0 for HDD
DEVSLP1 for mSATA
No touch panel Touch panel
BOARD_ID0
TP60
TP77
TP74
TP143
TP81
TP83
TP82
TP51
TP142
TP70
ACCEL_INTA
GPIO8
LAN_DISABLE#
GPIO15
SKU_ID0
DGPU_PWROK
GPIO24
WK_GPIO27
GPIO28
ODD_PRSNT#
GPIO56
GPIO57
GPIO58
GPIO59
GPIO44
GPIO47
DGPU_HOLD_RST#
DGPU_PWR_EN
DGPU_PW_CTRL#
MODPHY_EN
RAM_ID0
RAM_ID3
GPIO25
GPIO45
RAM_ID1
RAM_ID2
DEVSLP0
BOARD_ID3
DEVSLP1
SKU_ID1
SPKR
GPIO8 25
GPIO15 8
TP43
ACCEL_INTA 33
DEVSLP0 28
TP26
SPKR 8,31
Board ID
+3V
R559 10K_4
BOARD_ID1 2
R547 10K_4
B B
BOARD_ID2 2
R541 10K_4
R89 10K_4
BOARD_ID4 2
R537 10K_4
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
R561 *10K_4
R549 *10K_4
R540 *10K_4
R88 *10K_4
R536 *10K_4
U45J
P1
BMBUSY/GPIO76
AU2
AM7
AD6
AD5
AN5
AD7
AN3
AG6
AP1
AL4
AT5
AK4
AB6
AT3
AH4
AM4
AG5
AG3
AM3
AM2
Y1
T3
U4
Y3
P3
Y2
P2
C4
L2
N5
V2
+3V_S5
GPIO8
LAN_PHY_PWR_CTRL/GPIO12
+3V_S5
GPIO15
+3V
GPIO16
+3V
GPIO17
+3V_S5
GPIO24
DSW
GPIO27
+3V_S5
GPIO28
+3V_S5
GPIO26
+3V_S5
GPIO56
+3V_S5
GPIO57
+3V_S5
GPIO58
+3V_S5
GPIO59
+3V_S5
GPIO44
+3V_S5
GPIO47
+3V
GPIO48
+3V
GPIO49
+3V
GPIO50
HSIOPC/GPIO71
+3V_S5
GPIO13
+3V_S5
GPIO14
DSW
GPIO25
+3V_S5
GPIO45
+3V_S5
GPIO46
+3V_S5
GPIO9
+3V_S5
GPIO10
DEVSLP0/GPIO33
SDIO_POWER_EN/GPIO70
DEVSLP1/GPIO38
DEVSLP2/GPIO39
SPKR/GPIO81
RAM ID
R647 10K_4
R227 *10K_4
R638 10K_4
R642 10K_4
RAM_ID Vender Freq.
Hynix
Hynix
Kingston 0010 AKD5PZSTP02 D2516EC4BXGGB 1600MHz
MICRON 0100 MT41K256M16HA-125 1600MHz AKD5JGSTL08
0000
0001
SKU ID
UMA Only
dGPU Only
Switchable
(Mux)
Optimize
(Muxless)
R588 IV@10K_4
R101 IV@10K_4
SKU_ID1 SKU_ID0 VGA H/W
0
0
1
1
Low
BOARD_ID0
BOARD_ID1
A A
BOARD_ID2
BOARD_ID3
BOARD_ID4
Dual Rank Single Rank
Enable on
board memory
Pin8 of SYNAPTICS and ELAN are NC
pin. BIOS maybe will use EEPROM
detection. Default is pull high.
Reserved
(Default)
Reserved
(Default)
5
High
N15S_GT N15S-GT
Disable on
board memory
Reserved
Reserved
HSW_ULT_DDR3L
+3V
+3V
+3V
+3V
+3V
+3V
Q PN
GPIO
+3V
RAM_ID0
RAM_ID1
RAM_ID2
RAM_ID3
DSW
10 OF 19
R646 *10K_4
R214 10K_4
R637 *10K_4
R641 *10K_4
Mfr. PN
CPU/
MISC
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
SERIAL IO
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
THRMTRIP
+3V
RCIN/GPIO82
PCH_OPI_RCOMP
GSPI0_CS/GPIO83
GSPI0_CLK/GPIO84
GSPI0_MISO/GPIO85
GSPI0_MOSI/GPIO86
GSPI1_CS/GPIO87
GSPI1_CLK/GPIO88
GSPI1_MISO/GPIO89
GSPI_MOSI/GPIO90
UART0_RXD/GPIO91
UART0_TXD/GPIO92
UART0_RTS/GPIO93
UART0_CTS/GPIO94
UART1_RXD/GPIO0
UART1_TXD/GPIO1
UART1_RST/GPIO2
UART1_CTS/GPIO3
I2C0_SDA/GPIO4
I2C0_SCL/GPIO5
I2C1_SDA/GPIO6
I2C1_SCL/GPIO7
SDIO_CLK/GPIO64
SDIO_CMD/GPIO65
SDIO_D0/GPIO66
SDIO_D1/GPIO67
SDIO_D2/GPIO68
SDIO_D3/GPIO69
+3V_S5
AKD5JGETW04 H5TC4G63AFR-PRBA 1600MHz
AKD5JGETW04
H5TC4G63AFR-PBA
1600MHz
H5TC4G63AFR-PBA 1600MHz Hynix 0011 AKD5JGETW04
+3V
SKU_ID0
SKU_ID1
0
1
0
1
4
R587 EV@10K_4
R104 EV@10K_4
Setup
Signal
Menu
UMA
Hidden
UMA boot
GPU
Hidden
GPU boot
UMA+GPU dGPU/SG UMA boot
UMA
UMA/SG
UMA boot
D60
THRMTRIP#
V4
SIO_RCIN#
T4
AW15
AF20
AB21
R6
L6
N6
L8
R7
L5
N7
K2
J1
K3
J2
G1
K4
G2
J3
J4
F2
F3
G4
F1
E3
F4
D3
E4
C3
E2
IRQ_SERIRQ
OPI_COMP2
SERIRQ
RSVD
RSVD
CPU thermal trip
2G
4G
4G
THRMTRIP#
IMVP_PWRGD 5,40
GPIO83
GPIO84
GPIO85
GPIO86
GPIO87
GPIO88
GPIO89
GPIO90
GPIO91
GPIO92
GPIO93
GPIO94
SIO_EXT_SMI#
SIO_EXT_SCI#
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO64
GPIO65
GPIO66
GPIO67
GPIO68
GPIO69
IMVP_PWRGD_3V
+1.05V_VCCST
3
R664 49.9/F_4
TP_INT_PCH 25
change GPIO port same as ZQ0
GPU GC6 2.0 function use
GPIO2/3.
+1.05V_VCCST
3
2
R96
1K_4
2
Q8
FDV301N
1
R95
1K_4
2
1 3
Q9 MMBT3904-7-F
U10
NC1VCC
A
GND3Y
74AUP1G07GW
SIO_RCIN# 35
IRQ_SERIRQ 28,35
GPIO86 8
SIO_EXT_SMI# 35
SIO_EXT_SCI# 35
DGPU_EVENT# 19
GC6_FB_EN 17,19
GPIO66 8
SYS_SHDN# 28,37,41
+1.05V_VCCST
5
1 2
C51
0.1u/10V_4
4
+3V
2
R33
10K_4
IRQ_SERIRQ
DEVSLP0
DEVSLP1
SIO_RCIN#
SIO_EXT_SMI#
SIO_EXT_SCI#
GPIO83
GPIO84
GPIO85
GPIO87
GPIO88
GPIO89
GPIO90
GPIO91
GPIO92
GPIO93
GPIO94
GPIO6
Follow ZQ0
R535 *EVG@10K_4
R592 *100K_4
high UMA Only
low
R556 EV@100K_4
R118 *10K_4
GPIO7
GPIO2
GPIO4
GPIO5
GPIO64
GPIO65
GPIO67
GPIO68
GPIO69
DGPU_PWR_EN
DGPU_HOLD_RST#
GPU power is control by PCH
GPIO (Discrete, SG or Optimize)
GPIO3
DGPU_PW_CTRL#
DGPU_PWROK
R114 10K_4
R132 *10K_4
R544 *10K_4
R139 10K_4
R160 10K_4
R528 10K_4
R156 10K_4
R108 10K_4
R158 10K_4
R110 10K_4
R157 10K_4
R155 10K_4
R539 10K_4
R533 10K_4
R159 10K_4
R529 10K_4
R527 10K_4
R98 10K_4
R94 10K_4
R534 *10K_4
R531 *IV@10K_4
R524 10K_4
R525 10K_4
R523 10K_4
R97 10K_4
R92 10K_4
R91 10K_4
R520 10K_4
R593 10K_4
R586 10K_4
R574 IV@1K_4
DGPU_PWROK PD on GPU side
LAN_DISABLE#
ODD_PRSNT#
GPIO8
GPIO24
GPIO28
GPIO47
GPIO57
GPIO56
GPIO59
GPIO58
GPIO44
GPIO25
GPIO45
IMVP_PWRGD_3V 7
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
GPIO27 : If not used then use
8.2-kΩ to 10-kΩ pull-down to GND.
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LPT 4/6 (GPIO/MISC)
LPT 4/6 (GPIO/MISC)
LPT 4/6 (GPIO/MISC)
WK_GPIO27
R220 10K_4
R635 10K_4
R213 *10K_4
R138 10K_4
R204 10K_4
R141 10K_4
R648 10K_4
R208 10K_4
R202 10K_4
R203 10K_4
R231 10K_4
R206 10K_4
R209 10K_4
R686 *10K_4
R688 10K_4
Z8C
Z8C
Z8C
1
10
+3V
+3V
+3V_S5
+3VPCU
10 48
10 48
10 48
3A
3A
3A
5
C173 1u/6.3V_4
C191 1u/6.3V_4
+1.05V
+1.05V_S5
25mA
C252
1u/6.3V_4
R133 *SHORT_8
Deep Sx
+3VPCU
+3V_S5
D D
R263 *0_6
+1.05V_S5
Non Deep Sx
+3V
C C
+1.05V
WW15 4/10 Intel VCCDSW3
G3 can't boot issue.
C240
+PCH_VCCDSW +VCCPDSW
0.47u/25V_6
+V1.05DX_MODPHY
R119 *0_4
+1.05V_DCPSUS2
R212 *0_6
R211 *SHORT_6
1u/6.3V_4
C175 1u/6.3V_4
+3VCC_S5
1.741A
C194
*1u/6.3V_4
C174
10u/6.3V_6
C255
R117 *SHORT_8
+V1.05S_AIDLE
10mA
C178
1u/6.3V_4
+V3.3DX_1.5DX_1.8DX_AUDIO
0.114A
41mA
C176
22u/6.3V_8
+1.05V
63mA
+3VCC_S5
PCH VCCHSIO Power(REMOVE LDO)
4
+V1.05S_AUSB3PLL
+V1.05S_ASATA3PLL
+V1.05S_APLLOPI
+1.05V_DCPSUS3
C292 22u/6.3V_8
+VCCPDSW
+V3.3S_VCCPCORE
+V1.05S_AXCK_DCB
+V1.05S_AXCK_LCPLL
C227 1u/6.3V_4
1.838A
B18
B11
Y20
AA21
W21
AH14
AH13
AC9
AA9
AH10
K19
A20
R21
T21
K18
M20
V21
AE20
AE21
K9
L10
M9
N8
P9
J13
V8
W9
J18
J17
3
Haswell ULT PCH (Power)
HSIO
USB3
HDA
VRM
GPIO/LPC
LPT LP POWER
HSW_ULT_DDR3L
OPI
RTC
SPI
CORE
THERMAL SENSOR
SERIAL IO
SUS OSCILLATOR
USB2
13 OF 19
U45M
VCCHSIO
VCCHSIO
VCCHSIO
VCC1_05
VCC1_05
VCCUSB3PLL
VCCSATA3PLL
RSVD
VCCAPLL
VCCAPLL
DCPSUS3
VCCHDA
DCPSUS2
VCCSUS3_3
VCCSUS3_3
VCCDSW3_3
VCC3_3
VCC3_3
VCCCLK
VCCCLK
VCCACLKPLL
VCCCLK
VCCCLK
VCCCLK
RSVD
RSVD
RSVD
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCRTC
DCPRTC
VCCSPI
VCCASW
VCCASW
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
DCPSUSBYP
DCPSUSBYP
VCCASW
VCCASW
VCCASW
DCPSUS1
DCPSUS1
VCCTS1_5
VCC3_3
VCC3_3
VCCSDIO
VCCSDIO
DCPSUS4
RSVD
VCC1_05
VCC1_05
AH11
AG10
AE7
Y8
AG14
AG13
J11
H11
H15
AE8
AF22
AG19
AG20
AE9
AF9
AG8
AD10
AD8
J15
K14
K16
U8
T9
AB8
AC20
AG16
AG17
+VCCRTCEXT
+V3.3M_PSPI
PCH_VCC_1_1_21
+V1.05S_CORE_PCH
+1.05V_DCPSUS1
18mA
+PCH_VCCDSW
+V1.05M_VCCASW
0.109A
R264 *0_6
C229
1u/6.3V_4
+V3.3S_VCCSDIO
+1.05V_DCPSUS4
2
R145 *SHORT_6
+V1.05M_VCCASW
+1.05V_S5
3mA
1mA
17mA
R262 *0_6
C216
1u/6.3V_4
C238
1u/6.3V_4
C249
0.1u/10V_4
C225
0.1u/10V_4
C254
1u/6.3V_4
0.658A
C239
1u/6.3V_4
+V1.5S_VCCATS
+V3.3S_VCCPTS
+1.05V_S5
+1.05V
+1.05V
C231
1u/6.3V_4
C235
22u/6.3V_8
+3VCC_S5
C683
C682
0.1u/10V_4
1u/6.3V_4
R168 *SHORT_6
R154 *0_6
C233
0.1u/10V_4
C211
10u/6.3V_6
C250
1u/6.3V_4
R165 *SHORT_8
R84 *SHORT_6
R79 *SHORT_6
C205
1u/6.3V_4
C212
1u/6.3V_4
+3V_RTC
+3V_S5
+3V
R128 *SHORT_8
+1.05V
+1.5V
+3V
R113 *SHORT_6
1
11
+1.05V
+3V
B B
+V1.05DX_MODPHY +1.05V
PR21 *SHORT_8
+V1.05S_VCCUSBCORE
VCCAPLL power
+V1.05S_APLLOPI +1.05V
C251
0.1u/10V_4
57mA
C661
*47u/6.3V_8
C236
1u/6.3V_4
2
L16 2.2uH/210mA_8
C260
*47u/6.3V_8
+V1.05DX_MODPHY +V1.05S_AUSB3PLL +V1.05DX_MODPHY +V1.05S_ASATA3PLL
A A
L12 2.2uH/210mA_8
C103
47u/6.3V_8
C99
47u/6.3V_8
C635
1u/6.3V_4
L11 2.2uH/210mA_8
C104
47u/6.3V_8
42mA 41mA
C100
47u/6.3V_8
C636
1u/6.3V_4
PCH HDA Power
+3V_S5
R210 *SHORT_6
11mA
+V3.3DX_1.5DX_1.8DX_AUDIO
Place close to ball
5
4
3
R232 *SHORT_8
C253
1u/6.3V_4
+1.05V +V1.05S_AXCK_DCB
L30 2.2uH/210mA_8
+1.05V +V1.05S_AXCK_LCPLL
L10 2.2uH/210mA_8
+1.05V
0.2A
C619
47u/6.3V_8
C618
47u/6.3V_8
C165
1u/6.3V_4
31mA
C87
47u/6.3V_8
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Sunday, November 16, 2014
Date: Sheet of
Sunday, November 16, 2014
Date: Sheet of
Sunday, November 16, 2014
C96
47u/6.3V_8
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LPT 5/6 (POWER)
LPT 5/6 (POWER)
LPT 5/6 (POWER)
C634
1u/6.3V_4
1
Z8C
Z8C
Z8C
11 48
11 48
11 48
3A
3A
3A
5
4
3
2
1
Haswell ULT (GND)
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U45O
HSW_ULT_DDR3L
15 OF 19
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AV59
AV8
AW16
AW24
AW33
AW35
AW37
AW4
AW40
AW42
AW44
AW47
AW50
AW51
AW59
AW60
AY11
AY16
AY18
AY22
AY24
AY26
AY30
AY33
AY4
AY51
AY53
AY57
AY59
AY6
B20
B24
B26
B28
B32
B36
B4
B40
B44
B48
B52
B56
B60
C11
C14
C18
C20
C25
C27
C38
C39
C57
D12
D14
D18
D2
D21
D23
D25
D26
D27
D29
D30
D31
D33
D34
D35
D37
D38
D39
D41
D42
D43
D45
D46
D47
D49
D50
D51
D53
D54
D55
D57
D59
D62
G18
G22
H13
E11
E17
F20
F26
F30
F34
F38
F42
F46
F50
F54
F58
F61
HSW_ULT_DDR3L
U45P
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G3
VSS
G5
VSS
G6
VSS
G8
VSS
VSS
16 OF 19
VSS_SENSE
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H17
H57
J10
J22
J59
J63
K1
K12
L13
L15
L17
L18
L20
L58
L61
L7
M22
N10
N3
P59
P63
R10
R22
R8
T1
T58
U20
U22
U61
U9
V10
V3
V7
W20
W22
Y10
Y59
Y63
V58
AH46
V23
E62
AH16
VSS_SENSE_R
U45R
AT2
RSVD
AU44
RSVD
AV44
RSVD
D15
RSVD
F22
RSVD
H22
RSVD
J21
RSVD
R530 *SHORT_4
R532 100/F_4
HSW_ULT_DDR3L
D D
C C
B B
A11
A14
A18
A24
A28
A32
A36
A40
A44
A48
A52
A56
AA1
AA58
AB10
AB20
AB22
AB7
AC61
AD21
AD3
AD63
AE10
AE5
AE58
AF11
AF12
AF14
AF15
AF17
AF18
AG1
AG11
AG21
AG23
AG60
AG61
AG62
AG63
AH17
AH19
AH20
AH22
AH24
AH28
AH30
AH32
AH34
AH36
AH38
AH40
AH42
AH44
AH49
AH51
AH53
AH55
AH57
AJ13
AJ14
AJ23
AJ25
AJ27
AJ29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U45N
14 OF 19
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ35
AJ39
AJ41
AJ43
AJ45
AJ47
AJ50
AJ52
AJ54
AJ56
AJ58
AJ60
AJ63
AK23
AK3
AK52
AL10
AL13
AL17
AL20
AL22
AL23
AL26
AL29
AL31
AL33
AL36
AL39
AL40
AL45
AL46
AL51
AL52
AL54
AL57
AL60
AL61
AM1
AM17
AM23
AM31
AM52
AN17
AN23
AN31
AN32
AN35
AN36
AN39
AN40
AN42
AN43
AN45
AN46
AN48
AN49
AN51
AN52
AN60
AN63
AN7
AP10
AP17
AP20
AP22
AP23
AP26
AP29
AP31
AP38
AP39
AP48
AP52
AP54
AP57
AR11
AR15
AR17
AR23
AR31
AR33
AR39
AR43
AR49
AR52
AT13
AT35
AT37
AT40
AT42
AT43
AT46
AT49
AT61
AT62
AT63
AU16
AU18
AU20
AU22
AU24
AU26
AU28
AU30
AU33
AU51
AU53
AU55
AU57
AU59
AV14
AV16
AV20
AV24
AV28
AV33
AV34
AV36
AV39
AV41
AV43
AV46
AV49
AV51
AV55
AP3
AR5
AU1
HSW_ULT_DDR3L
18 OF 19
VSS_SENSE 40
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
12
N23
R23
T23
U10
AL1
AM11
AP7
AU10
AU15
AW14
AY14
U45Q
DC_TEST_AY2_AW2
DC_TEST_AY3_AW3
TP_DC_TEST_AY60
TP146
DC_TEST_AY61_AW61
DC_TEST_AY62_AW62
TP_DC_TEST_B2
A A
5
TP111
DC_TEST_A3_B3
DC_TEST_A61_B61
DC_TEST_B62_B63
DC_TEST_C1_C2
AY2
DAISY_CHAIN_NCTF_AY2
AY3
DAISY_CHAIN_NCTF_AY3
AY60
DAISY_CHAIN_NCTF_AY60
AY61
DAISY_CHAIN_NCTF_AY61
AY62
DAISY_CHAIN_NCTF_AY62
B2
DAISY_CHAIN_NCTF_B2
B3
DAISY_CHAIN_NCTF_B3
B61
DAISY_CHAIN_NCTF_B61
B62
DAISY_CHAIN_NCTF_B62
B63
DAISY_CHAIN_NCTF_B63
C1
DAISY_CHAIN_NCTF_C1
C2
DAISY_CHAIN_NCTF_C2
4
HSW_ULT_DDR3L
17 OF 19
DAISY_CHAIN_NCTF_A3
DAISY_CHAIN_NCTF_A4
DAISY_CHAIN_NCTF_A60
DAISY_CHAIN_NCTF_A61
DAISY_CHAIN_NCTF_A62
DAISY_CHAIN_NCTF_AV1
DAISY_CHAIN_NCTF_AW1
DAISY_CHAIN_NCTF_AW2
DAISY_CHAIN_NCTF_AW3
DAISY_CHAIN_NCTF_AW61
DAISY_CHAIN_NCTF_AW62
DAISY_CHAIN_NCTF_AW63
3
A3
DC_TEST_A3_B3
A4
TP_DC_TEST_A4
A60
TP_DC_TEST_A60
A61
DC_TEST_A61_B61
A62
TP_DC_TEST_A62
AV1
TP_DC_TEST_AV1
AW1
TP_DC_TEST_AW1
AW2
DC_TEST_AY2_AW2
AW3
DC_TEST_AY3_AW3
AW61
DC_TEST_AY61_AW61
AW62
DC_TEST_AY62_AW62
AW63
TP_DC_TEST_AW63
TP110
TP112
TP115
TP144
TP145
TP147
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
2
Saturday, November 15, 2014
PROJECT :
LPT 6/6 (GND)
LPT 6/6 (GND)
LPT 6/6 (GND)
1
Z8C
Z8C
Z8C
12 48
12 48
12 48
3A
3A
3A
5
H_SYS_PWROK_XDP
R274 *1K_4
+3V_S5
4
3
2
1
13
+3V
D D
C C
B B
XDP_DBRESET_N
R196 *1K_4
HWPG_1.05V_S5 35,38
SYS_PWROK 7
R737 *SHORT_6
R254 1K_4
R261 *SHORT_4
APS3
XDP_PREQ# 4
XDP_PRDY# 4
CFG0 6
CFG1 6
CFG2 6
CFG3 6
XDP_BPM#0 4
XDP_BPM#1 4
CFG4 6,8
CFG5 6
CFG6 6
CFG7 6
PWR_DEBUG 5
CLK_SDATA 8,14,15,33
CLK_SCLK 8,14,15,33
XDP_TCK1 8
XDP_TCK0 4,8
R718 *SHORT_6
APS
CN14
A A
*ACES_88511-180N
1
APS1
1
2
2
3
APS3
3
4
4
5
5
6
6
7
APS7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
5
R723 *SHORT_6
R736 *SHORT_4
R716 *0_6
R735 *SHORT_4
R734 *SHORT_4
R733 *SHORT_4
R717 *0_6
R730 *SHORT_4
R729 *SHORT_4
R728 *SHORT_4
R727 *SHORT_4
+3VCC_S5
SYS_RESET#
SUSB# 7,35
PCH_SLP_S5# 7
SUSC# 7,35
PCH_SLP_A# 7
RTC_RST# 8
NBSWON# 32,35
SYS_RESET# 7
PCH_SLP_S0# 7
4
+3VPCU
+3VPCU
APS7 APS1
VCCST_PWRGD 5
XDP_PREQ_N
XDP_PRDY_N
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
VCCST_PWRGD_XDP
NBSWON#
H_SYS_PWROK_XDP
U15
NC1VCC
2
A
GND3Y
*74AUP1G07GW
XDP_TDO
XDP_TDI
XDP_TMS
XDP_TRST_N
R90
*10K_4
NOA_STBP_0
NOA_STBN_0
CFG8
CFG9
CFG10
CFG11
NOA_STBP_1
NOA_STBN_1
CFG12
CFG13
CFG14
CFG15
CK_XDP_P_R
CK_XDP_N_R
XDP_RST_R_N
XDP_DBRESET_N
XDP_TDO
XDP_TRST_N
XDP_TDI
XDP_TMS
+3V
NOA_STBP_0 6
NOA_STBN_0 6
CFG8 6
CFG9 6
CFG10 6
CFG11 6
NOA_STBP_1 6
NOA_STBN_1 6
CFG12 6
CFG13 6
CFG14 6
CFG15 6
R81 *SHORT_4
R82 *SHORT_4
R215 1K_4
R195 *SHORT_4
R166 *51_4
C192
0.1u/10V_4
U17
14
VCC
2
1A
1
1OE
5
2A
4
2OE
9
3A
10
3OE
12
4A
13
4OE
*74CBTLV3126
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
CLK_PCIE_XDPP 9
CLK_PCIE_XDPN 9
SYS_RESET#
DPAD
GND
CPU/PCH XDP
CPU/PCH XDP
CPU/PCH XDP
Saturday, November 15, 2014
Saturday, November 15, 2014
Saturday, November 15, 2014
PLTRST# 7,16,27,28,29,35
+1.05V_S5
3
1B
6
2B
8
3B
11
4B
15
7
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
XDP_TDO_CPU 4
XDP_TDI_CPU 4
XDP_TMS_CPU 4
XDP_TRST# 4,8
Z8C
Z8C
Z8C
13 48
13 48
13 48
1
3A
3A
3A
TP52
TP30
TP132
TP20
TP38
TP63
TP42
TP45
TP44
TP47
TP46
TP131
TP141
TP19
TP69
TP17
TP32
TP55
TP129
TP128
TP33
TP40
TP41
TP53
TP2
TP86
TP130
TP3
TP35
TP85
TP87
TP84
TP65
TP88
TP89
TP121
TP139
TP64
TP62
TP68
XDP_TDO 8
XDP_TDI 8
XDP_TMS 8
+1.05V
+3V
5
*0.1u/10V_4
4
3
C156
1 2
1
<DDR>
A A
Hynix
Elpida
B B
C C
+1.35V_SUS
D D
+DDR_VTT_RUN
M_A_DQS#[7:0] 3
M_A_DQS[7:0] 3
M_A_DQ[63:0] 3
M_A_A[15:0] 3
SO-DIMMB SPD Ad dress is 0XA4
SO-DIMMB TS Add ress is 0X34
M_A_BS#[2:0] 3
M_A_CLK0 3
M_A_CLK0# 3
M_A_CKE0 3
M_A_CS#0 3
M_A_RAS# 3
M_A_CAS# 3
M_A_WE# 3
DDR3_DRAMRST# 4,15
R374
240/F_4
1 2
P/N Vendo r
AKD5JGST400
DDR3L 1333Mhz 4 Gb
DDR3L 1600Mhz 4 Gb AKD5JGST404
SO-DIMMB SPD Ad dress is 0XA4
SO-DIMMB TS Add ress is 0X34
M_A_CLK1 3
M_A_CLK1# 3
M_A_CKE1 3
M_A_CS#1 3
M_A_ZQ5
R745
240/F_4
1 2
Place these Caps near Memory Down
C464
C425
10u/6.3V_6
C733
*1u/6.3V_4
C396
1u/6.3V_4
C384
1u/6.3V_4
C389
1u/6.3V_4
C764
*0.1u/10V_4
C735
*0.1u/10V_4
C414
1u/6.3V_4
C729
1u/6.3V_4
C418
10u/6.3V_6
*10u/6.3V_6
C734
C713
*1u/6.3V_4
1u/6.3V_4
C435
C441
*1u/6.3V_4
*1u/6.3V_4
C383
C456
*1u/6.3V_4
*1u/6.3V_4
C753
C727
*1u/6.3V_4
1u/6.3V_4
C754
C755
*0.1u/10V_4
*0.1u/10V_4
C739
C718
*0.1u/10V_4
*0.1u/10V_4
C731
C725
1u/6.3V_4
1u/6.3V_4
C726
C394
1u/6.3V_4
1u/6.3V_4
1
2
U28
VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSL
DQSU
RESET
ZQ
NC#J1
NC#L1
NC#J9
NC#L9
RAM _DDR3L
100-BALL
SDRAM DDR3
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
M8
+SMDDR_VREF_DIMM +SMDDR_VREF_DIMM
H1
+SMDDR_VREF_DQ0
N3
M_A_A0
P7
M_A_A1
P3
M_A_A2
N2
M_A_A3
P8
M_A_A4
P2
M_A_A5
R8
M_A_A6
R2
M_A_A7
T8
M_A_A8
R3
M_A_A9
L7
M_A_A10
R7
M_A_A11
N7
M_A_A12
T3
M_A_A13
T7
M_A_A14
M7
M_A_A15
M2
M_A_BS#0
N8
M_A_BS#1
M3
M_A_BS#2
J7
K7
K9
M_A_CKE0
K1
M_A_ODT0
L2
J3
K3
L3
F3
M_A_DQS1
C7
M_A_DQS3
E7
D3
G3
M_A_DQS#1
B7
M_A_DQS#3
T2
L8
J1
L1
J9
L9
3
M_A_DQ12
M_A_DQ11
M_A_DQ13
M_A_DQ15
M_A_DQ9
M_A_DQ10
M_A_DQ8
M_A_DQ14
M_A_DQ30
M_A_DQ25
M_A_DQ31
M_A_DQ28
M_A_DQ27
M_A_DQ29
M_A_DQ26
M_A_DQ24
+1.35V_SUS +1.35V_SUS +1.35V_SUS +1.35V_SUS
+SMDDR_VREF_DQ0
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CLK0
M_A_CLK0#
M_A_CKE0
M_A_ODT0
M_A_CS#0
M_A_RAS#
M_A_CAS#
M_A_WE#
M_A_DQS5
M_A_DQS6
M_A_DQS#5
M_A_DQS#6
DDR3_DRAMRST#
M_A_ZQ2 M_A_ZQ1
R342
240/F_4
1 2
BYTE1_8-15 BYTE0_0-7
U50
VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSL
DQSU
RESET
ZQ
NC#J1
NC#L1
NC#J9
NC#L9
RAM _DDR3L
2
100-BALL
SDRAM DDR3
C461
*10u/6.3V_6
C421
1u/6.3V_4
C392
*1u/6.3V_4
C445
*1u/6.3V_4
C752
*1u/6.3V_4
C746
*0.1u/10V_4
C424
*0.1u/10V_4
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
C705
*10u/6.3V_6
C347
*1u/6.3V_4
C376
*1u/6.3V_4
C446
*1u/6.3V_4
C712
*1u/6.3V_4
C697
*0.1u/10V_4
C451
*0.1u/10V_4
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
M_A_DQ11
M_A_DQ12
M_A_DQ15
M_A_DQ13
M_A_DQ14
M_A_DQ8
M_A_DQ10
M_A_DQ9
M_A_DQ25
M_A_DQ30
M_A_DQ28
M_A_DQ31
M_A_DQ29
M_A_DQ26
M_A_DQ24
M_A_DQ27
C756
10u/6.3V_6
C365
1u/6.3V_4
C386
*1u/6.3V_4
C454
*1u/6.3V_4
C749
1u/6.3V_4
C702
*0.1u/10V_4
C738
*0.1u/10V_4
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CLK1
M_A_CLK1#
M_A_CKE1
M_A_ODT0
M_A_CS#1
M_A_RAS#
M_A_CAS#
M_A_WE#
M_A_DQS5
M_A_DQS6
M_A_DQS#5
M_A_DQS#6
DDR3_DRAMRST# DDR3_DRAMRST#
M_A_ZQ6
R756
240/F_4
1 2
C737
C462
12
10u/6.3V_6
C385
*1u/6.3V_4
C748
*1u/6.3V_4
C751
*1u/6.3V_4
C715
1u/6.3V_4
C700
*0.1u/10V_4
C703
*0.1u/10V_4
C437
0.047u/25V_4
12
C363
*10u/6.3V_6
C364
*1u/6.3V_4
C695
*1u/6.3V_4
C432
*1u/6.3V_4
C708
*1u/6.3V_4
C447
*0.1u/10V_4
C696
*0.1u/10V_4
C436
0.047u/25V_4
12
*10u/6.3V_6
C449
*1u/6.3V_4
C728
1u/6.3V_4
C723
*1u/6.3V_4
C750
*1u/6.3V_4
C709
*0.1u/10V_4
C417
*0.1u/10V_4
C438
0.047u/25V_4
Place these Caps near Memory Down CA & DQ pin
12
12
12
C406
C759
0.047u/25V_4
3
C758
0.047u/25V_4
0.047u/25V_4
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
DDR3_DRAMRST#
C463
10u/6.3V_6
C422
1u/6.3V_4
C420
1u/6.3V_4
C443
*1u/6.3V_4
C704
*1u/6.3V_4
C736
*0.1u/10V_4
C720
*0.1u/10V_4
C730
1u/6.3V_4
C423
1u/6.3V_4
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CKE1
M_A_ODT0
M_A_CS#1
M_A_RAS#
M_A_CAS#
M_A_WE#
M_A_DQS1
M_A_DQS3
M_A_DQS#1
M_A_DQS#3
C374
10u/6.3V_6
C395
1u/6.3V_4
C380
1u/6.3V_4
C448
*1u/6.3V_4
C433
*1u/6.3V_4
C744
*0.1u/10V_4
C719
*0.1u/10V_4
C760
10u/6.3V_6
C337
10u/6.3V_6
M8
H1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
M2
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
C7
E7
D3
G3
B7
T2
L8
J1
L1
J9
L9
SP : ELPIDA DRAM P/N : AKD5JG ST400
HYNIX DRAM P/N : AKD5JGQ TW01
12
12
C319
*10u/6.3V_6
C453
*1u/6.3V_4
C745
1u/6.3V_4
C388
*1u/6.3V_4
C467
*1u/6.3V_4
C373
*0.1u/10V_4
C458
*0.1u/10V_4
C411
0.047u/25V_4
C403
0.047u/25V_4
4
BYTE6_48-55 BYTE7_56-63
U29
VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSL
DQSU
RESET
ZQ
NC#J1
NC#L1
NC#J9
NC#L9
RAM _DDR3L
100-BALL
SDRAM DDR3
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E3
M_A_DQ41
DQL0
F7
M_A_DQ42
DQL1
F2
M_A_DQ40
DQL2
F8
M_A_DQ46
DQL3
H3
M_A_DQ44
DQL4
H8
M_A_DQ43
DQL5
G2
M_A_DQ45
DQL6
H7
M_A_DQ47
DQL7
D7
M_A_DQ55
DQU0
C3
M_A_DQ52
DQU1
C8
M_A_DQ49
DQU2
C2
M_A_DQ51
DQU3
A7
M_A_DQ48
DQU4
A2
M_A_DQ53
DQU5
B8
M_A_DQ54
DQU6
A3
M_A_DQ50
DQU7
B2
VDD#B2
D9
VDD#D9
G7
VDD#G7
K2
VDD#K2
K8
VDD#K8
N1
VDD#N1
N9
VDD#N9
R1
VDD#R1
R9
VDD#R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
VSS#A9
B3
VSS#B3
E1
VSS#E1
G8
VSS#G8
J2
VSS#J2
J8
VSS#J8
M1
VSS#M1
M9
VSS#M9
P1
VSS#P1
P9
VSS#P9
T1
VSS#T1
T9
VSS#T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
R378
240/F_4
1 2
M8
H1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
M2
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
C7
E7
D3
G3
B7
T2
L8
J1
L1
J9
L9
BYTE5_40-47 BYTE4_32-39
U51
VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSL
DQSU
RESET
ZQ
NC#J1
NC#L1
NC#J9
NC#L9
RAM _DDR3L
12
12
100-BALL
SDRAM DDR3
C465
10u/6.3V_6
C459
*1u/6.3V_4
C698
1u/6.3V_4
C743
*1u/6.3V_4
C742
1u/6.3V_4
C375
*0.1u/10V_4
C413
*0.1u/10V_4
C408
0.047u/25V_4
C404
0.047u/25V_4
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
12
12
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
C350
*10u/6.3V_6
C440
*1u/6.3V_4
C747
*1u/6.3V_4
C366
1u/6.3V_4
C434
1u/6.3V_4
C415
*0.1u/10V_4
C457
*0.1u/10V_4
C741
0.047u/25V_4
C765
0.047u/25V_4
E3
M_A_DQ42
F7
M_A_DQ41
F2
M_A_DQ46
F8
M_A_DQ40
H3
M_A_DQ47
H8
M_A_DQ45
G2
M_A_DQ43
H7
M_A_DQ44
D7
M_A_DQ52
C3
M_A_DQ55
C8
M_A_DQ51
C2
M_A_DQ49
A7
M_A_DQ53
A2
M_A_DQ54
B8
M_A_DQ50
A3
M_A_DQ48
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
C367
C431
10u/6.3V_6
*10u/6.3V_6
C442
C450
*1u/6.3V_4
1u/6.3V_4
C732
C694
1u/6.3V_4
1u/6.3V_4
C444
C379
1u/6.3V_4
*1u/6.3V_4
C740
C452
1u/6.3V_4
*1u/6.3V_4
C428
C398
*0.1u/10V_4
*0.1u/10V_4
C455
C393
*0.1u/10V_4
*0.1u/10V_4
12
12
C466
C412
0.047u/25V_4
0.047u/25V_4
12
12
C401
C762
0.047u/25V_4
0.047u/25V_4
4
M8
H1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
M2
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
C7
E7
D3
G3
B7
T2
L8
J1
L1
J9
L9
M_A_ZQ3
5
U30
M8
+SMDDR_VREF_DIMM
VREFCA
H1
+SMDDR_VREF_DQ0
VREFDQ
N3
M_A_A0
A0
P7
M_A_A1
A1
P3
M_A_A2
A2
N2
M_A_A3
A3
P8
M_A_A4
A4
P2
M_A_A5
A5
R8
M_A_A6
A6
R2
M_A_A7
A7
T8
M_A_A8
A8
R3
M_A_A9
A9
L7
M_A_A10
A10/AP
R7
M_A_A11
A11
N7
M_A_A12
A12/BC
T3
M_A_A13
A13
T7
M_A_A14
A14
M7
M_A_A15
A15
M2
M_A_BS#0
BA0
N8
M_A_BS#1
BA1
M3
M_A_BS#2
BA2
J7
M_A_CLK0
CK
K7
M_A_CLK0#
CK
K9
M_A_CKE0
CKE
K1
M_A_ODT0
ODT
L2
M_A_CS#0
CS
J3
M_A_RAS#
RAS
K3
M_A_CAS#
CAS
L3
M_A_WE#
WE
F3
M_A_DQS0
DQSL
C7
M_A_DQS2
DQSU
E7
DML
D3
DMU
G3
M_A_DQS#0
DQSL
B7
M_A_DQS#2
DQSU
T2
DDR3_DRAMRST#
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
100-BALL
SDRAM DDR3
RAM _DDR3L
U52
M8
+SMDDR_VREF_DIMM
VREFCA
H1
+SMDDR_VREF_DQ0
VREFDQ
N3
M_A_A0
A0
P7
M_A_A1
A1
P3
M_A_A2
A2
N2
M_A_A3
A3
P8
M_A_A4
A4
P2
M_A_A5
A5
R8
M_A_A6
A6
R2
M_A_A7
A7
T8
M_A_A8
A8
R3
M_A_A9
A9
L7
M_A_A10
A10/AP
R7
M_A_A11
A11
N7
M_A_A12
A12/BC
T3
M_A_A13
A13
T7
M_A_A14
A14
M7
M_A_A15
A15
M2
M_A_BS#0
BA0
N8
M_A_BS#1
BA1
M3
M_A_BS#2
BA2
J7
M_A_CLK1
CK
K7
M_A_CLK1#
CK
K9
M_A_CKE1
CKE
K1
M_A_ODT0
ODT
L2
M_A_CS#1
CS
J3
M_A_RAS#
RAS
K3
M_A_CAS#
CAS
L3
M_A_WE#
WE
F3
M_A_DQS0
DQSL
C7
M_A_DQS2
DQSU
E7
DML
D3
DMU
G3
M_A_DQS#0
DQSL
B7
M_A_DQS#2
DQSU
T2
DDR3_DRAMRST#
RESET
+VREF_CA_CPU
+VREFDQ_SA_M3
5
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
RAM _DDR3
R358 *SHORT_6
M3 solution
R305 *SHORT_6
M3 solution
100-BALL
SDRAM DDR3
M_A_ZQ7
R752
240/F_4
1 2
6
BYTE0_0-7 BYTE1_8-15
BYTE2_16-23 BYTE3_24-31
E3
M_A_DQ4
DQL0
F7
M_A_DQ2
DQL1
F2
M_A_DQ5
DQL2
F8
M_A_DQ6
DQL3
H3
M_A_DQ1
DQL4
H8
M_A_DQ3
DQL5
G2
M_A_DQ0
DQL6
H7
M_A_DQ7
DQL7
D7
M_A_DQ16
DQU0
C3
M_A_DQ19
DQU1
C8
M_A_DQ17
DQU2
C2
M_A_DQ18
DQU3
A7
M_A_DQ23
DQU4
A2
M_A_DQ20
DQU5
B8
M_A_DQ22
DQU6
A3
M_A_DQ21
DQU7
B2
VDD#B2
D9
VDD#D9
G7
VDD#G7
K2
VDD#K2
K8
VDD#K8
N1
VDD#N1
N9
VDD#N9
R1
VDD#R1
R9
VDD#R9
A1
VDDQ#A1
A8
VDDQ#A8
C1
VDDQ#C1
C9
VDDQ#C9
D2
VDDQ#D2
E9
VDDQ#E9
F1
VDDQ#F1
H2
VDDQ#H2
H9
VDDQ#H9
A9
VSS#A9
B3
VSS#B3
E1
VSS#E1
G8
VSS#G8
J2
VSS#J2
J8
VSS#J8
M1
VSS#M1
M9
VSS#M9
P1
VSS#P1
P9
VSS#P9
T1
VSS#T1
T9
VSS#T9
B1
VSSQ#B1
B9
VSSQ#B9
D1
VSSQ#D1
D8
VSSQ#D8
E2
VSSQ#E2
E8
VSSQ#E8
F9
VSSQ#F9
G1
VSSQ#G1
G9
VSSQ#G9
BYTE2_16-23 BYTE3_24-31 BYTE6_48-55 BYTE7_56-63
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
B2
VDD#B2
D9
VDD#D9
G7
VDD#G7
K2
VDD#K2
K8
VDD#K8
N1
VDD#N1
N9
VDD#N9
R1
VDD#R1
R9
VDD#R9
A1
VDDQ#A1
A8
VDDQ#A8
C1
VDDQ#C1
C9
VDDQ#C9
D2
VDDQ#D2
E9
VDDQ#E9
F1
VDDQ#F1
H2
VDDQ#H2
H9
VDDQ#H9
A9
VSS#A9
B3
VSS#B3
E1
VSS#E1
G8
VSS#G8
J2
VSS#J2
J8
VSS#J8
M1
VSS#M1
M9
VSS#M9
P1
VSS#P1
P9
VSS#P9
T1
VSS#T1
T9
VSS#T9
B1
VSSQ#B1
B9
VSSQ#B9
D1
VSSQ#D1
D8
VSSQ#D8
E2
VSSQ#E2
E8
VSSQ#E8
F9
VSSQ#F9
G1
VSSQ#G1
G9
VSSQ#G9
M1 solution
+1.35V_SUS
R363 2/F_6
C419
0.022u/16V_4
1 2
R357
24.9/F_4
M1 solution
R322 5.1/F_6
C368
0.022u/16V_4
1 2
R304
24.9/F_4
R350 34.8/F_4
M_A_WE#
M_A_CAS#
R738 34.8/F_4
M_A_RAS#
R339 34.8/F_4
M_A_BS#0
R744 34.8/F_4
M_A_BS#1
R746 34.8/F_4
R351 34.8/F_4
M_A_BS#2
M_A_CKE0
R334 34.8/F_4
M_A_CS#0
R345 34.8/F_4
M_A_A0
R747 34.8/F_4
M_A_A1
R751 34.8/F_4
R359 34.8/F_4
M_A_A2
M_A_A3
R355 34.8/F_4
M_A_A4
R364 34.8/F_4
M_A_A5
R369 34.8/F_4
M_A_A6
R373 34.8/F_4
R371 34.8/F_4
M_A_A7
M_A_A8
R372 34.8/F_4
M_A_A9
R750 34.8/F_4
M_A_A10
R742 34.8/F_4
M_A_A11
R360 34.8/F_4
R354 34.8/F_4
M_A_A12
M_A_A13
R370 34.8/F_4
M_A_A14
R368 34.8/F_4
M_A_A15
R346 34.8/F_4
M_A_CKE1
R743 34.8/F_4
M_A_CS#1
R340 34.8/F_4
+1.35V_SUS
6
M_A_DQ2
M_A_DQ4
M_A_DQ6
M_A_DQ5
M_A_DQ7
M_A_DQ0
M_A_DQ3
M_A_DQ1
M_A_DQ19
M_A_DQ16
M_A_DQ18
M_A_DQ17
M_A_DQ20
M_A_DQ22
M_A_DQ21
M_A_DQ23
R365
1.8K/F_4
R366
1.8K/F_4
R325
1.8K/F_4
R327
1.8K/F_4
+DDR_VTT_RUN
M_A_ZQ4
R343
240/F_4
1 2
M_A_ZQ8
R757
240/F_4
1 2
Vref_CA
+SMDDR_VREF_DIMM
Vref_DQ
+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
DDR3_DRAMRST#
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
C439
470p/50V_4
C390
470p/50V_4
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CLK0
M_A_CLK0#
M_A_CKE0
M_A_ODT0
M_A_CS#0
M_A_RAS#
M_A_CAS#
M_A_WE#
M_A_DQS4
M_A_DQS7
M_A_DQS#4
M_A_DQS#7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CLK1
M_A_CLK1#
M_A_CKE1
M_A_ODT0
M_A_CS#1
M_A_RAS#
M_A_CAS#
M_A_WE#
M_A_DQS4
M_A_DQS7
M_A_DQS#4
M_A_DQS#7
CLK_SCLK 8,13,15,33
CLK_SDATA 8,13,15,33
WP =1 : WRITE DISABLE
7
U31
M8
DQL0
VREFCA
H1
DQL1
VREFDQ
DQL2
N3
DQL3
A0
P7
DQL4
A1
P3
A2
DQL5
N2
A3
DQL6
P8
A4
DQL7
P2
A5
R8
A6
R2
A7
DQU0
T8
A8
DQU1
R3
A9
DQU2
L7
A10/AP
DQU3
R7
A11
DQU4
N7
A12/BC
DQU5
T3
DQU6
A13
T7
DQU7
A14
M7
A15
M2
BA0
VDD#B2
N8
BA1
VDD#D9
M3
VDD#G7
BA2
VDD#K2
VDD#K8
VDD#N1
J7
CK
VDD#N9
K7
CK
VDD#R1
K9
CKE
VDD#R9
K1
VDDQ#A1
ODT
L2
CS
VDDQ#A8
J3
RAS
VDDQ#C1
K3
CAS
VDDQ#C9
L3
WE
VDDQ#D2
VDDQ#E9
VDDQ#F1
F3
DQSL
VDDQ#H2
C7
DQSU
VDDQ#H9
E7
VSS#A9
DML
D3
VSS#B3
DMU
VSS#E1
VSS#G8
G3
DQSL
VSS#J2
B7
DQSU
VSS#J8
VSS#M1
VSS#M9
VSS#P1
T2
RESET
VSS#P9
VSS#T1
L8
ZQ
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
J1
NC#J1
VSSQ#E8
L1
NC#L1
VSSQ#F9
J9
NC#J9
VSSQ#G1
L9
VSSQ#G9
NC#L9
100-BALL
SDRAM DDR3
RAM _DDR3L
U53
M8
DQL0
VREFCA
H1
DQL1
VREFDQ
DQL2
N3
DQL3
A0
P7
DQL4
A1
P3
A2
DQL5
N2
A3
DQL6
P8
A4
DQL7
P2
A5
R8
A6
R2
A7
DQU0
T8
A8
DQU1
R3
A9
DQU2
L7
A10/AP
DQU3
R7
A11
DQU4
N7
A12/BC
DQU5
T3
DQU6
A13
T7
DQU7
A14
M7
A15
M2
BA0
VDD#B2
N8
BA1
VDD#D9
M3
VDD#G7
BA2
VDD#K2
VDD#K8
VDD#N1
J7
CK
VDD#N9
K7
CK
VDD#R1
K9
CKE
VDD#R9
K1
VDDQ#A1
ODT
L2
CS
VDDQ#A8
J3
RAS
VDDQ#C1
K3
CAS
VDDQ#C9
L3
WE
VDDQ#D2
VDDQ#E9
VDDQ#F1
F3
DQSL
VDDQ#H2
C7
DQSU
VDDQ#H9
E7
VSS#A9
DML
D3
VSS#B3
DMU
VSS#E1
VSS#G8
G3
DQSL
VSS#J2
B7
DQSU
VSS#J8
VSS#M1
VSS#M9
VSS#P1
T2
RESET
VSS#P9
VSS#T1
L8
ZQ
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
J1
NC#J1
VSSQ#E8
L1
NC#L1
VSSQ#F9
J9
NC#J9
VSSQ#G1
L9
VSSQ#G9
NC#L9
100-BALL
SDRAM DDR3
RAM _DDR3L
R772 *0_4
R776 *0_4
R766 *1K_4
+3V
R333 30/F_4
M_A_ODT0
R719 26.1/F_4
M_A_CLK1
M_A_CLK1#
R725 26.1/F_4
M_A_CLK0
R731 26.1/F_4
R739 26.1/F_4
M_A_CLK0#
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
BYTE4_32-39 BYTE5_40-47
E3
M_A_DQ33
F7
M_A_DQ35
F2
M_A_DQ32
F8
M_A_DQ39
H3
M_A_DQ36
H8
M_A_DQ34
G2
M_A_DQ38
H7
M_A_DQ37
D7
M_A_DQ60
C3
M_A_DQ62
C8
M_A_DQ61
C2
M_A_DQ63
A7
M_A_DQ56
A2
M_A_DQ59
B8
M_A_DQ57
A3
M_A_DQ58
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
E3
M_A_DQ35
F7
M_A_DQ33
F2
M_A_DQ39
F8
M_A_DQ32
H3
M_A_DQ37
H8
M_A_DQ38
G2
M_A_DQ34
H7
M_A_DQ36
D7
M_A_DQ62
C3
M_A_DQ60
C8
M_A_DQ63
C2
M_A_DQ61
A7
M_A_DQ59
A2
M_A_DQ57
B8
M_A_DQ58
A3
M_A_DQ56
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
R763 *1K_4
R768 *1K_4
R773 *1K_4
SPD_CLK_SCLK
SPD_CLK_SDATA
R770
*1K_4
+1.35V_SUS
+DDR_VTT_RUN
DDR3 ME MORY DOWNx16 A
DDR3 ME MORY DOWNx16 A
DDR3 ME MORY DOWNx16 A
Saturday, November 15, 2014
Saturday, November 15, 2014
Saturday, November 15, 2014
8
+1.35V_SUS +1.35V_SUS +1.35V_SUS +1.35V _SUS
SPD_A0
R764 *1K_4
SPD_A1
R771 *1K_4
SPD_A2
R777 *1K_4
U55
1
6
SPD_A0
A0
SCL
2
5
SPD_A1
A1
SDA
3
SPD_A2
A2
8
7
VCC
WP
4
GND
*M24C02-WMN6TP
SPD address:A2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
Z8C
PROJECT :
Z8C
PROJECT :
Z8C
14 48
14 48
14 48
8
+3V
14
+3V
C768
*0.1u/10V_4
3A
3A
3A
5
4
3
2
1
M_B_A[15:0] 3
D D
M_B_BS#0 3
M_B_BS#1 3
M_B_BS#2 3
M_B_CS#0 3
M_B_CS#1 3
M_B_CLK0 3
M_B_CLK0# 3
M_B_CLK1 3
M_B_CLK1# 3
M_B_CKE0 3
M_B_CKE1 3
M_B_CAS# 3
M_B_RAS# 3
R284 10K_4
R288 10K_4
+3V
C C
B B
M_B_WE# 3
CLK_SCLK 8,13,14,33
CLK_SDATA 8,13,14,33
M_B_ODT0_DIMM 4
M_B_ODT1_DIMM 4
M_B_DQS[7:0] 3
M_B_DQS#[7:0] 3
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
DIMM1_SA0
DIMM1_SA1
M_B_DQS1
M_B_DQS3
M_B_DQS5
M_B_DQS7
M_B_DQS0
M_B_DQS2
M_B_DQS4
M_B_DQS6
M_B_DQS#1
M_B_DQS#3
M_B_DQS#5
M_B_DQS#7
M_B_DQS#0
M_B_DQS#2
M_B_DQS#4
M_B_DQS#6
JDIM1A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDR3-DIMM1_H=5.2_STD
PC2100 DDR3 SDRAM SO-DIMM
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
(204P)
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
M_B_DQ12
M_B_DQ14
M_B_DQ10
M_B_DQ13
M_B_DQ9
M_B_DQ8
M_B_DQ11
M_B_DQ15
M_B_DQ28
M_B_DQ29
M_B_DQ26
M_B_DQ27
M_B_DQ24
M_B_DQ25
M_B_DQ31
M_B_DQ30
M_B_DQ44
M_B_DQ41
M_B_DQ43
M_B_DQ45
M_B_DQ40
M_B_DQ47
M_B_DQ46
M_B_DQ42
M_B_DQ61
M_B_DQ60
M_B_DQ57
M_B_DQ56
M_B_DQ58
M_B_DQ59
M_B_DQ62
M_B_DQ63
M_B_DQ0
M_B_DQ5
M_B_DQ3
M_B_DQ2
M_B_DQ4
M_B_DQ1
M_B_DQ6
M_B_DQ7
M_B_DQ17
M_B_DQ16
M_B_DQ22
M_B_DQ18
M_B_DQ21
M_B_DQ20
M_B_DQ23
M_B_DQ19
M_B_DQ36
M_B_DQ33
M_B_DQ38
M_B_DQ34
M_B_DQ32
M_B_DQ37
M_B_DQ35
M_B_DQ39
M_B_DQ55
M_B_DQ51
M_B_DQ53
M_B_DQ50
M_B_DQ52
M_B_DQ49
M_B_DQ48
M_B_DQ54
M_B_DQ[63:0] 3
DDR3_DRAMRST# 4,14
R297 *10K_4
+3V
+SMDDR_VREF_DQ1
+SMDDR_VREF_DIMM
+1.35V_SUS
2.48A
+3V
PM_EXTTS#1
C362 *0.1u/10V_4
+SMDDR_VREF_DQ1
M1 solution
+1.35V_SUS
JDIM1B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3-DIMM1_H=5.2_STD
PC2100 DDR3 SDRAM SO-DIMM
(204P)
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VTT1
VTT2
GND
GND
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
205
206
15
+DDR_VTT_RUN
R282
+1.35V_SUS
C348
10u/6.3V_6
+3V
A A
Place these Caps near SO-DIMM
C316
10u/6.3V_6
C313
2.2u/6.3V_6
C320
10u/6.3V_6
C346
10u/6.3V_6
C345
0.1u/10V_4
C349
10u/6.3V_6
+DDR_VTT_RUN
5
C318
10u/6.3V_6
C328
1u/6.3V_4
C317
0.1u/10V_4
C315
0.1u/10V_4
C351
0.1u/10V_4
C331
1u/6.3V_4
0.1u/10V_4
C355
0.1u/10V_4
C343
1u/6.3V_4
+SMDDR_VREF_DIMM
+
C306
330u/2V_7343
C353
1u/6.3V_4
C357
0.1u/10V_4
C360
4.7u/6.3V_6
4
C339
0.1u/10V_4
2.2u/6.3V_6
C312
4.7u/6.3V_6
+SMDDR_VREF_DQ1
C310
C327
2.2u/6.3V_6
C322
4.7u/6.3V_6
+VREFDQ_SB_M3
M3 solution
3
R268 *SHORT_6
R279 2/F_6 C356
C304
0.022u/16V_4
1 2
R272
24.9/F_4
1.8K/F_4
R283
1.8K/F_4
2
Vref_DQ
+SMDDR_VREF_DQ1
C321
470p/50V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDRIII SO-DIMM-1
DDRIII SO-DIMM-1
DDRIII SO-DIMM-1
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
Z8C
Z8C
Z8C
15 48 Saturday, November 15, 2014
15 48 Saturday, November 15, 2014
15 48 Saturday, November 15, 2014
1
3A
3A
3A
1
2
3
4
5
6
7
8
+1.05V_GFX
A A
Near GPU
C131 EV@22U/6.3VS_6
C105 EV@22U/6.3VS_6
C111 EV@10U/6.3VS_6
C106 EV@10U/6.3VS_6
C89 EV@4.7U/6.3V_6
C141 EV@1U/6.3V_4
C133 EV@1U/6.3V_4
Under GPU
PEX_IOVDD + PEX_IOVDDQ = 1.042A
+1.05V_GFX
PEX_PLL_HVDD +
PEX_SVDD_3V3 = 143mA
B B
C C
+1.05V_GFX
GPU_VCCP_SENSE 42
R67 EV@0_6
Near GPU
D D
Under GPU
1
C97 EV@22U/6.3VS_6
C118 *EV@22U/6.3VS_6
C91 *EV@10U/6.3VS_6
C126 EV@10U/6.3VS_6
C611 EV@4.7U/6.3V_6
Near GPU
Under GPU
C150 *EV@1U/6.3V_4
C160 *EV@1U/6.3V_4
C170 EV@0.1U/10V_4
C187 EV@4.7U/6.3V_6
C188 EV@4.7U/6.3V_6
Near GPU
GPU_VSSP_SENSE 42
PEX_TSTCLK
R83 *EV@200/F_4
PEX_TSTCLK#
CX300T30001 Change to 0ohm
PEX_PLLVDD
C84 EV@4.7U/6.3V_6
C143 EV@1U/6.3V_4
C134 EV@0.1U/10V_4
PEX_PLLVDD = 130mA
EV@10K/F_4
R116
R493 EV@2.49K/F_4
+3V_GFX
TESTMODE
PEX_TERMP
AA22
AB23
AC24
AD25
AE26
AE27
AA10
AA12
AA13
AA16
AA18
AA19
AA20
AA21
AB22
AC23
AD24
AE25
AF26
AF27
AA8
AA9
AB8
AF22
AE22
AA14
AA15
AD9
AF25
F2
F1
2
U43A
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_PLL_HVDD
PEX_PLL_HVDD
PEX_SVDD_3V3
VDD_SENSE
GND_SENSE
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT
PEX_PLLVDD
PEX_PLLVDD
TESTMODE
PEX_TERMP
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
1/14 PCI_EXPRESS
PEX_WAKE
PEX_RST
PEX_CLKREQ
PEX_REFCLK
PEX_REFCLK
PEX_TX0
PEX_TX0
PEX_RX0
PEX_RX0
PEX_TX1
PEX_TX1
PEX_RX1
PEX_RX1
PEX_TX2
PEX_TX2
PEX_RX2
PEX_RX2
PEX_TX3
PEX_TX3
PEX_RX3
PEX_RX3
PEX_TX4
PEX_TX4
PEX_RX4
PEX_RX4
PEX_TX5
PEX_TX5
PEX_RX5
PEX_RX5
PEX_TX6
PEX_TX6
PEX_RX6
PEX_RX6
PEX_TX7
PEX_TX7
PEX_RX7
PEX_RX7
PEX_TX8
PEX_TX8
PEX_RX8
PEX_RX8
PEX_TX9
PEX_TX9
PEX_RX9
PEX_RX9
PEX_TX10
PEX_TX10
PEX_RX10
PEX_RX10
PEX_TX11
PEX_TX11
PEX_RX11
PEX_RX11
PEX_TX12
PEX_TX12
PEX_RX12
PEX_RX12
PEX_TX13
PEX_TX13
PEX_RX13
PEX_RX13
PEX_TX14
PEX_TX14
PEX_RX14
PEX_RX14
PEX_TX15
PEX_TX15
PEX_RX15
PEX_RX15
GF119 GF117
COMMON bga595-nvidia-n13p-gv2-s-a2
3
AB6
AC7
AC6
AE8
AD8
AC9
AB9
AG6
AG7
AB10
AC10
AF7
AE7
AD11
AC11
AE9
AF9
AC12
AB12
AG9
AG10
AB13
AC13
AF10
AE10
AD14
AC14
AE12
AF12
AC15
AB15
AG12
AG13
AB16
AC16
AF13
AE13
AD17
AC17
AE15
AF15
AC18
AB18
AG15
AG16
AB19
AC19
AF16
AE16
AD20
AC20
AE18
AF18
AC21
AB21
AG18
AG19
AD23
AE23
AF19
AE19
AF24
AE24
AE21
AF21
AG24
AG25
AG21
AG22
VGA_RST#
PEX_CLKREQ#
PEG_RXP0_C
PEG_RXN0_C
PEG_RXP1_C
PEG_RXN1_C
PEG_RXP2_C
PEG_RXN2_C
PEG_RXP3_C
PEG_RXN3_C
C190 *EV@0.1U/10V_4
R124 *EV@SHORT_4
R148 EV@10K/F_4
C147 EV@0.22U/10V_4
C153 EV@0.22U/10V_4
C144 EV@0.22U/10V_4
C138 EV@0.22U/10V_4
C132 EV@0.22U/10V_4
C128 EV@0.22U/10V_4
C158 EV@0.22U/10V_4
C164 EV@0.22U/10V_4
PLTRST# 7,13,27,28,29,35
DGPU_HOLD_RST# 10
PEX_CLKREQ#
4
PEGX_RST# 19
+3V_GFX
CLK_PCIE_VGA 9
CLK_PCIE_VGA# 9
PEG_RX0 9
PEG_RX#0 9
PEG_TX0 9
PEG_TX#0 9
PEG_RX1 9
PEG_RX#1 9
PEG_TX1 9
PEG_TX#1 9
PEG_RX2 9
PEG_RX#2 9
PEG_TX2 9
PEG_TX#2 9
PEG_RX3 9
PEG_RX#3 9
PEG_TX3 9
PEG_TX#3 9
+3V
EV@MC74VHC1G08DFT2G
U22
2
1
4
3 5
+3V_GFX
2
1
Q11
EV@2N7002K
R147 *EV@0_4
NVDD = 32.22 ~ 26.66 A
Under GPU
C123 EV@1U/6.3V_4
C168 EV@1U/6.3V_4
C169 EV@1U/6.3V_4
C186 EV@1U/6.3V_4
C140 EV@4.7U/6.3V_6
C125 EV@4.7U/6.3V_6
C154 EV@4.7U/6.3V_6
C149 EV@4.7U/6.3V_6
C159 EV@4.7U/6.3V_6
C136 EV@4.7U/6.3V_6
C135 EV@4.7U/6.3V_6
C151 EV@4.7U/6.3V_6
C142 EV@4.7U/6.3V_6
C124 EV@4.7U/6.3V_6
C146
EV@330u_2.5V_3528
C247 EV@22U/6.3V_8
C232 EV@47u/6.3V_8
C248 EV@4.7U/6.3VS_6
C206 EV@4.7U/6.3VS_6
C215 EV@4.7U/6.3VS_6
C217 EV@4.7U/6.3VS_6
C257 EV@4.7U/6.3VS_6
Near GPU
C275
EV@0.1U/10V_4
R183 *EV@SHORT_4
PEGX_RST#
Follow Z09 to isolate CLK_REQ#
3
5
CLK_PEGA_REQ# 9
PU at page 9
1 2
+
R179
EV@100K/F_4
+VGACORE
6
U43E
11/14 NVVDD
K10
VDD
K12
VDD
K14
VDD
K16
VDD
K18
VDD
L11
VDD
L13
VDD
L15
VDD
L17
VDD
M10
VDD
M12
VDD
M14
VDD
M16
VDD
M18
VDD
N11
VDD
N13
VDD
N15
VDD
N17
VDD
P10
VDD
P12
VDD
P14
VDD
P16
VDD
P18
VDD
R11
VDD
R13
VDD
R15
VDD
R17
VDD
T10
VDD
T12
VDD
T14
VDD
T16
VDD
T18
VDD
U11
VDD
U13
VDD
U15
VDD
U17
VDD
V10
VDD
V12
VDD
V14
VDD
V16
VDD
V18
VDD
bga595-nvidia-n13p-gv2-s-a2
COMMON
AD10
AD7
B19
F11
V5
V6
G1
G2
G3
G4
G5
G6
G7
V1
V2
W1
W2
W3
W4
ALL 3.3V
+3VGFX & +3V3_AON
+VGACORE
PEX_VDD
+1.05V_GFX
FBVDDQ
+1.5V_GFX
16
U43C
14/14 XVDD/VDD33
NC
NC
NC
3V3AUX_NC
FERMI_RSVD1_NC
FERMI_RSVD2_NC
CONFIGURABLE
POWER CHANNELS
* nc on substrate
XPWR_G1
XPWR_G2
XPWR_G3
XPWR_G4
XPWR_G5
XPWR_G6
XPWR_G7
XPWR_V1
XPWR_V2
XPWR_W1
XPWR_W2
XPWR_W3
XPWR_W4
bga595-nvidia-n13p-gv2-s-a2 COMMON
t>0 NVVDD
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
N15S-GT (PCIE I/F) /NVDD
N15S-GT (PCIE I/F) /NVDD
N15S-GT (PCIE I/F) /NVDD
Saturday, November 15, 2014
Saturday, November 15, 2014
Saturday, November 15, 2014
VDD33 = 56mA
G10
VDD33
VDD33
VDD33
VDD33
G12
G8
G9
+3V_GFX
C148 EV@0.1U/10V_4
C214 EV@4.7U/6.3V_6
1 2
C195 EV@1U/10V_6
+3V_GFX
C213 EV@4.7U/6.3V_6
1 2
C196 EV@1U/10V_6
C161 EV@0.1U/10V_4
C171 EV@0.1U/10V_4
Under GPU
Power up
sequence
t>=0
Power down
sequence
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Z8C
Z8C
Z8C
16 48
16 48
16 48
8
Under GPU
Near GPU
3A
3A
3A
1
R603 EV@10K/F_4
A A
FBA_ODT_L
FBA_ODT_H
FBA_RST#
FBA_CKE_L
FBA_CKE_H
B B
C C
FBA_CMD0
FBA_CMD3
FBA_CMD16
FBA_CMD19
FBA_CMD20
+1.35V_GFX
FBA_CMD10 20,21,22,23
FBA_CMD11 20,21,22,23
FBA_CMD12 20,21,22,23
FBA_CMD13 20,21,22,23
FBA_CMD14 20,21,22,23
FBA_CMD15 20,21,22,23
FBA_CMD16 22,23
FBA_CMD17 23
FBA_CMD18 22
FBA_CMD19 22,23
FBA_CMD20 20,21,22,23
FBA_CMD21 20,21,22,23
FBA_CMD22 20,21,22,23
FBA_CMD23 20,21,22,23
FBA_CMD24 20,21,22,23
FBA_CMD25 20,21,22,23
FBA_CMD26 20,21,22,23
FBA_CMD27 20,22
FBA_CMD28 20,21,22,23
FBA_CMD29 20,21,22,23
FBA_CMD30 21,23
VMA_CLK0 20,21
VMA_CLK0# 20,21
VMA_CLK1 22,23
VMA_CLK1# 22,23
R487 EV@10K/F_4
R61 EV@10K/F_4
R34 EV@10K/F_4
R47 EV@10K/F_4
R468 EV@10K/F_4
FBA_CMD0 20,21
FBA_CMD1 21
FBA_CMD2 20
FBA_CMD3 20,21
FBA_CMD4 20,21,22,23
FBA_CMD5 20,21,22,23
FBA_CMD6 20,21,22,23
FBA_CMD7 20,21,22,23
FBA_CMD8 20,21,22,23
FBA_CMD9 20,21,22,23
R174 *EV@60.4_4
R173 *EV@60.4_4
FB_PLLAVDD = 55mA
+1.05V_GFX
D D
L13 EV@PBY160808T-300Y-N
C115 EV@22U/6.3VS_6
C110 EV@0.1U/10V_4
C129 EV@0.1U/10V_4
C116 EV@0.1U/10V_4
+FB_PLLAVDD
FB_DLLAVDD = 15mA
1
PS_FB_CLAMP
2
F3
C27
C26
E24
F24
D27
D26
F25
F26
F23
G22
G23
G24
F27
G25
G27
G26
M24
M23
K24
K23
M27
M26
M25
K26
K22
J23
J25
J24
K27
K25
J27
J26
F22
J22
D24
D25
N22
M22
D18
C18
D17
D16
T24
U24
V24
V25
F16
P22
H22
2
U43B
FB_CLAMP
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31
FBA_DEBUG0
FBA_DEBUG1
FBA_CLK0
FBA_CLK0
FBA_CLK1
FBA_CLK1
FBA_WCK01
FBA_WCK01
FBA_WCK23
FBA_WCK23
FBA_WCK45
FBA_WCK45
FBA_WCK67
FBA_WCK67
FB_PLLAVDD
FB_PLLAVDD
FB_DLLAVDD
INT
bga595-nvidia-n13p-gv2-s-a2
GF119 NC
GF117
GF119
GF117 FB_PLLAVDD
3
3
2/14 FBA
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
FB_VREF_PROBE
COMMON
E18
F18
E16
F17
D20
D21
F20
E21
E15
D15
F15
F13
C13
B13
E13
D13
B15
C16
A13
A15
B18
A18
A19
C19
B24
C23
A25
A24
A21
B21
C20
C21
R22
R24
T22
R23
N25
N26
N23
N24
V23
V22
T23
U22
Y24
AA24
Y22
AA23
AD27
AB25
AD26
AC25
AA27
AA26
W26
Y25
R26
T25
N27
R27
V26
V27
W27
W25
D19
D14
C17
C22
P24
W24
AA25
U25
E19
C15
B16
B22
R25
W23
AB26
T26
F19
C14
A16
A22
P25
W22
AB27
T27
D23
VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
VMA_DQ4
VMA_DQ5
VMA_DQ6
VMA_DQ7
VMA_DQ8
VMA_DQ9
VMA_DQ10
VMA_DQ11
VMA_DQ12
VMA_DQ13
VMA_DQ14
VMA_DQ15
VMA_DQ16
VMA_DQ17
VMA_DQ18
VMA_DQ19
VMA_DQ20
VMA_DQ21
VMA_DQ22
VMA_DQ23
VMA_DQ24
VMA_DQ25
VMA_DQ26
VMA_DQ27
VMA_DQ28
VMA_DQ29
VMA_DQ30
VMA_DQ31
VMA_DQ32
VMA_DQ33
VMA_DQ34
VMA_DQ35
VMA_DQ36
VMA_DQ37
VMA_DQ38
VMA_DQ39
VMA_DQ40
VMA_DQ41
VMA_DQ42
VMA_DQ43
VMA_DQ44
VMA_DQ45
VMA_DQ46
VMA_DQ47
VMA_DQ48
VMA_DQ49
VMA_DQ50
VMA_DQ51
VMA_DQ52
VMA_DQ53
VMA_DQ54
VMA_DQ55
VMA_DQ56
VMA_DQ57
VMA_DQ58
VMA_DQ59
VMA_DQ60
VMA_DQ61
VMA_DQ62
VMA_DQ63
VMA_DM0
VMA_DM1
VMA_DM2
VMA_DM3
VMA_DM4
VMA_DM5
VMA_DM6
VMA_DM7
VMA_WDQS0
VMA_WDQS1
VMA_WDQS2
VMA_WDQS3
VMA_WDQS4
VMA_WDQS5
VMA_WDQS6
VMA_WDQS7
VMA_RDQS0
VMA_RDQS1
VMA_RDQS2
VMA_RDQS3
VMA_RDQS4
VMA_RDQS5
VMA_RDQS6
VMA_RDQS7
4
VMA_DQ[63:0]
FBVDDQ + FBVDD = 3.116A
C109 EV@0.1U/10V_4
C122 EV@0.1U/10V_4
1 2
C137 EV@1U/10V_6
1 2
C113 EV@1U/10V_6
C112 EV@4.7U/6.3V_6
C114 EV@4.7U/6.3V_6
C117 EV@10U/6.3V_6
C119 EV@22U/6.3V_8
VMA_DM[7:0] 20,21,22,23
VMA_WDQS[7:0] 20,21,22,23
VMA_RDQS[7:0] 20,21,22,23
4
5
VMA_DQ[63:0] 20,21,22,23
+1.35V_GFX
B26
C25
E23
E26
F14
F21
G13
G14
G15
G16
G18
G19
G20
G21
H24
H26
J21
K21
L22
L24
L26
M21
N21
R21
T21
V21
W21
FBA_CMD4
R480 EV@100/F_4 R473 EV@100/F_4
FBA_CMD5
R485 EV@100/F_4
FBA_CMD6
R436 EV@100/F_4
FBA_CMD7
R444 EV@100/F_4
FBA_CMD8
R54 EV@100/F_4
FBA_CMD9
R58 EV@100/F_4
FBA_CMD10
R53 EV@100/F_4 R42 EV@100/F_4
FBA_CMD11
R457 EV@100/F_4
FBA_CMD12
R52 EV@100/F_4
FBA_CMD13
R51 EV@100/F_4
FBA_CMD14
R9 EV@100/F_4
FBA_CMD15
R442 EV@100/F_4
FBA_CMD21
R478 EV@100/F_4
FBA_CMD22
R479 EV@100/F_4
FBA_CMD23
R462 EV@100/F_4
FBA_CMD24
R5 EV@100/F_4
FBA_CMD25
R38 EV@100/F_4
FBA_CMD26
R16 EV@100/F_4
FBA_CMD27
R18 EV@100/F_4
FBA_CMD28
R456 EV@100/F_4
FBA_CMD29
R48 EV@100/F_4
FBA_CMD30
R477 EV@100/F_4
5
U43D
12/14 FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CALTERM_GND
bga595-nvidia-n13p-gv2-s-a2
COMMON
R490 EV@100/F_4
R435 EV@100/F_4
R443 EV@100/F_4
R39 EV@100/F_4
R63 EV@100/F_4
R458 EV@100/F_4
R41 EV@100/F_4
R49 EV@100/F_4
R10 EV@100/F_4
R441 EV@100/F_4
R469 EV@100/F_4
R470 EV@100/F_4
R463 EV@100/F_4
R4 EV@100/F_4
R36 EV@100/F_4
R15 EV@100/F_4
R17 EV@100/F_4
R454 EV@100/F_4
R35 EV@100/F_4
R471 EV@100/F_4
D22
C24
B25
+1.35V_GFX
6
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
EC_FB_CLAMP 19,35
GC6_FB_EN 10,19
VGPU_PWRGD 42
6
7
R172 EV@40.2/F_4
+1.35V_GFX
R161 EV@42.2/F_4
R149 EV@51.1/F_4
For support GC6 2.0
R201 *EV@0_4
R199 *EV@SHORT_4
Need Check footprint & PN!
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
U43F
A2
AB17
AB20
AB24
AC2
AC22
AC26
AC5
AC8
AD12
AD13
A26
AD15
AD16
AD18
AD19
AD21
AD22
AE11
AE14
AE17
AE20
AB11
AF1
AF11
AF14
AF17
AF20
AF23
AF5
AF8
AG2
AG26
AB14
B1
B11
B14
B17
B20
B23
B27
B5
B8
E11
E14
E17
E2
E20
E22
E25
E5
E8
H2
H23
H25
H5
K11
K13
K15
K17
L10
L12
L14
L16
L18
L2
L23
L25
L5
M11
bga595-nvidia-n13p-gv2-s-a2 COMMON
+3V
C267
2
1
EV@0.1U/10V_4
*EV@NL17SZ32DFT2G
U21
3 5
4
R218 *EV@SHORT_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
N15S-GT (MEMORY/GND)
N15S-GT (MEMORY/GND)
N15S-GT (MEMORY/GND)
Saturday, November 15, 2014
Saturday, November 15, 2014
Saturday, November 15, 2014
13/14 GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
R197
EV@100K/F_4
Z8C
Z8C
Z8C
8
17
M13
GND
M15
GND
M17
GND
N10
GND
N12
GND
N14
GND
N16
GND
N18
GND
P11
GND
P13
GND
P15
GND
P17
GND
P2
GND
P23
GND
P26
GND
P5
GND
R10
GND
R12
GND
R14
GND
R16
GND
R18
GND
T11
GND
T13
GND
T15
GND
T17
GND
U10
GND
U12
GND
U14
GND
U16
GND
U18
GND
U2
GND
U23
GND
U26
GND
U5
GND
V11
GND
V13
GND
V15
GND
V17
GND
Y2
GND
Y23
GND
Y26
GND
Y5
GND
AA7
GND
AB7
GND
FBVDDQ_EN 43
17 48
17 48
17 48
8
3A
3A
3A
1
U43G
4/14 IFPAB
GF117 GF119
NC
NC
GF117
GF117
GF117
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
GF119
AA6
IFPAB_RSET
V7
IFPAB_PLLVDD
W7
A A
B B
C C
IFPAB_PLLVDD
W6
IFPA_IOVDD
Y6
IFPB_IOVDD
IFPAB
bga595-nvidia-n13p-gv2-s-a2
U43H
5/14 IFPC
T6
IFPC_RSET
M7
IFPC_PLLVDD
N7
IFPC_PLLVDD
P6
IFPC_IOVDD
bga595-nvidia-n13p-gv2-s-a2
U43I
6/14 IFPD
U6
IFPD_RSET
T7
IFPD_PLLVDD
R7
IFPD_PLLVDD
GF119
GF119
IFPD
D D
R6
IFPD_IOVDD
1
GF119
GF117
NC
2
GF117
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
DVI/HDMI DP
I2CW_SDA
NC
I2CW_SCL
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
GF117
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
2
GF119
IFPA_TXC
IFPA_TXC
IFPA_TXD0
IFPA_TXD0
IFPA_TXD1
IFPA_TXD1
IFPA_TXD2
IFPA_TXD2
IFPA_TXD3
IFPA_TXD3
IFPB_TXC
IFPB_TXC
IFPB_TXD4
IFPB_TXD4
IFPB_TXD5
IFPB_TXD5
IFPB_TXD6
IFPB_TXD6
IFPB_TXD7
IFPB_TXD7
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
I2CX_SDA
I2CX_SCL
TXC
TXC
GPIO14
COMMON
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
3
U43J
7/14 IFPEF
AC4
AC3
Y3
Y4
AA2
AA3
AA1
AB1
AA5
AA4
AB4
AB5
AB2
AB3
AD2
AD3
AD1
AE1
AD5
AD4
B3
J7
K7
K6
H6
J6
GF119
IFPEF_PLLVDD
IFPEF_PLLVDD
IFPEF_RSET
GF119
IFPE_IOVDD
IFPF_IOVDD
IFPE
IFPF
IFPC
GF119 GF117
bga595-nvidia-n13p-gv2-s-a2
N5
IFPC_AUX
N4
IFPC_AUX
N3
IFPC_L3
N2
IFPC_L3
IFPC_L2
IFPC_L2
IFPC_L1
IFPC_L1
IFPC_L0
IFPC_L0
GPIO15
COMMON
R3
R2
R1
T1
T3
T2
C3
+1.05V_GFX
L14 EV@HCB1005KF-181T15(180,1500MA)
+1.05V_GFX
GF117
NC
GF117
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
GF117
NC
GF117
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
PLLVDD = 38mA
L15 EV@PBY160808T-300Y-N
C167 EV@0.1U/10V_4
C234 EV@22U/6.3VS_6
SP_PLLVDD = 17mA
C166 EV@0.1U/10V_4
C237 EV@0.1U/10V_4
C230 EV@4.7U/6.3V_6
C218 EV@22U/6.3VS_6
VID_PLLVDD = 41mA
R634 EV@10K/F_4
GF119
DP DVI/HDMI
IFPD_AUX
IFPD_AUX
IFPD_L3
IFPD_L3
IFPD_L2
IFPD_L2
IFPD_L1
IFPD_L1
IFPD_L0
IFPD_L0
GPIO17
COMMON bga595-nvidia-n13p-gv2-s-a2
P4
P3
R5
R4
T5
T4
U4
U3
V4
V3
D4
3
DB-->SI change 10/25
Use G-CLK
HWPG_1.5VGFX 43
4
DVI-DL
I2CY_SDA
I2CY_SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
HPD_E NC
DVI-DL
TXD3
TXD3
TXD4
TXD4
TXD5
TXD5
27M_XTAL_IN_R 27M_XTAL_OUT
R56 EV@4.7K_4
4
GF119
DVI-SL/HDMI
I2CY_SDA
I2CY_SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
HPD_E
GF119
DVI-SL/HDMI
I2CZ_SDA
I2CZ_SCL
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
HPD_F
NV_PLLVDD
SP_PLLVDD
XTAL_SSIN
DGPU_POK2
C63
*EV@1000P/50V_4
L6
M6
N6
A10
C11
2
1 3
DP
IFPE_AUX
IFPE_AUX
IFPE_L3
IFPE_L3
IFPE_L2
IFPE_L2
IFPE_L1
IFPE_L1
IFPE_L0
IFPE_L0
GPIO18
DP
IFPF_AUX
IFPF_AUX
IFPF_L3
IFPF_L3
IFPF_L2
IFPF_L2
IFPF_L1
IFPF_L1
IFPF_L0
IFPF_L0
GPIO19
COMMON
U43M
9/14 XTAL_PLL
PLLVDD
SP_PLLVDD
VID_PLLVDD
XTALSSIN
XTALIN
bga595-nvidia-n13p-gv2-s-a2
DGPU_PGOK-1
Q4
EV@METR3904-G
J3
J2
J1
K1
K3
K2
M3
M2
M1
N1
C2
H4
H3
J5
J4
K5
K4
L4
L3
M5
M4
F7
5
+3V_GFX
R71 EV@4.7K_4
6
U43K
3/14 DACA
W5
DACA_VDD
AE2
DACA_VREF
AF2
DACA_RSET
bga595-nvidia-n13p-gv2-s-a2
2
C85
*EV@1000p/50V_4
GF119
1 3
GF117
NC
TSEN_VREF
NC
Q6
EV@MMBT3904-7-F
+3V
R64
EV@4.7K_4
C70
EV@1000p/50V_4
GF117
7
8
18
GF119
NC
NC
DACA_HSYNC
NC
DACA_VSYNC
NC
NC
DACA_GREEN
NC
NC
+3V_GFX
2
1 3
B7
I2CA_SCL
A7
AE3
AE4
AG3
I2CA_SDA
R631 EV@2.2K_4
R611 EV@2.2K_4
I2CA_SCL
I2CA_SDA
DACA_RED
AF4
AF3
DACA_BLUE
COMMON
R70
EV@1.5K/F_4
3V_MAIN_PWGD
R66
*EV@100K/F_4
Q5
EV@DTC144EU
+1.05V_GFX and GPU core power EN
DB-->SI change 10/25
Use G-CLK
3V_MAIN_PWGD 42,43
C656
4 1
27M_XTAL_IN_R
GF119
NC
GF117
C10
BXTALOUT
XTALOUTBUFF
XTALOUT
COMMON
B10
R613 EV@10K/F_4
27M_XTAL_OUT
Y4
EV@27MHZ +-10PPM
EV@10P/50V_4
2 3
EV@10P/50V_4
C658
+3V_GFX
+3V
5
R59
EV@4.7K_4
C77
EV@1000P/50V_4
2
R65
EV@4.7K_4
Q7
EV@DTC144EUA
1 3
R69
EV@100K/F_4
6
DGPU_PWROK 10
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
7
PROJECT :
N15S-GT (DISPLAY)
N15S-GT (DISPLAY)
N15S-GT (DISPLAY)
Z8C
Z8C
Z8C
18 48
18 48
18 48
8
3A
3A
3A
1
TP13
TP18
A A
R604 EV@40.2K/F_4
U43N
8/14 MISC1
B B
TP11
TP10
TP124
TP127
TP122
TP120
C C
PEGX_RST# 16
VGA_OVT#
THERMTHERM+
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST#
E12
F12
AE5
AD6
AE6
AF6
AG4
1
THERMDN
THERMDP
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST
bga595-nvidia-n13p- gv2-s-a2
2
3
Q15
EV@2N7002K
dGPU_OTP# 35
dGPU_OPP# = EC control
2
+3V_GFX
3
Q10
EV@2N7002K
dGPU_OPP# 35
GPIO12 AC detect
AC high
DC low
1
GPIO12_ACIN
D D
1
2
U43L
10/14 MISC2
E10
VMON_IN0
F10
VMON_IN1
D1
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
STRAP0
D2
STRAP1
E4
STRAP2
E3
STRAP3
D3
STRAP4
GF119
C1
STRAP5_NC
F6
MULTISTRAP_REF0_GND
F4
MULTISTRAP_REF1_GND
F5
MULTISTRAP_REF2_GND
bga595-nvidia-n13p- gv2-s-a2 COMMON
GF117
NC
NC
GF117
NC
NC
NC
2
GF117
NC
GF119
D9
I2CS_SCL
D8
I2CS_SDA
A9
I2CC_SCL
B9
I2CC_SDA
GF119
C9
I2CB_SCL
C8
I2CB_SDA
C6
GPIO0
B2
GPIO1
D6
GPIO2
C7
GPIO3
F9
GPIO4
A3
GPIO5
A4
GPIO6
B6
GPIO7
A6
OVERT
F8
GPIO9
C5
GPIO10
E7
GPIO11
D7
GPIO12
B4
GPIO13
GF119
D5
GPIO16
E6
GPIO20
C4
GPIO21
COMMON
GPIO12_ACIN
VGPU_PSI
VGA_OVT#
ALERT
GPU_PEX_RST_HOLD#
GPU_EVENT#
+3V_MAIN_EN
JTAG_TMS
JTAG_TDI
JTAG_TRST#
JTAG_TCK
GPUT_CLK_L
GPUT_DATA_L
DGPU_EDIDCLK
DGPU_EDIDDATA
N12E_SCL
N12E_SDA
FB_CLAMP_MON
+3V_MAIN_EN
GPU_EVENT#
VGA_OVT#
ALERT
GPIO12_ACIN
GPU_GPIO16
GPU_PEX_RST_HOLD#
3
ROM_CS
ROM_SO
ROM_SCLK
GF117
NC
NC
R614 EV@2.2K_4
R633 EV@2.2K_4
R632 EV@2.2K_4
R612 EV@2.2K_4
1
*EVG@2N7002K
TP138
TP136
R169 EV@10K/F_4
R629 *EV@10K/F_4
R185 EV@10K/F_4
R624 EV@10K/F_4
R609 *EV@10K/F_4
R630 *EV@10K/F_4
R610 *EV@10K/F_4
R566 *EV@10K/F_4
R552 *EV@10K/F_4
R553 EV@10K/F_4
R567 *EV@10K/F_4
3
D12
ROM_CS
B12
A12
C12
D11
D10
E9
CEC
3
2
+3V_GFX
VGPU_PWMVID 42
VGPU_PSI 42
TP137
+3V_GFX
ROM_SI
ROM_SO
ROM_SCLK
R170 *EV@10K/F_4
ROM_SI
BUFRST
PGOOD
R181 *EV@SHORT_4
Q14
R171 EV@10K/F_4
SYS_PEX_RST_MON#
2ND_MBDATA 8,35
2ND_MBCLK 8,35
4
+3V_GFX
+3V_GFX
TP22
+3V_GFX
Q12
5
Dual
2ND_MBDATA GPUT_DATA_L
2
2ND_MBCLK
R177
EV@10K/F_4
R182
*EVG@10K/F_4
6
EV@2N7002DW
Dual
R184 *EVG@0_4
R189 *EV@0_4
R178 *EV@0_4
1
2
RAMCFG
[3:0]
+3V_GFX
0000
0100 DDR3L 256Mx16, 64bit, 4Gb,900MHz Micron
0011
DDR3L 256Mx16, 64bit, 4Gb,900MHz
0101 SAMSUNG DDR3L 256Mx16, 64bit, 4Gb,900MHz
5
R584
*EV@10K/F_4
ROM_SI STRAP0
ROM_SO
ROM_SCLK
R590
EV@4.99K/F_4
4 3
R176 EV@4.7K_4
R175 EV@4.7K_4
1
EC_FB_CLAMP 17,35
GC6_FB_EN 10,17
+3V_GFX
*EV@10K/F_4
R180
3
Q13
*EVG@2N7002K
VRAM Configuration Table
DESCRIPTION
GPIO ASSIGNMENTS
GPIO
I/O
IN
0
OUT
1
OUT
3
OUT2LCD_VCC
4
OUT
5
OUT
6
OUT
7
OUT
8
I/O
I/O
9
10
OUT
OUT
11
IN
12
OUT
13
4
PIN
FB_CLAMP_MON
MEM_VDD_CTL
LCD_BL_PWM
LCD_BLEN
Reserved
FB_CLAMP_TGL_REQ
3D VISION
OVERT
ALERT
MEM VREF_CTL
PWR_VID GPU CORE_VDD PWM Control signal
PWR_LEVEL
PSI Phase Shedding
5
6
Default: HYNIX
R583
R591
*EV@4.99K/F_4
*EV@4.99K/F_4
STRAP1
STRAP2
STRAP3
STRAP4
R585
R589
EV@4.99K/F_4
EV@4.99K/F_4
N15S-GT
Hynix should be 0x0, R590 4.99K 1%
Samsung Should be 0x2, R590 15K 1%
+3V_GFX
GPUT_CLK_L
R167 *EVG@0_4
R163 *EV@0_4
+3V_GFX
N15V-GM
Hynix should be 0x4, R590 24.9K 1%
FB_CLAMP_REQ# 35
DGPU_EVENT# 10
ROM_SI
Vendor
...
HYNIX
USAGE
FB Clamp monitor
Memory VDD VID
Panel Backlight PWM
PANEL POWER ENABLE
PANEL BACKLIGHT ENABLE
-Active low FB Clamp toggle request
3D VISION LEFT/RIGHT signal
ACTIVE LOW THERMAL OVER TEMP
ACTIVE LOW THERMAL ALERT
MEMMORY VREF CONTROL
AC Power detect or power supply overdraw input
Vendor P/N
MT41J256M16HA-093G:E
H5TC4G63AFR-11C
K4W4G1646D-BC1A
6
R627
EV@49.9K/F_4
R607
*EV@24.9K/F_4
ROM_SI
QCI P/N
AKD5PGWT500
7
+3V_GFX +3V_GFX
19
R606
*EV@10K/F_4
R626
*EV@45.3K/F_4
R618
*EV@30.1K/F_4
R623
*EV@15K/F_4
1 2
R605
*EV@10K/F_4
R625
*EV@4.99K/F_4
R608
*EV@10K/F_4
R628
*EV@45.3K/F_4
4.99k CS24992FB26
10k CS31002FB26
15k CS31502FB24
20k CS32002FB29
24.9k CS32492FB16
30.1k CS33012FB18
34.8k CS33482FB06
45.3k CS34532FB18
only ROM_SI
strap0~3
Logical Strap Bit Mapping
PU-VDD PD
4.99K
24.9K
30.1K
34.8K
45.3K
AKD5PZSTL01
AKD5PGWTW08
AKD5PGWT501 AKD5PGWT502
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
1000 0000
10K
1001 0001
15K
20K
1011 0011
1100
1101
1110 0110
1111
QBC
Saturday, November 15, 2014
Saturday, November 15, 2014
Saturday, November 15, 2014
7
0010 1010
0100
0101
0111
TOP B/S
AKD5PZSTL00
AKD5PGWTW07
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
N15S-GT (GPIO/STRAPS)
N15S-GT (GPIO/STRAPS)
N15S-GT (GPIO/STRAPS)
8
Z8C
Z8C
Z8C
19 48
19 48
19 48
8
3A
3A
3A
5
VREFC_VMA1 21
VREFD_VMA1 21
FBA_CMD7 17,21,22,23
FBA_CMD10 17,21,22,23
FBA_CMD24 17,21,22,23
FBA_CMD6 17,21,22,23
FBA_CMD22 17,21,22,23
FBA_CMD26 17,21,22,23
FBA_CMD5 17,21,22,23
FBA_CMD21 17,21,22,23
D D
C C
B B
FBA_CMD8 17,21,22,23
FBA_CMD4 17,21,22,23
FBA_CMD25 17,21,22,23
FBA_CMD23 17,21,22,23
FBA_CMD9 17,21,22,23
FBA_CMD12 17,21,22,23
FBA_CMD14 17,21,22,23
FBA_CMD29 17,21,22,23
FBA_CMD13 17,21,22,23
FBA_CMD27 17,22
VMA_CLK0 17,21
VMA_CLK0# 17,21
FBA_CMD3 17,21
FBA_CMD0 17,21
FBA_CMD2 17
FBA_CMD11 17,21,22,23
FBA_CMD15 17,21,22,23
FBA_CMD28 17,21,22,23
VMA_WDQS1 17,21
VMA_RDQS1 17,21
VMA_DM1 17,21
VMA_DM2 17,21
VMA_WDQS2 17,21
VMA_RDQS2 17,21
FBA_CMD20 17,21,22,23
GND
VREFC_VMA1
VREFD_VMA1
FBA_ZQ0
R562 EV@243_4
U44
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
EV@VRAM _DDR3_HYNIX_256MX16
96-BALL
SDRAM DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
GND
B9
D1
D8
E2
E8
F9
G1
G9
4
+1.35V_GFX
+1.35V_GFX
VMA_DQ11 17,21
VMA_DQ13 17,21
VMA_DQ8 17,21
VMA_DQ15 17,21
VMA_DQ10 17,21
VMA_DQ14 17,21
VMA_DQ9 17,21
VMA_DQ12 17,21
VMA_DQ17 17,21
VMA_DQ22 17,21
VMA_DQ16 17,21
VMA_DQ23 17,21
VMA_DQ19 17,21
VMA_DQ21 17,21
VMA_DQ18 17,21
VMA_DQ20 17,21
C643 EV@4.7U/6.3V_6
C645 EV@0.1U/10V_4
C642 EV@0.1U/10V_4
C55 EV@4.7U/6.3V_6
C641 EV@0.1U/10V_4
C639 EV@0.1U/10V_4
GND
GND
+1.35V_GFX
C524 EV@1U/6.3V_4
C592 EV@1U/6.3V_4
C582 EV@1U/6.3V_4
C603 EV@1U/6.3V_4
3
HYU 256Mx16, H5TC4G63AFR-11C QBC PN
MIC 256Mx16, MT41J256M16HA-093G:E QBC PN
SAM 256Mx16, K4W4G1646D-BC1A QBC PN
162_1% ohm CS11622FB07 RES CHIP 162 1/16W +-1%(0402)
CS11622FB15 RES CHIP 162 1/16W +-1%(0402)
VMA_CLK0
VMA_CLK0#
+1.35V_GFX +1.35V_GFX
R563
EV@1.33K/F_4
VREFC_VMA1 VREFD_VMA1
R564
EV@1.33K/F_4
C649
EV@0.01U/25V_4
+1.35V_GFX
R87
EV@162_4
R122
EV@1.33K/F_4
R123
EV@1.33K/F_4
C573 EV@1U/6.3V_4
C68 EV@1U/6.3V_4
C596 EV@1U/6.3V_4
C628 EV@1U/6.3V_4
C200
EV@0.01U/25V_4
+1.35V_GFX
VMA_WDQS0 17,21
VMA_RDQS0 17,21
VMA_DM0 17,21
VMA_DM3 17,21
VMA_WDQS3 17,21
VMA_RDQS3 17,21
GND
C604 EV@10U/6.3V_6
C644 EV@10U/6.3V_6
C608 EV@10U/6.3V_6
C646 EV@0.1U/10V_4
C45 EV@0.1U/10V_4
C201 EV@0.1U/10V_4
C76 EV@0.1U/10V_4
C577 EV@0.1U/10V_4
C580 EV@0.1U/10V_4
VREFC_VMA1
VREFD_VMA1
FBA_CMD7
FBA_CMD10
FBA_CMD24
FBA_CMD6
FBA_CMD22
FBA_CMD26
FBA_CMD5
FBA_CMD21
FBA_CMD8
FBA_CMD4
FBA_CMD25
FBA_CMD23
FBA_CMD9
FBA_CMD12
FBA_CMD14
FBA_CMD29
FBA_CMD13
FBA_CMD27
VMA_CLK0
VMA_CLK0#
FBA_CMD3
FBA_CMD0
FBA_CMD2
FBA_CMD11
FBA_CMD15
FBA_CMD28
FBA_CMD20
R498 EV@243_4
2
AKD5PGWTW08---TOP B/S PN : AKD5PGWTW07
AKD5PZSTL01---TOP B/S PN : AKD5PZSTL00
AKD5PGWT501---TOP B/S PN : AKD5PGWT502
FBA_ZQ1
U41
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
96-BALL
SDRAM DDR3
EV@VRAM _DDR3_HYNIX_256MX16
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
GND
+1.35V_GFX
+1.35V_GFX
1
VMA_DQ5 17,21
VMA_DQ1 17,21
VMA_DQ7 17,21
VMA_DQ0 17,21
VMA_DQ4 17,21
VMA_DQ3 17,21
VMA_DQ6 17,21
VMA_DQ2 17,21
VMA_DQ31 17,21
VMA_DQ25 17,21
VMA_DQ30 17,21
VMA_DQ24 17,21
VMA_DQ29 17,21
VMA_DQ27 17,21
VMA_DQ28 17,21
VMA_DQ26 17,21
C591 EV@4.7U/6.3V_6
C579 EV@0.1U/10V_4
C578 EV@0.1U/10V_4
C207 EV@4.7U/6.3V_6
C130 EV@0.1U/10V_4
C145 EV@0.1U/10V_4
20
GND
GND
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
5
4
3
2
Saturday, November 15, 2014
PROJECT :
DDR3L - RANK0
DDR3L - RANK0
DDR3L - RANK0
Z8C
Z8C
Z8C
3A
3A
20 48
20 48
1
20 48
3A
5
4
3
2
1
U16
FBA_ZQ2
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
96-BALL
SDRAM DDR3
EV@VRAM _DDR3_HYNIX_256MX16
VREFC_VMA1 20
VREFD_VMA1 20
FBA_CMD9 17,20,22,23
FBA_CMD24 17,20,22,23
FBA_CMD10 17,20,22,23
FBA_CMD13 17,20,22,23
FBA_CMD26 17,20,22,23
FBA_CMD22 17,20,22,23
D D
C C
B B
FBA_CMD21 17,20,22,23
FBA_CMD5 17,20,22,23
FBA_CMD8 17,20,22,23
FBA_CMD23 17,20,22,23
FBA_CMD28 17,20,22,23
FBA_CMD4 17,20,22,23
FBA_CMD7 17,20,22,23
FBA_CMD14 17,20,22,23
FBA_CMD12 17,20,22,23
FBA_CMD29 17,20,22,23
FBA_CMD6 17,20,22,23
FBA_CMD30 17,23
VMA_CLK0 17,20
VMA_CLK0# 17,20
FBA_CMD3 17,20
FBA_CMD0 17,20
FBA_CMD1 17
FBA_CMD11 17,20,22,23
FBA_CMD15 17,20,22,23
FBA_CMD25 17,20,22,23
VMA_WDQS1 17,20
VMA_RDQS1 17,20
VMA_DM1 17,20
VMA_DM2 17,20
VMA_WDQS2 17,20
VMA_RDQS2 17,20
FBA_CMD20
GND
VREFC_VMA1
VREFD_VMA1
R121 EV@243_4
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
+1.35V_GFX
+1.35V_GFX
GND
VMA_DQ13 17,20
VMA_DQ11 17,20
VMA_DQ15 17,20
VMA_DQ8 17,20
VMA_DQ12 17,20
VMA_DQ9 17,20
VMA_DQ14 17,20
VMA_DQ10 17,20
VMA_DQ22 17,20
VMA_DQ17 17,20
VMA_DQ23 17,20
VMA_DQ16 17,20
VMA_DQ20 17,20
VMA_DQ18 17,20
VMA_DQ21 17,20
VMA_DQ19 17,20
C155 EV@4.7U/6.3V_6
C189 EV@0.1U/10V_4
C172 EV@0.1U/10V_4
C640 EV@4.7U/6.3V_6
C69 EV@0.1U/10V_4
C629 EV@0.1U/10V_4
GND
GND
+1.35V_GFX
C64 EV@1U/6.3V_4
C204 EV@1U/6.3V_4
+1.35V_GFX
HYU 256Mx16, H5TC4G63AFR-11C QBC PN
MIC 256Mx16, MT41J256M16HA-093G:E QBC PN
SAM 256Mx16, K4W4G1646D-BC1A QBC PN
VMA_WDQS0 17,20
VMA_RDQS0 17,20
VMA_DM0 17,20
VMA_DM3 17,20
VMA_WDQS3 17,20
VMA_RDQS3 17,20
GND
+1.35V_GFX
C83 EV@1U/6.3V_4
C86 EV@1U/6.3V_4 C65 EV@1U/6.3V_4
C208 EV@1U/6.3V_4
C152 EV@1U/6.3V_4
VREFC_VMA1
VREFD_VMA1
FBA_CMD9
FBA_CMD24
FBA_CMD10
FBA_CMD13
FBA_CMD26
FBA_CMD22
FBA_CMD21
FBA_CMD5
FBA_CMD8
FBA_CMD23
FBA_CMD28
FBA_CMD4
FBA_CMD7
FBA_CMD14
FBA_CMD12
FBA_CMD29
FBA_CMD6
FBA_CMD30
VMA_CLK0
VMA_CLK0#
FBA_CMD3
FBA_CMD0
FBA_CMD1
FBA_CMD11
FBA_CMD15
FBA_CMD25
FBA_CMD20
R62 EV@243_4
C162 EV@10U/6.3V_6
C78 EV@10U/6.3V_6
C88 EV@10U/6.3V_6
C121 EV@0.1U/10V_4
C120 EV@0.1U/10V_4
C203 EV@0.1U/10V_4
C199 EV@0.1U/10V_4
C648 EV@0.1U/10V_4 C198 EV@1U/6.3V_4
C647 EV@0.1U/10V_4
AKD5PGWTW08---TOP B/S PN : AKD5PGWTW07
AKD5PZSTL01---TOP B/S PN : AKD5PZSTL00
AKD5PGWT501---TOP B/S PN : AKD5PGWT502
FBA_ZQ3
U13
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
96-BALL
SDRAM DDR3
EV@VRAM _DDR3_HYNIX_256MX16
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
GND
+1.35V_GFX
+1.35V_GFX
VMA_DQ1 17,20
VMA_DQ5 17,20
VMA_DQ0 17,20
VMA_DQ7 17,20
VMA_DQ2 17,20
VMA_DQ6 17,20
VMA_DQ3 17,20
VMA_DQ4 17,20
VMA_DQ25 17,20
VMA_DQ31 17,20
VMA_DQ24 17,20
VMA_DQ30 17,20
VMA_DQ26 17,20
VMA_DQ28 17,20
VMA_DQ27 17,20
VMA_DQ29 17,20
C654 EV@4.7U/6.3V_6
C66 EV@0.1U/10V_4
C67 EV@0.1U/10V_4
C92 EV@4.7U/6.3V_6
C583 EV@0.1U/10V_4
C81 EV@0.1U/10V_4
21
GND
GND
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
5
4
3
2
Saturday, November 15, 2014
PROJECT :
DDR3L - RANK0
DDR3L - RANK0
DDR3L - RANK0
Z8C
Z8C
Z8C
3A
3A
21 48
21 48
1
21 48
3A
5
4
3
2
1
U39
FBA_ZQ4
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
96-BALL
SDRAM DDR3
EV@VRAM _DDR3_HYNIX_256MX16
VREFC_VMA3 23
VREFD_VMA3 23
FBA_CMD7 17,20,21,23
FBA_CMD10 17,20,21,23
FBA_CMD24 17,20,21,23
FBA_CMD6 17,20,21,23
FBA_CMD22 17,20,21,23
FBA_CMD26 17,20,21,23
D D
C C
B B
FBA_CMD5 17,20,21,23
FBA_CMD21 17,20,21,23
FBA_CMD8 17,20,21,23
FBA_CMD4 17,20,21,23
FBA_CMD25 17,20,21,23
FBA_CMD23 17,20,21,23
FBA_CMD9 17,20,21,23
FBA_CMD12 17,20,21,23
FBA_CMD14 17,20,21,23
FBA_CMD29 17,20,21,23
FBA_CMD13 17,20,21,23
FBA_CMD27 17,20
VMA_CLK1 17,23
VMA_CLK1# 17,23
FBA_CMD19 17,23
FBA_CMD16 17,23
FBA_CMD18 17
FBA_CMD11 17,20,21,23
FBA_CMD15 17,20,21,23
FBA_CMD28 17,20,21,23
VMA_WDQS4 17,23
VMA_RDQS4 17,23
VMA_DM4 17,23
VMA_DM7 17,23
VMA_WDQS7 17,23
VMA_RDQS7 17,23
FBA_CMD20
GND
VREFC_VMA3
VREFD_VMA3
R466 EV@243_4
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
+1.35V_GFX
+1.35V_GFX
GND
VMA_DQ34 17,23
VMA_DQ38 17,23
VMA_DQ35 17,23
VMA_DQ39 17,23
VMA_DQ32 17,23
VMA_DQ36 17,23
VMA_DQ33 17,23
VMA_DQ37 17,23
VMA_DQ59 17,23
VMA_DQ62 17,23
VMA_DQ58 17,23
VMA_DQ63 17,23
VMA_DQ57 17,23
VMA_DQ60 17,23
VMA_DQ56 17,23
VMA_DQ61 17,23
C576 EV@4.7U/6.3V_6
C581 EV@0.1U/10V_4
C609 EV@0.1U/10V_4
C571 EV@4.7U/6.3V_6
C653 EV@0.1U/10V_4
C652 EV@0.1U/10V_4
GND
GND
162_1% ohm CS11622FB07 RES CHIP 162 1/16W +-1%(0402)
CS11622FB15 RES CHIP 162 1/16W +-1%(0402)
VMA_CLK1
VMA_CLK1#
+1.35V_GFX +1.35V_GFX
R28
EV@1.33K/F_4
VREFC_VMA3 VREFD_VMA3
R30
EV@1.33K/F_4
C48
EV@0.01U/25V_4
HYU 256Mx16, H5TC4G63AFR-11C QBC PN
MIC 256Mx16, MT41J256M16HA-093G:E QBC PN
SAM 256Mx16, K4W4G1646D-BC1A QBC PN
R68
EV@162_4
R461
EV@1.33K/F_4
R465
EV@1.33K/F_4
C569
EV@0.01U/25V_4
VMA_WDQS5 17,23
VMA_RDQS5 17,23
VMA_DM5 17,23
VMA_DM6 17,23
VMA_WDQS6 17,23
VMA_RDQS6 17,23
GND
AKD5PGWTW08---TOP B/S PN : AKD5PGWTW07
AKD5PZSTL01---TOP B/S PN : AKD5PZSTL00
AKD5PGWT501---TOP B/S PN : AKD5PGWT502
VREFC_VMA3
VREFD_VMA3
FBA_CMD7
FBA_CMD10
FBA_CMD24
FBA_CMD6
FBA_CMD22
FBA_CMD26
FBA_CMD5
FBA_CMD21
FBA_CMD8
FBA_CMD4
FBA_CMD25
FBA_CMD23
FBA_CMD9
FBA_CMD12
FBA_CMD14
FBA_CMD29
FBA_CMD13
FBA_CMD27
VMA_CLK1
VMA_CLK1#
FBA_CMD19
FBA_CMD16
FBA_CMD18
FBA_CMD11
FBA_CMD15
FBA_CMD28
FBA_CMD20
FBA_ZQ5
R8 EV@243_4
U38
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
EV@VRAM _DDR3_HYNIX_256MX16
96-BALL
SDRAM DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
22
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
+1.35V_GFX
+1.35V_GFX
GND
VMA_DQ44 17,23
VMA_DQ43 17,23
VMA_DQ45 17,23
VMA_DQ40 17,23
VMA_DQ47 17,23
VMA_DQ42 17,23
VMA_DQ46 17,23
VMA_DQ41 17,23
VMA_DQ52 17,23
VMA_DQ50 17,23
VMA_DQ55 17,23
VMA_DQ51 17,23
VMA_DQ53 17,23
VMA_DQ48 17,23
VMA_DQ54 17,23
VMA_DQ49 17,23
C530 EV@4.7U/6.3V_6
C550 EV@0.1U/10V_4
C548 EV@0.1U/10V_4
C546 EV@4.7U/6.3V_6
C525 EV@0.1U/10V_4
C534 EV@0.1U/10V_4
GND
GND
+1.35V_GFX
FOR EMI Request
+1.35V_GFX
C19 *EV@120P/50V_4
C24 *EV@120P/50V_4
C42 *EV@120P/50V_4
C529 *EV@120P/50V_4
C536 *EV@120P/50V_4
C601 *EV@120P/50V_4
C202 *EV@120P/50V_4
C655 *EV@120P/50V_4
A A
5
4
+1.35V_GFX
C527 EV@1U/6.3V_4
C79 EV@1U/6.3V_4
C533 EV@1U/6.3V_4
C532 EV@1U/6.3V_4 C531 EV@1U/6.3V_4
+1.35V_GFX
C610 EV@1U/6.3V_4
C620 EV@1U/6.3V_4
C535 EV@1U/6.3V_4
3
C541 EV@10U/6.3V_6
C15 EV@10U/6.3V_6
C540 EV@10U/6.3V_6
C545 EV@0.1U/10V_4
C650 EV@0.1U/10V_4
C651 EV@0.1U/10V_4
C538 EV@0.1U/10V_4
C537 EV@0.1U/10V_4
C539 EV@0.1U/10V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
2
Saturday, November 15, 2014
PROJECT :
DDR3L - RANK0
DDR3L - RANK0
DDR3L - RANK0
Z8C
Z8C
Z8C
3A
3A
22 48
22 48
1
22 48
3A
5
U12
VREFC_VMA3 22
VREFD_VMA3 22
FBA_CMD9 17,20,21,22
FBA_CMD24 17,20,21,22
FBA_CMD10 17,20,21,22
FBA_CMD13 17,20,21,22
FBA_CMD26 17,20,21,22
FBA_CMD22 17,20,21,22
FBA_CMD21 17,20,21,22
D D
C C
B B
FBA_CMD5 17,20,21,22
FBA_CMD8 17,20,21,22
FBA_CMD23 17,20,21,22
FBA_CMD28 17,20,21,22
FBA_CMD4 17,20,21,22
FBA_CMD7 17,20,21,22
FBA_CMD14 17,20,21,22
FBA_CMD12 17,20,21,22
FBA_CMD29 17,20,21,22
FBA_CMD6 17,20,21,22
FBA_CMD30 17,21
VMA_CLK1 17,22
VMA_CLK1# 17,22
FBA_CMD19 17,22
FBA_CMD16 17,22
FBA_CMD17 17
FBA_CMD11 17,20,21,22
FBA_CMD15 17,20,21,22
FBA_CMD25 17,20,21,22
VMA_WDQS4 17,22
VMA_RDQS4 17,22
VMA_DM4 17,22
VMA_DM7 17,22
VMA_WDQS7 17,22
VMA_RDQS7 17,22
FBA_CMD20
GND
VREFC_VMA3
VREFD_VMA3
FBA_ZQ6
R46 EV@243_4
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
96-BALL
SDRAM DDR3
EV@VRAM _DDR3_HYNIX_256MX16
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
GND
B9
D1
D8
E2
E8
F9
G1
G9
+1.35V_GFX
+1.35V_GFX
4
VMA_DQ38 17,22
VMA_DQ34 17,22
VMA_DQ39 17,22
VMA_DQ35 17,22
VMA_DQ37 17,22
VMA_DQ33 17,22
VMA_DQ36 17,22
VMA_DQ32 17,22
VMA_DQ62 17,22
VMA_DQ59 17,22
VMA_DQ63 17,22
VMA_DQ58 17,22
VMA_DQ61 17,22
VMA_DQ56 17,22
VMA_DQ60 17,22
VMA_DQ57 17,22
C108 EV@4.7U/6.3V_6
C197 EV@0.1U/10V_4
C107 EV@0.1U/10V_4
C73 EV@4.7U/6.3V_6
C11 EV@0.1U/10V_4
C101 EV@0.1U/10V_4
GND
GND
+1.35V_GFX
C46 EV@1U/6.3V_4
C27 EV@1U/6.3V_4
C526 EV@1U/6.3V_4
C13 EV@1U/6.3V_4
3
+1.35V_GFX
C98 EV@1U/6.3V_4
C56 EV@1U/6.3V_4
C18 EV@1U/6.3V_4
HYU 256Mx16, H5TC4G63AFR-11C QBC PN
MIC 256Mx16, MT41J256M16HA-093G:E QBC PN
SAM 256Mx16, K4W4G1646D-BC1A QBC PN
VREFC_VMA3
VREFD_VMA3
FBA_CMD9
FBA_CMD24
FBA_CMD10
FBA_CMD13
FBA_CMD26
FBA_CMD22
FBA_CMD21
FBA_CMD5
FBA_CMD8
FBA_CMD23
FBA_CMD28
FBA_CMD4
FBA_CMD7
FBA_CMD14
FBA_CMD12
FBA_CMD29
FBA_CMD6
FBA_CMD30
VMA_CLK1
VMA_CLK1#
FBA_CMD19
FBA_CMD16
FBA_CMD17
FBA_CMD11
FBA_CMD15
FBA_CMD25
VMA_WDQS5 17,22
VMA_RDQS5 17,22
VMA_DM5 17,22
VMA_DM6 17,22
VMA_WDQS6 17,22
VMA_RDQS6 17,22
FBA_CMD20
GND
+1.35V_GFX
C21 EV@10U/6.3V_6
C22 EV@10U/6.3V_6
C139 EV@10U/6.3V_6
C26 EV@0.1U/10V_4
C25 EV@0.1U/10V_4
C17 EV@0.1U/10V_4
C37 EV@0.1U/10V_4
C10 EV@0.1U/10V_4 C20 EV@1U/6.3V_4
C23 EV@0.1U/10V_4
R43 EV@243_4
2
AKD5PGWTW08---TOP B/S PN : AKD5PGWTW07
AKD5PZSTL01---TOP B/S PN : AKD5PZSTL00
AKD5PGWT501---TOP B/S PN : AKD5PGWT502
FBA_ZQ7
U11
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
G3
DQSL
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
96-BALL
SDRAM DDR3
EV@VRAM _DDR3_HYNIX_256MX16
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
GND
+1.35V_GFX
+1.35V_GFX
1
VMA_DQ43 17,22
VMA_DQ44 17,22
VMA_DQ40 17,22
VMA_DQ45 17,22
VMA_DQ41 17,22
VMA_DQ46 17,22
VMA_DQ42 17,22
VMA_DQ47 17,22
VMA_DQ50 17,22
VMA_DQ52 17,22
VMA_DQ51 17,22
VMA_DQ55 17,22
VMA_DQ49 17,22
VMA_DQ54 17,22
VMA_DQ48 17,22
VMA_DQ53 17,22
C542 EV@4.7U/6.3V_6
C563 EV@0.1U/10V_4
C32 EV@0.1U/10V_4
C16 EV@4.7U/6.3V_6
C587 EV@0.1U/10V_4
C12 EV@0.1U/10V_4
23
GND
GND
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
5
4
3
2
Saturday, November 15, 2014
PROJECT :
DDR3L - RANK1
DDR3L - RANK1
DDR3L - RANK1
Z8C
Z8C
Z8C
3A
3A
23 48
23 48
1
23 48
3A
1
CRT
1C-1 2014/01/10 Remove U29 and add U40 and U41.
U5
1
OE#
A A
HSYNC CRTHSYNC
VSYNC CRTVSYNC
2
A
3
GND
M74VHC1GT125DF2G
U6
1
OE#
2
A
3
GND
M74VHC1GT125DF2G
VCC
VCC
2
+5V
C14
5
4
Y
5
4
Y
0.1u/10V_4
+5V
C41
0.1u/10V_4
3
CRT_RED CRT_11
CRT_BLU
R11
75/F_4
4
C38
R13
R12
75/F_4
75/F_4
5.6p/16V_4
U3
CRTHSYNC CRTHSYNC
CRTVSYNC CRTVSYNC
DDCCLK
DDCDAT DDCDAT
1
2
3
4
5
*RClamp0524P
U2
1
CRT_R1 CRT_R1
2
CRT_G1
3
4
5
*RClamp0524P
+5V
1
2
GND_3/8
4
5
1
2
GND_3/8
4
5
C39
5.6p/16V_4
3
AP2331SA-7
10
9
7
6
10
9
7
6
Q36
IN
L2 BLM15BB470SN1D
L3 BLM15BB470SN1D
L4 BLM15BB470SN1D
C40
5.6p/16V_4
10
9
7
6
10
9
7
6
5
1
OUT
2
GND
C30
5.6p/16V_4
CRTVDD5 CRTVDD5
DDCCLK
CRT_G1
CRT_B1 CRT_B1
C543 *0.1u/10V_4
CRTVDD5
CRT_R1
CRT_G1
CRT_B1 CRTHSYNC
C29
C28
5.6p/16V_4
5.6p/16V_4
C36 *0.22u/6.3V_4
C547 *220p/50V_4
C31 0.1u/10V_4
C34 10p/50V_4
C33 10p/50V_4
C35 *10p/50V_4
C544 *10p/50V_4
6
7
2
8
3
9
4
10
5
6
16 17
CRTVDD5
CRTVSYNC
CRTHSYNC
DDCCLK
DDCDAT
CN3
CRT CONN
7
11 1
12
13
14
15
DDCDAT CRT_GRE
CRTVSYNC
DDCCLK
TP1
Power trace tracking
DDCDAT
DDCCLK
R448 2.2K_4
R3 2.2K_4
+3V 2,5,7,8,9,10,11,13,14,15,16,17,18,25,26,27,28,29,30,31,33,34,35,37,38,39,40,41,42,43
+5V 25,26,28,30,31,34,37,41
8
CRTVDD5
DP TO VGA
1A-1 2013/10/15 Change VGA ITE soltion to NXP.
B B
C C
D D
1A-5 2013/10/18 Change VGA NXP soltion to ITE.
+3V
CRT_AUXP
R482 *1M_4
CRT_AUXN
R476 *1M_4
IVDDO
30mils
L9 80ohm@100MHz
C80
10u/6.3V_6
1
C75
1u/6.3V_4
2
IVDDO_18
+5VMCU
1B-1
CRT_AUXP 2
CRT_AUXN 2
20mils
L28 80ohm@100MHz
15mils
20131108 Change +5V to +5VMCU.
+3V
L25 80ohm@100MHz
L29 80ohm@100MHz
1C1-2
link L29 to +3V directly
(meet IVDDO vs OVDD sequence)
CRT_HPD 2
R475 2.2K_4
R481 2.2K_4
C600 0.1u/10V_4
C599 0.1u/10V_4
C598 0.1u/10V_4
C597 0.1u/10V_4
C575 0.1u/10V_4
C574 0.1u/10V_4
RX_DVDD18
3
1B-1
CRT_TXP0 2
CRT_TXN0 2
CRT_TXP1 2
CRT_TXN1 2
C585
4.7u/6.3V_6
C565
C567
0.1u/10V_4
1u/6.3V_4
C589
10u/6.3V_6
ISPSCL
ISPSDA
U40
10mils
10mils
R489 10K_4
40
HPD
26
RX0P
27
RX0N
29
RX1P
30
RX1N
20
RXAUXP
19
RXAUXN
18
DCAUXP
17
DCAUXN
25
AVCC
31
AVCC
22
PVCC
24
DVDD18
32
ASPVCC
43
PCSDA
42
PCSCL
4
CRT_HPD
CRT_TXP0_C
CRT_TXN0_C
CRT_TXP1_C
CRT_TXN1_C
CRT_AUXP_C CRT_AUXP
CRT_AUXN_C CRT_AUXN
10mils
C72 0.1u/10V_4
C61 0.1u/10V_4
C588 0.1u/10V_4
10mils
C71 0.1u/10V_4
+5VMCU
20131108 Change TP to +5VMCU and 10kohm.
C564
0.1u/10V_4
15mils
1
2
DDCSCL
37
DDCSDA
PWDNB
20mils
IVDDO
13
48
36
39
OVDD
OVDD
IVDDO38IVDDO
IVDD3335IVDD33
IT6513FN
12
GND
49
46
44
IVDD
IVDD14IVDD
IVDD
NC/VGADETECT
IT6513N-QFN-48
5
C561
0.1u/10V_4
MCUVDDH
MCURSTN
URDBG
ISPSCL
ISPSDA
VGADDCCLK
VGADDCSDA
VSYNC
HSYNC
VDDC
IORP
IOGP
IOBP
RSET
VDDA
COMP
XTALIN
XTALOUT
20mils
45
47
28
15
16
23
21
3
4
10
11
9
8
41
5
7
6
34
33
C570
0.1u/10V_4
+5VMCU
URDBG
ISPSCL
R467 22/J_4
ISPSDA
R472 22/J_4
R488 22/J_4
R483 22/J_4
VGA_RST
VGA_COMP
27M_CRT_IN
27M_CRT_OUT
RX_DVDD18
C568
0.1u/10V_4
VSYNC
HSYNC
C53
0.1u/10V_4
CRT_RED
CRT_GRE
CRT_BLU
C562
0.1u/10V_4
TP103
*10p/50V_4
20mils
DDCCLK
DDCDAT
DDCCLK
DDCDAT
DAC_VDDC
C52
0.1u/10V_4
R459 100/F_4
C551
0.1u/10V_4
C594
6
TP105
0.1u/10V_4
TP104
1 3
2 4
*27MHZ
L2780ohm@100MHz
C54
DAC_VDDC
Y2
+5V
20mils
C593
*10p/50V_4
20mils
L880ohm@100MHz
IVDDO_18
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
PROJECT :
CRT/DP TO VGA IC
CRT/DP TO VGA IC
CRT/DP TO VGA IC
Z8C
Z8C
Z8C
8
1A
1A
24 48 Saturday, November 15, 2014
24 48 Saturday, November 15, 2014
24 48 Saturday, November 15, 2014
1A
1
eDP Power
C662
A A
PCH_VDDEN 2
1u/6.3V_4
R217 *SHORT_4
+3V
R216
100K_4
Backlight Control
B B
PCH_BLON 2
PCH_BLON_EC 35
Follow ZQ0
C C
R193 0_4
Lid Switch (HSR)(move to USB/B)
D D
1
U46
6
IN
4
IN
3
ON/OFF
G5243AT11U
R191
100K_4
Q18
2N7002DW
2
1
OUT
2
GND
5
GND
+3V
R192
R190
10K_4 R669 100K_4
10K_4
BL#
2
5
4 3
BL_ON
6
1
3
LCDVCC_1
C287
*0.1u/10V_4
LID#,EC intrnal PU
2 1
D5 RB500V-40
2
Q16
DTC144EU
1 3
R229 *SHORT_8
*2.2u/6.3V_6
4
LCDVCC
C675
C676
0.01u/16V_4
0.1u/10V_4 R230 *TPL@0_6
C286
22u/6.3V_8
MP confirm 2 or 4 Lane
LID# 32,35
EC_FPBACK# 35
Touch Panel
EDP_TXP3_C EDP_TXN3_C EDP_TXP2_C EDP_TXN2_C
C278
*5.6p/16V_4
5
C279
*5.6p/16V_4
eDP
CCD
COLOR_ENG 35
PCH_BRIGHT 2
USBP5+ 9
USBP5- 9
C280
*5.6p/16V_4
USBP6+ 9
USBP6- 9
EDP_TXP3 2
EDP_TXN3 2
EDP_TXP2 2
EDP_TXN2 2
EDP_TXP1 2
EDP_TXN1 2
EDP_TXP0 2
EDP_TXN0 2
EDP_AUXP 2
EDP_AUXN 2
C281
*5.6p/16V_4
6
eDP
R671 *SHORT_4
C674 0.1u/10V_4
R672 *100K_4
C666 0.1u/10V_4
C667 0.1u/10V_4
C668 0.1u/10V_4
C669 0.1u/10V_4
C670 0.1u/10V_4
C671 0.1u/10V_4
C672 0.1u/10V_4
C673 0.1u/10V_4
C680 0.1u/10V_4
C681 0.1u/10V_4
R685 *SHORT_4
R682 *SHORT_4
R675 *0_4
R667 *0_4
VIN
LCDVCC
+3V
+5V
FingerPrint Conn
+3V
C766
0.1u/10V_4
USBP7+ 9
USBP7- 9
2
3
CN17
1
7
2
8
3
4
5
6
FingerPrint/B
4
EDP_TXP1_C EDP_TXN1_C EDP_TXP0_C EDP_TXN0_C
C282
*5.6p/16V_4
C283
*5.6p/16V_4
C284
*5.6p/16V_4
C285
*5.6p/16V_4
Touch Panel interrupt
TP_INT_PCH 10
5
+3V
2
3
Q17
*TPL@2N7002K
R188 *TSI@0_4
1
6
R205 *SHORT_6
R200 *SHORT_6
R186 *SHORT_6 C663
R670 *0_4
EDP_HPD 2
R668 100K_4
+3V
GPIO8 10
C258
C259
4.7u/25V_8
1000p/50V_4
R187
*TPL@10K_4
TP_INT
7
LCD_VIN
LCDVCC
CCD_PWR
LVDS_BRIGHT
BL_ON
EDP_TXP3_C
EDP_TXN3_C
EDP_TXP2_C
EDP_TXN2_C
EDP_TXP1_C
EDP_TXN1_C
EDP_TXP0_C
EDP_TXN0_C
EDP_AUXP_C
EDP_AUXN_C
EDP_HPD
USBP6+_R
USBP6-_R
USBP5+_R
USBP5-_R
TP_GND
R194
TPL@0_6
Reserve for GND noise
TP_INT
CCD_PWR VIN TP_PWR
C262
*10p/50V_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
CN7
G_5
40
39
38
37
36
35
34
33
TP_PWR
32
G_4
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
G_1
9
8
7
6
5
4
3
2
1
G_0
50398-04071-001
Inform BIOS that it is touch panel or not
C261
1000p/50V_4
C274
*TPL@10p/50V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
eDP/CAMERA/FP
eDP/CAMERA/FP
eDP/CAMERA/FP
Z8C
Z8C
Z8C
25 48 Saturday, November 15, 2014
25 48 Saturday, November 15, 2014
25 48 Saturday, November 15, 2014
8
25
C277
*TPL@1000p/50V_4
8
3A
3A
3A
5
4
3
2
1
HDMI Cost Reduced level shift (HDM) HDMI connector (HDM)
CN2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
C43
*1000p/50V_4
D2+
D2 Shield
D2D1+
D1 Shield
D1D0+
D0 Shield
D0CK+
CK Shield
CKCE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET
ABA-HDM-022-P05
1 2
R25
470_4
INT_HDMITX2N_C
INT_HDMITX2P_C
INT_HDMITX1N_C
INT_HDMITX1P_C
1 2
1 2
R19
R20
470_4
470_4
1 2
1 2
R23
R24
470_4
470_4
1 2
1 2
R22
R21
470_4
470_4
+5V
Q37
3
IN
AP2331SA-7
OUT
GND
1
2
C549
*220p/50V_4
D27
*14V/100p_4
INT_HDMITX2N 2
INT_HDMITX2P 2
INT_HDMITX1N 2
INT_HDMITX1P 2
D D
INT_HDMITX0N 2
INT_HDMITX0P 2
INT_HDMICLK+ 2
INT_HDMICLK- 2
Layout Notes:
Place decoupling CAPs close to Connector
C C
C556 0.1u/10V_4
C555 0.1u/10V_4
C558 0.1u/10V_4
C557 0.1u/10V_4
C554 0.1u/10V_4
C553 0.1u/10V_4
C559 0.1u/10V_4
C560 0.1u/10V_4
*100K/F_4
+3V
R40
INT_HDMITX0N_C
INT_HDMITX0P_C
INT_HDMICLK+_C
INT_HDMICLK-_C
1 2
R26
470_4
3
2
1
Q1
2N7002K
1 2
RV1
*5V/0.2p_4
INT_HDMITX2P_C
INT_HDMITX2N_C
INT_HDMITX1P_C
INT_HDMITX1N_C
INT_HDMITX0P_C
INT_HDMITX0N_C
INT_HDMICLK+_C
INT_HDMICLK-_C
HDMI_DDCCLK_MB
HDMI_DDCDATA_MB
HDMI_5V
R14 *SHORT_4
C44
*1000p/50V_4
HP_DET_CN HDMI_MB_HP
SHELL1
SHELL3
SHELL4
SHELL2
20
22
23
21
26
HDMI DDC (HDM)
+3V
+3V
R60
2.2K_4
R486
2.2K_4
B B
HDMI_DDCCLK_SW 2
A A
HDMI_DDCDATA_SW 2
R57 *SHORT_4
R492 *SHORT_4
5
HDMI_DDCCLK_COM HDMI_DDCCLK_MB
+3V
Q3
2
BSN20
1
+3V
Q38
2
BSN20
1
4
+5V
D2
RB500V-40
R50
3
RB500V-40
3
2.2K_4
Follow CRB 1.0 change to 2.2K
+5V
D28
R474
2.2K_4
Follow CRB 1.0 change to 2.2K
HDMI_DDCDATA_MB HDMI_DDCDATA_COM
EMI (EMC) HDMI-detect (HDM)
INT_HDMITX2P_C
R451 100/F_4
INT_HDMITX2N_C
INT_HDMITX1P_C
R452 100/F_4
INT_HDMITX1N_C
INT_HDMITX0P_C
R450 100/F_4
INT_HDMITX0N_C
INT_HDMICLK+_C
R453 100/F_4
INT_HDMICLK-_C
3
INT_HDMI_HPD 2
2
+3V +3V
R55
1M_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
1
3
HDMI_MB_HP
1 2
Q2
2N7002K
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
HDMI (PS8101)
HDMI (PS8101)
HDMI (PS8101)
1
R37
20K_4
Z8C
Z8C
Z8C
26 48 Saturday, November 15, 2014
26 48 Saturday, November 15, 2014
26 48 Saturday, November 15, 2014
3A
3A
3A
1
WIFI/BT COMBO (NGFF E KEY)
A A
PLTRST#
R694 *0_4
WIGIG_RST# 35
LPC_LAD3 8,28,35
1
LPC_LAD2 8,28,35
LPC_LAD1 8,28,35
LPC_LAD0 8,28,35
+WL_VDD
RF_EN 35
BT_POWERON 35
PCH_WIFI_SUSCLK# 7
Debug
WLAN_OFF_L POWER DOWN LAN CHIP from EC?
WIFI_DISABLE_L disable Antenna from PCH?
B B
C C
D D
PCIERST#
PLTRST# 7,13,16,28,29,35
IOAC_RST# 29,35
PCIERST# 29,35
R700 *10K_4
R707 0_4
R706 *0_4
PDN#
2
WIGIG_PE_waken
WIGIG_PE_CLKREQ
WIGIG_RST
R691 *0_4
R693 *0_4
R695 *0_4
R696 *0_4
RF_EN
R701 *Short_4
R702 *0_4
R704 0_4
R703 *0_4
TP150
TP151
TP152
2
TP148
TP149
PDN#
WLAN_RST
+WL_VDD
+WL_VDD
A_LAD3_R
A_LAD2_R
A_LAD1_R
A_LAD0_R
WLAN_CLK_SCLK
WLAN_CLK_SDATA
PIN56: disable Antenna
PIN54: power down CHIP
BT_LED
WLAN_LED1#
CN12
74
3.3Vaux
72
3.3Vaux
70
NC
68
NFC_ANT_N
66
NFC_ANT_P
64
NFC_VDDANT
62
ALERT
60
I2C_CLK
58
I2C_DATA
56
W_DISABLE#
54
PDN#
52
PERST0#
50
SUSCLK_32KHz
48
LTE_SOUT
46
LTE_SIN
44
NC
42
NFC_WI_IN
40
NFC_SWP2_IO
38
NC
36
UART_CTS
34
UART_RTS
32
UART_Rx
30
KEY
28
KEY
26
KEY
24
KEY
22
UART_Tx
20
UART_Wake
18
GND
16
LED#2
14
PCM_IN
12
PCM_OUT
10
PCM_SYNC
8
PCM_CLK
6
LED#1
4
3.3Vaux
2
3.3Vaux
3
NGFF
SLOT A-SD
3
GND
RESERVED
RESERVED
GND
PETn1
PETp1
GND
PERn1
PERp1
GND
PEWake0#
CLKREQ0#
GND
REFCLKN0
REFCLKP0
GND
PETn0
PETp0
GND
PERn0
PERp0
GND
KEY
KEY
KEY
KEY
SDIO_RESET
SDIO_WAKE
SDIO_DAT3
SDIO_DAT2
SDIO_DAT1
SDIO_DAT0
SDIO_CMD
SDIO_CLK
GND
USB_D-
USB_D+
GND
GND76GND
77
WLAN_NGFF CONN(Type 2230)_51745-0750P-005
PCIE_CLKREQ_WIGIG# 9
75
73
71
69
67
65
63
61
59
57
55
53
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
A_LFRAME#_R
CLK_PCI_LPC_R
WAKE/REQ 53, 55 OD
PCIE_WAKE#_R
CLK_PCIE_WLAN_REQ#_R
WLAN_WAKE#
PCIE_LAN_WAKE#
4
R790 0_4
R791 0_4
R266 0_4
R267 *0_4
20111118 change mose footprint to dual type.
4
R270 *0_4
R275 *0_4
USBP4- 9
USBP4+ 9
S0
S5
CLK_PCIE_WIGIGN 9
CLK_PCIE_WIGIGP 9
LPC_LFRAME# 8,28,35
CLK_PCI_LPC 9
BT
Q22
4 3
1
2N7002DW
R252 *0_4
R248 *0_4
5
WIGIG_RX1-_WLAN 9
WIGIG_RX1+_WLAN 9
WIGIG_TX1-_WLAN 9
WIGIG_TX1+_WLAN 9
CLK_PCIE_WLANN 9
CLK_PCIE_WLANP 9
PCIE_RX4-_WLAN 9
PCIE_RX4+_WLAN 9
PCIE_TX4-_WLAN 9
PCIE_TX4+_WLAN 9
+WL_VDD
+3V_S5
R251
4.7K_4
5
2
6
5
IOAC_WLANPWR# 35
Debug
R269
4.7K_4
WIGIG_PE_CLKREQ
WIGIG_PE_waken
+3VPCU
20120217 reserve R648 PU 100k.
R721 *0_6
+3V
LAYOUT NOTE:
CLOSE TO CONNECTOR
WIGIG
6
1
R741
*100K_4
Q41 AO3413
20111122 change to PMOS
3
2
+3V_WLAN
R713 *SHORT_8
Mini card +3V power disable High
Leakage circuit (MPC)
20111117 change mose footprint to dual type.
PCIE_CLKREQ_WLAN# 9
WLAN_WAKE# 35
PCIE_LAN_WAKE# 7,29
6
R259 0_4
R258 *0_4
20111118 change mose footprint to dual type.
7
Low
Mini card +3V power enable
High
Mini card +3V power disable
+WL_VDD
C701
C714
0.1u/10V_4
10u/6.3V_6
Remove SMBUS for NGFF
20120105 Change power plant for leakage issue.
Q21
S0
4 3
S5
1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Sunday, November 16, 2014
Date: Sheet of
Sunday, November 16, 2014
Date: Sheet of
Sunday, November 16, 2014
7
5
2
6
2N7002DW
R250 *0_4
R246 *0_4
WIFI/BT COMBO (NGFF E KEY)
WIFI/BT COMBO (NGFF E KEY)
WIFI/BT COMBO (NGFF E KEY)
8
27
+WL_VDD
C689
C690
*0.1u/10V_4
*0.1u/10V_4
+WL_VDD
+3V_S5
R245
R265
4.7K_4
4.7K_4
IOAC
CLK_PCIE_WLAN_REQ#_R
PCIE_WAKE#_R
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZRQ
ZRQ
ZRQ
27 48
27 48
27 48
8
3A
3A
3A
1
MAIN SATA HDD (HDD)
CN11
A A
B B
SATA_HDD
1
1
2
SATA_TXP0_C
3
SATA_TXN0_C
4
5
SATA_RXN0_C
6
SATA_RXP0_C
7
8
9
10
11
12
+5V_HDD
13
14
15
16
17
18
19
19
Layout Notes:
Place decoupling CAPs close to Connector
C687 0.01u/16V_4
C686 0.01u/16V_4
C685 0.01u/16V_4
C684 0.01u/16V_4
R289 *0_4
C354
0.01u/16V_4
C361
0.01u/16V_4
DEVSLP0 10
C358
*0.1u/10V_4
SATA_TXP0 8
SATA_TXN0 8
SATA_RXN0 8
SATA_RXP0 8
C338
*0.1u/10V_4
C344
10u/6.3V_6
R708 *SHORT_8
C340
+
*100u/6.3V_3528
LED(UIF)
R44 *1M_4
R45 *1M_4
C C
Power LED
PWRLED# 35
SUSLED# 35
R31 300_4
R32 680_4
+3V_S5
+3VPCU
Blue
3
2
1
4
LED1 POWER LED
Amber
+3V_S5
+3VPCU
2
3
4
TPM
1C-4
2014/01/15 TPM CO-lay nuvoton
+5V
1A-11
2013/10/28 Chan ge U5013.7 from +3V _S5 to +3V.
+3V
R782 TPM@0_4
PLTRST# 7,13,16,27,29,35
R785 *SHORT_4
IRQ_SERIRQ 10,35
1A-11
2013/10/28 U501 3 Pin8,15,28 left N C.
CLKRUN# 7,35
+3V_TPM_VDD
LPC_LAD0 8,27,35
LPC_LAD1 8,27,35
LPC_LAD2 8,27,35
LPC_LAD3 8,27,35
PCLK_TPM 9
LPC_LFRAME# 8,27,35
R780 *TPM@4.7K
+3V_TPM_VDD
1 2
C778
TPM@0.1u/10V_4
C772
TPM@10u/6.3V_4
PCLK_TPM
LPC_LFRAME#
PLTRST#_TPM
R769 *SHORT_4
R787 TPMN@0_4
1 2
R778
*TPMI@4.7K
1 2
1 2
C776
TPM@0.1u/10V_4
U56
26
23
20
17
21
22
16
27
15
7
LAD0
LAD1
LAD2
LAD3
LCLK
LFRAME#
LRESET#
SERIRQ
CLKRUN#
PP
C775
TPMN@10u/6.3V_4
19
5
VSB
VDD24VDD
TESTB1/BADD
TPM
SLB 9655 TT 1.2
GND4GND11GND18GND
TPM@NPCT650AA0WX_TSSOP28
25
LPCPD#
TEST1
XTALO
XTALI
GPIO2
GPIO
NC
NC
NC
NC
1 2
C770
TPM@0.1u/10V_4
1A-9
28
9
R784 *TPMI@0_4
8
14
13
2
6
R775 *20K/F_4
1
3
12
10
+3V_TPM_VDD
R767 TPM@0_4
R765 *TPMI@0_4
2013/10/23 add R5335 Isolate SLB9 660 NC.
TP154
R781 TPM@10K_4
+3V_TPM_VDD
PLTRST#_TPM
+3V_TPM_VDD
+3V_S5
28
TPMI@-->for SLB9655
TPMN@-->for Nuvoton
SLB 9655 NPCT65x
R767 Un-stuff stuff
R765
stuff
C775 Un-stuff stuff
R787 Un-stuff stuff
R778 Un-stuff stuff
R784
stuff
R781 Un-stuff stuff
Un-stuff
Un-stuff
3/5VPCU reset switch (CLG)
SW2 SWITCH_1.5
R439 *1M_4
R440 *1M_4
Battery
D D
BATLED0# 35
BATLED1# 35
R432 300_4
R433 680_4
1
+3VPCU
Blue
3
4
LED2 BATTERY LED
Amber
+3VPCU
2
1
2
TP156
2
3
1 4
TP155
5
6
C769
0.1u/10V_4
3
1 2
D35
*14V/100p_4
SYS_SHDN# 10,37,41
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
SATA-HDD/ TPM
SATA-HDD/ TPM
SATA-HDD/ TPM
4
Z8C
Z8C
Z8C
28 48 Saturday, November 15, 2014
28 48 Saturday, November 15, 2014
28 48 Saturday, November 15, 2014
3A
3A
3A
5
VDD33
VDD10
VDD33
U24
65
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
+3V_S5
+3VPCU
C405
1u/6.3V_4
R330 10K_4
LAN_XTALI
LAN_XTAL2
LAN_RESET
GND
MDIP0
MDIN0
AVDD10
MDIP1
MDIN1
MIDP2
MDIN2
AVDD10
MDIP3
MDIN3
AVDD33
DVDD33
Card_3V3
SD_D7/xD_RDY
SD_D6/MS_INS#/xD_RE#
SD_D5/xD_CE#
LAN/Card reader (LAN)
C302 12p/50_4
LAN_XTALI
LAN_XTAL2
CARD_3V3 30
VDD10
VDD10
VDD33
VDD33
SP5 30
SP6 30
SP7 30
SP8 30
SP9 30
SP10 30
SP12 30
SP13 30
X'tal 25MHz
R271
*1M_4
D D
C C
Y1
25MHz_XTAL
C301 12p/50_4
2 4
1 3
(1.5A) 60 mils
IOAC_LANPWR# 35
R247 2.49K/F_4
MDI0+
MDI0-
MDI1+
MDI1MDI2+
MDI2-
MDI3+
MDI3-
R253 *SHORT_6
CARD_3V3
C300
0.1u/10V_4
SP5
SP6
SP7
SP8
SP9
SP10
SP12
SP13
4
R324 *0_8
Q28 AO3413
1
R338
100K_4
2
58
57
63
62
61
59
64
RSET
AVDD33
AVDD33
AVDD10
AVDD33
XD_CD#
CKXTAL260CKXTAL1
MS_D0/xD_D156MS_D4/xD_D0
RTL8411BA-CG
SD_CMD/MS_D6/xD_D321SD_D3/MS_D2/xD_D222SD_D2/xD_D723GND24HSIP25HSIN26REFCLK_P27REFCLK_N28EVDD1029HSOP30HSON
SD_D4/xD_WE#17SD_D1/MS_CLK/xD_D618SD_D0/MS_D7/xD_D519SD_CLK/MS_D3/xD_D4
20
55
54
SD_CD#/MS_D5/xD_ALE
VDD33_18
53
VDD33/18
3
R319 *SHORT_6
R320 *SHORT_6
R285 *0_4
R1
51
50
49
52
GPO
DVDD10
LED0/SPICSB
LED1/SPISCK
SD_WP/MS_D1/xD_WP#
GND
31
32
SP13
LED0/SPICSB
GPO_NC
LED1/SPICLK/EESK
REGOUT
VDDREG
VDDREG
ENSWREG_H
SDA/SPIDI
LED3/SPIDO
SCL/LED_CR
DVDD10
LANWAKEB
DVDD33
ISOLATEB
PERSTB
CLKREQB
MS_BS/xD_CLE
VDD33/18
PCIE_RXN3_C
PCIE_RXP3_C
3
40 mils
VDD33
Mfr PN RTL8411AAR
VDDREG
50 mils
VDD33/18
R287 10K_4
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
EVDD10
R295
VDD10
10/31 modify
TP91
TP90
Power source mode:
Pin45 :Pull-up VDD33 for SWR mode
Pull-down for LDO mde
(1.5A) 70 mils
REGOUT
ENSWREG
SDA/SPIDI
LED3/SPIDO/EEDO
SCL/LED_CR_NC
LANWAKE#
R292 *SHORT_6
ISOLATEB
PCIE_REQ_LAN#
SP12
VDD33/18
R740 *0_4
R724 0_4
R732 *0_4 C50 *6.8p/50V_4
C332 0.1u/10V_4
C330 0.1u/10V_4
Layout Notes:
Place decoupling CAPs close to LAN Chip
POP
VDDREG
R291 *SHORT_4
VDD10
RTL8411BA-CG
DEPOP
+3V
VDD33
TP94
TP92
TP93
VDD33
PLTRST# 7,13,16,27,28,35
IOAC_RST# 27,35
PCIERST# 27,35
PCIE_RX3-_LAN 9
PCIE_RX3+_LAN 9
CLK_PCIE_LANN 9
CLK_PCIE_LANP 9
PCIE_TX3-_LAN 9
PCIE_TX3+_LAN 9
Transformer (LAN)
High
GDDR5
MDI0+
MDI0-
MDI1+
MDI1-
MDI3-
MDI3+
R293
1K_4
R290
15K/F_4
MDI2- TX2N_R
MDI2+ TX2P_R
C552 *6.8p/50V_4
C566 *6.8p/50V_4
C521 *6.8p/50V_4
C522 *6.8p/50V_4
C49 *6.8p/50V_4
C9 *6.8p/50V_4
C7 *6.8p/50V_4
Reserver for EMI
RJ45 CONNECTOR (LAN)
R1 *SHORT_4
R2 *SHORT_4
R27 *SHORT_4
R29 *SHORT_4
R464 *SHORT_4
R460 *SHORT_4
R438 *SHORT_4
R434 *SHORT_4
MDI3+
MDI3-
MDI2+
MDI2-
MDI1+
MDI1-
MDI0+
MDI0-
2
1
29
TX0P_R
TX0N_R
TX1P_R
TX1N_R
TX3N_R
TX3P_R
C8
0.01u/16V_4
U4
1
TD+
2
TD-
8
TCT
7
TCT
TRANSFORMER
U7
6
TCT
5
TCT
3
TD+
TD-4MX-
TRANSFORMER
U36
1
TD+
2
TD-
8
TCT
7
TCT
TRANSFORMER
U35
6
TCT
5
TCT
3
TD+
TD-4MX-
TRANSFORMER
MX+
MCT
MCT
MCT
MCT
MX+
MX+
MCT
MCT
MCT
MCT
MX+
MX-
MX-
6
5
3
4
MCT1
1
MCT2
2
8
7
6
5
3
4
MCT3
1
MCT4
2
8
7
*B88069X9231T203
R449
75_4
X-TX0P
X-TX0N
X-TX1P
X-TX1N
X-TX3N
X-TX3P
X-TX2N
X-TX2P
R455
R7
75_4
75_4
D1
1 2
CN1
L5
443
1
1
HCMC0805-371MFS/0.1A/370ohm
L7
443
1
1
HCMC0805-371MFS/0.1A/370ohm
L26
443
1
1
HCMC0805-371MFS/0.1A/370ohm
L23
443
1
1
HCMC0805-371MFS/0.1A/370ohm
R6
75_4
TERM0
C528
220p/3KV_1808
3
RJ45-TX0+
2
RJ45-TX0-
2
3
RJ45-TX1+
2
RJ45-TX1-
2
3
RJ45-TX3-
2
RJ45-TX3+
2
3
RJ45-TX2-
2
RJ45-TX2+
2
RJ45-TX0+
RJ45-TX0RJ45-TX1+
RJ45-TX2+
B B
PCIE_LAN_WAKE# 7,27
LAN_WAKE# 35
R309 0_4
R308 *0_4
VDD33
2
Q27
*DTC144EU
1 3
R294 *SHORT_4
R303
*1K_4
LANWAKE# PCIE_REQ_LAN#
CLK_PCIE_LAN_REQ# 9
S0 IOAC S5 IOAC
201201009: CLKREQ use S0 power domain by FAE
Power-on Strapping
SDA/SPIDI
VDD33
R295 1.5K/F_4
10 mils 10 mils
C333
4.7u/6.3V_6
VDD33/18
C334
0.1u/10V_4
C1 C2
C325
*4.7u/6.3V_6
VDD33_18
C314
0.1u/10V_4
+3V
2
Q26
*2N7002K
1
R307 *SHORT_4
REGOUT
(1.5A) 60 mils
R306
*10K_4
3
L17 4.7uH/680mA
C352
4.7u/6.3V_6
VDD10
C342
0.1u/10V_4
SURGE (LAN)
MDI1MDI1+
MDI3MDI3+
1
1
2
2
3
3
445
*UCLAMP2512T.TCT
Place close to pin 53 Place close to pin 33
C1 and C2 only for RTL8411AAR,
RTL8411BAR remove.
VDDREG
A A
VDD33
C309
0.1u/10V_4
40 mils
C298
0.1u/10V_4
C294
0.1u/10V_4
5
C293
4.7u/6.3V_6
C295
0.1u/10V_4
C311
0.1u/10V_4
40 mils
C341
C336
4.7u/6.3V_6
0.1u/10V_4
Place connect to Pin46/47 Place Close to LAN chip, for VDD33 pins-- 11, 12, 39, 58, 63, 64
(1.5A) 60 mils
Place Close to LAN chip, for VDD33 pins-- 3, 8, 41, 52, 61 Close to Pin29
4
VDD10
C297
0.1u/10V_4
C335
0.1u/10V_4
C303
0.1u/10V_4
Place Close pins-- 48
R286
C329
C296
0.1u/10V_4
0.1u/10V_4
*SHORT_6
3
EVDD10
30 mils
C324
1u/6.3V_4
C323
0.1u/10V_4
MDI2+
MDI2MDI0MDI0+
2
1
1
2
2
3
3
445
*UCLAMP2512T.TCT
RJ45-TX2-
RJ45-TX1RJ45-TX3+
RJ45-TX3-
U8
8
8
7
7
6
6
5
U1
8
8
7
7
6
6
5
1
0+
2
0-
3
1+
4
2+
5
2-
6
1-
7
3+
8
3-
RJ45
RJ45-TX1RJ45-TX1+
RJ45-TX0RJ45-TX0+
RJ45-TX3RJ45-TX3+
RJ45-TX2RJ45-TX2+
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
9
GND
10
GND
11
GND
12
GND
U9
1
2
3
*UCLAMP2512T.TCT
1
2
3
*UCLAMP2512T.TCT
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LAN-RTL8411/CARD READER
LAN-RTL8411/CARD READER
LAN-RTL8411/CARD READER
1
2
3
445
1
2
3
445
1
8
8
7
7
6
6
5
U37
8
8
7
7
6
6
5
Z8C
Z8C
Z8C
29 48 Saturday, November 15, 2014
29 48 Saturday, November 15, 2014
29 48 Saturday, November 15, 2014
3A
3A
3A
A
SD/MMC CARD READER CONNECTOR (MMC)
B
C
D
E
Stitching cap (EMC)
30
SP5 29
SP6 29
SP7 29
SP8 29
SP9 29
4 4
SP10 29
SP12 29
SP13 29
CARD_3V3 29
R786 *SHORT_4
R783 *SHORT_4
R779 *SHORT_4
R762 *SHORT_4
R758 *SHORT_4
R753 *SHORT_4
R788 *SHORT_4
R748 *SHORT_4
CARD_3V3
SD_DAT1
SD_DAT0
SD_CLK
SD_CMD
SD_DAT3
SD_DAT2
SD_WP
SD_CD#
SD_CD#
SD_WP
SD_DAT2
SD_DAT1
SD_DAT0
SD_CLK
CARD_3V3
SD_CMD
SD_DAT3
11
10
9
8
7
6
5
4
3
2
1
CN19
CARD/DET
W/P
DATA2
DATA1
DATA0
VSS2
CLK
VDD
VSS1
CMD
CD/DATA3
+1.05V_S5 +1.35V_GFX
C326
*0.1u/10V_4
GND
GND
SD-CARD
13
12
+VCCIN +V1.05M_VCCASW
C102
*1000p/50V_4
C590
*0.1u/10V_4
C584
*1000p/50V_4
+3V
C273
*1000p/50V_4
+3V_S5
C82
*0.1u/10V_4
EMI
SD_DAT0
Share Pin
3 3
SD_D7 xD_RDY
SP1
SP2
SD_D6
SP3
SD_D5
SP4
SD_D4
SP5
SD_D1
SP6
SD_D0
SP7
SD_CLK
SP8
SD_CMD
SP9
SD_D3
SP10
SD_D2
SP11
SP12
SD_WP
SP13
SD_CD#
SP14
SP15
SP16
MS_INS# xD_RE#
MS_CLK
MS_D7
MS_D3
MS_D6
MS_D2
MS_BS
MS_D1
MS_D5
MS_D4
MS_D0
xD_CE#
xD_WE#
xD_D6
xD_D5
xD_D4
xD_D3
xD_D2
xD_D7
xD_CLE
xD_WP#
xD_ALE
xD_D0
xD_D1
xD_CD#
C779
10p/50V_4
SD_CLK
C777
10p/50V_4
HOLE(OTH)
2 2
HOLE21
*HG-C276D118P2
8
9
123
HOLE7
*HG-C236D118P2
8
9
123
6 7
5
4
6 7
5
4
HOLE8
*hg-c236d118p2
8
9
123
HOLE10
*hg-c236d118p2
8
9
123
6 7
5
4
6 7
5
4
HOLE16
*hg-c236d118p2
8
9
123
HOLE11
*O-Z8C-1
8
9
123
HOLE20
6 7
5
4
6 7
5
4
*hg-c236d118p2
8
9
123
HOLE14
*hg-c236d118p2
8
9
123
6 7
5
4
6 7
5
4
HOLE5
*HG-ZRQ-1
8
9
HOLE13
*HG-C236D118P2
8
9
10 mils
C773
10u/6.3V_6
Place close to connector
123
123
6 7
5
4
6 7
5
4
8
9
C771
0.1u/10V_4
HOLE6
*HG-C276D118P2
6 7
5
4
123
HOLE18
*H-C236D165P2
1
CARD_3V3
C774
*4.7u/6.3V_6
HOLE4
*H-C236D157P2
1
+1.35V_SUS +3VPCU +WL_VDD
C382
*0.1u/10V_4
+3V_S5 +3V_S5 +3V_S5 +3V_S5 +5V +5V +5V +5V
C1
*0.1u/10V_4
+1.35V_GFX +1.35V_GFX +1.35V_GFX +1.35V_GFX
C2
*0.1u/10V_4
BATT Enable short pad(Remove)
C62
*1000p/50V_4
C359
*1000p/50V_4
C58
*0.1u/10V_4
C5
*0.1u/10V_4
C47
*0.1u/10V_4
C57
*0.1u/10V_4
C659
*0.1u/10V_4
C391
*0.1u/10V_4
C6
*0.1u/10V_4
C226
*0.1u/10V_4
C657
*1000p/50V_4
C381
*1000p/50V_4
C523
*0.1u/10V_4
C264
*0.1u/10V_4
C699
*0.1u/10V_4
C3
*0.1u/10V_4
C265
*1000p/50V_4
C688
*1000p/50V_4
C4
*0.1u/10V_4
C74
*0.1u/10V_4
HOLE9
*hg-c276d118p2
123
6 7
5
4
1 1
8
9
HOLE17
*hg-c276d118p2
8
9
A
123
6 7
5
4
HOLE12
*h-c217d138p2
1
HOLE15
*h-c197d138p2
1
CPU BKT GPU BKT
HOLE1
*h-c150d150n
1
B
HOLE2
*h-c150d150n
1
HOLE3
*h-c150d150n
1
C
HOLE19
*H-TC197BC142D142P2
1
PAD1
*spad-e858x1268
12345
6
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
CARD READER CONNECTOR
CARD READER CONNECTOR
CARD READER CONNECTOR
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Z8C
Z8C
Z8C
30 48 Saturday, November 15, 2014
30 48 Saturday, November 15, 2014
30 48 Saturday, November 15, 2014
E
3A
3A
3A
5
Codec (ADO)
D D
+1.5V
R392
*SHORT_6
+1.5VAVDD2
C479
C488
10u/6.3V_6
0.1u/10V_4
Place next to p in 40
ADOGND
C471
10u/6.3V_6
C477
10u/6.3V_6
R393 *S HORT_6
C472
0.1u/10V_4
R395 *S HORT_6
C473
0.1u/10V_4
+5V
C C
+5V
+5VPVDD1
C482
10u/6.3V_6
Place next to p in 41
+5VPVDD2
C484
C489
10u/6.3V_6
0.1u/10V_4
Place next to p in 46
+5VA
ADOGND
Layout Note:
Place close to Codec
C486
10u/6.3V_6
C487
0.1u/10V_4
SPK-1
R404
*10K_4
R407
*10K_4
ADOGND ADOGND
Spilt by DGND
R398 *S HORT_6
+3V
HP
ANALOG
L_SPK+
L_SPKR_SPKR_SPK+
PD#
COMBO MIC JD
DIGITAL
0.1u/10V_4
R774 *S HORT_6
+3V
C490
+
2.2u/6.3V_6
C495
EAPD#
HP-L
HP-R
2.2u/6.3V_6 C510 2.2u/6.3V _6
+3VCPVDD
C491
0.1u/10V_4
36
U34
DIGITAL
CPVDD
37
CBP
38
AVSS2
39
LDO2-CAP
40
AVDD2
41
PVDD1
42
SPK-L+
43
SPK-L-
44
SPK-R-
45
SPK-R+
46
PVDD2
47
PDB
48
SPDIFO/GPIO2
49
GND
DVDD1GPIO0/DMIC-DATA2GPIO1/DMIC-CLK3DVSS4SDATA-OUT5BIT-CLK6LDO3-CAP7SDATA-IN8DVDD-IO9SYNC10RESET#11PCBEEP
+3VDVDD
C494
10u/6.3V_6
Place next to p in 1
DMIC_DATA
DMIC
B B
DMIC_CLK
4
3
2
1
HEADPHONE/Mic combo (AMP)
31
MIC2-VREFO
C500
0.1u/10V_4
ADOGND
C505
*10u/6.3V_6
ADOGND
MIC2-R MIC2_MIC
+5VA
C501
2.2u/6.3V_6
C496
R403 *0_4
+
R406 0_4
Place next to p in 28
C504 10u /6.3V_6
close to pin 27
ANALOG
C507
ADOGND
R409 47K_4
R412
4.7K_4
C503 *1 00p/50V_4
PCH_AZ_CODEC_RST# 8
PCH_AZ_CODEC_SYNC 8
+3V
PCH_AZ_CODEC_SDIN0 8
PCH_AZ_CODEC_BITCLK 8
PCH_AZ_CODEC_SDOUT 8
C506
10u/6.3V_6
0.1u/10V_4
ADOGND
TP101
SPK-2
TP102
Combo MIC
HPOUT_JD SENSEA
BEEP_2
D19 RB500 V-40
D20 RB500 V-40
Internal Speaker (AMP) Remove
Pin1 - Pin6: DGND
Pin7 - Pin12: AGND
Thermal Pad: DGND
SPKR 8,10
PCBEEP_EC 35
35
CBN
CPVEE
HP-OUT-R
HP-OUT-L
MIC1-VREFO-L
MIC1-VREFO-R
C497
10u/6.3V_6
close to pin 7
C498 22p/50V_4
VREF
MIC2-VREFO
ACZ_SDIN0_R
AVDD1
LDO1-CAP
MONO-OUT
ADOGND
AVSS1
24
LINE2-L
23
LINE2-R
22
LINE1-L
21
LINE1-R
20
MIC1-R
19
MIC1-L
18
MIC2-R
17
MIC2-L
16
15
14
13
R411 20K/F_4
close to pin 15
JDREF
Sense B
Sense A
ANALOG
ALC3225
12
DIGITAL
PCBEEP B EEP_1
R405 33_ 4
PCBEEP dont cou pling any signals i f possible
8/17 separate P CBEEP to Digital fr om Realtek suggest ion
1.6Vrms
C508 1u/16V_ 6
+3VDVDDIO
C502
0.1u/10V_4
Place next to p in 26
L_SPK2
R_SPK2
MIC2-R
MIC2-L
R410 39.2 K/F_4
close to pin 13
C509
100p/50V_4
R408 *S HORT_6
C499
10u/6.3V_6
Place next to p in 9
25
26
27
28
29
30
31
32
33
34
20120910: ALC3225 has a internal MOSFET
C511 2.2u/6.3V_6
MIC2-L
HP-L
R419 56_ 4
HP-R HP-R-1
R418 56_ 4
MIC2-VREFO
R420 1K_4
R423 *SHORT_6
R422 *SHORT_6
R_SPK+
R431 0_6
R_SPK-
R430 0_6
L_SPK-
R429 0_6
L_SPK+
R428 0_6
22K/F_4
R424
ADOGND
R421
2.2K_4
*14V/100p_4
ADOGND
D24
C519
*68p/50V_4
COMBO MIC JD
1 2
D25
*14V/100p_4
ADOGND
1 2
1 2
D23
*14V/100p_4
ADOGND ADOGND ADOGND
C520
C517
*68p/50V_4
*68p/50V_4
R425 22K/F_4
C515
10u/6.3V_6
COMBO_MIC
HPL_SYS HP-L-1
HPR_SYS
HPOUT_JD
1 2
R_SPK+_1
R_SPK-_1
L_SPK-_1
L_SPK+_1
C518
*68p/50V_4
D26
*14V/100p_4
CN22
1
2
3
4
5
6
SPK CN
Combo Jack
CN21
4
3
1
2
5
6 7
SIT_2SJ3052-005111F
ADOGND
INT DMIC(AMP)
R789 *0_4
Power(ADO) Mute(ADO)
+5V
A A
C427
C426
*0.1u/10V_4
*10u/6.3V_6
U33
3
IN
2
GND
1
SHDN
*G923-330T1UF
R381 *0_4
ANALOG DIGITAL
C480
*10u/6.3V_6
+5VA
ADOGND
C478
*0.1u/10V_4
4
OUT
5
R391 *29.4K /F_4
SET
R390
*10K/F_4
ADOGND
R413 *0_4
R396 *SHORT_4
R383 *SHORT_4
R417 *SHORT_4
R427 *SHORT_4
R414 *SHORT_4
C483 *1000p/50V_4
C514 *1000p/50V_4
ADOGND
Tied at one point only under
the codec or near the codec
+3V
0V : Power down Class D SPK amplifer
R397
3.3V : Power up Class D SPK amplifer
*10K_4
D18 RB500V-40
D17 RB500V-40
AMP_MUTE# 35
PCH_AZ_CODEC_RST#
+3V_DMIC
CN20
DMIC_DATA_R
4
3
2
6
1
5
AMIC
DMIC_CLK_R PD# AMP_MUTE#
C516
1000p/50V_4
1 2
1 2
D22
*14V/100p_4
D21
*14V/100p_4
C781
0.1u/10V_4
C730, C787 close U37 pin3 and L65
5
4
3
2
R426 *SHORT_6
C513
22p/50V_4
C512
22p/50V_4
+3V
R416 *S HORT_4 L21 HCB2012KF220T60/6A/22ohm_8
R415 *S HORT_4
DMIC_DATA
DMIC_CLK
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
REALTEK ALC3225
REALTEK ALC3225
REALTEK ALC3225
1
Z8C
Z8C
Z8C
3A
3A
31 48 Satu rday, November 15, 2014
31 48 Satu rday, November 15, 2014
31 48 Satu rday, November 15, 2014
3A
5
USB_BC_EN
USBP0-_C
USBP0+_C
C370 0.1u/10V_4
C377 0.1u/10V_4
USB3_RXN0
USB3_RXP0
+5VPCU
USB3_TXN0_C
USB3_TXP0_C
R792
*100K_4
C717 1u/6.3V_4
U49
5
IN
3
OC#
4
EN
G524A1T11U
R712 *SHORT_4
R711 *SHORT_4
R296 *SHORT_4
R302 *SHORT_4
R311 *SHORT_4
R321 *SHORT_4
OUT
GND
USB3.0
Active High:
USB_OC0# 9
D D
USB3_RXN0 9
USB3_RXP0 9
USB3_TXN0 9
USB3_TXP0 9
4
1
2
USBP0-_R
USBP0+_R
USB3_RXN0_R
USB3_RXP0_R
USB3_TXN0_R
USB3_TXP0_R
USBPWR1
1 2
C707
C706
1000p/50V_4
100u/6.3V_1206
USBP0-_R
USBP0+_R
USB3_RXN0_R
USB3_RXP0_R
USB3_TXN0_R
USB3_TXP0_R
D32 *5V/ 0.2p_4
1 2
D31 *5V/ 0.2p_4
1 2
D10 *5V/ 0.2p_4
1 2
D11 *5V/ 0.2p_4
1 2
D12 *5V/ 0.2p_4
1 2
D13 *5V/ 0.2p_4
1 2
USB 3.0 Connector
CN13
1
VBUS
1
2
D-
2
3
D+
3
4
4
GND
5
SSRX-
5
6
6
SSRX+
7
7
GND
8
8
SSTX-
9
SSTX+
9
12
11111010131312
USB3.0 CONN
3
USB Charger to 3.0
BC_CEN
USBP0-_C
USBP0+_C
CB SELCDP
Funcion
DCP autodetect with mouse/keyboard wakeup
00X
S0 charging with SDP only
1
S0 charging with CDP or SDP only (depending on external device)
1 1
U25
1
8
CEN
CB1
7
2
TDM
DM
3
6
DP
TDP
4
5
SELCDP
VDD
9
Thermal Pad
SLG55584A
R318 10K_4
R331 47K_4
USB_BC_ON
+3VPCU
2
1
R329 *0_4
CEN:SLG55584A----pull up
SLG55584----pull low
BC_CEN
USB_BC_ON 35
2
R326 *SHORT_4
R328 *0_4
C378 0.1u/10V_4
+5VPCU
C400 *0.1u/10V_4
4
U26
3 5
TC7SH08FU
USB_BC_EN
1
USB_CHARGE_ON 35
MAINON 35,38,39,41
USBP0- 9
USBP0+ 9
32
USB2.0
C C
USBP3- 9
USBP3+ 9
B B
USB3_RXN1 9
USB3_RXP1 9
USB3_TXN1 9
USB3_TXP1 9
A A
+5V_S5
C263 1u/6.3V_4
U19
5
1
2
3
1
2
3
/OC
R692 *SHORT_4
R690 *SHORT_4
R249 *SHORT_4
R256 *SHORT_4
R276 *SHORT_4
R281 *SHORT_4
1 2
C127
100u/6.3V_1206
USBPWR2
USBP3-_R
USBP3+_R
1 2
C691
100u/6.3V_1206
USBPWR3
USBP1-_R
USBP1+_R
USB3_RXN1_R
USB3_RXP1_R
USB3_TXN1_R
USB3_TXP1_R
C163
1000p/50V_4
USBP3-_R
USBP3+_R
D4 * 5V/0.2p_4
1 2
D3 * 5V/0.2p_4
1 2
C692
1000p/50V_4
USBP1-_R
USBP1+_R
USB3_RXN1_R
USB3_RXP1_R
USB3_TXN1_R
USB3_TXP1_R
D30 *5V/0.2p_4
1 2
D29 *5V/0.2p_4
1 2
D6 *5V/0.2p_4
1 2
D7 *5V/0.2p_4
1 2
D8 *5V/0.2p_4
1 2
D9 *5V/0.2p_4
1 2
USB 2.0 Connector
CN5
1
VDD
GND6
2
D-
GND5
3
D+
4
GND1
GND7
GND8
USB2.0 CONN
USB 3.0 Connector
CN8
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
VBUS
DD+
GND
SSRXSSRX+
GND
SSTXSSTX+
6
5
7
8
12
IN
OUT
GND
4
EN
USBON# 35
USB_OC1#
+5V_S5
USBON#
USB_OC0#
USBP1- 9
USBP1+ 9
USB3_RXN1
USB3_RXP1
C305 0.1u/10V_4
C308 0.1u/10V_4
G524B2T11U
C693 1u/6.3V_4
USB3_TXN1_C
USB3_TXP1_C
R73 *SHORT_4
R72 *SHORT_4
U48
5
IN
4
EN
G524B2T11U
/OC
OUT
GND
11111010131312
USB3.0 CONN
I/O board
+5V_S5
C209 1u/6.3V_4
U18
5
1
IN
OUT
2
GND
4
USBON#
USB_OC1# 9
USBP2- 9
USBP2+ 9
R617 *SHORT_4
R621 *SHORT_4
EN
G524B2T11U
USBP2-_R
USBP2+_R
3
/OC
USBPWR4
C256
0.1u/10V_4
USBP2-_R
NBSWON# 13,35
USBP2+_R
LID# 25,35
+3VPCU
CN6
1
2
3
4
5
6
7
8
9
10
11
12
USB/B CONN
13
1
13
14
2
14
3
4
5
6
7
8
9
10
11
12
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Z8C
Z8C
Z8C
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
INT&EXT USB
INT&EXT USB
INT&EXT USB
3A
3A
3A
32 48 Saturday, November 15, 2014
32 48 Saturday, November 15, 2014
32 48 Saturday, November 15, 2014
1
5
mDP USB3.0 re-driver IC(Remove)
4
3
2
1
G-sensor
R749 *GS@SHORT_6
D D
ACCEL_INTA 10
ACCEL_INTA
C721
GS@22P/50V_4
C C
B B
+G_SEN_PW
CLK_SDATA 8,13,14,15
CLK_SCLK 8,13,14,15
CLK_SDATA
CLK_SCLK
+G_SEN_PW
CLK_SDATA
CLK_SCLK
R760 *GS@4.7K_4
R754 *GS@4.7K_4
+G_SEN_PW
C724
GS@0.1U/10V_4
D33 GS@RB500V-40
R759 *GS@SHORT_4
R761 *GS@SHORT_4
R755 *GS@SHORT_4
+G_SEN_PW
G_MBDATA_R
G_MBCLK_R
C722
GS@10u/6.3V_6
C763 GS@33P/50V_4
C757 GS@33P/50V_4
+3V
ACCEL_INTA_R
TP153
G_MBDATA_R
G_MBCLK_R
U54
1
Vdd_IO
14
VDD
11
INT1
9
INT2
7
SA0
6
SDA
4
SCL
8
CS
GS@LIS3DHTR
RESERVED
RESERVED
GND
GND
GND
GND
2
NC
3
NC
10
15
5
12
13
16
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Z8C
Z8C
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
G-Sensor
G-Sensor
G-Sensor
Z8C
A1A
A1A
33 48 Saturday, November 15, 2014
33 48 Saturday, November 15, 2014
1
33 48 Saturday, November 15, 2014
A1A
5
K/B (KBC) TOUCHPAD BOARD CONN (TPD)
CN15
26
MY0 35
MY1 35
MY2 35
MY3 35
MY4 35
MY5 35
D D
C C
MY6 35
MY7 35
MY8 35
MY9 35
MY10 35
MY11 35
MY12 35
MY13 35
MY14 35
MY15 35
MY16 35
MY17 35
MX7 35
MX6 35
MX5 35
MX4 35
MX3 35
MX2 35
MX1 35
MX0 35
MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17
MX7
MX6
MX5
MX4
MX3
MX2
MX1
MX0
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
KB_CONN
28
27
4
7 8
5
6
3
4
1
2
CP4 *100p/50Vx4
7 8
5
6
3
4
1
2
CP5 *100p/50Vx4
7 8
5
6
3
4
1
2
CP6 *100p/50Vx4
7 8
5
6
3
4
1
2
CP1 *100p/50Vx4
7 8
5
6
3
4
1
2
CP2 *100p/50Vx4
7 8
5
6
3
4
1
2
CP3 *100p/50Vx4
C481 *100p/50V_4
C476 *100p/50V_4
+3VPCU
RP1 *10K_10P8R
10
9
MX6
8
MX7
7 4
MX5
MX4
3
MY17
MY16
MX2
MX3
MX4
MX5
MX6
MX7
MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MX1
MX0
1
MX3
2
MX2
3
MX1
MX0
5 6
*0.1u/10V_4
+3V
+5V
C475
TPCLK 35
TPDATA 35
R389 *SHORT_4
R388 *0_4
R387
10K_4
C474
*0.1u/10V_4
R386
10K_4
R385 *SHORT_4
R384 *SHORT_4
L32 *SHORT_6
+3V
L31 *0_6
+5V
C761
0.1u/10V_4
TPCLK_R
TPDATA_R
2
1
34
+TPVDD
50mil
1
2
3
4
TP CN
CN18
87 65
KB_BL LED (KBC)
B B
+5V
KB_BL_LED 35
A A
2
Q31
KBL@DTC144EU
1 3
5
R394
BL@10K_4
+5V
1
2
3
C485 KBL@2.2u/6.3V_6
Q32
KBL@AO3413
C468
KBL@4.7u/6.3V_6
R382 *KBL@SHORT_4
C470
KBL@0.01u/16V_4
+5V_KB_R +5V_KB
CN16
346
2
5
1
KBL@KB_backlight
4
CPU FAN1 (THM)
FAN1_PWM 35
CPU FAN2 (THM)
FAN2_PWM 35
3
+3V
R705
1K_4
2
1 3
Q40
MMBT3904-7-F
+3V
R446
EV@1K_4
2
1 3
Q35
EV@MMBT3904-7-F
+5V
+5V
R697
10K_4
R445
EV@10K_4
FAN2SIG 35
FANSIG 35
FAN_PWM_CN1
30mil
FAN_PWM_CN2
30mil
+3V
+3V
R699
10K_4
R447
EV@10K_4
+5V
R698
*SHORT_8
+5V_FAN1
+5V
R437
*EV@SHORT_8
+5V_FAN2
2
CN10
345
2
1
FAN1
CN4
345
2
1
EV@FAN2
6
6
CPU
GPU
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Z8C
Z8C
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
KB/TP/FAN
KB/TP/FAN
KB/TP/FAN
Z8C
34 48 Saturday, November 15, 2014
34 48 Saturday, November 15, 2014
1
34 48 Saturday, November 15, 2014
3A
3A
3A
5
EC(KBC)
R337 2.2_6
1 2
+3VPCU
+3VPCU_EC and +3V_RTC
minimum trace width 12mils.
D D
+3VPCU
D16
R353
SDMK0340L-7-F
100K_4
1 2
2 1
WRST#
C416
1u/6.3V_4
C C
Please do not place any
pull-up resistor
on GPG0, GPG2, and GPG6
(Reserved
hardware strapping).
B B
CLK_PCI_EC
R348
*22_4
C409
*10p/50V_4
L20
BLM11A05S/0.2A/120ohm_6
C402
0.1u/10V_4
LPC_LAD0 8,27,28
LPC_LAD1 8,27,28
LPC_LAD2 8,27,28
LPC_LAD3 8,27,28
PLTRST# 7,13,16,27,28,29
CLK_PCI_EC 9
LPC_LFRAME# 8,27,28
WIGIG_RST# 27
IRQ_SERIRQ 10,28
SIO_EXT_SMI# 10
SIO_EXT_SCI# 10
SIO_RCIN# 10
HWPG_1.05V_EC# 5
PCH_BLON_EC 25
BT_POWERON 27
EC_PWROK 7
KB_BL_LED 34
IOAC_WLANPWR# 27
COLOR_ENG 25
AC_Protect 36
AMP_MUTE# 31
PCH_SLP_SUS# 7
TEMP_MBAT 36
PCBEEP_EC 31
PCH_SPI_CLK_EC 8
SPI_CS0#_UR_ME 8
PCH_SPI_SI_EC 8
PCH_SPI_SO_EC 8
FAN1_PWM 34
S5_ON 37,38,41
ME_WR# 8
12 mils
C399
0.1u/10V_4
SUSON 39
MAINON 32,38,39,41
ACIN 36
D/C# 36
TP95
TP96
MY16 34
MY17 34
MY10 34
MY11 34
MY12 34
MY13 34
MY14 34
MY15 34
Follow ZQ0
MY0 34
MY1 34
MY2 34
MY3 34
MY4 34
MY5 34
MY6 34
MY7 34
MY8 34
MY9 34
C767
0.1u/10V_4
+3V
S5_ON
C372
0.1u/10V_4
R332 2.2_6
PLTRST#
PROCHOT_EC
BT_POWERON
TP98
G_MBDATA
G_MBCLK
C430
0.1u/10V_4
ECAGND
C429
0.1u/10V_4
C407
0.1u/10V_4
10
9
8
7
22
13
6
17
126
5
15
23
14
4
16
119
123
80
104
33
88
81
87
109
108
71
72
73
35
34
107
95
94
105
101
102
103
56
57
32
100
106
36
37
38
39
40
41
42
43
44
45
46
51
52
53
54
55
SSCE0#
MX0 34
MX1 34
MX2 34
MX3 34
MX4 34
MX5 34
MX6 34
MX7 34
For test only
A A
5
TP100
4
+A3VPCU
12 mils
+3V_RTC
+3VPCU_EC
C371
0.1u/10V_4
+3V_EC
U32
LAD0/GPM0(X)
LAD1/GPM1(X)
LAD2/GPM2(X)
LAD3/GPM3(X)
LPCRST#/WUI4/GPD2(Up)
LPCCLK/GPM4(X)
LFRAME#/GPM5(X)
LPCPD#/WUI6/GPE6(Dn)
GA20/GPB5(X)
SERIRQ/GPM6(X)
ECSMI#/GPD4(Up)
ECSCI#/GPD3(Up)
WRST#
KBRST#/GPB6(X)
PWUREQ#/BBO/SMCLK2ALT/GPC7(Up)/SMCLK2ALT
CRX0/GPC0(Dn)
CTX0/TMA0/GPB2(Dn)
DAC4/DCD0#/GPJ4(X)
DSR0#/GPG6(X)
GINT/CTS0#/GPD5(Up)
PS2DAT1/RTS0#/GPF3(Up)
DAC5/RIG0#/GPJ5(X)
PS2CLK1/DTR0#/GPF2(Up)
TXD/SOUT0/GPB1(Up)
RXD/SIN0/GPB0(Up)
ADC5/DCD1#/WUI29/GPI5(X)
ADC6/DSR1#/WUI30/GPI6(X)
ADC7/CTS1#/WUI31/GPI7(X)
RTS1#/WUI5/GPE5(Dn)
PWM7/RIG1#/GPA7(Up)
DTR1#/SBUSY/GPG1/ID7(Dn)
CTX1/WUI18/SOUT1/GPH2/SMDAT3/ID2(Dn)
CRX1/WUI17/SIN1/SMCLK3/GPH1/ID1(Dn)
FSCK/GPG7
FSCE#/GPG3
FMOSI/GPG4
FMISO/GPG5
KSO16/SMOSI/GPC3(Dn)
KSO17/SMISO/GPC5(Dn)
PWM6/SSCK/GPA6(Up)
SSCE0#/GPG2(X)
SSCE1#/GPG0(X)
KSO0/PD0
KSO1/PD1
KSO2/PD2
KSO3/PD3
KSO4/PD4
KSO5/PD5
KSO6/PD6
KSO7/PD7
KSO8/ACK#
KSO9/BUSY
KSO10/PE
KSO11/ERR#
KSO12/SLCT
KSO13
KSO14
KSO15
3
5
6
C397
0.1u/10V_4
11
114
VCC
VSTBY26VSTBY50VSTBY92VSTBY
LPC
CIR
EXTERNAL SERIAL FLASH
SPI ENABLE
KBMX
KSI0/STB#58KSI1/AFD#59KSI2/INIT#60KSI3/SLIN#61KSI462KSI563KSI664KSI7
SW1
2
1 4
*Power Switch
4
121
VSTBY
UART port
65
NBSWON#
TP99
3
74
VBAT
+3VPCU_ECPLL
127
AVCC
IT8587
1
L19
BLM11A05S/0.2A/120ohm_6
VSTBY
VSS
C369
0.1u/10V_4
84
82
EGCS#/WUI26/GPE2(Dn)83EGCLK/WUI27/GPE3(Dn)
VSS27VSS49VSS
91
EGAD/WUI25/GPE1(Dn)
VSS
113
L18
BLM11A05S/0.2A/120ohm_6
(For PLL Power)
HWPG
R316 *SHORT_4
L80LLAT/WUI7/GPE7(Up)
GPIO
R317 *SHORT_4
97
93
PECI/SMCLK2/WUI22/GPF6(Up)
PS2CLK0/TMB0/CEC/GPF0(Up)
WUI41/GPH5/ID5(Dn)98WUI42/GPH6/ID6(Dn)99WUI19/GPH3/ID3(Dn)96WUI40/GPH4/ID4(Dn)
SM BUS
PS2CLK2/WUI20/GPF4(Up)
PS2DAT2/WUI21/GPF5(Up)
CLKRUN#/WUI16/GPH0/ID0(Dn)
PS/2
SMDAT2/WUI23/GPF7(Up)
PS2DAT0/TMB1/GPF1(Up)
TP97
20
19
L80HLAT/BAO/WUI24/GPE0(Dn)
PWM
TACH1A/TMA1/GPD7(Dn)
WAKE UP
RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7(Dn)
A/D D/A
DAC2/TACH0B/GPJ2(X)
DAC3/TACH1B/GPJ3(X)
CLOCK
VSS
VCORE
AVSS
12
75
122
C410
0.1u/10V_4
ECAGND
3
+3VPCU_EC
WLAN_WAKE# 27
LAN_WAKE# 29
SMCLK0/GPB3(X)
SMDAT0/GPB4(X)
SMCLK1/GPC1(X)
SMDAT1/GPC2(X)
PWM0/GPA0(Up)
PWM1/GPA1(Up)
PWM2/GPA2(Up)
PWM3/GPA3(Up)
PWM4/GPA4(Up)
PWM5/GPA5(Up)
TACH0A/GPD6(Dn)
TMRI0/WUI2/GPC4(Dn)
TMRI1/WUI3/GPC6(Dn)
PWRSW/GPE4(Up)
RI1#/WUI0/GPD0(Up)
RI2#/WUI1/GPD1(Up)
ADC0/GPI0(X)
ADC1/GPI1(X)
ADC2/GPI2(X)
ADC3/GPI3(X)
ADC4/WUI28/GPI4(X)
TACH2/GPJ0(X)
GPJ1(X)
CK32KE/GPJ7
CK32K/GPJ6
IT8587E/FX
iRST
PCI_PLTRST# 7
3
SUSC# 7,13
SUSB# 7,13
IOAC_LANPWR# 29
USB_BC_ON 32
USB_CHARGE_ON 32
CLKRUN# 7,28
110
MBCLK
111
MBDATA
115
2ND_MBCLK
116
2ND_MBDATA
117
118
85
86
89
90
24
25
28
29
30
31
47
48
120
124
125
18
21
112
66
67
68
69
70
76
77
78
79
2
128
FB_CLAMP_REQ#
R323 *0_4
EC_PECR_R
SUSLED#
NBSWON#
dGPU_OPP#
ICMNT
C469 10u/6.3V_6
EC_FB_CLAMP
R298 43_4
TPD_INT#
SM BUS ARRANGEMENT TABLE
SM Bus 1
SM Bus 2
SM Bus 3
SM Bus 4
IOAC_RST#
R341
*100K_4
Battery
PCH/VGA
N/A
R335
*100K_4
MBCLK 36
MBDATA 36
2ND_MBCLK 8,19
2ND_MBDATA 8,19
EC_FPBACK# 25
IOAC_RST# 27,29
LID# 25,32
TPCLK 34
TPDATA 34
PWRLED# 28
BATLED1# 28
SUSLED# 28
BATLED0# 28
APWORK 5,7
FAN2_PWM 34
FANSIG 34
FAN2SIG 34
DNBSWON# 7
DPWROK 7
NBSWON# 13,32
dGPU_OPP# 19
SB_ACDC 36
RSMRST# 7
RF_EN 27
ICMNT 36
ECAGND
VRON 40
FB_CLAMP_REQ# 19
dGPU_OTP# 19
EC_FB_CLAMP 17,19
PCH_PWROK 5,7
USBON# 32
PCH_SUSACK# 7
PCH_SUSPWARN# 7
+3V
2
1
U27
3 5
*TC7SH08FU
H_PECI 4
C387
*0.1u/10V_4
4
PCIERST#
2
2
S5_ON
NBSWON#
dGPU_OTP#
dGPU_OPP#
FB_CLAMP_REQ#
SM BUS PU(KBC)
MBCLK
MBDATA
2ND_MBCLK
2ND_MBDATA
PROCHOT_EC
+3V
2
3
TPD_INT# TPD_INT#_D
Q30
*2N7002K
HWPG(KBC)
DDR=1.5V, D1 DNP and D2 POP
DDR=1.35V, D1 POP and D2 DNP
HWPG_1.5V 41
HWPG_1.05V 5
HWPG_VDDR 39
HWPG_1.05V_S5 13,38
SYS_HWPG 37
PCIERST# 27,29
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
MAINON
SUSON
VRON
PCH_SPI_SI_EC
PCH_SPI_SO_EC
R367
100K_4
1
1
+3VPCU
R315 10K_4
+3VPCU
R310 10K_4
R361 EV@10K_4
R362 EV@10K_4
R380 EV@10K_4
R347 100K_4
R312 100K_4
R491 100K_4
R314 *10K_4
R720 *10K_4
R301 4.7K_4
R313 4.7K_4
R300 4.7K_4
R299 4.7K_4
3
2
1
D1
D2
+3V_GFX
+3VPCU
+3V_S5
Q29
2N7002K
TPD_INT#_D 2
D38 RB500V-40
D14 *RB500V-40
D36 *RB500V-40
D34 RB500V-40
D37 RB500V-40
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
KBC IT8587
KBC IT8587
KBC IT8587
1
35
H_PROCHOT# 4,36,40
+3V
R344
10K_4
HWPG
Z8C
Z8C
Z8C
35 48 Saturday, November 15, 2014
35 48 Saturday, November 15, 2014
35 48 Saturday, November 15, 2014
3A
3A
3A
5
PJ1
1
2
3
4
Power conn
D D
C C
ACIN 35
ACPRESENT 7
SB_ACDC 35
B B
PJ2
89
7
BATT_EN#
6
5
4
3
50458-00801-V01
2
1
10
9/5 BATT Enable
short pad Z8C
del function
BATT_EN# need to
GND
A A
PR103
*SHORT_4
PC24
0.1u/50V_6
PR54
*SHORT_4
PC77
0.1u/50V_6
PC79
*100p/50V_4
5
PR98 100_4
PC59
*47p/50V_4
PR87
100_4
PR58
*0_4
PC22
2200p/50V_6
PR59
*10K_4
PC62
*47p/50V_4
PR96
100_4
PD4 BZT52-B5V6S(5.6V)
2 1
+3VPCU
DEL
PL7,PL8
12/7
6
1
PR49
100K_4
2
4 3
TEMP_MBAT
PD3 BZT52-B5V6S(5.6V)
2 1
DEL
PL5,PL6
12/7
PC35
PR55
0.1u/25V_4 PD5
100K_4
5
PQ13
2N7002DW
BAT-V
PR101 1M_4
MBCLK 35
MBDATA 35
65W-DIS CS41272FB19
45W-UMA CS33902FB16
4
VA1
PD1
1N4148WS
PR48
*SHORT_6
+3VPCU
TEMP_MBAT 35
+3VPCU
24737_BM#
4
PC21
0.1u/50V_6
recommend 200mA at least.
PR196
10K/F_4
PR73
20_1206
MBDATA
PR200
*SHORT_4
MBCLK
PR202
PR102
*100K_4
PR203
100K/F_4
*SHORT_4
0.01u/25V_4
PR94
10K_4
PR97
316K/F_4
PQ21
*2N7002K
PR193
10K_4
3
2
1
PR88 Value
127K
39K
2 1
24737_CMPOUT
24737_ILIM
PC130
ICMNT 35
PD9
SMAJ20A
PR189
63.4K/F_4
24737_ACDET
24737_VCC
PC58
0.47u/25V_6
24737_BM#
24737_CMPIN
PR194
100K_4
PC31
0.1u/50V_6
PC53
0.1u/50V_6
6
20
5
8
9
11
3
10
4
PR88
127K/F_4
AC_Protect 35
ACDET
VCC
ACOK#
SDA
SCL
BM#
CMPOUT
ILIM
CMPIN
3
PR43
220K_4
PR45
220K_4
0.1u/50V_6
2
BQ24737RGRR
IOUT
7
PC124
100p/50V_4
3
PC121
ACP
21
1
PU9
GND
GND22GND24GND23GND
24737_CMPOUT
1 6
2
3
PQ11
IMD2AT108
24737_ACP
24737_ACN
PC55
0.1u/50V_6
ACN
REGN
BTST
HIDRV
PHASE
LCDRV
PGND
SRP
SRN
25
PR89
*0_4
*SHORT_4
VA2
5 2
4
24737_REGN
PR201
*SHORT_6
24737_BST
24737_DH
24707_LX
PR206
10/F_6
PR205
7.5_6
For battery reverse
+1.05V
PR81
*100K_4
2
1
3
PR90
PQ9
AOL1413
5
4
16
17
18
19
15
14
13
12
Limit set on 60W/3.16A
PD2
SBR1045SP5-13
1
2
PR44
*SHORT_4
24737_SRP
24737_SRN
10/29
3
PQ18
2N7002K
1
3
PC129
1u/16V_6
RB500V-40
PC125
47n/50V_6
PC131
0.1u/25V_4
PC133
0.1u/25V_4
PC132
0.1u/25V_4
H_PROCHOT# 4,35,40
2
PR69
0.02/F_0612
1 2
D/C# 35
4
4
2
7/16 CHANGE
PR192
*SHORT_4
PR188
*SHORT_4
5 2
PQ17
AON7410
3
1
5 2
PQ48
AON7410
3
1
1
1
3
PR95
33K/F_4
PQ20
2N7002K
PC78
2200p/50V_6
PQ22
AOL1413
2
24737_ACN
24737_ACP
PC48
2200p/50V_6
PR93
*4.7_6
*680p/50V_6
PC43
0.1u/50V_6
PL7
6.8uH_7X7X3
24737_SRP
24737_SRN
VIN
VIN
PR208
*SHORT_4
PC50
4.7u/25V_8
1 2
PC54
2200p/50V_6
PR207
0.01/F_0612
PR209
*SHORT_4
REGN MAX voltage 6.5V
V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr
=0.793V for 3.965A current limit
Pin10 ILIM=0.793V
Rsr = 0.01ohm
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Charger(BQ24737RGRR)
Charger(BQ24737RGRR)
Charger(BQ24737RGRR)
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
Z8C
Z8C
Z8C
1
36
5 2
4
PR100
10K_4
3
1
PC137
10u/25V_1206
36 48 Saturday, November 15, 2014
36 48 Saturday, November 15, 2014
36 48 Saturday, November 15, 2014
BAT-V 24737_DL
PC134
10u/25V_1206 PC63
2A
2A
2A
5
4
3
2
1
PC71
0.1u/50V_6
PR107
22_8
SYS_SHDN#
PC123
2200p/50V_6
PQ50
AON7410
PQ51
AON7752
+15V_ALWP
1
1
5 2
3
5 2
3
PD6
1PS302
PD7
1PS302
SYS_SHDN# 10,28,41
SYS_HWPG 35
SYS_SHDN#
4
4
2
3
1
2
3
1
PC70
0.1u/50V_6
*SHORT_4
PC57
0.1u/50V_6
PR197
PC60
0.1u/50V_6
PR92
1/F_6
+3VPCU
PR199
*SHORT_4
51225_EN1
51225_DH1
51225_VBST1
51225_SW1
51225_DL1
51225_FB1
PC61
0.1u/50V_6
PR85
*100K/F_4
20
16
17
18
15
14
PR86
*SHORT_6
VL 3V_LDO
PC65 10u/6.3V_6
7
PGOOD
EN1
DRVH1
VBST1
SW1
DRVL1
2
VFB1
VO1
19
51225_VCLK
13
VREG5
CS11CS2
VCLK
51225_CS1
PR82 84.5K/F_4
51225_VIN
12
VIN
PU5
TPS51225RUKR
5
26
51225_CS2
PR195 69.8K/F_4
PC64 0.1u/25V_4
3
VREG3
PR198
*SHORT_6
PC52 4.7u/6.3V_6
EN2
DRVH2
VBST2
SW2
DRVL2
VFB2
GND
GND
GND23GND24GND25GND
PR204
*SHORT_6
PR191
10K/F_4
6
10
9
8
11
4
21
22
SYS_SHDN#
51225_DH2
51225_VBST2
51225_SW2
51225_DL2
51225_FB2
PR91
1/F_6
PC56
0.1u/50V_6
37
VIN
PC120
2200p/50V_6
5 2
PQ46
4
4
AON7410
3
1
PL6
2.2uH_7X7X3
5 2
PQ49
AON7752
3
1
PR83
*4.7_6
PC51
*680p/50V_6
PC122
4.7u/25V_8
+3VPCU
+3VPCU
3.3 Volt +/- 5%
TDC : 4.7A
PEAK : 6.2A
OCP : 7.5A
Width : 200mil
PR80
6.81K/F_4
PR190
10K/F_4
PC128
0.1u/50V_6
+
PC127
220u/6.3V_6X4.2
OCP:7.5A
L(ripple current)
=(9-3.3)*3.3/(2.2u*0.355M*9)
~2.676A
Iocp=7.5-(2.676/2)=6.16A
Vth=6.16A*14mOhm+1mV=87.27mV
R(Ilim)=(87.27mV*8)/10uA
~69.81K
MAIND
D D
+5VPCU
VIN
+
+5VPCU
5 Volt +/- 5%
1 2
PC144
33u/25V_6X4.5
MAIND 38,39,41
PC126
4.7u/25V_8
TDC : 5.4A
PEAK : 7.2A
OCP : 9A
Width : 220mil
PL9
2.2uH_7X7X3
C C
+
PC146
220u/6.3V_6X4.2
OCP:9A
L(ripple current)
=(9-5)*5/(2.2u*0.3M*9)
=3.367A
B B
Iocp=9-(3.367/2)=7.32A
Vth=7.32A*14mOhm+1mV=103.43mV
R(Ilim)=(103.43mV*8)/10uA
=82.774K
PC141
0.1u/50V_6
PR186
15.4K/F_4
PR187
10K/F_4
PC76
*680p/50V_6
+15V
PR106
*4.7_6
+15V VIN
+5V_S5 +3V_S5
PR124
1M_6
A A
S5_ON
2
PQ26
DTC144EU
1 3
5
PR125
1M_6
PR84
22_8
3
2
PQ16
2N7002K
1
PR117
22_8
3
2
1
PQ24
2N7002K
2
VIN +5VPCU
PR122
1M_6
3
1
4
PR121
*1M_6
S5D MAIND MAIND S5D
PQ29
2N7002K
PC84
*2.2n/50V_4
+5VPCU
5 2
4
3
TDC : 1.5A
PEAK : 2A
Width : 80mil
1
PQ53
AON7408
+5V_S5
5 2
4
3
1
TDC : 2.4A
PEAK : 3.2A
Width : 100mil
3
PQ55
AON7408
+3VPCU
3
2
PQ47
AO3404
1
+5V
+3V +3V_S5
TDC : 1.4A
PEAK : 1.8A
Width : 110mil
+3VPCU
3
2
1
TDC : 1.2A
PEAK : 1.6A
Width : 60mil
2
PQ45
AO3404
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
SYSTEM 5V/3V (TPS51225)
SYSTEM 5V/3V (TPS51225)
SYSTEM 5V/3V (TPS51225)
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
Z8C
Z8C
Z8C
37 48 Saturday, November 15, 2014
37 48 Saturday, November 15, 2014
37 48 Saturday, November 15, 2014
1
2A
2A
2A
5
4
3
2
1
38
D D
+3V
PR72
*100K/F_4
HWPG_1.05V_S5 13,35
MAINON 32,35,39,41
S5_ON 35,37,41
C C
B B
PR171 *0_4
PR175 *SHORT_4
PR172
*100K/F_4
OCP=10A
L ripple current
=(19-1.05)*1.05/(2.2u*290k*19)
=1.555A
Vtrip=10-(1.555/2)*14mohm
=0.129V
Rlimit=0.129/10uA*8=103.293Kohm
PR68 105K/F_4
PR165 470K/F_4
51211V_EN 51211V_VBST
51211V_TRIP
51211V_TST
1
PGOOD
3
EN
2
TRIP
5
TST
12
GND
7
V5IN
PU4
TPS51211DSCR
GND13GND14GND15GND
16
DRVH
VBST
SW
DRVL
GND
4
+5VPCU
PC41
1u/10V_4
51211V_DRVH
9
10
8
51211V_SW
6
51211V_DRVL
11
FB
51211V_FB
PR71
*SHORT_6
PC42
0.1u/50V_6
PQ41
AON7752
5 2
PQ44
4
4
AON7410
3
1
5 2
3
1
PC118
2200p/50V_6
PL5
2.2uH_7X7X3
PR53
*4.7_6
PC37
*680p/50V_6
PC117
4.7u/25V_8
PR61
5.1K/F_4
PR63
10K/F_4
PC113
0.1u/50V_6
VIN
+
PC110
330u/2.5V_6X4.2
+1.05V_S5
+1.05V
1.05 Volt +/- 5%
TDC : 6.7A
PEAK : 8A
OCP : 10A
Width : 280mil
+1.05V_S5
5 2
MAIND 37,39,41
MAIND
4
3
1
PQ32
AON7408
+1.05V
TDC : 2.4A
PEAK : 3.2A
Width : 100mil
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Z8C
Z8C
1
Z8C
2A
2A
2A
38 48 Saturday, November 15, 2014
38 48 Saturday, November 15, 2014
38 48 Saturday, November 15, 2014
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
+1.05V(TPS51211)
+1.05V(TPS51211)
+1.05V(TPS51211)
5
4
3
2
1
TDC : 0.75A
PEAK : 1A
Width : 40mil
D D
TDC : 0.38A
PEAK : 0.5A
DDR_VTTREF
Width : 20mil
PC68
0.22u/10V_4
+3V
PR114
*100K/F_4
10/29
PC67
20
17
16
19
18
26
51216_REF
PR104
10K/F_4
C C
HWPG_VDDR 35
MAINON 32,35,38,41
SUSON 35
PR110
*0_4
PR111
*SHORT_4
PR113
200K/F_4
PR112
15.4K/F_4
51216_S3
51216_S5
51216_MODE
51216_TRIP
VREF=1.8V
PR211
*0_4
0.1u/10V_4
51216_S5 51216_S3
B B
PGOOD
S3
S5
MODE
TRIP
PAD
+DDR_VTT_RUN
PC73
10u/6.3V_6
21
22
PAD
REF
8
6
51216_REFIN
5
PAD
TPS51216RUKR
REFIN
9
39
PC75
10u/6.3V_6
Close to IC
Greater than or equal 40mil
+5VPCU
PC135
12
14
15
13
11
10
PR210
*SHORT_6
10u/6.3V_6
51216_DRVH
51216_VBST
51216_SW
51216_DRVL
PR108
2/F_6
2
3
1
4
VTT
VTTREF
VDDQSNS
PU6
VTTSNS
VTTGND
25
VLDOIN
V5IN
DRVH
VBST
SW
DRVL
PGND
GND
PAD23PAD24PAD
7
PC72
1u/10V_4
PC74
0.1u/50V_6
1
8
PQ52
AON6970
RDSon=3.2mohm
G1
S1/D2
G2
VIN
+1.35V_SUS
1.35 Volt +/- 5%
2
D1D1D1
PC140
2200p/50V_4
9
51216_SW
PR105
S2S2S2
567
*4.7_6
PC66
*680p/50V_6
PC139
4.7u/25V_8
PL8
0.68uH_7X7X3
10/12 change
PC138
0.1u/50V_6
Close to output cap
+
PC136
330u/2.5V_6X4.2
+
PC80
*330u/2V_7343
+1.35V_SUS
TDC : 12.6A
PEAK : 16.8A
OCP : 20A
Width : 520mil
+1.35V_SUS
+1.35V_SUS 4,5,14,15,30,43
stuff for C8 ODT power off
DDR_VTTT_PG_CTRL 4
OCP=10A
L ripple current
=(19-1.35)*1.35/(0.68u*400k*19)
=4.611A
Vtrip=10-(4.611/2)*2.5mohm
A A
=0.01923V
Rlimit=0.01923/10uA*8=15.389Kohm
OCP=20A
L ripple current
=(19-1.5)*1.5/(0.68u*400k*19)
=5.079A
Vtrip=20-(5.079/2)*2.5mohm
=0.04365V
Rlimit=0.04365/10uA*8=34.92Kohm
PR212 *SHORT_4
5
51216_S3
PR99
30.1K/F_4
PC69
0.01u/25V_4
DDR=1.35V
OCP=10A
PR95=15.4K/F_4
PR97=30.1K/F_4
DDR=1.5V
OCP=20A
PR95=35.7K/F_4
PR97=51K/F_4
4
Mode Frequency Discharge mode
200K 400K Tracking Discharge
100K 300K Tracking Discharge
S3 S5
S0
S3 (mainon off)
S4/S5
1
0
1
1
3
ON
ON ON
OFF
VTT REF +1.35VSUS
ON ON
OFF
OFF OFF 0 0
MAIND 37,38,41
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
MAIND
10/12 reserve
DDR=1.5V,PC9032 & PQ9016 POP
DDR 1.35V(TPS51216)
DDR 1.35V(TPS51216)
DDR 1.35V(TPS51216)
3
TDC : 0.56A
1
PQ54
*AO3404
PEAK : 0.75A
Width : 20mil
+1.5V
Z8C
Z8C
Z8C
39 48 Saturday, November 15, 2014
39 48 Saturday, November 15, 2014
39 48 Saturday, November 15, 2014
1
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
2A
2A
2A
5
4
3
2
1
IMON offset
VIN
PR22
2M/F_4
PR17
51624_OCP-I
D D
C C
IMVP_PWRGD 5,10
2M/F_4
PR20
30K/F_4
PC91
H_PROCHOT# 4,35,36
VR_SVID_CLK 5
VR_SVID_ALERT# 5
VR_SVID_DATA 5
PR130 *SHORT_4
VRON 35
VCC_SENSE 5
VSS_SENSE 12
PR9 *0_4
PR11 *SHORT_4
VRON_CPU 5
Parallel
B B
+1.05V_VCCST
PR6
130/F_4
0.1u/10V_4
PR136
*100K/F_4
+VCCIN
51624_VRON
PR141
100K/F_4
PR2
*75/F_4
+3V_S5 +3V
PR18
*100K/F_4
PR127
*10_4
PR128
*10_4
Close to the
CPU side.
+3V_S5 51624_VREF +5V_S5
1_6
PR133
1u/6.3V_4
PR144
36.5K/F_4
20K/F_4
PC2
PR15
0.33u/6V_4
PR14
PR142
665K/F_4
PR16
PR143
100K/F_4
Close to VR
51624_O-USR
51624_F-IMAX
51624_VREF
PR3
56_4
PC87
*330p/50V_4
PC88
*0.01u/50V_4
*56_4 PC6
PR129
VR_SVID_CLK
VR_SVID_ALERT#
VR_SVID_DATA
51624_SKIP#
51624_VRON
51624_VFB
51624_GFB
51624_VREF
PR126 4.75K/F_4
PR4 *SHORT_4
PR5 *SHORT_4
9/5 Change 4.7K to 4.75k
51624_VDD
9
10
2
27
VDD
VREF
O-USR
30
VR_HOT
31
VCLK
32
ALERT
1
VDIO
3
PGOOD
7
SKIP
8
VR_ON
24
VFB
23
GFB
51624_COMP
8/4 Change
PC4
PR131
10K/F_4
*100p/50V_4
PR1
4.75K/F_4
F-IMAX
PU1
TPS51624RSM
OCP-I12IMON
DROOP25COMP
13
26
51624_DROOP
51624_IMON
51624_OCP-I
PC1
1500p/50V_4
Place NTC close to the
VCORE Hot-Spot.
PR148
*90.9K/F_4
*39.2K/F_4
39K/F_4
PR149
150K/F_4
51624_THERM
51624_V5A
51624_B-RAMP
11
B-RAMP
GND29PAD34PAD35PAD36PAD37PAD38PAD39PAD40PAD41PAD
PR139
PR145
51624_VBAT
51624_SLEWA
28
14
15
16
V5A
VBAT
SLEWA
THERM
PWM1
PWM2
MODE
PAD
33
348K/F_4
PC10
4700p/25V_4
39K/F_4
CSP1
CSN1
CSN2
CSP2
+5V_S5
PC96
1u/10V_4
2
VDD
VIN
VSW
PGND
PAD
PU7
CSD97374CQ4M
51624_CSP1
PC9
*0.1u/25V_4
51624_CSN1
PC7
*0.1u/25V_4
5
4
3
9
Close to the
VR side.
PR147
100K/F_4_4250NTC
PC11
PR146
9.09K/F_4
1000p/50V_4
20/F_6
PR132
PR19
10K/F_4
PC3
2.2u/10V_4
8/4 Change
PR134
2.2/F_6
51624_SKIP#
51624_PWM1
CS_BSTR1
1
SKIP#
8
PWM
6
BOOT_R
7
CS_BST1
BOOT
PC93
0.22u/25V_6
Add 11 GND VIAs
for thermal pad
HW/BW-U 15W(1 phase)
Icc TDC PL2 14A
Icc Max 32A
6
51624_PWM1
5
51624_PWM2
4
51624_NC
17
51624_CSP1
18
51624_CSN1
19
51624_CSN2
20
51624_CSP2
21
NC
22
N/C
42
PR135
*SHORT_8
+3V_S5
PR137
150K/F_4
OCP 37A
Fsw 1.2MHz
VCORE L/L
R_DC_LL - 2.0mV/A
R_AC_LL - 7.0mV/A
PC5
0.1u/50V_6
CS_SW1
PR151
PC95
0.12u/10V_4
PR150
Close with
phase1 inductor
PC92
4
PR12
4.7u/25V_8
PR13 *SHORT_4
PC90
2200p/50V_4
DCR= 0.66mOhm
PC86
PC94
22u/6.3V_8
0.1u/10V_4
PC89
4.7u/25V_8
PL1
0.15uH_7X7X4
1 2
3
PR10
2.2_6
2.26K/F_4
PC8
1000p/50V_6
2.94K/F_4
PR140
16.9K/F_4
10K/F_4_3435KNTC
1 2
+
PC105
33u/25V_6X4.5
+VCCIN
+
PC98
PC99
22u/6.3V_8
*330u/2V_7343
+VCCIN
TDC : 14A
PEAK : 32A
OCP : 37A
VCORE Load Line :
-2mV/A
40
VIN
PR8
*SHORT_4
51624_CSP2
51624_PWM2
51624_CSN2
PR138
PR7
*SHORT_4
*0_4
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
5
4
3
2
Saturday, November 15, 2014
PROJECT :
+VCCIN(TPS51624)
+VCCIN(TPS51624)
+VCCIN(TPS51624)
Z8C
Z8C
Z8C
40 48
40 48
1
40 48
2A
2A
2A
1
2
3
4
5
+3VPCU
+1.5V
R1
R2
1.5Volt +/- 5%
TDC : 0.6A
PEAK : 0.8A
Width : 40mil
PR214
100K/F_4
PR213
113K/F_4
PC147
0.1u/10V_4
+3V
PR217
MAINON
*100K/F_4
10/29
PR218
*SHORT_4
1000p/50V_4
PC85
*100p/50V_4
A A
HWPG_1.5V 35
PC142
PC145
10u/6.3V_6
PR116
8.06K/F_4
PC81
1500p/50V_4
PC83
0.1u/25V_6
PR215
121K/F_4
PU10 TPS54318RTER
16
VIN
1
VIN
2
VIN
14
PWRGD
15
EN
7
COMP
8
RT/CLK
9
SS
PC143
0.01u/25V_4
10
PH
11
PH
12
PH
13
BOOT
6
VSNS
3
GND
4
GND
5
AGND
PAD17PAD18PAD19PAD20PAD21PAD
22
*SHORT_6
PR216
PC150
0.1u/50V_6
1.5V_VSNS
V0=0.8*(R1+R2)/R2
PL10
1uH_7X7X3
PC148
10u/6.3V_6
+1.5V
PC149
10u/6.3V_6
41
DDR=1.5V ,This block DNP
B B
Thermal protection
PR158
1.33K/F_4
VL VL
S5_ON
PR159
200K/F_4
2.469V
PR155
200K/F_4
S5_ON 35,37,38
C C
Need fine tune
for thermal protect point
Note placement position
PR157
S5_ON
2
10K/F_4_3435NTC
3
PQ35
2N7002K
1
LM393_PIN2
2
PQ37
DTC144EU
VIN
PD8
DA2J10100L
VIN
PR161
1M_6
1
PQ36
AO3409
2
PQ23
2
PR109
*100K/F_6
DTC144EU
1 3
3
1
PC102
0.1u/50V_6
PR156
*SHORT_6
PR152
200K_6
PC103
0.1u/50V_6
SYS_SHDN# 10,28,37
3
2
PQ34
2N7002K
1
1 3
8 4
3
+
2
-
PU8A
BA10393F
MAINON 32,35,38,39
PR115
1M_4
MAINON_ON_G
PR119
1M_4
PR79
22_8
3
2
PQ19
2N7002K
1
3
2
1
PR120
22_8
PQ27
2N7002K
+1.05V +1.5V
PR160
22_8
3
2
PQ33
2N7002K
1
10/12 reserve
DDR=1.5V POP
3
2
1
PR123
*22_8
PQ28
*2N7002K
+15V +5V +3V
PR118
1M_4
MAIND
3
2
PQ25
2N7002K
1
PC82
*2200p/50V_4
MAIND 37,38,39
D D
For EC control thermal protection (output 3.3V)
1
5
+
7
6
-
PU8B
BA10393F
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
3
4
Date: Sheet of
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
+1.5V/+1.8V/Thermal protect
+1.5V/+1.8V/Thermal protect
+1.5V/+1.8V/Thermal protect
Z8C
Z8C
Z8C
41 48 Saturday, November 15, 2014
41 48 Saturday, November 15, 2014
5
41 48 Saturday, November 15, 2014
2A
2A
2A
5
4
3
2
1
VIN
PC108
GPU_THAL#
PR168
*EV@1.33K/F_4
Z8C
Z8C
Z8C
42 48
42 48
42 48
42
12/7 add
10U/25V_8*2
EV@10u/25V_8
VIN
2A
2A
2A
+3V
+5V_S5
PQ38
EV@AON6414AL
D D
VGPU_EN 8
3V_MAIN_PWGD 18,43
0815 PSI PU 10K at GPU side arealdy
VGPU_PSI 19
C C
VGPU_PWRGD 17
VGPU_PWMVID 19
0816 remove GPU_STDBY from NV reply
3
PQ15
GPU_VCCP_SENSE 16
GPU_VSSP_SENSE 16
EV@2N7002K
2
PR64
EV@10K_4
5
1
B B
A A
PR170
*EV@0_4
PR166 EV@0_4
+3V_S5
PR174 *EV@SHORT_4
PR57 *EV@SHORT_4
PR74 *EV@SHORT_4
PR178
R2
PR184
EV@5.1K/F_4
R3
R6
R4
C1
R5
PC45
EV@2700p/50V_4
PR185
*EV@SHORT_4
PR179
*EV@SHORT_4
+VGACORE
+3V
*EV@1K/F_4
PR77
EV@20K/F_4
PR182
EV@2K/F_4
PR181
EV@18K/F_4
PR180
EV@0_4
PR183
EV@100_4
PR176
EV@100_4
PR164
PR66
*EV@10K_4
PR70
PC38
EV@100K_4
PR167
EV@10K_4
PC47
EV@1u/6.3V_4
R1
PR76
EV@20K/F_4
9/5 change
to open
printfoot
0402
1642_FBRTN
1642_FBRTN
EV@2.2_6
EV@0.1u/25V_4
PC46
EV@33p/50V_4
PR78
EV@1K/F_4
4
PC44
PR177
EV@66.5K/F_4
PC119
*EV@0.1u/25V_4
*EV@0.1u/25V_4
1642_TON
1642_PVCC
1642_EN
1642_PSI
1642_PGOOD
1642_VID
1642_VREF
1642_REFADJ
1642_REFIN
1642_COMP
1642_FB
PR75
EV@16.2K/F_4
PC49
EV@4700p/25V_4
PU3
EV@ UP1642RQAG
9
TON
21
PVCC
3
EN
4
PSI
16
PGOOD
5
VID
8
VREF
6
REFADJ
7
REFIN
12
COMP
11
FB
10
FBRTN
N15V-GM-S-A2 (820M) Value
PR76 CS32702FB16
PR77 CS27502FB11
PR182
PR181
PR180
PC45
DSBL/ISEN1
TALERT#/ISEN2
GND/PWM3
TSNS/ISEN3
PAD
25
Add 3 GND VIAs
for thermal pad
(R1)
(R2)
CS00002JB38
(R3)
CS26202FB17
(R4)
CS21742FB00
(R5)
CH25604KB18
(C1)
UGATE1
BOOT1
PHASE1
LGATE1
UGATE2
BOOT2
PHASE2
LGATE2
2
1
24
15
23
17
18
19
14
20
22
13
1642_UGATE1
1642_BOOT1
1642_PHASE1
1642_ISEN1
1642_LGATE1
1642_UGATE2
1642_BOOT2
1642_PHASE2
GPU_THAL#
1642_LGATE2
1642_TSNS
5600P
3
27K
7.5K
0
6.2K
1.74K
PR56
EV@2.2/F_6
PC40
EV@0.22u/25V_6
RDSon 2.2mohm
PC36
PR50
EV@0.22u/25V_6
EV@2.2/F_6
RDSon 2.2mohm
N15S-GT-S-A2 (840M) Value
PR76 CS32002FB29
(R1)
PR77
(R2)
PR182
(R3)
PR181
(R4)
PR180
(R5)
PC45
(C1)
PQ40
EV@AON6752
PQ12
EV@AON6414AL
PQ39
EV@AON6752
5
4
PR46
213
EV@10K/F_4
5
4
213
5
4
PR47
213
EV@10K/F_4
5
4
213
CS32002FB29
CS22002FB19
CS31802FB10
CS00002JB38
CH22706KB14
12/7
PC107
EV@0.1u/50V_6
PL3
EV@0.36uh_LDCR
12/7
change to
PR41
10x10
EV@2.2_6
PC27
EV@1000p/50V_6
PC32
EV@0.1u/50V_6
PL4
EV@0.36uh_LDCR
12/7
change to
PR42
10x10
EV@2.2_6
PC30
EV@1000p/50V_6
20K
20K
2K
18K
PC106
PC111
EV@4.7u/25V_8
EV@4.7u/25V_8
DRC=0.76mohm
PC23
EV@0.1u/10V_4
+
PC33
PC34
EV@4.7u/25V_8
EV@4.7u/25V_8
DRC=0.76mohm
PC104
EV@0.1u/10V_4
+3V
1642_PVCC 1642_ISEN1
1642_VREF 1642_TSNS
Place NTC close to the
VGPU Hot-Spot.
PC112
PC25
EV@10u/6.3V_6
1 2
PC114
EV@33u/25V_6X4.5
PC26
EV@10u/6.3V_6
PR65
EV@10K/F_4
PR62
EV@10K/F_4
PR173
EV@15.8K/F_4
EV@10u/25V_8
+
+
+VGACORE 16
GPU_THAL#
PR169
EV@100K/F_4_4250NTC
PC115
EV@10u/25V_8
+VGPU_CORE
1 Volt +/- 5%
TDC : 40A
PC28
PEAK : 58A
OCP : 70A
Width : 1800mil
EV@330u/2V_7343
PC29
EV@330u/2V_7343
47/25V
change to
10U/25V_8*2
+VGACORE
PC109
EV@10u/25V_8
+VGACORE
0
2700P
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
2
Saturday, November 15, 2014
PROJECT :
+VGPU_CORE(UP1642PQAG)
+VGPU_CORE(UP1642PQAG)
+VGPU_CORE(UP1642PQAG)
1
5
4
3
2
1
VIN
+5V_S5
PR33
EV@100K/F_4
PC101
*EV@1u/10V_4
PR28
*EV@SHORT_4
*EV@1u/10V_4
+3V
PR35 EV@100K/F_4
PR32 EV@470K/F_4
PC13
HWPG_1.5VGFX
1.5GFX_EN
1.5GFX_TRIP
1.5GFX_TST
2
1 2
PR27
EV@100K_4
1
PGOOD
3
EN
2
TRIP
5
TST
12
GND
PQ1
1 3
EV@PDTC143TT
7
V5IN
PU2
EV@TPS51211DSCR
GND13GND14GND15GND
16
VIN
PR26
EV@1M_4
PR25
EV@1M_4
DRVH
VBST
SW
DRVL
GND
4
+1.05V_GFX 16,17,18
+1.35V_GFX 17,20,21,22,23,30
+3V_GFX 16,18,19,35
+1.35V_GFX
+1.5V_GFX
1.5 Volt +/- 5%
TDC : 6.3A
PEAK : 8.4A
OCP : 10A
Width : 250mil
PQ31
EV@AON7410
PR29
*EV@4.7_6
PC14
*EV@680p/50V_6
PC15
EV@2200p/50V_6
PL2
EV@2.2uH_7X7X3
PC18
EV@1u/10V_4
1.5GFX_DRVH
9
10
8
6
11
FB
1.5GFX_VBST
1.5GFX_SW
1.5GFX_DRVL
1.5GFX_FB
*EV@SHORT_6
PR30
PC17
EV@0.1u/50V_6
PQ30
EV@AON7752
5 2
4
3
1
5 2
4
3
1
PC16
EV@4.7u/25V_8
PR154
EV@9.31K/F_4
PR153
EV@10K/F_4
PC100
EV@0.1u/50V_6
+
PC97
EV@330u/2V_7343
DDR=1.5V ,This block DNP
+15V +1.05V_GFX
PR23
EV@22_8
3
2
PQ2
EV@2N7002K
1
PR24
EV@1M_4
dGPU_D1
3
2
PQ3
EV@2N7002K
1
+1.05V_S5
4
PC12
*EV@2.2n/50V_4
3
5 2
1
PQ4
EV@AON7408
+1.05V_GFX
+1.05V_GFX
TDC : 2.3A
PEAK : 3A
Width : 100mil
0815 stuff PR177 to enable
+1.05V_GFX
D D
HWPG_1.5VGFX 18
FBVDDQ_EN 17
PR34 *EV@SHORT_4
modify +1.5V_GPU enable pin 0814
OCP=10A
L ripple current
=(19-1.5)*1.5/(2.2u*290k*19)
=2.165A
Vtrip=10-(2.165/2)*14mohm
=0.1248V
C C
Rlimit=0.1248/10uA*8=99.87Kohm
modify +1.05V_GFX enable pin 0814
3V_MAIN_PWGD 18,42
43
VIN
B B
PR37
DGPU_PWR_EN 10
A A
FBVDDQ_EN
5
*EV@SHORT_4
PC20
*EV@1u/10V_4
PR60
*EV@0_4
PC39
*EV@1u/10V_4
1 2
PR36
EV@100K_4
1 2
PR67
*EV@100K_4
2
PQ7
1 3
EV@PDTC143TT
2
PQ14
1 3
*EV@PDTC143TT
VIN
PR39
EV@1M_4
PR38
EV@1M_4
PR52
*EV@1M_4
PR51
*EV@1M_4
4
PR40
EV@22_8
3
2
PQ8
EV@2N7002K
1
PR162
*EV@22_8
3
2
PQ43
*EV@2N7002K
1
+15V +3V_GFX
PR31
EV@1M_4
dGPU_D
3
2
PQ6
EV@2N7002K
1
+15V +1.35V_GFX
PR163
*EV@1M_4
3
2
PQ42
*EV@2N7002K
1
dGPU_D2
PC19
*EV@2.2n/50V_4
PC116
*EV@2.2n/50V_4
+3VPCU
3
2
1
PQ5
EV@AO3404
+3V_GFX
+3V_GFX
TDC : 0.76A
PEAK : 1A
Width : 40mil
+1.35V_SUS
5
PQ10
213
*EV@RJK03K5DPA
+1.35V_GFX
+1.5V_GFX
TDC : 6.3A
PEAK : 8.4A
4
OCP : 10A
Width : 250mil
10/12 reserve
DDR=1.5V ,This block POP
3
2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
+1.5V_GFX/+1.05V_GFX/+3V_GFX
+1.5V_GFX/+1.05V_GFX/+3V_GFX
+1.5V_GFX/+1.05V_GFX/+3V_GFX
1
Z8C
Z8C
Z8C
43 48
43 48
43 48
2A
2A
2A
1
2
3
4
5
6
7
8
VGA power up sequence
44
+3VPCU
A A
PCH +3V_GFX
dGPU_PWR_EN
MOSFET
VGA_VID
VIN
VGPU_EN
PWM
VGPU_PWRGD
EC_FB_CLAMP
+VGPU_CORE
VIN
OR
Gate
FBVDDQ_EN
PWM
+1.35V_GFX
HWPG_1.5VGFX
VGPU_PWRGD
+1.05V_S5
1.05V_GFX_EN
MOSFET +1.05V_GFX
DGPU_PWROK
EC
B B
VGA Reset
PCH
PLTRST#
DGPU_HOLD_RST#
PEX_RST timing
I/O 3.3V
PEX_RST
C C
D D
Trise >= 1uS Tfail <=500nS
PEGX_RST#
Power States
POWER PLANE
VIN
+3V_RTC
+3VPCU
+5VPCU
+15V
+5V_S5
+5V
+1.35VSUS
+DDR_VTT_RUN
LCDVCC
+1.5V
+1.05V
+VCCIN
+VGPU_CORE S0 VGPU_EN External GPU POWER
+3V_GFX External GPU POWER dGPU_PWR_EN S0
+1.35V_GFX
+1.05V_GFX
VOLTAGE
+10V~+19V
+3V~+3.3V
+3.3V
+5V
+15V
+3.3V
+5V
+5V
+3.3V
+1.35V
+0.675V
+3.3V
+1.5V
+1.05V
variation
variation
+3.3V
+1.35V
+1.05V
DESCRIPTION
RTC POWER
EC POWER
USB CHARGE POWER
CHARGE PUMP POWER
LAN/BT POWER
USB POWER
HDD/SPK/HDMI POWER
PCH/GPU/Peripheral component POWER +3V
CPU/SODIMM/MD POWER
SODIMM/MD Termination POWER
LCD POWER
MINI CARD/NEW CARD POWER
PCH CORE VCCST POWER MAINON
CPU CORE POWER
External GPU POWER
External GPU POWER
CONTROL
SIGNAL
ALWAYS MAIN POWER
ALWAYS
ALWAYS
ALWAYS
S5_ON +3V_S5
S5_ON
MAINON
MAINON
SUSON
MAINON
LVDS_VDDEN
MAINON
VRON
FBVDDQ_EN
1.05V_GFX_ENS0S0
ACTIVE IN
ALWAYS
ALWAYS
ALWAYS
ALWAYS
ALWAYS ALWAYS
S0-S5
S0-S5
S0
S0
S0-S3
S0
S0
S0
S0
S0
Thermal Follow Chart
CPU
CORE PWR
GPU NTC
Thermal
Protection
GPU
CORE PWR
H_PROCHOT#
dGPU_OPP#
GPU_THAL#
H/W Throttling
GPIO12_ACIN
CPU NTC
Thermal
Protection
HSW ULT
SM-Bus1
EC
dGPU_ALT#
dGPU_OTP#
dGPU
PM_THRMTRIP# SYS_SHDN#
SM-Bus1
FAN1_PWM
FAN2_PWM
WIRE-AND
GPIO12 HW throttle
over power protect
CPU FAN
GPU FAN
3V/5 V
SYS PWR
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
dGPU_OPP# EC notify HW throttle over power protect
dGPU_ALT# for ADPS circuit to infrom EC NV dGPU VPS Alert
dGPU_OTP# VGA thrmtrip# => inform EC over temperature protect
1
2
3
4
5
6
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
PWR Status & GPU PWR CRL & THRM
PWR Status & GPU PWR CRL & THRM
PWR Status & GPU PWR CRL & THRM
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
PROJECT :
Z8C
Z8C
Z8C
44 48 Saturday, November 15, 2014
44 48 Saturday, November 15, 2014
44 48 Saturday, November 15, 2014
8
3A
3A
3A
5
Battery Mode
Support Deep Sx
MAINON
+5V
+3V
+1.05V
MAINON
9
8
21
22
21
?
17
21
11
10
12
21
8
18
19
23
24
28
27
25
24
12
29 29
HWPG_VDDR
HWPG_1.05V
HWPG_1.5V
+5VPCU
3
+3VPCU
D D
3
S5 PWR
VIN
1
DDR VDDQ
VR
S3
S5
C C
+3VPCU
3
1.5V
VR
EN
+5V_S5
+3V_S5
S5_ON
+1.35V_SUS
DDR_VTTREF
+DDR_VTT_RUN
HWPG_VDDR
PG
DDR_PG_CTRL
MAINON
+0.75V_ON
SUSON
26
+1.5V
HWPG_1.5V
PG
RUN PWR
B B
A A
3
3
9
+5VPCU
+3VPCU
+1.05V_S5
PCH
MOS1
MOS2
MOS3
G
VIN
1
+1.05V_S5
VR
EN
S5_ON
MAINON
5
PG
+1.05V_S5
HWPG_1.05V
4
VIN
3V/5V
VR
EN2
1
VL
+15V
EN1
NBSWON#
3 3
+3VPCU +5VPCU
3V_LDO
2
PWR
BTN
7
30
HWPG
+0.75V_ON
EC_PWROK
HWPG_1.05V_EC#
?
+1.05V
VIN
1
IMVP
0 ohm
+1.05V_VCCST
+VCCIN
33
VR
34
32a
32b
37
SVID
IMVP_PWRGD
PG
EN
VRON_CPU
VRON
CPU
4
3
+3VPCU
3
2
depend on A measure
+3.3V_DSW
result to implement
EC
VRON
MAINON
for B test
5a
13
14
15
S5_ON
SUSON
DSW_ON
6
DPWROK
RSMRST#
SB_ACDC
DNBSWON#
SUSC#
SUSB#
PCH_SUSACK#
PCH_SUSPWARN#
PCH_SLP_SUS#
34
16
20
31
35
38
IMVP_PWRGD
4
2
+3.3V_DSW
EN
Delay DSW power well 10ms
EC_PWROK
PCH_CLK
PLTRST#
5b
SYS_PWROK
1
CHARGER
DPWROK
RSMRST#
ACPRESENT
PWRBTN#
SLP_S4#
SLP_S3#
SUSACK
SUSWRAN
SLP_SUS#
APWROK
PCH_PWROK
PLTRST#
SYS_PWROK
1
BAT-V VIN
Battery
DSW PWR
PCH
3
SUS PWR
ASW PWR
SPI PWR
HSIO PWR
PLL PWR
CORE PWR
SDIO PWR
HDA PWR
+3VPCU or +3.3V_DSW
45
+3VCC_S5
+1.05V
+3V_S5
+V1.05DX_MODPHY
+1.05V
+1.05V
+3V
+3V_S5
36
31
12
31
36
HWPG_1.05V_EC#
30a
HWPG+1ms
EC_PWROK
HWPG_1.05V
EC_PWROK
SYS_PWROK
10K ohm
VCCST_PWRGD_EN
2
32b 30a
8 17 2131
3
38
PLTRST#
CORE PWR
CPU
RESET#
PROCPWRGD
SVID
SVID
22
37
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
VDDQ PWR
VCCST PWR
VR_EN VRON_CPU
SM_PG_CNTL1
DDR_PG_CTRL
VR_READY
VCCST_PWRGD
IMVP_PWRGD
VCCST_PWRGD_EN
32a
34
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Power Sequence
Power Sequence
Power Sequence
1
+VCCIN
+1.35V_SUS
+1.05V_VCCST
Z8C
Z8C
Z8C
45 48 Saturday, November 15, 2014
45 48 Saturday, November 15, 2014
45 48 Saturday, November 15, 2014
3A
3A
3A
1
2
3
4
5
6
7
8
+3V_S5
+3V
46
SDRAM
2.2K 2.2K
AP2
A A
SMB_PCH_CLK
AH1
SMB_PCH_DAT
+3.3V_RUN
2N7002DW
Level shift
CLK_SCLK
CLK_SDATA
4.7K 4.7K
Touch PAD
+WL_VDD
XDP
WLAN
Haswell
ULT
+3V_S5
2N7002DW
Level shift
WLAN_CLK_SCLK
WLAN_CLK_SDATA
4.7K
4.7K
+3V_S5
B B
AN1
SMB_ME0_CLK
AK1
SMB_ME0_DAT
2.2K 2.2K
+3V_S5
AU3
SMB_ME1_CLK
AH3
SMB_ME1_DAT
*2.2K *2.2K
+3V_S5
+3V_S5
*2N7002DW
Level shift
3V3MISC
C C
SIO
2ND_MBDATA
116
2ND_MBCLK
115
10K 10K
+3V_GFX
2N7002DW
Level shift
+3VPCU
4.7K 4.7K
dGPU
100
ITE8587
10K 10K
D D
1
110
MBCLK
111 MBDATA
2
3
4
100
5
Battery
Charger
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
6
Date: Sheet of
7
PROJECT :
Block Diagram
Block Diagram
Block Diagram
Z8C
Z8C
Z8C
3A
3A
46 48 Saturday, November 15, 2014
46 48 Saturday, November 15, 2014
46 48 Saturday, November 15, 2014
8
3A
defult
5
reserve
SYS_HWPG
1
D D
PWR
3V_LDO
1
EN!
EN2
PWRGD3V_LDO
3V/5V
TPS51225
Vin
S5_Vout
S3_Vout
VIN
C C
HWPG_1.05V
PWRGD
S5_ON
MAINON
Vin
+1.05V_S5
TPS51211
EN
Vout
HWPG_1.5VGFX
10
VGPU_PWRGD
9
+1.05V_S5
VIN
2
EC
B B
4
EC
4
+5VPCU
+3VPCU
AND Gate
PCH
MAIND
4
1.05V_GFX_EN
S5D
2
MAIND
4
S5D
2
MAIND
4
dGPU_PWR_EN
MDV1528Q
MDV1528Q
MDV1528Q
MDV1528Q
AO3404
AO3404
AO3404
+1.05V
+1.05V_GFX
3
+5V_S5
+5V
+3V_S5
+3V
+3V_GFX
EC
9
7
VIN
7
EC_FB_CLAMP
VGPU_PWRGD
VGPU_EN
VRON_CPU
VRON
2
VIN
PCH
Vin
VGPU_EN
VIN
OR Gate
PWRGD
CPU VCCIN
TPS51622
EN
Vin
FBVDDQ_EN
IMVP_PWRGD
Vout
PWRGD
VGPU Core
uP1642
EN
PWRGD
+1.35V_GFX
Vin
TPS51211
VGPU_PWRGD
Vout
HWPG_1.5VGFX
EN
+VCCIN
Vout
1
47
9
+VGPU_CORE
10
+1.35V_GFX
HWPG_VDDR
3
EC
DDR_VTTT_PG_CTRL
PCH
A A
EC
MAINON
4
+0.75V_ON
S5 EN
S3 EN
PWRGDSUSON
+1.35V_SUS
TPS51216
Vin
S5_Vout
S3_Vout
+1.35V_SUS
DDR_VTTREF
+DDR_VTT_RUN
+3VPCU
Vin
MAINON
VIN
5
4
3
2
PWRGD
+1.5V
TPS54318
EN
HWPG_1.5V
Vout
+1.5V
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
ULT PWR CONTROL
ULT PWR CONTROL
ULT PWR CONTROL
Z8C
Z8C
Z8C
47 48 Saturday, November 15, 2014
47 48 Saturday, November 15, 2014
1
47 48 Saturday, November 15, 2014
3A
3A
3A
5
Version
Model
Z8C
A
BA42_HB
1. Remove DP and 1 USB 2.0 , TPM Connect (reserve on board) (Page 23,27,31)
2. Add 2 USB 3.0 and CRT on MB . (Page 31)
3. Change Y7 to small size crystal. (Page 08)
4. Reserve C486 for DMIC power. (Page 30)
5. Add ODT1,CS1,CKE1.ZQ1 to supoort 512MX16. (P age 14)
6. Change USB 3.0 , TP , FP , NGFF , SPK connect.
7. Remove Lid SW SW6 and Screw Pad fo 2014 Acer spec. (Page 29)
D D
C C
8. Modify EC pin define to follow ZQ0. (Page 34)
9. Add GC6_FB_EN and resever DGPU_EVENT# for GC6 funtion. (Page 19,20)
10. Remove U34 EC ROM. (Page 08 )
11 Chagne Z8C GPIO pin define same as. ZQ0. (Page 02 ~13)
12 Remove U40 LDO circuit and change to PR233. (Page 11)
13 Remove SMBUS Q66 for NGFF. (Page 26)
14 Change WIGIG PCIE from port 1 to port 2. (Page 09)
B
15 Change CN6,CN7,CN8,CN13,CN15,CN16,CN17,JDIM1 footprint for SMT request.
16 Correct L18,L19,L20 footprint from 0603 to 0402. (Page 35 )
17 Add R790,R791_0 ohm (CS00002JB3 8) for wigig CLK and swap USB4 D+/D-. (Page 27)
18 Change U18,U19,U48 to SOT23 type AL000524007,and U49 to SOT23 type AL000524003 . (Page 32)
19 PR103 Change from 0 ohm to shorpad , PR180 from short pad to 0 ohm. (Page 36, 42)
21 pop C512,C513_22p (CH02206JB08)for DMIC EMI request.
pop C486_1000p (CH21006JB10) and add C781_0.1u(CH41002KB93) for DMIC EMI request.
22 pop R450,R451,R452,R453_ 100 ohm (CS11002FB22)f or HMDI EMI request. (Page 26)
23 Change CN3 CRT Connect to DFDS15FR425 for SMT request . (Page 24)
24 Change R70 from 4.7K to 1.5K(CS21502FB14)for GPU Core not turn on issue.. (Page 18 )
25 Non stuff R754,R760. (Page 3 3)
26 Hole19 change to MBZRQ002010.
Hole12,Hole15 change to MBZRQ001010 .
27 Change Q21 ,Q22,Pin 2 ,5 from +WL_VDD to +3V_S5. (P age 27)
C
28 Change R332 from shoart pad to 2.2 ohm. (Page 35)
29 unstuff Q39. (Page 0 5)
30 Cancle Colay L1, L6,L22,L24. (Page 29)
31 Short Pad 0402: R85,R377,R497,R601 ,R616,R679,R183,R124,R218,R181,R21 7,R759,R755,R761,R316,R317,R71 1,R712,R296,R302,R311,R321,R72,R73 ,R692,R690,R249,R256,R276,R281 ,R518
Short Pad 0603: R273,R494,R319,R320,
32 Remove J1. (Page 08)
33 Stuff KB Backlight funtion -R394,Q31,C485,C468,C470,CN16 (Page 34)
34 PR139 change from 365k(CS43652FB1 0) to 348k(CS43482FB16). (Page 40)
35 Unstuff RP1,it is internal pu high from EC. (Page 34)
36 Remove R714,R715. (Page 34)
41 Short Pad 0402: R1,R2,R27,R29,R199,R294,R3 07,R383,R389,R396,R414,R417,R42 7,R434,R438,R460,R464,R769,R785
D
Short Pad 0603: R79,R84,R113,R145,R168,R1 86,R200,R205,R211,R426,R749,L3 2,
Short Pad 0805: PR21,R117,R128,R133 ,R144,R165,R229,R232,R437,R698,R70 8,R713
42 Remove JP1,JP2,JP3
4
3
2
1
CHANGE LIST
(Page 40) 20 PR126 change to 4.75K CS24752FB12.
(Page 31)
(Page 19) 38 UnStuff R177 and R182 .
(Page 35) 39 UnStuff Q30 .
(Page 37) 37 Change PU5 from TPS51225BRUKR to TPS51225RUKR.
(Page 43) 40 Change PR154 from 11.5k to 9.31k for 1.35GFX .
B B
A A
PROJECT MODEL
DOC NO.
:
PART NUMBER: DRAWING BY: REVISON:
5
ZRQ APPROVED BY:
4
DATE:
3
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
Z8C
PROJECT :
Z8C
PROJECT :
Change li st-2
Change li st-2
Change li st-2
Z8C
48 48 Saturday, November 15 , 2014
48 48 Saturday, November 15 , 2014
48 48 Saturday, November 15 , 2014
1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
3A
3A
3A