![](/html/8d/8ddb/8ddb943ffc8acad15cf94dc59ead6cad5dc6c7fa57ff2d0071517dfc9c4d7522/bg1.png)
5
www.schematic-x.blogspot.com
4
3
2
1
BOM
Z8C_GDDR3 SHB ULT SYSTEM BLOCK DIAGRAM
Dual Channel DDR III
P14
P28
1600 MHZ
USB2-3
USB2-6
USB2-5
USB2-7
SATA0
HSW/ BDW ULT 15W
MCP 1168pins
IMC
DC+GT3
40 mm X 24 mm
SATA
Integrated PCH
USB2.0
PCI-E x4
TX/RX
CLK
eDP
USB3.0/2.0
CLK
PCI-E x3
DP
PCIE-5
EDP
DDI2-Lane0~1
DDI1
USB3-1
USB2-0
X'TAL
32.768KHz
Memory Down
D D
Max. 4G
USB3 Port
MB side
C C
2Rx16
P15
P32
DDR3L-SODIMM
SATA - HDD
USB3-2
USB2-1
USB2 IO
CCD(Camera)
Touch Screen(reserve)
Fingerprint(option)
P32
P25
P25
P25
GPU
N15S-GT
840M
820MN15V-GM
Display
P16~P19
DP to VGA
IF6513FN
USB Charger USB3 Port
SLG55584A
P24
P32
I/O board
I/O Board Conn.USB2 IO
P32
USB2-2
Azalia
P8
BATTERY
RTC
IHDA
LPC
P2~P13
CLK
SPI
X'TAL 24MHz
SPI ROM
P8
X'TAL 27MHz
PCIE-4
PCIE-2
USB2-4
PCIE-3
VRAM
GV2-DDR3
eDP Conn.
CRT Conn.
HDMI Conn.
MB side
RTL8411AAR
/RTL8411BAR
8 PCS
P20~P23
P25
P26
MINI CARD
WIGIG
10/100/1G
P24
P32
P27
P29
X'TAL 25MHz
IV@ : iGPU
EV@ : Optimus
SW@ : With DP switch
NSW@ : W/O DP switch
TPL@ : Touch screen
KBL@ : Keyboard backlight
TPM@ : TPM
RJ45
P29
Cardreader
CONN. 2in 1
P30
01
P32
EC
IT8587
G- Sensor
P33
Touch Pad
3
P34
P35
Fan Driver
(PWM Type)
P34
TPM(option)
P28
BQ24737A
Batery Charger
TPS51225
+3V/+5V
TPS51624
+VCCIN
TPS51211
+1.05V_S5/+1.05V
2
TPS51216
+1.35V_SUS
P36
TPS54318
+1.5V
P37
UP1642
+VGPU_CORE
P40
TPS51211
+1.5V_GFX/1.05V_GFX/3V_GFX
P38
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Thermal Protection
P39
Discharger
P41
P42
P43
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Block Diagram
Block Diagram
Block Diagram
1
Z8C
Z8C
Z8C
1 48Saturday, November 15, 2014
1 48Saturday, November 15, 2014
1 48Saturday, November 15, 2014
P41
B B
DMIC Array
Int. MIC
P31
Combo HP
A A
5
ALC3225
AUDIO CODEC
P31 P31
P31
Speaker*2
P34
D/B
HALL SENSOR
K/B Con.
4
3A
3A
3A
![](/html/8d/8ddb/8ddb943ffc8acad15cf94dc59ead6cad5dc6c7fa57ff2d0071517dfc9c4d7522/bg2.png)
5
4
3
2
1
Haswell ULT (DISPLAY,eDP)
U45A
HSW_ULT_DDR3L
02
D D
HDMI
CRT
ITE FAE suggest CAP
should be at PCH side.
C C
B B
INT_HDMITX2N26
INT_HDMITX2P26
INT_HDMITX1N26
INT_HDMITX1P26
INT_HDMITX0N26
INT_HDMITX0P26
INT_HDMICLK-26
INT_HDMICLK+26
CRT_TXN024
CRT_TXP024
CRT_TXN124
CRT_TXP124
PCH_BRIGHT25
PCH_BLON25
PCH_VDDEN25
TP61
TPD_INT#_D35
BOARD_ID410
BOARD_ID110
BOARD_ID210
TP109
TP108
TP114
TP113
PCH_BRIGHT
PCH_BLON
PCH_VDDEN
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PME#
TPD_INT#_D
DGPU_SELECT#
BOARD_ID4
BOARD_ID1
BOARD_ID2
C54
C55
B58
C58
B55
A55
A57
B57
C51
C50
C53
B54
C49
B50
A53
B53
AD4
B8
A9
C6
U6
P4
N4
N2
U7
L1
L3
R5
L4
DDI1_TXN0
DDI1_TXP0
DDI1_TXN1
DDI1_TXP1
DDI1_TXN2
DDI1_TXP2
DDI1_TXN3
DDI1_TXP3
DDI2_TXN0
DDI2_TXP0
DDI2_TXN1
DDI2_TXP1
DDI2_TXN2
DDI2_TXP2
DDI2_TXN3
DDI2_TXP3
U45I
EDP_BKLCTL
EDP_BKLEN
EDP_VDDEN
PIRQA/GPIO77
PIRQB/GPIO78
PIRQC/GPIO79
PIRQD/GPIO80
PME
+3V
GPIO55
+3V
GPIO52
+3V
GPIO54
+3V
GPIO51
+3V
GPIO53
eDP SIDEBAND
+3V
+3V
+3V
+3V
+3V_S5
PCIE
1 OF 19
HSW_ULT_DDR3L
9 OF 19
EDPDDI
DISPLAY
EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1
EDP_TXN2
EDP_TXP2
EDP_TXN3
EDP_TXP3
EDP_AUXN
EDP_AUXP
EDP_RCOMP
EDP_DISP_UTIL
DDPB_CTRLCLK
DDPB_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPB_AUXN
DDPC_AUXN
DDPB_AUXP
DDPC_AUXP
DDPB_HPD
DDPC_HPD
EDP_HPD
C45
B46
A47
B47
C47
C46
A49
B49
A45
B45
D20
A43
B9
C9
D9
D11
C5
B6
B5
A6
C8
A8
D6
EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1
EDP_TXN2
EDP_TXP2
EDP_TXN3
EDP_TXP3
EDP_AUXN
EDP_AUXP
EDP_RCOMP
CRT_CLK
CRT_DATA
R86
100K_4
EDP_TXN0 25
EDP_TXP0 25
EDP_TXN1 25
EDP_TXP1 25
EDP_TXN2 25
EDP_TXP2 25
EDP_TXN3 25
EDP_TXP3 25
EDP_AUXN 25
EDP_AUXP 25
R107 24.9/F_4
R502 *0_4
R503 *0_4
HDMI_DDCCLK_SW 26
HDMI_DDCDATA_SW 26
CRT_AUXN 24
CRT_AUXP 24
INT_HDMI_HPD 26
CRT_HPD 24
EDP_HPD 25
R484
4.7K_4
PCH_BRIGHTDP_UTIL
eDP Panel
+VCCIOA_OUT
eDP_RCOMP
Trace length < 100 mils
Trace width = 20 mils
Trace spacing = 25 mils
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
DGPU_SELECT#
TPD_INT#_D
CRT_CLK
CRT_DATA
R115 10K_4
R570 10K_4
R538 10K_4
R551 10K_4
R543 10K_4
R130 TPL@100K_4
R515 2.2K_4
R514 2.2K_4
+3V
+3V
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
5
4
3
Saturday, November 15, 2014
2
PROJECT :
Haswell 3/5 (DDI/eDP)
Haswell 3/5 (DDI/eDP)
Haswell 3/5 (DDI/eDP)
Z8C
Z8C
Z8C
2 48
2 48
2 48
1
3A
3A
3A
![](/html/8d/8ddb/8ddb943ffc8acad15cf94dc59ead6cad5dc6c7fa57ff2d0071517dfc9c4d7522/bg3.png)
5
4
3
2
1
Haswell ULT (DDR3L) Haswell Processor (DDR3)
U45C
M_A_DQ[63:0]14
D D
C C
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
AH63
AH62
AK63
AK62
AH61
AH60
AK61
AK60
AM63
AM62
AP63
AP62
AM61
AM60
AP61
AP60
AP58
AR58
AM57
AK57
AL58
AK58
AR57
AN57
AP55
AR55
AM54
AK54
AL55
AK55
AR54
AN54
AY58
AW58
AY56
AW56
AV58
AU58
AV56
AU56
AY54
AW54
AY52
AW52
AV54
AU54
AV52
AU52
AK40
AK42
AM43
AM45
AK45
AK43
AM40
AM42
AM46
AK46
AM49
AK49
AM48
AK48
AM51
AK51
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
HSW_ULT_DDR3L
DDR CHANNEL A
SA_CLK#0
SA_CLK0
SA_CLK#1
SA_CLK1
SA_CKE0
SA_CKE1
SA_CKE2
SA_CKE3
SA_CS#0
SA_CS#1
SA_ODT0
SA_RAS
SA_WE
SA_CAS
SA_BA0
SA_BA1
SA_BA2
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15
SA_DQSN0
SA_DQSN1
SA_DQSN2
SA_DQSN3
SA_DQSN4
SA_DQSN5
SA_DQSN6
SA_DQSN7
SA_DQSP0
SA_DQSP1
SA_DQSP2
SA_DQSP3
SA_DQSP4
SA_DQSP5
SA_DQSP6
SA_DQSP7
SM_VREF_CA
SM_VREF_DQ0
SM_VREF_DQ1
AU37
AV37
AW36
AY36
AU43
AW43
AY42
AY43
AP33
AR32
AP32
AY34
AW34
AU34
AU35
AV35
AY41
AU36
AY37
AR38
AP36
AU39
AR36
AV40
AW39
AY39
AU40
AP35
AW41
AU41
AR35
AV42
AU42
AJ61
AN62
AM58
AM55
AV57
AV53
AL43
AL48
AJ62
AN61
AN58
AN55
AW57
AW53
AL42
AL49
AP49
AR51
AP51
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
+VREF_CA_CPU
+VREFDQ_SA_M3
+VREFDQ_SB_M3
M_A_CLK0# 14
M_A_CLK0 14
M_A_CLK1# 14
M_A_CLK1 14
M_A_CKE0 14
M_A_CKE1 14
M_A_CS#0 14
M_A_CS#1 14
TP80
M_A_RAS# 14
M_A_WE# 14
M_A_CAS# 14
M_A_BS#0 14
M_A_BS#1 14
M_A_BS#2 14
M_A_A[15:0] 14
M_A_DQS#[7:0] 14
M_A_DQS[7:0] 14
U45D
M_B_DQ[63:0]15
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AY31
AW31
AY29
AW29
AV31
AU31
AV29
AU29
AY27
AW27
AY25
AW25
AV27
AU27
AV25
AU25
AM29
AK29
AL28
AK28
AR29
AN29
AR28
AP28
AN26
AR26
AR25
AP25
AK26
AM26
AK25
AL25
AY23
AW23
AY21
AW21
AV23
AU23
AV21
AU21
AY19
AW19
AY17
AW17
AV19
AU19
AV17
AU17
AR21
AR22
AL21
AM22
AN22
AP21
AK21
AK22
AN20
AR20
AK18
AL18
AK20
AM20
AR18
AP18
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
HSW_ULT_DDR3L
DDR CHANNEL B
SB_CK#0
SB_CK0
SB_CK#1
SB_CK1
SB_CKE0
SB_CKE1
SB_CKE2
SB_CKE3
SB_CS#0
SB_CS#1
SB_ODT0
SB_RAS
SB_WE
SB_CAS
SB_BA0
SB_BA1
SB_BA2
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15
SB_DQSN0
SB_DQSN1
SB_DQSN2
SB_DQSN3
SB_DQSN4
SB_DQSN5
SB_DQSN6
SB_DQSN7
SB_DQSP0
SB_DQSP1
SB_DQSP2
SB_DQSP3
SB_DQSP4
SB_DQSP5
SB_DQSP6
SB_DQSP7
AM38
AN38
AK38
AL38
AY49
AU50
AW49
AV50
AM32
AK32
AL32
AM35
AK35
AM33
AL35
AM36
AU49
AP40
AR40
AP42
AR42
AR45
AP45
AW46
AY46
AY47
AU46
AK36
AV47
AU47
AK33
AR46
AP46
AW30
AV26
AN28
AN25
AW22
AV18
AN21
AN18
AV30
AW26
AM28
AM25
AV22
AW18
AM21
AM18
M_B_ODT0
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_CLK0# 15
M_B_CLK0 15
M_B_CLK1# 15
M_B_CLK1 15
M_B_CKE0 15
M_B_CKE1 15
M_B_CS#0 15
M_B_CS#1 15
TP78
M_B_RAS# 15
M_B_WE# 15
M_B_CAS# 15
M_B_BS#0 15
M_B_BS#1 15
M_B_BS#2 15
M_B_A[15:0] 15
M_B_DQS#[7:0] 15
M_B_DQS[7:0] 15
03
B B
3 OF 19
A A
5
4
3
4 OF 19
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
2
Saturday, November 15, 2014
PROJECT :
Haswell 2/5 (DDR3 I/F)
Haswell 2/5 (DDR3 I/F)
Haswell 2/5 (DDR3 I/F)
Z8C
Z8C
Z8C
3A
3A
3 48
3 48
1
3 48
3A
![](/html/8d/8ddb/8ddb943ffc8acad15cf94dc59ead6cad5dc6c7fa57ff2d0071517dfc9c4d7522/bg4.png)
5
4
3
2
1
04
H_PECI (50ohm)
Route on microstrip only
D D
C C
Spacing >18 mils
Trace Length: 0.4~6.125 iches
H_PWRGOOD (50ohm)
Trace Length: 1~11.25 inches
CPU_PLTRST# (50ohm)
Trace Length: 10~17 inches
H_PECI35 XDP_PRDY# 13
H_PROCHOT#35,36,40
TP116
TP28
R542 56_4
SM_RCOMP[0:2]
Trace length < 500 mils
Trace width = 12~15 mils
Trace spacing = 20 mils
PROC_DETECT
CATERR#
H_PECI
H_PROCHOT#_RH_PROCHOT#
H_PWRGOOD_R
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
DDR_PG_CTRL
Haswell ULT (SIDEBAND)
THERMAL
DDR3L
DSW
HSW_ULT_DDR3L
MISC
JTAG
PWR
2 OF 19
D61
K61
N62
K63
C61
AU60
AV60
AU61
AV15
AV61
U45B
PROC_DETECT
CATERR
PECI
PROCHOT
PROCPWRGD
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
SM_DRAMRST
SM_PG_CNTL1
PRDY
PREQ
PROC_TCK
PROC_TMS
PROC_TRST
PROC_TDI
PROC_TDO
BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7
J62
XDP_PRDY#
K62
XDP_PREQ#
E60
XDP_TCK0
E61
XDP_TMS_CPU
E59
XDP_TRST#
F63
XDP_TDI_CPU
F62
XDP_TDO_CPU
J60
XDP_BPM#0
H60
XDP_BPM#1
H61
XDP_BPM#2
H62
XDP_BPM#3
K59
XDP_BPM#4
H63
XDP_BPM#5
K60
XDP_BPM#6
J61
XDP_BPM#7CPU_DRAMRST#
XDP_PREQ# 13
XDP_TCK0 8,13
XDP_TMS_CPU 13
XDP_TRST# 8,13
XDP_TDI_CPU 13
XDP_TDO_CPU 13
XDP_BPM#0 13
XDP_BPM#1 13
TP118
TP119
TP21
TP117
TP23
TP16
TCK,TMS
Trace Length < 9000mils
BPM#[0:7]
Trace Length 1~6 inches
Length match < 300 mils
B B
DRAM COMP
R639 200/F_4
R645 120/F_4
R640 100/F_4
PU/PD of CPU
H_PROCHOT#
A A
H_PWRGOOD_R
R546 *62_4
R548 62_4
R508 10K_4
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
5
+VCCIO_OUT
+1.05V_VCCST
DRAMRST
CPU DRAM
CPU_DRAMRST#
+1.35V_SUS
12
4
XDP_TDO_CPU
XDP_TCK0
XDP_TRST#
470_4
R103 51_4
R152 51_4
R644 *51_4
R376 *SHORT_4
+1.05V_VCCST
12
C460
*0.1u/10V_4
DDR3_DRAMRST# 14,15
3
DDR3L ODT GENERATIONXDP PU/PD
+5V_S5
12
R280
220K/F_4
DDR_VTTT_PG_CTRL39
2
0.1u/10V_4
+1.35V_SUS
3
2
1
+1.35V_SUS
U23
5
VCC
12
C299
4
Y
74AUP1G07GW
Q25
2N7002K
R709 66.5/F_4R375
R710 66.5/F_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
1
NC
2
A
GND
Haswell 1/5 (PEG/DMI/FDI)
Haswell 1/5 (PEG/DMI/FDI)
Haswell 1/5 (PEG/DMI/FDI)
R649 *SHORT_4
3
M_B_ODT0_DIMM 15
M_B_ODT1_DIMM 15
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
Z8C
Z8C
Z8C
DDR_PG_CTRL
4 48
4 48
4 48
3A
3A
3A
![](/html/8d/8ddb/8ddb943ffc8acad15cf94dc59ead6cad5dc6c7fa57ff2d0071517dfc9c4d7522/bg5.png)
5
VDDQ Output Decoupling Recommendations
330uFx2 7343
22uFx11
10uFx10
D D
+1.35V_SUS
+
C C
+1.05V_VCCST
VRON_CPU IMVP_PWRGD
B B
BOT socket side
5 onTOP, 6 on BOT inside socket cavity
0805
5 onTOP, 5 on BOT inside socket cavity
0805
C269
C270
10u/6.3V_6
10u/6.3V_6
C291
*470u/2V_7343
R144 *SHORT_8
C276
2.2u/6.3V_6
VCC_SENSE40
R506 *10K_4
R507 10K_4
PWR_DEBUG13
+1.05V_VCCST+1.05V
+VCCIN
+1.05V_VCCST
C241
*4.7u/6.3V_6
C272
10u/6.3V_6
C242
2.2u/6.3V_6
+1.35V_CPU 1.4A
+1.35V_CPU
C271
10u/6.3V_6
C268
2.2u/6.3V_6
R522 100/F_4
R526 *SHORT_4
300mA
+VCCIO_OUT
300mA
+VCCIOA_OUT
VCCST_PWRGD13
VRON_CPU40
IMVP_PWRGD10,40
R127 *SHORT_4
R109 150_6
C243
10u/6.3V_6
C245
2.2u/6.3V_6
+VCCIN
C244
10u/6.3V_6
TP31
TP56
TP58
TP59
TP66
TP73
TP29
TP27
TP25
TP125
TP37
TP72
TP75
TP49
TP54
TP57
TP71
TP34
TP50
TP24
TP15
ULT_RVSD_61
ULT_RVSD_62
ULT_RVSD_63
ULT_RVSD_64
VCC_SENSE_R
ULT_RVSD_65
ULT_RVSD_66
ULT_RVSD_67
ULT_RVSD_68
H_CPU_SVIDART#
H_CPU_SVIDCLK
H_CPU_SVIDDAT
VCCST_PWRGD
VRON_CPU
IMVP_PWRGD
PWR_DEBUG_R
ULT_RVSD_69
ULT_RVSD_70
ULT_RVSD_71
ULT_RVSD_72
ULT_RVSD_73
ULT_RVSD_74
ULT_RVSD_75
ULT_RVSD_76
ULT_RVSD_77
ULT_RVSD_78
ULT_RVSD_79
ULT_RVSD_80
ULT_RVSD_81
+1.05V_VCCST
+VCCIN
4
Haswell ULT (POWER)
HSW_ULT_DDR3L
HSW ULT POWER
12 OF 19
AH26
AJ31
AJ33
AJ37
AN33
AP43
AR48
AY35
AY40
AY44
AY50
AC58
AB23
AD23
AA23
AE59
AD60
AD59
AA59
AE60
AC59
AG58
AC22
AE22
AE23
AB57
AD57
AG57
L59
J58
F59
N58
E63
A59
E20
L62
N63
L63
B59
F60
C59
D63
H59
P62
P60
P61
N59
N61
T59
U59
V59
C24
C28
C32
U45L
RSVD
RSVD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VCC
RSVD
RSVD
VCC_SENSE
RSVD
VCCIO_OUT
VCCIOA_OUT
RSVD
RSVD
RSVD
VIDALERT
VIDSCLK
VIDSOUT
VCCST_PWRGD
VR_EN
VR_READY
VSS
PWR_DEBUG
VSS
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
VCCST
VCCST
VCCST
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
C36
C40
C44
C48
C52
C56
E23
E25
E27
E29
E31
E33
E35
E37
E39
E41
E43
E45
E47
E49
E51
E53
E55
E57
F24
F28
F32
F36
F40
F44
F48
F52
F56
G23
G25
G27
G29
G31
G33
G35
G37
G39
G41
G43
G45
G47
G49
G51
G53
G55
G57
H23
J23
K23
K57
L22
M23
M57
P57
U57
W57
3
+
C572
*470u/2V_7343
C60
C210
22u/6.3V_8
22u/6.3V_8
C228
22u/6.3V_8
C607
C179
22u/6.3V_8
22u/6.3V_8
C222
C185
22u/6.3V_8
22u/6.3V_8
C595
C180
22u/6.3V_8
*22u/6.3V_8
VCC Output Decoupling Recommendations
470uFx4 7343
22uFx8
22uFx11
10uFx11
0805
0805
0805
+VCCIN 32A
C93
C606
22u/6.3V_8
C219
22u/6.3V_8
C181
22u/6.3V_8
C182
22u/6.3V_8
C586
*22u/6.3V_8
C246
22u/6.3V_8
C224
22u/6.3V_8
C177
22u/6.3V_8
C221
22u/6.3V_8
C94
*22u/6.3V_8
22u/6.3V_8
C602
22u/6.3V_8
C59
22u/6.3V_8
C184
22u/6.3V_8
C90
*22u/6.3V_8
TOP socket side
4 on TOP, 4 on BOT near socket edge
TOP, inside socket cavity
BOT, inside socket cavity
2
C95
22u/6.3V_8
C220
22u/6.3V_8
C183
22u/6.3V_8
C223
22u/6.3V_8
C605
*22u/6.3V_8
VCCST PWRGD
VCCST_PWRGD
C622
*0.1u/10V_4
+VCCIN
SVID
H_CPU_SVIDDAT
H_CPU_SVIDART#
+1.05V_VCCST
R499
10K_4
R497 *SHORT0402
R521 *0_4
VCCST_PWRGD_EN
Layout note: need routing together
and ALERT need between CLK and DATA.
+VCCIO_OUT
R555
*130/F_4
Place PU resistor
close to CPU
Place PU resistor
close to CPU
CRB is via +1.05V PG
+3V_S5
HWPG_1.05V_EC
B-stage DNP
+1.05V_VCCST
R554
130/F_4
R558 *SHORT_4
R565 43_4
C623
0.1u/10V_4
VCCST_PWRGD_R
R495 *0_8
5
4
Q39
*2N7002K
R518 *SHORT0402
R519 *0_4
+VCCIO_OUT+1.05V
+1.05V_VCCST
1
U42
VCC
Y
74AUP1G07GW
3
1
R578
75_4
1
NC
2
A
3
GND
Reserve from EC
2
C621
*4.7u/6.3V_6
+VCCIO_OUT
R568
*75_4
05
VCCST_PWRGD_EN
HWPG_1.05V_EC# 35
PCH_PWROK 7,35
APWORK 7,35
VR_SVID_DATA 40
VR_SVID_ALERT# 40
HWPG_1.05V for DDR=1.5V
+3V
A A
C493
*1000p/50V_4
2
Q33
1 3
*MMBT3904-7-F
+1.05V
R401 *4.7K_4
5
R399
*4.7K_4
C492
*1000p/50V_4
+3V
R402
*4.7K_4
HWPG_1.05V 35
2
Q34
1 3
*DTC144EU
R400
*100K/F_4
10/30 reserve
DDR=1.5V ,This block POP
4
3
2
H_CPU_SVIDCLK
R579 *SHORT_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
PROJECT :
Haswell 4/5 (POWER)
Haswell 4/5 (POWER)
Haswell 4/5 (POWER)
1
VR_SVID_CLK 40
Z8C
Z8C
Z8C
5 48
5 48
5 48
3A
3A
3A
![](/html/8d/8ddb/8ddb943ffc8acad15cf94dc59ead6cad5dc6c7fa57ff2d0071517dfc9c4d7522/bg6.png)
5
4
3
2
1
Haswell ULT (CFG,RSVD)
U45S
HSW_ULT_DDR3L
06
D D
NOA_STBN_013
NOA_STBN_113
NOA_STBP_013
NOA_STBP_113
C C
CFG013
CFG113
CFG213
CFG313
CFG48,13
CFG513
CFG613
CFG713
CFG813
CFG913
CFG1013
CFG1113
CFG1213
CFG1313
CFG1413
CFG1513
R129 49.9/F_4
R511 8.2K_4
NOA_STBN_0
NOA_STBN_1
NOA_STBP_0
NOA_STBP_1
CFG_RCOMP
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
TD_IREF
AC60
AC62
AC63
AA63
AA60
Y62
Y61
Y60
V62
V61
V60
U60
T63
T62
T61
T60
AA62
U63
AA61
U62
V63
J20
H18
B12
A5
E1
D1
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG18
CFG17
CFG19
CFG_RCOMP
RSVD
RSVD
RSVD
RSVD
RSVD
TD_IREF
RESERVED
PROC_OPI_RCOMP
19 OF 19
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
RSVD
RSVD
VSS
VSS
RSVD
RSVD
AV63
AU63
C63
C62
B43
A51
B51
L60
N60
W23
Y22
AY15
AV62
D58
P22
N21
P20
R20
OPI_COMP1
R654 49.9/F_4
Processor Strapping
1 0
CFG0
EAR-STALL/NOT STALL RESET SEQUENCE
AFTER PCU PLL IS LOCKED
CFG1
PCH/ PCH LESS MODE SELECTION
B B
CFG3
PHYSICAL_DEBUG_ENABLED (DFX PRIVACY)
CFG 8
ALLOW THE USE OF NOA ON LOCKED UNITS
(DEFAULT) NORMAL OPERATION; NO STALL
(DEFAULT) NORMAL OPERATION
DISABLED
NO PHYSICAL DISPLAY PORT ATTACHED
TO
EMBEDDED DISPLAY PORT
DISABLED(DEFAULT); IN THIS CASE, NOA
WILL BE DISABLED IN LOCKED UNITS AND
ENABLED IN UN-LOCKED UNITS
STALL
PCH-LESS MODE
ENABLED
AN EXTERNAL DISPLAY PORT DEVICE IS
CONNECTED
TO THE EMBEDDED DISPLAY PORT
ENABLED; NOA WILL BE AVAILABLE
REGARDLESS OF THE LOCKING OF THE UNIT
CFG0
CFG1
CFG3
CFG8
R153 *1K_4
R136 *1K_4
R142 *1K_4
R125 *1K_4
CFG9
NO SVID PROTOCOL CAPABLE VR
CONNECTED
A A
CFG10
SAFE MODE BOOT
5
VRS SUPPORTING SVID PROTOCOL ARE
PRESENT
POWER FEATURES ACTIVATED
DURING RESET
4
NO VR SUPPORTING SVID IS PRESENT. THE
CHIP WILL NOT GENERATE (OR RESPOND TO)
SVID ACTIVITY
POWER FEATURES (ESPECIALLY CLOCK
GATINE ARE NOT ACTIVATED
3
CFG9
CFG10
R126 *1K_4
R135 *1K_4
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
PROJECT :
Haswell 5/5 (CFG/GND)
Haswell 5/5 (CFG/GND)
Haswell 5/5 (CFG/GND)
1
Z8C
Z8C
Z8C
6 48
6 48
6 48
3A
3A
3A
![](/html/8d/8ddb/8ddb943ffc8acad15cf94dc59ead6cad5dc6c7fa57ff2d0071517dfc9c4d7522/bg7.png)
5
4
3
2
1
Haswell ULT PCH (PM)
PCH_SUSACK#35
PCH_SUSPWARN#35
SYS_PWROK
EC_PWROK
RSMRST#35
DNBSWON#35
ACPRESENT36
PCH_SLP_S0#13
D D
PCH_SUSPWRACK
SYS_RESET#13
R601 *SHORT_4
R673 *0_4
R656 *0_4
PCI_PLTRST#35
R678 *SHORT_4
R616 *SHORT_4
R236 *SHORT_4
R239 *SHORT_4
R598 *SHORT_4
R620 *0_4
R615 *0_4
C660 *1u/6.3V_4
R661 *0_4
R653 *0_4
TP79
SUSACK#_R
SYS_RESET#
SYS_PWROK_R
EC_PWROK_R
APWROK_R
PCI_PLTRST#
PCH_RSMRST#
PCH_SUSPWRACK
PCH_PWRBTN#
PCH_ACPRESENT
PCH_BATLOW#
PCH_SLP_S0#_R
PCH_SLP_WLAN#
U45H
AK2
SUSACK
AC3
SYS_RESET
AG2
SYS_PWROK
AY7
PCH_PWROK
AB5
APWROK
AG7
AW6
AV4
AL7
AJ8
AN4
AF3
AM5
+3V_S5
PLTRST
RSMRST
SUSWARN/SUSPWRDNACK/GPIO30
PWRBTN
ACPRESENT/GPIO31
BATLOW/GPIO72
SLP_S0
SLP_WLAN/GPIO29
HSW_ULT_DDR3L
SYSTEM POWER MANAGEMENT
+3V
+3V_S5
+3V_S5
DSW
DSW
DSW
DSW
+3V_S5
DSW
+3V_S5
8 OF 19
DSWVRMEN
DPWROK
DSW
CLKRUN/GPIO32
SUS_STAT/GPIO61
DSW
DSW
DSW
DSW
DSW
WAKE
SUSCLK/GPIO62
SLP_S5/GPIO63
SLP_S4
SLP_S3
SLP_A
SLP_SUS
SLP_LAN
AW7
DSWVREN
AV5
DPWROK_R
AJ5
PCIE_LAN_WAKE#
V5
CLKRUN#
AG4
AE6
PCH_SUSCLK
AP5
PCH_SLP_S5#
AJ6
SUSC#
AT4
SUSB#
AL5
PCH_SLP_A#
AP4
PCH_SLP_SUS#
AJ7
PCH_SLP_LAN#
Deep Sx
R681 *0_4
TP76
R689 0_4
TP67
DSWVREN 8
DPWROK 35
PCIE_LAN_WAKE# 27,29
CLKRUN# 28,35
PCH_WIFI_SUSCLK# 27
PCH_SLP_S5# 13
SUSC# 13,35
SUSB# 13,35
PCH_SLP_A# 13
PCH_SLP_SUS# 35
07
C C
PCH PM PU/PD
+3V
CLKRUN#
SYS_RESET#
B B
A A
PCH_RSMRST#
SYS_PWROK
DPWROK_R
PCH_SUSPWRACK
PCH_ACPRESENT
PCH_BATLOW#
PCIE_LAN_WAKE#
PCH_PWRBTN#
R131 8.2K_4
R581 10K_4
R663 10K_4
R687 *10K_4
R680 100K/F_4
R650 *10K_4
Follow ZQ0
R219 10K_4
R226 8.2K_4
R228 *10K_4
R221 *10K_4
R234 *10K_4
R237 *8.2K_4
R238 1K_4
R235 *10K_4
5
+3V_S5
+3V_S5
+3VPCU
Power Sequence
PCH_PWROK5,35
R356
100K_4
EC_PWROK SYS_PWROK_R
R352 *SHORT_4
R666 *0_4
R679 *SHORT_4
Non Deep Sx
EC_PWROK_R
DPWROK_RRSMRST#
PLTRST# Buffer Deep Sx Circuit
+3V
PCI_PLTRST#
2
1
3 5
C266 0.1u/10V_4
4
U20
TC7SH08FU
R198
100K_4
PLTRST# 13,16,27,28,29,35
+3V_S5 +3VCC_S5
*0.33u/10V_6
SYSPWOK
+3V_S5
C677 *0.1u/10V_4
2
SYS_PWROK13
4
SYS_PWROK
4
U47
TC7SH08FU
3 5
R683 *0_4
EC_PWROK
1
3
EC_PWROK 35
IMVP_PWRGD_3V 10
R674
10K_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
2
Saturday, November 15, 2014
APWORK5,35
R377 *SHORT_4
Speed up 250ms to boot up
for EC power on 250 ms
Non Deep Sx
R273 *SHORT_6
1
R277
C307
PCH_SLP_SUS#
*100K_4
2
Q24
*2N7002K
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LPT 1/6 (DMI/FDI/VGA)
LPT 1/6 (DMI/FDI/VGA)
LPT 1/6 (DMI/FDI/VGA)
2
3
1
Q23
*AO3413
R278
*SHORT_6
Z8C
Z8C
Z8C
R379
10K_4
3
7 48
7 48
7 48
1
APWROK_R
3A
3A
3A
![](/html/8d/8ddb/8ddb943ffc8acad15cf94dc59ead6cad5dc6c7fa57ff2d0071517dfc9c4d7522/bg8.png)
RTC Clock 32.768KHz (RTC)
C664 15p/50V_4
C665 15p/50V_4
RTC Circuitry (RTC)
D D
R349 *SHORT_6
+3VPCU
+3V_RTC_0
HDA
C C
PCH JTAG
JTAG_TCK,JTAG_TMS
Trace Length < 9000mils
B B
ULT Strapping Table
+3V_RTC_2
+3V_RTC_1
R336 1K_4
+3V_RTC_[0:2]
Trace width = 20 mils
12
CN9
BAT_CONN
PCH_AZ_CODEC_RST#31
PCH_AZ_CODEC_SDO UT3 1
PCH_AZ_CODEC_BITCLK31
PCH_AZ_CODEC_SYNC31
XDP_TMS
XDP_TDI
PCH_JTAG_TDO
PCH_JTAGX
XDP_TCK1
Pin Name Strap description
GPIO81(SPKR)
HDA_SDO PWROK
5
RTC_X1
12
R655
Y5
10M_4
32.768KHZ
RTC_X2
+3V_RTC
D15
BAT54C
C716
1u/6.3V_4
R659 33_4
R657 33_4
R652 33_4
C679
*10p/50V_4
R684 33_4
C678 *10p/50V_4
MP remove(Intel)
R150 51_4
R151 51_4
R164 51_4
R594 *1K_4
R602 *51_4
No reboot on TCO Timer
expiration
Flash Descriptor Security
Override / Intel ME Debug Mode
+3V_RTC
Trace width = 30 mils
R726
20K/F_4
C711
1u/6.3V_4
R722
20K/F_4
C710
1u/6.3V_4
+1.05V_S5
RTC_RST#
12
J2
*JUMP
SRTC_RST#
HDA_RST#_R
HDA_SDO_R
HDA_BCLK_R
HDA_SYNC_R
+3V_RTC_0
1 3
Sampled
PWROK
+3V_RTC
PCH_AZ_CODEC_SDIN 03 1
XDP_TRST#4,13
XDP_TCK113
XDP_TDI13
XDP_TDO13
XDP_TMS13
XDP_TCK04,13
20MIL
VCCRTC_3 VCCRTC_4
R795 *4.7K_4
Q42
*MMBT3904
2
Configuration note
0 = Default enable (iPD 20K)
1 =Disable No-Reboot mode
0 = Default can program ME (iPD 20K)
1 =can't program ME
RTC_RST#13
R162 *SHORT_4
R597 *SHORT_4
PCH_INTVRMEN
SRTC_RST#
RTC_RST#
HDA_BCLK_R
HDA_SYNC_R
HDA_RST#_R
HDA_SDO_R
R797 *4.7K_4
RTC_X1
RTC_X2
SM_INTRUDER#
R665 1M_4
INTVRMEN Integrated 1.05V VRM enable ALWAYS 1=Should be always pull-up
GPIO66
GPIO86
GPIO15 TLS(Transport layer security)
A A
CFG4
DSWVREN
Top-Block Swap override
Boot BIOS Strap Bit
DP presence strap
Deep Sx well on die VR enable
5
0 = Default disable (iPD 20K)
1 = Enable TBS function
0 = Default SPI (iPD 20K)
1 =LPC
0 = Default enable w/o
confidentiality(iPD 20K)
1 =Default enable with
confidentiality
0 = Enable an external display
port is connected to the eDP
1 =disable
1=Should be always pull-up
4
Haswell ULT PCH (RTC/HDA/SATA/SPI)
HSW_ULT_DDR3L
RTC
AUDIO SATA
JTAG
5 OF 19
SPKR
R658 *SHORT_4
PCH_INTVRMEN
GPIO66
GPIO86
GPIO15
CFG4
CFG46,13
DSWVREN
+3V
+3V
+3V
+3V
SPKR 10,31
ME_WR# 35
R660 *330K_4
R516 *1K_4
R93 *1K_4
R140 *1K_4
R143 1K_4
R662 *330K_4
SATA_RN0/PERN6_L3
SATA_RP0/PERP6_L3
SATA_TN0/PETN6_L3
SATA_TP0/PETP6_L3
SATA_RN1/PERN6_L2
SATA_RP1/PERP6_L2
SATA_TN1/PETN6_L2
SATA_TP1/PETP6_L2
SATA_RN2/PERN6_L1
SATA_RP2/PERP6_L1
SATA_TN2/PETN6_L1
SATA_TP2/PETP6_L1
SATA_RN3/PERN6_L0
SATA_RP3/PERP6_L0
SATA_TN3/PETN6_L0
SATA_TP3/PETP6_L0
XDP_TCK1
XDP_TDI
PCH_JTAG_TDO
PCH_JTAGX
+5V_S5
AW5
AW8
AV11
AY10
AU12
AU11
AW10
AV10
AU62
AE62
AD61
AE61
AD62
AL11
AE63
AY5
AU6
AV7
AV6
AU7
AU8
AY8
AC4
AV2
R794
*68.1K/F_4
R796
*150K/F_4
+3V_RTC
+3V_S5
+3V_RTC
4
U45E
RTCX1
RTCX2
INTRUDER
INTVRMEN
SRTCRST
RTCRST
HDA_BCLK/I2S0_SCLK
HDA_SYNC/I2S0_SFRM
HDA_RST/I2S_MCLK
HDA_SDI0/I2S0_RXD
HDA_SDI1/I2S1_RXD
HDA_SDO/I2S0_TXD
HDA_DOCK_EN/I2S1_TXD
HDA_DOCK_RST/I2S1_SFRM
I2S1_SCLK
PCH_TRST
PCH_TCK
PCH_TDI
PCH_TDO
PCH_TMS
RSVD
RSVD
JTAGX
RSVD
R580 *1K_4
+3V
HDA_SDO_R
R676 330K_4
GPIO6610
R517 *1K_4
+3V
GPIO8610
R99 *1K_ 4
+3V
GPIO1510
R146 8.2K_4
DSWVREN7
R677 330K_4
SATA0GP/GPIO34
SATA1GP/GPIO35
SATA2GP/GPIO36
SATA3GP/GPIO37
SATA_IREF
SATA_RCOMP
SATALED
3
Haswell ULT PCH(LPC,SPI,SMBUS,C-LINK,THERMAL)
U45G
PCH_SPI_CLK
PCH_SPI_CS1#
PCH_SPI_SI
PCH_SPI_SO
PCH_SPI_IO2
PCH_SPI_IO3
SPI_SO_8M
SPI_WP_IO2_ME
SPI_HOLD_IO3_ME
AU14
AW12
AY12
AW11
AV12
AA3
Y7
Y4
AC2
AA2
AA4
Y6
AF1
U14
1
CS#
2
IO1/DO
3
IO2/WP#
4
GND
W25Q64FW -- 8MB
PCH_SPI_CS0#
LAD0
LAD1
LAD2
LAD3
LFRAME
SPI_CLK
SPI_CS0
SPI_CS1
SPI_CS2
SPI_MOSI
SPI_MISO
SPI_IO2
SPI_IO3
SYS_COM_REQ
IO3/HOLD#
PCH_SPI_CLK_EC
PCH_SPI_SI_EC
LPC_LAD027,28,35
LPC_LAD127,28,35
J5
H5
B15
A15
J8
H8
A17
B17
J6
H6
B14
C15
F5
E5
C17
D17
V1
VGPU_EN
U1
SYS_COM_REQ
V6
GPIO36
AC1
GPIO37
A12
SATA_IREF
L11
RSVD
K10
RSVD
C12
SATA_RCOMP
U3
SATA_LED#
SATA_RXN0 28
SATA_RXP0 28
SATA_TXN0 28
SATA_TXP0 28
TP14
TP9
TP6
TP4
VGPU_EN 42
TP39
TP36
TP134
R512 *SHORT_4
R513 3.01K/F_4
R575 10K_4
Remove mSATA
+V1.05S_ASATA3PLL
+V1.05S_ASATA3PLL
+3V
LPC_LFRAME#27,28,35
HDD
SATA_RCOMP
Impedance = 50 ohm
Trace length < 500 mils
Trace spacing = 15 mils
LPC_LAD227,28,35
LPC_LAD327,28,35
TP48
PCH Quad SPI ROM
(Default for WIN8)
R494 *SHORT_6
+3V_PCH_ME
PCH_SPI_SO_EC35
+3V_PCH_ME
PCH_SPI_IO2
PCH_SPI_IO3
SPI_CS0#_UR_ME35
+3V_PCH_ME
R80 10K_4
3
R76 *10K_4
PCH_SPI_CS0#
PCH_SPI_SO
PCH_SPI_SO_EC
R77 *1K_4
+3V_PCH_ME+3V_S5
R78 8M4 M@15_4
R75 8M@1 5_4
SPI_WP_IO2_ME
PCH_SPI_CLK_EC35
PCH_SPI_SI_EC35
R74 8M4M@15_4
R105 8M4M@15_4
R85 *8M@SHORT_4
SPI_CS0#_UR_ME
R557IV@10K_4
R120*10K_4
R595*10K_4
IO0/DI
R137 *10K_4
VGPU_EN
8
VCC
7
6
CLK
5
R102 8M@15_4
R100 8M@15_4
HSW_ULT_DDR3L
LPC
GPIO36
GPIO37
SPI_HOLD_IO3_ME
SPI_CLK_8M
SPI_SI_8M
2
+3V_S5
+3V_S5
+3V_S5
2
SMBUS
C-LINKSPI
R112 8M4M@15_4
R111 8M4M@15_4
+3V_S5
SMBALERT/GPIO11
+3V_S5
+3V_S5
SMBDATA
+3V_S5
SML0ALERT/GPIO60
+3V_S5
SML0CLK
+3V_S5
SML0DATA
SML1ALERT/PCHHOT/GPIO73
SML1CLK/GPIO75
SML1DATA/GPIO74
7 OF 19
+3V
R560*10K_4
R13410K_4
R59910K_4
R106 *1K_4
C193
*22p/50V_4
SMBCLK
CL_CLK
CL_DATA
CL_RST
PCH_SPI_CLK
PCH_SPI_SI
AN2
AP2
AH1
AL2
AN1
AK1
AU4
AU3
AH3
AF2
AD2
AF4
SMBALERT#
SMB_PCH_CLK
SMB_PCH_DAT
SMB0ALERT#
SMB_ME0_CLK
SMB_ME0_DAT
SMB1ALERT#
SMB_ME1_CLK
SMB_ME1_DAT
CL_CLKPCH_SPI_C S0#
CL_DAT
CL_RST#
+3V_PCH_ME
C157
0.1u/10V_4
1
08
TP135
TP133
TP140
SMBus
PCH_XDP_WLAN/S5 DDR_TP/S0
+3V_S5
R636 10K_4
R651 10K_4
R643 10K_4
R255 2.2K_4
R244 2.2K_4
R622 2.2K_4
R619 2.2K_4
SMBus(PCH)
SMB_PCH_DAT
SMB_PCH_CLK
SMBus(EC)
2ND_MBCLK19,35
2ND_MBDATA19,35
EC/S5 PCH/S5
+3V_S5
2ND_MBCLK
2ND_MBDATA
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
SMB0ALERT#
SMB1ALERT#
SMBALERT#
SMB_PCH_CLK
SMB_PCH_DAT
SMB_ME0_CLK
SMB_ME0_DAT
+3V
R257
4.7K_4
Q20
5
2
6
2N7002DW
*2.2K_4
Q19
5
2
6
*2N7002DW
R242 0_4
R243 0_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LPT 2/6 (SATA/HDA/SPI)
LPT 2/6 (SATA/HDA/SPI)
LPT 2/6 (SATA/HDA/SPI)
Saturday, November 15, 2014
Saturday, November 15, 2014
Saturday, November 15, 2014
1
43
1
R260
43
1
SMB_ME1_CLK
SMB_ME1_DAT
R241
4.7K_4
CLK_SDATA 13,14,15,33
CLK_SCLK 13,14,15,33
R240
*2.2K_4
SMB_ME1_CLK
SMB_ME1_DAT
Z8C
Z8C
Z8C
8 48
8 48
8 48
3A
3A
3A
![](/html/8d/8ddb/8ddb943ffc8acad15cf94dc59ead6cad5dc6c7fa57ff2d0071517dfc9c4d7522/bg9.png)
5
Haswell ULT PCH (PCIE,USB3.0,USB2.0)
U45K
PEG_RX#016
PCIE_RX3-_LAN29
PCIE_RX3+_LAN29
PCIE_TX3-_LAN29
PCIE_TX3+_LAN29
PCIE_RX4-_WLAN27
PCIE_RX4+_WLAN27
PCIE_TX4-_WLAN27
PCIE_TX4+_WLAN27
WIGIG_ RX1-_WLAN27
WIGIG_ RX1+_WLA N27
WIGIG_ TX1-_WLAN27
WIGIG_ TX1+_WLAN27
+V1.05S_ AUSB3PLL
PEG_RX01 6
PEG_TX#016
PEG_TX016
PEG_RX#116
PEG_RX11 6
PEG_TX#116
PEG_TX116
PEG_RX#216
PEG_RX21 6
PEG_TX#216
PEG_TX216
PEG_RX#316
PEG_RX31 6
PEG_TX#316
PEG_TX316
C633 EV@0 .22u/10V_ 4
C632 EV@0 .22u/10V_ 4
C614 EV@0 .22u/10V_ 4
C615 EV@0 .22u/10V_ 4
C637 EV@0 .22u/10V_ 4
C638 EV@0 .22u/10V_ 4
C616 EV@0 .22u/10V_ 4
C617 EV@0 .22u/10V_ 4
C627 0.1u /10V_4
C626 0.1u /10V_4
TP157
TP159
TP158
TP160
WIGIG_ TX3ÂWIGIG_ TX3+
PCIE_TX4-
PCIE_TX4+
PCIE_RCOMP
PCIE_IREF
C613 0.1u/10 V_4
C612 0.1u/10 V_4
C625 0.1u/10V_4
C624 0.1u/10V_4
R510 3.01 K/F_4
R509 *SHORT_4
D D
PEG x4
LAN
C C
WIFI
WIGIG
B B
R_PEG_TX# 0
R_PEG_TX0
R_PEG_TX# 1
R_PEG_TX1
R_PEG_TX# 2
R_PEG_TX2
R_PEG_TX# 3
R_PEG_TX3
PCIE_TX3ÂPCIE_TX3+
F10
E10
C23
C22
F8
E8
B23
A23
H10
G10
B21
C21
E6
F6
B22
A21
G11
F11
C29
B30
F13
G13
B29
A29
G17
F17
C30
C31
F15
G15
B31
A31
E15
E13
A27
B27
PERN5_L0
PERP5_L0
PETN5_L0
PETP5_L0
PERN5_L1
PERP5_L1
PETN5_L1
PETP5_L1
PERN5_L2
PERP5_L2
PETN5_L2
PETP5_L2
PERN5_L3
PERP5_L3
PETN5_L3
PETP5_L3
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PERN1/USB3RN3
PERP1/USB3RP3
PETN1/USB3TN3
PETP1/USB3TP3
PERN2/USB3RN4
PERP2/USB3RP4
PETN2/USB3TN4
PETP2/USB3TP4
RSVD
RSVD
PCIE_RCOMP
PCIE_IREF
PCIE USB
+3V_S5
+3V_S5
+3V_S5
+3V_S5
HSW_ULT_DDR3L
4
11 OF 19
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
DSW
USB2N0
DSW
USB2P0
DSW
USB2N1
DSW
USB2P1
DSW
USB2N2
DSW
USB2P2
DSW
USB2N3
DSW
USB2P3
DSW
USB2N4
DSW
USB2P4
DSW
USB2N5
DSW
USB2P5
DSW
USB2N6
DSW
USB2P6
DSW
USB2N7
DSW
USB2P7
USB3RN1
USB3RP1
USB3TN1
USB3TP1
USB3RN2
USB3RP2
USB3TN2
USB3TP2
USBRBIAS
USBRBIAS
OC0/GPIO40
OC1/GPIO41
OC2/GPIO42
OC3/GPIO43
RSVD
RSVD
AN8
AM8
AR7
AT7
AR8
AP8
AR10
AT10
AM15
AL15
AM13
AN13
AP11
AN11
AR13
AP13
G20
H20
C33
B34
E18
F18
B33
A33
AJ10
AJ11
AN10
AM10
AL3
AT1
AH2
AV3
USBCOMP
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USBP0- 3 2
USBP0+ 3 2
USBP1- 3 2
USBP1+ 3 2
USBP2- 3 2
USBP2+ 3 2
USBP3- 3 2
USBP3+ 3 2
USBP4- 2 7
USBP4+ 2 7
USBP5- 2 5
USBP5+ 2 5
USBP6- 2 5
USBP6+ 2 5
USBP7- 2 5
USBP7+ 2 5
USB3_RXN0 32
USB3_RXP 0 32
USB3_TXN0 32
USB3_TXP0 32
USB3_RXN1 32
USB3_RXP 1 32
USB3_TXN1 32
USB3_TXP1 32
R207 22.6 /F_4
USB_OC0# 32
USB_OC1# 32
3
MB USB3.0
MB USB3.0
DB USB2.0
MB USB2.0
NGFF BT
TP(reserve)
WIGIGVGA
CCD
Fingerprint
WIFI
MB USB3.0
MB USB3.0
USBCOMP
Impedance = 50 ohm
Trace length < 500 mils
Trace spacing = 15 mils
MB U3
MB U2 DB U2
2
Haswell ULT PCH (CLOCK)
U45F
CLK_PCIE_REQ1#
C43
CLKOUT_PCIE_N0
C42
CLKOUT_PCIE_P0
U2
PCIECLKRQ0/GPIO18
B41
CLKOUT_PCIE_N1
A41
CLKOUT_PCIE_P1
Y5
PCIECLKRQ1/GPIO19
C41
CLKOUT_PCIE_N2
B42
CLKOUT_PCIE_P2
AD1
PCIECLKRQ2/GPIO20
B38
CLKOUT_PCIE_N3
C37
CLKOUT_PCIE_P3
N1
PCIECLKRQ3/GPIO21
A39
CLKOUT_PCIE_N4
B39
CLKOUT_PCIE_P4
U5
PCIECLKRQ4/GPIO22
B37
CLKOUT_PCIE_N5
A37
CLKOUT_PCIE_P5
T2
PCIECLKRQ5/GPIO23
CLK_PCIE_N0
TP106
CLK_PCIE_P0
TP107
CLK_PCIE_REQ0#
CLK_PCIE_WIGIGN27
CLK_PCIE_WIGIGP27
PCIE_CLKREQ_WIGIG#27
CLK_PCIE_LANN29
LAN
CLK_PCIE_LANP29
CLK_PCIE_LAN_REQ#29
CLK_PCIE_WLANN27
CLK_PCIE_WLANP27
PCIE_CLKREQ_WLAN#27
CLK_PCIE_VGA#16
CLK_PCIE_VGA16
CLK_PEGA_REQ#16
TP126
R572 *SHORT_4
CLK_PCIE_REQ2#
R600 *SHORT_4
CLK_PCIE_REQ3#
R550 *SHORT_4
CLK_PCIE_REQ4#
R573 *SHORT_4
CLK_PCIE_REQ5#
TP123
USB Overcurrent
+3V_S5
RP2
10
1
9
8
7 4
10K_10P 8R
2
3
56
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
HSW_ULT_DDR3L
+3V
+3V
+3V
+3V
+3V
+3V
CLK_PCIE_REQ0#
CLK_PCIE_REQ1#
CLK_PCIE_REQ2#
CLK_PCIE_REQ3#
CLK_PCIE_REQ5#
TESTLOW_C35
TESTLOW_C34
TESTLOW_AK8
TESTLOW_AL8
CLK_PCIE_REQ4#
CLOCK
SIGNALS
6 OF 19
R576 10K_ 4
R582 10K_ 4
R596 10K_ 4
R545 10K_ 4
R569 10K_ 4
R504 10K_ 4
R505 10K_ 4
R225 10K_ 4
R233 10K_ 4
R577 10K_4
R571 *1K_4
CLKOUT_ITPXDP_P
XTAL24_IN
XTAL24_OUT
RSVD
RSVD
DIFFCLK_BIASREF
TESTLOW_C35
TESTLOW_C34
TESTLOW_AK8
TESTLOW_AL8
CLKOUT_LPC_0
CLKOUT_LPC_1
CLKOUT_ITPXDP
+3V
+3V
XTAL24_IN
XTAL24_OUT
A25
B25
K21
M21
C26
C35
C34
AK8
AL8
AN15
AP15
B35
A35
XTAL24_IN
XTAL24_OUT
ICLK_BIAS
TESTLOW_C35
TESTLOW_C34
TESTLOW_AK8
TESTLOW_AL8
CLK_PCH_PCI3
CLK_PCH_PCI4
R501
1M_4
C288
*18p/50V _4
1
C630 12p/50V_4
Y3
24MHz
2 4
1 3
C631 12p/50V_4
R500 3.01 K/F_4
*18p/50V _4
R224TPM@22_4
R22322_4
R22222_4
C289
09
+V1.05S_ AXCK_LCPLL
PCLK_TPM 28
CLK_PCI_LPC 27
CLK_PCI_EC 35
CLK_PCIE_XDPN 13
CLK_PCIE_XDPP 13
PCLK_TPMCLK_PCI_LPCCLK_PCI_EC
C290
*18p/50V _4
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Saturday, November 1 5, 2014
Date: Sheet of
Saturday, November 1 5, 2014
Date: Sheet of
5
4
3
2
Saturday, November 1 5, 2014
PROJECT :
LPT 3/6 (PCIE/USB/CLK)
LPT 3/6 (PCIE/USB/CLK)
LPT 3/6 (PCIE/USB/CLK)
Z8C
Z8C
Z8C
9 48
9 48
1
9 48
3A
3A
3A
![](/html/8d/8ddb/8ddb943ffc8acad15cf94dc59ead6cad5dc6c7fa57ff2d0071517dfc9c4d7522/bga.png)
5
4
3
2
1
PCH GPIO PU/PD
Haswell ULT PCH (GPIO,CPU/MISC,NCTF)
High Low
GPIO8
D D
DGPU_PWROK18
DGPU_HOLD_RST#16
DGPU_PWR_EN43
C C
DEVSLP0 for HDD
DEVSLP1 for mSATA
No touch panelTouch panel
BOARD_ID0
TP60
TP77
TP74
TP143
TP81
TP83
TP82
TP51
TP142
TP70
ACCEL_INTA
GPIO8
LAN_DISABLE#
GPIO15
SKU_ID0
DGPU_PWROK
GPIO24
WK_GPIO27
GPIO28
ODD_PRSNT#
GPIO56
GPIO57
GPIO58
GPIO59
GPIO44
GPIO47
DGPU_HOLD_RST#
DGPU_PWR_EN
DGPU_PW_CTRL#
MODPHY_EN
RAM_ID0
RAM_ID3
GPIO25
GPIO45
RAM_ID1
RAM_ID2
DEVSLP0
BOARD_ID3
DEVSLP1
SKU_ID1
SPKR
GPIO825
GPIO158
TP43
ACCEL_INTA33
DEVSLP028
TP26
SPKR8,31
Board ID
+3V
R559 10K_4
BOARD_ID12
R547 10K_4
B B
BOARD_ID22
R541 10K_4
R89 10K_4
BOARD_ID42
R537 10K_4
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
R561 *10K_4
R549 *10K_4
R540 *10K_4
R88 *10K_4
R536 *10K_4
U45J
P1
BMBUSY/GPIO76
AU2
AM7
AD6
AD5
AN5
AD7
AN3
AG6
AP1
AL4
AT5
AK4
AB6
AT3
AH4
AM4
AG5
AG3
AM3
AM2
Y1
T3
U4
Y3
P3
Y2
P2
C4
L2
N5
V2
+3V_S5
GPIO8
LAN_PHY_PWR_CTRL/GPIO12
+3V_S5
GPIO15
+3V
GPIO16
+3V
GPIO17
+3V_S5
GPIO24
DSW
GPIO27
+3V_S5
GPIO28
+3V_S5
GPIO26
+3V_S5
GPIO56
+3V_S5
GPIO57
+3V_S5
GPIO58
+3V_S5
GPIO59
+3V_S5
GPIO44
+3V_S5
GPIO47
+3V
GPIO48
+3V
GPIO49
+3V
GPIO50
HSIOPC/GPIO71
+3V_S5
GPIO13
+3V_S5
GPIO14
DSW
GPIO25
+3V_S5
GPIO45
+3V_S5
GPIO46
+3V_S5
GPIO9
+3V_S5
GPIO10
DEVSLP0/GPIO33
SDIO_POWER_EN/GPIO70
DEVSLP1/GPIO38
DEVSLP2/GPIO39
SPKR/GPIO81
RAM ID
R647 10K_4
R227 *10K_4
R638 10K_4
R642 10K_4
RAM_IDVender Freq.
Hynix
Hynix
Kingston 0010 AKD5PZSTP02 D2516EC4BXGGB 1600MHz
MICRON 0100 MT41K256M16HA-125 1600MHzAKD5JGSTL08
0000
0001
SKU ID
UMA Only
dGPU Only
Switchable
(Mux)
Optimize
(Muxless)
R588 IV@10K_4
R101 IV@10K_4
SKU_ID1 SKU_ID0 VGA H/W
0
0
1
1
Low
BOARD_ID0
BOARD_ID1
A A
BOARD_ID2
BOARD_ID3
BOARD_ID4
Dual Rank Single Rank
Enable on
board memory
Pin8 of SYNAPTICS and ELAN are NC
pin. BIOS maybe will use EEPROM
detection. Default is pull high.
Reserved
(Default)
Reserved
(Default)
5
High
N15S_GTN15S-GT
Disable on
board memory
Reserved
Reserved
HSW_ULT_DDR3L
+3V
+3V
+3V
+3V
+3V
+3V
Q PN
GPIO
+3V
RAM_ID0
RAM_ID1
RAM_ID2
RAM_ID3
DSW
10 OF 19
R646 *10K_4
R214 10K_4
R637 *10K_4
R641 *10K_4
Mfr. PN
CPU/
MISC
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
SERIAL IO
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
THRMTRIP
+3V
RCIN/GPIO82
PCH_OPI_RCOMP
GSPI0_CS/GPIO83
GSPI0_CLK/GPIO84
GSPI0_MISO/GPIO85
GSPI0_MOSI/GPIO86
GSPI1_CS/GPIO87
GSPI1_CLK/GPIO88
GSPI1_MISO/GPIO89
GSPI_MOSI/GPIO90
UART0_RXD/GPIO91
UART0_TXD/GPIO92
UART0_RTS/GPIO93
UART0_CTS/GPIO94
UART1_RXD/GPIO0
UART1_TXD/GPIO1
UART1_RST/GPIO2
UART1_CTS/GPIO3
I2C0_SDA/GPIO4
I2C0_SCL/GPIO5
I2C1_SDA/GPIO6
I2C1_SCL/GPIO7
SDIO_CLK/GPIO64
SDIO_CMD/GPIO65
SDIO_D0/GPIO66
SDIO_D1/GPIO67
SDIO_D2/GPIO68
SDIO_D3/GPIO69
+3V_S5
AKD5JGETW04 H5TC4G63AFR-PRBA 1600MHz
AKD5JGETW04
H5TC4G63AFR-PBA
1600MHz
H5TC4G63AFR-PBA 1600MHzHynix 0011 AKD5JGETW04
+3V
SKU_ID0
SKU_ID1
0
1
0
1
4
R587 EV@10K_4
R104 EV@10K_4
Setup
Signal
Menu
UMA
Hidden
UMA boot
GPU
Hidden
GPU boot
UMA+GPU dGPU/SG UMA boot
UMA
UMA/SG
UMA boot
D60
THRMTRIP#
V4
SIO_RCIN#
T4
AW15
AF20
AB21
R6
L6
N6
L8
R7
L5
N7
K2
J1
K3
J2
G1
K4
G2
J3
J4
F2
F3
G4
F1
E3
F4
D3
E4
C3
E2
IRQ_SERIRQ
OPI_COMP2
SERIRQ
RSVD
RSVD
CPU thermal trip
2G
4G
4G
THRMTRIP#
IMVP_PWRGD5,40
GPIO83
GPIO84
GPIO85
GPIO86
GPIO87
GPIO88
GPIO89
GPIO90
GPIO91
GPIO92
GPIO93
GPIO94
SIO_EXT_SMI#
SIO_EXT_SCI#
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO64
GPIO65
GPIO66
GPIO67
GPIO68
GPIO69
IMVP_PWRGD_3V
+1.05V_VCCST
3
R664 49.9/F_4
TP_INT_PCH 25
change GPIO port same as ZQ0
GPU GC6 2.0 function use
GPIO2/3.
+1.05V_VCCST
3
2
R96
1K_4
2
Q8
FDV301N
1
R95
1K_4
2
1 3
Q9 MMBT3904-7-F
U10
NC1VCC
A
GND3Y
74AUP1G07GW
SIO_RCIN# 35
IRQ_SERIRQ 28,35
GPIO86 8
SIO_EXT_SMI# 35
SIO_EXT_SCI# 35
DGPU_EVENT# 19
GC6_FB_EN 17,19
GPIO66 8
SYS_SHDN# 28,37,41
+1.05V_VCCST
5
12
C51
0.1u/10V_4
4
+3V
2
R33
10K_4
IRQ_SERIRQ
DEVSLP0
DEVSLP1
SIO_RCIN#
SIO_EXT_SMI#
SIO_EXT_SCI#
GPIO83
GPIO84
GPIO85
GPIO87
GPIO88
GPIO89
GPIO90
GPIO91
GPIO92
GPIO93
GPIO94
GPIO6
Follow ZQ0
R535 *EVG@10K_4
R592 *100K_4
high UMA Only
low
R556 EV@100K_4
R118 *10K_4
GPIO7
GPIO2
GPIO4
GPIO5
GPIO64
GPIO65
GPIO67
GPIO68
GPIO69
DGPU_PWR_EN
DGPU_HOLD_RST#
GPU power is control by PCH
GPIO (Discrete, SG or Optimize)
GPIO3
DGPU_PW_CTRL#
DGPU_PWROK
R114 10K_4
R132 *10K_4
R544 *10K_4
R139 10K_4
R160 10K_4
R528 10K_4
R156 10K_4
R108 10K_4
R158 10K_4
R110 10K_4
R157 10K_4
R155 10K_4
R539 10K_4
R533 10K_4
R159 10K_4
R529 10K_4
R527 10K_4
R98 10K_4
R94 10K_4
R534 *10K_4
R531 *IV@10K_4
R524 10K_4
R525 10K_4
R523 10K_4
R97 10K_4
R92 10K_4
R91 10K_4
R520 10K_4
R593 10K_4
R586 10K_4
R574 IV@1K_4
DGPU_PWROK PD on GPU side
LAN_DISABLE#
ODD_PRSNT#
GPIO8
GPIO24
GPIO28
GPIO47
GPIO57
GPIO56
GPIO59
GPIO58
GPIO44
GPIO25
GPIO45
IMVP_PWRGD_3V 7
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
GPIO27 : If not used then use
8.2-kΩ to 10-kΩ pull-down to GND.
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LPT 4/6 (GPIO/MISC)
LPT 4/6 (GPIO/MISC)
LPT 4/6 (GPIO/MISC)
WK_GPIO27
R220 10K_4
R635 10K_4
R213 *10K_4
R138 10K_4
R204 10K_4
R141 10K_4
R648 10K_4
R208 10K_4
R202 10K_4
R203 10K_4
R231 10K_4
R206 10K_4
R209 10K_4
R686 *10K_4
R688 10K_4
Z8C
Z8C
Z8C
1
10
+3V
+3V
+3V_S5
+3VPCU
10 48
10 48
10 48
3A
3A
3A
![](/html/8d/8ddb/8ddb943ffc8acad15cf94dc59ead6cad5dc6c7fa57ff2d0071517dfc9c4d7522/bgb.png)
5
C173 1u/6.3V_4
C191 1u/6.3V_4
+1.05V
+1.05V_S5
25mA
C252
1u/6.3V_4
R133 *SHORT_8
Deep Sx
+3VPCU
+3V_S5
D D
R263 *0_6
+1.05V_S5
Non Deep Sx
+3V
C C
+1.05V
WW15 4/10 Intel VCCDSW3
G3 can't boot issue.
C240
+PCH_VCCDSW+VCCPDSW
0.47u/25V_6
+V1.05DX_MODPHY
R119 *0_4
+1.05V_DCPSUS2
R212 *0_6
R211 *SHORT_6
1u/6.3V_4
C175 1u/6.3V_4
+3VCC_S5
1.741A
C194
*1u/6.3V_4
C174
10u/6.3V_6
C255
R117*SHORT_8
+V1.05S_AIDLE
10mA
C178
1u/6.3V_4
+V3.3DX_1.5DX_1.8DX_AUDIO
0.114A
41mA
C176
22u/6.3V_8
+1.05V
63mA
+3VCC_S5
PCH VCCHSIO Power(REMOVE LDO)
4
+V1.05S_AUSB3PLL
+V1.05S_ASATA3PLL
+V1.05S_APLLOPI
+1.05V_DCPSUS3
C292 22u/6.3V_8
+VCCPDSW
+V3.3S_VCCPCORE
+V1.05S_AXCK_DCB
+V1.05S_AXCK_LCPLL
C227 1u/6.3V_4
1.838A
B18
B11
Y20
AA21
W21
AH14
AH13
AC9
AA9
AH10
K19
A20
R21
T21
K18
M20
V21
AE20
AE21
K9
L10
M9
N8
P9
J13
V8
W9
J18
J17
3
Haswell ULT PCH (Power)
HSIO
USB3
HDA
VRM
GPIO/LPC
LPT LP POWER
HSW_ULT_DDR3L
OPI
RTC
SPI
CORE
THERMAL SENSOR
SERIAL IO
SUS OSCILLATOR
USB2
13 OF 19
U45M
VCCHSIO
VCCHSIO
VCCHSIO
VCC1_05
VCC1_05
VCCUSB3PLL
VCCSATA3PLL
RSVD
VCCAPLL
VCCAPLL
DCPSUS3
VCCHDA
DCPSUS2
VCCSUS3_3
VCCSUS3_3
VCCDSW3_3
VCC3_3
VCC3_3
VCCCLK
VCCCLK
VCCACLKPLL
VCCCLK
VCCCLK
VCCCLK
RSVD
RSVD
RSVD
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCRTC
DCPRTC
VCCSPI
VCCASW
VCCASW
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
DCPSUSBYP
DCPSUSBYP
VCCASW
VCCASW
VCCASW
DCPSUS1
DCPSUS1
VCCTS1_5
VCC3_3
VCC3_3
VCCSDIO
VCCSDIO
DCPSUS4
RSVD
VCC1_05
VCC1_05
AH11
AG10
AE7
Y8
AG14
AG13
J11
H11
H15
AE8
AF22
AG19
AG20
AE9
AF9
AG8
AD10
AD8
J15
K14
K16
U8
T9
AB8
AC20
AG16
AG17
+VCCRTCEXT
+V3.3M_PSPI
PCH_VCC_1_1_21
+V1.05S_CORE_PCH
+1.05V_DCPSUS1
18mA
+PCH_VCCDSW
+V1.05M_VCCASW
0.109A
R264 *0_6
C229
1u/6.3V_4
+V3.3S_VCCSDIO
+1.05V_DCPSUS4
2
R145 *SHORT_6
+V1.05M_VCCASW
+1.05V_S5
3mA
1mA
17mA
R262 *0_6
C216
1u/6.3V_4
C238
1u/6.3V_4
C249
0.1u/10V_4
C225
0.1u/10V_4
C254
1u/6.3V_4
0.658A
C239
1u/6.3V_4
+V1.5S_VCCATS
+V3.3S_VCCPTS
+1.05V_S5
+1.05V
+1.05V
C231
1u/6.3V_4
C235
22u/6.3V_8
+3VCC_S5
C683
C682
0.1u/10V_4
1u/6.3V_4
R168 *SHORT_6
R154 *0_6
C233
0.1u/10V_4
C211
10u/6.3V_6
C250
1u/6.3V_4
R165 *SHORT_8
R84 *SHORT_6
R79 *SHORT_6
C205
1u/6.3V_4
C212
1u/6.3V_4
+3V_RTC
+3V_S5
+3V
R128 *SHORT_8
+1.05V
+1.5V
+3V
R113 *SHORT_6
1
11
+1.05V
+3V
B B
+V1.05DX_MODPHY +1.05V
PR21 *SHORT_8
+V1.05S_VCCUSBCORE
VCCAPLL power
+V1.05S_APLLOPI+1.05V
C251
0.1u/10V_4
57mA
C661
*47u/6.3V_8
C236
1u/6.3V_4
2
L16 2.2uH/210mA_8
C260
*47u/6.3V_8
+V1.05DX_MODPHY +V1.05S_AUSB3PLL +V1.05DX_MODPHY +V1.05S_ASATA3PLL
A A
L12 2.2uH/210mA_8
C103
47u/6.3V_8
C99
47u/6.3V_8
C635
1u/6.3V_4
L11 2.2uH/210mA_8
C104
47u/6.3V_8
42mA41mA
C100
47u/6.3V_8
C636
1u/6.3V_4
PCH HDA Power
+3V_S5
R210 *SHORT_6
11mA
+V3.3DX_1.5DX_1.8DX_AUDIO
Place close to ball
5
4
3
R232 *SHORT_8
C253
1u/6.3V_4
+1.05V +V1.05S_AXCK_DCB
L30 2.2uH/210mA_8
+1.05V +V1.05S_AXCK_LCPLL
L10 2.2uH/210mA_8
+1.05V
0.2A
C619
47u/6.3V_8
C618
47u/6.3V_8
C165
1u/6.3V_4
31mA
C87
47u/6.3V_8
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Sunday, November 16, 2014
Date: Sheet of
Sunday, November 16, 2014
Date: Sheet of
Sunday, November 16, 2014
C96
47u/6.3V_8
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LPT 5/6 (POWER)
LPT 5/6 (POWER)
LPT 5/6 (POWER)
C634
1u/6.3V_4
1
Z8C
Z8C
Z8C
11 48
11 48
11 48
3A
3A
3A
![](/html/8d/8ddb/8ddb943ffc8acad15cf94dc59ead6cad5dc6c7fa57ff2d0071517dfc9c4d7522/bgc.png)
5
4
3
2
1
Haswell ULT (GND)
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U45O
HSW_ULT_DDR3L
15 OF 19
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AV59
AV8
AW16
AW24
AW33
AW35
AW37
AW4
AW40
AW42
AW44
AW47
AW50
AW51
AW59
AW60
AY11
AY16
AY18
AY22
AY24
AY26
AY30
AY33
AY4
AY51
AY53
AY57
AY59
AY6
B20
B24
B26
B28
B32
B36
B4
B40
B44
B48
B52
B56
B60
C11
C14
C18
C20
C25
C27
C38
C39
C57
D12
D14
D18
D2
D21
D23
D25
D26
D27
D29
D30
D31
D33
D34
D35
D37
D38
D39
D41
D42
D43
D45
D46
D47
D49
D50
D51
D53
D54
D55
D57
D59
D62
G18
G22
H13
E11
E17
F20
F26
F30
F34
F38
F42
F46
F50
F54
F58
F61
HSW_ULT_DDR3L
U45P
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G3
VSS
G5
VSS
G6
VSS
G8
VSS
VSS
16 OF 19
VSS_SENSE
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H17
H57
J10
J22
J59
J63
K1
K12
L13
L15
L17
L18
L20
L58
L61
L7
M22
N10
N3
P59
P63
R10
R22
R8
T1
T58
U20
U22
U61
U9
V10
V3
V7
W20
W22
Y10
Y59
Y63
V58
AH46
V23
E62
AH16
VSS_SENSE_R
U45R
AT2
RSVD
AU44
RSVD
AV44
RSVD
D15
RSVD
F22
RSVD
H22
RSVD
J21
RSVD
R530 *SHORT_4
R532 100/F_4
HSW_ULT_DDR3L
D D
C C
B B
A11
A14
A18
A24
A28
A32
A36
A40
A44
A48
A52
A56
AA1
AA58
AB10
AB20
AB22
AB7
AC61
AD21
AD3
AD63
AE10
AE5
AE58
AF11
AF12
AF14
AF15
AF17
AF18
AG1
AG11
AG21
AG23
AG60
AG61
AG62
AG63
AH17
AH19
AH20
AH22
AH24
AH28
AH30
AH32
AH34
AH36
AH38
AH40
AH42
AH44
AH49
AH51
AH53
AH55
AH57
AJ13
AJ14
AJ23
AJ25
AJ27
AJ29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U45N
14 OF 19
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ35
AJ39
AJ41
AJ43
AJ45
AJ47
AJ50
AJ52
AJ54
AJ56
AJ58
AJ60
AJ63
AK23
AK3
AK52
AL10
AL13
AL17
AL20
AL22
AL23
AL26
AL29
AL31
AL33
AL36
AL39
AL40
AL45
AL46
AL51
AL52
AL54
AL57
AL60
AL61
AM1
AM17
AM23
AM31
AM52
AN17
AN23
AN31
AN32
AN35
AN36
AN39
AN40
AN42
AN43
AN45
AN46
AN48
AN49
AN51
AN52
AN60
AN63
AN7
AP10
AP17
AP20
AP22
AP23
AP26
AP29
AP31
AP38
AP39
AP48
AP52
AP54
AP57
AR11
AR15
AR17
AR23
AR31
AR33
AR39
AR43
AR49
AR52
AT13
AT35
AT37
AT40
AT42
AT43
AT46
AT49
AT61
AT62
AT63
AU16
AU18
AU20
AU22
AU24
AU26
AU28
AU30
AU33
AU51
AU53
AU55
AU57
AU59
AV14
AV16
AV20
AV24
AV28
AV33
AV34
AV36
AV39
AV41
AV43
AV46
AV49
AV51
AV55
AP3
AR5
AU1
HSW_ULT_DDR3L
18 OF 19
VSS_SENSE 40
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
12
N23
R23
T23
U10
AL1
AM11
AP7
AU10
AU15
AW14
AY14
U45Q
DC_TEST_AY2_AW2
DC_TEST_AY3_AW3
TP_DC_TEST_AY60
TP146
DC_TEST_AY61_AW61
DC_TEST_AY62_AW62
TP_DC_TEST_B2
A A
5
TP111
DC_TEST_A3_B3
DC_TEST_A61_B61
DC_TEST_B62_B63
DC_TEST_C1_C2
AY2
DAISY_CHAIN_NCTF_AY2
AY3
DAISY_CHAIN_NCTF_AY3
AY60
DAISY_CHAIN_NCTF_AY60
AY61
DAISY_CHAIN_NCTF_AY61
AY62
DAISY_CHAIN_NCTF_AY62
B2
DAISY_CHAIN_NCTF_B2
B3
DAISY_CHAIN_NCTF_B3
B61
DAISY_CHAIN_NCTF_B61
B62
DAISY_CHAIN_NCTF_B62
B63
DAISY_CHAIN_NCTF_B63
C1
DAISY_CHAIN_NCTF_C1
C2
DAISY_CHAIN_NCTF_C2
4
HSW_ULT_DDR3L
17 OF 19
DAISY_CHAIN_NCTF_A3
DAISY_CHAIN_NCTF_A4
DAISY_CHAIN_NCTF_A60
DAISY_CHAIN_NCTF_A61
DAISY_CHAIN_NCTF_A62
DAISY_CHAIN_NCTF_AV1
DAISY_CHAIN_NCTF_AW1
DAISY_CHAIN_NCTF_AW2
DAISY_CHAIN_NCTF_AW3
DAISY_CHAIN_NCTF_AW61
DAISY_CHAIN_NCTF_AW62
DAISY_CHAIN_NCTF_AW63
3
A3
DC_TEST_A3_B3
A4
TP_DC_TEST_A4
A60
TP_DC_TEST_A60
A61
DC_TEST_A61_B61
A62
TP_DC_TEST_A62
AV1
TP_DC_TEST_AV1
AW1
TP_DC_TEST_AW1
AW2
DC_TEST_AY2_AW2
AW3
DC_TEST_AY3_AW3
AW61
DC_TEST_AY61_AW61
AW62
DC_TEST_AY62_AW62
AW63
TP_DC_TEST_AW63
TP110
TP112
TP115
TP144
TP145
TP147
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
Saturday, November 15, 2014
Date: Sheet of
2
Saturday, November 15, 2014
PROJECT :
LPT 6/6 (GND)
LPT 6/6 (GND)
LPT 6/6 (GND)
1
Z8C
Z8C
Z8C
12 48
12 48
12 48
3A
3A
3A
![](/html/8d/8ddb/8ddb943ffc8acad15cf94dc59ead6cad5dc6c7fa57ff2d0071517dfc9c4d7522/bgd.png)
5
H_SYS_PWROK_XDP
R274 *1K_4
+3V_S5
4
3
2
1
13
+3V
D D
C C
B B
XDP_DBRESET_N
R196 *1K_4
HWPG_1.05V_S535,38
SYS_PWROK7
R737 *SHORT_6
R254 1K_4
R261 *SHORT_4
APS3
XDP_PREQ#4
XDP_PRDY#4
CFG06
CFG16
CFG26
CFG36
XDP_BPM#04
XDP_BPM#14
CFG46,8
CFG56
CFG66
CFG76
PWR_DEBUG5
CLK_SDATA8,14,15,33
CLK_SCLK8,14,15,33
XDP_TCK18
XDP_TCK04,8
R718 *SHORT_6
APS
CN14
A A
*ACES_88511-180N
1
APS1
1
2
2
3
APS3
3
4
4
5
5
6
6
7
APS7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
5
R723 *SHORT_6
R736 *SHORT_4
R716 *0_6
R735 *SHORT_4
R734 *SHORT_4
R733 *SHORT_4
R717 *0_6
R730 *SHORT_4
R729 *SHORT_4
R728 *SHORT_4
R727 *SHORT_4
+3VCC_S5
SYS_RESET#
SUSB# 7,35
PCH_SLP_S5# 7
SUSC# 7,35
PCH_SLP_A# 7
RTC_RST# 8
NBSWON# 32,35
SYS_RESET# 7
PCH_SLP_S0# 7
4
+3VPCU
+3VPCU
APS7APS1
VCCST_PWRGD5
XDP_PREQ_N
XDP_PRDY_N
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
VCCST_PWRGD_XDP
NBSWON#
H_SYS_PWROK_XDP
U15
NC1VCC
2
A
GND3Y
*74AUP1G07GW
XDP_TDO
XDP_TDI
XDP_TMS
XDP_TRST_N
R90
*10K_4
NOA_STBP_0
NOA_STBN_0
CFG8
CFG9
CFG10
CFG11
NOA_STBP_1
NOA_STBN_1
CFG12
CFG13
CFG14
CFG15
CK_XDP_P_R
CK_XDP_N_R
XDP_RST_R_N
XDP_DBRESET_N
XDP_TDO
XDP_TRST_N
XDP_TDI
XDP_TMS
+3V
NOA_STBP_0 6
NOA_STBN_0 6
CFG8 6
CFG9 6
CFG10 6
CFG11 6
NOA_STBP_1 6
NOA_STBN_1 6
CFG12 6
CFG13 6
CFG14 6
CFG15 6
R81 *SHORT_4
R82 *SHORT_4
R215 1K_4
R195 *SHORT_4
R166 *51_4
C192
0.1u/10V_4
U17
14
VCC
2
1A
1
1OE
5
2A
4
2OE
9
3A
10
3OE
12
4A
13
4OE
*74CBTLV3126
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
CLK_PCIE_XDPP 9
CLK_PCIE_XDPN 9
SYS_RESET#
DPAD
GND
CPU/PCH XDP
CPU/PCH XDP
CPU/PCH XDP
Saturday, November 15, 2014
Saturday, November 15, 2014
Saturday, November 15, 2014
PLTRST# 7,16,27,28,29,35
+1.05V_S5
3
1B
6
2B
8
3B
11
4B
15
7
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
XDP_TDO_CPU 4
XDP_TDI_CPU 4
XDP_TMS_CPU 4
XDP_TRST# 4,8
Z8C
Z8C
Z8C
13 48
13 48
13 48
1
3A
3A
3A
TP52
TP30
TP132
TP20
TP38
TP63
TP42
TP45
TP44
TP47
TP46
TP131
TP141
TP19
TP69
TP17
TP32
TP55
TP129
TP128
TP33
TP40
TP41
TP53
TP2
TP86
TP130
TP3
TP35
TP85
TP87
TP84
TP65
TP88
TP89
TP121
TP139
TP64
TP62
TP68
XDP_TDO8
XDP_TDI8
XDP_TMS8
+1.05V
+3V
5
*0.1u/10V_4
4
3
C156
12
![](/html/8d/8ddb/8ddb943ffc8acad15cf94dc59ead6cad5dc6c7fa57ff2d0071517dfc9c4d7522/bge.png)
1
<DDR>
A A
Hynix
Elpida
B B
C C
+1.35V_SUS
D D
+DDR_VTT_RUN
M_A_DQS#[7:0]3
M_A_DQS[7:0]3
M_A_DQ[63:0]3
M_A_A[15:0]3
SO-DIMMB SPD Ad dress is 0XA4
SO-DIMMB TS Add ress is 0X34
M_A_BS#[2:0]3
M_A_CLK03
M_A_CLK0#3
M_A_CKE03
M_A_CS#03
M_A_RAS#3
M_A_CAS#3
M_A_WE#3
DDR3_DRAMRST#4,15
R374
240/F_4
1 2
P/NVendo r
AKD5JGST400
DDR3L 1333Mhz 4 Gb
DDR3L 1600Mhz 4 GbAKD5JGST404
SO-DIMMB SPD Ad dress is 0XA4
SO-DIMMB TS Add ress is 0X34
M_A_CLK13
M_A_CLK1#3
M_A_CKE13
M_A_CS#13
M_A_ZQ5
R745
240/F_4
1 2
Place these Caps near Memory Down
C464
C425
10u/6.3V_6
C733
*1u/6.3V_4
C396
1u/6.3V_4
C384
1u/6.3V_4
C389
1u/6.3V_4
C764
*0.1u/10V_4
C735
*0.1u/10V_4
C414
1u/6.3V_4
C729
1u/6.3V_4
C418
10u/6.3V_6
*10u/6.3V_6
C734
C713
*1u/6.3V_4
1u/6.3V_4
C435
C441
*1u/6.3V_4
*1u/6.3V_4
C383
C456
*1u/6.3V_4
*1u/6.3V_4
C753
C727
*1u/6.3V_4
1u/6.3V_4
C754
C755
*0.1u/10V_4
*0.1u/10V_4
C739
C718
*0.1u/10V_4
*0.1u/10V_4
C731
C725
1u/6.3V_4
1u/6.3V_4
C726
C394
1u/6.3V_4
1u/6.3V_4
1
2
U28
VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSL
DQSU
RESET
ZQ
NC#J1
NC#L1
NC#J9
NC#L9
RAM _DDR3L
100-BALL
SDRAM DDR3
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
M8
+SMDDR_VREF_DIMM +SMDDR_VREF_DIMM
H1
+SMDDR_VREF_DQ0
N3
M_A_A0
P7
M_A_A1
P3
M_A_A2
N2
M_A_A3
P8
M_A_A4
P2
M_A_A5
R8
M_A_A6
R2
M_A_A7
T8
M_A_A8
R3
M_A_A9
L7
M_A_A10
R7
M_A_A11
N7
M_A_A12
T3
M_A_A13
T7
M_A_A14
M7
M_A_A15
M2
M_A_BS#0
N8
M_A_BS#1
M3
M_A_BS#2
J7
K7
K9
M_A_CKE0
K1
M_A_ODT0
L2
J3
K3
L3
F3
M_A_DQS1
C7
M_A_DQS3
E7
D3
G3
M_A_DQS#1
B7
M_A_DQS#3
T2
L8
J1
L1
J9
L9
3
M_A_DQ12
M_A_DQ11
M_A_DQ13
M_A_DQ15
M_A_DQ9
M_A_DQ10
M_A_DQ8
M_A_DQ14
M_A_DQ30
M_A_DQ25
M_A_DQ31
M_A_DQ28
M_A_DQ27
M_A_DQ29
M_A_DQ26
M_A_DQ24
+1.35V_SUS +1.35V_SUS +1.35V_SUS +1.35V_SUS
+SMDDR_VREF_DQ0
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CLK0
M_A_CLK0#
M_A_CKE0
M_A_ODT0
M_A_CS#0
M_A_RAS#
M_A_CAS#
M_A_WE#
M_A_DQS5
M_A_DQS6
M_A_DQS#5
M_A_DQS#6
DDR3_DRAMRST#
M_A_ZQ2M_A_ZQ1
R342
240/F_4
1 2
BYTE1_8-15 BYTE0_0-7
U50
VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSL
DQSU
RESET
ZQ
NC#J1
NC#L1
NC#J9
NC#L9
RAM _DDR3L
2
100-BALL
SDRAM DDR3
C461
*10u/6.3V_6
C421
1u/6.3V_4
C392
*1u/6.3V_4
C445
*1u/6.3V_4
C752
*1u/6.3V_4
C746
*0.1u/10V_4
C424
*0.1u/10V_4
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
C705
*10u/6.3V_6
C347
*1u/6.3V_4
C376
*1u/6.3V_4
C446
*1u/6.3V_4
C712
*1u/6.3V_4
C697
*0.1u/10V_4
C451
*0.1u/10V_4
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
M_A_DQ11
M_A_DQ12
M_A_DQ15
M_A_DQ13
M_A_DQ14
M_A_DQ8
M_A_DQ10
M_A_DQ9
M_A_DQ25
M_A_DQ30
M_A_DQ28
M_A_DQ31
M_A_DQ29
M_A_DQ26
M_A_DQ24
M_A_DQ27
C756
10u/6.3V_6
C365
1u/6.3V_4
C386
*1u/6.3V_4
C454
*1u/6.3V_4
C749
1u/6.3V_4
C702
*0.1u/10V_4
C738
*0.1u/10V_4
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CLK1
M_A_CLK1#
M_A_CKE1
M_A_ODT0
M_A_CS#1
M_A_RAS#
M_A_CAS#
M_A_WE#
M_A_DQS5
M_A_DQS6
M_A_DQS#5
M_A_DQS#6
DDR3_DRAMRST# DDR3_DRAMRST#
M_A_ZQ6
R756
240/F_4
1 2
C737
C462
12
10u/6.3V_6
C385
*1u/6.3V_4
C748
*1u/6.3V_4
C751
*1u/6.3V_4
C715
1u/6.3V_4
C700
*0.1u/10V_4
C703
*0.1u/10V_4
C437
0.047u/25V_4
12
C363
*10u/6.3V_6
C364
*1u/6.3V_4
C695
*1u/6.3V_4
C432
*1u/6.3V_4
C708
*1u/6.3V_4
C447
*0.1u/10V_4
C696
*0.1u/10V_4
C436
0.047u/25V_4
12
*10u/6.3V_6
C449
*1u/6.3V_4
C728
1u/6.3V_4
C723
*1u/6.3V_4
C750
*1u/6.3V_4
C709
*0.1u/10V_4
C417
*0.1u/10V_4
C438
0.047u/25V_4
Place these Caps near Memory Down CA & DQ pin
12
12
12
C406
C759
0.047u/25V_4
3
C758
0.047u/25V_4
0.047u/25V_4
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
DDR3_DRAMRST#
C463
10u/6.3V_6
C422
1u/6.3V_4
C420
1u/6.3V_4
C443
*1u/6.3V_4
C704
*1u/6.3V_4
C736
*0.1u/10V_4
C720
*0.1u/10V_4
C730
1u/6.3V_4
C423
1u/6.3V_4
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CKE1
M_A_ODT0
M_A_CS#1
M_A_RAS#
M_A_CAS#
M_A_WE#
M_A_DQS1
M_A_DQS3
M_A_DQS#1
M_A_DQS#3
C374
10u/6.3V_6
C395
1u/6.3V_4
C380
1u/6.3V_4
C448
*1u/6.3V_4
C433
*1u/6.3V_4
C744
*0.1u/10V_4
C719
*0.1u/10V_4
C760
10u/6.3V_6
C337
10u/6.3V_6
M8
H1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
M2
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
C7
E7
D3
G3
B7
T2
L8
J1
L1
J9
L9
SP : ELPIDA DRAM P/N : AKD5JG ST400
HYNIX DRAM P/N : AKD5JGQ TW01
12
12
C319
*10u/6.3V_6
C453
*1u/6.3V_4
C745
1u/6.3V_4
C388
*1u/6.3V_4
C467
*1u/6.3V_4
C373
*0.1u/10V_4
C458
*0.1u/10V_4
C411
0.047u/25V_4
C403
0.047u/25V_4
4
BYTE6_48-55 BYTE7_56-63
U29
VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSL
DQSU
RESET
ZQ
NC#J1
NC#L1
NC#J9
NC#L9
RAM _DDR3L
100-BALL
SDRAM DDR3
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E3
M_A_DQ41
DQL0
F7
M_A_DQ42
DQL1
F2
M_A_DQ40
DQL2
F8
M_A_DQ46
DQL3
H3
M_A_DQ44
DQL4
H8
M_A_DQ43
DQL5
G2
M_A_DQ45
DQL6
H7
M_A_DQ47
DQL7
D7
M_A_DQ55
DQU0
C3
M_A_DQ52
DQU1
C8
M_A_DQ49
DQU2
C2
M_A_DQ51
DQU3
A7
M_A_DQ48
DQU4
A2
M_A_DQ53
DQU5
B8
M_A_DQ54
DQU6
A3
M_A_DQ50
DQU7
B2
VDD#B2
D9
VDD#D9
G7
VDD#G7
K2
VDD#K2
K8
VDD#K8
N1
VDD#N1
N9
VDD#N9
R1
VDD#R1
R9
VDD#R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
VSS#A9
B3
VSS#B3
E1
VSS#E1
G8
VSS#G8
J2
VSS#J2
J8
VSS#J8
M1
VSS#M1
M9
VSS#M9
P1
VSS#P1
P9
VSS#P9
T1
VSS#T1
T9
VSS#T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
R378
240/F_4
1 2
M8
H1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
M2
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
C7
E7
D3
G3
B7
T2
L8
J1
L1
J9
L9
BYTE5_40-47 BYTE4_32-39
U51
VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSL
DQSU
RESET
ZQ
NC#J1
NC#L1
NC#J9
NC#L9
RAM _DDR3L
12
12
100-BALL
SDRAM DDR3
C465
10u/6.3V_6
C459
*1u/6.3V_4
C698
1u/6.3V_4
C743
*1u/6.3V_4
C742
1u/6.3V_4
C375
*0.1u/10V_4
C413
*0.1u/10V_4
C408
0.047u/25V_4
C404
0.047u/25V_4
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
12
12
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
C350
*10u/6.3V_6
C440
*1u/6.3V_4
C747
*1u/6.3V_4
C366
1u/6.3V_4
C434
1u/6.3V_4
C415
*0.1u/10V_4
C457
*0.1u/10V_4
C741
0.047u/25V_4
C765
0.047u/25V_4
E3
M_A_DQ42
F7
M_A_DQ41
F2
M_A_DQ46
F8
M_A_DQ40
H3
M_A_DQ47
H8
M_A_DQ45
G2
M_A_DQ43
H7
M_A_DQ44
D7
M_A_DQ52
C3
M_A_DQ55
C8
M_A_DQ51
C2
M_A_DQ49
A7
M_A_DQ53
A2
M_A_DQ54
B8
M_A_DQ50
A3
M_A_DQ48
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
C367
C431
10u/6.3V_6
*10u/6.3V_6
C442
C450
*1u/6.3V_4
1u/6.3V_4
C732
C694
1u/6.3V_4
1u/6.3V_4
C444
C379
1u/6.3V_4
*1u/6.3V_4
C740
C452
1u/6.3V_4
*1u/6.3V_4
C428
C398
*0.1u/10V_4
*0.1u/10V_4
C455
C393
*0.1u/10V_4
*0.1u/10V_4
12
12
C466
C412
0.047u/25V_4
0.047u/25V_4
12
12
C401
C762
0.047u/25V_4
0.047u/25V_4
4
M8
H1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
M2
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
C7
E7
D3
G3
B7
T2
L8
J1
L1
J9
L9
M_A_ZQ3
5
U30
M8
+SMDDR_VREF_DIMM
VREFCA
H1
+SMDDR_VREF_DQ0
VREFDQ
N3
M_A_A0
A0
P7
M_A_A1
A1
P3
M_A_A2
A2
N2
M_A_A3
A3
P8
M_A_A4
A4
P2
M_A_A5
A5
R8
M_A_A6
A6
R2
M_A_A7
A7
T8
M_A_A8
A8
R3
M_A_A9
A9
L7
M_A_A10
A10/AP
R7
M_A_A11
A11
N7
M_A_A12
A12/BC
T3
M_A_A13
A13
T7
M_A_A14
A14
M7
M_A_A15
A15
M2
M_A_BS#0
BA0
N8
M_A_BS#1
BA1
M3
M_A_BS#2
BA2
J7
M_A_CLK0
CK
K7
M_A_CLK0#
CK
K9
M_A_CKE0
CKE
K1
M_A_ODT0
ODT
L2
M_A_CS#0
CS
J3
M_A_RAS#
RAS
K3
M_A_CAS#
CAS
L3
M_A_WE#
WE
F3
M_A_DQS0
DQSL
C7
M_A_DQS2
DQSU
E7
DML
D3
DMU
G3
M_A_DQS#0
DQSL
B7
M_A_DQS#2
DQSU
T2
DDR3_DRAMRST#
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
100-BALL
SDRAM DDR3
RAM _DDR3L
U52
M8
+SMDDR_VREF_DIMM
VREFCA
H1
+SMDDR_VREF_DQ0
VREFDQ
N3
M_A_A0
A0
P7
M_A_A1
A1
P3
M_A_A2
A2
N2
M_A_A3
A3
P8
M_A_A4
A4
P2
M_A_A5
A5
R8
M_A_A6
A6
R2
M_A_A7
A7
T8
M_A_A8
A8
R3
M_A_A9
A9
L7
M_A_A10
A10/AP
R7
M_A_A11
A11
N7
M_A_A12
A12/BC
T3
M_A_A13
A13
T7
M_A_A14
A14
M7
M_A_A15
A15
M2
M_A_BS#0
BA0
N8
M_A_BS#1
BA1
M3
M_A_BS#2
BA2
J7
M_A_CLK1
CK
K7
M_A_CLK1#
CK
K9
M_A_CKE1
CKE
K1
M_A_ODT0
ODT
L2
M_A_CS#1
CS
J3
M_A_RAS#
RAS
K3
M_A_CAS#
CAS
L3
M_A_WE#
WE
F3
M_A_DQS0
DQSL
C7
M_A_DQS2
DQSU
E7
DML
D3
DMU
G3
M_A_DQS#0
DQSL
B7
M_A_DQS#2
DQSU
T2
DDR3_DRAMRST#
RESET
+VREF_CA_CPU
+VREFDQ_SA_M3
5
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
RAM _DDR3
R358 *SHORT_6
M3 solution
R305 *SHORT_6
M3 solution
100-BALL
SDRAM DDR3
M_A_ZQ7
R752
240/F_4
1 2
6
BYTE0_0-7BYTE1_8-15
BYTE2_16-23BYTE3_24-31
E3
M_A_DQ4
DQL0
F7
M_A_DQ2
DQL1
F2
M_A_DQ5
DQL2
F8
M_A_DQ6
DQL3
H3
M_A_DQ1
DQL4
H8
M_A_DQ3
DQL5
G2
M_A_DQ0
DQL6
H7
M_A_DQ7
DQL7
D7
M_A_DQ16
DQU0
C3
M_A_DQ19
DQU1
C8
M_A_DQ17
DQU2
C2
M_A_DQ18
DQU3
A7
M_A_DQ23
DQU4
A2
M_A_DQ20
DQU5
B8
M_A_DQ22
DQU6
A3
M_A_DQ21
DQU7
B2
VDD#B2
D9
VDD#D9
G7
VDD#G7
K2
VDD#K2
K8
VDD#K8
N1
VDD#N1
N9
VDD#N9
R1
VDD#R1
R9
VDD#R9
A1
VDDQ#A1
A8
VDDQ#A8
C1
VDDQ#C1
C9
VDDQ#C9
D2
VDDQ#D2
E9
VDDQ#E9
F1
VDDQ#F1
H2
VDDQ#H2
H9
VDDQ#H9
A9
VSS#A9
B3
VSS#B3
E1
VSS#E1
G8
VSS#G8
J2
VSS#J2
J8
VSS#J8
M1
VSS#M1
M9
VSS#M9
P1
VSS#P1
P9
VSS#P9
T1
VSS#T1
T9
VSS#T9
B1
VSSQ#B1
B9
VSSQ#B9
D1
VSSQ#D1
D8
VSSQ#D8
E2
VSSQ#E2
E8
VSSQ#E8
F9
VSSQ#F9
G1
VSSQ#G1
G9
VSSQ#G9
BYTE2_16-23BYTE3_24-31 BYTE6_48-55 BYTE7_56-63
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
B2
VDD#B2
D9
VDD#D9
G7
VDD#G7
K2
VDD#K2
K8
VDD#K8
N1
VDD#N1
N9
VDD#N9
R1
VDD#R1
R9
VDD#R9
A1
VDDQ#A1
A8
VDDQ#A8
C1
VDDQ#C1
C9
VDDQ#C9
D2
VDDQ#D2
E9
VDDQ#E9
F1
VDDQ#F1
H2
VDDQ#H2
H9
VDDQ#H9
A9
VSS#A9
B3
VSS#B3
E1
VSS#E1
G8
VSS#G8
J2
VSS#J2
J8
VSS#J8
M1
VSS#M1
M9
VSS#M9
P1
VSS#P1
P9
VSS#P9
T1
VSS#T1
T9
VSS#T9
B1
VSSQ#B1
B9
VSSQ#B9
D1
VSSQ#D1
D8
VSSQ#D8
E2
VSSQ#E2
E8
VSSQ#E8
F9
VSSQ#F9
G1
VSSQ#G1
G9
VSSQ#G9
M1 solution
+1.35V_SUS
R363 2/F_6
C419
0.022u/16V_4
1 2
R357
24.9/F_4
M1 solution
R322 5.1/F_6
C368
0.022u/16V_4
1 2
R304
24.9/F_4
R350 34.8/F_4
M_A_WE#
M_A_CAS#
R738 34.8/F_4
M_A_RAS#
R339 34.8/F_4
M_A_BS#0
R744 34.8/F_4
M_A_BS#1
R746 34.8/F_4
R351 34.8/F_4
M_A_BS#2
M_A_CKE0
R334 34.8/F_4
M_A_CS#0
R345 34.8/F_4
M_A_A0
R747 34.8/F_4
M_A_A1
R751 34.8/F_4
R359 34.8/F_4
M_A_A2
M_A_A3
R355 34.8/F_4
M_A_A4
R364 34.8/F_4
M_A_A5
R369 34.8/F_4
M_A_A6
R373 34.8/F_4
R371 34.8/F_4
M_A_A7
M_A_A8
R372 34.8/F_4
M_A_A9
R750 34.8/F_4
M_A_A10
R742 34.8/F_4
M_A_A11
R360 34.8/F_4
R354 34.8/F_4
M_A_A12
M_A_A13
R370 34.8/F_4
M_A_A14
R368 34.8/F_4
M_A_A15
R346 34.8/F_4
M_A_CKE1
R743 34.8/F_4
M_A_CS#1
R340 34.8/F_4
+1.35V_SUS
6
M_A_DQ2
M_A_DQ4
M_A_DQ6
M_A_DQ5
M_A_DQ7
M_A_DQ0
M_A_DQ3
M_A_DQ1
M_A_DQ19
M_A_DQ16
M_A_DQ18
M_A_DQ17
M_A_DQ20
M_A_DQ22
M_A_DQ21
M_A_DQ23
R365
1.8K/F_4
R366
1.8K/F_4
R325
1.8K/F_4
R327
1.8K/F_4
+DDR_VTT_RUN
M_A_ZQ4
R343
240/F_4
1 2
M_A_ZQ8
R757
240/F_4
1 2
Vref_CA
+SMDDR_VREF_DIMM
Vref_DQ
+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
DDR3_DRAMRST#
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
C439
470p/50V_4
C390
470p/50V_4
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CLK0
M_A_CLK0#
M_A_CKE0
M_A_ODT0
M_A_CS#0
M_A_RAS#
M_A_CAS#
M_A_WE#
M_A_DQS4
M_A_DQS7
M_A_DQS#4
M_A_DQS#7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CLK1
M_A_CLK1#
M_A_CKE1
M_A_ODT0
M_A_CS#1
M_A_RAS#
M_A_CAS#
M_A_WE#
M_A_DQS4
M_A_DQS7
M_A_DQS#4
M_A_DQS#7
CLK_SCLK8,13,15,33
CLK_SDATA8,13,15,33
WP =1 : WRITE DISABLE
7
U31
M8
DQL0
VREFCA
H1
DQL1
VREFDQ
DQL2
N3
DQL3
A0
P7
DQL4
A1
P3
A2
DQL5
N2
A3
DQL6
P8
A4
DQL7
P2
A5
R8
A6
R2
A7
DQU0
T8
A8
DQU1
R3
A9
DQU2
L7
A10/AP
DQU3
R7
A11
DQU4
N7
A12/BC
DQU5
T3
DQU6
A13
T7
DQU7
A14
M7
A15
M2
BA0
VDD#B2
N8
BA1
VDD#D9
M3
VDD#G7
BA2
VDD#K2
VDD#K8
VDD#N1
J7
CK
VDD#N9
K7
CK
VDD#R1
K9
CKE
VDD#R9
K1
VDDQ#A1
ODT
L2
CS
VDDQ#A8
J3
RAS
VDDQ#C1
K3
CAS
VDDQ#C9
L3
WE
VDDQ#D2
VDDQ#E9
VDDQ#F1
F3
DQSL
VDDQ#H2
C7
DQSU
VDDQ#H9
E7
VSS#A9
DML
D3
VSS#B3
DMU
VSS#E1
VSS#G8
G3
DQSL
VSS#J2
B7
DQSU
VSS#J8
VSS#M1
VSS#M9
VSS#P1
T2
RESET
VSS#P9
VSS#T1
L8
ZQ
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
J1
NC#J1
VSSQ#E8
L1
NC#L1
VSSQ#F9
J9
NC#J9
VSSQ#G1
L9
VSSQ#G9
NC#L9
100-BALL
SDRAM DDR3
RAM _DDR3L
U53
M8
DQL0
VREFCA
H1
DQL1
VREFDQ
DQL2
N3
DQL3
A0
P7
DQL4
A1
P3
A2
DQL5
N2
A3
DQL6
P8
A4
DQL7
P2
A5
R8
A6
R2
A7
DQU0
T8
A8
DQU1
R3
A9
DQU2
L7
A10/AP
DQU3
R7
A11
DQU4
N7
A12/BC
DQU5
T3
DQU6
A13
T7
DQU7
A14
M7
A15
M2
BA0
VDD#B2
N8
BA1
VDD#D9
M3
VDD#G7
BA2
VDD#K2
VDD#K8
VDD#N1
J7
CK
VDD#N9
K7
CK
VDD#R1
K9
CKE
VDD#R9
K1
VDDQ#A1
ODT
L2
CS
VDDQ#A8
J3
RAS
VDDQ#C1
K3
CAS
VDDQ#C9
L3
WE
VDDQ#D2
VDDQ#E9
VDDQ#F1
F3
DQSL
VDDQ#H2
C7
DQSU
VDDQ#H9
E7
VSS#A9
DML
D3
VSS#B3
DMU
VSS#E1
VSS#G8
G3
DQSL
VSS#J2
B7
DQSU
VSS#J8
VSS#M1
VSS#M9
VSS#P1
T2
RESET
VSS#P9
VSS#T1
L8
ZQ
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
J1
NC#J1
VSSQ#E8
L1
NC#L1
VSSQ#F9
J9
NC#J9
VSSQ#G1
L9
VSSQ#G9
NC#L9
100-BALL
SDRAM DDR3
RAM _DDR3L
R772 *0_4
R776 *0_4
R766 *1K_4
+3V
R333 30/F_4
M_A_ODT0
R719 26.1/F_4
M_A_CLK1
M_A_CLK1#
R725 26.1/F_4
M_A_CLK0
R731 26.1/F_4
R739 26.1/F_4
M_A_CLK0#
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
BYTE4_32-39BYTE5_40-47
E3
M_A_DQ33
F7
M_A_DQ35
F2
M_A_DQ32
F8
M_A_DQ39
H3
M_A_DQ36
H8
M_A_DQ34
G2
M_A_DQ38
H7
M_A_DQ37
D7
M_A_DQ60
C3
M_A_DQ62
C8
M_A_DQ61
C2
M_A_DQ63
A7
M_A_DQ56
A2
M_A_DQ59
B8
M_A_DQ57
A3
M_A_DQ58
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
E3
M_A_DQ35
F7
M_A_DQ33
F2
M_A_DQ39
F8
M_A_DQ32
H3
M_A_DQ37
H8
M_A_DQ38
G2
M_A_DQ34
H7
M_A_DQ36
D7
M_A_DQ62
C3
M_A_DQ60
C8
M_A_DQ63
C2
M_A_DQ61
A7
M_A_DQ59
A2
M_A_DQ57
B8
M_A_DQ58
A3
M_A_DQ56
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
R763 *1K_4
R768 *1K_4
R773 *1K_4
SPD_CLK_SCLK
SPD_CLK_SDATA
R770
*1K_4
+1.35V_SUS
+DDR_VTT_RUN
DDR3 ME MORY DOWNx16 A
DDR3 ME MORY DOWNx16 A
DDR3 ME MORY DOWNx16 A
Saturday, November 15, 2014
Saturday, November 15, 2014
Saturday, November 15, 2014
8
+1.35V_SUS+1.35V_SUS+1.35V_SUS +1.35V _SUS
SPD_A0
R764 *1K_4
SPD_A1
R771 *1K_4
SPD_A2
R777 *1K_4
U55
1
6
SPD_A0
A0
SCL
2
5
SPD_A1
A1
SDA
3
SPD_A2
A2
8
7
VCC
WP
4
GND
*M24C02-WMN6TP
SPD address:A2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
Z8C
PROJECT :
Z8C
PROJECT :
Z8C
14 48
14 48
14 48
8
+3V
14
+3V
C768
*0.1u/10V_4
3A
3A
3A
![](/html/8d/8ddb/8ddb943ffc8acad15cf94dc59ead6cad5dc6c7fa57ff2d0071517dfc9c4d7522/bgf.png)
5
4
3
2
1
M_B_A[15:0]3
D D
M_B_BS#03
M_B_BS#13
M_B_BS#23
M_B_CS#03
M_B_CS#13
M_B_CLK03
M_B_CLK0#3
M_B_CLK13
M_B_CLK1#3
M_B_CKE03
M_B_CKE13
M_B_CAS#3
M_B_RAS#3
R284 10K_4
R288 10K_4
+3V
C C
B B
M_B_WE#3
CLK_SCLK8,13,14,33
CLK_SDATA8,13,14,33
M_B_ODT0_DIMM4
M_B_ODT1_DIMM4
M_B_DQS[7:0]3
M_B_DQS#[7:0]3
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
DIMM1_SA0
DIMM1_SA1
M_B_DQS1
M_B_DQS3
M_B_DQS5
M_B_DQS7
M_B_DQS0
M_B_DQS2
M_B_DQS4
M_B_DQS6
M_B_DQS#1
M_B_DQS#3
M_B_DQS#5
M_B_DQS#7
M_B_DQS#0
M_B_DQS#2
M_B_DQS#4
M_B_DQS#6
JDIM1A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDR3-DIMM1_H=5.2_STD
PC2100 DDR3 SDRAM SO-DIMM
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
(204P)
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
M_B_DQ12
M_B_DQ14
M_B_DQ10
M_B_DQ13
M_B_DQ9
M_B_DQ8
M_B_DQ11
M_B_DQ15
M_B_DQ28
M_B_DQ29
M_B_DQ26
M_B_DQ27
M_B_DQ24
M_B_DQ25
M_B_DQ31
M_B_DQ30
M_B_DQ44
M_B_DQ41
M_B_DQ43
M_B_DQ45
M_B_DQ40
M_B_DQ47
M_B_DQ46
M_B_DQ42
M_B_DQ61
M_B_DQ60
M_B_DQ57
M_B_DQ56
M_B_DQ58
M_B_DQ59
M_B_DQ62
M_B_DQ63
M_B_DQ0
M_B_DQ5
M_B_DQ3
M_B_DQ2
M_B_DQ4
M_B_DQ1
M_B_DQ6
M_B_DQ7
M_B_DQ17
M_B_DQ16
M_B_DQ22
M_B_DQ18
M_B_DQ21
M_B_DQ20
M_B_DQ23
M_B_DQ19
M_B_DQ36
M_B_DQ33
M_B_DQ38
M_B_DQ34
M_B_DQ32
M_B_DQ37
M_B_DQ35
M_B_DQ39
M_B_DQ55
M_B_DQ51
M_B_DQ53
M_B_DQ50
M_B_DQ52
M_B_DQ49
M_B_DQ48
M_B_DQ54
M_B_DQ[63:0] 3
DDR3_DRAMRST#4,14
R297 *10K_4
+3V
+SMDDR_VREF_DQ1
+SMDDR_VREF_DIMM
+1.35V_SUS
2.48A
+3V
PM_EXTTS#1
C362 *0.1u/10V_4
+SMDDR_VREF_DQ1
M1 solution
+1.35V_SUS
JDIM1B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3-DIMM1_H=5.2_STD
PC2100 DDR3 SDRAM SO-DIMM
(204P)
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VTT1
VTT2
GND
GND
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
205
206
15
+DDR_VTT_RUN
R282
+1.35V_SUS
C348
10u/6.3V_6
+3V
A A
Place these Caps near SO-DIMM
C316
10u/6.3V_6
C313
2.2u/6.3V_6
C320
10u/6.3V_6
C346
10u/6.3V_6
C345
0.1u/10V_4
C349
10u/6.3V_6
+DDR_VTT_RUN
5
C318
10u/6.3V_6
C328
1u/6.3V_4
C317
0.1u/10V_4
C315
0.1u/10V_4
C351
0.1u/10V_4
C331
1u/6.3V_4
0.1u/10V_4
C355
0.1u/10V_4
C343
1u/6.3V_4
+SMDDR_VREF_DIMM
+
C306
330u/2V_7343
C353
1u/6.3V_4
C357
0.1u/10V_4
C360
4.7u/6.3V_6
4
C339
0.1u/10V_4
2.2u/6.3V_6
C312
4.7u/6.3V_6
+SMDDR_VREF_DQ1
C310
C327
2.2u/6.3V_6
C322
4.7u/6.3V_6
+VREFDQ_SB_M3
M3 solution
3
R268 *SHORT_6
R279 2/F_6C356
C304
0.022u/16V_4
1 2
R272
24.9/F_4
1.8K/F_4
R283
1.8K/F_4
2
Vref_DQ
+SMDDR_VREF_DQ1
C321
470p/50V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDRIII SO-DIMM-1
DDRIII SO-DIMM-1
DDRIII SO-DIMM-1
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
Z8C
Z8C
Z8C
15 48Saturday, November 15, 2014
15 48Saturday, November 15, 2014
15 48Saturday, November 15, 2014
1
3A
3A
3A