How it Works
QUANTA
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Z07
Schematics
38 pgs1.1 Mb0

QUANTA Z07 Schematics

5
4
3
2
1
Z07 SYSTEM BLOCK DIAGRAM
DDRII-SODIMM1
+1.8VSUS
D D
+SMDDR_VREF
PG 8,9
DDR II 667 MHZ
AMD S1g1
DDRII-SODIMM2
+1.8VSUS +SMDDR_VREF
PG 8,9
CPU THERMAL SENSOR
+3.3V
LVDS Panel(LED)
+3V
PG 20
VIN
+3V +5V
+5V
C C
B B
Azalia Audio Codec
+3V
CX20561-15z
PG 6
CRT
+3V +5V
SATA - HDD1
SATA - ODD
LVDS(1ch)
PG 19
PG 18
SATA0
PG 24
SATA1
PG 24
Azalia
MODEM CONN.
+1.2V +2.5V +1.8VSUS VCC_CORE +SMDDR_VTERM
(638 S1g1 socket)
HT_LINK(1.0)
800 MHZ
RS690MC
465 FCBGA
+1.2V +1.8V +3V +NB_CORE
A_LINK (X4)
SB600
549 BGA
+1.2V +1.2V_S5 +1.8V +3V_S5 +3V +5V VCCRTC
LPC
PG 4,5,6,7
PCIE
NB
PCIE
PG 10,11,12,13
SB
USB2.0
PG 14,15,16,17
(MDC) HP+SPDF JACK
+5V
PG 20 PG 20 PG 20
A A
MIC JACK
5
AMP
G1441
+3V +5V
Speaker
PG 20
+3.3V_SUS
WIRE
USB X 2
Board to board CONN.
PG 24
PG 24
EC
+3V +3VPCU
POWER/B
PG 25
+3VPCU +5V
4
FAN
PG 6
WPCE775
Keyboard
PG 26
SPI
Flash ROM
PG 26
+3VPCU
3
PG 26
Touch Pad
PG 25
HOST 200MHz PCIE 100MHz USB 48MHz REF 14.318MHz HTREF 66MHz
LAN(10/100/1000)
BCM5784M
+3V_S5
Mini Card (WLAN)
+1.5V +3V
BT CONN.
+3VSUS
PG 22
Card Reader controller
+3V
USB2.0 I/O Ports X1
+5VPCU
WEBCAM
+3V
RTS5159E
PG 19
MMB/B
PG 25
+3V
CLOCK GENERATOR
+3V
PG 21 PG 21
PG 22
PG 23 PG 23
PG 25
PG 3
RJ45
2
Card Reader
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
VCC_CORE
+NB_CORE
+2.5V
+1.5V
+1.2V +1.2V_S5
+1.8VSUS +1.8V
+SMDDR_VTERM +SMDDR_VREF
+3VPCU +3V_S5 +3VSUS +3V +5VPCU +5V
PROJECT : 14" Z07
PROJECT : 14" Z07
Quanta Computer Inc.
Quanta Computer Inc.
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
CPU CORE NB CORE
(1.0~1.2V)
01
+2.5V
+1.5V
+1.2V
+1.8VSUS SMDDR
3V/5V
1
1A
1A
1 36Tuesday, March 10, 2009
1 36Tuesday, March 10, 2009
1 36Tuesday, March 10, 2009
1A
5
4
3
2
1
2
Z07 Power On Sequence
From AC,Battery VIN
D D
From PWM
From Power Button
From EC
+5VPCU +3VPCU
SYS_HWPG(PCU)
NBSWON#
S5_ON
+5V_S5 +3V_S5
From EC From EC From SB
From SB to EC
From EC
+1.2V_S5
RSMRST# DNBSWON# PCIE_WAKE# SUSB#,SUSC#
SUSON
>10ms
>100ms
SUSON
+3VSUS +1.8VSUS SMDDR_VREF
From PWM
C C
From EC
HWPG_1.8V (SUS)
MAINON
MAINON
+5V +3V +2.5V +1.8V +1.5V SMDDR_VTERM
From PWM From EC
HWPG_1.5V,HWPG_2.5V,GFXPG(MAIN)
VRON
MAINON
+VCC_CORE
From PWM From EC
CPU_PWRGD
+1.2V_ON
MAINON+RC
HOLE6
HOLE6
*h-ts315bs256d169p2
*h-ts315bs256d169p2
1
HOLE1
HOLE1
H-TC315BC236D142P2
H-TC315BC236D142P2
1
HOLE11
HOLE11
*h-ts315bs256d169p2
*h-ts315bs256d169p2
HOLE14
HOLE14
*h-ts315bs256d169p2
*h-ts315bs256d169p2
HOLE17
HOLE17
*h-ts315bs256d169p2
*h-ts315bs256d169p2
HOLE20
HOLE20
*h-ts315bs256d169p2
*h-ts315bs256d169p2
1
1
1
1
CPU HOLE
HOLE4
HOLE4 *h-ts315bs256d169p2
*h-ts315bs256d169p2
1
HOLE5
HOLE5 H-TC315BC236D142P2
H-TC315BC236D142P2
1
HOLE15
HOLE15 *h-ts315bs256d169p2
*h-ts315bs256d169p2
1
HOLE18
HOLE18 *h-ts315bs256d169p2
*h-ts315bs256d169p2
1
HOLE7
HOLE7 *h-ts315bs256d169p2
*h-ts315bs256d169p2
1
HOLE9
HOLE9 H-TC315BC236D142P2
H-TC315BC236D142P2
1
HOLE13
HOLE13 *h-ts315bs256d169p2
*h-ts315bs256d169p2
1
HOLE16
HOLE16 *h-ts315bs256d169p2
*h-ts315bs256d169p2
1
HOLE3
HOLE3
*h-ts315bs256d169p2
*h-ts315bs256d169p2
1
HOLE10
HOLE10
*h-ts315bs256d169p2
*h-ts315bs256d169p2
1
HOLE12
HOLE12
*h-ts315bs256d169p2
*h-ts315bs256d169p2
1
HOLE19
HOLE19
*h-ts315bs256d169p2
*h-ts315bs256d169p2
1
HOLE8
HOLE8
*h-ts315bs256d169p2
*h-ts315bs256d169p2
1
+1.2VFrom EC
From PWM From EC
HWPG_CPUIO
+1.2V_ON+RC
+1.2V_ON+RC
+NB_COREFrom EC
From PWM
HWPG_1.2_NB HWPG
B B
From EC
From SB From SB From SB From SB
ECPWROK NB_PWRGD SB_PWRGD CPU_PWRGD
PLTRST# PCIRST# CPU_LDT_RST# CPU_LDT_STOP#
-22ms~500ms 47ms~66ms
71ms~73ms
1.9ms~2.1ms
*Note: EC will sampling SUSB# & SUSC# every 5ms.
AMD SB600 SMBUS Table
CLK GENRAM Mini Card (HD-Decoder) Mini-card(WL)New CardHDMI SB600 SDATA0/SCLK0(+3V) SB600 SDATA0/SCLK0(+3V_S5) Power
A A
Reserve MOS ckt
V
VVVV
V
+3V +3V +3V (Atheros) +3V +3V_S5
+3V
VVVVV V
EC775 SDATA1/SCLK1(+3VPCU) EC775 SDATA2/SCLK2(+3VPCU) EC775 SDATA3/SCLK3(+3VPCU) EC775 SDATA4/SCLK4(+3VPCU) Power Reserve MOS ckt
5
4
3
BatteryCPU thermal SensorEC EEPROMVGA thermal Sensor Touch SensorHDMI CEC
V
+3VPCU +3V +3VPCU +3V +3VPCU +5VPCU
X X XV V V
EC SMBUS Table
V V
2
V V V
PROJECT : Z07
PROJECT : Z07
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Quanta Computer Inc.
SYSTEM INFORMATION 3C
SYSTEM INFORMATION 3C
SYSTEM INFORMATION 3C
1
2 36Tuesday, March 10, 2009
2 36Tuesday, March 10, 2009
2 36Tuesday, March 10, 2009
5
4
3
2
1
+3V
L23 BK1608HS600_6L23 BK1608HS600_6
D D
+3V
L25 BK1608HS600_6L25 BK1608HS600_6
+3V
L24 BK1608HS600_6L24 BK1608HS600_6
C C
CLK_VDD
R188
R188 10K_4
10K_4
Clock Gen I2C
+3V
Q26
Q26 *RHU002N06
*RHU002N06
B B
SCLK08,15,21,22
SDATA08,15,21,22
EXT CLK FREQUENCY SELECT TABLE(MHZ)
FS1
FS2
FS0 HTT
0 0 0 0 0 1 0 1 0
A A
0 1 1 1 0 0 1 0 1 1 1 1
3
R234 short_4R234 short_4
Rev:C R234 and R233 change Footprint short pad.
+3V
Q25
Q25 *RHU002N06
*RHU002N06
3
R233 short_4R233 short_4
Rev:C R234 and R233 change Footprint short pad.
CPU
SRCCLK
[2:1]
100.00
Hi-Z
100.00
X
100.00
180.00
100.00 48.00
220.00
100.00
100.00
100.00
133.33
200.00
100.00 Normal Turion/Sempron operation
5
CLK_VDD
C219
C219 22U/6.3V_8
22U/6.3V_8
C234
C234 1u/6.3V_4
1u/6.3V_4
C228
C228
2.2u/6.3V_6
2.2u/6.3V_6
C239 22p_4C239 22p_4
14.318MHZ_20pF
14.318MHZ_20pF C240 22p_4C240 22p_4
Parallel Resonance Crystal
R187
R187
2
*10K_4
*10K_4
CGCLK_SMB
1
R232
R232
2
*10K_4
*10K_4
CGDAT_SMB
1
USB
PCI
Hi-Z
Hi-Z X/3 X/6
60.00
36.56
66.66
66.66
66.66
48.00
48.00
48.00
30.00
73.12
48.00
33.33
33.33
48.00
33.33 48.00
Put Decoupling Caps close to Clock Gen. power pin
C243
C243
C207
C207
C206
C206
0.1u/10V_4
0.1u/10V_4
CLK_VDD
CLK_VDD_USB CLK_VDD_REF
CLK_XIN CLK_XOUT
CLKREQA# CONTROL SRC5,6,7 CLKREQB# CONTROL SRC2,3,4 ATIG3 CLKREQC# CONTROL SRC0,1 ATIG0,1,2
0.1u/10V_4
0.1u/10V_4
T64T64
R163
R163 475/F_4
475/F_4
0.1u/10V_4
0.1u/10V_4
U6
54
VDDCPU
14
VDD_SRC1
23
VDD_SRC2
28
VDD_SRC3
44
VDD_SRC4
5
VDD_48
39
VDD_ATIG
2
VDD_REF
60
VDDHTT
53
GND_CPU
15
GND_SRC1
22
GND_SRC2
29
GND_SRC3
45
GND_SRC4
8
GND_48
38
GND_ATIG
1
GND_REF
58
GNDHTT
3
XIN
4
XOUT
11
RESET_IN#
61
NC
9
SMBCLK
10
SMBDAT
48
IREF
ICS951462U6ICS951462
C233
C233 *0.1u/10V_4
*0.1u/10V_4
C230
C230 *0.1u/10V_4
*0.1u/10V_4
Y2
Y2
C521
C521
0.1u/10V_4
0.1u/10V_4
CLK_VDD_USB
CLK_VDD_REF
21
CGCLK_SMB CGDAT_SMB
Voh = 0.71V @ 60 ohm
C203
C203
0.1u/10V_4
0.1u/10V_4
R190
R190 *1M_4
*1M_4
Ioh = 5 * Iref (2.32mA)
Don't add it when use RTM870T-690
Silego: AL084605K05 ; SLG84605TTR
COMMENT
Reserved Reserved Reserved Reserved Reserved Reserved
4
C202
C202
0.1u/10V_4
0.1u/10V_4
C204
C204
0.1u/10V_4
0.1u/10V_4
VDDA GNDA
CPUCLK8T0 CPUCLK8C0 CPUCLK8T1 CPUCLK8C1
SRCCLKT6
SRCCLKC6
ATIGCLKT0
ATIGCLKC0
ATIGCLKT1
ATIGCLKC1
ATIGCLKT2
ATIGCLKC2
ATIGCLKT3
ATIGCLKC3
SRCCLKT5
SRCCLKC5
SRCCLKT4
SRCCLKC4
SRCCLKT3
SRCCLKC3
SRCCLKT2
SRCCLKC2
SRCCLKT0
SRCCLKC0
SRCCLKT1
SRCCLKC1
SRCCLKT7
SRCCLKC7 CLKREQA#
CLKREQB# CLKREQC#
48MHz_1 48MHz_0
FS1/REF1 FS0/REF0 FS2/REF2
HTTCLK0
CLK_VDDA
C518
C518
0.1u/10V_4
0.1u/10V_4
CLK_VDDA
50 49
CPUCLK_EXT_R
56
CPUCLK#_EXT_R
55 52
T63T63
51
T60T60
SBLINK_CLKP_R
16
SBLINK_CLKN_R
17
NBSRC_CLKP_R
41
NBSRC_CLKN_R
40 37
T59T59
36
T55T55
35
T56T56
34
T57T57
30
T69T69
31
T66T66
18
T67T67
19
T70T70
20
T71T71
21
T68T68
GPP_CLK1P_R
24
GPP_CLK1N_R
25
GPP_CLK2P_R
26
GPP_CLK2N_R
27 47
T62T62
46
T61T61
43
T54T54
42
T58T58
GPP_CLK0P_R
12
GPP_CLK0N_R
13
CLKREQA#
57
CLKREQB#
32 33
T65T65
CLK_48M_1_R
7
CLK_48M_2_R
6
63 64 62 59
Add 10p for EMI issue (Suggestion by Seligo)
R161 47.5/F_4R161 47.5/F_4 R162 47.5/F_4R162 47.5/F_4
3
RP17 33X2RP17 33X2
1 1
RP15 33X2RP15 33X2
3
3
RP18
RP18
1 3
RP19
RP19
1
3 1
RP16 33X2RP16 33X2
R186 33_4R186 33_4 R185 33_4R185 33_4
SB_OSCIN_R
R153 33_4R153 33_4 R141 33_4R141 33_4
NB_OSCIN_R HTREFCLK_R
R160 33_4R160 33_4
C193
C193
C205
C205 *10p_4
*10p_4
C198
C198
*10p_4
*10p_4
*10p_4
*10p_4
3
R164
R164 10K_4
10K_4
CLK_VDD
+3V
R154 261/F_4R154 261/F_4
R200 49.9/F_4R200 49.9/F_4
R152
R152
R171
R171
10K_4
10K_4
10K_4
10K_4
R157 *0_4R157 *0_4 R172 *0_4R172 *0_4 R151 *0_4R151 *0_4
L17 BK1608HS600_6L17 BK1608HS600_6
C199
C199
C197
C197
10u/10V_8
10u/10V_8
0.1u/10V_4
0.1u/10V_4
Don't add them when use RTM870T-690
4 2 2 4
4
33X2
33X2
2 4
33X2
33X2
2
4 2
CLK_Card48 23 USBCLK 15
R148
R148
49.9/F_4
49.9/F_4
CPUCLKP 6 CPUCLKN 6
SBLINK_CLKP 12 SBLINK_CLKN 12 NBSRC_CLKP 12 NBSRC_CLKN 12
SBSRCCLKP 14
SBSRCCLKN 14 CLK_PCIE_WLAN 22 CLK_PCIE_WLAN# 22
CLK_PCIE_LAN 21 CLK_PCIE_LAN# 21
R149 49.9/F_4R149 49.9/F_4
R197 49.9/F_4R197 49.9/F_4
14.318MHz
14.318MHz 66MHz
R196 49.9/F_4R196 49.9/F_4
Don't add them when use RTM870T-690
CLKREQB#
CLKREQA#
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
R178
R178
*10K_4
*10K_4
1
R142
R142
10K_4
10K_4
1
PROJECT : Z07
PROJECT : Z07
Quanta Computer Inc.
Quanta Computer Inc.
CLOCK GENERATOR
CLOCK GENERATOR
CLOCK GENERATOR
+3V
*RHU002N06
*RHU002N06
2
+3V
RHU002N06
RHU002N06
2
Q24
Q24
3
Q21
Q21
3
1
R195 49.9/F_4R195 49.9/F_4
R198 49.9/F_4R198 49.9/F_4
R150 49.9/F_4R150 49.9/F_4
R194 49.9/F_4R194 49.9/F_4
R193 49.9/F_4R193 49.9/F_4
R199 49.9/F_4R199 49.9/F_4
SB_OSCIN 15 NB_OSC 12
HTREFCLK 12
2
3 36Tuesday, March 10, 2009
3 36Tuesday, March 10, 2009
3 36Tuesday, March 10, 2009
3
CLKREQ_WLAN# 22
LAN_CLKREQ# 21
3C
3C
3C
5
4
3
2
1
4
VLDT_RUN
20mil 20mil
D D
HT_CADIN15_P10 HT_CADIN15_N10 HT_CADIN14_P10 HT_CADIN14_N10 HT_CADIN13_P10 HT_CADIN13_N10 HT_CADIN12_P10 HT_CADIN12_N10 HT_CADIN11_P10 HT_CADIN11_N10 HT_CADIN10_P10 HT_CADIN10_N10 HT_CADIN9_P10 HT_CADIN9_N10 HT_CADIN8_P10 HT_CADIN8_N10 HT_CADIN7_P10 HT_CADIN7_N10 HT_CADIN6_P10 HT_CADIN6_N10 HT_CADIN5_P10 HT_CADIN5_N10 HT_CADIN4_P10 HT_CADIN4_N10 HT_CADIN3_P10 HT_CADIN3_N10
C C
VLDT_RUN
HT_CADIN2_P10 HT_CADIN2_N10 HT_CADIN1_P10 HT_CADIN1_N10 HT_CADIN0_P10 HT_CADIN0_N10
HT_CLKIN1_P10 HT_CLKIN1_N10 HT_CLKIN0_P10 HT_CLKIN0_N10
R90 51/F_4R90 51/F_4 R91 51/F_4R91 51/F_4
HT_CTLIN0_P10 HT_CTLIN0_N10
U15AU15A
D4 D3 D2 D1
N5 P5 M3 M4
L5 M5 K3 K4 H3 H4 G5 H5 F3 F4 E5 F5 N3 N2
L1 M1
L3
L2
J1 K1 G1 H1 G3 G2 E1 F1 E3 E2
J5 K5
J3
J2
P3 P4
N1 P1
VLDT_A3 VLDT_A2 VLDT_A1 VLDT_A0
L0_CADIN_H15 L0_CADIN_L15 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H0 L0_CADIN_L0
L0_CLKIN_H1 L0_CLKIN_L1 L0_CLKIN_H0 L0_CLKIN_L0
L0_CTLIN_H1 L0_CTLIN_L1
L0_CTLIN_H0 L0_CTLIN_L0
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9 L0_CADOUT_L9 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H0 L0_CADOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
Athlon 64 S1 Processor Socket
VLDT_B3 VLDT_B2 VLDT_B1 VLDT_B0
AE5 AE4 AE3 AE2
T4 T3 V5 U5 V4 V3 Y5 W5 AB5 AA5 AB4 AB3 AD5 AC5 AD4 AD3 T1 R1 U2 U3 V1 U1 W2 W3 AA2 AA3 AB1 AA1 AC2 AC3 AD1 AC1
Y4 Y3 Y1 W1
T5 R5
R2 R3
C431
C431
4.7u/6.3V_6
4.7u/6.3V_6
HT_CADOUT15_P 10 HT_CADOUT15_N 10 HT_CADOUT14_P 10 HT_CADOUT14_N 10 HT_CADOUT13_P 10 HT_CADOUT13_N 10 HT_CADOUT12_P 10 HT_CADOUT12_N 10 HT_CADOUT11_P 10 HT_CADOUT11_N 10 HT_CADOUT10_P 10 HT_CADOUT10_N 10 HT_CADOUT9_P 10 HT_CADOUT9_N 10 HT_CADOUT8_P 10 HT_CADOUT8_N 10 HT_CADOUT7_P 10 HT_CADOUT7_N 10 HT_CADOUT6_P 10 HT_CADOUT6_N 10 HT_CADOUT5_P 10 HT_CADOUT5_N 10 HT_CADOUT4_P 10 HT_CADOUT4_N 10 HT_CADOUT3_P 10 HT_CADOUT3_N 10 HT_CADOUT2_P 10 HT_CADOUT2_N 10 HT_CADOUT1_P 10 HT_CADOUT1_N 10 HT_CADOUT0_P 10 HT_CADOUT0_N 10
HT_CLKOUT1_P 10 HT_CLKOUT1_N 10 HT_CLKOUT0_P 10 HT_CLKOUT0_N 10
HT_CPU_CTLOUT1_PHT_CTLIN1_P HT_CPU_CTLOUT1_NHT_CTLIN1_N
T162T162 T164T164
HT_CTLOUT0_P 10 HT_CTLOUT0_N 10
B B
A A
5
+1.2V
L12
L12
FBJ3216HS800_1206
FBJ3216HS800_1206
VLDT_RUN
C161
C161
4.7u/6.3V_6
4.7u/6.3V_6
4
C160
C160
4.7u/6.3V_6
4.7u/6.3V_6
C184
C184
0.22u/10V_4
0.22u/10V_4
C182
C182
0.22u/10V_4
0.22u/10V_4
12
3
C181
C181 180p/50V_4
180p/50V_4
12
C183
C183 180p/50V_4
180p/50V_4
PROJECT : Z07
PROJECT : Z07
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
TURION 64 HT I/F
TURION 64 HT I/F
TURION 64 HT I/F
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Quanta Computer Inc.
4 36Tuesday, March 10, 2009
4 36Tuesday, March 10, 2009
4 36Tuesday, March 10, 2009
1
3C
3C
3C
5
Processor DDR2 Memory Interface
C69
C69
1000p/50V_4
1000p/50V_4
U15B
U15B
MEMVREF VTT_SENSE
MEMZN MEMZP
MA0_CS_L3 MA0_CS_L2 MA0_CS_L1 MA0_CS_L0
MB0_CS_L3 MB0_CS_L2 MB0_CS_L1 MB0_CS_L0
MB_CKE1 MB_CKE0 MA_CKE1 MA_CKE0
MA_ADD15 MA_ADD14 MA_ADD13 MA_ADD12 MA_ADD11 MA_ADD10 MA_ADD9 MA_ADD8 MA_ADD7 MA_ADD6 MA_ADD5 MA_ADD4 MA_ADD3 MA_ADD2 MA_ADD1 MA_ADD0
MA_BANK2 MA_BANK1 MA_BANK0
MA_RAS_L MA_CAS_L MA_WE_L
+1.8VSUS
R76
R76 2K/F_4
2K/F_4
R65
R65 2K/F_4
2K/F_4
DDR II: CMD/CTRL/CLK
DDR II: CMD/CTRL/CLK
Athlon 64 S1 Processor Socket
D D
15-20mil
CPU_M_VREF
C59
VTT_SENSE
M_A_A15 M_A_A14 M_A_A13 M_A_A12 M_A_A11 M_A_A10 M_A_A9 M_A_A8 M_A_A7 M_A_A6 M_A_A5 M_A_A4 M_A_A3 M_A_A2 M_A_A1 M_A_A0
C59
0.1u/10V_4
0.1u/10V_4
W17
Y10
AE10
AF10
V19
J22 V22 T19
Y26
J24
W24
U23 H26
J23
J20
J21 K19
K20 V24 K24
L20 R19
L19
L22
L21
M19 M20 M24 M22
N22 N21 R21
K22 R20 T22
T20 U20 U21
PLACE THEM CLOSE TO CPU WITHIN 1"
+1.8VSUS
R376
R376
39.2/F_4
39.2/F_4
1 2
C C
R375
R375
39.2/F_4
39.2/F_4
1 2
B B
A A
T9T9
M_ZN M_ZP
M_A_CS#38,9 M_A_CS#28,9 M_A_CS#18,9 M_A_CS#08,9
M_B_CS#38,9 M_B_CS#28,9 M_B_CS#18,9 M_B_CS#08,9
M_CKE38,9 M_CKE28,9 M_CKE18,9 M_CKE08,9
M_A_A[0..15]8,9
M_A_BS#28,9 M_A_BS#18,9 M_A_BS#08,9
M_A_RAS#8,9 M_A_CAS#8,9 M_A_WE#8,9
VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 VTT9
MA0_CLK_H2
MA0_CLK_L2
MA0_CLK_H1
MA0_CLK_L1
MB0_CLK_H2
MB0_CLK_L2
MB0_CLK_H1
MB0_CLK_L1
MB0_ODT1 MB0_ODT0
MA0_ODT1 MA0_ODT0
MB_ADD15 MB_ADD14
MB_ADD13 MB_ADD12 MB_ADD11 MB_ADD10
MB_ADD9 MB_ADD8 MB_ADD7 MB_ADD6 MB_ADD5 MB_ADD4 MB_ADD3 MB_ADD2 MB_ADD1 MB_ADD0
MB_BANK2
MB_BANK1 MB_BANK0
MB_RAS_L MB_CAS_L
MB_WE_L
+SMDDR_VTERM
4
M_CLKOUT3
C488
C488
1.5p/50V_4
1.5p/50V_4
M_CLKOUT3# M_CLKOUT4
C419
C419
1.5p/50V_4
1.5p/50V_4
M_CLKOUT4#
20-200mil
M_CLKOUT1 8 M_CLKOUT1# 8 M_CLKOUT0 8 M_CLKOUT0# 8
M_CLKOUT4 8 M_CLKOUT4# 8 M_CLKOUT3 8 M_CLKOUT3# 8
M_ODT3 8,9 M_ODT2 8,9 M_ODT1 8,9 M_ODT0 8,9 M_B_A[0..15] 8,9
M_B_BS#2 8,9 M_B_BS#1 8,9 M_B_BS#0 8,9
M_B_RAS# 8,9 M_B_CAS# 8,9 M_B_WE# 8,9
D10 C10 B10 AD10 W10 AC10 AB10 AA10 A10
Y16 AA16 E16 F16
AF18 AF17 A17 A18
W23 W26 V20 U19
J25 J26 W25 L23 L25 U25 L24 M26 L26 N23 N24 N25 N26 P24 P26 T24
K26 T26 U26
U24 V26 U22
M_CLKOUT0
C487
C487
1.5p/50V_4
1.5p/50V_4
M_CLKOUT0# M_CLKOUT1
C418
C418
1.5p/50V_4
1.5p/50V_4
M_CLKOUT1#
+SMDDR_VTERM
M_B_A15 M_B_A14 M_B_A13 M_B_A12 M_B_A11 M_B_A10
M_B_A9 M_B_A8 M_B_A7 M_B_A6 M_B_A5 M_B_A4 M_B_A3 M_B_A2 M_B_A1 M_B_A0
3
M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7
M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7
M_B_DQ63 M_B_DQ62 M_B_DQ61 M_B_DQ60 M_B_DQ59 M_B_DQ58 M_B_DQ57 M_B_DQ56 M_B_DQ55 M_B_DQ54 M_B_DQ53 M_B_DQ52 M_B_DQ51 M_B_DQ50 M_B_DQ49 M_B_DQ48 M_B_DQ47 M_B_DQ46 M_B_DQ45 M_B_DQ44 M_B_DQ43 M_B_DQ42 M_B_DQ41 M_B_DQ40 M_B_DQ39 M_B_DQ38 M_B_DQ37 M_B_DQ36 M_B_DQ35 M_B_DQ34 M_B_DQ33 M_B_DQ32 M_B_DQ31 M_B_DQ30 M_B_DQ29 M_B_DQ28 M_B_DQ27 M_B_DQ26 M_B_DQ25 M_B_DQ24 M_B_DQ23 M_B_DQ22 M_B_DQ21 M_B_DQ20 M_B_DQ19 M_B_DQ18 M_B_DQ17 M_B_DQ16 M_B_DQ15 M_B_DQ14 M_B_DQ13 M_B_DQ12 M_B_DQ11 M_B_DQ10 M_B_DQ9 M_B_DQ8 M_B_DQ7 M_B_DQ6 M_B_DQ5 M_B_DQ4 M_B_DQ3 M_B_DQ2 M_B_DQ1 M_B_DQ0
M_B_DM7 M_B_DM6 M_B_DM5 M_B_DM4 M_B_DM3 M_B_DM2 M_B_DM1 M_B_DM0
M_B_DQ[0..63]8
M_B_DM[0..7]8
M_B_DQS[0..7]8
M_B_DQS#[0..7]8
M_B_DQS7 M_B_DQS#7 M_B_DQS6 M_B_DQS#6 M_B_DQS5 M_B_DQS#5 M_B_DQS4 M_B_DQS#4 M_B_DQS3 M_B_DQS#3 M_B_DQS2 M_B_DQS#2 M_B_DQS1 M_B_DQS#1 M_B_DQS0 M_B_DQS#0
AD11 AF11 AF14 AE14
AB11 AC12 AF13 AF15 AF16 AC18 AF19 AD14 AC14 AE18 AD18 AD20 AC20 AF23 AF24 AF20 AE20 AD22 AC22 AE25 AD26 AA25 AA26 AE24 AD24 AA23 AA24
AD12 AC16 AE22 AB26
AF12 AE12 AE16 AD16 AF21 AF22 AC25 AC26
Y11
G24 G23 D26 C26 G26 G25 E24 E23 C24 B24 C20 B20 C25 D24 A21 D20 D18 C18 D14 C14 A20 A19 A16 A15 A13 D12 E11 G11 B14 A14 A11 C11
E25 A22 B16 A12
F26 E26 A24 A23 D16 C16 C12 B12
U15C
U15C
MB_DATA63 MB_DATA62 MB_DATA61 MB_DATA60 MB_DATA59 MB_DATA58 MB_DATA57 MB_DATA56 MB_DATA55 MB_DATA54 MB_DATA53 MB_DATA52 MB_DATA51 MB_DATA50 MB_DATA49 MB_DATA48 MB_DATA47 MB_DATA46 MB_DATA45 MB_DATA44 MB_DATA43 MB_DATA42 MB_DATA41 MB_DATA40 MB_DATA39 MB_DATA38 MB_DATA37 MB_DATA36 MB_DATA35 MB_DATA34 MB_DATA33 MB_DATA32 MB_DATA31 MB_DATA30 MB_DATA29 MB_DATA28 MB_DATA27 MB_DATA26 MB_DATA25 MB_DATA24 MB_DATA23 MB_DATA22 MB_DATA21 MB_DATA20 MB_DATA19 MB_DATA18 MB_DATA17 MB_DATA16 MB_DATA15 MB_DATA14 MB_DATA13 MB_DATA12 MB_DATA11 MB_DATA10 MB_DATA9 MB_DATA8 MB_DATA7 MB_DATA6 MB_DATA5 MB_DATA4 MB_DATA3 MB_DATA2 MB_DATA1 MB_DATA0
MB_DM7 MB_DM6 MB_DM5 MB_DM4 MB_DM3 MB_DM2 MB_DM1 MB_DM0
MB_DQS_H7 MB_DQS_L7 MB_DQS_H6 MB_DQS_L6 MB_DQS_H5 MB_DQS_L5 MB_DQS_H4 MB_DQS_L4 MB_DQS_H3 MB_DQS_L3 MB_DQS_H2 MB_DQS_L2 MB_DQS_H1 MB_DQS_L1 MB_DQS_H0 MB_DQS_L0
2
DDR: DATA
DDR: DATA
Athlon 64 S1 Processor Socket
MA_DATA63 MA_DATA62 MA_DATA61 MA_DATA60 MA_DATA59 MA_DATA58 MA_DATA57 MA_DATA56 MA_DATA55 MA_DATA54 MA_DATA53 MA_DATA52 MA_DATA51 MA_DATA50 MA_DATA49 MA_DATA48 MA_DATA47 MA_DATA46 MA_DATA45 MA_DATA44 MA_DATA43 MA_DATA42 MA_DATA41 MA_DATA40 MA_DATA39 MA_DATA38 MA_DATA37 MA_DATA36 MA_DATA35 MA_DATA34 MA_DATA33 MA_DATA32 MA_DATA31 MA_DATA30 MA_DATA29 MA_DATA28 MA_DATA27 MA_DATA26 MA_DATA25 MA_DATA24 MA_DATA23 MA_DATA22 MA_DATA21 MA_DATA20 MA_DATA19 MA_DATA18 MA_DATA17 MA_DATA16 MA_DATA15 MA_DATA14 MA_DATA13 MA_DATA12 MA_DATA11 MA_DATA10
MA_DATA9 MA_DATA8 MA_DATA7 MA_DATA6 MA_DATA5 MA_DATA4 MA_DATA3 MA_DATA2 MA_DATA1 MA_DATA0
MA_DM7 MA_DM6 MA_DM5 MA_DM4 MA_DM3 MA_DM2 MA_DM1 MA_DM0
MA_DQS_H7
MA_DQS_L7
MA_DQS_H6
MA_DQS_L6
MA_DQS_H5
MA_DQS_L5
MA_DQS_H4
MA_DQS_L4
MA_DQS_H3
MA_DQS_L3
MA_DQS_H2
MA_DQS_L2
MA_DQS_H1
MA_DQS_L1
MA_DQS_H0
MA_DQS_L0
AA12 AB12 AA14 AB14 W11 Y12 AD13 AB13 AD15 AB15 AB17 Y17 Y14 W14 W16 AD17 Y18 AD19 AD21 AB21 AB18 AA18 AA20 Y20 AA22 Y22 W21 W22 AA21 AB22 AB24 Y24 H22 H20 E22 E21 J19 H24 F22 F20 C23 B22 F18 E18 E20 D22 C19 G18 G17 C17 F14 E14 H17 E17 E15 H15 E13 C13 H12 H11 G14 H14 F12 G12
Y13 AB16 Y19 AC24 F24 E19 C15 E12
W12 W13 Y15 W15 AB19 AB20 AD23 AC23 G22 G21 C22 C21 G16 G15 G13 H13
M_A_DQ63 M_A_DQ62 M_A_DQ61 M_A_DQ60 M_A_DQ59 M_A_DQ58 M_A_DQ57 M_A_DQ56 M_A_DQ55 M_A_DQ54 M_A_DQ53 M_A_DQ52 M_A_DQ51 M_A_DQ50 M_A_DQ49 M_A_DQ48 M_A_DQ47 M_A_DQ46 M_A_DQ45 M_A_DQ44 M_A_DQ43 M_A_DQ42 M_A_DQ41 M_A_DQ40 M_A_DQ39 M_A_DQ38 M_A_DQ37 M_A_DQ36 M_A_DQ35 M_A_DQ34 M_A_DQ33 M_A_DQ32 M_A_DQ31 M_A_DQ30 M_A_DQ29 M_A_DQ28 M_A_DQ27 M_A_DQ26 M_A_DQ25 M_A_DQ24 M_A_DQ23 M_A_DQ22 M_A_DQ21 M_A_DQ20 M_A_DQ19 M_A_DQ18 M_A_DQ17 M_A_DQ16 M_A_DQ15 M_A_DQ14 M_A_DQ13 M_A_DQ12 M_A_DQ11 M_A_DQ10 M_A_DQ9 M_A_DQ8 M_A_DQ7 M_A_DQ6 M_A_DQ5 M_A_DQ4 M_A_DQ3 M_A_DQ2 M_A_DQ1 M_A_DQ0
M_A_DM7 M_A_DM6 M_A_DM5 M_A_DM4 M_A_DM3 M_A_DM2 M_A_DM1 M_A_DM0
M_A_DQS7 M_A_DQS#7 M_A_DQS6 M_A_DQS#6 M_A_DQS5 M_A_DQS#5 M_A_DQS4 M_A_DQS#4 M_A_DQS3 M_A_DQS#3 M_A_DQS2 M_A_DQS#2 M_A_DQS1 M_A_DQS#1 M_A_DQS0 M_A_DQS#0
To SODIMM socket A (near)To SODIMM socket B (Far)
M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7
M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7
1
M_A_DQ[0..63] 8
M_A_DM[0..7] 8
M_A_DQS[0..7] 8
M_A_DQS#[0..7] 8
5
C36
C36
4.7u/6.3V_6
4.7u/6.3V_6
C497
C497
4.7u/6.3V_6
4.7u/6.3V_6
C495
C498
C498
C39
C39
4.7u/6.3V_6
4.7u/6.3V_6
4.7u/6.3V_6
4.7u/6.3V_6
5
C491
C491
0.22u/10V_4
0.22u/10V_4
C494
C494
0.22u/10V_4
0.22u/10V_4
C47
C47
0.22u/10V_4
0.22u/10V_4
C33
0.22u/10V_4
0.22u/10V_4
4
1000p/50V_4
1000p/50V_4
1000p/50V_4
1000p/50V_4
C492
C492 1000p/50V_4
1000p/50V_4
C493
C493 1000p/50V_4
1000p/50V_4
C52
C52 180p/50V_4
180p/50V_4
3
C495
C41
C41
C33
C496
C496 180p/50V_4
180p/50V_4
C45
C45 180p/50V_4
180p/50V_4
C50
C50 180p/50V_4
180p/50V_4
PROJECT : Z07
PROJECT : Z07
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
TURION 64 DDRII I/F
TURION 64 DDRII I/F
TURION 64 DDRII I/F
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Quanta Computer Inc.
5 36Tuesday, March 10, 2009
5 36Tuesday, March 10, 2009
5 36Tuesday, March 10, 2009
1
3C
3C
3C
5
If AMD SI is not used, the SID pin can be left unconnected and SIC should have a 300-Ω (±5%) pulldown to VSS.
R383 *300_4R383 *300_4
+1.8VSUS
R381 *300_4R381 *300_4
D D
CPU_SIC14 CPU_SID14
CPUCLKP3
CPUCLKN3
CPU_PWRGD14
LDT_STOP#12,14 LDT_RST#14
C C
R387 *0_4R387 *0_4 R384 *0_4R384 *0_4
C500 3900P/50V_4C500 3900P/50V_4
C501 3900P/50V_4C501 3900P/50V_4
R414
R414
R417
R417
680_4
680_4
680_4
680_4
R408
R408 680_4
680_4
CPU Thermal monitor
+3V
Q5
2
RHU002N06Q5RHU002N06
3
2ND_MBCLK26
2ND_MBDATA26
B B
THERM_ALERT#15
1
+3V
Q4
2
RHU002N06Q4RHU002N06
3
1
+3V
R35
R35 *8.2K_4
*8.2K_4
3
+3V
R25 10K_4R25 10K_4
CPU_SIC_R CPU_SID_R
R403
R403 169/F_6
169/F_6
R410 short_4R410 short_4 R413 short_4R413 short_4 R409 short_4R409 short_4
2ND_MBCLK_C
2ND_MBDATA_C
2
1
Q7*2N7002E-LF Q7*2N7002E-LF
R385300_4 R385300_4
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
CPU_ALL_PWROK CPU_LDTSTOP# CPU_HT_RESET#
+3V
R24
R24 10K_4
10K_4
THERM_ALERT#_R
THER_OVERT#
R30
R30 10K_4
10K_4
R28
R28 10K_4
10K_4
+3V
U1
8
SCLK
7
SDA
6
ALERT#
4
OVERT#
G781P8U1G781P8
ADDRESS: 98H
CPU FAN
FANPWR = 1.6*VSET
G995/Pin1- internal pull high (+5V)
+3V +5V
2
Q3
1
*ME2N7002DQ3*ME2N7002D
CPUFAN#
A A
THER_OVERT# THER_OVERT#_B
R62 10K_4R62 10K_4
CPUFAN#26
R388 short_4R388 short_4
5
R386
R386 *10K_4
*10K_4
3
R382 *0_4R382 *0_4
FAN_PWM_EC
+5V
THER_OVERT#_CTHER_OVERT#
+3V +3V
2
1 3
C425
C425 *2.2u/6.3V_6
*2.2u/6.3V_6
CPUFAN#_C
R46
R46 10K_4
10K_4
FAN_PWM_E
Q15
Q15 MMBT3904
MMBT3904
R380 0_8R380 0_8
U14
U14
VIN2VO
1
/FON
4
VSET
*G991
*G991
GND GND GND GND
2
1 3
Q14
Q14 MMBT3904
MMBT3904
R61
R61 10K_4
10K_4
3 5 6 7 8
+5V
4
CPU_COREPG26,29
H_THERMTRIP#
R33
R33 200_6
200_6
LM86VCC
1
VCC
2
DXP
3
DXN
5
GND
<check list> Layout Note:Routing 10:10 mils and away from noise source with ground gard
FANSIG26
TH_FAN_POWER
C421
C421
C422
C422
10U_8
10U_8
.01U_4
.01U_4
R45
R45 10K_4
10K_4
FAN_PWM_CN
4
+1.8VSUS
3
Q9
2
FDV301NQ9FDV301N
1
R42
R42 10K_4
10K_4
2
R32 *0_6R32 *0_6
1 3
MMBT3904
MMBT3904
Q10
Q10
CPU_TEST27_SINGLECHAIN CPU_TEST26_BURNIN# CPU_PRESENT# CPU_TEST25_H_BYPASSCLK_H
CPU_TEST21_SCANEN CPU_TEST20_SCANCLK2 CPU_TEST24_SCANCLK1 CPU_TEST22_SCANSHIFTEN CPU_TEST12_SCANSHIFTENB CPU_TEST15_BP1 CPU_TEST14_BP0
CPU_TEST25_L_BYPASSCLK_L CPU_TEST18_PLLTEST1
C27
C27 .1U_4
.1U_4
H_THERMDA
C23
C23 2200P/50V_4
2200P/50V_4
H_THERMDC
+3V
C420
C420 .01U_4
.01U_4
R379
R379 10K_4
10K_4
CN13
CN13
1
5 2 3
64
4pin HEADER
4pin HEADER
D3
R39
R39
*BAS316D3*BAS316
*10K_4
*10K_4
R36 100K_6R36 100K_6
SB_THERMTRIP# 15 SYS_SHDN# 28,33
VCCSENSE29 VSSSENSE29
R372 *300_4R372 *300_4 R374 300_4R374 300_4 R48 1K/F_4R48 1K/F_4 R124 510/F_4R124 510/F_4
R22 300_4R22 300_4 R378 *300_4R378 *300_4 R373 *300_4R373 *300_4 R377 *300_4R377 *300_4 R21 *300_4R21 *300_4 R406 *300_4R406 *300_4 R407 *300_4R407 *300_4
R125 510/F_4R125 510/F_4 R126 300_4R126 300_4 R127 300_4R127 300_4
+2.5V
VDDIO_FB_H31 VDDIO_FB_L31
+1.8VSUS
L52 30ohm_4AL52 30ohm_4A
C490
C490
*100u/6.3V_3528
*100u/6.3V_3528
VLDT_RUN
T34T34
T35T35
R411
R411
2.2K_4
2.2K_4
H_PROCHOT#
3
T172T172 T173T173 T174T174
T5T5
T4T4
T30T30 T36T36
T20T20 T161T161 T21T21 T163T163
T11T11 T10T10 T17T17 T12T12
1
R43
R43 300_4
300_4
Q13 MMBT3904Q13 MMBT3904
3
VDDA_RUN
C499
C499
C120
C120
4.7u/6.3V_6
4.7u/6.3V_6
0.22u/10V_4
0.22u/10V_4
CPU_HT_RESET# CPU_ALL_PWROK CPU_LDTSTOP#
CPU_SIC_R
CPU_SID_R
R84 44.2F_4R84 44.2F_4 R81 44.2F_4R81 44.2F_4
place them to CPU within 1"
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST19_PLLTEST0
CPU_TEST18_PLLTEST1
CPU_TEST17_BP3CPU_TEST19_PLLTEST0
CPU_TEST16_BP2
CPU_TEST15_BP1
CPU_TEST14_BP0
CPU_TEST12_SCANSHIFTENB
H_THERMDC
H_THERMDA
CPU_RSVD_MA0_CLK3_P
CPU_RSVD_MA0_CLK3_N
CPU_RSVD_MA0_CLK0_P
CPU_RSVD_MA0_CLK0_N
CPU_RSVD_MB0_CLK3_P
CPU_RSVD_MB0_CLK3_N
CPU_RSVD_MB0_CLK0_P
CPU_RSVD_MB0_CLK0_N
+1.8VSUS
+3V
FD1
FD1
*HDT@BAS316
*HDT@BAS316
R412
R412 *HDT@2K_4
*HDT@2K_4
2
Q40
Q40
3
*HDT@FDV301N
*HDT@FDV301N
+1.8VSUS+1.8VSUS
+3V
R44
R44
R50
R50
10K_4
10K_4
4.7K_4
4.7K_4
2
13
2
ATHLON Control and Debug
12
C119
C119 3300p/50V_4
3300p/50V_4
U15D
U15D
CPU_HTREF1 CPU_HTREF0
CPU to HDT RESET#CPU_HT_RESET#
R53 *0_4R53 *0_4
F10 AF4
AF5
G10 AA9
AC9 AD9 AF9
H10 AA7
AC8
AA6
AB6
P20 P19 N20 N19
R26 R25 P22 R22
F8 F9
B7 A7
P6 R6
F6 E6
W9
Y9 A9
A8
E9 E8
G9
C2 D7 E7 F7 C7
C3
W7 W8
Y6
VDDA2 VDDA1
RESET_L PWROK LDTSTOP_L
SIC SID
HT_REF1 HT_REF0
VDD_FB_H VDD_FB_L
VDDIO_FB_H VDDIO_FB_L
CLKIN_H CLKIN_L
DBRDY TMS
TCK TRST_L TDI
TEST25_H TEST25_L TEST19 TEST18 TEST13 TEST9 TEST17 TEST16 TEST15 TEST14 TEST12
TEST7 TEST6 TEST5 TEST4 TEST3 TEST2
RSVD0 RSVD1 RSVD2 RSVD3
RSVD4 RSVD5 RSVD6 RSVD7
CPU_PRESENT_L
MISC
MISC
AMD NPT S1 SOCKET Processor Socket
TALERT# 16
AMD_PROCHOT 14,26
AF6
THERMTRIP_L
AC7
PROCHOT_L
A5
VID5
C6
VID4
A6
VID3
A4
VID2
C5
VID1
B5
VID0
AC6 A3
PSI_L
E10
DBREQ_L
AE9
TDO
C9
TEST29_H
C8
TEST29_L
AE7
TEST24
AD7
TEST23
AE8
TEST22
AB8
TEST21
AF7
TEST20
J7
TEST28_H
H8
TEST28_L
AF8
TEST27
AE6
TEST26
K8
TEST10
C4
TEST8
H16
RSVD8
B18
RSVD9
B3
RSVD10
C1
RSVD11
H6
RSVD12
G6
RSVD13
D5
RSVD14
R24
RSVD15
W18
RSVD16
R23
RSVD17
AA8
RSVD18
H18
RSVD19
H19
RSVD20
+1.8VSUS
R371 220_4R371 220_4
R20 220_4R20 220_4
NOTE: HDT TERMINATION IS REQUIRED FOR REV. Ax SILICON ONLY.
2
+1.8VSUS+1.8VSUS
R405
R405
R40
R40
300_4
300_4
300_4
300_4
H_THERMTRIP# H_PROCHOT#
H_VID5 29 H_VID4 29 H_VID3 29 H_VID2 29 H_VID1 29
CPU_PRESENT#
PSI_L is a Power Status Indicator signal. This signal is asserted when the processor is in a low powerstate. PSI_L should be connected to the power supply controller, if the controller supports “skipmode, or diode emulation mode”. PSI_L is asserted by the processor during the C3 and S1 states.
CPU_DBREQ#
CPU_TDO
CPU_TEST29_H_FBCLKOUT_P CPU_TEST29_L_FBCLKOUT_N
CPU_TEST24_SCANCLK1 CPU_TEST23_TSTUPD CPU_TEST22_SCANSHIFTEN CPU_TEST21_SCANEN CPU_TEST20_SCANCLK2
CPU_TEST28_H_PLLCHRZ_P
CPU_TEST28_L_PLLCHRZ_N CPU_TEST27_SINGLECHAIN CPU_TEST26_BURNIN#
CPU_MA_RESET# CPU_MB_RESET#
CPU_RSVD_VIDSTRB1 CPU_RSVD_VIDSTRB0
CPU_RSVD_VDDNB_FB_P CPU_RSVD_VDDNB_FB_N CPU_RSVD_CORE_TYPE
R18 220_4R18 220_4
R415 220_4R415 220_4
R19 220_4R19 220_4
C7 *0.1u/10V_4C7 *0.1u/10V_4
PWR_PSI# 29
R404 80.6F_4R404 80.6F_4
PLACE IT CLOSE TO CPU WITHIN 1" ROUTE AS 80 Ohm DIFFERENTIAL PAIR
T1T1
T38T38 T52T52
T26T26 T171T171
T170T170 T166T166
T32T32 T31T31 T168T168
IF no use which Net need pull-up or down
HDT CONNECTOR
+1.8VSUS
1 2 3 4
CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO
5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
H_VID0 29
25
KEY
KEY
CN3
CN3
*HDT CONN<FUN>
*HDT CONN<FUN>
Quanta Computer Inc.
Quanta Computer Inc.
TURION 64 CTRL & DEBUG
TURION 64 CTRL & DEBUG
TURION 64 CTRL & DEBUG
1
6
CPU to HDT RESET#
PROJECT : Z07
PROJECT : Z07
1
3C
3C
6 36Tuesday, March 10, 2009
6 36Tuesday, March 10, 2009
6 36Tuesday, March 10, 2009
3C
5
4
3
2
1
PROCESSOR POWER AND GROUND
D D
U15F
U15F
AA4
VSS1
AA11
VSS2
AA13
VSS3
AA15
VSS4
AA17
VSS5
AA19
VSS6
AB2
VSS7
AB7
VSS8
AB9
VSS9
AB23
VSS10
AB25
VCC_CORE VCC_CORE
C C
B B
A1
M10
AC4 AD2
K10 K12 K14
L11 L13
N11 P10
R11
T10 T12 T14
U11 U13
V10
U15E
U15E
VDD1 VDD2
G4
VDD3
H2
VDD4
J9
VDD5
J11
VDD6
J13
VDD7
K6
VDD8 VDD9 VDD10 VDD11
L4
VDD12
L7
VDD13
L9
VDD14 VDD15 VDD16
M2
VDD17
M6
VDD18
M8
VDD19 VDD20
N7
VDD21
N9
VDD22 VDD23
P8
VDD24 VDD25
R4
VDD26
R7
VDD27
R9
VDD28 VDD29
T2
VDD30
T6
VDD31
T8
VDD32 VDD33 VDD34 VDD35
U7
VDD36
U9
VDD37 VDD38 VDD39
V6
VDD40
V8
VDD41 VDD42
POWER
POWER
Athlon 64 S1 Processor Socket
VDD43 VDD44 VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53 VDD54
VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8
VDDIO9 VDDIO10 VDDIO11 VDDIO12 VDDIO13 VDDIO14 VDDIO15 VDDIO16 VDDIO17 VDDIO18 VDDIO19 VDDIO20 VDDIO21 VDDIO22 VDDIO23 VDDIO24 VDDIO25 VDDIO26 VDDIO27
V12 V14 W4 Y2 J15 K16 L15 M16 P16 T16 U15 V16
H25 J17 K18 K21 K23 K25 L17 M18 M21 M23 M25 N17 P18 P21 P23 P25 R17 T18 T21 T23 T25 U17 V18 V21 V23 V25 Y25
+1.8VSUS
A26
AC11 AC13 AC15 AC17 AC19 AC21
AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23
AD6 AD8
B11 B13 B15 B17 B19 B21 B23 B25
D11 D13 D15 D17 D19 D21 D23 D25
F11 F13 F15 F17 F19 F21 F23 F25
H21 H23
VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27
B4
VSS28
B6
VSS29
B8
VSS30
B9
VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39
D6
VSS40
D8
VSS41
D9
VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50
E4
VSS51
F2
VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60
H7
VSS61
H9
VSS62 VSS63 VSS64
J4
VSS65
GROUND
GROUND
Athlon 64 S1 Processor Socket
VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129
J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 M11 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6
BOTTOMSIDE DECOUPLING
VCC_CORE
C88
VCC_CORE
+1.8VSUS
C79
C79
0.22u/10V_4
0.22u/10V_4
C80
C80 10u/10V_8
10u/10V_8
C94
C94 10u/6.3V_6
10u/6.3V_6
C78
C78
0.22u/10V_4
0.22u/10V_4
C121
C121 10u/10V_8
10u/10V_8
C73
C73 10u/6.3V_6
10u/6.3V_6
C77
C77
0.01u/25V_4
0.01u/25V_4
C133
C133
0.22u/10V_4
0.22u/10V_4
C84
C84 10u/6.3V_6
10u/6.3V_6
C60
C60
0.22u/10V_4
0.22u/10V_4
C76
C76 180p/50V_4
180p/50V_4
C88 10u/6.3V_6
10u/6.3V_6
C114
C114 10u/6.3V_6
10u/6.3V_6
VCC_CORE
C81
C81 10u/6.3V_6
10u/6.3V_6
C51
C51
0.1u/10V_4
0.1u/10V_4
DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE
+1.8VSUS
C57
C57
4.7u/6.3V_6
4.7u/6.3V_6
C86
C86
0.22u/10V_4
0.22u/10V_4
C109
C109
0.22u/10V_4
0.22u/10V_4
C112
C112
0.22u/10V_4
0.22u/10V_4
C91
C91
0.22u/10V_4
0.22u/10V_4
C62
C62
0.01u/25V_4
0.01u/25V_4
+1.8VSUS
C58
C58
4.7u/6.3V_6
4.7u/6.3V_6
C130
C130
0.01u/25V_4
0.01u/25V_4
C136
C136
4.7u/6.3V_6
4.7u/6.3V_6
C102
C102 180p/50V_4
180p/50V_4
C110
C110
4.7u/6.3V_6
4.7u/6.3V_6
C423
C423 180p/50V_4
180p/50V_4
C89
C89 10u/6.3V_6
10u/6.3V_6
For EMI request.
C143
C143
0.1u/10V_4
0.1u/10V_4
C61
C61
0.22u/10V_4
0.22u/10V_4
C95
C95 180p/50V_4
180p/50V_4
C101
C101 10u/6.3V_6
10u/6.3V_6
C63
C63
0.22u/10V_4
0.22u/10V_4
7
C107
C107 10u/6.3V_6
10u/6.3V_6
Athlon 64 S1g1
uPGA638 Top View
A A
AF1
5
PROJECT : Z07
PROJECT : Z07
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
TURION 64 PWR & GND
TURION 64 PWR & GND
TURION 64 PWR & GND
Date: Sheet of
Date: Sheet of
4
3
2
Date: Sheet of
Quanta Computer Inc.
7 36Tuesday, March 10, 2009
7 36Tuesday, March 10, 2009
7 36Tuesday, March 10, 2009
1
3C
3C
3C
5
+1.8VSUS
M_A_A[0..15]5,9
R9 *4.7K_4R9 *4.7K_4
+3V
R13 *4.7K_4R13 *4.7K_4
D D
SA0_A SA1_A
12
12
R12 0_4R12 0_4
SA_A : '0' ,'0'
M_A_BS#05,9 M_A_BS#15,9 M_A_BS#25,9
M_A_DM[0..7]5
C C
B B
A A
+1.8VSUS
M_A_DQS#[0..7]5
+3V
M_A_DQS[0..7]5
M_CLKOUT05 M_CLKOUT0#5 M_CLKOUT15 M_CLKOUT1#5
M_CKE05,9 M_CKE15,9
M_A_RAS#5,9 M_A_CAS#5,9 M_A_WE#5,9 M_A_CS#05,9 M_A_CS#15,9
M_ODT05,9 M_ODT15,9
C168 0.1u/10V_4C168 0.1u/10V_4
C172
C172
2.2u/10V_8
2.2u/10V_8
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6
0_4
0_4
M_A_A7 M_A_A8 M_A_A9
R10
R10
M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15
M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7
M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7
M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7
M_CLKOUT0 M_CLKOUT0# M_CLKOUT1 M_CLKOUT1#
SA0_A SA1_A
DDRDAT_SMB DDRCLK_SMB DDRCLK_SMB
C8 0.1u/10V_4C8 0.1u/10V_4
MVREF_DIM
C176
C176
0.1u/10V_4
0.1u/10V_4
1 2
5
201
202
102
A0
101
A1
100
A2
99
A3
GND PAD1
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10
90
A11
89
A12
116
A13
86
A14
84
A15
107
BA0
106
BA1
85
BA2
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS0
29
DQS1
49
DQS2
68
DQS3
129
DQS4
146
DQS5
167
DQS6
186
DQS7
30
CK0
32
CK0
164
CK1
166
CK1
79
CKE0
80
CKE1
108
RAS
113
CAS
109
WE
110
S0
115
S1
114
ODT0
119
ODT1
198
SA0
200
SA1
195
SDA
197
SCL
199
VDDspd
1
VREF
2
VSS0
3
VSS1
8
VSS2
9
VSS3
12
VSS4
15
VSS5
18
VSS6
21
VSS7
24
VSS8
27
VSS9
28
VSS10
33
VSS11
34
VSS12
39
VSS13
40
VSS14
41
VSS15
42
VSS16
47
VSS17
48
VSS18
53
VSS19
54
VSS20
103
104
VDD081VDD182VDD287VDD388VDD495VDD596VDD6
GND PAD0
REVERSE
SPD Address:0xA0
(H=5.2)
59
111
112
VDD8
VDD7
VDD9
SO-DIMM
SO-DIMM
VSS30
VSS29
VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21
122
121
117
127
118
CN15
CN15
DQ0 DQ1
VDD10
VDD11
DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
NC1 NC2 NC3 NC4
NC/TEST
VSS56 VSS55 VSS54 VSS53 VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34
VSS33
VSS32
VSS31
TYC_1-1734074-1_5.2
TYC_1-1734074-1_5.2
132
128
4
Follow AMD schematic, change DIMM2 SPD Address from 0xA4 to 0xA2
M_A_DQ1
5
M_A_DQ5
7
M_A_DQ2
17
M_A_DQ3
19
M_A_DQ0
4
M_A_DQ4
6
M_A_DQ7
14
M_A_DQ6
16
M_A_DQ12
23
M_A_DQ8
25
M_A_DQ10
35
M_A_DQ14
37
M_A_DQ13
20
M_A_DQ9
22
M_A_DQ15
36
M_A_DQ11
38
M_A_DQ21
43
M_A_DQ17
45
M_A_DQ23
55
M_A_DQ18
57
M_A_DQ20
44
M_A_DQ19
46
M_A_DQ22
56
M_A_DQ16
58
M_A_DQ29
61
M_A_DQ28
63
M_A_DQ31
73
M_A_DQ26
75
M_A_DQ25
62
M_A_DQ24
64
M_A_DQ27
74
M_A_DQ30
76
M_A_DQ32
123
M_A_DQ36
125
M_A_DQ37
135
M_A_DQ35
137
M_A_DQ33
124
M_A_DQ38
126
M_A_DQ34
134
M_A_DQ39
136
M_A_DQ40
141
M_A_DQ41
143
M_A_DQ42
151
M_A_DQ46
153
M_A_DQ44
140
M_A_DQ45
142
M_A_DQ43
152
M_A_DQ47
154
M_A_DQ55
157
M_A_DQ54
159
M_A_DQ50
173
M_A_DQ51
175
M_A_DQ53
158
M_A_DQ48
160
M_A_DQ49
174
M_A_DQ52
176
M_A_DQ56
179
M_A_DQ60
181
M_A_DQ59
189
M_A_DQ58
191
M_A_DQ57
180
M_A_DQ61
182
M_A_DQ63
192
M_A_DQ62
194 50
T25T25
69
T165T165
83 120 163
T147T147
196 193 190 187 184 183 178 177 172 171 168 165 162 161 156 155 150 149 145 144 139 138 133
4
+SMDDR_VREF
Stuff No Stuff
M_A_DQ[0..63] 5
+3V
SA_B : '0','1'
M_A_CS#25,9 M_A_CS#35,9
+1.8VSUS
+1.8VSUS
R121
R121
Short_6
Short_6
MVREF_DIM
C177
C177 1u/6.3V_4
1u/6.3V_4
1.This part should not contain any substances which are specified in SS-00259-1
2.Purchase ink, paint, wire rods and molding resins only from the business partners that Sony approves as Green Partners.
M_B_A[0..15]5,9
R8 4.7K_4R8 4.7K_4 R7 *4.7K_4R7 *4.7K_4
M_B_DM[0..7]5
M_B_DQS[0..7]5
M_B_DQS#[0..7]5
M_CLKOUT35 M_CLKOUT3#5 M_CLKOUT45 M_CLKOUT4#5
+3V
C178 0.1u/10V_4C178 0.1u/10V_4
2.2u/10V_8
2.2u/10V_8
R120
R120 *1K/F_4
*1K/F_4
R119
R119
No Stuff
*1K/F_4
*1K/F_4
12
12
R6 0_4R6 0_4
M_B_BS#05,9 M_B_BS#15,9 M_B_BS#25,9
M_CKE25,9 M_CKE35,9
M_B_RAS#5,9 M_B_CAS#5,9 M_B_WE#5,9 M_B_CS#05,9 M_B_CS#15,9
M_ODT25,9 M_ODT35,9
C180
C180
R11 *0_4R11 *0_4
SA0_B SA1_B
1 2
3
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15
M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7
M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7
M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7
M_CLKOUT3 M_CLKOUT3# M_CLKOUT4 M_CLKOUT4#
SA0_B SA1_B
DDRDAT_SMB
C5 0.1u/10V_4C5 0.1u/10V_4
MVREF_DIM
C175
C175
0.1u/10V_4
0.1u/10V_4
3
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10
90
A11
89
A12
116
A13
86
A14
84
A15
107
BA0
106
BA1
85
BA2
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS0
29
DQS1
49
DQS2
68
DQS3
129
DQS4
146
DQS5
167
DQS6
186
DQS7
30
CK0
32
CK0
164
CK1
166
CK1
79
CKE0
80
CKE1
108
RAS
113
CAS
109
WE
110
S0
115
S1
114
ODT0
119
ODT1
198
SA0
200
SA1
195
SDA
197
SCL
199
VDDspd
1
VREF
2
VSS0
3
VSS1
8
VSS2
9
VSS3
12
VSS4
15
VSS5
18
VSS6
21
VSS7
24
VSS8
27
VSS9
28
VSS10
33
VSS11
34
VSS12
39
VSS13
40
VSS14
41
VSS15
42
VSS16
47
VSS17
48
VSS18
53
VSS19
54
VSS20
+1.8VSUS
201
202
VDD081VDD182VDD287VDD388VDD495VDD596VDD6
GND PAD0
GND PAD1
REVERSE
SPD Address:0xA2
(H=9.2)
59
103
104
VDD7
VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21
111
112
117
VDD8
VDD9
VDD10
SO-DIMM
SO-DIMM
VSS31
VSS30
VSS29
127
122
121
118
CN14
CN14
DQ0 DQ1
VDD11
DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
NC1
NC2
NC3
NC4
NC/TEST
VSS56 VSS55 VSS54 VSS53 VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34
VSS33
VSS32
TYC_2-1734073-2_9.2
TYC_2-1734073-2_9.2
132
128
2
SDATA03,15,21,22
SCLK03,15,21,22
M_B_DQ[0..63] 5
+1.8VSUS
*10u/10V_8C446 *10u/10V_8C446 *10u_8C164 *10u_8C164 10u/10V_8C96 10u/10V_8C96 10u/10V_8C454 10u/10V_8C454
0.1u/10V_4C458 0.1u/10V_4C458
0.1u/10V_4C42 0.1u/10V_4C42
0.1u/10V_4C46 0.1u/10V_4C46
0.1u/10V_4C92 0.1u/10V_4C92
0.1u/10V_4C456 0.1u/10V_4C456
0.1u/10V_4C434 0.1u/10V_4C434
0.1u/10V_4C432 0.1u/10V_4C432
0.1u/10V_4C448 0.1u/10V_4C448
0.1u/10V_4C444 0.1u/10V_4C444
0.1u/10V_4C44 0.1u/10V_4C44
0.1u/10V_4C426 0.1u/10V_4C426
0.1u/10V_4C98 0.1u/10V_4C98
0.1u/10V_4C452 0.1u/10V_4C452
0.1u/10V_4C93 0.1u/10V_4C93
0.1u/10V_4C450 0.1u/10V_4C450
0.1u/10V_4C66 0.1u/10V_4C66
0.1u/10V_4C55 0.1u/10V_4C55
0.1u/10V_4C54 0.1u/10V_4C54
0.1u/10V_4C97 0.1u/10V_4C97
0.1u/10V_4C424 0.1u/10V_4C424
M_B_CS#25,9 M_B_CS#35,9
+3V
Q2
Q2
2
*RHU002N06
*RHU002N06
3
3
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
R4 short_4R4 short_4
+3V
Q1
Q1
2
*RHU002N06
*RHU002N06
1
R3 short_4R3 short_4
PROJECT : Z07
PROJECT : Z07
Quanta Computer Inc.
Quanta Computer Inc.
DDRII SODIMM X 2
DDRII SODIMM X 2
DDRII SODIMM X 2
M_B_DQ4
5
M_B_DQ1
7
M_B_DQ2
17
M_B_DQ3
19
M_B_DQ5
4
M_B_DQ0
6
M_B_DQ6
14
M_B_DQ7
16
M_B_DQ8
23
M_B_DQ9
25
M_B_DQ10
35
M_B_DQ15
37
M_B_DQ12
20
M_B_DQ13
22
M_B_DQ14
36
M_B_DQ11
38
M_B_DQ16
43
M_B_DQ21
45
M_B_DQ19
55
M_B_DQ23
57
M_B_DQ20
44
M_B_DQ17
46
M_B_DQ18
56
M_B_DQ22
58
M_B_DQ29
61
M_B_DQ28
63
M_B_DQ26
73
M_B_DQ27
75
M_B_DQ24
62
M_B_DQ25
64
M_B_DQ30
74
M_B_DQ31
76
M_B_DQ32
123
M_B_DQ36
125
M_B_DQ39
135
M_B_DQ35
137
M_B_DQ33
124
M_B_DQ37
126
M_B_DQ34
134
M_B_DQ38
136
M_B_DQ40
141
M_B_DQ41
143
M_B_DQ46
151
M_B_DQ43
153
M_B_DQ44
140
M_B_DQ45
142
M_B_DQ47
152
M_B_DQ42
154
M_B_DQ53
157
M_B_DQ49
159
M_B_DQ55
173
M_B_DQ54
175
M_B_DQ48
158
M_B_DQ52
160
M_B_DQ50
174
M_B_DQ51
176
M_B_DQ60
179
M_B_DQ57
181
M_B_DQ62
189
M_B_DQ59
191
M_B_DQ61
180
M_B_DQ56
182
M_B_DQ63
192
M_B_DQ58
194 50
T24T24
69
T23T23
83 120 163
T3T3
196 193 190 187 184 183 178 177 172 171 168 165 162 161 156 155 150 149 145 144 139 138 133
2
R5 *10K_4R5*10K_4
1
R1 *10K_4R1*10K_4
DDRDAT_SMB
DDRCLK_SMB
1
8 36Tuesday, March 10, 2009
8 36Tuesday, March 10, 2009
8 36Tuesday, March 10, 2009
8
3C
3C
3C
5
4
3
2
1
9
D D
+SMDDR_VTERM
C C
*10u/10V_8C1 *10u/10V_8C1 *10u/10V_8C6 *10u/10V_8C6
0.1u/10V_4C40 0.1u/10V_4C40
0.1u/10V_4C466 0.1u/10V_4C466
0.1u/10V_4C103 0.1u/10V_4C103
0.1u/10V_4C472 0.1u/10V_4C472
0.1u/10V_4C13 0.1u/10V_4C13
0.1u/10V_4C139 0.1u/10V_4C139
0.1u/10V_4C105 0.1u/10V_4C105
0.1u/10V_4C15 0.1u/10V_4C15
0.1u/10V_4C10 0.1u/10V_4C10 *0.1u/10V_4C16 *0.1u/10V_4C16 *0.1u/10V_4C111 *0.1u/10V_4C111
0.1u/10V_4C29 0.1u/10V_4C29
0.1u/10V_4C17 0.1u/10V_4C17
0.1u/10V_4C14 0.1u/10V_4C14
0.1u/10V_4C463 0.1u/10V_4C463
0.1u/10V_4C37 0.1u/10V_4C37 *0.1u/10V_4C468 *0.1u/10V_4C468
0.1u/10V_4C32 0.1u/10V_4C32
0.1u/10V_4C106 0.1u/10V_4C106
0.1u/10V_4C461 0.1u/10V_4C461 *0.1u/10V_4C128 *0.1u/10V_4C128
0.1u/10V_4C116 0.1u/10V_4C116
0.1u/10V_4C471 0.1u/10V_4C471
0.1u/10V_4C11 0.1u/10V_4C11 *0.1u/10V_4C12 *0.1u/10V_4C12
0.1u/10V_4C459 0.1u/10V_4C459
+1.8VSUS
+SMDDR_VTERM
0.1u/10V_4C449 0.1u/10V_4C449
0.1u/10V_4C453 0.1u/10V_4C453
0.1u/10V_4C445 0.1u/10V_4C445
0.1u/10V_4C132 0.1u/10V_4C132
0.1u/10V_4C435 0.1u/10V_4C435
0.1u/10V_4C465 0.1u/10V_4C465
0.1u/10V_4C457 0.1u/10V_4C457
0.1u/10V_4C464 0.1u/10V_4C464
0.1u/10V_4C134 0.1u/10V_4C134
0.1u/10V_4C451 0.1u/10V_4C451
0.1u/10V_4C135 0.1u/10V_4C135
0.1u/10V_4C462 0.1u/10V_4C462
0.1u/10V_4C447 0.1u/10V_4C447
0.1u/10V_4C460 0.1u/10V_4C460
0.1u/10V_4C455 0.1u/10V_4C455
0.1u/10V_4C131 0.1u/10V_4C131
M_CKE05,8 M_CKE15,8 M_CKE25,8 M_CKE35,8
M_ODT05,8 M_ODT15,8 M_ODT25,8 M_ODT35,8
M_A_BS#05,8 M_A_BS#15,8 M_A_BS#25,8
M_A_WE#5,8 M_A_CAS#5,8 M_A_RAS#5,8
M_B_BS#05,8 M_B_BS#15,8 M_B_BS#25,8
M_B_WE#5,8 M_B_CAS#5,8 M_B_RAS#5,8
M_A_CS#05,8 M_A_CS#15,8 M_A_CS#25,8 M_A_CS#35,8
M_B_CS#05,8 M_B_CS#15,8 M_B_CS#25,8 M_B_CS#35,8
M_A_A[0..15]5,8
M_A_A13 M_A_A10 M_A_A0 M_A_A2 M_A_A4 M_A_A6 M_A_A15 M_A_A14 M_A_A9 M_A_A12 M_A_A3 M_A_A5 M_A_A1 M_A_A8 M_A_A7 M_A_A11
R85 47_4R85 47_4 R88 47_4R88 47_4 R83 47_4R83 47_4 R87 47_4R87 47_4
R59 47_4R59 47_4 R49 47_4R49 47_4 R57 47_4R57 47_4 R54 47_4R54 47_4
R78 47_4R78 47_4 R72 47_4R72 47_4 R82 47_4R82 47_4
R77 47_4R77 47_4 R51 47_4R51 47_4 R70 47_4R70 47_4
R68 47_4R68 47_4 R73 47_4R73 47_4 R80 47_4R80 47_4
R63 47_4R63 47_4 R58 47_4R58 47_4 R69 47_4R69 47_4
R67 47_4R67 47_4 R47 47_4R47 47_4 R89 47_4R89 47_4 R64 47_4R64 47_4
R66 47_4R66 47_4 R55 47_4R55 47_4 R86 47_4R86 47_4 R60 47_4R60 47_4
R56 47_4R56 47_4 R79 47_4R79 47_4
RP9 0404-47X2RP9 0404-47X2
1 2 3 4
RP11 0404-47X2RP11 0404-47X2
1 2 3 4
RP14 0404-47X2RP14 0404-47X2
1 2 3 4
RP13 0404-47X2RP13 0404-47X2
1 2 3 4
RP6 0404-47X2RP6 0404-47X2
1 2 3 4
RP8 0404-47X2RP8 0404-47X2
1 2 3 4
RP10 0404-47X2RP10 0404-47X2
1 2 3 4
+SMDDR_VTERM
Please put the CAP between +1.8VSUS & +SMDDR_VTERM
B B
M_B_A[0..15]5,8
M_B_A0 M_B_A2 M_B_A4 M_B_A6 M_B_A7 M_B_A11 M_B_A3 M_B_A1 M_B_A8 M_B_A5 M_B_A12 M_B_A9 M_B_A10 M_B_A13 M_B_A14 M_B_A15
RP2 0404-47X2RP2 0404-47X2
1 2 3 4
RP4 0404-47X2RP4 0404-47X2
1 2 3 4
RP7 0404-47X2RP7 0404-47X2
1 2 3 4
RP1 0404-47X2RP1 0404-47X2
1 2 3 4
RP3 0404-47X2RP3 0404-47X2
1 2 3 4
RP5 0404-47X2RP5 0404-47X2
1 2 3 4
R71 47_4R71 47_4 R52 47_4R52 47_4
RP12 0404-47X2RP12 0404-47X2
1 2 3 4
A A
PROJECT : Z07
PROJECT : Z07
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDRII TERMINATION
DDRII TERMINATION
DDRII TERMINATION
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Quanta Computer Inc.
9 36Tuesday, March 10, 2009
9 36Tuesday, March 10, 2009
9 36Tuesday, March 10, 2009
1
3C
3C
3C
5
4
3
2
1
10
D D
U16A
U16A
P21 P22 P18 P19 M22 M21 M18 M19 L18 L19 G22 G21 J20 J21 F21 F22
N24 N25 L25 M24 K25 K24 J23 K23 G25 H24 F25 F24 E23 F23 E24 E25
L21 L22
J24 J25
N23 P23
C25 D24
HT_CADIN15_P 4 HT_CADIN15_N 4 HT_CADIN14_P 4 HT_CADIN14_N 4 HT_CADIN13_P 4 HT_CADIN13_N 4 HT_CADIN12_P 4 HT_CADIN12_N 4 HT_CADIN11_P 4 HT_CADIN11_N 4 HT_CADIN10_P 4 HT_CADIN10_N 4 HT_CADIN9_P 4 HT_CADIN9_N 4 HT_CADIN8_P 4 HT_CADIN8_N 4
HT_CADIN7_P 4 HT_CADIN7_N 4 HT_CADIN6_P 4 HT_CADIN6_N 4 HT_CADIN5_P 4 HT_CADIN5_N 4 HT_CADIN4_P 4 HT_CADIN4_N 4 HT_CADIN3_P 4 HT_CADIN3_N 4 HT_CADIN2_P 4 HT_CADIN2_N 4 HT_CADIN1_P 4 HT_CADIN1_N 4 HT_CADIN0_P 4 HT_CADIN0_N 4
HT_CLKIN1_P 4 HT_CLKIN1_N 4
HT_CLKIN0_P 4 HT_CLKIN0_N 4
HT_CTLIN0_P 4 HT_CTLIN0_N 4
R395 100/F_4R395 100/F_4R398 49.9/F_4R398 49.9/F_4
HT_TXCALPHT_RXCALP
W19
W20 AC21 AB22 AB20
AA20 AA19
AA25 AA24
AB23
AA23 AB24 AB25 AC24 AC25
W21 W22
W25
R19 R18 R21 R22 U22 U21 U18 U19
Y19 T24
R25 U25 U24
V23
U23
V24 V25
Y24
P24 P25
A24
C24
HT_RXCAD15P HT_RXCAD15N HT_RXCAD14P HT_RXCAD14N HT_RXCAD13P HT_RXCAD13N HT_RXCAD12P HT_RXCAD12N HT_RXCAD11P HT_RXCAD11N HT_RXCAD10P HT_RXCAD10N HT_RXCAD9P HT_RXCAD9N HT_RXCAD8P HT_RXCAD8N
HT_RXCAD7P HT_RXCAD7N HT_RXCAD6P HT_RXCAD6N HT_RXCAD5P HT_RXCAD5N HT_RXCAD4P HT_RXCAD4N HT_RXCAD3P HT_RXCAD3N HT_RXCAD2P HT_RXCAD2N HT_RXCAD1P HT_RXCAD1N HT_RXCAD0P HT_RXCAD0N
HT_RXCLK1P HT_RXCLK1N
HT_RXCLK0P HT_RXCLK0N
HT_RXCTLP HT_RXCTLN
HT_RXCALP HT_RXCALN
RS690MC
RS690MC
PART 1 OF 5
PART 1 OF 5
HYPER TRANSPORT CPU I/F
HYPER TRANSPORT CPU I/F
HT_TXCAD15P
HT_TXCAD15N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD0P
HT_TXCAD0N
HT_TXCLK1P HT_TXCLK1N
HT_TXCLK0P HT_TXCLK0N
HT_TXCTLP HT_TXCTLN
HT_TXCALP HT_TXCALN
HT_CADOUT15_P4 HT_CADOUT15_N4 HT_CADOUT14_P4 HT_CADOUT14_N4 HT_CADOUT13_P4 HT_CADOUT13_N4 HT_CADOUT12_P4 HT_CADOUT12_N4 HT_CADOUT11_P4 HT_CADOUT11_N4 HT_CADOUT10_P4 HT_CADOUT10_N4 HT_CADOUT9_P4 HT_CADOUT9_N4 HT_CADOUT8_P4 HT_CADOUT8_N4
C C
VDDHT_PKG
B B
HT_CADOUT7_P4 HT_CADOUT7_N4 HT_CADOUT6_P4 HT_CADOUT6_N4 HT_CADOUT5_P4 HT_CADOUT5_N4 HT_CADOUT4_P4 HT_CADOUT4_N4 HT_CADOUT3_P4 HT_CADOUT3_N4 HT_CADOUT2_P4 HT_CADOUT2_N4 HT_CADOUT1_P4 HT_CADOUT1_N4 HT_CADOUT0_P4 HT_CADOUT0_N4
HT_CLKOUT1_P4 HT_CLKOUT1_N4
HT_CLKOUT0_P4 HT_CLKOUT0_N4
HT_CTLOUT0_P4 HT_CTLOUT0_N4
R397 49.9/F_4R397 49.9/F_4
HT_RXCALN HT_TXCALN
A A
PROJECT : Z07
PROJECT : Z07
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
RS690M HT LINK I/F
RS690M HT LINK I/F
RS690M HT LINK I/F
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Quanta Computer Inc.
10 36Tuesday, March 10, 2009
10 36Tuesday, March 10, 2009
10 36Tuesday, March 10, 2009
1
3C
3C
3C
5
4
3
2
1
11
D D
U16B
U16B
G5
GFX_RX0P
G4
GFX_RX0N
J8
GFX_RX1P
J7
GFX_RX1N
J4
GFX_RX2P
J5
GFX_RX2N
L8
GFX_RX3P
L7
GFX_RX3N
L4
GFX_RX4P
L5
GFX_RX4N
M8
GFX_RX5P
M7
GFX_RX5N
M4
GFX_RX6P
M5
GFX_RX6N
P8
GFX_RX7P
C C
GPP_RX1P_WLAN22 GPP_RX1N_WLAN22
GPP_RX0P_LAN21 GPP_RX0N_LAN21
B B
A_RX0P14 A_RX0N14
A_RX1P14 A_RX1N14
A_RX2P14 A_RX2N14
A_RX3P14 A_RX3N14
R74 *10K/F_4R74 *10K/F_4 R75 *8.25K/F_4R75 *8.25K/F_4
T155T155 T154T154
T16T16 T13T13
P7
GFX_RX7N
P4
GFX_RX8P
P5
GFX_RX8N
R4
GFX_RX9P
R5
GFX_RX9N
R7
GFX_RX10P
R8
GFX_RX10N
U4
GFX_RX11P
U5
GFX_RX11N
W4
GFX_RX12P
W5
GFX_RX12N
Y4
GFX_RX13P
Y5
GFX_RX13N
V9
GFX_RX14P
W9
GFX_RX14N
AB7
GFX_RX15P
AB6
GFX_RX15N
AD16
GPP_RX0P
AE16
GPP_RX0N
AD20
GPP_RX1P
AE20
GPP_RX1N
Y7
GPP_RX2P
AA7
GPP_RX2N
AB9
GPP_RX3P
AA9
GPP_RX3N
W14
SB_RX0P
W15
SB_RX0N
AB12
SB_RX1P
AA12
SB_RX1N
W11
SB_RX2P
W12
SB_RX2N
AA11
SB_RX3P
AB11
SB_RX3N
AA14
PCE_ISET(PCE_CALI)
AB14
PCE_TXISET(NC)
RS690MC
RS690MC
PART 2 OF 5
PART 2 OF 5
PCIE I/F GFX
PCIE I/F GFX
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
PCE_PCAL(PCE_CALRP) PCE_NCAL(PCE_CALRN)
GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GPP_TX0P GPP_TX0N
GPP_TX1P GPP_TX1N
GPP_TX2P GPP_TX2N
GPP_TX3P GPP_TX3N
SB_TX0P SB_TX0N
SB_TX1P SB_TX1N
SB_TX2P SB_TX2N
SB_TX3P SB_TX3N
J1 H2 K2 K1 K3 L3 L1 L2 N2 N1 P2 P1 P3 R3 R1 R2 T2 U1 V2 V1 V3 W3 W1 W2 Y2 AA1 AA2 AB2 AB1 AC1 AE3 AE4
AD14 AD15
AD19 AE19
AD4 AE5
AD5 AD6
AE9 AD10
AC8 AD9
AD8 AE8
AD7 AE7
AD11 AE11
GPP_TX0P_C GPP_TX0N_C
T150T150 T156T156
GPP_TX2P_C GPP_TX2N_C
T151T151 T19T19
A_TX0P_C A_TX0N_C
A_TX1P_C A_TX1N_C
A_TX2P_C A_TX2N_C
A_TX3P_C A_TX3N_C
A_CALRP A_CALRN
C441 0.1u/10V_4C441 0.1u/10V_4
C440 0.1u/10V_4C440 0.1u/10V_4
C437 0.1u/10V_4C437 0.1u/10V_4
C436 0.1u/10V_4C436 0.1u/10V_4
C428 0.1u/10V_4C428 0.1u/10V_4
C427 0.1u/10V_4C427 0.1u/10V_4
C443 0.1u/10V_4C443 0.1u/10V_4
C442 0.1u/10V_4C442 0.1u/10V_4
C430 0.1u/10V_4C430 0.1u/10V_4
C429 0.1u/10V_4C429 0.1u/10V_4
C439 0.1u/10V_4C439 0.1u/10V_4
C438 0.1u/10V_4C438 0.1u/10V_4
R389 562_4R389 562_4 R390 2K_4R390 2K_4
VDDA12_PKG2
GPP_TX1P_WLAN 22 GPP_TX1N_WLAN 22
GPP_TX0P_LAN 21 GPP_TX0N_LAN 21
A_TX0P 14 A_TX0N 14
A_TX1P 14 A_TX1N 14
A_TX2P 14 A_TX2N 14
A_TX3P 14 A_TX3N 14
A A
PROJECT : Z07
PROJECT : Z07
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
RS690MC PCIE LINK I/F
RS690MC PCIE LINK I/F
RS690MC PCIE LINK I/F
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Quanta Computer Inc.
11 36Tuesday, March 10, 2009
11 36Tuesday, March 10, 2009
11 36Tuesday, March 10, 2009
1
3C
3C
3C
5
+1.8V
L8
L8 BK1608HS600_6
BK1608HS600_6
+1.8V
D D
C C
B B
L53
L53 BK1608HS600_6
BK1608HS600_6
+1.8V AVDDQ
L50
L50 BK1608HS600_6
BK1608HS600_6
+3V AVDD_NB
L11
L11 BK1608HS600_6
BK1608HS600_6
LDT_STOP#6,14
+3V
HTPVDD
*10u/10V_8
*10u/10V_8
C141
C141
PLLVDD
*10u/10V_8
*10u/10V_8
C489
C489
*10u/10V_8
*10u/10V_8
C485
C485
C162
C162
2.2u/6.3V_6
2.2u/6.3V_6
+1.8V
R94
R94
2.2K_4
2.2K_4
2
1 3
Q17
Q17 MMBT3904
MMBT3904
R106 10K_4R106 10K_4
R99 *3K_4R99 *3K_4
R105 *10K_4R105 *10K_4
+3V
R101
R101 10K_4
10K_4
LDT_STOP#_NB
TV_SWITCH
LOAD_ROM#
STRP_DATA
C148
C148
2.2u/6.3V_6
2.2u/6.3V_6
C478
C478
2.2u/6.3V_6
2.2u/6.3V_6
C484
C484
2.2u/10V_8
2.2u/10V_8
1 2
C159
C159 *0.1u/10V_4
*0.1u/10V_4
LOAD_ROM# : LOAD ROM STRAP ENABLE
High, LOAD ROM STRAP DISABLE Low, LOAD ROM STRAP ENABLE
+1.8V AVDDI
R402 Short_6R402 Short_6
CRT_R18 CRT_G18 CRT_B18
AMD inform, It did need to be provided CLK, no matter GFX is installed or not.
HTREFCLK NB_OSC
R109
R109 *10K_4
*10K_4
C155
C155 *0.1u/10V_4
*0.1u/10V_4
For EMI Request
DFT_GPIO0
High, MEMORY SIDE PORT DISABLE Low, MEMORY SIDE PORT ENABLE
A A
+NB_CORE_ON30
R104 short_4R104 short_4
5
STRP_DATA
2.2u/10V_8
2.2u/10V_8
1 2
C486
C486
4
R102IV@150_4 R102IV@150_4
PLLVDD12
C482
C482
2.2u/6.3V_6
2.2u/6.3V_6
R115
R115 *10K_4
*10K_4
C158
C158 *0.1u/10V_4
*0.1u/10V_4
4
R103IV@150_4 R103IV@150_4
INT_LVDS_EDIDCLK19 INT_LVDS_EDIDDATA19
R100IV@150_4 R100IV@150_4
HTREFCLK3
3
U16C
AVDD_NB
20mil
AVDDI
20mil
AVDDQ
20mil
C481
C481 *0.1u/10V_4
*0.1u/10V_4
VSYNC18 HSYNC18
PLLVDD
HTPVDD
NB_RST#14 NB_PWRGD26
ALLOW_LDTSTOP14
NB_OSC3
VDDA12
NBSRC_CLKP3 NBSRC_CLKN3
SBLINK_CLKP3 SBLINK_CLKN3
T37T37
T18T18 T15T15
R400 short_4R400 short_4 R401 short_4R401 short_4
R116 715_6R116 715_6
CRT_DDCCLK18 CRT_DDCDAT18
20mil
R107 10K_4R107 10K_4
L49
L49
R97 *2.7K_4R97 *2.7K_4 R95 *2.7K_4R95 *2.7K_4
R98 *2.7K_4R98 *2.7K_4 R108 *2.7K_4R108 *2.7K_4 R399 *2.7K_4R399 *2.7K_4
NB_THERMDA NB_THERMDC
T33T33 T44T44
R114
R114
4.7K_4
4.7K_4
NB_PWRGD NB_PWRGD_+5V
T42T42 T48T48 T29T29
HTREFCLK
BK1608HS600_6
BK1608HS600_6
39K_4
39K_4
INT_TV_C/R INT_TV_Y/G INT_TV_COMP
INT_VSYNC_R INT_HSYNC_R
DAC_RSET
20mil
LDT_STOP#_NB
TV_SWITCH
PLLVDD12
DFT_GPIO0 LOAD_ROM# DFT_GPIO2 DFT_GPIO3 DFT_GPIO4 DFT_GPIO5
HDMI_HPD
HDMI_DDCDATA STRP_DATA
R96
R96
U16C
B22
AVDD1
C22
AVDD2
G17
AVSSN1
H17
AVSSN2
A20
AVDDDI
B20
AVSSDI
A21
AVDDQ
A22
AVSSQ
C21
C
C20
Y
D19
COMP
E19
RED
F19
GREEN
G19
BLUE
C6
DACVSYNC
A5
DACHSYNC
B21
RSET
B6
DACSCL
A6
DACSDA
A10
PLLVDD18
B10
PLLVSS
B24
HTPVDD
B25
HTPVSS
C10
SYSRESET#
C11
POWERGOOD
C5
LDTSTOP#
B5
ALLOW_LDTSTOP
C23
HTTSTCLK
B23
HTREFCLK
C2
TVCLKIN
B11
OSCIN
A11
OSCOUT(PLLVDD12)
F2
GFX_CLKP
E1
GFX_CLKN
G1
SB_CLKP
G2
SB_CLKN
D6
DFT_GPIO0
D7
DFT_GPIO1
C8
DFT_GPIO2
C7
DFT_GPIO3
B8
DFT_GPIO4
A8
DFT_GPIO5
B2
BMREQ#
A2
I2C_CLK
B4
I2C_DATA
AA15
THERMALDIODE_P
AB15
THERMALDIODE_N
C14
TMDS_HPD
B3
DDC_DATA
C3
TESTMODE
A3
STRP_DATA
RS690MC
RS690MC
+3V
2
1
Q16 FDV301NQ16 FDV301N
3
C126
C126 *.1U_4
*.1U_4
LVDS
LVDS
DEBUG
DEBUG
TXOUT_L0P TXOUT_L0N TXOUT_L1P TXOUT_L1N TXOUT_L2P TXOUT_L2N TXOUT_L3P TXOUT_L3N
TXOUT_U0P TXOUT_U0N TXOUT_U1P TXOUT_U1N TXOUT_U2P TXOUT_U2N TXOUT_U3P TXOUT_U3N
TXCLK_LP TXCLK_LN TXCLK_UP TXCLK_UN
LVDDR18D_1 LVDDR18D_2
LVDDR33_1 LVDDR33_2
LVSSR12 LVSSR13
LVDS_DIGON
LVDS_BLON LVDS_BLEN
DEBUG_6
DEBUG_9
DEBUG_10
DEBUG_15
DEBUG_0 DEBUG_2
DEBUG_1 DEBUG_14 DEBUG_13
PART 3 OF 5
PART 3 OF 5
CRT/TVOUT
CRT/TVOUT
PM
PM
PLL PWR
PLL PWR
CLOCKs
CLOCKs
MIS.
MIS.
+5V
R92
R92
15K_4
15K_4
3
LPVDD LPVSS
LVSSR1 LVSSR3 LVSSR5 LVSSR6 LVSSR7 LVSSR8
2
B14 B15 B13 A13 H14 G14 D17 E17
A15 B16 C17 C18 B17 A17 A18 B18
E15 D15 H15 G15
D14 E14
A12 B12 C12 C13
A16 A14 D12 C19 C15 C16
F14 F15
E12 G12 F12
AE15
AC17 AD18
AE21 AD13
AC13 AE13 AE17 AD17
3
2
1
3
2
1
3
2
1
2
LVDDR18D LVDDR33
INT_LVDS_DIGON_L INT_LVDS_PWM_L INT_LVDS_BLON_L
Q20
Q20
FDV301N
FDV301N
0.65v<Vt<1.5v
INT_LVDS_DIGON_L
Q18
Q18
FDV301N
FDV301N
0.65v<Vt<1.5v
INT_LVDS_PWM_L
Q19
Q19
FDV301N
FDV301N
0.65v<Vt<1.5v
INT_LVDS_BLON_L
1
INT_TXLOUT0+ 19 INT_TXLOUT0- 19 INT_TXLOUT1+ 19 INT_TXLOUT1- 19 INT_TXLOUT2+ 19
INT_TXLOUT2- 19
T45T45 T28T28
T49T49 T39T39 T46T46 T40T40 T50T50 T51T51 T43T43 T47T47
INT_TXLCLKOUT+ 19
INT_TXLCLKOUT- 19
T22T22 T27T27
C167
C167
0.1u/10V_4
0.1u/10V_4
C480
C480
0.1u/10V_4
0.1u/10V_4
T159T159
T14T14 T153T153
T158T158 T152T152
T160T160 T157T157 T148T148 T149T149
R113
R113
2.2K_4
2.2K_4
R117
R117
2.2K_4
2.2K_4
R112
R112
2.2K_4
2.2K_4
LPVDD
L15 BK1608HS600_6L15 BK1608HS600_6
C169
C169
4.7u/6.3V_6
4.7u/6.3V_6
30mil
L51 BK1608HS600_6L51 BK1608HS600_6
C483
C483
4.7u/6.3V_6
4.7u/6.3V_6
INT_LVDS_DIGON 19
INT_LVDS_PWM 19
INT_LVDS_BLON 19
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
RS690MC PLL & VEDIO I/F
RS690MC PLL & VEDIO I/F
RS690MC PLL & VEDIO I/F
Date: Sheet of
Date: Sheet of
Date: Sheet of
+1.8V
1
+3V
C170
C170
4.7u/6.3V_6
4.7u/6.3V_6
20mil
+1.8V
C166
C166
0.1u/10V_4
0.1u/10V_4
PROJECT : Z07
PROJECT : Z07
Quanta Computer Inc.
Quanta Computer Inc.
12
L14
L14 BK1608HS600_6
BK1608HS600_6
30mil
12 36Tuesday, March 10, 2009
12 36Tuesday, March 10, 2009
12 36Tuesday, March 10, 2009
3C
3C
3C
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