Quanta Z05 Schematic
5
4
3
2
1
Z05 SYSTEM BLOCK DIAGRAM
CPU CORE / VDDNB
(ISL6265A)
PAGE 26
DD
CC
NB_CORE +1.1V
(RT8202)
PAGE 28
+1.1V_NB
(RT8202)
PAGE 27
DDR II SMDDR_VTERM
1.8VSUS(TPS51116REGR)
PAGE 29
SYSTEM POWER
(ISL6237)
PAGE 25
SYSTEM CHARGER
(ISL6251A)
PAGE 24
DDRII-SODIMM1
PAGE 6
DDRII-SODIMM2
PAGE 6
LVDS
PAGE 14
CRT
PAGE 14
DDRII 667/800 MHz
DDRII 667/800 MHz
LVDS
CRT
AMD Griffin
S1G2 Processor
638P (uPGA)/35W
HT3
LINK
Lion
Sabie
PAGE 2,3,4,5
NORTH BRIDGE &
SOUTH BRIDGE
CPU THERMAL
SENSOR
PAGE 4
CPU Fan
PAGE 23
PCI-E
PCIE4PCIE3
X1X1
Mini PCI-E
Card
Express
Card
(Wireless LAN)(NEW CARD)
PAGE 17
PAGE 17 PAGE 15
PCIE2
LAN
BRODCOM
BCM8764M
(10/100/GagaLAN)
X1
RJ45
PAGE 15
MCP77M
SATA - HDD
PAGE 18
ODD(SATA)
PAGE 18
BB
SATA0
SATA1
14.318MHz
LPC
27mm X 27mm,
836pin BGA
PAGE 7,8,9,10,
11,12,13
USB2.0
Azalia
Azalia AudioController
RealTek ALC268
USB 8USB 5
USB 0,1,7
X3
USB2.0 PortsBluetoothPC-cam
PAGE 20
PCB STACK UP
LAYER 1 : TOP
LAYER 2 : GND
Keyboard
PAGE 23
KBC
(WPCE775C)
PAGE 22
Audio
Amplifier
PAGE 20
X1X1
USB 6USB 3USB 10
X1X1X1
PAGE 14PAGE 16PAGE 16,24
MDC 1.5
PAGE 20
Int MIC
PAGE 20
RJ11
PAGE 15
Fingerprint
PAGE 23
USB 2
X1
Card Reader
Realtek
RTS5158E
(7 in 1)
PAGE 19
LAYER 3 : IN1
LAYER 4 : IN2
LAYER 5 : VCC
LAYER 6 : BOT
AA
5
4
PAGE 18PAGE 22
SPI ROMTouch Pad
Speaker
PAGE 20PAGE 21PAGE 21PAGE 21
3
SPIDF/Phone
Jack
Line in MIC Jack
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
SizeDocument NumberRev
SizeDocument NumberRev
SizeDocument NumberRev
Date:Sheet of
Date:Sheet of
Date:Sheet of
PROJECT :
Block Diagram
Block Diagram
Block Diagram
Z05
Z05
Z05
134Friday, March 07, 2008
134Friday, March 07, 2008
1
134Friday, March 07, 2008
1A
1A
1A
PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com
5
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HT_RXD#[15..0]<7> HT_TXD[15..0]<7>
HT_RXD[15..0]<7>
DD
HT_RXD#[15..0]
HT_RXD[15..0]
HT_TXD#[15..0]<7>
HT_TXD[15..0]
HT_TXD#[15..0]
PROCESSOR HYPERTRANSPORT INTERFACE
VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWER
SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE
VLDT_RUN
U14A
U14A
D1
D2
D3
CC
BB
HT_CPU_UPCLK0<7>
HT_CPU_UPCLK#0<7>
HT_CPU_UPCLK1<7>
HT_CPU_UPCLK#1<7>
HT_CPU_UPCTL0<7>
HT_CPU_UPCTL#0<7>
HT_CPU_UPCTL1<7>
HT_CPU_UPCTL#1<7>
AA
5
NO STUB
for HT3
HT_RXD0
HT_RXD#0
HT_RXD1
HT_RXD#1
HT_RXD2
HT_RXD#2
HT_RXD3
HT_RXD#3
HT_RXD4
HT_RXD#4
HT_RXD5
HT_RXD#5
HT_RXD6
HT_RXD#6
HT_RXD7
HT_RXD#7
HT_RXD8
HT_RXD#8
HT_RXD9
HT_RXD#9
HT_RXD10
HT_RXD#10
HT_RXD11
HT_RXD#11
HT_RXD12
HT_RXD#12
HT_RXD13
HT_RXD#13
HT_RXD14
HT_RXD#14
HT_RXD15
HT_RXD#15
R127
R127
*51/F_4
*51/F_4
VLDT_RUN
D4
E3
E2
E1
F1
G3
G2
G1
H1
J1
K1
L3
L2
L1
M1
N3
N2
E5
F5
F3
F4
G5
H5
H3
H4
K3
K4
L5
M5
M3
M4
N5
P5
J3
J2
J5
K5
N1
P1
P3
P4
R122
R122
*51/F_4
*51/F_4
HT LINK
HT LINK
VLDT_A0
VLDT_A1
VLDT_A2
VLDT_A3
L0_CADIN_H0
L0_CADIN_L0
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H15
L0_CADIN_L15
L0_CLKIN_H0
L0_CLKIN_L0
L0_CLKIN_H1
L0_CLKIN_L1
L0_CTLIN_H0
L0_CTLIN_L0
L0_CTLIN_H1
L0_CTLIN_L1
Athlon 64 S1g2 SOCKET_638_PIN
Athlon 64 S1g2 SOCKET_638_PIN
Athlon 64 S1g2
Processor Socket
SOCKET_638_PIN
4
L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
VLDT_B0
VLDT_B1
VLDT_B2
VLDT_B3
AE2
AE3
AE4
AE5
AD1
AC1
AC2
AC3
AB1
AA1
AA2
AA3
W2
W3
V1
U1
U2
U3
T1
R1
AD4
AD3
AD5
AC5
AB4
AB3
AB5
AA5
Y5
W5
V4
V3
V5
U5
T4
T3
Y1
W1
Y4
Y3
R2
R3
T5
R5
C399
C399
4.7U_6
4.7U_6
HT_TXD0
HT_TXD#0
HT_TXD1
HT_TXD#1
HT_TXD2
HT_TXD#2
HT_TXD3
HT_TXD#3
HT_TXD4
HT_TXD#4
HT_TXD5
HT_TXD#5
HT_TXD6
HT_TXD#6
HT_TXD7
HT_TXD#7
HT_TXD8
HT_TXD#8
HT_TXD9
HT_TXD#9
HT_TXD10
HT_TXD#10
HT_TXD11
HT_TXD#11
HT_TXD12
HT_TXD#12
HT_TXD13
HT_TXD#13
HT_TXD14
HT_TXD#14
HT_TXD15
HT_TXD#15
HT_CPU_DWNCLK0<7>
HT_CPU_DWNCLK#0<7>
HT_CPU_DWNCLK1<7>
HT_CPU_DWNCLK#1<7>
HT_CPU_DWNCTL0<7>
HT_CPU_DWNCTL#0<7>
HT_CPU_DWNCTL1<7>
HT_CPU_DWNCTL#1<7>
3
Note:on MCP77,(HT=+1.1V) and CPU(HT=+1.2V)
and therefore cannot be connected to the
same HT power rail.
VLDT_RUN+1.2V_HT
L58
L58
FBJ3216HS800_1206
FBJ3216HS800_1206
L59
L59
FBJ3216HS800_1206
FBJ3216HS800_1206
80 ohm(4A)
LAYOUT: Place bypass cap on topside of board
C401
C401
4.7U_6
4.7U_6
NEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLY
TO DOWNSTREAM HT DEVICE, BUT CONNECTED INTERNALLY
TO OTHER HT POWER PINS
PLACE CLOSE TO VLDT0 POWER PINS
2
C428
C428
4.7U_6
4.7U_6
C427
C427
C396
C396
.22U_4
.22U_4
.22U_4
.22U_4
SizeDocument NumberRev
SizeDocument NumberRev
SizeDocument NumberRev
Date:Sheet of
Date:Sheet of
Date:Sheet of
AMD Griffin HT I/F
AMD Griffin HT I/F
AMD Griffin HT I/F
C394
C394
180P_4
180P_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
C424
C424
180P_4
180P_4
Z05
Z05
Z05
234Monday, February 25, 2008
234Monday, February 25, 2008
234Monday, February 25, 2008
1
1A
1A
1A
PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com
A
VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWER
SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE
1 2
T43T43
T12T12
T26T26
T20T20
T16T16
T40T40
T33T33
T30T30
T38T38
+SMDDR_VTERM
C87
C87
4.7U_6
4.7U_6
12
4.7U_6
4.7U_6
C65
C65
+SMDDR_VTERM
M_ZP
M_ZN
MEM_MA_RESET#
M_A1_ODT0
M_A1_ODT1
M_A1_CS#0
M_A1_CS#1
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
C269
C269
1.5pF_4
1.5pF_4
C61
C61
1.5pF_4
1.5pF_4
C441
C441
.22U_4
.22U_4
PLACE THEM CLOSE TO
M_A_CLKOUT1<6>
M_A_CLKOUT1#<6>
M_A_CLKOUT7<6>
M_A_CLKOUT7#<6>
M_A_A[0..15]<6>
CPU WITHIN 1"
+1.8VSUS
M_A_ODT0<6>
M_A_ODT1<6>
M_A_CS#0<6>
M_A_CS#1<6>
M_A_CKE0<6>
M_A_CKE1<6>
M_A_BS#0<6>
M_A_BS#1<6>
M_A_BS#2<6>
M_A_RAS#<6>
M_A_CAS#<6>
M_A_WE#<6>
M_A_CLKOUT1<6>
M_A_CLKOUT1#<6>
M_A_CLKOUT7<6>
M_A_CLKOUT7#<6>
C446
C446
4.7U_6
4.7U_6
4.7U_6
4.7U_6
C447
C447
R26539.2/F_4R26539.2/F_4
R26639.2/F_4R26639.2/F_4
44
33
22
U14B
U14B
D10
VTT1
MEM:CMD/CTRL/CLK
MEM:CMD/CTRL/CLK
C10
VTT2
B10
VTT3
AD10
VTT4
AF10
MEMZP
AE10
MEMZN
H16
RSVD_M1
T19
MA0_ODT0
V22
MA0_ODT1
U21
MA1_ODT0
V19
MA1_ODT1
T20
MA0_CS_L0
U19
MA0_CS_L1
U20
MA1_CS_L0
V20
MA1_CS_L1
J22
MA_CKE0
J20
MA_CKE1
N19
MA_CLK_H5
N20
MA_CLK_L5
E16
MA_CLK_H1
F16
MA_CLK_L1
Y16
MA_CLK_H7
AA16
MA_CLK_L7
P19
MA_CLK_H4
P20
MA_CLK_L4
N21
MA_ADD0
M20
MA_ADD1
N22
MA_ADD2
M19
MA_ADD3
M22
MA_ADD4
L20
MA_ADD5
M24
MA_ADD6
L21
MA_ADD7
L19
MA_ADD8
K22
MA_ADD9
R21
MA_ADD10
L22
MA_ADD11
K20
MA_ADD12
V24
MA_ADD13
K24
MA_ADD14
K19
MA_ADD15
R20
MA_BANK0
R23
MA_BANK1
J21
MA_BANK2
R19
MA_RAS_L
T22
MA_CAS_L
T24
MA_WE_L
Athlon 64 S1g2 SOCKET_638_PIN
Athlon 64 S1g2 SOCKET_638_PIN
Athlon 64 S1g2
Processor Socket
SOCKET_638_PIN
PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH
C444
C444
C67
C67
C69
.22U_4
.22U_4
C69
.22U_4
.22U_4
.22U_4
.22U_4
VTT_SENSE
MB0_ODT0
MB0_ODT1
MB1_ODT0
MB0_CS_L0
MB0_CS_L1
MB1_CS_L0
MB_CLK_H5
MB_CLK_L5
MB_CLK_H1
MB_CLK_L1
MB_CLK_H7
MB_CLK_L7
MB_CLK_H4
MB_CLK_L4
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15
MB_BANK0
MB_BANK1
MB_BANK2
MB_RAS_L
MB_CAS_L
VTT5
VTT6
VTT7
VTT8
VTT9
MEMVREF
RSVD_M2
MB_CKE0
MB_CKE1
MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_WE_L
C66
C66
1000P_4
1000P_4
B
+SMDDR_VTERM
W10
AC10
AB10
AA10
A10
CPU_VTT_SUS_FB
Y10
CPU_M_VREF
W17
MEM_MB_RESET#
B18
W26
W23
Y26
V26
W25
U22
J25
H26
P22
R22
A17
A18
AF18
AF17
R26
R25
P24
N24
P26
N23
N26
L23
N25
L24
M26
K26
T26
L26
L25
W24
J23
J24
R24
U26
J26
U25
U24
U23
M_B_CLKOUT1<6>
M_B_CLKOUT1#<6>
M_B_CLKOUT7<6>
M_B_CLKOUT7#<6>
C68
C68
1000P_4
1000P_4
M_B1_ODT0
M_B1_CS#0
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
C440
C440
1000P_4
1000P_4
C443
C443
1000P_4
1000P_4
C
D
E
Processor DDR2 Memory Interface
U14C
U14C
MEM:DATA
+1.8VSUS
R103
R103
2K/F_4
C81
C81
1000P_4
1000P_4
2K/F_4
R102
R102
2K/F_4
2K/F_4
T15T15
T54T54
T13T13
T18T18
T32T32
T36T36
T31T31
T24T24
M_B_ODT0<6>
M_B_ODT1<6>
M_B_CS#0<6>
M_B_CS#1<6>
M_B_CKE0<6>
M_B_CKE1<6>
M_B_CLKOUT1<6>
M_B_CLKOUT1#<6>
M_B_CLKOUT7<6>
M_B_CLKOUT7#<6>
M_B_A[0..15]<6>
C100
C100
.1U_4
.1U_4
M_B_DQ[0..63]<6>
To reverse SODIMM socket
M_B_BS#0<6>
M_B_BS#1<6>
M_B_BS#2<6>
M_B_RAS#<6>
M_B_CAS#<6>
M_B_WE#<6>
M_B_DM[0..7]<6>
C271
C271
1.5pF_4
1.5pF_4
PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH
C64
C64
1.5pF_4
1.5pF_4
C71
C442
C442
180P_4
180P_4
C71
180P_4
180P_4
C70
C70
180P_4
180P_4
M_B_DQS[0..7]<6>
M_B_DQS#[0..7]<6>
C439
C439
180P_4
180P_4
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS0
M_B_DQS#0
M_B_DQS1
M_B_DQS#1
M_B_DQS2
M_B_DQS#2
M_B_DQS3
M_B_DQS#3
M_B_DQS4
M_B_DQS#4
M_B_DQS5
M_B_DQS#5
M_B_DQS6
M_B_DQS#6
M_B_DQS7
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
AA24
AA23
AD24
AE24
AA26
AA25
AD26
AE25
AC22
AD22
AE20
AF20
AF24
AF23
AC20
AD20
AD18
AE18
AC14
AD14
AF19
AC18
AF16
AF15
AF13
AC12
AB11
AE14
AF14
AF11
AD11
AB26
AE22
AC16
AD12
AC25
AC26
AF21
AF22
AE16
AD16
AF12
AE12
C11
A11
A14
B14
G11
E11
D12
A13
A15
A16
A19
A20
C14
D14
C18
D18
D20
A21
D24
C25
B20
C20
B24
C24
E23
E24
G25
G26
C26
D26
G23
G24
Y11
A12
B16
A22
E25
C12
B12
D16
C16
A24
A23
F26
E26
MEM:DATA
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7
MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7
Athlon 64 S1g2 SOCKET_638_PIN
Athlon 64 S1g2 SOCKET_638_PIN
Athlon 64 S1g2
Processor Socket
SOCKET_638_PIN
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7
G12
F12
H14
G14
H11
H12
C13
E13
H15
E15
E17
H17
E14
F14
C17
G17
G18
C19
D22
E20
E18
F18
B22
C23
F20
F22
H24
J19
E21
E22
H20
H22
Y24
AB24
AB22
AA21
W22
W21
Y22
AA22
Y20
AA20
AA18
AB18
AB21
AD21
AD19
Y18
AD17
W16
W14
Y14
Y17
AB17
AB15
AD15
AB13
AD13
Y12
W11
AB14
AA14
AB12
AA12
E12
C15
E19
F24
AC24
Y19
AB16
Y13
G13
H13
G16
G15
C22
C21
G22
G21
AD23
AC23
AB19
AB20
Y15
W15
W12
W13
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS#0
M_A_DQS1
M_A_DQS#1
M_A_DQS2
M_A_DQS#2
M_A_DQS3
M_A_DQS#3
M_A_DQS4
M_A_DQS#4
M_A_DQS5
M_A_DQS#5
M_A_DQS6
M_A_DQS#6
M_A_DQS7
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQ[0..63]<6>
To normal SODIMM socket
M_A_DM[0..7]<6>
M_A_DQS[0..7]<6>
M_A_DQS#[0..7]<6>
11
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
SizeDocument NumberRev
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Date:Sheet of
Date:Sheet of
A
B
C
D
Date:Sheet of
PROJECT :
AMD Griffin DDRII MEMORY I/F
AMD Griffin DDRII MEMORY I/F
AMD Griffin DDRII MEMORY I/F
Z05
Z05
Z05
334Monday, February 25, 2008
334Monday, February 25, 2008
E
334Monday, February 25, 2008
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5
LAYOUT: ROUTE VDDA TRACE APPROX.
50 mils WIDE (USE 2x25 mil TRACES TO
EXIT BALL FIELD) AND 500 mils LONG.
CPU_VDDA_RUN
+2.5V
L24
L24
BLM18PG330SN1D_6
15 MIL
3V_THM
C35
C35
.1U_4
.1U_4
C37
C37
2200P_4
2200P_4
BLM18PG330SN1D_6
C285
C285
100U-6.3V_3528
100U-6.3V_3528
+1.8VSUS
R165
R165
300_4
300_4
5
DD
CC
BB
AA
HTCPU_PWRGD<7>
HTCPU_STOP#<7>
HTCPU_RST#<7>
CPU_LDT_REQ#_CPU
CPU H/W MONITOR
2/20/08' Reserve 0 ohm
for CPU thermal issue
on C-test
+3V
R3947/F_6R3947/F_6
R404*0_4R404*0_4
CPU_THERMDA
10 mil trace /
10 mil space
C270
C270
4.7U_6
4.7U_6
R1620_4R1620_4
R1570_4R1570_4
R1600_4R1600_4
R1640_4R1640_4
Address 98H
U4G781U4G781
1
VCC
3
DXN
SMDATA
2
DXP
-OVT4GND
CPU_VDDA_RUN
-ALT
SMCLK
C208
C208
.22U_4
.22U_4
6
7
8
5
+1.8VSUS
+1.8VSUS
+1.8VSUS
KBSMDATCPU_THERMDC
KBSMCLK
C209
C209
3300P_4
3300P_4
R163
R163
300_4
300_4
CPU_HT_PWRGD
C531
C531
.1U_4
.1U_4
2/20/08' Implement on C-test
R158
R158
300_4
300_4
CPU_HT_LDTSTOP#
R161
R161
300_4
300_4
CPU_HT_RESET#
HTCPU_REQ#
+3V
R25
R25
2
10K_4
10K_4
1
Q32N7002EQ32N7002E
+3V
R36
R36
10K_4
10K_4
3
CPU_CLKP<7>
CPU_CLKN<7>
Close CPU Sockt
HTCPU_REQ#<7>
To SB GPIO
THERM_ALERT#<12>
To FAN
CPUFAN#_ON<23>
4
ATHLON Control and Debug
If AMD SI is not used, the SID pin can be left unconnected and SIC
should have a 390- (5%) pulldown to VSS.
+1.8VSUS
CPU_CLKP
CPU_CLKN
+3V
R24
R24
4.7K_4
4.7K_4
1
+3V
R23
R23
4.7K_4
4.7K_4
1
4
∮
R261390_4R261390_4
R262390_4R262390_4
R263*390_4R263*390_4
R264*1K/F_4R264*1K/F_4
C4483900P_4C4483900P_4
C4493900P_4C4493900P_4
Keep trace from resisor to CPU within 0.6"
keep trace from caps to CPU within 1.2"
R329
R329
169/F_6
169/F_6
place them to CPU within 1.5"
R7344.2/F_4R7344.2/F_4
Q5
2N7002EQ52N7002E
Q4
2N7002EQ42N7002E
CPU_VDD0_FB_H<26>
CPU_VDD0_FB_L<26>
CPU_VDD1_FB_H<26>
CPU_VDD1_FB_L<26>
+1.8VSUS
3
3
R7244.2/F_4R7244.2/F_4
R402
R402
*510/F_4
*510/F_4
R403
R403
*510/F_4
*510/F_4
MBDATA_CPU<22>
MBCLK_CPU<22>
T63T63
T55T55
2
VLDT_RUN
2
CPU_SID
CPU_SIC
CPU_ALERT
T79T79
T44T44
T51T51
T83T83
T85T85
T82T82
T74T74
T81T81
T84T84
R1680_4R1680_4
CPU_SID<12>
CPU_SIC<12>
CPU_VDDA_RUN
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
CPU_HT_RESET#
CPU_HT_PWRGD
CPU_HT_LDTSTOP#
CPU_LDT_REQ#_CPU
CPU_SIC
CPU_SID
CPU_ALERT CPU_THERMDC
CPU_HTREF0
CPU_HTREF1
CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI
CPU_TEST23_TSTUPD
CPU_TEST18_PLLTEST1
CPU_TEST19_PLLTEST0
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST21_SCANEN
CPU_TEST20_SCANCLK2
CPU_TEST24_SCANCLK1
CPU_TEST22_SCANSHIFTEN
CPU_TEST12_SCANSHIFTENB
CPU_TEST27_SINGLECHAIN
CPU_TEST9_ANALOGIN
3
F8
F9
A9
A8
B7
A7
F10
C6
AF4
AF5
AE6
R6
P6
F6
E6
Y6
AB6
G10
AA9
AC9
AD9
AF9
AD7
H10
G9
E9
E8
AB8
AF7
AE7
AE8
AC8
AF8
C2
AA6
A3
A5
B3
B5
C1
CPU_TEST27_SINGLECHAIN
CPU_TEST12_SCANSHIFTENB
CPU_TEST14_BP0
CPU_TEST15_BP1
CPU_TEST18_PLLTEST1
CPU_TEST19_PLLTEST0
CPU_TEST20_SCANCLK2
CPU_TEST21_SCANEN
CPU_TEST22_SCANSHIFTEN
CPU_TEST24_SCANCLK1
3
U14D
U14D
VDDA1
VDDA2
CLKIN_H
CLKIN_L
RESET_L
PWROK
LDTSTOP_L
LDTREQ_L
SIC
SID
ALERT_L
HT_REF0
HT_REF1
VDD0_FB_H
VDD0_FB_L
VDD1_FB_H
VDD1_FB_L
DBRDY
TMS
TCK
TRST_L
TDI
TEST23
TEST18
TEST19
TEST25_H
TEST25_L
TEST21
TEST20
TEST24
TEST22
TEST12
TEST27
TEST9
TEST6
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
Athlon 64 S1g2 SOCKET_638_PIN
Athlon 64 S1g2 SOCKET_638_PIN
Athlon 64 S1g2
Processor Socket
SOCKET_638_PIN
KEY1
KEY2
THERMTRIP_L
PROCHOT_L
MEMHOT_L
THERMDC
THERMDA
VDDIO_FB_H
VDDIO_FB_L
VDDNB_FB_H
VDDNB_FB_L
DBREQ_L
TEST28_H
TEST28_L
TEST17
TEST16
TEST15
TEST14
TEST7
TEST10
TEST8
TEST29_H
TEST29_L
RSVD10
RSVD9
RSVD8
RSVD7
RSVD6
M11
W18
A6
SVC
A4
SVD
AF6
AC7
AA8
W7
W8
W9
Y9
H6
G6
E10
AE9
TDO
J7
H8
D7
E7
F7
C7
C3
K8
C4
C9
C8
H18
H19
AA7
D5
C5
R392*300_4R392*300_4
R393*300_4R393*300_4
R394*300_4R394*300_4
R395*300_4R395*300_4
R396*300_4R396*300_4
R397*300_4R397*300_4
R398*300_4R398*300_4
R399300_4R399300_4
R400*300_4R400*300_4
R401300_4R401300_4
CPU_SVC_R
CPU_SVD_R
CPU_THERMTRIP#
CPU_PROCHOT#
CPU_MEMHOT#
CPU_THERMDA
CPU_DBREQ#
CPU_TDO
CPU_TEST28_H_PLLCHRZ_P
CPU_TEST28_L_PLLCHRZ_N
CPU_TEST17_BP3
CPU_TEST16_BP2
CPU_TEST15_BP1
CPU_TEST14_BP0
CPU_TEST29_H_FBCLKOUT_P
CPU_TEST29_L_FBCLKOUT_N
+1.8VSUS
2/20/08' Mount
300 ohm on C-test
2
VDDIO_FB_H<29>
T14T14
CPU_VDDNB_RUN_FB_H<26>
CPU_VDDNB_RUN_FB_L<26>
route as differential
T45T45
as short as possible
T42T42
testpoint under package
T61T61
T62T62
T56T56
T52T52
T53T53
T60T60
+1.8VSUS
R268 *220_4R268 *220_4
R267 *220_4R267 *220_4
CPU_HT_RESET#
2
+1.8VSUS
R250
R250
300_4
300_4
CPU_THERMTRIP#
CPU_PROCHOT#
CPU_SVC_R
CPU_SVD_R
HTCPU_PWRGD
VFIX MODE
SVCSVDVoltage Output(CPU Power)
00
0
1
2/20/08' Mount 300 ohm
on C-test
R107 *220_4R107 *220_4
R254 *220_4R254 *220_4
+1.8VSUS +3V
R174
R174
10K_4
10K_4
2
1 3
Q14
Q14
MMBT3904
MMBT3904
11
HDT CONNECTOR
R148 300_4R148 300_4
CPU_DBREQ#
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO
R172
R172
1K/F_4
1K/F_4
H_HTCPU_RST#
1
+1.8V
R50
R50
330_4
330_4
+1.8VSUS
CPU_MEMHOT#
2
1 3
R490_4R490_4
+1.8V
R252
R252
300_4
300_4
R251*0_4R251*0_4
+1.8V+1.8VSUS
R255
R255
*300_4
*300_4
R55*4.7K_4R55*4.7K_4
R58
R58
*4.7K_4
*4.7K_4
Q8
MMBT3904Q8MMBT3904
R70
R70
330_4
330_4
Q24
Q24
2
MMBT3904
MMBT3904
13
R67
R67
*330_4
*330_4
Q23
Q23
2
*MMBT3904
*MMBT3904
13
PWROK_EC<12,22>
THERM_SYS_PWR<25,30>
MCP77_THERMIP#<7>
EC_PROCHOT#<22>
MCP77_PROCHOT#<7>
CPUMEMHOT#<22>
VID Override Circuit
+1.8VSUS
R167
R167
R155
R155
1K_4
1K_4
1K_4
1K_4
R1590_4R1590_4
R1500_4R1500_4
R1710_4R1710_4
R166
R166
*220_4
*220_4
1
0
*ASP-68200-07-25P-LDV
*ASP-68200-07-25P-LDV
1
3
5
T59T59
7
T46T46
9
T78T78
11
T19T19
13
T80T80
15
T86T86
17
+1.8VSUS
T77T77
19
21
23
T64T64
SizeDocument NumberRev
SizeDocument NumberRev
SizeDocument NumberRev
AMD Griffin CTRL & DEBUG
AMD Griffin CTRL & DEBUG
AMD Griffin CTRL & DEBUG
Date:Sheet of
Date:Sheet of
Date:Sheet of
Serial VID Clock
CPU SVC<26>
Serial VID Data
CPU SVD<26>
CPU_PWRGD_SVID<26>
R156
R156
*220_4
*220_4
1.4V
1.2V
1.0V
0.8V
HDTGND
CN6
CN6
GND1
RSVD1
RSVD0
DBREQ_L
DBRDY
TCK
TMS
TDI
TRST_L
TDO
VCC_PROC_IO_21
VCC_PROC_IO_23
KEY
KEY
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
GND2
GND4
GND6
GND8
GND10
GND12
GND14
GND16
GND18
GND20
GND22
RESET_L
GND26
Z05
Z05
Z05
2
4
6
8
10
12
14
16
18
20
22
24
25
434Monday, February 25, 2008
434Monday, February 25, 2008
434Monday, February 25, 2008
1A
1A
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PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com
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B
C
D
E
PROCESSOR POWER AND GROUND
44
U14F
U14F
AA4
VSS1
AA11
VSS2
AA13
CPU_CORE0 CPU_CORE1
33
CPU_VDDNB_RUN
+1.8VSUS
22
A1
AMD S1g2
Griffin
U14E
U14E
G4
VDD0_1
H2
VDD0_2
J9
VDD0_3
J11
VDD0_4
J13
VDD0_5
J15
VDD0_6
K6
VDD0_7
K10
VDD0_8
K12
VDD0_9
K14
VDD0_10
L4
VDD0_11
L7
VDD0_12
L9
VDD0_13
L11
VDD0_14
L13
VDD0_15
L15
VDD0_16
M2
VDD0_17
M6
VDD0_18
M8
VDD0_19
M10
VDD0_20
N7
VDD0_21
N9
VDD0_22
N11
VDD0_23
K16
VDDNB_1
M16
VDDNB_2
P16
VDDNB_3
T16
VDDNB_4
V16
VDDNB_5
H25
VDDIO1
J17
VDDIO2
K18
VDDIO3
K21
VDDIO4
K23
VDDIO5
K25
VDDIO6
L17
VDDIO7
M18
VDDIO8
M21
VDDIO9
M23
VDDIO10
M25
VDDIO11
N17
VDDIO12
Athlon 64 S1g2 SOCKET_638_PIN
Athlon 64 S1g2 SOCKET_638_PIN
Athlon 64 S1g2
Processor Socket
SOCKET_638_PIN
A26
VDD1_1
VDD1_2
VDD1_3
VDD1_4
VDD1_5
VDD1_6
VDD1_7
VDD1_8
VDD1_9
VDD1_10
VDD1_11
VDD1_12
VDD1_13
VDD1_14
VDD1_15
VDD1_16
VDD1_17
VDD1_18
VDD1_19
VDD1_20
VDD1_21
VDD1_22
VDD1_23
VDD1_24
VDD1_25
VDD1_26
VDDIO27
VDDIO26
VDDIO25
VDDIO24
VDDIO23
VDDIO22
VDDIO21
VDDIO20
VDDIO19
VDDIO18
VDDIO17
VDDIO16
VDDIO15
VDDIO14
VDDIO13
P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
U15
V6
V8
V10
V12
V14
W4
Y2
AC4
AD2
Y25
V25
V23
V21
V18
U17
T25
T23
T21
T18
R17
P25
P23
P21
P18
+1.8VSUS
VSS3
AA15
VSS4
AA17
VSS5
AA19
VSS6
AB2
VSS7
AB7
VSS8
AB9
VSS9
AB23
VSS10
AB25
VSS11
AC11
VSS12
AC13
VSS13
AC15
VSS14
AC17
VSS15
AC19
VSS16
AC21
VSS17
AD6
VSS18
AD8
VSS19
AD25
VSS20
AE11
VSS21
AE13
VSS22
AE15
VSS23
AE17
VSS24
AE19
VSS25
AE21
VSS26
AE23
VSS27
B4
VSS28
B6
VSS29
B8
VSS30
B9
VSS31
B11
VSS32
B13
VSS33
B15
VSS34
B17
VSS35
B19
VSS36
B21
VSS37
B23
VSS38
B25
VSS39
D6
VSS40
D8
VSS41
D9
VSS42
D11
VSS43
D13
VSS44
D15
VSS45
D17
VSS46
D19
VSS47
D21
VSS48
D23
VSS49
D25
VSS50
E4
VSS51
F2
VSS52
F11
VSS53
F13
VSS54
F15
VSS55
F17
VSS56
F19
VSS57
F21
VSS58
F23
VSS59
F25
VSS60
H7
VSS61
H9
VSS62
H21
VSS63
H23
VSS64
J4
VSS65
Athlon 64 S1g2 SOCKET_638_PIN
Athlon 64 S1g2 SOCKET_638_PIN
Athlon 64 S1g2
Processor Socket
SOCKET_638_PIN
uPGA638
11
Top View
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
AC6
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6
+1.8VSUS
C82
C82
4.7U_6
4.7U_6
CPU_CORE0
C179
C179
22U-6.3V_8
22U-6.3V_8
CPU_CORE1
CPU_VDDNB_RUN
C112
C112
22U-6.3V_8
22U-6.3V_8
C140
C140
4.7U_6
4.7U_6
C189
C162
C162
22U-6.3V_8
22U-6.3V_8
C190
C190
.22U_4
.22U_4
C181
C181
.01U_4
.01U_4
C189
180P_4
180P_4
2/22/08' Del C121, C107, C147 and C163
C138
C138
C102
C136
C136
22U-6.3V_8
22U-6.3V_8
C159
C159
22U-6.3V_8
22U-6.3V_8
C142
C142
22U-6.3V_8
22U-6.3V_8
C86
C86
22U-6.3V_8
22U-6.3V_8
C96
C96
.22U_4
.22U_4
.01U_4
.01U_4
C102
180P_4
180P_4
DECOUPLING BETWEEN PROCESSOR AND DIMMs
PLACE CLOSE TO PROCESSOR AS POSSIBLE
C206
C80
C80
4.7U_6
4.7U_6
C98
C98
4.7U_6
4.7U_6
C199
C199
.22U_4
.22U_4
C200
C200
.22U_4
.22U_4
C206
.22U_4
.22U_4
C151
C151
.22U_4
.22U_4
C178
C178
.22U_4
.22U_4
C194
C194
.22U_4
.22U_4
C164
C164
.01U_4
.01U_4
C145
C145
.01U_4
.01U_4
C113
C113
180P_4
180P_4
AF1
A
B
C
PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
SizeDocument NumberRev
SizeDocument NumberRev
SizeDocument NumberRev
Date:Sheet of
Date:Sheet of
D
Date:Sheet of
PROJECT :
AMD Griffin PWR & GND
AMD Griffin PWR & GND
AMD Griffin PWR & GND
Z05
Z05
Z05
1A
1A
534Monday, February 25, 2008
534Monday, February 25, 2008
534Monday, February 25, 2008
E
1A
A
B
C
D
E
A0
A1
VDD081VDD182VDD287VDD388VDD495VDD596VDD6
A2
A3
A4
A5
A6
A7
A8
A9
REVERSE
A10
A11
A12
A13
A14
A15
BA0
BA1
BA2
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
CK0
CK0
CK1
CK1
CKE0
CKE1
RAS
CAS
WE
S0
S1
ODT0
ODT1
SA0
SA1
SDA
SCL
VDDspd
VREF
VSS0
(H=9.2)
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
59
+1.8VSUS
J1
J1
103
111
104
112
VDD8
VDD7
VDD9
SO-DIMM
SO-DIMM
VSS30
VSS29
VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21
122
121
117
118
5
DQ0
7
DQ1
17
VDD10
VDD11
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
DQ10
37
DQ11
20
DQ12
22
DQ13
36
DQ14
38
DQ15
43
DQ16
45
DQ17
55
DQ18
57
DQ19
44
DQ20
46
DQ21
56
DQ22
58
DQ23
61
DQ24
63
DQ25
73
DQ26
75
DQ27
62
DQ28
64
DQ29
74
DQ30
76
DQ31
123
DQ32
125
DQ33
135
DQ34
137
DQ35
124
DQ36
126
DQ37
134
DQ38
136
DQ39
141
DQ40
143
DQ41
151
DQ42
153
DQ43
140
DQ44
142
DQ45
152
DQ46
154
DQ47
157
DQ48
159
DQ49
173
DQ50
175
DQ51
158
DQ52
160
DQ53
174
DQ54
176
DQ55
179
DQ56
181
DQ57
189
DQ58
191
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
50
NC1
69
NC2
83
NC3
120
NC4
163
NC/TEST
196
VSS56
193
VSS55
190
VSS54
187
VSS53
184
VSS52
183
VSS51
178
VSS50
177
VSS49
172
VSS48
171
VSS47
168
VSS46
165
VSS45
162
VSS44
161
VSS43
156
VSS42
155
VSS41
150
VSS40
149
VSS39
145
VSS38
144
VSS37
139
VSS36
138
VSS35
133
VSS34
VSS33
VSS32
VSS31
132
128
127
DDRII_SODIMM_R H9.2
DDRII_SODIMM_R H9.2
M_B_DQ4
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ5
M_B_DQ0
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ15
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ11
M_B_DQ16
M_B_DQ21
M_B_DQ19
M_B_DQ23
M_B_DQ20
M_B_DQ17
M_B_DQ18
M_B_DQ22
M_B_DQ29
M_B_DQ28
M_B_DQ26
M_B_DQ27
M_B_DQ24
M_B_DQ25
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ36
M_B_DQ39
M_B_DQ35
M_B_DQ33
M_B_DQ37
M_B_DQ34
M_B_DQ38
M_B_DQ40
M_B_DQ41
M_B_DQ46
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ47
M_B_DQ42
M_B_DQ53
M_B_DQ49
M_B_DQ54
M_B_DQ50
M_B_DQ48
M_B_DQ52
M_B_DQ55
M_B_DQ51
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ59
M_B_DQ57
M_B_DQ56
M_B_DQ63
M_B_DQ58
T58T58
T49T49
T3T3
M_B_DQ[0..63]<3>
M_A_CKE0
M_A_A12
M_A_ODT0
M_A_A13
M_B_CS#0
M_B_A2
M_A_BS#1
M_A_A0
M_A_BS#2
M_A_CAS#
M_A_ODT1
M_A_RAS#
M_A_CS#0
M_A_CS#1
M_B_A13
M_B_ODT0
M_B_BS#1
M_B_A0
M_B_BS#2
M_B_CAS#
M_B_WE#
M_B_RAS#
M_B_ODT1
M_B_CS#1
M_A_WE#
M_A_BS#0
M_A_A10
M_A_A4
M_A_A6
M_A_A7
M_A_A11
M_A_A14
M_A_A9
M_A_A2
M_A_A1
M_A_A3
M_A_A8
M_A_A5
M_A_CKE1
M_A_A15
M_B_A4
M_B_A6
M_B_A7
M_B_A11
M_B_A15
M_B_A14
M_B_A1
M_B_A3
M_B_A8
M_B_A5
M_B_A12
M_B_A9
M_B_A10
M_B_BS#0
M_B_CKE0
M_B_CKE1
MSMB_DATA<12>
MSMB_CLK<12>
+SMDDR_VTERM
RP2547X2_4RP2547X2_4
1 2
3 4
RP747X2_4RP747X2_4
1 2
3 4
RP547X2_4RP547X2_4
1 2
3 4
RP1347X2_4RP1347X2_4
1 2
3 4
R14247_4R14247_4
RP647X2_4RP647X2_4
1 2
3 4
R12847_4R12847_4
R12047_4R12047_4
R11747_4R11747_4
RP347X2_4RP347X2_4
1 2
3 4
RP1147X2_4RP1147X2_4
1 2
3 4
R13747_4R13747_4
RP847X2_4RP847X2_4
3 4
1 2
R12547_4R12547_4
RP447X2_4RP447X2_4
3 4
1 2
RP947X2_4RP947X2_4
1 2
3 4
RP1847X2_4RP1847X2_4
1 2
3 4
RP2247X2_4RP2247X2_4
1 2
3 4
RP2647X2_4RP2647X2_4
3 4
1 2
RP2147X2_4RP2147X2_4
1 2
3 4
RP1247X2_4RP1247X2_4
1 2
3 4
RP1747X2_4RP1747X2_4
1 2
3 4
RP2847X2_4RP2847X2_4
3 4
1 2
47X2_4
47X2_4
1 2
RP15
RP15
3 4
47X2_4
47X2_4
1 2
RP20
RP20
3 4
47X2_4
47X2_4
1 2
RP24
RP24
3 4
47X2_4
47X2_4
1 2
RP14
RP14
3 4
47X2_4
47X2_4
1 2
RP19
RP19
3 4
47X2_4
47X2_4
1 2
RP23
RP23
3 4
47X2_4
47X2_4
1 2
RP10
RP10
3 4
47X2_4
47X2_4
3 4
RP27
RP27
1 2
+3V
3
R620_4R620_4
+3V
3
R660_4R660_4
2
2
Q11
Q11
*2N7002E
*2N7002E
Q10
Q10
*2N7002E
*2N7002E
1
1
+SMDDR_VTERM
2
4
RP2
RP2
*4.7KX2_4
*4.7KX2_4
1
3
MEM_SMBDAT
MEM_SMBCLK
*10U-6.3V_8C83 *10U-6.3V_8C83
*10U-6.3V_8C101 *10U-6.3V_8C101
.1U_4C139 .1U_4C139
.1U_4C99 .1U_4C99
.1U_4C167 .1U_4C167
.1U_4C258 .1U_4C258
.1U_4C134 .1U_4C134
.1U_4C251 .1U_4C251
.1U_4C245 .1U_4C245
.1U_4C114 .1U_4C114
.1U_4C229 .1U_4C229
*.1U_4C132 *.1U_4C132
*.1U_4C103 *.1U_4C103
.1U_4C118 .1U_4C118
.1U_4C237 .1U_4C237
.1U_4C255 .1U_4C255
.1U_4C239 .1U_4C239
.1U_4C241 .1U_4C241
*.1U_4C240 *.1U_4C240
.1U_4C135 .1U_4C135
.1U_4C116 .1U_4C116
.1U_4C256 .1U_4C256
*.1U_4C117 *.1U_4C117
.1U_4C252 .1U_4C252
.1U_4C250 .1U_4C250
.1U_4C106 .1U_4C106
*.1U_4C105 *.1U_4C105
D20
D20
*DA204U
*DA204U
3
D21
D21
*DA204U
*DA204U
3
+1.8VSUS
*10U-6.3V_8C410 *10U-6.3V_8C410
*10U-6.3V_8C425 *10U-6.3V_8C425
C23522U-6.3V_8C23522U-6.3V_8
C12022U-6.3V_8C12022U-6.3V_8
.1U_4C126 .1U_4C126
.1U_4C158 .1U_4C158
.1U_4C220 .1U_4C220
.1U_4C421 .1U_4C421
.1U_4C198 .1U_4C198
.1U_4C218 .1U_4C218
.1U_4C88 .1U_4C88
.1U_4C127 .1U_4C127
.1U_4C226 .1U_4C226
.1U_4C175 .1U_4C175
.1U_4C89 .1U_4C89.1U_4C108 .1U_4C108
.1U_4C186 .1U_4C186
.1U_4C413 .1U_4C413
.1U_4C419 .1U_4C419
.1U_4C238 .1U_4C238
.1U_4C160 .1U_4C160
.1U_4C191 .1U_4C191
.1U_4C415 .1U_4C415
.1U_4C204 .1U_4C204
.1U_4C153 .1U_4C153
+1.8VSUS
+3V
1
2
+3V
1
2
+SMDDR_VTERM
.1U_4C187 .1U_4C187
.1U_4C173 .1U_4C173
.1U_4C155 .1U_4C155
.1U_4C125 .1U_4C125
.1U_4C254 .1U_4C254
.1U_4C143 .1U_4C143
.1U_4C232 .1U_4C232
.1U_4C221 .1U_4C221
.1U_4C183 .1U_4C183
.1U_4C195 .1U_4C195
.1U_4C161 .1U_4C161
.1U_4C211 .1U_4C211
*.1U_4C219 *.1U_4C219
*.1U_4C79 *.1U_4C79
*.1U_4C234 *.1U_4C234
+1.8VSUS
103
111
104
112
117
M_A_A[0..15]<3>
44
M_A_BS#0<3>
M_A_BS#1<3>
M_A_BS#2<3>
M_A_DM[0..7]<3>
+1.8VSUS
+3V
M_A_DQS[0..7]<3>
M_A_DQS#[0..7]<3>
C294.1U_4C294.1U_4
M_A_CLKOUT1#<3>
M_A_CLKOUT7#<3>
M_A_CLKOUT1<3>
M_A_CLKOUT7<3>
1 2
M_A_CKE0<3>
M_A_CKE1<3>
M_A_RAS#<3>
M_A_CAS#<3>
M_A_WE#<3>
M_A_CS#0<3>
M_A_CS#1<3>
M_A_ODT0<3>
M_A_ODT1<3>
MVREF_DIM
C291
C291
2.2U_6
2.2U_6
33
22
11
MEM_SMBDAT
MEM_SMBCLK
C57.1U_4C57.1U_4
C292
C292
.1U_4
.1U_4
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
107
106
85
10
26
52
67
130
147
170
185
13
31
51
70
131
148
169
188
11
29
49
68
129
146
167
186
30
32
164
166
79
80
108
113
109
110
115
114
119
198
200
195
197
199
1
2
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
A0
A1
VDD081VDD182VDD287VDD388VDD495VDD596VDD6
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
BA0
BA1
BA2
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
CK0
CK0
CK1
CK1
CKE0
CKE1
RAS
CAS
WE
S0
S1
ODT0
ODT1
SA0
SA1
SDA
SCL
VDDspd
VREF
VSS0
VSS1
(H=5.2)
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
59
REVERSE
118
M_A_DQ1
5
DQ0
M_A_DQ5
7
DQ1
VDD11
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
NC1
NC2
NC3
NC4
NC/TEST
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
132
128
DDRII_SODIMM_R H5.2
DDRII_SODIMM_R H5.2
M_A_DQ2
17
M_A_DQ3
19
M_A_DQ0
4
M_A_DQ4
6
M_A_DQ7
14
M_A_DQ6
16
M_A_DQ8
23
M_A_DQ13
25
M_A_DQ10
35
M_A_DQ14
37
M_A_DQ12
20
M_A_DQ9
22
M_A_DQ15
36
M_A_DQ11
38
M_A_DQ20
43
M_A_DQ21
45
M_A_DQ23
55
M_A_DQ18
57
M_A_DQ19
44
M_A_DQ17
46
M_A_DQ22
56
M_A_DQ16
58
M_A_DQ29
61
M_A_DQ28
63
M_A_DQ31
73
M_A_DQ26
75
M_A_DQ25
62
M_A_DQ24
64
M_A_DQ30
74
M_A_DQ27
76
M_A_DQ38
123
M_A_DQ36
125
M_A_DQ35
135
M_A_DQ37
137
M_A_DQ32
124
M_A_DQ33
126
M_A_DQ34
134
M_A_DQ39
136
M_A_DQ45
141
M_A_DQ44
143
M_A_DQ42
151
M_A_DQ46
153
M_A_DQ41
140
M_A_DQ40
142
M_A_DQ43
152
M_A_DQ47
154
M_A_DQ52
157
M_A_DQ49
159
M_A_DQ50
173
M_A_DQ55
175
M_A_DQ53
158
M_A_DQ48
160
M_A_DQ54
174
M_A_DQ51
176
M_A_DQ56
179
M_A_DQ60
181
M_A_DQ59
189
M_A_DQ58
191
M_A_DQ57
180
M_A_DQ61
182
M_A_DQ63
192
M_A_DQ62
194
50
T57T57
69
83
120
163
196
193
190
187
184
183
178
177
172
171
168
165
162
161
156
155
150
149
145
144
139
138
133
+1.8VSUS
+SMDDR_VREF
R180
R180
*0_4
*0_4
C293
C293
1U_4
1U_4
VDD8
VDD7
VDD9
VDD10
J2
J2
SO-DIMM
SO-DIMM
VSS31
VSS30
VSS29
VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21
127
122
121
M_A_DQ[0..63]<3>
C296.1U_4C296.1U_4
+1.8VSUS
MVREF_DIM
M_B_A[0..15]<3>
M_B_BS#0<3>
M_B_BS#1<3>
M_B_BS#2<3>
M_B_DM[0..7]<3>
M_B_DQS[0..7]<3>
M_B_DQS#[0..7]<3>
M_B_CLKOUT1<3>
M_B_CLKOUT1#<3>
M_B_CLKOUT7<3>
M_B_CLKOUT7#<3>
M_B_CKE0<3>
M_B_CKE1<3>
M_B_RAS#<3>
M_B_CAS#<3>
M_B_WE#<3>
M_B_CS#0<3>
M_B_CS#1<3>
M_B_ODT0<3>
M_B_ODT1<3>
+3V
+3V
C298
C298
2.2U_6
2.2U_6
1 2
R179
R179
1K/F_4
1K/F_4
R178
R178
1K/F_4
1K/F_4
R6510K_4R6510K_4
R630_4R630_4
MEM_SMBDAT
MEM_SMBCLK
C54.1U_4C54.1U_4
MVREF_DIM
C295
C295
.1U_4
.1U_4
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
107
106
85
10
26
52
67
130
147
170
185
13
31
51
70
131
148
169
188
11
29
49
68
129
146
167
186
30
32
164
166
79
80
108
113
109
110
115
114
119
198
200
195
197
199
1
2
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
A
B
C
PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
SizeDocument NumberRev
SizeDocument NumberRev
SizeDocument NumberRev
Date:Sheet of
Date:Sheet of
D
Date:Sheet of
PROJECT :
DDR-II SODIMM*2
DDR-II SODIMM*2
DDR-II SODIMM*2
Z05
Z05
Z05
634Monday, February 25, 2008
634Monday, February 25, 2008
E
634Monday, February 25, 2008
1A
1A
1A
5
4
3
2
1
HT_TXD[15..0]<2>
HT_TXD#[15..0]<2>
U15A
U15A
FCBGA836-NVIDIA-MCP67
FCBGA836-NVIDIA-MCP67
DD
CC
HT_CPU_DWNCLK0<2>
HT_CPU_DWNCLK#0<2>
HT_CPU_DWNCLK1<2>
HT_CPU_DWNCLK#1<2>
HT_CPU_DWNCTL0<2>
HT_CPU_DWNCTL#0<2>
HT_CPU_DWNCTL1<2>
HT_CPU_DWNCTL#1<2>
MCP77_THERMIP#<4>
MCP77_PROCHOT#<4>
+1.1V_HT_PLL
L15TI160808U300_6L15TI160808U300_6
C1922.2U_4C1922.2U_4
C1744.7U_6C1744.7U_6
L55TI160808U300_6L55TI160808U300_6
C1492.2U_4C1492.2U_4
C41410U-6.3V_8C41410U-6.3V_8
L57TI160808U300_6L57TI160808U300_6
C1462.2U_4C1462.2U_4
C4224.7U_6C4224.7U_6
R316150/F_4R316150/F_4
R310150/F_4R310150/F_4
R1470_4R1470_4
C244.1U_4C244.1U_4
R1432.37K/F_4R1432.37K/F_4
70mA
BB
128mA
17mA
+3V
+1.1V_NB
+1.1V_NB
+1.1V_NB
HT_TXD0
HT_TXD#0
HT_TXD1
HT_TXD#1
HT_TXD2
HT_TXD#2
HT_TXD3
HT_TXD#3
HT_TXD4
HT_TXD#4
HT_TXD5
HT_TXD#5
HT_TXD6
HT_TXD#6
HT_TXD7
HT_TXD#7
HT_TXD8
HT_TXD#8
HT_TXD9
HT_TXD#9
HT_TXD10
HT_TXD#10
HT_TXD11
HT_TXD#11
HT_TXD12
HT_TXD#12
HT_TXD13
HT_TXD#13
HT_TXD14
HT_TXD#14
HT_TXD15
HT_TXD#15
MCP77_THERMIP#
MCP77_PROCHOT#
+3.3V_PLL_HT
+1.1V_HT_PLL
+1.1V_PLL_CPU
HTMCP_COMP_VDD
HTMCP_COMP_GND
CPU_SBVREF
MCP77_CTERM_GND
AF16
AG16
AH16
AJ16
AJ15
AK15
AK16
AL16
AG17
AF17
AL17
AK17
AL18
AK18
AJ19
AK19
AD14
AE14
AF14
AG14
AH14
AJ14
AL13
AK13
AC15
AD15
AD16
AE16
AE17
AD17
AB17
AC17
AJ17
AH17
AL14
AK14
AH19
AG19
AC18
AD18
AC13
AB13
AB15
AB16
AM12
AL12
AG28
AJ28
R13
HT_MCP_RXD0_P
HT_MCP_RXD0_N
HT_MCP_RXD1_P
HT_MCP_RXD1_N
HT_MCP_RXD2_P
HT_MCP_RXD2_N
HT_MCP_RXD3_P
HT_MCP_RXD3_N
HT_MCP_RXD4_P
HT_MCP_RXD4_N
HT_MCP_RXD5_P
HT_MCP_RXD5_N
HT_MCP_RXD6_P
HT_MCP_RXD6_N
HT_MCP_RXD7_P
HT_MCP_RXD7_N
HT_MCP_RXD8_P
HT_MCP_RXD8_N
HT_MCP_RXD9_P
HT_MCP_RXD9_N
HT_MCP_RXD10_P
HT_MCP_RXD10_N
HT_MCP_RXD11_P
HT_MCP_RXD11_N
HT_MCP_RXD12_P
HT_MCP_RXD12_N
HT_MCP_RXD13_P
HT_MCP_RXD13_N
HT_MCP_RXD14_P
HT_MCP_RXD14_N
HT_MCP_RXD15_P
HT_MCP_RXD15_N
HT_MCP_RX_CLK0_P
HT_MCP_RX_CLK0_N
HT_MCP_RX_CLK1_P
HT_MCP_RX_CLK1_N
HT_MCP_RXCTL0_P
HT_MCP_RXCTL0_N
HT_MCP_RXCTL1_P
HT_MCP_RXCTL1_N
THERMTRIP#/GPIO_58
PROCHOT#/GPIO_20
+3.3V_DLL_HT
+1.1V_PLL_HT
+1.1V_PLL_CPU
HT_MCP_COMP_VDD
HT_MCP_COMP_GND
CPU_SBVREF
CLK200_TERM_GND
AJMCP770T02
SEC 1 OF 8
SEC 1 OF 8
HT
HT
HT_MCP_TXD0_P
HT_MCP_TXD0_N
HT_MCP_TXD1_P
HT_MCP_TXD1_N
HT_MCP_TXD2_P
HT_MCP_TXD2_N
HT_MCP_TXD3_P
HT_MCP_TXD3_N
HT_MCP_TXD4_P
HT_MCP_TXD4_N
HT_MCP_TXD5_P
HT_MCP_TXD5_N
HT_MCP_TXD6_P
HT_MCP_TXD6_N
HT_MCP_TXD7_P
HT_MCP_TXD7_N
HT_MCP_TXD8_P
HT_MCP_TXD8_N
HT_MCP_TXD9_P
HT_MCP_TXD9_N
HT_MCP_TXD10_P
HT_MCP_TXD10_N
HT_MCP_TXD11_P
HT_MCP_TXD11_N
HT_MCP_TXD12_P
HT_MCP_TXD12_N
HT_MCP_TXD13_P
HT_MCP_TXD13_N
HT_MCP_TXD14_P
HT_MCP_TXD14_N
HT_MCP_TXD15_P
HT_MCP_TXD15_N
HT_MCP_TX_CLK0_P
HT_MCP_TX_CLK0_N
HT_MCP_TX_CLK1_P
HT_MCP_TX_CLK1_N
HT_MCP_TXCTL0_P
HT_MCP_TXCTL0_N
HT_MCP_TXCTL1_P
HT_MCP_TXCTL1_N
HT_MCP_REQ#
HT_MCP_STOP#
HT_MCP_RST#
HT_MCP_PWRGD
CLKOUT_200MHZ_P
CLKOUT_200MHZ_N
CLKOUT_25MHZ
+1.1V_HT_D1
+1.1V_HT_D2
+1.1V_HT_D3
+1.1V_HT_A1
+1.1V_HT_A2
+1.1V_HT_A3
+1.1V_HT_A4
HT_RXD[15..0]<2>
HT_RXD#[15..0]<2>
HT_RXD0
AK27
HT_RXD#0
AJ27
HT_RXD1
AK26
HT_RXD#1
AL26
HT_RXD2
AK25
HT_RXD#2
AL25
HT_RXD3
AL24
HT_RXD#3
AK24
HT_RXD4
AK22
HT_RXD#4
AL22
HT_RXD5
AK21
HT_RXD#5
AL21
HT_RXD6
AH21
HT_RXD#6
AJ21
HT_RXD7
AL20
HT_RXD#7
AM20
HT_RXD8
AG27
HT_RXD#8
AH27
HT_RXD9
AF25
HT_RXD#9
AG25
HT_RXD10
AH25
HT_RXD#10
AJ25
HT_RXD11
AE23
HT_RXD#11
AF23
HT_RXD12
AD21
HT_RXD#12
AE21
HT_RXD13
AF21
HT_RXD#13
AG21
HT_RXD14
AC20
HT_RXD#14
AD20
HT_RXD15
AE19
HT_RXD#15
AF19
AK23
AJ23
AG23
AH23
AK20
AJ20
AD19
AC19
HTCPU_REQ#
AD23
AB20
AC21
AD22
AL28
AM28
CLKOUT_25MHz
AK28
+1.1V_HT_D
Y15
Y17
Y16
V15
V16
W15
+1.1V_HT_A
W16
C148
C148
1U_4
1U_4
C170
C170
1U_4
1U_4
C156
C156
1U_4
1U_4
HT_CPU_UPCLK0<2>
HT_CPU_UPCLK#0<2>
HT_CPU_UPCLK1<2>
HT_CPU_UPCLK#1<2>
HT_CPU_UPCTL0<2>
HT_CPU_UPCTL#0<2>
HT_CPU_UPCTL1<2>
HT_CPU_UPCTL#1<2>
HTCPU_REQ#<4>
HTCPU_STOP#<4>
HTCPU_RST#<4>
HTCPU_PWRGD<4>
CPU_CLKP<4>
CPU_CLKN<4>
T108T108
C166
C166
C417
C417
1U_4
1U_4
4.7U_6
4.7U_6
C389
C389
C388
C388
4.7U_6
4.7U_6
4.7U_6
4.7U_6
MCP77_PROCHOT#
L56
L56
TI160808U300_6
TI160808U300_6
C418
C418
22U-6.3V_8
22U-6.3V_8
C387
C387
22U-6.3V_8
22U-6.3V_8
R287300_4R287300_4
+1.1V_NB
L49
L49
PBY201209T_8
PBY201209T_8
+1.8VSUS
800mA
+1.1V_NB
2370mA
AA
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
SizeDocument NumberRev
SizeDocument NumberRev
SizeDocument NumberRev
Date:Sheet of
Date:Sheet of
5
4
3
2
Date:Sheet of
PROJECT :
MCP77 HyperTransport Bus
MCP77 HyperTransport Bus
MCP77 HyperTransport Bus
Z05
Z05
Z05
1A
1A
734Monday, March 10, 2008
734Monday, March 10, 2008
734Monday, March 10, 2008
1
1A
PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com
5
DD
10mA
80mA
PCIE_WAKE#<15,17,22>
PCIE-LAN_RXP<15>
PCIE-LAN_RXN<15>
LAN_CLKREQ#<15>
PCIE-NEW_RXP<17>
PCIE-NEW_RXN<17>
NEW_CLKREQ#<17>
CPPE#<17>
PCIE-MINI1_RXP<17>
PCIE-MINI1_RXN<17>
MINI1_CLKREQ#<17>
+1.1V_NB +1.1V_PLLPE_SS
+1.1V_NB
+3.3V_PLL_HT
CC
[LAN]
[NEW CARD]
[MINI CARD-1]
BB
AA
5
T106T106
T107T107
T104T104
T105T105
D26BAS316D26BAS316
L19MLG1608B10NJ_6L19MLG1608B10NJ_6
C2604.7U_6C2604.7U_6
C1852.2U_4C1852.2U_4
L18MLG1608B10NJ_6L18MLG1608B10NJ_6
C2122.2U_4C2122.2U_4
C2594.7U_6C2594.7U_6
4
U15B
U15B
FCBGA836-NVIDIA-MCP67
FCBGA836-NVIDIA-MCP67
F23
PE0_RX0_P
G23
PE0_RX0_N
F24
PE0_RX1_P
F25
PE0_RX1_N
D25
PE0_RX2_P
D26
PE0_RX2_N
C28
PE0_RX3_P
D28
PE0_RX3_N
C29
PE0_RX4_P
C30
PE0_RX4_N
D29
PE0_RX5_P
D30
PE0_RX5_N
F26
PE0_RX6_P
F27
PE0_RX6_N
F28
PE0_RX7_P
F29
PE0_RX7_N
H23
PE0_RX8_P
H24
PE0_RX8_N
H25
PE0_RX9_P
H26
PE0_RX9_N
H27
PE0_RX10_P
H28
PE0_RX10_N
K24
PE0_RX11_P
K25
PE0_RX11_N
K27
PE0_RX12_P
K26
PE0_RX12_N
K28
PE0_RX13_P
K29
PE0_RX13_N
J31
PE0_RX14_P
J30
PE0_RX14_N
K31
PE0_RX15_P
K30
PE0_RX15_N
H17
W27
W28
U31
U30
U29
U28
L29
L30
M26
M27
U26
U27
N23
N22
U25
U24
N30
N31
R22
U23
P31
P30
T22
V31
P26
P27
U22
V30
U19
R20
R19
P20
V24
PE_WAKE#/GPIO_21
PE0_PRSNT_1#
PE0_PRSNT_4#
PE0_PRSNT_8#
PE0_PRSNT_16#
PE1_RX_P
PE1_RX_N
PEB_CLKREQ#
PEB_PRSNT#
PE2_RX_P
PE2_RX_N
PEC_CLKREQ#
PEC_PRSNT#
PE3_RX_P
PE3_RX_N
PED_CLKREQ#
PED_PRSNT#
PE4_RX_P
PE4_RX_N
PEE_CLKREQ#/GPIO_16
PEE_PRSNT#
PE5_RX_P
PE5_RX_N
PEF_CLKREQ#/GPIO_17
PEF_PRSNT#
PE6_RX_P
PE6_RX_N
PEG_CLKREQ#/GPIO_18
PEG_PRSNT#
+1.1V_PLL_PE_SS1
+1.1V_PLL_PE1
NC2/+1.2V_PLL_PE2
NC1/+3.3V_PLL_PE_SS2
PE_CLK_COMP
PE0_PRSNTX1
PE0_PRSNTX4
PE0_PRSNTX8
PE0_PRSNTX16
LAN_CLKREQ1#
NEW_CLKREQ#
CPPE#_R
MINI1_CLKREQ#
+1.1V_PLLPE_SS
+1.1V_PLLPE
+3.3V_PLL_HT
C141
C141
PE_CLK_COMP
.1U_4
.1U_4
R133
R133
*2.37K/F_4
*2.37K/F_4
<500mil
Remove R116 for Nvidia suggest.
For EMI
4
SEC 2 OF 8
SEC 2 OF 8
PCIE
PCIE
CLK_PCIE-LAN
CLK_PCIE-LAN#
CLK_PCIE_MINI1
CLK_PCIE_MINI1#
CLK_PCIE_NEW
CLK_PCIE_NEW#
3
C276*10P_4C276*10P_4
C277*10P_4C277*10P_4
C274*10P_4C274*10P_4
C275*10P_4C275*10P_4
C267*10P_4C267*10P_4
C266*10P_4C266*10P_4
3
PE0_TX0_P
PE0_TX0_N
PE0_TX1_P
PE0_TX1_N
PE0_TX2_P
PE0_TX2_N
PE0_TX3_P
PE0_TX3_N
PE0_TX4_P
PE0_TX4_N
PE0_TX5_P
PE0_TX5_N
PE0_TX6_P
PE0_TX6_N
PE0_TX7_P
PE0_TX7_N
PE0_TX8_P
PE0_TX8_N
PE0_TX9_P
PE0_TX9_N
PE0_TX10_P
PE0_TX10_N
PE0_TX11_P
PE0_TX11_N
PE0_TX12_P
PE0_TX12_N
PE0_TX13_P
PE0_TX13_N
PE0_TX14_P
PE0_TX14_N
PE0_TX15_P
PE0_TX15_N
PEA_REFCLK_P
PEA_REFCLK_N
PE1_TX_P
PE1_TX_N
PEB_REFCLK_P
PEB_REFCLK_N
PE2_TX_P
PE2_TX_N
PEC_REFCLK_P
PEC_REFCLK_N
PE3_TX_P
PE3_TX_N
PED_REFCLK_P
PED_REFCLK_N
PE4_TX_P
PE4_TX_N
PEE_REFCLK_P
PEE_REFCLK_N
PE5_TX_P
PE5_TX_N
PEF_REFCLK_P
PEF_REFCLK_N
PE6_TX6_P
PE6_TX6_N
PEG_REFCLK_P
PEG_REFCLK_N
+1.1V_PED_A1
+1.1V_PED_B1
+1.1V_PED_B2
+1.1V_PED_B3
+1.1V_PED_B4
+1.1V_PEA_A1
+1.1V_PEA_A2
+1.1V_PEA_B1
+1.1V_PEA_B2
+1.1V_PEA_B3
+1.1V_PEA_B4
+1.1V_PEA_B5
+1.1V_PEA_B6
PE_RST0#
PE_RST1#
D24
C24
A24
B24
B25
C25
B26
C26
C27
D27
A28
B28
A29
B29
A30
B30
B31
B32
C31
C32
D31
D32
E31
E30
F31
F30
G29
G30
H29
H30
H32
H31
R29
R30
M28
M29
T32
T31
M24
M25
T29
T30
M22
M23
T27
T28
M30
M31
T25
T26
P29
P28
T23
T24
P24
P25
P23
R23
W26
W24
V23
V22
W25
Y29
Y27
Y25
Y24
W23
Y23
W22
Y22
W30
W29
2
C225
C225
1U_4
1U_4
C243
C243
.1U_4
.1U_4
C248.1U_4C248.1U_4
C249.1U_4C249.1U_4
R15122_4R15122_4
R15222_4R15222_4
C246.1U_4C246.1U_4
C247.1U_4C247.1U_4
R14522_4R14522_4
R14422_4R14422_4
C272.1U_4C272.1U_4
C273.1U_4C273.1U_4
R13922_4R13922_4
R14022_4R14022_4
L610_6L610_6
C454
C454
C213
C213
22U-6.3V_8
22U-6.3V_8
1U_4
1U_4
C253
C253
C210
C210
1U_4
1U_4
.1U_4
.1U_4
PCIE_RST#<15>
PCIE_RST1#<17,19>
2
C455
C455
4.7U_6
4.7U_6
PCIE-LAN_TXP_C
PCIE-LAN_TXN_C
CLK_PCIE-LAN_C_R
CLK_PCIE-LAN_C#_R
PCIE-NEW_TXP_C
PCIE-NEW_TXN_C
CLK_PCIE_NEW_R
CLK_PCIE_NEW#_R
PCIE-MINI1_TXP_C
PCIE-MINI1_TXN_C
CLK_PCIE_MINI1_R
CLK_PCIE_MINI1#_R
+1.1V_PED
C233
C233
.1U_4
.1U_4
+1.1V_PEA
C205
C205
.1U_4
.1U_4
Add 0R resistor, The resistor should only be
R328
R328
stuffed for MCP67D
*0_4
*0_4
1
[CARD Reader]
PCIE-LAN_TXP<15>
PCIE-LAN_TXN<15>
CLK_PCIE-LAN<15>
CLK_PCIE-LAN#<15>
PCIE-NEW_TXP<17>
PCIE-NEW_TXN<17>
CLK_PCIE_NEW<17>
CLK_PCIE_NEW#<17>
PCIE-MINI1_TXP<17>
PCIE-MINI1_TXN<17>
CLK_PCIE_MINI1<17>
CLK_PCIE_MINI1#<17>
+1.1V_NB
200mA+500mA
[LAN]
[NEW CARD]
[MINI CARD-1]
563mA+1500mA
L60PBY201209T_8L60PBY201209T_8
C453
C453
C452
C452
C451
22U-6.3V_8
22U-6.3V_8
SizeDocument NumberRev
SizeDocument NumberRev
SizeDocument NumberRev
Date:Sheet of
Date:Sheet of
Date:Sheet of
C451
22U-6.3V_8
22U-6.3V_8
22U-6.3V_8
22U-6.3V_8
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
MCP77 PCI-Express Bus
MCP77 PCI-Express Bus
MCP77 PCI-Express Bus
+1.1V_NB
Z05
Z05
Z05
834Monday, March 10, 2008
834Monday, March 10, 2008
834Monday, March 10, 2008
1
1A
1A
1A
PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com
5
U15D
U15D
FCBGA836-NVIDIA-MCP67
DD
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
CC
INTA#
INTB#
INTC#
INTD#
TRDY#
CLKRUN#<22>
+3V
R30310K_4R30310K_4
R1115.6K_4R1115.6K_4
R12110K_4R12110K_4
R1124.7K_4R1124.7K_4
BB
T100T100
T101T101
LDRQ#1
LDRQ#0
SERIRQ
PDD7
PDDREQ
IDE_INTR
PIORDY
CABLE_DET_P
R104
R104
15K_4
15K_4
FCBGA836-NVIDIA-MCP67
E10
PCI_REQ0#
G10
PCI_REQ1#/FANRPM2
J10
PCI_REQ2#/GPIO_40/RS232_DSR#
M11
PCI_REQ3#/GPIO_38/RS232_CTS#
E8
PCI_REQ4#/GPIO_52/RS232_SIN#
D10
PCI_AD0
B10
PCI_AD1
C10
PCI_AD2
L12
PCI_AD3
K11
PCI_AD4
J11
PCI_AD5
D11
PCI_AD6
C11
PCI_AD7
J12
PCI_AD8
H12
PCI_AD9
G12
PCI_AD10
F12
PCI_AD11
E12
PCI_AD12
D12
PCI_AD13
C12
PCI_AD14
B12
PCI_AD15
G14
PCI_AD16
E14
PCI_AD17
D14
PCI_AD18
J15
PCI_AD19
C14
PCI_AD20
D15
PCI_AD21
K15
PCI_AD22
C15
PCI_AD23
L16
PCI_AD24
G16
PCI_AD25
J16
PCI_AD26
E16
PCI_AD27
H16
PCI_AD28
D16
PCI_AD29
F16
PCI_AD30
A16
PCI_AD31
L17
PCI_INTW#
J17
PCI_INTX#
B16
PCI_INTY#
K17
PCI_INTZ#
K14
PCI_TRDY#
D5
PCI_CLKRUN#/GPIO_42
C6
LPC_DRQ1#/GPIO19/FANRPM1
B6
LPC_DRQ0#/GPIO_50
D6
LPC_SERIRQ
AF10
IDE_DATA_P0/WUSB_DATA0
AL9
IDE_DATA_P1/WUSB_DATA1
AK8
IDE_DATA_P2/WUSB_DATA2
AK7
IDE_DATA_P3/WUSB_DATA3
AK6
IDE_DATA_P4/WUSB_DATA4
AJ6
IDE_DATA_P5/WUSB_DATA5
AL5
IDE_DATA_P6/WUSB_DATA6
AL4
IDE_DATA_P7/WUSB_DATA7
AJ5
IDE_DATA_P8
AK5
IDE_DATA_P9
AL6
IDE_DATA_P10
AJ7
IDE_DATA_P11
AJ8
IDE_DATA_P12
AL8
IDE_DATA_P13
AK9
IDE_DATA_P14
AG10
IDE_DATA_P15
AK11
IDE_DREQ_P/WUSB_PCLK
AH10
IDE_INTR_P/WUSB_PHY_ACTIVE
AK10
IDE_RDY_P/WUSB_DATA_EN
AL10
IDE_IOR_P#/WUSB_SERIAL_DATA
AF12
CABLE_DET_P/GPIO_63
4
MCP77
MCP77
SEC 4 OF 8
SEC 4 OF 8
PCI_GNT2#/GPIO_41/RS232_DTR#
PCI_GNT3#/GPIO_39/RS232_RTS#
PCI_GNT4#/GPIO_53/RS232_SOUT#
PCI
PCI
PCI_PERR#/GPIO_43/RS232_DCD#
LPC_PWRDWN#/GPIO_54/EXT_NMI#
LPC
LPC
IDE_ADDR_P0/WUSB_STOPC
IDE_ADDR_P1/WUSB_RX_EN
IDE_ADDR_P2/WUSB_TX_EN
IDE
IDE
IDE_CS1_P#/WUSB_PHY_RESET#
IDE_IOW_P#/WUSB_CCA_STATUS
3
PCI_GNT0#
PCI_GNT1#/FANCTL2
PCI_CBE0#
PCI_CBE1#
PCI_CBE2#
PCI_CBE3#
PCI_DEVSEL#
PCI_FRAME#
PCI_IRDY#
PCI_PAR
PCI_SERR#
PCI_STOP#
PCI_PME#/GPIO_30
PCI_RESET0#
PCI_RESET1#
PCI_RESET2#
PCI_CLK0
PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLKIN
LPC_FRAME#
LPC_RESET0#
LPC_RESET1#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_CLK0
LPC_CLK1
IDE_CS3_P#
IDE_DACK_P#
IDE_COMP_3P3V
IDE_COMP_GND
GNT0#
F10
H10
K10
L10
F8
K12
K13
F14
K16
L13
J14
H14
B14
J13
C13
B13
C16
J9
K9
K8
C9
B9
B8
A8
C8
D8
D7
B3
C7
L9
A4
B4
C4
A3
B5
C5
AG12
AE12
AH12
AJ12
AK12
AJ11
AJ10
AM4
AK4
DEVSEL#
FRAME#
IRDY#
PERR#
SERR#
STOP#
PCI_PME#
PCIRST_R#
IDERST_R#
PCIRST2#
PCI_CLK_129_R
PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLKIN
LFRAME#_R
LPC_PD#
LPC_RST1#
LPC_RST2#
LAD0_R
LAD1_R
LAD2_R
LAD3_R
LPC_CLK_EC_R
PCI_CLK_DEBUG__R
IDE_COMP_3V
IDE_COMP_3V_GND
T34T34
R116*33_4R116*33_4
T28T28
T22T22
T21T21
T99T99
T97T97
T98T98
A1AL:match to within 3000
D = Length of PCI feedback and onboard devices = A + B + C
R11522_4R11522_4
T96T96
R11033_4R11033_4
T27T27
R30922_4R30922_4
R31122_4R31122_4
R9922_4R9922_4
R30722_4R30722_4
R30622_4R30622_4
R10822_4R10822_4
R302121/F_4R302121/F_4
R98
R98
121/F_4
121/F_4
PCIRST#<15>
R11822_4R11822_4
LFRAME#<12,17,22>
PLTRST#<17,22>SERIRQ<22>
LAD0<17,22>
LAD1<17,22>
LAD2<17,22>
LAD3<17,22>
LPC_CLK_EC<22>
PCI_CLK_DEBUG1<17>
+3V
2
1
PCI/LPC PULL-UP
RP168.2KX8_10P8RRP168.2KX8_10P8R
INTD#
6
INTA#
7
DEVSEL#
8
INTB#
9
STOP#
SERR#
IRDY#
FRAME#
PCI_PME#
CLKRUN#
10
6
7
8
9
10
R318*8.2K_4R318*8.2K_4
R1058.2K_4R1058.2K_4
+3V
+3V
5
4
3
2
1
RP318.2KX8_10P8RRP318.2KX8_10P8R
5
4
3
2
1
INTC#
TRDY#
PERR#
REQ3#
REQ2#
REQ1#
REQ0#
REQ4#
+3V
+3V
+3V
CLOCK BYPASS
LPC_CLK_EC
PCI_CLK_DEBUG__R
PCI_CLKIN
C411*5P_4C411*5P_4
C95*5P_4C95*5P_4
C144*5P_4C144*5P_4
AA
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
SizeDocument NumberRev
SizeDocument NumberRev
SizeDocument NumberRev
Date:Sheet of
Date:Sheet of
5
4
3
2
Date:Sheet of
PROJECT :
MCP77 PCI/LPC/IDE
MCP77 PCI/LPC/IDE
MCP77 PCI/LPC/IDE
Z05
Z05
Z05
1A
1A
934Monday, February 25, 2008
934Monday, February 25, 2008
934Monday, February 25, 2008
1
1A
PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com
5
DD
R132124/F_4R132124/F_4
C193.01U_4C193.01U_4
L13
L13
TI160808U300_6
CC
BB
+1.1V_NB
63mA133mA
300mA
TI160808U300_6
+1.1V_NB
C150
C150
C152
C152
2.2U_4
2.2U_4
4.7U_6
4.7U_6
110mA
8mA+52mA
+1.1V_PLLPE_SS
12mA
L21TI160808U300_6L21TI160808U300_6
+1.8V
+3V
C264
C264
4.7U_6
4.7U_6
+3V
L_BKLT_CTRL<14>
INT_LVDS_BLON<16>
INT_LVDS_DIGON<14>
R270*8.2K_4R270*8.2K_4
R269*8.2K_4R269*8.2K_4
T112T112
T115T115
T50T50
T116T116
T113T113
T109T109
T111T111
T114T114
T47T47
T48T48
R14110K_4R14110K_4
R33010K_4R33010K_4
L250_6L250_6
C2824.7U_6C2824.7U_6
C230*1U_4C230*1U_4
C281.1U_4C281.1U_4
L62TI160808U300_6L62TI160808U300_6
C450*4.7U_6C450*4.7U_6
C215.1U_4C215.1U_4
C207.1U_4C207.1U_4
C177
C177
C261
C261
.1U_4
.1U_4
.1U_4
.1U_4
4
U15C
U15C
FCBGA836-NVIDIA-MCP67
FCBGA836-NVIDIA-MCP67
B20
RGMII_RXD0/MII_RXD0
C20
R32210K_4R32210K_4
R32010K_4R32010K_4
R31910K_4R31910K_4
+1.1V_DUAL
+1.1V_DUAL
RGB_DAC_RSET INT_CRT_G
RGB_DAC_VREF INT_CRT_B
+1.1V_PLL_DISP
MCP67_GPIO6
MCP67_GPIO7
HDMI_TXCP_C
HDMI_TXCN_C
HDMI_TXD0P_C
HDMI_TXD0N_C
HDMI_TXD1P_C
HDMI_TXD1N_C
HDMI_TXD2P_C
HDMI_TXD2N_C
HDCP_ROM_SCLK
HDCP_ROM_SDATA
HPLUG_DET3
HPLUG_DET2
+1.8V_IFP
+3.3V_PLL_IFPP
+1.1V_DP_VDD
HDMI_RSET
HDMI_VPROBE
C445
C445
R331
R331
*.01U_4
*.01U_4
*1K/F_4
*1K/F_4
RGMII_RXD1/MII_RXD1
E19
RGMII_RXD2/MII_RXD2
F19
RGMII_RXD3/MII_RXD3
G19
RGMII_RXC/MII_RXCLK
J20
RGMII_RXCTL/MII_RXDV
C19
MII_RXER/GPIO_36
J18
MII_COL/MSMB_DATA
D19
MII_CRS/MSMB_CLK
B18
RGMII/MII_INTR/GPIO35
N13
+1.1V_PLL_MAC_DUAL
B17
MII_COMP_3P3V
C17
MII_COMP_GND
K21
RGB_DAC_RSET
D21
RGB_DAC_VREF
E23
TV_DAC_RSET
H22
TV_DAC_VREF
N15
+1.1V_PLL_DISP
E17
TV_XTALIN
F17
TV_XTALOUT
U11
GPIO_6/FERR/SYS_SERR/IGPU_GPIO_6*
T11
GPIO_7/NFERR/SYS_PERR/IGPU_GPIO_7*
AD24
LCD_BKL_CTL
AE25
LCD_BKL_ON
AE27
LCD_PANEL_PWR
AL29
HDMI_TXC_P/ML0_LANE3_P
AM29
HDMI_TXC_N/ML0_LANE3_N
AK29
HDMI_TXD0_P/ML0_LANE2_P
AJ29
HDMI_TXD0_N/ML0_LANE2_N
AM30
HDMI_TXD1_P/ML0_LANE1_P
AL30
HDMI_TXD1_N/ML0_LANE1_N
AK30
HDMI_TXD2_P/ML0_LANE0_P
AJ30
HDMI_TXD2_N/ML0_LANE0_N
AD25
AUX_CH0_P
AC26
AUX_CH0_N
AE26
HPLUG_DET3
AL32
HPLUG_DET2
AC24
+1.8V_IFPA
AC25
+1.8V_IFPB
AC23
+3.3V_IFPAB_HVDD
AC22
+3.3V_HDMI_PLL_HVDD
U20
+1.1V_PLL_DP
AH29
+1.1V_DP_VDD
AK31
HDMI_RSET
AK32
HDMI_VPROBE
SEC 3 OF 8
SEC 3 OF 8
LAN
LAN
DACS
DACS
3
FLAT
FLAT
PANEL
PANEL
+3.3V_DUAL_RMGT
+1.1V_DUAL_RMGT
RGMII_TXD0/MII_TXD0
RGMII_TXD1/MII_TXD1
RGMII_TXD2/MII_TXD2
RGMII_TXD3/MII_TXD3
RGMII_TXCLK/MII_TXCLK
RGMII_TXCTL/MII_TXEN
RGMII/MII_MDC
RGMII/MII_MDIO
RGMII/MII_PWRDWN#/GPIO_37
BUF_25MHZ
MII_RESET#
MII_VREF
RGB_DAC_RED
RGB_DAC_GREEN
RGB_DAC_BLUE
RGB_DAC_HSYNC
RGB_DAC_VSYNC
DDC_CLK0
DDC_DATA0
+3.3V_RGB_DAC
+3.3V_TV_DAC
TV_DAC_RED
TV_DAC_GREEN
TV_DAC_BLUE
IFPA_TXC_P
IFPA_TXC_N
IFPA_TXD0_P
IFPA_TXD0_N
IFPA_TXD1_P
IFPA_TXD1_N
IFPA_TXD2_P
IFPA_TXD2_N
IFPA_TXD3_P
IFPA_TXD3_N
IFPB_TXC_P
IFPB_TXC_N
IFPB_TXD4_P
IFPB_TXD4_N
IFPB_TXD5_P
IFPB_TXD5_N
IFPB_TXD6_P
IFPB_TXD6_N
IFPB_TXD7_P
IFPB_TXD7_N
DDC_CLK2
DDC_DATA2
DDC_CLK3
DDC_DATA3
IFPAB_RSET
IFPAB_VPROBE
+3V_DUAL
L14
+1.1V_DUAL
N18
J19
K19
L19
L18
H19
K18
K20
MDIOLAN_INT
L20
D17
G17
C18
RGMII_VREF
H20
B21
C21
B22
G21
H21
G8
H8
+3VDAC
E21
C214
C214
.1U_4
.1U_4
F21
C23
C22
D23
AE30
AE31
AC30
AC29
AC27
AC28
AD30
AD29
INT_TXLOUT3+
AD31
INT_TXLOUT3-
AD32
AJ31
AJ32
AE28
AE29
AF30
AF31
AG30
AG29
AH31
AH30
L21
J22
UMA_HDMI_DDCCLK
L22
UMA_HDMI_DDCDATA
K22
AB31
AB30
2
+3V_DUAL
+1.1V_DUAL
R13010K_4R13010K_4
R12910K_4R12910K_4
R13110K_4R13110K_4
INT_CRT_R<14>
INT_CRT_G<14>
INT_CRT_B<14>
HSYNC<14>
VSYNC<14>
CRTDCLK<14>
CRTDDAT<14>
L17TI160808U300_6L17TI160808U300_6
C236
C236
C231
C231
4.7U_6
4.7U_6
*4.7U_8
*4.7U_8
R3850_4R3850_4
IFPAB_RST
IFPAB_VPROBE
+3V
R386
R386
2007/11/28-Edison add, follow NV recommend.
*0_4
*0_4
TXLCLKOUT+<14>
TXLCLKOUT-<14>
TXLOUT0+<14>
TXLOUT0-<14>
TXLOUT1+<14>
TXLOUT1-<14>
TXLOUT2+<14>
TXLOUT2-<14>
T110T110
T103T103
LCD_EDIDCLK<14>
LCD_EDIDDATA<14>
R32510K_4R32510K_4
R32310K_4R32310K_4
C429
C429
R327
R327
*.1U_4
*.1U_4
*1K/F_4
*1K/F_4
[LVDS]
+3V
+3V
INT_CRT_R
1
R134150/F_4R134150/F_4
R136150/F_4R136150/F_4
R135150/F_4R135150/F_4
AA
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
SizeDocument NumberRev
SizeDocument NumberRev
SizeDocument NumberRev
Date:Sheet of
Date:Sheet of
5
4
3
2
Date:Sheet of
PROJECT :
MCP77 LAN and Graphics
MCP77 LAN and Graphics
MCP77 LAN and Graphics
Z05
Z05
Z05
1A
1A
1034Monday, February 25, 2008
1034Monday, February 25, 2008
1034Monday, February 25, 2008
1
1A
PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com
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