5
4
3
2
1
DIS (14" / 15" / 17")
Lay-Vine
D D
C C
System BIOS
SPI ROM
B B
Intel Cresent Bay ULT Platform Block Diagram
DDR3L SODIMM1
Maxima 8GBs
PAGE 12
DDR3L SODIMM2
Maxima 8GBs
PAGE 13
SATA0 - 1st HDD
Package : 9.5 (mm)
Power :
SATA ODD
Package : 12.7 (mm)
Power :
mSATA / NGFF SSD
Package : (mm)
Power :
PAGE 7
PAGE 31
PAGE 30
PAGE 27
DDR3L
DDR3L
SATA0 6GB/s
SATA1 3GB/s
SATA2 6GB/s
SPI Interface
TPM
Broadwell U
Processor
Processor : Daul Core
Power : 15 (Watt)
Package : BGA1168
Size : 40 X 24 (mm)
PCI-E
X4 Lane
NVIDIA N15P-GT
Package 23*23mm
25W
27MHz
PAGE 16
PAGE 18~21
eDP X 2
DP Port 1
USB3.0 Interface
Pre-L
PAGE 31SLB9656TT1.2
PAGE 2~10
Azalia
USB2.0 Interface
PCIE Gen 1 x 1 LaneLPC Interface
USB 3.0 Port 1,2,3(USB 2.0 Port 0,1,5)
Fingerprint
Port 4 Port2
PAGE 31
Camera
PAGE 24
VRAM DDR3 x 4
256M X 16 X 4
900Mhz
RTD2136
Package : QFN-32
Port7
Elan EKTH3915 for 14",15"
Elan EKTH3918 for 17"
PAGE 22
LVDS (2CH)
PAGE 23
eDP
HDMI Conn
USB3.0 Port x 3
Touch Screen
PAGE 31
PAGE 23/24
PAGE 23/24
PAGE 24
PAGE 32
PCB 6L STACK UP
LAYER 1 : TOP
LAYER 2 : SGND
LAYER 3 : IN1(High)
LAYER 4 : IN2(Low)
LAYER 5 : SVCC
LAYER 6 : BOT
01
Audio CodeciTE 8987
G-Sensor
HP3DC2TR
Keyboard
Touch Pad
A A
Subwoofer
PAGE 31
PAGE 29
PAGE 29
PAGE 26
5
SM BUS
Embedded Controller
Power :
Package : LQPF128
Size : 14 x 14 (mm)
PAGE 33
FAN
PAGE 29
Subwoofer AMP
ALC3241
Power :
Package : MQFN
Size : 6 x 6 (mm)
PAGE 25
PAGE 26HPA01081RTJR
4
Card Reader
RTS5237-GR
Power :
Package : LQPF48
Size : 7 x 7 (mm)
PAGE 28
Head Phone AMP
PAGE 26HPA022642RTJR
LAN Controller
RTL8161GSH(Giga)
RTL8176GSH(10/100)
Power :
Package : OFN32
Int
PAGE 27
Speaker
Combo Jack
Digital MIC
3
Halt Mini Card
Intel Rambo Peak
WLAN / BT Combo
Port6
PAGE 33
PAGE 25
PAGE 25
PAGE 24
PROJECT : Y11C
PROJECT : Y11C
PROJECT : Y11C
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Block Diagram
Block Diagram
NB5
NB5
2
NB5
Block Diagram
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
1A
1A
1A
1 44Friday, February 14, 2014
1 44Friday, February 14, 2014
1 44Friday, February 14, 2014
5
4
3
2
1
U25A
IN_D2#24
IN_D1#24
IN_D0#24
IN_CLK#24
IN_D224
IN_D124
IN_D024
D D
eDP_COMPIO and ICOMPO signals should be shorted
near balls and routed with typical impedance <25 mohms
C C
IN_CLK24
INT_eDP_AUXP23
INT_eDP_AUXN23
INT_eDP_TXP023
INT_eDP_TXP123
INT_eDP_TXP224
INT_eDP_TXP324
INT_eDP_TXN023
INT_eDP_TXN123
INT_eDP_TXN224
INT_eDP_TXN324
DPB_LANE0_N
DPB_LANE1_N
DPB_LANE2_N
DPB_LANE3_N
DPB_LANE0_P
DPB_LANE1_P
DPB_LANE2_P
DPB_LANE3_P
eDP_RCOMP
EDP_DISP_UTIL
TP20
INT_eDP_AUXP
INT_eDP_AUXN
INT_eDP_TXP0
INT_eDP_TXP1
INT_eDP_TXN0
INT_eDP_TXN1
+VCCIOA_OUT
eDP_COMPIO and ICOMPO signals should be shorted
near balls and routed with typical impedance <25 mohms
C54
DDI1_TXN0
B58
DDI1_TXN1
B55
DDI1_TXN2
A57
DDI1_TXN3
C55
DDI1_TXP0
C58
DDI1_TXP1
A55
DDI1_TXP2
B57
DDI1_TXP3
C51
DDI2_TXN0
C53
DDI2_TXN1
C49
DDI2_TXN2
A53
DDI2_TXN3
C50
DDI2_TXP0
B54
DDI2_TXP1
B50
DDI2_TXP2
B53
DDI2_TXP3
D20
EDP_RCOMP
A43
EDP_DISP_UTIL
B45
EDP_AUXP
A45
EDP_AUXN
B46
eDP_TXP0
B47
eDP_TXP1
C46
eDP_TXP2
B49
eDP_TXP3
C45
eDP_TXN0
A47
eDP_TXN1
C47
eDP_TXN2
A49
eDP_TXN3
*HSW_ULT_DDR3L
R165 24.9/F_4
eDP_RCOMP
CATERR#
TP31
EC_PECI34
H_PROCHOT#34,39
eDP
R517 56.2/F_4
R495 10K/F_4
EC_PECI
PROCHOT#
PROCPWRGD
PCI EXPRESS* - GRAPHICS
U25B
D61
PROC_DETECT#
K61
CATERR#
N62
PECI
K63
PROCHOT#
C61
PROCPWRGD
*HSW_ULT_DDR3L
02
MISCTHERMALPWR MANAGEMENT
AV15
AU60
AV60
AU61
AV61
J62
K62
E60
E61
E59
F63
F62
J60
H60
H61
H62
K59
H63
K60
J61
SM_DRAMRST#
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
XDP_TCK0
XDP_TMS_CPU
XDP_TRST#_CPU
XDP_TDI_CPU
XDP_TDO_CPU
R251 100/F_4
R250 75/F_4
R249 100/F_4
DDR_PG_CNTL 13
XDP_PRDY#_CPU 11
XDP_PREQ#_CPU 11
XDP_TCK0 7,11
XDP_TMS_CPU 11
XDP_TRST#_CPU 7 ,11
XDP_TDI_CPU 11
XDP_TDO_CPU 11
XDP_BPM0 11
XDP_BPM1 11
DDR3JTAG & BPM
SM_DRAMRST#
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
SM_PG_CNTL1
PRDY#
PREQ#
PROC_TCK
PROC_TMS
PROC_TRST#
PROC_TDI
PROC_TDO
BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7
+1.35VSUS
R266
470_4
DDR3_DRAMRST# 12,13
Processor pull-up (CPU)
H_PROCHOT#
XDP_TDO_CPU
B B
XDP_TMS_CPU
XDP_TDI_CPU
XDP_TRST#_CPU
XDP_TCK0
R522 62_4
+V1.05S_VCCST
R506 51_4
R496 *51_4
R509 *51_4
R580 51_4
R562 51_4
+V1.05S_VCCST
A A
PROJECT : Y11C
PROJECT : Y11C
PROJECT : Y11C
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
ULT 1/9(eDP/DDI)
ULT 1/9(eDP/DDI)
NB5
NB5
5
4
3
2
NB5
ULT 1/9(eDP/DDI)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
1A
1A
1A
2 44Friday, February 14, 2014
2 44Friday, February 14, 2014
2 44Friday, February 14, 2014
5
M_A_DQ[6 3:0]12
M_B_DQ[6 3:0]13
M_A_DQSN [7:0]12
M_A_DQSP [7:0]12
M_B_DQSN [7:0]13
M_B_DQSP [7:0]13
4
3
2
1
03
Haswell ULT Processor (DDR3L)
D D
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
C C
B B
M_A_BS# 012
M_A_BS# 112
M_A_BS# 212
M_A_CAS#12
M_A_RAS#12
M_A_WE #12
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
AH62
AK63
AK62
AH61
AH60
AK61
AK60
AM63
AM62
AP63
AP62
AM61
AM60
AP61
AP60
AP58
AR58
AM57
AK57
AL58
AK58
AR57
AN57
AP55
AR55
AM54
AK54
AL55
AK55
AR54
AN54
AY58
AW58
AY56
AW56
AV58
AU58
AV56
AU56
AY54
AW54
AY52
AW52
AV54
AU54
AV52
AU52
AK40
AK42
AM43
AM45
AK45
AK43
AM40
AM42
AM46
AK46
AM49
AK49
AM48
AK48
AM51
AK51
AU35
AV35
AY41
AU34
AY34
AW34
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
SA_BA0
SA_BA1
SA_BA2
SA_CAS#
SA_RAS#
SA_WE #
*HSW_UL T_DDR3L
DDR SYSTEM MEMORY A
SA_CLK0
SA_CLK# 0
SA_CKE0
SA_CLK1
SA_CLK# 1
SA_CKE1
SA_CKE2
SA_CKE3
SA_CS#0
SA_CS#1
SA_ODT0
SA_DQSN0
SA_DQSN1
SA_DQSN2
SA_DQSN3
SA_DQSN4
SA_DQSN5
SA_DQSN6
SA_DQSN7
SA_DQSP 0
SA_DQSP 1
SA_DQSP 2
SA_DQSP 3
SA_DQSP 4
SA_DQSP 5
SA_DQSP 6
SA_DQSP 7
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15
SM_VREF_ CA
SM_VREF_ DQ0
SM_VREF_ DQ1
AV37
AU37
AU43
AY36
AW36
AW43
AY42
AY43
AP33
AR32
AP32
AJ61
M_A_DQSN 0
AN62
M_A_DQSN 1
AM58
M_B_DQSN 0
AM55
M_B_DQSN 1
AV57
M_A_DQSN 2
AV53
M_A_DQSN 3
AL43
M_B_DQSN 2
AL48
M_B_DQSN 3
AJ62
M_A_DQSP 0
AN61
M_A_DQSP 1
AN58
M_B_DQSP 0
AN55
M_B_DQSP 1
AW57
M_A_DQSP 2
AW53
M_A_DQSP 3
AL42
M_B_DQSP 2
AL49
M_B_DQSP 3
AU36
M_A_A0
AY37
M_A_A1
AR38
M_A_A2
AP36
M_A_A3
AU39
M_A_A4
AR36
M_A_A5
AV40
M_A_A6
AW39
M_A_A7
AY39
M_A_A8
AU40
M_A_A9
AP35
M_A_A10
AW41
M_A_A11
AU41
M_A_A12
AR35
M_A_A13
AV42
M_A_A14
AU42
M_A_A15
AP49
SM_VREF
AR51
SMDDR_VREF _DQ0_M3
AP51
SMDDR_VREF _DQ1_M3
20mils width
M_A_CLKP 0 12
M_A_CLKN 0 12
M_A_CKE0 12
M_A_CLKP 1 12
M_A_CLKN 1 12
M_A_CKE1 12
M_A_CS#0 12
M_A_CS#1 12
M_A_A[15 :0] 12
SM_VREF 12
SMDDR_VREF _DQ0_M3 12
SMDDR_VREF _DQ1_M3 13
M_B_BS# 013
M_B_BS# 113
M_B_BS# 213
M_B_CAS#13
M_B_RAS#13
M_B_WE #13
U25C
AH63
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AY31
AW31
AY29
AW29
AV31
AU31
AV29
AU29
AY27
AW27
AY25
AW25
AV27
AU27
AV25
AU25
AM29
AK29
AK28
AR29
AN29
AR28
AP28
AN26
AR26
AR25
AP25
AK26
AM26
AK25
AY23
AW23
AY21
AW21
AV23
AU23
AV21
AU21
AY19
AW19
AY17
AW17
AV19
AU19
AV17
AU17
AR21
AR22
AM22
AN22
AP21
AK21
AK22
AN20
AR20
AK18
AK20
AM20
AR18
AP18
AM36
AU49
AM33
AM35
AK35
AL28
AL25
AL21
AL18
AL35
U25D
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
SB_BA0
SB_BA1
SB_BA2
SB_CAS#
SB_RAS#
SB_WE #
INT
*HSW_UL T_DDR3L
AN38
SB_CLK0
AM38
SB_CLK# 0
AY49
SB_CKE0
AL38
SB_CLK1
AK38
SB_CLK# 1
AU50
SB_CKE1
AW49
SB_CKE2
AV50
SB_CKE3
AM32
SB_CS#0
AK32
SB_CS#1
AL32
SB_ODT0
AW30
SB_DQSN0
AV26
SB_DQSN1
AN28
SB_DQSN2
AN25
SB_DQSN3
AW22
SB_DQSN4
AV18
SB_DQSN5
AN21
SB_DQSN6
AN18
SB_DQSN7
AV30
SB_DQSP 0
AW26
SB_DQSP 1
AM28
SB_DQSP 2
AM25
SB_DQSP 3
AV22
SB_DQSP 4
AW18
SB_DQSP 5
AM21
SB_DQSP 6
AM18
SB_DQSP 7
AP40
SB_MA0
AR40
SB_MA1
AP42
SB_MA2
AR42
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15
AR45
AP45
AW46
AY46
AY47
AU46
AK36
AV47
AU47
AK33
AR46
AP46
DDR SYSTEM MEMORY B
M_A_DQSN 4
M_A_DQSN 5
M_B_DQSN 4
M_B_DQSN 5
M_A_DQSN 6
M_A_DQSN 7
M_B_DQSN 6
M_B_DQSN 7
M_A_DQSP 4
M_A_DQSP 5
M_B_DQSP 4
M_B_DQSP 5
M_A_DQSP 6
M_A_DQSP 7
M_B_DQSP 6
M_B_DQSP 7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_CLKP 0 13
M_B_CLKN 0 13
M_B_CKE0 13
M_B_CLKP 1 13
M_B_CLKN 1 13
M_B_CKE1 13
M_B_CS#0 13
M_B_CS#1 13
M_B_A[15 :0] 13
A A
PROJECT : Y11C
PROJECT : Y11C
PROJECT : Y11C
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Nu mber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
Custom
Custom
Custom
ULT 2/9 (DDR3 I/F)
ULT 2/9 (DDR3 I/F)
NB5
NB5
5
4
3
2
NB5
ULT 2/9 (DDR3 I/F)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
1A
1A
1A
3 44Friday, February 14, 2014
3 44Friday, February 14, 2014
3 44Friday, February 14, 2014
5
U25F
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
*HSW_ULT_DDR3L
POWER
HSW ULT POWER
VCCST_PW RGD
32A
+VCC_CORE
C36
C40
C44
C48
AB57
AD57
AG57
AC58
AB23
AD23
AA23
AE59
AU44
AV44
AM11
AU10
AU15
C52
C56
E23
E25
E27
E29
E31
E33
E35
E37
E39
E41
E43
E45
E47
E49
E51
E53
E55
E57
F24
F28
F32
F36
F40
F44
F48
F52
F56
G23
G25
G27
G29
G31
G33
G35
G37
G39
G41
G43
G45
G47
G49
G51
G53
G55
G57
H23
J23
K23
K57
L22
M23
M57
P57
U57
W57
C24
C28
C32
F59
L59
J58
N58
AT2
D15
F22
H22
J21
N23
R23
T23
U10
AL1
AP7
C255
22U/6.3V_6
22U/6.3V_6
D D
C C
C312
22U/6.3V_6
C272
22U/6.3V_6
C276
22U/6.3V_6
C280
22U/6.3V_6
C284
22U/6.3V_6
C251
22U/6.3V_6
C240
22U/6.3V_6
C268
22U/6.3V_6
C278
22U/6.3V_6
C286
22U/6.3V_6
C277
22U/6.3V_6
C242
22U/6.3V_6
C238
22U/6.3V_6
C267
22U/6.3V_6
22U/6.3V_6
C279
22U/6.3V_6
C271
22U/6.3V_6
C252
22U/6.3V_6
C269
22U/6.3V_6
C285
22U/6.3V_6
C239
22U/6.3V_6
C275
22U/6.3V_6
22U/6.3V_6
C254
22U/6.3V_6
C241
22U/6.3V_6
C283
22U/6.3V_6
C302
22U/6.3V_6
C253
22U/6.3V_6
C270
C295
C287
PV install for RF
B B
A A
+VCCIOA_OUT 2
+VCCIO_OUT 6
+1.35VSUS 2,12, 13,29,37
+1.05V 2,7,9,10,11,31,34,38,39,40,43
+VCC_CORE 39
5
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
VCCIO_OUT
VCCIOA_O UT
VIDALERT#
VIDSCLK
VIDSOUT
PWR_DE BUG#
VR_EN
VR_READY
VCCST
VCCST
VCCST
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
VCC_SENS E
VSS_SEN SE
RSVD
RSVD
4
1.4A
+1.35VSUS
AH26
AJ31
AJ33
AJ37
C738
AN33
AP43
AR48
AY35
AY40
AY44
AY50
D63
VSS
P62
VSS
T59
AD60
AD59
AA59
AE60
AC59
AG58
U59
V59
A59
E20
L62
H_CPU_SVIDALRT#
N63
VR_SVID_CLK
L63
H_CPU_SVIDDAT
H59
PWR_DEBUG
F60
C59
R494 10K_4
AC22
AE22
AE23
B59
H_VCCST_PWRGD_R H_VCCST_PWRGD
P60
P61
N59
N61
E63
E62
AW14
AY14
C736
10U/6.3V_6
10U/6.3V_6
Direct tie to CPU VCC/VSS-Ba ll
C739
C746
2.2U/6.3V_4
2.2U/6.3V_4
+V1.05S_VCCST
100- ±1% pull-up to VCC near processor.
R501 100/F_4
R508 100/F_4
+VCC_CORE
VCC_SENSE 39
VSS_SENSE 39
Processor Strapping
CFG3
(Physcial Debug Enable)
DFX Privacy
CFG4
(DP Presence Strap)
4
3
Close to CPU
C744
C743
10U/6.3V_6
10U/6.3V_6
C745
C740
2.2U/6.3V_4
2.2U/6.3V_4
+VCCIO_OUT
C249
4.7U/6.3V_4
+VCCIO_OUT
+VCCIOA_OUT
PWR_DEBUG 11
IMVP_PWRGD_R
C742
C737
10U/6.3V_6
10U/6.3V_6
H_VR_ENABLE_MCP 39
IMVP_PWRGD_R 34,39
IMVP_PWRGD 34,39
Layout note: need routing
together and ALERT need
between CLK and DATA.
H_CPU_SVIDALRT#
VR_SVID_CLK
H_CPU_SVIDDAT
HWPG11,34,36,37,38 H_VCCST_PWRGD 11
R531 43_4
21
D2 RB501V-40
CFG0-19 need Reserve TP
CFG011
CFG111
CFG211
CFG311
CFG411
CFG511
CFG611
CFG711
CFG811
CFG911
CFG1011
CFG1111
CFG1211
CFG1311
CFG1411
CFG1511
CFG1611
CFG1711
CFG1811
CFG1911
+V1.05S_VCCST
R533
75/F_4
C718 *0.1U/10V_4
+V1.05S_VCCST
Place PU resistor
close to VR
R521
130/F_4
+V1.05S_VCCST
R557
10K_4
The CFG signals have a default value of '1' if not terminated on the board.
1 0
Disable: Enable: Set DFX Enable in DFX interface MSR
Disable; No physical DP attached to eDP
Enable; An ext DP device is connected to eDP
3
SVID ALERT
SVID CLK
SVID DATA
C719
*10P/50V_4
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
VR_SVID_ALERT# 39
VR_SVID_CLK 39
VR_SVID_DATA 39
2
CFG3
CFG4
2
R537
CFG_RCOMP
49.9/F_4
TD_IREF
R484
8.2K/F_4
R543 *1K_4
R542 1K_4
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
Circuit
AC60
AC62
AC63
AA63
AA60
AA62
AA61
AV63
AU63
Y62
Y61
Y60
V62
V61
V60
U60
T63
T62
T61
T60
U63
U62
V63
A5
E1
D1
J20
H18
B12
C63
C62
B43
U25E
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG_RCOMP
RSVD
RSVD
RSVD
RSVD
RSVD
TD_IREF
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
*HSW_ULT_DDR3L
PROC_OPI _RCOMP
RESERVED
IO Thrm Protect
+3VPCU
For 65 degree, 1.8v limit, (SW)
R276
16.5K/F_4
R280
3.3K/F_4
For 75 degree, 1.2v limit, (HW)
THER_CPU
R162
100K_4 NTC
+V1.05S_VCCST+1.05V
+V1.05S_VCCST
NB5
NB5
NB5
1
A51
RSVD_TP
B51
RSVD_TP
L60
RSVD_TP
N60
RSVD
W23
RSVD
Y22
RSVD
AY15
PROC_OPI_RCOMP
AV62
RSVD
D58
RSVD
VSS
VSS
RSVD
RSVD
C370
0.1U/10V_4
1 2
C375
0.1U/10V_4
1 2
C325
*1U/6.3V_4
R556
150/F_4
PWR_DEBUG
R555
*10K_4
PROJECT : Y11C
PROJECT : Y11C
PROJECT : Y11C
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
49.9/F_4
P22
N21
P20
R20
THRM_MOINTOR1 34
C330
*22U/6.3V_6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
04 -- ULT 3/9 (POWER-1)
04 -- ULT 3/9 (POWER-1)
04 -- ULT 3/9 (POWER-1)
1
04
R584
1A
1A
1A
4 44Friday, February 14, 2014
4 44Friday, February 14, 2014
4 44Friday, February 14, 2014
5
U25G
A11
VSS
A14
VSS
A18
VSS
A24
VSS
A28
VSS
A32
VSS
A36
VSS
A40
VSS
A44
VSS
A48
D D
C C
B B
A52
A56
AA1
AA58
AB10
AB20
AB22
AB7
AC61
AD21
AD3
AD63
AE10
AE5
AE58
AF11
AF12
AF14
AF15
AF17
AF18
AG1
AG11
AG21
AG23
AG60
AG61
AG62
AG63
AH17
AH19
AH20
AH22
AH24
AH28
AH30
AH32
AH34
AH36
AH38
AH40
AH42
AH44
AH49
AH51
AH53
AH55
AH57
AJ13
AJ14
AJ23
AJ25
AJ27
AJ29
*HSW_ULT_DDR3L
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ35
VSS
AJ39
VSS
AJ41
VSS
AJ43
VSS
AJ45
VSS
AJ47
VSS
AJ50
VSS
AJ52
VSS
AJ54
VSS
AJ56
VSS
AJ58
VSS
AJ60
VSS
AJ63
VSS
AK23
VSS
AK3
VSS
AK52
VSS
AL10
VSS
AL13
VSS
AL17
VSS
AL20
VSS
AL22
VSS
AL23
VSS
AL26
VSS
AL29
VSS
AL31
VSS
AL33
VSS
AL36
VSS
AL39
VSS
AL40
VSS
AL45
VSS
AL46
VSS
AL51
VSS
AL52
VSS
AL54
VSS
AL57
VSS
AL60
VSS
AL61
VSS
AM1
VSS
AM17
VSS
AM23
VSS
AM31
VSS
AM52
VSS
AN17
VSS
AN23
VSS
AN31
VSS
AN32
VSS
AN35
VSS
AN36
VSS
AN39
VSS
AN40
VSS
AN42
VSS
AN43
VSS
AN45
VSS
AN46
VSS
AN48
VSS
AN49
VSS
AN51
VSS
AN52
VSS
AN60
VSS
AN63
VSS
AN7
VSS
AP10
VSS
AP17
VSS
AP20
VSS
4
U25H
AP22
VSS
AP23
VSS
AP26
VSS
AP29
VSS
AP3
VSS
AP31
VSS
AP38
VSS
AP39
VSS
AP48
VSS
AP52
VSS
AP54
VSS
AP57
VSS
AR11
VSS
AR15
VSS
AR17
VSS
AR23
VSS
AR31
VSS
AR33
VSS
AR39
VSS
AR43
VSS
AR49
VSS
AR5
VSS
AR52
VSS
AT13
VSS
AT35
VSS
AT37
VSS
AT40
VSS
AT42
VSS
AT43
VSS
AT46
VSS
AT49
VSS
AT61
VSS
AT62
VSS
AT63
VSS
AU1
VSS
AU16
AU18
AU20
AU22
AU24
AU26
AU28
AU30
AU33
AU51
AU53
AU55
AU57
AU59
AV14
AV16
AV20
AV24
AV28
AV33
AV34
AV36
AV39
AV41
AV43
AV46
AV49
AV51
AV55
*HSW_ULT_DDR3L
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
INT
3
AV59
VSS
AV8
VSS
AW16
VSS
AW24
VSS
AW33
VSS
AW35
VSS
AW37
VSS
AW4
VSS
AW40
VSS
AW42
VSS
AW44
VSS
AW47
VSS
AW50
VSS
AW51
VSS
AW59
VSS
AW60
VSS
AY11
VSS
AY16
VSS
AY18
VSS
AY22
VSS
AY24
VSS
AY26
VSS
AY30
VSS
AY33
VSS
AY4
VSS
AY51
VSS
AY53
VSS
AY57
VSS
AY59
VSS
AY6
VSS
B20
VSS
B24
VSS
B26
VSS
B28
VSS
B32
VSS
B36
VSS
B4
VSS
B40
VSS
B44
VSS
B48
VSS
B52
VSS
B56
VSS
B60
VSS
C11
VSS
C14
VSS
C18
VSS
C20
VSS
C25
VSS
C27
VSS
C38
VSS
C39
VSS
C57
VSS
D12
VSS
D14
VSS
D18
VSS
D2
VSS
D21
VSS
D23
VSS
D25
VSS
D26
VSS
D27
VSS
D29
VSS
D30
VSS
D31
VSS
DC_TEST_AY2_AW2
DC_TEST_AY3_AW3
TP36
DC_TEST_AY61_AW61
DC_TEST_AY62_AW62
DC_TEST_A3_B3
TP22
DC_TEST_A61_B61
DC_TEST_B62_B63
DC_TEST_C1_C2
TEST_AY60
TEST_B2
2
U25I
D33
VSS
D34
VSS
D35
VSS
D37
VSS
D38
VSS
D39
VSS
D41
VSS
D42
VSS
D43
VSS
D45
VSS
D46
VSS
D47
VSS
D49
VSS
D5
VSS
D50
VSS
D51
VSS
D53
VSS
D54
VSS
D55
VSS
D57
VSS
D59
VSS
D62
VSS
D8
VSS
E11
VSS
E17
VSS
F20
VSS
F26
VSS
F30
VSS
F34
VSS
F38
VSS
F42
VSS
F46
VSS
F50
VSS
F54
VSS
F58
VSS
F61
VSS
G18
VSS
G22
VSS
G3
VSS
G5
VSS
G6
VSS
G8
VSS
H13
VSS
AY2
DAISY_CHAIN_NTCF_AY2
AY3
DAISY_CHAIN_NTCF_AY3
AY60
DAISY_CHAIN_NTCF_AY60
AY61
DAISY_CHAIN_NTCF_AY61
AY62
DAISY_CHAIN_NTCF_AY62
B2
DAISY_CHAIN_NTCF_B2
B3
DAISY_CHAIN_NTCF_B3
B61
DAISY_CHAIN_NTCF_B61
B62
DAISY_CHAIN_NTCF_B62
B63
DAISY_CHAIN_NTCF_B63
C1
DAISY_CHAIN_NTCF_C1
C2
DAISY_CHAIN_NTCF_C2
*HSW_ULT_DDR3L
VSS
DAISY_CHAIN_NTCF_A3
DAISY_CHAIN_NTCF_A4
DAISY_CHAIN_NTCF_A60
DAISY_CHAIN_NTCF_A61
DAISY_CHAIN_NTCF_A62
DAISY_CHAIN_NTCF_AV1
DAISY_CHAIN_NTCF_AW1
DAISY_CHAIN_NTCF_AW2
DAISY_CHAIN_NTCF_AW3
DAISY_CHAIN_NTCF_AW61
DAISY_CHAIN_NTCF_AW62
DAISY_CHAIN_NTCF_AW63
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H17
H57
J10
J22
J59
J63
K1
K12
L13
L15
L17
L18
L20
L58
L61
L7
M22
N10
N3
P59
P63
R10
R22
R8
T1
T58
U20
U22
U61
U9
V10
V3
V7
W20
W22
Y10
Y59
Y63
V58
AH46
V23
AH16
A3
DC_TEST_A3_B3
A4
TEST_A4
A60
TEST_A60
A61
DC_TEST_A61_B61
A62
TEST_A62
AV1
TEST_AV1
AW1
TEST_AW1
AW2
DC_TEST_AY2_AW2
AW3
DC_TEST_AY3_AW3
AW61
DC_TEST_AY61_AW61
AW62
DC_TEST_AY62_AW62
AW63
TEST_AW63
1
05
TP21
TP26
TP27
TP33
TP32
TP34
A A
PROJECT : Y11C
PROJECT : Y11C
PROJECT : Y11C
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
ULT 4/9 (RSV,GND)
ULT 4/9 (RSV,GND)
NB5
NB5
5
4
3
2
NB5
ULT 4/9 (RSV,GND)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
1A
1A
1A
5 44Friday, February 14, 2014
5 44Friday, February 14, 2014
5 44Friday, February 14, 2014
5
4
3
2
1
Lynx Point-LP Platform Controller Hub (LVDS,DDI)
PCH_LVDS_BLON23,24
PCH_DISP_ON23,24
D D
for DS3 For DS3 -->R a
SUSACK#_EC[ 27]
C C
PV..Add SUSWARN# to SUSACK#...0206
SUSWARN#
SYS_PWROK11,34
EC_PWROK11,34
RSMRST#34
SUSWARN#_EC[27]
PV..Add SUSWARN# to SUSACK#...0206
DNBSWON#11,34
SI..Change RF_OFF_PCH to GPIO72...12/25
RF_OFF_PCH9,33
SYS_RESET#11
R7471 *0_4
R7472 0_4
C346 *0.1U/10V_4
EC24 *220P/50V_4
EC25 *220P/50V_4
R7473 0_4
R178 *0_4/S
PCH_SLP_S0_N11,34
TP51
SUSACK# DPWROK RSMRST#
SYS_RESET#
EC_PWROK
EC_PWROK
PLTRST#
RSMRST#
SUSWARN#
DNBSWON#_R
PM_BATLOW#
PCH_SLP_S0_N
CPIO29
U25L
AK2
SUSACK#
AC3
SYS_RESET#
AG2
SYS_PWROK
AY7
PCH_PWROK
AB5
APWROK
AG7
PLTRST#
AW6
RSMRST#
AV4
SUSWARN#/SUSPWRDNACK/GPIO30 (SUS)
AL7
PWRBTN#
AJ8
ACPRESENT / GPIO31(DSW)
AN4
BATLOW# / GPIO72(DSW )
AF3
SLP_S0#
AM5
SLP_WLAN#/ GPIO29(DSW )
*HSW_ULT_DDR3L
DSWVRMEN
CLKRUN#/ GPIO32
SUS_STAT# / GPIO61 (SUS)
SUSCLK / GPIO62 (SUS)
SLP_S5# / GPIO63 ( DSW )
System Power Management
DPWROK
WAKE#
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
SLP_LAN#
AW7
AV5
AJ5
V5
AG4
AE6
AP5
AJ6
AT4
AL5
AP4
AJ7
DSWVRMEN
PCIE_WAKE#
CLKRUN#
DSWVRMEN 7
Ra
R586 *0_4/S
R579 *0_4
Rb
PCIE_WAKE# 27,28 ,33,34
CLKRUN# 34
SLP_S5# 11
SUSC# 1 1,34
SUSB# 11,34
SLP_A# 11
Non-DS3 -->Rb
DPWROK_EC
SLP_SUS#_ECSLP_SUS#AC_PRESENT_R
PCH_DPST_PWM23,24
DPWROK_EC 3 4
for DS3
SLP_SUS#_EC 34AC_PRESENT_EC34
PCH_LVDS_BLON
PCH_DISP_ON
PCH_DPST_PWM
U25M
A9
EDP_BKLEN
C6
EDP_VDDEN
B8
EDP_BKLCTL
*HSW_ULT_DDR3L
EDP SIDEBAND
DDPB_CTRLCLK
DDPB_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA
DISPLAY
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
EDP_HPD
B9
C9
C5
B5
C8
D9
D11
B6
A6
A8
D6
SDVO_CLK
SDVO_DATA
HDMI_HPD_CON
INT_eDP_HPD_Q
SDVO_CLK 24
SDVO_DATA 24
HDMI_HPD_CON 24
06
INT. HDMI
B B
PCH Pull-high/low(CLG)
PM_BATLOW#
PCIE_WAKE#
Change to 1k for LAN wake from OBFF state issue
SUSACK#
SUSWARN#
Check SUSWARN# need PU?
PWRBTN# internally PU in PCH to 3.3V_DSW
A A
CLKRUN#
SYS_RESET#
RSMRST#
DPWROK_EC
R168 10K_4
R259 1K_4
R567 10K_4
R588 10K_4
R526 8.2K/F_4
R551 10K_4
R578 10K_4
R593 100K_4
+3VS5
+3V_DEEP_SUS
+3V
5
for DS3
PLTRST#(CLG)
R258 100K_4
PLTRST#
PLTRST# 11,18,27,28,31, 33,34
Check Q2010 Ri se/Fall time l ess than 100ns
Reserve EDP_HPD opposites circuit!
+VCCIO_OUT
R487
DG V0.7 -> 10K
*10K/F_4
SCH V0.7 -> 1K
INT_eDP_HPDINT_eDP_HPD_Q
ULT_EDP_HPD 23,2 4
R483
100K_4
RTD2132R Vender request PD 100kohm
4
3
System PWR_OK(CLG)
SYS_PWROK EC_PWROK
R240
10K_4
+3V7,8,9,10,11,12,13,1 8,19,20,23,24,25,26,27,28,29, 30,31,33,34,39,40,41
+3VS57,9,10,11,25,29,31,32,3 3,36,38,40,43
PROJECT : Y11C
PROJECT : Y11C
PROJECT : Y11C
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
ULT 5/9(Power Manger)
ULT 5/9(Power Manger)
NB5
NB5
2
NB5
ULT 5/9(Power Manger)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
1A
1A
1A
6 44Friday, February 14, 2014
6 44Friday, February 14, 2014
6 44Friday, February 14, 2014
Lynx Point-LP Platform Controller Hub
5
(HDA,JTAG,SATA)
RTC_X1
TP35
RTC_RST#11
D D
C C
B B
+3V_RTC
PCH Strap Table
R577 1M_4
ACZ_SDIN025
XDP_TRST#_CPU2,11
JTAG_TCK_PCH11
JTAG_TDI_PCH11
JTAG_TDO_PCH11
JTAG_TMS_PCH1 1
JTAGX_PCH2,11
Pin Name Strap description Sampled Configuration
SPKR
SDIO_D0 /GPIO66
INTVRMEN
HDA_SDO /I2S0_TXD
GSPI0_MOSI /GPIO86
GPIO15
DSWVRMEN
A A
5
RTC_X2
RTC_RST#
SRTC_RST#
SM_INTRUDER#
PCH_INVRMEN
ACZ_BCLK
ACZ_SYNC
ACZ_RST#
ACZ_SDOUT
XDP_TRST#_CPU
JTAG_TCK_PCH
JTAG_TDI_PCH
JTAG_TDO_PCH
JTAG_TMS_PCH
JTAGX_PCH
PCH_SPI1_CLK
PCH_SPI_CS0#
PCH_SPI1_SI
PCH_SPI1_SO
PCH_SPI_IO2
PCH_SPI_IO3
No reboot mode setting PWROK
Top-Block Swap
Integrated 1.05V VRM enable ALWAYS Should be always pull-up
Flash Descriptor Security
Only for Interposer
Boot BIOS Selection
TLS Confidentiality PWROK
Deep Sx Well
On-Die Voltage
Regulator Enable
U25J
AW5
RTCX1
AY5
RTCX2
AU7
RTCRST#
AV6
SRTCRST#
AU6
INTRUDER#
AV7
INTVRMEN
AW8
HDA_BCLK / I2S0_SCLK
AV11
HDA_SYNC/ I2S0_SFRM
AU8
HDA_RST#/ I2S_MCLK
AY10
HDA_SDIN0/ I2S0_RXD
AU12
HDA_SDIN1/ I2S1_RXD
AU11
HDA_SDO/ I2S0_TXD
AW10
HDA_DOCK_EN# / I2S1_TXD
AV10
HDA_DOCK_RST/ I2S1_SFRM
AY8
I2S1_SCLK
AU62
PCH_TRST#
AE62
PCH_TCK
AD61
PCH_TDI
AE61
PCH_TDO
AD62
PCH_TMS
AL11
RSVD
AC4
RSVD
AE63
JTAGX
AV2
RSVD
AA3
SPI_CLK
Y7
SPI_CS0#
Y4
SPI_CS1#
AC2
SPI_CS2#
AA2
SPI_MOSI
AA4
SPI_MISO
Y6
SPI_IO2
AF1
SPI_IO3
*HSW_ULT_DDR3L
PWROK
PWROK
PWROK
ALWAYS Should be always pull-up
4
AU14
LAD0
AW12
LAD1
AY12
LAD2
AW11
LAD3
AV12
LFRAME#
RTC
LPC
SATA_RN0/ PERN6_L3
SATA_RP0/ PERP6_L3
SATA_TN0/ PETN6_L3
SATA_TP0/ PETP6_L3
SATA_RN1/ PERN6_L2
SATA_RP1/ PERP6_L2
SATA_TN1/ PETN6_L2
SATA_TP1/ PETP6_L2
SATA_RN2/ PERN6_L1
SATA_RP2/ PERP6_L1
SATA_TN2/ PETN6_L1
SATA_TP2/ PETP6_L1
SATA_RN3/ PERN6_L0
AUDIO
SATA_RP3/ PERP6_L0
SATA_TN3/ PETN6_L0
SATA_TP3/ PETP6_L0
SATA0GP/ GPIO34
SATA1GP/ GPIO35
SATA2GP/ GPIO36
SATA3GP/ GPIO37
SATA_RCOMP
SATA
SPI JTAG
0 = Default (weak pull-down 2 0K)
1 = Setting to No-Reboot mode
0 = "top-block swap" mode
1 = Default (weak pull-up 2 0K)
0 = Default (weak pull-down 2 0K)
1 = Can be Overridden
0 = ME Crypto Transport Layer Security
cipher suite with no conf identiality(Default)
1 = Intel ME Crypto TLS cipher suite with
confidentiality
SATA_IREF
SATALED#
4
RSVD
RSVD
GNT0#
1
0
J5
H5
B15
A15
J8
H8
A17
B17
J6
H6
B14
C15
F5
E5
C17
D17
V1
U1
V6
AC1
C12
A12
U3
L11
K10
ACC_LED#
SIO_EXT_SMI#
PCI_SERR#
SATA3GP
SATA_RCOMP
SATA_IREF
SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0
SATA_RXN2
SATA_RXP2
SATA_TXN2
SATA_TXP2
SATA_RXN1
SATA_RXP1
SATA_TXN1
SATA_TXP1
Boot Location
LPC
SPI(Default)
LAD0 31,33,34
LAD1 31,33,34
LAD2 31,33,34
LAD3 31,33,34
LFRAME# 31,33 ,34
SATA_RXN0 30
SATA_RXP0 30
SATA_TXN0 30
SATA_TXP0 30
SATA_RXN2 30
SATA_RXP2 30
SATA_TXN2 30
SATA_TXP2 30
SATA_RXN1 33
SATA_RXP1 33
SATA_TXN1 33
SATA_TXP1 33
ACC_LED# 25
SIO_EXT_SMI# 34
PCI_SERR# 3 4
R485 3.01K/F_4
R536 10K_4
3
HDD (SATA3 6.0Gb/s)
ODD (SATA2 3.0Gb/s)
mSATA / NGFF (SATA4 6Gb/s)
R575 330K_4
GPIO33_EC34
R576 330K_4
PCH_SPI_CS0#_R34
PCH_SPI1_CLK_R34
PCH_SPI1_SI_R34
PCH_SPI1_SO_R34
3
+1.05VS5+1.05V
R554 *51_4
R547 51_4
R548 51_4
R201 51_4
R564 *51_4
Close to Chipset
PCH_INVRMEN
R581 1K_4
ACZ_SDOUT
DSWVRMEN 6
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_R
PCH_SPI1_SO_R
R210 *0_4
+V1.05S_ASATA3PLL
DG recommended that SATA AC coupling capacitors should be
close to the connector (<100 mils) for optimal signal quality.
+3V
SATA_LED# 25
Circuit
+3V_RTC
+3V_RTC
JTAGX_PCH
JTAG_TMS_PCH
JTAG_TDI_PCH
JTAG_TDO_PCH
JTAG_TCK_PCH
2
RTC Clock 32.768KHz
R582 *0_4/S
C369 *18P/50V_4
Y4
*32.768KHz
C360 *18P/50V_4
RTC_X1
12
R573
*10M_4
RTC_X2
no stuff If use green Clock
RTC Circuitry(RTC)
+3V_RTC_0
+3V_RTC_0
12
RTC Power trace width 20mils.
PV modify
+3VPCU
R302
*1K_4
CN27
BAT_CONN
DFHS02FS058
Uninstall for Green-CLK
BAT-23_2-4_2
+3V_RTC_1
HDA Bus(CLG)
+3V_DEEP_SUS
ACZ_SYNC_AUDIO25
ACZ_RST#_AUDIO25
ACZ_SDOUT_AUDIO25
BIT_CLK_AUDIO25
Vender
MXIC
Winbond
GigaDevice
Socket
R574 *1K_4
C741
*10P/50V_4
Size
P/N
8MB AKE3EZN0Z00 (MX25L6473EM2I-10G)
AKE3EFP0N07 (W25Q64FVSSIQ)
8MB
AKE3EGN0Q01 (GD25B64BSIGR)
8MB
DFHS08FS023
U10&U15 footprint
ACZ_SYNC
R585 33_4
R590 33_4
R589 33_4
R591 33_4
PCH SPI ROM(CLG)
TP24
TP30
TP66-71 need place to TOP
R457/R453/R450/R451/R546/R548 close to U15 pin
C713 1U/10V_4
+3V 6,8,9,10,11,12,13,1 8,19,20,23,24,25,26,27,28,29, 30,31,33,34,39,40,41
+5V 24,25,26,29,30,31,3 2,33,40
+1.05V 2,4,9,10,1 1,31,34,38,39,40,43
+3VS5 6,9,10,11,25,29,31 ,32,33,36,38,40,43
+3VPCU 4,2 5,29,31,33,34,35,36
+3V_RTC 10,31
+V1.05S_ASATA3PLL 10
2
TP28
TP23
TP25
TP29
PCH_SPI_CS0#
PCH_SPI1_SI PCH_SPI1_SI_R
PCH_SPI1_SO PCH_SPI1_SO_R
+3VSPI
PCH_SPI_IO2
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_R
PCH_SPI1_SO_R
BIOS_WP#
HOLD#
R488 15/F_4
R505 15/F_4
R507 15/F_4
R489 15/F_4
R491 3.3K/F_4
1
CLKGEN_RTC_X1 31
RTC_RST#
3
2
Q19
*2N7002
1
30mils
+3V_RTC
R277
20K/F_4
R256
20K/F_4
D9
C388
*BAT54C
*1U/6.3V_4
R265 *0_6
GPIO Pull UP
ACC_LED#
ACZ_SYNC
ACZ_RST#
ACZ_SDOUT
ACZ_BCLK
SIO_EXT_SMI#
PCI_SERR#
SATA3GP
4M SPI ROM Socket
+3VS5
+3V_DEEP_SUS
U24
CE#
VDD
SCK
SI
SO
HOLD#
WP#
VSS
GD25B64BSIGR
AKE3EZN0Z00
1
1
6
5
2
3
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_R
PCH_SPI1_SO_R
BIOS_WP#
PCH_SPI_CS0#_R
PCH_SPI1_CLK_RPCH_SPI1_CLK
R490 15/F_4
NB5
NB5
NB5
C716
22P/50V_4
1
6
5
2
3
BIOS_WP#
PROJECT : Y11C
PROJECT : Y11C
PROJECT : Y11C
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
ULT 6/9(SATA/HDA)
ULT 6/9(SATA/HDA)
ULT 6/9(SATA/HDA)
Date: Sheet of
Date: Sheet of
Date: Sheet of
07
EC_RTC_RST 34
R293
*100/F_4
PV modify
J1
*SOLDERJUMPER-2
1 2
RTC_RST#
C367
1U/6.3V_4
SRTC_RST#
C358
1U/6.3V_4
SRTC_RST#RTC_RST#
R538 10K_4
R528 10K_4
R527 10K_4
R550 10K_4
U23
CE#
SCK
SI
SO
WP#
*A25LQ32AM-F/Q
DFHS08FS023
91960-0084L-8P-SOCKET
8
7
4
8
VDD
7
HOLD#
4
VSS
R502 *0_4
R503 *0_4/S
+3VSPI
R500 3.3K/F_4
HOLD#
R504 15/F_4
0.1U/10V_4
PCH_SPI_IO3
7 44Friday, February 14, 2014
7 44Friday, February 14, 2014
7 44Friday, February 14, 2014
HOLD#
C714
+3V
+3VSPI
1A
1A
1A
5
PCI/USBOC# Pull-up(CLG)
DGPU_PWR _EN
TS_INTB#
PIRQC#
PIRQD#
GPIO77_ULT
GPIO52_ULT
GPU_EVENT#
GC6_FB_EN
DGPU_HOLD_R ST#
D D
DGPU_HOLD_R ST#
SMBALERT#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB3.0
C C
SI modify
R520 10K_4
R523 10K_4
R516 10K_4
R518 10K_4
R514 10K_4
R511 10K_4
R510 *10K_4
R139 *10K_4
R493 *10K_4
R492 100K_4
SI modify
R186 10K_4
R195 10K_4
R211 10K_4
R561 10K_4
R571 10K_4
USB30_RX1-32
USB30_RX1+32
USB30_TX1-32
USB30_TX1+32
USB30_RX2-32
USB30_RX2+32
USB30_TX2-32
USB30_TX2+32
Lynx Point-LP Platform Controller Hub
(HDA,JTAG,SATA)
+3V
+3V_DEEP_SUS
for DS3
U25N
G20
USB3RN1
H20
USB3RP1
C33
USB3TN1
B34
USB3TP1
E18
USB3RN2
F18
USB3RP2
B33
USB3TN2
A33
USB3TP2
20111130 Modify USB3.0 for HM70
GPIO77_ULT
TS_INTB#
PIRQC#
PIRQD#
GPIO52_ULT
DGPU_PWR _EN19,43
DGPU_HOLD_R ST#1 8
GPU_EVENT#21
GC6_FB_EN19,21
B B
DGPU_PWR _EN_R
DGPU_HOLD_R ST#
GPU_EVENT#
GC6_FB_EN
U6
P4
N4
N2
L1
L3
R5
L4
U7
AD4
PIRQA#/ GPIO77
PIRQB#/ GPIO78
PIRQC#/ GPIO79
PIRQD#/ GPIO80
GPIO52
GPIO54
GPIO51
GPIO53
GPIO55
PME#
PCI
4
C- Link
USBRBIAS#
USB
USBRBIAS
OC0# / GPIO40(SUS)
OC1# / GPIO41(SUS)
OC2# / GPIO42(SUS)
OC3# / GPIO43(SUS)
AF2
CL_CLK
AD2
CL_DATA
AF4
CL_RST#
USB2.0(M/B-1)
USB2.0(M/B-2)
USB2.0 Small board
FP Small board
Camera
WLAN
TS
AN8
USB2N0
AM8
USB2P0
AR7
USB2N1
AT7
USB2P1
AR8
USB2N2
AP8
USB2P2
AR10
USB2N3
AT10
USB2P3
AM15
USB2N4
AL15
USB2P4
AM13
USB2N5
AN13
USB2P5
AP11
USB2N6
AN11
USB2P6
AR13
USB2N7
AP13
USB2P7
AJ10
AJ11
AN10
RSVD
AM10
RSVD
AL3
AT1
AH2
AV3
Cardreader
WLAN
LAN
(USBP0)
(USBP5)
(USBP1)
(USBP4)
(USBP2)
(USBP6)
(USBP7)
USBP0- 3 2
USBP0+ 32
USBP1- 2 5
USBP1+ 25
USBP2- 2 4
USBP2+ 24
USBP3- 3 2
USBP3+ 32
USBP4- 3 1
USBP4+ 31
USBP5- 3 2
USBP5+ 32
USBP6- 3 3
USBP6+ 33
USBP7- 3 1
USBP7+ 31
Cardreader
TIE TRACES TOGETHER
CLOSE TO PINS WITH LENGTH
TO RESISTOR
USB_BIAS
R193
22.6/F_4
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
PCIE_RXN2_CARD28
PCIE_RXP2_CARD28
PCIE_TXN2_CARD28
PCIE_TXP2_CARD2 8
PCIE_RXN3_WL AN33
PCIE_RXP3_WLAN33
PCIE_TXN3_WL AN33
PCIE_TXP3_WL AN33
PCIE_RXN4_LAN27
PCIE_RXP4_LAN27
PCIE_TXN4_LAN27
PCIE_TXP4_LAN2 7
+V1.05S_AUSB3PLL10
WLAN
USB30_RX3-32
USB30_RX3+32
USB30_TX3-32
USB30_TX3+32
LAN
PEG_RXN018
PEG_RXP018
PEG_TXN018
PEG_TXP018
PEG_RXN118
PEG_RXP118
PEG_TXN118
PEG_TXP118
PEG_RXN218
PEG_RXP218
PEG_TXN218
PEG_TXP218
PEG_RXN318
PEG_RXP318
PEG_TXN318
PEG_TXP318
VGA
3
U25K
G17
PERN1 / USB3RN3
F17
PERP1 / USB3RP3
C30
PETN1 / USB3TN3
C31
PETP1 / USB3TP3
F15
PERN2/ USB3RN4
G15
PERP2/ USB3RP4
PCIE_RCOMP
B31
PETN2/ USB3TN4
A31
PETP2/ USB3TP4
G11
PERN3
F11
PERP3
C29
PETN3
B30
PETP3
F13
PERN4
G13
PERP4
B29
PETN4
A29
PETP4
F10
PERN5_L0
E10
PERP5_L0
C23
PETN5_L0
C22
PETP5_L0
F8
PERN5_L1
E8
PERP5_L1
B23
PETN5_L1
A23
PETP5_L1
H10
PERN5_L2
G10
PERP5_L2
B21
PETN5_L2
C21
PETP5_L2
E6
PERN5_L3
F6
PERP5_L3
B22
PETN5_L3
A21
PETP5_L3
B27
PCIE_IREF
A27
PCIE_RCOMP
E15
RSVD
E13
RSVD
C43
CLKOUT_PCIE0N
C42
CLKOUT_PCIE0P
U2
PCIECLKRQ0# / GPIO18
B41
CLKOUT_PCIE_N1
A41
CLKOUT_PCIE_P1
Y5
PCIECLKRQ1# / GPIO19
C41
CLKOUT_PCIE_N2
B42
CLKOUT_PCIE_P2
AD1
PCIECLKRQ2# / GPIO20
B38
CLKOUT_PCIE_N3
C37
CLKOUT_PCI_P3
N1
PCIECLKRQ3# / GPIO21
A39
CLKOUT_PCIE_N4
B39
CLKOUT_PCIE_P4
U5
PCIECLKRQ4# / GPIO22
B37
CLKOUT_PCIE_N 5
A37
CLKOUT_PCIE_P5
T2
PCIECLKRQ5# / GPIO23
*HSW_UL T_DDR3L
C705 0.1U/10V_4
C711 0.1U/10V_4
C256 0.1U/10V_4
C244 0.1U/10V_4
C698 0.1U/10V_4
C701 0.1U/10V_4
C691 0.22U/10V_4
C692 0.22U/10V_4
C686 0.22U/10V_4
C687 0.22U/10V_4
C690 0.22U/10V_4
C688 0.22U/10V_4
C693 0.22U/10V_4
C689 0.22U/10V_4
CLK_PCIE_CRN28
CLK_PCIE_CRP28
PCIE_CLKREQ_CR #28
CLK_PCIE_WL ANN33
CLK_PCIE_WL ANP33
PCIE_CLKREQ_W LAN#33
CLK_PCIE_LANN27
CLK_PCIE_LANP27
PCIE_CLKREQ_LAN#27
CLK_VGA_N18
CLK_VGA_P18
PCIE_CLKREQ_VGA#18
PCIE_TXN2_CARD_C
PCIE_TXP2_CARD_C
PCIE_TXN3_WL AN_C
PCIE_TXP3_WL AN_C
PEG_TXN0_C
PEG_TXP0_C
PEG_TXN1_C
PEG_TXP1_C
PEG_TXN2_C
PEG_TXP2_C
PEG_TXN3_C
PEG_TXP3_C
R150 3.01K/F_4
PCIE_CLKREQ0#
PCIE_CLKREQ_CR #
CLK_PCIE_WL ANN
CLK_PCIE_WL ANP
PCIE_CLKREQ_W LAN#
CLK_PCIE_LANN
CLK_PCIE_LANP
PCIE_CLKREQ_LAN#
CLK_VGA_N
CLK_VGA_P
PCIE_CLKREQ_VGA#
PCIE_CLKREQ5#
PCIE_RXN4_LAN
PCIE_RXP4_LAN
PCIE_TXN4_LAN_C
PCIE_TXP4_LAN_C
PCIE_IREF
CLK_PCIE_CRN
CLK_PCIE_CRP
2
SMBALERT# / GPIO11(SUS)
SMBUS
SML0ALERT# / GPIO60(SUS)
SML1ALERT# / PCHHOT# / GPIO73(SUS)
SML1DATA / GPIO74(SUS)
PCI-E*
CLOCK SIGNALS
SMBCLK
SMBDATA
SML0CLK
SML0DATA
SML1CLK / GPIO75(SUS)
XTAL24_IN
XTAL24_OUT
CLKOUT_ITPXDP#
CLKOUT_ITPXDP_P
CLKOUT_LPC_0
CLKOUT_LPC_1
DIFFCLK_BIASREF
RSVD
RSVD
TESTLOW_C35
TESTLOW_C34
TESTLOW_AK8
TESTLOW_AL8
AN2
SMBALERT#
AP2
SMB_PCH_CL K
AH1
SMB_PCH_DAT
AL2
SML0ALERT#
AN1
SMB_ME0_CLK
AK1
SMB_ME0_DAT
AU4
SML1ALERT#
AU3
SMB_ME1_CLK
AH3
SMB_ME1_DAT
A25
XTAL24_IN
B25
XTAL24_OUT
B35
CK_XDP_N_R
A35
CK_XDP_P_R
RP1 install for XDP
AN15
CLK_PCI_EC_R
AP15
CLK_PCI_LPC_R
C26
XCLK_BIASREF
K21
M21
C35
R148 10K /F_4
C34
R152 10K /F_4
AK8
R239 10K /F_4
AL8
R245 10K /F_4
4
2
R242 22_4
R254 22_4
R243 22_4
R149
3.01K/F_4
TP10
*0_4P2R_4
RP1
EC26 18P/50V_4
EC29 18P/50V_4
EC27 *18P/50V_4
1
3
1
EMI(near PCH)
EMI(near PCH)
08
CK_XDP_N 11
CK_XDP_P 11
CLK_24M_KBC 34
CLK_24M_DE BUG 3 3
CLK_PCI_TPM 31
+V1.05S_AXCK_LCPL L 10
*HSW_UL T_DDR3L
SMBus/Pull-up(CLG) CLK_REQ/Strap Pin(CLG)
Q38
MBCLK213,23,34
MBDATA213,23,34
A A
R185 4.7K_4
+3V
SMB_RUN_DAT11 ,12,13,23,29
R194 4.7K_4
+3V
SMB_RUN_CL K11,12,13,23,29
5
4 3
1
*2N7002DW
Q12
4 3
1
2N7002DW
+3V
5
SMB_ME1_CLK
2
6
SMB_ME1_DAT
+3V
5
SMB_PCH_DAT
2
6
SMB_PCH_CL K
4
PCIE_CLKREQ0#
PCIE_CLKREQ5#
PCIE_CLKREQ_W LAN#
PCIE_CLKREQ_LAN#
PCIE_CLKREQ_CR #
PCIE_CLKREQ_VGA#
R534 10K_4
R535 10K_4
R530 10K_4
R519 10K_4
R268 10K_4
R158 10K_4
+3V
R147 *0_4/S
XTAL24_IN
XTAL24_OUT
3
R153
*1M_4
1
3
TP4
C246 *12P/50V_4
2
*24MHZ +-30PP M
Y1
4
C245 *12P/50V_4
TP5
PCH_XTAL24_IN 3 1
+3V_DEEP_SUS6,7,9,10,11
2
for DS3
+3V_DEEP_SUS
+3V6,7,9,10,11,12,13 ,18,19,20,23,24,25,26,2 7,28,29,30,31,33,34,39,4 0,41
NB5
NB5
NB5
SMBus/Pull-up(CLG)
R570 2.2K_ 4
R566 2.2K_ 4
R569 2.2K_ 4
R568 2.2K_ 4
R572 2.2K_ 4
R560 2.2K_ 4
R238 10K _4
R192 1K_ 4
PROJECT : Y11C
PROJECT : Y11C
PROJECT : Y11C
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
SMB_PCH_CL K
SMB_PCH_DAT
SMB_ME0_CLK
SMB_ME0_DAT
SMB_ME1_CLK
SMB_ME1_DAT
SML1ALERT#
SML0ALERT#
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
ULT 7/9 (PCIE/USB/CLK)
ULT 7/9 (PCIE/USB/CLK)
ULT 7/9 (PCIE/USB/CLK)
1
8 44Friday, February 14, 2014
8 44Friday, February 14, 2014
8 44Friday, February 14, 2014
1A
1A
1A
5
SIO_EXT_SCI#34
BT_OFF33
RF_OFF_PCH6,33
D D
ZERO_ODD_DP#30
DEVSLP133
C C
BT_COMBO_EN#33
SI..Change ACCEL_INTA# to GPIO49...12/25
B B
TP for DG
ACCEL_INTA#31
ACZ_SPKR25
SPKR25
R177 *0_4
R553 *0_4
DGPU_PWROK20,34,42
DEVSLP1
BT_COMBO_EN#
MPHY_PWREN40
BT_OFF
RF_OFF_PCH_R
LAN_DISABLE#
GPIO13_ULT
GPIO14_ULT
ODD_PRSNT#_R
BOARD_ID6
GPIO25_ULT
BOARD_ID7
GPIO27
BOARD_ID8
DEVSLP0
DEVSLP2
GPIO44_ULT
BOARD_ID4
GPIO46_ULT
BOARD_ID5
GPIO49_ULT
GPIO50_ULT
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
GPIO70_ULT
MPHY_PWREN
GPIO76_ULT
SPKR
Lynx Point-LP Platform Controller Hub
Lynx Point-LP Platform Controller Hub
Lynx Point-LP Platform Controller HubLynx Point-LP Platform Controller Hub
(HDA,JTAG,SATA)
(HDA,JTAG,SATA)
(HDA,JTAG,SATA)(HDA,JTAG,SATA)
U25O
AU2
AM3
AM2
AM7
AT3
AH4
AD6
Y1
T3
AD5
AM4
AN3
AN5
AD7
P2
L2
N5
AK4
AG5
AG3
AB6
U4
Y3
P3
AG6
AP1
AL4
AT5
C4
Y2
P1
V2
*HSW_ULT_DDR3L
4
GPIO8(SUS)
GPIO9(SUS)
GPIO10(SUS)
LAN_PHY_PWR_CTRL / GPIO12( DSW)
GPIO13(SUS)
GPIO14(SUS)
GPIO15(SUS)
GPIO16
GPIO17
GPIO24 (SUS)
GPIO25(DSW)
GPIO26(SUS)
GPIO27(DSW)
GPIO28(SUS)
DEVSLP0/ GPIO33
DEVSLP1/ GPIO38
DEVSLP2/ GPIO39
GPIO44(SUS)
GPIO45(SUS)
GPIO46(SUS)
GPIO47(SUS)
GPIO48
GPIO49
GPIO50
GPIO56(SUS)
GPIO57(SUS)
GPIO58(SUS)
GPIO59(SUS)
SDIO_POWER_EN/ GPIO70
HSIOPC/ GPIO71
BMBUSY# / GPIO76
SPKR/ GPIO81
GPIO
Haswell (GPIO)
D60
RSVD
RSVD
PCH_THRMTRIP#
V4
T4
AW15
AF20
AB21
R6
L6
N6
L8
R7
L5
N7
K2
J1
K3
J2
G1
K4
G2
J3
J4
F2
F3
G4
F1
E3
F4
D3
E4
C3
E2
EC_RCIN#
SERIRQ
PCH_OPI_RCOMP
GSPI0_CS
GSPI0_CLK
GSPI0_MISO
GSPI1_CS
GSPI1_CLK
GSPI1_MISO
GSPI1_MOSI
UART0_RXD
UART0_TXD
UART0_RTS
UART0_CTS
UART1_RXD
UART1_TXD
UART1_RST
UART1_CTS
I2C0_SDA
I2C0_SCL
I2C1_SDA
I2C1_SCL
SDIO_CLK
SDIO_CMD
SDIO_D1
SDIO_D2
SDIO_D3
THRMTRIP#
RCIN#/ GPIO82
PCH_OPI_RCOMP
CPU/MISC
GSPI0_CS/ GPIO83
GSPI0_CLK/ GPIO84
GSPI0_MISO/ GPIO85
GSPI0_MOSI/ GPIO86
GSPI1_CS/ GPIO87
GSPI1_CLK/ GPIO88
GSPI1_MISO/ GPIO89
GSPI1_MOSI/ GPIO90
UART0_RXD/ GPIO91
UART0_TXD/ GPIO92
UART0_RTS/ GPIO93
UART0_CTS/ GPIO94
UART1_RXD/ GPIO0
SERIAL IO
UART1_TXD/ GPIO1
UART1_RST/ GPIO2
UART1_CTS/ GPIO3
I2C0_SDA/ GPIO4
I2C0_SCL/ GPIO5
I2C1_SDA/ GPIO6
I2C1_SCL/ GPIO7
SDIO_CLK/ GPIO64
SDIO_CMD/ GPIO65
SDIO_D0/ GPIO66
SDIO_D1/ GPIO67
SDIO_D2/ GPIO68
SDIO_D3/ GPIO69
SERIRQ
3
R529 10K_4
R583
49.9/F_4
PM_THRMTRIP# 34
EC_RCIN# 34
+3V
SERIRQ 31,34
2
UART1_RXD
I2C1_SDA
GSPI0_CLK
GSPI1_CLKSIO_EXT_SCI#
UART0_RXD
UART1_CTS
GSPI0_CS
GSPI1_CS
RP2
10
9
8
7 4
10K_10P8R_6
RP5
10
9
8
7 4
10K_10P8R_6
1
2
3
56
1
2
3
56
SDIO_D2
SDIO_D1
SDIO_CMD
SDIO_CLK
+3V
UART1_RST
UART0_RTS
UART0_CTS
UART1_TXD
+3V
GSPI1_MOSI
GSPI0_MISO
GSPI1_MISO
UART0_TXD
GPIO Pull-up/Pull-down(CLG)
Change R172 Netname
GPIO12 LAN_DISABLE#
SUS -->Check list
+3V -->Datasheet
Close to EC
PM_THRMTRIP#
RP6
10
9
8
7 4
10K_10P8R_6
SIO_EXT_SCI#
BT_OFF
RF_OFF_PCH_R
GPIO13_ULT
GPIO14_ULT
GPIO44_ULT
GPIO46_ULT
GPIO49_ULT
GPIO50_ULT
ODD_PRSNT#_R
DGPU_PWROK
DEVSLP0
DEVSLP2
BT_COMBO_EN#
GPIO70_ULT
EC_RCIN#
GPIO76_ULT
MPHY_PWREN
MPHY_PWREN
GPIO25_ULT
LAN_DISABLE#
GPIO27
1
1
I2C0_SCL
2
I2C1_SCL
3
I2C0_SDA
SDIO_D3
56
+3V
R173 10K_4
R169 10K_4
R626 10K_4
R184 1K_4
09
+3V_DEEP_SUS
R282 10K_4
R180 10K_4
R172 10K_4
R218 10K_4
R183 10K_4
R565 10K_4
R541 10K_4
R552 10K_4
R524 10K_4
R546 10K_4
R513 10K_4
R515 10K_4
R499 10K_4
R512 *10K_4
R486 10K_4
R269 10K_4
R525 10K_4
R544 100K_4
R545 *10K_4
+V1.05S_VCCST
+3V
+3VS5
Model
A A
BOARD_ID[6:5]
Reserve
BOARD_ID4
0
LVDS
Pavillian
EDP1
5
BOARD_ID[2:1]BOARD_ID3
01
15"
17"101 Envy
BOARD_ID0
0UMA14"000
1DIS
4
R174 *10K_4
R205 *10K_4 R199 10K_4
R558 10K_4
R248 *10K_4
R175 10K_4
R167 10K_4
R161 10K_4
R204 10K_4
R160 10K_4
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
BOARD_ID6
BOARD_ID7
BOARD_ID8
R539 10K_4
R559 *10K_4
R255 10K_4
R540 *10K_4
R549 *10K_4
R164 *10K_4
R198 *10K_4
R163 *10K_4
3
+3V_DEEP_SUS
Stuff
NC
+3V6,7,8,10,11,12,13,1 8,19,20,23,24,25,26,27,28,29, 30,31,33,34,39,40,41
+3VS56,7,10,11,25,29,31,32,3 3,36,38,40,43
PROJECT : Y11C
PROJECT : Y11C
DIS
UMA
Rb
Ra
Rb
Ra
2
NB5
NB5
NB5
PROJECT : Y11C
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
ULT 8/9 (GPIO/MISC)
ULT 8/9 (GPIO/MISC)
ULT 8/9 (GPIO/MISC)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
9 44Friday, February 14, 2014
9 44Friday, February 14, 2014
9 44Friday, February 14, 2014
1A
1A
1A
5
+1.05V
D D
1U/6.3V_4
+1.05V
+1.05V
VCCASW=658mA
TP8
+1.05V
C C
TP7
+V3.3DX_1.5DX_ADO
B B
+3V_DEEP_SUS
+3VS5
+3V
A A
VCC1_05=1.741A
C307 0.47U/6.3V_4
C309
+3VS5
Place close to
Pin AG19 and AG20
SI modify
C288 1U/6.3V_4
C735 22U/6.3V_6
PV install for RF
DcpSus1=109mA
C243 1U/6.3V_4
C235 1U/6.3V_4
C257 *1U/6.3V_4
+V1.05S_AIDLE
C281 *1U/6.3V_4
C708 1U/6.3V_4
C694 22U/6.3VS_6
C695 22U/6.3VS_6
C710 1U/6.3V_4
C700 22U/6.3VS_6
C699 22U/6.3VS_6
SI Change to 22uF for Intel recommend
DcpSus3=10mA
+V3.3DX_1.5DX_PAZSUS_PCH
C308 1U/6.3V_4
DcpSus2=25mA
TP9
VCCSUS3_3=63mA
C301 22U/6.3VS_6
VCCDSW3_3=114m A
C316 *1U/6.3V_4
C317 0.47U/6.3V_4
C125 22U/6.3VS_6
+V1.05S_CORE_PCH
C3061U/6.3V_4
C2941U/6.3V_4
C27410U/6.3VS_6
+PCH_VCCDSW
+V1.05M_ASW
+V1.05M_FHV0
+V1.05M_FHV1
+V1.05A_SUS_PCH
+V1.05DX_MODPHY_PCH
VCCHSIO=1.838A
+V1.05S_AUSB3PLL
VCCSATA3PLL=42 mA
+V1.05S_ASATA3PLL
+V1.05A_VCCUSB3SUS
VCCHDA=11mA
+V1.05A_USB2SUS
+V3.3A_PSUS
+3.3V_A_DSW_P
+V3.3S_PCORE
U25P
J11
VCC1_05
H11
VCC1_05
H15
VCC1_05
AE8
VCC1_05
AF22
VCC1_05
AG19
DCPSUSBYP
AG20
DCPSUSBYP
AE9
VCCASW
AF9
VCCASW
AG8
VCCASW
AG14
VCCASW
AG13
VCCASW
AD10
DCPSUS1
AD8
DCPSUS1
K9
VCCHSIO
L10
VCCHSIO
M9
VCCHSIO
N8
VCC1_05
P9
VCC1_05
B18
VCCUSB3PLL
B11
VCCSATA3PLL
J13
DCPSUS3
AH14
VCCHDA
AH13
DCPSUS2
AC9
VCCSUS3_3
AA9
VCCSUS3_3
AH10
VCCDSW3_3
V8
VCC3_3
W9
VCC3_3
INT
*HSW_ULT_DDR3L
+V3.3DX_1.5DX_ADO
POWER
CORE
VCCMPHY
USB3
HDA
VRM
GPIO/ LCC
R171 *0_4
R179 *0_4/S
4
RTC
SPI
ICC
THERMAL SENSOR
OPI
SERIAL IO
SUS OSCILLATOR
USB2
+1.5V
+3V
VCCSUS3_3
VCCRTC
DCPRTC
VCCSPI
VCCCLK
VCCCLK
VCCACLKPLL
VCCCLK
VCCCLK
VCCCLK
RSVD
RSVD
RSVD
VCCSUS3_3
VCCSUS3_3
VCCTS1_5
VCC3_3
VCC3_3
RSVD
VCCAPLL
VCCAPLL
VCCSDIO
VCCSDIO
DCPSUS4
RSVD
VCC1_05
VCC1_05
3
Lynx Point-LP Platform Controller Hub
(HDA,JTAG,SATA)(POWER)
+V3.3A_DSW_PRTCSUS
AH11
VCCRTC < 1mA
AG10
AE7
+VCCRTCEXT
VCCSPI=18mA
Y8
+V3.3M_PSPI
+V1.05S_AXCK_DCB
J18
K19
A20
+V1.05S_AXCK_LCPLL
J17
+V1.05S_SSCF100
R21
T21
+V1.05S_SSCFF
K18
M20
V21
AE20
+V3.3A_PSUS
AE21
VCCTS1_5=3mA
J15
+V1.5S_ATS
+V3.3S_PTS
K14
VCC3_3=41mA
K16
VCCAPLL=57mA
Y20
AA21
W21
+V1.05S_APLLOPI
VCCSDIO=17mA
U8
T9
+V3.3S_1.8S_SDIO_PCH
AB8
+V1.05A_AOSCSUS
AC20
AG16
+V1.05S_DUSB
AG17
C374 1U/6.3V_4
C311 0.1U/10V_4
C373 *0.1U/10V_4
2.2uH/500mA_6
L16
C289 1U/6.3V_4
C300 47U/6.3VS_6
C299 47U/6.3VS_6
L46 2. 2uH/500mA_6
C707 1U/6.3V_4
C697 47U/6.3VS_6
C696 47U/6.3VS_6
C273 1U/6.3V_4
C293 1U/6.3V_4
C175 0.1U/10V_4
C305 1U/6.3V_4
C282 1U/6.3V_4
DcpSus4=1mA
C291 1U/6.3V_4
C310 1U/6.3V_4
R278 *0_4
2.2uH PN CV-2205JZ00
C303 *47U/6.3VS_6
C304 *47U/6.3VS_6
+3V_DEEP_SUS
+3V_RTC
C364 1U/6.3V_4
C368 0.1U/10V_4
C371 0.1U/10V_4
+3V_DEEP_SUS
+3V
+1.05V
+1.05V
+1.05V
+1.05V
+V3.3A_PSUS
+1.5V
+3V
+1.05V
+3V
+1.05V
+1.05V_MODPHY
VCCACLKPLL=31m A
VCCCLK=200mA
SLP_SUS_ON34
2
1
10
L45 2.2uH/500 mA_6
L44 2.2uH/500 mA_6
R563
100K_4
C724
*10P/50V_4
C720
1U/6.3V_4
20mil
20mil
for DS3
U26
5
IN
4
IN
3
ON/OFF
IC(5P) G5243AT11U-Lay
+V1.05S_ASATA3PLL
+V1.05S_AUSB3PLL
+V1.05DX_MODPHY_PCH
+3V_DEEP_SUS+3VS5
1
OUT
2
GND
C726
0.1U/10V_4
+5V24,25,26,29,30,31, 32,33,40
+1.05V2,4,7,9,11,31,34,38 ,39,40,43
+3VS56,7,9,11,25,29,31,3 2,33,36,38,40,43
+5VS513,25,29,32,36,37,38, 39,40,41,42,43
5
+V1.05S_AUSB3PLL8
+V1.05S_ASATA3PLL7
+V1.05S_AXCK_LCPLL8
+3V6,7,8,9,11,12,13,18 ,19,20,23,24,25,26,27,28,29,3 0,31,33,34,39,40,41
+3V_RTC7 ,31
+1.35VSUS2,4,12,13,29,37
4
3
2
NB5
NB5
NB5
PROJECT : Y11C
PROJECT : Y11C
PROJECT : Y11C
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
ULT 9/9(POWER-2)
ULT 9/9(POWER-2)
ULT 9/9(POWER-2)
Date: Sheet
Date: Sheet of
Date: Sheet of
1
10 44Friday, February 14, 2014
10 44Friday, February 14, 2014
10 44Friday, February 14, 2014
of
1A
1A
1A
5
D D
H_VCCST_PWRGD4
+1.05V
C C
H_VCCST_PWRGD VCCST_PWRGD_XDP
C380 0.1U/10V_4
4
XDP_PREQ#_CPU2
XDP_PRDY#_CPU2
CFG04
CFG14
CFG24
CFG34
XDP_BPM02
XDP_BPM12
CFG44
CFG54
CFG64
R289 1K_4
CFG74
PWR_DEBUG4
SMB_RUN_DAT8,12,13,23,29
SMB_RUN_CLK8,12,13,23,29
XDP_TCK02,7
R288 1K_4
CFG1
CFG2
CFG3
OBSFN_B0
OBSFN_B1
CFG4
CFG5
CFG6
CFG7
DNBSWON#
H_SYS_PWROK_XDP
XDP_TCK1
XDP_TCK0
3
CN8
31
*SEC_BSH-030-01-L-D-A-TR
31
323229
333328
343427
353526
363625
373724
383823
393922
404021
414120
424219
434318
444417
454516
464615
474714
484813
494912
505011
515110
52529
53538
54547
55556
56565
57574
58583
59592
60601
30
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
OBSFN_C0
OBSFN_C1
CFG8
CFG9
CFG10
CFG11
OBSFN_D0
OBSFN_D1
CFG12
CFG13
CFG14
CFG15
XDP_RST
XDP_DBRESET_N
XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
R270 1K_4
CFG17 4
CFG16 4
CFG8 4
CFG9 4
CFG10 4
CFG11 4
CFG19 4
CFG18 4
CFG12 4
CFG13 4
CFG14 4
CFG15 4
CK_XDP_P 8
CK_XDP_N 8
CFG3
2
1
11
+1.05V
C361 0.1U/10V_4
XDP_DBRESET_N
APS
B B
CN9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
*ACES_88511-180N
A A
5
+3VS5+3V_DEEP_SUS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
R283 *0_4
SUSB# 6,11,34
SLP_S5# 6
SUSC# 6,34
SLP_A# 6
RTC_RST# 7
DNBSWON# 6,34
SYS_RESET# 6
PCH_SLP_S0_N 6,34
SUSB# 6,11,34
+3V_DEEP_SUS
4
R263 1K_4
C362
0.1U/10V_4
+V1.05S_VCCST
JTAGX_PCH2,7
JTAG_TMS_PCH7
JTAG_TDI_PCH7
JTAG_TDO_PCH7
JTAG_TCK_PCH7
3
HWPG4,34,36,37,38
R271 *0_4
+3V
XDP_TDO
XDP_TDI_R
XDP_TMS
XDP_TRST#
R264 *51_4
R287 *0_4
R286 *0_4
H_SYS_PWROK_XDP
+3V
XDP_TDI_RXDP_TDI
XDP_TDO
XDP_TCK0
XDP_TMS
XDP_TDI
XDP_TDO
XDP_TCK0XDP_TDI_R
XDP_TCK1
R290 *1K_4
C381
0.1U/10V_4
C378
0.1U/10V_4
U12
14
VCC
2
1A
1
1OE
5
2A
4
2OE
9
3A
10
3OE
12
4A
13
4OE
*SN74CBTLV3126RGYR
+3V_DEEP_SUS
3
1B
6
2B
8
3B
11
4B
15
DPAD
7
GND
SYS_PWROK6,34
PLTRST#6,18,27,28,31,33,34
NB5
NB5
2
NB5
R262 1K_4
PROJECT : Y11C
PROJECT : Y11C
PROJECT : Y11C
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
XDP_TDO_CPU 2
XDP_TDI_CPU 2
XDP_TMS_CPU 2
XDP_TRST#_CPU 2,7
H_SYS_PWROK_XDP
XDP_RST
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
HSW XDP & APS
HSW XDP & APS
HSW XDP & APS
ULT
ULT
ULT
1
11 44Friday, February 14, 2014
11 44Friday, February 14, 2014
11 44Friday, February 14, 2014
1A
1A
1A
5
DIMM & Footprint
M_A_A[15:0]3
D D
M_A_BS#03
M_A_BS#13
M_A_BS#23
M_A_CS#03
M_A_CS#13
M_A_CLKP03
M_A_CLKN03
M_A_CLKP13
M_A_CLKN13
M_A_CKE03
M_A_CKE13
M_A_CAS#3
M_A_RAS#3
R348 10K/F_4
R340 10K/F_4
C C
M_A_WE#3
SMB_RUN_CLK8,11,13,23,29
SMB_RUN_DAT8,11,13,23,29
M_A_ODT013
M_A_ODT113
M_A_DQSP[7:0]3
M_A_DQSN[7:0]3
CPU Bracket
B B
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
DIMM0_SA0
DIMM0_SA1 +SMDDR_VREF_DIMM
SMB_RUN_CLK
SMB_RUN_DAT
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
JDIM2A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186
PC2100 DDR3 SDRAM SO-DIMM
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DDR3-DIMM0_H=4.0_STD
ddr-ddrsk-20401-tp4b-204p-ldv
DGMK4000396
IC SOCKET DDR3 SODIMM(204P,H4.0,STD)
4
Joshua
5
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
(204P)
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
EZIW
M_A_DQ5
7
M_A_DQ4
15
M_A_DQ6
17
M_A_DQ2
4
M_A_DQ1
6
M_A_DQ0
16
M_A_DQ7
18
M_A_DQ3
21
M_A_DQ13
23
M_A_DQ12
33
M_A_DQ14
35
M_A_DQ15
22
M_A_DQ9
24
M_A_DQ8
34
M_A_DQ11
36
M_A_DQ10
39
M_A_DQ21
41
M_A_DQ20
51
M_A_DQ19
53
M_A_DQ23
40
M_A_DQ17
42
M_A_DQ16
50
M_A_DQ18
52
M_A_DQ22
57
M_A_DQ24
59
M_A_DQ25
67
M_A_DQ31
69
M_A_DQ27
56
M_A_DQ28
58
M_A_DQ29
68
M_A_DQ30
70
M_A_DQ26
129
M_A_DQ36
131
M_A_DQ33
141
M_A_DQ34
143
M_A_DQ35
130
M_A_DQ32
132
M_A_DQ37
140
M_A_DQ38
142
M_A_DQ39
147
M_A_DQ44
149
M_A_DQ45
157
M_A_DQ46
159
M_A_DQ42
146
M_A_DQ40
148
M_A_DQ41
158
M_A_DQ47
160
M_A_DQ43
163
M_A_DQ49
165
M_A_DQ52
175
M_A_DQ50
177
M_A_DQ51
164
M_A_DQ55
166
M_A_DQ48
174
M_A_DQ54
176
M_A_DQ53
181
M_A_DQ59
183
M_A_DQ56
191
M_A_DQ63
193
M_A_DQ58
180
M_A_DQ57
182
M_A_DQ60
192
M_A_DQ62
194
M_A_DQ61
M_A_DQ[63:0] 3
3
2
+1.35VSUS
2.48A
+3V
R334 10K/F_4
+3V
PM_EXTTS#013
DDR3_DRAMRST#2,13
PM_EXTTS#0
C472 *0.1U/10V_4
+SMDDR_VREF_DQ0SMDDR_VREF_DQ0_M1
JDIM2B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3-DIMM0_H=4.0_STD
ddr-ddrsk-20401-tp4b-204p-ldv
DGMK4000396
IC SOCKET DDR3 SODIMM(204P,H4.0,STD)
(204P)
PC2100 DDR3 SDRAM SO-DIMM
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VTT1
VTT2
GND
GND
+SMDDR_VREF_DIMM13
1
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
205
206
+3V6,7,8,9,10,11,13,18,19 ,20,23,24,25,26,27,28,29,30,3 1,33,34,39,40,41
+1.35VSUS2,4,13,29,37
+0.65V_DDR_VTT13,37
12
+0.65V_DDR_VTT
1uF/10uF 4pcs on each side of connector
For EMI RESERVE
+1.35VSUS
EC43 *120P/50V_4
EC31 *120P/50V_4
EC36 *120P/50V_4
EC51 120P/50V_4
EC35 *120P/50V_4
EC52 *120P/50V_4
EC34 *120P/50V_4
A A
5
+0.65V_DDR_VTT
EC38 *120P/50V_4
EC32 *120P/50V_4
+1.35VSUS
EC47 *120P/50V_4
EC53 *120P/50V_4
EC48 *120P/50V_4
EC40 *0.1U/10V_4
EC33 *0.1U/10V_4
EC39 *0.1U/10V_4
EC46 *0.1U/10V_4
4
+1.35VSUS +0.65V_DDR_VTT
Place these Caps near So-Dimm0.
C505 1U/6.3V_4
C507 1U/6.3V_4
C506 1U/6.3V_4
C474 1U/6.3V_4
C476 1U/6.3V_4
C475 1U/6.3V_4
C480 1U/6.3V_4
C479 1U/6.3V_4
C504 10U/6.3V_6
C503 10U/6.3V_6
C502 10U/6.3V_6
C477 10U/6.3V_6
C478 10U/6.3V_6
C532 10U/6.3V_6
C501 10U/6.3V_6
C531 10U/6.3V_6
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
+3V
3
C495 1U/6.3V_4
C466 1U/6.3V_4
C494 1U/6.3V_4
C484 1U/6.3V_4
C490 10U/6.3V_6
C515 *0.1U/10V_4
C500 *2.2U/6.3V_4
C470 *0.1U/10V_4
C469 *2.2U/6.3V_4
C437 0.1U/10V_4
C444 2.2U/6.3V_4
SMDDR_VREF_DQ0_M33
2
SMDDR_VREF_DQ0_M3
R349
24.9/F_4 R379
R350 2/F_6
C468
0.022U/25V_4
2 1
SM_VREF3
NB5
NB5
NB5
+1.35VSUS
VREF DQ0 M1 Solution
R352
1.8K/F_4
SMDDR_VREF_DQ0_M1
R351
1.8K/F_4
R380 2/F_6
C540
0.022U/25V_4
2 1
R371
24.9/F_4
PROJECT : Y11C
PROJECT : Y11C
PROJECT : Y11C
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
DDR3 DIMM0-STD(4.0H)
DDR3 DIMM0-STD(4.0H)
DDR3 DIMM0-STD(4.0H)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
+1.35VSUS
1.8K/F_4
+SMDDR_VREF_DIMM
R370
1.8K/F_4
1A
1A
1A
12 44Friday, Februa ry 14, 2014
12 44Friday, Februa ry 14, 2014
12 44Friday, Februa ry 14, 2014
5
DIMM & Footprint
M_B_A[15:0]3
D D
M_B_BS#03
M_B_BS#13
M_B_BS#23
M_B_CS#03
M_B_CS#13
M_B_CLKP03
M_B_CLKN03
M_B_CLKP13
M_B_CLKN13
M_B_CKE03
M_B_CKE13
M_B_CAS#3
M_B_RAS#3
R323 10K/F_4
R321 10K/F_4
+3V
C C
B B
M_B_WE#3 +SMDDR_VREF_DIMM12
SMB_RUN_CLK8,11,12,23,29
SMB_RUN_DAT8,11,12,23,29
M_B_DQSP[7:0]3
M_B_DQSN[7:0]3
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
DIMM1_SA0
DIMM1_SA1
M_B_ODT0
M_B_ODT1
M_B_DQSP2
M_B_DQSP0
M_B_DQSP1
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_DQSN2
M_B_DQSN0
M_B_DQSN1
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7
107
119
109
108
114
121
101
103
102
104
115
110
113
197
201
202
200
116
120
136
153
170
187
137
154
171
188
135
152
169
186
4
JDIM1A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
A10/AP
84
A11
83
A12/BC#
A13
80
A14
78
A15
BA0
BA1
79
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
73
CKE0
74
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
ODT0
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
DM4
DM5
DM6
DM7
12
29
47
64
10
27
45
62
PC2100 DDR3 SDRAM SO-DIMM
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DDR3-DIMM1_H=4.0_RVS
ddr-ddrrk-20401-tp4b-204p-ruv
DGMK4000394
(204P)
Joshua
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
3
5
M_B_DQ22
7
M_B_DQ23
15
M_B_DQ21
17
M_B_DQ18
4
M_B_DQ16
6
M_B_DQ17
16
M_B_DQ20
18
M_B_DQ19
21
M_B_DQ4
23
M_B_DQ5
33
M_B_DQ6
35
M_B_DQ7
22
M_B_DQ2
24
M_B_DQ3
34
M_B_DQ1
36
M_B_DQ0
39
M_B_DQ9
41
M_B_DQ8
51
M_B_DQ11
53
M_B_DQ10
40
M_B_DQ12
42
M_B_DQ13
50
M_B_DQ15
52
M_B_DQ14
57
M_B_DQ26
59
M_B_DQ27
67
M_B_DQ29
69
M_B_DQ28
56
M_B_DQ30
58
M_B_DQ31
68
M_B_DQ24
70
M_B_DQ25
129
M_B_DQ32
131
M_B_DQ33
141
M_B_DQ38
143
M_B_DQ34
130
M_B_DQ36
132
M_B_DQ37
140
M_B_DQ35
142
M_B_DQ39
147
M_B_DQ40
149
M_B_DQ43
157
M_B_DQ47
159
M_B_DQ46
146
M_B_DQ41
148
M_B_DQ42
158
M_B_DQ44
160
M_B_DQ45
163
M_B_DQ52
165
M_B_DQ51
175
M_B_DQ54
177
M_B_DQ48
164
M_B_DQ49
166
M_B_DQ55
174
M_B_DQ50
176
M_B_DQ53
181
M_B_DQ63
183
M_B_DQ62
191
M_B_DQ59
193
M_B_DQ60
180
M_B_DQ56
182
M_B_DQ57
192
M_B_DQ61
194
M_B_DQ58
M_B_DQ[63:0] 3
PM_EXTTS#012
DDR3_DRAMRST#2,12
SMDDR_VREF_DQ1_M1 +SMDDR_VREF_DQ1
Local Thermal Sensor
MV
MBCLK28,23,34
MBDATA28,23 ,34
R386 10K/F_4
+3V
MBCLK2
MBDATA2
PM_EXTTS#0
2
+1.35VSUS
2.48A
+3V
PM_EXTTS#0
C471 *0.1U/10V_4
U16
8
SCLK
7
SDA
6
ALERT#
4
OVERT#
EMC1412-1-ACZL-TR
Need Check PN(EOD)
JDIM1B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3-DIMM1_H=4.0_RVS
ddr-ddrrk-20401-tp4b-204p-ruv
DGMK4000394
1
VCC
2
DXP
3
DXN
5
GND
1
44
VSS16
48
VSS17
49
VSS18
54
VSS19
55
VSS20
60
VSS21
61
VSS22
65
VSS23
66
VSS24
71
VSS25
72
VSS26
127
VSS27
128
VSS28
133
VSS29
134
VSS30
138
VSS31
139
VSS32
144
VSS33
145
VSS34
150
VSS35
151
VSS36
155
VSS37
156
VSS38
161
VSS39
162
VSS40
167
VSS41
168
VSS42
172
VSS43
173
VSS44
178
VSS45
179
VSS46
184
VSS47
185
VSS48
189
VSS49
190
VSS50
195
VSS51
196
VSS52
VTT1
(204P)
VTT2
PC2100 DDR3 SDRAM SO-DIMM
HOLE1
HOLE2
PAD1
PAD2
C521 0.01U/16V_4
DDR_THERMDA
C534
2200P/50V_4
DDR_THERMDC
203
204
205
206
207
208
+0.65V_DDR_VTT
+3V
DDR3 Thermal Sensor
2
Q23
METR3904-G
1 3
Main:AL001412003 EMC1412-1-ACZL-TR(98h)
13
2nd:AL000431014 TMP431ADGKR(98h)
+5VPCU
R381
100K_4
Q26
DRC5144E0L
2
A A
DDR_PG_CNTL
1 3
C533
0.1U/10V_4
2
1
DDR_PG_CNTL 2
5
3
Q25
2N7002K
R383
220K_4
DDR_VTT_PG_CTRL
R382 *0_4
R373
*2M/F_4
DDR3L SODIMM ODT GENERATION
+1.35VSUS+5VS5
2N7002
Q24
3
2
51216S3 37
1
R366 66.5/F_4
R367 66.5/F_4
R332 66.5/F_4
R333 66.5/F_4
Place these Caps near So-Dimm1.
1uF/10uF 4pcs on each side of connector
M_A_ODT0 12
M_A_ODT1 12
M_B_ODT0
M_B_ODT1
+1.35VSUS2,4,12,29,37
+0.65V_DDR_VTT12,37
+3V6,7,8,9,10,11,12,18,19 ,20,23,24,25,26,27,28,29,30,3 1,33,34,39,40,41
4
+1.35VSUS
C450 1U/6.3V_4
C454 1U/6.3V_4
C508 1U/6.3V_4
C452 1U/6.3V_4
C449 1U/6.3V_4
C448 1U/6.3V_4
C453 1U/6.3V_4
C447 1U/6.3V_4
C416 10U/6.3V_6
C412 10U/6.3V_6
C414 10U/6.3V_6
C413 10U/6.3V_6
C418 10U/6.3V_6
C415 10U/6.3V_6
C419 10U/6.3V_6
C398 10U/6.3V_6
+0.65V_DDR_VTT
C430 1U/6.3V_4
C431 1U/6.3V_4
C425 1U/6.3V_4
C465 1U/6.3V_4
C423 10U/6.3V_6
+3V
C408 0.1U/10V_4
C530 2.2U/6.3V_4
3
+SMDDR_VREF_DIMM
C446 *0.1U/10V_4
C436 *2.2U/6.3V_4
+SMDDR_VREF_DQ1
C457 *0.1U/10V_4
C459 *2.2U/6.3V_4
SMDDR_VREF_DQ1_M33
2
VREF DQ1 M1 Solution
SMDDR_VREF_DQ1_M3
R336 24.9/F_4
PROJECT : Y11C
PROJECT : Y11C
PROJECT : Y11C
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
R331 2/F_6
C440
0.022U/25V_4
2 1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
DDR3 DIMM1-RVS(4.0H)
DDR3 DIMM1-RVS(4.0H)
DDR3 DIMM1-RVS(4.0H)
+1.35VSUS
1
R319
1.8K/F_4
SMDDR_VREF_DQ1_M1
R320
1.8K/F_4
13 44Friday, Februa ry 14, 2014
13 44Friday, Februa ry 14, 2014
13 44Friday, Februa ry 14, 2014
1A
1A
1A
1
A A
B B
C C
PLACE CLOSE TO GPU BALLS
+3V_AON
+3V_GFX
D D
1
2
PEX_IOVDD/Q : 3300mA
To be placed no further from the GPU
than bewteen the PS and GPU
+1.05V_GFX
C221 22U/6.3VS_6
C682 22U/6.3VS_6
C681 22U/6.3VS_6
C222 22U/6.3VS_6
C219 10U/6.3VS_6
C220 10U/6.3VS_6
C213 10U/6.3VS_6
C223 10U/6.3VS_6
PLACE NEAR BALLS
C207 1U/6.3V_4
C206 1U/6.3V_4
C224 1U/6.3V_4
C191 1U/6.3V_4
PLACE UNDER BGA
C208 4.7U/6.3V_4
C218 4.7U/6.3V_4
PLACE CLOSE TO BGA
C445 4.7U/6.3V_6
C197 1U/6.3V_4
C188 0.1U/10V_4
VDD33 : 85mA
PLACE CLOSE TO BGA
C190 4. 7U/6.3V_4
C426 1U/6.3V_4
PLACE CLOSE TO GPU BALLS
C429 0.1U/10V_4
C353 0.1U/10V_4
2
AG19
AG21
AG22
AG24
AH21
AH25
AG13
AG15
AG16
AG18
AG25
AH15
AH18
AH26
AH27
AJ27
AK27
AL27
AM28
AN28
AC6
AJ28
AL11
AJ4
AJ5
C15
D19
D20
D23
D26
H31
T8
V32
J8
K8
L8
M8
3
U22A
N15P-GT-A2
PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4
PEX_IOVDD_5
PEX_IOVDD_6
PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8
PEX_IOVDDQ_9
PEX_IOVDDQ_10
PEX_IOVDDQ_11
PEX_IOVDDQ_12
PEX_IOVDDQ_13
PEX_IOVDDQ_14
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
VDD33_1
VDD33_2
VDD33_3
VDD33_4
3
[PEG Interface]
4
PEX_RX0
PEX_RX0_N
PEX_RX1
PEX_RX1_N
PEX_RX2
PEX_RX2_N
PEX_RX3
PEX_RX3_N
PEX_RX4
PEX_RX4_N
PEX_RX5
PEX_RX5_N
PEX_RX6
PEX_RX6_N
PEX_RX7
PEX_RX7_N
PEX_RX8
PEX_RX8_N
PEX_RX9
PEX_RX9_N
PEX_RX10
PEX_RX10_N
PEX_RX11
PEX_RX11_N
PEX_RX12
PEX_RX12_N
PEX_RX13
PEX_RX13_N
PEX_RX14
PEX_RX14_N
PEX_RX15
PEX_RX15_N
PEX_TX0
PEX_TX0_N
PEX_TX1
PEX_TX1_N
PEX_TX2
PEX_TX2_N
PEX_TX3
PEX_TX3_N
PEX_TX4
PEX_TX4_N
PEX_TX5
PEX_TX5_N
PEX_TX6
PEX_TX6_N
PEX_TX7
PEX_TX7_N
PEX_TX8
PEX_TX8_N
PEX_TX9
PEX_TX9_N
PEX_TX10
PEX_TX10_N
PEX_TX11
PEX_TX11_N
PEX_TX12
PEX_TX12_N
PEX_TX13
PEX_TX13_N
PEX_TX14
PEX_TX14_N
PEX_TX15
PEX_TX15_N
PEX_REFCLK
PEX_REFCLK_N
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT_N
PEX_WAKE
PEX_RST_N
PEX_CLKREQ_N
PEX_TERMP
TESTMODE
PEX_PLLVDD
PEX_PLL_HVDD
PEX_SVDD_3V3
3.3V_AUX_NC
VDD_SENSE
GND_SENSE
4
AN12
AM12
AN14
AM14
AP14
AP15
AN15
AM15
AN17
AM17
AP17
AP18
AN18
AM18
AN20
AM20
AP20
AP21
AN21
AM21
AN23
AM23
AP23
AP24
AN24
AM24
AN26
AM26
AP26
AP27
AN27
AM27
AK14
AJ14
AH14
AG14
AK15
AJ15
AL16
AK16
AK17
AJ17
AH17
AG17
AK18
AJ18
AL19
AK19
AK20
AJ20
AH20
AG20
AK21
AJ21
AL22
AK22
AK23
AJ23
AH23
AG23
AK24
AJ24
AL25
AK25
AL13
AK13
AJ26
AK26
AJ11
AJ12
AK12
AP29
AK11
AG26
AH12
AG12
P8
L4
L5
PEG_RXP0_C
PEG_RXN0_C
PEG_RXP1_C
PEG_RXN1_C
PEG_RXP2_C
PEG_RXN2_C
PEG_RXP3_C
PEG_RXN3_C
PEX_TSTCLK
PEX_TSTCLK#
VGA_RST#
PEX_CLKREQ#
PEX_TERMP
TESTMODE
PEX_PLLVDD
PEX_SVDD_3V3 : 210mA
PLACE NEAR BGA
VGPU_CORE_SENSE [41]
VSS_GPU_SENSE [41]
5
PEG_TXP0 [8]
PEG_TXN0 [8]
PEG_TXP1 [8]
PEG_TXN1 [8]
PEG_TXP2 [8]
PEG_TXN2 [8]
PEG_TXP3 [8]
PEG_TXN3 [8]
DGPU_HOLD_RST#[8]
C215 0.22U/10V_4
C214 0.22U/10V_4
C211 0.22U/10V_4
C212 0.22U/10V_4
C209 0.22U/10V_4
C210 0.22U/10V_4
C216 0.22U/10V_4
C217 0.22U/10V_4
CLK_VGA_P [8]
CLK_VGA_N [8]
R476 *200_4
R480 *0_4/ S
R478 10K_4
R141 2.49K/ F_4
R479 10K_4
PEX_PLLVDD : 150mA
C1120.1U/10V_4
C1164.7U/6.3V_4
C1074.7U/6.3V_4
5
6
+3V_GFX
R481 4.7K_4
PEX_CLKREQ#
10/02 modify : follow design guide
SYS_PEX_RST_MON#[17]
+3V
U4
PEG_RXP0 [8]
PEG_RXN0 [8]
PEG_RXP1 [8]
PEG_RXN1 [8]
PEG_RXP2 [8]
PEG_RXN2 [8]
PEG_RXP3 [8]
PEG_RXN3 [8]
2
1
3 5
GPU_PEX_RST_HOLD#[17]
4
+1.05V_GFX
PLACE NEAR GPU
PLACE NEAR GPU
PLACE UNDER GPU BALLS
PLTRST#[6,11,27,28,31,33,34]
+3V_AON
MC74VHC1G08DFT2G
PEGX_RST#
+3V_AON
R134 *0_6/S
C195 4.7U/6.3V_4
C196 1U/6.3V_4
C192 0.1U/10V_4
10/02 : Power rail change to +3V_AON
+3V_GFX[17,18,41,43]
+1.35V_GFX[15,18,19,20,21,22,42]
+1.05V_GFX[15,16,18,43]
+3V[6,7,8,9,10,11,12, 13,17,18,23,24,25,26,27,28,29,30,31,33 ,34,39,40,41]
6
2
C85
0.1U/10V_4
R452 0_4
R54 *0_4
Q33
DTC144EUA
1 3
NB5
NB5
NB5
7
PCIE_CLKREQ_VGA# [8]
2
Q34
DTC144EUA
1 3
+3V
C138
U5
2
1
MC74VHC1G08DFT2G
3 5
PROJECT : Y11C
PROJECT : Y11C
PROJECT : Y11C
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
N14P-GT - 1/5 (PCIE)
N14P-GT - 1/5 (PCIE)
N14P-GT - 1/5 (PCIE)
0.1U/10V_4
4
R60
100K_4
8
14 44Friday, February 14, 2014
14 44Friday, February 14, 2014
14 44Friday, February 14, 2014
8
14
PEGX_RST# [17]
1A
1A
1A