How it Works
Quanta
Loading...
XM1
Schematic
22 pgs777.59 Kb0

Quanta XM1 Schematic

Download
5
4
3
2
1
01
D D
Quanta Project Name: XM1
C C
Dell Project Name: Nike
G94 VGA
2008-03-17
REV : A1A
X01 Stage
B B
A A
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
CoverPage
CoverPage
CoverPage
XM1 G92 VGA 1A
XM1 G92 VGA 1A
XM1 G92 VGA 1A Monday, March 17, 2008
Monday, March 17, 2008
Monday, March 17, 2008
1
121
121
121
of
of
of
1
2
3
4
5
6
7
8
System Block Diagram for Nike G94 VGA
02
XM1 G94 PCBXM1 G94 PCB
A A
V-BIOS
SST25VF512 ADM1032ARMZ
PG 11
JTAGE
PG 11
Thermal IC
PG 18
LVDS Conn
IFPA/IFPBSPI
PG 13
GDDR3 Partition A
PG 6
B B
GFX card Conn.
PEG
NB9E-GLM3 (G92)
1148 BGA
64 bit DATA
64 bit DATA
PG 3, 4, 5, 10, 11, 12, 13, 14, 16, 17, 18, 19
64 bit DATA
64 bit DATA
PG 3
CRT DisplayPort(1st.) DisplayPort(2nd.)
C C
GDDR3 Partition B
PG 7
GDDR3 Partition C
PG 8
GDDR3 Partition D
PG 9
POWER
DC/DC
1.1V_GFX PCIE and 1.8V_MEM
VCORE
NV_VCORE
D D
1
2
3
PG 20
PG 21
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
4
5
6
Date: Sheet
COMPUTER
System Block Diagram
System Block Diagram
System Block Diagram
XM1 G92 VGA 1A
XM1 G92 VGA 1A
XM1 G92 VGA 1A Monday, March 17, 2008
Monday, March 17, 2008
Monday, March 17, 2008
7
of
of
of
221
221
221
8
A B C D E F G H
PEX Conn + GPU PEX
03
1
C267
C267
4.7U
4.7U
C258
C258
0.1U
0.1U
C255
C255
0.1U
0.1U
+3.3V_RUN
C293
C293
0.01U
0.01U
+1.1V_GFX_PCIE
C294
C294 22U
22U
C392
C392
0.1U
0.1U
+1.1V_GFX_PCIE
C249
C249
C393
C393
C273
4.7U
4.7U
C2841UC284 1U
NVVDD_SENSE 21 GND_SENSE 21
C273
4.7U
4.7U
22U
22U
C287
C287
C242
C242
0.1U
0.1U
0.1U
0.1U
L5
1.2V12MIL
C26
C26
C28
C28
4.7U
4.7U
0.1U
0.1U
Title
Title
Title
G92_PCIe_&_POWER
G92_PCIe_&_POWER
G92_PCIe_&_POWER
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
XM1 G92 VGA 1A
XM1 G92 VGA 1A
XM1 G92 VGA 1A Monday, March 17, 2008
Monday, March 17, 2008
Monday, March 17, 2008
Date: Sheet
Date: Sheet
Date: Sheet
0.01uHL50.01uH
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
+1.1V_GFX_PCIE
321
321
321
HFDBA
of
of
of
JVDO1
JVDO1
1
2
3
SBAT_SMBCLK13,18 SBAT_SMBDAT13,18
+3.3V_RUN
2
3
4
5
DP_TX0+15 DP_TX0-15
DP_TX1+15 DP_TX1-15
DP_TX2+15 DP_TX2-15
DP_TX3+15 DP_TX3-15
DP_AUX+15 DP_AUX-15
DP2_TX0+14 DP2_TX0-14
DP2_TX1+14 DP2_TX1-14
DP2_TX2+14 DP2_TX2-14
DP2_TX3+14 DP2_TX3-14
DP2_AUX+14 DP2_AUX-14
RUNPWROK20,21
PCIE_MRX_GTX_C_P0 PCIE_MRX_GTX_C_N0
PCIE_MRX_GTX_C_P1 PCIE_MRX_GTX_C_N1
PCIE_MRX_GTX_C_P2 PCIE_MRX_GTX_C_N2
PCIE_MRX_GTX_C_P3 PCIE_MRX_GTX_C_N3
PCIE_MRX_GTX_C_P4 PCIE_MRX_GTX_C_N4
PCIE_MRX_GTX_C_P5 PCIE_MRX_GTX_C_N5
PCIE_MRX_GTX_C_P6 PCIE_MRX_GTX_C_N6
PCIE_MRX_GTX_C_P7 PCIE_MRX_GTX_C_N7
PCIE_MRX_GTX_C_P8 PCIE_MRX_GTX_C_N8
PCIE_MRX_GTX_C_P9 PCIE_MRX_GTX_C_N9
PCIE_MRX_GTX_C_P10 PCIE_MRX_GTX_C_N10
PCIE_MRX_GTX_C_P11 PCIE_MRX_GTX_C_N11
PCIE_MRX_GTX_C_P12 PCIE_MRX_GTX_C_N12
PCIE_MRX_GTX_C_P13 PCIE_MRX_GTX_C_N13
PCIE_MRX_GTX_C_P14 PCIE_MRX_GTX_C_N14
PCIE_MRX_GTX_C_P15 PCIE_MRX_GTX_C_N15
+15V_ALW
5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99
101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199
LPF-SC200SFYG+
LPF-SC200SFYG+
4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
15
GFX_CARD_DET#
R45 0R45 0 R44 0R44 0
+5V_ALW
C358
C358
0.1U
0.1U
R59 0R59 0
R39 0R39 0
GFX_CARD_DET#
PCIE_MTX_GRX_P0 PCIE_MTX_GRX_N0
PCIE_MTX_GRX_P1 PCIE_MTX_GRX_N1
PCIE_MTX_GRX_P2 PCIE_MTX_GRX_N2
PCIE_MTX_GRX_P3 PCIE_MTX_GRX_N3
PCIE_MTX_GRX_P4 PCIE_MTX_GRX_N4
PCIE_MTX_GRX_P5 PCIE_MTX_GRX_N5
PCIE_MTX_GRX_P6 PCIE_MTX_GRX_N6
PCIE_MTX_GRX_P7 PCIE_MTX_GRX_N7
PCIE_MTX_GRX_P8 PCIE_MTX_GRX_N8
PCIE_MTX_GRX_P9 PCIE_MTX_GRX_N9
PCIE_MTX_GRX_P10 PCIE_MTX_GRX_N10
PCIE_MTX_GRX_P11 PCIE_MTX_GRX_N11
PCIE_MTX_GRX_P12 PCIE_MTX_GRX_N12
PCIE_MTX_GRX_P13 PCIE_MTX_GRX_N13
PCIE_MTX_GRX_P14 PCIE_MTX_GRX_N14
PCIE_MTX_GRX_P15 PCIE_MTX_GRX_N15
CLK_PCIE_VGA CLK_PCIE_VGA#
PCIE_RST#
GFX_CARD_DET#
R19 *0_NCR19 *0_NC
C356
C356
C361
C361
0.1U
0.1U
0.1U
0.1U
LCD_TST 13 LCD_VCC_EN 13 THERM_ALRT# 18 FP_BACK_EN 13
R46 0R46 0
+3.3V_SUS
DP_HP_DET 15 DP_CA_DET 15 DP2_HP_DET 14 DP2_CA_DET 14
CLK_DDC2 12 DAT_DDC2 12
VGA_BLU 12 VGA_GRN 12 VGA_RED 12 VGAVSYNC 12
VGAHSYNC 12 ACAV_IN_MB/DOCK 18 PNL_BKLT_CBL_DET# 13
LVDS_CBL_DET# 13
SPDIF_DP 11
C GE
+G_PWR_SRC
C362
C362
C78
C78
0.1U
0.1U
10U
10U
PLTRST#.
PCIE_RST#
CLK_PCIE_VGA CLK_PCIE_VGA#
PCIE_MRX_GTX_C_P0 PCIE_MRX_GTX_C_N0
PCIE_MTX_GRX_P0 PCIE_MTX_GRX_N0
PCIE_MRX_GTX_C_P1 PCIE_MRX_GTX_C_N1
PCIE_MTX_GRX_P1 PCIE_MTX_GRX_N1
PCIE_MRX_GTX_C_P2 PCIE_MRX_GTX_C_N2
PCIE_MTX_GRX_P2 PCIE_MTX_GRX_N2
PCIE_MRX_GTX_C_P3 PCIE_MRX_GTX_C_N3
PCIE_MTX_GRX_P3 PCIE_MTX_GRX_N3
PCIE_MRX_GTX_C_P4 PCIE_MRX_GTX_C_N4
PCIE_MTX_GRX_P4 PCIE_MTX_GRX_N4
PCIE_MRX_GTX_C_P5 PCIE_MRX_GTX_C_N5
PCIE_MTX_GRX_P5 PCIE_MTX_GRX_N5
PCIE_MRX_GTX_C_P6 PCIE_MRX_GTX_C_N6
PCIE_MTX_GRX_P6 PCIE_MTX_GRX_N6
PCIE_MRX_GTX_C_P7 PCIE_MRX_GTX_C_N7
PCIE_MTX_GRX_P7 PCIE_MTX_GRX_N7
PCIE_MRX_GTX_C_P8 PCIE_MRX_GTX_C_N8
PCIE_MTX_GRX_P8 PCIE_MTX_GRX_N8
PCIE_MRX_GTX_C_P9 PCIE_MRX_GTX_C_N9
PCIE_MTX_GRX_P9 PCIE_MTX_GRX_N9
PCIE_MRX_GTX_C_P10 PCIE_MRX_GTX_C_N10
PCIE_MTX_GRX_P10 PCIE_MTX_GRX_N10
PCIE_MRX_GTX_C_P11 PCIE_MRX_GTX_C_N11
PCIE_MTX_GRX_P11 PCIE_MTX_GRX_N11
PCIE_MRX_GTX_C_P12 PCIE_MRX_GTX_C_N12
PCIE_MTX_GRX_P12 PCIE_MTX_GRX_N12
PCIE_MRX_GTX_C_P13 PCIE_MRX_GTX_C_N13
PCIE_MTX_GRX_P13 PCIE_MTX_GRX_N13
PCIE_MRX_GTX_C_P14 PCIE_MRX_GTX_C_N14
PCIE_MTX_GRX_P14 PCIE_MTX_GRX_N14
PCIE_MRX_GTX_C_P15 PCIE_MRX_GTX_C_N15
PCIE_MTX_GRX_P15 PCIE_MTX_GRX_N15
C65 0.1UC65 0.1U
C61 0.1UC61 0.1U
C57 0.1UC57 0.1U
C54 0.1UC54 0.1U
C52 0.1UC52 0.1U
C50 0.1UC50 0.1U
C48 0.1UC48 0.1U
C46 0.1UC46 0.1U
C43 0.1UC43 0.1U
C41 0.1UC41 0.1U
C39 0.1UC39 0.1U
C37 0.1UC37 0.1U
C34 0.1UC34 0.1U
C33 0.1UC33 0.1U
C31 0.1UC31 0.1U
C27 0.1UC27 0.1U
R155 0R155 0
C62 0.1UC62 0.1U
C58 0.1UC58 0.1U
C55 0.1UC55 0.1U
C53 0.1UC53 0.1U
C51 0.1UC51 0.1U
C49 0.1UC49 0.1U
C47 0.1UC47 0.1U
C45 0.1UC45 0.1U
C42 0.1UC42 0.1U
C40 0.1UC40 0.1U
C38 0.1UC38 0.1U
C36 0.1UC36 0.1U
C35 0.1UC35 0.1U
C32 0.1UC32 0.1U
C30 0.1UC30 0.1U
C25 0.1UC25 0.1U
PEX_TX0 PEX_TX0#
PEX_TX1 PEX_TX1#
PEX_TX2 PEX_TX2#
PEX_TX3 PEX_TX3#
PEX_TX4 PEX_TX4#
PEX_TX5 PEX_TX5#
PEX_TX6 PEX_TX6#
PEX_TX7 PEX_TX7#
PEX_TX8 PEX_TX8#
PEX_TX9 PEX_TX9#
PEX_TX10 PEX_TX10#
PEX_TX11 PEX_TX11#
PEX_TX12 PEX_TX12#
PEX_TX13 PEX_TX13#
PEX_TX14 PEX_TX14#
PEX_TX15 PEX_TX15#
AW10
AW11 AW12
AW13 AW14
AW15
AW16
AW17 AW18
AW19
AW20 AW21
AW22
AW23 AW24
AW25 AW26
AW27
AY10
AU13 AV13
AY12 BA12
BB12 BB13
AV15 BA13
AY13 AV16
AY15 BA15
BB15 BB16
AV18 AU18
BA16 AY16
AV19
AY18 BA18
BB18 BB19
AV21 AU21
BA19 AY19
AV22
AY21 BA21
BB21 BB22
AV24 AU24
BA22 AY22
AU25 AV25
AY24 BA24
BB24 BB25
AV27 BA25
AY25 AU27
AT27 AY27
BA27
G1A
G1A
bga1504-nvidia-nb9e-glm2
bga1504-nvidia-nb9e-glm2 COMMON
COMMON
1/19 PCI_EXPRESS
1/19 PCI_EXPRESS
PEX_RST
PEX_CLKREQ
PEX_REFCLK PEX_REFCLK
PEX_TX0 PEX_TX0
PEX_RX0 PEX_RX0
PEX_TX1 PEX_TX1
PEX_RX1 PEX_RX1
PEX_TX2 PEX_TX2
PEX_RX2 PEX_RX2
PEX_TX3 PEX_TX3
PEX_RX3 PEX_RX3
PEX_TX4 PEX_TX4
PEX_RX4 PEX_RX4
PEX_TX5 PEX_TX5
PEX_RX5 PEX_RX5
PEX_TX6 PEX_TX6
PEX_RX6 PEX_RX6
PEX_TX7 PEX_TX7
PEX_RX7 PEX_RX7
PEX_TX8 PEX_TX8
PEX_RX8 PEX_RX8
PEX_TX9 PEX_TX9
PEX_RX9 PEX_RX9
PEX_TX10 PEX_TX10
PEX_RX10 PEX_RX10
PEX_TX11 PEX_TX11
PEX_RX11 PEX_RX11
PEX_TX12 PEX_TX12
PEX_RX12 PEX_RX12
PEX_TX13 PEX_TX13
PEX_RX13 PEX_RX13
PEX_TX14 PEX_TX14
PEX_RX14 PEX_RX14
PEX_TX15 PEX_TX15
PEX_RX15 PEX_RX15
PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD
PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ
VDD33 VDD33 VDD33 VDD33 VDD33
VDD_SENSE GND_SENSE
PEX_TSTCLK_OUT PEX_TSTCLK_OUT
PEX_PLLVDD
TESTMODE
PEX_CAL_PD_VDDQ
PEX_CAL_PU_GND
PEX_TERMP
AT18 AT24 AT25 AU15 AU16 AU19 AU22
AM17 AM18 AM19 AM20 AM24 AM25 AM26 AM27 AM28 AP18 AP19 AP21 AP22 AP24 AP25 AP27 AR15 AR16 AR18 AR19 AR21 AR22 AR24 AR25 AR27 AT15 AT16 AT19 AT21 AT22
L11 L12 L13 M11 N11
NVVDD_SENSE_R
AJ22 AJ21
AP16 AP17
AM16
BB27
AM21 AM22
AM23
C2741UC274 1U
C286
C286
0.1U
0.1U
C268
C268
0.1U
0.1U
GND_SENSE_R
R153 200R153 200
R234 10KR234 10K
R235 2.49KR235 2.49K R236 2.49KR236 2.49K
R237 2.49KR237 2.49K
C2911UC291 1U
C259
C259
0.1U
0.1U
C2601UC260 1U
C247
C247
0.1U
0.1U
C308
C308
0.1U
0.1U
R40 0R40 0 R43 0R43 0
PEX_PLLDVDD
C2721UC272 1U
C309
C309
0.1U
0.1U
+1.1V_GFX_PCIE
1
2
3
4
5
A B C D E F G H
FrameBuffer - GPU Partition A/B
FBA_CMD[27..0] 6 FBA_D[63..0] 6 FBA_DQM[7..0] 6 FBA_DQS_RN[7..0] 6 FBA_DQS_WP[7..0] 6
1
2
3
4
T138 PADT138 PAD T140 PADT140 PAD T142 PADT142 PAD T136 PADT136 PAD T137 PADT137 PAD T139 PADT139 PAD T141 PADT141 PAD T143 PADT143 PAD
FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63
FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7
FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7
FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7
FB_VREF
AL34 AK35 AK36
AJ34 AH34 AH35
AJ36 AK37 AL39 AL41 AL42 AK42
AJ39 AH39 AH41 AH42 AN35 AP36 AP37 AR37 AM34 AL35 AL36 AL37 AP41 AP42 AN39 AN40 AN41 AN42 AR40 AT39 AR31 AP32 AR33 AT31 AT34 AU34 AU35 AU31 BB33 BA33 AY33 BA34 BB34 AW33 AW36 AY35 AU30 AP28 AP31 AR28 AW28 AP29 AR30 AT30 AW31 BA31 BB31 BB30 AW29 BB28 BA28 AY28
AJ37 AM39 AP35 AP40 AR34 AY34 AU29 AW32
AH36 AK41 AM36 AP38 AT33 AV34 AT28 AY30
AH37 AK40 AN36 AP39 AT32 AW34 AU28 BA30
AH38 AL38 AN38 AR39 AV33 AW35 AT29 AV31
L32
G1B
G1B
bga1504-nvidia-nb9e-glm2
bga1504-nvidia-nb9e-glm2 COMMON
COMMON
2/19 FBA
2/19 FBA
FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63
FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7
FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7
FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7
FBA_DBI0 FBA_DBI1 FBA_DBI2 FBA_DBI3 FBA_DBI4 FBA_DBI5 FBA_DBI6 FBA_DBI7
FB_VREF
FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ
FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8
FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30
FBA_DEBUG
FBA_CLK0 FBA_CLK0 FBA_CLK1 FBA_CLK1
FBA_WCK0
FBA_WCK0
FBA_WCK1
FBA_WCK1
FBA_WCK2
FBA_WCK2
FBA_WCK3
FBA_WCK3
FB_DLLAVDD0 FB_PLLAVDD0
G1C
C40 E39 F37
H37 G38 G39 G40
H39
C41
D40
D41
C42
D42
H40 G41 G42
J37
K37
J38
J39
L36 M34 M35 M36
J40
J41
J42
K39
L39 M38 M39 M40 W35 W36 W37 W38
AA34 AA35 AA36 AA37
W40
AA40 AA41 AA42 AB40 AB41 AB42 AD40 AB34 AB35 AB36 AB37 AE35 AE36 AE37 AG36 AD41 AD42 AE38 AF39 AE42 AG40 AG41 AG42
G37
F41
L37
K42
AA38 AC39 AE34 AE41
F39
F40
K35
K41
Y39
AB39 AD36 AE40
F38
E40
K36
K40 W39
AB38 AD35 AE39
H36
F42
L34
K38
AA39 AD39 AG35 AG39
G1C
bga1504-nvidia-nb9e-glm2
bga1504-nvidia-nb9e-glm2 COMMON
COMMON
3/19 FBB
3/19 FBB
FBB_D0 FBB_D1 FBB_D2 FBB_D3 FBB_D4 FBB_D5 FBB_D6 FBB_D7 FBB_D8 FBB_D9 FBB_D10 FBB_D11 FBB_D12 FBB_D13 FBB_D14 FBB_D15 FBB_D16 FBB_D17 FBB_D18 FBB_D19 FBB_D20 FBB_D21 FBB_D22 FBB_D23 FBB_D24 FBB_D25 FBB_D26 FBB_D27 FBB_D28 FBB_D29 FBB_D30 FBB_D31 FBB_D32 FBB_D33 FBB_D34 FBB_D35 FBB_D36 FBB_D37 FBB_D38 FBB_D39 FBB_D40 FBB_D41 FBB_D42 FBB_D43 FBB_D44 FBB_D45 FBB_D46 FBB_D47 FBB_D48 FBB_D49 FBB_D50 FBB_D51 FBB_D52 FBB_D53 FBB_D54 FBB_D55 FBB_D56 FBB_D57 FBB_D58 FBB_D59 FBB_D60 FBB_D61 FBB_D62 FBB_D63
FBB_DQM0 FBB_DQM1 FBB_DQM2 FBB_DQM3 FBB_DQM4 FBB_DQM5 FBB_DQM6 FBB_DQM7
FBB_DQS_WP0 FBB_DQS_WP1 FBB_DQS_WP2 FBB_DQS_WP3 FBB_DQS_WP4 FBB_DQS_WP5 FBB_DQS_WP6 FBB_DQS_WP7
FBB_DQS_RN0 FBB_DQS_RN1 FBB_DQS_RN2 FBB_DQS_RN3 FBB_DQS_RN4 FBB_DQS_RN5 FBB_DQS_RN6 FBB_DQS_RN7
FBB_DBI0 FBB_DBI1 FBB_DBI2 FBB_DBI3 FBB_DBI4 FBB_DBI5 FBB_DBI6 FBB_DBI7
FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ
FBB_CMD0 FBB_CMD1 FBB_CMD2 FBB_CMD3 FBB_CMD4 FBB_CMD5 FBB_CMD6 FBB_CMD7 FBB_CMD8
FBB_CMD9 FBB_CMD10 FBB_CMD11 FBB_CMD12 FBB_CMD13 FBB_CMD14 FBB_CMD15 FBB_CMD16 FBB_CMD17 FBB_CMD18 FBB_CMD19 FBB_CMD20 FBB_CMD21 FBB_CMD22 FBB_CMD23 FBB_CMD24 FBB_CMD25 FBB_CMD26 FBB_CMD27 FBB_CMD28 FBB_CMD29 FBB_CMD30
FBB_DEBUG
FBB_CLK0 FBB_CLK0 FBB_CLK1 FBB_CLK1
FBB_WCK0
FBB_WCK0
FBB_WCK1
FBB_WCK1
FBB_WCK2
FBB_WCK2
FBB_WCK3
FBB_WCK3
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
FBB_CMD[27..0] 7
L2
INDUCTORL2INDUCTOR
FBB_D[63..0] 7 FBB_DQM[7..0] 7 FBB_DQS_RN[7..0] 7 FBB_DQS_WP[7..0] 7
+1.1V_GFX_PCIE
T146 PADT146 PAD T148 PADT148 PAD T150 PADT150 PAD T144 PADT144 PAD T145 PADT145 PAD T147 PADT147 PAD T149 PADT149 PAD T151 PADT151 PAD
FBB_D0 FBB_D1 FBB_D2 FBB_D3 FBB_D4 FBB_D5 FBB_D6 FBB_D7 FBB_D8 FBB_D9 FBB_D10 FBB_D11 FBB_D12 FBB_D13 FBB_D14 FBB_D15 FBB_D16 FBB_D17 FBB_D18 FBB_D19 FBB_D20 FBB_D21 FBB_D22 FBB_D23 FBB_D24 FBB_D25 FBB_D26 FBB_D27 FBB_D28 FBB_D29 FBB_D30 FBB_D31 FBB_D32 FBB_D33 FBB_D34 FBB_D35 FBB_D36 FBB_D37 FBB_D38 FBB_D39 FBB_D40 FBB_D41 FBB_D42 FBB_D43 FBB_D44 FBB_D45 FBB_D46 FBB_D47 FBB_D48 FBB_D49 FBB_D50 FBB_D51 FBB_D52 FBB_D53 FBB_D54 FBB_D55 FBB_D56 FBB_D57 FBB_D58 FBB_D59 FBB_D60 FBB_D61 FBB_D62 FBB_D63
FBB_DQM0 FBB_DQM1 FBB_DQM2 FBB_DQM3 FBB_DQM4 FBB_DQM5 FBB_DQM6 FBB_DQM7
FBB_DQS_WP0 FBB_DQS_WP1 FBB_DQS_WP2 FBB_DQS_WP3 FBB_DQS_WP4 FBB_DQS_WP5 FBB_DQS_WP6 FBB_DQS_WP7
FBB_DQS_RN0 FBB_DQS_RN1 FBB_DQS_RN2 FBB_DQS_RN3 FBB_DQS_RN4 FBB_DQS_RN5 FBB_DQS_RN6 FBB_DQS_RN7
+1.8V_RUN +1.8V_RUN
AA32 AB32 AC32 AD32 AD34 AE32 AF32 AG32 AG34 AK34 AN34 AP30 AP33 J10 J13 J16 J19 J24 J27 J30
FBA_CMD0
AT40
FBA_CMD1
AU38
FBA_CMD2
AT38
FBA_CMD3
BA39
FBA_CMD4
AV37
FBA_CMD5
BB39
FBA_CMD6
AW38
SNN_FBA_CMD7
AW42 AW39 AY41 AU39 AV36 BA40 AY39 AU40 BA37 AY36 AY37 AT37 AU36 AV39 AY38 AV40 AU42 AW40 AU41 AW41 BB37 AW37 AY42 BB40
AT36
AT41 AT42 BA36 BB36
AK38 AK39 AM37 AN37 AU32 AU33 AV30 AW30
AH32 AJ32
SNN_FBA_CMD26 SNN_FBA_CMD28
SNN_FBA_CMD29 SNN_FBA_CMD30
FBA_DEBUG
FBA_CMD8 FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25
FBA_CMD27
FBA_CLK0 FBA_CLK0# FBA_CLK1 FBA_CLK1#
FBA_PLLAVDD
T55PAD T55PAD
T23PAD T23PAD T58PAD T58PAD
T32PAD T32PAD T28PAD T28PAD
+1.8V_RUN
R137
R137
60.4
60.4
Place Components Close to the GPU
FBA_CLK0 6 FBA_CLK0# 6 FBA_CLK1 6 FBA_CLK1# 6
T128PAD T128PAD T129PAD T129PAD T130PAD T130PAD T131PAD T131PAD T132PAD T132PAD T133PAD T133PAD T134PAD T134PAD T135PAD T135PAD
C14
C229
C229
C228
C228
0.1U
0.1U
0.1U
0.1U
C14
C151UC15
4.7U
4.7U
1U
J33 K34 K9 L17 L18 L19 L20 L23 L24 L25 L26 L27
N41 R39 N42 V37 T41 T42 V38 R38 N40 U39 N39 V40 R41 V39 P39 V36 V41 T39 T38 T35 T36 T40 R37 M41 T37 M42 R36 V35 V42 R42 R40
R34
N37 N38 U34 V34
J35 J36 N35 N36 W41 W42 AD37 AD38
M32
N32
P32
SNN_FBB_CMD7
SNN_FBB_CMD26 SNN_FBB_CMD28
SNN_FBB_CMD29 SNN_FBB_CMD30
FBB_DEBUG
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
FBB_CMD0 FBB_CMD1 FBB_CMD2 FBB_CMD3 FBB_CMD4 FBB_CMD5 FBB_CMD6
FBB_CMD8 FBB_CMD9 FBB_CMD10 FBB_CMD11 FBB_CMD12 FBB_CMD13 FBB_CMD14 FBB_CMD15 FBB_CMD16 FBB_CMD17 FBB_CMD18 FBB_CMD19 FBB_CMD20 FBB_CMD21 FBB_CMD22 FBB_CMD23 FBB_CMD24 FBB_CMD25
FBB_CMD27
FBB_CLK0 FBB_CLK0# FBB_CLK1 FBB_CLK1#
T27PAD T27PAD
T26PAD T26PAD T24PAD T24PAD
T25PAD T25PAD T29PAD T29PAD
FBB_CLK0 7 FBB_CLK0# 7 FBB_CLK1 7 FBB_CLK1# 7
T154PAD T154PAD T156PAD T156PAD T158PAD T158PAD T152PAD T152PAD T153PAD T153PAD T155PAD T155PAD T157PAD T157PAD T159PAD T159PAD
19
R136 49.9
R136 49.9
R141 30.9
R141 30.9
R138 40.2
R138 40.2
+1.8V_RUN
1%
1%
1%
1%
1%
1%
R12
R12
60.4
60.4
+1.8V_RUN
04
1
2
3
4
+1.8V_RUN
R10
1.26V
R10
1.05K
1.05K
FB_VREF
R22
R22
C17
C17
2.49K
2.49K
0.01U
0.01U
DYNAMIC FB VREF SWITCHING SELECT
R11
GPIO10_FB_VREF_SW18
GPIO10_FB_VREF_SW GPIO10_FB_VREF_SW_R
Remove series resistor to disable dynamic FB_VREF switching and set FBVREF at 0.7*FBVDDQ (GPU and VRAM)
0
R520R52
R21
R21
10K
10K
R11
1.82K
1.82K
31
Q6
2
2N7002W-7-FQ62N7002W-7-F
55
GPIO10_FB_VREF_SW_R 6,7,8,9
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
Title
Title
Title
FB_Partition_A/B
FB_Partition_A/B
FB_Partition_A/B
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
XM1 G92 VGA 1A
XM1 G92 VGA 1A
XM1 G92 VGA 1A
Date: Sheet
Date: Sheet
Date: Sheet
Monday, March 17, 2008
Monday, March 17, 2008
Monday, March 17, 2008
421
421
421
of
of
of
A B C D E F G H
FrameBuffer - GPU Partition C/D
05
1
2
3
4
5
FBC_CMD[27..0] 8 FBC_D[63..0] 8 FBC_DQM[7..0] 8 FBC_DQS_RN[7..0] 8 FBC_DQS_WP[7..0] 8
T162 PADT162 PAD T164 PADT164 PAD T166 PADT166 PAD T160 PADT160 PAD T161 PADT161 PAD T163 PADT163 PAD T165 PADT165 PAD T167 PADT167 PAD
FBC_D0 FBC_D1 FBC_D2 FBC_D3 FBC_D4 FBC_D5 FBC_D6 FBC_D7 FBC_D8 FBC_D9 FBC_D10 FBC_D11 FBC_D12 FBC_D13 FBC_D14 FBC_D15 FBC_D16 FBC_D17 FBC_D18 FBC_D19 FBC_D20 FBC_D21 FBC_D22 FBC_D23 FBC_D24 FBC_D25 FBC_D26 FBC_D27 FBC_D28 FBC_D29 FBC_D30 FBC_D31 FBC_D32 FBC_D33 FBC_D34 FBC_D35 FBC_D36 FBC_D37 FBC_D38 FBC_D39 FBC_D40 FBC_D41 FBC_D42 FBC_D43 FBC_D44 FBC_D45 FBC_D46 FBC_D47 FBC_D48 FBC_D49 FBC_D50 FBC_D51 FBC_D52 FBC_D53 FBC_D54 FBC_D55 FBC_D56 FBC_D57 FBC_D58 FBC_D59 FBC_D60 FBC_D61 FBC_D62 FBC_D63
FBC_DQM0 FBC_DQM1 FBC_DQM2 FBC_DQM3 FBC_DQM4 FBC_DQM5 FBC_DQM6 FBC_DQM7
FBC_DQS_WP0 FBC_DQS_WP1 FBC_DQS_WP2 FBC_DQS_WP3 FBC_DQS_WP4 FBC_DQS_WP5 FBC_DQS_WP6 FBC_DQS_WP7
FBC_DQS_RN0 FBC_DQS_RN1 FBC_DQS_RN2 FBC_DQS_RN3 FBC_DQS_RN4 FBC_DQS_RN5 FBC_DQS_RN6 FBC_DQS_RN7
J21 H21
G21
F21 F18
G18
H18
G16
B16 A16 B19 A19 D17 E18 A18 C16 H24
G24
F24 E24 J22 H22
G22
F22 C24 C22 B22 A22 C21 B21 A21 C19 F34 F33 E34 D34
G32
J31 H31
G31
C34 B34 A34 D33 D32 E31 D31 C31 D39 D38
G36
F35 E36 D36 C36 D35 B40 C39 B39 A40 A39 C35 B36 A36
J18 B18 E22 D20 F32 A33 F36 B37
G19
C18 D23 D21 H33 B33 D37 C37
H19 D18 D24 E21
G33
C33 E37 C38
H16 D16 D22 D19 J32 E33
G35
A37
G1D
G1D
bga1504-nvidia-nb9e-glm2
bga1504-nvidia-nb9e-glm2 COMMON
COMMON
4/19 FBC
4/19 FBC
FBC_D0 FBC_D1 FBC_D2 FBC_D3 FBC_D4 FBC_D5 FBC_D6 FBC_D7 FBC_D8 FBC_D9 FBC_D10 FBC_D11 FBC_D12 FBC_D13 FBC_D14 FBC_D15 FBC_D16 FBC_D17 FBC_D18 FBC_D19 FBC_D20 FBC_D21 FBC_D22 FBC_D23 FBC_D24 FBC_D25 FBC_D26 FBC_D27 FBC_D28 FBC_D29 FBC_D30 FBC_D31 FBC_D32 FBC_D33 FBC_D34 FBC_D35 FBC_D36 FBC_D37 FBC_D38 FBC_D39 FBC_D40 FBC_D41 FBC_D42 FBC_D43 FBC_D44 FBC_D45 FBC_D46 FBC_D47 FBC_D48 FBC_D49 FBC_D50 FBC_D51 FBC_D52 FBC_D53 FBC_D54 FBC_D55 FBC_D56 FBC_D57 FBC_D58 FBC_D59 FBC_D60 FBC_D61 FBC_D62 FBC_D63
FBC_DQM0 FBC_DQM1 FBC_DQM2 FBC_DQM3 FBC_DQM4 FBC_DQM5 FBC_DQM6 FBC_DQM7
FBC_DQS_WP0 FBC_DQS_WP1 FBC_DQS_WP2 FBC_DQS_WP3 FBC_DQS_WP4 FBC_DQS_WP5 FBC_DQS_WP6 FBC_DQS_WP7
FBC_DQS_RN0 FBC_DQS_RN1 FBC_DQS_RN2 FBC_DQS_RN3 FBC_DQS_RN4 FBC_DQS_RN5 FBC_DQS_RN6 FBC_DQS_RN7
FBC_DBI0 FBC_DBI1 FBC_DBI2 FBC_DBI3 FBC_DBI4 FBC_DBI5 FBC_DBI6 FBC_DBI7
FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ
FBC_CMD0 FBC_CMD1 FBC_CMD2 FBC_CMD3 FBC_CMD4 FBC_CMD5 FBC_CMD6 FBC_CMD7 FBC_CMD8
FBC_CMD9 FBC_CMD10 FBC_CMD11 FBC_CMD12 FBC_CMD13 FBC_CMD14 FBC_CMD15 FBC_CMD16 FBC_CMD17 FBC_CMD18 FBC_CMD19 FBC_CMD20 FBC_CMD21 FBC_CMD22 FBC_CMD23 FBC_CMD24 FBC_CMD25 FBC_CMD26 FBC_CMD27 FBC_CMD28 FBC_CMD29 FBC_CMD30
FBC_DEBUG
FBC_CLK0 FBC_CLK0 FBC_CLK1 FBC_CLK1
FBC_WCK0 FBC_WCK0 FBC_WCK1 FBC_WCK1 FBC_WCK2 FBC_WCK2 FBC_WCK3 FBC_WCK3
FB_DLLAVDD1
FB_PLLAVDD1
+1.8V_RUN
N34 N9 R32 T32 T34 U32 V32 W32 W34 Y32
FBC_CMD0
C25
FBC_CMD1
A27
FBC_CMD2
E25
FBC_CMD3
D30
FBC_CMD4
D28
FBC_CMD5
E28
FBC_CMD6
G27
SNN_FBC_CMD7
D27
FBC_CMD8
C30
FBC_CMD9
B28
FBC_CMD10
B25
FBC_CMD11
A30
FBC_CMD12
D26
FBC_CMD13
F27
FBC_CMD14
F25
FBC_CMD15
B31
FBC_CMD16
B30
FBC_CMD17
D29
FBC_CMD18
A28
FBC_CMD19
E27
FBC_CMD20
C27
FBC_CMD21
G28
FBC_CMD22
B27
FBC_CMD23
G25
FBC_CMD24
H27
FBC_CMD25
H25
SNN_FBC_CMD26
A25
FBC_CMD27
A31
SNN_FBC_CMD28
F28
SNN_FBC_CMD29
C28
SNN_FBC_CMD30
D25
FBC_DEBUG
J28
FBC_CLK0
J26
FBC_CLK0#
J25
FBC_CLK1
F30
FBC_CLK1#
E30
F19 E19 B24 A24 H30 G30 H34 G34
L21
FBC_PLLAVDD
L22
C324
C324
0.1U
0.1U
C GE
T176PAD T176PAD
T60PAD T60PAD T66PAD T66PAD
T177PAD T177PAD T178PAD T178PAD
FBC_CLK0 8 FBC_CLK0# 8 FBC_CLK1 8 FBC_CLK1# 8
T170PAD T170PAD T172PAD T172PAD T174PAD T174PAD T168PAD T168PAD T169PAD T169PAD T171PAD T171PAD T173PAD T173PAD T175PAD T175PAD
12MIL 1.2V
C311
C311
C3541UC354
0.1U
0.1U
1U
+1.8V_RUN
R142
R142
60.4
60.4
+1.1V_GFX_PCIE
L13
L13
INDUCTOR
INDUCTOR
C348
C348
4.7U
4.7U
FBD_CMD[27..0] 9 FBD_D[63..0] 9 FBD_DQM[7..0] 9 FBD_DQS_RN[7..0] 9 FBD_DQS_WP[7..0] 9
T181 PADT181 PAD T183 PADT183 PAD T185 PADT185 PAD T179 PADT179 PAD T180 PADT180 PAD T182 PADT182 PAD T184 PADT184 PAD T186 PADT186 PAD
FBD_D0 FBD_D1 FBD_D2 FBD_D3 FBD_D4 FBD_D5 FBD_D6 FBD_D7 FBD_D8 FBD_D9 FBD_D10 FBD_D11 FBD_D12 FBD_D13 FBD_D14 FBD_D15 FBD_D16 FBD_D17 FBD_D18 FBD_D19 FBD_D20 FBD_D21 FBD_D22 FBD_D23 FBD_D24 FBD_D25 FBD_D26 FBD_D27 FBD_D28 FBD_D29 FBD_D30 FBD_D31 FBD_D32 FBD_D33 FBD_D34 FBD_D35 FBD_D36 FBD_D37 FBD_D38 FBD_D39 FBD_D40 FBD_D41 FBD_D42 FBD_D43 FBD_D44 FBD_D45 FBD_D46 FBD_D47 FBD_D48 FBD_D49 FBD_D50 FBD_D51 FBD_D52 FBD_D53 FBD_D54 FBD_D55 FBD_D56 FBD_D57 FBD_D58 FBD_D59 FBD_D60 FBD_D61 FBD_D62 FBD_D63
FBD_DQM0 FBD_DQM1 FBD_DQM2 FBD_DQM3 FBD_DQM4 FBD_DQM5 FBD_DQM6 FBD_DQM7
FBD_DQS_WP0 FBD_DQS_WP1 FBD_DQS_WP2 FBD_DQS_WP3 FBD_DQS_WP4 FBD_DQS_WP5 FBD_DQS_WP6 FBD_DQS_WP7
FBD_DQS_RN0 FBD_DQS_RN1 FBD_DQS_RN2 FBD_DQS_RN3 FBD_DQS_RN4 FBD_DQS_RN5 FBD_DQS_RN6 FBD_DQS_RN7
M9 N8 N7 P9 R9 R8 P7 N6 M4 M2 M1 N1 P4 R4 R2 R1 K8 J7 J6 H6 L9 M8 M7 M6 J2 J1 K4 K3 K2 K1 H3
G4 H12 J11 H10 G12
G9
F9
F8 F12 A10 B10 C10
B9
A9 D10
D7
C8 F13 J15 J12 H15 D15 J14 H13 G13 D12 B12 A12 A13 D14 A15 B15 C15
P6
L4
J8
J3
H9
C9 F14 D11
R7
N2
L7
J5 G10
E9 G15 C13
R6
N3
K7
J4 G11
D9 F15 B13
R5
M5
K5
H4 E10
D8 G14 E12
G1E
G1E
bga1504-nvidia-nb9e-glm2
bga1504-nvidia-nb9e-glm2 COMMON
COMMON
5/19 FBD
5/19 FBD
FBD_D0 FBD_D1 FBD_D2 FBD_D3 FBD_D4 FBD_D5 FBD_D6 FBD_D7 FBD_D8 FBD_D9 FBD_D10 FBD_D11 FBD_D12 FBD_D13 FBD_D14 FBD_D15 FBD_D16 FBD_D17 FBD_D18 FBD_D19 FBD_D20 FBD_D21 FBD_D22 FBD_D23 FBD_D24 FBD_D25 FBD_D26 FBD_D27 FBD_D28 FBD_D29 FBD_D30 FBD_D31 FBD_D32 FBD_D33 FBD_D34 FBD_D35 FBD_D36 FBD_D37 FBD_D38 FBD_D39 FBD_D40 FBD_D41 FBD_D42 FBD_D43 FBD_D44 FBD_D45 FBD_D46 FBD_D47 FBD_D48 FBD_D49 FBD_D50 FBD_D51 FBD_D52 FBD_D53 FBD_D54 FBD_D55 FBD_D56 FBD_D57 FBD_D58 FBD_D59 FBD_D60 FBD_D61 FBD_D62 FBD_D63
FBD_DQM0 FBD_DQM1 FBD_DQM2 FBD_DQM3 FBD_DQM4 FBD_DQM5 FBD_DQM6 FBD_DQM7
FBD_DQS_WP0 FBD_DQS_WP1 FBD_DQS_WP2 FBD_DQS_WP3 FBD_DQS_WP4 FBD_DQS_WP5 FBD_DQS_WP6 FBD_DQS_WP7
FBD_DQS_RN0 FBD_DQS_RN1 FBD_DQS_RN2 FBD_DQS_RN3 FBD_DQS_RN4 FBD_DQS_RN5 FBD_DQS_RN6 FBD_DQS_RN7
FBD_DBI0 FBD_DBI1 FBD_DBI2 FBD_DBI3 FBD_DBI4 FBD_DBI5 FBD_DBI6 FBD_DBI7
FBD_CMD0 FBD_CMD1 FBD_CMD2 FBD_CMD3 FBD_CMD4 FBD_CMD5 FBD_CMD6 FBD_CMD7 FBD_CMD8
FBD_CMD9 FBD_CMD10 FBD_CMD11 FBD_CMD12 FBD_CMD13 FBD_CMD14 FBD_CMD15 FBD_CMD16 FBD_CMD17 FBD_CMD18 FBD_CMD19 FBD_CMD20 FBD_CMD21 FBD_CMD22 FBD_CMD23 FBD_CMD24 FBD_CMD25 FBD_CMD26 FBD_CMD27 FBD_CMD28 FBD_CMD29 FBD_CMD30
FBD_DEBUG
FBD_CLK0 FBD_CLK0 FBD_CLK1 FBD_CLK1
FBD_WCK0
FBD_WCK0
FBD_WCK1
FBD_WCK1
FBD_WCK2
FBD_WCK2
FBD_WCK3
FBD_WCK3
FB_VDDQ_SENSE
G3 F5 G5 B4 E6 A4 D5 D1 D4 C2 F4 E7 B3 C4 F3 B6 C7 C6 G6 F7 E4 C5 E3 F1 D3 F2 D2 A6 D6 C1 A3
G7
G1 G2 B7 A7
N5 N4 L6 K6 F11 F10 E13 D13
J34
SNN_FBD_CMD7
SNN_FBD_CMD26 SNN_FBD_CMD28
SNN_FBD_CMD27 SNN_FBD_CMD28
FBD_DEBUG
R61 0R61 0
FBD_CMD0 FBD_CMD1 FBD_CMD2 FBD_CMD3 FBD_CMD4 FBD_CMD5 FBD_CMD6
FBD_CMD8 FBD_CMD9 FBD_CMD10 FBD_CMD11 FBD_CMD12 FBD_CMD13 FBD_CMD14 FBD_CMD15 FBD_CMD16 FBD_CMD17 FBD_CMD18 FBD_CMD19 FBD_CMD20 FBD_CMD21 FBD_CMD22 FBD_CMD23 FBD_CMD24 FBD_CMD25
FBD_CMD27
FBD_CLK0 FBD_CLK0# FBD_CLK1 FBD_CLK1#
T189PAD T189PAD
T93PAD T93PAD T72PAD T72PAD
T187PAD T187PAD T188PAD T188PAD
FBD_CLK0 9 FBD_CLK0# 9 FBD_CLK1 9 FBD_CLK1# 9
T192PAD T192PAD T194PAD T194PAD T195PAD T195PAD T190PAD T190PAD T191PAD T191PAD T193PAD T193PAD T196PAD T196PAD T197PAD T197PAD
+1.8V_RUN
R149
R149
60.4
60.4
FBVDDQ_SENSE 20
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
Title
Title
Title
G92_FB_Partition_C/D
G92_FB_Partition_C/D
G92_FB_Partition_C/D
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
XM1 G92 VGA 1A
XM1 G92 VGA 1A
XM1 G92 VGA 1A
Date: Sheet
Date: Sheet
Monday, March 17, 2008
Monday, March 17, 2008
Monday, March 17, 2008
Date: Sheet
of
of
of
521
521
521
HFDBA
1
2
3
4
5
5
4
3
2
1
06
FBA_CMD[27..0] 4 FBA_D[63..0] 4
D D
FBA_CLK04 FBA_CLK0#4
C C
FBA - bottom FBA - bottom
+1.8V_RUN +1.8V_RUN
C169
C169
0.1U
0.1U
C134
C134
0.1U
0.1U
B B
C1621UC162 1U
FBA_DQM[7..0] 4 FBA_DQS_RN[7..0] 4 FBA_DQS_WP[7..0] 4
R1
R2
+1.8V_RUN
R30
R30
549
549
R28
R28
FBA_VREF3_PD
31
2N7002W-7-FQ42N7002W-7-F
Q4
GPIO10_FB_VREF_SW_R
2
931
931
C7
R23
R23
1.33K
1.33K
0.01UC70.01U
FBAB_VREF2
R1
R2
+1.8V_RUN
R31
R31
R14
R14
549
549
R24
R24
1.33K
1.33K
FBAB_VREF2_PD
31
2N7002W-7-FQ32N7002W-7-F
Q3
GPIO10_FB_VREF_SW_R
2
GPIO10_FB_VREF_SW_R 4,7,8,9
931
931
C8
C8
0.01U
0.01U
X7R
X7R
Missor Function Signal Mapping
R126 475R126 475
FBA_CLK0 FBA_CLK0# FBA_CMD18
FBA_CMD1 FBA_CMD10 FBA_CMD11
R127
R127
FBA_CMD8
10K
10K
FBA_DQM2 FBA_DQM0 FBA_DQM3 FBA_DQM1 FBA_DQS_WP2 FBA_DQS_WP0 FBA_DQS_WP3 FBA_DQS_WP1 FBA_DQS_RN2 FBA_DQS_RN0 FBA_DQS_RN3 FBA_DQS_RN1
FBA_CMD19 FBA_CMD25 FBA_CMD22 FBA_CMD24 FBA_CMD0 FBA_CMD2 FBA_CMD21 FBA_CMD16 FBA_CMD23 FBA_CMD20 FBA_CMD17 FBA_CMD9
FBA_CMD12 FBA_CMD3 FBA_CMD27
Close to K1& K12.
C152
C183
C183
C170
C170
0.1U
0.1U
0.1U
0.1U
C143
C143
C130
C130
0.1U
0.1U
0.1U
0.1U
C1801UC180
C1461UC146
1U
1U
C152
C148
C148
0.1U
0.1U
0.1U
0.1U
C166
C166
C154
C154
0.1U
0.1U
0.1U
0.1U
C1421UC142 1U
Note: Change to X7R
FBAB_VREF3
C182
C182
0.047U
0.047U
H1
H12 J11
J10
H4 H3
F4 H9 F9
E3 E10 N10
N3
D2 D11 P11
P2
D3 D10 P10
P3
K4
H2
K3 M4
K9 H11 K10
L9 K11 M9
K2
L4 G4
G9 H10
C194
C194
0.047U
0.047U
U4A
U4A
VREF1 VREF2
CK CK CKE
RAS CAS WE CS
DM0 DM1 DM2 DM3 WDQS0 WDQS1 WDQS2 WDQS3 RDQS0 RDQS1 RDQS2 RDQS3
A0 A1 A2 A3 A4 A5 A6 A7 A8/AP A9 A10 A11
BA0 BA1 BA2
H5RS5223CFR-11C
H5RS5223CFR-11C
+1.8V_RUN
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
ZQ
MF RES SEN RFU
NC0
U4B
U4B
K12
K1
V11
V2
M12
M1
F12
F1
A11
A2
A1
A12
C1 C4 C9
C12
J4
J9 N1 N4 N9
N12
R1 R4 R9
R12
V1
V12
E1 E4 E9
E12
H5RS5223CFR-11C
H5RS5223CFR-11C
VDD10 VDD9 VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 VDDQ19 VDDQ20 VDDQ21 VDDQ22
FBA_D19
B2
FBA_D22
B3
FBA_D16
C2
FBA_D17
C3
FBA_D21
E2
FBA_D23
F3
FBA_D20
F2
FBA_D18
G3
FBA_D5
B11
FBA_D6
B10
FBA_D3
C11
FBA_D7
C10
FBA_D4
E11
FBA_D2
F10
FBA_D0
F11
FBA_D1
G10
FBA_D29
M11
FBA_D27
L10
FBA_D26
N11
FBA_D28
M10
FBA_D24
R11
FBA_D25
R10
FBA_D31
T11
FBA_D30
T10
FBA_D10
M2
FBA_D11
L3
FBA_D9
N2
FBA_D8
M3
FBA_D12
R2
FBA_D14
R3
FBA_D13
T2
FBA_D15
T3
FBA_ZQ0
A4 A9
FBA_CMD15
V9 V4
FBA_CMD14
J3 J2
VSS10
VSS9 VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1
VSSQ20 VSSQ19 VSSQ18 VSSQ17 VSSQ16 VSSQ15 VSSQ14 VSSQ13 VSSQ12 VSSQ11 VSSQ10
VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1
R18
R18 243
243
R116
R116
T1PAD T1PAD
10K
10K
J12 J1 V10 V3 L12 L1 G12 G1 A10 A3
T12 T9 T4 T1 P12 P9 P4 P1 L11 L2 G11 G2 D12 D9 D4 D1 B12 B9 B4 B1
FBA_CLK14 FBA_CLK1#4
FrameBuffer - DecouplingFrameBuffer - Decoupling
C139
C139
C149
C149
0.1U
0.1U
0.1U
0.1U
C160
C160
C141
C141
0.1U
0.1U
0.1U
0.1U
C1861UC186
C1991UC199
1U
1U
R123 475R123 475
C128
C128
C135
C135
0.1U
0.1U
0.1U
0.1U
C174
C174
C144
C144
0.1U
0.1U
0.1U
0.1U
C2001UC200
C1561UC156
1U
1U
Note: Change to X7R
FBAB_VREF2 FBA_CLK1
FBA_CLK1# FBA_CMD11
FBA_CMD27 FBA_CMD8 FBA_CMD18 FBA_CMD10
FBA_DQM7 FBA_DQM4 FBA_D36 FBA_DQM6 FBA_DQM5 FBA_DQS_WP7 FBA_DQS_WP4 FBA_DQS_WP6 FBA_DQS_WP5 FBA_DQS_RN7 FBA_DQS_RN4 FBA_DQS_RN6 FBA_DQS_RN5
FBA_CMD5 FBA_CMD13 FBA_CMD21 FBA_CMD20 FBA_CMD19 FBA_CMD25 FBA_CMD4 FBA_CMD9 FBA_CMD17 FBA_CMD6 FBA_CMD23 FBA_CMD16
FBA_CMD3 FBA_CMD12 FBA_CMD1
C150
C150
0.047U
0.047U
Close to K1& K12.
C157
C157
0.1U
0.1U
C181
C181
0.1U
0.1U
H12 J11
J10
E10 N10
D11 P11
D10 P10
M4 H11
K10 K11
M9
G4 G9 H10
C179
C179
0.047U
0.047U
U5A
U5A
H1
VREF1 VREF2
CK CK
H4
WE
H3
BA2
F4
CS
H9
CKE
F9
CAS
E3
DM0 DM1 DM2
N3
DM3
D2
WDQS0 WDQS1 WDQS2
P2
WDQS3
D3
RDQS0 RDQS1 RDQS2
P3
RDQS3
K4
A4
H2
A5
K3
A6 A9
K9
A0 A1 A2
L9
A11 A10 A3
K2
A8
L4
A7 BA1
BA0 RAS
H5RS5223CFR-11C
H5RS5223CFR-11C
+1.8V_RUN
MIRROR
K12 V11 M12
A11
A12
C12
N12
R12 V12
E12
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
ZQ
MF RES SEN RFU
NC0
U5B
U5B
VDD10
K1
VDD9 VDD8
V2
VDD7 VDD6
M1
VDD5
F12
VDD4
F1
VDD3 VDD2
A2
VDD1
A1
VDDQ1 VDDQ2
C1
VDDQ3
C4
VDDQ4
C9
VDDQ5 VDDQ6
J4
VDDQ7
J9
VDDQ8
N1
VDDQ9
N4
VDDQ10
N9
VDDQ11 VDDQ12
R1
VDDQ13
R4
VDDQ14
R9
VDDQ15 VDDQ16
V1
VDDQ17 VDDQ18
E1
VDDQ19
E4
VDDQ20
E9
VDDQ21 VDDQ22
H5RS5223CFR-11C
H5RS5223CFR-11C
MF LOGIC STATE
FBA_D60
B2
FBA_D58
B3
FBA_D56
C2
FBA_D57
C3
FBA_D59
E2
FBA_D61
F3
FBA_D63
F2
FBA_D62
G3
FBA_D37
B11
FBA_D35
B10
FBA_D38
C11
FBA_D32
C10 E11
FBA_D33
F10
FBA_D34
F11
FBA_D39
G10
FBA_D48
M11
FBA_D54
L10
FBA_D55
N11
FBA_D50
M10
FBA_D52
R11
FBA_D51
R10
FBA_D49
T11
FBA_D53
T10
FBA_D41
M2
FBA_D40
L3
FBA_D42
N2
FBA_D45
M3
FBA_D43
R2
FBA_D44
R3
FBA_D46
T2
FBA_D47
T3
FBA_ZQ1
A4 A9
+1.8V_RUN
FBA_CMD15
V9 V4
FBA_CMD14
J3 J2
VSS10
VSSQ20 VSSQ19 VSSQ18 VSSQ17 VSSQ16 VSSQ15 VSSQ14 VSSQ13 VSSQ12 VSSQ11 VSSQ10
VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1
R15
R15 243
243
T4PAD T4PAD
J12 J1
VSS9
V10
VSS8
V3
VSS7
L12
VSS6
L1
VSS5
G12
VSS4
G1
VSS3
A10
VSS2
A3
VSS1
T12 T9 T4 T1 P12 P9 P4 P1 L11 L2 G11 G2 D12 D9 D4 D1 B12 B9 B4 B1
PIN
RAS# CAS# WE# CS# CKE A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 BA0 BA1 BA2
HIGH LOW
H10
H3
F9
F4
H4
H9
F4
F9
H9
H4
K9
K4
H11
H2
K10
K3
M9
M4
K4
K9
H2
H11
K3
K10
L4
L9
K2
K11
M4
M9
K11
K2
L9
L4
G9
G4
G4
G9
H3
H10
A A
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
Title
Title
Title
GDDR3_Partition_A
GDDR3_Partition_A
GDDR3_Partition_A
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
XM1 G92 VGA 1A
XM1 G92 VGA 1A
XM1 G92 VGA 1A Monday, March 17, 2008
Monday, March 17, 2008
Monday, March 17, 2008
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
621
621
621
of
of
of
5
4
3
2
1
07
FBB_CMD[27..0] 4 FBB_D[63..0] 4
D D
FBB_CLK04 FBB_CLK0#4
C C
FBB_DQM[7..0] 4 FBB_DQS_RN[7..0] 4 FBB_DQS_WP[7..0] 4
R125 475R125 475
+1.8V_RUN +1.8V_RUN
R33
R33
549
549
R34
R34
FBAB_VREF5_PD FBAB_VREF4_PD
31
931
931
C5
R26
R26
1.33K
1.33K
0.01UC50.01U
U2A
U2A
H1
H12
J11 J10 H4
H3
F4
H9
F9
E3 E10 N10
N3
D2 D11 P11
P2
D3 D10 P10
P3
K4
H2
K3
M4
K9 H11 K10
L9
K11
M9
K2
L4
G4
G9 H10
H5RS5223CFR-11C
H5RS5223CFR-11C
VREF1 VREF2
CK CK CKE
RAS CAS WE CS
DM0 DM1 DM2 DM3 WDQS0 WDQS1 WDQS2 WDQS3 RDQS0 RDQS1 RDQS2 RDQS3
A0 A1 A2 A3 A4 A5 A6 A7 A8/AP A9 A10 A11
BA0 BA1 BA2
FBAB_VREF5 FBAB_VREF4
FBB_CLK0 FBB_CLK0# FBB_CMD18
FBB_CMD1 FBB_CMD10
R122
R122
FBB_CMD11 FBB_CMD8
10K
10K
FBB_DQM2 FBB_DQM0 FBB_DQM1 FBB_DQM3 FBB_DQS_WP2 FBB_DQS_WP0 FBB_DQS_WP1 FBB_DQS_WP3 FBB_DQS_RN2 FBB_DQS_RN0 FBB_DQS_RN1 FBB_DQS_RN3
FBB_CMD19 FBB_CMD25 FBB_CMD22 FBB_CMD24 FBB_CMD0 FBB_CMD2 FBB_CMD21 FBB_CMD16 FBB_CMD23 FBB_CMD20 FBB_CMD17 FBB_CMD9
FBB_CMD12 FBB_CMD3 FBB_CMD27
Q8
GPIO10_FB_VREF_SW_R
2
2N7002W-7-FQ82N7002W-7-F
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
ZQ
MF RES SEN RFU
NC0
FBB_D18
B3
FBB_D22
C2
FBB_D19
C3
FBB_D23
E2
FBB_D17
F3
FBB_D16
F2
FBB_D21
G3
FBB_D6
B11
FBB_D7
B10
FBB_D4
C11
FBB_D5
C10
FBB_D1
E11
FBB_D3
F10
FBB_D2
F11
FBB_D0
G10
FBB_D15
M11
FBB_D14
L10
FBB_D13
N11
FBB_D10
M10
FBB_D12
R11
FBB_D11
R10
FBB_D9
T11
FBB_D8
T10
FBB_D27
M2
FBB_D30
L3
FBB_D31
N2
FBB_D29
M3
FBB_D26
R2
FBB_D25
R3
FBB_D28
T2
FBB_D24
T3
FBB_ZQ0
A4 A9
FBB_CMD15 FBB_CMD15
V9 V4
FBB_CMD14 FBB_CMD14
J3 J2
R17
R17 243
243
R119
R119
T2PAD T2PAD
10K
10K
FBB_CLK14 FBB_CLK1#4
FBB_D20
B2
R124 475R124 475
FBAB_VREF4
FBB_CMD11 FBB_CMD27
FBB_CMD8 FBB_CMD18 FBB_CMD10
FBB_DQM6 FBB_DQM4 FBB_DQM7 FBB_DQM5 FBB_DQS_WP6 FBB_DQS_WP4 FBB_DQS_WP7 FBB_DQS_WP5 FBB_DQS_RN6 FBB_DQS_RN4 FBB_DQS_RN7 FBB_DQS_RN5
FBB_CMD5 FBB_CMD13 FBB_CMD21 FBB_CMD20 FBB_CMD19 FBB_CMD25 FBB_CMD4 FBB_CMD9 FBB_CMD17 FBB_CMD6 FBB_CMD23 FBB_CMD16
FBB_CMD3 FBB_CMD12 FBB_CMD1
FBB_CLK1 FBB_CLK1#
R29
R29
R20
R20
1.33K
1.33K
H1
VREF1
H12
VREF2
J11
CK
J10
CK
H4
WE
H3
BA2
F4
CS
H9
CKE
F9
CAS
E3
DM0
E10
DM1
N10
DM2
N3
DM3
D2
WDQS0
D11
WDQS1
P11
WDQS2
P2
WDQS3
D3
RDQS0
D10
RDQS1
P10
RDQS2
P3
RDQS3
K4
A4
H2
A5
K3
A6
M4
A9
K9
A0
H11
A1
K10
A2
L9
A11
K11
A10
M9
A3
K2
A8
L4
A7
G4
BA1
G9
BA0
H10
RAS
H5RS5223CFR-11C
H5RS5223CFR-11C
549
549
MIRROR
U3A
U3A
R27
R27
931
931
C6
0.01UC60.01U
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
ZQ
MF RES SEN RFU
NC0
B2 B3 C2 C3 E2 F3 F2 G3 B11 B10 C11 C10 E11 F10 F11 G10 M11 L10 N11 M10 R11 R10 T11 T10 M2 L3 N2 M3 R2 R3 T2 T3
A4 A9 V9 V4 J3
J2
2N7002W-7-FQ22N7002W-7-F
FBB_ZQ1
31
Q2
GPIO10_FB_VREF_SW_R
2
FBB_D53 FBB_D54 FBB_D55 FBB_D52 FBB_D50 FBB_D51 FBB_D48 FBB_D49 FBB_D35 FBB_D38 FBB_D34 FBB_D39 FBB_D33 FBB_D37 FBB_D36 FBB_D32 FBB_D56 FBB_D58 FBB_D60 FBB_D57 FBB_D61 FBB_D59 FBB_D62 FBB_D63 FBB_D44 FBB_D45 FBB_D41 FBB_D47 FBB_D46 FBB_D43 FBB_D40 FBB_D42
+1.8V_RUN
R13
R13 243
243
T3PAD T3PAD
GPIO10_FB_VREF_SW_R 4,6,8,9
+1.8V_RUN
U2B
U2B
K12
VDD10
K1
VDD9
C138
FBB - bottom
+1.8V_RUN
FrameBuffer - Decoupling
C175
C175
C151
C151
0.1U
0.1U
0.1U
0.1U
C155
C155
C167
C167
0.1U
0.1U
0.1U
B B
0.1U
C1871UC187
C1771UC177
1U
1U
C165
C165
C198
C198
0.1U
0.1U
0.1U
0.1U
C131
C131
C171
C171
0.1U
0.1U
0.1U
0.1U
C1361UC136
C1581UC158
1U
1U
C138
0.047U
0.047U
C147
C147
0.1U
0.1U
C137
C137
0.1U
0.1U
Note: Change to X7R
A A
5
V11
C163
C163
0.047U
0.047U
V2
M12
M1 F12
F1
A11
A2
A1
A12
C1 C4 C9
C12
J4 J9 N1 N4 N9
N12
R1 R4 R9
R12
V1
V12
E1 E4 E9
E12
4
VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 VDDQ19 VDDQ20 VDDQ21 VDDQ22
H5RS5223CFR-11C
H5RS5223CFR-11C
VSS10
VSSQ20 VSSQ19 VSSQ18 VSSQ17 VSSQ16 VSSQ15 VSSQ14 VSSQ13 VSSQ12 VSSQ11 VSSQ10 VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1
J12 J1
VSS9
V10
VSS8
V3
VSS7
L12
VSS6
L1
VSS5
G12
VSS4
G1
VSS3
A10
VSS2
A3
VSS1
T12 T9 T4 T1 P12 P9 P4 P1 L11 L2 G11 G2 D12 D9 D4 D1 B12 B9 B4 B1
FBB - bottom
+1.8V_RUN
FrameBuffer - Decoupling
C193
C193
C132
C132
0.1U
0.1U
0.1U
0.1U
C178
C178
C176
C176
0.1U
0.1U
0.1U
0.1U
C1591UC159
C1331UC133
1U
1U
C129
C129
C195
C195
0.1U
0.1U
0.1U
0.1U
C140
C140
C185
C185
0.1U
0.1U
0.1U
0.1U
C1681UC168
C1531UC153
1U
1U
C197
C197
0.047U
0.047U
Close to K1& K12.Close to K1& K12.
C196
C196
0.1U
0.1U
C145
C145
0.1U
0.1U
Note: Change to X7R
3
2
+1.8V_RUN
U3B
U3B
K12
VDD10
K1
VDD9
C164
C164
0.047U
0.047U
V11
V2
M12
M1
F12
F1
A11
A2
A1
A12
C1 C4 C9
C12
J4
J9 N1 N4 N9
N12
R1 R4 R9
R12
V1
V12
E1 E4 E9
E12
VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 VDDQ19 VDDQ20 VDDQ21 VDDQ22
H5RS5223CFR-11C
H5RS5223CFR-11C
J12
VSS10
J1
VSS9
V10
VSS8
V3
VSS7
L12
VSS6
L1
VSS5
G12
VSS4
G1
VSS3
A10
VSS2
A3
VSS1
T12
VSSQ20
T9
VSSQ19
T4
VSSQ18
T1
VSSQ17
P12
VSSQ16
P9
VSSQ15
P4
VSSQ14
P1
VSSQ13
L11
VSSQ12
L2
VSSQ11
G11
VSSQ10
G2
VSSQ9
D12
VSSQ8
D9
VSSQ7
D4
VSSQ6
D1
VSSQ5
B12
VSSQ4
B9
VSSQ3
B4
VSSQ2
B1
VSSQ1
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
Title
Title
Title
GDDR3_Partition_B
GDDR3_Partition_B
GDDR3_Partition_B
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
XM1 G92 VGA 1A
XM1 G92 VGA 1A
XM1 G92 VGA 1A Monday, March 17, 2008
Monday, March 17, 2008
Monday, March 17, 2008
Date: Sheet
Date: Sheet
Date: Sheet
1
721
721
721
of
of
of
5
4
3
2
1
08
D D
FBC_CMD[27..0] 5 FBC_D[63..0] 5 FBC_DQM[7..0] 5 FBC_DQS_RN[7..0] 5 FBC_DQS_WP[7..0] 5
R140 475R140 475
FBCD_VREF3
FBC_CLK05 FBC_CLK0#5
C C
FBC_CLK0 FBC_CLK0# FBC_CMD18
FBC_CMD1 FBC_CMD10 FBC_CMD11
R134
R134
FBC_CMD8
10K
10K
FBC_DQM3 FBC_DQM1 FBC_DQM0 FBC_DQM2 FBC_DQS_WP3 FBC_DQS_WP1 FBC_DQS_WP0 FBC_DQS_WP2 FBC_DQS_RN3 FBC_DQS_RN1 FBC_DQS_RN0 FBC_DQS_RN2
FBC_CMD19 FBC_CMD25 FBC_CMD22 FBC_CMD24 FBC_CMD0 FBC_CMD2 FBC_CMD21 FBC_CMD16 FBC_CMD23 FBC_CMD20 FBC_CMD17 FBC_CMD9
FBC_CMD12 FBC_CMD3 FBC_CMD27
+1.8V_RUN
R50
R50
549
549
R1
R48
R48
FBCD_VREF3_PD
31
Q10
931
931
C44
C44
R49
R49
R2
1.33K
1.33K
0.01U
0.01U
U7A
U7A
H1
H12
J11 J10 H4
H3
F4
H9
F9
E3 E10 N10
N3
D2 D11 P11
P2
D3 D10 P10
P3
K4
H2
K3
M4
K9 H11 K10
L9
K11
M9
K2
L4
G4
G9 H10
H5RS5223CFR-11C
H5RS5223CFR-11C
VREF1 VREF2
CK CK CKE
RAS CAS WE CS
DM0 DM1 DM2 DM3 WDQS0 WDQS1 WDQS2 WDQS3 RDQS0 RDQS1 RDQS2 RDQS3
A0 A1 A2 A3 A4 A5 A6 A7 A8/AP A9 A10 A11
BA0 BA1 BA2
FBCD_VREF3 FBCD_VREF2
Q10
GPIO10_FB_VREF_SW_R
2
2N7002W-7-F
2N7002W-7-F
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
ZQ
MF RES SEN RFU
NC0
FBC_D28
B3
FBC_D27
C2
FBC_D30
C3
FBC_D26
E2
FBC_D31
F3
FBC_D24
F2
FBC_D29
G3
FBC_D8
B11
FBC_D13
B10
FBC_D15
C11
FBC_D10
C10
FBC_D9
E11
FBC_D11
F10
FBC_D12
F11
FBC_D14
G10
FBC_D0
M11
FBC_D1
L10
FBC_D2
N11
FBC_D3
M10
FBC_D5
R11
FBC_D4
R10
FBC_D6
T11
FBC_D7
T10
FBC_D17
M2
FBC_D18
L3
FBC_D16
N2
FBC_D19
M3
FBC_D20
R2
FBC_D22
R3
FBC_D21
T2
FBC_D23
T3 A4
A9 V9 V4 J3
J2
FBC_CMD15
FBC_ZQ0
R139
R139
T6PAD T6PAD
R47
R47
10K
10K
243
243
FBC_CLK15 FBC_CLK1#5
FBC_D25
B2
R133 475R133 475
FBC_CLK1 FBC_CLK1# FBC_CMD11
FBC_CMD27 FBC_CMD8 FBC_CMD18 FBC_CMD10
FBC_DQM6 FBC_DQM5 FBC_DQM4 FBC_DQM7 FBC_DQS_WP6 FBC_DQS_WP5 FBC_DQS_WP4 FBC_DQS_WP7 FBC_DQS_RN6 FBC_DQS_RN5 FBC_DQS_RN4 FBC_DQS_RN7
FBC_CMD5 FBC_CMD13 FBC_CMD21 FBC_CMD20 FBC_CMD19 FBC_CMD25 FBC_CMD4 FBC_CMD9 FBC_CMD17 FBC_CMD6 FBC_CMD23 FBC_CMD16
FBC_CMD3 FBC_CMD12 FBC_CMD1
R1
R2
+1.8V_RUN
H12 J11
J10
E10 N10
D11 P11
D10 P10
H11 K10
K11
H10
R42
R42
549
549
R41
R41
1.33K
1.33K
U6A
U6A
H1
VREF1 VREF2
CK CK
H4
WE
H3
BA2
F4
CS
H9
CKE
F9
CAS
E3
DM0 DM1 DM2
N3
DM3
D2
WDQS0 WDQS1 WDQS2
P2
WDQS3
D3
RDQS0 RDQS1 RDQS2
P3
RDQS3
K4
A4
H2
A5
K3
A6
M4
A9
K9
A0 A1 A2
L9
A11 A10
M9
A3
K2
A8
L4
A7
G4
BA1
G9
BA0 RAS
H5RS5223CFR-11C
H5RS5223CFR-11C
R37
R37
931
931
C29
C29
0.01U
0.01U
MIRROR
FBCD_VREF2_PD
31
Q9
GPIO10_FB_VREF_SW_R
2
2N7002W-7-FQ92N7002W-7-F
FBC_D55
B2
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
ZQ
MF RES SEN RFU
NC0
FBC_D54
B3
FBC_D53
C2
FBC_D52
C3
FBC_D49
E2
FBC_D48
F3
FBC_D51
F2
FBC_D50
G3
FBC_D46
B11
FBC_D45
B10
FBC_D47
C11
FBC_D44
C10
FBC_D43
E11
FBC_D41
F10
FBC_D40
F11
FBC_D42
G10
FBC_D37
M11
FBC_D36
L10
FBC_D39
N11
FBC_D38
M10
FBC_D33
R11
FBC_D34
R10
FBC_D35
T11
FBC_D32
T10
FBC_D61
M2
FBC_D62
L3
FBC_D57
N2
FBC_D63
M3
FBC_D60
R2
FBC_D58
R3
FBC_D59
T2
FBC_D56
T3
FBC_ZQ1
A4 A9
+1.8V_RUN
FBC_CMD15
V9 V4
FBC_CMD14FBC_CMD14
J3 J2
T5PAD T5PAD
R35
R35 243
243
GPIO10_FB_VREF_SW_R 4,6,7,9
+1.8V_RUN +1.8V_RUN
U7B
U7B
K12
VDD10
K1
VDD9
C219
C219
C254
FBC - bottom
+1.8V_RUN
FrameBuffer - Decoupling
C217
C269
C269
C220
B B
C220
0.1U
0.1U
C222
C222
0.1U
0.1U
C2611UC261 1U
C234
C234
0.1U
0.1U
0.1U
0.1U
C237
C237
C245
C245
0.1U
0.1U
0.1U
0.1U
C2571UC257
C2211UC221
1U
1U
C217
C218
C218
0.1U
0.1U
0.1U
0.1U
C250
C250
C271
C271
0.1U
0.1U
0.1U
0.1U
C2351UC235 1U
0.047U
0.047U
Close to K1& K12.
C254
0.047U
0.047U
Note: Change to X7R
A A
5
V11
V2
M12
M1 F12
F1
A11
A2
A1
A12
C1 C4 C9
C12
J4 J9 N1 N4 N9
N12
R1 R4 R9
R12
V1
V12
E1 E4 E9
E12
4
VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 VDDQ19 VDDQ20 VDDQ21 VDDQ22
H5RS5223CFR-11C
H5RS5223CFR-11C
VSS10
VSSQ20 VSSQ19 VSSQ18 VSSQ17 VSSQ16 VSSQ15 VSSQ14 VSSQ13 VSSQ12 VSSQ11 VSSQ10 VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1
J12 J1
VSS9
V10
VSS8
V3
VSS7
L12
VSS6
L1
VSS5
G12
VSS4
G1
VSS3
A10
VSS2
A3
VSS1
T12 T9 T4 T1 P12 P9 P4 P1 L11 L2 G11 G2 D12 D9 D4 D1 B12 B9 B4 B1
FBC - bottom
+1.8V_RUN
FrameBuffer - Decoupling
C205
C205
C216
C216
0.1U
0.1U
0.1U
0.1U
C207
C207
C206
C206
0.1U
0.1U
0.1U
0.1U
C2121UC212
C2041UC204
1U
1U
3
C214
C214
C208
C208
0.1U
0.1U
0.1U
0.1U
C215
C215
C209
C209
0.1U
0.1U
0.1U
0.1U
C2101UC210
C2111UC211
1U
1U
Note: Change to X7R
C202
C202
0.1U
0.1U
C201
C201
0.1U
0.1U
C203
C203
0.047U
0.047U
Close to K1& K12.
2
C213
C213
0.047U
0.047U
K12
K1 V11
V2 M12
M1
F12
F1 A11
A2
A1 A12
C1
C4
C9 C12
J4
J9
N1
N4
N9 N12
R1
R4
R9 R12
V1 V12
E1
E4
E9 E12
U6B
U6B
VDD10 VDD9 VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 VDDQ19 VDDQ20 VDDQ21 VDDQ22
H5RS5223CFR-11C
H5RS5223CFR-11C
VSSQ20 VSSQ19 VSSQ18 VSSQ17 VSSQ16 VSSQ15 VSSQ14 VSSQ13 VSSQ12 VSSQ11 VSSQ10
VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1
J12
VSS10
J1
VSS9
V10
VSS8
V3
VSS7
L12
VSS6
L1
VSS5
G12
VSS4
G1
VSS3
A10
VSS2
A3
VSS1
T12 T9 T4 T1 P12 P9 P4 P1 L11 L2 G11 G2 D12 D9 D4 D1 B12 B9 B4 B1
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
Title
Title
Title
GDDR3_Partition_C
GDDR3_Partition_C
GDDR3_Partition_C
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
XM1 G92 VGA 1A
XM1 G92 VGA 1A
XM1 G92 VGA 1A
Date: Sheet
Date: Sheet
Date: Sheet
Monday, March 17, 2008
Monday, March 17, 2008
Monday, March 17, 2008
1
821
821
821
of
of
of
5
4
3
2
1
09
FBD_CMD[27..0] 5 FBD_D[63..0] 5 FBD_DQM[7..0] 5 FBD_DQS_RN[7..0] 5 FBD_DQS_WP[7..0] 5
D D
R198 475R198 475
FBCD_VREF5
R168
R168 10K
10K
C346
C346
0.047U
0.047U
Close to K1& K12.
FBD_CLK0 FBD_CLK0# FBD_CMD18
FBD_CMD1 FBD_CMD10 FBD_CMD11 FBD_CMD8
FBD_DQM3 FBD_DQM2 FBD_DQM0 FBD_DQM1 FBD_DQS_WP3 FBD_DQS_WP2 FBD_DQS_WP0 FBD_DQS_WP1 FBD_DQS_RN3 FBD_DQS_RN2 FBD_DQS_RN0 FBD_DQS_RN1
FBD_CMD19 FBD_CMD25 FBD_CMD22 FBD_CMD24 FBD_CMD0 FBD_CMD2 FBD_CMD21 FBD_CMD16 FBD_CMD23 FBD_CMD20 FBD_CMD17 FBD_CMD9
FBD_CMD12 FBD_CMD3 FBD_CMD27
FBD_CLK05 FBD_CLK0#5
C C
FBD - bottom
+1.8V_RUN
FrameBuffer - Decoupling
C352
C357
C357
0.1U
0.1U
C342
C342
0.1U
0.1U
C3651UC365 1U
C352
C353
C353
0.1U
0.1U
0.1U
0.1U
C367
C367
C366
C366
0.1U
0.1U
0.1U
0.1U
C3601UC360
C3441UC344
1U
1U
Note: Change to X7R
C345
C345
0.1U
0.1U
C355
C355
0.1U
0.1U
C363
C363
0.1U
0.1U
C347
C347
0.1U
0.1U
C3491UC349 1U
B B
+1.8V_RUN
R70
R70
R1
549
549
R66 931R66 931
FBCD_VREF5_PD
31
Q12
Q12
GPIO10_FB_VREF_SW_R
B2 B3 C2 C3 E2 F3 F2 G3 B11 B10 C11 C10 E11 F10 F11 G10 M11 L10 N11 M10 R11 R10 T11 T10 M2 L3 N2 M3 R2 R3 T2 T3
A4 A9 V9 V4 J3
J2
2N7002W-7-F
2N7002W-7-F
FBD_CMD15 FBD_CMD14
2
R148 475R148 475
C315
C315
0.1U
0.1U
C320
C320
0.1U
0.1U
FBD_CLK1 FBD_CLK1# FBD_CMD11
FBD_CMD27 FBD_CMD8 FBD_CMD18 FBD_CMD10
FBD_DQM7 FBD_DQM4 FBD_DQM6 FBD_DQM5 FBD_DQS_WP7 FBD_DQS_WP4 FBD_DQS_WP6 FBD_DQS_WP5 FBD_DQS_RN7 FBD_DQS_RN4 FBD_DQS_RN6 FBD_DQS_RN5
FBD_CMD5 FBD_CMD13 FBD_CMD21 FBD_CMD20 FBD_CMD19 FBD_CMD25 FBD_CMD4 FBD_CMD9 FBD_CMD17 FBD_CMD6 FBD_CMD23 FBD_CMD16
FBD_CMD3 FBD_CMD12 FBD_CMD1
C329
C329
0.047U
0.047U
Close to K1& K12.
FBD_D25 FBD_D28 FBD_D24 FBD_D29 FBD_D31 FBD_D26 FBD_D30 FBD_D27 FBD_D17 FBD_D19 FBD_D16 FBD_D18 FBD_D23 FBD_D22 FBD_D21 FBD_D20 FBD_D7 FBD_D2 FBD_D6 FBD_D0 FBD_D1 FBD_D5 FBD_D3 FBD_D4 FBD_D9 FBD_D10 FBD_D8 FBD_D11 FBD_D14 FBD_D12 FBD_D13 FBD_D15
FBD_ZQ0
R196
R196
T10PAD T10PAD
R60
R60
10K
10K
243
243
FBD_CLK15 FBD_CLK1#5
FBD - bottom
+1.8V_RUN
FrameBuffer - Decoupling
C328
C328
C341
C341
0.1U
0.1U
0.1U
0.1U
C319
C319
C340
C340
0.1U
0.1U
0.1U
0.1U
C3101UC310
C3431UC343
1U
1U
C330
C330
C333
C333
0.1U
0.1U
0.1U
0.1U
C331
C331
C335
C335
0.1U
0.1U
0.1U
0.1U
C3031UC303
C3271UC327
1U
1U
Note: Change to X7R
C79
C79
R74
R74
R2
0.01U
0.01U
1.33K
1.33K
U9A
U9A
H1
+1.8V_RUN
VREF1
H12
VREF2
J11
CK
J10
CK
H4
CKE
H3
RAS
F4
CAS
H9
WE
F9
CS
E3
DM0
E10
DM1
N10
DM2
N3
DM3
D2
WDQS0
D11
WDQS1
P11
WDQS2
P2
WDQS3
D3
RDQS0
D10
RDQS1
P10
RDQS2
P3
RDQS3
K4
A0
H2
A1
K3
A2
M4
A3
K9
A4
H11
A5
K10
A6
L9
A7
K11
A8/AP
M9
A9
K2
A10
L4
A11
G4
BA0
G9
BA1
H10
BA2
H5RS5223CFR-11C
H5RS5223CFR-11C
U9B
U9B
K12
VDD10
K1
VDD9
V11
VDD8
V2
VDD7
M12
VDD6
M1
VDD5
F12
VDD4
F1
VDD3
A11
VDD2
A2
VDD1
A1
VDDQ1
A12
VDDQ2
C1
VDDQ3
C4
VDDQ4
C9
VDDQ5
C12
VDDQ6
J4
VDDQ7
J9
VDDQ8
N1
VDDQ9
N4
VDDQ10
N9
VDDQ11
N12
VDDQ12
R1
VDDQ13
R4
VDDQ14
R9
VDDQ15
R12
VDDQ16
V1
VDDQ17
V12
VDDQ18
E1
VDDQ19
E4
VDDQ20
E9
VDDQ21
E12
VDDQ22
H5RS5223CFR-11C
H5RS5223CFR-11C
VSSQ20 VSSQ19 VSSQ18 VSSQ17 VSSQ16 VSSQ15 VSSQ14 VSSQ13 VSSQ12 VSSQ11 VSSQ10
VSS10
VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
ZQ
MF RES SEN RFU
NC0
J12 J1
VSS9
V10
VSS8
V3
VSS7
L12
VSS6
L1
VSS5
G12
VSS4
G1
VSS3
A10
VSS2
A3
VSS1
T12 T9 T4 T1 P12 P9 P4 P1 L11 L2 G11 G2 D12 D9 D4 D1 B12 B9 B4 B1
FBCD_VREF5
C364
C364
0.047U
0.047U
C332
C332
0.047U
0.047U
FBCD_VREF4
+1.8V_RUN
+1.8V_RUN
R1
R2
R56
R56
R55
R55
1.33K
1.33K
H1
VREF1
H12
VREF2
J11
CK
J10
CK
H4
WE
H3
BA2
F4
CS
H9
CKE
F9
CAS
E3
DM0
E10
DM1
N10
DM2
N3
DM3
D2
WDQS0
D11
WDQS1
P11
WDQS2
P2
WDQS3
D3
RDQS0
D10
RDQS1
P10
RDQS2
P3
RDQS3
K4
A4
H2
A5
K3
A6
M4
A9
K9
A0
H11
A1
K10
A2
L9
A11
K11
A10
M9
A3
K2
A8
L4
A7
G4
BA1
G9
BA0
H10
RAS
H5RS5223CFR-11C
H5RS5223CFR-11C
U8B
U8B
K12
VDD10
K1
VDD9
V11
VDD8
V2
VDD7
M12
VDD6
M1
VDD5
F12
VDD4
F1
VDD3
A11
VDD2
A2
VDD1
A1
VDDQ1
A12
VDDQ2
C1
VDDQ3
C4
VDDQ4
C9
VDDQ5
C12
VDDQ6
J4
VDDQ7
J9
VDDQ8
N1
VDDQ9
N4
VDDQ10
N9
VDDQ11
N12
VDDQ12
R1
VDDQ13
R4
VDDQ14
R9
VDDQ15
R12
VDDQ16
V1
VDDQ17
V12
VDDQ18
E1
VDDQ19
E4
VDDQ20
E9
VDDQ21
E12
VDDQ22
H5RS5223CFR-11C
H5RS5223CFR-11C
549
549
U8A
U8A
R53 931R53 931
C56
C56
0.01U
0.01U
MIRROR
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
RES
SEN
RFU
NC0
VSS10
VSS9 VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1
VSSQ20 VSSQ19 VSSQ18 VSSQ17 VSSQ16 VSSQ15 VSSQ14 VSSQ13 VSSQ12 VSSQ11 VSSQ10
VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1
ZQ
MF
FBCD_VREF4_PD
B2 B3 C2 C3 E2 F3 F2 G3 B11 B10 C11 C10 E11 F10 F11 G10 M11 L10 N11 M10 R11 R10 T11 T10 M2 L3 N2 M3 R2 R3 T2 T3
A4 A9 V9 V4 J3
J2
J12 J1 V10 V3 L12 L1 G12 G1 A10 A3
T12 T9 T4 T1 P12 P9 P4 P1 L11 L2 G11 G2 D12 D9 D4 D1 B12 B9 B4 B1
2N7002W-7-F
2N7002W-7-F
FBD_CMD15 FBD_CMD14
Q11
Q11
31
FBD_D63 FBD_D61 FBD_D60 FBD_D62 FBD_D56 FBD_D59 FBD_D58 FBD_D57 FBD_D38 FBD_D39 FBD_D37 FBD_D35 FBD_D36 FBD_D32 FBD_D34 FBD_D33 FBD_D55 FBD_D50 FBD_D48 FBD_D54 FBD_D52 FBD_D53 FBD_D49 FBD_D51 FBD_D44 FBD_D43 FBD_D47 FBD_D46 FBD_D40 FBD_D41 FBD_D42 FBD_D45
T7PAD T7PAD
GPIO10_FB_VREF_SW_R
2
FBD_ZQ1
+1.8V_RUN
GPIO10_FB_VREF_SW_R 4,6,7,8
R51
R51 243
243
A A
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
Title
Title
Title
GDDR3_Partition_D
GDDR3_Partition_D
GDDR3_Partition_D
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
XM1 G92 VGA 1A
XM1 G92 VGA 1A
XM1 G92 VGA 1A Monday, March 17, 2008
Monday, March 17, 2008
Monday, March 17, 2008
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
921
921
921
of
of
of
A B C D E F G H
Power Decoupling and GND
1
2
3
NVVDD
+VCC_GFX_CORE
Place under the GPU.
4
G1F
AA13 AA22 AA23 AA24 AA25 AA26 AA27 AA28 AA29 AA30 AC13 AA14 AC15 AC17 AC19 AC21 AC23 AC25 AC27 AC29 AD13 AD14 AA15 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AA16 AD25 AD26 AD27 AD28 AD29 AD30 AE14 AE16 AE18 AE20 AA17 AE22 AE24 AE26 AE28 AE30 AG13 AA18 AA19 AA20 AA21
P20 AG15 AG17 AG19 AG21 AG23 AG25 AG27 AG29 AH13 AH14 AH15 AH16 AH17 AH18 AH19 AH20 AH21 AH22 AH23 AH24 AH25 AH26 AH27
Y27
Y29
G1F
bga1504-nvidia-nb9e-glm2
bga1504-nvidia-nb9e-glm2 COMMON
COMMON
18/19 NVVDD
18/19 NVVDD
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
N23
VDD
N24
VDD
N25
VDD
N26
VDD
N27
VDD
N28
VDD
N29
VDD
N30
VDD
P14
VDD
P16
VDD
P18
VDD
N22
VDD
AH28
VDD
N21
VDD
AH29
VDD
AH30
VDD
AJ14
VDD
AJ16
VDD
AJ18
VDD
AJ20
VDD
AJ24
VDD
AJ26
VDD
AJ28
VDD
AJ30
VDD
N20
VDD
N13
VDD
N14
VDD
N15
VDD
N16
VDD
N17
VDD
N18
VDD
N19
VDD
P22
VDD
P24
VDD
P26
VDD
P28
VDD
P30
VDD
T13
VDD
T15
VDD
T17
VDD
T19
VDD
T21
VDD
T23
VDD
T25
VDD
T27
VDD
T29
VDD
U13
VDD
U14
VDD
U15
VDD
U16
VDD
U17
VDD
U18
VDD
U19
VDD
U20
VDD
U21
VDD
U22
VDD
U23
VDD
U24
VDD
U25
VDD
U26
VDD
U27
VDD
U28
VDD
U29
VDD
U30
VDD
V14
VDD
V16
VDD
V18
VDD
V20
VDD
V22
VDD
V24
VDD
V26
VDD
V28
VDD
V30
VDD
Y13
VDD
Y15
VDD
Y17
VDD
Y19
VDD
Y21
VDD
Y23
VDD
Y25
VDD
FBVDDQ
G1H
G1H
bga1504-nvidia-nb9e-glm2
bga1504-nvidia-nb9e-glm2 COMMON
COMMON
19/19 NC
19/19 NC
AC34
NC
AC36
NC
AC37
NC
AC7
NC
AF34
NC
AF36
NC
AF37
NC
AF7
NC
AG37
NC
AG38
NC
AH40
NC
AJ7
NC
AK32
NC
AL32
NC
AL40
NC
AM29
NC
AM30
NC
AM31
NC
AM32
NC
AM7
NC
AP34
NC
AR36
NC
AT11
NC
AT13
NC
AT35
NC
AU14
NC
AU17
NC
AU20
NC
AU23
NC
AU26
NC
AV10
NC
AV12
NC
AV28
NC
AY31
NC
C12
NC
E15
NC
E16
NC
F16
NC
F17
NC
F20
NC
F23
NC
F31
NC
G17
NC
G20
NC
G23
NC
G26
NC
G29
NC
G8
NC
H28
NC
H7
NC
J17
NC
J20
NC
J23
NC
J29
NC
J9
NC
L14
NC
L16
NC
L28
NC
L29
NC
M3
NC
M37
NC
P11
NC
P34
NC
P36
NC
R11
NC
R3
NC
R35
NC
T11
NC
U11
NC
U36
NC
U7
NC
Y34
NC
Y36
NC
Y37
NC
Y7
NC
C256
C256
0.1U
0.1U
C241
C241
0.1U
0.1U
C236
C236 .47U/6.3V
.47U/6.3V
C297
C297 .47U/6.3V
.47U/6.3V
C2461UC246 1U
C300
C300
4.7U
4.7U
Under GPU
C288
C288
0.1U
0.1U
C224
C224
0.1U
0.1U
C240
C240 .47U/6.3V
.47U/6.3V
C248
C248 .47U/6.3V
.47U/6.3V
C3211UC321 1U
C406
C406
4.7U
4.7U
C226
C226
0.1U
0.1U
C225
C225
0.1U
0.1U
C232
C232 .47U/6.3V
.47U/6.3V
C243
C243 .47U/6.3V
.47U/6.3V
C2751UC275 1U
C407
C407
4.7U
4.7U
C230
C230 .47U/6.3V
.47U/6.3V
C233
C233 .47U/6.3V
.47U/6.3V
C231
C231 .47U/6.3V
.47U/6.3V
C279
C279 .47U/6.3V
.47U/6.3V
+1.8V_RUN
C244
C244
0.1U
0.1U
C280
C280
0.1U
0.1U
C227
C227 .47U/6.3V
.47U/6.3V
C266
C266 .47U/6.3V
.47U/6.3V
C2391UC239 1U
C238
C238
4.7U
4.7U
C402
C262
C262
C251
C251
C263
C263
C282
C282
C289
C252
C252
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
C289
0.1U
0.1U
0.1U
0.1U
C402
C265
C265
0.1U
0.1U
0.1U
0.1U
+VCC_GFX_CORE
10
1
2
3
4
C292
C292
C283
C283
C295
C295
C281
C281
C290
C290
C296
AB20
AJ17
GND
GND
GND
GND
AM2
AM35
0.1U
0.1U
C285
C285 .47U/6.3V/0402
.47U/6.3V/0402
C400
C400 .47U/6.3V/0402
.47U/6.3V/0402
BA17
BA14
BA11
GND
GND
GNDB8GND
GND
GND
GND
GND
AM8
AM5
AM41
AM38
C296
0.1U
0.1U
C301
C301 .47U/6.3V/0402
.47U/6.3V/0402
C401
C401 .47U/6.3V/0402
.47U/6.3V/0402
Y8
Y41
Y38
Y24
Y22
Y20
Y18
Y16
Y14
W30
R23
R22
R21
R20
R19
R18
R17
R16
R15
R14
R13
P41
P38
P37
P35
P29
P27
P25
P23
P21
P19
P17
P15
P13
L41
L38
L35
H41
H38
H35
H32
H29
H26
H23
H20
H17
H14
H11
F29
F26
AK20
AK19
AK18
AK17
AK16
AK15
AK14
AK13
AJ8
AJ5
AJ41
AJ38
AJ35
AJ29
AJ27
AJ25
AJ23
AJ2
AJ19
E41
E38
E35
E32
E29
E26
E23
E20
E17
E14
E11
BA8
BA5
BA41
BA38
BA35
BA32
BA29
BA26
BA23
BA20
BA2
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GNDE5GND
GND
GND
GND
GND
GND
GND
GND
GNDE2GND
GND
GND
GNDC3GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AP26
AP23
AP20
AR17
AR14
AR11
AR8
AR5
AR2
AR29
AR26
AR23
AR20
AT26
AT23
AT20
AT17
AT14
AV17
AV14
AV11
AU37
AR41
AR38
AR35
AR32
AV8
AV5
AV2
AY40
AV41
AV38
AV35
AV32
AV29
AV26
AV23
AV20
GNDF6GND
GND
GNDE8GND
GND
GND
GND
GND
GND
GND
GNDB2GND
GND
GND
GND
B38
B35
B32
B29
B26
B23
B20
B17
B14
B11
GND
GND
GND
GND
GND
GND
GND
GNDH2GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GNDB5GND
GND
T16
T14
B41
R30
R29
R28
R27
R26
R25
R24
GND
GND
GNDL8GNDL5GND
GND
GND
GNDL2GNDH8GNDH5GND
GND
GND
GNDU2GND
GND
GND
GND
GND
GND
GND
GND
T30
T28
T26
T24
T22
T20
T18
U38
U37
U35
GND
GND
GND
GND
GND
GND
GND
GND
GNDP2GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GNDU8GNDU5GND
GND
U41
V29
V27
V25
V23
V21
V19
V17
V15
V13
V11
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GNDP8GNDP5GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
W23
W22
W21
W20
W19
W18
W17
W16
W15
W14
W13
GNDY5GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GNDY2GND
GND
GND
GND
GND
GND
GND
Y35
Y30
Y28
Y26
W29
W28
W27
W26
W25
W24
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
Title
Title
Title
G92_PWRDecoupling_&_GND
G92_PWRDecoupling_&_GND
G92_PWRDecoupling_&_GND
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
XM1 G92 VGA 1A
XM1 G92 VGA 1A
XM1 G92 VGA 1A
Date: Sheet
Date: Sheet
Date: Sheet
Monday, March 17, 2008
Monday, March 17, 2008
Monday, March 17, 2008
of
of
of
10 21
10 21
10 21
55
C264
C264
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
AF8
AF5
GND
GND
GND
GND
AE15
AE13
C278
C278 .47U/6.3V/0402
.47U/6.3V/0402
C397
C397 .47U/6.3V/0402
.47U/6.3V/0402
AG16
AB18
AG14
AG11
GND
GND
GND
GND
GND
GND
GND
GND
AB15
AE21
AE19
AE17
0.1U
C277
C277 .47U/6.3V/0402
.47U/6.3V/0402
C398
C398 .47U/6.3V/0402
.47U/6.3V/0402
AB19
AJ15
AJ13
AG30
AG28
AG26
AG24
AG22
AG20
AG18
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AK30
AK29
AK28
AK27
AK26
AK25
AK24
AK23
AK22
AK21
0.1U
0.1U
C253
C253
C270
C404
C404
4.7U
4.7U
AF20
AF2
GND
GND
GND
GND
AC16
AC14
.47U/6.3V/0402
.47U/6.3V/0402
C395
C395 .47U/6.3V/0402
.47U/6.3V/0402
AF24
AF23
AF22
AF21
GND
GND
GND
GND
GND
GND
GND
GND
AC2
AC22
AC20
AC18
C270 .47U/6.3V/0402
.47U/6.3V/0402
C396
C396 .47U/6.3V/0402
.47U/6.3V/0402
C405
C405
4.7U
4.7U
AF41
AF38
AF35
AF30
AF29
AF28
AB17
AF27
AF26
AF25
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AC8
AC5
AB14
AC41
AC38
AC35
AC30
AC28
AC26
AC24
C276
C276 .47U/6.3V/0402
.47U/6.3V/0402
C399
C399 .47U/6.3V/0402
.47U/6.3V/0402
C403
C403
4.7U
4.7U
AF19
AB16
AF18
AF17
AF16
AF15
AF14
AF13
AE29
AE27
AE25
AE23
GND
17/19 GND
17/19 GND
GND
COMMON
COMMON
G1G
G1G
AA11
bga1504-nvidia-nb9e-glm2
bga1504-nvidia-nb9e-glm2
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AB13
AB30
AB29
AB28
AB27
AB26
AB25
AB24
AB23
AB22
AB21
A B C D E F G H
VBIOS
1
SPDIF_DP3
2
R239 40.2KR239 40.2K R238 40.2KR238 40.2K
MECHANICAL COMPONENTS-SCREW HOLES
SPDIF to DP port from MB.
*BAT54S-7-F_NC
*BAT54S-7-F_NC
R115
R115 *4.99K_NC
*4.99K_NC
Impedance 56ohm.
R109
R109 *4.99K_NC
*4.99K_NC
2
1
17
3
D2
D2
SPDIF_DP_L
T4
ROM_CS
V4
ROM_SI
U4
ROM_SO
T5
ROM_SCLK
I2CH_SCL
I2CH_SDA
BUFRST
PGOOD_OUT
RFU_GND
SPDIF
RFU
I2CH_SCL
Y6
I2CH_SDA
AA6
SPDIF_DP_L
V5 V8
T109PAD T109PAD
T8
T105PAD T105PAD
L15 AP15
Impedance 56ohm.
+3.3V_RUN
C109 0.01UC109 0.01U
L31 L30
T6 V7 U6
T7 V6
Y11 W11
G1I
G1I
bga1504-nvidia-nb9e-glm2
bga1504-nvidia-nb9e-glm2 COMMON
COMMON
15/19 MISC2
15/19 MISC2
BBIASN_NC BBIASP_NC
HDA_BCLK HDA_RST HDA_SDI HDA_SDO HDA_SYNC
STRAP_REF_MISC
STRAP_REF_MIOB
BIOS ROM
SPI ROM for V-BIOS
+3.3V_RUN
R106
R106
10K
10K
ROM_CS# ROM_SCLK ROM_SI ROM_SO
+3.3V_RUN
FLASH_WP# FLASH_VSS
R114 10KR114 10K
ROM_SI 19 ROM_SO 19 ROM_SCLK 19
I2CH_SCL I2CH_SDA
U14
U14
1
CE#
6
SCK
5
SI
2
SO
HOLD#
3
WP#
AT25F512AN-10SU-2.7
AT25F512AN-10SU-2.7
11
PV4
U33 dual layout for SST with SGT (U37).
+3.3V_RUN
U13
FLASH_VDD
8
VDD
VSS
7 4
FLASH_HOLD#
R112 10KR112 10K
C111
C111
0.1U
0.1U
ROM_CS# ROM_SCLK ROM_SI ROM_SO
FLASH_WP# FLASH_VSS
U13
1
CE#
VDD
6
SCK
5
SI
2
SO
HOLD#
3
WP#
VSS
*M25P05-AVMN6P_NC
*M25P05-AVMN6P_NC
8
7 4
FLASH_VDD
FLASH_HOLD#
PV4
*PAD138X98_H:4_NC
*PAD138X98_H:4_NC
GND
1
PV2
PV2
*PAD138X98_H:4_NC
*PAD138X98_H:4_NC
Clips for EMI & put these on TOP.
PV1
PV1
*PAD138X98_H:4_NC
*PAD138X98_H:4_NC
GND
1
PV3
PV3
*PAD138X98_H:4_NC
*PAD138X98_H:4_NC
GND
1
GND
1
PV5
PV5
*PAD138X98_H:4_NC
*PAD138X98_H:4_NC
GND
1
1
2
MECHANICAL COMPONENTS-Screw Holes
TH8
3
HDCP ROM
+3.3V_RUN
R197 2.2KR197 2.2K
20
I2CH_SDA
I2CH_SCL
T117 PADT117 PAD
AT24C16B(190-00007-0000-T00)
AT24C16B(190-00007-0000-T00)
+3.3V_RUN
U16
U16
5
8
SDA
VCC
3
7
SDA
VCC
C359
C359
0.1U
6
SCL
2
NC2
0.1U
1
GND
4
GND
1
35
4 2
1
TH8
H-TC276BC264D126P2-4
H-TC276BC264D126P2-4
TH5
TH5
H-TC276BC264D126P2-4
H-TC276BC264D126P2-4
35
4 2
1
TH7
TH7
H-TC276BC264D126P2-4
H-TC276BC264D126P2-4
35
4 2
3
TH3
TH4
+3.3V_RUN
R202
R202
2.2K
4
5
2.2K
I2CH_SCL
R201
R201 *10K_NC
*10K_NC
Stuff R202 for standard I2C ROM(AT24C16B(190-00007-0000-T00). Stuff R201 for crypto ROM(AT88SC0808C-SU)
C GE
1
TH4
H-TC276BC264D126P2-4
H-TC276BC264D126P2-4
35
4 2
1
TH6
TH6
H-TC276BC264D126P2-4
H-TC276BC264D126P2-4
35
4 2
1
TH2
TH2
H-TC276BC264D126P2-4
H-TC276BC264D126P2-4
35
4 2
1
TH1
TH1
H-TC276BC264D126P2-4
H-TC276BC264D126P2-4
35
4 2
1
TH3
H-TC276BC264D126P2-4
H-TC276BC264D126P2-4
35
4 2
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
Title
Title
Title
G92_V-BIOS_JTAG_Screw
G92_V-BIOS_JTAG_Screw
G92_V-BIOS_JTAG_Screw
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
XM1 G92 VGA 1A
XM1 G92 VGA 1A
XM1 G92 VGA 1A
Date: Sheet
Date: Sheet
Date: Sheet
Monday, March 17, 2008
Monday, March 17, 2008
Monday, March 17, 2008
HFDBA
of
of
of
11 21
11 21
11 21
4
5
A B C D E F G H
PRIMARY VGA (DAC A)
1
+3.3V_RUN
L8
L8 BLM18EG601SN1D
BLM18EG601SN1D
12.00
C67
C67
C64
C64
C314
4700P
4700P
C314 470P
470P
4.7U
4.7U
2
3.3V
12
1
G1K
G1K
bga1504-nvidia-nb9e-glm2
bga1504-nvidia-nb9e-glm2 COMMON
COMMON
6/19 DACA
DACA_VDD DACA_VREF
C302
C302
0.1U
0.1U
DACA_RSET
R147
R147 124
124
6/19 DACA
AM12
DACA_VDD
AP10
DACA_VREF
AP11
DACA_RSET
I2CA_SCL I2CA_SDA
DACA_HSYNC DACA_VSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
AA1 AA4
AU12 AT12
VGA_RED
AU10
VGA_GRN
AU11
VGA_BLU
AT10
CLK_DDC2 DAT_DDC2
VGAHSYNC VGAVSYNC
50 OHM TRACE TO THE FILTER
R143
R143 150
150
CLK_DDC2 3 DAT_DDC2 3
VGAHSYNC 3 VGAVSYNC 3
R146
R146
R144
R144
150
150
150
150
VGA_RED 3 VGA_GRN 3 VGA_BLU 3
2
37.5 OHM TRACE TO 150R RESISTOR- 8(9)mil trace width.
3
TV OUT (DAC B)
4
5
R150 10KR150 10K
T79 PADT79 PAD T73 PADT73 PAD
AL11
AN3 AL3
G1L
G1L
bga1504-nvidia-nb9e-glm2
bga1504-nvidia-nb9e-glm2 COMMON
COMMON
7/19 DACB(TV)
7/19 DACB(TV)
DACB_VDD
DACB_VREF
DACB_RSET
37.5 OHM TRACE TO 150R RESISTOR
DACB_CSYNC
AK2
DACB_CSYNC
DACB_RED
DACB_GREEN
DACB_BLUE
DACB_RED
AK1
DACB_GREEN
AL1
DACB_BLUE
AL2
C GE
50 OHM TRACE TO FILTER
R154 *75_NCR154 *75_NC
R156 *75_NCR156 *75_NC R152 *75_NCR152 *75_NC R151 *75_NCR151 *75_NC
3
SECONDARY VGA (DAC C)--NO USING on Nike
RP4
RP4
2
G1M
G1M
bga1504-nvidia-nb9e-glm2
bga1504-nvidia-nb9e-glm2 COMMON
COMMON
8/19 DACC
DACC_VDD
SNN_DACC_VREF
T75 PADT75 PAD T82 PADT82 PAD
SNN_DACC_RSET
R157
R157 10K
10K
8/19 DACC
AM11
DACC_VDD
AW8
DACC_VREF
AV7
DACC_RSET
AA3
I2CB_SCL
AA2
I2CB_SDA
AU7
DACC_HSYNC
AU8
DACC_VSYNC
AT6
DACC_RED
AT7
DACC_GREEN
AT8
DACC_BLUE
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
1 3
I2CB_SCL I2CB_SDA
DACC_HSYNC DACC_VSYNC
SNN_DACC_RED SNN_DACC_GREEN SNN_DACC_BLUE
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
G92_VGA_&_TV OUT
G92_VGA_&_TV OUT
G92_VGA_&_TV OUT
XM1 G92 VGA 1A
XM1 G92 VGA 1A
XM1 G92 VGA 1A Monday, March 17, 2008
Monday, March 17, 2008
Monday, March 17, 2008
2.2KX2
2.2KX2
4
I2CB_SCL I2CB_SDA
T70PAD T70PAD T83PAD T83PAD
+3.3V_RUN
T78PAD T78PAD T74PAD T74PAD T77PAD T77PAD
HFDBA
of
of
of
12 21
12 21
12 21
4
5
A B C D E F G H
LVDS (LINK A/B) AND BACKLIGHT CONTROL
1
220R@100MHz
L6 INDUCTORL6 INDUCTOR
+1.8V_RUN
ALT_PLL_VDD: G92M = 1.8V /G7xM = 2.5V
220R@100MHz
L4 INDUCTORL4 INDUCTOR
+1.8V_RUN
2
R158 *1K_NCR158 *1K_NC
C20
C20
4.7U
4.7U
16.00
C16
C16
4.7U
4.7U
C336
C336 4700P
4700P
C18
C18 4700P
4700P
C24
C24 4700P
4700P
IFPAB_RSET
IFPAB_PLLVDD
C339
C339 470P
470P
IFPAB_IOVDD
C22
C22 470P
470P
C334
C334 470P
470P
AR10
AK11
AP8 AP9
G1N
G1N
bga1504-nvidia-nb9e-glm2
bga1504-nvidia-nb9e-glm2 COMMON
COMMON
9/19 IFPAB
9/19 IFPAB
IFPAB_RSET
IFPAB_PLLVDD
IFPA_IOVDD
IFPB_IOVDD
IFPA_TXC IFPA_TXC
IFPA_TXD0 IFPA_TXD0
IFPA_TXD1 IFPA_TXD1
IFPA_TXD2 IFPA_TXD2
IFPA_TXD3 IFPA_TXD3
IFPB_TXC IFPB_TXC
IFPB_TXD4 IFPB_TXD4
IFPB_TXD5 IFPB_TXD5
IFPB_TXD6 IFPB_TXD6
IFPB_TXD7 IFPB_TXD7
LCD_ACLK-
LCD_ACLK+
LCD_ACLK-
AT9
LCD_ACLK+
AR9
LCD_A0-
AY6
LCD_A0+
AW7
LCD_A1-
AY7
LCD_A1+
AY8
LCD_A2-
AW9
LCD_A2+
AY9
LCD_A3-
AV9
LCD_A3+
AU9
LCD_BCLK-
BA10
LCD_BCLK+
BB10
LCD_B0-
BA4
LCD_B0+
AY5
LCD_B1-
BB6
LCD_B1+
BA6
LCD_B2-
BB7
LCD_B2+
BA7
LCD_B3-
BA9
LCD_B3+
BB9
R132
R132 *200_NC
*200_NC
LCD_BCLK-
LCD_BCLK+
R131
R131 *200_NC
*200_NC
J1
J1
58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
FI-DP58SB-VF88L
FI-DP58SB-VF88L
5
58 57
LVDS_CBL_DET#
56 55
LCD_BCLK-
54
LCD_BCLK+
53 52
LCD_B3-
51
LCD_B3+
50 49
LCD_B2-
48
LCD_B2+
47 46
LCD_B1-
45
LCD_B1+
44 43
LCD_B0-
42
LCD_B0+
41 40
LCD_ACLK-
39
LCD_ACLK+
38 37
LCD_A3-
36
LCD_A3+
35 34
LCD_A2-
33
LCD_A2+
32 31
LCD_A1-
30
LCD_A1+
29 28
LCD_A0-
27
LCD_A0+
26 25
LCD_DDCDAT
24
LCD_DDCCLK
23 22 21 20 19 18 17 16
40mil
15 14 13 12 11 10 9
9
FPBACK_EN
8
8
7
7
6
6
5
5
4
4
3
3
2
2
PNL_BKLT_CBL_DET#
1
1
LVDS_CBL_DET# 3
LCD_DDCDAT 18 LCD_DDCCLK 18
+3.3V_RUN +LCDVCC
LCD_TST 3
+G_PWR_SRC
+5V_RUN
C173
C173 47P
47P
LVDS_CBL_DET# PNL_BKLT_CBL_DET#
C172
C172 47P
47P
SBAT_SMBCLK 3,18 SBAT_SMBDAT 3,18
PNL_BKLT_CBL_DET# 3
R130 *100K_NCR130 *100K_NC
1 2
R128 *100K_NCR128 *100K_NC
1 2
+LCDVCC
C190
C190
0.1U
0.1U
C192
C192
0.1U
0.1U
Adress : A9H --Contrast AAH --Backlight
13
+3.3V_RUN
C189
C189
0.047U
0.047U
+G_PWR_SRC+5V_RUN
+3.3V_RUN
C188
C188
0.1U
0.1U
C184
C184
0.1U
0.1U
1
C191
C191
0.1U
0.1U
2
3
Note: Pin 3: GND ( LVDS_CBL_DET# loop pin) Pin 2: GND (PNL_BKLT_CBL_DET# loop pin)
+15V_ALW
+3.3V_RUN
C1 0.047UC1 0.047U
U1
U1
5
*TC7SZ08FU(T5L,F,T)_NC
*TC7SZ08FU(T5L,F,T)_NC
FP_BACK_EN3
4
5
PANEL_BKEN18
M'07 inverter support - Populate R64 Depop U6,C135. D'05 inverter support - Populate U6,C135; Depop R64.
R6 0R6 0
R3 100KR3100K
Populate R68 for DPST implementation only.
BIA_PWM18
1 2
R2
*0_NCR2*0_NC
FPBACK_EN
4
3
+3.3V_RUN
Populate R66 for platform without DPST support. No Stuff for
R5 10KR510K
Discrete DSPT support due to back up plan.
C GE
D2 option for M08 control.
FM1: Using +15V_SUS to replace +3.3V_ALW.(Refer to UMA schematic). FM5:Change to +5V_ALW from +15V_SUS.
LCD_VCC_EN3
ENVDD18
D3
1
2
BAT54C T/RD3BAT54C T/R
R129 *0_NCR129 *0_NC
+5V_RUN
3
R1
*47K_NCR1*47K_NC
2
+3.3V_RUN
R120
R120 *47K_NC
*47K_NC
DTC124EUAT-106
DTC124EUAT-106 Q16
Q16
1 3
+5V_ALW
+3.3V_RUN
Q15
Q15
SI3456DV-T1-E3
SI3456DV-T1-E3
6 524
R118
R118
1
330K
330K
LCDVCC_ON
R121
R121 *47K_NC
*47K_NC
31
2
2N7002W-7-F
2N7002W-7-F Q14
Q14
R117
R117 47K
47K
R447R4
3
47
C161
C161
0.01U
0.01U
31
2
LVDS POWER
Q1 2N7002W-7-FQ12N7002W-7-F
+LCDVCC
C2
C3 22UC322U
0.01UC20.01U
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
Title
Title
Title
G92_VGA_&_TV OUT
G92_VGA_&_TV OUT
G92_VGA_&_TV OUT
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
XM1 G92 VGA 1A
XM1 G92 VGA 1A
XM1 G92 VGA 1A
Date: Sheet
Date: Sheet
Date: Sheet
Monday, March 17, 2008
Monday, March 17, 2008
Monday, March 17, 2008
HFDBA
of
of
of
13 21
13 21
13 21
3
4
5
A B C D E F G H
INTERNAL TMDS/HDMI LINKS C/D
14
R8001MR800 1M
VIDOUTB_AN VIDOUTB_AP
VIDOUTB_HPD
GPIO1_HPDB_R
R1691KR169 R170
R170
2
+5V_RUN
1K *1K_NC
*1K_NC
DP2_CA_DET#
3
1
R216
R216
4.7K
4.7K
BSS138_NL
BSS138_NL
Q17
Q17
DIFF100_DP2_TX0P_9801
DIFF100_DP2_TX1P_9801 DIFF100_DP2_TX1N_9801 DIFF100_DP2_TX2P_9801 DIFF100_DP2_TX2N_9801 DIFF100_DP2_TX3P_9801 DIFF100_DP2_TX3N_9801
T116PAD T116PAD T115PAD T115PAD
T15PAD T15PAD T12PAD T12PAD
T106PAD T106PAD T11PAD T11PAD
T112PAD T112PAD T13PAD T13PAD
T113PAD T113PAD T17PAD T17PAD
5
R2260R226 0
R225
R225 100K
100K
R90R9 0
R205
R205 *12K_NC
*12K_NC
R209
R209 *33K_NC
*33K_NC
R221
R221 *0_NC
*0_NC
31
2N7002W-7-F
2N7002W-7-F
C370
C370
0.1U
0.1U
C384 0.1UC384 0.1U C385 0.1UC385 0.1U C386 0.1UC386 0.1U C387 0.1UC387 0.1U C388 0.1UC388 0.1U C389 0.1UC389 0.1U C391 0.1UC391 0.1U C390 0.1UC390 0.1U
No using on G94.
1
+3.3V_RUN
I2CE_SCL 18 I2CE_SDA 18
2
3
4
5
16
R793
R793
R794
R794 *2K_NC
R217
R217
DP2_CA_DET#
*2K_NC
DP2_AUX+
DP2_AUX+ 3
DP2_AUX-
DP2_AUX- 3
R218
R218 *100K_NC
*100K_NC
16
14
U18
U18
3
1A21B
R798 33R798 33
6
1
1OE
7
2OE
SN74CBTD3306CPWR
SN74CBTD3306CPWR
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
R797 33R797 33
2A52B
8
VCC
4
GND
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
G92_TMDS
G92_TMDS
G92_TMDS
XM1 G92 VGA 1A
XM1 G92 VGA 1A
XM1 G92 VGA 1A Monday, March 17, 2008
Monday, March 17, 2008
Monday, March 17, 2008
+5V_RUN
+3.3V_RUN
R75
R75 10K
10K
HFDBA
R71
R71 10K
10K
18
of
of
of
14 21
14 21
14 21
*2K_NC
*2K_NC
R160R16 0
*100K_NC
31
R222
R222 *0_NC
*0_NC
2N7002W-7-F
2N7002W-7-F Q21
Q21
C371
C371
0.1U
0.1U
*100K_NC
DP2_TX0+ 3 DP2_TX0- 3 DP2_TX1+ 3 DP2_TX1- 3 DP2_TX2+ 3 DP2_TX2- 3 DP2_TX3+ 3 DP2_TX3- 3
14
2
2
Q20
Q20
DP2_TX0+ DP2_TX0-DIFF100_DP2_TX0N_9801 DP2_TX1+ DP2_TX1­DP2_TX2+ DP2_TX2­DP2_TX3+ DP2_TX3-
DPL3_TXC DPL3_TXC
DPL2_TXD0 DPL2_TXD0
DPL1_TXD1 DPL1_TXD1
DPL0_TXD2 DPL0_TXD2
DPL3_TXC DPL3_TXC
DPL2_TXD0 DPL2_TXD0
DPL1_TXD1 DPL1_TXD1
DPL0_TXD2 DPL0_TXD2
AUX AUX
AUX AUX
DP2_HP_DET3
R91 0R91 0
R250R25 0
10
AR7 AR6
DIFF100_DP2_TX3N_9801
AP7
DIFF100_DP2_TX3P_9801
AP6
DIFF100_DP2_TX2N_9801
AP5
DIFF100_DP2_TX2P_9801
AP4
DIFF100_DP2_TX1N_9801
AP3
DIFF100_DP2_TX1P_9801
AR3
DIFF100_DP2_TX0N_9801
AU3
DIFF100_DP2_TX0P_9801
AT3
AT4 AR4
AN2 AN1
AP1 AP2
AT2 AT1
AU1 AU2
1
GPIO1_HPDB18
2
IFPE
IFPE
DP2_CA_DET
GPIO14_HPD_DVIB
DP2
DP2_CA_DET3
3
GPIO14_HPD_DVIB18
G1P
G1P
bga1504-nvidia-nb9e-glm2
bga1504-nvidia-nb9e-glm2 COMMON
COMMON
11/19 IFPEF
11/19 IFPEF
IFPEF_RSET
R1641KR164
C82
C82 4700P
4700P
1K
IFPEF_PLLVDD
C374
C374 470P
470P
220R@100MHz
L14 INDUCTORL14 INDUCTOR
4
+1.8V_RUN
C83
C83
4.7U
4.7U
AM9
IFPEF_RSET
AH11
IFPEF_PLLVDD
ALT_PLL_VDD: G92M = 1.8V /G7xM = 2.5V
220R@100MHz
+1.1V_GFX_PCIE
5
L15 INDUCTORL15 INDUCTOR
16.00
C85
C85
4.7U
4.7U
IFPE_IOVDD
C86
C86
C338
C338
C84
C84 470P
470P
4700P
4700P
4700P
4700P
C GE
9
AN6
IFPE_IOVDD
AN7
C375
C375 470P
470P
IFPF_IOVDD
IFPF
IFPF
VIDOUTA_HPD
DP_HP_DET3
R2040R204 0
DP_CA_DET3
G1O
G1O
bga1504-nvidia-nb9e-glm2
bga1504-nvidia-nb9e-glm2 COMMON
COMMON
10/19 IFPCD
10/19 IFPCD
IFPCD_RSET
IFPCD_PLLVDD
IFPC_IOVDD
IFPD_IOVDD
GPIO0_HPDA_R
DP_CA_DET
GPIO13_HPD_DVIA
DP1
IFPC
IFPC
IFPD
IFPD
R200
R200 100K
100K
+5V_RUN
R83
R83
4.7K
4.7K
DP_CA_DET#
3
2
BSS138_NL
BSS138_NL
Q13
Q13
1
R84
10
R1651KR165 R166
R166
DIFF100_DP_TX3N_9801 DIFF100_DP_TX3P_9801
DIFF100_DP_TX2N_9801 DIFF100_DP_TX2P_9801
DIFF100_DP_TX1N_9801 DIFF100_DP_TX1P_9801
DIFF100_DP_TX0N_9801 DIFF100_DP_TX0P_9801
1K *1K_NC
*1K_NC
R84 *12K_NC
*12K_NC
R78
R78 *33K_NC
*33K_NC
R7991MR799
R320R32
1M
0
AV6
AUX
AU6
AUX
AV3
DPL3_TXC
AU4
DPL3_TXC
AW3
DPL2_TXD0
AV4
DPL2_TXD0
AY4
DPL1_TXD1
AW4
DPL1_TXD1
AW5
DPL0_TXD2
AW6
DPL0_TXD2
AT5
AUX
AU5
AUX
AW2
DPL3_TXC
AW1
DPL3_TXC
AY1
DPL2_TXD0
AY2
DPL2_TXD0
AY3
DPL1_TXD1
BA3
DPL1_TXD1
BB3
DPL0_TXD2
BB4
DPL0_TXD2
R224
R224 *0_NC
*0_NC
VIDOUTA_AN VIDOUTA_AP
R70R7 0
14 14
31
2
2
2N7002W-7-F
2N7002W-7-F
Q19
Q19
C372
C372
0.1U
0.1U
DIFF100_DP_TX0P_9801
DIFF100_DP_TX1P_9801 DIFF100_DP_TX1N_9801 DIFF100_DP_TX2P_9801 DIFF100_DP_TX2N_9801 DIFF100_DP_TX3P_9801 DIFF100_DP_TX3N_9801
T92PAD T92PAD T91PAD T91PAD
T111PAD T111PAD T110PAD T110PAD
T114PAD T114PAD T108PAD T108PAD
T102PAD T102PAD T96PAD T96PAD
T103PAD T103PAD T99PAD T99PAD
R80R8 0
31
2N7002W-7-F
2N7002W-7-F Q18
Q18
C369
C369
0.1U
0.1U
C376 0.1UC376 0.1U C377 0.1UC377 0.1U C378 0.1UC378 0.1U C379 0.1UC379 0.1U C380 0.1UC380 0.1U C381 0.1UC381 0.1U C383 0.1UC383 0.1U C382 0.1UC382 0.1U
+3.3V_RUN
16
R791
R791
R792
R792
*100K_NC
*100K_NC
*2K_NC
*2K_NC
DP_AUX+ DP_AUX-
16
R223
R223
R219
R219
*100K_NC
*100K_NC
*100K_NC
*100K_NC
R220
R220 *0_NC
*0_NC
DP_CA_DET#
DP_TX0+
DP_TX0+ 3
DP_TX0-DIFF100_DP_TX0N_9801
DP_TX0- 3
DP_TX1+
DP_TX1+ 3
DP_TX1-
DP_TX1- 3
DP_TX2+
DP_TX2+ 3
DP_TX2-
DP_TX2- 3
DP_TX3+
DP_TX3+ 3
DP_TX3-
DP_TX3- 3
3
6
1
1OE
7
2OE
SN74CBTD3306CPWR
SN74CBTD3306CPWR
DP_AUX+ 3 DP_AUX- 3
U17
U17
1A21B
R796 33R796 33 R795 33R795 33
2A52B
8
VCC
4
GND
+5V_RUN
+3.3V_RUN
R38
R38 10K
10K
R36
R36 10K
10K
I2CD_SDA 18
18
GPIO0_HPDA18
1
IFPCD_RSET
R206 1KR206 1K
C21
C21
4.7U
4.7U
IFPCD_PLLVDD
C23
C23
C373
C373
4700P
4700P
470P
470P
+1.8V_RUN
220R@100MHz
L11 INDUCTORL11 INDUCTOR
R96 0R96 0
GPIO13_HPD_DVIA18 I2CD_SCL 18
AN5
AJ11
ALT_PLL_VDD: G92M = 1.8V /G7xM = 2.5V
+1.1V_GFX_PCIE
220R@100MHz
L12 INDUCTORL12 INDUCTOR
16.00
C71
C71
4.7U
4.7U
C81
C81 4700P
4700P
IFPCD_IOVDD
C80
C80 470P
470P
9
AN8
AN9
C368
C368
C337
C337
470P
470P
4700P
4700P
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
Title
Title
Title
9805_DP_Port_Txr
9805_DP_Port_Txr
9805_DP_Port_Txr
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
XM1 G92 VGA 1A
XM1 G92 VGA 1A
XM1 G92 VGA 1A
Date: Sheet
Date: Sheet
Date: Sheet
Monday, March 17, 2008
Monday, March 17, 2008
Monday, March 17, 2008
15 21
15 21
15 21
of
of
of
A B C D E F G H
MIOA AND MIOB
16
1
+3.3V_RUN
3.300V 16.00
C323
C323
0.1U
0.1U
2
3
+3.3V_RUN
3.300V 16.00
C326
C326
0.1U
4
0.1U
MIOA_VDDQ
MIOB_VDDQ
AB11 AC11
AC9
AD11
AD7 AE7
AG8
AE11 AF11
AF9 AG9
AH6 AL8
AL7
G3 MIOA
G1R
G1R
bga1504-nvidia-nb9e-glm2
bga1504-nvidia-nb9e-glm2 COMMON
COMMON
12/19 MIOA
12/19 MIOA
MIOA_VDDQ MIOA_VDDQ MIOA_VDDQ MIOA_VDDQ
MIOACAL_PD_VDDQ
MIOACAL_PU_GND
MIOA_VREF
G3 MIOB
G1Q
G1Q
bga1504-nvidia-nb9e-glm2
bga1504-nvidia-nb9e-glm2
COMMON
COMMON
13/19 MIOB
13/19 MIOB
MIOB_VDDQ MIOB_VDDQ MIOB_VDDQ MIOB_VDDQ
MIOBCAL_PD_VDDQ
MIOBCAL_PU_GND
MIOB_VREF
MIOAD0 MIOAD1 MIOAD2 MIOAD3 MIOAD4 MIOAD5 MIOAD6 MIOAD7 MIOAD8
MIOAD9 MIOAD10 MIOAD11 MIOAD12 MIOAD13 MIOAD14
MIOA_CTL3 MIOA_HSYNC MIOA_VSYNC
MIOA_DE
MIOA_CLKOUT MIOA_CLKOUT
MIOA_CLKIN
MIOBD10 MIOBD11 MIOBD12 MIOBD13 MIOBD14 MIOBD15 MIOBD16 MIOBD17
MIOBD0 MIOBD1 MIOBD2 MIOBD3 MIOBD4 MIOBD5 MIOBD6 MIOBD7 MIOBD8 MIOBD9
AE1 AE2 AE3 AG3 AG2 AG1 AF4 AF6 AG4 AG5 AG6 AG7 AD8 AE9 AD9
AD4 AD6 AD5 AE4
AE6 AE5
MIOA_CLKIN
AE8
R167
R167
10K
10K
AH4 AH1 AH2 AH3 AK3 AL4 AK5 AM6 AL6 AL5 AM4 AN4 AK8 AJ6 AK7 AJ9 AK9 AL9
STRAP0 19 STRAP1 19 STRAP2 19
1
2
3
4
AH8
MIOB_CTL3
AH7
MIOB_HSYNC
AH9
MIOB_VSYNC
AH5
MIOB_DE
AJ4
MIOB_CLKOUT
AK4
MIOB_CLKOUT
MIOB_CLKIN
5
C GE
MIOB_CLKIN
AK6
R163
R163
10K
10K
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
Title
Title
Title
G92_MIOA_&_MIOB
G92_MIOA_&_MIOB
G92_MIOA_&_MIOB
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
XM1 G92 VGA 1A
XM1 G92 VGA 1A
XM1 G92 VGA 1A Monday, March 17, 2008
Monday, March 17, 2008
Monday, March 17, 2008
Date: Sheet
Date: Sheet
Date: Sheet
16 21
16 21
16 21
HFDBA
of
of
of
5
A B C D E F G H
PLLVDD,,X'tal, I2C
17
1
1
PLL VDD
L9
INDUCTORL9INDUCTOR
220R@100MHz
L7
INDUCTORL7INDUCTOR
220R@100MHz
L1
INDUCTORL1INDUCTOR
220R@100MHz
Populate either for G71M/G92M
Populate either for G71M/G92M
C77
C77
C304
C74
C74
4.7U
4.7U
C63
C63
C66
C66
0.1U
0.1U
4.7U
4.7U
C12
C12
C13
C13
4.7U
4.7U
0.1U
0.1U
C304
0.1U
0.1U
4700P
4700P
G1J
G1J
bga1504-nvidia-nb9e-glm2
bga1504-nvidia-nb9e-glm2 COMMON
COMMON
16/19 XTAL_PLL
C305
C305 4700P
4700P
C223
C223 4700P
4700P
GPU_PLLAVDD
GPU_VID_PLLAVDD
SP_PLLVDD
R7222R72
XTAL_SSIN_R
22
R76
R76 *10K_NC
*10K_NC
8
C GE
XTAL_IN XTAL_OUT
C70
C70 27P/50V
27P/50V
+3.3V_RUN
Spread Sprectrum Circuit
R680R68
R82
R82
0
*0_NC
*0_NC
R85
R85
R81
R81
*0_NC
*0_NC
*0_NC
*0_NC
AM13 AM15 AM14
XTAL_OUTBUFF_R
V3
V1
16/19 XTAL_PLL
PLLVDD VID_PLLVDD SP_PLLVDD
XTALSSIN
XTALIN
U10
U10
1
X1/CLK
2
GND
3
S1
4
S0
MK5811A
MK5811A
FRSEL SSCLK
PLACE CLOSE TO GPU
XTAL_OUTBUFF XTAL_OUTBUFF_RXTAL_SSIN
T3
XTALOUTBUFF
V2
XTALOUT
Y1
21
27MHZY127MHZ
STUFF PDs on XTALSSIN and XTALOUTBUFF WHEN EXT_SS IS NOT USED.
8
X2
7
VDD
6 5
XTAL_SSIN_R
T16PAD T16PAD
+3.3V_RUN
T30PAD T30PAD
C75
C75
0.01U
0.01U
R65 22R65 22
R63
R63 *10K_NC
*10K_NC
6
C69
C69 27P/50V
27P/50V
Spread
S1
S0
Direction
0 Center
M Center
0 +/-1.1
1 Center
0 +/-0.6
0 Center
M +/-0.5
M-M No Spread
M -1.6
1 Down
1 -2.00
Down
M
1 -0.7
Down
1 -3.0
1
Down
0= connect to GND M= unconnected (floating) 1= connect directly to VDD
Spread Percentage
+/-1.40
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
Title
Title
Title
G92_X'tal_&_I2C
G92_X'tal_&_I2C
G92_X'tal_&_I2C
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
XM1 G92 VGA 1A
XM1 G92 VGA 1A
XM1 G92 VGA 1A
Date: Sheet
Date: Sheet
Date: Sheet
Monday, March 17, 2008
Monday, March 17, 2008
Monday, March 17, 2008
HFDBA
of
of
of
17 21
17 21
17 21
2
3
4
5
+1.1V_GFX_PCIE
+1.1V_GFX_PCIE
+1.1V_GFX_PCIE
C11
C11
4.7U
4.7U
C19
C19
4.7U
4.7U
C10
C10
4.7U
4.7U
2
3
4
5
A B C D E F G H
GPIOS, JTAG, TEMP SENSOR, FAN CONTROL, SPDIF, STATUS LED(S)
G1S
G1S
bga1504-nvidia-nb9e-glm2
bga1504-nvidia-nb9e-glm2 COMMON
COMMON
14/19 MISC1
14/19 MISC1
1
+3.3V_RUN
+3.3V_RUN
J2
J2
1
JTAG_TDI
2
2
3 4 5 6
*53261-0671_NC
*53261-0671_NC
JTAG_TMS JTAG_TCLK JTAG_TDO
R62 10KR62 10K R64 10KR64 10K R69 10KR69 10K
VGA_THERMDN
VGA_THERMDP
JTAG_TCLK JTAG_TMS JTAG_TDI JTAG_TDO JTAG_TRST#
+3.3V_RUN
C68
C68 *2200P_NC
*2200P_NC
R73
R73 100K_0402
100K_0402
JTAG_TRST#
R77
R77 *10K_NC
*10K_NC
T1
THERMDN
T2
THERMDP
AP12
JTAG_TCK
AR12
JTAG_TMS
AR13
JTAG_TDI
AP13
JTAG_TDO
AP14
JTAG_TRST
I2CS_SCL I2CS_SDA
I2CC_SCL
I2CC_SDA
I2CD_SCL
I2CD_SDA
I2CE_SCL I2CE_SDA
GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9
I2CS_SCL
W2
I2CS_SDA
W1 W3
W4 Y4 AA5 W6 W5
AB1 AB2 AB3 AD1 AD2 AD3 AB4 AB5 AB6 AB7 AB8 AB9 AC4 AC6 AA8 T9 U9 V9 W9 Y9 AA9 W7 W8 AA7
RP2
RP2
1 3
2.2KX2
2.2KX2
GPIO0_HPDA GPIO1_HPDB
BIA_PWM ENVDD PANEL_BKEN
GPIO6_NVVDD_VID1 GPIO7_FBVDDQ_CTL GPIO8_OVERTEMP# GPIO9_THERM_ALERT# GPIO10_FB_VREF_SW GPIO11_HPD1 ACAV_IN_MB/DOCK GPIO13_HPD_DVIA GPIO14_HPD_DVIB
2 4
+3.3V_RUN
GPIO0_HPDA 15
GPIO1_HPDB 14 BIA_PWM 13 ENVDD 13 PANEL_BKEN 13 GPIO_NVVDD_VID0 21 GPIO6_NVVDD_VID1 21 GPIO7_FBVDDQ_CTL 20 GPIO8_OVERTEMP# 3
T100PAD T100PAD
GPIO10_FB_VREF_SW 4
T101PAD T101PAD
ACAV_IN_MB/DOCK 3
GPIO13_HPD_DVIA 15 GPIO14_HPD_DVIB 14
T95PAD T95PAD T97PAD T97PAD T98PAD T98PAD T104PAD T104PAD T118PAD T118PAD T94PAD T94PAD T119PAD T119PAD T120PAD T120PAD T121PAD T121PAD
I2CS_SCL I2CS_SDA
I2CD_SCL 15 I2CD_SDA 15 I2CE_SCL 14 I2CE_SDA 14
LCD_DDCCLK 13
RP3
RP3
2.2KX2
2.2KX2
4
3
2
1
LCD_DDCDAT 13
+3.3V_RUN
18
1
4
2
NB8M internal thermal sensor interface using
I2CS_SCL SBAT_SMBCLK
I2CS_SCL
3
4
5
I2CS_SDA
Add pull high for open drain pin.
THERM_ALRT#3
+3.3V_RUN
2
4
RP1
RP1 *2.2KX2_NC
*2.2KX2_NC
*0_NC
*0_NC
1
3
R54
R54
C59
C59
C60
C60
100P
100P
100P
100P
+3.3V_SUS
SBAT_SMBDAT3,13 SBAT_SMBCLK3,13
T18 PADT18 PAD
+3.3V_RUN
THERM_ALRT# GPIO8_OVERTEMP#
SBAT_SMBDAT SBAT_SMBCLK
GPIO9_ALERT_R#
R67 10KR67 10K
For G72MV, de-pop R135, R136, R137, RP4, C206, C143. For NB8M I2CS testing with Thermal IC circuit, de-pop R136, R137, pop R135, RP4. For NB8M with internal thermal sensor interface using, pop R135, R136, R137, de-pop RP4, C206, C143 & Thermal IC circuit.
R57 *0_NCR57 *0_NC R58 *0_NCR58 *0_NC
C76 100PC76 100P C73 0.1UC73 0.1U
U11
U11
1
VDD
7
SDATA
8
SCLK
6
ALERT
4
THERM
ADM1032ARMZ
ADM1032ARMZ
SBAT_SMBDATI2CS_SDA
Thermal IC
VGA_THERMDP
2
D+
VGA_THERMDN
3
D-
5
GND
vNidia suggests using ground shield on it.
C GE
LOW VREF
GPIO ASSIGNMENTS
GPIO ACTIVE
0 1 2 3 4 5 OUT 6
8
9 10 11 12 13 14
I/O
IN IN OUT OUT OUT
N/A N/A
OUT
N/A
OUT7 OUT LOW OUT
N/A
OUT OUT IN OUT OUT
USAGE
N/A N/A
HIGH
HIGH
HIGH
PRIMARY DVI HOTPLUG SECONDARY DVI HOTPLUG PANEL BACKLIGHT PWM PANEL POWER ENABLE PANEL BACKLIGHT ENABLE NVVDD VID0 NVVDD VID1 FBVDD VID0 OVER TEMP/GPU SHUTDOWN
LOW
THERMAL ALERT/FAM PWM
FBVREF SELECT N/A N/A LOW HIGH
SLI SYNC0
AC DETECT
PS CONTROL OR HDMI_CEC
PS CONTROL
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
Title
Title
Title
G92_Thermal_&_GPIOs
G92_Thermal_&_GPIOs
G92_Thermal_&_GPIOs
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
XM1 G92 VGA 1A
XM1 G92 VGA 1A
XM1 G92 VGA 1A
Date: Sheet
Date: Sheet
Date: Sheet
Monday, March 17, 2008
Monday, March 17, 2008
Monday, March 17, 2008
HFDBA
of
of
of
18 21
18 21
18 21
3
4
5
STRAPS
1
A B C D E F G H
BIT
RAMCFG[3:0]
512MB (16Mx32)
0001 --- 256-bit Qimonda 0010 --- 256-bit Hynix 0011 --- 256-bit Samsung
1024MB (32Mx32)
0101 --- 256-bit Qimonda 0110 --- 256-bit Hynix 0111 --- 256-bit Samsung
ROM_SI
RAMCFG_0
0 1
RAMCFG_1
2
RAMCFG_2
3
RAMCFG_3
NOTE: See table 1 for the correct value/location of the ROM_SI resistor for the memory used
19
1
TVMODE_0
0 1
ROM_SO
2
3
TABLE 2: PCDEVID SWITCH SETTING DECODE
Switches are from left to right with the first switch being *
DVID #
* 0 1 2 3 DEC
0 0 0 0 0 0 0 1 0 0 0 1 0 0 1 0 0 2 0 1 1 0 0 3 0 0 0 1 0 4 0 0 0 1 1 12 0 1 0 1 0 5 0 0 1 1 0 6 1 1 1 1 0 7
Note 1: DVID * always = 0 except for decimal 7 and 15 where it is set to 1 as shown.
Note 2: If PCDEVID[4]=0 needs to be 1 for a particular GPU DEVID, it is done by jumpering J21 1-2 (see below).
SEE the latest documentation for more details on G9x Straps! For multi-level stuff the appropriate resistance to grnd or VDD as required For Binary stuff the appropriate PU or PD as required, Note: The correct refernce value must be used.. Don't use strap 0 or 2 options below if switches are used, Reserved for binary mode or no switch only
DVID #
* 0 1 2 3 DEC
0 0 0 0 1 8 0 1 0 0 1 9 0 0 1 0 1 10 0 1 1 0 1 11
0 1 0 1 1 13 0 0 1 1 1 14 1 1 1 1 1 15
+3.3V_RUN
PCDEVID SWITCH LOGIC: ON (closed / Switch down) = 0 OFF(OPEN / Switch Up) = 1
+3.3V_RUN
PCI_DEVID[4]/SUBVENDOR Strap selectable
ROM_SCLK
STRAP0
STRAP1
4
R780
R780 *4.99K_NC
R788
R787
R787 *4.99K_NC
*4.99K_NC
R79
R79
4.99K
4.99K
GND
R788 15K
15K
R790
R790 *4.99K_NC
*4.99K_NC
ROM_SI11 ROM_SO11
ROM_SCLK11
R786
R786
45.3K
STRAP016 STRAP116 STRAP216
4
45.3K
R789
R789 *4.99K_NC
*4.99K_NC
7
256-bit Width
STRAP VALUE MEMORY 0000 5K PD Reserved 0001 10K PD 16Mx32 GDDR3 Qimonda
0010 15K PD 16Mx32 GDDR3 Hynix
0011 20K PD 16Mx32 GDDR3 Samsung 0100 25K PD Reserved 0101 30K PD 32Mx32 GDDR3 Qimonda 0110 35K PD 32Mx32 GDDR3 Hynix 0111 45K PD 32Mx32 GDDR3 Samsung
5
*4.99K_NC
R784
R784 15K
15K
R782
R782
R781
R781
34.8K
34.8K
4.99K
4.99K
1%
1%
1%
1%
R783
R783
R785
R785
*4.99K_NC
*4.99K_NC
*34.8K_NC
*34.8K_NC
1%
1%
1
C GE
TABLE 1: STRAP DECODE ACCORDING TO TERMINATION RESISTANCE/VOLTAGE
TERMINATION RESISTANCE
STRAP2
5K
15K 20K 25K 30K 35K 1110
TVMODE_1 TVMODE_22
3
XCLK_277
0
PEX_PLL_EN_TERM100
1
SLOT_CLK_CFG SUB_VENDOR
2
PCI_DEVID_EXT
3
USER_0
0
USER_1
1 2
USER_2 USER_3
3
3GIO_PADCFG_LUT_ADR_0
0 1
3GIO_PADCFG_LUT_ADR_1
2
3GIO_PADCFG_LUT_ADR_2
3
3GIO_PADCFG_LUT_ADR_3
0
PCI_DEVID_0
1
PCI_DEVID_1
2
PCI_DEVID_2
3
PCI_DEVID_3
NOTE 2: See table 1 for the correct value/location of the strap resistor for the desired modes NOTE 3: Bring-up SKU(s) have jumper configurable subvendor and DEVID_4 settings see the ROM_SCLK STRAP
TERMINATION
VOLTAGE
3V3 [3:0]
1000 100110K 1010 1011 1100 1101
GND
[3:0]
0000 0001 0010 0011 0100 0101 0110
TVMODE[2:0]
000 --- DEFAULT
XCLK_277
1 --- DEFAULT
PEX_PLL_EN_TERM100
0 --- DEFAULT
SLOT_CLK_CFG
1 --- DEFAULT
USER[3:0] (LVDS RESOLUTION OR EDID SELECT SWITCH)
See Table 3 shown on the LVDS DISPLAY page which outlines the proper switch setting for the panel in use.
NOTE: IF the LVDS panel is not in use the EDID MODE must be used else SW may prohibit other display outputs
SUB_VENDOR
1 --- DEFAULT
PCI_DEVID_EXT
0 --- DEFAULT
3GIO_PADCFG_LUT_ADR[3:0]
0001 --- DEFAULT
PCI_DEVID[3:0]
BRING-UP SKU: Set the PCDEVID for the speciifc GPU DEVID according to table 2
CUSTOMER SKU: Select the value/location of the strap 2 resistor for a specific GPU PCDEVID according to Table 1
EXAMPLE: 3GIO_PADCFG_LUT_ADR[3:0] is desired to be set to 0001 TABLE 1 shows that 0001 = a 10K resistance to GRND so it is populated in the PD STRAP 1 position
ROM_SO not required can be set in VBIOS
See NOTE 2
See NOTE 2 See NOTE 3
See NOTE 2
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
Title
Title
Title
G92_STRAPS
G92_STRAPS
G92_STRAPS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
XM1 G92 VGA 1A
XM1 G92 VGA 1A
XM1 G92 VGA 1A
Date: Sheet
Date: Sheet
Date: Sheet
Monday, March 17, 2008
Monday, March 17, 2008
Monday, March 17, 2008
HFDBA
of
of
of
19 21
19 21
19 21
2
3
4
5
4
3
A B C D E F
FBVDDQ
1
PR69
PR69 *61.9K_F_NC
*61.9K_F_NC
2
GFX_1.8V_RUN_PWRGD
3
4
,11,12,13,14,15,16,17,18,19,21
Thermal PAD is ground pin It has to connect to ground
+3.3V_RUN
*100K_NC
*100K_NC
+3.3V_RUN
RUNPWROK3,21
GFX_CORE_PWRGD21
+1.8V_RUN_P
GFX_REF ISL88550LX
PC90
PC90
0.22U_6.3V
0.22U_6.3V
GND_FBVDD
+5V_ALW
PR79
PR79
PR27
PR27 100K
100K
PR34
PR34 100K
100K
2
PR32 0PR32 0
PR66
PR66 *0_0603_NC
*0_0603_NC
PR70
PR70 47K_F
47K_F
61
PQ19B
PQ19B 2N7002DW-7-F
2N7002DW-7-F
GND_FBVDD
PR29 *0_NCPR29 *0_NC
GND_FBVDD
PR71
PR71 *0_0603_NC
*0_0603_NC
T19 PADT19 PAD
PR67
PR67 47K_F
47K_F
PR26
PR26 100K
100K
GND_FBVDD
+15V_ALW
PR33
PR33 100K
100K
34
PQ19A
PQ19A
5
2N7002DW-7-F
2N7002DW-7-F
GND_FBVDD
PC85
PC85
0.01U_16V
0.01U_16V
+5V_ALW+3.3V_SUS
5V_RUN_ON
28
PU6
PU6
TPO
1
TON
2
OVP/UVP
3
REF
4
ILIM
5
POK1
6
POK2
7
STBY#
29
EPAD
30
EPAD
31
EPAD
SS8VTTS9VTTR10PGND211VTT12VTTI13REFIN
PC86
PC86
0.047U_10V
0.047U_10V
PR25
PR25 909_F_0603
909_F_0603
PR24
PR24
9.09K_F_0603
9.09K_F_0603
GND_FBVDD
PQ20
PQ20 FDC655BN
FDC655BN
6 5
4 2 1
3
10U_10V_0805
10U_10V_0805
PC45
PC45 4700P_25V
4700P_25V
27
26
AVDD
SHDNA#
ISL88550AIRZ-T
ISL88550AIRZ-T
PC47
PC47
PC93
PC93
1U_10V_0603
1U_10V_0603
24
25
GND
SKIP#
PC84
PC84 1U_10V_0603
1U_10V_0603
+5V_RUN
PR73
PR73 *10_0603_NC
*10_0603_NC
22
23
VDD
PGND1
LGATE
BOOT PHASE UGATE
EPAD
EPAD
14
GFX_REF
PC42
PC42 10U_6.3V_1206
10U_6.3V_1206
PC83
PC83 22U_4V_0805
22U_4V_0805
+5V_RUN
VIN
OUT
FB
PR81
PR81 *0_0603_NC
*0_0603_NC
PR35
PR35 20K
20K
PC94
PC94
2.2U_10V_0805
2.2U_10V_0805
PD5
PD5 *CH501H_NC
*CH501H_NC
21 20 19 18 17 16 15 32
33
+1.8V_RUN
PC43
PC43
0.01U_16V
0.01U_16V
PC87
PC87 22U_4V_0805
22U_4V_0805
+5V_ALW
PR28
PR28 1_0603
1_0603
ISL88550DH
ISL88550DL
GND_FBVDD
GPIO7_FBVDDQ_CTL18
21
PC91
PC91
0.22U_50V_0805
0.22U_50V_0805
PQ17
PQ17
SI7636DP-T1-E3
SI7636DP-T1-E3
+1.1V_GFX_PCIE
+1.1V_GFX_PCIE 3,4,5,14,15,17
High: 1.8V Low : 1.55V
4
4
+GPU_PWR_SRC
*2.4_1206_NC
*2.4_1206_NC
876
9
PQ18
PQ18 SI7686DP
SI7686DP
2
351
876
9
*2.4_1206_NC
*2.4_1206_NC
2
351
PR76 1KPR76 1K
PR30
PR30
PC44
PC44 *1000P_0603_NC
*1000P_0603_NC
0.68UH+-20% 15.5A(MPL73-R68L)
0.68UH+-20% 15.5A(MPL73-R68L)
PC92
PC92 *1500P_0603_NC
*1500P_0603_NC
PR72
PR72
+3.3V_SUS
PR77
PR77 *100K_NC
*100K_NC
PR78
PR78 100K
100K
PL5
PL5
2
PC97
PC97
0.1U_16V
0.1U_16V
PC95
PC95
10U_25V_1206
10U_25V_1206
3
PQ23
PQ23 BSS138_NL
BSS138_NL
1
GND_FBVDD
PC49
PC49
10U_25V_1206
10U_25V_1206
PC77
PC77 2200P_50V
2200P_50V
PC46
PC46 2200P_50V
2200P_50V
+1.8V_RUN_P
PC80
PC80
0.1U_10V
0.1U_10V
PR310PR31 0
GND_FBVDD
Place near GND pin24
PR104
PR104
301/F
301/F
PL6
PL6
HI1206T161R-10(160,6A)
HI1206T161R-10(160,6A)
PC48
PC48
0.1U_50V_0603
0.1U_50V_0603
+
+
+
+
PC35
PC35
330U_2.5V_ESR9
330U_2.5V_ESR9
PR105 301/FPR105 301/F
*1000P_50V_NC
*1000P_50V_NC
PC108
PC108 *100P/50V_NC
*100P/50V_NC
GND_FBVDD
+G_PWR_SRC
+G_PWR_SRC 3,13,21
20
Max current :15.8A
PJP2
PJP2 POWER_JP
PC88
PC88
POWER_JP
PJP1
PJP1 POWER_JP
POWER_JP
330U_2.5V_ESR9
330U_2.5V_ESR9
+1.8V_RUN
12
12
1.8V_RUN 4,5,6,7,8,9,10,13,1
FBVDDQ_SENSE5
PC89
PC89
PR75
PR75 91K_F_0603
91K_F_0603
Title
Title
Title
FBVDD for NVIDIA_NB8E GLM3
FBVDD for NVIDIA_NB8E GLM3
FBVDD for NVIDIA_NB8E GLM3
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
PR68
PR68
27.4K_F_0603
27.4K_F_0603
PR64
PR64
21.5K_F_0603
21.5K_F_0603
GND_FBVDD
of
of
of
20 25Monday, March 17, 2008
20 25Monday, March 17, 2008
20 25Monday, March 17, 2008
8
VID : 5 4 3 2 1 0
RUNPWROK3,20
+3.3V_RUN
PR12 10PR12 10
GND_GPUVOCRE
1.55V : 0 0 0 0 0 0
1.075V : 0 1 0 0 1 1
1.05V : 0 1 0 1 0 0
0.975V : 0 1 0 1 1 1
0.95V : 0 1 1 0 0 0
0.9V : 0 1 1 0 1 0
0.85V : 0 1 1 1 0 0
1 2
PR48 *0_NCPR48 *0_NC
12
PR45 0PR45 0
PC6
PC6
*0.01U/16V/0402_NC
*0.01U/16V/0402_NC
GFX_CORE_PWRGD20
PR4210PR42 10
PC5
PC5 1000P
1000P
+3.3V_RUN
8
1 2
GND_GPUVOCRE
GND_GPUVOCRE+VCC_GFX_CORE
FB
PC55 680PPC55 680P
PR40 1.21K_FPR40 1.21K_F
GND_GPUVOCRE
GND_GPUVOCRE GND_GPUVOCRE
PC3 10PPC3 10P
PC4 2200PPC4 2200P
PR80 1KPR80 1K PR51 1KPR51 1K PR52 1KPR52 1K PR50 1KPR50 1K
5
PR46
PR46 100K
100K
GND_GPUVOCRE GND_GPUVOCRE
2
PR74
PR74 100K
100K
+5V_RUN
PR82
PR82
*1K_NC
*1K_NC
PR7 4.99KPR7 4.99K
34
61
PQ21B
PQ21B
2N7002DW-7-F
2N7002DW-7-F
+3.3V_RUN
PR151KPR15 1K
T20 PADT20 PAD T21 PADT21 PAD T22 PADT22 PAD
PR5 100K_FPR5 100K_F PC51 0.015U_0603PC51 0.015U_0603 PR3 100KPR3 100K
VID3
PQ21A
PQ21A
2N7002DW-7-F
2N7002DW-7-F
VID0
D D
C C
NVVDD_SENSE3
GND_SENSE3
B B
High: 1.075V Low: 0.9V
GPIO_NVVDD_VID018
High: 0.9V Low: 1.075V
GPIO6_NVVDD_VID118
A A
COMP
VID3
GND_GPUVOCRE
+G_PWR_SRC1
1.075V
0.9V
7
+5V_RUN
12
PC56
PC56
1U_10V_0603
1U_10V_0603
3196_VCC
PU1
VID0 VID1
VID2
VID4
VID5
GND_GPUVOCRE
31
VCC
1
EN
2
PWRGD
10
TTSENSE
9
VRMHOT
8
VRM_OFF
11
ILIMIT
7
DELAY
20
IREF
5
COMP
3
FBRTN
39
VID0
38
VID1
37
VID2
36
VID3
35
VID4
34
VID5
18
GND
0.01U_16V
0.01U_16V
PR49 0PR49 0
PU1
PC1
PC1
GND_GPUVOCRE
NC126NC232NC333NC4
THERM_GND
40
41
GND_GPUVOCRE
PR21KPR2 1K
12
PWM1 PWM2 PWM3 PWM4
CSCOMP
CSREF CSSUM
IMON
LLSET
RAMPADJ
ADP3196JCPZ-RL
ADP3196JCPZ-RL
OD
SW1 SW2 SW3 SW4
FB SS RT
GPIO_NVVDD_VID01GPIO6_NVVDD_VID1
01
7
6
OD#
19
PWM1
30
PWM2
29
PWM3
28
PWM4
27
25 24 23 22
17 15 16 21
4 14 6
12 13
PR1
PR1 499K
499K
FB
187K_F
187K_F
PR4
PR4
CSREF
PR360PR36
0
GND_GPUVOCRE
PC54
PC54
GND_GPUVOCRE
PC50 1000PPC50 1000P
PR61KPR6 1K
PC2
PC2
0.01U_16V
0.01U_16V
0.015U_0603
0.015U_0603
PR47 2KPR47 2K
PR43 2KPR43 2K
PR44 2KPR44 2K
GND_GPUVOCRE
GND_GPUVOCRE
PR41 *2K_NCPR41 *2K_NC
PR17 1KPR17 1K PR14 1KPR14 1K PR11 1KPR11 1K
GND_GPUVOCRE
PR37
PR37 *0_NC
*0_NC
PR39
PR39
35.7K_F
35.7K_F
PR38
PR38 82K_F
82K_F
PR57
PR57
TH05-3L104FR
TH05-3L104FR
PR16
PR16 365K_F
365K_F
PC52 680PPC52 680P
PC53 220PPC53 220P
PHASE2 PHASE3
PR9 *1K_NCPR9 *1K_NC
PR10
PR10
PR13
PR13
365K_F
365K_F
365K_F
365K_F
0
6
PHASE1
PHASE4
PR8
PR8 *365K_F_NC
*365K_F_NC
5
+5V_RUN
PD3 RB500V-40PD3 RB500V-40
PC25
PC25
2.2U_10V_0603
2.2U_10V_0603
PWM1
OD#
PWM2
+5V_RUN
PR180PR18
0
1 2
PWM4
5
1 2 3 4
PD2 RB500V-40PD2 RB500V-40
PC19
PC19
2.2U_10V_0603
2.2U_10V_0603
PD4 RB500V-40PD4 RB500V-40
PC33
PC33
2.2U_10V_0603
2.2U_10V_0603
PD1 *RB500V-40_NCPD1 *RB500V-40_NC
PC9
PC9 *2.2U_10V_0603_NC
*2.2U_10V_0603_NC
PU4
PU4
IN SD# DRVLSD# CROWBAR VCC5DRVL
ADP3419
ADP3419
PU3
PU3
1
IN
2
SD#
3
DRVLSD#
4
CROWBAR VCC5DRVL
ADP3419
ADP3419
PU5
PU5
1
IN
2
SD#
3
DRVLSD#
4
CROWBAR VCC5DRVL
ADP3419
ADP3419
PU2
PU2
1
IN
2
SD#
3
DRVLSD#
4
CROWBAR VCC5DRVL
*ADP3419_NC
*ADP3419_NC
4
PQ9
PQ9
BSZ100N03MSG
BSZ100N03MSG
PC23
PC23
0.47U_25V_0603
0.47U_25V_0603
PR211PR21 1
10
BST
9
DRVH
8
SW
7
GND
3196_DL1
6
PQ12
PQ12
BSZ035N03MSG
BSZ035N03MSG
PQ5
PQ5
BSZ100N03MSG
BSZ100N03MSG
PC17
PC17
0.47U_25V_0603
0.47U_25V_0603
PR201PR20 1
10
BST
9
DRVH
8
SW
7
GND
3196_DL2
6
PQ8
PQ8
BSZ035N03MSG
BSZ035N03MSG
PQ14
PQ14
BSZ100N03MSG
BSZ100N03MSG
PC32
PC32
0.47U_25V_0603
0.47U_25V_0603
PR231PR23 1
10
BST
9
DRVH
8
SW
7
GND
3196_DL3
6
PQ16
PQ16
BSZ035N03MSG
BSZ035N03MSG
PQ1
PQ1
*BSZ100N03MSG_NC
*BSZ100N03MSG_NC
PC7
PC7
*0.47U_25V_0603_NC
*0.47U_25V_0603_NC
PR19
PR19 *1_NC
*1_NC
10
BST
9
DRVH
8
SW
7
GND
3196_DL4
6
PQ4
PQ4
*BSZ035N03MSG_NC
*BSZ035N03MSG_NC
4
3196_DH1
3196_LX1
4
3196_DH2
3196_LX2
4
3196_DH3PWM3
3196_LX3
4
3196_DH4
3196_LX4
4
4
2
876
2
351
BSZ100N03MSG
BSZ100N03MSG
4
2
876
BSZ035N03MSG
BSZ035N03MSG
2
351
4
2
876
2
351
BSZ035N03MSG
BSZ035N03MSG
*BSZ100N03MSG_NC
*BSZ100N03MSG_NC
4
2
876
2
351
*BSZ035N03MSG_NC
*BSZ035N03MSG_NC
PQ10
PQ10
BSZ100N03MSG
BSZ100N03MSG
876
351
PQ11
PQ11
BSZ035N03MSG
BSZ035N03MSG
PQ6
PQ6
876
4
351
4
PQ7
PQ7
PQ13
PQ13
BSZ100N03MSG
BSZ100N03MSG
876
351
PQ15
PQ15
PQ2
PQ2
876
351
PQ3
PQ3
3
PJP5
PJP5 POWER_JP
POWER_JP
PJP3
PJP3 POWER_JP
POWER_JP
PJP4
PJP4 POWER_JP
POWER_JP
PR61
PR61
2.4_1206
2.4_1206
876
4
2
351
PC74
2.4_1206
2.4_1206
PR63
PR63
3
PR62
PR62
PC64
PC64 1000P_0603
1000P_0603
PC67
PC67
1500P_0603
1500P_0603
PR59
PR59
2.4_1206
2.4_1206
PC81
PC81 1000P_0603
1000P_0603
1500P_0603
1500P_0603
2.4_1206
2.4_1206
PR54
PR54
*2.4_1206_NC
*2.4_1206_NC
PC61
PC61
*1500P_0603_NC
*1500P_0603_NC
PR55
PR55
*2.4_1206_NC
*2.4_1206_NC
PC74 1500P_0603
1500P_0603
PC22
PC22
10U_25V_1206
10U_25V_1206
PC40
PC40
PC82
PC82
PR65
PR65
10U_25V_1206
10U_25V_1206
876
4
2
351
PR58
PR58
2.4_1206
2.4_1206
876
2
351
876
2
351
2.4_1206
2.4_1206
876
4
2
351
876
4
2
351
876
4
2
351
876
4
2
351
12
12
12
PC73
PC73 1000P_0603
1000P_0603
+G_PWR_SRC1
PC21
PC21
PC20
PC20
10U_25V_1206
10U_25V_1206
+G_PWR_SRC1
PC39
PC39
10U_25V_1206
10U_25V_1206
PC60
PC60 *1000P_0603_NC
*1000P_0603_NC
+G_PWR_SRC+G_PWR_SRC1
+G_PWR_SRC1
PC30
PC30
PC31
PC31
10U_25V_1206
10U_25V_1206
10U_25V_1206
10U_25V_1206
PL3
PL3
0.33UH +-20% 20A( MPL73-R33)
0.33UH +-20% 20A( MPL73-R33)
SJ3
SJ3 Jump20X10
Jump20X10
2
112
+G_PWR_SRC1
PC70
PC70
PC69
PC69
10U_25V_1206
10U_25V_1206
10U_25V_1206
10U_25V_1206
PL2
PL2
0.33UH +-20% 20A( MPL73-R33)
0.33UH +-20% 20A( MPL73-R33)
SJ2
SJ2 Jump20X10
Jump20X10
2
112
+G_PWR_SRC1
PC38
PC38
PC41
PC41
10U_25V_1206
10U_25V_1206
10U_25V_1206
10U_25V_1206
0.33UH +-20% 20A( MPL73-R33)
0.33UH +-20% 20A( MPL73-R33)
SJ4
SJ4 Jump20X10
Jump20X10
2
112
+G_PWR_SRC1
PC12
PC12
*10U_25V_1206_NC
*10U_25V_1206_NC
*0.33UH +-20% 20A( MPL73-R33)_NC
*0.33UH +-20% 20A( MPL73-R33)_NC
1
SJ1
SJ1
1
Jump20X10
Jump20X10
2
PHASE4
2
PC29
PC29
10U_25V_1206
10U_25V_1206
PHASE1
PC68
PC68
0.01U_25V
0.01U_25V
0.1U_50V_0603
0.1U_50V_0603
PHASE2
PC37
PC37
0.1U_50V_0603
0.1U_50V_0603
PL4
PL4
PHASE3
PC14
PC14
PC15
PC15
*10U_25V_1206_NC
*10U_25V_1206_NC
PL1
PL1
PC59
PC59
*0.1U_50V_0603_NC
*0.1U_50V_0603_NC
2
+G_PWR_SRC 3,13,20
+G_PWR_SRC1
PC26
PC26
PC28
PC28
10U_25V_1206
10U_25V_1206
0.1U_50V_0603
0.1U_50V_0603
PC72 0.01U_25VPC72 0.01U_25V
PC71 0.1U_50V_0603PC71 0.1U_50V_0603
PR22
PR22 10_F_0603
10_F_0603
PC65
PC65
0.01U_25V
0.01U_25V
PC66
PC66
0.1U_50V_0603
0.1U_50V_0603
PR56 10_F_0603PR56 10_F_0603
PC36
PC36
PC78
PC78
0.01U_25V
0.01U_25V
0.01U_25V
0.01U_25V
PC79
PC79
0.1U_50V_0603
0.1U_50V_0603
PR60 10_F_0603PR60 10_F_0603
+G_PWR_SRC1
PC13
PC13
*10U_25V_1206_NC
*10U_25V_1206_NC
*10U_25V_1206_NC
*10U_25V_1206_NC
PR53 *10_F_0603_NCPR53 *10_F_0603_NC
PC58
PC58
*0.01U_25V_NC
*0.01U_25V_NC
2
PC27
PC27
0.01U_25V
0.01U_25V
CSREF
PC11
PC11
PC10
PC10
*0.01U_25V_NC
*0.01U_25V_NC
*0.1U_50V_0603_NC
*0.1U_50V_0603_NC
+VCC_GFX_CORE
PC8
PC8
*470U_2.5V_ESR9_NC
*470U_2.5V_ESR9_NC
+
+
*470U_2.5V_ESR9_NC
*470U_2.5V_ESR9_NC PC24
PC24
470U_2.5V_ESR9
470U_2.5V_ESR9
+
+
+VCC_GFX_CORE 10
470U_2.5V_ESR9
470U_2.5V_ESR9
PC57
PC57
470U_2.5V_ESR9
470U_2.5V_ESR9
PC76
PC76
470U_2.5V_ESR9
470U_2.5V_ESR9
3 phase for 45W(G92) 4 phase for 65W(MLK)
Title
Title
Title
ADP3196 for NVIDIA_NB8E GLM3
ADP3196 for NVIDIA_NB8E GLM3
ADP3196 for NVIDIA_NB8E GLM3
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
+
+
+
+
PC18
PC18
+
+
470U_2.5V_ESR9
470U_2.5V_ESR9
PC34
PC34
+
+
470U_2.5V_ESR9
470U_2.5V_ESR9
1
+
+
PC63
PC63
+
+
PC75
PC75
1
21
PC16
PC16
4.7U_0805
4.7U_0805
21 21Monday, March 17, 2008
21 21Monday, March 17, 2008
21 21Monday, March 17, 2008
of
of
of
PC62
PC62
4.7U_0805
4.7U_0805
6
5
4
3
2
1
Model
XM1 MB
F F
Item Page Date Rev. Description
1 P.19
0124 1A
2 6~9 0129 1A
Modify VRAM strapping circuit lose GND. The 16x32 pn used on NIke G94 is Nova die and will be EOL before Nike RTS.Change QCI PN from
AKD5FWHTW00 to AKD5FWHTW03 and Mfr PN from HY5RS123235BFP-14 to H5RS5223CFR-11C. 3 P.15 0129 1A 4 P.19 0129 1A 5 P.13 0225 1A 6 P.17 0304 1A 7 P.19 0304 1A 8 P.17 0305 1A
E E
9 P.14,15 0306 1A 10 P.14,15 0306 1A 11 P.20 0313 1A 12 P.21 0313 1A 13 NA 0313 1A 14 14,15 0314 1A 15 3 0314 1A
14,15
16 17
D D
11 14,1518 0317 1A
0314 1A 0314 1A
19 4 0317 1A 20 14,15 0317 1A
Aux+ pull down, Aux- pull up issue on DP1. Pop R223, R791 with 100K per Nvidia.
Wrong Device ID setting: Depop R785. Pop R782 35K
Change J1 footprint from LVDS-FI-DP58SB-VF100-58P-L to LVDS-FI-DP58SB-VF88L-58P-L.
Per crystal test report, change C69 and C70 from 18p to 27p.
Because Nike use desktop chipset.Change R79 from 10K to 5K for PCI-E interface high swing setting.
Update SSC from P1819GF to MK5811A.
DP workaround:need connect GPU ball AN9 and AN7 to +1.1V_GFX_PCIE also to slove DP can not display issue.
Per PUN: Displayport aux channel workaround.
Add PR79 (100K_NC), PR81(0_0603_NC)
Add PR82 (1K_NC), PR16, PR13, PR10 and PR8 change from 93.1K to 365K, PC52 change to 680P, PC53 change to 220P
Update T23,T32,T55,T110,T111,T17 as TP3050.
Update SW circuit.
Per DPstatus report: Pop R39 to enable AVAC_IN_MB/DOCK.
Per DPstatus report: Depop R223&R791 for DP1, R218&R793 for DP2
Per DPstatus report: SPDIF voltage divider: Depop R109, R115, BAT54S-7-F, D2
Update AUX SW schematic and remove RP5 and RP6.
As PUN suggest .R136 should be change to 49.9ohm.
As PUN suggest .Please change R197 and R202 to 2.2k ohm
C C
B B
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Project Name:
Project Name:
A A
6
5
4
3
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
2
Project Name:
??
??
??
?
?
?
of
62 80Monday, March 17, 2008
of
62 80Monday, March 17, 2008
of
62 80Monday, March 17, 2008
1
NB1
NB1
NB1
Loading...
Buy Points How it Works FAQ Contact Us Questions and Suggestions Privacy Policy Cookie Policy Terms of Use