QUANTA X32, X31 Schematics
5
4
3
2
1
Monster Intel KABY LAKE ULT Platform Block Diagram
HDMI EEPROM
SPI ROM 2M
HDMI 2.0
CIO_TX_RX (DP/USB3.1)
USB type C PD
TI TPS65982D
PAGE 37
USB type C PD
TI TPS65982D
PAGE 38 PAGE 41
SPI Interface
USB Charger
TI TPS2546
PAGE 29
HDMI Con
USB2.0 B/T
CC1/CC2
SBU1/SBU2
DP/USB3.0
SBU1/SBU2
USB2.0 B/T
CC1/CC2
PD EEPROM
SPI ROM 8M
PAGE 24
USB TypeC A
PAGE 41
USB TypeC B
USB3.0 Port x 1
(total 3.5A)
PAGE 29
USB TypeC Adapter
20V, 75W
PAGE 25
PCIE 4 LanesNVIDIA N16S-GTR-S
Port 1, 2, 3, 4
Kabylake - U
Processor
Processor : Daul Core GT3e
Power : 15 (Watt)
Package : BGA1356
Size : 40 X 24 (mm)
QCMC
PG.2~15
DDI x 1 Port 4 Lans
DDI2
HDMI 1.4
DDI x 1 Port 4 Lans
DDI1
PCIE 2 Lanes
Port 5,6
Thunderbolt
Intel
Alpine Ridge (SP)
USB3.0 USB 3.0*
Port 2
Port 2
Port 1
USB3.0
Port 1
USB2.0
I2C
Touch Screen
ISH
SPI Interface SPI and Connect to TI TPS65982
DP AUX /TBT LS
USB2.0
PAGE 35,36
Camera
Port 5,6
HP TrueVision FHD IR Camera
PAGE 30
SPI Interface
LSPCON
Alpine Rideg EEPROM
SPI ROM
USB Charger
TI TPS2546
BC 1.2
PG 40
DP /USB3.0 MUX
TUSB546
Page 39
USB Charger
TI TPS2546
BC 1.2 PG 40
USB 3.0*
USB2.0
USB2.0USB2.0
D D
GDDR5
256Mx32 2pcs
(3840x2160)
SODIMM0 8/12/16GB
DDR4 x 2133MHz
SODIMM1 8/12/16GB
23*23 (mm)
PAGE 23
PAGE 16
PG 18~22
eDP x 1 Port, 4Lanes15.6 UHD WLED BrightView
DDR4 x 2133MHz 1.2V
DDR4 x 2133MHz 1.2V
PAGE 17DDR4 x 2133MHz
SATA0/PCIE 4 LANE PCIe NVMe TLC M.2 SSD
256/512GB/1TB M.2 SSD
PAGE 30
C C
Digital MIC
Combo Jack HDA
Headphone amplifier
HPA0022642RTJR
Speaker AMP L
TAS2555
PAGE 26
Speaker AMP R
TAS2555
B B
PAGE 27
Realtek
ALC3258-CG
Package : MQFN
I2S
Size : 6 x 6 (mm)
I2S
01
System BIOS
SPI ROM 8M
PAGE 10
SPI
G-Sensor
ST Micro HP2DCTR
Accelerometer +e-Compass+Gyro
HP9DS1TR TS Board
PAGE 33
PCIE Gen 1 x 2Lane
I2C
Keyboard
A A
Touch Pad
Synaptics
PAGE 31
PS2
SMBUS
ITE 8987
Embedded Controller
Package : BGA128
Size : 7x 7 (mm)
PAGE 32PAGE 31
FAN1
FAN2
TPM 2.0 SLB9665TT2.0
LPC
Battery
SMBUS
3-cell 71W 3S1P
PAGE 30
Carde Reader
RTS5258S-GR
PCI-E gen 2 SD4.0
CPPM support
PCIE Port 8
PAGE 28
Wireless LAN (M.2)
Broadcom BCM4371
802.11 AC 2x2 Wi-Fi
BT4.1 Combo
PCIE Port 7
PAGE 28 PAGE 28
5
4
3
Port 7
PAGE 32
PROJECT : X31
PROJECT : X31
PROJECT : X31
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Block Diagram
Block Diagram
Block Diagram
1
1 59Tuesday, July 19, 2016
1 59Tuesday, July 19, 2016
1 59Tuesday, July 19, 2016
I'm from VIETNAM sualaptop365
5
DDI1_TX0_DN35
+3V
INT_DP_SCL
R131 2.2K_2
INT_DP_SDA
D D
DDPB_CTRLDATA/ GPP_E19
Display Port B Detected
This signal has a weak internal pull-down.
0 = Port B is not detected.
1 = Port B is detected.
This signal has a weak internal
pull-down.
0 = Port C and D is not detected.
1 = Port C and D is detected.
C C
SDVO_CLK
SDVO_DATA
DDPD_CTRLDATA
R133 2.2K_2
R121 2.2K_2
R123 2.2K_2
R129 10K_2
Kris Modify 20160520
eDP_COMPIO and ICOMPO signals should be shorted near
balls and routed with typical impedance <25 mohms
DDI1_TX0_DP35
DDI1_TX1_DN35
DDI1_TX1_DP35
DDI1_TX2_DN35
DDI1_TX2_DP35
DDI1_TX3_DN35
DDI1_TX3_DP35
+VCCIO
IN_D0#24
IN_D024
IN_D1#24
IN_D124
IN_D2#24
IN_D224
IN_CLK#24
IN_CLK24
4
IN_D0#
IN_D0
IN_D1#
IN_D1
IN_D2#
IN_D2
IN_CLK#
IN_CLK
INT_DP_SCL
INT_DP_SDA
R310 24.9/F_2
SDVO_CLK
SDVO_DATA
DDPD_CTRLDATA
EDP_RCOMP
U16A
E55
DDI1_TXN[0]
F55
DDI1_TXP[0]
E58
DDI1_TXN[1]
F58
DDI1_TXP[1]
F53
DDI1_TXN[2]
G53
DDI1_TXP[2]
F56
DDI1_TXN[3]
G56
DDI1_TXP[3]
C50
DDI2_TXN[0]
D50
DDI2_TXP[0]
C52
DDI2_TXN[1]
D52
DDI2_TXP[1]
A50
DDI2_TXN[2]
B50
DDI2_TXP[2]
D51
DDI2_TXN[3]
C51
DDI2_TXP[3]
L13
GPP_E18/DDPB_CTRLCLK
L12
GPP_E19/DDPB_CTRLDATA
N7
GPP_E20/DDPC_CTRLCLK
N8
GPP_E21/DDPC_CTRLDATA
N11
GPP_E22/DDPD_CTRLCLK
N12
GPP_E23/DDPD_CTRLDATA
E52
EDP_RCOMP
*SKL_ULT
REV = 1
SKL_ULT
DDI
DISPLAY SIDEBANDS
3
?
Need apply PN
INT_EDP_TXN0
C47
EDP_TXN[0]
EDP_TXP[0]
EDP_TXN[1]
EDP_TXP[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]
EDP
EDP_AUXN
EDP_AUXP
EDP_DISP_UTIL
DDI1_AUXN
DDI1_AUXP
DDI2_AUXN
DDI2_AUXP
DDI3_AUXN
DDI3_AUXP
GPP_E13/DDPB_HPD0
GPP_E14/DDPC_HPD1
GPP_E15/DDPD_HPD2
GPP_E16/DDPE_HPD3
GPP_E17/EDP_HPD
EDP_BKLTEN
EDP_BKLTCTL
EDP_VDDEN
+3V 4,10,11,12,13,14,15,16,17,19,23,24,25,28,30,31,33,34,35,40,50,54,55
+1.0V 4,6,34,49
+VCCIO 6,49
+VCCSTPLL 5,6,9,49,50
?1 OF 20
C46
D46
C45
A45
B45
A47
B47
E45
F45
B52
G50
F50
E48
F48
G46
F46
L9
L7
L6
N9
L10
R12
R11
U13
INT_EDP_TXP0
INT_EDP_TXN1
INT_EDP_TXP1
INT_EDP_TXN2
INT_EDP_TXP2
INT_EDP_TXN3
INT_EDP_TXP3
INT_EDP_AUXN
INT_EDP_AUXP
ULT_EDP_HPD
PCH_LVDS_BLON
PCH_DPST_PWM
PCH_DISP_ON
2
INT_EDP_TXN0 23
INT_EDP_TXP0 23
INT_EDP_TXN1 23
INT_EDP_TXP1 23
INT_EDP_TXN2 23
INT_EDP_TXP2 23
INT_EDP_TXN3 23
INT_EDP_TXP3 23
INT_EDP_AUXN 23
INT_EDP_AUXP 23
DDI1_AUX_DN 35
DDI1_AUX_DP 35
DDI2_AUX_DN 24
DDI2_AUX_DP 24
DDI1_HPD0 35
DDI2_HPD0 24
GPU_EVENT# 21
DGPU_PWROK 20,34,56
ULT_EDP_HPD 23
PCH_LVDS_BLON 23
PCH_DPST_PWM 23
PCH_DISP_ON 23
1
Reserve EDP_HPD opposites circuit!
+3V
R144
*10K_2
ULT_EDP_HPD
R147
100K_2
0718 R107 unstuff
DDI2_HPD0
R107 *100K/F_2
Jun Modify 20160414
02
+VCCSTPLL
R316 *49.9/F_2
H_PROCHOT#34,45,50
+1.0V
R284 1K_2
B B
For GPU
H_PROCHOT#
+3V
R342
10K_2
DGPU_PWROK
R354
*10K_2
+3V
R888
10K/F_4
R299 499/F_4
EC_PECI34
PM_THRMTRIP#34
DGPU_PWR_EN19,57
GC6_FB_EN19,21
R162 49.9/F_2
R161 49.9/F_2
R344 49.9/F_2
R345 49.9/F_2
CATERR#
EC_PECI
PROCHOT#
PM_THRMTRIP#
PROC_POPIRCOMP
PCH_OPI_RCOMP
EDRAM_OPIO_RCOMP
EOPIO_RCOMP
D63
CATERR#
A54
PECI
C65
PROCHOT#
C63
THERMTRIP#
A65
SKTOCC#
C55
BPM#[0]
D55
BPM#[1]
B54
BPM#[2]
C56
BPM#[3]
A6
GPP_E3/CPU_GP0
A7
GPP_E7/CPU_GP1
BA5
GPP_B3/CPU_GP2
AY5
GPP_B4/CPU_GP3
AT16
PROC_POPIRCOMP
AU16
PCH_OPIRCOMP
H66
OPCE_RCOMP
H65
OPC_RCOMP
U16D
*SKL_ULT
REV = 1
SKL_ULT
CPU MISC
?
4 OF 20
Need apply PN
JTAG
PROC_TCK
PROC_TDI
PROC_TDO
PROC_TMS
PROC_TRST#
PCH_JTAG_TCK
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_TRST#
JTAGX
PDC
XDP_TCK0
B61
XDP_TDI_CPU
D60
XDP_TDO_CPU
A61
XDP_TMS_CPU
C60
XDP_TRST#
B59
JTAG_TCK_PCH
B56
JTAG_TDI_PCH XDP_TDI_CPU
D59
JTAG_TDO_PCH XDP_TDO_CPU
A56
JTAG_TMS_PCH XDP_TMS_CPU
C59
XDP_TRST#_CPU XDP_TRST#
C61
JTAGX_PCH XDP_TCK0
A59
R314 0_2
R308 0_2
R307 0_2
R287 0_2
R286 0_2
Close to EC
PM_THRMTRIP#
Processor pull-up (CPU)
TO BE REPLACED WITH 1K OHMS FOR SKL .
470 OHM IS FOR I/P
JTAG_TMS_PCH
JTAG_TDI_PCH
JTAG_TDO_PCH
JTAG_TCK_PCH
XDP_TCK0
XDP_TRST#_CPUDGPU_PWR_EN
R285 1K_2
R288 51_2
R290 51_2
R289 51_2
R309 51_2
R317 51_2
R318 51_2
Close to Chipset
+VCCSTPLL
+1.0V
0512 SI Add R888 10K pu +3V
A A
PROJECT : X31
PROJECT : X31
PROJECT : X31
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
SKLU (1/14)
SKLU (1/14)
SKLU (1/14)
1
2 59Tuesday, July 19, 2016
2 59Tuesday, July 19, 2016
2 59Tuesday, July 19, 2016
I'm from VIETNAM sualaptop365
5
M_A_DQSN[7:0]16
M_A_DQSP[7:0]16
M_B_DQSN[7:0]17
M_B_DQSP[7:0]17
M_A_DQ[63:0]16
M_B_DQ[63:0]17
+1.2VSUS 6,16,17,24,47,49,57,59
4
3
2
1
03
KABYLAKE ULT Processor DDR4
D D
U16B
M_A_DQ0
AL71
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
C C
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
B B
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
DDR0_DQ[0]
AL68
DDR0_DQ[1]
AN68
DDR0_DQ[2]
AN69
DDR0_DQ[3]
AL70
DDR0_DQ[4]
AL69
DDR0_DQ[5]
AN70
DDR0_DQ[6]
AN71
DDR0_DQ[7]
AR70
DDR0_DQ[8]
AR68
DDR0_DQ[9]
AU71
DDR0_DQ[10]
AU68
DDR0_DQ[11]
AR71
DDR0_DQ[12]
AR69
DDR0_DQ[13]
AU70
DDR0_DQ[14]
AU69
DDR0_DQ[15]
AF65
DDR1_DQ[0]/DDR0_DQ[16]
AF64
DDR1_DQ[1]/DDR0_DQ[17]
AK65
DDR1_DQ[2]/DDR0_DQ[18]
AK64
DDR1_DQ[3]/DDR0_DQ[19]
AF66
DDR1_DQ[4]/DDR0_DQ[20]
AF67
DDR1_DQ[5]/DDR0_DQ[21]
AK67
DDR1_DQ[6]/DDR0_DQ[22]
AK66
DDR1_DQ[7]/DDR0_DQ[23]
AF70
DDR1_DQ[8]/DDR0_DQ[24]
AF68
DDR1_DQ[9]/DDR0_DQ[25]
AH71
DDR1_DQ[10]/DDR0_DQ[26]
AH68
DDR1_DQ[11]/DDR0_DQ[27]
AF71
DDR1_DQ[12]/DDR0_DQ[28]
AF69
DDR1_DQ[13]/DDR0_DQ[29]
AH70
DDR1_DQ[14]/DDR0_DQ[30]
AH69
DDR1_DQ[15]/DDR0_DQ[31]
BB65
DDR0_DQ[16]/DDR0_DQ[32]
AW65
DDR0_DQ[17]/DDR0_DQ[33]
AW63
DDR0_DQ[18]/DDR0_DQ[34]
AY63
DDR0_DQ[19]/DDR0_DQ[35]
BA65
DDR0_DQ[20]/DDR0_DQ[36]
AY65
DDR0_DQ[21]/DDR0_DQ[37]
BA63
DDR0_DQ[22]/DDR0_DQ[38]
BB63
DDR0_DQ[23]/DDR0_DQ[39]
BA61
DDR0_DQ[24]/DDR0_DQ[40]
AW61
DDR0_DQ[25]/DDR0_DQ[41]
BB59
DDR0_DQ[26]/DDR0_DQ[42]
AW59
DDR0_DQ[27]/DDR0_DQ[43]
BB61
DDR0_DQ[28]/DDR0_DQ[44]
AY61
DDR0_DQ[29]/DDR0_DQ[45]
BA59
DDR0_DQ[30]/DDR0_DQ[46]
AY59
DDR0_DQ[31]/DDR0_DQ[47]
AT66
DDR1_DQ[16]/DDR0_DQ[48]
AU66
DDR1_DQ[17]/DDR0_DQ[49]
AP65
DDR1_DQ[18]/DDR0_DQ[50]
AN65
DDR1_DQ[19]/DDR0_DQ[51]
AN66
DDR1_DQ[20]/DDR0_DQ[52]
AP66
DDR1_DQ[21]/DDR0_DQ[53]
AT65
DDR1_DQ[22]/DDR0_DQ[54]
AU65
DDR1_DQ[23]/DDR0_DQ[55]
AT61
DDR1_DQ[24]/DDR0_DQ[56]
AU61
DDR1_DQ[25]/DDR0_DQ[57]
AP60
DDR1_DQ[26]/DDR0_DQ[58]
AN60
DDR1_DQ[27]/DDR0_DQ[59]
AN61
DDR1_DQ[28]/DDR0_DQ[60]
AP61
DDR1_DQ[29]/DDR0_DQ[61]
AT60
DDR1_DQ[30]/DDR0_DQ[62]
AU60
DDR1_DQ[31]/DDR0_DQ[63]
*SKL_ULT
REV = 1
Need apply PN
?
SKL_ULT
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSP[1]/DDR0_DQSP[3]
DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSP[3]/DDR0_DQSP[7]
NIL-DDR CH ÂA
2 OF 20
DDR0_CKN[0]
DDR0_CKP[0]
DDR0_CKN[1]
DDR0_CKP[1]
DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]
DDR0_CS#[0]
DDR0_CS#[1]
DDR0_ODT[0]
DDR0_ODT[1]
DDR0_MA[3]
DDR0_MA[4]
DDR0_DQSN[0]
DDR0_DQSP[0]
DDR0_DQSN[1]
DDR0_DQSP[1]
DDR0_ALERT#
DDR0_PAR
DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ
DDR_VTT_CNTL
AU53
AT53
AU55
AT55
BA56
BB56
AW56
AY56
AU45
AU43
AT45
AT43
M_A_A5
BA51
M_A_A9
BB54
M_A_A6
BA52
M_A_A8
AY52
M_A_A7
AW52
AY55
M_A_A12
AW54
M_A_A11
BA54
BA55
AY54
M_A_A13
AU46
M_A_A15
AU48
M_A_A14
AT46
M_A_A16
AU50
AU52
M_A_A2
AY51
AT48
M_A_A10
AT50
M_A_A1
BB50
M_A_A0
AY50
M_A_A3
BA50
M_A_A4
BB52
M_A_DQSN0
AM70
M_A_DQSP0
AM69
M_A_DQSN1
AT69
M_A_DQSP1
AT70
M_A_DQSN2
AH66
M_A_DQSP2
AH65
M_A_DQSN3
AG69
M_A_DQSP3
AG70
M_A_DQSN4
BA64
M_A_DQSP4
AY64
M_A_DQSN5
AY60
M_A_DQSP5
BA60
M_A_DQSN6
AR66
M_A_DQSP6
AR65
M_A_DQSN7
AR61
M_A_DQSP7
AR60
AW50
AT52
SM_VREF
AY67
SMDDR_VREF_DQ0_M3
AY68
SMDDR_VREF_DQ1_M3
BA67
DDR_VTT_CNTL_R
AW67
M_A_CLKN0 16
M_A_CLKP0 16
M_A_CLKN1 16
M_A_CLKP1 16
M_A_CKE0 16
M_A_CKE1 16
M_A_CS#0 16
M_A_CS#1 16
M_A_ODT0 16
M_A_ODT1 16
M_A_A5 16
M_A_A9 16
M_A_A6 16
M_A_A8 16
M_A_A7 16
M_A_BG#0 16
M_A_A12 16
M_A_A11 16
M_A_ACT# 16
M_A_BG#1 16
M_A_A13 16
M_A_A15 16
M_A_A14 16
M_A_A16 16
M_A_BA#0 16
M_A_A2 16
M_A_BA#1 16
M_A_A10 16
M_A_A1 16
M_A_A0 16
M_A_A3 16
M_A_A4 16
R491 *0_2
Place near CPU
M_A_ALERT# 16
M_A_PARITY 16
SM_VREF 16
TP43
SMDDR_VREF_DQ1_M3 17
DDR_VTT_CNTL 4
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
U16C
AY39
DDR0_DQ[32]/DDR1_DQ[0]
AW39
DDR0_DQ[33]/DDR1_DQ[1]
AY37
DDR0_DQ[34]/DDR1_DQ[2]
AW37
DDR0_DQ[35]/DDR1_DQ[3]
BB39
DDR0_DQ[36]/DDR1_DQ[4]
BA39
DDR0_DQ[37]/DDR1_DQ[5]
BA37
DDR0_DQ[38]/DDR1_DQ[6]
BB37
DDR0_DQ[39]/DDR1_DQ[7]
AY35
DDR0_DQ[40]/DDR1_DQ[8]
AW35
DDR0_DQ[41]/DDR1_DQ[9]
AY33
DDR0_DQ[42]/DDR1_DQ[10]
AW33
DDR0_DQ[43]/DDR1_DQ[11]
BB35
DDR0_DQ[44]/DDR1_DQ[12]
BA35
DDR0_DQ[45]/DDR1_DQ[13]
BA33
DDR0_DQ[46]/DDR1_DQ[14]
BB33
DDR0_DQ[47]/DDR1_DQ[15]
AU40
DDR1_DQ[32]/DDR1_DQ[16]
AT40
DDR1_DQ[33]/DDR1_DQ[17]
AT37
DDR1_DQ[34]/DDR1_DQ[18]
AU37
DDR1_DQ[35]/DDR1_DQ[19]
AR40
DDR1_DQ[36]/DDR1_DQ[20]
AP40
DDR1_DQ[37]/DDR1_DQ[21]
AP37
DDR1_DQ[38]/DDR1_DQ[22]
AR37
DDR1_DQ[39]/DDR1_DQ[23]
AT33
DDR1_DQ[40]/DDR1_DQ[24]
AU33
DDR1_DQ[41]/DDR1_DQ[25]
AU30
DDR1_DQ[42]/DDR1_DQ[26]
AT30
DDR1_DQ[43]/DDR1_DQ[27]
AR33
DDR1_DQ[44]/DDR1_DQ[28]
AP33
DDR1_DQ[45]/DDR1_DQ[29]
AR30
DDR1_DQ[46]/DDR1_DQ[30]
AP30
DDR1_DQ[47]/DDR1_DQ[31]
AY31
DDR0_DQ[48]/DDR1_DQ[32]
AW31
DDR0_DQ[49]/DDR1_DQ[33]
AY29
DDR0_DQ[50]/DDR1_DQ[34]
AW29
DDR0_DQ[51]/DDR1_DQ[35]
BB31
DDR0_DQ[52]/DDR1_DQ[36]
BA31
DDR0_DQ[53]/DDR1_DQ[37]
BA29
DDR0_DQ[54]/DDR1_DQ[38]
BB29
DDR0_DQ[55]/DDR1_DQ[39]
AY27
DDR0_DQ[56]/DDR1_DQ[40]
AW27
DDR0_DQ[57]/DDR1_DQ[41]
AY25
DDR0_DQ[58]/DDR1_DQ[42]
AW25
DDR0_DQ[59]/DDR1_DQ[43]
BB27
DDR0_DQ[60]/DDR1_DQ[44]
BA27
DDR0_DQ[61]/DDR1_DQ[45]
BA25
DDR0_DQ[62]/DDR1_DQ[46]
BB25
DDR0_DQ[63]/DDR1_DQ[47]
AU27
DDR1_DQ[48]
AT27
DDR1_DQ[49]
AT25
DDR1_DQ[50]
AU25
DDR1_DQ[51]
AP27
DDR1_DQ[52]
AN27
DDR1_DQ[53]
AN25
DDR1_DQ[54]
AP25
DDR1_DQ[55]
AT22
DDR1_DQ[56]
AU22
DDR1_DQ[57]
AU21
DDR1_DQ[58]
AT21
DDR1_DQ[59]
AN22
DDR1_DQ[60]
AP22
DDR1_DQ[61]
AP21
DDR1_DQ[62]
AN21
DDR1_DQ[63]
*SKL_ULT
REV = 1
?
SKL_ULT
Need apply PN
DDR1_CKN[0]
DDR1_CKN[1]
DDR1_CKP[0]
DDR1_CKP[1]
DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]
DDR1_CS#[0]
DDR1_CS#[1]
DDR1_ODT[0]
QCMC
DDR1_ODT[1]
DDR1_MA[3]
DDR1_MA[4]
DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]
DDR1_ALERT#
DRAM_RESET#
DDR_RCOMP[0]
DDR_RCOMP[1]
DDR_RCOMP[2]
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSN[5]/DDR1_DQSN[3]
DDR1_DQSP[5]/DDR1_DQSP[3]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSN[7]/DDR1_DQSN[5]
DDR0_DQSP[7]/DDR1_DQSP[5]
NIL-DDR CH ÂB
3 OF 20
DDR1_PAR
AN45
AN46
AP45
AP46
AN56
AP55
AN55
AP53
BB42
AY42
BA42
AW42
M_B_A5
AY48
M_B_A9
AP50
M_B_A6
BA48
M_B_A8
BB48
M_B_A7
AP48
AP52
M_B_A12
AN50
M_B_A11
AN48
AN53
AN52
M_B_A13
BA43
M_B_A15
AY43
M_B_A14
AY44
M_B_A16
AW44
BB44
M_B_A2
AY47
BA44
M_B_A10
AW46
M_B_A1
AY46
M_B_A0
BA46
M_B_A3
BB46
M_B_A4
BA47
M_B_DQSN0
BA38
M_B_DQSP0
AY38
M_B_DQSN1
AY34
M_B_DQSP1
BA34
M_B_DQSN2
AT38
M_B_DQSP2
AR38
M_B_DQSN3
AT32
M_B_DQSP3
AR32
M_B_DQSN4
BA30
M_B_DQSP4
AY30
M_B_DQSN5
AY26
M_B_DQSP5
BA26
M_B_DQSN6
AR25
M_B_DQSP6
AR27
M_B_DQSN7
AR22
M_B_DQSP7
AR21
AN43
AP43
SM_DRAMRST#
AT13
AR18
AT18
AU18
DDR Rcomp need follow Intel Spec
12-15 min trance length
M_B_CLKN0 17
M_B_CLKN1 17
M_B_CLKP0 17
M_B_CLKP1 17
M_B_CKE0 17
M_B_CKE1 17
M_B_CS#0 17
M_B_CS#1 17
M_B_ODT0 17
M_B_ODT1 17
M_B_A5 17
M_B_A9 17
M_B_A6 17
M_B_A8 17
M_B_A7 17
M_B_BG#0 17
M_B_A12 17
M_B_A11 17
M_B_ACT# 17
M_B_BG#1 17
M_B_A13 17
M_B_A15 17
M_B_A14 17
M_B_A16 17
M_B_BA#0 17
M_B_A2 17
M_B_BA#1 17
M_B_A10 17
M_B_A1 17
M_B_A0 17
M_B_A3 17
M_B_A4 17
0419 change 470ohm 0402 stuff
M_B_ALERT# 17
M_B_PARITY 17
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
R159 121/F_2
R158 80.6/F_2
R160 100/F_2
+1.2VSUS
R172
470_4
SM_DRAMRST# 16,17
A A
PROJECT : X31
PROJECT : X31
PROJECT : X31
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
SKL U (2/14)
SKL U (2/14)
SKL U (2/14)
1
3 59Tuesday, July 19, 2016
3 59Tuesday, July 19, 2016
3 59Tuesday, July 19, 2016
I'm from VIETNAM sualaptop365
5
4
3
2
1
04
?
U16K
D D
C C
RSMRST#34
0718 R189 unstuff
EC62
*220P/50V_2
EC_PWROK34
SUSWARN#_EC
PCIE_WAKE#28,32,34,35
RF_OFF_PCH32
DDR_VTT_CNTL3
R336 *10K_2
C562 *0.1U/10V_2
R189 *0_2
R187 0_2
PLTRST#
SYS_RESET#
RSMRST#
PROCPWRGD
H_VCCST_PWRGD
SYS_PWROK
EC_PWROK
DSWROK_EC_R
SUSWARN#
SUSACK#SUSWARN#
PCIE_WAKE#
RF_OFF_PCH
AN10
GPP_B13/PLTRST#
B5
SYS_RESET#
AY17
RSMRST#
A68
PROCPWRGD
B65
VCCST_PWRGD
B6
SYS_PWROK
BA20
PCH_PWROK
BB20
DSW_PW ROK
AR13
GPP_A13/SUSW ARN#/SUSPWRDNACK
AP11
GPP_A15/SUSACK#
BB15
WAKE#
AM15
GPD2/LAN_WAKE#
AW17
GPD11/LANPHYPC
AT15
GPD7/RSVD
*SKL_ULT
REV = 1
SKL_ULT
SYSTEM POWER MANAGEMENT
Need apply PN
SLP_SUS#
SLP_LAN#
INTRUDER#
AT11
AP15
BA16
AY16
SLP_SUS#_EC
AN15
AW15
PCH_SLP_WLAN#
BB17
AN16
BA15
DNBSWON#
AC_PRESENT_EC
AY15
AU13
BATLOW#
AU11
INTRUDER#_R
AP16
AM10
AM11
?
GPP_B12/SLP_S0#
GPD4/SLP_S3#
GPD5/SLP_S4#
GPD10/SLP_S5#
GPD9/SLP_WLAN#
GPD6/SLP_A#
GPD3/PWRBTN#
GPD1/ACPRESENT
GPD0/BATLOW #
GPP_A11/PME#
GPP_B11/EXT_PW R_GATE#
GPP_B2/VRALERT#
11 OF 20
+3V 2,10,11,12,13,14,15,16,17,19,23,24,25,28,30,31,33,34,35,40,50,54,55
+1.0V 2,6,34,49
+3VS5 15,32,33,34,35,36,39,45,46,47,48,49,53,54,57
+5VS5 25,26,29,37,38,40,46,47,48,49,50,51,52,54,55,56,57
+BAT_RTC 13,15,31,45,58
+3V_RTC_2 13,15
+3V_DEEP_SUS 10,11,12,14,15,36
Rb
R165 1M_2
Ra
R164 *1M_2
SUSB# 34
SUSC# 34
SLP_SUS#_EC 34
PCH_SLP_WLAN# 34
SLP_A# 34
DNBSWON# 34
AC_PRESENT_EC 34
BATLOW# 35
+3V_RTC_2
Main BAT -->Ra
Coin BAT -->Rb (default)
+BAT_RTC
PCH Pull-high/low(CLG)
SUSWARN#
SUSACK#
BATLOW#
PCIE_WAKE#
AC_PRESENT_EC
SYS_RESET#
RSMRST#
DSWROK_EC_R
R186 *10K_2
R198 10K_2
R188 *10K_2
R522 1K_2
R185 *10K_2
R331 10K_2
R535 10K_2
R498 100K_2
+3V_DEEP_SUS
+3VS5
+3V
For DS3 Sequence
For DS3 -->Ra
Non-DS3 -->Rb
RSMRST#
DPWROK_EC34
B B
PLTRST#(CLG)
R150
100K/F_2
Rb
R515 *0_2
R507 0_2
Ra
PLTRST# 18,28,30,32,34,35,37,40
DSWROK_EC_R
HW Power Good Circuit
R10479 close to CPU side
H_VCCST_PWRGD trace 0.3" - 1.5"
HWPG34,37,46,47,48
D35 MEK500V-40
21
+1.0V
R272
1K_2
H_VCCST_PWRGD_R
C406
*10P/50V_2
R300 60.4_4
H_VCCST_PWRGD
+1.0V +3VS5+5VS5
R271
15K/F_4
+1.0V_PWRGD_G1
C384
0.1U/10V_2
R262
100K_2
2
1 3
R277
100K_2
+1.0V_PWRGD_G2
Q14
METR3904-G
R462
10K_2
3
2
Q25
DMG1012T-7
1
HWPG
R463
100K_2
System PWR_OK(CLG)
A A
R516 *0_2/S
5
EC_PWROKSYS_PWROK
R503
10K/F_2
PROJECT : X31
PROJECT : X31
PROJECT : X31
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
4
3
2
Date: Sheet of
SKL U (3/14)
SKL U (3/14)
SKL U (3/14)
1
4 59Tuesday, July 19, 2016
4 59Tuesday, July 19, 2016
4 59Tuesday, July 19, 2016
I'm from VIETNAM sualaptop365
5
4
3
2
1
VCC_G32
VCC_G33
VCC_G35
VCC_G37
VCC_G38
VCC_G40
VCC_G42
VCC_J30
VCC_J33
VCC_J37
VCC_J40
VCC_K33
VCC_K35
VCC_K37
VCC_K38
VCC_K40
VCC_K42
VCC_K43
VIDSCK
VIDSOUT
QCMC
C372
47U/6.3V_6
?
+VCC_CORE
G32
G33
G35
G37
G38
G40
G42
J30
J33
J37
J40
K33
K35
K37
K38
K40
K42
K43
E32
E33
H_CPU_SVIDALRT#
B63
VR_SVID_CLK_R
A63
H_CPU_SVIDDAT
D64
G20
C165
1uF/6.3_2
C189
1uF/6.3_2
C260
1uF/6.3_2
C169
1uF/6.3_2
R350 100/F_2
R352 100/F_2
+VCCSTG
+1.8V 25,54
+VCCSTG 6
+VCCSTPLL 2,6,9,49,50
+VCC_CORE 52,59
+VCC_EOPIO 53
+VCC_EDRAM 53
C222
1uF/6.3_2
C246
1uF/6.3_2
100- ±1%
pull-up to VCC
near processor.
C164
1uF/6.3_2
C200
1uF/6.3_2
+VCC_CORE
VCC_SENSE 50
VSS_SENSE 50
C273
C257
1uF/6.3_2
C203
1uF/6.3_2
C214
1uF/6.3_2
1uF/6.3_2
C166
C182
1uF/6.3_2
Layout Note:
Sense resistor should be placed within 2 inches
(50.8mm) of the processor Trace Impedance 50ohm
C208
1uF/6.3_2C211
1uF/6.3_2
Layout note: need routing together and ALERT need between CLK and DATA.
+VCCSTPLL
CLOSE TO CPU
PLACE THE PU RESISTORS
H_CPU_SVIDALRT#
PLACE THE PU RESISTORS
CLOSE TO VR
PULL UP IS IN THE VR MODULE
VR_SVID_CLK_R
R302 220/F_4
R304 *0_4/S
+VCCSTPLL
R282
56.2/F_4
C405
*0.1U/10V_2
+VCCSTPLL
R283
*54.9/F_4
SVID ALERT
VR_SVID_ALERT# 50
SVID CLK
VR_SVID_CLK 50
+VCC_CORE
C72
47U/6.3V_6
C243
47U/6.3V_6
C224
*1uF/6.3_2
C558
*1uF/6.3_2
C249
*1uF/6.3_2
22U/6.3V_6
C88
22U/6.3V_6
C247
*1uF/6.3_2
C556
*1uF/6.3_2
C268
*1uF/6.3_2
C238
*1uF/6.3_2
C253
*1uF/6.3_2
D D
+VCC_EDRAM
C234
*1uF/6.3_2
C C
B B
+VCC_EOPIO
For IRIS CPU
Reserved +vcc_edram,+vcc_eopio,+1.8v_deep_sus Power Plan
+VCC_EDRAM
C232
C557
*1uF/6.3_2
*1uF/6.3_2
47U/6.3V_6
47U/6.3V_6
+1.8V
C186
47U/6.3V_6
R338 *0_4
C443
*1uF/6.3_2
C266
*1uF/6.3_2
C265
*1uF/6.3_2
C90
47U/6.3V_6
VID0_VCC_EDRAM53
VID1_VCC_EDRAM53
C196
C71
C248
47U/6.3V_6
C368
47U/6.3V_6
C227
47U/6.3V_6
50mA
3A
+V1.8S_EDRAM
VID0_VCC_EDRAM
VID1_VCC_EDRAM
3A
Del TP24,TP28
U16L
A30
VCC_A30
A34
VCC_A34
A39
VCC_A39
A44
VCC_A44
AK33
VCC_AK33
AK35
VCC_AK35
AK37
VCC_AK37
AK38
VCC_AK38
AK40
VCC_AK40
AL33
VCC_AL33
AL37
VCC_AL37
AL40
VCC_AL40
AM32
VCC_AM32
AM33
VCC_AM33
AM35
VCC_AM35
AM37
VCC_AM37
AM38
VCC_AM38
G30
VCC_G30
K32
RSVD_K32
AK32
RSVD_AK32
AB62
VCCOPC_AB62
P62
VCCOPC_P62
V62
VCCOPC_V62
H63
VCC_OPC_1P8_H63
G61
VCC_OPC_1P8_G61
AC63
VCCOPC_SENSE
AE63
VSSOPC_SENSE
AE62
VCCEOPIO
AG62
VCCEOPIO
AL63
VCCEOPIO_SENSE
AJ62
VSSEOPIO_SENSE
*SKL_ULT
REV = 1
Close U16
+VCC_CORE
C36
47U/6.3V_6
CPU POWER 1 OF 4
3A
3A
C230
47U/6.3V_6
28A
50mA
12 OF 20
C231
47U/6.3V_6
VCC_SENSE
VSS_SENSE
VIDALERT#
VCCSTG_G20
?
SKL_ULT
05
R301
CLOSE TO CPU
PLACE THE PU RESISTORS
H_CPU_SVIDDAT
A A
5
4
3
2
100/F_4
R281 *0_4/S
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
SVID DATA
VR_SVID_DATA 50
PROJECT : X31
PROJECT : X31
PROJECT : X31
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
SKL U (4/14)
SKL U (4/14)
SKL U (4/14)
1
5 59Tuesday, July 19, 2016
5 59Tuesday, July 19, 2016
5 59Tuesday, July 19, 2016
I'm from VIETNAM sualaptop365
5
4
3
2
1
06
C275
1uF/6.3_2
C233
1uF/6.3_2
C205
22U/6.3V_6
R142 100/F_4
R141 100/F_4
+VCCIO
C274
1uF/6.3_2
C87
22U/6.3V_6
C170
22U/6.3V_6
+VCCIO
C28
22U/6.3V_6
+1.2VSUS
D D
C305
10U/6.3V_4
+VCCSTPLL
R347 0_4
+1.0V
R353 *0_2
C C
+1.2V_VCCPLL_OC
R183 0_4
Under U11
+VCCSTG +VCCPLL_OC
C311
10U/6.3V_4
C354
10U/6.3V_4
C351
10U/6.3V_4
C307
10U/6.3V_4
+VCCSTG
+VCCPLL_OC
C303
1uF/6.3_2
C308
10U/6.3V_4
C339
1uF/6.3_2
C325
1uF/6.3_2
C306
10U/6.3V_4
Close U11 Under U11
Close to CPU
+1.2VSUS
C324
1U/6.3V_2
C302
1uF/6.3_2
+VCCSTPLL
+VCCSTG
+VCCPLL_OC
+VCCPLL
+VCCPLL+VCCSTPLL
AU23
AU28
AU35
AU42
BB23
BB32
BB41
BB47
BB51
AM40
AL23
A18
A22
K20
K21
U16N
VDDQ_AU23
VDDQ_AU28
VDDQ_AU35
VDDQ_AU42
VDDQ_BB23
VDDQ_BB32
VDDQ_BB41
VDDQ_BB47
VDDQ_BB51
VDDQC
VCCST
VCCSTG_A22
VCCPLL_OC
VCCPLL_K20
VCCPLL_K21
*SKL_ULT
REV = 1
SKL_ULT
CPU POWER 3 OF 4
2A
0.12A
0.04A
0.12A
?
3.1A
GT2 4.5A
GT3 5.1A
VCCIO_SENSE
VSSIO_SENSE
VSSSA_SENSE
VCCSA_SENSE
14 OF 20
AK28
VCCIO
AK30
VCCIO
AL30
VCCIO
AL42
VCCIO
VCCIO
VCCIO
VCCIO
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
C250
AM28
1uF/6.3_2
AM30
AM42
AK23
AK25
G23
G25
G27
G28
J22
J23
J27
K23
K25
K27
K28
K30
AM23
AM22
H21
H20
+1.0V 2,4,34,49
+VCCIO 2,49
+3VPCU 13,26,27,29,31,32,34,37,45,46,53,58
+VCCSA 50,52
+VCCSTG 5
+1.2VSUS 3,16,17,24,47,49,57,59
+VCCSTPLL 2,5,9,49,50
+1.2V_VCCPLL_OC 49
+VCCSA
C219
1uF/6.3_2
VCCIO_VCCSENSE
VCCIO_VSSSENSE
C271
1uF/6.3_2
C183
1uF/6.3_2
C270
C264
47U/6.3V_6
1uF/6.3_2
C209
C188
1U/6.3V_2
1uF/6.3_2
C29
22U/6.3V_6
VSSSA_SENSE 50
VCCSA_SENSE 50
C251
1uF/6.3_2
C221
1U/6.3V_2
C89
22U/6.3V_6
C263
1uF/6.3_2
C228
1U/6.3V_2
VCCIO_VCCSENSE
VCCIO_VSSSENSE
C458
1U/6.3V_2 C315
C309
1uF/6.3_2
10U/6.3V_4
C312
10U/6.3V_4
C300
10U/6.3V_4
C314
10U/6.3V_4
C355
10U/6.3V_4
C329
10U/6.3V_4
C297
1uF/6.3_2
C328
1uF/6.3_2
C298
1uF/6.3_2
C301
1uF/6.3_2
Close A18 Ball
+VCCSTPLL
B B
C397
C402
22U/6.3V_6
1U/6.3V_2
Close U11
+VCCPLL+VCCSTPLL
C175
1U/6.3V_2
A A
C171
1uF/6.3_2
5
For 65 degree, 1.8v limit, (SW)
R451
20K/F_2
R459
100K_4 NTC
C536
0.1U/10V_2
+3VPCU +3VPCU+3VPCU
R555
20K/F_2
For 75 degree, 1.2v limit, (HW) For 75 degree, 1.2v limit, (HW)For 75 degree, 1.2v limit, (HW)
THRM_MOINTOR2 34 THRM_MOINTOR3 34THRM_MOINTOR1 34
R556
100K_4 NTC
4
C591
0.1U/10V_2
SSD Ther ProtectCHOCK Ther Protect DDR Ther Protect
R447
20K/F_2
R448
100K_4 NTC
C532
0.1U/10V_2
PROJECT : X31
PROJECT : X31
PROJECT : X31
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
SKL U (5/14)
SKL U (5/14)
SKL U (5/14)
1
6 59Tuesday, July 19, 2016
6 59Tuesday, July 19, 2016
6 59Tuesday, July 19, 2016
I'm from VIETNAM sualaptop365
5
4
3
2
1
?
SKL_ULT
57A
QCMC
13 OF 20
Need apply PN
VCCGTX_AK42
VCCGTX_AK43
VCCGTX_AK45
VCCGTX_AK46
7A
VCCGTX_AK48
VCCGTX_AK50
VCCGTX_AK52
VCCGTX_AK53
VCCGTX_AK55
VCCGTX_AK56
VCCGTX_AK58
VCCGTX_AK60
VCCGTX_AK70
VCCGTX_AL43
VCCGTX_AL46
VCCGTX_AL50
VCCGTX_AL53
VCCGTX_AL56
VCCGTX_AL60
VCCGTX_AM48
VCCGTX_AM50
VCCGTX_AM52
VCCGTX_AM53
VCCGTX_AM56
VCCGTX_AM58
VCCGTX_AU58
VCCGTX_AU63
VCCGTX_BB57
VCCGTX_BB66
VCCGTX_SENSE
VSSGTX_SENSE
AA63
AA64
AA66
AA67
AA69
AA70
AA71
AC64
AC65
AC66
AC67
AC68
AC69
AC70
AC71
M62
N63
N64
N66
N67
N69
A48
A53
A58
A62
A66
J43
J45
J46
J48
J50
J52
J53
J55
J56
J58
J60
K48
K50
K52
K53
K55
K56
K58
K60
L62
L63
L64
L65
L66
L67
L68
L69
L70
L71
J70
J69
U16M
CPU POWER 2 OF 4
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT_SENSE
VSSGT_SENSE
*SKL_ULT
REV = 1
+VCCGT
D D
C C
B B
C35
47U/6.3V_6
C193
22U/6.3V_6
C168
1uF/6.3_2
C207
1uF/6.3_2
47U/6.3V_6
22U/6.3V_6
C197
1uF/6.3_2
VCCGT_SENSE50
VSSGT_SENSE50
1uF/6.3_2
C191
47U/6.3V_6
C167
1uF/6.3_2
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
N70
N71
R63
R64
R65
R66
R67
R68
R69
R70
R71
T62
U65
U68
U71
W63
W64
W65
W66
W67
W68
W69
W70
W71
Y62
AK42
AK43
AK45
AK46
AK48
AK50
AK52
AK53
AK55
AK56
AK58
AK60
AK70
AL43
AL46
AL50
AL53
AL56
AL60
AM48
AM50
AM52
AM53
AM56
AM58
AU58
AU63
BB57
BB66
AK62
AL61
+VCCGT
C192
47U/6.3V_6
C194
47U/6.3V_6
+VCC_GTX
C195
47U/6.3V_6
C262
*47U/6.3V_6C55
+VCC_GTX +VCCGT
C533
47U/6.3V_6
C258
*47U/6.3V_6
R474 *0_8
R475 *0_8
C544
47U/6.3V_6C82
C47
47U/6.3V_6C190
Close U11
C538
47U/6.3V_6
C261
*22U/6.3V_6
C531
47U/6.3V_6
C534
47U/6.3V_6
For IRIS CPU
Reserved +VCC_GTX
+VCCGT 50,51
07
A A
PROJECT : X31
PROJECT : X31
PROJECT : X31
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
SKL U (6/14)
SKL U (6/14)
SKL U (6/14)
1
7 59Tuesday, July 19, 2016
7 59Tuesday, July 19, 2016
7 59Tuesday, July 19, 2016
I'm from VIETNAM sualaptop365
5
4
3
2
1
08
AT63
AT68
AT71
AU10
AU15
AU20
AU32
AU38
AV68
AV69
AV70
AV71
AW10
AW12
AW14
AW16
AW18
AW21
AW23
AW26
AW28
AW30
AW32
AW34
AW36
AW38
AW41
AW43
AW45
AW47
AW49
AW51
AW53
AW55
AW57
AW6
AW60
AW62
AW64
AW66
AW8
AY66
BA10
BA14
BA18
BA23
BA28
BA32
BA36
BA45
U16Q
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AV1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B10
VSS
B14
VSS
B18
VSS
B22
VSS
B30
VSS
B34
VSS
B39
VSS
B44
VSS
B48
VSS
B53
VSS
B58
VSS
B62
VSS
B66
VSS
B71
VSS
BA1
VSS
VSS
VSS
VSS
BA2
VSS
VSS
VSS
VSS
VSS
F68
VSS
VSS
*SKL_ULT
REV = 1
SKL_ULT
GND 2 OF 3
?
QCMC
17 OF 20
Need apply PNNeed apply PN
BA49
VSS
BA53
VSS
BA57
VSS
BA6
VSS
BA62
VSS
BA66
VSS
BA71
VSS
BB18
VSS
BB26
VSS
BB30
VSS
BB34
VSS
BB38
VSS
BB43
VSS
BB55
VSS
BB6
VSS
BB60
VSS
BB64
VSS
BB67
VSS
BB70
VSS
C1
VSS
C25
VSS
C5
VSS
D10
VSS
D11
VSS
D14
VSS
D18
VSS
D22
VSS
D25
VSS
D26
VSS
D30
VSS
D34
VSS
D39
VSS
D44
VSS
D45
VSS
D47
VSS
D48
VSS
D53
VSS
D58
VSS
D6
VSS
D62
VSS
D66
VSS
D69
VSS
E11
VSS
E15
VSS
E18
VSS
E21
VSS
E46
VSS
E50
VSS
E53
VSS
E56
VSS
E6
VSS
E65
VSS
E71
VSS
F1
VSS
F13
VSS
F2
VSS
F22
VSS
F23
VSS
F27
VSS
F28
VSS
F32
VSS
F33
VSS
F35
VSS
F37
VSS
F38
VSS
F4
VSS
F40
VSS
F42
VSS
BA41
VSS
?
AA65
AA68
AB15
AB16
AB18
AB21
AD13
AD16
AD19
AD20
AD21
AD62
AE64
AE65
AE66
AE67
AE68
AE69
AF10
AF15
AF17
AF63
AG16
AG17
AG18
AG19
AG20
AG21
AG71
AH13
AH63
AH64
AH67
AJ15
AJ18
AJ20
AK11
AK16
AK18
AK21
AK22
AK27
AK63
AK68
AK69
AL28
AL32
AL35
AL38
AL45
AL48
AL52
AL55
AL58
AL64
A67
A70
AA2
AA4
AB8
AD8
AF1
AF2
AF4
AH6
AJ4
AK8
AL2
AL4
U16P
A5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
*SKL_ULT
REV = 1
SKL_ULT
GND 1 OF 3
Need apply PN
?
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
16 OF 20
AL65
AL66
AM13
AM21
AM25
AM27
AM43
AM45
AM46
AM55
AM60
AM61
AM68
AM71
AM8
AN20
AN23
AN28
AN30
AN32
AN33
AN35
AN37
AN38
AN40
AN42
AN58
AN63
AP10
AP18
AP20
AP23
AP28
AP32
AP35
AP38
AP42
AP58
AP63
AP68
AP70
AR11
AR15
AR16
AR20
AR23
AR28
AR35
AR42
AR43
AR45
AR46
AR48
AR5
AR50
AR52
AR53
AR55
AR58
AR63
AR8
AT2
AT20
AT23
AT28
AT35
AT4
AT42
AT56
AT58
?
U16R
?
D D
C C
B B
SKL_ULT
GND 3 OF 3
F8
VSS
G10
VSS
G22
VSS
G43
VSS
G45
VSS
G48
VSS
G5
VSS
G52
VSS
G55
VSS
G58
VSS
G6
VSS
G60
VSS
G63
VSS
G66
VSS
H15
VSS
H18
VSS
H71
VSS
J11
VSS
J13
VSS
J25
VSS
J28
VSS
J32
VSS
J35
VSS
J38
VSS
J42
VSS
J8
VSS
K16
VSS
K18
VSS
K22
VSS
K61
VSS
K63
VSS
K64
VSS
K65
VSS
K66
VSS
K67
VSS
K68
VSS
K70
VSS
K71
VSS
L11
VSS
L16
VSS
L17
VSS
18 OF 20
*SKL_ULT
REV = 1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L18
L2
L20
L4
L8
N10
N13
N19
N21
N6
N65
N68
P17
P19
P20
P21
R13
R6
T15
T17
T18
T2
T21
T4
U10
U63
U64
U66
U67
U69
U70
V16
V17
V18
W13
W6
W9
Y17
Y19
Y20
Y21
?
A A
PROJECT : X31
PROJECT : X31
PROJECT : X31
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
SKL U (7/14)
SKL U (7/14)
SKL U (7/14)
1
8 59Tuesday, July 19, 2016
8 59Tuesday, July 19, 2016
8 59Tuesday, July 19, 2016
I'm from VIETNAM sualaptop365
5
4
3
2
1
09
?
U16S
E68
D D
+1.0V_DEEP_SUS
C C
B B
R311 49.9/F_2
R339 *1K_2
CFG_RCOMP
CFG3
CFG4
AL25
AL27
BA70
BA68
B67
D65
D67
E70
C68
D68
C67
F71
G69
F70
G68
H70
G71
H69
G70
E63
F63
E66
F66
E60
E8
AY2
AY1
D1
D3
K46
K45
C71
B70
F60
A52
J71
J68
F65
G65
F61
E61
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
CFG[18]
CFG[19]
CFG_RCOMP
ITP_PMODE
RSVD_AY2
RSVD_AY1
RSVD_D1
RSVD_D3
RSVD_K46
RSVD_K45
RSVD_AL25
RSVD_AL27
RSVD_C71
RSVD_B70
RSVD_F60
RSVD_A52
RSVD_TP_BA70
RSVD_TP_BA68
RSVD_J71
RSVD_J68
VSS_F65
VSS_G65
RSVD_F61
RSVD_E61
*SKL_ULT
REV = 1
SKL_ULT
RESERVED SIGNALS-1
QCMC
19 OF 20
RSVD_TP_BB68
RSVD_TP_BB69
RSVD_TP_AK13
RSVD_TP_AK12
RSVD_BB2
RSVD_BA3
RSVD_D5
RSVD_D4
RSVD_B2
RSVD_C2
RSVD_B3
RSVD_A3
RSVD_AW1
RSVD_E1
RSVD_E2
RSVD_BA4
RSVD_BB4
RSVD_A4
RSVD_C4
RSVD_A69
RSVD_B69
RSVD_AY3
RSVD_D71
RSVD_C70
RSVD_C54
RSVD_D54
VSS_AY71
ZVM#
RSVD_TP_AW71
RSVD_TP_AW70
MSM#
PROC_SELECT#
TP5
TP6
TP4
TP1
TP2
?
BB68
BB69
AK13
AK12
BB2
BA3
AU5
AT5
D5
D4
B2
C2
B3
A3
AW1
E1
E2
BA4
BB4
A4
C4
BB5
A69
B69
AY3
R155 *0_2/S
D71
C70
C54
D54
AY4
BB3
AY71
R499 *0_2/S
AR56
AW71
AW70
AP56
C64
R315 *100K_2
0112 unmount
Co-lay for
Cannonlake
+1.8V_DEEP_SUS
R130 *0_2
LP# 53
+VCCSTPLL
C204
*1uF/6.3_2
AW69
AW68
AU56
AW48
C7
U12
U11
H11
SKL_ULT
U16T
SPARE
RSVD_AW69
RSVD_AW68
RSVD_AU56
RSVD_AW48
RSVD_C7
RSVD_U12
RSVD_U11
RSVD_H11
*SKL_ULT
REV = 1
+VCCSTPLL 2,5,6,49,50
+1.0V_DEEP_SUS 13,15,48,49
+1.8V_DEEP_SUS 15,45,48,54
?
20 OF 20
RSVD_F6
RSVD_E3
RSVD_C11
RSVD_B11
RSVD_A11
RSVD_D12
RSVD_C12
RSVD_F52
F6
E3
C11
B11
A11
D12
C12
F52
?
Processor Strapping
CFG3
(Physcial Debug Enable)
DFX Privacy
CFG4
(DP Presence Strap)
A A
5
The CFG signals have a default value of '1' if not terminated on the board.
1 0
Disable: Enable: Set DFX Enable in DFX interface MSR
Disable; No physical DP attached to eDP
4
Enable; An ext DP device is connected to eDP
3
CFG3
CFG4
Circuit
R346 *1K_2
R324 1K_2
PROJECT : X31
PROJECT : X31
PROJECT : X31
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
SKL U (8/14)
SKL U (8/14)
SKL U (8/14)
1
9 59Tuesday, July 19, 2016
9 59Tuesday, July 19, 2016
9 59Tuesday, July 19, 2016
I'm from VIETNAM sualaptop365
5
4
3
2
1
?
U16E
PCH_SPI1_CLK
PCH_SPI1_SO
PCH_SPI1_SI
PCH_SPI_IO2
TP33
TP39
TP38
TP36
Support Vpro
EC_RCIN#34
SERIRQ30,34
PCH_SPI_IO3
PCH_SPI_CS0#
SPI1_CLK
SIO_EXT_SMI#
PCI_SERR#
SPI1_IO2
SPI1_IO3
SPI1_CS#
CL_CLK32
CL_DAT32
CL_RST#32
D D
SIO_EXT_SMI#34
PCI_SERR#34
C C
AW3
AW2
AW13
AY11
AV2
AV3
AU4
AU3
AU2
AU1
SPI0_CLK
SPI0_MISO
SPI0_MOSI
SPI0_IO2
SPI0_IO3
SPI0_CS0#
SPI0_CS1#
SPI0_CS2#
M2
GPP_D1/SPI1_CLK
M3
GPP_D2/SPI1_MISO
J4
GPP_D3/SPI1_MOSI
V1
GPP_D21/SPI1_IO2
V2
GPP_D22/SPI1_IO3
M1
GPP_D0/SPI1_CS#
G3
CL_CLK
G2
CL_DATA
G1
CL_RST#
GPP_A0/RCIN#
GPP_A6/SERIRQ
*SKL_ULT
REV = 1
SPI - FLASH
SPI - TOUCH
C LINK
+3V 2,4,11,12,13,14,15,16,17,19,23,24,25,28,30,31,33,34,35,40,50,54,55
+3V_DEEP_SUS 4,11,12,14,15,36
SKL_ULT
LPC
Need apply PN
SMBUS, SMLINK
GPP_B23/SML1ALERT#/PCHHOT#
GPP_A14/SUS_STAT#/ESPI_RESET#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
QCMC
5 OF 20
GPP_C0/SMBCLK
GPP_C1/SMBDATA
GPP_C2/SMBALERT#
GPP_C3/SML0CLK
GPP_C4/SML0DATA
GPP_C5/SML0ALERT#
GPP_C6/SML1CLK
GPP_C7/SML1DATA
GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS#
GPP_A10/CLKOUT_LPC1
GPP_A8/CLKRUN#
?
SMB_PCH_CLK
R7
SMB_PCH_DAT
R8
R10
SML0ALERT#
SMB_ME0_CLK
R9
SMB_ME0_DAT
W2
W1
SML1ALERT#
SMB_ME1_CLK
W3
SMB_ME1_DAT
V3
AM7
AY13
BA13
BB13
AY12
BA12
BA11
CLK_PCI_EC_R
AW9
CLK_PCI_LPC_R
AY9
AW11
CLKRUN#
LAD0 30,32,34
LAD1 30,32,34
LAD2 30,32,34
LAD3 30,32,34
LFRAME# 30,32,34
CLKRUN# 34
SML0ALERT# 11
SML1ALERT# 11
R521 22/F_4
R520 22/F_4
R525 22/F_4
EC65 18P/50V_4
EC64 18P/50V_4
EC63
18P/50V_4
CLK_24M_KBC 34
CLK_24M_DEBUG 32
EMI(near PCH)
CLK_PCI_TPM 30
EMI(near PCH)
10
0411 change R521/R520/R525 to 0402
GPIO Pull UP
+3V
SMB_PCH_CLK
SERIRQ
CLKRUN#
B B
SIO_EXT_SMI#
EC_RCIN#
PCI_SERR#
R502 10K_2
R492 8.2K/F_4
R127 10K_2
R512 10K_2
R125 10K_2
SMB_PCH_DAT
SMB_ME0_CLK
SMB_ME0_DAT
SMB_ME1_CLK
SMB_ME1_DAT
R276 2.2K_2
R275 2.2K_2
R440 2.2K_2
R435 2.2K_2
R424 1K_2
R425 1K_2
+3V_DEEP_SUS
PCH SPI ROM(CLG)
Vender P/N
EON
Winbond
GigaDevice
Socket
Size
AKE3EZN0Q01 (EN25QH64-104HIP)8MB
AKE3EFP0N07 (W25Q64FVSSIQ)
8MB
8MB
AKE3EGN0Q01 (GD25B64BSIGR)
DFHS08FS023
TP66-71 need place to TOP
TP18
TP14
TP13
TP17
TP15
TP16
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_R
PCH_SPI1_SO_R
BIOS_WP#
HOLD#
PCH_SPI_CS0#_R34
PCH_SPI1_CLK_R34
PCH_SPI1_SI_R34
PCH_SPI1_SO_R34
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_R
PCH_SPI1_SO_R
+3V_DEEP_SUS
U18
1
CE#
6
SCK
5
SI
2
SO
3
WP#
GD25B64BSIGR
AKE3EFP0N07
NB5
NB5
NB5
HOLD#
R206 1K_2
2
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_RPCH_SPI1_SI
PCH_SPI1_SO_RPCH_SPI1_SO
C313
22P/25V_2
BIOS_WP#
PCH_SPI_CS0#
SMBus/Pull-up(CLG)
R269 4.7K_4
A A
+3V
SMB_RUN_DAT16,17,31
R270 4.7K_4
+3V
SMB_RUN_CLK16,17,31
5
Q13
4 3
1
2N7002KDW
+3V
5
SMB_PCH_DAT
2
SMB_PCH_CLK
6
Touch Pad
XDP
LPDDR3 thermal sensor
4
3
R340/R361/R367/R354/R359/R365 close to U17
C316 1uF/6.3_2
PCH_SPI1_CLK
+3V_DEEP_SUS
PCH_SPI_IO2
R227 15/F_2
R202 15/F_2
R203 15/F_2
R214 15/F_2
R205 15/F_2
+3V_DEEP_SUS
8
VDD
VSS
R219 1K_2
7
HOLD#
R218 15/F_2
4
PCH_SPI_IO3
PROJECT : X31
PROJECT : X31
PROJECT : X31
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
SKL U (9/14)
SKL U (9/14)
SKL U (9/14)
C310
0.1U/10V_2
1
10 59Tuesday, July 19, 2016
10 59Tuesday, July 19, 2016
10 59Tuesday, July 19, 2016
I'm from VIETNAM sualaptop365
5
4
3
2
1
11
D D
DESIGN NOTE:
WEAK PULL UP RESISTOR PRESENT ON THIS NET
ACZ_SPKR14,25
C C
B B
GSPI1_MOSI14
ACZ_SPKR
SML0ALERT#
GSPI1_MOSI
R524
*20K/F_2
+3V_DEEP_SUS
R486
1K_2
R488
*20K/F_2
R484
*20K/F_2
Functional Strap Definitions
TOP SWAP OVERRIDE
HIGH - TOP SWAP ENABLE
LOW-DISABLED
HIGH: LPC SELECTED FOR SYSTEM FLASH
WEAK INTERNAL PD
No Boot:
The signal has a weak internal pull-down.
0 = Disable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (no confidentiality).
1 = Enable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (with confidentiality). Must be
pulled up to support Intel AMT with TLS and Intel
SBA (Small Business Advantage) with TLS.
+3V 2,4,10,12,13,14,15,16,17,19,23,24,25,28,30,31,33,34,35,40,50,54,55
+3V_DEEP_SUS 4,10,12,14,15,36
No Boot:
The signal has a weak internal pull-down.
This field determines the destination of accesses to the
BIOS memory range. Also controllable using Boot BIOS
Destination bit (Chipset Configuration Registers: Offset
3410h:Bit 10). This strap is used in conjunction with Boot
BIOS Destination Selection 0 strap.
Bit 10 Boot BIOS Destination
0 SPI
1 LPC
ACZ_SDOUT14
GPIO33_EC34
GPP_B1814SML0ALERT#10
SML1ALERT#10
ACZ_SDOUT
R514 1K_2
GPP_B18
SML1ALERT#
+3V_DEEP_SUS
R506
*4.7K_2
ACZ_SDOUT
+3V
R156
*4.7K_2
R157
10K_2
+3V_DEEP_SUS
R431
*10K_2
R430
20K/F_2
No Boot:
The signal has a weak internal pull-down.
0 = Enable security measures defined in the Flash
Descriptor.
1 = Disable Flash Descriptor Security (override). This
strap should only be asserted high using external
pull-up in manufacturing/debug environments ONLY.
This function is useful when running ITP/XDP.
No Boot:
The signal has a weak internal pull-down.
0 = Disable No Reboot mode.
1 = Enable No Reboot mode
(PCH will disable the TCO
Timer system reboot feature).
This function is useful when running ITP/XDP.
No Boot:
The signal has a weak internal pull-down.
0 = LPC Is selected for EC.
1 = eSPI Is selected for EC.
A A
PROJECT : X31
PROJECT : X31
PROJECT : X31
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
SKL U (10/14)
SKL U (10/14)
SKL U (10/14)
1
11 59Tuesday, July 19, 2016
11 59Tuesday, July 19, 2016
11 59Tuesday, July 19, 2016
I'm from VIETNAM sualaptop365
5
PEG_RXN118
PEG_RXP118
PEG_TXN118
PEG_TXP118
D D
GPU
Thunderbolt
WLAN
C C
Card-Reader
SSD
SSD
B B
PEG_RXN218
PEG_RXP218
PEG_TXN218
PEG_TXP218
PEG_RXN318
PEG_RXP318
PEG_TXN318
PEG_TXP318
PEG_RXN418
PEG_RXP418
PEG_TXN418
PEG_TXP418
PCIE_RXN5_TBT35
PCIE_RXP5_TBT35
PCIE_TXN5_TBT35
PCIE_TXP5_TBT35
PCIE_RXN6_TBT35
PCIE_RXP6_TBT35
PCIE_TXN6_TBT35
PCIE_TXP6_TBT35
PCIE_RXN7_WLAN32
PCIE_RXP7_WLAN32
PCIE_TXN7_WLAN32
PCIE_TXP7_WLAN32
PCIE_RXN8_CARD28
PCIE_RXP8_CARD28
PCIE_TXN8_CARD28
PCIE_TXP8_CARD28
PCIE_RXN9_SSD30
PCIE_RXP9_SSD30
PCIE_TXN9_SSD30
PCIE_TXP9_SSD30
PCIE_RXN10_SSD30
PCIE_RXP10_SSD30
PCIE_TXN10_SSD30
PCIE_TXP10_SSD30
+3V_DEEP_SUS
PCIE11_SATA1B_RXN30
PCIE11_SATA1B_RXP30
PCIE11_SATA1B_TXN30
PCIE11_SATA1B_TXP30
PCIE12_SATA2_RXN30
PCIE12_SATA2_RXP30
PCIE12_SATA2_TXN30
PCIE12_SATA2_TXP30
C425 0.22U/6.3V_2
C424 0.22U/6.3V_2
C423 0.22U/6.3V_2
C422 0.22U/6.3V_2
C428 0.22U/6.3V_2
C429 0.22U/6.3V_2
C430 0.22U/6.3V_2
C431 0.22U/6.3V_2
C432 0.22U/6.3V_2
C433 0.22U/6.3V_2
C420 0.22U/6.3V_2
C421 0.22U/6.3V_2
C413 0.1U/10V_2
C412 0.1U/10V_2 R387 10K_2
C416 0.1U/10V_2
C437 0.1U/10V_2
R504 10K_2
PCI-E Port Mapping Table
PCI-E Port
Port1
Port2
Port3
Port4
Port5
Port6
Port7
A A
Port8
Port9
Port10
Port11
Port12
5
Function
GPU
GPU
GPU
GPU
Thunderbolt
Thunderbolt
WLAN
CR
SSD HDD
SSD HDD
SSD HDD
SSD HDD
CLK RQ Port
Port0
Port1
Port2
Port3
Port4
Port5
Function
Un-used
Un-used
WLAN
Un-used
Thunderbolt
SSD HDD
4
PEG_TXN1_C
PEG_TXP1_C
PEG_TXN2_C
PEG_TXP2_C
PEG_TXN3_C
PEG_TXP3_C
PEG_TXN4_C
PEG_TXP4_C
PCIE_TXN5_TBT_C
PCIE_TXP5_TBT_C
PCIE_TXN6_TBT_C
PCIE_TXP6_TBT_C
PCIE_TXN7_WLAN_C
PCIE_TXP7_WLAN_C
PCIE_TXN8_CARD_C
PCIE_TXP8_CARD_C
R351 100/F_2
PIRQA#
4
U16H
PCIE/USB3/SATA
H13
PCIE1_RXN/USB3_5_RXN
G13
PCIE1_RXP/USB3_5_RXP
B17
PCIE1_TXN/USB3_5_TXN
A17
PCIE1_TXP/USB3_5_TXP
G11
PCIE2_RXN/USB3_6_RXN
F11
PCIE2_RXP/USB3_6_RXP
D16
PCIE2_TXN/USB3_6_TXN
C16
PCIE2_TXP/USB3_6_TXP
H16
PCIE3_RXN
G16
PCIE3_RXP
D17
PCIE3_TXN
C17
PCIE3_TXP
G15
PCIE4_RXN
F15
PCIE4_RXP
B19
PCIE4_TXN
A19
PCIE4_TXP
F16
PCIE5_RXN
E16
PCIE5_RXP
C19
PCIE5_TXN
D19
PCIE5_TXP
G18
PCIE6_RXN
F18
PCIE6_RXP
D20
PCIE6_TXN
C20
PCIE6_TXP
F20
PCIE7_RXN/SATA0_RXN
E20
PCIE7_RXP/SATA0_RXP
B21
PCIE7_TXN/SATA0_TXN
A21
PCIE7_TXP/SATA0_TXP
G21
PCIE8_RXN/SATA1A_RXN
F21
PCIE8_RXP/SATA1A_RXP
D21
PCIE8_TXN/SATA1A_TXN
C21
PCIE8_TXP/SATA1A_TXP
E22
PCIE9_RXN
E23
PCIE9_RXP
B23
PCIE9_TXN
A23
PCIE9_TXP
F25
PCIE10_RXN
E25
PCIE10_RXP
D23
PCIE10_TXN
C23
PCIE10_TXP
F5
PCIE_RCOMPN
E5
PCIE_RCOMPP
D56
PROC_PRDY#
D61
PROC_PREQ#
BB11
GPP_A7/PIRQA#
E28
PCIE11_RXN/SATA1B_RXN
E27
PCIE11_RXP/SATA1B_RXP
D24
PCIE11_TXN/SATA1B_TXN
C24
PCIE11_TXP/SATA1B_TXP
E30
PCIE12_RXN/SATA2_RXN
F30
PCIE12_RXP/SATA2_RXP
A25
PCIE12_TXN/SATA2_TXN
B25
PCIE12_TXP/SATA2_TXP
*SKL_ULT
REV = 1
?
SKL_ULT
SSIC / USB3
USB2
GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2
QCMC
8 OF 20
+3V 2,4,10,11,13,14,15,16,17,19,23,24,25,28,30,31,33,34,35,40,50,54,55
+3V_DEEP_SUS 4,10,11,14,15,36
USB3.0 Port Mapping Table
USB3.0 Function
PORT-1
PORT-2
PORT-3
USB3.0 MB-1
Type-C USB Port B
Type-C USB Port B
PORT-4 NC
3
USB3_1_RXN
USB3_1_RXP
USB3_1_TXN
USB3_1_TXP
USB3_2_RXN/SSIC_1_RXN
USB3_2_RXP/SSIC_1_RXP
USB3_2_TXN/SSIC_1_TXN
USB3_2_TXP/SSIC_1_TXP
USB3_3_RXN/SSIC_2_RXN
USB3_3_RXP/SSIC_2_RXP
USB3_3_TXN/SSIC_2_TXN
USB3_3_TXP/SSIC_2_TXP
USB3_4_RXN
USB3_4_RXP
USB3_4_TXN
USB3_4_TXP
USB2N_1
USB2P_1
USB2N_2
USB2P_2
USB2N_3
USB2P_3
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
USB2N_7
USB2P_7
USB2N_8
USB2P_8
USB2N_9
USB2P_9
USB2N_10
USB2P_10
USB2_COMP
USB2_VBUSSENSE
GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#
GPP_E4/DEVSLP0
GPP_E5/DEVSLP1
GPP_E6/DEVSLP2
GPP_E8/SATALED#
?
3
USB2_ID
H8
G8
C13
D13
J6
H6
B13
A13
J10
H10
B15
A15
E10
F10
C15
D15
AB9
AB10
AD6
AD7
AH3
AJ3
AD9
AD10
AJ1
AJ2
AF6
AF7
AH1
AH2
AF8
AF9
AG1
AG2
AH7
AH8
USB2_COMP
AB6
AG3
AG4
A9
OC0#
TS_OFF
C9
TS_INT#
D9
B9
TBT_FORCE_PWR
J1
J2
DEVSLP1
DGPU_HOLD_RST#
J3
H2
GPIO34
H3
GPIO35
G4
GPIO36
SATA_LED#
H1
USB30_RX1ÂUSB30_RX1+
USB30_TX1ÂUSB30_TX1+
USB30_RX2ÂUSB30_RX2+
USB30_TX2ÂUSB30_TX2+
USBP1ÂUSBP1+
USBP2ÂUSBP2+
USBP5ÂUSBP5+
USBP6ÂUSBP6+
USBP7ÂUSBP7+
R443 113/F_2
R480 0_2
2
USB30_RX1- 29
USB30_RX1+ 29
USB30_TX1- 29
USB30_TX1+ 29
USB30_RX2- 39
USB30_RX2+ 39
USB30_TX2- 39
USB30_TX2+ 39
USBP1- 29
USBP1+ 29
USBP2- 40
USBP2+ 40
USBP5- 30
USBP5+ 30
USBP6- 30
USBP6+ 30
USBP7- 32
USBP7+ 32
Daughter Board
For Type-C USB Port B
Daughter Board
For Type-C USB Port B
HD Camera
IR Camera
BT
0525 SI Add R894 PU +3V
PLACE 'R326' WITHIN 500 MILS
FROM USB2_COMP PIN WITH
TRACE IMPEDANCE LESS THAN 0.5 OHMS
TS_OFF 23
TS_INT# 23
TS_RST 23
TBT_FORCE_PWR 35
DEVSLP1 30
DGPU_HOLD_RST# 18
GPIO34 30
GPIO35 30
GPIO36 30
0308 GPU
USB2.0 Port Mapping Table
USB2.0 Function
PORT-1
PORT-2
PORT-3
PORT-4
PORT-5
PORT-6
PORT-7
PORT-8
PORT-9
PORT-10
USB3.0 MB-1
Type-C USB Port B
NC
NC
HD Camera
IR Camera
WLAN
NC
NC
NC
2
NB5
NB5
NB5
1
12
+3V
TS_OFF
TS_INT#
TS_RST
SATA_LED#
GPIO34
GPIO35
GPIO36
DGPU_HOLD_RST#
GPIO34
GPIO35
GPIO36
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
R349 *10K_2
R341 10K_2
R332 10K_2
R397 *10K_2
R393 10K_2
R401 10K_2
R894 10K_2
R392 *10K_2
R400 *10K_2
R388 *10K_2
+3V_DEEP_SUS
OC0#
R355 10K_2
Un-used OC# need add pull high
PROJECT : X31
PROJECT : X31
PROJECT : X31
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
SKL U (11/14)
SKL U (11/14)
SKL U (11/14)
1
12 59Tuesday, July 19, 2016
12 59Tuesday, July 19, 2016
12 59Tuesday, July 19, 2016
I'm from VIETNAM sualaptop365
5
U16J
GPU
D D
WLAN
Card Reader
Thunderbolt
SSD
CLK_VGA_N18
CLK_VGA_P18
PCIE_CLKREQ_VGA#18
CLK_PCIE_WLANN32
CLK_PCIE_WLANP32
PCIE_CLKREQ_WLAN#32
CLK_PCIE_CRN28
CLK_PCIE_CRP28
PCIE_CLKREQ_CR#28
CLK_PCIE_TBTN35
CLK_PCIE_TBTP35
PCIE_CLKREQ_TBT#35
CLK_PCIE_SSDN30
CLK_PCIE_SSDP30
PCIE_CLKREQ_SSD#30
PCIE_CLKREQ_VGA#
PCIE_CLKREQ1#
PCIE_CLKREQ_WLAN#
PCIE_CLKREQ_CR#
PCIE_CLKREQ_TBT#
PCIE_CLKREQ_SSD#
D42
CLKOUT_PCIE_N0
C42
CLKOUT_PCIE_P0
AR10
GPP_B5/SRCCLKREQ0#
B42
CLKOUT_PCIE_N1
A42
CLKOUT_PCIE_P1
AT7
GPP_B6/SRCCLKREQ1#
D41
CLKOUT_PCIE_N2
C41
CLKOUT_PCIE_P2
AT8
GPP_B7/SRCCLKREQ2#
D40
CLKOUT_PCIE_N3
C40
CLKOUT_PCIE_P3
AT10
GPP_B8/SRCCLKREQ3#
B40
CLKOUT_PCIE_N4
A40
CLKOUT_PCIE_P4
AU8
GPP_B9/SRCCLKREQ4#
E40
CLKOUT_PCIE_N5
E38
CLKOUT_PCIE_P5
AU7
GPP_B10/SRCCLKREQ5#
4
?
SKL_ULT
CLOCK SIGNALS
XTAL24_IN
RTCX1
RTCX2
SRTCRST#
RTCRST#
F43
E43
BA17
E37
E35
E42
AM18
AM20
AN18
AM16
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
GPD8/SUSCLK
XTAL24_OUT
XCLK_BIASREF
TBT
PCH_SUSCLK
XTAL24_IN
XTAL24_OUT
XCLK_BIASREF
RTC_X1
RTC_X2
SRTC_RST#
RTC_RST#
3
2
1
13
+1.0V_DEEP_SUS
R312
PCH_SUSCLK 30,32
XCLK_BIASREF
Cannonlake-U Stuff R376.
2.7K/F_2
R313
*60.4/F_2
*SKL_ULT
REV = 1
U16I
CSI-2
A36
CSI2_DN0
B36
C C
B B
C38
D38
C36
D36
A38
B38
C31
D31
C33
D33
A31
B31
A33
B33
A29
B29
C28
D28
A27
B27
C27
D27
CSI2_DP0
CSI2_DN1
CSI2_DP1
CSI2_DN2
CSI2_DP2
CSI2_DN3
CSI2_DP3
CSI2_DN4
CSI2_DP4
CSI2_DN5
CSI2_DP5
CSI2_DN6
CSI2_DP6
CSI2_DN7
CSI2_DP7
CSI2_DN8
CSI2_DP8
CSI2_DN9
CSI2_DP9
CSI2_DN10
CSI2_DP10
CSI2_DN11
CSI2_DP11
*SKL_ULT
SKL_ULT
REV = 1
10 OF 20
?
GPP_F13/EMMC_DATA0
GPP_F14/EMMC_DATA1
GPP_F15/EMMC_DATA2
GPP_F16/EMMC_DATA3
GPP_F17/EMMC_DATA4
GPP_F18/EMMC_DATA5
GPP_F19/EMMC_DATA6
GPP_F20/EMMC_DATA7
QCMC
9 OF 20
CSI2_CLKN0
CSI2_CLKP0
CSI2_CLKN1
CSI2_CLKP1
CSI2_CLKN2
CSI2_CLKP2
CSI2_CLKN3
CSI2_CLKP3
CSI2_COMP
GPP_D4/FLASHTRIG
EMMC
GPP_F21/EMMC_RCLK
GPP_F22/EMMC_CLK
GPP_F12/EMMC_CMD
EMMC_RCOMP
?
C37
D37
C32
D32
C29
D29
B26
A26
E13
B7
AP2
AP1
AP3
AN3
AN1
AN2
AM4
AM1
AM2
AM3
AP4
AT1
?
EMMC_RCOMP
R120 100/F_2
R487 200/F_2
CLK_REQ/Strap Pin(CLG)
PCIE_CLKREQ_VGA#
PCIE_CLKREQ1#
PCIE_CLKREQ_WLAN#
PCIE_CLKREQ_CR#
PCIE_CLKREQ_TBT#
PCIE_CLKREQ_SSD#
+3V 2,4,10,11,12,14,15,16,17,19,23,24,25,28,30,31,33,34,35,40,50,54,55
+3VPCU 6,26,27,29,31,32,34,37,45,46,53,58
+BAT_RTC 4,15,31,45,58
+3V_RTC_2 4,15
+1.0V_DEEP_SUS 9,15,48,49
R140 10K_2
R153 10K_2
R146 10K_2
R152 10K_2
R148 10K_2
R151 10K_2
+3V
RTC Clock 32.768KHz RTC Circuitry(RTC) External Crystal
20mils
C564 12P/50V_4
Y4
32.768KHz
C563 12P/50V_4
A A
0523 SI Change to 12PF
RTC_X1
12
R523
10M_4
RTC_X2
Coin BAT -->Rb (default)
RTC Power trace width 20mils.
+3V_RTC_0
+3V_RTC_0
1
4
23
CN15
RTC_CONN_2P
DFHD02MS223
+3VPCU
R619 1K_2
+3V_RTC_1
+BAT_RTC+3V_RTC_2
R623
0_4
D52
BAT54CW-7-F
+3V_RTC_D
RaRbMain BAT -->Ra
R618
*0_4
R615 0_2
R614 20K/F_2
R620 20K/F_2
C677
1U/6.3V_2
SRTC_RST#RTC_RST#
C670
1U/6.3V_4
C679
1U/6.3V_2
RTC_RST#
SRTC_RST#
0328 FP PN update
5
4
3
3
1
3
1
RTC_RST#
Q42
DMG1012T-7
2
SRTC_RST#
Q43
*DMG1012T-7
EC_SRTC_RST
2
R611
10K_2
R624
*10K_2
EC_RTC_RST 34
XTAL24_IN
XTAL24_OUT
2
R303
1M_4
C409 27P/50V_4
1
2
24MHZ +-30PPM
Y1
4
3
C410 27P/50V_4
NB5
NB5
NB5
PROJECT : X31
PROJECT : X31
PROJECT : X31
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
SKL U (12/14)
SKL U (12/14)
SKL U (12/14)
1
13 59Tuesday, July 19, 2016
13 59Tuesday, July 19, 2016
13 59Tuesday, July 19, 2016
I'm from VIETNAM sualaptop365
5
BT_OFF
PCH_TEMPALERT#
SIO_EXT_SCI#
UART2_RXD
D D
UART2_TXD
SPK_ID_CODEC
C C
R465 10K_2
R482 *10K_2
R471 10K_2
R460 10K_2 R518 33_2
R441 *10K_2
R456 10K_2
R449 10K_2
R454 10K_2
R490 *10K_2
KBL-U
B B
R413 10K_2
R416 10K_2
R479 10K_2
R472 49.9K/F_4
R473 49.9K/F_4
R483 10K_2
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
BOARD_ID6
BOARD_ID7
BOARD_ID8
BOARD_ID8
Model
+3V_DEEP_SUS
DB2 Change Footprint
Touch Screen
R464 *10K_2
R481 10K_2
R470 *10K_2
R461 *10K_2
R444 10K_2
R457 *10K_2
R450 *10K_2
R453 *10K_2
R513 10K_2
BOARD_ID6
+3V_DEEP_SUS
GPP_B18
GSPI1_MOSI
UART2_RXD
UART2_TXD
TBT_HTPLG
SIO_EXT_SCI#
I2C0_SDA
I2C0_SCL
ID3 ID2 ID1 ID0
GPP_B1811
GSPI1_MOSI11
TBT_HTPLG35
SIO_EXT_SCI#34
I2C0_SDA23
I2C0_SCL23
SPK_ID_CODEC27
ID5 ID4ID6ID7ID8
0
X32
0 VPRO
1 Non VPRO
0 2+2 CPU
1 2+3E CPU
0 ESH
1 ISH
0 DIS
(Default = 01)
0
0
0
0
0
0
0
1
1 0 0
1 10
A A
1 10
4
AN8
AP7
AP8
AR7
AM5
AN7
AP5
AN5
AB1
AB2
W4
AB3
AD1
AD2
AD3
AD4
U7
U6
U8
U9
AH9
AH10
AH11
AH12
AF11
AF12
BOARD_ID[3:0]BOARD_ID7 Board ID [5:4]
0 0
0 0
0 1
1 0
1 0
1 1
1 1
0 0
Skylake (GPIO)
?
U16F
LPSS ISH
GPP_B15/GSPI0_CS#
GPP_B16/GSPI0_CLK
GPP_B17/GSPI0_MISO
GPP_B18/GSPI0_MOSI
GPP_B19/GSPI1_CS#
GPP_B20/GSPI1_CLK
GPP_B21/GSPI1_MISO
GPP_B22/GSPI1_MOSI
GPP_C8/UART0_RXD
GPP_C9/UART0_TXD
GPP_C10/UART0_RTS#
GPP_C11/UART0_CTS#
GPP_C20/UART2_RXD
GPP_C21/UART2_TXD
GPP_C22/UART2_RTS#
GPP_C23/UART2_CTS#
GPP_C16/I2C0_SDA
GPP_C17/I2C0_SCL
GPP_C18/I2C1_SDA
GPP_C19/I2C1_SCL
GPP_F4/I2C2_SDA
GPP_F5/I2C2_SCL
GPP_F6/I2C3_SDA
GPP_F7/I2C3_SCL
GPP_F8/I2C4_SDA
GPP_F9/I2C4_SCL
*SKL_ULT
REV = 1
0
1
10
0
1
0
1
0
1
0
1
0
1
SKL_ULT
6 OF 20
+3V_DEEP_SUS
ACZ_SYNC_AUDIO25
ACZ_RST#_AUDIO25
ACZ_SDOUT_AUDIO25
BIT_CLK_AUDIO25
Hynix 8Gb
Samsung 8Gb
Micron 8Gb
Hynix 16G
Samsung 16G
Micron 16G
3
Need apply PN
GPP_D9
GPP_D10
GPP_D11
GPP_D12
GPP_D5/ISH_I2C0_SDA
GPP_D6/ISH_I2C0_SCL
GPP_D7/ISH_I2C1_SDA
GPP_D8/ISH_I2C1_SCL
GPP_F10/I2C5_SDA/ISH_I2C2_SDA
GPP_F11/I2C5_SCL/ISH_I2C2_SCL
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
GPP_D15/ISH_UART0_RTS#
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
GPP_C12/UART1_RXD/ISH_UART1_RXD
GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
GPP_A18/ISH_GP0
GPP_A19/ISH_GP1
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPP_A23/ISH_GP5
GPP_A12/BM_BUSY#/ISH_GP6
HDA Bus(CLG)
ACZ_SYNC
ACZ_BCLK
ACZ_SDOUT
ACZ_SDIN0
ACZ_RST#
ACZ_SPKR
ACZ_SYNC
ACZ_SYNC
ACZ_RST#
ACZ_SDOUT
ACZ_BCLK
R510 *1K_2
R508 33_2
R519 33_2
R509 33_2
C561
*10P/50V_2
ACZ_SDOUT11
ACZ_SDIN025
ACZ_SPKR11,25
P2
P3
P4
P1
M4
N3
N1
N2
AD11
AD12
U1
U2
U3
U4
AC1
AC2
AC3
AB4
AY8
BA8
BB7
BA7
AY7
AW7
AP13
?
U16G
BA22
HDA_SYNC/I2S0_SFRM
AY22
HDA_BLK/I2S0_SCLK
BB22
HDA_SDO/I2S0_TXD
BA21
HDA_SDI0/I2S0_RXD
AY21
HDA_SDI1/I2S1_RXD
AW22
HDA_RST#/I2S1_SCLK
J5
GPP_D23/I2S_MCLK
AY20
I2S1_SFRM
AW20
I2S1_TXD
AK7
GPP_F1/I2S2_SFRM
AK6
GPP_F0/I2S2_SCLK
AK9
GPP_F2/I2S2_TXD
AK10
GPP_F3/I2S2_RXD
H5
GPP_D19/DMIC_CLK0
D7
GPP_D20/DMIC_DATA0
D8
GPP_D17/DMIC_CLK1
C8
GPP_D18/DMIC_DATA1
AW5
GPP_B14/SPKR
*SKL_ULT
2
+3V 2,4,10,11,12,13,15,16,17,19,23,24,25,28,30,31,33,34,35,40,50,54,55
+3V_DEEP_SUS 4,10,11,12,15,36
BT_OFF
ISH_I2C0_SDA
ISH_I2C0_SCL
ISH_I2C1_SDA
ISH_I2C1_SCL
ISH_I2C2_SDA
ISH_I2C2_SCL
PCH_TEMPALERT# ISH_I2C1_SDA
ISH_AE_INT_K
ISH_GYRO_DRDY_K
ISH_GYRO_INT_K
ISH_GP3
ISH_ACC_INT_K ISH_ACC_INT_K
DISABLE KB
EMU_LID_D
BT_OFF 32
ISH_I2C0_SDA 33
ISH_I2C0_SCL 33
TP4
TP5
R213 *0_2
R210 *0_2
DISABLE KB 34
ISH_GYRO_DRDY 33
ISH_GYRO_INT 33
R224 *10K_2
R222 *10K_2
R228 *10K_2
ISH_AE_INT_K
ISH_GP3
ISH_GYRO_INT_K
EMU_LID_D
EMU_LID_D
ISH_GYRO_DRDY
ISH_GYRO_INT
ISH_AE_INT
ISH_ACC_INT
DISABLE KB
ISH_I2C0_SDA
ISH_I2C0_SCL
ISH_I2C2_SDA
ISH_I2C2_SCL
ISH_I2C1_SCL
I2C0_SDA
I2C0_SCL
R207 0_2
R204 *0_2
R209 0_2
R211 *0_2
R226 *10K_2
D49 RB500V-40
Sensors Debug CONN
CN1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
AB11
AB13
AB12
W12
W11
W10
W8
W7
BA9
BB9
AB7
AF13
*ACES_88511-180N
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
BOARD_ID6
BOARD_ID7
BOARD_ID8
R136 200/F_2
AUDIO
REV = 1
SKL_ULT
Need apply PN
?
SDIO/SDXC
GPP_A17/SD_PW R_EN#/ISH_GP7
7 OF 20
GPP_G0/SD_CMD
GPP_G1/SD_DATA0
GPP_G2/SD_DATA1
GPP_G3/SD_DATA2
GPP_G4/SD_DATA3
GPP_G5/SD_CD#
GPP_G6/SD_CLK
GPP_G7/SD_W P
GPP_A16/SD_1P8_SEL
SD_RCOMP
GPP_F23
?
1
R225 *10K_2
R223 *10K_2
R220 *10K_2
R212 *10K_2
R221 *10K_2
R229 *10K_2
R217 10K_2
R208 10K_2
R137 10K_2
R139 10K_2
R215 10K_2
R216 10K_2
R132 10K_2
R135 10K_2
+3V_DEEP_SUS
ISH_I2C0_SCL
ISH_I2C0_SDA
ISH_I2C1_SCL
ISH_I2C1_SDA
ISH_GYRO_DRDY
ISH_GYRO_INT
ISH_AE_INT
ISH_ACC_INT
EMU_LID_D
DISABLE KB
14
ISH_AE_INT 33
ISH_ACC_INT 33
EMU_LID 23,34
TP22
TP19
TP21
+3V
TP20
+3V
5
4
I'm from VIETNAM sualaptop365
PROJECT : X31
PROJECT : X31
PROJECT : X31
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
SKL U (13/14)
SKL U (13/14)
SKL U (13/14)
1
14 59Tuesday, July 19, 2016
14 59Tuesday, July 19, 2016
14 59Tuesday, July 19, 2016
5
4
3
2
1
15
+VCCRTCPRIM_3.3VVCCRTC
+3V_DEEP_SUS
+1.8V_DEEP_SUS
C276
1uF/6.3_2
C206
1uF/6.3_2
C269
0.1U/10V_2
D D
C215 1uF/6.3_2
+1.0V_DEEP_SUS
+3VS5
+3V
+VCCDSW_1.0V
+1.0V_DEEP_SUS
+1.0V_DEEP_SUS
+1.0V_DEEP_SUS
C199 *0.1U/10V_2
+1.0V_DEEP_SUS
+1.0V_DEEP_SUS
R145 *0_2/S
C284 *0.1U/10V_2
+3V_DEEP_SUS
+1.0V_DEEP_SUS
+3V_DEEP_SUS
+1.0V_DEEP_SUS
+1.0V_DEEP_SUS
PCH Internal VRM
C C
B B
C229 1uF/6.3_2
C554 1uF/6.3_2
C255 1uF/6.3_2
C244 1uF/6.3_2
C184 22U/6.3V_6
C235 1U/6.3V_2
R126 *0_4/S
C240 1uF/6.3_2
R149 *0_4/S
C172 1uF/6.3_2
C173 1uF/6.3_2
C256 0.1U/10V_2
R143 *0_4/S
+VCCPRIM
+VCCMPHYAON_1P0
+VCCAMPHYPLL_1P0
C174 *0.1U/10V_2
+VCCAPLL_1.0V
+VCCPRIM
+V3.3DX_1.5DX_ADO
+3V_DEEP_SUS
+VCCSRAM_1.0V
+VCCPRIM_3.3V
+VCCPRIM_1.0V
+VCCAPLLEBB
+1.0V_DEEP_SUS
C162
*1U/6.3V_2
C216
*22U/6.3V_6
U16O
AB19
VCCPRIM_1P0
AB20
VCCPRIM_1P0
P18
VCCPRIM_1P0
AF18
VCCPRIM_CORE
AF19
VCCPRIM_CORE
V20
VCCPRIM_CORE
V21
VCCPRIM_CORE
AL1
DCPDSW_1P0
K17
VCCMPHYAON_1P0
L1
VCCMPHYAON_1P0
N15
VCCMPHYGT_1P0_N15
N16
VCCMPHYGT_1P0_N16
N17
VCCMPHYGT_1P0_N17
P15
VCCMPHYGT_1P0_P15
P16
VCCMPHYGT_1P0_P16
K15
VCCAMPHYPLL_1P0
L15
VCCAMPHYPLL_1P0
V15
VCCAPLL_1P0
AB17
VCCPRIM_1P0_AB17
Y18
VCCPRIM_1P0_Y18
AD17
VCCDSW_3P3_AD17
AD18
VCCDSW_3P3_AD18
AJ17
VCCDSW_3P3_AJ17
AJ19
VCCHDA
AJ16
VCCSPI
AF20
VCCSRAM_1P0
AF21
VCCSRAM_1P0
T19
VCCSRAM_1P0
T20
VCCSRAM_1P0
AJ21
VCCPRIM_3P3_AJ21
AK20
VCCPRIM_1P0_AK20
N18
VCCAPLLEBB
*SKL_ULT
REV = 1
CPU POWER 4 OF 4
SKL_ULT
2.899A
0.03A
?
AK15
VCCPGPPA
AG15
VCCPGPPB
Y16
VCCPGPPC
Y15
VCCPGPPD
T16
VCCPGPPE
2.57A
VCCPRIM_3P3_V19
VCCPRIM_1P0_T1
VCCATS_1P8
1.714A
VCCRTCPRIM_3P3
VCCRTC_AK19
VCCRTC_BB14
0.09A
GPP_B0/CORE_VID0
GPP_B1/CORE_VID1
15 OF 20
+3V 2,4,10,11,12,13,14,16,17,19,23,24,25,28,30,31,33,34,35,40,50,54,55
+3VS5 4,32,33,34,35,36,39,45,46,47,48,49,53,54,57
+BAT_RTC 4,13,31,45,58
+3V_RTC_2 4,13
+3V_DEEP_SUS 4,10,11,12,14,36
+1.0V_DEEP_SUS 9,13,48,49
+1.8V_DEEP_SUS 9,45,48,54
VCCPGPPF
VCCPGPPG
DCPRTC
VCCCLK1
VCCCLK2
VCCCLK3
VCCCLK4
VCCCLK5
VCCCLK6
AF16
AD15
V19
T1
AA1
AK17
AK19
BB14
BB10
A14
K19
L21
N20
L19
A10
AN11
AN13
?
+VCCPGPPA
+VCCPGPPB
+VCCPGPPC
+VCCPGPPD
+VCCPGPPE
+VCCPGPPF
+VCCPGPPG
+VCCPRIM_1.0V_T1
+VCCATS_1.8V
+VCCRTCPRIM_3.3V
VCCRTC
DCPRTC
+VCCCLK1
+VCCCLK2
+VCCCLK3
+VCCCLK4
+VCCCLK5
+VCCCLK6
CORE_VID0
CORE_VID1
C236 1uF/6.3_2
R190 0_4
R163 *0_4
C299 0.1U/10V_2
C63 1uF/6.3_2
TP9
TP7
20160705 Modify R260 to 10K
SLP_SUS_ON34,48,49
Rb
Ra
+3V_DEEP_SUS
+1.0V_DEEP_SUS
+1.8V_DEEP_SUS
+3V_DEEP_SUS
+3V_RTC_2
+BAT_RTC
+1.0V_DEEP_SUS
R260
10K_2
C381
*10P/50V_2
Main BAT -->Ra
Coin BAT -->Rb (default)
C400
1uF/6.3_2
U7
5
IN
4
IN
3
ON/OFF
G5245AT11U
+VCCPGPPA
+VCCPGPPB
+VCCPGPPC
+VCCPGPPD
+VCCPGPPE
+VCCPGPPG
+VCCPGPPF
+VCCPGPPB +VCCPGPPC +VCCPGPPE
C226
1uF/6.3_2
+VCCATS_1.8V
C245
1uF/6.3_2
OUT
GND
1
2
C272
0.1U/10V_2
+3V_DEEP_SUS+3VS5
C252
1uF/6.3_2
C304
1uF/6.3_2
C385
0.1U/10V_2
A A
PROJECT : X31
PROJECT : X31
PROJECT : X31
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
SKL U (14/14)
SKL U (14/14)
SKL U (14/14)
1
15 59Tuesday, July 19, 2016
15 59Tuesday, July 19, 2016
15 59Tuesday, July 19, 2016
I'm from VIETNAM sualaptop365
5
M_A_A[16:0]3
D D
M_A_ACT#3
M_A_PARITY3
R232 240_4
+1.2VSUS
C C
B B
+3V
R230
*0_4
A A
CHA_SA0 CHA_SA1
R233
0_4
R231
*0_4
R234
0_4
M_A_ALERT#3
SM_DRAMRST#3,17
M_A_BA#03
M_A_BA#13
M_A_BG#03
M_A_BG#13
M_A_CS#03
M_A_CS#13
M_A_CKE03
M_A_CKE13
M_A_CLKP03
M_A_CLKN03
M_A_CLKP13
M_A_CLKN13
M_A_ODT03
M_A_ODT13
SMB_RUN_CLK10,17,31
SMB_RUN_DAT10,17,31
R237
*0_4
CHA_SA2
R236
0_4
SPD ADDRESS FOR CHANNEL-0 :
WRITE ADDRESS: 0XA0
READ ADDRESS: 0XA1
SA0 = 0; SA1 = 0; SA2 = 0.
DDR4 POR OPERATING SPEED: 1867 MT/S
STRETCH GOAL IS 2133 MT/S
5
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_A16
PM_EXTTS#0
C330 *0.1U/16V_4
SMB_RUN_CLK
SMB_RUN_DAT
CHA_SA0
CHA_SA1
CHA_SA2
+1.2VSUS
TP24
TP23
JDIM1A
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10/AP
120
A11
119
A12
158
A13
151
A14/WE#
156
A15/CAS#
152
A16/RAS#
162
S2#/C0
165
S3#/C1
114
ACT#
143
PARITY
116
ALERT#
134
EVENT#
108
RESET#
150
BA0
145
BA1
115
BG0
113
BG1
149
S0#
157
S1#
109
CKE0
110
CKE1
137
CK0
139
CK0#
138
CK1
140
CK1#
155
ODT0
161
ODT1
253
SCL
254
SDA
256
SA0
260
SA1
166
SA2
92
CB0
91
CB1
101
CB2
105
CB3
88
CB4
87
CB5
100
CB6
104
CB7
12
DM0
33
DM1
54
DM2
75
DM3
178
DM4
199
DM5
220
DM6
241
DM7
96
DM8
4
M_A_DQ[63:0] 3
M_A_DQ1
8
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
(260P)
DDR4 SODIMM 260 PIN
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8
4
M_A_DQ4
7
M_A_DQ3
20
M_A_DQ6
21
M_A_DQ5
4
M_A_DQ0
3
M_A_DQ7
16
M_A_DQ2
17
M_A_DQ13
28
M_A_DQ9
29
M_A_DQ11
41
M_A_DQ15
42
M_A_DQ12
24
M_A_DQ8
25
M_A_DQ14
38
M_A_DQ10
37
M_A_DQ33
50
M_A_DQ37
49
M_A_DQ34
62
M_A_DQ35
63
M_A_DQ32
46
M_A_DQ36
45
M_A_DQ38
58
M_A_DQ39
59
M_A_DQ45
70
M_A_DQ41
71
M_A_DQ43
83
M_A_DQ47
84
M_A_DQ44
66
M_A_DQ40
67
M_A_DQ42
79
M_A_DQ46
80
M_A_DQ28
174
M_A_DQ24
173
M_A_DQ31
187
M_A_DQ26
186
M_A_DQ25
170
M_A_DQ29
169
M_A_DQ30
183
M_A_DQ27
182
M_A_DQ21
195
M_A_DQ16
194
M_A_DQ23
207
M_A_DQ22
208
M_A_DQ17
191
M_A_DQ20
190
M_A_DQ18
203
M_A_DQ19
204
M_A_DQ49
216
M_A_DQ48
215
M_A_DQ50
228
M_A_DQ55
229
M_A_DQ53
211
M_A_DQ52
212
M_A_DQ51
224
M_A_DQ54
225
M_A_DQ61
237
M_A_DQ57
236
M_A_DQ59
249
M_A_DQ63
250
M_A_DQ60
232
M_A_DQ56
233
M_A_DQ58
245
M_A_DQ62
246
M_A_DQSP0
13
M_A_DQSP1
34
M_A_DQSP4
55
M_A_DQSP5
76
M_A_DQSP3
179
M_A_DQSP2
200
M_A_DQSP6
221
M_A_DQSP7
242
97
M_A_DQSN0
11
M_A_DQSN1
32
M_A_DQSN4
53
M_A_DQSN5
74
M_A_DQSN3
177
M_A_DQSN2
198
M_A_DQSN6
219
M_A_DQSN7
240
95
M_A_DQSP[7:0] 3
M_A_DQSN[7:0] 3
3
3
2.48A
+1.2VSUS
111
112
117
118
123
124
129
130
135
136
141
142
147
148
153
154
159
160
163
15
19
23
27
31
35
39
43
47
51
57
61
65
69
73
77
81
85
89
93
99
103
107
167
171
175
181
185
189
193
197
201
205
209
213
217
223
227
231
235
239
243
247
251
VREF DQ0 M1 Solution
SM_VREF3
JDIM1B
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
1
VSS1
5
VSS2
9
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
DDR4-DIMM0_H=4_RVS
R553 2/F_6
C590
0.022U/25V_4
2 1
R552 24.9/F_4
2
DDR_VTT 17,47
+1.2VSUS 3,6,17,24,47,49,57,59
255
VDDSPD
257
VPP1
259
VPP2
258
VTT
164
VREF_CA
2
VSS48
6
VSS49
10
VSS50
14
VSS51
18
VSS52
22
VSS53
26
VSS54
30
VSS55
36
VSS56
40
VSS57
44
VSS58
48
VSS59
52
VSS60
56
VSS61
60
VSS62
64
VSS63
68
VSS64
72
VSS65
78
VSS66
82
VSS67
86
VSS68
90
(260P)
DDR4 SODIMM 260 PIN
VSS69
94
VSS70
98
VSS71
102
VSS72
106
VSS73
168
VSS74
172
VSS75
176
VSS76
180
VSS77
184
VSS78
188
VSS79
192
VSS80
196
VSS81
202
VSS82
206
VSS83
210
VSS84
214
VSS85
218
VSS86
222
VSS87
226
VSS88
230
VSS89
234
VSS90
238
VSS91
244
VSS92
248
VSS93
252
VSS94
261
GND
262
GND
+1.2VSUS
R235
1K/F_4
SMDDR_VREF_DIMM
R551
1K/F_4
+3V
+2.5VSUS
DDR_VTT
SMDDR_VREF_DQ0 SMDDR_VREF_DIMM
R550 0_6
+1.2VSUS +1.2VSUS
DDR_VTT
SMDDR_VREF_DIMM
2
+3V 2,4,10,11,12,13,14,15,17,19,23,24,25,28,30,31,33,34,35,40,50,54,55
+2.5VSUS 17,47
Place these Caps near So-Dimm0.
1uF/10uF 4pcs on each side of connector
C334 1U/6.3V_4
C331 1U/6.3V_4
C338 1U/6.3V_4
C333 1U/6.3V_4
C335 1U/6.3V_4
C337 1U/6.3V_4
C332 1U/6.3V_4
C336 1U/6.3V_4
C603 10U/6.3V_6
C611 10U/6.3V_6
C612 10U/6.3V_6
C618 10U/6.3V_6
C604 10U/6.3V_6
C588 10U/6.3V_6
C610 10U/6.3V_6
C344 1U/6.3V_4
C340 1U/6.3V_4
C327 1U/6.3V_4
C587 10U/6.3V_6
C343 *0.1U/16V_4
C342 *2.2U/6.3V_4
PROJECT : Damon
PROJECT : Damon
PROJECT : Damon
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
DDR4 DIMM0-RVS(4.0H)
DDR4 DIMM0-RVS(4.0H)
BU5/HW
BU5/HW
BU5/HW
DDR4 DIMM0-RVS(4.0H)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
For EMI RESERVE
EC20 *120P/50V_4
EC35 *120P/50V_4
EC25 *120P/50V_4
EC36 *0.1U/16V_4
EC19 *0.1U/16V_4
EC26 *0.1U/16V_4
EC24 2.2U/10V_4
EC16 *120P/50V_4
EC34 *120P/50V_4
EC22 *120P/50V_4
EC23 120P/50V_4C609 10U/6.3V_6
EC27 *120P/50V_4
EC17 82P/50V_4
EC18 *120P/50V_4
EC33 *120P/50V_4
EC21 *120P/50V_4
DDR_VTT
EC40 2200P/50V_4
EC30 2.2U/10V_4
EC41 2.2U/10V_4
EC39 82P/50V_4C346 1U/6.3V_4
+2.5VSUS
C318 0.1U/16V_4
C317 2.2U/10V_4
+3V
C319 0.1U/16V_4
C320 2.2U/10V_4
16 59Tuesday, July 19, 2016
16 59Tuesday, July 19, 2016
1
16 59Tuesday, July 19, 2016
16
1A
1A
1A
I'm from VIETNAM sualaptop365
5
M_B_A[16:0]3
D D
M_B_ACT#3
M_B_PARITY3
R242 240_4
+1.2VSUS
C C
B B
M_B_ALERT#3
SM_DRAMRST#3,16
M_B_BA#03
M_B_BA#13
M_B_BG#03
M_B_BG#13
M_B_CS#03
M_B_CS#13
M_B_CKE03
M_B_CKE13
M_B_CLKP03
M_B_CLKN03
M_B_CLKP13
M_B_CLKN13
M_B_ODT03
M_B_ODT13
SMB_RUN_CLK10,16,31
SMB_RUN_DAT10,16,31
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_A16
PM_EXTTS#1
C349 *0.1U/16V_4
M_B_ODT0
M_B_ODT1
SMB_RUN_CLK
SMB_RUN_DAT
CHB_SA0
CHB_SA1
CHB_SA2
+1.2VSUS
TP26
TP25
JDIM2A
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10/AP
120
A11
119
A12
158
A13
151
A14/WE#
156
A15/CAS#
152
A16/RAS#
162
S2#/C0
165
S3#/C1
114
ACT#
143
PARITY
116
ALERT#
134
EVENT#
108
RESET#
150
BA0
145
BA1
115
BG0
113
BG1
149
S0#
157
S1#
109
CKE0
110
CKE1
137
CK0
139
CK0#
138
CK1
140
CK1#
155
ODT0
161
ODT1
253
SCL
254
SDA
256
SA0
260
SA1
166
SA2
92
CB0
91
CB1
101
CB2
105
CB3
88
CB4
87
CB5
100
CB6
104
CB7
12
DM0
33
DM1
54
DM2
75
DM3
178
DM4
199
DM5
220
DM6
241
DM7
96
DM8
4
M_B_DQ[63:0] 3
M_B_DQ0
8
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
(260P)
DDR4 SODIMM 260 PIN
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8
M_B_DQ4
7
M_B_DQ2
20
M_B_DQ6
21
M_B_DQ5
4
M_B_DQ1
3
M_B_DQ3
16
M_B_DQ7
17
M_B_DQ8
28
M_B_DQ12
29
M_B_DQ14
41
M_B_DQ10
42
M_B_DQ9
24
M_B_DQ13
25
M_B_DQ11
38
M_B_DQ15
37
M_B_DQ37
50
M_B_DQ36
49
M_B_DQ39
62
M_B_DQ35
63
M_B_DQ32
46
M_B_DQ33
45
M_B_DQ34
58
M_B_DQ38
59
M_B_DQ45
70
M_B_DQ40
71
M_B_DQ42
83
M_B_DQ47
84
M_B_DQ41
66
M_B_DQ44
67
M_B_DQ43
79
M_B_DQ46
80
M_B_DQ20
174
M_B_DQ16
173
M_B_DQ23
187
M_B_DQ22
186
M_B_DQ21
170
M_B_DQ17
169
M_B_DQ19
183
M_B_DQ18
182
M_B_DQ29
195
M_B_DQ25
194
M_B_DQ31
207
M_B_DQ27
208
M_B_DQ28
191
M_B_DQ24
190
M_B_DQ30
203
M_B_DQ26
204
M_B_DQ49
216
M_B_DQ52
215
M_B_DQ50
228
M_B_DQ54
229
M_B_DQ53
211
M_B_DQ48
212
M_B_DQ51
224
M_B_DQ55
225
M_B_DQ56
237
M_B_DQ61
236
M_B_DQ58
249
M_B_DQ63
250
M_B_DQ60
232
M_B_DQ57
233
M_B_DQ59
245
M_B_DQ62
246
M_B_DQSP0
13
M_B_DQSP1
34
M_B_DQSP4
55
M_B_DQSP5
76
M_B_DQSP2
179
M_B_DQSP3
200
M_B_DQSP6
221
M_B_DQSP7
242
97
M_B_DQSN0
11
M_B_DQSN1
32
M_B_DQSN4
53
M_B_DQSN5
74
M_B_DQSN2
177
M_B_DQSN3
198
M_B_DQSN6
219
M_B_DQSN7
240
95
M_B_DQSP[7:0] 3
M_B_DQSN[7:0] 3
3
2.48A
+1.2VSUS
JDIM2B
111
VDD1
112
VDD2
117
VDD3
118
VDD4
123
VDD5
124
VDD6
129
VDD7
130
VDD8
135
VDD9
136
VDD10
141
VDD11
142
VDD12
147
VDD13
148
VDD14
153
VDD15
154
VDD16
159
VDD17
160
VDD18
163
VDD19
1
VSS1
5
VSS2
9
VSS3
15
VSS4
19
VSS5
23
VSS6
27
VSS7
31
VSS8
35
VSS9
39
VSS10
43
VSS11
47
VSS12
51
VSS13
57
VSS14
61
VSS15
65
VSS16
69
VSS17
73
VSS18
77
VSS19
81
VSS20
85
VSS21
89
VSS22
93
VSS23
99
VSS24
103
VSS25
107
VSS26
167
VSS27
171
VSS28
175
VSS29
181
VSS30
185
VSS31
189
VSS32
193
VSS33
197
VSS34
201
VSS35
205
VSS36
209
VSS37
213
VSS38
217
VSS39
223
VSS40
227
VSS41
231
VSS42
235
VSS43
239
VSS44
243
VSS45
247
VSS46
251
VSS47
DDR4-DIMM0_H=4_RVS
2
+3V 2,4,10,11,12,13,14,15,16,19,23,24,25,28,30,31,33,34,35,40,50,54,55
+2.5VSUS 16,47
DDR_VTT 16,47
+1.2VSUS 3,6,16,24,47,49,57,59
255
VDDSPD
257
VPP1
259
VPP2
258
VTT
164
VREF_CA
2
VSS48
6
VSS49
10
VSS50
14
VSS51
18
VSS52
22
VSS53
26
VSS54
30
VSS55
36
VSS56
40
VSS57
44
VSS58
48
VSS59
52
VSS60
56
VSS61
60
VSS62
64
VSS63
68
VSS64
72
VSS65
78
VSS66
82
VSS67
86
VSS68
90
(260P)
DDR4 SODIMM 260 PIN
VSS69
94
VSS70
98
VSS71
102
VSS72
106
VSS73
168
VSS74
172
VSS75
176
VSS76
180
VSS77
184
VSS78
188
VSS79
192
VSS80
196
VSS81
202
VSS82
206
VSS83
210
VSS84
214
VSS85
218
VSS86
222
VSS87
226
VSS88
230
VSS89
234
VSS90
238
VSS91
244
VSS92
248
VSS93
252
VSS94
261
GND
262
GND
+3V
+2.5VSUS
DDR_VTT
R567 0_6
SMDDR_VREF_DQ1_M1SMDDR_VREF_DQ1
Place these Caps near So-Dimm1.
1uF/10uF 4pcs on each side of connector
+1.2VSUS
C326 1U/6.3V_4
C348 1U/6.3V_4
C323 1U/6.3V_4
C350 1U/6.3V_4
C356 1U/6.3V_4
C341 1U/6.3V_4
C352 1U/6.3V_4
C322 1U/6.3V_4
C613 10U/6.3V_6
C607 10U/6.3V_6
C614 10U/6.3V_6
C606 10U/6.3V_6
C615 10U/6.3V_6
C608 10U/6.3V_6
C617 10U/6.3V_6
C616 10U/6.3V_6
DDR_VTT
C359 1U/6.3V_4
C347 1U/6.3V_4
C358 1U/6.3V_4
C357 1U/6.3V_4
C586 10U/6.3V_6
+3V
C345 0.1U/16V_4
C638 2.2U/10V_6
+2.5VSUS
C321 *0.1U/16V_4
C627 *2.2U/6.3V_6
SMDDR_VREF_DQ1_M1
C353 *0.1U/16V_4
C623 *2.2U/6.3V_6
For RF RESERVE For RF RESERVE
+1.2VSUSDDR_VTT
EC42 82P/50V_4
EC43 2200P/50V_4
+1.2VSUS
EC46 2.2U/10V_4
EC29 82P/50V_4
1
17
VREF DQ1 M1 Solution
+3V
R245
*0_4
R246
A A
0_4
R244
0_4
R243
*0_4
SPD ADDRESS FOR CHANNEL-1 :
WRITE ADDRESS: 0XA4
READ ADDRESS: 0XA3
SA0 = 0; SA1 = 1; SA2 = 0.
DDR4 POR OPERATING SPEED: 1867 MT/S
R239
STRETCH GOAL IS 2133 MT/S
*0_4
CHB_SA2CHB_SA0 CHB_SA1
R238
0_4
R240
1K/F_4
SMDDR_VREF_DQ1_M1
R241
1K/F_4
C605
0.022U/25V_4
2 1
R566 2/F_6
R568 24.9/F_4
SMDDR_VREF_DQ1_M33
5
4
I'm from VIETNAM sualaptop365
PROJECT : Damon
PROJECT : Damon
PROJECT : Damon
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
DDR3 DIMM1-RVS(4.0H)
DDR3 DIMM1-RVS(4.0H)
BU5/HW
BU5/HW
3
2
BU5/HW
DDR3 DIMM1-RVS(4.0H)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
17 59Tuesday, July 19, 2016
17 59Tuesday, July 19, 2016
17 59Tuesday, July 19, 2016
1A
1A
1A
1
2
3
4
5
6
7
8
+1.05V_GFX
A A
Near GPU
C463 22U/6.3V_6
C117 *22U/6.3VS_6
C492 10U/6.3V_6
C116 *10U/6.3VS_6
C485 *4.7U/6.3V_6
C178 1U/6.3V_4 R92 10K/F_4
C176 *1U/6.3V_4
Under GPU
PEX_IOVDD + PEX_IOVDDQ = 1.042A
+1.05V_GFX
PEX_PLL_HVDD +
PEX_SVDD_3V3 = 143mA
B B
C C
0611
Change R433 to short pad
+1.05V_GFX
VGPU_CORE_SENSE55
R87 *0_6/S
Near GPU
D D
Under GPU
1
C118 *22U/6.3VS_6
C121 *22U/6.3VS_6
C120 *10U/6.3VS_6
C119 *10U/6.3VS_6
C475 4.7U/6.3V_6
Near GPU
Under GPU
C181 *1U/6.3V_4
C177 *1U/6.3V_4
C290 0.1U/10V_4
C187 4.7U/6.3V_6
C218 4.7U/6.3V_6
Near GPU
VSS_GPU_SENSE55
PEX_TSTCLK
R124*200/F_4
PEX_TSTCLK#
CX300T30001 Change to 0ohm
PEX_PLLVDD
C1324.7U/6.3V_6
C1801U/6.3V_4
C1790.1U/10V_4
PEX_PLLVDD = 130mA
10K/F_4
R94
R952.49K/F_4
+3V_AON
TESTMODE
PEX_TERMP
AA22
AB23
AC24
AD25
AE26
AE27
AA10
AA12
AA13
AA16
AA18
AA19
AA20
AA21
AB22
AC23
AD24
AE25
AF26
AF27
AF22
AE22
AA14
AA15
AF25
AA8
AA9
AB8
AD9
F2
F1
2
U17A
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_PLL_HVDD
PEX_PLL_HVDD
PEX_SVDD_3V3
VDD_SENSE
GND_SENSE
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT
PEX_PLLVDD
PEX_PLLVDD
TESTMODE
PEX_TERMP
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
1/14 PCI_EXPRESS
PEX_WAKE
PEX_RST
PEX_CLKREQ
PEX_REFCLK
PEX_REFCLK
PEX_TX0
PEX_TX0
PEX_RX0
PEX_RX0
PEX_TX1
PEX_TX1
PEX_RX1
PEX_RX1
PEX_TX2
PEX_TX2
PEX_RX2
PEX_RX2
PEX_TX3
PEX_TX3
PEX_RX3
PEX_RX3
PEX_TX4
PEX_TX4
PEX_RX4
PEX_RX4
PEX_TX5
PEX_TX5
PEX_RX5
PEX_RX5
PEX_TX6
PEX_TX6
PEX_RX6
PEX_RX6
PEX_TX7
PEX_TX7
PEX_RX7
PEX_RX7
PEX_TX8
PEX_TX8
PEX_RX8
PEX_RX8
PEX_TX9
PEX_TX9
PEX_RX9
PEX_RX9
PEX_TX10
PEX_TX10
PEX_RX10
PEX_RX10
PEX_TX11
PEX_TX11
PEX_RX11
PEX_RX11
PEX_TX12
PEX_TX12
PEX_RX12
PEX_RX12
PEX_TX13
PEX_TX13
PEX_RX13
PEX_RX13
PEX_TX14
PEX_TX14
PEX_RX14
PEX_RX14
PEX_TX15
PEX_TX15
PEX_RX15
PEX_RX15
GF119GF117
COMMONbga595-nvidia-n13p-gv2-s-a2
3
AB6
AC7
AC6
AE8
AD8
AC9
AB9
AG6
AG7
AB10
AC10
AF7
AE7
AD11
AC11
AE9
AF9
AC12
AB12
AG9
AG10
AB13
AC13
AF10
AE10
AD14
AC14
AE12
AF12
AC15
AB15
AG12
AG13
AB16
AC16
AF13
AE13
AD17
AC17
AE15
AF15
AC18
AB18
AG15
AG16
AB19
AC19
AF16
AE16
AD20
AC20
AE18
AF18
AC21
AB21
AG18
AG19
AD23
AE23
AF19
AE19
AF24
AE24
AE21
AF21
AG24
AG25
AG21
AG22
VGA_RST#
PEX_CLKREQ#
PEG_RXP1_C
PEG_RXN1_C
PEG_RXP2_C
PEG_RXN2_C
PEG_RXP3_C
PEG_RXN3_C
PEG_RXP4_C
PEG_RXN4_C
C135 *0.1U/10V_4
R78 *0_4/S
C161 0.22U/10V_4
C163 0.22U/10V_4
C78 0.22U/10V_4
C112 0.22U/10V_4
C113 0.22U/10V_4
C137 0.22U/10V_4
C136 0.22U/10V_4
PLTRST#4,28,30,32,34,35,37,40
DGPU_HOLD_RST#12
PEGX_RST# 21
+3V_AON
CLK_VGA_P 13
CLK_VGA_N 13
PEG_RXP1 12
PEG_RXN1 12
PEG_TXP1 12
PEG_TXN1 12
PEG_RXP2 12
PEG_RXN2 12
PEG_TXP2 12
PEG_TXN2 12
PEG_RXP3 12
PEG_RXN3 12
PEG_TXP3 12
PEG_TXN3 12
PEG_RXP4 12
PEG_RXN4 12
PEG_TXP4 12
PEG_TXN4 12
R93 10K_4
SYS_PEX_RST_MON#
GPU_PEX_RST_HOLD#
0611
Change R196, R155 to short pad
MC74VHC1G08DFT2G
1230 Change C395,
C370, C386, C349,
C403 size to 0402
2
1
+3V_AON
2
1
3 5
GPU_PEX_RST_HOLD#21
PEX_CLKREQ#
4
2
0602 Change
4.7uf to 47uf
1230 Change C338
size to 0603
R90 10K_4
3
D19
BAT54A-7-F
C102
0.1U/10V_4U3
4
R42 *0_4/S
R48 *0_4
GPU_PEX_RST_HOLD#
+3V_GFX
R62
4.7K_4
CLKREQ_C1
Q9
DRC5144E0L
1 3
5
NVDD = 32.22 ~ 26.66 A
Under GPU
C239 1U/6.3V_4
C283 1U/6.3V_4
C288 1U/6.3V_4
C223 1U/6.3V_4
C237 47U/6.3V_6
C241 47U/6.3V_6
C210 47U/6.3V_6
C220 47U/6.3V_6
C279 47U/6.3V_6
C281 47U/6.3V_6
C202 47U/6.3V_6
C212 47U/6.3V_6
C213 47U/6.3V_6C79 0.22U/10V_4
C403
*330u_2.5V_3528
C411 22U/6.3V_6
C453 47U/6.3VS_8
C446 4.7U/6.3V_6
C436 4.7U/6.3V_6
C456 4.7U/6.3V_6
C426 4.7U/6.3V_6
C401 4.7U/6.3V_6
Near GPU
+3V_AON
PEGX_RST#
SYS_PEX_RST_MON# 21
+3V_AON
U4
*MC74VHC1G08DFT2G
2
SYS_PEX_RST_MON#
1
2
Q8
DRC5144E0L
1 3
+VGACORE
12
+
C105
*0.1U/10V_4
4
3 5
PCIE_CLKREQ_VGA# 13
K10
K12
K14
K16
K18
L11
L13
L15
L17
M10
M12
M14
M16
M18
N11
N13
N15
N17
P10
P12
P14
P16
P18
R11
R13
R15
R17
T10
T12
T14
T16
T18
U11
U13
U15
U17
V10
V12
V14
V16
V18
PEGX_RST#
R47
*100K/F_4
6
U17E
11/14 NVVDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
bga595-nvidia-n13p-gv2-s-a2
COMMON
ALL 3.3V
+3VGFX & +3V3_AON
+VGACORE
PEX_VDD
+1.05V_GFX
FBVDDQ
+1.35V_GFX
U17C
14/14 XVDD/VDD33
AD10
NC
AD7
NC
B19
NC
3V3AUX_NC
F11
V5
FERMI_RSVD1_NC
V6
FERMI_RSVD2_NC
CONFIGURABLE
POWER CHANNELS
* nc on substrate
G1
XPWR_G1
G2
XPWR_G2
G3
XPWR_G3
G4
XPWR_G4
G5
XPWR_G5
G6
XPWR_G6
G7
XPWR_G7
V1
XPWR_V1
V2
XPWR_V2
W1
XPWR_W1
W2
XPWR_W2
W3
XPWR_W3
W4
XPWR_W4
bga595-nvidia-n13p-gv2-s-a2 COMMON
t>0NVVDD
t>=0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
18
VDD33 = 56mA
G10
VDD33
G12
VDD33
VDD33
G8
VDD33
G9
t>=0
PROJECT : X1BD
PROJECT : X1BD
PROJECT : X1BD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
<Doc>
<Doc>
<Doc>
+3V_AON
C185 0.1U/10V_4C277 47U/6.3V_6
C296 4.7U/6.3V_6
C289 1U/6.3V_4
+3V_GFX
C57 4.7U/6.3V_6
C286 1U/6.3V_4
C287 0.1U/10V_4
C30 0.1U/10V_4
Under GPU
Power up
sequence
Power down
sequence
18 59Tuesday, July 19, 2016
18 59Tuesday, July 19, 2016
18 59Tuesday, July 19, 2016
8
Under GPU
Near GPU
2A
2A
2A
I'm from VIETNAM sualaptop365
Loading...