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www.schematic-x.blogspot.com
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X1F INTEL SYSTEM DIAGRAM
+3V/+5V S5
PG.29
+1.0V
A A
CPU Core
DDR3L
Charge
B B
PG.31
PG.33~34
PG.30
PG.28
SODIMM1
ax. 8GB
M
STD
PG.17
SODIMM2
Max. 8GB
STD
PG.18
HDD
ODD
PCI-E x 1
LANE7 LANE6
LAN
RTL8111GSH
10/100/1000
C C
Accelerometer
PG.24
SMBUS
WLAN
BT COMBO
PCI-E x 1
Card Reader
RTS5237
KBC
ITE IT8987E/BX
LPC Interface
TPM
PAGE 24SLB9656TT1.2
SLG3NB3454
L
D D
GreenCLK
25MHz
TP KB
PG.23 PG.23 PG.23 PG.12
PAGE 24
G.26
P
PG.26
LANE5
PG.27
FAN ROM
1600MT/s
DDR3 L
Channel A
1600MT/s
DDR3 L
C
hannel B
SATA4 6GB/s
SATA0 3GB/s
PG.26 PG.22
PG.22
LPC
USB 2.0
PORT7
INTEL
SkyLake-H
Processor : Daul / Quad Core
Power : 45 (Watt)
Package : BGA1400
Size : 42 x 28 (mm)
PG.2~8
FDI
DMI
INTEL PCH
Lynx Point
Power : Watt
Package : FCBGA837
Size : 23 x 23 (mm)
PG.9~15
Azalia
AUDIO
CODEC
ALC 3241
Speaker
PAGE 21
DDI (5.4Gb/s)
USB 3.0
PORT1,2
USB 2.0
PG.21
Dual Digital MIC
PAGE 21
27MHz
PAGE 21
eDP
DDI1
USB3.0 Ports
combo
Headphone amplifier
TPA6133A2
X2+X1
PG.22; PG25
PORT0,1,2
03
PAGE 22 Combo Jack
RTD 2136 S/R
DP to LVDS Converter
PS8201A
HDMI Re-Driver
PAGE 19
PAGE 20
Webcam
Hp
MIC
PAGE 21
LVDS Interface eDP (5.4Gb/s)
HDMI Interface
PG.20
PORT3
PG.20
PG.20
LVDS
HDMI
Touch Screen
Elan EKTH3915 for 14",15"
Elan EKTH3918 for 17"
01
Stackup
TOP
GND
IN1
IN2
VCC
BOT
PORT8
PG.24
1
2
PROJECT : X1F
PROJECT : X1F
PROJECT : X1F
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
3
4
5
6
7
Date: Sheet of
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
8
1A
1A
1A
1 37 Friday, June 05, 2015
1 37 Friday, June 05, 2015
1 37 Friday, June 05, 2015
5
4
3
2
1
Host CLK:
T
race length < 11000 MILS
Trace spacing = 15 ,20 MILS, Impendence 85 ohm
CLK_CPU_BCLKP 11
H
PECI Ra,Ca need placement close to PCH.
D D
PCH_PECI 11
EC_PECI 28
Ra
R357 13/F_4
C514 *47P/50V_4
H_PECI (50ohm)
T
race Length: <0.5 iches
EC_PECI
CLK_CPU_BCLKN 11
CPU_PCI_BCLKP 11
CPU_PCI_BCLKN 11
CLK_DPLL_NSCCLKP 11
CLK_DPLL_NSCCLKN 11
Ca
PROCHOT# (50ohm)
Trace Length <11 inches
H_PROCHOT# 28,29,34
C517
Cb
CPU RESET#
CPU_PLTRST#R 11
PLTRST# 12,16,22,24,27,28
+VCCSTPLL
C C
CPU_PLTRST# (50ohm)
Trace Length: 10~17 inches
R110
*10K_4
PROC_SELECT#
R527
*0_4
THERMTRIP# (50ohm)
Trace Length: 1.1~12 inches
R353 *1.5K/F_4
R354 *750/F_4
PM_THRMTRIP# 5,11,28
+VCCSTPLL
Rb need placment near PCH
R47 1K_4
H_PM_DOWN 11
R365 499/F_4
Cb need placment near VR
*47P/50V_4
PM_SYNC (50ohm)
Trace Length: 1~11.25 inches
PROCPWRGD 10
PM_THRMTRIP#
SKTOCC_N_R 13
Rb
+VCCSTPLL
H_PROCHOT#_R
DDR_VTT_CNTL 18
PROCPWRGD (50ohm)
Trace Length: 1~11.25 inches
R361 *10K_4
PM_SYNC 11
R366 *10K_4
R53 20/F_4
SKYLAKE Processor (CLK,MISC,JTAG)
SKYLAKE_HALO
U14E
CPU_PCI_BCLKP
CPU_PCI_BCLKN
CLK_DPLL_NSCCLKP
CLK_DPLL_NSCCLKN
H_CPU_SVIDALRT#
VR_SVID_CLK_R
H_CPU_SVIDDAT
DDR_VTT_CNTL
H_VCCST_PWRGD
PROCPWRGD
H_PM_DOWN_R
EC_PECI
R358 0_4
H_PM_DOWN_R
CLK_CPU_BCLKP
CLK_CPU_BCLKN
SKTOCC_N SKTOCC_N_R
PROC_SELECT#
CATERR#
D35
C36
D31
BH31
BH32
BH29
BR30
BT13
H13
BT31
BP35
BM34
BP31
BT34
BR33
BN1
BM30
B31
A32
E31
J31
BCLKP
BCLKN
PCI_BCLKP
PCI_BCLKN
CLK24P
CLK24N
VIDALERT#
VIDSCK
VIDSOUT
PROCHOT#
DDR_VTT_CNTL
VCCST_PWRGD
PROCPWRGD
RESET#
PM_SYNC
PM_DOWN
PECI
THERMTRIP#
SKTOCC#
PROC_SELECT#
CATERR#
*S
KL_H_BGA_BGA
BGA1440
5 OF 14
PROC_TRST#
PROC_PREQ#
PROC_PRDY#
CFG_RCOMP
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[17]
CFG[16]
CFG[19]
CFG[18]
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
PROC_TDO
PROC_TDI
PROC_TMS
PROC_TCK
BN25
BN27
BN26
BN28
BR20
BM20
BT20
BP20
BR23
BR22
BT23
BT22
BM19
BR19
BP19
BT19
BN23
CFG16
BP23
CFG17
BP22
CFG18
BN22
CFG19
BR27
BT27
BM31
BT30
BT28
BL32
BP28
BR28
BP30
BL30
BP27
BT25
Design Note(CFG_RCOMP):
a
EFENSIVE DESIGN 50-OHM FOR R40PR (SV REQ)
D
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
XDP_BPM0
XDP_BPM1
XDP_BPM2
XDP_BPM3
XDP_TDO_CPU
XDP_TDI_CPU
XDP_TMS_CPU
XDP_TRST#_CPU
XDP_TRST#
XDP_PREQ#
XDP_PRDY#
CFG_RCOMP
CFG0 16
CFG1 16
CFG2 8,16
CFG3 8,16
CFG4 8,16
CFG5 8,16
CFG6 8,16
CFG7 16
CFG8 16
CFG9 16
CFG10 8,16
CFG11 16
CFG12 8,16
CFG13 8,16
CFG14 16
CFG15 16
CFG16 16
CFG17 16
CFG18 16
CFG19 16
XDP_BPM0 16
XDP_BPM1 16
TP2
TP38
XDP_TDO_CPU 16
XDP_TDI_CPU 16
XDP_TMS_CPU 16
XDP_TRST#_CPU 16
XDP_TRST# 15,16
XDP_PREQ# 15,16
XDP_PRDY# 15,16
R379 49.9/F_4
CPU XDP
02
Processor pull-up (CPU)
H_PROCHOT#
XDP_TDO_CPU
XDP_TMS_CPU
XDP_TDI_CPU
XDP_PREQ#
XDP_TRST#_CPU
XDP_TRST#
R364 1K_4
R373 51_4
R370 *51_4
R360 *51_4
R367 *51_4
R371 51_4
R54 51_4
+1.0V
+1.0V
Change R110 from NI 100K to NI 10K and add R527 0ohm PD_20150128
+1.0V
CPU CORE SVID HW
Layout note: need routing together and ALERT need between CLK and DATA.
B B
CLOSE TO CPU
PLACE THE PU RESISTORS
H_CPU_SVIDALRT#
PLACE THE PU RESISTORS
LOSE TO VR
C
PULL UP IS IN THE VR MODULE
VR_SVID_CLK_R
CLOSE TO CPU
PLACE THE PU RESISTORS
A A
H_CPU_SVIDDAT
R60 220/F_4
R56 0_4
5
+VCCSTPLL
+VCCSTPLL
R55
*54.9/F_4
+VCCSTPLL
R59
56.2/F_4
C159
*0.1U/10V_4
R64
100/F_4
R65 0_4
SVID ALERT
VR_SVID_ALERT# 34
SVID CLK
VR_SVID_CLK 34
SVID DATA
VR_SVID_DATA 34
4
PD
R10479 close to CPU side
H_
VCCST_PWRGD trace 0.3" - 1.5"
D1 RB501V-40
HWPG 10,16,28,30,31,32
2 1
3
+VCCSTPLL
R63
1K_4
H_VCCST_PWRGD_R H_VCCST_PWRGD
C160
*10P/50V_4
R62
*1K_4
R61 60.4_4
2
CPU VDDQ
+1.35VSUS
Placement close to CPU.
C236 0.1U/10V_4
C233 *0.1U/10V_4
Note: please keep plane is enough for VDDQ 2.8A
PROJECT : X1F
PROJECT : X1F
PROJECT : X1F
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
02 -- SKYPAKE 1/20(eDP/DDI)
02 -- SKYPAKE 1/20(eDP/DDI)
NB5
NB5
NB5
02 -- SKYPAKE 1/20(eDP/DDI)
Date: Sheet of
Date: Sheet of
Date: Sheet
1
1A
1A
1A
of
2 37 Friday, June 05, 2015
2 37 Friday, June 05, 2015
2 37 Friday, June 05, 2015
5
D D
C C
PEG_RCOMP
T
race length < 400 MILS
Trace width = 12 MILS
Trace spacing = 15 MILS
+VCCIO
DMI_RXP0 9
DMI_RXN0 9
DMI_RXP1 9
DMI_RXN1 9
DMI_RXP2 9
DMI_RXN2 9
DMI_RXP3 9
DMI_RXN3 9
4
SKYLAKE Processor (DMI,PEG,FDI)
E25
D25
E24
F24
E23
D23
E22
F22
E21
D21
E20
F20
E19
D19
E18
F18
D17
E17
F16
E16
D15
E15
F14
E14
D13
E13
F12
E12
D11
E11
F10
E10
R121 24.9/F_4
PEG_COMP
G2
D8
E8
E6
F6
D5
E5
J8
J9
U14C
PEG_RXP[0]
PEG_RXN[0]
PEG_RXP[1]
PEG_RXN[1]
PEG_RXP[2]
PEG_RXN[2]
PEG_RXP[3]
PEG_RXN[3]
PEG_RXP[4]
PEG_RXN[4]
PEG_RXP[5]
PEG_RXN[5]
PEG_RXP[6]
PEG_RXN[6]
PEG_RXP[7]
PEG_RXN[7]
PEG_RXP[8]
PEG_RXN[8]
PEG_RXP[9]
PEG_RXN[9]
PEG_RXP[10]
PEG_RXN[10]
PEG_RXP[11]
PEG_RXN[11]
PEG_RXP[12]
PEG_RXN[12]
PEG_RXP[13]
PEG_RXN[13]
PEG_RXP[14]
PEG_RXN[14]
PEG_RXP[15]
PEG_RXN[15]
PEG_RCOMP
DMI_RXP[0]
DMI_RXN[0]
DMI_RXP[1]
DMI_RXN[1]
DMI_RXP[2]
DMI_RXN[2]
DMI_RXP[3]
DMI_RXN[3]
*S
KL_H_BGA_BGA
SKYLAKE_HALO
BGA1440
3 OF 14
PEG_TXP[0 ]
PEG_TXN[0]
PEG_TXP[1 ]
PEG_TXN[1]
PEG_TXP[2 ]
PEG_TXN[2]
PEG_TXP[3 ]
PEG_TXN[3]
PEG_TXP[4 ]
PEG_TXN[4]
PEG_TXP[5 ]
PEG_TXN[5]
PEG_TXP[6 ]
PEG_TXN[6]
PEG_TXP[7 ]
PEG_TXN[7]
PEG_TXP[8 ]
PEG_TXN[8]
PEG_TXP[9 ]
PEG_TXN[9]
PEG_TXP[1 0]
PEG_TXN[10]
PEG_TXP[1 1]
PEG_TXN[11]
PEG_TXP[1 2]
PEG_TXN[12]
PEG_TXP[1 3]
PEG_TXN[13]
PEG_TXP[1 4]
PEG_TXN[14]
PEG_TXP[1 5]
PEG_TXN[15]
DMI_TXP[0]
DMI_TXN[0]
DMI_TXP[1]
DMI_TXN[1]
DMI_TXP[2]
DMI_TXN[2]
DMI_TXP[3]
DMI_TXN[3]
B25
A25
B24
C24
B23
A23
B22
C22
B21
A21
B20
C20
B19
A19
B18
C18
A17
B17
C16
B16
A15
B15
C14
B14
A13
B13
C12
B12
A11
B11
C10
B10
B8
A8
C6
B6
B5
A5
D4
B4
3
DMI_TXP0 9
DMI_TXN0 9
DMI_TXP1 9
DMI_TXN1 9
DMI_TXP2 9
DMI_TXN2 9
DMI_TXP3 9
DMI_TXN3 9
2
1
03
SKYLAKE_HALO
U14D
*S
KL_H_BGA_BGA
BGA1440
4 OF 14
EDP_TXP[0]
EDP_TXN[0]
EDP_TXP[1]
EDP_TXN[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]
EDP_AUXP
EDP_AUXN
EDP_DISP_UTIL
EDP_RCOMP
PROC_AUDIO_CLK
PROC_AUDIO_SDI
PROC_AUDIO_SDO
D29
INT_EDP_TXP0
E29
INT_EDP_TXN0
F28
INT_EDP_TXP1
E28
INT_EDP_TXN1
B29
A29
B28
C28
C26
B26
A33
EDP_DISP_UTIL
D37
EDP_RCOMP
y
DP & PEG Compensation
eDP_RCOMP
race length < 100 Mils
T
Trace Width 20 Mils Trace Spacing 25 Mils
G27
AUD_AZACP U_SCLK
G25
AUD_AZACP U_SDO_R
G29
AUD_AZACP U_SDI_R
INT_EDP_TXP0 19
INT_EDP_TXN0 19
INT_EDP_TXP1 19
INT_EDP_TXN1 19
INT_eDP_AUXP 19
INT_eDP_AUXN 19
TP37
R356 24.9/F_4
R416 20/F_4
+1.35VSUS 2,6,10,17,18,31,33
+3VS5 10,12,14 ,16,24,2 7,28,30,33,37
+3V 5,9,10,11,1 2,13,14,16,17,18 ,19,20,21,22,23,2 4,25,26,27,28,34 ,37
3
+VCCIO
AUD_AZACP U_SCLK 10
AUD_AZACP U_SDO_R 10
AUD_AZACP U_SDI 10
PROJECT : X1F
PROJECT : X1F
PROJECT : X1F
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Nu mber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
Custom
Custom
Custom
SNB 1/5 (PCIE&DMI&FDI)
SNB 1/5 (PCIE&DMI&FDI)
NB5
NB5
2
NB5
SNB 1/5 (PCIE&DMI&FDI)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
3 37 Friday, June 05, 2015
3 37 Friday, June 05, 2015
3 37 Friday, June 05, 2015
2A
2A
2A
B B
A A
5
IN_D2
IN_D2 20
IN_D2#
IN_D2# 20
IN_D1
IN_D1 20
IN_D1#
IN_D1# 20
IN_D0
IN_D0 20
IN_D0#
IN_D0# 20
IN_CLK
IN_CLK 20
IN_CLK#
IN_CLK# 20
K36
DDI1_TXP[0]
K37
DDI1_TXN[0]
J35
DDI1_TXP[1]
J34
DDI1_TXN[1]
H37
DDI1_TXP[2]
H36
DDI1_TXN[2]
J37
DDI1_TXP[3]
J38
DDI1_TXN[3]
D27
DDI1_AUXP
E27
DDI1_AUXN
H34
DDI2_TXP[0]
H33
DDI2_TXN[0]
F37
DDI2_TXP[1]
G38
DDI2_TXN[1]
F34
DDI2_TXP[2]
F35
DDI2_TXN[2]
E37
DDI2_TXP[3]
E36
DDI2_TXN[3]
F26
DDI2_AUXP
E26
DDI2_AUXN
C34
DDI3_TXP[0]
D34
DDI3_TXN[0]
B36
DDI3_TXP[1]
B34
DDI3_TXN[1]
F33
DDI3_TXP[2]
E33
DDI3_TXN[2]
C33
DDI3_TXP[3]
B33
DDI3_TXN[3]
A27
DDI3_AUXP
B27
DDI3_AUXN
4
5
4
3
2
1
SKYLAKE Processor (DDR3)
D D
C C
B B
M_A_DQ[63:0] 17
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
U14A
BR6
DDR0_DQ[0]
BT6
DDR0_DQ[1]
BP3
DDR0_DQ[2]
BR3
DDR0_DQ[3]
BN5
DDR0_DQ[4]
BP6
DDR0_DQ[5]
BP2
DDR0_DQ[6]
BN3
DDR0_DQ[7]
BL4
DDR0_DQ[8]
BL5
DDR0_DQ[9]
BL2
DDR0_DQ[10]
BM1
DDR0_DQ[11]
BK4
DDR0_DQ[12]
BK5
DDR0_DQ[13]
BK1
DDR0_DQ[14]
BK2
DDR0_DQ[15]
BG4
DDR0_DQ[16]/DDR0_DQ[32]
BG5
DDR0_DQ[17]/DDR0_DQ[33]
BF4
DDR0_DQ[18]/DDR0_DQ[34]
BF5
DDR0_DQ[19]/DDR0_DQ[35]
BG2
DDR0_DQ[20]/DDR0_DQ[36]
BG1
DDR0_DQ[21]/DDR0_DQ[37]
BF1
DDR0_DQ[22]/DDR0_DQ[38]
BF2
DDR0_DQ[23]/DDR0_DQ[39]
BD2
DDR0_DQ[24]/DDR0_DQ[40]
BD1
DDR0_DQ[25]/DDR0_DQ[41]
BC4
DDR0_DQ[26]/DDR0_DQ[42]
BC5
DDR0_DQ[27]/DDR0_DQ[43]
BD5
DDR0_DQ[28]/DDR0_DQ[44]
BD4
DDR0_DQ[29]/DDR0_DQ[45]
BC1
DDR0_DQ[30]/DDR0_DQ[46]
BC2
DDR0_DQ[31]/DDR0_DQ[47]
AB1
DDR0_DQ[32]/DDR1_DQ[0]
AB2
DDR0_DQ[33]/DDR1_DQ[1]
AA4
DDR0_DQ[34]/DDR1_DQ[2]
AA5
DDR0_DQ[35]/DDR1_DQ[3]
AB5
DDR0_DQ[36]/DDR1_DQ[4]
AB4
DDR0_DQ[37]/DDR1_DQ[5]
AA2
DDR0_DQ[38]/DDR1_DQ[6]
AA1
DDR0_DQ[39]/DDR1_DQ[7]
V5
DDR0_DQ[40]/DDR1_DQ[8]
V2
DDR0_DQ[41]/DDR1_DQ[9]
U1
DDR0_DQ[42]/DDR1_DQ[10]
U2
DDR0_DQ[43]/DDR1_DQ[11]
V1
DDR0_DQ[44]/DDR1_DQ[12]
V4
DDR0_DQ[45]/DDR1_DQ[13]
U5
DDR0_DQ[46]/DDR1_DQ[14]
U4
DDR0_DQ[47]/DDR1_DQ[15]
R2
DDR0_DQ[48]/DDR1_DQ[32]
P5
DDR0_DQ[49]/DDR1_DQ[33]
R4
DDR0_DQ[50]/DDR1_DQ[34]
P4
DDR0_DQ[51]/DDR1_DQ[35]
R5
DDR0_DQ[52]/DDR1_DQ[36]
P2
DDR0_DQ[53]/DDR1_DQ[37]
R1
DDR0_DQ[54]/DDR1_DQ[38]
P1
DDR0_DQ[55]/DDR1_DQ[39]
M4
DDR0_DQ[56]/DDR1_DQ[40]
M1
DDR0_DQ[57]/DDR1_DQ[41]
L4
DDR0_DQ[58]/DDR1_DQ[42]
L2
DDR0_DQ[59]/DDR1_DQ[43]
M5
DDR0_DQ[60]/DDR1_DQ[44]
M2
DDR0_DQ[61]/DDR1_DQ[45]
L5
DDR0_DQ[62]/DDR1_DQ[46]
L1
DDR0_DQ[63]/DDR1_DQ[47]
BA2
DDR0_ECC[0]
BA1
DDR0_ECC[1]
AY4
DDR0_ECC[2]
AY5
DDR0_ECC[3]
BA5
DDR0_ECC[4]
BA4
DDR0_ECC[5]
AY1
DDR0_ECC[6]
AY2
DDR0_ECC[7]
DDR CHANNEL A
RSVD_V10 must be grounded
*SK
L_H_BGA_BGA
SKYLAKE_HALO
BGA1440
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]
DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#
DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSN[7]/DDR1_DQSN[5]
DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSP[7]/DDR1_DQSP[5]
1 OF 14
DDR0_CKP[0]
DDR0_CKN[0]
DDR0_CKP[1]
DDR0_CKN[1]
DDR0_CLKP[2]
DDR0_CLKN[2]
DDR0_CLKP[3]
DDR0_CLKN[3]
DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]
DDR0_CS#[0]
DDR0_CS#[1]
DDR0_CS#[2]
DDR0_CS#[3]
DDR0_ODT[0]
DDR0_ODT[1]
DDR0_ODT[2]
DDR0_ODT[3]
DDR0_MA[3]
DDR0_MA[4]
DDR0_PAR
DDR0_ALERT#
DDR0_DQSN[0]
DDR0_DQSN[1]
DDR0_DQSP[0]
DDR0_DQSP[1]
DDR0_DQSP[8]
DDR0_DQSN[8]
AG1
AG2
AK2
AK1
AL3
AK3
AL2
AL1
AT1
AT2
AT3
AT5
AD5
AE2
AD2
AE5
AD3
AE4
AE1
AD4
AH5
AH1
AU1
AH4
AG4
AD1
AH3
AP4
AN4
AP5
AP2
AP1
AP3
AN1
AN3
AT4
AH2
AN2
AU4
AE3
AU2
AU3
AG3
AU5
BR5
BL3
BG3
BD3
AA3
U3
P3
L3
BP5
BK3
BF3
BC3
AB3
V3
R3
M3
AY3
BA3
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
DDR0_PAR
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_B_DQ[63:0] 18
M_A_CLKP0 17
M_A_CLKN0 17
M_A_CLKP1 17
M_A_CLKN1 17
M_A_CKE0 17
M_A_CKE1 17
M_A_CS#0 17
M_A_CS#1 17
M_A_DIM0_ODT0 17
M_A_DIM0_ODT1 17
M_A_BS#0 17
M_A_BS#1 17
M_A_BS#2 17
M_A_RAS# 17
M_A_WE# 17
M_A_CAS# 17
M_A_A[15:0] 17
TP16
M_A_DQSN[7:0] 17
M_A_DQSP[7:0] 17
R118 121/F_4
R120 75/F_4
R119 100/F_4
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
U14B
BT11
DDR1_DQ[0]/DDR0_DQ[16]
BR11
DDR1_DQ[1]/DDR0_DQ[17]
BT8
DDR1_DQ[2]/DDR0_DQ[18]
BR8
DDR1_DQ[3]/DDR0_DQ[19]
BP11
DDR1_DQ[4]/DDR0_DQ[20]
BN11
DDR1_DQ[5]/DDR0_DQ[21]
BP8
DDR1_DQ[6]/DDR0_DQ[22]
BN8
DDR1_DQ[7]/DDR0_DQ[23]
BL12
DDR1_DQ[8]/DDR0_DQ[24]
BL11
DDR1_DQ[9]/DDR0_DQ[25]
BL8
DDR1_DQ[10]/DDR0_DQ[26]
BJ8
DDR1_DQ[11]/DDR0_DQ[27]
BJ11
DDR1_DQ[12]/DDR0_DQ[28]
BJ10
DDR1_DQ[13]/DDR0_DQ[29]
BL7
DDR1_DQ[14]/DDR0_DQ[30]
BJ7
DDR1_DQ[15]/DDR0_DQ[31]
BG11
DDR1_DQ[16]/DDR0_DQ[48]
BG10
DDR1_DQ[17]/DDR0_DQ[49]
BG8
DDR1_DQ[18]/DDR0_DQ[50]
BF8
DDR1_DQ[19]/DDR0_DQ[51]
BF11
DDR1_DQ[20]/DDR0_DQ[52]
BF10
DDR1_DQ[21]/DDR0_DQ[53]
BG7
DDR1_DQ[22]/DDR0_DQ[54]
BF7
DDR1_DQ[23]/DDR0_DQ[55]
BB11
DDR1_DQ[24]/DDR0_DQ[56]
BC11
DDR1_DQ[25]/DDR0_DQ[57]
BB8
DDR1_DQ[26]/DDR0_DQ[58]
BC8
DDR1_DQ[27]/DDR0_DQ[59]
BC10
DDR1_DQ[28]/DDR0_DQ[60]
BB10
DDR1_DQ[29]/DDR0_DQ[61]
BC7
DDR1_DQ[30]/DDR0_DQ[62]
BB7
DDR1_DQ[31]/DDR0_DQ[63]
AA11
DDR1_DQ[32]/DDR1_DQ[16]
AA10
DDR1_DQ[33]/DDR1_DQ[17]
AC11
DDR1_DQ[34]/DDR1_DQ[18]
AC10
DDR1_DQ[35]/DDR1_DQ[19]
AA7
DDR1_DQ[36]/DDR1_DQ[20]
AA8
DDR1_DQ[37]/DDR1_DQ[21]
AC8
DDR1_DQ[38]/DDR1_DQ[22]
AC7
DDR1_DQ[39]/DDR1_DQ[23]
W8
DDR1_DQ[40]/DDR1_DQ[24]
W7
DDR1_DQ[41]/DDR1_DQ[25]
V10
DDR1_DQ[42]/DDR1_DQ[26]
V11
DDR1_DQ[43]/DDR1_DQ[27]
W11
DDR1_DQ[44]/DDR1_DQ[28]
W10
DDR1_DQ[45]/DDR1_DQ[29]
V7
DDR1_DQ[46]/DDR1_DQ[30]
V8
DDR1_DQ[47]/DDR1_DQ[31]
R11
DDR1_DQ[48]
P11
DDR1_DQ[49]
P7
DDR1_DQ[50]
R8
DDR1_DQ[51]
R10
DDR1_DQ[52]
P10
DDR1_DQ[53]
R7
DDR1_DQ[54]
P8
DDR1_DQ[55]
L11
DDR1_DQ[56]
M11
DDR1_DQ[57]
L7
DDR1_DQ[58]
M8
DDR1_DQ[59]
L10
DDR1_DQ[60]
M10
DDR1_DQ[61]
M7
DDR1_DQ[62]
L8
DDR1_DQ[63]
AW11
DDR1_ECC[0]
AY11
DDR1_ECC[1]
AY8
DDR1_ECC[2]
AW8
DDR1_ECC[3]
AY10
DDR1_ECC[4]
AW10
DDR1_ECC[5]
AY7
DDR1_ECC[6]
AW7
DDR1_ECC[7]
G1
DDR_RCOMP[0]
H1
DDR_RCOMP[1]
J2
DDR_RCOMP[2]
*SK
L_H_BGA_BGA
DDR CHANNEL B
SKYLAKE_HALO
BGA1440
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSN[5]/DDR1_DQSN[3]
DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSP[1]/DDR0_DQSP[3]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSP[3]/DDR0_DQSP[7]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSP[5]/DDR1_DQSP[3]
2 OF 14
DDR1_CKP[0]
DDR1_CKN[0]
DDR1_CKP[1]
DDR1_CKN[1]
DDR1_CLKP[2]
DDR1_CLKN[2]
DDR1_CLKP[3]
DDR1_CLKN[3]
DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]
DDR1_CS#[0]
DDR1_CS#[1]
DDR1_CS#[2]
DDR1_CS#[3]
DDR1_ODT[0]
DDR1_ODT[1]
DDR1_ODT[2]
DDR1_ODT[3]
DDR1_MA[3]
DDR1_MA[4]
DDR1_PAR
DDR1_ALERT#
DDR1_DQSN[6]
DDR1_DQSN[7]
DDR1_DQSP[6]
DDR1_DQSP[7]
DDR1_DQSP[8]
DDR1_DQSN[8]
DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ
AM9
AN9
AM7
AM8
AM11
AM10
AJ10
AJ11
AT8
AT10
AT7
AT11
AF11
AE7
AF10
AE10
AF7
AE8
AE9
AE11
AH10
AH11
AF8
AH8
AH9
AR9
AJ9
AK6
AK5
AL5
AL6
AM6
AN7
AN10
AN8
AR11
AH7
AN11
AR10
AF9
AR7
AT9
AJ7
AR8
BP9
BL9
BG9
BC9
AC9
W9
R9
M9
BR9
BJ9
BF9
BB9
AA9
V9
P9
L9
AW9
AY9
BN13
BP13
BR13
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
DDR1_PAR
M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7
M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_BS#0 18
M_B_BS#1 18
M_B_BS#2 18
TP15
SM_VREF
SMDDR_VREF_DQ0_M3
SMDDR_VREF_DQ1_M3
R424 *1K_4
R422 *1K_4
M_B_CLKP0 18
M_B_CLKN0 18
M_B_CLKP1 18
M_B_CLKN1 18
M_B_CKE0 18
M_B_CKE1 18
M_B_CS#0 18
M_B_CS#1 18
M_B_DIM0_ODT0 18
M_B_DIM0_ODT1 18
M_B_RAS# 18
M_B_WE# 18
M_B_CAS# 18
M_B_A[15:0] 18
M_B_DQSN[7:0] 18
M_B_DQSP[7:0] 18
04
SM_VREF 17
SMDDR_VREF_DQ0_M3 17
SMDDR_VREF_DQ1_M3 18
A A
PROJECT : X1F
PROJECT : X1F
PROJECT : X1F
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
SNB 2/5 (DDR3 I/F)
SNB 2/5 (DDR3 I/F)
SNB 2/5 (DDR3 I/F)
1
4 37 Friday, June 05, 2015
4 37 Friday, June 05, 2015
4 37 Friday, June 05, 2015
2A
2A
2A
5
4
3
2
1
SKYLAKE Processor (POWER)
05
Follow SKL H EDS page 133 to 45W(GT4+OPC): +VCCGT=104A/12A (GTx)
Fo
llow SKL H EDS page 133 to 45W(GT2): +VCCGT=55A
D D
C151
22U/6.3V_6
C66
22U/6.3V_6
C70
22U/6.3V_6
C499
C C
B B
A A
22U/6.3V_6
C146
10U/6.3V_6
C87
1U/6.3V_4
C179
1U/6.3V_4
C107
1U/6.3V_4
C56
22U/6.3V_6
C130
22U/6.3V_6
C69
22U/6.3V_6
C501
22U/6.3V_6
C55
10U/6.3V_6
C85
1U/6.3V_4
C163
1U/6.3V_4
C180
1U/6.3V_4
C131
22U/6.3V_6
C50
22U/6.3V_6
C125
22U/6.3V_6
C124
22U/6.3V_6
C145
10U/6.3V_6
C116
1U/6.3V_4
C178
1U/6.3V_4
C89
1U/6.3V_4
C152
22U/6.3V_6
C67
22U/6.3V_6
C504
22U/6.3V_6
C129
22U/6.3V_6
C132
10U/6.3V_6
C165
1U/6.3V_4
C177
1U/6.3V_4
C88
1U/6.3V_4
C154
22U/6.3V_6
C126
22U/6.3V_6
C503
22U/6.3V_6
C53
22U/6.3V_6
C143
10U/6.3V_6
C164
1U/6.3V_4
C115
1U/6.3V_4
C86
1U/6.3V_4
C123
22U/6.3V_6
C68
22U/6.3V_6
C502
22U/6.3V_6
C54
22U/6.3V_6
C144
10U/6.3V_6
C139
47U/6.3VS_8
C96
1U/6.3VS_4
C95
1U/6.3VS_4
C94
1U/6.3VS_4
C153
22U/6.3V_6
C47
22U/6.3V_6
C500
22U/6.3V_6
C49
22U/6.3V_6
C48
10U/6.3V_6
C138
47U/6.3VS_8
C162
1U/6.3V_4
C106
1U/6.3V_4
C97
1U/6.3V_4
+VCCGT
AJ29
AJ30
AJ31
AJ32
AJ33
AJ34
AJ35
AJ36
AK31
AK32
AK33
AK34
AK35
AK36
AK37
AK38
AL13
AL29
AL30
AL31
AL32
AL35
AL36
AL37
AL38
AM13
AM14
AM29
AM30
AM31
AM32
AM33
AM34
AM35
AM36
AN13
AN14
AN31
AN32
AN33
AN34
AN35
AN36
AN37
AN38
AP13
AP14
AP29
AP30
AP31
AP32
AP35
AP36
AP37
AP38
AR29
AR30
AR31
AR32
AR33
AR34
AR35
AR36
AT14
AT31
AT32
AT33
AT34
AT35
AT36
AT37
AT38
AU14
AU29
AU30
AU31
AU32
AU35
AU36
AU37
AU38
U14N
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
*SK
L_H_BGA_BGA
SKYLAKE_HALO
BGA1440
14 OF 14
VCCGT_SENSE
VSSGTX_SENSE
VSSGT_SENSE
VCCGTX_SENSE
4e, Support eDRAM Only, GTX 12A
4+
AF29
VCCGTX
AF30
VCCGTX
AF31
VCCGTX
AF32
VCCGTX
AF33
VCCGTX
AF34
VCCGTX
AG13
VCCGTX
AG14
VCCGTX
AG31
VCCGTX
AG32
VCCGTX
AG33
VCCGTX
AG34
VCCGTX
AG35
VCCGTX
AG36
VCCGTX
AH13
VCCGTX
AH14
VCCGTX
AH29
VCCGTX
AH30
VCCGTX
AH31
VCCGTX
AH32
VCCGTX
AJ13
VCCGTX
AJ14
VCCGTX
AH38
AH35
AH37
AH36
IO Thrm Protect
Thermal pipe reserve for DDR CPU area
+3VPCU
R284
20K/F_4
For 75 degree, 1.2v limit, (HW)
R68
C404
0.1U/10V_4
1 2
100K_4 NTC
VCCGT_SENSE 34
VSSGT_SENSE 34
Local Thermal Sensor
MBCLK2 10,18,19,28
MBDATA2 10,18,19,28
+3V
+1.0V
THRM_MOINTOR1 28
MBCLK2
MBDATA2
CPU_THRMTRIP#
R363 10K/F_4
R350 *4.7K_4
+3VPCU +3VPCU
R288
20K/F_4
For 75 degree, 1.2v limit, (HW) For 75 degree, 1.2v limit, (HW)
THRM_MOINTOR2 28 THRM_MOINTOR3 28
R46
C408
0.1U/10V_4
1 2
100K_4 NTC
8
7
6
4
U13
SCLK
SDA
ALERT#
OVERT#
G781P8
VCC
DXP
DXN
GND
C516 0.01U/25V_4
1
2
3
5
CPU_THERMDA
C515
2200P/50V_4
CPU_THERMDC
AL000781012 G781P8(98h)
VCC Output Decoupling Recommendations
2
Q30
1 3
PM_THRMTRIP# 2,11,28
5
4
3
*METR3904-G
2
CPU_THRMTRIP#
NB5
NB5
NB5
PROJECT : X1F
PROJECT : X1F
PROJECT : X1F
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
+VCC_CORE 7,34,35
+1.35VSUS 2,6,10,17,18,31,33
R259
20K/F_4
R287
C407
0.1U/10V_4
1 2
100K_4 NTC
+3V
2
SNB 3/5 (POWER)
SNB 3/5 (POWER)
SNB 3/5 (POWER)
CPU Thermal Sensor
Q29
METR3904-G
1 3
5 37 Friday, June 05, 2015
5 37 Friday, June 05, 2015
1
5 37 Friday, June 05, 2015
2A
2A
2A
5
4
3
2
1
06
Follow SKL H EDS page 135 to 45W(GT2): VCCSA=11.1A (GTx)
D D
C483
C478
10U/6.3V_6
C75
C479
10U/6.3V_6
10U/6.3V_6
C C
Follow SKL H EDS P136 to 45W: VCCIO
+VCCIO = 0.95V
B B
+VDDQC +VCCSTG +VCCPLL_OC
C227
10U/6.3V_6
+VCCIO
10U/6.3V_6
C476
10U/6.3V_6
C104
1U/6.3V_4
C161
1U/6.3V_4
C93
C477
22U/6.3VS_6
C74
10U/6.3V_6
C105
1U/6.3V_4
C158
22U/6.3VS_6
C174
1U/6.3V_4
C221
1U/6.3V_4
+VCCIO
1U/6.3V_4
C484
22U/6.3VS_6
C76
10U/6.3V_6
C114
1U/6.3V_4
C150
22U/6.3VS_6
C173
10U/6.3V_6
C230
+VCCSA
AG12
J30
K29
K30
K31
K32
K33
K34
K35
L31
L32
L35
L36
L37
L38
M29
M30
M31
M32
M33
M34
M35
M36
G15
G17
G19
G21
H15
H16
H17
H19
H20
H21
H26
H27
J15
J16
J17
J19
J20
J21
J26
J27
SKYLAKE_HALO
U14I
BGA1440
VCCSA
11.1 A 2.8 A
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCIO
5.5 A
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
*SK
L_H_BGA_BGA
C136
1U/6.3V_4
Close CPU Under CPU
C117
1U/6.3V_4
0.26 A
0.12 A
0.145 A
9 OF 14
+VCCPLL +VCCIO
VCCPLL_O C
VCCPLL_O C
VCCSA_SE NSE
VSSSA_S ENSE
VCCIO_SENSE
VSSIO_SENSE
Follow SKL H EDS page 135 45W: VDDQ=2.8A
+1.35VSUS
AA6
VDDQ
AE12
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQC
VCCST
VCCSTG
VCCSTG
VCCPLL
VCCPLL
AF5
AF6
AG5
AG9
AJ12
AL11
AP6
AP7
AR12
AR6
AT12
AW6
AY6
J5
J6
K12
K6
L12
L6
R6
T6
W6
Y12
BH13
G11
H30
H29
G30
H28
J28
M38
M37
H14
J14
C224
C223
22U/6.3VS_6
22U/6.3VS_6
C211
C235
10U/6.3V_6
10U/6.3V_6
C176
C175
10U/6.3V_6
10U/6.3V_6
+VDDQC
+VCCPLL_O C
+VCCSTG
+VCCPLL
VCCSA_SE NSE 34
VSSSA_S ENSE 34
VCCIO_VCCSENSE
VSSIO_VSSSENSE
+VCCSTPLL
C128
1U/6.3V_4
C219
22U/6.3VS_6
C226
10U/6.3V_6
C234
10U/6.3V_6
+VCCIO
C231
22U/6.3VS_6
C216
10U/6.3V_6
C213
10U/6.3V_6
R58
100_4
R57
100_4
C209
10U/6.3V_6
C220
10U/6.3V_6
+VCCPLL_O C +1.35VSUS
+VCCPLL +VCCSTPLL
R48 change to stuff and R49 NI_20150204
+VCCSTG
Add R575 NI for Modern Stand By_20150518
R123 0_6
R125 *0_6
R574 0_6
R50 0_6
R48 0_4
R49 *0_4
R575 *0_4
EDRAM Only, PLACE CAPS IN ACK SIDE
+1.35VSUS +VDDQC
Add R574 NI for Modern Stand By_20150414
+1.35V_V CCPLL_OC
+VCCSTPLL
+1.0V
+VCCIO
R368 49.9/F_4
R381 49.9/F_4
R382 49.9/F_4
TP14
TP11
TP12
TP13
CPU_OPC_COMP
CPU_OPCE_COMP
CPU_OPCE_COMP2
BJ17
BJ19
BJ20
BK17
BK19
BK20
BL16
BL17
BL18
BL19
BL20
BL21
BM17
BN17
BJ23
BJ26
BJ27
BK23
BK26
BK27
BL23
BL24
BL25
BL26
BL27
BL28
BM24
BL15
BM16
BL22
BM22
BP15
BR15
BT15
BP16
BR16
BT16
BN15
BM15
BP17
BN16
BM14
BL14
BJ35
BJ36
AT13
AW13
AU13
AY13
BT29
BR25
BP25
SKYLAKE_HALO
U14J
BGA1440
VCCOPC
8 A
3.
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
VCCOPC_SENSE
VSSOPC_SENSE
RSVD
RSVD
VCCEOPIO
2.8 A
VCCEOPIO
VCCEOPIO
RSVD
RSVD
RSVD
VCCEOPIO_SENSE
VSSEOPIO_SENSE
RSVD
RSVD
VCC_OPC_1P8
VCC_OPC_1P8
RSVD
RSVD
ZVM#
MSM#
ZVM2#
MSM2#
OPC_RCOMP
OPCE_RCOMP
OPCE_RCOMP2
0.05 A
10 OF 14
*SK
L_H_BGA_BGA
C137
C142
*1U/6.3V_ 4
5
*22U/6.3V _6
PROJECT : X1F
PROJECT : X1F
PROJECT : X1F
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Nu mber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
Custom
Custom
Custom
SNB 4/5 (POWER & GND)
SNB 4/5 (POWER & GND)
NB5
NB5
4
3
2
NB5
SNB 4/5 (POWER & GND)
Date: Sheet of
Date: Sheet of
Date: Sheet
1
6 37 Friday, June 05, 2015
6 37 Friday, June 05, 2015
6 37 Friday, June 05, 2015
2A
2A
2A
of
A A
5
4
3
2
1
07
+VCC_CORE
U14G
D D
C71
C147
22U/6.3V_6
22U/6.3V_6
C468
C463
22U/6.3V_6
22U/6.3V_6
C135
C469
22U/6.3V_6
22U/6.3V_6
C C
B B
A A
C485
22U/6.3V_6
C149
10U/6.3V_6
C83
1U/6.3V_4
C155
22U/6.3V_6
C465
10U/6.3V_6
C121
1U/6.3V_4
Follow SKL H EDS page 131 to 45W(GT2): VCC_CORE=68A
C148
22U/6.3V_6
C488
22U/6.3V_6
C496
22U/6.3V_6
C81
22U/6.3V_6
C487
10U/6.3V_6
C103
1U/6.3V_4
C80
22U/6.3V_6
C52
22U/6.3V_6
C466
22U/6.3V_6
C60
22U/6.3V_6
C497
10U/6.3V_6
C102
1U/6.3V_4
C32
22U/6.3V_6
C467
22U/6.3V_6
C133
22U/6.3V_6
C43
22U/6.3V_6
C73
10U/6.3V_6
C45
10U/6.3V_6
C101
1U/6.3V_4
C472
22U/6.3V_6
C470
22U/6.3V_6
C134
22U/6.3V_6
C42
22U/6.3V_6
C72
10U/6.3V_6
C82
10U/6.3V_6
C100
1U/6.3V_4
C127
22U/6.3V_6
C38
22U/6.3V_6
C482
22U/6.3V_6
C44
22U/6.3V_6
C464
10U/6.3V_6
C41
10U/6.3V_6
C98
1U/6.3VS_4
C141
47U/6.3VS_8
C157
22U/6.3V_6
C156
22U/6.3V_6
C471
22U/6.3V_6
C498
22U/6.3V_6
C65
10U/6.3V_6
C486
10U/6.3V_6
C99
1U/6.3V_4
C140
47U/6.3VS_8
SKYLAKE_HALO
BGA1440
AA13
VCC
AA31
VCC
AA32
VCC
AA33
VCC
AA34
VCC
AA35
VCC
AA36
VCC
AA37
VCC
AA38
VCC
AB29
VCC
AB30
VCC
AB31
VCC
AB32
VCC
AB35
VCC
AB36
VCC
AB37
VCC
AB38
VCC
AC13
VCC
AC14
VCC
AC29
VCC
AC30
VCC
AC31
VCC
AC32
VCC
AC33
VCC
AC34
VCC
AC35
VCC
AC36
VCC
AD13
VCC
AD14
VCC
AD31
VCC
AD32
VCC
AD33
VCC
AD34
VCC
AD35
VCC
AD36
VCC
AD37
VCC
AD38
VCC
AE13
VCC
AE14
VCC
AE30
VCC
AE31
VCC
AE32
VCC
AE35
VCC
AE36
VCC
AE37
VCC
AE38
VCC
AF35
VCC
AF36
VCC
AF37
VCC
AF38
VCC
K13
VCC
K14
VCC
L13
VCC
N13
VCC
N14
VCC
N30
VCC
N31
VCC
N32
VCC
N35
VCC
N36
VCC
N37
VCC
N38
VCC
P13
VCC
7 OF 14
*SK
L_H_BGA_BGA
Sense resistor should be placed within 2
ches (50.8 mm) of the processor socket
in
Trace Impendence 50 ohm
+VCC_CORE
V32
VCC
V33
VCC
V34
VCC
V35
VCC
V36
VCC
V37
VCC
V38
VCC
W13
VCC
W14
VCC
W29
VCC
W30
VCC
W31
VCC
W32
VCC
W35
VCC
W36
VCC
W37
VCC
W38
VCC
Y29
VCC
Y30
VCC
Y31
VCC
Y32
VCC
Y33
VCC
Y34
VCC
Y35
VCC
Y36
VCC
L14
VCC
P29
VCC
P30
VCC
P31
VCC
P32
VCC
P33
VCC
P34
VCC
P35
VCC
P36
VCC
R13
VCC
R31
VCC
R32
VCC
R33
VCC
R34
VCC
R35
VCC
R36
VCC
R37
VCC
R38
VCC
T29
VCC
T30
VCC
T31
VCC
T32
VCC
T35
VCC
T36
VCC
T37
VCC
T38
VCC
U29
VCC
U30
VCC
U31
VCC
U32
VCC
U33
VCC
U34
VCC
U35
VCC
U36
VCC
V13
VCC
V14
VCC
V31
VCC
P14
VCC
AG37
VCC_SENSE
AG38
VSS_SENSE
VCC_SENSE VSS_SENSE
VCC_SENSE
VSS_SENSE
C171
0.1U/10V_4
1 2
C112
0.1U/10V_4
1 2
C185
0.1U/10V_4
1 2
R343 *49.9/F_4
C122
0.1U/10V_4
1 2
1 2
C111
0.1U/10V_4
1 2
1 2
C184
0.1U/10V_4
1 2
1 2
R339 *100_4
VCC_SENSE 34
VSS_SENSE 34
R338 *10 0_4
C169
0.1U/10V_4
C110
0.1U/10V_4
C118
0.1U/10V_4
+VCC_CORE
C187
0.1U/10V_4
1 2
C109
0.1U/10V_4
1 2
C91
0.1U/10V_4
1 2
C186
0.1U/10V_4
1 2
C183
0.1U/10V_4
1 2
C170
0.1U/10V_4
1 2
C167
0.1U/10V_4
1 2
C108
0.1U/10V_4
1 2
C120
0.1U/10V_4
1 2
C182
0.1U/10V_4
1 2
C119
0.1U/10V_4
1 2
C181
0.1U/10V_4
1 2
C90
0.1U/10V_4
1 2
C84
0.1U/10V_4
1 2
C168
0.1U/10V_4
1 2
C113
0.1U/10V_4
1 2
C166
0.1U/10V_4
1 2
C172
0.1U/10V_4
1 2
+VCCGT
BG34
BG35
BG36
BH33
BH34
BH35
BH36
BH37
BH38
BL36
BL37
BM36
BM37
BN36
BN37
BN38
BP37
BP38
BR37
BT37
BE38
BF13
BF14
BF29
BF30
BF31
BF32
BF35
BF36
BF37
BF38
BG29
BG30
BG31
BG32
BG33
BC36
BC37
BC38
BD13
BD14
BD29
BD30
BD31
BD32
BD33
BD34
BD35
BD36
BE31
BE32
BE37
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
AV29
AV30
AV31
AV32
AV33
AV34
AV35
AV36
AW14
AW31
AW32
AW33
AW34
AW35
AW36
AW37
AW38
AY29
AY30
AY31
AY32
AY35
AY36
AY37
AY38
BA13
BA14
BA29
BA30
BA31
BA32
BA33
BA34
BA35
BA36
BB13
BB14
BB31
BB32
BB33
BB34
BB35
BB36
BB37
BB38
BC29
BC30
BC31
BC32
BC35
BE33
BE34
BE35
BE36
+VCCGT
+VCC_CORE 34,35
U14H
SKYLAKE_HALO
BGA1440
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
BJ37
VCCGT
BJ38
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
8 OF 14
*SK
L_H_BGA_BGA
PROJECT : X1F
PROJECT : X1F
PROJECT : X1F
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Nu mber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
Custom
Custom
Custom
SNB 4/5 (POWER & GND)
SNB 4/5 (POWER & GND)
NB5
NB5
5
4
3
2
NB5
SNB 4/5 (POWER & GND)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
7 37 Friday, June 05, 2015
7 37 Friday, June 05, 2015
7 37 Friday, June 05, 2015
2A
2A
2A
5
4
3
2
1
Haswell Processor (GND)
BT32
BT26
BT24
BT21
BT18
BT14
BT12
BR36
BR34
BR29
BR26
BR24
BR21
BR18
BR14
BR12
BP34
BP33
BP29
BP26
BP24
BP21
BP18
BP14
BP12
BN34
BN31
BN30
BN29
BN24
BN21
BN20
BN19
BN18
BN14
BN12
BM38
BM35
BM28
BM27
BM26
BM23
BM21
BM13
BM12
BM9
BM6
BM2
BL29
BK29
BK15
BK14
BJ32
BJ31
BJ25
BJ22
BH14
BH12
BH9
BH8
BH5
BH4
BH1
BG38
BG13
BG12
BF33
BF12
BE29
BD9
BC34
BC12
BB12
C17
C13
BT9
BT5
BR7
BP7
BN9
BN7
BN4
BN2
BE6
C9
U14L
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
*SK
SKYLAKE_HALO
BGA1440
L_H_BGA_BGA
12 OF 14
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
C25
C23
C21
C19
C15
C11
C8
C5
BM29
BM25
BM18
BM11
BM8
BM7
BM5
BM3
BL38
BL35
BL13
BL6
BK25
BK22
BK13
BK6
BJ30
BJ29
BJ15
BJ12
BH11
BH10
BH7
BH6
BH3
BH2
BG37
BG14
BG6
BF34
BF6
BE30
BE5
BE4
BE3
BE2
BE1
BD38
BD37
BD12
BD11
BD10
BD8
BD7
BD6
BC33
BC14
BC13
BC6
BB30
BB29
BB6
BB5
C2
BT36
BT35
BT4
BT3
BR38
U14F
SKYLAKE_HALO
BGA1440
Y38
VSS
Y37
VSS
Y14
VSS
Y13
VSS
Y11
VSS
Y10
VSS
Y9
D D
C C
B B
W34
W33
W12
M14
M13
M12
VSS
Y8
VSS
Y7
VSS
VSS
VSS
VSS
W5
VSS
W4
VSS
W3
VSS
W2
VSS
W1
VSS
V30
VSS
V29
VSS
V12
VSS
V6
VSS
U38
VSS
U37
VSS
U6
VSS
T34
VSS
T33
VSS
T14
VSS
T13
VSS
T12
VSS
T11
VSS
T10
VSS
T9
VSS
T8
VSS
T7
VSS
T5
VSS
T4
VSS
T3
VSS
T2
VSS
T1
VSS
R30
VSS
R29
VSS
R12
VSS
P38
VSS
P37
VSS
P12
VSS
P6
VSS
N34
VSS
N33
VSS
N12
VSS
N11
VSS
N10
VSS
N9
VSS
N8
VSS
N7
VSS
N6
VSS
N5
VSS
N4
VSS
N3
VSS
N2
VSS
N1
VSS
VSS
VSS
VSS
M6
VSS
L34
VSS
L33
VSS
L30
VSS
L29
VSS
K38
VSS
K11
VSS
K10
VSS
K9
VSS
K8
VSS
K7
VSS
K5
VSS
K4
VSS
K3
VSS
K2
VSS
*SK
L_H_BGA_BGA
6 OF 14
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NCTFVSS
K1
J36
J33
J32
J25
J22
J18
J10
J7
J4
H35
H32
H25
H22
H18
H12
H11
G28
G26
G24
G23
G22
G20
G18
G16
G14
G12
G10
G9
G8
G6
G5
G4
F36
F31
F29
F27
F25
F23
F21
F19
F17
F15
F13
F11
F9
F8
F5
F4
F3
F2
E38
E35
E34
E9
E4
D33
D30
D28
D26
D24
D22
D20
D18
D16
D14
D12
D10
D9
D6
D3
C37
C31
C29
C27
D38
BA38
BA37
BA12
BA11
BA10
AY34
AY33
AY14
AY12
AW30
AW29
AW12
AW5
AW4
AW3
AW2
AW1
AV38
AV37
AU34
AU33
AU12
AU11
AU10
AT30
AT29
AR38
AR37
AR14
AR13
AP34
AP33
AP12
AP11
AP10
AN30
AN29
AN12
AM38
AM37
AM12
AM5
AM4
AM3
AM2
AM1
AL34
AL33
AL14
AL12
AL10
BB4
BB3
BB2
BB1
BA9
BA8
BA7
BA6
AU9
AU8
AU7
AU6
AT6
AR5
AR4
AR3
AR2
AR1
AP9
AP8
AN6
AN5
AL9
AL8
AL7
AL4
B9
U14M
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
*SK
SKYLAKE_HALO
BGA1440
L_H_BGA_BGA
13 OF 14
AK30
VSS
AK29
VSS
AK4
VSS
AJ38
VSS
AJ37
VSS
AJ6
VSS
AJ5
VSS
AJ4
VSS
AJ3
VSS
AJ2
VSS
AJ1
VSS
AH34
VSS
AH33
VSS
AH12
VSS
AH6
VSS
AG30
VSS
AG29
VSS
AG11
VSS
AG10
VSS
AG8
VSS
AG7
VSS
AG6
VSS
AF14
VSS
AF13
VSS
AF12
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
AF4
AF3
AF2
AF1
AE34
AE33
AE6
AD30
AD29
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AC38
AC37
AC12
AC6
AC5
AC4
AC3
AC2
AC1
AB34
AB33
AB6
AA30
AA29
AA12
A30
A28
A26
A24
A22
A20
A18
A16
A14
A12
A10
A9
A6
B37
B3
A34
A4
A3
PCH_2_CPU_TRIG 15
CFG[3] (PHYSICAL_DEBUG_ENABLED (DFX PRIVACY))
Haswell Processor (RESERVED, CFG)
U14K
BN35
BN33
BL34
AE29
AA14
BR35
BR31
BH30
BR1
BT2
H24
N29
R14
A36
A37
H23
E30
B30
C30
D1
E1
E3
E2
J24
J23
F30
G3
J3
R52 30_4
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
PROC_TRIGIN
PROC_TRIGOUT
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
*SK
L_H_BGA_BGA
TP23
TP24
TP22
TP20
TP42
TP43
CPU_2_PCH_TRIG_R
CPU_2_PCH_TRIG_R CPU_2_PCH_TRIG
SKYLAKE_HALO
BGA1440
11 OF 14
CPU_2_PCH_TRIG 15
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
RSVD
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
NCTF
NCTF
NCTF
NCTF
NCTF
NCTF
VSS
VSS
BM33
BL33
BJ14
BJ13
BK28
BJ28
BJ18
BJ16
BK16
BK24
BJ24
BK21
BJ21
BT17
BR17
BK18
BJ34
BJ33
G13
AJ8
BL31
B2
B38
BP1
BR2
C1
C38
08
TP1
TP4
TP8
TP9
TP40
TP41
TP7
TP6
TP5
TP3
0 Enable; SET DFX ENABLED BIT IN DEBUG
Processor Strapping
The CFG signals have a default value of '1' if not terminated on the board.
1 0
A A
CFG2
(PEG Static Lane Reversal)
CFG4
(DP Presence Strap)
CFG7
(PEG Defer Training)
5
Normal Operation Lane Reversed
Disable; No physical DP attached to eDP
PEG train immediately following
xxRESETB de assertion
4
Enable; An ext DP device is connected to eDP
PEG wait for BIOS training
CFG3 2,16
3
1 , Disable;
CFG3
CFG2 2,16
CFG4 2,16
CFG5 2,16
CFG6 2,16
CFG10 2,16
CFG12 2,16
CFG13 2,16
R374 *1K_4
CFG2
R377 *1K_4
CFG4
R398 1K_4
CFG5
R408 *1K_4
CFG6
R397 *1K_4
CFG10
R383 *1K_4
CFG12
R409 *1K_4
CFG13
R417 *1K_4
PROJECT : X1F
PROJECT : X1F
PROJECT : X1F
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
SNB 5/5 (GND)
SNB 5/5 (GND)
SNB 5/5 (GND)
1
8 37 Friday, June 05, 2015
8 37 Friday, June 05, 2015
8 37 Friday, June 05, 2015
2A
2A
2A
5
4
3
2
1
U15B
DMI_TXN0 3
DMI_TXP0 3
DMI_RXN0 3
DMI_RXP0 3
DMI_TXN1 3
DMI_TXP1 3
DMI_RXN1 3
DMI_RXP1 3
D D
PCIE_RXN5_CARD 22
PCIE_RXP5_CARD 22
C C
Cardreader
WLAN
N (DB)
LA
PCIE_TXN5_CARD 22
PCIE_TXP5_CARD 22
PCIE_RXN6_WLAN 27
PCIE_RXP6_WLAN 27
PCIE_TXN6_WLAN 27
PCIE_TXP6_WLAN 27
PCIE_RXN9_LAN 22
PCIE_RXP9_LAN 22
PCIE_TXN9_LAN 22
PCIE_TXP9_LAN 22
DMI_TXN2 3
DMI_TXP2 3
DMI_RXN2 3
DMI_RXP2 3
DMI_TXN3 3
DMI_TXP3 3
DMI_RXN3 3
DMI_RXP3 3
R434 100/F_4
C533 0.1U/10V_4
C534 0.1U/10V_4
C535 0.1U/10V_4
C536 0.1U/10V_4
C538 0.1U/10V_4
C537 0.1U/10V_4
PCIECOMP_N
PCIECOMP_P
PCIE_TXN5_CARD_C
PCIE_TXP5_CARD_C
PCIE_TXN6_WLAN_C
PCIE_TXP6_WLAN_C
PCIE_TXN9_LAN_C
PCIE_TXP9_LAN_C
L27
DMI_RXN0
N27
DMI_RXP0
C27
DMI_TXN0
B27
DMI_TXP0
E24
DMI_RXN1
G24
DMI_RXP1
B28
DMI_TXN1
A28
DMI_TXP1
G27
DMI_RXN2
E26
DMI_RXP2
B29
DMI_TXN2
C29
DMI_TXP2
L29
DMI_RXN3
K29
DMI_RXP3
B30
DMI_TXN3
A30
DMI_TXP3
B18
PCIE_RCOMPN
C17
PCIE_RCOMPP
H15
PCIE1_RXN/USB3_7_RXN
G15
PCIE1_RXP/USB3_7_RXP
A16
PCIE1_TXN/USB3_7_TXN
B16
PCIE1_TXP/USB3_7_TXP
B19
PCIE2_TXN/USB3_8_TXN
C19
PCIE2_TXP/USB3_8_TXP
E17
PCIE2_RXN/USB3_8_RXN
G17
PCIE2_RXP/USB3_8_RXP
L17
PCIE3_RXN/USB3_9_RXN
K17
PCIE3_RXP/USB3_9_RXP
B20
PCIE3_TXN/USB3_9_TXN
C20
PCIE3_TXP/USB3_9_TXP
E20
PCIE4_RXN/USB3_10_RXN
G19
PCIE4_RXP/USB3_10_RXP
B21
PCIE4_TXN/USB3_10_TXN
A21
PCIE4_TXP/USB3_10_TXP
K19
PCIE5_RXN
L19
PCIE5_RXP
D22
PCIE5_TXN
C22
PCIE5_TXP
G22
PCIE6_RXN
E22
PCIE6_RXP
B22
PCIE6_TXN
A23
PCIE6_TXP
L22
PCIE7_RXN
K22
PCIE7_RXP
C23
PCIE7_TXN
B23
PCIE7_TXP
K24
PCIE8_RXN
L24
PCIE8_RXP
C24
PCIE8_TXN
B24
PCIE8_TXP
SPT
_PCH_H
SPT-H_PCH
DMI
PCIe/USB 3
USB 2.0
GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#
GPP_F15/USB2_OCB_4
GPP_F16/USB2_OCB_5
GPP_F17/USB2_OCB_6
GPP_F18/USB2_OCB_7
2 OF 12
USB2N_1
USB2P_1
USB2N_2
USB2P_2
USB2N_3
USB2P_3
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
USB2N_7
USB2P_7
USB2N_8
USB2P_8
USB2N_9
USB2P_9
USB2N_10
USB2P_10
USB2N_11
USB2P_11
USB2N_12
USB2P_12
USB2N_13
USB2P_13
USB2N_14
USB2P_14
USB2_COMP
USB2_VBUSSENSE
RSVD_AB13
USB2_ID
GPD7/RSVD
AF5
AG7
AD5
AD7
AG8
AG10
AE1
AE2
AC2
AC3
AF2
AF3
AB3
AB2
AL8
AL7
AA1
AA2
AJ8
AJ7
W2
W3
AD3
AD2
V2
V1
AJ11
AJ13
AD43
DGPU_HOLD_RST#
AD42
GPU_EVENT#
AD39
DGPU_PWR_EN
AC44
DGPU_PWROK
Y43
USB_OC4#
Y41
USB_OC5#
W44
USB_OC6#
W43
PCH_AOCS#
AG3
USB2_COMP
AD10
AB13
AG2
BD14
DGPU_HOLD_RST# 12
GPU_EVENT# 12
DGPU_PWR_EN 12
DGPU_PWROK 12
R414 113/F_4
USBP1- 25
USBP1+ 25
USBP2- 22
USBP2+ 22
USBP3- 20
USBP3+ 20
USBP6- 22
USBP6+ 22
USBP7- 27
USBP7+ 27
USBP8- 24
USBP8+ 24
Combo USB3.0 MB-1
USB2.0
Combo USB3.0 Small Board
USB2.0
Camera
Combo USB3.0 Small Board
WLAN
Touch Screen
DGPU_HOLD_RST#
DGPU_PWR_EN
DGPU_PWROK
SIO_EXT_SMI#
EC_RCIN#
USB_OC4#
USB_OC5#
USB_OC6#
PCH_AOCS#
GFX Present
R493 100K/F_4 R504 *10K_4
GPU_EVENT#
Stuff
NC
SG
Ra
Rb
Ra Rb
UMA
Rb
Ra
R506 10K_4
R489 10K_4
R503 10K_4
R497 10K_4
R113 10K_4
+3V_DEEP_SUS
R501 10K_4
R498 10K_4
R499 10K_4
R500 10K_4
09
+3V
+3V
USB
SPT-H_PCH
6 OF 12
LPC/eSPI
GPP_A5/LFRAME#/ESPI_CS0#
GPP_A6/SERIRQ/ESPI_CS1#
GPP_A7/PIRQA#/ESPI_ALERT0#
GPP_A0/RCIN#/ESPI_ALERT1#
GPP_A14/SUS_STAT#/ESPI_RESET#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
GPP_A10/CLKOUT_LPC1
SATA
GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3
GPP_G19/SMI#
GPP_G18/NMI#
GPP_E6/DEVSLP2
GPP_E5/DEVSLP1
GPP_E4/DEVSLP0
GPP_F9/DEVSLP7
GPP_F8/DEVSLP6
GPP_F7/DEVSLP5
GPP_F6/DEVSLP4
GPP_F5/DEVSLP3
3
AT22
AV22
AT19
BD16
BE16
BA17
AW17
AT17
BC18
BC17
CLK_PCI_EC_R
AV19
CLK_PCI_LPC_R
M45
N43
AE45
AG43
AG42
AB39
AB36
AB43
AB42
AB41
SERIRQ
BOARD_ID8
BOARD_ID7
LAD0 24,27,28
LAD1 24,27,28
LAD2 24,27,28
LAD3 24,27,28
LFRAME# 24,27,28
R131 8.2K_4
BOARD_ID8 13
BOARD_ID7 13
SIO_EXT_SMI# 28
EC_RCIN# 28
+3V
SERIRQ 24,28
R436 22/F_4
R108 22/F_4
R104 22/F_4
2
EC75 18P/50V_4
EC35 18P/50V_4
EC32
18P/50V_4
CLK_24M_KBC 28
CLK_24M_DEBUG 27
EMI(near PCH)
CLK_PCI_TPM 24
EMI(near PCH)
NB5
NB5
NB5
+3V_DEEP_SUS 10,12,13,14,16,18
PROJECT : X1F
PROJECT : X1F
PROJECT : X1F
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
PCH 1/6 (DMI/FDI/VIDEO)
PCH 1/6 (DMI/FDI/VIDEO)
PCH 1/6 (DMI/FDI/VIDEO)
1
of
9 37 Friday, June 05, 2015
9 37 Friday, June 05, 2015
9 37 Friday, June 05, 2015
2A
2A
2A
B B
USB3.0 (M/B-1)
USB3.0 (Small Board)
USB3.0 (3D Camera)
A A
5
USB30_TX1- 25
USB30_TX1+ 25
USB30_RX1- 25
USB30_RX1+ 25
USB30_TX3- 22
USB30_TX3+ 22
USB30_RX3- 22
USB30_RX3+ 22
USB30_TX4+ 26
USB30_TX4- 26
USB30_RX4+ 26
USB30_RX4- 26
4
U15F
C11
USB3_1_TXN
B11
USB3_1_TXP
B7
USB3_1_RXN
A7
USB3_1_RXP
B12
USB3_2_TXN/SSIC_1_TXN
A12
USB3_2_TXP/SSIC_1_TXP
C8
USB3_2_RXN/SSIC_1_RXN
B8
USB3_2_RXP/SSIC_1_RXP
B15
USB3_6_TXN
C15
USB3_6_TXP
K15
USB3_6_RXN
K13
USB3_6_RXP
B14
USB3_5_TXN
C14
USB3_5_TXP
G13
USB3_5_RXN
H13
USB3_5_RXP
D13
USB3_3_TXP/SSIC_2_TXP
C13
USB3_3_TXN/SSIC_2_TXN
A9
USB3_3_RXP/SSIC_2_RXP
B10
USB3_3_RXN/SSIC_2_RXN
B13
USB3_4_TXP
A14
USB3_4_TXN
G11
USB3_4_RXP
E11
USB3_4_RXN
SPT
_PCH_H
5
4
3
2
1
HDA Bus(CLG)
R429
*1M_4
+3V_RTC_1
ACZ_BCLK
ACZ_RST#
ACZ_SDOUT
ACZ_SYNC
ACZ_SDOUT
D13
BAT54CW-7-F
1U/6.3V_4
AUD_AZACPU_SDO_R 3
AUD_AZACPU_SDI 3
AUD_AZACPU_SCLK 3
C525
*33P/50V_4
Q12
4 3
1
*2N7002DW
Q13
4 3
1
2N7002KDW
30mils
+3V_RTC
C545
Reserve for EMI
C527
*10P/50V_4
BIT_CLK_AUDIO
EMI
SML0ALERT# 12
DRAMRST_CNTRL_PCH 12
SML1ALERT#_R 12
+3V
5
2
6
5
2
6
+3V
R477
20K/F_4
R476
20K/F_4
R466 *0_6
SMB_ME1_CLK
SMB_ME1_DAT
SMB_PCH_DAT
SMB_PCH_CLK
U15D
Q35
RTC_RST#
BA9
HDA_BCLK
BD8
HDA_RST#
BE7
HDA_SDI0
BC8
HDA_SDI1
BB7
HDA_SDO
BD9
HDA_SYNC
BD1
RSVD_BD1
BE2
RSVD_BE2
AM1
DISPA_SDO
AN2
DISPA_SDI
AM2
DISPA_BCLK
AL42
GPP_D8/I2S0_SCLK
AN42
GPP_D7/I2S0_RXD
AM43
GPP_D6/I2S0_TXD
AJ33
GPP_D5/I2S0_SFRM
AH44
GPP_D20/DMIC_DATA0
AJ35
GPP_D19/DMIC_CLK0
AJ38
GPP_D18/DMIC_DATA1
AJ42
GPP_D17/DMIC_CLK1
BC10
RTCRST#
BB10
SRTCRST#
AW11
PCH_PWROK
BA11
RSMRST#
AV11
DSW_PW ROK
BB41
GPP_C2/SMBALERT#
AW44
GPP_C0/SMBCLK
BB43
GPP_C1/SMBDATA
BA40
GPP_C5/SML0ALERT#
AY44
GPP_C3/SML0CLK
BB39
GPP_C4/SML0DATA
AT27
GPP_B23/SML1ALERT#/PCHHOT#
AW42
GPP_C6/SML1CLK
AW45
GPP_C7/SML1DATA
SPT
_PCH_H
RTC_RST# 16
EC_RTC_RST 28
R450
10K_4
AUDIO
ACZ_BCLK
ACZ_SDIN0 21
R51 30_4
R401 30_4
+3V_DEEP_SUS
ACZ_SDOUT
EC_PWROK 16,28
RSMRST# 28 AC_PRESENT_EC 28
CPU heat pipe local thermal sensor
DDR thermal sensor
RTD2136
EC
Touch Pad
XDP
DDR3-L
J1
*SOLDERJUMPER-2
1 2
RTC_RST#
C542
1U/6.3V_4
SRTC_RST#
C541
1U/6.3V_4
SRTC_RST# RTC_RST#
ACZ_RST#
ACZ_SDOUT
ACZ_SYNC
AUD_AZACPU_SDO
AUD_AZACPU_SDI
AUD_AZACPU_SCLK_R
R421
*4.7K_4
RTC_RST#
SRTC_RST#
RSMRST#
DSWROK_EC_R
SML0ALERT#
SMB_PCH_CLK
SMB_PCH_DAT
DRAMRST_CNTRL_PCH
SMB_ME0_CLK
SMB_ME0_DAT
SML1ALERT#_R
SMB_ME1_CLK
SMB_ME1_DAT
3
2N7002K
1
4
2
SPT-H_PCH
GPP_A12/BMBUSY#/ISH_GP6/SX_EXIT_HOLDOFF#
GPP_A13/SUSW ARN#/SUSPW RDNACK
SMBUS
JTAG
4 OF 12
System PWR_OK(CLG)
R407 0_4
For HWPG Sequence
+1.0V
R394
15K/F_4
+1.0V_PWRGD_G1
C524
0.1U/10V_4
3
GPP_A8/CLKRUN#
GPD11/LANPHYPC
GPD9/SLP_WLAN#
DRAM_RESET#
GPP_B2/VRALERT#
GPP_B1
SYS_PWROK
GPD6/SLP_A#
SLP_LAN#
GPP_B12/SLP_S0#
GPD4/SLP_S3#
GPD5/SLP_S4#
GPD10/SLP_S5#
GPD8/SUSCLK
GPD0/BATLOW #
GPP_A15/SUSACK#
GPD2/LAN_WAKE#
GPD1/ACPRESENT
SLP_SUS#
GPD3/PWRBTN#
SYS_RESET#
GPP_B14/SPKR
PROCPWRGD
ITP_PMODE
JTAG_TMS
JTAG_TDO
JTAG_TCK
EC_PWROK SYS_PWROK
+5VS5
R392
100K/F_4
+1.0V_PWRGD_G2
2
Q32
METR3904-G
1 3
GPP_B0
GPP_B11
JTAG_TDI
GPP_G17/ADR_COMPLETE
R411
100K/F_4
WAKE#
JTAGX
R389
10K/F_4
BB17
AW22
AR15
AV13
BC14
BD23
AL27
AR27
N44
AN24
AY1
BC13
BC15
AV15
BC26
AW15
BD15
BA13
AN15
BD13
BB19
BD19
BD11
BB15
BB13
AT13
AW1
BD26
AM3
AT2
AR3
AR2
JTAG_TMS_PCH
AP1
JTAG_TDO_PCH
AP2
JTAG_TDI_PCH
AN3
JTAG_TCK_PCH
2
+3V_DEEP_SUS 9,12,13,14,16,18
CLKRUN#
LAN_DISABLE
DDR3_DRAMRST#
GPP_B2
SYS_PWROK
PCIE_WAKE#
PCH_SLP_S0_N
PCH_SUSCLK
RF_OFF_PCH
SUSACK#
SUSWARN#
AC_PRESENT_EC
SLP_SUS#_EC
DNBSWON#
SYS_RESET#
ACZ_SPKR
PROCPWRGD
ITP_PMODE
+3VS5
R393
10K_4
3
Q31
2N7002K
1
ACZ_SDOUT
TP19
TP18
TP10
R400 *10K_4
R384 1K_4
HWPG
R390
100K/F_4
SYS_PWROK 16
2
CLKRUN# 28
PCIE_WAKE# 22,27,28
SLP_A# 16
PCH_SLP_S0_N 16,28,33
SUSB# 16,28
SUSC# 16,28
SLP_S5# 16
TP17
R456 0_4
R132 0_4
SUSWARN#
R128 *0_4
SLP_SUS#_EC 28
DNBSWON# 28
SYS_RESET# 16
ACZ_SPKR 12,21
PROCPWRGD 2
+1.0V_DEEP_SUS
JTAGX_PCH 16
JTAG_TMS_PCH 16
JTAG_TDO_PCH 16
JTAG_TDI_PCH 16
JTAG_TCK_PCH 16
HWPG 2,16,28,30,31,32
ACZ_SDOUT 12
+1.35VSUS
R238
470/F_4
RF_OFF_PCH 27
SUSACK#_EC 28
SUSWARN#_EC 28
For DS3 Sequence
NB5
NB5
NB5
DDR3_DRAMRST# 17,18
SYS_RESET#
GPP_B2
R391
*210/F_4
R405
*100/F_4
For DS3 -->Ra
Non-DS3 -->Rb
RSMRST#
DSWROK_EC 28
+3VS5
R94 1K_4
R112 *10K_4
+3V
R130 8.2K/F_4
RSMRST#
DSWROK_EC
PROJECT : X1F
PROJECT : X1F
PROJECT : X1F
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
R406 10K_4
R446 10K_4
+1.0V
R387
R388
*210/F_4
*210/F_4
JTAG_TMS_PCH
JTAG_TDI_PCH
JTAG_TDO_PCH
R404
R403
*100/F_4
*100/F_4
Rb
R87 *0_4
R85 0_4
Ra
PCIE_WAKE#
AC_PRESENT_EC
CLKRUN#
R84 10K_4
R86 100K/F_4
PCH 2/6 (SATA/HDA/SPI)
PCH 2/6 (SATA/HDA/SPI)
PCH 2/6 (SATA/HDA/SPI)
1
JTAG_TCK_PCH
R402
*51_4
10
+3V
DSWROK_EC_R
of
10 37 Friday, June 05, 2015
10 37 Friday, June 05, 2015
10 37 Friday, June 05, 2015
2A
2A
2A
BIT_CLK_AUDIO 21
ACZ_RST#_AUDIO 21
ACZ_SDOUT_AUDIO 21
ACZ_SYNC_AUDIO 21
D D
+3V_DEEP_SUS
R511 2.2K_4
R512 2.2K_4
R508 2.2K_4
R485 2.2K_4
R510 2.2K_4
R513 2.2K_4
R432 10K_4
R127 *10K_4
R129 *10K_4
GPIO33_EC 28
C C
RSMRST#
EC_PWROK
B B
SMB_RUN_DAT 16,17,18,19,23
SMB_RUN_CLK 16,17,18,19,23
R418 33_4
R426 33_4
R419 33_4
SMB_ME0_CLK
SMB_ME0_DAT
SMB_ME1_CLK
SMB_ME1_DAT
SMB_PCH_CLK
SMB_PCH_DAT
RF_OFF_PCH
SUSWARN#
SUSACK#
R423 1K_4
C206 *220P/50V_4
C203 *220P/50V_4
MBCLK2 5,18,19,28
MBDATA2 5,18,19,28
+3V
+3V
R427 33_4
R184 4.7K_4
R185 4.7K_4
RTC Circuitry(RTC)
+3V_RTC_0
A A
+3V_RTC_0
1 2
CN13
BAT_CONN
DFHS02FS027
BAT-23_2-4_2
RTC Power trace width 20mils.
PV modify
+3VPCU
R494
1K_4
Uninstall for Green-CLK
5
5
D D
C C
TP45
C529 22P/50V_4
1
2
TP44
R428
1M_4
Y1
4
3
C528 22P/50V_4
24MHZ +-30PPM
B B
XTAL24_IN
XTAL24_OUT
+1.0V_DEEP_SUS
Add UART for debug_20150204
R396
2.7K/F_4
R395
*60.4_4
PCIE_CLKREQ_CR# 22
PCIE_CLKREQ_WLAN# 27
PCIE_CLKREQ_LAN# 22
RTC Clock 32.768KHz
C530 22P/50V_4
C531 22P/50V_4
A A
Change from 18p to 22p to fix CRT time issue_20150414
32.768KHZ
2 3
Y2
RTC_X1
R431
10M_4
4 1
RTC_X2
4
U15C
AV2
CL_CLK
AV3
CL_DATA
AW2
CL_RST#
R44
GPP_G8/FAN_PWM_0
R43
GPP_G9/FAN_PWM_1
U39
GPP_G10/FAN_PWM_2
N42
GPP_G11/FAN_PWM_3
U43
GPP_G0/FAN_TACH_0
U42
GPP_G1/FAN_TACH_1
U41
GPP_G2/FAN_TACH_2
M44
GPP_G3/FAN_TACH_3
U36
GPP_G4/FAN_TACH_4
P44
GPP_G5/FAN_TACH_5
T45
GPP_G6/FAN_TACH_6
T44
GPP_G7/FAN_TACH_7
B33
PCIE11_TXP
C33
PCIE11_TXN
K31
PCIE11_RXP
L31
PCIE11_RXN
AB33
GPP_F10/SCLOCK
AB35
GPP_F11/SLOAD
AA44
GPP_F13/SDATAOUT0
AA45
GPP_F12/SDATAOUT1
B38
PCIE14_TXN/SATA1B_TXN
C38
PCIE14_TXP/SATA1B_TXP
D39
PCIE14_RXN/SATA1B_RXN
E37
PCIE14_RXP/SATA1B_RXP
C36
PCIE13_TXN/SATA0B_TXN
B36
PCIE13_TXP/SATA0B_TXP
G35
PCIE13_RXN/SATA0B_RXN
E35
PCIE13_RXP/SATA0B_RXP
A35
PCIE12_TXP
B35
PCIE12_TXN
H33
PCIE12_RXP
G33
PCIE12_RXN
J45
PCIE20_TXP/SATA7_TXP
K44
PCIE20_TXN/SATA7_TXN
N38
PCIE20_RXP/SATA7_RXP
N39
PCIE20_RXN/SATA7_RXN
H44
PCIE19_TXP/SATA6_TXP
H43
PCIE19_TXN/SATA6_TXN
L39
PCIE19_RXP/SATA6_RXP
L37
PCIE19_RXN/SATA6_RXN
SPT_
PCH_H
U15G
CLK_CPU_BCLKN 2
TP46
CLK_CPU_BCLKP 2
GPP_A16
RTC_X1
RTC_X2
PCIE_CLKREQ0#
PCIE_CLKREQ_CR#
PCIE_CLKREQ_WLAN#
PCIE_CLKREQ_LAN#
PCIE_CLKREQ_VGA#
PCIE_CLKREQ_SSD#
PCIE_CLKREQ6#
PCIE_CLKREQ7#
PCIE_CLKREQ8#
PCIE_CLKREQ9#
PCIE_CLKREQ10#
PCIE_CLKREQ11#
PCIE_CLKREQ12#
PCIE_CLKREQ13#
PCIE_CLKREQ14#
PCIE_CLKREQ15#
GPP_A16 25
CLK_DPLL_NSCCLKP 2
CLK_DPLL_NSCCLKN 2
XTAL24_OUT
XTAL24_IN
XCLK_RBIAS
AR17
GPP_A16/CLKOUT_48
G1
CLKOUT_CPUNSSC_P
F1
CLKOUT_CPUNSSC
G2
CLKOUT_CPUBCLK_P
H2
CLKOUT_CPUBCLK
A5
XTAL24_OUT
A6
XTAL24_IN
E1
XCLK_BIASREF
BC9
RTCX1
BD10
RTCX2
BC24
GPP_B5/SRCCLKREQ0#
AW24
GPP_B6/SRCCLKREQ1#
AT24
GPP_B7/SRCCLKREQ2#
BD25
GPP_B8/SRCCLKREQ3#
BB24
GPP_B9/SRCCLKREQ4#
BE25
GPP_B10/SRCCLKREQ5#
AT33
GPP_H0/SRCCLKREQ6#
AR31
GPP_H1/SRCCLKREQ7#
BD32
GPP_H2/SRCCLKREQ8#
BC32
GPP_H3/SRCCLKREQ9#
BB31
GPP_H4/SRCCLKREQ10#
BC33
GPP_H5/SRCCLKREQ11#
BA33
GPP_H6/SRCCLKREQ12#
AW33
GPP_H7/SRCCLKREQ13#
BB33
GPP_H8/SRCCLKREQ14#
BD33
GPP_H9/SRCCLKREQ15#
R13
CLKOUT_PCIE_N15
R11
CLKOUT_PCIE_P15
P1
CLKOUT_PCIE_N14
R2
CLKOUT_PCIE_P14
W7
CLKOUT_PCIE_N13
Y5
CLKOUT_PCIE_P13
U2
CLKOUT_PCIE_N12
U3
CLKOUT_PCIE_P12
SPT_
PCH_H
SPT-H_PCH
CLINK
FAN
3 OF 12
SPT-H_PCH
7 OF 12
3
PCIE9_RXN/SATA0A_RXN
PCIE9_RXP/SATA0A_RXP
PCIE9_TXN/SATA0A_TXN
PCIE9_TXP/SATA0A_TXP
PCIE10_RXN/SATA1A_RXN
PCIE10_RXP/SATA1A_RXP
PCIE10_TXN/SATA1A_TXN
PCIE10_TXP/SATA1A_TXP
PCIE15_RXN/SATA2_RXN
PCIE15_RXP/SATA2_RXP
PCIE15_TXN/SATA2_TXN
PCIE15_TXP/SATA2_TXP
PCIe/SATA
PCIE16_RXN/SATA3_RXN
PCIE16_RXP/SATA3_RXP
PCIE16_TXN/SATA3_TXN
PCIE16_TXP/SATA3_TXP
PCIE17_RXN/SATA4_RXN
PCIE17_RXP/SATA4_RXP
PCIE17_TXN/SATA4_TXN
PCIE17_TXP/SATA4_TXP
PCIE18_RXN/SATA5_RXN
PCIE18_RXP/SATA5_RXP
PCIE18_TXN/SATA5_TXN
PCIE18_TXP/SATA5_TXP
GPP_E8/SATALED#
GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2
GPP_F0/SATAXPCIE3/SATAGP3
GPP_F1/SATAXPCIE4/SATAGP4
GPP_F2/SATAXPCIE5/SATAGP5
GPP_F3/SATAXPCIE6/SATAGP6
GPP_F4/SATAXPCIE7/SATAGP7
GPP_F21/EDP_BKLTCTL
GPP_F20/EDP_BKLTEN
GPP_F19/EDP_VDDEN
HOST
PLTRST_PROC#
CLKOUT_ITPXDP
CLKOUT_ITPXDP_P
CLKOUT_CPUPCIBCLK
CLKOUT_CPUPCIBCLK_P
CLKOUT_PCIE_N0
CLKOUT_PCIE_P0
CLKOUT_PCIE_N1
CLKOUT_PCIE_P1
CLKOUT_PCIE_N2
CLKOUT_PCIE_P2
CLKOUT_PCIE_N3
CLKOUT_PCIE_P3
CLKOUT_PCIE_N4
CLKOUT_PCIE_P4
CLKOUT_PCIE_N5
CLKOUT_PCIE_P5
CLKOUT_PCIE_N6
CLKOUT_PCIE_P6
CLKOUT_PCIE_N7
CLKOUT_PCIE_P7
CLKOUT_PCIE_N8
CLKOUT_PCIE_P8
CLKOUT_PCIE_N9
CLKOUT_PCIE_P9
CLKOUT_PCIE_N10
CLKOUT_PCIE_P10
CLKOUT_PCIE_N11
CLKOUT_PCIE_P11
G31
H31
C31
B31
G29
THERMTRIP#
PECI
PM_SYNC
PM_DOWN
E29
C32
B32
F41
E41
B39
A39
D43
E42
A41
A40
H42
H40
E45
F45
K37
G37
G45
G44
AD44
AG36
AG35
AG39
AD35
AD31
AD38
AC43
AB44
W36
W35
W42
AJ3
AL3
AJ4
AK2
AH2
GPIO37
GPIO34
GPIO35
GPIO36
PM_THRMTRIP#
PM_SYNC_R
H_PM_DOWN
ve SATA signal from port 4/5 to 2/3_20150414
Mo
R505 10K_4
R385 30_4
R415 *0_4/S
Change R412/R413 to NI_20150602
L1
CK_XDP_N_R
CK_XDP_P_R
R412 *0_4
R413 *0_4
CPU_PCI_BCLKN 2
CPU_PCI_BCLKP 2
CLK_PCIE_CRN 22
CLK_PCIE_CRP 22
CLK_PCIE_WLANN 27
CLK_PCIE_WLANP 27
CLK_PCIE_LANN 22
CLK_PCIE_LANP 22
L2
J1
J2
N7
N8
L7
L5
D3
F2
E5
G4
D5
E6
D8
D7
R8
R7
U5
U7
W10
W11
N3
N2
P3
P2
R3
R4
+3V
SATA_LED# 27
TP31
TP28
TP32
TP26
TP27
PCH_DPST_PWM 19
PCH_LVDS_BLON 20
PCH_DISP_ON 20
PM_THRMTRIP# 2,5,28
PM_SYNC 2
CPU_PLTRST#R 2
H_PM_DOWN 2
CK_XDP_N
CK_XDP_P
Card Reader
WLAN
LAN
2
SATA_RXN0 27
SATA_RXP0 27
SATA_TXN0 27
SATA_TXP0 27
SATA_RXN1 27
SATA_RXP1 27
SATA_TXN1 27
SATA_TXP1 27
CK_XDP_N 16
CK_XDP_P 16
HD
D (SATA0 6Gb/s)
ODD (SATA4 3.0Gb/s)
PCH_PECI 2
R399
*10K_4
PCIE_CLKREQ_WLAN#
PCIE_CLKREQ_LAN#
PCIE_CLKREQ_CR#
PCIE_CLKREQ_VGA#
PCIE_CLKREQ0#
PCIE_CLKREQ_SSD#
PCIE_CLKREQ6#
PCIE_CLKREQ7#
PCIE_CLKREQ8#
PCIE_CLKREQ9#
PCIE_CLKREQ10#
PCIE_CLKREQ11#
PCIE_CLKREQ12#
PCIE_CLKREQ13#
PCIE_CLKREQ14#
PCIE_CLKREQ15#
1
11
+3V
R114 10K_4
R462 10K_4
R135 10K_4
R461 *10K_4
R442 *10K_4
R445 *10K_4
R162 *10K_4
R156 *10K_4
R473 *10K_4
R152 *10K_4
R143 *10K_4
R475 *10K_4
R147 *10K_4
R158 *10K_4
R478 *10K_4
R480 *10K_4
PROJECT : X1F
PROJECT : X1F
PROJECT : X1F
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
PCH 3/6 (PCIE/USB/CLK)
PCH 3/6 (PCIE/USB/CLK)
NB5
NB5
5
4
3
2
NB5
PCH 3/6 (PCIE/USB/CLK)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
11 37 Friday, June 05, 2015
11 37 Friday, June 05, 2015
11 37 Friday, June 05, 2015
2A
2A
2A
5
U15A
D D
TP47
PCI_PME#
PCH_SPI1_SI
PCH_SPI1_SO
PCH_SPI_CS0#
PCH_SPI1_CLK
PCH_SPI_IO2
PCH_SPI_IO3
Vender
C C
EON
Winbond
GigaDevice
BD17
GPP_A11/PME#
AG15
RSVD
AG14
RSVD
AF17
RSVD
AE17
RSVD
AR19
TP2
AN17
TP1
BB29
SPI0_MOSI
BE30
SPI0_MISO
BD31
SPI0_CS0#
BC31
SPI0_CLK
AW31
SPI0_CS1#
BC29
SPI0_IO2
BD30
SPI0_IO3
AT31
SPI0_CS2#
AN36
GPP_D1/SPI1_CLK
AL39
GPP_D0/SPI1_CS#
AN41
GPP_D3/SPI1_MOSI
AN38
GPP_D2/SPI1_MISO
AH43
GPP_D22/SPI1_IO3
AG44
GPP_D21/SPI1_IO2
SPT
_PCH_H
Size
P/N
8MB
AKE3EZN0Q01 (EN25QH64-104HIP (QE)
AKE3EFP0N07 (W25Q64FVSSIQ)
8MB
AKE3EGN0Q01 (GD25B64BSIGR)
8MB
PCH SPI ROM(CLG)
Vender P/N
EON
Winbond
GigaDevice
Socket
B B
TP66-71 need place to TOP
R457/R453/R450/R451/R546/R548 close to U15 pin
A A
C543 1U/10V_4
Size
8MB
8MB
PCH_SPI_CS0#
PCH_SPI1_CLK
+3VSPI
PCH_SPI_IO2
AKE3EZN0Q01 (EN25QH64-104HIP) 8MB
AKE3EFP0N07 (W25Q64FVSSIQ)
AKE3EGN0Q01 (GD25B64BSIGR)
DFHS08FS023
PCH_SPI_CS0#_R 28
PCH_SPI1_CLK_R 28
PCH_SPI1_SI_R 28
PCH_SPI1_SO_R 28
TP36
TP33
TP35
TP34
TP48
TP51
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_R
PCH_SPI1_SO_R
BIOS_WP#
HOLD#
R193 15/F_4
R182 15/F_4
R191 15/F_4
R186 15/F_4
R471 1K_4
R472 15/F_4
5
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_R PCH_SPI1_SI
PCH_SPI1_SO_R PCH_SPI1_SO
C276
22P/50V_4
BIOS_WP#
4M SPI ROM Socket
U18
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_R
PCH_SPI1_SO_R
BIOS_WP#
1
CE#
6
SCK
5
SI
2
SO
3
WP#
*A25LQ32AM-F/Q
DFHS08FS023
91960-0084L-8P-SOCKET
U18&U17 footprint
PCH SPI ROM(CLG)
R519 *0_4
+3VS5
HOLD#
VDD
VSS
R518 0_4
8
+3VSPI
7
HOLD#
4
PCH_SPI_IO3
+3V_DEEP_SUS
U17
1
CE#
6
SCK
5
SI
2
SO
3
WP#
GD25B64BSIGR
AKE3EFP0N07
SPT-H_PCH
1 OF 12
8
VDD
7
HOLD#
4
VSS
R520 1K_4
R521 15/F_4
C550
0.1U/10V_4
4
INTRUDER#
BB27
P43
R39
R36
R42
R41
AF41
3D_FW_GPIO_R 3D_FW_GPIO
AE44
BC23
BD24
BC36
SML4ALERT#
BE34
SMB_ME4_DAT
BD39
SMB_ME4_CLK
BB36
SML3ALERT#
BA35
SMB_ME3_DAT
BC35
SMB_ME3_CLK
BD35
SML2ALERT#
AW35
SMB_ME2_DAT
BD34
SMB_ME2_CLK
BE11
SM_INTRUDER#
GPP_B13/PLTRST#
GPP_G16/GSXCLK
GPP_G12/GSXDOUT
GPP_G13/GSXSLOAD
GPP_G14/GSXDIN
GPP_G15/GSXSRESET#
GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3
GPP_H18/SML4ALERT#
GPP_H17/SML4DATA
GPP_H16/SML4CLK
GPP_H15/SML3ALERT#
GPP_H14/SML3DATA
GPP_H13/SML3CLK
GPP_H12/SML2ALERT#
GPP_H11/SML2DATA
GPP_H10/SML2CLK
TOP SWAP OVERRIDE STRAP
HIGH:TOP SWAP ENABLED (CRB)
LOW:TOP SWAP DISABLED(DEFAULT)
ACZ_SPKR 10,21
+3VSPI
NO REBOOT IF SAMPLED HIGH
HOLD#
HIGH:TOP SWAP ENABLED (CRB)
LOW: Disable "No Reboot" mode. (Default)
TLS CONFIDENTIALITY ENABLED
HIGH:T Enable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (with confidentiality). (CRB)
LOW: Disable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (no confidentiality). (Default)
SML0ALERT# 10
4
PLTRST#
R138
100K/F_4
R160 *0_4
3D_FW_GPIO 26
Not support 3D camera_20150414
TP49
TP50
SML2ALERT#
R93 1M_4
+3V
R454
*150K/F_4
ACZ_SPKR
R453
*20K/F_4
+3V
R467
4.7K_4
BBS_BIT1 13
BBS_BIT1
R460
*20K/F_4
RESERVED
This strap should sample HIGH.
There should NOT be any on-board device
driving it to opposite direction during
strap sampling.
SML0ALERT#
+3V_DEEP_SUS
R514
4.7K_4
R491
*20K/F_4
3
PLTRST#(CLG)
SMB_ME4_CLK
SMB_ME4_DAT
SMB_ME3_CLK
SMB_ME3_DAT
SMB_ME2_CLK
SMB_ME2_DAT
+3V_RTC
BOOT SELECT STRAP
HIGH:LPC
LOW: SPI. (Default)
S_GPIO 13
ESPI/LPC SELECT STRAP
HIGH:eSPI Is selected for EC.
LOW: LPC Is selected for EC. (Default)
DRAMRST_CNTRL_PCH 10
3
PLTRST# 2,16,22,24,27,28
R516 499/F_4
R474 499/F_4
R481 499/F_4
R166 499/F_4
R479 499/F_4
R167 499/F_4
S_GPIO
DRAMRST_CNTRL_PCH
+3V_DEEP_SUS
R469
*20K/F_4
PCH_SPI1_SI
R468
*4.7K_4
2
ERVED
RES
This strap should sample HIGH.
There should NOT be any on-board device
driving it to opposite direction during
strap sampling.
+3V_DEEP_SUS
RESERVED
This strap should sample LOW.
There should NOT be any on-board device
driving it to opposite direction during
strap sampling.
SML1ALERT#_R 10
+3V_DEEP_SUS
R141
*4.7K_4
R148
*20K/F_4
+3V_DEEP_SUS
R515
*4.7K_4
R492
4.7K_4
TLS CONFIDENTIALITY ENABLED
HIGH: Flash Descriptor Security (override). This
strap should only be asserted high using external
pull-up in manufacturing/debug environments ONLY.(CRB)
LOW: security measures defined in the Flash
Descriptor. (Default)
RESERVED
This strap should sample HIGH.
There should NOT be any on-board device
driving it to opposite direction during
strap sampling.
RESERVED
This strap should sample HIGH.
There should NOT be any on-board device
driving it to opposite direction during
strap sampling.
Only pre-ES and ES samples need use it.
ACZ_SDOUT 10
2
PCH_SPI1_SO
SML1ALERT#_R
+3V_DEEP_SUS
ACZ_SDOUT
+3V_DEEP_SUS
PCH_SPI_IO2
PCH_SPI_IO3
R420
*1K_4
R425
1K_4
+3V_DEEP_SUS
R465
*20K/F_4
R464
*4.7K_4
R149
*4.7K_4
R142
*20K/F_4
+3V_DEEP_SUS
R458
*20K/F_4
R459
*4.7K_4
+3V_DEEP_SUS
R470
*20K/F_4
R463
100_4
NB5
NB5
NB5
1
12
SML2ALERT#
PGDMON
DGPU_PWROK
DGPU_HOLD_RST#
GPU_EVENT#
DGPU_PWR_EN
+3V_DEEP_SUS
R482
*4.7K_4
R484
*20K/F_4
+3V_DEEP_SUS
R165
*1K_4
R161
*1K_4
+3V_DEEP_SUS
R502
*10K_4
R486
*10K_4
R483
*10K_4
R488
*10K_4
12 37 Friday, June 05, 2015
12 37 Friday, June 05, 2015
12 37 Friday, June 05, 2015
R487
*10K_4
ESPI FLASH SHARING MODE
HIGH:SLAVE ATTACEHD FLASH SHARING
LOW: 0: MASTER ATTACHED FLASH SHARING
This strap should sample LOW.
There should NOT be any on-board device
driving it to opposite direction during
strap sampling.
DFX TEST MODE QUALIFIER FOR OTHER DFX STRAP
WHEN SAMPLED LOW
PGDMON 15
DFX TEST MODE
XTAL INPUT IS SINGLE ENDED IF
SAMPLED LOW ELSE DIFFERENTIAL
DGPU_PWROK 9
RING OSCILLATOR BYPASS
DGPU_HOLD_RST# 9
XTAL INPUT FREQUENCY[0]
GPU_EVENT# 9
DGPU_PWR_EN 9
XTAL INPUT FREQUENCY[1]
PROJECT : X1F
PROJECT : X1F
PROJECT : X1F
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
PCH 4/6 (GPIO/MISC)
PCH 4/6 (GPIO/MISC)
PCH 4/6 (GPIO/MISC)
1
2A
2A
2A