QUANTA X11 Schematics

5
4
3
2
1
01
X11 DIS (14" / 15" / 17")
Chocolate
X11
D D
C C
System BIOS SPI ROM
B B
Intel Cresent Bay ULT Platform Block Diagram
DDR3L SODIMM1 Maxima 8GBs
DDR3L SODIMM2 Maxima 8GBs
SATA0 - 1st HDD Package : 9.5 (mm) Power :
SATA ODD Package : 12.7 (mm) Power :
PAGE 7
DDR3L
DDR3L
SATA0 6GB/s
SATA1 3GB/s
SPI Interface
TPM PAGE 27
SLB9665TT2.0 FW 5
Broadwell U
Processor
Processor : Daul Core Power : 15 (Watt) Package : BGA1168 Size : 40 X 24 (mm)
HP
Azalia
PAGE 2~10
PCI-E X4 Lane
AMD MESO
Package 23*23mm
25W
27MHz PAGE 16
PAGE 14~17
eDP X 2
DP Port 1
USB3.0 Interface PAGE 28
USB2.0 Interface
PCIE Gen 1 x 1 LaneLPC Interface
USB 3.0 Port 1,3(USB 2.0 Port 0,1,2,5,6,7)
Camera
Port2
VRAM DDR3 x 4 256M X 16 X 4
900Mhz
RTD2136
Package : QFN-32
USB3.0 M/B x 1 +1(on D/B)
Touch Screen
Port7
Elan EKTH3915 for 14",15" Elan EKTH3918 for 17"
LVDS (2CH)
eDP
HDMI Conn
Port 1
PAGE 22/23
PAGE 22/23
Port 3
D/B
G-Sensor
HP3DC2TR
Keyboard
Touch Pad
A A
Note
VGA/CPU need check PN
H.P
5
SM BUS
Embedded Controller
Power :
Package : LQPF128
Size : 14 x 14 (mm)
FAN
Audio CodeciTE 8987
ALC3241
Power :
Package : MQFN
Size : 6 x 6 (mm)
4
Card Reader
RTS5237S-GRT
Power :
Package : LQPF48
Size : 7 x 7 (mm)
DB
Head Phone AMP
HPA022642RTJR PAGE 25
LAN Controller
RTL8111HSH(Giga) RTL8107EH(10/100)
Power : Package : OFN32
DB
Speaker
Combo Jack
Digital MIC
3
M2 Card
Intel Rambo Peak
WLAN / BT Combo
Port6
PROJECT : X11
PROJECT : X11
PROJECT : X11
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Block Diagram
Block Diagram
Block Diagram
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
1
1A
1A
1A
1 40Monday, January 05, 2015
1 40Monday, January 05, 2015
1 40Monday, January 05, 2015
5
4
3
2
1
U25A
IN_D2#23 IN_D1#23 IN_D0#23 IN_CLK#23 IN_D223 IN_D123 IN_D023
D D
eDP_COMPIO and ICOMPO signals should be shorted near balls and routed with typical impedance <25 mohms
C C
IN_CLK23
TP20
INT_eDP_AUXP22 INT_eDP_AUXN22
INT_eDP_TXP022 INT_eDP_TXP122
INT_eDP_TXN022 INT_eDP_TXN122
DPB_LANE0_N DPB_LANE1_N DPB_LANE2_N DPB_LANE3_N DPB_LANE0_P DPB_LANE1_P DPB_LANE2_P DPB_LANE3_P
eDP_RCOMP EDP_DISP_UTIL
INT_eDP_AUXP INT_eDP_AUXN
INT_eDP_TXP0 INT_eDP_TXP1
INT_eDP_TXN0 INT_eDP_TXN1
+VCCIOA_OUT
eDP_COMPIO and ICOMPO signals should be shorted near balls and routed with typical impedance <25 mohms
C54
DDI1_TXN0
B58
DDI1_TXN1
B55
DDI1_TXN2
A57
DDI1_TXN3
C55
DDI1_TXP0
C58
DDI1_TXP1
A55
DDI1_TXP2
B57
DDI1_TXP3
C51
DDI2_TXN0
C53
DDI2_TXN1
C49
DDI2_TXN2
A53
DDI2_TXN3
C50
DDI2_TXP0
B54
DDI2_TXP1
B50
DDI2_TXP2
B53
DDI2_TXP3
D20
EDP_RCOMP
A43
EDP_DISP_UTIL
B45
EDP_AUXP
A45
EDP_AUXN
B46
eDP_TXP0
B47
eDP_TXP1
C46
eDP_TXP2
B49
eDP_TXP3
C45
eDP_TXN0
A47
eDP_TXN1
C47
eDP_TXN2
A49
eDP_TXN3
*HSW_ULT_DDR3L
R165 24.9/F_4
eDP_RCOMP
CATERR#
TP31
EC_PECI30
H_PROCHOT#30,35
eDP
R517 56.2/F_4
R495 10K_4
EC_PECI
PROCHOT#_ULT
PROCPWRGD
PCI EXPRESS* - GRAPHICS
U25B
D61
PROC_DETECT#
K61
CATERR#
N62
PECI
K63
PROCHOT#
C61
PROCPWRGD
*HSW_ULT_DDR3L
02
MISCTHERMALPWR MANAGEMENT
SM_DRAMRST#
PRDY# PREQ#
PROC_TCK PROC_TMS
PROC_TDI
PROC_TDO
BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7
AV15 AU60
AV60 AU61
AV61
J62 K62
E60 E61 E59
F63 F62
J60 H60 H61 H62 K59 H63 K60 J61
SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2
XDP_TCK0 XDP_TMS_CPU XDP_TRST#_CPU
XDP_TDI_CPU XDP_TDO_CPU
R251 200/F_4 R250 121/F_4 R249 100/F_4
DDR_PG_CNTL 13
XDP_PRDY#_CPU 11
XDP_PREQ#_CPU 11 XDP_TCK0 7,11
XDP_TMS_CPU 11 XDP_TRST#_CPU 7,11
XDP_TDI_CPU 11
XDP_TDO_CPU 11
XDP_BPM0 11 XDP_BPM1 11
DDR3JTAG & BPM
SM_DRAMRST#
SM_RCOMP0 SM_RCOMP1 SM_RCOMP2
SM_PG_CNTL1
PROC_TRST#
+1.35VSUS
R266 470/F_4
DDR3_DRAMRST# 12,13
Processor pull-up (CPU)
H_PROCHOT#
XDP_TDO_CPU
B B
XDP_TMS_CPU XDP_TDI_CPU
R522 62_4
+V1.05S_VCCST
R506 51_4 R496 *51_4 R509 *51_4
+V1.05S_VCCST
XDP_TRST#_CPU XDP_TCK0
A A
5
4
3
R580 51_4 R562 51_4
PROJECT : X11
PROJECT : X11
PROJECT : X11
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
ULT 1/9(eDP/DDI)
ULT 1/9(eDP/DDI)
ULT 1/9(eDP/DDI)
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
1
1A
1A
1A
2 40Monday, January 05, 2015
2 40Monday, January 05, 2015
2 40Monday, January 05, 2015
5
M_A_DQ[63:0]12
M_B_DQ[63:0]13
M_A_DQSN[7:0]12
M_A_DQSP[7:0]12
M_B_DQSN[7:0]13
M_B_DQSP[7:0]13
4
3
2
1
03
Haswell ULT Processor (DDR3L)
D D
AH63 AH62 AK63 AK62 AH61 AH60 AK61
AK60 AM63 AM62
AP63
AP62 AM61 AM60
AP61
AP60
AP58
AR58 AM57
AK57
AL58
AK58
AR57
AN57
AP55
AR55 AM54
AK54
AL55
AK55
AR54
AN54
AY58 AW58
AY56 AW56
AV58
AU58
AV56
AU56
AY54 AW54
AY52 AW52
AV54
AU54
AV52
AU52
AK40
AK42 AM43 AM45
AK45
AK43 AM40 AM42 AM46
AK46 AM49
AK49 AM48
AK48 AM51
AK51
AU35
AV35
AY41
AU34
AY34 AW34
U25C
SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63
SA_BA0 SA_BA1 SA_BA2
SA_CAS# SA_RAS# SA_WE#
*HSW_ULT_DDR3L
DDR SYSTEM MEMORY A
SA_CLK0
SA_CLK#0
SA_CKE0
SA_CLK1
SA_CLK#1
SA_CKE1
SA_CKE2
SA_CKE3
SA_CS#0 SA_CS#1
SA_ODT0
SA_DQSN0 SA_DQSN1 SA_DQSN2 SA_DQSN3 SA_DQSN4 SA_DQSN5 SA_DQSN6 SA_DQSN7
SA_DQSP0 SA_DQSP1 SA_DQSP2 SA_DQSP3 SA_DQSP4 SA_DQSP5 SA_DQSP6 SA_DQSP7
SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8
SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15
SM_VREF_CA SM_VREF_DQ0 SM_VREF_DQ1
AV37 AU37 AU43
AY36 AW36 AW43
AY42
AY43
AP33 AR32
AP32
M_A_DQSN0
AJ61
M_A_DQSN1
AN62
M_B_DQSN0
AM58
M_B_DQSN1
AM55
M_A_DQSN2
AV57
M_A_DQSN3
AV53
M_B_DQSN2
AL43
M_B_DQSN3
AL48
M_A_DQSP0
AJ62
M_A_DQSP1
AN61
M_B_DQSP0
AN58
M_B_DQSP1
AN55
M_A_DQSP2
AW57
M_A_DQSP3
AW53
M_B_DQSP2
AL42
M_B_DQSP3
AL49
M_A_A0
AU36
M_A_A1
AY37
M_A_A2
AR38
M_A_A3
AP36
M_A_A4
AU39
M_A_A5
AR36
M_A_A6
AV40
M_A_A7
AW39
M_A_A8
AY39
M_A_A9
AU40
M_A_A10
AP35
M_A_A11
AW41
M_A_A12
AU41
M_A_A13
AR35
M_A_A14
AV42
M_A_A15
AU42
SM_VREF
AP49
SMDDR_VREF_DQ0_M3
AR51
SMDDR_VREF_DQ1_M3
AP51
20mils width
M_A_CLKP0 12 M_A_CLKN0 12 M_A_CKE0 12
M_A_CLKP1 12 M_A_CLKN1 12 M_A_CKE1 12
M_A_CS#0 12 M_A_CS#1 12
M_A_A[15:0] 12
SM_VREF 12 SMDDR_VREF_DQ0_M3 12 SMDDR_VREF_DQ1_M3 13
M_B_BS#013 M_B_BS#113 M_B_BS#213
M_B_CAS#13 M_B_RAS#13 M_B_WE#13
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11
C C
B B
M_A_BS#012 M_A_BS#112 M_A_BS#212
M_A_CAS#12 M_A_RAS#12 M_A_WE#12
M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31
M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
AY31
AW31
AY29
AW29
AV31 AU31 AV29 AU29 AY27
AW27
AY25
AW25
AV27 AU27 AV25 AU25
AM29
AK29 AL28 AK28 AR29 AN29 AR28 AP28 AN26 AR26 AR25 AP25 AK26
AM26
AK25 AL25 AY23
AW23
AY21
AW21
AV23 AU23 AV21 AU21 AY19
AW19
AY17
AW17
AV19 AU19 AV17 AU17 AR21 AR22 AL21
AM22
AN22 AP21 AK21 AK22 AN20 AR20 AK18 AL18 AK20
AM20
AR18 AP18
AL35 AM36 AU49
AM33 AM35 AK35
U25D
SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63
SB_BA0 SB_BA1 SB_BA2
SB_CAS# SB_RAS# SB_WE#
INT
*HSW_ULT_DDR3L
AN38
SB_CLK0
AM38
SB_CLK#0
AY49
SB_CKE0
AL38
SB_CLK1
AK38
SB_CLK#1
AU50
SB_CKE1
AW49
SB_CKE2
AV50
SB_CKE3
AM32
SB_CS#0
AK32
SB_CS#1
AL32
SB_ODT0
M_A_DQSN4
AW30
SB_DQSN0 SB_DQSN1 SB_DQSN2 SB_DQSN3 SB_DQSN4 SB_DQSN5 SB_DQSN6 SB_DQSN7
SB_DQSP0 SB_DQSP1 SB_DQSP2 SB_DQSP3 SB_DQSP4 SB_DQSP5 SB_DQSP6 SB_DQSP7
SB_MA0 SB_MA1 SB_MA2 SB_MA3
DDR SYSTEM MEMORY B
SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8
SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15
AV26 AN28 AN25 AW22 AV18 AN21 AN18
AV30 AW26 AM28 AM25 AV22 AW18 AM21 AM18
AP40 AR40 AP42 AR42 AR45 AP45 AW46 AY46 AY47 AU46 AK36 AV47 AU47 AK33 AR46 AP46
M_A_DQSN5 M_B_DQSN4 M_B_DQSN5 M_A_DQSN6 M_A_DQSN7 M_B_DQSN6 M_B_DQSN7
M_A_DQSP4 M_A_DQSP5 M_B_DQSP4 M_B_DQSP5 M_A_DQSP6 M_A_DQSP7 M_B_DQSP6 M_B_DQSP7
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15
M_B_CLKP0 13 M_B_CLKN0 13 M_B_CKE0 13
M_B_CLKP1 13 M_B_CLKN1 13 M_B_CKE1 13
M_B_CS#0 13 M_B_CS#1 13
M_B_A[15:0] 13
A A
PROJECT : X11
PROJECT : X11
PROJECT : X11
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
ULT 2/9 (DDR3 I/F)
ULT 2/9 (DDR3 I/F)
ULT 2/9 (DDR3 I/F)
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
1
1A
1A
1A
3 40Monday, January 05, 2015
3 40Monday, January 05, 2015
3 40Monday, January 05, 2015
5
32A
+VCC_CORE
C270
C295
C287
C255
22U/6.3V_6
*22U/6.3V_6
D D
C C
B B
A A
C268
C312
22U/6.3V_6
22U/6.3V_6
C272
C278
22U/6.3V_6
22U/6.3V_6
C276
C286
22U/6.3V_6
*22U/6.3V_6
C280
C277
22U/6.3V_6
22U/6.3V_6
C284
C242
22U/6.3V_6
22U/6.3V_6
C251
C238
22U/6.3V_6
22U/6.3V_6
C267
C240
22U/6.3V_6
*22U/6.3V_6
+VCCIOA_OUT 2 +VCCIO_OUT 6
+1.35VSUS 2,12,13,33 +1.05V 2,7,9,10,11,27,30,34,35,36 +VCC_CORE 35
22U/6.3V_6
C279 22U/6.3V_6
C271
22U/6.3V_6
C252
*22U/6.3V_6
C269
22U/6.3V_6
C285
*22U/6.3V_6
C239
22U/6.3V_6
C275 22U/6.3V_6
22U/6.3V_6
C254 22U/6.3V_6
C241 *22U/6.3V_6
C283
22U/6.3V_6
C302
*22U/6.3V_6
C253
22U/6.3V_6
5
U25F
C36 C40 C44 C48 C52 C56 E23 E25 E27 E29 E31 E33 E35 E37 E39 E41 E43 E45 E47 E49 E51 E53 E55 E57 F24 F28 F32 F36 F40 F44 F48 F52 F56 G23 G25 G27 G29 G31 G33 G35 G37 G39 G41 G43 G45 G47 G49 G51 G53 G55 G57 H23
J23 K23 K57 L22 M23 M57 P57 U57
W57 AB57 AD57 AG57
C24 C28 C32
F59
L59
J58
N58 AC58 AB23 AD23 AA23 AE59
AT2 AU44 AV44
D15
F22
H22
J21 N23 R23 T23 U10 AL1
AM11
AP7
AU10 AU15
*HSW_ULT_DDR3L
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
VCC
RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
POWER
HSW ULT POWER
PWR_DEBUG#
VCCST_PWRGD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
VCCIO_OUT
VCCIOA_OUT
VIDALERT#
VIDSCLK VIDSOUT
VR_EN
VR_READY
VCCST VCCST VCCST
RSVD_TP RSVD_TP RSVD_TP RSVD_TP
VCC_SENSE VSS_SENSE
RSVD RSVD
4
1.4A
+1.35VSUS
AH26 AJ31 AJ33 AJ37
C738
AN33 AP43 AR48 AY35 AY40 AY44 AY50
D63
VSS
P62
VSS
T59 AD60 AD59 AA59 AE60 AC59 AG58 U59 V59
A59 E20
H_CPU_SVIDALRT#
L62
VR_SVID_CLK
N63
H_CPU_SVIDDAT
L63
PWR_DEBUG
H59
F60 C59
R494 10K_4
AC22 AE22 AE23
H_VCCST_PWRGD_R H_VCCST_PWRGD
B59
P60 P61 N59 N61
E63 E62
AW14 AY14
C736
10U/6.3V_6
10U/6.3V_6
Direct tie to CPU VCC/VSS-Ball
C739
C746
2.2U/6.3V_4
2.2U/6.3V_4
+V1.05S_VCCST
100- ±1% pull-up to VCC near processor.
R501 100/F_4
R508 100/F_4
+VCC_CORE VCC_SENSE 35 VSS_SENSE 35
Processor Strapping
CFG3 (MSR Privacy Bit Feature)
CFG4 (eDP enable)
4
Close to CPU
C744
C743
10U/6.3V_6
10U/6.3V_6
C745
C740
2.2U/6.3V_4
2.2U/6.3V_4
+VCCIO_OUT
C249
4.7U/6.3V_4
+VCCIO_OUT +VCCIOA_OUT
PWR_DEBUG 11
H_VR_ENABLE_MCP 35
The CFG signals have a default value of '1' if not terminated on the board.
Debug capability is determined by IA32_Debug_Interface_MSR (C80h) bit[0] setting
C742
C737
10U/6.3V_6
10U/6.3V_6
IMVP_PWRGD 35
HWPG11,30,32,33,34 H_VCCST_PWRGD 11
1 0
Disabled
3
Layout note: need routing together and ALERT need between CLK and DATA.
H_CPU_SVIDALRT#
VR_SVID_CLK
H_CPU_SVIDDAT
3
R531 43_4
D2
21
MEK500V-40
IA32_Debug_Interface_MSR (C80h) bit[0] default setting overridden
CFG0-19 need Reserve TP
CFG011 CFG111 CFG211 CFG311 CFG411 CFG511 CFG611 CFG711 CFG811 CFG911 CFG1011 CFG1111 CFG1211 CFG1311 CFG1411 CFG1511 CFG1611 CFG1711 CFG1811 CFG1911
+V1.05S_VCCST
R533 75/F_4
SVID ALERT
C718 *0.1U/16V_4
SVID CLK
+V1.05S_VCCST
Place PU resistor close to VR
R521
SVID DATA
130/F_4
+V1.05S_VCCST
R557 10K_4
C719 *10P/50V_4
Enabled
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19
VR_SVID_ALERT# 35
VR_SVID_CLK 35
VR_SVID_DATA 35
2
2
R537
49.9/F_4
R484
8.2K/F_4
CFG_RCOMP
TD_IREF
CFG3
CFG4
AC60
CFG0
AC62
CFG1
AC63
CFG2
AA63
CFG3
AA60
CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15
AA62
CFG16
AA61
CFG17 CFG18 CFG19
AV63 AU63
Circuit
R543 *1K_4
R542 1K_4
U25E
CFG0 CFG1 CFG2 CFG3 CFG4
Y62
CFG5
Y61
CFG6
Y60
CFG7
V62
CFG8
V61
CFG9
V60
CFG10
U60
CFG11
T63
CFG12
T62
CFG13
T61
CFG14
T60
CFG15 CFG16 CFG17
U63
CFG18
U62
CFG19
V63
CFG_RCOMP
A5
RSVD
E1
RSVD
D1
RSVD
J20
RSVD
H18
RSVD
B12
TD_IREF
RSVD_TP RSVD_TP
C63
RSVD_TP
C62
RSVD_TP
B43
RSVD
*HSW_ULT_DDR3L
PROC_OPI_RCOMP
RESERVED
IO Thrm Protect
+3VPCU
For 65 degree, 1.8v limit, (SW)
R276
16.5K/F_4
R280
3.3K/F_4
For 75 degree, 1.2v limit, (HW)
THER_CPU
R162 100K_4_NTC
+V1.05S_VCCST+1.05V
+V1.05S_VCCST
1
A51
RSVD_TP
B51
RSVD_TP
L60
RSVD_TP
N60
RSVD
W23
RSVD
Y22
RSVD
PROC_OPI_RCOMP
AY15
AV62
RSVD RSVD
VSS VSS
RSVD RSVD
C370
0.1U/16V_4
1 2
THRM_MOINTOR1 30
C375
0.1U/16V_4
1 2
C325 *1U/6.3V_4
R556 150/F_4
PWR_DEBUG
R555 *10K_4
PROJECT : X11
PROJECT : X11
PROJECT : X11
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
R584
D58
49.9/F_4
P22 N21
P20 R20
C330 *22U/6.3V_6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
04 -- ULT 3/9 (POWER-1)
04 -- ULT 3/9 (POWER-1)
04 -- ULT 3/9 (POWER-1)
1
04
1A
1A
1A
4 40Monday, January 05, 2015
4 40Monday, January 05, 2015
4 40Monday, January 05, 2015
5
U25G
A11
VSS
A14
VSS
A18
VSS
A24
VSS
A28
VSS
A32
VSS
A36
VSS
A40
VSS
A44
VSS
A48
D D
C C
B B
VSS
A52
VSS
A56
VSS
AA1
VSS
AA58
VSS
AB10
VSS
AB20
VSS
AB22
VSS
AB7
VSS
AC61
VSS
AD21
VSS
AD3
VSS
AD63
VSS
AE10
VSS
AE5
VSS
AE58
VSS
AF11
VSS
AF12
VSS
AF14
VSS
AF15
VSS
AF17
VSS
AF18
VSS
AG1
VSS
AG11
VSS
AG21
VSS
AG23
VSS
AG60
VSS
AG61
VSS
AG62
VSS
AG63
VSS
AH17
VSS
AH19
VSS
AH20
VSS
AH22
VSS
AH24
VSS
AH28
VSS
AH30
VSS
AH32
VSS
AH34
VSS
AH36
VSS
AH38
VSS
AH40
VSS
AH42
VSS
AH44
VSS
AH49
VSS
AH51
VSS
AH53
VSS
AH55
VSS
AH57
VSS
AJ13
VSS
AJ14
VSS
AJ23
VSS
AJ25
VSS
AJ27
VSS
AJ29
VSS
*HSW_ULT_DDR3L
VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AJ35 AJ39 AJ41 AJ43 AJ45 AJ47 AJ50 AJ52 AJ54 AJ56 AJ58 AJ60 AJ63 AK23 AK3 AK52 AL10 AL13 AL17 AL20 AL22 AL23 AL26 AL29 AL31 AL33 AL36 AL39 AL40 AL45 AL46 AL51 AL52 AL54 AL57 AL60 AL61 AM1 AM17 AM23 AM31 AM52 AN17 AN23 AN31 AN32 AN35 AN36 AN39 AN40 AN42 AN43 AN45 AN46 AN48 AN49 AN51 AN52 AN60 AN63 AN7 AP10 AP17 AP20
4
U25H
AP22
VSS
AP23
VSS
AP26
VSS
AP29
VSS
AP3
VSS
AP31
VSS
AP38
VSS
AP39
VSS
AP48
VSS
AP52
VSS
AP54
VSS
AP57
VSS
AR11
VSS
AR15
VSS
AR17
VSS
AR23
VSS
AR31
VSS
AR33
VSS
AR39
VSS
AR43
VSS
AR49
VSS
AR5
VSS
AR52
VSS
AT13
VSS
AT35
VSS
AT37
VSS
AT40
VSS
AT42
VSS
AT43
VSS
AT46
VSS
AT49
VSS
AT61
VSS
AT62
VSS
AT63
VSS
AU1
VSS
AU16 AU18 AU20 AU22 AU24 AU26 AU28 AU30 AU33 AU51 AU53 AU55 AU57 AU59 AV14 AV16 AV20 AV24 AV28 AV33 AV34 AV36 AV39 AV41 AV43 AV46 AV49 AV51 AV55
*HSW_ULT_DDR3L
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS
INT
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
3
AV59 AV8 AW16 AW24 AW33 AW35 AW37 AW4 AW40 AW42 AW44 AW47 AW50 AW51 AW59 AW60 AY11 AY16 AY18 AY22 AY24 AY26 AY30 AY33 AY4 AY51 AY53 AY57 AY59 AY6 B20 B24 B26 B28 B32 B36 B4 B40 B44 B48 B52 B56 B60 C11 C14 C18 C20 C25 C27 C38 C39 C57 D12 D14 D18 D2 D21 D23 D25 D26 D27 D29 D30 D31
DC_TEST_AY2_AW2 DC_TEST_AY3_AW3
TP36
DC_TEST_AY61_AW61 DC_TEST_AY62_AW62
DC_TEST_A3_B3
TP22
DC_TEST_A61_B61 DC_TEST_B62_B63
DC_TEST_C1_C2
TEST_AY60
TEST_B2
2
U25I
D33
VSS
D34
VSS
D35
VSS
D37
VSS
D38
VSS
D39
VSS
D41
VSS
D42
VSS
D43
VSS
D45
VSS
D46
VSS
D47
VSS
D49
VSS
D5
VSS
D50
VSS
D51
VSS
D53
VSS
D54
VSS
D55
VSS
D57
VSS
D59
VSS
D62
VSS
D8
VSS
E11
VSS
E17
VSS
F20
VSS
F26
VSS
F30
VSS
F34
VSS
F38
VSS
F42
VSS
F46
VSS
F50
VSS
F54
VSS
F58
VSS
F61
VSS
G18
VSS
G22
VSS
G3
VSS
G5
VSS
G6
VSS
G8
VSS
H13
VSS
AY2
DAISY_CHAIN_NTCF_AY2
AY3
DAISY_CHAIN_NTCF_AY3
AY60
DAISY_CHAIN_NTCF_AY60
AY61
DAISY_CHAIN_NTCF_AY61
AY62
DAISY_CHAIN_NTCF_AY62
B2
DAISY_CHAIN_NTCF_B2
B3
DAISY_CHAIN_NTCF_B3
B61
DAISY_CHAIN_NTCF_B61
B62
DAISY_CHAIN_NTCF_B62
B63
DAISY_CHAIN_NTCF_B63
C1
DAISY_CHAIN_NTCF_C1
C2
DAISY_CHAIN_NTCF_C2
*HSW_ULT_DDR3L
VSS
DAISY_CHAIN_NTCF_A3
DAISY_CHAIN_NTCF_A4 DAISY_CHAIN_NTCF_A60 DAISY_CHAIN_NTCF_A61 DAISY_CHAIN_NTCF_A62 DAISY_CHAIN_NTCF_AV1
DAISY_CHAIN_NTCF_AW 1 DAISY_CHAIN_NTCF_AW 2
DAISY_CHAIN_NTCF_AW 3 DAISY_CHAIN_NTCF_AW 61 DAISY_CHAIN_NTCF_AW 62 DAISY_CHAIN_NTCF_AW 63
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
H17 H57 J10 J22 J59 J63 K1 K12 L13 L15 L17 L18 L20 L58 L61 L7 M22 N10 N3 P59 P63 R10 R22 R8 T1 T58 U20 U22 U61 U9 V10 V3 V7 W20 W22 Y10 Y59 Y63 V58 AH46 V23 AH16
DC_TEST_A3_B3
A3
TEST_A4
A4
TEST_A60
A60
DC_TEST_A61_B61
A61
TEST_A62
A62
TEST_AV1
AV1
TEST_AW1
AW1
DC_TEST_AY2_AW2
AW2
DC_TEST_AY3_AW3
AW3
DC_TEST_AY61_AW61
AW61
DC_TEST_AY62_AW62
AW62
TEST_AW63
AW63
1
05
TP21 TP26
TP27 TP33 TP32
TP34
A A
PROJECT : X11
PROJECT : X11
PROJECT : X11
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
ULT 4/9 (RSV,GND)
ULT 4/9 (RSV,GND)
ULT 4/9 (RSV,GND)
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
1
1A
1A
1A
5 40Monday, January 05, 2015
5 40Monday, January 05, 2015
5 40Monday, January 05, 2015
5
4
3
2
1
Lynx Point-LP Platform Controller Hub (LVDS,DDI)
U25M
PCH_LVDS_BLON23 PCH_DISP_ON23
D D
U25L
for DS3
SUSWARN#
SUSACK#_EC30
SYS_PWROK11,30
C C
EC_PWROK11,30
RSMRST#30
SUSWARN#_EC30
DNBSWON#11,30
RF_OFF_PCH9,29
R7471 *0_4
R7472 *0_4/S
SYS_RESET#11
PCH_SLP_S0_N11,30
SYS_RESET#
C346 *0.1U/16V_4
EC24 *220P/50V_4
EC25 *220P/50V_4
R7473 *0_4/S
R178 *0_4/S
TP51
EC_PWROK
EC_PWROK
PLTRST#
RSMRST# SUSWARN#
DNBSWON#_R
PM_BATLOW# PCH_SLP_S0_N
GPIO29
SUSACK#
AK2
SUSACK#
AC3
SYS_RESET#
AG2
SYS_PWROK
AY7
PCH_PWROK
AB5
APWROK
AG7
PLTRST#
AW6
RSMRST#
AV4
SUSWARN#/SUSPWRDNACK/GPIO30(SUS)
AL7
PWRBTN#
AJ8
ACPRESENT / GPIO31(DSW)
AN4
BATLOW# / GPIO72(DSW )
AF3
SLP_S0#
AM5
SLP_WLAN#/ GPIO29(DSW )
*HSW_ULT_DDR3L
System Power Management
DSWVRMEN
CLKRUN#/ GPIO32
SUS_STAT# / GPIO61 (SUS)
SUSCLK / GPIO62 (SUS)
SLP_S5# / GPIO63 ( DSW)
DPWROK
WAKE#
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
SLP_LAN#
AW7
AV5
AJ5
V5
AG4
AE6
AP5
AJ6
AT4
AL5
AP4
AJ7
DSWVRMEN
DPWROK_EC
PCIE_WAKE#
CLKRUN#
DSWVRMEN 7
PCIE_WAKE# 25,29,30
CLKRUN# 30
SLP_S5# 11
SUSC# 11,30
SUSB# 11,30
SLP_A# 11
SLP_SUS#_ECSLP_SUS#AC_PRESENT_R
PCH_DPST_PWM22
DPWROK_EC 30
for DS3
SLP_SUS#_EC 30AC_PRESENT_EC15,30
PCH_LVDS_BLON PCH_DISP_ON
PCH_DPST_PWM
A9
EDP_BKLEN
C6
EDP_VDDEN
B8
EDP_BKLCTL
*HSW_ULT_DDR3L
EDP SIDEBAND
DDPB_CTRLCLK
DDPB_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA
DISPLAY
DDPB_AUXN DDPB_AUXP
DDPB_HPD
DDPC_AUXN DDPC_AUXP
DDPC_HPD
EDP_HPD
B9 C9
C5 B5 C8
D9 D11
B6 A6 A8
D6
SDVO_CLK SDVO_DATA
HDMI_HPD_CON
INT_eDP_HPD_Q
SDVO_CLK 23 SDVO_DATA 23
HDMI_HPD_CON 23
06
INT. HDMI
B B
PCH Pull-high/low(CLG)
PM_BATLOW# PCIE_WAKE#
SUSACK# SUSWARN#
PWRBTN# internally PU in PCH to 3.3V_DSW
A A
CLKRUN# SYS_RESET#
RSMRST# DPWROK_EC
R168 10K_4 R259 1K_4
R567 10K_4 R588 10K_4
R526 8.2K/F_4 R551 10K_4
R578 10K_4
R593 100K_4
+3VS5
+3V_DEEP_SUS
+3V
5
for DS3
PLTRST#(CLG)
R258 100K_4
PLTRST#
PLTRST# 11,14,25,27,29,30
Reserve EDP_HPD opposites circuit!
+VCCIO_OUT
R487
DG V0.7 -> 10K
*10K_4
SCH V0.7 -> 1K
INT_eDP_HPDINT_eDP_HPD_Q
ULT_EDP_HPD 22,23
R483 100K_4
RTD2132R Vender request PD 100kohm
4
3
System PWR_OK(CLG)
SYS_PWROK EC_PWROK
R240 10K_4
+3V7,8,9,10,11,12,13,22,23,24,25,26,27,29,30,35,36
+3VS59,10,11,27,29,30,32,34,36,37,39
PROJECT : X11
PROJECT : X11
PROJECT : X11
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
ULT 5/9(Power Manger)
ULT 5/9(Power Manger)
ULT 5/9(Power Manger)
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
1
1A
1A
1A
6 40Monday, January 05, 2015
6 40Monday, January 05, 2015
6 40Monday, January 05, 2015
5
Lynx Point-LP Platform Controller Hub (HDA,JTAG,SATA)
RTC_X1
TP35
RTC_RST#11
D D
C C
B B
+3V_RTC
PCH Strap Table
R577 1M_4
ACZ_SDIN024
XDP_TRST#_CPU2,11
JTAG_TCK_PCH11 JTAG_TDI_PCH11
JTAG_TDO_PCH11
JTAG_TMS_PCH11
JTAGX_PCH2,11
Pin Name Strap description Sampled Configuration
SPKR SDIO_D0 /GPIO66 Top-Block Swap INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up HDA_SDO /I2S0_TXD
GSPI0_MOSI /GPIO86 PWROK
GPIO15
DSWVRMEN
A A
5
RTC_X2 RTC_RST# SRTC_RST# SM_INTRUDER# PCH_INVRMEN
ACZ_BCLK ACZ_SYNC
ACZ_RST#
ACZ_SDOUT
XDP_TRST#_CPU JTAG_TCK_PCH JTAG_TDI_PCH JTAG_TDO_PCH JTAG_TMS_PCH
JTAGX_PCH
PCH_SPI1_CLK PCH_SPI_CS0#
PCH_SPI1_SI PCH_SPI1_SO PCH_SPI_IO2
PCH_SPI_IO3
No reboot mode setting PWROK
Flash Descriptor Security
Only for Interposer
Boot BIOS Selection
TLS Confidentiality PWROK
Deep Sx Well On-Die Voltage Regulator Enable
U25J
AW5
RTCX1
AY5
RTCX2
AU7
RTCRST#
AV6
SRTCRST#
AU6
INTRUDER#
AV7
INTVRMEN
AW8
HDA_BCLK / I2S0_SCLK
AV11
HDA_SYNC/ I2S0_SFRM
AU8
HDA_RST#/ I2S_MCLK
AY10
HDA_SDIN0/ I2S0_RXD
AU12
HDA_SDIN1/ I2S1_RXD
AU11
HDA_SDO/ I2S0_TXD
AW10
HDA_DOCK_EN# / I2S1_TXD
AV10
HDA_DOCK_RST/ I2S1_SFRM
AY8
I2S1_SCLK
AU62
PCH_TRST#
AE62
PCH_TCK
AD61
PCH_TDI
AE61
PCH_TDO
AD62
PCH_TMS
AL11
RSVD
AC4
RSVD
AE63
JTAGX
AV2
RSVD
AA3
SPI_CLK
Y7
SPI_CS0#
Y4
SPI_CS1#
AC2
SPI_CS2#
AA2
SPI_MOSI
AA4
SPI_MISO
Y6
SPI_IO2
AF1
SPI_IO3
*HSW_ULT_DDR3L
RTC
SPI JTAG
PWROK
PWROK
ALWAYS Should be always pull-up
4
RD
AU14
LAD0
AW12
LAD1
AY12
LAD2
AW11
LAD3
AV12
LFRAME#
LPC
SATA_RN0/ PERN6_L3 SATA_RP0/ PERP6_L3
SATA_TN0/ PETN6_L3 SATA_TP0/ PETP6_L3
SATA_RN1/ PERN6_L2 SATA_RP1/ PERP6_L2
SATA_TN1/ PETN6_L2 SATA_TP1/ PETP6_L2
SATA_RN2/ PERN6_L1 SATA_RP2/ PERP6_L1
SATA_TN2/ PETN6_L1 SATA_TP2/ PETP6_L1
SATA_RN3/ PERN6_L0
AUDIO
SATA_RP3/ PERP6_L0
SATA_TN3/ PETN6_L0 SATA_TP3/ PETP6_L0
SATA0GP/ GPIO34 SATA1GP/ GPIO35 SATA2GP/ GPIO36 SATA3GP/ GPIO37
SATA_RCOMP
SATA
SATA_IREF
SATALED#
RSVD RSVD
0 = Default (weak pull-down 20K)
1 = Setting to No-Reboot mode
0 = "top-block swap" mode
1 = Default (weak pull-up 20K)
0 = Default (weak pull-down 20K)
1 = Can be Overridden
0 = ME Crypto Transport Layer Security cipher suite with no confidentiality(Default)
1 = Intel ME Crypto TLS cipher suite with confidentiality
4
GNT0#
1 0
J5 H5 B15 A15
J8 H8 A17 B17
J6 H6 B14 C15
F5 E5 C17 D17
V1 U1 V6 AC1
C12
A12
U3
L11 K10
SATA_RXN0 SATA_RXP0 SATA_TXN0 SATA_TXP0
SATA_RXN2 SATA_RXP2 SATA_TXN2 SATA_TXP2
ACC_LED# SIO_EXT_SMI# PCI_SERR# SATA3GP
SATA_RCOMP
SATA_IREF
Boot Location
LPC
SPI(Default)
LAD0 27,29,30 LAD1 27,29,30 LAD2 27,29,30 LAD3 27,29,30
LFRAME# 27,29,30
SATA_RXN0 29 SATA_RXP0 29 SATA_TXN0 29 SATA_TXP0 29
SATA_RXN2 29 SATA_RXP2 29 SATA_TXN2 29 SATA_TXP2 29
ACC_LED# 29
SIO_EXT_SMI# 30 PCI_SERR# 30
R485 3.01K/F_4
R536 10K_4
3
HDD (SATA3 6.0Gb/s)
ODD (SATA2 3.0Gb/s)
+1.05VS5+1.05V
R210 *0_4
+V1.05S_ASATA3PLL
DG recommended that SATA AC coupling capacitors should be close to the connector (<100 mils) for optimal signal quality.
+3V
SATA_LED# 29
R554 *51_4 R547 *51_4 R548 *51_4 R201 *51_4 R564 *51_4
Close to Chipset
Circuit
PCH_INVRMEN
R581 1K_4
+3V_RTC
+3V_RTC
GPIO33_EC30
R576 330K_4
3
R575 330K_4
PCH_SPI_CS0#_R30 PCH_SPI1_CLK_R30 PCH_SPI1_SI_R30 PCH_SPI1_SO_R30
ACZ_SDOUT
DSWVRMEN 6
PCH_SPI_CS0#_R PCH_SPI1_CLK_R PCH_SPI1_SI_R PCH_SPI1_SO_R
JTAGX_PCH JTAG_TMS_PCH JTAG_TDI_PCH JTAG_TDO_PCH JTAG_TCK_PCH
2
RTC Clock 32.768KHz
R582 *0_4
R573
10M_4
RTC_X1
RTC_X2
C369 18P/50V_4
32.768KHZ
C360 18P/50V_4
23
Y4
4 1
no stuff If use green Clock
RTC Circuitry(RTC)
+3V_RTC_0
+3V_RTC_0
12
CN28 BAT_CONN
RTC Power trace width 20mils.
+3VPCU
R302 1K_4
+3V_RTC_1
BAT54CW-7-F
Uninstall for Green-CLK
HDA Bus(CLG)
+3V_DEEP_SUS
ACZ_SYNC_AUDIO24
ACZ_RST#_AUDIO24
ACZ_SDOUT_AUDIO24
BIT_CLK_AUDIO24
Vender EON Winbond
GigaDevice
Socket
R574 *1K_4
C741
*10P/50V_4
Size
P/N
8MB AKE3EZN0Q01 (EN25QH64-104HIP)
AKE3EFP0N07 (W25Q64FVSSIQ)
8MB
AKE3EGN0Q01 (GD25B64BSIGR)
8MB
DFHS08FS023
U23&U24 footprint
ACZ_SYNC
R585 33_4 R590 33_4 R589 33_4 R591 33_4
󴣊󵄖󳓓
PCH SPI ROM(CLG)
TP24 TP30
TP66-71 need place to TOP
R457/R453/R450/R451/R546/R548 close to U15 pin
C713 1U/6.3V_4
+3V 6,8,9,10,11,12,13,22,23,24,25,26,27,29,30,35,36
+5V 23,24,25,26,29,36 +1.05V 2,4,9,10,11,27,30,34,35,36
+3VS5 6,9,10,11,27,29,30,32,34,36,37,39 +3VPCU 4,25,26,27,29,30,31,32 +3V_RTC 10,27
+V1.05S_ASATA3PLL 10
2
TP28 TP23 TP25 TP29
PCH_SPI_CS0# PCH_SPI1_SI PCH_SPI1_SI_R
PCH_SPI1_SO PCH_SPI1_SO_R
+3VSPI
PCH_SPI_IO2
PCH_SPI_CS0#_R PCH_SPI1_CLK_R PCH_SPI1_SI_R
PCH_SPI1_SO_R
BIOS_WP# HOLD#
R488 15/F_4 R505 15/F_4 R507 15/F_4 R489 15/F_4
R491 3.3K/F_4
1
CLKGEN_RTC_X1 27
RTC_RST#
3
2
Q19
2N7002K(DMN601K-7)
1
20mils
+3V_RTC
R277
20K/F_4
R256 20K/F_4
D9
C388
1U/6.3V_4
R265 *0_6
GPIO Pull UP
ACC_LED# ACZ_SYNC ACZ_RST# ACZ_SDOUT ACZ_BCLK
SIO_EXT_SMI#
PCI_SERR#
SATA3GP
4M SPI ROM Socket
PCH_SPI_CS0#_R PCH_SPI1_CLK_R PCH_SPI1_SI_R PCH_SPI1_SO_R
BIOS_WP#
PCH_SPI_CS0#_R PCH_SPI1_CLK_RPCH_SPI1_CLK
C716 22P/50V_4
R490 15/F_4
1 6 5 2
3
BIOS_WP#
PROJECT : X11
PROJECT : X11
PROJECT : X11
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
ULT 6/9(SATA/HDA)
ULT 6/9(SATA/HDA)
ULT 6/9(SATA/HDA)
Date: Sheet of
Date: Sheet of
Date: Sheet of
+3V_DEEP_SUS
U24
CE#
VDD SCK SI SO
HOLD#
WP#
VSS
W25Q64FVSSIQ
AKE3EFP0N07
1
1 6 5 2
3
07
EC_RTC_RST 30
R293 10K_4
J1
*SOLDERJUMPER-2
1 2
RTC_RST#
C367 1U/6.3V_4
SRTC_RST#
C358 1U/6.3V_4
SRTC_RST#RTC_RST#
R538 10K_4 R528 10K_4 R527 10K_4 R550 10K_4
U23
CE# SCK SI SO
WP#
*A25LQ32AM-F/Q
DFHS08FS023
91960-0084L-8P-SOCKET
8
7 4
VDD
HOLD#
VSS
+3VSPI
R500 3.3K/F_4
HOLD#
R504 15/F_4
PCH_SPI_IO3
8
7
HOLD#
4
C714
0.1U/16V_4
7 40Tuesday, January 06, 2015
7 40Tuesday, January 06, 2015
7 40Tuesday, January 06, 2015
+3V
+3VSPI
1A
1A
1A
5
PCI/USBOC# Pull-up(CLG)
DGPU_PWR_EN TS_INTB#_ULT
PIRQC# PIRQD#
GPIO77_ULT GPIO52_ULT GPU_EVENT# GC6_FB_EN DGPU_HOLD_RST#
D D
DGPU_HOLD_RST#
SMBALERT# USB_OC1# USB_OC2# USB_OC3# USB_OC4#
C C
B B
DGPU_HOLD_RST#14
DGPU_PWR_EN15,37,39
R520 2.2K_4 R523 10K_4
R516 10K_4 R518 10K_4
R514 10K_4 R511 10K_4 R510 *10K_4 R139 *10K_4 R493 10K_4 R492 *100K_4
R186 10K_4 R195 10K_4 R211 10K_4 R561 10K_4 R571 10K_4
USB3.0 M/B
USB30_RX1-28 USB30_RX1+28 USB30_TX1-28 USB30_TX1+28
Lynx Point-LP Platform Controller Hub (HDA,JTAG,SATA)
+3V
+3V_DEEP_SUS
for DS3
GPIO77_ULT TS_INTB#_ULT PIRQC# PIRQD#
GPIO52_ULT
DGPU_PWR_EN_R DGPU_HOLD_RST#
GPU_EVENT# GC6_FB_EN
G20 H20 C33
B34
E18 F18 B33 A33
U6 P4 N4 N2
L1 L3
R5 L4 U7
AD4
U25N
USB3RN1 USB3RP1 USB3TN1 USB3TP1
USB3RN2 USB3RP2 USB3TN2 USB3TP2
PIRQA#/ GPIO77 PIRQB#/ GPIO78 PIRQC#/ GPIO79 PIRQD#/ GPIO80
GPIO52 GPIO54
GPIO51 GPIO53 GPIO55
PME#
PCI
C- Link
USBRBIAS#
USB
OC0# / GPIO40(SUS) OC1# / GPIO41(SUS) OC2# / GPIO42(SUS) OC3# / GPIO43(SUS)
4
CL_CLK
CL_DATA
CL_RST#
USB2.0(M/B-1) USB2.0 Small board
USB2.0 Small board
Camera WLAN TS
USB2N0 USB2P0 USB2N1 USB2P1 USB2N2 USB2P2 USB2N3 USB2P3 USB2N4 USB2P4 USB2N5 USB2P5 USB2N6 USB2P6 USB2N7 USB2P7
USBRBIAS
RSVD RSVD
Cardreader
AF2 AD2 AF4
(USBP1)
AN8 AM8 AR7 AT7 AR8 AP8 AR10 AT10 AM15 AL15 AM13 AN13 AP11 AN11 AR13 AP13
AJ10 AJ11
AN10 AM10
AL3 AT1 AH2 AV3
USBP0- 25 USBP0+ 25 USBP1- 28 USBP1+ 28 USBP2- 23 USBP2+ 23
USBP5- 25 USBP5+ 25 USBP6- 29 USBP6+ 29 USBP7- 27 USBP7+ 27
TIE TRACES TOGETHER CLOSE TO PINS WITH LENGTH TO RESISTOR
USB_BIAS
R193
USB_OC1# USB_OC2# USB_OC3# USB_OC4#
WLAN
(USBP5) (USBP0)
(USBP2) (USBP6) (USBP7)
Cardreader
22.6/F_4
LAN
PCIE_RXN2_CARD25 PCIE_RXP2_CARD25
PCIE_TXN2_CARD25 PCIE_TXP2_CARD25
PCIE_RXN3_WLAN29 PCIE_RXP3_WLAN29
PCIE_TXN3_WLAN29 PCIE_TXP3_WLAN29
PCIE_RXN4_LAN25 PCIE_RXP4_LAN25
PCIE_TXN4_LAN25 PCIE_TXP4_LAN25
+V1.05S_AUSB3PLL10
WLAN
USB30_RX3-25 USB30_RX3+25 USB30_TX3-25 USB30_TX3+25
LAN
PEG_RXN014 PEG_RXP014 PEG_TXN014 PEG_TXP014
PEG_RXN114 PEG_RXP114 PEG_TXN114 PEG_TXP114
PEG_RXN214 PEG_RXP214 PEG_TXN214 PEG_TXP214
PEG_RXN314 PEG_RXP314 PEG_TXN314 PEG_TXP314
PCIE_CLKREQ_CR#25
VGA
3
U25K
G17
PERN1 / USB3RN3
F17
PERP1 / USB3RP3
C30
PETN1 / USB3TN3
C31
PETP1 / USB3TP3
F15
PERN2/ USB3RN4
G15
C705 0.1U/16V_4 C711 0.1U/16V_4
C256 0.1U/16V_4 C244 0.1U/16V_4
C698 0.1U/16V_4 C701 0.1U/16V_4
C691 0.22U/10V_4 C692 0.22U/10V_4
C686 0.22U/10V_4 C687 0.22U/10V_4
C690 0.22U/10V_4 C688 0.22U/10V_4
C693 0.22U/10V_4 C689 0.22U/10V_4
CLK_PCIE_CRN25
CLK_PCIE_CRP25
CLK_PCIE_WLANN29 CLK_PCIE_WLANP29
PCIE_CLKREQ_WLAN#29
CLK_PCIE_LANN25 CLK_PCIE_LANP25
PCIE_CLKREQ_LAN#25
CLK_VGA_N14 CLK_VGA_P14
PCIE_CLKREQ_VGA#15
PCIE_TXN2_CARD_C PCIE_TXP2_CARD_C
PCIE_TXN3_WLAN_C PCIE_TXP3_WLAN_C
PEG_TXN0_C PEG_TXP0_C
PEG_TXN1_C PEG_TXP1_C
PEG_TXN2_C PEG_TXP2_C
PEG_TXN3_C PEG_TXP3_C
R150 3.01K/F_4
PCIE_CLKREQ0#
PCIE_CLKREQ_CR# CLK_PCIE_WLANN
CLK_PCIE_WLANP PCIE_CLKREQ_WLAN# CLK_PCIE_LANN
CLK_PCIE_LANP PCIE_CLKREQ_LAN# CLK_VGA_N
CLK_VGA_P PCIE_CLKREQ_VGA#
PCIE_CLKREQ5#
PCIE_RXN4_LAN PCIE_RXP4_LAN PCIE_TXN4_LAN_C PCIE_TXP4_LAN_C
PCIE_IREF
PCIE_RCOMP
CLK_PCIE_CRN CLK_PCIE_CRP
PERP2/ USB3RP4
B31
PETN2/ USB3TN4
A31
PETP2/ USB3TP4
G11
PERN3
F11
PERP3
C29
PETN3
B30
PETP3
F13
PERN4
G13
PERP4
B29
PETN4
A29
PETP4
F10
PERN5_L0
E10
PERP5_L0
C23
PETN5_L0
C22
PETP5_L0
F8
PERN5_L1
E8
PERP5_L1
B23
PETN5_L1
A23
PETP5_L1
H10
PERN5_L2
G10
PERP5_L2
B21
PETN5_L2
C21
PETP5_L2
E6
PERN5_L3
F6
PERP5_L3
B22
PETN5_L3
A21
PETP5_L3
B27
PCIE_IREF
A27
PCIE_RCOMP
E15
RSVD
E13
RSVD
C43
CLKOUT_PCIE0N
C42
CLKOUT_PCIE0P
U2
PCIECLKRQ0# / GPIO18
B41
CLKOUT_PCIE_N1
A41
CLKOUT_PCIE_P1
Y5
PCIECLKRQ1# / GPIO19
C41
CLKOUT_PCIE_N2
B42
CLKOUT_PCIE_P2
AD1
PCIECLKRQ2# / GPIO20
B38
CLKOUT_PCIE_N3
C37
CLKOUT_PCI_P3
N1
PCIECLKRQ3# / GPIO21
A39
CLKOUT_PCIE_N4
B39
CLKOUT_PCIE_P4
U5
PCIECLKRQ4# / GPIO22
B37
CLKOUT_PCIE_N5
A37
CLKOUT_PCIE_P5
T2
PCIECLKRQ5# / GPIO23
*HSW_ULT_DDR3L
2
SMBALERT# / GPIO11(SUS)
SMBUS
SML0ALERT# / GPIO60(SUS)
SML1ALERT# / PCHHOT# / GPIO73(SUS)
SML1DATA / GPIO74(SUS)
PCI-E*
CLOCK SIGNALS
SMBCLK
SMBDATA
SML0CLK
SML0DATA
SML1CLK / GPIO75(SUS)
XTAL24_IN
XTAL24_OUT
CLKOUT_ITPXDP#
CLKOUT_ITPXDP_P
CLKOUT_LPC_0 CLKOUT_LPC_1
DIFFCLK_BIASREF
RSVD
RSVD TESTLOW_C35 TESTLOW_C34 TESTLOW_AK8
TESTLOW_AL8
AN2
SMBALERT# SMB_PCH_CLK
AP2
SMB_PCH_DAT
AH1
AL2
SML0ALERT# SMB_ME0_CLK
AN1
SMB_ME0_DAT
AK1
AU4
SML1ALERT# SMB_ME1_CLK
AU3
SMB_ME1_DAT
AH3
XTAL24_IN
A25
XTAL24_OUT
B25
CK_XDP_N_R
B35
CK_XDP_P_R
A35
RP1 install for XDP
CLK_PCI_EC_R
AN15
CLK_PCI_LPC_R
AP15
XCLK_BIASREF
C26
K21 M21 C35
R148 10K_4
C34
R152 10K_4
AK8
R239 10K_4
AL8
R245 10K_4
*0_4P2R_4
RP1
4 2
R242 22_4 R254 22_4
R243 *22_4
R149
3.01K/F_4
1
TP10
3 1
EC26 18P/50V_4
EMI(near PCH)
EC29 18P/50V_4
EMI(near PCH)
EC27 *18P/50V_4
08
CK_XDP_N 11 CK_XDP_P 11
CLK_24M_KBC 30 CLK_24M_DEBUG 29
CLK_PCI_TPM 27
+V1.05S_AXCK_LCPLL 10
*HSW_ULT_DDR3L
SMBus/Pull-up(CLG) CLK_REQ/Strap Pin(CLG)
Q38
MBCLK213,22,30
MBDATA213,22,30
A A
R185 4.7K_4
+3V
SMB_RUN_DAT11,12,13,22,26
R194 4.7K_4
+3V
SMB_RUN_CLK11,12,13,22,26
5
4 3
1
*2N7002DW
Q12
4 3
1
2N7002DW
+3V
5
SMB_ME1_CLK
2
SMB_ME1_DAT
6
+3V
5
SMB_PCH_DAT
2
SMB_PCH_CLK
6
4
PCIE_CLKREQ0# PCIE_CLKREQ5# PCIE_CLKREQ_WLAN# PCIE_CLKREQ_LAN# PCIE_CLKREQ_CR# PCIE_CLKREQ_VGA#
R534 10K_4 R535 10K_4 R530 10K_4 R519 10K_4 R268 10K_4 R158 10K_4
+3V
R147 *0_4
C246 12P/50V_4
XTAL24_IN XTAL24_OUT
3
R153 1M_4
1
3
C245 12P/50V_4
TP4
2
24MHZ +-30PPM Y1
4
TP5
PCH_XTAL24_IN 27
+3V_DEEP_SUS6,7,9,10,11
2
for DS3
+3V_DEEP_SUS
+3V6,7,9,10,11,12,13,22,23,24,25,26,27,29,30,35,36
SMBus/Pull-up(CLG)
R570 2.2K_4 R566 2.2K_4
R569 2.2K_4 R568 2.2K_4
R572 2.2K_4 R560 2.2K_4
R238 10K_4 R192 1K_4
PROJECT : X11
PROJECT : X11
PROJECT : X11
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
SMB_PCH_CLK SMB_PCH_DAT
SMB_ME0_CLK SMB_ME0_DAT
SMB_ME1_CLK SMB_ME1_DAT
SML1ALERT# SML0ALERT#
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
ULT 7/9 (PCIE/USB/CLK)
ULT 7/9 (PCIE/USB/CLK)
ULT 7/9 (PCIE/USB/CLK)
1
8 40Monday, January 05, 2015
8 40Monday, January 05, 2015
8 40Monday, January 05, 2015
1A
1A
1A
5
R177 *0_4
R553 *0_4
TP11
SIO_EXT_SCI#
BT_OFF RF_OFF_PCH_R LAN_DISABLE# GPIO13_ULT GPIO14_ULT
ODD_PRSNT#_R
BOARD_ID6 GPIO25_ULT BOARD_ID7 GPIO27 BOARD_ID8 DEVSLP0 DEVSLP1 DEVSLP2 GPIO44_ULT BOARD_ID4 GPIO46_ULT BOARD_ID5
GPIO49_ULT GPIO50_ULT BOARD_ID0 BOARD_ID1 BOARD_ID2 BOARD_ID3 GPIO70_ULT MPHY_PWREN
GPIO76_ULT
SIO_EXT_SCI#30
BT_OFF29
RF_OFF_PCH6,29
D D
ZERO_ODD_DP#29
C C
ACCEL_INTA#27
B B
ACZ_SPKR24
TP for DG
TP12
DGPU_PWROK15,30,37,39
BT_COMBO_EN#
MPHY_PWREN36
Lynx Point-LP Platform Controller Hub
Lynx Point-LP Platform Controller Hub
Lynx Point-LP Platform Controller HubLynx Point-LP Platform Controller Hub (HDA,JTAG,SATA)
(HDA,JTAG,SATA)
(HDA,JTAG,SATA)(HDA,JTAG,SATA)
U25O
AU2 AM3 AM2 AM7
AT3
AH4
AD6
Y1 T3
AD5 AM4
AN3
AN5
AD7
P2
L2
N5 AK4 AG5 AG3 AB6
U4
Y3
P3 AG6 AP1
AL4
AT5
C4
Y2
P1
V2
*HSW_ULT_DDR3L
4
GPIO8(SUS) GPIO9(SUS) GPIO10(SUS) LAN_PHY_PWR_CTRL / GPIO12(DSW) GPIO13(SUS) GPIO14(SUS) GPIO15(SUS) GPIO16 GPIO17 GPIO24 (SUS) GPIO25(DSW) GPIO26(SUS) GPIO27(DSW) GPIO28(SUS) DEVSLP0/ GPIO33 DEVSLP1/ GPIO38 DEVSLP2/ GPIO39 GPIO44(SUS) GPIO45(SUS) GPIO46(SUS) GPIO47(SUS) GPIO48 GPIO49 GPIO50 GPIO56(SUS) GPIO57(SUS) GPIO58(SUS) GPIO59(SUS) SDIO_POWER_EN/ GPIO70 HSIOPC/ GPIO71
BMBUSY# / GPIO76
SPKR/ GPIO81
GPIO
Haswell (GPIO)
PCH_THRMTRIP#
D60
THRMTRIP#
EC_RCIN#
SERIRQ
RSVD RSVD
V4 T4
AW15 AF20 AB21
R6 L6 N6 L8
R7 L5 N7 K2
J1 K3 J2 G1
K4 G2 J3 J4
F2 F3 G4 F1
E3 F4 D3 E4 C3 E2
SERIRQ
PCH_OPI_RCOMP
GSPI0_CS
GSPI0_CLK
GSPI0_MISO
GSPI1_CS
GSPI1_CLK GSPI1_MISO GSPI1_MOSI
UART0_RXD
UART0_TXD
UART0_RTS UART0_CTS
UART1_RXD
UART1_TXD
UART1_RST UART1_CTS
I2C0_SDA I2C0_SCL I2C1_SDA I2C1_SCL
SDIO_CLK
SDIO_CMD
SDIO_D1 SDIO_D2 SDIO_D3
RCIN#/ GPIO82
PCH_OPI_RCOMP
CPU/MISC
GSPI0_CS/ GPIO83
GSPI0_CLK/ GPIO84 GSPI0_MISO/ GPIO85 GSPI0_MOSI/ GPIO86
GSPI1_CS/ GPIO87
GSPI1_CLK/ GPIO88 GSPI1_MISO/ GPIO89 GSPI1_MOSI/ GPIO90
UART0_RXD/ GPIO91
UART0_TXD/ GPIO92 UART0_RTS/ GPIO93 UART0_CTS/ GPIO94
UART1_RXD/ GPIO0
SERIAL IO
UART1_TXD/ GPIO1
UART1_RST/ GPIO2
UART1_CTS/ GPIO3
I2C0_SDA/ GPIO4 I2C0_SCL/ GPIO5 I2C1_SDA/ GPIO6 I2C1_SCL/ GPIO7
SDIO_CLK/ GPIO64
SDIO_CMD/ GPIO65
SDIO_D0/ GPIO66 SDIO_D1/ GPIO67 SDIO_D2/ GPIO68 SDIO_D3/ GPIO69
3
R529 10K_4
R583
49.9/F_4
PM_THRMTRIP# 30
EC_RCIN# 30
+3V SERIRQ 27,30
2
RP2
GSPI1_CLK I2C1_SDA GSPI0_MISO UART0_TXD SDIO_CMD
UART1_TXD UART0_RTS UART0_RXD UART1_RST
10
9 8 7 4
10K_10P8R_6
RP5
10
9 8 7 4
10K_10P8R_6
1 2 3
56
1 2 3
56
GSPI0_CS GSPI1_CS GSPI1_MISO
+3V
GSPI0_CLK UART1_RXD GSPI1_MOSI UART1_CTS
+3V
RP6
10
SDIO_D2 SDIO_D1 SDIO_D3 SDIO_CLK
9 8 7 4
10K_10P8R_6
1 2 3
56
GPIO Pull-up/Pull-down(CLG)
SIO_EXT_SCI# BT_OFF RF_OFF_PCH_R GPIO13_ULT GPIO14_ULT
GPIO44_ULT GPIO46_ULT
GPIO49_ULT GPIO50_ULT ODD_PRSNT#_R DGPU_PWROK DEVSLP0
DEVSLP2 BT_COMBO_EN# GPIO70_ULT EC_RCIN#
GPIO76_ULT MPHY_PWREN MPHY_PWREN
GPIO12 LAN_DISABLE# SUS -->Check list +3V -->Datasheet
GPIO25_ULT LAN_DISABLE# GPIO27
Close to EC
PM_THRMTRIP#
UART0_CTS I2C0_SCL I2C0_SDA I2C1_SCL
+3V
R184 1K_4
1
R173 10K_4 R169 10K_4 R626 10K_4
09
+3V_DEEP_SUS
R282 10K_4 R180 10K_4 R172 10K_4 R218 10K_4 R183 10K_4
R565 10K_4 R541 10K_4
R552 10K_4 R524 10K_4 R546 10K_4 R513 10K_4 R515 10K_4
R499 10K_4 R512 *10K_4 R486 10K_4 R269 10K_4
R525 10K_4 R544 100K_4 R545 *10K_4
+V1.05S_VCCST
+3V
+3VS5
R174 *10K_4
R205 10K_4
R558 10K_4
R248 10K_4
R175 *10K_4
R167 10K_4 R161 10K_4 R204 10K_4 R160 10K_4
(X12)
BOARD_ID[2:1]
01
15"
17"10
BOARD_ID0
0󶁪󶁪󶁪󶁪UMA14"00
1󶁪󶁪󶁪󶁪DIS
4
Model
Definition
A A
Reserve
(Default = 00)
BOARD_ID[6:5]
Reserve
(Default = 00)
5
00 01
10
11
Board ID [4:3]BOARD_ID[8:7]
Single Rank Dual Rank
Meso-AMD
Reserve
(X12)
(X11)
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5 BOARD_ID6 BOARD_ID7 BOARD_ID8
R539 10K_4
R199 *10K_4
R559 *10K_4
R255 *10K_4
R540 10K_4
R549 *10K_4
R164 *10K_4 R198 *10K_4 R163 *10K_4
3
+3V_DEEP_SUS
+3V6,7,8,10,11,12,13,22,23,24,25,26,27,29,30,35,36
+3VS56,10,11,27,29,30,32,34,36,37,39
PROJECT : X11
PROJECT : X11
PROJECT : X11
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
ULT 8/9 (GPIO/MISC)
ULT 8/9 (GPIO/MISC)
ULT 8/9 (GPIO/MISC)
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
1
1A
1A
1A
9 40Monday, January 05, 2015
9 40Monday, January 05, 2015
9 40Monday, January 05, 2015
5
+1.05V
D D
C309
1U/6.3V_4
+1.05V
+1.05V
VCCASW=658mA
TP8
+1.05V
C C
TP7
+V3.3DX_1.5DX_ADO
B B
A A
TP9
+3V_DEEP_SUS
+3VS5
+3V
VCC1_05=1.741A
C307 0.47U/6.3V_4
+3VS5
C288 1U/6.3V_4 C735 *22U/6.3V_6
DcpSus1=109mA
C243 1U/6.3V_4 C235 1U/6.3V_4 C257 *1U/6.3V_4
+V1.05S_AIDLE
C281 *1U/6.3V_4
C708 *1U/6.3V_4 C694 *22U/6.3VS_6 C695 *22U/6.3VS_6 C710 *1U/6.3V_4 C700 *22U/6.3VS_6 C699 *22U/6.3VS_6
DcpSus3=10mA
+V3.3DX_1.5DX_PAZSUS_PCH
C308 1U/6.3V_4
DcpSus2=25mA
VCCSUS3_3=63mA
C301 1U/6.3V_4
VCCDSW3_3=114mA
C316 *1U/6.3V_4 C317 0.47U/6.3V_4
C125 1U/6.3V_4
+V1.05S_CORE_PCH
C3061U/6.3V_4 C2941U/6.3V_4 C27410U/6.3VS_6
+PCH_VCCDSW
+V1.05M_ASW
+V1.05M_FHV0 +V1.05M_FHV1
+V1.05A_SUS_PCH +V1.05DX_MODPHY_PCH
VCCHSIO=1.838A
+V1.05S_AUSB3PLL
VCCSATA3PLL=42mA
+V1.05S_ASATA3PLL
+V1.05A_VCCUSB3SUS
VCCHDA=11mA
+V1.05A_USB2SUS
+V3.3A_PSUS
+3.3V_A_DSW_P
+V3.3S_PCORE
U25P
J11
VCC1_05
H11
VCC1_05
H15
VCC1_05
AE8
VCC1_05
AF22
VCC1_05
AG19
DCPSUSBYP
AG20
DCPSUSBYP
AE9
VCCASW
AF9
VCCASW
AG8
VCCASW
AG14
VCCASW
AG13
VCCASW
AD10
DCPSUS1
AD8
DCPSUS1
K9
VCCHSIO
L10
VCCHSIO
M9
VCCHSIO
N8
VCC1_05
P9
VCC1_05
B18
VCCUSB3PLL
B11
VCCSATA3PLL
J13
DCPSUS3
AH14
VCCHDA
AH13
DCPSUS2
AC9
VCCSUS3_3
AA9
VCCSUS3_3
AH10
VCCDSW3_3
V8
VCC3_3
W9
VCC3_3
INT
*HSW_ULT_DDR3L
+V3.3DX_1.5DX_ADO
POWER
CORE
VCCMPHY
USB3
HDA
VRM
GPIO/ LCC
R171 *0_4 R179 *0_4/S
4
RTC
SPI
ICC
THERMAL SENSOR
OPI
SERIAL IO
SUS OSCILLATOR
USB2
+1.5V +3V
VCCSUS3_3
VCCRTC
DCPRTC
VCCSPI
VCCCLK VCCCLK
VCCACLKPLL
VCCCLK
VCCCLK VCCCLK
RSVD RSVD RSVD
VCCSUS3_3 VCCSUS3_3
VCCTS1_5
VCC3_3 VCC3_3
RSVD VCCAPLL VCCAPLL
VCCSDIO VCCSDIO
DCPSUS4
RSVD
VCC1_05 VCC1_05
3
Lynx Point-LP Platform Controller Hub (HDA,JTAG,SATA)(POWER)
+V3.3A_DSW_PRTCSUS
AH11
VCCRTC < 1mA
AG10
AE7
+VCCRTCEXT
VCCSPI=18mA
Y8
+V3.3M_PSPI
+V1.05S_AXCK_DCB
J18 K19
A20
+V1.05S_AXCK_LCPLL
J17
+V1.05S_SSCF100
R21 T21
+V1.05S_SSCFF
K18 M20 V21
+V3.3A_PSUS
AE20 AE21
VCCTS1_5=3mA
+V1.5S_ATS
J15
+V3.3S_PTS
K14
VCC3_3=41mA
K16
VCCAPLL=57mA
Y20 AA21 W21
+V1.05S_APLLOPI
VCCSDIO=17mA
U8
+V3.3S_1.8S_SDIO_PCH
T9
+V1.05A_AOSCSUS
AB8
AC20
+V1.05S_DUSB
AG16 AG17
C374 1U/6.3V_4
C311 0.1U/16V_4
C373 *0.1U/16V_4
L16 *2.2uH/500mA_0_6/S
C289 *1U/6.3V_4 C300 *47U/6.3VS_6 C299 *47U/6.3VS_6
L46 *2.2uH/500mA_0_6/S
C707 *1U/6.3V_4 C697 *47U/6.3VS_6 C696 *47U/6.3VS_6
C273 1U/6.3V_4
C293 1U/6.3V_4
C175 0.1U/16V_4
C305 *1U/6.3V_4
C303 *47U/6.3VS_6 C304 *47U/6.3VS_6
C282 1U/6.3V_4
DcpSus4=1mA
C291 1U/6.3V_4
C310 *1U/6.3V_4
R278 *0_4
+3V_DEEP_SUS
+3V_RTC
C364 1U/6.3V_4 C368 0.1U/16V_4 C371 0.1U/16V_4
+3V_DEEP_SUS +3V +1.05V
+1.05V
+1.05V
+1.05V
+V3.3A_PSUS
+1.5V +3V
+1.05V
+3V
+1.05V
+1.05V_MODPHY
VCCACLKPLL=31mA
VCCCLK=200mA
SLP_SUS_ON30
2
1
10
L45 *2.2uH/500mA_0_6/S
L44 *2.2uH/500mA_0_6/S
R563 100K_4
C720 1U/6.3V_4
C724 *10P/50V_4
20mil 20mil
for DS3
U26
5
IN
4
IN
3
ON/OFF
G5243AT11U-E
+V1.05S_ASATA3PLL
+V1.05S_AUSB3PLL
+V1.05DX_MODPHY_PCH
+3V_DEEP_SUS+3VS5
1
OUT
2
GND
C726
0.1U/16V_4
PROJECT : X11
PROJECT : X11
+5V23,24,25,26,29,36
+1.05V2,4,7,9,11,27,30,34,35,36
+3VS56,9,11,27,29,30,32,34,36,37,39 +5VS513,25,28,32,33,34,35,36,37,39
5
+V1.05S_AUSB3PLL8 +V1.05S_ASATA3PLL7 +V1.05S_AXCK_LCPLL8
+3V6,7,8,9,11,12,13,22,23,24,25,26,27,29,30,35,36
+3V_RTC7,27
+1.35VSUS2,4,12,13,33
4
3
2
PROJECT : X11
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
ULT 9/9(POWER-2)
ULT 9/9(POWER-2)
ULT 9/9(POWER-2)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
10 40Monday, January 05, 2015
10 40Monday, January 05, 2015
10 40Monday, January 05, 2015
1A
1A
1A
5
D D
H_VCCST_PWRGD4
+1.05V
C C
H_VCCST_PWRGD VCCST_PWRGD_XDP
C380 0.1U/16V_4
4
XDP_PREQ#_CPU2
XDP_PRDY#_CPU2
CFG04 CFG14
CFG24 CFG34
XDP_BPM02 XDP_BPM12
CFG44 CFG54
CFG64
R289 1K_4
CFG74
PWR_DEBUG4
SMB_RUN_DAT8,12,13,22,26 SMB_RUN_CLK8,12,13,22,26
XDP_TCK02,7
R288 1K_4
CFG1 CFG2
CFG3 OBSFN_B0
OBSFN_B1 CFG4
CFG5 CFG6
CFG7
DNBSWON#
H_SYS_PWROK_XDP
XDP_TCK1 XDP_TCK0
3
CN8
31
31 323229 333328 343427 353526 363625 373724 383823 393922 404021 414120 424219 434318 444417 454516 464615 474714 484813 494912 505011 515110 52529 53538 54547 55556 56565 57574 58583 59592 60601
*SEC_BSH-030-01-L-D-A-TR
30
30
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
OBSFN_C0 OBSFN_C1
CFG8 CFG9
CFG10 CFG11
OBSFN_D0 OBSFN_D1
CFG12 CFG13
CFG14 CFG15
XDP_RST
XDP_DBRESET_N
XDP_TDO XDP_TRST# XDP_TDI XDP_TMS
R270 1K_4
CFG17 4 CFG16 4
CFG8 4 CFG9 4
CFG10 4 CFG11 4
CFG19 4 CFG18 4
CFG12 4 CFG13 4
CFG14 4 CFG15 4
CK_XDP_P 8 CK_XDP_N 8
CFG3
2
C361 0.1U/16V_4
1
11
+1.05V
XDP_DBRESET_N
APS
B B
CN9
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18
*ACES_88511-180N
A A
5
+3VS5+3V_DEEP_SUS
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
R283 *0_4
SUSB# 6,11,30
SLP_S5# 6 SUSC# 6,30 SLP_A# 6
RTC_RST# 7 DNBSWON# 6,30 SYS_RESET# 6
PCH_SLP_S0_N 6,30
SUSB# 6,11,30
4
+3V_DEEP_SUS
R263 1K_4
C362
0.1U/16V_4
+V1.05S_VCCST
JTAGX_PCH2,7 JTAG_TMS_PCH7 JTAG_TDI_PCH7
JTAG_TDO_PCH7
JTAG_TCK_PCH7
3
HWPG4,30,32,33,34
R271 *0_4
+3V
XDP_TDO
XDP_TDI_R
XDP_TMS
XDP_TRST#
R264 *51_4 R287 *0_4
R286 *0_4
H_SYS_PWROK_XDP
+3V
XDP_TDI_RXDP_TDI
XDP_TDO XDP_TCK0 XDP_TMS XDP_TDI XDP_TDO XDP_TCK0XDP_TDI_R XDP_TCK1
R290 *1K_4
C381
0.1U/16V_4
C378
0.1U/16V_4
U12
14
VCC
2
1A
1
1OE
5
2A
4
2OE
9
3A
10
3OE
12
4A
13
4OE
*SN74CBTLV3126RGYR
+3V_DEEP_SUS
3
1B
6
2B
8
3B
11
4B
15
DPAD
7
GND
SYS_PWROK6,30
PLTRST#6,14,25,27,29,30
2
R262 1K_4
PROJECT : X11
PROJECT : X11
PROJECT : X11
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
HSW XDP & APS
HSW XDP & APS
HSW XDP & APS
Date: Sheet of
Date: Sheet of
Date: Sheet of
XDP_TDO_CPU 2
XDP_TDI_CPU 2
XDP_TMS_CPU 2
XDP_TRST#_CPU 2,7
H_SYS_PWROK_XDP
XDP_RST
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
ULT
ULT
ULT
1
11 40Monday, January 05, 2015
11 40Monday, January 05, 2015
11 40Monday, January 05, 2015
1A
1A
1A
5
DIMM & Footprint
M_A_A[15:0]3
D D
M_A_BS#03 M_A_BS#13 M_A_BS#23 M_A_CS#03 M_A_CS#13 M_A_CLKP03 M_A_CLKN03 M_A_CLKP13 M_A_CLKN13 M_A_CKE03 M_A_CKE13 M_A_CAS#3 M_A_RAS#3
R348 10K_4 R340 10K_4
C C
M_A_WE#3
SMB_RUN_CLK8,11,13,22,26 SMB_RUN_DAT8,11,13,22,26
M_A_ODT013 M_A_ODT113
M_A_DQSP[7:0]3
M_A_DQSN[7:0]3
CPU Bracket
B B
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15
DIMM0_SA0 DIMM0_SA1 +SMDDR_VREF_DIMM SMB_RUN_CLK SMB_RUN_DAT
M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7 M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7
JDIM2A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12 29 47
64 137 154 171 188
10
27
45
62 135 152 169 186
PC2100 DDR3 SDRAM SO-DIMM
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7
DDR3-DIMM0_H=4.0_STD
ddr-ddrsk-20401-tp4b-204p-smt
DGMK0000160
SOCKET DDR3 SODIMM(204P,H4.0,STD)TOP BSQ
4
󱍕󱍕󱍕󱍕
Joshua
󲌙󲌙󲌙󲌙󰻤󰻤󰻤󰻤
M_A_DQ5
5
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46
(204P)
DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
EZIW
M_A_DQ4
7
M_A_DQ6
15
M_A_DQ2
17
M_A_DQ1
4
M_A_DQ0
6
M_A_DQ7
16
M_A_DQ3
18
M_A_DQ13
21
M_A_DQ12
23
M_A_DQ14
33
M_A_DQ15
35
M_A_DQ9
22
M_A_DQ8
24
M_A_DQ11
34
M_A_DQ10
36
M_A_DQ21
39
M_A_DQ20
41
M_A_DQ19
51
M_A_DQ23
53
M_A_DQ17
40
M_A_DQ16
42
M_A_DQ18
50
M_A_DQ22
52
M_A_DQ24
57
M_A_DQ25
59
M_A_DQ31
67
M_A_DQ27
69
M_A_DQ28
56
M_A_DQ29
58
M_A_DQ30
68
M_A_DQ26
70
M_A_DQ36
129
M_A_DQ33
131
M_A_DQ34
141
M_A_DQ35
143
M_A_DQ32
130
M_A_DQ37
132
M_A_DQ38
140
M_A_DQ39
142
M_A_DQ44
147
M_A_DQ45
149
M_A_DQ46
157
M_A_DQ42
159
M_A_DQ40
146
M_A_DQ41
148
M_A_DQ47
158
M_A_DQ43
160
M_A_DQ49
163
M_A_DQ52
165
M_A_DQ50
175
M_A_DQ51
177
M_A_DQ55
164
M_A_DQ48
166
M_A_DQ54
174
M_A_DQ53
176
M_A_DQ59
181
M_A_DQ56
183
M_A_DQ63
191
M_A_DQ58
193
M_A_DQ57
180
M_A_DQ60
182
M_A_DQ62
192
M_A_DQ61
194
M_A_DQ[63:0] 3
3
2
+1.35VSUS
2.48A
+3V
R334 10K_4
+3V
PM_EXTTS#013
DDR3_DRAMRST#2,13
PM_EXTTS#0
C472 *0.1U/16V_4
+SMDDR_VREF_DQ0SMDDR_VREF_DQ0_M1
JDIM2B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3-DIMM0_H=4.0_STD
ddr-ddrsk-20401-tp4b-204p-smt
DGMK0000160
SOCKET DDR3 SODIMM(204P,H4.0,STD)TOP BSQ
(204P)
PC2100 DDR3 SDRAM SO-DIMM
VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52
VTT1 VTT2
GND GND
+SMDDR_VREF_DIMM13
1
44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196
203 204
205 206
+3V6,7,8,9,10,11,13,22,23,24,25,26,27,29,30,35,36
+1.35VSUS2,4,13,33
+0.65V_DDR_VTT13,33
12
+0.65V_DDR_VTT
1uF/10uF 4pcs on each side of connector
Place these Caps near So-Dimm0.
For EMI RESERVE
+1.35VSUS
EC43 *120P/50V_4 EC31 *120P/50V_4 EC36 *120P/50V_4 EC51 120P/50V_4 EC35 *120P/50V_4 EC52 *120P/50V_4 EC34 *120P/50V_4
A A
5
+0.65V_DDR_VTT
EC38 *120P/50V_4 EC32 *120P/50V_4
+1.35VSUS
EC47 *120P/50V_4 EC53 *120P/50V_4 EC48 *120P/50V_4 EC40 *0.1U/16V_4 EC33 *0.1U/16V_4 EC39 *0.1U/16V_4 EC46 *0.1U/16V_4
4
+1.35VSUS +0.65V_DDR_VTT
C505 1U/6.3V_4 C507 1U/6.3V_4 C506 1U/6.3V_4 C474 1U/6.3V_4 C476 1U/6.3V_4 C475 1U/6.3V_4 C480 1U/6.3V_4 C479 1U/6.3V_4
C504 10U/6.3V_6 C503 10U/6.3V_6 C502 10U/6.3V_6 C477 10U/6.3V_6 C478 10U/6.3V_6 C532 10U/6.3V_6 C501 10U/6.3V_6 C531 10U/6.3V_6
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
3
C495 1U/6.3V_4 C466 1U/6.3V_4 C494 1U/6.3V_4 C484 1U/6.3V_4 C490 10U/6.3V_6
C515 *0.1U/16V_4 C500 *2.2U/6.3V_4
C470 *0.1U/16V_4 C469 *2.2U/6.3V_4
+3V
C437 0.1U/16V_4 C444 2.2U/6.3V_4
SMDDR_VREF_DQ0_M33
2
SMDDR_VREF_DQ0_M3
R349
24.9/F_4 R379
R350 2/F_6
C468
0.022U/25V_4
2 1
SM_VREF3
+1.35VSUS
VREF DQ0 M1 Solution
R352
1.8K/F_4
SMDDR_VREF_DQ0_M1
R351
1.8K/F_4
R380 2/F_6
C540
0.022U/25V_4
2 1
R371
24.9/F_4
PROJECT : X11
PROJECT : X11
PROJECT : X11
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
DDR3 DIMM0-STD(4.0H)
DDR3 DIMM0-STD(4.0H)
DDR3 DIMM0-STD(4.0H)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
+1.35VSUS
1.8K/F_4
+SMDDR_VREF_DIMM
R370
1.8K/F_4
12 40Monday, January 05, 2015
12 40Monday, January 05, 2015
12 40Monday, January 05, 2015
1A
1A
1A
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