Quanta UM3, UM6 Schematic

1

2

3

4

5

6

7

8

UM3/UM6 SYSTEM BLOCK DIAGRAM

POWER

A A

AC/BATT
CONNECTOR

PG 53

THERMAL

SMSC1422

PG 38

SYSTEM
RESET CIRCUIT

PG 42

BATT
CHARGER

RUN POWER SW

+3.3V_SUS/+5V_SUS

+5V/+3.3V/+1.8V

CPU VR

B B

DC/DC

+3.3V_ALW /+5V_ALW /
+15V_ALW

REGULATOR

+1.5V_SUS/+0.75V_DDR_VTT

+1.05V_PCH

+1.05V_VTT

C C

PG 45

PG 52

PG 51

PG 46

PG 47

PG 48

PG 49

A- MIC
conn

PG 39

D D

1

CLOCK

SLG8SP585VTR
(QFN-32)

DDR3-SODIMM1

RVS Type

PG 13

DDR3-SODIMM2

RVS Type

PG 14

SATA-ODD

SATA-HDD

USB conn x 1

Bluetooth BTB Conn
BT365

Camera

To LCD Conn

AUDIO/AMP

ALC269Q-GR

Audio
SPK conn

PG 39 PG 26

USER
INTERFACE

2

PG 15

Dual Channel DDR3
800/1066 1.5V

PG 35

PG 35

PG 33

PG 32

PG 24

PG 39

DB CONN

Audio
Jacks x2

IO Board

PG 37

3

SATA

SATA

USB2.0

USB2.0

USB2.0

IHDA

KBC

ITE8502

SPI PS/2

FLASH
1Mbytes

PG 30

Arrandale

( rPGA 989 )

LPC

PG 29

Touchpad

4

PG 3,4,5,6

DMI X 4

PCH

(HM55)

PG 7,8,9,10,11,12

17X8

PG 36

SPI

FLASH
4Mbytes

PG 30

Keyboard

PG 36

PCIEx16

DDR3 x 4
(512M 64bits)

PCIE 2.0

PCIE 2.0
USB2.0

PCIE 2.0
USB2.0

USB2.0

USB2.0

VER :C3B
PWA:
PWB:

5

PG 22

ATI M92-LP S2

PCI EXPRESS GFX

631 uFCBGA 23mm*23mm

PG 16,17,18,19,20,21,22

DB CONN

6

USB2.0

USB2.0

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

LVDS

HDMI

VGA

Panel Connector

HDMI CONN.

CRT CONN.

LOM

RTL8103E

PG 24

PG 24

PG 25

PG 41

MINI-CARD

WLAN

PG 32

MINI-CARD

WW AN

PG 31

USB conn x 2

CARD READER

RTS5159

IO Board

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

Schematic Block Diagram

Schematic Block Diagram

Schematic Block Diagram

UM3 1C

UM3 1C

UM3 1C

7

PG 26

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Table of Contents

PAGE DESCRIPTION

Schematic Block Diagram

1

Front Page

2

Clarksfield/Auburndale

A A

B B

3-6

PCH

7-12

13-14

DDRIII SO-DIMM(204P)

Clock Generator

15

M92-S2-XT

16-22

BLANK PAGE

23

LCD CONN / HDMI CONN

24

CRT CONN

25

DB CONN / R5U230

26

BLANK PAGE

27

BLANK PAGE

28

SIO (ITE8502)

29

FLASH / RTC

30

MINI-Card (WWAN)

31

MINI-Card (WLAN\WPAN)

32

Left PUSB/ESATA

33

BLANK PAGE

34

SATA (HDD & CD_ROM)

35

TP / KEYBOARD

36

SWITCH / /LED

37

POWER PLANE

+PW R_SRC

+RTC_CELL

+5V_SUS SLP_S5# CTRLD POW ER

+3.3V_SUS

+1.5V_SUS

+0.75V_DDR_VTT

+5V_RUN

+3.3V_RUN

+1.8V_RUN

+1.5V_RUN

+1.1V_GFX_PCIE +1.1V

FAN / THERMAL

Azelia CODEC

39

BLANK PAGE

40

41

LAN(RTL8111DL/RJ-45)

System Reset Circuit

42

Blank Page

43

44451.8V_RUN(RT9018/RT9024)

+1.05V_PCH PCH POWER+1.05V 07,08,09,11,15,48 RUN_ON

+VCC_CORE

+LCDVCC

+1.05V_VTT

VOLTAGE PAGE

10V~+19V

+3.0V~+3.3V

+5V

+3.3V

+1.5V

+0.75V

+5V

+3.3V

+1.8V

+1.5V

+0.9V~+1.2V

+0.7V~+1.77V

+3.3V

24,45,46,47,48,49,50,51

08,11,29,30

11,26,33,37,46,48,51,52

07,08,09,10,11,,24,36,37,41,42,44,47,50,52

03,05,13,14,47,50,52

13,14,47

11,18,24,25,35,36,37,38,39,51,52

3,7,8,9,10,11,13,14,15,17,19,24,25,26,29,30
,31,32,35,38,39,41,42,51,52

05,11,44

11,18,19,20,31,32,52

18,21,50+VCC_GFX_CORE VGA POWER

18,50

05,51

24

03,05,10,11,49+1.1V

Power States

DESCRIPTION ACTIVE IN

MAIN POWER

RTC

LARGE POW ER+5V+5V_ALW 37,44,46,47,49,50,53 ALW _ON

CONTROL
SIGNAL

S0~S5

S0~S5

S0~S5

8051 POW ER 3.3V_ALW _ON S0~S5+3.3V 29,30,37,44,45,46,51,52,53+3.3V_ALW

SUS_ON

SLP_S5# CTRLD POW ER

SODIMM POWER

SODIMM POWER

SLP_S3# CTRLD POW ER

SLP_S3# CTRLD POW ER

SDVO POWER

VGA POWER

SUS_ON

SUS_ON

RUN_ON

RUN_ON

RUN_ON

RUN_ON

RUN_ON

GFX_ON

VGA POWER

GFX_+1.1_EN

VGA POWER+1.8V 17,18,21,22,44+1.8V_RUN_GFX GFX_+1.8_EN38

CPU CORE POW ER

LCD Power

CPU POWER

IMVP_VR_ON

LCDVCC_TST_EN
& ENVDD

RUN_ON

Charger (MAX8731)

46

3V/5V (TPS51427A)

47

1.5_DDR/0.75(TPS51116)

48

C C

1.05V_PCH(TPS51218)

1.05_VTT(TPS51218)

49

50

VGA_M92-XT(MAX8792)

51

CPU CORE(MAX17036)

52

Run Power Swi tch

53

DCin & Batt

54

PAD & SCREW

55

EMI CAP

56

SMBUS BLOCK

57

THERMAL MAP

58

Power Block Diagram

Power sequence Block

59

Blank Page

60

GND PLANE PAGE DESCRIPTION

GND

ALL

D D

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

1

2

3

4

5

6

Date: Sheet

COMPUTER

Index & Power Status

Index & Power Status

Index & Power Status

UM3 1A

UM3 1A

UM3 1A

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AUBURNDALE/CLARKSFIELD PROCESSOR (DMI,PEG,FDI) AUBURNDALE/CLARKSFIELD PROCESSOR (CLK,MISC,JTAG)

U18A

U18A

DMI_TXN0[7]

D D

C C

DMI_TXN1[7]
DMI_TXN2[7]
DMI_TXN3[7]

DMI_TXP0[7]
DMI_TXP1[7]
DMI_TXP2[7]
DMI_TXP3[7]

DMI_RXN0[7]
DMI_RXN1[7]
DMI_RXN2[7]
DMI_RXN3[7]

DMI_RXP0[7 ]
DMI_RXP1[7 ]
DMI_RXP2[7 ]
DMI_RXP3[7 ]

R231KR23
1K

A24

DMI_RX#[0]

C23

DMI_RX#[1]

B22

DMI_RX#[2]

A21

DMI_RX#[3]

B24

DMI_RX[0]

D23

DMI_RX[1]

B23

DMI_RX[2]

A22

DMI_RX[3]

D24

DMI_TX#[0]

G24

DMI_TX#[1]

F23

DMI_TX#[2]

H23

DMI_TX#[3]

D25

DMI_TX[0]

F24

DMI_TX[1]

E23

DMI_TX[2]

G23

DMI_TX[3]

E22

FDI_TX#[0]

D21

FDI_TX#[1]

D19

FDI_TX#[2]

D18

FDI_TX#[3]

G21

FDI_TX#[4]

E19

FDI_TX#[5]

F21

FDI_TX#[6]

G18

FDI_TX#[7]

D22

FDI_TX[0]

C21

FDI_TX[1]

D20

FDI_TX[2]

C18

FDI_TX[3]

G22

FDI_TX[4]

E20

FDI_TX[5]

F20

FDI_TX[6]

G19

FDI_TX[7]

F17

FDI_FSYNC[0]

E17

FDI_FSYNC[1]

C17

FDI_INT

F18

FDI_LSYNC[0]

D17

FDI_LSYNC[1]

R241KR24
1K

0214

B B

Clarksfield /Auburndale

Clarksfield /Auburndale

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RBIAS

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]

DMI Intel(R) FDI

DMI Intel(R) FDI

PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]

PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]

PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]

PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]

PCI EXPRESS -- GRAPHICS

PCI EXPRESS -- GRAPHICS

PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

PEG_ICOMPI

B26
A26
B27
A25

PCIE_MRX_GTX_N15

K35

PCIE_MRX_GTX_N14

J34

PCIE_MRX_GTX_N13

J33

PCIE_MRX_GTX_N12

G35

PCIE_MRX_GTX_N11

G32

PCIE_MRX_GTX_N10

F34

PCIE_MRX_GTX_N9

F31

PCIE_MRX_GTX_N8

D35

PCIE_MRX_GTX_N7

E33

PCIE_MRX_GTX_N6

C33

PCIE_MRX_GTX_N5

D32

PCIE_MRX_GTX_N4

B32

PCIE_MRX_GTX_N3

C31

PCIE_MRX_GTX_N2

B28

PCIE_MRX_GTX_N1

B30

PCIE_MRX_GTX_N0

A31

PCIE_MRX_GTX_P15

J35

PCIE_MRX_GTX_P14

H34

PCIE_MRX_GTX_P13

H33

PCIE_MRX_GTX_P12

F35

PCIE_MRX_GTX_P11

G33

PCIE_MRX_GTX_P10

E34

PCIE_MRX_GTX_P9

F32

PCIE_MRX_GTX_P8

D34

PCIE_MRX_GTX_P7

F33

PCIE_MRX_GTX_P6

B33

PCIE_MRX_GTX_P5

D31

PCIE_MRX_GTX_P4

A32

PCIE_MRX_GTX_P3

C30

PCIE_MRX_GTX_P2

A28

PCIE_MRX_GTX_P1

B29

PCIE_MRX_GTX_P0

A30

PCIE_MTX_GRX_C_N1 5

L33

PCIE_MTX_GRX_C_N1 4

M35

PCIE_MTX_GRX_C_N1 3

M33

PCIE_MTX_GRX_C_N1 2

M30

PCIE_MTX_GRX_C_N1 1

L31

PCIE_MTX_GRX_C_N1 0

K32

PCIE_MTX_GRX_C_N9

M29

PCIE_MTX_GRX_C_N8

J31

PCIE_MTX_GRX_C_N7

K29

PCIE_MTX_GRX_C_N6

H30

PCIE_MTX_GRX_C_N5

H29

PCIE_MTX_GRX_C_N4

F29

PCIE_MTX_GRX_C_N3

E28

PCIE_MTX_GRX_C_N2

D29

PCIE_MTX_GRX_C_N1

D27

PCIE_MTX_GRX_C_N0

C26

PCIE_MTX_GRX_C_P15

L34

PCIE_MTX_GRX_C_P14

M34

PCIE_MTX_GRX_C_P13

M32

PCIE_MTX_GRX_C_P12

L30

PCIE_MTX_GRX_C_P11

M31

PCIE_MTX_GRX_C_P10

K31

PCIE_MTX_GRX_C_P9

M28

PCIE_MTX_GRX_C_P8

H31

PCIE_MTX_GRX_C_P7

K28

PCIE_MTX_GRX_C_P6

G30

PCIE_MTX_GRX_C_P5

G29

PCIE_MTX_GRX_C_P4

F28

PCIE_MTX_GRX_C_P3

E27

PCIE_MTX_GRX_C_P2

D28

PCIE_MTX_GRX_C_P1

C27

PCIE_MTX_GRX_C_P0

C25

R359 49.9/FR359 49.9/F

R360 750/FR360 750/F

PCIE_MRX_GTX_N[0. .15] [16]

PCIE_MRX_GTX_P[0.. 15] [16]

+1.5V_SUS

R102

R102

1.1K/F

1.1K/F

PM_DRAM_PWRGD

R31

R31
3K/F

3K/F

U18B

0214

U18B

AT23

COMP3

AT24

COMP2

G16

COMP1

AT26

COMP0

AH24

SKTOCC#

AK14

CATERR#

AT15

PECI

AN26

PROCHOT#

AK15

THERMTRIP#

AP26

RESET_OBS#

AL15

PM_SYNC

AN14

VCCPWRGOOD_1

AN27

VCCPWRGOOD_0

AK13

SM_DRAMPWROK

AM15

VTTPWRGOOD

AM26

TAPPWRGOOD

AL14

RSTIN#

Clarksfield /Auburndale

Clarksfield /Auburndale

MISC THERMAL

MISC THERMAL

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

CLOCKS

CLOCKS

SM_DRAMRST#

PM_EXT_TS#[0]
PM_EXT_TS#[1]

MISC

MISC

DDR3

DDR3

PWR MANAGEMENT

PWR MANAGEMENT

JTAG & BPM

JTAG & BPM

BCLK

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

PRDY#
PREQ#

TRST#

TDI_M

TDO_M

DBR#

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

A16
B16

BCLK_ITP

AR30

BCLK_ITP#

AT30

E16
D16

A18
A17

F6

SM_RCOMP_0

AL1

SM_RCOMP_1

AM1

SM_RCOMP_2

AN1

AN15
AP15

AT28
AP27

AN28

TCK

AP28

TMS

XDP_TRST#

AT27

AT29

TDI

AR27

TDO

XDP_TDI_M

AR29

XDP_TDO_M

AP29

DBRESET#

AN25

AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23

CRB use a 1k pull-up to 3.3V_S for DBR#
TRST# use a 51ohm pull down.

R96 SJ_0402R96 SJ_0402

DBRESET#

112

CLK_CPU_BCLK [10]
CLK_CPU_BCLK# [10]

T6T6
T7T7

CLK_PCIE_3G PLL [9]
CLK_PCIE_3G PLL# [9]

DDR3_DRAMRST# [13,14]

R95 10KR95 10K
R94 10KR94 10K

R97 51R97 51

12
12

R93

R93

*12.4K/F_NC

*12.4K/F_NC

2

Intel Suggest to reserve 0 ohm
below for CPU AP29 and AR29 pins.

Add Test Point For XDP

+3.3V_RUN

R99 1KR99 1K

+1.05V_VTT

PM_EXTTS#0 [13]
PM_EXTTS#1 [14]

H_COMP3

H_COMP2

H_COMP1

H_COMP0

H_CPUDET#[29 ]

H_CATERR#

R92

H_PECI[10]

H_THERM[10]

PM_SYNC[7]

H_PWRGOOD[10]

PM_DRAM_PWRGD[7]

H_VTTPWRGD[42]

PLTRST#[9,16,29 ,31,32,41]

R92

112

SJ_0402

SJ_0402

R101 1.5K/FR101 1.5K/F

2

H_PROCHOT#

H_CPURST#

PM_DRAM_PWRGD

R100

R100
750/F

750/F

H_PECI_ISO

PCIE_MTX_GRX_N[0. .15] [16] PCIE_MTX_GRX_P[0.. 15] [16]

PCIE_MTX_GRX_C_P0
PCIE_MTX_GRX_C_P1
PCIE_MTX_GRX_C_P2
PCIE_MTX_GRX_C_P3
PCIE_MTX_GRX_C_P4
PCIE_MTX_GRX_C_P5
PCIE_MTX_GRX_C_P6
PCIE_MTX_GRX_C_P7
PCIE_MTX_GRX_C_P8
PCIE_MTX_GRX_C_P9
PCIE_MTX_GRX_C_P10
PCIE_MTX_GRX_C_P11
PCIE_MTX_GRX_C_P12
PCIE_MTX_GRX_C_P13
PCIE_MTX_GRX_C_P14
PCIE_MTX_GRX_C_P15

C508 0.1U16 C508 0.1U16
C510 0.1U16 C510 0.1U16
C511 0.1U16 C511 0.1U16
C512 0.1U16 C512 0.1U16
C515 0.1U16 C515 0.1U16
C516 0.1U16 C516 0.1U16
C519 0.1U16 C519 0.1U16
C520 0.1U16 C520 0.1U16
C523 0.1U16 C523 0.1U16
C524 0.1U16 C524 0.1U16
C527 0.1U16 C527 0.1U16
C529 0.1U16 C529 0.1U16
C536 0.1U16 C536 0.1U16
C538 0.1U16 C538 0.1U16
C542 0.1U16 C542 0.1U16
C544 0.1U16 C544 0.1U16

Processo r Compensation Signals DDR3 Comp ensation Signals

R25

R25

R73

R73

49.9/F

49.9/F

49.9/F

49.9/F

4

R74

R74
20/F

20/F

PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_P15

H_COMP0

H_COMP1

H_COMP2

H_COMP3

R75

R75
20/F

20/F

3

DDR3_DRAMRST# H_PWRGOOD

R27

R27

R28

R28

24.9/F

24.9/F

130/F

130/F

R33

R33
100/F

100/F

C654

C654

0.01U

0.01U

SM_RCOMP_2

SM_RCOMP_1

SM_RCOMP_0

Layout Note: Place
these resistors
near Processor

C655

C655

0.01U

0.01U

Remove XDP Function

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Nu mber Rev

Size Document Nu mber Rev

Size Document Nu mber Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

COMPUTER

AUBURNDA 1/4

AUBURNDA 1/4

AUBURNDA 1/4

UM3 1A

UM3 1A

UM3 1A

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3 63Thursday, October 15 , 2009

R82

R82
*68_NC

*68_NC

PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_N15

PCIE_MTX_GRX_C_N0
PCIE_MTX_GRX_C_N1
PCIE_MTX_GRX_C_N2
PCIE_MTX_GRX_C_N3
PCIE_MTX_GRX_C_N4
PCIE_MTX_GRX_C_N5
PCIE_MTX_GRX_C_N6
PCIE_MTX_GRX_C_N7
PCIE_MTX_GRX_C_N8
PCIE_MTX_GRX_C_N9
PCIE_MTX_GRX_C_N1 0
PCIE_MTX_GRX_C_N1 1
PCIE_MTX_GRX_C_N1 2
PCIE_MTX_GRX_C_N1 3
PCIE_MTX_GRX_C_N1 4
PCIE_MTX_GRX_C_N1 5

Processo r
Pullups

A A

H_CATERR#

H_PROCHOT#

H_CPURST#

R32

R32

49.9/F

49.9/F

C507 0.1U16 C507 0.1U16
C509 0.1U16 C509 0.1U16
C513 0.1U16 C513 0.1U16
C514 0.1U16 C514 0.1U16
C517 0.1U16 C517 0.1U16
C518 0.1U16 C518 0.1U16
C521 0.1U16 C521 0.1U16
C522 0.1U16 C522 0.1U16
C525 0.1U16 C525 0.1U16
C526 0.1U16 C526 0.1U16
C534 0.1U16 C534 0.1U16
C535 0.1U16 C535 0.1U16
C539 0.1U16 C539 0.1U16
C541 0.1U16 C541 0.1U16
C546 0.1U16 C546 0.1U16
C547 0.1U16 C547 0.1U16

+1.05V_VTT

R81

R81

49.9/F

49.9/F

5

5

4

3

2

1

AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)

U18D

AM6
AN2

AM4
AM3

AN5

AN6
AN4
AN3

AN7

AR10
AT10

AF3
AG1

AK1
AG4
AG3

AH4
AK3
AK4

AK5
AK2

AP3

AT4

AT5
AT6

AP6
AP8
AT9
AT7
AP9

AB1

AC5

AC6

AJ3

AJ4

B5
A5

C3

B3
E4
A6

A4
C4
D1
D2

F2

F1
C2

F5

F3
G4
H6
G2

J6

J3
G1
G5

J2

J1

J5

K2
L3

M1

K5

K4
M4
N5

W5
R7

Y7

U18D

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

SB_BS[0]
SB_BS[1]
SB_BS[2]

SB_CAS#
SB_RAS#
SB_WE#

W8

SB_CK[0]

W9

SB_CK#[0]

M3

SB_CKE[0]

V7

SB_CK[1]

V6

SB_CK#[1]

M2

SB_CKE[1]

AB8

SB_CS#[0]

AD6

SB_CS#[1]

AC7

SB_ODT[0]

AD1

SB_ODT[1]

M_B_DM0

D4

SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

DDR SYSTEM MEMORY - B

DDR SYSTEM MEMORY - B

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

E1
H3
K1
AH1
AL2
AR4
AT8

D5
F4
J4
L4
AH2
AL4
AR5
AR8

C5
E3
H4
M5
AG2
AL5
AP5
AR7

U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1

M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_B_CLK0 [14]
M_B_CLK0# [14]
M_B_CKE0 [14]

M_B_CLK1 [14]
M_B_CLK1# [14]
M_B_CKE1 [14]

M_B_CS0# [14]
M_B_CS1# [14]

M_B_ODT0 [14]
M_B_ODT1 [14]

M_B_DM[7:0] [14]

M_B_DQS#[7:0] [14]

M_B_DQS[7:0] [14]

M_B_A[15:0] [14]

U18C

U18C

AA6

SA_CK[0]

D D

M_A_DQ[63:0][13]

C C

B B

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

M_A_BS0[13]
M_A_BS1[13]
M_A_BS2[13]

M_A_CAS#[13]
M_A_RAS#[13]
M_A_WE#[13]

C10

B10
D10
E10

H10

G10

AH5
AF5
AK6
AK7
AF6
AG5

AJ10

AL10

AK12

AK8

AK11

AN8
AM10
AR11

AL11

AM9

AN9
AT11
AP12
AM12
AN12
AM13
AT14
AT12

AL13
AR14
AP14

AC3
AB2

AE1
AB3
AE9

A10

F10

J10

AJ7
AJ6

AJ9

AL7

AL8

C7
A7

A8
D8

E6
F7
E9
B7
E7
C6

G8
K7

J8

G7

J7

L7
M6
M8

L9

L6
K8
N8
P9

U7

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_CK#[0]

SA_CKE[0]

SA_CK[1]

SA_CK#[1]

SA_CKE[1]

SA_CS#[0]
SA_CS#[1]

SA_ODT[0]
SA_ODT[1]

SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]

SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

AA7
P7

Y6
Y5
P6

AE2
AE8

AD8
AF9

B9
D7
H7
M7
AG6
AM7
AN10
AN13

C9
F8
J9
N9
AH7
AK9
AP11
AT13

C8
F9
H9
M9
AH8
AK10
AN11
AR13

Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_CLK0 [13]
M_A_CLK0# [13]
M_A_CKE0 [13]

M_A_CLK1 [13]
M_A_CLK1# [13]
M_A_CKE1 [13]

M_A_CS0# [13]
M_A_CS1# [13]

M_A_ODT0 [13]
M_A_ODT1 [13]

M_A_DM[7:0] [13]

M_A_DQS#[7:0] [13]

M_A_DQS[7:0] [13]

M_A_A[15:0] [13]

M_B_DQ[63:0][14]

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60M_A_A0
M_B_DQ61
M_B_DQ62
M_B_DQ63

M_B_BS0[14]
M_B_BS1[14]
M_B_BS2[14]

M_B_CAS#[14]
M_B_RAS#[14]
M_B_WE#[14]

Clarksfield/Auburndale

A A

5

Clarksfield/Auburndale

Channel A DQ[15,32,48,54], DM[5]
Requires minimum 12mils spacing
with all other signals, including data signals.

4

Clarksfield/Auburndale

Clarksfield/Auburndale

Channel B DQ[16,18,36,42,56,57,60,61,62]
Requires minimum 12mils spacing
with all other signals, including data signals.

3

2

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

COMPUTER

AUBURNDA 2/4

AUBURNDA 2/4

AUBURNDA 2/4

UM3 1A

UM3 1A

UM3 1A

1

of

of

of

4 63Thursday, October 15, 2009

4 63Thursday, October 15, 2009

4 63Thursday, October 15, 2009

5

U18F

CPU Core Power

+VCC_CORE

D D

C C

B B

A A

U18F

AG35

VCC1

AG34

VCC2

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

AC27

VCC39

AC26

VCC40

AA35

VCC41

AA34

VCC42

AA33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

Clarksfield /Auburndale

Clarksfield /Auburndale

AH14

VTT0_1

AH12

VTT0_2

AH11

VTT0_3

AH10

VTT0_4

J14

VTT0_5

J13

VTT0_6

H14

VTT0_7

H12

VTT0_8

G14

VTT0_9

G13

VTT0_10

G12

VTT0_11

G11

VTT0_12

F14

VTT0_13

F13

VTT0_14

F12

VTT0_15

F11

VTT0_16

E14

VTT0_17

E12

VTT0_18

D14

VTT0_19

D13

VTT0_20

D12

VTT0_21

D11

VTT0_22

C14

VTT0_23

C13

VTT0_24

C12

VTT0_25

C11

VTT0_26

B14

VTT0_27

B12

VTT0_28

A14

VTT0_29

A13

VTT0_30

A12

VTT0_31
VTT0_32

VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

VTT_SELECT

ISENSE

VCC_SENSE
VSS_SENSE

VTT_SENSE

A11

AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15

AN33

PSI#

VID0

AK35

VID1

AK33

VID2

AK34

VID3

AL35

VID4

AL33

VID5

AM33

VID6

AM35

DPRSLPVR

AM34

G15

VTT_SELECT:
High level 1.05V for Auburndale
Low level 1.1V for Clarksfield

AN35

AJ34
AJ35

VTT_SENSE

B15

TP_VSS_SENSE_VTT

A15

1.1V RAIL POWER

1.1V RAIL POWER

CPU CORE SUPPLY

CPU CORE SUPPLY

POWER

POWER

PROC_DPRSLPVR

CPU VIDS

CPU VIDS

VSS_SENSE_VTT

SENSE LINES

SENSE LINES

AUBURNDALE/CLARKSFIELD PROCESSOR (POWER)

5

C559

C559
*10U_NC

*10U_NC

C531

C531
22U

22U

4

C85

C85
10U

10U

C505

C505
22U

22U

H_PSI# [51]

VID0 [51]
VID1 [51]
VID2 [51]
VID3 [51]
VID4 [51]
VID5 [51]
VID6 [51]
DPRSLPVR [51]

T1T1

I_MON [51]

T47T47
T46T46

4

C94

C94
*10U_NC

*10U_NC

C64

C64
*10U_NC

*10U_NC

+1.05V_VTT

C506

C506
10U

10U

C32

C32
10U

10U

+1.05V_VTT

+VCC_CORE

R383

R383
100/F

100/F

R384

R384
100/F

100/F

C30

C30
10U

10U

C503

C503
22U

22U

C549

C549
*22U_NC

*22U_NC

VCCSENSE [5 1]
VSSSENSE [51]

C555

C555
22U

22U

+1.05V_VTT

C533

C533
*10U_NC

*10U_NC

+1.05V_VTT

C504

C504
22U

22U

C562

C562
22U

22U

C31

C31
22U

22U

C532

C532
*10U_NC

*10U_NC

C530

C530
*22U_NC

*22U_NC

C101

C101
22U

22U

C545

C545
22U

22U

3

2

AUBURNDALE/CLARKSFIELD PROCESSOR (GRAPHICS POWER)

U18G

U18G

AT21

VAXG1

AT19

VAXG2

AT18

VAXG3

AT16

VAXG4

AR21

VAXG5

AR19

VAXG6

AR18

VAXG7

AR16

VAXG8

AP21

VAXG9

AP19

VAXG10

AP18

VAXG11

AP16

VAXG12

AN21

VAXG13

AN19

VAXG14

AN18

VAXG15

AN16

VAXG16

AM21

VAXG17

AM19

VAXG18

AM18

VAXG19

AM16

VAXG20

AL21

VAXG21

AL19

VAXG22

AL18

VAXG23

AL16

VAXG24

AK21

VAXG25

AK19

VAXG26

AK18

VAXG27

AK16

VAXG28

AJ21

VAXG29

AJ19

VAXG30

AJ18

VAXG31

AJ16

VAXG32

AH21

VAXG33

AH19

VAXG34

AH18

VAXG35

AH16

VAXG36

J24

VTT1_45

J23

VTT1_46

H25

VTT1_47

K26

VTT1_48

J27

VTT1_49

J26

VTT1_50

J25

VTT1_51

H27

VTT1_52

G28

VTT1_53

G27

VTT1_54

G26

VTT1_55

F26

VTT1_56

E26

VTT1_57

E25

VTT1_58

Clarksfield /Auburndale

Clarksfield /Auburndale

3

VSSAXG_SENSE

LINES

LINES

SENSE

SENSE

GRAPHICS

GRAPHICS

GFX_DPRSLPVR

GRAPHICS VIDs

GRAPHICS VIDs

FDI PEG & DMI

FDI PEG & DMI

POWER

POWER

DDR3 - 1.5V RAILS

DDR3 - 1.5V RAILS

1.1V1.8V

1.1V1.8V

VID0
VID1
VID2
VID3
VID4
VID5
VID6
DPRSLPVR
H_PSI#

VAXG_SENSE

GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]

GFX_VR_EN

GFX_IMON

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18

VTT0_59
VTT0_60
VTT0_61
VTT0_62

VTT1_63
VTT1_64
VTT1_65
VTT1_66
VTT1_67
VTT1_68

VCCPLL1
VCCPLL2
VCCPLL3

R291KR29
1K

R34

R34
*1K_NC

*1K_NC

R621KR62
1K

R390

R390
*1K_NC

*1K_NC

AR22
AT22

AM22
AP22
AN22
AP23
AM23
AP24
AN24

AR25
AT25
AM24

AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1

P10
N10
L10
K10

J22
J20
J18
H21
H20
H19

L26
L27
M26

R391KR39
1K

R40

R40
*1K_NC

*1K_NC

R98 1K/FR98 1K/F

+1.05V_VTT

R59

R59
*1K_NC

*1K_NC

R3931KR393
1K

Pop it when Arrandale Graphics disable.

+1.5V_SUS

C60

C60
10U

10U

C540

C540
*22U_NC

*22U_NC

C721UC72
1U

C56

C56

2.2U

2.2U

R387

R387
*1K_NC

*1K_NC

R3851KR385
1K

C781UC78
1U

+

+

C106

C106
330U

330U

7343

7343

2.5

2.5

+1.05V_VTT

+1.8V_RUN

C57

C57

4.7U/6.3 V

4.7U/6.3 V

R3891KR389
1K

R388

R388
*1K_NC

*1K_NC

C471UC47
1U

C95

C95
22U

22U

C528

C528
22U

22U

R50

R50
*1K_NC

*1K_NC

R3911KR391
1K

C651UC65
1U

C541UC54
1U

R53

R53
*1K_NC

*1K_NC

R3821KR382
1K

C77

C77
*10U_NC

*10U_NC

C33

C33
22U

22U

2

C551UC55
1U

C531UC53
1U

R521KR52
1K

R55

R55
*1K_NC

*1K_NC

C87

C87
22U

22U

1

+VCC_CORE

C68

C68
22U

22U

C560

C560
*22U_NC

*22U_NC

C89

C89

C125

C125

10U

10U

10U

10U

C105

C105

C63

C63

10U

10U

10U

10U

+

+

C208

C208
*470U_NC

*470U_NC

Title

Title

Title

AUBURNDA 3/4

AUBURNDA 3/4

AUBURNDA 3/4

Size Document Nu mber Rev

Size Document Nu mber Rev

Size Document Nu mber Rev

UM3 1A

UM3 1A

UM3 1A

Date: Sheet

Date: Sheet

Date: Sheet

C552

C552

C568

C568

*22U_NC

*22U_NC

*22U_NC

*22U_NC

C93

C93

C537

C537

22U

22U

22U

22U

C59

C59

C100

C100

10U

10U

10U

10U

C580

C580

C84

C84

*10U_NC

*10U_NC

*10U_NC

*10U_NC

+

+

C567

C567
*470U_NC

*470U_NC

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

C111

C111

C556

C556

22U

22U

*22U_NC

*22U_NC

C128

C128

C76

C76

22U

22U

22U

22U

C554

C554

C97

C97

10U

10U

10U

10U

C79

C79

C550

C550

10U

10U

10U

10U

5 63Thursday, October 15 , 2009

5 63Thursday, October 15 , 2009

1

5 63Thursday, October 15 , 2009

C561

C561
10U

10U

C115

C115
10U

10U

C575

C575
*22U_NC

*22U_NC

C548

C548
22U

22U

C558

C558
*10U_NC

*10U_NC

C543

C543
*10U_NC

*10U_NC

of

of

of

5

4

3

2

1

AUBURNDALE/CLARKSFIELD PROCESSOR (GND) AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)

U18H

U18H

AT20

VSS1

AT17

VSS2

AR31

VSS3

AR28

VSS4

AR26

VSS5

AR24

VSS6

AR23

VSS7

AR20

VSS8

AR17

D D

C C

B B

VSS9

AR15

VSS10

AR12

VSS11

AR9

VSS12

AR6

VSS13

AR3

VSS14

AP20

VSS15

AP17

VSS16

AP13

VSS17

AP10

VSS18

AP7

VSS19

AP4

VSS20

AP2

VSS21

AN34

VSS22

AN31

VSS23

AN23

VSS24

AN20

VSS25

AN17

VSS26

AM29

VSS27

AM27

VSS28

AM25

VSS29

AM20

VSS30

AM17

VSS31

AM14

VSS32

AM11

VSS33

AM8

VSS34

AM5

VSS35

AM2

VSS36

AL34

VSS37

AL31

VSS38

AL23

VSS39

AL20

VSS40

AL17

VSS41

AL12

VSS42

AL9

VSS43

AL6

VSS44

AL3

VSS45

AK29

VSS46

AK27

VSS47

AK25

VSS48

AK20

VSS49

AK17

VSS50

AJ31

VSS51

AJ23

VSS52

AJ20

VSS53

AJ17

VSS54

AJ14

VSS55

AJ11

VSS56

AJ8

VSS57

AJ5

VSS58

AJ2

VSS59

AH35

VSS60

AH34

VSS61

AH33

VSS62

AH32

VSS63

AH31

VSS64

AH30

VSS65

AH29

VSS66

AH28

VSS67

AH27

VSS68

AH26

VSS69

AH20

VSS70

AH17

VSS71

AH13

VSS72

AH9

VSS73

AH6

VSS74

AH3

VSS75

AG10

VSS76

AF8

VSS77

AF4

VSS78

AF2

VSS79

AE35

VSS80

Clarksfield/Auburndale

Clarksfield/Auburndale

VSS

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30

U18I

U18I

K27

VSS161

K9

VSS162

K6

VSS163

K3

VSS164

J32

VSS165

J30

VSS166

J21

VSS167

J19

VSS168

H35

VSS169

H32

VSS170

H28

VSS171

H26

VSS172

H24

VSS173

H22

VSS174

H18

VSS175

H15

VSS176

H13

VSS177

H11

VSS178

H8

VSS179

H5

VSS180

H2

VSS181

G34

VSS182

G31

VSS183

G20

VSS184

G9

VSS185

G6

VSS186

G3

VSS187

F30

VSS188

F27

VSS189

F25

VSS190

F22

VSS191

F19

VSS192

F16

VSS193

E35

VSS194

E32

VSS195

E29

VSS196

E24

VSS197

E21

VSS198

E18

VSS199

E13

VSS200

E11

VSS201

E8

VSS202

E5

VSS203

E2

VSS204

D33

VSS205

D30

VSS206

D26

VSS207

D9

VSS208

D6

VSS209

D3

VSS210

C34

VSS211

C32

VSS212

C29

VSS213

C28

VSS214

C24

VSS215

C22

VSS216

C20

VSS217

C19

VSS218

C16

VSS219

B31

VSS220

B25

VSS221

B21

VSS222

B18

VSS223

B17

VSS224

B13

VSS225

B11

VSS226

B8

VSS227

B6

VSS228

B4

VSS229

A29

VSS230

A27

VSS231

A23

VSS232

A9

VSS233

Clarksfield/Auburndale

Clarksfield/Auburndale

VSS

VSS

U18E

U18E

AP25

RSVD1

AL25

RSVD2

AL24

RSVD3

AL22

RSVD4

AJ33

RSVD5

AG9

RSVD6

M27

RSVD7

L28

RSVD8

CFG0

CFG3
CFG4

CFG7

J17

SA_DIMM_VREF

H17

SB_DIMM_VREF

G25

RSVD11

G17

RSVD12

E31

RSVD13

E30

RSVD14

AM30

CFG[0]

AM28

CFG[1]

AP31

CFG[2]

AL32

CFG[3]

AL30

CFG[4]

AM31

CFG[5]

AN29

CFG[6]

AM32

CFG[7]

AK32

CFG[8]

AK31

CFG[9]

AK28

CFG[10]

AJ28

CFG[11]

AN30

CFG[12]

AN32

CFG[13]

AJ32

CFG[14]

AJ29

CFG[15]

AJ30

CFG[16]

AK30

CFG[17]

H16

RSVD_TP_86

B19

RSVD15

A19

RSVD16

A20

RSVD17

B20

RSVD18

U9

RSVD19

T9

RSVD20

AC9

RSVD21

AB9

RSVD22

C1

RSVD_NCTF_23

A3

RSVD_NCTF_24

J29

RSVD26

J28

RSVD27

A34

RSVD_NCTF_28

A33

RSVD_NCTF_29

C35

RSVD_NCTF_30

B35

RSVD_NCTF_31

Clarksfield/Auburndale

Clarksfield/Auburndale

+M_VREF_DQ_DIMM0
+M_VREF_DQ_DIMM1

T3T3

T2T2

T5T5

AT35

VSS_NCTF1

AT1

VSS_NCTF2

AR34

VSS_NCTF3

B34

VSS_NCTF4

B2

VSS_NCTF5

B1

VSS_NCTF6

A35

VSS_NCTF7

NCTF

NCTF

No need to pull down RSVD17, 18, 64, & 65,
these resistors are for intel internal test only.

RESERVED

RESERVED

RSVD_NCTF_37

RSVD_NCTF_40
RSVD_NCTF_41

RSVD_NCTF_42
RSVD_NCTF_43

RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57

RSVD32
RSVD33

RSVD34
RSVD35

RSVD36

RSVD38
RSVD39

RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
RSVD53

RSVD58

RSVD_TP_59
RSVD_TP_60

KEY
RSVD62
RSVD63
RSVD64
RSVD65

RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75

RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85

VSS

AJ13
AJ12

AH25
AK26

AL26
AR2

AJ26
AJ27

AP1
AT2

AT3
AR1

AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32

E15
F15
A2
D15
C15
AJ15
AH15

No need to pull down RSVD17, 18, 64, & 65,
these resistors are for intel internal test only.

AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3

V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9

AP34

2

1

2

1

R394

R394
SJ_0402

SJ_0402

Can be left NC is Intel CRM
implementation; ESD/DG
recommendation to GND

1 0

CFG4

A A

The Clarkfield processor's PCI Express interface may
not meet PCI Express 2.0 jitter specifications. Intel
recommends placing a 3.01K +/- 5% pull down resistor to
VSS on CFG[7] pin for both rPGA and BGA components.
This pull down resistor should be removed when this
issue is fixed.

5

CFG3

4

R37 3.01K/FR37 3.01K/F

(Display Port
Presence)

CFG0
(PCI-Epress
Configuration Select)

CFG3
(PCI-Epress Static
Lane Reversal)

Disabled; No Physical Display Port
attached to Embedd ed Diplay Port

Single PEG

Normal Operation Lane Numbers Reversed

3

Enabled; An external Display port
device is connected to the Embedded
Display port

Bifurcation enabled

2

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: S heet

Date: S heet

Date: S heet

COMPUTER

AUBURNDA 4/4

AUBURNDA 4/4

AUBURNDA 4/4

UM3 1A

UM3 1A

UM3 1A

1

of

of

of

6 63Thursday, October 15, 2009

6 63Thursday, October 15, 2009

6 63Thursday, October 15, 2009

5

4

3

2

1

IBEX PEAK-M (DMI,FDI,GPIO)

U23C

U23C

PM_RI#

PM_BATLOW#

PCIE_WAKE#

BC24

DMI0RXN

BJ22

DMI1RXN

AW20

DMI2RXN

BJ20

DMI3RXN

BD24

DMI0RXP

BG22

DMI1RXP

BA20

DMI2RXP

BG20

DMI3RXP

BE22

DMI0TXN

BF21

DMI1TXN

BD20

DMI2TXN

BE18

DMI3TXN

BD22

DMI0TXP

BH21

DMI1TXP

BC20

DMI2TXP

BD18

DMI3TXP

BH25

DMI_ZCOMP

BF25

DMI_IRCOMP

T6

SYS_RESET#

M6

SYS_PWROK

B17

PWROK

K5

MEPWROK

A10

LAN_RST#

D9

DRAMPWROK

C16

RSMRST#

M1

SUS_PWR_DN_ACK / GPIO30

P5

PWRBTN#

P7

ACPRESENT / GPIO31

A6

BATLOW# / GPIO72

F14

RI#

IbexPeak-M_QMGS

IbexPeak-M_QMGS

R182 10K/FR182 10K/F

R153 8.2K/FR153 8.2K/F

R248 1KR248 1K

System Power Management

System Power Management

+3.3V_SUS

4

DMI

FDI

DMI

FDI

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

SLP_LAN# / GPIO29

DMI_RXN0[3]

PCH_PWRGD[29,38]

PM_DRAM_PWRGD[3]

ICH_RSMRST#[29]

SUS_PWR_ACK[29]

SIO_PWRBTN#[29]

AC_PRESENT[29]

CLKRUN#

XDP_DBRESET#

PCH_PWRGD

ICH_RSMRST#

LAN_RST#

DMI_RXN1[3]
DMI_RXN2[3]
DMI_RXN3[3]

DMI_RXP0[3]
DMI_RXP1[3]
DMI_RXP2[3]
DMI_RXP3[3]

DMI_TXN0[3]
DMI_TXN1[3]
DMI_TXN2[3]
DMI_TXN3[3]

DMI_TXP0[3]
DMI_TXP1[3]
DMI_TXP2[3]
DMI_TXP3[3]

+1.05V_PCH

R415 49.9/FR415 49.9/F

XDP_DBRESET#

+3.3V_RUN

R113 8.2K/FR113 8 .2K/F

R118 10K/FR118 10K/F

R237 10K/FR237 10K/F

R196 10K/FR196 10K/F

R178 10K/FR178 10K/F

5

DMI_ZCOMP

LAN_RST#

ICH_RSMRST#

PM_BATLOW#

PM_RI#

D D

C C

B B

A A

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

WAKE#

SLP_S4#

SLP_S3#

SLP_M#

TP23

PMSYNCH

BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12

BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12

BJ14

BF13

BH13

BJ12

BG14

J12

Y1

P8

F3

E4

H7

P12

K8

N2

BJ10

F6

PCIE_WAKE#

CLKRUN#

RSV_LPCPD#

ICH_SUSCLK

SIO_SLP_S5#

SLP_S4#_R

SIO_SLP_S3#

SLP_M#_R

PM_SLP_LAN#_R

PCIE_WAKE# [41]

CLKRUN# [29]

T23T23

T17T17

SIO_SLP_S5# [29]

T20T20

SIO_SLP_S3# [29]

T21T21

T61T61

PM_SYNC [3]

T16T16

3

R2631KR263
1K

IBEX PEAK-M (LVDS,DDI)

U23D

U23D

AB48

AB46

AP39
AP41

AT43
AT42

AV53
AV51

BB47
BA52
AY48
AV47

BB48
BA50
AY49
AV48

AP48
AP47

AY53

AT49

AU52

AT53

AY51

AT48

AU50

AT51

AA52
AB53
AD53

AD48
AB51

T48
T47

Y48

Y45

V48

V51
V53

Y53
Y51

L_BKLTEN
L_VDD_EN

L_BKLTCTL

L_DDC_CLK
L_DDC_DATA

L_CTRL_CLK
L_CTRL_DATA

LVD_IBG
LVD_VBG

LVD_VREFH
LVD_VREFL

LVDSA_CLK#
LVDSA_CLK

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

LVDSB_CLK#
LVDSB_CLK

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

CRT_BLUE
CRT_GREEN
CRT_RED

CRT_DDC_CLK
CRT_DDC_DATA

CRT_HSYNC
CRT_VSYNC

DAC_IREF
CRT_IRTN

IbexPeak-M_QMGS

IbexPeak-M_QMGS

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_STALLN
SDVO_STALLP

SDVO_CTRLCLK

SDVO_CTRLDATA

LVDS

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

Digital Display Interface

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

CRT

CRT

2

BJ46
BG46

BJ48
BG48

BF45

SDVO_INTN

BH45

SDVO_INTP

T51
T53

BG44

DDPB_AUXN

BJ44

DDPB_AUXP

AU38

DDPB_HPD

BD42

DDPB_0N

BC42

DDPB_0P

BJ42

DDPB_1N

BG42

DDPB_1P

BB40

DDPB_2N

BA40

DDPB_2P

AW38

DDPB_3N

BA38

DDPB_3P

Y49
AB49

BE44

DDPC_AUXN

BD44

DDPC_AUXP

AV40

DDPC_HPD

BE40

DDPC_0N

BD40

DDPC_0P

BF41

DDPC_1N

BH41

DDPC_1P

BD38

DDPC_2N

BC38

DDPC_2P

BB36

DDPC_3N

BA36

DDPC_3P

U50
U52

BC46

DDPD_AUXN

BD46

DDPD_AUXP

AT38

DDPD_HPD

BJ40

DDPD_0N

BG40

DDPD_0P

BJ38

DDPD_1N

BG38

DDPD_1P

BF37

DDPD_2N

BH37

DDPD_2P

BE36

DDPD_3N

BD36

DDPD_3P

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet of

SDVO

Display port BDisplay port CDisplay port D

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

IBEX PEAK-M 1/6

IBEX PEAK-M 1/6

IBEX PEAK-M 1/6

UM3 1A

UM3 1A

UM3 1A

7 63Thursday, October 15, 2009

7 63Thursday, October 15, 2009

7 63Thursday, October 15, 2009

of

1

of

5

4

3

2

1

D D

R128

R128

20K

20K

R129

R129

10K

10K

R272 33R272 33

R266 33R266 33

R224 33R224 33

R262 33R262 33

SPKR

PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_RST#

NC all Res. when
PCH is
production stage.

ICH_AZ_CODEC_BITCLK[39]

C C

ICH_AZ_CODEC_SYNC[39]

ICH_AZ_CODEC_RST#[29,39]

ICH_AZ_CODEC_SDOUT[39]

Place all series terms close to PCH except for SDIN input
lines,which should be close to source.Placement of R773, R775,
R776 & R777 should equal distance to the T split trace point.
Basically, keep the same distance from T for all series
termination resistors.

+3.3V_RUN

B B

A A

+3.3V_SUS

R111

R111

200

200

R116

R116

100

100

R142 *1K_NCR142 *1K_NC

Res. of TDI near PCH

R107

R107

200

200

R110

R110

100

100

1 2

R127

R127

R126

R126

SPKR

200

200

100

100

5

+RTC_CELL

C426

C426
*27P_NC

*27P_NC

50

50

No Reboot strap.

Low = Default.
High = No Reboot.

Res. of TDO
PCH ES1 stage : NC
PCH ES2 stage : pop

R2191MR219
1M

ACZ_BIT_CLK

ACZ_SYNC

ACZ_RST#

ACZ_SDOUT

R222 20K/FR222 20K/F

C377

C377

1U

1U

805

805

10

R240 20K/FR240 20K/F

C392

C392

1U

1U

805

805

10

10

INTVRMEN(Intern al Voltage Regu lator Enable) :
This signal ena bles the intern al 1.05 V regul ators.
This signal mus t be always pul led-up to VccRT C.

R130 51R130 5 1

Note : Only pop when PCH is production
stage & nee d "JTAG boundary Scan".
Reme mber to depop XDP side Re s.

10

PCH_JTAG_TCK_BUF

4

C317

C317

18P/50V

18P/50V

23

R187

R187

Y1

10M

32.768KHZY132.768KHZ

C329

C329

18P/50V

18P/50V

Cap values depe nd on Xtal

+RTC_CELL

JTAG
Test Pad s are n eed to p ut on
the same side o f mother board.

R213 330 KR213 330 K

ICH_AZ_CODEC_SDIN0[39]

10M

4 1

RTC_X1
RTC_X2

RTC_RST#

SRTC_RST#

SM_INTRUDER#

PCH_INVRMEN

ACZ_BIT_CLK

ACZ_SYNC

SPKR[39 ]

SPKR

ACZ_RST#

ACZ_SDOUT

PCH_GPIO33

T27T2 7

PCH_GPIO13

T26T2 6

PCH_JTAG_TCK_BUF

T60T6 0

PCH_JTAG_TMS

T54T5 4

PCH_JTAG_TDI

T52T5 2

PCH_JTAG_TDO

T57T5 7

PCH_JTAG_RST#

T59T5 9

SPI_CLK[30]

SPI_CS0#[30]

SPI_SI[30]

SPI_SO[30]

SPI_CLK

SPI_CS0#

SPI_CS1#

T62T6 2

SPI_SI

SPI_SO

3

IBEX PEAK-M (HDA,JTAG,SATA)

U23A

U23A

B13

RTCX1

D13

RTCX2

C14

RTCRST#

D17

SRTCRST#

A16

INTRUDER#

A14

INTVRMEN

A30

HDA_BCLK

D29

HDA_SYNC

P1

SPKR

C30

HDA_RST#

G30

HDA_SDIN0

F30

HDA_SDIN1

E32

HDA_SDIN2

F32

HDA_SDIN3

B29

HDA_SDO

H32

HDA_DOCK_EN# / GPIO33

J30

HDA_DOCK_RST# / GPIO13

M3

JTAG_TCK

K3

JTAG_TMS

K1

JTAG_TDI

J2

JTAG_TDO

J4

TRST#

BA2

SPI_CLK

AV3

SPI_CS0#

AY3

SPI_CS1#

AY1

SPI_MOSI

AV1

SPI_MISO

IbexPeak-M_QMGS

IbexPeak-M_QMGS

FWH4 / LFRAME#

LDRQ1# / GPIO23

RTCIHDA

RTCIHDA

LPC

LPC

SATA

SATA

SATA0GP / GPIO21

SATA1GP / GPIO19

SPI JTAG

SPI JTAG

iTPM ENABLE/DISABLE

+3.3V_RUN

R157 *1K_NCR157 *1K_NC

TPM Fun ction

Enable Mount

Disable NC

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

LDRQ0#

SERIRQ

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

SATAICOMPO

SATAICOMPI

SATALED#

SPI_SI

D33
B33
C32
A32

C34

A34
F34

AB9

AK7
AK6
AK11
AK9

AH6
AH5
AH9
AH8

AF11
AF9
AF7
AF6

AH3
AH1
AF3
AF1

AD9
AD8
AD6
AD5

AD3
AD1
AB3
AB1

AF16

AF15

SATA_ACT#

T3

Y9

V1

(Defaul t)

2

LPC_LAD0 [29 ,32]
LPC_LAD1 [29 ,32]
LPC_LAD2 [29 ,32]
LPC_LAD3 [29 ,32]

LPC_LFRAME# [29,32]

IRQ_SERIRQ [29]

SATA_RX0- [35]
SATA_RX0+ [35]
SATA_TX0- [35]
SATA_TX0+ [35]

SATA_RX1- [35]
SATA_RX1+ [3 5]
SATA_TX1- [35]
SATA_TX1+ [35]

SATA port 2/3 a re not support in HM55 .
They are only i n PM 55

SATA_COMP

R199 37.4/FR199 37.4/ F

R132 10K/FR132 10K/F

1 2

R186 10K/FR186 10K/F

1 2

R115 10K/FR115 10K/F

1 2

+1.05V_PCH

+3.3V_RUN

SATA_ACT# [29]

+3.3V_RUN

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

SATA HD D

SATA OD D

Distanc e betwee n the PC H and
cap on the "P" signal s hould b e
identic al dista ce betwe en the
PCH and cap on the "N" signal
for the same pa ir.

E-SATA

Stephen 7/31

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

IBEX PEAK-M 2/6

IBEX PEAK-M 2/6

IBEX PEAK-M 2/6

UM3 1A

UM3 1A

UM3 1A

1

8 63Thursd ay, October 15, 2009

8 63Thursd ay, October 15, 2009

8 63Thursd ay, October 15, 2009

of

of

of

5

4

3

2

1

IBEX PEAK-M (PCI,USB,NVRAM)

U23E

U23E

H40

AD0

N34

AD1

C44

AD2

A38

AD3

C36

AD4

J34

AD5

A40

AD6

D45

D D

PCI_PIRQA#

T33T3 3

PCI_PIRQB#
PCI_PIRQC#

T41T4 1

PCI_PIRQD#

T69T6 9

C C

USB_MCARD1_DET#[32]

BT_DET#[32]

PCIRST#:
DG(V1.0) P277
Can be left unconnected.

PAR:
SC(V1.0) P36
Can be left unconnected
if not using PCI.

PME:
DG(V1.0) P277
Can be left unconnected.

CLK_LPC_DEBUG[ 32]

B B

CLK_PCI_8502[2 9]

CLKOUT_PCI[0..4]:
22 ohm series resistor is recommend
(single & double load) on PDG v1.1

Reserve capacitor pads for
improving WWAN.

CLK_LPC_DEBUG

CLK_PCI_8502

Non-iAMT

C396 *0.0 47U_NC

C396 *0.0 47U_NC

A A

PCI_PLTRST#

CLK_PCI_FB CLK_PCI_FB_C

50

50

C443 *27P_NC

C443 *27P_NC

50

50

C415 *27P_NC

C415 *27P_NC

Add Buffers as needed for
Loading and fanout concerns.

+3.3V_SUS

5

U10

U10

2
10

10

1

*TC7SZ32FU(T5 L,F,T)_NC

*TC7SZ32FU(T5 L,F,T)_NC

2

112

R235 SJ_0402R235 SJ_04 02

T39T3 9
T37T3 7

T36T3 6
T35T3 5
T31T3 1
T42T4 2

T38T3 8
T40T4 0

T34T3 4

T18T1 8

T15T1 5

R287 33R 287 33

R267 33R 267 33
R288 33R 288 33

RSV_SMBALERT#
RSV_ICH_CL_RST1#
ICH_SMBCLK
ICH_SMBDATA
SMB_CLK_ME0
SMB_DATA_ME0
SMB_CLK_ME1
SMB_DATA_ME1
LPD_SPI_INTR#

PEG_CLKREQ#

4

5

PCI_REQ0#
PCI_REQ1#
PCI_REQ2#
USB_MCARD1_DET#

PCI_GNT0#
PCI_GNT1#
PCI_GNT2#
PCI_GNT3#

PCI_PIRQE#
PCI_PIRQF#
BT_DET#
PCI_PIRQH#

PCI_RST#

PCI_SERR#
PCI_PERR#

PCI_IRDY#

PCI_DEVSEL#
PCI_FRAME#

PCI_PLOCK#

PCI_STOP#
PCI_TRDY#

PME#

PCI_PLTRST#

CLK_LPC_DEBUG_C

CLK_PCI_8502_ C

PLTRST# [3,16, 29,31,32,4 1]

AD7

E36

AD8

H48

AD9

E40

AD10

C40

AD11

M48

AD12

M45

AD13

F53

AD14

M40

AD15

M43

AD16

J36

AD17

K48

AD18

F40

AD19

C42

AD20

K46

AD21

M51

AD22

J52

AD23

K51

AD24

L34

AD25

F42

AD26

J40

AD27

G46

AD28

F44

AD29

M47

AD30

H36

AD31

J50

C/BE0#

G42

C/BE1#

H47

C/BE2#

G34

C/BE3#

G38

PIRQA#

H51

PIRQB#

B37

PIRQC#

A44

PIRQD#

F51

REQ0#

A46

REQ1# / GPIO50

B45

REQ2# / GPIO52

M53

REQ3# / GPIO54

F48

GNT0#

K45

GNT1# / GPIO51

F36

GNT2# / GPIO53

H53

GNT3# / GPIO55

B41

PIRQE# / GPIO2

K53

PIRQF# / GPIO3

A36

PIRQG# / GPIO4

A48

PIRQH# / GPIO5

K6

PCIRST#

E44

SERR#

E50

PERR#

A42

IRDY#

H44

PAR

F46

DEVSEL#

C46

FRAME#

D49

PLOCK#

D41

STOP#

C48

TRDY#

M7

PME#

D5

PLTRST#

N52

CLKOUT_PCI0

P53

CLKOUT_PCI1

P46

CLKOUT_PCI2

P51

CLKOUT_PCI3

P48

CLKOUT_PCI4

IbexPeak-M_QMGS

IbexPeak-M_QMGS

+3.3V_SUS

R17710K/F R17710K/F
R19310K/F R19310K/F
R1912.2K/F R1912.2K/F
R1512.2K/F R1512.2K/F
R1522.2K/F R1522.2K/F
R1552.2K/F R1552.2K/F
R2532.2K/F R2532.2K/F
R2522.2K/F R2522.2K/F
R19010K/F R19010K/F

R11910K/F R11910K/F

NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11

NVRAM

NVRAM

NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15

PCI

PCI

USB

USB

BT_DET#
PCI_REQ2#
PCI_PIRQE#
PCI_PIRQF#

OC7#
OC5#
OC4#
OC3#

+3.3V_SUS

PCI_PIRQH#
PCI_REQ0#
PCI_PIRQB#

USB_MCARD1_DET#

+3.3V_RUN

PCI_STOP#
PCI_PIRQA#
PCI_PIRQC#
PCI_IRDY#

+3.3V_RUN

NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9

NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3

NV_DQS0
NV_DQS1

NV_ALE
NV_CLE

NV_RCOMP

NV_RB#

NV_WR#0_RE#
NV_WR#1_RE#

NV_WE#_CK0
NV_WE#_CK1

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N

USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43

OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

RP6

RP6

6
7
8
9

10

10P8R-8.2 K

10P8R-8.2 K

RP7

RP7

6
7
8
9

10

10P8R-8.2 K

10P8R-8.2 K

RP5

RP5

6
7
8
9

10

10P8R-8.2 K

10P8R-8.2 K

4

AY9
BD1
AP15
BD8

AV9
BG8

AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6

BD3
AY6

AU2

AV7

AY8
AY5

AV11
BF5

H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24

B25

D25

N16
J16
F16
L16
E14
G16
F12
T15

5
4
3
2
1

5
4
3
2
1

5
4
3
2
1

NV_ALE
NV_CLE

OC0# [26 ]
OC1# [33 ]

+3.3V_RUN

+3.3V_SUS

+3.3V_RUN

+3.3V_RUN

Right Side pair to DB

Right Side pair to DB

Left Side pair

Left Side pair for 17"

Mini Card (WLAN)

Mini Card (WWAN)

Mini Card (WPAN)

Camera

Card Reader

Note : place these
resistors near to PCIe
Slots

ICH_USBP0- [26]
ICH_USBP0+ [26]
ICH_USBP1- [26]
ICH_USBP1+ [26]
ICH_USBP2- [33]
ICH_USBP2+ [33]
ICH_USBP3- [33]
ICH_USBP3+ [33]
ICH_USBP4- [32]
ICH_USBP4+ [32]
ICH_USBP5- [31]
ICH_USBP5+ [31]

USB port 6/7 are not support in HM55 .
They are only in PM 55

ICH_USBP8- [32]
ICH_USBP8+ [32]

ICH_USBP11- [24]
ICH_USBP11+ [24 ]
ICH_USBP12- [26]
ICH_USBP12+ [26 ]

USB_BIAS

R257 22.6/FR257 22.6/F

OC0#
OC1#
OC2#
OC3#
OC4#
OC5#
OC6#
OC7#

R279 8.2K/FR279 8.2K/F
R282 8.2K/FR282 8.2K/F
R280 8.2K/FR280 8.2K/F
R285 8.2K/FR285 8.2K/F

OC2#
OC6#
OC1#
OC0#

PCI_TRDY#
PCI_FRAME#
PCI_REQ1#
PCI_PIRQD#

PCI_SERR#
PCI_PERR#
PCI_PLOCK#
PCI_DEVSEL#

Place TX DC blocking caps close PCH.

PCIE_RX1-[31]

MiniWWAN

MiniWLAN

Giga Bit LOM

MiniWLAN

MiniWWAN

10/100 LOM

PCIE_RX1+[31]

PCIE_TX1-[31]
PCIE_TX1+[31]

PCIE_RX2-[32]
PCIE_RX2+[32]

PCIE_TX2-[32]
PCIE_TX2+[32]

PCIE_RX6-/GLAN_RX-[41]
PCIE_RX6+/GLAN_RX+[41]
PCIE_TX6-/GLAN_TX-[41]
PCIE_TX6+/GLAN_TX+[41]

PCI-E port 7/8 are not support in HM55 .
They are only in PM 55

CLK_PCIE_MINI1#[32 ]
CLK_PCIE_MINI1[32 ]

MINI1CLK_REQ#[32]

CLK_PCIE_MINI2#[31 ]
CLK_PCIE_MINI2[31 ]

MINI2CLK_REQ#[31]

CLK_PCIE_LOM#[41]
CLK_PCIE_LOM[41]

PCIE Clock Request

+3.3V_SUS

R161 10KR161 10K
R150 10KR150 10K
R131 10KR131 10K
R156 10KR156 10K
R143 10KR143 10K

+3.3V_RUN

R144 10KR144 10K
R141 10KR141 10K

PCIECLKRQ{0,3,4,5,6,7}# should have a
10K pull-up to +V3.3A.PCIECLKRQ{1,2}
should have a 10K pull-up to +3.3S

Boot BIOS Strap

PCI_GNT0# PCI_GNT1#

0 0

0

1

1 1

1

0

3

Boot BIOS Location

LPC

PCI

Reserved (NAND)

SPI

LOM_CLK_REQ#[41]

CLK_PCIE_REQ0#
MINI2CLK_REQ#
CLK_PCIE_REQ4#
CLK_PCIE_REQ5#
LOM_CLK_REQ#

MINI1CLK_REQ#
CLK_PCIE_REQ2#

C376 0.1UC376 0.1U
C375 0.1UC375 0.1U

C390 0.1UC390 0.1U
C389 0.1UC389 0.1U

C406 0.1UC406 0.1U
C407 0.1UC407 0.1U

IBEX PEAK-M (PCI-E,SMBUS,CLK)

U23B

U23B

BG30

PERN1

BJ30

PCIE_TXN1_C
PCIE_TXP1_C

PCIE_TXN2_C
PCIE_TXP2_C

PCIE_TXN6_C
PCIE_TXP6_C

CLK_PCIE_REQ0#

MINI1CLK_REQ#

CLK_PCIE_REQ2#

MINI2CLK_REQ#

CLK_PCIE_REQ4#

CLK_PCIE_REQ5#

R286 *1K/F_NCR28 6 *1K/F_NC

A16 swap override Strap/Top-Block
Swap Override jumper

PCI_GNT3#

PERP1

BF29

PETN1

BH29

PETP1

AW30

PERN2

BA30

PERP2

BC30

PETN2

BD30

PETP2

AU30

PERN3

AT30

PERP3

AU32

PETN3

AV32

PETP3

BA32

PERN4

BB32

PERP4

BD32

PETN4

BE32

PETP4

BF33

PERN5

BH33

PERP5

BG32

PETN5

BJ32

PETP5

BA34

PERN6

AW34

PERP6

BC34

PETN6

BD34

PETP6

AT34

PERN7

AU34

PERP7

AU36

PETN7

AV36

PETP7

BG34

PERN8

BJ34

PERP8

BG36

PETN8

BJ36

PETP8

AK48

CLKOUT_PCIE0N

AK47

CLKOUT_PCIE0P

P9

PCIECLKRQ0# / GPIO73

AM43

CLKOUT_PCIE1N

AM45

CLKOUT_PCIE1P

U4

PCIECLKRQ1# / GPIO18

AM47

CLKOUT_PCIE2N

AM48

CLKOUT_PCIE2P

N4

PCIECLKRQ2# / GPIO20

AH42

CLKOUT_PCIE3N

AH41

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

AM51

CLKOUT_PCIE4N

AM53

CLKOUT_PCIE4P

M9

PCIECLKRQ4# / GPIO26

AJ50

CLKOUT_PCIE5N

AJ52

CLKOUT_PCIE5P

H6

PCIECLKRQ5# / GPIO44

AK53

CLKOUT_PEG_B_N

AK51

CLKOUT_PEG_B_P

P13

PEG_B_CLKRQ# / GPIO56

IbexPeak-M_QMGS

IbexPeak-M_QMGS

CLKOUT_PEG_A_P/N,CLKOUT_PEG_B_P/N,
CLKOUT_DMI_P/N,support GEN-1 and GEN-2

PCI_GNT3#

Low = A16 swap
override/Top-Block
Swap Override enabled
High = Default

DMI Termination Voltage

NV_CLE

Danbury Technology Enabled

NV_ALE

Set to Vcc when LOW

Set to Vcc/2 when HIGH

NV_ALE

R176 *1K_NCR176 *1K_NC

NV_CLE

R175 *1K_NCR175 *1K_NC

High = Enable

Low = Disable

2

PCI-E*

PCI-E*

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SMBus

SMBus

SML1ALERT# / GPIO74

Link

Link

Controller

Controller

PEG_A_CLKRQ# / GPIO47

PEG

PEG

CLKOUT_DP_N / CLKO UT_BCLK1_N
CLKOUT_DP_P / CL KOUT_BCLK1_P

From CLK BUFFER

From CLK BUFFER

CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P

CLKIN_PCILOOPBACK

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

Clock Flex

Clock Flex

+NVRAM_VCCQ

RSV_SMBALERT#

B9

ICH_SMBCLK

H14

SMBCLK

SMBDATA

SML0CLK

SML0DATA

SML1CLK / GPIO58

SML1DATA / GPIO75

CL_CLK1

CL_DATA1

CL_RST1#

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

CLKOUT_DMI_N
CLKOUT_DMI_P

CLKIN_DMI_N
CLKIN_DMI_P

CLKIN_BCLK_N
CLKIN_BCLK_P

CLKIN_DOT_96N
CLKIN_DOT_96P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

ICH_SMBDATA

C8

RSV_ICH_CL_RST1#

J14

SMB_CLK_ME0

C6

SMB_DATA_ME0

G8

LPD_SPI_INTR#

M14

SMB_CLK_ME1

E10

SMB_DATA_ME1

G12

T13

T11

T9

PEG_CLKREQ#

H1

AD43
AD45

AN4
AN2

AT1
AT3

AW24
BA24

AP3
AP1

F18
E18

AH13
AH12

P41

CLK_PCI_FB

J42

AH51
AH53

AF38

T45

P43

T42

N50

Title

Title

Title

IBEX PEAK-M 3/6

IBEX PEAK-M 3/6

IBEX PEAK-M 3/6

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

UM3 1A

UM3 1A

UM3 1A

Date: Sheet

Date: Sheet

Date: Sheet

R265 SJ_0402R265 SJ_04 02

XCLK_RCOMP

CLK_FLEX0

CLK_FLEX1

CLK_FLEX2

CLK_FLEX3

CLKOUTFLEX3:
EDS(V1.0) :support 48MHz
33MHz and 14.31818MHz.

CLKOUTFLEX[0..3]:
PDG v1.1: 22 ohm series resistor is
recommend (PCI & non PCI routing,
single & double load)

SMB_CLK_ME1

SMB_DATA_ME1

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

ICH_SMBCLK [ 32]

ICH_SMBDATA [32]

T25T2 5

T24T2 4

SML0CLK/SML0DATA:
DG(V1.1) P255: The 82577 SMBus
signals
(SMB_DATA and SMB_CLK) cannot be
connected to any other
devices other than the PCH.
Connect the SMB_DATA and SMB_CLK
pins
to the PCH SML0DATA and SML0CLK
pins,
respectively.

CLK_PCIE_VGA# [16]
CLK_PCIE_VGA [16]

CLK_PCIE_3GPLL# [3]
CLK_PCIE_3GPLL [3 ]

CLK_BUF_PCIE_3GPLL# [15]
CLK_BUF_PCIE_3GPLL [15]

CLK_BUF_BCLK_N [15]
CLK_BUF_BCLK_P [15]

CLK_BUF_DREFCL K# [1 5]
CLK_BUF_DREFCL K [15 ]

CLK_SATA_CLK# [1 5]
CLK_SATA_CLK [15 ]

CLK_ICH_14M [15]

CLKIN_PCILOOPBACK:
PDG (V1.1): 22 ohm series resistor
is recommend

2

112

R221 90.9/FR221 90.9/F

T32T3 2

T30T3 0

T29T2 9

T68T6 8

+3.3V_SUS

Q16

Q16

2

2N7002W-7- F

2N7002W-7- F

31

+3.3V_SUS

Q17

Q17

2

2N7002W-7- F

2N7002W-7- F

31

1

+1.05V_PCH

9 63Thursd ay, October 15, 2009

9 63Thursd ay, October 15, 2009

9 63Thursd ay, October 15, 2009

SMBCLK1 [29]

SMBDAT1 [29]

of

of

of

5

4

3

2

1

IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)

U23F

PCH_GPIO0

T22T22

2

112

SIO_EXT_SMI#

SIO_EXT_SCI#

SIO_EXT_WAKE#

LAN_PHY_PWR_CTRL

SATA4GP

PCIE_MCARD1_DET#_R

PCIE_MCARD2_DET#

GPIO27

TP_PCH_GPIO28

USB_MCARD2_DET#

GPIO35

SATA2GP

SATA3GP

WLAN_RADIO_DIS#

BT_RADIO_DIS#

GPIO45

GPIO46

WWAN_RADIO_DIS#

CRIT_TEMP_REP#

VGA_TYPE

SIO_EXT_SMI#[29]

SIO_EXT_SCI#[29]

D D

PCIE_MCARD1_DET#[32]

GPIO24 register not cleared by CF9h reset event.

PCIE_MCARD2_DET#[31]

GPIO27 reserve for internal VR.

C C

SIO_EXT_WAKE#[29]

R261 SJ_0402R261 S J_0402

R185 *10K_NCR185 *10K_NC

USB_MCARD2_DET#[31]

WLAN_RADIO_DIS#[32]

BT_RADIO_DIS#[32]

WWAN_RADIO_DIS#[31]

CRIT_TEMP_REP#[29]

VGA Strap

+3.3V_SUS

M92-LP

B B

Park

R239

R239
10K/F

10K/F

R154

R154
*10K/F_NC

*10K/F_NC

VGA_TYPE

U23F

Y3

BMBUSY# / GPIO0

C38

TACH1 / GPIO1

D37

TACH2 / GPIO6

J32

TACH3 / GPIO7

F10

GPIO8

K9

LAN_PHY_PWR_CTRL / GPIO12

T7

GPIO15

AA2

SATA4GP / GPIO16

F38

TACH0 / GPIO17

Y7

SCLOCK / GPIO22

H10

GPIO24

AB12

GPIO27

V13

GPIO28

M11

STP_PCI# / GPIO34

V6

SATACLKREQ# / GPIO35

AB7

SATA2GP / GPIO36

AB13

SATA3GP / GPIO37

V3

SLOAD / GPIO38

P3

SDATAOUT0 / GPIO39

H3

PCIECLKRQ6# / GPIO45

F1

PCIECLKRQ7# / GPIO46

AB6

SDATAOUT1 / GPIO48

AA4

SATA5GP / GPIO49

F8

GPIO57

A4

VSS_NCTF_1

A49

VSS_NCTF_2

A5

VSS_NCTF_3

A50

VSS_NCTF_4

A52

VSS_NCTF_5

A53

VSS_NCTF_6

B2

VSS_NCTF_7

B4

VSS_NCTF_8

B52

VSS_NCTF_9

B53

VSS_NCTF_10

BE1

VSS_NCTF_11

BE53

VSS_NCTF_12

BF1

VSS_NCTF_13

BF53

VSS_NCTF_14

BH1

VSS_NCTF_15

BH2

VSS_NCTF_16

BH52

VSS_NCTF_17

BH53

VSS_NCTF_18

BJ1

VSS_NCTF_19

BJ2

VSS_NCTF_20

BJ4

VSS_NCTF_21

BJ49

VSS_NCTF_22

BJ5

VSS_NCTF_23

BJ50

VSS_NCTF_24

BJ52

VSS_NCTF_25

BJ53

VSS_NCTF_26

D1

VSS_NCTF_27

D2

VSS_NCTF_28

D53

VSS_NCTF_29

E1

VSS_NCTF_30

E53

VSS_NCTF_31

IbexPeak-M_QMGS

IbexPeak-M_QMGS

MISC

MISC

CLKOUT_BCLK0_N / CLKOUT_PCIE8N

CLKOUT_BCLK0_P / CLKOUT_PCIE8P

GPIO

GPIO

CPU

CPU

NCTF

NCTF

RSVD

RSVD

CLKOUT_PCIE6N
CLKOUT_PCIE6P

CLKOUT_PCIE7N
CLKOUT_PCIE7P

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

TP10

TP11

TP12

TP13

TP14

TP15

TP16

TP17

TP18

TP19

NC_1

NC_2

NC_3

NC_4

NC_5

INIT3_3V#

TP24

TP1

TP2

TP3

TP4

TP5

TP6

TP7

TP8

TP9

AH45
AH46

AF48
AF47

U2

AM3

AM1

BG10

T1

BE10

BD10

BA22

AW22

BB22

AY45

AY46

AV43

AV45

AF13

M18

N18

AJ24

AK41

AK42

M32

N32

M30

N30

H12

AA23

AB45

AB38

AB42

AB41

T39

P6

C10

SIO_A20GATE

PCH_THRMTRIP#_R

SIO_A20GATE [29]

CLK_CPU_BCLK# [3]

CLK_CPU_BCLK [3]

H_PECI [3]

SIO_RCIN# [29]

H_PWRGOOD [3]

R194 56/FR194 56/F

(Both these should be close to PCH)

+1.05V_VTT

R195

R195
56/F

56/F

H_THERM [3]

TP_PCH_GPIO28
GPIO45
GPIO46

LAN_PHY_PWR_CTRL

SIO_EXT_SMI#
SIO_EXT_SCI#
SIO_EXT_WAKE#
PCIE_MCARD2_DET#

PCIE_MCARD1_DET#_R
WLAN_RADIO_DIS#
BT_RADIO_DIS#

SIO_RCIN#
SIO_A20GATE
SATA2GP
CRIT_TEMP_REP#
SATA3GP
SATA4GP
USB_MCARD2_DET#

R135 1 0K/FR135 10K/F
R121 1 0K/FR121 10K/F
R125 1 0K/FR125 10K/F

R246 1 0K/FR246 10K/F

R251 1 0K/FR251 10K/F
R247 1 0K/FR247 10K/F
R217 1 0K/FR217 10K/F
R162 1 0K/FR162 10K/F

R256 1 0K/FR256 10K/F
R114 1 0K/FR114 10K/F
R134 1 0K/FR134 10K/F

R133 1 0K/FR133 10K/F
R117 1 0K/FR117 10K/F
R140 1 0K/FR140 10K/F
R122 1 0K/FR122 10K/F
R184 1 0K/FR184 10K/F
R112 1 0K/FR112 10K/F
R160 1 0K/FR160 10K/F

+3.3V_SUS

+3.3V_RUN

+3.3V_RUN

BMBUSY# :(Intel feedback )
Follow CRB chec klist, 1 K is

A A

R159 10K/FR159 10K/F

GPIO35

PCH_GPIO0

WWAN_RADIO_DIS#

R145 1 0K/FR145 10K/F

R146 1 0K/FR146 10K/F

WWAN_RA DIO_DIS# 1-X Hig h = Stro ng (Defa ult)

5

4

3

for int el BIOS validati on purp ose.

BMBUSY#:
If not used, require a weak pull-up
(8.2- KΩ to 10 kΩ) to Vcc3_3.
CRB(V1.0)P28: it has 1K PU and
100 ohm on this net for validation purpose.

2

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

COMPUTER

IBEX PEAK-M 4/6

IBEX PEAK-M 4/6

IBEX PEAK-M 4/6

UM3 1A

UM3 1A

UM3 1A

10 63Thursday, October 15, 2009

10 63Thursday, October 15, 2009

10 63Thursday, October 15, 2009

of

of

1

of

5

U23G

IBEX PEAK-M (POWER)

D D

VCCAPLLEXP = 10 0mA max

VCCAPLLEXP:
This pin can be left as no con nect in
On-Die VR enabl ed mode (defaul t).

+1.05V_PCH

VCCIO = 3.208A max

C C

+1.05V_PCH

L24 *1uH_NCL24 *1uH_NC

C282

C282
10U

10U

10

10
805

805

+1.05V_PCH

+1.05V_PCH

C3471UC347
1U

+3.3V_RUN

VCCCORE=1.524A max

C3701UC370

C374

C374
10U

10U

10

10

1U

805

805

+1.05V_LAN_VCCAPLL _EXP

C362

C362
*10U_NC

*10U_NC

C3591UC359
1U

C3501UC350
1U

C3631UC363
1U

VCC3_3 = 0.357A max

C366

C366

0.1U

0.1U

VCCFDIPLL = 100 mA max

L20 *1uH_NCL20 *1uH_NC

+1.05V_PCH

B B

A A

5

VCCVRM = 0.035 A max

+1.5VS_1.8VS

+1.05V_VCCF DIPLL

+1.05V_PCH

C256

C256
*10U_NC

*10U_NC

VCCIO = 3.208A max

+1.05V_PCH

U23G

AB24

VCCCORE[1]

AB26

VCCCORE[2]

AB28

VCCCORE[3]

AD26

VCCCORE[4]

AD28

VCCCORE[5]

AF26

VCCCORE[6]

AF28

VCCCORE[7]

AF30

VCCCORE[8]

AF31

VCCCORE[9]

AH26

VCCCORE[10]

AH28

VCCCORE[11]

AH30

VCCCORE[12]

AH31

VCCCORE[13]

AJ30

VCCCORE[14]

AJ31

VCCCORE[15]

AK24

VCCIO[24]

BJ24

VCCAPLLEXP

AN20

VCCIO[25]

AN22

VCCIO[26]

AN23

VCCIO[27]

AN24

VCCIO[28]

AN26

VCCIO[29]

AN28

VCCIO[30]

BJ26

VCCIO[31]

BJ28

VCCIO[32]

AT26

VCCIO[33]

AT28

VCCIO[34]

AU26

VCCIO[35]

AU28

VCCIO[36]

AV26

VCCIO[37]

AV28

VCCIO[38]

AW26

VCCIO[39]

AW28

VCCIO[40]

BA26

VCCIO[41]

BA28

VCCIO[42]

BB26

VCCIO[43]

BB28

VCCIO[44]

BC26

VCCIO[45]

BC28

VCCIO[46]

BD26

VCCIO[47]

BD28

VCCIO[48]

BE26

VCCIO[49]

BE28

VCCIO[50]

BG26

VCCIO[51]

BG28

VCCIO[52]

BH27

VCCIO[53]

AN30

VCCIO[54]

AN31

VCCIO[55]

AN35

VCC3_3[1]

AT22

VCCVRM[1]

BJ18

VCCFDIPLL

AM23

VCCIO[1]

IbexPeak-M_QMGS

IbexPeak-M_QMGS

R420 *0_NCR420 *0_NC

+1.05V_PCH

R426 *0_NCR426 *0_NC

R423 SJ_0402R423 SJ_040 2

+1.8V_RUN

R180 SJ_0805R180 SJ_080 5
R188 *0_NCR188 *0_NC

+3.3V_RUN

PCH EDS(V1.0) P 84
+NVRAM_VCCQ:

1.8 V supply fo r Dual Channel NAND interface.
This power is s upplied by core
well. If unused , this pin shou ld
be connected to Vcc3_3.

L33 10 uHL33 10uH

L36 10 uHL36 10uH

POWER

POWER

2

112

2

112

+1.1V_VCCADPLL A

+

C437

+

C437
220U

220U

3528

3528

+1.1V_VCCADPLL B

+

C438

+

C438
220U

220U

3528

3528

4

+VCCA_DAC_1_2

AE50

VCCADAC[1]

AE52

VCCADAC[2]

AF53

VSSA_DAC[1]

VSSA_DAC[2]

VCCALVDS

VSSA_LVDS

VCC3_3[2]

VCC3_3[3]

VCC3_3[4]

VCCVRM[2]

VCCDMI[1]

VCCDMI[2]

VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCPNAND[5]
VCCPNAND[6]
VCCPNAND[7]
VCCPNAND[8]
VCCPNAND[9]

VCCME3_3[1]
VCCME3_3[2]
VCCME3_3[3]
VCCME3_3[4]

AF51

AH38

AH39

AP43
AP45
AT46
AT45

AB34

AB35

AD35

AT24

AT16

AU16

AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15

AM8
AM9
AP11
AP9

CRTLVDS

CRTLVDS

VCC CORE

VCC CORE

VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]

HVCMOS

HVCMOS

DMI

DMI

PCI E*

PCI E*

NAND / SPI

NAND / SPI

FDI

FDI

VCCME3_3:
EDS(V1.0)P84:supply for the Intel Management Engine.This is a separate power plane
that may or may not be powered in S3–S5 states.
This plane must be on in S0
and other times the Intel Management Engine is used.

+1.5VS_1.8VS+1.5V_RUN

+NVRAM_VCCQ

C4161UC416
1U

C4171UC417
1U

4

C431

C431

0.01U

0.01U

VCC3_3 = 0.357A max

C373

C373

0.1U

0.1U

VCCVRM = 0.035A max

VCCDMI = 0.061A max

C3711UC371
1U

VCCPNAND = 0.15 6A max

C330

C330

0.1U

0.1U

VCCME3_3 = 0.08 5A max

C320

C320

0.1U

0.1U

C428

C428

10U

10U

6.3

6.3

+3.3V_RUN

+1.5VS_1.8VS

R215 SJ_0402R215 SJ_0402
R216 *0_NCR216 *0_NC

+NVRAM_VCCQ

+3.3V_RUN

HCB1608KF-18 1T15

HCB1608KF-18 1T15

C423

C423

0.1U

0.1U

+1.05V_PCH

+1.05V_PCH

112

3

L35

L35

VCCACLK = 100mA max

L34 *10u H_NCL34 *10uH_NC

VCCME = 1.998A max

R238 SJ_0402R238 SJ_040 2

+1.05V_PCH

2

+1.05V_VTT

+1.05V_PCH

3

VCCADAC = 100mA max

+3.3V_RUN

+1.1V_LAN_VCCA_CL K

C424

C424
*10U_NC

*10U_NC

2

112

C3841UC384

1U

C357

C357

22U

22U

+1.5VS_1.8VS

VCCADPLLA = 0.0 72A max

VCCADPLLB = 0.0 73A max

VCCIO = 3.208A max

+1.05V_PCH

VCCSUS3_3 = 0.1 63A max

+3.3V_SUS

VCC3_3 = 0.357A max

+3.3V_RUN

V_CPU>1mA

+1.05V_VTT

+RTC_CELL

DCPSUSBYP

C331

C331

0.1U

0.1U

C356

C356

22U

22U

C322 0.1UC322 0 .1U

+1.1V_VCCADPLLA

+1.1V_VCCADPLLB

C3331UC333

C3611UC361

1U

1U

C321 0.1UC321 0 .1U

C339 0.1UC339 0 .1U

C342

C342

C325

C325

0.1U

0.1U

4.7U

4.7U

C3551UC355
1U

VCCRTC = 2mA ma x

C3811UC381

1U

DCPRTC

C3801UC380

1U

DCPSST

DCPSUS

C349

C349

0.1U

0.1U

C332

C332

0.1U

0.1U

C337

C337

0.1U

0.1U

C351

C351

0.1U

0.1U

C418

C418
*1U_NC

*1U_NC

C360

C360

0.1U

0.1U

AP51

AP53

AF23

AF24

AD38

AD39

AD41

AF43

AF41

AF42

AU24

BB51
BB53

BD51
BD53

AH23

AH35

AF34

AH34

AF32

AT18

AU18

Y20

V39

V41

V42

Y39

Y41

Y42

AJ35

V12

Y22

P18

U19

U20

U22

V15

V16

Y16

A12

U23J

U23J

VCCACLK[1]

VCCACLK[2]

VCCLAN[1]

VCCLAN[2]

DCPSUSBYP

VCCME[1]

VCCME[2]

VCCME[3]

VCCME[4]

VCCME[5]

VCCME[6]

VCCME[7]

VCCME[8]

VCCME[9]

VCCME[10]

VCCME[11]

VCCME[12]

V9

DCPRTC

VCCVRM[3]

VCCADPLLA[1]
VCCADPLLA[2]

VCCADPLLB[1]
VCCADPLLB[2]

VCCIO[21]
VCCIO[22]
VCCIO[23]

VCCIO[2]

VCCIO[3]

VCCIO[4]

DCPSST

DCPSUS

VCCSUS3_3[29]

VCCSUS3_3[30]

VCCSUS3_3[31]

VCCSUS3_3[32]

VCC3_3[5]

VCC3_3[6]

VCC3_3[7]

V_CPU_IO[1]

V_CPU_IO[2]

VCCRTC

IbexPeak-M_QMGS

IbexPeak-M_QMGS

POWER

POWER

Clock and Miscellaneous

Clock and Miscellaneous

CPU

CPU

RTC PCI/GPIO/LPC

RTC PCI/GPIO/LPC

PCI/GPIO/LPC

PCI/GPIO/LPC

SATA USB

SATA USB

HDA

HDA

2

VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]

VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]

VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCSUS3_3[21]
VCCSUS3_3[22]
VCCSUS3_3[23]
VCCSUS3_3[24]
VCCSUS3_3[25]
VCCSUS3_3[26]
VCCSUS3_3[27]

VCCSUS3_3[28]

VCCIO[56]

V5REF_SUS

V5REF

VCC3_3[8]

VCC3_3[9]

VCC3_3[10]

VCC3_3[11]

VCC3_3[12]

VCC3_3[13]

VCC3_3[14]

VCCSATAPLL[1]
VCCSATAPLL[2]

VCCIO[9]

VCCVRM[4]

VCCIO[10]

VCCIO[11]

VCCIO[12]

VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]

VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]

VCCME[13]
VCCME[14]
VCCME[15]
VCCME[16]

VCCSUSHDA

2

V24
V26
Y24
Y26

V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26

U23

V23

F24

K49

J38

L38

M36

N36

P36

U35

AD13

AK3
AK1

AH22

AT20

AH19

AD20

AF22

AD19
AF20
AF19
AH20

AB19
AB20
AB22
AD22

AA34
Y34
Y35
AA35

L30

+V5REF_SUS

+V5REF

C293

C293
*1U_NC

*1U_NC

C3401UC340
1U

C352

C352

C358

C358

0.1U

0.1U

0.1U

0.1U

VCCIO = 3.208A max

+1.05V_PCH

R304 100R304 100

D22 SDM10K4 5-7-FD22 SDM10K4 5-7-F

C4521UC452
1U

R269 100R269 100

D19 SDM10K4 5-7-FD19 SDM10K4 5-7-F
C4121UC412
1U

C368

C368

0.1U

0.1U

C326

C326

0.1U

0.1U

+1.05V_VCCSAT APLL

C292

C292
*10U_NC

*10U_NC

VCCVRM = 0.035A max

+1.5VS_1.8VS

VCCME = 1.998A max

+1.05V_PCH

R208 SJ_0402R208 SJ_040 2

2

112

C3651UC365
1U

1

VCCIO = 3.208A max

+1.05V_PCH

VCCSUS3_3 = 0.1 63A max

+3.3V_SUS

1 2

1 2

+3.3V_RUN

21

21

L23 *10u H_NCL23 *10uH_NC

+5V_SUS

V5REF_SUS>1mA

+3.3V_SUS

V5REF>1mA

+5V_RUN

+3.3V_RUN

VCC3_3 = 0.357A max

+1.05V_PCH

VCCIO = 3.208A max

+1.05V_PCH

C3461UC346
1U

VCCSUSHDA = 6mA max

+3.3V_SUS

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

COMPUTER

IBEX PEAK-M 5/6

IBEX PEAK-M 5/6

IBEX PEAK-M 5/6

UM3 1A

UM3 1A

UM3 1A

1

of

of

of

11 6 3Thursday, O ctober 15, 2009

11 6 3Thursday, O ctober 15, 2009

11 6 3Thursday, O ctober 15, 2009

5

IBEX PEAK-M (GND)

D D

U23H

U23H

AB16

VSS[0]

AA19

VSS[1]

AA20

VSS[2]

AA22

VSS[3]

AM19

VSS[4]

AA24

VSS[5]

AA26

VSS[6]

AA28

VSS[7]

AA30

VSS[8]

AA31

VSS[9]

AA32

VSS[10]

AB11

VSS[11]

AB15

VSS[12]

AB23

VSS[13]

AB30

VSS[14]

AB31

VSS[15]

AB32

VSS[16]

AB39

VSS[17]

AB43

VSS[18]

AB47

VSS[19]

AB5

VSS[20]

AB8

VSS[21]

AC2

VSS[22]

AC52

VSS[23]

AD11

VSS[24]

AD12

VSS[25]

AD16

VSS[26]

AD23

VSS[27]

AD30

VSS[28]

C C

B B

AD31
AD32
AD34
AU22
AD42
AD46
AD49

AF12

AH49

AF35
AP13
AN34
AF45
AF46
AF49

AG52
AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47

AK12
AM41
AN19
AK26
AK22
AK23
AK28

AD7
AE2
AE4

Y13

AU4

AF5
AF8
AG2

AH7

AJ19

AJ2
AJ20
AJ22
AJ23
AJ26
AJ28
AJ32
AJ34

AT5

AJ4

VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]

IbexPeak-M_QMGS

IbexPeak-M_QMGS

4

AK30

VSS[80]

AK31

VSS[81]

AK32

VSS[82]

AK34

VSS[83]

AK35

VSS[84]

AK38

VSS[85]

AK43

VSS[86]

AK46

VSS[87]

AK49

VSS[88]

AK5

VSS[89]

AK8

VSS[90]

AL2

VSS[91]

AL52

VSS[92]

AM11

VSS[93]

BB44

VSS[94]

AD24

VSS[95]

AM20

VSS[96]

AM22

VSS[97]

AM24

VSS[98]

AM26

VSS[99]

AM28

VSS[100]

BA42

VSS[101]

AM30

VSS[102]

AM31

VSS[103]

AM32

VSS[104]

AM34

VSS[105]

AM35

VSS[106]

AM38

VSS[107]

AM39

VSS[108]

AM42

VSS[109]

AU20

VSS[110]

AM46

VSS[111]

AV22

VSS[112]

AM49

VSS[113]

AM7

VSS[114]

AA50

VSS[115]

BB10

VSS[116]

AN32

VSS[117]

AN50

VSS[118]

AN52

VSS[119]

AP12

VSS[120]

AP42

VSS[121]

AP46

VSS[122]

AP49

VSS[123]

AP5

VSS[124]

AP8

VSS[125]

AR2

VSS[126]

AR52

VSS[127]

AT11

VSS[128]

BA12

VSS[129]

AH48

VSS[130]

AT32

VSS[131]

AT36

VSS[132]

AT41

VSS[133]

AT47

VSS[134]

AT7

VSS[135]

AV12

VSS[136]

AV16

VSS[137]

AV20

VSS[138]

AV24

VSS[139]

AV30

VSS[140]

AV34

VSS[141]

AV38

VSS[142]

AV42

VSS[143]

AV46

VSS[144]

AV49

VSS[145]

AV5

VSS[146]

AV8

VSS[147]

AW14

VSS[148]

AW18

VSS[149]

AW2

VSS[150]

BF9

VSS[151]

AW32

VSS[152]

AW36

VSS[153]

AW40

VSS[154]

AW52

VSS[155]

AY11

VSS[156]

AY43

VSS[157]

AY47

VSS[158]

BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49

BC10
BC14
BC18

BC22
BC32
BC36
BC40
BC44
BC52

BD48
BD49

BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50

BF49
BF51
BG18
BG24

BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47

AF39

AY7
B11
B15
B19
B23
B31
B35
B39
B43
B47

B7

BB5

BC2

BH9

BD5

BE6
BE8
BF3

BG4

BH7
C12
C50
D51
E12
E16
E20
E24
E30
E34
E38
E42
E46
E48

E6
E8

F49

F5
G10
G14
G18

G2
G22
G32
G36
G40
G44
G52

H16
H20
H30
H34
H38
H42

3

U23I

U23I

VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]

IbexPeak-M_QMGS

IbexPeak-M_QMGS

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]

H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14

2

1

A A

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

Title

Title

Title

IBEX PEAK-M 6/6

IBEX PEAK-M 6/6

IBEX PEAK-M 6/6

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

UM3 1A

UM3 1A

UM3 1A

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

1

of

of

of

12 63Thursd ay, October 15, 2009

12 63Thursd ay, October 15, 2009

12 63Thursd ay, October 15, 2009

5

4

3

2

1

JDI M2A

M_A_ A[15:0][4 ]

D D

M_A_ BS0[4]
M_A_ BS1[4]
M_A_ BS2[4]
M_A_ CS0#[4 ]
M_A_ CS1#[4 ]
M_A_ CLK0[4 ]
M_A_ CLK0#[4]
M_A_ CLK1[4 ]
M_A_ CLK1#[4]
M_A_ CKE0[4]
M_A_ CKE1[4]
M_A_ CAS#[4]
M_A_ RAS#[4]

R54 1 0K/F_4R5 4 10 K/F_4
R61 1 0K/F_4R6 1 10 K/F_4

C C

B B

M_A_ WE#[4 ]

WL AN_SMBCL K[14,3 1,32]
WL AN_SMBDA TA[14,3 1,32]

M_A_ ODT0[4]
M_A_ ODT1[4]

M_A_ DM[7:0][4]

M_A_ DQS[7:0][4]

M_A_ DQS#[7:0 ][4 ]

M_A_ A0
M_A_ A1
M_A_ A2
M_A_ A3
M_A_ A4
M_A_ A5
M_A_ A6
M_A_ A7
M_A_ A8
M_A_ A9
M_A_ A10
M_A_ A11
M_A_ A12
M_A_ A13
M_A_ A14
M_A_ A15

DIMM0_ SA0

DIMM0_ SA1
WL AN_SMBCL K
WL AN_SMBDA TA

M_A_ DM0

M_A_ DM1

M_A_ DM2

M_A_ DM3

M_A_ DM4

M_A_ DM5

M_A_ DM6

M_A_ DM7

M_A_ DQS0

M_A_ DQS1

M_A_ DQS2

M_A_ DQS3

M_A_ DQS4

M_A_ DQS5

M_A_ DQS6

M_A_ DQS7

M_A_ DQS#0

M_A_ DQS#1

M_A_ DQS#2

M_A_ DQS#3

M_A_ DQS#4

M_A_ DQS#5

M_A_ DQS#6

M_A_ DQS#7

JDI M2A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

AS0 A626-JA SG-7H

AS0 A626-JA SG-7H

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

(204P)

(204P)

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

M_A_ DQ0
M_A_ DQ1
M_A_ DQ2
M_A_ DQ3
M_A_ DQ4
M_A_ DQ5
M_A_ DQ6
M_A_ DQ7
M_A_ DQ8
M_A_ DQ9
M_A_ DQ10
M_A_ DQ11
M_A_ DQ12
M_A_ DQ13
M_A_ DQ14
M_A_ DQ15
M_A_ DQ16
M_A_ DQ17
M_A_ DQ18
M_A_ DQ19
M_A_ DQ20
M_A_ DQ21
M_A_ DQ22
M_A_ DQ23
M_A_ DQ24
M_A_ DQ25
M_A_ DQ26
M_A_ DQ27
M_A_ DQ28
M_A_ DQ29
M_A_ DQ30
M_A_ DQ31
M_A_ DQ32
M_A_ DQ33
M_A_ DQ34
M_A_ DQ35
M_A_ DQ36
M_A_ DQ37
M_A_ DQ38
M_A_ DQ39
M_A_ DQ40
M_A_ DQ41
M_A_ DQ42
M_A_ DQ43
M_A_ DQ44
M_A_ DQ45
M_A_ DQ46
M_A_ DQ47
M_A_ DQ48
M_A_ DQ49
M_A_ DQ50
M_A_ DQ51
M_A_ DQ52
M_A_ DQ53
M_A_ DQ54
M_A_ DQ55
M_A_ DQ56
M_A_ DQ57
M_A_ DQ58
M_A_ DQ59
M_A_ DQ60
M_A_ DQ61
M_A_ DQ62
M_A_ DQ63

M_A_ DQ[63:0] [4 ]

PM_E XTTS#0[3 ]

DDR 3_DRAMR ST#[3,14]

+SMDD R_VREF _DIMM0

+1.5V _SUS +D DR_VTT REF

R87

R83

R83
1K/F

1K/F

R85

R85
1K/F

1K/F

R87
*0_NC

*0_NC

12

C22 4

C22 4

0.1U

0.1U

16

16

+3.3V _RUN

+SMDD R_VREF _DQ0

+SMDD R_VREF _DIMM0

+1.5V _SUS

PM_E XTTS#0

JDI M2B

JDI M2B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

AS0 A626-JA SG-7H

AS0 A626-JA SG-7H

M2 VREF

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

(204P)

(204P)

VTT1
VTT2

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

203
204

G1

G1

G2

G2

+0.75 V_DDR _VTT

+1.5V _SUS

C40

C40
10U

10U

C69

C69

10U

10U

A A

+3.3V _RUN

C16 6

C16 6

2.2U/6.3 V/0603

2.2U/6.3 V/0603

Place these Caps near So-Dimm1.

C62

C62

C38

C83

C83
10U

10U

C16 5

C16 5

0.1U

0.1U

5

10U

10U

C38
10U

10U

C58

C58
10U

10U

+0.75 V_DDR _VTT

C17 41UC17 4

1U

C48

C48

0.1U

0.1U

C51

C51

0.1U

0.1U

C17 21UC17 2

1U

C66

C66

0.1U

0.1U

C73

C73

0.1U

0.1U

C52

C52

0.1U

0.1U

C17 31UC17 3

1U

+SMDD R_VREF _DIMM0

+

+

C34

C34

C41

C41
330 U

330 U

734 3

734 3

0.1U

0.1U

2.5

2.5

C17 51UC17 5

1U

4

C37

C37

2.2U/6.3 V/0603

2.2U/6.3 V/0603

C19 8

C19 8
10U

10U

10

10
805

805

C19 7

C19 7
10U

10U

10

10
805

805

C35

C35

0.1U

0.1U

C36

C36

2.2U/6.3 V/0603

2.2U/6.3 V/0603

C19 6

C19 6
10U

10U

10

10
805

805

+1.5V _SUS

R19

R19
1K/F

1K/F

R21

R21
1K/F

1K/F

+DDR _VTTR EF

R17

R17
*0_NC

*0_NC

12

C26

C26

0.1U

0.1U

16

16

3

M1 VREF M3 VREF

+SMDD R_VREF _DQ0 +M_VR EF_DQ_ DIMM0

2

112

R15 SJ_ 0603R1 5 SJ_ 0603

+SMDD R_VREF _DQ0

R12 *0_NCR12 *0_NC

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Do cument Numbe r Rev

Size Do cument Numbe r Rev

Size Do cument Numbe r Rev

Date: Shee t

Date: Shee t

2

Date: Shee t

COMPUTER

DDR 3 DIMM-0

DDR 3 DIMM-0

DDR 3 DIMM-0

UM3 1A

UM3 1A

UM3 1A

13 63Thursday, O ctober 1 5, 2009

13 63Thursday, O ctober 1 5, 2009

13 63Thursday, O ctober 1 5, 2009

of

of

1

of

5

4

3

2

1

+3.3V _RUN

+1.5V _SUS

PM_E XTTS#1

M2 VREF

JDI M1B

JDI M1B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

AS0 A626-N2S N-7H

AS0 A626-N2S N-7H

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

(204P)

(204P)

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

VTT1
VTT2

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

203
204

G1

G1

G2

G2

+0.75 V_DDR _VTT

JDI M1A

M_B_ A[15:0][4 ]

D D

M_B_ BS0[4]
M_B_ BS1[4]
M_B_ BS2[4]
M_B_ CS0#[4 ]
M_B_ CS1#[4 ]
M_B_ CLK0[4 ]
M_B_ CLK0#[4]
M_B_ CLK1[4 ]
M_B_ CLK1#[4]
M_B_ CKE0[4]
M_B_ CKE1[4]
M_B_ CAS#[4]
M_B_ RAS#[4]

R60 1 0K/F_4R6 0 10 K/F_4
R64 1 0K/F_4R6 4 10 K/F_4

+3.3V _RUN

C C

B B

M_B_ WE#[4 ]

WL AN_SMBCL K[13,3 1,32]
WL AN_SMBDA TA[13,3 1,32]

M_B_ ODT0[4]
M_B_ ODT1[4]

M_B_ DM[7:0][4]

M_B_ DQS[7:0][4]

M_B_ DQS#[7:0 ][4 ]

M_B_ A0

M_B_ A1

M_B_ A2

M_B_ A3

M_B_ A4

M_B_ A5

M_B_ A6

M_B_ A7

M_B_ A8

M_B_ A9

M_B_ A10

M_B_ A11

M_B_ A12

M_B_ A13

M_B_ A14

M_B_ A15

DIMM1_ SA0

DIMM1_ SA1
WL AN_SMBCL K
WL AN_SMBDA TA

M_B_ DM0

M_B_ DM1

M_B_ DM2

M_B_ DM3

M_B_ DM4

M_B_ DM5

M_B_ DM6

M_B_ DM7

M_B_ DQS0

M_B_ DQS1

M_B_ DQS2

M_B_ DQS3

M_B_ DQS4

M_B_ DQS5

M_B_ DQS6

M_B_ DQS7

M_B_ DQS#0

M_B_ DQS#1

M_B_ DQS#2

M_B_ DQS#3

M_B_ DQS#4

M_B_ DQS#5

M_B_ DQS#6

M_B_ DQS#7

JDI M1A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

AS0 A626-N2S N-7H

AS0 A626-N2S N-7H

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

(204P)

(204P)

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

M_B_ DQ0
M_B_ DQ1
M_B_ DQ2
M_B_ DQ3
M_B_ DQ4
M_B_ DQ5
M_B_ DQ6
M_B_ DQ7
M_B_ DQ8
M_B_ DQ9
M_B_ DQ10
M_B_ DQ11
M_B_ DQ12
M_B_ DQ13
M_B_ DQ14
M_B_ DQ15
M_B_ DQ16
M_B_ DQ17
M_B_ DQ18
M_B_ DQ19
M_B_ DQ20
M_B_ DQ21
M_B_ DQ22
M_B_ DQ23
M_B_ DQ24
M_B_ DQ25
M_B_ DQ26
M_B_ DQ27
M_B_ DQ28
M_B_ DQ29
M_B_ DQ30
M_B_ DQ31
M_B_ DQ32
M_B_ DQ33
M_B_ DQ34
M_B_ DQ35
M_B_ DQ36
M_B_ DQ37
M_B_ DQ38
M_B_ DQ39
M_B_ DQ40
M_B_ DQ41
M_B_ DQ42
M_B_ DQ43
M_B_ DQ44
M_B_ DQ45
M_B_ DQ46
M_B_ DQ47
M_B_ DQ48
M_B_ DQ49
M_B_ DQ50
M_B_ DQ51
M_B_ DQ52
M_B_ DQ53
M_B_ DQ54
M_B_ DQ55
M_B_ DQ56
M_B_ DQ57
M_B_ DQ58
M_B_ DQ59
M_B_ DQ60
M_B_ DQ61
M_B_ DQ62
M_B_ DQ63

M_B_ DQ[63:0] [4 ]

PM_E XTTS#1[3 ]

DDR 3_DRAMR ST#[3,13]

+SMDD R_VREF _DQ1

+SMDD R_VREF _DIMM1

+1.5V _SUS +D DR_VTT REF

R88

R80

R80
1K/F

1K/F

R84

R84
1K/F

1K/F

R88
*0_NC

*0_NC

12

C22 3

C22 3

0.1U

0.1U

16

16

+SMDD R_VREF _DIMM1

+1.5V _SUS

C46

C46
10U

10U

C43

C43
10U

10U

C81

C81
10U

10U

A A

+3.3V _RUN

C15 3

C15 3

2.2U/6.3 V/0603

2.2U/6.3 V/0603

Place these Caps near So-Dimm2.

C39

C15 4

C15 4

0.1U

0.1U

C39
10U

10U

C61

C61
10U

10U

+0.75 V_DDR _VTT

5

C71

C71
10U

10U

C16 71UC16 7

1U

C45

C45

0.1U

0.1U

C44

C44

0.1U

0.1U

C16 91UC16 9

1U

C49

C49

0.1U

0.1U

C42

C42

0.1U

0.1U

C50

C50

0.1U

0.1U

C17 01UC17 0

1U

+SMDD R_VREF _DIMM1

+

+

C67

C67

C75

C75

*330 U_NC

*330 U_NC

0.1U

0.1U

734 3

734 3

2.5

2.5

C16 81UC16 8

1U

4

C20 2

C20 2
10U

10U

10

10
805

805

C82

C82

2.2U/6.3 V/0603

2.2U/6.3 V/0603

C70

C70

0.1U

0.1U

C20 3

C20 3
10U

10U

10

10
805

805

C88

C88

2.2U/6.3 V/0603

2.2U/6.3 V/0603

C20 1

C20 1
10U

10U

10

10
805

805

+1.5V _SUS +D DR_VTT REF

R13

R20

R20
1K/F

1K/F

R22

R22
1K/F

1K/F

R13
*0_NC

*0_NC

12

C27

C27

0.1U

0.1U

16

16

3

M1 VREF M3 VREF

2

112

R14 SJ_ 0603R1 4 SJ_ 0603

+M_VR EF_DQ_ DIMM1+S MDDR_V REF_DQ 1 +S MDDR_VR EF_DQ1

R16 *0_NCR16 *0_NC

2

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Do cument Numbe r Rev

Size Do cument Numbe r Rev

Size Do cument Numbe r Rev

Date: Shee t

Date: Shee t

Date: Shee t

COMPUTER

DDR 3 DIMM-1

DDR 3 DIMM-1

DDR 3 DIMM-1

UM3 1A

UM3 1A

UM3 1A

14 63Thursday, O ctober 1 5, 2009

14 63Thursday, O ctober 1 5, 2009

14 63Thursday, O ctober 1 5, 2009

of

of

1

of

5

D D

4

3

2

1

Realtek: 0.1uFx6pcs, 22uFx1pcs

+3.3V_RUN

L45 BLM21PG600SN1D

L45 BLM21PG600SN1D

805

805

C C

CLK_ICH_14M[9]

IDT: 0.1uFx5pcs, 10uFx1pcs

C462

C462

C463

C463

10U

10U

0.1uF near the every power pin.

+3.3V_RUN

CLK_ICH_14M

Place the 33 ohm
resistors close to the CK 505

0.1U

0.1U

C645

C645

0.1U

0.1U

R311 10KR311 10K

R348 33R348 33

C464

C464

0.1U

0.1U

SMBDAT2[ 19,29,38]
SMBCLK2[19,29,38]

40mil

C489

C489

0.1U

0.1U

C486

C486

0.1U

0.1U

+3.3V_CLK_VDD

+VDDIO_CLK

CK_PWRGD
CPU_SEL

XTAL_OUT
XTAL_IN

SMBDAT2
SMBCLK2

U14

U14

1

VDD_USB

5

VDD_LCD

17

VDD_SRC

24

VDD_CPU

29

VDD_REF

15

VDD_SRC_IO

18

VDD_CPU_IO

9

VSS_SATA

2

VSS_USB

8

VSS_LCD

12

VSS_SRC

21

VSS_CPU

26

VSS_REF

16

CPU_STOP#

25

CK_PWRGD/PD#_3.3

30

REF_0/CPU_SEL

27

XOUT

28

XIN

31

SDATA

32

SCLK

SLG8SP585VTR

SLG8SP585VTR

CK505

CK505

QFN32

QFN32

CPU-0

CPU-0#

CPU-1

CPU-1#

DOT96T_LPR
DOT96C_LPR

SRC-1

SRC-1#

SATA

SATA#

27MHz_nonSS

27MHz_SS

GND

23
22

20
19

3
4

13
14

10
11

6
7

33

Place within 0.5" of CLKGEN

CLK_BUF_BCLK_P
CLK_BUF_BCLK_N

CLK_BUF_DREFCLK
CLK_BUF_DREFCLK#

CLK_BUF_PCIE_3GPLL
CLK_BUF_PCIE_3GPLL#

CLK_SATA_CLK
CLK_SATA_CLK#

CLK_VGA_27M_R
CLK_VGA_27M_SS_R

R344 33R344 33
R345 33R345 33

Realtek: 0.1uFx3pcs, 22uFx1pcs

CLK_BUF_BCLK_P [9]
CLK_BUF_BCLK_N [9]

CLK_BUF_DREFCLK [9]
CLK_BUF_DREFCLK# [9]

CLK_BUF_PCIE_3GPLL [ 9]
CLK_BUF_PCIE_3GPLL# [9]

CLK_SATA_CLK [9]
CLK_SATA_CLK# [ 9]

CLK_VGA_27M [17]
CLK_VGA_27M_SS [17]

IDT: 0.1uFx2pcs, 10uFx1pcs

+3.3V_RUN

Add capacitor pads for improving WWAN.

C490

C490

*27P_NC

*27P_NC

50

50

CLK_ICH_14M

B B

XTAL_IN XTAL_OUT

C476

C476
33P

33P

50

50

Y2

Y2

21

14.318MHZ

14.318MHZ
C473

C473
33P

33P

1 2

50

50

R308 *0_NCR308 *0_NC

+1.05V_PCH

R305 0R305 0

SLG,IDT: +1.05V
Realtek: +3.3V

L43 BLM21PG600SN1D

L43 BLM21PG600SN1D

805

805

Place each 0.1uF cap as close as
possible to each VDD IO pin. Place
the 10uF caps on the VDD_IO plane.

C475

C475

10U

10U

40mil

C461

C461

0.1U

0.1U

+VDDIO_CLK

C474

C474

0.1U

0.1U

+VDDIO_CLK:
SLG date sheet (V0.2) P15: Min 1.05V,Max3.465V.

+3.3V_RUN

R335

R335
*4.7K_NC

*4.7K_NC

A A

1 2

CPU_SEL

R336

R336

4.7K

4.7K

1 2

C484

C484
*10P/50V_NC

*10P/50V_NC

EMI Capacitor

5

PIN 30 CPU_0 CPU_1

0(default)

1(0.7V-1.5V)

133MHz

100MHz 100MHz

133MHz

CPU_SEL:
SLG date sheet (V0.2) P15:
High Voltage: Min 0.7V, Max 1.5V.
Low Voltage: Min Vss-0.3V, Max 0.35V.
Realtek date sheet(V1.2) P11:
High Voltage: Min 0.7V, Max 1.5V.
Low Voltage: Min Vss-0.3V, Max 0.35V.
IDT date sheet(V0.7) P10:
High Voltage: Min 0.7V, Max 1.5V.
Low Voltage: Min Vss-0.3V, Max 0.35V.

4

VR_PWRGD_CLKEN#[51]

3

+3.3V_RUN

2

31

R310

R310
10K

10K

CK_PWRGD

Q20

Q20
2N7002W-7-F

2N7002W-7-F

2

Realtek date sheet(V1.2) P11: Min 1.05V,Max 3.3V.
IDT date sheet(V0.7) P10: Min 0.9975V,Max 3.465V.

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

COMPUTER

Clock Generator

Clock Generator

Clock Generator

UM3 1A

UM3 1A

UM3 1A

15 63Thursday, October 15, 2009

15 63Thursday, October 15, 2009

15 63Thursday, October 15, 2009

1

5

D D

C C

B B

100 MHz (+/-300 ppm) input frequency, 0-0.7 V single-ended swing.
clock must be provided less than 400ns
after CLKREQ# is asserted

CLK_ PCIE_VGA[9]
CLK_ PCIE_VGA#[9]

PCIE_MTX _GRX_N[0..15][3] PCIE_MRX _GTX_N[0..15][3 ]

PCIE_MTX _GRX_P0
PCIE_MTX _GRX_N0

PCIE_MTX _GRX_P1
PCIE_MTX _GRX_N1

PCIE_MTX _GRX_P2
PCIE_MTX _GRX_N2

PCIE_MTX _GRX_P3
PCIE_MTX _GRX_N3

PCIE_MTX _GRX_P4
PCIE_MTX _GRX_N4

PCIE_MTX _GRX_P5
PCIE_MTX _GRX_N5

PCIE_MTX _GRX_P6
PCIE_MTX _GRX_N6

PCIE_MTX _GRX_P7
PCIE_MTX _GRX_N7

PCIE_MTX _GRX_P8
PCIE_MTX _GRX_N8

PCIE_MTX _GRX_P9
PCIE_MTX _GRX_N9

PCIE_MTX _GRX_P10
PCIE_MTX _GRX_N10

PCIE_MTX _GRX_P11
PCIE_MTX _GRX_N11

PCIE_MTX _GRX_P12
PCIE_MTX _GRX_N12

PCIE_MTX _GRX_P13
PCIE_MTX _GRX_N13

PCIE_MTX _GRX_P14
PCIE_MTX _GRX_N14

PCIE_MTX _GRX_P15
PCIE_MTX _GRX_N15

4

AF30
AE31

AE29
AD28

AD30
AC31

AC29
AB28

AB30
AA31

AA29

AK30
AK32

Y28

Y30
W31

W29
V28

V30
U31

U29

R31

R29
P28

P30
N31

N29
M28

M30

K30

T28

T30

L31

L29

U19A

U19A

PCIE_RX0P
PCIE_RX0N

PCIE_RX1P
PCIE_RX1N

PCIE_RX2P
PCIE_RX2N

PCIE_RX3P
PCIE_RX3N

PCIE_RX4P
PCIE_RX4N

PCIE_RX5P
PCIE_RX5N

PCIE_RX6P
PCIE_RX6N

PCIE_RX7P
PCIE_RX7N

PCIE_RX8P
PCIE_RX8N

PCIE_RX9P
PCIE_RX9N

PCIE_RX10P
PCIE_RX10N

PCIE_RX11P
PCIE_RX11N

PCIE_RX12P
PCIE_RX12N

PCIE_RX13P
PCIE_RX13N

PCIE_RX14P
PCIE_RX14N

PCIE_RX15P
PCIE_RX15N

PCIE_REFCLKP
PCIE_REFCLKN

PART 1 OF 10

PART 1 OF 10

PCI-EXPRESS INTERFACE

PCI-EXPRESS INTERFACE

PCIE_TX0P
PCIE_TX0N

PCIE_TX1P
PCIE_TX1N

PCIE_TX2P
PCIE_TX2N

PCIE_TX3P
PCIE_TX3N

PCIE_TX4P
PCIE_TX4N

PCIE_TX5P
PCIE_TX5N

PCIE_TX6P
PCIE_TX6N

PCIE_TX7P
PCIE_TX7N

PCIE_TX8P
PCIE_TX8N

PCIE_TX9P
PCIE_TX9N

PCIE_TX10P
PCIE_TX10N

PCIE_TX11P
PCIE_TX11N

PCIE_TX12P
PCIE_TX12N

PCIE_TX13P
PCIE_TX13N

PCIE_TX14P
PCIE_TX14N

PCIE_TX15P
PCIE_TX15N

PCIE_CALRN

PCIE_CALRP

AH30
AG31

AG29
AF28

AF27
AF26

AD27
AD26

AC25
AB25

Y23
Y24

AB27
AB26

Y27
Y26

W24
W23

V27
U26

U24
U23

T26
T27

T24
T23

P27
P26

P24
P23

M27
N26

AA22

Y22

3

PCIE_MRX _GTX_C_P 0
PCIE_MRX _GTX_C_N0

PCIE_MRX _GTX_C_P 1
PCIE_MRX _GTX_C_N1

PCIE_MRX _GTX_C_P 2
PCIE_MRX _GTX_C_N2

PCIE_MRX _GTX_C_P 3
PCIE_MRX _GTX_C_N3

PCIE_MRX _GTX_C_P 4
PCIE_MRX _GTX_C_N4

PCIE_MRX _GTX_C_P 5
PCIE_MRX _GTX_C_N5

PCIE_MRX _GTX_C_P 6
PCIE_MRX _GTX_C_N6

PCIE_MRX _GTX_C_P 7
PCIE_MRX _GTX_C_N7

PCIE_MRX _GTX_C_P 8
PCIE_MRX _GTX_C_N8

PCIE_MRX _GTX_C_P 9
PCIE_MRX _GTX_C_N9

PCIE_MRX _GTX_C_P 10
PCIE_MRX _GTX_C_N1 0

PCIE_MRX _GTX_C_P 11
PCIE_MRX _GTX_C_N1 1

PCIE_MRX _GTX_C_P 12
PCIE_MRX _GTX_C_N1 2

PCIE_MRX _GTX_C_P 13
PCIE_MRX _GTX_C_N1 3

PCIE_MRX _GTX_C_P 14
PCIE_MRX _GTX_C_N1 4

PCIE_MRX _GTX_C_P 15
PCIE_MRX _GTX_C_N1 5

PCIE_C ALRN

PCIE_C ALRP

2

PCIE_MRX _GTX_P[0..15][3]PCIE_MTX _GRX_P[0..15][3]

PCIE_MRX _GTX_P0 PCIE_MRX _GTX_C_P 0

PCIE_MRX _GTX_P1

PCIE_MRX _GTX_P2

PCIE_MRX _GTX_P3

PCIE_MRX _GTX_P4

PCIE_MRX _GTX_P5

PCIE_MRX _GTX_P6

PCIE_MRX _GTX_P7

PCIE_MRX _GTX_P8

PCIE_MRX _GTX_P9

PCIE_MRX _GTX_P10

PCIE_MRX _GTX_P11

PCIE_MRX _GTX_P12

PCIE_MRX _GTX_P13

PCIE_MRX _GTX_P14

PCIE_MRX _GTX_P15

PCIE_MRX _GTX_N0

PCIE_MRX _GTX_N1

PCIE_MRX _GTX_N2

PCIE_MRX _GTX_N3

PCIE_MRX _GTX_N4

PCIE_MRX _GTX_N5

PCIE_MRX _GTX_N6

PCIE_MRX _GTX_N7

PCIE_MRX _GTX_N8

PCIE_MRX _GTX_N9

PCIE_MRX _GTX_N10

PCIE_MRX _GTX_N11

PCIE_MRX _GTX_N12

(1.1V)

+PCIE_V DDC

R762.0K R762.0K

R691.2 7K R6 91.27K

PCIE_MRX _GTX_N13

PCIE_MRX _GTX_N14

PCIE_MRX _GTX_N15

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

C1420.1U 16C14 20.1 U 16

C1330.1U 16C13 30.1 U 16

C1800.1U 16C18 00.1 U 16

C1480.1U 16C14 80.1 U 16

C1950.1U 16C19 50.1 U 16

C1810.1U 16C18 10.1 U 16

C2170.1U 16C21 70.1 U 16

C2040.1U 16C2040.1U 16

C2360.1U 16C23 60.1 U 16

C2250.1U 16C22 50.1 U 16

C2450.1U 16C24 50.1 U 16

C2400.1U 16C24 00.1 U 16

C2680.1U 16C26 80.1 U 16

C2710.1U 16C27 10.1 U 16

C2840.1U 16C28 40.1 U 16

C2780.1U 16C27 80.1 U 16

C1430.1U 16C14 30.1 U 16

C1340.1U 16C13 40.1 U 16

C1840.1U 16C18 40.1 U 16

C1490.1U 16C14 90.1 U 16

C2050.1U 16C20 50.1 U 16

C1860.1U 16C18 60.1 U 16

C2220.1U 16C22 20.1 U 16

C2150.1U 16C21 50.1 U 16

C2270.1U 16C22 70.1 U 16

C2280.1U 16C22 80.1 U 16

C2540.1U 16C25 40.1 U 16

C2500.1U 16C25 00.1 U 16

C2760.1U 16C27 60.1 U 16

C2590.1U 16C25 90.1 U 16

C2850.1U 16C28 50.1 U 16

C2800.1U 16C28 00.1 U 16

PCIE_MRX _GTX_C_P 1

PCIE_MRX _GTX_C_P 2

PCIE_MRX _GTX_C_P 3

PCIE_MRX _GTX_C_P 4

PCIE_MRX _GTX_C_P 5

PCIE_MRX _GTX_C_P 6

PCIE_MRX _GTX_C_P 7

PCIE_MRX _GTX_C_P 8

PCIE_MRX _GTX_C_P 9

PCIE_MRX _GTX_C_P 10

PCIE_MRX _GTX_C_P 11

PCIE_MRX _GTX_C_P 12

PCIE_MRX _GTX_C_P 13

PCIE_MRX _GTX_C_P 14

PCIE_MRX _GTX_C_P 15

PCIE_MRX _GTX_C_N0

PCIE_MRX _GTX_C_N1

PCIE_MRX _GTX_C_N2

PCIE_MRX _GTX_C_N3

PCIE_MRX _GTX_C_N4

PCIE_MRX _GTX_C_N5

PCIE_MRX _GTX_C_N6

PCIE_MRX _GTX_C_N7

PCIE_MRX _GTX_C_N8

PCIE_MRX _GTX_C_N9

PCIE_MRX _GTX_C_N1 0

PCIE_MRX _GTX_C_N1 1

PCIE_MRX _GTX_C_N1 2

PCIE_MRX _GTX_C_N1 3

PCIE_MRX _GTX_C_N1 4

PCIE_MRX _GTX_C_N1 5

1

4

AL27

PERSTB

M92-S2/M 92-LP

M92-S2/M 92-LP

M92-S2 XT AJ072800T04 100-CG1675(216-0728004)
M92-S2 AJ072800T03 100-CG1643(216-0728003)

3

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Docume nt Number Rev

Size Docume nt Number Rev

Size Docume nt Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

COMPUTER

VGA-M92 -XT PCIE

VGA-M92 -XT PCIE

VGA-M92 -XT PCIE

UM3 1A

UM3 1A

UM3 1A

1

of

of

of

16 63Thursday, October 15, 200 9

16 63Thursday, October 15, 200 9

16 63Thursday, October 15, 200 9

PLTRST#[3,9,29,31 ,32,41]

A A

5

5

MEMORY APERTURE SIZE SE LECT

MEMORY
SIZE

128MB

256MB

64MB

D D

512MB

+3.3V_DE LAY

GPIO Straps
table

GPIO0

GPIO1

GPIO2

GPIO3

GPIO4

GPIO5

C C

GPIO6

HSYNC
(AH26)

VSYNC
(AJ27)

+3.3V_DE LAY

R401 *1 0K_NCR401 *1 0K_NC
R403 *1 0K_NCR403 *1 0K_NC
R86 *10K_ NCR8 6 *10K_NC
R399 *1 0K_NCR399 *1 0K_NC
R400 *1 0K_NCR400 *1 0K_NC
R90 *10K_ NCR9 0 *10K_NC

R79 10KR 79 10K
R409 *1 0K_NCR409 *1 0K_NC
R405 10 KR40 5 10K
R378 10 KR37 8 10K
R379 *1 0K_NCR379 *1 0K_NC
R46 10KR 46 10K
R48 10KR 48 10K

B B

R411 10 KR41 1 10K

DAC1_VGAVSYNC

DAC1_VGAHSYNC

0\0

0\1

1\0

1\1

+1.8V_RU N_GFX

A A

Memory Straps

800MHz
512MB(64M*16) Samsung

800MHz
512MB(64M*16) Hynix

CFG2

CFG3
GPIO9 GPIO13 GPIO 12 GPIO 11

0

0 0 1

0 1 0

1 0 0

R406 10 KR40 6 10K

1 2

R407 *1 0K_NCR407 *1 0K_NC

1 2

R408 *1 0K_NCR408 *1 0K_NC

1 2

DESCRIPTION OF DEFA ULT SETTINGS

GPIO(0) - TX_PWRS_ENB (Transmitter Power Sav ings Enable)

0: 50% Tx output swing for mobile mode

1: full Tx output swing (Default setting for Desktop)

GPIO(1) - TX_DEEMPH_E N (Transmitter De-emphasis Enable)

0: Tx de-emphasis disabled for mobile mode

1: Tx de-emphasis enabled (Default se tting for Desktop)

GPIO(2) - BIF_GEN2_EN (5.0 GT/s Enable)

0 : Default. (Driver Contr olled Gen2)

1 : Strap Controlled Gen2

ATI reserved config uration straps .

ATI reserved config uration straps .

GPIO_5_AC_BATT
0 : Battery saving mod e = 0.0 V
1 : AC (Performance mode) = 3.3 V

ATI Internal u se on ly

00: No Audio function
01: Audio for DisplayPort only

10: Aud io for D isplayPo rt only and HDM I if do ngle is detected .
11: Aud io for b oth Disp layPort and HDM I.
HDMI mu st only be enabl ed on s ystems t hat are legally
entitle d. it is the res ponsibi llity of the sy stem
designe r to ens ure tha t the s ystem is entitl ed
to supp ort this feature

1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2

HD Audi o straps

No audio function

Audio for DisplayPort only

Audio for DisplayPort and HDMI if dongle is detected

Audio for both DisplayPort and HDMI

R72 10KR 72 10K

1 2

R396 *1 0K_NCR396 *1 0K_NC

1 2

R395 *1 0K_NCR395 *1 0K_NC

1 2

RAM_TYPE
_CFG2

CFG0

CFG1

0 0

RAM_CFG0
RAM_CFG1
RAM_CFG2

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5

HDMI_HD _EN
TEMP_FAIL
GFX_CLKR EQ#
VGAVSYNC
VGAHSYNC
DAC1_VGAVSYNC
DAC1_VGAHS YNC

TEMP_FAIL

RAM_TYPE_CFG 0
RAM_TYPE_CFG 1
RAM_TYPE_CFG 2

RAM_TYPE
_CFG1

26

RAM_TYPE
_CFG0

00 1

0 1 0

5

FM9
setting

0

0

0

0

0

0

0

11

26

Quanta PN
(QuantaBuy)

AKD5LGGT502

+3.3V_D ELAY +3.3V_R UN

OSC_SP READ

CLK_ VGA_27M_SS[15]

CLK_ VGA_27M[15]

OSC_OU T

Spread Spectrum

If U4, the discrete spread spectrum chip
is not used, th en pop R 48 in o rder to
pull-do wn BXTAL OUT for EMI rea sons.

R362 *10K _NCR3 62 *1 0K_NC

OSC_OU T

R361 *0_ NCR36 1 *0_NC

1 2

OSC_SP READ

Quanta PN
(WinBuy)

4

R38 SJ_060 3R38 SJ_06 03

2

112

R58 *0_ NCR58 *0_ NC

1 2

R56 *0_ NCR56 *0_ NC

1 2

R380 100 /FR38 0 1 00/F

R373 120 /FR37 3 1 20/F

Y3

*27MHZ_ NCY3*27MHZ_ NC

R368 *1M_N CR 368 *1M_NC

12

C563

C563
*12P/5 0V_NC

*12P/5 0V_NC

50

50

U17

U17

1

XIN/CLKIN

2

VSS

3

SO

4

SSCLK

*P181 9GF-08S R_NC

*P181 9GF-08S R_NC

21

REFCLK

R372 S J_040 2R372 S J_040 2

1 2

R369 *18 2R_N CR 369 *182 R_NC

R367

R367
*1M_NC

*1M_NC

1 2

1 2

R370 *0_ NCR37 0 *0_NC

12

C564

C564
*12P/5 0V_NC

*12P/5 0V_NC

50

50

R363

R363
*10K_ NC

*10K_ NC

8

XOUT

7

VDD

6

PD#

5

112

+3.3V_R UN

2

S0

-1.75% (DOWN) 0

Vendor PN 31 level PN

K4W1G1646E-HC12

H5TQ1G63BFR-12CAKD5LZGTW00

4

CLK_ VGA_27M_SSIN_ R

12

R57

R57
*10K_ NC

*10K_ NC

R371 *22 1/F_NCR371 *221 /F_NC

R364

R364
*10K_ NC

*10K_ NC

+3VL

C557

C557

12

*10U _NC

*10U _NC

805

805
10

10

3

U19B

U19B

PART 2 OF 10

PART 2 OF 10

DVP PORT DAC1

For Par k S3:
Install All com ponents in this Box
R402,R3 97,R398, L9,C136, L19,C26 1

For M92-S2: DO NOT Install any Component
in this Box.

+1.8V_R UN_GFX +1.8V_RU N_GFX

L9 * BLM15BD 121SN 1D_N CL9 *BLM15 BD121 SN1D _NC

+PCIE_ VDDC

L19 *BL M15BD1 21SN 1D_NCL1 9 *BLM15 BD121 SN1D_ NC

XTALIN [2 1]

XTALOUT [2 1]

L49

L49

12

*BLM11 A05S_NC

*BLM11 A05S_NC

C553

C553
*0.1U _NC

*0.1U _NC

10

10

+3.3V_R UN

+1.8V_RU N_GFX_R

C136

C136
*1U_ NC

*1U_ NC

C261

C261
*1U_ NC

*1U_ NC

+1.8V_RU N_GFX_R

GFX_CORE _CNTR L2[50]

GFX_CORE _CNTR L0[50]

GFX_CORE _CNTR L1[50]

PANEL_B KEN[29]

THERMAL_IN T#[19 ]

+1.8V_RU N_GFX

For M92: No stuff R1011
For Park: Stuff R1011

R365 10KR36 5 10K

ENVDD[2 4]

BIA_PWM[24]

3

BB_EN A[18]

R35 49 9/FR35 49 9/F

1 2

R36 24 9/FR3 6 249/F

C137 0 .1UC13 7 0.1U

R67

R67
10K

10K

R402 *0 _NCR402 *0 _NC

1 2

R397 *0 _NCR397 *0 _NC

1 2

R398 *0 _NCR398 *0 _NC

1 2

RAM_TYPE_CFG 0
RAM_TYPE_CFG 1
RAM_TYPE_CFG 2

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5

HDMI_HD _EN

T50 PADT50 PAD
T51 PADT51 PAD

RAM_CFG0
RAM_CFG1
RAM_CFG2

CLK_ VGA_27M_SSIN_ R

R404 * 0_NCR40 4 *0_NC

1 2

T10 PADT10 PAD

TEMP_FAIL

T11 PADT11 PAD

GFX_CLKR EQ#

R410 1KR410 1 K

T55 PADT55 PAD
T53 PADT53 PAD
T56 PADT56 PAD
T14 PADT14 PAD

T9 PADT9 PAD
T49 PADT49 PAD
T58 PADT58 PAD
T48 PADT48 PAD
T8 PADT8 PAD

HPD1

12

1 2

R104 * 10K_N CR1 04 *10K _NC

2

112

R68 SJ_040 2R68 SJ_040 2

T13 PADT13 PAD
T12 PADT12 PAD

T4 PADT4 PAD

112

R366 SJ_04 02R366 SJ_0 402

+3.3V_DE LAY

R42 * 10K_N CR4 2 *10 K_NC

R45 1 0KR45 10K

TEST_EN[19]

AF24 is TESTEN on both
M92S2 and ParkS3.
Impleme nt 10K ohm PU
and PD for both and
connected to K7 pin

2

VREFG

XO_IN2
XO_IN

12

U1

DVPCLK

AC7

DVPCNTL_0

Y2

DVPCNTL_1

U5

DVPCNTL_2

AA1

DVPCNTL_MVP_0

Y4

DVPCNTL_MVP_1

Y7

DVPDATA_0

V2

DVPDATA_1

Y8

DVPDATA_2

V4

DVPDATA_3

AB7

DVPDATA_4

W1

DVPDATA_5

AB8

DVPDATA_6

W3

DVPDATA_7

AB9

DVPDATA_8

W5

DVPDATA_9

AC6

DVPDATA_10

W6

DVPDATA_11

AD7

DVPDATA_12

AA3

DVPDATA_13

AC8

DVPDATA_14

AA5

DVPDATA_15

AE8

DVPDATA_16

AA6

DVPDATA_17

AE9

DVPDATA_18

AB4

DVPDATA_19

AD9

DVPDATA_20

AB2

DVPDATA_21

AC10

DVPDATA_22

AC5

DVPDATA_23

U6

GPIO_0

U10

GPIO_1

T10

GPIO_2

U8

GPIO_3_SMBDATA

U7

GPIO_4_SMBCLK

T9

GPIO_5_AC_BATT

T8

GPIO_6_TACH

T7

GPIO_7_BLON

P10

GPIO_8_ROMSO

P4

GPIO_9_ROMSI

P2

GPIO_10_ROMSCK

N6

GPIO_11

N5

GPIO_12

N3

GPIO_13

Y9

GPIO_14_HPD2

N1

GPIO_15_PWRCNTL_0

M4

GPIO_16_SSIN

R6

GPIO_17_THERMAL_INT

W10

GPIO_18_HPD3

M2

GPIO_19_CTF

P8

GPIO_20_PWRCNTL_1

P7

GPIO_21_BB_EN

N8

GPIO_22_ROMCSB

N7

GPIO_23_CLKREQB

L6

JTAG_TRSTB

L5

JTAG_TDI

L3

JTAG_TCK

L1

JTAG_TMS

K4

JTAG_TDO

AB13

GENERICA

W8

GENERICB

W9

GENERICC

W7

GENERICD

AD10

GENERICE_HPD4

AC14

HPD1

AC16

VREFG

N10

NC_PWRGOOD

AB22

RSVD#8

AC22

RSVD#9

L9

NC#1

N9

NC#2

AB16

RSVD#3

AB12

RSVD#2

AB11

RSVD#1

AF24

TESTEN

M92-S2/M92 -LP

M92-S2/M92 -LP

RESERVED

RESERVED

DVP PORT DAC1

I/O

I/O

2

AM26

R

AK26

RB

AL25

G

AJ25

GB

AH24

B

AG25

BB

AH26

HSYNC

AJ27

VSYNC

AG24

AVDD

AE22

AVSSQ

AE23

VDD1DI

AD23

VSS1DI

AD22

RSET

DAC2

DAC2

AM12

R2

AK12

R2B

AL11

G2

AJ11

G2B

AK10

B2

AL9

B2B

AL13

H2SYNC

AJ13

V2SYNC

AH12

C

AM10

Y

AJ9

COMP

AE20

A2VDD

AE17

A2VDDQ

AE19

A2VSSQ

Keep A2VSSQ awa y from noisy gr ound.

AD19

VDD2DI

AC19

VSS2DI

AG13

R2SET

2

DAC1_VGAHS YNC
DAC1_VGAVSYNC

R66 4 99RR66 499R

C566

C566

0.01U

0.01U

R2SET

R377 71 5R37 7 715

C162

C162
*0.1U _NC

*0.1U _NC

C182

C182
*0.1U _NC

*0.1U _NC

VGA_RED

VGA_GRN

VGA_BLU

+A2VDDQ

C577

C577

0.1U

0.1U

AVDD=70mA max

+1.8V_RU N_GFX

VDD1DI=45mA max

VGA_RED [25]

VGA_GRN [2 5]

VGA_BLU [25 ]

VGAHSYNC
VGAVSYNC

C582

C582

0.01U

0.01U

Place very close to ASIC balls.

VGAHSYNC [25]
VGAVSYNC [25]

C5711UC571
1U

1

DIS only

HPD1

VGA_BLU
VGA_GRN
VGA_RED

R375

R375

R376

R376

R374

R374
150/F

150/F

R381

R381
10K

10K

2

Q27

Q27

+3.3V_DE LAY

+3.3V_DE LAY

Layout Note:
Place 1 50 ohm
termina tion res istors
close t o ATI CH IP.

R386

R386
10K

10K

2

12

Q28

Q28

1 3

DTC11 4TUAT106

DTC11 4TUAT106

150/F

150/F

150/F

150/F

1 3

MMST3904- 7-F

MMST3904- 7-F

A2VDD=65mA max

L51 BLM15 BD121 SN1DL51 BLM15BD 121SN 1D

+1.8V_RU N_GFX

A2VDDQ=1mA max

+1.8V_RU N_GFX

VDD2DI=40mA max

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

Title

Title

Title

VGA-M92-XT IO

VGA-M92-XT IO

VGA-M92-XT IO

Size Docum ent Nu mbe r R ev

Size Docum ent Nu mbe r R ev

Size Docum ent Nu mbe r R ev

UM3 1A

UM3 1A

UM3 1A

Date: Sheet

Date: Sheet

Date: Sheet

1

R392

R392
100K

100K

HDMI_DE T [24]

17 6 3Thurs day, Octobe r 15, 200 9

17 6 3Thurs day, Octobe r 15, 200 9

17 6 3Thurs day, Octobe r 15, 200 9

of

of

of

+1.5V_RUN

C244

C244

0.01U

0.01U

D D

C C

B B

+VCC_GFX_CORE

R63

R63

1 2

*0_NC

*0_NC

BB_ENA[1 7]

A A

5

layout note: close to VDDR1#[1:17]

C273

C275

C275

0.01U

0.01U

C2671UC267
1U

C294

C294
10U

10U

For M92-S2:No stuff R455
Stuff R71,R70 ,R78
Park:No stuff R71,R70,R78
Stuff R455

+1.5V_RUN

+BBP

Q9

Q9

3

12

C155

C155
1U

1U

402

402

6.3

6.3

2

R49

R49
10K

10K

5

C273

0.01U

0.01U

C2521UC252
1U

C295

C295
10U

10U

+1.8V_RUN_GFX

C258

C2651UC265
1U

+1.5V_RUN

C258

0.01U

0.01U

C2511UC251
1U

C235

C235
10U

10U

L5

L5

BLM15BD121SN1D

BLM15BD121SN1D

C264

C264

0.1U

0.1U

C2661UC266
1U

+3.3V_DELAY

+1.8V_RUN_GFX

C255

C255

0.1U

0.1U

C253

C253

0.1U

0.1U

C112

C112
10U

10U

VDDR4#[1..4] & VDDR5#[1..4]=340mA max

L53 BLM15BD121 SN1DL53 BLM15BD121 SN1D

For PARK:No stuff L53,C591,C590
For M92: Stuff L53,C591,C590

3 1

1

+1.8V_RUN_GFX

SI2301BDS-T-G E3

SI2301BDS-T-G E3

2

31

Q8

Q8
2N7002W-7- F

2N7002W-7- F

For PARK: Stuff R63
No st uff C155,Q9,Q10 ,R51,Q8,R49
For M92: Stuff C155,Q9,Q10,R51 ,Q8,R49
No st uff R63

2

VDD_CT#[1..4]=110mA max

VDDR3#[1..4]=50mA max

C2161UC216
1U

C2091UC209
1U

Q10

Q10
2N7002W-7- F

2N7002W-7- F

1 2

R51 100KR51 10 0K

C5911UC591
1U

C139

C139

0.1U

0.1U

C151

C151

0.1U

0.1U

C2261UC226
1U

C274

C274

0.1U

0.1U

4

VDDR1#[1..17]=2A max

C260

C260

0.1U

0.1U

+1.5V_RUN

+VDD_CT

C1231UC123

C1311UC131
1U

C1851UC185
1U

C5901UC590
1U

(0.9~1.2V)

+VCC_GFX_CORE

+5V_RUN

C220

C220

0.1U

0.1U

1U

+VDDRH1

C119

C119

0.1U

0.1U

C200

C200

0.1U

0.1U

C192

C192

0.1U

0.1U

4

U19D

R455 *150/F _NCR455 *150/F _NC

12

R71 0R71 0

R70 0R70 0

R78 0R78 0

AA20
AA21
AB20
AB21

AA17
AA18
AB17
AB18

AA11
AA12

H13
H16
H19

J10
J23
J24

J9
K10
K23
K24

K9
L11
L12
L13
L20
L21
L22

Y11
Y12

U11
U12
V11
V12

L17

L16

U19D

VDDR1#1
VDDR1#2
VDDR1#3
VDDR1#4
VDDR1#5
VDDR1#6
VDDR1#7
VDDR1#8
VDDR1#9
VDDR1#10
VDDR1#11
VDDR1#12
VDDR1#13
VDDR1#14
VDDR1#15
VDDR1#16
VDDR1#17

VDD_CT#1
VDD_CT#2
VDD_CT#3
VDD_CT#4

VDDR3#1
VDDR3#2
VDDR3#3
VDDR3#4

VDDR4#1
VDDR4#2
VDDR4#3
VDDR4#4

VDDR5#1
VDDR5#2
VDDR5#3
VDDR5#4

VDDRHA

VSSRHA

M92-S2/M92-L P

M92-S2/M92-L P

PART 4 OF 10

PART 4 OF 10

POWER

POWER

layout note: close to VDDC#[1:25]

C2191UC219

C2491UC249

1U

1U

C1791UC179

C2291UC229
1U

1U

C214

C214
10U

10U

C1781UC178
1U

(0.9~1.2V)

+VCC_GFX_CORE

C189

C189
10U

10U

PCIE_VDDR#1
PCIE_VDDR#2
PCIE_VDDR#3
PCIE_VDDR#4
PCIE_VDDR#5
PCIE_VDDR#6
PCIE_VDDR#7
PCIE_VDDR#8

PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8

PCIE_VDDC#9
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12

VDDC#10
VDDC#11
VDDC#12
VDDC#13
VDDC#14
VDDC#15
VDDC#16
VDDC#17
VDDC#18
VDDC#19
VDDC#20
VDDC#21
VDDC#22
VDDC#23
VDDC#24
VDDC#25

C1941UC194
1U

C1931UC193
1U

C190

C190
10U

10U

VDDC#1
VDDC#2
VDDC#3
VDDC#4
VDDC#5
VDDC#6
VDDC#7
VDDC#8
VDDC#9

VDDCI#1
VDDCI#2
VDDCI#3
VDDCI#4
VDDCI#5
VDDCI#6
VDDCI#7
VDDCI#8

C2071UC207
1U

C2211UC221
1U

3

3

AB23
AC23
AD24
AE24
AE25
AE26
AF25
AG26

L23
L24
L25
L26
M22
N22
N23
N24
R22
T22
U22
V22

AA15
M11
M12
N15
N17
R13
R16
R18
R21
T12
T15
T17
T20
U13
U16
U18
U21
V15
V17
V20
V21
Y13
Y16
Y18
Y21

M13
M15
M16
M17
M18
M20
M21
N20

PCIE_VDDR#[1..8]=500mA max

C1561UC156
1U

(0.9~1.2V)

+VCC_GFX_CORE

DDCI=2A max

+VDDCI

(0.9~1.2V)

(0.9~1.2V)

+VCC_GFX_CORE

C2301UC230
1U

C1991UC199

C2181UC218

1U

1U

C191

C191

0.1U

0.1U

C1301UC130
1U

VDDC#[2..3]=120mA max

C171

C171

C1601UC160

0.1U

0.1U

1U

C2111UC211
1U

C2121UC212
1U

+BBP

C1211UC121
1U

+1.8V_RUN_GFX

C161

C161

C206

C206

10U

10U

0.01U

0.01U

PCIE_VDDC#[1..12]=2A max

C1171UC117

C2471UC247

1U

1U

AA27
AB24
AB32
AC24
AC26
AC27
AD25
AD32
AE27
AF32
AG27
AH32

K28
K32

L27
M32
N25
N27
P25
P32
R27
T25
T32
U25
U27
V32
W25
W26
W27
Y25
Y32

A30

AA13
AA16
AB10
AB15

AB6
AC9
AD6
AD8
AE7

AG12
AH10
AH28

B10
B12
B14
B16
B18
B20
B22
B24
B26

C32
E28
F10
F12
F14
F16

2

U19E

U19E

PCIE_VSS#1
PCIE_VSS#2
PCIE_VSS#3
PCIE_VSS#4
PCIE_VSS#5
PCIE_VSS#6
PCIE_VSS#7
PCIE_VSS#8
PCIE_VSS#9
PCIE_VSS#10
PCIE_VSS#11
PCIE_VSS#12
PCIE_VSS#13
PCIE_VSS#14
PCIE_VSS#15
PCIE_VSS#16
PCIE_VSS#17
PCIE_VSS#18
PCIE_VSS#19
PCIE_VSS#20
PCIE_VSS#21
PCIE_VSS#22
PCIE_VSS#23
PCIE_VSS#24
PCIE_VSS#25
PCIE_VSS#26
PCIE_VSS#27
PCIE_VSS#28
PCIE_VSS#29
PCIE_VSS#30
PCIE_VSS#31

A3

GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
GND#8
GND#9
GND#10
GND#11
GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20
GND#21
GND#22
GND#23

B6

GND#24

B8

GND#25

C1

GND#26
GND#27
GND#28
GND#29
GND#30
GND#31
GND#32

M92-S2/M92-L P

M92-S2/M92-L P

(0.9~1.2V)

2

C233

C233

0.1U

0.1U

C1131UC113
1U

C1161UC116
1U

PART 5 OF 10

PART 5 OF 10

GND

GND

C232

C232

0.1U

0.1U

VSS_MECH#1
VSS_MECH#2
VSS_MECH#3

+VDDCI

C2411UC241

1U

C2481UC248
1U

GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40
GND#41
GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50
GND#51
GND#52
GND#53
GND#54
GND#55
GND#56
GND#57
GND#58
GND#59
GND#60
GND#61
GND#62
GND#63
GND#64
GND#65
GND#66
GND#67
GND#68
GND#69
GND#70
GND#71
GND#72
GND#73
GND#74
GND#75
GND#76
GND#77
GND#78
GND#79
GND#80
GND#81
GND#82
GND#83
GND#84
GND#85
GND#86
GND#87
GND#88
GND#89

+PCIE_VDDC

C2311UC231

1U

(1.1V)

F18
F2
F20
F22
F24
F26
F6
F8
G10
G27
G31
G8
H14
H17
H2
H20
H6
J27
J31
K11
K2
K22
K6
M6
N11
N12
N13
N16
N18
N21
P6
P9
R12
R15
R17
R20
T13
T16
T18
T21
T6
U15
U17
U20
U3
U9
V13
V16
V18
V6
Y10
Y15
Y17
Y20
Y6
T11
R11

A32
AM1
AM32

1

L4 BLM18PG1 21SN1DL4 BLM18PG 121SN1D

C109

C109
10U

10U

603

603

1 2

6.3

6.3

C110

C110
10U

10U

603

603

1 2

6.3

6.3

C108

C108
10U

10U

L15

L15

BLM18EG221SN1D

BLM18EG221SN1D

C237

C237
10U

10U

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

Title

Title

Title

VGA-M92-XT POWER/G ND

VGA-M92-XT POWER/G ND

VGA-M92-XT POWER/G ND

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

UM3 1A

UM3 1A

UM3 1A

Date: Sheet

Date: Sheet

Date: Sheet

(PCIE_VDDC 1.0~1.1V + /- 5%@ 2A )

(1.1V)

12

C114

C114
1U

1U

402

402

6.3

6.3

12

C103

C103
1U

1U

402

402

6.3

6.3

(0.9~1.2V)

+VCC_GFX_CORE

+PCIE_VDDC+1.1V_GFX_PCIE

C118

C118

0.1U

0.1U

16

16

C122

C122

0.1U

0.1U

16

16

1

18 63Thursd ay, October 15, 2009

18 63Thursd ay, October 15, 2009

18 63Thursd ay, October 15, 2009

of

of

of

5

4

3

2

1

MEMORY INTERFACE

U19C

D D

MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23

12

MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63

CLKTESTA
CLKTESTB

MEMTEST

QSA#[7..0][20 ]

C C

QSA[7..0][2 0]

DQMA#[7..0][20]

MDA[63..0][20]

MAA[12..0][20]

A_BA[2..0][20]

QSA#[7..0]

QSA[7..0]

DQMA#[7..0]

MDA[63..0]

MAA[12..0]

A_BA[2..0]

DIVIDER RESISTORS DDR3

R428

R428
100R

100R

R173

R173
100R

100R

MVREFS_A

MVREF TO 1.5V

MVREF TO GND

MVREFD_A

C299

C299

0.1U

0.1U

CLKTESTA
CLKTESTB

Only For Park

5

C306

C306

0.1U

0.1U

C300

C300

0.01U

0.01U

B B

+1.5V_RUN

+1.5V_RUN

R166

R166
100R

100R

R165

R165
100R

100R

A A

68

C269 *0.01 U_NCC269 *0. 01U_NC
C243 *0.01 U_NCC243 *0. 01U_NC

R91

R91

R120

R120

*51.1/F_NC

*51.1/F_NC

*51.1/F_NC

*51.1/F_NC

route 50ohms si ngle-ended
100ohms diff an d keep short

100R

100R

C307

C307

0.01U

0.01U

R108

R108

4.7K

+1.5V_RUN

4.7K

TEST_EN[1 7]

MAA13[20]

Reserve for Park-S3

R109

R109

R106

R106

4.7K

4.7K

243R

243R

R41 *0_NCR41 *0_NC
R164 *243R_ NCR16 4 *24 3R_NC
R163 *243R_ NCR16 3 *24 3R_NC

U19C

K27

DQA_0

J29

DQA_1

H30

DQA_2

H32

DQA_3

G29

DQA_4

F28

DQA_5

F32

DQA_6

F30

DQA_7

C30

DQA_8

F27

DQA_9

A28

DQA_10

C28

DQA_11

E27

DQA_12

G26

DQA_13

D26

DQA_14

F25

DQA_15

A25

DQA_16

C25

DQA_17

E25

DQA_18

D24

DQA_19

E23

DQA_20

F23

DQA_21

D22

DQA_22

F21

DQA_23

E21

DQA_24

D20

DQA_25

F19

DQA_26

A19

DQA_27

D18

DQA_28

F17

DQA_29

A17

DQA_30

C17

DQA_31

E17

DQA_32

D16

DQA_33

F15

DQA_34

A15

DQA_35

D14

DQA_36

F13

DQA_37

A13

DQA_38

C13

DQA_39

E11

DQA_40

A11

DQA_41

C11

DQA_42

F11

DQA_43

A9

DQA_44

C9

DQA_45

F9

DQA_46

D8

DQA_47

E7

DQA_48

A7

DQA_49

C7

DQA_50

F7

DQA_51

A5

DQA_52

E5

DQA_53

C3

DQA_54

E1

DQA_55

G7

DQA_56

G6

DQA_57

G1

DQA_58

G3

DQA_59

J6

DQA_60

J1

DQA_61

J3

DQA_62

J5

DQA_63

K26

MVREFDA

J26

MVREFSA

K8

CLKTESTA

L7

CLKTESTB

J8

MEM_CALRP1

G20

NC_MAA_13

G14

NC_MAA_14

K7

NC_MEM_CALRN1

K25

NC_MEM_CALRP0

J25

NC_MEM_CALRN0

M92-S2/M92- LP

M92-S2/M92- LP

PART 3 OF 10

PART 3 OF 10

MEMORY

MEMORY

INTERFACE

INTERFACE

R164, R163 No stuff Stuff

R109 240 Ohms(0.5%) 150 Ohms(1%)

R41 No stuff Stuff

C269,C243
R120,R91

R108,R106 Stuff No stuff

4

M92 PARK

No stuff Stuff

MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8

MAA_9
MAA_10
MAA_11

MAA_BA0
MAA_BA1

MAA_12

MAA_BA2

DQMA_0
DQMA_1
DQMA_2
DQMA_3
DQMA_4
DQMA_5
DQMA_6
DQMA_7

QSA_0
QSA_1
QSA_2
QSA_3
QSA_4
QSA_5
QSA_6

QSA_7

READ STROBE

READ STROBE

QSA_0B
QSA_1B
QSA_2B
QSA_3B
QSA_4B
QSA_5B
QSA_6B
QSA_7B

WRITE STROBE

WRITE STROBE

ODTA0
ODTA1

CLKA0
CLKA1

CLKA0B
CLKA1B

RASA0B
RASA1B

CASA0B
CASA1B

CSA0B_0
CSA0B_1

CSA1B_0
CSA1B_1

CKEA0
CKEA1

WEA0B
WEA1B

DRAM_RST

MAA1

J20

MAA2

H23

MAA3

G23

MAA4

G24

MAA5

H24

MAA6

J19

MAA7

K19

MAA8

J14

MAA9

K14

MAA10

J11

MAA11

J13

A_BA0

J16

A_BA1

L15

MAA12

H11

A_BA2

G11

DQMA#0

E32

DQMA#1

E30

DQMA#2

A21

DQMA#3

C21

DQMA#4

E13

DQMA#5

D12

DQMA#6

E3

DQMA#7

F4

QSA0

H28

QSA1

C27

QSA2

A23

QSA3

E19

QSA4

E15

QSA5

D10

QSA6

D6

QSA7

G5

QSA#0

H27

QSA#1

A27

QSA#2

C23

QSA#3

C19

QSA#4

C15

QSA#5

E9

QSA#6

C5

QSA#7

H4

L18
K16

H26
G9

H25
H9

G22
G17

G19
G16

H22
J22

G13
K13

K20
J17

G25
H10

L10

ODTA0 [2 0]
ODTA1 [2 0]

CLKA0 [ 20]
CLKA1 [ 20]

CLKA0# [20]
CLKA1# [20]

RASA0# [20]
RASA1# [20 ]

CASA0# [20]
CASA1# [20 ]

CSA0_0# [20 ]

CSA1_0# [20]

CKEA0 [20]
CKEA1 [20]

WEA0# [20]

WEA1# [20]

R231 0R23 1 0

C272

C272
2200P/50 V

2200P/50 V

+1.5V_RUN

12

R431

R431

2.2K

2.2K

12

R230

R230
*10K_NC

*10K_NC

1 2

THERMAL_INT#[17 ]

SMBCLK2[15,29, 38]

SMBDAT2[15,29,38 ]

DRAM_RST# [20]

THERMAL_INT#

Change B OM
Change U 7003 fr om AL001 032001 t o AL001 032002

R230

R231

R431

C272

3

+3.3V_RUN

12

12

R417

R417

R414

R414

4.7K

4.7K

4.7K

4.7K

8

THERMAL_INT#

R421 1 0KR421 1 0K

7

6

5

12

M92 Par k

No stuf f Stuff

0 ohm

Stuff

2200pF

PN:CH2226K9B00

2

680 ohm

PN:CS16802FB09PN:CS00002JB38

No stuf f

68pF

PN:CH06806JB01

THERMAL MONITOR

U9

U9

SCLK

SDATA

ALERT#

GND

ADM1032ARMZ-1

ADM1032ARMZ-1

+3.3V_RUN

+3.3V_RUN

1

VDD

2

D+

3

D-

4

THERM#

Title

Title

Title

Size Document Nu mber Rev

Size Document Nu mber Rev

Size Document Nu mber Rev

Date: Sheet

Date: Sheet

Date: Sheet

VGA_THERMDP [21]

12

C345

C345
2200P

2200P

50

50

1

VGA_THERMDN [21]

SYS_SHDN# [38]

of

of

of

19 63Thursda y, October 15, 2009

19 63Thursda y, October 15, 2009

19 63Thursda y, October 15, 2009

SYS_SHDN#

12

C336

C336

0.1U

0.1U

16

16

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

VGA-M92-XT MEMORY/THERM

VGA-M92-XT MEMORY/THERM

VGA-M92-XT MEMORY/THERM

UM3 1A

UM3 1A

UM3 1A

MAA0

K17