Quanta TWK Schematic
1
www.schematic-x.blogspot.com
2
3
4
5
6
7
8
TWK Shark Bay DIAGRAM
01
+3V/+5V S5
A A
+1.05V
CPU Core
DDR3L
Charge
B B
Dis-Charge
+VGACORE
+1.5V_GFX
PG.33
PG.34
PG.37~38
PG.35
PG.32
PG.36
PG.39
PG.40
SODIMM1
Max. 4GB
PG.12
SODIMM2
Max. 4GB
PG.13
HDD
ODD
PG.30
PG.30
mSATA
PG.30
1600MT/s
DDR3 L
Channel A
1600MT/s
DDR3 L
Channel B
SATA0 6GB/s
SATA0
SATA4 3GB/s
SATA4
SATA1 6GB/s
SATA1
INTEL
Haswell
Processor : Quad Core
Power : 47 (Watt)
Package : rPGA947
Size : 37.5 x 37.5 (mm)
PG.2~5
FDI
DMI
INTEL PCH
PCI-E x8
eDP (5.4Gb/s)
DDI (5.4Gb/s)
DP Port B
nVIDIA
N15P-GX(GT 860M)
GB4128
FCBGA908
29mm X 29mm
PG.14~18
DDR3 900MHz
VRAM
1024MB GDDR5B x32
eDP
RTD 2136S
DP to LVDS Converter
PG.19~20
LVDS Interface
PAGE 22
LVDS
HDMI
PG.23
PG.21
+1.05V_GFX/3V_GFX
PG.41
LANE2 LANE1
C C
LAN
RTL8111GS-CG
GbE
PCI-E x 1
WLAN
BT COMBO
PG.26PG.27
USB 2.0
PORT10
PCI-E x 1
LANE3
Card Reader
5227-GRT
PG.24
KBC
D D
IT8528E
TPKB
PG.28PG.26 PG.30PG.31
1
2
PG.31
FANROM
LPC
3
Lynx Point
Power : 3.5 Watt
Package : FCBGA695
Size : 20 x 20 (mm)
PG.6~11
AUDIO
CODEC
ALC282-CG
4
USB 3.0
PORT1
USB 3.0
PORT2
USB 2.0
PG.25
5
USB3.0 Ports
USB3.0 Ports
PORT1
PORT2,9
USB2.0
Ports X2
Speaker
HP/MIC
Analog MIC
PG.26
PG.28
PG.28
Webcam
PG.25
PG.25
PG.25
6
USB Charge X1
SLG55583A
PORT0
PORT3
PG.23
NB5
NB5
NB5
PG.28
Stackup
TOP
GND
IN1
IN2
VCC
IN3
GND
BOT
PROJECT : TWK
PROJECT : TWK
PROJECT : TWK
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
1 42Wednesday, April 23, 2014
1 42Wednesday, April 23, 2014
1 42Wednesday, April 23, 2014
8
1A
1A
1A
5
4
3
2
1
Haswell Processor (DMI,PEG,FDI) Haswell Processor (CLK,MISC,JTAG)
U16A
FDI_CSYNC_R
EDP_AUXP
EDP_AUXN
EDP_TXP0
EDP_TXP1
EDP_TXN0
EDP_TXN1
EDP_HPD [22,23]
5
D21
DMI_RX#[0]
C21
DMI_RX#[1]
B21
DMI_RX#[2]
A21
DMI_RX#[3]
D20
DMI_RX[0]
C20
DMI_RX[1]
B20
DMI_RX[2]
A20
DMI_RX[3]
D18
DMI_TX#[0]
C17
DMI_TX#[1]
B17
DMI_TX#[2]
A17
DMI_TX#[3]
D17
DMI_TX[0]
C18
DMI_TX[1]
B18
DMI_TX[2]
A18
DMI_TX[3]
P33
FDI_TX#[0]
N32
FDI_TX#[1]
R33
FDI_TX[0]
P32
FDI_TX[1]
J29
FDI_INT
H29
FDI_CSYNC
T28
DDIB_TX#[0]
T30
DDIB_TX#[1]
U29
DDIB_TX#[2]
U31
DDIB_TX#[3]
U28
DDIB_TX[0]
U30
DDIB_TX[1]
V29
DDIB_TX[2]
V31
DDIB_TX[3]
T34
DDIC_TX#[0]
U35
DDIC_TX#[1]
U32
DDIC_TX#[2]
U33
DDIC_TX#[3]
U34
DDIC_TX[0]
V35
DDIC_TX[1]
T32
DDIC_TX[2]
V33
DDIC_TX[3]
P29
DDID_TX#[0]
N28
DDID_TX#[1]
P31
DDID_TX#[2]
N30
DDID_TX#[3]
R29
DDID_TX[0]
P28
DDID_TX[1]
R31
DDID_TX[2]
P30
DDID_TX[3]
E24
eDP_RCOMP
R27
EDP_DISP_UTIL
P27
eDP_HPD
N27
eDP_AUX
M27
eDP_AUX#
R35
eDP_TX[0]
P34
eDP_TX[1]
P35
eDP_TX#[0]
N34
eDP_TX#[1]
HSW_RPGA_EDS_PGA
PEG_RCOMPO
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PCI EXPRESS* - GRAPHICS
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
DMI
Intel(R) DDI FDI
eDP
PEG x8 disable (UMA only remove)
PEG_TX[0..7][14] PEG_TX#[0..7][14]
C_PEG_TX0
C594 0.22U/10V_4
C_PEG_TX1
C601 0.22U/10V_4
C_PEG_TX2
C602 0.22U/10V_4
C_PEG_TX3
C610 0.22U/10V_4
C_PEG_TX4
C613 0.22U/10V_4
C_PEG_TX5
C614 0.22U/10V_4
C_PEG_TX6
C618 0.22U/10V_4
C_PEG_TX7
C624 0.22U/10V_4
0.22uF AC coupling Caps for PCIE GEN1/2/3 0.22uF AC coupling Caps for PCIE GEN1/2/3
PEG_TX0
PEG_TX1
PEG_TX2
PEG_TX3
PEG_TX4
PEG_TX5
PEG_TX6
PEG_TX7
DMI_TXN0[6]
DMI_TXN1[6]
DMI_TXN2[6]
DMI_TXN3[6]
DMI_TXP0[6]
DMI_TXP1[6]
D D
FDI_CSYNC[6]
IN_D2#[21]
IN_D1#[21]
IN_D0#[21]
IN_CLK#[21]
C C
B B
A A
IN_CLK[21]
FDI_CSYNC & FDI_INT
Trace length < 10000 Mils
Impendance = 50 ohm
EDP_DISP_UTIL
+VCCIO_OUT
INT_eDP_HPD_Q
Q26
2N7002K
DMI_TXP2[6]
DMI_TXP3[6]
DMI_RXN0[6]
DMI_RXN1[6]
DMI_RXN2[6]
DMI_RXN3[6]
DMI_RXP0[6]
DMI_RXP1[6]
DMI_RXP2[6]
DMI_RXP3[6]
FDI_TXN0[6]
FDI_TXN1[6]
FDI_TXP0[6]
FDI_TXP1[6]
FDI_INT[6]
R75 *0_4/S
IN_D2[21]
IN_D1[21]
IN_D0[21]
eDP_RCOMP
R102 *0_4
INT_eDP_HPD_Q
EDP_AUXP[22]
EDP_AUXN[22]
EDP_TXP0[22]
EDP_TXP1[22]
EDP_TXN0[22]
EDP_TXN1[22]
4/30 CRB V1.0 -> 10K
R423
10K_4
3
2
R426
1
100K_4
DPB_LANE0_N
DPB_LANE1_N
DPB_LANE2_N
DPB_LANE3_N
DPB_LANE0_P
DPB_LANE1_P
DPB_LANE2_P
DPB_LANE3_P
E23
M29
K28
M31
L30
M33
L32
M35
L34
E29
D28
E31
D30
E35
D34
E33
E32
L29
L28
L31
K30
L33
K32
L35
K34
F29
E28
F31
E30
F35
E34
F33
D32
H35
H34
J33
H32
J31
G30
C33
B32
B31
A30
B29
A28
B27
A26
B25
A24
J35
G34
H33
G32
H31
H30
B33
A32
C31
B30
C29
B28
C27
B26
C25
B24
PEG_RX#0
PEG_RX#1
PEG_RX#2
PEG_RX#3
PEG_RX#4
PEG_RX#5
PEG_RX#6
PEG_RX#7
PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
PEG_RX6
PEG_RX7
C_PEG_TX#0
C_PEG_TX#1
C_PEG_TX#2
C_PEG_TX#3
C_PEG_TX#4
C_PEG_TX#5
C_PEG_TX#6
C_PEG_TX#7
C_PEG_TX0
C_PEG_TX1
C_PEG_TX2
C_PEG_TX3
C_PEG_TX4
C_PEG_TX5
C_PEG_TX6
C_PEG_TX7
4
PEG_COMP
PEG_RX#[0..7] [14]
PEG_RX[0..7] [14]
THERMTRIP# (50ohm)
Trace Length: 1.1~12 inches
Rb need placment near PCH
4/30 CRB 1.0 Add
PM_SYNC (50ohm)
Trace Length: 1~11.25 inches
H_PWRGOOD (50ohm)
Trace Length: 1~11.25 inches
SM_DRAMPWROK Processor Input.
+3VS5
C_PEG_TX#0
C_PEG_TX#1
C_PEG_TX#2
C_PEG_TX#3
C_PEG_TX#4
C_PEG_TX#5
C_PEG_TX#6
C_PEG_TX#7
DDR_VR_PWRGD[35]
SYS_PWROK[6]
PM_DRAM_PWRGD (50ohm)
Trace Length: 2~7 inches
DDR_VR_PWRGD (50ohm)
Trace Length: 2~7 inches
C595 0.22U/10V_4
C596 0.22U/10V_4
C605 0.22U/10V_4
C606 0.22U/10V_4
C612 0.22U/10V_4
C617 0.22U/10V_4
C620 0.22U/10V_4
C621 0.22U/10V_4
R159 *0_4
DDR_VR_PWRGD
H_PECI (50ohm)
Route on microstrip only
Spacing > 18 mils
Trace Length: 15 inch
HPECI Ra,Ca need placement close to EC.
EC_PECI[9,31]
PROCHOT# (50ohm)
Trace Length <11 inches
H_PROCHOT#[31,37]
C304
Cb
PM_THRMTRIP#R[9,31]
PM_SYNC[6]
H_PWRGOOD[9]
TP62
TP61
R254 43_4
C454 *47P/50V_4
4/30 CRB 1.0 Add
R136 56.2/F_4
Cb need placment near VR
47P/50V_4
+1.05V
R463 *0_4/S
C623 *0.1U/10V_4
R435 *0_4/S
R434 10K_4
CPU RESET#
PLTRST#[8,14,24,26,27,31]
CPU_PLTRST# (50ohm)
Trace Length: 10~17 inches
To change the resistor values in the DRAMPWROK logic to reduce the
PM_DRAM_PWRGD_C (50ohm)
Trace Length: < 1 inches
R160
R161
100K_4
100K_4 R151
2
1
3 5
leakage on VDDPWRGOOD
U5
4
PM_DRAM_PWRGD_C
74AHC1G09GW
SKTOCC#
TP_CATERR#
Ra
Ca
+VCCST
H_PROCHOT#_R
PM_THRMTRIP#_R
R487 *1K/F_4
H_PWRGOOD_R
PM_DRAM_PWRGD_R
CPU_PLTRST#R[9,31]
R462 *750/F_4
C313
0.1U/10V_4
R145
3.3K_4
H_PECI
Rb
PM_SYNC_R
CPU_PLTRST#R
+1.35VSUS
1.8K/F_4
DG 498556 -> 3.3K
D5 *RB500V-40
C317
*0.1U/10V_4
DP & PEG Compensation
R90 24.9/F_4
eDP_RCOMP
Trace length < 100 Mils
Trace Width 20 Mils Trace Spacing 25 Mils
R375 24.9/F_4
PEG_RCOMP
Trace length < 400 MILS
Trace width = 12 MILS
Trace spacing = 15 MILS
PEG_TX#0
PEG_TX#1
PEG_TX#2
PEG_TX#3
PEG_TX#4
PEG_TX#5
PEG_TX#6
PEG_TX#7
+VCCIOA_OUT
+VCCIOA_OUT
3
DG 498556 -> 1.8K
R146 0_4
R158 *0_4
C314
*0.1U/10V_4
eDP_RCOMP
PEG_COMP
U16B
AP32
SKTOCC#
AN32
CATERR#
AR27
PECI
AK31
FC_AK31
AM30
PROCHOT#
AM35
THERMTRIP#
AT28
PM_SYNC
AL34
UNCOREPWRGOOD
AC10
SM_DRAMPWROK
AT26
RESET#
R461
*1.5K/F_4
HSW_RPGA_EDS_PGA
PM_DRAM_PWRGD_R
PM_DRAM_PWRGD
PM_DRAM_PWRGD_R (50ohm)
Trace Length: 0.5~1 inches
SSC_DPLL_REF_CLK
MISC
SSC_DPLL_REF_CLK#
DPLL_REF_CLK
DPLL_REF_CLK#
CLOCKS
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
DDR3
MISC
THERMALPWR MANAGEMENT
JTAG & BPM
DDR3_DRAMRST#_R (50ohm)
Trace Length < 6 inches
PM_DRAM_PWRGD [6]
Processor pull-up (CPU)
2
+1.35VSUS
DDR3_DRAMRST#[12,13]
+VCCIO_OUT [4,37]
+VCCIOA_OUT [4]
+1.05V [4,7,9,10,29,34,41]
+1.35VSUS [4,12,13,35,40]
+3VS5 [6,7,9,10,26,28,29,31,33,35,36,41]
+3V [6,7,8,9,10,12,13,14,17,18,21,22,23,24,25,26,27,29,30,31,36,37,39]
H_PROCHOT#
CLK_DPLL_SSCLKP
CLK_DPLL_SSCLKN
XDP_TDO
XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TCLK
XDP_TRST#
NB5
NB5
NB5
Host CLK:
Trace length < 11000 MILS
Trace spacing = 15 ,20 MILS, Impendence 90 ohm
E26
BCLK
BCLK#
PRDY#
PREQ#
TRST#
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
CLK_CPU_BCLKP
D26
CLK_CPU_BCLKN
E27
CLK_DPLL_SSCLKP
F27
CLK_DPLL_SSCLKN
H28
CLK_DPLL_NSCCLKP
G28
CLK_DPLL_NSCCLKN
AN3
CPU_DRAMRST#
AP3
SM_RCOMP_0
AR3
SM_RCOMP_1
AP2
SM_RCOMP_2
SM_RCOMP[0] W:12mils/S:15mils/L: 500mils,
SM_RCOMP[1] W:12mils/S:15mils/L: 500mils,
SM_RCOMP[2] W:12mils/S:15mils/L: 500mils,
AR29
XDP_PRDY#
AT29
XDP_PREQ#
AM34
XDP_TCLK
TCK
AN33
XDP_TMS
TMS
AM33
XDP_TRST#
AM31
XDP_TDI_R
TDI
AL33
XDP_TDO
TDO
AP33
XDP_DBRST#
AR30
XDP_BPM0
AN31
XDP_BPM1
AN29
XDP_BPM2
AP31
XDP_BPM3
AP30
XDP_BPM4
AN28
XDP_BPM5
AP29
XDP_BPM6
AP28
XDP_BPM7
R124 100/F_4
R135 75/F_4
R132 100/F_4
R445 *1K_4
DDR3 DRAM RESET
R142 *1K_4
R138 *0_4/S
C306
*0.1U/10V_4
R133 62_4
R77 *10K_4
R76 *10K_4
R119 51_4
R128 *51_4
R126 *51_4
R449 *51_4
R122 51_4
R127 51_4
PROJECT : TWK
PROJECT : TWK
PROJECT : TWK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
+VCCIO_OUT
+1.05V
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
HAS 1/4 (PCIE&DMI&FDI)
HAS 1/4 (PCIE&DMI&FDI)
HAS 1/4 (PCIE&DMI&FDI)
1
02
CLK_CPU_BCLKP [8]
CLK_CPU_BCLKN [8]
CLK_DPLL_SSCLKP [8]
CLK_DPLL_SSCLKN [8]
CLK_DPLL_NSCCLKP [8]
CLK_DPLL_NSCCLKN [8]
TP24
CPU XDP
TP63
TP13
TP16
TP15
TP14
TP12
+3V
XDP_DBRST# [6]
TP21
TP26
TP23
TP18
TP20
TP25
TP19
TP66
CPU_DRAMRST#
2 42Wednesday, April 23, 2014
2 42Wednesday, April 23, 2014
2 42Wednesday, April 23, 2014
1A
1A
1A
5
4
3
2
1
Haswell Processor (DDR3)
U16C
D D
M_A_DQ[63:0][12]
C C
B B
M_A_BS#0[12]
M_A_BS#1[12]
M_A_BS#2[12]
M_A_CAS#[12]
M_A_RAS#[12]
M_A_WE#[12]
TP11
RSVD_V10 must be grounded
CPU SM_VREF
A A
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
AR15
SA_DQ[0]
AT14
SA_DQ[1]
AM14
SA_DQ[2]
AN14
SA_DQ[3]
AT15
SA_DQ[4]
AR14
SA_DQ[5]
AN15
SA_DQ[6]
AM15
SA_DQ[7]
AM9
SA_DQ[8]
AN9
SA_DQ[9]
AM8
SA_DQ[10]
AN8
SA_DQ[11]
AR9
SA_DQ[12]
AT9
SA_DQ[13]
AR8
SA_DQ[14]
AT8
SA_DQ[15]
AJ9
SA_DQ[16]
AK9
SA_DQ[17]
AJ6
SA_DQ[18]
AK6
SA_DQ[19]
AJ10
SA_DQ[20]
AK10
SA_DQ[21]
AJ7
SA_DQ[22]
AK7
SA_DQ[23]
AF4
SA_DQ[24]
AF5
SA_DQ[25]
AF1
SA_DQ[26]
AF2
SA_DQ[27]
AG4
SA_DQ[28]
AG5
SA_DQ[29]
AG1
SA_DQ[30]
AG2
SA_DQ[31]
J1
SA_DQ[32]
J2
SA_DQ[33]
J5
SA_DQ[34]
H5
SA_DQ[35]
H2
SA_DQ[36]
H1
SA_DQ[37]
J4
SA_DQ[38]
H4
SA_DQ[39]
F2
SA_DQ[40]
F1
SA_DQ[41]
D2
SA_DQ[42]
D3
SA_DQ[43]
D1
SA_DQ[44]
F3
SA_DQ[45]
C3
SA_DQ[46]
B3
SA_DQ[47]
B5
SA_DQ[48]
E6
SA_DQ[49]
A5
SA_DQ[50]
D6
SA_DQ[51]
D5
SA_DQ[52]
E5
SA_DQ[53]
B6
SA_DQ[54]
A6
SA_DQ[55]
E12
SA_DQ[56]
D12
SA_DQ[57]
B11
SA_DQ[58]
A11
SA_DQ[59]
E11
SA_DQ[60]
D11
SA_DQ[61]
B12
SA_DQ[62]
A12
SA_DQ[63]
V5
SA_BS[0]
U5
SA_BS[1]
AD1
SA_BS[2]
U8
SA_CAS#
U6
SA_RAS#
U7
SA_WE#
AC7
RSCD_AC7
V10
RSCD_V10
HSW_RPGA_EDS_PGA
DDR SYSTEM MEMORY A
SA_DIMM_VREFDQ
SB_DIMM_VREFDQ
SA_CLK[0]
SA_CLK#[0]
SA_CKE[0]
SA_CLK[1]
SA_CLK#[1]
SA_CKE[1]
SA_CLK[2]
SA_CLK#[2]
SA_CKE[2]
SA_CLK[3]
SA_CLK#[3]
SA_CKE[3]
SA_CS#[0]
SA_CS#[1]
SA_CS#[2]
SA_CS#[3]
SA_ODT[0]
SA_ODT[1]
SA_ODT[2]
SA_ODT[3]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
SM_VREF
V4
U4
AD9
V3
U3
AC9
V2
U2
AD8
V1
U1
AC8
M7
L9
M9
M10
M8
L7
L8
L10
AP15
M_A_DQSN0
AP8
M_A_DQSN1
AJ8
M_A_DQSN2
AF3
M_A_DQSN3
J3
M_A_DQSN4
E2
M_A_DQSN5
C5
M_A_DQSN6
C11
M_A_DQSN7
AP14
M_A_DQSP0
AP9
M_A_DQSP1
AK8
M_A_DQSP2
AG3
M_A_DQSP3
H3
M_A_DQSP4
E3
M_A_DQSP5
C6
M_A_DQSP6
C12
M_A_DQSP7
V8
M_A_A0
AC6
M_A_A1
V9
M_A_A2
U9
M_A_A3
AC5
M_A_A4
AC4
M_A_A5
AD6
M_A_A6
AC3
M_A_A7
AD5
M_A_A8
AC2
M_A_A9
V6
M_A_A10
AC1
M_A_A11
AD4
M_A_A12
V7
M_A_A13
AD3
M_A_A14
AD2
M_A_A15
AM3
+VREF_CA_CPU
F16
SMDDR_VREF_DQ0_M3
F13
SMDDR_VREF_DQ1_M3
R386*1K_4
R385*1K_4
M_A_CLKP0 [12]
M_A_CLKN0 [12]
M_A_CKE0 [12]
M_A_CLKP1 [12]
M_A_CLKN1 [12]
M_A_CKE1 [12]
M_A_CS#0 [12]
M_A_CS#1 [12]
M_A_ODT0 [12]
M_A_ODT1 [12]
M_A_DQSN[7:0] [12]
M_A_DQSP[7:0] [12]
M_A_A[15:0] [12]
+VREF_CA_CPU
SMDDR_VREF_DQ0_M3 [12]
SMDDR_VREF_DQ1_M3 [13]
M_B_DQ[63:0][13]
M_B_BS#0[13]
M_B_BS#1[13]
M_B_BS#2[13]
M_B_CAS#[13]
M_B_RAS#[13]
M_B_WE#[13]
TP10
RSVD_R10 must be grounded
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
U16D
AR18
SB_DQ[0]
AT18
SB_DQ[1]
AM17
SB_DQ[2]
AM18
SB_DQ[3]
AR17
SB_DQ[4]
AT17
SB_DQ[5]
AN17
SB_DQ[6]
AN18
SB_DQ[7]
AT12
SB_DQ[8]
AR12
SB_DQ[9]
AN12
SB_DQ[10]
AM11
SB_DQ[11]
AT11
SB_DQ[12]
AR11
SB_DQ[13]
AM12
SB_DQ[14]
AN11
SB_DQ[15]
AR5
SB_DQ[16]
AR6
SB_DQ[17]
AM5
SB_DQ[18]
AM6
SB_DQ[19]
AT5
SB_DQ[20]
AT6
SB_DQ[21]
AN5
SB_DQ[22]
AN6
SB_DQ[23]
AJ4
SB_DQ[24]
AK4
SB_DQ[25]
AJ1
SB_DQ[26]
AJ2
SB_DQ[27]
AM1
SB_DQ[28]
AN1
SB_DQ[29]
AK2
SB_DQ[30]
AK1
SB_DQ[31]
L2
SB_DQ[32]
M2
SB_DQ[33]
L4
SB_DQ[34]
M4
SB_DQ[35]
L1
SB_DQ[36]
M1
SB_DQ[37]
L5
SB_DQ[38]
M5
SB_DQ[39]
G7
SB_DQ[40]
J8
SB_DQ[41]
G8
SB_DQ[42]
G9
SB_DQ[43]
J7
SB_DQ[44]
J9
SB_DQ[45]
G10
SB_DQ[46]
J10
SB_DQ[47]
A8
SB_DQ[48]
B8
SB_DQ[49]
A9
SB_DQ[50]
B9
SB_DQ[51]
D8
SB_DQ[52]
E8
SB_DQ[53]
D9
SB_DQ[54]
E9
SB_DQ[55]
E15
SB_DQ[56]
D15
SB_DQ[57]
A15
SB_DQ[58]
B15
SB_DQ[59]
E14
SB_DQ[60]
D14
SB_DQ[61]
A14
SB_DQ[62]
B14
SB_DQ[63]
R7
SB_BS[0]
P8
SB_BS[1]
AA9
SB_BS[2]
P7
SB_CAS#
R6
SB_RAS#
P6
SB_WE#
AG8
RSVD_AG8
R10
RSVD_R10
HSW_RPGA_EDS_PGA
AA4
SB_CLK[0]
Y4
SB_CLK#[0]
AF10
SB_CKE[0]
AA3
SB_CLK[1]
Y3
SB_CLK#[1]
AG10
SB_CKE[1]
AA2
SB_CLK[2]
Y2
SB_CLK#[2]
AG9
SB_CKE[2]
AA1
SB_CLK[3]
Y1
SB_CLK#[3]
AF9
SB_CKE[3]
P4
SB_CS#[0]
R2
SB_CS#[1]
P3
SB_CS#[2]
P1
SB_CS#[3]
R4
SB_ODT[0]
R3
SB_ODT[1]
R1
SB_ODT[2]
P2
SB_ODT[3]
AP18
AP11
AP5
AJ3
L3
H9
C8
C14
AP17
AP12
AP6
AK3
M3
H8
C9
C15
R8
Y5
Y10
AA5
Y7
AA6
Y6
AA7
Y8
AA10
R9
Y9
AF7
P9
AA8
AG7
M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7
M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
DDR SYSTEM MEMORY B
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
M_B_CLKP0 [13]
M_B_CLKN0 [13]
M_B_CKE0 [13]
M_B_CLKP1 [13]
M_B_CLKN1 [13]
M_B_CKE1 [13]
M_B_CS#0 [13]
M_B_CS#1 [13]
M_B_ODT0 [13]
M_B_ODT1 [13]
M_B_DQSN[7:0] [13]
M_B_DQSP[7:0] [13]
M_B_A[15:0] [13]
03
PROJECT : TWK
PROJECT : TWK
PROJECT : TWK
Quanta Computer Inc.
Quanta Computer Inc.
+VREF_CA_CPU [12]
NB5
NB5
5
4
3
2
NB5
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
HAS 2/4 (DDR3 I/F)
HAS 2/4 (DDR3 I/F)
HAS 2/4 (DDR3 I/F)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
3 42Wednesday, April 23, 2014
3 42Wednesday, April 23, 2014
3 42Wednesday, April 23, 2014
1A
1A
1A
5
4
3
2
1
Haswell Processor (POWER)
U16F
+VCC_CORE
AA26
VCC1
AA28
VCC2
AA34
VCC3
AA30
VCC4
D D
C C
B B
C221
22U/6.3VS_6
C607
22U/6.3VS_6
C584
22U/6.3VS_6
C563
22U/6.3VS_6
C598
22U/6.3VS_6
C575
22U/6.3VS_6
C197
22U/6.3VS_6
C576
*22U/6.3VS_6
C564
22U/6.3VS_6
C562
10U/6.3V_6
C590
22U/6.3VS_6
C585
22U/6.3VS_6
C608
22U/6.3VS_6
C220
22U/6.3VS_6
C574
22U/6.3VS_6
C196
22U/6.3VS_6
C599
22U/6.3VS_6
C179
*22U/6.3VS_6
C583
22U/6.3VS_6
C140
10U/6.3V_6
C166
22U/6.3VS_6
C151
22U/6.3VS_6
C589
22U/6.3VS_6
C152
22U/6.3VS_6
C597
22U/6.3VS_6
C165
22U/6.3VS_6
C222
22U/6.3VS_6
C588
22U/6.3VS_6
C609
10U/6.3V_6
C168
10U/6.3V_6
VCC Output Decoupling Recommendations
470uFx4 7343
22uFx8
22uFx11
10uFx11
A A
TOP socket side
4 on TOP, 4 on BOT near socket edge
0805
0805
TOP, inside socket cavity
0805
BOT, inside socket cavity
5
AA32
VCC5
AB26
VCC6
AB29
VCC7
AB25
VCC8
AB27
VCC9
AB28
VCC10
AB30
VCC11
AB31
VCC12
AB33
VCC13
AB34
VCC14
AB32
VCC15
AC26
VCC16
AB35
VCC17
AC28
VCC18
AD25
VCC19
AC30
VCC20
AD28
VCC21
AC32
VCC22
AD31
VCC23
AC34
VCC24
AD34
VCC25
AD26
VCC26
AD27
VCC27
AD29
VCC28
AD30
VCC29
AD32
VCC30
AD33
VCC31
AD35
VCC32
AE26
VCC33
AE32
VCC34
AE28
VCC35
AE30
VCC36
AG28
VCC37
AG34
VCC38
AE34
VCC39
AF25
VCC40
AF26
VCC41
AF27
VCC42
AF28
VCC43
AF29
VCC44
AF30
VCC45
AF31
VCC46
AF32
VCC47
AF33
VCC48
AF34
VCC49
AF35
VCC50
AG26
VCC51
AH26
VCC52
AH29
VCC53
AG30
VCC54
AG32
VCC55
AH32
VCC56
AH35
VCC57
AH25
VCC58
AH27
VCC59
AH28
VCC60
AH30
VCC61
AH31
VCC62
AH33
VCC63
AH34
VCC64
AJ25
VCC65
AJ26
VCC66
AJ27
VCC67
AJ28
VCC68
AJ29
VCC69
AJ30
VCC70
AJ31
VCC71
AJ32
VCC72
AJ33
VCC73
AJ34
VCC74
AJ35
VCC75
G25
VCC76
H25
VCC77
J25
VCC78
K25
VCC79
L25
VCC80
M25
VCC81
N25
VCC82
P25
VCC83
R25
VCC84
T25
VCC85
U25
VCC86
U26
VCC87
V25
VCC88
V26
VCC89
W26
VCC90
W27
VCC91
Y25
VCC92
Y26
VCC93
Y27
VCC94
Y28
VCC95
Y29
VCC96
Y30
VCC97
Y31
VCC98
Y32
VCC99
Y33
VCC100
Y34
VCC101
Y35
VCC102
K26
VCC103
F25
VCC104
HSW_RPGA_EDS_PGA
POWER
CORE SUPPLY
4
+1.35VSUS 4.2A+VCCIN 95A
TP3
+VCC_CORE
C147
22U/6.3VS_6
C158
22U/6.3VS_6
C142
22U/6.3VS_6
C180
22U/6.3VS_6
C611
10U/6.3V_6
C592
10U/6.3V_6
C593
10U/6.3V_6
R4420_4
+1.35VSUS
C586
22U/6.3VS_6
C600
22U/6.3VS_6
C579
22U/6.3VS_6
C202
10U/6.3V_6
C215
10U/6.3V_6
C223
10U/6.3V_6
C150
10U/6.3V_6
R439*0_1206/S
R373*0.002/F_1206
R374*0_1206/S
Layout note: It is recommended to shield VIDSOUT signal by
routing it in between the VIDSCLK and VIDALERT# signals.
Place PU resistor
close to CPU
Place PU resistor close to CPU
The VIDALERT# signal must have a damping resistor to prevent
overshoot
PEG AND DDR
AB11
VDDQ1
AB2
VDDQ2
AB5
VDDQ3
AB8
VDDQ4
AE11
VDDQ5
AE2
VDDQ6
AE5
VDDQ7
AE8
VDDQ8
AH11
VDDQ9
K11
VDDQ10
N11
VDDQ11
N8
VDDQ12
T11
VDDQ13
T2
VDDQ14
T5
VDDQ15
T8
VDDQ16
W11
VDDQ17
W2
VDDQ18
W5
VDDQ19
W8
VDDQ20
K27
RSVD
L27
RSVD
T27
RSVD
V27
RSVD
N26
RSVD
AL27
RSVD
AK27
RSVD
E17
RSVD
W32
RSVD
AL16
RSVD
AL13
RSVD
J27
RSVD
AN35
VCCIO_OUT
VCCIO2PCH
VCOMP_OUT
VSS_AP35
VIDALERT#
VIDSCLK
VIDSOUT
PWR_DEBUG
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
VCC_SENSE
VSS_SENSE
+VCCIO_OUT_R
A23
+VCCIO_PCH_R
F22
+VCCIOA_OUT_R
AP35
AM28
H_CPU_SVIDALRT#
AM29
H_CPU_SVIDCLK
AL28
H_CPU_SVIDDAT
H27
PWR_DEBUG_R
AP34
VSS
AT34
VSS
AL22
VSS
AT33
VSS
AM21
VSS
AM25
VSS
AM22
VSS
AM20
VSS
AM24
VSS
AL19
VSS
AM23
VSS
AT32
VSS
AT35
AR35
AR32
AL26
R431 100_4
AL35
AK35
R429 100_4
Sense resistor should be placed within 2
inches (50.8 mm) of the processor socket
Trace Impendence 50 ohm
C170
22U/6.3VS_6
C577
22U/6.3VS_6
C582
22U/6.3VS_6
C604
22U/6.3VS_6
C587
10U/6.3V_6
C181
10U/6.3V_6
C167
10U/6.3V_6
VCC_SENSE [37]
VSS_SENSE [37]
SENSE LINES SVID
3
VDDQ Output Decoupling Recommendations
330uFx2 7343
22uFx11
10uFx10
+
C154
*330U/2V_7343
+VCCIO_OUT
+VCCIO_PCH
+VCCIOA_OUT
BOT socket side
5 onTOP, 6 on BOT inside socket cavity
0805
5 onTOP, 5 on BOT inside socket cavity0805
300mA
300mA
Add 0.1u for EMI request 0223 (PV)
H_CPU_SVIDCLK
+VCCIO_OUT
R143
H_CPU_SVIDDAT
+VCCIO_OUT
H_CPU_SVIDALRT#
130/F_4
C305 *0.1U/10V_4
R140 75/F_4
R141 43_4
+VCC_CORE
C2003
0.1U/10V_4
DG V0.7 -> 110 Ohm
SCH V0.7 -> 130 Ohm
DG V0.7 -> 44 Ohm
SCH V0.7 -> 43 Ohm
C2004
0.1U/10V_4
SVID CLK
VR_SVID_CLK [37]
SVID DATA
VR_SVID_DATA [37]
SVID ALERT
VR_SVID_ALERT# [37]
2
+3VPCU
R377
20K/F_4
R376
100K_6 NTC
Power Test Propose
+1.05V +VCCIO_OUT+1.05V
R74
150/F_4
PWR_DEBUG_R
R71
*10K_4
CPU VDDQ
PROJECT : TWK
PROJECT : TWK
PROJECT : TWK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
+VCCIOA_OUT [2]
+VCCIO_OUT [2,37]
+VCCIO_PCH [10]
+1.5V [6,7,8,10,25,26,29,30,35]
+1.05V [2,7,9,10,29,34,41]
+VCC_CORE [37,38]
+VCCST [2]
+1.35VSUS [2,12,13,35,40]
04
HW Thrm Protect
For 65 degree, 1.8v limit, (SW)
For 75 degree, 1.2v limit, (HW)
R115 *0_8
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
HAS 3/4 (POWER)
HAS 3/4 (POWER)
HAS 3/4 (POWER)
THRM_MOINTOR1 [31]
+VCCST+1.05V
C259
*10U/6.3V_6
R129 *0_8
R185 0_6
CRB 1.0 stuff
1
C310
*4.7U/6.3V_6
+VCCIO_PCH+1.05V
C367
*4.7U/6.3V_6
4 42Wednesday, April 23, 2014
4 42Wednesday, April 23, 2014
4 42Wednesday, April 23, 2014
C258
*10U/6.3V_6
1A
1A
1A
P
5
4
3
2
1
Haswell Processor (GND)
U16G
A10
VSS1
A13
VSS2
A16
VSS3
A19
VSS4
A22
VSS5
A25
VSS6
A27
D D
C C
B B
VSS7
A29
VSS8
A3
VSS9
A31
VSS10
A33
VSS11
A4
VSS12
A7
VSS13
AA11
VSS14
AA25
VSS15
AA27
VSS16
AA31
VSS17
AA29
VSS18
AB1
VSS19
AB10
VSS20
AA33
VSS21
AA35
VSS22
AB3
VSS23
AC25
VSS24
AC27
VSS25
AB4
VSS26
AB6
VSS27
AB7
VSS28
AB9
VSS29
AC11
VSS30
AD11
VSS31
AC29
VSS32
AC31
VSS33
AC33
VSS34
AC35
VSS35
AD7
VSS36
AE1
VSS37
AE10
VSS38
AE25
VSS39
AE29
VSS40
AE3
VSS41
AE27
VSS42
AE35
VSS43
AE4
VSS44
AE6
VSS45
AE7
VSS46
AE9
VSS47
AF11
VSS48
AF6
VSS49
AF8
VSS50
AG11
VSS51
AG25
VSS52
AE31
VSS53
AG31
VSS54
AE33
VSS55
AG6
VSS56
AH1
VSS57
AH10
VSS58
AH2
VSS59
AG27
VSS60
AG29
VSS61
AH3
VSS62
AG33
VSS63
AG35
VSS64
AH4
VSS65
AH5
VSS66
AH6
VSS67
AH7
VSS68
AH8
VSS69
AH9
VSS70
AJ11
VSS71
AJ5
VSS72
AK11
VSS73
AK25
VSS74
AK26
VSS75
AK28
VSS76
AK29
VSS77
AK30
VSS78
AK32
VSS79
E19
VSS80
HSW_RPGA_EDS_PGA
VSS
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
AK34
AK5
AL1
AL10
AL11
AL12
AL14
AL15
AL17
AL18
AL2
AL20
AL21
AL23
E22
AL3
W9
AL4
AL5
AL6
AL7
AL8
AL9
AM10
AM13
AM16
AM19
E25
AM32
AM4
AM7
AN10
AN13
AN16
AN19
AN2
AN21
AN24
AN27
AN30
AN34
AN4
AN7
AP1
AP10
AP13
AP16
AP19
AP4
AP7
W25
Y11
AR13
AR16
AR19
AR2
AR22
AR25
AR28
AR31
AR34
AR4
AR7
AT10
AT13
AT16
AT19
AT21
AT24
AT27
AT3
AT30
AT4
AT7
B10
B13
B16
B19
B2
B22
U16H
B34
VSS161
B4
VSS162
B7
VSS163
C1
VSS164
C10
VSS165
C13
VSS166
C16
VSS167
C19
VSS168
C2
VSS169
C22
VSS170
C24
VSS171
C26
VSS172
C28
VSS173
C30
VSS174
C32
VSS175
C34
VSS176
C4
VSS177
C7
VSS178
D10
VSS179
D13
VSS180
D16
VSS181
D19
VSS182
D22
VSS183
D25
VSS184
D27
VSS185
D29
VSS186
D31
VSS187
D33
VSS188
D35
VSS189
D4
VSS190
D7
VSS191
E1
VSS192
E10
VSS193
E13
VSS194
E16
VSS195
E4
VSS196
E7
VSS197
F10
VSS198
F11
VSS199
F12
VSS200
F14
VSS201
F15
VSS202
F17
VSS203
F18
VSS204
F20
VSS205
F21
VSS206
F23
VSS207
F24
VSS208
F26
VSS209
F28
VSS210
F30
VSS211
F32
VSS212
F34
VSS213
F4
VSS214
F6
VSS215
F7
VSS216
F8
VSS217
F9
VSS218
G1
VSS219
G11
VSS220
G2
VSS221
G27
VSS222
G29
VSS223
G3
VSS224
G31
VSS225
G33
VSS226
G35
VSS227
G4
VSS228
G5
VSS229
H10
VSS230
H26
VSS231
H6
VSS232
H7
VSS233
J11
VSS286
J26
VSS287
J30
VSS288
J32
VSS289
J34
VSS290
J6
VSS291
K1
VSS292
HSW_RPGA_EDS_PGA
VSS
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
VSS301
VSS302
VSS303
VSS304
VSS305
VSS306
VSS307
VSS308
VSS309
VSS310
VSS311
VSS312
VSS313
VSS314
VSS315
VSS316
RSVD
K10
K2
K29
K3
K31
K33
K35
K4
K5
K7
K8
K9
L11
L26
L6
M11
M26
M28
M30
M32
M34
M6
N1
N10
N2
N29
N3
N31
N33
N35
N4
N5
N6
N7
N9
P11
P26
P5
R11
R26
R28
R30
R32
R34
R5
T1
T10
T29
T3
T31
T33
T35
T4
T6
T7
T9
U11
U27
V11
V28
V30
V32
V34
W1
W10
W3
W35
W4
W6
W7
AR10
J28
H11
AL24
F19
T26
AK33
R419 49.9/F_4
Haswell Processor (RESERVED, CFG)
U16E
AT20
CFG0
TP64
TP67
TP65
CFG_RCOMP
R44649.9/F_4
TP17
TP22
TP9
TP4
R70 49.9/F_4
For CPU debug.
TP7
TP6
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
RSVD30
RSVD38
RSVD39
TESTLO
CFG[0]
AR20
CFG[1]
AP20
CFG[2]
AP22
CFG[3]
AT22
CFG[4]
AN22
CFG[5]
AT25
CFG[6]
AN23
CFG[7]
AR24
CFG[8]
AT23
CFG[9]
AN20
CFG[10]
AP24
CFG[11]
AP26
CFG[12]
AN25
CFG[13]
AN26
CFG[14]
AP25
CFG[15]
AR21
CFG[16]
AP21
CFG[17]
AR23
CFG[18]
AP23
CFG[19]
AT31
CFG_RCOMP
AT1
RSVD_TP
AT2
RSVD_TP
AD10
RSVD_TP
A34
RSVD_TP
A35
RSVD_TP
W29
RSVD_TP
W28
RSVD_TP
G26
TESTLO_G26
W33
RSVD
AL30
RSVD
AL29
RSVD
C35
RSVD_TP
B35
RSVD_TP
AL25
RSVD_TP
W30
RSVD_TP
W31
RSVD_TP
W34
TESTLO
HSW_RPGA_EDS_PGA
CFG
RESERVED
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
FC_G6
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
RSVD
C23
B23
D24
D23
G6
AR33
AM27
AM26
F5
AM2
K6
E18
U10
P10
B1
NC
A2
AR1
E21
E20
AP27
AR26
AL31
AL32
CFG[3] (PHYSICAL_DEBUG_ENABLED (DFX PRIVACY))
0 Enable; SET DFX ENABLED BIT IN DEBUG
1 , Disable;
CFG3
R458 *1K_4
TP60
TP58
TP59
TP57
R81
*2K_4
R80
*1K_4
05
EC_PWROK [6,31]
Processor Strapping
The CFG signals have a default value of '1' if not terminated on the board.
1 0
A A
CFG2
(PEG Static Lane Reversal)
CFG4
(DP Presence Strap)
CFG7
(PEG Defer Training)
5
Normal Operation Lane Reversed
Disable; No physical DP attached to eDP
PEG train immediately following
xxRESETB de assertion
4
Enable; An ext DP device is connected to eDP
PEG wait for BIOS training
CFG2
R456 *1K_4
CFG4
R457 1K_4
CFG7
R460 *1K_4
CFG5
R459 1K_4
CFG6
R466 *1K_4
3
CFG[6:5] (PCIE Port Bifurcation Straps)
11: (Default) x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
PROJECT : TWK
PROJECT : TWK
PROJECT : TWK
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
2
NB5
HAS 4/4 (GND)
HAS 4/4 (GND)
HAS 4/4 (GND)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
1A
1A
5 42Wednesday, April 23, 2014
5 42Wednesday, April 23, 2014
5 42Wednesday, April 23, 2014
1A
5
4
3
2
1
Lynx Point (DMI,FDI,PM)
U21C
TP34
AW22
DMI0RXN
AR20
DMI1RXN
AP17
DMI2RXN
AV20
DMI3RXN
AY22
DMI0RXP
AP20
DMI1RXP
AR17
DMI2RXP
AW20
DMI3RXP
BD21
DMI0TXN
BE20
DMI1TXN
BD17
DMI2TXN
BE18
DMI3TXN
BB21
DMI0TXP
BC20
DMI1TXP
BB17
DMI2TXP
BC18
DMI3TXP
BE16
DMI_IREF
AY17
DMI_IRCOMP
AW17
TP12
AV17
TP7
R6
SUSACK#
AM1
SYS_RESET#
AD7
SYS_PWROK
F10
PWROK
AB7
APWROK
H3
DRAMPWROK
J2
RSMRST#
J4
SUSWARN#/SUSPWRDNACK/GPIO30 (SUS)
(+3VS5)
K1
PWRBTN#
E6
ACPRESENT / GPIO31(DSW)
(DSW)
K7
BATLOW# / GPIO72 (SUS)
(+3VS5)
N4
RI#
AB10
TP21
LPT_PCH_M_EDS/BGA
DMI
FDI
SUS_STAT# / GPIO61 (SUS)
SUSCLK / GPIO62 (SUS)
SLP_S5# / GPIO63 ( SUS)
System Power Management
(+3VS5)
SLP_WLAN#/ GPIO29 ( DSW)
DMI_RXN0[2]
DMI_RXN1[2]
DMI_RXN2[2]
DMI_RXN3[2]
DMI_RXP0[2]
D D
+1.5V
5/16 for DS3
SUSWARN#
SUSACK#EC[31]
C C
B B
XDP_DBRST#[2]
SYS_PWROK[2]
IMVP_PWRGD[6,37]
EC_PWROK[5,31]
EC_PWROK_R
PM_DRAM_PWRGD[2]
RSMRST#[31]
5/16 for DS3
SUSWARN#EC[31]
DNBSWON#[31]
5/16 for DS3 5/16 for DS3
AC_PRESENT[31]
SYS_PWROK_R
DMI_RXP1[2]
DMI_RXP2[2]
DMI_RXP3[2]
DMI_TXN0[2]
DMI_TXN1[2]
DMI_TXN2[2]
DMI_TXN3[2]
DMI_TXP0[2]
DMI_TXP1[2]
DMI_TXP2[2]
DMI_TXP3[2]
R491 *0_4/S
R223 7.5K/F_4
R299*0_4
R2900_4
R252 0_4
R339 *0_4
R349 0_4
R324 *0_4/S
R546 *0_4/S
R544 *0_4/S
R337 *0_4/S
C437
*0.1U/10V_4
DMI_IREF
DMI_COMP
SUSACK#
XDP_DBRST#
SYS_PWROK_R
EC_PWROK_R
APWROK_R
PM_DRAM_PWRGD
RSMRST#
SUSWARN#
DNBSWON#_R
AC_PRESENT_R
PM_BATLOW#
PM_RI#
Reserve for power on sequence
PCH Pull-high/low(CLG)
SUS_STAT#
PM_RI#
SLP_LAN#
SUSACK#
SUSWARN#
PM_BATLOW#
PCIE_WAKE#
DNBSWON#_R
AC_PRESENT_R
A A
CLKRUN#
XDP_DBRST#
RSMRST#
R271 *10K_4
R541 10K_4
R572 *10K_4
R293 *10K_4
R543 *10K_4
R312 8.2K_4
R542 1K_4
R545 *10K_4
R347 10K_4
R338 *100K_4
R218 10K_4
R509 1K_4
R504 *1K_4
R325 100K_4
5
+3V_DEEP_SUS
+3VS5
+3V
for DS3
EDS V0.7 -> BATLOW# is in SUS well
SCH V0.7 -> BATLOW# pull up to DS3 power
DG V0.7 say that PWRBTN# is internal
pulled-up in PCH to 3.3 V DSW through
a weak pull-up resistor (24 kΩ nominal)
4
FDI_RXN0
FDI_RXN1
FDI_RXP0
FDI_RXP1
FDI_CSYNC
FDI_INT
FDI_IREF
FDI_RCOMP
TP16
TP15
TP10
TP17
TP13
DSWVRMEN
DPWROK
WAKE#
(+3V)
CLKRUN#
(+3VS5)
(+3VS5)
(+3VS5)
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
PMSYNCH
SLP_LAN#
TP5
AJ35
AL35
AJ36
AL36
AL39
AL40
AT45
R499 *0_4/S
AR44
R497 7.5K/F_4
AV43
AY45
AV45
AW44
AU42
AU44
C8
L13
DPWROK
K3
AN7
U7
Y6
Y7
C6
H1
F3
F1
AY3
G5
D2
DSWVREN
PCIE_WAKE#
CLKRUN#
SUS_STAT#
PCH_SUSCLK_L
TP37
R570 *0_4/S
R548 *0_4/S
TP45
R574 *0_4/S
SLP_LAN#
R317 0_4
R334 *0_4
FDI_TXN0 [2]
FDI_TXN1 [2]
FDI_TXP0 [2]
FDI_TXP1 [2]
FDI_CSYNC [2]
FDI_INT [2]
+1.5V
for DS3
DPWROK_EC [31]
RSMRST#
PCIE_WAKE# [24,27]
CLKRUN# [31]
PCH_SUSCLK_L [7]
SUSC# [31]
SUSB# [31]
SLP_SUS#EC [31]
PM_SYNC [2]
LVDS_BLON[23]
DISP_ON[23]
DPST_PWM[2,22,23]
2014/3/13
PCH_DDCCLK
PCH_DDCDATA
R68 *2.7K_4
R67 *2.7K_4
PD Res place close to PCH
PCH to Res routeing 37.5 ohm Impedance.
Res to connector filter routeing 50ohm Impedance.
R268 *150/F_4
R266 *150/F_4
R255 *150/F_4
R265 649/F_4
DG V0.7 -> 33 ohm
SCH V0.7 -> 0 ohm
2014/3/13
DAC_IREF (50ohm)
Trace length < 500 MILS
Trace spacing = 30 MILS
PCH Nut: QCI P/N: MBUL1001010 (Location:H13,H14)
R316 330K_4
+3V_RTC
On Die DSW VR Enable
High = Enable (Default)
Low = Disable
3
Lynx Point ( DDI)
+3V
PCH_DDCCLK
PCH_DDCDATA
DAC_IREF
DSWVREN
K36
G36
N36
T45
U44
V45
M43
M45
N42
N44
U40
U39
2
U21D
EDP_BKLTEN
EDP_VDD_EN
EDP_BKLTCTL
CRT_BLUE
CRT_GREEN
CRT_RED
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_VSYNC
DAC_IREF
CRT_IRTN
LPT_PCH_M_EDS/BGA
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
R40
R39
H45
H43
K40
DDPB_CTRLCLK
DDPB_CTRLDATA
LVDS
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
R35
R36
K43
K45
K38
N40
N38
J42
J44
H39
DDPC_CTRLDATA
DDPD_CTRLDATA
Digital Display Interface
DDPC_CTRLCLK
DDPD_CTRLCLK
CRT
+3V_DEEP_SUS [7,8,9,10,26]
+3V_RTC [7,10]
+1.5V [7,8,10,25,26,29,30,35]
+3VS5 [2,7,9,10,26,28,29,31,33,35,36,41]
+3V [2,7,8,9,10,12,13,14,17,18,21,22,23,24,25,26,27,29,30,31,36,37,39]
System PWR_OK(CLG)
IMVP_PWRGDSYS_PWROK
EC_PWROK
R348
10K_4
PROJECT : TWK
PROJECT : TWK
PROJECT : TWK
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
PCH 1/6 (DMI/FDI/VIDEO)
PCH 1/6 (DMI/FDI/VIDEO)
PCH 1/6 (DMI/FDI/VIDEO)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
NB5
NB5
NB5
R350 *0_4/S
Custom
Custom
Custom
06
SDVO_CLK [21]
SDVO_DATA [21]
HDMI_HPD_CON [21]
IMVP_PWRGD [6,37]
6 42Wednesday, April 23, 2014
6 42Wednesday, April 23, 2014
6 42Wednesday, April 23, 2014
INT. HDMI
1A
1A
1A
5
Lynx Point (HDA,JTAG,SATA)
CLKGEN_RTC_X1
TP53
TP77
R315 1M_4
D D
Reserve for EMI
C C
B B
+3V_RTC
TP49
C724
*10P/50V_4
+3V_DEEP_SUS
SIO_EXT_SCI#[31]
check
ACZ_BCLK ACZ_BCLK_R
for DS3
R561 22_4
EMI suggest 1/7
ACZ_SPKR[25]
ACZ_SDIN0[25]
TP46
R566 10K_4
SIO_EXT_SCI#
TP70
TP71
TP72
TP73
PCH_SPI_CLK[31]
PCH_SPI_CS1#[31]
PCH_SPI_SI[31]
PCH_SPI_SO[31]
PCH_SPI_IO2[31]
PCH_SPI_IO3[31]
PCH Strap Table
Pin Name Strap description Sampled Configuration
SPKR
GNT3# / GPIO55
INTVRMEN
HDA_DOCK_EN#/GPIO33
GNT1# / GPIO51
GPIO19
HDA_SYNC
HDA_SDO
GPIO8
A A
GPIO28
SPI_MOSI
SUSCLK / GPIO62
RTC_RST#
SRTC_RST#
SM_INTRUDER#
PCH_INVRMEN
ACZ_SYNC
ACZ_SPKR
ACZ_RST#
ACZ_SDOUT
GPIO33
TP54
PCH_JTAG_TCK_R
PCH_JTAG_TMS
PCH_JTAG_TDI_R
PCH_JTAG_TDO_R
R304 *0_4/S
TP36
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_CS1#
PCH_SPI_SI
PCH_SPI_SO
PCH_SPI_IO2
PCH_SPI_IO3
No reboot mode setting PWROK
Top-Block Swap Override
Integrated 1.05V VRM enable ALWAYS
Flash Descriptor Security
Only for Interposer
Boot BIOS Selection 1 [bit-1]
Boot BIOS Selection 0 [bit-0]
On-Die PLL VR Voltage Select RSMRST
RSVD Internel PURSMRST#
On-die PLL Voltage Regulator RSMRST#
iTPM function Disable APWROK 0 = Default (weak pull-down 20K)
On-die PLL Voltage Regulator PWROK
5
U21A
B5
RTCX1
B4
RTCX2
D9
RTCRST#
B9
SRTCRST#
A8
INTRUDER#
G10
INTVRMEN
B25
HDA_BCLK
A22
HDA_SYNC
AL10
SPKR
C24
HDA_RST#
L22
HDA_SDIN0
K22
HDA_SDIN1
G22
HDA_SDIN2
F22
HDA_SDIN3
A24
HDA_SDO
(+3V)
B17
HDA_DOCK_EN# / GPIO33
(+3VS5)
C22
HDA_DOCK_RST# / GPIO13
AB3
JTAG_TCK
AD1
JTAG_TMS
AE2
JTAG_TDI
AD3
JTAG_TDO
F8
TP25
C26
TP22
AB6
TP20
AJ11
SPI_CLK
AJ7
SPI_CS0#
AL7
SPI_CS1#
AJ10
SPI_CS2#
AH1
SPI_MOSI
AH3
SPI_MISO
AJ4
SPI_IO2
AJ2
SPI_IO3
LPT_PCH_M_EDS/BGA
PWROK
PWROK
PWROK
PWROK
PWROKFlash Descriptor Security
4
A20
LAD0
C20
LAD1
A18
LAD2
C18
LAD3
B21
LFRAME#
D21
LDRQ0#
RTCIHDA
LDRQ1# / GPIO23
SATA 6G LPC
SATA4RXN / PERN1
SATA4RXP / PERP1
SATA4TXN / PETN1
SATA4TXP / PETP1
SATA5RXN / PERN2
SATA5RXP / PERP2
SATA5TXN / PETN2
SATA5TXP / PETP2
SATA_RCOMP
SATA0GP / GPIO21
SATA1GP / GPIO19
SPI JTAG
0 = Default (weak pull-down 20K)
1 = Setting to No-Reboot mode
0 = "top-block swap" mode
1 = Default (Int PU)
0 = Disable
1 = Enable
0 = Override
1 = Default (weak pull-up 20K)
GNT0#GNT1#
0 = Support by 1.8V (weak pull-down)
1 = Support by 1.5V
0 = Security Effect (Int PD)
1 = Can be Overridden
0 = Disable
1 = Enable (Int PU)
(+3V)
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA_IREF
SATALED#
(+3V)
(+3V)
11
00
G20
AL11
BC8
BE8
AW8
AY8
BC10
BE10
AV10
AW10
BB9
BD9
AY13
AW13
BC12
BE12
AR13
AT13
BD13
BB13
AV15
AW15
BC14
BE14
AP15
AR15
AY5
SATA_RCOMP
Impedance = 50 ohm
Trace length < 500 mils
Trace spacing = 15 mils
DG V0.7 -> 750 ohm
SCH V0.7 -> 0 ohm
BD4
AP3
AT1
AU2
BA2
TP9
BB2
TP8
Boot Location
SPI
LPC
1 = Enable
0 = Disable
1 = Enable (Int PU)
4
3
LAD0 [26,31]
LAD1 [26,31]
LAD2 [26,31]
LAD3 [26,31]
PCH_DRQ#0
PCH_DRQ#1
SERIRQ
DG recommended that AC coupling capacitors should be
close to the connector (<100 mils) for optimal signal quality.
SATA_RCOMP
SATA_IREF
DGT_STOP#
BBS_BIT0
DGT_STOP#
LFRAME# [26,31]
TP74
TP50
R203 8.2K_4
R221 7.5K/F_4
R217 0_4
R206 10K_4
R264 0_4
R490 *10K_4
R267 10K_4
+3V
SERIRQ [31]
SATA_RXN0 [30]
SATA_RXP0 [30]
SATA_TXN0 [30]
SATA_TXP0 [30]
SATA_RXN4 [30]
SATA_RXP4 [30]
SATA_TXN4 [30]
SATA_TXP4 [30]
SATA_RXN5 [30]
SATA_RXP5 [30]
SATA_TXN5 [30]
SATA_TXP5 [30]
+1.5V
+1.5V
SATA_LED# [26]
+3V
DGPU_HOLD_RST# [9,14]
+3V
Install for Intel DG
+3V
Circuit
ACZ_SPKR
PCH_INVRMEN
[Need external pull-down for LPC BIOS]
Default weak pull-up on GNT0/1#
+VCC_HDA_IO
PCH_SPI_SI
R241 *1K_4
GPIO33_E[31]
PCH_SUSCLK_L[6]
R227 *1K_4
PCI_GNT3# [8]
R300 330K_4
R481 *1K_4
R565 *1K_4
R567 *1K_4
ACZ_SDOUT
R531 *1K_4
R536 *1K_4
R231 *1K_4
+3V
+3V_RTC
R562 *1K_4
3
C488 47P/50V_4
C489 *10P/50V_4
C491
23
15P/50V_4
C494
15P/50V_4
ODD (SATA1 1.5Gb/s)
HDD0 (SATA3 6.0Gb/s)
mSATA (SATA3 6.0Gb/s)
BIT_CLK_AUDIO
EMI
BBS_BIT0
BBS_BIT1 [8]
ACZ_SYNC
+VCC_HDA_IO
BT_OFF# [9,26]
PLL_ODVR_EN [9]
+3V
R280 *1K_4
R274 *1K_4
+3V
LAN_XTAL25_IN
PCH_XTAL25_IN
GEN_XTAL25_OUT
Y3
25MHZ +-10PPM
4 1
GEN_XTAL25_IN
C736
*33P/50V_4
ACZ_SYNC_AUDIO[25]
2
Green CLK Circuitry
CLKGEN_RTC_X1
LAN_XTAL25_IN[27]
PCH_XTAL25_IN[8]
+3VLANVCC
+1.05V
C493 0.1U/10V_4
C490 0.1U/10V_4
R313 33_4
R314 0_4
RTC Circuitry(RTC)
RTC Power trace width 20mils.
DV2...Change BT1 Pin-define
+3V_RTC_0
12
BT1
C499
0.1U/10V_4
HDA Bus(CLG)
ACZ_SDOUT_AUDIO[25]
BAT_CONN
BIT_CLK_AUDIO[25]
ACZ_RST#_AUDIO[25]
R585 0_6
R309 *10K_4
+5V
R331 *33_4
PCH SPI ROM(CLG)
2
PCH_SPI_CS0#R
PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_SO
C475
*22P/50V_4
PCH_SPI_IO2
PCH_SPI_IO3
PCH_SPI_CS0#
R272 0_4
+1.5V [6,8,10,25,26,29,30,35]
+1.05V [2,4,9,10,29,34,41]
+3V_RTC [6,10]
+3VPCU [4,26,28,30,31,32,33]
+3V [2,6,8,9,10,12,13,14,17,18,21,22,23,24,25,26,27,29,30,31,36,37,39]
+3V_DEEP_SUS [6,8,9,10,26]
+5V [21,25,26,29,30,36,39]
+3VLANVCC [27,36]
RTC Clock 32.768KHz
9
32Khz
6
25M_A25M_A
25M_A
5
25M_B
25M_B
12
27Mhz/NC
8
VDDIO_25M_A
VDDIO_25M_B3GND
11
VDDIO_27/NC
GEN_XTAL25_IN
GEN_XTAL25_OUT
R578 33_4
R584 33_4
R583 33_4
1
R332
*1M_4
TP39
16
1
ACZ_BCLK
ACZ_RST#
ACZ_SDOUT
2
3
Q18
*2N7002K
TP51
TP35
TP44
R288 0_4
R291 0_4
R282 0_4
C478
*22P/50V_4
Close to PCH
R237 0_4
R234 0_4
Vender
AMIC
Socket
NB5
NB5
NB5
XTAL_IN
XTAL_OUT
SLG3NB274
30mils
+3V_RTC
ACZ_SYNC
ACZ_SYNC
TP43
PCH_SPI_IO2_L
PCH_SPI_IO3_L
Size
2MB
2MB
Custom
Custom
Custom
1
+3VLANVCC
U12
+V3.3A
VBAT
VDD_RTC_OUT
GND
GND
GND
R344 20K/F_4
R345 20K/F_4
C503
1U/6.3V_4
VDD
+3VPCU
15
2
10
14
7
13
4
17
C495
1U/6.3V_4
C501
1U/6.3V_4
R342 *0_6
C496 0.1U/10V_4
R343 360_4
C500 22U/6.3VS_8
C498
2.2U/6.3V_6
07
+3V_RTC_0
+3V_RTC
RTC_RST#
12
J1
*SOLDERJUMPER-2
SRTC_RST#
12
J2
*SOLDERJUMPER-2
SRTC_RST#RTC_RST#
PCH JTAG Debug(CLG)
+3VS5
R520
R522
*210/F_4
R523
*100/F_4
U10
1
CE#
6
SPI_CLK_R
SPI_SI_R
SPI_SO_R
SCK
5
SI
2
SO
3
WP#
A25LQ16M-F/Q
R287 1K_4
R283 1K_4
P/N
AKE38ZN0803 (AMIC A25QE16M-F/Q (QE))
AKE38FP0N03 (Winbond W25Q16DVSSIQ)Winbond
DFHS08FS023
PROJECT : TWK
PROJECT : TWK
PROJECT : TWK
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
PCH 2/6 (SATA/HDA/SPI)
PCH 2/6 (SATA/HDA/SPI)
PCH 2/6 (SATA/HDA/SPI)
Date: Sheet of
Date: Sheet of
Date: Sheet of
*210/F_4
R519
*100/F_4
VDD
HOLD#
VSS
1
R524
*210/F_4
PCH_JTAG_TMS
PCH_JTAG_TDI_R
PCH_JTAG_TDO_R
R525
*100/F_4
+3V
8
7
4
+3V
PCH_JTAG_TCK_R
R529
*51_4
C466
0.1U/10V_4
TP41
7 42Wednesday, April 23, 2014
7 42Wednesday, April 23, 2014
7 42Wednesday, April 23, 2014
1A
1A
1A
5
PCI/USBOC# Pull-up(CLG)
PCI_PIRQA#
R319 8.2K_4
PCI_PIRQB#
R330 8.2K_4
PCI_PIRQC#
R328 8.2K_4
PCI_PIRQD#
R321 8.2K_4
+3V
RP7
10
9
for DS3
8
7 4
10K_10P8R_6
+3V_DEEP_SUS
RP4
10
9
8
7 4
10K_10P8R_6
USB30_RX1-[28]
USB30_RX2-[28]
USB30_RX1+[28]
USB30_RX2+[28]
USB30_TX1-[28]
USB30_TX2-[28]
USB30_TX1+[28]
USB30_TX2+[28]
ACCEL_INTH#
D D
LCD_BK
MPC_PWR_CTRL#
USB_OC4#
USB_OC1#
USB_OC3#
USB3.0
C C
12/3 add
BBS_BIT1[7]
PCI_GNT3#[7]
BOARD_ID3[9]
B B
PLTRST#[2,14,24,26,27,31]
+3V
1
ACC_LED#
2
3
BT_COMBO_EN#
56
4/30: CRB 1.0 =>rename PCH_TP26
1
USB_OC6#
2
USB_OC0#
3
RF_PWR_OFF#
USB_OC5#USB_OC2#
56
GPIO52[30]
GPIO54[30]
TP78
TP79
TP32
check
MPC Switch Control
MPC_PWR_CTRL#
MPC_PWR_CTRL#
Low = MPC ON
High = MPC OFF (Default)
R336 *1K_4
SMBus/Pull-up(CLG)
A A
5
Lynx Point (PCI,USB,NVRAM)
U21E
BA45
TP1
BC45
TP2
BE44
TP3
BE43
TP4
AY43
PCH_TP26
R2228.2K_4
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
BT_COMBO_EN#
BBS_BIT1
ACC_LED#
PCI_GNT3#
MPC_PWR_CTRL#
LCD_BK
ACCEL_INTH#
PCI_PME#
PLTRST#
GPIO52
GPIO54
MBCLK2[13,17,22,31]
MBDATA2[13,17,22,31]
SMB_PCH_DAT
SMB_PCH_CLK
+3V
R273
100K_4
AR26
AW26
AW29
AR29
AP26
AV26
AV29
AP29
BE24
BD25
BE26
BD27
BD23
BC24
BC26
BE28
AD10
TD_IREF
USB3RXN1
USB3RXN2
USB3RXN5
USB3RXN6
USB3RXP1
USB3RXP2
USB3RXP5
USB3RXP6
USB3TXN1
USB3TXN2
USB3TXN5
USB3TXN6
USB3TXP1
USB3TXP2
USB3TXP5
USB3TXP6
H20
PIRQA#
L20
PIRQB#
K17
PIRQC#
M20
PIRQD#
A12
GPIO50
B13
GPIO52
C12
GPIO54
C10
GPIO51
A10
GPIO53
AL6
GPIO55
G17
PIRQE# / GPIO2
F17
PIRQF# / GPIO3
L15
PIRQG# / GPIO4
M15
PIRQH# / GPIO5
PME#
Y11
PLTRST#
LPT_PCH_M_EDS/BGA
Q34
4 3
1
2N7002KDW
5
2
6
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
2N7002KDW
Thermal
(+3V)
(+3V)
(+3V)
(+3V)
5
+3V_DEEP_SUS
2
6
Q19
PCI
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
SMB_ME1_CLK
R555 2.2K_4
R556 2.2K_4
SMB_ME1_DAT
43
1
C- Link
CL_CLK1
CL_DATA1
CL_RST1#
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USB
USBRBIAS#
USBRBIAS
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
+3V
SMB_RUN_DAT [12,13,22]
R340 4.7K_4
R341 4.7K_4
SMB_RUN_CLK [12,13,22]
4
Cardreader
AF11
CL_CLK_R
AF10
CL_DAT_R
AF7
CL_RST#_R
B37
USBP0N
D37
USBP0P
A38
USBP1N
C38
USBP1P
A36
USBP2N
C36
USBP2P
A34
USBP3N
C34
USBP3P
B33
USBP4N
D33
USBP4P
F31
USBP5N
G31
USBP5P
K31
USBP6N
L31
USBP6P
G29
USBP7N
H29
USBP7P
A32
USBP8N
C32
USBP8P
A30
USBP9N
C30
USBP9P
B29
D29
A28
C28
G26
F26
F24
G24
11/30 reserve for TV card
K24
USB_BIAS
K26
M33
TP24
L33
TP23
P3
USB_OC0#
V1
USB_OC1#
U2
USB_OC2#
P1
USB_OC3#
M3
USB_OC4#
T1
USB_OC5#
N2
USB_OC6#
M1
RF_PWR_OFF#
7/4: GPIO14 change netname
to RF_PWR_OFF# for CB
+3V
4
PCIE_RXN2_LAN[27]
LAN
TP33
TP29
TP31
USBP0- [28]
USBP0+ [28]
USBP1- [28]
USBP1+ [28]
USBP2- [25]
USBP2+ [25]
USBP3- [23]
USBP3+ [23]
USBP9- [25]
USBP9+ [25]
USBP10- [26]
USBP10+ [26]
USBP12- [30]
USBP12+ [30]
R294
22.6/F_4
PCIE_RXP2_LAN[27]
PCIE_TXN2_LAN[27]
PCIE_TXP2_LAN[27]
PCIE_RXN3_CARD[24]
PCIE_RXP3_CARD[24]
PCIE_TXN3_CARD[24]
PCIE_TXP3_CARD[24]
WLAN
11/13 modify
USB3.0 up
USB3.0 down
Right_USB_up
Camera
TV card
PCIE_RXN4[26]
PCIE_RXP4[26]
PCIE_TXN4[26]
PCIE_TXP4[26]
+1.5V
Right_USB_down
WLAN
CLK_REQ/Strap Pin(CLG)
CLK_PCIE_REQ1#
PCIE_CLKREQ_CR#
CLK_PCIE_REQ0#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
CLK_PEGB_REQ#
CLK_PEGA_REQ#
CLK_PEGA_REQ#
CLK_BUF_BCLK_N
CLK_BUF_BCLK_P
CLK_BUF_PCIE_3GPLL#
CLK_BUF_PCIE_3GPLL
CLK_BUF_DREFCLK#
CLK_BUF_DREFCLK
CLK_BUF_DREFSSCLK#
CLK_BUF_DREFSSCLK
CLK_PCH_14M
CLOCK TERMINATION for FCIM
R229 10K_4
R230 10K_4
R243 10K_4
R540 10K_4
R539 10K_4
R279 10K_4
R240 10K_4
Ra
R235 *10K_4
Rb
SG : Rb ; UMA/ OPT : Ra
R211 10K_4
R210 10K_4
R215 10K_4
R207 10K_4
R295 10K_4
R297 10K_4
R493 10K_4
R492 10K_4
R289 10K_4
C667 0.1U/10V_4
C666 0.1U/10V_4
C665 0.1U/10V_4
C664 0.1U/10V_4
C670 0.1U/10V_4
C668 0.1U/10V_4
CLK_PCIE_CRN[24]
CLK_PCIE_CRP[24]
PCIE_CLKREQ_CR#[24]
+3V_DEEP_SUS
3
Lynx Point (PCI-E,SMBUS,CLK)
PCIE_TXN2_LAN_C
PCIE_TXP2_LAN_C
PCIE_TXN3_CARD_C
PCIE_TXP3_CARD_C
PCIE_TXN4_C
PCIE_TXP4_C
BOARD_ID0[9]
BOARD_ID1[9]
BOARD_ID2[9]
CLK_PCH_PEGAN
CLK_PCH_PEGAP
CLK_PEGA_REQ#_R
for DS3
PCIE Clock
3
PCIE_IREF
PCIE_RCOMP
CLK_PCH_SRC0N
CLK_PCH_SRC0P
CLK_PCIE_REQ0#
CLK_PCH_SRC2N
CLK_PCH_SRC2P
CLK_PCIE_REQ1#
CLK_PCH_CARD2N
CLK_PCH_CARD2P
PCIE_CLKREQ_CR#
CLK_PCH_SRC3N
CLK_PCH_SRC3P
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
WLAN
LAN
GPU
Remove for UMA only.
R483 *0_4/S
R484 7.5K/F_4
TP100
TP101
TP102
+3V
U21B
AW31
PERN1 / USB3RN3
AY31
PERP1 / USB3RP3
BE32
PETN1 / USB3TN3
BC32
PETP1 / USB3TP3
AT31
PERN2/ USB3RN4
AR31
PERP2/ USB3RP4
BD33
PETN2/ USB3TN4
BB33
PETP2/ USB3TP4
AW33
PERN3
AY33
PERP3
BE34
PETN3
BC34
PETP3
AT33
PERN4
AR33
PERP4
BE36
PETN4
BC36
PETP4
AW36
PERN5
AV36
PERP5
BD37
PETN5
BB37
PETP5
AY38
PERN6
AW38
PERP6
BC38
PETN6
BE38
PETP6
AT40
PERN7
AT39
PERP7
BE40
PETN7
BC40
PETP7
AN38
PERN8
AN39
PERP8
BD42
PETN8
BD41
PETP8
BE30
PCIE_IREF
BD29
PCIE_RCOMP
BC30
TP11
BB29
TP6
Y43
CLKOUT_PCIE0N
Y45
CLKOUT_PCIE0P
AB1
PCIECLKRQ0# / GPIO73
AA44
CLKOUT_PCIE1N
AA42
CLKOUT_PCIE1P
AF1
PCIECLKRQ1# / GPIO18
AB43
CLKOUT_PCIE2N
AB45
CLKOUT_PCIE2P
AF3
PCIECLKRQ2# / GPIO20/ SMI#
AD43
CLKOUT_PCIE3N
AD45
CLKOUT_PCIE3P
T3
PCIECLKRQ3# / GPIO25
AF43
CLKOUT_PCIE4N
AF45
CLKOUT_PCIE4P
V3
PCIECLKRQ4# / GPIO26
AE44
CLKOUT_PCIE5N
AE42
CLKOUT_PCIE5P
AA2
PCIECLKRQ5# / GPIO44
AB40
CLKOUT_PCIE6N
AB39
CLKOUT_PCIE6P
AE4
PCIECLKRQ6# / GPIO45
AJ44
CLKOUT_PCIE7N
AJ42
CLKOUT_PCIE7P
Y3
PCIECLKRQ7# / GPIO46
AB35
CLKOUT_PEG_A_N
AB36
CLKOUT_PEG_A_P
AF6
PEG_A_CLKRQ# / GPIO47
AD39
TP19
AD38
TP18
LPT_PCH_M_EDS/BGA
Change wlan PCIE from SRC0N,SRC0P,REQ0 to SRC3N,SRC3P,REQ3 4/10
CLK_PCIE_WLANN[26]
CLK_PCIE_WLANP[26]
PCIE_CLKREQ_W LAN#[26]
CLK_PCIE_LANP[27]
CLK_PCIE_LANN[27]
PCIE_CLKREQ_LAN#[27]
CLK_PCIE_VGA#[14]
CLK_PCIE_VGA[14]
CLK_PEGA_REQ#[14]
RP3
0_4P2R_4
SML1ALERT# / PCHHOT# / GPIO74
SMBUS
PCI-E*
(+3VS5)
(+3V)
(+3V)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
R3003 0_4
R3004 0_4
R250 *0_4/S
R236 *0_4/S
2
4
R249 *0_4/S
2
SMBALERT# / GPIO11
SML0ALERT# / GPIO60
SML1CLK / GPIO58
SML1DATA / GPIO75
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
PEG_B_CLKRQ# / GPIO56
(+3VS5)
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
CLKOUT_DPNS_N
CLKOUT_DPNS_P
CLKIN_PCILOOPBACK
CLOCKS
DIFFCLK_BIASREF
CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67
FLEX CLOCKS
CLK_PCH_SRC3N
CLK_PCH_SRC2P
CLK_PCH_SRC2N
CLK_PCIE_REQ1#
1
CLK_PCH_PEGAN
3
CLK_PCH_PEGAP
CLK_PEGA_REQ#_R
2
(+3VS5)
SMBCLK
SMBDATA
(+3VS5)
SML0CLK
SML0DATA
(+3VS5)
(+3VS5)
(+3VS5)
CLKOUT_DP_N
CLKOUT_DP_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N
CLKIN_SATA_P
REFCLK14IN
XTAL25_IN
XTAL25_OUT
ICLK_IREF
CLKOUT_33MHZ0
CLKOUT_33MHZ1
CLKOUT_33MHZ2
CLKOUT_33MHZ3
CLKOUT_33MHZ4
(+3V)
(+3V)
(+3V)
(+3V)
CLK_PCH_SRC3P
CLK_PCIE_REQ3#
N7
SMBALERT#
R10
SMB_PCH_CLK
U11
SMB_PCH_DAT
N8
DRAMRST_CNTRL_PCH
U8
SMB_ME0_CLK
R7
SMB_ME0_DAT
H6
SML1ALERT#_R
K6
SMB_ME1_CLK
N11
SMB_ME1_DAT
Y39
Y38
U4
CLK_PEGB_REQ#
AH43
CLK_PCH_ITPN
AH45
CLK_PCH_ITPP
AF35
AF36
AJ40
AJ39
AF39
AF40
AY24
CLK_BUF_PCIE_3GPLL#
AW24
CLK_BUF_PCIE_3GPLL
AR24
CLK_BUF_BCLK_N
AT24
CLK_BUF_BCLK_P
H33
CLK_BUF_DREFCLK#
G33
CLK_BUF_DREFCLK
BE6
CLK_BUF_DREFSSCLK#
BC6
CLK_BUF_DREFSSCLK
F45
CLK_PCH_14M
D17
CLK_PCI_FB
AM43
XTAL25_IN
AL44
AM45
ICLK_IREF
AN44
ICLK_BIAS
D44
E44
CLK_PCI_CARD_R
B42
CLK_PCH_PCI2
F41
CLK_PCH_PCI3
A40
CLK_PCH_PCI4
C40
CLK_FLEX0
F38
CLK_FLEX1
F36
CLK_FLEX2
F39
CLK_FLEX3
1
11/13 del
TP76
TP40
TP42
TP38
TP68
TP69
CLK_DPLL_NSCCLKN [2]
CLK_DPLL_NSCCLKP [2]
CLK_DPLL_SSCLKN [2]
CLK_DPLL_SSCLKP [2]
CLK_CPU_BCLKN [2]
CLK_CPU_BCLKP [2]
R510 0_4
TP75
TP56
TP52
TP55
TP47
+VCCAXCK_VRM [10]
+1.05V [2,4,7,9,10,29,34,41]
+1.5V [6,7,10,25,26,29,30,35]
+3VS5 [2,6,7,9,10,26,28,29,31,33,35,36,41]
+3V [2,6,7,9,10,12,13,14,17,18,21,22,23,24,25,26,27,29,30,31,36,37,39]
+3V_DEEP_SUS [6,7,9,10,26]
for DS3
+3V_DEEP_SUS
R303 1K_4
R296 10K_4
R322 2.2K_4
R323 2.2K_4
R270 2.2K_4
R278 2.2K_4
R573 10K_4
PROJECT : TWK
PROJECT : TWK
PROJECT : TWK
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
CLK_PCH_14M
C480
*22P/50V_4
CLK_33M_DEBUG
CLK_33M_DEBUG
CLK_33M_KBC
C469
*18P/50V_4
10/23 EMI Jerry Change C534 C535
from 22P(CH02206JB08) to 18P(CH01806JB07)
PCH_XTAL25_IN [7]
R505 *0_4/S
R500 *7.5K/F_4
R502 7.5K/F_4
R54722_4
R28622_4
R55122_4
CLK_PCI_FB_R
CLK_PCI_LPC_R
CLK_PCI_EC_R
SMBus/Pull-up(CLG)
DRAMRST_CNTRL_PCH
SMBALERT#
SMB_PCH_CLK
SMB_PCH_DAT
SMB_ME0_CLK
SMB_ME0_DAT
SML1ALERT#_R
PCH 3/6 (PCIE/USB/CLK)
PCH 3/6 (PCIE/USB/CLK)
PCH 3/6 (PCIE/USB/CLK)
1
RF
C717
*18P/50V_4
+1.5V
+VCCAXCK_VRM
CLK_PCI_FB
CLK_33M_DEBUG [26]
CLK_33M_KBC [31]
8 42W ednesday, April 23, 2014
8 42W ednesday, April 23, 2014
8 42W ednesday, April 23, 2014
08
1A
1A
1A
5
Lynx Point (GPIO,VSS_NCTF,RSVD)
Lynx Point (GPIO,VSS_NCTF,RSVD)
Lynx Point (GPIO,VSS_NCTF,RSVD)Lynx Point (GPIO,VSS_NCTF,RSVD)
U21F
S_GPIO
R192 100_4
SIO_EXT_SMI#[31]
D D
BT_OFF#[7,26]
RF_OFF#[26]
Reserve
DGPU_PWROK[14,18,31,40]
PLL_ODVR_EN[7]
+3V
DGPU_HOLD_RST#
R224 10K_4
R515
*510/F_4
DGPU_HOLD_RST#[7,14]
DGPU_PWR_EN[39,41]
C C
R253 *0_4
R533 *0_4/S
R508 *0_4/S
9/28 Reserve
S_GPIO_R GPIO68
SIO_EXT_SMI#
BOARD_ID4
BOARD_ID5
BT_OFF#
LAN_DISABLE#_R
RF_OFF#
ODD_PRSNT#_R
DGPU_PWROK
BIOS_REC
DGPU_HOLD_RST#_R
GPIO27
PLL_ODVR_EN_R
GPIO34
GPIO35
DGPU_PWR_EN_R
FDI_OVRVLTG
MFG_MODE
DGPU_PRSNT#
TEST_SET_UP
GPIO49
SV_DET
AT8
BMBUSY# / GPIO0
(+3V)
F13
TACH1 / GPIO1
(+3V)
A14
TACH2 / GPIO6
(+3V)
G15
TACH3 / GPIO7
(+3V)
Y1
GPIO8
(+3VS5)
K13
LAN_PHY_PWR_CTRL / GPIO12
(+3VS5)
AB11
GPIO15
(+3VS5)
AN2
SATA4GP / GPIO16
(+3V)
C14
TACH0 / GPIO17
(+3V)
BB4
SCLOCK / GPIO22
(+3V)
Y10
GPIO24
(+3VS5)
R11
GPIO27
(DSW)
AD11
GPIO28
(+3VS5)
AN6
GPIO34
(+3V)
AP1
GPIO35 / NMI#
(+3V)
AT3
SATA2GP / GPIO36
(+3V)
AK1
SATA3GP / GPIO37
(+3V)
AT7
SLOAD / GPIO38
(+3V)
AM3
SDATAOUT0 / GPIO39
(+3V)
AN4
SDATAOUT1 / GPIO48
(+3V)
AK3
SATA5GP / GPIO49
(+3V)
U12
GPIO57
(+3V)
BE41
VSS_NCTF_1
BE5
VSS_NCTF_2
C45
VSS_NCTF_3
A5
VSS_NCTF_4
HSW BOARD ID SETTING
BOARD_ID0
B B
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
GPIO71
GPIO35
GPIO49
GPIO68
GPIO69
GPIO44
GPIO45
GPIO46 MODEL BIT2
GPIO4 MODEL BIT3
GPIO6
GPIO7
GPIO71
GPIO35
GPIO49
GPIO68
GPIO69
DGPU_PRSNT GPIO39
DGPU_OPT_DIS# GPIO70
BOARD_ID[4:0] Model Name
A A
00000
00001
QLGS
TWS
00010 TWJ
00011 TWK
GPIO68
Hi Lo
LVDS interface eDP interface
5
MODEL BIT0
MODEL BIT1BOARD_ID1
MODEL BIT4
No Dolby=0, Dolby=1
Reserve
Reserve
Reserve
Reserve
Reserve
Optimus=1, UMA=0
Optimus=0, Dis only=1
BOARD_ID0[8]
BOARD_ID1[8]
BOARD_ID2[8]
BOARD_ID3[8]
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
LPT_PCH_M_EDS/BGA
4
LAN_DISABLE#_R
4
TACH4 / GPIO68
TACH5 / GPIO69
TACH6 / GPIO70
TACH7 / GPIO71
GPIO
PLTRST_PROC#
CPU/MISC
NCTF
R311 *10K_4
R501 *10K_4
R516 *10K_4
R592 *10K_4
R564 *10K_4
RD0
R528 *10K_4
RD1
R239 *10K_4
RD2
R538 10K_4
RD3
R329 10K_4
RD4
R587 10K_4
RD5
R327 10K_4
(+3V)
(+3V)
(+3V)
(+3V)
TP14
PECI
RCIN#
PROCPWRGD
THRMTRIP#
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NTCF_25
VSS_NCTF_8
VSS_NCTF_12
VSS_NCTF_15
R302 *10K_4
GPIO27
GPIO35
GPIO49
GPIO68
GPIO69
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
C16
D13
GPIO69
G13
DGPU_OPT_DIS#
H15
GPIO71
AN10
AY1
AT6
EC_RCIN#
AV3
AV1
PCH_THRMTRIP#
AU4
A2
A41
A43
B1
B2
B44
BA1
BC1
BD2
BD44
BD45
BE2
BE3
D1
E1
E45
A4
N10
A44
B45
BD1
R310 10K_4
R506 10K_4
R517 10K_4
R582 10K_4
R580 10K_4
RU0
R532 10K_4
RU1
R244 10K_4
RU2
R537 *10K_4
RU3
R320 *10K_4
RU4
R586 *10K_4
RU5
R318 *10K_4
R495 *0_4
R496 390_4
R489 *0_4/S
+3VS5
+3V
3
for DS3
for DS3
+3V_DEEP_SUS
+3V
3
2
EC_A20GATE [31]
EC_PECI [2,31]
EC_RCIN# [31]
H_PWRGOOD [2]
PM_THRMTRIP#R [2,31]
CPU_PLTRST#R [2,31]
MFG-TEST
MFG_MODE
Swap GPIO
S_GPIO
R212 10K_4
R220 *0_4
0 = SGPIO
1 = Default
R187 1K_4
R189 *0_4
+3V
+3V
for DS3
RF_OFF#
R535 1K_4
Intel ME Crypto Transport Layer
Security (TLS) cipher suite
Low = Disable (Default)
High = Enable
BIOS_RESP SV Detect
R507 *0_4
TEST_SET_UP
R513 10K_4
+3V_DEEP_SUS
+3V
SV_SET_UP
High = Strong (Default)
DGPU_OPT_DIS# GPIO70 Optimus=0, Dis only=1
10K_4
GFX Present
R511 *100K_4
R549
DGPU_OPT_DIS#
DGPU_PRSNT#
Stuff
NC
SG
Ra
Rb
R571 *10K_4
Optimus=1, UMA=0GPIO39
RaRb
R512 10K_4
UMA
Rb
Ra
+3V
+3V
2
1
+3V_DEEP_SUS [6,7,8,10,26]
+3VS5 [2,6,7,10,26,28,29,31,33,35,36,41]
+3V [2,6,7,8,10,12,13,14,17,18,21,22,23,24,25,26,27,29,30,31,36,37,39]
+5VS5 [25,28,29,33,34,35,36,37,38,39,40]
PCH MISC PU /PD
EC_A20GATE
EC_RCIN#
PCH_THRMTRIP#
GPIO Pull-up/Pull-down(CLG)
DGPU_HOLD_RST#_R
BT_OFF#
SIO_EXT_SMI#
GPIO71
ODD_PRSNT#_R
R251 10K_4
R534 10K_4
R335 10K_4
R326 10K_4
R503 10K_4
DGPU_PWROK UMA=0
+3V
R563 *10K_4
R494 *0_4
BIOS RECOVERY High = Disable (Default)
R275 *100K_4
SATA3GP/GPIO37
0 = TLS no confidentiality (Int PD)
1 = TLS with confidentiality
GPIO36
DGPU_PWR_EN_R
NB5
NB5
NB5
DGPU_PWROK
BIOS_REC
Low = Enable
0 = SV Detect
1 = Default
SV_DET
R281 10K_4
TLS Confidentiality
FDI_OVRVLTG
Internal PD
R514 *1K_4
PROJECT : TWK
PROJECT : TWK
PROJECT : TWK
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
PCH 4/6 (GPIO/MISC)
PCH 4/6 (GPIO/MISC)
PCH 4/6 (GPIO/MISC)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
R201 10K_4
R213 10K_4
R488 *1K_4
for DS3
+3V_DEEP_SUS
+3V
R579 *10K_4
R486 10K_4
R518 *1K_4
+3V
9 42Wednesday, April 23, 2014
9 42Wednesday, April 23, 2014
9 42Wednesday, April 23, 2014
+3V
+1.05V
+3V
+3V_DEEP_SUS
for DS3
+3V
09
1A
1A
1A
5
Lynx Point (POWER)
POWER
C416
1U/6.3V_4
C417
1U/6.3V_4
AF34
AP45
AD34
AA30
AA32
AD35
AG30
AG32
AD36
AE30
AE32
AW40
AK30
AK32
AJ12
AJ14
M29
L29
L26
M26
U32
V32
Y32
U21J
VCCVRM[5]
VCC[3]
VCCCLK3_3[1]
VCCCLK3_3[2]
VCCCLK3_3[3]
VCCCLK3_3[4]
VCCCLK3_3[5]
VCCCLK3_3[6]
VCCCLK[1]
VCCCLK[2]
VCCCLK[3]
VCCCLK[4]
VCCCLK[5]
VCCCLK[6]
VCCCLK[7]
VCCCLK[8]
VCCCLK[9]
VCCCLK[10]
VCCVRM[6]
VCC3_3[7]
VCC3_3[8]
V_PROC_IO[1]
V_PROC_IO[2]
0.15A (20mils)
+VCCAXCK_VRM
R498 *0_8/S
+1.5V
C686
10U/6.3V_6
+VCC_AXCK_DCB +V1.05S_VCC_AXCK_DCB
R232 *0_8/S
+1.05V
D D
L20 0_6
1.09A (40mils)
C427
*10U/6.3V_6
50mA (10mils)
+3V
+3V
+3V
+3V
+1.05V
+1.05V
C C
+1.05V
+1.05V
+1.05V
C4631U/6.3V_4
C4721U/6.3V_4
C4791U/6.3V_4
C4741U/6.3V_4
0.3A (20mils)
C4101U/6.3V_4
C4421U/6.3V_4
C4411U/6.3V_4
C4581U/6.3V_4
+1.05V
+1.05V
0.15A (20mils)
+1.5V
+3V
+VCCIO_PCH
B B
C4260.1U/10V_4
C375 0.1U/10V_4
C422 0.1U/10V_4
C373 1U/6.3V_4
0.13A (20mils)
4mA (10mils)
for DS3
+3V_DEEP_SUS
+3V_RTC
0.261A (40mils)
C4711U/6.3V_4
C4850.1U/10V_4
C4840.1U/10V_4
C4861U/6.3V_4
+VCCRTCEXT
C4670.1U/10V_4
K8
VCCSUS3_3[9]
A6
VCCRTC
P14
DCPRTC[1]
P16
DCPRTC[2]
LPT_PCH_M_EDS/BGA
PCH VCCIO Power
+V1.05S_VCC_EXP+1.05V
A A
3.629A (160mils)
C404
C444
10U/6.3V_6 R346
1U/6.3V_4
5
C431
1U/6.3V_4
C423
1U/6.3V_4
Clock and Miscellaneous
THERMAL
CPURTC
Near Pin
AN34,AN35
C414
1U/6.3V_4
GPIO/LPCFUSE
SATA USB
HDA
4
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
VCCUSBPLL
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCDSW3_3
VCCASW[12]
VCCASW[13]
VCCVRM[7]
VCCSUSHDA
4
0.26A (40mils)
R24
R26
R28
U26
U35
L24
VCC3_3[3]
U30
VCCIO[11]
V28
VCCIO[12]
V30
VCCIO[13]
Y30
VCCIO[14]
DCPSUS2
VCC3_3[4]
VCC3_3[5]
VCC3_3[6]
VCCIO[15]
DCPSST
VCC[1]
VCC[2]
VCCIO[16]
VSS
3.629A (160mils)
M24
Y35
+V1.05M_VCCDUSBSUS
28mA (10mils)
0.26A (40mils)
R20
R22
15mA (10mils)
A16
AE14
AF12
AG14
U36
AA14
+VCCSST
P18
P20
L17
PCH_VCC_1_1_20
R18
PCH_VCC_1_1_21
PCH VRM Power
AN11
AK22
10mA (10mils)
A26
+V1.05S_VCC_EXP
3.629A (160mils)
Add sch for DS3 PWR (PV) 02/19
Modify DS3 (PQ) 4/10
SLP_SUS_ON[31]
C4700.1U/10V_4
C4760.1U/10V_4
C4591U/6.3V_4
+3V_DEEP_SUS
C482 0.1U/10V_4
C4400.01U/25V_4
C4731U/6.3V_4
R277 *0_6/S
R276 *0_6/S
C4810.1U/10V_4
R2000 0_4
C3000
*.1U/10V_4
C4380.1U/10V_4
+3V_DEEP_SUS
for DS3
Q2000A
5
C4650.1U/10V_4
C464*1U/6.3V_4
+3V
+1.05V
+1.05V
C387*10U/6.3V_6
R3001 0_4
34
2N7002KDW
+3V_DEEP_SUS
for DS3
+1.05V
+3V
+1.05V
+3VS5
+3V
+1.05V
PCH VRM Power
PCH VRM Power
+1.5V
+3VS5 +3VS5
R2001
100K/F_4
3
+1.5V
+1.5V
1U/6.3V_4
C2001
*1U/6.3V_4
3
+1.05V
+1.05V
+3V_DEEP_SUS
C2000
*100K/F_4
R3002 0_4
C4471U/6.3V_4
3.629A (160mils)
+3V_DEEP_SUS
+V1.05S_VCC_EXP
for DS3
C492
0.1U/10V_4
R3000
R256 5.11/F_4
C382*10U/6.3V_6
+V1.05S_VCC_EXP
3.629A (160mils)
Q2001 AO3413
1
C3001
2
*.1U/10V_4
*.1U/10V_4
+3V_DEEP_SUS [6,7,8,9,26]
+5VS5 [25,28,29,33,34,35,36,37,38,39,40]
+5V [7,21,25,26,29,30,36,39]
+VCCAXCK_VRM [8]
1.29A (60mils)
+V1.05S_PCH_VCC
C4111U/6.3V_4
C4331U/6.3V_4
C4571U/6.3V_4
C43510U/6.3VS_6
0.67A (40mils)
+V1.05M_VCCASW
C424 1U/6.3V_4
C452 1U/6.3V_4
C453 22U/6.3VS_6
+PCH_VCCDSW
+V1.05S_VCC_EXP
0.261A (40mils)
+3V_DEEP_SUS
0.098A (20mils)
+VCCA_USBSUS
C425*1U/6.3V_4
C395*10U/6.3V_6
0.476A (30mils)
+V1.05M_VCCSUS
C460*1U/6.3V_4
98mA (15mils)
0.179A (20mils)
PCH band gap Power
3
MAIND[36]
+3V_DEEP_SUS
3
C3002
12
R2003
22_8
61
2
Q2000B
2N7002KDW
C400*10U/6.3V_6
Q35
*ME2N7002E
2
C2002
.1U/10V_4
2
Lynx Point (POWER)
U21G
AA24
VCCCORE[1]
AA26
VCCCORE[2]
AD20
VCCCORE[3]
AD22
VCCCORE[4]
AD24
VCCCORE[5]
AD26
VCCCORE[6]
AD28
VCCCORE[7]
AE18
VCCCORE[8]
AE20
VCCCORE[9]
AE22
VCCCORE[10]
AE24
VCCCORE[11]
AE26
VCCCORE[12]
AG18
VCCCORE[13]
AG20
VCCCORE[14]
AG22
VCCCORE[15]
AG24
VCCCORE[16]
Y26
VCCCORE[17]
AA18
VCCASW[1]
U18
VCCASW[2]
U20
VCCASW[3]
U22
VCCASW[4]
U24
VCCASW[5]
V18
VCCASW[6]
V20
VCCASW[7]
V24
VCCASW[8]
Y18
VCCASW[9]
Y20
VCCASW[10]
Y22
VCCASW[11]
V22
VCCASW[12]
U14
DCPSUSBYP
AM18
VCCIO[1]
AM20
VCCIO[2]
AM22
VCCIO[3]
AP22
VCCIO[4]
AR22
VCCIO[5]
AT22
VCCIO[6]
AJ30
VCCSUS3_3[1]
AJ32
VCCSUS3_3[2]
AJ26
DCPSUS3_3[1]
AJ28
DCPSUS3_3[2]
AK26
VCCVRM[1]
AK28
VCCVRM[2]
AK20
VCCIO[7]
Y12
DCPSUS1
BB44
VCCVRM[3]
AN34
VCCIO[8]
AN35
VCCIO[9]
LPT_PCH_M_EDS/BGA
+3V_BG+3VS5
1
PCH DS3 PWR
2
POWER
VCCADACBG3_3
CRT
VCC CORE
VCCMPHY
DMI / PCIE
USB3
SPI HVCMOS
FDI
If have power noise issue then stuff it.
+3V +1.5V_LDO
C691
*1U/6.3V_4
SLP_SUS_ON
1
+VCCIO_PCH [4]+3V [2,6,7,8,9,12,13,14,17,18,21,22,23,24,25,26,27,29,30,31,36,37,39]
+1.05V [2,4,7,9,29,34,41]
+1.5V [6,7,8,25,26,29,30,35]
+3VS5 [2,6,7,9,26,28,29,31,33,35,36,41]
+VCCA_DAC_1_2
70mA (15 mils)
L29
13mA (10mils)
+V3.3S_ADACBG
133mA (20mils)
+V3.3S_VCC_GIO
BLM15PX181SN1D
C701 10U/6.3V_6
C702 0.1U/10V_4
C703 0.01U/25V_4
R526 *0_6
R521 *0_8
R576 *0_8/S
R569 *0_8
VCCADAC1_5
VCC3_3[1]
VCC3_3[2]
P45
P43
VSS
M31
R30
R32
PCH VRM Power
BE22
VCCVRM[4]
AK18
VCCIO[10]
AD12
VCCSPI
U20
1
3
EN
2
* G9090-150T11U
C502
*1U/6.3V_4
*100K/F_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
+V1.05S_VCC_EXP
3.629A (160mils)
22mA (10mils)
VOUT5VIN
NC4GND
R333 *0_8
U13
5
IN
4
IN
3
ON/OFF
*AP2821KTR-G1
PROJECT : TWK
PROJECT : TWK
PROJECT : TWK
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PCH 5/6 (POWER)
PCH 5/6 (POWER)
PCH 5/6 (POWER)
1
OUT
GND
10
+1.5V
+1.5V_LDO
+3V
+3V_BG
C4680.1U/10V_4
+3V
+1.5V
C397*10U/6.3V_6
+3V
C4321U/6.3V_4
+3V_DEEP_SUS+3VS5
1
2
1A
1A
10 42Wednesday, April 23, 2014
10 42Wednesday, April 23, 2014
10 42Wednesday, April 23, 2014
1A
5
4
3
2
1
Lynx Point (GND)
U21H
AL34
VSS[0]
AL38
VSS[1]
AL8
VSS[2]
AM14
VSS[3]
AM24
VSS[4]
AM26
VSS[5]
AM28
D D
C C
AM30
AM32
AM16
AN36
AN40
AN42
AP13
AP24
AP31
AP43
AK16
AT10
AT15
AT17
AT20
AT26
AT29
AT36
AT38
AV13
AV22
AV24
AV31
AV33
BB25
AV40
AW2
AY10
AY15
AY20
AY26
AY29
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
AN8
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
AR2
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
D42
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
AV6
VSS[36]
VSS[37]
F43
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
AY7
VSS[44]
B11
VSS[45]
B15
VSS[46]
LPT_PCH_M_EDS/BGA
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
K39
L2
L44
M17
M22
N12
N35
N39
N6
P22
P24
P26
P28
P30
P32
R12
R14
R16
R2
R34
R38
R44
R8
T43
U10
U16
U28
U34
U38
U42
U6
V14
V16
V26
V43
W2
W44
Y14
Y16
Y24
Y28
Y34
Y36
Y40
Y8
U21I
AA16
VSS[92]
AA20
VSS[93]
AA22
VSS[94]
AA28
VSS[95]
AA4
VSS[96]
AB12
VSS[97]
AB34
VSS[98]
AB38
VSS[99]
AB8
VSS[100]
AC2
VSS[101]
AC44
VSS[102]
AD14
VSS[103]
AD16
VSS[104]
AD18
VSS[105]
AD30
VSS[106]
AD32
VSS[107]
AD40
VSS[108]
AD6
VSS[109]
AD8
VSS[110]
AE16
VSS[111]
AE28
VSS[112]
AF38
VSS[113]
AF8
VSS[114]
AG16
VSS[115]
AG2
VSS[116]
AG26
VSS[117]
AG28
VSS[118]
AG44
VSS[119]
AJ16
VSS[120]
AJ18
VSS[121]
AJ20
VSS[122]
AJ22
VSS[123]
AJ24
VSS[124]
AJ34
VSS[125]
AJ38
VSS[126]
AJ6
VSS[127]
AJ8
VSS[128]
AK14
VSS[129]
AK24
VSS[130]
AK43
VSS[131]
AK45
VSS[132]
AL12
VSS[133]
AL2
VSS[134]
BC22
VSS[135]
BB42
VSS[136]
LPT_PCH_M_EDS/BGA
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
B19
B23
B27
B31
B35
B39
B7
BA40
BD11
BD15
BD19
AY36
AT43
BD31
BD35
BD39
BD7
D25
AV7
F15
F20
F29
F33
BC16
D4
G2
G38
G44
G8
H10
H13
H17
H22
H24
H26
H31
H36
H40
H7
K10
K15
K20
K29
K33
BC28
11
B B
A A
PROJECT : TWK
PROJECT : TWK
PROJECT : TWK
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
5
4
3
2
NB5
PCH 6/6 (GND)
PCH 6/6 (GND)
PCH 6/6 (GND)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
11 42Wednesday, April 23, 2014
11 42Wednesday, April 23, 2014
11 42Wednesday, April 23, 2014
1A
1A
1A
5
4
3
2
1
M_A_A[15:0][3]
D D
M_A_BS#0[3]
M_A_BS#1[3]
M_A_BS#2[3]
M_A_CS#0[3]
M_A_CS#1[3]
M_A_CLKP0[3]
M_A_CLKN0[3]
M_A_CLKP1[3]
M_A_CLKN1[3]
M_A_CKE0[3]
M_A_CKE1[3]
M_A_CAS#[3]
M_A_RAS#[3]
R64 10K_4
R65 10K_4
C C
B B
M_A_WE#[3]
SMB_RUN_CLK[8,13,22]
SMB_RUN_DAT[8,13,22]
M_A_ODT0[3]
M_A_ODT1[3]
M_A_DQSP[7:0][3]
M_A_DQSN[7:0][3]
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
DIMM0_SA0
DIMM0_SA1
SMB_RUN_CLK
SMB_RUN_DAT
M_A_DM1
M_A_DM2
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
JDIM1A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDR3L-DIMM0_H=5.2_RVS
5
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
(204P)
PC2100 DDR3 SDRAM SO-DIMM
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
M_A_DQ4
7
M_A_DQ5
15
M_A_DQ7
17
M_A_DQ6
4
M_A_DQ1
6
M_A_DQ0
16
M_A_DQ3
18
M_A_DQ2
21
M_A_DQ9
23
M_A_DQ8
33
M_A_DQ15
35
M_A_DQ10
22
M_A_DQ12
24
M_A_DQ13
34
M_A_DQ14
36
M_A_DQ11
39
M_A_DQ21
41
M_A_DQ16
51
M_A_DQ19
53
M_A_DQ18
40
M_A_DQ20
42
M_A_DQ17
50
M_A_DQ23
52
M_A_DQ22
57
M_A_DQ25
59
M_A_DQ24
67
M_A_DQ30
69
M_A_DQ26
56
M_A_DQ28
58
M_A_DQ29
68
M_A_DQ31
70
M_A_DQ27
129
M_A_DQ36
131
M_A_DQ37
141
M_A_DQ34
143
M_A_DQ38
130
M_A_DQ32
132
M_A_DQ33
140
M_A_DQ35
142
M_A_DQ39
147
M_A_DQ41
149
M_A_DQ45
157
M_A_DQ47
159
M_A_DQ46
146
M_A_DQ40
148
M_A_DQ44
158
M_A_DQ42
160
M_A_DQ43
163
M_A_DQ49
165
M_A_DQ48
175
M_A_DQ54
177
M_A_DQ55
164
M_A_DQ53
166
M_A_DQ52
174
M_A_DQ50
176
M_A_DQ51
181
M_A_DQ61
183
M_A_DQ60
191
M_A_DQ62
193
M_A_DQ63
180
M_A_DQ56
182
M_A_DQ57
192
M_A_DQ59
194
M_A_DQ58
M_A_DQ[63:0] [3]
Reseve for RF
+1.35VSUS
C169 *2.2U/6.3V_4
C124 *2.2U/6.3V_4
+3V
PM_EXTTS#0[13]
DDR3_DRAMRST#[2,13]
2.48A
+3V
R372 10K_4
PM_EXTTS#0
+SMDDR_VREF_DQ0SMDDR_VREF_DQ0_M1
+SMDDR_VREF_DIMM
+1.35VSUS
JDIM1B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
26
31
32
37
38
43
PC2100 DDR3 SDRAM SO-DIMM
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
DDR3L-DIMM0_H=5.2_RVS
+SMDDR_VREF_DIMM [13]
+0.75V_DDR_VTT [13,35,36]
+1.35VSUS [2,4,13,35,40]
+3V [2,6,7,8,9,10,13,14,17,18,21,22,23,24,25,26,27,29,30,31,36,37,39]
44
VSS16
48
VSS17
49
VSS18
54
VSS19
55
VSS20
60
VSS21
61
VSS22
65
VSS23
66
VSS24
71
VSS25
72
VSS26
127
VSS27
128
VSS28
133
VSS29
134
VSS30
138
VSS31
139
VSS32
144
VSS33
145
VSS34
150
VSS35
151
VSS36
155
VSS37
156
VSS38
161
VSS39
162
VSS40
167
VSS41
168
VSS42
172
VSS43
173
VSS44
178
VSS45
179
VSS46
184
VSS47
185
VSS48
189
VSS49
190
VSS50
195
VSS51
196
VSS52
(204P)
VTT1
VTT2
GND
GND
203
204
205
206
+0.75V_DDR_VTT
12
Place these Caps near So-Dimm0.
+1.35VSUS +0.75V_DDR_VTT
10/4 : INTEL suggestion
+1.35VSUS
R84
1K/F_4
+VREF_CA_CPU[3]
A A
5
R79 *0_6/S
R82
1K/F_4
C74
0.022U/16V_4
R78
24.9/F_4
+SMDDR_VREF_DIMM
+SMDDR_VREF_DIMM
4
C177 1U/6.3V_4
C153 1U/6.3V_4
C143 1U/6.3V_4
C144 1U/6.3V_4
C135 10U/6.3VS_6
C91 10U/6.3VS_6
C198 10U/6.3VS_6
C186 10U/6.3VS_6
C161 10U/6.3VS_6
C139 10U/6.3VS_6
C565 *10U/6.3V_6
C155 10U/6.3V_6
C149 10U/6.3V_6
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
C49 1U/6.3V_4
C48 1U/6.3V_4
C57 1U/6.3V_4
C58 1U/6.3V_4
C47 10U/6.3V_6
C54 *10U/6.3V_6
C79 0.1U/10V_4
C78 2.2U/6.3V_6
C323 0.1U/10V_4
C322 0.1U/10V_4
C326 2.2U/6.3V_6
+3V
C62 0.1U/10V_4
C63 2.2U/6.3V_6
3
Place these Caps near So-Dimm0.
INTEL suggestion
SMDDR_VREF_DQ0_M3[3]
2
R154 *0_6/S
C325
0.022U/16V_4
R162
24.9/F_4
PROJECT : TWK
PROJECT : TWK
PROJECT : TWK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
VREF DQ0 M1 Solution
+1.35VSUS
R166
1K/F_4
SMDDR_VREF_DQ0_M1SMDDR_VREF_DQ0_M3
R153
1K/F_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
DDR3 DIMM0-RVS (5.2H)
DDR3 DIMM0-RVS (5.2H)
DDR3 DIMM0-RVS (5.2H)
1
12 42Wednesday, April 23, 2014
12 42Wednesday, April 23, 2014
12 42Wednesday, April 23, 2014
1A
1A
1A
5
4
3
2
1
2.48A
+3V
PM_EXTTS#0
MBCLK2
MBDATA2
PM_EXTTS#0
PM_EXTTS#0_EC
R433 *10K_4
+1.35VSUS
JDIM2B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3L-DIMM2_H=9.2_RVS
DDR3 Thermal Sensor
U17
8
SCLK
7
SDA
6
ALERT#
4
OVERT#
*G780P81U
PC2100 DDR3 SDRAM SO-DIMM
VCC
DXN
GND
+3V
2
13
Q29
*METR3904-G
1 3
44
VSS16
48
VSS17
49
VSS18
54
VSS19
55
VSS20
60
VSS21
61
VSS22
65
VSS23
66
VSS24
71
VSS25
72
VSS26
127
VSS27
128
VSS28
133
VSS29
134
VSS30
138
VSS31
139
VSS32
144
VSS33
145
VSS34
150
VSS35
151
VSS36
155
VSS37
156
VSS38
161
VSS39
162
VSS40
167
VSS41
168
VSS42
172
VSS43
173
VSS44
178
VSS45
179
VSS46
184
VSS47
185
VSS48
189
VSS49
190
VSS50
195
VSS51
196
VSS52
(204P)
203
VTT1
204
VTT2
205
GND
206
GND
C622 *0.01U/25V_4
1
2
DXP
3
5
+0.75V_DDR_VTT
DDR_THERMDA
C619
*2200P/50V_4
DDR_THERMDC
M_B_A[15:0][3]
D D
M_B_BS#0[3]
M_B_BS#1[3]
M_B_BS#2[3]
M_B_CS#0[3]
M_B_CS#1[3]
M_B_CLKP0[3]
M_B_CLKN0[3]
M_B_CLKP1[3]
M_B_CLKN1[3]
M_B_CKE0[3]
M_B_CKE1[3]
M_B_CAS#[3]
M_B_RAS#[3]
R66 10K_4
R63 10K_4
+3V
C C
B B
M_B_WE#[3]
SMB_RUN_CLK[8,12,22]
SMB_RUN_DAT[8,12,22]
M_B_ODT0[3]
M_B_ODT1[3]
M_B_DQSP[7:0][3]
M_B_DQSN[7:0][3]
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
DIMM1_SA0
DIMM1_SA1
M_B_DM1
M_B_DM2
M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7
JDIM2A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDR3L-DIMM2_H=9.2_RVS
5
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
(204P)
PC2100 DDR3 SDRAM SO-DIMM
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
M_B_DQ5
7
M_B_DQ4
15
M_B_DQ3
17
M_B_DQ2
4
M_B_DQ0
6
M_B_DQ1
16
M_B_DQ6
18
M_B_DQ7
21
M_B_DQ12
23
M_B_DQ13
33
M_B_DQ14
35
M_B_DQ10
22
M_B_DQ8
24
M_B_DQ9
34
M_B_DQ11
36
M_B_DQ15
39
M_B_DQ20
41
M_B_DQ21
51
M_B_DQ18
53
M_B_DQ22
40
M_B_DQ17
42
M_B_DQ16
50
M_B_DQ19
52
M_B_DQ23
57
M_B_DQ25
59
M_B_DQ29
67
M_B_DQ27
69
M_B_DQ26
56
M_B_DQ28
58
M_B_DQ24
68
M_B_DQ31
70
M_B_DQ30
129
M_B_DQ36
131
M_B_DQ37
141
M_B_DQ35
143
M_B_DQ34
130
M_B_DQ33
132
M_B_DQ32
140
M_B_DQ39
142
M_B_DQ38
147
M_B_DQ44
149
M_B_DQ40
157
M_B_DQ42
159
M_B_DQ43
146
M_B_DQ45
148
M_B_DQ41
158
M_B_DQ46
160
M_B_DQ47
163
M_B_DQ49
165
M_B_DQ48
175
M_B_DQ54
177
M_B_DQ55
164
M_B_DQ52
166
M_B_DQ53
174
M_B_DQ50
176
M_B_DQ51
181
M_B_DQ61
183
M_B_DQ56
191
M_B_DQ62
193
M_B_DQ63
180
M_B_DQ57
182
M_B_DQ60
192
M_B_DQ59
194
M_B_DQ58
M_B_DQ[63:0] [3]
SMDDR_VREF_DQ1_M1 +SMDDR_VREF_DQ1
+0.75V_DDR_VTT [12,35,36]
+1.35VSUS [2,4,12,35,40]
+3V [2,6,7,8,9,10,12,14,17,18,21,22,23,24,25,26,27,29,30,31,36,37,39]
+SMDDR_VREF_DIMM [12]
DDR3_DRAMRST#[2,12]
+SMDDR_VREF_DIMM
MBCLK2[8,17,22,31]
MBDATA2[8,17,22,31]
PM_EXTTS#0[12]
+3V
VREF DQ1 M1 Solution
EMI add C1000~C1005 for b stage 1/3
+1.35VSUS
C1000 120p/6.3V_4
C1001 120p/6.3V_4
C1002 120p/6.3V_4
C1003 120p/6.3V_4
C1004 120p/6.3V_4
A A
5
C1005 120p/6.3V_4
+1.35VSUS
C164 1U/6.3V_4
C122 1U/6.3V_4
C175 1U/6.3V_4
C87 1U/6.3V_4
C194 10U/6.3VS_6
C86 10U/6.3VS_6
C219 10U/6.3VS_6
C185 10U/6.3VS_6
C176 10U/6.3VS_6
C160 10U/6.3VS_6
C156 *10U/6.3V_6
C130 10U/6.3V_6
C159 10U/6.3V_6
4
Place these Caps near So-Dimm1.
+0.75V_DDR_VTT
C56 1U/6.3V_4
C50 1U/6.3V_4
C51 1U/6.3V_4
C55 1U/6.3V_4
C52 10U/6.3V_6
C53 *10U/6.3V_6
+3V
C61 0.1U/10V_4
C60 2.2U/6.3V_6
+SMDDR_VREF_DQ1
3
+SMDDR_VREF_DIMM
C77 0.1U/10V_4
C76 2.2U/6.3V_6
C320 0.1U/10V_4
C321 0.1U/10V_4
C319 2.2U/6.3V_6
Place these Caps near So-Dimm1.
INTEL suggestion
SMDDR_VREF_DQ1_M3[3]
2
SMDDR_VREF_DQ1_M3 SMDDR_VREF_DQ1_M1
R157 *0_6/S
C330
0.022U/16V_4
R168
24.9/F_4
PROJECT : TWK
PROJECT : TWK
PROJECT : TWK
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
+1.35VSUS
R155
1K/F_4
R156
1K/F_4
DDR3L DIMM1-RVS (9.2H)
DDR3L DIMM1-RVS (9.2H)
DDR3L DIMM1-RVS (9.2H)
1
1A
1A
13 42Wednesday, April 23, 2014
13 42Wednesday, April 23, 2014
13 42Wednesday, April 23, 2014
1A
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