Quanta TWD Schematic

5

4

3

2

1

TWD DIS/UMA (15.6")

D D

C C

B B

EC SPI ROM

Keyboard

Touch Pad

A A

Intel Chief River Platform Block Diagram

DDR3 SODIMM1
Maxima 4GBs

PAGE 12

DDR3 SO-DIMM2
Maxima 4GBs

PAGE 13

SATA - 1st HDD
Package : 9.5 (mm)
Power :

PAGE 28

Package : 12.7 (mm)
Power :

PAGE 28

mSATA
Package : 12.7 (mm)
Power :

PAGE 28

Accelerometer Sensor
LIS3DHTR

PAGE 30

TPM
SLB9635TT1.2

PAGE 30

Embedded Controller

PAGE 29

PAGE 26

PAGE 28

FAN Controller

DDR3 800 ~ 1600 MT/s

DDR3 800 ~ 1600 MT/s

SATA0 6GB/s

SATA2 3GB/sSATA - CD-ROM

SATA1 6GB/s

SMBUS

IT8518E/HX

Power :

Package : LQPF128

Size : 14 x 14 (mm)

PAGE 29

PAGE 28

Realtek

ALC269Q-VC2-GR

Power :

Package : LQPF48

Size : 7 x 7 (mm)

Combo Jack
iPHONE type

Intel Ivy Bridge

Processor : Daul Core
Power : 35 (Watt)

Package : rPGA989
Size : 37.5 x 37.5 (mm)

PAGE 2~5

DMI x 4

FDI x 8

BCLK133M

Intel Cougar/Panther Point

Platform Controller Hub

Power : 3.5 Watt

Package : FCBG989

Size : 25 x 25 (mm)

PAGE 6~11

Azalia

PAGE 23

PAGE 23

PCI-E Gen3
x 8 Lane

Green CLK

32.768KHz
PAGE 25

LVDS Interface

CRT Interface

HDMI Interface

USB3.0 Interface

USB2.0 Interface

PCIE Gen 1 x 1 LaneLPC Interface

RTS5229-GR

Card Reader

Power : (WJ)

Package : LQPF48

Size : 7 x 7 (mm)

SPI Interface

USB2.0 Port x 2(Left side)

Port9/Port11 Port2

PAGE 25

System BIOS
SPI ROM

Slim

VRAM DDR3 x 8
Max 1GBs/2GBs

PAGE 19~20

Nvidia N13P-GLR/N13P-GSR (128bit)

FCBGA908

M2 Package 29*29mm

PAGE 14~18

27MHz
PAGE 16

DP PortB

USB 3.0 Port1(USB 2.0 Port0)

Camera

Power :

PAGE 23

Atheros
AR8161-BL3A-R

LAN Controller

Power :

Package : OFN48

Size : 6 x 6 (mm)

PAGE 7

Package :

PAGE 24

Green CLK

32.768KHz
PAGE 25

Intel Rambo Peak

Halt Mini Card

WLAN / BT Combo

PAGE 27

Fingerprint

Port 12

PAGE 30

LCD Conn (14")

PAGE 21

CRT Conn

PAGE 22

HDMI Conn

PAGE 22

USB3.0 Port x 1

Support USB Charger
IC : TPS2543

PAGE 26

PCB 6L STACK UP

LAYER 1 : TOP
LAYER 2 : SGND
LAYER 3 : IN1(High)
LAYER 4 : IN2(Low)
LAYER 5 : SVCC
LAYER 6 : BOT

Power Source

O2Micro OZ8681

System Charge Power (+BATCHG)

P2806

System Discharge Power
(+1.5V/+3V/+5V)

Ricktek RT8205

System Power (+3VPCU/+5VPCU/
+3VS5/+5VS5)

NCP6132/NCP5911/RT8209/G9334

Processor Power (+VCC_CORE/
+1.05_VTT/+VCCSA)

Richtek RT8207

System Memory Power (+1.5VSUS/
+0.75V_DDR_VTT)

Richtek RT8209/RT9025

PCH Power (+1.05/+1.8V)

O2Micro OZ8122

DGPU Power (+VGACORE/+3.3V_GFX/
+1.8_VGA/+1.5_GFX/+1.05_GFX)

01

PROJECT :TWD (Chief River)

PROJECT :TWD (Chief River)

PROJECT :TWD (Chief River)

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev
A3

A3

A3

Block Diagram

Block Diagram

NB5

NB5

NB5

5

4

3

2

Block Diagram

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

1 42Monday, October 2 2, 2012

1 42Monday, October 2 2, 2012

1 42Monday, October 2 2, 2012

A

A

A

5

Ivy Bridge Processor (DMI,PEG,FDI)

PEG_COMP connect to PIN G3&G4 W:4mils/S:15mils/L: 500mils.

U16A

U16A

DMI_TXN0[6]
DMI_TXN1[6]
DMI_TXN2[6]
DMI_TXN3[6]

D D

C C

B B

A A

DMI_TXP0[6]
DMI_TXP1[6]
DMI_TXP2[6]
DMI_TXP3[6]

DMI_RXN0[6]
DMI_RXN1[6]
DMI_RXN2[6]
DMI_RXN3[6]

DMI_RXP0[6]
DMI_RXP1[6]
DMI_RXP2[6]
DMI_RXP3[6]

FDI_TXN0[6]
FDI_TXN1[6]
FDI_TXN2[6]
FDI_TXN3[6]
FDI_TXN4[6]
FDI_TXN5[6]
FDI_TXN6[6]
FDI_TXN7[6]

FDI_TXP0[6]
FDI_TXP1[6]
FDI_TXP2[6]
FDI_TXP3[6]
FDI_TXP4[6]
FDI_TXP5[6]
FDI_TXP6[6]
FDI_TXP7[6]

FDI_FSYNC0[6]
FDI_FSYNC1[6]

FDI_INT[6]

FDI_LSYNC0[6]
FDI_LSYNC1[6]

eDP_COMP

INT_eDP_HPD_Q

eDP_COMPIO and ICOMPO signals should be shorted
near balls and routed with t ypical impedance <25 mohms

+1.05V

+1.05V

B27

DMI_RX#[0]

B25

DMI_RX#[1]

A25

DMI_RX#[2]

B24

DMI_RX#[3]

B28

DMI_RX[0]

B26

DMI_RX[1]

A24

DMI_RX[2]

B23

DMI_RX[3]

G21

DMI_TX#[0]

E22

DMI_TX#[1]

F21

DMI_TX#[2]

D21

DMI_TX#[3]

G22

DMI_TX[0]

D22

DMI_TX[1]

F20

DMI_TX[2]

C21

DMI_TX[3]

A21

FDI0_TX#[0]

H19

FDI0_TX#[1]

E19

FDI0_TX#[2]

F18

FDI0_TX#[3]

B21

FDI1_TX#[0]

C20

FDI1_TX#[1]

D18

FDI1_TX#[2]

E17

FDI1_TX#[3]

A22

FDI0_TX[0]

G19

FDI0_TX[1]

E20

FDI0_TX[2]

G18

FDI0_TX[3]

B20

FDI1_TX[0]

C19

FDI1_TX[1]

D19

FDI1_TX[2]

F17

FDI1_TX[3]

J18

FDI0_FSYNC

J17

FDI1_FSYNC

H20

FDI_INT

J19

FDI0_LSYNC

H17

FDI1_LSYNC

A18

eDP_COMPIO

A17

eDP_ICOMPO

B16

eDP_HPD

C15

eDP_AUX

D15

eDP_AUX#

C17

eDP_TX[0]

F16

eDP_TX[1]

C16

eDP_TX[2]

G15

eDP_TX[3]

C18

eDP_TX#[0]

E16

eDP_TX#[1]

D16

eDP_TX#[2]

F15

eDP_TX#[3]

Ivy Bridge_rPGA_2DPC_Rev0p61

Ivy Bridge_rPGA_2DPC_Rev0p61

R432 24.9/F_4R432 24.9/F_4

R423 24.9/F_4R423 24.9/F_4

4mils
12mils

eDP_COMP

PEG_COMP

PEG_COMP connect to PIN G1 W:12mils/S:15mils/L: 500mils.

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]

PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PEG_TX#[10]
PEG_TX#[11]

PCI EXPRESS* - GRAPHICS

PCI EXPRESS* - GRAPHICS

PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]

PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]

PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

DMI

DMI

Intel(R) FDI

Intel(R) FDI

eDP

eDP

J22
J21
H22

K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32

J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32

M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25

M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25

4

PEG_COMP

PEG_RX#0
PEG_RX#1
PEG_RX#2
PEG_RX#3
PEG_RX#4
PEG_RX#5
PEG_RX#6
PEG_RX#7

PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
PEG_RX6
PEG_RX7

C_PEG_TX#0
C_PEG_TX#1
C_PEG_TX#2
C_PEG_TX#3
C_PEG_TX#4
C_PEG_TX#5
C_PEG_TX#6
C_PEG_TX#7

C_PEG_TX0
C_PEG_TX1
C_PEG_TX2
C_PEG_TX3
C_PEG_TX4
C_PEG_TX5
C_PEG_TX6
C_PEG_TX7

PEG_TX#[0..7][14]

C117 0.22U/10V_4C117 0.22U/10V_4
C119 0.22U/10V_4C119 0.22U/10V_4
C115 0.22U/10V_4C115 0.22U/10V_4
C106 0.22U/10V_4C106 0.22U/10V_4
C98 0.22U/10V_4C98 0.22U/10V_4
C100 0.22U/10V_4C100 0.22U/10V_4
C96 0.22U/10V_4C96 0.22U/10V_4
C92 0.22U/10V_4C92 0.22U/10V_4

PEG_TX[0..7][14]

C116 0.22U/10V_4C116 0.22U/10V_4
C118 0.22U/10V_4C118 0.22U/10V_4
C114 0.22U/10V_4C114 0.22U/10V_4
C107 0.22U/10V_4C107 0.22U/10V_4
C99 0.22U/10V_4C99 0.22U/10V_4
C101 0.22U/10V_4C101 0.22U/10V_4
C97 0.22U/10V_4C97 0.22U/10V_4
C94 0.22U/10V_4C94 0.22U/10V_4

PM_DRAM_PWR GD[6]

PEG_RX#[0..7] [14]

PEG_RX[0..7] [14]

PEG_TX#0
PEG_TX#1
PEG_TX#2
PEG_TX#3
PEG_TX#4
PEG_TX#5
PEG_TX#6
PEG_TX#7

PEG x8

PEG_TX0
PEG_TX1
PEG_TX2
PEG_TX3
PEG_TX4
PEG_TX5
PEG_TX6
PEG_TX7

R99

R99

*3K/F_4

*3K/F_4

3

CPU Type (Reversed Version)

H=4.5mm ? DGG^9000022 (3A)
H=4.7mm ? DGG^9000024 (3A)

H_SNB_IVB#[7]

H_PROCHOT#[29,39]

C182 43P/50V_4C182 43P/50V_4

H_PWRGOOD[9]

PLTRST#[8,14,24,25,27,29,30]

+1.5V_CPU

R103

R103
200/F_4

200/F_4

R106 130/F_4R106 130/F_4

SM_DRAMPWROK
Processor Input.

TP4TP4

TP6TP6

Placement close to EC.

H_PECI[29]

R69 56.2/F_4R69 56.2/F_4

PM_THRMTRIP#[9,29]

PM_SYNC[6]

H_PROCHOT#_R

PM_THRMTRIP#

R250 10K/F_4R2 50 10K/F_4

C616 *0.1U/10V_4C616 *0.1U/10V_4

PM_DRAM_PWR GD_R

CPU RESET#

20110816 modif y:
REGULATOR DEL FOR SHORT

R98

R98

*39_4

*39_4

R404 1.5K/F_4R404 1.5K/F_4

PM_DRAM_PWR GD_RPM_DRAM_PWR GD

3

2

Q10

Q10
*2N7002K

*2N7002K

1

SKTOCC#

TP_CATERR#

H_PECI

Intel DG request

CPU_RESET#

MAIN_ONG [4,41]

R401

R401

750/F_4

750/F_4

AN34

AL33

AN33

AL32

AN32

AM34

AP33

AR33

2

Footprint: pz98927-364r-01f-socket
CPU BKT P/N: FBSTD266010

U16B

U16B

C26

PROC_SELECT#

SKTOCC#

CATERR#

PECI

PROCHOT#

THERMTRIP#

PM_SYNC

UNCOREPW RGOOD

V8

SM_DRAMPW ROK

RESET#

Ivy Bridge_rPGA_2DPC_Rev0p61

Ivy Bridge_rPGA_2DPC_Rev0p61

MISCTHERMALPWR MANAGEMENT

MISCTHERMALPWR MANAGEMENT

Processor pull-up (CPU)

DDR3 DRAM RESET

DRAMRST_CNTRL_PC H[8,12,13]

C338

C338

0.047U/10V_4

0.047U/10V_4

CLOCKS

CLOCKS

DDR3

DDR3

JTAG & BPM

JTAG & BPM

Q15

Q15
2N7002K

2N7002K

DPLL_REF_CLK

DPLL_REF_CLK#

SM_DRAMRST#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

MISC

MISC

+1.5VSUS

2

A28

BCLK

A27

BCLK#

A16
A15

R8

AK1
A5
A4

AP29

PRDY#

AP27

PREQ#

AR26

TCK

AR27

TMS

AP30

TRST#

AR28

TDI

AP26

TDO

AL35

DBR#

AT28

BPM#[0]

AR29

BPM#[1]

AR30

BPM#[2]

AT30

BPM#[3]

AP32

BPM#[4]

AR31

BPM#[5]

AT31

BPM#[6]

AR32

BPM#[7]

R151

R151
1K/F_4

1K/F_4

3

CPU_DRAMRST#_R

1

CPU_DRAMRST#

R146

R146

4.99K/F_4

4.99K/F_4

1

CLK_CPU_BCLKP [8]
CLK_CPU_BCLKN [8]

CLK_DPLL_SSCLKP_R
CLK_DPLL_SSCLKN_R

SM_RCOMP[0] W:20mils/S:20mils/L: 500mils,
SM_RCOMP[1] W:20mils/S:20mils/L: 500mils,
SM_RCOMP[2] W:15mils/S:20mils/L: 500mils,

CPU_DRAMRST#

SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2

R438 1K/F_4R438 1K/F_4
R440 1K/F_4R440 1K/F_4

R109 140/F_4R109 140/F_4
R447 25.5/F_4R447 25.5/F_4
R450 200/F_4R450 200/F_4

CPU XDP

XDP_PRDY#
XDP_PREQ#

XDP_TCLK
XDP_TMS

XDP_TRST#

XDP_TDI_R

XDP_TDO

XDP_DBRST#

XDP_BPM6
XDP_BPM7

R1651K /F_4 R1651K/F_4

TP8TP8

XDP_DBRST# [6]

TP7TP7
TP5TP5

H_PROCHOT#

XDP_TDO

XDP_TMS

XDP_TDI_R

XDP_PREQ#

XDP_TCLK

XDP_TRST#

DDR3_DRAMRST# [12,13]

R76 62_4R76 62_4

R422 51_4R422 51_4

R418 51_4R418 51_4

R415 51_4R415 51_4

R410 *51_4R410 *51_4

R425 51_4R425 51_4

R407 51_4R407 51_4

Connect a Test Point on

BPM# 6 signal, very close
For iFDIM
Trigger Point

to processor.

Connect a Test Point on

BPM# 7 signal, very close

to processor.

02

+1.05V

+1.05V

+1.05V

R435 *10K/F_4R435 *10K/F_4

5

INT_eDP_HPD_Q

PROJECT :TWD (Chief River)

PROJECT :TWD (Chief River)

PROJECT :TWD (Chief River)

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Processor 1/4 (Host/GPU)

Processor 1/4 (Host/GPU)

NB5

NB5

NB5

4

3

2

Processor 1/4 (Host/GPU)

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

A

A

A

2 42Monday, October 22, 2012

2 42Monday, October 22, 2012

2 42Monday, October 22, 2012

5

4

3

2

1

03

Ivy Bridge Processor (DDR3)

D D

M_A_DQ[63:0][12]

C C

B B

M_A_BS#0[12]
M_A_BS#1[12]
M_A_BS#2[12]

M_A_CAS#[12]
M_A_RAS#[12]
M_A_WE#[12]

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

AP11
AN11

AL12
AM12
AM11

AL11

AP12
AN12

AJ14
AH14

AL15

AK15

AL14

AK14

AJ15
AH15

AE10

AF10

G10

N10

M10

AG6
AG5
AK6
AK5
AH5
AH6
AJ5
AJ6
AJ8
AK8
AJ9
AK9
AH8
AH9
AL9
AL8

AE8
AD9
AF9

F10

C5
D5
D3
D2
D6
C6
C2
C3

F8

G9
F9
F7
G8
G7
K4
K5
K1
J1
J5
J4
J2
K2

M8

N8
N7

M9
N9
M7

V6

U16C

U16C

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

U16D

U16D

AB6

SA_CLK[0]

AA6

SA_CLK#[0]

V9

SA_CKE[0]

AA5

SA_CLK[1]

AB5

SA_CLK#[1]

V10

SA_CKE[1]

AB4

SA_CLK[2]

AA4

SA_CLK#[2]

W9

SA_CKE[2]

AB3

SA_CLK[3]

AA3

SA_CLK#[3]

W10

SA_CKE[3]

AK3

SA_CS#[0]

AL3

SA_CS#[1]

AG1

SA_CS#[2]

AH1

SA_CS#[3]

AH3

SA_ODT[0]

AG3

SA_ODT[1]

AG2

SA_ODT[2]

AH2

SA_ODT[3]

M_A_DQSN0

C4

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]

SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

G6
J3
M6
AL6
AM8
AR12
AM15

D4
F6
K3
N6
AL5
AM9
AR11
AM14

AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7

M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7

M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_CLKP0 [12]
M_A_CLKN0 [12]
M_A_CKE0 [12]

M_A_CLKP1 [12]
M_A_CLKN1 [12]
M_A_CKE1 [12]

M_A_CS#0 [12]
M_A_CS#1 [12]

M_A_ODT0 [12]
M_A_ODT1 [12]

M_A_DQSN[7:0] [12]

M_A_DQSP[7:0] [12]

M_A_A[15:0] [12] M_B_A[15:0] [13]

M_B_DQ[63:0][13]

M_B_BS#0[13]
M_B_BS#1[13]
M_B_BS#2[13]

M_B_CAS#[13]
M_B_RAS#[13]
M_B_WE#[13]

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

AM5
AM6
AR3

AN3
AN2
AN1

AN9

AN8
AR6
AR5
AR9

AJ11

AH11

AR8

AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15

AA10

C9

SB_DQ[0]

A7

SB_DQ[1]

D10

SB_DQ[2]

C8

SB_DQ[3]

A9

SB_DQ[4]

A8

SB_DQ[5]

D9

SB_DQ[6]

D8

SB_DQ[7]

G4

SB_DQ[8]

F4

SB_DQ[9]

F1

SB_DQ[10]

G1

SB_DQ[11]

G5

SB_DQ[12]

F5

SB_DQ[13]

F2

SB_DQ[14]

G2

SB_DQ[15]

J7

SB_DQ[16]

J8

SB_DQ[17]

K10

SB_DQ[18]

K9

SB_DQ[19]

J9

SB_DQ[20]

J10

SB_DQ[21]

K8

SB_DQ[22]

K7

SB_DQ[23]

M5

SB_DQ[24]

N4

SB_DQ[25]

N2

SB_DQ[26]

N1

SB_DQ[27]

M4

SB_DQ[28]

N5

SB_DQ[29]

M2

SB_DQ[30]

M1

SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]

AP3

SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]

AP2

SB_DQ[39]

AP5

SB_DQ[40]
SB_DQ[41]

AT5

SB_DQ[42]

AT6

SB_DQ[43]

AP6

SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]

AT8

SB_DQ[50]

AT9

SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

AA9

SB_BS[0]

AA7

SB_BS[1]

R6

SB_BS[2]

SB_CAS#

AB8

SB_RAS#

AB9

SB_WE#

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

SB_CLK[0]

SB_CLK#[0]

SB_CKE[0]

SB_CLK[1]

SB_CLK#[1]

SB_CKE[1]

SB_CLK[2]

SB_CLK#[2]

SB_CKE[2]

SB_CLK[3]

SB_CLK#[3]

SB_CKE[3]

SB_CS#[0]
SB_CS#[1]
SB_CS#[2]
SB_CS#[3]

SB_ODT[0]
SB_ODT[1]
SB_ODT[2]
SB_ODT[3]

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

AE2
AD2
R9

AE1
AD1
R10

AB2
AA2
T9

AA1
AB1
T10

AD3
AE3
AD6
AE6

AE4
AD4
AD5
AE5

D7
F3
K6
N3
AN5
AP9
AK12
AP15

C7
G3
J6
M3
AN6
AP8
AK11
AP14

AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4

M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7

M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_B_CLKP0 [13]
M_B_CLKN0 [13]
M_B_CKE0 [13]

M_B_CLKP1 [13]
M_B_CLKN1 [13]
M_B_CKE1 [13]

M_B_CS#0 [13]
M_B_CS#1 [13]

M_B_ODT0 [13]
M_B_ODT1 [13]

M_B_DQSN[7:0] [13]

M_B_DQSP[7:0] [13]

A A

5

Ivy Bridge_rPGA_2DPC_Rev0p61

Ivy Bridge_rPGA_2DPC_Rev0p61

Ivy Bridge_rPGA_2DPC_Rev0p61

Ivy Bridge_rPGA_2DPC_Rev0p61

PROJECT :TWD (Chief River)

PROJECT :TWD (Chief River)

PROJECT :TWD (Chief River)

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Processor 2/4 (DDR3 I/F)

Processor 2/4 (DDR3 I/F)

NB5

NB5

NB5

4

3

2

Processor 2/4 (DDR3 I/F)

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

A

A

A

3 42Monday, October 22, 2012

3 42Monday, October 22, 2012

3 42Monday, October 22, 2012

5

POWER

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100

POWER

CORE SUPPLY

CORE SUPPLY

U16F

+VCC_CORE

C194

C194
22U/6.3VS_6

22U/6.3VS_6

D D

C637

C637
22U/6.3VS_6

22U/6.3VS_6

C639

C639
22U/6.3VS_6

22U/6.3VS_6

C656

C656
22U/6.3VS_6

22U/6.3VS_6

C648

C648
22U/6.3VS_6

22U/6.3VS_6

C C

B B

C647

C647
22U/6.3VS_6

22U/6.3VS_6

C632

C632
22U/6.3VS_6

22U/6.3VS_6

C635

C635
22U/6.3VS_6

22U/6.3VS_6

C630

C630
22U/6.3VS_6

22U/6.3VS_6

C176

C176
22U/6.3VS_6

22U/6.3VS_6

22uF_8 x8 Socket TOP cavity
22uF_8 x10 Socket BOT cavity
22uF_8 x8 Socket TOP edge
470uF_7343 x4

IVB:55A

C190

C190
22U/6.3VS_6

22U/6.3VS_6

C625

C625
22U/6.3VS_6

22U/6.3VS_6

C188

C188
22U/6.3VS_6

22U/6.3VS_6

C636

C636
22U/6.3VS_6

22U/6.3VS_6

C645

C645
22U/6.3VS_6

22U/6.3VS_6

C195

C195
22U/6.3VS_6

22U/6.3VS_6

C631

C631
22U/6.3VS_6

22U/6.3VS_6

C638

C638
22U/6.3VS_6

22U/6.3VS_6

C187

C187
22U/6.3VS_6

22U/6.3VS_6

C634

C634
22U/6.3VS_6

22U/6.3VS_6

C199

C199
22U/6.3VS_6

22U/6.3VS_6

C174

C174
22U/6.3VS_6

22U/6.3VS_6

C202

C202
22U/6.3VS_6

22U/6.3VS_6

C643

C643
22U/6.3VS_6

22U/6.3VS_6

C197

C197
22U/6.3VS_6

22U/6.3VS_6

C624

C624
22U/6.3VS_6

22U/6.3VS_6

C649

C649
22U/6.3VS_6

22U/6.3VS_6

C644

C644
22U/6.3VS_6

22U/6.3VS_6

C175

C175
22U/6.3VS_6

22U/6.3VS_6

C626

C626
22U/6.3VS_6

22U/6.3VS_6

U16F

AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26

Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26

Ivy Bridge_rPGA_2DPC_Rev0p61

Ivy Bridge_rPGA_2DPC_Rev0p61

PEG AND DDR

PEG AND DDR

VCC_SENSE

VCCIO_SENSE

VSS_SENSE_VCCIO

SENSE LINES SVID

SENSE LINES SVID

4

VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8

VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24

VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39

VCCIO40

VIDALERT#

VIDSCLK
VIDSOUT

VSS_SENSE

3

22uF_8 x2 Socket TOP cavity
22uF_8 x2 Socket BOT cavity
22uF_8 x4 Socket TOP edge
22uF_8 x4 Socket BOT edge

+1.8V

C671

C671
1U/6.3V_4

1U/6.3V_4

470uF_7343 x2

C655

C655
22U/6.3VS_6

22U/6.3VS_6

C628

C628
22U/6.3VS_6

22U/6.3VS_6

C204

C204
22U/6.3VS_6

22U/6.3VS_6

C209

C209
22U/6.3VS_6

22U/6.3VS_6

C629

C629
22U/6.3VS_6

22U/6.3VS_6

C654

C654
22U/6.3VS_6

22U/6.3VS_6

IVB: 1.5A

C670

C670
1U/6.3V_4

1U/6.3V_4

C641

C641
22U/6.3VS_6

22U/6.3VS_6

C653

C653
22U/6.3VS_6

22U/6.3VS_6

C208

C208
22U/6.3VS_6

22U/6.3VS_6

C203

C203
22U/6.3VS_6

22U/6.3VS_6

C642

C642
22U/6.3VS_6

22U/6.3VS_6

C640

C640
22U/6.3VS_6

22U/6.3VS_6

C672

C672
10U/6.3V_6

10U/6.3V_6

AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12

E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

J23

H_CPU_SVIDALRT#

AJ29

VR_SVID_CLK VCCSA_SEL0

AJ30

VR_SVID_DATA

AJ28

AJ35
AJ34

VCCP_SENSE

B10

VSSP_SENSE

A10

SNB: 8.5A SNB: 21.5A

C663

C663
22U/6.3VS_6

22U/6.3VS_6

C661
22U/6.3VS_6

22U/6.3VS_6

C662

C662
*22U/6.3VS_6

*22U/6.3VS_6

C215

C215
*22U/6.3VS_6

*22U/6.3VS_6

C211

C211
22U/6.3VS_6

22U/6.3VS_6

C219

C219
*22U/6.3VS_6

*22U/6.3VS_6

+1.05V

22uF_8 x7 Socket TOP cavity
22uF_8 x5 Socket BOT cavity
22uF_8 x2 Socket TOP cavity (no stuff)
22uF_8 x5 Socket BOT cavity (no stuff)
330uF_7343 x2

R50 100/F_4R50 100/F_4

VCC_SENSE [39]
VSS_SENSE [39]

R49 100/F_4R49 100/F_4

R446 10/F_4R446 10/F_4

R443 10/F_4R443 10/F_4

100- ±1% pull-up to VCC near processor.

+1.05V +VCC_GFX

C666

C666

C223

C223

22U/6.3VS_6

22U/6.3VS_6

22U/6.3VS_6

22U/6.3VS_6

C664

C664

C213

C213

22U/6.3VS_6

22U/6.3VS_6

22U/6.3VS_6

22U/6.3VS_6

C660

C660

C221

C221

22U/6.3VS_6

22U/6.3VS_6

22U/6.3VS_6

22U/6.3VS_6

C665

C665
*22U/6.3VS_6

*22U/6.3VS_6

C217

C217

C658

C658

*22U/6.3VS_6

*22U/6.3VS_6

*22U/6.3VS_6

*22U/6.3VS_6

C659

C659

C212

C212

*22U/6.3VS_6

*22U/6.3VS_6

22U/6.3VS_6

22U/6.3VS_6

C657

C657

C220

C220

22U/6.3VS_6

22U/6.3VS_6

22U/6.3VS_6

22U/6.3VS_6

+VCC_CORE

+1.05V

VCCP_SENSE [35]
VSSP_SENSE [35]

Zo impedance: 27.4ohm

Zo impedance: 27.4ohm

330uF x1, 10uF_8 x1, 1uF_4 x2 Socket
BOT edge.

U16G

U16G

AT24

VAXG1

AT23

VAXG2

AT21

VAXG3

AT20

VAXG4

AT18

VAXG5

AT17

VAXG6

AR24

VAXG7

AR23

VAXG8

AR21

VAXG9

AR20

VAXG10

AR18

VAXG11

AR17

VAXG12

AP24

VAXG13

AP23

VAXG14

AP21

VAXG15

AP20

VAXG16

AP18

VAXG17

AP17

VAXG18

AN24

VAXG19

AN23

VAXG20

AN21

VAXG21

AN20

VAXG22

AN18

VAXG23

AN17

VAXG24

AM24

VAXG25

AM23

VAXG26

AM21

VAXG27

AM20

VAXG28

AM18

VAXG29

AM17

VAXG30

AL24

VAXG31

AL23

VAXG32

AL21

VAXG33

AL20

VAXG34

AL18

VAXG35

AL17

VAXG36

AK24

VAXG37

AK23

VAXG38

AK21

VAXG39

AK20

VAXG40

AK18

VAXG41

AK17

VAXG42

AJ24

VAXG43

AJ23

VAXG44

AJ21

VAXG45

AJ20

VAXG46

AJ18

VAXG47

AJ17

VAXG48

AH24

VAXG49

AH23

VAXG50

AH21

VAXG51

AH20

VAXG52

AH18

VAXG53

AH17

VAXG54

B6

VCCPLL1

A6

VCCPLL2

A2

VCCPLL3

Ivy Bridge_rPGA_2DPC_Rev0p61

Ivy Bridge_rPGA_2DPC_Rev0p61

Q13

Q13
QM3002N3

QM3002N3

5 2

MAIND

POWER

POWER

GRAPHICS

GRAPHICS

1.8V RAIL

1.8V RAIL

1

3

4

C276

C276
*470P/50V_4

*470P/50V_4

2

CAD Note: +VDDR_REF_CPU should
have 10 mil trace width

VAXG_SENSE

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

SM_VREF

SA_DIMM_VREFDQ

VREFMISC

VREFMISC

SB_DIMM_VREFDQ

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15

DDR3 -1.5V RAILS

DDR3 -1.5V RAILS

VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8

SA RAIL

SA RAIL

VCCSA_SENSE

VCCSA_VID[0]
VCCSA_VID[1]

VCCIO_SEL

+1.5V_CPU+1.5VSUS

R100

R100
220_8

220_8

3

2

Q11

Q11

2N7002K

2N7002K

1

AK35
AK34

AL1

B4
D1

AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1

M27
M26
L26
J26
J25
J24
H26
H25

H23

C22
C24

A19

MAIN_ONG [2,41]

R91,R98,R109 close to CPU

0.1U/10V_4

0.1U/10V_4

SMDDR_VREF_DQ0_M3
SMDDR_VREF_DQ1_M3

20mils width

VCCSA_SEL

C285 0.1U/10V_4C285 0.1U/10V_4

C286 0.1U/10V_4C286 0.1U/10V_4

C284 0.1U/10V_4C284 0.1U/10V_4

C283 0.1U/10V_4C283 0.1U/10V_4

R53100/F_4 R53100/F_4

+VCC_GFX

VCC_AXG_SENSE [39]
VSS_AXG_SENSE [39]

C248

C248

R52100/F_4 R52100/F_4

+VDDR_REF_CPU

+VDDR_REF_CPU and
DDR_VTTREF must use 10mils
width

R456 *1K/F_4R456 *1K/F_4C661

R458 *1K/F_4R458 *1K/F_4

IVB: 5A

C249

C249

C247

C247

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

C250

C250

C259

C259

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

IVB: 6A

C177

C177

C189

C189

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

330uF x1, 10uF_8 x1 Socket BOT edge,
10uF_8 x2 Socket BOT cavity.

R77 *100/F_4R77 *100/F_4

+1.5VSUS

R68 10K_4R68 10K_4

VCCSA_SEL0 [34]
VCCSA_SEL [34]

R71 10K_4R71 10K_4

VCCUSA_SENSE [34]

1

2

SMDDR_VREF_DQ0_M3 [12]

SMDDR_VREF_DQ1_M3 [13]

+1.5V_CPU

C246

C246

C49

C49

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

+VCCSA

C196

C196

C200

C200

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

+VCCSA

Zo:55 ohm

1

3

Q12

Q12
2N7002K

2N7002K

R118 3.3K/F_4R118 3.3K/F_4

C273

C273
470P/50V_4

470P/50V_4

04

DDR_VTTREF [12,13,33]

MAIND [41]

+1.05V

A A

R75

C201

C201

0.1U/10V_4

0.1U/10V_4

R75
75/F_4

75/F_4

VR_SVID_ALERT# [39]
VR_SVID_CLK [39]
VR_SVID_DATA [39]

NB5

NB5

4

3

2

NB5

PROJECT :TWD (Chief River)

PROJECT :TWD (Chief River)

PROJECT :TWD (Chief River)

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Processor 3/4 (POWER)

Processor 3/4 (POWER)

Processor 3/4 (POWER)

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

4 42Monday, October 22, 2012

4 42Monday, October 22, 2012

4 42Monday, October 22, 2012

A

A

A

R74

R74
130/F_4

130/F_4

H_CPU_SVIDALRT#
VR_SVID_CLK
VR_SVID_DATA

5

R67 43_4R67 43_4

5

U16H

U16H

AT35

VSS1

AT32

VSS2

AT29

VSS3

AT27

VSS4

AT25

VSS5

AT22

D D

C C

B B

VSS6

AT19

VSS7

AT16

VSS8

AT13

VSS9

AT10

VSS10

AT7

VSS11

AT4

VSS12

AT3

VSS13

AR25

VSS14

AR22

VSS15

AR19

VSS16

AR16

VSS17

AR13

VSS18

AR10

VSS19

AR7

VSS20

AR4

VSS21

AR2

VSS22

AP34

VSS23

AP31

VSS24

AP28

VSS25

AP25

VSS26

AP22

VSS27

AP19

VSS28

AP16

VSS29

AP13

VSS30

AP10

VSS31

AP7

VSS32

AP4

VSS33

AP1

VSS34

AN30

VSS35

AN27

VSS36

AN25

VSS37

AN22

VSS38

AN19

VSS39

AN16

VSS40

AN13

VSS41

AN10

VSS42

AN7

VSS43

AN4

VSS44

AM29

VSS45

AM25

VSS46

AM22

VSS47

AM19

VSS48

AM16

VSS49

AM13

VSS50

AM10

VSS51

AM7

VSS52

AM4

VSS53

AM3

VSS54

AM2

VSS55

AM1

VSS56

AL34

VSS57

AL31

VSS58

AL28

VSS59

AL25

VSS60

AL22

VSS61

AL19

VSS62

AL16

VSS63

AL13

VSS64

AL10

VSS65

AL7

VSS66

AL4

VSS67

AL2

VSS68

AK33

VSS69

AK30

VSS70

AK27

VSS71

AK25

VSS72

AK22

VSS73

AK19

VSS74

AK16

VSS75

AK13

VSS76

AK10

VSS77

AK7

VSS78

AK4

VSS79

AJ25

VSS80

Ivy Bridge_rPGA_2DPC_Rev0p61

Ivy Bridge_rPGA_2DPC_Rev0p61

VSS

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2

4

U16I

U16I

T35

VSS161

T34

VSS162

T33

VSS163

T32

VSS164

T31

VSS165

T30

VSS166

T29

VSS167

T28

VSS168

T27

VSS169

T26

VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176

N35

VSS177

N34

VSS178

N33

VSS179

N32

VSS180

N31

VSS181

N30

VSS182

N29

VSS183

N28

VSS184

N27

VSS185

N26

VSS186

M34

VSS187

L33

VSS188

L30

VSS189

L27

VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198

K35

VSS199

K32

VSS200

K29

VSS201

K26

VSS202

J34

VSS203

J31

VSS204

H33

VSS205

H30

VSS206

H27

VSS207

H24

VSS208

H21

VSS209

H18

VSS210

H15

VSS211

H13

VSS212

H10

VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222

G35

VSS223

G32

VSS224

G29

VSS225

G26

VSS226

G23

VSS227

G20

VSS228

G17

VSS229

G11

VSS230

F34

VSS231

F31

VSS232

F29

VSS233

Ivy Bridge_rPGA_2DPC_Rev0p61

Ivy Bridge_rPGA_2DPC_Rev0p61

VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267

VSS

VSS

VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285

Processor Strapping

3

F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3

TP11TP11

CFG2
CFG3
CFG4
CFG5
CFG6
CFG7

2

CFG[6:5] (PCIE Port Bifurcation Straps)

11: (Default) x16 - Device 1 functions 1 an d 2 disabled
10: x8, x8 - D evice 1 functio n 1 enabled ; function 2 dis abled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 funct ions 1 and 2 e nabled

CFG2

R72 *1K/F_4R72 *1K/F_4

CFG4

R73 *1K/F_4R73 *1K/F_4

CFG7

R403 *1K/F_4R403 *1K/F_4

CFG5

R65 1K/F_4R65 1K/F_4

CFG6

R66 *1K/F_4R66 *1K/F_4

The CFG signals have a default value of '1' if not term inated on the board.

need check GPU(JW3 used x8 lane)

eDP Enable

U16E

U16E

AK28

CFG[0]

AK29

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD5

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

J15

RSVD27

Ivy Bridge_rPGA_2DPC_Rev0p61

Ivy Bridge_rPGA_2DPC_Rev0p61

1

05

VCC_DIE_SENSE

RSVD28
RSVD29
RSVD30
RSVD31

RSVD32

RSVD33
RSVD34
RSVD35

RSVD37
RSVD38
RSVD39
RSVD40

RSVD41
RSVD42
RSVD43
RSVD44
RSVD45

RSVD46
RSVD47
RSVD48
RSVD49
RSVD50

RSVD51
RSVD52

BCLK_ITP

BCLK_ITP#

RSVD56
RSVD57
RSVD58

KEY

AH27
AH26

L7
AG7
AE7
AK2

W8

AT26
AM33
AJ27

T8
J16
H16
G16

AR35
AT34
AT33
AP35
AR34

B34
A33
A34
B35
C35

AJ32
AK32

AN35
AM35

AT2
AT1
AR1

B1

VSS_DIE_SENSE

VCC_DIE_SENSE

VSS_DIE_SENSE

CFG

CFG

RESERVED

RESERVED

TP9TP9
TP13TP13

1 0

A A

5

CFG2
(PCIe Static x16 Lane Numbering Reversal.)

CFG4
(DP Presence Strap)

4

Normal Operation(Default) Lane Reversed

Disable; No physical DP attached to eDP

3

Enable; An ext DP device is connected to eDP

PROJECT :TWD (Chief River)

PROJECT :TWD (Chief River)

PROJECT :TWD (Chief River)

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Processor 4/4 (RSV,Ground)

Processor 4/4 (RSV,Ground)

NB5

NB5

NB5

2

Processor 4/4 (RSV,Ground)

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

A

A

A

5 42Monday, October 22, 2012

5 42Monday, October 22, 2012

5 42Monday, October 22, 2012

5

4

3

2

1

Cougar Point/Panther Point (DMI,FDI,PM)

U18C

U18C
CPT_PPT_Rev_0p7

CPT_PPT_Rev_0p7

DMI_RXN0[2]
DMI_RXN1[2]
DMI_RXN2[2]
DMI_RXN3[2]

DMI_RXP0[2]

+1.05V

DMI_RXP1[2]
DMI_RXP2[2]
DMI_RXP3[2]

DMI_TXN0[2]
DMI_TXN1[2]
DMI_TXN2[2]
DMI_TXN3[2]

DMI_TXP0[2]
DMI_TXP1[2]
DMI_TXP2[2]
DMI_TXP3[2]

R483 49.9/F_4R483 49.9/F_4

R485 750/F_4R485 750/F_4

C533 *1U/6.3V_4C533 *1U/6.3V_4

DMI_COMP

DMI_RBIAS

SUS_PWR_ACK

XDP_DBRST#

EC_PWROK

EC_PWROK

EC_PWROK

RSMRST#

SUS_PWR_ACK

DNBSWON#

AC_PRESENT_R

PM_BATLOW#

PM_RI#

D D

C C

B B

XDP_DBRST#[2]

IMVP_PWRGD

EC_PWROK[29]

PM_DRAM_PWR GD[2]

20110816 ES2 current leakage

RSMRST#[29]

SUS_PWR_ACK[29]

DNBSWON#[29]

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWR OK

L22

PWROK

L10

APWRO K

B13

DRAMPW ROK

C21

RSMRST#

(+3VS5)

K16

SUSWA RN#/SUSPWRDNACK /GPIO30

E20

PWRBTN #

(DSW)

H20

ACPRESENT / G PIO31

(+3VS5)

E10

BATLOW # / GPIO72

A10

RI#

DMI

FDI

DMI

FDI

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

System Power Management

System Power Management

SLP_LAN# / GPIO29

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWVR MEN

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

FDI_INT

DPWRO K

WAKE#

(+3V)

(+3VS5)

(+3VS5)

(+3VS5)

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

(+3VS5)

BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9

BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9

AW16

AV12

BC10

AV14

BB10

A18

E22

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

DSWVREN

RSMRST#

PCIE_WAKE#

CLKRUN#

SUS_SATA#

PCH_SUSCLK_L

SLP_LAN#

FDI_TXN0 [2]
FDI_TXN1 [2]
FDI_TXN2 [2]
FDI_TXN3 [2]
FDI_TXN4 [2]
FDI_TXN5 [2]
FDI_TXN6 [2]
FDI_TXN7 [2]

FDI_TXP0 [2]
FDI_TXP1 [2]
FDI_TXP2 [2]
FDI_TXP3 [2]
FDI_TXP4 [2]
FDI_TXP5 [2]
FDI_TXP6 [2]
FDI_TXP7 [2]

FDI_INT [2]

FDI_FSYNC0 [2]

FDI_FSYNC1 [2]

FDI_LSYNC0 [2]

FDI_LSYNC1 [2]

0816 RSMRST# SHORT
DPWROK DEL

PCIE_WAKE# [24,27]

CLKRUN# [29,30]

TP32TP32

TP29TP29

SLP_S5 [29]

SUSC# [29]

SUSB# [29]

TP33TP33

20110818 DEL
SLP_A# / SLP_SUS#

TP28TP28

PM_SYNC [2]

PCH Pull-high/low(CLG)

PM_RI#

PM_BATLOW#

PCIE_WAKE#

SLP_LAN#

SUS_PWR_ACK

AC_PRESENT_R

A A

CLKRUN#

XDP_DBRST#

RSMRST#

IMVP_PWRGD

R504 10K/F_4R504 10K/F_4

R280 8.2K_4R280 8.2K_4

R489 10K/F_4R489 10K/F_4

R314 *10K/F_4R314 *10K/F_4

R257 10K/F_4R257 10K/F_4

R235 10K/F_4R235 10K/F_4

R496 8.2K_4R496 8.2K_4

R312 1K/F_4R312 1K/F_4

R294 *1K/F_4R294 *1K/F_4

R234 10K/F_4R234 10K/F_4

R324 *100K/F_4R324 *100K/F_4

+3VS5

INTEL DG

+3V

INTEL DG

5

PD Res place close to PCH

PCH to Res routeing 50 ohm Impedance.
Res to connector filter routeing 37.5ohm Impedance.

R154 150/F_4R154 150/F_4

R153 150/F_4R153 150/F_4

R152 150/F_4R152 150/F_4

CRT_BLUE

CRT_GREEN

CRT_RED

4

3

PCH_LVDS_BLON[21]

PCH_DISP_ON[21]

PCH_DPST_PWM[21]

PCH_EDIDCLK[21]
PCH_EDIDDATA[21]

+3V

PCH_LA_CLK#[21]
PCH_LA_CLK[21]

PCH_LA_DATAN0[21]
PCH_LA_DATAN1[21]
PCH_LA_DATAN2[21]

PCH_LA_DATAP0[21]
PCH_LA_DATAP1[21]
PCH_LA_DATAP2[21]

PCH_LB_CLK#[21]
PCH_LB_CLK[21]

PCH_LB_DATAN0[21]
PCH_LB_DATAN1[21]
PCH_LB_DATAN2[21]

PCH_LB_DATAP0[21]
PCH_LB_DATAP1[21]
PCH_LB_DATAP2[21]

PCH_CRT_B[22]
PCH_CRT_G[22]
PCH_CRT_R[22]

PCH_DDCCLK[22]
PCH_DDCDATA[22]

PCH_HSYNC[22]
PCH_VSYNC[22]

Cougar Point/Panther Point (LVDS,DDI)

U18D

U18D
CPT_PPT_Rev_0p7

CPT_PPT_Rev_0p7

J47

PCH_EDIDCLK
PCH_EDIDDATA

PCH_LA_CLK#
PCH_LA_CLK

PCH_LA_DATAN0
PCH_LA_DATAN1
PCH_LA_DATAN2

PCH_LA_DATAP0
PCH_LA_DATAP1
PCH_LA_DATAP2

PCH_LB_CLK#
PCH_LB_CLK

PCH_LB_DATAN0
PCH_LB_DATAN1
PCH_LB_DATAN2

PCH_LB_DATAP0
PCH_LB_DATAP1
PCH_LB_DATAP2

R144 *0_2/SR144 *0_2/S
R143 *0_2/SR143 *0_2/S
R142 *0_2/SR142 *0_2/S

+3V[7,8,9,10,12,13,14,18,21,22,23,24,25,27,28,29,30,35,37,39,41]
+5V[7,10,21,22,23,27,28,41]

CTRL_CLK
CTRL_DATA

LVD_IBG

TP25TP25

CRT_BLUE
CRT_GREEN
CRT_RED

PCH_DDCCLK
PCH_DDCDATA

PCH_HSYNC_R
PCH_VSYNC_R

DAC_IREF

R172

R172
1K/F_4

1K/F_4

R164 2.2K_4R164 2.2K_4
R173 2.2K_4R173 2.2K_4

R189 2.37K/F_4R189 2.37K/F_4

R149 33_4R149 33_4
R147 33_4R147 33_4

+3VS5[7,8,9,10,21,26,27,29,30,32,35,36,38,41]

+1.05V[2,4,7,8,10,26,29,35,38,39]

+3VPCU[7,21,26,27,28,29,31,32]

+3V_RTC[7,10,26]

System PWR_OK(CLG)

IMVP_PWRGD

EC_PWROK

R297

R297
*100K/F_4

*100K/F_4

+3V_RTC

R215 330K_4R2 15 330K_4

DSWVREN

On Die DSW VR Enable

High = Enable (Default)

Low = Disable

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

M40

CRT_DDC_DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

IMVP_PWRGD [39]

2

LVDS

LVDS

CRT

CRT

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_STALLN
SDVO_STALLP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPC_CTRLCLK

DDPC_CTRLDATA

Digital Display Interface

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

PCH Nut: QCI P/N: MBUL1001010 (Location:H13,H14)

NB5

NB5

NB5

AP43
AP45

AM42
AM40

AP39

SDVO_INTN

AP40

SDVO_INTP

SDVO_CLK

P38

SDVO_DATA

M39

DDPB_AUXN
DDPB_AUXP

DDPC_AUXN
DDPC_AUXP

DDPD_AUXN
DDPD_AUXP

AT49
AT47

HDMI_HPD_CON

AT40

DDPB_HPD

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

DDPC_HPD

DDPC_0N

DDPC_0P

DDPC_1N

DDPC_1P

DDPC_2N

DDPC_2P

DDPC_3N

DDPC_3P

DDPD_HPD

DDPD_0N

DDPD_0P

DDPD_1N

DDPD_1P

DDPD_2N

DDPD_2P

DDPD_3N

DDPD_3P

IN_D2#

AV42

IN_D2

AV40

IN_D1#

AV45

IN_D1

AV46

IN_D0#

AU48

IN_D0

AU47

IN_CLK#

AV47

IN_CLK

AV49

P46
P42

AP47
AP49
AT38

AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49

M43
M36

AT45
AT43
BH41

BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42

PROJECT :TWD (Chief River)

PROJECT :TWD (Chief River)

PROJECT :TWD (Chief River)

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

PCH 1/6 (Host/Display)

PCH 1/6 (Host/Display)

PCH 1/6 (Host/Display)

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

SDVO_CLK [22]
SDVO_DATA [22]

HDMI_HPD_CON [22]

IN_D2# [22]
IN_D2 [22]
IN_D1# [22]
IN_D1 [22]
IN_D0# [22]
IN_D0 [22]
IN_CLK# [22]
IN_CLK [22]

06

INT. HDMI

6 42Monday, October 22, 2012

6 42Monday, October 22, 2012

6 42Monday, October 22, 2012

A

A

A

5

Cougar Point/Panther Point (HDA,JTAG,SATA)

CLKGEN_RTC_X1[26]

D D

C C

B B

+3V_RTC

+3VS5

PCH_SPI_CS0#[29]

PCH_SPI_CS1#[29]

PCH Strap Table

Pin Name Strap description Sampled Configuration

SPKR

GNT3# / GPIO55 Top-Block Swap Override

TP55TP55

R219 1M_4R219 1M_4

SPKR[23]

ACZ_SDIN0[23]

R201 10K/F_4R201 10K/F_4

PCH_SPI_CLK[29]

PCH_SPI_SI[29]

PCH_SPI_SO[29]

RTC_RST#

SRTC_RST#

SM_INTRUDER#

PCH_INVRMEN

ACZ_BCLK

ACZ_SYNC

SPKR

ACZ_RST#

ACZ_SDOUT

GPIO33

GPIO13

PCH_SPI_CS0#

PCH_SPI_CS1#

PCH_SPI_SI

PCH_SPI_SO

No reboot mode setting PWROK

U18A

U18A
CPT_PPT_Rev_0p7

CPT_PPT_Rev_0p7

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

(+3V)

C36

HDA_DOCK_EN# / GPIO33

(+3VS5)

N32

HDA_DOCK_RST# / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

JTAG

JTAG

PWROK

INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up

HDA_DOCK_EN#/GPIO33

GNT1# / GPIO51

GPIO19

Different from
Calpella

GNT2# / GPIO53

NV_ALE

NV_CLE

A A

HDA_SYNC On-Die PLL VR Voltage Select RSMRST

Flash Descriptor Security

Only for Interposer

Boot BIOS Selection 1 [bit-1]

Boot BIOS Selection 0 [bit-0]

ESI strap (Server only)

Intel Anti-Theft HDD protection

Only for Interposer

DMI Termination voltage weak pull-down 20kohm

PWROK

PWROK

PWROK

PWROK

PWROK 0 = Disable (Internal pull-down 20kohm)

PWROK

HDA_SDO PWROKFlash Descriptor Security

GPIO8

GPIO28

Different from
Calpella

Integrated Clock Chip Enable Should be pull-down (weak pull-up 20K)RSMRST#

On-die PLL Voltage Regulator RSMRST#

SPI_MOSI iTPM function Disable APWROK

5

4

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

LPC

LPC

FWH4 / LFRAME#

LDRQ0#

LDRQ1# / GPIO23

RTCIHDA

RTCIHDA

SPI

SPI

(+3V)

SERIRQ

SATA0RXN
SATA0RXP
SATA0TXN

SATA0TXP

SATA1RXN
SATA1RXP

SATA 6G

SATA 6G

SATA1TXN

SATA1TXP

SATA2RXN
SATA2RXP
SATA2TXN

SATA2TXP

SATA3RXN
SATA3RXP
SATA3TXN

SATA3TXP

SATA4RXN
SATA4RXP
SATA4TXN

SATA

SATA

SATA4TXP

SATA5RXN
SATA5RXP
SATA5TXN

SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED#

(+3V)

SATA0GP / GPIO21

(+3V)

SATA1GP / GPIO19

0 = Default (weak pull-down 20K)

1 = Setting to No-Reboot mode

0 = "top-block swap" mode

1 = Default (weak pull-up 20K)

0 = Override

1 = Default (weak pull-up 20K)

GNT0#GNT1#

11
00

Should not be pull-down
(weak pull-up 20K)

0 = Support by 1.8V (weak pull-down)
1 = Support by 1.5V

0 = Override

1 = Default (weak pull-up 20K)

0 = Disable

1 = Enable (Default)

0 = Default (weak pull-down 20K)

1 = Enable

4

C38
A38
B37
C37

D36

E36
K36

V5

AM3
AM1
AP7
AP5

AM10
AM8
AP11
AP10

AD7
AD5
AH5
AH4

AB8
AB10
AF3
AF1

Y7
Y5
AD3
AD1

Y3
Y1
AB3
AB1

Y11

Y10

AB12

AB13

AH1

P3

V14

P1

Boot Location

PCH_DRQ#0
PCH_DRQ#1

SERIRQ

SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0

SATA_RXN1
SATA_RXP1
SATA_TXN1
SATA_TXP1

SATA_RXN2
SATA_RXP2
SATA_TXN2
SATA_TXP2

SATA_COMP

SATA3_COMP

SATA3_RBIASPCH_SPI_CLK

BBS_BIT0

SPI

LPC

3

LAD0 [27,29,30]
LAD1 [27,29,30]
LAD2 [27,29,30]
LAD3 [27,29,30]

LFRAME# [27,29,30]

R171 *10K/F_4R171 *10K/F_4

R315 8.2K_4R315 8.2K_4

DG recommended that AC coupling capacitors should be
close to the connector (<100 mils) for optimal signal quality.

R253 37.4/F_4R253 37.4/F_4

R272 49.9/F_4R272 49.9/F_4

R501 750/F_4R501 750/F_4

R498 10K/F_4R498 10K/F_4

R289 10K/F_4R289 10K/F_4

R513 *10K/F_4R513 *10K/F_4

+3V

TP24TP24

+3V

+3V
SERIRQ [29,30]

SATA_RXN0 [28]
SATA_RXP0 [28]
SATA_TXN0 [28]
SATA_TXP0 [28]

SATA_RXN1 [28]
SATA_RXP1 [28]
SATA_TXN1 [28]
SATA_TXP1 [28]

SATA_RXN2 [28]
SATA_RXP2 [28]
SATA_TXN2 [28]
SATA_TXP2 [28]

+1.05V

SATA_LED# [27]

+3V

Circuit

R292 *1K/F_4R292 *1K/F_4

+3V

R127 *1K/F_4R127 *1K/F_4
R125 10K/F_4R125 10K/F_4

+3V

+3V_RTC

R228 330K_4R228 330K_4

GPIO33

[Need external pull-down for LPC BIOS]
Default weak pull- up on GNT0/1#

R497 *1K/F_4R497 *1K/F_4

R132 *1K/F_4R132 *1K/F_4

PCI_GNT3# [8]

R182 *1K/F_4R182 *1K/F_4

USE GPIO PIN

R267 *1K/F_4R267 *1K/F_4

+1.8V

R484 2.2K_4R484 2.2K_4

+1.8V

R191 1K/F_4R191 1K/F_4

+3VS5

R187 *1K/F_4R187 *1K/F_4

+3VS5

3

HDD0 (SATA3 6.0Gb/s)

mSATA (SATA4 3Gb/s)

ODD (SATA2 3Gb/s)

SPKR

PCH_INVRMEN

ACZ_SDOUT

BBS_BIT0

R482 1K/F_4R482 1K/F_4

ACZ_SYNC

ACZ_SDOUT

ACZ_SDOUT [29]

BBS_BIT1 [8]

NV_ALE [8]

NV_CLE [9]
H_SNB_IVB# [2]

C740

C740

0.1U/10V_4

0.1U/10V_4

Reserve for
non-WWAN SKU

+3V_RTC_0

+3V_RTC_0+3V_RTC_0

12

CN7

CN7
*BAT_CONN

*BAT_CONN

2

RTC Circuitry(RTC)

20110816 DSW Circuit DEL

+3VPCU

+3V_RTC_1

BT1

BT1

C741

C741

0.1U/10V_4

0.1U/10V_4

R358 *1K/F_4R358 *1K/F_4

2
1

RTC CONN

RTC CONN

RTC Power trace width 20mils.

HDA Bus(CLG)

ACZ_RST#_AUDIO[23]

ACZ_SDOUT_AUDIO[23]

BIT_CLK_AUDIO[23]

*10P/50V_4

*10P/50V_4

ACZ_SYNC_AUDIO[23]

Vender

EON

AMIC

Size

2MB AKE38ZN0Q00 (EN25QH16-104HIP)

2MB AKE38ZN0802 (A25LQ16M-F/Q)

Socket

PCH_SPI_CS1#
PCH_SPI_CS0#
PCH_SPI_CLK
PCH_SPI_SI PCH_SPI1_SI_R
PCH_SPI_SO

+3V [6,8,9,10,12,13,14,18,21,22,23,24,25,27,28,29,30,35,37,39,41]
+5V [10,21,22,23,27,28,41]
+1.8V [4,10,36]

+1.05V [2,4,6,8,10,26,29,35,38,39]

+3VS5 [6,8,9,10,21,26,27,29,30,32,35,36,38,41]
+3VPCU [21,26,27,28,29,31,32]
+3V_RTC [6,10,26]

2

R192 33_4R192 33_4

R193 33_4R193 33_4

R186 33_4R186 33_4

C362

C362

R199 33_4R199 33_4

P/N

DFHS08FS023

R515 *0_4R515 *0_4
R514 *0_4/SR514 *0_4/S
R325 33_4R325 33_4
R516 33_4R516 33_4
R348 33_4R348 33_4

R517 3.3K_4R517 3.3K_4

+3V

R198

R198

+5V

1M_4

1M_4

D18

D18
*BAT54C

*BAT54C

ACZ_RST#

ACZ_SDOUT

ACZ_BCLK

R207 10K/F_4R207 10K/F_4

PDC suggestion

PCH_SPI_CS0#_R
PCH_SPI1_CLK_R

PCH_SPI1_SO_R

C547

C547
22P/50V_4

22P/50V_4

NB5

NB5

NB5

1

07

30mils

+3V_RTC

R222

R222

20K/F_4

20K/F_4

R216

R216
20K/F_4

20K/F_4

C409

C409
1U/6.3V_4

1U/6.3V_4

R218 *0_6R21 8 *0_6

Q18

Q18

2

2N7002K

2N7002K

ACZ_SYNCACZ_SYNC_R1

1

C380

C380

3

10P/50V_4

10P/50V_4

PCH SPI ROM(CLG)

U21

U21

1

CE#

6

SCK

5

SI

2

SO

3

WP#

A25LQ16M-F/Q

A25LQ16M-F/Q

PROJECT :TWD (Chief River)

PROJECT :TWD (Chief River)

PROJECT :TWD (Chief River)

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

PCH 2/6 (HDA/RTC/SATA/SPI)

PCH 2/6 (HDA/RTC/SATA/SPI)

PCH 2/6 (HDA/RTC/SATA/SPI)

Date: Sheet of

Date: Sheet of

Date: Sheet of

VDD

HOLD#

VSS

8

R518 3.3K_4R518 3.3K_4

7

4

1

C442

C442
1U/6.3V_4

1U/6.3V_4

C414

C414
1U/6.3V_4

1U/6.3V_4

SRTC_RST#RTC_RST#

0.1U/10V_4

0.1U/10V_4

RTC_RST#

SRTC_RST#

C718

C718

+3V

7 42Monday, October 22, 2012

7 42Monday, October 22, 2012

7 42Monday, October 22, 2012

A

A

A

5

PCI/USBOC# Pull-up(CLG)

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

PCH_GPIO4
MPC_PWR_CTRL#
BT_COMBO_EN#

D D

LCD_BK

USB_OC4#

USB_OC1#

USB_OC2#

USB_OC3#

C C

USB3.0

+3V

RP8

RP8

10

9
8
7 4

10P8R-8.2K

10P8R-8.2K

R468 10K/F_4R468 10K/F_4
R159 1 0K/F_4R159 10K/F_4
R124 1 0K/F_4R124 10K/F_4
R180 1 0K/F_4R180 10K/F_4

+3VS5

RP5

RP5

10

9
8
7 4

10K_10P8R_6

10K_10P8R_6

PCH_GPIO52

1

PCH_GPIO54

2
3

56

+3V

USB_OC6#

1

USB_OC0#

2

USB_OC7#

3

USB_OC5#

56

USB30_RX1-[26]

USB30_RX1+[26]

USB30_TX1-[26]

USB30_TX1+[26]

Cougar Point-M/Panther Point (PCI,USB,NVRAM) Cougar Point-M/Panther Point (PCI-E,SMBUS,CLK)

BG26
BJ26
BH25
BJ16
BG16
AH38
AH37
AK43
AK45

AH12

AB46
AB45

AY16
BG46

BE28
BC30
BE32
BJ32
BC28
BE30
BF32
BG32
AV26
BB26
AU28
AY30
AU26
AY26
AV28

AW30

C18
N30

H3

AM4
AM5

Y13
K24
L24

B21
M20

U18E

U18E
CPT_PPT_Rev_0p7

CPT_PPT_Rev_0p7

TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP20

TP21
TP22
TP23
TP24

USB3Rn1
USB3Rn2
USB3Rn3
USB3Rn4
USB3Rp1
USB3Rp2
USB3Rp3
USB3Rp4
USB3Tn1
USB3Tn2
USB3Tn3
USB3Tn4
USB3Tp1
USB3Tp2
USB3Tp3
USB3Tp4

RSVD

RSVD

20111130 Modify USB3.0 for HM70

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

BT_COMBO_EN#
PCH_GPIO52
PCH_GPIO54

TP34TP34

R471 *22_ 4R471 *22_4

CLK_PCI_FB

CLK_PCI_FB_R

R170 22 _4R170 22 _4

C347

C347
18P/50V_4

18P/50V_4

BBS_BIT1

PCI_GNT3#

MPC_PWR_CTRL#
LCD_BK

PCH_GPIO4

PCI_PME#

PCI_PLTRST#

CLK_PCI_TPM_R

R474 22 _4R474 22 _4

CLK_PCI_LPC_R

CLK_PCI_EC_R

BBS_BIT1[7]

PCI_GNT3#[7]

LCD_BK[21]

INTH#[30]

R535 *10K/F_4R535 *10K/F_4

+3V

B B

10/19 C stage:reserve PU 10k.

CLK_PCI_TPM[ 30]

CLK_33M_DEBUG[27]

CLK_33M_KBC[29]

C332

C332

18P/50V_4

18P/50V_4

C738

C738
*18P/50V_4

*18P/50V_4

R155 22_4R155 22_4

EMI(near PCH)

PLTRST#(CLG)

R491

R491
*0_4/S

*0_4/S

PCI_PLTRST#

A A

PLTRST#

R506

R506
100K/F_4

100K/F_4

PLTRST# [2,14,24,25 ,27,29,30]

5

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

C46
C44
E40

D47
E42
F46

G42
G40
C42
D44

K10

C6

H49
H43

J48
K42
H40

PIRQD#

REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54

GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55

PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5

PME#

PLTRST#

CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4

(+3V)
(+3V)
(+3V)

(+3V)
(+3V)
(+3V)

(+3V)
(+3V)
(+3V)
(+3V)

PCI

PCI

(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)

SMBus/Pull-up(CLG)

Q39

Q39

MBCLK2[17,29,30]

MBDATA2[17,29,30]

+3V

SMB_RUN_DAT[12, 13,28]

+3V

SMB_RUN_CLK[12,13,28]

4 3

1

2N7002DW

2N7002DW

Q38

R337 4.7K_4R337 4.7K_4

SMB_RUN_DAT

R335 4.7 K_4R335 4.7K_4

SMB_RUN_CLK SMB_PCH_CLK

Q38

4 3

1

2N7002DW

2N7002DW

4

RSVD1
RSVD2
RSVD3
RSVD4

RSVD5
RSVD6

RSVD7
RSVD8

RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22

RSVD23
RSVD24

RSVD25

RSVD26
RSVD27

RSVD28
RSVD29

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P

USBP10N
USBP10P

USB

USB

USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43

OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

+3V +3VS5

R316 2.2K_4R316 2.2K_4

5

SMB_ME1_CLK

R299 2 .2K_4R299 2.2K_4

2

SMB_ME1_DAT

6

+3V

5

SMB_PCH_DAT

2

6

4

AY7
AV7
AU3
BG4

AT10
BC8

AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6

AV5
AV10

AT8

AY5
BA2

AT12
BF3

C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32

C33

B33

A14
K20
B17
C16
L16
A16
D14
C14

WLAN

PCIE_RXN2_LAN[24]
PCIE_RXP2_LAN[24]

NV_ALE [7]

USB3.0

Camera

USB2.0 R_down

WLAN

USB2.0 R_up

FP

R181

R181

22.6/F_4

22.6/F_4

PCIE_TXN2_LAN[24]

PCIE_RXN3_CR[25]
PCIE_RXP3_CR[25]
PCIE_TXN3_CR[25]

Cardreader

NV_ALE

USB_BIAS

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#

LAN

USBP0- [26]
USBP0+ [2 6]

USBP2- [21]
USBP2+ [2 1]

USBP9- [23]
USBP9+ [2 3]
USBP10- [27]
USBP10+ [ 27]
USBP11- [23]
USBP11+ [ 23]
USBP12- [30]
USBP12+ [ 30]

CLK_REQ/Strap Pin(CLG)

PCIE_CLKREQ_LAN#
PCIE_CLKREQ_CR#

PCIE_CLKREQ_WLAN#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#

Intel DG request

CLK_PEGB_REQ#
CLK_PEGA_REQ#

CLK_PEGA_REQ#
CLK_PEGB_REQ#

CLK_BUF_BCLK_N
CLK_BUF_BCLK_P

CLK_BUF_PCIE_3GPLL#
CLK_BUF_PCIE_3GPLL
CLK_BUF_DREFCLK#
CLK_BUF_DREFCLK
CLK_BUF_DREFSSCLK#
CLK_BUF_DREFSSCLK
CLK_PCH_14M

CLOCK TERMINATION for FCIM

3

U18B

U18B
CPT_PPT_Rev_0p7

CPT_PPT_Rev_0p7

PCIE_RXN1[27]
PCIE_RXP1[27]

PCIE_TXN1[27]
PCIE_TXP1[27 ]

PCIE_TXP2_LAN[2 4]

PCIE_TXP3_CR[25]

C356 0.1U/10V_4C356 0.1U/10V_4
C357 0.1U/10V_4C357 0.1U/10V_4

C405 0.1U/10V_4C405 0.1U/10V_4
C404 0.1U/10V_4C404 0.1U/10V_4

C510 0.1U/10V_4C510 0.1U/10V_4
C511 0.1U/10V_4C511 0.1U/10V_4

PCIE_TXN1_C
PCIE_TXP1_C

PCIE_TXN2_LAN_C
PCIE_TXP2_LAN_C

PCIE_TXN3_CR_C
PCIE_TXP3_CR_C

MPC Switch Control

WLAN

LAN

Cardreader

INT_BT_COMBO_EN#[27]

+3V

+3VS5

Low = MPC ON
High = MPC OFF (Default)

R160 *1K/F_4R160 *1K/F_4

CLK_PCIE_WLANN
CLK_PCIE_WLANP

PCIE_CLKREQ_WLAN#

CLK_PCIE_LANN
CLK_PCIE_LANP

PCIE_CLKREQ_LAN#

CLK_PCIE_CRN
CLK_PCIE_CRP

PCIE_CLKREQ_CR#

CLK_PCIE_REQ3#

CLK_PCIE_REQ4#

BOARD_ID0[ 9]

CLK_PEGB_REQ#

BOARD_ID2[ 9]

PCIE Clock

WLAN

PCIE_CLKREQ_WLAN#[27]

LAN

GPU

Cardreader

3

MPC_PWR_CTRL#

MPC_PWR_CTRL#

R511 10 K/F_4R511 10K/F_4
R290 10 K/F_4R290 10K/F_4

R493 10K/F_4R493 10K/F_4
R505 10 K/F_4R505 10K/F_4
R263 10 K/F_4R263 10K/F_4

R284 10K/F_4R284 10K/F_4
R313 10 K/F_4R313 10K/F_4

R296 *10K/F _4R296 *10K/F _4
R285 *10 K/F_4R285 *10K/F_4

R480 1 0K/F_4R480 10K/F_ 4
R481 1 0K/F_4R481 10K/F_ 4 R264 2 .2K_4R264 2.2K_4

R224 1 0K/F_4R224 10K/F_ 4
R232 1 0K/F_4R232 10K/F_ 4
R211 1 0K/F_4R211 10K/F_ 4
R212 1 0K/F_4R212 10K/F_ 4
R288 1 0K/F_4R288 10K/F_ 4
R287 1 0K/F_4R287 10K/F_ 4
R157 1 0K/F_4R157 10K/F_ 4

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

(+3VS5)

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

(+3V)

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

(+3V)

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

(+3VS5)

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

(+3VS5)

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

(+3VS5)

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

(+3VS5)

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

(+3VS5)

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

(+3VS5)

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

CLK_PCIE_WLANN[27]

CLK_PCIE_WLANP[27]

CLK_PCIE_LANN[24]
CLK_PCIE_LANP[24]

PCIE_CLKREQ_LAN#[24]

CLK_PCIE_VGA#[14]

CLK_PCIE_VGA[14 ]

CLK_PCIE_CRN[25]
CLK_PCIE_CRP[25 ]

PCIE_CLKREQ_CR#[25]

PCI-E*

PCI-E*

2

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SMBUSController

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

SML1CLK / GPIO58

SML1DATA / GPIO75

Link

Link

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

CLKOUT_DMI_N

CLOCKS

CLOCKS

CLK_PCIE_WLANN
CLK_PCIE_WLANP
PCIE_CLKREQ_WLAN#

CLK_PCIE_LANN
CLK_PCIE_LANP
PCIE_CLKREQ_LAN#

CLK_PCIE_VGA#
CLK_PCIE_VGA

CLK_PCIE_CRN
CLK_PCIE_CRP

PCIE_CLKREQ_CR#

CLKOUT_DMI_P

CLKOUT_DP_N
CLKOUT_DP_P

CLKIN_GND1_N
CLKIN_GND1_P

CLKIN_DOT_96N
CLKIN_DOT_96P

CLKIN_SATA_N
CLKIN_SATA_P

CLKIN_PCILOOPBACK

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

FLEX CLOCKS

+3V[6,7,9,10,12,13,14,18,21,22,23,24,2 5,27,28,29,30,35,37,39,41]

+3VS5[6,7,9,10,21,26,27,2 9,30,32,35,36,38,41]

2

(+3VS5)

SMBCLK

SMBDATA

(+3VS5)

SML0CLK

SML0DATA

(+3VS5)

(+3VS5)

(+3VS5)

CL_CLK1

CL_DATA1

CL_RST1#

(+3VS5)

CLKIN_DMI_N
CLKIN_DMI_P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

(+3V)

(+3V)

(+3V)

(+3V)

SMBALERT#

E12

SMB_PCH_CLK

H14

SMB_PCH_DAT

C9

DRAMRST_CNTRL_PCH

A12

SMB_ME0_CLK

C8

SMB_ME0_DAT

G12

SML1ALERT#_R

C13

SMB_ME1_CLK

E14

SMB_ME1_DAT

M16

M7

T11

P10

CLK_PEGA_REQ#

M10

CLK_PCIE_VGA#

AB37

CLK_PCIE_VGA

AB38

AV22
AU22

AM12
AM13

CLK_BUF_PCIE_3GPLL#

BF18

CLK_BUF_PCIE_3GPLL

BE18

CLK_BUF_BCLK_N

BJ30

CLK_BUF_BCLK_P

BG30

CLK_BUF_DREFCLK#

G24

CLK_BUF_DREFCLK

E24

CLK_BUF_DREFSSCLK#

AK7

CLK_BUF_DREFSSCLK

AK5

CLK_PCH_14M

K45

CLK_PCI_FB

H45

V47
V49

Y47

XCLK_RCOMP

K43

F47

H47

K49

R57 *0_4R57 *0_4

SMB_PCH_CLK [28]

SMB_PCH_DAT [28]

PCH_XTAL25_IN [26]

R477 90 .9/F_4R477 90.9/F_4

SMBus/Pull-up(CLG)

+3VS5

R503 1K/F_4R503 1K/F_4

R275 10K/F_4R275 10K/F_4
R298 2 .2K_4R298 2.2K_4
R302 2 .2K_4R302 2.2K_4
R490 2.2K_4R490 2.2K_4

R256 10K/F_4R256 10K/F_4

PROJECT :TWD (Chief River)

PROJECT :TWD (Chief River)

PROJECT :TWD (Chief River)

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

NB5

NB5

NB5

TP54TP54

1

SMB_INT# [ 28]

DRAMRST_CNTRL_PCH [2 ,12,13]

TP30TP30

CLK_PEGA_REQ# [14]

CLK_CPU_BCLKN [2]
CLK_CPU_BCLKP [2]

+1.05V

DRAMRST_CNTRL_PCH

SMBALERT#
SMB_PCH_CLK
SMB_PCH_DAT
SMB_ME0_CLK
SMB_ME0_DAT
SML1ALERT#_R

PCH 3/6 (Clock/PCI/PCIE/USB)

PCH 3/6 (Clock/PCI/PCIE/USB)

PCH 3/6 (Clock/PCI/PCIE/USB)

1

08

8 42Monday, October 22, 2012

8 42Monday, October 22, 2012

8 42Monday, October 22, 2012

A

A

A

5

Cougar Point/Panther Point (GPIO,VSS_NCTF,RSVD)

Cougar Point/Panther Point (GPIO,VSS_NCTF,RSVD)

Cougar Point/Panther Point (GPIO,VSS_NCTF,RSVD)Cougar Point/Panther Point (GPIO,VSS_NCTF,RSVD)

S_GPIO

SIO_EXT_SMI#[29]

SIO_EXT_SCI#[29]

D D

DGPU_HOLD_RST#[14]

C C

RF_OFF#[27]

DGPU_PWROK[14,18]

DGPU_PWR_EN[37,38]

TP56TP56

20110819 ODD_PSNT# DEL

TP31TP31

R240 0_4R240 0_4

2011 12 01 : Modify net from DGPU_PRSNT# to DGPU_PRSNT

OPTIMUS POWER control pin

DGPU_PWROK

DGPU_HOLD_RST#

DGPU_PWR_EN

BOARD_ID[3:0]

0000
0001
0010
0011

B B

0100
0101
0110
0111
1000
1001
1010

GPIO17

GPIO24

GPIO36

Model Name
QLGA
TWC
JW2
TBD
LG3
LG5
LG2C
LG4C
TBD
JW6/JW7
JW3

SIO_EXT_SMI#

SIO_EXT_SCI#

BT_OFF#

ICC_EN#

LAN_DISABLE#_R

RF_OFF#

ODD_PRSNT#_R

BIOS_REC

DGPU_HOLD_RST#

GPIO27

PLL_ODVR_EN

BOARD_ID3

BOARD_ID4

DGPU_PWR_EN_R

FDI_OVRVLTG

MFG_MODE

DGPU_PRSNT

TEST_SET_UP

SATA5GP

SV_DET

U18F

U18F
CPT_PPT_Rev_0p7

CPT_PPT_Rev_0p7

T7

BMBUSY# / GPIO0

(+3V)

A42

TACH1 / GPIO1

(+3V)

H36

TACH2 / GPIO6

(+3V)

E38

TACH3 / GPIO7

(+3V)

C10

GPIO8

(+3VS5)

C4

LAN_PHY_PW R_CTRL / GPIO12

(+3VS5)

G2

GPIO15

(+3VS5)

U2

SATA4GP / GPIO16

(+3V)

D40

TACH0 / GPIO17

(+3V)

T5

SCLOCK / GPIO22

(+3V)

E8

GPIO24

(+3VS5)

E16

GPIO27

(DSW)

P8

GPIO28

(+3VS5)

K1

STP_PCI# / GPIO34

(+3V)

K4

GPIO35

(+3V)

V8

SATA2GP / GPIO36

(+3V)

M5

SATA3GP / GPIO37

(+3V)

N2

SLOAD / GPIO38

(+3V)

M3

SDATAOUT0 / GP IO39

(+3V)

V13

SDATAOUT1 / GP IO48

(+3V)

V3

SATA5GP / GPIO49 / TEMP_ALERT#

(+3V)

D6

GPIO57

(+3VS5)

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

1101 TWD

Chief River BOARD ID SETTING

BOARD_ID0

GPIO44

GPIO71
BOARD_ID2
BOARD_ID3

A A

BOARD_ID4
BOARD_ID5

GPIO46 MODEL BIT2

GPIO34 MODEL BIT3

GPIO35

GPIO69
DGPU_PRSNT GPIO39
DGPU_OPT_DIS# GPIO70

20110816 Define BRD_ID[3:0]

5

MODEL BIT0
MODEL BIT1BOARD_ID1

No Dolby=0, Dolby=1
HM76=0,HM70=1
Optimus=1, UMA=0
Optimus=0, Dis only=1

4

TACH4 / GPIO68

(+3V)

TACH5 / GPIO69

(+3V)

TACH6 / GPIO70

(+3V)

TACH7 / GPIO71

(+3V)

A20GATE

RCIN#

PROCPW RGD

CPU/MISC

CPU/MISC

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

VSS_NCTF_23

NCTF

NCTF

VSS_NCTF_24

VSS_NCTF_25

VSS_NCTF_26

VSS_NCTF_27

VSS_NCTF_28

VSS_NCTF_29

VSS_NCTF_30

VSS_NCTF_31

VSS_NCTF_32

BOARD_ID0[8]

BOARD_ID2[8]

BOARD_ID0

BOARD_ID1

BOARD_ID2

BOARD_ID3

BOARD_ID4

BOARD_ID5

DGPU_PRSNT

DGPU_OPT_DIS#

THRMTRIP#

INIT3_3V#

DF_TVS

TS_VSS1

TS_VSS2

TS_VSS3

TS_VSS4

GPIO

GPIO

R246 *10K/F_4R246 *10K/F_4

R476 10K/F_4R476 10K/F_4

R276 *10K/F_4R276 *10K/F_4

R495 *10K/F_4R495 *10K/F_4

R494 10K/F_4R494 10K/F_4

R472 10K/F_4R472 10K/F_4

R502 *10K/F_4R502 *10K/F_4

R473 10K/F_4R473 10K/F_4

0804 Board_ID1 change to +3V
Board_ID5 change to +3V

4

C40

B41

C41

A40

P4

AU16

PECI

P5

AY11

AY10

T14

AY1

AH8

AK11

AH10

AK10

P37

NC_1

BG2

BG48

BH3

BH47

BJ4

BJ44

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

F1

F49

BOARD_ID0

BOARD_ID2

R245 10K/F_4R245 10K/F_4

R478 *10K/F_4R478 *10K/F_4

R281 10K/F_4R281 10K/F_4

R509 10K/F_4R509 10K/F_4

R508 *10K/F_4R508 *10K/F_4

R470 *10K/F_4R470 *10K/F_4

R510 10K/F_4R510 10K/F_4

R475 *10K/F_4R475 *10K/F_4

RF_PWR_OFF#

BOARD_ID5

DGPU_OPT_DIS#

BOARD_ID1

EC_RCIN#

PCH_THRMTRIP#

NV_CLE

R479 *10K/F_4R479 *10K/F_4

R271 390_4R271 390_4

NV_CLE [7]

+3VS5

+3V

+3VS5

+3V

3

RF_PWR_OFF# [27]

+3V

EC_A20GATE [29]

EC_RCIN# [29]

H_PWRGOOD [2]

PM_THRMTRIP# [2,29]

3

2

MFG-TEST

MFG_MODE

8/24 B stage: reserve R534 for board ID

Bios swap GPIO.

S_GPIO

RF_OFF#

Intel ME Crypto Transport Layer
Security (TLS) cipher suite

Low = Disable (Default)
High = Enable

TEST_SET_UP

SV_SET_UP

High = Strong (Default)

SATA2GP/GPIO36 Reserved only

R512 10K/F_4R512 10K/F_4

R291 10K/F_4R291 10K/F_4

R507 1K/F_4R507 1K/F_4

R309 10K/F_4R309 10K/F_4

2

+3VS5

+3V

+3V

+3V

R534 *10K/F_4R534 *10K/F_4

BIOS RECOVERY High = Disable (Default)

FDI TERMINATION
VOLTAGE OVERRIDE

NB5

NB5

NB5

1

GPIO Pull-up/Pull-down(CLG)

LAN_DISABLE#_R

SIO_EXT_SCI#
SIO_EXT_SMI#
BT_OFF#
EC_A20GATE
EC_RCIN#
SATA5GP

ODD_PRSNT#_R
DGPU_PWROK

DGPU_PWROK
GPIO27

R492 10K/F_4R492 10K/F_4

R183 10K/F_4R183 10K/F_4
R469 10K/F_4R469 10K/F_4
R169 10K/F_4R169 10K/F_4
R311 10K/F_4R311 10K/F_4
R293 10K/F_4R293 10K/F_4
R500 10K/F_4R500 10K/F_4

R499 10K/F_4R499 10K/F_4
R174 *10K/F_4R174 *10K/F_4

R175 *10K/F_4R175 *10K/F_4
R227 10K/F_4R227 10K/F_4

BIOS_REC

Low = Enable

R303 100K/F_4R303 100K/F_4

SV_DET

TEST DETECT

Low = Default

R295 100K/F_4R295 100K/F_4

FDI_OVRVLTG

PROJECT :TWD (Chief River)

PROJECT :TWD (Chief River)

PROJECT :TWD (Chief River)

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

PCH 4/6 (GPIO)

PCH 4/6 (GPIO)

PCH 4/6 (GPIO)

Date: Sheet of

Date: Sheet of

Date: Sheet of

+3VS5

+3V

R310 10K/F_4R310 10K/F_4

Reserved only

+3VS5[6,7,8,10,21,26,27,29,30,32,35,36,38,41]

1

+3V[6,7,8,10,12,13,14,18,21,22,23,24,25,27,28,29,30,35,37,39,41]

09

+3V

9 42Monday, October 22, 2012

9 42Monday, October 22, 2012

9 42Monday, October 22, 2012

A

A

A

5

4

3

2

1

Cougar Point/Panther Point (POWER,WJ)

U18J

U18J

CPT_PPT_Rev_0p7

CPT_PPT_Rev_0p7

AD49

VCCACLK

+VCCSST

BH23

AL29

AL24

AA19

AA21

AA24

AA26

AA27

AA29

AA31

AC26

AC27

AC29

AC31

AD29

AD31

W21

W23

W24

W26

W29

W31

W33

BD47

BF47

AF17
AF33
AF34
AG34

AG33

T16

V12

T38

N16

Y49

V16

T17
V19

BJ8

A22

VCCDSW 3_3

DCPSUSBYP

VCC3_3[5]

VCCAPLLDMI2

VCCIO[14]

DCPSUS[3]

VCCASW [1]

VCCASW [2]

VCCASW [3]

VCCASW [4]

VCCASW [5]

VCCASW [6]

VCCASW [7]

VCCASW [8]

VCCASW [9]

VCCASW [10]

VCCASW [11]

VCCASW [12]

VCCASW [13]

VCCASW [14]

VCCASW [15]

VCCASW [16]

VCCASW [17]

VCCASW [18]

VCCASW [19]

VCCASW [20]

DCPRTC

VCCVRM[4]

VCCADPLLA

VCCADPLLB

VCCIO[7]
VCCDIFFCLKN[1]
VCCDIFFCLKN[2]
VCCDIFFCLKN[3]

VCCSSC

DCPSST

DCPSUS[1]
DCPSUS[2]

V_PROC_IO

VCCRTC

+3VS5

C452

C466

C466

1U/6.3V_4

1U/6.3V_4

C366

C366

1U/6.3V_4

1U/6.3V_4

C369

C369

1U/6.3V_4

1U/6.3V_4

C452

0.1U/10V_4

0.1U/10V_4

+1.05V

VCCASW:803mA (40mils)

C319

C319
1U/6.3V_4

1U/6.3V_4

C514

C514

4.7U/6.3V_6

4.7U/6.3V_6

C421

C421
1U/6.3V_4

1U/6.3V_4

5

D D

+1.05V

C C

+1.05V

R185 *0_4/SR185 *0_4/S

+1.05V

B B

R188 *0_4/SR188 *0_4/S

+1.05V

+1.05V

V_PROC_IO=2mA
(10mils)

A A

+3V_RTC

VCCRTC<1mA
(10mils)(WJ)

C408

C408
1U/6.3V_4

1U/6.3V_4

C315

C315
22U/6.3VS_6

22U/6.3VS_6

C460

C460

0.1U/10V_4

0.1U/10V_4

+VCCAFDI_VRM

160mA (20mils)

+1.05V_VCCA_A_DPL

65mA (10mils)

+1.05V_VCCA_B_DPL

8mA (10mils)

+VCCDIFFCLKN

55mA (10mils)

+V1.05V_SSCVCC

95mA (10mils)

C468

C468

0.1U/10V_4

0.1U/10V_4

C513

C513

0.1U/10V_4

0.1U/10V_4

C426

C426

0.1U/10V_4

0.1U/10V_4

3mA (10mils)

+3V_SUS_CLKF33

+VCCSUS1

C415

C415
*1U/6.3V_4

*1U/6.3V_4

C385

C385
1U/6.3V_4

1U/6.3V_4

C368

C368
22U/6.3VS_6

22U/6.3VS_6

+VCCRTCEXT

C340

C340

0.1U/10V_4

0.1U/10V_4

C441

C441

0.1U/10V_4

0.1U/10V_4

POWER

POWER

Clock and Miscellaneous

Clock and Miscellaneous

CPURTC

CPURTC

+3V[6,7,8,9,12,13,14,18,21,22,23,24,25,27,28,29,30,35,37,39,41]
+5V[7,21,22,23,27,28,41]

+1.8V[4,7,36]

+1.05V[2,4,6,7,8,26,29,35,38,39]

+3VS5[6,7,8,9,21,26,27,29,30,32,35,36,38,41]
+5VS5[21,23,26,32,33,34,35,37,39,40,41]

PCI/GPIO/LPCMISC

PCI/GPIO/LPCMISC

SATA USB

SATA USB

HDA

HDA

VCCSUS3_3[7]

VCCSUS3_3[8]

VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

V5REF_SUS

VCCSUS3_3[1]

VCCSUS3_3[2]

VCCSUS3_3[3]

VCCSUS3_3[4]

VCCSUS3_3[5]

VCCAPLLSATA

VCCASW [22]

VCCASW [23]

VCCASW [21]

VCCSUSHDA

4

VCCIO[29]

VCCIO[30]

VCCIO[31]

VCCIO[32]

VCCIO[33]

VCCIO[34]

DCPSUS[4]

V5REF

VCC3_3[1]

VCC3_3[8]

VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12]

VCCIO[13]

VCCIO[6]

VCCVRM[1]

VCCIO[2]

VCCIO[3]

VCCIO[4]

N26

P26

P28

T27

T29

T23

T24

V23

V24

P24

T26

+5V_PCH_VCC5REFSUS

M26

+VCCA_USBSUS

AN23

AN24

+5V_PCH_VCC5REF

P34

N20

N22

119mA (15mils)

P20

P22

AA16

266mA (20mils)

W16

T34

AJ2

70mA

AF13

AH13

350mA

AH14

30mA

AF14

AK1

+VCCAFDI_VRM

AF11

AC16

AC17

AD17

1.01A (60mils)

+1.05V

T21

V21

T19

P32

+3V

C363

C363

0.1U/10V_4

0.1U/10V_4

10mA (10mils)

C373

C373

0.1U/10V_4

0.1U/10V_4

+3V_RTC[6,7,26]

+1.5VSUS[2,4,12,13,33,38]

+1.5V_CPU[2,4,27,28]

C388

C388
1U/6.3V_4

1U/6.3V_4

C403

C403

0.1U/10V_4

0.1U/10V_4

C425

C425

0.1U/10V_4

0.1U/10V_4

1mA (10mils)

C407 *1U/6.3V_4C407 *1U/6.3V_4

+3VS5

1mA (10mils)

C416

C416
1U/6.3V_4

1U/6.3V_4

C350

C350

0.1U/10V_4

0.1U/10V_4

C532

0.1U/10V_4

0.1U/10V_4

C456

C456
1U/6.3V_4

1U/6.3V_4

C482

C482
1U/6.3V_4

1U/6.3V_4

C445

C445
1U/6.3V_4

1U/6.3V_4

C410

C410
*1U/6.3V_4

*1U/6.3V_4

+1.05V

+3VS5

+1.05V

VCCSUS3_3:65mA(15mils)

+1.5V_CPU

+VCCAFDI_VRM

3

+1.05V

+1.05V

+1.05V

+1.05V

+3V

(Mobile 1.5V)

+1.05V

+3V

C327

C327
1U/6.3V_4

1U/6.3V_4

+1.05V

+3VS5

+3V

+3V

+1.05V

+1.05V

+3VS5

Close to Y49

VCCCore:1.73 A (100mils)

C424

C424
1U/6.3V_4

1U/6.3V_4

C395

C395
10U/6.3VS_6

10U/6.3VS_6

VCCIO:3.799 A (140mils)

C401

C401
1U/6.3V_4

1U/6.3V_4

C371

C465

C465
10U/6.3VS_6

10U/6.3VS_6

C371
1U/6.3V_4

1U/6.3V_4

178m A (20mils)

+VCCAFDI_VRM

R268 *0_4/SR268 *0_4/S

L31

L31
10uH/100MA_8

10uH/100MA_8

L32

L32
10uH/100MA_8

10uH/100MA_8

+1.05V_VCCA_A_DPL

+1.05V_VCCA_B_DPL

20mA (10mils)

+3V_SUS_CLKF33

20mA (10mils,WJ)

C463

C463
1U/6.3V_4

1U/6.3V_4

Close to AT16 Close to AP16

160mA (15mils)

Cougar Point/Panther Point (POWER)

U18G

C708

C708

0.1U/10V_4

0.1U/10V_4C532

C476

C476
1U/6.3V_4

1U/6.3V_4

U18G
CPT_PPT_Rev_0p7

CPT_PPT_Rev_0p7

AA23

VCCCORE[1]

AC23

C392

C392
1U/6.3V_4

1U/6.3V_4

C374

C374
1U/6.3V_4

1U/6.3V_4

C429

C429
1U/6.3V_4

1U/6.3V_4

C474

C474
1U/6.3V_4

1U/6.3V_4

L11

L11
10uH/100MA_8

10uH/100MA_8

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

VccAFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

C706 1U/6.3V_4C706 1U/6.3V_4

C707 1U/6.3V_4C707 1U/6.3V_4

C360 1U/6.3V_4C360 1U/6.3V_4

C328 10U/6.3VS_6C328 10U/6.3VS_6

+5V +VCCA_DAC _1_2

C297

C297
1U/6.3V_4

1U/6.3V_4

U5
G910T21UU5G910T21U

Vin3Vout

GND

2

2

POWER

POWER

VCC CORE

VCC CORE

VCCIO

VCCIO

FDI

FDI

1

CRTLVDS

CRTLVDS

DMI

DMI

DFT / SPI HVCMOS

DFT / SPI HVCMOS

VCCADAC

VSSADAC

VCCALVDS

VSSALVDS

VCCTX_LVDS[1]

VCCTX_LVDS[2]

VCCTX_LVDS[3]

VCCTX_LVDS[4]

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCCLKDMI

VCCDFTERM[1]

VCCDFTERM[2]

VCCDFTERM[3]

VCCDFTERM[4]

VCCSPI

NB5

NB5

NB5

U48

U47

AK36

AK37

AM37

AM38

AP36

AP37

SG & UMA : Ra
DIS : Rb

V33

V34

AT16

AT20

AB36

AG16

AG17

AJ16

AJ17

V1

+5V_PCH_VCC5REF

V5REF= 1mA

+5V_PCH_VCC5REFSUS

VCC5REFSUS=1mA

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

6.3mA (10mils)

10

+VCCA_DAC_1_2

L10

L10

*PBY160808T-300Y-N

*PBY160808T-300Y-N

C314 10U/6.3VS_6C314 10U/6.3VS_6

C705 0.1U/10V_4C705 0.1U/10V_4

C704 0.01U/16V_4C704 0.01U/16V_4

1mA (10mils)

60mA (10mils)

C316 22U/6.3VS_6C316 22U/6.3VS_6

C320 0.01U/16V_4C320 0.01U/16V_4

C324 0.01U/16V_4C324 0.01U/16V_4

+VCCAFDI_VRM

+1.05V

C365

C365
1U/6.3V_4

1U/6.3V_4

2 mA (10mils)

10mA (10mils)

R200 10_4R200 10_4

D9 RB500V-40D9 RB500V-40

C358

C358
1U/6.3V_4

1U/6.3V_4

R196 10_4R196 10_4

D11 RB500V-40D11 RB500V-40

C375

C375

0.1U/10V_4

0.1U/10V_4

PROJECT :TWD (Chief River)

PROJECT :TWD (Chief River)

PROJECT :TWD (Chief River)

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PCH 5/6 (Power)

PCH 5/6 (Power)

PCH 5/6 (Power)

1

+3V

L9

L9

0.1uH/250mA_8

0.1uH/250mA_8

C354

C354

0.1U/10V_4

0.1U/10V_4

42mA (10mils)

C387

C387
1U/6.3V_4

1U/6.3V_4

C438

C438
*10U/6.3V_6

*10U/6.3V_6

C446

C446

0.1U/10V_4

0.1U/10V_4

C530

C530
1U/6.3V_4

1U/6.3V_4

+3V

+1.8V+VCC_TX_LVDS

+1.05V

+5V

+3V

+5VS5

+3VS5

10 42Monday, October 22, 2012

10 42Monday, October 22, 2012

10 42Monday, October 22, 2012

+3V

+1.8V

+3V

A

A

A

5

4

3

2

1

Cougar Point/Panther Point (GND)

U18I

U18I
CPT_PPT_Rev_0p7

CPT_PPT_Rev_0p7

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

BB12
BB16
BB20
BB22
BB24
BB28
BB30
BB38

BB46
BC14
BC18

BC22
BC26
BC32
BC34
BC36
BC40
BC42
BC48
BD46

BE22
BE26
BE40

BF10
BF12
BF16
BF20
BF22
BF24
BF26
BF28

BF30
BF38
BF40

BG17
BG21
BG33
BG44

BH11
BH15
BH17
BH19

BH27
BH31
BH33
BH35
BH39
BH43

B19
B23
B27
B31
B35
B39

BB4

BC2

BD5

BD3

BF8

BG8

H10

BH7

D12
D16
D18
D22
D24
D26
D30
D32
D34
D38
D42

E18
E26
G18
G20
G26
G28
G36
G48
H12
H18
H22
H24
H26
H30
H32
H34

VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]

B7

VSS[171]

F45

VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]

D3

VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]

D8

VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]

F3

VSS[258]

D D

C C

B B

A A

5

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]

4

H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28

Cougar Point/Panther Point (GND)

U18H

U18H
CPT_PPT_Rev_0p7

CPT_PPT_Rev_0p7

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

AA33

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD37

VSS[31]

AD38

VSS[32]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]

AD14

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

3

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]

VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28

2

PROJECT :TWD (Chief River)

PROJECT :TWD (Chief River)

PROJECT :TWD (Chief River)

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

PCH 6/6 (Ground)

PCH 6/6 (Ground)

NB5

NB5

NB5

PCH 6/6 (Ground)

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

11

11 42Monday, October 22, 2012

11 42Monday, October 22, 2012

11 42Monday, October 22, 2012

A

A

A

5

4

3

2

1

JDIM1A

M_A_A[15:0][3]

D D

M_A_BS#0[3]
M_A_BS#1[3]
M_A_BS#2[3]
M_A_CS#0[3]
M_A_CS#1[3]
M_A_CLKP0[3]
M_A_CLKN0[3]
M_A_CLKP1[3]
M_A_CLKN1[3]
M_A_CKE0[3]
M_A_CKE1[3]
M_A_CAS#[3]
M_A_RAS#[3]

R190 10K/F_4R190 10K/F_4
R195 10K/F_4R195 10K/F_4

C C

B B

M_A_WE#[3]

SMB_RUN_CLK[8,13,28]
SMB_RUN_DAT[8,13,28]

M_A_ODT0[3]
M_A_ODT1[3]

M_A_DQSP[7:0][3]

M_A_DQSN[7:0][3]

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

DIMM0_SA0
DIMM0_SA1
SMB_RUN_CLK
SMB_RUN_DAT

M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7

JDIM1A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

PC2100 DDR3 SDRAM SO-DIMM

12
29
47

64
137
154
171
188

10

27

45

62
135
152
169
186

PC2100 DDR3 SDRAM SO-DIMM

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

DDR3-DIMM0_H=5.2_STD

DDR3-DIMM0_H=5.2_STD

ddr-ddrsk-20401-tp4b-204p-ldv

ddr-ddrsk-20401-tp4b-204p-ldv

DGMK4000059

DGMK4000059

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46

(204P)

(204P)

DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

M_A_DQ5

7

M_A_DQ6

15

M_A_DQ7

17

M_A_DQ0

4

M_A_DQ1

6

M_A_DQ3

16

M_A_DQ2

18

M_A_DQ9

21

M_A_DQ8

23

M_A_DQ15

33

M_A_DQ10

35

M_A_DQ12

22

M_A_DQ13

24

M_A_DQ11

34

M_A_DQ14

36

M_A_DQ20

39

M_A_DQ21

41

M_A_DQ19

51

M_A_DQ18

53

M_A_DQ17

40

M_A_DQ16

42

M_A_DQ23

50

M_A_DQ22

52

M_A_DQ28

57

M_A_DQ29

59

M_A_DQ27

67

M_A_DQ31

69

M_A_DQ25

56

M_A_DQ24

58

M_A_DQ26

68

M_A_DQ30

70

M_A_DQ32

129

M_A_DQ37

131

M_A_DQ34

141

M_A_DQ38

143

M_A_DQ36

130

M_A_DQ33

132

M_A_DQ35

140

M_A_DQ39

142

M_A_DQ40

147

M_A_DQ41

149

M_A_DQ43

157

M_A_DQ42

159

M_A_DQ44

146

M_A_DQ45

148

M_A_DQ47

158

M_A_DQ46

160

M_A_DQ53

163

M_A_DQ52

165

M_A_DQ55

175

M_A_DQ50

177

M_A_DQ49

164

M_A_DQ48

166

M_A_DQ54

174

M_A_DQ51

176

M_A_DQ61

181

M_A_DQ60

183

M_A_DQ59

191

M_A_DQ63

193

M_A_DQ56

180

M_A_DQ57

182

M_A_DQ62

192

M_A_DQ58

194

M_A_DQ4

5

M_A_DQ[63:0] [3]

SMDDR_VREF_DQ0_M3[4]

SMDDR_VREF_DQ0_M3

PM_EXTTS#0[13,30]

DDR3_DRAMRST#[2,13]

R209 *0_6/SR209 *0_6/S
R217 *0_6R21 7 *0_6

+3V

+1.5VSUS

2.48A

+3V

R166 10K/F_4R166 10K/F_4

PM_EXTTS#0

+SMDDR_VREF_DQ0SMDDR_VREF_DQ0_M1
+SMDDR_VREF_DIMM

JDIM1B

JDIM1B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM0_H=5.2_STD

DDR3-DIMM0_H=5.2_STD

ddr-ddrsk-20401-tp4b-204p-ldv

ddr-ddrsk-20401-tp4b-204p-ldv

DGMK4000059

DGMK4000059

44

VSS16

48

VSS17

49

VSS18

54

VSS19

55

VSS20

60

VSS21

61

VSS22

65

VSS23

66

VSS24

71

VSS25

72

VSS26

127

VSS27

128

VSS28

133

VSS29

134

VSS30

138

VSS31

139

VSS32

144

VSS33

145

VSS34

150

VSS35

151

VSS36

155

VSS37

156

VSS38

161

VSS39

162

VSS40

167

VSS41

168

VSS42

172

VSS43

173

VSS44

178

VSS45

179

VSS46

184

VSS47

185

VSS48

189

VSS49

190

VSS50

195

VSS51

196

VSS52

(204P)

(204P)

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

VTT1
VTT2

GND
GND

203
204

205
206

+0.75V_DDR_VTT

+1.5VSUS[2,4,13,33,38]

+0.75V_DDR_VTT[13,33,41]

+3V[6,7,8,9,10,13,14,18,21,22,23,24,25,27,28,29,30,35,37,39,41]

12

+1.5VSUS

For EMI RESERVE 8/30

+1.5VSUS

C336 *120P/50V_4C336 *120P/50V_4

C494 *120P/50V_4C494 *120P/50V_4

C492 *120P/50V_4C492 *120P/50V_4

C337 *120P/50V_4C337 *120P/50V_4

C451 *120P/50V_4C451 *120P/50V_4

C329 *120P/50V_4C329 *120P/50V_4

A A

5

C396 *120P/50V_4C396 *120P/50V_4

+0.75V_DDR_VTT

C342 *120P/50V_4C342 *120P/50V_4

C341 *120P/50V_4C341 *120P/50V_4

4

+1.5VSUS +0.75V_DDR _VTT

C330 1U/6.3V_4C330 1U/6.3V_4

C377 1U/6.3V_4C377 1U/6.3V_4

C398 1U/6.3V_4C398 1U/6.3V_4

C325 1U/6.3V_4C325 1U/6.3V_4

C379 10U/6.3VS_6C379 10U/6.3VS_6

C378 10U/6.3VS_6C378 10U/6.3VS_6

C331 10U/6.3VS_6C331 10U/6.3VS_6

C334 10U/6.3VS_6C334 10U/6.3VS_6

C393 10U/6.3VS_6C393 10U/6.3VS_6

C381 10U/6.3VS_6C381 10U/6.3VS_6

C322 *10U/6.3V_6C322 *10U/6.3V_6

C437 10U/6.3V_6C437 10U/6.3V_6

C491 10U/6.3V_6C491 10U/6.3V_6

+SMDDR_VREF_DIMM

+SMDDR_VREF_DQ0

3

C361 1U/6.3V_4C361 1U/6.3V_4

C359 1U/6.3V_4C359 1U/6.3V_4

C384 1U/6.3V_4C384 1U/6.3V_4

C402 1U/6.3V_4C402 1U/6.3V_4

C353 10U/6.3VS_6C353 10U/6.3VS_6

C339 *10U/6.3V_6C339 *10U/6.3V_6

C346 0.1U/10V_4C346 0.1U/10V_4

C345 2.2U/6.3V_6C345 2.2U/6.3V_6

C391 0.1U/10V_4C391 0.1U/10V_4

C394 2.2U/6.3V_6C394 2.2U/6.3V_6

+3V

C399 0.1U/10V_4C399 0.1U/10V_4

C382 2.2U/6.3V_6C382 2.2U/6.3V_6

DDR_VTTREF

SMDDR_VREF_DQ0_M3

DRAMRST_CNTRL_PC H[2,8,13]

2

R220 *0_6R22 0 *0_6

1

2

Q19

Q19
A03416

A03416

R197

R197
1K/F_4

1K/F_4

3

SMDDR_VREF_DQ0_M1

R206

R206
1K/F_4

1K/F_4

DDR_VTTREF[4,13,33]

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

NB5

NB5

NB5

Date: Sheet of

Date: Sheet of

Date: Sheet of

VREF DQ0 M1 SolutionPlace these Caps near So-Dimm0.

+1.5VSUS

R163

R163
1K/F_4

1K/F_4

1

+SMDDR_VREF_DIMM

C343

C343

R167

R167

470P/50V_4

470P/50V_4

1K/F_4

1K/F_4

12 42Monday, October 22, 2012

12 42Monday, October 22, 2012

12 42Monday, October 22, 2012

R168 *0_6R16 8 *0_6

PROJECT :TWD (Chief River)

PROJECT :TWD (Chief River)

PROJECT :TWD (Chief River)

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

System Memory 1/2 (5.2H)

System Memory 1/2 (5.2H)

System Memory 1/2 (5.2H)

A

A

A

5

4

3

2

1

2.48A

+3V

PM_EXTTS#0

+SMDDR_VREF_DQ1

+1.5VSUS

JDIM2B

JDIM2B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM1_H=5.2_RVS

DDR3-DIMM1_H=5.2_RVS

ddr-ddrrk-20401-tp4b-204p-ruv

ddr-ddrrk-20401-tp4b-204p-ruv

DGMK4000028

DGMK4000028

44

VSS16

48

VSS17

49

VSS18

54

VSS19

55

VSS20

60

VSS21

61

VSS22

65

VSS23

66

VSS24

71

VSS25

72

VSS26

127

VSS27

128

VSS28

133

VSS29

134

VSS30

138

VSS31

139

VSS32

144

VSS33

145

VSS34

150

VSS35

151

VSS36

155

VSS37

156

VSS38

161

VSS39

162

VSS40

167

VSS41

168

VSS42

172

VSS43

173

VSS44

178

VSS45

179

VSS46

184

VSS47

185

VSS48

189

VSS49

190

VSS50

195

VSS51

196

VSS52

(204P)

(204P)

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

VTT1
VTT2

GND
GND

203
204

205
206

+0.75V_DDR_VTT

13

JDIM2A

M_B_A[15:0][3]

D D

M_B_BS#0[3]
M_B_BS#1[3]
M_B_BS#2[3]
M_B_CS#0[3]
M_B_CS#1[3]
M_B_CLKP0[3]
M_B_CLKN0[3]
M_B_CLKP1[3]
M_B_CLKN1[3]
M_B_CKE0[3]
M_B_CKE1[3]
M_B_CAS#[3]
M_B_RAS#[3]

R262 10K/F_4R262 10K/F_4
R252 10K/F_4R252 10K/F_4

+3V

C C

B B

M_B_WE#[3]

SMB_RUN_CLK[8,12,28]
SMB_RUN_DAT[8,12,28]

M_B_ODT0[3]
M_B_ODT1[3]

M_B_DQSP[7:0][3]

M_B_DQSN[7:0][3]

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

DIMM1_SA0
DIMM1_SA1

M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7

JDIM2A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

PC2100 DDR3 SDRAM SO-DIMM

12
29
47

64
137
154
171
188

10

27

45

62
135
152
169
186

PC2100 DDR3 SDRAM SO-DIMM

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

DDR3-DIMM1_H=5.2_RVS

DDR3-DIMM1_H=5.2_RVS

ddr-ddrrk-20401-tp4b-204p-ruv

ddr-ddrrk-20401-tp4b-204p-ruv

DGMK4000028

DGMK4000028

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46

(204P)

(204P)

DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

M_B_DQ4

7

M_B_DQ3

15

M_B_DQ2

17

M_B_DQ0

4

M_B_DQ1

6

M_B_DQ6

16

M_B_DQ7

18

M_B_DQ9

21

M_B_DQ13

23

M_B_DQ14

33

M_B_DQ10

35

M_B_DQ8

22

M_B_DQ12

24

M_B_DQ11

34

M_B_DQ15

36

M_B_DQ20

39

M_B_DQ21

41

M_B_DQ18

51

M_B_DQ22

53

M_B_DQ17

40

M_B_DQ16

42

M_B_DQ19

50

M_B_DQ23

52

M_B_DQ25

57

M_B_DQ29

59

M_B_DQ30

67

M_B_DQ31

69

M_B_DQ28

56

M_B_DQ24

58

M_B_DQ26

68

M_B_DQ27

70

M_B_DQ36

129

M_B_DQ37

131

M_B_DQ35

141

M_B_DQ34

143

M_B_DQ33

130

M_B_DQ32

132

M_B_DQ39

140

M_B_DQ38

142

M_B_DQ44

147

M_B_DQ40

149

M_B_DQ42

157

M_B_DQ43

159

M_B_DQ45

146

M_B_DQ41

148

M_B_DQ46

158

M_B_DQ47

160

M_B_DQ49

163

M_B_DQ48

165

M_B_DQ54

175

M_B_DQ55

177

M_B_DQ52

164

M_B_DQ53

166

M_B_DQ50

174

M_B_DQ51

176

M_B_DQ61

181

M_B_DQ56

183

M_B_DQ63

191

M_B_DQ62

193

M_B_DQ57

180

M_B_DQ60

182

M_B_DQ58

192

M_B_DQ59

194

M_B_DQ5

5

M_B_DQ[63:0] [3]

SMDDR_VREF_DQ1_M3[4]

PM_EXTTS#0[12,30]

DDR3_DRAMRST#[2,12]

SMDDR_VREF_DQ1_M1
SMDDR_VREF_DQ1_M3

DDR_VTTREF[4,12,33]

+0.75V_DDR_VTT[12,33,41]

R203 *0_6R20 3 *0_6

+3V[6,7,8,9,10,12,14,18,21,22,23,24,25,27,28,29,30,35,37,39,41]

+1.5VSUS[2,4,12,33,38]

R225 *0_6/SR225 *0_6/S
R210 *0_6R21 0 *0_6

+1.5VSUS

R205

R205
1K/F_4

1K/F_4

+SMDDR_VREF_DIMM 1

R202

R202
1K/F_4

1K/F_4

C436

C436
470P/50V_4

470P/50V_4

+SMDDR_VREF_DIMM 1

1

+1.5VSUS

R236

R236
1K/F_4

1K/F_4

SMDDR_VREF_DQ1_M1DDR_VTTREF

R237

R237
1K/F_4

1K/F_4

A

A

13 42Monday, October 22, 2012

13 42Monday, October 22, 2012

13 42Monday, October 22, 2012

A

Place these Caps near So-Dimm1.

+1.5VSUS

C397 1U/6.3V_4C397 1U/6.3V_4

C487 1U/6.3V_4C487 1U/6.3V_4

C493 1U/6.3V_4C493 1U/6.3V_4

C449 1U/6.3V_4C449 1U/6.3V_4

C506 10U/6.3VS_6C506 10U/6.3VS_6

C432 10U/6.3VS_6C432 10U/6.3VS_6

A A

5

4

C502 10U/6.3VS_6C502 10U/6.3VS_6

C501 10U/6.3VS_6C501 10U/6.3VS_6

C427 10U/6.3VS_6C427 10U/6.3VS_6

C450 10U/6.3VS_6C450 10U/6.3VS_6

C428 *10U/6.3V_6C428 *10U/6.3V_6

C344 10U/6.3V_6C344 10U/6.3V_6

C386 10U/6.3V_6C386 10U/6.3V_6

+0.75V_DDR_VTT

C454 1U/6.3V_4C454 1U/6.3V_4

C467 1U/6.3V_4C467 1U/6.3V_4

C411 1U/6.3V_4C411 1U/6.3V_4

C439 1U/6.3V_4C439 1U/6.3V_4

C367 10U/6.3VS_6C367 10U/6.3VS_6

C372 *10U/6.3V_6C372 *10U/6.3V_6

+3V

C472 0.1U/10V_4C472 0.1U/10V_4

C480 2.2U/6.3V_6C480 2.2U/6.3V_6

3

+SMDDR_VREF_DIMM 1

C435 0.1U/10V_4C435 0.1U/10V_4

C431 2.2U/6.3V_6C431 2.2U/6.3V_6

+SMDDR_VREF_DQ1

C455 0.1U/10V_4C455 0.1U/10V_4

C458 2.2U/6.3V_6C458 2.2U/6.3V_6

2

VREF DQ1 M1 Solution

SMDDR_VREF_DQ1_M3

DRAMRST_CNTRL_PC H[2,8,12]

R221 *0_6R221 *0_6

3

Q21

Q21

2

AO3416

AO3416

PROJECT :TWD (Chief River)

PROJECT :TWD (Chief River)

PROJECT :TWD (Chief River)

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

System Memory 2/2 (9.2H)

System Memory 2/2 (9.2H)

System Memory 2/2 (9.2H)

Date: Sheet of

Date: Sheet of

Date: Sheet of

NB5

NB5

NB5

1