Quanta SWH Optimus(14), 14 [Home] (0139773), 14 [Office] (0135740), 14 [Home] (0144743), 14 [Office] (0152054) Schematic
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3&%67$&.83
/
OPTIMUS
SWH Optimus(14") BLOCK DIAGRAM
27MHz
/$<(5723
A A
/$<(56*1'
/$<(5,1KLJK
/$<(5,1ORZ
/$<(5*1'
/$<(59&&
DDRIII-SODIMM1
PAGE 12
DDRIII-SODIMM2
PAGE 13
/$<(5*1'
/$<(5%27
B B
USB3.0
Port x 2
PAGE 26
VIA USB3.0
Controller
PAGE 26
6$7$+''
DDRIII 800/1066 MT/s
1333MT/s CFD only
DDRIII 800/1066 MT/s
1333MT/s CFD only
PCH_48Mhz
3&,([SUHVV
*HQ;
6$7$0%
DMI*4
PAGE 28
6$7$&'520
6$7$0%
PAGE 28
3/5VPCU RT8205
PAGE 31
PCH +1.05V_VTT (RT8204)
PAGE 32
CPU Core1 (NCP6131S)
C C
CPU Core2 (NCP5911)
PAGE 33
.H\ERDUG
7RXFK3DG
PAGE 29
PAGE 28
32.768KHz
,71&;
PCH_32.768K
/3&
PAGE 34
+VGACORE (RT8208A)
PAGE 30
PAGE 35
DDR3 (RT8207)
PAGE 36
GMT G9931P1U
)$1
PAGE 29
63,
PAGE 30
63,
PAGE 7
Intel Sandy
CPU 35Watt
2 Core
( rPGA 989 )
PAGE 2~5
BCLK133M
DMI100M
DP120M
PCH 3.5Watt
Platform
Controller
Hub
PAGE 6-11
0'&&211
PAGE 28
32.768KHz
3&,([SUHVV
+'0,
&57
/9'6
0,1,2
$]DOLD
;
;
PCI-E
PCH_27Mhz
0LQL3&,(
&DUG
:LUHOHVV/$1
PAGE 27
6,0&DUG
nVIDIA
N12P-GS 1GB
PAGE 14~20
12
%OXH7RRWK86%3RUWV
;
PAGE 27
(40nm)
128 Bit
(29*29)973p
86%
;
/$1
$5
PAGE 25
5-5-
5
:HEFDP
PAGE 22PAGE 26 PAGE 28
25MHz
'XDO/LQN
4
576
PAGE 28
+'0,&21
PAGE 21
&57
PAGE 21
/&'&211
PAGE 22
PAGE 25
Dis-charge IC (G5934)
D D
PAGE 37
VCCSA(ISL62872)
$QDORJ
$/&49%*5
PAGE 23
PAGE 38
352-(&76:+
352-(&76:+
352-(&76:+
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Block Diagram
Block Diagram
Block Diagram
of
of
of
141Tuesday, October 26, 2010
141Tuesday, October 26, 2010
141Tuesday, October 26, 2010
8
1A
1A
1A
1A
1A
1A
Charger (OZ8681)
Optimus Power
PAGE 39
1
2
PAGE 40
3
PAGE 24
$XGLR-DFNVPLFURSKRQH
3KRQH0,&
PAGE 24
4
-DFNWR
6SHDNHU
PAGE 24
5
6
7
5
4
3
2
1
Sandy Bridge Processor (DMI,PEG,FDI) Sandy Bridge Processor (CLK,MISC,JTAG)
U27A
U27A
DMI_TXN0[6]
DMI_TXN1[6]
DMI_TXN2[6]
DMI_TXN3[6]
D D
C C
B B
DMI_TXP0[6]
DMI_TXP1[6]
DMI_TXP2[6]
DMI_TXP3[6]
DMI_RXN0[6]
DMI_RXN1[6]
DMI_RXN2[6]
DMI_RXN3[6]
DMI_RXP0[6]
DMI_RXP1[6]
DMI_RXP2[6]
DMI_RXP3[6]
FDI_TXN0[6]
FDI_TXN1[6]
FDI_TXN2[6]
FDI_TXN3[6]
FDI_TXN4[6]
FDI_TXN5[6]
FDI_TXN6[6]
FDI_TXN7[6]
FDI_TXP0[6]
FDI_TXP1[6]
FDI_TXP2[6]
FDI_TXP3[6]
FDI_TXP4[6]
FDI_TXP5[6]
FDI_TXP6[6]
FDI_TXP7[6]
FDI_FSYNC0[6]
FDI_FSYNC1[6]
FDI_INT[6]
FDI_LSYNC0[6]
FDI_LSYNC1[6]
eDP_COMP
INT_eDP_HPD_Q
eDP_COMP connect to PIN A18 W:4mils/S:15mils/L: 500mils.
eDP_COMP connect to P IN A17 W:12mils/S:15mils/L: 500mils.
FDI disable
B27
DMI_RX#[0]
B25
DMI_RX#[1]
A25
DMI_RX#[2]
B24
DMI_RX#[3]
B28
DMI_RX[0]
B26
DMI_RX[1]
A24
DMI_RX[2]
B23
DMI_RX[3]
G21
DMI_TX#[0]
E22
DMI_TX#[1]
F21
DMI_TX#[2]
D21
DMI_TX#[3]
G22
DMI_TX[0]
D22
DMI_TX[1]
F20
DMI_TX[2]
C21
DMI_TX[3]
A21
FDI0_TX#[0]
H19
FDI0_TX#[1]
E19
FDI0_TX#[2]
F18
FDI0_TX#[3]
B21
FDI1_TX#[0]
C20
FDI1_TX#[1]
D18
FDI1_TX#[2]
E17
FDI1_TX#[3]
A22
FDI0_TX[0]
G19
FDI0_TX[1]
E20
FDI0_TX[2]
G18
FDI0_TX[3]
B20
FDI1_TX[0]
C19
FDI1_TX[1]
D19
FDI1_TX[2]
F17
FDI1_TX[3]
J18
FDI0_FSYNC
J17
FDI1_FSYNC
H20
FDI_INT
J19
FDI0_LSYNC
H17
FDI1_LSYNC
A18
eDP_COMPIO
A17
eDP_ICOMPO
B16
eDP_HPD
C15
eDP_AUX
D15
eDP_AUX#
C17
eDP_TX[0]
F16
eDP_TX[1]
C16
eDP_TX[2]
G15
eDP_TX[3]
C18
eDP_TX#[0]
E16
eDP_TX#[1]
D16
eDP_TX#[2]
F15
eDP_TX#[3]
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000014
DGG^9000014
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
DMI
DMI
Intel(R) FDI
Intel(R) FDI
eDP
eDP
PEG x16 disable (UMA only remove)
(DIS only stuff)
FDI_INT
R454 *0_4R454 *0_4
R455 *0_4R455 *0_4
A A
R453 *0_4R453 *0_4
R456 *1K_4R456 *1K_4
FDI_FSYNC can gang all these 4
signals togeth er and tie them
with only one 1K resistor to GND
(DG V0.5 Ch2.2.9).
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
C_PEG_TX0
C_PEG_TX1
C_PEG_TX2
C_PEG_TX3
C_PEG_TX4
C_PEG_TX5
C_PEG_TX6
C_PEG_TX7
C_PEG_TX8
C_PEG_TX9
C_PEG_TX10
C_PEG_TX11
C_PEG_TX12
C_PEG_TX13
C_PEG_TX14
C_PEG_TX15
0.22uF AC coupling Caps for PCIE GEN1/2/3
5
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PCI EXPRESS* - GRAPHICS
PCI EXPRESS* - GRAPHICS
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
PEG_TX[0..15][17] PEG_TX#[0..15][17]
C623 0.1U/10V_4C623 0.1U/10V_4
C631 0.1U/10V_4C631 0.1U/10V_4
C637 0.1U/10V_4C637 0.1U/10V_4
C647 0.1U/10V_4C647 0.1U/10V_4
C658 0.1U/10V_4C658 0.1U/10V_4
C668 0.1U/10V_4C668 0.1U/10V_4
C670 0.1U/10V_4C670 0.1U/10V_4
C674 0.1U/10V_4C674 0.1U/10V_4
C675 0.1U/10V_4C675 0.1U/10V_4
C678 0.1U/10V_4C678 0.1U/10V_4
C682 0.1U/10V_4C682 0.1U/10V_4
C686 0.1U/10V_4C686 0.1U/10V_4
C691 0.1U/10V_4C691 0.1U/10V_4
C695 0.1U/10V_4C695 0.1U/10V_4
C700 0.1U/10V_4C700 0.1U/10V_4
C701 0.1U/10V_4C701 0.1U/10V_4
PEG_TX0
PEG_TX1
PEG_TX2
PEG_TX3
PEG_TX4
PEG_TX5
PEG_TX6
PEG_TX7
PEG_TX8
PEG_TX9
PEG_TX10
PEG_TX11
PEG_TX12
PEG_TX13
PEG_TX14
PEG_TX15
J22
J21
H22
K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32
J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32
M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25
M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25
PEG_COMP
PEG_RX#0
PEG_RX#1
PEG_RX#2
PEG_RX#3
PEG_RX#4
PEG_RX#5
PEG_RX#6
PEG_RX#7
PEG_RX#8
PEG_RX#9
PEG_RX#10
PEG_RX#11
PEG_RX#12
PEG_RX#13
PEG_RX#14
PEG_RX#15
PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
PEG_RX6
PEG_RX7
PEG_RX8
PEG_RX9
PEG_RX10
PEG_RX11
PEG_RX12
PEG_RX13
PEG_RX14
PEG_RX15
C_PEG_TX#0
C_PEG_TX#1
C_PEG_TX#2
C_PEG_TX#3
C_PEG_TX#4
C_PEG_TX#5
C_PEG_TX#6
C_PEG_TX#7
C_PEG_TX#8
C_PEG_TX#9
C_PEG_TX#10
C_PEG_TX#11
C_PEG_TX#12
C_PEG_TX#13
C_PEG_TX#14
C_PEG_TX#15
C_PEG_TX0
C_PEG_TX1
C_PEG_TX2
C_PEG_TX3
C_PEG_TX4
C_PEG_TX5
C_PEG_TX6
C_PEG_TX7
C_PEG_TX8
C_PEG_TX9
C_PEG_TX10
C_PEG_TX11
C_PEG_TX12
C_PEG_TX13
C_PEG_TX14
C_PEG_TX15
PEG_COMP connect to PIN H22&J22 W:4mils/S:15mils/ L: 500mils.
PEG_COMP connect t o PIN J21 W:12mils/S:15mils/L: 500mils.
PEG_RX[0..15] [17]
CPU RESET#
SM_DRAMPWROK Processor Input. DDR3 DRAM RESET
C_PEG_TX#0
C_PEG_TX#1
C_PEG_TX#2
C_PEG_TX#3
C_PEG_TX#4
C_PEG_TX#5
C_PEG_TX#6
C_PEG_TX#7
C_PEG_TX#8
C_PEG_TX#9
C_PEG_TX#10
C_PEG_TX#11
C_PEG_TX#12
C_PEG_TX#13
C_PEG_TX#14
C_PEG_TX#15
C624 0.1U/10V_4C624 0.1U/10V_4
C626 0.1U/10V_4C626 0.1U/10V_4
C632 0.1U/10V_4C632 0.1U/10V_4
C641 0.1U/10V_4C641 0.1U/10V_4
C650 0.1U/10V_4C650 0.1U/10V_4
C662 0.1U/10V_4C662 0.1U/10V_4
C669 0.1U/10V_4C669 0.1U/10V_4
C671 0.1U/10V_4C671 0.1U/10V_4
C673 0.1U/10V_4C673 0.1U/10V_4
C676 0.1U/10V_4C676 0.1U/10V_4R452 *1K_4R452 *1K_4
C679 0.1U/10V_4C679 0.1U/10V_4
C684 0.1U/10V_4C684 0.1U/10V_4
C690 0.1U/10V_4C690 0.1U/10V_4
C693 0.1U/10V_4C693 0.1U/10V_4
C699 0.1U/10V_4C699 0.1U/10V_4
C706 0.1U/10V_4C706 0.1U/10V_4
0.22uF AC coupling Caps for PCIE GEN1/2/3
4
SNB_IVB# N.A at SNB EDS #27637 0.7v1
H_PROCHOT#[30,33]
U23
U23
GND3OUT
PLTRST#[8,18,25,26,27,30]
2
IN
1
74LVC1G07GW
74LVC1G07GW
R409 *1.5K/F_4R409 *1.5K/F_4
+3VS5 +3VS5
PEG_TX#0
PEG_TX#1
PEG_TX#2
PEG_TX#3
PEG_TX#4
PEG_TX#5
PEG_TX#6
PEG_TX#7
PEG_TX#8
PEG_TX#9
PEG_TX#10
PEG_TX#11
PEG_TX#12
PEG_TX#13
PEG_TX#14
PEG_TX#15
H_SNB_IVB#[7]
SKTOCC#
TP6TP6
TP_CATERR#
Placement close to EC.
EC_PECI[30]
C1016 43P/50V_4C1016 43P/50V_4
PM_THRMTRIP#[9,30]
PM_SYNC[6]
H_PWRGOOD[9]
+1.05V_VTT
CPU_PLTRST# CPU_PLTRST#_R
4
+3VS5
C562
VCC5NC
C562
0.1U/10V_4
0.1U/10V_4
8/24 modify
R199
R199
10K_4
10K_4
PM_DRAM_PWRGD_PU
R198
R198
*0_4
*0_4
PM_DRAM_PWRGD [6]
R139 0_4R139 0_4
8/24 modify
TP5TP5
R419 43_4R419 43_4
R62 56.2/F_4R62 56.2/F_4
R417 0_4R417 0_4
R421 0_4R421 0_4
R415 0_4R415 0_4
R416 10K_4R416 10K_4
R408 75_4R408 75_4
R411 43_4R411 43_4
U11
U11
1
VCC5NC
2
IN
GND3OUT
74LVC1G07GW
74LVC1G07GW
PM_DRAM_PWRGD_C
R140
R140
*3K/F_4
*3K/F_4
H_PECI
H_PROCHOT#_R
PM_THRMTRIP#_R
PM_SYNC_R
H_PWRGOOD_R
PM_DRAM_PWRGD_R
8/24 modify
PM_DRAM_PWRGD_C
4
Embedded Display PLL Clock
3/26 DB change
Ra
Part reference.
RP18
CLK_DPLL_SSCLKP_R
CLK_DPLL_SSCLKN_R
CLK_DPLL_SSCLKP_R
CLK_DPLL_SSCLKN_R
SG/UMA
RP18
4
3
2
1
0_4P2R_4
0_4P2R_4
Rb
R476 *0_4R476 *0_4
Rc
R477 *0_4R477 *0_4
Ra Rb Rc
NCDIS
Stuff Stuff
Stuff
NC NC
3
R414
R414
*750/F_4
*750/F_4
C353
C353
0.1U/10V_4
0.1U/10V_4
3
Q20
Q20
*2N7002
*2N7002
1
CLK_DPLL_SSCLKP [8]
CLK_DPLL_SSCLKN [8]
U27B
U27B
C26
SNB_IVB#
AN34
SKTOCC#
AL33
CATERR#
AN33
PECI
AL32
PROCHOT#
AN32
THERMTRIP#
AM34
PM_SYNC
AP33
UNCOREPWRGOOD
V8
SM_DRAMPWROK
AR33
RESET#
Sandy Brid ge_rPGA_Rev 0p61
Sandy Brid ge_rPGA_Rev 0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000014
DGG^9000014
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
+1.5V_CPU
R185
R185
200/F_4
200/F_4
R141 130/F_4R141 130/F_4
R197
R197
*39_4
*39_4
MAIN_ONG [4,37]
2
A28
BCLK
A27
BCLK#
MISCTHERMALPWR MANAGEMENT
MISCTHERMALPWR MANAGEMENT
PM_DRAM_PWRGD_R
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
CLOCKS
CLOCKS
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
DDR3
MISC
DDR3
MISC
JTAG & BPM
JTAG & BPM
DRAMRST_CNTRL_PCH[8]
DP & PEG Compensation
+1.05V_VTT
+1.05V_VTT
eDP_COMPIO and ICOMPO signals should be shorted
near balls and routed with typical impedance <25 mohms
+1.05V_VTT
PEG_ICOMPI and RCOMPO signals
should be routed within 500 mils typical
impedance = 43 mohms PEG_ICOMPO
signals should be routed within 500 mils
typical impedance = 14.5 mohms
R482 10K_4R482 10K_4
R481 24.9/F_4R481 24.9/F_4
R81 24.9/F_4R81 24.9/F_4
2
INT_eDP_HPD_Q
eDP_COMP
PEG_COMP
A16
A15
R8
AK1
A5
A4
SM_RCOMP[0] W:20mils/S:20mils/L: 500mils,
SM_RCOMP[1] W:20mils/S:20mils/L: 500mils,
SM_RCOMP[2] W:15mils/S:20mils/L: 500mils,
AP29
PRDY#
AP27
PREQ#
AR26
TCK
AR27
TMS
AP30
TRST#
AR28
TDI
AP26
TDO
AL35
DBR#
AT28
BPM#[0]
AR29
BPM#[1]
AR30
BPM#[2]
AT30
BPM#[3]
AP32
BPM#[4]
AR31
BPM#[5]
AT31
BPM#[6]
AR32
BPM#[7]
+1.5VSUS
DDR3_DRAMRST#[12,13]
eDP_HPD can be left as no
connect if entire eDP is
disabled.
CLK_CPU_BCLKP [8]PEG_RX#[0..15] [17]
CLK_CPU_BCLKN [8]
CLK_DPLL_SSCLKP_R
CLK_DPLL_SSCLKN_R
CPU_DRAMRST#
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
XDP_PRDY#
XDP_PREQ#
XDP_TCLK
XDP_TMS
XDP_TRST#
XDP_TDI_R
XDP_TDO
XDP_DBRST#
XDP_BPM0
XDP_BPM1
XDP_BPM2
XDP_BPM3
XDP_BPM4
XDP_BPM5
XDP_BPM6
XDP_BPM7
R72 140/F_4R72 140/F_4
R483 26.1/F_4R483 26.1/F_4
R478 200/F_4R478 200/F_4
R420 *1K_4R420 *1K_4
R97 1K_4R97 1K_4
R106 1K_4R106 1K_4
CPU_DRAMRST#_R
R108 0_4R108 0_4
TP37TP37
TP1TP1
TP47TP47
TP39TP39
TP41TP41
TP2TP2
TP43TP43
XDP_DBRST# [6]
TP46TP46
TP49TP49
TP40TP40
TP38TP38
TP45TP45
TP44TP44
TP48TP48
TP42TP42
R93 *0_4R93 *0_4
3
C301
C301
0.047U/10V_4
0.047U/10V_4
CPU XDP
+3V
Q12
Q12
2
2N7002
2N7002
Processor pull-up (CPU)
H_PROCHOT#
XDP_TDO
XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TCLK
XDP_TRST#
352-(&76:+
352-(&76:+
352-(&76:+
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
SNB 1/4 (PCIE&DMI&FDI)
SNB 1/4 (PCIE&DMI&FDI)
SNB 1/4 (PCIE&DMI&FDI)
1
CPU_DRAMRST#
1
R103
R103
4.99K/F_4
4.99K/F_4
+3V[6,7,8,9,10,12,13,18,21,22,23,24,25,26,27,28,29,30,33,37]
+3VS5[6,7,8,9,10,22,29,30,31,32,35,37,38,40]
+1.05V_VTT[4,6,7,8,10,30,32,33,38,40]
R63 62_4R63 62_4
R413 51_4R413 51_4
R412 51_4R412 51_4
R51 51_4R51 51_4
R50 *51_4R50 *51_4
R46 51_4R46 51_4
R410 51_4R410 51_4
241Tuesday, October 26, 2010
241Tuesday, October 26, 2010
241Tuesday, October 26, 2010
+1.05V_VTT
of
of
of
1A
1A
1A
1A
1A
1A
5
4
3
2
1
Sandy Bridge Processor (DDR3)
U27D
D10
K10
AM5
AM6
AR3
AP3
AN3
AN2
AN1
AP2
AP5
AN9
AT5
AT6
AP6
AN8
AR6
AR5
AR9
AJ11
AT8
AT9
AH11
AR8
AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15
AA9
AA7
AA10
AB8
AB9
J10
C9
A7
C8
A9
A8
D9
D8
G4
F4
F1
G1
G5
F5
F2
G2
J7
J8
K9
J9
K8
K7
M5
N4
N2
N1
M4
N5
M2
M1
R6
U27D
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CAS#
SB_RAS#
SB_WE#
AE2
SB_CLK[0]
AD2
SB_CLK#[0]
R9
SB_CKE[0]
AE1
SB_CLK[1]
AD1
SB_CLK#[1]
R10
SB_CKE[1]
AB2
SB_CLK[2]
AA2
SB_CLK#[2]
T9
SB_CKE[2]
AA1
SB_CLK[3]
AB1
SB_CLK#[3]
T10
SB_CKE[3]
AD3
SB_CS#[0]
AE3
SB_CS#[1]
AD6
SB_CS#[2]
AE6
SB_CS#[3]
AE4
SB_ODT[0]
AD4
SB_ODT[1]
AD5
SB_ODT[2]
AE5
SB_ODT[3]
M_B_DQSN0
D7
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_DQS[7]
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
F3
K6
N3
AN5
AP9
AK12
AP15
C7
G3
J6
M3
AN6
AP8
AK11
AP14
AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7
M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_CLKP0 [13]
M_B_CLKN0 [13]
M_B_CKE0 [13]
M_B_CLKP1 [13]
M_B_CLKN1 [13]
M_B_CKE1 [13]
M_B_CS#0 [13]
M_B_CS#1 [13]
M_B_ODT0 [13]
M_B_ODT1 [13]
M_B_DQSN[7:0] [13]
M_B_DQSP[7:0] [13]
M_B_A[15:0] [13]
U27C
U27C
D D
M_A_DQ[63:0][12]
C C
B B
M_A_BS#0[12]
M_A_BS#1[12]
M_A_BS#2[12]
M_A_CAS#[12]
M_A_RAS#[12]
M_A_WE#[12]
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
G10
N10
M10
AG6
AG5
AK6
AK5
AH5
AH6
AJ5
AJ6
AJ8
AK8
AJ9
AK9
AH8
AH9
AL9
AL8
AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15
AE10
AF10
AE8
AD9
AF9
F10
C5
D5
D3
D2
D6
C6
C2
C3
F8
G9
F9
F7
G8
G7
K4
K5
K1
J1
J5
J4
J2
K2
M8
N8
N7
M9
N9
M7
V6
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_CLK[0]
SA_CLK#[0]
SA_CKE[0]
SA_CLK[1]
SA_CLK#[1]
SA_CKE[1]
SA_CLK[2]
SA_CLK#[2]
SA_CKE[2]
SA_CLK[3]
SA_CLK#[3]
SA_CKE[3]
SA_CS#[0]
SA_CS#[1]
SA_CS#[2]
SA_CS#[3]
SA_ODT[0]
SA_ODT[1]
SA_ODT[2]
SA_ODT[3]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AB6
AA6
V9
AA5
AB5
V10
AB4
AA4
W9
AB3
AA3
W10
AK3
AL3
AG1
AH1
AH3
AG3
AG2
AH2
C4
G6
J3
M6
AL6
AM8
AR12
AM15
D4
F6
K3
N6
AL5
AM9
AR11
AM14
AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_CLKP0 [12]
M_A_CLKN0 [12]
M_A_CKE0 [12]
M_A_CLKP1 [12]
M_A_CLKN1 [12]
M_A_CKE1 [12]
M_A_CS#0 [12]
M_A_CS#1 [12]
M_A_ODT0 [12]
M_A_ODT1 [12]
M_A_DQSN[7:0] [12]
M_A_DQSP[7:0] [12]
M_A_A[15:0] [12]
M_B_DQ[63:0][13]
M_B_BS#0[13]
M_B_BS#1[13]
M_B_BS#2[13]
M_B_CAS#[13]
M_B_RAS#[13]
M_B_WE#[13]
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
Sandy Bridge_r PG A_Re v0p61
Sandy Brid ge_rPGA_Rev 0p61
Sandy Brid ge_rPGA_Rev 0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000014
DGG^9000014
IC SOCKET RPGA 989P(P1.0,M/H3.0)
A A
5
IC SOCKET RPGA 989P(P1.0,M/H3.0)
4
3
Sandy Bridge_r PG A_Re v0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000014
DGG^9000014
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
2
352-(&76:+
352-(&76:+
352-(&76:+
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
SNB 2/4 (DDR3 I/F)
SNB 2/4 (DDR3 I/F)
SNB 2/4 (DDR3 I/F)
1
of
of
of
341Monday, October 25, 2010
341Monday, October 25, 2010
341Monday, October 25, 2010
1A
1A
1A
1A
1A
1A
5
4
3
2
1
Sandy Bridge Processor (POWER) Sandy Bridge Processor (GRAPHIC POWER)
U27G
U27F
U27F
AG35
VCC1
AG34
VCC2
AG33
VCC3
AG32
VCC4
AG31
VCC5
AG30
VCC6
AG29
VCC7
AG28
VCC8
AG27
VCC9
AG26
VCC10
AF35
VCC11
AF34
VCC12
AF33
VCC13
AF32
VCC14
AF31
VCC15
AF30
VCC16
AF29
VCC17
AF28
VCC18
AF27
VCC19
AF26
VCC20
AD35
VCC21
AD34
VCC22
AD33
VCC23
AD32
VCC24
AD31
VCC25
AD30
VCC26
AD29
VCC27
AD28
VCC28
AD27
VCC29
AD26
VCC30
AC35
VCC31
AC34
VCC32
AC33
VCC33
AC32
VCC34
AC31
VCC35
AC30
VCC36
AC29
VCC37
AC28
VCC38
AC27
VCC39
AC26
VCC40
AA35
VCC41
AA34
VCC42
AA33
VCC43
AA32
VCC44
AA31
VCC45
AA30
VCC46
AA29
VCC47
AA28
VCC48
AA27
VCC49
AA26
VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56
Y29
VCC57
Y28
VCC58
Y27
VCC59
Y26
VCC60
V35
VCC61
V34
VCC62
V33
VCC63
V32
VCC64
V31
VCC65
V30
VCC66
V29
VCC67
V28
VCC68
V27
VCC69
V26
VCC70
U35
VCC71
U34
VCC72
U33
VCC73
U32
VCC74
U31
VCC75
U30
VCC76
U29
VCC77
U28
VCC78
U27
VCC79
U26
VCC80
R35
VCC81
R34
VCC82
R33
VCC83
R32
VCC84
R31
VCC85
R30
VCC86
R29
VCC87
R28
VCC88
R27
VCC89
R26
VCC90
P35
VCC91
P34
VCC92
P33
VCC93
P32
VCC94
P31
VCC95
P30
VCC96
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100
Sandy Brid ge_rPGA_Rev 0p61
Sandy Brid ge_rPGA_Rev 0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000014
DGG^9000014
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8
VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24
VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
PEG AND DDR
PEG AND DDR
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39
VCCIO40
CORE SUPPLY
CORE SUPPLY
SENSE LINES SVID
SENSE LINES SVID
VIDALERT#
VIDSCLK
VIDSOUT
VCC_SENSE
VSS_SENSE
VCCIO_SENSE
VSSIO_SENSE
4
AH13
SNB: 8.5A
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12
E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
J23
AJ29
AJ30
AJ28
AJ35
AJ34
B10
A10
C203
C203
22U/6.3VS_8
22U/6.3VS_8
C131
C131
22U/6.3VS_8
22U/6.3VS_8
C218
C218
*22U/6.3VS_8
*22U/6.3VS_8
C610
C610
*22U/6.3VS_8
*22U/6.3VS_8
C652
C652
22U/6.3VS_8
22U/6.3VS_8
C236
C236
*22U/6.3VS_8
*22U/6.3VS_8
C619
C619
*22U/6.3VS_8
*22U/6.3VS_8
22uF_8 x7 Socket TOP cavity
22uF_8 x5 Socket BOT cavity
22uF_8 x2 Socket TOP cavity (no stuff)
22uF_8 x5 Socket BOT cavity (no stuff)
330uF_7343 x2
+1.05V_VTT_40
H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT
VCCP_SENSE
R82 *0_4/SR82 *0_4/S
R65 100_4R65 100_4
R67 100_4R67 100_4
VSSP_SENSE
Trace Route to Po wer IC area.
+1.05V_VTT
C235
C235
22U/6.3VS_8
22U/6.3VS_8
C204
C204
22U/6.3VS_8
22U/6.3VS_8
C150
C150
22U/6.3VS_8
22U/6.3VS_8
C173
C173
*22U/6.3VS_8
*22U/6.3VS_8
5/14 modify
C111
C111
*22U/6.3VS_8
*22U/6.3VS_8
C625
C625
22U/6.3VS_8
22U/6.3VS_8
C636
C636
22U/6.3VS_8
22U/6.3VS_8
+1.05V_VTT
VCC_SENSE [33]
VSS_SENSE [33]
VCCP_SENSE [32]
C666
C666
22U/6.3VS_8
22U/6.3VS_8
C105
C105
22U/6.3VS_8
22U/6.3VS_8
C614
C614
22U/6.3VS_8
22U/6.3VS_8
C189
C189
*22U/6.3VS_8
*22U/6.3VS_8
C116
C116
*22U/6.3VS_8
*22U/6.3VS_8
C139
C139
*22U/6.3VS_8
*22U/6.3VS_8
C217
C217
22U/6.3VS_8
22U/6.3VS_8
+VCC_CORE
VSSP_SENSE [32]
+1.5VSUS[2,10,12,13,36,38,40]
+1.5V_CPU[2]
+1.05V_VTT[2,6,7,8,10,30,32,33,38,40]
+VCC_GFX[33,34]
C79
C79
22U/6.3VS_8
22U/6.3VS_8
C39
C39
22U/6.3VS_8
22U/6.3VS_8
C132
C132
22U/6.3VS_8
22U/6.3VS_8
C613
C613
22U/6.3VS_8
22U/6.3VS_8
C165
C165
22U/6.3VS_8
22U/6.3VS_8
C117
C117
22U/6.3VS_8
22U/6.3VS_8
C206
C206
22U/6.3VS_8
22U/6.3VS_8
C573
C573
22U/6.3VS_8
22U/6.3VS_8
C113
C113
22U/6.3VS_8
22U/6.3VS_8
C601
C601
*22U/6.3VS_8
*22U/6.3VS_8
+VCCSA[37,38]
5
+VCC_CORE
SNB: 55A
C609
C609
D D
22U/6.3VS_8
22U/6.3VS_8
C36
C36
22U/6.3VS_8
22U/6.3VS_8
C616
C616
22U/6.3VS_8
22U/6.3VS_8
C108
C108
22U/6.3VS_8
22U/6.3VS_8
C C
C230
C230
22U/6.3VS_8
22U/6.3VS_8
C190
C190
22U/6.3VS_8
22U/6.3VS_8
C141
C141
22U/6.3VS_8
22U/6.3VS_8
C600
C600
*22U/6.3VS_8
*22U/6.3VS_8
B B
C604
C604
22U/6.3VS_8
22U/6.3VS_8
C598
C598
22U/6.3VS_8
22U/6.3VS_8
22uF_8 x8 Socket TOP cavity
22uF_8 x10 Socket BOT cavity
22uF_8 x8 Socket TOP edge
470uF_7343 x4
A A
C607
C607
22U/6.3VS_8
22U/6.3VS_8
C83
C83
22U/6.3VS_8
22U/6.3VS_8
C599
C599
22U/6.3VS_8
22U/6.3VS_8
C166
C166
22U/6.3VS_8
22U/6.3VS_8
C608
C608
*22U/6.3VS_8
*22U/6.3VS_8
C167
C167
22U/6.3VS_8
22U/6.3VS_8
C123
C123
22U/6.3VS_8
22U/6.3VS_8
C602
C602
*22U/6.3VS_8
*22U/6.3VS_8
C606
C606
22U/6.3VS_8
22U/6.3VS_8
C605
C605
22U/6.3VS_8
22U/6.3VS_8
+VCC_CORE[33,34]
22uF_8 x2 Socket TOP cavity
22uF_8 x2 Socket BOT cavity
22uF_8 x4 Socket TOP edge
22uF_8 x4 Socket BOT edge
470uF_7343 x2
+VCC_GFX
+1.8V
SNB: 1.5A
C712
C712
C708
C708
1U/6.3V_4
1U/6.3V_4
10U/6.3V_8
10U/6.3V_8
330uF x1, 10uF_8 x1, 1uF_4 x2
Socket BOT edge.
Layout note: need routing
together and ALERT need
between CLK and DATA.
H_CPU_SVIDCLK
Place PU resistor
close to CPU
H_CPU_SVIDDAT
Place PU resistor close to CP U
H_CPU_SVIDALRT#
3
SNB: 21.5A
C133
R406 *0_4R406 *0_4
Ra
C133
22U/6.3V_8
22U/6.3V_8
C106
C106
22U/6.3V_8
22U/6.3V_8
C580
C580
22U/6.3V_8
22U/6.3V_8
C138
C138
22U/6.3V_8
22U/6.3V_8
C140
C140
22U/6.3V_8
22U/6.3V_8
C611
C611
22U/6.3V_8
22U/6.3V_8
C581
C581
22U/6.3V_8
22U/6.3V_8
C118
C118
22U/6.3V_8
22U/6.3V_8
C119
C119
22U/6.3V_8
22U/6.3V_8
C107
C107
22U/6.3V_8
22U/6.3V_8
C612
C612
22U/6.3V_8
22U/6.3V_8
C130
C130
22U/6.3V_8
22U/6.3V_8
DISNCSG/UMA
Ra Stuff
C713
C713
1U/6.3V_4
1U/6.3V_4
+1.05V_VTT +1.05V_VTT
+1.05V_VTT
+
+
C709
C709
330U/2V_7343
330U/2V_7343
R74
R74
130/F_4
130/F_4
R71 75_4R71 75_4
R73 43_4R73 43_4
U27G
AT24
VAXG1
AT23
VAXG2
AT21
VAXG3
AT20
VAXG4
AT18
VAXG5
AT17
VAXG6
AR24
VAXG7
AR23
VAXG8
AR21
VAXG9
AR20
VAXG10
AR18
VAXG11
AR17
VAXG12
AP24
VAXG13
AP23
VAXG14
AP21
VAXG15
AP20
VAXG16
AP18
VAXG17
AP17
VAXG18
AN24
VAXG19
AN23
VAXG20
AN21
VAXG21
AN20
VAXG22
AN18
VAXG23
AN17
VAXG24
AM24
VAXG25
AM23
VAXG26
AM21
VAXG27
AM20
VAXG28
AM18
VAXG29
AM17
VAXG30
AL24
VAXG31
AL23
VAXG32
AL21
VAXG33
AL20
VAXG34
AL18
VAXG35
AL17
VAXG36
AK24
VAXG37
AK23
VAXG38
AK21
VAXG39
AK20
VAXG40
AK18
VAXG41
AK17
VAXG42
AJ24
VAXG43
AJ23
VAXG44
AJ21
VAXG45
AJ20
VAXG46
AJ18
VAXG47
AJ17
VAXG48
AH24
VAXG49
AH23
VAXG50
AH21
VAXG51
AH20
VAXG52
AH18
VAXG53
AH17
VAXG54
B6
VCCPLL1
A6
VCCPLL2
A2
VCCPLL3
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000014
DGG^9000014
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
Place PU resistor
close to VR
R70 *54.9/F_4R70 *54.9/F_4
Place PU resistor
R76
R76
close to VR
*130/F_4
*130/F_4
VSSAXG_SENSE
SENSE
LINES
SENSE
LINES
VREFMISC
VREFMISC
GRAPHICS
GRAPHICS
DDR3 -1.5V RAILS
DDR3 -1.5V RAILS
SA RAIL
SA RAIL
VCCSA_SENSE
1.8V RAIL
1.8V RAIL
+1.5V_CPU +1.5V
SVID CLK
+1.05V_VTT
VR_SVID_CLK [33]
SVID DATA
VR_SVID_DATA [33]
SVID ALERT
VR_SVID_ALERT# [33]
2
VAXG_SENSE
SM_VREF
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8
FC_C22
VCCSA_VID1
+
+
R89 0_8R89 0_8
12
AK35
AK34
+VDDR_REF_CPU
AL1
1
R49
R49
100K_4
100K_4
AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1
M27
M26
L26
J26
J25
J24
H26
H25
H23
C22
C24
C187
C187
10U/6.3V_6
10U/6.3V_6
C134
C134
10U/6.3V_6
10U/6.3V_6
C234
C234
10U/6.3V_8
10U/6.3V_8
VCCUSA_SENSE_R
H_FC_C22
40mile routing
JP1
JP1
*SOLDERJUMPER-2
*SOLDERJUMPER-2
12
Q10
Q10
AON7410
AON7410
5 2
C574
C574
*330U_2.5V_5.0x5.9_ESR10m
*330U_2.5V_5.0x5.9_ESR10m
4
MAIND
C229
C229
*470P/50V_4
*470P/50V_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
R68 100_4R68 100_4
R66 100_4R66 100_4
CAD Note: +VDDR_REF_CPU should
have 10 mil trace width
R55 *0_8R55 *0_8
Q8
2N7002Q82N7002
2
MAIND
C146
C146
10U/6.3V_8
10U/6.3V_8
C114
C114
10U/6.3V_6
10U/6.3V_6
+VCC_GFX
VCC_AXG_SENSE [33]
VSS_AXG_SENSE [33]
DDR_VTTREF [12,13,36]
3
MAIND [37]
SNB: 5A
+1.5V_CPU
C109
C109
10U/6.3V_6
10U/6.3V_6
C145
C145
10U/6.3V_6
10U/6.3V_6
10uF_8 x6 Socket BOT edge.
+VCCSA
SNB: 6A
C707
C707
10U/6.3V_8
10U/6.3V_8
330uF x1, 10uF_8 x1 Socket BO T edge,
10uF_8 x2 Socket BOT cavity.
R475 0_4R475 0_4
R480 10K_4R480 10K_4
R479 10K_4R479 10K_4
C667
C667
10U/6.3V_8
10U/6.3V_8
VCCUSA_SENSE [38]
VCCSA_SEL [38]
C711
C711
*10U/6.3V_8
*10U/6.3V_8
Add for intel CRB
+1.5V_CPU+1.5VSUS
C164 0.1U/10V_4C164 0.1U/10V_4
C172 0.1U/10V_4C172 0.1U/10V_4
C186 0.1U/10V_4C186 0.1U/10V_4
R83
R83
1
220_8
220_8
3
352-(&76:+
352-(&76:+
352-(&76:+
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
SNB 3/4 (POWER)
SNB 3/4 (POWER)
SNB 3/4 (POWER)
C147 0.1U/10V_4C147 0.1U/10V_4
3
add for Intel.
Placement close to CPU.
2
Q11
Q11
2N7002
2N7002
1
1
MAIN_ONG [2,37]
CPU VDDQ
441Monday, October 25, 2010
441Monday, October 25, 2010
441Monday, October 25, 2010
+1.5VSUS
of
of
of
1A
1A
1A
1A
1A
1A
5
4
3
2
1
Sandy Bridge Processor (GND)
U27I
M34
H33
H30
H27
H24
H21
H18
H15
H13
H10
G35
G32
G29
G26
G23
G20
G17
G11
U27I
T35
VSS161
T34
VSS162
T33
VSS163
T32
VSS164
T31
VSS165
T30
VSS166
T29
VSS167
T28
VSS168
T27
VSS169
T26
VSS170
P9
VSS171
P8
VSS172
P6
VSS173
P5
VSS174
P3
VSS175
P2
VSS176
N35
VSS177
N34
VSS178
N33
VSS179
N32
VSS180
N31
VSS181
N30
VSS182
N29
VSS183
N28
VSS184
N27
VSS185
N26
VSS186
VSS187
L33
VSS188
L30
VSS189
L27
VSS190
L9
VSS191
L8
VSS192
L6
VSS193
L5
VSS194
L4
VSS195
L3
VSS196
L2
VSS197
L1
VSS198
K35
VSS199
K32
VSS200
K29
VSS201
K26
VSS202
J34
VSS203
J31
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
H9
VSS214
H8
VSS215
H7
VSS216
H6
VSS217
H5
VSS218
H4
VSS219
H3
VSS220
H2
VSS221
H1
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
F34
VSS231
F31
VSS232
F29
VSS233
VSS
VSS
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3
SMDDR_VREF_DQ0_M3[12]
SMDDR_VREF_DQ1_M3[13]
8/16 modify for power IC change
U27H
U27H
AT35
VSS1
AT32
VSS2
AT29
VSS3
AT27
VSS4
AT25
VSS5
AT22
VSS6
AT19
D D
C C
B B
AT16
AT13
AT10
AR25
AR22
AR19
AR16
AR13
AR10
AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10
AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10
AM29
AM25
AM22
AM19
AM16
AM13
AM10
AM7
AM4
AM3
AM2
AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10
AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10
AJ25
AT7
AT4
AT3
AR7
AR4
AR2
AP7
AP4
AP1
AN7
AN4
AL7
AL4
AL2
AK7
AK4
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS
VSS
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH26
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2
Sandy Bridge Processor (RESERVED, CFG)
U27E
U27E
For CPU debug.
TP4TP4
TP7TP7
TP3TP3
R121
R121
*1K_4
*1K_4
H_VTTVID1[32]
CFG0
CFG2
CFG4
CFG5
CFG6
CFG7CFG7
R88
R88
*1K_4
*1K_4
H_VTTVID1
AK28
CFG[0]
AK29
CFG[1]
AL26
CFG[2]
AL27
CFG[3]
AK26
CFG[4]
AL29
CFG[5]
AL30
CFG[6]
AM31
CFG[7]
AM32
CFG[8]
AM30
CFG[9]
AM28
CFG[10]
AM26
CFG[11]
AN28
CFG[12]
AN31
CFG[13]
AN26
CFG[14]
AM27
CFG[15]
AK31
CFG[16]
AN29
CFG[17]
AJ31
RSVD1
AH31
RSVD2
AJ33
RSVD3
AH33
RSVD4
AJ26
RSVD5
B4
RSVD6
D1
RSVD7
F25
RSVD8
F24
RSVD9
F23
RSVD10
D24
RSVD11
G25
RSVD12
G24
RSVD13
E23
RSVD14
D23
RSVD15
C30
RSVD16
A31
RSVD17
B30
RSVD18
B29
RSVD19
D30
RSVD20
B31
RSVD21
A30
RSVD22
C29
RSVD23
J20
RSVD24
B18
RSVD25
A19
RSVD26
J15
RSVD27
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000014
DGG^9000014
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
RESERVED
RESERVED
L7
RSVD28
AG7
RSVD29
AE7
RSVD30
AK2
RSVD31
W8
RSVD32
AT26
RSVD33
AM33
RSVD34
AJ27
RSVD35
T8
RSVD37
J16
RSVD38
H16
RSVD39
G16
RSVD40
AR35
RSVD41
AT34
RSVD42
AT33
RSVD43
AP35
RSVD44
AR34
RSVD45
B34
RSVD46
A33
RSVD47
A34
RSVD48
B35
RSVD49
C35
RSVD50
AJ32
RSVD51
AK32
RSVD52
AH27
RSVD53
AN35
RSVD54
AM35
RSVD55
#27636 SNB EDS0.7v1 no function.
AT2
RSVD56
AT1
RSVD57
AR1
RSVD58
For rPGA socket, RSVD59 pin should be left NC.
B1
KEY
TP50TP50
TP51TP51
Sandy Bridge_rPGA_Rev0p61
Sandy Brid ge_rPGA_Rev 0p61
Sandy Brid ge_rPGA_Rev 0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000014
DGG^9000014
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
Processor Strapping
The CFG signals have a default value of '1' if not terminated on the board.
10
A A
CFG2
(PEG Static Lane Reversal)
CFG4
(DP Presence Strap)
CFG7
(PEG Defer Training)
5
Normal Operation Lane Rev ersed
Disable; No physical DP attached to eDP
PEG train immediately following
xxRESETB de assertion
Sandy Bridge_rPGA_Rev0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000014
DGG^9000014
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
4
Enable; An ext DP device is connected to eDP
PEG wait for BIOS training
CFG[6:5] (PCIE Port Bifurcation S trap s)
11: (Default) x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
CFG2
R52 1K_4R52 1K_4
CFG4
R53 *1K_4R53 *1K_4
CFG7
R61 *1K_4R61 *1K_4
CFG5
R59 *1K_4R59 *1K_4
CFG6
R57 *1K_4R57 *1K_4
3
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
352-(&76:+
352-(&76:+
352-(&76:+
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
SNB 4/4 (GND)
SNB 4/4 (GND)
SNB 4/4 (GND)
1
1A
1A
1A
1A
1A
1A
of
of
of
541Monday, October 25, 2010
541Monday, October 25, 2010
541Monday, October 25, 2010
5
4
3
2
1
Cougar Point (DMI,FDI,PM)
U33C
U33C
DMI_RXN0[2]
DMI_RXN1[2]
DMI_RXN2[2]
DMI_RXN3[2]
DMI_RXP0[2]
+1.05V_VTT
DMI_RXP1[2]
DMI_RXP2[2]
DMI_RXP3[2]
DMI_TXN0[2]
DMI_TXN1[2]
DMI_TXN2[2]
DMI_TXN3[2]
DMI_TXP0[2]
DMI_TXP1[2]
DMI_TXP2[2]
DMI_TXP3[2]
R590 49.9/F_4R590 49.9/F_4
R588 750/F_4R588 750/F_4
R564 0_4R564 0_4
R205 0_4R205 0_4
R200 *0_4R200 *0_4
R194 0_4R194 0_4
R195 0_4R195 0_4
R565 0_4R565 0_4
R244 0_4R244 0_4
R246 *0_4R246 *0_4
8/24 modify
DMI_COMP
DMI_RBIAS
SUSACK#_RSUS_PWR_ACK_R
XDP_DBRST#
SYS_PWROK_R
EC_PWROK_R
APWROK_R
PM_DRAM_PWRGD
RSMRST#
SUS_PWR_ACK_R
DNBSWON#_R
AC_PRESENT_R
PM_BATLOW#
PM_RI#
D D
C C
B B
XDP_DBRST#[2]
SYS_PWROK
EC_PWROK[30]
EC_PWROK_R
PM_DRAM_PWRGD[2]
RSMRST#[30]
SUS_PWR_ACK[30]
DNBSWON#[30]
AC_PRESENT[30]
BC24
DMI0RXN
BE20
DMI1RXN
BG18
DMI2RXN
BG20
DMI3RXN
BE24
DMI0RXP
BC20
DMI1RXP
BJ18
DMI2RXP
BJ20
DMI3RXP
AW24
DMI0TXN
AW20
DMI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
(+3VS5)
K16
SUSWARN#/SUSPWRDNACK/GPIO30
E20
PWRBTN#
(DSW)
H20
ACPRESENT / GPIO31
(+3VS5)
E10
BATLOW# / GP IO72
A10
RI#
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QNDL0T00
AJ0QNDL0T00
IC CTRL(989P)COUGARPOINT QNDL
IC CTRL(989P)COUGARPOINT QNDL
DMI
FDI
DMI
FDI
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVRMEN
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
System Power Management
System Power Management
SLP_LAN# / GPIO29
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
FDI_INT
DPWROK
WAKE#
(+3V)
(+3VS5)
(+3VS5)
(+3VS5)
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
PMSYNCH
(+3VS5)
BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9
BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9
AW16
AV12
BC10
AV14
BB10
A18
E22
B9
N3
G8
N14
D10
H4
F4
G10
G16
AP14
K14
DSWVREN
DPWROK
PCIE_WAKE#
CLKRUN#
PCH_SUSCLK_L
R168 0_4R168 0_4
R551 0_4R551 0_4
TP20TP20
TP23TP23
SLP_LAN#
FDI_TXN0 [2]
FDI_TXN1 [2]
FDI_TXN2 [2]
FDI_TXN3 [2]
FDI_TXN4 [2]
FDI_TXN5 [2]
FDI_TXN6 [2]
FDI_TXN7 [2]
FDI_TXP0 [2]
FDI_TXP1 [2]
FDI_TXP2 [2]
FDI_TXP3 [2]
FDI_TXP4 [2]
FDI_TXP5 [2]
FDI_TXP6 [2]
FDI_TXP7 [2]
FDI_INT [2]
FDI_FSYNC0 [2]
FDI_FSYNC1 [2]
FDI_LSYNC0 [2]
FDI_LSYNC1 [2]
R240 0_4R240 0_4
PCIE_WAKE# [25,26]
CLKRUN# [30]
TP15TP15
R552 0_4R552 0_4
SLP_S5 [30]
SUSC# [30]
SUSB# [30]
PM_SYNC [2]
RSMRST#
PCH_SUSCLK [30]
TP60TP60
LVDS_BLON[22]
DISP_ON[22]
DPST_PWM[22]
PCH_EDIDCLK[22]
PCH_EDIDDATA[22]
LA_CLK#[22]
LA_CLK[22]
LA_DATAN0[22]
LA_DATAN1[22]
LA_DATAN2[22]
LA_DATAP0[22]
LA_DATAP1[22]
LA_DATAP2[22]
LB_CLK#[22]
LB_CLK[22]
LB_DATAN0[22]
LB_DATAN1[22]
LB_DATAN2[22]
LB_DATAP0[22]
LB_DATAP1[22]
LB_DATAP2[22]
CRT_B[21]
CRT_G[21]
CRT_R[21]
DDCCLK[21]
DDCDATA[21]
PCH_EDIDCLK
PCH_EDIDDATA
CTRL_CLK
CTRL_DATA
LVD_IBG
LA_CLK#
LA_CLK
LA_DATAN0
LA_DATAN1
LA_DATAN2
LA_DATAP0
LA_DATAP1
LA_DATAP2
LB_CLK#
LB_CLK
LB_DATAN0
LB_DATAN1
LB_DATAN2
LB_DATAP0
LB_DATAP1
LB_DATAP2
R637 0_4R637 0_4
R636 0_4R636 0_4
R635 0_4R635 0_4
R314 0_4R314 0_4
R313 0_4R313 0_4
PCH_HSYNC_R
PCH_VSYNC_R
PCH_DDCCLK
PCH_DDCDATA
Cougar Point (LVDS,DDI)
U33D
U33D
J47
L_BKLTEN
M45
L_VDD_EN
P45
L_BKLTCTL
T40
L_DDC_CLK
K47
L_DDC_DATA
T45
L_CTRL_CLK
P39
L_CTRL_DATA
AF37
LVD_IBG
AF36
T4T4
PCH_CRT_B
PCH_CRT_G
PCH_CRT_R
DAC_IREF
R283
R283
1K/F_4
1K/F_4
LVD_VBG
AE48
LVD_VREFH
AE47
LVD_VREFL
AK39
LVDSA_CLK#
AK40
LVDSA_CLK
AN48
LVDSA_DATA#0
AM47
LVDSA_DATA#1
AK47
LVDSA_DATA#2
AJ48
LVDSA_DATA#3
AN47
LVDSA_DATA0
AM49
LVDSA_DATA1
AK49
LVDSA_DATA2
AJ47
LVDSA_DATA3
AF40
LVDSB_CLK#
AF39
LVDSB_CLK
AH45
LVDSB_DATA#0
AH47
LVDSB_DATA#1
AF49
LVDSB_DATA#2
AF45
LVDSB_DATA#3
AH43
LVDSB_DATA0
AH49
LVDSB_DATA1
AF47
LVDSB_DATA2
AF43
LVDSB_DATA3
N48
CRT_BLUE
P49
CRT_GREEN
T49
CRT_RED
T39
CRT_DDC_CLK
M40
CRT_DDC_DATA
M47
CRT_HSYNC
M49
CRT_VSYNC
T43
DAC_IREF
T42
CRT_IRTN
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QNDL0T00
AJ0QNDL0T00
IC CTRL(989P)COUGARPOINT QNDL
IC CTRL(989P)COUGARPOINT QNDL
LVDS
LVDS
Digital Display Interface
Digital Display Interface
CRT
CRT
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_INTN
SDVO_INTP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
AP43
AP45
AM42
AM40
AP39
AP40
P38
M39
AT49
AT47
AT40
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
P46
P42
AP47
AP49
AT38
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
M43
M36
AT45
AT43
BH41
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
SDVO_CLK_L
SDVO_DATA_L
DPB_HPD_Q
DPB_LANE0_N
DPB_LANE0_P
DPB_LANE1_N
DPB_LANE1_P
DPB_LANE2_N
DPB_LANE2_P
DPB_LANE3_N
DPB_LANE3_P
+3V_DSW[7]
+1.05V_VTT[2,4,7,8,10,30,32,33,38,40]
+3VS5[2,7,8,9,10,22,29,30,31,32,35,37,38,40]
+3V_RTC[7,10,30]
INT. HDMI
+3V[2,7,8,9,10,12,13,18,21,22,23,24,25,26,27,28,29,30,33,37]
PCH Pull-high/low(CLG)
PM_RI#
PM_BATLOW#
PCIE_WAKE#
SLP_LAN#
SUS_PWR_ACK
AC_PRESENT_R
A A
CLKRUN#
XDP_DBRST#
RSMRST#
SYS_PWROK
R562 10K_4R562 10K_4
R560 *10K_4R560 *10K_4
R216 *10K_4R216 *10K_4
R563 10K_4R563 10K_4
R249 10K_4R249 10K_4
R540 8.2K_4R540 8.2K_4
R521 10K_4R521 10K_4
R522 *1K_4R522 *1K_4
R241 10K_4R241 10K_4
R202 *10K_4R202 *10K_4
+3VS5 +3VS5+3VS5
+3V
5
INT LVDS & CRT disable
(DIS only remove)
R317 2.2K_4R317 2.2K_4
+3V
R316 2.2K_4R316 2.2K_4R201 *8.2K_4R201 *8.2K_4
R272 2.37K/F_4R272 2.37K/F_4
HSYNC_COM[21]
VSYNC_COM[21]
R624 33_4R624 33_4
R623 33_4R623 33_4
PD Res place close to PCH
PCH to Res routeing 50 ohm Impedance.
Res to connector filter routeing 37.5ohm Impedance.
R622 150/F_4R622 150/F_4
R621 150/F_4R621 150/F_4
R620 150/F_4R620 150/F_4
CTRL_CLK
CTRL_DATA
LVD_IBG
PCH_HSYNC_R
PCH_VSYNC_R
PCH_CRT_B
PCH_CRT_G
PCH_CRT_R
4
DPB_LANE0_N
DPB_LANE0_P
DPB_LANE1_N
DPB_LANE1_P
DPB_LANE2_N
DPB_LANE2_P
DPB_LANE3_N
DPB_LANE3_P
SDVO_CLK_L
SDVO_DATA_L
IN_D2# [21]
IN_D2 [21]
IN_D1# [21]
IN_D1 [21]
IN_D0# [21]
IN_D0 [21]
IN_CLK# [21]
IN_CLK [21]
SDVO_CLK [21]
SDVO_DATA [21]
INT HDMI Detect Function
DPB_HPD_Q
HDMI_HPD_CON [21]
3
System PWR_OK(CLG)
C354 *0.1U/10V_4C354 *0.1U/10V_4
8/24 modify
SYS_PWROK
+3V_RTC
4
U10
U10
*TC7SH08FU
*TC7SH08FU
R193 0_4R193 0_4
R583 330K_4R583 330K_4
2
1
3 5
DSWVREN
On Die DSW VR Enable
High = Enable (Default)
Low = Disable
EC_PWROK
R582 *330K_4R582 *330K_4
IMVP_PWRGD [33]
R158
R158
100K_4
100K_4
2
DPWROK FOR DSWINT HDMI disable (DIS only remove)
+3VS5
+3VS5
+3V_DSW
D32
D32
*RB500V-40
*RB500V-40
Q48
Q48
*PDTC144EU
*PDTC144EU
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
R570
R570
R572
R572
*10K_4
*10K_4
*10K_4
*10K_4
3
2
352-(&76:+
352-(&76:+
352-(&76:+
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
2
Q47
1 3
PCH 1/6 (DMI/FDI/VIDEO)
PCH 1/6 (DMI/FDI/VIDEO)
PCH 1/6 (DMI/FDI/VIDEO)
Q47
*2N7002
*2N7002
1
1
DPWROK
C738
C738
*0.1U/10V_4
*0.1U/10V_4
add cap to
timing tune
of
of
of
641Monday, October 25, 2010
641Monday, October 25, 2010
641Monday, October 25, 2010
1A
1A
1A
1A
1A
1A
5
4
3
2
1
Cougar Point (HDA,JTAG,SATA)
U33A
RTC_X1
RTC_X2
RTC_RST#
SRTC_RST#
R225 1M_4R225 1M_4
D D
C C
B B
+3V_RTC
SPKR[23]
ACZ_SDIN0[23]
TP56TP56
TP13TP13
TP14TP14
TP59TP59
PCH_SPI_CLK[30]
PCH_SPI_CS0#[30]
R517 *10K_4R517 *10K_4
+3VS5
PCH_SPI_SI[30]
PCH_SPI_SO[30]
PCH Strap Table
Pin Name Strap description Sampled Co nfiguration
SPKR
Different from
Calpella
SM_INTRUDER#
PCH_INVRMEN
ACZ_BCLK
ACZ_SYNC
SPKR
ACZ_RST#
ACZ_SDIN1
ACZ_SDOUT
GPIO33
SMI#[26]
PCH_JTAG_TCK_R
PCH_JTAG_TMS
PCH_JTAG_TDI_R
PCH_JTAG_TDO_R
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_CS1#
PCH_SPI_SI
PCH_SPI_SO
No reboot mode setting PWROK
GNT3# / GPIO55 Top-Block Swap Override
INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up
Flash Descriptor Security
HDA_DOCK_EN#/GPIO33
GNT1# / GPIO51
GPIO19
Different from
Calpella
GNT2# / GPIO53
NV_ALE
NV_CLE
A A
HDA_SYNC On-Die PLL VR Voltage Select RSMRST
Only for Interposer
Boot BIOS Selection 1 [bit-1]
Boot BIOS Selection 0 [bit-0]
ESI strap (Server only)
Intel Anti-Theft HDD protect ion
Only for Interposer
DMI Termination voltage
HDA_SDO PWROKFlash Descriptor Security
GPIO8
GPIO28
Different from
Calpella
Integrated Clock Chip Enable Should be pull-down (weak pull-up 20K)RSMRST#
On-die PLL Voltage Regulator RSMRST#
SPI_MOSI iTPM function Disable APWROK
5
U33A
A20
RTCX1
C20
RTCX2
D20
RTCRST#
G22
SRTCRST#
K22
INTRUDER#
C17
INTVRMEN
N34
HDA_BCLK
L34
HDA_SYNC
T10
SPKR
K34
HDA_RST#
E34
HDA_SDIN0
G34
HDA_SDIN1
C34
HDA_SDIN2
A34
HDA_SDIN3
A36
HDA_SDO
(+3V)
C36
HDA_DOCK_EN# / GPIO33
(+3VS5)
N32
HDA_DOCK_RST# / GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK
Y14
SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QNDL0T00
AJ0QNDL0T00
IC CTRL(989P)COUGARPOINT QNDL
IC CTRL(989P)COUGARPOINT QNDL
PWROK
PWROK
PWROK
PWROK
PWROK
PWROK 0 = Disable (Internal pull-down 20kohm)
PWROK
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
LPC
LPC
FWH4 / LFRAME#
RTCIHDA
RTCIHDA
SPI JTAG
SPI JTAG
LDRQ0#
LDRQ1# / GPIO23
(+3V)
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA 6G
SATA 6G
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA
SATA
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3RCOMPO
SATA3COMPI
SATA3RBIAS
SATALED#
(+3V)
SATA0GP / GPIO21
(+3V)
SATA1GP / GPIO19
0 = Default (weak pull-down 20K)
1 = Setting to No-Reboot mode
0 = "top-block swap" mode
1 = Default (weak pull-up 20K)
0 = Override
1 = Default (weak pull-up 20K)
GNT0#GNT1#
11
00
Should not be pull-down
(weak pull-up 20K)
weak pull-down 20kohm
0 = Support by 1.8V (weak pull-down)
1 = Support by 1.5V
0 = Override
1 = Default (weak pull-up 20K)
0 = Disable
1 = Enable (Default)
0 = Default (weak pull-down 20K)
1 = Enable
4
C38
A38
B37
C37
D36
PCH_DRQ#0
E36
PCH_DRQ#1
K36
SERIRQ
V5
AM3
AM1
AP7
AP5
AM10
AM8
AP11
AP10
AD7
AD5
AH5
AH4
DG recommended that AC coupling capacitors should be
AB8
close to the connector (<100 mils) for optimal signal quality.
AB10
AF3
AF1
Y7
Y5
AD3
AD1
Y3
Y1
AB3
AB1
Y11
SATA_COMP
Y10
AB12
SATA3_COMP
AB13
SATA3_RBIAS
AH1
P3
DGT_STOP#
V14
BBS_BIT0
P1
Boot Location
SPI
LPC
LAD0 [27,30]
LAD1 [27,30]
LAD2 [27,30]
LAD3 [27,30]
LFRAME# [27,30]
TP24TP24
TP25TP25
R175 8.2K_4R175 8.2K_4
SERIRQ [30]
SATA_RXN0_C [28]
SATA_RXP0_C [28]
SATA_TXN0 [28]
SATA_TXP0 [28]
SATA_RXN1_C [28]
SATA_RXP1_C [28]
SATA_TXN1 [28]
SATA_TXP1 [28]
R191 37.4/F_4R191 37.4/F_4
R192 49.9/F_4R192 49.9/F_4
R542 750/F_4R542 750/F_4
R539 10K_4R539 10K_4
R164 10K_4R164 10K_4
+3V
+3V
+3V
SPKR
R617 *1K_4R617 *1K_4
R627 10K_4R627 10K_4
PCH_INVRMEN
GPIO33
[Need external pull-down for LPC BIOS]
Default weak pull-up on GNT 0/1#
USE GPIO PIN
+1.8V
R533 2.2K_4R533 2.2K_4
+1.8V
8/24 modify
+3VS5
GPIO33_E[30]
PCH_SPI_SI
+3V
HDD0 (SATA3 6.0Gb/s)
ODD (SATA3 6.0Gb/s)
+1.05V_VTT
SATA_LED# [29]
Circuit
R174 *1K_4R174 *1K_4
R581 330K_4R581 330K_4
R597 *1K_4R597 *1K_4
R518 *1K_4R518 *1K_4
R615 *1K_4R615 *1K_4
R190 *1K_4R190 *1K_4
R277 1K_4R277 1K_4
ACZ_SDOUT
R561 *1K_4R561 *1K_4
R157 *1K_4R157 *1K_4
R251 1K_4R251 1K_4
3
+3V
PCI_GNT3# [8]
+3V_RTC
8/24 modify
R553 4.7K_4R553 4.7K_4
R598 *1K_4R598 *1K_4
+3V
GPIO33_E [30]
BBS_BIT0
BBS_BIT1 [8]
NV_ALE [8]
ACZ_SYNC
ICC_EN# [9]
PLL_ODVR_EN [9]
NV_CLE [8]
H_SNB_IVB# [2]
+V3.3A_1.5A_HDA_IO
N.A at CPT EDS 0.7
RTC Circuitry(RTC)
R348 *0_6R348 *0_6
+3V_DSW
+3VPCU_EC
ACZ_SDOUT_AUDIO[23]
Del MDC 10/20
ACZ_SYNC_AUDIO[23]
Vender
EON
Winbond
Socket
R349 0_6R349 0_6
+3V_RTC_0
R339 1K_4R339 1K_4
12
CN8
CN8
BAT_CONN
BAT_CONN
RTC Power trace width 20mil s.
HDA Bus(CLG)
BIT_CLK_AUDIO[23]
ACZ_RST#_AUDIO[23]
+5V
Size
4MB
4MB
R273 33_4R273 33_4
R274 33_4R274 33_4
R601 33_4R601 33_4
R605 10K_4R605 10K_4
R613 33_4R613 33_4
P/N
AKE39FN0Q00 (EN25F32-100HIP)
AKE391P0N00 (W25Q32BVSSIG)
DG008000031
PCH_SPI_CS0#
PCH_SPI_CLK
PCH_SPI_SI PCH_SPI1_SI_R
PCH_SPI_SO
2
R250 0_4R250 0_4
R255 0_4R255 0_4
R288 0_4R288 0_4
+3V
RTC Clock 32.768KHz
C763 18P/50V_4C763 18P/50V_4
C761 18P/50V_4C761 18P/50V_4
30mils
+3V_RTC
FOR DSW
+3V_RTC_2
+3V_RTC_1
D23
D23
BAT54C
BAT54C
ACZ_BCLK
ACZ_RST#
ACZ_SDOUT
2
2N7002K
2N7002K
Q49
Q49
1
R658
R658
1M_4
1M_4
R289 3.3K_4R289 3.3K_4
ACZ_SYNC
3
PCH_SPI1_CLK_R
PCH_SPI1_SO_R
C390
C390
*22P/50V_4
*22P/50V_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
23
4 1
R357
R357
20K/F_4
20K/F_4
R362
R362
20K/F_4
20K/F_4
C503
C503
1U/6.3V_4
1U/6.3V_4
Y5
Y5
32.768KHZ
32.768KHZ
RTC_X1
R589
R589
10M_4
10M_4
RTC_X2
C506
C506
1U/6.3V_4
1U/6.3V_4
C517
C517
1U/6.3V_4
1U/6.3V_4
R358 *0_4R358 *0_4
12
J1
J1
*SOLDERJUMPER-2
*SOLDERJUMPER-2
12
J2
J2
*SOLDERJUMPER-2
*SOLDERJUMPER-2
SRTC_RST#RTC_RST#
PCH JTAG Debug(CLG)
+3VS5
R143
R143
R145
R145
R524
*210/F_4
*210/F_4
R170
R170
*100/F_4
*100/F_4
R524
*210/F_4
*210/F_4
PCH_JTAG_TMS
PCH_JTAG_TDI_R
PCH_JTAG_TDO_R
R549
R549
*100/F_4
*100/F_4
*210/F_4
*210/F_4
R167
R167
*100/F_4
*100/F_4
PCH SPI ROM(CLG)
U12
U12
1
CE#
6
SCK
5
SI
2
SO
3
WP#
*FLASH 4M
*FLASH 4M
352-(&76:+
352-(&76:+
352-(&76:+
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
8
VDD
R265 3.3K_4R265 3.3K_4
7
HOLD#
4
VSS
PCH 2/6 (SATA/HDA/SPI)
PCH 2/6 (SATA/HDA/SPI)
PCH 2/6 (SATA/HDA/SPI)
0.1U/10V_4
0.1U/10V_4
+V3.3A_1.5A_HDA_IO[10]
1
C407
C407
+3V_DSW[6]
+3V_RTC[6,10,30]
+1.05V_VTT[2,4,6,8,10,30,32,33,38,40]
741Monday, October 25, 2010
741Monday, October 25, 2010
741Monday, October 25, 2010
RTC_RST#
SRTC_RST#
PCH_JTAG_TCK_R
R547
R547
*51_4
*51_4
+3V
+3V[2,6,8,9,10,12,13,18,21,22,23,24,25,26,27,28,29,30,33,37]
+1.8V[4,10,32]
of
of
of
1A
1A
1A
1A
1A
1A
5
Cougar Point-M (PCI,USB,NVRAM)
U33E
U33E
PCI/USBOC# Pull-up(CLG)
PCI_PIRQA#
R287 8.2K_4R287 8.2K_4
PCI_PIRQB#
R294 8.2K_4R294 8.2K_4
PCI_PIRQC#
R302 8.2K_4R302 8.2K_4
PCI_PIRQD#
USB_OC4#
USB_OC1#
USB_OC5#
USB_OC2#
R304 8.2K_4R304 8.2K_4
+3V
RP20
RP20
10
9
8
7 4
10K_10P8R_6
10K_10P8R_6
+3VS5
RP19
RP19
10
9
8
7 4
10K_10P8R_6
10K_10P8R_6
D D
MPC_PWR_CTRL#
EDID_SELECT#
LCD_BK
MPC Switch Control
BT_COMBO_EN#[27]
DGPU_IDLE_INT#[16]
CLK_33M_DEBUG[27]
BBS_BIT1[7]
PCI_GNT3#[7]
CLK_33M_KBC[30]
CLK_PCI_FB
+3VS5
2
1
LCD_BK[22]
Low = MPC ON
High = MPC OFF (Default)
R614 *1K_4R614 *1K_4
TP62TP62
TP63TP63
TP27TP27
TP18TP18
TP64TP64
TP28TP28
C349 *0.1U/10V_4C349 *0.1U/10V_4
U9
U9
3 5
*TC7SH08FU
*TC7SH08FU
PLTRST# [2,18,25,26,27,30]
MPC_PWR_CTRL#
MPC_PWR_CTRL#
C C
B B
PLTRST#(CLG)
PCI_PLTRST#
R182
R182
0_4
0_4
A A
PLTRST#
+3V
3/26 DB change
Part reference.
PCI_PIRQG#
1
DGPU_IDLE_INT#
2
DGPU_SELECT#
3
BT_COMBO_EN#
56
3/26 DB change
Part reference.
USB_OC6#
1
USB_OC0#
2
USB_OC7#
3
USB_OC3#
56
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
BT_COMBO_EN#
DGPU_SELECT#
EDID_SELECT#
BBS_BIT1
PWM_SELECT#
PCI_GNT3#
MPC_PWR_CTRL#
LCD_BK
PCI_PIRQG#
DGPU_IDLE_INT#
PCI_PME#
PCI_PLTRST#
CLK_PCI_TPM_R
CLK_PCI_CARD_R
R307 22_4R307 22_4
R290 22_4R290 22_4
R293 22_4R293 22_4
CLK_PCI_FB_R
CLK_PCI_LPC_R
CLK_PCI_EC_R
PLTRST#
4
R159
R159
100K_4
100K_4
5
BG26
TP1
BJ26
TP2
BH25
TP3
BJ16
TP4
BG16
TP5
AH38
TP6
AH37
TP7
AK43
TP8
AK45
TP9
C18
TP10
N30
TP11
H3
TP12
AH12
TP13
AM4
TP14
AM5
TP15
Y13
TP16
K24
TP17
L24
TP18
AB46
TP19
AB45
TP20
B21
TP21
M20
TP22
AY16
TP23
BG46
TP24
BE28
TP25
BC30
TP26
BE32
TP27
BJ32
TP28
BC28
TP29
BE30
TP30
BF32
TP31
BG32
TP32
AV26
TP33
BB26
TP34
AU28
TP35
AY30
TP36
AU26
TP37
AY26
TP38
AV28
TP39
AW30
TP40
K40
PIRQA#
K38
PIRQB#
H38
PIRQC#
G38
PIRQD#
C46
REQ1# / GPIO50
C44
REQ2# / GPIO52
E40
REQ3# / GPIO54
D47
GNT1# / GPIO51
E42
GNT2# / GPIO53
F46
GNT3# / GPIO55
G42
PIRQE# / GPIO2
G40
PIRQF# / GPIO3
C42
PIRQG# / GPIO4
D44
PIRQH# / GPIO5
K10
PME#
C6
PLTRST#
H49
CLKOUT_PCI0
H43
CLKOUT_PCI1
J48
CLKOUT_PCI2
K42
CLKOUT_PCI3
H40
CLKOUT_PCI4
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QNDL0T00
AJ0QNDL0T00
IC CTRL(989P)COUGARPOINT QNDL
IC CTRL(989P)COUGARPOINT QNDL
SMBus/Pull-up(CLG)
MBCLK2[16,30]
MBDATA2[16,30]
SMB_PCH_DAT
SMB_PCH_CLK
3
Q17
Q17
2N7002K
2N7002K
+3V
3
RSVD
RSVD
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
2N7002K
2N7002K
Q21
Q21
+3V
Q23
Q23
2N7002K
2N7002K
2
2
PCI
PCI
1
1
Q16
Q16
2N7002K
2N7002K
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
2
2
1
R130 4.7K_4R130 4.7K_4
R129 4.7K_4R129 4.7K_4
1
NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11
NVRAM
NVRAM
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15
NV_RE#_WRB0
NV_RE#_WRB1
NV_WE#_CK0
NV_WE#_CK1
USB
USB
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
3
R208 2.2K_4R208 2.2K_4
R219 2.2K_4R219 2.2K_4
3
CGDAT_SMB [12,13]
CGCLK_SMB [12,13]
4
NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3
NV_DQS0
NV_DQS1
NV_ALE
NV_CLE
NV_RCOMP
NV_RB#
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
SMB_ME1_CLK
+3VS5
SMB_ME1_DAT
4
AY7
AV7
AU3
BG4
AT10
BC8
AU2
AT4
AT3
AT1
AY3
AT5
[USB3.0]
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6
NV_ALE
AV5
NV_CLE
AY1
AV10
AT8
AY5
BA2
AT12
BF3
C24
[USB 3.0 Co-layout]
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
HM65 Port6 & Port7
N28
are disable
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32
USB_BIAS
C33
B33
USB_OC0#
A14
USB_OC1#
K20
USB_OC2#
B17
USB_OC3#
C16
USB_OC4#
L16
USB_OC5#
A16
USB_OC6#
D14
USB_OC7#
C14
PCIE_RXN1[27]
PCIE_RXP1[27]
PCIE_RXN2_LAN[25]
PCIE_RXP2_LAN[25]
PCIE_TXN2_LAN[25]
PCIE_TXP2_LAN[25]
PCIE_RXN3_USB3.0[26]
PCIE_RXP3_USB3.0[26]
PCIE_TXN3_USB3.0[26]
PCIE_TXP3_USB3.0[26]
Right Port 1
Right Port 2
Left Port 3
WWAN
Blue tooth
Camera
WLAN
Card reader
PCIE_TXN1[27]
PCIE_TXP1[27]
PCIE_RXN4[27]
PCIE_RXP4[27]
PCIE_TXN4[27]
PCIE_TXP4[27]
WLAN
LAN
Robson
USBP1- [26]
USBP1+ [26]
USBP2- [26]
USBP2+ [26]
USBP4- [28]
USBP4+ [28]
USBP5- [27]
USBP5+ [27]
USBP8- [28]
USBP8+ [28]
USBP9- [22]
USBP9+ [22]
USBP10- [27]
USBP10+ [27]
USBP12- [28]
USBP12+ [28]
NV_ALE [7]
NV_CLE [7]
R596
R596
22.6/F_4
22.6/F_4
USB 3. 0
CLK_REQ/Strap Pin(CLG)
PCIE_CLKREQ1_LAN#
PCIE_CLK_REQ2#
PCIE_CLKREQ0_WLAN#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
PCIE_CLK_REQB#
CLK_PEGA_REQ#
CLK_PEGA_REQ#
CLK_BUF_BCLK_N
CLK_BUF_BCLK_P
CLK_BUF_PCIE_3GPLL#
CLK_BUF_PCIE_3GPLL
CLK_BUF_DREFCLK#
CLK_BUF_DREFCLK
CLK_BUF_DREFSSCLK#
CLK_BUF_DREFSSCLK
CLK_PCH_14M
CLOCK TERMINATION for FCIM
R544 *10K_4R544 *10K_4
R152 10K_4R152 10K_4
R548 10K_4R548 10K_4
R557 10K_4R557 10K_4
R211 10K_4R211 10K_4
R179 10K_4R179 10K_4
R144 10K_4R144 10K_4
Ra
R169 *10K_4R169 *10K_4
Rb
: Rb ; GPU: Ra
R595 10K_4R595 10K_4
R600 10K_4R600 10K_4
R245 10K_4R245 10K_4
R243 10K_4R243 10K_4
R256 10K_4R256 10K_4
R264 10K_4R264 10K_4
R161 10K_4R161 10K_4
R160 10K_4R160 10K_4
R282 10K_4R282 10K_4
WLAN
LAN
WWAN
3
C405 0.1U/10V_4C405 0.1U/10V_4
C413 0.1U/10V_4C413 0.1U/10V_4
C415 0.1U/10V_4C415 0.1U/10V_4
C410 0.1U/10V_4C410 0.1U/10V_4
C426 .1U/10V_4C426 .1U/10V_4
C421 .1U/10V_4C421 .1U/10V_4
C435 .1U/10V_4C435 .1U/10V_4
C432 .1U/10V_4C432 .1U/10V_4
CLK_PCIE_WLAN#[27]
CLK_PCIE_WLAN[27]
PCIE_CLKREQ0_WLAN#[27]
CLK_PCIE_LAN#[25]
CLK_PCIE_LAN[25]
PCIE_CLKREQ1_LAN#[25]
CLK_PCIE_WW AN#[27]
CLK_PCIE_WW AN[27]
PCIE_CLK_REQ2#[27]
BOARD_ID0[9]
CLK_USB3.0_GEN2#[26]
CLK_USB3.0_GEN2[26]
PCIE_CLK_REQB#
INT_BT_COMBO_EN#[27]
BOARD_ID2[9]
+3V
+3VS5
3
2
Cougar Point-M (PCI-E,SMBUS,CLK)
U33B
U33B
BG34
PERN1
BJ34
CLK_PCIE_VGA#[17]
CLK_PCIE_VGA[17]
PERP1
AV32
PETN1
AU32
PETP1
BE34
PERN2
BF34
PERP2
BB32
PETN2
AY32
PETP2
BG36
PERN3
BJ36
PERP3
AV34
PETN3
AU34
PETP3
BF36
PERN4
BE36
PERP4
AY34
PETN4
BB34
PETP4
BG37
PERN5
BH37
PERP5
AY36
PETN5
BB36
PETP5
BJ38
PERN6
BG38
PERP6
AU36
PETN6
AV36
PETP6
BG40
PERN7
BJ40
PERP7
AY40
PETN7
BB40
PETP7
BE38
PERN8
BC38
PERP8
AW38
PETN8
AY38
PETP8
Y40
CLKOUT_PCIE0N
Y39
CLKOUT_PCIE0P
J2
PCIECLKRQ0# / GPIO73
(+3VS5)
AB49
CLKOUT_PCIE1N
AB47
CLKOUT_PCIE1P
M1
PCIECLKRQ1# / GPIO18
(+3V)
AA48
CLKOUT_PCIE2N
AA47
CLKOUT_PCIE2P
V10
PCIECLKRQ2# / GPIO20
(+3V)
Y37
CLKOUT_PCIE3N
Y36
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
(+3VS5)
Y43
CLKOUT_PCIE4N
Y45
CLKOUT_PCIE4P
L12
PCIECLKRQ4# / GPIO26
(+3VS5)
V45
CLKOUT_PCIE5N
V46
CLKOUT_PCIE5P
L14
PCIECLKRQ5# / GPIO44
(+3VS5)
AB42
CLKOUT_PEG_B_N
AB40
CLKOUT_PEG_B_P
E6
PEG_B_CLKRQ# / GPIO56
(+3VS5)
V40
CLKOUT_PCIE6N
V42
CLKOUT_PCIE6P
T13
PCIECLKRQ6# / GPIO45
(+3VS5)
V38
CLKOUT_PCIE7N
V37
CLKOUT_PCIE7P
K12
PCIECLKRQ7# / GPIO46
(+3VS5)
AK14
CLKOUT_ITPXDP_N
AK13
CLKOUT_ITPXDP_P
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
SMBUSController
SMBUSController
SML1ALERT# / PCHHOT# / GPIO74
PCI-E*
PCI-E*
CLOCKS
CLOCKS
AJ0QNDL0T00
AJ0QNDL0T00
IC CTRL(989P)COUGARPOINT QNDL
IC CTRL(989P)COUGARPOINT QNDL
3/26 DB change Part reference.
RP14
RP14
0_4P2R_4
0_4P2R_4
2
4
CLK_PCH_PEGAN
1
CLK_PCH_PEGAP
3
Remove for UMA only.
SML0ALERT# / GPIO60
Link
Link
PEG_A_CLKRQ# / GPIO47
CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67
FLEX CLOCKS
FLEX CLOCKS
2
PCIE_TXN1_C
PCIE_TXP1_C
PCIE_TXN2_LAN_C
PCIE_TXP2_LAN_C
PCIE_TXN3_C
PCIE_TXP3_C
TP33TP33
TP32TP32
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
TP30TP30
TP31TP31
TP17TP17
TP22TP22
CLK_PCH_ITPN
CLK_PCH_ITPP
GPU
PCIE_RXN4
PCIE_RXP4
PCIE_TXN4_C
PCIE_TXP4_C
TP26TP26
TP29TP29
PCIE Clock
(+3VS5)
SMBALERT# / GPIO11
SMBCLK
SMBDATA
(+3VS5)
SML0CLK
SML0DATA
(+3VS5)
(+3VS5)
SML1CLK / GPIO58
(+3VS5)
SML1DATA / GPIO75
CL_CLK1
CL_DATA1
CL_RST1#
(+3VS5)
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_DP_N
CLKOUT_DP_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N
CLKIN_SATA_P
REFCLK14IN
CLKIN_PCILOOPBACK
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
(+3V)
(+3V)
(+3V)
(+3V)
+3V[2,6,7,9,10,12,13,18,21,22,23,24,25,26,27,28,29,30,33,37]
+3VS5[2,6,7,9,10,22,29,30,31,32,35,37,38,40]
SMBALERT#
E12
SMB_PCH_CLK
H14
SMB_PCH_DAT
C9
DRAMRST_CNTRL_PCH
A12
SMB_ME0_CLK
C8
SMB_ME0_DAT
G12
SML1ALERT#_R
C13
SMB_ME1_CLK
E14
SMB_ME1_DAT
M16
CL_CLK_R
M7
CL_DAT_R
T11
CL_RST#_R
P10
CLK_PEGA_REQ#
M10
CLK_PCH_PEGAN
AB37
CLK_PCH_PEGAP
AB38
AV22
AU22
AM12
AM13
CLK_BUF_PCIE_3GPLL#
BF18
CLK_BUF_PCIE_3GPLL
BE18
CLK_BUF_BCLK_N
BJ30
CLK_BUF_BCLK_P
BG30
CLK_BUF_DREFCLK#
G24
CLK_BUF_DREFCLK
E24
CLK_BUF_DREFSSCLK#
AK7
CLK_BUF_DREFSSCLK
AK5
CLK_PCH_14M
K45
CLK_PCI_FB
H45
XTAL25_IN
V47
XTAL25_OUT
V49
XCLK_RCOMP
Y47
CLK_FLEX0
K43
CLK_FLEX1
F47
CLK_FLEX2
H47
CLK_FLEX3
K49
1
DRAMRST_CNTRL_PCH [2]
TP61TP61
TP16TP16
TP21TP21
TP19TP19
CLK_PEGA_REQ# [17]
CLK_CPU_BCLKN [2]
CLK_CPU_BCLKP [2]
CLK_DPLL_SSCLKN [2]
CLK_DPLL_SSCLKP [2]
3/26 DB del external
clock generator.
C782
C782
18P/50V_4
18P/50V_4
21
Y6
R626
R626
25MHzY625MHz
1M_4
1M_4
C783
C783
18P/50V_4
18P/50V_4
R619 90.9/F_4R619 90.9/F_4
R308 22_4R308 22_4
R291 22_4R291 22_4
TP70TP70
+3VS5
R566 1K_4R566 1K_4
R210 10K_4R210 10K_4
R558 2.2K_4R558 2.2K_4
R555 2.2K_4R555 2.2K_4
R534 2.2K_4R534 2.2K_4
R554 2.2K_4R554 2.2K_4
R567 10K_4R567 10K_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
+1.05V_VTT
CLK_48M_CR [28]
CLK_25M_USB3.0 [26]
TP65TP65
SMBus/Pull-up(CLG)
DRAMRST_CNTRL_PCH
SMBALERT#
SMB_PCH_CLK
SMB_PCH_DAT
SMB_ME0_CLK
SMB_ME0_DAT
SML1ALERT#_R
352-(&76:+
352-(&76:+
352-(&76:+
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
PCH 3/6 (PCIE/USB/CLK)
PCH 3/6 (PCIE/USB/CLK)
PCH 3/6 (PCIE/USB/CLK)
1
841Monday, October 25, 2010
841Monday, October 25, 2010
841Monday, October 25, 2010
of
of
of
1A
1A
1A
1A
1A
1A
5
4
3
2
1
ʹΠΦΘΒΣΠΚΟΥͺ·΄΄ΐͿʹ΅ͷ΄·͵
ʹΠΦΘΒΣΠΚΟΥͺ·΄΄ΐͿʹ΅ͷ΄·͵
ʹΠΦΘΒΣΠΚΟΥͺ·΄΄ΐͿʹ΅ͷ΄·͵ʹΠΦΘΒΣΠΚΟΥͺ·΄΄ΐͿʹ΅ͷ΄·͵
U33F
S_GPIO
R149 *0_4R149 *0_4
SIO_EXT_SMI#[30]
SIO_EXT_SCI#[30]
D D
C C
BT_OFF#[28]
ICC_EN#[7]
RF_OFF#[27]
WAN_OFF#[27]
DGPU_PWROK[17,18,30]
DGPU_HOLD_RST#[18,30]
PLL_ODVR_EN[7]
DGPU_PWR_EN[30,35,40]
SATA5GP[30]
TP57TP57
R528 *0_4R528 *0_4
R584 0_4R584 0_4
R586 0_4R586 0_4
R180 0_4R180 0_4
R214 0_4R214 0_4
S_GPIO_R
SIO_EXT_SMI#
SIO_EXT_SCI#
BT_OFF#
ICC_EN#
LAN_DISABLE#_R
RF_OFF#
BIOS_REC
BOARD_ID5
GPIO27
PLL_ODVR_EN_R
BOARD_ID3
BOARD_ID4
DGPU_PWR_EN_R
FDI_OVRVLTG
MFG_MODE
DGPU_PRSNT#
TEST_SET_UP
SATA5GP
SV_DET
OPTIMUS POWER control pin
DGPU_PWROK
DGPU_HOLD_RST#
DGPU_PWR_EN
B B
GPIO17
GPIO24
GPIO36
+3V[2,6,7,8,10,12,13,18,21,22,23,24,25,26,27,28,29,30,33,37]
+3VS5[2,6,7,8,10,22,29,30,31,32,35,37,38,40]
BOARD ID SETTING
/*&%
A A
/*
&%
4/+7:+
4/&6:+
GROE\
5
,' ,','%RDUG,'
,' ,'
12
<(6
U33F
T7
BMBUSY# / GPIO0
(+3V)
A42
TACH1 / GPIO1
(+3V)
H36
TACH2 / GPIO6
(+3V)
E38
TACH3 / GPIO7
(+3V)
C10
GPIO8
(+3VS5)
C4
LAN_PHY_PWR_CTRL / GPIO12
(+3VS5)
G2
GPIO15
(+3VS5)
U2
SATA4GP / GPIO16
(+3V)
D40
TACH0 / GPIO17
(+3V)
T5
SCLOCK / GPIO22
(+3V)
E8
GPIO24 / MEM_LED
(+3VS5)
E16
GPIO27
(DSW)
P8
GPIO28
(+3VS5)
K1
STP_PCI# / GPIO34
(+3V)
K4
GPIO35
(+3V)
V8
SATA2GP / GPIO36
(+3V)
M5
SATA3GP / GPIO37
(+3V)
N2
SLOAD / GPIO38
(+3V)
M3
SDATAOUT0 / GPIO39
(+3V)
V13
SDATAOUT1 / GPIO48
(+3V)
V3
SATA5GP / GPIO49
(+3V)
D6
GPIO57
(+3VS5)
A4
VSS_NCTF_1
A44
VSS_NCTF_2
A45
VSS_NCTF_3
A46
VSS_NCTF_4
A5
VSS_NCTF_5
A6
VSS_NCTF_6
B3
VSS_NCTF_7
B47
VSS_NCTF_8
BD1
VSS_NCTF_9
BD49
VSS_NCTF_10
BE1
VSS_NCTF_11
BE49
VSS_NCTF_12
BF1
VSS_NCTF_13
BF49
VSS_NCTF_14
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QNDL0T00
AJ0QNDL0T00
,'
,'
TACH4 / GPIO68
TACH5 / GPIO69
TACH6 / GPIO70
TACH7 / GPIO71
PROCPWRGD
GPIO
GPIO
CPU/MISC
CPU/MISC
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
NCTF
NCTF
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
IC CTRL(989P)COUGARPOINT QNDL
IC CTRL(989P)COUGARPOINT QNDL
BOARD_ID0[8]
BOARD_ID2[8]
RD0
R218 10K_4R218 10K_4
RD1
R525 10K_4R525 10K_4
RD2
R204 10K_4R204 10K_4
RD3
R546 10K_4R546 10K_4
RD4
R171 10K_4R171 10K_4
RD5
R187 *10K_4R187 *10K_4
4
(+3V)
(+3V)
(+3V)
(+3V)
A20GATE
PECI
RCIN#
THRMTRIP#
INIT3_3V#
NC_1
NC_2
NC_3
NC_4
NC_5
C40
GPIO69
B41
GPIO70
C41
GPIO71
A40
P4
AU16
EC_RCIN#
P5
AY11
PCH_THRMTRIP#
AY10
T14
AH8
AK11
AH10
AK10
P37
R220 0_4R220 0_4
DG rev0.9 suggest to TS_VSS connect to GND 4/23.
BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49
BOARD_ID0
BOARD_ID2
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
RU0
R217 *10K_4R217 *10K_4
RU1
R526 *10K_4R526 *10K_4
RU2
R203 *10K_4R203 *10K_4
RU3
R523 *10K_4R523 *10K_4
RU4
R146 *10K_4R146 *10K_4
RU5
R188 10K_4R188 10K_4
RF_POWER_OFF [27]
R603 10K_4R603 10K_4
R610 1.5K/F_4R610 1.5K/F_4
R608 *1.5K/F_4R608 *1.5K/F_4
R209 390_4R209 390_4
3
+3V
+3V
+3VS5
+3V
+3VS5
EC_A20GATE [30]
EC_RCIN# [30]
H_PWRGOOD [2]
PM_THRMTRIP# [2,30]
R163 *0_4R163 *0_4
DMI TERMINATION
VOLTAGE OVERRIDE
GPIO70
MFG-TEST
MFG_MODE
S_GPIO
RF_OFF#
Intel ME Crypto Transport Layer
Security (TLS) cipher suite
Low = Disable (Default)
High = Enable
TEST_SET_UP
R550 1K_4R550 1K_4
R153 10K_4R153 10K_4
SV_SET_UP
High = Strong (Default)
R151 *200K/F_4R151 *200K/F_4
Low = Tx, Rx terminated to
same voltage (DC Coupling Mode)
(DEFAULT)
GFX Present
DGPU_PRSNT#
Stuff
NC
RaRb
R520 10K_4R520 10K_4R545 *100K_4R545 *100K_4
SG
UMA
Rb
Ra
Rb
Ra
+3V
Clock Gen Power OK (CLG)
R607
R607
10K_4
10K_4
RA optimus
R267
R267
*10K_4
*10K_4
RB for DIS
3/26 DB del external
clock generator.
GPIO Pull-up/Pull-down(CLG)
+3V
R519 10K_4R519 10K_4
R541 *0_4R541 *0_4
+3V
R137 10K_4R137 10K_4
R148 *0_4R148 *0_4
+3VS5
+3V
+3V +3V
+3V
2
LAN_DISABLE#_R
SIO_EXT_SCI#
SIO_EXT_SMI#
BT_OFF#
EC_A20GATE
EC_RCIN#
SATA5GP
GPIO71
DGPU_PWROK
DGPU_PWROK
GPIO27
R173 *0_4R173 *0_4
BIOS RECOVERY High = Disable (Default)
R527 10K_4R527 10K_4
R292 10K_4R292 10K_4
R609 10K_4R609 10K_4
R303 10K_4R303 10K_4
R147 10K_4R147 10K_4
R172 10K_4R172 10K_4
R543 10K_4R543 10K_4
R602 1.5K/F_4R602 1.5K/F_4
R309 10K_4R309 10K_4
R310 *10K_4R310 *10K_4
R227 10K_4R227 10K_4
BIOS_REC
Low = Enable
SV_DET
TEST DETECT
Low = Default
R136 100K_4R136 100K_4
FDI TERMINATION
VOLTAGE OVERRIDE
FDI_OVRVLTGDGPU_PWR_EN_R
LOW - Tx, Rx terminated
to same voltage
352-(&76:+
352-(&76:+
352-(&76:+
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
PCH 4/6 (GPIO/MISC)
PCH 4/6 (GPIO/MISC)
PCH 4/6 (GPIO/MISC)
R150 10K_4R150 10K_4
R183 *10K_4R183 *10K_4R184 100K_4R184 100K_4
R135 *1K_4R135 *1K_4
1
+3VS5
+3V
+3V
+3V
of
of
of
941Monday, October 25, 2010
941Monday, October 25, 2010
941Monday, October 25, 2010
1A
1A
1A
1A
1A
1A
5
4
3
2
1
Cougar Point-M (POWER)
COUGAR POINT (POWER)
U33G
U33G
AA23
VCCCORE[1]
AC23
VCCCORE[2]
AD21
VCCCORE[3]
AD23
VCCCORE[4]
AF21
VCCCORE[5]
AF23
VCCCORE[6]
AG21
VCCCORE[7]
AG23
VCCCORE[8]
AG24
VCCCORE[9]
AG26
VCCCORE[10]
AG27
VCCCORE[11]
AG29
VCCCORE[12]
AJ23
VCCCORE[13]
AJ26
VCCCORE[14]
AJ27
VCCCORE[15]
AJ29
VCCCORE[16]
AJ31
VCCCORE[17]
AN19
VCCIO[28]
BJ22
VCCAPLLEXP
AN16
VCCIO[15]
AN17
VCCIO[16]
AN21
VCCIO[17]
AN26
VCCIO[18]
AN27
VCCIO[19]
AP21
VCCIO[20]
AP23
VCCIO[21]
AP24
VCCIO[22]
AP26
VCCIO[23]
AT24
VCCIO[24]
AN33
VCCIO[25]
AN34
VCCIO[26]
BH29
VCC3_3[3]
AP16
VCCVRM[2]
BG6
VccAFDIPLL
AP17
VCCIO[27]
AU20
VCCDMI[2]
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QNDL0T00
AJ0QNDL0T00
IC CTRL(989P)COUGARPOINT QNDL
IC CTRL(989P)COUGARPOINT QNDL
C774 1U/6.3V_4C774 1U/6.3V_4
+
+
C787 *220U/2.5V_3528
C787 *220U/2.5V_3528
C773 1U/6.3V_4C773 1U/6.3V_4
+
+
C775 *220U/2.5V_3528
C775 *220U/2.5V_3528
C779 1U/6.3V_4C779 1U/6.3V_4
L47
L47
10uH/100mA_8
10uH/100mA_8
C781 10U/6.3VS_6C781 10U/6.3VS_6
2
CRTLVDS
CRTLVDS
VCC CORE
VCC CORE
VCCIO
VCCIO
DMI
DMI
NAND / SPI HVCMOS
NAND / SPI HVCMOS
FDI
FDI
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCADAC
VSSADAC
VCCALVDS
VSSALVDS
VCC3_3[6]
VCC3_3[7]
VCCVRM[3]
VCCDMI[1]
VCCCLKDMI
VCCSPI
+5V_PCH_VCC5REF
V5REF= 1mA
+5V_PCH_VCC5REFSUS
VCC5REFSUS=1mA
1mA (10mils)
U48
U47
1mA (10mils)
AK36
AK37
AM37
AM38
AP36
AP37
SG & UMA : Ra
DIS : Rb
V33
V34
+VCCA_DAC_1_2
+VCCALVDS +3V
60mA (10mils)
L49
L49
HCB1608KF-181T15/1.5A_6
HCB1608KF-181T15/1.5A_6
C788 10U/6.3VS_6C788 10U/6.3VS_6
C789 0.1U/10V_4C789 0.1U/10V_4
C786 0.01U/25V_4C786 0.01U/25V_4
R634 *0_6R634 *0_6
Ra
R631 0_4R631 0_4
Rb
R618 *0_4R618 *0_4
Ra
L46
L46
0.1uH/250mA_8
0.1uH/250mA_8
Rb
R625 *0_4R625 *0_4
C785 22U/6.3VS_8C785 22U/6.3VS_8
C776 0.01U/25V_4C776 0.01U/25V_4
C777 0.01U/25V_4C777 0.01U/25V_4
R280 0_6R280 0_6
C438
C438
0.1U/10V_4
0.1U/10V_4
42mA (10mils)
+VCCAFDI_VRM
AT16
AT20
+1.1V_VCC_DMI_CCI
AB36
C792
C792
C791
C791
*10U/6.3V_6
*10U/6.3V_6
1U/6.3V_4
1U/6.3V_4
190 mA (15mils)
AG16
AG17
AJ16
AJ17
R178 0_8R178 0_8
C378
C378
0.1U/10V_4
0.1U/10V_4
20mA (10mils)
V1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
R516 0_6R516 0_6
C727
C727
1U/6.3V_4
1U/6.3V_4
R599 10_4R599 10_4
D33 RB500V-40D33 RB500V-40
C771
C771
1U/6.3V_4
1U/6.3V_4
R263 10_4R263 10_4
D14 RB500V-40D14 RB500V-40
C388
C388
0.1U/10V_4
0.1U/10V_4
352-(&76:+
352-(&76:+
352-(&76:+
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
PCH 5/6 (POWER)
PCH 5/6 (POWER)
PCH 5/6 (POWER)
1
119mA (20mils)
+3V
+1.05V_VTT+1.05V_VCCUSBCORE
+3VS5
+1.05V_VTT
+3VS5
+3V
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+1.5VSUS
+3VS5
3
0.002/F_1206
0.002/F_1206
+1.05V_PCH_VCCDPLL_EXP+1.05V_VTT
*1uH/25mA_6
*1uH/25mA_6
0.002/F_1206
0.002/F_1206
R628 0_6R628 0_6
R629 *0_6R629 *0_6
+1.05V_VTT
L48
L48
10uH/100MA_8
10uH/100MA_8
1.3 A (60mils)
R559
R559
R189
R189
0_6
0_6
L43
L43
R257
R257
C423
C423
10U/6.3VS_6
10U/6.3VS_6
R594 0_8R594 0_8
160mA (15mils)
+VCCAFDI_VRM
+1.05V_VTT
+1.05V_VTT
C389
C389
1U/6.3V_4
1U/6.3V_4
C395
C395
10U/6.3VS_6
10U/6.3VS_6
C762
C762
*10U/6.3V_6
*10U/6.3V_6
2.925 A (140mils)
C419
C419
1U/6.3V_4
1U/6.3V_4
C391
C391
1U/6.3V_4
1U/6.3V_4
+3V_VCC_EXP+3V
C770
C770
0.1U/10V_4
0.1U/10V_4
+VCCAFDI_VRM
+1.05V_VCCAPLL_FDI
R212 *0_8R212 *0_8
R186 0_8R186 0_8
+1.05V_VCCDPLL_FDI
65mA (10mils)
+1.05V_VCCA_A_DPL
+1.05V_VTT +1.05V_PCH_VCC
+1.05V_VTT +1.05V_VCCAPLL_EXP
+1.05V_VTT +1.05V_VCCIO
(Mobile 1.5V)
+1.5V
+1.05V_VTT
8mA (10mils)
L45
L45
10uH/100MA_8
10uH/100MA_8
+3V
R633 *0_6R633 *0_6
R638 1/F_4R638 1/F_4
+1.05V_VTT +VCC_DMI_CCI +1.1V_VCC_DMI_CCI
R641 *1/F_4R641 *1/F_4
R640 0_4R640 0_4
+1.05V_VCCA_B_DPL
20mA (10mils)
+3V_SUS_CLKF33
+3V_SUS_CLKF33_R
20mA (10mils)
L50
L50
*10uH/100mA_8
*10uH/100mA_8
C386
C386
1U/6.3V_4
1U/6.3V_4
C406
C406
1U/6.3V_4
1U/6.3V_4
C392
C392
1U/6.3V_4
1U/6.3V_4
C404
C404
1U/6.3V_4
1U/6.3V_4
U33J
+1.05V_VTT
D D
C C
B B
A A
R639 *0_8R639 *0_8
R224 0_4R224 0_4
+3VS5
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT +1.05V_VCCEPW
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+VCCAPLL_CPY_PCH
L44
L44
*10uH/100mA_8
*10uH/100mA_8
R606
R606
0_6
0_6
R252
R252
0.002/F_1206
0.002/F_1206
R536 0_6R536 0_6
C731
C731
1U/6.3V_4
1U/6.3V_4
R630 0_6R630 0_6
C778
C778
1U/6.3V_4
1U/6.3V_4
R632 0_6R632 0_6
C780
C780
1U/6.3V_4
1U/6.3V_4
R247 *0_6R247 *0_6
C381
C381
*1U/6.3V_4
*1U/6.3V_4
R535 0_4R535 0_4
V_PROC_IO=1mA
(10mils)
+3V_RTC
VCCRTC<1mA
(10mils)
C356
C356
0.1U/10V_4
0.1U/10V_4
C764
C764
*10U/6.3V_6
*10U/6.3V_6
C422
C422
1U/6.3V_4
1U/6.3V_4
C732
C732
4.7U/6.3V_6
4.7U/6.3V_6
C767
C767
1U/6.3V_4
1U/6.3V_4
5
C351
C351
*0.1U/10V_4
*0.1U/10V_4
1.01A (60mils)
C417
C417
1U/6.3V_4
1U/6.3V_4
C411
C411
22U/6.3VS_8
22U/6.3VS_8
C380
C380
0.1U/10V_4
0.1U/10V_4
+VCCAFDI_VRM
160mA (20mils)
+1.05V_VCCA_A_DPL
65mA (10mils)
+1.05V_VCCA_B_DPL
8mA (10mils)
+VCCDIFFCLK
+VCCDIFFCLKN
55mA (10mils)
+V1.05V_SSCVCC
95mA (10mils)
C376
C376
0.1U/10V_4
0.1U/10V_4
+V1.05M_VCCSUS
+VTT_VCCPCPU
C729
C729
0.1U/10V_4
0.1U/10V_4
C766
C766
0.1U/10V_4
0.1U/10V_4
+1.5VSUS[2,4,12,13,36,38,40]
+1.05V_VTT[2,4,6,7,8,30,32,33,38,40]
+VCCACLK
+VCCPDSW
3mA (10mils)
PCH_VCCDSW
+3V_SUS_CLKF33
+VCCDPLL_CPY
+VCCSUS1
C394
C394
*1U/6.3V_4
*1U/6.3V_4
C409
C409
1U/6.3V_4
1U/6.3V_4
C414
C414
22U/6.3VS_8
22U/6.3VS_8
+VCCRTCEXT
+VCCSST
C730
C730
0.1U/10V_4
0.1U/10V_4
C765
C765
0.1U/10V_4
0.1U/10V_4
+1.8V[4,7,32]
U33J
AD49
VCCACLK
T16
VCCDSW3_3
V12
DCPSUSBYP
T38
VCC3_3[5]
BH23
VCCAPLLDMI2
AL29
VCCIO[14]
AL24
DCPSUS[3]
AA19
VCCASW[1]
AA21
VCCASW[2]
AA24
VCCASW[3]
AA26
VCCASW[4]
AA27
VCCASW[5]
AA29
VCCASW[6]
AA31
VCCASW[7]
AC26
VCCASW[8]
AC27
VCCASW[9]
AC29
VCCASW[10]
AC31
VCCASW[11]
AD29
VCCASW[12]
AD31
VCCASW[13]
W21
VCCASW[14]
W23
VCCASW[15]
W24
VCCASW[16]
W26
VCCASW[17]
W29
VCCASW[18]
W31
VCCASW[19]
W33
VCCASW[20]
N16
DCPRTC
Y49
VCCVRM[4]
BD47
VCCADPLLA
BF47
VCCADPLLB
AF17
VCCIO[7]
AF33
VCCDIFFCLKN[1]
AF34
VCCDIFFCLKN[2]
AG34
VCCDIFFCLKN[3]
AG33
VCCSSC
V16
DCPSST
T17
DCPSUS[1]
V19
DCPSUS[2]
BJ8
V_PROC_IO
A22
VCCRTC
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QNDL0T00
AJ0QNDL0T00
IC CTRL(989P)COUGARPOINT QNDL
IC CTRL(989P)COUGARPOINT QNDL
N26
VCCIO[29]
P26
VCCIO[30]
P28
VCCIO[31]
T27
VCCIO[32]
T29
VCCIO[33]
+3V_VCCPUSB
VCCIO[34]
V5REF_SUS
DCPSUS[4]
V5REF
VCC3_3[1]
VCC3_3[8]
VCC3_3[4]
VCC3_3[2]
VCCIO[5]
VCCIO[12]
VCCIO[13]
VCCIO[6]
VCCVRM[1]
VCCIO[2]
VCCIO[3]
VCCIO[4]
T23
T24
V23
V24
P24
T26
M26
AN23
AN24
P34
N20
N22
P20
P22
AA16
W16
T34
AJ2
AF13
AH13
AH14
AF14
AK1
AF11
AC16
AC17
AD17
+1.05V_VCCEPW
T21
V21
T19
P32
+5V[7,21,22,23,24,27,28,29,37,41]
+5VS5[26,28,29,31,32,33,34,35,36,37,38,40]
+3V[2,6,7,8,9,12,13,18,21,22,23,24,25,26,27,28,29,30,33,37]
+3VS5[2,6,7,8,9,22,29,30,31,32,35,37,38,40]
+3V_DSW[6,7]
+3V_RTC[6,7,30]
1.01A (60mils)
+3V_VCCAUBG
+VCCAUPLL
+5V_PCH_VCC5REFSUS
+VCCA_USBSUS
+3V_VCCPSUS
+5V_PCH_VCC5REF
119mA (15mils)
+3V_VCCPSUS
266mA (20mils)
+3V_VCCPCORE
+V1.1LAN_VCCAPLL
+VCCAFDI_VRM
+1.05V_VCCIO1
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[6]
VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
PCI/GPIO/LPCMISC
PCI/GPIO/LPCMISC
Clock and Miscellaneous
Clock and Miscellaneous
VCCAPLLSATA
SATA USB
SATA USB
VCCASW[22]
VCCASW[23]
HDA
HDA
VCCASW[21]
VCCSUSHDA
4
CPURTC
CPURTC
+3V
C726
C726
0.1U/10V_4
0.1U/10V_4
+V1.05S_SATA3
10mA (10mils)
+V3.3A_1.5A_HDA_IO
C768
C768
0.1U/10V_4
0.1U/10V_4
R593 0_8R593 0_8
C772
C772
1U/6.3V_4
1U/6.3V_4
R228 0_6R228 0_6
C375
C375
0.1U/10V_4
0.1U/10V_4
R231 0_6R231 0_6
C357
C357
0.1U/10V_4
0.1U/10V_4
R253 0_6R253 0_6
C379 *1U/6.3V_4C379 *1U/6.3V_4
R568 0_6R568 0_6
C387
C387
1U/6.3V_4
1U/6.3V_4
R142 0_6R142 0_6
C346
C346
0.1U/10V_4
0.1U/10V_4
C790
C790
0.1U/10V_4
0.1U/10V_4
R196 0_8R196 0_8
C374
C374
1U/6.3V_4
1U/6.3V_4
L41
L41
*10uH/100mA_8
*10uH/100mA_8
C728
C728
*10U/6.3V_6
*10U/6.3V_6
R154 0_6R154 0_6
C347
C347
1U/6.3V_4
1U/6.3V_4
R592 *0_4R592 *0_4
R591 0_4R591 0_4
C769
C769
*1U/6.3V_4
*1U/6.3V_4
+3V+3V_VCC_GIO
R162 0_4R162 0_4
C350
C350
1U/6.3V_4
1U/6.3V_4
+1.8V+VCCP_NAND
+3V+3V_VCCME_SPI
+3V
+1.8V+VCC_TX_LVDS
+1.05V_VTT+1.1V_VCC_DMI
+5V
+3V
+5VS5
+3VS5
of
of
of
10 41Monday, October 25, 2010
10 41Monday, October 25, 2010
10 41Monday, October 25, 2010
1A
1A
1A
1A
1A
1A
5
4
3
2
1
IBEX PEAK-M (GND)
U33I
U33I
AY4
VSS[159]
AY42
VSS[160]
AY46
VSS[161]
AY8
VSS[162]
B11
VSS[163]
B15
D D
C C
B B
A A
5
VSS[164]
B19
VSS[165]
B23
VSS[166]
B27
VSS[167]
B31
VSS[168]
B35
VSS[169]
B39
VSS[170]
B7
VSS[171]
F45
VSS[172]
BB12
VSS[173]
BB16
VSS[174]
BB20
VSS[175]
BB22
VSS[176]
BB24
VSS[177]
BB28
VSS[178]
BB30
VSS[179]
BB38
VSS[180]
BB4
VSS[181]
BB46
VSS[182]
BC14
VSS[183]
BC18
VSS[184]
BC2
VSS[185]
BC22
VSS[186]
BC26
VSS[187]
BC32
VSS[188]
BC34
VSS[189]
BC36
VSS[190]
BC40
VSS[191]
BC42
VSS[192]
BC48
VSS[193]
BD46
VSS[194]
BD5
VSS[195]
BE22
VSS[196]
BE26
VSS[197]
BE40
VSS[198]
BF10
VSS[199]
BF12
VSS[200]
BF16
VSS[201]
BF20
VSS[202]
BF22
VSS[203]
BF24
VSS[204]
BF26
VSS[205]
BF28
VSS[206]
BD3
VSS[207]
BF30
VSS[208]
BF38
VSS[209]
BF40
VSS[210]
BF8
VSS[211]
BG17
VSS[212]
BG21
VSS[213]
BG33
VSS[214]
BG44
VSS[215]
BG8
VSS[216]
BH11
VSS[217]
BH15
VSS[218]
BH17
VSS[219]
BH19
VSS[220]
H10
VSS[221]
BH27
VSS[222]
BH31
VSS[223]
BH33
VSS[224]
BH35
VSS[225]
BH39
VSS[226]
BH43
VSS[227]
BH7
VSS[228]
D3
VSS[229]
D12
VSS[230]
D16
VSS[231]
D18
VSS[232]
D22
VSS[233]
D24
VSS[234]
D26
VSS[235]
D30
VSS[236]
D32
VSS[237]
D34
VSS[238]
D38
VSS[239]
D42
VSS[240]
D8
VSS[241]
E18
VSS[242]
E26
VSS[243]
G18
VSS[244]
G20
VSS[245]
G26
VSS[246]
G28
VSS[247]
G36
VSS[248]
G48
VSS[249]
H12
VSS[250]
H18
VSS[251]
H22
VSS[252]
H24
VSS[253]
H26
VSS[254]
H30
VSS[255]
H32
VSS[256]
H34
VSS[257]
F3
VSS[258]
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
4
H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28
3
IBEX PEAK-M (GND)
U33H
U33H
H5
VSS[0]
AA17
VSS[1]
AA2
VSS[2]
AA3
VSS[3]
AA33
VSS[4]
AA34
VSS[5]
AB11
VSS[6]
AB14
VSS[7]
AB39
VSS[8]
AB4
VSS[9]
AB43
VSS[10]
AB5
VSS[11]
AB7
VSS[12]
AC19
VSS[13]
AC2
VSS[14]
AC21
VSS[15]
AC24
VSS[16]
AC33
VSS[17]
AC34
VSS[18]
AC48
VSS[19]
AD10
VSS[20]
AD11
VSS[21]
AD12
VSS[22]
AD13
VSS[23]
AD19
VSS[24]
AD24
VSS[25]
AD26
VSS[26]
AD27
VSS[27]
AD33
VSS[28]
AD34
VSS[29]
AD36
VSS[30]
AD37
VSS[31]
AD38
VSS[32]
AD39
VSS[33]
AD4
VSS[34]
AD40
VSS[35]
AD42
VSS[36]
AD43
VSS[37]
AD45
VSS[38]
AD46
VSS[39]
AD8
VSS[40]
AE2
VSS[41]
AE3
VSS[42]
AF10
VSS[43]
AF12
VSS[44]
AD14
VSS[45]
AD16
VSS[46]
AF16
VSS[47]
AF19
VSS[48]
AF24
VSS[49]
AF26
VSS[50]
AF27
VSS[51]
AF29
VSS[52]
AF31
VSS[53]
AF38
VSS[54]
AF4
VSS[55]
AF42
VSS[56]
AF46
VSS[57]
AF5
VSS[58]
AF7
VSS[59]
AF8
VSS[60]
AG19
VSS[61]
AG2
VSS[62]
AG31
VSS[63]
AG48
VSS[64]
AH11
VSS[65]
AH3
VSS[66]
AH36
VSS[67]
AH39
VSS[68]
AH40
VSS[69]
AH42
VSS[70]
AH46
VSS[71]
AH7
VSS[72]
AJ19
VSS[73]
AJ21
VSS[74]
AJ24
VSS[75]
AJ33
VSS[76]
AJ34
VSS[77]
AK12
VSS[78]
AK3
VSS[79]
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28
352-(&76:+
352-(&76:+
352-(&76:+
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
PCH 6/6 (GND)
PCH 6/6 (GND)
PCH 6/6 (GND)
1
11 41Wednesday, August 25, 2010
11 41Wednesday, August 25, 2010
11 41Wednesday, August 25, 2010
1A
1A
1A
1A
1A
1A
of
of
of
1
2
3
4
5
6
7
8
JDIM2A
M_A_A[15:0][3]
A A
SO-DIMMA SPD Address is 0XA0
SO-DIMMA TS Address is 0X30
M_A_BS#0[3]
M_A_BS#1[3]
M_A_BS#2[3]
M_A_CS#0[3]
M_A_CS#1[3]
M_A_CLKP0[3]
M_A_CLKN0[3]
M_A_CLKP1[3]
M_A_CLKN1[3]
M_A_CKE0[3]
M_A_CKE1[3]
M_A_CAS#[3]
M_A_RAS#[3]
M_A_WE#[3]
R43 10K/F_4R43 10K/F_4
B B
C C
R39 10K/F_4R39 10K/F_4
CGCLK_SMB[8,13]
CGDAT_SMB[8,13] PM_EXTTS#1[13]
M_A_ODT0[3]
M_A_ODT1[3]
M_A_DQSP[7:0][3]
M_A_DQSN[7:0][3]
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
DIMM0_SA0
DIMM0_SA1
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200
116
120
11
28
46
63
136
153
170
187
12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186
JDIM2A
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
ODT0
ODT1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DDR3-DIMM0
DDR3-DIMM0
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
(204P)
(204P)
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
M_A_DQ4
M_A_DQ5
M_A_DQ2
M_A_DQ7
M_A_DQ1
M_A_DQ0
M_A_DQ6
M_A_DQ3
M_A_DQ21
M_A_DQ20
M_A_DQ19
M_A_DQ22
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ23
M_A_DQ36
M_A_DQ37
M_A_DQ39
M_A_DQ34
M_A_DQ33
M_A_DQ32
M_A_DQ35
M_A_DQ38
M_A_DQ49
M_A_DQ48
M_A_DQ54
M_A_DQ55
M_A_DQ52
M_A_DQ53
M_A_DQ51
M_A_DQ50
M_A_DQ9
M_A_DQ8
M_A_DQ10
M_A_DQ15
M_A_DQ13
M_A_DQ12
M_A_DQ11
M_A_DQ14
M_A_DQ28
M_A_DQ29
M_A_DQ26
M_A_DQ31
M_A_DQ25
M_A_DQ24
M_A_DQ27
M_A_DQ30
M_A_DQ40
M_A_DQ47
M_A_DQ43
M_A_DQ42
M_A_DQ41
M_A_DQ45
M_A_DQ44
M_A_DQ46
M_A_DQ63
M_A_DQ58
M_A_DQ56
M_A_DQ62
M_A_DQ60
M_A_DQ57
M_A_DQ59
M_A_DQ61
6/22:Document Number: 436996
Intel remove the DDR3 verf M2
circuitry
Place these Caps near So-Dimm0.
+1.5VSUS
C171 10U/6.3V_6SC171 10U/6.3V_6S
C245 10U/6.3V_6SC245 10U/6.3V_6S
C151 10U/6.3V_6SC151 10U/6.3V_6S
C205 10U/6.3V_6SC205 10U/6.3V_6S
C192 10U/6.3V_6SC192 10U/6.3V_6S
C225 10U/6.3V_6SC225 10U/6.3V_6S
C148 1UC148 1U
C219 1UC219 1U
D D
C142 1UC142 1U
C231 1UC231 1U
C249 1UC249 1U
+3V
C75 2.2U/6.3V_6C75 2.2U/6.3V_6
C72 .1U/10V_4C72 .1U/10V_4
1
+0.75V_DDR_VTT
+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM
11/6
C62 1U/6.3V_4C62 1U/6.3V_4
C61 1U/6.3V_4C61 1U/6.3V_4
C59 1U/6.3V_4C59 1U/6.3V_4
C60 1U/6.3V_4C60 1U/6.3V_4
C65 *10U/6.3V_8C65 *10U/6.3V_8
C52 *10U/6.3V_8C52 *10U/6.3V_8
C49 10U/6.3V_6SC49 10U/6.3V_6S
C324 .1U/10V_4C324 .1U/10V_4
C299 2.2U/6.3V_6C299 2.2U/6.3V_6
C112 .1U/10V_4C112 .1U/10V_4
C115 2.2U/6.3V_6C115 2.2U/6.3V_6
2
3
M_A_DQ[63:0] [3]
NEW ADD 5/10
SMDDR_VREF_DQ0_M3[5]
4
+1.5VSUS
2.48A
JDIM2B
JDIM2B
75
VDD1
EMI
C170
C170
.22U/10V_4
.22U/10V_4
DDR3_DRAMRST#[2,13]
SMDDR_VREF_DQ0_M1
SMDDR_VREF_DQ0_M3
+1.5VSUS
C191
C191
.22U/10V_4
.22U/10V_4
C244
C244
.22U/10V_4
.22U/10V_4
R96 0_6R96 0_6
R102 *0_6R102 *0_6
+3V
R38 *10K/F_4R38 *10K/F_4
+3V
PM_EXTTS#1
DDR3_DRAMRST#
+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM
VREF DQ0 M2 Solution 5/10 VREF DQ0 M1 Solution
5
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
PC2100 DDR3 SDRAM SO-DIMM
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
PC2100 DDR3 SDRAM SO-DIMM
+1.5VSUS
26
31
32
37
38
43
DDR3-DIMM0
DDR3-DIMM0
DDR_VTTREF SMDDR_VREF_DQ0_M1
R98 *0_6R98 *0_6
6
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
(204P)
(204P)
VTT1
VTT2
GND
GND
206
205
R94
R94
1K/F_4
1K/F_4
R95
R95
1K/F_4
1K/F_4
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
+0.75V_DDR_VTT
203
204
EMI
.22U/10V_4
.22U/10V_4
DDR_VTTREF[4,13,36]
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
7
C63
C63
C64
C64
.22U/10V_4
.22U/10V_4
+1.5VSUS
R69 *0_6R69 *0_6
+1.5VSUS[2,4,10,13,36,38,40]
+0.75V_DDR_VTT[13,36,37]
352-(&76:+
352-(&76:+
352-(&76:+
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
DDR3 DIMM-0
DDR3 DIMM-0
DDR3 DIMM-0
R77
R77
10K_4
10K_4
+SMDDR_VREF_DIMM
R75
R75
10K_4
10K_4
+3V[2,6,7,8,9,10,13,18,21,22,23,24,25,26,27,28,29,30,33,37]
12
12
12
8
C103
C103
470P/50V_4
470P/50V_4
of
of
of
1A
1A
1A
1A
1A
1A
41Monday, October 25, 2010
41Monday, October 25, 2010
41Monday, October 25, 2010
1
2
3
4
5
6
7
8
JDIM1A
A A
B B
SO-DIMMB SPD Address is 0XA4
SO-DIMMB TS Address is 0X34
C C
M_B_A[15:0][3]
M_B_ODT1[3]
M_B_DQSP[7:0][3]
M_B_DQSN[7:0][3]
M_B_BS#0[3]
M_B_BS#1[3]
M_B_BS#2[3]
M_B_CS#0[3]
M_B_CS#1[3]
M_B_CLKP0[3]
M_B_CLKN0[3]
M_B_CLKP1[3]
M_B_CLKN1[3]
M_B_CKE0[3]
M_B_CKE1[3]
M_B_CAS#[3]
M_B_RAS#[3]
M_B_WE#[3]
R45 10K/F_4R45 10K/F_4
R42 10K/F_4R42 10K/F_4
+3V
CGCLK_SMB[8,12]
CGDAT_SMB[8,12]
M_B_ODT0[3]
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
DIMM1_SA0
DIMM1_SA1
M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200
116
120
11
28
46
63
136
153
170
187
12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186
JDIM1A
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
ODT0
ODT1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DDR3-DIMM1
DDR3-DIMM1
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
(204P)
(204P)
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
M_B_DQ4M_B_A0
M_B_DQ5
M_B_DQ1
M_B_DQ3
M_B_DQ0
M_B_DQ2
M_B_DQ7
M_B_DQ6
M_B_DQ21
M_B_DQ20
M_B_DQ18
M_B_DQ23
M_B_DQ16
M_B_DQ17
M_B_DQ22
M_B_DQ19
M_B_DQ36
M_B_DQ37
M_B_DQ34
M_B_DQ35
M_B_DQ33
M_B_DQ32
M_B_DQ39
M_B_DQ38
M_B_DQ49
M_B_DQ48
M_B_DQ54
M_B_DQ55
M_B_DQ53
M_B_DQ52
M_B_DQ51
M_B_DQ50
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ9
M_B_DQ8
M_B_DQ11
M_B_DQ10
M_B_DQ28
M_B_DQ24
M_B_DQ30
M_B_DQ27
M_B_DQ29
M_B_DQ25
M_B_DQ26
M_B_DQ31
M_B_DQ40
M_B_DQ44
M_B_DQ46
M_B_DQ47
M_B_DQ45
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ61
M_B_DQ57
M_B_DQ62
M_B_DQ63
M_B_DQ60
M_B_DQ56
M_B_DQ59
M_B_DQ58
6/22:Document Number: 436996
Intel remove the DDR3 verf M2
circuitry
Place these Caps near So-Dimm1.
+1.5VSUS
C188 10U/6.3V_6SC188 10U/6.3V_6S
C169 10U/6.3V_6SC169 10U/6.3V_6S C55 1U/6.3V_4C55 1U/6.3V_4
C247 10U/6.3V_6SC247 10U/6.3V_6S
C144 10U/6.3V_6SC144 10U/6.3V_6S
C228 10U/6.3V_6SC228 10U/6.3V_6S
C220 1UC220 1U
D D
C250 1UC250 1U
C149 1UC149 1U
C232 1UC232 1U
C136 1UC136 1U
+3V
C71 2.2U/6.3V_6C71 2.2U/6.3V_6
C77 .1U/10V_4C77 .1U/10V_4
1
+0.75V_DDR_VTT
C56 1U/6.3V_4C56 1U/6.3V_4
C57 1U/6.3V_4C57 1U/6.3V_4
C58 1U/6.3V_4C58 1U/6.3V_4
C53 *10U/6.3V_8C53 *10U/6.3V_8
C51 10U/6.3V_6SC51 10U/6.3V_6SC135 10U/6.3V_6SC135 10U/6.3V_6S
C50 10U/6.3V_6SC50 10U/6.3V_6S
+SMDDR_VREF_DIMM
C120 .1U/10V_4C120 .1U/10V_4
C104 2.2U/6.3V_6C104 2.2U/6.3V_6
SMDDR_VREF_DQ1
C321 .1U/10V_4C321 .1U/10V_4
C319 2.2U/6.3V_6C319 2.2U/6.3V_6
2
3
M_B_DQ[63:0] [3]
SMDDR_VREF_DQ1_M3[5]
4
SMDDR_VREF_DQ1_M1
SMDDR_VREF_DQ1_M3
R118 0_6R118 0_6
R122 *0_6R122 *0_6
VREF DQ1 M2 Solution
5
+1.5VSUS
JDIM1B
JDIM1B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
+3V
R37 10K/F_4R37 10K/F_4
+3V
PM_EXTTS#1[12]
DDR3_DRAMRST#[2,12]
PM_EXTTS#1
SMDDR_VREF_DQ1
+SMDDR_VREF_DIMM
199
77
122
125
198
30
1
126
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
VDDSPD
NC1
NC2
NCTEST
EVENT#
RESET#
VREF_DQ
VREF_CA
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
DDR3-DIMM1
DDR3-DIMM1
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
(204P)
(204P)
VTT1
VTT2
GND
GND
206
205
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
+0.75V_DDR_VTT
VREF DQ1 M1 Solution
+1.5VSUS
R107
R107
1K/F_4
1K/F_4
DDR_VTTREF[4,12,36]
6
R115 *0_6R115 *0_6
SMDDR_VREF_DQ1_M1
R111
R111
1K/F_4
1K/F_4
+0.75V_DDR_VTT[12,36,37]
+1.5VSUS[2,4,10,12,36,38,40]
+3V[2,6,7,8,9,10,12,18,21,22,23,24,25,26,27,28,29,30,33,37]
352-(&76:+
352-(&76:+
352-(&76:+
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
7
DDR3 DIMM-1
DDR3 DIMM-1
DDR3 DIMM-1
of
of
of
13 41Monday, October 25, 2010
13 41Monday, October 25, 2010
13 41Monday, October 25, 2010
8
1A
1A
1A
1A
1A
1A
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