QUANTA sw1 Schematics

UBM1

UBM1

1

2

3

4

5

6

7

8

SW1-INTEGRATED GFX

SW1 M/B PCB

SW1 M/B PCB

A A

RUN POWER
SW

PG 41

SYSTEM
RESET CIRCUIT

PG 41

Yonah

(478 Micro-FCPGA)

DC/DC
+3VPCU
+5VPCU

1.8V & 0.9V

CPU VR

AC/BATT
CONNECTOR

PG 36

BATT
CHARGER

PG 36

PG 3,4

533/667 MHz FSB

DDR2-SODIMM1

B B

PG 15,16

533/667 MHZ DDR II

533/667 MHZ DDR II

Calistoga

1466 uFCBGA

DDR2-SODIMM2

PG 15,16

PG 5,6,7,8,9,10

PG 40

LVDS

SDVO DVI

CH7307

PG 19

VGA

CRT Connector

PG 20

S-Video

I/O Board
Connector

PG 28

PG 37

PG 39

Panel Connector

DVI Connector

PG 19

CLOCKS

ICS954310

PG 17

PG 18

DMI interface

USB2.0 (P2)

SATA - HDD

SATA

PG 20

PATA
HDD/ODD

C C

PG 20

Bluetooth

IDE

USB2.0 (P5)

PG 27

AC97/Azalia

ICH7-M

652 BGA

PG 11,12,13,14

USB2.0 (P0,P1)
USB2.0 (P4)

LAN

33MHz PCI
PCIEx2
USB2.0 (P6,P7)

AUDIO

PG 30,31

MODEM

PG 32

LPC

KBC

(EXT Left Side)
(EXT Right Side)

88E8036/53

PG 33

1394/Card Reader

PCI7402
PG 21,22

USB

PG 26

RJ45/Magnetics

PG 34

MINI-PCI
(Debug)

PG 42

Port
Replicator

PG 35

1394

PC97551VPC
H/P to
DOCK

PG 31

D D

Audio
Jacks

PG 31

USER
INTERFACE

PG 31

1

PG 25

FWH PS/2

Flash

PG 25

2

Keyboard
S/W&Led

PG 28

3

Touchpad

PG 27

FAN & THERMAL

4

5

MINI-CARD

WLAN & WWAN

PG 23,24

PG 29

PROJECT : SW1

PROJECT : SW1

PROJECT : SW1

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Schematic Block Diagram1

Schematic Block Diagram1

Schematic Block Diagram1

Date: Sheet

Date: Sheet

6

Date: Sheet

Quanta Computer Inc.

7

1ACustom

1ACustom

1ACustom

of

of

of

146Wednesday, November 16, 2005

146Wednesday, November 16, 2005

146Wednesday, November 16, 2005

8

EXPRESS-CARD

1

Pg# Description

1

Schematic Block Diagram

2

Front Page

3-4

A A

B B

C C

D D

Yonah

5-10

Calistoga

11-14

ICH7

15-16

DDRII SO-DIMM(200P)

17

Clock Generator

18-21

VGA

22

LCD Conn. & SSP

23

CRT Conn

24

SATA & IDE Conn

25

PCCARD/Conn & 1394

26

Express Card & Smart Card

27

Mini Card

28

MDC Conn.

29

SIO (MEC5004)

30

SIO (MEC5018)

31

SERIAL PORT & USB

32

Flash ROM

33

TP,BT & FIR

34

Switch,Keyboard & LED

35

FAN & Thermal

36-37

Audio CODEC(STAC9200)/Phone Jack

38-39

LOM (BCM5752)/Switch

40-41

Docking Conn/Q-Switch

42

System Reset Circuit

43-44

Battery Selector & Charger

45

DDR2_1.8VSUS, 0.9V

46

1.5VSUS,1.05V(VTT)

47

CPU Power

48

D/D Power

49

RUN Power Switch

50

VGA DC/DC

51

DCIN/Batt Conn.

52

PAD& SCREW

53

SMBUS BlOCK

1

2

2

INDEX

3

DNI LIST

3

4

5

6

Power & Ground

Label Description

DC_IN+
PBATT+
PWR_SRC
RTC_PWR3_3V
+12V +12V
VHCORE
V1_2RUN AGTL+ POWER (1.2V)

+3VRUN
+3VSUS
+5VALW
+5VRUN
+5VSUS
+5VHDD
+5VMOD
STRB#/5V
+5VFAN1, +5VFAN2
VDDA
1_8VSUS
1_8VRUN
+3VALW 8051 POWER (3V)
V1_5RUN

GND

GNDP

CGNDP

DGNDP DC/DC POWER GND

LANGND

4

ALL PAGES DIGITAL GROUND

5

Pg#

AC ADAPTER (20V)
MAIN BATTERY + (10~17V)
MAIN POWER (10~20V)
RTC & PCL POWER

CPU CORE POWER (1.25/1.15V)

SLP_S3# CTRLD POWER
SLP_S5# CTRLD POWER
8051 POWER (5V)
SLP_S3# CTRLD POWER
SLP_S5# CTRLD POWER
HDD POWER (5V)
MODULE POWER (5V)
EXTERNAL FDD POWER (5V)
FAN POWER (5V)
AUDIO ANALOG POWER (5V)
RESUME WELL IN ICH
SLP_S3# CTRLD POWER

AGP I/O POWER

CPU POWER GND

CHARGER GND

COMBO CONN GND

6

7

8

Control Signal

(3_3V)

DRUNPWROK
RUNPWROK
RUNPWROK

RUN_ON
SUS_ON

RUN_ON
SUS_ON
HDDC_EN#
MODC_EN#
FDD/LPT#
FAN_OFF/ON#
RUN_ON

PROJECT : SW1

PROJECT : SW1

PROJECT : SW1

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Index, DNI, Power & Ground

Index, DNI, Power & Ground

Index, DNI, Power & Ground

Date: Sheet

Date: Sheet

Date: Sheet

Quanta Computer Inc.

7

of

of

of

246Wednesday, November 16, 2005

246Wednesday, November 16, 2005

246Wednesday, November 16, 2005

8

1ACustom

1ACustom

1ACustom

1

H_A#[3..16]5

A A

H_ADSTB#05
H_REQ#[0..4]5

H_A#[17..31]5

H_ADSTB#15

B B

H_A20M#11

H_FERR#11

H_IGNNE#11
H_STPCLK#11

H_INTR11
H_NMI11
H_SMI#11

H_PROCHOT#

C C

H_RESET#
ITP_TDO
ITP_TMS
ITP_TDI
ITP_BPM#5

H_A#[3..16]

H_REQ#[0..4]

H_A#[17..31]

+1.05V_VCCP

12

R5075R50
75

+1.05V_VCCP

12

R13

R13

54.9/F

54.9/F

R18 27.4/FR18 27.4/F

R36 680R36 680

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#17
H_A#18
H_A#19 ITP_BPM#0
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25

H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

Place R4,R361 & R7 close to CPU.

12

12

R19

R19

R14

R14

39.2/F

39.2/F

*51_NC

*51_NC

ITP_TCK

12

ITP_TRST#

12

ITP disable guidelines

D D

Signal Resistor Value Connect To Resistor Placement

TDI

150 ohm +/- 5%

TMS

39 ohm +/- 5%

TRST#

680 ohm +/- 5%

TCK

27 ohm +/- 5%

TDO

Open

Note: Populate R5, R8, C372 & R430 when ITP connector is populated.

1

2

U32A

U32A

J4

A[3]#

L4

A[4]#

M3

A[5]#

K5

A[6]#

M1
N2

J1

N3

P5
P2
L1
P4
P1

R1

L2
K3

H2

K2

J3

L5

Y2
U5
R3
W6
U4

Y5
U2
R4

T5

T3
W3
W5

Y4
W2

Y1

V4

A6

A5
C4

D5
C6

B4

A3

AA1
AA4
AB2
AA3

M4
N5

T2

V3

B2
C3

B25

12

R37

R37
150

150

A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#

REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#

A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
ADSTB[1]#

A20M#
FERR#
IGNNE#

STPCLK#
LINT0
LINT1
SMI#

RSVD[01]#
RSVD[02]#
RSVD[03]#
RSVD[04]#
RSVD[05]#
RSVD[06]#
RSVD[07]#
RSVD[08]#
RSVD[09]#
RSVD[10]#

RSVD[11]#

12

R33

R33
*54.9/F_NC

*54.9/F_NC

ADDR GROUP 0

ADDR GROUP 0

Within 1.0" of the ITPVTT

VTT

Within 1.0" of the ITP

GND

Within 1.0" of the ITP

GND

Within 1.0" of the ITP

VTT

Within 1.0" of the ITP

2

ADS#
BNR#

BPRI#

DEFER#

DRDY#
DBSY#

BR0#

IERR#

CONTROL

CONTROL

INIT#

LOCK#

RESET#

RS[0]#
RS[1]#
RS[2]#

TRDY#

HIT#

HITM#

BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#

PRDY#
PREQ#

TRST#

DBR#

XDP/ITP SIGNALS

XDP/ITP SIGNALS

PROCHOT
THERMDA
THERMDC

THERMTRIP#

THERMH CLK

THERMH CLK

BCLK[0]
BCLK[1]

RSVD[12]#

RSVD[13]#
RSVD[14]#
RSVD[15]#
RSVD[16]#

RESERVED

RESERVED

RSVD[17]#
RSVD[18]#
RSVD[19]#
RSVD[20]#

Yonah

Yonah

ITP_DBRESET#

H1
E2
G5

H5
F21
E1

F1
D20

B3
H4
B1

F3
F4
G3
G2

G6
E4

AD4
AD3
AD1
AC4
AC2
AC1
AC5

TCK

AA6

TDI

AB3

TDO

AB5

TMS

AB6
C20

D21
A24
A25

C7

A22
A21

T22

D2
F6
D3
C1
AF1
D22
C23
C24

R15 *150_NCR15 *150_NC

3

H_IERR#

H_RESET#

ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5
ITP_TCK
ITP_TDIH_A#26
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_DBRESET#

H_PROCHOT#
H_THERMDA
H_THERMDC

H_IERR#
PM_THRMTRIP#

+1.05V_VCCP

12

3

H_ADS# 5
H_BNR# 5
H_BPRI# 5

H_DEFER# 5
H_DRDY# 5
H_DBSY# 5

H_BR0# 5

H_INIT# 11
H_LOCK# 5
H_RESET# 5

H_RS#0 5
H_RS#1 5
H_RS#2 5
H_TRDY# 5

H_HIT# 5
H_HITM# 5

T106T106
T138T138
T139T139
T140T140
T141T141

ITP_DBRESET# 13

H_PROCHOT#
H_THERMDA 29
H_THERMDC 29

PM_THRMTRIP# 6

CLK_CPU_BCLK 17
CLK_CPU_BCLK# 17

R51 56R51 56

1 2

R400 56R400 56

1 2

4

+1.05V_VCCP

R35

R35
1K/F

1K/F

1 2

Place voltage

R34

R34

divider within

2K/F

2K/F

0.5" of GTLREF

1 2

pin

C445

H_THERMDA H_THERMDC

+1.05V_VCCP

FANLESS#25

C445

1 2

*2200P_50V_NC

*2200P_50V_NC

H_THERMDA,H_THERMDC
routing together.
Trace width/Spacing
=10/10 mil

+1.05V_VCCP

R397

R397

*1K_NC

*1K_NC

1 3

2

4

V_CPU_GTLREF

Populate R401 for
Yonah B0 and
forward.

3V_S5

2

Q26

Q26
*MMBT3904_NC

*MMBT3904_NC

+5V

12

R394

R394
100K

100K

Q17

Q17
DTC144EUA

DTC144EUA

1 3

R396

R396
10K

10K

THERM_CPUDIE_L#PM_THRMTRIP#

5

H_D#[0..63]5

H_DSTBN#05
H_DSTBP#05

H_DINV#05

H_D#[0..63]5

H_PROCHOT#

2

5

6

H_D#[0..63]

H_D#[0..63]

H_DSTBN#15
H_DSTBP#15

H_DINV#15

R402 *51_NCR402 *51_NC

1 2

R401 51R401 51

1 2

CPU_MCH_BSEL06,17
CPU_MCH_BSEL16,17
CPU_MCH_BSEL26,17

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31

CPU_BSEL BSEL2 BSEL1 BSEL0

133
166

R395 0R395 0

H_PROCHOT#

3

2N7002E

2N7002E

1

Q32

Q32

+1.05V_VCCP

R432

R432
330

330

2

1 3

Q33

Q33
MMBT3904

MMBT3904

0
0

11

THERM_CPUDIE# 25

6

VR_HOT# 39

M23

R24

N24
M24
N25
M26

AD26

C26
D25

C21

E22
F24
E26
H22
F23
G25
E25
E23
K24
G24

H26
F26
K22
H25
H23
G22

N22
K25
P26
R23
L25
L22
L23

P25
P22
P23
T24

L26
T25

B22
B23

J24
J23

J26

10

7

U32B

U32B

D[0]#
D[1]#
D[2]#

DATA GRP 0 DATA GRP 1

DATA GRP 0 DATA GRP 1

D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#

D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#

GTLREF

MISC

MISC

TEST1
TEST2

BSEL[0]
BSEL[1]
BSEL[2]

PWRGOOD

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

AA23

D[32]#

AB24

D[33]#

V24

D[34]#

V26

D[35]#

W25

D[36]#

U23

D[37]#

U25

D[38]#

U22

D[39]#

AB25

D[40]#

W22

D[41]#

Y23

DATA GRP 2

DATA GRP 2

D[42]#

AA26

D[43]#

Y26

D[44]#

Y22

D[45]#

AC26

D[46]#

AA24

D[47]#

W24

DSTBN[2]#

Y25

DSTBP[2]#

V23

DINV[2]#

AC22

D[48]#

AC23

D[49]#

AB22

D[50]#

AA21

D[51]#

AB21

D[52]#

AC25

D[53]#

AD20

D[54]#

AE22

D[55]#

AF23

D[56]#

AD24

D[57]#

AE21

DATA GRP 3

DATA GRP 3

D[58]#

AD21

D[59]#

AE25

D[60]#

AF25

D[61]#

AF22

D[62]#

AF26

D[63]#

AD23

DSTBN[3]#

AE24

DSTBP[3]#

AC20

DINV[3]#

R26

COMP[0]

U26

COMP[1]

U1

COMP[2]

V1

COMP[3]

E5

DPRSTP#

B5

DPSLP#

D24

DPWR#

D6
D7

SLP#

AE6

PSI#

Yonah

Yonah

Populate R398,R399 for Yonah A0,
de-pop R398,R399 for Yonah A1

COMP0
COMP1
COMP2
COMP3

Comp0,2 connect with Zo=27.4ohm,Comp1,3
connect with Zo=55ohm, make those traces
length shorter than 0.5".Trace should be
at leaast 25 mils away from any other
toggling signal.

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Yonah Processor (HOST BUS)

Yonah Processor (HOST BUS)

Yonah Processor (HOST BUS)

7

H_D#[0..63]
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47

H_D#[0..63]
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

COMP0PM_THRMTRIP# V_CPU_GTLREF
COMP1
COMP2
COMP3

H_DPRSTP#
H_DPSLP#

R399 *56_NCR399 *56_NC

H_DPRSTP#

H_DPSLP#

1 2

R398 *56_NCR398 *56_NC

1 2

R40

R40

R38

R38

27.4/F

27.4/F

54.9/F

54.9/F

1 2

1 2

PROJECT : SW1

PROJECT : SW1

PROJECT : SW1

8

H_D#[0..63] 5

H_DSTBN#2 5
H_DSTBP#2 5
H_DINV#2 5

H_D#[0..63] 5

H_DSTBN#3 5
H_DSTBP#3 5
H_DINV#3 5

H_DPRSTP# 11,39

H_DPSLP# 11

H_DPWR# 5

H_PWRGOOD 11
H_CPUSLP# 5,11

H_PSI# 39

R39

R39

54.9/F

54.9/F

1 2

1 2

of

of

of

346Wednesday, November 16, 2005

346Wednesday, November 16, 2005

346Wednesday, November 16, 2005

8

R45

R45

27.4/F

27.4/F

1ACustom

1ACustom

1ACustom

1

+VCC_CORE

12

C459

C459
22U_4V

22U_4V

A A

+VCC_CORE

12

C456

C456
22U_4V

22U_4V

+VCC_CORE

12

C67

C67
22U_4V

22U_4V

+VCC_CORE

12

C89

C89
22U_4V

B B

C C

22U_4V

+VCC_CORE

12

C92

C92
22U_4V

22U_4V

+VCC_CORE

12

C448

C448
22U_4V

22U_4V

+VCC_CORE

12

C449

C449
22U_4V

22U_4V

+1.05V_VCCP

12

C77

C77

0.1U_10V

0.1U_10V

All use 22U 4V(+-20%,X6S,0805)Pb-Free.

12

12

12

12

12

12

12

8 inside cavity, north side, secondary layer.
8 inside cavity, south side, secondary layer.
6 inside cavity, north side, primary layer.
6 inside cavity, south side, primary layer.

12

C458

C458
22U_4V

22U_4V

C455

C455
22U_4V

22U_4V

C451

C451
22U_4V

22U_4V

C88

C88
22U_4V

22U_4V

C91

C91
22U_4V

22U_4V

C450

C450
22U_4V

22U_4V

C93

C93
22U_4V

22U_4V

C81

C81

0.1U_10V

0.1U_10V

12

C457

C457
22U_4V

22U_4V

12

C454

C454
22U_4V

22U_4V

12

C70

C70
22U_4V

22U_4V

12

C447

C447
22U_4V

22U_4V

12

C59

C59
22U_4V

22U_4V

12

C74

C74
22U_4V

22U_4V

12

C82

C82

0.1U_10V

0.1U_10V

12

C72

C72
22U_4V

22U_4V

12

C71

C71
22U_4V

22U_4V

12

C69

C69
22U_4V

22U_4V

12

C58

C58
22U_4V

22U_4V

12

C90

C90
22U_4V

22U_4V

12

C97

C97
22U_4V

22U_4V

12

C76

C76

0.1U_10V

0.1U_10V

2

12

C73

C73
22U_4V

22U_4V

12

C452

C452
22U_4V

22U_4V

12

C68

C68
22U_4V

22U_4V

12

C86

C86
22U_4V

22U_4V

12

C87

C87
22U_4V

22U_4V

12

C96

C96
22U_4V

22U_4V

C78

C78

0.1U_10V

0.1U_10V

12

C80

C80

0.1U_10V

0.1U_10V

12

+VCC_CORE

3

U32C

U32C

A7

VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]

VCC[68]
VCC[69]
VCC[70]
VCC[71]
VCC[72]
VCC[73]
VCC[74]
VCC[75]
VCC[76]
VCC[77]
VCC[78]
VCC[79]
VCC[80]
VCC[81]
VCC[82]
VCC[83]
VCC[84]
VCC[85]
VCC[86]
VCC[87]
VCC[88]
VCC[89]
VCC[90]
VCC[91]
VCC[92]
VCC[93]
VCC[94]
VCC[95]
VCC[96]
VCC[97]
VCC[98]
VCC[99]

VCC[100]

VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]

VCCSENSE
VSSSENSE

AA10
AA12
AA13
AA15
AA17
AA18
AA20

AC10
AB10
AB12
AB14
AB15
AB17
AB18

A10
A12
A13
A15
A17
A18
A20

B10
B12
B14
B15
B17
B18
B20

C10
C12
C13
C15
C17
C18

D10
D12
D14
D15
D17
D18

E10
E12
E13
E15
E17
E18
E20

F10
F12
F14
F15
F17
F18
F20
AA7
AA9

AB9

A9

B7
B9

C9

D9

E7
E9

F7
F9

VCCA

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

Yonah

Yonah

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

V6
G21
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

B26

AD6
AF5
AE5
AF4
AE3
AF2
AE2

AF7
AE7

4

+VCC_CORE

VCCSENSE
VSSSENSE

5

+1.05V_VCCP

+

+

C84

C84
*270U_2V_NC

*270U_2V_NC

Place C27
near PIN
B26

12

C444

VID0 39
VID1 39
VID2 39
VID3 39
VID4 39
VID5 39
VID6 39

VCCSENSE 39
VSSSENSE 39

Route VCCSENSE and VSSSENSE
traces at 27.4ohms with 7mil
spacing and 25mil away from
any other signals. Place PU
and PD within 2 inch of CPU.

C444

0.01U_25V

0.01U_25V

+1.5V_RUN

VCCSENSE
VSSSENSE

C446

C446
10U_4V

10U_4V

+VCC_CORE

12

12

R429

R429
100/F

100/F

R428

R428
100/F

100/F

6

G23
G26

H21
H24

K23
K26

M22
M25

N23
N26

A11
A14
A16
A19
A23
A26

B11
B13
B16
B19
B21
B24

C11
C14
C16
C19

C22
C25

D11
D13
D16
D19
D23
D26

E11
E14
E16
E19
E21
E24

F11
F13
F16
F19

F22
F25

J22
J25

L21
L24

7

U32D

U32D

A4

VSS[001]

A8

VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]

B6

VSS[009]

B8

VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]

C5

VSS[017]

C8

VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]

C2

VSS[023]
VSS[024]
VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]

F5

VSS[044]

F8

VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]

F2

VSS[050]
VSS[051]
VSS[052]

G4

VSS[053]

G1

VSS[054]
VSS[055]
VSS[056]

H3

VSS[057]

H6

VSS[058]
VSS[059]
VSS[060]

J2

VSS[061]

J5

VSS[062]
VSS[063]
VSS[064]

K1

VSS[065]

K4

VSS[066]
VSS[067]
VSS[068]

L3

VSS[069]

L6

VSS[070]
VSS[071]
VSS[072]

M2

VSS[073]

M5

VSS[074]
VSS[075]
VSS[076]

N1

VSS[077]

N4

VSS[078]
VSS[079]
VSS[080]

P3

VSS[081]

VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]

Yonah

Yonah

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
AF3
AF6
AF8
AF11
AF13
AF16
AF19
AF21
AF24

8

D D

Total caps = 2633 uF.
ESR = 15m ohm/5 // 5m ohm/25 // 5m ohm/15.

Place these inside socket cavity on North side secondary.

PROJECT : SW1

PROJECT : SW1

PROJECT : SW1

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Yonah Processor (POWER)

Yonah Processor (POWER)

Yonah Processor (POWER)

Date: Sheet

Date: Sheet

1

2

3

4

5

6

Date: Sheet

Quanta Computer Inc.

7

1ACustom

1ACustom

1ACustom

of

of

of

446Wednesday, November 16, 2005

446Wednesday, November 16, 2005

446Wednesday, November 16, 2005

8

1

2

3

4

5

6

7

8

H_D#[0..63]3

A A

+1.05V_VCCP

B B

12

12

R55

R55

R390

R390

54.9/F

54.9/F

54.9/F

54.9/F

H_XSCOMP
H_YSCOMP

H_XRCOMP
H_YRCOMP

12

12

R391

R391

R389

R389

24.9/F

24.9/F

24.9/F

24.9/F

Place H_YSCOMP,H_XSCOMP resistors with in

0.5" of U3. H_XRCOMP,H_YRCOMP trace width
and spacing is 10/10.

C C

+1.05V_VCCP +1.05V_VCCP

R392

R392
100/F

100/F

12

R393

R393
221/F

221/F

12

C434

C434

0.1U_10V

0.1U_10V

1 2

R56

R56
100/F

100/F

12

R53

R53
221/F

221/F

H_SWNG0H_SWNG1

12

C105

C105

0.1U_10V

0.1U_10V

1 2

H_D#[0..63]

CLK_MCH_BCLK17

CLK_MCH_BCLK#17

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_XRCOMP
H_XSCOMP
H_SWNG0

H_YRCOMP
H_YSCOMP
H_SWNG1

W11

AB7
AA9

AB8
AA4

AA7
AA2
AA6

AA10

AA1
AB4

AC9
AB11
AC11

AB3

AC2

AD1

AD9

AC1

AD7

AC6

AB5
AD10

AD4

AC8

AG2

AG1

K11
T10

U11
T11

Y10

F1
H1
H3

K2
G1
G2
K9
K1
K7

H4

G4

T3
U7
U9

W9

T1
T8
T4

W7

U5
T9

W6

T5

W4
W3

Y3
Y7

W5

W2

Y8

E1
E2
E4

Y1
U1

W1

J1
J6

J8
J3

U31A

U31A

H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63

H_XRCOMP
H_XSCOMP
H_XSWING

H_YRCOMP
H_YSCOMP
H_YSWING

H_CLKIN
H_CLKIN#

Calistoga

Calistoga

H_ADSTB#_0
H_ADSTB#_1

HOST

HOST

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8

H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31

H_ADS#

H_VREF_0

H_BNR#

H_BPRI#

H_BREQ#0

H_CPURST#

H_DBSY#

H_DEFER#

H_DPWR#

H_DRDY#

H_VREF_1

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

H_HIT#

H_HITM#

H_LOCK#

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

H_RS#_0
H_RS#_1
H_RS#_2

H_SLPCPU#

H_TRDY#

H9
C9
E11
G11
F11
G12
F9
H11
J12
G14
D9
J14
H13
J15
F14
D12
A11
C11
A12
A13
E13
G13
F12
B12
B14
C12
A14
C14
D14

E8
B9
C13
J13
C6
F6
C7
B7
A7
C3
J9
H8
K13

J7
W8
U3
AB10

K4
T7
Y5
AC4

K3
T6
AA5
AC5

D3
D4
B3

D8
G8
B8
F8
A8

B4
E6
D6

E3
E7

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_A#[3..31]

H_ADS# 3
H_ADSTB#0 3
H_ADSTB#1 3

H_BNR# 3
H_BPRI# 3
H_BR0# 3
H_RESET# 3
H_DBSY# 3
H_DEFER# 3

H_DPWR# 3

H_DRDY# 3

H_DINV#0 3
H_DINV#1 3
H_DINV#2 3
H_DINV#3 3

H_DSTBN#0 3
H_DSTBN#1 3
H_DSTBN#2 3
H_DSTBN#3 3

H_DSTBP#0 3
H_DSTBP#1 3
H_DSTBP#2 3
H_DSTBP#3 3

H_HIT# 3
H_HITM# 3
H_LOCK# 3

H_REQ#0 3
H_REQ#1 3
H_REQ#2 3
H_REQ#3 3
H_REQ#4 3

H_RS#0 3
H_RS#1 3
H_RS#2 3

H_CPUSLP# 3,11
H_TRDY# 3

H_A#[3..31] 3

+1.05V_VCCP

R61

R61
100/F

100/F

1 2

H_VREF

C108

C108

0.1U_10V

0.1U_10V

12

R63

R63
200/F

200/F

12

H_VREF Decoupling
capacitor should be
placed with in 100 mil
of U3.

D D

PROJECT : SW1

PROJECT : SW1

PROJECT : SW1

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Calistoga (HOST)

Calistoga (HOST)

Calistoga (HOST)

Date: Sheet

Date: Sheet

1

2

3

4

5

6

Date: Sheet

Quanta Computer Inc.

7

1ACustom

1ACustom

1ACustom

of

of

of

546Wednesday, November 16, 2005

546Wednesday, November 16, 2005

546Wednesday, November 16, 2005

8

1

+3V

R84 10KR84 10K

1 2

R86 10KR86 10K

1 2

+1.05V_VCCP

A A

B B

DELAY_VR_PWRGOOD13,39

C C

CPU_MCH_BSEL03,17
CPU_MCH_BSEL13,17
CPU_MCH_BSEL23,17

PM_DPRSLPVR13,39

PM_THRMTRIP#3

SDVO_CTRLCLK19

SDVO_CTRLDATA19

MCH_ICH_SYNC#12

R54 *75_NCR54 *75_NC

1 2

PM_BMBUSY#13
PM_EXTTS#015
PM_EXTTS#1

PLTRST#12,13,19,21,24,33

T135

T135

PAD

PAD

CFG5

CFG6

CFG7
CPU_Strap

CFG9
PCIE Graphics Lane

CFG10
Host PLL VCC Select

CFG11
PSB 4X CLK Enable

CFG[13:12] 00=Reserved. 01=XOR Mode Enable.

CFG16
FSB Dynamic ODT

CFG18

D D

VCC Select
CFG19

DMI Lane Reversal
CFG20

PCIe Backward
Interpoerability mode

SDVO_CTRLDATA Low=No SDVO device present.

1

PM_EXTTS#0
PM_EXTTS#1

PM_THRMTRIP#

T15

T15

PAD

PAD

T9

PADT9PAD

T12

T12

PAD

PAD

T11

T11

PAD

PAD

T14

T14

PAD

PAD

T10

T10

PAD

PAD

R85 0R85 0

1 2

PM_EXTTS#0
PM_EXTTS#1
PM_THRMTRIP#

R118 100R118 100

SDVO_CTRLCLK
SDVO_CTRLDATA

CLK_3GPLLREQ#

TP_NC0

T133

T133

PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD

TP_NC1

T114

T114

TP_NC2

T132

T132

TP_NC3

T121

T121

TP_NC4

T123

T123

TP_NC5

T122

T122

TP_NC6

T126

T126

TP_NC7

T125

T125

TP_NC8

T129

T129

TP_NC9

T118

T118

TP_NC10

T130

T130

TP_NC11

T120

T120

TP_NC12

T128

T128

TP_NC13

T117

T117

TP_NC14

T131

T131

TP_NC15

T115

T115

TP_NC16

T124

T124

TP_NC17

T119

T119

TP_NC18

T127

T127

Low=DMIx2
High=DMIx4

Low=Moby Disk
High=Calistoga.

Low=RSVD
High=Mobile CPU

Low= Reveise Lane
High=Normal operation

Low=Reserved
High=Mobility

Low=Calistoga
High=Reserved

11=Normal operation.
Low=Dynamic ODT Disable

High=Dynamic ODT Enable
Low=1.05V

High=1.5V
Low=Normal

High=Lane Reversed
Low=Only SDVO or PCIEx1 is operational (defaults)

High=SDVO and PCIEx1 are operating simultaneously
via PEG port

High=SDVO device present.

CFG3
CFG4
CFG5
CFG6
CFG7
CFG8

CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

12

AG11
AF11

AH33
AH34

BA41
BA40
BA39

AY41

AW41

AW1

T32
R32

A41
A35
A34
D28
D27

K16
K18

F18
E15
F15
E18
D19
D16
G16
E16
D15
G15
K15
C15
H16
G18
H15

K27

G28
F25
H26

H28
H27
K28
H32

C41

BA3
BA2
BA1
B41

AY1

A40
A39

2

U31B

U31B

F3
F7

H7

J19

J18

J25
J26

G6

D1
C1

B2

A4
A3

2

RSVD_1
RSVD_2
RSVD_3
RSVD_4
RSVD_5
RSVD_6
RSVD_7
RSVD_8
RSVD_9
RSVD_10
RSVD_11
RSVD_12
RSVD_13

CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20

PM_BMBUSY#
PM_EXTTS#_0
PM_EXTTS#_1
PM_THRMTRIP#
PWROK
RSTIN#

SDVO_CTRLCLK
SDVO_CTRLDATA
ICH_SYNC#
CLK_REQ#

NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18

CFGRSVD

CFGRSVD

PM

PM

MISC

MISC

NC

NC

3

SM_CK_0
SM_CK_1
SM_CK_2
SM_CK_3

SM_CK#_0
SM_CK#_1
SM_CK#_2
SM_CK#_3

SM_CKE_0
SM_CKE_1
SM_CKE_2
SM_CKE_3

SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3

SM_OCDCOMP_0
SM_OCDCOMP_1

SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3

SM_RCOMP#

SM_RCOMP

DDR MUXINGCLKDMI

DDR MUXINGCLKDMI

SM_VREF_0
SM_VREF_1

G_CLKIN#

D_REFCLKIN#

D_REFCLKIN

D_REFSSCLKIN#

D_REFSSCLKIN

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

3

G_CLKIN

Calistoga

Calistoga

AY35
AR1
AW7
AW40

AW35
AT1
AY7
AY40

AU20
AT20
BA29
AY29

AW13
AW12
AY21
AW21

AL20
AF10

BA13
BA12
AY20
AU21

AV9
AT9

AK1
AK41

AF33
AG33
A27
A26
C40
D41

AE35
AF39
AG35
AH39

AC35
AE39
AF35
AG39

AE37
AF41
AG37
AH41

AC37
AE41
AF37
AG41

M_CLK_DDR0 15
M_CLK_DDR1 15
M_CLK_DDR2 15
M_CLK_DDR3 15

M_CLK_DDR#0 15
M_CLK_DDR#1 15
M_CLK_DDR#2 15
M_CLK_DDR#3 15

DDR_CKE0_DIMMA 15,16
DDR_CKE1_DIMMA 15,16
DDR_CKE2_DIMMB 15,16
DDR_CKE3_DIMMB 15,16

DDR_CS0_DIMMA# 15,16
DDR_CS1_DIMMA# 15,16
DDR_CS2_DIMMB# 15,16
DDR_CS3_DIMMB# 15,16

M_OCDOCMP0
M_OCDOCMP1

M_ODT0 15,16
M_ODT1 15,16
M_ODT2 15,16
M_ODT3 15,16

SMRCOMPN
SMRCOMPP

CLK_MCH_3GPLL# 17
CLK_MCH_3GPLL 17

MCH_DREFCLK# 17
MCH_DREFCLK 17
DREF_SSCLK# 17
DREF_SSCLK 17

DMI_MRX_ITX_N0 12
DMI_MRX_ITX_N1 12
DMI_MRX_ITX_N2 12
DMI_MRX_ITX_N3 12

DMI_MRX_ITX_P0 12
DMI_MRX_ITX_P1 12
DMI_MRX_ITX_P2 12
DMI_MRX_ITX_P3 12

DMI_MTX_IRX_N0 12
DMI_MTX_IRX_N1 12
DMI_MTX_IRX_N2 12
DMI_MTX_IRX_N3 12

DMI_MTX_IRX_P0 12
DMI_MTX_IRX_P1 12
DMI_MTX_IRX_P2 12
DMI_MTX_IRX_P3 12

+3V

R103 *10K_NCR103 *10K_NC
R102 *10K_NCR102 *10K_NC
R99 2.2KR99 2.2K
R82 2.2KR82 2.2K

VGA_BLU20
VGA_GRN20
VGA_RED20

DVO_RED#_C
DVO_GREEN#_C
DVO_BLUE#_C
DVO_CLK#_C

DVO_RED_C
DVO_GREEN_C
DVO_BLUE_C
DVO_CLK_C

DC Blocked Cap.

4

R77 *40.2/F_NCR77 *40.2/F_NC

1 2

R62 *40.2/F_NCR62 *40.2/F_NC

1 2

Stuff R138 & R139
for A1 Calistoga

V_DDR_MCH_REF

TV_CVBS28

1 2
1 2

12
12

for EMI

C577

C577

C579

C579

*15P_NC

*15P_NC

*15P_NC

*15P_NC

C191 0.1U_10VC191 0.1U_10V

1 2

C194 0.1U_10VC194 0.1U_10V

1 2

C187 0.1U_10VC187 0.1U_10V

1 2

C192 0.1U_10VC192 0.1U_10V

1 2

C188 0.1U_10VC188 0.1U_10V

1 2

C196 0.1U_10VC196 0.1U_10V

1 2

C185 0.1U_10VC185 0.1U_10V

1 2

C189 0.1U_10VC189 0.1U_10V

1 2

4

1 2

TV_Y28
TV_C28

LCTLA_CLK
LCTLB_CLK
LCD_DDCCLK
LCD_DDCDAT

R438 0R438 0
R437 0R437 0
R436 0R436 0

C575

C575

*15P_NC

*15P_NC

5

BIA_PWM18

PANEL_BKEN18

LCD_DDCCLK18
LCD_DDCDAT18

R108

R108

1.5K/F

1.5K/F

LCD_ACLK-18
LCD_ACLK+18

R69

R69

R65

R65

150/F

150/F

150/F

150/F

1 2

1 2

VGADDCCLK20
VGADDCDAT20
VGAHSYNC20

VGAVSYNC20

C574

C574

*15P_NC

*15P_NC

SDVOB_RED- 19
SDVOB_GREEN- 19
SDVOB_BLUE- 19
SDVOB_CLK- 19

SDVOB_RED+ 19
SDVOB_GREEN+ 19
SDVOB_BLUE+ 19
SDVOB_CLK+ 19

5

ENVDD18

T20

T20

PAD

PAD

T19

T19

PAD

PAD

LCD_A0-18
LCD_A1-18
LCD_A2-18

LCD_A0+18
LCD_A1+18
LCD_A2+18

T23

T23

PAD

PAD

T26

T26

PAD

PAD

T22

T22

PAD

PAD

T25

T25

PAD

PAD

T24

T24

PAD

PAD

T17

T17

PAD

PAD

R71

R71
150/F

150/F

1 2

VGA_BLU_MCH
VGA_GRN_MCH
VGA_RED_MCH

VGADDCCLK
VGADDCDAT

R81 39R81 39
R79 255/FR79 255/F
R80 39R80 39

CRT_IREF net
should be Routed
20 mils away from
any signals.

C576

C576

C578

C578

*15P_NC

*15P_NC

*15P_NC

*15P_NC

V_DDR_MCH_REF

12

LCTLA_CLK
LCTLB_CLK
LCD_DDCCLK
LCD_DDCDAT
L_IBG

TVIREF

R76

R76

4.99K/F

4.99K/F

Close to

1 2

J20.

1 2
1 2
1 2

R384

R384

150/F

150/F

1 2

C102

C102

0.1U_10V

0.1U_10V

6

U31C

U31C

D32

J30
H30
H29
G26
G25
B38
C35
F32
C33
C32

A33
A32
E27
E26

C37
B35
A37

B37
B34
A36

G30
D30
F29

F30
D29
F28

A16
C18
A19

J20
B16
B18
B19

K30

J29

E23
D23
C22
B22
A21
B21

C26
C25
G23

J22
H23

VGA_BLU_MCH

VGA_GRN_MCH
VGA_RED_MCH

R386

R386

R385

R385

150/F

150/F

150/F

150/F

1 2

1 2

Need to place
these caps
near Calistoga
SMVREF pins.

6

L_BKLTCTL
L_BKLTEN
L_CLKCTLA
L_CLKCTLB
L_DDC_CLK
L_DDC_DATA
L_IBG
L_VBG
L_VDDEN
L_VREFH
L_VREFL

LA_CLK#
LA_CLK
LB_CLK#
LB_CLK

LA_DATA#_0
LA_DATA#_1
LA_DATA#_2

LA_DATA_0
LA_DATA_1
LA_DATA_2

LB_DATA#_0
LB_DATA#_1
LB_DATA#_2

LB_DATA_0
LB_DATA_1
LB_DATA_2

TV_DACA_OUT
TV_DACB_OUT
TV_DACC_OUT

TV_IREF
TV_IRTNA
TV_IRTNB
TV_IRTNC

TV_DCONSEL0
TV_DCONSEL1

CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#

CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_IREF
CRT_VSYNC

SMRCOMPN
SMRCOMPP

7

VCC3G_PCIE_R

EXP_A_COMPI

EXP_A_COMPO

EXP_A_RXN_0
EXP_A_RXN_1
EXP_A_RXN_2
EXP_A_RXN_3
EXP_A_RXN_4
EXP_A_RXN_5
EXP_A_RXN_6
EXP_A_RXN_7
EXP_A_RXN_8

EXP_A_RXN_9
EXP_A_RXN_10
EXP_A_RXN_11

LVDS

LVDS

TV

TV

VGA

VGA

+1.8V_SUS

R59

R59

80.6/F

80.6/F

R60

R60

80.6/F

80.6/F

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

EXP_A_RXN_12
EXP_A_RXN_13
EXP_A_RXN_14
EXP_A_RXN_15

EXP_A_RXP_0

EXP_A_RXP_1

EXP_A_RXP_2

EXP_A_RXP_3

EXP_A_RXP_4

EXP_A_RXP_5

EXP_A_RXP_6

EXP_A_RXP_7

EXP_A_RXP_8

EXP_A_RXP_9
EXP_A_RXP_10
EXP_A_RXP_11
EXP_A_RXP_12
EXP_A_RXP_13
EXP_A_RXP_14
EXP_A_RXP_15

EXP_A_TXN_0

EXP_A_TXN_1

EXP_A_TXN_2

EXP_A_TXN_3

EXP_A_TXN_4

EXP_A_TXN_5

EXP_A_TXN_6

EXP_A_TXN_7

EXP_A_TXN_8

EXP_A_TXN_9
EXP_A_TXN_10
EXP_A_TXN_11
EXP_A_TXN_12
EXP_A_TXN_13

PCI-EXPRESS GRAPHICS

PCI-EXPRESS GRAPHICS

EXP_A_TXN_14
EXP_A_TXN_15

EXP_A_TXP_0
EXP_A_TXP_1
EXP_A_TXP_2
EXP_A_TXP_3
EXP_A_TXP_4
EXP_A_TXP_5
EXP_A_TXP_6
EXP_A_TXP_7
EXP_A_TXP_8

EXP_A_TXP_9
EXP_A_TXP_10
EXP_A_TXP_11
EXP_A_TXP_12
EXP_A_TXP_13
EXP_A_TXP_14
EXP_A_TXP_15

12

12

+3V

Calistoga (VGA,DMI)

Calistoga (VGA,DMI)

Calistoga (VGA,DMI)

7

D40
D38

F34
G38
H34
J38
L34
M38
N34
P38
R34
T38
V34
W38
Y34
AA38
AB34
AC38

D34
F38
G34
H38
J34
L38
M34
N38
P34
R38
T34
V38
W34
Y38
AA34
AB38

DVO_RED#_C

F36

DVO_GREEN#_C

G40

DVO_BLUE#_C

H36

DVO_CLK#_C

J40
L36
M40
N36
P40
R36
T40
V36
W40
Y36
AA40
AB36
AC40

DVO_RED_C

D36

DVO_GREEN_C

F40

DVO_BLUE_C

G36

DVO_CLK_C

H40
J36
L40
M36
N40
P36
R40
T36
V40
W36
Y40
AA36
AB40

Calistoga

Calistoga

R83 *1K_NCR83 *1K_NC
R94 *1K_NCR94 *1K_NC
R88 *1K_NCR88 *1K_NC

R72 *2.2K_NCR72 *2.2K_NC
R74 *2.2K_NCR74 *2.2K_NC
R75 *2.2K_NCR75 *2.2K_NC
R70 *2.2K_NCR70 *2.2K_NC
R67 *2.2K_NCR67 *2.2K_NC
R64 2.2KR64 2.2K
R66 *2.2K_NCR66 *2.2K_NC
R68 *2.2K_NCR68 *2.2K_NC
R73 *2.2K_NCR73 *2.2K_NC

12
12
12

12
12
12
12
12
12
12
12
12

PROJECT : SW1

PROJECT : SW1

PROJECT : SW1

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

8

R113 24.9/FR113 24.9/F

1 2

SDVOB_INT- 19

SDVOB_INT+ 19

CFG18
CFG19
CFG20

CFG5
CFG6
CFG7
CFG9
CFG10
CFG11
CFG12
CFG13
CFG16

646Wednesday, November 16, 2005

646Wednesday, November 16, 2005

646Wednesday, November 16, 2005

8

VCC3G_PCIE

of

of

of

1ACustom

1ACustom

1ACustom

1

A A

2

3

4

5

6

7

8

U31D

AJ35
AJ34

AM31
AM33

AJ36

AK35

AJ32

AH31
AN35
AP33
AR31
AP31

AN38
AM36
AM34

AN33

AK26

AL27

AM26

AN24

AK28

AL28

AM24

AP26

AP23

AL22
AP21
AN20

AL23
AP24
AP20
AT21
AR12
AR14
AP13
AP12
AT13
AT12

AL14

AL12

AW2

AN7
AK8
AK7
AP9
AN9
AT5

AY2
AP1

AN2
AV2
AT3
AN1

AG7
AF9
AG4
AF6
AG9
AH6
AF4
AF8

AK9

AL5

AL2

U31D

SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63

DDR_A_BS0

AU12

SA_BS_0
SA_BS_1
SA_BS_2

SA_CAS#
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6

SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8

SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13

SA_RAS#

SA_RCVENIN#

SA_RCVENOUT#

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_WE#

Calistoga

Calistoga

AV14
BA20

AY13
AJ33
AM35
AL26
AN22
AM14
AL9
AR3
AH4

AK33
AT33
AN28
AM22
AN12
AN8
AP3
AG5
AK32
AU33
AN27
AM21
AM12
AL8
AN3
AH5

AY16
AU14
AW16
BA16
BA17
AU16
AV17
AU17
AW17
AT16
AU13
AT17
AV20
AV12

AW14
AK23
AK24
AY14

DDR_A_BS1
DDR_A_BS2
DDR_A_CAS#

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13

DDR_A_RAS#

DDR_A_WE#

DDR_A_BS0 15,16
DDR_A_BS1 15,16
DDR_A_BS2 15,16
DDR_A_CAS# 15,16
DDR_A_DM[0..7] 15

DDR_A_DQS[0..7] 15

DDR_A_DQS#[0..7] 15

DDR_A_MA[0..13] 15,16

DDR_A_RAS# 15,16

T18 PADT18 PAD
T21 PADT21 PAD

DDR_A_WE# 15,16

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20

B B

C C

DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

DDR_B_D[0..63]15DDR_A_D[0..63]15

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

AK39

AJ37
AP39
AR41

AJ38
AK38
AN41
AP41
AT40
AV41
AU38
AV38
AP38
AR40

AW38

AY38
BA38
AV36
AR36
AP36
BA36
AU36
AP35
AP34
AY33
BA33
AT31
AU29
AU31

AW31

AV29

AW29
AM19

AL19
AP14
AN14
AN17

AM16

AP15

AL15

AJ11
AH10

AN10
AK13
AH11
AK10

BA10

AW10

BA4

AW4
AY10

AY9

AW5

AY5
AV4
AR5
AK4
AK3
AT4
AK5

U31E

U31E

SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41

AJ9

SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46

AJ8

SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61

AJ5

SB_DQ62

AJ3

SB_DQ63

SB_BS_0
SB_BS_1
SB_BS_2

SB_CAS#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6

SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8

SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13

SB_RAS#

SB_RCVENIN#

SB_RCVENOUT#

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

SB_WE#

Calistoga

Calistoga

AT24
AV23
AY28

AR24
AK36
AR38
AT36
BA31
AL17
AH8
BA5
AN4

AM39
AT39
AU35
AR29
AR16
AR10
AR7
AN5
AM40
AU39
AT35
AP29
AP16
AT10
AT7
AP5

AY23
AW24
AY24
AR28
AT27
AT28
AU27
AV28
AV27
AW27
AV24
BA27
AY27
AR23

AU23
AK16
AK18
AR27

DDR_B_BS0
DDR_B_BS1
DDR_B_BS2
DDR_B_CAS#

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13

DDR_B_RAS#

DDR_B_WE#

DDR_B_BS0 15,16
DDR_B_BS1 15,16
DDR_B_BS2 15,16
DDR_B_CAS# 15,16
DDR_B_DM[0..7] 15

DDR_B_DQS[0..7] 15

DDR_B_DQS#[0..7] 15

DDR_B_MA[0..13] 15,16

DDR_B_RAS# 15,16

T13 PADT13 PAD
T16 PADT16 PAD

DDR_B_WE# 15,16

D D

PROJECT : SW1

PROJECT : SW1

PROJECT : SW1

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Calistoga (DDR2)

Calistoga (DDR2)

Calistoga (DDR2)

Date: Sheet

Date: Sheet

1

2

3

4

5

6

Date: Sheet

Quanta Computer Inc.

7

1ACustom

1ACustom

1ACustom

of

of

of

746Wednesday, November 16, 2005

746Wednesday, November 16, 2005

746Wednesday, November 16, 2005

8

5

U31G

U31G

+1.05V_VCCP

D D

C C

B B

A A

5

AA33

W33

P33
N33

AA32

Y32

W32

V32
P32
N32

M32

AA31

W31

V31
R31

P31
N31

M31

AA30

Y30

W30

V30
U30

R30
P30
N30

M30

AA29

Y29

W29

V29
U29
R29
P29

M29

AB28
AA28

Y28
V28
U28

R28
P28
N28

M28

P27
N27

M27

P26
N26

N25

M25

P24
N24

M24
AB23
AA23

Y23
P23
N23

M23
AC22

AB22

Y22

W22

P22
N22

M22
AC21

AA21

W21

N21

M21
AC20

AB20

Y20

W20

P20
N20

M20
AB19

AA19

Y19
N19

M19

N18

M18

P17
N17

M17

N16

M16

VCC_0
VCC_1
VCC_2
VCC_3

L33

VCC_4

J33

VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12

L32

VCC_13

J32

VCC_14
VCC_15
VCC_16
VCC_17

T31

VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27

T30

VCC_28
VCC_29
VCC_30
VCC_31
VCC_32

L30

VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41

L29

VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47

T28

VCC_48
VCC_49
VCC_50
VCC_51
VCC_52

L28

VCC_53
VCC_54
VCC_55
VCC_56

L27

VCC_57
VCC_58
VCC_59

L26

VCC_60
VCC_61
VCC_62

L25

VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72

L23

VCC_73
VCC_74
VCC_75
VCC_76
VCC_77
VCC_78
VCC_79
VCC_80

L22

VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_86

L21

VCC_87
VCC_88
VCC_89
VCC_90
VCC_91
VCC_92
VCC_93
VCC_94

L20

VCC_95
VCC_96
VCC_97
VCC_98
VCC_99
VCC_100

L19

VCC_101
VCC_102
VCC_103

L18

VCC_104
VCC_105
VCC_106
VCC_107
VCC_108
VCC_109

L16

VCC_110

VCC

VCC

4

VCC_SM_0
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8

VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
VCC_SM_37
VCC_SM_38
VCC_SM_39
VCC_SM_40
VCC_SM_41
VCC_SM_42
VCC_SM_43
VCC_SM_44
VCC_SM_45
VCC_SM_46
VCC_SM_47
VCC_SM_48
VCC_SM_49
VCC_SM_50
VCC_SM_51
VCC_SM_52
VCC_SM_53
VCC_SM_54
VCC_SM_55
VCC_SM_56
VCC_SM_57
VCC_SM_58
VCC_SM_59
VCC_SM_60
VCC_SM_61
VCC_SM_62
VCC_SM_63
VCC_SM_64
VCC_SM_65
VCC_SM_66
VCC_SM_67
VCC_SM_68
VCC_SM_69
VCC_SM_70
VCC_SM_71
VCC_SM_72
VCC_SM_73
VCC_SM_74
VCC_SM_75
VCC_SM_76
VCC_SM_77
VCC_SM_78
VCC_SM_79
VCC_SM_80
VCC_SM_81
VCC_SM_82
VCC_SM_83
VCC_SM_84
VCC_SM_85
VCC_SM_86
VCC_SM_87
VCC_SM_88
VCC_SM_89
VCC_SM_90
VCC_SM_91
VCC_SM_92
VCC_SM_93
VCC_SM_94
VCC_SM_95
VCC_SM_96
VCC_SM_97
VCC_SM_98
VCC_SM_99

VCC_SM_100
VCC_SM_101
VCC_SM_102
VCC_SM_103
VCC_SM_104
VCC_SM_105
VCC_SM_106
VCC_SM_107

Calistoga

Calistoga

4

AU41
AT41
AM41
AU40
BA34
AY34
AW34
AV34
AU34
AT34
AR34
BA30
AY30
AW30
AV30
AU30
AT30
AR30
AP30
AN30
AM30
AM29
AL29
AK29
AJ29
AH29
AJ28
AH28
AJ27
AH27
BA26
AY26
AW26
AV26
AU26
AT26
AR26
AJ26
AH26
AJ25
AH25
AJ24
AH24
BA23
AJ23
BA22
AY22
AW22
AV22
AU22
AT22
AR22
AP22
AK22
AJ22
AK21
AK20
BA19
AY19
AW19
AV19
AU19
AT19
AR19
AP19
AK19
AJ19
AJ18
AJ17
AH17
AJ16
AH16
BA15
AY15
AW15
AV15
AU15
AT15
AR15
AJ15
AJ14
AJ13
AH13
AK12
AJ12
AH12
AG12
AK11
BA8
AY8
AW8
AV8
AT8
AR8
AP8
BA6
AY6
AW6
AV6
AT6
AR6
AP6
AN6
AL6
AK6
AJ6
AV1
AJ1

+1.8V_SUS

VCCSM_LF4
VCCSM_LF5

Place caps close to
Calistoga.AT41,AM41.

12

Place caps close to
Calistoga.BA23.

C136

C136
10U_4V

10U_4V

Place caps close to
Calistoga.AV1,AJ1.

VCCSM_LF2

VCCSM_LF1

12

C392

C392

0.47U_10V

0.47U_10V

C129

C129

0.47U_10V

0.47U_10V

C439 0.47U_10VC439 0.47U_10V

C438 0.47U_10VC438 0.47U_10V

1 2

1 2

12

C391

C391

0.47U_10V

0.47U_10V

C115

C115
10U_4V

10U_4V

Place caps close to
Calistoga.BA15.

3

12

C111

C111

0.47U_10V

0.47U_10V

3

+1.05V_VCCP

12

+

+

+1.05V_VCCP

12

+

+

C157

C157
330U_2.5V

330U_2.5V

C171

C171
330U_2.5V

330U_2.5V

C112

C112
10U_4V

10U_4V

C117

C117
10U_4V

10U_4V

12

12

C130

C130

0.22U_10V

0.22U_10V

C148

C148
1U_10V

1U_10V

12

C147

C147

0.22U_10V

0.22U_10V

12

C110

C110

0.22U_10V

0.22U_10V

2

U31F

U31F

AD27

VCC_NCTF0

AC27

VCC_NCTF1

AB27

VCC_NCTF2

AA27

VCC_NCTF3

Y27

VCC_NCTF4

W27

VCC_NCTF5

V27

VCC_NCTF6

U27

VCC_NCTF7

T27

VCC_NCTF8

R27

VCC_NCTF9

AD26

VCC_NCTF10

AC26

VCC_NCTF11

AB26

VCC_NCTF12

AA26

VCC_NCTF13

Y26

VCC_NCTF14

W26

VCC_NCTF15

V26

VCC_NCTF16

U26

VCC_NCTF17

T26

VCC_NCTF18

R26

VCC_NCTF19

AD25

VCC_NCTF20

AC25

VCC_NCTF21

AB25

VCC_NCTF22

AA25

VCC_NCTF23

Y25

VCC_NCTF24

W25

VCC_NCTF25

V25

VCC_NCTF26

U25

VCC_NCTF27

T25

VCC_NCTF28

R25

VCC_NCTF29

AD24

VCC_NCTF30

AC24

VCC_NCTF31

AB24

VCC_NCTF32

AA24

VCC_NCTF33

Y24

VCC_NCTF34

W24

VCC_NCTF35

V24

VCC_NCTF36

U24

VCC_NCTF37

T24

VCC_NCTF38

R24

VCC_NCTF39

AD23

VCC_NCTF40

V23

VCC_NCTF41

U23

VCC_NCTF42

T23

VCC_NCTF43

R23

VCC_NCTF44

AD22

VCC_NCTF45

V22

VCC_NCTF46

U22

VCC_NCTF47

T22

VCC_NCTF48

R22

VCC_NCTF49

AD21

VCC_NCTF50

V21

VCC_NCTF51

U21

VCC_NCTF52

T21

VCC_NCTF53

R21

VCC_NCTF54

AD20

VCC_NCTF55

V20

VCC_NCTF56

U20

VCC_NCTF57

T20

VCC_NCTF58

R20

VCC_NCTF59

AD19

VCC_NCTF60

V19

VCC_NCTF61

U19

VCC_NCTF62

T19

VCC_NCTF63

AD18

VCC_NCTF64

AC18

VCC_NCTF65

AB18

VCC_NCTF66

AA18

VCC_NCTF67

Y18

VCC_NCTF68

W18

VCC_NCTF69

V18

VCC_NCTF70

U18

VCC_NCTF71

T18

VCC_NCTF72

2

NCTF

NCTF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Calistoga (VCC, NCTF)

Calistoga (VCC, NCTF)

Calistoga (VCC, NCTF)

Date: Sheet

Date: Sheet

Date: Sheet

VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8

VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12

VCCAUX_NCTF0
VCCAUX_NCTF1
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
VCCAUX_NCTF7
VCCAUX_NCTF8

VCCAUX_NCTF9
VCCAUX_NCTF10
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
VCCAUX_NCTF18
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
VCCAUX_NCTF35
VCCAUX_NCTF36
VCCAUX_NCTF37
VCCAUX_NCTF38
VCCAUX_NCTF39
VCCAUX_NCTF40
VCCAUX_NCTF41
VCCAUX_NCTF42
VCCAUX_NCTF43
VCCAUX_NCTF44
VCCAUX_NCTF45
VCCAUX_NCTF46
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
VCCAUX_NCTF52
VCCAUX_NCTF53
VCCAUX_NCTF54
VCCAUX_NCTF55
VCCAUX_NCTF56
VCCAUX_NCTF57

PROJECT : SW1

PROJECT : SW1

PROJECT : SW1

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Calistoga

Calistoga

1

AE27
AE26
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AC17
Y17
U17

AG27
AF27
AG26
AF26
AG25
AF25
AG24
AF24
AG23
AF23
AG22
AF22
AG21
AF21
AG20
AF20
AG19
AF19
R19
AG18
AF18
R18
AG17
AF17
AE17
AD17
AB17
AA17
W17
V17
T17
R17
AG16
AF16
AE16
AD16
AC16
AB16
AA16
Y16
W16
V16
U16
T16
R16
AG15
AF15
AE15
AD15
AC15
AB15
AA15
Y15
W15
V15
U15
T15
R15

1

+1.5V_RUN

1ACustom

1ACustom

1ACustom

of

of

of

846Wednesday, November 16, 2005

846Wednesday, November 16, 2005

846Wednesday, November 16, 2005

5

FB_33ohm+-25%_100mHz_3000mA_0.025ohm DC

+1.5V_RUN

R366

R366

1 2

0.002/F

0.002/F

D D

+1.5V_RUN

1uH+-20%_300mA

R364

R364

1 2

0.002/F

0.002/F

VCC3G_PCIE

L27

L27

1 2

BLM18PG330SN1

BLM18PG330SN1

L28

L28

1 2

1uH_200mA

1uH_200mA

12

+

+

C388

C388
150U_2V

150U_2V

VCCA_3GPLL_R VCCA_3GPLL

VCC3G_PCIE

C390

12

C393

C393
10U_4V

10U_4V

Should be
placed in
cavity.

C390
10U_4V

10U_4V

C389

C389
10U_4V

10U_4V

Place caps on same
side as Calistoga.

R368 0.5/FR368 0.5/F

FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC

L36

L36

+2.5V_RUN

C C

+1.05V_VCCP +2.5V_RUN

CRT DAC Voltage Follower Circuit -700 mV.

+1.5V_RUN +1.5V_RUN

B B

0.1Caps should be
placed 200 mils
with in its pins.

1 2

BLM18PG181SN1

BLM18PG181SN1

D2

D2

2 1

CH751H-40HPT

CH751H-40HPT

R98 10R98 10

1 2

12

C431

C431

0.1U_10V

0.1U_10V

10uH+-20%_100mA FB_120ohm+-25%_100mHz_200mA_0.2ohm DC

L35

L35

12

10uH_100MA

10uH_100MA

L6

L6
10uH_100MA

10uH_100MA

12

C131

C131

0.1U_10V

0.1U_10V

VCCA_DPLLB VCCA_MPLL

12

12

C174

C174

0.1U_10V

0.1U_10V

12

C428

C428

+

+

*470U_4V_NC

*470U_4V_NC

12

C177

C177

+

+

*470U_4V_NC

*470U_4V_NC

VCCA_CRTDAC

12

C432

C432

0.022U_16V

0.022U_16V

VSSA_CRTDAC

45mA MAx.40mA MAx.

L37

L37
BLM11A121S

BLM11A121S

L4

L4
BLM11A121S

BLM11A121S

12

12

FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC

L5

L5

VSS_TVBG

R383 10R383 10

1 2

5

1 2

BLM18PG181SN1

BLM18PG181SN1

12

C118

C118

0.022U_16V

0.022U_16V

+3V+1.5V_RUN

12

R78 0R78 0

1 2

12

C119

C119

0.1U_10V

0.1U_10V

C116

C116
10U_4V

10U_4V

12

C123

C123

0.1U_10V

0.1U_10V

12

C127

C127

0.1U_10V

0.1U_10V

12

C121

C121

0.1U_10V

0.1U_10V

22nF & 0.1uF for
VCC_TVDACA:C_R should
be placed with in 250
mils from Calistoga.

A A

TV DAC Voltage Follower Circuit -700 mV.

+3V

VCC_TVBG

D22

D22

2 1

CH751H-40HPT

CH751H-40HPT

12

C153

C153

0.1U_10V

0.1U_10V

12

12

VCCA_HPLLVCCA_DPLLA

C435

C435

0.1U_10V

0.1U_10V

C100

C100

0.1U_10V

0.1U_10V

12

C114

C114

0.022U_16V

0.022U_16V

12

C124

C124

0.022U_16V

0.022U_16V

12

C120

C120

0.022U_16V

0.022U_16V

4

+2.5V_RUN

+2.5V_RUN

12

12

VCC_TVDACA

VCC_TVDACB

VCC_TVDACC

4

12

C150

C150

4.7U_6.3V

4.7U_6.3V

Close to
C30,B30 & A30.

12

C164

C164

0.1U_10V

0.1U_10V

Close to A38
for VCCA LVDS.

C440

C440
22U_4V

22U_4V

C98

C98
22U_4V

22U_4V

3

12

C149

C149

0.1U_10V

0.1U_10V

Place C85 between
pin G41 & H41.

C167 0.1U_10VC167 0.1U_10V

12

Route +2.5VRUN from GMCH

12

C165

C165

0.01U_25V

0.01U_25V

+1.5V_RUN

PIN G41 to decoupling cap
< 200 mil to the edge.

Close to A28,B28
& C28.

12

12

C422

C422

C423

C423

10U_4V

10U_4V

0.1U_10V

0.1U_10V

12

12

C142

C142

C405

C405

0.1U_10V

0.1U_10V

0.022U_16V

0.022U_16V

FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC

L34

L34

1 2

BLM18PG181SN1

BLM18PG181SN1

12

C425

C425

0.1U_10V

0.1U_10V

+3V

12

C429

C429
10U_4V

10U_4V

12

VCCD_HV

C113

C113

0.022U_16V

0.022U_16V

12

3

C430

C430

0.1U_10V

0.1U_10V

+2.5V_RUN

12

+2.5V_RUN

C122

C122

0.1U_10V

0.1U_10V

VCC3G_PCIE

VCCA_3GPLL

VCCA_CRTDAC
VSSA_CRTDAC
VCCA_DPLLA

VCCA_DPLLB
VCCA_HPLL

+2.5V_RUN

VCCA_MPLL
VCC_TVBG

VSS_TVBG

VCC_TVDACA
VCC_TVDACB
VCC_TVDACC

VCCD_TVDAC

VCCD_HV

VCCQ_TVDAC

+1.5V_RUN

12

C143

C143

0.1U_10V

0.1U_10V

H22
C30

B30
A30

AJ41

AB41

Y41
V41
R41
N41

AC33

G41
H41

F21
E21
G21

B26
C39
AF1

A38
B39

AF2
H20

G20

E19
F19
C20
D20
E20
F20

AH1
AH2

A28
B28
C28

D21
A23

B23
B25

H19

AK31
AF31
AE31
AC31

AL30

AK30

AJ30
AH30
AG30
AF30
AE30
AD30
AC30
AG29
AF29
AE29
AD29
AC29
AG28
AF28
AE28
AH22

AJ21
AH21

AJ20
AH20
AH19

P19
P16

AH15

P15
AH14
AG14
AF14
AE14

Y14
AF13
AE13
AF12
AE12
AD12

L41

2

U31H

U31H

VCCSYNC
VCC_TXLVDS0

VCC_TXLVDS1
VCC_TXLVDS2

VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
VCCA_3GPLL
VCCA_3GBG
VSSA_3GBG

VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC

VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL

VCCA_LVDS
VSSA_LVDS

VCCA_MPLL
VCCA_TVBG

VSSA_TVBG

VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1

VCCD_HMPLL0
VCCD_HMPLL1

VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2

VCCD_TVDAC
VCC_HV0

VCC_HV1
VCC_HV2

VCCD_QTVDAC
VCCAUX0

VCCAUX1
VCCAUX2
VCCAUX3
VCCAUX4
VCCAUX5
VCCAUX6
VCCAUX7
VCCAUX8
VCCAUX9
VCCAUX10
VCCAUX11
VCCAUX12
VCCAUX13
VCCAUX14
VCCAUX15
VCCAUX16
VCCAUX17
VCCAUX18
VCCAUX19
VCCAUX20
VCCAUX21
VCCAUX22
VCCAUX23
VCCAUX24
VCCAUX25
VCCAUX26
VCCAUX27
VCCAUX28
VCCAUX29
VCCAUX30
VCCAUX31
VCCAUX32
VCCAUX33
VCCAUX34
VCCAUX35
VCCAUX36
VCCAUX37
VCCAUX38
VCCAUX39
VCCAUX40

2

POWER

POWER

1

AC14

VTT_0

AB14

VTT_1

W14

VTT_2

V14

VTT_3

T14

VTT_4

R14

VTT_5

P14

VTT_6

N14

VTT_7

M14

VTT_8

L14

VTT_9

AD13

VTT_10

AC13

VTT_11

AB13

VTT_12

AA13

VTT_13

Y13

VTT_14

W13

VTT_15

V13

VTT_16

U13

VTT_17

T13

VTT_18

R13

VTT_19

N13

VTT_20

M13

VTT_21

L13

VTT_22

AB12

VTT_23

AA12

VTT_24

Y12

VTT_25

W12

VTT_26

V12

VTT_27

U12

VTT_28

T12

VTT_29

R12

VTT_30

P12

VTT_31

N12

VTT_32

M12

VTT_33

L12

VTT_34

R11

VTT_35

P11

VTT_36

N11

VTT_37

M11

VTT_38

R10

VTT_39

P10

VTT_40

N10

VTT_41

M10

VTT_42

P9

VTT_43

N9

VTT_44

M9

VTT_45

R8

VTT_46

P8

VTT_47

N8

VTT_48

M8

VTT_49

P7

VTT_50

N7

VTT_51

M7

VTT_52

R6

VTT_53

P6

VTT_54

M6

VTT_55

A6

VTT_56

R5

VTT_57

P5

VTT_58

N5

VTT_59

M5

VTT_60

P4

VTT_61

N4

VTT_62

M4

VTT_63

R3

VTT_64

P3

VTT_65

N3

VTT_66

M3

VTT_67

R2

VTT_68

P2

VTT_69

M2

VTT_70

D2

VTT_71

AB1

VTT_72

R1

VTT_73

P1

VTT_74

N1

VTT_75

M1

VTT_76

Calistoga

Calistoga

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Calistoga (Power)

Calistoga (Power)

Calistoga (Power)

Date: Sheet

Date: Sheet

Date: Sheet

Quanta Computer Inc.

+1.05V_VCCP

12

C437

C437

2.2U_6.3V

2.2U_6.3V

Place in Cavity.

12

+

+

C400

C400
330U_2.5V

330U_2.5V

Place on the edge.

VTTLF_CAP3

12

Close to
AB1.

1

12

C433

C433

0.47U_10V

0.47U_10V

C436

C436

0.47U_10V

0.47U_10V

946Wednesday, November 16, 2005

946Wednesday, November 16, 2005

946Wednesday, November 16, 2005

Close to
D2.

Close to
A6.

VTTLF_CAP2
VTTLF_CAP1

PROJECT : SW1

PROJECT : SW1

PROJECT : SW1

12

C99

C99

4.7U_10V

4.7U_10V

12

C418

C418

0.22U_10V

0.22U_10V

of

of

of

12

C101

C101

0.22U_10V

0.22U_10V

1ACustom

1ACustom

1ACustom

5

U31I

U31I

AC41

VSS_0

AA41

VSS_1

W41

VSS_2

T41

VSS_3

P41

VSS_4

M41

VSS_5

J41

VSS_6

F41

VSS_7

AV40

VSS_8

AP40

VSS_9

AN40

VSS_10

AK40

VSS_11

D D

C C

B B

A A

AJ40
AH40
AG40
AF40
AE40

AY39

AW39

AV39
AR39
AN39

AJ39
AC39
AB39
AA39

W39

M39

G39
D39

AT38

AM38

AH38
AG38
AF38
AE38

C38
AK37
AH37
AB37
AA37

Y37

W37

V37

R37

P37

N37

M37

H37

G37

D37
AY36

AW36

AN36
AH36
AG36
AF36
AE36
AC36

C36

B36
BA35
AV35
AR35
AH35
AB35
AA35

Y35

W35

V35

R35

P35

N35

M35

H35

G35

D35
AN34

B40

Y39
V39

T39
R39
P39
N39

L39
J39
H39

F39

T37

L37
J37

F37

T35

L35
J35

F35

VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96

VSS

VSS

4

AK34

VSS_97

AG34

VSS_98

AF34

VSS_99

AE34

VSS_100

AC34

VSS_101

C34

VSS_102

AW33

VSS_103

AV33

VSS_104

AR33

VSS_105

AE33

VSS_106

AB33

VSS_107

Y33

VSS_108

V33

VSS_109

T33

VSS_110

R33

VSS_111

M33

VSS_112

H33

VSS_113

G33

VSS_114

F33

VSS_115

D33

VSS_116

B33

VSS_117

AH32

VSS_118

AG32

VSS_119

AF32

VSS_120

AE32

VSS_121

AC32

VSS_122

AB32

VSS_123

G32

VSS_124

B32

VSS_125

AY31

VSS_126

AV31

VSS_127

AN31

VSS_128

AJ31

VSS_129

AG31

VSS_130

AB31

VSS_131

Y31

VSS_132

AB30

VSS_133

E30

VSS_134

AT29

VSS_135

AN29

VSS_136

AB29

VSS_137

T29

VSS_138

N29

VSS_139

K29

VSS_140

G29

VSS_141

E29

VSS_142

C29

VSS_143

B29

VSS_144

A29

VSS_145

BA28

VSS_146

AW28

VSS_147

AU28

VSS_148

AP28

VSS_149

AM28

VSS_150

AD28

VSS_151

AC28

VSS_152

W28

VSS_153

J28

VSS_154

E28

VSS_155

AP27

VSS_156

AM27

VSS_157

AK27

VSS_158

J27

VSS_159

G27

VSS_160

F27

VSS_161

C27

VSS_162

B27

VSS_163

AN26

VSS_164

M26

VSS_165

K26

VSS_166

F26

VSS_167

D26

VSS_168

AK25

VSS_169

P25

VSS_170

K25

VSS_171

H25

VSS_172

E25

VSS_173

D25

VSS_174

A25

VSS_175

BA24

VSS_176

AU24

VSS_177

AL24

VSS_178

AW23

VSS_179

Calistoga

Calistoga

3

U31J

U31J

AT23

VSS_180

AN23

VSS_181

AM23

VSS_182

AH23

VSS_183

AC23

VSS_184

W23

VSS_185

K23

VSS_186

J23

VSS_187

F23

VSS_188

C23

VSS_189

AA22

VSS_190

K22

VSS_191

G22

VSS_192

F22

VSS_193

E22

VSS_194

D22

VSS_195

A22

VSS_196

BA21

VSS_197

AV21

VSS_198

AR21

VSS_199

AN21

VSS_200

AL21

VSS_201

AB21

VSS_202

Y21

VSS_203

P21

VSS_204

K21

VSS_205

J21

VSS_206

H21

VSS_207

C21

VSS_208

AW20

VSS_209

AR20

VSS_210

AM20

VSS_211

AA20

VSS_212

K20

VSS_213

B20

VSS_214

A20

VSS_215

AN19

VSS_216

AC19

VSS_217

W19

VSS_218

K19

VSS_219

G19

VSS_220

C19

VSS_221

AH18

VSS_222

P18

VSS_223

H18

VSS_224

D18

VSS_225

A18

VSS_226

AY17

VSS_227

AR17

VSS_228

AP17

VSS_229

AM17

VSS_230

AK17

VSS_231

AV16

VSS_232

AN16

VSS_233

AL16

VSS_234

J16

VSS_235

F16

VSS_236

C16

VSS_237

AN15

VSS_238

AM15

VSS_239

AK15

VSS_240

N15

VSS_241

M15

VSS_242

L15

VSS_243

B15

VSS_244

A15

VSS_245

BA14

VSS_246

AT14

VSS_247

AK14

VSS_248

AD14

VSS_249

AA14

VSS_250

U14

VSS_251

K14

VSS_252

H14

VSS_253

E14

VSS_254

AV13

VSS_255

AR13

VSS_256

AN13

VSS_257

AM13

VSS_258

AL13

VSS_259

AG13

VSS_260

P13

VSS_261

F13

VSS_262

D13

VSS_263

B13

VSS_264

AY12

VSS_265

AC12

VSS_266

K12

VSS_267

H12

VSS_268

E12

VSS_269

AD11

VSS_270

AA11

VSS_271

Y11

VSS_272

2

VSS

VSS

VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
VSS_359
VSS_360

Calistoga

Calistoga

J11
D11
B11
AV10
AP10
AL10
AJ10
AG10
AC10
W10
U10
BA9
AW9
AR9
AH9
AB9
Y9
R9
G9
E9
A9
AG8
AD8
AA8
U8
K8
C8
BA7
AV7
AP7
AL7
AJ7
AH7
AF7
AC7
R7
G7
D7
AG6
AD6
AB6
Y6
U6
N6
K6
H6
B6
AV5
AF5
AD5
AY4
AR4
AP4
AL4
AJ4
Y4
U4
R4
J4
F4
C4
AY3
AW3
AV3
AL3
AH3
AG3
AF3
AD3
AC3
AA3
G3
AT2
AR2
AP2
AK2
AJ2
AD2
AB2
Y2
U2
T2
N2
J2
H2
F2
C2
AL1

1

PROJECT : SW1

PROJECT : SW1

PROJECT : SW1

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Calistoga (VSS)

Calistoga (VSS)

Calistoga (VSS)

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Quanta Computer Inc.

of

of

of

10 46Wednesday, November 16, 2005

10 46Wednesday, November 16, 2005

10 46Wednesday, November 16, 2005

1

1ACustom

1ACustom

1ACustom

1

2

3

4

5

6

7

8

C381

C381
15P_50V

15P_50V

ICH_RTCX1
ICH_RTCX2

ICH_RTCRST#
SM_INTRUDER#

SM_INTVRMEN

ACZ_BIT_CLK
ACZ_SYNC

ACZ_RST#

ACZ_SDOUT

SATA_TX0+_C

SATABIAS

12

R378 8.2KR378 8.2K

R365 10MR365 10M

W1

W1

1 4
2 3

32.768KHZ

32.768KHZ

AB1
AB2

AA3

AF18

AF3
AE3
AG2
AH2

AF7
AE7
AG6
AH6

AF1
AE1

AH10
AG10

AF15
AH15
AF16
AH16
AG16
AE15

12

12

Y5

W4
W1

Y1
Y2

W3

V3
U3
U5

V4

T5
U7

V6

V7
U1

R6
R5

T2

T3

T1

T4

ICH_RTCX2ICH_RTCX1

U30A

U30A

RTXC1
RTCX2

RTCRST#
INTRUDER#

INTVRMEN
EE_CS

EE_SHCLK
EE_DOUT
EE_DIN

LAN_CLK
LAN_RSTSYNC
LAN_RXD0

LAN_RXD1
LAN_RXD2

LAN_TXD0
LAN_TXD1
LAN_TXD2

ACZ_BIT_CLK
ACZ_SYNC

ACZ_RST#
ACZ_SDIN0

ACZ_SDIN1
ACZ_SDIN2

ACZ_SDOUT
SATALED#
SATA0RXN

SATA0RXP
SATA0TXN
SATA0TXP

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

SATA_CLKN
SATA_CLKP

SATARBIASN
SATARBIASP

DIOR#
DIOW#
DDACK#
IDEIRQ
IORDY
DDREQ

12

C383

C383
15P_50V

15P_50V

LPCCPU

LPCCPU

RTCLAN

RTCLAN

AC-97/AZALIA

AC-97/AZALIA

SATA

SATA

IDE

IDE

LAD0
LAD1
LAD2
LAD3

LDRQ0#

LDRQ1#/GPIO23

LFRAME#
A20GATE

A20M#

CPUSLP#

TP1/DPRSTP#

TP2/DPSLP#

FERR#

GPIO49/CPUPWRGD

IGNNE#

INIT3_3V#

INIT#

INTR

RCIN#

SMI#

STPCLK#

THERMTRIP#

DD10
DD11
DD12
DD13
DD14
DD15

DCS1#
DCS3#

ICH7-M

ICH7-M

NMI

DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9

DA0
DA1
DA2

AA6
AB5
AC4
Y6

LDRQ#0

AC3

LDRQ#1

AA5
AB3

GATEA20

AE22
AH28

R369 *0_NCR369 *0_NC

AG27
AF24

AH25
AG26
AG24

AG22
AG21
AF22
AF25

AG23
AH24

AF23
AH22
AF26

AB15
AE14
AG13
AF13
AD14
AC13
AD12
AC12
AE12
AF12
AB13
AC14
AF14
AH13
AH14
AC15

AH17
AE17
AF17

AE16
AD16

1 2

R131 0R131 0

1 2

R370 0R370 0

1 2

H_FERR#

RCIN#

R132 0R132 0

1 2

THERMTRIP#_ICH

IDE_DD0
IDE_DD1
IDE_DD2
IDE_DD3
IDE_DD4
IDE_DD5
IDE_DD6
IDE_DD7
IDE_DD8

IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15

IDE_DA0
IDE_DA1
IDE_DA2

IDE_DCS1#
IDE_DCS3#

LAD0/FWH0 24,25
LAD1/FWH1 24,25
LAD2/FWH2 24,25
LAD3/FWH3 24,25

LDRQ#0 25

T37T37

LFRAME#/FWH4 24,25

GATEA20 25
H_A20M# 3

H_DPRSTP#
H_DPSLP#

H_FERR# 3

H_PWRGOOD 3

H_IGNNE# 3
H_INIT# 3

H_INTR 3

RCIN# 25

H_NMI 3
H_SMI# 3

H_STPCLK# 3

IDE_DD[0..15]

IDE_DA0 21
IDE_DA1 21
IDE_DA2 21

IDE_DCS1# 21
IDE_DCS3# 21IDE_DDREQ21

H_CPUSLP# 3,5
H_DPRSTP# 3,39

H_DPSLP# 3

IDE_DD[0..15] 21

+3V

R371

R371

R133

R133
10K

10K

10K

10K

1 2

GATEA20
RCIN#

H_FERR#
H_DPRSTP#
H_DPSLP#

Depop R369 if the MCH is driving
CPUSLP# to the CPU. Place the
resistors from ICH & MCH close
together minimize stubs for either
pop option.

THERMTRIP#_ICH

1 2

R12956R129
56

1 2

+1.05V_VCCP

1 2

+1.05V_VCCP

R124

R124
*56_NC

*56_NC

1 2

R13056R130
56

1 2

R122

R122
*56_NC

*56_NC

32.768KHZ

Pop R123 & no pop R125

RTC

3VPCU

A A

VCCRTC_2

12

5VPCU

R109 1.2KR109 1.2K

R107

R107

B B

4.7K

4.7K

R105

R105
15K

15K

SATA_TX0-21
SATA_TX0+21

Distance between the ICH-7 M and cap on the "P"
signal should be identical distance between the
ICH-6 M and cap on the "N" signal for same pair.

C C

D3

D3
CH500H-40

CH500H-40

D4

D4

R1111KR111

CH500H-40

CH500H-40

1K

+COINCELL

BT1

BT1
BAT_CONN

BAT_CONN

20MIL 20MIL

R110 1KR110 1K

C396 3900P_25VC396 3900P_25V
C395 3900P_25VC395 3900P_25V

12
12

12

VCCRTC_3VCCRTC_1

to enable internal VR.

T36 PADT36 PAD
T43 PADT43 PAD
T48 PADT48 PAD

T47 PADT47 PAD
T50 PADT50 PAD

T41 PADT41 PAD
T34 PADT34 PAD
T39 PADT39 PAD

T44 PADT44 PAD
T109PADT109PAD

+3V

12

R379 24.9/FR379 24.9/F

+RTC_CELL

12

12

R128

R128

R123

R123

C178

C178
1U_10V

1U_10V

R1261MR126
1M

12

Q8

Q8

13

MMBT3904

MMBT3904

2

SATA_TX0-_C
SATA_TX0+_C SATA_TX0-_C

Place within 500mils
of ICH7 ball

332K/F

332K/F

R125

R125
*0_NC

*0_NC

20K

20K

1 2

12

C181

C181
1U_10V

1U_10V

ICH_AZ_CODEC_SDIN030

SATA_LED#28

SATA_RX0-21

SATA_RX0+21

CLK_PCIE_SATA#17
CLK_PCIE_SATA17

IDE_DIOR#21
IDE_DIOW#21
IDE_DDACK#21
IDE_IRQ21
IDE_DIORDY21

R145 33R145 33

ICH_AZ_CODEC_BITCLK30

D D

ICH_AZ_CODEC_SYNC30
ICH_AZ_CODEC_RST#30
ICH_AZ_CODEC_SDOUT30

1

1 2

C205

C205
*27P_50V_NC

*27P_50V_NC

1 2

R161 33R161 33

1 2

R158 33R158 33

1 2

R157 33R157 33

1 2

2

ACZ_BIT_CLK

ACZ_SYNC

ACZ_RST#

ACZ_SDOUT

C179

C179
*0.1U_10V_NC

*0.1U_10V_NC

1 2

R130 & C179 should be placed as
close as possable to ICH ball.

PROJECT : SW1

PROJECT : SW1

PROJECT : SW1

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

ICH7-M (CPU,IDE,SATA,LPC,AC97)

ICH7-M (CPU,IDE,SATA,LPC,AC97)

ICH7-M (CPU,IDE,SATA,LPC,AC97)

Date: Sheet

Date: Sheet

3

4

5

6

Date: Sheet

Quanta Computer Inc.

7

1ACustom

1ACustom

1ACustom

of

of

of

11 46Wednesday, November 16, 2005

11 46Wednesday, November 16, 2005

11 46Wednesday, November 16, 2005

8

1

Place TX DC blocking caps close ICH7.

C240 0.1U_10VC240 0.1U_10V

PCIE_TX1-24
PCIE_TX1+24
PCIE_TX2-24
PCIE_TX2+24

A A

B B

C C

D D

PCI_PIRQC: 1394/Media Card
PCI_PIRQD: for 1394

PCIE_TX3-33
PCIE_TX3+33

3VSUS

PCI_AD[0..31]22,42

OC2#
OC4#
OC1#
OC3#

PCI_PIRQA#42
PCI_PIRQB#42

PCI_PIRQC#22

PCI_PIRQD#22

1

1 2

C237 0.1U_10VC237 0.1U_10V

1 2

C234 0.1U_10VC234 0.1U_10V

1 2

C229 0.1U_10VC229 0.1U_10V

1 2

C223 0.1U_10VC223 0.1U_10V

1 2

C217 0.1U_10VC217 0.1U_10V

1 2

Place series terms close
to source.

RP32

RP32

6
7
8
9

10

10P8R-10K

10P8R-10K

T28 PADT28 PAD
T33 PADT33 PAD
T113 PADT113 PAD
T116 PADT116 PAD
T29 PADT29 PAD

5
4
3
2
1

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

2

PCIE_TXN1_C
PCIE_TXP1_C
PCIE_TXN2_C
PCIE_TXP2_C PCIE_TXP2_C
PCIE_TXN3_C
PCIE_TXP3_C

T108

T108
T56

T56
T107

T107
T61

T61
T53

T53

3VSUS

2

C18

C14
D14
C13

G15
G13

C11
D11

AE5
AD5
AG4
AH4
AD9

E18
A16

F18
E16
A18
E17
A17
A15

E14
B12

E12

A11
A10
F11
F10

D9

C7

D6

C5

OC5#
OC0#
OC7#
OC6#

E9
B9

A8
A6

B6
E6

A3
B4

B5

PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD

U30B

U30B

SPI_CLK
SPI_CS#
NVM_ARB

SPI_MOSI
SPI_MISO

AD0

PCI

PCI

AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

Interrupt I/F

Interrupt I/F

PIRQA#
PIRQB#
PIRQC#
PIRQD#

RSVD[1]
RSVD[2]
RSVD[3]
RSVD[4]
RSVD[5]

MISC

MISC

REQ4#/GPIO22
GNT4#/GPIO48

GPIO1/REQ5#

GPIO17/GNT5#

GPIO2/PIRQE#
GPIO3/PIRQF#
GPIO4/PIRQG#
GPIO5/PIRQH#

MCH_SYNC#

3

PCIE_RX1-24
PCIE_RX1+24

Express Card

PCIE_RX2-24
PCIE_RX2+24

MiniWLAN

PCIE_RX3-33
PCIE_RX3+33

82573 GLAN

PAD

PAD

T59

T59

PAD

PAD

T57

T57

PAD

PAD

T64

T64

PAD

PAD

T58

T58

+3V

12

R163

R163
10K

10K

D7

REQ0#

E7

GNT0#

C16

REQ1#

D16

GNT1#

C17

REQ2#

D17

GNT2#

E13

REQ3#

F13

GNT3#

A13
A14
C8
D8

B15

C/BE0#

C12

C/BE1#

D12

C/BE2#

C15

C/BE3#

A7

IRDY#

E10

PAR

B18

PCIRST#

A12

DEVSEL#

C9

PERR#

E11

PLOCK#

B10

SERR#

F15

STOP#

F14

TRDY#

F16

FRAME#

C26

PLTRST#

A9

PCICLK

B19

PME#

G8
F7
F8
G7

AE9

RSVD[6]

AG8

RSVD[7]

AH8

RSVD[8]

F21

RSVD[9]

AH20

ICH7-M

ICH7-M

3

12

R162

R162
10K

10K

PCI_REQ0#
PCI_GNT0#
PCI_REQ1#
PCI_GNT1#
PCI_REQ2#
PCI_GNT2#
PCI_REQ3#
PCI_GNT3#
PCI_REQ4#
PCI_GNT4#
PCI_REQ5#
PCI_GNT5#

PCI_IRDY#
PCI_RST#_G

PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#

PCI_PLTRST#
CLK_PCI_ICH

ICH_GPIO2_PIRQE#
ICH_GPIO3_PIRQF#
ICH_GPIO4_PIRQG#
ICH_GPIO5_PIRQH#

12

R160

R160
10K

10K

PCIE_TXN1_C
PCIE_TXP1_C

PCIE_TXN2_C

PCIE_RX3­PCIE_RX3+
PCIE_TXN3_C
PCIE_TXP3_C

PCIE_RX4­PCIE_RX4+
PCIE_TXN4_C
PCIE_TXP4_C

OC0#
OC1#
OC2#
OC3#
OC4#
OC5#
OC6#
OC7#

4

U30D

U30D

F26

PERn1

F25

PERp1

E28

PETn1

E27

PETp1

H26

PERn2

H25

PERp2

G28

PETn2

G27

PETp2

K26

PERn3

K25

PERp3

J28

PETn3

J27

PETp3

M26

PERn4

M25

PERp4

L28

PETn4

L27

PETp4

P26

PERn5

P25

PERp5

N28

PETn5

N27

PETp5

T25

PERn6

T24

PERp6

R28

PETn6

R27

PETp6

R2

SPI_CLK

P6

SPI_CS#

P1

SPI_ARB

P5

SPI_MOSI

P2

SPI_MISO

D3

OC0#

C4

OC1#

D5

OC2#

D4

OC3#

E5

OC4#

C3

OC5#/GPIO29

A2

OC6#/GPIO30

B3

OC7#/GPIO31

PCI_REQ0# 42
PCI_GNT0# 42

T71PAD T71PAD

PCI_REQ2# 22
PCI_GNT2# 22

PCI_C_BE0# 22,42
PCI_C_BE1# 22,42
PCI_C_BE2# 22,42
PCI_C_BE3# 22,42

PCI_IRDY# 22,42
PCI_PAR 22,42

PCI_DEVSEL# 22,42
PCI_PERR# 22,42
PCI_PLOCK#
PCI_SERR# 22,42
PCI_STOP# 22,42
PCI_TRDY# 22,42
PCI_FRAME# 22,42

CLK_PCI_ICH 17
ICH_PME# 22,42

MCH_ICH_SYNC# 6

REQ2 : 1394/Media Card

T75PAD T75PAD

T27PAD T27PAD
T112PAD T112PAD

4

5

V26

DMI0RXN

V25

DMI0RXP

U28

DMI0TXN

U27

DMI0TXP

Y26

DMI1RXN

Y25

DMI1RXP

W28

DMI1TXN

W27

DMI1TXP

AB26

DMI2RXN

AB25

DMI2RXP

AA28

DMI2TXN

AA27

DMI2TXP

AD25

DMI3RXN

AD24

DMI3RXP

AC28

DMI3TXN

AC27

DMI3TXP

PCI-Express

PCI-Express

Direct Media Interface

Direct Media Interface

DMI_ZCOMP

DMI_IRCOMP

SPI

SPI

USB

USB

USBRBIAS#

Short D2 and D1 at the package
and keep length to less than
500mils. Trace Impedance
should be 60ohms +/- 15%.

DMI_CLKN
DMI_CLKP

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P

USBRBIAS

ICH7-M

ICH7-M

AE28
AE27

C25
D25

F1
F2
G4
G3
H1
H2
J4
J3
K1
K2
L4
L5
M1
M2
N4
N3

D2
D1

DMI_COMP

USBRBIAS

11LPC
PCI
SPI1001

PCI_GNT4#
PCI_GNT5#

R175

R175

R314

R314

*1K_NC

*1K_NC

*1K_NC

*1K_NC

1 2

1 2

GNT0

DOCK
Cardbus or

Cardbus/1394
1394/MediaCard

LOM(4401)

REQ0

REQ1

REQ2

REQ3

GNT1

GNT2

GNT3

5

R180 24.9/FR180 24.9/F

USBP3­USBP3+

R338

R338

22.6/F

22.6/F

1 2

GNT5# GNT4#

No stuff
No stuff
Stuff

PIRQA

PIRQD
PIRQC

PIRQD
PIRQB

6

DMI_MTX_IRX_N0 6
DMI_MTX_IRX_P0 6

DMI_MRX_ITX_N0 6
DMI_MRX_ITX_P0 6

DMI_MTX_IRX_N1 6
DMI_MTX_IRX_P1 6

DMI_MRX_ITX_N1 6
DMI_MRX_ITX_P1 6

DMI_MTX_IRX_N2 6
DMI_MTX_IRX_P2 6

DMI_MRX_ITX_N2 6
DMI_MRX_ITX_P2 6

DMI_MTX_IRX_N3 6
DMI_MTX_IRX_P3 6

DMI_MRX_ITX_N3 6
DMI_MRX_ITX_P3 6

CLK_PCIE_ICH# 17
CLK_PCIE_ICH 17

12

USBP0- 26
USBP0+ 26
USBP1- 26
USBP1+ 26
USBP2- 26
USBP2+ 26

T69PAD T69PAD

T68PAD T68PAD

USBP4- 35
USBP4+ 35
USBP5- 27
USBP5+ 27
USBP6- 24
USBP6+ 24
USBP7- 24
USBP7+ 24

+1.5V_RUN

Ext Right Side Top
Ext Right Side
Ext Left Side

Dock
Bluetooth
Mini Card
Express Card

PCI Pullups

No stuff
Stuff
No stuff

CLK_PCI_ICH

R320

R320
*10_NC

*10_NC

1 2

C367

C367
*8.2P_16V_NC

*8.2P_16V_NC

1 2

Reserved for EMI.
Place resister and cap
close to ICH.

6

7

Place within 500mils of ICH7

RP28

ICH_GPIO2_PIRQE#
ICH_GPIO5_PIRQH#
ICH_GPIO4_PIRQG#
PCI_REQ5#

+3V

PCI_REQ4#
PCI_TRDY#
PCI_DEVSEL#
PCI_REQ3#

+3V

PCI_PIRQC#
PCI_PIRQB#
PCI_PIRQA#

+3V

C364

C364

1 2

0.047U_10V

0.047U_10V

PCI_RST#_G

C246

C246

1 2

0.047U_10V

0.047U_10V

PCI_PLTRST#

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

ICH7-M (USB,DMI,PCIE,PCI)

ICH7-M (USB,DMI,PCIE,PCI)

ICH7-M (USB,DMI,PCIE,PCI)

Date: Sheet

Date: Sheet

Date: Sheet

7

RP28

6
7
8
9

10

10P8R-8.2K

10P8R-8.2K
RP27

RP27

6
7
8
9

10

10P8R-8.2K

10P8R-8.2K
RP29

RP29

6
7
8
9

10

10P8R-8.2K

10P8R-8.2K

+3V

5

U28

U28

2
1

7SH32

7SH32

+3V

5

U14

U14

2
1

7SH32

7SH32

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

5
4
3
2
1

5
4
3
2
1

5
4
3
2
1

Add Buffers as needed for
Loading and fanout concerns.

4

4

PROJECT : SW1

PROJECT : SW1

PROJECT : SW1

8

+3V

PCI_PERR#
PCI_SERR#
PCI_PLOCK#

+3V

PCI_STOP#
PCI_FRAME#
PCI_REQ1#
PCI_REQ2#

+3V

PCI_PIRQD#
ICH_GPIO3_PIRQF#
PCI_IRDY#
PCI_REQ0#

PCI_RST# 22,42

PLTRST# 6,13,19,21,24,33

of

of

of

12 46Wednesday, November 16, 2005

12 46Wednesday, November 16, 2005

12 46Wednesday, November 16, 2005

8

1ACustom

1ACustom

1ACustom

1

2

3

4

5

6

7

8

+3V

R374

R374

8.2K

8.2K

1 2

CLKRUN#

12

A A

R375

R375
*10_NC

*10_NC

Option to " Disable "
clkrun. Pulling it down
will keep the clks
running.

3V_S5

3V_S5

RP30

RP30

3
1

4P2R-2.2K

4P2R-2.2K

RP26

RP26

3
1

4P2R-2.2K

4P2R-2.2K

3V_S5

4
2

4
2

R166

R166
680

680

1 2

ICH_PCIE_WAKE#

LINKALERT#
SMBALERT#

ICH_SMBDATA
ICH_SMBCLK

3V_S5

R431 8.2KR431 8.2K

R181 10KR181 10K

1 2

R204 10KR204 10K

1 2

R262 10KR262 10K

1 2

R316 10KR316 10K

R348 10KR348 10K

R322 10KR322 10K

PM_BATLOW#_R

12

SWI#

DNBSWON#

ITP_DBRESET#

ICH_SMLINK0

12

ICH_SMLINK1

12

KBSMI#

THERM_ALERT#

RUNTIME_SCI#_R

SERIRQ

PM_RSMRST#_R

R135 8.2KR135 8.2K

R137 10KR137 10K

R372 10KR372 10K

R140 8.2KR140 8.2K

PCIe wake event.

U30C

+3V

R144
No stuff-->boot
Stuff-->No boot

B B

VR_PWRGD_CK410#17,39

C C

SPKR30

1
2

R144

R144
*1K_NC

*1K_NC

+3V

U12

U12

5

VR_PWRGD VR_PWRGD

43

NL17SZ14DFT2G

NL17SZ14DFT2G

T89 PADT89 PAD

SCI#25

KBSMI#25

ICH_SMBCLK17,24
ICH_SMBDATA17,24

ICH_PCIE_WAKE#24,33
SERIRQ22,25

THERM_ALERT#29

3V_S5

ITP_DBRESET#3

PM_BMBUSY#6

H_STP_CPU#17

SUS_STAT#22,25

T79 PADT79 PAD

H_STP_PCI#17

CLKRUN#22,25,42

R313 8.2KR313 8.2K

R139 0R139 0
R189 0R189 0

ICH_SMBCLK
ICH_SMBDATA
LINKALERT#
ICH_SMLINK0
ICH_SMLINK1

ICH_RI#

ICH_RI#22

12

SMBALERT# ICH_PWROK

T104 PADT104 PAD
T149 PADT149 PAD

T150 PADT150 PAD

CLKRUN#

T35 PADT35 PAD

BOARD_ID2

ICH_PCIE_WAKE#
SERIRQ
THERM_ALERT#

RUNTIME_SCI#_R

EXTSMI#_R

U30C

C22

SMBCLK

B22

SMBDATA

A26

LINKALERT#

B25

SMLINK0

A25

SMLINK1

A28

RI#

A19

SPKR

A27

SUS_STAT#

A22

SYS_RST#

AB18

GPIO0/BM_BUSY#

B23

GPIO11/SMBALERT#

AC20

GPIO18/STPPCI#

AF21

GPIO20/STPCPU#

A21

GPIO26

B21

GPIO27

E23

GPIO28

AG18

GPIO32/CLKRUN#

AC19

GPIO33/AZ_DOCK_EN#

U2

GPIO34/AZ_DOCK_RST#

F20

WAKE#

AH21

SERIRQ

AF20

THRM#

AD22

VRMPWRGD

AC21

GPIO6

AC18

GPIO7

E21

GPIO8

SMB

SMB

SYS

SYS

GPIO

GPIO

GPIO

GPIO

GPIO21/SATA0GP
GPIO19/SATA1GP
GPIO36/SATA2GP

SATA

GPIO

SATA

GPIO

GPIO37/SATA3GP

Clocks

Clocks

GPIO16/DPRSLPVR

TP0/BATLOW#

PWRBTN#

LAN_RST#

Power MGT

Power MGT

RSMRST#

CLK14

CLK48
SUSCLK
SLP_S3#

SLP_S4#
SLP_S5#

PWROK

GPIO9

GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
GPIO24
GPIO25
GPIO35
GPIO38
GPIO39

ICH7-M

ICH7-M

AF19
AH18
AH19
AE19

AC1
B2

C20
B24

D23
F22

AA4
AC22
C21
C23

C19
Y4
E20

A20
F19
E19
R4
E22
R3
D20
AD21
AD20
AE20

BOARD_ID1
BOARD_ID0
BOARD_ID3
BOARD_ID4

CLK_ICH_14M
CLK_ICH_48M

ICH_SUSCLK

R310 100/FR310 100/F
R185 100/FR185 100/F

PM_DPRSLPVR
PM_BATLOW#_R
DNBSWON#

R146 *100/F_NCR146 *100/F_NC
R318 100/FR318 100/F

SWI#

WAKE_SCI#_R

R155 *0_NCR155 *0_NC

AMP_BEEP

CLK_ICH_14M 17
CLK_ICH_48M 17

T77PAD T77PAD

SUSB# 25
SUSC# 25

T66PAD T66PAD

PM_DPRSLPVR 6,39

R188 100/FR188 100/F

R121 100/FR121 100/F

SWI# 25

DNBSWON# 25

RSMRST#

PLTRST# 6,12,19,21,24,33

T103PAD T103PAD
T67PAD T67PAD
T73PAD T73PAD
T52PAD T52PAD
T74PAD T74PAD

T51PAD T51PAD
T60PAD T60PAD
T32PAD T32PAD
T31PAD T31PAD

+3V

12

12

12

12

BATLOW# 25

RSMRST#PM_RSMRST#_R

LAN_DISABLE# 25,33

RSMRST# 25

ICH_PWROK
PM_DPRSLPVR
RSMRST#

R120

R120
*10K_NC

*10K_NC

1 2

12

R134

R134
100K

100K

1 2

Place these close to ICH7.

CLK_ICH_48M

CLK_ICH_14M

12

R315

R315
*10_NC

*10_NC

12

C363

C363
*4.7P_50V_NC

*4.7P_50V_NC

12

R367

R367
*10_NC

*10_NC

12

C384

C384
*4.7P_50V_NC

*4.7P_50V_NC

R114

R114
10K

10K

MBID Table MBID0 MBID1

Low

TW3
DW1
SW1
...

MBID2
SATA
PATA

D D

Low

High

Low
Low High
High High

Low
High

BOARD ID Selection

12

R376

R376
*10K_NC

*10K_NC

BOARD_ID0 BOARD_ID1

12

R377

R377
10K

10K

12

R127

R127
10K

10K

12

R141

R141
*10K_NC

*10K_NC

+3V+3V +3V

12

R308

R308
*10K_NC

*10K_NC

BOARD_ID2 BOARD_ID3 BOARD_ID4

12

R307

R307
10K

10K

+3V +3V

R373

R373
*10K_NC

*10K_NC

12

R311

R311
10K

10K

12

R136

R136
*10K_NC

*10K_NC

R317

R317
10K

10K

3VSUS

C166

C166

0.047U_10V

0.047U_10V
U11

U11

DELAY_VR_PWRGOOD6,39

PWROK25

2
1

12

TC7SH08FU

TC7SH08FU

3 5

R200

R200
100K

100K

4

ICH_PWROK

ICH_PWROK

PROJECT : SW1

PROJECT : SW1

BOARD_ID0
BOARD_ID1
BOARD_ID2

1

2

3

BOARD_ID0 25
BOARD_ID1 25
BOARD_ID2 25

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

ICH7-M (PM,GPIO,SMB)

ICH7-M (PM,GPIO,SMB)

ICH7-M (PM,GPIO,SMB)

Date: Sheet

Date: Sheet

4

5

6

Date: Sheet

7

PROJECT : SW1

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

of

of

of

13 46Wednesday, November 16, 2005

13 46Wednesday, November 16, 2005

13 46Wednesday, November 16, 2005

8

1ACustom

1ACustom

1ACustom

1

R138 100R138 100

L29

L29

1 2

C394

C394

0.01U_25V

0.01U_25V

1 2

D5

D5

2 1

CH751H-40HPT

CH751H-40HPT

R172 10R172 10

1 2

D7

D7

2 1

CH751H-40HPT

CH751H-40HPT

+1.5VRUN_L

12

+

+

C387

C387
150U_2V

150U_2V

+5V

+3V

A A

5VPCU

3VPCU

FB_60ohm+-25%_100mHz_3000mA_0.025ohm DC

+1.5V_RUN

B B

C C

+1.5V_RUN

BLM21PG600SN1D

BLM21PG600SN1D

12

R381

R381

0.5/F

0.5/F

FB_600ohm+-25%_100mHz
_200mA_0.5ohm DC

L31

L31
BLM11A601S

BLM11A601S

1 2

+1.5V_DMIPLL

C398

C398

4.7U_6.3V

4.7U_6.3V

1 2

+1.5V_RUN

12

R380

R380

0.5/F

0.5/F

12

L30

L30
10uH_100MA

10uH_100MA

1 2

10uH+-20%_100mA

VCCSATPLL

12

C386

C385

C385

0.1U_10V

0.1U_10V

1 2

D D

C386
10U_6.3V

10U_6.3V

3V_S5

1

1 2

1 2

+1.5V_RUN

C242

C242

0.1U_10V

0.1U_10V

1 2

2

ICH_V5REF_RUN

C180

C180

0.1U_10V

0.1U_10V

ICH_V5REF_SUS

C233

C233

0.1U_10V

0.1U_10V

C382

C382

0.1U_10V

0.1U_10V

1 2

+3V

1 2

+3V

1 2

C248

C248

0.1U_10V

0.1U_10V

1 2

2

C231

C231
*0.1U_10V_NC

*0.1U_10V_NC

1 2

12

C235

C235
*1U_6.3V_NC

*1U_6.3V_NC

C379

C379

0.1U_10V

0.1U_10V

1 2

+1.5V_RUN

C244

C244

0.1U_10V

0.1U_10V

+1.5V_RUN

C182

C182

0.1U_10V

0.1U_10V

T111PADT111 PAD
T38 PADT38 PAD

C372

C372

0.1U_10V

0.1U_10V

1 2

+1.5V_DMIPLL

+1_5V_SATA_RX

C183

C183

0.1U_10V

0.1U_10V

1 2

VCCSATPLL

+1_5V_SATA_TX

12

C195

C195
1U_10V

1U_10V

TP_VCCSUSLAN1
TP_VCCSUSLAN2

3

U30F

U30F

G10

AD17

F6

AA22
AA23
AB22
AB23
AC23
AC24
AC25
AC26
AD26
AD27
AD28

D26
D27
D28
E24
E25
E26
F23
F24
G22
G23
H22
H23
J22
J23
K22
K23
L22

L23
M22
M23
N22
N23

P22

P23
R22
R23
R24
R25
R26

T22

T23

T26

T27

T28
U22
U23

V22

V23

W22
W23

Y22

Y23

B27

AG28

AB7
AC6
AC7
AD6
AE6
AF5
AF6
AG5
AH5

AD2

AH11
AB10

AB9

AC10
AD10
AE10
AF10

AF9
AG9
AH9

E3

C1

AA2

Y7

ICH7-M

ICH7-M

3

V5REF[1]
V5REF[2]
V5REF_Sus
Vcc1_5_B[1]

Vcc1_5_B[2]
Vcc1_5_B[3]
Vcc1_5_B[4]
Vcc1_5_B[5]
Vcc1_5_B[6]
Vcc1_5_B[7]
Vcc1_5_B[8]
Vcc1_5_B[9]
Vcc1_5_B[10]
Vcc1_5_B[11]
Vcc1_5_B[12]
Vcc1_5_B[13]
Vcc1_5_B[14]
Vcc1_5_B[15]
Vcc1_5_B[16]
Vcc1_5_B[17]
Vcc1_5_B[18]
Vcc1_5_B[19]
Vcc1_5_B[20]
Vcc1_5_B[21]
Vcc1_5_B[22]
Vcc1_5_B[23]
Vcc1_5_B[24]
Vcc1_5_B[25]
Vcc1_5_B[26]
Vcc1_5_B[27]
Vcc1_5_B[28]
Vcc1_5_B[29]
Vcc1_5_B[30]
Vcc1_5_B[31]
Vcc1_5_B[32]
Vcc1_5_B[33]
Vcc1_5_B[34]
Vcc1_5_B[35]
Vcc1_5_B[36]
Vcc1_5_B[37]
Vcc1_5_B[38]
Vcc1_5_B[39]
Vcc1_5_B[40]
Vcc1_5_B[41]
Vcc1_5_B[42]
Vcc1_5_B[43]
Vcc1_5_B[44]
Vcc1_5_B[45]
Vcc1_5_B[46]
Vcc1_5_B[47]
Vcc1_5_B[48]
Vcc1_5_B[49]
Vcc1_5_B[50]
Vcc1_5_B[51]
Vcc1_5_B[52]
Vcc1_5_B[53]

Vcc3_3[1]
VccDMIPLL
Vcc1_5_A[1]

Vcc1_5_A[2]
Vcc1_5_A[3]
Vcc1_5_A[4]
Vcc1_5_A[5]
Vcc1_5_A[6]
Vcc1_5_A[7]
Vcc1_5_A[8]
Vcc1_5_A[9]

VccSATAPLL
Vcc3_3[2]
Vcc1_5_A[10]

Vcc1_5_A[11]
Vcc1_5_A[12]
Vcc1_5_A[13]
Vcc1_5_A[14]
Vcc1_5_A[15]
Vcc1_5_A[16]
Vcc1_5_A[17]
Vcc1_5_A[18]

VccSus3_3[19]
VccUSBPLL
VccSus1_05/VccLAN1_05[1]

VccSus1_05/VccLAN1_05[2]

VCC PAUX

VCC PAUX

VccSus3_3/VccLAN3_3[1]
VccSus3_3/VccLAN3_3[2]
VccSus3_3/VccLAN3_3[3]
VccSus3_3/VccLAN3_3[4]

VccSus3_3/VccSusHDA

VCCA3GP

VCCA3GP

ATXARX

ATXARX

4

Vcc1_05[1]
Vcc1_05[2]
Vcc1_05[3]
Vcc1_05[4]
Vcc1_05[5]
Vcc1_05[6]
Vcc1_05[7]
Vcc1_05[8]
Vcc1_05[9]

CORE

CORE

Vcc1_05[10]
Vcc1_05[11]
Vcc1_05[12]
Vcc1_05[13]
Vcc1_05[14]
Vcc1_05[15]
Vcc1_05[16]
Vcc1_05[17]
Vcc1_05[18]
Vcc1_05[19]
Vcc1_05[20]

Vcc3_3/VccHDA

V_CPU_IO[1]
V_CPU_IO[2]
V_CPU_IO[3]

Vcc3_3[3]
Vcc3_3[4]
Vcc3_3[5]
Vcc3_3[6]
Vcc3_3[7]
Vcc3_3[8]

IDE

IDE

Vcc3_3[9]
Vcc3_3[10]
Vcc3_3[11]

Vcc3_3[12]
Vcc3_3[13]
Vcc3_3[14]
Vcc3_3[15]
Vcc3_3[16]

PCI

PCI

Vcc3_3[17]
Vcc3_3[18]
Vcc3_3[19]
Vcc3_3[20]
Vcc3_3[21]

VccRTC
VccSus3_3[1]
VccSus3_3[2]

VccSus3_3[3]
VccSus3_3[4]
VccSus3_3[5]
VccSus3_3[6]

VccSus3_3[7]
VccSus3_3[8]
VccSus3_3[9]

VccSus3_3[10]
VccSus3_3[11]
VccSus3_3[12]

USB

USB

VccSus3_3[13]
VccSus3_3[14]
VccSus3_3[15]
VccSus3_3[16]
VccSus3_3[17]
VccSus3_3[18]

Vcc1_5_A[19]
Vcc1_5_A[20]

Vcc1_5_A[21]
Vcc1_5_A[22]
Vcc1_5_A[23]

Vcc1_5_A[24]

Vcc1_5_A[25]
VccSus1_05[1]
VccSus1_05[2]

VccSus1_05[3]

Vcc1_5_A[26]

Vcc1_5_A[27]

Vcc1_5_A[28]

Vcc1_5_A[29]

Vcc1_5_A[30]

USB CORE

USB CORE

4

L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

V5
V1
W2
W7

U6
R7
AE23

AE26
AH26

AA7
AB12
AB20
AC16
AD13
AD18
AG12
AG15
AG19

A5
B13
B16
B7
C10
D15
F9
G11
G12
G16

W5
P7
A24

C24
D19
D22
G19

K3
K4
K5
K6
L1
L2
L3
L6
L7
M6
M7
N7

AB17
AC17

T7
F17
G17

AB8
AC8

K7
C28

G20
A1

H6
H7
J6
J7

1 2

3V_S5

+3_3V_IDE

1 2

+3_3V_PCI

1 2

1 2

1 2

1 2

+1.5V_RUN

+1.5V_RUN
+1.5V_RUN

TP_ICHVCCSUS1
TP_ICHVCCSUS2

TP_ICHVCCSUS3

1 2

C215

C215

0.1U_10V

0.1U_10V

C198

C198

0.1U_10V

0.1U_10V

C227

C227

0.1U_10V

0.1U_10V

C199

C199

0.1U_10V

0.1U_10V

C253

C253

0.1U_10V

0.1U_10V

C214

C214

0.1U_10V

0.1U_10V

C216

C216

0.1U_10V

0.1U_10V

5

12

C202

C202
1U_10V

1U_10V

1 2

1 2

+3V

C226

C226

0.1U_10V

0.1U_10V

1 2

C200

C200

0.1U_10V

0.1U_10V

1 2

C225

C225

0.1U_10V

0.1U_10V

1 2

C210

C210

0.1U_10V

0.1U_10V

1 2

T62PAD T62PAD
T105PAD T105PAD

T65PAD T65PAD

+1.5V_RUN

5

C201

C201

0.1U_10V

0.1U_10V

C204

C204

0.1U_10V

0.1U_10V

+RTC_CELL

3V_S5

3V_S5

12

+

+

1 2

C197

C197

0.1U_10V

0.1U_10V

1 2

+1.05V_VCCP

C207

C207
330U_2.5V

330U_2.5V

3V_S5

+3V

C190

C190

0.1U_10V

0.1U_10V

1 2

+3V

C239

C239

0.1U_10V

0.1U_10V

+1.5V_RUN

12

C184

C184

0.1U_10V

0.1U_10V

6

6

12

C176

C176

4.7U_10V

4.7U_10V

+1.05V_VCCP

7

U30E

U30E

A4

VSS[1]

A23

VSS[2]

B1

VSS[3]

B8

VSS[4]

B11

VSS[5]

B14

VSS[6]

B17

VSS[7]

B20

VSS[8]

B26

VSS[9]

B28

VSS[10]

C2

VSS[11]

C6

VSS[12]

C27

VSS[13]

D10

VSS[14]

D13

VSS[15]

D18

VSS[16]

D21

VSS[17]

D24

VSS[18]

E1

VSS[19]

E2

VSS[20]

E4

VSS[21]

E8

VSS[22]

E15

VSS[23]

F3

VSS[24]

F4

VSS[25]

F5

VSS[26]

F12

VSS[27]

F27

VSS[28]

F28

VSS[29]

G1

VSS[30]

G2

VSS[31]

G5

VSS[32]

G6

VSS[33]

G9

VSS[34]

G14

VSS[35]

G18

VSS[36]

G21

VSS[37]

G24

VSS[38]

G25

VSS[39]

G26

VSS[40]

H3

VSS[41]

H4

VSS[42]

H5

VSS[43]

H24

VSS[44]

H27

VSS[45]

H28

VSS[46]

J1

VSS[47]

J2

VSS[48]

J5

VSS[49]

J24

VSS[50]

J25

VSS[51]

J26

VSS[52]

K24

VSS[53]

K27

VSS[54]

K28

VSS[55]

L13

VSS[56]

L15

VSS[57]

L24

VSS[58]

L25

VSS[59]

L26

VSS[60]

M3

VSS[61]

M4

VSS[62]

M5

VSS[63]

M12

VSS[64]

M13

VSS[65]

M14

VSS[66]

M15

VSS[67]

M16

VSS[68]

M17

VSS[69]

M24

VSS[70]

M27

VSS[71]

M28

VSS[72]

N1

VSS[73]

N2

VSS[74]

N5

VSS[75]

N6

VSS[76]

N11

VSS[77]

N12

VSS[78]

N13

VSS[79]

N14

VSS[80]

N15

VSS[81]

N16

VSS[82]

N17

VSS[83]

N18

VSS[84]

N24

VSS[85]

N25

VSS[86]

N26

VSS[87]

P3

VSS[88]

P4

VSS[89]

P12

VSS[90]

P13

VSS[91]

P14

VSS[92]

P15

VSS[93]

P16

VSS[94]

P17

VSS[95]

P24

VSS[96]

P27

VSS[97]

ICH7-M

ICH7-M

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

ICH7-M (POWER,GND)

ICH7-M (POWER,GND)

ICH7-M (POWER,GND)

Date: Sheet

Date: Sheet

Date: Sheet

Quanta Computer Inc.

7

P28

VSS[98]

R1

VSS[99]

R11

VSS[100]

R12

VSS[101]

R13

VSS[102]

R14

VSS[103]

R15

VSS[104]

R16

VSS[105]

R17

VSS[106]

R18

VSS[107]

T6

VSS[108]

T12

VSS[109]

T13

VSS[110]

T14

VSS[111]

T15

VSS[112]

T16

VSS[113]

T17

VSS[114]

U4

VSS[115]

U12

VSS[116]

U13

VSS[117]

U14

VSS[118]

U15

VSS[119]

U16

VSS[120]

U17

VSS[121]

U24

VSS[122]

U25

VSS[123]

U26

VSS[124]

V2

VSS[125]

V13

VSS[126]

V15

VSS[127]

V24

VSS[128]

V27

VSS[129]

V28

VSS[130]

W6

VSS[131]

W24

VSS[132]

W25

VSS[133]

W26

VSS[134]

Y3

VSS[135]

Y24

VSS[136]

Y27

VSS[137]

Y28

VSS[138]

AA1

VSS[139]

AA24

VSS[140]

AA25

VSS[141]

AA26

VSS[142]

AB4

VSS[143]

AB6

VSS[144]

AB11

VSS[145]

AB14

VSS[146]

AB16

VSS[147]

AB19

VSS[148]

AB21

VSS[149]

AB24

VSS[150]

AB27

VSS[151]

AB28

VSS[152]

AC2

VSS[153]

AC5

VSS[154]

AC9

VSS[155]

AC11

VSS[156]

AD1

VSS[157]

AD3

VSS[158]

AD4

VSS[159]

AD7

VSS[160]

AD8

VSS[161]

AD11

VSS[162]

AD15

VSS[163]

AD19

VSS[164]

AD23

VSS[165]

AE2

VSS[166]

AE4

VSS[167]

AE8

VSS[168]

AE11

VSS[169]

AE13

VSS[170]

AE18

VSS[171]

AE21

VSS[172]

AE24

VSS[173]

AE25

VSS[174]

AF2

VSS[175]

AF4

VSS[176]

AF8

VSS[177]

AF11

VSS[178]

AF27

VSS[179]

AF28

VSS[180]

AG1

VSS[181]

AG3

VSS[182]

AG7

VSS[183]

AG11

VSS[184]

AG14

VSS[185]

AG17

VSS[186]

AG20

VSS[187]

AG25

VSS[188]

AH1

VSS[189]

AH3

VSS[190]

AH7

VSS[191]

AH12

VSS[192]

AH23

VSS[193]

AH27

VSS[194]

PROJECT : SW1

PROJECT : SW1

PROJECT : SW1

8

of

of

of

14 46Wednesday, November 16, 2005

14 46Wednesday, November 16, 2005

14 46Wednesday, November 16, 2005

8

1ACustom

1ACustom

1ACustom