1
2
3
4
5
6
7
8
PCB STACK UP
Discrete
LAYER 1 : TOP
LAYER 2 : SGND1
LAYER 3 : IN1(High)
LAYER 4 : IN2(High)
A A
LAYER 5 : SVCC
LAYER 6 : IN3(High)
LAYER 7 : SGND2
LAYER 8 : Bottom
B B
C C
8L
USB Port*2
USB8&9 P34
Bluetooth
USB13
P34
Webcam w/
Mic
USB4
P34
CardReader
DDR III
SO-DIMM 0
SO-DIMM 1
P12, 13
HDD (SATA)
HDD (SATA)
ODD (SATA)
P33
P33
P33
eSATA/USB
Port x 1
Audio Codec
IDT92HD80
P33
P29
SP9 BLOCK DIAGRAM
Embedded
DisplayPort
VRAM GDDR5*8
32*32\64*16\128*16
ATI GPU
Granville-LP
(16 x 64Mb\128Mb x 8pcs)
INT_CRT
INT_LVDS
INT_DisplayPort
INT_HDMI
X'TAL
32.768KHz
5GT/s
Dual Channel
1066/1333 MHz
FDI interface
SATA0
SATA1
SATA4
USB1/ SATA5
USB 2.0
Azalia
DDR SYSTEM MEMORY
SATA Gen3
SATA Gen2
SATA Gen2
USB
HDA
SPI
intel
Intel Sandy
4 Core
rPGA 988
(37.5mm X 37.5mm)
CPU 45Watt
35Watt
FDI
FDI
DMI
DMI
intel
<PCH>
Platform
Controller
Hub
mBGA 989
(25mm X 25mm)
10.8GT/s
PCI-E
X16
P3~P6
X4 DMI interface
5GT/s 2.7GT/s
PCI-E
PCIE
5GT/s
iGFX Interfaces
RTC
P9
PCI-Express Gen2
P8~P11
LPC
PCIE3
PCIE2
Realtek
Giga-LAN
RTL8111E
P26
P20~P23
X'TAL
27.0MHz
P14~P19
EXT_DisplayPort
INT_DisplayPort
NEC USB3.0
DB
P32
BATTERY SELECTOR
SYSTEM CHARGER(BQ24704)
SYSTEM POWER RT8206B
DDR III SMDDR_VTERM
1.5V/1.5VSUS(RT8207)
EXT_CRT
INT_CRT
EXT_LVDS
INT_LVDS
CRT
Switchable
LVDS
Switchable
DP\eDP Switch
PS8321
EXT_HDMI
INT_HDMI
X'TAL
25MHz
HDMI Switch
P38
Mini-card
(Wireless LAN
Shirley Peak
802.11a/b/g/n)
PI3HDMI201
PAGE 46
PAGE 46
PAGE 39
PAGE 44
USB2/3
Combo
X1
PCIE1
P37
VCCP +1.5V AND GMCH
1.05V(ISL62872)
VDDCI RT8209A
VGACORE ISL6264
CPU CORE NCP6131S52MNR2G
CPU CORE NCP5911
PAGE 47\48
P24
P24
P26
P28
CRT
LVDS
DP\eDP Port
HDMI
01
PAGE 40
PAGE 42
PAGE 43
P27
P24
P26
P28
RTS5159
USB12
D D
P34
Amplifier
TPA6130A2 TPA3111D1
P29
Amplifier
P30
Dual SPI ROM
4MB x1 (Basic ME+Braidwood)
EC
P7
KB3926 D2
P36
X'TAL
32.768KHz
(Headphone/MIC)
1
(Headphone)
P30
2
Int Speaker Line out
P30 P27 P29
Sub-Woofer Combo Jack
3
SPI ROM
P36
Touch Pad
4
P34
Keyboard
P35
SYSTEM/GPU
FAN
5
Accelerometer
P37 P30
LIS3LV02DL
6
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5/RD2
NB5/RD2
NB5/RD2
Date: Sheet
Date: Sheet
Date: Sheet of
7
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
1A
1A
1 49 Tuesday, August 10, 2010
1 49 Tuesday, August 10, 2010
1 49 Tuesday, August 10, 2010
8
1A
of
of
5
4
3
2
1
Sandy Bridge Processor (DMI,PEG,FDI) Sandy Bridge Processor (CLK,MISC,JTAG)
+3V
1
CPU_DRAMRST#
1
R232
R232
4.99K/F_4
4.99K/F_4
02
INT_eDP_HPD [26]
U39B
R597
R597
*39_4
*39_4
2
Q44
Q44
*2N7002
*2N7002
C26
AN34
AL33
AN33
AL32
AN32
AM34
AP33
V8
AR33
+1.5V_CPU
U39B
SNB_IVB#
SKTOCC#
CATERR#
PECI
PROCHOT#
THERMTRIP#
PM_SYNC
UNCOREPWRGOOD
SM_DRAMPWROK
RESET#
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000014
DGG^9000014
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
R596
R596
200/F_4
200/F_4
R595 130/F_4 R595 130/F_4
MAIN_ONG [4,45]
4/20 DB add.
A28
BCLK
A27
BCLK#
MISC THERMAL PWR MANAGEMENT
MISC THERMAL PWR MANAGEMENT
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
CLOCKS
CLOCKS
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
DDR3
DDR3
MISC
MISC
JTAG & BPM
JTAG & BPM
DRAMRST_CNTRL_PCH [8]
A16
A15
R8
AK1
A5
A4
AP29
PRDY#
AP27
PREQ#
AR26
TCK
AR27
TMS
AP30
TRST#
AR28
TDI
AP26
TDO
AL35
DBR#
AT28
BPM#[0]
AR29
BPM#[1]
AR30
BPM#[2]
AT30
BPM#[3]
AP32
BPM#[4]
AR31
BPM#[5]
AT31
BPM#[6]
AR32
BPM#[7]
+1.5VSUS
DDR3_DRAMRST# [12,13]
+1.05V_VTT [4,10,36,41,47]
+1.5V_CPU [4,37,45]
+3VS5 [6,7,8,9,10,45]
+3V [6,7,8,9,10,12,13,14,17,24,25,26,27,28,29,30,32,33,34,35,36,37,40,41,43,45,47]
3/26 DB for H/W modify.
CLK_CPU_BCLKP [8]
CLK_CPU_BCLKN [8]
CLK_DPLL_SSCLKP_R
CLK_DPLL_SSCLKN_R
CPU_DRAMRST#
SM_RCOMP_0
R154 140/F_4 R154 140/F_4
SM_RCOMP_1
R502 26.1/F_4 R502 26.1/F_4
SM_RCOMP_2
XDP_PRDY#
XDP_PREQ#
XDP_TCLK
XDP_TMS
XDP_TRST#
XDP_TDI_R
XDP_TDO
XDP_DBRST# XDP_DBRST# XDP_DBRST#
XDP_BPM0
XDP_BPM1
XDP_BPM2
XDP_BPM3
XDP_BPM4
XDP_BPM5
XDP_BPM6
XDP_BPM7
R500 200/F_4 R500 200/F_4
TP9TP9
TP12TP12
TP51TP51
TP47TP47
TP53TP53
TP15TP15
TP48TP48
R583 *1K_4 R583 *1K_4
XDP_DBRST# [6]
TP50TP50
TP49TP49
TP13TP13
TP18TP18
TP11TP11
TP14TP14
TP17TP17
TP16TP16
CPU XDP
SM_RCOMP[0] W:20mils/S:20mils/L: 500mils,
SM_RCOMP[1] W:20mils/S:20mils/L: 500mils,
SM_RCOMP[2] W:15mils/S:20mils/L: 500mils,
DDR3 DRAM RESET
R227 1K_4 R227 1K_4
R218 1K_4 R218 1K_4
CPU_DRAMRST#_R
R234 0_4 R234 0_4
+1.05V_VTT
INT_eDP_HPD_Q INT_eDP_HPD_Q INT_eDP_HPD_Q
INT_eDP_HPD_Q INT_eDP_HPD_Q INT_eDP_HPD_Q INT_eDP_HPD_Q INT_eDP_HPD_Q INT_eDP_HPD_Q INT_eDP_HPD_Q INT_eDP_HPD_Q INT_eDP_HPD_Q INT_eDP_HPD_Q INT_eDP_HPD_Q INT_eDP_HPD_Q
0.047U/10V_4
0.047U/10V_4
R507
R507
1K/J_4
1K/J_4
3
Q33
Q33
*2N7002K
*2N7002K
R229 *0_4 R229 *0_4
3
Q9
2
2N7002Q92N7002
C372
C372
2
U39A
U39A
DMI_TXN0 [6]
DMI_TXN1 [6]
DMI_TXN2 [6]
DMI_TXN3 [6]
DMI_TXP0 [6]
D D
C C
INT_eDP_AUXP [26]
INT_eDP_AUXN [26]
INT_eDP_TXP0 [26]
INT_eDP_TXP1 [26]
INT_eDP_TXP2 [26]
INT_eDP_TXP3 [26]
B B
INT_eDP_TXN0 [26]
INT_eDP_TXN1 [26]
INT_eDP_TXN2 [26]
INT_eDP_TXN3 [26]
DMI_TXP1 [6]
DMI_TXP2 [6]
DMI_TXP3 [6]
DMI_RXN0 [6]
DMI_RXN1 [6]
DMI_RXN2 [6]
DMI_RXN3 [6]
DMI_RXP0 [6]
DMI_RXP1 [6]
DMI_RXP2 [6]
DMI_RXP3 [6]
FDI_TXN0 [6]
FDI_TXN1 [6]
FDI_TXN2 [6]
FDI_TXN3 [6]
FDI_TXN4 [6]
FDI_TXN5 [6]
FDI_TXN6 [6]
FDI_TXN7 [6]
FDI_TXP0 [6]
FDI_TXP1 [6]
FDI_TXP2 [6]
FDI_TXP3 [6]
FDI_TXP4 [6]
FDI_TXP5 [6]
FDI_TXP6 [6]
FDI_TXP7 [6]
FDI_FSYNC0 [6]
FDI_FSYNC1 [6]
FDI_LSYNC0 [6]
FDI_LSYNC1 [6]
C15 *0.1U/10V_4 C15 *0.1U/10V_4
C16 *0.1U/10V_4 C16 *0.1U/10V_4
C590 *0.1U/10V_4 C590 *0.1U/10V_4
C592 *0.1U/10V_4 C592 *0.1U/10V_4
C594 *0.1U/10V_4 C594 *0.1U/10V_4
C586 *0.1U/10V_4 C586 *0.1U/10V_4
C591 *0.1U/10V_4 C591 *0.1U/10V_4
C593 *0.1U/10V_4 C593 *0.1U/10V_4
C595 *0.1U/10V_4 C595 *0.1U/10V_4
C583 *0.1U/10V_4 C583 *0.1U/10V_4
FDI_INT [6]
eDP_COMP
INT_eDP_HPD_Q
INT_eDP_AUXP_C INT_eDP_AUXP_C
INT_eDP_AUXN_C INT_eDP_AUXN_C
INT_eDP_TXP0_C INT_eDP_TXP0_C
INT_eDP_TXP1_C INT_eDP_TXP1_C
INT_eDP_TXP2_C INT_eDP_TXP2_C
INT_eDP_TXP3_C INT_eDP_TXP3_C
INT_eDP_TXN0_C INT_eDP_TXN0_C
INT_eDP_TXN1_C INT_eDP_TXN1_C
INT_eDP_TXN2_C INT_eDP_TXN2_C
INT_eDP_TXN3_C INT_eDP_TXN3_C
eDP_COMP connect to PIN A18 W:4mils/S:15mils/L: 500mils.
eDP_COMP connect to PIN A17 W:12mils/S:15mils/L: 500mils.
B27
DMI_RX#[0]
B25
DMI_RX#[1]
A25
DMI_RX#[2]
B24
DMI_RX#[3]
B28
DMI_RX[0]
B26
DMI_RX[1]
A24
DMI_RX[2]
B23
DMI_RX[3]
G21
DMI_TX#[0]
E22
DMI_TX#[1]
F21
DMI_TX#[2]
D21
DMI_TX#[3]
G22
DMI_TX[0]
D22
DMI_TX[1]
F20
DMI_TX[2]
C21
DMI_TX[3]
A21
FDI0_TX#[0]
H19
FDI0_TX#[1]
E19
FDI0_TX#[2]
F18
FDI0_TX#[3]
B21
FDI1_TX#[0]
C20
FDI1_TX#[1]
D18
FDI1_TX#[2]
E17
FDI1_TX#[3]
A22
FDI0_TX[0]
G19
FDI0_TX[1]
E20
FDI0_TX[2]
G18
FDI0_TX[3]
B20
FDI1_TX[0]
C19
FDI1_TX[1]
D19
FDI1_TX[2]
F17
FDI1_TX[3]
J18
FDI0_FSYNC
J17
FDI1_FSYNC
H20
FDI_INT
J19
FDI0_LSYNC
H17
FDI1_LSYNC
A18
eDP_COMPIO
A17
eDP_ICOMPO
B16
eDP_HPD
C15
eDP_AUX
D15
eDP_AUX#
C17
eDP_TX[0]
F16
eDP_TX[1]
C16
eDP_TX[2]
G15
eDP_TX[3]
C18
eDP_TX#[0]
E16
eDP_TX#[1]
D16
eDP_TX#[2]
F15
eDP_TX#[3]
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000014
DGG^9000014
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
DMI
DMI
Intel(R) FDI
Intel(R) FDI
eDP
eDP
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PCI EXPRESS* - GRAPHICS
PCI EXPRESS* - GRAPHICS
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
J22
J21
H22
K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32
J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32
M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25
M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25
PEG_COMP
PEG_RX#0
PEG_RX#1
PEG_RX#2
PEG_RX#3
PEG_RX#4
PEG_RX#5
PEG_RX#6
PEG_RX#7
PEG_RX#8
PEG_RX#9
PEG_RX#10
PEG_RX#11
PEG_RX#12
PEG_RX#13 PEG_RX#13
PEG_RX#14 PEG_RX#14 PEG_RX#14 PEG_RX#14 PEG_RX#14 PEG_RX#14 PEG_RX#14 PEG_RX#14 PEG_RX#14 PEG_RX#14 PEG_RX#14 PEG_RX#14
PEG_RX#15
PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
PEG_RX6
PEG_RX7
PEG_RX8
PEG_RX9
PEG_RX10
PEG_RX11
PEG_RX12
PEG_RX13
PEG_RX14
PEG_RX15
C_PEG_TX#0
C_PEG_TX#1
C_PEG_TX#2
C_PEG_TX#3
C_PEG_TX#4
C_PEG_TX#5
C_PEG_TX#6
C_PEG_TX#7
C_PEG_TX#8
C_PEG_TX#9
C_PEG_TX#10
C_PEG_TX#11
C_PEG_TX#12
C_PEG_TX#13
C_PEG_TX#14
C_PEG_TX#15
C_PEG_TX0
C_PEG_TX1
C_PEG_TX2
C_PEG_TX3
C_PEG_TX4
C_PEG_TX5
C_PEG_TX6
C_PEG_TX7
C_PEG_TX8
C_PEG_TX9
C_PEG_TX10
C_PEG_TX11
C_PEG_TX12
C_PEG_TX13
C_PEG_TX14
C_PEG_TX15
PEG_COMP connect to PIN H22&J22 W:4mils/S:15mils/L: 500mils.
PEG_COMP connect to PIN J21 W:12mils/S:15mils/L: 500mils.
PEG_RX#[0..15] [14]
H_SNB_IVB# [7]
SNB_IVB# N.A at SNB EDS #27637 0.7v1
Close to EC
R198 43_4 R198 43_4
R183 56.2/F_4 R183 56.2/F_4
R189 0_4 R189 0_4
PEG_RX[0..15] [14]
EC_PECI [36]
H_PROCHOT# [36,47]
PM_THRMTRIP# [9,36]
PM_SYNC [6]
H_PWRGOOD [9]
8/10 SI Modify
+1.05V_VTT
U17
CPU RESET#
PLTRST# [8,32,35,36,37,38]
SM_DRAMPWROK Processor Input.
3/26 DB del for
DG update.
7/27 SI Modify
U17
2
1
74LVC1G07GW
74LVC1G07GW
R210 *1.5K/F_4 R210 *1.5K/F_4
CPU_PLTRST#
4
GND3OUT
+3VS5
C313
4/20 DB add.
R601
R601
10K_4
10K_4
R606
R606
*0_4
*0_4
PM_DRAM_PWRGD [6]
R603 0_4 R603 0_4
C313
0.1U/10V_4
0.1U/10V_4
IN
VCC5NC
+3VS5 +3VS5
5/4 DB add.
TP10TP10
TP7TP7
R184 0_4 R184 0_4
R195 0_4 R195 0_4
R191 10K_4 R191 10K_4
R206 75_4 R206 75_4
R205 43_4 R205 43_4
U46
U46
1
VCC5NC
2
IN
4
GND3OUT
*74LVC1G07GW
*74LVC1G07GW
PM_DRAM_PWRGD_R
R604
R604
*3K/F_4
*3K/F_4
SKTOCC#
TP_CATERR#
H_PECI
H_PROCHOT#_R
PM_THRMTRIP#_R
PM_SYNC_R
H_PWRGOOD_R H_PWRGOOD_R H_PWRGOOD_R
PM_DRAM_PWRGD_R
CPU_PLTRST#_R CPU_PLTRST#_R
R207
R207
*750/F_4
*750/F_4
4/20 DB add.
C781
C781
0.1U/10V_4
0.1U/10V_4
PM_DRAM_PWRGD_C PM_DRAM_PWRGD_R PM_DRAM_PWRGD_R
3
1
FDI disable
(DIS only stuff)
FDI_INT
R185 *0_4 R185 *0_4
R194 *0_4 R194 *0_4
A A
R190 *0_4 R190 *0_4
R180 *1K_4 R180 *1K_4
R187 *1K_4 R187 *1K_4
FDI_FSYNC can gang all these 4
signals together and tie them
with only one 1K resistor to GND
(DG V0.5 Ch2.2.9).
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
5
PEG x16 disable (UMA only remove)
PEG_TX[0..15] [14] PEG_TX#[0..15] [14]
C_PEG_TX0
C_PEG_TX1
C_PEG_TX2
C_PEG_TX3
C_PEG_TX4
C_PEG_TX5
C_PEG_TX6
C_PEG_TX7
C_PEG_TX8
C_PEG_TX9
C_PEG_TX10
C_PEG_TX11
C_PEG_TX12
C_PEG_TX13
C_PEG_TX14
C_PEG_TX15
C778 0.1U/10V_4 C778 0.1U/10V_4
C770 0.1U/10V_4 C770 0.1U/10V_4
C773 0.1U/10V_4 C773 0.1U/10V_4
C771 0.1U/10V_4 C771 0.1U/10V_4
C756 0.1U/10V_4 C756 0.1U/10V_4
C752 0.1U/10V_4 C752 0.1U/10V_4
C759 0.1U/10V_4 C759 0.1U/10V_4
C758 0.1U/10V_4 C758 0.1U/10V_4
C753 0.1U/10V_4 C753 0.1U/10V_4
C748 0.1U/10V_4 C748 0.1U/10V_4
C745 0.1U/10V_4 C745 0.1U/10V_4
C743 0.1U/10V_4 C743 0.1U/10V_4
C734 0.1U/10V_4 C734 0.1U/10V_4
C733 0.1U/10V_4 C733 0.1U/10V_4
C731 0.1U/10V_4 C731 0.1U/10V_4
C726 0.1U/10V_4 C726 0.1U/10V_4
0.22uF AC coupling Caps for PCIE GEN1/2/3 0.22uF AC coupling Caps for PCIE GEN1/2/3
PEG_TX0
PEG_TX1
PEG_TX2
PEG_TX3
PEG_TX4
PEG_TX5
PEG_TX6
PEG_TX7
PEG_TX8
PEG_TX9
PEG_TX10
PEG_TX11
PEG_TX12
PEG_TX13
PEG_TX14
PEG_TX15
C_PEG_TX#0
C_PEG_TX#1
C_PEG_TX#2
C_PEG_TX#3
C_PEG_TX#4
C_PEG_TX#5
C_PEG_TX#6
C_PEG_TX#7
C_PEG_TX#8
C_PEG_TX#9
C_PEG_TX#10
C_PEG_TX#11
C_PEG_TX#12
C_PEG_TX#13
C_PEG_TX#14
C_PEG_TX#15
4
C780 0.1U/10V_4 C780 0.1U/10V_4
C774 0.1U/10V_4 C774 0.1U/10V_4
C777 0.1U/10V_4 C777 0.1U/10V_4
C775 0.1U/10V_4 C775 0.1U/10V_4
C764 0.1U/10V_4 C764 0.1U/10V_4
C760 0.1U/10V_4 C760 0.1U/10V_4
C766 0.1U/10V_4 C766 0.1U/10V_4
C765 0.1U/10V_4 C765 0.1U/10V_4
C761 0.1U/10V_4 C761 0.1U/10V_4
C750 0.1U/10V_4 C750 0.1U/10V_4
C749 0.1U/10V_4 C749 0.1U/10V_4
C746 0.1U/10V_4 C746 0.1U/10V_4
C741 0.1U/10V_4 C741 0.1U/10V_4
C739 0.1U/10V_4 C739 0.1U/10V_4
C736 0.1U/10V_4 C736 0.1U/10V_4
C728 0.1U/10V_4 C728 0.1U/10V_4
PEG_TX#0
PEG_TX#1
PEG_TX#2
PEG_TX#3
PEG_TX#4
PEG_TX#5
PEG_TX#6
PEG_TX#7
PEG_TX#8
PEG_TX#9
PEG_TX#10
PEG_TX#11
PEG_TX#12
PEG_TX#13
PEG_TX#14
PEG_TX#15
Embedded Display PLL Clock
Ra
RP5
CLK_DPLL_SSCLKP_R
CLK_DPLL_SSCLKN_R
CLK_DPLL_SSCLKP_R
CLK_DPLL_SSCLKN_R
SG/UMA
3
RP5
4
3
2
1
0_4P2R_4
0_4P2R_4
Rb
R508 *0_4 R508 *0_4
Rc
R509 *0_4 R509 *0_4
Ra Rb Rc
NC DIS
Stuff Stuff
Stuff
NC NC
CLK_DPLL_SSCLKP [8]
CLK_DPLL_SSCLKN [8]
DP & PEG Compensation\ Hot-plug
+1.05V_VTT
eDP_COMPIO and ICOMPO signals should be shorted
near balls and routed with typical impedance <25 mohms
+1.05V_VTT
PEG_ICOMPI and RCOMPO signals
should be routed within 500 mils typical
impedance = 43 mohms PEG_ICOMPO
signals should be routed within 500 mils
typical impedance = 14.5 mohms
R503 24.9/F_4 R503 24.9/F_4
R66 24.9/F_4 R66 24.9/F_4
2
eDP_COMP
PEG_COMP
NB5/RD2
NB5/RD2
NB5/RD2
Processor pull-up (CPU)
H_PROCHOT#
XDP_TDO
XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TCLK
XDP_TRST#
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet
Date: Sheet
R186 62_4 R186 62_4
R591 51_4 R591 51_4
R589 51_4 R589 51_4
R200 51_4 R200 51_4
R203 *51_4 R203 *51_4
R592 51_4 R592 51_4
R587 51_4 R587 51_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
SNB 1/4 (PCIE&DMI&FDI)
SNB 1/4 (PCIE&DMI&FDI)
SNB 1/4 (PCIE&DMI&FDI)
1
+1.05V_VTT
2 49 Tuesday, August 10, 2010
2 49 Tuesday, August 10, 2010
2 49 Tuesday, August 10, 2010
of
of
1A
1A
1A
5
4
3
2
1
Sandy Bridge Processor (DDR3)
U39D
AM5
AM6
AJ11
AH11
AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15
AA10
D10
K10
AR3
AP3
AN3
AN2
AN1
AP2
AP5
AN9
AT5
AT6
AP6
AN8
AR6
AR5
AR9
AT8
AT9
AR8
AA9
AA7
AB8
AB9
J10
C9
A7
C8
A9
A8
D9
D8
G4
F4
F1
G1
G5
F5
F2
G2
J7
J8
K9
J9
K8
K7
M5
N4
N2
N1
M4
N5
M2
M1
R6
U39D
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CAS#
SB_RAS#
SB_WE#
AE2
SB_CLK[0]
AD2
SB_CLK#[0]
R9
SB_CKE[0]
AE1
SB_CLK[1]
AD1
SB_CLK#[1]
R10
SB_CKE[1]
AB2
SB_CLK[2]
AA2
SB_CLK#[2]
T9
SB_CKE[2]
AA1
SB_CLK[3]
AB1
SB_CLK#[3]
T10
SB_CKE[3]
AD3
SB_CS#[0]
AE3
SB_CS#[1]
AD6
SB_CS#[2]
AE6
SB_CS#[3]
AE4
SB_ODT[0]
AD4
SB_ODT[1]
AD5
SB_ODT[2]
AE5
SB_ODT[3]
M_B_DQSN0
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
D7
F3
K6
N3
AN5
AP9
AK12
AP15
C7
G3
J6
M3
AN6
AP8
AK11
AP14
AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7
M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
M_B_CLKP0 [13]
M_B_CLKN0 [13]
M_B_CKE0 [13]
M_B_CLKP1 [13]
M_B_CLKN1 [13]
M_B_CKE1 [13]
M_B_CS#0 [13]
M_B_CS#1 [13]
M_B_ODT0 [13]
M_B_ODT1 [13]
M_B_DQSN[7:0] [13]
M_B_DQSP[7:0] [13]
M_B_A[15:0] [13]
U39C
U39C
D D
M_A_DQ[63:0] [12]
C C
B B
M_A_BS#0 [12]
M_A_BS#1 [12]
M_A_BS#2 [12]
M_A_CAS# [12]
M_A_RAS# [12]
M_A_WE# [12]
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15
AE10
AF10
G10
N10
M10
AG6
AG5
AK6
AK5
AH5
AH6
AJ5
AJ6
AJ8
AK8
AJ9
AK9
AH8
AH9
AL9
AL8
AE8
AD9
AF9
C5
SA_DQ[0]
D5
SA_DQ[1]
D3
SA_DQ[2]
D2
SA_DQ[3]
D6
SA_DQ[4]
C6
SA_DQ[5]
C2
SA_DQ[6]
C3
SA_DQ[7]
F10
SA_DQ[8]
F8
SA_DQ[9]
SA_DQ[10]
G9
SA_DQ[11]
F9
SA_DQ[12]
F7
SA_DQ[13]
G8
SA_DQ[14]
G7
SA_DQ[15]
K4
SA_DQ[16]
K5
SA_DQ[17]
K1
SA_DQ[18]
J1
SA_DQ[19]
J5
SA_DQ[20]
J4
SA_DQ[21]
J2
SA_DQ[22]
K2
SA_DQ[23]
M8
SA_DQ[24]
SA_DQ[25]
N8
SA_DQ[26]
N7
SA_DQ[27]
SA_DQ[28]
M9
SA_DQ[29]
N9
SA_DQ[30]
M7
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
V6
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_CLK[0]
SA_CLK#[0]
SA_CKE[0]
SA_CLK[1]
SA_CLK#[1]
SA_CKE[1]
SA_CLK[2]
SA_CLK#[2]
SA_CKE[2]
SA_CLK[3]
SA_CLK#[3]
SA_CKE[3]
SA_CS#[0]
SA_CS#[1]
SA_CS#[2]
SA_CS#[3]
SA_ODT[0]
SA_ODT[1]
SA_ODT[2]
SA_ODT[3]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AB6
AA6
V9
AA5
AB5
V10
AB4
AA4
W9
AB3
AA3
W10
AK3
AL3
AG1
AH1
AH3
AG3
AG2
AH2
C4
G6
J3
M6
AL6
AM8
AR12
AM15
D4
F6
K3
N6
AL5
AM9
AR11
AM14
AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_CLKP0 [12]
M_A_CLKN0 [12]
M_A_CKE0 [12]
M_A_CLKP1 [12]
M_A_CLKN1 [12]
M_A_CKE1 [12]
M_A_CS#0 [12]
M_A_CS#1 [12]
M_A_ODT0 [12]
M_A_ODT1 [12]
M_A_DQSN[7:0] [12]
M_A_DQSP[7:0] [12]
M_A_A[15:0] [12]
M_B_DQ[63:0] [13]
M_B_BS#0 [13]
M_B_BS#1 [13]
M_B_BS#2 [13]
M_B_CAS# [13]
M_B_RAS# [13]
M_B_WE# [13]
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
03
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000014
DGG^9000014
IC SOCKET RPGA 989P(P1.0,M/H3.0)
A A
5
IC SOCKET RPGA 989P(P1.0,M/H3.0)
4
3
Sandy Bridge_rPGA_Rev0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000014
DGG^9000014
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
2
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5/RD2
NB5/RD2
NB5/RD2
Date: Sheet
Date: Sheet
Date: Sheet of
SNB 2/4 (DDR3 I/F)
SNB 2/4 (DDR3 I/F)
SNB 2/4 (DDR3 I/F)
1
1A
1A
3 49 Tuesday, August 10, 2010
3 49 Tuesday, August 10, 2010
3 49 Tuesday, August 10, 2010
1A
of
of
5
Sandy Bridge Processor (POWER)
4
3
2
1
Sandy Bridge Processor (GRAPHIC POWER)
04
U39F
SNB: 55A
C685
C685
D D
22U/6.3VS_8
22U/6.3VS_8
C754
C754
22U/6.3VS_8
22U/6.3VS_8
C697
C697
22U/6.3VS_8
22U/6.3VS_8
C184
C184
22U/6.3VS_8
22U/6.3VS_8
C C
C79
C79
22U/6.3VS_8
22U/6.3VS_8
C715
C715
*22U/6.3VS_8
*22U/6.3VS_8
C147
C147
22U/6.3VS_8
22U/6.3VS_8
C729
C729
22U/6.3VS_8
22U/6.3VS_8
B B
C28
C28
*22U/6.3VS_8
*22U/6.3VS_8
C772
C772
*22U/6.3VS_8
*22U/6.3VS_8
22uF_8 x8 Socket TOP cavity
22uF_8 x10 Socket BOT cavity
22uF_8 x8 Socket TOP edge
470uF_7343 x4
C701
C701
22U/6.3VS_8
22U/6.3VS_8
C747
C747
22U/6.3VS_8
22U/6.3VS_8
C692
C692
22U/6.3VS_8
22U/6.3VS_8
C117
C117
22U/6.3VS_8
22U/6.3VS_8
C709
C709
22U/6.3VS_8
22U/6.3VS_8
C138
C138
*22U/6.3VS_8
*22U/6.3VS_8
C22
C22
22U/6.3VS_8
22U/6.3VS_8
C767
C767
22U/6.3VS_8
22U/6.3VS_8
C27
C27
22U/6.3VS_8
22U/6.3VS_8
C693
C693
*22U/6.3VS_8
*22U/6.3VS_8
+VCC_CORE
C691
C691
22U/6.3VS_8
22U/6.3VS_8
C722
C722
22U/6.3VS_8
22U/6.3VS_8
C159
C159
22U/6.3VS_8
22U/6.3VS_8
C676
C676
22U/6.3VS_8
22U/6.3VS_8
C96
C96
22U/6.3VS_8
22U/6.3VS_8
C174
C174
*22U/6.3VS_8
*22U/6.3VS_8
C694
C694
22U/6.3VS_8
22U/6.3VS_8
C33
C33
22U/6.3VS_8
22U/6.3VS_8
C24
C24
22U/6.3VS_8
22U/6.3VS_8
C742
C742
*22U/6.3VS_8
*22U/6.3VS_8
3/26 DB change 10U FP to 0805.
A A
+VCC_CORE [47,48]
+VCC_GFX [47,48]
+VCCSA [40]
+1.05V_VTT [2,10,36,41,47]
+1.5V_CPU [2,37,45]
+1.5V_CPU [2,37,45]
+1.5VSUS [2,10,12,13,40,44]
5
U39F
AG35
VCC1
AG34
VCC2
AG33
VCC3
AG32
VCC4
AG31
VCC5
AG30
VCC6
AG29
VCC7
AG28
VCC8
AG27
VCC9
AG26
VCC10
AF35
VCC11
AF34
VCC12
AF33
VCC13
AF32
VCC14
AF31
VCC15
AF30
VCC16
AF29
VCC17
AF28
VCC18
AF27
VCC19
AF26
VCC20
AD35
VCC21
AD34
VCC22
AD33
VCC23
AD32
VCC24
AD31
VCC25
AD30
VCC26
AD29
VCC27
AD28
VCC28
AD27
VCC29
AD26
VCC30
AC35
VCC31
AC34
VCC32
AC33
VCC33
AC32
VCC34
AC31
VCC35
AC30
VCC36
AC29
VCC37
AC28
VCC38
AC27
VCC39
AC26
VCC40
AA35
VCC41
AA34
VCC42
AA33
VCC43
AA32
VCC44
AA31
VCC45
AA30
VCC46
AA29
VCC47
AA28
VCC48
AA27
VCC49
AA26
VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56
Y29
VCC57
Y28
VCC58
Y27
VCC59
Y26
VCC60
V35
VCC61
V34
VCC62
V33
VCC63
V32
VCC64
V31
VCC65
V30
VCC66
V29
VCC67
V28
VCC68
V27
VCC69
V26
VCC70
U35
VCC71
U34
VCC72
U33
VCC73
U32
VCC74
U31
VCC75
U30
VCC76
U29
VCC77
U28
VCC78
U27
VCC79
U26
VCC80
R35
VCC81
R34
VCC82
R33
VCC83
R32
VCC84
R31
VCC85
R30
VCC86
R29
VCC87
R28
VCC88
R27
VCC89
R26
VCC90
P35
VCC91
P34
VCC92
P33
VCC93
P32
VCC94
P31
VCC95
P30
VCC96
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000014
DGG^9000014
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
PEG AND DDR
PEG AND DDR
CORE SUPPLY
CORE SUPPLY
SENSE LINES SVID
SENSE LINES SVID
VIDALERT#
VIDSOUT
VCC_SENSE
VSS_SENSE
VCCIO_SENSE
VSSIO_SENSE
4
VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8
VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24
VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39
VCCIO40
VIDSCLK
AH13
SNB: 8.5A
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12
E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
J23
AJ29
AJ30
AJ28
AJ35
AJ34
B10
A10
C23
C23
22U/6.3VS_8
22U/6.3VS_8
C157
C157
22U/6.3VS_8
22U/6.3VS_8
C26
C26
22U/6.3VS_8
22U/6.3VS_8
C696
C696
*22U/6.3VS_8
*22U/6.3VS_8
C663
C663
*22U/6.3VS_8
*22U/6.3VS_8
C70
C70
*22U/6.3VS_8
*22U/6.3VS_8
C675
C675
*22U/6.3VS_8
*22U/6.3VS_8
22uF_8 x7 Socket TOP cavity
22uF_8 x5 Socket BOT cavity
22uF_8 x2 Socket TOP cavity (no stuff)
22uF_8 x5 Socket BOT cavity (no stuff)
330uF_7343 x2
+1.05V_VTT_40
H_CPU_SVIDALRT#
VR_SVID_CLK
VR_SVID_DATA
R67 *0_4/S R67 *0_4/S
3/26 DB Modify.
Trace Route to Power IC area.
+1.05V_VTT
C21
C21
22U/6.3VS_8
22U/6.3VS_8
C93
C93
22U/6.3VS_8
22U/6.3VS_8
C133
C133
22U/6.3VS_8
22U/6.3VS_8
C110
C110
*22U/6.3VS_8
*22U/6.3VS_8
C34
C34
*22U/6.3VS_8
*22U/6.3VS_8
C668
C668
*22U/6.3VS_8
*22U/6.3VS_8
C666
C666
*22U/6.3VS_8
*22U/6.3VS_8
+1.05V_VTT
R118 100_4 R118 100_4
R117 100_4 R117 100_4
VSSP_SENSE
C652
C652
22U/6.3VS_8
22U/6.3VS_8
C182
C182
22U/6.3VS_8
22U/6.3VS_8
C684
C684
*22U/6.3VS_8
*22U/6.3VS_8
C29
C29
*22U/6.3VS_8
*22U/6.3VS_8
C172
C172
*22U/6.3VS_8
*22U/6.3VS_8
C145
C145
*22U/6.3VS_8
*22U/6.3VS_8
C61
C61
*22U/6.3VS_8
*22U/6.3VS_8
3/26 DB change 10U FP to 0805.
+VCC_CORE
VCC_SENSE [47]
VSS_SENSE [47]
VCCP_SENSE [41]
TP46TP46
22uF_8 x2 Socket TOP cavity
22uF_8 x2 Socket BOT cavity
22uF_8 x4 Socket TOP edge
22uF_8 x4 Socket BOT edge
470uF_7343 x2
+VCC_GFX
C140
C140
22U/6.3V_8
22U/6.3V_8
C176
C176
22U/6.3V_8
22U/6.3V_8
C173
C173
22U/6.3V_8
22U/6.3V_8
C183
C183
22U/6.3V_8
22U/6.3V_8
C148
C148
22U/6.3V_8
22U/6.3V_8
C160
C160
22U/6.3V_8
22U/6.3V_8
Ra Stuff
+1.8V
SNB: 1.5A
C612
C612
C606
C606
1U/6.3V_4
1U/6.3V_4
10U/6.3V_8
10U/6.3V_8
330uF x1, 10uF_8 x1, 1uF_4 x2
Socket BOT edge.
Layout note: need routing
together and ALERT need
between CLK and DATA.
VR_SVID_CLK
Place PU resistor
close to CPU
VR_SVID_DATA
Place PU resistor close to CPU
H_CPU_SVIDALRT#
3
SNB: 21.5A
C158
C158
22U/6.3V_8
22U/6.3V_8
C185
C185
22U/6.3V_8
22U/6.3V_8
C137
C137
22U/6.3V_8
22U/6.3V_8
C146
C146
22U/6.3V_8
22U/6.3V_8
C303
C303
22U/6.3V_8
22U/6.3V_8
C116
C116
22U/6.3V_8
22U/6.3V_8
R584 *0_4 R584 *0_4
Ra
DISNCSG/UMA
+
+
C613
C613
1U/6.3V_4
1U/6.3V_4
3/26 DB Modify.
+1.05V_VTT +1.05V_VTT
R147
R147
130/F_4
130/F_4
3/26 DB Modify.
+1.05V_VTT
R157 75_4 R157 75_4
R164 43_4 R164 43_4
C608
C608
330U/2V_7343
330U/2V_7343
6/7 stuff
U39G
U39G
AT24
VAXG1
AT23
VAXG2
AT21
VAXG3
AT20
VAXG4
AT18
VAXG5
AT17
VAXG6
AR24
VAXG7
AR23
VAXG8
AR21
VAXG9
AR20
VAXG10
AR18
VAXG11
AR17
VAXG12
AP24
VAXG13
AP23
VAXG14
AP21
VAXG15
AP20
VAXG16
AP18
VAXG17
AP17
VAXG18
AN24
VAXG19
AN23
VAXG20
AN21
VAXG21
AN20
VAXG22
AN18
VAXG23
AN17
VAXG24
AM24
VAXG25
AM23
VAXG26
AM21
VAXG27
AM20
VAXG28
AM18
VAXG29
AM17
VAXG30
AL24
VAXG31
AL23
VAXG32
AL21
VAXG33
AL20
VAXG34
AL18
VAXG35
AL17
VAXG36
AK24
VAXG37
AK23
VAXG38
AK21
VAXG39
AK20
VAXG40
AK18
VAXG41
AK17
VAXG42
AJ24
VAXG43
AJ23
VAXG44
AJ21
VAXG45
AJ20
VAXG46
AJ18
VAXG47
AJ17
VAXG48
AH24
VAXG49
AH23
VAXG50
AH21
VAXG51
AH20
VAXG52
AH18
VAXG53
AH17
VAXG54
B6
VCCPLL1
A6
VCCPLL2
A2
VCCPLL3
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000014
DGG^9000014
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
Place PU resistor
close to VR
R150 *54.9/F_4 R150 *54.9/F_4
6/7 no stuff
Place PU resistor
R141
R141
close to VR
*130/F_4
*130/F_4
3/26 DB Modify.
SENSE
SENSE
LINES
LINES
VREF MISC
VREF MISC
GRAPHICS
GRAPHICS
DDR3 -1.5V RAILS
DDR3 -1.5V RAILS
SA RAIL
SA RAIL
1.8V RAIL
1.8V RAIL
SVID CLK
+1.05V_VTT
VR_SVID_CLK [47]
SVID DATA
VR_SVID_DATA [47]
SVID ALERT
VR_SVID_ALERT# [47]
2
VAXG_SENSE
VSSAXG_SENSE
SM_VREF
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8
VCCSA_SENSE
FC_C22
VCCSA_VID1
AK35
AK34
AL1
AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1
3/26 DB Modify.
+VDDR_REF_CPU
R585
R585
100K_4
100K_4
R171 100_4 R171 100_4
VCC_AXG_SENSE [47]
VSS_AXG_SENSE [47]
R176 100_4 R176 100_4
CAD Note: +VDDR_REF_CPU should
have 10 mil trace width
R586 *0_8 R586 *0_8
1
3
Q43
Q43
2N7002
2N7002
2
MAIND
SNB: 5A
C141
C141
C99
C99
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
+
+
C168
C168
C169
C169
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
330uF x1, 10uF_8 x6 Socket BOT edge.
3/26 DB change 10U FP to 0805.
SNB: 6A
M27
M26
L26
J26
J25
J24
H26
H25
H23
H_FC_C22
C22
C24
JP1
JP1
*SOLDERJUMPER-2
*SOLDERJUMPER-2
Q3
AON7410Q3AON7410
5 2
MAIND
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5/RD2
NB5/RD2
NB5/RD2
Date: Sheet
Date: Sheet
Date: Sheet of
C611
C611
C76
C76
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
330uF x1, 10uF_8 x1 Socket BOT edge,
10uF_8 x2 Socket BOT cavity.
3/26 DB change 10U FP to 0805.
R506 0_4 R506 0_4
R505 10K_4 R505 10K_4
R499
R499
10K_4
10K_4
5/11 add 10K by power
+1.5V_CPU +1.5VSUS +1.5VSUS
1 2
R137
R137
1
220_8
220_8
3
4
3
C161
C161
*470P/50V_4
*470P/50V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
2
Q5
2N7002Q52N7002
1
SNB 3/4 (POWER)
SNB 3/4 (POWER)
SNB 3/4 (POWER)
1
+VCC_GFX
DDR_VTTREF [12,13,44]
MAIND [45]
+1.5V_CPU
C170
C170
C179
C179
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
5/9 stuff
C95
C95
330U/2V_7343
330U/2V_7343
+VCCSA
C610
C610
C77
C77
*10U/6.3V_8
*10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
VCCUSA_SENSE [40]
VCCSA_SEL [40]
SNB: 5A
C102 0.1U/10V_4 C102 0.1U/10V_4
C113 0.1U/10V_4 C113 0.1U/10V_4
C122 0.1U/10V_4 C122 0.1U/10V_4
C131 0.1U/10V_4 C131 0.1U/10V_4
3/26 DB add for Intel.
Placement close to CPU.
MAIN_ONG [2,45]
CPU VDDQ
4 49 Tuesday, August 10, 2010
4 49 Tuesday, August 10, 2010
4 49 Tuesday, August 10, 2010
of
of
1A
1A
1A
5
4
3
2
1
Sandy Bridge Processor (GND)
U39I
M34
H33
H30
H27
H24
H21
H18
H15
H13
H10
G35
G32
G29
G26
G23
G20
G17
G11
U39I
T35
VSS161
T34
VSS162
T33
VSS163
T32
VSS164
T31
VSS165
T30
VSS166
T29
VSS167
T28
VSS168
T27
VSS169
T26
VSS170
P9
VSS171
P8
VSS172
P6
VSS173
P5
VSS174
P3
VSS175
P2
VSS176
N35
VSS177
N34
VSS178
N33
VSS179
N32
VSS180
N31
VSS181
N30
VSS182
N29
VSS183
N28
VSS184
N27
VSS185
N26
VSS186
VSS187
L33
VSS188
L30
VSS189
L27
VSS190
L9
VSS191
L8
VSS192
L6
VSS193
L5
VSS194
L4
VSS195
L3
VSS196
L2
VSS197
L1
VSS198
K35
VSS199
K32
VSS200
K29
VSS201
K26
VSS202
J34
VSS203
J31
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
H9
VSS214
H8
VSS215
H7
VSS216
H6
VSS217
H5
VSS218
H4
VSS219
H3
VSS220
H2
VSS221
H1
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
F34
VSS231
F31
VSS232
F29
VSS233
VSS
VSS
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3
SMDDR_VREF_DQ0_M3 [12]
SMDDR_VREF_DQ1_M3 [13]
H_VTTVID1 [41]
U39H
U39H
AT35
VSS1
AT32
VSS2
AT29
VSS3
AT27
VSS4
AT25
VSS5
AT22
VSS6
AT19
D D
C C
B B
AT16
AT13
AT10
AT7
AT4
AT3
AR25
AR22
AR19
AR16
AR13
AR10
AR7
AR4
AR2
AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10
AP7
AP4
AP1
AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10
AN7
AN4
AM29
AM25
AM22
AM19
AM16
AM13
AM10
AM7
AM4
AM3
AM2
AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10
AL7
AL4
AL2
AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10
AK7
AK4
AJ25
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS
VSS
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH26
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2
Sandy Bridge Processor (RESERVED, CFG)
U39E
U39E
For CPU debug.
TP5TP5
TP8TP8
TP6TP6
R501
R501
*1K_4
*1K_4
R504 0_4 R504 0_4
CFG0
CFG2
CFG4
CFG5
CFG6
CFG7 CFG7
R496
R496
*1K_4
*1K_4
AK28
CFG[0]
AK29
CFG[1]
AL26
CFG[2]
AL27
CFG[3]
AK26
CFG[4]
AL29
CFG[5]
AL30
CFG[6]
AM31
CFG[7]
AM32
CFG[8]
AM30
CFG[9]
AM28
CFG[10]
AM26
CFG[11]
AN28
CFG[12]
AN31
CFG[13]
AN26
CFG[14]
AM27
CFG[15]
AK31
CFG[16]
AN29
CFG[17]
AJ31
RSVD1
AH31
RSVD2
AJ33
RSVD3
AH33
RSVD4
AJ26
RSVD5
B4
RSVD6
D1
RSVD7
F25
RSVD8
F24
RSVD9
F23
RSVD10
D24
RSVD11
G25
RSVD12
G24
RSVD13
E23
RSVD14
D23
RSVD15
C30
RSVD16
A31
RSVD17
B30
RSVD18
B29
RSVD19
D30
RSVD20
B31
RSVD21
A30
RSVD22
C29
RSVD23
J20
RSVD24
B18
RSVD25
A19
RSVD26
J15
RSVD27
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000014
DGG^9000014
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
RESERVED
RESERVED
L7
RSVD28
AG7
RSVD29
AE7
RSVD30
AK2
RSVD31
W8
RSVD32
AT26
RSVD33
AM33
RSVD34
AJ27
RSVD35
T8
RSVD37
J16
RSVD38
H16
RSVD39
G16
RSVD40
AR35
RSVD41
AT34
RSVD42
AT33
RSVD43
AP35
RSVD44
AR34
RSVD45
B34
RSVD46
A33
RSVD47
A34
RSVD48
B35
RSVD49
C35
RSVD50
AJ32
RSVD51
AK32
RSVD52
AH27
RSVD53
AN35
RSVD54
AM35
RSVD55
#27636 SNB EDS0.7v1 no function.
AT2
RSVD56
AT1
RSVD57
AR1
RSVD58
For rPGA socket, RSVD59 pin should be left NC.
B1
KEY
TP52TP52
TP54TP54
05
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000014
DGG^9000014
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
Processor Strapping
The CFG signals have a default value of '1' if not terminated on the board.
1 0
A A
CFG2
(PEG Static Lane Reversal)
CFG4
(DP Presence Strap)
CFG7
(PEG Defer Training)
5
Normal Operation Lane Reversed
Disable; No physical DP attached to eDP
PEG train immediately following
xxRESETB de assertion
Sandy Bridge_rPGA_Rev0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000014
DGG^9000014
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
4
Enable; An ext DP device is connected to eDP
PEG wait for BIOS training
CFG[6:5] (PCIE Port Bifurcation Straps)
11: (Default) x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
CFG2
R129 1K_4 R129 1K_4
CFG4
R138 *1K_4 R138 *1K_4
CFG7
R174 *1K_4 R174 *1K_4
CFG5
R178 *1K_4 R178 *1K_4
CFG6
R168 *1K_4 R168 *1K_4
3
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5/RD2
NB5/RD2
NB5/RD2
Date: Sheet
Date: Sheet
2
Date: Sheet of
SNB 4/4 (GND)
SNB 4/4 (GND)
SNB 4/4 (GND)
1
1A
1A
5 49 Tuesday, August 10, 2010
5 49 Tuesday, August 10, 2010
5 49 Tuesday, August 10, 2010
1A
of
of
5
4
3
2
1
Cougar Point (DMI,FDI,PM)
U56C
U56C
DMI_RXN0 [2]
DMI_RXN1 [2]
DMI_RXN2 [2]
DMI_RXN3 [2]
DMI_RXP0 [2]
+1.05V
DMI_RXP1 [2]
DMI_RXP2 [2]
DMI_RXP3 [2]
DMI_TXN0 [2]
DMI_TXN1 [2]
DMI_TXN2 [2]
DMI_TXN3 [2]
DMI_TXP0 [2]
DMI_TXP1 [2]
DMI_TXP2 [2]
DMI_TXP3 [2]
R376 49.9/F_4 R376 49.9/F_4
R368 750/F_4 R368 750/F_4
R705 0_4 R705 0_4
R322 0_4 R322 0_4
R327 *0_4 R327 *0_4
R336 0_4 R336 0_4
R342 0_4 R342 0_4
R706 0_4 R706 0_4
R715 0_4 R715 0_4
R711 0_4 R711 0_4
DMI_COMP
DMI_RBIAS
SUSACK#_R
XDP_DBRST#
SYS_PWROK_R
EC_PWROK_R
APWROK_R
PM_DRAM_PWRGD
RSMRST#
SUS_PWR_ACK_R
DNBSWON#_R
AC_PRESENT_R
PM_BATLOW#
PM_RI#
D D
SUS_PWR_ACK_R
C C
B B
5/7: DEL R8293 for SUSACK# From EC
XDP_DBRST# [2]
SYS_PWROK
EC_PWROK [25,36]
EC_PWROK_R
PM_DRAM_PWRGD [2]
RSMRST# [36]
SUS_PWR_ACK [36]
DNBSWON# [36]
AC_PRESENT [36]
BC24
DMI0RXN
BE20
DMI1RXN
BG18
DMI2RXN
BG20
DMI3RXN
BE24
DMI0RXP
BC20
DMI1RXP
BJ18
DMI2RXP
BJ20
DMI3RXP
AW24
DMI0TXN
AW20
DMI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
(+3VS5)
K16
SUSWARN#/SUSPWRDNACK/GPIO30
E20
PWRBTN#
(DSW)
H20
ACPRESENT / GPIO31
(+3VS5)
E10
BATLOW# / GPIO72
A10
RI#
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QMZQ0T00
AJ0QMZQ0T00
IC CTRL(989P)COUGARPOINT QMZQ TOP B/S
IC CTRL(989P)COUGARPOINT QMZQ TOP B/S
DMI
FDI
DMI
FDI
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVRMEN
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
System Power Management
System Power Management
SLP_LAN# / GPIO29
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
FDI_INT
DPWROK
WAKE#
(+3V)
(+3VS5)
(+3VS5)
(+3VS5)
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
PMSYNCH
(+3VS5)
BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9
BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9
AW16
AV12
BC10
AV14
BB10
A18
E22
B9
N3
G8
N14
D10
H4
F4
G10
G16
AP14
K14
DSWVREN
R423 0_4 R423 0_4
PCIE_WAKE#
CLKRUN#
R287 0_4 R287 0_4
PCH_SUSCLK_L
R301 0_4 R301 0_4
R686 0_4 R686 0_4
TP30TP30
SLP_LAN#
FDI_TXN0 [2]
FDI_TXN1 [2]
FDI_TXN2 [2]
FDI_TXN3 [2]
FDI_TXN4 [2]
FDI_TXN5 [2]
FDI_TXN6 [2]
FDI_TXN7 [2]
FDI_TXP0 [2]
FDI_TXP1 [2]
FDI_TXP2 [2]
FDI_TXP3 [2]
FDI_TXP4 [2]
FDI_TXP5 [2]
FDI_TXP6 [2]
FDI_TXP7 [2]
FDI_INT [2]
FDI_FSYNC0 [2]
FDI_FSYNC1 [2]
FDI_LSYNC0 [2]
FDI_LSYNC1 [2]
TP67TP67
TP73TP73
R422 0_4 R422 0_4
DPWROK
PCIE_WAKE# [32,37,38]
CLKRUN# [36]
TP28TP28
PCH_SUSCLK [36]
TP20TP20
SLP_S5 [36]
SUSC# [36]
SUSB# [36]
TP55TP55
5/7: DEL R8304 , Add TP9041
PM_SYNC [2]
RSMRST#
PCH_LVDS_BLON [24]
PCH_DISP_ON [24]
PCH_DPST_PWM [24]
PCH_EDIDCLK [24]
PCH_EDIDDATA [24]
3/26 DB change net name.
PCH_LA_CLK# [24]
PCH_LA_CLK [24]
PCH_LA_DATAN0 [24]
PCH_LA_DATAN1 [24]
PCH_LA_DATAN2 [24]
PCH_LA_DATAP0 [24]
PCH_LA_DATAP1 [24]
PCH_LA_DATAP2 [24]
PCH_LB_CLK# [24]
PCH_LB_CLK [24]
PCH_LB_DATAN0 [24]
PCH_LB_DATAN1 [24]
PCH_LB_DATAN2 [24]
PCH_LB_DATAP0 [24]
PCH_LB_DATAP1 [24]
PCH_LB_DATAP2 [24]
PCH_CRT_B [24]
PCH_CRT_G [24]
PCH_CRT_R [24]
PCH_DDCCLK [24]
PCH_DDCDATA [24]
PCH_EDIDCLK
PCH_EDIDDAT
CTRL_CLK
CTRL_DATA
LVD_IBG
PCH_LA_CLK#
PCH_LA_CLK
PCH_LA_DATAN0
PCH_LA_DATAN1
PCH_LA_DATAN2
PCH_LA_DATAP0
PCH_LA_DATAP1
PCH_LA_DATAP2
PCH_LB_CLK#
PCH_LB_CLK
PCH_LB_DATAN0
PCH_LB_DATAN1
PCH_LB_DATAN2
PCH_LB_DATAP0
PCH_LB_DATAP1
PCH_LB_DATAP2
PCH_CRT_B
PCH_CRT_G
PCH_CRT_R
PCH_HSYNC_R
PCH_VSYNC_R
Cougar Point (LVDS,DDI)
U56D
U56D
J47
L_BKLTEN
M45
L_VDD_EN
P45
L_BKLTCTL
T40
L_DDC_CLK
K47
L_DDC_DATA
T45
L_CTRL_CLK
P39
L_CTRL_DATA
AF37
LVD_IBG
AF36
T2T2
DAC_IREF
R753
R753
1K/F_4
1K/F_4
LVD_VBG
AE48
LVD_VREFH
AE47
LVD_VREFL
AK39
LVDSA_CLK#
AK40
LVDSA_CLK
AN48
LVDSA_DATA#0
AM47
LVDSA_DATA#1
AK47
LVDSA_DATA#2
AJ48
LVDSA_DATA#3
AN47
LVDSA_DATA0
AM49
LVDSA_DATA1
AK49
LVDSA_DATA2
AJ47
LVDSA_DATA3
AF40
LVDSB_CLK#
AF39
LVDSB_CLK
AH45
LVDSB_DATA#0
AH47
LVDSB_DATA#1
AF49
LVDSB_DATA#2
AF45
LVDSB_DATA#3
AH43
LVDSB_DATA0
AH49
LVDSB_DATA1
AF47
LVDSB_DATA2
AF43
LVDSB_DATA3
N48
CRT_BLUE
P49
CRT_GREEN
T49
CRT_RED
T39
CRT_DDC_CLK
M40
CRT_DDC_DATA
M47
CRT_HSYNC
M49
CRT_VSYNC
T43
DAC_IREF
T42
CRT_IRTN
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QMZQ0T00
AJ0QMZQ0T00
IC CTRL(989P)COUGARPOINT QMZQ TOP B/S
IC CTRL(989P)COUGARPOINT QMZQ TOP B/S
LVDS
LVDS
CRT
CRT
+1.05V [7,8,10,40]
+3V_RTC [7,10]
+3V_DSW [7,10]
+3VPCU [7,25,34,35,36,37,39,42,43,45,46]
+3VS5 [2,7,8,9,10,45]
+3V [2,7,8,9,10,12,13,14,17,24,25,26,27,28,29,30,32,33,34,35,36,37,40,41,43,45,47]
+5V [7,10,24,25,26,27,28,29,31,32,33,35,37,45,49]
Digital Display Interface
Digital Display Interface
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_INTN
SDVO_INTP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
AP43
AP45
AM42
AM40
AP39
AP40
P38
M39
AT49
AT47
AT40
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
P46
P42
AP47
AP49
AT38
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
M43
M36
AT45
AT43
BH41
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
INT_DP_HPD_Q
INT_HDMI_SCL [28]
INT_HDMI_SDA [28]
DPB_HPD_Q
DPB_LANE0_N
DPB_LANE0_P
DPB_LANE1_N
DPB_LANE1_P
DPB_LANE2_N
DPB_LANE2_P
DPB_LANE3_N
DPB_LANE3_P
INT_DP_AUXN_C
INT_DP_AUXP_C
INT_DP_HPD_Q
INT_DP_TXN0_C
INT_DP_TXP0_C
INT_DP_TXN1_C
INT_DP_TXP1_C
INT_DP_TXN2_C
INT_DP_TXP2_C
INT_DP_TXN3_C
INT_DP_TXP3_C
INT DP Detect Function
INT_DP_SCL [26]
INT_DP_SDA [26]
C830 0.1U/10V_4 C830 0.1U/10V_4
C829 0.1U/10V_4 C829 0.1U/10V_4
C867 0.1U/10V_4 C867 0.1U/10V_4
C866 0.1U/10V_4 C866 0.1U/10V_4
C869 0.1U/10V_4 C869 0.1U/10V_4
C868 0.1U/10V_4 C868 0.1U/10V_4
C871 0.1U/10V_4 C871 0.1U/10V_4
C870 0.1U/10V_4 C870 0.1U/10V_4
C875 0.1U/10V_4 C875 0.1U/10V_4
C874 0.1U/10V_4 C874 0.1U/10V_4
+5V
2
1
Q51
Q51
2N7002K
2N7002K
R732
R732
*100K/J_4
*100K/J_4
06
3
R721
R721
100K/J_4
100K/J_4
INT. HDMI
INT_DP_AUXN [26]
INT_DP_AUXP [26]
INT_DP_TXN0 [26]
INT_DP_TXP0 [26]
INT_DP_TXN1 [26]
INT_DP_TXP1 [26]
INT_DP_TXN2 [26]
INT_DP_TXP2 [26]
INT_DP_TXN3 [26]
INT_DP_TXP3 [26]
INT. DP
INT_DP_HPD [26]
PCH Pull-high/low(CLG)
PM_RI#
PM_BATLOW#
PCIE_WAKE#
SLP_LAN#
SUS_PWR_ACK
AC_PRESENT_R
A A
CLKRUN#
XDP_DBRST#
RSMRST#
SYS_PWROK
R699 10K_4 R699 10K_4
R701 *8.2K_4 R701 *8.2K_4
R695 10K_4 R695 10K_4
R712 *10K_4 R712 *10K_4
R709 10K_4 R709 10K_4
R710 10K_4 R710 10K_4
R681 8.2K_4 R681 8.2K_4
R663 10K_4 R663 10K_4
R664 *1K_4 R664 *1K_4
R720 10K_4 R720 10K_4
R704 *10K_4 R704 *10K_4
+3VS5 +3VPCU +3VS5
+3V
INT LVDS & CRT disable
(DIS only remove)
+3V
PCH_HSYNC [24]
PCH_VSYNC [24]
PD Res place close to PCH
PCH to Res routeing 37.5ohm Impedance.
Res to connector filter routeing 50ohm Impedance.
R411 150/F_4 R411 150/F_4
R413 150/F_4 R413 150/F_4
3/26 DB change net name.
R750 2.2K_4 R750 2.2K_4
R751 2.2K_4 R751 2.2K_4
R391 2.37K/F_4 R391 2.37K/F_4
R415 33_4 R415 33_4
R421 33_4 R421 33_4
CTRL_CLK
CTRL_DATA
LVD_IBG
PCH_HSYNC_R
PCH_VSYNC_R
PCH_CRT_B
PCH_CRT_G
PCH_CRT_R
DPB_LANE0_N
DPB_LANE0_P
DPB_LANE1_N
DPB_LANE1_P
DPB_LANE2_N
DPB_LANE2_P
DPB_LANE3_N
DPB_LANE3_P
C489 0.1U/10V_4 C489 0.1U/10V_4
C488 0.1U/10V_4 C488 0.1U/10V_4
C491 0.1U/10V_4 C491 0.1U/10V_4
C492 0.1U/10V_4 C492 0.1U/10V_4
C493 0.1U/10V_4 C493 0.1U/10V_4
C494 0.1U/10V_4 C494 0.1U/10V_4
C495 0.1U/10V_4 C495 0.1U/10V_4
C496 0.1U/10V_4 C496 0.1U/10V_4
INT HDMI Detect Function
R763 0_4 R763 0_4
DPB_HPD_Q
R764
R764
*100K_4
*100K_4
1
Q52
Q52
2
*2N7002K
*2N7002K
+5V
INT_HDMI_TXDN2 [28]
INT_HDMI_TXDP2 [28]
INT_HDMI_TXDN1 [28]
INT_HDMI_TXDP1 [28]
INT_HDMI_TXDN0 [28]
INT_HDMI_TXDP0 [28]
INT_HDMI_TXCN [28]
INT_HDMI_TXCP [28]
5/11: swap 0 and 2
3
R768
R768
*100K_4
*100K_4
INT_HDMI_HPD [28]
7/2 SI modify
5
4
3
System PWR_OK(CLG)
C904 *0.1U/10V_4 C904 *0.1U/10V_4
SYS_PWROK
+3V_RTC
U54
U54
*TC7SH08FU
*TC7SH08FU
R713 330K_4 R713 330K_4 R409 150/F_4 R409 150/F_4
4
2
1
3 5
R700 0_4 R700 0_4
DSWVREN
On Die DSW VR Enable
High = Enable (Default)
Low = Disable
IMVP_PWRGD [47]
EC_PWROK
R341
R341
100K_4
100K_4
R714 *330K_4 R714 *330K_4
2
DPWROK FOR DSW INT HDMI disable (DIS only remove)
+3VS5
+3VPCU
6/7: remove D11
+3VPCU
+3V_DSW
D10
D10
*RB500V-40
*RB500V-40
D11
D11
*RB500V-40
*RB500V-40
Q16
Q16
*PDTC144EU
*PDTC144EU
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5/RD2
NB5/RD2
NB5/RD2
Date: Sheet
Date: Sheet
Date: Sheet of
R433
R433
*10K_4
*10K_4
N95361196
N95361196
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
2
1 3
PCH 1/6 (DMI/FDI/VIDEO)
PCH 1/6 (DMI/FDI/VIDEO)
PCH 1/6 (DMI/FDI/VIDEO)
1
7/2 SI modify
R434
R434
*10K_4
*10K_4
3
Q15
Q15
*2N7002
*2N7002
1
6 49 Tuesday, August 10, 2010
6 49 Tuesday, August 10, 2010
6 49 Tuesday, August 10, 2010
DPWROK
C513
C513
*0.1U/10V_4
*0.1U/10V_4
add cap to
timing tune
of
of
1A
1A
1A
5
TP68TP68
TP69TP69
7/18 SI Modify
TP74TP74
R367 1M_4 R367 1M_4
+5V
+3V_RTC
R809 10K_4 R809 10K_4
ACZ_SYNC
1
TP70TP70
Q59
Q59
2
2N7002K
2N7002K
3
SPKR [29]
D D
6/6 DB change net name.
ACZ_SDIN0 [29]
TP38TP38
6/25 SI Modify
C C
+3VPCU
B B
PCH Strap Table
Pin Name Strap description Sampled Configuration
SPKR
SMIB [38]
TP23TP23
TP27TP27
TP21TP21
TP25TP25
R666 *10K_4 R666 *10K_4
Different from
Calpella
GNT3# / GPIO55 Top-Block Swap Override
Cougar Point (HDA,JTAG,SATA)
U56A
RTC_X1
RTC_X2
RTC_RST#
SRTC_RST#
SM_INTRUDER#
PCH_INVRMEN
ACZ_BCLK
ACZ_SYNC_R
SPKR
ACZ_RST#
ACZ_SDOUT
GPIO33
PCH_JTAG_TCK_R
PCH_JTAG_TMS
PCH_JTAG_TDI_R
PCH_JTAG_TDO_R
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_CS1#
PCH_SPI_SI
PCH_SPI_SO
No reboot mode setting PWROK
U56A
A20
RTCX1
C20
RTCX2
D20
RTCRST#
G22
SRTCRST#
K22
INTRUDER#
C17
INTVRMEN
N34
HDA_BCLK
L34
HDA_SYNC
T10
SPKR
K34
HDA_RST#
E34
HDA_SDIN0
G34
HDA_SDIN1
C34
HDA_SDIN2
A34
HDA_SDIN3
A36
HDA_SDO
(+3V)
C36
HDA_DOCK_EN# / GPIO33
(+3VS5)
N32
HDA_DOCK_RST# / GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK
Y14
SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QMZQ0T00
AJ0QMZQ0T00
IC CTRL(989P)COUGARPOINT QMZQ TOP B/S
IC CTRL(989P)COUGARPOINT QMZQ TOP B/S
PWROK
INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up
HDA_DOCK_EN#/GPIO33
GNT1# / GPIO51
GPIO19
GNT2# / GPIO53
Different from
Calpella
NV_ALE
A A
NV_CLE
HDA_SYNC On-Die PLL VR Voltage Select RSMRST
Flash Descriptor Security
Only for Interposer
Boot BIOS Selection 1 [bit-1]
Boot BIOS Selection 0 [bit-0]
ESI strap (Server only)
Intel Anti-Theft HDD protection PWROK 0 = Disable (Internal pull-down 20kohm)
Only for Interposer
DMI Termination voltage weak pull-down 20kohm
PWROK
PWROK
PWROK
PWROK
PWROK
HDA_SDO PWROK Flash Descriptor Security
GPIO8
GPIO28
Different from
Calpella
Integrated Clock Chip Enable Should be pull-down (weak pull-up 20K)RSMRST#
On-die PLL Voltage Regulator RSMRST#
SPI_MOSI iTPM function Disable APWROK
5
4
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
LPC
LPC
FWH4 / LFRAME#
LDRQ0#
LDRQ1# / GPIO23
RTC IHDA
RTC IHDA
SPI JTAG
SPI JTAG
(+3V)
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA 6G
SATA 6G
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA
SATA
SATA4RXP
SATA4TXN
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3RCOMPO
SATA3COMPI
SATA3RBIAS
SATALED#
(+3V)
SATA0GP / GPIO21
(+3V)
SATA1GP / GPIO19
0 = Default (weak pull-down 20K)
1 = Setting to No-Reboot mode
0 = "top-block swap" mode
1 = Default (weak pull-up 20K)
0 = Override
1 = Default (weak pull-up 20K)
GNT0# GNT1#
1 1
0 0
Should not be pull-down
(weak pull-up 20K)
0 = Support by 1.8V (weak pull-down)
1 = Support by 1.5V
0 = Override
1 = Default (weak pull-up 20K)
0 = Disable
1 = Enable (Default)
0 = Default (weak pull-down 20K)
1 = Enable
4
C38
A38
B37
C37
D36
PCH_DRQ#0
E36
PCH_DRQ#1
K36
SERIRQ
V5
AM3
AM1
SATA_TXN0_C
AP7
SATA_TXP0_C
AP5
AM10
AM8
SATA_TXN1_C
AP11
SATA_TXP1_C
AP10
AD7
AD5
AH5
AH4
DG recommended that AC coupling capacitors should be
close to the connector (<100 mils) for optimal signal quality.
AB8
AB10
AF3
AF1
Y7
Y5
SATA_TXN4_C
AD3
SATA_TXP4_C
AD1
SATA_RXN5
Y3
SATA_RXP5
Y1
SATA_TXN5_C
AB3
SATA_TXP5_C
AB1
Y11
SATA_COMP
Y10
AB12
SATA3_COMP
AB13
SATA3_RBIAS
AH1
P3
SATA0GP
V14
BBS_BIT0
P1
Boot Location
SPI
LPC
LAD0 [36,37]
LAD1 [36,37]
LAD2 [36,37]
LAD3 [36,37]
LFRAME# [36,37]
TP39TP39
TP40TP40
R338 8.2K_4 R338 8.2K_4
C435 0.01U/25V_4 C435 0.01U/25V_4
C433 0.01U/25V_4 C433 0.01U/25V_4
C447 0.01U/25V_4 C447 0.01U/25V_4
C442 0.01U/25V_4 C442 0.01U/25V_4
C895 0.01U/25V_4 C895 0.01U/25V_4
C894 0.01U/25V_4 C894 0.01U/25V_4
C439 0.01U/25V_4 C439 0.01U/25V_4
C440 0.01U/25V_4 C440 0.01U/25V_4
R350 37.4/F_4 R350 37.4/F_4
R354 49.9/F_4 R354 49.9/F_4
R684 750/F_4 R684 750/F_4
R680 10K_4 R680 10K_4
R298 10K_4 R298 10K_4
SPKR
+3V
PCH_INVRMEN
GPIO33
[Need external pull-down for LPC BIOS]
Default weak pull-up on GNT0/1#
USE GPIO PIN
+1.8V
R678 2.2K_4 R678 2.2K_4
4/29 DB change net name.
4/30 reserve.
+1.8V
N.A at CPT EDS 0.7
+3VS5
ACZ_SDOUT
PCH_SPI_SI
+3V
SERIRQ [36]
SATA_RXN0 [33]
SATA_RXP0 [33]
SATA_TXN0 [33]
SATA_TXP0 [33]
SATA_RXN1 [33]
SATA_RXP1 [33]
SATA_TXN1 [33]
SATA_TXP1 [33]
SATA_RXN4 [33]
SATA_RXP4 [33]
SATA_TXN4 [33]
SATA_TXP4 [33]
SATA_RXN5 [33]
SATA_RXP5 [33]
SATA_TXN5 [33]
SATA_TXP5 [33]
+1.05V
SATA_LED# [37]
+3V
+3V
Circuit
R660 *1K_4 R660 *1K_4
R749 *1K_4 R749 *1K_4
R746 10K_4 R746 10K_4
R716 330K_4 R716 330K_4
R727 1K_4 R727 1K_4
R667 *1K_4 R667 *1K_4
R752 *1K_4 R752 *1K_4
R691 *1K_4 R691 *1K_4
R734 1K_4 R734 1K_4
R738 *1K_4 R738 *1K_4
R703 *1K_4 R703 *1K_4
R693 *1K_4 R693 *1K_4
R308 1K_4 R308 1K_4
3
+1.05V [6,8,10,40]
+1.8V [4,10,41,42]
+3V_RTC [6,10]
+3V_DSW [6,10]
+3VPCU [6,25,34,35,36,37,39,42,43,45,46]
+3V [2,6,8,9,10,12,13,14,17,24,25,26,27,28,29,30,32,33,34,35,36,37,40,41,43,45,47]
+V3.3A_1.5A_HDA_IO [10]
HDD0 (SATA3 6.0Gb/s)
HDD1 (SATA3 6.0Gb/s)
ODD (SATA1 1.5Gb/s)
E-SATA
+3V
PCI_GNT3# [8]
Bios request, for can't boot Capella 4/23.
+3V_RTC
GPIO33_E [36]
BBS_BIT0
BBS_BIT1 [8]
ACZ_SYNC_R
+V3.3A_1.5A_HDA_IO
4/29 reserve.
+3V
NV_ALE [8]
NV_CLE [8]
H_SNB_IVB# [2]
5/4 add
ICC_EN# [9]
PLL_ODVR_EN [9]
R694 4.7K_4 R694 4.7K_4
3
7/19 SI modify
2
8/1 SI modify
RTC Clock 32.768KHz
C924 15P/50V_4 C924 15P/50V_4
C919 15P/50V_4 C919 15P/50V_4
RTC Circuitry(RTC)
R739 *0_6 R739 *0_6
+3V_DSW
R736 0_6 R736 0_6
+3VPCU
+3V_RTC_0
R733 1K_4 R733 1K_4
1 2
CN24
CN24
BAT_CONN
BAT_CONN
RTC Power trace width 20mils.
BIT_CLK_AUDIO [29]
ACZ_SYNC_AUDIO [29]
ACZ_RST#_AUDIO [29]
ACZ_SDOUT_AUDIO [29]
7/18 SI modify
PCH_SPI_CS0#
PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_SO PCH_SPI1_SO_R
2
R306 0_4 R306 0_4
R320 0_4 R320 0_4
R356 0_4 R356 0_4
FOR DSW
+3V_RTC_2
+3V_RTC_1
D25
D25
BAT54C
BAT54C
6/7: change back to 33
R424 33_4 R424 33_4
R737 33_4 R737 33_4
R425 33_4 R425 33_4
R735 33_4 R735 33_4
ACZ_BCLK
ACZ_SYNC
ACZ_RST#
ACZ_SDOUT
5/5: EMI reserve
ACZ_SYNC
C951
C951
*0.1U/10V_4
*0.1U/10V_4
TP64TP64
TP65TP65
R361 3.3K_4 R361 3.3K_4
+3V
Vender
EON
TP58TP58
TP66TP66
PCH_SPI1_CLK_R
PCH_SPI1_SI_R
PCH_SPI1_SO_R
C437
C437
*22P/50V_4
*22P/50V_4
TP59TP59
Size
4MB
4MB
Socket
NB5/RD2
NB5/RD2
NB5/RD2
1
07
C958
C958
1U/6.3V_4
1U/6.3V_4
C956
C956
1U/6.3V_4
1U/6.3V_4
R426 *0_6 R426 *0_6
+3VS5
R288
R288
210/F_4
210/F_4
R286
R286
100/F_4
100/F_4
8
VDD
7
4
VSS
1
RTC_X1
R717
R717
10M_4
10M_4
RTC_X2
1 2
J2
J2
*SOLDERJUMPER-2
*SOLDERJUMPER-2
1 2
J1
J1
*SOLDERJUMPER-2
*SOLDERJUMPER-2
SRTC_RST# RTC_RST#
4/29: modify
R661
R661
210/F_4
210/F_4
PCH_JTAG_TMS
PCH_JTAG_TDI_R
PCH_JTAG_TDO_R
R656
R656
100/F_4
100/F_4
R304 3.3K_4 R304 3.3K_4
C438
C438
0.1U/10V_4
0.1U/10V_4
7 49 Tuesday, August 10, 2010
7 49 Tuesday, August 10, 2010
7 49 Tuesday, August 10, 2010
RTC_RST#
SRTC_RST#
PCH_JTAG_TCK_R
R314
R314
51_4
51_4
+3V
2 3
Y5
Y5
32.768KHZ
32.768KHZ
4 1
30mils
+3V_RTC
R757
R757
20K/F_4
20K/F_4
R756
R756
20K/F_4
20K/F_4
C957
C957
1U/6.3V_4
1U/6.3V_4
PCH JTAG Debug(CLG) HDA Bus(CLG)
R331
R331
210/F_4
210/F_4
R332
R332
100/F_4
100/F_4
PCH SPI ROM(CLG)
U23
U23
1
CE#
6
SCK
5
SI
2
SO
HOLD#
3
WP#
SPI Flash Socket
SPI Flash Socket
P/N
AKE39FN0Q00 (EN25F32-100HIP)
AKE391P0N00 (W25Q32BVSSIG) Winbond
DG008000031
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
PCH 2/6 (SATA/HDA/SPI)
PCH 2/6 (SATA/HDA/SPI)
Date: Sheet
Date: Sheet
Date: Sheet of
PCH 2/6 (SATA/HDA/SPI)
1A
1A
1A
of
of
5
PCI/USBOC# Pull-up(CLG)
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
MPC_PWR_CTRL#
D D
EDID_SELECT#
LCD_BK
USB_OC4#
USB_OC1#
USB_OC2#
USB_OC3#
R396 8.2K_4 R396 8.2K_4
R390 8.2K_4 R390 8.2K_4
R399 8.2K_4 R399 8.2K_4
R398 8.2K_4 R398 8.2K_4
+3V
RP9
RP9
10
9
8
7 4
10K_10P8R_6
10K_10P8R_6
+3VS5
RP8
RP8
10
9
8
7 4
10K_10P8R_6
10K_10P8R_6
MPC Switch Control
+3V
5
U27
U27
2 4
R808 *0_4 R808 *0_4
BT_COMBO_EN# [37]
DGPU_SELECT# [24,26,28]
EDID_SELECT# [24]
BBS_BIT1 [7]
PWM_SELECT# [24]
PCI_GNT3# [7]
LCD_BK [25]
DGPU_HOLD_RST# [35]
INTH# [30]
Bios swap GPIO
4/28.
CLK_33M_DEBUG [37]
CLK_33M_KBC [36]
CLK_PCI_FB
+3VS5
2
1
PLTRST#
Low = MPC ON
High = MPC OFF (Default)
R769 *1K_4 R769 *1K_4
1
C431 *0.1U/10V_4 C431 *0.1U/10V_4
U22
U22
3 5
*TC7SH08FU
*TC7SH08FU
PLTRST# [2,32,35,36,37,38]
MPC_PWR_CTRL#
MPC_PWR_CTRL#
C C
C502 .1U/10V_4 C502 .1U/10V_4
PCH_CLK_27M_1
B B
PLTRST#(CLG)
PCI_PLTRST#
R292
R292
0_4
0_4
A A
PEG Clock detect (SG only)
DGPU_PWROK [9,36,42,43,44]
2
CLK_PEGA_REQ#
Q14
Q14
*2N7002
*2N7002
3
1
+3V
DGPU_HOLD_RST#
1
INTH#
2
BT_COMBO_EN#
3
DGPU_SELECT#
5 6
USB_OC6#
1
USB_OC0#
2
USB_OC7#
3
USB_OC5#
5 6
DGPU_PWROK [9,36,42,43,44]
7/18 : Modify PN
PCH_CLK_27M [17]
*74LVC1G126
*74LVC1G126
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
BT_COMBO_EN#
DGPU_SELECT#
BBS_BIT1
PWM_SELECT#
PCI_GNT3#
MPC_PWR_CTRL#
LCD_BK
DGPU_HOLD_RST#
INTH#
PCI_PLTRST#
CLK_PCI_TPM_R
TP56TP56
CLK_PCI_CARD_R
TP41TP41
R414 22_4 R414 22_4
R406 22_4 R406 22_4
R405 22_4 R405 22_4
CLK_PCI_FB_R
CLK_PCI_LPC_R
CLK_PCI_EC_R
PLTRST#
4
4/29 modify
R283
R283
100K_4
100K_4
5/7: modify
5
TP29TP29
4/20 modify
SMB_PCH_DAT
SMB_PCH_CLK
Cougar Point-M (PCI,USB,NVRAM)
U56E
U56E
BG26
TP1
BJ26
TP2
BH25
TP3
BJ16
TP4
BG16
TP5
AH38
TP6
AH37
TP7
AK43
TP8
AK45
TP9
C18
TP10
N30
TP11
H3
TP12
AH12
TP13
AM4
TP14
AM5
TP15
Y13
TP16
K24
TP17
L24
TP18
AB46
TP19
AB45
TP20
B21
TP21
M20
TP22
AY16
TP23
BG46
TP24
BE28
TP25
BC30
TP26
BE32
TP27
BJ32
TP28
BC28
TP29
BE30
TP30
BF32
TP31
BG32
TP32
AV26
TP33
BB26
TP34
AU28
TP35
AY30
TP36
AU26
TP37
AY26
TP38
AV28
TP39
AW30
TP40
K40
PIRQA#
K38
PIRQB#
H38
PIRQC#
G38
PIRQD#
C46
REQ1# / GPIO50
C44
REQ2# / GPIO52
E40
REQ3# / GPIO54
D47
GNT1# / GPIO51
E42
GNT2# / GPIO53
F46
GNT3# / GPIO55
G42
PIRQE# / GPIO2
G40
PIRQF# / GPIO3
C42
PIRQG# / GPIO4
D44
PIRQH# / GPIO5
K10
PME#
C6
PLTRST#
H49
CLKOUT_PCI0
H43
CLKOUT_PCI1
J48
CLKOUT_PCI2
K42
CLKOUT_PCI3
H40
CLKOUT_PCI4
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QMZQ0T00
AJ0QMZQ0T00
IC CTRL(989P)COUGARPOINT QMZQ TOP B/S
IC CTRL(989P)COUGARPOINT QMZQ TOP B/S
MBCLK2 [13,26,30,36]
MBDATA2 [13,26,30,36]
Q13
Q13
2N7002K
2N7002K
RSVD
RSVD
PCI
PCI
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
SMBus/Pull-up(CLG)
2N7002K
2N7002K
1
Q49
Q49
+3V
1
Q50
Q50
2N7002K
2N7002K
3
R290 4.7K_4 R290 4.7K_4 R679 0_4 R679 0_4
2
+3V
3
2
Q12
Q12
2N7002K
2N7002K
R289 4.7K_4 R289 4.7K_4
1
1
NVRAM
NVRAM
USB
USB
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
2
2
4
NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3
NV_DQS0
NV_DQS1
NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15
NV_ALE
NV_CLE
NV_RCOMP
NV_RB#
NV_RE#_WRB0
NV_RE#_WRB1
NV_WE#_CK0
NV_WE#_CK1
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
SMB_ME1_CLK
3
R702 2.2K_4 R702 2.2K_4
+3VS5
R708 2.2K_4 R708 2.2K_4
SMB_ME1_DAT
3
SMB_RUN_DAT [12,13]
SMB_RUN_CLK [12,13]
4
AY7
AV7
AU3
BG4
AT10
BC8
AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6
AV5
AY1
AV10
AT8
AY5
BA2
AT12
BF3
C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32
C33
B33
A14
K20
B17
C16
L16
A16
D14
C14
WLAN
PCIE_RXN2_LAN [32]
[USB3.0]
SMB_PCH_DAT
NV_ALE
NV_CLE
SMB_PCH_CLK
USB_BIAS
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#
LAN
TP34TP34
TP35TP35
TP37TP37
TP36TP36
USB 3.0
PCIE_RXN1_USB3.0 [38]
PCIE_RXP1_USB3.0 [38]
PCIE_TXN1_USB3.0 [38]
PCIE_TXP1_USB3.0 [38]
+3V
Q54
Q54
*2N7002E
*2N7002E
NV_ALE [7]
NV_CLE [7]
Q53
Q53
*2N7002E
*2N7002E
+3V
USBP0- [33]
USBP0+ [33]
USBP4- [34]
USBP4+ [34]
USBP5- [38]
USBP5+ [38]
USBP8- [34]
USBP8+ [34]
USBP9- [34]
USBP9+ [34]
USBP10- [37]
USBP10+ [37]
USBP12- [34]
USBP12+ [34]
USBP13- [34]
USBP13+ [34]
R718
R718
22.6/F_4
22.6/F_4
USB_OC0# [38]
PCIE_RXP2_LAN [32]
PCIE_TXN2_LAN [32]
1
1
CLK_USB3.0_GEN2# [38]
CLK_USB3.0_GEN2 [38]
PCIE_CLK_REQB# [38]
CLK_REQ/Strap Pin(CLG)
CLK_PCIE_REQ1#
CLK_PCIE_REQ2#
CLK_PCIE_REQ0#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
CLK_PEGB_REQ#
CLK_PEGA_REQ#
CLK_PEGA_REQ#
CLK_BUF_BCLK_N
CLK_BUF_BCLK_P
CLK_BUF_PCIE_3GPLL#
CLK_BUF_PCIE_3GPLL
CLK_BUF_DREFCLK#
CLK_BUF_DREFCLK
CLK_BUF_DREFSSCLK#
CLK_BUF_DREFSSCLK
CLK_PCH_14M
CLOCK TERMINATION for FCIM
PCIE_RXN1 [37]
PCIE_RXP1 [37]
PCIE_TXN1 [37]
PCIE_TXP1 [37]
PCIE_TXP2_LAN [32]
C974 *0.1U/10V_4 C974 *0.1U/10V_4
2
3
+3V
3
C973 *0.1U/10V_4 C973 *0.1U/10V_4
2
R431 0_4 R431 0_4
R432 0_4 R432 0_4
6/7 modified
[E-SATA]
[Fingerprint]
[Webcam]
[USB 3.0 Co-layout]
[Right USB #1]
[Right USB #2]
[WLAN]
[Card Reaer]
[Blue Tooth LCD]
R329 10K_4 R329 10K_4
R315 10K_4 R315 10K_4
R689 10K_4 R689 10K_4
R692 10K_4 R692 10K_4
R323 10K_4 R323 10K_4
R310 10K_4 R310 10K_4
R325 *10K_4 R325 *10K_4
Ra
R311 10K_4 R311 10K_4
Rb
SG : Rb ; UMA : Ra
R382 10K_4 R382 10K_4
R381 10K_4 R381 10K_4
R362 10K_4 R362 10K_4
R357 10K_4 R357 10K_4
R377 10K_4 R377 10K_4
R379 10K_4 R379 10K_4
R334 10K_4 R334 10K_4
R335 10K_4 R335 10K_4
R407 10K_4 R407 10K_4
3
C477 0.1U/10V_4 C477 0.1U/10V_4
C481 0.1U/10V_4 C481 0.1U/10V_4
C485 0.1U/10V_4 C485 0.1U/10V_4
C486 0.1U/10V_4 C486 0.1U/10V_4
C484 .1U/10V_4 C484 .1U/10V_4
C487 .1U/10V_4 C487 .1U/10V_4
Q56
Q56
*2N7002E
*2N7002E
3
3
AMP_SDA SMB_RUN_DAT
AMP_SCL SMB_RUN_CLK
1
2
C965 *0.1U/10V_4 C965 *0.1U/10V_4
2
1
Q57
Q57
*2N7002E
*2N7002E
Reserve for Amp I2C
5/4.
Bios swap GPIO 4/23.
BOARD_ID0 [9]
RP4
RP4
0_4P2R_4
0_4P2R_4
3
1
R305 0_4 R305 0_4
BOARD_ID1 [9]
BOARD_ID2 [9]
+3V
+3VS5
3
2
Cougar Point-M (PCI-E,SMBUS,CLK)
U56B
U56B
BG34
PERN1
BJ34
PCIE_TXN1_C
PCIE_TXP1_C
PCIE_TXN2_LAN_C
PCIE_TXP2_LAN_C
PCIE_TXN3_C
PCIE_TXP3_C
AMP_SDA [30]
AMP_SCL [30]
CLK_PCH_SRC0N
CLK_PCH_SRC0P
CLK_PCIE_REQ0#
CLK_PCH_SRC2N
CLK_PCH_SRC2P
CLK_PCIE_REQ1#
CLK_PCIE_REQ2#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
CLK_USB3.0_GEN2N#
4
CLK_USB3.0_GEN2P
2
CLK_PEGB_REQ#
TP32TP32
TP31TP31
CLK_PCH_ITPN
CLK_PCH_ITPP
WLAN
PCIE_CLKREQ_WLAN# [37]
LAN
PCIE_CLKREQ_LAN# [32]
GPU
+3VS5 [2,6,7,9,10,45]
+3V [2,6,7,9,10,12,13,14,17,24,25,26,27,28,29,30,32,33,34,35,36,37,40,41,43,45,47]
AV32
AU32
BE34
BF34
BB32
AY32
BG36
BJ36
AV34
AU34
BF36
BE36
AY34
BB34
BG37
BH37
AY36
BB36
BJ38
BG38
AU36
AV36
BG40
BJ40
AY40
BB40
BE38
BC38
AW38
AY38
Y40
Y39
AB49
AB47
AA48
AA47
V10
Y37
Y36
Y43
Y45
V45
V46
AB42
AB40
V40
V42
T13
V38
V37
K12
AK14
AK13
CLK_PCIE_WLANN [37]
CLK_PCIE_WLANP [37]
CLK_PCIE_LANN [32]
CLK_PCIE_LANP [32]
CLK_PCIE_VGA# [14]
CLK_PCIE_VGA [14]
PERP1
PETN1
PETP1
PERN2
PERP2
PETN2
PETP2
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PERN5
PERP5
PETN5
PETP5
PERN6
PERP6
PETN6
PETP6
PERN7
PERP7
PETN7
PETP7
PERN8
PERP8
PETN8
PETP8
CLKOUT_PCIE0N
CLKOUT_PCIE0P
J2
PCIECLKRQ0# / GPIO73
(+3VS5)
CLKOUT_PCIE1N
CLKOUT_PCIE1P
M1
PCIECLKRQ1# / GPIO18
(+3V)
CLKOUT_PCIE2N
CLKOUT_PCIE2P
PCIECLKRQ2# / GPIO20
(+3V)
CLKOUT_PCIE3N
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
(+3VS5)
CLKOUT_PCIE4N
CLKOUT_PCIE4P
L12
PCIECLKRQ4# / GPIO26
(+3VS5)
CLKOUT_PCIE5N
CLKOUT_PCIE5P
L14
PCIECLKRQ5# / GPIO44
(+3VS5)
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
E6
PEG_B_CLKRQ# / GPIO56
(+3VS5)
CLKOUT_PCIE6N
CLKOUT_PCIE6P
PCIECLKRQ6# / GPIO45
(+3VS5)
CLKOUT_PCIE7N
CLKOUT_PCIE7P
PCIECLKRQ7# / GPIO46
(+3VS5)
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
3/26 DB change Part reference.
PCI-E*
PCI-E*
RP1
RP1
0_4P2R_4
0_4P2R_4
1
3
R674 0_4 R674 0_4
RP3
RP3
0_4P2R_4
0_4P2R_4
3
1
RP2
RP2
0_4P2R_4
0_4P2R_4
2
4
2
4
4
2
1
3
2
CLOCKS
CLOCKS
CLK_PCH_SRC0N
CLK_PCH_SRC0P
CLK_PCIE_REQ0#
CLK_PCH_SRC2N
CLK_PCH_SRC2P
CLK_PCIE_REQ1#
CLK_PCH_PEGAN
CLK_PCH_PEGAP
SMBALERT# / GPIO11
SML0ALERT# / GPIO60
SMBUS Controller
SMBUS Controller
SML1ALERT# / PCHHOT# / GPIO74
SML1DATA / GPIO75
Link
Link
PEG_A_CLKRQ# / GPIO47
CLKIN_PCILOOPBACK
CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67
FLEX CLOCKS
FLEX CLOCKS
AJ0QMZQ0T00
AJ0QMZQ0T00
IC CTRL(989P)COUGARPOINT QMZQ TOP B/S
IC CTRL(989P)COUGARPOINT QMZQ TOP B/S
(+3VS5)
SMBCLK
SMBDATA
(+3VS5)
SML0CLK
SML0DATA
(+3VS5)
(+3VS5)
SML1CLK / GPIO58
(+3VS5)
CL_CLK1
CL_DATA1
CL_RST1#
(+3VS5)
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_DP_N
CLKOUT_DP_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N
CLKIN_SATA_P
REFCLK14IN
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
(+3V)
(+3V)
(+3V)
(+3V)
1
SMBALERT#
E12
SMB_PCH_CLK
H14
SMB_PCH_DAT
C9
DRAMRST_CNTRL_PCH
A12
SMB_ME0_CLK
C8
SMB_ME0_DAT
G12
SML1ALERT#_R
C13
SMB_ME1_CLK
E14
SMB_ME1_DAT
M16
CL_CLK_R
M7
CL_DAT_R
T11
CL_RST#_R
P10
CLK_PEGA_REQ#
M10
CLK_PCH_PEGAN
AB37
CLK_PCH_PEGAP
AB38
AV22
AU22
AM12
AM13
CLK_BUF_PCIE_3GPLL#
BF18
CLK_BUF_PCIE_3GPLL
BE18
CLK_BUF_BCLK_N
BJ30
CLK_BUF_BCLK_P
BG30
CLK_BUF_DREFCLK#
G24
CLK_BUF_DREFCLK
E24
CLK_BUF_DREFSSCLK#
AK7
CLK_BUF_DREFSSCLK
AK5
CLK_PCH_14M
K45
CLK_PCI_FB
H45
XTAL25_IN
V47
XTAL25_OUT
V49
XCLK_RCOMP
Y47
R741 90.9/F_4 R741 90.9/F_4
3/26 DB del external
clock generator.
2 1
R744
R744
1M_4
1M_4
5/13: modify CLK_48M to CLK_FLEX1
CLK_FLEX0
K43
CLK_FLEX1
F47
CLK_FLEX2
H47
CLK_FLEX3 PCH_CLK_27M_1
K49
Remove Ra, Rb for UMA & SG.
27MHz support DIS only.
+3VS5
R330 1K_4 R330 1K_4
R337 10K_4 R337 10K_4
R347 2.2K_4 R347 2.2K_4
R343 2.2K_4 R343 2.2K_4
R677 2.2K_4 R677 2.2K_4
R349 2.2K_4 R349 2.2K_4
R364 10K_4 R364 10K_4
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5/RD2
NB5/RD2
NB5/RD2
Date: Sheet of
Date: Sheet of
Date: Sheet of
TP42TP42
R412 22_4 R412 22_4
R416 *22_4 R416 *22_4
SMBus/Pull-up(CLG) PCIE Clock
DRAMRST_CNTRL_PCH
SMBALERT#
SMB_PCH_CLK
SMB_PCH_DAT
SMB_ME0_CLK
SMB_ME0_DAT
SML1ALERT#_R
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PCH 3/6 (PCIE/USB/CLK)
PCH 3/6 (PCIE/USB/CLK)
PCH 3/6 (PCIE/USB/CLK)
1
08
DRAMRST_CNTRL_PCH [2]
TP33TP33
TP22TP22
TP24TP24
TP26TP26
CLK_CPU_BCLKN [2]
CLK_CPU_BCLKP [2]
CLK_DPLL_SSCLKN [2]
CLK_DPLL_SSCLKP [2]
4/19 change FB
to small size
TP71TP71
C953
C953
27P/50V_4
27P/50V_4
Y6
25MHZY625MHZ
C952
C952
27P/50V_4
27P/50V_4
TP72TP72
+1.05V
CLK_48M_CR [38]
TP57TP57
8 49 Tuesday, August 10, 2010
8 49 Tuesday, August 10, 2010
8 49 Tuesday, August 10, 2010
1A
1A
1A
5
Cougar Point (GPIO,VSS_NCTF,RSVD)
Cougar Point (GPIO,VSS_NCTF,RSVD)
Cougar Point (GPIO,VSS_NCTF,RSVD) Cougar Point (GPIO,VSS_NCTF,RSVD)
U56F
Bios swap GPIO 4/28.
PCI_SERR# [36]
SIO_EXT_SMI# [36]
Add R9048 4/28.
D D
Add TP 8204 5/14.
Reserve
C C
B B
SIO_EXT_SCI# [36]
BT_OFF# [34,37]
ACCLED_EN [37]
ICC_EN# [7]
TP19TP19
+3VS5 [2,6,7,8,10,45]
+3V [2,6,7,8,10,12,13,14,17,24,25,26,27,28,29,30,32,33,34,35,36,37,40,41,43,45,47]
LAN_DISABLE#
RF_OFF# [37]
ODD_PRSNT# [33]
DGPU_PWROK [8,36,42,43,44]
Bios swap GPIO 4/28.
BOARD_ID5
PLL_ODVR_EN [7]
BOARD_ID3
BOARD_ID4
DGPU_PWR_EN [36,42,43,44]
R296 *0_4 R296 *0_4
R345 0_4 R345 0_4
R673 *0_4 R673 *0_4
R293 *0_4 R293 *0_4
R696 0_4 R696 0_4
R317 0_4 R317 0_4
Model
SP9 2D
SP9 3D
A A
0
0 0 0 0 0
S_GPIO
SIO_EXT_SMI#
SIO_EXT_SCI#
BT_OFF#
ICC_EN#
LAN_DISABLE#_R
RF_OFF#
ODD_PRSNT#_R
DGPU_PWROK
BIOS_REC
BOARD_I D5
GPIO27
PLL_ODVR_EN_R
BOARD_ID3
BOARD_ID4
DGPU_PWR_EN_R
FDI_OVRVLTG
MFG_MODE
DGPU_PRSNT#
TEST_SET_UP
SATA5GP
SV_DET
BOARD_ID1 BOARD_ID2 BOARD_ID3 BOARD_ID4 BOARD_ID5
0
0 0 0
U56F
T7
BMBUSY# / GPIO0
(+3V)
A42
TACH1 / GPIO1
(+3V)
H36
TACH2 / GPIO6
(+3V)
E38
TACH3 / GPIO7
(+3V)
C10
GPIO8
(+3VS5)
C4
LAN_PHY_PWR_CTRL / GPIO12
(+3VS5)
G2
GPIO15
(+3VS5)
U2
SATA4GP / GPIO16
(+3V)
D40
TACH0 / GPIO17
(+3V)
T5
SCLOCK / GPIO22
(+3V)
E8
GPIO24 / MEM_LED
(+3VS5)
E16
GPIO27
(DSW)
P8
GPIO28
(+3VS5)
K1
STP_PCI# / GPIO34
(+3V)
K4
GPIO35
(+3V)
V8
SATA2GP / GPIO36
(+3V)
M5
SATA3GP / GPIO37
(+3V)
N2
SLOAD / GPIO38
(+3V)
M3
SDATAOUT0 / GPIO39
(+3V)
V13
SDATAOUT1 / GPIO48
(+3V)
V3
SATA5GP / GPIO49
(+3V)
D6
GPIO57
(+3VS5)
A4
VSS_NCTF_1
A44
VSS_NCTF_2
A45
VSS_NCTF_3
A46
VSS_NCTF_4
A5
VSS_NCTF_5
A6
VSS_NCTF_6
B3
VSS_NCTF_7
B47
VSS_NCTF_8
BD1
VSS_NCTF_9
BD49
VSS_NCTF_10
BE1
VSS_NCTF_11
BE49
VSS_NCTF_12
BF1
VSS_NCTF_13
BF49
VSS_NCTF_14
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QMZQ0T00
AJ0QMZQ0T00
IC CTRL(989P)COUGARPOINT QMZQ TOP B/S
IC CTRL(989P)COUGARPOINT QMZQ TOP B/S
BOARD_ID0
0
1
8/2 SI Modify
5
4
4
TACH4 / GPIO68
TACH5 / GPIO69
TACH6 / GPIO70
TACH7 / GPIO71
PROCPWRGD
GPIO
GPIO
CPU/MISC
CPU/MISC
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
NCTF
NCTF
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
BOARD_ID0 [8]
BOARD_ID1 [8]
BOARD_ID2 [8]
RD0
R697 10K_4 R697 10K_4
RD1
R302 10K_4 R302 10K_4
RD2
R355 10K_4 R355 10K_4
RD3
R683 10K_4 R683 10K_4
RD4
R658 10K_4 R658 10K_4
RD5
R309 10K_4 R309 10K_4
(+3V)
(+3V)
(+3V)
(+3V)
A20GATE
PECI
RCIN#
THRMTRIP#
INIT3_3V#
TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4
NC_1
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
3
+3V
C40
B41
GPIO70
C41
GPIO71
A40
P4
AU16
EC_RCIN#
P5
AY11
PCH_THRMTRIP#
AY10
T14
AH8
AK11
AH10
AK10
P37
DG rev0.9 suggest to TS_VSS connect to GND 4/23.
BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49
BOARD_ID0
BOARD_ID1
BOARD_ID2
R698 *10K_4 R698 *10K_4
R307 *10K_4 R307 *10K_4
R348 *10K_4 R348 *10K_4
R657 *10K_4 R657 *10K_4
R324 *10K_4 R324 *10K_4
R404 10K_4 R404 10K_4
R766 1.5K/F_4 R766 1.5K/F_4
R352 0_4 R352 0_4
RU0
RU1
RU2
RU3
RU4
RU5
4/29 modify
R346 390_4 R346 390_4
+3VS5
+3V
+3VS5
3
EC_A20GATE [36]
EC_RCIN# [36]
H_PWRGOOD [2]
PM_THRMTRIP# [2,36]
Intel ME Crypto Transport Layer
Security (TLS) cipher suite
Low = Disable (Default)
High = Enable
R313 *0_4 R313 *0_4
SV_SET_UP
High = Strong (Default)
DMI TERMINATION
VOLTAGE OVERRIDE
R670 *100K_4 R670 *100K_4 R685 *10K_4 R685 *10K_4
MFG-TEST
MFG_MODE
R669 10K_4 R669 10K_4
R668 *0_4 R668 *0_4
SGPIO
S_GPIO
Bios swap GPIO 4/28.
RF_OFF#
TEST_SET_UP
Low = Tx, Rx terminated to
same voltage (DC Coupling Mode)
(DEFAULT)
R297 10K_4 R297 10K_4
R295 *0_4 R295 *0_4
R682 1K_4 R682 1K_4
R319 10K_4 R319 10K_4 R687 *10K_4 R687 *10K_4
R316 200K/F_4 R316 200K/F_4
GFX Present
SG
Ra
Rb
Ra Rb
R671 10K_4 R671 10K_4
UMA
Rb
Ra
DGPU_PRSNT#
Stuff
NC
2
1
Clock Gen Power OK (CLG)
3/26 DB del external
clock generator.
GPIO Pull-up/Pull-down(CLG)
+3V
LAN_DISABLE#_R
ACCLED_EN
SIO_EXT_SCI#
SIO_EXT_SMI#
BT_OFF#
EC_A20GATE
EC_RCIN#
SATA5GP
+3V
+3VS5
GPIO70
GPIO71
ODD_PRSNT#_R
DGPU_PWROK
DGPU_PWROK
GPIO27
BIOS RECOVERY High = Disable (Default)
+3V
R688 100K_4 R688 100K_4
+3V +3V
R300 100K_4 R300 100K_4
FDI TERMINATION
VOLTAGE OVERRIDE
+3V
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5/RD2
NB5/RD2
NB5/RD2
Date: Sheet
Date: Sheet
2
Date: Sheet of
R672 10K_4 R672 10K_4
R344 10K_4 R344 10K_4
R397 10K_4 R397 10K_4
R747 10K_4 R747 10K_4
R439 10K_4 R439 10K_4
R303 10K_4 R303 10K_4
R291 10K_4 R291 10K_4
R675 10K_4 R675 10K_4
R745 1.5K/F_4 R745 1.5K/F_4
R748 1.5K/F_4 R748 1.5K/F_4
R294 10K_4 R294 10K_4
R418 10K_4 R418 10K_4
R417 *10K_4 R417 *10K_4
R359 10K_4 R359 10K_4
5/4 modify
BIOS_REC
R285 10K_4 R285 10K_4 R284 *0_4 R284 *0_4
Low = Enable
SV_DET
TEST DETECT
Low = Default
FDI_OVRVLTG DGPU_PWR_EN_R
LOW - Tx, Rx terminated
to same voltage
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PCH 4/6 (GPIO/MISC)
PCH 4/6 (GPIO/MISC)
PCH 4/6 (GPIO/MISC)
1
+3VS5
+3V
R299 *1K_4 R299 *1K_4
9
9 49 Tuesday, August 10, 2010
9 49 Tuesday, August 10, 2010
9 49 Tuesday, August 10, 2010
+3V
+3V
1A
1A
1A
of
of
5
4
3
2
1
Cougar Point-M (POWER)
COUGAR POINT (POWER)
U56G
U56G
AA23
VCCCORE[1]
AC23
VCCCORE[2]
AD21
VCCCORE[3]
AD23
VCCCORE[4]
AF21
VCCCORE[5]
AF23
VCCCORE[6]
AG21
VCCCORE[7]
AG23
VCCCORE[8]
AG24
VCCCORE[9]
AG26
VCCCORE[10]
AG27
VCCCORE[11]
AG29
VCCCORE[12]
AJ23
VCCCORE[13]
AJ26
VCCCORE[14]
AJ27
VCCCORE[15]
AJ29
VCCCORE[16]
AJ31
VCCCORE[17]
AN19
VCCIO[28]
BJ22
VCCAPLLEXP
AN16
VCCIO[15]
AN17
VCCIO[16]
AN21
VCCIO[17]
AN26
VCCIO[18]
AN27
VCCIO[19]
AP21
VCCIO[20]
AP23
VCCIO[21]
AP24
VCCIO[22]
AP26
VCCIO[23]
AT24
VCCIO[24]
AN33
VCCIO[25]
AN34
VCCIO[26]
BH29
VCC3_3[3]
AP16
VCCVRM[2]
BG6
VccAFDIPLL
AP17
VCCIO[27]
AU20
VCCDMI[2]
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QMZQ0T00
AJ0QMZQ0T00
IC CTRL(989P)COUGARPOINT QMZQ TOP B/S
IC CTRL(989P)COUGARPOINT QMZQ TOP B/S
C944 1U/6.3V_4 C944 1U/6.3V_4
+
+
C945 *220U/2.5V_3528
C945 *220U/2.5V_3528
C954 1U/6.3V_4 C954 1U/6.3V_4
+
+
C946 *220U/2.5V_3528
C946 *220U/2.5V_3528
C949 1U/6.3V_4 C949 1U/6.3V_4
L66
L66
10uH/100mA_8
10uH/100mA_8
C959 10U/6.3VS_6 C959 10U/6.3VS_6
2
CRT LVDS
CRT LVDS
VCC CORE
VCC CORE
VCCIO
VCCIO
DMI
DMI
NAND / SPI HVCMOS
NAND / SPI HVCMOS
FDI
FDI
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCADAC
VSSADAC
VCCALVDS
VSSALVDS
VCC3_3[6]
VCC3_3[7]
VCCVRM[3]
VCCDMI[1]
VCCCLKDMI
119mA (20mils)
+3V
+1.05V +1.05V_VCCUSBCORE
+3VS5
+1.05V
+3VS5
+3V
+1.05V
+1.05V
+1.05V
+1.5VSUS
+3VS5
3
+1.05V +1.05V_PCH_VCC
1.3 A (60mils)
C469
C469
1U/6.3V_4
1U/6.3V_4
C461
C461
1U/6.3V_4
1U/6.3V_4
7/18 SI Modify
C459
C459
10U/6.3VS_6
10U/6.3VS_6
+1.05V_PCH_VCCDPLL_EXP +1.05V
R375
R375
0_6
0_6
+1.05V +1.05V_VCCAPLL_EXP
L59
L59
*1uH/25mA_6
*1uH/25mA_6
+1.05V +1.05V_VCCIO
7/18 SI Modify
C482
C482
10U/6.3VS_6
10U/6.3VS_6
R719 0_8 R719 0_8
160mA (15mils)
R760 0_6 R760 0_6
R761 *0_6 R761 *0_6
+1.05V_VTT
L62
L62
10uH/100MA_8
10uH/100MA_8
L63
L63
10uH/100MA_8
10uH/100MA_8
+3V
R765 *0_6 R765 *0_6
R774 1/F_4 R774 1/F_4
R775 *1/F_4 R775 *1/F_4
R777 0_4 R777 0_4
+VCCAFDI_VRM
+1.05V
20mA (10mils)
(Mobile 1.5V)
+1.5V
+1.05V
+1.05V
+1.05V +VCC_DMI_CCI +1.1V_VCC_DMI_CCI
C468
C468
1U/6.3V_4
1U/6.3V_4
C931
C931
*10U/6.3V_6
*10U/6.3V_6
2.925 A (140mils)
C479
C479
C480
C480
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C466
C466
C472
C472
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
+3V_VCC_EXP +3V
C939
C939
0.1U/10V_4
0.1U/10V_4
+VCCAFDI_VRM
+1.05V_VCCAPLL_FDI
R676 *0_8 R676 *0_8
R351 0_8 R351 0_8
+1.05V_VCCDPLL_FDI
65mA (10mils)
+1.05V_VCCA_A_DPL
8mA (10mils)
+1.05V_VCCA_B_DPL
20mA (10mils)
+3V_SUS_CLKF33
+3V_SUS_CLKF33_R
L67
L67
*10uH/100mA_8
*10uH/100mA_8
U56J
R743 *0_8 R743 *0_8
+1.05V
R363 0_4 R363 0_4
+3VS5
R366 *0_4 R366 *0_4
+3V_DSW
C458
8/8 SI Modify
D D
+1.05V
L60
L60
*10uH/100mA_8
*10uH/100mA_8
+1.05V
R386
R386
0_6
0_6
+1.05V +1.05V_VCCEPW
7/18 SI Modify
C C
R690 0_6 R690 0_6
+1.05V
R767 0_6 R767 0_6
+1.05V
B B
R740 0_6 R740 0_6
+1.05V
R374 *0_6 R374 *0_6
+1.05V
R358 0_4 R358 0_4
+1.05V_VTT
V_PROC_IO=1mA
(10mils)
A A
+3V_RTC
VCCRTC<1mA
(10mils)
C458
0.1U/10V_4
0.1U/10V_4
+VCCAPLL_CPY_PCH
C932
C932
*10U/6.3V_6
*10U/6.3V_6
C470
C470
1U/6.3V_4
1U/6.3V_4
C897
C897
1U/6.3V_4
1U/6.3V_4
C962
C962
1U/6.3V_4
1U/6.3V_4
C950
C950
1U/6.3V_4
1U/6.3V_4
C457
C457
*1U/6.3V_4
*1U/6.3V_4
C915
C915
4.7U/6.3V_6
4.7U/6.3V_6
C928
C928
1U/6.3V_4
1U/6.3V_4
5
7/18 SI Modify
1.01A (60mils)
+1.05V [6,7,8,40]
+1.05V_VTT [2,4,36,41,47]
+1.5VSUS [2,4,12,13,40,44]
+1.8V [4,7,41,42]
C449
C449
*0.1U/10V_4
*0.1U/10V_4
C462
C462
1U/6.3V_4
1U/6.3V_4
C475
C475
22U/6.3VS_8
22U/6.3VS_8
C450
C450
0.1U/10V_4
0.1U/10V_4
+VCCAFDI_VRM
160mA (20mils)
+1.05V_VCCA_A_DPL
65mA (10mils)
+1.05V_VCCA_B_DPL
8mA (10mils)
+VCCDIFFCLK
+VCCDIFFCLKN
55mA (10mils)
+V1.05V_SSCVCC
95mA (10mils)
C451
C451
0.1U/10V_4
0.1U/10V_4
+V1.05M_VCCSUS
+VTT_VCCPCPU
C912
C912
0.1U/10V_4
0.1U/10V_4
C927
C927
0.1U/10V_4
0.1U/10V_4
+VCCACLK
+VCCPDSW
3mA (10mils)
PCH_VCCDSW
+3V_SUS_CLKF33
+VCCDPLL_CPY
+VCCSUS1
C914
C914
*1U/6.3V_4
*1U/6.3V_4
C471
C471
1U/6.3V_4
1U/6.3V_4
C476
C476
22U/6.3VS_8
22U/6.3VS_8
+VCCRTCEXT
+VCCSST
C911
C911
0.1U/10V_4
0.1U/10V_4
C922
C922
0.1U/10V_4
0.1U/10V_4
U56J
AD49
VCCACLK
T16
VCCDSW3_3
V12
DCPSUSBYP
T38
VCC3_3[5]
BH23
VCCAPLLDMI2
AL29
VCCIO[14]
AL24
DCPSUS[3]
AA19
VCCASW[1]
AA21
VCCASW[2]
AA24
VCCASW[3]
AA26
VCCASW[4]
AA27
VCCASW[5]
AA29
VCCASW[6]
AA31
VCCASW[7]
AC26
VCCASW[8]
AC27
VCCASW[9]
AC29
VCCASW[10]
AC31
VCCASW[11]
AD29
VCCASW[12]
AD31
VCCASW[13]
W21
VCCASW[14]
W23
VCCASW[15]
W24
VCCASW[16]
W26
VCCASW[17]
W29
VCCASW[18]
W31
VCCASW[19]
W33
VCCASW[20]
N16
DCPRTC
Y49
VCCVRM[4]
BD47
VCCADPLLA
BF47
VCCADPLLB
AF17
VCCIO[7]
AF33
VCCDIFFCLKN[1]
AF34
VCCDIFFCLKN[2]
AG34
VCCDIFFCLKN[3]
AG33
VCCSSC
V16
DCPSST
T17
DCPSUS[1]
V19
DCPSUS[2]
BJ8
V_PROC_IO
A22
VCCRTC
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QMZQ0T00
AJ0QMZQ0T00
IC CTRL(989P)COUGARPOINT QMZQ TOP B/S
IC CTRL(989P)COUGARPOINT QMZQ TOP B/S
Clock and Miscellaneous
Clock and Miscellaneous
CPU RTC
CPU RTC
+3V_RTC [6,7]
+3V_DSW [6,7]
+3VS5 [2,6,7,8,9,45]
+3V [2,6,7,8,9,12,13,14,17,24,25,26,27,28,29,30,32,33,34,35,36,37,40,41,43,45,47]
+5VS5 [25,45]
+5V [6,7,24,25,26,27,28,29,31,32,33,35,37,45,49]
PCI/GPIO/LPC MISC
PCI/GPIO/LPC MISC
SATA USB
SATA USB
HDA
HDA
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[6]
V5REF_SUS
VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCAPLLSATA
VCCASW[22]
VCCASW[23]
VCCASW[21]
VCCSUSHDA
4
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
DCPSUS[4]
V5REF
VCC3_3[1]
VCC3_3[8]
VCC3_3[4]
VCC3_3[2]
VCCIO[5]
VCCIO[12]
VCCIO[13]
VCCIO[6]
VCCVRM[1]
VCCIO[2]
VCCIO[3]
VCCIO[4]
N26
P26
P28
T27
T29
+3V_VCCPUSB
T23
T24
V23
V24
+3V_VCCAUBG
P24
+VCCAUPLL
T26
+5V_PCH_VCC5REFSUS
M26
+VCCA_USBSUS
AN23
+3V_VCCPSUS
AN24
+5V_PCH_VCC5REF
P34
N20
N22
119mA (15mils)
+3V_VCCPSUS
P20
P22
AA16
266mA (20mils)
+3V_VCCPCORE
W16
T34
AJ2
AF13
AH13
AH14
AF14
+V1.1LAN_VCCAPLL
AK1
+VCCAFDI_VRM
AF11
AC16
+1.05V_VCCIO1
AC17
AD17
1.01A (60mils)
+1.05V_VCCEPW
T21
V21
T19
P32
+3V
C896
C896
0.1U/10V_4
0.1U/10V_4
+V1.05S_SATA3
10mA (10mils)
+V3.3A_1.5A_HDA_IO
C498
C498
0.1U/10V_4
0.1U/10V_4
R380 0_8 R380 0_8
C465
C465
1U/6.3V_4
1U/6.3V_4
R372 0_6 R372 0_6
C463
C463
0.1U/10V_4
0.1U/10V_4
R371 0_6 R371 0_6
C464
C464
0.1U/10V_4
0.1U/10V_4
R384 0_6 R384 0_6
C460 *1U/6.3V_4 C460 *1U/6.3V_4
R365 0_6 R365 0_6
C454
C454
1U/6.3V_4
1U/6.3V_4
R282 0_6 R282 0_6
C432
C432
0.1U/10V_4
0.1U/10V_4
C474
C474
0.1U/10V_4
0.1U/10V_4
R333 0_8 R333 0_8
C446
C446
1U/6.3V_4
1U/6.3V_4
L57
L57
*10uH/100mA_8
*10uH/100mA_8
C885
C885
*10U/6.3V_6
*10U/6.3V_6
R312 0_6 R312 0_6
C452
C452
1U/6.3V_4
1U/6.3V_4
R420 *0_4 R420 *0_4
R419 0_4 R419 0_4
C497
C497
*1U/6.3V_4
*1U/6.3V_4
7/29 SI Modify for CRT noise
1mA (10mils)
+VCCA_DAC_1_2
U48
U47
1mA (10mils)
+VCCALVDS +3V
AK36
AK37
60mA (10mils)
AM37
AM38
AP36
AP37
SG & UMA : Ra
DIS : Rb
V33
V34
+VCCAFDI_VRM
AT16
AT20
+1.1V_VCC_DMI_CCI
AB36
C968
C968
1U/6.3V_4
1U/6.3V_4
190 mA (15mils)
AG16
AG17
AJ16
AJ17
20mA (10mils)
V1
VCCSPI
+5V_PCH_VCC5REF
V5REF= 1mA
+5V_PCH_VCC5REFSUS
VCC5REFSUS=1mA
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5/RD2
NB5/RD2
NB5/RD2
Date: Sheet
Date: Sheet
Date: Sheet of
L65
L65
10uH/100mA_8
10uH/100mA_8
C967 10U/6.3VS_6 C967 10U/6.3VS_6
C961 0.1U/10V_4 C961 0.1U/10V_4
C964 0.01U/25V_4 C964 0.01U/25V_4
R770 *0_6 R770 *0_6
Ra
R731 0_4 R731 0_4
Rb
R729 *0_4 R729 *0_4
Ra
L64
L64
0.1uH/250mA_8
0.1uH/250mA_8
Rb
R742 *0_4 R742 *0_4
C963 22U/6.3VS_8 C963 22U/6.3VS_8
C955 0.01U/25V_4 C955 0.01U/25V_4
C947 0.01U/25V_4 C947 0.01U/25V_4
R401 0_6 R401 0_6
C483
C483
0.1U/10V_4
0.1U/10V_4
42mA (10mils)
C971
C971
*10U/6.3V_6
*10U/6.3V_6
+1.8V +VCCP_NAND
R328 0_8 R328 0_8
C453
C453
0.1U/10V_4
0.1U/10V_4
R665 0_6 R665 0_6
C893
C893
1U/6.3V_4
1U/6.3V_4
R388 10_4 R388 10_4
D8 RB500V-40 D8 RB500V-40
C473
C473
1U/6.3V_4
1U/6.3V_4
R360 10_4 R360 10_4
D6 RB500V-40 D6 RB500V-40
C455
C455
0.1U/10V_4
0.1U/10V_4
PCH 5/6 (POWER)
PCH 5/6 (POWER)
PCH 5/6 (POWER)
1
+3V +3V_VCC_GIO
R370 0_4 R370 0_4
C456
C456
1U/6.3V_4
1U/6.3V_4
+3V +3V_VCCME_SPI
10
+3V
+1.8V +VCC_TX_LVDS
+1.05V_VTT +1.1V_VCC_DMI
+5V
+3V
+5VS5
+3VS5
10 49 Tuesday, August 10, 2010
10 49 Tuesday, August 10, 2010
10 49 Tuesday, August 10, 2010
of
of
1A
1A
1A
5
4
3
2
1
IBEX PEAK-M (GND)
U56I
U56I
AY4
VSS[159]
AY42
VSS[160]
AY46
VSS[161]
AY8
VSS[162]
B11
VSS[163]
B15
D D
C C
B B
A A
5
VSS[164]
B19
VSS[165]
B23
VSS[166]
B27
VSS[167]
B31
VSS[168]
B35
VSS[169]
B39
VSS[170]
B7
VSS[171]
F45
VSS[172]
BB12
VSS[173]
BB16
VSS[174]
BB20
VSS[175]
BB22
VSS[176]
BB24
VSS[177]
BB28
VSS[178]
BB30
VSS[179]
BB38
VSS[180]
BB4
VSS[181]
BB46
VSS[182]
BC14
VSS[183]
BC18
VSS[184]
BC2
VSS[185]
BC22
VSS[186]
BC26
VSS[187]
BC32
VSS[188]
BC34
VSS[189]
BC36
VSS[190]
BC40
VSS[191]
BC42
VSS[192]
BC48
VSS[193]
BD46
VSS[194]
BD5
VSS[195]
BE22
VSS[196]
BE26
VSS[197]
BE40
VSS[198]
BF10
VSS[199]
BF12
VSS[200]
BF16
VSS[201]
BF20
VSS[202]
BF22
VSS[203]
BF24
VSS[204]
BF26
VSS[205]
BF28
VSS[206]
BD3
VSS[207]
BF30
VSS[208]
BF38
VSS[209]
BF40
VSS[210]
BF8
VSS[211]
BG17
VSS[212]
BG21
VSS[213]
BG33
VSS[214]
BG44
VSS[215]
BG8
VSS[216]
BH11
VSS[217]
BH15
VSS[218]
BH17
VSS[219]
BH19
VSS[220]
H10
VSS[221]
BH27
VSS[222]
BH31
VSS[223]
BH33
VSS[224]
BH35
VSS[225]
BH39
VSS[226]
BH43
VSS[227]
BH7
VSS[228]
D3
VSS[229]
D12
VSS[230]
D16
VSS[231]
D18
VSS[232]
D22
VSS[233]
D24
VSS[234]
D26
VSS[235]
D30
VSS[236]
D32
VSS[237]
D34
VSS[238]
D38
VSS[239]
D42
VSS[240]
D8
VSS[241]
E18
VSS[242]
E26
VSS[243]
G18
VSS[244]
G20
VSS[245]
G26
VSS[246]
G28
VSS[247]
G36
VSS[248]
G48
VSS[249]
H12
VSS[250]
H18
VSS[251]
H22
VSS[252]
H24
VSS[253]
H26
VSS[254]
H30
VSS[255]
H32
VSS[256]
H34
VSS[257]
F3
VSS[258]
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
4
H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28
3
IBEX PEAK-M (GND)
U56H
U56H
H5
VSS[0]
AA17
VSS[1]
AA2
VSS[2]
AA3
VSS[3]
AA33
VSS[4]
AA34
VSS[5]
AB11
VSS[6]
AB14
VSS[7]
AB39
VSS[8]
AB4
VSS[9]
AB43
VSS[10]
AB5
VSS[11]
AB7
VSS[12]
AC19
VSS[13]
AC2
VSS[14]
AC21
VSS[15]
AC24
VSS[16]
AC33
VSS[17]
AC34
VSS[18]
AC48
VSS[19]
AD10
VSS[20]
AD11
VSS[21]
AD12
VSS[22]
AD13
VSS[23]
AD19
VSS[24]
AD24
VSS[25]
AD26
VSS[26]
AD27
VSS[27]
AD33
VSS[28]
AD34
VSS[29]
AD36
VSS[30]
AD37
VSS[31]
AD38
VSS[32]
AD39
VSS[33]
AD4
VSS[34]
AD40
VSS[35]
AD42
VSS[36]
AD43
VSS[37]
AD45
VSS[38]
AD46
VSS[39]
AD8
VSS[40]
AE2
VSS[41]
AE3
VSS[42]
AF10
VSS[43]
AF12
VSS[44]
AD14
VSS[45]
AD16
VSS[46]
AF16
VSS[47]
AF19
VSS[48]
AF24
VSS[49]
AF26
VSS[50]
AF27
VSS[51]
AF29
VSS[52]
AF31
VSS[53]
AF38
VSS[54]
AF4
VSS[55]
AF42
VSS[56]
AF46
VSS[57]
AF5
VSS[58]
AF7
VSS[59]
AF8
VSS[60]
AG19
VSS[61]
AG2
VSS[62]
AG31
VSS[63]
AG48
VSS[64]
AH11
VSS[65]
AH3
VSS[66]
AH36
VSS[67]
AH39
VSS[68]
AH40
VSS[69]
AH42
VSS[70]
AH46
VSS[71]
AH7
VSS[72]
AJ19
VSS[73]
AJ21
VSS[74]
AJ24
VSS[75]
AJ33
VSS[76]
AJ34
VSS[77]
AK12
VSS[78]
AK3
VSS[79]
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28
12
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5/RD2
NB5/RD2
NB5/RD2
Date: Sheet
Date: Sheet
2
Date: Sheet of
PCH 6/6 (GND)
PCH 6/6 (GND)
PCH 6/6 (GND)
1
11 49 Tuesday, August 10, 2010
11 49 Tuesday, August 10, 2010
11 49 Tuesday, August 10, 2010
1A
1A
1A
of
of
5
4
3
2
1
JDIM1A
M_A_A[15:0] [3]
D D
M_A_BS#0 [3]
M_A_BS#1 [3]
M_A_BS#2 [3]
M_A_CS#0 [3]
M_A_CS#1 [3]
M_A_CLKP0 [3]
M_A_CLKN0 [3]
M_A_CLKP1 [3]
M_A_CLKN1 [3]
M_A_CKE0 [3]
M_A_CKE1 [3]
M_A_CAS# [3]
M_A_RAS# [3]
R209 10K_4 R209 10K_4
R208 10K_4 R208 10K_4
C C
B B
M_A_WE# [3]
SMB_RUN_CLK [8,13]
SMB_RUN_DAT [8,13]
M_A_ODT0 [3]
M_A_ODT1 [3]
M_A_DQSP[7:0] [3]
M_A_DQSN[7:0] [3]
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
DIMM0_SA0
DIMM0_SA1
SMB_RUN_CLK
SMB_RUN_DAT
M_A_DM1
M_A_DM2
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
JDIM1A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDR3-DIMM0_H=5.2_RVS
DDR3-DIMM0_H=5.2_RVS
DDR-78279-001-RVS-204P
DDR-78279-001-RVS-204P
DGMK4000125
DGMK4000125
IC SOCKET DDRIII SO-DIMM(204P,H5.2,RVS)
IC SOCKET DDRIII SO-DIMM(204P,H5.2,RVS)
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
(204P)
(204P)
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
M_A_DQ4
5
M_A_DQ5
7
M_A_DQ7
15
M_A_DQ6
17
M_A_DQ1
4
M_A_DQ0
6
M_A_DQ3
16
M_A_DQ2
18
M_A_DQ9
21
M_A_DQ8
23
M_A_DQ15
33
M_A_DQ10
35
M_A_DQ12
22
M_A_DQ13
24
M_A_DQ14
34
M_A_DQ11
36
M_A_DQ21
39
M_A_DQ16
41
M_A_DQ19
51
M_A_DQ18
53
M_A_DQ20
40
M_A_DQ17
42
M_A_DQ23
50
M_A_DQ22
52
M_A_DQ25
57
M_A_DQ24
59
M_A_DQ30
67
M_A_DQ26
69
M_A_DQ28
56
M_A_DQ29
58
M_A_DQ31
68
M_A_DQ27
70
M_A_DQ36
129
M_A_DQ37
131
M_A_DQ34
141
M_A_DQ38
143
M_A_DQ32
130
M_A_DQ33
132
M_A_DQ35
140
M_A_DQ39
142
M_A_DQ41
147
M_A_DQ45
149
M_A_DQ47
157
M_A_DQ46
159
M_A_DQ40
146
M_A_DQ44
148
M_A_DQ42
158
M_A_DQ43
160
M_A_DQ49
163
M_A_DQ48
165
M_A_DQ54
175
M_A_DQ55
177
M_A_DQ53
164
M_A_DQ52
166
M_A_DQ50
174
M_A_DQ51
176
M_A_DQ61
181
M_A_DQ60
183
M_A_DQ62
191
M_A_DQ63
193
M_A_DQ56
180
M_A_DQ57
182
M_A_DQ59
192
M_A_DQ58
194
M_A_DQ[63:0] [3]
+3V
PM_EXTTS#0 [13]
DDR3_DRAMRST# [2,13]
SMDDR_VREF_DQ0_M3 [5]
SMDDR_VREF_DQ0_M3
R26 0_6 R26 0_6
R17 *0_6 R17 *0_6
2.48A
+3V
R574 10K_4 R574 10K_4
PM_EXTTS#0
+SMDDR_VREF_DQ0 SMDDR_VREF_DQ0_M1
+SMDDR_VREF_DIMM
+1.5VSUS
+0.75V_DDR_VTT [13,44,45]
+1.5VSUS [2,4,10,13,40,44]
+3VPCU [6,7,25,34,35,36,37,39,42,43,45,46]
+3V [2,6,7,8,9,10,13,14,17,24,25,26,27,28,29,30,32,33,34,35,36,37,40,41,43,45,47]
+5VPCU [33,34,36,37,38,39,40,41,42,43,44,45,46,47,48]
JDIM1B
JDIM1B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3-DIMM0_H=5.2_RVS
DDR3-DIMM0_H=5.2_RVS
DDR-78279-001-RVS-204P
DDR-78279-001-RVS-204P
DGMK4000125
DGMK4000125
IC SOCKET DDRIII SO-DIMM(204P,H5.2,RVS)
IC SOCKET DDRIII SO-DIMM(204P,H5.2,RVS)
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
(204P)
(204P)
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
VTT1
VTT2
GND
GND
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
205
206
+0.75V_DDR_VTT
12
VREF DQ0 M2 Solution VREF DQ0 M1 Solution Place these Caps near So-Dimm0.
R131 *0_6 R131 *0_6
+1.5VSUS
R28
R28
1K/F_4
1K/F_4
R128
R128
1K/F_4
1K/F_4
+1.5VSUS
R142 *0_6 R142 *0_6
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet of
DDR3 DIMM0-RVS (5.2H)
DDR3 DIMM0-RVS (5.2H)
DDR3 DIMM0-RVS (5.2H)
1
NB5/RD2
NB5/RD2
NB5/RD2
DDR_VTTREF [4,13,44]
R119
R119
10K_4
10K_4
+SMDDR_VREF_DIMM
R115
R115
C181
C181
10K_4
10K_4
470P/50V_4
470P/50V_4
12 49 Tuesday, August 10, 2010
12 49 Tuesday, August 10, 2010
12 49 Tuesday, August 10, 2010
1A
1A
1A
of
of
+1.5VSUS +0.75V_DDR_VTT
C98 1U/6.3V_4 C98 1U/6.3V_4
C108 1U/6.3V_4 C108 1U/6.3V_4
C73 1U/6.3V_4 C73 1U/6.3V_4
C55 1U/6.3V_4 C55 1U/6.3V_4
C120 10U/6.3VS_6 C120 10U/6.3VS_6
C59 10U/6.3VS_6 C59 10U/6.3VS_6
7/18 : Del M2 solution
A A
5
4
C48 10U/6.3VS_6 C48 10U/6.3VS_6
C51 10U/6.3VS_6 C51 10U/6.3VS_6
C86 10U/6.3VS_6 C86 10U/6.3VS_6
C66 10U/6.3VS_6 C66 10U/6.3VS_6
C49 *10U/6.3V_6 C49 *10U/6.3V_6
C47 10U/6.3V_8 C47 10U/6.3V_8
C45 10U/6.3V_8 C45 10U/6.3V_8
+
+
C75 330U/2V_7343
C75 330U/2V_7343
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
3
C785 1U/6.3V_4 C785 1U/6.3V_4
C788 1U/6.3V_4 C788 1U/6.3V_4
C787 1U/6.3V_4 C787 1U/6.3V_4
C786 1U/6.3V_4 C786 1U/6.3V_4
C789 10U/6.3V_6 C789 10U/6.3V_6
C790 *10U/6.3V_6 C790 *10U/6.3V_6
C190 0.1U/10V_4 C190 0.1U/10V_4
C162 2.2U/6.3V_6 C162 2.2U/6.3V_6
C19 0.1U/10V_4 C19 0.1U/10V_4
C25 2.2U/6.3V_6 C25 2.2U/6.3V_6
+3V
C215 0.1U/10V_4 C215 0.1U/10V_4
C230 2.2U/6.3V_6 C230 2.2U/6.3V_6
DDR_VTTREF SMDDR_VREF_DQ0_M1
2
5
4
3
2
1
2.48A
+3V
R579 10K_4 R579 10K_4
PM_EXTTS#0
+SMDDR_VREF_DQ1
MBCLK2
MBDATA2
PM_EXTTS#0
PM_EXTTS#0_EC
R149 10K_4 R149 10K_4
+1.5VSUS
JDIM2B
JDIM2B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3-DIMM1_H=9.2_RVS
DDR3-DIMM1_H=9.2_RVS
DDR-AS0A626-UARN-7F-204P
DDR-AS0A626-UARN-7F-204P
DGMK4000126
DGMK4000126
IC SOCKET DDRIII SO-DIMM(204P,H9.2,RVS)
IC SOCKET DDRIII SO-DIMM(204P,H9.2,RVS)
DDR3 Thermal Sensor
U14
U14
8
SCLK
7
SDA
6
ALERT#
4
OVERT#
G780P81U
G780P81U
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
VCC
DXP
DXN
GND
(204P)
(204P)
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VTT1
VTT2
GND
GND
1
2
3
5
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
205
206
C244 0.01U/25V_4 C244 0.01U/25V_4
DDR_THERMDA
C224
C224
2200P/50V_4
2200P/50V_4
DDR_THERMDC
+0.75V_DDR_VTT
+3V
2
13
Q6
Q6
MMBT3904-7-F
MMBT3904-7-F
1 3
JDIM2A
M_B_A[15:0] [3]
D D
M_B_BS#0 [3]
M_B_BS#1 [3]
M_B_BS#2 [3]
M_B_CS#0 [3]
M_B_CS#1 [3]
M_B_CLKP0 [3]
M_B_CLKN0 [3]
M_B_CLKP1 [3]
M_B_CLKN1 [3]
M_B_CKE0 [3]
M_B_CKE1 [3]
M_B_CAS# [3]
M_B_RAS# [3]
R182 10K_4 R182 10K_4
R577 10K_4 R577 10K_4
+3V
C C
B B
+0.75V_DDR_VTT [12,44,45]
+1.5VSUS [2,4,10,12,40,44]
+3VPCU [6,7,25,34,35,36,37,39,42,43,45,46]
+3V [2,6,7,8,9,10,12,14,17,24,25,26,27,28,29,30,32,33,34,35,36,37,40,41,43,45,47]
+5VPCU [33,34,36,37,38,39,40,41,42,43,44,45,46,47,48]
M_B_WE# [3]
SMB_RUN_CLK [8,12]
SMB_RUN_DAT [8,12]
M_B_ODT0 [3]
M_B_ODT1 [3]
M_B_DQSP[7:0] [3]
M_B_DQSN[7:0] [3]
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
DIMM1_SA0
DIMM1_SA1
M_B_DM1
M_B_DM2
M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7
JDIM2A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDR3-DIMM1_H=9.2_RVS
DDR3-DIMM1_H=9.2_RVS
DDR-AS0A626-UARN-7F-204P
DDR-AS0A626-UARN-7F-204P
DGMK4000126
DGMK4000126
IC SOCKET DDRIII SO-DIMM(204P,H9.2,RVS)
IC SOCKET DDRIII SO-DIMM(204P,H9.2,RVS)
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
(204P)
(204P)
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
M_B_DQ5
5
M_B_DQ4
7
M_B_DQ3
15
M_B_DQ2
17
M_B_DQ0
4
M_B_DQ1
6
M_B_DQ6
16
M_B_DQ7
18
M_B_DQ12
21
M_B_DQ13
23
M_B_DQ14
33
M_B_DQ10
35
M_B_DQ8
22
M_B_DQ9
24
M_B_DQ11
34
M_B_DQ15
36
M_B_DQ20
39
M_B_DQ21
41
M_B_DQ18
51
M_B_DQ22
53
M_B_DQ17
40
M_B_DQ16
42
M_B_DQ19
50
M_B_DQ23
52
M_B_DQ25
57
M_B_DQ29
59
M_B_DQ27
67
M_B_DQ26
69
M_B_DQ28
56
M_B_DQ24
58
M_B_DQ31
68
M_B_DQ30
70
M_B_DQ36
129
M_B_DQ37
131
M_B_DQ35
141
M_B_DQ34
143
M_B_DQ33
130
M_B_DQ32
132
M_B_DQ39
140
M_B_DQ38
142
M_B_DQ44
147
M_B_DQ40
149
M_B_DQ42
157
M_B_DQ43
159
M_B_DQ45
146
M_B_DQ41
148
M_B_DQ46
158
M_B_DQ47
160
M_B_DQ49
163
M_B_DQ48
165
M_B_DQ54
175
M_B_DQ55
177
M_B_DQ52
164
M_B_DQ53
166
M_B_DQ50
174
M_B_DQ51
176
M_B_DQ61
181
M_B_DQ56
183
M_B_DQ62
191
M_B_DQ63
193
M_B_DQ57
180
M_B_DQ60
182
M_B_DQ59
192
M_B_DQ58
194
M_B_DQ[63:0] [3]
SMDDR_VREF_DQ1_M3 [5]
SMDDR_VREF_DQ1_M1
SMDDR_VREF_DQ1_M3
DDR3_DRAMRST# [2,12]
R522 0_6 R522 0_6
R86 *0_6 R86 *0_6
+3V
+SMDDR_VREF_DIMM
MBCLK2 [8,26,30,36]
MBDATA2 [8,26,30,36]
PM_EXTTS#0 [12]
+3V
VREF DQ1 M2 Solution
+1.5VSUS
C92 1U/6.3V_4 C92 1U/6.3V_4
C46 1U/6.3V_4 C46 1U/6.3V_4
C67 1U/6.3V_4 C67 1U/6.3V_4
C65 1U/6.3V_4 C65 1U/6.3V_4
C56 10U/6.3VS_6 C56 10U/6.3VS_6
7/18 : Del M2 solution
A A
5
4
C143 10U/6.3VS_6 C143 10U/6.3VS_6
C132 10U/6.3VS_6 C132 10U/6.3VS_6
C53 10U/6.3VS_6 C53 10U/6.3VS_6
C103 10U/6.3VS_6 C103 10U/6.3VS_6
C115 10U/6.3VS_6 C115 10U/6.3VS_6
C80 *10U/6.3V_6 C80 *10U/6.3V_6
C154 10U/6.3V_8 C154 10U/6.3V_8
C129 10U/6.3V_8 C129 10U/6.3V_8
Place these Caps near So-Dimm1.
+0.75V_DDR_VTT
C792 1U/6.3V_4 C792 1U/6.3V_4
C793 1U/6.3V_4 C793 1U/6.3V_4
C794 1U/6.3V_4 C794 1U/6.3V_4
C795 1U/6.3V_4 C795 1U/6.3V_4
C797 10U/6.3V_6 C797 10U/6.3V_6
C798 *10U/6.3V_6 C798 *10U/6.3V_6
+3V
C737 0.1U/10V_4 C737 0.1U/10V_4
C738 2.2U/6.3V_6 C738 2.2U/6.3V_6
3
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ1
C205 0.1U/10V_4 C205 0.1U/10V_4
C180 2.2U/6.3V_6 C180 2.2U/6.3V_6
C600 0.1U/10V_4 C600 0.1U/10V_4
C601 2.2U/6.3V_6 C601 2.2U/6.3V_6
2
VREF DQ1 M1 Solution
DDR_VTTREF [4,12,44]
NB5/RD2
NB5/RD2
NB5/RD2
R112 *0_6 R112 *0_6
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet of
+1.5VSUS
R106
R106
1K/F_4
1K/F_4
SMDDR_VREF_DQ1_M1
R105
R105
1K/F_4
1K/F_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
DDR3 DIMM1-RVS (9.2H)
DDR3 DIMM1-RVS (9.2H)
DDR3 DIMM1-RVS (9.2H)
1
13 49 Tuesday, August 10, 2010
13 49 Tuesday, August 10, 2010
13 49 Tuesday, August 10, 2010
of
of
1A
1A
1A
5
U41A
U41A
PEG_TX15
PEG_TX15 [2]
PEG_TX#15 [2]
D D
C C
B B
A A
For future ASIC, if PWRGOOD_BUF is not requred it
should be pulled to ground.
PEG_TX14 [2]
PEG_TX#14 [2]
PEG_TX13 [2]
PEG_TX#13 [2]
PEG_TX12 [2]
PEG_TX#12 [2]
PEG_TX11 [2]
PEG_TX#11 [2]
PEG_TX10 [2]
PEG_TX#10 [2]
PEG_TX9 [2]
PEG_TX#9 [2]
PEG_TX8 [2]
PEG_TX#8 [2]
PEG_TX7 [2]
PEG_TX#7 [2]
PEG_TX6 [2]
PEG_TX#6 [2]
PEG_TX5 [2]
PEG_TX#5 [2]
PEG_TX4 [2]
PEG_TX#4 [2]
PEG_TX3 [2]
PEG_TX#3 [2]
PEG_TX2 [2]
PEG_TX#2 [2]
PEG_TX1 [2]
PEG_TX#1 [2]
PEG_TX0 [2]
PEG_TX#0 [2]
CLK_PCIE_VGA [8]
CLK_PCIE_VGA# [8]
PEGX_RST# [35]
HWPG [36,39,40,41,44,49]
5
CLK_PCIE_VGA
CLK_PCIE_VGA#
PWRGOOD_BUF
+3V
2
1
3 5
AA38
PEG_TX#15
Y37
PEG_TX14
Y35
PEG_TX#14
W36
PEG_TX13
W38
PEG_TX#13
V37
PEG_TX12
V35
PEG_TX#12
U36
PEG_TX11
U38
PEG_TX#11
T37
PEG_TX10
T35
PEG_TX#10
R36
PEG_TX9
R38
PEG_TX#9
P37
PEG_TX8
P35
PEG_TX#8
N36
PEG_TX7
N38
PEG_TX#7
M37
PEG_TX6
M35
PEG_TX#6
L36
PEG_TX5
L38
PEG_TX#5
K37
PEG_TX4
K35
PEG_TX#4
J36
PEG_TX3
J38
PEG_TX#3
H37
PEG_TX2
H35
PEG_TX#2
G36
PEG_TX1
G38
PEG_TX#1
F37
PEG_TX0
F35
PEG_TX#0
E37
AB35
AA36
AJ21
AK21
AH16
AA30
R52 *10K_4 R52 *10K_4
4
U4
U4
*MC74VHC1G08DFT2G
*MC74VHC1G08DFT2G
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_RX8P
PCIE_RX8N
PCIE_RX9P
PCIE_RX9N
PCIE_RX10P
PCIE_RX10N
PCIE_RX11P
PCIE_RX11N
PCIE_RX12P
PCIE_RX12N
PCIE_RX13P
PCIE_RX13N
PCIE_RX14P
PCIE_RX14N
PCIE_RX15P
PCIE_RX15N
CLOCK
CLOCK
PCIE_REFCLKP
PCIE_REFCLKN
NC#1
NC#2
PWRGOOD
PERSTB
Broadway
Broadway
PWRGOOD_BUF
R53
R53
10K_4
10K_4
4
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCI EXPRESS INTERFACE
PCI EXPRESS INTERFACE
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
CALIBRATION
CALIBRATION
PCIE_CALRP
PCIE_CALRN
4
C_PEG_RXP15
Y33
C_PEG_RXN15
Y32
C_PEG_RXP14
W33
C_PEG_RXN14
W32
C_PEG_RXP13
U33
C_PEG_RXN13
U32
C_PEG_RXP12
U30
C_PEG_RXN12
U29
C_PEG_RXP11
T33
C_PEG_RXN11
T32
C_PEG_RXP10
T30
C_PEG_RXN10
T29
C_PEG_RXP9
P33
C_PEG_RXN9
P32
C_PEG_RXP8
P30
C_PEG_RXN8
P29
C_PEG_RXP7
N33
C_PEG_RXN7
N32
C_PEG_RXP6
N30
C_PEG_RXN6
N29
C_PEG_RXP5
L33
C_PEG_RXN5
L32
C_PEG_RXP4
L30
C_PEG_RXN4
L29
C_PEG_RXP3
K33
C_PEG_RXN3
K32
C_PEG_RXP2
J33
C_PEG_RXN2
J32
C_PEG_RXP1
K30
C_PEG_RXN1
K29
C_PEG_RXP0
H33
C_PEG_RXN0
H32
PCIE_CALRP
Y30
PCIE_CALRN
Y29
+1.0V_DPE_VDD10
+1.0V_DPC_VDD10
C239 .1U/10V_4 C239 .1U/10V_4
C228 .1U/10V_4 C228 .1U/10V_4
C254 .1U/10V_4 C254 .1U/10V_4
C257 .1U/10V_4 C257 .1U/10V_4
C259 .1U/10V_4 C259 .1U/10V_4
C265 .1U/10V_4 C265 .1U/10V_4
C253 .1U/10V_4 C253 .1U/10V_4
C245 .1U/10V_4 C245 .1U/10V_4
C271 .1U/10V_4 C271 .1U/10V_4
C281 .1U/10V_4 C281 .1U/10V_4
C266 .1U/10V_4 C266 .1U/10V_4
C270 .1U/10V_4 C270 .1U/10V_4
C285 .1U/10V_4 C285 .1U/10V_4
C289 .1U/10V_4 C289 .1U/10V_4
C286 .1U/10V_4 C286 .1U/10V_4
C298 .1U/10V_4 C298 .1U/10V_4
C308 0.1U/10V_4 C308 0.1U/10V_4
C307 0.1U/10V_4 C307 0.1U/10V_4
C306 0.1U/10V_4 C306 0.1U/10V_4
C309 0.1U/10V_4 C309 0.1U/10V_4
C314 0.1U/10V_4 C314 0.1U/10V_4
C312 0.1U/10V_4 C312 0.1U/10V_4
C315 0.1U/10V_4 C315 0.1U/10V_4
C320 0.1U/10V_4 C320 0.1U/10V_4
C321 0.1U/10V_4 C321 0.1U/10V_4
C322 0.1U/10V_4 C322 0.1U/10V_4
C323 0.1U/10V_4 C323 0.1U/10V_4
C325 0.1U/10V_4 C325 0.1U/10V_4
C324 0.1U/10V_4 C324 0.1U/10V_4
C318 0.1U/10V_4 C318 0.1U/10V_4
C319 0.1U/10V_4 C319 0.1U/10V_4
R173 1.27K/F_4 R173 1.27K/F_4
R172 2K/F_4 R172 2K/F_4
+1.0V_VGA
PEG_RX15 [2]
PEG_RX#15 [2]
PEG_RX14 [2]
PEG_RX#14 [2]
PEG_RX13 [2]
PEG_RX#13 [2]
PEG_RX12 [2]
PEG_RX#12 [2]
PEG_RX11 [2]
PEG_RX#11 [2]
PEG_RX10 [2]
PEG_RX#10 [2]
PEG_RX9 [2]
PEG_RX#9 [2]
PEG_RX8 [2]
PEG_RX#8 [2]
PEG_RX7 [2]
PEG_RX#7 [2]
PEG_RX6 [2]
PEG_RX#6 [2]
PEG_RX5 [2]
PEG_RX#5 [2]
PEG_RX4 [2]
PEG_RX#4 [2]
PEG_RX3 [2]
PEG_RX#3 [2]
PEG_RX2 [2]
PEG_RX#2 [2]
PEG_RX1 [2]
PEG_RX#1 [2]
PEG_RX0 [2]
PEG_RX#0 [2]
for AMD comment add for SI
(DPE/F_VDD10 : 1.0V@115mA+115mA)
C127
C126
C126
1U/6.3V_4
1U/6.3V_4
C661
C661
1U/6.3V_4
1U/6.3V_4
C127
.1U/10V_4
.1U/10V_4
C656
C656
.1U/10V_4
.1U/10V_4
C123
C123
10U/6.3V_8
10U/6.3V_8
(DPC/D_VDD10 : 1.0V@115mA+115mA)
C107
C107
10U/6.3V_8
10U/6.3V_8
3
+1.8V_DPC_VDD18 +1.8V_DPA_VDD18
+1.0V_DPC_VDD10
for DB2
+1.8V_DPC_VDD18
+1.0V_DPC_VDD10
R45 150/F_4 R45 150/F_4 C300 0.1U/10V_4 C300 0.1U/10V_4
+1.8V_DPE_VDD18
+1.0V_DPE_VDD10
+1.8V_DPE_VDD18
+1.0V_DPE_VDD10
R545 150/F_4 R545 150/F_4
(DPE/F_VDD18 : 1.8V@200mA+200mA)
+1.8V_DPE_VDD18
+1.0V_VGA
L12 HCB1608KF-181T15_6 L12 HCB1608KF-181T15_6
(DPA/B_VDD18 : 1.8V@300mA+220mA)
+1.8V_DPA_VDD18
+1.0V_VGA
L9 HCB1608KF-181T15_6 L9 HCB1608KF-181T15_6
( DPC/D_VDD18 : 1.8V@300mA+220mA)
+1.8V_DPC_VDD18
3
DPCD_CALR
DPEF_CALR
C165
C165
10U/6.3V_8
10U/6.3V_8
C636
C636
10U/6.3V_8
10U/6.3V_8
C643
C643
10U/6.3V_8
10U/6.3V_8
AP20
AP21
AP13
AT13
AN17
AP16
AP17
AW14
AW16
AP22
AP23
AP14
AP15
AN19
AP18
AP19
AW20
AW22
AW18
AH34
AJ34
AL33
AM33
AN34
AP39
AR39
AU37
AF34
AG34
AK33
AK34
AF39
AH39
AK39
AL34
AM34
AM39
C166
C166
1U/6.3V_4
1U/6.3V_4
C644
C644
1U/6.3V_4
1U/6.3V_4
C635
C635
1U/6.3V_4
1U/6.3V_4
U41H
U41H
DPC_VDD18#1
DPC_VDD18#2
DPC_VDD10#1
DPC_VDD10#2
DPC_VSSR#1
DPC_VSSR#2
DPC_VSSR#3
DPC_VSSR#4
DPC_VSSR#5
DPD_VDD18#1
DPD_VDD18#2
DPD_VDD10#1
DPD_VDD10#2
DPD_VSSR#1
DPD_VSSR#2
DPD_VSSR#3
DPD_VSSR#4
DPD_VSSR#5
DPCD_CALR
DP E/F POWER
DP E/F POWER
DPE_VDD18#1
DPE_VDD18#2
DPE_VDD10#1
DPE_VDD10#2
DPE_VSSR#1
DPE_VSSR#2
DPE_VSSR#3
DPE_VSSR#4
DPF_VDD18#1
DPF_VDD18#2
DPF_VDD10#1
DPF_VDD10#2
DPF_VSSR#1
DPF_VSSR#2
DPF_VSSR#3
DPF_VSSR#4
DPF_VSSR#5
DPEF_CALR
Broadway
Broadway
C167
C167
.1U/10V_4
.1U/10V_4
C647
C647
.1U/10V_4
.1U/10V_4
C634
C634
.1U/10V_4
.1U/10V_4
2
DP A/B POWER DP C/D POWER
DP A/B POWER DP C/D POWER
DPA_VDD18#1
DPA_VDD18#2
DPA_VDD10#1
DPA_VDD10#2
DPA_VSSR#1
DPA_VSSR#2
DPA_VSSR#3
DPA_VSSR#4
DPA_VSSR#5
DPB_VDD18#1
DPB_VDD18#2
DPB_VDD10#1
DPB_VDD10#2
DPB_VSSR#1
DPB_VSSR#2
DPB_VSSR#3
DPB_VSSR#4
DPB_VSSR#5
DPAB_CALR
DP PLL POWER
DP PLL POWER
+1.8V_VGA
L17 HCB1608KF-181T15_6 L17 HCB1608KF-181T15_6
+1.8V_VGA
L46 HCB1608KF-181T15_6 L46 HCB1608KF-181T15_6
+1.8V_VGA
L11 HCB1608KF-181T15_6 L11 HCB1608KF-181T15_6
2
DPA_PVDD
DPA_PVSS
DPB_PVDD
DPB_PVSS
DPC_PVDD
DPC_PVSS
DPD_PVDD
DPD_PVSS
DPE_PVDD
DPE_PVSS
DPF_PVDD
DPF_PVSS
AN24
AP24
AP31
AP32
AN27
AP27
AP28
AW24
AW26
AP25
AP26
AN33
AP33
AN29
AP29
AP30
AW30
AW32
AW28
AU28
AV27
AV29
AR28
AU18
AV17
AV19
AR18
AM37
AN38
AL38
AM35
DPAB_CALR
+1.0V_DPA_VDD10
+1.8V_DPA_VDD18
R539 150/F_4 R539 150/F_4
+1.8V_VGA
NB5/RD2
NB5/RD2
NB5/RD2
1
+1.0V_VGA [16,18,44]
+1.8V [4,7,10,41,42]
+3V [2,6,7,8,9,10,12,13,17,24,25,26,27,28,29,30,32,33,34,35,36,37,40,41,43,45,47]
( DPA/B_VDD10 : 1.0V@115mA+115mA)
C135
C135
C119
C119
1U/6.3V_4
1U/6.3V_4
10U/6.3V_8
10U/6.3V_8
C136
C136
.1U/10V_4
.1U/10V_4
14
+1.0V_VGA
L13 HCB1608KF-181T15_6 L13 HCB1608KF-181T15_6
AMD
0821
(DPB_PVDD : 1.8V@20mA)
+1.8V_DPB_PVDD
C653
C653
C658
C658
C659
1U/6.3V_4
1U/6.3V_4
C659
.1U/10V_4
.1U/10V_4
10U/6.3V_8
10U/6.3V_8
(DPC_PVDD:1.8V@20mA)
+1.8V_DPC_PVDD
C625
C625
10U/6.3V_8
10U/6.3V_8
C637
C637
.1U/10V_4
.1U/10V_4
C632
C632
1U/6.3V_4
1U/6.3V_4
(DPD_PVDD:1.8V@20mA)
+1.8V_DPD_PVDD
C648
C648
10U/6.3V_8
10U/6.3V_8
C660
C660
.1U/10V_4
.1U/10V_4
C655
C655
1U/6.3V_4
1U/6.3V_4
(DPE/F_PVDD1.8V@20mA+20mA)
+1.8V_DPE_PVDD
C670
C670
10U/6.3V_8
10U/6.3V_8
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet of
ATI M97-M2 (PCIE I/F) 1/5
ATI M97-M2 (PCIE I/F) 1/5
ATI M97-M2 (PCIE I/F) 1/5
C671
C671
.1U/10V_4
.1U/10V_4
1
C672
C672
.1U/10V_4
.1U/10V_4
+1.8V_VGA
L50 HCB1608KF-181T15_6 L50 HCB1608KF-181T15_6
+1.8V_VGA
L44 HCB1608KF-181T15_6 L44 HCB1608KF-181T15_6
+1.8V_VGA
L47 HCB1608KF-181T15_6 L47 HCB1608KF-181T15_6
+1.8V_VGA
L51 HCB1608KF-181T15_6 L51 HCB1608KF-181T15_6
14 49 Tuesday, August 10, 2010
14 49 Tuesday, August 10, 2010
14 49 Tuesday, August 10, 2010
of
of
1A
1A
1A
5
U41C
U41C
DDR2
DDR2
GDDR3/GDDR5
GDDR3/GDDR5
DDR3
C37
C35
G32
D33
D31
C30
C28
D27
C26
C24
C22
D21
D19
C18
D17
D15
D13
D11
C10
G13
H13
H11
G10
N12
AG12
M12
M27
AH12
A35
E34
F32
E32
F30
A30
F28
A28
E28
F26
A26
F24
A24
E24
A22
F22
A20
F20
E18
A18
F18
A16
F16
E14
F14
F12
A12
F10
A10
J13
G8
K9
K10
G9
A8
C8
E8
A6
C6
E6
A5
L18
L20
L27
DDR3
DQA0_0/DQA_0
DQA0_1/DQA_1
DQA0_2/DQA_2
DQA0_3/DQA_3
DQA0_4/DQA_4
DQA0_5/DQA_5
DQA0_6/DQA_6
DQA0_7/DQA_7
DQA0_8/DQA_8
DQA0_9/DQA_9
DQA0_10/DQA_10
DQA0_11/DQA_11
DQA0_12/DQA_12
DQA0_13/DQA_13
DQA0_14/DQA_14
DQA0_15/DQA_15
DQA0_16/DQA_16
DQA0_17/DQA_17
DQA0_18/DQA_18
DQA0_19/DQA_19
DQA0_20/DQA_20
DQA0_21/DQA_21
DQA0_22/DQA_22
DQA0_23/DQA_23
DQA0_24/DQA_24
DQA0_25/DQA_25
DQA0_26/DQA_26
DQA0_27/DQA_27
DQA0_28/DQA_28
DQA0_29/DQA_29
DQA0_30/DQA_30
DQA0_31/DQA_31
DQA1_0/DQA_32
DQA1_1/DQA_33
DQA1_2/DQA_34
DQA1_3/DQA_35
DQA1_4/DQA_36
DQA1_5/DQA_37
DQA1_6/DQA_38
DQA1_7/DQA_39
DQA1_8/DQA_40
DQA1_9/DQA_41
DQA1_10/DQA_42
DQA1_11/DQA_43
DQA1_12/DQA_44
DQA1_13/DQA_45
DQA1_14/DQA_46
DQA1_15/DQA_47
DQA1_16/DQA_48
DQA1_17/DQA_49
DQA1_18/DQA_50
DQA1_19/DQA_51
DQA1_20/DQA_52
DQA1_21/DQA_53
DQA1_22/DQA_54
DQA1_23/DQA_55
DQA1_24/DQA_56
DQA1_25/DQA_57
DQA1_26/DQA_58
DQA1_27/DQA_59
DQA1_28/DQA_60
DQA1_29/DQA_61
DQA1_30/DQA_62
DQA1_31/DQA_63
MVREFDA
MVREFSA
MEM_CALRN0
MEM_CALRN1
MEM_CALRN2
MEM_CALRP1
MEM_CALRP0
MEM_CALRP2
Broadway
Broadway
EDCA0_0/QSA_0/RDQSA_0
EDCA0_1/QSA_1/RDQSA_1
EDCA0_2/QSA_2/RDQSA_2
EDCA0_3/QSA_3/RDQSA_3
EDCA1_0/QSA_4/RDQSA_4
EDCA1_1/QSA_5/RDQSA_5
EDCA1_2/QSA_6/RDQSA_6
EDCA1_3/QSA_7/RDQSA_7
DDBIA0_0/QSA_0B/WDQSA_0
DDBIA0_1/QSA_1B/WDQSA_1
DDBIA0_2/QSA_2B/WDQSA_2
DDBIA0_3/QSA_3B/WDQSA_3
DDBIA1_0/QSA_4B/WDQSA_4
DDBIA1_1/QSA_5B/WDQSA_5
DDBIA1_2/QSA_6B/WDQSA_6
DDBIA1_3/QSA_7B/WDQSA_7
DQA0_0
R217 243/F_4 R217 243/F_4
R219 243/F_4 R219 243/F_4
R98 243/F_4 R98 243/F_4
R216 243/F_4 R216 243/F_4
R534 243/F_4 R534 243/F_4
DQA0_1
DQA0_2
DQA0_3
DQA0_4
DQA0_5
DQA0_6
DQA0_7
DQA0_8
DQA0_9
DQA0_10
DQA0_11
DQA0_12
DQA0_13
DQA0_14
DQA0_15
DQA0_16
DQA0_17
DQA0_18
DQA0_19
DQA0_20
DQA0_21
DQA0_22
DQA0_23
DQA0_24
DQA0_25
DQA0_26
DQA0_27
DQA0_28
DQA0_29
DQA0_30
DQA0_31
DQA1_0
DQA1_1
DQA1_2
DQA1_3
DQA1_4
DQA1_5
DQA1_6
DQA1_7
DQA1_8
DQA1_9
DQA1_10
DQA1_11
DQA1_12
DQA1_13
DQA1_14
DQA1_15
DQA1_16
DQA1_17
DQA1_18
DQA1_19
DQA1_20
DQA1_21
DQA1_22
DQA1_23
DQA1_24
DQA1_25
DQA1_26
DQA1_27
DQA1_28
DQA1_29
DQA1_30
DQA1_31
D D
C C
+1.5V_VGA +1.5V_VGA
R610
R610
40.2/F_4
40.2/F_4
B B
+1.5V_VGA
R605
R605
100/F_4
100/F_4
R247
R247
MVREFDA
C801
C801
.1U/10V_4
.1U/10V_4
+1.5V_VGA
M96 no STUFF
40.2/F_4
40.2/F_4
MVREFSA
R242
R242
C376
C376
100/F_4
100/F_4
.1U/10V_4
.1U/10V_4
A A
M97 STUFF
Broadway STUFF
5
4
DDR2
DDR2
GDDR5/GDDR3
GDDR5/GDDR3
DDR3
DDR3
MAA0_0/MAA_0
MAA0_1/MAA_1
MAA0_2/MAA_2
MAA0_3/MAA_3
MAA0_4/MAA_4
MAA0_5/MAA_5
MAA0_6/MAA_6
MAA0_7/MAA_7
MAA1_0/MAA_8
MAA1_1/MAA_9
MAA1_2/MAA_10
MAA1_3/MAA_11
MAA1_4/MAA_12
MAA1_5/MAA_13_BA2
MAA1_6/MAA_14_BA0
MAA1_7/MAA_A15_BA1
WCKA0_0/DQMA_0
WCKA0B_0/DQMA_1
WCKA0_1/DQMA_2
WCKA0B_1/DQMA_3
WCKA1_0/DQMA_4
WCKA1B_0/DQMA_5
WCKA1_1/DQMA_6
WCKA1B_1/DQMA_7
GDDR5/DDR2/GDDR3
GDDR5/DDR2/GDDR3
MEMORY INTERFACE A
MEMORY INTERFACE A
ADBIA0/ODTA0
ADBIA1/ODTA1
CLKA0
CLKA0B
CLKA1
CLKA1B
RASA0B
RASA1B
CASA0B
CASA1B
CSA0B_0
CSA0B_1
CSA1B_0
CSA1B_1
CKEA0
CKEA1
WEA0B
WEA1B
MAA0_8
MAA1_8
GDDR5
GDDR5
PV stuff R111
non-stuff R373
G24
J23
H24
J24
H26
J26
H21
G21
H19
H20
L13
G16
J16
H16
J17
H17
A32
C32
D23
E22
C14
A14
E10
D9
C34
D29
D25
E20
E16
E12
J10
D7
A34
E30
E26
C20
C16
C12
J11
F8
J21
G19
H27
G27
J14
H14
K23
K19
K20
K17
K24
K27
M13
K16
K21
J20
K26
L15
H23
J19
MAA0_0
MAA0_1
MAA0_2
MAA0_3
MAA0_4
MAA0_5
MAA0_6
MAA0_7
MAA1_0
MAA1_1
MAA1_2
MAA1_3
MAA1_4
MAA1_5
MAA1_6
MAA1_7
WCKA0_0
WCKA0_0#
WCKA0_1
WCKA0_1#
WCKA1_0
WCKA1_0#
WCKA1_1
WCKA1_1#
EDCA0_0
EDCA0_1
EDCA0_2
EDCA0_3
EDCA1_0
EDCA1_1
EDCA1_2
EDCA1_3
DBIA0_0
DBIA0_1
DBIA0_2
DBIA0_3
DBIA1_0
DBIA1_1
DBIA1_2
DBIA1_3
MAA0_8
MAA1_8
JTAG enable function
4
WCKA0_0 [20]
WCKA0_0# [20]
WCKA0_1 [20]
WCKA0_1# [20]
WCKA1_0 [21]
WCKA1_0# [21]
WCKA1_1 [21]
WCKA1_1# [21]
EDCA0_0 [20]
EDCA0_1 [20]
EDCA0_2 [20]
EDCA0_3 [20]
EDCA1_0 [21]
EDCA1_1 [21]
EDCA1_2 [21]
EDCA1_3 [21]
DBIA0_0 [20]
DBIA0_1 [20]
DBIA0_2 [20]
DBIA0_3 [20]
DBIA1_0 [21]
DBIA1_1 [21]
DBIA1_2 [21]
DBIA1_3 [21]
ADBIA0# [20]
ADBIA1# [21]
CLKA0 [20]
CLKA0# [20]
CLKA1 [21]
CLKA1# [21]
RASA0# [20]
RASA1# [21]
CASA0# [20]
CASA1# [21]
CSA0# [20]
CSA1# [21]
CKEA0# [20]
CKEA1# [21]
WEA0# [20]
WEA1# [21]
AMD
0913
DQA0_[0..31] [20]
DQA1_[0..31] [21]
MAA0_[0..8] [20]
MAA1_[0..8] [21]
DQB0_[0..31] [22]
DQB1_[0..31] [23]
MAB0_[0..8] [22]
MAB1_[0..8] [23]
R158
R158
40.2/F_4
40.2/F_4
R161
R161
100/F_4
100/F_4 R226 243/F_4 R226 243/F_4
+1.5V_VGA
R159
R159
40.2/F_4
40.2/F_4
R160
R160
100/F_4
100/F_4
+3V_VGA
R155
R155
10K/F_4
10K/F_4
R562
R562
*10K/F_4
*10K/F_4
3
2
+1.5V_VGA [18,20,21,22,23,42]
1
15
U41D
U41D
DDR2
DDR2
GDDR3/GDDR5
GDDR3/GDDR5
DDR3
AM8
AM7
AM6
AM1
AA12
AD28
AK10
AL10
AA4
AB6
AB1
AB3
AD6
AD1
AD3
AD5
AF1
AF3
AF6
AG4
AH5
AH6
AK3
AF8
AF9
AG8
AG7
AK9
AL7
AK1
AL4
AN4
AP3
AP1
AP5
C5
C3
E3
E1
F1
F3
F5
G4
H5
H6
J4
K6
K5
L4
M6
M1
M3
M5
N4
P6
P5
R4
T6
T1
U4
V6
V1
V3
Y6
Y1
Y3
Y5
AJ4
Y12
DDR3
DQB0_0/DQB_0
DQB0_1/DQB_1
DQB0_2/DQB_2
DQB0_3/DQB_3
DQB0_4/DQB_4
DQB0_5/DQB_5
DQB0_6/DQB_6
DQB0_7/DQB_7
DQB0_8/DQB_8
DQB0_9/DQB_9
DQB0_10/DQB_10
DQB0_11/DQB_11
DQB0_12/DQB_12
DQB0_13/DQB_13
DQB0_14/DQB_14
DQB0_15/DQB_15
DQB0_16/DQB_16
DQB0_17/DQB_17
DQB0_18/DQB_18
DQB0_19/DQB_19
DQB0_20/DQB_20
DQB0_21/DQB_21
DQB0_22/DQB_22
DQB0_23/DQB_23
DQB0_24/DQB_24
DQB0_25/DQB_25
DQB0_26/DQB_26
DQB0_27/DQB_27
DQB0_28/DQB_28
DQB0_29/DQB_29
DQB0_30/DQB_30
DQB0_31/DQB_31
DQB1_0/DQB_32
DQB1_1/DQB_33
DQB1_2/DQB_34
DQB1_3/DQB_35
DQB1_4/DQB_36
DQB1_5/DQB_37
DQB1_6/DQB_38
DQB1_7/DQB_39
DQB1_8/DQB_40
DQB1_9/DQB_41
DQB1_10/DQB_42
DQB1_11/DQB_43
DQB1_12/DQB_44
DQB1_13/DQB_45
DQB1_14/DQB_46
DQB1_15/DQB_47
DQB1_16/DQB_48
DQB1_17/DQB_49
DQB1_18/DQB_50
DQB1_19/DQB_51
DQB1_20/DQB_52
DQB1_21/DQB_53
DQB1_22/DQB_54
DQB1_23/DQB_55
DQB1_24/DQB_56
DQB1_25/DQB_57
DQB1_26/DQB_58
DQB1_27/DQB_59
DQB1_28/DQB_60
DQB1_29/DQB_61
DQB1_30/DQB_62
DQB1_31/DQB_63
MVREFDB
MVREFSB
TESTEN
CLKTESTA
CLKTESTB
Broadway
Broadway
2
DQB0_0
DQB0_1
DQB0_2
DQB0_3
DQB0_4
DQB0_5
DQB0_6
DQB0_7
DQB0_8
DQB0_9
DQB0_10
DQB0_11
DQB0_12
DQB0_13
DQB0_14
DQB0_15
DQB0_16
DQB0_17
DQB0_18
DQB0_19
DQB0_20
DQB0_21
DQB0_22
DQB0_23
DQB0_24
DQB0_25
DQB0_26
DQB0_27
DQB0_28
DQB0_29
DQB0_30
DQB0_31
DQB1_0
DQB1_1
DQB1_2
DQB1_3
DQB1_4
DQB1_5
DQB1_6
DQB1_7
DQB1_8
DQB1_9
DQB1_10
DQB1_11
DQB1_12
DQB1_13
DQB1_14
DQB1_15
DQB1_16
DQB1_17
DQB1_18
DQB1_19
DQB1_20
DQB1_21
DQB1_22
DQB1_23
DQB1_24
DQB1_25
DQB1_26
DQB1_27
DQB1_28
DQB1_29
DQB1_30
DQB1_31
MVREFDB
C214
C214
.1U/10V_4
.1U/10V_4
MVREFSB
C213
C213
.1U/10V_4
.1U/10V_4
3
TESTEN
TEST_MCLK
TEST_YCLK
C71
C71
C649
C649
*.1U/10V_4
*.1U/10V_4
*.1U/10V_4
*.1U/10V_4
R524
R524
R71
R71
*51_4
*51_4
*51_4
*51_4
M96 no STUFF
M97 no STUFF
TEST_YCLK
TEST_MCLK
M96 Install
M97 no STUFF
R99
R99
*4.7K_4
*4.7K_4
R535
R535
*4.7K_4
*4.7K_4
DDR2
DDR2
GDDR5/GDDR3
GDDR5/GDDR3
DDR3
DDR3
MAB0_0/MAB_0
MAB0_1/MAB_1
MAB0_2/MAB_2
MAB0_3/MAB_3
MAB0_4/MAB_4
MAB0_5/MAB_5
MAB0_6/MAB_6
MAB0_7/MAB_7
MAB1_0/MAB_8
MAB1_1/MAB_9
MAB1_2/MAB_10
MAB1_3/MAB_11
MAB1_4/MAB_12
WCKB0_0/DQMB_0
WCKB0B_0/DQMB_1
WCKB0_1/DQMB_2
WCKB0B_1/DQMB_3
WCKB1_0/DQMB_4
WCKB1B_0/DQMB_5
WCKB1_1/DQMB_6
WCKB1B_1/DQMB_7
GDDR5/DDR2/GDDR3
GDDR5/DDR2/GDDR3
EDCB0_0/QSB_0/RDQSB_0
MEMORY INTERFACE B
MEMORY INTERFACE B
EDCB0_1/QSB_1/RDQSB_1
EDCB0_2/QSB_2/RDQSB_2
EDCB0_3/QSB_3/RDQSB_3
EDCB1_0/QSB_4/RDQSB_4
EDCB1_1/QSB_5/RDQSB_5
EDCB1_2/QSB_6/RDQSB_6
EDCB1_3/QSB_7/RDQSB_7
DDBIB0_0/QSB_0B/WDQSB_0
DDBIB0_1/QSB_1B/WDQSB_1
DDBIB0_2/QSB_2B/WDQSB_2
DDBIB0_3/QSB_3B/WDQSB_3
DDBIB1_0/QSB_4B/WDQSB_4
DDBIB1_1/QSB_5B/WDQSB_5
DDBIB1_2/QSB_6B/WDQSB_6
DDBIB1_3/QSB_7B/WDQSB_7
ADBIB0/ODTB0
ADBIB1/ODTB1
MAB1_5/BA2
MAB1_6/BA0
MAB1_7/BA1
CLKB0
CLKB0B
CLKB1
CLKB1B
RASB0B
RASB1B
CASB0B
CASB1B
CSB0B_0
CSB0B_1
CSB1B_0
CSB1B_1
CKEB0
CKEB1
WEB0B
WEB1B
MAB0_8
MAB1_8
GDDR5
GDDR5
DRAM_RST
P8
T9
P9
N7
N8
N9
U9
U8
Y9
W9
AC8
AC9
AA7
AA8
Y8
AA9
H3
H1
T3
T5
AE4
AF5
AK6
AK5
F6
K3
P3
V5
AB5
AH1
AJ9
AM5
G7
K1
P1
W4
AC4
AH3
AJ8
AM3
T7
W7
L9
L8
AD8
AD7
T10
Y10
W10
AA10
P10
L10
AD10
AC10
U10
AA11
N10
AB11
T8
W8
AH11
VM_RST#_R
5K/F_4
5K/F_4
Location
R32
R34
R33
C29
NB5/RD2
NB5/RD2
NB5/RD2
MAB0_0
MAB0_1
MAB0_2
MAB0_3
MAB0_4
MAB0_5
MAB0_6
MAB0_7
MAB1_0
MAB1_1
MAB1_2
MAB1_3
MAB1_4
MAB1_5
MAB1_6
MAB1_7
WCKB0_0
WCKB0_0#
WCKB0_1
WCKB0_1#
WCKB1_0
WCKB1_0#
WCKB1_1
WCKB1_1#
EDCB0_0
EDCB0_1
EDCB0_2
EDCB0_3
EDCB1_0
EDCB1_1
EDCB1_2
EDCB1_3
DBIB0_0
DBIB0_1
DBIB0_2
DBIB0_3
DBIB1_0
DBIB1_1
DBIB1_2
DBIB1_3
MAB0_8
MAB1_8
R54
R54
R55
R55
10/F_4
10/F_4
C54
C54
120P/50V_4
120P/50V_4
B-W
10R
WCKB0_0 [22]
WCKB0_0# [22]
WCKB0_1 [22]
WCKB0_1# [22]
WCKB1_0 [23]
WCKB1_0# [23]
WCKB1_1 [23]
WCKB1_1# [23]
EDCB0_0 [22]
EDCB0_1 [22]
EDCB0_2 [22]
EDCB0_3 [22]
EDCB1_0 [23]
EDCB1_1 [23]
EDCB1_2 [23]
EDCB1_3 [23]
DBIB0_0 [22]
DBIB0_1 [22]
DBIB0_2 [22]
DBIB0_3 [22]
DBIB1_0 [23]
DBIB1_1 [23]
DBIB1_2 [23]
DBIB1_3 [23]
ADBIB0# [22]
ADBIB1# [23]
CLKB0 [22]
CLKB0# [22]
CLKB1 [23]
CLKB1# [23]
RASB0# [22]
RASB1# [23]
CASB0# [22]
CASB1# [23]
CSB0# [22]
CSB1# [23]
CKEB0# [22]
CKEB1# [23]
WEB0# [22]
WEB1# [23]
R56
R56
51/F_4
51/F_4
VM_RST# [20,21,22,23]
DB 20100428 (ref
137-12)
AMD
0822
5K
51R
120PF
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
PROJECT : SP9 (Huron River)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet of
ATI M97-M2 (MEM I/F) 2/5
ATI M97-M2 (MEM I/F) 2/5
ATI M97-M2 (MEM I/F) 2/5
1
15 49 Tuesday, August 10, 2010
15 49 Tuesday, August 10, 2010
15 49 Tuesday, August 10, 2010
of
of
1A
1A
1A