QUANTA satellite u300, satellite u305 Schematics

1

http://adf.ly/LOM1

2

3

4

5

6

7

8

PCB STACK UP

BU1 Block Diagram

LAYER 1 : TOP

LAYER 2 : SGND

LAYER 3 : IN1

A A

LAYER 4 : IN2

LAYER 5 : VCC

Page 3,4

LAYER 6 : BOT

R.G.B

LVDS X1

VCC_CORE

CRT

Page 18

LCD(WXGA 13W)

Page 18

Intel

Merom

(35W)

FSB(667/800MHZ)

Crestline GM

533/ 667 MHZ DDR II

CLOCK GENERATOR

CK505

Page 2

ICS9LPR363

DDRII-SODIMM1
DDRII-SODIMM2

Page 12,13

+1.5V

SATA - HDD

+1.05V

B B

+1.25V

+1.8VSUS

+3VPCU
+3V_S5
+3VSUS
+3V
+5VPCU
+5V_S5
+5V
SMDDR_VTERM
SMDDR_VREF

C C

BORD

Page 19

IDE - ODD

Page 19

System 0

Page 24

System 1

Page 24

System 2

Page 24

WLAN

Page 23

Finger Printer

Page 24

Bluetooth

Page 24

New Card

Page 24

Reserved

Page 23

Camera

Page 18

AUDIO/FM/USB DAUGHTER BOARD

G SENSOR

USB PORT 0

USB PORT 1

USB PORT 2

USB PORT 3

(BOT)

USB PORT 4

(BOT)

USB PORT 5

(BOT)

USB PORT 6

(BOT)

USB PORT 7

(BOT)

USB PORT 8

SATA

PATA

USB 2.0

Azalia

Page 5,7,8,9,10,11

ICH8M

Page 14,15,16,17

LPC

WPC8763LDG

Page 26

FAN Touch

PAD Board

DMI(x2/x4)

32.768KHz

Key FLASH

ROM

PCI-Express

MINI CARD
WLAN

Page 23

PCI Bus

PCMCIA
Controller
(CB 1410)

Page 21 Page 22

(BOT)

PCMCIA

PCI ROUTING
TABLE

REQ0# / GNT0# R5C832
REQ1# / GNT1# CB1410

Card
Reader/1394
(R5C833)

1394

5 IN 1

(BOT)(BOT)

INTERUPT

IDSEL

INTA#,INTB#

AD17
AD20 INTC#

MINI CARD

Page 23

DEVICE

NEW CARD

Page 24 Page 20

100/10 LAN
RTL8101E

(BOT)(BOT)

Connector

RJ45

RJ11/RJ45/USB DAUGHTER BOARDDAUGHTER

RJ11 USB

2

AUDIO CODEC
(ALC262)

MDC 1.5

Page 25

RJ11

Connector

3

BTO BOM OPTION

CB@ : CARD BUS
FP@ : FINGER PRINTER
BT@ : BLUETOOTH
CM@ : CAMERA
GS@ : G-SENSOR
NEW@ : NEW CARD
LCD@ : LCD TYPE PANEL
LED@ : LED TYPE PANEL
1394@ : 1394

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

4

5

6

Date: Sheet

7

PROJECT : BU1 Santa Rosa

Block Diagram

Block Diagram

Block Diagram

1A

1A

133Friday, May 25, 2007

133Friday, May 25, 2007

133Friday, May 25, 2007

8

1A

of

of

of

HP

INT SPK

D D

HP AMP

SPK AMP

USB

1

5

http://adf.ly/LOM1

4

3

2

1

Clock Generator

R90

R90

0_6

0_6

R404

R404

0_6

0_6

R86 10K_4R86 10K_4

R82 *10K_4R82 *10K_4

R74 *10K_4R74 *10K_4

R79 10K_4R79 10K_4

R409 *10K_4R409 *10K_4

R407 10K_4R407 10K_4

R72 2.2K_4R72 2.2K_4

R87 2.2K_4R87 2.2K_4

R88 33_4R88 33_4

C411 .1U_4C411 .1U_4

C414 .1U_4C414 .1U_4

C408 10U_8C408 10U_8

C43 .1U_4C43 .1U_4

C418 .1U_4C418 .1U_4

C412 .1U_4C412 .1U_4

C415 .1U_4C415 .1U_4

+1.05V

+1.05V

+1.05V

H=1.2mm

U22

IC(64P) ICS9LPRS365BGLFT(TSSOP)

U22

VDD_CK_VDD_PCI

VDD_CK_VDD_48

VDD_CK_VDD_PCI

VDD_CK_VDD_REF

VDD_CK_VDD_PCI

VDD_CK_VDD_CPU

+1.25V_VDD

R85 56_4R85 56_4

R81 56_4R81 56_4

R78 56_4R78 56_4

R405 56_4R405 56_4

R73 22_4R73 22_4

R406 56_4R406 56_4

R71 47_4R71 47_4

CPU_BSEL0[3]

CPU_BSEL1[3]

CPU_BSEL2[3] MCH_BSEL2 [6]

4

PCLK_DEBUG_R

PCLK_PCM_R

PCLK_R5C833_R

PCLK_591_R

PCI_CLK_SIO_R

PCLK_ICH_R

CG_XIN

CG_XOUT

FSA

<check list>
(1)PCI2/TME: PU be used, the CK505 cannot over clock any of the clock for Trust Mode security purposes.

(2)PCI4/SRC5_EN: PU be used, the CK505 will be configured to use Pin37/38 to SRC5 clock.
If PD be detect at powe-on,the CK505 will setting Pin 37/38 to PCI_STOP/CUP_SOTP
(Default is setting to PCI_STOP/CUP_SOTP)

(3)PCIF5/ITP_EN: PU be used, the CK505 will be configured to use Pin46/47 to CPU ITP clock.
If PD be detect at powe-on,the CK505 will setting Pin 46/47 to SRC8
(Default is setting to SRC8)

(4)SLG8SP512 Pin 6 select Pin 17, 18 output is LCDCLK or 27 M, PD is LCDCLK, PU is 27 M ,
Pin 37, 38 will fixed be use CPU_Stop and PCI_Stop.

(5)SLG505YC64 CK505 Standar parts follow standar setting

R59 0_4R59 0_4

R66 *56_4R66 *56_4

R65 *1K_4R65 *1K_4

R80 0_4R80 0_4

R77 *0_4R77 *0_4

R408 *1K_4R408 *1K_4

R55 0_4R55 0_4

R62 *0_4R62 *0_4

R56 *1K_4R56 *1K_4

IC(64P) ICS9LPRS365BGLFT(TSSOP)

2

VDD_PCI

9

VDD_48

16

VDD_PLL3

61

VDD_REF

CK505

39
55

12
20
26
45
36
49

1

3

4

5

6

7

60

59

10

57

62

8
11
15
19
52
23
29
42
58

CK505

VDD_SRC
VDD_CPU

VDD_96_IO
VDD_PLL3_IO
VDD_SRC_IO_1
VDD_SRC_IO_3
VDD_SRC_IO_2
VDD_CPU_IO

PCI0/CR#_A

PCI1/CR#_B

PCI2/TME

PCI3

PCI4/SRC5_EN

PCIF5/ITP_EN

XTAL_IN

XTAL_OUT

USB_48/FSA

FSB/TEST/MODE

REF0/FSC/TESTSEL

VSS_PCI
VSS_48
VSS_IO
VSS_PLL3
VSS_CPU
VSS_SRC1
VSS_SRC2
VSS_SRC3
VSS_REF

CLK_BSEL0

CLK_BSEL1

CLK_BSEL2

SRC5#/CPU_STOP#

CKPWRGD/PWRDWN#

CPU Clock select

ICS9LPRS365BGLFT
SLG8SP512T: AL8SP512K05

48

IO_VOUT

64

SCLK

63

SDA

CPU0

CPU0#

CPU1

CPU1#

SRC8/ITP

SRC8#/ITP#

SRC10#

SRC10

SRC9

SRC9#

SRC6

SRC6#

SRC4

SRC4#

SRC2/SATA

SRC1/SE1

SRC1#/SE2

MCH_BSEL0 [6]

38
37

54
53

51
50

47
46

35
34

33
32

30
31

44
43

41
40

27
28

24
25

21
22

17
18

13
14

56

SRC5/PCI_STOP#

SRC11/CR#_H

SRC11#/CR#_G

SRC7/CR#_F

SRC7#/CR#_E

SRC3/CR#_C

SRC3#/CR#_D

SRC2#/SATA#

SRC0/DOT96

SRC0#/DOT96#

ICS9LPRS365AGLFT/ SLG8SP512T

ICS9LPRS365AGLFT/ SLG8SP512T

FSA

MCH_BSEL1 [6]

FSB

FSC

3

CGCLK_SMB
CGDAT_SMB

CLK_CPU_BCLK_R
CLK_CPU_BCLK#_R

CLK_MCH_BCLK_R
CLK_MCH_BCLK#_R

CLK_PCIE_3GPLL#_R
CLK_PCIE_3GPLL_R

CLK_MCH_OE#_R
NEW_CLKREQ#_R

CLK_PCIE_NEW_R
CLK_PCIE_NEW_R#

CLK_PCIE_MINI2_R
CLK_PCIE_MINI2#_R

CLK_PCIE_MINI_R
CLK_PCIE_MINI#_R

CLK_PCIE_LAN_R
CLK_PCIE_LAN#_R

CLK_PCIE_ICH_R
CLK_PCIE_ICH#_R

CLK_PCIE_SATA_R
CLK_PCIE_SATA#_R

DREFSSCLK_R
DREFSSCLK#_R

DREFCLK_R
DREFCLK#_R

L26 PBY160808T-301Y-N_6L26 PBY160808T-301Y-N_6

+3V

D D

C407 33P_4C407 33P_4

PCLK_DEBUG[23,26]

H=1.5mm

<check list>
PCI4/SRC5_EN: PU be used,
the CK505 will be configured to
use Pin37/38 to SRC5 clock.If
PD be detect at powe-on,the
CK505 will setting Pin 37/38 to
PCI_STOP/CUP_SOTP(Default
is setting to
PCI_STOP/CUP_SOTP)

C C

<check list>
PCIF5/ITP_EN: PU be used,
the CK505 will be configured
to use Pin46/47 to CPU ITP
clock.If PD be detect at
powe-on,the CK505 will setting
Pin 46/47 to SRC8(Default is
setting to SRC8)

CL=20p

B B

C406 33P_4C406 33P_4

<check list>
XTAL length < 500mils

C426

C426

10U_8

10U_8

R68

R68

0_6

0_6

PCLK_PCM[21]

PCLK_R5C833[22]

PCLK_591[26]

PCLK_ICH[15]

CLKUSB_48[16]

14M_ICH[16]

21

+3V

+3V

+3V

CLK_BSEL0
CLK_BSEL1

CLK_BSEL2 FSC

CG_XIN

Y6

Y6

14.318MHZ

14.318MHZ

CG_XOUT

BSEL Frequency Select Table

FSC FSB FSA Frequency

0

0

1

0

0

1

1

0

0

1

0

A A

1

1

1

1

0

1

1

1

1

0

0

0

266Mhz0

133Mhz

166Mhz

200Mhz

400Mhz

Reserved

100Mhz

333Mhz

5

Clock Gen Differential IO power

C428

RP50 0X2RP50 0X2

1
3

RP52 0X2RP52 0X2

1
3

RP58 0X2RP58 0X2

1
3

R410 475_4R410 475_4
R412 475_4R412 475_4

RP59 0X2RP59 0X2

3
1

RP54 0X2RP54 0X2

1
3

RP56 0X2RP56 0X2

1
3

RP57 0X2RP57 0X2

3
1

RP55 0X2RP55 0X2

3
1

RP53 0X2RP53 0X2

3
1

RP13 0X2RP13 0X2

1
3

RP51 0X2RP51 0X2

3
1

Clock Gen I2C

SDATA[13,16,19,23,24]

SCLK[13,16,19,23,24]

+3V

R411 10K_4R411 10K_4

C428

C427

C427

10U_8

10U_8

*10U_8

*10U_8

0.1U close to each VDD_IO Power pin

2
4

2
4

2
4

4
2

2
4

2
4

4
2

4
2

4
2

2
4

4
2

During initial power-up be used to
sample FSB speed with FSA/B/C

+3V

Q3

Q3
RHU002N06

RHU002N06

2

3

+3V

Q4

Q4
RHU002N06

RHU002N06

2

3

NEW_CLKREQ#_R

2

C424

C424

C425

C425

C422

C422

.1U_4

.1U_4

.1U_4

.1U_4

.1U_4

.1U_4

PM_STPPCI# [16]
PM_STPCPU# [16]

CLK_CPU_BCLK [3]
CLK_CPU_BCLK# [3]

CLK_MCH_BCLK [5]
CLK_MCH_BCLK# [5]

CLK_PCIE_3GPLL# [6]
CLK_PCIE_3GPLL [6]

CLK_MCH_OE# [6]
NEW_CLKREQ# [24]

CLK_PCIE_NEW [24]
CLK_PCIE_NEW# [24]

CLK_PCIE_MINI2 [23]
CLK_PCIE_MINI2# [23]

CLK_PCIE_MINI [23]
CLK_PCIE_MINI# [23]

CLK_PCIE_LAN [20]
CLK_PCIE_LAN# [20]

CLK_PCIE_ICH [15]
CLK_PCIE_ICH# [15]

CLK_PCIE_SATA [14]
CLK_PCIE_SATA# [14]

DREFSSCLK [6]
DREFSSCLK# [6]

DREFCLK [6]

DREFCLK# [6]

CK_PWRGD [16]

R94

R94

10K_4

10K_4

1

R95

R95

10K_4

10K_4

1

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

CLK. GEN./ CK505

CLK. GEN./ CK505

CLK. GEN./ CK505

Date: Sheet

Date: Sheet

Date: Sheet

+1.25V_VDD +1.25V

L25

L25
PBY160808T-301Y-N_6

PBY160808T-301Y-N_6

EMI CHIP PBY160808T-301Y-N (300+-25%,2A)

EMI CHIP PBY160808T-301Y-N (300+-25%,2A)

C416

C416

C419

C419

C420

C420

.1U_4

.1U_4

.1U_4

.1U_4

.1U_4

.1U_4

CGDAT_SMB

CGCLK_SMB

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

1

1A

1A

1A

of

of

of

233Friday, May 25, 2007

233Friday, May 25, 2007

233Friday, May 25, 2007

5

http://adf.ly/LOM1

H_A#[16:3][5]

CPU(HOST)

D D

C C

H_STPCLK#[14]

B B

+1.05V

A A

H_ADSTB0#[5]
H_REQ#[4:0][5]

H_A#[35:17][5]

R26 0_4R26 0_4

H_D#[15:0][5]

H_DSTBN#0[5]
H_DSTBP#0[5]
H_DINV#0[5]
H_D#[31:16][5]

<Check list & CRB>
Layout note: Z=55 ohm
H_GTLREF<0.5"

R11

R11

H_DSTBN#1[5]

1K_4

1K_4

H_DSTBP#1[5]
H_DINV#1[5]

T10T10

T2T2
T11T11

R9
2K_6R92K_6

CPU_BSEL0[2]
CPU_BSEL1[2]
CPU_BSEL2[2]

H_ADSTB1#[5]

H_A20M#[14]
H_FERR#[14]

H_IGNNE#[14]

H_INTR[14]

H_NMI[14]

H_SMI#[14]

T3T3
T5T5
T8T8
T1T1
T146T146
T7T7
T6T6
T9T9
T4T4
T12T12

R21 *1K_4R21 *1K_4
R20 *1K_4R20 *1K_4

C14 *.1U_4C14 *.1U_4

5

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_STPCLK_R#

TP_CPU_RSVD01
TP_CPU_RSVD02
TP_CPU_RSVD03
TP_CPU_RSVD04
TP_CPU_RSVD05
TP_CPU_RSVD06
TP_CPU_RSVD07
TP_CPU_RSVD08
TP_CPU_RSVD09
TP_CPU_RSVD10

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31

H_GTLREF
CPU_TEST1
CPU_TEST2
CPU_TEST3
CPU_TEST4
CPU_TEST5
CPU_TEST6

U24A

U24A

J4

A[3]#

L5

A[4]#

L4

A[5]#

K5

A[6]#

M3

A[7]#

N2

A[8]#

J1

A[9]#

N3

A[10]#

P5

A[11]#

P2

A[12]#

L2

A[13]#

P4

A[14]#

P1

A[15]#

R1

A[16]#

M1

ADSTB[0]#

K3

REQ[0]#

H2

REQ[1]#

K2

REQ[2]#

J3

REQ[3]#

L1

REQ[4]#

Y2

A[17]#

U5

A[18]#

R3

A[19]#

W6

A[20]#

U4

A[21]#

Y5

A[22]#

U1

A[23]#

R4

A[24]#

T5

A[25]#

T3

A[26]#

W2

A[27]#

W5

A[28]#

Y4

A[29]#

U2

A[30]#

V4

A[31]#

W3

A[32]#

AA4

A[33]#

AB2

A[34]#

AA3

A[35]#

V1

ADSTB[1]#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

M4

RSVD[01]

N5

RSVD[02]

T2

RSVD[03]

V3

RSVD[04]

B2

RSVD[05]

C3

RSVD[06]

D2

RSVD[07]

D22

RSVD[08]

D3

RSVD[09]

F6

RSVD[10]

Merom Ball-out Rev 1a

Merom Ball-out Rev 1a
U24B

U24B

E22

D[0]#

F24

D[1]#

E26

D[2]#

G22

D[3]#

F23

D[4]#

G25

D[5]#

E25

D[6]#

E23

D[7]#

K24

D[8]#

G24

D[9]#

J24

D[10]#

J23

D[11]#

H22

D[12]#

F26

D[13]#

K22

D[14]#

H23

D[15]#

J26

DSTBN[0]#

H26

DSTBP[0]#

H25

DINV[0]#

N22

D[16]#

K25

D[17]#

P26

D[18]#

R23

D[19]#

L23

D[20]#

M24

D[21]#

L22

D[22]#

M23

D[23]#

P25

D[24]#

P23

D[25]#

P22

D[26]#

T24

D[27]#

R24

D[28]#

L25

D[29]#

T25

D[30]#

N25

D[31]#

L26

DSTBN[1]#

M26

DSTBP[1]#

N24

DINV[1]#

AD26

GTLREF

C23

TEST1

D25

TEST2

C24

TEST3

AF26

TEST4

AF1

TEST5

A26

TEST6

B22

BSEL[0]

B23

BSEL[1]

C21

BSEL[2]

Merom Ball-out Rev 1a

Merom Ball-out Rev 1a

ADDR GROUP 0 ADDR GROUP 1

ADDR GROUP 0 ADDR GROUP 1

ADS#
BNR#

BPRI#

DEFER#

DRDY#
DBSY#

BR0#

IERR#

INIT#

LOCK#

CONTROL

CONTROL

RESET#

RS[0]#
RS[1]#
RS[2]#
TRDY#

HIT#

HITM#

BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#

PRDY#
PREQ#

TCK

TDI
TDO
TMS

TRST#

XDP/ITP SIGNALS

XDP/ITP SIGNALS

DBR#

THERMAL

THERMAL

PROCHOT#

THERMDA
THERMDC

ICH

ICH

THERMTRIP#

H CLK

H CLK

BCLK[0]
BCLK[1]

RESERVED

RESERVED

DATA GRP 0

DATA GRP 0

DATA GRP 2DATA GRP 3

DATA GRP 2DATA GRP 3

DSTBN[2]#
DSTBP[2]#

DINV[2]#

DATA GRP 1

DATA GRP 1

DSTBN[3]#
DSTBP[3]#

DINV[3]#

COMP[0]

MISC

MISC

COMP[1]
COMP[2]
COMP[3]

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#

D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#

SLP#

PSI#

H1
E2
G5

H5
F21
E1

F1

D20
B3

H4

C1
F3
F4
G3
G2

G6
E4

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20

D21
A24
B25

C7

A22
A21

4

H_IERR#

XDP_TCK
XDP_TDI

XDP_TMS
XDP_TRST#

XDP_DBRESET#

H_PROCHOT_R#

H_THERMDA
H_THERMDC

THERMTRIP#_PWR

H_D#32

Y22

H_D#33

AB24

H_D#34

V24

H_D#35

V26

H_D#36

V23

H_D#37

T22

H_D#38

U25

H_D#39

U23

H_D#40

Y25

H_D#41

W22

H_D#42

Y23

H_D#43

W24

H_D#44

W25

H_D#45

AA23

H_D#46

AA24

H_D#47

AB25
Y26
AA26
U22

H_D#48

AE24

H_D#49

AD24

H_D#50

AA21

H_D#51

AB22

H_D#52

AB21

H_D#53

AC26

H_D#54

AD20

H_D#55

AE22

H_D#56

AF23

H_D#57

AC25

H_D#58

AE21

H_D#59

AD21

H_D#60

AC22

H_D#61

AD23

H_D#62

AF22

H_D#63

AC23
AE25
AF24
AC20

COMP0

R26

COMP1

U26

COMP2

AA1

COMP3

Y1

E5
B5
D24
D6
D7
AE6

4

H_ADS# [5]
H_BNR# [5]
H_BPRI# [5]

H_DEFER# [5]
H_DRDY# [5]
H_DBSY# [5]

R16 56.2_4R16 56.2_4

R19 0_4R19 0_4

R17 56.2_4R17 56.2_4

R18 *2.2K_4R18 *2.2K_4

<check list>
Default PU 56ohm if no use.
Serial R NC, If connect to power side PU 68ohm. Serial R 2.2K

CLK_CPU_BCLK [2]
CLK_CPU_BCLK# [2]

H_D#[47:32] [5]

H_DSTBN#2 [5]
H_DSTBP#2 [5]
H_DINV#2 [5]
H_D#[63:48] [5]

H_DSTBN#3 [5]
H_DSTBP#3 [5]

R14 27.4_6R14 27.4_6
R13 54.9_4R13 54.9_4
R10 27.4_6R10 27.4_6
R8 54.9_4R8 54.9_4

H_DINV#3 [5]

H_DPSLP# [14]
H_DPWR# [5]

H_CPUSLP# [5]
PSI# [29]

+1.05V

+1.05V

H_BREQ#0 [5]

H_INIT# [14]

H_LOCK# [5]

H_CPURST# [5]
H_RS#0 [5]
H_RS#1 [5]
H_RS#2 [5]
H_TRDY# [5]

H_HIT# [5]
H_HITM# [5]

SYS_RST# [16]

H_PROCHOT# [29]

<Check list & CRB>
Layout note: L<0.5"
COMP0/2 Z=27.4ohm
COMP1/3 Z=54.9

<CRB & Design guide>
Layout Note:Connect from
SB and daisy chain to CPU
CORE VR.Not use T
connect.(SB/VR/CPU/NB)

ICH_DPRSTP# [6,14,29]

H_PWRGD [14]

3

CPU Thermal monitor

MBCLK[18,26,27]

MBDATA[18,26,27]

THERM_ALERT#[16]

3

3

+3V

+3V

CPU FAN

THER_SHD#

VFAN[26]

2

+3V

Q33

Q33

2

RHU002N06

RHU002N06

1

+3V

Q34

Q34

2

RHU002N06

RHU002N06

1

R434

R434

R435 *0_4R435 *0_4

R438 10K_4R438 10K_4

+3V

R458

R458
330_4

330_4

Q37

Q37

2

MMBT3904

MMBT3904

1 3

+5V

C290 .1U_4C290 .1U_4

*10K_4

*10K_4

THERM_ALERT#_R

THER_SHD#

SYS_SHDN# [28]

H=1.75mm

U26

U26

VIN2VO

1

/FON

4

VSET

G995

G995

GND
GND
GND
GND

R431

R431

10K_4

10K_4

3
5
6
7
8

R432

R432

10K_4

10K_4

8

7

6

4

FANSIG[26]

+3V

R437

R437

200_6

200_6

H=1.75mm

U23

U23

VCC

SCLK

DXP

SDA

DXN

ALERT#

GND

OVERT#

MAX6657

MAX6657

ADDRESS: 98H

TH_FAN_POWERTH_FAN_POWER

C489

C489

10U_8

10U_8

1

LM86VCC

1

2

3

5

<check list>
Layout Note:Routing 10:10 mils and away
from noise source with ground gard

C491

C491

.01U_4

.01U_4

C9

*.01U_4C9*.01U_4

C455

C455

.1U_4

.1U_4

C454

C454

2200P_4

2200P_4

+3V

R1

10K_4R110K_4

CN34

CN34

1
2
345

PTI_CWY030-B0G1Z

PTI_CWY030-B0G1Z

H_THERMDA

H_THERMDC

FANPWR = 1.6*VSET

+1.05V

Thermal Trip

DELAY_VR_PWRGOOD[6,16,29]

THERMTRIP#_PWR

<CRB & Design guide>
Layout Note: Thermal trip should connect to ICH8 & GMCH without T-ing

2

+1.05V

3

Q1

R23

R23

2

FDV301NQ1FDV301N

+1.05V

R25

R25

56.2_4

56.2_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

1

Q2

Q2

2

MMBT3904

MMBT3904

1 3

R24 *0_4R24 *0_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

CPU(1 of 2)/FAN/Thermal

CPU(1 of 2)/FAN/Thermal

CPU(1 of 2)/FAN/Thermal

*10K_4

*10K_4

SYS_SHDN# [28]

PM_THRMTRIP# [6,14]

1

D3

*BAS316D3*BAS316

C35 *1U_6C35 *1U_6

333Friday, May 25, 2007

333Friday, May 25, 2007

333Friday, May 25, 2007

3A

3A

3A

of

of

of

PU/PD (ITP700)

XDP_TMS

XDP_TDI

XDP_TCK

XDP_TRST#

3

R7 39_4R7 39_4

R6 150_4R6 150_4

R5 27_4R5 27_4

R4 680_4R4 680_4

5

http://adf.ly/LOM1

CPU(Power)

VCC_CORE

C465

C465

C25

C25

C466

D D

C C

B B

10U_8

10U_8

C475

C475

10U_8

10U_8

C31

C31

10U_8

10U_8

C468

C468

10U_8

10U_8

+

+

C32

C32

330U_7343

330U_7343

<Check list>
Option1:330U*6(ESR=1.5m ohm aggregate , ESL=0.8nH/6) and 22U*20(ESR=3mohm typ/20 , ESL=0.6nH/20)
Option2:330U*6(ESR=1.5m ohm aggregate , ESL=1.8nH/6) and 22U*32(ESR=3mohm typ/32 , ESL=0.6nH/32)

10U_8

10U_8

C469

C469

10U_8

10U_8

C28

C28

10U_8

10U_8

C27

C27

10U_8

10U_8

C466

10U_8

10U_8

C463

C463

10U_8

10U_8

C470

C470

10U_8

10U_8

C458

C458

10U_8

10U_8

+

+

C13

C13

*330U_7343

*330U_7343

C461

C461

10U_8

10U_8

C474

C474

10U_8

10U_8

C462

C462

10U_8

10U_8

C24

C24

10U_8

10U_8

C473

C473

C472

C472

10U_8

10U_8

10U_8

10U_8

C19

C19

C464

C464

10U_8

10U_8

10U_8

10U_8

C467

C467

C30

C30

10U_8

10U_8

10U_8

10U_8

C457

C457

C26

C26

10U_8

10U_8

CH6102K9A01

CH6102K9A01

10U_8

10U_8

'CAP CHIP 10U 10V(+-10%,X5R,0805)'

'CAP CHIP 10U 10V(+-10%,X5R,0805)'

+

+

C29

C29

330U_7343

330U_7343

C471

C471

C477

C477

10U_8

10U_8

10U_8

10U_8

C23

C23

C20

C20

10U_8

10U_8

10U_8

10U_8

DESIGN GUIDE
CHANGE FROM 22UF *20 TO 10UF *32

C21

C21

10U_8

10U_8

C459

C459

10U_8

10U_8

4

C476

C476

10U_8

10U_8

C460

C460

10U_8

10U_8

U24C

U24C

A7

VCC[001]

A9

VCC[002]

A10

VCC[003]

A12

VCC[004]

A13

VCC[005]

A15

VCC[006]

A17

VCC[007]

A18

VCC[008]

A20

VCC[009]

B7

VCC[010]

B9

VCC[011]

B10

VCC[012]

B12

VCC[013]

B14

VCC[014]

B15

VCC[015]

B17

VCC[016]

B18

VCC[017]

B20

VCC[018]

C9

VCC[019]

C10

VCC[020]

C12

VCC[021]

C13

VCC[022]

C15

VCC[023]

C17

VCC[024]

C18

VCC[025]

D9

VCC[026]

D10

VCC[027]

D12

VCC[028]

D14

VCC[029]

D15

VCC[030]

D17

VCC[031]

D18

VCC[032]

E7

VCC[033]

E9

VCC[034]

E10

VCC[035]

E12

VCC[036]

E13

VCC[037]

E15

VCC[038]

E17

VCC[039]

E18

VCC[040]

E20

VCC[041]

F7

VCC[042]

F9

VCC[043]

F10

VCC[044]

F12

VCC[045]

F14

VCC[046]

F15

VCC[047]

F17

VCC[048]

F18

VCC[049]

F20

VCC[050]

AA7

VCC[051]

AA9

VCC[052]

AA10

VCC[053]

AA12

VCC[054]

AA13

VCC[055]

AA15

VCC[056]

AA17

VCC[057]

AA18

VCC[058]

AA20

VCC[059]

AB9

VCC[060]

AC10

VCC[061]

AB10

VCC[062]

AB12

VCC[063]

AB14

VCC[064]

AB15

VCC[065]

AB17

VCC[066]

AB18

VCC[067]

Merom Ball-out Rev 1a

Merom Ball-out Rev 1a

VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]

VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]

VCCA[01]
VCCA[02]

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

VCCSENSE

VSSSENSE

.

.

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

B26
C26

AD6
AF5
AE5
AF4
AE3
AF3
AE2

AF7

AE7

3

CPU_G21
CPU_V6

+VCCA_PROC

<CRB>
R for test only

R15 0_4R15 0_4
R12 0_4R12 0_4

H_VID0 [29]
H_VID1 [29]
H_VID2 [29]
H_VID3 [29]
H_VID4 [29]
H_VID5 [29]
H_VID6 [29]

2

<REV.NO. 0.5/REF.NO.19343>

Ivcc Max 52A

Ivccp Max 6A(VCCP supply before Vcc stable)
Max 2A(VCCP supply after Vcc stable)

Ivcca Max 130mA

+1.05V

C15

C15

C456

C16

C16

.1U_6

.1U_6

+1.05V

+

+

VCC_CORE

R2

100/F_6R2100/F_6

R3

100/F_6R3100/F_6

C36

C36

330U_7343

330U_7343

C18

C18

.1U_6

.1U_6

<Check list>
ESR=12m ohm

<CRB>
.01U near to B26 ball

C33

C33

.01U_4

.01U_4

C456

C17

C17

.1U_6

.1U_6

.1U_6

.1U_6

R22 0_6R22 0_6

C34

C34

10U_8

10U_8

VCCSENSE [29]

VSSSENSE [29]

.1U_6

.1U_6

+1.5V

C22

C22

.1U_6

.1U_6

1

U24D

U24D

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

AF2

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F8

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080]
VSS[081]P3VSS[162]

Merom Ball-out Rev 1a

Merom Ball-out Rev 1a

VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]

VSS[163]

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

.

.

A A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

CPU(2 of 2)

CPU(2 of 2)

CPU(2 of 2)

1

1A

1A

1A

of

of

of

433Friday, May 25, 2007

433Friday, May 25, 2007

433Friday, May 25, 2007

5

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

4

3

2

Date: Sheet

5

http://adf.ly/LOM1

4

3

2

1

NB(HOST)

U21A

M10
N12

P13

W10

W6
W9

W3

AD12

AE3
AD9
AC9

AC7
AC14
AD11
AC11

AB2

AD7

AB1

AC6

AE2

AC5

AG3

AJ9

AH8

AJ14

AE9
AE11
AH12

AJ5

AH5

AJ6

AE7

AJ7
AJ2

AE5

AJ3

AH2
AH13

W1
W2

E2

G2
G7
M6
H7
H3
G4

F3
N8
H2

N9
H5

K9
M2

Y8

V4
M3

J1
N5
N3

N2

Y7
Y9
P4

N1

Y3

B3

C2

B6
E5

B9
A9

U21A

H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63

H_SWING
H_RCOMP

H_SCOMP
H_SCOMP#

H_CPURST#
H_CPUSLP#

H_AVREF
H_DVREF

CRESTLINE_1p0

CRESTLINE_1p0

HOST

HOST

3

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8

H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35

H_ADS#
H_ADSTB#_0
H_ADSTB#_1

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HIT#

H_HITM#
H_LOCK#
H_TRDY#

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

H_REQ#_0
H_REQ#_1

H_REQ#_2
H_REQ#_3

H_REQ#_4

H_RS#_0
H_RS#_1
H_RS#_2

J13
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19

G12
H17
G20
C8
E8
F12
D6
C10
AM5
AM7
H8
K7
E4
C6
G10
B7

K5
L2
AD13
AE13

M7
K3
AD2
AH11

L7
K2
AC2
AJ10

M14
E13
A11
H13
B12

E12
D7
D8

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

H_D#[63:0][3]

+1.05V

R416

+1.05V

+1.05V

5

R416

221/F_4

221/F_4

R417

R417
100/F_4

100/F_4

R415

R415

24.9/F_4

24.9/F_4

R76

R76

54.9/F_4

54.9/F_4

R75

R75

54.9/F_4

54.9/F_4

H_SWING

H_RCOMP

H_SCOMP

H_SCOMP#

C436

C436

<check list>

0.1U close to B3

.1U_4

.1U_4

<check list>
10:20 mils(Width:Spacing)

<check list>
Impedance 55ohm

<check list>
Impedance 55ohm

+1.05V

R418

R418

1K_4

1K_4

R422

R422

2K_4

2K_4

C432

C432

.1U_4

.1U_4

H_CPURST#[3]

<check list>

0.1U close to B9

4

D D

C C

B B

A A

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_SWING
H_RCOMP

H_SCOMP
H_SCOMP#

H_AVREF

H_A#[35:3] [3]

H_A#[35:32] are not supported in
Calero Interposer
Crestline support 36 bit address

H_ADS# [3]
H_ADSTB0# [3]
H_ADSTB1# [3]
H_BNR# [3]
H_BPRI# [3]
H_BREQ#0 [3]
H_DEFER# [3]
H_DBSY# [3]
CLK_MCH_BCLK [2]
CLK_MCH_BCLK# [2]
H_DPWR# [3]
H_DRDY# [3]
H_HIT# [3]
H_HITM# [3]
H_LOCK# [3]
H_TRDY# [3]

H_DINV#[3:0] [3]

H_DSTBN#[3:0] [3]

H_DSTBP#[3:0] [3]

H_REQ#[4:0] [3]

H_RS#[2:0] [3]H_CPUSLP#[3]

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

GMCH HOST(1 of 7)

GMCH HOST(1 of 7)

GMCH HOST(1 of 7)

Date: Sheet

Date: Sheet

2

Date: Sheet

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

of

of

of

533Friday, May 25, 2007

533Friday, May 25, 2007

533Friday, May 25, 2007

1

1A

1A

1A

5

3

http://adf.ly/LOM1

MCH_RSVD1

T30T30

MCH_RSVD2

T32T32

MCH_RSVD3

T31T31

MCH_RSVD4

T28T28

MCH_RSVD5

T40T40

MCH_RSVD6

T41T41

MCH_RSVD7

T36T36

MCH_RSVD8

T37T37

MCH_RSVD9

T22T22

MCH_RSVD10

T39T39

MCH_RSVD11

T38T38

MCH_RSVD12

T35T35

MCH_RSVD13

M_RCOMP#

5

T34T34
T14T14

C41 .1U_4C41 .1U_4

T18T18
T125T125
T112T112
T113T113
T47T47
T51T51
T116T116
T53T53
T49T49
T50T50
T48T48
T46T46

T45T45
T44T44
T52T52
T141T141
T15T15
T132T132
T135T135
T142T142
T145T145
T129T129
T138T138
T131T131

T130T130
T134T134

T29T29
T19T19
T20T20

T33T33
T27T27

T13T13
T23T23

T26T26
T21T21

R50 0_4R50 0_4
R45 0_4R45 0_4

R38 0_4R38 0_4

R97 100_4R97 100_4
R64 *0_4R64 *0_4
R42 0_4R42 0_4

T122T122
T123T123
T120T120
T118T118
T114T114
T117T117
T115T115
T121T121
T124T124
T126T126
T139T139
T127T127
T128T128
T137T137
T136T136
T119T119

R102

R102

20_4

20_4

MCH_RSVD14

MCH_RSVD20
MCH_RSVD21
MCH_RSVD22
MCH_RSVD23
MCH_RSVD24
MCH_RSVD25
MCH_RSVD26
MCH_RSVD27
MCH_RSVD28
MCH_RSVD29
MCH_RSVD30
MCH_RSVD31

MCH_RSVD34
MCH_RSVD35
MCH_RSVD36
MCH_RSVD37
MCH_RSVD38
MCH_RSVD39
MCH_RSVD40
MCH_RSVD41
MCH_RSVD42
MCH_RSVD43
MCH_RSVD44
MCH_RSVD45

MCH_CFG_3
MCH_CFG_4

MCH_CFG_6
MCH_CFG_7
MCH_CFG_8

MCH_CFG_10
MCH_CFG_11

MCH_CFG_14
MCH_CFG_15

MCH_CFG_17
MCH_CFG_18

PM_BMBUSY#_R
ICH_DPRSTP#_R

PM_EXTTS#0

PM_EXTTS#1_R

RST_IN#_MCH
PM_THRMTRIP#_GMCH
PM_DPRSLPVR_GMCH

TP_MCH_NC1
TP_MCH_NC2
TP_MCH_NC3
TP_MCH_NC4
TP_MCH_NC5
TP_MCH_NC6
TP_MCH_NC7
TP_MCH_NC8
TP_MCH_NC9
TP_MCH_NC10
TP_MCH_NC11
TP_MCH_NC12
TP_MCH_NC13
TP_MCH_NC14
TP_MCH_NC15
TP_MCH_NC16

+1.8VSUS

M_RCOMP

D D

M_A_A14[12,13]
M_B_A14[12,13]

C C

MCH_BSEL0[2]
MCH_BSEL1[2]
MCH_BSEL2[2]

MCH_CFG_5[11]

MCH_CFG_9[11]

MCH_CFG_12[11]
MCH_CFG_13[11]

MCH_CFG_16[11]

MCH_CFG_19[11]
MCH_CFG_20[11]

B B

,16,29]

A A

PM_BMBUSY#[16]
ICH_DPRSTP#[3,14,29]
PM_EXTTS#0[13]

PM_EXTTS#1[13]

DELAY_VR_PWRGOOD

PLTRST#_NB[15]

PM_THRMTRIP#[3,14]

PM_DPRSLPVR[16,29]

R105

R105

20_4

20_4

AR12
AR13

AM12

AN13

AR37

AM36

AL36

AM37

BJ20
BK22
BF19
BH20
BK18

BJ18
BF23
BG23
BC23
BD24

BJ29
BE24
BH39

AW20

BK20

AW49

AV20

BJ51
BK51
BK50

BL50

BL49

P36
P37
R35
N35

J12

D20

H10
B51

C48
D47
B44
C44
A35
B37
B36
B34
C34

P27
N27
N24
C21
C23
F23
N23

G23

J20
C20
R24

L23

J23
E23
E20
K23
M20
M24

L32

N33

L35

G41

L39

L36

J36

N20
G36

BL3
BL2
BK1

BJ1

E1

A5
C51
B50
A50
A49
BK2

U21B

U21B

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14

RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD36
RSVD37
RSVD38
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45

CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20

PM_BM_BUSY#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16

CRESTLINE_1p0

CRESTLINE_1p0

+3V

4

SM_CK_0
SM_CK_1
SM_CK_3
SM_CK_4

SM_CK#_0
SM_CK#_1
SM_CK#_3

SM_CK#_4

SM_CKE_0
SM_CKE_1
SM_CKE_3
SM_CKE_4

SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3

SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH
SM_RCOMP_VOL

SM_VREF_0

DDR MUXINGCLK

DDR MUXINGCLK

SM_VREF_1

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK

PEG_CLK#

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2

CFGRSVD

CFGRSVD

PM

PM

NC

NC

R44 10K_4R44 10K_4

R39 10K_4R39 10K_4

R32 10K_4R32 10K_4

DMI_TXN_3

DMI_TXP_0
DMI_TXP_1

DMI

DMI

DMI_TXP_2
DMI_TXP_3

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3

GFX_VR_EN

GRAPHICS VID

GRAPHICS VID

CL_CLK

CL_DATA

CL_PWROK

CL_RST#
CL_VREF

ME

ME

SDVO_CTRL_CLK

SDVO_CTRL_DATA

CLK_REQ#

ICH_SYNC#

MISC

MISC

TEST_1
TEST_2

CLK_MCH_OE#

PM_EXTTS#0

PM_EXTTS#1

4

AV29
BB23
BA25
AV23

AW30
BA23
AW25
AW23

BE29
AY32
BD39
BG37

BG20
BK16
BG16
BE13

BH18
BJ15
BJ14
BE16

BL15
BK14

BK31
BL31

AR49
AW4

B42
C42
H48
H47

K44
K45

DMI_TXN0

AN47

DMI_TXN1

AJ38

DMI_TXN2

AN42

DMI_TXN3

AN46

DMI_TXP0

AM47

DMI_TXP1

AJ39

DMI_TXP2

AN41

DMI_TXP3

AN45

DMI_RXN0

AJ46

DMI_RXN1

AJ41

DMI_RXN2

AM40

DMI_RXN3

AM44

DMI_RXP0

AJ47

DMI_RXP1

AJ42

DMI_RXP2

AM39

DMI_RXP3

AM43

E35
A39
C38
B39
E36

AM49
AK50
AT43
AN49

+1.25V_CL_VREF

AM50

H35
K36

CLK_MCH_OE#

G39
G40

GMCH_TEST1

A37

GMCH_TEST2

R32

M_RCOMP
M_RCOMP#

SM_RCOMP_VOH
SM_RCOMP_VOL

SMDDR_VREF_MCH

R107 *10K_6R107 *10K_6
R98 *10K_6R98 *10K_6

DREFCLK
DREFCLK#
DREFSSCLK
DREFSSCLK#

T16T16
T144T144
T133T133
T140T140
T143T143

M_CLK_DDR0 [13]
M_CLK_DDR1 [13]
M_CLK_DDR3 [13]
M_CLK_DDR4 [13]

M_CLK_DDR#0 [13]
M_CLK_DDR#1 [13]
M_CLK_DDR#3 [13]
M_CLK_DDR#4 [13]

M_CKE0 [12,13]
M_CKE1 [12,13]
M_CKE3 [12,13]
M_CKE4 [12,13]

M_CS#0 [12,13]
M_CS#1 [12,13]
M_CS#2 [12,13]
M_CS#3 [12,13]

M_ODT0 [12,13]
M_ODT1 [12,13]
M_ODT2 [12,13]
M_ODT3 [12,13]

DREFCLK [2]
DREFCLK# [2]
DREFSSCLK [2]
DREFSSCLK# [2]

CLK_PCIE_3GPLL [2]
CLK_PCIE_3GPLL# [2]

DMI_TXN[3:0] [15]

DMI_TXP[3:0] [15]

DMI_RXN[3:0] [15]

DMI_RXP[3:0] [15]

CL_CLK0 [16]

CL_DATA0 [16]
MPWROK [16]
CL_RST#0 [16]

T17T17
T24T24

CLK_MCH_OE# [2]
MCH_ICH_SYNC# [16]

R428 0_4R428 0_4
R70 20K_4R70 20K_4

SMDDR_VREF

R108 0_6R108 0_6

3

+1.8VSUS

R419 1.3K_6R419 1.3K_6

+1.25V_AXD

R84

R84

1K_4

1K_4

C67

C67

R83

R83

.1U_4

.1U_4

392_6

392_6

3

INT_LVDS_PWM[18]
INT_LVDS_BLON[18,26]

INT_LVDS_EDIDCLK[18]
INT_LVDS_EDIDDATA[18]
INT_LVDS_DIGON[18]

INT_TXLCLKOUT-[18]
INT_TXLCLKOUT+[18]

INT_TXLOUT0-[18]
INT_TXLOUT1-[18]
INT_TXLOUT2-[18]

INT_TXLOUT0+[18]
INT_TXLOUT1+[18]
INT_TXLOUT2+[18]

CRT_B[18]

CRT_G[18]

CRT_R[18]

DDCCLK[18]
DDCDAT[18]

HSYNC[18]

VSYNC[18]

R46 150_4R46 150_4

R52 150_4R52 150_4

R49 150_4R49 150_4

+1.8VSUS

+3V

R57 2.4K_4R57 2.4K_4

R34 *0_4R34 *0_4
R37 *0_4R37 *0_4

DDCCLK
DDCDAT

R41 30_4R41 30_4

R40 30_4R40 30_4

R106 1K_4R106 1K_4

R414 10K_4R414 10K_4
R429 10K_4R429 10K_4

LVDS_IBG

T25T25

CRT_B

CRT_G

CRT_R

HSYNC_A
CRTIREF
VSYNC_A

CRT_B

CRT_G

CRT_R

R104

R104

3.01K_4

3.01K_4

R103

R103

1K_4

1K_4

2

U21C

U21C

J40

L_BKLT_CTRL

H39

L_BKLT_EN

E39

L_CTRL_CLK

E40

L_CTRL_DATA

C37

L_DDC_CLK

D35

L_DDC_DATA

K40

L_VDD_EN

L41

LVDS_IBG

L43

LVDS_VBG

N41

LVDS_VREFH

N40

LVDS_VREFL

D46

LVDSA_CLK#

C45

LVDSA_CLK

D44

LVDSB_CLK#

E42

LVDSB_CLK

G51

LVDSA_DATA#_0

E51

LVDSA_DATA#_1

F49

LVDSA_DATA#_2

G50

LVDSA_DATA_0

E50

LVDSA_DATA_1

F48

LVDSA_DATA_2

G44

LVDSB_DATA#_0

B47

LVDSB_DATA#_1

B45

LVDSB_DATA#_2

E44

LVDSB_DATA_0

A47

LVDSB_DATA_1

A45

LVDSB_DATA_2

E27

TVA_DAC

G27

TVB_DAC

K27

TVC_DAC

F27

TVA_RTN

J27

TVB_RTN

L27

TVC_RTN

M35

TV_DCONSEL_0

P33

TV_DCONSEL_1

H32

CRT_BLUE

G32

CRT_BLUE#

K29

CRT_GREEN

J29

CRT_GREEN#

F29

CRT_RED

E29

CRT_RED#

K33

CRT_DDC_CLK

G35

CRT_DDC_DATA

F33

CRT_HSYNC

C32

CRT_TVO_IREF

E33

CRT_VSYNC

CRESTLINE_1p0

CRESTLINE_1p0

SM_RCOMP_VOH

C93

C93

.01U_4

.01U_4

SM_RCOMP_VOL

C97

C97

.01U_4

.01U_4

2

C95

C95

2.2U_6

2.2U_6

C98

C98

2.2U_6

2.2U_6

1

+VCC_PEG

EXP_A_COMPX

N43

PEG_COMPI

PEG_COMPO

LVDS

LVDS

TV VGA

TV VGA

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15

PCI-EXPRESS GRAPHICS

PCI-EXPRESS GRAPHICS

GMCH DMI/VIDEO(2 of 7)

GMCH DMI/VIDEO(2 of 7)

GMCH DMI/VIDEO(2 of 7)

M43

J51

PEG_RX#_0

L51

PEG_RX#_1

N47

PEG_RX#_2

T45

PEG_RX#_3

T50

PEG_RX#_4

U40

PEG_RX#_5

Y44

PEG_RX#_6

Y40

PEG_RX#_7

AB51

PEG_RX#_8

W49

PEG_RX#_9

AD44
AD40
AG46
AH49
AG45
AG41

J50

PEG_RX_0

L50

PEG_RX_1

M47

PEG_RX_2

U44

PEG_RX_3

T49

PEG_RX_4

T41

PEG_RX_5

W45

PEG_RX_6

W41

PEG_RX_7

AB50

PEG_RX_8

Y48

PEG_RX_9

AC45

PEG_RX_10

AC41

PEG_RX_11

AH47

PEG_RX_12

AG49

PEG_RX_13

AH45

PEG_RX_14

AG42

PEG_RX_15

N45

PEG_TX#_0

U39

PEG_TX#_1

U47

PEG_TX#_2

N51

PEG_TX#_3

R50

PEG_TX#_4

T42

PEG_TX#_5

Y43

PEG_TX#_6

W46

PEG_TX#_7

W38

PEG_TX#_8

AD39

PEG_TX#_9

AC46

PEG_TX#_10

AC49

PEG_TX#_11

AC42

PEG_TX#_12

AH39

PEG_TX#_13

AE49

PEG_TX#_14

AH44

PEG_TX#_15

M45

PEG_TX_0

T38

PEG_TX_1

T46

PEG_TX_2

N50

PEG_TX_3

R51

PEG_TX_4

U43

PEG_TX_5

W42

PEG_TX_6

Y47

PEG_TX_7

Y39

PEG_TX_8

AC38

PEG_TX_9

AD47

PEG_TX_10

AC50

PEG_TX_11

AD43

PEG_TX_12

AG39

PEG_TX_13

AE50

PEG_TX_14

AH43

PEG_TX_15

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

1

R67 24.9_4R67 24.9_4

of

of

of

633Friday, May 25, 2007

633Friday, May 25, 2007

633Friday, May 25, 2007

1A

1A

1A

5

http://adf.ly/LOM1

NB(Memory controller)

4

3

2

1

M_A_DQ[63:0][13]

D D

C C

B B

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

AR43

AW44

BA45
AY46
AR41
AR45
AT42

AW47

BB45
BF48
BG47

BJ45
BB47
BG50
BH49
BE45

AW43

BE44
BG42
BE40
BF44
BH45
BG40
BF40
AR40

AW40

AT39

AW36
AW41

AY41
AV38
AT38
AV13
AT13

AW11

AV11
AU15
AT11
BA13
BA11
BE10
BD10

BD8
AY9

BG10

AW9

BD7
BB9
BB5
AY7
AT5
AT7
AY6
BB7
AR5
AR8
AR9
AN3

AM8
AN10

AT9
AN9

AM9
AN11

U21D

U21D

SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63

CRESTLINE_1p0

CRESTLINE_1p0

BB19

SA_BS_0

BK19

SA_BS_1

BF29

SA_BS_2

BL17

SA_CAS#

SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6

SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8

SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13

SA_RAS#

SA_RCVEN#

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_WE#

AT45
BD44
BD42
AW38
AW13
BG8
AY5
AN6

AT46
BE48
BB43
BC37
BB16
BH6
BB2
AP3
AT47
BD47
BC41
BA37
BA16
BH7
BC1
AP2

BJ19
BD20
BK27
BH28
BL24
BK28
BJ27
BJ25
BL28
BA28
BC19
BE28
BG30
BJ16

BE18
AY20

BA19

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13

TP_SA_RCVEN#

M_A_BS#0 [12,13]
M_A_BS#1 [12,13]
M_A_BS#2 [12,13]
M_A_CAS# [12,13]

M_A_DM[7:0] [13]

M_A_DQS[7:0] [13]

M_A_DQS#[7:0] [13]

M_A_A[13:0] [12,13]

M_A_RAS# [12,13]

T43T43

M_A_WE# [12,13]

M_B_DQ[63:0][13]

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

AP49

AR51
AW50
AW51

AN51

AN50

AV50

AV49

BA50

BB50

BA49

BE50

BA51

AY49

BF50

BF49

BJ50
BJ44

BJ43
BL43
BK47
BK49
BK43
BK42

BJ41
BL41

BJ37

BJ36
BK41

BJ40
BL35
BK37
BK13
BE11
BK11
BC11
BC13
BE12
BC12
BG12

BJ10

BK5
BL5
BK9

BK10

BF4
BH5
BG1
BC2
BK3
BE4
BD3

BA3
BB3
AR1
AT3
AY2
AY3
AU2
AT2

BL9

BJ8
BJ6

BJ2

U21E

U21E

SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63

CRESTLINE_1p0

CRESTLINE_1p0

AY17

SB_BS_0

BG18

SB_BS_1

BG36

SB_BS_2

BE17

SB_CAS#

SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6

SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8

SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13

SB_RAS#

SB_RCVEN#

SB_WE#

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

AR50
BD49
BK45
BL39
BH12
BJ7
BF3
AW2

AT50
BD50
BK46
BK39
BJ12
BL7
BE2
AV2
AU50
BC50
BL45
BK38
BK12
BK7
BF2
AV3

BC18
BG28
BG25
AW17
BF25
BE25
BA29
BC28
AY28
BD37
BG17
BE37
BA39
BG13

AV16
AY18

BC17

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13

TP_SB_RCVEN#

M_B_BS#0 [12,13]
M_B_BS#1 [12,13]
M_B_BS#2 [12,13]
M_B_CAS# [12,13]

M_B_DM[7:0] [13]

M_B_DQS[7:0] [13]

M_B_DQS#[7:0] [13]

M_B_A[13:0] [12,13]

M_B_RAS# [12,13]

T42T42

M_B_WE# [12,13]

A A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

PROJECT : BU1 Santa Rosa

MCH DDR(3 of 7)

MCH DDR(3 of 7)

MCH DDR(3 of 7)

1

1A

1A

1A

of

of

of

733Friday, May 25, 2007

733Friday, May 25, 2007

733Friday, May 25, 2007

5

http://adf.ly/LOM1

NB(Power-1)

+1.05V

U21G

U21G

AT35

VCC_1

AT34

VCC_2

AH28

VCC_3

AC32

VCC_5

+1.8VSUS

+1.05V

AC31
AK32

AJ31

AJ28
AH32
AH31
AH29

AF32

R30

AU32
AU33
AU35
AV33
AW33
AW35
AY35
BA32
BA33
BA35
BB33
BC32
BC33
BC35
BD32
BD35
BE32
BE33
BE35

BF33

BF34
BG32
BG33
BG35
BH32
BH34
BH35

BJ32

BJ33

BJ34
BK32
BK33
BK34
BK35

BL33
AU30

R20

T14
W13
W14

Y12

AA20
AA23
AA26
AA28
AB21
AB24
AB29
AC20
AC21
AC23
AC24
AC26
AC28
AC29
AD20
AD23
AD24
AD28

AF21

AF26
AA31
AH20
AH21
AH23
AH24
AH26
AD31

AJ20
AN14

VCC_4
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12

VCC_13

VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36

VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34

CRESTLINE_1p0

CRESTLINE_1p0

D D

R69 0_4R69 0_4

+1.8VSUS

C89

C89

.1U_4

.1U_4

C C

B B

A A

5

+1.05V_VCC_GMCH_VCC13

C102

C102

C108

C108

22U_8

22U_8

22U_8

22U_8

4

VCC CORE

VCC CORE

POWER

POWER

VCC SMVCC GFX

VCC SMVCC GFX

4

VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8

VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54

VCC GFX NCTF

VCC GFX NCTF

VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60
VCC_AXG_NCTF_61
VCC_AXG_NCTF_62
VCC_AXG_NCTF_63
VCC_AXG_NCTF_64
VCC_AXG_NCTF_65
VCC_AXG_NCTF_66
VCC_AXG_NCTF_67
VCC_AXG_NCTF_68
VCC_AXG_NCTF_69
VCC_AXG_NCTF_70
VCC_AXG_NCTF_71
VCC_AXG_NCTF_72
VCC_AXG_NCTF_73
VCC_AXG_NCTF_74
VCC_AXG_NCTF_75
VCC_AXG_NCTF_76
VCC_AXG_NCTF_77
VCC_AXG_NCTF_78
VCC_AXG_NCTF_79
VCC_AXG_NCTF_80
VCC_AXG_NCTF_81
VCC_AXG_NCTF_82
VCC_AXG_NCTF_83

VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7

VCC SM LF

VCC SM LF

T17
T18
T19
T21
T22
T23
T25
U15
U16
U17
U19
U20
U21
U23
U26
V16
V17
V19
V20
V21
V23
V24
Y15
Y16
Y17
Y19
Y20
Y21
Y23
Y24
Y26
Y28
Y29
AA16
AA17
AB16
AB19
AC16
AC17
AC19
AD15
AD16
AD17
AF16
AF19
AH15
AH16
AH17
AH19
AJ16
AJ17
AJ19
AK16
AK19
AL16
AL17
AL19
AL20
AL21
AL23
AM15
AM16
AM19
AM20
AM21
AM23
AP15
AP16
AP17
AP19
AP20
AP21
AP23
AP24
AR20
AR21
AR23
AR24
AR26
V26
V28
V29
Y31

AW45
BC39
BE39
BD17
BD4
AW8
AT6

+1.05V

VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7

3

R61 10_4R61 10_4

+1.05V

C82

C82

.1U_4

.1U_4

3

VCCGFPLLOW

ADD 10ohm
THEY ONLY USE IN UMA (GM OR GML)

+1.05V

330U_3528

330U_3528

+

+

C413

C413

330U_3528

330U_3528

C84

C84

C90

C90

.1U_4

.1U_4

.22U_4

.22U_4

D4 PDZ5.6BD4 PDZ5.6B

+

+

C423

C423

C74

C74

C59

C59

22U_8

22U_8

.22U_4

.22U_4

+

+

C417

C417

C81

C81

C61

+1.05V

C88

C88

.22U_4

.22U_4

.47U_6

.47U_6

C66

C66

22U_8

22U_8

C61

1U_6

1U_6

C92

C92

.47U_6

.47U_6

330U_3528

330U_3528

21

C70

C70

.22U_4

.22U_4

C73

C73

.22U_4

.22U_4

C57

C57

10U_8

10U_8

C86

C86

1U_6

1U_6

C71

C71

.22U_4

.22U_4

C63

C63

.1U_4

.1U_4

C58

C58

22U_8

22U_8

C85

C85

1U_6

1U_6

2

C62

C62

.1U_4

.1U_4

2

+1.05V+3V_VCCSYNC

U21F

U21F

AB33

VCC_NCTF_1

AB36

VCC_NCTF_2

AB37

VCC_NCTF_3

AC33

VCC_NCTF_4

AC35

VCC_NCTF_5

AC36

VCC_NCTF_6

AD35

VCC_NCTF_7

AD36

VCC_NCTF_8

AF33

VCC_NCTF_9

AF36

VCC_NCTF_10

AH33

VCC_NCTF_11

AH35

VCC_NCTF_12

AH36

VCC_NCTF_13

AH37

VCC_NCTF_14

AJ33

VCC_NCTF_15

AJ35

VCC_NCTF_16

AK33

VCC_NCTF_17

AK35

VCC_NCTF_18

AK36

VCC_NCTF_19

AK37

VCC_NCTF_20

AD33

VCC_NCTF_21

AJ36

VCC_NCTF_22

AM35

VCC_NCTF_23

AL33

C76

C76

.1U_4

.1U_4

C69

C69

.1U_4

.1U_4

C60

C60

.1U_4

.1U_4

C64

C64

.1U_4

.1U_4

VCC_NCTF_24

AL35

VCC_NCTF_25

AA33

VCC_NCTF_26

AA35

VCC_NCTF_27

AA36

VCC_NCTF_28

AP35

VCC_NCTF_29

AP36

VCC_NCTF_30

AR35

VCC_NCTF_31

AR36

VCC_NCTF_32

Y32

VCC_NCTF_33

Y33

VCC_NCTF_34

Y35

VCC_NCTF_35

Y36

VCC_NCTF_36

Y37

VCC_NCTF_37

T30

VCC_NCTF_38

T34

VCC_NCTF_39

T35

VCC_NCTF_40

U29

VCC_NCTF_41

U31

VCC_NCTF_42

U32

VCC_NCTF_43

U33

VCC_NCTF_44

U35

VCC_NCTF_45

U36

VCC_NCTF_46

V32

VCC_NCTF_47

V33

VCC_NCTF_48

V36

VCC_NCTF_49

V37

VCC_NCTF_50

AL24

VCC_AXM_NCTF_1

AL26

VCC_AXM_NCTF_2

AL28

VCC_AXM_NCTF_3

AM26

VCC_AXM_NCTF_4

AM28

VCC_AXM_NCTF_5

AM29

VCC_AXM_NCTF_6

AM31

VCC_AXM_NCTF_7

AM32

VCC_AXM_NCTF_8

AM33

VCC_AXM_NCTF_9

AP29

VCC_AXM_NCTF_10

AP31

VCC_AXM_NCTF_11

AP32

VCC_AXM_NCTF_12

AP33

VCC_AXM_NCTF_13

AL29

VCC_AXM_NCTF_14

AL31

VCC_AXM_NCTF_15

AL32

VCC_AXM_NCTF_16

AR31

VCC_AXM_NCTF_17

AR32

VCC_AXM_NCTF_18

AR33

VCC_AXM_NCTF_19

CRESTLINE_1p0

CRESTLINE_1p0

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

GMCH Power-1(4 of 7)

GMCH Power-1(4 of 7)

GMCH Power-1(4 of 7)

Date: Sheet

Date: Sheet

Date: Sheet

POWER

POWER

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

1

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8

VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15

VSS NCTF

VSS NCTF

VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21

VCC NCTF

VCC NCTF

VSS_SCB1
VSS_SCB2
VSS_SCB3
VSS_SCB4
VSS_SCB5
VSS_SCB6

VSS SCBVCC AXM

VSS SCBVCC AXM

VCC_AXM_1
VCC_AXM_2
VCC_AXM_3
VCC_AXM_4
VCC_AXM_5
VCC_AXM_6
VCC_AXM_7

VCC AXM NCTF

VCC AXM NCTF

1

T27
T37
U24
U28
V31
V35
AA19
AB17
AB35
AD19
AD37
AF17
AF35
AK17
AM17
AM24
AP26
AP28
AR15
AR19
AR28

A3
B2
C1
BL1
BL51
A51

+1.05V

R89

R89

0_6

0_6

AT33
AT31
AK29
AK24
AK23
AJ26
AJ23

1A

1A

1A

of

of

of

833Friday, May 25, 2007

833Friday, May 25, 2007

833Friday, May 25, 2007

5

http://adf.ly/LOM1

NB(Power-2)

+1.25V

D D

+1.25V

+1.25V

C C

+3V

B B

+1.5V

A A

L1 10UH_8L1 10UH_8

L2 10UH_8L2 10UH_8

L28

L28
PBY160808T-301Y-N_6

PBY160808T-301Y-N_6

C445

C445

C449

C449

22U_8

22U_8

10U_8

10U_8

R30 0_6R30 0_6

+

+

C39

C39

C451

C451

.1U_4

.1U_4

470U_7343

470U_7343

+

+

C452

C452

C44

C44

470U_7343

470U_7343

.1U_4

.1U_4

L23 PBY160808T-301Y-N_6L23 PBY160808T-301Y-N_6

L24 PBY160808T-301Y-N_6L24 PBY160808T-301Y-N_6

C409 22U_8C409 22U_8

5

V1.25M_MPLL_RC

+1.25V

+3V_TV_DAC

C433

C433

.1U_4

.1U_4

C441

C441

.1U_4

.1U_4

C439

C439

.1U_4

.1U_4

C47

C47

.1U_4

.1U_4

R29 100/F_6R29 100/F_6

C399

C399

+

+

100U_3528

100U_3528

C447

C447

22N_4

22N_4

C444

C444

22N_4

22N_4

C431

C431

22N_4

22N_4

C38

C38

22N_4

22N_4

C50

C50

.1U_4

.1U_4

R33 0_6R33 0_6

+3V

<FAE>
INT VGA disable
VCCSYNC connect to GND

L29 PBY160808T-301Y-N_6L29 PBY160808T-301Y-N_6

+3V

R110 0_6R110 0_6

R413

R413

*0_4

*0_4

R427

R427

*0_4

*0_4

R423

R423

*0_4

*0_4

C37

C37

22N_4

22N_4

R426 0_6R426 0_6

C72

C72

.1U_4

.1U_4

C75

C75

.1U_4

.1U_4

C49

C49

1U_6

1U_6

+3V_TV_DAC

C410

C410

22U_8

22U_8

R403

R403

0.5_6

0.5_6

R118 0_6R118 0_6

+1.25V

C103

C103

*22U_8

*22U_8

4

+3V_VCCSYNC

C45

C45

.1U_4

.1U_4

C430

C430

C446

C446

.1U_4

.1U_4

*22U_8

*22U_8

C429

C429

.1U_4

.1U_4

R53 0_8R53 0_8

+3V

C79

C79

4.7U_6

4.7U_6

C106

C106

C105

C105

*1U_6

*1U_6

*1U_6

*1U_6

R60 *0_4R60 *0_4

R31 0_6R31 0_6

R92 0_6R92 0_6

+1.25V

L3 PBY160808T-301Y-N_6L3 PBY160808T-301Y-N_6

+1.25V

+V1.25S_PEGPLL_FB

C40

C40

10U_8

10U_8

R420 0_6R420 0_6

+1.8VSUS

4

C110

C110

22U_8

22U_8

C107

C107

22U_8

22U_8

C448

C448

22N_4

22N_4

C438

C438

22N_4

22N_4

C80

C80

1U_6

1U_6

C87

C87

.1U_4

.1U_4

C435

C435

1000P_4

1000P_4

C48

C48

.1U_4

.1U_4

C78

C78

.1U_4

.1U_4

R43

R43

1_8

1_8

C46

C46

1U_6

1U_6

R421

R421

*0_4

*0_4

+3V_VCCA_CRT_DAC

R425

R425

*0_4

*0_4

+3V_VCCA_DAC_BG

+1.25V_VCCA_DPLLA

+1.25V_VCCA_DPLLB

+1.25VM_VCCA_HPLL

+1.25VM_VCCA_MPLL

+1.8VSUS_VCC_TX_LVDS

+3V_VCCA_PEG_BG

+1.25V_VCCD_PEG_PLL

+1.25VM_VCCA_SM

+1.25VM_VCCA_SM_CK

+1.5V_VCCD_CRT
+1.5V_VCCD_TVDAC

+1.5V_VCCD_QDAC

+1.25VM_MCH_VCCD_HPLL

+1.25V_VCCD_PEG_PLL

C55

C55

.1U_4

.1U_4

+1.8V_VCCD_LVDS

C440

C440

*10U_8

*10U_8

3

CRT/TV Disable/Enable guideline

EnableBall EnableDisable DisableBall

VCCA_CRT

3.3V GND

VCCD_CRT

VCCDQ_CRT

1.5V

VCCA_A_TVO

3.3V

VCCA_B_TVO VCC_SYNC

3.3V

AW18

AV19
AU19
AU18
AU17

AT22
AT21
AT19
AT18
AT17
AR17
AR16

BC29
BB29

C54

C54

.1U_4

.1U_4

GND

GND

GND

GND

U21H

U21H

J32

VCCSYNC

A33

VCCA_CRT_DAC_1

B33

VCCA_CRT_DAC_2

A30

VCCA_DAC_BG

B32

VSSA_DAC_BG

B49

VCCA_DPLLA

H49

VCCA_DPLLB

AL2

VCCA_HPLL

AM2

VCCA_MPLL

A41

VCCA_LVDS

B41

VSSA_LVDS

K50

VCCA_PEG_BG

K49

VSSA_PEG_BG

U51

VCCA_PEG_PLL

VCCA_SM_1
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5

VCCA_SM_7
VCCA_SM_8
VCCA_SM_9
VCCA_SM_10
VCCA_SM_11
VCCA_SM_NCTF_1
VCCA_SM_NCTF_2

VCCA_SM_CK_1
VCCA_SM_CK_2

C25

VCCA_TVA_DAC_1

B25

VCCA_TVA_DAC_2

C27

VCCA_TVB_DAC_1

B27

VCCA_TVB_DAC_2

B28

VCCA_TVC_DAC_1

A28

VCCA_TVC_DAC_2

M32

VCCD_CRT

L29

VCCD_TVDAC

N28

VCCD_QDAC

AN2

VCCD_HPLL

U48

VCCD_PEG_PLL

J41

VCCD_LVDS_1

H42

VCCD_LVDS_2

CRESTLINE_1p0

CRESTLINE_1p0

VCCA_C_TVO

VCCD_TVO

VCCABG_DAC

VSSABG_DAC

+1.05V

+3V

3

3.3V

1.5V1.5V

3.3V

GND

3.3V

CRTPLLA PEGA SMTV

CRTPLLA PEGA SMTV

POWER

POWER

A CK A LVDS

A CK A LVDS

D TV/CRTLVDS

D TV/CRTLVDS

D26 PDZ5.6BD26 PDZ5.6B

2 1

<CRB>
+1.25V AND +1.25M shall be
+1.5V for Calero Interposer

GND

1.5V

GND

GND

GND

AXD

AXD

VCC_AXD_NCTF

AXF

AXF

VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4

SM CK

SM CK

VCC_TX_LVDS

PEG

PEG

VCC_RXR_DMI_1
VCC_RXR_DMI_2

DMI

DMI

VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8

VTT_9
VTT_10
VTT_11
VTT_12
VTT_13

VTT

VTT

VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22

VCC_AXD_1
VCC_AXD_2
VCC_AXD_3
VCC_AXD_4
VCC_AXD_5
VCC_AXD_6

VCC_AXF_1
VCC_AXF_2
VCC_AXF_3

VCC_DMI

VCC_HV_1
VCC_HV_2

HV

HV

VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5

VTTLF1
VTTLF2
VTTLF3

VTTLF

VTTLF

U13
U12
U11
U9
U8
U7
U5
U3
U2
U1
T13
T11
T10
T9
T7
T6
T5
T3
T2
R3
R2
R1

AT23
AU28
AU24
AT29
AT25
AT30

AR29

B23
B21
A21

AJ50

BK24
BK23
BJ24
BJ23

A43

C40
B40

AD51
W50
W51
V49
V50

AH50
AH51

A7
F2
AH1

+1.05V_SD

2

+1.05V

+1.25V_AXD

+1.25V_VCC_AXF

+1.25V_VCC_DMI

+1.8VSUS_VCC_SM_CK

+1.8VSUS_VCC_TX_LVDS

+3V_VCC_HV

C42

C42

C65

C65

.47U_4

.47U_4

.47U_4

.47U_4

R436

R436

10_4

10_4

R433 0_4R433 0_4

2

LVDS Disable/Enable guideline

External VGA with EV@part,Internal VGA with IV@ part

Signal

VCCD_LVDS

VCCA_LVDS

VCCTX_LVDS

C437

C437

.47U_4

.47U_4

C53

C53

4.7U_8

4.7U_8

C83

C83

1U_6

1U_6

C94

C94

.1U_4

.1U_4

+3V_VCC_HV

C453

C453

.1U_4

.1U_4

If SDVO Disable
LVDS Disable

GND

GND

EXTERNAL INTERNAL

C51

C51

4.7U_8

4.7U_8

R93 0_6R93 0_6

C77

C77

*22U_8

*22U_8

C443

C443

1U_6

1U_6

C68

C68

.1U_4

.1U_4

C96

C96

22U_8

22U_8

+VCC_PEG

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

If SDVO enable
LVDS Disable

1.8V

GND

GNDGND

C52

C52

C56

C56

2.2U_8

2.2U_8

.47U_6

.47U_6

R424 0_6R424 0_6

C442

C442

10U_8

10U_8

R91 0_6R91 0_6

L5 1UH_8L5 1UH_8

R109 1_6R109 1_6

+

+

C405

C405

10U_8

10U_8

330U_3528

330U_3528

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

GMCH Power-2(5 of 7)

GMCH Power-2(5 of 7)

GMCH Power-2(5 of 7)

+

+

C421

C421

330U_3528

330U_3528

+1.25V

+V1.8_SMCK_RC

C434

C434

1000P_4

1000P_4

L22 91nHL22 91nH

C400

C400

1

If SDVO enable
LVDS enable

1.8V

1.8V

1.8V

+1.05V

+1.25V

+1.25V

+1.8VSUS

C119 22U_8C119 22U_8

L27 1UH_8L27 1UH_8

+

+

C450

C450

220U_7343

220U_7343

<FAE>
VCC_RXR_DMI and VCC_PEG
connect to+1.05V

1

+1.8VSUS

+1.05V

of

of

of

933Friday, May 25, 2007

933Friday, May 25, 2007

933Friday, May 25, 2007

1A

1A

1A

5

http://adf.ly/LOM1

4

3

2

1

NB(Power-3)

U21I

U21I

A13

VSS_1

A15

VSS_2

A17

VSS_3

A24

VSS_4

AA21

VSS_5

AA24

VSS_6

AA29

VSS_7

AB20

D D

C C

B B

A A

5

AB23
AB26
AB28
AB31
AC10
AC13

AC3
AC39
AC43
AC47

AD1
AD21
AD26
AD29

AD3
AD41
AD45
AD49

AD5
AD50

AD8
AE10
AE14

AE6

AF20
AF23
AF24
AF31

AG2
AG38
AG43
AG47
AG50

AH3
AH40
AH41

AH7

AH9

AJ11
AJ13
AJ21
AJ24
AJ29
AJ32
AJ43
AJ45

AJ49
AK20
AK21
AK26
AK28
AK31
AK51

AM11
AM13

AM3

AM4
AM41
AM45

AN1
AN38
AN39
AN43

AN5

AN7

AP4
AP48
AP50
AR11

AR2
AR39
AR44
AR47

AR7

AT10
AT14
AT41
AT49

AU1
AU23
AU29

AU3
AU36
AU49
AU51
AV39
AV48

AW1
AW12
AW16

AL1

VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99

CRESTLINE_1p0

CRESTLINE_1p0

VSS

VSS

VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198

AW24
AW29
AW32
AW5
AW7
AY10
AY24
AY37
AY42
AY43
AY45
AY47
AY50
B10
B20
B24
B29
B30
B35
B38
B43
B46
B5
B8
BA1
BA17
BA18
BA2
BA24
BB12
BB25
BB40
BB44
BB49
BB8
BC16
BC24
BC25
BC36
BC40
BC51
BD13
BD2
BD28
BD45
BD48
BD5
BE1
BE19
BE23
BE30
BE42
BE51
BE8
BF12
BF16
BF36
BG19
BG2
BG24
BG29
BG39
BG48
BG5
BG51
BH17
BH30
BH44
BH46
BH8
BJ11
BJ13
BJ38
BJ4
BJ42
BJ46
BK15
BK17
BK25
BK29
BK36
BK40
BK44
BK6
BK8
BL11
BL13
BL19
BL22
BL37
BL47
C12
C16
C19
C28
C29
C33
C36
C41

4

3

U21J

U21J

C46

VSS_199

C50

VSS_200

C7

VSS_201

D13

VSS_202

D24

VSS_203

D3

VSS_204

D32

VSS_205

D39

VSS_206

D45

VSS_207

D49

VSS_208

E10

VSS_209

E16

VSS_210

E24

VSS_211

E28

VSS_212

E32

VSS_213

E47

VSS_214

F19

VSS_215

F36

VSS_216

F4

VSS_217

F40

VSS_218

F50

VSS_219

G1

VSS_220

G13

VSS_221

G16

VSS_222

G19

VSS_223

G24

VSS_224

G28

VSS_225

G29

VSS_226

G33

VSS_227

G42

VSS_228

G45

VSS_229

G48

VSS_230

G8

VSS_231

H24

VSS_232

H28

VSS_233

H4

VSS_234

H45

VSS_235

J11

VSS_236

J16

VSS_237

J2

VSS_238

J24

VSS_239

J28

VSS_240

J33

VSS_241

J35

VSS_242

J39

VSS_243

K12

VSS_245

K47

VSS_246

K8

VSS_247

L1

VSS_248

L17

VSS_249

L20

VSS_250

L24

VSS_251

L28

VSS_252

L3

VSS_253

L33

VSS_254

L49

VSS_255

M28

VSS_256

M42

VSS_257

M46

VSS_258

M49

VSS_259

M5

VSS_260

M50

VSS_261

M9

VSS_262

N11

VSS_263

N14

VSS_264

N17

VSS_265

N29

VSS_266

N32

VSS_267

N36

VSS_268

N39

VSS_269

N44

VSS_270

N49

VSS_271

N7

VSS_272

P19

VSS_273

P2

VSS_274

P23

VSS_275

P3

VSS_276

P50

VSS_277

R49

VSS_278

T39

VSS_279

T43

VSS_280

T47

VSS_281

U41

VSS_282

U45

VSS_283

U50

VSS_284

V2

VSS_285

V3

VSS_286

CRESTLINE_1p0

CRESTLINE_1p0

VSS

VSS

VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305

VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313

W11
W39
W43
W47
W5
W7
Y13
Y2
Y41
Y45
Y49
Y5
Y50
Y11
P29
T29
T31
T33
R28

AA32
AB32
AD32
AF28
AF29
AT27
AV25
H50

VSS_GMCH_T29
VSS_GMCH_T31
VSS_GMCH_T33
VSS_GMCH_R28

2

R35 0_4R35 0_4
R27 0_4R27 0_4
R28 0_4R28 0_4
R63 0_4R63 0_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

PROJECT : BU1 Santa Rosa

GMCH Power-3(6 of 7)

GMCH Power-3(6 of 7)

GMCH Power-3(6 of 7)

1

of

of

of

10 33Friday, May 25, 2007

10 33Friday, May 25, 2007

10 33Friday, May 25, 2007

1A

1A

1A

5

http://adf.ly/LOM1

4

3

2

1

Strap table

All strap are sampled with respect to the leading edge of the GMCH Power OK(PWROK) Signal
CFG[17:3] Have internal Pull-up

CFG[18:19] Have internal Pull-down
Any CFG signal strapping option not list below should be left NC Pin

Pin Name Strap description

D D

CFG[2:0]

CFG[4:3]

CFG5

CFG6

CFG7

CFG8

CFG9

CFG[11:10]

C C

CFG[13:12]

CFG[15:14]

CFG16

CFG[18:17]

SDVO_CTRLDATA

CFG19

CFG20

B B

DMI X2 Select

MCH_CFG_5 Low = DMIX2

High = IDMIX4(Default)

FSB Dynamic ODT

MCH_CFG_16 Low = ODT Disable

A A

MCH_CFG_16[6]

High = ODT Enable(Default)

5

FSB Frequency Select

Reserved

DMI X2 Select

Reserved

CPU Strap

Low power PCI Express

PCI Express Graphics Lane Reversal

Reserved

XOR/ALLZ

Reserved

FSB Dynamic ODT

Reserved

SDVO Present

DMI Lane Reversal

SDVO/PCIe concurrent

DMI Lane Reversal

MCH_CFG_19 Low = Normal operation(Default)

R51

R51

*4.02K_4

*4.02K_4

MCH_CFG_19[6]

SDVO/PCIE Concurrent operation

MCH_CFG_20

R58

R58

*4.02K_4

*4.02K_4

MCH_CFG_20[6]

High = Reverse Lane

+3V

R36

R36

*4.02K_4

*4.02K_4

Low = Only SDVO or PCIE X1 is
operational(Default)
High = SDVO andPCIE X1 are operating
simultaneously via the PEG port

+3V

R430

R430

*4.02K_4

*4.02K_4

4

Configuration

010 = FSB 800MHz
011 = FSB 667MHz

0 = DMI X2
1 = DMI X4(Default)

0 = Reserved
1 = Mobile CPU(Default)

0 = Normal mode
1 = Low Power mode

0 = Reverse Lanes
1 = Normal operation(Default)

00 = Reserved
01 = XOR Mode Enable
10 = All-Z Mode Enabled
11 = Normal operation(Default)

0 = Dynamic ODT disable
1 = Dynamic ODT Enable(Default)

0 = No SDVO Card present(Default)
1 = SDVO Card Present

0 = Normal operation(Default)
1 = Reverse Lanes

0 = Only SDVO or PCIE x1 is operation(Default)
1 = SDVO and PCIE x1 are operating simultaneously via the PEG port

XOR /ALLz /Clock Un-gating

MCH_CFG_12MCH_CFG_13 Configuration

0

0

1

1

MCH_CFG_12[6]
MCH_CFG_13[6]

0

1

0

1

3

Clock gating disable

XOR Mode Enable

ALL-z Mode Enable

Normal operation(Default)

R48

R48

*4.02K_4

*4.02K_4

PCI Express Graphics

MCH_CFG_9 Low = Reverse Lane

R54

R54

*4.02K_4

*4.02K_4

High = Normal operation(Default)

MCH_CFG_9[6]MCH_CFG_5[6]

2

R47

R47

*4.02K_4

*4.02K_4

SDVO Present

Strap define at External
DVI control page

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

PROJECT : BU1 Santa Rosa

GMCH Strap(7 of 7)

GMCH Strap(7 of 7)

GMCH Strap(7 of 7)

1

of

of

of

11 33Friday, May 25, 2007

11 33Friday, May 25, 2007

11 33Friday, May 25, 2007

1A

1A

1A

1

http://adf.ly/LOM1

DDR2 Dual channel A/B PU

2

3

4

5

6

7

8

A A

DDRII A CHANNEL DDRII B CHANNEL

SMDDR_VTERM SMDDR_VTERM

C201

C176

C176

.1U_4

.1U_4

C145

C145

.1U_4

.1U_4

C143

C143

.1U_4

.1U_4

C148

C148

.1U_4

.1U_4

C195

C195

.1U_4

.1U_4

C146

C146

.1U_4

.1U_4

C230

C230

.1U_4

.1U_4

C201

.1U_4

.1U_4

C228

C228

.1U_4

.1U_4

C227

C227

.1U_4

.1U_4

M_A_A[13..0]

M_B_A[13..0]

C142

C142

.1U_4

.1U_4

C173

C173

.1U_4

.1U_4

M_A_A[13..0] [7,13]

M_B_A[13..0] [7,13]

C200

C200

.1U_4

.1U_4

C174

C174

.1U_4

.1U_4

C172

C172

.1U_4

.1U_4

C177

C177

.1U_4

.1U_4

C175

C175

.1U_4

.1U_4

C231

C231

.1U_4

.1U_4

C196

C196

.1U_4

.1U_4

C197

C197

.1U_4

.1U_4

.1U_4

.1U_4

C199

C199

C171

C171

.1U_4

.1U_4

C144

C144

.1U_4

.1U_4

C226

C226

.1U_4

.1U_4

C147

C147

.1U_4

.1U_4

C225

C225

.1U_4

.1U_4

Place one cap close to every 2 pull-up resistor terminated to SMDDR_VTERM

B B

M_CKE1[6,13]

M_CKE0[6,13]

M_A_BS#2[7,13]

M_A_BS#1[7,13]

C C

M_B_WE#[7,13] M_B_CAS#[7,13]

M_B_BS#1[7,13]

D D

INTEL FAE
ADD MA14 FOR DUAL LAYERS RAM

M_A_A14[6,13]
M_B_A14[6,13]

1

M_A_A3
M_A_A1

M_A_A9
M_A_A5

M_A_A2
M_A_A4

M_A_A11

M_A_A8

M_A_A12

M_A_A0

M_B_A10

M_B_A3
M_B_A1

M_B_A0

M_B_A7
M_B_A11

M_B_A8
M_B_A5

M_B_A2
M_B_A4

M_B_A9
M_B_A12

RP16 56X2RP16 56X2

RP18 56X2RP18 56X2

RP21 56X2RP21 56X2

RP23 56X2RP23 56X2

RP19 56X2RP19 56X2

RP20 56X2RP20 56X2

RP25 56X2RP25 56X2

RP30 56X2RP30 56X2

RP31 56X2RP31 56X2

RP38 56X2RP38 56X2

RP35 56X2RP35 56X2

RP27 56X2RP27 56X2

RP34 56X2RP34 56X2

RP28 56X2RP28 56X2

R199 56_4R199 56_4
R219 56_4R219 56_4

2

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

SMDDR_VTERM

SMDDR_VTERM

SMDDR_VTERM

3

M_A_A7

M_CKE3[6,13]

M_B_BS#2[7,13]

M_ODT1[6,13]

M_CS#1[6,13]

M_ODT3[6,13]

M_B_BS#0[7,13]

M_A_BS#0[7,13]

M_A_CAS#[7,13]

M_A_WE#[7,13]

M_CS#0[6,13]

M_A_RAS#[7,13]

M_CS#3[6,13]

M_CKE4[6,13]

M_ODT2[6,13]

M_B_RAS#[7,13]

M_ODT0[6,13]

M_CS#2[6,13]

4

M_B_A6

M_A_A13

M_B_A13

5

M_A_A6

M_A_A10

RP22 56X2RP22 56X2

RP32 56X2RP32 56X2

RP14 56X2RP14 56X2

RP33 56X2RP33 56X2

RP17 56X2RP17 56X2

RP15 56X2RP15 56X2

RP26 56X2RP26 56X2

RP29 56X2RP29 56X2

RP39 56X2RP39 56X2

RP37 56X2RP37 56X2

RP24 56X2RP24 56X2

RP36 56X2RP36 56X2

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

6

SMDDR_VTERM

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

PROJECT : BU1 Santa Rosa

DDR RES. ARRAY

DDR RES. ARRAY

DDR RES. ARRAY

7

of

of

of

12 33Friday, May 25, 2007

12 33Friday, May 25, 2007

12 33Friday, May 25, 2007

8

1A

1A

1A

1

http://adf.ly/LOM1

DDR2 Dual channel A/B CONN

A A

B B

C C

D D

M_CKE0[6,12]

M_A_BS#2[7,12]

M_A_BS#0[7,12]

M_A_WE#[7,12]

M_A_CAS#[7,12]

M_CS#1[6,12]

M_ODT1[6,12]

DDRDAT_SMB
DDRCLK_SMB

+3V

+3V

SMDDR_VREF_DIMM

+1.8VSUS

1

M_A_DQ6
M_A_DQ5

M_A_DQS#0
M_A_DQS0

M_A_DQ2
M_A_DQ3

M_A_DQ9
M_A_DQ8 M_A_DM1

M_A_DQS#1
M_A_DQS1

M_A_DQ11 M_A_DQ15

M_A_DQ17
M_A_DQ20

M_A_DQS#2
M_A_DQS2

M_A_DQ23
M_A_DQ19

M_A_DQ28
M_A_DQ25

M_A_DM3

M_A_DQ26
M_A_DQ27

M_A_A12
M_A_A9

M_A_A5
M_A_A3
M_A_A1

M_A_A10

M_A_DQ36 M_B_DQ36
M_A_DQ37

M_A_DQS#4
M_A_DQS4

M_A_DQ39
M_A_DQ34

M_A_DQ40
M_A_DQ41

M_A_DM5

M_A_DQ42
M_A_DQ46

M_A_DQ53
M_A_DQ49

M_A_DQS#6
M_A_DQS6

M_A_DQ50

M_A_DQ56
M_A_DQ60

M_A_DM7

M_A_DQ62
M_A_DQ63

3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99

101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

2

CN30

CN30

VREF
VSS47
DQ0
DQ1
VSS37
DQS#0
DQS0
VSS48
DQ2
DQ3
VSS38
DQ8
DQ9
VSS49
DQS#1
DQS1
VSS39
DQ10
DQ11
VSS50

VSS18
DQ16
DQ17
VSS1
DQS#2
DQS2
VSS19
DQ18
DQ19
VSS22
DQ24
DQ25
VSS23
DM3
NC4
VSS9
DQ26
DQ27
VSS4
CKE0
VDD7
NC1
A16_BA2
VDD9
A12
A9
A8
VDD5
A5
A3
A1
VDD10
A10/AP
BA0
WE#
VDD2
CAS#
S1#
VDD3
ODT1
VSS11
DQ32
DQ33
VSS26
DQS#4
DQS4
VSS2
DQ34
DQ35
VSS27
DQ40
DQ41
VSS29
DM5
VSS51
DQ42
DQ43
VSS40
DQ48
DQ49
VSS52
NCTEST
VSS30
DQS#6
DQS6
VSS31
DQ50
DQ51
VSS33
DQ56
DQ57
VSS3
DM7
VSS34
DQ58
DQ59
VSS14
SDA
SCL
VDD(SPD)

TYCO_1-1734071-1

TYCO_1-1734071-1

2

VSS46

4

DQ4

6

DQ5

8

VSS15

10

DM0

12

VSS5

14

DQ6

16

DQ7

18

VSS16

20

DQ12

22

DQ13

24

VSS17

26

DM1

28

VSS53

30

CK0

32

CK0#

34

VSS41

36

DQ14

38

DQ15

40

VSS54

42

VSS20

44

DQ20

46

DQ21

48

VSS6

50

NC3

52

DM2

54

VSS21

56

DQ22

58

DQ23

60

VSS24

62

DQ28

64

DQ29

66

VSS25

68

DQS#3

70

DQS3

72

VSS10

74

DQ30

76

DQ31

78

VSS8

80

CKE1

82

PC4800 DDR2 SDRAM

SO-DIMM (200P)

PC4800 DDR2 SDRAM

SO-DIMM (200P)

VDD8

84

A15

86

A14

88

VDD11

90

A11

92

A7

94

A6

96

VDD4

98

A4

100

A2

102

A0

104

VDD12

106

BA1

108

RAS#

110

S0#

112

VDD1

114

ODT0

116

A13

118

VDD6

120

NC2

122

VSS12

124

DQ36

126

DQ37

128

VSS28

130

DM4

132

VSS42

134

DQ38

136

DQ39

138

VSS55

140

DQ44

142

DQ45

144

VSS43

146

DQS#5

148

DQS5

150

VSS56

152

DQ46

154

DQ47

156

VSS44

158

DQ52

160

DQ53

162

VSS57

164

CK1

166

CK1#

168

VSS45

170

DM6

172

VSS32

174

DQ54

176

DQ55

178

VSS35

180

DQ60

182

DQ61

184

VSS7

186

DQS#7

188

DQS7

190

VSS36

192

DQ62

194

DQ63

196

VSS13

198

SA0

200

SA1

SLOT A

H: 5.6mm

3

M_A_DM[0..7] [7]
M_A_DQ[0..63] [7]

+1.8VSUS +1.8VSUS +1.8VSUS

M_A_DQ4
M_A_DQ0

M_A_DM0

M_A_DQ7
M_A_DQ1

M_A_DQ13

M_A_DQ12

M_A_DQ10M_A_DQ14

M_A_DQ16
M_A_DQ21

M_A_DM2

M_A_DQ18
M_A_DQ22

M_A_DQ29

M_A_DQ24

M_A_DQS#3
M_A_DQS3

M_A_DQ30
M_A_DQ31

M_A_A11
M_A_A7
M_A_A6M_A_A8

M_A_A4
M_A_A2
M_A_A0

M_A_A13

M_A_DQ32
M_A_DQ33

M_A_DM4

M_A_DQ35
M_A_DQ38

M_A_DQ44
M_A_DQ45

M_A_DQS#5
M_A_DQS5

M_A_DQ43
M_A_DQ47

M_A_DQ48
M_A_DQ52

M_A_DM6

M_A_DQ54
M_A_DQ55M_A_DQ51

M_A_DQ61
M_A_DQ57

M_A_DQS#7
M_A_DQS7

M_A_DQ58

M_A_DQ59

R202 10K_4R202 10K_4 R216 10K_4R216 10K_4
R201 10K_4R201 10K_4

SO-DIMM0 SPD Address is 0xA0
SO-DIMM0 TS Address is 0x30

M_A_DQS[0..7] [7]
M_A_DQS#[0..7] [7]
M_A_A[0..13] [7,12]

M_CLK_DDR0 [6]
M_CLK_DDR#0 [6]

PM_EXTTS#0 [6]

M_CKE1 [6,12]

M_A_A14 [6,12]

INTEL FAE
ADD MA14 FOR DUAL LAYERS RAM

M_A_BS#1 [7,12]
M_A_RAS# [7,12]
M_CS#0 [6,12]

M_ODT0 [6,12]

M_CLK_DDR1 [6] M_CLK_DDR#4 [6]
M_CLK_DDR#1 [6]

M_CKE3[6,12] M_CKE4 [6,12]

M_B_BS#2[7,12]

M_B_BS#0[7,12]

M_B_WE#[7,12]

M_B_CAS#[7,12]

M_CS#3[6,12]

M_ODT3[6,12]

4

SMDDR_VREF_DIMM

CN25

CN25

1

VREF

3

M_B_DQ0
M_B_DQ5

M_B_DQS#0
M_B_DQS0

M_B_DQ7
M_B_DQ3

M_B_DQ9
M_B_DQ8 M_B_DM1

M_B_DQS#1
M_B_DQS1

M_B_DQ11
M_B_DQ10

M_B_DQ20
M_B_DQ17

M_B_DQS#2
M_B_DQS2

M_B_DQ22
M_B_DQ23

M_B_DQ29

M_B_DQ28

M_B_DM3

M_B_DQ26
M_B_DQ27

M_B_A12
M_B_A9
M_B_A8

M_B_A5
M_B_A3
M_B_A1

M_B_A10

M_B_DQ37
M_B_DQ38

M_B_DQS#4
M_B_DQS4

M_B_DQ34
M_B_DQ35

M_B_DQ40
M_B_DQ41

M_B_DM5

M_B_DQ46

M_B_DQ43

M_B_DQS#6
M_B_DQS6

M_B_DQ54

M_B_DQ56

M_B_DQ57 M_B_DQ61

M_B_DM7

M_B_DQ59
M_B_DQ62

DDRDAT_SMB
DDRCLK_SMB
+3V

VSS47

5

DQ0

7

DQ1

9

VSS37

11

DQS#0

13

DQS0

15

VSS48

17

DQ2

19

DQ3

21

VSS38

23

DQ8

25

DQ9

27

VSS49

29

DQS#1

31

DQS1

33

VSS39

35

DQ10

37

DQ11

39

VSS50

41

VSS18

43

DQ16

45

DQ17

47

VSS1

49

DQS#2

51

DQS2

53

VSS19

55

DQ18

57

DQ19

59

VSS22

61

DQ24

63

DQ25

65

VSS23

67

DM3

69

NC4

71

VSS9

73

DQ26

75

DQ27

77

VSS4

79

CKE0

81

VDD7

83

NC1

85

A16_BA2

87

VDD9

89

A12

91

A9

93

A8

95

VDD5

97

A5

99

A3

101

A1

103

VDD10

105

A10/AP

107

BA0

109

WE#

111

VDD2

113

CAS#

115

S1#

117

VDD3

119

ODT1

121

VSS11

123

DQ32

125

DQ33

127

VSS26

129

DQS#4

131

DQS4

133

VSS2

135

DQ34

137

DQ35

139

VSS27

141

DQ40

143

DQ41

145

VSS29

147

DM5

149

VSS51

151

DQ42

153

DQ43

155

VSS40

157

DQ48

159

DQ49

161

VSS52

163

NCTEST

165

VSS30

167

DQS#6

169

DQS6

171

VSS31

173

DQ50

175

DQ51

177

VSS33

179

DQ56

181

DQ57

183

VSS3

185

DM7

187

VSS34

189

DQ58

191

DQ59

193

VSS14

195

SDA

197

SCL

199

VDD(SPD)

TYCO_292564-4

TYCO_292564-4

SLOT B

5

2

VSS46

4

DQ4

6

DQ5

8

VSS15

10

DM0

12

VSS5

14

DQ6

16

DQ7

18

VSS16

20

DQ12

22

DQ13

24

VSS17

26

DM1

28

VSS53

30

CK0

32

CK0#

34

VSS41

36

DQ14

38

DQ15

40

VSS54

42

VSS20

44

DQ20

46

DQ21

48

VSS6

50

NC3

52

DM2

54

VSS21

56

DQ22

58

DQ23

60

VSS24

62

DQ28

64

DQ29

66

VSS25

68

DQS#3

70

DQS3

72

VSS10

74

DQ30

76

DQ31

78

VSS8

80

CKE1

82

VDD8

84

A15

86

A14

88

VDD11

90

PC4800 DDR2 SDRAM

SO-DIMM (200P)

PC4800 DDR2 SDRAM

SO-DIMM (200P)

A11

92

A7

94

A6

96

VDD4

98

A4

100

A2

102

A0

104

VDD12

106

BA1

108

RAS#

110

S0#

112

VDD1

114

ODT0

116

A13

118

VDD6

120

NC2

122

VSS12

124

DQ36

126

DQ37

128

VSS28

130

DM4

132

VSS42

134

DQ38

136

DQ39

138

VSS55

140

DQ44

142

DQ45

144

VSS43

146

DQS#5

148

DQS5

150

VSS56

152

DQ46

154

DQ47

156

VSS44

158

DQ52

160

DQ53

162

VSS57

164

CK1

166

CK1#

168

VSS45

170

DM6

172

VSS32

174

DQ54

176

DQ55

178

VSS35

180

DQ60

182

DQ61

184

VSS7

186

DQS#7

188

DQS7

190

VSS36

192

DQ62

194

DQ63

196

VSS13

SA0
SA1

R217 10K_4R217 10K_4

198
200

SO-DIMM1 SPD Address is 0xA4
SO-DIMM1 TS Address is 0x34

H: 10.1mm

M_B_DQ4
M_B_DQ1

M_B_DM0

M_B_DQ2
M_B_DQ6

M_B_DQ12
M_B_DQ13

M_B_DQ14
M_B_DQ15

M_B_DQ16
M_B_DQ21

M_B_DM2

M_B_DQ18
M_B_DQ19

M_B_DQ24
M_B_DQ25

M_B_DQS#3
M_B_DQS3

M_B_DQ30
M_B_DQ31

M_B_A11
M_B_A7
M_B_A6

M_B_A4
M_B_A2
M_B_A0

M_B_A13

M_B_DQ32

M_B_DM4

M_B_DQ39
M_B_DQ33

M_B_DQ44
M_B_DQ45

M_B_DQS#5
M_B_DQS5

M_B_DQ42
M_B_DQ47

M_B_DQ52M_B_DQ53
M_B_DQ48M_B_DQ49

M_B_DM6

M_B_DQ55M_B_DQ51
M_B_DQ50

M_B_DQ60

M_B_DQS#7
M_B_DQS7

M_B_DQ63
M_B_DQ58

+3V

6

M_B_DM[0..7] [7]
M_B_DQ[0..63] [7]
M_B_DQS[0..7] [7]
M_B_DQS#[0..7] [7]
M_B_A[0..13] [7,12]

M_CLK_DDR3 [6]
M_CLK_DDR#3 [6]

PM_EXTTS#1 [6]

M_B_A14 [6,12]

M_B_BS#1 [7,12]
M_B_RAS# [7,12]
M_CS#2 [6,12]

M_ODT2 [6,12]

M_CLK_DDR4 [6]

7

+1.8VSUS

+1.8VSUS

C185

C185

C183

C183

.1U_4

.1U_4

.1U_4

.1U_4

+1.8VSUS

INTEL FAE
ADD MA14 FOR DUAL LAYERS RAM

+1.8VSUS

C184

C184

C187

C187

.1U_4

.1U_4

.1U_4

.1U_4

SDATA[2,16,19,23,24]

SCLK[2,16,19,23,24]

SMDDR_VREF_DIMM

R209 *10K_4R209 *10K_4

+

+

C370

C370

330U_3528

330U_3528

C369

C369

.1U_4

.1U_4

+

+

C364

C364

330U_3528

330U_3528

C181

C181

.1U_4

.1U_4

C376

C376

2.2U_6

2.2U_6

SMDDR_VREF_DIMM

C182

C182

.1U_4

.1U_4

Close to DIMM0

C375

C375

2.2U_6

2.2U_6

SMDDR_VREF_DIMM

C186

C186

.1U_4

.1U_4

Close to DIMM1

+3V

2

3

+3V

2

3

R208 0_6R208 0_6

R117 *10K_4R117 *10K_4

C379

C379

2.2U_6

2.2U_6

C202

C202

.1U_4

.1U_4

C365

C365

2.2U_6

2.2U_6

C149

C149

.1U_4

.1U_4

Q9

Q9

RHU002N06

RHU002N06

1

Q8

Q8

RHU002N06

RHU002N06

1

C367

C367

2.2U_6

2.2U_6

+3V

C198

C198

2.2U_6

2.2U_6

C377

C377

2.2U_6

2.2U_6

C140

C140

2.2U_6

2.2U_6

R225

R225

10K_4

10K_4

SMDDR_VREF

+1.8VSUS

8

C368

C368

2.2U_6

2.2U_6

C141

C141

2.2U_6

2.2U_6

C366

C366

2.2U_6

2.2U_6

+3V

C193

C193

2.2U_6

2.2U_6

R224

R224

10K_4

10K_4

DDRDAT_SMB

DDRCLK_SMB

C380

C380

2.2U_6

2.2U_6

C378

C378

2.2U_6

2.2U_6

C150

C150

.1U_4

.1U_4

C194

C194

.1U_4

.1U_4

CLOCK 0,1 CLOCK 3,4

1

2

CKE 2,3CKE 0,1

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

3

4

5

6

Date: Sheet

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

DDR SO-DIMM(200P)

DDR SO-DIMM(200P)

DDR SO-DIMM(200P)

7

3A

3A

3A

of

of

of

13 33Friday, May 25, 2007

13 33Friday, May 25, 2007

13 33Friday, May 25, 2007

8

5

http://adf.ly/LOM1

RTC

VCCRTC_4

R246

R246

1K_4

1K_4

CN24

CN24

1
2

ACS_85204-0200L

ACS_85204-0200L

+5VPCU

R245 8.66K/F_4R245 8.66K/F_4

R248

R248

4.7K_4

4.7K_4

R247

R247

15K_4

15K_4

D11 CH500H-40D11 CH500H-40

D12 CH500H-40D12 CH500H-40

1
2

+3VPCU

D D

C C

VCCRTC

VCCRTC

R232 20K_6R232 20K_6

R226

R226

1M_6

1M_6

CMOS Setting G1
Clear CMOS Short
Keep CMOS Open

VCCRTC_3

R240 8.66K/F_4R240 8.66K/F_4

C247 1U_6C247 1U_6

12

G1

G1

*SHORT_PAD

*SHORT_PAD

VCCRTC_2VCCRTC_1

Q10

Q10

MMBT3904

MMBT3904

<check list>
Delay 18~25ms

13

2

C237

C237

1U_6

1U_6

SATA Disable

1.Connect to GND: SATA[2:0]RXp/n , SATARBIAS , SATARBIAS# , SATA_CLKP , SATACLKN

2.NC: SATA[2:0]TXp/n , SATALED#

3.VccSATAPLL should be connected directly to Vcc1_5,Filter cap are not required

B B

4.BIOS disable

4

C383 15P_4C383 15P_4

R375

R375

10M_6

10M_6

2 1

R222 *24.9_4R222 *24.9_4

ACZ_SDIN0[24]
ACZ_SDIN1[25]

T109T109
T58T58

R480

R480
*10K_4

*10K_4

T56T56
T54T54

C136 3900P_4C136 3900P_4
C138 3900P_4C138 3900P_4
C135 3900P_4C135 3900P_4
C132 3900P_4C132 3900P_4

CLK_PCIE_SATA#[2]
CLK_PCIE_SATA[2]

R139 24.9_4R139 24.9_4

<check list>
L<500mils

CLK_32KX1
CLK_32KX2

RTCRST#

SM_INTRUDER#

ICH_INTVRMEN
LAN100_SLP

GLAN_COMP_SB

ACZ_BCLK
ACZ_SYNC

ACZ_RST#

ACZ_SDIN2
ACZ_SDIN3

ACZ_SDOUT

SATA_LED#

SATA_RXN0_C
SATA_RXP0_C
SATA_TXN0_C
SATA_TXP0_C

SATA_BIAS

C386 15P_4C386 15P_4

+1.5V_PCIE

SATA_LED#[25]

SATA_RXN0[19]
SATA_RXP0[19]

SATA_TXN0[19]
SATA_TXP0[19]

Y4

Y4

32.768KHZ

32.768KHZ

+3V

3

U16A

U16A

AG25

RTCX1

AF24

RTCX2

AF23

RTCRST#

AD22

INTRUDER#

AF25

INTVRMEN

AD21

LAN100_SLP

B24

GLAN_CLK

D22

LAN_RSTSYNC

C21

LAN_RXD0

B21

LAN_RXD1

C22

LAN_RXD2

D21

LAN_TXD0

E20

LAN_TXD1

C20

LAN_TXD2

AH21

GLAN_DOCK#/GPIO13

D25

GLAN_COMPI

C25

GLAN_COMPO

AJ16

HDA_BIT_CLK

AJ15

HDA_SYNC

AE14

HDA_RST#

AJ17

HDA_SDIN0

AH17

HDA_SDIN1

AH15

HDA_SDIN2

AD13

HDA_SDIN3

AE13

HDA_SDOUT

AE10

HDA_DOCK_EN#/GPIO33

AG14

HDA_DOCK_RST#/GPIO34

AF10

SATALED#

AF6

SATA0RXN

AF5

SATA0RXP

AH5

SATA0TXN

AH6

SATA0TXP

AG3

SATA1RXN

AG4

SATA1RXP

AJ4

SATA1TXN

AJ3

SATA1TXP

AF2

SATA2RXN

AF1

SATA2RXP

AE4

SATA2TXN

AE3

SATA2TXP

AB7

SATA_CLKN

AC6

SATA_CLKP

AG1

SATARBIAS#

AG2

SATARBIAS

ICH8M REV 1.0

ICH8M REV 1.0

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

FWH4/LFRAME#

LDRQ0#

LDRQ1#/GPIO23

RTCLAN / GLAN

LPCCPU

RTCLAN / GLAN

LPCCPU

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

CPUPWRGD/GPIO49

IGNNE#

RCIN#

STPCLK#

THRMTRIP#

IHDA

IHDA

IDE

IDE

SATA

SATA

DCS1#
DCS3#

DIOR#

DIOW#

DDACK#

IDEIRQ

IORDY

DDREQ

INIT#

INTR

SMI#

DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8

DD9
DD10
DD11
DD12
DD13
DD14
DD15

2

E5
F5
G8
F6

C4

G9

LDRQ#1

E6

GATEA20

AF13
AG26

H_DPRSTP#_R

AF26

H_DPSLP#_R

AE26

AD24

H_PWRGD_R

AG29

AF27

AE24
AC20

RCIN#

AH14

AD23

NMI

TP8

DA0
DA1
DA2

AG28

AA24

AE27

AA23

V1
U2
V3
T1
V4
T5
AB2
T6
T3
R2
T4
V6
V5
U1
V2
U6

AA4
AA1
AB3

Y6
Y5

W4
W3
Y2
Y3
Y1
W5

H_SMI#_R

H_THERMTRIP_R

ICH_TP8

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

PDA0
PDA1
PDA2

LAD0 [23,26]
LAD1 [23,26]
LAD2 [23,26]
LAD3 [23,26]

LFRAME# [23,26]

T68T68

LDRQ#1 [23]

GATEA20 [26]
H_A20M# [3]

R161 0_4R161 0_4
R169 0_4R169 0_4

R153 0_4R153 0_4

R154 0_4R154 0_4

T63T63

+1.05V_V_CPU_IO

R165

R165

R164

R164

*56.2_4

*56.2_4

*56.2_4

*56.2_4

H_PWRGD [3]

H_IGNNE# [3]

H_INIT# [3]
H_INTR [3]
RCIN# [26]

H_NMI [3]
H_SMI# [3]

H_STPCLK# [3]

R203 24_6R203 24_6

PDD[15:0] [19]

PDA[2:0] [19]

PDCS1# [19]
PDCS3# [19]

PDIOR# [19]

PDIOW# [19]

PDDACK# [19]
IRQ14 [19]
PDIORDY [19]

PDDREQ [19]

ICH_DPRSTP# [3,6,29]
H_DPSLP# [3]

1

+1.05V_V_CPU_IO

R206

R206

56.2_4

56.2_4

R205 *0_4R205 *0_4

RCIN#
GATEA20

+1.05V_V_CPU_IO

R175

R175

56.2_4

56.2_4

H_FERR# [3]

Placement close SB L<2"

PM_THRMTRIP# [3,6]

+3V +3V

R131

R131

10K_4

10K_4

R379

R379

8.2K_4

8.2K_4

SB Strap HDA

ICH8-M Internal VR Enable strap
(Internal VR for Vccsus1_05,VccSus1_5 and VccCL1_5)

INTVRMEN Low = Internal VR disable

A A

High = Internal VR enable(Default)

VCCRTC

R149

R149
332K_6

332K_6

ICH_INTVRMEN

R162

R162
*0_4

*0_4

5

ICH8-M LAN100_SLP Strap
(Internal VR for VccLAN1_05 and VccCL1.05)

LAN100_SLP Low = Internal VR disable

High = Internal VR enable(Default)

VCCRTC

R147

R147
332K_6

332K_6

R150

R150
*0_4

*0_4

4

LAN100_SLP

XOR Chain Entrance Strap

ICH_RSV0 HDA_SDOUT Description

0

0

1

1

3

0

1

0

1

+3V

R394

R394
*1K_6

*1K_6

R361

R361
*1K_4

*1K_4

Enter XOR Chain

Normal opration(Default)

Set PCIE port config bit 1

ACZ_SDOUT

RSVD

ICH_TP3 [16]

ACZ_SDOUT

ACZ_SYNC

ACZ_BCLK

ACZ_RST#

2

R392 33_4R392 33_4

R393 33_4R393 33_4

R130 33_4R130 33_4

R129 33_4R129 33_4

R364 33_4R364 33_4

R365 33_4R365 33_4

R172 33_4R172 33_4

R167 33_4R167 33_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

PROJECT : BU1 Santa Rosa

ICH8M HOST(1 of 4)

ICH8M HOST(1 of 4)

ICH8M HOST(1 of 4)

ACZ_SDOUT_AUDIO [24]

ACZ_SDOUT_MDC [25]

ACZ_SYNC_AUDIO [24]

ACZ_SYNC_MDC [25]

BIT_CLK_AUDIO [24]

BIT_CLK_MDC [25]

ACZ_RST#_AUDIO [24]

ACZ_RST#_MDC [25]

14 33Friday, May 25, 2007

14 33Friday, May 25, 2007

14 33Friday, May 25, 2007

1

of

of

of

3A

3A

3A

5

http://adf.ly/LOM1

4

3

2

1

SB-PCIE/USB/DMI

PCIE_RXN1[23]

To 3G

To LAN

D D

To WLAN

To New Card

C C

PCIE_RXP1[23]

PCIE_TXN1[23]
PCIE_TXP1[23]

PCIE_RXN4[20]
PCIE_RXP4[20]

PCIE_TXN4[20]
PCIE_TXP4[20]

PCIE_RXN3[23]
PCIE_RXP3[23]

PCIE_TXN3[23]
PCIE_TXP3[23]

PCIE_RXN2[24]
PCIE_RXP2[24]

PCIE_TXN2[24]
PCIE_TXP2[24]

C204 .1U_4C204 .1U_4
C192 .1U_4C192 .1U_4

C222 .1U_4C222 .1U_4
C219 .1U_4C219 .1U_4

C214 .1U_4C214 .1U_4
C209 .1U_4C209 .1U_4

C229 .1U_4C229 .1U_4
C234 .1U_4C234 .1U_4

T71T71
T69T69
T103T103
T102T102

T76T76
T72T72
T78T78
T74T74

T77T77
T101T101
T75T75

T73T73
T70T70

PCIE_TXN1_C
PCIE_TXP1_C

PCIE_TXN4_C
PCIE_TXP4_C

PCIE_TXN3_C
PCIE_TXP3_C

PCIE_TXN2_C
PCIE_TXP2_C

SPI_CS1#

USBOC#0
USBOC#1
USBOC#2
USBOC#3
USBOC#4
USBOC#5
USBOC#6
USBOC#7
USBOC#8
USBOC#9

SB-PCI

AD[0..31][21,22]

B B

INTA#[22]

A A

5

INTB#[22]
INTC#[21]

T79T79

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

INTA#
INTB#
INTC#
INTD#

PCI ROUTING
TABLE

REQ0# / GNT0# R5C833
REQ1# / GNT1# CB1410

U16D

U16D

P27

PERN1

P26

PERP1

N29

PETN1

N28

PETP1

M27

PERN2

M26

PERP2

L29

PETN2

L28

PETP2

K27

PERN3

K26

PERP3

J29

PETN3

J28

PETP3

H27

PERN4

H26

PERP4

G29

PETN4

G28

PETP4

F27

PERN5

F26

PERP5

E29

PETN5

E28

PETP5

D27

PERN6/GLAN_RXN

D26

PERP6/GLAN_RXP

C29

PETN6/GLAN_TXN

C28

PETP6/GLAN_TXP

C23

SPI_CLK

B23

SPI_CS0#

E22

SPI_CS1#

D23

SPI_MOSI

F21

SPI_MISO

AJ19

OC0#

AG16

OC1#/GPIO40

AG15

OC2#/GPIO41

AE15

OC3#/GPIO42

AF15

OC4#/GPIO43

AG17

OC5#/GPIO29

AD12

OC6#/GPIO30

AJ18

OC7#/GPIO31

AD14

OC8#

AH18

OC9#

ICH8M REV 1.0

ICH8M REV 1.0

U16B

U16B

D20

AD0

E19

AD1

D19

AD2

A20

AD3

D17

AD4

A21

AD5

A19

AD6

C19

AD7

A18

AD8

B16

AD9

A12

AD10

E16

AD11

A14

AD12

G16

AD13

A15

AD14

B6

AD15

C11

AD16

A9

AD17

D11

AD18

B12

AD19

C12

AD20

D10

AD21

C7

AD22

F13

AD23

E11

AD24

E13

AD25

E12

AD26

D8

AD27

A6

AD28

E8

AD29

D6

AD30

A3

AD31

Interrupt I/F

Interrupt I/F

F9

PIRQA#

B5

PIRQB#

C5

PIRQC#

A10

PIRQD#

ICH8M REV 1.0

ICH8M REV 1.0

IDSEL

AD17
AD20 INTC#

4

V27

DMI0RXN

V26

DMI0RXP

U29

DMI0TXN

U28

DMI0TXP

Y27

DMI1RXN

Y26

DMI1RXP

W29

DMI1TXN

W28

DMI1TXP

AB26

DMI2RXN

AB25

DMI2RXP

AA29

DMI2TXN

AA28

DMI2TXP

AD27

DMI3RXN

AD26

DMI3RXP

AC29

DMI3TXN

AC28

DMI3TXP

T26

DMI_CLKN

T25

DMI_CLKP

Y23
Y24

Direct Media Interface

Direct Media Interface

G3

USBP0N

G2

USBP0P

H5

USBP1N

H4

USBP1P

H2

USBP2N

H1

USBP2P

J3

USBP3N

J2

USBP3P

K5

USBP4N

K4

USBP4P

K2

USBP5N

K1

USBP5P

L3

USBP6N

L2

USBP6P

M5

USBP7N

M4

USBP7P

M2

USBP8N

M1

USBP8P

N3

USBP9N

N2

USBP9P

F2

USBRBIAS#

F3

USBRBIAS

<CRB>
USB_RBIAS_PN<500mils

A4

REQ0#

D7

GNT0#

E18
C18
B19
F18
A11
C10

C17

C/BE0#

E15

C/BE1#

F16

C/BE2#

E17

C/BE3#

C8

IRDY#

D9

PAR

G6
D16
A7

PERR#

B7
F10

SERR#

C16

STOP#

C9

TRDY#

A17

AG24
B10

PCICLK

G7

PME#

F8
G11
F12
B3

PCI

PCI

USB

USB

REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55

PIRQE#/GPIO2

PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

PCI-Express

PCI-Express

DMI_ZCOMP

DMI_IRCOMP

SPI

SPI

PCIRST#

DEVSEL#

PLOCK#

FRAME#

PLTRST#

INTERUPT

INTA#,INTB#

REQ0#
GNT0#
REQ1#

GNT1#

REQ2#

GNT2#

REQ3#
GNT3#

IRDY#

DEVSEL#
PERR#
LOCK#
SERR#
STOP#
TRDY#
FRAME#

PLT_RST-R#
PCLK_ICH

INTE#
INTF#
INTG#
INTH#

DEVICE

DMI_RXN0 [6]
DMI_RXP0 [6]
DMI_TXN0 [6]
DMI_TXP0 [6]

DMI_RXN1 [6]
DMI_RXP1 [6]
DMI_TXN1 [6]
DMI_TXP1 [6]

DMI_RXN2 [6]
DMI_RXP2 [6]
DMI_TXN2 [6]
DMI_TXP2 [6]

DMI_RXN3 [6]
DMI_RXP3 [6]
DMI_TXN3 [6]
DMI_TXP3 [6]

CLK_PCIE_ICH# [2]
CLK_PCIE_ICH [2]

DMI_IRCOMP_R

USBP0- [24]
USBP0+ [24]
USBP1- [24]
USBP1+ [24]
USBP8- [18]
USBP8+ [18]
USBP3- [23]
USBP3+ [23]
USBP4- [24]
USBP4+ [24]
USBP5- [24]
USBP5+ [24]
USBP6- [24]
USBP6+ [24]
USBP7- [23]
USBP7+ [23]
USBP2- [24]

USBP2+ [24]

T64T64
T65T65

USB_RBIAS_PN

R241 0_4R241 0_4

A16 SWAP Override strap

PCI_GNT#3 Low = A16 swap override enabled

GNT3#

High = Default

R227 *1K_4R227 *1K_4

ICH8 Boot BIOS select

+1.5V_PCIE

R186

R186

24.9_4

24.9_4

To USB BOARD(Audio)
To USB BOARD(Audio)

SPI_CS1#

GNT0#

SPI_CS#1PCI_GNT#0

R220 *1K_4R220 *1K_4

R223 *1K_4R223 *1K_4

Boot BIOS Location

SPI(Default)10

PCI01

LPC11

To Camera
To WLAN
To Finger Printer
To Bluetooth
To New Card
To 3G
To USB BOARD(LAN)

RP42

RP42

6

SERR#

7

REQ0#

8

INTH#

R351

R351

22.6_6

22.6_6

REQ0# [22]
GNT0# [22]
REQ1# [21]

3

GNT1# [21]

CBE0# [21,22]
CBE1# [21,22]
CBE2# [21,22]
CBE3# [21,22]

IRDY# [21,22]
PAR [21,22]
PCIRST# [21,22]
DEVSEL# [21,22]
PERR# [21,22]

SERR# [21,22]
STOP# [21,22]
TRDY# [21,22]
FRAME# [21,22]

PCLK_ICH [2]
PCI_PME# [21,22]

CRT_SENSE# [18,26]

R148 0_6R148 0_6

U3

U3

PLT_RST-R#

2

1

TC7SH08FU

TC7SH08FU

PLTRST#_NB [6]

+3V

C382

C382

.1U_4

.1U_4

4

3 5

R384

R384

100K_6

100K_6

2

PLTRST# [16,19,20,23,24,26]

T80T80

T81T81

+3V

USBOC#0
USBOC#7
USBOC#5

+3V_S5

USBOC#1

+3V

+3V

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

9

10

8.2KX8

8.2KX8

RP47

RP47

6
7
8
9

10

8.2KX8

USBOC#8

USBOC#9

REQ1#
DEVSEL#
FRAME#
STOP#

LOCK#
IRDY#
PERR#
INTF#

8.2KX8

R188 8.2K_4R188 8.2K_4

R363 8.2K_4R363 8.2K_4

RP40

RP40

6
7
8
9

10

8.2KX8

8.2KX8

RP41

RP41

6
7
8
9

10

8.2KX8

8.2KX8

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

ICH8M PCIE(2 of 4)/ BIOS

ICH8M PCIE(2 of 4)/ BIOS

ICH8M PCIE(2 of 4)/ BIOS

5
4
3
2
1

5
4
3
2
1

5
4
3
2
1

5
4
3
2
1

1

INTC#
INTB#

USBOC#2
USBOC#3
USBOC#4
USBOC#6

REQ2#
TRDY#
INTG#

INTE#
INTD#
REQ3#
INTA#

+3V

+3V_S5

+3V_S5

+3V_S5

+3V

+3V

15 33Friday, May 25, 2007

15 33Friday, May 25, 2007

15 33Friday, May 25, 2007

1A

1A

1A

of

of

of

5

http://adf.ly/LOM1

SB-GPIO

+3V

R127

R127

R124

R124

*10K_4

*10K_4

*10K_4

D D

C C

PM_STPPCI#[2]
PM_STPCPU#[2]

<FAE>
CRB STP_PCI# PU is no stuff.
CRB STP_CPU# always keeps high to
ensure ME alive in M1 state.
(CLK_MCH_BCLK/# must keep alive to
make ME work)
I think there will be update for this design,
I suggest you to keep PU and 0Ω
isolation resistors for this signal.

*10K_4

MCH_ICH_SYNC#[6]

T60T60
T59T59

T106T106

T107T107
T108T108

T111T111
T149T149

SCLK[2,13,19,23,24]
SDATA[2,13,19,23,24]

CL_RST#1[23]

LPC_PD#[22]

SYS_RST#[3]

PM_BMBUSY#[6]

R125 0_4R125 0_4
R126 0_4R126 0_4

PCIE_WAKE#[20,23,24]

SERIRQ[21,22,23,26]

THERM_ALERT#[3]

KBSMI#[26]

SCI#[26]

RST_HDD#[19]

SPKR[24]

R369 0_4R369 0_4

ICH_TP3[14]

4

D25 BAS316D25 BAS316

SCLK
SDATA
CL_RST#1
SMLINK0
SMLINK1

RI#

SYS_RST#

SMB_ALERT#

PM_STPPCI_ICH#
PM_STPCPU_ICH#

CLKRUN#

PCIE_WAKE#
SERIRQ
THERM_ALERT#

VR_PWRGD_CLKEN

ICH_TP7

KBSMI#_ICH

SCI#
GPIO12
BOARD_ID0
BOARD_ID1
HOT_KEY
ICH_GPIO22

ICH_GPIO27
ICH_GPIO28

GPIO35
RST_HDD#
ICH_GPIO39
ICH_GPIO48

SPKR

MCH_ICH_SYNC#_R

U16C

U16C

AJ26

SMBCLK

AD19

SMBDATA

AG21

LINKALERT#

AC17

SMLINK0

AE19

SMLINK1

AF17

RI#

F4

SUS_STAT#/LPCPD#

AD15

SYS_RESET#

AG12

BMBUSY#/GPIO0

AG22

SMBALERT#/GPIO11

AE20

STP_PCI#/GPIO15

AG18

STP_CPU#/GPIO25

AH11

CLKRUN#/GPIO32

AE17

WAKE#

AF12

SERIRQ

AC13

THRM#

AJ20

VRMPWRGD

AJ22

TP7

AJ8

TACH1/GPIO1

AJ9

TACH2/GPIO6

AH9

TACH3/GPIO7

AE16

GPIO8

AC19

GPIO12

AG8

TACH0/GPIO17

AH12

GPIO18

AE11

GPIO20

AG10

SCLOCK/GPIO22

AH25

QRT_STATE0/GPIO27

AD16

QRT_STATE1/GPIO28

AG13

SATACLKREQ#/GPIO35

AF9

SLOAD/GPIO38

AJ11

SDATAOUT0/GPIO39

AD10

SDATAOUT1/GPIO48

AD9

SPKR

AJ13

MCH_SYNC#

AJ21

TP3

ICH8M REV 1.0

ICH8M REV 1.0

3

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA2GP/GPIO36

SATA

GPIO

SATA

GPIO

SATA3GP/GPIO37

SMB

SMB

Clocks

Clocks

S4_STATE#/GPIO26

SYS

GPIO

SYS

GPIO

DPRSLPVR/GPIO16

Power MGTController Link

Power MGTController Link

CK_PWRGD

GPIO

GPIO

MEM_LED/GPIO24
ME_EC_ALERT/GPIO10
EC_ME_ALERT/GPIO14

WOL_EN/GPIO9

MISC

MISC

CLK14
CLK48

SUSCLK

SLP_S3#
SLP_S4#
SLP_S5#

PWROK

BATLOW#

PWRBTN#

LAN_RST#

RSMRST#

CLPWROK

SLP_M#

CL_CLK0
CL_CLK1

CL_DATA0
CL_DATA1

CL_VREF0
CL_VREF1

CL_RST#

AJ12
AJ10
AF11
AG11

AG9
G5

D3

AG23
AF21
AD18

AH27

AE23

AJ14

AE21

C2

AH20

AG27

E1

E3

AJ25

F23
AE18

F22
AF19

D24
AH23

AJ23

AJ27
AJ24
AF22
AG19

BOARD_ID4
BOARD_ID2
GPIO36
GPIO37

14M_ICH
CLKUSB_48

SLP_S3#

R168 100_4R168 100_4

SLP_S4#

R385 100_4R385 100_4

SLP_S5#

ICH_PWROK

PM_DPRSLPVR_R

PM_BATLOW#_R

DNBSWON#

PM_LAN_ENABLE_R

RSMRST#_R

ECPWROK

CL_VREF0_SB
CL_VREF1_SB

ICH_GPIO24
HDPACT
ICH_GPIO14
HDPINT

R367 100_4R367 100_4

R123 *0_4R123 *0_4

2

T61T61

T104T104

PM_DPRSLPVR

PLTRST#

R221 0_4R221 0_4

T105T105

14M_ICH [2]
CLKUSB_48 [2]

T94T94

SUSB# [26]
SUSC# [26]

<FAE>
Since your CPU VRM has no
DPRSTP# pin, connect
PM_DPRSLPVR to IMVP6 is correct

PM_DPRSLPVR [6,29]CLKRUN#[22,26]

DNBSWON# [26]

PLTRST# [15,19,20,23,24,26]

CK_PWRGD [2]
ECPWROK [26]
MPWROK [6]

CL_CLK0 [6]
CL_CLK1 [23]

CL_DATA0 [6]
CL_DATA1 [23]

CL_RST#0 [6]

HDPACT [19,26]

HDPINT [19,26]

CLKUSB_48 14M_ICH

R211

R211

10_4

10_4

C208

C208

6.8P_4

6.8P_4

If no use internal LAN MAC connect
LAN_RST# to PLTRST#
Use internal LAN MAC connect
LAN_RST# to RSMRST#
should go high no sooner than 10
ms after both VccLAN3_3 and
VccLAN1_5 have reached their
nominal voltages.

R378

R378

3.24K_6

3.24K_6

C134

C134

.1U_4

.1U_4

R377

R377
453_4

453_4

1

R160

R160

*33_4

*33_4

C128

C128

*10P_4

*10P_4

+3V+3V_S5

R229

R229

3.24K_6

3.24K_6

C235

C235

.1U_4

.1U_4

R230

R230
453_4

453_4

+3VSUS

53

1

2

R185 10K_4R185 10K_4

R184 10K_4R184 10K_4

R179 10K_4R179 10K_4

R239 *10K_4R239 *10K_4

Internal Pull up

R358 *10K_4R358 *10K_4

R140 *10K_4R140 *10K_4

R145 10K_4R145 10K_4

R359 2.2K_4R359 2.2K_4

R128 2.2K_4R128 2.2K_4

R360 10K_4R360 10K_4

R146 1K_4R146 1K_4

R158 8.2K_4R158 8.2K_4

R183 10K_4R183 10K_4

R120 always stuff

R120

R120

10K_4

10K_4

R141

R141

*10K_4

*10K_4

R141 always not stuff

H

L

DELAY_VR_PWRGOOD

ECPWROK

R233 100K_4R233 100K_4

SMLINK0

SMLINK1

SYS_RST#

DNBSWON#

ICH_GPIO24

HDPACT

RI#

SCLK

SDATA

SMB_ALERT#

PCIE_WAKE#

PM_BATLOW#_R

GPIO12

ID0ID1Board ID

H

L

H

L

TC7SH08FU

TC7SH08FU

+3V

C130 .1U_4C130 .1U_4

U17

U17

1

5

VR_PWRGD_CK410#[29]

No Reboot strap

B B

SPKR Low = Default

SPKR

GPIO35

THERM_ALERT#

SERIRQ

CLKRUN#

MCH_ICH_SYNC#_R

CL_RST#1

KBSMI#_ICH

SCI#

ICH_GPIO22

ICH_GPIO48

RST_HDD#

GPIO36

A A

GPIO37

PM_DPRSLPVR

ICH_PWROK

ICH_GPIO14

HDPINT

High = No Reboot

BIOS/ ERIC: UNSTUFF

2

43

NC7SZ04

NC7SZ04

R362 100K_4R362 100K_4

R178 *10K_4R178 *10K_4

R380 10K_4R380 10K_4

R187 8.2K_4R187 8.2K_4

R157 10K_4R157 10K_4

R371 8.2K_4R371 8.2K_4

R381 *10K_4R381 *10K_4

R151 10K_4R151 10K_4

R390 10K_4R390 10K_4

R366 10K_4R366 10K_4

R134 10K_4R134 10K_4

R138 10K_4R138 10K_4

R137 10K_4R137 10K_4

R133 8.2K_4R133 8.2K_4

R132 8.2K_4R132 8.2K_4

R368 100K_4R368 100K_4

R170 10K_4R170 10K_4

R166 10K_4R166 10K_4

R468 *10K_4R468 *10K_4

5

VR_PWRGD_CLKEN

+3V

NEW CARD

CARD BUS

CCFL Panel

LED Panel

W/ G-SENSOR

W/O G-SENSOR

7 HOT_KEY

3 HOT_KEY

W/ ROBSON

W/O ROBSON

DELAY_VR_PWRGOOD[3,6,29]

ID4

H

L

ID2ID3

H

L

4

U5

U5

4

ICH_PWROK

.1U_4C250 .1U_4C250

+3V_S5

HOT_KEY 24

High : 7 key
Low : 3 key

3

INTEL CRB NEED THOSE PU & PD.

PM_LAN_ENABLE_R

R122 10K_4R122 10K_4

INTEL CRB SHOW IT

ICH_GPIO39

R372 10K_4R372 10K_4

INTEL CRB SHOW IT

PM_LAN_ENABLE_R

R121 *0_4R121 *0_4

DISABLE LAN: STUFF

+3V+3V

R136

R136

*10K_4

*10K_4

BOARD_ID2 BOARD_ID0BOARD_ID1

R135

R135

10K_4

10K_4

BOARD_ID4HOT_KEY

R290

R290

R269

R269

*10K_4

*10K_4

10K_4

10K_4

+3V

+3V+3V +3V

R382

R382

*10K_4

*10K_4

R370

R370

10K_4

10K_4

2

INTEL FAE
"Add RSMRST# isolation"

RSMRST#_R

R373

R373

*10K_4

*10K_4

R374

R374

10K_4

10K_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Controller Link 1 VREF for IAMT support only

Q5

Q5
MMBT3906

MMBT3906

3 1

2

R155

R155
10K_4

10K_4

2

3

1

2

3

R210

R210

1

2.2K_4

2.2K_4

ICH8M GPIO(3 of 4)

ICH8M GPIO(3 of 4)

ICH8M GPIO(3 of 4)

R200 4.7K_4R200 4.7K_4

D8
BAV99D8BAV99

D9
BAV99D9BAV99

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

1

RSMRST# [26]

FROM uR(EC)TO ICH8

+3VSUS

16 33Friday, May 25, 2007

16 33Friday, May 25, 2007

16 33Friday, May 25, 2007

3B

3B

3B

of

of

of

5

http://adf.ly/LOM1

+3V_S5

21

D24

D24

PDZ5.6B

R353 10_6R353 10_6

+5V_S5

D D

+1.5V

+1.5V

R388 0_8R388 0_8

C C

+3V

+1.5V

R349 0_6R349 0_6

R213 0_6R213 0_6

R244 1_8R244 1_8

+1.5V_PCIE

B B

A A

PDZ5.6B

C218

C218

.1U_4

.1U_4

L18

L18
FBMJ2125HS420-T_8

FBMJ2125HS420-T_8

PBY160808T-301Y-N_6

PBY160808T-301Y-N_6

C220

C220

4.7U_6

4.7U_6

5

R235 100/F_6R235 100/F_6

+5V

+1.5V_PCIE

+

+

330U_3528

330U_3528

R383 0_8R383 0_8

+1.5V_USB

C221

C221

.1U_4

.1U_4

L7

L7

C372

C372

C210

C210

22U_8

22U_8

+1.5V_APLL_RR

C238

C238

10U_6

10U_6

+3V

+3V

VCCRTC

21

D10

D10

PDZ5.6B

PDZ5.6B

C191

C191

.1U_4

.1U_4

C203

C203

22U_8

22U_8

L19

L19
10UH_8

10UH_8

CV01001MN08

CV01001MN08

C217

C217

1U_6

1U_6

C212

C212

1U_6

1U_6

C205

C205

.1U_4

.1U_4

C371

C371

.1U_4

.1U_4

C241

C241

2.2U_6

2.2U_6

R231 0_6R231 0_6

C153

C153

1U_4

1U_4

C167

C167

2.2U_6

2.2U_6

C385

C385

10U_6

10U_6

+1.5V_SATA

TP_VCCLAN1_05_ICH_1
TP_VCCLAN1_05_ICH_2

+3V_VCCLAN

+1.5V_VCCGLANPLL

C154

C154

.1U_4

.1U_4

+5VREF_SB

+5VREF_SUS_SB

+1.5V_APLL+1.5V_SATA

C384

C384

1U_6

1U_6

+3V_GLAN

4

4

C152

C152

.1U_4

.1U_4

AD25

AA25
AA26
AA27
AB27
AB28
AB29

M24
M25

W25

AG7
AH7

AC1
AC2
AC3
AC4
AC5

AC10

AC9

AC7
AD7

W23

A16

T7

G4

D28
D29
E25
E26
E27
F24
F25
G24
H23
H24

J23

J24
K24
K25
L23
L24
L25

N23
N24
N25
P24
P25
R24
R25
R26
R27
T23
T24
T27
T28
T29
U24
U25
V23
V24
V25

Y25

AJ6

AE7
AF7

AJ7

AA5
AA6

G12
G17

H7

D1

F1
L6

L7
M6
M7

F17
G18

F19
G20

A24

A26
A27
B26
B27
B28

B25

U16F

U16F

VCCRTC

V5REF[1]
V5REF[2]

V5REF_SUS

VCC1_5_B[01]
VCC1_5_B[02]
VCC1_5_B[03]
VCC1_5_B[04]
VCC1_5_B[05]
VCC1_5_B[06]
VCC1_5_B[07]
VCC1_5_B[08]
VCC1_5_B[09]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]
VCC1_5_B[14]
VCC1_5_B[15]
VCC1_5_B[16]
VCC1_5_B[17]
VCC1_5_B[18]
VCC1_5_B[19]
VCC1_5_B[20]
VCC1_5_B[21]
VCC1_5_B[22]
VCC1_5_B[23]
VCC1_5_B[24]
VCC1_5_B[25]
VCC1_5_B[26]
VCC1_5_B[27]
VCC1_5_B[28]
VCC1_5_B[29]
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC1_5_B[33]
VCC1_5_B[34]
VCC1_5_B[35]
VCC1_5_B[36]
VCC1_5_B[37]
VCC1_5_B[38]
VCC1_5_B[39]
VCC1_5_B[40]
VCC1_5_B[41]
VCC1_5_B[42]
VCC1_5_B[43]
VCC1_5_B[44]
VCC1_5_B[45]
VCC1_5_B[46]

VCCSATAPLL

VCC1_5_A[01]
VCC1_5_A[02]
VCC1_5_A[03]
VCC1_5_A[04]
VCC1_5_A[05]

VCC1_5_A[06]
VCC1_5_A[07]
VCC1_5_A[08]
VCC1_5_A[09]
VCC1_5_A[10]

VCC1_5_A[11]
VCC1_5_A[12]

VCC1_5_A[13]
VCC1_5_A[14]

VCC1_5_A[15]
VCC1_5_A[16]
VCC1_5_A[17]

VCC1_5_A[18]
VCC1_5_A[19]

VCCUSBPLL

VCC1_5_A[20]
VCC1_5_A[21]
VCC1_5_A[22]
VCC1_5_A[23]
VCC1_5_A[24]

VCC1_5_A[25]

VCCLAN1_05[1]
VCCLAN1_05[2]

VCCLAN3_3[1]
VCCLAN3_3[2]

VCCGLANPLL

VCCGLAN1_5[1]
VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[4]
VCCGLAN1_5[5]

VCCGLAN3_3

ICH8M REV 1.0

ICH8M REV 1.0

CORE

CORE

VCCA3GP ATXARX

VCCA3GP ATXARX

VCCP_COREVCCPSUSVCCPUSB

VCCP_COREVCCPSUSVCCPUSB

IDE

IDE

PCI

PCI

VCCSUS1_05[1]
VCCSUS1_05[2]

VCCSUS1_5[1]

VCCSUS1_5[2]

VCCSUS3_3[01]

VCCSUS3_3[02]
VCCSUS3_3[03]
VCCSUS3_3[04]
VCCSUS3_3[05]

USB CORE

USB CORE

VCCSUS3_3[06]

VCCSUS3_3[07]
VCCSUS3_3[08]
VCCSUS3_3[09]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]

GLAN POWER

GLAN POWER

VCC1_05[01]
VCC1_05[02]
VCC1_05[03]
VCC1_05[04]
VCC1_05[05]
VCC1_05[06]
VCC1_05[07]
VCC1_05[08]
VCC1_05[09]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]
VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]
VCC1_05[27]
VCC1_05[28]

VCCDMIPLL

VCC_DMI[1]
VCC_DMI[2]

V_CPU_IO[1]
V_CPU_IO[2]

VCC3_3[01]

VCC3_3[02]

VCC3_3[03]
VCC3_3[04]
VCC3_3[05]
VCC3_3[06]

VCC3_3[07]
VCC3_3[08]
VCC3_3[09]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]

VCC3_3[14]
VCC3_3[15]
VCC3_3[16]
VCC3_3[17]
VCC3_3[18]
VCC3_3[19]
VCC3_3[20]
VCC3_3[21]
VCC3_3[22]
VCC3_3[23]
VCC3_3[24]

VCCHDA

VCCSUSHDA

VCCCL1_05

VCCCL1_5

VCCCL3_3[1]
VCCCL3_3[2]

A13
B13
C13
C14
D14
E14
F14
G14
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

R29

AE28
AE29

AC23
AC24

AF29

AD2

AC8
AD8
AE8
AF8

AA3
U7
V7
W1
W6
W7
Y7

A8
B15
B18
B4
B9
C15
D13
D5
E10
E7
F11

AC12

AD11

J6
AF20

AC16

J7

C3

AC18
AC21
AC22
AG20
AH28

P6
P7
C1
N7
P1
P2
P3
P4
P5
R1
R3
R5
R6

TP_VCCCL1_05_ICH

G22

VCCCL1_5_INT_ICH

A22

+V3.3M_ICH

F20
G21

3

+1.05V_SB

C190

C190

.1U_4

.1U_4

VCCDMIPLL_ICH

+1.25V_DMI

+1.05V_V_CPU_IO

+V3.3_DMI_ICH

+V3.3_SATA_ICH

+V3.3S_VCCPCORE_ICH

+V3.3S_IDE_ICH

C168

C168

.1U_4

.1U_4

+V3.3S_PCI_ICH

C236

C236

.1U_4

.1U_4

+3V_1.5V_HDA_IO_ICH

+VCCSUSHDA

TP_VCCSUS1_05_ICH_1
TP_VCCSUS1_05_ICH_2

TP_VCCSUS1_5_ICH_1

TP_VCCSUS1_5_ICH_2

+V3.3A_ICH

+V3.3A_USB_ICH

R212 0_6R212 0_6

3

R238 0_1206R238 0_1206

C180

C180

10U_8

10U_8

C374

C374

22U_8

22U_8

C223

C223

.1U_4

.1U_4

R228 0_6R228 0_6

C163

C163

C127

C127

22N_4

22N_4

.1U_4

.1U_4

R352 0_8R352 0_8

C373

C373

4.7U_6

4.7U_6

C240

C240

1U_6

1U_6

C188

C188

.01U_4

.01U_4

R356 0_8R356 0_8

C159

C159

.1U_4

.1U_4

C155

C155

.1U_4

.1U_4

C233

C233

.1U_4

.1U_4

C166

C166

.1U_6

.1U_6

C239

C239

*.1U_4

*.1U_4

+1.05V

L6

L6

C189

C189

10U_6

10U_6

+1.25V

C164

C164

.1U_4

.1U_4

C381

C381

.1U_4

.1U_4

R189 0_6R189 0_6

+3V_S5

TP_VCCLAN1_05_ICH_1
TP_VCCLAN1_05_ICH_2

TP_VCCSUS1_05_ICH_1
TP_VCCSUS1_05_ICH_2

TP_VCCSUS1_5_ICH_1
TP_VCCSUS1_5_ICH_2
TP_VCCCL1_05_ICH

+3V

2

R204 1_8R204 1_8

PBY160808T-301Y-N_6

PBY160808T-301Y-N_6

R192 0_6R192 0_6

C165

C165

4.7U_6

4.7U_6

R357 0_6R357 0_6

R176 0_6R176 0_6

R173 0_6R173 0_6

R190 0_6R190 0_6

R234 0_6R234 0_6

+3V_S5

C216 .1U_6C216 .1U_6
C215 .1U_6C215 .1U_6

C211 .1U_6C211 .1U_6
C157 .1U_6C157 .1U_6

2

+1.5V

+1.05V

+3V

R386 0_6R386 0_6
R391 *0_6R391 *0_6

C161

C161

.1U_4

.1U_4

T62T62
T66T66
T67T67

1

U16E

U16E

A23

VSS[001]

A5

VSS[002]

AA2

VSS[003]

AA7

VSS[004]

A25

VSS[005]

AB1

VSS[006]

AB24

VSS[007]

AC11

VSS[008]

AC14

VSS[009]

AC25

VSS[010]

AC26

VSS[011]

AC27

VSS[012]

AD17

VSS[013]

AD20

VSS[014]

AD28

VSS[015]

AD29

VSS[016]

AD3

VSS[017]

AD4

VSS[018]

AD6

VSS[019]

AE1

VSS[020]

AE12

VSS[021]

AE2

VSS[022]

AE22

VSS[023]

AD1

VSS[024]

AE25

VSS[025]

AE5

VSS[026]

AE6

VSS[027]

AE9

VSS[028]

AF14

VSS[029]

AF16

VSS[030]

AF18

VSS[031]

AF3

VSS[032]

AF4

VSS[033]

AG5

VSS[034]

AG6

VSS[035]

AH10

VSS[036]

AH13

VSS[037]

AH16

VSS[038]

AH19

VSS[039]

AH2

VSS[040]

AF28

VSS[041]

AH22

VSS[042]

AH24

VSS[043]

AH26

VSS[044]

AH3

VSS[045]

AH4

VSS[046]

AH8

VSS[047]

AJ5

VSS[048]

B11

VSS[049]

B14

VSS[050]

B17

VSS[051]

B2

VSS[052]

B20

VSS[053]

B22

VSS[054]

B8

VSS[055]

C24

VSS[056]

C26

VSS[057]

C27

VSS[058]

C6

VSS[059]

D12

VSS[060]

D15

VSS[061]

D18

VSS[062]

D2

VSS[063]

D4

VSS[064]

+3V
+1.5V

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

ICH8M Power(4 of 4)

ICH8M Power(4 of 4)

ICH8M Power(4 of 4)

Date: Sheet

Date: Sheet

Date: Sheet

E21

VSS[065]

E24

VSS[066]

E4

VSS[067]

E9

VSS[068]

F15

VSS[069]

E23

VSS[070]

F28

VSS[071]

F29

VSS[072]

F7

VSS[073]

G1

VSS[074]

E2

VSS[075]

G10

VSS[076]

G13

VSS[077]

G19

VSS[078]

G23

VSS[079]

G25

VSS[080]

G26

VSS[081]

G27

VSS[082]

H25

VSS[083]

H28

VSS[084]

H29

VSS[085]

H3

VSS[086]

H6

VSS[087]

J1

VSS[088]

J25

VSS[089]

J26

VSS[090]

J27

VSS[091]

J4

VSS[092]

J5

VSS[093]

K23

VSS[094]

K28

VSS[095]

K29

VSS[096]

K3

VSS[097]

K6

VSS[098]

ICH8M REV 1.0

ICH8M REV 1.0

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

VSS_NCTF[01]
VSS_NCTF[02]
VSS_NCTF[03]
VSS_NCTF[04]
VSS_NCTF[05]
VSS_NCTF[06]
VSS_NCTF[07]
VSS_NCTF[08]
VSS_NCTF[09]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]

1

VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]

K7
L1
L13
L15
L26
L27
L4
L5
M12
M13
M14
M15
M16
M17
M23
M28
M29
M3
N1
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
N4
N5
N6
P12
P13
P14
P15
P16
P17
P23
P28
P29
R11
R12
R13
R14
R15
R16
R17
R18
R28
R4
T12
T13
T14
T15
T16
T17
T2
U12
U13
U14
U15
U16
U17
U23
U26
U27
U3
U5
V13
V15
V28
V29
W2
W26
W27
Y28
Y29
Y4
AB4
AB23
AB5
AB6
AD5
U4
W24

A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29

of

of

of

17 33Friday, May 25, 2007

17 33Friday, May 25, 2007

17 33Friday, May 25, 2007

3A

3A

3A

5

http://adf.ly/LOM1

CRT PORT

D1 SSM14D1 SSM14

2 1

+5V

CRT_R[6]

D D

CRT_G[6]

CRT_B[6]

CRT_R

CRT_G

CRT_B

R453

R453
150_4

150_4

C12

C12
10P_4

10P_4

R452

R452
150_4

150_4

C11

C11
10P_4

10P_4

F2

F2

FUSE1A6V_POLY-1A-6V

FUSE1A6V_POLY-1A-6V

L34 BLM18BA220SN1D_6L34 BLM18BA220SN1D_6

L33 BLM18BA220SN1D_6L33 BLM18BA220SN1D_6

L32 BLM18BA220SN1D_6L32 BLM18BA220SN1D_6

R451

R451

C10

C10

150_4

150_4

10P_4

10P_4

12

C3 .1U_4C3 .1U_4

5V_CRT2

25 MIL

C5
10P_4C510P_4

CRT_R1

CRT_G1

CRT_B1

C6
10P_4C610P_4

4

CN35

CN35

1617

CRT_DSUB-070546FR015SX05ZX-

CRT_DSUB-070546FR015SX05ZX-

C8
10P_4C810P_4

6

7
2
8
3
9
4

10

5

111

12

13

14

15

D2 MTW355D2 MTW355

CRT_SENSE# [15,26]

3

INT_LVDS_DIGON[6]

+3V +3V

+3V

C485

C485

C527

C527

1000P_4

1000P_4

*.1U_4

*.1U_4

<demo circuit>
Crestline suggest 100K

C486

C486

.1U_4

.1U_4

2

U25

R441

R441

100K_4

100K_4

6

4

3

U25

IN

IN

ON/OFF

AAT4280

AAT4280

LCDVCC_1

1

OUT

2

GND

5

GND

C481

C481

.1U_4

.1U_4

R440 0_8R440 0_8

C484

C484

10U_8

10U_8

C479

C479

.1U_4

.1U_4

1

LCDVCC

C526

C480

C480

10U_8

10U_8

C526

.1U_4

.1U_4

C478

C478

.01U_4

.01U_4

LCD/LED TYPE CONNECTOR

3
1

3
1

3
1

3
1

1
3

3
1

40

45
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

LED_GND6

LED_GND5
LED_GND4

LED_GND3
LED_GND2

LED_GND1

INT_LVDS_EDIDDATA

INT_LVDS_EDIDCLK

INT_LVDS_EDIDCLK
INT_LVDS_EDIDDATA

INT_TXLCLKOUT-INT_TXLCLKOUT-INT_TXLCLKOUT-

INT_TXLCLKOUT­INT_TXLCLKOUT+

USBP8­USBP8+

CCD_POWER

LCDVCC
LCDVCC

USBP8-_LED
USBP8+_LED

LED_TXLOUT2+
LED_TXLOUT2-

LED_TXLOUT1+
LED_TXLOUT1-

LED_TXLOUT0+
LED_TXLOUT0-

LED_TXLCLKOUT+
LED_TXLCLKOUT-

LED_EDIDDATA
LED_EDIDCLK

LED_GND1
LED_GND2
LED_GND3
LED_GND4
LED_GND5
LED_GND6

LED_PWR

D-MIC_CLK_LCD
D-MIC_DATA_LCD

INT_LVDS_EDIDCLK [6]
INT_LVDS_EDIDDATA [6]

INT_TXLCLKOUT- [6]
INT_TXLCLKOUT+ [6]

USBP8- [15]
USBP8+ [15]

+3V

2

LCD_TXLOUT2­LCD_TXLOUT2+

LED_TXLOUT2+
LED_TXLOUT2-

LCD_TXLOUT1­LCD_TXLOUT1+

LED_TXLOUT1+
LED_TXLOUT1-

LCD_TXLOUT0­LCD_TXLOUT0+

LED_TXLOUT0+
LED_TXLOUT0-

RP10 LCD@0_4P2R_SRP10 LCD@0_4P2R_S

4
2

RP9 LED@0_4P2R_SRP9 LED@0_4P2R_S

4
2

RP8 LCD@0_4P2R_SRP8 LCD@0_4P2R_S

4
2

RP7 LED@0_4P2R_SRP7 LED@0_4P2R_S

4
2

RP6 LCD@0_4P2R_SRP6 LCD@0_4P2R_S

4
2

RP5 LED@0_4P2R_SRP5 LED@0_4P2R_S

4
2

INT_TXLOUT2-INT_TXLOUT2-INT_TXLOUT2-

INT_TXLOUT2-

3

INT_TXLOUT2+

1

3
1

INT_TXLOUT1-INT_TXLOUT1-INT_TXLOUT1-INT_TXLOUT1-

INT_TXLOUT1-INT_TXLOUT1-

3

INT_TXLOUT1+

1

3
1

INT_TXLOUT0-INT_TXLOUT0-INT_TXLOUT0-INT_TXLOUT0-

INT_TXLOUT0-INT_TXLOUT0-

3

INT_TXLOUT0+

1

3
1

LCD PANEL MODULETOSHIBA LED PANEL MODULE

+3V

USBP8-_LCD
USBP8+_LCD

LCD_VADJ

DISPON
CCD_POWER
LCDVCC
LCDVCC

INVCC0
INVCC0
D-MIC_CLK_LCD
D-MIC_DATA_LCD
LCD_EDIDCLK
LCD_EDIDDATA

LCD_TXLCLKOUT­LCD_TXLCLKOUT+

LCD_TXLOUT0­LCD_TXLOUT0+

LCD_TXLOUT1­LCD_TXLOUT1+

LCD_TXLOUT2­LCD_TXLOUT2+

INT_MIC

D-MIC_CLK_LCD
D-MIC_DATA_LCD

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

INT_MIC

2

C529

C529

*1000P_4

*1000P_4

LCD/CRT/LID/CAMERA

LCD/CRT/LID/CAMERA

LCD/CRT/LID/CAMERA

1

C530

C530

CN2

CN2

*1000P_4

*1000P_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

1

INT_TXLOUT2- [6]
INT_TXLOUT2+ [6]

INT_TXLOUT1- [6]
INT_TXLOUT1+ [6]

INT_TXLOUT0- [6]
INT_TXLOUT0+ [6]

CN1

CN1

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

31

30

30

32

LCD@ACS_88242-3001

LCD@ACS_88242-3001

18 33Friday, May 25, 2007

18 33Friday, May 25, 2007

18 33Friday, May 25, 2007

of

of

of

31
32

3B

3B

3B

R445 2.2K_4R445 2.2K_4

+3V

U27

5V_CRT2

+5V

C492 .22U_6C492 .22U_6

+3V

CRT_R1
CRT_G1
CRT_B1

+5V

C C

B B

C494

C494
.1U_4

.1U_4

+3V

R253

R253
1K_4

1K_4

DISPON

2

Q24

1 3

DTC144EU

DTC144EU

U27

1

VCC_SYNC

7

VCC_DDC

8

BYP

2

VCC_VIDEO

3

VIDEO_1

4

VIDEO_2

5

VIDEO_3

6

GND

CM2009

CM2009

+3V

C493

C493
.1U_4

.1U_4

+3VPCU

C495

C495

.1U_4

.1U_4

D15 BAS316D15 BAS316

D13 BAS316D13 BAS316

R251 *1K_4R251 *1K_4

SYNC_OUT2
SYNC_OUT1

SYNC_IN2
SYNC_IN1

DDC_IN1
DDC_IN2

DDC_OUT1
DDC_OUT2

H=1.75mm

R268 100K_4R268 100K_4

1

3

16
14

15
13

10
11

9
12

LID591#

2

MR1

MR1
EC2648-B3-F

EC2648-B3-F

R243

R243

100K_4

100K_4

VSYNC1

R449 39_4R449 39_4

HSYNC1

R448 39_4R448 39_4

VSYNC
HSYNC

DDCCLK
DDCDAT

CRTDCLK
CRTDDAT

R250 0_4R250 0_4

DDCCLK

DDCDAT

HALL SENSOR

CAMERA MODULE

+5V

CCD_POWER

+

+

C482 CM@10U_8

C482 CM@10U_8

C487 CM@1000P_4C487 CM@1000P_4

C525 .1U_4C525 .1U_4

5

R443

R443
CM@4.7K_4

CM@4.7K_4

1 3

Q36

Q36
CM@DTC144EU

CM@DTC144EU

Q35

Q35

2

CM@AO3413

CM@AO3413

3

1

+5V

A A

2

DDCCLK [6]
DDCDAT [6]

VSYNC1_CRT
HSYNC1_CRT

VSYNC [6]
HSYNC [6]

R446 2.2K_4R446 2.2K_4

R450 2.2K_4R450 2.2K_4

LID591# [26]

INT_LVDS_BLON [6,26]

EC_FPBACK# [26]

CCD_POWERON [26]

L30 BLM18BA220SN1L30 BLM18BA220SN1
L31

L31

BLM18BA220SN1

BLM18BA220SN1

5V_CRT2

R454

R454

R455

R455

2.7K_4

2.7K_4

2.7K_4

2.7K_4

+3V

VIN

C488

C488

+

+

10U-25V_1210

10U-25V_1210

INT_LVDS_PWM[6]

CONTRAST[26]

VIN

F1

F1
LITTLE-0603-2A-32V

LITTLE-0603-2A-32V

1 2

C496

C496

10U/X6S-25V_1206

10U/X6S-25V_1206

LED_VIN

1U/X7R-25V_6

1U/X7R-25V_6

4

CRTHSYNC

C2

10P_4C210P_4

12

1000P_4

1000P_4

DISPON_O2

C499

C499

CRTVSYNC

C4

10P_4C410P_4

C490

C490

0.1U/X7R-50V_6

0.1U/X7R-50V_6

R442 *0_4R442 *0_4

R439 0_4R439 0_4

C483 *.1U_4C483 *.1U_4

L35

L35

10UH-88mR

10UH-88mR

LCD_VADJ_O2

1
2
3
4
5

LED_VREF

R474

R474

51K_4

51K_4

1 2

LED_PWR

R476

R476

1M_6

1M_6

R479

R479

75K_4

75K_4

C561

C561

LCD_VADJ

DISPON

OVP

U28

U28

ENA
NC
VREF
VIN
RT

C1

10P_4C110P_4

R4440_8 R4440_8

LED_SW

20

OVP6NC7ISET8SSTCMP9ISEN1

C7

10P_4C710P_4

INVCC0

LCD_VADJ

R402 10K_4R402 10K_4

R487 10K_4R487 10K_4

18

17

19

16

NC

NC

SW

ISEN5

PWM

ISEN6

ISEN4

GNDA

ISEN3
ISEN2

OZ9956

OZ9956

10

SSTCMP

R477

R477

75K_4

75K_4

USBP8-_LCD
USBP8+_LCD

USBP8-_LED
USBP8+_LED

D27

D27

B140

B140

15
14
13
12
11

21

PAD

R478

R478

10K/F_6

10K/F_6

C507

C507
10n_4

10n_4

DLW21HN900SQ2L

DLW21HN900SQ2L

1

1

DLW21HN900SQ2L

DLW21HN900SQ2L

LCD_VADJ_O2

C531 1n_4C531 1n_4

DISPON_O2

C532 10n_4C532 10n_4Q24

LED_ISEN5
LED_ISEN4
GND
LED_ISEN3
LED_ISEN2

LED_ISEN1

C500

C500
1n_4

1n_4

C506

C506
1n_4

1n_4

443
1

2

L37

L37

L38

L38

1

2

443

LED_PWR

C497

C497

10U/Y5V-50V_1210

10U/Y5V-50V_1210

LED_ISEN6

C501

C501
1n_4

1n_4

3
2

2
3

3

C502

C502
1n_4

1n_4

LCD_EDIDCLK
LCD_EDIDDATA

LED_EDIDDATA
LED_EDIDCLK

LCD_TXLCLKOUT­LCD_TXLCLKOUT+

LED_TXLCLKOUT+
LED_TXLCLKOUT-

USBP8-_LCD
USBP8+_LCD

USBP8-_LED
USBP8+_LED

USBP8­USBP8+

C498

C498

10U/Y5V-50V_1210

10U/Y5V-50V_1210

C503

C503
1n_4

1n_4

C504

C504
1n_4

1n_4

R447 2.2K_4R447 2.2K_4

RP2 LCD@0_4P2R_SRP2 LCD@0_4P2R_S

RP1 LED@0_4P2R_SRP1 LED@0_4P2R_S

RP4 LCD@0_4P2R_SRP4 LCD@0_4P2R_S

RP3 LED@0_4P2R_SRP3 LED@0_4P2R_S

RP12

RP12

RP11 LED@0_4P2R_SRP11 LED@0_4P2R_S

44
43
42
41

CN4

CN4
LVC-C40SFYG-40P

LVC-C40SFYG-40P

R469 10/F_4R469 10/F_4

R470 10/F_4R470 10/F_4
R471 10/F_4R471 10/F_4

R472 10/F_4R472 10/F_4
R473 10/F_4R473 10/F_4

R475 10/F_4R475 10/F_4

C505

C505
1n_4

1n_4

4
2

4
2

4
2

4
2

LCD@0_4P2R_S

LCD@0_4P2R_S

2
4

4
2

46

5

http://adf.ly/LOM1

4

3

2

1

ODD

-IDERST

PDD[0..15][14]

PDDREQ[14]
PDIOW#[14]
PDIOR#[14]
PDIORDY[14]

D D

PDDACK#[14]
IRQ14[14]
PDA1[14]
PDA0[14]
PDCS1#[14]
PDA2[14]
PDCS3#[14]

ODD_LED#[25]

PDD[0..15]

PDDREQ
PDIOW#
PDIOR#
PDIORDY
PDDACK#
IRQ14
PDA1
PDA0
PDCS1#
PDA2
PDCS3#

ODD_LED#

+5V

PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0

PDIOW#

IRQ14
PDA1
PDA0
PDCS1#
ODD_LED#

R345 470_6R345 470_6

IN for Master

NC for Slave

+3V +5V

Q25

Q25

2

DTC144EU

C C

RST_HDD#[16]

PLTRST#[15,16,20,23,24,26]

R347 *0_4R347 *0_4

R348 0_4R348 0_4

DTC144EU

1 3

G SENSOR

MAINON[26,30,31,32]

U1

U1

B B

+3V_HDP

+3V_HDP

R100

R100
GS@*10K_4

GS@*10K_4

R101

A A

R101
GS@10K_4

GS@10K_4

34

NC

NC35NC36NC37NC38NC39NC40NC41NC42NC43NC

33

NC

32

NC

31

NC

30

NC

29

NC

28

Reserved

27

Reserved

26

Reserved

25

NC

24

NC

23

Reserved

Reserved

22

FS

Reserved

20NC21

GS@LIS3L02AQ3

GS@LIS3L02AQ3

Reserved

Reserved

18

19

Reserved

17

+5V_S5

C396

C396

GS@.1U-10V_4

GS@.1U-10V_4

15FS16

ACCELZ

44

NC12NC13PD14Voutz

R346

R346
10K_4

10K_4

-IDERST

NC

NC

NC

GND

VDD

Vouty

ST

Voutx

NC

NC

NC

CN23

CN23

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

515152

52

ODD_CONN

ODD_CONN

RES-TYPE

U19

U19

1

2

3

GS@G913-C

GS@G913-C

1

2

3

4

5

6

7

8

9

10

11

4

SHDN

VO

GND

5

VIN

SET

ACCELY

AXSTST

ACCELX

FS (Full Scale) selection

FS

PD (Power Down) selection

PD

PDD8
PDD9PDD7
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDDREQ
PDIOR#

PDDACK#PDIORDY

DIAG#

PDA2
PDCS3#

+3V

+3V

G691L308T73UF-SOT23

G691L308T73UF-SOT23

GS@.1U-10V_4

GS@.1U-10V_4

R350 *10K_4R350 *10K_4

C246

C246

C248

C248

1000P_6

1000P_6

.1U_4

.1U_4

<check list & FAE>
Must be PU even when IDE device is not use

R215 4.7K_4R215 4.7K_4

R214 8.2K_4R214 8.2K_4

C398

C398
GS@10U_8

GS@10U_8

3

Vcc

1

Reset#

2

GND

U29

U29

+3V_HDP

C91

C91

10

2g Full-Scale

6g Full-Scale

10

Normal Mode

Power-down mode

80 mils

+3V_HDP

HDPACT[16,26]

HDPINT[16,26]

C249

C249

.1U_4

.1U_4

G-RESET#

+5V

C254

C254
10U_8

10U_8

2ND_MBDATA[26]

SDATA[2,13,16,23,24]

2ND_MBCLK[26]

SCLK[2,13,16,23,24]

R96

R96
GS@47K/F_6

GS@47K/F_6

GS@33n-16V_4

GS@33n-16V_4

+5V

PDIORDY

SATA HDD

C252

C252

150U/6.3V_7343

150U/6.3V_7343

IRQ14

ADDRESS: 32H

R483 0_4R483 0_4

R484 *0_4R484 *0_4

R485 0_4R485 0_4

R486 *0_4R486 *0_4

R398 GS@1K_4R398 GS@1K_4

C401

C401

C402

C402

GS@33n-16V_4

GS@33n-16V_4

Close Chipset

+3V_HDP

ACCELX
ACCELY
ACCELZ
AXSTST

GND
HD_PINT

GS@33n-16V_4

GS@33n-16V_4

GND23

GND1

GND2

GND3

RSVD

GND24

SA@Serial_ATA

SA@Serial_ATA

Q32

Q32

GS@2N7002

GS@2N7002

3

Q31

Q31

GS@2N7002

GS@2N7002

3

16

7

18
17
15

11
10

9

5

C404

C404

CN33

CN33

23

1
2

RXP

3

RXN

4
5

TXN

6

TXP

7

8

3.3V

9

3.3V

10

3.3V

11

GND

12

GND

13

GND

14

5V

15

5V

16

5V

17

GND

18
19

GND

20

12V

21

12V

22

12V

24

+3V_HDP

2

1

+3V_HDP

2

1

U20

U20

HDPSCL

VCC
VCC

HDPSDA

RESET

ACCELX
ACCELY
ACCELZ
AXSTST2Reserved

HDPACT
HDPPD
HDPINT

VSS

MODE

Reserved
Reserved
Reserved
Reserved
Reserved

GS@R5F21174

GS@R5F21174

ACCELX

ACCELY

ACCELZ

SATA_TXP0
SATA_TXN0

SATA_RXN0
SATA_RXP0

+3.3VSATA

+5VSATA

KXP84_SDA

RP49

RP49

3
1

GS@4.7K_4P2R_S

GS@4.7K_4P2R_S

KXP84_SCL

KXP84_SCL

1

KXP84_SDA

20

3
8

4
6
12
13
14
19

C388

C388

C391

C391

*4.7U_8

*4.7U_8

*.1U_4

*.1U_4

C101

C101

C100

C100

.1U_4

.1U_4

4
2

G-RESET#

XIN_G
XOUT_G

C389

C389

.1U_4

.1U_4

10U_8

10U_8

+3V_HDP

R399 GS@10K_4R399 GS@10K_4
R401 GS@10K_4R401 GS@10K_4

R99 GS@10K_4R99 GS@10K_4
R400 GS@10K_4R400 GS@10K_4

GS@.1U-10V_4

GS@.1U-10V_4

HDPPD selection

HDPPD

0

Normal Mode1Power-down mode

R395 *0_8R395 *0_8

R387 0_8R387 0_8

C387

C387

150U/6.3V_7343

150U/6.3V_7343

+3V_HDP +3V_HDP+3V_HDP

C403

C403

GS@.1U-10V_4

GS@.1U-10V_4

XIN_G

C394 GS*22P_6C394 GS*22P_6

Y5

Y5

2 1

XOUT_G

C395 GS*22P_6C395 GS*22P_6

+3V_HDP

SATA_TXP0 [14]
SATA_TXN0 [14]

SATA_RXN0 [14]
SATA_RXP0 [14]

C397

C397

GS*8 MHz

GS*8 MHz

+3V

+5V

5

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

Size Document Number Rev

Size Document Number Rev

Close Chipset

4

3

2

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

PROJECT : BU1 Santa Rosa

PATA/ODD/G SENSOR

PATA/ODD/G SENSOR

PATA/ODD/G SENSOR

1

2A

2A

19 33Friday, May 25, 2007

19 33Friday, May 25, 2007

19 33Friday, May 25, 2007

2A

of

of

of

5

http://adf.ly/LOM1

4

3

2

1

MDI0+
MDI0-

MDI1+
MDI1-

MDI2+
MDI2-

MDI3+
MDI3-

DVDD15

AVDD33

XTAL1

XTAL2

GVDD

CTRL15

RSET

U10

U10

1

VCTRL18

2

AVDD33

3

MDIP0

4

MDIN0

5

AVDD18

6

MDIP1

7

MDIN1

8

AVDD18

9

MDIP2

10

MDIN2

11

AVDD18

12

MDIP3

13

MDIN3

14

AVDD18

15

VDD15

16

VDD33

PCIE_WAKE#
PERSTB

DVDD15
EVDD18

PCIE_TXP4
PCIE_TXN4

62

58

59

64

63

65

60

GND

RSET

PCLK_SMB

17

LED057LED156LED255LED3

GVDD

VDD15

CKTAL261CKTAL1

AVDD33

VCTRL15

RTL8111B/8111C/8101E

RTL8111B/8111C/8101E

PDAT_SMB18LANWAKEB#

PERSTB#20VDD1521EVDD1822HSIP23HSIN24EGND25REFCLK_P26REFCLK_N27EVDD1828HSOP29HSON30EGND31VDD15

19

T87T87

T86T86

52

49

50

54

NC51NC

VDD3353VDD15

VDD15

48

EESK

47

EEDI

46

VDD33

45

EEDO

44

EECS

43

VDD15

42

NC

41

VDD1

40

NC

39

NC

38

VDD15

37

VDD33

36

ISOLATEB#

35

NC

34

NC

33

VDD15

32

DVDD15

EGND
PCIE_RXN4_R
PCIE_RXP4_R

EVDD18

CLK_PCIE_LAN#

CLK_PCIE_LAN

EGND

DVDD15

AVDD33

Y2

Y2

D D

C C

MDI0 Pair

MDI1 Pair

25.0000 MHz

25.0000 MHz

C323

C323

27P_6

27P_6

21

100Ohm

Tx

Rx

To SB TX

C314

C314

27P_6

27P_6

PCIE_WAKE#[16,23,24]

PLTRST#[15,16,19,23,24,26]

PCIE_TXP4[15]
PCIE_TXN4[15]

C316

C316

0.1U/10V_4

0.1U/10V_4

MDI0+[24]
MDI0-[24]

MDI1+[24]
MDI1-[24]

T93T93
T89T89

T90T90
T92T92

T91T91
T88T88

C318

C318

0.1U/10V_4

0.1U/10V_4

CTRL18
AVDD33

AVDD18

AVDD18

AVDD18

AVDD18
DVDD15
VDD33

DVDD15
EVDD18

CTRL15

R304 2K/F_4R304 2K/F_4

CTRL18
AVDD33

AVDD18

AVDD18

AVDD18

AVDD18
DVDD15
VDD33

R302 0_4R302 0_4

EESK
EEDI

EEDO
EECS

C328 .1U_4C328 .1U_4
C326 .1U_4C326 .1U_4

LAN_ACT#

LAN_LINK#

VDD33

DVDD15

DVDD15

VDD33

DVDD15

DVDD15

DVDD15
VDD33

ISOLATEB

DVDD15

DVDD15

EGND

EVDD18

EGND

VDD33

DVDD15

DVDD15

DVDD15
VDD33

DVDD15

LAN_ACT# [24]

LAN_LINK# [24]

VDD33

DVDD15

DVDD15

+3V

R330

R330

1K_4

1K_4

12

R329

R329

15K_4

15K_4

PCIE_RXN4 [15]
PCIE_RXP4 [15]

CLK_PCIE_LAN# [2]
CLK_PCIE_LAN [2]

VDD33

+3V_S5

To SB RX

93C56: STUFF
93C46: NOSTUFF

R313 *10K_4R313 *10K_4
R312 3.6K_6R312 3.6K_6

MDI0+

MDI0-

MDI1+

MDI1-

12

close chipset

R298 49.9/F_4R298 49.9/F_4

R299 49.9/F_4R299 49.9/F_4

R335 49.9/F_4R335 49.9/F_4

R334 49.9/F_4R334 49.9/F_4

close connector

EECS
EESK
EEDI
EEDO

U11

U11

1

CS

VCC

2

SK

3

DC

DI

ORG

DO4GND

93C46-3GR

93C46-3GR

C295 .01U/16V_4C295 .01U/16V_4

C353 .01U/16V_4C353 .01U/16V_4

VDD33

8
7
6
5

C355

C355

.1U/16V_4

.1U/16V_4

R488 0_6R488 0_6

Q40

Q40
*AO6402

*AO6402

LANVCC

C340

C340

22U_8

22U_8

LANVCC

+3V_S5

B B

LANVCC_EN[26]

A A

+3VPCU

65241

3

C539

C539
*0.1U/X7R-50V_6

*0.1U/X7R-50V_6

L17

CTRL15 DVDD15

L17

PBY160808T-301Y-N_6

PBY160808T-301Y-N_6

C354

C354

22U_8

22U_8

5

L16

L16

PBY160808T-301Y-N_6

PBY160808T-301Y-N_6

C538

C538

*0.1U/X7R-50V_6

*0.1U/X7R-50V_6

C347

C347

0.1U/10V_4

0.1U/10V_4

C304

C304

0.1U/10V_4

0.1U/10V_4

C352

C352

22U/10V_8

22U/10V_8

C333

C333

0.1U/10V_4

0.1U/10V_4

C305

C305

0.1U/10V_4

0.1U/10V_4

C315

C315

0.1U/10V_4

0.1U/10V_4

4

BK1608HS220_6

BK1608HS220_6

C346

C346

0.1U/10V_4

0.1U/10V_4

L12

L12

C322

C322

0.1U/10V_4

0.1U/10V_4

C344

C344

0.1U/10V_4

0.1U/10V_4

C325

C325

0.1U/10V_4

0.1U/10V_4

C312

C312

0.1U/10V_4

0.1U/10V_4

C343

C343

0.1U/10V_4

0.1U/10V_4

C341

C341

0.1U/10V_4

0.1U/10V_4

C320

C320

0.1U/10V_4

0.1U/10V_4

C342

C342

0.1U/10V_4

0.1U/10V_4

AVDD33

C332

C332

0.1U/10V_4

0.1U/10V_4

VDD33

C345

C345

0.1U/10V_4

0.1U/10V_4

AVDD33

3

VDD33

L13

CTRL18 AVDD18

CTRL18 AVDD18

DVDD15CTRL15

C327

C327

C321

C321

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

L13

PBY160808T-301Y-N_6

PBY160808T-301Y-N_6

C308

C308

22U_8

22U_8

C294

C294

22U_8

22U_8

C300

C300

0.1U/10V_4

0.1U/10V_4

2

C296

C301

C301

0.1U/10V_4

0.1U/10V_4

R306 0_6R306 0_6

L14

L14

BK1608HS220_6

BK1608HS220_6

L15

L15

BK1608HS220_6

BK1608HS220_6

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

PCIE LAN 10/100M RTL8101E

PCIE LAN 10/100M RTL8101E

PCIE LAN 10/100M RTL8101E

Date: Sheet

Date: Sheet

Date: Sheet

C296

C302

C302

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

EVDD18

C317

C317

C324

C324

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

EGND

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

C303

C303

0.1U/10V_4

0.1U/10V_4

1

EVDD18

20 33Friday, May 25, 2007

20 33Friday, May 25, 2007

20 33Friday, May 25, 2007

AVDD18 [23,24]

of

of

of

3A

3A

3A

5

http://adf.ly/LOM1

+3V

C253

CB@.1U_4

CB@.1U_4

CB@.1U_4

CB@.1U_4

VCCD0#
VCCD1#

C263

C263

C242

C242

C253

CB@.1U_4

CB@.1U_4

C256

C256

CB@.1U_4

CB@.1U_4

AJ014100T41

C283

C283

CB@.1U_4

CB@.1U_4

C363

C363

C258

C258

CB@.1U_4

CB@.1U_4

CB@.1U_4

CB@.1U_4

C243

C243

C360

C360

CB@.1U_4

CB@.1U_4

CB@.1U_4

CB@.1U_4

AD[31..0][15,22]

H=2mm

U8

U8

1

VCCD0#

2

VCCD1#

3

3.3V

4

3.3V

5

5V

6

5V

7

GND

8

OC#

CB@ENE CP-2211

CB@ENE CP-2211

C287

C287

CB@4.7U_6

CB@4.7U_6

5

C270

C270

CB@.1U_4

CB@.1U_4

SHDN#
VPPD0
VPPD1

AVCC
AVCC
AVCC
AVPP

INTC#[15]

SERIRQ[16,22,23,26]

PCI_PME#[15,22]

PCMSPK[24]

REQ1#[15]
GNT1#[15]

PCIRST#[15,22]

PCLK_PCM[2]

FRAME#[15,22]

IRDY#[15,22]

TRDY#[15,22]

DEVSEL#[15,22]

STOP#[15,22]
PERR#[15,22]
SERR#[15,22]

AD[31..0]

CBE0#[15,22]
CBE1#[15,22]
CBE2#[15,22]
CBE3#[15,22]

PAR[15,22]

+3V

16
15
14
13
12
11
10
9

12V

AVCC AVPP

C265

C265

CB@4.7U_6

CB@4.7U_6

VPPD0
VPPD1

C273

C273

CB@.1U_4

CB@.1U_4

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19

AD20

AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

CBE0#
CBE1#
CBE2#
CBE3#
PAR

AVCC

AVPP

C269

C269

CB@.1U_4

CB@.1U_4

C245

C245

CB@.1U_4

CB@.1U_4

+3V

D D

C361

C361

CB@.1U_4

CB@.1U_4

C C

ENE1410

ID Select : AD20

Interrupt Pin : INTC#

Request Indicate : REQ1#

Grant Indicate : GNT1#

B B

+3V

+5V

A A

+5V +3V

C286

C286

CB@4.7U_6

CB@4.7U_6

INTC#
SERIRQ
PCI_PME#
PCMSPK

CB_RSMRST#

REQ1#
GNT1#

AD20
PCIRST#
PCLK_PCM

FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#

N8

AD0

K7

AD1

L7

AD2

N7

AD3

M7

AD4

N6

AD5

M6

AD6

K6

AD7

M5

AD8

L5

AD9

K5

AD10

M4

AD11

K4

AD12

N3

AD13

M3

AD14

N2

AD15

J2

AD16

J1

AD17

H4

AD18

H3

AD19

G3

AD20

G2

AD21

F1

AD22

F2

AD23

E2

AD24

E3

AD25

E4

AD26

D1

AD27

D2

AD28

D4

AD29

C1

AD30

C2

AD31

N5

CBE0#

N1

CBE1#

J3

CBE2#

E1

CBE3#

M2

PAR

H=1.4mm

C267

C267

CB@.1U_4

CB@.1U_4

4

R237 CB@*22_4R237 CB@*22_4

CB_RSMRST#

R344 CB@0_4R344 CB@0_4

R236 CB@47_4R236 CB@47_4

M1

L2

STOP#

PERR#L3SERR#

GND1D3GND2H2GND3L4GND4M8GND5

C268

C268

CB@4.7U_6

CB@4.7U_6

4

C359

C359

CB@.22U_6

CB@.22U_6

K3

K1

L1

IRDY#

TRDY#

DEVSEL#

GND6

F12

K11

C271

C271

CB@.1U_4

CB@.1U_4

J4

C10

R340 CB@*0_6R340 CB@*0_6
R338 CB@100K_6R338 CB@100K_6

delay 10ms at least

PCM_PME#

PCM_IDSEL

H1

F4

G4

IDSEL

PCICLK

FRAME#

PCIRST#

VCC1F3VCC2G1VCC3K2VCC4N4VCC5L6VCC6L9VCC7

GND7

GND8

B6

3

PCLK_PCM_MPCLK_PCM

A1

B1

PCIGNT#

PCIREQ#

H11

CB@*10p_4C244 CB@*10p_4C244

PCIRST#

+3V

+3V

R337

R337

CB@43K_4

CB@43K_4

T82T82

T83T83

T85T85

T84T84

T100T100

PCM_SUS#

L8

L11

M10

M9

G_RST#

SPKROUT

SUSPEND#

RI_OUT#/PME#

VCCA1

VCCA2A7VCC8

VCC9C8VCC10

B4

D12

G13

+3VAVCC+3V

M11

N11

MFUNC6

MFUNC5

L10

N10

MFUNC4

CAUDIO/BVD2/SPKR#B5CBLOCK#/A19

CSTSCHG/BVD1/STSCHG#

D6

C5

K8

M12

M13

N13

VCCD1#

VCCD0#

MFUNC0

MFUNC1N9MFUNC2K9MFUNC3

CGNT#/WE#

CINT#/READY/IREQ#

CREQ#/INPACK#B8CSERR#/WAIT#A5CSTOP#/A20

D11

C11

3

E10

N12

A2

J13

VPPD1

VPPD0

RSVD/D2

RSVD/D14

CDEVSEL#/A21

CIRDY#/A15

CPERR#/A14

CTRDY#/A22

B13

A12

A13

C13

C12

D9

L12

A4

CVS1/VS1C6CVS2/VS2

RSVD/A18

CCD1#/CD1#

CCD2#/CD2#

CFRAME#/A23

CCLK/A16

CCLKRUN#/WP/IOIS16#D5CRST#/RESET

B9

B11

B12

R_A_CCLK

R272 CB@10_4R272 CB@10_4

A_CRSVD/D2
A_CRSVD/D14
A_CRSVD/A18

U6

U6

CAD31/D10

CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6

CAD19/A25

CAD18/A7
CAD17/A24
CAD16/A17

CAD15/IOWR#

CAD14/A9

CAD13/IORD#

CAD12/A11

CAD11/OE#

CAD10/CE2#

CAD9/A10

CAD8/D15

CAD7/D7

CAD6/D13

CAD5/D6

CAD4/D12

CAD3/D5

CAD2/D11

CAD1/D4
CAD0/D3

CCBE0#/CE1#

CCBE1#/A8

CCBE2#/A12

CCBE3#/REG#

CPAR/A13

CB@CB1410

CB@CB1410

2

VCCD1#
VCCD0#

VPPD1
VPPD0

A_CCD1#
A_CCD2#

A_CVS1#
A_CVS2#

B2
C3
B3
A3
C4
A6
D7
C7
A8
D8
A9
C9
A10
B10
D10
E12
F10
E13
F13
F11
G10
G11
G12
H12
H10
J11
J12
K13
J10
K10
K12
L13

H13
E11
A11
B7
D13

A_CCLK
A_CRST#
A_CCLKRUN#

A_CFRAME#
A_CIRDY#
A_CTRDY#
A_CDEVSEL#
A_CSTOP#
A_CPERR#
A_CSERR#
A_CREQ#
A_CGNT#
A_CBLOCK#
A_CINT#
A_CSTSCHG
A_CAUDIO

2

A_CAD31
A_CAD30
A_CAD29
A_CAD28
A_CAD27
A_CAD26
A_CAD25
A_CAD24
A_CAD23
A_CAD22
A_CAD21
A_CAD20
A_CAD19
A_CAD18
A_CAD17
A_CAD16
A_CAD15
A_CAD14
A_CAD13
A_CAD12
A_CAD11
A_CAD10
A_CAD9
A_CAD8
A_CAD7
A_CAD6
A_CAD5
A_CAD4
A_CAD3
A_CAD2
A_CAD1
A_CAD0

A_CC/BE0#
A_CC/BE1#
A_CC/BE2#
A_CC/BE3#
A_CPAR

1

A_CCD1#
A_CCD2#

AVCC

R284

R284

CB@43K_6

CB@43K_6

AVCC

AVPP

AVCC

AVPP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet of

C357

C357

C255

C255

CB@10P_4

CB@10P_4

CB@10P_4

CB@10P_4

CN15

CN15

1

A_CAD0
A_CAD1
A_CAD3
A_CAD5
A_CAD7
A_CC/BE0#
A_CAD9
A_CAD11
A_CAD12
A_CAD14
A_CC/BE1#
A_CPAR
A_CPERR#
A_CGNT#
A_CINT#

A_CCLK
A_CIRDY#
A_CC/BE2#
A_CAD18
A_CAD20
A_CAD21
A_CAD22
A_CAD23
A_CAD24
A_CAD25
A_CAD26
A_CAD27
A_CAD29
A_CRSVD/D2
A_CCLKRUN#

A_CCD1#
A_CAD2
A_CAD4
A_CAD6
A_CRSVD/D14
A_CAD8
A_CAD10
A_CVS1#
A_CAD13
A_CAD15
A_CAD16
A_CRSVD/A18
A_CBLOCK#
A_CSTOP#
A_CDEVSEL#

A_CTRDY#
A_CFRAME#
A_CAD17
A_CAD19
A_CVS2#
A_CRST#
A_CSERR#
A_CREQ#
A_CC/BE3#
A_CAUDIO
A_CSTSCHG
A_CAD28
A_CAD30
A_CAD31
A_CCD2#

PCMCIA(CB1410) -OPTION

PCMCIA(CB1410) -OPTION

PCMCIA(CB1410) -OPTION

GND

2

D3 - CAD0

3

D4 - CAD1

4

D5 - CAD3

5

D6 - CAD5

6

D7 - CAD7

7

CE1- CCBE0

8

A10- CAD9

9

OE - CAD11

10

A11- CAD12

11

A9 - CAD14

12

A8 - CCBE1

13

A13- CPAR

14

A14- CPERR

15

WE/PGM - CGNT

16

RDY/BSY,IRQ*INT

17

VCC

18

VPP1

19

A16- CCLK

20

A15- CIRDY

21

A12- CCBE2

22

A7 - CAD18

23

A6 - CAD20

24

A5 - CAD21

25

A4 - CAD22

26

A3 - CAD23

27

A2 - CAD24

28

A1 - CAD25

29

A0 - CAD26

30

D0 - CAD27

31

D1 - CAD29

32

D2 - RFU

33

WP,IOIS16-CKRUN

34

GND

35

GND

36

CD1- CCD1

37

D11- CAD2

38

D12- CAD4

39

D13- CAD6

40

D14- RFU

41

D15- CAD8

42

CE2- CAD10

43

RFSH,VS*1-CVS1

44

IORD-CAD13

45

IOWR-CAD15

46

A17- CAD16

47

A18- RFU

48

A19- CBLOCK

49

A20- CSTOP

50

A21- CDEVSEL

51

VCC

52

VPP2

53

A22- CTRDY

54

A23- CFRAME

55

A24- CAD17

56

A25- CAD19

57

NC - CVS2

58

RESET-CRST

59

WAIT-CSERR

60

INPACK-CREQ

61

REG- CCBE3

62

BVD2,SP-CAUDIO

63

BVD1,STSCHG-C*

64

D8 - CAD28

65

D9 - CAD30

66

D10- CAD31

67

CD2- CCD2

68

GND

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

PCMCIA SOCKET

GND69GND70GND71GND72GND73GND

1

CB@SANTA-1310671-68P

CB@SANTA-1310671-68P

74

21 33Friday, May 25, 2007

21 33Friday, May 25, 2007

21 33Friday, May 25, 2007

of

of

1A

1A

1A

A

http://adf.ly/LOM1

+3VSUS

C169

C169

C207

C207

10U_6

10U_6

4 4

AD17

REQ0#
GNT0# INTA#,B#

AD17

R163 150/F_4R163 150/F_4

PowerOnReset for Vcc

When GRESET# is controlled by system, the pull-up

3 3

resistor and capacitor do not need to apply.

+3VSUS

R177

R177

22K_4

22K_4

GRST#_832

C156

C156

1U_4

1U_4

2 2

VCC

1 1

GRST#
PRST#

.01U_4

.01U_4

C129

C129

.1U_4

.1U_4

R5C833_IDSEL

PCLK_R5C833

R116

R116

*22_4

*22_4

C104

C104

*22P_4

*22P_4

> 1 ms

C213

C213

.01U_4

.01U_4

C170

C170

.01U_4

.01U_4

>60 ns

>100 ns

C116

C116

C126

C126

.01U_4

.01U_4

10U_6

10U_6

VCC_ROUT_832

C114

C114

C115

C115

.47U_4

.47U_4

.01U_4

.01U_4

AD[31..0][15,21]

PAR[15,21]
CBE3#[15,21]
CBE2#[15,21]
CBE1#[15,21]
CBE0#[15,21]

REQ0#[15]
GNT0#[15]

FRAME#[15,21]

IRDY#[15,21]

TRDY#[15,21]

DEVSEL#[15,21]

STOP#[15,21]

PERR#[15,21]

SERR#[15,21]

PCIRST#[15,21]

PCLK_R5C833[2]

PCI_PME#[15,21]

CLKRUN#[16,26]

22P_4C124 22P_4C124

better than 50ppm

AS CLOSE AS POSSIBLE TO
R5C833 and GUARD GND

Y124.576MHz Y124.576MHz

22P_4C123 22P_4C123

*.01U_4C121 *.01U_4C121

R5C832 stuff only

R115 10K/F_4R115 10K/F_4

.01U_4C113 .01U_4C113

PCLK(33MHz)

A

R5C832 : AJ5C8320H26

+3V

R5C833 : AJ5C8330H05

U2B

C158

C158

.01U_4

.01U_4

C133

C133

.47U_4

.47U_4

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

R5C833_IDSEL

GRST#_832

U2B

10

VCC_PCI1

20

VCC_PCI2

27

VCC_PCI3

32

VCC_PCI4

41

VCC_PCI5

128

VCC_PCI6

61

VCC_RIN

16

VCC_ROUT1

34

VCC_ROUT2

64

VCC_ROUT3

114

VCC_ROUT4

120

VCC_ROUT5

125

AD31

126

AD30

127

AD29

1

AD28

2

AD27

3

AD26

5

AD25

6

AD24

9

AD23

11

AD22

12

AD21

14

AD20

15

AD19

17

AD18

18

AD17

19

AD16

36

AD15

37

AD14

38

AD13

39

AD12

40

AD11

42

AD10

43

AD9

44

AD8

46

AD7

47

AD6

48

AD5

49

AD4

50

AD3

51

AD2

52

AD1

53

AD0

33

PAR

7

C/BE3#

21

C/BE2#

35

C/BE1#

45

C/BE0#

8

IDSEL

124

REQ#

123

GNT#

23

FRAME#

24

IRDY#

25

TRDY#

26

DEVSEL#

29

STOP#

30

PERR#

31

SERR#

71

GBRST#

119

PCIRST#

121

PCICLK

70

PME#

117

CLKRUN#

U2A

U2A

1394_XIN

94

XI

H=1.2mm

1 2

1394_XOUT

95

XO

FIL0_PWR

96

FIL0

REXT

101

REXT

VREF_PWR

100

VREF

97

RSV

R5C833

R5C833

XD_D0/MS_D0/SD_D0

XD_D1/MS_D1/SD_D1

XD_D2/MS_D2/SD_D2

XD_D3/MS_D3/SD_D3

SD can't recognize issue in ES1 sample

B

PCI / OTHER

PCI / OTHER

R5C833

R5C833

IEEE1394/SD

IEEE1394/SD

R144 *2.7K_4R144 *2.7K_4

R156 *2.7K_4R156 *2.7K_4

R159 *2.7K_4R159 *2.7K_4

R142 *2.7K_4R142 *2.7K_4

R143 *2.7K_4R143 *2.7K_4

B

VCC_3V

VCC_MD

GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9

GND10

AGND1
AGND2
AGND3
AGND4
AGND5

HWSPND#

MSEN

XDEN

UDIO5

UDIO3
UDIO4

UDIO2

UDIO1

UDIO0/SRIRQ#

INTA#

INTB#

TEST

AVCC_PHY1
AVCC_PHY2
AVCC_PHY3
AVCC_PHY4

TPBIAS0

TPBN0
TPBP0
TPAN0
TPAP0

MDIO17
MDIO16
MDIO15
MDIO14
MDIO13
MDIO12
MDIO11
MDIO10

MDIO05
MDIO08
MDIO19
MDIO18
MDIO02
MDIO03

MDIO00

MDIO01

MDIO09
MDIO04
MDIO06
MDIO07

H=1.4mm

+3VSUS

If VCC_3V tied to +3V,
PME# function is not supported

+3VSUS

67

86

4
13
22
28
54
62
63
68
118
122

99
102
103
107
111

69

58

55

57

65
59

56

60

72

115

116

66

98
106
110
112

113
104
105
108
109

87
92
89
91
90
93
81
82

75
88
83
85
78
77

80

79

84
76
74
73

C131

C131

.01U_4

.01U_4

+3VSUS

R181

R181
10K_4

10K_4

D7 *BAS316D7 *BAS316

832_SUS#

R195 10K_4R195 10K_4

R198 10K_4R198 10K_4

R197 100K_4R197 100K_4
R196 *100K_4R196 *100K_4

SCL_CARD
SDA_CARD

1394_AVCC

C111

C111

10U_6

10U_6

TPBIAS0
TPB0N
TPB0P
TPA0N
TPA0P

XD_D7
XD_D6
XD_D5
XD_D4
XD_D3/MS_D3/SD_D3
XD_D2/MS_D2/SD_D2
XD_D1/MS_D1/SD_D1
XD_D0/MS_D0/SD_D0

XD_WPO#
XD_WE#/MS_BS/SD_CMD
XD_ALE
XD_CLE
XD_CE#
XD_R/B#/SD_WP#

SD_CDZ

MS_CDZ

MC_PWR_CTRL_0
TP_XD_LED#

2 1

D5 BAS316D5 BAS316

2 1

D6 BAS316D6 BAS316

Close to CONN.

SD_CDZ MS_CDZXD_WE#/MS_BS/SD_CMD

When HWSPND# is
controlled by system, the
pull-up resistor(R4059)
dose not need to apply.

+3VSUS

SERIRQ [16,21,23,26]

INTA# [15]

INTB# [15]

C118

C118

.1U_4

.1U_4

R152 56.2/F_4R152 56.2/F_4

TP_XD_LED# [25]

C137

C137

*270P_4

*270P_4

Reduced external noise by FAE confirm

C179

C179

10U_6

10U_6

21

LPC_PD# [16]

Default setting:
INTA# is assert to 1394
INTB# is assert to Cardreader

22ohm/1A

L4 BK1608HS220L4 BK1608HS220

C109

C109

C390

C390

1000P_4

1000P_4

.01U_4

.01U_4

+3VSUS

R180

R180

10K_4

10K_4

XD_CDZ

XD_RE#/CLKMS_SD_CLK

XD_RE#/CLK should
shield GND.

Close to CONN.

C139

C139

*270P_4

*270P_4

C

5 IN 1 CARD READER

+3VSUS

XD_D1/MS_D1/SD_D1

R355 *10K_4R355 *10K_4

+5V

SD_CDZ

XD_D2/MS_D2/SD_D2

2

EEPROM

+3VSUS

R193

R193

10K_4

10K_4

SDA_CARD
SCL_CARD

C

R376

R376

0_4

0_4

Q28

Q28

3

1

*2N7002E

*2N7002E

2

3

Q27

Q27

*2N7002E

*2N7002E

1

2

Q26

Q26

3

1

*2N7002E

*2N7002E

R354 0_4R354 0_4

* NOT Use EEPROM :

==>UDIO5 need pull-high.

* Use EEPROM :

==>UDIO5 need pull-down.

R194

R194

10K_4

10K_4

XD_D1/MS_D1/SD_D1_C
XD_D2/MS_D2/SD_D2_C

D

D

CARDREADER POWER

Q6

2N7002Q62N7002

3

1

2

MC_PWR_CTRL_0

+3VSUS

C206

C206

*1U_4

*1U_4

XD_D0/MS_D0/SD_D0
XD_D1/MS_D1/SD_D1_C
XD_D2/MS_D2/SD_D2_C
XD_D3/MS_D3/SD_D3
XD_RE#/CLK
XD_WE#/MS_BS/SD_CMD
SD_CDZ
XD_R/B#/SD_WP#

XD_D0/MS_D0/SD_D0
XD_D1/MS_D1/SD_D1
XD_D2/MS_D2/SD_D2
XD_D3/MS_D3/SD_D3
XD_RE#/CLK
MS_CDZ
XD_WE#/MS_BS/SD_CMD

4

5

1394

TPBIAS0

R114

R114

1394@56.2/F_4

1394@56.2/F_4

AS CLOSE AS
POSSIBLE TO
R5C833

TPA0P
TPA0N

TPB0P
TPB0N

R112

R112

1394@56.2/F_4

1394@56.2/F_4

1394_COM

R389

R389

1394@5.1K/F_4

1394@5.1K/F_4

E

+3VSUS

R207

R207

1

10K_4

10K_4

MC_PWR_CTRL_0#

U4

3

IN

EN

2

GND

1

IN

VO

*G5241T1UU4*G5241T1U

CN28

CN28

21

SD-VCC

31

SD-DAT0

34

SD-DAT1

9

SD-DAT2

11

SD-DAT3

25

SD-CLK

15

SD-CMD

39

SD-C/D

41

SD-WP

19

SD-VSS1

29

SD-VSS2

40

SD-GND

12

MS-VCC

22

MS-DATA0

24

MS-DATA1

20

MS-DATA2

16

MS-DATA3

14

MS-SCLK

18

MS-INS

26

MS-BS

10

MS-VSS1

28

MS-VSS2

42

GND1

*CARD_READER_PROCONN-MXP038-A0-4010

*CARD_READER_PROCONN-MXP038-A0-4010

R113

R113

1394@56.2/F_4

1394@56.2/F_4

R111

R111

1394@56.2/F_4

1394@56.2/F_4

C392

C392

1394@270P_4

1394@270P_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Q7

2

AO3403Q7AO3403

3

30mil

R218

R218

C224

C224

150K_4

150K_4

2.2U_6

2.2U_6

MC_PWR_CTRL_0

C232

C232

*4.7U_6

*4.7U_6

C112

C112

1394@.33U_6

1394@.33U_6

1394@*CL-2M2012-121JT

1394@*CL-2M2012-121JT

RN1

RN1

RN2

RN2

1394@*CL-2M2012-121JT

1394@*CL-2M2012-121JT

L1394_TPB0-

L1394_TPA0­L1394_TPA0+

L1394_TPB0+

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

R5C832/833(5IN1/1394)

R5C832/833(5IN1/1394)

R5C832/833(5IN1/1394)

VCC_XD

VCC_XD

XD-VCC

XD-CD

XD-R/B

XD-RE

XD-CE
XD-CLE
XD-ALE

XD-WE
XD-WP

XD-D0

XD-D1

XD-D2

XD-D3

XD-D4

XD-D5

XD-D6

XD-D7

XD-GND1
XD-GND2

GND2

C99

C99

1394@.01U_4

1394@.01U_4

443

1

1

L20

L20
1394@0_4P2R_S

1394@0_4P2R_S

1 2

1 2

1394@0_4P2R_S

1394@0_4P2R_S

1

1
443

L21

L21

1394@1394-C13118-102-4P-V

1394@1394-C13118-102-4P-V

E

VCC_XD

VCC_XDVCC_XD

38

2
3
4
5
6
7
8
13

23
27
30
32
33
35
36
37

1
17
43

3
2

2

43

43

2

2

3

CN32

CN32

1
3
4
2

C125

C125

C120

C120

.01U_4

.01U_4

.01U_4

.01U_4

XD_CDZ
XD_R/B#/SD_WP#
XD_RE#/CLK
XD_CE#
XD_CLE
XD_ALE
XD_WE#/MS_BS/SD_CMD
XD_WPO#

XD_D0/MS_D0/SD_D0
XD_D1/MS_D1/SD_D1
XD_D2/MS_D2/SD_D2
XD_D3/MS_D3/SD_D3
XD_D4
XD_D5
XD_D6
XD_D7

L1394_TPA0+
L1394_TPA0-

L1394_TPB0+
L1394_TPB0-

5

6

7

8

22 33Friday, May 25, 2007

22 33Friday, May 25, 2007

22 33Friday, May 25, 2007

of

of

of

C117

C117

.01U_4

.01U_4

3A

3A

3A

5

http://adf.ly/LOM1

CL_RST#1[16]

C307

C307

PCLK_DEBUG[2,26]

CL_DATA1[16]

CL_CLK1[16]

SERIRQ[16,21,22,26]
LDRQ#1[14]

PLTRST#[15,16,19,20,24,26]

C306

C306

10U/10V_8

10U/10V_8

uR_SOUT_CR[26]

CLK_PCIE_MINI[2]
CLK_PCIE_MINI#[2]

PCIE_WAKE#[16,20,24]

WCS_CLK[24]

WCS_DAT[24]

+3G_VDD

SERIRQ
LDRQ#1
PLTRST#
PCLK_MINI

PCIE_TXP1[15]
PCIE_TXN1[15]

PCIE_RXP1[15]
PCIE_RXN1[15]

uR_SWD[26]

+3V_S5

WCS_CLK
WCS_DAT

To BT

C292

C292
.1U_4

.1U_4

PCIE_TXP3[15]
PCIE_TXN3[15]

PCIE_RXP3[15]
PCIE_RXN3[15]

CLK_PCIE_MINI2[2]
CLK_PCIE_MINI2#[2]

Mini PCI-E Card
WLAN

D D

MINI-Card

C C

+3VSUS

C329

C329

C331

C331

1U_6

1U_6

.1U_4

.1U_4

+3V

80ohm/4A

L11 FBJ3216HS800L11 FBJ3216HS800

10U/10V_8

10U/10V_8

R481 0_4R481 0_4
R467 0_4R467 0_4
R466 0_4R466 0_4

R308 *0_4R308 *0_4
R309 *0_4R309 *0_4
R310 *0_4R310 *0_4
R311 *0_4R311 *0_4

PCIE_TXP1
PCIE_TXN1

PCIE_RXP1
PCIE_RXN1

uR_SOUT_CR
uR_SWD

CLK_PCIE_MINI
CLK_PCIE_MINI#

3

R314 BT@0_4R314 BT@0_4
R315 BT@0_4R315 BT@0_4

C289

C289
.1U_4

.1U_4

4

2N7002E-LF

2N7002E-LF
Q23

Q23

1

2

R291 10K_4R291 10K_4

12

C297

C297

.47U_6

.47U_6

SERIRQ_WLAN
CL_RST#1_WLAN
PLTRST#_PCIE
CL_CLK1_WLAN

PCIE_TXP3
PCIE_TXN3

PCIE_RXP3
PCIE_RXN3

R461 0_4R461 0_4

WCS_CLKR
WCS_DATR
WLAN_WAKE#

WCS_CLKR
WCS_DATR

C298

C298
10P_4

10P_4

R460 0_4R460 0_4

uR_SOUT_CR
uR_SWD

WCS_CLKR
WCS_DATR
WLAN_WAKE#

SERIRQ_WLAN
CL_RST#1_WLAN
PLTRST#_PCIE
CL_CLK1_WLAN

+3G_VDD

Peak: 2.75A

CN20

CN20

51

NC

49

C-Link_RST

47

C-Link_DAT

45

C-Link_CLK

43

GND

41

NC

39

NC

37

GND

35

GND

33

PETp0

31

PETn0

29

GND

27

GND

25

PERp0

23

PERn0

21

GND

19

NC

17

NC

15

GND

13

REFCLK+

11

REFCLK-

9

GND

7

CLKREQ#

5

BT_CHCLK

3

BT_DATA

1

WAKE#

minipai-c15706-52p-ldv

minipai-c15706-52p-ldv

CN21

CN21

51

Reserved

49

Reserved

47

Reserved

45

Reserved

43

GND

41

+3.3Vaux

39

+3.3Vaux

37

GND

35

GND

33

PETp0

31

PETn0

29

GND

27

GND

25

PERp0

23

PERn0

21

GND

19

Reserved

17

Reserved

15

GND

13

REFCLK+

11

REFCLK-

9

GND

7

CLKREQ#

5

Reserved

3

Reserved

1

WAKE#

3G@minipai-c15706-52p-ldv

3G@minipai-c15706-52p-ldv

53

LED_WPAN#
LED_WLAN#

USB_D+

USB_D-

SMB_DATA

SMB_CLK

+3.3Vaux

PERST#

W_DISABLE#

+3.3V

+1.5V
LED_WPAN#
LED_WLAN#

LED_WWAN#

USB_D+

USB_D-

SMB_DATA

SMB_CLK

+1.5V

+3.3Vaux

PERST#

W_DISABLE#

UIM_VPP

UIM_RESET

UIM_CLK

UIM_DATA

UIM_PWR

+1.5V

+3.3V

GND54GND

3

+3V_S5+3V

+1.5V

52

+3.3V

50

GND

48

+1.5V

46
44
42

NC

40

NC

38
36
34

GND

32
30
28

+1.5V

26

GND

24
22
20
18

GND

16

NC

14

NC

12

NC

10

NC

8

NC

6

+1.5V

4

GND

2

+3.3V

+1.5V

52
50

GND

48
46
44
42
40

GND

38
36
34

GND

32
30
28
26

GND

24
22
20
18

GND

16
14
12
10
8
6
4

GND

2

+3G_VDD

+3V_S5

+3V

USBP7+_R
USBP7-_R

USBP3+_C
USBP3-_C

WL_SMDATA_WLAN
WL_SMCLK_WLAN

RF_EN_WLAN

LFRAME#_PCIE

LAD3_PCIE
LAD2_PCIE
LAD1_PCIE
LAD0_PCIE

R459 *0_4R459 *0_4
R294 *0_4R294 *0_4
R293 *0_4R293 *0_4

WL_SMDATA_WLAN
WL_SMCLK_WLAN

PLTRST#

RF_EN_WLAN

LFRAME#_PCIE

LAD3_PCIE
LAD2_PCIE
LAD1_PCIE
LAD0_PCIE

R462 *0_4R462 *0_4
R331 0_4R331 0_4
R332 0_4R332 0_4

R326 0_4R326 0_4
R327 0_4R327 0_4

R325 0_4R325 0_4

R3200_4 R3200_4
R3210_4 R3210_4
R3220_4 R3220_4
R3230_4 R3230_4
R3240_4 R3240_4

WL_SMDATA
WL_SMCLK

PLTRST#

LFRAME#
LAD3
LAD2
LAD1
LAD0

USBP7+ [15]
USBP7- [15]

PLTRST# [15,16,19,20,24,26]

PLTRST# [15,16,19,20,24,26]

RF_EN [26]

LFRAME# [14,26]
LAD3 [14,26]
LAD2 [14,26]
LAD1 [14,26]
LAD0 [14,26]

2

C348

C348

.1U_4

.1U_4

USBP3+ [15]
USBP3- [15]

1

+3V

C350

C350

10U_8

10U_8

C330

C330

.001U_4

.001U_4

C349

C349

.1U_4

.1U_4

+1.5V

C351

C351

10U_8

10U_8

+3V

2

4

RP46

RP46

4.7KX2

Q20

Q20

2

2N7002E

2N7002E

SDATA[2,13,16,19,24]

SCLK[2,13,16,19,24]

3

+3V

Q21

Q21

2

2N7002E

2N7002E

3

4.7KX2

1

3

WL_SMDATA

1

WL_SMCLK

1

B B

NB SINK CPU SINK MINI CARD SINK

HOLE14

HOLE6

HOLE5

123

67
5
4

67
5
4

67
5
4

HOLE5

H-C165D122P2-8

H-C165D122P2-8

8
9

HOLE3

67
5
4

67
5
4

5

67
5
4

HOLE3

H-C165D122P2-8

H-C165D122P2-8

8
9

HOLE20

HOLE20

*H-C236D94P2-8

*H-C236D94P2-8

8
9

123

HOLE2

HOLE2

*H-C236D106P2-8

*H-C236D106P2-8

8
9

123

HOLE8

HOLE8

H-C165D122P2-8

H-C165D122P2-8

8
9

123

HOLE7

HOLE7

*H-C236D94P2-8

*H-C236D94P2-8

8
9

123

HOLE16

HOLE16

*H-C315D94P2-8

*H-C315D94P2-8

8
9

123

A A

HOLE23

HOLE23

*H-C294D94P2-8

*H-C294D94P2-8

8
9

123

67
5
4

67
5
4

67
5
4

67
5
4

HOLE9

HOLE9

H-C165D122P2-8

H-C165D122P2-8

8
9

123

MB SINK

HOLE1

HOLE1

*H-C236D106P2-8

*H-C236D106P2-8

8
9

123

HOLE10

HOLE10

*H-C236D94P2-8

*H-C236D94P2-8

8
9

123

67
5
4

123

HOLE21

HOLE21

*H-C315D94P2-8

*H-C315D94P2-8

8
9

123

HOLE19

HOLE19

*H-C189D189N

*H-C189D189N

8
9

123

HOLE4

HOLE4

H-C165D122P2-8

H-C165D122P2-8

8
9

67
5
4

67
5
4

67
5
4

123

HOLE12

HOLE12

*H-TC295BC236D94P2-8

*H-TC295BC236D94P2-8

8
9

123

HOLE15

HOLE15

*H-C197D94P2-8

*H-C197D94P2-8

8
9

123

HOLE6

H-C165D122P2-8

H-C165D122P2-8

8
9

123

67
5
4

67
5
4

HOLE13

HOLE13

H-C197D122P2-8

H-C197D122P2-8

67
5

8
4

9

PCMCIA SINK

HOLE17

HOLE17

*H-C177D126P2-8

*H-C177D126P2-8

8

9

MDC

HOLE11

HOLE11

H-C165D122P2-8

H-C165D122P2-8

8

9

4

123

123

123

HOLE14

H-C197D122P2-8

H-C197D122P2-8

8
9

123

HOLE18

HOLE18

*H-C177D126P2-8

*H-C177D126P2-8

8
9

123

67
5
4

67
5
4

67
5
4

67
5
4

PCMCIA SINK

HOLE22

HOLE22

*H-C177D126P2-8

*H-C177D126P2-8

67
5
4

67
5

8

4

9

123

3

FOR EMI

C512

C512

1500P/X7R-50V_4

1500P/X7R-50V_4

+3V +3V +3V

+3V +3V

C549

C549

.1U_4

.1U_4

C547

C547

.1U_4

.1U_4

2

C510

C510

1500P/X7R-50V_4

1500P/X7R-50V_4

C550

C550

.1U_4

.1U_4

+3V_S5

C548

C548

.1U_4

.1U_4

C551

C551

.1U_4

.1U_4

C552

C552

.1U_4

.1U_4

C511

C511

1500P/X7R-50V_4

1500P/X7R-50V_4

+3VSUS

+5V_S5 +5V_S5

C515

C515

.1U_4

.1U_4

+1.5VVIN +5V_S5VINVIN +5V+1.5V

+1.5V

C508

C508

C519

C519

.1U_4

.1U_4

C528

C528

C518

C518

C517

C517

.1U_4

.1U_4

.1U_4

.1U_4

.1U_4

.1U_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

MINI PCIE/HOLE

MINI PCIE/HOLE

MINI PCIE/HOLE

Date: Sheet

Date: Sheet

Date: Sheet

C514

C514

C509

C509

C513

.1U_4

.1U_4

.1U_4

.1U_4

C523

C523

C524

C524

.1U_4

.1U_4

.1U_4

.1U_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

1

C513

.1U_4

.1U_4

.1U_4

.1U_4

+3VPCU AVDD18 +1.05V+3VPCU+3VPCU+3VPCU

C520

C520

C521

C521

.1U_4

.1U_4

.1U_4

.1U_4

23 33Friday, May 25, 2007

23 33Friday, May 25, 2007

23 33Friday, May 25, 2007

+5V

C516

C516

.1U_4

.1U_4

C522

C522

.1U_4

.1U_4

3B

3B

3B

of

of

of

MX6

http://adf.ly/LOM1

1

MX4

2

MX7

3

MX3

56

MX2
MX1
MX0
MX3

MX5
MX6
MX4
MX7

MY15
MY14
MY13
MY12

MY7
MY6
MY5
MY4

MY3
MY2
MY1
MY0

CN37

CN37

36

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

35

5

INT KeyBoard

MY4_K
MY2_K
MX2_K
MX1_K
MY1_K
MY0_K
MX0_K
MX3_K
MY5_K
MY6_K
MX5_K
MX6_K
MX4_K
MY12_K
MY7_K
MY3_K
MX7_K
MY13_K
MY9_K
MY8_K
MY11_K
MY10_K
MY14_K

MY15_K

K_LED_P_K
CAPSLED_K
FN_F10_K
NUMLED_K

88171-3400L-34P-R

88171-3400L-34P-R

CAPSLED[26]
FN_F10[26]
NUMLED[26]

+3V

CN5

CN5

36

35

INT K/B

MX0[26]
MX1[26]
MX2[26]
MX3[26]
MX4[26]
MX5[26]
MX6[26]
MX7[26]

MY15[26]
MY14[26]
MY13[26]
MY12[26]
MY11[26]
MY10[26]
MY9[26]
MY8[26]
MY7[26]
MY6[26]
MY5[26]
MY4[26]
MY3[26]
MY2[26]
MY1[26]
MY0[26]

R249 150_4R249 150_4

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

MY15
MY14
MY13
MY12
MY11
MY10
MY9
MY8
MY7
MY6
MY5
MY4
MY3
MY2
MY1
MY0

CAPSLED
FN_F10
NUMLED

K_LED_P

MY4_K
MY2_K
MX2_K
MX1_K
MY1_K
MY0_K
MX0_K
MX3_K
MY5_K
MY6_K
MX5_K
MX6_K
MX4_K
MY12_K
MY7_K
MY3_K
MX7_K
MY13_K
MY9_K
MY8_K
MY11_K
MY10_K
MY14_K

MY15_K

K_LED_P_K
CAPSLED_K
FN_F10_K
NUMLED_K

MY4
MY2

MX2

MX1
MY1
MY0

MX0

MX3
MY5
MY6

MX5

MX6

MX4

MY12
MY7
MY3

MX7

MY13

MY9
MY8

MY11
MY10
MY14

MY15

K_LED_P
CAPSLED
FN_F10
NUMLED

BL121-28R-TAND-28P-L-BU1

BL121-28R-TAND-28P-L-BU1

MY4_K
MY2_K

MX2_K

MX1_K
MY1_K
MY0_K

MX0_K

MX3_K
MY5_K
MY6_K

MX5_K

MX6_K

MX4_K

MY12_K

MY7_K
MY3_K

MX7_K

MY13_K

MY9_K
MY8_K

MY11_K
MY10_K
MY14_K

MY15_K

K_LED_P_K
CAPSLED_K
FN_F10_K
NUMLED_K

BL121-28R-TAND-28P-L-BU1

BL121-28R-TAND-28P-L-BU1

+3VPCU

RP43

RP43

10

MX5

9

MX0

8

MX1

7 4

MX2

10KX8

10KX8

7 8
5

6

3

4

1

2

100Px4

100Px4
CP1

CP1

D D

7 8
5

6

3

4

1

2

100Px4

100Px4
CP2

CP2

7 8
5

6

3

4

1

2

100Px4

100Px4
CP3

CP3

7 8
5

6

3

4

1

2

100Px4

100Px4
CP5

CP5

7 8
5

6

3

4

1

2

100Px4

100Px4
CP6

CP6

C C

B B

196130-340201-34P-R

196130-340201-34P-R

4

CN8

CN8

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28

CN6

CN6

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28

30

29

30

29

Audio Board

D36 EGAD36 EGA

2 1

D37 EGAD37 EGA

2 1

D38 EGAD38 EGA

2 1

D39 EGAD39 EGA

2 1

D40 VPORTD40 VPORT

2 1

T/P

TPDATA[26]

TPCLK[26]

+5V_S5
+5V_S5

USBP0-[15]

USBP0+[15]

USBP1-[15]

USBP1+[15]

+5V
+3V

BT@88266-100XX-XXX-10P-R

USBP0-

USBP0+

USBP1-

USBP1+

TPCLK TPCLK_1

BT@88266-100XX-XXX-10P-R

Wire Cable 1.25mm Pitch

+5V_S5

R276 0_4R276 0_4
R275 0_4R275 0_4

C276

C276

*10P_4

*10P_4

C279 4.7U_8C279 4.7U_8

C274 .1U_4C274 .1U_4

FFC Cable 1.0mm Pitch

+3V

C541

C541
.1U_4

.1U_4

PCM-1

CHN217

C546

C546

0.1U/X7R-50V_6

0.1U/X7R-50V_6

CHN217

CHN217

CHN217

C544

C544

0.1U/X7R-50V_6

0.1U/X7R-50V_6

+5V_TP
TPDATA_1
TPCLK_1

D32

D32

2

1

D33

D33

2

1

TPDATA_1TPDATA

C275

C275
*10P_4

*10P_4

3

3

3

CN12

CN12

1

1211
2
3
4
5
6
7
8
9
10

L10

L10

1 2

BLM18PG181SN1D

BLM18PG181SN1D

+5V_TP

*88058-6

*88058-6

BL123-06R-6P-L

BL123-06R-6P-L

PCMSPK[21]

C542

C542

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PCM-2

C545

C545

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PCM-3

R490 200K/F_4R490 200K/F_4

ACZ_SDOUT_AUDIO

ACZ_SYNC_AUDIO

BIT_CLK_AUDIO

ACZ_RST#_AUDIO

ACZ_SDIN0

C533

C533

*15P_4

*15P_4

*15P_4

*15P_4

CN11

CN11

8
6
5
4
3
2
1

7

CN10

CN10

8
6
5
4
3
2
1

7

PCM-5PCM-4 PCM-5

R491

R491

86.6K/F_4

86.6K/F_4

C536

C536

*15P_4

*15P_4

C534

C534

Finger Printer

+5V

Wire Cable 1.25mm Pitch

RJ45/USB

+5VPCU

C356

C356
.1U_4

.1U_4

+3V

C540

C540

.1U_4

.1U_4

53

1

4

2

U30

U30
TC7SH08FU

TC7SH08FU

+3VSUS

C535

C535

*15P_4

*15P_4

USB_EN#[26]

PCMSPK_DELAY

R489

R489
10K_4

10K_4

USBP4-[15]

USBP4+[15]

*15p_4

*15p_4

C537

C537

C543

C543
.1U_4

.1U_4

2

SPKR[16]

R317 FP@0_6R317 FP@0_6
R316 FP@0_6R316 FP@0_6

FP@88266-040XX-XXX-4P-R

FP@88266-040XX-XXX-4P-R

80mil

R336 0_4R336 0_4

SPKR

PCMSPK_DELAY

USBP4-_C
USBP4+_C

U12

U12
G545B2RD1U

G545B2RD1U

2

IN1
IN23OUT2

4

EN#

1

GND

9

GND-C

C553 100P_4C553 100P_4

C554 100P_4C554 100P_4

C555 100P_4C555 100P_4

C556 100P_4C556 100P_4

C557 100P_4C557 100P_4

C558 100P_4C558 100P_4

C559 100P_4C559 100P_4

C560 100P_4C560 100P_4

*4.7u_4

*4.7u_4

OUT3

OUT1

CN14

CN14

OC#

C393

C393

1

2

1
2
3
4

8
7
6

R333 *6.34K/F_6R333 *6.34K/F_6

5

+3V

R396

R396

0_4

0_4

U18

U18

4

SN74LVC1G86DCKR

SN74LVC1G86DCKR

3 5

1

PAD1

PAD1

EMIPAD134X71

EMIPAD134X71

ACZ_RST#_AUDIO[14]
ACZ_SYNC_AUDIO[14]

ACZ_SDIN0[14]

BIT_CLK_AUDIO[14]

ACZ_SDOUT_AUDIO[14]

AMP_MUTE#[26]
DIGVOL_UP[26]
DIGVOL_DN[26]

LED_LOGO[26]
USB_EN2#[26]

BLUETOOTH MODULE CONNECTOR

5 6

BT_EN[26]

Wire Cable 1.25mm Pitch

USBPWR1

MY16

MX3

MX2

MX1

MX0

MEDIDA

WWW

NBSWON#

1

BEEP

FFC Cable 0.5mm Pitch

USBP5+[15]

USBP5-[15]

WCS_CLK[23]

WCS_DAT[23]

WCS_CLK

BT_RESET
WCS_DAT

+3V

USB_DETACH

BT@88266-100XX-XXX-10P-R

BT@88266-100XX-XXX-10P-R

R271 BT@*0_4R271 BT@*0_4

R270 BT@0_4R270 BT@0_4

USB_DETACH: Low USB connect

+3V_S5

USBPWR1

MDI1+[20]
MDI1-[20]
MDI0+[20]
MDI0-[20]

USBP2­USBP2+
MDI1+
MDI1­MDI0+
MDI0-

BL123-12R-12P-L-BU1

BL123-12R-12P-L-BU1

USBP2-[15]
USBP2+[15]

LAN_ACT#[20]
LAN_LINK#[20]

AVDD18[20,23]

Wire Cable 1.0mm Pitch

BUTTONS ON KB COVER

HOT_KEY16

MY16

MY16[26]

FR

MX3[26]

FF

MX2[26]

STOP

MX1[26]

PLAY/PAUSE

MX0[26]

MEDIDA

MEDIDA[26]

WWW

WWW[26]

NBSWON#[26]

NBSWON#

BL123-10R-TAND-10P-L-BU1

BL123-10R-TAND-10P-L-BU1

FFC Cable 1.0mm Pitch

CN7

CN7

16
1
2
3
4
5
6
7
8
9
10
11
12
13
14

15

BL121-14R-TAND-14P-L-BU1

BL121-14R-TAND-14P-L-BU1

CN9

CN9

1

1211
2
3
4
5
6
7
8
9
10

BT_RESET

USB_DETACH

High USB disconnect

CN19

CN19

1

1314
2
3
4
5
6
7
8
9
10
11
12

CN13

CN13

12
1
2
3
4
5
6
7
8
9
10
11

Keyboard Side

+NEW_3V

2

4

RP44

RP44

NEW@4.7KX2_4

Q15

Q15

2

3

+NEW_3V

Q14

Q14

2

3

+3V_S5

5

SDATA

NEW@2N7002E

NEW@2N7002E

SCLK

NEW@2N7002E

NEW@2N7002E

C334

C334

NEW@.1U_4

NEW@.1U_4

SDATA[2,13,16,19,23]

SCLK[2,13,16,19,23]

A A

3

1

1

C310

C310

NEW@.1U_4

NEW@.1U_4

NEW@4.7KX2_4

1

NEW_SMDATA

NEW_SMCLK

.1U_4

.1U_4

C309

C309

C337

C337

NEW@.1U_4

NEW@.1U_4

+1.5V+3V

PLTRST#[15,16,19,20,23,26]

C336

C336

NEW@.1U_4

NEW@.1U_4

NEW CARD'S POWER SWITCH

3.3VIN

3.3VIN

AUXIN

1.5VIN

1.5VIN

SYSRST#
SHDN#

RCLKEN
NC
GND

3.3VOUT

3.3VOUT

AUXOUT

1.5VOUT

1.5VOUT

STBY#
CPPE#

CPUSB#

PERST#

C335

C335

NEW@.1U_4

NEW@.1U_4

H=1.2mm

6
7

17

14
13

3
12
11

8
20

OC#

+NEW_3V

+NEW_3VAUX

+NEW_1.5V

CPPE#
CPUSB#

PERST#_R

C299

C299

NEW@4.7U_8

NEW@4.7U_8

U9

U9
NEW@TPS2231PWG4

NEW@TPS2231PWG4

PLTRST#

4
5

18

16
15

1
2

19

9

10

+3V

+3V_S5

+1.5V

CPPE# : ( Internal Pull Up , active low when card support PCIE )

CPUSB# : ( Internal Pull Up , active low when card support USB )

SHDN# : ( Internal Pull Up )

4

R305

R305

NEW@28.7K/F

NEW@28.7K/F

C311

C311

NEW@.1U_4

NEW@.1U_4

3

C313

C313

NEW@.1U_4

NEW@.1U_4

PERST#

C319
NEW@3300P_4

NEW@3300P_4

+NEW_1.5V+NEW_3VAUX +NEW_3V

PCIE_WAKE#[16,20,23]

C339

C339

NEW@4.7U_8

NEW@4.7U_8

PCIE_WAKE#

C338

C338

NEW@.1U_4

NEW@.1U_4

R288

R288

+3V_S5

2

NEW@0_4

NEW@0_4

CLK_PCIE_NEW[2]
CLK_PCIE_NEW#[2]

Q13

Q13
NEW@*DTC144EU

NEW@*DTC144EU

13

2

PCIE_TXP2[15]
PCIE_TXN2[15]

PCIE_RXP2[15]
PCIE_RXN2[15]

NEW_CLKREQ#[2]

USBP6+[15]
USBP6-[15]

CPPE#

+NEW_3V

PERST#
+NEW_3VAUX

+NEW_1.5V

NEW_SMDATA
NEW_SMCLK

CPUSB#

R286 NEW@0_4R286 NEW@0_4C319
R287 NEW@0_4R287 NEW@0_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

USBP6+_R
USBP6-_R

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

New Card/Keyboard/WTB

New Card/Keyboard/WTB

New Card/Keyboard/WTB

New card (BTO)

CN16

CN16

26

GND1

GND29

25

PETp0

GND30

24

PETn0

23

GND2

22

PERp0

21

PERn0

20

GND3

19

REFCLK+

18

REFCLK-

17

CPPE#

16

CLKREQ#

15

+3.3V1

14

+3.3V2

13

PERST#

12

+3.3VAUX

11

WAKE#

10

+1.5V1

9

+1.5V2

8

SMB_DATA

7

SMB_CLK

6

RESERVED1

5

RESERVED2

4

CPUSB#

3

USB_D+

2

USB_D-

1

GND4

NEW@13160171-1

NEW@13160171-1

1

29
30

3B

3B

24 33Friday, May 25, 2007

24 33Friday, May 25, 2007

24 33Friday, May 25, 2007

3B

of

of

of

5

http://adf.ly/LOM1

+5VPCU

LED4 LED_B_LTST-C190TBKTLED4 LED_B_LTST-C190TBKT

2 1

2 1

LED5 LED_Y_LTST-C190KFKTLED5 LED_Y_LTST-C190KFKT

+3VPCU

D D

C C

B B

LED2 LED_B_LTST-C190TBKTLED2 LED_B_LTST-C190TBKT

2 1

R297 330_4R297 330_4

+3VPCU

D28

D28
DA204U

DA204U

+5VPCU

D29

D29
DA204U

DA204U

D30

D30
DA204U

DA204U

+3V

D31

D31
DA204U

DA204U

+3VPCU

D35

D35
DA204U

DA204U

W_LAN&BT
(Amber) (Blue) (Blue) (Blue)(Blue)

-BATLED0

-BATLED1

-PWRLED

SUSLED_EC[26]

1

3

2

1

3

2

1

3

2

1

3

2

1

3

2

R301 330_4R301 330_4

R303 220_4R303 220_4

R289 330_4R289 330_4

2 1

LED3

LED3
LED_Y_LTST-C190KFKT

LED_Y_LTST-C190KFKT

Q19

Q19

DTC144EU

DTC144EU

-BATLED1

-BATLED0

-PWRLED

TP_XD_LED#_R

RF_LED_R

BATLED0# [26]

BATLED1# [26]

Full Charge --> Blue
Charging --> Orange

PWRLED# [26]

Power On --> Blue
S3 --> Orange

2

1 3

DC-IN / Power / Battery /HDD(ODD) / Bridge Media access

(Blue)

(Amber)

(Amber)

4

BATERRY

POWER

2 1

+5V

LED7 LED_B_LTST-C190TBKTLED7 LED_B_LTST-C190TBKT

LED9

LED9

21

LED_Y_LTST-C190KFKT

LED_Y_LTST-C190KFKT

ACIN LED

LED1

LED1

R252 330_4R252 330_4

21

LED_B_LTST-C190TBKT

LED_B_LTST-C190TBKT

TP_XD_LED#_R

RF_LED_R

3

R328 150_4R328 150_4

R242 150_4R242 150_4

Q11 MMBT3906Q11 MMBT3906

TP_XD_LED# [22]

RF_LED [26]

+5VPCU

R255 10K_4R255 10K_4

2

Q12

Q12

1 3

DTC144EU

DTC144EU

CARDREADER

Blue

W-LAN&BT

Amber

+5VPCU

ACIN

ACIN [26,27]

+3VPCU

2

1

ODD / HDD

+5V

R307

R307

150_4

150_4

IDE_LED

21

LED6

LED6

LED_B_LTST-C190TBKT

LED_B_LTST-C190TBKT

DISK LED

IDE_LED#

KILL_SW[26]

D34

D34
DA204U

DA204U

1

3

2

2 1

D22 BAS316D22 BAS316

2 1

D23 BAS316D23 BAS316

+3VPCU

R342

R342
10K_4

10K_4

+5V

R318

R318

10K_4

10K_4

R319 10K_4R319 10K_4

IDELED

SW2

SW2

2

1

3

SW-NSS506-212F-AABD1B

SW-NSS506-212F-AABD1B

ODD_LED# [19]

Q22

Q22
MMBT3906

MMBT3906

SATA_LED# [14]

+5V

MDC

+1.5V_MDC

2
4
6
8
10
12

+1.5V +3V

R191

R191
*0_6

*0_6

R171

R171
*22_4

*22_4

C160

C160

*10P-50V_4

*10P-50V_4

R182

R182
0_6

0_6

+1.5V

ACZ_SDOUT_MDC[14]

A A

5

ACZ_SYNC_MDC[14]

ACZ_SDIN1[14]

ACZ_RST#_MDC[14] BIT_CLK_MDC [14]

A1A:(10/13) change R598 from 22ohm to 33 ohm A1A:(9/27)change P/N (follow ZC3)

4

R174 33_4R174 33_4

+1.5V [4,9,17,23,24,32]

*10P-50V_4

*10P-50V_4

A1A:(9/20) Refer to ZD1,
Add 0 ohm(Default:no stuff)

CN31

CN31

1

GND

3

AC_SDO

5

GND

7

MDC_SDIN1

C162

C162

AC_SYNC

9

AC_SDI

11

AC_RST#

ACS_88018-124L

ACS_88018-124L

RSV
RSV

3.3V
GND
GND

AC_BCLK

3

+3V_S5

C151

C151

.1U-10V_4

.1U-10V_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

PROJECT : BU1 Santa Rosa

TP/SW/LED

TP/SW/LED

TP/SW/LED

1

3B

3B

3B

of

of

of

25 33Friday, May 25, 2007

25 33Friday, May 25, 2007

25 33Friday, May 25, 2007

5

http://adf.ly/LOM1

D D

C277

C277

C281

C281

.1U_4

.1U_4

10U_8

10U_8

LFRAME#[14,23]

PCLK_591

R285

R285
*22_4

*22_4

C285

C285
*10P_4

*10P_4

C C

B B

PCLK_591[2]

CLKRUN#[16,22]

R339 20M_6R339 20M_6

H=2.5mm

4 1

C358

C358
15P_4

15P_4

C261

C261
.1U_4

.1U_4

LAD0[14,23]
LAD1[14,23]
LAD2[14,23]
LAD3[14,23]

GATEA20[14]

RCIN#[14]

SCI#[16]

PLTRST#[15,16,19,20,23,24]

T96T96

SERIRQ[16,21,22,23]

KBSMI#[16]

Y3

32.768KHZY332.768KHZ

2ND_MBCLK[19]

2ND_MBDATA[19]

23

C282

C282
.1U_4

.1U_4

D18 BAS316D18 BAS316

MX0[24]
MX1[24]
MX2[24]
MX3[24]
MX4[24]
MX5[24]
MX6[24]
MX7[24]

MY0[24]
MY1[24]
MY2[24]
MY3[24]
MY4[24]
MY5[24]
MY6[24]
MY7[24]
MY8[24]

MY9[24]
MY10[24]
MY11[24]
MY12[24]
MY13[24]
MY14[24]
MY15[24]
MY16[24]

MBCLK[3,18,27]

MBDATA[3,18,27]

TPCLK[24]

TPDATA[24]
USB_EN2#[24]
CAPSLED[24]
FN_F10[24]
NUMLED[24]

R341

R341
33K_6

33K_6

C362

C362
15P_4

15P_4

8769AGND

HWPG_2.5V[32]

A A

5

SYS_HWPG[28]

HWPG_1.05V[30]

HWPG_1.8V[31]

HWPG_1.5V[32]

D16 BAS316D16 BAS316

D21 BAS316D21 BAS316

D17 BAS316D17 BAS316

D19 BAS316D19 BAS316

D20 BAS316D20 BAS316

4

+3VPCU

L8 BLM18AG601SN1L8 BLM18AG601SN1

C278

C278

C259

C259

.1U_4

.1U_4

.1U_4

.1U_4

LFRAME#
LAD0
LAD1
LAD2
LAD3
PCLK_591

SCI#_uR

PLTRST#

TP_uR_PWUREQ#

SERIRQ

MX0
MX1
MX2
MX3
MX4
MX5
MX6

MY16
MY17

MBCLK
MBDATA
2ND_MBCLK
2ND_MBDATA

8768_32KX1

8768_32KX2

+3V

R281

R281
10K_4

10K_4

HWPG

4

19

46

76

U7

U7

VCC1

VCC2

3

LFRAME

126

LAD0

127

LAD1

128

LAD2

1

LAD3

2

LCLK

8

CLKRUN/GPIO11/HGPIO02

121

GA20

122

KBRST

29

ECSCI

6

LDRQ/GPIO24/HGPIO01

124

LPCPD/GPIO10/HGPIO00

7

LREST

123

PWUREQ

125

SERIRQ

9

SMI

54

KBSIN0

55

KBSIN1

56

KBSIN2

57

KBSIN3

58

KBSIN4

59

KBSIN5

60

KBSIN6

61

KBSIN7

53

KBSOUT0/JENK

52

KBSOUT1/TCK

51

KBSOUT2/TMS

50

KBSOUT3/TDI

49

KBSOUT4

48

KBSOUT5/TDO

47

KBSOUT6/RDY

43

KBSOUT7

42

KBSOUT8

41

KBSOUT9

40

KBSOUT10

39

KBSOUT11

38

KBSOUT12/GPIO64

37

KBSOUT13/GPIO63

36

KBSOUT14/GPIO62

35

KBSOUT15/GPIO61/XOR_OUT

34

KBSOUT16/GPIO60

33

KBSOUT17/GPIO57/HGPIO03

70

SCL1

69

SDA1

67

SCL2

68

SDA2

72

PSCLK1

71

PSDAT1

10

PSCLK2/GPIO26

11

PSDAT2/GPIO27

12

PSCLK3/GPIO25

13

PSDAT3/GPIO12

77

32KX1/32KCLKIN

79

32KX2

WPC8763LDG

WPC8763LDG

3

DNBSWON#_uR
DIGVOL_UP
DIGVOL_DN

C262

C262
.1U_4

.1U_4

+3V

+A3VPCU

C266

C266

C260

C260

10U_8

10U_8

.1U_4

.1U_4

8769AGND

88

115

102

VCC3

VCC4

VCC5

AVCC

A/D

A/D

D/A

D/A

LPC

LPC

GPIO

GPIO

KB

KB

TIMER

TIMER

SPI

SPI

IR

IR

SMB

SMB

FIU

FIU

PS/2

PS/2

GND1

GND2

GND3

GND4

GND5

GND6

5

18

45

78

89

116

L9

L9
HZ0603B601R-00

HZ0603B601R-00

C264

C264

.1U_4

.1U_4

08/10 FAE:

0.1UF

80

VBAT

AD0/GPI90
AD1/GPI91
AD2/GPI92

AD3/GPI93
AD4/GPIO05
AD5/GPIO04

DA0/GPI94

DA1/GPI95

DA2/GPI96

DA3/GPI97

GPIO06/HGPIO06
GPIO07/HGPIP07

GPIO42/TCK

GPIO43/TMS

GPIO44/TDI

GPIO46/TRST

GPO47/JEN0
GPIO50/TDO

GPIO52/RDY

GPO82/HGPIO00/TRIS

GPO84/HGPIO01/BADDR0

TA1/GPIO56
TA2/GPIO20

TB1/GPIO14/HGPIO4

A_PWM1/GPIO21
B_PWM0/GPIO13

SPI_DI/GPIO77

SPI_DO/GPO76/SHBM

SPI_SCK/GPIO75

IRRX1/GPIO72

IRRX2_IRSL0/GPIO70

IRTX/GPIO71

SIN_CR/CIRRX/GPIO87

GPIO34/CIRRX2

CIRTX/GPIO16/HGPIO04

SOUT_CR/GPO83/BADDR1

SWD/GPIO66

CLKOUT/GPIO55

VCC_POR

VCORF

AGND

44

103

VCORF_uR

C280

C280

1U_6

1U_6

8769AGND

L36 BLM18AG601SN1L36 BLM18AG601SN1

C284

C284

.1U_4

.1U_4

4

H=1.6mm

VDD

97
98

WWW

99

MEDIDA

100

DIGVOL_UP

108

DIGVOL_DN

96

101
105
106
107

64

GPIO01

95

GPIO03

93
94
119

GPIO23

109

GPIO30

120

GPIO31

65

GPIO32

66

GPIO33

15

GPIO36

16

GPIO40

17
20
21
22

GPIO45

23
24
25
26

GPIO51

27

HWPG

28

GPIO53

DNBSWON#_uR

91

GPIO81

110

BADDR0

112

31
117
63

32

A_PWM0

118
62

CRT_SENSE#

84

RF_EN

83
82

RSMRST#_uR

75
73

PWROK_EC_uR

74
113
14
114

SOUT_CR_DEBUG

111

SPI_SDI_uR

86

F_SDI

SPI_SDO_uR

87

F_SDO

SPI_CS0#_uR

90

F_CS0

SPI_SCK_uR

92

F_SCK

SWD_DEBUG

81

30

VCC_POR#

85

VREF_uR +A3VPCU

104

VREF

DEBUG PORTS

EC Debug Port

+3VPCU

SOUT_CR_DEBUG
SWD_DEBUG

*ACES_88231-0400

*ACES_88231-0400

C288

C288

10U_8

10U_8

1
2
3

R482 *0_4R482 *0_4

D14 BAS316D14 BAS316

R456 GS@*0_4R456 GS@*0_4
R457 GS@*0_4R457 GS@*0_4

R262 0_4R262 0_4

R274 0_4R274 0_4

R264 0_4R264 0_4

R267 4.7K_4R267 4.7K_4

R263 0_4R263 0_4

6

1

6
2
3

5

445

CN18

CN18

R2540_6 R2540_6

T95T95

+3VPCU

Reserved for LPC debug card

+3V

LAD0
LAD1
LAD2

PCLK_DEBUG[2,23]

LAD3

LFRAME#
PLTRST#
SERIRQ

TEMP_MBAT [27]
INT_LVDS_BLON [6,18]
WWW [24]
MEDIDA [24]
DIGVOL_UP [24]
DIGVOL_DN [24]

CC-SET [27]
VFAN [3]

SUSLED_EC [25]

ACIN [25,27]
NBSWON# [24]
LID591# [18]
SUSB# [16]
EC_FPBACK# [18]
LANVCC_EN [20]
BATLED0# [25]
BATLED1# [25]
PWRLED# [25]
VRON [29]
MAINON [19,30,31,32]
RF_LED [25]
AMP_MUTE# [24]
ID [27]
SUSON [31,32]

T99T99
T147T147

D/C# [27]
S5_ON [28]
BT_EN [24]

DNBSWON# [16]
LED_LOGO [24]

HDPACT [16,19]
HDPINT [16,19]
FANSIG [3]

CONTRAST [18]
KILL_SW [25]

CRT_SENSE# [15,18]
RF_EN [23]
CELL-SET [27]

RSMRST# [16]
SUSC# [16]
ECPWROK [16]
CCD_POWERON [18]
USB_EN# [24]

uR_SOUT_CR [23]

uR_SWD [23]

-- DAISY CHAIN TOPOLOGY --

3

C272

C272
.1U_4

.1U_4

C291

C291
.1U_4

.1U_4

2

SM BUS PU

MBCLK
MBDATA
2ND_MBCLK
2ND_MBDATA
WWW
MEDIDA

CRT_SENSE#

R259 4.7K_4R259 4.7K_4
R258 4.7K_4R258 4.7K_4
R256 4.7K_4R256 4.7K_4
R257 4.7K_4R257 4.7K_4
R282 4.7K_4R282 4.7K_4
R283 4.7K_4R283 4.7K_4

R266 4.7K_4R266 4.7K_4

1

+3VPCU

+3V

I/O ADDRESS SETTING

BADDR1-0

0 0

0 1

1 0

1 1

SHBM=0: Enable shared memory with host BIOS

BADDR0
BADDR1
SHBM

ID

MBCLK
MBDATA

SPI FLASH

SPI_SDI_uR

SPI_SDO_uR

SPI_SCK_uR

SPI_CS0#_uR

R343 10K_4R343 10K_4

TPCLK
TPDATA

INTERNAL KEYBOARD STRIP SET

MY0
MY16
MY17

CN17

CN17

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

*ACS

*ACS

2

I/O Address

Index

XOR TREE TEST MODE

CORE DEFINED

2Eh 2Fh

164Eh

BADDR0

SOUT_CR_DEBUG

RF_EN

R463 33_4R463 33_4

R464 33_4R464 33_4

R465 33_4R465 33_4

+3VPCU

R261 10K_4R261 10K_4
R260 10K_4R260 10K_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Data

164Fh

R278 10K_4R278 10K_4

R273 *10K_4R273 *10K_4

R265 10K_4R265 10K_4

H=1.75mm

U13

U13

SCL
SDA

WP

24LC08BT-I

24LC08BT-I

1

A0

2

A1

3

A2

8

VCC

4

GND

6
5

7

ADDRESS: A0H

H=2.16mm

U14

U14

SPI_SDI

2

SO

SPI_SDO

SPI_SCK

R277 10K_4R277 10K_4
R279 10K_4R279 10K_4
R280 10K_4R280 10K_4

EC-PC8763

EC-PC8763

EC-PC8763

VDD

5

SI

HOLD

6

WP

SCK

1

CE

VSS

W25X80VSSIG

W25X80VSSIG

+5V

+3VPCU

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

1

8

7

3

4

+3VPCU

+3VPCU

C257

C257
.1U_4

.1U_4

C251

C251
.1U_4

.1U_4

3A

3A

26 33Friday, May 25, 2007

26 33Friday, May 25, 2007

26 33Friday, May 25, 2007

3A

of

of

of

5

http://adf.ly/LOM1

4

3

2

1

0.02_3720

PR55 2.2/F_6PR55 2.2/F_6

47n/25V_6

47n/25V_6

PR59

PR59
130K/F_6

130K/F_6

10K_6

10K_6

ISL6251_VDD

3

1

1 2

3

PC39

PC39

PR60

PR60

PR57 10K_6PR57 10K_6

PR56 *10K_6PR56 *10K_6

PR52

PR52
*10K_6

*10K_6

PQ10

PQ10

*2N7002E

*2N7002E

0.02_3720
PR72

PR72

1P

2P

CSIP

CSOP_1

1 2

PC38

PC38

0.1U/X7R-50V_6

0.1U/X7R-50V_6

DCIN

6251ACSET

6251EN

6251CELLS_1

6251CELLS_2

PR51

PR51
*100K_6

*100K_6

21

22

23

24

2

3

2

PQ9

PQ9

*2N7002E

*2N7002E

0.1U/X7R-25V_8

0.1U/X7R-25V_8

CSOP

CSON

ACPRN

DCIN

ACSET

EN

4

3

1

CSIN

19

CSIP

CELLS

ICOMP5VCOMP

6251ICOMP

PC40

PC40
.01U/X7R-16V_4

.01U/X7R-16V_4

PC43

PC43
*100P_4

*100P_4

PC52

PC52

PC42

PC42

0.1U/X7R-50V_6

0.1U/X7R-50V_6

CSIN_1

20

CSIN

6

6251VCOMP1

PR62

PR62

3.3K/F_4

3.3K/F_4

6251VCOMP2

PC41

PC41
.01U/X7R-16V_4

.01U/X7R-16V_4

ISL6251_VDD

PR61

PR61
18_6

18_6

1

VDD

ICM7CHLIM

VRFE

8

VREF

PR76

PR76
220K/F_6

220K/F_6

PR75

PR75
220K/F_6

220K/F_6

15

VDDP

BOOT

UGATE

PHASE

LGATE

PGND

GND

VADJ

ACLIM

9

PC47

PC47
100P_4

100P_4

PR58

PR58

4.7_6

4.7_6

ISL6251_VDDP

PU3

PU3
ISL6251A

ISL6251A

1 6

2

3

PQ12

PQ12

IMD2AT108

IMD2AT108

PC37 2.2U/X5R-10V_8PC37 2.2U/X5R-10V_8

1 2

PR65 2.7_6PR65 2.7_6

6251B_2

16

ISL6251_UGATE

17

ISL6251_PHASE

18

ISL6251_LGATE

14

13

12

11

10

CC-SET [26]

PR63

PR63

*100_4

*100_4

PC44

PC44

*3300P/X7R-50V_4

*3300P/X7R-50V_4

PQ41

PQ41

SUD45P03-15-LF

4

1

FDS6900AS

FDS6900AS

G1

G1

8

7

6

5

VREF

PR64

PR64
*514K_F_6

*514K_F_6

PR68

PR68
*514K_F_6

*514K_F_6

SUD45P03-15-LF

0.1U/X7R-25V_8

0.1U/X7R-25V_8

PC126 10U/X6S-25V_1206PC126 10U/X6S-25V_1206

PC127 .1U/X7R-50V_8PC127 .1U/X7R-50V_8

PQ42

PQ42

Float =

4.2V /
CELL

3

PR77 0_6PR77 0_6

5

4

PC46 4.7U/X5R-10_8PC46 4.7U/X5R-10_8

1 2

PD4

PD4
RB500V

RB500V

PC45 .1U/X7R-50V_8PC45 .1U/X7R-50V_8

6251B_1

PR66

PR66
33K_6

33K_6

VADJ

ACLIM

PR67

PR67
33K_6

33K_6

LIM = 1/PR72(((0.05/VREF=2.39)VACLM)+0.050)
CURRNT LIMIT POINT = 3.750A

3.750A=1/0.02((0.05/2.365)Vaclm+0.05)
Vaclm=1.1950V

ICMNT

PCN1

D D

C C

B B

PCN1

20288-04XX-4P-L

20288-04XX-4P-L

4

3

2

1

+3VPCU

CN26

CN26

10

1
2
3

11

4
5
6
7
8

12

9

13

SUYIN BATTERY

SUYIN BATTERY

ADDRESS: 16H

ACIN[25,26]

PR81

PR81
*100K_4

*100K_4

PC51

PC51

.1U/X7R-50V_8

.1U/X7R-50V_8

ID

PR78

PR78
100_4

100_4

PC50

PC50
.1U/X7R-50V_8

.1U/X7R-50V_8

PR153

PR153
10K_4

10K_4

PC53

PC53

47P/NPO-50V_4

47P/NPO-50V_4

MBCLK

PD9

PD9
ZD5.6V

ZD5.6V

2 1

1 2

LITTLE-1206-7A

LITTLE-1206-7A

1 2

*LITTLE-1206-7A

*LITTLE-1206-7A

PR70

PR70

10K_6

10K_6

PR71

PR71

6.8K/F_6

6.8K/F_6

ID [26]

PR79

PR79
100_4

100_4

2 1

PF1

PF1

PF2

PF2

PC57

PC57

100P_4

100P_4

TEMP_MBAT

PC54

PC54

47P/NPO-50V_4

47P/NPO-50V_4

PD8

PD8

ZD5.6V

ZD5.6V

HI0805R800R-00_8

HI0805R800R-00_8

HI0805R800R-00_8

HI0805R800R-00_8

ACIN_1

PR69

PR69

10K_6

10K_6

3216FF20-1206-20A

3216FF20-1206-20A

12

PC56

PC56

0.1U/X7R-50V_6

0.1U/X7R-50V_6

MBDATA [3,18,26]

MBCLK [3,18,26]

PL3

PL3

PL4

PL4

PD7

PD7

2 1

ZD12V

ZD12V

PF3

PF3

1 2

PF4

PF4

1 2

*3216FF20-1206-20A

*3216FF20-1206-20A

PR80 10K_6PR80 10K_6

TEMP_MBAT

12

PC55

PC55
.01U/X7R-50V_6

.01U/X7R-50V_6

6251CELLS_1

PR54

PR54
0_4

0_4

1 2

VA

PC48

PC49

PC49

.1U/X7R-25V_8

.1U/X7R-25V_8

PD5

PD5
RB500V

RB500V

PC48

.1U/X7R-25V_8

.1U/X7R-25V_8

HI0805R800R-00_8

HI0805R800R-00_8

PL12

PL12

PL11

PL11

HI0805R800R-00_8

HI0805R800R-00_8

+3VPCU

TEMP_MBAT [26]

CELL-SET[26]

CELL-SET = Hi ----> Cells = VDD ---->4S
CELL-SET = Low ----> Cells = GND ---->3S

BAT-VMBAT+

*100K_6

*100K_6

PR53

PR53

CSOP

CSON

1

2

PD6

PD6
PDS1040S

PDS1040S

2

VIN

PC125

PC125

D/C# [26]

VIN

PL14

PL14

HI0805R800R-00_8

HI0805R800R-00_8

VA3

D1

D1

1

D1S1/D2

D1S1/D2

2

G2

G2

3

S2

S2

4

PL13

PL13

MPL73-6R8

MPL73-6R8

PR154

PR154

2.2_F_6

2.2_F_6

PC142

PC142
2200P_50V_6

2200P_50V_6

PR139

PR139
.03_3720

.03_3720

6251LR BAT-V

1 2

1P

2P

CSOP

CSON

10U/X6S-25V_1206

10U/X6S-25V_1206

2N7002E

2N7002E

1
2
3

PR73

PR73
33K_6

33K_6

2

PQ11

PQ11

PC122

PC122

10U/X6S-25V_1206

10U/X6S-25V_1206

PQ40

PQ40
FDS6675BZ

FDS6675BZ

4

3

1

PC123

PC123

PR74

PR74

10K_6

10K_6

8
7
6
5

PC124

PC124
.01U/X7R-50V_6

.01U/X7R-50V_6

A A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

PROJECT : BU1 Santa Rosa

ISL6251

ISL6251

ISL6251

1

3A

3A

27 33Friday, May 25, 2007

27 33Friday, May 25, 2007

27 33Friday, May 25, 2007

3A

of

of

of

5

http://adf.ly/LOM1

4

3

2

1

E E

D D

C C

B B

A A

+5VPCU

5

MAIND

SUSD

PL5

PL5

VIN

HI0805R800R-00_8

HI0805R800R-00_8

0.1U/X7R-50V_6

0.1U/X7R-50V_6

OCP: 12A

PC81

+

+

330U/6.3V_6X5.7

330U/6.3V_6X5.7

PC81

10U/X6S-25V_1206

10U/X6S-25V_1206

PC86

PC86

OCP:12A

L(ripple current)
=(19-5)*5/(1.5u*0.4M*19)
~6A

Iocp=12-(6/2)=9A
Vth=9A*15mOhm=135mV
R(Ilim)=(135mV*10)/5uA
~270K

+5VPCU

65241

3

PC103

PC103

0.1U/X7R-50V_6

0.1U/X7R-50V_6

+5VPCU

PQ29

PQ29
AO6402

AO6402

PC72

PC72

+5V_S5

MAIND [32]

SUSD [32]

PC65

PC65

2200P/X7R-50V_4

2200P/X7R-50V_4

PC95

PC95

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PR107

PR107

0_4

0_4

PC98

PC98

0.1U/X7R-50V_6

0.1U/X7R-50V_6

4.5A

PC71

PC71

10U/X6S-25V_1206

10U/X6S-25V_1206

PR100

PR100
*0_4

*0_4

1 2

12

SYS_SHDN#[3]

PC63

PC63

10U/X6S-25V_1206

10U/X6S-25V_1206

PL8

PL8

3.3uH

3.3uH

MAINDS5DS5D

PQ18

PQ18

FDS8884

FDS8884

PQ19

PQ19

FDS6690AS

FDS6690AS

15V

+5VPCU

3

1 2

PR102

PR102

0_4

0_4

578

3 6

241

578

3 6

241

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PR124

PR124

22_8

22_8

65241

PQ30

PQ30
AO6402

AO6402

+5V

PC104

PC104

0.1U/X7R-50V_6

0.1U/X7R-50V_6

4

5V_DH

5V_LX

PC97

PC97

+15V_ALWP

5V_DL

4.5A

3V5V_EN

PC102

PC102

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PC99

PC99

0.1U/X7R-50V_6

0.1U/X7R-50V_6

S5_ON[26]

VL

12

PR101

PR101
39K/F_4

39K/F_4

1 2

PR108 267K/F_4PR108 267K/F_4

PC88

PC88

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PD12

PD12

2

1

CHN217

CHN217

PD11

PD11

2

1

CHN217

CHN217

2

PQ33

PQ33

DTC144EU

DTC144EU

ISL6236_3V

VL

PC66

PC66

4.7U/X7R-10V_8

PC70

PC70

8

6

7

VIN

LDO

LDOREFIN

ISL6236

ISL6236

BST117DL118VDD19SECFB20GND21PGND22DL223BST2

PAD33PAD34PAD

PR118

PR118
22_6

22_6

3

PQ26

PQ26
2N7002E

2N7002E

1

4.7U/X7R-10V_8

1 2

PR97

PR97
0_4

0_4

1 2

4

3

5

RTC

ONLDO

PU5

PU5

PR119 0_6PR119 0_6

12

PR123

PR123
39K/F_4

39K/F_4

12

1

REF

TON2VCC

24

2

3

PR93

PR93
390K_4

390K_4

PC69

PC69

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PR92

PR92

150K/F_4

150K/F_4

3V5V_EN

PC101

PC101

0.1U/X7R-50V_6

0.1U/X7R-50V_6

3

PC100

PC100

0.1U/X7R-50V_6

0.1U/X7R-50V_6

3

1 2

PR122

PR122
200K/F_4

200K/F_4

1 3

.01U/X7R-16V_4

.01U/X7R-16V_4

+5VPCU

9

BYP

10

OUT1

11

FB1

12

DDPWRGD_R

ILIM1

13

PGOOD1

14

EN1

15

DH1

16

LX1

37

PAD

36

PAD

35

PR116

PR116
1_6

1_6

1 2

VL

PC90

PC90
1U/10V_6

1U/10V_6

3

2

1

PD10

PD10

BAT54-7-F

BAT54-7-F

VIN

PR128

PR128

1M_6

1M_6

S5_ON_G S5D

2

PR129

PR129
1M_6

1M_6

PC67

PC67

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PR99

PR99
*0_4

*0_4

REFIN2

ILIM2
OUT2

SKIP#

PGOOD2

EN2
DH2
LX2

1 2

3

1

PR137

PR137
22_6

22_6

32
31
30
29
28
27
26
25

PR113

PR113
1_6

1_6

PQ35

PQ35
2N7002E

2N7002E

12

PR103

PR103

PC68

PC68

0_4

0_4

1U/10V_6

1U/10V_6

12

1 2

DDPWRGD_R

1 2

3V5V_EN

PR95

PR95
*0_4

*0_4

PR106

PR106
287K/F_4

287K/F_4

PC82

PC82

0.1U/X7R-50V_6

0.1U/X7R-50V_6

3V_DH

3V_DL

OCP:6.25A

L(ripple current)
=(19-3.3)*3.3/(2.5u*0.5M*19)
~2.18A

Iocp=6.25-(2.18/2)=5.16A
Vth=5.16A*28mOhm=145mV
R(Ilim)=(145mV*10)/5uA
~294K

15V+5V_S5 +3V_S5

PR135

PR135
1M_6

1M_6

3

3

2

PQ31

PQ31
2N7002E

2N7002E

1

3V_DL

3V_LX

+3VPCU

4

S2

S2

5

DDPWRGD_R

65241

PC64

PC64

0.1U/X7R-50V_6

0.1U/X7R-50V_6

D1 S1/D2

D1 S1/D2

G2

G2

MAIND

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PQ16

PQ16
AO6402

AO6402

+3V_S5

PC80

PC80

123

D1

D1

G1

G1

876

PC75

PC75

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PQ28

PQ28

FDS6900AS

FDS6900AS

3V_DH

PR109

PR109
0_6

0_6

+3VPCU

3

1.5A

PC76

PC76

2200P/X7R-50V_4

2200P/X7R-50V_4

PL7

PL7

2.5uH_7.5A

2.5uH_7.5A

65241

PC78

PC78

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PQ20

PQ20
AO6402

AO6402

PC84

PC84

10U/X6S-25V_1206

10U/X6S-25V_1206

+3VPCU

SYS_HWPG [26]

3.5A

+3V

2

PL6

PL6

HI0805R800R-00_8

HI0805R800R-00_8

PC79

PC79
10U/X6S-25V_1206

10U/X6S-25V_1206

OCP : 6.25A

+3VPCU

PC83

PC83

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PC85

PC85

0.1U/X7R-50V_6

0.1U/X7R-50V_6

VIN

PC77

PC77

+

+

330U/6.3V_6X5.7

330U/6.3V_6X5.7

SUSD

+3VPCU

PC87

65241

PQ15

PQ15

3

AO6402

AO6402

PC62

PC62

0.1U/X7R-50V_6

0.1U/X7R-50V_6

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

PC87

0.1U/X7R-50V_6

0.1U/X7R-50V_6

+3VSUS

1.5A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

SYSTEM 5V/3V

SYSTEM 5V/3V

SYSTEM 5V/3V

1

1A

1A

28 33Friday, May 25, 2007

28 33Friday, May 25, 2007

28 33Friday, May 25, 2007

1A

of

of

of

5

http://adf.ly/LOM1

+1.05V

PR35

PR38

PR38
*0_6

D D

C C

H_PROCHOT#[3]

Panasonic
ERT-J0EV474J

B B

A A

*0_6

H_VID6

PWR_MON PGD_IN

12

PC27

PC27

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PSI#[3]

PR20 0_8PR20 0_8

+3VSUS

PR22

PR22

10K_4

10K_4

PR140

PR140

470K_4 NTC

470K_4 NTC

.01U/X7R-16V_4

.01U/X7R-16V_4

H_VID0[4]

H_VID1[4]

H_VID2[4]

H_VID3[4]

H_VID4[4]

H_VID5[4]

H_VID6[4]

VRON[26]

PM_DPRSLPVR[6,16]

ICH_DPRSTP#[3,6,14]

VR_PWRGD_CK410#[16]

255/F_4

255/F_4

PR18 97.6K/F_4PR18 97.6K/F_4

220P/X7R-50V_4

220P/X7R-50V_4

ED8-B -0623-390p to330p

PR35

PR39

PR39

*0_6

*0_6

*0_6

*0_6

H_VID5 H_VID2H_VID3 H_VID0H_VID1H_VID4

PR26

PR26

4.99K/F_6

4.99K/F_6

12

for ISL6262A

+5V_S5

PSI#

PSI# PSI#_1

VR_ON

PR21

PR21

4.02K/F_4

4.02K/F_4

PC23

PC23

1 2

PR33 0_4PR33 0_4

PR32 499/F_4PR32 499/F_4

PR31 0_4PR31 0_4

PR30 0_4PR30 0_4

PR14 1K/F_4PR14 1K/F_4

PR12

PR12

1000P/X7R-50V_6

1000P/X7R-50V_6

PC16

PC16

12

PC10

PC10

1U/X7R-25V_8

1U/X7R-25V_8

PR27 0_4PR27 0_4

PR24 *0_4PR24 *0_4

PR25 147K/F_6PR25 147K/F_6

H_VID0

H_VID1

H_VID2

H_VID3

H_VID4

H_VID5

H_VID6

PC15

PC15

1 2

PC19

PC19

12

470P/X7R-50V_4

470P/X7R-50V_4

PR17 6.81K/F_4PR17 6.81K/F_4

PC18

PC18

1 2

1000P/X7R-50V_6

1000P/X7R-50V_6

PR145

PR145
10_6

10_6

12

22N/X7R-50V_6

22N/X7R-50V_6

VR_ON

DPRSLPVR

CLKEN#

.01U/X7R-16V_4

.01U/X7R-16V_4

1 2

PC22

PC22

PR15

PR15

1K/F_4

1K/F_4

PR36

PR36
*0_6

*0_6

PC9

PC9

0.1U/X7R-50V_6

0.1U/X7R-50V_6

21

49

PGD_IN

37

38

39

40

41

42

43

44

45

46

47

13

12

11

10

.01U/X7R-16V_4

.01U/X7R-16V_4

PC7

PC7

2

3

4

5

6

7

9

PC14

PC14

1 2

4

VIN_6262

PR144

PR144
10_6

10_6

12

22

VCC

GND

GND_T

PSI#

PGD_IN

RBIAS

VR_TT#

NTC

SOFT

VID0

VID1

VID2

VID3

VID4

VID5

VID6

VR_ON

DPRSLPVR

DPRSTP#

CLK_EN#

VDIFF

FB2

FB

COMP

VW

15

1 2

ISL6262A

ISL6262A

RTN

20

VIN

VSEN

14

PR40

PR40
*0_6

*0_6

+3V

12

PR29

PR29
10_4

10_4

12

PC26 0.1U/X7R-50V_6PC26 0.1U/X7R-50V_6

48

PU1

PU1

3V3

UGATE1

BOOT1

PHASE1

LGATE1

PGND1

ISEN1

PVCC

UGATE2

BOOT2

PHASE2

LGATE2

PGND2

ISEN2

OCSET

VSUM

DROOP

16

PR13

PR13

3.48K/F_4

3.48K/F_4

PC8

PC8
180P/NPO-50V_4

180P/NPO-50V_4

PC6

PC6

.01U/X7R-16V_4

.01U/X7R-16V_4

1 2

PR9 0_4PR9 0_4

PR10 0_4PR10 0_4

PR28

PR28

1.91K/F_4

1.91K/F_4

1

PGOOD

NC

VO

DFB

17

12

PR37

PR37
*0_6

*0_6

35

36

34

32

33

24

31

27

26

28

30

29

23

25

8

19

18

ISL6262_VO

PR23 2.2/F_6PR23 2.2/F_6

1 2

0.22U/X5R-25V_8

0.22U/X5R-25V_8

PC21

PC21

1 2

4.7U/X6S-25V_8

4.7U/X6S-25V_8

PR16 2.2/F_6PR16 2.2/F_6

1 2

0.22U/X5R-25V_8

0.22U/X5R-25V_8

12

PC13

PC13

0.22U/X7R-10V_6

0.22U/X7R-10V_6

PR11

PR11

1K_4

1K_4

Parallel

PR41

PR41
*0_6

*0_6

12

PC24

PC24

ISEN1

+5V_S5

12

PC17

PC17

ISEN2

PC20

PC20

12

1000P/X7R-50V_4

1000P/X7R-50V_4

PR19 13.3K/F_4PR19 13.3K/F_4

VSUM

ED8-B -0623-33nf to 68nf

12

PR8

PR8

PC5

PC5

11K/F_4

11K/F_4

68N/X7R-25V_6

68N/X7R-25V_6

PR141

PR141

NTC_10K_6

NTC_10K_6

12

PC4

PC4

0.22U/X5R-25V_6

0.22U/X5R-25V_6

DELAY_VR_PWRGOOD [3,6,16]

6262_UG1

6262_PH1

6262_LG1

12

PC12

PC12

0.22U/X5R-25V_6

0.22U/X5R-25V_6

6262_UG2

6262_LG2

12

PC11

PC11

0.22U/X5R-25V_6

0.22U/X5R-25V_6

PR3

PR3

2.7K_4

2.7K_4

Panasonic
ERT-J1VR103J

VCCSENSE [4]

VSSSENSE [4]

3

VIN_6262

12

PC3

PC3

PQ4

PQ4
AOL1412

AOL1412

5

213

12

PC28

PC28

10U/X6S-25V_1206

10U/X6S-25V_1206

PD2

PD2
*SSM24PT-LF

*SSM24PT-LF

2 1

12

PC25

PC25

10U/X6S-25V_1206

10U/X6S-25V_1206

PD1

PD1
*SSM24PT-LF

*SSM24PT-LF

PQ2

PQ2

2 1

*AOL1412

*AOL1412

VSUM

ISEN2

6262_PH2

VSUM

ISEN1

4

4

PR7 3.65K/F_6PR7 3.65K/F_6

PR6 10K_6PR6 10K_6

PR4 1_6PR4 1_6

PR5 *0_6PR5 *0_6

4

4

5

213

PQ6

PQ6
AOL1414

AOL1414

5

PQ5

PQ5

213

*AOL1412

*AOL1412

5

213

PQ3

PQ3
AOL1414

AOL1414

5

PQ1

PQ1

213

AOL1412

AOL1412

PR146 3.65K/F_6PR146 3.65K/F_6

PR142 10K_6PR142 10K_6

PR149 1_6PR149 1_6

PR143 *0_6PR143 *0_6

PR150

PR150

2.2_F_6

2.2_F_6

10U/X6S-25V_1206

10U/X6S-25V_1206

PC139

PC139
2200P_50V_6

2200P_50V_6

4

PR151

PR151

2.2_F_6

2.2_F_6

PC140

PC140
2200P_50V_6

2200P_50V_6

4

5

213

12

PC149

PC149

*0.1U/X7R-50V_4

*0.1U/X7R-50V_4

1 2

PR2

PR2

0_6

0_6

VIN_6262

PC1

PC1

10U/X6S-25V_1206

10U/X6S-25V_1206

2

12

PC29

PC29

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PL17

PL17

3

12

1 2

3

PR147

PR147

0_6

0_6

PL1

PL1

HI0805R800R-00_8

HI0805R800R-00_8

PL2

PL2

HI0805R800R-00_8

HI0805R800R-00_8

.36uH

.36uH

4

330u_2V_7343

330u_2V_7343

PR1

PR1

0_6

0_6

12

PC2

PC2

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PL18

PL18

.36uH

.36uH

4

PR148

PR148

0_6

0_6

PC128

PC128
470U/25V

470U/25V

12

+

+

PC135

PC135

12

+

+

PC138

PC138

330u_2V_7343

330u_2V_7343

+

+

12

+

+

PC136

PC136

330u_2V_7343

330u_2V_7343

PC148

PC148

VCC_CORE

12

PC137

PC137

330u_2V_7343

330u_2V_7343

VIN

1500P/X7R-50V_4

1500P/X7R-50V_4

+

+

1

Merom: VCC_CORE/ 44A

5

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

4

3

2

Date: Sheet

PROJECT : BU1 Santa Rosa

CPU CAORE (6262A)

CPU CAORE (6262A)

CPU CAORE (6262A)

1

2A

2A

29 33Friday, May 25, 2007

29 33Friday, May 25, 2007

29 33Friday, May 25, 2007

2A

of

of

of

1

http://adf.ly/LOM1

2

3

4

5

A A

PR43

PR43

10_6

PR46

PR46

1M_6

1M_6

MAINON[19,26,31,32]

B B

PR48 0_6PR48 0_6

HWPG_1.05V[26]

PR47

PR47
*10K_6

*10K_6

+3V

PR45

PR45
10K_6

10K_6

PC30

PC30

0.1U/X7R-50V_6

0.1U/X7R-50V_6

PC32

PC32

1000P/X7R-50V_6

1000P/X7R-50V_6

12

PC33

PC33

.01U/X7R-50V_6

.01U/X7R-50V_6

12

10_6

PU2

PU2
SC411MLTRT

SC411MLTRT

15

16

1

2

3

4

6

5

14

EN/PSV

VIN

VOUT

VCCA

FBK

PGOOD

VSSA

NC

NC

VDDP

PGND

GND18GND19GND20GND

21

BST

ILIM

TPAD

PC35

PC35

*.1U/50V_6

*.1U/50V_6

DH

LX

DL

+5V_S5

21

PD3

PD3

12

PC36

PC36

SW1010C

SW1010C

4.7U/Y5V-10V_8

4.7U/Y5V-10V_8

PC34

PC34
.1U/X7R-50V_8

13

12

11

10

9

8

7

17

.1U/X7R-50V_8

DH-1.05V

PR50 6.65K_6PR50 6.65K_6

DL-1.05V

1500P/X7R-50V_4

1500P/X7R-50V_4

PC153

PC153

PC152

PC152

0.1U/X7R-50V_6

PQ43

PQ43
AOL1414

AOL1414

PQ44

PQ44
AOL1412

AOL1412

0.1U/X7R-50V_6

1R0UH-9mR

1R0UH-9mR

PR152

PR152

2.2_F_6

2.2_F_6

PC141

PC141
2200P_50V_6

2200P_50V_6

PL16

PL16

560U/2.5V_6X5.7

560U/2.5V_6X5.7

5

4

213

5

4

213

PC134

PC134

.1U/X7R-50V_8

.1U/X7R-50V_8

12

+

+

PC131

PC131

VIN-1.5V

PC132

PC132

10U/X6S-25V_1206

10U/X6S-25V_1206

12

+

+

PC133

PC133

PC130

PC130

10U/Y5U-10V_8

10U/Y5U-10V_8

560U/2.5V_6X5.7

560U/2.5V_6X5.7

PL15

PL15

HI0805R800R-00_8

HI0805R800R-00_8

PC129

PC129

10U/X6S-25V_1206

10U/X6S-25V_1206

PR42

PR42

11K_6

11K_6

PR44

PR44
10K_6

10K_6

VIN

PC31

PC31
33P/NPO-50V_6

33P/NPO-50V_6

16A

+1.05V

VOUT=(1+PR42/PR44)*0.5

C C

D D

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

1

2

3

4

Date: Sheet

PROJECT : BU1 Santa Rosa

VTT 1.05V (SC11)

VTT 1.05V (SC11)

VTT 1.05V (SC11)

5

2A

2A

30 33Friday, May 25, 2007

30 33Friday, May 25, 2007

30 33Friday, May 25, 2007

2A

of

of

of

5

http://adf.ly/LOM1

4

3

2

1

E E

2200P/X7R-50V_6

+1.8VSUS

SMDDR_VTERM

10U/Y5V-10V_1206

10U/Y5V-10V_1206

PR84

SMDDR_VREF

D D

PR83 *0_6PR83 *0_6

+1.8VSUS

PR82 0_6PR82 0_6

C C

PR84

0_6

0_6

DIS_MODE

PC119

PC119

PC120

PC120

10U/Y5V-10V_1206

10U/Y5V-10V_1206

PC121

PC121

10U/Y5V-10V_1206

10U/Y5V-10V_1206

DIS_MODE

PC59

PC59
.033U/50V_6

.033U/50V_6

5VIN

5VIN

PR86

PR86

0_6

0_6

FOR DDR II

10

1

2

4

5

3

6

7

8

9

PU4

PU4
TPS51116

TPS51116

VLDOIN

VTT

VTTSNS

GND

VTTGND

MODE

VTTREF

COMP

VDDSNS

VDDQSET

+5VPCU

DRVH

VBST

DRVL

PGND

PGOOD

GND21GND22GND23GND24GND25GND26GND

27

*1000P_50V_6

*1000P_50V_6

PR88

PR88

0_6

0_6

19

20

18

LL

17

16

S3_1.8V

11

S3

S5_1.8V

12

S5

5VIN

14

V5IN

13

15

CS

PC60

PC60

5VIN

12

PC61

PC61

4.7U/X5R-6.3V_6

4.7U/X5R-6.3V_6

PR90 0_6PR90 0_6

PR91 0_6PR91 0_6

PR85

PR85

8.25K/F_6

8.25K/F_6

PR87

PR87

100K_6

100K_6

PC58 0.1U/X7R-50V_6PC58 0.1U/X7R-50V_6

MAINON [19,26,30,32]

SUSON [26,32]

+3VPCU

PR89 *0_6PR89 *0_6

S3_1.8V S5_1.8V

HWPG_1.8V [26]

+3VPCU

578

3 6

578

3 6

241

241

FDS6690AS

FDS6690AS

PQ38

PQ38

PQ39

PQ39

FDS8884

FDS8884

578

3 6

241

PQ37

PQ37
FDS6690AS

FDS6690AS

PR138

PR138

2.2_F_6

2.2_F_6

PC118

PC118

2200P_50V_6

2200P_50V_6

1R5UH-3.8mR

1R5UH-3.8mR

PR98

PR98

2.2_F_6

2.2_F_6

PC73

PC73
2200P_50V_6

2200P_50V_6

2200P/X7R-50V_6

PC111

PC111

PL10

PL10

PC116

PC116

10U/X6S-25V_1206

10U/X6S-25V_1206

560U/2.5V_6X5.7

560U/2.5V_6X5.7

PC113

PC113

10U/X6S-25V_1206

10U/X6S-25V_1206

+

PC117

+

PC117

PC112

PC112

10U/X6S-25V_1206

10U/X6S-25V_1206

PC150

PC150

1500P/X7R-50V_4

1500P/X7R-50V_4

MAX Current 10A

PC115

PC115
10U/Y5V-10V_8

10U/Y5V-10V_8

PC151

PC151

0.1U/X7R-50V_6

0.1U/X7R-50V_6

+1.8VSUS

PL9

PL9

HI0805R800R-00_8

HI0805R800R-00_8

VIN

B B

A A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

PROJECT : BU1 Santa Rosa

DDR2 1.8V(TP1116)

DDR2 1.8V(TP1116)

DDR2 1.8V(TP1116)

1

3A

3A

31 33Friday, May 25, 2007

31 33Friday, May 25, 2007

31 33Friday, May 25, 2007

3A

of

of

of

5

http://adf.ly/LOM1

4

3

2

1

+1.8VSUS

+

+

PC114

E E

+3V

HWPG_2.5V[26]

D D

VIN

PR114

PR114
1M_6

1M_6

SUSON[26,31]

C C

2

PQ25

PQ25

DTC144EU

DTC144EU

1 3

PR117

PR117
1M_6

1M_6

2

+3VSUS 15V+1.8VSUS

PR136

PQ24

PQ24
2N7002E

2N7002E

PR136
22_6

22_6

3

2

PQ34

PQ34
2N7002E

2N7002E

1

PR115

PR115
22_6

22_6

3

1

PC114

560U/2.5V_6X5.7

560U/2.5V_6X5.7

PR132 100K_4PR132 100K_4

PR130 0_4PR130 0_4

+5VPCU

PR120

PR120
1M_6

1M_6

SUSDSUS_ON_G

3

2

PQ27

PQ27
2N7002E

2N7002E

1

9338ENMAINON

PC94

PC94

0.1U/Y5V-16V_4

0.1U/Y5V-16V_4

PC93

PC93
*2200P_4

*2200P_4

PC107

PC107

0.1U/Y5V-16V_4

0.1U/Y5V-16V_4

3

PGD

4

EN

1

VCC

SUSD [28]

PC106

PC106

10U/X5R-6.3V_6

10U/X5R-6.3V_6

DRV

ADJ

GND

2

PU7

PU7
G9338 ADJ

G9338 ADJ

PQ36 FDS8884PQ36 FDS8884

8
7

5

4

9338DRV

PR134

PR134

0_6

0_6

PC105

6

5

PC105

.01U/X7R-25V_4

.01U/X7R-25V_4

Vout1 = (1+PR121/PR125)*0.5

1
2
36

+1.25V

3A

+1.25V [2,9,17]

PR121

PR121
15K/F_6

15K/F_6

PR125

PR125
10K_6

10K_6

0.1U/Y5V-16V_4

0.1U/Y5V-16V_4

MAINON[19,26,30,31]

+1.8VSUS

PC109

PC109

PC110

PC110

10U/X5R-6.3V_6

10U/X5R-6.3V_6

560U/2.5V_6X5.7

560U/2.5V_6X5.7

PC91

PC91
10U/10V-LF_8

10U/10V-LF_8

+

+

PC108

PC108

PC89

PC89

.1U/50V-LF

.1U/50V-LF

1 2

PR127

PR127

0_6

0_6

12

+5VPCU

12

PC92

PC92
.1U/50V-LF_6

.1U/50V-LF_6

PU6

PU6
G966-25-LF

G966-25-LF

4

2

3
8
9

1

PGOOD

VPP

6

VEN

VO

VIN
GND

5

NC

GND

ADJ

7

PR131

PR131

1 2

30K/F_6

30K/F_6

PR133

PR133
34K/F_6

34K/F_6

HWPG_1.5V [26]

+1.5V

PC96

PC96
10U/10V-LF_8

10U/10V-LF_8

VO=0.8(PR131+PR133)/PR133

VIN

B B

MAINON[19,26,30,31]

A A

2

PQ21

PQ21

DTC144EU

DTC144EU

1 3

5

+1.25V +1.05V VCC_CORE

PR111

PR111

1M_6

1M_6

RUN_ON_G

PR110

PR110
1M_6

1M_6

PR126

PR126

22_6

22_6

3

2

PQ32

PQ32
2N7002E

2N7002E

1

+3V

PR34

PR49

PR49

22_6

22_6

3

2

PQ8

PQ8
2N7002E

2N7002E

1

PR34

22_6

22_6

3

2

1

PQ7

PQ7
2N7002E

2N7002E

3

2

1

4

+3V 15V+5V +1.5V

PR96

PR96

*22_6

*22_6

PQ14

PQ14
*2N7002E

*2N7002E

PR112

PR112
22_6

22_6

3

2

PQ23

PQ23
2N7002E

2N7002E

1

PR105

PQ13

PQ13
2N7002E

2N7002E

PR105
1M_6

1M_6

MAIND

3

2

PQ17

PQ17
2N7002E

2N7002E

1

MAIND [28]

PC74

PC74
*2200P_4

*2200P_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

3

2

Date: Sheet

PROJECT : BU1 Santa Rosa

DISCHARGE/1.5V/VCC1.25

DISCHARGE/1.5V/VCC1.25

DISCHARGE/1.5V/VCC1.25

1

2A

2A

32 33Friday, May 25, 2007

32 33Friday, May 25, 2007

32 33Friday, May 25, 2007

2A

of

of

of

PR104

PR104
22_6

22_6

3

2

PQ22

PQ22
2N7002E

2N7002E

1

PR94

PR94
22_6

22_6

3

2

1

5

http://adf.ly/LOM1

4

3

2

1

Model

BU1

D D

C C

B B

A A

REV

00

01

1A

2A

3A

3B

CHANGE LIST

20061218

20061225

20061227

20070201

20070326

20070327

20070328

20070329

20070427

20070430
20070509

FIRST RELEASED : 20061218

Page02: Change CLK GEN. low power outs from +1.05V to +1.25V.Because VDD_IO will drop out when high loading
Page02: REV_01 Remove CLK_MCH_OE#_R had pull up resistor,because had be pull up at NB side
Page03: Del R382,R383,Q60,D39
Page04: Del R176 for FBS signals batter return path under +1.05V plane
Page08: Change Crestline VCC_AXM to 1.25V, reference to SR ww48 MoW. reserved 0 ohm resister
Page16: Add D43 to avoid leakage from EC to SB,Del R242
Page18: REV_01 Reserved LCD/LED type panel module and Digital/analogy MIC
Page19: Modify G-Sensor circuit
Page22: Reserved LPC_PD# control signal from SB to R5C833
Page23: Increase HOLE
Page24: Add 0.1u CAP. C810 from +5VPCU to GND
Page25: Modify IDE LED circuit
Page26: Reserved R756,R766 for EC control G-Sensor
Page27: Add 3 cell Battery always setting circuit
Page28: Add +3V_S5 discharge circuit
Page30: Reserved PD resistor to avoid leakage voltage
Page32: Reserve +3V discharge circuit

A TEST (PCB REV_1A) RELEASED : 20061227

Page03: Modify thermal protect circuit and FAN control
Page14: Modify RTC charge current / SB strip setting / Reserved PU resistor on SATALED# signal / Change XTAL capacitor value
Page16: Reserver Pull down resistor on HDPINT signal / Reserved C-Link to WLAN / Delete FM function / Add Board ID
Page18: Change panel backlight signal pull up resistor / Change camera power source / Add LED type panel circuit / Add fuse on CRT power
/ Reserved EMI choke on USB signals and add EMI solution / Add RC circuit on LED panel driver IC
Page19: Modify LDO power source / Add Microprocessor reset IC / Reserved G-sensor SMBUS to SB chipset
Page22: Reserved Cardreader external EEPROM
Page23: Separate RF enable/disable pin from WLAN and 3G card / Add EMI solution and Reserved C-Link circuit / Delete 3G card function
/ Add HOLE for card Bus connector
Page24: Increase CN7 pin for control illumination logo and enable/disable USB port power / Add capacitor on keyboard signals for EMI
/ Change LAN/B cable connector / Delete FM function
Page25: Modify battery LED and RF SW power source / Delete 3G card LED
Page26: Modify EC control circuit / Add EMI solution / Change XTAL capacitor value
Page27: Change fuse rating and switch MOS
Page29: Add EMI solution
Page30: Add EMI solution
Page31: Add EMI solution
Page32: Add EMI solution
Page03: Add CAP to GND for FAN controller IC U12 power pin decoupling
Page13: Change DDR socket height
Page18: Exchange Dioid and Fuse placement
Page20: Add control LAN power circuit to enable/disable LAN
Page22: Change 1394 connector type and delete card reader connector 2nd source
Page23: Change mini-card 3V power source from +3VSUS to +3V_S5 for support wake on WLAN from S3/S4 / Change HOLE pad size
Page24: Reserve EMI capacitor / add solve insert PCMCIA Card speaker has bo sound circuit
Page25: Add ESD protect circuit
Page27: Change MOS footprint
Page14: Modify RTC short pad footprint
Page17: Modify inductance type
Page23: Add capacitors for EMI
Page24: Modify FFC connector footprint
Page26: Add capacitor for EMI
Page27: Reserve EMI circuit
Page22: Delete card reader external EEPROM
Page23: Add pull up resistor on PCIE_WAKE# signal
Page18: Delete CMO LED type connector
Page25: Reserve ESD protect on kill-switch
Page31: Stuff R/C Snubber for EMI
Page16: Net BOARD_ID3 change net-name to HOT_KEY and connect ot Page24
Page18: Add C561 0.1uF/50V/0603 for EMI Requirement
Page23: Add HOLE23 for mechanical requirement
Page24: CN5 add a signal "HOT_KEY"connect to Page16 to recognize the Function board is 7 or 3 keys
Page25: Add D35 for ESD
Page24: Add D36~D40 for ESD
Page16: Change Board ID Define

NOTEDATE

Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify

Circuit modify
BOM/Circuit modify
Circuit modify
BOM/Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
BOM/Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
BOM modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
BOM modify

5

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT : BU1 Santa Rosa

PROJECT : BU1 Santa Rosa

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

4

3

2

Date: Sheet

PROJECT : BU1 Santa Rosa

Change List

Change List

Change List

1

3B

3B

33 33Friday, May 25, 2007

33 33Friday, May 25, 2007

33 33Friday, May 25, 2007

3B

of

of

of