Quanta LA-2051 DFL10 Sapporo XA, Satellite A30, Satellite P10, Satellite P15 Schematic

A

B

COMPAL CONFIDENTIAL

C

D

E

1 1

MODEL NAME :
COMPAL P/N :
PCB NO :

LA-2051

Revision :

2 2

Sapporo XA

DFL10

1.0

Sappo ro XA Schematics Document
uFCBGA/ uF CP GA NorthWood MT

2003 11 07 v1.0

3 3

4 4

THIS SHEE T OF E N GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTH ORIZED B Y COMPAL E LECTRON ICS, INC . NEITH ER THIS S HEET NOR THE INFO RMATION IT CONT AINS

A

B

MAY BE US ED B Y O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONI CS, INC.

C

D

Title

Size Docume nt Nu mb e r Re v

Date: Sheet

Compal Electronics, Inc.

LA-2051

Cover Sheet

E

1.0

of

151Friday, November 14, 2003

A

B

C

D

E

Compal confidential

Block Diagram

Model : DFL10 LA-2051

1 1

2 2

Fan Control 1

+12VALW
+5VALW

+12VALW
+5VALW

page 37

Fan Control 2

page 37

TV OUT Connector

+3VS

CRT Connector

+5VS
+3VS

LVDS Connector

B+

page 17

page 18

page 18

CPU B ypass

page 6

CRT Signal

LVDS Signal

USB2.0 CTRL.

NEC uPD720101

page 24

IEEE 1394

TSB43AB21

+3V
+3VS

1394 Conn.

PCI BUS

IDSEL:AD16
PIRQA#

page 19

page 19

+3VS 33MHz

IDSEL:AD20
PIRQB#

CardBus

CB1410

+3V
+3VS

page 20

PWR Controller & Slot

+12VALW +5VALW
+3VALW

page 21

LAN
RTL8101L

+3V
+2.5VLAN

RJ45

IDSEL:AD19
PIRQD#

page 22

page 23

IDSEL:AD18
PIRQC#

Minipci CONN

WIRELESS & Dubug

+3V
+3VS
+5VS

3 3

page 25

Super I/O

On/Off BTN &
User Keys

+3VALW

page 37

Powe r Circuit
DC/DC

page 40

4 4

A

SW Board Conn

+5VALW

page 37

RTC Batt.

page 37

DC/D C Interface
Suspend

page 36

B

LPC47N217

+3VS

Parallel

+5VS

page 34

Debug COM Port

+5V

page 34

FIR

+3VS

page 34

NorthWood-MT -- 533

Prescott-MT -- 533
Celeron-MT -- 400

+1.2VP

uFCPGA CPU

+CPU_CORE

ATI RC 300ML

+1.5VS
+2.5V

718 pin u-BGA

+3VS
+CPU_CORE

A LINK

+1.5VS
66MHz

+3VS
+3VALW
+1.5VS
+1.5VALW
+CPU_CORE
VCC5REF
VCC5REFSUS

LPC BUS

page 34

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D

Therm al S ensor

478pin

page 4,5,6

System Bus

400/533 MHz

page 7,8,9,10,11,12

HD#(0..63)HA#(3..31)

ATI IXP150
457 BGA

page 26,27,28,29

+3VS
33MHz

Embedded Controller

NS PC87591L

+3VS
+3VALW

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

C

DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS
MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

page 31

EC DEBUG & Int. KB

+3VALW

page 31

BIOS & Ext. IO

+3VALW
+5VALW

page 32

LID SW & Kill SW

+3VALW

page 31

Touch Pad

+5VS

page 31

LID Hib e rnation

+5VALW

+RTC_VREF

page 39

ADM1032AR

+5VS +3VS

Memory
BUS(DDR)

48MHz

24.576MHz

IDE HDD

+5VS

page 6

+2.5V 333MHz

USB 2.0/1.1

AC-LINK

ATA100

page 30

D

IDE ODD

+5VCD

page 30

PIDE IRQ15SIDE IRQ14

Clock Generator

ICS951402AGT

+5VALW

INT. Speaker

page 33

page 16

DDR-DIMM X2

BANK 0, 1, 2, 3

+2.5V
+1.25VS

page 13,14,15

USB Ports X3
( X1 reserve )

+5V

page 27

MDC

+5VS
+3VS
+3V

page 23

AC97 Codec

ALC202A

+5VALW -> +VDDA
+3VS

page32

AMP TPA0232

page 33

HeadPhone

+AUD_VREF

page 33

Title

Size Document Number Re v

Date: Sheet of

Compal Electronics, Inc.

Block Diagram

LA-2051

RJ11

Cable

MIC Phone

+5VDDA

LINE IN

+5VDDA

E

Cable

page 33

251Friday, November 14, 2003

1.0

5

Voltage Rails

Power Plane

VIN

D D

C C

B+
+CPU_C O R E Core voltage for CPU
+1.2V
+1.25VS
+1.5VS
+1.8VS
+2.5VALW
+2.5V
+2.5VS
+3VALW
+3V 3.3V system power rail for SB,LAN,CardReader and HUB.
+3VS OFF

+5V 5V system power rail .
+5VS
+12VALW
RTCVCC ON

Description

Adapter po w e r s up p ly (19V)
AC or ba tte ry p ow e r r ai l for power circuit.

The vol ta ge fo r Pr oc e ssor VID select

1.25V s w i tc he d po w er rail for DDR Vtt

1.5V I/O power rail for ATI-RS300M/RC300M NB AGP.

1.8V sw i tc h ed p ow e r r ai l f or A TI-RS300M/RC300M NB.

2.5V always on power rail

2.5V system power rail for DDR

2.5V switched power rail

3.3V always on power rail

3.3V switched power rail

5V switched power rail OFF
12V always on power rail
RTC power

4

S5

S3

S0-S1

N/AONN/A

N/A

N/A

N/A
ON
ON

ON
ON

ON

ON
ON
ON
ON
ON
ON
ON ON OFF
ON
ON
ON

N/A
OFF

OFF
OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

ONON

ON*

ON

OFF

OFF

OFF
ON*

ON

OFF

ON

OFF

ON

ON*+5VALW 5V always on power rail

OFF
ON

ON*

ON

3

Power Managment table

State

S0

S1

S3

S5 S4/AC

S5 S4/AC don't exist

Signal

2

+3VALW
+5VALW
+12VALW

ON

ON ON ON

ON ON

ON OFF

OFF OFF OFF

+5V
+3V
+2.5V

+2.5VS
+1.8VS
+5VS
+3VS
+1.5VS
+CPU_CORE
+1.25VS

ON ON

1

OFF

OFF

Note : ON * m e a ns th a t th i s po w e r p l an e i s O N o nl y w i th A C p o w er av a i l ab l e, o therwise it is OFF.

External PCI Devices

IDSEL # PIRQREQ/GNT #DEVICE

NB Internal VGA
AGP BUS
SOUTHBRIDGE
USB

B B

AC97
ATA 100
ETHERNET
1394
LAN
CARD BUS
Wire les s LAN(MINI PCI)

EXT USB AD23(EXT.) 4 A,C,D

N/A
AGP_DEVSEL
AD31 (INT.)
AD30 (INT.)
AD31 (INT.)
AD31 (INT.)
AD24(INT.)
AD16
AD19
AD20
AD18

EC SM Bus1 address

Device Address Address

Smart Battery

A A

EEPROM(24C16)

I2C / SMB US ADDRESSING

1010 000X b

N/A
N/A
N/A
N/A
N/A
N/A
N/A
0
1
2
3

EC SM Bus2 address

DEVICE HEX ADDRESS

DDR SO- DIMM 0
DDR SO- DIMM 1
CLOCK GENERATOR (EXT.)A2D2

5

1 0 1 0 0 0 0 XA0
1 0 1 0 0 0 1 X
1 1 0 1 0 0 1 X

Device

ADM1032

4

N/A

A
A

D
B
A
C
A
D
A
C

1001 100X b0001 011X b

BOARD ID

Version

0
1
2
3

THIS SHEE T OF E N GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTH ORIZED B Y COMPAL E LECTRON ICS, INC . NEITH ER THIS S HEET NOR THE INFO RMATION IT CONT AINS
MAY BE US ED B Y O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONI CS, INC.

3

SKU ID Table for AD channel

Vcc 3.3V +/- 5%

SKU ID

BID0BID1

0
0
1
11

100K +/- 5%Ra

0
1

8.2K +/- 5%

2

18K +/- 5%

3

33K +/- 5%
56K +/- 5%

4

100K +/- 5%

5

200K +/- 5%

6
7 NC

0
1
0

Rb V min

0

AD_BID

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

Sku ID

0
1
2
3
4
5
6
7

2

Vtyp

AD_BID

0 V 0 V

0.503 V

0.819 V

1.185 V 1.264 V

2.200 V

3.300 V

CD PLAY F UNCTION

YES YES

NO YES
NO NO

Compal Electronics, Inc.

Title

Note & Revision

Size Docume nt Nu mb e r Re v

LA-2051

Date: Sheet

V

max

AD_BID

0.538 V

0.875 V

2.341 V

3.300 V

Short cut key

NOYES

351Tuesday, November 18, 2003

1

1.0

of

5

D D

A10

A12

A14

HA#[3..31]7 HD#[0..63] 7

C C

H_REQ#[0..4]7

+CPU_CORE

B B

H_REQ#[0..4]

H_ADS#7

+CPU_CORE

R4 56 _0402_5%

1 2

H_BREQ0#7

H_BPRI#7
H_BNR#7
H_LOCK#7

CLK_CPU_BCLK16
CLK_CPU_BCLK#16

H_HIT#7
H_HITM#7

H_DEFER#7

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_ADS#

R36 51_0402_5%

1 2

CLK_CPU_BCLK
CLK_CPU_BCLK#

FOX_PZ47803-274A-42_Prescott

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

AF22
AF23

M6
M3

M4
N1
M1
N2
N4
N5

R2
P3
P4
R3

U1
P6
U3

V2
R6
W1

U4
V3
W2
Y1

AB1

K5

H3
G1

AC1

V5
AA3
AC3

H6

D2

G2

G4

E3

E2

K2
K4
L6
K1
L3

L2

T1

T2

T4

T5

J1
J4

J3

F3

JCPU1A

A#3
A#4
A#5
A#6
A#7
A#8
A#9
A#10
A#11
A#12
A#13
A#14
A#15
A#16
A#17
A#18
A#19
A#20
A#21
A#22
A#23
A#24
A#25
A#26
A#27
A#28
A#29
A#30
A#31
A#32
A#33
A#34
A#35

REQ#0
REQ#1
REQ#2
REQ#3
REQ#4
ADS#

AP#0
AP#1
BINIT#
IERR#

BR0#
BPRI#
BNR#
LOCK#

BCLK0
BCLK1

HIT#
HITM#
DEFER#

CON
TROL

VCC_0

VCC_1

VCC_2

HOST
ADDR

CONTROL

CLK

VSS_0H1VSS_1H4VSS_2

4

AA16

AA18

AA8

AB11

AB13

AB15

AB17

AB19

AB7

AB9

AC10

AC12

AC14

AC16

AC18

AC8

AD11

AD13

AD15

AD17

AD19

AD7

AD9

AE10

A16

A18

A20

AA10

AA12

AA14

VCC_3

VCC_4

VCC_5

VCC_6A8VCC_7

VCC_8

VCC_9

VCC_10

VCC_11

VCC_12

VCC_13

VCC_14

VCC_15

VCC_16

VCC_17

VCC_18

VCC_19

VCC_20

VCC_21

VCC_22

VCC_23

VCC_24

VCC_25

AE12

VCC_26

VCC_27

VCC_28

VCC_29

VCC_30

VCC_31

VCC_32

VCC_33

VCC_34

Northwood-MT
Prescott-MT

GND

VSS_3

VSS_4

VSS_5

VSS_6

VSS_7

VSS_8

VSS_9

VSS_10

VSS_11

VSS_12A3VSS_13A9VSS_14

VSS_15

VSS_16

VSS_17

VSS_18

VSS_19

VSS_20

VSS_21

VSS_22

VSS_23

VSS_24

VSS_25

VSS_26

VSS_27

VSS_28

VSS_29

VSS_30

VSS_31

VSS_32

A11

A13

A15

A17

A19

A21

A24

H23

A26

H26

AA1

AA4

AA7

AA13

AA15

AA17

AA19

AA23

AA26

AA9

AB10

AB12

AB14

AB16

AB18

AB20

AB21

AB24

AA11

AE14

AE16

AE18

VCC_35

VCC_36

VCC_37

POWER

VSS_33

VSS_34

VSS_35

AB3

AB6

AB8

AE20

VCC_38

VSS_36

AC11

AE6

VCC_39

VSS_37

AC13

AE8

AF11

VCC_40

VSS_38

AC15

AC17

AF13

VCC_41

VCC_42

VSS_39

VSS_40

AC19

3

AF15

VCC_43

VSS_41

AC2

AF17

VCC_44

VSS_42

AC22

AF19

VCC_45

VSS_43

AC25

AF2

VCC_46

VSS_44

AC5

AF21

VCC_47

VSS_45

AC7

AF5

VCC_48

VSS_46

AC9

AF7

VCC_49

VSS_47

AD10

AF9

VCC_50

VSS_48

AD12

B11

VCC_51

VSS_49

AD14

B13

VCC_52

VSS_50

AD16

B15

VCC_53

VSS_51

AD18

B17

VCC_54

VSS_52

AD21

B19

VCC_55

VSS_53

AD23

VCC_56B7VCC_57B9VCC_58

VSS_54

AD4

VSS_55

AD8

C10

C12

C14

VCC_59

BOOTSELECT

AD1

C16

C18

C20

VCC_61

VCC_62

VCC_63

POWER

VCC_81

VCC_82

F13

F15

F17

2

+CPU_CORE

D11

D13

D15

D17

D19

D9

E10

VCC_64

VCC_65C8VCC_66

VCC_67

VCC_68

VCC_69

VCC_70

VCC_71D7VCC_72

VCC_73

B21

D#0

B22

D#1

A23

D#2

A25

D#3

C21

D#4

D22

D#5

B24

D#6

C23

D#7

C24

D#8

B25

D#9

G22

D#10

H21

D#11

C26

D#12

D23

D#13

J21

D#14

D25

D#15

H22

D#16

E24

D#17

G23

D#18

F23

D#19

F24

D#20

E25

D#21

F26

D#22

D26

D#23

L21

D#24

G26

D#25

H24

D#26

M21

D#27

L22

D#28

J24

D#29

K23

D#30

HOST
ADDR

VCC_75

VCC_76

VCC_77

VCC_78

VCC_79E8VCC_80

VCC_83

VCC_84

VCC_85

F9

F11

F19

E14

E16

E18

E20

VCC_74

E12

+CPU_CORE

D#31
D#32
D#33
D#34
D#35
D#36
D#37
D#38
D#39
D#40
D#41
D#42
D#43
D#44
D#45
D#46
D#47
D#48
D#49
D#50
D#51
D#52
D#53
D#54
D#55
D#56
D#57
D#58
D#59
D#60
D#61
D#62
D#63

H25
M23
N22
P21
M24
N23
M26
N26
N25
R21
P24
R25
R24
T26
T25
T22
T23
U26
U24
U23
V25
U21
V22
V24
W26
Y26
W25
Y23
Y24
Y21
AA25
AA22
AA24

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

HD#[0..63]HA#[3..31]

1

BOOTSELECT

3

0_0402_5%

12

R8

Compal Electronics, Inc.

Title

Prescott / P4 uFCPGA (1/2)

Size Docume nt Nu mb e r Re v

LA-2051

Custom

2

Date: Sheet

451Friday, November 14, 2003

1

1.0

of

A A

THIS SHEE T OF E N GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D

5

4

DEPARTMENT EXCE PT AS AUTH ORIZED B Y COMPAL E LECTRON ICS, INC . NEITH ER THIS S HEET NOR THE INFO RMATION IT CONT AINS

5

+CPU_CORE

1 2

R56 51_0402_5%

D D

1 2

R59 51_0402_5%

1 2

R47 51_0402_5%

1 2

R46 51_0402_5%

1 2

R55 51_0402_5%

1 2

R57 51_0402_5%

+CPU_CORE

R2 150_0402_5%

R51 39.2_0603_1%

1 2

C C

R586 75_0402_5%

R43 680_0402_5%

R52 27.4_0603_1%

+CPU_CORE

1 2

LQG21F4R7N00_0805

1 2

LQG21F4R7N00_0805

B B

Comp0/1 need keep 25
mils trace width

+CPU_CORE

R560 56_0402_5%

R1 56_0402_5%

R66 56_0402_5%

A A

H_RS#[0..2]7

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5

ITP_TDI

12

ITP_TMS

12

ITP_TDO

ITP_TRST#

12

ITP_TCK

12

L27

1

L26

+

C423

@33U_D2_8M_R35

2

CLK_CPU_ITP16
CLK_CPU_ITP#16

Place near SB200

H_FERR#

1 2

Place near CPU

H_THERMTRIP#

1 2

H_RESET#

1 2

H_PWRGD

1 2

R64 300_0402_5%

PM_STPCPU#10,16, 26,47

5

H_TRDY#7

H_A20M#26

H_FERR#26
H_IGNNE#26
H_SMI#26
H_PWRGD26
H_STPCLK#26

H_INTR26
H_NMI26
H_INIT#26
H_RESET#7,26

H_DBSY#7

H_DRDY#7

BSEL012,16

BSEL112,16

H_THERMDA6
H_THERMDC6

H_THERMTRIP#6

1

+

C422
33U_D2_ 8M_R35

2

H_RS#[0..2]

VCCIOPLL

VCCA

VCCSENSE47
VSSSENSE47

1 2

+1.2V

R587 0_0402_5%

VSSA

1 2

R96 51.1 _0603_1%

1 2

R11 51.1 _0603_1%

If CP U is P 4 , Change the
resist o r R 53 9,R540 value to

51.1_0603_1%,or prescott

61.9_ 0603_1%

R7

1 2

4.7K_0402_5%

H_RS#0
H_RS#1
H_RS#2

H_TRDY#

H_A20M#
H_FERR#
H_IG NNE#
H_SMI#
H_PWRGD
H_STPCLK#

H_INTR
H_NMI
H_INIT#
H_RESET#

H_DBSY#
H_DRDY#
BSEL0
BSEL1

H_THERMDA
H_THERMDC

H_THERMTRIP#

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5

ITP_TCK
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#

VCCSENSE
VSSSENSE

COMP0

COMP1

+3VS

12

Q2

2

MMBT3904_SOT23

3 1

AB2

AB23

AB25

AD6
AD5

AC6
AB5
AC4

AA5
AB4

AD20
AE23

AF3

AD22

AC26
AD26

L24

R9

4.7K_0402_5%

2

JCPU1B

F1

RS#0

G5

RS#1

F4

RS#2
RSP#

J6

TRDY#

C6

A20M#

B6

FERR#

B2

IGNNE#

B5

SMI#
PWRGOOD

Y4

STPCLK#

D1

LINT0

E5

LINT1

W5

INIT#
RESET#

H5

DBSY#

H2

DRDY#
BSEL0
BSEL1

B3

THERMDA

C4

THERMDC

A2

THERMTRIP#

BPM#0
BPM#1
BPM#2

Y6

BPM#3
BPM#4
BPM#5

D4

TCK

C1

TDI

D5

TDO

F7

TMS

E6

TRST#
VCCIOPLL

VCCA

A5

VCCSENSE

A4

VSSSENSE
VCCVIDLB

VSSA

ITP_CLK0
ITP_CLK1

COMP0

P1

COMP1

Q1
MMBT3904_SOT23

3 1

4

GND

AE11

AE13

VSS_57

CON
TROL

LEGACY

ITP
CLK

VSS_129F8VSS_130

G21

H_DPSLPR#

4

VSS_58

AE15

AE17

AE19

AE22

AE24

AE7

AE9

AF1

AF10

AF12

VSS_59

VSS_60

VSS_61

VSS_62

VSS_63

VSS_65

VSS_66

VSS_67

VSS_68

MISC

THER
MAL

MISC

ITP

MISC

VSS_131

VSS_132G3VSS_133G6VSS_134J2VSS_135

VSS_136

VSS_137J5VSS_138

VSS_139

J22

J25

K21

K24

G24

FOX_PZ47803-274A-42_Prescott

AF14

AF16

AF18

AF20

AF6

VSS_69

VSS_70

VSS_71

VSS_72

VSS_73

VSS_140K3VSS_141K6VSS_142L1VSS_143

VSS_144

L23

L26

3

D14

D16

D18

D20

D21

D24

E11

E13

E15

E17

E19

E23

E26

VSS_112

VSS_113

VSS_114

VSS_115

F10

VSS_116

VSS_117E4VSS_118E7VSS_119E9VSS_120

AF8

VSS_75

VSS_76

B10

VSS_77

B12

VSS_78

B14

VSS_79

B16

VSS_80

B18

VSS_81

B20

B23

VSS_82

VSS_83

B26

VSS_84

C11

C13

VSS_85B4VSS_86B8VSS_87

VSS_88

C15

C17

VSS_89

C19

VSS_90

VSS_91

C22

C25

VSS_92C2VSS_93

VSS_94

D10

D12

VSS_95C5VSS_96C7VSS_97C9VSS_98

VSS_99

VSS_100

VSS_101

VSS_102

VSS_103

VSS_104

VSS_105

VSS_106D3VSS_107D6VSS_108D8VSS_109E1VSS_110

VSS_111

GROUND

Northwood-MT
Prescott-MT

GROUND MISC

VID0

VID1

VID2

VID3

VSS_145L4VSS_146M2VSS_147

VSS_148

VSS_149M5VSS_150

VSS_151

VSS_152N3VSS_153N6VSS_154P2VSS_155

VSS_156

VSS_157P5VSS_158R1VSS_159

VSS_160

VSS_161R4VSS_162

VSS_163

VSS_164T3VSS_165T6VSS_166U2VSS_167

VSS_168

VSS_169U5VSS_170V1VSS_171

VSS_172

VSS_173V4VSS_174

VSS_175

VSS_176W3VSS_177W6VSS_178Y2VSS_179

VSS_180

T21

T24

P22

P25

N21

N24

R23

M22

M25

R26

Reserve
for EMI.
Near CPU.

THIS SHEE T OF E N GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTH ORIZED B Y COMPAL E LECTRON ICS, INC . NEITH ER THIS S HEET NOR THE INFO RMATION IT CONT AINS

3

V23

V26

U22

U25

+3VS

1 8
2 7
3 6
4 5

R6 10 K_0402_5%

1 2

R5 10 K_0402_5%

1 2

CPU_VID[0..5]47

Y22

Y25

W21

W24

10K_1206_8P4R_5%
RP1

Y5

VSS_181

VID4

AE5

AE4

AE3

AE2

AE1

AD3

CPU_VID5

CPU_VID2

CPU_VID0

CPU_VID1

CPU_VID3

CPU_VID4

F12

VID5

F14

F16

VSS_121

VSS_122

AD2

VSS_123

VIDPWRGD

2

AF26

F18

F22

F25

F5

VSS_124

VSS_125F2VSS_126

VSS_127

VSS_128

SKTOCC#

REF

OPTIMIZED/COMPAT#

ITP

DATA

ADDR

DATA

MISC

VCCVID

AF4

Pop: Prescott
Depop: Northwood

R12
@2.43K_0603_1%

2

1

H_SKTOCC#

12

R403
@33_0402_5%

J26

DP#0

K25

DP#1

K26

DP#2

L25

DP#3

AA21

GTLREF0

AA6

GTLREF1

F20

GTLREF2

F6

GTLREF3

AE26

AD24

TESTHI0

AA2

TESTHI1

AC21

TESTHI2

AC20

TESTHI3

AC24

TESTHI4

AC23

TESTHI5

AA20

TESTHI6

AB22

TESTHI7

U6

TESTHI8

W4

TESTHI9

Y3

TESTHI10

A6

TESTHI11

AD25

TESTHI12

E22

DSTBN#0

K22

DSTBN#1

R22

DSTBN#2

W22

DSTBN#3

F21

DSTBP#0

J23

DSTBP#1

P23

DSTBP#2

W23

DSTBP#3

L5

ADSTB#0

R5

ADSTB#1

E21

DBI#0

G25

DBI#1

P26

DBI#2

V21

DBI#3

AE25

DBR#

C3

PROCHOT#

V6

MCERR#

AB26

SLP#

A22

NC1

A7

NC2

AF25

NC3

AF24

NC4

AE21

NC5

+1.2V

12

+1.2V

H_VID_PWRGD 38

Title

Size Docume nt Nu mb e r Re v
Custom

Date: Sheet

H_GHI#

1 2

R42

0_0402_5%

+H_GTLREF

C47

1 2

220P_0603_50V8J

R_G

R404 0_ 0402_5%

1 2

1 2

R408 56_0402_5%

1 2

R409 56_0402_5%

R58 56_0402_5%

1 2

R60 56_0402_5%

1 2

R38 56_0402_5%

1 2

R45 56_0402_5%

1 2

R39 56_0402_5%

1 2

H_GHI#
H_DPSLPR#

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_ADSTB#0
H_ADSTB#1

H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3

H_PROCHOT#
H_SLP#

1

C1

0.1U_0402_10V6K

2

R35 300_0402_5%

1 2

R405 56_0402_5%

1 2

H_DSTBN#[0..3]

H_DSTBP#[0..3]

H_DBI#[0..3]

R410 150_0402_5%

1 2

R10 100K_0402_1%

GTL Refe re n c e V o l tage

Layout note :

1. Place R_A and R _B near C PU (Wi thi n 1.5" ).

+CPU_CORE

12

12

R74

49.9_0603_1%

12

R67
100_0603_1%

H_DSTBN#[0..3] 7

H_DSTBP# [0..3] 7

H_ADSTB#0 7
H_ADSTB#1 7

H_DBI#[0..3] 7

+3VALW

+CPU_CORE

H_PROCHOT# 26,46

H_SLP# 26

Compal Electronics, Inc.

Prescott / P4 uFCPGA & Thermal sensor (2/2)

LA-2051

551Friday, November 14, 2003

1

CPU_GHI# 27

+CPU_CORE

+H_GTLREF

1

C50
1U_0603_6.3V6M

2

of

1.0

A

1 1

+CPU_CORE

1

2 2

2

+CPU_CORE

1

2

C396
22U_1206_6.3V6M

C384
22U_1206_6.3V6M

B

Layout note :

Place close to CPU, Use 2~3 vias per PAD.
Place 22uF caps x31 pcs, populated 14pcs.

Place on CPU inside

1

2

1

C380
22U_1206_6.3V6M

2

C388
22U_1206_6.3V6M

1

C383
22U_1206_6.3V6M

2

1

C398
22U_1206_6.3V6M

2

C

1

2

1

2

C379
22U_1206_6.3V6M

C390
22U_1206_6.3V6M

1

C397
22U_1206_6.3V6M

2

1

C385
22U_1206_6.3V6M

2

D

1

C389
22U_1206_6.3V6M

2

1

C381
22U_1206_6.3V6M

2

E

Layout note :

Place close to CPU power and
ground pin as possible
(<1inch)

For Desktop's CPU:

470uFx15/12mOhm H=1.8 each
Total 0.923m ohm

F

+CPU_CORE

1

+

2

+CPU_CORE

1

+

2

+CPU_CORE

1

+

2

G

C382
@470U_D2_2.5VM

C407
470U_D4_2.5VM

C40
470U_D4_2.5VM

1

+

2

1

+

2

1

+

2

C392
470U_D4_2.5VM

C419
470U_D4_2.5VM

C48
470U_D4_2.5VM

H

1

+

2

1

+

2

1

+

2

C401
470U_D4_2.5VM

C30
470U_D4_2.5VM

C58
470U_D4_2.5VM

1

+

2

1

+

C404
470U_D4_2.5VM

2

1

+

C33
470U_D4_2.5VM

2

C65
470U_D4_2.5VM

I

+

1

C36
470U_D4_2.5VM

2

J

3 3

+CPU_ CORE

1

+CPU_ CORE

1

2

+CPU_CORE

+CPU_CORE

2

C412
22U_1206_6.3V6M

1

C21
22U_1206_6.3V6M

2

1

C74
22U_1206_6.3V6M

2

4 4

5 5

6 6

7 7

H_THERMDA5

8 8

H_THERMDC5

A

Please place these cap on the socket north side

C409
22U_1206_6.3V6M

1

C413
22U_1206_6.3V6M

2

1

C408
22U_1206_6.3V6M

2

1

C414
22U_1206_6.3V6M

2

1

C418
22U_1206_6.3V6M

2

1

C415
22U_1206_6.3V6M

2

Please place these cap on the socket sourth side

1

C22
22U_1206_6.3V6M

2

1

C75
22U_1206_6.3V6M

2

1

C23
22U_1206_6.3V6M

2

1

C20
22U_1206_6.3V6M

2

CPU Temperature Sensor

H_THERMDA

1

C39

2200P_0402_50V7K

H_THERMDC

EC_SMC235

EC_SMD235

B

2

1

2

+3VS

C

1

C410
22U_1206_6.3V6M

2

C19
22U_1206_6.3V6M

R63

1 2

200_0402_5%

U4

2

D+

3

D-

8

SCLK

7

SDATA

ADM1032ARM_RM8

1

C416
22U_1206_6.3V6M

2

1

C72
22U_1206_6.3V6M

2

+3VS_VDD

1

C42

0.1U_0402_10V6K

2

VDD1

ALERT#

THERM#

GND

1

C411
22U_1206_6.3V6M

2

1
6
4
5

D

1

C417
22U_1206_6.3V6M

2

1

C73
22U_1206_6.3V6M

2

12

R54
10K_0402_5%

+CPU_CORE

1

C82

@0.22U_0603_10V7K

2

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS

E

F

1

C81

@0.22U_0603_10V7K

2

+CPU_CORE

H_THERM TRIP#5 MAINPWON 41 ,42,44

G

1

C80

@0.22U_0603_10V7K

2

R3 300_0402_5%

12

H_THERM TRIP#

I

1

C16

@0.22U_0603_10V7K

2

1

C18

@0.22U_0603_10V7K

2

C2 @1U_0603_10V6K

2SC2411K_SC59
Q3

CBE

123

H

1

C17

@0.22U_0603_10V7K

2

12

Compal Electronics, Inc.

Title

CPU Decoupling CAP.

Size Document Number Re v

LA-2051

Custom
Date: Sheet of

651Friday, November 14, 2003

1.0

J

5

4

3

2

1

HA#[3..31]
H_REQ#[0..4]

HD#[0..63]

12

R469

4.7K_0402_5%

U24A

M28

CPU_A3#

P25

CPU_A4#

M25

CPU_A5#

N29

CPU_A6#

N30

CPU_A7#

M26

CPU_A8#

N28

CPU_A9#

P29

CPU_A10#

P26

CPU_A11#

R29

CPU_A12#

P30

CPU_A13#

P28

CPU_A14#

N26

CPU_A15#

N27

CPU_A16#

M29

CPU_REQ0#

N25

CPU_REQ1#

R26

CPU_REQ2#

L28

CPU_REQ3#

L29

CPU_REQ4#

R27

CPU_ADSTB0#

U30

CPU_A17#

T30

CPU_A18#

R28

CPU_A19#

R25

CPU_A20#

U25

CPU_A21#

T28

CPU_A22#

V29

CPU_A23#

T26

CPU_A24#

U29

CPU_A25#

U26

CPU_A26#

V26

CPU_A27#

T25

CPU_A28#

V25

CPU_A29#

U27

CPU_A30#

U28

CPU_A31#

T29

CPU_ADSTB1#

L27

CPU_ADS#

K25

CPU_BNR#

H26

CPU_BPRI#

J27

CPU_DEFER#

L26

CPU_DRDY#

G27

CPU_DBSY#

F25

CPU_BR0#

K26

CPU_LOCK#

A17

CPU_CPURSET#

G25

CPU_RS2#

G26

CPU_RS1#

J25

CPU_RS0#

F26

CPU_TRDY#

J26

CPU_HIT#

H25

CPU_HITM#

A9

CPU_RSET

AH5

SUS_STAT#

AG5

SYSRESET#

C7

POWERGOOD

V28

CPU_COMP_N

W29

CPU_COMP_P

H23

CPVDD

J23

CPVSS

W28

CPU_VREF

Y29

THERMALDIODE_N

Y28

THERMALDIODE_P

B17

TESTMODE

CHS-216IGP9050A21_BGA718

H_ADS#4

H_RS#25
H_RS#15
H_RS#05

H_HIT#4

1U_0603_10V6K

1 2

C492

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15

HA#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_ADSTB#0

HA#17

HA#18

HA#19

HA#20

HA#21

HA#22

HA#23

HA#24

HA#25

HA#26

HA#27

HA#28

HA#29

HA#30

HA#31
H_ADSTB#1

H_ADS#
H_BNR#
H_BPRI#
H_DEFER#
H_DRDY#
H_DBSY#
H_BREQ0#
H_LOCK#

H_RESET#
H_RS#2
H_RS#1
H_RS#0

H_TRDY#
H_HIT#
H_HITM#

COMP_N
COMP_P
CPVDD
CPVSS
NB_GTLREF

D D

H_ADSTB#05

C C

H_ADSTB#15

H_BNR#4

H_BPRI#4

H_DEFER#4

H_DRDY#5
H_DBSY#5

H_BREQ0#4

H_LOCK#4

0.1U_0402_10V6K

--> 412_0402_1%

Note: PLACE CLOSE TO RC300M,

L

USE 10/10 WIDTH/SPACE

+CPU_CORE

PLACE CLOSE TO U27 Ball
W28, USE 20/20

B B

49.9_0603_1%

100_0603_1%

WIDTH/SPACE

R428

1 2
12

1

1

C433

R429

2

1U_0603_10V6K

C441
220P_0402_50V8K

2

C441 CLOSE
TO Ball W28

330_0402_5%

+CPU_CORE

+1.8VS

1 2

H_RESET#5,26

C590

12

H_TRDY#5

R485

H_HITM#4

SUS_STAT#27

NB_RST#26,30, 34,35

NB_PWRGD17

R437 24.9_0402_1%

1 2

R436 49.9_0402_1%

1 2

L31

1 2

HB-1M2012-121JT03_0805

HA#[3..31] 4
H_REQ#[0..4] 4
HD#[0..63] 4

HD#0

L30

CPU_D0#
CPU_D1#
CPU_D2#
CPU_D3#
CPU_D4#
CPU_D5#
CPU_D6#
CPU_D7#
CPU_D8#

PART 1 OF 6

CPU_D9#
CPU_D10#
CPU_D11#

DATA GROUP 0DATA GROUP 1DATA GROUP 2DATA GROUP 3

CPU_D12#
CPU_D13#
CPU_D14#
CPU_D15#

CPU_DBI0#

CPU_DSTBN0#

CPU_DSTBP0#

CPU_D16#
CPU_D17#
CPU_D18#
CPU_D19#
CPU_D20#
CPU_D21#
CPU_D22#
CPU_D23#
CPU_D24#
CPU_D25#
CPU_D26#
CPU_D27#
CPU_D28#
CPU_D29#
CPU_D30#
CPU_D31#

CPU_DBI1#

ADDR. GROUP 1 A DDR. GROUP 0CONTROL

CPU_DSTBN1#

CPU_DSTBP1#

AGTL+ I/F

CPU_D32#
CPU_D33#
CPU_D34#
CPU_D35#
CPU_D36#
CPU_D37#
CPU_D38#
CPU_D39#
CPU_D40#
CPU_D41#

PENTIUM

IV

CPU_D42#
CPU_D43#
CPU_D44#
CPU_D45#
CPU_D46#
CPU_D47#

CPU_DBI2#

CPU_DSTBN2#

CPU_DSTBP2#

CPU_D48#
CPU_D49#
CPU_D50#
CPU_D51#
CPU_D52#
CPU_D53#
CPU_D54#
CPU_D55#
CPU_D56#
CPU_D57#
CPU_D58#
CPU_D59#
CPU_D60#

MISC.

CPU_D61#
CPU_D62#
CPU_D63#

CPU_DBI3#

CPU_DSTBN3#

CPU_DSTBP3#

HD#1

K29

HD#2

J29

HD#3

H28

HD#4

K28

HD#5

K30

HD#6

H29

HD#7

J28

HD#8

F28

HD#9

H30

HD#10

E30

HD#11

D29

HD#12

G28

HD#13

E29

HD#14

D30

HD#15

F29

H_DBI#0

E28

H_DSTBN#0

G30

H_DSTBP#0

G29
B26

C30
A27
B29
C28
C29
B28
D28
D26
B27
C26
E25
E26
A26
B25
C25

H_DBI#1

A28

H_DSTBN#1

D27

H_DSTBP#1

E27
F24

D24
E23
E24
F23
C24
B24
A24
F21
A23
B23
C22
B22
C21
E21
D22

H_DBI#2

D23

H_DSTBN#2

E22

H_DSTBP#2

F22
B21

F20
A21
C20
E20
D20
A20
D19
C18
B20
E18
B19
D18
B18
C17
A18

H_DBI#3

F19

H_DSTBN#3

E19

H_DSTBP#3

F18

HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31

HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47

HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

H_DBI#0 5
H_DSTBN#0 5
H_DSTBP#0 5

H_DBI#1 5
H_DSTBN#1 5
H_DSTBP#1 5

H_DBI#2 5
H_DSTBN#2 5
H_DSTBP#2 5

H_DBI#3 5
H_DSTBN#3 5
H_DSTBP#3 5

+CPU_CORE

0.1U_0402_10V6K

1

1

C486

C541

A A

5

4

22U_1 206_16V4Z_V1

C525

2

2

0.1U_0402_10V6K

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS
MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

3

1

C490

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C466

2

1

C465

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C464

2

1

C463

2

0.1U_0402_10V6K

1

1

C507

0.1U_0402_10V6K

2

2

Title

Size Document Number Re v

2

Date: Sheet of

Compal Electronics, Inc.

ATI RC300M-AGTL+

LA-2051

1

751Friday, November 14, 2003

1.0

5

DDR_SMA0
DDR_SMA1
DDR_SMA2 DDR_DQ2
DDR_SMA3
DDR_SMA4

D D

DDR_SBS013
DDR_SBS113
DDR_SMA1513

DDR_SRAS#13
DDR_SCAS#13

DDR_SWE#13

C C

DDR_CLK013

DDR_CLK0#13

DDR_CLK113

DDR_CLK1#13

DDR_CLK314

DDR_CLK3#14

DDR_CLK414

DDR_CLK4#14

DDR_SCKE013,14
DDR_SCKE113,14
DDR_SCKE214
DDR_SCKE314

DDR_SCS#013,14
DDR_SCS#113,14
DDR_SCS#214
DDR_SCS#314

L34

1 2

+1.8VS

B B

HB-1M2012-121JT03_0805

DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12

DDR_DM0
DDR_DM1
DDR_DM2
DDR_DM3
DDR_DM4
DDR_DM5

DDR_DM7

DDR_SRAS#
DDR_SCAS#

DDR_SWE#
DDR_DQS0

DDR_DQS1
DDR_DQS2
DDR_DQS3
DDR_DQS4
DDR_DQS5
DDR_DQS6
DDR_DQS7

DDR_CLK0
DDR_CLK0#

DDR_CLK1
DDR_CLK1#

DDR_CLK3
DDR_CLK3#

DDR_CLK4
DDR_CLK4#

DDR_SCKE0
DDR_SCKE1
DDR_SCKE2
DDR_SCKE3

DDR_SCS#0
DDR_SCS#1
DDR_SCS#2
DDR_SCS#3

MPVDD

C516

MPVSS

1 2

1U_0603_10V6K

U24B

AH19

MEM_A0

AJ17

MEM_A1

AK17

MEM_A2

AH16

MEM_A3

AK16

MEM_A4

AF17

MEM_A5

AE18

MEM_A6

AF16

MEM_A7

AE17

MEM_A8

AE16

MEM_A9

AJ20

MEM_A10

AG15

MEM_A11

AF15

MEM_A12

AE23

MEM_A13

AH20

MEM_A14

AE25

MEM_A15

AH7

MEM_DM0

AF10

MEM_DM1

AJ14

MEM_DM2

AF21

MEM_DM3

AH23

MEM_DM4

AK28

MEM_DM5

AD29

MEM_DM6

AB26

MEM_DM7

AF24

MEM_RAS#

AF25

MEM_CAS#

AE24

MEM_WE#

AJ8

MEM_DQS0

AF9

MEM_DQS1

AH13

MEM_DQS2

AE21

MEM_DQS3

AJ23

MEM_DQS4

AJ27

MEM_DQS5

AC28

MEM_DQS6

AA25

MEM_DQS7

AK10

MEM_CK0

AH10

MEM_CK0#

AH18

MEM_CK1

AJ19

MEM_CK1#

AG30

MEM_CK2

AG29

MEM_CK2#

AK11

MEM_CK3

AJ11

MEM_CK3#

AH17

MEM_CK4

AJ18

MEM_CK4#

AF28

MEM_CK5

AG28

MEM_CK5#

AF13

MEM_CKE0

AE13

MEM_CKE1

AG14

MEM_CKE2

AF14

MEM_CKE3

AH26

MEM_CS#0

AH27

MEM_CS#1

AF26

MEM_CS#2

AG27

MEM_CS#3

AC18

MPVDD

AD18

MPVSS

CHS-216IGP9050A21_BGA718

PART 2 OF 6

MEM_DQ0
MEM_DQ1
MEM_DQ2
MEM_DQ3
MEM_DQ4
MEM_DQ5
MEM_DQ6
MEM_DQ7
MEM_DQ8

MEM_DQ9
MEM_DQ10
MEM_DQ11
MEM_DQ12
MEM_DQ13
MEM_DQ14
MEM_DQ15
MEM_DQ16
MEM_DQ17
MEM_DQ18
MEM_DQ19
MEM_DQ20
MEM_DQ21
MEM_DQ22
MEM_DQ23
MEM_DQ24
MEM_DQ25
MEM_DQ26
MEM_DQ27
MEM_DQ28
MEM_DQ29
MEM_DQ30
MEM_DQ31
MEM_DQ32
MEM_DQ33
MEM_DQ34
MEM_DQ35
MEM_DQ36
MEM_DQ37
MEM_DQ38
MEM_DQ39

MEM I/F

MEM_DQ40
MEM_DQ41
MEM_DQ42
MEM_DQ43
MEM_DQ44
MEM_DQ45
MEM_DQ46
MEM_DQ47
MEM_DQ48
MEM_DQ49
MEM_DQ50
MEM_DQ51
MEM_DQ52
MEM_DQ53
MEM_DQ54
MEM_DQ55
MEM_DQ56
MEM_DQ57
MEM_DQ58
MEM_DQ59
MEM_DQ60
MEM_DQ61
MEM_DQ62
MEM_DQ63

MEM_CAP1
MEM_CAP2

MEM_COMP

MEM_DDRVREF

4

AG6
AJ7
AJ9
AJ10
AJ6
AH6
AH8
AH9
AE7
AE8
AE12
AF12
AF7
AF8
AE11
AF11
AJ12
AH12
AH14
AH15
AH11
AJ13
AJ15
AJ16
AF18
AG20
AG21
AF22
AF19
AF20
AE22
AF23
AJ21
AJ22
AJ24
AK25
AH21
AH22
AH24
AJ25
AK26
AK27
AJ28
AH29
AH25
AJ26
AJ29
AH30
AF29
AE29
AB28
AA28
AE28
AD28
AC29
AB29
AC26
AB25
Y26
W26
AE26
AD26
AA26
Y27

AF6
AA29
AK19

AK20

C489

0.1U_0402_10V6K

DDR_DQ0
DDR_DQ1

DDR_DQ3
DDR_DQ4
DDR_DQ5
DDR_DQ6
DDR_DQ7
DDR_DQ8
DDR_DQ9
DDR_DQ10
DDR_DQ11
DDR_DQ12
DDR_DQ13
DDR_DQ14
DDR_DQ15
DDR_DQ16
DDR_DQ17
DDR_DQ18
DDR_DQ19
DDR_DQ20
DDR_DQ21
DDR_DQ22
DDR_DQ23DDR_DM6
DDR_DQ24
DDR_DQ25
DDR_DQ26
DDR_DQ27
DDR_DQ28
DDR_DQ29
DDR_DQ30
DDR_DQ31
DDR_DQ32
DDR_DQ33
DDR_DQ34
DDR_DQ35
DDR_DQ36
DDR_DQ37
DDR_DQ38
DDR_DQ39
DDR_DQ40
DDR_DQ41
DDR_DQ42
DDR_DQ43
DDR_DQ44
DDR_DQ45
DDR_DQ46
DDR_DQ47
DDR_DQ48
DDR_DQ49
DDR_DQ50
DDR_DQ51
DDR_DQ52
DDR_DQ53
DDR_DQ54
DDR_DQ55
DDR_DQ56
DDR_DQ57
DDR_DQ58
DDR_DQ59
DDR_DQ60
DDR_DQ61
DDR_DQ62
DDR_DQ63

C645 0.47U_0603_16V7K

1 2

C432 0.47U_0603_16V7K

1 2

MEN_COMP

R468 49.9_0402_1%

1 2

2

+SDREF

1

3

DDR_DM[0..7]

DDR_DQ[0..63]

DDR_DQS[0..7]

DDR_SMA[0..12]

DDR_DM[0..7] 13,14

DDR_DQ[0..63] 13,14

DDR_DQS[0..7] 13,14

DDR_SMA[0..12] 13

2

1

C724

12

+2.5V+SDREF

0.1U_0402_10V6K

Close to U24.AK20

+2.5V

A A

C547

0.1U_0402_10V6K

1

C475

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C572

2

5

1

C450

2

0.1U_0402_10V6K

1

1

C600

0.1U_0402_10V6K

2

2

Title

Size Document Number Re v

4

3

2

Date: Sheet of

Compal Electronics, Inc.

ATI RC300M-DDR I/F

LA-2051

1

851Friday, November 14, 2003

1.0

5

A_AD[0..31]12,26

A_CBE #[0..3]12,26

D D

C C

?

B B

47U_B_6.3VM

A A

47U_B_6.3VM

A_AD[0..31]
A_CBE #[0..3]

C615

R504
@47K_0402

1 2

1

C548

2

1

2

U24C

AK5

ALINK_AD0

AJ5

ALINK_AD1

AJ4

ALINK_AD2

AH4

ALINK_AD3

AJ3

ALINK_AD4

AJ2

ALINK_AD5

AH2

ALINK_AD6

AH1

ALINK_AD7

AG2

ALINK_AD8

AG1

ALINK_AD9

AG3

ALINK_AD10

AF3

ALINK_AD11

AF1

ALINK_AD12

AF2

ALINK_AD13

AF4

ALINK_AD14

AE3

ALINK_AD15

AE4

ALINK_AD16

AE5

ALINK_AD17

AE6

ALINK_AD18

AC2

ALINK_AD19

AC4

ALINK_AD20

AB3

ALINK_AD21

AB2

ALINK_AD22

AB5

ALINK_AD23

AB6

ALINK_AD24

AA2

ALINK_AD25

AA4

ALINK_AD26

AA5

ALINK_AD27

AA6

ALINK_AD28

Y3

ALINK_AD29

Y5

ALINK_AD30

Y6

ALINK_AD31

AG4

ALINK_CBE#0

AE2

ALINK_CBE#1

AC3

ALINK_CBE#2

AA3

ALINK_CBE#3

AD5

PCI_PAR/ALINK_NC

AC6

PCI_FRAME#/ALINK_STROBE#

AC5

PCI_IRDY#/ALINK_ACAT#

AD2

PCI_TRDY#/ALINK_END#

W4

INTA#

AD3

ALINK_DEVSEL#

AD6

PCI_STOP#/ALINK_OFF#

W5

ALINK_SBREQ#

W6

ALINK_SBGNT#

R500

V5

PCI_REQ#0/ALINK_NC

V6

PCI_GNT#0/ALINK_NC

K5

AGP2_GNT#/AGP3_GNT

K6

AGP2_REQ#/AGP3_REQ

M5

AGP8X_DET#

J6

AGP_VREF/TMDS_VREF

J5

AGP_COMP

CHS-216IGP9050A21_BGA718

0.1U_0402_10V6K

1

C513

2

0.1U_0402_10V6K

Ra
Rb
Rc

1

C555

2

0.1U_0402_10V6K

0.1U_0402_10V6K

C549

A_AD0
A_AD1
A_AD2
A_AD3
A_AD4
A_AD5
A_AD6
A_AD7
A_AD8
A_AD9
A_AD10
A_AD11
A_AD12
A_AD13
A_AD14
A_AD15
A_AD16
A_AD17
A_AD18
A_AD19
A_AD20
A_AD21
A_AD22
A_AD23
A_AD24
A_AD25
A_AD26
A_AD27
A_AD28
A_AD29
A_AD30
A_AD31

A_CBE#0
A_CBE#1
A_CBE#2
A_CBE#3

A_PAR12,26

A_STROBE#26

A_ACAT#26

A_END#26

PCI_PIRQA#19,20 ,24,26

A_DEVSEL#26

A_SBREQ#26
A_SBGNT#26

+1.5VS

+1.5VS

12

R529
1K_0402_1%

Rb

AGPREF_8X

12

R533
1K_0402_1%

Rc

+1.5VS +3VS

0.1U_0402_10V6K

1

1

+

C540

C506

C557

2

2

0.1U_0402_10V6K

+1.5VS

0.1U_0402_10V6K

1

1

+

C487

C523

2

0.1U_0402_10V6K

C508

2

5

A_PAR
A_STROBE#
A_ACAT#
A_END#

R517 0_0402_5%

1 2

A_DEVSEL#
A_OFF#

A_OFF#26

A_SBREQ#
A_SBGNT#

1 2

+3VS

8.2K_0402_5%

AGP8X_DET#

AGPREF_8X

1 2

0.1U_0402_10V6K

R523

AGP_COMP

1 2

@52.3_0603_1%

Ra

+3VS

AGP8X_DET#

0.1U_0402_10V6K

1

1

C524

C530

2

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

1

C565

2

2

0.1U_0402_10V6K

8X(M9+M10@)

169_0402_1%
324_0402_1%
100_0402_1%

0.1U_0402_10V6K

1

1

C529

2

2

PIR LAYOUT 92.06.23

+1.5VS

1

C539

C564

2

0.1U_0402_10V6K

4

PART 3 OF 6

PCI Bus 0 / A-Link I/F

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C554

2

4

AGP2_SBSTB/AGP3_SBSTBF/NC/LVDS_BLON

AGP2_SBSTB#/AGP3_SBSTBS/NC/ENA_BL
AGP2_ADSTB0/AGP3_ADSTBF0/TMD2_CLK#
AGP2_ADSTB0#/AGP3_ADSTBS0/TMD2_CLK
AGP2_ADSTB1/AGP3_ADSTBF1/TMD1_CLK#
AGP2_ADSTB1#/AGP3_ADSTBS1/TMD1_CLK

AGP2_CBE#0/AGP3_CBE0/TMD2_D7
AGP2_CBE#1/AGP3_CBE1/TMD2_DE

AGP2_CBE#3/AGP3_CBE3/TMD1_D5

AGP2_IRDY#/AGP3_IRDY/GPIO8/I2C_CLK

AGP2_TRDY#/AGP3_TRDY/TMDS_DVI_CLK

AGP2_STOP#/AGP3_STOP/GPIO10/DDC_DATA

AGP2_FRAME#/AGP3_FRAME/TMDS_DVI_DATA

AGP2_DEVSEL#/AGP3_DEVSEL/GPIO9/I2C_DATA

PCI BUS 1 / AGP Bus (GPIO , TMDS , Z VPort )

AGP2_SBA0/AGP3_SBA#0/GPIO0/VDDC_CNTL0
AGP2_SBA1/AGP3_SBA#1/GPIO1/VDDC_CNTL1
AGP2_SBA2/AGP3_SBA#2/GPIO2/LVDS_BLON#
AGP2_SBA3/AGP3_SBA#3/GPIO3/LVDS_DIGON

AGP2_SBA4/AGP3_SBA#4/GPIO4/STP_AGP#

AGP2_SBA5/AGP3_SBA#5/GPIO5/AGP_BUSY#

AGP2_SBA6/AGP3_SBA#6/GPIO6/LVDS_SSOUT

AGP2_SBA7/AGP3_SBA#7/GPIO7/LVDS_SSIN

4X(NAGP@)

52.1_0402_1%
1K_0402_1%
1K_0402_1%

10U_0805_10V4Z

1

C515

2

1

2

C580

1

C640

2

0.1U_0402_10V6K

1

2

0.1U_0402_10V6K

1

C641

2

0.1U_0402_10V6K

L

3

AGP_AD13
AGP_AD14
AGP_AD15

AGP_AD31

AGP_PAR

AGP_ST0
AGP_ST1
AGP_ST2

1

C638

2

0.1U_0402_10V6K

1

C629

2

0.1U_0402_10V6K

Y2
W3
W2
V3
V2
V1
U1
U3
T2
R2
P3
P2
N3
N2
M3
M2
L1
L2
K3
K2
J3
J2
J1
H3
F3
G2
F2
F1
E2
E1
D2
D1

E5
E6
T3
U2
G3
H2

R3
M1
L3
H1

P5
R6
T6
T5
P6
R5
C1
D3
N6
N5

C3
C2
D4
E4
F6
F5
G6
G5

L6
M6
L5

0.1U_0402_10V6K

1

C617

2

0.1U_0402_10V6K

1

C630

2

@10U_0805_6.3V6M

DDC_CLK

DDC_DAT
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7

1

C618

2

0.1U_0402_10V6K

1

C631

2

0.1U_0402_10V6K

AGP_AD0/TMD2_HSYNC

AGP_AD1/TMD2_VSYNC

AGP_AD10/TMD2_D8
AGP_AD11/TMD2_D11
AGP_AD12/TMD2_D10

AGP_AD16/TMD1_VSYNC
AGP_AD17/TMD1_HSYNC

AGP_AD18/TMD1_DE

AGP_AD19/TMD1_D0

AGP_AD20/TMD1_D1

AGP_AD21/TMD1_D2

AGP_AD22/TMD1_D3

AGP_AD23/TMD1_D4

AGP_AD24/TMD1_D7

AGP_AD25/TMD1_D6

AGP_AD26/TMD1_D9

AGP_AD27/TMD1_D8
AGP_AD28/TMD1_D11
AGP_AD29/TMD1_D10

AGP_AD30/TMDS_HPD

AGP2_CBE#2/AGP3_CBE2

AGP2_PIPE#/AGP3_DBI_HI

AGP2_NC/AGP3_DBI_LO

AGP2_RBF#/AGP3_RBF

AGP2_WBF#/AGP3_WBF

0.1U_0402_10V6K

1

C633

C639

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C628

C627

2

AGP_AD2/TMD2_D1
AGP_AD3/TMD2_D0
AGP_AD4/TMD2_D3
AGP_AD5/TMD2_D2
AGP_AD6/TMD2_D5
AGP_AD7/TMD2_D4
AGP_AD8/TMD2_D6
AGP_AD9/TMD2_D9

Note: PLACE CLO SE TO U 27 (NB RC300M)

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS
MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

3

@0.1U_0402_10V6K

1

C653

2

@0_0402_5%

0.1U_0402_10V6K

1

C602

2

0.1U_0402_10V6K

1

C556

2

1

C656

12

12

2

R296

12

R277

@0_0402_5%

Note: PLACE CLO SE TO U 2 ( NB RC300M)

L

2.2K_0402_5%

0.1U_0402_10V6K

1

1

C601

2

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

1

C589

C571

2

2

0.1U_0402_10V6K

R295

@0_0402_5%

S0

S1

12

@SM561BS_SO8
R276
@0_0402_5%

+3VS

R518

ENBKL# 35
AGP_STP# 27

AGP_BUSY# 27

1

C605

2

1

C620

2

0.1U_0402_10V6K

U44

1

Xin/CLK

7

S0

6

S1

LVDS SPREAD SPECTRUM

R519

2.2K_0402_5%

1 2

1 2

C568

@0.01U _0402_16V7Z

0.1U_0402_10V6K

1

C608

2

2

+3VS_SSVDD

@0_0402_5%

R294

2

VDD

SSCLK

Xout

SSCC

VSS

3

R293

@0_0402_5%

R628

1.2K_0402_5%

1 2

+1.5VS

@0.01U _0402_16V7Z

1

C498

2

1

2

2

L42

1 2

@BLM21P300S_0805

12

12

R275
@0_0402_5%

4

8

1

C657

5

@10P_0402_25V8K

12

12

2

R274
@0_0402_5%

ENVDD 18

ATI request

@0.01U _0402_16V7Z

1

1

C569

2

2

@0.01U _0402_16V7Z

1

R600

12

@0_0402_5%

+3VS

R534

LVDS_SSOUT AGP_SBA6

1

C651

@10P_0402_25V8K

2

LVDS_SSIN

1

C585

C610

2

@0.01U _0402_16V7Z

12

@0_0402_5%

R535

AGP_SBA7

12

@0_0402_5%

R601

12

@0_0402_5%

@0.01U _0402_16V7Z

1

2

Title

Size Doc u m ent Number Re v

Date: Sheet of

@0.01U _0402_16V7Z

1

1

C609

2

2

@0.01U _0402_16V7Z

C514

C619

Compa l Electronics, Inc.

ATI RC300M-AGP, ALINK BUS

LA-2051

1

C595

2

@0.01U _0402_16V7Z

1

EXT_LVDS_SSOUT 38

EXT_LVDS_SSIN 38

@0.01U _0402_16V7Z

1

1

C558

2

2

951Friday, November 14, 2003

1.0

5

D D

KC FB M- L11-201209-221LMAT_0805

L37

1 2

+1.8VS

0.1U_ 0402_10V6K

1 2

+1.8VS

C C

CLK_ AGP_66M

12

R272
@10_0402_5%

1

C282
@15P_0402_50V8J

2

CLK_MEM_66M

12

B B

R271
@10_0402_5%

1

C271
@15P_0402_50V8J

2

+1.8VS

KC FB M- L11-201209-221LMAT_0805

REFCLK1_NB16

+3VS

X4

4
1

1

C592

@27M HZ_20P_6N

@0.1 U_0402_16V7K

2

VCC
ST

KC FB M- L11-201209-221LMAT_0805

1

C550

2

L33 10_0603_5%

0.1U_ 0402_10V6K

L38

1 2

10U_0 805_10V4Z

0.1U_ 0402_10V6K

R506

56_0402_5%

3

OUT

2

GND

4

L35

+1.8VS_ AVDDDI

1

1

C537

C536

0.1U_ 0402_10V6K

2

2

1

1

C577

C578

2

2

INTCRT_R18
INTCRT_G18

INTCRT_B18
INTCRT_HSYNC18
INTCRT_VSYNC18

R474 715 _0402_1%

1 2

12

R520

CLK_ NB_BCLK16

12

CLK_ NB_BCLK#16

@10_0402_5%

1

C634
@15P_0402_50V8J

2

CLK_ AGP_66M16

CLK_MEM_66M16

27M_TV

R497 @22_0402_5%

R505

@10_0402_5%

EXCLK_27M_TV38

+2.5VS

12

1

2

+1.8VS_ AVDDQ

1

2

27M_TV_R

12

+2.5VS_ AVDD

C551

0.1U_ 0402_10V6K

+PLL VDD_18

C586

0.1U_ 0402_10V6K

NB_RSET

RC300M_X1
RC300M_X2

CLK_NB_ BCLK
CLK_NB_ BCLK#

CLK_AGP_66M
CLK_MEM_66M

12

12

R588

4.7K_0402_5%

+3VS

L39

+3VS_VDDR

1 2

1

C622

0.1U_ 0402_10V6K

2

U24D

G9

VDDR3

H9
A14
B13

B14
C13

A15
B15

H11
G11

F14
F15

E14

C8

D9
C14

A4

B4

A5

B5

B6

A6

D8

B2

B3

A3

D7

B7

C5

PART 4 OF 6

VDDR3
AVDD_25
AVSSN

AVDDDI_18
AVSSDI

AVDDQ
AVSSQ

PLLVDD_18
PLLVSS

RED
GREEN
BLUE
DACHSYNC
DACVSYNC

RSET

XTALIN
XTALOUT

HCLKIN
HCLKIN#

SYS_FBCLKOUT
SYS_FBCLKOUT#

ALINK_CLK
AGPCLKOUT
AGPCLKIN
EXT_MEM_CLK

USBCLK
REF27

CLK. GEN.

OSC

CHS-216IGP9050A21_BGA718

Note: P L ACE CLOS E TO U27 ( N B CHIP)

L

RC300M_X1

@1M_0402_1%

RC300M_X2

3

+3VS

FBM-11-160808-121-T_0603

CRT

12

R531

TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P

TXCLK_UN
TXCLK_UP

TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P

TXCLK_LN
TXCLK_LP

LPVDD_18

LVDS

LPVSS

LVDDR_18
LVDDR_18

LVSSR
LVSSR

C_R

Y_G

COMP_B

SVID

DACSCL
DACSDA

CPUSTOP#

SYSCLK

SYSCLK#

C650

1 2

12

@18P_0402_50V8K
Y5
@14. 31818MHZ_20P_6X1430004201

C649

1 2

@18P_0402_50V8K

D12
E12
F11
F12
D13
D14
E13
F13

E10
D10
B9
C9
D11
E11
B10
C10

A12
A11

B12
C12

B11
C11

E15
C15
D15

D6
C6

D5

A8
B8

LCD_ B0- 18
LCD_ B0+ 18
LCD_ B1- 18
LCD_ B1+ 18
LCD_ B2- 18
LCD_ B2+ 18
LCD_ BCLK- 18
LCD_ BCLK+ 18

LCD_A0- 18
LCD_A0+ 18
LCD_A1- 18
LCD_A1+ 18
LCD_A2- 18
LCD_A2+ 18
LCD_ACLK- 18
LCD_ACLK+ 18

+1.8 VS_LPVDD
LPVSS

+1.8VS_LVDDR

LVSSR

TV_CRMA 17
TV_LUMA 17

0.1U_ 0402_10V6K

TV_COMPS 17

INTDDCCK 18
INTDDCDA 18

Q45

D

1 3

1 2

R457 @0_0402_5%

1 2

R461 1K_0402_5%

1

C591

2

0.1U_ 0402_10V6K

0.1U_ 0402_10V6K

1

C566

2

@2N70 02_SOT23

S

G

2

2

0.1U_ 0402_10V6K

1

C576

C518

2

10U_0 805_10V4Z

1

C587

C567

2

10U_0 805_10V4Z

PM_S TPCPU#

+3VS

KC FB M- L11-201209-221LMAT_0805

1 2

L32

1

2

KC FB M- L11-201209-221LMAT_0805

1 2

L36

1

2

PM_S TPCPU# 5,1 6,26,47

PCIRS T# 19,2 0,21, 22,24,25,26,34,35

1

+1.8VS

+1.8VS

A A

Compa l Electronics, Inc.

THIS SHEET OF ENGI NEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NF IDENTIAL
AND T R ADE SECRET INFORMATION. T HIS SHEET M AY NO T BE T RANSFERED FROM THE CUSTODY OF THE COM PET ENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHOR IZED BY COMPA L ELECTRONICS , INC. NEITH ER THIS SHEE T NOR THE INFORM ATION IT CONTAI NS

5

4

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PART Y W IT H OUT PR IOR W RIT TEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Title

Size Do c ument Nu mbe r Re v

Date : Sheet

ATI RC300M-VIDEO I/F

LA-2051

1

1.0

of

10 51Friday, November 14, 2003

5

4

3

2

1

+1.5VS +2.5V

U24E

F10

VDD_CORE

F9

VDD_CORE

G12

VDD_CORE

H12

VDD_CORE

H13

VDD_CORE

M12

VDD_CORE

M13

VDD_CORE

M14

10U_0805_10V4Z

VDD_CORE

M17

VDD_CORE

M18

VDD_CORE

M19

VDD_CORE

N12

VDD_CORE

N13

VDD_CORE

N14

VDD_CORE

N17

VDD_CORE

N18

VDD_CORE

N19

VDD_CORE

P12

VDD_CORE

P13

VDD_CORE

P14

VDD_CORE

P17

VDD_CORE

P18

VDD_CORE

P19

VDD_CORE

U12

VDD_CORE

U13

VDD_CORE

U14

VDD_CORE

U17

VDD_CORE

U18

VDD_CORE

U19

VDD_CORE

V12

VDD_CORE

V13

VDD_CORE

V14

VDD_CORE

V17

VDD_CORE

V18

VDD_CORE

V19

VDD_CORE

W12

VDD_CORE

W13

VDD_CORE

W14

VDD_CORE

W17

VDD_CORE

W18

VDD_CORE

W19

VDD_CORE

C16

VDDR2_CPU

D16

VDDR2_CPU

D17

VDDR2_CPU

E16

VDDR2_CPU

E17

VDDR2_CPU

F16

VDDR2_CPU

F17

VDDR2_CPU

G17

VDDR2_CPU

G21

VDDR2_CPU

G23

VDDR2_CPU

G24

VDDR2_CPU

H16

VDDR2_CPU

H17

VDDR2_CPU

H19

VDDR2_CPU

H21

VDDR2_CPU

H24

VDDR2_CPU

K23

VDDR2_CPU

K24

VDDR2_CPU

M23

VDDR2_CPU

P23

VDDR2_CPU

P24

VDDR2_CPU

T23

VDDR2_CPU

T24

VDDR2_CPU

U23

VDDR2_CPU

U24

VDDR2_CPU

W30

VDDR2_CPU

AA1

VDDL_ALINK

AA7

VDDL_ALINK

AA8

VDDL_ALINK

AC7

VDDL_ALINK

AC8

VDDL_ALINK

AD1

VDDL_ALINK

AD7

VDDL_ALINK

AD8

VDDL_ALINK

AK3

VDDL_ALINK

W8

VDDL_ALINK

CHS-216IGP9050A21_BGA718

+1.8VS

1

C575

C581

2

0.1U_0402_10V6K

D D

C C

B B

A A

+CPU_ CORE

+3VS

CORE PWR

CPU I/F PWRALINK PWR

0.1U_0402_10V6K

1

C482

2

PART 5 OF 6

POWER

VDDP_AGP/VDDP33
VDDP_AGP/VDDP33
VDDP_AGP/VDDP33

1

C481

2

0.1U_0402_10V6K

MEM I/F PWR

AGP PWR

1

2

VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM

VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP
VDDP_AGP

VDD_18
VDD_18
VDD_18
VDD_18

AA23
AA27
AB30
AC10
AC12
AC13
AC15
AC17
AC19
AC21
AC23
AC24
AC25
AC27
AD10
AD12
AD13
AD15
AD17
AD19
AD21
AD23
AD24
AD25
AD27
AE10
AE14
AE15
AE19
AE20
AE30
AE9
AF27
AG11
AG12
AG17
AG18
AG23
AG24
AG26
AG8
AG9
AJ30
AK14
AK23
AK8
V23
W23
W24
W25
Y25

A2
G4
H5
H6
H7
J4
K8
L4
M7
M8
N4
P1
P7
P8
R4
T8
U4
U5
U6
E7
F7
G8

AC22
AC9
H10
H22

1

C588

0.1U_0402_10V6K

2

+1.5VS

+3VS

+1.8VS

C429

100U_D2_10VM

+2.5V

1

+

2

0.1U_0402_10V6K

C505

A29
AB23
AB24
AB27

AB4
AB8

AC1
AC11
AC14
AC16
AC20
AC30
AD11
AD14
AD16
AD20

AD4
AE27
AF30

AF5
AG10
AG13
AG16
AG19
AG22
AG25

AG7

AH28

AH3

AJ1
AK13

AK2
AK22
AK29

AK4

AK7

B1
B16
B30
C19
C23
C27

C4
D21
D25

E3

E8

E9
F27

G14
G15
G18
G20
H14
H15
H18
H20
H27

H4

H8

0.1U_0402_10V6K

1

C445

2

F4
F8

J7

U24F

PART 6 OF 6

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

GND

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

CHS-216IGP9050A21_BGA718

0.1U_0402_10V6K

1

1

C570

C462

2

2

0.1U_0402_10V6K

R23

VSS

R7

VSS

R8

VSS

T12

VSS

T13

VSS

T14

VSS

T15

VSS

T16

VSS

T17

VSS

T18

VSS

T19

VSS

T27

VSS

T4

VSS

U15

VSS

U16

VSS

U7

VSS

U8

VSS

V15

VSS

V16

VSS

V27

VSS

V4

VSS

V7

VSS

V8

VSS

W15

VSS

W16

VSS

W27

VSS

Y1

VSS

Y23

VSS

Y24

VSS

Y30

VSS

Y4

VSS

Y7

VSS

Y8

VSS

R19

VSS

R18

VSS

R17

VSS

R16

VSS

R15

VSS

R14

VSS

R13

VSS

R12

VSS

R1

VSS

P4

VSS

P27

VSS

P16

VSS

P15

VSS

N8

VSS

N24

VSS

N23

VSS

N16

VSS

N15

VSS

M4

VSS

M27

VSS

M16

VSS

M15

VSS

L8

VSS

L7

VSS

L25

VSS

L24

VSS

L23

VSS

K4

VSS

K27

VSS

J8

VSS

1

C436

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C553

2

1

C538

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C522

2

1

C461

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C446

2

1

C457

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C437

2

1

1

C438

0.1U_0402_10V6K

2

2

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

3

2

Title

Size Doc u m ent Number Re v

Date: Sheet of

Compal Electronics, Inc.

ATI RC300M-POWER

LA-2051

1

11 51Friday, November 14, 2003

1.0

5

R418 10K_0402_5%

A_AD31

D D

C C

B B

A A

A_AD30

A_AD29

A_AD28

A_AD27

A_AD26

A_AD25

A_AD24

A_AD23

A_AD22

A_AD21

A_AD20

A_CBE#3

A_CBE#0

5

R420 4.7K_0402_5%

R419 4.7K_0402_5%

R549 10K_0402_5%

R278 @4.7K_0402_5%

R544 @10K_0402_5%

R283 4.7K_0402_5%

R548 10K_0402_5%

R279 @4.7K_0402_5%

R547 10K_0402_5%

R280 @4.7K_0402_5%

R545 10K_0402_5%

R282 @4.7K_0402_5%

R543 10K_0402_5%

R541 10K_0402_5%

R286 @4.7K_0402_5%

R284 @4.7K_0402_5%

R542 10K_0402_5%

R285 @4.7K_0402_5%

R540 @4.7K_0402_5%
R287 4.7K_0402_5%

R546 @4.7K_0402_5%
R281 @4.7K_0402_5%

R536 @4.7K_0402_5%
R291 @4.7K_0402_5%

1 2

1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2

1 2
1 2

1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2

R417 10K_0402_5%

1 2

2 1

D45
RB751 V_SOD323

2 1

D44
RB751 V_SOD323

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

4

+3VS

+3VS

BSEL1 5,16

BSEL0 5,16

A_AD[31..30] : FSB CLK SPEED

DEFAULT: 01

A_AD29: STRAP CONFIGURATION

DEFAULT:1

0: REDUCEDE SET
1: FU LL SET( inter nal Pull high)

A_AD28: SPREAD SPECTRUM ENABLE

DEFAULT:0

0: DISABLE
1: ENABLE

A_AD2 7: F rcS hort Reset #

DEFAULT: 1

0: TEST MODE
1: NORMAL MODE

A_AD26 : ENABLE IOQ

DEFAULT: 1

0: IOQ=1
1: IOQ=12

A_AD25/ A _ A D 1 7 : C P U VOLTAGE[1..0]

DEFAULT: 10

00: 1.05V
01: 1.35V
11: 1.75V
10: 1.45V

A_AD24 : MOBILE CPU SELECT

DEFAULT: 1

0: BANIAS CPU
1: OTHER CPU

A_AD23 : CLOCK BYPASS DISABLE

DEFAULT: 1

0: TEST MODE
1: NORMAL(internal Pull high)

A_AD22 : OSC PAD OUTPUT PCICLK

DEFAULT : 1

0:PCICLK OUT
1: OSC CLK OUT

A_AD21 : AUTO_CAL ENABLE

DEFAULT : 1

0: DISABLE
1: ENABLE

A_AD20 : INTERNAL CLK GEN ENABLE

DEFAULT : 0

0: DISABLE
1: ENABLE

A_CBE#3: NOT USED

A_CBE#0 :NO USED

4

00: 100 MHZ
01: 133 MHZ
10: 2 00MHZ
11:166 MHZ

AD25=1 DESTOP CPU
AD25=0 MOBILE CPU
AD17--DON'T CARE

3

A_AD[0..31]9,26

A_CBE #[0..3]9,26

A_AD[0..31]
A_CBE #[0..3]

R537 @4.7K_0402_5%

A_AD18

A_AD17

A_PAR9,26

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS
MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

3

1 2

R290 4.7K_0402_5%

1 2

R538 @4.7K_0402_5%

1 2

R289 4.7K_0402_5%

1 2

A_PAR

2

R288 @4.7K_0402_5%

1 2

R539 4.7K_0402_5%

1 2

2

1

+3VS

+3VS

A_AD18 : ENABLE PHASE CALIBRATION

DEFAULT: 0

0: DISABLE
1:ENABLE

A_AD25/ A _ A D 1 7 : C P U VOLTAGE[1..0]

DEFAULT: 0

00: 1.05V
01: 1.35V
11: 1.75V
10: 1.45V

PAR: EXT EN D E D D EB U G MODE

DEFAULT : 1

+3VS

0: DEBUG MODE
1: NORMAL

Title

Size Doc u m ent Number Re v

Date: Sheet of

Compal Electronics, Inc.

ATI RC300M-SYSTEM STRAP

LA-2051

12 51Friday, November 14, 2003

1

1.0

A

1 1

2 2

DDR_DQ[0..63]
DDR_DQS[0..7]

DDR_DM[0..7]

DDR_SMA[0..12]

3 3

4 4

A

B

DDR_DQ[0..63] 8,14

DDR_DQS[0..7] 8,14

DDR_DM[0..7] 8,14

DDR_SMA[0..12] 8

B

C

C725

12

+2.5V+SDREF

0.1U_0402_10V6K

DDR_CLK08

DDR_CLK0#8

DDR_SCKE18,14

DDR_SCS#08,14

1 2

10_0402_5%

10_0402_5%

1 2

DDR_SMA158

Layout note
Place these resistors

close to DIMM0,
all trace length<500 mil

DDR TOPOLOGY 1 FOR SMAA[0, 3, 6:12], SBA[1, 0], SRAS#, SCAS#, SWE#

C

D

+2.5V

JP17

1

VREF

3

VSS

5

DDR_DQ 5
DDR_DQS0

DDR_DQ 1
DDR_DQ 3

DDR_DQ 8
DDR_DQ 9

DDR_DQS1

DDR_DQ11
DDR_DQ10

DDR_DQ20
DDR_DQ21

DDR_DQS2

DDR_DQ18
DDR_DQ28

DDR_DQS3
DDR_DQ27 DDR_DQ29

R592

DDR_SMA12
DDR_SMA9

DDR_SMA7
DDR_SMA5
DDR_SMA3
DDR_SMA1

DDR_SMA10
DDR_SBS0

R594

DDR_SWE#
DDR_SMA15
DDR_DQ32

DDR_DQ34
DDR_DQS4 DDR_DM4

DDR_DQ39
DDR_DQ37

DDR_DQ44
DDR_DQS5

DDR_DQ47
DDR_DQ43

DDR_DQ48
DDR_DQ49

DDR_DQ54
DDR_DQ55

DDR_DQ63
DDR_DQS7

DDR_DQ62
DDR_DQ57 DDR_DQ58

SMDATA14,16,27

SMCLK14,16,27

+3VS

D

DQ0

7

DQ1

9

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

35

CK0

37

CK0#

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

71

CB0

73

CB1

75

VSS

77

DQS8

79

CB2

81

VDD

83

CB3

85

DU

87

VSS

89

CK2

91

CK2#

93

VDD

95

CKE1

97

DU/A13

99

A12

101

A9

103

VSS

105

A7

107

A5

109

A3

111

A1

113

VDD

115

A10/AP

117

BA0

119

WE#

121

S0#

123

DU

125

VSS

127

DQ32

129

DQ33

131

VDD

133

DQS4

135

DQ34

137

VSS

139

DQ35

141

DQ40

143

VDD

145

DQ41

147

DQS5

149

VSS

151

DQ42

153

DQ43

155

VDD

157

VDD

159

VSS

161

VSS

163

DQ48

165

DQ49

167

VDD

169

DQS6

171

DQ50

173

VSS

175

DQ51

177

DQ56

179

VDD

181

DQ57

183

DQS7

185

VSS

187

DQ58

189

DQ59

191

VDD

193

SDA

195

SCL

197

VDD_SPD

199

VDD_ID

KLINK_5746-2-111

THIS SH E E T OF E N GI N E E R I N G D R A W I N G I S T H E PR O P R I E TA R Y P R OP E R T Y OF C OM P A L E L EC T R O N I C S , I N C . AND CONTAINS CONFIDENTIAL
AND TR AD E S E C R E T I N FO R M AT I ON. THIS S H E E T MA Y N O T B E T R AN S F E R E D FROM THE C U ST O D Y OF THE COMPETENT DIVISION OF R&D
DEPAR TM E N T E X C E P T AS A U T H OR I Z E D B Y C OM P A L E LE C T R ON I CS, INC . N E I TH E R T H I S S H E ET NOR THE INFORMATION IT CONTAINS
MAY BE U S E D B Y O R D I S C LO S E D TO A N Y TH I R D P A R T Y W I TH O U T PR I O R W R I T TE N C O N S E N T O F COMPAL ELECTRONICS, INC.

E

DU/RESET#

E

VREF

DQ12
DQ13

DQ14
DQ15

DQ20
DQ21

DQ22
DQ23

DQ28
DQ29

DQ30
DQ31

CKE0

DU/BA2

RAS#
CAS#

DQ36
DQ37

DQ38
DQ39

DQ44
DQ45

DQ46
DQ47

DQ52
DQ53

DQ54
DQ55

DQ60
DQ61

DQ62
DQ63

VSS
DQ4
DQ5
VDD
DM0
DQ6

VSS
DQ7

VDD
DM1

VSS

VDD
VDD

VSS

VSS

VDD
DM2

VSS

VDD
DM3

VSS

VDD

CB4

CB5

VSS
DM8

CB6
VDD

CB7

VSS

VSS
VDD
VDD

A11

A8

VSS

A6
A4
A2
A0

VDD

BA1

S1#

DU

VSS

VDD
DM4

VSS

VDD
DM5

VSS

VDD

CK1#

CK1

VSS

VDD
DM6

VSS

VDD
DM7

VSS

VDD

SA0

SA1

SA2

DU

F

+2.5V

2
4

DDR_DQ 6DDR_DQ 7

6

DDR_DQ 0

8
10

DDR_DM0

12

DDR_DQ4

14
16

DDR_DQ 2

18

DDR_DQ12

20
22

DDR_DQ13

24

DDR_DM1

26
28

DDR_DQ15

30

DDR_DQ14

32
34
36
38
40

DDR_DQ16

42

DDR_DQ17

44
46

DDR_DM2

48

DDR_DQ22DDR_DQ23

50
52

DDR_DQ19

54

DDR_DQ24

56
58

DDR_DQ25DDR_DQ26

60

DDR_DM3

62
64
66

DDR_DQ30DDR_DQ31

68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_SMA11
DDR_SMA8

DDR_SMA6
DDR_SMA4
DDR_SMA2
DDR_SMA0

DDR_SBS1
DDR_SRAS#
DDR_SCAS#

DDR_DQ33
DDR_DQ36

DDR_DQ35

DDR_DQ38
DDR_DQ40DDR_DQ41

DDR_DQ45
DDR_DM5

DDR_DQ42
DDR_DQ46

DDR_DQ53
DDR_DQ52

DDR_DM6DDR_DQS6
DDR_DQ50

DDR_DQ51
DDR_DQ60DDR_DQ61

DDR_DQ56
DDR_DM7

DDR_DQ59

R593

1 2

10_0402_5%

R595

1 2

10_0402_5%

1

2

DDR_CLK1# 8
DDR_CLK1 8

F

+SDREF

C679

0.1U_0402_10V6K

DDR_SWE#8
DDR_SBS08

DDR_SCAS#8
DDR_SRAS#8
DDR_SBS18

DDR_SCKE0 8,14

DDR_SCS#1 8,14

G

DDR_DQ[0..63]
DDR_DQS[0..7]
DDR_DM[0..7]

DDR_SMAA[0..12]

DDR_SMAA15

10_1206_8P4R_5%

DDR_SMA15 DDR_SMAA15
DDR_SWE#
DDR_SBS0
DDR_SMA10

DDR_SMA1
DDR_SMA3
DDR_SMA5
DDR_SMA7

DDR_SMA9

DDR_SMA12

DDR_SCAS#
DDR_SRAS#
DDR_SBS1

DDR_SMA0

DDR_SMA2
DDR_SMA4
DDR_SMA6
DDR_SMA8

RP19

10_1206_8P4R_5%

RP27

R234 10_0402_5%

R239 10_0402_5%

10_1206_8P4R_5%

10_1206_8P4R_5%

DDR_SMA11

R238 10_0402_5%

45
36
27
18

45
36
27
18

12

RP18

RP28

DDR_SMAA10

DDR_SMAA1
DDR_SMAA3
DDR_SMAA5
DDR_SMAA7

DDR_SMAA9

12

DDR_SMAA12

45
36
27
18

45
36
27
18

12

DDR_SMAA0

DDR_SMAA2
DDR_SMAA4
DDR_SMAA6
DDR_SMAA8

DDR_SMAA11

DDR_DQ[0..63] 8,14
DDR_DQS[0..7] 8,14
DDR_DM[0..7] 8,14
DDR_SMAA[0..12] 14

DDR_SMAA15 14

DDR_WE# 14
DDR_BS0 14

DDR_CAS# 14
DDR_RAS# 14
DDR_BS1 14

Layout note

Place these resistor
close by DIMM0,
all trace length
Max=1.4"

Title

Size D ocu m ent N u mber R ev

Date: Sheet

Compal Elect r onics, Inc.

DDR-SODIMM SLOT0

LA-2051

G

H

1.0

of

13 51Friday, Nove mber 14, 2003

H

A

+1.25VS

RP37

DDR_DQ7
DDR_DQ5
DDR_DQS0
DDR_DQ1

56_0804_8P4R_5%

1 1

DDR_DQ3
DDR_DQ8
DDR_DQ9
DDR_DQS1

56_0804_8P4R_5%

DDR_DQ11
DDR_DQ10

DDR_DQ20
DDR_DQ21

56_0804_8P4R_5%

DDR_DQS2
DDR_DQ23
DDR_DQ18
DDR_DQ28

DDR_DQ26

DDR_DQS3
DDR_DQ27
DDR_DQ31

DDR_DQ32
DDR_DQ34
DDR_DQS4
DDR_DQ39

DDR_DQ37
DDR_DQ41
DDR_DQ44
DDR_DQS5

DDR_DQ47
DDR_DQ43
DDR_DQ48
DDR_DQ49

DDR_DQS6
DDR_DQ54
DDR_DQ55
DDR_DQ61

DDR_DQ63
DDR_DQS7
DDR_DQ62
DDR_DQ57

56_0804_8P4R_5%

56_0804_8P4R_5%

56_0804_8P4R_5%

56_0804_8P4R_5%

56_0804_8P4R_5%

56_0804_8P4R_5%

56_0804_8P4R_5%

2 2

3 3

4 4

18
27
36
45

RP35

18
27
36
45

RP33

18
27
36
45

RP32

18
27
36
45

RP30

18
27
36
45

RP15

18
27
36
45

RP13

18
27
36
45

RP11

18
27
36
45

RP7

18
27
36
45

RP6

18
27
36
45

A

RP91

56_0804_8P4R_5%

RP84

56_0804_8P4R_5%

RP73

56_0804_8P4R_5%

RP71

56_0804_8P4R_5%

RP68

56_0804_8P4R_5%

RP58

56_0804_8P4R_5%

RP55

56_0804_8P4R_5%

RP52

56_0804_8P4R_5%

RP42

56_0804_8P4R_5%

RP41

56_0804_8P4R_5%

DDR_DQ6

18

DDR_DQ0

27

DDR_DM0

36

DDR_DQ4

45

DDR_DQ2

18

DDR_DQ12

27

DDR_DQ13

36

DDR_DM1

45

DDR_DQ15

18

DDR_DQ14

27

DDR_DQ16

36

DDR_DQ17

45

DDR_DM2

18

DDR_DQ22

27

DDR_DQ19

36

DDR_DQ24

45

DDR_DQ25

18

DDR_DM3

27

DDR_DQ29

36

DDR_DQ30

45

DDR_DQ33

18

DDR_DQ36

27

DDR_DM4

36

DDR_DQ35

45

DDR_DQ38

18

DDR_DQ40

27

DDR_DQ45

36

DDR_DM5

45

DDR_DQ42

18

DDR_DQ46

27

DDR_DQ53

36

DDR_DQ52

45

DDR_DM6

18

DDR_DQ50

27

DDR_DQ51

36

DDR_DQ60

45

DDR_DQ56

18

DDR_DM7

27

DDR_DQ59

36

DDR_DQ58

45

B

C726

12

+2.5V+SDREF

0.1U_0402_10V6K

DDR_CLK38
DDR_CLK3#8

DDR_SCKE38 DDR_SCKE2 8

DDR_BS013
DDR_WE#13

DDR_SCS#28 DDR_SCS#3 8

DDR_SCS#2 DDR_SCS#3

DDR_SMAA1513

Layout note
Place these resistor

closely DIMM1,
all trace
length<=800mil

SMDATA13,16,27

SMCLK13 ,16,27

DDR_DQ7
DDR_DQ5

DDR_DQS0
DDR_DQ1

DDR_DQ3
DDR_DQ8

DDR_DQ9
DDR_DQS1

DDR_DQ11
DDR_DQ10

DDR_DQ20
DDR_DQ21

DDR_DQS2

DDR_DQ18
DDR_DQ28

DDR_DQ26

DDR_DQS3
DDR_DQ27

DDR_DQ31

R596

DDR_CKE3DDR_SCKE3 DDR_SCKE2

1 2

DDR_SMAA12

10_0402_5%

DDR_SMAA9
DDR_SMAA7

DDR_SMAA5
DDR_SMAA3
DDR_SMAA1

DDR_SMAA10
DDR_BS0 DDR_RAS#

DDR_CS#2

R598

1 2

DDR_SMAA15

10_0402_5%

DDR_DQ32
DDR_DQ34

DDR_DQS4
DDR_DQ39

DDR_DQ37
DDR_DQ41

DDR_DQ44
DDR_DQS5

DDR_DQ47
DDR_DQ43

DDR_DQ48
DDR_DQ49

DDR_DQS6
DDR_DQ54

DDR_DQ55
DDR_DQ61

DDR_DQ63
DDR_DQS7

DDR_DQ62
DDR_DQ57 DDR_DQ58

+3VS

C

+2.5V

JP20

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

35

CK0

37

CK0#

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

71

CB0

73

CB1

75

VSS

77

DQS8

79

CB2

81

VDD

83

CB3

85

DU

87

VSS

89

CK2

91

CK2#

93

VDD

95

CKE1

97

DU/A13

99

A12

101

A9

103

VSS

105

A7

107

A5

109

A3

111

A1

113

VDD

115

A10/AP

117

BA0

119

WE#

121

S0#

123

DU

125

VSS

127

DQ32

129

DQ33

131

VDD

133

DQS4

135

DQ34

137

VSS

139

DQ35

141

DQ40

143

VDD

145

DQ41

147

DQS5

149

VSS

151

DQ42

153

DQ43

155

VDD

157

VDD

159

VSS

161

VSS

163

DQ48

165

DQ49

167

VDD

169

DQS6

171

DQ50

173

VSS

175

DQ51

177

DQ56

179

VDD

181

DQ57

183

DQS7

185

VSS

187

DQ58

189

DQ59

191

VDD

193

SDA

195

SCL

197

VDD_SPD

199

VDD_ID

DDR-SODIMM_200_STD_H4.0

VREF

DU/RESET#

CKE0

DU/BA2

RAS#
CAS#

+2.5V

2
4

VSS

6

DQ4

8

DQ5

10

VDD

12

DM0

14

DQ6

16

VSS

18

DQ7

20

DQ12

22

VDD

DQ13

DM1

VSS
DQ14
DQ15

VDD

VDD

VSS

VSS

DQ20
DQ21

VDD

DM2
DQ22

VSS
DQ23
DQ28

VDD
DQ29

DM3

VSS
DQ30
DQ31

VDD

CB4

CB5

VSS

DM8

CB6

VDD

CB7

VSS

VSS

VDD

VDD

A11

A8

VSS

A6
A4
A2

A0
VDD
BA1

S1#

DU

VSS

DQ36
DQ37

VDD
DM4

DQ38

VSS

DQ39
DQ44

VDD

DQ45

DM5
VSS

DQ46
DQ47

VDD

CK1#

CK1
VSS

DQ52
DQ53

VDD
DM6

DQ54

VSS

DQ55
DQ60

VDD

DQ61

DM7
VSS

DQ62
DQ63

VDD
SA0
SA1
SA2

DU

DDR_DQ13

24
26
28

DDR_DQ15

30

DDR_DQ14

32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64

DDR_DQ29

66
68
70
72
74
76
78
80
82
84
86
88
90
92
94

DDR_CKE2

96
98

DDR_SMAA11

100

DDR_SMAA8

102
104

DDR_SMAA6

106

DDR_SMAA4

108

DDR_SMAA2

110

DDR_SMAA0

112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_DQ6
DDR_DQ0

DDR_DM0
DDR_DQ4

DDR_DQ2
DDR_DQ12

DDR_DM1

DDR_DQ16
DDR_DQ17

DDR_DM2
DDR_DQ22DDR_DQ23

DDR_DQ19
DDR_DQ24

DDR_DQ25
DDR_DM3

DDR_DQ30

1 2

DDR_BS1
DDR_CAS#DDR_WE#

DDR_CS#3

1 2

R599 10_0402_5%

DDR_DQ33
DDR_DQ36

DDR_DM4
DDR_DQ35

DDR_DQ38
DDR_DQ40

DDR_DQ45
DDR_DM5

DDR_DQ42
DDR_DQ46

DDR_DQ53
DDR_DQ52

DDR_DM6
DDR_DQ50

DDR_DQ51
DDR_DQ60

DDR_DQ56
DDR_DM7

DDR_DQ59

+3VS

R597

D

1

C672

0.1U_0402_10V6K

2

10_0402_5%

DDR_SCS#18,13
DDR_SCS#08,13

DDR_SCKE08,13
DDR_SCKE18,13

DDR_CLK4# 8
DDR_CLK4 8

+SDREF

DDR_BS1 13
DDR_RAS# 13
DDR_CAS# 13

DDR_SMAA9
DDR_SMAA7
DDR_SMAA5
DDR_SMAA3

33_0804_8P4R_5%

DDR_SMAA1
DDR_SMAA10
DDR_BS0
DDR_WE#

33_0804_8P4R_5%

DDR_SCS#2
DDR_SMAA15

33_0804_8P4R_5%

DDR_SCKE3
DDR_SMAA12

33_0804_8P4R_5%

DDR_DQS[0..7]
DDR_DQ[0..63]
DDR_DM[0..7]

DDR_SMAA[0..12]

DDR TOPOLOGY 1 FOR SMAA[0, 3, 6:12], SBA[1, 0], SRAS#, SCAS#, SWE#

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS

B

MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

C

D

Title

Size Doc u m ent Number Re v

Date: Sheet of

RP24

18
27
36
45

RP23

18
27
36
45

RP20

18
27
36
45

RP25

18
27
36
45

Compal Electronics, Inc.

DDR-SODIMM SLOT1

LA-2051

E

+1.25VS

RP62

18
27
36
45

33_0804_8P4R_5%

RP61

18
27
36
45

33_0804_8P4R_5%

RP60

18
27
36
45

33_0804_8P4R_5%

DDR_ DQS[0..7 ] 8,13
DDR_ DQ[0..63 ] 8,13
DDR_D M[0..7] 8,13

DDR_SMAA[0..12] 13

Layout note
Place these resistor

close by DIMM1,
all trace length
Max=0.8"

E

DDR_SCKE2
DDR_SMAA11
DDR_SMAA8
DDR_SMAA6

DDR_SMAA4
DDR_SMAA2
DDR_SMAA0
DDR_BS1

DDR_RAS#
DDR_CAS#
DDR_SCS#3

14 51Friday, November 14, 2003

1.0

A

Layout note :

Distribute as close as possible
to DDR-SODIMM0.

+2.5V

1

1 1

+

2

C686
220U_D2_4VM

1

2

C289

0.1U_0402_10V6K

1

C146

0.1U_0402_10V6K

2

1

C291

0.1U_0402_10V6K

2

1

2

C122

0.1U_0402_10V6K

B

1

C246

0.1U_0402_10V6K

2

1

C170

0.1U_0402_10V6K

2

1

C191

0.1U_0402_10V6K

2

1

C150

0.1U_0402_10V6K

2

C

Layout note :

Distribute as close as possible
to DDR-SODIMM1.

+2.5V

1

+

C92
220U_D2_4VM

2

1

C139

0.1U_0402_10V6K

2

1

C151

0.1U_0402_10V6K

2

D

1

C274

0.1U_0402_10V6K

2

1

C111

0.1U_0402_10V6K

2

1

C165

0.1U_0402_10V6K

2

1

C245

0.1U_0402_10V6K

2

E

1

C171

0.1U_0402_10V6K

2

1

C292

0.1U_0402_10V6K

2

1

2

1

+

2

2 2

+1.25VS

1

2

+1.25VS

1

2

+1.25VS

1

2

3 3

+1.25VS

1

2

+1.25VS

1

2

+1.25VS

4 4

1

2

1

C227

0.1U_0402_10V6K

2

1

C322

+

220U_D2_4VM

2

Layout note :

Place one cap close to every 2 pull up resistors termination to
+1.25VS

1

C283

0.1U_0402_10V6K

2

1

C425

0.1U_0402_10V6K

2

1

C197

0.1U_0402_10V6K

2

1

C208

0.1U_0402_10V6K

2

1

C294

0.1U_0402_10V6K

2

1

C428

0.1U_0402_10V6K

2

C184

0.1U_0402_10V6K

C93
220U_D2_4VM

C426

0.1U_0402_10V6K

C671

0.1U_0402_10V6K

C662

0.1U_0402_10V6K

C169

0.1U_0402_10V6K

C244

0.1U_0402_10V6K

C225

0.1U_0402_10V6K

A

1

C136

0.1U_0402_10V6K

2

1

C228

0.1U_0402_10V6K

2

1

C606

0.1U_0402_10V6K

2

1

C276

0.1U_0402_10V6K

2

1

C177

0.1U_0402_10V6K

2

1

C183

0.1U_0402_10V6K

2

1

C535

0.1U_0402_10V6K

2

1

C248

0.1U_0402_10V6K

2

1

C255

0.1U_0402_10V6K

2

1

C456

0.1U_0402_10V6K

2

1

C149

0.1U_0402_10V6K

2

1

C220

0.1U_0402_10V6K

2

1

C187

0.1U_0402_10V6K

2

1

C194

0.1U_0402_10V6K

2

1

C174

0.1U_0402_10V6K

2

1

C263

0.1U_0402_10V6K

2

1

C287

0.1U_0402_10V6K

2

1

C209

0.1U_0402_10V6K

2

1

C249

0.1U_0402_10V6K

2

1

C126

0.1U_0402_10V6K

2

1

C497

0.1U_0402_10V6K

2

1

C266

0.1U_0402_10V6K

2

1

C132

0.1U_0402_10V6K

2

1

C474

0.1U_0402_10V6K

2

1

C424

0.1U_0402_10V6K

2

1

C440

0.1U_0402_10V6K

2

1

C427

0.1U_0402_10V6K

2

1

C528

0.1U_0402_10V6K

2

B

1

C106

0.1U_0402_10V6K

2

1

C156

0.1U_0402_10V6K

2

1

C483

0.1U_0402_10V6K

2

1

C616

0.1U_0402_10V6K

2

1

C120

0.1U_0402_10V6K

2

1

C258

0.1U_0402_10V6K

2

1

C625

0.1U_0402_10V6K

2

1

C635

0.1U_0402_10V6K

2

1

C219

0.1U_0402_10V6K

2

1

C270

0.1U_0402_10V6K

2

1

C265

0.1U_0402_10V6K

2

1

C281

0.1U_0402_10V6K

2

1

C449

0.1U_0402_10V6K

2

1

C664

0.1U_0402_10V6K

2

1

C115

0.1U_0402_10V6K

2

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS
MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

1

2

1

2

1

2

1

2

C

1

2

C434

0.1U_0402_10V6K

C510

0.1U_0402_10V6K

C642

0.1U_0402_10V6K

C439

0.1U_0402_10V6K

C113

0.1U_0402_10V6K

Layout note :

for EM I solution

1000P_0402_50V7K

1

C277

0.1U_0402_10V6K

2

+2.5V

1

C714

2

1

C247

0.1U_0402_10V6K

2

1

C715

2

1000P_0402_50V7K

1000P_0402_50V7K

1

C716

2

1000P_0402_50V7K

1

C137

0.1U_0402_10V6K

2

C717

D

1

2

1

C226

0.1U_0402_10V6K

2

1000P_0402_50V7K

1

C718

2

1000P_0402_50V7K

1

2

C719

Title

Size Doc u m ent Number Re v

Date: Sheet of

C185

0.1U_0402_10V6K

1000P_0402_50V7K

1

C720

2

LA-2051

1

C261

0.1U_0402_10V6K

2

1000P_0402_50V7K

1

1

C721

2

1000P_0402_50V7K

C722

2

Compal Electronics, Inc.

DDR SODIMM Decoupling

1

2

C290

0.1U_0402_10V6K

1

2

E

1

2

15 51Friday, November 14, 2003

C176

0.1U_0402_10V6K

1.0

A

1 1

PM_STPCPU#5,10, 26,47

2 2

PCI_STP#26

B

EXCLK_CLKGEN38

R577

10K_0402_5%

R579 @0_0402_5%

1 2
1 2

R580 @0_0402_5%

CLK_SB_48M27

CLK_A UDIO_14M32

REFCLK1_NB10

CLK_SIO_14M34
CLK_SB_14M27

CLK_1 4M_APIC26

C

+3VS

R146 @10_0402_5%

1 2

C116 10P_0402_50V8K

+3VS

12

12

R578
10K_0402_5%

R109 33_0402_5%

1 2

R159 @33_0402_5%

1 2

R161 68_0402_5%

1 2

R165 33_0402_5%

1 2

R174 33_0402_5%

1 2

R173 @33_0402_5%

1 2

1 2

12

1 2

C112

14.31818MHZ_20P_6X1430004201
10P_0402_50V8K

SMCLK13 ,14,27
SMDATA13,14,27

VTT_PWRGD17,27

XTALIN_CLK

Y2

XTALOUT_CLK

12

VTT_PWRGD

PCI33/66#

CLK_48M

FS2
FS1
FS0

CLK_IREF

R144
475_0402_1%

1 2

R150
@1M_0402_5%

D

L7

1 2

HB-1M2012-121JT03_0805

U16

6

XIN

7

XOUT

35

SCLK

34

SDATA

10

VTTPWRGD/PD#

45

CPU_STP#

12

PCI_STOP#

26

24/48#SEL

11

PCI33/66#SEL

27

48MHz_1

28

48MHz_0

4

FS2/REF2

3

FS1/REF1

2

FS0/REF0

38

IREF

+3V_CLK

Width=40 mils

48

29

42

30

VDDSD

VDD48M

VDDCPU

VDDAGP

GNDREF5GNDXTAL

GNDPCI

GNDPCI

8

18

24

1

C145

2

10U_0805_10V4Z

+3VS_VDDA

13

19

1

9

VDDPCI

VDDPCI

VDDREF

VDDXTAL

SDRAMOUT

FS3/PCICLK_F0
FS4/PCICLK_F1

GNDSD

GNDCPU

GND48M

GNDAGP

ICS951402AGT_TSSOP48

46

41

25

33

0.1U_0402_10V6K

1

C141

2

0.1U_0402_10V6K

VDDA

VSSA

CPUT0

CPUC0
CPUT1

CPUC1

AGPCLK0
AGPCLK1

PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5

E

0.1U_0402_10V6K

1

C118

2

36

C104

0.1U_0402_10V6K

VSSA

37

CLK_BCLK

40

CLK_BCLK#

39

CLK_NB

44

CLK_NB#

43

MEM_66M

47

AGP_66M

32
31

FS3

14

FS4

15

16
17
20
21
22
23

1

C95

2

0.1U_0402_10V6K

+3VS_VDDA

1

1

C99

2

2

10U_0 805_10V4Z

R148 33_0402_5%

R142 33_0402_5%
R164 33_0402_5%

R156 33_0402_5%
R168 33_0402_5%
R125 33_0402_5%

R115 33_0402_5%

C105

C90

0.1U_0402_10V6K

1 2

1 2
1 2

1 2
1 2
1 2

1 2

1

C89

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C138

2

R147 49.9_0402_1%

R139 49.9_0402_1%

R163 49.9_0402_1%

R155 49.9_0402_1%

F

CLK_BCLK
CLK_BCLK#

1

2

1

2

1 2

1 2

1 2

1 2

R158 @0_0402_5%

1 2

R152 @0_0402_5%

1 2

L4

1 2

CHB20 12U121_0805

1

C110

0.1U_0402_10V6K

2

CLK_N B_BCLK 10

CLK_N B_BCLK# 10
CLK_MEM_66M 10
CLK_AGP_66M 10

CLK_A LINK_SB 26

+3VS

CLK_C PU_BCLK 4

CLK_C PU_BCLK# 4

G

CLK_C PU_ITP 5
CLK_C PU_ITP# 5

H

3 3

CLOCK FREQUENCY SELECT TABLE

FS2 MEMFS1

FS3

0 0 0 1 0
0 0 0 0 1

**

0 0 0 0 0

Note: 0 = PULL LOW

4 4

A-LINK FREQ

PCI33/66# = HIGH

**

PCI33/66# = LOW 33MHZ

A

1 = PULL HIGH

FS0

CPUFS4 With Spread Enabled…

200

200
133
100 100

*

133

10K_0402_5%

BSEL15,12
BSEL05,12

66MHZ

B

Spreaf OFF OR
Center spr ead +/-0.3%

+3VS +3VS

12

12

R167

R172

10K_0402_5%

D20 RB 751V_SOD323
D21 RB 751V_SOD323

C

+3V_CLK

12

R120

@10K_0402_5%

12

R123
10K_0402_5%

12

R127

10K_0402_5%

12

R133
@10K_0402_5%

Title

Size Doc u m ent Number Re v

Date: Sheet of

Compa l Electronics, Inc.

Clock Generator

LA-2051

G

16 51Friday, November 14, 2003

H

1.0

12

12

FS1
FS0
FS2

+3V_CLK

FS3
FS4
PCI33/66#

12

12

R169

10K_0402_5%

21
21

D

12

R171
10K_0402_5%

R166

4.7K_0402_5%

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS
MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

12

R170

4.7K_0402_5%

E

12

R160

@10K_0402_5%

R153
10K_0402_5%

R124

@10K_0402_5%

12

R121
10K_0402_5%

F

A

1 1

10K_0402_5%
R581

VGATE47

2 2

1 2

0_0402_5%

1M_0402_5%

+3VS

12

R413

12

R415

B

SN74LVC32APWLE_TSSOP14

+3VALW

14

U10A

1

P

A

O

2

B

G

7

12

R416
1K_0402_5%

3

R128

1 2

330K_0402_5%

C

VTT_PWRGD 16,27

C103

0.1U_0402_16V7K

D

+3VALW +3VALW +3VALW

14

P

1

O2I

G

U12A

1

7

2

SN74LVC14APWLE_TSSOP14

14

P

3

O4I

330K_0402_5%

G

U12B

7

SN74LVC14APWLE_TSSOP14

+2.5VS

12

R149
1K_0402_5%

13

D

Q19

2

2N7002_SOT23

G

S

R122

1 2

12

R143
47K_0402_5%

E

0.47U_0603_16V7K

NB_PW RGD 7

1

C87

2

14

P

5

O6I

G

U12C

7

SN74LVC14APWLE_TSSOP14

F

+3VALW

14

9

7

P

R97 47_0603_5%

1 2

O8I

G

U12D
SN74LVC14APWLE_TSSOP14

G

12

R106
@10K_0402_5%

H

SB_PWRGD 27

3 3

TV-OUT CONN.

V-PORT-0603-220 M-V05_0603

C360 @33P_0402_50V8J

TV_LUMA10

TV_CRMA10
TV_COMPS10

4 4

A

B

LUMA

CRMA
COMPS

12

12

R377
75_0402_1%

C

12

R375

R376

75_0402_1%

75_0402_1%

1

C370
100P_0402_50V8K

2

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS
MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

D

L23 CHB2 012U170_0805

C359 @33P_0402_50V8J

1

C371
100P_0402_50V8K

2

E

D31

1 2

1 2
1 2

L22 CHB2 012U170_0805

1 2

2 1

LUMA_1

CRMA_1

1

C358
270P_0402_25V8K

2

F

1

C361
270P_0402_25V8K

2

D32

V-PORT-0603-220 M-V05_0603

2 1

JP14

1

1

2

2

3

3

4

4

SUYIN_030008FR004T100ZL

Compal Electronics, Ltd.

Title

CH-7011& TV-CONN.

Size Doc u m ent Number Re v

Custom

LA-2051

Date: Sheet of

G

17 51Friday, November 14, 2003

H

1.0

A

1 1

INTCRT_R10

INTCRT_G10

INTCRT_B10

+CRT_VCC

1

5

P

4

INTCRT_HSYNC10

2 2

INTCRT_VSYNC10

OE#

A2Y

G

U1

3

SN74A HCT1G125GW_SOT353-5

1 2

1

5

P

4

OE#

A2Y

G

U2

3

SN74A HCT1G125GW_SOT353-5

R22
1K_0402_5%

C365

3.3P_0402_50V8C

75_0402_1%

B

@V-POR T-0603-220 M-V05_0603

1

1

1

C366

C367

R367

3.3P_0402_50V8C

2

12

75_0402_1%

3.3P_0402_50V8C

2

2

L21 FCM20 12C-800_0805

1 2

L20 FCM20 12C-800_0805

1 2

L19 FCM20 12C-800_0805

1 2

12

12

R369

R368

75_0402_1%

HSYNC CRT_HSYNC

VSYNC

D30

CRT_R

CRT_G

1

C7
8P_0402_50V8K

2

C

+5VS

@V-POR T-0603-220 M-V05_0603

2 1

CRT_B

CHB1608B121_0603

CHB1608B121_0603

D29

1

C9
8P_0402_50V8K

2

1 2

L18

1 2

L17

27P_0402_50V8J

2 1

@V-POR T-0603-220 M-V05_0603

D1

2 1

CH491D_SC59

C10

+R_CRT_VCC

D28

1

2

2.2K_0402_5%

F1

1A_6V DC_MINISMDC110

0.1U_0 402_16V4Z

2 1

1

C11
8P_0402_50V8K

2

CRT_VSYNC

1

C13
27P_0402_50V8J

2

C14

100P_0402_50V8K

21

C12

1

2

100P_0402_50V8K

+CRT_VCC

R357

1

2

C8

12

1

2

12

R359

2.2K_0402_5%

+CRT_VCC

2N7002_SOT23

1

C15
100P_0402_50V8K

2

D

+3VS

12

R21

2.2K_0402_5%

Q34

2

G

1 3

D

S

2

Q5

1 3

D

JP12

6

11

1
7

12

2
8

13

CRT Connector

3
9

14

4
10
15

5

SUYIN_070549MR015S200ZU

+3VS

R370
10K_0402_5%

1 2

G

S

2N7002_SOT23

R23
10K_0402_5%

1 2

E

INTDDCDA 10

INTDDCCK 10

1

C373

2

C378

4.7U_1206_16V6K

+LCDVDD

1

C387

4.7U_1206_16V6K

2

B+

1

C376
10U_1210_35V4Z

2

B+

IB+ IB+

L25 CHB2 012U170_0805

1 2
1 2

L24 CHB2 012U170_0805

+LCDVDD

LCD_A0+10

LCD_A0-10

LCD_A1+10

LCD_A1-10

LCD_A2+10

LCD_A2-10

LCD_A CLK+10

LCD_ACLK-10

PID234

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS
MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

C

JP1

2

112

4

334

6

556

8

778

10

9910

12

BRIG DISP_OFF#

111112

14

131314

16

151516

18

171718

20

191920

22

212122

24

232324

26

252526

28

272728

30

292930

32

313132

34

333334

36

353536

38

373738

40

393940

HRS_DF 23C-40DS -0.5V

+LCDVDD

PWM

PID1PID0
PID3PID2

LCD_B0+ 10
LCD_B0- 10

LCD_B1+ 10
LCD_B1- 10

LCD_B2+ 10
LCD_B2- 10

LCD_B CLK+ 10
LCD_B CLK- 10
PID1 34PID034
PID3 34

D

2

C386
1000P_0402_50V7K

1

12

R386
150K_0402_5%

+3VS

RP39

10K_1206_8P4R_5%

1

C391
1000P_0402_50V7K

2

PID0

18

PID1

0.1U_0 603_50V4Z

27

PID2

36

PID3

45

+3V

1

D

Q37
SI2302DS_SOT23

S3G

2

1

C394

0.1U_0 402_16V4Z

2

SI2302DS: N CHANNEL
VGS: 4.5V, RDS: 85 mOHM
VGS: 2.5V, RDS: 115mOHM
Id(MAX): 2.8A
VGS(MAX): +-8V

B

1

2

+3VS

12

R384

3 3

4 4

2N7002_SOT23

ENVDD9

BKOFF#35

R389

100_0402_5%

Q38

ENVDD

+LCDVDD

D38

RB751V_SOD323

+12VALW

12

R391
100K_0402_5%

13

D

1 2

2

G

13

S

Q39
DTC124EK_SC59

2

A

4.7K_0402_5%

DISPOFF#

21

+12VALW

R379
100K_0402_5%

1 2

13

D

Q54

2

G

S

2N7002_SOT23

Protect for EC

+3VALW

D36

BRIG

PWM

DISP_OFF#DISPOFF#

@RB751V

2 1

E

R380

DAC_BRIG35

INVT_PWM35

1 2

1K_0402_5%

R381

1 2

1K_0402_5%

R382

1 2

1K_0402_5%

Compal Electronics, Ltd.

Title

CRT& LVDS CONN.

Size Doc u m ent Number Re v

Custom

LA-2051

Date: Sheet of

2 1

D37
@RB751V

18 51Friday, November 14, 2003

D39
@RB751V

2 1

1.0

A

1 1

1394_IDSEL

PCI_C/BE#320,22, 24,25,26
PCI_C/BE#220,22, 24,25,26
PCI_C/BE#120,22, 24,25,26
PCI_C/BE#020,22, 24,25,26

CLK_PCI _139426

PCI_GNT #026
PCI_RE Q#026

PCI_FR AME#20,22, 24,25,26

PCI_IRDY#20,22, 24,25,26

PCI_TRDY#20,22,24,25,26

PCI_DE VSEL#20,22, 24,25,26

PCI_STOP#20,22,24,25,26

PCI_PERR#20,22,2 4,25,26

PCI_PIRQA#9,20,24,26

1394_PME#20, 22,24,25,35

PCI_SERR#20,22,2 4,25,26

PCI_PAR20,22,24,25,26

PM_CLKRUN#20,22, 24,25,26,34,35

PCIRST#10,20, 21,22,24 ,25,26,34,35

RP92

1 8
2 7
3 6
4 5

220_1206_8P4R_5%

PCI_AD[0..31]

PCI_AD 10
PCI_AD 11
PCI_AD 12
PCI_AD 13
PCI_AD 14
PCI_AD 15
PCI_AD 16
PCI_AD 17
PCI_AD 18
PCI_AD 19
PCI_AD 20
PCI_AD 21
PCI_AD 22
PCI_AD 23
PCI_AD 24
PCI_AD 25
PCI_AD 26
PCI_AD 27
PCI_AD 28
PCI_AD 29
PCI_AD 30

PCI_AD 31
PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0

CLK_PCI _1394

PCI_GNT #0
PCI_RE Q#0
1394_IDSEL

PCI_FR AME#

PCI_IRDY#
PCI_TRDY#

PCI_DE VSEL#

PCI_STOP#
PCI_PERR#
PCI_PIRQA#
1394_PME#
PCI_SERR#
PCI_PAR

PCIRST#

SCL_1394
SDA_1394

PCI_AD 0
PCI_AD 1
PCI_AD 2
PCI_AD 3
PCI_AD 4
PCI_AD 5
PCI_AD 6
PCI_AD 7
PCI_AD 8
PCI_AD 9

U29

84

PCI_AD0

82

PCI_AD1

81

PCI_AD2

80

PCI_AD3

79

PCI_AD4

77

PCI_AD5

76

PCI_AD6

74

PCI_AD7

71

PCI_AD8

70

PCI_AD9

69

PCI_AD10

67

PCI_AD11

66

PCI_AD12

65

PCI_AD13

63

PCI_AD14

61

PCI_AD15

46

PCI_AD16

45

PCI_AD17

43

PCI_AD18

42

PCI_AD19

41

PCI_AD20

40

PCI_AD21

38

PCI_AD22

37

PCI_AD23

32

PCI_AD24

31

PCI_AD25

29

PCI_AD26

28

PCI_AD27

26

PCI_AD28

25

PCI_AD29

24

PCI_AD30

22

PCI_AD31

34

PCI_C/BE3

47

PCI_C/BE2

60

PCI_C/BE1

73

PCI_C/BE0

16

PCI_CLK

18

PCI_GNT

19

PCI_REQ

36

PCI_IDSEL

49

PCI_FRAME

50

PCI_IRDY

52

PCI_TRDY

53

PCI_DEVSEL

54

PCI_STOP

56

PCI_PERR

13

PCI_INTA/CINT

21

PCI_PME/CSTSCHG

57

PCI_SERR

58

PCI_PAR

12

PCI_CLKRUN

85

PCI_RST

14

G_RST

89

GPIO3

90

GPIO2

PCI_AD[0..31]20,22,24, 25,26,29

2 2

IDSEL:PCI_AD16

PCI_AD 16

1 2

100_0402_5%

R324

3 3

B

VDDP20VDDP35VDDP48VDDP62VDDP

TSB43AB21A
/(TSB43AB22)

PCI BUS INTERFACE

PLLGND18REG_EN9AGND

AGND

AGND

AGND

AGND

AGND

109

110

111

117

126

127

+3VS

78

87

CYCLEIN

BIAS CURRENT

OSCILLATOR

FILTER

EEPROM 2 WIRE BUS

POWER CLASS

PHY PORT 1

AGND

DGND17DGND23REG1830DGND33DGND44DGND55DGND64DGND68DGND75DGND83REG1893DGND

128

1 2

R568

1 2

R571

1 2

R572

1 2

R556
R557 4.7K_0402_5%

96

86

11

CNA

DVDD
DVDD

TEST1710TEST16

DVDD
DVDD
DVDD
DVDD
DVDD
DVDD

CYCLEOUT/CARDBUS

PLLVDD

AVDD
AVDD
AVDD
AVDD
AVDD

NC/(TPBIAS1)

NC/(TPA1+)

NC/(TPA1-)

NC/(TPB1+)

NC/(TPB1-)

FILTER0
FILTER1

TPBIAS0

TPA0+

TPA0-

TPB0 +

TPB0 -

TEST9
TEST8

TEST3
TEST2
TEST1
TEST0

TSB43AB21A_PQFP128

103

CPS

SDA
SCL
PC0

PC1
PC2

R0

R1
X0

X1

4.7K_0402_5%
10K_0402_5%

4.7K_0402_5%

4.7K_0402_5%

12

15
27
39
51
59
72
88
100
7
1
2
107
108
120

106

R334

125
124
123
122
121

118

R317

6.34K_0402_1%

119
6

5

C682

3

0.1U_0402_16V4Z

4
92
91
99

98
97

116
115
114
113
112

94
95

101
102
104
105

C

+3VS

1 2

1 2

1 2

SDA_1394
SCL_1394

+3VS

+1394_PLLVDD

+3VS

1K_0402_5%

TPBIAS0
TPA0+
TPA0­TPB0+
TPB0-

+3VS

1

2

X2

24.576MHz_16P_3XG-24576-43E1

1 2

1

C678

0.1U_0402_16V4Z

2

0.01U_0402_16V7K

1

1

C312

2

2

C313 22P_0402_50V8J

1 2

C314 22P_0402_50V8J

1 2

R311

1 2

@10_0402_5%

12

12

1

2

C311

0.1U_0402_16V4Z

L16
BLM21A601SPT_0805

1 2

C306

4.7U_0805_10V4Z

R322

56.2_0402_1%

R325

56.2_0402_1%

C326
220P_0402_50V7K

1

C310

0.1U_0402_16V4Z

2

+3VS

1

C347
1000P_0402_50V7K

2

+3VS

EXCLK_1394 38

12

R563

56.2_0402_1%

12

R328

56.2_0402_1%

12

R330

5.11K_0402_1%

D

1

2

1

2

C316

0.1U_0402_16V4Z

1

C348
1000P_0402_50V7K

2

C690

0.33U_0603_16V4Z

1

C324

0.1U_0402_16V4Z

2

1

C346
1000P_0402_50V7K

2

4

4

3

3

2

2

1

1

JP23

SANTA_360302

1

C325

0.1U_0402_16V4Z

2

1

C319
1000P_0402_50V7K

2

E

1

C332

0.1U_0402_16V4Z

2

1

2

1

C334

0.1U_04 02_16V4Z

2

C335
1000P_0402_50V7K

1

1

C315

CLK_PCI _1394

4 4

A

12

R309
10_0402_5%

1

C305
10P_0402_50V8K

2

2

B

0.1U_0402_16V4Z

C698

2

0.1U_0402_16V4Z

THIS SHEE T OF E N GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTH ORIZED B Y COMPAL E LECTRON ICS, INC . NEITH ER THIS S HEET NOR THE INFO RMATION IT CONT AINS
MAY BE US ED B Y O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONI CS, INC.

C

Compal E l ectronics, Inc.

Title

TI 1394 Controller TSB43AB21A

Size Docume nt Nu mb e r Re v

Custom

LA-2051

D

Date: Sheet

19 51F riday , November 14, 2003

E

1.0

of

5

4

3

2

1

CARD BUS AD20 REQ#2/GNT#2 PCI_PIRQA#

1 2

144
142
141
140
139
129
128
127
124
121
120
118
116
115
113
98
96
97
93
95
92
91
89
87
85
82
83
80
81
77
79
76

125
112
99
88

119
111
110
109
107
105
104
133
101
123
106
108

135
136

103
132
62

134
137

75
117
131

+3V

S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3

S1_REG#
S1_A12
S1_A8
S1_CE1#

S1_RST
S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A14
S1_WAIT#
S1_A13
S1_INP ACK#
S1_WE#
A16_CLK

S1_BVD1
S1_WP

S1_A19
S1_RDY#
PCM_SPK#

S1_BVD2

S1_VS2
S1_VS1

S1_D2
S1_A18
S1_D14

1

2

0.1U_0 402_16V4Z

0.1U_0 402_16V4Z

1

C231

C307

2

S1_IOWR# 21
S1_IORD# 21
S1_OE# 21

S1_CE2# 21

S1_REG# 21

S1_CE1# 21
S1_RST 21

S1_WAIT# 21
S1_INP ACK# 21

S1_WE# 21

1 2

R310 33_0402_5%

S1_BVD1 21
S1_WP 21

S1_RDY# 21
PCM_SPK# 33

S1_BVD2 21

S1_VS2 21
S1_VS1 21

1

C257

2

0.1U_0 402_16V4Z

S1_A16

C260 0.1U_0 402_16V4Z
C309 0.1U_0 402_16V4Z

0.1U_0 402_16V4Z

1

C272

2

S1_A[ 0..25]

S1_D[0..15]

1 2
1 2

2

1

2

0.1U_0 402_16V4Z

S1_CD2# 21
S1_CD1# 21

0.1U_0 402_16V4Z

1

1

C308

C288

2

S1_A[ 0..25] 21
S1_D[ 0..15] 21

Title

Size Doc u m ent Number Re v

Custom

Date: Sheet of

C254

0.1U_0 402_16V4Z

2

Compal Electronics, Ltd.

CardBus Controller<TI PCI1410>

LA-2051

1

20 51Friday, November 14, 2003

1.0

D D

1

3
4
5
7
8

9
10
11
15
16
17
19
23
24
25
26
38
39
40
41
43
45
46
47
49
51
52
53
54
55
56
57

12
27
37
48

20
28
29
31
32
33
34
35
36

1

2
21

59
70

13
60

61
64
65
67
68
69

66

2

U25

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

C/BE3#
C/BE2#
C/BE1#
C/BE0#

RST#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
PAR
REQ#
GNT#
PCLK

RI_OUT#/PME#
SUSPEND#

IDSEL
MFUNC0

MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6

VCC/GRST#

1

0.1U_0 402_16V4Z

2

74

C284

4.7U_0 805_10V4Z

VPPD021

VPPD121
VCCD0#21
VCCD1#21

21

12

R256
10_0402_5%

1

C222
10P_0402_50V8K

2

+3V

12

PCI_AD[0..31]

10K_0402_5%
R306

PCI_C/BE#319,22 ,24,25,26
PCI_C/BE#219,22 ,24,25,26
PCI_C/BE#119,22 ,24,25,26
PCI_C/BE#019,22 ,24,25,26

PCIRST#10,19 ,21,22,2 4,25,26,34,35

PCI_FRAME#19, 22,24,25,26

PCI_IRDY#19,22, 24,25,26

PCI_TRDY#19,22 ,24,25,26

PCI_DE VSEL#19,22, 24,25,26

PCI_STOP#19,22, 24,25,26

PCI_PERR#1 9,22,24,25,26

PCI_SERR#19 ,22,24,25,26

PCI_PAR19,22, 24,25,26
PCI_REQ#226
PCI_GNT#226

CLK_PCI_CB26

PCM_PME#19,22 ,24,25,35

PCI_AD20

1 2

R257 100_0603_1%

PCI_PIRQA#9,19, 24,26

SERIRQ26, 34,35

PM_CL KRUN#19,22 ,24,25,26,34,35

CBRST#21,24

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

CLK_P CI_PCM

PCM_ID

PM_CL KRUN#

4

PCI_AD[0..31]19,22 ,24,25,26,29

C C

B B

SUSP#32,35 ,36,40

A A

CLK_P CI_PCM

5

D24
RB751V_SOD323

+S1_VCC

+3V

1

C285

0.1U_0 402_16V4Z

2

90

126

72

18

44

VPPD071VPPD1

VCCP1

VCCP0

VCCD0#73VCCD1#

VCCSK1

VCCSK0

PQFP 144

22.2 X 22.2 X 1.60

GND1

GND2

GND3

GND4

GND5

GND6

GND7

GND8

6

22

42

58

78

94

114

130

1

C278

C280

0.1U_0 402_16V4Z

2

+3V

+3V

C232

0.1U_0 402_16V4Z

63

14

30

50

86

102

122

138

VCCI

VCC7

VCC6

VCC5

VCC4

VCC3

VCC2

VCC1

CAD31/D10

CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6

CAD19/A25

CAD18/A7
CAD17/A24
CAD16/A17

CAD15/IOWR#

CAD14/A9

CAD13/IORD#

CAD12/A11
CAD11/OE#

CAD10/CE2#

CAD9/A10

CAD8/D15

CAD7/D7

CAD6/D13

CAD5/D6

CAD4/D12

CAD3/D5

CAD2/D11

CAD1/D4
CAD0/D3

CC/BE3#/REG#

CC/BE2#/A12

CC/BE1#/A8

CC/BE0#/CE1#
CRST#/RESET

CFRAME#/A23

CIRDY#/A15

CTRDY#/A22

CDEVSEL#/A21

CSTOP#/A20

CPERR#/A14

CSERR#/WAIT#

CPAR/A13

CREQ#/INPACK#

CGNT#/WE#

CCLK/A16

CSTSCHG/BVD1
CCLKRUN#/WP

CBLOCK#/A19

CINT#/READY

SPKOUT

CAUDIO/BVD2

CCD2#/CD2#
CCD1#/CD1#

CVS2/VS2#
CVS1/VS1#

RSVD/D14

RSVD/A18

RSVD/D2

PCI1410_LQFP144

84

100

143

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS
MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

3

C119
1U_0805_25V4Z

C131

0.1U_0 402_16V4Z

C135

0.1U_0 402_16V4Z

PCMCIA Power Controller

13

AVCC1

12

AVCC2

11

AVCC3

10

AVPP

1
2
15

VPPD0

14

VPPD1

8

OC#

TPS2211IDBR_SSOP16

+5VALW

1

C129
10U_0805_10V4Z

2

+3V

1

14

P

OE#

I2O
G

U18A

7

SN74LVC125APWLE_TSSOP14

+3V POWER

+S1_VCC

1

2

3

C134

0.1U_0 402_16V4Z

+S1_VPP

PCMRST# 35

CBRST#

+12VALW

1

U17

2

9

12V

+5VALW

1

5

5V_1

6

5V_2

2

+3VALW

3
4

1

2

+3VALW

1

2

PCIRST#10,19 ,20,22,2 4,25,26,34,35 CBRST# 20,24

3.3V_1

3.3V_2

7

C140
10U_0 805_10V4Z

VCCD0#
VCCD1#

GND

SHDN#

16

CBRST#

1

C128
1U_0805_25V4Z

2

VCCD0# 20
VCCD1# 20
VPPD0 20
VPPD1 20

+3V

12

R189
10K_0402_5%

C199

0.01U_ 0402_25V4Z

C204

0.1U_0 402_16V4Z

+S1_VPP

+S1_VCC

S1_A23

S1_WP

S1_OE#

1

1

C198

4.7U_1 206_16V4Z

2

2

1

1

C205
10U_0 805_10V4Z

2

2

S1_A[ 0..25]20

S1_D[0..15]20

S1_A[ 0..25]

S1_D[0..15]

CardBus Socket

JP18

1

2

1

2

3

4

3

4

5

6

5

6

7

8

7

8

9

10

9

10

11

12

11

12

13

14

13

14

15

16

15

16

17

18

17

18

19

20

19

20

21

22

21

22

23

24

23

24

25

26

25

26

27

28

27

28

29

30

29

30

31

32

31

32

33

34

33

34

35

36

35

36

37

38

37

38

39

40

39

40

41

42

41

42

43

44

43

44

45

46

45

46

47

48

47

48

49

50

49

50

51

52

51

52

53

54

53

54

55

56

55

56

57

58

57

58

59

60

59

60

61

62

61

62

63

64

63

64

65

66

65

66

67

68

67

68

69

70

GND

GND

71

72

GND

GND

73

74

GND

GND

75

76

GND

GND

77

78

GND

GND

79

80

GND

GND

81

82

GND

GND

83

84

GND

GND

FOXCONN _1CA415M1-TA_68P

(APL11)

S1_CD1#
S1_D11
S1_D12
S1_D13
S1_D14
S1_D15
S1_CE2#
S1_VS1
S1_IORD#
S1_IOWR#
S1_A17
S1_A18
S1_A19
S1_A20
S1_A21

S1_A22
S1_A23
S1_A24
S1_A25
S1_VS2
S1_RST
S1_WAIT#
S1_INP ACK#
S1_REG#
S1_BVD2
S1_BVD1
S1_D8
S1_D9
S1_D10
S1_CD2#

S1_CD1# 20

S1_CE2# 20
S1_VS1 20
S1_IORD# 20
S1_IOWR# 20

+S1_VCC+S1_VCC

S1_VS2 20
S1_RST 20
S1_WAIT# 20
S1_INP ACK# 20
S1_REG# 20
S1_BVD2 20
S1_BVD1 20

S1_CD2# 20

1 2

R217
22K_0402_5%

1 2

R151
22K_0402_5%

1 2

R262
43K_0402_5%

S1_D3
S1_D4
S1_D5
S1_D6
S1_D7

S1_CE1#20
S1_OE#20

S1_WE#20
S1_RDY#20

S1_WP20

+S1_VCC

+S1_VCC

+S1_VCC

S1_CE1#
S1_A10
S1_OE#
S1_A11
S1_A9
S1_A8
S1_A13
S1_A14
S1_WE#
S1_RDY#

+S1_VPP +S1_VPP

S1_A16
S1_A15
S1_A12
S1_A7
S1_A6
S1_A5
S1_A4
S1_A3
S1_A2
S1_A1
S1_A0
S1_D0
S1_D1
S1_D2
S1_WP

S1_CE1#

1 2

R265
43K_0402_5%

S1_CE2#

1 2

R263
43K_0402_5%

S1_RST

1 2

R195
43K_0402_5%

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS
MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

+S1_VCC

+S1_VCC

+S1_VCC

Compal Electronics, Ltd.

Title

PCMCI A SOCKET

Size Doc u m ent Number Re v

Custom

LA-2051

Date: Sheet of

21 51Friday, November 14, 2003

1.0

5

4

3

2

1

LAN AD19 REQ#1/GNT#1 PCI_PIRQD#

0.1U_0402_16V4Z

+3V

5

GND

6

NC

7

NC

8

VCC

+3VS

R88

0_0805_5%

1

2

1

C54
27P_0402_50V8J

2

12

+3V

C38

0.1U_0402_16V4Z

R76

49.9_0603_1%

+2.5V_LAN

C56 22U_1206_16V4Z_V1
C52

C55
C57
C51

12

12

R77

49.9_0603_1%

1

C49

0.1U_0402_16V4Z

2

Place as close to
U4(LAN Chip)

1 2
1 2

1 2
1 2
1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

LAN_TD+ 23
LAN_TD- 23

1 2

L2LQG 21N4R7K10_0805

Place closed to
RTL8101L pin58

RTL8101L has internal
+2.5V generator at pin58

+2.5V_LAN
+3V

TRACE=30mil

+3V

1

2

+3V

1

2

C69

0.1U_0402_16V4Z

C60

0.1U_0402_16V4Z

1

C77

0.1U_0402_16V4Z

2

1

C67

0.1U_0402_16V4Z

2

1

C97

0.1U_0402_16V4Z

2

1

C98

0.1U_0402_16V4Z

2

+2.5V_LAN_1

2

48
94

58
59
70
75

52
53
54
55

78
77
76

72
71

68
67

61

60
64
74
65
63
56
1

3
4
5
7

100
99

51
69

2
16
31
44
88
62
66
73

C71

0.1U_0402_16V4Z

1

+2.5V_LAN
+3V_LAN_VDD1
+3V_LAN_VDD2
+3V_LAN_VDD3

LAN_EEDO
LAN_EEDI
LAN_EECLK
LAN_EECS

ACTIVITY#
LINK10_100#

LAN_TD+
LAN_TD­LAN_RD+
LAN_RD-

LAN_X1

LAN_X2

1 2

R80 1K_0402_5%

1 2

R79 15K_0402_5%

1 2

R78

5.6K_0603_1%

1 2

D D

PCI_AD 0
PCI_AD 1
PCI_AD 2
PCI_AD 3
PCI_AD 4
PCI_AD 5
PCI_AD 6
PCI_AD 7
PCI_AD 8
PCI_AD 9
PCI_AD 10
PCI_AD 11
PCI_AD 12
PCI_AD 13
PCI_AD 14
PCI_AD 15
PCI_AD 16
PCI_AD 17
PCI_AD 18
PCI_AD 19
PCI_AD 20
PCI_AD 21
PCI_AD 22
PCI_AD 23
PCI_AD 24
PCI_AD 25
PCI_AD 26
PCI_AD 27
PCI_AD 28
PCI_AD 29
PCI_AD 30
PCI_AD 31

PCI_C/ BE#0
PCI_C/ BE#1
PCI_C/ BE#2
PCI_C/ BE#3

1 2

R108 100_0402_5%

CLK_PCI_LAN

+3V

CLK_PCI_LAN

R98

C84
10P_0402_50V8K

PCI_AD[0..31]

PCI_C/BE#019,20,2 4,25,26
PCI_C/BE#119,20,2 4,25,26
PCI_C/BE#219,20,2 4,25,26
PCI_C/BE#319,20,2 4,25,26

PCI_AD 19 LAN_ID SEL

PCI_PAR19,2 0,24,25,26

PCI_FR AME#19,20, 24,25,26

PCI_IRDY#19,20, 24,25,26

PCI_TRDY#19,20, 24,25,26

PCI_DE VSEL#19,20, 24,25,26

PCI_STOP#19,20,24,25,26

PCI_PERR#19,20,24 ,25,26
PCI_SERR#19,20,24 ,25,26

PCI_RE Q#126

PCI_GNT #126

PCI_PIRQD#24,25,26
PCI_PIRQC#24,25,26

LAN_PME#19,20, 24,25,35

PCIRST #10,19, 20,21,24 ,25,26,34,35

CLK_PCI_LAN26

PM_CLKRUN#19,20 ,24,25,26,34,35

PCI_AD[0..31]19 ,20,24, 25,26,29

C C

B B

12

10_0402_5%

1

2

U11

47

AD0

46

AD1

45

AD2

43

AD3

42

AD4

41

AD5

40

AD6

39

AD7

36

AD8

35

AD9

34

AD10

33

AD11

32

AD12

30

AD13

29

AD14

28

AD15

15

AD16

14

AD17

13

AD18

12

AD19

11

AD20

10

AD21

9

AD22

8

AD23

96

AD24

93

AD25

92

AD26

91

AD27

89

AD28

87

AD29

86

AD30

85

AD31

38

C/BE#0

27

C/BE#1

17

C/BE#2

84

C/BE#3

98

IDSEL

24

PAR

18

FRAME#

19

IRDY#

20

TRDY#

21

DEVSEL#

23

STOP#

25

PERR#

26

SERR#

83

REQ#

82

GNT#

80

INTA#

79

INTB#

57

PME#

81

RST#

97

PCICLK

50

CLKRUN#

6

VDD

22

VDD

37

VDD

Power

49

VDD

90

VDD

95

VDD

RTL8101L_LQFP100

VDD25
VDD25

AVDD25

AVDD
AVDD
AVDD

Power

EEDO

EEDI
EESK
EECS

LED0
LED1
LED2

TXD+

TXD­RXIN+

RXIN-

X1

X2

LWAKE

LAN I/F

PCI I/F

ISOLATE#

RTSET

RTT3

VCTRL

AC_RST#
AC_SYNC
AC_DOUT

AC_DIN

AC_BCK

AC-Link

GPIO0
GPIO1

ROMCS/OE#

NC

DGND1
DGND2
DGND3
DGND4
DGND5
AGND1
AGND2
AGND3

TRACE=20mil

2

C61

1

TRACE=20mil

TRACE=20mil

TRACE=20mil

TRACE=20mil

R394 5.6K_0402_5%

U42

4

DO

3

DI

2

SK

1

CS

AT93C46 -10SI-2.7_SO8

ACTIVITY# 23

LINK10_100# 23

LAN_RD+ 23
LAN_RD- 23

Y1

LAN_X1 LAN_X2

1

2

12

25MHZ_ 20P_1BX25000CK1A

C53
27P_0402_50V8J

A A

Compal Electronics, Inc.

Title

THIS SHEE T OF E N GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTH ORIZED B Y COMPAL E LECTRON ICS, INC . NEITH ER THIS S HEET NOR THE INFO RMATION IT CONT AINS

5

4

MAY BE US ED B Y O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONI CS, INC.

3

2

LAN RE ALT EK RTL8101L

Size Docume nt Nu mb e r Re v

LA-2051

Date: Sheet

of

22 51Friday, November 14, 2003

1

1.0

5

4

3

2

1

Keep Out 40mil

Layout Note
H0013 pls close to

LAN_TD+22
LAN_TD-22

12

R388

49.9_0603_1%

C395

0.1U_0 402_16V4Z

2

10K

conn.

47K

+3V

1 3

LAN_RD+
LAN_RD-

LAN_TD+
LAN_TD-

Q10
DTA114YKA_SC59

1 2

300_0402_5%

1

C393

0.1U_0 402_16V4Z

2

R49

U38

1

RD+

2

RD-

3

CT

4

NC

5

NC

6

CT
TD+7TX+

8

TD-

H0013

RX+

RX-

TX-

CT
NC
NC
CT

16
15
14
13
12
11
10
9

75_0402_5%

RJ45_RX+
RJ45_RX-

RJ45_TX+
RJ45_TX-

12

12

R26

R27
75_0402_5%

RJ45_GND

LAYOUT NOTICE: T h is area do not
connect to power plan inc lude Vc c and
GND in any layer

+Amber_LED

+Amber_LED

+Green_LED

RJ45_GND

RJ45_RX-

RJ45_RX+
RJ45_TX­RJ45_TX+

R33

75_0402_5%

1 2

T=10mil

1 2

JP15

12

Amber LED+

11

Amber LED-

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

10

T=10mil

1000P_1206_2KV7K

Green LED-

9

Green LED+

R32
75_0402_5%

C24

1 2

1

C5

@0.1U_ 0402_16V4Z

2

Termination plane should be copled
to chassis ground and also depends
on safety concern

16

SHLD4

15

SHLD3

14

SHLD2

13

SHLD1

SANTA_130401-1

LANGND

1

C6
@4.7U_ 0805_10V4Z

2

D D

LAN_RD+22
LAN_RD-22

12

R387

49.9_0603_1%

1

2

C C

B B

Place as close to Magnetic ( U3)

ACTIVITY#

ACTIVITY#22

+3V

47K

Q12
DTA114YKA_SC59

10K

LINK10_100#

LINK10_100#22

A A

5

2

1 3

R61

1 2

300_0402_5%

+Green_LED

Compal Electronics, Ltd.

Title

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

3

2

RJ11/RJ45 Connector

Size Doc u m ent Number Re v

Custom

LA-2051

Date: Sheet of

23 51Friday, November 14, 2003

1

1.0

1

R516 @0_0402_5%

+3VS

1 1

2 2

3 3

4 4

PCI_AD[0..31]19,20 ,22,25,26,29

CLK_P CI_USB20

12

R243
@10_0402_5%

1

C221
@15P_0402_50V8J

2

PCI_C/BE#[0..3]19,20,2 2,25,26

PCI_AD23

CLK_P CI_USB2026

+3V

PM_CL KRUN#19,20 ,22,25,26,34,35

PM_CL KRUN#

PCI_REQ#325,26
PCI_REQ#425,26
PCI_GNT#325,26
PCI_GNT#425,26

1 2

R532 @0_0402_5%

1 2

+3V

PCI_AD[0..31]

PCI_C/BE#[0..3]

PCI_FRAME#19, 20,22,25,26

PCI_IRDY#19,20, 22,25,26

PCI_TRDY#19,20 ,22,25,26

PCI_STOP#19,20, 22,25,26

R241 @100_0402_5%

PCI_DE VSEL#19,20, 22,25,26

PCI_PERR#1 9,20,22,25,26

PCI_SERR#1 9,20,22,25,26
PCI_PIRQA#9,19, 20,26
PCI_PIRQC#22,25,26

PCI_PIRQD#22,25,26

USB20_PME#19,20,22,25,35

R510 @1.5K_0402_5%
R303 @1.5K_0402_5%
R511 @1.5K_0402_5%

R302 @0_0402_5%
R301 @0_0402_5%

PCI_REQ#3
PCI_REQ#4
PCI_GNT#3
PCI_GNT#4

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27 USB20_NEC_P0-_R
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0

PCI_PAR

PCI_PAR19,20, 22,25,26

PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_STOP#

1 2

PCI_DE VSEL#
PCI_REQ#
PCI_GNT#
PCI_PERR#
PCI_SERR#
PCI_PIRQA#
PCI_PIRQC#
PCI_PIRQD#
CLK_P CI_USB20

CBRST#20,21

USB_SMI#27

1 2
1 2
1 2

PCIRST#10,19 ,20,21,2 2,25,26,34,35

1 2
1 2

R493 @0_0402_5%

1 2

R494 @0_0402_5%

1 2

R495 @0_0402_5%

1 2

R496 @0_0402_5%

1 2

2

+3V +3V_USB20

P2

P3

H3

M4

C8

VDD

VDD_PCI

VDD_PCI

VDD_PCI

USB 2.0 CONTROLLER
uPD720101F1-EA8
FBGA144

VSS

VSS

VSS

VSS

VSS

VSS

VSS

B1

A2

B2

N1

P10

B14

N14

H14

@0.1U_0402_10V6K

A6
B6

C5

A5

C4

B5
A4

B4
C1
C2
D2
D1
D3

E1

E3

F2

J1

J2

K3

K1

L3

K2

L1

L2
M1
N3
M3
N4

P4
N5

P5
M5

C3

F1

J3
M2

J4

F3

F4
G1
G3

B3
G2
C6
D6
H2
H1
C7

B7

A7

A8

B8
D9

L6

L7

P6
M6

C9

N6

+3VS_ USBPCI

U27

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

CBE3#
CBE2#
CBE1#
CBE0#

PAR
FRAME#
IRDY#
TRDY#
STOP#
IDSEL
DEVSEL#
REQ0#
GNT0#
PERR#
SERR#
INTA#
INTB#
INTC#
PCLK
VBBRST#
PME#

SMI#
LEGC

N.C.
N.C

VCCRST#

CRUN#

PCI_REQ#
PCI_GNT#

3

R266 @10_0402_5%

1 2

@30Mhz 16pf 30ppm

Y3

1 2

1

P12

A13

A12

A3

E2

VDD

VDD

VDD

VDD

VDD

VSS

VSS

VSS

VSS

VSS

N2

L12

B13

N13

M11

C594

D7

N8

G12

L13

J13

H13

F13

D13

H4

N10

N12

VDD

VSS

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD

AVDD

AVDD

XT1/SCLK

XT2

RSDM1

DM1
DP1

RSDP1

RSDM2

DM2
DP2

RSDP2

RSDM3

DM3
DP3

RSDP3

RSDM4

DM4
DP4

RSDP4

RSDM5

DM5
DP5

RSDP5

RREF

AVSS(R)

OCI1
OCI2
OCI3
OCI4
OCI5

PPON1
PPON2
PPON3
PPON4
PPON5

NTEST1

SMC
AMC

TEB

TEST

NANDTEST

SRCLK
SRDTA

SRMOD

VSS

VSS

VSS

D12

H12

+3V +3V_USB20

VSS

VSS

VSS

D8

G4

J11

F11

1

C593

2

@0.1U_0402_10V6K

AVSS

AVSS

@UPD720101F1-EA8_FBGA144

P13

M12

@0.1U_0402_10V6K

1

1

C644

C623

2

2

@0.1U_0402_10V6K

@0.1U_0402_10V6K

1

2

@16P_0603_50V8J

L9
P8

M14

USB20 _NEC_P0-

M13

USB20 _NEC_P0+

L14

USB20 _NEC_P0+_R

K13

USB20_NEC_P1-_R

K14

USB20 _NEC_P1-

K12

USB20 _NEC_P1+

J14

USB20 _NEC_P1+_R

J12

USB20_NEC_P2-_R

H11

USB20 _NEC_P2-

G11

USB20 _NEC_P2+

G13

USB20 _NEC_P2+_R

G14

F12

USB20 _NEC_P3-

F14

USB20 _NEC_P3+

E12
E14

E13

USB20 _NEC_P4-

D14

USB20 _NEC_P4+

C13
C14

P11
N11

OVCUR_USB20#0

B12

OVCUR_USB20#1

B11
B10

OVCUR_USB20#3

A10

OVCUR_USB20#4

B9
C12

A11
C11
C10
A9

M8
M7

P7
N7
L8
M10

M9
N9
P9

1 2

1

C648

2

C242

+3V_USB20

@9.1K_0402_1%

12

R304

1 2

R315 @ 1.5K_0402_5%

1 2

R299 @ 1.5K_0402_5%

R300
@1.5K_0402_5%

@10U_0805_10V4Z

1

C295

C223

2

@10U_0805_10V4Z

@100_0402_5%

2

R530 @36_0603_1%

1 2

R524 @36_0603_1%

1 2

R525 @36_0603_1%

1 2

R508 @36_0603_1%

1 2

R509 @36_0603_1%

1 2

R507 @36_0603_1%

1 2

1

C293
@0.1U_0402_10V6K

2

1

C296
@0.1U_0402_10V6K

2

R245 @10K_0402_5%

1 2

R244 @10K_0402_5%

1 2

R305 @0_0603_5%

1

2

R551 @0_0603_5%

12

R273

OVCUR_USB20#0 31
OVCUR_USB20#1 31
OVCUR_USB20#2 31

+3V

U28

8

VCC

7

WC

6

SCL

5

SDA

@AT24C0 2N-10SC-2.7_SO8

+3V

1 2

C646

1 2

@0.1U_0402_10V6K

EXCLK_USB20 38

L

1

C286
@16P_0603_50V8J

2

R292 @0_0402_5%

@0.1U_0402_10V6K

1

C647

2

4

Note: PLACE CLOSE TO USB2.0 CONTROLLER
For NEC USB2.0 only .

1 2

USB20 _NEC_P0- 31

+3V

1

A0

2

A1

3

A2

4

GND

1

2

@10U_0805_10V4Z

USB20 _NEC_P0+ 31

USB20 _NEC_P1- 31
USB20 _NEC_P1+ 31

USB20 _NEC_P2- 31
USB20 _NEC_P2+ 31

1

C317

2

1

C655

2

USB20 _NEC_P0­USB20 _NEC_P0+

USB20 _NEC_P1­USB20 _NEC_P1+
USB20 _NEC_P2­USB20 _NEC_P2+

USB20 _NEC_P3­USB20 _NEC_P3+
USB20 _NEC_P4­USB20 _NEC_P4+

@0.1U_0402_10V6K

1

C654
@10U_0805_10V4Z

2

L

Note: PLACE CLOSE TO USB2.0 CONTROLLER
For NEC USB2.0 only .

R297 @15K_0402_5%

1 2

R298 @15K_0402_5%

1 2

1 8
2 7
3 6
4 5

@15K_1206_8P4R_5%

1 8
2 7
3 6
4 5

@15K_1206_8P4R_5%

5

RP83

RP66

Compa l Electronics, Inc.

Title

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS

1

2

MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

3

4

NEC uPD 72 01 01 - U SB2.0 Controller

Size Doc u m ent Number Re v

Date: Sheet of

LA-2051

24 51Friday, November 14, 2003

5

1.0

1

C253

2

1000P_0402_50V7K

1

C143

0.1U_0 402_16V4Z

2

1

C96

0.1U_0 402_16V4Z

2

+3VS_MINIPCI

+5VS_MINIPCI

1

2

1 2

+3V

CHB1608B121_0603

0.1U_0 402_16V4Z

C262
10U_0 805_10V4Z

12

WL_OFF#35
KILL_SW#35,37

L11

C259

CLK_PCI_MINI

R270
10_0402_5%

1

C252
18P_0402_50V8K

2

2

1

+3V

5

1

P

B

2

A

G

3

W=40mils

CLK_PCI_MINI26

2

C235

0.1U_0 402_16V4Z

1

PM_CL KRUN#19,20 ,22,24,26,34,35

+5VS_MINIPCI

+5VS_ MINIPCI

C202

1 2

0.1U_0 402_16V4Z

U20

4

Y

TC7SH08 FU_SSOP5

INTB#

PCI_PIRQD#22,24,26

PCI_REQ#324,26

PCI_C/BE#319,20, 22,24,26

PCI_C/BE#219,20, 22,24,26

PCI_IRDY#19,20, 22,24,26

PCI_SERR#19 ,20,22,24,26

PCI_C/BE#119,20, 22,24,26

AD18 REQ#3/GNT#3 PCI_ PIRQC#

TIP RING

LAN RESERVED

RB751 V_SOD323

D23

21

PCI_PIRQD#

PCI_AD31
PCI_AD29

PCI_AD27
PCI_AD25

PCI_AD21
PCI_AD19

PCI_AD17

PCI_AD12
PCI_AD10

PCI_AD8
PCI_AD7

PCI_AD5
PCI_AD3

W=30mils

PCI_AD1

W=30mils W=20mils

1 2

L5 0_0603_5%

MINI_PCI SOCKET

JP19

2

112

KEY KEY

4

334

6

556

8

778

10

9910

12

111112

14

131314

16

151516

18

171718

20

191920

22

212122

24

232324

26

252526

28

272728

30

292930

32

313132

34

333334

36

353536

38

373738

40

393940

42

414142

44

434344

46

454546

48

474748

50

494950

52

515152

54

535354

56

555556

58

575758

60

595960

62

616162

64

636364

66

656566

68

676768

70

696970

72

717172

74

737374

76

757576

78

777778

80

797980

82

818182

84

838384

86

858586

88

878788

90

898990

92

919192

94

939394

96

959596

98

979798

100

9999100

101

102

101

102

103

104

103

104

105

106

105

106

107

108

107

108

109

110

109

110

111

112

111

112

113

114

113

114

115

116

115

116

117

118

117

118

119

120

119

120

121

122

121

122

123

124

123

124

KEYLINK _5305-4-211

LAN RESERVED

PCI_PIRQC#

W=40mils

MINI_RST#

PCI_AD30
PCI_AD28

PCI_AD26
PCI_AD24

MINI_IDSELPCI_AD23

PCI_AD22
PCI_AD20

PCI_AD18
PCI_AD16

PCI_AD15PCI_AD14
PCI_AD13
PCI_AD11

PCI_AD9

PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

2

C100

0.1U_0 402_16V4Z

1

W=30mils

+3V+5VS

+5VS_MINIPCI
PCI_P IRQC# 2 2,24,26

PCI_GNT#4 24,26PCI_REQ#424,26

+3V

PCIRST# 10, 19,20,2 1,22,24,26,34,35
PCI_GNT#3 24,26
WLANPME# 19,2 0,22,24,35

PCI_AD18

1 2

100_0402_5%

R232

PCI_PA R 19 ,20,22,24,26

PCI_FRA ME# 19, 20,22,24,26
PCI_ TRDY# 1 9,20,22,24,26
PCI_STOP# 19,20 ,22,24,26

PCI_DE VSEL# 19, 2 0,22,24,26PCI_PERR#19 ,20,22,24,26

PCI_C/B E#0 19 ,20,22,24,26

PCI_AD[0..31]

PCI_AD [0..31] 19,2 0,22,24,26,29

W=40mils

C238

0.1U_0 402_16V4Z

2

1

+3VS_MINIPCI

L14

1 2

CHB1608B121_0603

2

C234

0.1U_0 402_16V4Z

1

0.1U_0 402_16V4Z

+3V

+3VS_ MINIPCI

1

C186

1

C152

2

10U_0805_10V4Z

2

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS
MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

Compal Electronics, Ltd.

Title

Mini PCI Slot

Size Doc u m ent Number Re v

Custom

LA-2051

Date: Sheet of

25 51Friday, November 14, 2003

1.0

5

+CPU_CORE

3 1

+CPU_CORE

3 1

12

R502
10K_0402_5%

H_INIT#
H_A20M#
H_SLP#
H_INTR
H_NMI
H_SMI#
H_STPCLK#
H_IGNNE#

12

5

12

R559
470_0402_5%

2

12

R558
@470_0402_5%

2

R233
20M_0603_5%

A_AD[0..31]
A_CBE #[0..3]

+3VS

12

R499
330_0402_5%

H_CPUFERR#

+3VS

12

330_0402_5%

CPURSTIN#

A_SERR#

12

+3VS

12

R522

4.7K_0402_5%

R486 200_0402_5%

1 2

R402 200_0402_5%

1 2

R395 200_0402_5%

1 2

R396 200_0402_5%

1 2

R400 200_0402_5%

1 2

R397 200_0402_5%

1 2

R398 200_0402_5%

1 2

R399 200_0402_5%

1 2

100K_0402_5%

PM_DPRSLPVR47

CLK_1 4M_APIC16

12
12
12
12
12
12
12
12

PULL DOWN FOR S3

R501

12

1

2

+CPU_CORE

R487

1 2

R492 0_0402_5%

1 2

0.1U_0402_10V6K

A_AD[0..31]9,12

A_CBE #[0..3]9,12

D D

Q50 MMBT3904_SOT23

H_FERR#5

Q49 @MMBT3904_SOT23

H_RESET#5,7

+3VS

R513 8.2K_0402_5%

+3VS

C C

PM_STPCPU#

PCI_STP#

2

Y4

NC3NC

32.768KHZ_12.5P_1TJS125DJ2A073

OUT4IN

1

RTCX1

RTCX2

B B

R228

1 2

20M_0603_5%

1

C521

2

12P_0402_50V8K

A A

1

C534

12P_0402_50V8K

2

H_SLP#

C707 180P_0603_50V8J

H_SMI#

C708 180P_0603_50V8J

H_STPCLK#

C709 180P_0603_50V8J

H_IGNNE#

C710 180P_0603_50V8J

H_A20M#

C406 180P_0603_50V8J

H_INIT#

C402 180P_0603_50V8J

H_INTR

C403 180P_0603_50V8J

H_NMI

PLACE CLOSE TO CPU SOCKET

C405 180P_0603_50V8J

4

A_ACAT#9

A_END#9

A_PAR9,12

A_OFF#9

H_INTR5

H_NMI5

H_INIT#5

H_SMI#5

H_SLP#5

H_A20M#5

PCI_RST#

12

U19A

4

CLK_A LINK_SB

NBRST#
A_AD0

A_AD1
A_AD2
A_AD3
A_AD4
A_AD5
A_AD6
A_AD7
A_AD8
A_AD9
A_AD10
A_AD11
A_AD12
A_AD13
A_AD14
A_AD15
A_AD16
A_AD17
A_AD18
A_AD19
A_AD20
A_AD21
A_AD22
A_AD23
A_AD24
A_AD25
A_AD26
A_AD27
A_AD28
A_AD29
A_AD30
A_AD31
A_CBE#0
A_CBE#1
A_CBE#2
A_CBE#3
A_STROBE#
A_DEVSEL#
A_ACAT#
A_END#
A_PAR
A_OFF#
A_SERR#
A_SBREQ#
A_SBGNT#

PM_STPCPU#
PCI_STP#

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

RTCX1

RTCX2

CPURSTIN#

H_A20M#
H_CPUFERR#

GPIO0
SB_AP IC_D0

SB_AP IC_D1

+3VALW

14

U12E

P

11

O10I

G

7

SN74LVC14APWLE_TSSOP14

+3VALW +3VALW

14

P

1

O2I

G

7

CLK_A LINK_SB16

R503 8.2K_0402_5%

1 2

CLK_A LINK_SB

12

R512
@10_0402_5%

1

C624
@15P_0402_50V8J

2

CLK_1 4M_APIC

R481
@10_0402_5%

C573
@15P_0402_50V8J

A_STROBE#9

A_DEVSEL#9

A_SBREQ#9
A_SBGNT#9

PM_STPCPU#5,10, 16,47

PCI_STP#16
PCI_PIRQA#9,19, 20,24
PCI_PIRQC#22,24,25

PCI_PIRQD#22,24,25

H_PWRGD5

H_IGNNE#5

H_STPCLK#5

R498 10K_0402_5%

1 2

R491 10K_0402_5%

1 2

R489 @300_0402_1%

1 2

R490 1K_0402_1%

1 2

1

C101

2

R119

10K_0402_5%

NBRST# NB_RST#

SN74LVC14APWLE_TSSOP14

U23A

B22

PCICLKF

R22

A_RST#

H22

A_AD0

P23

A_AD1

L23

A_AD2

N23

A_AD3

N22

A_AD4

M23

A_AD5

M22

A_AD6

K22

A_AD7

M21

A_AD8

M20

A_AD9

L21

A_AD10

K21

A_AD11

L20

A_AD12

N21

A_AD13

K23

A_AD14

K20

A_AD15

F23

A_AD16

G21

A_AD17

F20

A_AD18

H21

A_AD19

F22

A_AD20

F21

A_AD21

G20

A_AD22

E21

A_AD23

E20

A_AD24

D23

A_AD25

D22

A_AD26

E22

A_AD27

D20

A_AD28

C23

A_AD29

D21

A_AD30

C22

A_AD31

L22

A_CBE#0

J23

A_CBE#1

G22

A_CBE#2

E23

A_CBE#3

H20

A_STROBE#

J21

A_DEVSEL#

G23

A_ACAT#

H23

A_END#

J20

A_PAR

J22

A_OFF#

P22

A_SERR#

B21

A_SBREQ#

B20

A_SBGNT#

N20

CPU_STP#/DPSLP#

R23

PCI_STP#

C20

A_INTA#

P20

INTB#

B23

INTC#

P21

INTD#

AC12

X1

AC11

X2

B18

CPURSTIN#

E4

CPU_PWRGD

B17

INTR/LINT0

B16

NMI/LINT1

C17

INIT

C16

SMI#

F19

SLP#

D17

IGNNE#

D18

A20M#

E19

FERR#

E16

STPCLK#

E17

SSMUXSEL/GPIO0

E18

DPRSLPVR

C19

APIC_D0

C18

APIC_D1

B19

APIC_CLK

South bridge SB200

13

14

U19B

P

3

O4I

G

SN74LVC14APWLE_TSSOP14

7

SB200 SB

Part 1 of 3

A-LINK INTERFACE

XTAL

CPU

14

U12F

P

PCIRST#

O12I

G

SN74LVC14APWLE_TSSOP14

7

3

Layout note:

Trace length of PCI_CLK_R + PCI_CLK_FB should
be less than 200 mils.

PCI_1394

R240 33_0402_5%

PCI_LAN
PCI_PCM
PCI_MINI
PCI_EC
PCI_SIO
PCI_US B20
PCI_CLK_R
PCI_CLK_FB

PCI_RST#
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
PCI_FRAME#
PCI_DE VSEL#
PCI_IRDY#
PCI_TRDY#
PCI_PAR
PCI_STOP#
PCI_PERR#
PCI_SERR#
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4
PM_CL KRUN#

GPIO1

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_DRQ#0
LPC_DRQ#1

SIRQ

OVCUR#5
OVCUR#4

+SB_VBAT

1 2

R480 33_0402_5%

1 2

R235 33_0402_5%

1 2

R242 39_0402_5%

1 2

R246 33_0402_5%

1 2

R260 33_0402_5%

1 2

R478 33_0402_5%

1 2

R267 33_0402_5%

1 2

1U_0603_10V6K

B15

PCICLK0

D16

PCICLK1

A14

PCICLK2

A15

PCICLK3

A16

PCICLK4

A17

PCICLK5

D15

PCICLK6

A18

PCICLK7

A19

PCICLK_FB

PCI CLKS

C15

PCIRST#

B1

AD0/ROMA18

C1

AD1/ROMA17

A1

AD2/ROMA16

D2

AD3/ROMA15

B2

AD4/ROMA14

C2

AD5/ROMA13

A2

AD6/ROMA12

D3

AD7/ROMA11

C3

AD8/ROMA9

A3

AD9/ROMA8

D4

AD10/ROMA7

B4

AD11/ROMA6

C4

AD12/ROMA5

A4

AD13/ROMA4

D5

AD14/ROMA3

B5

AD15/ROMA2

C8

AD16/ROMD0

D8

AD17/ROMD1

B8

AD18/ROMD2

A8

AD19/ROMD3

C9

AD20/ROMD4

D9

AD21/ROMD5

B9

AD22/ROMD6

A9

AD23/ROMD7

C10

AD24/RTC_AD7

B10

AD25/RTC_AD6

D11

AD26/RTC_AD5

A10

AD27/RTC_AD4

C11

AD28/RTC_AD3

B11

AD29/RTC_AD2

D12

AD30/RTC_AD1

A11

AD31/RTC_AD0

B3

CBE#0/ROMA10

C5

CBE#1/ROMA1

A7

CBE#2/ROMWE#
CBE#3/RTC_RD#

FRAME#

DEVSEL#/ROMA0

IRDY#

TRDY#/ROMOE#

STOP#
PERR#
SERR#
REQ#0
REQ#1
REQ#2

GNT#0
GNT#1
GNT#2

CLKRUN#

GPIO1/ROMCS#

LFRAME#

LDRQ#0
LDRQ#1

SERIRQ

USBOC5#/GPM1

RTC_GND

D10
B7
A6
C7
D7
A5

PAR

B6
C6
D6
B12
C12
D13
A12
C13
A13
B13
C14
D14
B14
A20

AB5

Y14

LAD0

AA14

LAD1

AB14

LAD2

AA13

LAD3

AB13
AC14
Y13

AC13

AA2
AB7
AB8
AC8
AC10

VBAT

AB11

PCI INTERFACE

REQ#3/PDMAREQ0#

REQ#4/PLLBP33/PDMAREQ1#

GNT#3/PDMAGNT0#

GNT#4/PLLBP50/PDMAGNT1#

LPC

RTC_ALE/USBOC4#/GPIO3

RTC_WR#/RTC_CLKOUT

RTC_CS#/USBOC3#/GPIO2

RTC

PCIRST# 10,1 9,20,21, 22,24,25,34,35

NB_RST# 7, 30,34,35

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS
MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

3

2

C239 22P_0402_50V8J

PCI_AD[0..31]

PCI_C/BE#[0..3]

PCI_FRA ME# 19, 20,22,24,25
PCI_DE VSEL# 19, 2 0,22,24,25
PCI_ IRDY# 19,20 ,22,24,25
PCI_ TRDY# 1 9,20,22,24,25
PCI_PA R 19,20 ,22,24,25
PCI_STOP# 19,20 ,22,24,25
PCI_PE RR# 19, 20,22,24,25
PCI_SE RR# 19, 20,22,24,25
PCI_REQ#0 19
PCI_REQ#1 22
PCI_REQ#2 20
PCI_RE Q#3 24,25
PCI_RE Q#4 24,25
PCI_GNT#0 19
PCI_GNT#1 22
PCI_GNT#2 20
PCI_GNT#3 24,25
PCI_GNT#4 24,25
PM_CL KRUN# 19, 20,22,24,25,34,35

LPC_AD0 34,35
LPC_AD1 34,35
LPC_AD2 34,35
LPC_AD3 34,35
LPC_FRAME# 34,35
LPC_D RQ#0 35
LPC_D RQ#1 34

SERIR Q 20,34,35

OVCUR#3 31

1 2

PCI_AD [0..31] 19,2 0,22,24,25,29

PCI_C/B E#[0..3] 19, 20,22,24,25

R450
10K_0402_5%

1 2

+SB_VBAT

R622

1

C711

2

2

CLK_P CI_1394 19
CLK_P CI_LAN 22
CLK_PCI_CB 20
CLK_PCI_MINI 25
CLK_PCI_EC 35
CLK_PCI_SIO 34
CLK_P CI_USB20 24

13

D

2

G

S

1 2

200_0402_5%

W=20mils

1

PCI_DE VSEL#

4 5

PCI_TRDY#

3 6

PCI_IRDY#

2 7

PCI_FRAME#

1 8

8.2K _ 8P4R_0804_5%

PCI_STOP#

4 5

PCI_PERR#

3 6

PCI_SERR#

2 7

PCI_PAR

1 8

8.2K _ 8P4R_0804_5%

PCI_PIRQA#

4 5

PCI_PIRQB#

3 6

PCI_PIRQC#

2 7

PCI_PIRQD#

1 8

8.2K _ 8P4R_0804_5%

PCI_REQ#1

4 5

PCI_REQ#2

3 6

PCI_REQ#0

2 7

PCI_REQ#3

1 8

8.2K _ 8P4R_0804_5%

PCI_GNT#1

4 5

PCI_GNT#3

3 6

PCI_GNT#0

2 7

PCI_GNT#2

1 8

8.2K _ 8P4R_0804_5%

PCI_REQ#4

PCI_GNT#4

LPC_AD0

4 5

LPC_AD1

3 6

LPC_AD3

2 7

LPC_AD2

1 8

SIRQ
LPC_DRQ#0
LPC_FRAME#
LPC_DRQ#1

R453

PM_CL KRUN#

12

@4.7K_0402_5%

GPIO0

H_PROC HOT# 5,46

Q43
@2N7002_SOT23

1 2

Title

Size Doc u m ent Number Re v

Date: Sheet of

OVCUR#4

OVCUR#5

OVCUR#3

+RTCVCC

R589

1 2

200_0402_5%

JOPEN1

No short

Compa l Electronics, Inc.

SB200M( 1 / 4)- PCI/CPU/LPC

RP69

1 8
2 7
3 6
4 5

R454 4.7K_0402_5%

R482 10K_0402_5%

R456 10K_0402_5%

R443 10K_0402_5%

1 2

R627 10K_0402_5%

1 2

LA-2051

1

12

12

12

+3VS

RP17

RP14

RP75

RP21

RP22

R476

1 2

8.2K_0402_5%
R477

1 2

8.2K_0402_5%
RP72

100K_1206_8P4R_5%

10K_1206_8P4R_5%

+3V

26 51Friday, November 14, 2003

1.0

+3V

1

C723

D D

@0.1U_ 0402_16V4Z

2

L

C C

12

1

2

RP47

1 8
2 7
3 6
4 5

RP46

1 8
2 7
3 6
4 5

RP45

4 5
3 6
2 7
1 8

B B

A A

+5VS

5

12

R616
@10K_0603

X5

4

OUT

VDD

1

GND

OE

@48MHZ _4P_FN4800002

Note: Place close
to U3 (ATI SB)
For ATI USB2.0 only .

CLK_USB_48M_R

12

R441
@10_0402_5%

1

C453
@15P_0402_50V8J

2

IAC_BITCLK

R177
@10_0402_5%

C133
@15P_0402_50V8J

15K_1206_8P4R_5%

15K_1206_8P4R_5%

15K_1206_8P4R_5%

CPU_GHI#5

R178 1K_0402_5%

1 2

5

CLK_SB_48M16

3
2

USB20P3+31

USB20P3-31

USB20P2+31

USB20P2-31

USB20P1+31

USB20P1-31

CLK_SB_14M

12

R521
@10_0402_5%

1

C636
@15P_0402_50V8J

2

USB20P5­USB20P5+
USB20P4­USB20P4+

USB20P3­USB20P3+
USB20P2­USB20P2+

USB20P1+
USB20P1­USB20P0+
USB20P0-

R464 100K_0402_5%

1 2

R433 10K_0402_5%

AGP_STP#9

D49

2 1

RB751V_SOD323

Q44 2N7002_SOT23

D

S

1 3

G

2

CLK_SB_48M

12.4K_0603_1%

+3V

+3V

+3V

12

D50 R B751V_SOD323

2 1

12

@10K_0402_5%

R449

R444
33_0402_5%

1 2

AGP_BUSY#AGP_BUSY#_R

1 2

R614
0_0402_5%

1 2

R615
@0_0402_5%

EC_RSMRST#35

32KHZ_ S5_OUT29

AGP_BUSY# 9

4

CLK_USB_48M_R

USB_R COMP

R430

1 2

R462 10K_0402_5%

12

MII_TXD329
MII_TXD229
MII_TXD129
MII_TXD029

MII_TXEN29

R455 10K_0402_5%

12

R447 10K_0402_5%

12
SB_EEDO29
SB_EECLK29

EC_RSMRST#

CLK_SB_14M16

R442 10K_0402_5%

FLASH#36

OVCUR#231
OVCUR#131

CLK_SB_14M

12

FLASH#
OVCUR#2
32KHZ_ S5_OUT
OVCUR#1
SB_SPKR

SB_SPKR33

AGP_STP#_RAGP_STP#

AGP_BUSY#_R
GHI

PIDERST#30
SIDERST#30

4

USB20P5+

M2
M1

USB20P5-

USB20P4+
USB20P4-

M4

M3

USB20P3+
USB20P3-

USB20P2+
USB20P2-

USB20P1+

G3

USB20P1-

USB20P0+
USB20P0-

G1

G2

W1

W4

W2

W3

AB9
A23

W6

AB2
AA3

W11

AB1
AA1

AC1
AC6
AC2
AC3
AC4
AC5

VTT_PWRGD 16,17

U23B

P3

USBCLK/CLK48

R1

USB_RCOMP

P1

USB_VREFOUT

N4

USB_ATEST1

N3

USB_ATEST0

P4

USBOC0#/GPM7
USB_HSDP5+

USB_FLDP5+

N2

USB_HSDM5-

N1

USB_FLDM5-

L4

USB_HSDP4+

L3

USB_FLDP4+
USB_HSDM4­USB_FLDM4-

K2

USB_HSDP3+

K1

USB_FLDP3+

L2

USB_HSDM3-

L1

USB_FLDM3-

H2

USB_HSDP2+

H1

USB_FLDP2+

J2

USB_HSDM2-

J1

USB_FLDM2­USB_HSDP1+

J3

USB_FLDP1+

H3

USB_HSDM1-

K3

USB_FLDM1-

F1

USB_HSDP0+

F2

USB_FLDP0+
USB_HSDM0­USB_FLDM0-

R5

MCOL
MCRS

V4

MDCK

V2

MDIO

T1

RX_CLK

T3

RXD3

U2

RXD2

T5

RXD1
RXD0

T2

RX_DV

U1

RX_ERR

T4

TX_CLK

U4

TXD3

V1

TXD2

U3

TXD1

V3

TXD0
TX_EN

PHY_PD

U5

PHY_RST#

Y7

CLK_25M

P2

EE_CS

R3

EE_DI

R2

EE_DO

R4

EE_CK
RSMRST#
OSC_IN
SIO_CLK

BLINK/GPM0
FANOUT1/USBOC2#/GPM2
32KHZ_IN/GPM3
USBOC1#/GPM4

Y4

SPEAKER/GPM5
FANOUT0/GPM6

GPIO_X0/AGP_STP#
GPIO_X1/AGP_BUSY#
GPIO_X2/GHI#
GPIO_X3/VGATE
GPIO_X4
GPIO_X5

South bridge SB200

SB200 SB

Part 2 of 3

USB INTERFACE

ETHERNET MIIEEPROMCLK / RST

GPIOGPIO_XTRA

3

SB_EC_THERM#

TALERT#/ETH_TALERT#

PME#/EXT_EVNT0#

GA20_IN/GEVNT0#

KB_RST#/GEVNT1#

SMB_ALERT#/GEVNT2#

LPC_PME#/GEVNT3#

LPC_SMI#/GEVNT4#
GEVENT5#/ETH_VALERT#
GEVENT6#/ETH_FALERT#

ACPI / WAKE UP EVENTS

GEVENT7#/ETH_CALERT#

RTC_IRQ#/PWR_STRP

PRIMARY ATA 66/100

SECONDARY ATA 66/100

AC97

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

AB4

SB_PM_BATLOW#

AC9
AC7

RI#/EXT_EVNT1#

PWR_BTN#

PWR_GOOD

PCI_REQACT#

SUS_STAT#

GPOC0#/SCL0
GPOC1#/SDA0
GPOC2#/SCL1
GPOC3#/SDA1

PIDE_IORDY

PIDE_DACK#

PIDE_DRQ
PIDE_IOR#
PIDE_IOW#
PIDE_CS1#
PIDE_CS3#

PIDE_D10
PIDE_D11
PIDE_D12
PIDE_D13
PIDE_D14
PIDE_D15

SIDE_IORDY

SIDE_DACK#

SIDE_DRQ
SIDE_IOR#
SIDE_IOW#
SIDE_CS1#
SIDE_CS3#

SIDE_D10
SIDE_D11
SIDE_D12
SIDE_D13
SIDE_D14
SIDE_D15

AC_BITCLK
AC_SDOUT

AC_SDIN0

AC_SDIN1

AC_SDIN2

AC_SYNC

SPDIF_OUT

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS
MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

SLP_S3#
SLP_S5#

TEST1
TEST0

PIDE_IRQ

PIDE_A0
PIDE_A1
PIDE_A2

PIDE_D0
PIDE_D1
PIDE_D2
PIDE_D3
PIDE_D4
PIDE_D5
PIDE_D6
PIDE_D7
PIDE_D8
PIDE_D9

SIDE_IRQ

SIDE_A0
SIDE_A1
SIDE_A2

SIDE_D0
SIDE_D1
SIDE_D2
SIDE_D3
SIDE_D4
SIDE_D5
SIDE_D6
SIDE_D7
SIDE_D8
SIDE_D9

AC_RST#

3

AA11
AB10
AA10
Y11
C21
Y10
AA5
AA6

Y5
AA4
AB3
Y6
W5
Y8
AA7
AB6

AA12
W12
Y12
AB12
AA8

AB17
AC16
AB15
AB16
AC15
Y16
AA17
AA16
AC17
Y15
AA15

AC18
AA18
AC19
AA19
AC20
AA20
AC21
AB21
AA21
Y20
AB20
Y19
AB19
Y18
AB18
Y17

AA23
AA22
AC23
Y21
AB23
Y22
W21
Y23
W20
AC22
AB22

W23
V21
V23
U21
U23
T21
T23
R21
R20
T22
T20
U22
U20
V22
V20
W22

E1
E2
Y1
Y2
Y3
E3
V5
E5

PM_SLP_S3#
PM_SLP_S5#
PBTN_OUT#
SB_PWRGD
PCI_ACT_REQ#
SUS_STAT#
SB_TEST1
SB_TEST0

SB_GA20
SB_KBRST#
SB_AC_IN
SB_EC_SWI#

SB_EC_SMI#
SB_SCI#
SB_LID _OUT#

SMB_CK_CLK2
SMB_CK_DAT2
SMB_CK_CLK2_SB
SMB_CK_DAT2_SB
PWR _STRP

IDE_PDIORDY
INT_IRQ14
IDE_PDA0
IDE_PDA1
IDE_PDA2
IDE_PDDACK#
IDE_PDDREQ
IDE_PDIOR#
IDE_PDIOW#
IDE_PDCS1#
IDE_PDCS3#

IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15

IDE_SDIORDY
INT_IRQ15
IDE_SDA0
IDE_SDA1
IDE_SDA2
IDE_SDDACK#
IDE_SDDREQ
IDE_SDIOR#
IDE_SDIOW#
IDE_SDCS1#
IDE_SDCS3#

IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15

PM_SLP_S3# 35
PM_SLP_S5# 35
PBTN_OUT# 35
SB_PWRGD 17

SUS_STAT# 7

SMCLK 13,14,16
SMDATA 13,1 4,16

PWR _STRP 29
IDE_PDIORDY 30

INT_IRQ14 30
IDE_PDA0 30
IDE_PDA1 30
IDE_PDA2 30
IDE_PDDACK# 30
IDE_PDDREQ 30
IDE_PDIOR# 30
IDE_PDIOW# 30
IDE_PD CS1# 30
IDE_PD CS3# 30

IDE_PDD[0..15] 30

IDE_SDIORDY 30
INT_IRQ15 30
IDE_SDA0 30
IDE_SDA1 30
IDE_SDA2 30
IDE_SDDACK# 30
IDE_SDDREQ 30
IDE_SDIOR# 30
IDE_SDIOW# 30
IDE_SD CS1# 30
IDE_SD CS3# 30

IDE_SDD[0..15] 30

R440 33_0402_5%

1 2

R445 33_0402_5%

1 2

2

SB_EC_THERM#
SB_PM_BATLOW#
SB_EC_SWI#
SB_GA20 GATEA20
SB_KBRST#

SB_EC_SMI#
SB_SCI# EC_SCI#

LPC_SMI# USB_SMI#LPC_SMI#

IAC_BITCLK
IAC_SDATAO
IAC_SDATAI0
IAC_SDATAI1
IAC_SDATAI2
IAC_SYNC
IAC_RST#
SPDIF_OUT

2

D16 R B751V_SOD323
D41 R B751V_SOD323
D48 R B751V_SOD323
D42 R B751V_SOD323
D18 R B751V_SOD323
D17 R B751V_SOD323
D46 R B751V_SOD323
D47 R B751V_SOD323
D43 R B751V_SOD323
R479 @0_0603_5%

R472 10K_0402_5%

1 2

IAC_BITC LK 32
IAC_SD ATAO 29,32
IAC_SD ATAI0 32
IAC_SD ATAI1 32

IAC_ SYNC 29,32
IAC_RST# 32
SPDIF_OUT 29

1

2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
1 2

Title

Size Doc u m ent Number Re v

Date: Sheet of

EC_THERM#
PM_BATLOW#
EC_SWI#

KBRST#

ACINSB_AC_IN

EC_SMI#

LID_OUT#S B_LID_OUT#

SUS_STAT#

R471 4.7K_0402_5%

1 2

LPC_SMI#
SB_EC_SWI#
SB_GA20
PCI_ACT_REQ#

SB_EC_SMI#
SB_SCI#

SB_KBRST#
SB_EC_THERM#

SB_LID _OUT#
AGP_BUSY#_R
SB_PM_BATLOW#

SB_AC_IN
GHI
AGP_STP#_R

PM_SLP_S5#
PBTN_OUT#
PM_SLP_S3#

SMB_CK_DAT2_SB
SMB_CK_CLK2
SMB_CK_CLK2_SB
SMB_CK_DAT2

IAC_RST#

AGP_STP#
AGP_BUSY#
SB_TEST1
SB_TEST0

IAC_BITCLK
IAC_SDATAI2
IAC_SDATAI1
IAC_SDATAI0

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

2.2K_ 1206_8P4R_5%

R451 8.2 K_0402_5%

1 2

1 8
2 7
3 6
4 5

RP57 8.2 K_1206_8P4R_5%

1 8
2 7
3 6
4 5

RP49 8.2 K_1206_8P4R_5%

Compa l Electronics, Inc.

SB200M(2/4) - IDE/USB/MII

LA-2051

1

EC_THERM# 35
PM_BATLOW# 35
EC_SWI# 35
GATEA20 35
KBRST# 35
ACIN 3 5,37,41
EC_SMI# 35
EC_SCI# 35
EC_LID _OUT# 35

USB_SMI# 24

RP50

10K_1206_8P4R_5%
RP48

10K_1206_8P4R_5%
RP53

10K_1206_8P4R_5%
RP51

10K_1206_8P4R_5%

RP63

10K_1206_8P4R_5%

RP65

27 51Friday, November 14, 2003

+2.5V

+3V

+3VALW

+3VS

+3V

+3VS

1.0

5

4

3

2

1

+3VS +3VS

1

22U_1 206_16V4Z_V1

22U_1 206_16V4Z_V1

C579

2

+2.5VS

1

C574

2

+2.5V

1

C546

2

D D

C C

22U_1 206_16V4Z_V1

1

C613

C584

2

0.1U_0402_10V6K

22U_1 206_16V4Z_V1

0.1U_0402_10V6K

1

C560

C561

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

1

C472

C544

2

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

1

C614

2

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

1

C542

2

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C545

2

0.1U_0402_10V6K

1

C583

2

1

C526

C501

2

0.1U_0402_10V6K

1

C532

0.1U_0402_10V6K

2

1

C582

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C502

2

0.1U_0402_10V6K

1

C604

2

1

C504

2

0.1U_0402_10V6K

1

C603

2

0.1U_0402_10V6K

1

2

0.1U_0402_10V6K

1

C599

C598

2

1

C503

0.1U_0402_10V6K

2

1

1

C597

2

2

0.1U_0402_10V6K

@0.01U _0402_16V7Z

ATI request

+3V

0.1U_0402_10V6K

0.1U_0402_10V6K

1

1

C499

2

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

1

C458

2

2

0.1U_0402_10V6K

1

C479

2

1

C460

0.1U_0402_10V6K

2

1

C459

C452

2

0.1U_0402_10V6K

1

C626

0.1U_0402_10V6K

2

1

C468

0.1U_0402_10V6K

2

0.1U_0402_10V6K

1

1

C451

2

2

1

C443

0.1U_0402_10V6K

2

22U_1 206_16V4Z_V1

L47

1 2

+3V

MVB20 12301YZT_0805

B B

L48

1 2

+3V

MVB20 12301YZT_0805

22U_1 206_16V4Z_V1

L49

1 2

+2.5VS

MVB20 12301YZT_0805

A A

2

+3V_AVDDC

1

2

+3V_AVDDUSB

0.1U_0402_10V6K

1

C484

2

+2.5V _AVDDCK

1

2

C488
1U_0603_10V6K

C444

C643
1U_0603_10V6K

1

C473

C480

C512

@0.1U_0402_16V7K

@10U_0805_10V6K

@22U_1 206_16V4Z_V1

+3V

1

1

C511
@0.1U_0402_16V7K

2

2

ATI request

+3V_A VDDC

1

C485

2

ATI request

+3V_AVDDUSB

1

+

C125

@47U_B_6.3VM

2

ATI request

+2.5V _AVDDCK

1

C268

2

0.1U_0402_10V6K

1

C559

C596

2

0.1U_0402_10V6K

+3VS

C611

C543

@0.01U _0402_16V7Z

@0.1U_0402_16V7K

0.1U_0402_10V6K

1

1

C533

2

2

0.1U_0402_10V6K

1

C612

2

@0.01U _0402_16V7Z

+2.5VS

@0.01U _0402_16V7Z

1

C527

2

+2.5V

1

C471

2

0.1U_0402_10V6K

1

1

C494

C520

2

2

ATI request

@0.01U _0402_16V7Z

1

1

1

C493

C519

2

2

2

@0.01U _0402_16V7Z

ATI request

1

1

C563

2

2

@0.01U _0402_16V7Z

ATI request
CLOSE TO
L6,H6,J6

1

C470

2

@0.1U_0402_16V7K

+3VS

D19

2 1

RB751 V_SOD323

1U_0603_10V6K

1

C478

0.1U_0402_10V6K

2

1

C477
@0.01U _0402_16V7Z

2

1

C562
@0.01U _0402_16V7Z

2

1

C469

0.1U_0402_16V7K

2

+5VS

12

1

C142

2

R432
100_0402_5%

+3V_A VDDC

+3V_AVDDUSB

+2.5VS

+5VS_VREF

+2.5V _AVDDCK

+2.5VALW

+3VALW

0.1U_0402_10V6K

+2.5VS

+2.5V

+3V

1

C500

2

W17
W18

W13

W10

1

C491

0.1U_0402_10V6K

2

U23C

E11

VDDQ

E12

VDDQ

E15

VDDQ

E7

VDDQ

E8

VDDQ

F11

VDDQ

F12

VDDQ

F15

VDDQ

F16

VDDQ

F17

VDDQ

F7

VDDQ

F8

VDDQ

G18

VDDQ

G19

VDDQ

H18

VDDQ

H19

VDDQ

M18

VDDQ

M19

VDDQ

N18

VDDQ

N19

VDDQ

T18

VDDQ

T19

VDDQ

U18

VDDQ

U19

VDDQ

V17

VDDQ

V18

VDDQ
VDDQ
VDDQ

J10

VDD_CORE

J11

VDD_CORE

J13

VDD_CORE

J14

VDD_CORE

K15

VDD_CORE

K9

VDD_CORE

L15

VDD_CORE

L9

VDD_CORE

N15

VDD_CORE

N9

VDD_CORE

P15

VDD_CORE

P9

VDD_CORE

R10

VDD_CORE

R11

VDD_CORE

R13

VDD_CORE

R14

VDD_CORE

P6

STB_2.5V

R6

STB_2.5V

V13

STB_2.5V
STB_2.5V

V12

STB_2.5V

L6

VDD_USB

H6

VDD_USB

J6

VDD_USB

P5

AVDDC

T6

STB_3.3V

U6

STB_3.3V

V9

STB_3.3V

V10

STB_3.3V

V11

STB_3.3V

W9

STB_3.3V
STB_3.3V

F4

AVDDTX0

J4

AVDDTX1

K5

AVDDTX2

F3

AVDDRX0

K4

AVDDRX1

L5

AVDDRX2

D19

VREF_CPU

D1

5V_VREF

A21

AVDD_CK

Y9

S5_2.5V

AA9

S5_3.3V

South bridge SB200

SB200 SB

Part 3 of 3

POWER

VSS_USB
VSS_USB

AVSSC

AVSSRX2
AVSSRX1
AVSSRX0
AVSSTX2
AVSSTX1
AVSSTX0

AVSSCK

E10

VSS

E13

VSS

E14

VSS

E6

VSS

E9

VSS

F10

VSS

F13

VSS

F14

VSS

F18

VSS

F6

VSS

F9

VSS

G6

VSS

J12

VSS

J15

VSS

J18

VSS

J19

VSS

J9

VSS

K10

VSS

K11

VSS

K12

VSS

K13

VSS

K14

VSS

K18

VSS

K19

VSS

L10

VSS

L11

VSS

L12

VSS

L13

VSS

L14

VSS

L18

VSS

L19

VSS

M10

VSS

M11

VSS

M12

VSS

M13

VSS

M14

VSS

M15

VSS

M6

VSS

M9

VSS

N10

VSS

N11

VSS

N12

VSS

N13

VSS

N14

VSS

N6

VSS

P10

VSS

P11

VSS

P12

VSS

P13

VSS

P14

VSS

P18

VSS

P19

VSS

R12

VSS

R15

VSS

R18

VSS

R19

VSS

R9

VSS

V14

VSS

V15

VSS

V16

VSS

V19

VSS

V6

VSS

V7

VSS

V8

VSS

W14

VSS

W15

VSS

W16

VSS

W19

VSS

W7

VSS

W8

VSS

H5
G5

N5
M5

J5
G4
K6
H4
F5

A22

Compa l Electronics, Inc.

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

3

2

Title

Size Doc u m ent Number Re v

Date: Sheet of

LA-2051

SB200M(3/4) - PWR

1

28 51Friday, November 14, 2003

1.0

5

D D

4

3

2

1

+3VALW +3V +3V

12

R198
10K_0402_5%

R199
@10K_0402_5%

R105
@10K_0402_5%

12

R95
10K_0402_5%

IGN DEBUG SPEEDSTEP FREQLTCH

EEDO

EECK

ROM ON

DEBUG

PCI BUS

STRAPS

IGNORE

ROM ON

DEBUG

LPC

STRAPS

BUS

DEFAULT

DEFAULT

4

STRAP
HIGH

STRAP
LOW

+3VS

12

12

12

12

MANUAL
PWR ON

DEFAULT

PWR
ON

R226
@10K_0402_5%

R227
10K_0402_5%

C C

PWR_STRP27
SB_EEDO27
SB_EECLK27
IAC_SYNC27,32

IAC_SDATAO27,32

SPDIF_OUT27
MII_TXEN27

MII_TXD327
MII_TXD227
MII_TXD127
MII_TXD027

32KHZ_ S5_OUT27

B B

A A

REQUIRED SYSTEM STRAPS

PCI_AD2619,20, 22,24,25,26

5

+3VS

12

R104
@10K_0402_5%

12

R94
10K_0402_5%

AC_SYNC

INIT ACTIVE
HIGH

INIT ACTIVE
LOW (PIII)

DEFAULT DEFAULT

12

R208
@10K_0402_5%

R209
10K_0402_5%

1 2

+3VS +3VS

12

12

R218
@10K_0402_5%

R219
10K_0402_5%

12

R224
@10K_0402_5%

12

R225
10K_0402_5%

CPU_STP#

33MHz NB
BUS

HI SPEED
A-LINK

DEFAULT

SIO 24MHzUSE

SIO 48MHzAUTO

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS
MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

ENABLE

SPEED

STEP

DISABLE

SPEED

STEP

DEFAULT

3

+3V +3V +3V +3V +3V

12

12

R99

R102

10K_0402_5%

10K_0402_5%

12

12

R89

R92

@10K_0402_5%

@10K_0402_5%

TX_EN

DISABLE
CPU FREQ
SETTING

DEFAULT

ENABLE CPU
FREQSETTING

R101
10K_0402_5%

R91
@10K_0402_5%

12

R103
10K_0402_5%

12

R93
@10K_0402_5%

12

12

ETHERNET TXD[3:0]AC_SDOUT SPDIF_OUTPWR_STRP

PROCESSOR FREQ MULTIPLIER

2

+3VALW

12

12

Title

Size Doc u m ent Number Re v

LA-2051

Date: Sheet of

12

R100
10K_0402_5%

R90
@10K_0402_5%

R201
10K_0402_5%

12

R202
@10K_0402_5%

32KHZ_S5

32KHZ
OUTPUT
FROM SB200
(INT RTC)

DEFAULT

32KHZ INPUT
TO SB200
(EXT RTC)

Compa l Electronics, Inc.

SB200M(4/4) - STRAPS

1

29 51Friday, November 14, 2003

1.0

+3VS

IDE_PDD[0..15]27

IDE_PDDACK#27

IDE_PDIOR#27

IDE_PDA127

IDE_PDIOW#27

IDE_PDDREQ27

IDE_PDCS1#27

IDE_PDCS3#27

IDE_PDA027

IDE_PDA227

INT_IRQ1427

IDE_SDA027

IDE_SDCS1#27

IDE_SDA227

IDE_SDCS3#27

IDE_SDIOW#27

IDE_SDDREQ27

IDE_SDIOR#27

IDE_SDDACK#27

INT_IRQ1527

IDE_SDIOR#
IDE_SDDACK#
IDE_SDD0
IDE_SDA1

IDE_SDA127

IDE_PDD[0..15]

IDE_PDD0
IDE_PDD14
IDE_PDD1
IDE_PDD15

IDE_PDDACK#
IDE_PDIOR#
IDE_PDA1
IDE_PDIOW#

IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9

IDE_PDD4
IDE_PDD10
IDE_PDD5
IDE_PDD11

IDE_PDD2
IDE_PDD12
IDE_PDD3
IDE_PDD13

IDE_PDDREQ

IDE_PDCS1#
IDE_PDCS3#
IDE_PDA0
IDE_PDA2

IDE_SDD[0..15]27

IDE_SDA0

1 8

IDE_SDCS1#

2 7

IDE_SDA2

3 6

IDE_SDCS3#

4 5

RP87 33_1206_8P4R_5%

IDE_SDD6

1 8

IDE_SDD11

2 7

IDE_SDD1

3 6

IDE_SDIOW#

4 5

RP77 33_1206_8P4R_5%

IDE_SDD9

1 8

IDE_SDD3

2 7

IDE_SDD14

3 6

IDE_SDD12

4 5

RP85 33_1206_8P4R_5%

IDE_SDD5

1 8

IDE_SDD7

2 7

IDE_SDD10

3 6

IDE_SDD8

4 5

RP76 33_1206_8P4R_5%

IDE_SDD2

1 8

IDE_SDD15

2 7

IDE_SDD4

3 6

IDE_SDD13

4 5

RP86 33_1206_8P4R_5%

IDE_SDDREQ

1 2

R514

33_0402_5%

1 8
2 7
3 6
4 5

RP78 33_1206_8P4R_5%

1 2

R515 33_0402_5%

PD_D0

1 8

PD_D14

2 7

PD_D1

3 6

PD_D15

4 5

RP80 33_1206_8P4R_5%

RP90 33_ 1206_8P4R_5%

RP88 33_1206_8P4R_5%

RP79 33_1206_8P4R_5%

RP89 33_1206_8P4R_5%

R488

RP81 33_1206_8P4R_5%

R484 33_0402_5%

IDE_SDD[0..15]

SD_IRQ15INT_IRQ15

R526 8. 2K_0402_5%

4 5
3 6
2 7
1 8

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 2

33_0402_5%

4 5
3 6
2 7
1 8

1 2

SD_SDA0
SD_SD CS1#
SD_SDA2
SD_SD CS3#

SD_D6

SD_D11

SD_D1

SD_SD IOW#

SD_D9

SD_D3
SD_D14
SD_D12

SD_D5

SD_D7
SD_D10

SD_D8

SD_D2
SD_D15

SD_D4
SD_D13

SD_SDDREQ

SD_SDIOR#
SD_SDDACK#
SD_D0
SD_SDA1

1 2

PD_PDDACK#
PD_PDIOR#
PD_PDA1
PD_PD IOW#

PD_D6
PD_D7
PD_D8
PD_D9

PD_D4
PD_D10
PD_D5
PD_D11

PD_D2
PD_D12
PD_D3
PD_D13

PD_PDDREQ

PD_PD CS1#
PD_PD CS3#
PD_PDA0
PD_PDA2

PD_IRQ14INT_IRQ14

1 2

R483 8 .2K_0402_5%

INT_CD_L32

IDE Module CONN.

PHDD_LED#35

1 2

+5VS

R349 100K_0402_5%

CD-ROM Module CONN.

1

CD_AGND32

C343
12P_0402_50V8J

2

SHDD_LED#35

1 2

+5VS

R341 100K_0402_5%

PIDE_R ST#

PD_D7
PD_D6
PD_D5

PD_D2
PD_D1
PD_D0

PD_PDDREQ
PD_PD IOW#
PD_PDIOR#
PD_PD IORDY
PD_PDDACK#
PD_IRQ14
PD_PDA1

PD_PD CS1#

SHDD_LED#

+5VS

SIDE_R ST#

470_0402_5%

SUYIN_200138FR044G242ZL

SD_SD IOW#
SD_SD IORDY
SD_IRQ15
SD_SDA1
SD_SDA0
SD_SD CS1#

+5VS

R336

JP10

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44

SD_D7
SD_D6
SD_D5
SD_D4
SD_D3
SD_D2
SD_D1
SD_D0

12

SUYIN_800189MB050S105ZL

IDE_PDIORDY27

JP25

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

1 2

R350 33_0402_5%

PD_D8
PD_D9
PD_D10
PD_D11PD_D4
PD_D12PD_D3
PD_D13
PD_D14
PD_D15

PCSEL

1 2

R354 470_0402_5%

R353 0_0402_5%

1 2

PD_PDA2PD_PDA0

PD_PD CS3#

+5VS

SD_D8
SD_D9
SD_D10
SD_D11
SD_D12
SD_D13
SD_D14
SD_D15
SD_SDDREQ
SD_SDIOR#

SD_SDDACK#

R331 100K_0402_5%

1 2

SD_SDA2
SD_SD CS3#

2

C344

0.1U_0 402_16V4Z

1

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS
MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

IDE_SDIORDY27

C328

1 2

12P_0402_50V8J

R355

4.7K_0402_5%

1 2

PD_PD IORDY

1 2

R352 10K_0402_1%

1 2

R351 5.6K_0402_5%

R340 33_0402_5%

INT_CD_R 32

+5VS

+5VS

PD_D7

PD_PDDREQ

1 2

1 2

R339 10K_0402_1%

1 2

R333 5.6K_0402_5%

C356
1000P_0402_50V7K

NB_RST#

1

2

C354
10U_0805_10V4Z

+3VS

NB_RST#7,26, 34,35

PIDERST#27

+5VS

1

2

Place component's closely IDE CONN.

+3VS

R338

4.7K_0402_5%

1 2

SD_SD IORDY

1

C329
10U_0 805_10V4Z

2

@0.1U_ 0402_16V4Z

NB_RST#

+3VS

SD_D7

SD_SDDREQ

+5VS

1

C330
1000P_0402_50V7K

2

SIDERST#27

W=80mils

Place component's closely CD-ROM CONN.

Compal Electronics, Ltd.

Title

IDE & CD-ROM Connector

Size Doc u m ent Number Re v

Custom

LA-2051

Date: Sheet of

C353

@0.1U_ 0402_16V4Z

1

C355
1U_06 03_10V4Z

2

C333

12

1
2

R337 10K_0402_5%

1

C327
1U_06 03_10V4Z

2

+5V

12

5

1

P

B

2

A

G

3

D27

RB751V_SOD323

R356

10K_0402_5%

1

2

+5V

5

U34

P

B

Y

A

G

@TC7SH0 8FU_SSOP5

3

D26

RB751V_SOD323

1 2

U35

PIDE_R ST#

4

Y

@TC7SH0 8FU_SSOP5

21

12

C357

0.1U_0 402_16V4Z

SIDE_R ST#

4

21

1

C331

0.1U_0 402_16V4Z

2

30 51Friday, November 14, 2003

1.0

0.1U_0 402_16V4Z

1

C31
10U_0805_10V4Z

2

+USB_VCCB

+USB_VCCA

+5V

1

C25

2

U37

1

GND

2

IN

3

EN1#

4

EN2#

TPS2042ADR_SO8

OC1#
OUT1
OUT2
OC2#

8
7
6
5

12

R31
100K_0402_5%

+3V

12

100K_0402_5%
R41

1 2

R25 47_0402_5%

1 2

R50 47_0402_5%

0.1U_0 402_16V4Z

1 2

R34 @0_0402_5%

1 2

R30 0_0402_5%

1 2

R48 0_0402_5%

1 2

R40 @0_0402_5%

1

1

C37

C32

0.1U_0 402_16V4Z

2

2

OVCUR_USB20#0 24

OVCUR#1 27

OVCUR#2 27

OVCUR_USB20#1 24

C369

150U_D2_6.3VM

+USB_VCCA

1

+

2

USB_CGND

1

C368
470P_0603_50V8J

2

@0.1U_ 0402_16V4Z

1

C699
@10U_0805_10V4Z

2

+5V

1

C702

2

@10P_0402_50V8K

+3V+USB_VCCC

12

12

U46

1
2
3
4

USB2- USB2+ USB1+USB1- USB0+USB0-

1

C349

@10P_0402_50V8K

2

GND

OC1#

IN

OUT1
OUT2

EN1#

OC2#

EN2#

@TPS2042ADR_SO8

1

C345

2

8
7
6
5

12P_0402_50V8K

1

C27

12P_0402_50V8K

2

R348
@100K_0402_5%

1

C26

2

R342
@100K_0402_5%

1 2

R346 @47_0402_5%

12P_0402_50V8K

C352

@0.1U_ 0402_16V4Z

1

C29

12P_0402_50V8K

2

USB20 _NEC_P0-24
USB20 _NEC_P0+24

USB20P1-27

USB20P1+27

USB20 _NEC_P1-24
USB20 _NEC_P1+24

USB20P2-27

USB20P2+27

Keep 20 mils minimum spacing

1 2

R345 @0_0402_5%

1 2

R344 @0_0402_5%

1

2

1

C28

2

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS
MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

OVCUR_USB20#2 24

OVCUR#3 26

USB20 _NEC_P2-24

USB20_NEC_P2+24

USB20P3-27

USB20P3+27

1 2

R373 @0_0603_5%

1 2

R374 @0_0603_5%

1 2

R363 0_0603_5%

1 2

R364 0_0603_5%

1 2

R371 @0_0603_5%

1 2

R372 @0_0603_5%

1 2

R365 0_0603_5%

1 2

R366 0_0603_5%

+USB_VCCB

+

C375

150U_D2_6.3VM

C700

@150U_D2_6.3VM

1 2

R576 @0_0603_5%

1 2

R574 @0_0603_5%

1 2

R575 @0_0603_5%

1 2

R573 @0_0603_5%

USB
CONNECTOR

USB0­USB0+

USB1­USB1+

1

2

+USB_VCCC

+

1

C364
470P_0603_50V8J

2

USB_BGND

1

1

C701
@470P_0603_50V8J

2

2

USB_AGND

USB2­USB2+

Compal Electronics, Ltd.

Title

USB & Bluetooth

Size Doc u m ent Number Re v

Custom

LA-2051

Date: Sheet of

USB
CONNECTOR

JP26

1

1

2

2

3

3

4

4

@TYCO_14 70712-1

31 51Friday, November 14, 2003

JP13

1
2
3
4
5
6
7
8

TYCO_1470713-1

1.0

5

AC97 Codec

CD_AGND30

MD_SPK

C155

1 2

R176 0_0402_5%

1 2

R175 0_0402_5%

INT_CD_L

R183 20K_0402_5%

INT_CD_R

R182 20K_0402_5%

R190

1 2

10K_0402_5%

1

2

@0.01U _0402_25V4Z

12

R425
0_0402_5%

C148

20K_0402_5%

LINE_IN_L33

LINE_IN_R33

D D

INT_CD_R30

C C

0.01U_ 0402_25V4Z

B B

R427

12

R180
@68K_0402_5%

12
12

20K_0402_5%

1

2

12

LINEIN_L
LINEIN_R

12

R179
@68K_0402_5%

R184

C_MD_SPK

12

R185

2.4K_0402_5%

CD_GNA

12

R426
20K_0402_5%

CD_L
CD_R

12

12

R181
20K_0402_5%

4

L30

1 2

+VDDA

CHB20 12U170_0805

C442

0.1U_0 402_16V4Z

ALC250 Pin17 INTERNAL
PULL HIGH 50Kohm

EN_EQ#33

LINEIN_L

C158 1 U_0402_6.3V4Z

LINEIN_R

C157 1 U_0402_6.3V4Z

CD_L

C163 1 U_0402_6.3V4Z

CD_R

C161 1 U_0402_6.3V4Z

CD_GNA

MIC33

MONO_IN33

IAC_RST#27

IAC_SYNC27,29

IAC_SDATAO27,29

EAPD33

C162 1 U_0402_6.3V4Z
C160 1 U_0402_6.3V4Z
C159 0 .1U_0402_16V4Z

C_MD_SPK

C164 1 U_0402_6.3V4Z

IAC_RST#

1 2

R196 100_0402_5%

IAC_SYNC
IAC_SDATAO

XTLSEL=0 external clock 14.318M

R231 @0_0402_5%

DGND

1

2

12
12
12
12
12
12
12
12

1

C211
10U_0805_10V4Z

2

C_MICMIC

12

+AVDD _AC97

U21

14

AUX_L

15

AUX_R

16

VIDEO_L

17

VIDEO_R

23

LINE_IN_L

24

LINE_IN_R

18

CD_L

20

CD_R

19

CD_GND

21

MIC1

22

MIC2

13

PHONE

12

PC_BEEP

11

RESET#

10

SYNC

5

SDATA_OUT

45

NC

46

XTLSEL

47

EAPD

48

SPDIFO

4

DVSS1

7

DVSS2

ALC202A E_LQFP48

38

AVDD125AVDD2

LINE_OUT_L
LINE_OUT_R

MONO_OUT

TRUE_LOUT_L

TRUE_LOUT_R

1 2

L15 0_0805_5%

1 2

L8 0_0805_5%

1 2

L6 0_0805_5%

1 2

L43 0_0805_5%

+3VS

0.1U_0 402_16V4Z
C207

9

DVDD11DVDD2

BIT_CLK

SDATA_IN

XTL_IN

XTL_OUT

AFILT1
AFILT2

VREFOUT

VREF
VRDA

VRAD

DCVOL

VAUX
GPIO0
GPIO1

NC
AVSS1
AVSS2

3

LINEL

35

LINER

36
37
39
41

6
8
2

3
29
30
28
27
32

31
33
34
43
44

40
26

AGND

42

1

1

2

2

1 2

C195 4. 7U_0805_10V4Z

1 2

C203 4. 7U_0805_10V4Z

1 2

C216 1U _0402_6.3V4Z

R221 22_0402_5%

1 2
1 2

R213 22_0402_5%

XTL_IN

XTL_OUT

1 2

C172 1000P_0402_50V7K

1 2

C178 1000P_0402_50V7K

1 2

R206@0_0402_5%

AGND

C182
10U_0 805_10V4Z

C200 @0.01 U_0402_25V4Z

1 2

R452
@1M_0402_5%

1 2

+AVDD_AC97

12

4.7U_0 805_10V4Z

1

C454
1U_0402_6.3V4Z

R200

2

@1K_0402_5%

+5VALW

1

C531

2

SUSP#20,35 ,36,40

LINE_OUT_L
LINE_OUT_R
MD_MIC

IAC_BITCLK
IAC_SDATAI0

1 2

R229 @10K_0402_5%

1

R230

C201@1 U_0402_6.3V4Z

@10K_0402_5%

2

1 2

1

@0.01U _0402_25V4Z

C467

2

2

0.1U_0 402_16V4Z

1

C517

2

SUSP#

LINE_OU T_L 33
LINE_OUT_R 33INT_CD_L30

IAC_BITC LK 27
IAC_SD ATAI0 27

CLK_A UDIO_14M 16

+3VS

22P_0402_50V8J

+AUD_VREF

1

C476
1U_0402_6.3V4Z

2

Adjustable Output

U43

4

VIN

2

DELAY
ERROR7CNOISE

8

SD

SI9182DH-AD_MSOP8

C495

0.1U_0 402_16V4Z

1

C448

2

5

VOUT

6

SENSE or ADJ

1
3

GND

LINEL

1 2

C189 1000P_0402_50V7K

LINER

1 2

C215 1000P_0402_50V7K

IAC_BITCLK

1 2

C192 @22P_0402_50V8J

IAC_SDATAI0

1 2

R214

XTL_IN

1

24.576MHz_16P_3XG-24576-43E1

2

1

C447

4.7U_0 805_10V4Z

2

C167

0.1U_0 402_16V4Z

@10K_0402_5%

X3

1

C509

0.1U_0 402_16V4Z

2

XTL_OUT

12

XTL_IN

+AUD_VREF

1

2

1

2

R459

1 2

@10_0402_5%

1

C154

4.7U_0 805_10V4Z

2

1

+VDDA

12

R473

69.8K_0603_1%

12

R465
24K_0402_1%

C455
22P_0402_50V8J

+VDDA

1

C552

4.7U_0 805_10V4Z

2

EXCLK _AUDIO 38

DGND AGND

+3V_MDC

AMP 3 -1565120-0 30P H:9MM

JP16

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30

+5VS_MDC

1 2

CHB16 08B121_0603

+3VS_MDC_R

1 2

10K_0402_5%

IAC_SYNC

1 2

R84 0_0402_5%

1 2

R87 22_0402_5%

12

R83
10K_0402_5%

MD_SPK

+5VS

IAC_BITCLK

+3VS

1 2

R86 22_0402_5%

IAC_SD ATAI1 27

L1

R81

MDC Connector

1 2

+3V

R82 0_0402_5%

+3VS

IAC_SDATAO
IAC_RST#

A A

1 2

L3
CHB1608B121_0603

1

2

C7030 .1U_0402_16V4Z

+3VS_MDC

Compal Electronics, Ltd.

Title

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

3

2

AC97 Codec ALC202

Size Doc u m ent Number Re v

Custom

LA-2051

Date: Sheet of

32 51Friday, November 14, 2003

1

1.0

A

Audio AMP

OUT_L

12

R2611 .3K_0402_5%

OUT_R

12

R2691 .3K_0402_5%

VOL_AMP

C237

12

4 4

LINE_OUT_L32

LINE_OUT_R32

3 3

W/O EQ R385=R386= 1.3K Ohm
C537=C539= 0.47U

R = R385, R386
C = C537, C539

fo=1/(2*3.14*R*C)=260Hz
R=1.3K / C=0.47U

2 2

0.1U_0 402_16V4Z

1 2

C236 0 .47U_0603_16V4Z

1 2

C241 0 .47U_0603_16V4Z

LINE_OUT_L

LINE_OUT_R

Pin 22

HP won't
implement
EQ.

HIGH
LOW PIN 9,5 ACTIVE

INTSPK_L1
INTSPK_R1
OUT_L

OUT_R

L44

1 2

+5VS

CHB2012U170_0805

1 2

CHB2012U170_0805

L45

PIN 10,4 ACTIVE

NBA_PLUG
VOL_AMP

1 2

C243 0. 47U_0603_16V4Z

1 2

C240 0. 47U_0603_16V4Z

1 2

C250 0.47U_ 0603_16V4Z

1 2

C251 0.47U_ 0603_16V4Z

System Sound

BEEP#35

SN74LVC125APWLE_TSSOP14

PCM_SPK#20

1 1

SB_SPKR27

+3VALW

12

4

U18B

6

1 2

OE#

I5O

8.2K_0402_5%

0.22U_ 0603_16V4Z

U19D

SN74LVC14APWLE_TSSOP14

A

R193
100K_0402_5%

R197

+3VALW

C166

1 2

0.1U_0 402_16V4Z

14

U19C

P

5

O6I

G

1

SN74LVC14APWLE_TSSOP14

7

+3V POWER

C173

2

C190

1 2

+3VALW

14

+3V POWER

P

9

G

7

1U_0402_6.3V4Z

C181

O8I

1 2

1U_0402_6.3V4Z

HP_L
HP_R

INTSPK_L1

INTSPK_L2
INTSPK_R1
INTSPK_R2

1U_0402_6.3V4Z

B

W=40Mil

C256

0.1U_0 402_16V4Z

7
18
19

2

3

4
21

5
23

6
20

17

1

C269

0.047U_0402_16V4Z

2

1 2

1 2

1 2

1 2

C179

1 2

R223

1 2

560_0402_5%

R207

1 2

560_0402_5%

B

+5VS_AMP

1

1

2

2

U26

PVDD

SHUTDOWN#

PVDD

SE/BTL#

VDD

PC-BEEP

BYPASS

HP/LINE#

LOUT-

VOLUME

ROUT­LOUT+
ROUT+
LLINEIN
RLINEIN
LHPIN
RHPIN

CLK

TPA0232PWP_TSSOP24

L50
L51

FBM-11-160808-121-T_0603

L52

FBM-11-160808-121-T_0603

L53

FBM-11-160808-121-T_0603
FBM-11-160808-121-T_0603

R204

1 2

560_0402_5%

12

R216

10K_0402_5%

C264

4.7U_0 805_10V4Z

22
15
14
11
9
16
10

LIN

8

RIN

1

GND

12

GND

13

GND

24

GND

D52
SM05_SOT23

MONO_IN_I

2 1

SHUTDOWN#

C275 0.1U_0 402_16V4Z

2

C279

1

0.47U_ 0603_16V4Z

0.47U_ 0603_16V4Z

(0.47U~1U)

2

3

1

+VDDA

2

B

D22
RB751V_SOD323

C

1 2

INTSPK_L2
INTSPK_R2

1

C267

2

+5VS_AMP

12

R268
100K_0402_5%

Q46

13

D

2N7002_SOT23

2

G

S

100K_0402_5%

NBA_PLUG

1

C273

2

0.47U_ 0603_16V4Z

R264

+5VS_AMP

1 2

EAPD 32

R513

R307

R308

Bias
(Gain)

W/O EQ

4.3K

3.6K

3.6K

SPK

056 V

12 dB

HP

1.006V

-2dB

Speaker Connector

JP5

1
2
3
4

ACES_85204-0400

2

3

D51
SM05_SOT23

1

12

R210
10K_0402_5%

1

12

1

C

E

3

C193
10U_0805_10V4Z

R211
10K_0402_5%

2

MONO_IN_O

Q25
2SC2411K_SC59

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

C196

12

1U_0402_6.3V4Z

R220

2.4K_0402_5%

1 2

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS
MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

C

MONO_IN 32

INTSPK_R1
INTSPK_L1

MIC32

LINE_IN_R32

LINE_IN_L32

C621
C637

1 2
1 2

EN_EQ#32

+

150U_D2_6.3VM

+

150U_D2_6.3VM

D

MIC

1 2

FBM-11-160808-700T_0603

INTSPK_R1_1
INTSPK_L1_1

D

+5VS_AMP

R313

100K_0402_5%

1 2

NBA_PLUG

FBM-11-160808-700T_0603

13

2

G

L10

L28

1 2
1 2

FBM-11-160808-700T_0603

L29

FBM-11-160808-700T_0603

C435

330P_0402_50V7K

1 2

R613 @0_0402_5%

L40

1 2

L41

1 2

FBM-11-160808-700T_0603

330P_0402_50V7K

E

1 2

R312 4.3K_0402_5%

1

4

VOL_AMP

2

5

VR1

3

3

10K

12

R307 3.6K_0402_5%

13

D

Q26

2

2N7002_SOT23

G

S

D

Q28
2N7002_SOT23

S

+AUD_VREF

R236

12

12

2.2K_0402_5%

R237

@2.2K_0402_5%

MIC-1

1

C224

220P_0402_50V8K

Title

Size Doc u m ent Number Re v

Date: Sheet of

2

LINE_IN_R-1
LINE_IN_L-1

1

1

C431

330P_0402_50V7K

2

2

NBA_PLUG
INTSPK_R1_2
INTSPK_L1_2

1

1

C607

C632

330P_0402_50V7K

2

2

Compal Electronics, Ltd.

Audio AMP & JACK

Custom

LA-2051

JP4

5
4
3

6
2
1

FOX_JA6033L-5S1-TR

LINE I N JACK

JP2

5
4
3

6
2
1

FOX_JA6033L-5S1-TR

HEADPHONE
OUT JACK

JP6

5
4
3

6
2
1

FOX_JA6033L-5S1-TR

E

VR - C-Type

R308

3.6K_0402_5%

1 2

MICROPHONE
IN JACK

33 51Friday, November 14, 2003

+5VS_AMP

1.0

A

SUPER I / O S M sC L P C 4 7 N217

PCIRST#10,19 ,20,21,2 2,24,25,26,35

PID[0..3]
LPC_AD[0..3]

CLK_PCI_SIOCLK_SIO_14M

1 2

1

2

NB_RST#7,26, 30,35

SIO_PD#
SIO_SMI#
SIO_PME#

1 1

R162 10K_0402_5%
R113 10K_0402_5%
R186 10K_0402_5%

LPC_AD[0..3]26,35

R187

1 2
1

C153

2

1 2
1 2
1 2

PID[0..3]18

10_0402_5%

10P_0402_50V8K

R154

C124

+3VS

2 2

@10K_0402_5%

@15P_0402_50V8J

PCIRST#

B

@0_0402_5%

1 2

R617

1 2

R618 0_0402_5%

+3VS

LPC_FRAME#26,35

LPC_DRQ#126

PM_CL KRUN#19,20 ,22,24,25,26,35
CLK_PCI_SIO26

SERIRQ20,26,35

CLK_SIO_14M16

R145 100K_0402_5%

FIR_DET#

12

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_FRAME#
LPC_DRQ#1

SIO_PD#
PM_CL KRUN#

CLK_PCI_SIO
SERIRQ
SIO_PME#

CLK_SIO_14M
PID0

PID1
PID2
PID3

SIO_GPIO11
SIO_SMI#
SIO_IRQ

SIO_GPIO23

4.7U_0 805_10V4Z

10
12
13
14

15
16

17
18

19
20
21

6
9

23
24
25
27
28
29
30
31
32
33
34
35
36
40

8
22
43
52

+3VS

C147

C

U14

LAD0
LAD1
LAD2
LAD3

LFRAME#
LDRQ#

PCI_RESET#
LPCPD#

LPC I/F

CLKRUN#
PCI_CLK
SER_IRQ
IO_PME#

CLK14

CLOCK

GPIO40
GPIO41
GPIO42
GPIO43
GPIO44
GPIO45

GPIO

GPIO46
GPIO47
GPIO10
GPIO11/SYSOPT
GPIO12/IO_SMI#
GPIO13/IRQIN1
GPIO14/IRQIN2
GPIO23

VSS
VSS

POWER

VSS
VSS

LPC47 N217_STQFP64

1

2

SERIAL I/F

FIR

IRMODE/IRRX3

SLCTIN#

PARALLEL I/F

ERROR#

STROBE#

1

C117

0.1U_0 402_16V4Z

2

RXD1

TXD1

DSR1#

RTS1#
CTS1#
DTR1#

RI1#

DCD1#

IRRX2

IRTX2

INIT#

PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7

SLCT

PE
BUSY
ACK#

ALF#

VTR
VCC
VCC
VCC
VCC

1

C114

0.1U_0 402_16V4Z

2

0.1U_0 402_16V4Z

D

+3VS

RP9

DCD#1

1 8

SIO_IRQ
SIO_GPIO23
RXD1
IRRX

R118
@10K_0402_5%

Base I/O Address
0 = 02Eh

*

1 = 04Eh

R114
1K_0402_5%

RI#1
CTS#1
DSR#1

R112
R111

1 2

R157 1K_0402_5%

1 2

R116 10K_0402_5%

2 7
3 6
4 5

4.7K_ 1206_8P4R_5%

12

10K_0402_5%

12

@10K_0402_5%

RXD1

62

TXD1

63

DSR#1

64

RTS#1

1

CTS#1

2

DTR#1

3

RI#1

4

DCD#1

5

IRRX

37

IRTXOUT

38

IRMODE

39

INIT#

41

SLCTIN#

42

LPD0

44

LPD1

46

LPD2

47

LPD3

48

LPD4

49

LPD5

50

LPD6

51

LPD7

53

LPTSLCT

55

LPTPE

56

LPTBUSY

57

LPTACK#

58

LPTERR#

59

LPTAFD#

60

LPTSTB#

61

7
11
26
45
54

1

C91

2

+3VS

+3VS

1 2

SIO_GPIO11

1 2

E

Serial Port
for Debug

+5VS

JP22

1
2

RXD1

3

TXD1

4

DSR#1

5

RTS#1

6

CTS#1

7

DTR#1

8

RI#1

9

DCD#1

10

@E&T_96212-1011S

1
2
3
4
5
6
7
8
9
10

Parallel Port

3 3

CP2

LPTSLC TIN#

81
2
3
4 5

220P_1206_8P4C_50V8K

2
3
4 5

220P_1206_8P4C_50V8K

8 1
7
6

220P_1206_8P4C_50V8K

4 5
3
2

4 4

220P_1206_8P4C_50V8K

LPTINIT#

7

LPTERR#

6

AFD#/3M#

CP1

LPTACK#

81

LPTBUSY

7

LPTPE

6

LPTSLCT

CP10

CP9

FD0
FD1

2

FD2

3

FD3

45

FD4
FD5

6

FD6

7

FD7

81

A

+5V_PRN

+5V_PRN

LPTACK#
LPTPE

LPTSLCT

FD0
FD1
FD2
FD3

LPD0
LPD1
LPD2 FD2
LPD3 FD3

LPD7
LPD6
LPD5
LPD4 FD4

6
7
8
9

10

6
7
8
9

10

RP4

1 8
2 7
3 6
4 5

68_1206_8P4R_5%

RP3

4 5
3 6
2 7
1 8

68_1206_8P4R_5%

RP38

5

AFD#/3M#LPTBUSY

4

LPTERR#

3

LPTINIT#

2

LPTSLC TIN#

1

2.7K_ 1206_10P8R_5%

RP2

5

FD7

4

FD6

3

FD5

2

FD4

1

2.7K_ 1206_10P8R_5%

FD0
FD1

FD7
FD6
FD5

+5V_PRN

B

+5V_PRN

LPTSTB#

AFD#/3M#
LPTAFD#

FD0
LPTERR#
FD1
INIT#
FD2
SLCTIN#
FD3

FD4
FD5
FD6
FD7
LPTACK#
LPTBUSY
LPTPE
LPTSLCT

2 1

+5VS

RB420 D_SOT23

1 2

47_0402_5%

1 2

R16 33_0402_5%

1 2

R17

1 2

R13

D6

R15

33_0402_5%
33_0402_5%

+5V_PRN

LPTINIT#
LPTSLC TIN#

12

R14

2.2K_0402_5%
C3

1 2

220P_0402_50V8K

JP11

1

14

2

15

3

16

4

17

5

18

6

19

7

20

8

21

9
22
10
23
11
24
12
25
13

SUYIN_070536FR025S204ZU

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS
MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

C

1

C727

2

@10U_0805_10V4Z

C400

10U_0805_10V4Z

FIR_DET#

1 2

R134 0_0402_5%

+3VS +IR_ANODE

R392
47_1206_5%

1 2

+IR_3VS

(30mil)

1

1

C399

0.1U_0 402_16V4Z

2

2

FIR Module

+3VS

(60mil)

R383 @4 .7_1206_5%

1 2

1

1 2

22U_1 206_10V4Z

D

C704

2

2

IRRX IRMODE

4
6
8

SD/MODE: SHUTDOW N MODE, HIGH ACTIVE
MODE : H IGH/LO W SPEED SELECT

4.7_1206_5%

R385

U39

IRED_A

IRED_C

TXD

SD/MODE

RXD

MODE

VCC
GND

TFDU6102-TR3_8P

PCB Foo t p r i n t : TF DU6101E

Compal Electronics, Ltd.

Title

LPC-Super I/O

Size Doc u m ent Number Re v

Custom

LA-2051

Date: Sheet of

1
3
5
7

(60mil)

+

IRTXOUT

1 2

R393 @0_0402_5%

Reserved

E

@22U_1206_10V4Z

1

C705

@150U_D2_6.3VM

2

34 51Friday, November 14, 2003

1

C728

2

1.0

5

0.1U_0 402_16V4Z

1

C230

2

0.1U_0 402_16V4Z

D D

ECAGND

+3VALW

R136 4.7K_0402_5%

0.1U_0 402_16V4Z

1

1

C108

C130

2

2

0.1U_0 402_16V4Z

+EC_A VCC

L12

1 2

CHB16 08U800_0603

1

C233

0.1U_0 402_16V4Z

2

ECAGND

BATT_TEMP

12

C206 0. 01U_0402_25V4Z

12

1

2

1

C430

2

1000P_0402_50V7K

+3VALW

EC_RST#

C712
@0.01U _0402_25V4Z

+3VALW

2

2

1

CLK_PCI_EC26

C217

C180

1000P_0402_50V7K

1

+3VS

LPC_AD[0..3]26,34

12

R137
10_0402_5%

1

C102
10P_0402_50V8K

2

KB910 (Reserved)

R131 0_0402_5%

NS591L

LPC_DRQ#026

LPC_FRAME#26,34

EC_SCI#27

POP FOR KB910 (Reserved)

+3VALW

R423

4.7K_0402_5%

4.7K_0402_5%

1 2

10K_0402_5%

EC_PME#

12

R249

TP_DATA

12

R250

TP_CLK

+3VALW

R258 @100K_0402_5%

1 2

CRY1

20M_0603_5%

1

C175
10P_0402_50V8K

2

C C

B B

A A

1394_PME#19,20 ,22,24,25

WLANPME#19,20,22,24,25

PCM_PME#19,20 ,22,24,25

LAN_PME#19,2 0,22,24,25

USB20_PME#19,20,22,24,25

+3VALW

RP56

MODE#

1 8

FRD#

2 7

SELIO#

3 6

FSEL#

4 5

10K_1206_8P4R_5%

+5VALW

EC_SMC2

1 2

4.7K_0402_5%

R424

EC_SMD2

1 2

4.7K_0402_5%

R422

R205

47K_0402_5%

VR_ON

12

R212

10K_0402_5%

SYSON

12

R215

10K_0402_5%

SUSP#

12

+3VALW

R247
100K_0402_5%

Ra

1 2

AD_BID0

1

R259

C229

0_0402_5%

Rb

Analog Board ID definition,
Please see page 3.

0.1U_0 402_16V4Z

2

1 2

5

+5VS

4

R130 @0_0402_5%

1 2
1 2

SERIRQ20,26,34

LPC_AD[0..3]

910_NUMLED#

EC_SCI#

GATEA2027
KBRST#27

EC_PL AYBTN#37
EC_STOPBTN#37
EC_RE VBTN#37
EC_FRDBTN#37
TV_OUT_EN#37

KB910 (Must)

1 2

pin110 reserve for KSO16

TP_CLK37

TP_DATA37

EC_LID _SW#37

EC_SMI#27

S4_DATA39

WL_OFF#25

EC_SWI#27

S4_LATCH39

SYSON39,40,45
SUSP#20,32 ,36,40

VR_ON47

PCMRST#21
EC_RSMRST#27
SHDD_LED#30

ENBKL#9
BKOFF#18

FSEL#36

Ra

R194

CRY2

Rb

1 2

1

4

X1

IN

32.768KHZ_12.5P_1TJS125DJ2A073

OUT

NC3NC

2

1

2

4

1

C109

0.1U_0 402_16V4Z

2

1 2

R132 @0_0402_5%

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

EC_RST#

1 2

R590 0_0402_5%

KSI0
KSI1
KSI2
KSI3

KSI4
KSI5
KSI6
KSI7

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8

KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

EC_TINT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

PSCLK1
PSDAT1
PSCLK2
PSDAT2
TP_CLK
TP_DATA

591_HDD_LED#

CRY1
CRY2

EC_SMI#

SYSON
SUSP#
VR_ON

BKOFF#
FSEL#

PC87591L-VPCN01 A2_LQFP176

R191
120K_0402_5%

PROPRIETARY NOTE

C168
12P_0402_50V8J

+EC_VDD

U15

7

SERIRQ

8

LDRQ#

9

LFRAME#

15

LAD0

14

LAD1

13

LAD2

10

LAD3

18

LCLK

19

RESET1#

22

SMI#

23

PWUREQ#

31

IOPD3/ECSCI#

5

GA20/IOPB5

6

KBRST/IOPB6

71

KBSIN0

72

KBSIN1

73

KBSIN2

74

KBSIN3

77

KBSIN4

78

KBSIN5

79

KBSIN6

80

KBSIN7

49

KBSOUT0

50

KBSOUT1

51

KBSOUT2

52

KBSOUT3

53

KBSOUT4

56

KBSOUT5

57

KBSOUT6

58

KBSOUT7

59

KBSOUT8

60

KBSOUT9

61

KBSOUT10

64

KBSOUT11

65

KBSOUT12

66

KBSOUT13

67

KBSOUT14

68

KBSOUT15

105

TINT#

106

TCK

107

TDO

108

TDI

109

TMS

110

PSCLK1/IOPF0

111

PSDAT1/IOPF1

114

PSCLK2/IOPF2

115

PSDAT2/IOPF3

116

PSCLK3/IOPF4

117

PSDAT3/IOPF5

118

PSCLK4/IOPF6

119

PSDAT4/IOPF7

158

32KX1/32KCLKIN

160

32KX2

62

IOPJ2/BST0

63

IOPJ3/BST1

69

IOPJ4/BST2

70

IOPJ5/PFS

75

IOPJ6/PLI

76

IOPJ7/BRKL_RSTO

148

IOPM0/D8

149

IOPM1/D9

155

IOPM2/D10

156

IOPM3/D11

3

IOPM4/D12

4

IOPM5/D13

27

IOPM6/D14

28

IOPM7/D15

173

SEL0#

174

SEL1#

47

CLK

NS87591L KB910

RaRb20M_0603_5%

120K_0402_5%

16

VDD

VCC134VCC245VCC3

Host interface

Key matrix scan

JTAG debug port

PS2 interface

PORTJ-2

PORTM

GND117GND235GND346GND4

122

L13

1 2

CHB1608U800_0603

No Stuff
0_0402_5%

123

136

GND5

159

167

ECAGND

VCC4

GND6

157

166

VCC5

PORTB

PORTD-1

PORTE

GND7

137

VCC6

AD Input

DA output

PWM
or PORTA

PORTC

PORTH

AGND

96

3

+EC_AVCC+3VALW

161

95

AVCC

IOPE0AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7

IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7

IOPB0/URXD
IOPB1/UTXD

IOPB2/USCLK

IOPB3/SCL1

IOPB4/SDA1

IOPB7/RING/PFAIL/RESET2

IOPC1/SCL2

IOPC2/SDA2

IOPC3/TA1

IOPC4/TB1/EXWINT22

IOPC5/TA2

IOPC6/TB2/EXWINT23

IOPC7/CLKOUT

IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21

IOPD2/EXWINT24/RESET2

IOPE4/SWIN

IOPE5/EXWINT40

IOPE6/LPCPD/EXWIN45

IOPE7/CLKRUN/EXWINT46

IOPH0/A0/ENV0

IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1

IOPH4/A4/TRIS

IOPH5/A5/SHBM

PORTI

PORTJ-1

IOPJ1/WR0

PORTD-2

IOPK2/A10

PORTK

IOPK3/A11

IOPK4/A12
IOPK5/A13_BE0
IOPK6/A14_BE1

IOPK7/A15_CBRD

IOPL0/A16
IOPL1/A17

PORTL

IOPL2/A18
IOPL3/A19

IOPL4/WR1#

NC212NC320NC421NC585NC686NC791NC892NC997NC10

NC1

11

R129 @0_0402_5%

1 2

R140 @0_0402_5%

1 2

R141 @0_0402_5%

R431

1 2

0_0402_5%

1 2

0.1U_0 402_16V4Z

VBAT

AD0
AD1
AD2
AD3

DP/AD8
DN/AD9

DA0
DA1
DA2
DA3

IOPC0

IOPH6/A6
IOPH7/A7

IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7

IOPJ0/RD

SELIO#

IOPD4
IOPD5
IOPD6
IOPD7

IOPK0/A8
IOPK1/A9

98

910_HDD_LED#

1 2

UNPOP FOR 551

+RTCVCC+3VALW

C144

BATT_TEMPB

BATT_TEMP

81

VBATTA

82

VBATTB

83

910_AD_BID0

84
87
88
89
90

591_AD_BID0

93
94

99
100
101
102

INVT_PWM

32
33
36
37
38
39
40

BID1

43

EC_URXD

153

EC_UTXD/KSO17

154

EC_USCLK

162

EC_SMC1

163

EC_SMD1

164

RESET#

165
168

EC_SMC2

169

EC_SMD2

170
171

EC_PME#

172

EC_THERM#

175
176

BID0

1

ACIN

26
29
30

2
44

LPCPD

24
25

KBA0

124

KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

FRD#

SELIO#

591_NUM_LED#

CAPS_LED#
PADS_LED#

KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15

KBA16
KBA17
KBA18
KBA19

LPCPD

125
126
127
128
131
132
133

138
139
140
141
144
145
146
147

150
151

152
41

42
54
55

143
142
135
134
130
129
121
120

113
112
104
103
48

POP FOR 551 & 87591V

EC_SCI#

PCIRST#10,19, 20,21,22 ,24,25,26,34

NB_RST#7,26, 30,34

BATT_TEMPA 42
ADP_I 43,46
BATT_OVP 43

ALI/MH# 42
EMAIL# 37
MODE# 37
INTERN ET# 37

DAC_BRIG 18
EN_DFAN2 37
IREF 43
EN_DFAN1 37

INVT_PWM 18
BEEP# 33
PWR _SUSP_LED 37
ACOFF 43
PM_BATLOW# 27
EC_ON 37
EC_LID _OUT# 27

EC_UTXD/KSO17 37

EC_SMC1 36,38,42
EC_SMD1 36,38,42

PBTN_OUT# 27
EC_SMC2 6
EC_SMD2 6
FAN_S PEED1 37

EC_THERM# 27
FAN_S PEED2 37

ACIN 2 7,37,41
KILL_SW# 25,37
PM_SLP_S3# 27

ON/OFF 37
PM_SLP_S5# 27

PM_CL KRUN# 19, 20,22,24,25,26,34

R621 1K_0402_5%

FRD# 36
FWR# 36

SELIO# 36
PHDD_L ED# 30

FSTCHG 43

KBA[0..19]36

ADB[0..7]36

1 2

+3VALW

10K_0402_5%
@10K_0402_5%

C107

1 2

@1U_04 02_6.3V4Z

2

PCIRST#

POP FOR KB910 (Reserved)

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS
MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

3

2

KBA[0..19]
ADB[0..7]

@0_0402_5%

1 2

R619

1 2

R620 0_0402_5%

910_AD_BID0
591_AD_BID0

RESET#

1 2

R582 @0_0402_5%

1 2

R583 0_0402_5%

KEYBOARD CONN.

JP9

NUM_LED#

34

PADS_LED#

33

CAPS_LED#

32
31

KSO15

30

KSO14

29

KSO10

28

KSO11

27

KSO8

26

KSO9

25

KSO13

24

KSI7

23

KSO3

22

KSO7

21

KSO12

20

KSI4

19

KSI6

18

KSI5

17

KSO6

16

KSO5

15

KSI3

14

KSI0

13

KSO0

12

KSO1

11

KSI1

10

KSI2

9

KSO2

8

KSO4

7
6
5
4
3
2
1

ACES_88170-3400

PSCLK1

4 5

PSDAT1

3 6

PSCLK2

2 7

PSDAT2

1 8

BADDR1(KBA3) BADDR0(KBA2)

0
0

*

11

12

R623

12

R624

0
1
01

IRE
OBD 0

*

DEV 0
PROG

SHBM(KBA5)=1: Enable shared memory with host BIOS
TRIS(KBA4)=1: While in IRE and OBD, float all the

BID0

signals for clip-on ISE use

BID1

KBA1

R252 1K_0402_5%

KBA2

R253 @1K_0402_5%

KBA3

R254 1K_0402_5%

KBA5

R255 1K_0402_5%

591_HDD_LED#
910_HDD_LED#

910_NUMLED#
591_NUM_LED#

1

For EC Tools

JP3

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

@E&T_96212-1011S

AD_BID0

R321

+3VS

1 2

300_0402_5%

R319

1 2

+3VS

300_0402_5%

R318

1 2

+3VS

300_0402_5%

+5VS

RP93

ENV0 (KBA0) TRIS (KBA4)

1 2
1 2
1 2
1 2

Title

Size Doc u m ent Number Re v
Custom

Date: Sheet of

KB910 (Reserved)

@10K_1206_8P4R_5%

I/O Address
Index
2E 2F
4E

(HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1

0
1

1

Compal Electronics, Ltd.

LPC- PC87591

Reserved

ENV1 (KBA1)

0
1

1

+3VALW

RESET#
BID0
BID1

1 2

R251 0_0402_5%

1 2

R248 @0_0402_5%

1 2

R135 @0_0402_5%

1 2

R138 0_0402_5%

LA-2051

EC_TINT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

EC_URXD

EC_UTXD/KSO17

EC_USCLK

KSO15
KSO14

6

KSO10

7

KSO11

8 1

100P_1206_8P4C_50V8

KSO8
KSO9

6

KSO13

7

KSI7

8 1

100P_1206_8P4C_50V8

CP6

KSO3
KSO7

6

KSO12

7

KSI4

8 1

100P_1206_8P4C_50V8

CP5

KSI6
KSI5

6

KSO6

7

KSO5

8 1

100P_1206_8P4C_50V8

CP4

KSI3
KSI0

6

KSO0

7

KSO1

8 1

100P_1206_8P4C_50V8

KSI1
KSI2

6

KSO2

7

KSO4

8 1

100P_1206_8P4C_50V8

Data

R591

1 2

NUM_LED#

1

+3VALW

CP8

45
3
2

CP7

45
3
2

45
3
2

45
3
2

45
3
2

CP3

45
3
2

4F

0
0
0
0

@100K_0402_5%

12
12

HDD_LED# 37

35 51Friday, November 14, 2003

R625
@10K_0402_5%
R626
10K_0402_5%

1.0

System BIOS

C421

1 2

0.1U_0 402_16V4Z

14

U10C

FWE#

SN74LVC32APWLE_TSSOP14

P

8

O

G

7

+5VALW

C351

1 2

0.1U_0 402_16V4Z
U31

+3VALW

ADB0

R316

1 2

1 2

R347

20K_0402_5%

GND

A0
A1
A2

ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

AA
LARST#SELIO#

C350

1 2

1U_0805_25V4Z

+5VALW

1
2
3
4

R65
100K_0402_5%

1 2

R69
100K_0402_5%

1 2

+3VALW

C420

1 2

0.1U_0 402_16V4Z

KBA2

SELIO#35

+3VALW+3VALW

R414

2

G

100K_0402_5%

1 3

D

1 2

4.7K_0402_5%

Q21
2N7002_SOT23

+5VALW +5VALW

R72

1 2

9

A

10

B

EC_SMC135,38,42
EC_SMD135,38,42

14

U10B

4

P

A

O

5

B

G

SN74LVC32APWLE_TSSOP14

7

S

FWR# 35

+5VALW

R75

4.7K_0402_5%

1 2

100K_0402_5%

6

+5VALW

SUSP# 2 0,32,35,40

FLASH# 27

C43

1 2

0.1U_0 402_16V4Z
U6

8

VCC

7

WP

6

SCL

5

SDA

AT24C1 6AN-10SI-2.7_SO8

3

11

1

D0
D14Q1
D27Q2
D38Q3
D413Q4
D514Q5
D617Q6
D718Q7

CP
MR

KBA[0..19]35

ADB[0..7]35

20

2

Q0

5

VCC

6
9
12
15
16
19

GND

SN74H CT273PW_TSSOP20

10

SMBus EEPROM

KBA[0..19]

ADB[0..7]

U40

KBA18

1

A18

KBA16

2

A16

KBA15 KBA17

3

A15

KBA12 KBA14

4

A12

KBA7 KBA13

5

A7

KBA6 KBA8

6

A6

KBA5 KBA9

7

A5

KBA4 KBA11

8

A4

KBA3 FRD#

9

A3

KBA2 KBA10

10

A2

KBA1 FSEL#

11

A1

KBA0

12

A0

ADB0 ADB6

13

DQ0

ADB1

14

DQ1

ADB2 ADB4

15

DQ2

16

VSS

512K8-90_PLCC32

CDON_LED# 37
MP3_LED# 37
E-MAIL_LED# 37
PWR _LED# 37
WL_BT_LED# 37
BATT_LOW_LED# 37
BATT_CHG I_LED# 37
CD_FDD_LED# 37

32

VDD

31

WE#

30

A17

29

A14

28

A13

27

A8

26

A9

25

A11

24

OE#

23

A10

22

CE#

21

DQ7

20

DQ6

19

DQ5

18

DQ4

17

DQ3

C59

1 2

0.1U_0 402_16V4Z

+3VALW

FWE#

ADB7
ADB5
ADB3

FRD# 35
FSEL# 35

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

FSEL#
FRD#
FWE#

U41

21

A0

20

A1

19

A2

18

A3

17

A4

16

A5

15

A6

14

A7

8

A8

7

A9

36

A10

6

A11

5

A12

4

A13

3

A14

2

A15

1

A16

READY/BUSY#

40

A17

13

A18

37

A19

22

CE#

24

OE#

9

WE#

@SST39VF080-70_TSOP40

GND0
GND1

VCC0
VCC1

+3VALW

31
30

ADB0

25

D0

ADB1

26

D1

ADB2

27

D2

ADB3

28

D3

ADB4

32

D4

ADB5

33

D5

ADB6

34

D6

ADB7

35

D7

RESET#

10

RP#

11

NC

12
29

NC0

38

NC1

23
39

1 2

R71
@100K_0402_5%

1

C44
@0.1U_ 0402_16V4Z

2

+3VALW

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS
MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

Compal Electronics, Ltd.

Title

BIOS & Ext.I/O

Size Doc u m ent Number Re v

Custom

LA-2051

Date: Sheet of

36 51Friday, November 14, 2003

1.0

PWR _SUSP_LED35

1

2

1K_0402_5%

C318

+5VALW

1

2

C303
1U_0603_10V6K

R550

Q48

1

2

10K_0402_5%

5

+3VS

+5VALW

1 2
2

3 1

MMBT3904_SOT23

1

C320

0.1U_0 402_16V4Z

2

EN_DFAN1

12

R566

R552
10K_0402_5%

1 2

2

3
2

+5VALW

G

+12VALW

8

P

+IN

-IN
G

4

1 2

R564

FAN_S PEED135

12

R553
10K_0402_5%

13

D

Q47
2N7002_SOT23

S

EC_UTXD/KSO1735

EC_RE VBTN#35

EC_FRDBTN#35
EC_PL AYBTN#35
EC_STOPBTN#35

BATT_LOW_LED#36
BATT_CHG I_LED#36

CD_FDD_LED#36

U30A

1

OUT

LM358A_SO8

8.2K_0402_5%

SUSP_LED#

MODE#35

51ON#41

PWR _LED#36

CDON_LED#36

MP3_LED#36

E-MAIL_LED#36

TP_DATA35

+5VALW
+5VALW

ACIN27,35,41

R562

1 2

100_0402_5%

0.1U_0 402_16V4Z

TP_CLK35

MODE#
51ON#

EC_UTXD/KSO17
EC_RE VBTN#
EC_FRDBTN#
EC_PL AYBTN#
EC_STOPBTN#

ACIN
PWR _LED#
SUSP_LED#
BATT_LOW_LED#
BATT_CHG I_LED#
HDD_LED_OUT#
CD_FDD_LED#

CDON_LED#
MP3_LED#
E-MAIL_LED#

C684

1N4148_SOT23

+3VS

1 2

SW BOARD Connector

(Top contact)

D D

C304

1000P_0402_50V7K

HDD_LED#35

C C

FAN CONN. 1

@0.1U_ 0402_16V4Z

EN_DFAN135

B B

FAN CONN. 2

5

+IN

6

-IN

1 2

R326

U30B

OUT

LM358A_SO8

8.2K_0402_5%

FAN_S PEED235

7

R323

1 2

100_0402_5%

0.1U_0 402_16V4Z

10K_0402_5%

C689

+3VS

R565

1 2

EN_DFAN235

A A

EN_DFAN2

R329

10K_0402_5%

5

12

4

Touch Pad Connector

TP_CLK
TP_DATA

D57
SM05_SOT23

2

3

+5VS

1

PLACE CLOSE TO JP8

51ON#

JP8

1

1

MODE#

2

2

3

3

EC_UTXD/KSO17

4

4

5

5

EC_RE VBTN#

6

6

7

7

EC_FRDBTN#

8

8

9

9

EC_PL AYBTN#

10

10

11

11

EC_STOPBTN#

12

12

13

13

ACIN

14

14

15

15

PWR _LED#

16

16

17

17

SUSP_LED#

18

18

19

19

BATT_LOW_LED#

20

20

21

21

BATT_CHG I_LED#

22

22

23

23

HDD_LED#

24

24

25

25

CD_FDD_LED#

26

26

CDON_LED#

E&T_6901-26

MP3_LED#
E-MAIL_LED#

For EMI

+5VALW

FMMT619_SOT23

2

1

D54

R561
10K_0402_5%

FMMT619_SOT23

2

1

1N4148_SOT23

2

B

3

+5VALW

2

B

D25

3

4

C

E

1000P_0402_50V7K

C

E

1000P_0402_50V7K

1

Q53

3

1

1000P_0402_50V7K

C680

2

C683

1

Q51

3

1

1000P_0402_50V7K

C687

2

C691

12

D56

1SS355_SOD323

1

2

1

2

12

D53

1SS355_SOD323

1

2

1

2

1

C663
1U_0603_10V6K

2

12

C298 100P_0402_50V8K

12

C297 100P_0402_50V8K

12

C299 100P_0402_50V8K

12

C300 100P_0402_50V8K

12

C301 100P_0402_50V8K

12

C302 100P_0402_50V8K

12

C661 100P_0402_50V8K

12

C660 1000P_0402_50V7K

12

C659 100P_0402_50V8K

12

C658 1000P_0402_50V7K

12

C670 100P_0402_50V8K

12

C669 100P_0402_50V8K

12

C652 100P_0402_50V8K

12

C668 100P_0402_50V8K

12

C667 220P_0402_50V8K

12

C666 100P_0402_50V8K

12

C665 220P_0402_50V8K

1

C697
10U_0805_10V4Z

2

JP21

+5V_FAN1

1
2
3
4

ACES_85205-0400

1

C685
10U_0805_10V4Z

2

+5V_FAN2

JP24

1
2
3
4

ACES_85205-0400

JP7

1
2
3
4
5
6

ACES_85201-0602

1
2
3
4

1
2
3
4

3

LID_SW#

EC_LID_SW#35

LID_SW#39

@V-POR T-0603-220 M-V05_0603

TV-OUT BUTTON

+3VALW

R24

100K_0402_5%

LID_SW#

EC_UTXD/KSO17

@V-POR T-0603-220 M-V05_0603

12

D10

SMT1-05_4P

1
2

RB751V_SOD323

D11

2 1

2 1

SW5

5

6

D7

3
4

2 1

Internet Button User Button & E-MAIL SW

51ON#

D34
1N4148_SOT23

2

1

SMT1-05_4P

1
2

3

SW3

3
4

5

6

2

3

1

SW1

2
5

ESE24MV1T_6P

TV_OUT_EN# 35

3

1

D35
@PSOT24C_SOT23

2

Kill SWITCH

1
6

3
4

WIRELESS ACTIVE AMB LED

+3VALW

120_0402_5%

+3VALW

R19 100K_0402_5%

12

R362 100K_0402_5%

12

INTERN ET#

D33
1N4148_SOT23

INTERN ET# 35

SMT1-05_4P

2

R107

1 2

SW4

1
2

5

6

SW6

1

1

2

2

3

3

DS-1208_3P

@V-POR T-0603-220 M-V05_0603

17-21UYOC/S530-A2/TR8_ORG

D15

2 1

47K

10K

1 3

EMAIL#
INTERN ET#

1N4148_SOT23
D4

2

1

3

3
4

+3VALW

D40

Q15
DTA114YKA_SC59

2

2

3

1

1

R401
100K_0402_5%

1 2

2 1

WL_BT_LED#

EMAIL#

3

2

1

D3
@PSOT24C_SOT23

KILL_SW# 25,35

D8
1N4148_SOT23

Power Button

2

3

D9
@PSOT24C_SOT23

1

SW2

3

1
2

SMT1-05_4P

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS
MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

4

5

6

EC_ON35

2N7002_SOT23

3

EC_ON

Q33

+3VALW

R360

4.7K_0402_5%

1 2

1 2

33K_0402_5%

13

D

S

1

R358

D5

DAN202U_SC70

2

G

+3VALW

R18
100K_0402_5%

1 2

2
3

Q4

13

DTC124EK_SC59

2

51ON#

C4

2

ON/OFF# 39

ON/OFF 35

1000P_0402_50V7K

2

1

RTC BATT

BATT1

-

12

D2
RLZ20A_LL34

0.1U_0 402_16V4Z

Title

Size Doc u m ent Number Re v

Custom

Date: Sheet of

+

+RTCBATT

12

ML1220T13RE

+RTCVCC

1

C681

2

Compal Electronics, Ltd.

System Connectors

LA-2051

+RTCBATT

1

3

1

C688

0.1U_0 402_16V4Z

1 2

D55
BAS40-04_SOT23

2

+CHGRTC

37 51Friday, November 14, 2003

WL_BT_LED# 36

EMAIL# 35

1.0

A

VID_PWRGD

1 1

2 2

H_VID_PWRGD5

SN74LVC125APWLE_TSSOP14

SS ENABLE
HIGH:?

LOW: ?

+3V_EXCLK

12

R569
@10K_0402_5%

12

R570

3 3

@10K_0402_5%

L46

@KC FBM-L11-201209-221LMAT_0805

1 2

+3V

@0.1U_0402_10V6K

+3V

12

R188
10K_0402_5%

1 2

R192 0_0402_5%

10

U18C

8

OE#

I9O

+3V POWER

14

U19F

P

13

O12I

G

SN74LVC14APWLE_TSSOP14

7

@10P_0402_50V8K
C692

1 2

@14.31818MHZ_20P_6X1430004201

+3V_EXCLK

C695

1

2

C693

1 2

@10P_0402_50V8K

EXCLK_CLKGEN16

+3V_EXCLK

EXT_LVDS_SSOUT9

EXT_LVDS_SSIN9

C713

@10U_0805_10V4Z

12

1

2

Y6

EC_SMC135,36,42
EC_SMD135,36,42

C673

@0.1U_0402_10V6K

12

R567
@1M_0402_5%

C694

1 2

@0.1U_0402_10V6K

1

2

B

VID_PWRGD 47
ENLL 47

12
13

+3VALW+3VALW

14

U10D

P

A

11

O

B

G

SN74LVC32APWLE_TSSOP14

7

U45

2

X1

3

X2

7

REF1

8

VDD

5

GND

6

INPUT_SEL/REF0

4

CLKIN

13

CLK0

27

SCLK

26

SDATA

28

AVDD

14

VDD

1

GND

12

GND

@ICS960011

24.576MHz

C

13

U18D

11

OE#

I12O

SN74LVC125APWLE_TSSOP14

10

EXCLK _AUDIO 32

C696

9

VDD

11

GND

16

CLK1

18

CLK2

15

VDD

19

VDD

17

GND

21

CLK3

20

VDD

22

GND

24

CLK4

25

VDD

23

GND

1 2

@10U_0805_10V4Z

EXCLK_USB20 24
EXCLK_27M_TV 10

1

C677

@0.1U_0402_10V6K

2

C675

12

@0.1U_0402_10V6K

C674

12

@0.1U_0402_10V6K

+3V_EXCLK

1

C676

2

+3V_EXCLK

EXCLK_1394 19
+3V_EXCLK

+3V_EXCLK

@0.1U_0402_10V6K

FD3
FIDUCAL

1

FD5
FIDUCAL

1

CF15
SMD40M80

1

CF6
SMD40M80

1

CF5
SMD40M80

1

H_S31 5D110

H_S31 5D110

H_S31 5D181

H_C126 D110

H_C335D91

FD1
FIDUCAL

1

FD6
FIDUCAL

1

CF16
SMD40M80

1

CF13
SMD40M80

1

CF10
SMD40M80

1

H2

H1

H_S315D110

1

1

H25

H26

H_S315D110

1

1

H33

H_C315 D142

1

H36

H30

H_S315D181

1

1

H6

H17

H_C126 D110

1

1

H10

H_C335D91

1

FD2
FIDUCAL

1

FD4
FIDUCAL

1

H20

1

CF3
SMD40M80

1

CF11
SMD40M80

1

H_S315D110

H_S315D110

H_C315 D142

H3

1

H24

1

H28

1

D

CF1
SMD40M80

1

CF9
SMD40M80

1

H_S315D110

H_S315D110

H_C217 D118

CF2
SMD40M80

1

CF8
SMD40M80

1

H7

1

H23

1

H37

1

H31

H_C276 D142

1

H9

H_S315D118

1

H35

H_C335 D142

1

CF7
SMD40M80

CF14
SMD40M80

H5

H_S315D110

1

H27

H_S315D110

1

H38

H_C217 D118

1

H_C276 D142

E

CF12
SMD40M80

1

1

CF4
SMD40M80

1

1

H29

H4

H_C315D142-A

H_C118D118N

1

1

H32

1

H_C197D91

H_C276D91

H15

H_C181 D161

1

H8

H16

H_C197D91

1

1

H12

H18

H_C276D91

1

1

H34

H_C315 D142-A

1

H13

4 4

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

C

H11

H_O85X118D85X118N

1

H_C63D63N

1

H14

H_O63X102D63X102N

1

D

H_C85D85N

H19

1

H21

H_O201X162D201X162N

1

Compal Electronics, Ltd.

Title

PowerGood

Size Doc u m ent Number Re v

Custom

LA-2051

Date: Sheet of

H22

H_O315X236D315X236N

1

E

38 51Friday, November 14, 2003

1.0

A

1 1

B

C

D

E

RTCVREF

RTCVREF RTCVREF RTCVREF

100K_0402_5%

R44

2

G

12

680K_0402_5%

C35 1U_0805_16V7K

C35 use X7R

13

D

Q13
2N7002_SOT23

S

12

R53

100K_0402_5%

2 2

LID_SW#37

D14

RB751V_SOD323

21

RTCVREF

R73 10K_0402_5%

S4_LATCH35

R70

10K_0402_5%

3 3

RTCVREF

12

+3VALW

S4_DATA35

1 2

R68

10K_0402_5%

@1U_0805_16V7K

1 2

R62 10K_0402_5%

R28

1 2

1 2

1

C41

2

D13

2 1

RB751 V_SOD323

12

1

D12
1N4148_SOT23

C45

3

C34 0. 1U_0402_16V4Z

2

5

P

2

A

G

3

1 2

1U_0805_16V7K

U5

1

CD1#

2

D1

3

CP1

4

SD1#

5

Q1

6

Q1#

7

GND

74LCX74MTC_TSSOP14

1 2

U3

4

Y

R37 10K_0402_5%

NC7SZ14M5X_SOT23-5

SYSON35,40,45

14

VCC

13

CD2#

12

D2

11

CP2

10

SD2#

09

Q2

08

Q2#

D_SET_S4

1 2

RTCVREF

1

0.1U_0402_10V6K
C46

2

ON/OFF# 37

13

D

Q8

2

2N7002_SOT23

G

S

13

D

Q7

2

2N7002_SOT23

G

S

13

D

Q11

2

2N7002_SOT23

G

S

4 4

Compal Electronics, Ltd.

Title

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

C

D

BATT-Mode-Hibernation

Size Doc u m ent Number Re v

Custom

LA-2051

Date: Sheet of

39 51Friday, November 14, 2003

E

1.0

A

+2.5VALW To +2.5V Transfer

+2.5VALW +2.5V

U9

1

8

S

D

2

7

S

D

3

6

S

D

4

5

G

D

10U_0 805_10V4Z

1 1

2

+12VALW

R110

1 2

100K_0603_1%

0.1U_0402_16V7K

SI4800DY_SO8

1

C70

1

2

C88

0.1U_0 402_16V4Z

13

D

S

1

C85

2

2

G

Q18

2N7002_SOT23

1

2

SYSON#

C86
10U_0 805_10V4Z

B

+2.5VALW +2.5VS

U8

8

D

7

D

6

D

5

D

SI4800DY_SO8

1

C66

10U_0 805_10V4Z

+12VALW

2

100K_0603_1%

0.1U_0402_16V7K

+2.5VALW To +2.5VS Transfer

1

S

2

S

3

S

4

G

R407

1 2

1

C79

2

C

0.1U_0 402_16V4Z

13

D

S

2N7002_SOT23

D

E

+2.5V & +2.5VS Discharge

1

1

C83

2

G

Q41

C76
10U_0805_10V4Z

2

2

SUSP

+2.5V +2.5VS

12

R126
@470_0402_5%

13

D

SYSON# SUSP

2

Q17

G

@2N7002_SOT23

S

12

R406
@470_0402_5%

13

D

2

Q40

G

@2N7002_SOT23

S

+3VALW To +3V Transfer

+3VALW+3VALW +3V

U13

1

8

S

D

2

7

S

D

3

6

S

D

4

5

G

D

SI4800DY_SO8

1

C123

10U_0 805_10V4Z

2 2

2

+12VALW

R117

1 2

95.3K_0603_1%

0.1U_0402_16V7K

1

2

C121

0.1U_0 402_16V4Z

C94

1

2

13

D

S

2N7002_SOT23

1

C127
10U_0 805_10V4Z

2

SYSON#

2

G

Q16

10U_0 805_10V4Z

C214

U22

8

D

7

D

6

D

5

D

SI4800DY_SO8

1

+12VALW

2

95.3K_0603_1%

0.1U_0402_16V7K

+5VALW To +5V Transfer

10U_0 805_10V4Z

+5VALW

8
7
6
5

+12VALW

SI4800DY_SO8

1 2

27K_0603_1%

0.1U_0402_16V7K

1

C321

2

U33

1

8

S

D

2

7

S

D

3

6

S

D

4

5

G

D

1

C341

10U_0805_10V4Z

3 3

SI4800DY_SO8

+12VALW

R320

1 2

47K_0603_1%

0.1U_0402_16V7K

2

1

2

1

C323

2

C336

0.1U_0 402_16V4Z

13

D

S

+5V+5VALW

1

2

2

G

Q29
2N7002_SOT23

C342
10U_0 805_10V4Z

+1.8VSP ENABLE

+3VALW

12

R390
150K_0402_5%

13

2N7002_SOT23

D

2

G

Q14

1

C706

S

@0.1U_ 0402_16V4Z

2

A

4 4

+3VALW

14

U19E

P

11

G

SN74LVC14APWLE_TSSOP14

7

O10I

1.8VS_EN# 46

B

SYSON35,3 9,45

+3VALW To +3VS Transfer +3V & +3VS Discharge

1

S

2

S

3

S

4

G

R203

1 2

C210

0.1U_0 402_16V4Z

13

D

1

C188

2

S

2N7002_SOT23

2

G

Q23

+3VS

SUSP

1

C218
10U_0 805_10V4Z

2

SYSON#

1

2

+5VALW To +5VS Transfer

U32

S

D

S

D

S

D

G

D

R343

+5VS

1
2
3

1

4

2

G

C340

0.1U_0 402_16V4Z

2

1

C337

2

+5VALW

12

R314
10K_0402_5%

SYSON#

13

D

Q27
2N7002_SOT23

S

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS
MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

C

13

D

S

1

2

2

G

Q32
2N7002_SOT23

C338
10U_0805_10V4Z

SUSPSYSON#

1

C362
10U_0805_10V4Z

2

U36

8

D

7

D

6

D

5

D

SI4800DY_SO8

1

C339
10U_0 805_10V4Z

2

SUSP#20,32 ,35,36

+1.5V To +1.5VS Transfer

+1.5VS+1.5V

1

S

2

S

3

S

4

G

R20

+12VALW

1 2

56K_0603_1%

0.1U_0402_16V7K

1

2

SUSP#

C363

D

+5VALW

2

G

12

R335

4.7K_0402_5%

13

D

Q31
2N7002_SOT23

S

1

C372

0.1U_0 402_16V4Z

2

13

D

G

Q6

S

2N7002_SOT23

SUSP

10U_0805_10V4Z

1

C374

2

SUSPSUSP

2

Title

Size Doc u m ent Number Re v

Custom

Date: Sheet of

+3V +3VS

12

R412
@470_0402_5%

13

D

2

Q42

G

@2N7002_SOT23

S

SUSP

12

R222
@470_0402_5%

13

D

2

Q24

G

@2N7002_SOT23

S

+5V & +5VS Discharge

12

R327
@470_0402_5%

13

D

SYSON# SUSP

2

Q30

G

@2N7002_SOT23

S

+5VS+5V

12

13

D

2

G

S

+1.5V & +1.5VS Discharge

+1.5V +1.5VS

12

R361
@470_0402_5%

13

D

SYSON# SUSP

2

Q35

G

@2N7002_SOT23

S

Compal Electronics, Ltd.

DC/DC Interface

LA-2051

12

13

D

2

G

S

40 51Friday, November 14, 2003

E

R332
@470_0402_5%

Q52
@2N7002_SOT23

R29
@470_0402_5%

Q9
@2N7002_SOT23

1.0

A

PCN1

1

6

G

5

G

4

G

2

3

G

SINGA_2 DC-S113L200

1 1

SINGA_2DC-S133L200

SINGA_2DC-S726B201

BATT+

2 2

CHGRTCP N3N1

51ON#37

3 3

+CHGRTC

+2.5VALWP +2.5VALW

4 4

+12VALWP

+1.5VP

+5VALWP

+3VALWP

PR152

1 2

200_0402_1%

PJP2

1 2

PAD-OPEN 3x3m

2 1

PAD-OPEN 3x3m

2 1

PAD-OPEN 2x2m
PJP9

1 2

PAD-OPEN 3x3m
PJP10

1 2

PAD-OPEN 3x3m

PJP6

1

2

1 2

200_0402_1%

PJP7

PZD2

RB751V_SOD323

PR151

1 2

200_0402_1%

PF2 12A_65VDC_451012

12

1 2

PR141 22K_0402_5%

RTCVREF

PR149

12

+1.5V

+12VALW

+5VALW

+3VALW

A

21

12

EC10QS04_SOD106

PD28

12

PC112

1000P_0402_50V7K

120W

90W

12

PC118

12

0.22U_1206_25V7K

PR139
100K_0402_1%

PU15
S-81233SGUP-T1_SOT89

3.3V

3

PC124
10U_1206_16V4Z

3

1

1

1U_0805_25V4Z

2

2

PC123

(12A,480mils ,Via NO.= 24)

(6A,240mils ,Via NO.= 12)

(300mA,20mils ,Via NO.= 1)

(6A,240mils ,Via NO.= 12)

(6A,240mils ,Via NO.= 12)

C8B BPH 853025_2P

12

PC113
100P_0402_50V8J

PQ46
TP0610T_SOT23

D

S

G

2

12

12

PL14

1 2

13

PR145
200_0402_1%

2 1

+1.25VSP

B

VIN

VS

PJP3

1 2

PAD-OPEN 2x2m

12

VIN

1 2
12

12

PD4
RLZ16B_LL34

12

PC114
1000P_0402_50V7K

PD29
1N4148_SOD80

PR137
33_1206_5%

PC119

0.1U_0603_50V4Z

(2A,80mils ,Via NO.= 4)

PJP4

+1.8VSP

1 2

PAD-OPEN 2x2m

(3A,120mils ,Via NO.= 6)

PJP5

+1.2VP

2 1

PAD-OPEN 2x2m

(30mA,40mils ,Via NO.= 2)

B

C

VIN

12

PR130

PC115

100P_0402_50V8J

12

PC116

1000P_0402_50V7K

MAINPWON6,42,44

ACON43

+1.25VS

+1.8VS

+1.2V

THIS SHEE T OF E N GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTH ORIZED B Y COMPAL E LECTRON ICS, INC . NEITH ER THIS S HEET NOR THE INFO RMATION IT CONT AINS
MAY BE US ED B Y O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONI CS, INC.

84.5K_0402_1%

1 2

PR132 22K_0402_5%

12

12

PR133

20K_0402_1%

0.1U_0402_16V4Z

PD31

VIN

12

1N4148_SOD80

1 2

VL

PR142 10K_0402_1%

PD32

2
3

RB715F_SOT323

Precharge detector

15.34 15.90 16.48

13.13 13.71 14.20

PC117

1 2

PR136 1K_1206_5%

1 2

PR138 1K_1206_5%

1 2

PR140 1K_1206_5%

6.0V

1

C

1 2

PR128 1M_0402_1%

VS

8

3

P

+

2

-

G

4

12

PR135 10K_0402_1%

7

O

12

PC121
1000P_0402_50V7K

PU14A

1

O

LM393M_SO8

RTCVREF

3.3V

PR143 1M_0402_1%

8

PU14B

5

P

+

6

-

G

LM393M_SO8

4

VS

12

12

12

12

PC122

0.1U_0402_16V4Z

D

PR129

5.6K_0402_5%

PD1

RLZ4. 3B_LL34

1 2

PR131 1K_0402_5%

12

PR134
10K_0402_1%

PACIN

ACIN 27, 35,37

PACIN 43,44

Vin Detector

High 18.764 17.901 17.063
Low 17.745 16.903 16.038

B+

12

PR144
499K_0402_1%

12

12

PR146

12

PR148
215K_0402_1%

13

2

G

499K_0402_1%

PR150 47K_0402_1%

13

D

PC120
1000P_0402_50V7K

PACIN

12

2

+5VALWP

41 51Friday, November 14, 2003

PR147
10K_0402_1%

1 2

RTCVREF

3.3V

D

PQ47

2N7002_SOT23

S

PQ48

DTC115EKA_SC59

Compa l El e c t ro nics , Ltd.

Title

DCIN/DECTOR

Size Documen t Num be r R e v

B

Date: Sheet

1.0

of

A

1 1

PCN2

10
11

SUYIN_200275MR009G116ZL

2 2

1

BATT+

2

BATT+

GND
GND

GND­GND-

BLI/NIMH#

3

ID

BB/I

4

B/I

TS

5

TS

EC_SMDA

6

SMD

EC_SMCA

7

SMC

8
9

100_0402_5%

PR113

12

PR114

100_0402_5%

12

PR110 1K_0402_5%

12

PR116
1K_0402_5%

12

12

PR121
1K_0402_5%

1

1 2

PR119 25.5K _0402_1%

1

1

PD25

BAS40-04_SOT23@

3 3

+5VALWP

4 4

3

1

PD26
BAS40-04_SOT23@

2

3

2

1 2

PR111 47K_0402_1%

3

2

3

PD24

BAS40-04_SOT23@

2

PF1

12A_65VDC_451012

PD22

B

VMB

PL13

+3VALWP

1 2

C8B BPH 853025_2P

12

PC106
1000P_0402_50V7K

ALI/MH# 35

BATT_TEMPA 35
EC_SMD1 35,36,38
EC_SMC1 35,36,38

12

PC107

0.01U_0603_50V7K

BATT+

0.22U_0805_16V7K

PH2 near main Battery CONN :

BAT. thermal protection at 78 degree C
Recovery at 39(40) degree C

PC110

0.22U_0805_16V7K

21

+3VALWP

BAS40-04_SOT23@

C

PH1 under CPU botten side :

CPU thermal protection at 84 degree C
Recovery at 44(45) degree C

VL VS

10K_TSM 1A-103(F4D3R)_0603_1%

12

12

PC105

PH1

0.1U_0603_50V4Z

1 2

PR112
47K_0402_1%

8

PU13A

TM_REF1

12

16.9K_0402_1%

TM_REF2

12

PC111

3
2

PR118100K_0402_1%

12

PR120
100K_0402_1%

1 2

PR123 47K_0402_1%

5
6

12

PR127
100K_0402_1%

P

+

1

O

-

G

LM393M_SO8

4

12

VL

8

PU13B

P

+

7

O

-

G

LM393M_SO8

4

12

PR125 100K_0402_1%

PC108

12

12

12

3.32K_0402_1%

PR126

3.92K_ 0402_0.5%

1 2

PR115 16.9K _0402_1%

PR117

PC109

1000P_0402_50V7K

VL

12

PH2
10K_TSM 1A-103(F4D3R)_0603_1%

1 2

PR124

12

1000P_0402_50V7K

VL

PR109
47K_0402_1%

1 2

1SS355_SOD323

VL

PR122
47K_0402_1%

1 2

1SS355_SOD323

VL

PD23

PD27

D

13

2

MAINPW ON 6, 41,44

PQ45
DTC115 EKA_SC59

12

12

Compa l El e c t ro nics , Ltd.

Title

THIS SHEE T OF E N GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTH ORIZED B Y COMPAL E LECTRON ICS, INC . NEITH ER THIS S HEET NOR THE INFO RMATION IT CONT AINS

A

B

MAY BE US ED B Y O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONI CS, INC.

C

BATTERY CONN / OTP

Size Documen t Num be r R e v

B

Date: Sheet

D

of

42 51Friday, November 14, 2003

1.0

A

B

C

D

PQ39

120W

P2

12

PR81
200K_0402_1%

12

PR84
150K_0402_1%

13

D

PQ42
2N7002_SOT23

S

0.1U_0402_16V4Z

1 2

PR93 226K_0402_1%

13

12

12

SI4825DY_SO8

1

S

2

S

3

S

4

G

PQ38

PC89

CS

PQ43
DTC115EKA_SC59

PR107

2.2K_0402_5%

8

D

7

D

6

D

5

D

12

ADP_I35,46

12

PR89
10K_0402_1%

PR97

100K_0402_1%

1

0

12

PC92

0.1U_0402_16V4Z

12

VS

8

PU12A

P

+

-

G

4

LM358A_SO8

12

PR88

29.4K_0402_1%

12

PC100

0.1U_0603_50V4Z

3
2

PQ37

1

12

PR80
10K_0402_1%

ACOFF#

PACIN

ACON

8

S

D

7

S

D

6

S

D

5

G

D

SI4825DY_SO8

PD19

1 2

1SS355_SOD323

PR87

1 2

3K_0402_5%

IREF=1.31*Icharge

2
3
4

2

G

IREF35

VIN

1 1

PACIN1,44

ACON1

2 2

+3VALWP

12

PR99

2

47K_0402_1%

13

PQ44

FSTCHG35

3 3

OVP voltage : LI

4S3P : 18V--> BATT_OVP= 2.0V
3S4P/3S3P : 13.5V--> BATT_OVP= 1.5V

2

DTC115EKA_SC59

(BAT_OVP=0.1111 *VMB)

BATT_OVP35

4 4

PC103

0.1U_0402_16V4Z @

A

Iadp=0~4.2A

P3 B+

PR79

12

0.015_2512_1%

PU11

1

-INC2

2

4700P_0402_25V7K_A34

1000P_0402_50V7K

12

PC96

0.1U_0402_16V4Z

PR86 10 K_0402_1%

PC90

1 2

PC93

1 2

10K_0402_1%

VMB

12

PR102
340K_0402_1%

12

PR103
499K_0402_1%

12

PR153
105K_0402_1%

B

12

PR90

1 2

PR91 1K_ 0402_5%

1 2

PR95

OUTC2

3

+INE2

4

-INE2

5

FB2

4.7K_0402_1%

6

VREF

7

FB1

8

-INE1

9

+INE1

10

12

OUTC1

11

OUTD

12

-INC1

MB3887_SSOP24

PR100

1 2

95.3K_ 0603_0.1%
PR2

1 2

95.3K_ 0603_0.1%

12

PC104

0.01U_0 603_50V7K

THIS SHEE T OF E N GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTH ORIZED B Y COMPAL E LECTRON ICS, INC . NEITH ER THIS S HEET NOR THE INFO RMATION IT CONT AINS
MAY BE US ED B Y O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONI CS, INC.

+INC2

VCC(o)

-INE3

+INC1

GND

CS

OUT

VH

VCC

RT

FB3

CTL

PJP11

1 2

PAD-OPEN 3x3m

24

23

22

21

20

PC91

19

1 2

0.1U_0603_50V4Z

18

17

1 2

68K_0402_5%

16

15

1 2

47K_0402_1%

14

13

12

PC84

4.7U_1206_25V6K

12

PR85
0_0402_5%

CS

PR92

PR96

ACON

1 2

0.022U_0603_25V7K

1 2

PC88 0.1U_0603_50V4Z

PC94

1 2

0.1U_0603_50V4Z

PC95

1 2

1500P_0402_50V7K

PC87

4.2V

PR79 0.01_2512_1% 0.015_2512_1%

PR86

PR88

PR90

90W

12

PC85

4.7U_1206_25V6K

SI7447DP_SO8
SI4825DY_SO8

12

4.7U_1206_25V6K

RB051L-40_SOD106~D

12

PR101143K_0603_1%

PC86

N18

578

PD21

2 1

B++

36

241

LXCHRG

1 2

22UH_SPC-1205P-220A_2.8A_20%

120W 90W

100K_0402_1% 10K_0402_1%

33.2K_0402_1% 29.4K_0402_1%

10K_0402_5% 4.7K_0402_5%

C

SI7447DP_SO8
PQ39

1
2
3

ACOFF#

1 2

10K_0402_1%

PQ40
SI4835DY_SO8

PL12

Title

Size Documen t Num be r R e v

Date: Sheet

13

CC=0.5~2.52A
CV=16.8V(12 CELLS LI-ION)IREF=0.73~3.3V

PR94

1 2

0.02_2512_1%

Compa l El e c t ro nics , Ltd.

CHARGER

B

LA-2051

4

PR82

PQ41
DTC115EKA_SC59

2

4.7U_1206_25V6K

D

12

PC97

5

PR83

1 2

47K_0402_1%

12

PC98

4.7U_1206_25V6K

VIN

ACOFF 35

12

PC99

4.7U_1206_25V6K

43 51Friday, November 14, 2003

BATT+

1.0

of

A

B

C

D

1 1

PC63

BST31

8

G1

7

S1/D2

6

S1/D2

5

S1/D2

12

PC76

100P_0603_50V8J

1 2

0.1U_0603_50V4Z

PDH31

1 2

0_0402_5%

PDL3

PACIN41,43

PR65

PLX3

CSH3

1 2

PR71 10K_0402_1%

VS

12

PR75
47K_0402_1%

12

PC82

0.047U_0603_25V7M

PDH3

1SS355_SOD323

12

PC70

0.1U_0603_50V4Z

25
27
26

24

1
2

3
10
23

7
28

12

PC125
680P_0402_50V7K

47K_0402_1%

12

PC83

0.047U_0603_25V7M

PD16

PU10

BST3
DH3
LX3

DL3

CSH3
CSL3
FB3
SKIP#
SHDN#

TIME/ON5
RUN/ON3

PR78

VS

1 2

22

V+

12

VL

21

GND

MAX1632_SSOP28

8

VL

MAINPW ON 6,4 1,42

2

1

12

12OUT

VL

VDD

BST5

DH5

PGND
CSH5

CSL5

SEQ
REF

SYNC

RST#

3

PD15
DAP202U_SOT323

PC69

4.7U_1206_16V6K

LX5
DL5

FB5

B+++

PL9

1 2

B+

HCB4532K-800T90_1812

4.7U_1206_25V6K

2 2

PC74

150U_D2E_6.3VM_R18

3 3

12

PC64

10UH_SPC-1205P-100_4.5A_20%

0.012_2512_1%

+3VALWP

1

1

+

+

2

2

150U_D2E_6.3VM_R18 @

12

4.7U_1206_25V6K

PR68

PC75

PC65

PL10

12

PD17
EP10QY03

2 1

12

1
2
3
4

12

PC72

47P_0402_50V8J

PR67
1M_0402_1%

1 2

PR72

3.57K_0402_1%

1 2

PR74
10K_0402_1%

PQ35

D1
D1
G2
S2

SI4814DY_SO8

1 2

+3.3V Ipeak = 6.66A ~ 10A

BST51

PC66

1 2

0.1U_0603_50V4Z

+12VALWP

PC67

PDH5

PLX5

4.7U_1206_25V6K

PR73

10.5K_0402_1%

12

PC71

4.7U_1206_16V6K

4
5
18
16
17
19
20
14
13
12
15
9
6
11

POK 45

2.5VREF

12

PC77

4.7U_1206_16V6K

12

1 2

PR66 0_ 0402_5%

PDL5

12

12

PR77

10K_0402_1%

N4

B+++

PC68

12

4.7U_1206_25V6K

12

PC81
100P_0603_50V8J

PC62
470P_0805_100V7K

1 2

PR64

FLYBACKSNB

12

22_1206_5%

PQ36

8

1

G1

D1

2

7

D1

S1/D2

3

6

G2

S1/D2

PDH51

4

S2

SI4814DY_SO8

S1/D2

PC79

5

1

+

2

150U_D2E_6.3VM_R18@

+5V Ipeak = 6.66A ~ 10A

PC61

1 2

12

4.7U_1210_25V6K

PD14
EC11FS 2_SOD106

PT1

1 4

3 2

10uH_SDT-1205P-100-118_5A_20%

12

PC73
47P_0402_50V8J

12

PR69
2M_0402_5%

1

+

PC80

150U_D2E_6.3VM_R18

2

CSH5

12

PR70

0.012_2512_1%

PD18
EP10QY03

2 1

+5VALWP

4 4

Compa l El e c t ro nics , Ltd.

Title

THIS SHEE T OF E N GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTH ORIZED B Y COMPAL E LECTRON ICS, INC . NEITH ER THIS S HEET NOR THE INFO RMATION IT CONT AINS

A

B

MAY BE US ED B Y O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONI CS, INC.

C

5V/3V/12V

Size Documen t Num be r R e v

B

LA-2051

Date: Sheet

D

of

44 51Friday, November 14, 2003

1.0

A

B

C

D

1 1

12

PC126

4.7U_1206_25V6K

1

PD33
DAP202U_SOT323

1U_0805_25V4Z

2

3

PQ50

8

1

G1

D1

2

7

D1

S1/D2

3

6

G2

2 2

+1.5V

+1.5VP

PD36

EP10QY03

3 3

2 1

2200P_0402_50V7K

4700P_0402_25V7K_A34

1

+

PC140

220U_D2_4VM

2

PC142

12

PC139

12

2.0UH_SPC-07040-2R0_6A_30%

PR158

1 2

5.1K_0402_1%

12

PR160
10K_0402_1%

PL17

12

S1/D2

4

S1/D2

S2

SI4814DY_SO8

5

PR157

PC134

1 2

12

0_0402_5%

0.1U_0603_25V7K

SYSON35,39,40

1 2

PR161

0_0402_5%

MAX1845EEI_QSOP28

12

PC131

1U_0603_10V4Z

PU17

25

BST1

26

DH1

27

LX1

24

DL1

28

CS1

1

OUT1

2

FB1

11

ON1

0.22U_0805_16V7K

PC132

OVP

8

PR154
0_0402_5%

1 2

4

V+

GND

23

12

PC144

+5VALWP

12

PC127

4.7U_1206_16V6K

PR155

12

20_0402_5%

VDD

BST2

DH2
LX2
DL2
CS2

OUT2

FB2

ON2

TON

ILIM2
ILIM1

5.62K_0402_1%

PR165

14K_0402_1%

21
19

18
17
20
16

15
14
12

7
5

13
3

PR164

1 2

0_0402_5%

12

12

22

9

UVP

VCC

PGOOD

SKIP

REF

6

10

12

PR156

0.1U_0603_50V4Z

12

PR166

100K_0402_1%

PC133

12

12

PR167
100K_0402_1%

12

PR162 0_0402_5%

5

4

5

4

POK

+2.5VALWP/+1.5VP

12

PC128

D8D7D6D

S1S2S3G

SI4800DY-T1_SO8

D8D7D6D

S1S2S3G

PQ51
SI4810DY_SO8

4.7U_1206_25V6K

PQ49

PL16

2.2UH_SPC-1205P-2R2B_13A_30%

1 2

12

PD34

EC31QS04

@

POK 44

10K_0402_1%

PR159
15K_0402_1%

1 2

12

PR163

2.5V OCP > 13A

PL15

1 2

HCB4532K-800T90_1812

12

PC129

4.7U_1206_25V6K

PC135

1

1

220U_D2_4VM

+

+

2

2

PC136
220U_D2_4VM

12

PC141
4700P_0402_25V7K_A34

12

B+

12

PC130

4.7U_1206_25V6K

+2.5VALWP

1

+

PC137

2

220U_D2_4VM@

PC143
2200P_0402_50V7K

1

+

PC138

2

@

220U_D2_4VM

+2.5VALWP

2 1

PD35
EP10QY03

4 4

Compa l El e c t ro nics , Ltd.

Title

THIS SHEE T OF E N GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTH ORIZED B Y COMPAL E LECTRON ICS, INC . NEITH ER THIS S HEET NOR THE INFO RMATION IT CONT AINS

A

B

MAY BE US ED B Y O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONI CS, INC.

C

+2.5VALWP/1.5VP

Size Documen t Num be r R e v

Custom

LA-2051

Date: Sheet

D

of

45 51Friday, November 14, 2003

1.0

5

S

H

Y

Y

4

3

2

1

+3VALWP

PR169
0_1206_5%

1 2

D D

PR171
332K_0402_1%

PC190

PU7

7
4

1

NE57814_HSO8

12

33P_0603_50V8J

12

STANDBY#
VD

ExtRefIn
RefOut8VttSense
VSS

150U_D2E_6.3VM_R18

12

PC149

5

VDD

6
2
3

VTT

1

+

PC7

2

13

D

PQ53

PC9

4.7U_1206_16V6K

PR3

1 2

0_0402_5%

2

G

2N7002_SOT23

S

470P_0402_50V7K

+2.5V

12

12

PC8

0.1U_0402_16V4Z

1.8VS_EN#40

C C

B B

+2.5VS

12

PC10

4.7U_1206_16V6K@

(1.25V)

+SDREF

A A

PU8

1

HSD

2

COMP

4

GND

MAX1954EUB_10UMAX

+1.25VSP

5

IN

PGND

BST

DH

LX

DL

FB

12

12

21

10

12

8

9

6

7

3

PR227
PR229

ADP_I35,43

PC191

0.1U_0402_16V7K

PC5

0.1U_0402_16V7K

PD9

EP10QY03

0.1U_0603_25V7K

PC189

64.9K_0402_1%

249K_0402_1%

PR4 11.5K_0402_1%@

1 2

12

PC145

4.7U_1206_25V6K

PQ52

8

1

G1

D1

2

7

D1

S1/D2

3

6

G2

S1/D2

5

4

S1/D2

S2

SI4814DY_SO8

120W 90W

12

VL

PC101

0.01U_0603_50V7K

@

+2.5V

12

PC4

1U_0603_10V4Z

12

4.7U_1206_25V6K

PL18

2.2UH_PLFC1235P-2R2A_6A_30%

1 2

11.5K_0402_1%

PR172

9.09K_0402_1%

84.5K_0402_1%

200K_0402_1%

PR227 64.9K_0402_1%@

1 2

PR229

1 2

@

249K_0402_1%

PR228

100K_0402_1% @

PC146

PR170

+1.8VSP

12

12

3
2

12

12

PC3

1000P_0402_50V7K@

1

PC148

+

2

220U_D2_4VM

1 2

VS

8

PU6A

P

+

-

G

4

O

PR226

1M_0402_1%@

LM393M_SO8@

1

+

PC147

220U_D2_4VM@

2

VL

12

12

PC2

0.1U_0603_50V4Z@

1

PR223
47K_0402_1%@

2

PU6B

G

PC1
10P_0402_50V8K@

7

O

LM393M_SO8@

12

8

5

P

+

6

-

G

4

H_PROC HOT# 5,26

13

D

PQ1

2N7002_SOT23@

S

Compa l El e c t ro nics , Ltd.

Title

THIS SHEE T OF E N GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTH ORIZED B Y COMPAL E LECTRON ICS, INC . NEITH ER THIS S HEET NOR THE INFO RMATION IT CONT AINS

5

4

MAY BE US ED B Y O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONI CS, INC.

3

2

+1.25VSP/+1.8VSP

Size Docume nt Nu mb e r Re v

Custom

LA-2051

Date: Sheet

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRA
SECRET I NF OR M A TI O N. TH I S S HE ET M A Y NOT BE TR A NS F ERRED FROM T
CUSTODY O F THE C OM PE TE NT D I VI S I O N O F R &D D E PAR T MENT EXCEPT A
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO AN
THIRD PA R TY W ITHOUT PRI O R W RITTEN C O NS E NT O F C OM PA L EL E CTRO
INC.

of

46 51Friday, November 14, 2003

1

1.0

A

B

C

D

12

12

PR1
0_0402_5%

+5VALWP

12

PR177

0_0402_5%@

PU2

32

VCC

1

VID4

2

VID3

3

VID2

4

VID1

5

VID0

6

VID12.5

34

ENLL

33

DRSEN

35

DSEN#

10

OCSET

11

SOFT

9

DSV

36

FS

37

DRSV

38

VR-TT#

40

NTC

12

GND

19

GND

ISL6247_MLFP40

120W 90W

RAMPS

PGOOD

PWM1

ISEN1+

ISEN1-

PWM2

ISEN2+

ISEN2-

PWM3

ISEN3+

ISEN3-

PWM4

ISEN4+

ISEN4-

COMP

VDIFF

VSEN
VRTN

NC

OFS

B+

7
39

25
24

23

26
27

28

20
21

22

31
30

29

15

13

FB

14
16

17
18

8

340K_0402_1%

PC157 0.1U_0402_16V4Z

Battery Feed
Forward

PR178

80.6K_0402_1%

1 2

PR180

PR5

1 2

PR202

12

12

12

10K_0402_1%

0_0402_5%@

PC1522200P_0402_50V7K

Place close to IC

+5VS

+5VS

22P_0402_25V8K

1U_0603_10V4Z

PC153

VGATE 17

PWM1 48
ISEN1+ 48
ISEN1- 48
PWM2 48
ISEN2+ 48
ISEN2- 48
PWM3 49
ISEN3+ 49
ISEN3- 49

PWM4 49
ISEN4+ 49

ISEN4- 49

PR189

12

1 2

20K_0402_1%

12

PR192 0_0402_5%@

12

PC155 1000P_0402_50V7K@

12

PC158

PR204

12

0_0402_5%

12

PR205 0_0402_5%@
PR206

12

0_0402_5%

PR208

12

0_0402_5%@

12

PR195 2.49K _0402_1%

1 2

Remote
Sensing

+CPU_CORE

VCCSENSE 5

Place near +VCC_CORE
output capacitor

VSSSENSE 5

+5VS

1 1

12

PC150
1U_0603_10V4Z

CPU_VID45
CPU_VID35
CPU_VID25
CPU_VID15
CPU_VID05

CPU_VID55

12

PR186
274_0402_1%

12

PR190

16.9K_0402_1%

ENLL38

PC151

0.047U_0603_25V7M

7

0

LM358A_SO8

PR194
10K_0402_1%

PU12B

5

+

6

-

PR193

100K_0402_1%

Frequency Select

12

PM_DPRS LPVR26

PM_STPCPU#5,10,16,26

2 2

1 2

PR183 0_0402_5%

PR184 0_0402_5%

12

12

PC154

100P_0603_50V8J

1 2

3 3

PR198

45.3K_0402_1%

1 2

PR186 360_0402_1% 274_0402_1%

PR190 20K_0402_1% 16.9K_0402_1%

PR207

0_0402_5%

VR_ON35

12

VID_PWRGD38

12

PC159

4.7U_1206_16V6K

PR211 0_0402_5%

+3VALWP

4 4

PU5

1

IN

4

PG

3

EN

MIC5258_SOT23-5

12

PR212
100K_0402_1%

5

OUT

2

GND

+1.2VP

12

PC160

4.7U_1206_16V6K

1 2

Compa l El e c t ro nics , Ltd.

Title

THIS SHEE T OF E N GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTH ORIZED B Y COMPAL E LECTRON ICS, INC . NEITH ER THIS S HEET NOR THE INFO RMATION IT CONT AINS

A

B

MAY BE US ED B Y O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONI CS, INC.

C

CPU_CORE_Controller

Size Documen t Num be r R e v

B

LA-2051

Date: Sheet

D

of

47 51Friday, November 14, 2003

1.0

A

+5VS

+5VALWP

12

12

PR7
0_0402_5%

1 1

+5VP1

PWM147

PR215
499K_0402_1%

1 2

PR214 0_0402_5%

PC166

0.1U_0603_25V7K

PR6

0_0402_5% @

12

1 2

PC167
1U_0805_16V7K

1 2

1 2

6
3
7
4

PR237

2.2_0402_5%

PU1

BOOT

VCC
PWM

UGATE

EN

PHASE

LGATE

GND

ISL6207CB-T_SO8

PC161

2
1
8
5

12

EP10QY03 @

PD11

CPU_DRIVE_EN

ISEN1-47
ISEN1+47

1 2

2 2

6

PC174

3
7
4

1 2

PWM247

PR220
499K_0402_1%

1U_0805_16V7K

PR238

2.2_0402_5%

PU3

BOOT

VCC
PWM

UGATE

EN

PHASE

LGATE

GND

ISL6207CB-T_SO8

PC170

1 2

2
1
8
5

EP10QY03@

1 2

0.22U_0805_16V7K

21

PR213

1 2

0_0402_5%

PQ61

SI4362DY_SO8

0.22U_0805_16V7K

PD12

21

PR218

1 2

0_0402_5%

PQ65

SI4362DY_SO8

B

5

PQ59
SI7392DP_SO8

3

241

5

4

5

D8D7D6D

S1S3G

S

2

4

D8D7D6D

S1S3G

S

2

PQ62
SI4362DY_SO8

1 2

PC162

4.7U_1206_25V6K

CPU_B+

12

CPU_B+

5

PQ63
SI7392DP_SO8

3

241

5

4

5

D8D7D6D

S

S1S3G

S

4

2

2

PQ66

D8D7D6D

SI4362DY_SO8

S1S3G

12

PC171

4.7U_1206_25V6K

PC165

4.7U_1206_25V6K

12

PC172

4.7U_1206_25V6K

C

12

PC163

4.7U_1206_25V6K

1 2

0.56UH_ETQP4LR56WFC_21A_20%

PR217 34.8K _0402_1%

12

PC173

4.7U_1206_25V6K

0.56UH_ETQP4LR56WFC_21A_20%

12

PR221 34. 8K_0402_1%

1

+

PC164

2

PL2

12

PL3

1 2

1

PC6

+

220U_25V_M

2

PC168

12

0.01U_0603_50V7K

12

PH4 820_0402_5%

Local Transistor
Swtich Decoupling

PC175

12

0.01U_0603_50V7K

220U_25V_M@

1 2

PL1 C8B BPH 853025_2P

12

PD6
EC31QS04

D

B+

+CPU_CORE

ISEN2-47

3 3

4 4

ISEN2+47

THIS SHEE T OF E N GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTH ORIZED B Y COMPAL E LECTRON ICS, INC . NEITH ER THIS S HEET NOR THE INFO RMATION IT CONT AINS

A

B

MAY BE US ED B Y O R DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONI CS, INC.

C

12

PH5 820_0402_5%

Compa l El e c t ro nics , Ltd.

Title

CPU_CO R E _P o w er stage

Size Documen t Num be r R e v

Custom

LA-2051

Date: Sheet

D

48 51Friday, November 14, 2003

1.0

of

5

4

3

2

1

CPU_DRIVE_EN

+5VP1

D D

PWM347

PR224
499K_0402_1%

1 2

ISEN3-47

C C

B B

ISEN3+47

PWM447

ISEN4-47
ISEN4+47

PC182

1U_0805_16V7K

12

PR234
499K_0402_1%

UNPOP

POP

1 2

0.22U_0805_16V7K

2.2_0402_5%

EP10QY03@

PD13

6
3
7
4

1 2

12

PC187
1U_0805_16V7K

PU4

BOOT

VCC
PWM

UGATE

EN

PHASE
LGATE

GND

ISL6207CB-T_SO8

1 2

PU9

6

BOOT

VCC

3

PWM

UGATE

7

EN

PHASE

4

LGATE

GND

ISL6207CB-T_SO8

2
1
8
5

PR230

2.2_0402_5%

21

PR222

1 2

0_0402_5%

PC183 0.22U_0805_16V7K

1 2

EP10QY03@
PD20

21

2

PR231

1 2

1

0_0402_5%

8
5

PQ69

SI4362DY_SO8

3 PHASE

PU9,PC187,PR234,PR230,PC183,PQ71

PQ73,PQ74,PR231,PR235,PL5,PC188,PH7

PR5

5

PQ67
SI7392DP_SO8

3

241

5

S

4

2

5

S

4

2

D8D7D6D

S1S3G

5

3

D8D7D6D

PQ73

SI4362DY_SO8

S1S3G

241

5

S

4

2

PQ71
SI7392DP_SO8

5

S

4

2

PQ70

D8D7D6D

SI4362DY_SO8

S1S3G

D8D7D6D

PQ74
SI4362DY_SO8

S1S3G

12

PC178

4.7U_1206_25V6K

12

PC184

4.7U_1206_25V6K

4 PHASE

PR5

PU9,PC187,PR234,PR230,PC183,PQ71

PQ73,PQ74,PR231,PR235,PL5,PC188,PH7

PC177

PR236

1 2

CPU_B+

12

PC179

4.7U_1206_25V6K

CPU_B+

12

PC185

4.7U_1206_25V6K

PR225 34.8K_0402_1%

PR235 34.8K_0402_1%

12

PC180

4.7U_1206_25V6K

PL4

0.56UH_ETQP4LR56WFC_21A_20%

12

12

Local Transistor
Swtich Decoupling

12

PC186

4.7U_1206_25V6K

PL5

1 2

0.56UH_ETQP4LR56WFC_21A_20%

1 2

PC181

12

0.01U_0603_50V7K

12

PH6 820_0402_5%

1 2

PC188 0.01U_0603_50V7K

1 2

PH7 820_0402_5%

+CPU_CORE

A A

Compa l El e c t ro nics , Ltd.

Title

THIS SHEE T OF E N GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D

5

4

DEPARTMENT EXCE PT AS AUTH ORIZED B Y COMPAL E LECTRON ICS, INC . NEITH ER THIS S HEET NOR THE INFO RMATION IT CONT AINS

3

2

CPU_CORE_Power stage

Size Docume nt Nu mb e r Re v

Custom

LA-2051

Date: Sheet

of

49 51Friday, November 14, 2003

1

1.0

REV 0.1

09/12 P.13,P.14

DescriptionDate Page

Location

DEL RP40,RP43,RP44,RP54,RP59,RP64,RP67,RP70,RP74,RP82,RP5,RP8,RP10,RP12,RP16,RP26,RP29,RP31,RP34,RP36.Del DDR data damping

09/12 P.13,P.14 Add DDR address & control damping ADD R592,R593.R594,R595,R596,R597,R598,R599

09/15 P.27 LPC_SMI# Pull high to +3V LPC_SMI# connect to RP50 Pin 1

09/16 P.27 Del ATI USB feedback resistor DEL R438,R439,R446,R448,R434,R435

09/16 P.31 Change USB form NEC to ATI DEL R34,R40,R373,R374,R371,R372,R575,R573,R345

ADD R30,R48,R363,R364,R365,R366,R574,R576,R344

09/20 P.18 Change LVDS Conn to 40 pin Change JP1

09/20 P.16 Disconnect CPU_STP# & PCI_STP# DEL R579,R580

09/20 P.24 Del external USB chip DEL U27,R516,R241,R510,R303,R511,R302,R300,R315,R245,U28,R244,R304,R530,R524,R508,R509,R507,C242,

09/22 P.33 Add bead between +5VS & +5V_AMP

ADD R577,R578

C286,Y3,R273,R297,R298,RP83,RP66,C654,C655,C647,C646,R305,R551,R494,R496

ADD L44,L45

09/22 P.32 Reserve LAN AC97-link to MDC Reserve ADD R604,R605,R606,R607,R608,R609,R610,R612

10/15 P.27,35 Fix PME function Del R421 and change EC591 EC_SWI#(pin70) connect to SB200 EXT_EVENT1 to SB200 GEVENT3#,Del LPC_PME#

10/15 P.10,16 Change NB CLK Voltage Change R161=68,R506=56

10/16 P.27 Add USB 48M OSC Add R614,R615,R616,C723,X5

10/16 P.8,13,14 Add 0.1uF between +SDREF & +2.5V Add C724,C725,C726

Change R to L

Solve CMOS reset when AC-IN

10/17 Change PCIRST# to NB_RST# for ATI

10/17

P.35

suggestion,change SIO and IDE & EC

P.10 Modify Q45 Mirror Q45

Change R460,R475,R528 to L47,L48,L49P.2810/16

Change R589 from 1k to 0 ohmP.2610/16

Add R617,R618,R619,R620

10/17 P.26 Modify R558 Reserve R558

10/17 P.26 Modify R558 Reserve R558

10/17 P.27,31 Change USB port form 0~2 to 1~3, because Port 0 have some problem

10/17 P.28 Change R432 from 1k to 100 ohm for ATI suggestion

10/20 P.33 change R312 from 3k to 4.3k to follow DBL10 gain

10/20 P.33 Add L50,L51,L52,L53 for EMI request

10/20 P.37 Add D57 for ESD

10/20 P.25 change C252 form 10P to 18P for EMI

10/23 P.34 Del R116 to fix FIR signal level drop

10/23 P.31 Add C26,C27,C28,C29 for USB 2.0 EMI

10/23 P.26 Change R242 from 33ohm to 39ohm for EMI

11/07 P.26,35 Change X1,Y4 footprint

11/07 P.35 Add R621,R623-R626 for board ID

11/07 P.39

11/07

P.17

C35 change to X7R

Delete R106 for SB_PWRGD timing

11/07 P.34 Add R116 for FIR disconnect Issue

11/07 P.15 C322,C686,C92,C93 change to 220uF/25mohm for RST issue

11/07 P.38 Delete J1,J2 for EMI

11/13 P.26 Add R627 for USB2.0 wakeup
11/14 P.9 Add R628 for ENVDD goes high issue

THIS SHEET OF ENGINEERIN G DRAWI NG IS T HE PROPR IETARY PR OPERTY O F CO MPAL ELECT RONI CS, INC. AND CONTAINS C ONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSF ERED FR OM TH E CUSTO DY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZ ED BY CO MPAL ELECTR ONIC S, INC. N EITHER T HIS SHEET NOR THE INFORMATI ON IT CONTAINS
MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WIT HOUT PRIO R WRITT EN CO NSENT O F COMPAL ELECTRONICS , INC.

Compal Electronics, Ltd.

Title

HW PIR

Size Doc u m ent Number Re v

Custom

LA-2051

Date: Sheet of

50 51Friday, November 14, 2003

1.0

5

10/28

P.40
10/28 P.41.43
10/28 P.42.43
10/28
10/28

P.44

P.44.45

D D

C C

B B

Delete PL11 for mechanic request
Change PC7,PC74,PC80 from SGA20151300 to SGA20151320 for battery only not boot
Change PC148,PC135,PC136,PC140 from SGA20221150to SGA20221130 for battery only not boot
Change PC152 from SE074102K00 to SE074222K00 for prevent DBL10 system cannot resume from standby
Add PR7,PR1 delete PR177 to prevent DBL10 system cannot resume from standby

4

3

2

1

A A

Title

POWER PI R

Size Docume nt Nu mb e r Re v

LA-2051 1.0

Custom

5

4

3

2

Date: Sheet

of

51 51Friday, November 14, 2003

1