Quanta LA-2461, Satellite M30, Satellite M35 Schematic

A

1 1

B

C

D

E

Compal Confidential

2 2

Fortworth Banias
EAL20 LA-2461 Schematic

uFC-PGA Dothan / Montara-GM+

3 3

M11P-128M VRAM / ICH4-M

2004-07-21

REV: 0.3

4 4

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET N OR THE INFORMA TION IT CONTAI NS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Re v

Date: Sheet

Compal Electronics, Inc.

Cover Sheet

, 04, 2004

三八月

EAL20 LA-2461

星期

E

0.3

of

147

A

B

C

D

E

Compal Confidential

Model Name : EAL20

Fan Control

page 4

File Name : LA-2461

1 1

LCD Conn.

page 20

CRT Conn.

TV-OUT Conn.

page 21

page 21

ATI M11-P

BGA-708 Pin

with 32/64/128MB
On Board VRAM

page 13,14,15,16,17,18

AGP4X/DVO

1.5V 266MHz

TV Encoder

CH-7011A

2 2

IDSEL:AD16
(PIRQE#,
GNT#0,
REQ#0)

IEEE 1394a
VIA VT6301S

page 27

IDSEL:AD18
(PIRQ[G..H]#,
GNT#3/4,
REQ#3/4)

Mini PCI
socket

page 30

IDSEL:AD17
(PIRQB#,
GNT#1,
REQ#1)

1394 Conn.

page 27

3 3

RTC CKT.

page 24

page 19

3.3V 33 MHz

LAN

RTL8100CL

page 26

RJ45/RJ11

page 26

PCI BUS

IDSEL:AD20
(PIRQ[A..B]#,
GNT#2,
REQ#2)

CardBus

ENE CB714/CB1410

5 in 1 Slot

page 29

ENE KB910

page 34

Mobile Banias/Dothan
Celeron-M

uFCPGA-478 CPU

H_A#(3..31) H_D#(0..63)

PSB

400MHz

Intel 855GME

uFCBGA-732

page 6,7,8,9

Hub-Link

Intel ICH4-M

BGA-421

page 28

Slot 0

page 29

LPC BUS

page 22,23,24

3.3V 33MHz

SMsC LPC47N217

Super I/O

page 4,5

USB 2.0

3.3V 48MHz

3.3V 24.576MHz

3.3V ATA-100

page 33

Thermal Sensor
ADI ADM1032AR

Memory BUS(DDR)

2.5V DDR200/266/333

IDE

CDROM
Conn.

HDD Conn.

SW DJ Ckt.

page 4

Clock Generator

Cypress CY28346ZCT-2

200pin DDR-SO-DIMM X2

BANK 0, 1, 2, 3

USB conn
x 2

USB conn
x 1

Port 2,3

page 35

Port 4

page 35

AC-LINK

AC97 Codec

page 25

ALC250 Ver.C

page 31

AMP

page 25

TPA0232

page 32

Audio Board

page 25

Conn

LS-2463

page 12

page 10,11

MDC Conn

page 32

page 31

EAL20 Sub Board

LED/SW Board
Conn
LS-2462

page 36

T/P Board
Conn
LS-2461

page 36

Power On/Off CKT.

page 37

Touch Pad

Int.KBD

page 36

PARALLEL

page 33

FIR

page 33

WL-KSW Board

LS-2464

DC/DC Interface CKT.

4 4

page 38

512KB BIOS

page 35

Power Circuit DC/DC

page 38,39,40,41
42,43,44,45

A

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Block Diagram

EAL20 LA-2461

星期三 八月

0.3

of

247, 04, 2004

E

A

Voltage Rails

Symbol note:

:means digital ground.

Power Plane

VIN

B+

+CPU_CORE

+VCCP

+1.25VS

+VGA_CORE

+1.35VS 1.35V switched power rail for GMCH core power ON OFF OFF

+1.5VALW

+1.5VS

+1.8VS

+2.5V

+2.5VS

+3V

+3VALW

+3V ON ON OFF

+3VS

+5VALW

+5VS

+12VALW

RTCVCC

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

1 1

ICH4-M I2C / SMBUS ADDRESSING

DEVICE

DDR SO-DIMM 0

DDR SO-DIMM 1

CLOCK GENERATOR (EXT.)

Description

Adapter power supply (19V)

AC or battery power rail for power circuit

Core voltage for CPU

1.05V rail for Processor I/O

1.25V switched power rail for DDR Vtt

1.2V/1.0V switched power rail f or VGA core p ower

1.5V always on powe r rail

1.5V switched power rail fo r AGP inter face

1.8V switched power rail for CPU PLL & Hub-Link

2.5V power rail for system DDR

2.5V power rail for VGA D DR

3.3V always on powe r rail

3.3V switched power rail

3.3V switched power rail

5V always on power r ail

5V switched power rail

12V always on power rail

RTC power

HEX

A0

A2

D2

ADDRESS

1 0 1 0 0 0 0 X

1 0 1 0 0 0 1 X

1 1 0 1 0 0 1 X

S0-S1

N/A

ON OFF

ON

ON

ON

ON

ON

ON

ON

ON OFF

ON

ON

ON

ON

ON

OFF

OFF

OFF

ON

OFF

OFF

ON

ON

OFF

ON

OFF

ON

ON

S3

S5

N/A

N/A

N/AN/A

N/A

OFF

OFF

OFF

OFF

ON*

OFF

OFF

OFF

OFF

ON*

OFF

ON*

OFF

ON*

ONON

:means analog ground.
:means reserved.@

Fortworth Banias Comparison Table

Item

VGA

VRAM

TV Encoder

*

Descrite

ATI M11P

128MB/64MB

N/A

UMA

N/A

CH7011A

PageUMA

13 ~ 16

13 ~ 14

19

Board ID Table for AD channel

Vcc 3.3V +/- 5%

BID/PID

0
1
2
3
4
5 3.465 V3.135 V

10K +/- 5%Ra

Rb/Rc V min

0

8.2K +/- 5%

AD_BID

0 V

1.412 V 1.560 V
18K +/- 5%
33K +/- 5%
56K +/- 5%

NC 3.300 V

V typ

AD_BID

0 V 0 V

1.486 V

2.121 V

2.533 V

2.800 V

V

AD_BID

max

2.227 V2.015 V

2.659 V2.406 V

2.940 V2.660 V

KB910 I2C / SMBUS ADDRESSING

DEVICE

SM1 24C16

SM1 SMART BATTERY

SM2 ADM0132
CPU THERMAL MONITOR

External PCI Devices

DEVICE

1394

LAN

CARD BUS

Mini-PCI

AGP BUS

PCI Device ID

D0

D1

D4

D2

N/A

HEX

A0H

98H

00HSM2 ALC250 AUDIO CODEC 0 0 0 0 0 0 0 X b

ADDRESS

1 0 1 0 0 0 0 X b

0 0 0 1 0 1 1 X b16H

1 0 0 1 1 0 0 X b

IDSEL #

AD16

AD17

AD20

AD18

AGP_DEVSEL#

REQ/GNT #

0

1

2

2B5IN1 D4 AD20

3,4

N/A

PIRQ

E

F

A

G,H

A

Board ID

0

*

1
2
3
4
5
6
7

PCB Revision

0.1

0.2

0.3

0.4

0.5

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET N OR THE INFORMA TION IT CONTAI NS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

Title

Size Document Number Re v

Date: Sheet

Compal Electronics, Inc.

Notes List

EAL20 LA-2461

星期

, 04, 2004

三八月

of

347

0.3

A

P4
U4
V3
R3
V2

W1

T4

W2

Y4
Y1
U1

AA3

Y3
AA2
AF4
AC4
AC7
AC3
AD3
AE4
AD2
AB4
AC6
AD5
AE2
AD6
AF3
AE1
AF1

R2

P3

T2

P1

T1

U3
AE5

A16
A15

B15
B14

N2

L1

J3

N4

L4

H2

K3

K4

A4

J2
B11

H1

K1

L2

M3

C8

B8

A9

C9

A7

M2

B7
C19
A10
B10
B17

E4

A6
A13
C12
A12

C5
F23
C11
B13

B18
A18
C17

U12A

A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#

ADDR GROUP

A25#
A26#
A27#
A28#
A29#
A30#
A31#

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#

ADSTB0#
ADSTB1#

ITP_CLK0
ITP_CLK1

BCLK0
BCLK1

ADS#
BNR#
BPRI#
BR0#
DEFER#
DRDY#
HIT#
HITM#
IERR#
LOCK#
RESET#

RS0#
RS1#
RS2#
TRDY#

BPM0#
BPM1#
BPM2#
BPM3#

DBR#
DBSY#
DPSLP#
DPWR#
PRDY#
PREQ#
PROCHOT#

PWRGOOD
SLP#
TCK
TDI
TDO
TEST1
TEST2
TMS
TRST#

THERMDA
THERMDC
THERMTRIP#

mFCBGA479

+VCCP

HOST CLK

CONTROL GROUP

THERMAL
DIODE

1 2

R152
56_0402_5%

+VCCP

H_A#[3..31]

H_REQ#[0..4]

H_ADSTB#0<6>
H_ADSTB#1<6>

CLK_CPU_ITP<12>
CLK_CPU_ITP#<12>

CLK_CPU_BCLK<12>
CLK_CPU_BCLK#<12>

H_DEFER#<6>

H_CPURST#<6>

R145

1 2

150_0402_1%

ITP_DBRESET#

1 2

R374
330_0402_5%

H_CPUSLP#<22>

R146 1K_0402_5%@

1 2

R378

12

A

H_ADS#<6>

H_BNR#<6>
H_BPRI#<6>
H_BR0#<6>

H_DRDY#<6>

H_HIT#<6>

H_HITM#<6>

H_LOCK#<6>

H_RS#0<6>

H_RS#1<6>

H_RS#2<6>

H_TRDY#<6>

R150 0_0402_5%

H_DBSY#<6>
H_DPSLP#<7,22>

H_DPWR#<7>

1K_0402_5%@

H_PROCHOT#

H_A#[3..31]<6>

4 4

H_REQ#[0:4]<6>

3 3

+VCCP

+3VALW

ITP_DBRESET#<23>

2 2

H_CPUPWRGD<22>

1 1

H_IERR#

H_CPURST#

H_RS#0
H_RS#1
H_RS#2

1 2

H_PROCHOT#

H_CPUPWRGD
H_CPUSLP#

ITP_TCK

ITP_TDI
ITP_TDO
TEST1
TEST2
ITP_TMS
ITP_TRST#

H_THERMDA
H_THERMDC
H_THERMTRIP#

R148 56_0402_5%

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

1 2

Banias

MISC

B

DATA GROUP

LINT0/INTR

LINT1/NMI

LEGACY CPU

B

D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

DINV0#
DINV1#
DINV2#
DINV3#

DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#

A20M#
FERR#

IGNNE#

INIT#

STPCLK#

SMI#

H_D#[0..63]

H_D#0

A19

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#

A25
A22
B21
A24
B26
A21
B20
C20
B24
D24
E24
C26
B23
E23
C25
H23
G25
L23
M26
H24
F25
G24
J23
M23
J25
L26
N24
M25
H26
N25
K25
Y26
AA24
T25
U23
V23
R24
R26
R23
AA23
U26
V24
U25
V26
Y23
AA26
Y25
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26

D25
J26
T24
AD20

C23
K24
W25
AE24
C22
L24
W24
AE25

C2
D3
A3
B5
D1
D4

C6
B4

H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_A20M#

H_IGNNE#
H_INIT#
H_INTR
H_NMI

H_STPCLK#
H_SMI#

H_DINV#0 <6>
H_DINV#1 <6>
H_DINV#2 <6>
H_DINV#3 <6>

H_DSTBN#0 <6>
H_DSTBN#1 <6>
H_DSTBN#2 <6>
H_DSTBN#3 <6>
H_DSTBP#0 <6>
H_DSTBP#1 <6>
H_DSTBP#2 <6>
H_DSTBP#3 <6>

H_A20M# <22>
H_FERR# <22>
H_IGNNE# <22>
H_INIT# <22>
H_INTR <22>
H_NMI <22>

H_STPCLK# <22>
H_SMI# <22>

H_D#[0..63] <6>

C

C412

0.1U_0402_16V4Z

1 2

EN_DFAN1<34 >

1 2

R358
10K_0402_5%

D

R144

54.9_0402_1%

@

1 2

+VCCP

1 2

R149 39.2_0603_1%

1 2

R151 150_0402_1%

Thermal Sensor ADI ADM1032AR

+3VS

2

12

C94

R121

@

1

1

C88

2

2200P_0402_25V7K

10K_0402_5%

0.1U_0402_16V4Z

ITP_TMS

ITP_TDI

W=15mil

H_THERMDA

H_THERMDC

ITP_TDOH_CPURST#

U11

1

VDD

2

D+

3

D-

THERM#4GND

ADM1032AR_SOP8

Address:1001_100X

Fan Control circuit

Joint use LM 358A with Power
Battery detect circuit.

PU5B

LM358A_SO8

5

+

6

-

1 2

R364 8.2K_0402_5%

FAN1_ON

7

0

1 2

R361 100_0402_5%

C410

0.1U_0402_16V4Z

FANSPEED1<34>

1

2

+3VS

+VCCP+VCCP

R147

54.9_0402_1%

@

1 2

1 2

R154 680_0402_5%

1 2

R153 27.4_0402_1%

8

SCLK

7

SDATA

6

ALERT#

5

+5VS

1

C

Q32

2

B

FMMT619_SOT23

E

3

12

D20
1N4148_SOD80

1 2

R297 10K_0402_5%

1

@

C310
1000P_0402_50V7K

2

E

ITP_TRST#

ITP_TCK

12

D21

1SS355_SOD323

FAN1_VOUT

EC_SMC_2 <31,34>

EC_SMD_2 <31,34>

1

2

1

@

C313
1000P_0402_50V7K

2

C397

10U_0805_10V4Z

JP7

1
2
3

ACES_85205-0300

Close to Fan Conn.

+VCCP

1 2

R155
56_0402_5%

H_THERMTRIP#

12

R156
56_0402_5%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONF IDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

THRMTRIP# <23>

D

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

INTEL CPU BANIAS (1 of 2)

EAL20 LA-2461

, 04, 2004

星期三 八月

E

of

447

0.3

A

B

C

D

E

+CPU_CORE

C97
10U_1206_6.3V6M

0.1U_0402_10V6K

1

1

1

C419

C454

2

2

2

0.1U_0402_10V6K

Title

Size Document Number Re v

Date: Sheet

U12C

F20

VCC

F22

VCC

G5

VCC

G21

VCC

H6

VCC

H22

VCC

J5

VCC

J21

VCC

K22

VCC

U5

VCC

V6

VCC

V22

VCC

W5

VCC

W21

VCC

Y6

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

POWER, GROUND

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

mFCBGA479

C399

0.1U_0402_10V6K

Banias

C437

AA5
AA7

AA9
AA11
AA13
AA15
AA17
AA19
AA21

AB6

AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22

AC9
AC11
AC13
AC15
AC17
AC19

AD8
AD10
AD12
AD14
AD16
AD18

AE9
AE11
AE13
AE15
AE17
AE19

AF10
AF12
AF14
AF16

AF18

M21

M24

Y22

AF8

M4
M5

N3

N6
N22
N23
N26

P2

P5
P21
P24

R1

R4

R6
R22
R25

T3

T5
T21
T23

1

2

Compal Electronics, Inc.

INTEL CPU BANIAS (2 of 2)

, 04, 2004

三八月

EAL20 LA-2461

星期

E

T26

VSS

U2

VSS

U6

VSS

U22

VSS

U24

VSS

V1

VSS

V4

VSS

V5

VSS

V21

VSS

V25

VSS

W3

VSS

W6

VSS

W22

VSS

W23

VSS

W26

VSS

Y2

VSS

Y5

VSS

Y21

VSS

Y24

VSS

AA1

VSS

AA4

VSS

AA6

VSS

AA8

VSS

AA10

VSS

AA12

VSS

AA14

VSS

AA16

VSS

AA18

VSS

AA20

VSS

AA22

VSS

AA25

VSS

AB3

VSS

AB5

VSS

AB7

VSS

AB9

VSS

AB11

VSS

AB13

VSS

AB15

VSS

AB17

VSS

AB19

VSS

AB21

VSS

AB23

VSS

AB26

VSS

AC2

VSS

AC5

VSS

AC8

VSS

AC10

VSS

AC12

VSS

AC14

VSS

AC16

VSS

AC18

VSS

AC21

VSS

AC24

VSS

AD1

VSS

AD4

VSS

AD7

VSS

AD9

VSS

AD11

VSS

AD13

VSS

AD15

VSS

AD17

VSS

AD19

VSS

AD22

VSS

AD25

VSS

AE3

VSS

AE6

VSS

AE8

VSS

AE10

VSS

AE12

VSS

AE14

VSS

AE16

VSS

AE18

VSS

AE20

VSS

AE23

VSS

AE26

VSS

AF2

VSS

AF5

VSS

AF9

VSS

AF11

VSS

AF13

VSS

AF15

VSS

AF17

VSS

AF19

VSS

AF21

VSS

AF24

VSS

0.3

of

547

+CPU_VCCA

C74

1

C113

150U_D2_6.3VM

2

+CPU_CORE

1

+

C333
220U_D2_2VM

@

2

+CPU_CORE

+CPU_CORE

+CPU_CORE

+CPU_CORE

+CPU_CORE

1

2

+

10U_1206_6.3V6M

1

C387

2

10U_1206_6.3V6M

1

C409

2

10U_1206_6.3V6M

10U_1206_6.3V6M

1

C42

2

10U_1206_6.3V6M

10U_1206_6.3V6M

1

C425

2

10U_1206_6.3V6M

10U_1206_6.3V6M

1

C40

2

10U_1206_6.3V6M

Vcc-core
Decoupling
SPCAP,Polymer

10U_1206_6.3V6M

1

C71

2

0.01U_0402_16V7K

1

1

@

C457

2

2

0.1U_0402_10V6K

1

+

C334
220U_D2_2VM

2

1

1

C382

C38

2

2

10U_1206_6.3V6M

10U_1206_6.3V6M

1

1

C424

C442

2

2

10U_1206_6.3V6M

1

1

C75

C63

2

2

10U_1206_6.3V6M

1

1

C408

C373

2

2

10U_1206_6.3V6M

1

1

C76

C62

2

2

10U_1206_6.3V6M

35X10uF

10U_1206_6.3V6M

1

C34

2

0.1U_0402_10V6K

1

C434

2

0.1U_0402_10V6K

10U_1206_6.3V6M

1

C52

2

10U_1206_6.3V6M

1

C80

2

10U_1206_6.3V6M

1

C446

2

10U_1206_6.3V6M

1

C374

2

10U_1206_6.3V6M

1

C77

2

1

1

C37

2

2

0.01U_0402_16V7K

0.1U_0402_10V6K

1

C413

2

1

+

C336
220U_D2_2VM

2

1

C443

2

10U_1206_6.3V6M

1

C43

2

10U_1206_6.3V6M

1

C444

2

10U_1206_6.3V6M

1

C441

2

10U_1206_6.3V6M

1

C78

2

10U_1206_6.3V6M

ESR, mohm

12m ohm/4

5m ohm/35MLCC 0805 X5R

10U_1206_6.3V6M

1

C58

C64

2

1

1

C392

2

2

0.1U_0402_10V6K

1

+

C335
220U_D2_2VM

2

10U_1206_6.3V6M

1

1

C385

2

2

10U_1206_6.3V6M

1

1

C39

2

2

10U_1206_6.3V6M

1

1

C386

2

2

10U_1206_6.3V6M

1

1

C375

2

2

10U_1206_6.3V6M

1

1

C79

2

2

ESL,nHC,uF

3.5nH/44X220uF

0.6nH/35

1

C104

2

0.01U_0402_16V7K

0.1U_0402_10V6K

1

C456

C404

2

D

C383
10U_1206_6.3V6M

C41
10U_1206_6.3V6M

C384
10U_1206_6.3V6M

C51
10U_1206_6.3V6M

C445
10U_1206_6.3V6M

1

2

0.1U_0402_10V6K

R44 54.9_0402_1%

@

1 2
1 2

R45 54.9_0402_1%@

1 1

+1.8VS

+1.5VS

Dothan VCCA update(WW45 2003)
Dothan B-Step support 1.5V only for VCCA

2 2

Resistor placed within

0.5" of CPU pin.Trace
should be at least 25
miles away from any
other toggling signal.

+VCCP

12

R66
1K_0402_1%

3 3

R65

2K_0402_1%

4 4

1 2

1

C30
1U_0603_10V4Z

2

27.4_0402_1%

1

C29
220P_0402_50V7K

2

12

R88

54.9_0402_1%

Resistor placed within

0.5" of CPU pin.Trace
should be at least 25
miles away from any
other toggling signal.

A

R93

12

R60

27.4_0402_1%

R75

1 2

0_1206_5%

R108

1 2

0_1206_5%@

12

54.9_0402_1%

+VCCP

+CPU_CORE

CPU_VID0<45>
CPU_VID1<45>
CPU_VID2<45>
CPU_VID3<45>
CPU_VID4<45>
CPU_VID5<45>

R58

+CPU_VCCA

PSI#<45>

12

GTL_REF0

COMP0
COMP1
COMP2
COMP3

B

VCCSENSE
VSSSENSE

R158

1K_0402_5%@

U12B

AE7

VCCSENSE

AF6

VSSSENSE

F26

VCCA0

B1

VCCA1

N1

VCCA2

AC26

VCCA3

P23

VCCQ0

W4

VCCQ1

VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

PSI#

VID0
VID1
VID2
VID3
VID4
VID5

GTLREF0
GTLREF1
GTLREF2
GTLREF3

COMP0
COMP1
COMP2
COMP3

RSVD
RSVD
RSVD
RSVD

TEST3

mFCBGA479

Banias

POWER, GROUNG, RESERVED SIGNALS AND NC

D10
D12
D14
D16
E11
E13
E15
F10
F12
F14
F16

K6

L5

L21

M6

M22

N5

N21

P6

P22

R5

R21

T6
T22
U21

D6

D8
D18
D20
D22

E5

E7

E9
E17
E19
E21

F6

F8
F18

E1

E2

F2

F3

G3

G4

H4

AD26

E26

G1

AC1

P25
P26

AB2
AB1

B2
AF7
C14

C3

12

C16

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

A2
A5
A8
A11
A14
A17
A20
A23
A26
B3
B6
B9
B12
B16
B19
B22
B25
C1
C4
C7
C10
C13
C15
C18
C21
C24
D2
D5
D7
D9
D11
D13
D15
D17
D19
D21
D23
D26
E3
E6
E8
E10
E12
E14
E16
E18
E20
E22
E25
F1
F4
F5
F7
F9
F11
F13
F15
F17
F19
F21
F24
G2
G6
G22
G23
G26
H3
H5
H21
H25
J1
J4
J6
J22
J24
K2
K5
K21
K23
K26
L3
L6
L22
L25
M1

0.01U_0402_16V7K

+VCCP

+

C93

150U_D2_6.3VM

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPE TENT DIVISION OF R&D

C

5

4

3

2

1

H_A#[3..31]<4>

H_REQ#[0..4]<4>

D D

HUB_PD[0..10]<22>

C C

CLK_MCH_BCLK#<12>
CLK_MCH_BCLK<12>

B B

+1.35VS

H_A#[3..31]

H_REQ#[0..4]

HUB_PD[0..10]

H_ADSTB#0<4>
H_ADSTB#1<4>

1 2
1 2

H_DSTBN#0<4>
H_DSTBN#1<4>
H_DSTBN#2<4>
H_DSTBN#3<4>
H_DSTBP#0<4>
H_DSTBP#1<4>
H_DSTBP#2<4>
H_DSTBP#3<4>
H_DINV#0<4>
H_DINV#1<4>
H_DINV#2<4>
H_DINV#3<4>

H_CPURST#<4>

HUB_PSTRB<22>
HUB_PSTRB#<22>

12

W=10mil

HDVREF

HCCVREF
HAVREF

R390 27.4_0402_1%
R134 27.4_0402_1%

R461 37.4_0402_1%

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

HYSWING
HXSWING
HYRCOMP
HXRCOMP

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

CPURST#

HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9

HUB_PD10

HI_PSTRB
HI_PSTRB#
HUB_RCOMP
HUB_VSWING
HUB_VREF

U14A

Montara-GM(L)

P23

HA#3

T25

HA#4

T28

HA#5

R27

HA#6

U23

HA7#

U24

HA#8

R24

HA#9

U28

HA#10

V28

HA#11

U27

HA#12

T27

HA#13

V27

HA#14

U25

HA#15

V26

HA#16

Y24

HA#17

V25

HA#18

V23

HA#19

W25

HA#20

Y25

HA#21

AA27

HA#22

W24

HA#23

W23

HA#24

W27

HA#25

Y27

HA#26

AA28

HA#27

W28

HA#28

AB27

HA#29

Y26

HA#30

AB28

HA#31

R28

HREQ#0

P25

HREQ#1

R23

HREQ#2

R25

HREQ#3

T23

AA26

AD29
AE29

T26

K28
B18
H28
B20

K21

Y28
Y22

C27
E22
D18
K27
D26
E21
E18

E25
B25
G19

F15

J21
J17

J28

J25

W2
W6

W7

W3

W1

U7
U4
U3
V3

V6

T3
V5
V4

V2
T2
U2

HREQ#4
HADSTB#0
HADSTB#1

BCLK#
BCLK
HYSWING
HXSWING
HYRCOMP
HXRCOMP

HVREF0
HVREF1
HVREF2
HCCVREF
HAVREF

HDSTBN#0
HDSTBN#1
HDSTBN#2
HDSTBN#3
HDSTBP#0
HDSTBP#1
HDSTBP#2
HDSTBP#3
DINV0#
DINV1#
DINV2#
DINV3#

CPURST#

HL_0
HL_1
HL_2
HL_3
HL_4
HL_5
HL_6
HL_7
HL_8
HL_9
HL_10
HLSTB
HLSTB#
HLRCOMP
PSWING
HLVREF

HOST

RG82855GME_uFCBGA732

HUB I/F

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8

HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

ADS#

HTRDY#

DRDY#

DEFER#

HITM#

HIT#
HLOCK#
BREQ0#

BNR#

BPRI#

DBSY#

RS#0
RS#1
RS#2

K22
H27
K25
L24
J27
G28
L27
L23
L25
J24
H25
K23
G27
K26
J23
H26
F25
F26
B27
H23
E27
G25
F28
D27
G24
C28
B26
G22
C26
E26
G23
B28
B21
G21
C24
C23
D22
C25
E24
D24
G20
E23
B22
B23
F23
F21
C20
C21
G18
E19
E20
G17
D20
F19
C19
C17
F17
B19
G16
E16
C16
E17
D16
C18

L28
M25
N24
M28
N28
N27
P27
M23
N25
P28
M26
N23
P26
M27

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_D#[0..63]

H_ADS# <4>
H_TRDY# <4>
H_DRDY# <4>
H_DEFER# <4>
H_HITM# <4>
H_HIT# <4>
H_LOCK# <4>
H_BR0# <4>
H_BNR# <4>
H_BPRI# <4>
H_DBSY# <4>
H_RS#0 <4>
H_RS#1 <4>
H_RS#2 <4>

H_D#[0..63] <4>

HOST REF VOLTAGE

+VCCP

R137
301_0603_1%

1 2

R136

150_0603_1%

1 2

+VCCP

1 2

R427

100_0603_1%

1 2

HXSWING

R425

49.9_0603_1%

HAVREF

W=10mil W=10mil

2

C108

0.1U_0402_16V4Z

1

W=10mil

2

C516

0.1U_0402_16V4Z

1

HUB I/F REF VOLTAGE

+1.5VS

R171

80.6_0603_1%

1 2

HUB_VSWING

2

R172

51.1_0603_1%

R180

40.2_0603_1%

C145

0.1U_0402_16V4Z

1 2

C169

0.1U_0402_16V4Z

1 2

1

HUB_VREF

2

1

100_0603_1%

W=20mil

2

C146

0.01U_0402_16V7K

1

W=20mil

2

C170

0.01U_0402_16V7K

1

+VCCP

R138
301_0603_1%

1 2

HYSWING

R139

150_0603_1%

1 2

+VCCP

R417

49.9_0603_1%

1 2

R416

1U_0603_10V4Z

1 2

HUB_VSWING

HUB_VREF

2

C106

0.1U_0402_16V4Z

1

HDVREF

2

C494

1

(0.796V)

(0.35V)

W=20mil

2

C490

0.1U_0402_16V4Z

1

+VCCP

100_0603_1%

(0.7V)(0.7V)

R161

49.9_0603_1%

1 2

HCCVREF

R162

1 2

2

C119

1

1U_0603_10V4Z

W=10mil

(0.7V)(0.35V) (0.35V)

2

C122

0.1U_0402_16V4Z

1

A A

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET N OR THE INFORMA TION IT CONTAI NS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

INTEL 855GME-HOST(1/4)

Size Document Number Re v

Date: Sheet

EAL20 LA-2461

星期

, 04, 2004

三八月

1

of

647

0.3

5

DVOC_D[0..11]<13,19>

DVOB_D[0..11]<13>

AGP_SBA[0..7]<13>

D D

C C

B B

CLK_MCH_66M

R469

33_0402_5%

C565

22P_0402_50V8J

R451 100K_0402_5%

1 2

R434 100K_0402_5%

1 2

R445 100K_0402_5%

+1.5VS

R437 100K_0402_5%

AGP_BUSY#<13,23>

R419

10K_0603_5%

UMA@

Q35

BSN20_SOT23

RTCCLK<23>

2

G

UMA@

reserved for DVO mode

I2C BUS PULL UP DVO/AGP REF Voltage

MDVICLK
MDDCCLK
MDVIDATA
MDDCDATA

2.2K_1206_8P4R_5%

MI2CCLK

MI2CDATA

A A

DVOC_D[0..1 1]

DVOB_D[0..11]

AGP_SBA[0..7]

12

@

1

@

2

AGP_AD14

12

AGP_AD31

DVOBC_CLKINT

AGP_AD30

12

R422 0_0402_5%UMA@

1 2

DVOBC_CLKINT<13,19>

DVOC_CLK#<13,19>
DVOC_HSYNC<13,19>
DVOC_VSYNC<13,19>

AGPBUSY#

reserved for DVO mode

+1.5VS

1 2

R432

12

12

R426 1K_0402_5%

W=10mil

AGP_REQ#<13>

1 2

AGP_WBF#<13>
AGP_RBF#<13>

+1.5VS

1 2

13

D

S

40.2_0603_1%

RP50

1 8
2 7
3 6
4 5

R429 2.2K_0402_5%

R441 2.2K_0402_5%

5

AGP_ADSTB0<13>
AGP_ADSTB0#<13>
AGP_AD0<13>
AGP_AD1<13>
AGP_CBE#1<13>
AGP_AD14<13>

AGP_AD30<13>

DVOC_CLK<13,19>

AGP_AD18<13>
AGP_AD31<13>

MI2CCLK<13,19>
MI2CDATA<13,19>
MDVICLK<13>
MDVIDATA<13>
MDDCCLK<13>
MDDCDATA<13>

CLK_MCH_66M<12>

AGP_SBSTB<13>
AGP_SBSTB#<13>
AGP_GNT#<13>

AGP_ST2<13>
AGP_ST1<13>
AGP_ST0<13>

AGP_CBE#2<13>

AGP_PAR<13>

+AGP_VREF

+1.5VS

1 2

R442

1K_0603_1%

1 2

DVOB_D0
DVOB_D1
DVOB_D2
DVOB_D3
DVOB_D4
DVOB_D5
DVOB_D6
DVOB_D7
DVOB_D8
DVOB_D9
DVOB_D10
DVOB_D11

AGP_ADSTB0
AGP_ADSTB0#
AGP_AD0
AGP_AD1
AGP_CBE#1
AGP_AD14

AGP_AD30
DVOBC_CLKINT

DVOC_CLK
DVOC_CLK#
DVOC_HSYNC
DVOC_VSYNC
AGP_AD18
AGP_AD31

MI2CCLK
MI2CDATA
MDVICLK
MDVIDATA
MDDCCLK
MDDCDATA

DVOC_D0
DVOC_D1
DVOC_D2
DVOC_D3
DVOC_D4
DVOC_D5
DVOC_D6
DVOC_D7
DVOC_D8
DVOC_D9
DVOC_D10
DVOC_D11

AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7

AGP_PAR

+AGP_VREF
AGPBUSY#
DVORCOMP
CLK_MCH_66M

AGP_SBSTB
AGP_SBSTB#
AGP_GNT#
AGP_REQ#
AGP_ST2
AGP_ST1
AGP_ST0
AGP_WBF#
AGP_RBF#

AGP_CBE#2

R439
1K_0603_1%

+AGP_VREF

2

1

C533

0.1U_0402_16V4Z

4

U14B

Montara-GM(L)

R3

DVOBD0/(NC)

R5

DVOBD1/(NC)

R6

DVOBD2/(NC)

R4

DVOBD3/(NC)

P6

DVOBD4/(NC)

P5

DVOBD5/(NC)

N5

DVOBD6/(NC)

P2

DVOBD7/(NC)

N2

DVOBD8/(NC)

N3

DVOBD9/(NC)

M1

DVOBD10/(NC)

M5

DVOBD11/(NC)

P3

DVOBCLK/(NC)

P4

DVOBCLK#/(NC)

T6

DVOBHSYNC/(NC)

T5

DVOBVSYNC/(NC)

L2

DVOBBLANK#/(NC)

M2

DVOBFLDSTL/(NC)

G2

DVOBCINTR#

M3

DVOBCCLKINT

J3

DVOCCLK

J2

DVOCCLK#

K6

DVOCHSYNC

L5

DVOCVSYNC

L3

DVOCBLANK#

H5

DVOCFLDSTL

K7

MI2CCLK

N6

MI2CDATA

N7

MDVICLK

M6

MDVIDATA

P7

MDDCCLK

T7

MDDCDATA

K5

DVOCD0

K1

DVOCD1

K3

DVOCD2

K2

DVOCD3

J6

DVOCD4

J5

DVOCD5

H2

DVOCD6

H1

DVOCD7

H3

DVOCD8

H4

DVOCD9

H6

DVOCD10

G3

DVOCD11

E5

ADDID0

F5

ADDID1

E3

ADDID2

E2

ADDID3

G5

ADDID4

F4

ADDID5

G6

ADDID6

F6

ADDID7

L7

DVODETECT

D5

DPMS

F1

GVREF

F7

AGPBUSY#

D1

DVORCOMP

Y3

GCLKIN

AA5

RVSD0

F2

RVSD1

F3

RVSD2

B2

RVSD3

B3

RVSD4

C2

RVSD5

C3

GST[1]

C4

GST[0]

D2

RVSD8

D3

RVSD9

D7

RVSD10

L4

RVSD11

RG82855GME_uFCBGA732

+AGP_VREF

4

DVO

BLUE

BLUE#

GREEN

GREEN#

RED

RED#
HSYNC
VSYNC

REFSET

DDCACLK

DAC

DDCADATA

IYAM0
IYAM1
IYAM2
IYAM3
IYAP0
IYAP1
IYAP2
IYAP3
IYBM0
IYBM1
IYBM2
IYBM3
IYBP0
IYBP1
IYBP2

IYBP3
ICLKAM
ICLKAP
ICLKBM
ICLKBP

DDCPCLK

DDCPDATA

LVDS

PANELBKLTCTL

PANELBKLTEN

PANELVDDEN

LVREFH

LVREFL

LVBG

LIBG

DREFCLK

DREFSSCLK

LCLKCTLA
LCLKCTLB

CLKS

DPWR#/(NC)

DPSLP#

RSTIN#

PWROK

MISCNC

EXTTS0

MCHDETECTVSS

NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8

NC9
NC10
NC11

C9
D9
C8
D8
A7
A8
H10
J9
E8
B6
G9

G14
E15
C15
C13
F14
E14
C14
B13
H12
E12
C12
G11
G12
E11
C11
G10
D14
E13
E10
F10

GMCH_LCD_CLK

B4

GMCH_LCD_DATA

C5

G8
F8
A5

D12
F12

B12

LIBG

A10

CLK_MCH_48M

B7

CLK_SSC_66M

B17
H9

LCLKCTLB

C6

AA22
Y23

PCIRST#

AD28

J11

EXTTS

D6
AJ1

B1
AH1
A2
AJ2
A28
AJ28
A29
B29
AH29
AJ29
AA9
AJ4

3

GMCH_CRT_B <21>

GMCH_CRT_G <21>

GMCH_CRT_R <21>

GMCH_CRT_HSYNC <21>

REFSET

GMCH_CRT_VSYNC <21>

GMCH_CRT_CLK <21>
GMCH_CRT_DATA <21>

GMCH_TXOUT0- <20>
GMCH_TXOUT1- <20>
GMCH_TXOUT2- <20>

GMCH_TXOUT0+ <20>
GMCH_TXOUT1+ <20>
GMCH_TXOUT2+ <20>

GMCH_TZOUT0- <20>
GMCH_TZOUT1- <20>
GMCH_TZOUT2- <20>

GMCH_TZOUT0+ <20>
GMCH_TZOUT1+ <20>
GMCH_TZOUT2+ <20>

GMCH_TXCLK- <20>
GMCH_TXCLK+ <20>
GMCH_TZCLK- <20>
GMCH_TZCLK+ <20>

GMCH_LCD_CLK <20>
GMCH_LCD_DATA <20>

GMCH_ENVDD <20>

R409 1.5K_0603_1%

12

CLK_MCH_48M <12>
CLK_SSC_66M <12>

R420
127_0603_1%

1 2

1 2

C507 22P_0402_50V8J

GMCH_ENBKL <34>

+3VS

R421
510_0402_5%

@

1 2

33_0402_5% @

22P_0402_50V8J

R418

C491

@

2

CLK_SSC_66MCLK_MCH_48M

R142

@

33_0402_5%

1 2
2

1

C107

22P_0402_50V8J

unpoped for 1.05V FSB

LCLKCTLB: High for P4, NC for Banias

H_DPWR# <4>
H_DPSLP# <4,22>
PCIRST# <13,19,22,25,27,28,30>

VGATE <12,23,45>

1 2

R423 10K_0402_5%

Isolating AGP singals
(For M11P)

PCIRST#
AGP_ST0
GST0 AGP_ST1

AGP_ST2
GST2 AGP_PAR

+3VS

GST0

GST1

GST2

GPAR

*

U39

M11@

1

OE1#

VCC

2

1A

OE4#

3

1B

4
5
6

4A

OE2#

4B

2A

OE3#

2B

3A

GND73B

FST3125MTCX_SSOP14

1 2

R414 1K_0402_5%M1 1@

1 2

R406 1K_0402_5%M1 1@

1 2

R415 1K_0402_5%M1 1@

1 2

R407 1K_0402_5%M1 1@

R401 1K_0402_5%@

12

Starp Pin:

+5VS

14

PCIRST#

13
12

GST1

11
10
9

GPAR

8

+1.5VS

(For UMA)

AGP_ST0

AGP_ST1

AGP_ST2

AGP_PAR

DVODETECT(AGP_PAR):
HIGH for AGP, LOW for DVO

Starp pin list

ST2 ST1 ST0

00

0

0011

0
0

1

11

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET N OR THE INFORMA TION IT CONTAI NS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

PSB/Mem/GFX
400 / 266 / 200
400 / 200 / 200
400 / 200 / 133

400 / 333 / 250 *

2

1 2

2

@

1

*

R413 1K_0402_5%

*

R405 1K_0402_5%

*

R430 1K_0402_5%UMA@

*

R412 1K_0402_5%@

R411 1K_0402_5%UMA@

1

855GME DVO/AGP Pin Muxing

Ball DVO Mode AGP Mode

DVOBD0

R3

DVOBD1

R5

DVOBD2

R6

DVOBD3

R4

DVOBD4

P6

DVOBD5

P5

DVOBD6

N5

DVOBD7

P2

DVOBD8

N2

DVOBD9

N3

DVOBD10

M1

DVOBD11

M5

DVOBCLK

P3

DVOBCLK#

P4

DVOBHSYNC

T6

DVOBVSYNC

T5

DVOBBLANK

L2

DVOBFLDSTL

M2

DVOBCINTR#

G2

DVOBCCLKINT

M3

DVOCCLK

J3

DVOCCLK#

J2

DVOCHSYNC

K6

DVOCVSYNC

L5

DVOCBLANK

L3

DVOCFLDSTL

H5

MI2CCLK

K7

MI2CDATA

N6

MDVICLK

N7

MDVIDATA

M6

MDDCCLK

P7

MDDCDATA

T7

DVOCD0

K5

DVOCD1

K1

DVOCD2

K3

DVOCD3

K2

DVOCD4

J6

DVOCD5

J5

DVOCD6

H2

DVOCD7

H1

DVOCD8

H3

DVOCD9

H4

DVOCD10

H6

DVOCD11

G3

ADDID0

E5

ADDID1

F5

ADDID2

E3

ADDID3

E2

ADDID4

G5

ADDID5

F4

ADDID6

G6

ADDID7

F6

DVODETECT

L7

DPMS

D5

RVSD1

F2

RVSD2

F3

RVSD3

B2

RVSD4

B3

RVSD5

C2

GST1

C3

GST0

C4

RVSD8

D2

RVSD9

D3

RVSD11

L4

+1.5VS

1 2

UMA@

1 2

UMA@

1 2

1 2

1 2

Compal Electronics, Inc.

Title

INTEL 855GME-AGP&LVDS(2/4)

Size Document Number Re v

Date: Sheet

EAL20 LA-2461

星期

, 04, 2004

三八月

GAD3
GAD2
GAD5
GAD4
GAD7
GAD6
GAD8
GCBE#0
GAD10
GAD9
GAD12
GAD11
GADSTB0
GADSTB0#
GAD0
GAD1
GCBE#1
GAD14
GAD30
GAD13
GADSTB1
GADSTB1#
GAD17
GAD16
GAD18
GAD31
GIRDY#
GDEVSEL#
GTRDY#
GFRAME#
GSTOP#
GAD15
GAD19
GAD20
GAD21
GAD22
GAD23
GCBE#3
GAD25
GAD24
GAD27
GAD26
GAD29
GAD28
GSBA0
GSBA1
GSBA2
GSBA3
GSBA4
GSBA5
GSBA6
GSBA7
GPAR
GPIPE#
GSBSTB
GSBSTB#
GGNT#
GREQ#
GST2
GST1
GST0
GWBF#
GRBF#
GCBE#2

1

747

0.3

of

5

DDR_SMA0<10,11>

D D

C C

DDR REF & SWING VOLTAGE

+2.5V

12

2

C577

0.1U_0402_16V4Z

R175

150_0603_1%

1

60.4_0603_1%

+2.5V

12

12

B B

R478

R174
604_0603_1%

0.1U_0402_16V4Z

R482

60.4_0603_1%

SMRCOMP

12

W=10mil

SMVSWINGL

2

C154

1

W=10mil

(1.25V)

(0.497V)

DDR_SMA1<10,11>
DDR_SMA2<10,11>
DDR_SMA3<10,11>
DDR_SMA4<10,11>
DDR_SMA5<10,11>

DDR_SWE#<10,11>
DDR_SRAS#<10,11>
DDR_SCAS#<10,11>

DDR_CLK0<10>
DDR_CLK0#<10>
DDR_CLK1<10>
DDR_CLK1#<10>

DDR_CLK3<10>
DDR_CLK3#<10>
DDR_CLK4<10>
DDR_CLK4#<10>

DDR_CKE0<10,11>
DDR_CKE1<10,11>
DDR_CKE2<10,11>
DDR_CKE3<10,11>
DDR_SCS#0<10,11>
DDR_SCS#1<10,11>
DDR_SCS#2<10,11>
DDR_SCS#3<10,11>

DDR_SBS0<10,11>
DDR_SBS1<10,11>

DDR_SMA_B1<10,11>
DDR_SMA_B2<10,11>
DDR_SMA_B4<10,11>
DDR_SMA_B5<10,11>

DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12

DDR_SDQS0
DDR_SDQS1
DDR_SDQS2
DDR_SDQS3
DDR_SDQS4
DDR_SDQS5
DDR_SDQS6
DDR_SDQS7

DDR_SWE#
DDR_SRAS#
DDR_SCAS#

DDR_SBS0
DDR_SBS1

DDR_SDM0
DDR_SDM1
DDR_SDM2
DDR_SDM3
DDR_SDM4
DDR_SDM5
DDR_SDM6
DDR_SDM7

DDR_SMA_B1
DDR_SMA_B2
DDR_SMA_B4
DDR_SMA_B5

SMRCOMP

SMVSWINGL
SMVSWINGH

4

DDR_SDQ[0..63]

DDR_SDQS[0..7]

AC18
AD14
AD13
AD17
AD11
AC13

AD8
AD7
AC6
AC5

AC19

AD5
AB5

AG2
AH5

AH8
AE12
AH17
AE21
AH24
AH27
AD15

AD25
AC21
AC24

AB2

AA2
AC26
AB25

AC3

AD4

AC2

AD2
AB23
AB24

AA3

AB4

AC7

AB7

AC9
AC10
AD23
AD26
AC22
AC25

AD22
AD20

AE5

AE6

AE9
AH12
AD19
AD21
AD24
AH28
AH15

AD16
AC12
AF11
AD10

AC15
AC16

AB1

AJ22
AJ19

DDR_SDQ[0..63] <10> DDR_SMA[6..12] <10,11>

DDR_SDQS[0..7] <10>

U14C

Montara-GM(L)

SMA0
SMA1
SMA2
SMA3
SMA4
SMA5
SMA6
SMA7
SMA8
SMA9
SMA10
SMA11
SMA12

SDQS0

MEMORY

SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7
SDQS8

SWE#
SRAS#
SCAS#

SCK0
SCK0#
SCK1
SCK1#
SCK2
SCK2#
SCK3
SCK3#
SCK4
SCK4#
SCK5
SCK5#

SCKE0
SCKE1
SCKE2
SCKE3
SCS#0
SCS#1
SCS#2
SCS#3

SBA0
SBA1

SDM0
SDM1
SDM2
SDM3
SDM4
SDM5
SDM6
SDM7
SDM8

SMA_B1
SMA_B2
SMA_B4
SMA_B5

RCVENOUT#
RCVENIN#

SMRCOMP

SMVSWINGL
SMVSWINGH

RG82855GME_uFCBGA732

SDQ0
SDQ1
SDQ2
SDQ3
SDQ4
SDQ5
SDQ6
SDQ7
SDQ8

SDQ9
SDQ10
SDQ11
SDQ12
SDQ13
SDQ14
SDQ15
SDQ16
SDQ17
SDQ18
SDQ19
SDQ20
SDQ21
SDQ22
SDQ23
SDQ24
SDQ25
SDQ26
SDQ27
SDQ28
SDQ29
SDQ30
SDQ31
SDQ32
SDQ33
SDQ34
SDQ35
SDQ36
SDQ37
SDQ38
SDQ39
SDQ40
SDQ41
SDQ42
SDQ43
SDQ44
SDQ45
SDQ46
SDQ47
SDQ48
SDQ49
SDQ50
SDQ51
SDQ52
SDQ53
SDQ54
SDQ55
SDQ56
SDQ57
SDQ58
SDQ59
SDQ60
SDQ61
SDQ62
SDQ63

SDQ64
SDQ65
SDQ66
SDQ67
SDQ68
SDQ69
SDQ70
SDQ71

SMVREF0

DDR_SMA[6..12]

DDR_SDM[0..7]

DDR_SDQ0

AF2

DDR_SDQ1

AE3

DDR_SDQ2

AF4

DDR_SDQ3

AH2

DDR_SDQ4

AD3

DDR_SDQ5

AE2

DDR_SDQ6

AG4

DDR_SDQ7

AH3

DDR_SDQ8

AD6

DDR_SDQ9

AG5

DDR_SDQ10

AG7

DDR_SDQ11

AE8

DDR_SDQ12

AF5

DDR_SDQ13

AH4

DDR_SDQ14

AF7

DDR_SDQ15

AH6

DDR_SDQ16

AF8

DDR_SDQ17

AG8

DDR_SDQ18

AH9

DDR_SDQ19

AG10

DDR_SDQ20

AH7

DDR_SDQ21

AD9

DDR_SDQ22

AF10

DDR_SDQ23

AE11

DDR_SDQ24

AH10

DDR_SDQ25

AH11

DDR_SDQ26

AG13

DDR_SDQ27

AF14

DDR_SDQ28

AG11

DDR_SDQ29

AD12

DDR_SDQ30

AF13

DDR_SDQ31

AH13

DDR_SDQ32

AH16

DDR_SDQ33

AG17

DDR_SDQ34

AF19

DDR_SDQ35

AE20

DDR_SDQ36

AD18

DDR_SDQ37

AE18

DDR_SDQ38

AH18

DDR_SDQ39

AG19

DDR_SDQ40

AH20

DDR_SDQ41

AG20

DDR_SDQ42

AF22

DDR_SDQ43

AH22

DDR_SDQ44

AF20

DDR_SDQ45

AH19

DDR_SDQ46

AH21

DDR_SDQ47

AG22

DDR_SDQ48

AE23

DDR_SDQ49

AH23

DDR_SDQ50

AE24

DDR_SDQ51

AH25

DDR_SDQ52

AG23

DDR_SDQ53

AF23

DDR_SDQ54

AF25

DDR_SDQ55

AG25

DDR_SDQ56

AH26

DDR_SDQ57

AE26

DDR_SDQ58

AG28

DDR_SDQ59

AF28

DDR_SDQ60

AG26

DDR_SDQ61

AF26

DDR_SDQ62

AE27

DDR_SDQ63

AD27

AG14
AE14
AE17
AG16
AH14
AE15
AF16
AF17

AJ24

2

C148

0.1U_0402_16V4Z

1

3

SMVREF0

W=20mil

DDR_SDM[0..7] <10>

2

C142

0.1U_0402_16V4Z

1

2

C149

0.1U_0402_16V4Z

1

+2.5V

12

12

R166
75_0603_1%

R168
75_0603_1%

2

U14D

C1

VSS0

G1

VSS1

L1

VSS2

U1

VSS3

AA1

VSS4

AE1

VSS5

R2

VSS6

AG3

VSS7

AJ3

VSS8

D4

VSS9

G4

VSS10

K4

VSS11

N4

VSS12

T4

VSS13

W4

VSS14

AA4

VSS15

AC4

VSS16

AE4

VSS17

B5

VSS18

U5

VSS19

Y5

VSS20

Y6

VSS21

AG6

VSS22

C7

VSS23

E7

VSS24

G7

VSS25

J7

VSS26

M7

VSS27

R7

VSS28

AA7

VSS29

AE7

VSS30

AJ7

VSS31

H8

VSS32

K8

VSS33

P8

VSS34

T8

VSS35

V8

VSS36

Y8

VSS37

AC8

VSS38

E9

VSS39

L9

VSS40

N9

VSS41

R9

VSS42

U9

VSS43

W9

VSS44

AB9

VSS45

AG9

VSS46

C10

VSS47

J10

VSS48

AA10

VSS49

AE10

VSS50

D11

VSS51

F11

VSS52

H11

VSS53

AB11

VSS54

AC11

VSS55

AJ11

VSS56

J12

VSS57

AA12

VSS58

AG12

VSS59

A13

VSS60

D13

VSS61

F13

VSS62

H13

VSS63

N13

VSS64

R13

VSS65

U13

VSS66

AB13

VSS67

AE13

VSS68

J14

VSS69

P14

VSS70

T14

VSS71

AA14

VSS72

AC14

VSS73

D15

VSS74

H15

VSS75

N15

VSS76

R15

VSS77

U15

VSS78

AB15

VSS79

AG15

VSS80

F16

VSS81

J16

VSS82

P16

VSS83

T16

VSS84

AA16

VSS85

AE16

VSS86

A17

RG82855GME_uFCBGA732

VSS87

D17

VSS88

H17

VSS89

N17

VSS90

1

R17

VSS91

U17

VSS92

AB17

VSS93

AC17

VSS94

F18

VSS95

J18

VSS96

AA18

VSS97

AG18

VSS98

A19

VSS99

D19

VSS100

H19

VSS101

AB19

VSS102

AE19

VSS103

F20

VSS105

J20

VSS106

AA20

VSS107

AC20

VSS108

A21

VSS109

D21

VSS110

H21

VSS111

M21

VSS112

P21

VSS113

T21

VSS114

V21

VSS115

Y21

VSS116

AA21

VSS117

AB21

VSS118

AG21

VSS119

B24

VSS120

F22

VSS121

J22

VSS122

L22

VSS123

N22

VSS124

R22

VSS125

U22

VSS126

W22

VSS127

AE22

VSS128

A23

VSS129

D23

VSS130

AA23

VSS131

AC23

VSS132

AJ23

VSS133

F24

VSS134

H24

VSS135

K24

VSS136

M24

VSS137

P24

VSS138

T24

VSS139

V24

VSS140

AA24

VSS141

AG24

VSS142

A25

VSS143

D25

VSS144

AA25

VSS145

AE25

VSS146

G26

VSS147

J26

VSS148

L26

VSS149

N26

VSS150

R26

VSS151

U26

VSS152

W26

VSS153

AB26

VSS154

A27

VSS155

F27

VSS156

AC27

VSS157

AG27

VSS158

AJ27

VSS159

AC28

VSS160

AE28

VSS161

C29

VSS162

E29

VSS163

G29

VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181

J29
L29
N29
U29
W29
AA29
AJ10
AJ12
AJ18
AJ20
C22
D28
E28
L6
T9
AJ26

Montara-GM(L)

+2.5V

A A

R185

604_0603_1%

12

R181
150_0603_1%

12

W=10mil

SMVSWINGH

2

C171

0.1U_0402_16V4Z

1

5

(2.002V)

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET N OR THE INFORMA TION IT CONTAI NS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Re v

Date: Sheet

Compal Electronics, Inc.

INTEL 855GME DDR(3/4)

EAL20 LA-2461

星期

, 04, 2004

三八月

1

0.3

of

847

5

+1.35VS

D D

+1.35VS

+1.35VS_PLLA

+1.35VS_PLLB

+1.5VS

C C

+1.5VS

+1.5VS

+1.5VS

+2.5V

B B

+3VS

U14E

Montara-GM(L)

J15

VCC0

P13

VCC1

T13

VCC2

N14

VCC3

R14

VCC4

U14

VCC5

P15

VCC6

T15

VCC7

AA15

VCC8

N16

VCC9

R16

VCC10

U16

VCC11

P17

VCC12

T17

VCC13

AA17

VCC14

AA19

VCC15

W21

VCC16

H14

VCC17

V1

VCCHL0

Y1

VCCHL1

W5

VCCHL2

U6

VCCHL3

U8

VCCHL4

W8

VCCHL5

V7

VCCHL6

V9

VCCHL7

D29

VCCAHPLL

Y2

VCCAGPLL

A6

VCCADPLLA

B16

VCCADPLLB

E1

VCCDVO_0

J1

VCCDVO_1

N1

VCCDVO_2

E4

VCCDVO_3

J4

VCCDVO_4

M4

VCCDVO_5

E6

VCCDVO_6

H7

VCCDVO_7

J8

VCCDVO_8

L8

VCCDVO_9

M8

VCCDVO_10

N8

VCCDVO_11

R8

VCCDVO_12

K9

VCCDVO_13

M9

VCCDVO_14

P9

VCCDVO_15

A9

VCCADAC0

B9

VCCADAC1

B8

VSSADAC

A11

VCCALVDS

B11

VSSALVDS

G13

VCCDLVDS0

B14

VCCDLVDS1

J13

VCCDLVDS2

B15

VCCDLVDS3

F9

VCCTXLVDS0

B10

VCCTXLVDS1

D10

VCCTXLVDS2

A12

VCCTXLVDS3

A3

VCCGPIO_0

A4

VCCGPIO_1

VTTLF0
VTTLF1
VTTLF2
VTTLF3
VTTLF4
VTTLF5
VTTLF6
VTTLF7
VTTLF8

VTTLF9
VTTLF10
VTTLF11
VTTLF12
VTTLF13
VTTLF14
VTTLF15
VTTLF16
VTTLF17
VTTLF18
VTTLF19
VTTLF20

VTTHF0

VTTHF1

VTTHF2

VTTHF3

VTTHF4

VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7

POWER

VCCSM8
VCCSM9

VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36

VCCQSM0
VCCQSM1

VCCASM0
VCCASM1

G15
H16
H18
J19
H20
L21
N21
R21
U21
H22
M22
P22
T22
V22
Y29
K29
F29
AB29
A26
A20
A18

A22
A24
H29
M29
V29

AC1
AG1
AB3
AF3
Y4
AJ5
AA6
AB6
AF6
Y7
AA8
AB8
Y9
AF9
AJ9
AB10
AA11
AB12
AF12
AA13
AJ13
AB14
AF15
AB16
AJ17
AB18
AF18
AB20
AF21
AJ21
AB22
AF24
AJ25
AF27
AC29
AF29
AG29

AJ6
AJ8

AD1
AF1

C103 0.1U_0402_16V4Z

12

12

4

+VCCP

C96 0.1U_0402_16V4Z

C476 0.1U_0402_16V4Z

12

C481 0.1U_0402_16V4Z

12

C489 0.1U_0402_16V4Z

12

+2.5V

+2.5V_QSM

+1.35VS_ASM

+1.35VS

1

C569

+

150U_D2_6.3VM

2

+1.35VS

W=20mil (90mA)

1

C526

10U_0805_10V4Z

2

(1.8A)

C539

1

2

10U_0805_10V4Z

2

C547

1

0.1U_0402_16V4Z

For VCC

2

C509

0.1U_0402_16V4Z

1

For VCCHL

2

C544

0.1U_0402_16V4Z

1

0.1U_0402_16V4Z

3

2

C496

0.1U_0402_16V4Z

1

0.1U_0402_16V4Z

2

C564

0.1U_0402_16V4Z

1

2

C527

1

0.1U_0402_16V4Z

2

C92

1

2

2

1

C538

0.1U_0402_16V4Z

C517

1

W=20mil (0.4A)

1

+

C116

2

220U_D2_4VM_R12 UMA@

2

1

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z UMA@

1

2

2

C524

0.1U_0402_16V4Z

1 2

R159 1_0805_5% UMA@

For VCCADPLLA For VCCADPLLB

C115

2

C512

C553

1

1

0.1U_0402_16V4Z

+1.35VS +1.35VS+1.35VS_PLLA +1.35VS_PLLB

220U_D2_4VM_R12

UMA@

C111

Close to ball D29, Y2

+1.5VS +1.5VS +1.5VS

W=40mil (90mA) W=20mil (70mA) W=20mil (90mA)

1

1

+

C550

22U_1206_16V4Z_V1

2

150U_D2_6.3VM

+1.5VS

W=20mil (70mA)

1

C503

2

10U_0805_10V4Z

2

2

1

0.1U_0402_16V4Z

For VCCDVO

2

C532

C531

1

0.1U_0402_16V4Z

For VCCDLVDS

C529

2

C500

0.1U_0402_16V4Z

1

2

C114

UMA@

0.01U_0402_16V7K

1

0.1U_0402_16V4Z

+2.5V

W=20mil (90mA)

1

C542

0.1U_0402_16V4Z

2

UMA@

22U_1206_16V4Z_V1

UMA@

For VCCADAC

2

C492

1

UMA@

2

C523

1

0.1U_0402_16V4Z

For VCCTXLVDS

2

2

C515

C545

UMA@

0.1U_0402_16V4Z

1

1

C513

0.1U_0402_16V4Z

UMA@

UMA@

reserved for GMCH, no need when use external VGA

+2.5V

(1.9A)

1

+

C189

2

150U_D2_6.3VM

2

C558

0.1U_0402_16V4Z

1

0.1U_0402_16V4Z

C581

2

C573

0.1U_0402_16V4Z

1

2

C546

1

0.1U_0402_16V4Z

2

C566

0.1U_0402_16V4Z

1

2

C562

1

0.1U_0402_16V4Z

2

C534

0.1U_0402_16V4Z

1

2

C528

1

0.1U_0402_16V4Z

2

1

2

C508

C563

0.1U_0402_16V4Z

1

0.1U_0402_16V4Z

W=20mil (0.4A)

1

+

2

2

1

2

C543

0.1U_0402_16V4Z

1

1 2

R143 1_0805_5% UMA@

2

C112

1

0.1U_0402_16V4Z UMA@

For VCCALVDS

2

C551

0.01U_0402_16V7K

1

UMA@

2

2

C510

1

1

0.1U_0402_16V4Z

1

+3VS

RG82855GME_uFCBGA732

1

2

2

C505

1

0.1U_0402_16V4Z

5

C501
10U_0805_10V4Z

A A

(72mA)

1

+

C495

2

150U_D2_6.3VM

2

C499

10U_0805_10V4Z

1

2

C493

0.1U_0402_16V4Z

1

0.1U_0402_16V4Z

4

2

C497

1

+2.5V_QSM+VCCP

W=20mil W=20mil

2

C584

4.7U_0805_10V4Z

1

0.1U_0402_16V4Z

1 2

R483 0_0603_5%

For VCCQSM

1

C575

2

R499 1_0603_1%

1 2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET N OR THE INFORMA TION IT CONTAI NS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+1.35VS_ASM

1

C591

2

10U_0805_10V4Z

1

C582

2

0.1U_0402_16V4Z

10U_0805_10V4Z

For VCCASMFor VCCGPIO

2

1

1 2

R506 0_0603_5%

C590

2

+1.35VS+2.5V

Compal Electronics, Inc.

Title

Size Document Number Re v

Date: Sheet

INTEL 855GME GMCH(4/4)

EAL20 LA-2461

星期

, 04, 2004

三八月

1

0.3

of

947

5

+2.5V +1.25VS_SDREF

DDR_DQ0
DDR_DQ3

DDR_DQS0
DDR_DQ5

DDR_DQ1

D D

DDR_CLK0<8>
DDR_CLK0#<8>

C C

DDR_CKE1<8,11>

DDR_SMA5<8,11>

DDR_SMA1<8,11>

DDR_SCS#0<8,11>

DDR_DQ8

DDR_DQ13
DDR_DQS1

DDR_DQ14
DDR_DQ15

DDR_DQ16
DDR_DQ20

DDR_DQS2
DDR_DQ22

DDR_DQ18
DDR_DQ24

DDR_DQ25
DDR_DQS3

DDR_DQ26
DDR_DQ27

DDR_CKE1

DDR_F_SMA12
DDR_F_SMA9

DDR_F_SMA7
DDR_SMA5
DDR_F_SMA3
DDR_SMA1

DDR_F_SMA10
DDR_F_SBS0
DDR_F_SWE#
DDR_SCS#0

DDR_DQ32
DDR_DQ37

DDR_DQS4
DDR_DQ38

DDR_DQ34

DDR_DQ40

+3VS

DDR_DQS5

DDR_DQ42
DDR_DQ43

DDR_DQ52
DDR_DQ49

DDR_DQS6
DDR_DQ55

DDR_DQ50
DDR_DQ63

DDR_DQ58
DDR_DQS7

DDR_DQ56
DDR_DQ62

DDR_CKE3

DDR_SMA12
DDR_SMA9
DDR_SMA7

DDR_SMA3

DDR_SMA10
DDR_SBS0
DDR_SWE#
DDR_SCS#2

5

B B

SMB_DATA<12,22>

SMB_CLK<12,22>

DDR_CLK3<8>
DDR_CLK3#<8>

DDR_CKE3<8,11>

DDR_SMA12<8,11>

A A

DDR_SMA9<8,11>
DDR_SMA7<8,11>

DDR_SMA_B5<8,11>

DDR_SMA3<8,11>

DDR_SMA_B1<8,11>

DDR_SMA10<8,11>
DDR_SBS0<8,11>
DDR_SWE#<8,11>

DDR_SCS#2<8,11>

DDR_CLK4#<8>

DDR_CLK4<8>

JP24

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

A35

CK0_A

A37

CK0#_A

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

85

DU

87

VSS

A89

CK2_A

A91

CK2#_A

93

VDD

A95

CKE1_A

A97

DU/A13_A

A99

A12_A

A101

A9_A

103

VSS

A105

A7_A

A107

A5_A

A109

A3_A

A111

A1_A

113

VDD

A115

A10/AP_A

A117

BA0_A

A119

WE#_A

A121

S0#_A

123

DU

125

VSS

127

DQ32

129

DQ33

131

VDD

133

DQS4

135

DQ34

137

VSS

139

DQ35

141

DQ40

143

VDD

145

DQ41

147

DQS5

149

VSS

151

DQ42

153

DQ43

155

VDD

157

VDD

159

VSS

161

VSS

163

DQ48

165

DQ49

167

VDD

169

DQS6

171

DQ50

173

VSS

175

DQ51

177

DQ56

179

VDD

181

DQ57

183

DQS7

185

VSS

187

DQ58

189

DQ59

191

VDD

193

SDA

195

SCL

197

VDD_SPD

199

VDD_ID

B35

CK0_B

B37

CK0#_B

B95

CKE1_B

B97

DU(A13)_B

B99

A12_B

B101

A9_B

B105

A7_B

B107

A5_B

B109

A3_B

B111

A1_B

B115

A10/AP_B

B117

BA0_B

B119

WE#_B

B121

S0#_B

B158

CK1#_B

B160

CK1_B

QUASA_CA0184-218Y61

VREF

VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7

DQ12

VDD

DQ13

DM1

VSS
DQ14
DQ15

VDD

VDD

VSS

VSS

DQ20
DQ21

VDD

DM2
DQ22

VSS
DQ23
DQ28

VDD
DQ29

DM3

VSS
DQ30
DQ31

VDD

DU/RESET#

VSS

VSS

VDD

VDD

CKE0_A

DU/BA2

A11_A

A8_A

VSS

A6_A
A4_A
A2_A
A0_A

VDD

BA1_A
RAS#_A
CAS#_A

S1#_A

VSS
DQ36
DQ37

VDD

DM4
DQ38

VSS
DQ39
DQ44

VDD
DQ45

DM5

VSS
DQ46
DQ47

VDD

CK1#_A

CK1_A

VSS
DQ52
DQ53

VDD

DM6
DQ54

VSS
DQ55
DQ60

VDD
DQ61

DM7

VSS
DQ62
DQ63

VDD

SA0_A
SA1_A
SA2_A

CK2_B
CK2#_B
CKE0_B

A11_B

A8_B
A6_B
A4_B
A2_B
A0_B

BA1_B
RAS#_B
CAS#_B

S1#_B

SA0_B

SA1_B

SA2_B

DU

DU

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70

86
88
90
92
94
A96
98
A100
A102
104
A106
A108
A110
A112
114
A116
A118
A120
A122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
A158
A160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
A194
A196
A198
200
B89
B91
B96
B100
B102
B106
B108
B110
B112
B116
B118
B120
B122
B194
B196
B198

4

+2.5V

DDR_F_SMA11

DDR_F_SMA8

DDR_F_SMA6

DDR_F_SMA0

DDR_F_SBS1
DDR_F_SRAS#
DDR_F_SCAS#

4

DDR_DQ2
DDR_DQ7

DDR_DM0
DDR_DQ4

DDR_DQ6
DDR_DQ9

DDR_DQ12
DDR_DM1

DDR_DQ11
DDR_DQ10

DDR_DQ17
DDR_DQ21

DDR_DM2
DDR_DQ19

DDR_DQ23
DDR_DQ28

DDR_DQ29
DDR_DM3

DDR_DQ30
DDR_DQ31

DDR_CKE0

DDR_SMA4
DDR_SMA2

DDR_SCS#1

DDR_DQ36
DDR_DQ33

DDR_DM4
DDR_DQ39

DDR_DQ35
DDR_DQ41DDR_DQ44

DDR_DQ45
DDR_DM5

DDR_DQ47
DDR_DQ46

DDR_DQ48
DDR_DQ53

DDR_DM6
DDR_DQ54

DDR_DQ51
DDR_DQ59

DDR_DQ57
DDR_DM7

DDR_DQ61
DDR_DQ60

DDR_CKE2
DDR_SMA11
DDR_SMA8
DDR_SMA6

DDR_SMA0
DDR_SBS1
DDR_SRAS#
DDR_SCAS#
DDR_SCS#3

1 2

+2.5V

75_0603_1%

1

C654

2

0.1U_0402_16V4Z

DDR_CKE0 <8,11>

DDR_SMA4 <8,11>
DDR_SMA2 <8,11>

DDR_SCS#1 <8,11>

DDR_CLK1# <8>
DDR_CLK1 <8>

DDR_CKE2 <8,11>
DDR_SMA11 <8,11>
DDR_SMA8 <8,11>
DDR_SMA6 <8,11>
DDR_SMA_B4 <8,11>
DDR_SMA_B2 <8,11>
DDR_SMA0 <8,11>
DDR_SBS1 <8,11>
DDR_SRAS# <8,11>
DDR_SCAS# <8,11>
DDR_SCS#3 <8,11>

+3VS

R589

0.1U_0402_16V4Z

3

DDR_SDQ62
DDR_SDQ56
DDR_SDQS7
DDR_SDQ58

12

1

R580

C655

75_0603_1%

2

DDR_SDQ63
DDR_SDQ50
DDR_SDQ55
DDR_SDQS6

DDR_SDQ49
DDR_SDQ52
DDR_SDQ43 DDR_DQ43
DDR_SDQ42 DDR_DQ42

DDR_SDQS5 DDR_DQS5
DDR_SDQ40 DDR_DQ40
DDR_SDQ44 DDR_DQ44
DDR_SDQ34 DDR_DQ34

DDR_SDQ38 DDR_DQ38
DDR_SDQS4 DDR_DQS4
DDR_SDQ37 DDR_DQ37
DDR_SDQ32 DDR_DQ32

DDR_SWE# DDR_F_SWE#
DDR_SMA10 DD R_F_SMA10

DDR_SBS0 DDR_F_SBS0

10_0804_8P4R_5%

4 5
3 6
2 7
1 8

RP45
10_0804_8P4R_5%

4 5
3 6
2 7
1 8

RP47
10_0804_8P4R_5%

4 5
3 6
2 7
1 8

RP49
10_0804_8P4R_5%

4 5
3 6
2 7
1 8

RP52
10_0804_8P4R_5%

4 5
3 6
2 7
1 8

RP54

RP16

1 8
2 7
3 6
4 5

DDR_DQ62
DDR_DQ56
DDR_DQS7
DDR_DQ58

DDR_DQ63
DDR_DQ50
DDR_DQ55
DDR_DQS6

DDR_DQ49
DDR_DQ52

DDR_DQ60
DDR_DQ61

DDR_DM7

DDR_DQ57 DDR_SDQ57

10_0804_8P4R_5%

10_0804_8P4R_5%

DDR_DQ53
DDR_DQ48
DDR_DQ46
DDR_DQ47

10_0804_8P4R_5%

DDR_DM5
DDR_DQ45
DDR_DQ41
DDR_DQ35

10_0804_8P4R_5%

DDR_DQ39

DDR_DM4
DDR_DQ33
DDR_DQ36

10_0804_8P4R_5%

DDR_SBS1 DDR_F_SBS1
DDR_SMA0 DDR_F_SMA0

10_0804_8P4R_5%

DDR_SMA3 DDR_F_SMA3
DDR_SMA7 DDR_F_SMA7
DDR_SMA9 DDR_F_SMA9
DDR_SMA12 DD R_F_SMA12

RP19

1 8
2 7
3 6
4 5

DDR_SMA6

DDR_SMA8

DDR_SMA11 DD R_F_SMA11

10_0804_8P4R_5%

3

10_0804_8P4R_5%

4 5
3 6
2 7

DDR_DQ25

1 8

RP58

10_0804_8P4R_5%

DDR_DQ24

4 5

DDR_DQ18

3 6

DDR_DQ22

2 7
1 8

RP60

1 2

R537 10_0402_5%

1 2

R545 10_0402_5%

R559 10_0402_5%

R565 10_0402_5%

1 2

1 2

10_0804_8P4R_5%

4 5
3 6
2 7
1 8

RP62

10_0804_8P4R_5%

4 5
3 6
2 7
1 8

RP64

DDR_DQ15DDR_SDQ15

DDR_DQ14DDR_SDQ14

DDR_SDQ[0..63]

DDR_SDM[0..7]

DDR_SDQS[0..7]

DDR_DQ31
DDR_DQ30

DDR_DM3

DDR_DQ29

10_0804_8P4R_5%

DDR_DQ28
DDR_DQ23
DDR_DQ19

DDR_DM2

10_0804_8P4R_5%

DDR_DQ21

DDR_DQ17

DDR_DQ10

DDR_DQ11

DDR_DQ9

10_0804_8P4R_5%

DDR_DQ4
DDR_DM0
DDR_DQ7
DDR_DQ2

10_0804_8P4R_5%

DDR_DQ[0..63]

DDR_DM[0..7]

DDR_DQS[0..7]

DDR_SDQ27 DDR_DQ27
DDR_SDQ26 DDR_DQ26
DDR_SDQS3 DDR_DQS3
DDR_SDQ25

DDR_SDQ24
DDR_SDQ18
DDR_SDQ22
DDR_SDQS2 DDR_DQS2

DDR_SDQ20 DDR_DQ20

DDR_SDQ16 DDR_DQ16

DDR_SDQS1 DDR_DQS1
DDR_SDQ13 DDR_DQ13
DDR_SDQ8 DDR_DQ8
DDR_SDQ1 DDR_DQ1

DDR_SDQ5 DDR_DQ5
DDR_SDQS0 DDR_DQS0
DDR_SDQ3 DDR_DQ3
DDR_SDQ0 DDR_DQ0

DDR_SDQ[0..63]<8>

DDR_SDM[0..7]<8>

DDR_SDQS[0..7]<8>

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPE TENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET N OR THE INFORMA TION IT CONTAI NS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

RP44

18
27
36
45

RP46

18
27
36
45

RP48

18
27
36
45

RP51

18
27
36
45

RP53

18
27
36
45

RP55

1 8
2 7
3 6
4 5

10_0804_8P4R_5%

RP56

1 8
2 7
3 6
4 5

10_0804_8P4R_5%

RP57

18
27
36
45

RP59

18
27
36
45

12

R53610_0402_5%

12

R54210_0402_5%

12

R55810_0402_5%

12

R56410_0402_5%

RP61

18
27
36
45

RP63

18
27
36
45

DDR_DQ[0..63] <11>

DDR_DM[0..7] <11>

DDR_DQS[0..7] <11>

2

DDR_SDQ60
DDR_SDQ61

DDR_SDM7

DDR_SDQ59D DR_DQ59
DDR_SDQ51D DR_DQ51
DDR_SDQ54D DR_DQ54

DDR_SDM6DDR_DM6

DDR_SDQ53
DDR_SDQ48
DDR_SDQ46
DDR_SDQ47

DDR_SDM5
DDR_SDQ45
DDR_SDQ41
DDR_SDQ35

DDR_SDQ39

DDR_SDM4
DDR_SDQ33
DDR_SDQ36

DDR_F_SCAS#DDR_SCAS#
DDR_F_SRAS#DDR_SRAS#

DDR_F_SMA6

DDR_F_SMA8

DDR_SDQ31
DDR_SDQ30
DDR_SDM3
DDR_SDQ29

DDR_SDQ28
DDR_SDQ23
DDR_SDQ19

DDR_SDM2

DDR_SDQ21

DDR_SDQ17

DDR_SDQ10

DDR_SDQ11

DDR_SDM1DDR_DM1
DDR_SDQ12D DR_DQ12

DDR_SDQ9

DDR_SDQ6DDR_DQ6

DDR_SDQ4

DDR_SDM0

DDR_SDQ7

DDR_SDQ2

1

Title

Size Document Number Re v

Date: Sheet

Compal Electronics, Inc.

DDR-SODIMM

EAL20 LA-2461

星期

, 04, 2004

三八月

of

10 47

1

0.3

A

Layout note :

Distribute as close as possible
to DDR-SODIMM.

+2.5V

1 1

1

C608

0.1U_0402_16V4Z

2

+2.5V

1

C593

0.1U_0402_16V4Z

2

1

C633

0.1U_0402_16V4Z

2

1

C556

0.1U_0402_16V4Z

2

1

C634

0.1U_0402_16V4Z

2

1

C594

0.1U_0402_16V4Z

2

1

C570

0.1U_0402_16V4Z

2

1

C607

0.1U_0402_16V4Z

2

1

0.1U_0402_16V4Z

2

Layout note :

Place one cap close to every 2 pull up resistors termination to
+1.25V

2 2

3 3

4 4

+1.25VS

1

C185

0.1U_0402_16V4Z

2

+1.25VS

1

C131

0.1U_0402_16V4Z

2

+1.25VS

1

C213

0.1U_0402_16V4Z

2

+1.25VS

1

C186

0.1U_0402_16V4Z

2

+1.25VS

1

C150

0.1U_0402_16V4Z

2

+1.25VS

1

C227

0.1U_0402_16V4Z

2

1

C202

0.1U_0402_16V4Z

2

1

C157

0.1U_0402_16V4Z

2

1

C133

0.1U_0402_16V4Z

2

1

C219

0.1U_0402_16V4Z

2

1

C207

0.1U_0402_16V4Z

2

1

C230

0.1U_0402_16V4Z

2

A

1

C144

0.1U_0402_16V4Z

2

1

C182

0.1U_0402_16V4Z

2

1

C198

0.1U_0402_16V4Z

2

1

C143

0.1U_0402_16V4Z

2

1

C178

0.1U_0402_16V4Z

2

1

C224

0.1U_0402_16V4Z

2

1

C141

0.1U_0402_16V4Z

2

1

C128

0.1U_0402_16V4Z

2

1

C173

0.1U_0402_16V4Z

2

1

C137

0.1U_0402_16V4Z

2

1

C159

0.1U_0402_16V4Z

2

1

C228

0.1U_0402_16V4Z

2

1

0.1U_0402_16V4Z

2

1

0.1U_0402_16V4Z

2

1

0.1U_0402_16V4Z

2

1

0.1U_0402_16V4Z

2

1

0.1U_0402_16V4Z

2

C519

+2.5V

1

+

C118
150U_D2_6.3VM

2

C136

C203

C223

C165

C123

B

1

C502

0.1U_0402_16V4Z

2

+

1

C200

0.1U_0402_16V4Z

2

1

C201

0.1U_0402_16V4Z

2

1

C127

0.1U_0402_16V4Z

2

1

C120

0.1U_0402_16V4Z

2

1

C124

0.1U_0402_16V4Z

2

B

1

C215
150U_D2_6.3VM

2

1

C557

0.1U_0402_16V4Z

2

1

C199

0.1U_0402_16V4Z

2

1

C208

0.1U_0402_16V4Z

2

1

C155

0.1U_0402_16V4Z

2

1

C166

0.1U_0402_16V4Z

2

1

C121

0.1U_0402_16V4Z

2

1

C574

0.1U_0402_16V4Z

2

1

C175

0.1U_0402_16V4Z

2

1

C220

0.1U_0402_16V4Z

2

1

C140

0.1U_0402_16V4Z

2

1

C225

0.1U_0402_16V4Z

2

1

C134

0.1U_0402_16V4Z

2

C

DDR_DQ62
DDR_DQ56
DDR_DQS7
DDR_DQ58

DDR_DQ63
DDR_DQ50

1

C572

0.1U_0402_16V4Z

2

DDR_SCS#2<8,10>

DDR_SWE#<8,10>

DDR_SBS0<8,10>

DDR_SMA_B1<8,10>

DDR_SMA3<8,10>

DDR_SMA_B5<8,10>

DDR_CKE3<8,10>

DDR_CKE1<8,10>
DDR_SMA5<8,10>

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

DDR_DQS6

DDR_DQ49
DDR_DQ52
DDR_DQ43
DDR_DQ42

DDR_DQS5
DDR_DQ40
DDR_DQ44
DDR_DQ34

DDR_DQ38
DDR_DQS4
DDR_DQ37
DDR_DQ32

DDR_SCS#2

DDR_SWE#

DDR_SMA10

DDR_SBS0

DDR_SMA_B1

DDR_SMA3

DDR_SMA_B5

DDR_SMA7
DDR_SMA9

DDR_SMA12
DDR_CKE3
DDR_CKE1
DDR_SMA5

DDR_DQ27 DDR_DQ31

DDR_DQ26

DDR_DQS3

DDR_DQ25

DDR_DQ24

DDR_DQ18

DDR_DQ22

DDR_DQS2

DDR_DQ20

DDR_DQ16

DDR_DQ15

DDR_DQ14

DDR_DQS1

DDR_DQ13

DDR_DQ8

DDR_DQ1

DDR_DQ5

DDR_DQS0

DDR_DQ3

DDR_DQ0

RP5

1 8
2 7
3 6
4 5

56_0804_8P4R_5%

RP7

1 8
2 7
3 6
4 5

56_0804_8P4R_5%

RP9

1 8
2 7
3 6
4 5

56_0804_8P4R_5%

RP11

1 8
2 7
3 6
4 5

56_0804_8P4R_5%

RP13

1 8
2 7
3 6
4 5

56_0804_8P4R_5%

1 2

R173 56_0402_5%

RP15

56_0804_8P4R_5%

RP18

56_0804_8P4R_5%

RP21

56_0804_8P4R_5%

RP24

1 8
2 7
3 6
4 5

56_0804_8P4R_5%

RP26

1 8
2 7
3 6
4 5

56_0804_8P4R_5%

1 2

R197 56_0402_5%

1 2

R199 56_0402_5%

1 2

R206 56_0402_5%

1 2

R209 56_0402_5%

RP28

1 8
2 7
3 6
4 5

56_0804_8P4R_5%

RP30

1 8
2 7
3 6
4 5

56_0804_8P4R_5%

18
27
36
45

18
27
36
45

18
27
36
45

D

+1.25VS

1 8
2 7
3 6
4 5

56_0804_8P4R_5%

1 8
2 7
3 6
4 5

56_0804_8P4R_5%

1 8
2 7
3 6
4 5

56_0804_8P4R_5%

1 8
2 7
3 6
4 5

56_0804_8P4R_5%

1 8
2 7
3 6
4 5

56_0804_8P4R_5%

1 2

R169 56_0402_5%

56_0804_8P4R_5%

56_0804_8P4R_5%

56_0804_8P4R_5%

56_0804_8P4R_5%

1 8
2 7
3 6
4 5

56_0804_8P4R_5%

1 8
2 7
3 6
4 5

56_0804_8P4R_5%

1 2

R196 56_0402_5%

1 2

R198 56_0402_5%

1 2

R205 56_0402_5%

1 2

R207 56_0402_5%

1 8
2 7
3 6
4 5

56_0804_8P4R_5%

1 8
2 7
3 6
4 5

56_0804_8P4R_5%

D

RP4

RP6

RP8

RP10

RP12

RP14

RP17

RP20

RP22

RP23

RP25

RP27

RP29

E

DDR_DQ60
DDR_DQ61
DDR_DM7
DDR_DQ57

DDR_DQ59
DDR_DQ51
DDR_DQ54DDR_DQ55
DDR_DM6

DDR_DQ53
DDR_DQ48
DDR_DQ46
DDR_DQ47

DDR_DM5
DDR_DQ45
DDR_DQ41
DDR_DQ35

DDR_DQ39
DDR_DM4
DDR_DQ33
DDR_DQ36

DDR_SCS#1

DDR_SCS#0

18

DDR_SCAS#

27

DDR_SCS#3

36

DDR_SRAS#

45

DDR_SBS1

18

DDR_SMA1

27

DDR_SMA0

36

DDR_SMA2

45

DDR_SMA4

18

DDR_SMA_B4

27

DDR_SMA6

36

DDR_SMA_B2

45

DDR_SMA8

18

DDR_SMA11

27

DDR_CKE0

36

DDR_CKE2

45

DDR_DQ30
DDR_DM3
DDR_DQ29

DDR_DQ28
DDR_DQ23
DDR_DQ19
DDR_DM2

DDR_DQ21

DDR_DQ17

DDR_DQ10

DDR_DQ11

DDR_DM1
DDR_DQ12
DDR_DQ9
DDR_DQ6

DDR_DQ4
DDR_DM0
DDR_DQ7
DDR_DQ2

Title

Size Document Number Rev

Date: Sheet

星期三 八月

DDR_SMA[6..12]

DDR_DQ[0..63]

DDR_DQS[0..7]

DDR_DM[0..7]

DDR_SCS#1 <8,10>

DDR_SCS#0 <8,10>
DDR_SCAS# <8,10>
DDR_SCS#3 <8,10>
DDR_SRAS# <8,10>

DDR_SBS1 <8,10>
DDR_SMA1 <8,10>
DDR_SMA0 <8,10>
DDR_SMA2 <8,10>

DDR_SMA4 <8,10>
DDR_SMA_B4 <8,10>

DDR_SMA_B2 <8,10>

DDR_C KE0 <8,10>
DDR_C KE2 <8,10>

Compal Electronics, Inc.

DDR SODIMM Decoupling

EAL20 LA-2461

, 04, 2004

E

DDR_SMA[6..12] <8,10>

DDR_DQ[0..63] <10>

DDR_DQS[0..7] <10>

DDR_DM[0..7] <10>

of

11 47

0.3

A

SEL2 CPUCLKC[0..2]

SEL1

00

0

1

10K_0402_5%

VGATE<7,23,45>

+VCCP

SEL0

1

0

1

+3VS

R498

1 2

166.67

200.00

133.33

+3VS

1 2

R496 0_0402_5%

1 2

R497
56_0402_5%@

0

0

0

0

1 1

2 2

if pull high to +VCCP
Change to DTC124EK

CLK_ICH_48M<23>
CLK_EXT_SD48<28>

CLK_MCH_48M<7>

CLK_ICH_14M<23>
CLK_14M_SIO<33>

3 3

CLK_14M_CODEC<31>

B

+3VS

12

R571

1K_0402_5%

R570

@

1K_0402_5%

R505 10K_0402_5%

C671

1 2

1

2

@

1 2

2

G

0.1U_0402_16V4Z

CPUCLKT[0..2]

166.67

100.00100.00

*

200.001

133.33

+3VS

12

R573

1K_0402_5%

@

R572

1K_0402_5%

13

D

Q38
2N7002_SOT23

S

R532
1K_0402_5%

1 2

1 2

+3VS

SMB_DATA<10,22>

SMB_CLK<10,22>

CLK_SSC_66M<7>

R531 475_0402_1%

1 2

R525 10_0402_5%

1 2

R524 10_0402_5%

1 2

5IN1@

1 2

R526 33_0402_5%

R576 10_0402_5%

1 2

R575 10_0402_5% SIO@

1 2

R574 10_0402_5% @

1 2

C

+3VS

C637
10P_0402_50V8K

1 2

1 2

SLP_S1#<23,34>
STP_PCI#<23>
STP_CPU#<23,45>

1 2

R508 33_0402_5%

XTALIN

12

Y5

14.318MHZ_16PF_DSX840GA

XTALOUT

C631
10P_0402_50V8K

1 2

R530 10K_0402_5%

SSC_66M

CLK_ICH48M

CLK_MCH48M

CLK_ICH14M

U46

2

XTAL_IN

3

XTAL_OUT

54

SEL0

55

SEL1

40

SEL2

25

PWR_DWN#

34

PCI_STOP#

53

CPU_STOP#

28

VTT_PWRGD#

43

MULT0

29

SDATA

30

SCLK

33

3V66_0

35

3V66_1/VCH_CLK

42

IREF

39

48MHZ_USB

38

48MHZ_DOT

56

REF

L100_0805_5%

L350_0805_5%

+3VS_CLK

12

12

1

D

Width=40 mils

1

C640
10U_0805_10V4Z

2

37

14

19

32

46

50

VDD_REF

VDD_PCI_08VDD_PCI_1

VDD_CPU_0

VDD_CPU_1

VDD_48MHZ

VDD_3V66_0

VDD_3V66_1

CPUCLKT2

CPU_CLKC2

CPUCLKT1

CPUCLKC1

CPUCLKT0

CPUCLKC0

PCICLK_F2
PCICLK_F1
PCICLK_F0

GND_REF4GND_PCI_09GND_PCI_115GND_3V66_020GND_3V66_131GND_48MHZ36GND_IREF41GND_CPU

47

CY28346ZCT-2_TSSOP56

VDDA

VSSA

3V66_5

3V66_4
3V66_3
3V66_2

PCICLK6
PCICLK5
PCICLK4
PCICLK3
PCICLK2
PCICLK1
PCICLK0

1

C625

2

0.1U_0402_16V4Z

+3V_VDD

26

1

C599

2

27

0.1U_0402_16V4Z

CLK_MCH

45

CLK_MCH#

44

CLK_BCLK

49

CLK_BCLK#

48

CLK_ITP

52

CLK_ITP#

51

24

MCH_66M

23

AGP_66M

22

ICH_66M

21

PCI_ICH

7
6
5

PCI_MINI

18
17

PCI_LPC

16

PCI_SIO

13

PCI_LAN

12

PCI_1394

11

PCI_PCM

10

E

0.1U_0402_16V4Z

1

C614

2

1 2

L25 0_0805_5%

1

C595
10U_0805_10V4Z

2

1 2

1 2

1 2

1 2

1 2

1 2

0.1U_0402_16V4Z

1

1

C605

2

2

0.1U_0402_16V4Z

R548
33_0402_5%

R539
33_0402_5%

R557
33_0402_5%

R554
33_0402_5%

R569
33_0402_5%

R563
33_0402_5%

1 2
1 2
1 2

1 2

1 2

1 2
1 2
1 2
1 2
1 2

0.1U_0402_16V4Z

1

1

C600

C602

2

2

0.1U_0402_16V4Z

+3VS

CLK_MCH_BCLK <6>

R547

49.9_0402_1%

1 2
1 2

R538 49.9_0402_1%

CLK_MCH_BCLK# <6>

CLK_CPU_BCLK <4>

R556

49.9_0402_1%

1 2
1 2

49.9_0402_1%

R553

CLK_CPU_BCLK# <4>

CLK_CPU_ITP <4>

R568

49.9_0402_1%

1 2
1 2

R562

49.9_0402_1%

CLK_CPU_ITP# <4>

R509 33_0402_5%
R514 33_0402_5% M11@
R515 33_0402_5%

R560 33_0402_5%

R529 33_0402_5% KS@

R534 33_0402_5%
R543 33_0402_5% SIO@
R544 33_0402_5%
R551 33_0402_5%
R552 33_0402_5%

F

1

C620

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C627

2

CLK_MCH_66M <7>
CLK_AGP_66M <13>
CLK_ICH_66M <22>

CLK_PCI_ICH <22>

CLK_PCI_MINI <30>

CLK_PCI_LPC <34>
CLK_ PCI_SIO <33>
CLK_PCI_LAN <26>
CLK_PCI_1394 <27>
CLK_PCI_PCM <28>

1

C205

C639

2

0.1U_0402_16V4Z

G

0.1U_0402_16V4Z

1

C603

2

H

Clock Generator

4 4

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET N OR THE INFORMA TION IT CONTAI NS

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

E

F

Size Document Number Re v

Date: Sheet

Compal Electronics, Inc.

Clock Generator

EAL20 LA-2461

星期

, 04, 2004

三八月

G

of

12 47

H

0.3

5

(20mils)

12

M11@

M11P

M11P

M11P

15mil

1 2

SUS_STAT#

R373 10K_0402_5%M11@

AGP_AD0
AGP_AD1
DVOB_D1
DVOB_D0
DVOB_D3
DVOB_D2
DVOB_D5
DVOB_D4
DVOB_D6
DVOB_D9
DVOB_D8
DVOB_D11
DVOB_D10
DVOBC_CLKINT
AGP_AD14
MDDCDATA
DVOC_VSYNC
DVOC_HSYNC
AGP_AD18
DVOC_D0
DVOC_D1
DVOC_D2
DVOC_D3
DVOC_D4
DVOC_D7
DVOC_D6
DVOC_D9
DVOC_D8
DVOC_D11
DVOC_D10
AGP_AD30
AGP_AD31

DVOB_D7
AGP_CBE#1
AGP_CBE#2
DVOC_D5

CLK_AGP_66M
NB_PCIRST#
AGP_REQ#
AGP_GNT#
AGP_PAR
MDDCCLK
MI2CDATA
MDVICLK
MI2CCLK
MDVIDATA
PCI_PIRQA#

AGP_WBF#

STP_AGP#
AGP_BUSY#
AGP_RBF#
AGP_ADSTB0
DVOC_CLK
AGP_ADSTB0#
DVOC_CLK#

AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7

AGP_ST0
AGP_ST1
AGP_ST2

AGP_SBSTB
AGP_SBSTB#

AGPTEST

AGP_DBIHI
AGP_DBILO

R2SET

R60375_0402_1%

R60475_0402_1%

R36575_0402_1%

VGA_XTALIN

AGP_AD0<7>
AGP_AD1<7>

DVOC_D[0..11]<7,19>

DVOB_D[0..11]<7>

AGP_SBA[0..7]<7>

D D

+3VS

C C

B B

A A

CLK_AGP_66M

12

R383
10_0402_5%

@

1

C465
18P_0402_50V8K

2

@

R120 10K_0402_5%

PCIRST#<7,19,22,25,27,28,30>

+AGP_VREF

0.1U_0402_16V4Z

R368 1K_0402_5%M11@

+1.5VS

R377 1K_0402_5%M11@

DVOC_D[0..1 1]

DVOB_D[0..11]

AGP_SBA[0..7]

DVOBC_CLKINT<7,19>

AGP_AD14<7>

MDDCDATA<7>
DVOC_VSYNC<7,19>
DVOC_HSYNC<7,19>

AGP_AD18<7>

12

M11@

C440

M11@

1 2
1 2

STP_AGP#

AGP_AD30<7>

AGP_AD31<7>

AGP_CBE#1<7>

AGP_CBE#2<7>

CLK_AGP_66M<12>

R382 0_0805_5%

1 2

M11@

AGP_REQ#<7>
AGP_GNT#<7>

AGP_PAR<7>

MDDCCLK<7>

MI2CDATA<7,19>

MDVICLK<7>

MI2CCLK<7,19>

MDVIDATA<7>
PCI_PIRQA#<22,28>

AGP_WBF#<7>

STP_AGP#<23>
AGP_BUSY#<7,23>
AGP_RBF#<7>

AGP_ADSTB0<7>
DVOC_CLK<7,19>

AGP_ADSTB0#<7>
DVOC_CLK#<7,19>

1

+1.5VS

2

+3VS

M11_TV_CRMA<21>

M11_TV_LUMA<21>

SUS_STAT#<23,35>

5

AGP_ST0<7>
AGP_ST1<7>
AGP_ST2<7>

AGP_SBSTB<7>
AGP_SBSTB#<7>

1 2

R380 47_0402_1%M11@

R369 10K_0402_5%M11@

AGP_DBIHI
AGP_DBILO

1 2

R359 715_0603_1%

R379 1K_0402_5%M11@

+3VS

15mil

TESTEN

12

15mil

W26
W25

AA26
AA25
AA27

AG30
AG28
AF28
AD26

M25

W29
W28

AE26

AC26

AH30
AH29
AE29

M28

M29

AD28
AD29
AC28
AC29
AA28
AA29

AF29
AD27
AE28

AB29
AB28

M26
M27

AB25
AB26

AC25

AE11
AF11

AK21

AJ23
AJ22

AK22

AJ24

AK24

AG23
AG24

AK25

AJ25

AH28

AJ29

AH27

AG26

H29
H28

J29

J28
K29
K28

L29

L28
N28
P29
P28
R29
R28
T29
T28
U29
N25
R26
P25
R27
R25
T25
T26
U25
V27

Y26
Y25

N29
U28
P26
U26

N26
V29
V28

V25

V26

Y28
Y29

4

U7A

M10-P/(M9+X)

AD0

(1/6)

AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE#0
C/BE#1
C/BE#2
C/BE#3

PCICLK
RST#
REQ#
GNT#
PAR
STOP#
DEVSEL#
TRDY#
IRDY#
FRAME#
INTA#

WBF#

STP_AGP#
AGP_BUSY#
RBF#
AD_STBF_0
AD_STBF_1
AD_STBS_0
AD_STBS_1

SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7

ST0
ST1
ST2

SB_STBF
SB_STBS

AGPREF
AGPTEST

DBI_HI
DBI_LO

AGP8X_DET#

DMINUS
DPLUS

THRM

R2SET

C_R
Y_G
COMP_B
H2SYNC
V2SYNC

DDC3CLK
DDC3DATA

SSIN

SSOUT

XTALIN

XTALOUT

TESTEN

SUS_STAT#

M11P_BGA708 M11@

4

PCI/AGPAGP8XCLK

SSC DAC2

GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16

VREFG/(NC)

ROMCS#

ZV_LCDDATA0
ZV_LCDDATA1
ZV_LCDDATA2
ZV_LCDDATA3
ZV_LCDDATA4
ZV_LCDDATA5
ZV_LCDDATA6
ZV_LCDDATA7
ZV_LCDDATA8

ZV_LCDDATA9
ZV_LCDDATA10
ZV_LCDDATA11
ZV_LCDDATA12
ZV_LCDDATA13
ZV_LCDDATA14
ZV_LCDDATA15
ZV_LCDDATA16
ZV_LCDDATA17
ZV_LCDDATA18
ZV_LCDDATA19
ZV_LCDDATA20
ZV_LCDDATA21

ZV PORT / EXT TMDS / GPIO / ROMLVDSTMDSDAC1

ZV_LCDDATA22
ZV_LCDDATA23

ZV_LCDCNTL0

ZV_LCDCNTL1

ZV_LCDCNTL2

ZV_LCDCNTL3

DVOMODE

TXOUT_L0N

TXOUT_L0P

TXOUT_L1N

TXOUT_L1P

TXOUT_L2N

TXOUT_L2P

TXOUT_L3N

TXOUT_L3P

TXCLK_LN

TXCLK_LP
TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXOUT_U3N
TXOUT_U3P

TXCLK_UN
TXCLK_UP

DIGON

BLON/(BLON#)

DDC2CLK

DDC2DATA

HSYNC
VSYNC

DDC1DATA

DDC1CLK

AUXWIN

TEST_MCLK/(NC)

TEST_YCLK/(NC)

PLLTEST/(NC)

RSTB_MSK/(NC)

1K_0402_5% M11@

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9

TX0M

TX0P

TX1M

TX1P

TX2M

TX2P

TXCM

TXCP

HPD1

RSET

R381

3

STRAP_G

AJ5

STRAP_H

AH5
AJ4
AK4
AH4
AF4
AJ3
AK3
AH3
AJ2

GPIO10

AH2
AH1
AG3
AG1
AG2

POWER_SEL

AF3

MCLK_SPREAD STRAP_H

AF2

VREFG

AG4

AF5

STRAP_R

AH6

STRAP_S

AJ6

STRAP_T

AK6
AH7
AK7
AJ7
AH8
AJ8
AH9
AJ9
AK9
AH10
AE6
AG6
AF6
AE7
AF7
AE8
AG8
AF8
AE9
AF9
AG10
AF10

ZV_LCDCNTL0

AJ10

ZV_LCDCNTL1

AK10

ZV_LCDCNTL2

AJ11

ZV_LCDCNTL3

AH11

AE10

M11_TXOUT0-

AK16

M11_TXOUT0+

AH16

M11_TXOUT1-

AH17

M11_TXOUT1+

AJ16

M11_TXOUT2-

AH18

M11_TXOUT2+

AJ17
AK19
AH19

M11_TXCLK-

AK18

M11_TXCLK+

AJ18

M11_TZOUT0-

AG16

M11_TZOUT0+

AF16

M11_TZOUT1-

AG17

M11_TZOUT1+

AF17

M11_TZOUT2-

AF18

M11_TZOUT2+

AE18
AH20
AG20

M11_TZCLK-

AF19

M11_TZCLK+

AG19

ENVDD

AE12

ENBKL

AG12

AJ13
AH14
AJ14
AH15
AJ15
AK15
AH13
AK13

AE13
AE14

R345 100K_0402_5%M11@

AF12

AK27

R

AJ27

G

AJ26

B

AG25
AH25

RSET

AH26

15mil

AF25
AF24

R372 10K_0402_5%

AF26

B6

E8

AE25

AG29

12

15mil

1 2

1 2

1 2

R323

M11@

12

1K_0402_1%

12

R327
1K_0402_1%

M11@

R50 10K_0402_5%@

1 2

R52 10K_0402_5%@

1 2

R53 10K_0402_5%@

1 2

R54 10K_0402_5%@

1 2

R370
499_0603_1%M11@

M11@

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET N OR THE INFORMA TION IT CONTAI NS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3VS

M11_TXOUT0- <20>
M11_TXOUT0+ <20>
M11_TXOUT1- <20>
M11_TXOUT1+ <20>
M11_TXOUT2- <20>
M11_TXOUT2+ <20>

M11_TXCLK- <20>
M11_TXCLK+ <20>
M11_TZOUT0- <20>
M11_TZOUT0+ <20>
M11_TZOUT1- <20>
M11_TZOUT1+ <20>
M11_TZOUT2- <20>
M11_TZOUT2+ <20>

M11_TZCLK- <20>
M11_TZCLK+ <20>

ENVDD <20>
ENBKL <34>

M11_CRT_R <21>
M11_CRT_G <21>
M11_CRT_B <21>
M11_CRT_HSYNC <21>
M11_CRT_VSYNC <21>

M11_CRT_DDC_DATA <21>

M11_CRT_DDC_CLK <21>

+3VS

3

POWER_SEL
High for 1.0V
Low for 1.2V

*

POWER_SEL <43>

12

R317
100K_0402_5%

M11@

M11_LCD_DATA <20>
M11_LCD_CLK <20>

+3VS

4M32
Samsung: K4D263238E-GC33
Hynix: HY5DU283222AF-33

8M32
Samsung: K4D553238E-JC33
Hynix: HY5DU573222AFM-33

Memory Config.
GPIO10=High, 128MB
GPIO10=Low, 64MB

*

+3VS

2

GPIO10
0
0
1
1
0
0

R99

1 2

10K_0402_5%

1

C61

0.1U_0402_16V4Z

2

M11@

2

STRAP_G

GPIO10

STRAP_R

STRAP_S

STRAP_T

M11@

+3VS

Pin3 : Reserved for P1819 Spread Rate selection.

*

R46 10K_0402_5%M11@

1 2

R42 10K_0402_5%@

1 2

*

R35 10K_0402_5%M11@

1 2

R41 10K_0402_5%@

1 2

R34 10K_0402_5%128M@

1 2

R36 10K_0402_5%64M@

1 2

R320 10K_0402_5%128M@

1 2

R324 10K_0402_5%64M@

1 2

R48 10K_0402_5%M11@

1 2

R49 10K_0402_5%@

1 2

R330 10K_0402_5%@

1 2

R328 10K_0402_5%M11@

1 2

R

S

T

0

0

0

1

1

0

1

1

0

0

0

1

X1

4

VDD

1

OE

27MHZ_15P M11@

C358 0.1U_0402_16V4Z M11@

U33

7

VDD

1

XIN

8

XOUT

2

VSS

ASM3P1819-SR_SO8M11@

4Mx32 Samsung x4

0

4Mx32 Hynix x4

0

8Mx32 Samsung x4

0

8Mx32 Hynix x4

0

4Mx32 Samsung x2 Ch. A

1

4Mx32 Hynix x2 Ch. A

1

3

OUT

2

GND

DDR SPREAD SPECTRUM

1 2

5

REF

4

MODOUT

R321 22_0402_5% M11@

3

NC

R325 10K_0402_5%@

6

PD#

R343 10K_0402_5%@

Compal Electronics, Inc.

Title

Size Document Number Re v

Custom

Date: Sheet

R119 261_0603_1%

1 2

1 2

1 2

星期

1

+3VS

M11@

1 2

150_0402_1%

R118

M11@

MCLK_SPREADFREQOUT

12

+3VS

VGA_XTALINFREQOUT

C87

@

15P_0402_50V8J

ATI M10-P/M11-AGP/DISPLAY(1/4)

EAL20 LA-2461

, 04, 2004

三八月

1

of

13 47

0.3

5

4

3

2

1

NMDA0
NMDA1
NMDA2
NMDA3
NMDA4
NMDA5
NMDA6
NMDA7
NMDA8
NMDA9
NMDA10
NMDA11
NMDA12
NMDA13
NMDA14
NMDA15
NMDA16
NMDA17
NMDA18
NMDA19
NMDA20
NMDA21
NMDA22
NMDA23
NMDA24
NMDA25
NMDA26
NMDA27
NMDA28
NMDA29
NMDA30
NMDA31
NMDA32
NMDA33
NMDA34
NMDA35
NMDA36
NMDA37
NMDA38
NMDA39
NMDA40
NMDA41
NMDA42
NMDA43
NMDA44
NMDA45
NMDA46
NMDA47
NMDA48
NMDA49
NMDA50
NMDA51
NMDA52
NMDA53
NMDA54
NMDA55
NMDA56
NMDA57
NMDA58
NMDA59
NMDA60
NMDA61
NMDA62
NMDA63

NMDA[0..63]

NMAA[0..13]

NDQMA[0..7]

NDQSA[0..7]

L25
L26
K25
K26

J26
H25
H26
G26
G30
D29
D28
E28
E29
G29
G28
F28
G25
F26
E26
F25
E24
F23
E23
D22
B29
C29
C25
C27
B28
B25
C26
B26
F17
E17
D16
F16
E15
F14
E14
F13
C17
B18
B17
B15
C13
B14
C14
C16
A13
A12
C12
B12
C10

C9

B9
B10
E13
E12
E10
F12
F11

E9

F9

F8

U7B

M10-P/(M9+X)

DQA0

(2/6)

DQA1
DQA2
DQA3
DQA4
DQA5
DQA6
DQA7
DQA8
DQA9
DQA10
DQA11
DQA12
DQA13
DQA14
DQA15
DQA16
DQA17
DQA18
DQA19
DQA20
DQA21
DQA22
DQA23
DQA24
DQA25
DQA26
DQA27
DQA28
DQA29
DQA30
DQA31
DQA32
DQA33
DQA34
DQA35
DQA36
DQA37
DQA38
DQA39
DQA40
DQA41
DQA42
DQA43
DQA44
DQA45
DQA46
DQA47
DQA48
DQA49
DQA50
DQA51
DQA52
DQA53
DQA54
DQA55
DQA56
DQA57
DQA58
DQA59
DQA60
DQA61
DQA62
DQA63

M11P_BGA708 M11@

AA12/(AA13)
AA13/(AA12)

MEMORY INTERFACE

A

MVREFS/(NC)

AA10
AA11

AA14/(NC)

DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7

QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7

RASA#

CASA#

WEA#

CSA0#

CSA1#

CKEA

CLKA0

CLKA0#

CLKA1

CLKA1#

DIMA0
DIMA1

MVREFD

NMDB[0..63]<18>

NMAB[0..13]<18>

NDQMB[0..7]<18>

NDQSB[0..7]<18>

NMAA0

E22

AA0
AA1
AA2
AA3
AA4
AA5
AA6
AA7
AA8
AA9

NMAA1

B22

NMAA2

B23

NMAA3

B24

NMAA4

C23

NMAA5

C22

NMAA6

F22

NMAA7

F21

NMAA8

C21

NMAA9

A24

NMAA10

C24

NMAA11

A25

NMAA12

E21

NMAA13

B20
C19

NDQMA0

J25

NDQMA1

F29

NDQMA2

E25

NDQMA3

A27

NDQMA4

F15

NDQMA5

C15

NDQMA6

C11

NDQMA7

E11

NDQSA0

J27

NDQSA1

F30

NDQSA2

F24

NDQSA3

B27

NDQSA4

E16

NDQSA5

B16

NDQSA6

B11

NDQSA7

F10

NMRASA#

A19

NMCASA#

E18

NMWEA#

E19

NMCSA0#

E20

NMCSA1#

F20

NMCKEA

B19

CLKA0

R77 10_0402_5%M1 1@

B21

CLKA0#

R71 10_0402_5%M1 1@

C20

CLKA1

R64 10_0402_5%M1 1@

C18

CLKA1#

R68 10_0402_5%M1 1@

A18

D30
B13

MVREFD

B7

MVREFS

B8

1 2
1 2

1 2
1 2

NMRASA# <17>

NMCASA# <17>

NMWEA# <17>

NMCSA0# <17>

NMCSA1# <17>

NMCKEA <17>

NMCLKA0

NMCLKA0#

NMCLKA1

NMCLKA1#

NMCLKA0 <17>
NMCLKA0# <17>

NMCLKA1 <17>
NMCLKA1# <17>

NMDA[0..63]<17>

NMAA[0..13]<17>

NDQMA[0..7]<17>

NDQSA[0..7]<17>

D D

C C

B B

NMDB[0..63]

NMAB[0..13]

NDQMB[0..7]

NDQSB[0..7]

NMDB0
NMDB1
NMDB2
NMDB3
NMDB4
NMDB5
NMDB6
NMDB7
NMDB8
NMDB9
NMDB10
NMDB11
NMDB12
NMDB13
NMDB14
NMDB15
NMDB16
NMDB17
NMDB18
NMDB19
NMDB20
NMDB21
NMDB22
NMDB23
NMDB24
NMDB25
NMDB26
NMDB27
NMDB28
NMDB29
NMDB30
NMDB31
NMDB32
NMDB33
NMDB34
NMDB35
NMDB36
NMDB37
NMDB38
NMDB39
NMDB40
NMDB41
NMDB42
NMDB43
NMDB44
NMDB45
NMDB46
NMDB47
NMDB48
NMDB49
NMDB50
NMDB51
NMDB52
NMDB53
NMDB54
NMDB55
NMDB56
NMDB57
NMDB58
NMDB59
NMDB60
NMDB61
NMDB62
NMDB63

U7C

D7

DQB0

F7

DQB1

E7

DQB2

G6

DQB3

G5

DQB4

F5

DQB5

E5

DQB6

C4

DQB7

B5

DQB8

C5

DQB9

A4

DQB10

B4

DQB11

C2

DQB12

D3

DQB13

D1

DQB14

D2

DQB15

G4

DQB16

H6

DQB17

H5

DQB18

J6

DQB19

K5

DQB20

K4

DQB21

L6

DQB22

L5

DQB23

G2

DQB24

F3

DQB25

H2

DQB26

E2

DQB27

F2

DQB28

J3

DQB29

F1

DQB30

H3

DQB31

U6

DQB32

U5

DQB33

U3

DQB34

V6

DQB35

W5

DQB36

W4

DQB37

Y6

DQB38

Y5

DQB39

U2

DQB40

V2

DQB41

V1

DQB42

V3

DQB43

W3

DQB44

Y2

DQB45

Y3

DQB46

AA2

DQB47

AA6

DQB48

AA5

DQB49

AB6

DQB50

AB5

DQB51

AD6

DQB52

AD5

DQB53

AE5

DQB54

AE4

DQB55

AB2

DQB56

AB3

DQB57

AC2

DQB58

AC3

DQB59

AD3

DQB60

AE1

DQB61

AE2

DQB62

AE3

DQB63

M11P_BGA708 M11@

M10-P/(M9+X)
(3/6)

AB12/(AB13)
AB13/(AB12)

MEMORY INTERFACE B

MEMVMODE0
MEMVMODE1

AB10
AB11

AB14/(NC)

DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7

QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7

RASB#

CASB#

WEB#

CSB0#

CSB1#

CKEB

CLKB0

CLKB0#

CLKB1

CLKB1#

DIMB0
DIMB1

MEMTEST

AB0
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9

M1
M3
L3
L2
M2
M5
P6
N3
K2
K3
J2
P5
P3
P2

E6
B2
J5
G3
W6
W2
AC6
AD2

F6
B3
K6
G1
V5
W1
AC5
AD1

R2

T5

T6

R5

R6

R3

N1
N2

T2
T3

C6
C7

E3
AA3

C8

NMAB1
NMAB2
NMAB3
NMAB4
NMAB5
NMAB6
NMAB7
NMAB8
NMAB9
NMAB10
NMAB11
NMAB12
NMAB13

NDQMB0
NDQMB1
NDQMB2
NDQMB3
NDQMB4
NDQMB5
NDQMB6
NDQMB7

NDQSB0
NDQSB1
NDQSB2
NDQSB3
NDQSB4
NDQSB5
NDQSB6
NDQSB7

NMRASB#

NMCASB#

NMWEB#

NMCSB0#

NMCSB1#

NMCKEB

CLKB0
CLKB0#

CLKB1
CLKB1#

15mil

MEMVMODE0
MEMVMODE1

15mil

MEMTEST

15mil

R39 10_0402_5%M11@

1 2

R40 10_0402_5%M11@

1 2

R38 10_0402_5%M11@

1 2

R37 10_0402_5%M11@

1 2

R329 4.7K_0402_5%M11@

1 2

R333 4.7K_0402_5%M11@

1 2

R338 47_0402_1%M11@

1 2

NMRASB# <18>

NMCASB# <18>

NMWEB# <18>

NMCSB0# <18>

NMCSB1# <18>

NMCKEB <18>

NMCLKB0
NMCLKB0#

NMCLKB1
NMCLKB1#

+1.8VS

NMCLKB0 <18>
NMCLKB0# <18>

NMCLKB1 <18>
NMCLKB1# <18>

NMAB0

N5

+2.5VS+2.5VS

12

R341

M11@

1K_0402_1%

20mil 20mil

C362

M11@

0.1U_0402_16V4Z

A A

5

12

1

2

R339

M11@

1K_0402_1%

MVREFSMVREFD

C368

M11@

0.1U_0402_16V4Z

12

R347

M11@

1K_0402_1%

12

1

2

R349

M11@

1K_0402_1%

4

NMCKEA

NMCKEB

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET N OR THE INFORMA TION IT CONTAI NS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

M11@

1 2

R352 10K_0402_5%

M11@

1 2

R315 10K_0402_5%

3

2

Title

Size Document Number Re v

Custom

Date: Sheet

Compal Electronics, Inc.

ATI M10-P/M11-MEMORY(2/4)

EAL20 LA-2461

星期

, 04, 2004

三八月

1

of

14 47

0.3

5

4

3

2

1

+2.5VS

D D

C C

+1.5VS

+VDD_PNLPLL1.8

B B

+VDD_DAC1.8
+VDD_DAC2.5

U7D

B1

VDDR1

B30

VDDR1

A15

VDDR1

A21

VDDR1

A28

VDDR1

A3

VDDR1

A9

VDDR1

AA1

VDDR1

AA4

VDDR1

AA7

VDDR1

AA8

VDDR1

AD4

VDDR1

D5

VDDR1

D8

VDDR1

D11

VDDR1

D13

VDDR1

D14

VDDR1

D17

VDDR1

D20

VDDR1

D23

VDDR1

D26

VDDR1

E27

VDDR1

F4

VDDR1

G7

VDDR1

G10

VDDR1

G13

VDDR1

G15

VDDR1

G19

VDDR1

G22

VDDR1

G27

VDDR1

H10

VDDR1

H13

VDDR1

H15

VDDR1

H17

VDDR1

H19

VDDR1

H22

VDDR1

J1

VDDR1

J23

VDDR1

J24

VDDR1

J4

VDDR1

J7

VDDR1

J8

VDDR1

L27

VDDR1

L8

VDDR1

M4

VDDR1

N4

VDDR1

N7

VDDR1

N8

VDDR1

R1

VDDR1

T4

VDDR1

T7

VDDR1

T8

VDDR1

V4

VDDR1

V7

VDDR1

V8

VDDR1

D19

VDDR1/(CLKAFB)

R4

VDDR1/(CLKBFB)

AC11

VDDC15/(VDDC18)

AC20

VDDC15/(VDDC18)

H11

VDDC15/(VDDC18)

H20

VDDC15/(VDDC18)

L23

VDDC15/(VDDC18)

P8

VDDC15/(VDDC18)

Y23

VDDC15/(VDDC18)

Y8

VDDC15/(VDDC18)

AK12

TPVDD

AJ12

TPVSS

AH24

AVDD

AG21

A2VDD

AH21

A2VDD

AF22

A2VDDQ

AH22

A2VSSN

AJ21

A2VSSN

AF23

A2VSSQ

AH23

AVSSN

AD24

AVSSQ

M11P_BGA708 M11@

M10-P/(M9+X)
(4/6)

I/O POWER

LVDDR_25/(LVDDR_18_25)
LVDDR_25/(LVDDR_18_25)

VDDRH0
VDDRH1

VSSRH0
VSSRH1

MPVDD

MPVSS

PVDD

PVSS

VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3

VDDR4
VDDR4
VDDR4
VDDR4
VDDR4

VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP

LVDDR_18
LVDDR_18

LPVDD

LVSSR
LVSSR
LVSSR
LVSSR
LPVSS

VDD1DI
VDD2DI

VSS1DI
VSS2DI

TXVDDR
TXVDDR

TXVSSR
TXVSSR
TXVSSR

F18
N6

F19
M6

A7
A6

AK28
AJ28

AC19
AC21
AC22
AC8
AD19
AD21
AD22
AD7

AC10
AC9
AD10
AD9
AG7

AA23
AA24
AB30
AC23
AC27
AE30
AF27
J30
M23
M24
N30
P23
P27
T23
T24
T30
U27
V23
V24
W30
Y27

AE20
AE17
AF21
AE15
AJ20

AF20
AF15
AE19
AE16
AJ19

AE24
AE22

AE23
AE21

AF13
AF14

AG13
AG14
AH12

+2.5VS

+VDD_MEMPLL1.8

+VDD_PLL1.8

+3VS

+1.5VS

change to +2.8V (max:350mA)

+LVDDR25

+VDD_PNLIO1.8

+VDD_PNLPLL1.8

+VDD_DAC1.8

+1.5VS

C418

M11@

22U_1206_16V4Z_V1

1

C420

M11@

2

0.1U_0402_16V4Z

1

2

22U_1206_16V4Z_V1

ATI: 22Ux1, 0.1Ux2, 0.01Ux1, 1000Px1

+3VS

C403

M11@

0.1U_0402_16V4Z

20mil, 30mA

C395

M11@

0.1U_0402_16V4Z

C33

M11@

0.1U_0402_16V4Z

20mil, 83mA

C388

M11@

0.1U_0402_16V4Z

1

C421

M11@

2

0.1U_0402_16V4Z

1

C379

M11@

2

0.1U_0402_16V4Z

1

C57

M11@

2

0.1U_0402_16V4Z

L18

1 2

CHB1608B121_0603@

U36

5

1

C396

2

VOUT

M11@

2

GND

MIC5205-2.8BM5_SOT23-5 M11@

1

2

22U_1206_16V4Z_V1

+VDD_PNLIO1.8

1

2

10U_0805_10V4Z

+VDD_PNLPLL1.8

1

2

10U_0805_10V4Z

+LVDDR25

1

10U_0805_10V4Z

2

SA052050010(MIC5205-2.8BM5), max:150mA

1

C431

M11@

2

1

C366

M11@

2

1

C389

M11@

0.1U_0402_16V4Z

2

1

C36

M11@

2

1

C430

M11@

0.1U_0402_16V4Z

2

1

C357

M11@

0.01U_0402_16V7K

2

1

C422

M11@

2

L7

1 2

CHB1608B121_0603M11@

+2.5VS

1

VIN

4

PG

3

EN

1

C459

M11@

2

0.01U_0402_16V7K

1

C363

M11@

2

0.01U_0402_16V7K

L19

1 2

CHB1608B121_0603M11@

+1.8VS

+3VS

1

C458

M11@

0.01U_0402_16V7K

2

+1.8VS

1

C461

M11@

2

0.01U_0402_16V7K

+2.5VS

20mil

1

C355

M11@

2

10U_0805_10V4Z

+VDD_DAC2.5

20mil, 120mA

1

C429

M11@

2

10U_0805_10V4Z

+VDD_PLL1.8

20mil, 22mA

1

C455

M11@

2

10U_0805_10V4Z

+VDD_DAC1.8

20mil, 74mA20mil, 6mA

1

C432

M11@

2

10U_0805_10V4Z

+VDD_MEMPLL1.8

20mil, 6mA

1

C28

M11@

2

10U_0805_10V4Z

1

C426

M11@

0.1U_0402_16V4Z

2

1

C423

M11@

0.1U_0402_16V4Z

2

1

C452

M11@

0.1U_0402_16V4Z

2

1

C435

M11@

0.1U_0402_16V4Z

2

1

C27

M11@

0.1U_0402_16V4Z

2

L21

1 2

CHB1608B121_0603M11@

L22

1 2

CHB1608B121_0603M11@

L20

1 2

CHB1608B121_0603M11@

L6

1 2

CHB1608B121_0603M11@

+2.5VS

+1.8VS

+1.8VS

+1.8VS

A A

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET N OR THE INFORMA TION IT CONTAI NS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

ATI M10-P/M11-POWER(3/4)

Size Document Number Re v

Custom

Date: Sheet

星期

三八月

, 04, 2004

EAL20 LA-2461

1

of

15 47

0.3

5

4

3

2

1

U7E

M10-P/(M9+X)
(5/6)

A10

VSS

A16

VSS

A2

VSS

D D

C C

B B

A22

VSS

A29

VSS

AA30

VSS

AB1

VSS

AB23

VSS

AB24

VSS

AB27

VSS

AB4

VSS

AB7

VSS

AB8

VSS

AC12

VSS

AC14

VSS

AC16

VSS

AC18

VSS

AC4

VSS

AD12

VSS

AD16

VSS

AD18

VSS

AD25

VSS

AD30

VSS

AE27

VSS

AG11

VSS

AG15

VSS

AG18

VSS

AG22

VSS

AG27

VSS

AG5

VSS

AG9

VSS

AJ1

VSS

AJ30

VSS

AK2

VSS

AK29

VSS

C1

VSS

C28

VSS

C3

VSS

C30

VSS

D10

VSS

D12

VSS

D15

VSS

D18

VSS

D21

VSS

D24

VSS

D25

VSS

D27

VSS

D4

VSS

D6

VSS

D9

VSS

E4

VSS

F27

VSS

M11P_BGA708 M11@

CORE POWER

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

H4
H8
H9
H12
H14
H18
H21
H23
H27
K1
K23
K24
K27
K30
K7
K8
L4
M30
M7
M8
N23
N24
N27
P4
R23
R24
R30
R7
R8
T1
T27
U23
U4
U8
V30
W23
W24
W27
W7
W8
Y4
G9
G12
G16
G18
G21
G24

+VGA_CORE +VGA_CORE

M12
M13
M14
M17
M18
M19
N12
N13
N14
N17
N18
N19
P12
P13
P14
P17
P18
P19
U12
U13
U14
U17
U18
U19
V12
V13
V14
V17
V18

V19
W12
W13
W14
W17
W18
W19

AB22

AB9

K22

M22

P22

R22

T22

U22

V22

Y22

U7F

VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC

VDDC
VDDC

J10

VDDC

J12

VDDC

J14

VDDC

J15

VDDC

J16

VDDC

J17

VDDC

J19

VDDC

J21

VDDC
VDDC

K9

VDDC
VDDC

M9

VDDC
VDDC

P9

VDDC
VDDC

R9

VDDC
VDDC

T9

VDDC
VDDC

U9

VDDC
VDDC

V9

VDDC
VDDC

Y9

VDDC

M10-P/(M9+X)
(6/6)

M10-P&M9+X
COMMON

CORE POWER

M10-P
ONLY

M9+X
ONLY

M11P_BGA708M11@

VDDC
VDDC
VDDC
VDDC
VDDC

VDDCI
VDDCI
VDDCI
VDDCI

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AD15
AD13
AC17
AC15
AC13

T12
M15
W16
R19

R12
R13
T13
R14
T14
N15
P15
R15
T15
U15
V15
W15
H16
M16
N16
P16
R16
T16
U16
V16
R17
T17
R18
T18
T19

AA22
AA9
J11
J13
J18
J20
J22
J9
L22
L9
N22
N9
W22
W9

+VDDCI

L17

1 2

CHB1608B121_0603M11@

+VDDCI

+2.5VS

+2.5VS

+VGA_CORE

20mil

1

C370

M11@

2

10U_0805_10V4Z

1

C391

M11@

2

22U_1206_16V4Z_V1

1

C337

M11@

2

22U_1206_16V4Z_V1

(+VGA_CORE = 1.2V)

+VGA_CORE

C405

M11@

1

C365

M11@

2

0.01U_0402_16V7K

1

C338

M11@

2

0.01U_0402_16V7K

1

2

22U_1206_16V4Z_V1

1

2

22U_1206_16V4Z_V1

C401

M11@

C349

M11@

C453

M11@

1

C394

M11@

2

0.1U_0402_16V4Z

C359

M11@

C393

M11@

1

C380

M11@

2

0.1U_0402_16V4Z

1

C451

M11@

2

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

C369

M11@

1

C450

M11@

2

0.01U_0402_16V7K

1

C406

M11@

2

0.01U_0402_16V7K

1

2

0.1U_0402_16V4Z

470U_D2_2.5VM

C377

M11@

C701

@

1

2

0.1U_0402_16V4Z

1

+

2

C398

M11@

+VGA_CORE

1

C378

M11@

2

0.1U_0402_16V4Z

1

+

2

1

2

0.1U_0402_16V4Z

C321
470U_D2_2.5VM

M11@

C390

M11@

1

C407

M11@

2

0.01U_0402_16V7K

1

C402

M11@

2

0.01U_0402_16V7K

A A

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET N OR THE INFORMA TION IT CONTAI NS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Re v

Custom

Date: Sheet

Compal Electronics, Inc.

ATI M10-P/M11-POWER/GND(4/4)

, 04, 2004

EAL20 LA-2461

1

星期

三八月

of

16 47

0.3

5

4

3

2

1

+2.5VS +2.5VS

0.1U_0402_16V4Z

1

1

22U_1206_16V4Z_V1

D D

2

C436

M11@

C414

M11@

2

1

C416

M11@

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C447

M11@

2

0.01U_0402_16V7K

1

C438

M11@

2

0.1U_0402_16V4Z

1

C449

M11@

2

0.01U_0402_16V7K

0.1U_0402_16V4Z

1

C428

M11@

2

1

C448

M11@

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C415

M11@

2

22U_1206_16V4Z_V1

1

C350

C343

M11@

M11@

2

2

0.1U_0402_16V4Z

1

C354

M11@

2

0.1U_0402_16V4Z

1

C340

M11@

2

0.1U_0402_16V4Z

0.01U_0402_16V7K

1

C341

M11@

2

1

C361

M11@

2

0.01U_0402_16V7K

0.1U_0402_16V4Z

1

C360

M11@

2

1

C351

M11@

2

0.1U_0402_16V4Z

1

C339

M11@

2

12

R80

M11@

1K_0402_1%

12

R74

M11@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

NMDA[0..63]

NMAA[0..13]

NDQMA[0..7]

NDQSA[0..7]

NMAA0
NMAA1
NMAA2
NMAA3
NMAA4
NMAA5
NMAA6
NMAA7
NMAA8
NMAA9
NMAA10
NMAA11
NMAA12
NMAA13

NDQMA1
NDQMA2
NDQMA3
NDQMA0

NDQSA1
NDQSA2
NDQSA3

20mil 20mil

2

C50

1

C411

M11@

M11@

1 2

NMRASA#<14>
NMCASA#<14>

NMWEA#<14>

NMCSA0#<14>

NMCKEA<14>

NMCLKA0

R360 56.2_0402_1%M11@

1 2

R355 56.2_0402_1%M11@

1 2

NDQSA0

VR_VREF_1

NMRASA#
NMCASA#
NMWEA#
NMCSA0#

NMCKEA

NMCLKA0#

NMCSA1#<14>

NMCSA1# NMCSA1#

B11

D10

D11

VSSQD4VSSQD5VSSQD6VSSQD9VSSQ

M13

M10

M11
M12

U10

VSSQB4VSSQ

N5

A0

N6

A1

M6

A2

N7

A3

N8

A4

M9

A5

N9

A6

N10

A7

N11

A8/AP

M8

A9

L6

A10

M7

A11

N4

BA0

M5

BA1

B3

DM0

H12

DM1

H3

DM2

B12

DM3

B2

DQS0

H13

DQS1

H2

DQS2

B13

DQS3

N13

VREF
MCL

L9

RFU1
RFU2

M2

RAS#

L2

CAS#

L3

WE#

N2

CS#

N12

CKE

CK
CK#

C4

NC

C11

NC

H4

NC

H11

NC

L12

NC

L13

NC

M3

NC

M4

NC

N3

NC

E7

VSS

E8

VSS

E10

VSS

K6

VSS

K7

VSS

K8

VSS

K9

VSS

L5

VSS

L10

VSS

E5

VSS

VSS THF6VSS THF7VSS THF8VSS THF9VSS THG6VSS THG7VSS THG8VSS THG9VSS THH6VSS THH7VSS THH8VSS THH9VSS THJ6VSS THJ7VSS THJ8VSS TH

VSSQ

VSSQE6VSSQE9VSSQF5VSSQ

F10

G10

H10

J10

K10

VSSQG5VSSQ

VSSQH5VSSQ

VSSQJ5VSSQ

VSSQK5VSSQ

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD

HY5DU573222AFM-33_FBGA144

J9

M11@

NMDA9

B7

NMDA10

C6

NMDA12

B6

NMDA11

B5

NMDA15

C2

NMDA8

D3

NMDA13

D2

NMDA14

E2

NMDA22

K13

NMDA23

K12

NMDA21

J13

NMDA20

J12

NMDA18

G13

NMDA17

G12

NMDA19

F13

NMDA16

F12

NMDA29

F3

NMDA26

F2

NMDA30

G3

NMDA31

G2

NMDA27

J3

NMDA28

J2

NMDA24

K2

NMDA25

K3

NMDA0

E13

NMDA1

D13

NMDA2

D12

NMDA3

C13

NMDA5

B10

NMDA4

B9

NMDA6

C9

NMDA7

B8

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

D7
D8
E4
E11
L4
L7
L8
L11

+2.5VS +2.5VS

NMCLKA1<14>

NMCLKA1#<14>

+2.5VS

12

R43

M11@

1K_0402_1%

12

R47

M11@

1K_0402_1%

0.1U_0402_16V4Z

C342

1 2

M11@

0.1U_0402_16V4Z

2

C24

M11@

1

NMCLKA1

R322 56.2_0402_1%M11@

1 2

R319 56.2_0402_1%M11@

1 2

NMCLKA1#

NMAA0
NMAA1
NMAA2
NMAA3
NMAA4
NMAA5
NMAA6
NMAA7
NMAA8
NMAA9
NMAA10
NMAA11
NMAA12
NMAA13

NDQMA4
NDQMA6
NDQMA5
NDQMA7

NDQSA4
NDQSA6
NDQSA5
NDQSA7

VR_VREF_2

NMRASA#
NMCASA#
NMWEA#
NMCSA0#

NMCKEA

B11

D10

D11

VSSQD4VSSQD5VSSQD6VSSQD9VSSQ

N10
N11

H12

H13

N13
M13

M10

N12

M11
M12

C11

H11

U5

VSSQB4VSSQ

N5

A0

N6

A1

M6

A2

N7

A3

N8

A4

M9

A5

N9

A6
A7
A8/AP

M8

A9

L6

A10

M7

A11

N4

BA0

M5

BA1

B3

DM0
DM1

H3

DM2

B12

DM3

B2

DQS0
DQS1

H2

DQS2

B13

DQS3

VREF
MCL

L9

RFU1
RFU2

M2

RAS#

L2

CAS#

L3

WE#

N2

CS#

CKE

CK
CK#

C4

NC
NC

H4

NC
NC

L12

NC

L13

NC

M3

NC

M4

NC

N3

NC

E7

VSS

E8

VSS

E10

VSS

K6

VSS

K7

VSS

K8

VSS

K9

VSS

L5

VSS

L10

VSS

E5

VSS

VSS THF6VSS THF7VSS THF8VSS THF9VSS THG6VSS THG7VSS THG8VSS THG9VSS THH6VSS THH7VSS THH8VSS THH9VSS THJ6VSS THJ7VSS THJ8VSS TH

VSSQ

VSSQE6VSSQE9VSSQF5VSSQ

F10

G10

H10

J10

K10

VSSQG5VSSQ

VSSQH5VSSQ

VSSQJ5VSSQ

VSSQK5VSSQ

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

HY5DU573222AFM-33_FBGA144

J9

M11@

NMDA39

B7

NMDA38

C6

NMDA37

B6

NMDA36

B5

NMDA35

C2

NMDA34

D3

NMDA33

D2

NMDA32

E2

NMDA51

K13

NMDA49

K12

NMDA50

J13

NMDA48

J12

NMDA54

G13

NMDA55

G12

NMDA53

F13

NMDA52

F12

NMDA44

F3

NMDA46

F2

NMDA43

G3

NMDA45

G2

NMDA42

J3

NMDA47

J2

NMDA41

K2

NMDA40

K3

NMDA63

E13

NMDA61

D13

NMDA62

D12

NMDA58

C13

NMDA57

B10

NMDA60

B9

NMDA56

C9

NMDA59

B8

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

D7
D8
E4
E11
L4
L7
L8
L11

NMDA[0..63]<14>

NMAA[0..13]<14>

NDQMA[0..7]<14>

NDQSA[0..7]<14>

C C

+2.5VS

1K_0402_1%

NMCLKA0<14>

B B

NMCLKA0#<14>

A A

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET N OR THE INFORMA TION IT CONTAI NS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Re v

Custom

Date: Sheet

Compal Electronics, Inc.

VGA DDR CHANNEL A

EAL20 LA-2461

星期

, 04, 2004

三八月

1

of

17 47

0.3

5

+2.5VS

0.1U_0402_16V4Z

1

1

C292

C298

M11@

22U_1206_16V4Z_V1

D D

NMDB[0..63]<14>

NMAB[0..13]<14>

NDQMB[0..7]<14>

NDQSB[0..7]<14>

C C

R17

M11@

1K_0402_1%

+2.5VS

12

12

R13

M11@

1K_0402_1%

2

C9

M11@

1

0.1U_0402_16V4Z

NMCLKB0<14>

C283

M11@

0.1U_0402_16V4Z

B B

NMCLKB0#<14> NMCLKB1#<14>

M11@

2

2

NMDB[0..63]

NMAB[0..13]

NDQMB[0..7]

NDQSB[0..7]

20mil 20mil

NMRASB#<14>
NMCASB#<14>

NMWEB#<14>

NMCSB0#<14>

NMCKEB<14>

NMCLKB0

56.2_0402_1%

R271

M11@

1 2

1 2

M11@

1 2

R272 56.2 _0402_1%

NMCLKB0#

NMCSB1#<14>

0.1U_0402_16V4Z

1

1

C317

M11@

2

0.1U_0402_16V4Z

NMAB0
NMAB1
NMAB2
NMAB3
NMAB4
NMAB5
NMAB6
NMAB7
NMAB8
NMAB9
NMAB10
NMAB11
NMAB12
NMAB13

NDQMB0
NDQMB3
NDQMB1
NDQMB2

NDQSB0
NDQSB3
NDQSB1
NDQSB2

VR_VREF_3 VR_VREF_4

NMRASB#
NMCASB#
NMWEB#
NMCSB0#

NMCKEB

NMCSB1# NMCSB1#

C304

M11@

2

0.1U_0402_16V4Z

U2

N5
N6
M6
N7
N8
M9

N9
N10
N11

M8

L6
M7
N4
M5

B3

H12

H3

B12

B2

H13

H2

B13

N13

M13

L9

M10

M2

L2

L3
N2

N12

M11
M12

C4

C11

H4

H11

L12
L13

M3
M4
N3

E7

E8

E10

K6

K7

K8

K9

L5

L10

E5

A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1

DM0
DM1
DM2
DM3

DQS0
DQS1
DQS2
DQS3

VREF
MCL
RFU1
RFU2

RAS#
CAS#
WE#
CS#

CKE

CK
CK#

NC
NC
NC
NC
NC
NC
NC
NC
NC

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

1

2

B11

VSSQB4VSSQ

C318

M11@

VSSQD4VSSQD5VSSQD6VSSQD9VSSQ

VSS THF6VSS THF7VSS THF8VSS THF9VSS THG6VSS THG7VSS THG8VSS THG9VSS THH6VSS THH7VSS THH8VSS THH9VSS THJ6VSS THJ7VSS THJ8VSS TH

4

0.01U_0402_16V7K

1

C308

M11@

2

0.01U_0402_16V7K

D10

D11

VSSQ

VSSQE6VSSQE9VSSQF5VSSQ

F10

1

2

G10

VSSQG5VSSQ

0.1U_0402_16V4Z

1

C319

C297

M11@

M11@

2

0.1U_0402_16V4Z

H10

J10

K10

VSSQH5VSSQ

VSSQJ5VSSQ

VSSQK5VSSQ

B7

DQ0

C6

DQ1

B6

DQ2

B5

DQ3

C2

DQ4

D3

DQ5

D2

DQ6

E2

DQ7

K13

DQ8

K12

DQ9

J13

DQ10

J12

DQ11

G13

DQ12

G12

DQ13

F13

DQ14

F12

DQ15

F3

DQ16

F2

DQ17

G3

DQ18

G2

DQ19

J3

DQ20

J2

DQ21

K2

DQ22

K3

DQ23

E13

DQ24

D13

DQ25

D12

DQ26

C13

DQ27

B10

DQ28

B9

DQ29

C9

DQ30

B8

DQ31

C3

VDDQ

C5

VDDQ

C7

VDDQ

C8

VDDQ

C10

VDDQ

C12

VDDQ

E3

VDDQ

E12

VDDQ

F4

VDDQ

F11

VDDQ

G4

VDDQ

G11

VDDQ

J4

VDDQ

J11

VDDQ

K4

VDDQ

K11

VDDQ

D7

VDD

D8

VDD

E4

VDD

E11

VDD

L4

VDD

L7

VDD

L8

VDD

L11

VDD

HY5DU573222AFM-33_FBGA144

J9

M11@

1

C315

M11@

2

NMDB7
NMDB4
NMDB6
NMDB5
NMDB0
NMDB1
NMDB2
NMDB3
NMDB24
NMDB26
NMDB29
NMDB31
NMDB30
NMDB28
NMDB25
NMDB27
NMDB14
NMDB15
NMDB13
NMDB12
NMDB9
NMDB11
NMDB8
NMDB10
NMDB21
NMDB23
NMDB22
NMDB20
NMDB16
NMDB18
NMDB17
NMDB19

+2.5VS

3

R16

M11@

1K_0402_1%

NMCLKB1<14>

C282

M11@

0.1U_0402_16V4Z

+2.5VS

12

12

1 2

R15

M11@

1K_0402_1%

2

1

0.1U_0402_16V4Z

NMCLKB1

R274

R275 56.2 _0402_1%

NMCLKB1#

+2.5VS

1

2

22U_1206_16V4Z_V1

C8

M11@

56.2_0402_1%

M11@

1 2

M11@

1 2

C293

M11@

2

1

1

C314

M11@

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

NMAB0
NMAB1
NMAB2
NMAB3
NMAB4
NMAB5
NMAB6
NMAB7
NMAB8
NMAB9
NMAB10
NMAB11
NMAB12
NMAB13

NDQMB4
NDQMB7
NDQMB5
NDQMB6

NDQSB4
NDQSB7
NDQSB5
NDQSB6

NMRASB#
NMCASB#
NMWEB#
NMCSB0#

NMCKEB

1

C300

C306

M11@

M13

M10

M11
M12

M11@

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

B11

U1

VSSQB4VSSQ

VSSQD4VSSQD5VSSQD6VSSQD9VSSQ

N5

A0

N6

A1

M6

A2

N7

A3

N8

A4

M9

A5

N9

A6

N10

A7

N11

A8/AP

M8

A9

L6

A10

M7

A11

N4

BA0

M5

BA1

B3

DM0

H12

DM1

H3

DM2

B12

DM3

B2

DQS0

H13

DQS1

H2

DQS2

B13

DQS3

N13

VREF
MCL

L9

RFU1
RFU2

M2

RAS#

L2

CAS#

L3

WE#

N2

CS#

N12

CKE

CK
CK#

C4

NC

C11

NC

H4

NC

H11

NC

L12

NC

L13

NC

M3

NC

M4

NC

N3

NC

E7

VSS

E8

VSS

E10

VSS

K6

VSS

K7

VSS

K8

VSS

K9

VSS

L5

VSS

L10

VSS

E5

VSS

2

VSS THF6VSS THF7VSS THF8VSS THF9VSS THG6VSS THG7VSS THG8VSS THG9VSS THH6VSS THH7VSS THH8VSS THH9VSS THJ6VSS THJ7VSS THJ8VSS TH

1

2

C316

M11@

D10

D11

VSSQ

VSSQE6VSSQE9VSSQF5VSSQ

1

C305

M11@

2

0.01U_0402_16V7K

F10

VSSQG5VSSQ

1

C299

M11@

2

0.01U_0402_16V7K

G10

H10

J10

K10

VSSQH5VSSQ

VSSQJ5VSSQ

VSSQK5VSSQ

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD

HY5DU573222AFM-33_FBGA144

J9

M11@

1

1

2

0.1U_0402_16V4Z

B7
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

D7
D8
E4
E11
L4
L7
L8
L11

C312

M11@

NMDB38
NMDB39
NMDB37
NMDB36
NMDB34
NMDB35
NMDB33
NMDB32
NMDB63
NMDB62
NMDB60
NMDB61
NMDB56
NMDB58
NMDB59
NMDB57
NMDB47
NMDB45
NMDB46
NMDB44
NMDB40
NMDB43
NMDB41
NMDB42
NMDB52
NMDB54
NMDB55
NMDB53
NMDB51
NMDB50
NMDB48
NMDB49

0.1U_0402_16V4Z

C303

M11@

2

+2.5VS

1

A A

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET N OR THE INFORMA TION IT CONTAI NS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Re v

Date: Sheet

Compal Electronics, Inc.

VGA DDR CHANNEL B

Custom

EAL20 LA-2461

星期

, 04, 2004

三八月

0.3

of

18 47

1

A

TV Encoder

B

C

D

E

remove this page when use M11P

S

G

Q33
2N7002_SOT23

D

13

2

DVOC_D[0..1 1]

R410

UMA@

10K_0402_5%

R404
10K_0402_5%

UMA@

+3VS

+3VS

DVOBC_CLKINT<7,13>

R393

10K_0402_5%

330_0402_5%

DVOC_CLK#<7,13>

DVOC_CLK<7,13>

DVOC_HSYNC<7,13>
DVOC_VSYNC<7,13>

I2C Address = 1110110X

@

R391

UMA@

10K_0402_1%

UMA@

0.1U_0402_16V4Z

DVOC_D11
DVOC_D10
DVOC_D9
DVOC_D8
DVOC_D7
DVOC_D6
DVOC_D5
DVOC_D4
DVOC_D3
DVOC_D2
DVOC_D1
DVOC_D0

R386 0_0402_5%

UMA@

PCIRST#<7,13,22,25,27,28,30>

With Wide & Short Trace

R398
140_0402_1%

UMA@

+1.5VS

R384

UMA@

CH7011_VREF

C469

10K_0402_1%

UMA@

R385

GPIO1
GPIO0

ISET

U37

50

D11

51

D10

52

D9

53

D8

54

D7

55

D6

58

D5

59

D4

60

D3

61

D2

62

D1

63

D0

56

XCLK*

57

XCLK

2

NC

46

Pout/DET#

4

H

5

V

13

RESET*

14

SD

15

SC

7

GPIO1

8

GPIO0

10

AS

35

ISET

19

NC

3

VREF

C477
22P_0402_50V8J

31

NC21NC22NC24NC25NC27NC28NC30NC

C/H Sync

CVBS/B/U

DVDD0
DVDD1
DVDD2

DGND0
DGND1
DGND2

DVDDV

AVDD0
AVDD1
AGND0
AGND1
AGND2

XI/FIN

42

1 2

UMA@

14.318MHZ_16PF_DSX840GA

UMA@

XO

43

Y4

C471
22P_0402_50V8J

9

NC

47

BCO

48

36

CVBS

7011_TV_LUMA

37

Y/G

7011_TV_CRMA

38

C/R/V

39

1
12
49

6
11
64

45

23

NC

29

NC

20

NC

26

NC

32

NC

18
44
16
17
41
33

VDD

34

GND0

40

GND1

CH7011A-T_LQFP64

UMA@

UMA@

UMA@

C472

0.1U_0402_16V4Z

R397 75_0402_1%

UMA@

R396 75_0402_1%

UMA@

+1.5VS

GPIO1

+3VS

+3VS

R605 75_0402_1%

UMA@

R606 75_0402_1%

UMA@

+3VS

R389

10K_0402_5%

@

GPIO0

R388

330_0402_5%

UMA@

7011_TV_LUMA <21>

7011_TV_CRMA <21>

+3VS

C468

C487

UMA@

22U_1206_16V4Z_V1

0.1U_0402_16V4Z

Pull High: PAL
Pull Low: NTSC

C480

UMA@

0.1U_0402_16V4Z

*

C470

UMA@

0.1U_0402_16V4Z

C485

UMA@

0.1U_0402_16V4Z

C464

UMA@

0.1U_0402_16V4Z

UMA@

1 1

2 2

3 3

MI2CDATA<7,13>

MI2CCLK<7,13>

1.5K_0402_5%

4.7K_0402_5%

R395

UMA@

+3VS

R394

UMA@

DVOC_D[0..11]<7,13>

S

UMA@

G

2

UMA@

Q34
2N7002_SOT23

D

13

4 4

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET N OR THE INFORMA TION IT CONTAI NS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Re v

Date: Sheet

Compal Electronics, Inc.

TV Encoder CH7011A

EAL20 LA-2461

星期

, 04, 2004

三八月

0.3

of

19 47

E

5

LCD POWER CIRCUIT

+LCDVDD

+5VALWP

12

R14

D D

ENVDD<13>

GMCH_ENVDD<7>

100_0402_5%

ENVDD

1 2

R22 0_0402_5%UMA@

13

D

S

G

2

Q24

2

2N7002_SOT23

R293

100K_0402_5%

1 2

13

+12VALW

2

G

Q3
DTC124EK_SC59

R20
100K_0402_5%

1 2

13

D

Q1
2N7002_SOT23

S

R18

150K_0402_5%

reserved for GMCH

From EC

C C

BKOFF#<34>

D6 RB751V_SOD323

4

VGS(th)= 0.95V,
ID(max)=2.1A,
RDS(on)= 0.07OHm

1

C15

0.047U_0402_16V7K

2

1 2

+3VS

12

R21

4.7K_0402_5%

DISPOFF#

21

+3VS

13

D

2

G

S

1

C11

2

0.1U_0402_16V4Z

INVPWR_B+

1

C16
68P_0402_50V8K

2

1

C10

4.7U_0805_10V4Z

2

Q2
SI2302DS_SOT23

+LCDVDD

width = 80mil

1

C14

4.7U_0805_10V4Z

2

width = 60mil

1 2

L5 CHB2012U170_0805

1 2

L4 CHB2012U170_0805

B+

0.1U_0402_16V4Z

D30

1

SM05_SOT23

+LCDVDD

C17

3

DAC_BRIG

2

INVT_PWM

3

0.1U_0402_16V4Z

1

C18

2

10U_0805_10V4Z

C301

+3VS

1

2

INVPWR_B+

DAC_BRIG<34>

INVT_PWM<34>
1 2

R294 0_0805_5%

M11_TXOUT0-<13 >
M11_TXOUT0+<13>
M11_TXOUT1-<13 >
M11_TXOUT1+<13>
M11_TXOUT2-<13 >
M11_TXOUT2+<13>
M11_TXCLK-<13>
M11_TXC LK+<13>
M11_TZOUT0-<13>
M11_TZOUT0+<13>
M11_TZOUT1-<13>
M11_TZOUT1+<13>
M11_TZOUT2-<13>
M11_TZOUT2+<13>
M11_TZCLK-<13>
M11_TZCLK+<13>

M11_LCD_DATA<13>
M11_LCD_CLK<13>

LCD CONN.

Width: 40mils

DAC_BRIG
INVT_PWM

+3VS_LCD

LCD_CLK

TZCLK­TZCLK+

TZOUT1­TZOUT1+
TZOUT2+

TZOUT2­TZOUT0+

TZOUT0-

M11_TXOUT0+
M11_TXOUT1­M11_TXOUT1+
M11_TXOUT2­M11_TXOUT2+

M11_TXCLK-

M11_TXC LK+
M11_TZOUT0­M11_TZOUT0+
M11_TZOUT1­M11_TZOUT1+
M11_TZOUT2­M11_TZOUT2+
M11_TZCLK­M11_TZCLK+

2

JP6

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

ACES_87216-3002

R266 0_0402_5%M11@
R267 0_0402_5%M11@
R264 0_0402_5%M11@
R265 0_0402_5%M11@
R263 0_0402_5%M11@
R262 0_0402_5%M11@
R261 0_0402_5%M11@
R260 0_0402_5%M11@
R24 0_0402_5%M11@
R25 0_0402_5%M11@
R29 0_0402_5%M11@
R28 0_0402_5%M11@
R26 0_0402_5%M11@
R27 0_0402_5%M11@
R31 0_0402_5%M11@
R30 0_0402_5%M11@

R259 0_0402_5%M11@
R32 0_0402_5%M11@

10
11
12
13
14
15

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2

1

1

DISPOFF#

2

2

+LCDVDD_LCD

3

3

4

4

LCD_DATA

5

5

6

6

TXCLK+

7

7

TXCLK-

8

8

9

9

TXOUT2+

10

TXOUT2-

11

TXOUT1-

12

TXOUT1+

13

TXOUT0-

14

TXOUT0+

15

TXOUT0-M11_TXOUT0­TXOUT0+
TXOUT1­TXOUT1+
TXOUT2­TXOUT2+
TXCLK­TXCLK+
TZOUT0­TZOUT0+
TZOUT1­TZOUT1+
TZOUT2­TZOUT2+
TZCLK­TZCLK+

LCD_DATA
LCD_CLK

INVPWR_B+

1 2

R19 0_1206_5%

1

+LCDVDD

For ATI M11P

GMCH_TXOUT0-<7>
GMCH_TXOUT0+<7>
GMCH_TXOUT1-<7>
GMCH_TXOUT1+<7>
GMCH_TXOUT2-<7>
GMCH_TXOUT2+<7>
GMCH_TXCLK-<7>
GMCH_TXCLK+<7>
GMCH_TZOUT0-<7>
GMCH_TZOUT0+<7>
GMCH_TZOUT1-<7>
GMCH_TZOUT1+<7>
GMCH_TZOUT2-<7>
GMCH_TZOUT2+<7>
GMCH_TZCLK-<7>
GMCH_TZCLK+<7>

GMCH_LCD_DATA<7>

B B

GMCH_LCD_CLK<7>

GMCH_TXOUT0­GMCH_TXOUT0+
GMCH_TXOUT1­GMCH_TXOUT1+
GMCH_TXOUT2­GMCH_TXOUT2+
GMCH_TXCLK­GMCH_TXCLK+
GMCH_TZOUT0­GMCH_TZOUT0+
GMCH_TZOUT1­GMCH_TZOUT1+
GMCH_TZOUT2­GMCH_TZOUT2+
GMCH_TZCLK­GMCH_TZCLK+

R289 0_0402_5%UMA@

1 2

R290 0_0402_5%UMA@

1 2

R287 0_0402_5%UMA@

1 2

R288 0_0402_5%UMA@

1 2

R286 0_0402_5%UMA@

1 2

R285 0_0402_5%UMA@

1 2

R284 0_0402_5%UMA@

1 2

R283 0_0402_5%UMA@

1 2

R309 0_0402_5%UMA@

1 2

R308 0_0402_5%UMA@

1 2

R304 0_0402_5%UMA@

1 2

R305 0_0402_5%UMA@

1 2

R307 0_0402_5%UMA@

1 2

R306 0_0402_5%UMA@

1 2

R302 0_0402_5%UMA@

1 2

R303 0_0402_5%UMA@

1 2

R282 0_0402_5%UMA@

1 2

R301 0_0402_5%UMA@

1 2

TXOUT0­TXOUT0+
TXOUT1­TXOUT1+
TXOUT2­TXOUT2+
TXCLK­TXCLK+
TZOUT0­TZOUT0+
TZOUT1­TZOUT1+
TZOUT2­TZOUT2+
TZCLK­TZCLK+

LCD_DATA
LCD_CLK

For GMCH

+3VS

LCD_DATA

R424 2.2K_0402_5%

LCD_CLK

A A

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET N OR THE INFORMA TION IT CONTAI NS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Re v

Custom
Date: Sheet

Compal Electronics, Inc.

星期

三八月

1 2

R299 2.2K_0402_5%

1 2

LCD CONN

EAL20 LA-2461

, 04, 2004

0.3

of

20 47

1

A

B

C

D

E

CRT Connector

R3,R5,R6,R9,R23,R291
reserved for GMCH

R4

M11@

M11_CRT_R<13>

1 1

GMCH_CRT_R<7>

M11_CRT_G<13>

GMCH_CRT_G<7>

M11_CRT_B<13>

GMCH_CRT_B<7>

R8

R9

R1

R23

R10

R291

M11@

75_0402_1%

UMA@

75_0402_1%

M11@

75_0402_1%

UMA@

75_0402_1%

M11@

75_0402_1%

UMA@

75_0402_1%

1 2

0_0402_5%

12

R5

UMA@

1 2

0_0402_5%

12

R7

M11@

1 2

0_0402_5%

12

R6

UMA@

1 2

0_0402_5%

12

R2

M11@

1 2

0_0402_5%

12

R3

UMA@

1 2

0_0402_5%

12

ATi suggest use precision termination

0.1U_0402_16V4Z

M11@

2 2

M11_CRT_HSYNC<13>

GMCH_CRT_HSYNC<7>

M11_CRT_VSYNC<13>

GMCH_CRT_VSYNC<7>

1 2

R246 0_0402_5%

UMA@

1 2

R247 0_0402_5%

M11@

1 2

R245 0_0402_5%

UMA@

1 2

R244 0_0402_5%

CRT_R

CRT_G

CRT_B

C265

1 2

CRT_HSYNC

CRT_VSYNC

+3VS

+1.5VS

1

2

8P_0402_50V8K

+CRT_VCC

A2Y

C266

0.1U_0402_16V4Z

M11@

1 2

R11 0_0603_5%

UMA@

1 2

R12 0_0603_5%

R12 reserved for GMCH

1 2

L2

FCM2012C-800_0805

1 2

L1

FCM2012C-800_0805

1 2

L3

FCM2012C-800_0805

1

1

C7

C1

8P_0402_50V8K

5

1

U25

P

4

OE#

G

SN74AHCT1G125GW_SOT353-5

3

1 2

C3

2

2

8P_0402_50V8K

R250 10K_0402_5%

+CRT_VCC

5

1

P

4

OE#

A2Y

G

U24
SN74AHCT1G125GW_SOT353-5

3

8P_0402_50V8K

12

HSYNC

VSYNC

DAN217_SC59

C4

D1

CRT_R_L

CRT_G_L

CRT_B_L

1

2

1
@

2

3

C5

8P_0402_50V8K

1

D3

D2

@

2

3

DAN217_SC59

2

1

C6

2

8P_0402_50V8K

DAN217_SC59

1

2

1 2

L12 FCM1608C-121T_0603

1 2

L13 FCM1608C-121T_0603

33P for GMCH

1
@

3

3.3P for GMCH

1

C262

2

+5VS

2 1

RB411D_SOT23

HSYNC_L

VSYNC_L

1

C261

2

10P_0402_50V8K

D4

0.1U_0402_16V4Z

C260

10P_0402_50V8K

100P_0402_50V8J

F1

POLYSWITCH_1A

C2

DDC_MD2

1

1

C263

2

2

68P_0402_50V8K

1

2

1

C259

2

W=40mils

JP2
FOX_DZ11A91-L7

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

68P_0402_50V8K

+CRT_VCC+R_CRT_VCC

G

S

1 3

D

Q23

2

G

S

+3VS

R243

12

4.7K_0402_5%

CRT_DDC_DATA

CRT_DDC_CLK

12

R257

4.7K_0402_5%

M11@

UMA@

M11@

UMA@

12

R2340_0402_5%

12

R2420_0402_5%

12

R2480_0402_5%

12

R2520_0402_5%

M11_CRT_DDC_DATA <13>

GMCH_CRT_DATA <7>

M11_CRT_DDC_CLK <13>

GMCH_CRT_CLK <7>

+CRT_VCC

R241

12

12

2.2K_0402_5%

R240

2.2K_0402_5%

1 3

D

Q22
2N7002_SOT23

+3VS

2

2N7002_SOT23

R242,R252 reserved for GMCH

R247,R244 reserved for GMCH

C269

D18

LUMA_LTV_LUMA

CRMA_L

1

2

1

2

82P_0402_50V8J

TV-Out Connector

3 3

R256,R253 reserved for TV encoder

M11@

M11_TV_LUMA<13>

7011_TV_LUMA<19>

M11_TV_CRMA<13>

7011_TV_CRMA<19>

4 4

A

1 2

R255 0_0402_5%

UMA@

1 2

R256 0_0402_5%

M11@

1 2

R254 0_0402_5%

UMA@

1 2

R253 0_0402_5%

B

R251

@

TV_CRMA

12

12

R249

@

75_0402_1%

1

C274

75_0402_1%

2

For M11P, Capac itance is 82pF
For CH7011A, Capacitance is 100pF

1

C273

2

82P_0402_50V8J

82P_0402_50V8J

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET N OR THE INFORMA TION IT CONTAI NS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

47P_0402_50V8J@

1 2

C272

1 2

L15 FCM1608C-121T_0603

47P_0402_50V8J@

1 2

C271

1 2

L14 FCM1608C-121T_0603

For M11P, Capac itance is 82pF
For CH7011A, Capacitance is 270pF

C

@

DAN217_SC59

3

C268

1

D17

@

DAN217_SC59

2

3

S-Video
4P Normal Type

JP3

1

1

2

2

3

3

4

4

SUYIN_030336FR004T115ZU

1

2

82P_0402_50V8J

+3VS

GND
GND

5
6

Title

Size Document Number Re v

D

Date: Sheet

Compal Electronics, Inc.

CRT & TV-OUT Connector

EAL20 LA-2461

星期

, 04, 2004

三八月

E

21 47

of

0.3

A

PCI_AD[0..31]<26,27,28,30>

1 1

2 2

CLK_PCI_ICH

CLK_ICH_66M

12

R86

10_0402_5%@

1

C59

15P_0402_50V8J@

2

12

R132
22_0402_5%@

1

C95
10P_0402_50V8K

@

2

PCI_AD[0..31]

PCI Pullups

+3VS

8.2K_1206_8P4R_5%

4 5
3 6
2 7

4

1 8

4 5
3 6
2 7

1

1 8

3 3

4 4

6

2

3

8.2K_0402_5%

8.2K_0402_5%

5

8.2K_1206_8P4R_5%

8.2K_0402_5%

4 5
3 6
2 7
1 8

4 5
3 6
2 7
1 8

4 5
3 6
2 7
1 8

1 2

R97 1K_0402_5%@

PCI_REQ#2
PCI_PIRQD#
PCI_PIRQH#
PCI_PIRQC#

RP40

8.2K_1206_8P4R_5%

PCI_LOCK#
PCI_DEVSEL#
PCI_PERR#
PCI_IRDY#

RP37

8.2K_1206_8P4R_5%

PCI_PIRQF#
PCI_REQ#3
PCI_PIRQE#

RP42

8.2K_1206_8P4R_5%

PCI_SERR#
PCI_FRAME#
PCI_TRDY#
PCI_STOP#

RP38

8.2K_1206_8P4R_5%

PCI_PIRQG#
PCI_PIRQB#
PCI_REQ#0
PCI_REQ#1

RP39

PD_IRQ14

12

R376

SD_IRQ15

12

R129

RP41

PCI_PIRQA#

18

PCI_REQA#

27

PCI_REQ#4

36

PCI_REQB#

45

SIRQ

12

R400

PIDERST#

A

PCIRST#

+3VS

1

5

P

I2O

G

74LVC1G125GW_SOT3535@

3

1 2

R331 0_0402_5%

B

U34A

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_CBE#0< 26,27,28,30>
PCI_CBE#1< 26,27,28,30>
PCI_CBE#2< 26,27,28,30>
PCI_CBE#3< 26,27,28,30>

PCI_REQ#0<27>
PCI_REQ#1<26>
PCI_REQ#2<28>
PCI_REQ#3<30>
PCI_REQ#4<30>

PCI_GNT#0<27>
PCI_GNT#1<26>
PCI_GNT#2<28>
PCI_GNT#3<30>
PCI_GNT#4<30>

CLK_PCI_ICH<12>

PCI_FRAME#<26,27,28,30>

PCI_DEVSEL#<26,27,28,30>

PCI_IRDY#<26,2 7,28,30>

PCI_PAR<26,27,28,30>

PCI_PERR#<26,27,28,30>

PCIRST#<7,13,19,2 5,27,28,30>

PCI_SERR#<26,28,30>

PCI_STOP#<2 6,27,28,30>

PCI_TRDY#<26,27,28,30>

PIDERST#<25>
SIDERST#<25>

PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3

PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4

PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4

CLK_PCI_ICH

PCI_FRAME#
PCI_DEVSEL#
PCI_IRDY#

PCI_PERR#
PCI_LOCK#

PCIRST#
PCI_SERR#
PCI_STOP#
PCI_TRDY#

PCI_REQA#
PCI_REQB#
PIDERST#
SIDERST#

H5

AD0

J3

AD1

H3

AD2

K1

AD3

G5

AD4

J4

AD5

H4

AD6

J5

AD7

K2

AD8

G2

AD9

L1

AD10

G4

AD11

L2

AD12

H2

AD13

L3

AD14

F5

AD15

F4

AD16

N1

AD17

E5

AD18

N2

AD19

E3

AD20

N3

AD21

E4

AD22

M5

AD23

E2

AD24

P1

AD25

E1

AD26

P2

AD27

D3

AD28

R1

AD29

D2

AD30

P4

AD31

J2

C/BE#0

K4

C/BE#1

M4

C/BE#2

N4

C/BE#3

B1

REQ#0

A2

REQ#1

B3

REQ#2

C7

REQ#3

B6

REQ#4

C1

GNT#0

E6

GNT#1

A7

GNT#2

B7

GNT#3

D6

GNT#4

P5

PCICLK

F1

FRAME#

M3

DEVSEL#

L5

IRDY#

G1

PAR

L4

PERR#

M2

LOCK#

W2

PME#

U5

PCIRST#

K5

SERR#

F3

STOP#

F2

TRDY#

B5

REQA#/GPI0

A6

REQB#/GPI1/REQ5#

E8

GNTA#/GPO16

C5

GNTB#/GPO17/GNT5#

ICH4

PCI I/F

EEPROM I/F

SM I/F

SMB_ALERT#/GPI11

CPU I/F

CPU_PWRGOOD

HUB I/F

HUB_VSWING

PIRQE#/GPI2

PIRQF#/GPI3
PIRQG#/GPI4
PIRQH#/GPI5

Interrupt I/F

INTRUDER#

LAN I/F

LAN_RSTSYNC

FW82801DBM_BGA421

U32

4

OE#

B

B_PCIRST# <26,33,34>

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SMLINK0
SMLINK1

SMB_CLK

SMB_DATA

A20GATE

A20M#

DPSLP#

FERR#

IGNNE#

INIT#
INTR

RCIN#

SLP#

SMI#

STPCLK#

CLK66

HI_STB

HI_STB#

HICOMP

HUB_VREF

APICCLK

APICD0
APICD1
PIRQA#
PIRQB#
PIRQC#
PIRQD#

IRQ14
IRQ15

SERIRQ

EE_CS

EE_IN

EE_OUT

EE_SHCLK

LAN_RXD0
LAN_RXD1
LAN_RXD2

LAN_TXD0
LAN_TXD1
LAN_TXD2

LAN_CLK

LAN_RST#

HI10
HI11

C

INTRUDER#

W6

SMLINK0

AC3

SMLINK1

AB1

SMB_CLK

AC4

SMB_DATA

AB4
AA5

Y22
AB23
U23
AA21
W21
V22
AB22
V21

NMI

Y23
U22
U21
W23
V23

L19

HI0

L20

HI1

M19

HI2

M21

HI3

P19

HI4

R19

HI5

T20

HI6

R20

HI7

P23

HI8

L22

HI9

N22
K21

T21

P21
N20

R23
M23
R22

J19
H19
K20
D5
C2
B4
A3
C8
D7
C3
C4
AC13
AA19
J22

D10
D11
A8
C12

A10
A9
A11
B10
C10
A12
C11
B11
Y5

C

1 2

R101 100K_0402_5%

R133

1 2

56_0402_5%

HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10

1 2

CLK_ICH_66M

HUB_RCOMP_ICH
HUB_VREF
HUB_VSWING

APICCLK
APICD0
APICD1
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
PD_IRQ14
SD_IRQ15
SIRQ

1 2

R96

1K_0402_5%@

1 2

R72

10K_0402_5%

2 1

H_FERR#

HUB_PD[0..10]

R130
56_0402_5%

CLK_ICH_66M <12>

HUB_PSTRB <6>
HUB_PSTRB# <6>

APICCLK
APICD0
APICD1

R124

10K_0402_5%

D29RB751V_SOD323

+3VALW

HUB_VREF
HUB_VSWING

PCI_PI RQA# <13,28>
PCI_PIRQB# <28>

PCI_PIRQE# <27>
PCI_ PIRQF# <26>
PCI_PIRQG# <30>
PCI_PIRQH# <30>
PD_IRQ14 <25>
SD_IRQ15 <25>
SIRQ <28,33,34>

R122

10K_0402_5%

1 2

SMB_CLK <10,12>
SMB_DATA <10,12>
ACIN <34,36,38>

GATEA20 <34>
H_A20M# <4>
H_DPSLP# <4,7>
H_FERR# <4>
H_IGNNE# <4>
H_INIT# <4>
H_INTR <4>
H_NMI <4>
H_CPUPWRGD <4>
RC# <34>
H_CPUSLP# <4>
H_SMI# <4>
H_STPCLK# <4>

HUB_PD[0..10] <6>

R123
0_0402_5%

1 2

1 2

HUB_RCOMP_ICH

HUB_VREF

HUB_VSWING

SMB_CLK

SMB_DATA

Title

Size Document Number Rev

Date: Sheet

, 04, 2004

星期三 八月

D

+1.5VS

1 2

R399 48.7_0402_1%

1 2

C484 0.01U_0402_16V7K

1 2

C482 0.01U_0402_16V7K

+3VS

1 2

R69
10K_0402_5%

1 2

R73
10K_0402_5%

INTRUDER#

H_FERR#

SMLINK0

SMLINK1

1 2

R85
330K_0402_5%

1 2

R126

56_0402_5%

R87

1 2

4.7K_0402_5%

R83

1 2

4.7K_0402_5%

+RTCVCC

+VCCP

+3VALW

Compal Electronics, Inc.

ICH4-M(1/3) PCI/HUB/CPU/INT

EAL20 LA-2461

D

22 47

0.3

of

A

1 2

R131 100K_0402_5%

1 1

R63 10K_0402_5%

+3VS

R67 10K_0402_5%

R78 10K_0402_5%

1 2

R70 10K_0402_5%@

+VCCP

1 2

R125

2 2

3 3

4 4

8.2K_0402_5%

+3VS

R408

1 2

1K_0402_5%@

+3VS

R100

+3VS

R336

+3VALW

1 8
2 7
3 6
4 5

1 2

R89 10K_0402_5%

1 2

R90 10K_0402_5%

1 2

R98 10K_0402_5%

PM_DPRSLPVR

LPC_DRQ#0

12

PM_CLKRUN#

12

PM_RSMRST#

12

RTCCLK

CPUPERF#

SB_SPKR

ICH_AC_SDOUT

12

10K_0402_5%@

AGP_BUSY#

12

10K_0402_5%

RP43

OVCUR#1
OVCUR#0
OVCUR#5

10K_1206_8P4R_5%

EC_LID_OUT#

PM_BATLOW#

SCI#

AGP_BUSY#<7,13>

ITP_DBRESET#<4>

PM_BATLOW#<34>

STP_AGP#<13>

PM_CLKRUN#<26,30,33,34>

PM_DPRSLPVR<45>

PWRBTN_OUT#<34>

PM_POK<36>
EC_RIOUT#<34>
PM_RSMRST#<34>

SLP_S1#<12,34>

SLP_S3#<34>

STP_CPU#<12,45>

STP_PCI#<12>

RTCCLK<7>
SUS_STAT#<13,35>
EC_THRM#<34>

+3VS

VGATE<7,12,45>

AC97_BITCLK<31>

AC97_RST#<31>

AC97_SDIN0<31>
AC97_SDIN1<31>

LPC_AD0<33,34>
LPC_AD1<33,34>
LPC_AD2<33,34>
LPC_AD3<33,34>

LPC_DRQ#1<33>

LPC_FRAME#<33,34>

USB20P2+<35>

USB20P2-<35>

USB20P3+<35>

USB20P3-<35>

USB20P4+<35>

USB20P4-<35>

OVCUR#2<35>
OVCUR#3<35>
OVCUR#4<35>

R403

22.6_0402_1%

A

AGP_BUSY#
SYSRST#
PM_BATLOW#
C3_STAT#
PM_CLKRUN#
PM_DPRSLPVR

EC_RIOUT#
PM_RSMRST#

SLP_S4#
SLP_S5#

RTCCLK
SUS_STAT#

EC_THRM#

1 2

R335 8.2K_0402_5%

CPUPERF#

AC97_BITCLK

AC97_SDIN0
AC97_SDIN1

ICH_AC_SDOUT
ICH_AC_SYNC

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_DRQ#0
LPC_DRQ#1
LPC_FRAME#

OVCUR#0
OVCUR#1
OVCUR#2
OVCUR#3
OVCUR#4
OVCUR#5

USB_RBIAS

12

R2

Y3

AB2

T3

AC2

V20
AA1
AB6

Y1
AA6
W18

Y4

Y2
AA2
W19

Y21
AA4
AB3

V1

J21
Y20
V19

B8
C13
D13

A13
B13

D9
C9

T2

R4

T4

U2
U3
U4

T5

C20
D20

A21

B21
C18
D18

A19

B19
C16
D16

A17

B17

B15
C14

A15

B14

A14
D14

A23

B23

J20

G22

F20
G20

F21
H20

F23
H22
G23
H21

F22

E23

AC97_SYNC<31>

AC97_SDOUT<31>

B

U34B

AGPBUSY#
SYSRST#
BATLOW#
C3_STAT#
CLKRUN#
DPRSLPVR
PWRBTN#
PWROK
RI#
RSMRST#
SLP_S1#
SLP_S3#
SLP_S4#
SLP_S5#
STP_CPU#
STP_PCI#
SUS_CLK
SUS_STAT#/LPCPD#
THRM#

SSMUXSEL
CPUPERF#
VGATE/VRMPWRGD

AC97 I/F

AC_BITCLK
AC_RST#
AC_SDATAIN0
AC_SDATAIN1
AC_SDATAIN2
AC_SDATAOUT
AC_SYNC

LPC_AD0
LPC_AD1
LPC_AD2

LPC I/F

LPC_AD3
LPC_DRQ#0
LPC_DRQ#1
LPC_FRAME#

USBP0+
USBP0­USBP1+
USBP1­USBP2+
USBP2­USBP3+
USBP3­USBP4+
USBP4­USBP5+

USB I/F

USBP5-

OC#0
OC#1
OC#2
OC#3
OC#4
OC#5

USB_RBIAS
USB_RBIAS#

GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38

GPIO

GPIO39
GPIO40
GPIO41
GPIO42
GPIO43

FW82801DBM_BGA421

C66

22P_0402_50V8J @

B

ICH4

PM

IST

1

2

GPIO

PDDACK#

IDE I/F

SDDACK#

RTCRST#

CLOCK

MISC

THRMTRIP#

R102
0_0402_5%

1 2

1 2

R107

1

0_0402_5%
C70
22P_0402_50V8J

@

2

C

+3VS

12

R337

10K_0402_5%

R3

GPI7

GPI8
GPI12
GPI13

GPIO25
GPIO27
GPIO28

PDA0
PDA1
PDA2

PDCS1#
PDCS3#

PDDREQ

PDIOR#

PDIOW#

PIORDY

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9

PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

SDA0
SDA1
SDA2

SDCS1#
SDCS3#

SDDREQ

SDIOR#

SDIOW#

SIORDY

SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9

SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

CLK14
CLK48

VBIAS

RTCX1

RTCX2

SPKR

EC_SMI#

V4

SCI#

V5

EC_LID_OUT#

W3
V2
W1
W4

PD_A0

AA13

PD_A1

AB13

PD_A2

W13

PD_CS#1

Y13

PD_CS#3

AB14

PD_DREQ

AA11

PD_DACK#

Y12

PD_IOR#

AC12

PD_IOW#

W12

PD_PIORDY

AB12

PD_D0

AB11

PD_D1

AC11

PD_D2

Y10

PD_D3

AA10

PD_D4

AA7

PD_D5

AB8

PD_D6

Y8

PD_D7

AA8

PD_D8

AB9

PD_D9

Y9

PD_D10

AC9

PD_D11

W9

PD_D12

AB10

PD_D13

W10

PD_D14

W11

PD_D15

Y11

SD_A0

AA20

SD_A1

AC20

SD_A2

AC21

SD_CS#1

AB21

SD_CS#3

AC22

SD_DREQ

AB18

SD_DACK#

AB19

SD_IOR#

Y18

SD_IOW#

AA18

SD_SIORDY

AC19

SD_D0

W17

SD_D1

AB17

SD_D2

W16

SD_D3

AC16

SD_D4

W15

SD_D5

AB15

SD_D6

W14

SD_D7

AA14

SD_D8

Y14

SD_D9

AC15

SD_D10

AA15

SD_D11

Y15

SD_D12

AB16

SD_D13

Y16

SD_D14

AA17

SD_D15

Y17

CLK_ICH_14M

J23

CLK_ICH_48M

F19

RTC_RST#

W7

VBIAS

Y6

RTCX1

AC7

RTCX2

AC6

SB_SPKR

H23

THRMTRIP#

W20

ICH_AC_SYNC

ICH_AC_SDOUT

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

EC_SMI# <34>
SCI# <34>
EC_LID_OUT# <34>
EC_FLASH# <35>

PD_A0 <25>
PD_A1 <25>
PD_A2 <25>
PD_CS#1 <25>
PD_CS#3 <25>

PD_DREQ <25>
PD_DACK# <25>
PD_IOR# <25>
PD_IOW# <25>
PD_PIORDY <25>

SD_A0 <25>
SD_A1 <25>
SD_A2 <25>
SD_CS#1 <25>
SD_CS#3 <25>

SD_DREQ <25>
SD_DACK# <25>
SD_IOR# <25>
SD_IOW# <25>
SD_SIORDY <25>

CLK_ICH_14M <12>
CLK_ICH_48M <12>

SB_SPKR <31>

THRMTRIP# <4>

15P_0402_50V8J

C400

PD_D[0..15]

SD_D[0..15]

1 2

R354
10M_0402_5%

1

4

1

IN

2

OUT

NC3NC

2

Y3

32.768KHZ_12.5P_1TJS125DJ2A073

C

12

J1
JOPEN

10M_0402_5%

1 2

R351

1

C417
15P_0402_50V8J

2

PD_D[0..15] <25>

SD_D[0..15] <25>

R579

1K_0402_5%

12

SLP_S4#

SLP_S5#

SN74LVC08APW_TSSOP14

R_VBIAS

1 2

C381

0.047U_0603_16V7K

R350
22M_0603_5%@

R346

2.4M_0603_1%@

1 2

12

13

1 2

R91

1

180K_0402_5%

C55

0.1U_0402_16V4Z

2

1 2

12

D

+3VALW+3VS

14

U16D

P

A

11

O

B

G

7

+RTCVCC

R79
1K_0402_5%

Title

Size Document Number Rev

Date: Sheet

PM_SLP_S5# <34>

CLK_ICH_14M

CLK_ICH_48M

12

R402
22_0402_5%@

1

C486
10P_0402_50V8K

@

2

12

R128
22_0402_5%

@

1

C101
10P_0402_50V8K

@

2

Compal Electronics, Inc.

ICH4-M(2/3) PM/AC97/USB/IDE

EAL20 LA-2461

, 04, 2004

星期三 八月

D

23 47

0.3

of

A

B

C

D

E

F

G

H

U34C

VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101

ICH4

POWERGND

VCC3.3_0
VCC3.3_1
VCC3.3_2
VCC3.3_3
VCC3.3_4
VCC3.3_5
VCC3.3_6
VCC3.3_7
VCC3.3_8

VCC3.3_9
VCC3.3_10
VCC3.3_11
VCC3.3_12
VCC3.3_13
VCC3.3_14
VCC3.3_15

VCCSUS3.3_0
VCCSUS3.3_1
VCCSUS3.3_2
VCCSUS3.3_3
VCCSUS3.3_4
VCCSUS3.3_5
VCCSUS3.3_6
VCCSUS3.3_7
VCCSUS3.3_8
VCCSUS3.3_9

VCC1.5_0

VCC1.5_1

VCC1.5_2

VCC1.5_3

VCC1.5_4

VCC1.5_5

VCC1.5_6

VCC1.5_7

VCCSUS1.5_0
VCCSUS1.5_1
VCCSUS1.5_2
VCCSUS1.5_3
VCCSUS1.5_4
VCCSUS1.5_5
VCCSUS1.5_6
VCCSUS1.5_7

VCC5REF1
VCC5REF2

VCC5REFSUS1

VCCHI_0
VCCHI_1
VCCHI_2
VCCHI_3

VCC_CPU_IO_0
VCC_CPU_IO_1
VCC_CPU_IO_2

VCCPLL

VCCRTC

VCCLAN3.3_0
VCCLAN3.3_1

VCCLAN1.5_0
VCCLAN1.5_1

D22
E10
E14
E16
E17
E18
E19
E21

1 1

2 2

3 3

4 4

E22

F8
G19
G21

G3

G6

H1

J6
K11
K13
K19
K23

K3
L10
L11
L12
L13
L14
L21

M1

M11
M12
M13
M20
M22
N10
N11
N12
N13
N14
N19
N21
N23

N5

P11
P13
P20
P22

P3

R18
R21

R5

T1

T19
T23
U20
V15
V17

V3

W22

W5
W8

Y19

Y7

A16
A18
A20
A22

A4

AA12
AA16
AA22

AA3
AA9

AB20

AB7

AC1
AC10
AC14
AC18
AC23

AC5

B12

B16

B18

B20

B22

B9
C15
C17
C19
C21
C23

C6

D1
D12
D15
D17
D19
D21
D23

D4

D8

A1

FW82801DBM_BGA421

A5
AC17
AC8
B2
H18
H6
J1
J18
K6
M10
P12
P6
U1
V10
V16
V18

E11
F10
F15
F16
F17
F18
K14
V7
V8
V9

K10
K12
K18
K22
P10
T18
U19
V14

E12
E13
E20
F14
G18
R6
T6
U6

E7
V6

E15

L23
M14
P18
T22

AA23
P14
U18

C22

AB5

E9
F9

F6
F7

+3VS

+3VALW

+1.5VS

+1.5VALW

VCC5REFSUS

+1.5VS

+VCCP

10U_0805_10V4Z

VCC5REF

+1.5VS

+RTCVCC

+3VS

+1.5VS

1

C466

2

1

C353

2

1U_0603_10V4Z

C460

1U_0603_10V4Z

1

C352

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1U_0603_10V4Z

1

2

1

C99

2

+1.5VS

1

C84

2

+3VALW

1

C89

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C65

2

0.1U_0402_16V4Z

1

C73

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

1

C83

2

0.1U_0402_16V4Z

1SS355_SOD323

VCC5REFSUS

RTC Battery

BATT1

-

ML1220T13RE

0.1U_0402_16V4Z

1

C49

2

1

C60

2

+3VALW

D23

1 2

1

2

+

12

BAS40-04_SOT23

+RTCVCC

1

C35

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+5VALW

12

R116
1K_0402_5%

C86

0.1U_0402_16V4Z

+RTCPWR

1

D24

3

1

2

C46

C68

+1.5VS

C483

2

0.1U_0402_16V4Z

1

C91

2

+1.5VS

1

2

1

2

1SS355_SOD323

VCC5REF

C488

1 2

0.1U_0402_16V4Z

+CHGRTC

+1.5VALW

1

C72

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C56

0.1U_0402_16V4Z

2

1

C100

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

VCCHI power place

+5VS

+3VS

12

1 2

1

C54

0.1U_0402_16V4Z

2

R84
1K_0402_5%@

D22

+3VS+3VS

+1.5VS

1

2

C90

1

2

0.1U_0402_16V4Z

1

C48

2

0.1U_0402_16V4Z

1

C85

0.01U_0402_16V7K

2

1

C98

2

C67

VCCPLL power placeVCC1.5 power place VCCLAN1.5 power place

+VCCP

1

C82

0.1U_0402_16V4Z

2

+5VCD

12

R182
1K_0402_5%

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS

A

B

C

D

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

E

F

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

ICH4-M(3/3) PWR/GND

EAL20 LA-2461

, 04, 2004

星期三 八月

G

of

24 47

H

0.3

5

4

3

2

1

HDD Connector

D D

R601

4.7K_0402_5%

1 2

+3VS

PD_PIORDY<23>

This is reverse type conn, PIDE_RST# connect to pin44.
After connector library ready,
correct connection is PIDE_RST# connect to pin1!

C C

PD_DREQ<23 >

PD_IOW#<23>

PD_IOR#<23>

PD_DACK#<23>

PD_IRQ14<22>

PD_CS#1<23>

PHDD_LED#<34 >

1 2

+5VS

R127 100K_0402_5%

PD_A1<23>
PD_A0<23>

CDROM CONN

SD_D[0..15]<23>

PD_D[0..15]<23>

PIDE_RST#
PD_D7
PD_D6
PD_D5
PD_D4
PD_D3
PD_D2
PD_D1
PD_D0

PD_DREQ

PD_PIORDY

PHDD_LED#

+5VS

PD_D[0..15]

SUYIN_20125A-44G5T-01-C_NORMAL

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44

JP8

SD_D[0..15]

PD_D8
PD_D9
PD_D10
PD_D11
PD_D12
PD_D13
PD_D14
PD_D15

PCSEL

1 2

R103
470_0402_5%

1 2

PD_A2 <23>
PD_CS# 3 <23>

+5VS

R117
10K_0402_5%

Q6

SI3443DV_TSOP6

D

S

6

+5VALW

+5VALW

SD_CS#3<23>

SD_CS#1<23>

SD_CS#3 SW_SD_CS#3

4 5

R184

1 2

240K_0402_5%

C172

1 2

1U_0603_10V4Z

+3VALW

1

14

P

I2O
G

SN74LVC125APWLE_TSSOP14

7

4

I5O

SN74LVC125APWLE_TSSOP14

G

3

R186 10K_0402_5%

G_PCI_RST#

U15A

3

OE#

G_PCI_RST#

U15B

6

OE#

2
1

1

C177
10U_0805_10V4Z

2

12

+5VCD

12

+5VCD

12

SW_SD_CS#1SD_CS#1

13

R176
10K_0402_5%

R178
10K_0402_5%

1

C168

0.1U_0402_16V4Z

2

CD_PLAY

2

Q7
DTC124EK_SC59

+5VCD

1000P_0402_50V7K

Placea caps. near HDD
CONN.

+5VS

1

C475

2

CD_P LAY <32,34>

10U_1206_16V4Z

1

C479

2

PIDERST#<22>

1

C473

2

10U_1206_16V4Z

PCIRST#

1U_0603_10V4Z

EC_IDERST<31,34>

+3VALW

14

4

P

A

5

B

G

7

1

2

1

C478

U16B

6

O

SN74LVC08APW_TSSOP14

C474

2

0.1U_0402_16V4Z

1

2

+3VALW

0.1U_0402_16V4Z

14

P

A

B

G

7

C138

1 2

U16A

PIDE_RST#

3

O

SN74LVC08APW_TSSOP14

C162

CD_AGND

12

10U_0805_10V4Z

INT_CD_L<31>

B B

R484

4.7K_0402_5%

1 2

+3VS

SD_SIORDY<23 >

SHDD_LED#<34 >

+5VCD

R504 100K_0402_5%

A A

C598
1000P_0402_50V7K

SD_IOW#<23>

SD_IRQ15<22>

SD_A1<23>
SD_A0<23>

1 2

470_0402_5%

Placea caps. near CDROM

+5VCD

CONN.

1

2

0.1U_0402_16V4Z

5

INT_CD_L

SIDE_RST#
SD_D7
SD_D6
SD_D5 SD_D11
SD_D4
SD_D3
SD_D2
SD_D1
SD_D0

SD_IOW#

SD_SIORDY

SD_IRQ15

SW_SD_CS#1
SHDD_LED#

+5VCD

SD_CSEL

R533

1 2

1

1

C596

2

C601

1U_0603_10V4Z

2

1
3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49

ALLTOP_C12431-1-5001

1

C606
10U_1206_16V4Z

2

CD_AGND <31>

JP11

PCMRST#<34>

INT_CD_R

2
4

SD_D8

6

SD_D9

8

SD_D10

10
12

SD_D12

14

SD_D13

16

SD_D14

18

SD_D15

20

SD_DREQ

22

SD_IOR#

24
26

SD_DACK#

28
30

PDIAG#

32
34

SW_SD_CS#3

36

W=80mils

38
40
42
44
46
48
50

1 2

R541 100K_0402_5%@

5251

4

R490

1 2

INT_CD_R <31>

1 2

R167 0_0603_5%@

SD_DREQ <23>
SD_IOR# <23>

SD_DACK# <23>

100K_0402_5%

SD_A2 <23>

+5VCD

+5VCD

+5VCD

SIDERST#<22>

SN74LVC08APW_TSSOP14

PCIRST#

PCIRST#<7,13,19,2 2,27,28,30>

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

2

G

PCIRST#

+3VALW

12

R177
10K_0402_5%

G_PCI_RST#

13

D

2N7002_SOT23
Q5

S

Title

Size Document Number Rev

Date: Sheet

+3VALW

14

U16C

9

P

A

10

B

10K_0402_5%

8

O

G

7

R165

I9O

SN74LVC125APWLE_TSSOP14

1 2

Compal Electronics, Inc.

HDD & CDROM Connector & Direct CD

EAL20 LA-2461

星期三 八月

1

+5VCD

12

U15C

8

25 47, 04, 2004

R179
10K_0402_5%

SIDE_RST#

of

0.3

10

OE#

5

4

3

2

1

R310

49.9_0402_1%

+3V

ACTIVITY#

+3V

LINK10_100#

0.1U_0402_16V4Z

1

C344

2

+3V

1

C348

0.1U_0402_16V4Z

2

LAN_RD+
LAN_RD-

LAN_TD+
LAN_TD-

12

12

R311

49.9_0402_1%

1

C326

0.01U_0402_25V7Z

2

E

3 1

3 1

C

47K

B

10K

2

E

C

47K

B

10K

Q26
DTA114YKA_SOT23

2

1

C346

2

0.1U_0402_16V4Z

1

C325

0.1U_0402_16V4Z

2

Q25
DTA114YKA_SOT23

1 2

R268
300_0402_5%

RJ45_RX-

RJ45_RX+

RJ45_TX-

RJ45_TX+

1 2

R258
300_0402_5%

RJ45_GND

20mil

1

C285

0.1U_0402_16V4Z

2

H=1.98mm

U28

1

RD+

RX+

2

RD-

RX-

3

CT

6

CT

7

TD+

TX+

TD-8TX-

NS0013_16P

10mil

10mil

12

12

R269

R270

75_0402_1%

75_0402_1%

C275
1000P_1206_2KV7K

LAN RTL8100C(L)

16
15
14

CT

11

CT

10
9

R278

75_0402_1%

12

11

8

7

6

5

4

3

2

1

10

9

1 2

Termination plane should be closed
to chassis ground and also depends
on safety concern

RJ45_RX+
RJ45_RX-

RJ45_TX+
RJ45_TX-

12

12

R277
75_0402_1%

RJ45_GND

JP4

Amber LED+

Amber LED-

PR4-

PR4+

PR2-

PR3-

PR3+

PR2+

PR1-

PR1+

Green LED-

Green LED+

AMP RJ45/RJ11 with LED

SHLD4

SHLD3

SHLD2

SHLD1

1

C267

2

0.1U_0402_16V4Z

16

15

14

13

LANGND

1

C270

4.7U_0805_10V4Z

2

PCI_AD[0..31]<22,27 ,28,30>

D D

12

R279

10_0402_5%

1

C284

15P_0402_50V8J

C C

B B

LAN_X1 LAN_X2

1

2

2

Y1

25MHZ_20P_1BX25000CK1A

C320
27P_0402_50V8J

PCI_AD[0..3 1]

CLK_PCI_LAN

PCI_CBE#0<22 ,27,28,30>
PCI_CBE#1<22 ,27,28,30>
PCI_CBE#2<22 ,27,28,30>
PCI_CBE#3<22 ,27,28,30>

PCI_AD17 LAN_IDSEL

R300 100_0402_5%

PCI_PAR<22,27,28,30>

PCI_FRAME#<22,27,28,30>

PCI_IRDY#<22,27,28,30>

PCI_TRDY#<22,27,28,30>

PCI_DEVSEL#<22,27,28,30>

PCI_STOP#<22,27,28,30>

PCI_PERR#< 22,27,28,30>
PCI_SERR#<22,28,30>

PCI_REQ#1<22>
PCI_GNT#1<22>

PCI_PIRQF#<22>

ONBD_LAN_PME#<28,30,34>

B_PCIRST#<22,33,34>

CLK_PCI_LAN<12>
PM_CLKRUN#<23,30,33,34>

1

2

1 2

C311
27P_0402_50V8J

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3

CLK_PCI_LAN
PM_CLKRUN#

U26

104

AD0

103

AD1

102

AD2

98

AD3

97

AD4

96

AD5

95

AD6

93

AD7

90

AD8

89

AD9

87

AD10

86

AD11

85

AD12

83

AD13

82

AD14

79

AD15

59

AD16

58

AD17

57

AD18

55

AD19

53

AD20

50

AD21

49

AD22

47

AD23

43

AD24

42

AD25

40

AD26

39

AD27

37

AD28

36

AD29

34

AD30

33

AD31

92

C/BE#0

77

C/BE#1

60

C/BE#2

44

C/BE#3

46

IDSEL

76

PAR

61

FRAME#

63

IRDY#

67

TRDY#

68

DEVSEL#

69

STOP#

70

PERR#

75

SERR#

30

REQ#

29

GNT#

25

INTA#

31

PME#

27

RST#

28

CLK

65

CLKRUN#

4

GND/VSS

17

GND/VSS

128

GND/VSS

21

GND/VSSPST

38

GND/VSSPST

51

GND/VSSPST

66

GND/VSSPST

81

GND/VSSPST

91

GND/VSSPST

101

GND/VSSPST

119

GND/VSSPST

35

GND

52

GND

80

GND

100

GND

RTL8100C_QFP128

EEDO

AUX/EEDI

EESK
EECS

LED0
LED1
LED2

NC/LED3

TXD+/MDI0+

TXD-/MDI0-

RXIN+/MDI1+

RXIN-/MDI1-

NC/MDI2+

NC/MDI2-

NC/MDI3+

NC/MDI3-

X1
X2

LWAKE

ISOLATE#

RTSET

NC/SMBCLK

NC/SMBDATA

NC/M66EN

NC/AVDDH

PCI I/F

NC/HV

NC/HSDAC+

NC/HG
NC/LG2
NC/LV2

NC/VSS
NC/VSS

NC/GND
NC/GND
NC/GND
NC/GND

LAN I/F

NC/GND
NC/GND

CTRL25

RTT3/CRTL18

VDD33

VDD33

VDD33

VDD33

VDD33

VDD33

VDD33

AVDD33/AVDDL
AVDD33/AVDDL
AVDD33/AVDDL

NC/AVDDL

VDD25/VDD18
VDD25/VDD18
VDD25/VDD18
VDD25/VDD18

NC/VDD18
NC/VDD18
NC/VDD18
NC/VDD18
NC/VDD18

Power

AVDD25/HSDAC-

LAN_EEDO

108

LAN_EEDI

109

LAN_EECLK

111

LAN_EECS

106

ACTIVITY#

117

LINK10_100#

115
114
113

LAN_TD+

1

LAN_TD-

2

LAN_RD+

5

LAN_RD-

6

14
15
18
19

LAN_X1

121

LAN_X2

122

105

LAN_ISOLATE#

23

LOAN_RTSET

127
72
74

88

10
120

11
123
124

+LAN_DVDD

126

9
13

22
48
62
73
112
118

CTRL25

8

125

26
41
56
71
84
94
107

+LAN_AVDDL

3
7
20
16

32
54
78
99

24
45
64
110
116

+2.5V_LAN_VDD

12

20mil

C289

0.1U_0402_16V4Z

1 2

10mil

R280 1K_0402_5%
R281 15K_0402_5%
R292 5.36K_0603_1%

10mil

+3V

40mil

1

C286

0.1U_0402_16V4Z

2

+LAN_DVDD

40mil

1

0.1U_0402_16V4Z

C331

2

0.1U_0402_16V4Z

1

2

R314

5.6K_0402_5%

1 2
1 2
1 2

CTRL25

10U_0805_10V4Z

1

0.1U_0402_16V4Z

C290

2

1

C322

0.1U_0402_16V4Z

2

1 2

R276 0_0805_5%

1

C287
10U_0805_10V4Z

2

+3V

+3V

31

E

2

B

C

1

C294

2

1 2

L16 0_0805_5%

1

C291

0.1U_0402_16V4Z

2

1 2

R273 0_0805_5%

1

C345

2

LAN_EECS
LAN_EECLK
LAN_EEDI
LAN_EEDO

+3VS

Q27
2SB1197K_SOT23

40mil

1

C288

0.1U_0402_16V4Z

2

+3V

+2.5V_LAN

49.9_0402_1%

0.01U_0402_25V7Z

+2.5V_LAN

+3V

+2.5V_LAN

0.1U_0402_16V4Z

1

1

C324

2

2

0.1U_0402_16V4Z

U30

1

CS

VCC

2

SK

3

DI

4

DO

GND

AT93C46-10SI-2.7_SO8

12

R312

C328

1

C302

2

0.1U_0402_16V4Z

8
7

NC

6

NC

5

12

R313

49.9_0402_1%

1

2

C347

A A

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET N OR THE INFORMA TION IT CONTAI NS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Re v

Custom

Date: Sheet

Compal Electronics, Inc.

LAN RTL8100CL

EAL20 LA-2461

星期

, 04, 2004

三八月

1

of

26 47

0.3

C583

0.1U_0402_16V4Z

PCI_CBE#0<22 ,26,28,30>
PCI_CBE#1<22 ,26,28,30>
PCI_CBE#2<22 ,26,28,30>
PCI_CBE#3<22 ,26,28,30>

PCI_AD16

PCI_FRAME#<22,26,28,30>

PCI_TRDY#<22,26,28,30>

PCI_DEVSEL#<22,26,28,30>

PCI_STOP#<22,26,28,30>

PCI_PERR#< 22,26,28,30>

PCI_REQ#0<22>
PCI_GNT#0<22>

PCI_PIRQE#<2 2>

CLK_PCI_1394<12>

A

PCI_AD[0..31]<22,26,28,30>

1 2

PCI_IRDY#<22,26 ,28,30>

PCI_PAR<22,26,28,30>

PCIRST#<7,13,19,22,25,28,30>

C571

0.1U_0402_16V4Z

+3VS

C522

1000P_0402_50V7K

PCI_AD[0..3 1]

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

R428 100_0402_5%

CLK_PCI_1394

12

R446
10_0402_5%@

1

C541
18P_0402_50V8K

@

2

C555

0.1U_0402_16V4Z

C535

1000P_0402_50V7K

U41

25

AD0

24

AD1

20

AD2

19

AD3

18

AD4

16

AD5

15

AD6

14

AD7

11

AD8

10

AD9

9

AD10

8

AD11

7

AD12

4

AD13

3

AD14

2

AD15

117

AD16

116

AD17

115

AD18

114

AD19

113

AD20

109

AD21

107

AD22

106

AD23

103

AD24

102

AD25

101

AD26

98

AD27

97

AD28

96

AD29

95

AD30

94

AD31

12

CBE0#

1

CBE1#

119

CBE2#

104

CBE3#

105

IDSEL

120

FRAME#

121

IRDY#

123

TRDY#

124

DEVSEL#

125

STOP#

127

PERR#

128

PAR

93

REQ#

92

GNT#

88

INTA#

89

PCIRST#

90

PCICLK

C549

0.1U_0402_16V4Z

PCI Bus

NC45NC48NC49NC50NC37NC51NC52NC53NC54NC40NC39NC35NC74NC75NC76NC77NC78NC64NC81NC82NC83NC84NC85I2CEN43CARDEN

NC41NC

42

+3VS

C580

0.1U_0402_16V4Z

1 1

2 2

IDSEL:PCI_AD16

3 3

4 4

B

C521

0.1U_0402_16V4Z

C520

1000P_0402_50V7K

46

PVD36PVD

110

VCC99VCC

122

C579

0.1U_0402_16V4Z

C568

1000P_0402_50V7K

+3VS

111

VCC

VCC5VCC17VCC32VCC

C537

0.1U_0402_16V4Z

C540

1000P_0402_50V7K

21

30

31

VCC

VCC

GND47GND

GND91GND

Power

IEEE 1394

VT6301S

NC

44

+3VS

If use 93C46, Delete R649

R487

4.7K_0402_5%

C588
10P_0402_50V8K

100

108

118

126

GND

GND

GND

GND6GND13GND23GND33GND

EEPROM

I/F

PM & Test

OSC

XI

57

1394 Differential Pairs

X2

XI

24.576MHz_16P_3XG-24576-43E1

2

R485

1M_0402_5%

1

112

38

GND22GND

PVA
PVA
PVA
PVA
PVA
PVA

GND
GND
GND
GND
GND
GND

EECS
EEDO

EEDI/SDA

EECK/SCL

PME#

XCPS

XREXT

TPB0M

TPB0P

TPA0M

TPA0P

TPBIAS0

PHYRESET#

XO

VT6301S-CD_LQFP128

58

0.1U_0402_16V4Z

XO

12

2

C589
10P_0402_50V8K

1

C

59
62
72
73
86
87

61
65
66
79
80
56

26
27

EEDI_1394

28

EECK_1394

29

34

R491 1K_0402_5%

60

63

XTPB0-

67

XTPB0+

68

XTPA0-

69

XTPA0+

70

XTPBIAS0

71

55

C578

+3VS

L24

FCM2012C-800_0805

1 2

+3V_1394

0.1U_0402_16V4Z

2

2

C586

1

1

0.1U_0402_16V4Z

W/ EEPROM Pop R467
W/O EEPROM Unpop 467

R467

1 2

4.7K_0402_5%@

R472

R475

54.9_0402_1%

1 2

1

C567

2

2

1

0.33U_0603_16V4Z

Note:These components
need to close to chip pins.

D

U43

1

A0

2
3
4

Use 24C02 D Version :SA024020310

2

2

C548

C559

1

1

0.1U_0402_16V4Z

+3VS

R503 6.34K_0402_1%

C587 47P_0402_50V8J

12

R481

54.9_0402_1%

1

R486

2

270P_0402_25V8K

12

12

54.9_0402_1%

1 2

R479

C576

VCC

A1

WC

SCL

A2

SDA

GND

AT24C02N-10S C-2.7_SO8

C560

0.1U_0402_16V4Z

12

54.9_0402_1%

4.99K_0603_1%

E

+3VS

8
7
6
5

EECK_1394
EEDI_1394

1 2

R470
560_0402_5%

XTPA0+
XTPA0­XTPB0+
XTPB0-

FOX_UV31413-4R1-TR

4

4

3

6

3

6

5

2

5

2

1

1

JP18

Connect To
Shielding
GND

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND

PROPRIETARY NOTE

A

B

TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

IEEE1394a VIA VT6301S

Size Document Number Re v

Custom

EAL20 LA-2461

星期

, 04, 2004

三八月

Date: Sheet

E

of

27 47

0.3

A

B

C

D

E

+3VS

1

C153

0.1U_0402_16V4Z

2

+3VS

1

C156

0.1U_0402_16V4Z

2

+S1_VCC

1

C152

0.1U_0402_16V4Z

2

S1_A16

MSCLK_XDRE# <29>

D

1

C164

0.1U_0402_16V4Z

2

1

C151

0.1U_0402_16V4Z

2

1

C161

0.1U_0402_16V4Z

2

10P_0402_50V8K

1

2

1

2

1

2

S1_CD1# S1_CD2#

1

C179

2

Close chip termenal

MSD0_XDD2

MSD1_XDD6

MSD2_XDD5

MSD3_XDD3

MSBS_XDD1

R462 43K_0402_5%@

R465 43K_0402_5%@

R457 43K_0402_5%@

R453 43K_0402_5%@

R471 43K_0402_5%@

Title

Size Document Number Rev

Date: Sheet

C167

0.1U_0402_16V4Z

C180

0.1U_0402_16V4Z

C147

0.1U_0402_16V4Z

2

1

1

2

10P_0402_50V8K

C181

0.1U_0402_16V4Z

C174

0.1U_0402_16V4Z

1

C160

0.1U_0402_16V4Z

2

1

C530

2

Closed to Pin A4Closed to Pin L12

1 2

1 2

1 2

1 2

1 2

Compal Electronics, Inc.

CardBus Controller CB714

EAL20 LA-2461

星期三 八月

E

0.3

of

28 47, 04, 2004

G1

K2

F3

VCC2

VCC3

VCC4

VCC1

CAD31/D10

CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6

CAD19/A25

CAD18/A7
CAD17/A24
CAD16/A17

CAD15/IOWR#

CAD14/A9

CAD13/IORD#

CAD12/A11

CAD11/OE#

CAD10/CE2#

CAD9/A10

CAD8/D15

CAD7/D7

CAD6/D13

CAD5/D6

CAD4/D12

CAD3/D5

CAD2/D11

CAD1/D4
CAD0/D3

CCBE3#/REG#

CCBE2#/A12

CCBE1#/A8

CCBE0#/CE1#

CRST#/RESET

CFRAME#/A23

CIRDY#/A15

CTRDY#/A22

CDEVSEL#/A21

CSTOP#/A20
CPERR#/A14

CSERR#/WAIT#

CPAR/A13

CGNT#/WE#

CCLK/A16

CBLOCK#/A19

SPKROUT

CCD2#/CD2#
CCD1#/CD1#

CVS2/VS2#

CVS1/VS1

CRSV3/D2
CRSV2/A18
CRSV1/D14

MSINS#

MSBS/SMDATA1

MSCLK/SMRE#

SMBSY#

SMCD#

SMWP#

SMCE#

CB714_LFBGA169

C

+S1_VCC
+3VS

B2
C3
B3
A3
C4
A6
D7
C7
A8
D8
A9
C9
A10
B10
D10
E12
F10
E13
F13
F11
G10
G11
G12
H12
H10
J11
J12
K13
J10
K10
K12
L13

B7
A11
E11
H13

B9
B11
A12
A13
B13
C12
C13
A5
D13
B8
C11
B12

C5
D5

D11

D6

M9
B5

A4
L12
D9
C6
A2
E10
J13

H7
J8
H8
E9
G9
H9
G8
F9

H6
J7
J6
J5

S1_A[0..25]

S1_D[0..15]

S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3

S1_REG#
S1_A12
S1_A8
S1_CE1#

S1_RST
S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A14
S1_WAIT#
S1_A13
S1_INPACK#
S1_WE#

S1_BVD1
S1_WP

S1_A19

S1_RDY#

PCM_SPK#
S1_BVD2

S1_CD2#
S1_CD1#
S1_VS2
S1_VS1
S1_D2
S1_A18
S1_D14

XD_MS_PWREN#
MSBS_XDD1

MSD0_XDD2
MSD1_XDD6
MSD2_XDD5
MSD3_XDD3

S1_A[0..25] <29>

S1_D[0..15] <29>

S1_IOWR# <29>

S1_IORD# <29>

S1_OE# <29>
S1_CE2# <29>

S1_CE1# <29>

S1_RST <29>

S1_WAIT# <29>

S1_INPACK# <29>
S1_WE# <29>

1 2

R444 33_0402_5%

S1_BVD1 <29>
S1_WP <29>

S1_RDY# <29>

PCM_SPK# <31>
S1_BVD2 <29>

S1_CD2# <29>
S1_CD1# <29>
S1_VS2 <29>
S1_VS1 <29>

1 2

R448 33_0402_5%

R474

2.2K_0402_5%

5IN1@

1 2

MSINS# <29>
XD_MS_PWREN# <29>
MSBS_XDD1 <29>

5IN1@

MSD0_XDD2 <29>
MSD1_XDD6 <29>
MSD2_XDD5 <29>
MSD3_XDD3 <29>

XDBSY# <29>
XDCD# <29>
XDWP# <29>
XDCE# <29>

VPPD0<29>
VPPD1<29>

VCCD0#<29>

1 1

PCI_AD[0..31]<22,26,27,30>

CLK_EXT_SD48

12

R183
10_0402_5%

@

1

C158
15P_0402_50V8J

2

@

+VCC_5IN1

2 2

R435
0_0805_5%

@

1 2

R495 0_0805_5%

1 2

R440 43K_0402_5%

1 2

R438 43K_0402_5%

1 2

R456 43K_0402_5%

1 2

R443 43K_0402_5%

1 2

R447 43K_0402_5%

+3VS

1 2

R468 43K_0402_5%@

1 2

R452 43K_0402_5%@

1 2

R473 43K_0402_5%@

3 3

4 4

CLK_PCI_PCM

12

R464
10_0402_5%

@

1

C561
15P_0402_50V8J

2

@

5IN1@

5IN1@

5IN1@

5IN1@

5IN1@

5IN1@

SD_PULLHIGH

12

SDCM_XDALE

SDDA0_XDD7

SDDA1_XDD0

SDDA2_XDCL

SDDA3_XDD4

SDCD#

SDWP

MSINS#

PCM_PME#<26,30,34>

IDSEL:

12

R458

5IN1@

22_0402_5%

22_0402_5%

R628

5IN1@

D12

2 1

HT-110UYG-CT_YEL/GRN

PCI_AD20

5IN1@

R501

+3VS

43K_0402_5%5IN1@

SM_CD#<29>

One memory card controller use MFUNC7 as OC#,
Another one use MFUNC6 as OC#.
Connect 2 pin together to assert over current even to 2
controller at the same time.
This is ENE suggestion.

5IN1@

1 2

R217

120_0402_5%

A

1 2

1 2

SD_CLK<29>

XDWE#<29>

5IN1 LED Side View

+3VS

PCI_CBE#3< 22,26,27,30> S1_REG# <29>
PCI_CBE#2< 22,26,27,30>
PCI_CBE#1< 22,26,27,30>
PCI_CBE#0< 22,26,27,30>

PCIRST#<7,13,19,2 2,25,27,30>

PCI_FRAME#<22,26,27,30>

PCI_IRDY#<22,2 6,27,30>

PCI_TRDY#<22,26,27,30>

PCI_DEVSEL#<22,26,27,30>

PCI_STOP#<2 2,26,27,30>
PCI_PERR#<22,26,27,30>

PCI_SERR#<22,26,30>

PCI_PAR<22,26,27,30>
PCI_REQ#2<22>
PCI_GNT#2<22>

CLK_PCI_PCM<12>

R500 0_0402_5%@

1 2

R477

PCI_PIRQA#<13,22>

PCI_PIRQB#<22>

SDPWREN#<29>

SDCM_XDALE<29>
SDDA0_XDD7<29>
SDDA1_XDD0<29>
SDDA2_XDCL<29>
SDDA3_XDD4<29>

1 2

1 2

R460 100_0402_5%

SIRQ<22,33,34>

SDOC#<29>

+VCC_5IN1

SDCD#<29>
SDWP<29>

+3VS

CLK_EXT_SD48<12>

5IN1_LED#

VCCD1#<29>

U42

PCI_AD[0..31]

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

CLK_PCI_PCM A16_CLK

10K_0402_5%

PCM_IDPCI_AD20

PCI_PIRQA#
SD_PULLHIGH
PCI_PIRQB#

5IN1_LED#

SDOC#

PCIRST#

SDCD#
SDWP
SDPWREN#

SDCM_XDALE
SDDA0_XDD7
SDDA1_XDD0
SDDA2_XDCL
SDDA3_XDD4

B

C2

AD31

C1

AD30

D4

AD29

D2

AD28

D1

AD27

E4

AD26

E3

AD25

E2

AD24

F2

AD23

F1

AD22

G2

AD21

G3

AD20

H3

AD19

H4

AD18

J1

AD17

J2

AD16

N2

AD15

M3

AD14

N3

AD13

K4

AD12

M4

AD11

K5

AD10

L5

AD9

M5

AD8

K6

AD7

M6

AD6

N6

AD5

M7

AD4

N7

AD3

L7

AD2

K7

AD1

N8

AD0

E1

CBE3#

J3

CBE2#

N1

CBE1#

N5

CBE0#

G4

PCIRST#

J4

FRAME#

K1

IRDY#

K3

TRDY#

L1

DEVSEL#

L2

STOP#

L3

PERR#

M1

SERR#

M2

PAR

A1

PCIREQ#

B1

PCIGNT#

H1

PCICLK

L8

RIOUT#_PME#

L11

SUSPEND#

F4

IDSEL

K8

MFUNC0

N9

MFUNC1

K9

MFUNC2

N10

MFUNC3

L10

MFUNC4

N11

MFUNC5

M11

MFUNC6

J9

MFUNC7

M10

GRST#

E7

VCC_SD

E8

SDCD#

F8

SDWP/SMWPD#

G7

SDPWREN33#

H5

SDCLKI

F6

SDCLK/SMWE#

E5

SDCMD/SMALE

E6

SDDAT0/SMDATA7

F7

SDDAT1/SMDATA0

F5

SDDAT2/SMCLE

G6

SDDAT3/SMDATA4

G5

GND_SD

N12

M12

N13

M13

VPPD0

VPPD1

VCCD0#

VCCD1#

PCI Interface

SD/MMC/MS/SM

G13

A7

VCCA1

VCCA2

GND1D3GND2H2GND3L4GND4M8GND5

N4

L6

C8

L9

H11

D12

B4

VCC5

VCC9

VCC6

VCC7

VCC8

VCC10

CARDBUS

CREQ#/INPACK#

CSTSCHG/BVD1_STSCHG#

CCLKRUN#/WP_IOIS16#

CINT#/READY_IREQ#

CAUDIO/BVD2_SPKR#

MSPWREN#/SMPWREN#

MSDATA0/SMDATA2
MSDATA1/SMDATA6
MSDATA2/SMDATA5
MSDATA3/SMDATA3

GND6

GND7

GND8

B6

F12

K11

C10

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

PCMCIA Power Controller CardBus Socket

C2170.1U_0402_16V4Z

SDPWREN#<28 >

C2224.7U_0805_10V4Z

C2160.1U_0402_16V4Z

C2214.7U_0805_10V4Z

R195

10K_0402_5%

10K_0402_5%

5IN1@

D D

XD_MS_PWREN#<28>

C C

R502

+5VS

+3VS

1 2

+3VS

U18

9

5
6

3
4

1 2

C592

12V

5V
5V

3.3V

3.3V

GND

SHDN

7

16

SD PWR Control

+3VS

1
2
3
4

1

5IN1@
2

0.1U_0402_16V4Z

13

VCC

12

VCC

11

VCC

10

VPP

1

VCCD0

2

VCCD1

15

VPPD0

14

VPPD1

8

OC

CP2211D3_SSOP16

U44

5IN1@

GND
IN
IN
EN#

TPS2041ADR_SO8

OUT
OUT
OUT
OC#

40mil

20mil

8
7
6
5

1

5IN1@
2

10U_0805_10V4Z

+S1_VCC

+S1_VPP

C518

+VCC_5IN1

R528 0_0402_5%

+VCC_5IN1

1

5IN1@
2

0.1U_0402_16V4Z

4

1 2

C195 0.1U_0402_16V4Z

C196 0.1U_0402_16V4Z

1 2

C192 1U_0603_10V4Z

1 2

C197 0.01U_0402_25V4Z@

1 2

C190 1U_0603_10V4Z@

VCCD0# <28>
VCCD1# <28>
VPPD0 <28>
VPPD1 <28>

5IN1@

1 2

1

C585

C617

5IN1@
2

0.1U_0402_16V4Z

+3VS

R520
10K_0402_5%

5IN1@

1 2

1

5IN1@
2

0.1U_0402_16V4Z

C618

SDOC # <28>

3

S1_A[0..25]<28>

S1_D[0..15]<28>

5in1 Socket

JP12

1

S1_D3
S1_D4
S1_D5
S1_D6
S1_D7

+S1_VCC

+S1_VPP

S1_A[0..25]

S1_D[0..15]

S1_CE1#
S1_A10
S1_OE#
S1_A11
S1_A9
S1_A8
S1_A13
S1_A14
S1_WE#
S1_RDY#

S1_A16
S1_A15
S1_A12
S1_A7
S1_A6
S1_A5
S1_A4
S1_A3
S1_A2
S1_A1
S1_A0
S1_D0
S1_D1
S1_D2
S1_WP

S1_CE1#<28>

S1_WE#<28>
S1_RDY#<28>

S1_WP<28>

GND

2

D3 / CAD0

3

D4 / CAD1

4

D5 / CAD3

5

D6 / CAD5

6

D7 / CAD7

7

CE1# / CCBE0#

8

A10 / CAD9

9

OE# / CAD11

10

A11 / CAD12

11

A9 / CAD14

12

A8 / CCBE1#

13

A13 / CPAR

14

A14 / CPERR#

15

WE# / CGNT#

16

IREQ# / CINT#

17

VCC

18

VPP1

19

A16 / CCLK

20

A15 / CIRDY#

21

A12 / CCBE2#

22

A7 / CAD18

23

A6 / CAD20

24

A5 / CAD21

25

A4 / CAD22

26

A3 / CAD23

27

A2 / CAD24

28

A1 / CAD25

29

A0 / CAD26

30

D0 / CAD27

31

D1 / CAD29

32

D2 / RFU

33

IOIS16# / CCLKRUN#

34

GND

69

GND

71

GND

73

GND

75

GND

77

GND

79

GND

81

GND

83

GND

85

GND

87

GND

FOX_WZ21131-G2-P4_RT

2

GND

CD1# / CCD1#

D11 / CAD2
D12 / CAD4

D13/ CAD6

D14/ RFU

D15 / CAD8

CE2# / CAD10

VS1# / CVS1
IORD# / CAD13
IOWR# /CAD15

A17 / CAD16

A18 / RFU

A19 / CBLOCK#

A20 / CSTOP#

A21 / CDEVSEL#

VCC

VPP2

A22 / CTRDY#

A23 / CFRAME#

A24 / CAD17

A25 / CAD19

VS2# / CVS2

RESET / CRST#

WAIT# / CSERR#

INPACK# / CREQ#

REG# / CCBE3#

SPKR# / CAUDIO

STSCHG# / CSTSCHG

D8 / CAD28

D9 / CAD30

D10 / CAD31

CD2# / CCD2#

GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

35

S1_CD1#

36

S1_D11

37

S1_D12

38

S1_D13

39

S1_D14

40

S1_D15

41

S1_CE2#

42

S1_VS1

43

S1_IORD#

44

S1_IOWR#

45

S1_A17

46

S1_A18

47

S1_A19

48

S1_A20

49

S1_A21

50
51
52

S1_A22

53

S1_A23

54

S1_A24

55

S1_A25

56

S1_VS2

57

S1_RST

58

S1_WAIT#

59

S1_INPACK#

60

S1_REG#

61

S1_BVD2

62

S1_BVD1

63

S1_D8

64

S1_D9

65

S1_D10

66

S1_CD2#

67
68

70
72
74
76
78
80
82
84
86
88

S1_CD1# <28>

S1_CE2# <28>
S1_VS1 <28>S1_OE#<28>
S1_IORD# <28>
S1_IOWR# <28>

+S1_VCC
+S1_VPP

S1_VS2 <28>
S1_RST <28>
S1_WAIT# <28>
S1_INPACK# <28>
S1_REG# <28>
S1_BVD2 <28>
S1_BVD1 <28>

S1_CD2# <28>

1

+3VS

xD PU and PD. Close to Socket

R493 43K_0402_5%@

+VCC_5IN1

R492 10K_0402_5%

1 2

R494 2.2K_0402_5%

SD CLK

MS CLK

MSCLK_XDRE#<28>

1 2

R449 10K_0402_5%

1 2

R455 10K_0402_5%

SD_CLK<28 >

B B

A A

12

5IN1@

12

5IN1@

MSCLK_XDRE#

5IN1@

XDWE#

5IN1@

0_0402_5% @

10P_0402_50V8K @

0_0402_5% @

10P_0402_50V8K @

XDCD#

XDBSY#

R450

C536

R454

C552

5

SD_CLK

12

1

2

MSCLK_XDRE#

12

1

2

XDCD# <28>

XDBSY# <28>

XDCE# <28>

Reserve for Debug.

S1_WP

S1_OE#

S1_RST

S1_CE1#

S1_CE2#

Close to
CardBus Conn.

C194

10U_0805_10V4Z

4.7U_0805_10V4Z@

C187

1

2

+S1_VCC

12

R43643K_0402_5%

12

R48047K_0402_5%

12

R43347K_0402_5%

12

R46347K_0402_5%

12

R45947K_0402_5%

+S1_VCC

1

C193

0.1U_0402_16V4Z

2

+S1_VPP

C188

0.01U_0402_25V7Z@

4

SDDA1_XDD0<28>
MSBS_XDD1<28>
MSD0_XDD2<28>
MSD3_XDD3<28>

SDDA3_XDD4<28> SDWP <28>

MSD2_XDD5<28>
MSD1_XDD6<28>

SDDA0_XDD7<28>

XDWP#<28>

XDWE#<28>

SDCM_XDALE<28>

SM_CD#<2 8>

1

2

1

2

+VCC_5IN1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET N OR THE INFORMA TION IT CONTAI NS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

SDDA1_XDD0
MSBS_XDD1
MSD0_XDD2
MSD3_XDD3
SDDA3_XDD4
MSD2_XDD5
MSD1_XDD6
SDDA0_XDD7

XDWP#
SDWP
XDWE#
SDCM_XDALE

SM_CD#

XDBSY#
MSCLK_XDRE#
XDCE#
XDCD#

SDDA2_XDCL

JP13

34

SM-D0 / XD-D0

33

SM-D1 / XD-D1

32

SM-D2 / XD-D2

31

SM-D3 / XD-D3

21

SM-D4 / XD-D4

22

SM-D5 / XD-D5

23

SM-D6 / XD-D6

24

SM-D7 / XD-D7

35

SM_WP-IN / XD_WP-IN

43

SM-WP-SW

36

#SM_-WE / XD_-WE

37

#SM-ALE / XD-ALE

25

SM-LVD

3

SM-CD-SW

29

SM_-VCC / XD_-VCC

26

#SM_R/-B / XD_R/-B

27

#SM_-RE / XD_-RE

28

#SM_-CE / XD_-CE

30

#SM_-CD

2

SM-CD-COM

38

SM-CLE / XD-CLE

TAITW_R007-010-N3

5 IN 1 CONN

5IN1@

SD-DAT3
SD-DAT2
SD-DAT1
SD-DAT0

SD-WP-SW

SD-CMD
SD_CLK
SD-VCC

SD-CD-SW

SD-CD-COM

MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3

MS-SCLK

MS-INS

MS-BS

MS-VCC

XD-VCC

XD-CD

GND
GND

2

N/C

11
12
6
7
5
10
8
9
4
42
41

15
14
16
18
19
17
13
20

40
39
1
44

SDDA3_XDD4
SDDA2_XDCL
SDDA1_XDD0
SDDA0_XDD7
SDWP
SDCM_XDALE
SD_CLK

SDCD#

MSD0_XDD2
MSD1_XDD6
MSD2_XDD5
MSD3_XDD3
MSCLK_XDRE#
MSINS#
MSBS_XDD1

XDCD#

SDDA2_XDCL <28>

+VCC_5IN1

SDCD# <28>

MSINS# <28>

+VCC_5IN1

+VCC_5IN1

Title

Size Document Number Re v

Custom

Date: Sheet

Compal Electronics, Inc.

Cardbus Slot & 5in1 Socket

EAL20 LA-2461

星期

, 04, 2004

三八月

1

of

29 47

0.3

A

B

C

D

E

1

2

+3VS

1

C176

4.7U_0805_10V4Z

2

W=40mils

PCI_GNT#4

W=40mils

W=40mils

PCI_GNT#3

1 2

KS@

+5VS

PCI_GNT#4 <22>
+3V

PCIRST# <7,13,19,22,25,27,28>

+3VS
PCI_GNT#3 <22>

MINI_PME# <26,28,34>

PCI_AD18

R170

100_0402_5%KS@

PCI_PA R <22,26,27,28>

PCI_FRAME# <22,26,27,28>
PCI_T RDY# <22,26,27,28>
PCI_STOP# <22,26,27 ,28>

PCI_DEVSEL# <22,26,27,28>PCI_PERR#< 22,26,27,28>

PCI_CBE#0 <22,26,27,28>

+3V

PCI_PIRQG# <22>

0.1U_0402_16V4Z

1

C504

KS@

2

1000P_0402_50V7K

C511

KS@

+3VS

0.1U_0402_16V4Z

1

2

W=40mils

1

C163

KS@

W=40mils

KS@

2

PCI_AD[0..3 1]

JP10

112

KEY KEY

334
556
778

D7

9910
111112

21

131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
535354
555556
575758
595960
616162
636364
656566
676768
696970
717172
737374
757576
777778
797980
818182
838384
858586
878788
898990
919192
939394
959596
979798
9999100

101

101

103

103

105

105

107

107

109

109

111

111

113

113

115

115

117

117

119

119

121

121

123

123

AMP_1318644-1KS@

4.7U_0805_10V4Z

RB751V_SOD323

CLK_PCI_MINI

PCI_REQ#3

PCI_AD31
PCI_AD29

PCI_AD27
PCI_AD25

PCI_AD23

PCI_AD21
PCI_AD19

PCI_AD17
PCI_CBE#2
PCI_IRDY#

PCI_SERR#

PCI_PERR#
PCI_CBE#1
PCI_AD14

PCI_AD12
PCI_AD10

PCI_AD8
PCI_AD7

PCI_AD5

PCI_AD3

PCI_AD1

W=30mils W=40mils

1

C139

KS@

2

1000P_0402_50V7K

PCI_ AD[0..31] <22, 26,27,28>

2

4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102

102

104

104

106

106

108

108

110

110

112

112

114

114

116

116

118

118

120

120

122

122

124

124

C191

KS@

RINGTIP

PCI_AD30

PCI_AD28
PCI_AD26
PCI_AD24
MINI_IDSEL

PCI_AD22
PCI_AD20

PCI_AD18
PCI_AD16

PCI_FRAME#
PCI_TRDY#
PCI_STOP#

PCI_DEVSEL#

PCI_AD15
PCI_AD13
PCI_AD11

PCI_AD9
PCI_CBE#0

PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

1

2

+5VS

1

C623

KS@

10U_0805_10V4Z

2

WL_OFF#<34>

KILL_SW#<32,34>

0.1U_0402_16V4Z

1

C135

KS@

1000P_0402_50V7K

+3V

C117 0.1U_0402_16V4Z

5

U13

1

P

B

Y

2

A

G

KS@

3

TC7SH08FU_SSOP5

PCI_PIRQH#<22>

CLK_PCI_MINI<12>

PM_CLKRUN#<23,26,33,34>

C129

KS@

2

KS@

4

+3VS

PCI_REQ#4<22>

PCI_REQ#3<22>

PCI_CBE#3<22 ,26,27,28>

PCI_CBE#2<22 ,26,27,28>
PCI_IRDY#<22,26 ,27,28>

PCI_SERR#<22,26,28>

PCI_CBE#1<22 ,26,27,28>

+5VS

+5VS

0.1U_0402_16V4Z

1

C597

KS@

1 1

2 2

3 3

1000P_0402_50V7K

C126

KS@

2

CLK_PCI_MINI

12

R164

10_0402_5%@

1

C132

10P_0402_50V8K@

2

1

2

+3V

1

C514

KS@

2

4.7U_0805_10V4Z

4 4

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET N OR THE INFORMA TION IT CONTAI NS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Re v

Date: Sheet

Compal Electronics, Inc.

Mini PCI Slot

, 04, 2004

三八月

EAL20 LA-2461

E

星期

of

30 47

0.3

A

AC97 Codec

C656

INT_CD_L

INT_CD_R

1 2

1

2

R590

0_0402_5%

INT_CD_L<25>

INT_CD_R<25>

CD_AGND<25>

1 1

MD_SPK

0.1U_0402_16V4Z

Use to isolate +5VALW and +AC97_DVDD

Use to isolate +5VALW and +AC97_DVDD

2 2

3 3

R511

+AC97_DVDD

EC_SMD_2<4,34>

+AC97_DVDD

EC_SMC_2<4,34>

GND Connect AGND
Keep a 80mil bridge far away from DC-DC area

10K_0402_5%

R510 1K_0402_5%

Q40

2N7002_SOT23

R512

10K_0402_5%

R513 1K_0402_5%

Q39

2N7002_SOT23

System Sound

BEEP#<34>

SN74LVC125APWLE_TSSOP14

PCM_SPK#<28>

4 4

SB_SPKR<23>

A

12

R583 20K_0402_5%

12

R587 20K_0402_5%

12

R585 20K_0402_5%

R593

0_0402_5%

1 2

1

C653

@

2

0.01U_0402_25V4Z

12

12

2

G

1 3

D

S

1 2

R549 0_0402_5%@

12

12

2

G

1 3

D

S

1 2

R535 0_0402_5%@

13

U15D

11

OE#

I12O

0.22U_0402_10V4Z

12

EC_SM_D2

EC_SM_C2

+3V

12

R189
100K_0402_5%

1 2

8.2K_0402_5%

12

C_MD_SPK

R582
10K_0402_5%@

R193

3

B

+5VAMP

CD_L

CD_R

CD_GNA

12

12

R584

R586

6.8K_0402_5%

R588

bypass EQ when NBA_PLUG = High

6.8K_0402_5%

6.8K_0402_5%

NBA_PLUG<32>

AC97_RST#<23>

AC97_SYNC<23>

AC97_SDOUT<23 >

Ra

UnPoped:Clock source from X'tal
Poped: Clock source from Clock Gen

+3VALW

C206

1 2

0.1U_0402_16V4Z

14

U17A

P

1

O2I

G

1

SN74LVC14APWLE_TSSOP14

7

C211

+3VALW

14

7

+3V POWER

2

1U_0402_6.3V4Z

+3V POWER

U17B

P

O4I

G

SN74LVC14APWLE_TSSOP14

1U_0402_6.3V4Z

B

C210

1 2

C212

1 2

1 2

L26

0.1U_0402_16V4Z

NBA_PLUG

MIC<32>

AC97_RST#

AC97_SYNC

AC97_SDOUT

EAPD_CODEC<32>

12

R521
0_0402_5%

@

C209

1 2

1U_0402_6.3V4Z

0_0805_5%

C604

1 2

C651 1U_0402_6.3V4Z

1 2

C649 0.1U_0402_16V4Z

1 2

C650 0.1U_0402_16V4Z

CD_L

C641 1U_0402_6.3V4Z

CD_R

C643 1U_0402_6.3V4Z

C642 1U_0402_6.3V4Z

MIC

C644 1U_0402_6.3V4Z

C_MD_SPK

C648 1U_0402_6.3V4Z

MONO_IN

1 2

R578 33_0402_5%

R577 33_0402_5%

R550 33_0402_5%

R200

1 2

560_0402_5%

R201

1 2

560_0402_5%

R202

1 2

560_0402_5%

R203

10K_0402_5%

C

1

2

12

12

12

12

12

DGND

MONO_IN_I

C

1

C646
10U_0805_10V4Z

2

CD_LIN

CD_RIN

CD_GNA1CD_GNA

C_MIC

12

12

EC_SM_D2

12

+AVDD_AC97

38

U45

AVDD125AVDD2

14

AUX_L

15

AUX_R

16

JD2

17

JD1

23

LINE_IN_L

24

LINE_IN_R

18

CD_L

20

CD_R

19

CD_GND

21

MIC1

22

MIC2

13

PHONE

12

PC_BEEP

11

RESET#

10

SYNC

5

SDATA_OUT

45

SDA

46

XTLSEL

47

SPDIFI/EAPD

48

SPDIFO

4

DVSS1

7

DVSS2

ALC250-C_LQFP48

Place these components
close to Codec

24.576MHz_16P_3XG-24576-43E1

1

C610

2

22P_0402_50V8J

+AVDD_AC97

12

R581
10K_0402_5%

12

R594
10K_0402_5%

MONO_IN_O

1

C

Q42

2

B

E

3

2SC2411K_SC59

D8
RB751V_SOD323

2 1

D

+AC97_DVDD

DVDD11DVDD2

LINE_OUT_L

LINE_OUT_R

MONO_OUT/VREFOUT3

HP_OUT_L

HP_OUT_R

BIT_CLK

SDATA_IN

XTL_IN

XTL_OUT

AFILT1

AFILT2

VREFOUT

VREF

DCVOL

VREFOUT2

VAUX

DISABLE#

SCK

AVSS1
AVSS2

1 2

R540 1M_0402_5%@

X3

12

1

C659
10U_0805_10V4Z

2

C647

MONO_IN

12

1U_0402_6.3V4Z

R591

1 2

2.4K_0402_5%

D

NC

NC

XTL_OUTXTL_IN

1

2

9

35

36

37

39

41

6

8

2

3

29

30

28

27

32

31
33
34
43
44

40
26
42

C619

L27

1 2

L28

0_0805_5%

1 2

0_0805_5%

C609

0.1U_0402_16V4Z

C616 1000P_0402_50V7K@

C611 1000P_0402_50V7K@

LINEL

1 2

C615 1U_0402_6.3V4Z

LINER

1 2

C612 1U_0402_6.3V4Z

C626 47P_0402_50V8J

12

1 2

R555 33_0402_5%

1 2

R561 33_0402_5%

XTL_IN

XTL_OUT

1 2

C630 1000P_0402_50V7K

1 2

C628 1000P_0402_50V7K

+VREFOUT

1 2

R566 0_0603_5%

+VAUX

1 2

R518 0_0603_5%

EC_SM_C2

AGND

AGND

1

2

22P_0402_50V8J

E

1

C632
10U_0805_10V4Z

2

1 2

1 2

AC97_BITCLK <23>

AC97_SDIN0 <23>

+AUD_VREF

+AVDD_AC97

1 2

R523 10K_0402_5%

1 2

R522 0_0402_5%

+AUD_VREF

+3VS

+3V

L_OUT_L

L_OUT_R

+3VS

12

R546

@

C624

0_0402_5%

+3VS

C638 4.7U_0805_10V4Z

1 2

1 2

C629 0.1U_0402_16V4Z

R519
10K_0402_5%@

1 2

1 2

R527

0_0402_5%@

R517
10K_0402_5%@

1 2

1

C621

1

2

2

1U_0402_6.3V4Z

EC_IDERST <25,34>

C622

0.01U_0402_16V7K

F

CLK_14M_CODEC <12>

+AVDD_AC97

R602

1M_0402_5%

1 2

1

1

C635

2

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

MDC Connector

C184

+3VS_MDC

C183

R488

1 2
1 2

R489

E

12

R1870_0805_5%

2

1

2

+3V_MDC

1

33_0402_5%
33_0402_5%

JP14

1

MONO_OUT/PC_BEEP

3

GND

5

AUXA_RIGHT

7

AUXA_LEFT

9

CD_GND

11

CD_RIGHT

13

CD_LEFT

15

GND

17

+3.3Vaux/BT_VCC

19

GND

21

+3.3Vmain

23

AC97_SDATA_OUT

25

AC97_RESET#

27

GND

29

AC97_MSTRCLK

ACES_88018-3010

RESERVED/+5VD/WAKEUP

F

AUDIO_PWRDN/DETECH

RESERVED/PRIMARY_DN

+3V

10U_0805_10V4Z

0_0603_5%

1 2

+3VS

L9

10U_0805_10V4Z

AC97_SDOUT
AC97_RST#

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Direct CD
CTL

1

C636

2

1U_0402_6.3V4Z

PATH_SEL_1

2N7002_SOT23 @

MONO_PHONE

RESERVED/BT_ON#

GND

+5Vmain

RESERVED/USB+

RESERVED/USB-

RESERVED/GND

AC97_SYNC
AC97_SDATA_IN1
AC97_SDATA_IN0

GND

AC97_BITCLK

G

POWER ON PATH

R607

+5VAMP

L_OUT_L

+5VAMP

L_OUT_R

12

1M_0402_5%@

R609

12

1M_0402_5%@

DIRECT PLAY PATH

R611

+5VAMP

INT_CD_L

+5VAMP

INT_CD_R

+5VALWP

D

Q43

S

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

Title

Size Document Number Rev

Custom
Date: Sheet

12

1M_0402_5%@

C698

1 2

1U_0603_10V4Z@

R613

12

1M_0402_5%@

C699

1 2

1U_0603_10V4Z@

PATH_SEL_1

L_OUT_L

L_OUT_R

R615
10K_0402_5%

@

1 2

13

PATH_SEL

2

G

MD_SPK

+5VS_MDC

2

C204 1U_0 603_10V4Z

1

+3VS_MDC_R

R507 33_0402_5%

1 2

R191 0_0402_5%

R190 33_0402_5%

1 2

Compal Electronics, Inc.

星期三 八月

G

+5VALWP

12

R608

@

1M_0402_5%

12

R610

@

1M_0402_5%

PATH_SEL

+5VALWP

12

R612

@

1M_0402_5%

12

R614

@

1M_0402_5%

AMP_LEFT

R619

1 2

0_0402_5%

AMP_RIGHT

R620

1 2

0_0402_5%

R616

12

0_0402_5%@

R617

12

0_0402_5%@

L11

1 2

0_0603_5%

R192

1 2

10K_0402_5%

12

1 2

R194 33_0402_5%

AC97 CODEC ALC250 Ver.C

EAL20 LA-2461

H

14

SN74HCT4066PW_TSSOP14

U48A

@

P

2

A1B
G7C

13

14

SN74HCT4066PW_TSSOP14

U48B

@

P

10

A11B
G7C

12

14

SN74HCT4066PW_TSSOP14

U48C

@

P

3

A4B
G7C

5

14

SN74HCT4066PW_TSSOP14

U48D

@

P
A8B

G7C

EC_IDERST

AMP_RIGHT

9

6

AMP_LEFT <32>

AMP_RIGHT <32>

SUSP# <34,37, 42,43,44>

+5VS

+3VS

AC97_SYNC

AC97_SDIN1 <23>

AC97_BITCLK

of

31 47, 04, 2004

H

AMP_LEFT

AMP_RIGHT

AMP_LEFT

0.3

A

Audio AMP

W/O EQ R385=R386= 1.3K Ohm
C537=C539= 0.47U

R = R385, R386
C = C537, C539

fo=1/(2*3.14*R*C)=260Hz

1 1

AMP_LEFT<31>

AMP_RIGHT<31>

2 2

AMP_LEFT

AMP_RIGHT

AMP_LEFT

AMP_RIGHT

R=1.5K / C=0.47U

HIGH

Pin 22

LOW PIN 9,5 ACTIVE

NBA_PLUG<31>

12

C235 0.1U_0402_16V4Z

AMP_L

1 2

C240 0.47U_0603_16V4Z

C661 0.47U_0603_16V4Z

C241 0.47U_0603_16V4Z

C666 0.47U_0603_16V4Z

1 2

1 2

1 2

12

12

AMP_R

AMP_L

R2211.5K_0402_5%

AMP_R

R5961.5K_0402_5%

PIN 10,4 ACTIVE

NBA_PLUG
VOL_AMP
INTSPK_L1
INTSPK_R1

1 2

C237 0.47U_0603_16V4Z

1 2

C665 0.47U_0603_16V4Z

HP_L

HP_R

EAPD_CODEC<31>

EAPD_KBC<34>

B

W=40Mil

0.1U_0402_16V4Z

AMP_LIN
AMP_RIN

1

2

1

2

+5VAMP

1

C245

2

U21

7

PVDD

SHUTDOWN#

18

PVDD

19

VDD

2
3
4

21

5

23

6

20

17

C238

0.047U_0402_16V4Z

+3VALW

A

B

PC-BEEP

HP/LINE#
VOLUME
LOUT+
ROUT+
LLINEIN
RLINEIN
LHPIN
RHPIN

CLK

TPA0232PWP_TSSOP24

14

U9A

P

3

O

G

SN74LVC32APWLE_TSSOP14

7

1

C663

4.7U_0805_10V4Z

2

SE/BTL#

BYPASS

LOUT-

ROUT-

LIN
RIN

GND
GND
GND
GND

EAPD

22
15
14
11
9
16
10
8

1
12
13
24

SHUTDOWN#

2N7002_SOT23

NBA_PLUG

2

1

(0.47U~1U)

INTSPK_L2
INTSPK_R2

C253

R597 100K_0402_5%

13

D

Q41

C239 0.1U_0402_16V4Z

1 2

0.47U_0603_16V4Z

2

G

S

1

C251

2

0.47U_0603_16V4Z

EAPD

C

D

E

Audio Board Connector

12

1

C252

2

+5VAMP

+5VAMP

NBA_PLUG

+AUD_VREF

WL_LED#<34>

KILL_SW#<30,34>

0.47U_0603_16V4Z

VOL_AMP

MIC

MIC<31>

INTSPK_R1
INTSPK_L1

JP20

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

ACES_85203-1202

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

Speaker Connector

V-PORT-0603-220 M-V05_0603@

D28

D27

V-PORT-0603-220 M-V05_0603@

2 1

INTSPK_R1
INTSPK_R2
INTSPK_L1

Regulator for AMP

+5VALW TO +5VLDO

+5VALWP

R232 10K_0402_5%

1 2

3 3

R230

10K_0402_5%

CD_PLAY<25,34>

4 4

CD_PLAY

2N7002_SOT23

+12VALW+5VALWP

12

12

R215

1K_0402_5%

13

D

Q20

2

G

2N7002_SOT23

S

13

D

2

G

Q21

S

A

1

2

@

1U_0805_25V4Z

C254
1U_0603_10V4Z

SI4800 1N_SO8

1

C234

2

LM431SB_SOT23

1

A

D13

2

U20

K

R

AOS 3401_SOT23

1 3

5

4

2

3

Q19

+5VALW_LDO

D8D7D6D

S1S2S3G

12

R595

3.9K_0603_1%

12

R592

4.99K_0603_1%

+5VLDO

B

+5VALW DECOUPLING

+5VALWP

1

C255

2

22U_1206_16V4Z_V1

(4.5V)

+5VLDO DECOUPLING

+5VLDO

1

C645

2

22U_1206_16V4Z_V1

1

1

C249

@

2

1U_0603_10V4Z

22U_1206_16V4Z_V1

1

C244

C243

2

2

1U_0603_10V4Z

(4.5V)

1

C660

2

4.7U_0805_10V4Z

+5VAMP TO +5VLDO

+5VLDO +5VAMP

1

1

C652

@

2

4.7U_0805_10V4Z

C662

2

1U_0603_10V4Z

1 2

1 2

1

C664

@

1U_0603_10V4Z

2

0.1U_0402_16V4Z

L29

0_0805_5%

L30

0_0805_5%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

V-PORT-0603-220 M-V05_0603@

Moat Bridge

1

1

C658

C657

@

2

2

0.1U_0402_10V6K

C

INTSPK_L2

D26

1 2

R223 0_0805_5%

1 2

R516 0_0805_5%

1 2

R567 0_0805_5%

2 1

L34 FBM-11-160808-121-T_0603

1 2

L33 FBM-11-160808-121-T_0603

1 2

L32 FBM-11-160808-121-T_0603

1 2

L31 FBM-11-160808-121-T_0603

1 2

D25

V-PORT-0603-220 M-V05_0603@

2 1

2 1

Title

Size Document Number Rev

Custom

D

Date: Sheet

Compal Electronics, Inc.

EAL20 LA-2461

星期三 八月

JP19

1
2
3
4

ACES_85204-0400

AMP & Audio Jack

E

0.3

of

32 47, 04, 2004

10

SUPER I/O SMsC LPC47N217

H H

C45

+3VS

4.7U_0805_10V4Z

1
SIO@

2

C53

1
SIO@

2

0.1U_0402_16V4Z

G G

B_PCIRST#<22,26,34>

+3VS

F F

R92 1K_0402_5%

SIO@

E E

CLK_14M_SIO

D D

+3VS

R76 10K_0402_5%SIO@

12

+3VS

@

1 2
2

@

1

1 2

R81

10_0402_5%

R362 10K_0402_5%SIO@

C47

15P_0402_50V8J

C C

B B

Place on the TOP side(Under MDC conn.)

+5VS

JP9

1

1

2

RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1

A A

RI#1
DCD#1

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

E&T_96212-1011S@

For SW debug use when no seial port

10

9

1
SIO@

C32

2

0.1U_0402_16V4Z

R109 10K_0402_5%SIO@

1 2

+3VS

+3VS

SIO@

R95 10K_0402_5%

1 2
1 2

R82 10K_0402_5%SIO@

1 2

CLK_PCI_SIO

1

C69

SIO@

2

0.1U_0402_16V4Z

LPC_AD0<23,34>

LPC_AD1<23,34>

LPC_AD2<23,34>

LPC_AD3<23,34>

LPC_FRAME#<23,34>

LPC_DRQ#1<23>

PM_CLKRUN#<23,26,30,34>

CLK_PCI_SIO<12>

SIRQ<2 2,28,34>

CLK_14M_SIO<12>

R104 100K_0402_5% NOT-FIR@

FIR_DET#

LPT_DET#

R105 100K_0402_5% NO T-PIO@

R110
33_0402_5%

@

1 2
2

C81
22P_0402_50V8J

@

1

9

12

12

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_FRAME#
LPC_DRQ#1

B_PCIRST#
SIO_PD#

PM_CLKRUN#
CLK_PCI_SIO
SIRQ
SIO_PME#

CLK_14M_SIO

SIO_GPIO11
SIO_SMI#
SIO_IRQ

SIO_GPIO23

8

U8

10

LAD0

12

LAD1

13

LAD2

14

LAD3

15

LFRAME#

16

LDRQ#

17

PCI_RESET#

18

LPCPD#

19

CLKRUN#

20

PCI_CLK

21

SER_IRQ

6

IO_PME#

9

CLK14

23

GPIO40

24

GPIO41

25

GPIO42

27

GPIO43

28

GPIO44

29

GPIO45

30

GPIO46

31

GPIO47

32

GPIO10

33

GPIO11/SYSOPT

34

GPIO12/IO_SMI#

35

GPIO13/IRQIN1

36

GPIO14/IRQIN2

40

GPIO23

8

VSS

22

VSS

43

VSS

52

VSS

LPC47N217_STQFP64 SIO@

Base I/O Address

0 = 02Eh

*

1 = 04Eh

8

CLOCK

LPC I/F

GPIO

POWER

7

RXD1
TXD1

DSR1#

RTS1#
CTS1#

DTR1#

RI1#

SERIAL I/F

DCD1#

IRRX2

FIR

IRTX2

IRMODE/IRRX3

INIT#

SLCTIN#

SLCT

BUSY

PARALLEL I/F

ACK#

ERROR#

ALF#

STROBE#

VCC
VCC
VCC
VCC

7

PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7

VTR

PE

DCD#1

RI#1

DSR#1

CTS#1

4.7K_1206_8P4R_5%

RXD1

62

TXD1

63

DSR#1

64

RTS#1

1

CTS#1

2

DTR#1

3

RI#1

4

DCD#1

5

IRRX

37

IRTXOUT

38

IRMODE

39

LPTINIT#

41

LPTSLCTIN#

42

LPD0

44

LPD1

46

LPD2

47

LPD3

48

LPD4

49

LPD5

50

LPD6

51

LPD7

53

LPTSLCT

55

LPTPE

56

LPTBUSY

57

LPTACK#

58

LPTERR#

59

LPTAFD#

60

LPTSTB#

61

7
11
26
45
54

SIO@

RP2

R62

6

+3VS

18
27
36
45

5

FIR Module

IRRX

1 2

R357

FIR@

10K_0402_5%

4

L: R POP; FIR Enable
H: R De-POPFIR Disable

FIR_DET#

for VISHAY FIR issue

1K_0402_5%SIO@

1 2

+3VS

1 2

R163
47_1206_5%

10U_0805_10V4Z

FIR@

FIR@

C130

+IR_3VS

1

2

W=40mil

1

C125

FIR@

0.1U_0402_16V4Z

2

+IR_3VS

Parallel Port

+5V_PRN

D16

2 1

+5VS

PIO@

RB420D_SOT23

2.2K_0402_5%

+3VS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPE TENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET N OR THE INFORMA TION IT CONTAI NS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

6

LPTSTB#

LPTAFD#

L: R POP; PIO Enable
H: R De-POP PIO Disable

LPT_DET#

5

R238 33_0402_5%PIO@

R235 33_0402_5%PIO@

1 2

1 2

1 2

R113 0_0402_5%PIO@

W=20mil

+5V_PRN_R

AFD/3M#
FD0
LPTERR#
FD1
LPT_INIT#
FD2
SLCTIN#
FD3

FD4

FD5

FD6

FD7

LPTACK#

LPTBUSY

LPTPE

LPTSLCT

4

R239

PIO@

W=20mil

12

14

15

16

17

18

19

20

21

22
10
23
11
24
12
25
13

1 2

R112 0_0402_5%FIR@

+3VS

1

PIO@

C264

0.1U_0402_16V4Z

2

JP1

1

2

3

4

5

6

7

8

9

FOX_DZ11391-H7PIO@

3

1 2

R157 4.7_1206_5% @

1 2

R160 4.7_1206_5% FIR@

U38

2

IRED_C

4
6
8

SD/MODE

RXD
VCC
GND

TFDU6102-TR3_8P FIR@

IRED_A

MODE

TXD

1
3
5
7

2

+IR_ANODE

W=60mil

T = 12mil
T = 12mil

IRTXOUT
IRMODEIRRX

Change to Vishay 6102

LPD3 FD3
LPD2
LPD1
LPD0

LPD7
LPD6
LPD5
LPD4

LPTSLCTIN# SLCTIN#

+5V_PRN

RP33

FD0

1 8

FD1

2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

Title

Size Document Number Re v

Custom

Date: Sheet

3

FD2
FD3

2.7K_1206_8P4R_5%PIO@

RP34

FD7
FD6
FD5
FD4

2.7K_1206_8P4R_5%PIO@

RP31

SLCTIN#
LPT_INIT#
LPTERR#
AFD/3M#

2.7K_1206_8P4R_5%PIO@

RP36

LPTACK#
LPTBUSY
LPTPE
LPTSLCT

2.7K_1206_8P4R_5%PIO@

Compal Electronics, Inc.

SMsC LAP47N217 SIO,PIO,FIR

EAL20 LA-2461

星期

, 04, 2004

三八月

2

AFD/3M#
LPTERR#
LPT_INIT#
SLCTIN#

LPTACK#
LPTBUSY
LPTPE
LPTSLCT

1

RP32

1 8
2 7
3 6
4 5

33_1206_8P4R_5%PIO@

RP35

1 8
2 7
3 6
4 5

33_1206_8P4R_5%PIO@

1 2

R237 33_0402_5%PIO@

1 2

R236 33_0402_5%PIO@

CP8

2
3
4 5

PIO@

220P_1206_8P4C_50V8K

CP10

2
3
4 5

PIO@

220P_1206_8P4C_50V8K

CP9

FD0
FD1

2

FD2

3

FD3

4 5

PIO@

220P_1206_8P4C_50V8K

CP7

FD4
FD5

2

FD6

3

FD7

4 5

PIO@

220P_1206_8P4C_50V8K

of

33 47

1

LPT_INIT#LPTINIT#

FD2
FD1
FD0

FD7
FD6
FD5
FD4

81
7
6

81
7
6

81
7
6

81
7
6

0.3

A

C462

1

2

+3VALW

0.1U_0402_16V4Z

1

C427

2

+3VALW

R367

1 2

47K_0402_5%

C439

0.1U_0402_16V4Z

R375 10K_0402_5%

12

+3VALW

4.7U_0805_10V4Z

+3VALW

FBM-L11-160808-800LMT_0603

1 1

+5VS

+3VALW

2 2

+5VALW

+3VALW

3 3

0.1U_0402_16V4Z

1

1

C105

FBM-L11-160808-800LMT_0603

CLK_PCI_LPC

12

R366

10_0402_5%@

1

C433

10P_0402_50V8K@

2

2

2

L23

1 2

C463

0.1U_0402_16V4Z

L8

1 2

RP3

1 8
2 7
3 6
4 5

10K_1206_8P4R_5%

1 2

R111 10K_0402_5%

1 2

R114 10K_0402_5%

1 2

R353 10K_0402_5%

1 2

R387 10K_0402_5%

1 2

R316 10K_0402_5%

1 2

R392 10K_0402_5%

RP1

10K_1206_8P4R_5%

1 2

R371 20K_0402_5%

1

C372

C367

2

0.1U_0402_16V4Z

2

1

ECAGND

PSCLK1
PSDATA1
TP_DATA
TP_CLK

PSDATA2

PSCLK2

FSEL#

MUL_KEY#

FREAD#

EC_SMI#

EC_SMD_2

18

EC_SMC_2

27

EC_SMC_1

36

EC_SMD_1

45

LID_SW#

1000P_0402_50V7K

1

C371

2

4.7U_0805_10V4Z

+EC_AVCC

1

C467

2

1000P_0402_50V7K

reserved for GMCH

GMCH_ENBKL<7>

4 4

1 2

R115 0_0402_5% UMA@

ENBKL

B

U35

RC#

15

LAD0

14

LAD1

13

LAD2

10

LAD3

9

LFRAME#

165

LRST#/GPIO2C

18

LCLK

7

SERIRQ

25

CLKRUN#/GPIO0C

24

LPCPD#/GPIO0B

150

RD#

151

WR#

173

MEMCS#

152

IOCS#

138

D0

139

D1

140

D2

141

D3

144

D4

145

D5

146

D6

147

D7

124

A0

125

A1/XIOP_TP

126

A2

127

A3

128

A4/DMRP_TP

131

A5/EMWB_TP

132

A6

133

A7

143

A8

142

A9

135

A10

134

A11

130

A12

129

A13

121

A14

120

A15

113

A16

112

A17

104

A18

103

A19

108

A20/GPIO23

105

E51CS#/GPIO20/ISPEN

110

PSCLK1

111

PSDAT1

114

PSCLK2

115

PSDAT2

116

PSCLK3

117

PSDAT3

163

SCL1

164

SDA1

169

SCL2

170

SDA2

8

GPIO04

20

GPIO07

21

GPIO08

22

GPIO09

27

GPIO0D

28

GPIO0E

48

GPIO10

62

GPIO13

63

GPIO14

69

GPIO15

70

GPIO16

75

GPIO17

109

GPIO24

118

GPIO25

119

GPIO26

148

GPIO27

149

GPIO28

155

GPIO29

156

GPIO2A

162

GPIO2B

168

GPIO2D

55

FnLock#/GPIO12

54

CapLock#/GPIO011

23

NumLock#/GPIO0A

41

ScrollLock#/GPIO0F

19

ECRST#

5

GA20/GPIO02

6

KBRST#/GPIO03

31

ECSCI#

LPC_AD0<23,33>
LPC_AD1<23,33>
LPC_AD2<23,33>
LPC_AD3<23,33>

LPC_FRAME#<23,33>

B_PCIRST#<22,26,33>

CLK_PCI_LPC<12>

SIRQ<2 2,28,33>

PM_CLKRUN#<23,26,30,33>

FREAD#<35>

FWR#<35>

FSEL#<35>

12

TP_CLK<36>

TP_DATA<36>

EC_SMC_1<35,39>
EC_SMD_1<35,39>
EC_SMC_2<4,31>
EC_SMD_2<4,31>

SCI#<23>

ENBKL<13>
BKOFF#<20>
FSTCHG<40>

EC_SMI#<23>

EC_IDERST<25,31>

WL_OFF#<30>

EC_RIOUT#<23>

LID_SW#<36>

SYSON< 36,37,43>

SUSP#<31,37,42,43,44>
VR_ON<37,45>

PCMRST#<25>

PWRBTN_OUT#<23>

PADS_LED#<36>
CAPS_LED#<36>

NUM_LED#<36>

PHDD_LED#<25>

GATEA20<22>

RC#<22>

CLK_PCI_LPC

FREAD#

FWR#

FSEL#

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18

EC_TINIT#

PSCLK1
PSDATA1
PSCLK2
PSDATA2
TP_CLK
TP_DATA

EC_SMC_1
EC_SMD_1
EC_SMC_2
EC_SMD_2

SCI#

ENBKL

EC_SMI#
EC_IDERST

SKU_ID2

LID_SW#

PADS_LED#

CAPS_LED#
NUM_LED#
PHDD_LED#
EC_RST#

GATEA20

+3VALW

LPC Interface

*

*

PS2 Interface

SMBus

GPIO

*

*
*

*

MISC

C

+EC_AVCC

95

123

136

157

166

VCC16VCC34VCC45VCC

VCC

VCC

VCC

X-BUS Interface

Pulse Width

ENE-KB910-B4

Analog To Digital

Digital To Analog

Expanded I/O

GND17GND35GND46GND

+EC_RTCVCC

ECAGND

96

161

159

VCCA

AGND

VCCBAT

BATGND

Internal Keyboard

FAN2PWM/GPOW2/PWM2

FAN1PWM/GPOW7/PWM7

Wake Up Pin

GPIO2E/TOUT1/FANFB1

DPLL_TP/GPIO06/FANFB3

FAN

TEST_TP/GPIO05/FAN3PWM

Timer Pin

E51RXD/GPIO21/ISPCLK
E51TXD/GPIO22/ISPDAT

GND

GND

122

137

167

1 2

R56 0_0402_5%

1 2

R59 0_0402_5%@

2

C31
1U_0603_10V4Z

1

GPOK0/KSO0
GPOK1/KSO1
GPOK2/KSO2
GPOK3/KSO3
GPOK4/KSO4
GPOK5/KSO5
GPOK6/KSO6
GPOK7/KSO7
GPOK8/KSO8

GPOK9/KSO9
GPOK10/KSO10
GPOK11/KSO11
GPOK12/KSO12
GPOK13/KSO13
GPOK14/KSO14
GPOK15/KSO15
GPOK16/KSO16
GPOK17/KSO17

GPIK0/KSI0
GPIK1/KSI1
GPIK2/KSI2
GPIK3/KSI3
GPIK4/KSI4
GPIK5/KSI5
GPIK6/KSI6
GPIK7/KSI7

GPOW0/PWM0
GPOW1/PWM1

GPOW3/PWM3
GPOW4/PWM4
GPOW5/PWM5
GPOW6/PWM6

GPWU0
GPWU1
GPWU2
GPWU3
GPWU4
GPWU5

TIN1/GPWU6

TIN2/FANFB2/GPWU7

GPIAD0/AD0
GPIAD1/AD1
GPIAD2/AD2
GPIAD3/AD3
GPIAD4/AD4
GPIAD5/AD5
GPIAD6/AD6
GPIAD7/AD7

GPODA0/DA0

GPODA1/DA1

GPODA2/DA2

GPODA3/DA3

GPODA4/DA4

GPODA5/DA5

GPODA6/DA6

GPODA7/DA7

GPIO18/XIO8CS#

*

GPIO19/XIO9CS#

*

GPIO1A/XIOACS#

*
*

GPIO1B/XIOBCS#
GPIO1C/XIOCCS#

*

GPIO1D/XIODCS#

*

GPIO1E/XIOECS#

*

GPIO1F/XIOFCS#

*

TOUT2/GPIO2F

E51IT0/GPIO00
E51IT1/GPIO01

XCLKI

XCLKO

KB910Q B4_LQFP176

+3VALW

+RTCVCC

For ENE KB910 Rev.B4

KSO0

49

KSO1

50

KSO2

51

KSO3

52

KSO4

53

KSO5

56

KSO6

57

KSO7

58

KSO8

59

KSO9

60

KSO10

61

KSO11

64

KSO12

65

KSO13

66

KSO14

67

KSO15

68
153

KSO17

154

KSI0

71

KSI1

72

KSI2

73

KSI3

74

KSI4

77

KSI5

78

KSI6

79

KSI7

80

32
33
36
37
38
39
40
43

2
26
29
30
44
76
172
176

81
82
83
84
87
88
89
90

99
100
101
102
1
42
47
174

85
86
91
92
93
94
97
98

171
12
11

175

3
4
106
107

158
160

ADP_IR

AD_BID0

MUL_KEY#

SKU_ID0
SKU_ID1

SHDD_LED#

E51_RXD
E51_TXD

CRY1
CRY2

KSO17 <36>

C110

1 2
1 2
1 2

D

KSO[0..15]

KSI[0..7]

ADB[0..7]

KBA[0..18]

INVT_PWM <20>
BEEP# <31>
SUSP_LED <36>
ACOFF <40>
PM_BATLOW# <23>
EC_ON <36>
EC_LID_OUT# <23>
S4_LATCH <36>

ON/OF FBTN# <36>
ACI N <22,36,38>
KILL_SW# <30,32>
SLP_S3# <23>
PM_SLP_S5# <23>

SLP_S1# <12,23>
PCI_PME# <26,28,30>
BATT_TEMP <39>

ECAGND

1 2

0.01U_0402_16V7K

BATT_OVP <40>

LI/NIMH# <39>

S4_DATA <36>

MUL_KEY# <36>

DAC_BRIG <20>

IREF <40>
EN_DFAN1 <4>

CD_P LAY <25,32>

MODE_LED# <36>
CHARGING_LED# <36>
DEV_LED# <36>
POWER_LED# <36>

WL_LED# <32>
BATT_LOW_LED# <36>
FANSPEED1 <4>

R1061K_0402_5%
R3561K_0402_5%
R6210_0402_5%

EC_THRM# <23>

PM_RSMRST# <23>

SHDD_LED# <25>

R344

20M_0603_5%@

R340

1 2

0_0402_5%

1

2

10P_0402_50V8K

32.768KHZ_12.5P_1TJS125DJ2A073

C376

1 2

1

C109

0.22U_0603_16V7K

2

12

1

4

OUT

NC3NC

2

KSO[0..15] <36>

KSI[0..7] <36>

ADB[0..7] <35>

KBA[0..18] <35>

R141

10K_0402_5%

EAPD_KBC <32>

1

C364

IN

2

10P_0402_50V8K

Y2

JP23

E&T_96212-1011S@

KBA5

KBA4

KBA1

SKU_ID0

SKU_ID1

SKU_ID2

ADP_I <40>

ONBD_LAN_PME#<26,28,30>

For EC Tools

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

Board ID

AD_BID0

PCM_PME#<26 ,28,30>

MINI_PME#<26,28,30>

E

E51_RXD
E51_TXD

+3VALW

1 2

R348 1K_0402_5%

1 2

R55 1K_0402_5%

1 2

R57 1K_0402_5%

1 2

R622 10K_0402_5%@

1 2

R623 10K_0402_5%@

1 2

R624 10K_0402_5%@

1 2

R625 10K_0402_5%

1 2

R626 10K_0402_5%

1 2

R627 10K_0402_5%

+3VALW

12

R135

Ra

10K_0402_5%

12

*

Rb

100K_0402_5%

R140
0_0402_5%

R61

PCI_PME#

+3VALW

+3VALW

12

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET N OR THE INFORMA TION IT CONTAI NS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Re v

Custom

星期

Date: Sheet

三八月

EC KB910(LPC)

EAL20 LA-2461

, 04, 2004

0.3

of

34 47

E

OUT
OUT
OUT
FLG

USB_EN

8
7
6
5

+USB_VCCA +3VALW

12

R295

1 2

0_0402_5%@

47K_0402_5%

R296

100K_0402_5%

R298

1 2

1

C307

0.1U_0402_16V4Z

2

OVCUR#2 <23>
OVCUR#3 <23>

SYSON#<37>

+5VALWP

USB_EN USB_EN

C309

4.7U_0805_10V4Z

R342 0_0402_5%

U27

1
2
3
4

1

G528_SO8

2

1 2

GND
IN
IN
EN#

Close to JP20

+5VALWP

Close to JP21

U47

1

GND

2

IN

3

IN

4

EN#

1

C667

G528_SO8

4.7U_0805_10V4Z

2

OUT
OUT
OUT

+3VALW+USB_VCCC

12

R599

R598

100K_0402_5%

R600

1 2

47K_0402_5%

OVCUR#4 <23>

1

C668

0.1U_0402_16V4Z

2

8
7
6
5

FLG

1 2

0_0402_5%@

USB CONN. 1

W=40mils

+USB_VCCA +USB_VCCB

1

+

C296

150U_D2_6.3VM

C277

0.1U_0402_16V4Z

2

USB20P3-<23> USB20P2- <23>
USB20P3+<23>

512kB Flash ROM

KBA18

1

KBA16

2

KBA15

3

KBA12

4

KBA7

5

KBA6

6

KBA5

7

KBA4

8

KBA3

9

KBA2

10

KBA1

11

KBA0

12

ADB0

13

ADB1

14

ADB2

15
16

+3VALW +3VALW

C356

1 2

0.1U_0402_16V4Z

EC_SMC_1<34,39>
EC_SMD_1<34,39>

R334

1K_0402_5%

U31

8

VCC

7

WP

6

SCL

5

SDA

12

AT24C16N-10SI-2.7_SO8

GND

12

R332
10K_0402_5%

1

A0

2

A1

3

A2

4

12

R326
1K_0402_5%

SN74LVC32APWLE_TSSOP14

1

1

2

C281

1000P_0402_50V7K

2

C279

C278

1

1

@

@

2

2

10P_0402_50V8K

10P_0402_50V8K

U4

NC
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS

29F040/SST39VF040_PLCC

FWE#

VCC
WE*

A17
A14
A13

A8

A9
A11
OE*
A10
CE*

DQ7
DQ6
DQ5
DQ4
DQ3

+3VALW

U9B

6

O

JP5

5

VCC

VCC

6

D0-

D1-

7

D0+

D1+

8

VSS

VSS

9

G210G1

G311G4

SUYIN_020122MR008S540ZU

KBA[0..18]<34 >

ADB[0..7]<34>

+3VALW

C102

1 2

0.1U_0402_16V4Z

32

FWE#

31

KBA17

30

KBA14

29

KBA13

28

KBA8

27

KBA9

26

KBA11

25

FREAD#

24

KBA10

23

FSEL#

22

ADB7

21

ADB6

20

ADB5

19

ADB4

18

ADB3

17

+3VALW

12

R94

14

P

A

B

G

7

20K_0402_5%

4

5

USB CONN. 2

1000P_0402_50V7K

1
2
3
4

12

FREAD# <34>

FSEL# <34>

2

G

1 3

D

S

W=40mils

1

C276

2

C13

1

@

2

10P_0402_50V8K

KBA[0..18]
ADB[0..7]

Q31
2N7002_SOT23

1

C280

0.1U_0402_16V4Z

2

C12

1

@

2

10P_0402_50V8K

SUS_STAT# <13,23>

EC_FLASH# <23>

FWR# <34>

+USB_VCCA+USB_VCCA

1

+

C295

150U_D2_6.3VM

2

USB20P2+ <23>

FD3

FD4

1

1

CF8

CF6

1

1

CF20

CF9

1

1

H9

H2

H10

1

1

1

H8

H_S315D126

H11

H_C394D122

1

1

H_S315D126

H_O126X157D126X157N

H_C394D122

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C257

150U_D2_6.3VM

USB20P4-<23>

USB20P4+<23>

FD1

1

CF4

1

CF5

1

H7

H_S315D126

1

H5

H_C126D126N

1

H14

H_C394D122

1

+USB_VCCC

1

+

2

CF19

1

CF17

1

H_S315D126

H_C394D122

+USB_VCCC

C258

0.1U_0402_16V4Z

1

@

2

FD2

1

CF14

1

CF11

1

H16

H_S315D126

1

H23

H_C126D126N

1

H13

1

W=40mils

1

1

2

2

C670

C669

1

@

2

10P_0402_50V8K

10P_0402_50V8K

FD5

1

CF7

1

1

CF15

1

1

H15

H_S315D126

1

H6

H_O157X126D157X126N

1

C256

1000P_0402_50V7K

JP21

1
2
3
4

SUYIN_2569A-04G3T

FD6

1

CF22

CF3

1

CF10

CF16

1

H19

H_S315D126

1

1

1

H18

1

CF2

CF13

H_S315D126

H_O79X126D40X87

CF18

1

H20

1

H1

H_T236D161

H24

1

CF21

CF12

1

H_T236D161

1

CF1

1

1

H12

H17

H3

H_S315D161

1

H4

1

H_S315D161

1

H_S315D161

1

New Screw Hole

H25

H_O79X126D40X87

1

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

星期三 八月

H21

H_S276D118

1

H22

H_S276D118

1

BIOS/WL-SW/Screw Hole/USB

EAL20 LA-2461

of

35 47, 04, 2004

0.3

USB CONN. 3

LID Switch

LID_SW#<34>

SW/LED Connector

ACES_85203-1402

Touch Pad Connector

ACES_85203-1202

24

24

23

23

22

22

21

21

20

20

19

19

18

18

17

17

16

16

15

15

14

14

13

13

Battery mode Hibernation

100K_0402_5%

S4_LID_SW#

SYSON< 34,37,43>

S4_LATCH<34>

S4_DATA<34>

+3VALW

12

R363

100K_0402_5%

S4_LID_SW#

V-PORT-0603-220 M-V05_0603

JP15

1

1

2

2

3

3

4

4

5

5

EC_STOPBTN#

6

6

7

7

EC_FRDBTN#

8

8

EC_REVBTN#

9

9

EC_UTXD/KSO17

10

10

11

11

MUL_KEY_ESD#

12

12

ON/OFF

13

13

14

14

12

12

11

11

10

10

9

9

8

8

7

7

6

6

PWR_LED#

5

5

PWR_SUSP_LED

4

4

3

3

2

2

1

1

JP16

RTCVREF

12

12

R218

13

D

2

G

S

RTCVREF

+3VALW

R229

10K_0402_5%

1U_0805_25V4Z @

1 2

R231
10K_0402_5%

DAN202U_SC70
D19

2

1

3

D5

@

2 1

C613 0.1U_0402_16V4Z

1 2

PWR_LED#
PWR_SUSP_LED

EC_PLAYBTN#

+5VS

+5V
+5VALW

RTCVREF

1N4148_SOT23

680K_0402_5%

R220

100K_0402_5%

1 2

12

1 2

C236 1U_ 0603_10V6K

Q14
2N7002_SOT23

RTCVREF

R228

1 2

10K_0402_5%

1

C248

2

D15

2 1

RB751V_SOD323

SW1

1

3

ESE11MV9_4P

+5V

MODE_LED# <34>
DEV_LED# <34>

KSI1 <34>
KSI0 <34>
KSI3 <34>
KSI2 <34>

KSO17 <34>

TP_CLK <34>

TP_DATA <34>

ACIN <22,34,38>
POWER_LED# <34>

SUSP_LED <34>
CHARGING_LED# <34>

BATT_LOW_LED# <34>

D14

1

R225

2

1 2

R224
10K_0402_5%

2

4

D9

1

DAN202U_SC70

+5VS

2

1

RTCVREF

C242 0.1U_0402_16V4Z

5

P

3

2

A

G

3

1 2

C246 1U_0603_10V4Z

U23

1

CD1#

2

D1

3

CP1

4

SD1#

5

Q1

6

Q1#

7

GND

74LCX74MTC_TSSOP14

51_ON#

3

MUL_KEY#

2

C232

0.1U_0402_16V4Z

1 2

U22

1 2

4

Y

R222
10K_0402_5%

NC7SZ14M5X_SOT23-5

2N7002_SOT23

14

VCC

13

CD2#

12

D2

11

CP2

10

SD2#

09

Q2

08

Q2#

D_SET_S4

MUL_KEY# <34>

2

G

Q17

RTCVREF

0.1U_0402_16V4Z

C247

2N7002_SOT23

ON/OFF BUTTON

for ON/OFF switch

J-PB JOPEN

12

EC_ON<34>

2N7002_SOT23@

R233 0_0603_5%

AO3402_SOT23

+5VALW

SUSON<37>

ON/OFF

13

D

Q16

2

2N7002_SOT23

G

S

13

D

S

1 2

Q15

2

G

1

13

D

C233

220P_0402_50V7K@

2

S

ON/OFF

+3VALW

Q13

1 2

D

1 3

Q18

@

G

2

+3VALW

12

R219

2

3

100K_0402_5%

ON/OFFBTN#

13

51_ON#

Q12

DTC124EK_SC59

ON/OFFBTN# <34>

51_ON# <38>

1

C231

2

0.01U_0402_16V7K

WHEN R=0,Vbe=1.35V
WHEN R=33K,Vbe=0.8V

12

D10
RLZ20A_LL34

12

1 2

13

D

S

S

D11

1

DAN202U_SC70

R216

4.7K_0402_5%

R213

2

0_0402_5%

2

G

+5V

1

C250

0.1U_0402_16V4Z

2

Power OK Circuit

R212

180K_0402_5%

C229

1U_0603_10V4Z

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET N OR THE INFORMA TION IT CONTAI NS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PADS_LED#<34>

+3VS

+3VS

+3VS

12

5

1

2

SN74LVC14APWLE_TSSOP14

KSI[0..7]

INT_KBD CONN.

KSO[0..15]

KEYBOARD CONN.

ACES_88172-3400

37 38

PADS_LED#

R226

300_0402_5%

300_0402_5%

+3VALW +3VALW

14

U17C

P

O6I

G

7

Title

Size Document Number Re v

Date: Sheet

33

12

31

KSO14

29

KSO11

27

KSO9

25

KSI7

23

KSO7

21

KSI4

19

KSI5

17

KSO5

15

KSI0

13

KSO1

11

KSI2

9

KSO4

7

5

3

R227

12

1

35

JP17

PADS_LED#

12

C329100 P_0402_50V8J

KSO14

12

C680100 P_0402_50V8J

KSO11

12

C689100 P_0402_50V8J

KSO9

12

C672100 P_0402_50V8J

KSI7

12

C681100 P_0402_50V8J

KSO7

12

C690100 P_0402_50V8J

KSI4

12

C673100 P_0402_50V8J

KSI5

12

C682100 P_0402_50V8J

KSO5

12

C691100 P_0402_50V8J

KSI0

12

C674100 P_0402_50V8J

KSO1

12

C683100 P_0402_50V8J

KSI2

12

C692100 P_0402_50V8J

KSO4

12

C675100 P_0402_50V8J

SN74LVC14APWLE_TSSOP14

14

U17D

P

9

G

7

Compal Electronics, Inc.

S4R,LID,PIO,SYS CONN

EAL20 LA-2461

星期

, 04, 2004

三八月

NUM_LED#

34

CAPS_LED#

32

KSO15

30

KSO10

28

KSO8

26

KSO13

24

KSO3

22

KSO12

20

KSI6

18

KSO6

16

KSI3

14

KSO0

12

KSI1

10

KSO2

8

R214

1 2

6

300_0402_5%

4

2

36

NUM_LED#

CAPS_LED#

O8I

+3VS

1 2

C676 100P_0402_50V8J

1 2

C685 100P_0402_50V8J

KSO15

1 2

C694 100P_0402_50V8J

KSO10

1 2

C684 100P_0402_50V8J

KSO8

1 2

C693 100P_0402_50V8J

KSO13

1 2

C677 100P_0402_50V8J

KSO3

1 2

C686 100P_0402_50V8J

KSO12

1 2

C695 100P_0402_50V8J

KSI6

1 2

C678 100P_0402_50V8J

KSO6

1 2

C687 100P_0402_50V8J

KSI3

1 2

C696 100P_0402_50V8J

KSO0

1 2

C679 100P_0402_50V8J

KSI1

1 2

C688 100P_0402_50V8J

KSO2

1 2

C697 100P_0402_50V8J

12

R188
100K_0402_5%

36 47

KSI[0..7] <34>

KSO[0..15] <34>

NUM_LED# <34>

CAPS_LED# <34>

PM_POK <23>

0.3

of

A

B

C

D

E

+3VALW to +3V Transfer

+3VALW +3V

8
7
6

C327

5

10U_0805_10V4Z

+3VALW

U40

8

D

7

D

6

D

5

D

SI4800DY_SO8

U29

S

D

S

D

S

D

G

D

SI4800DY_SO8

1

C332

0.01U_0402_16V7K

2

1

S

2

S

3

S

4

G

1

C554

0.1U_0402_16V4Z

2

1
2
3
4

+3VS

1

2

0.1U_0402_16V4Z

1

C323

2

0.1U_0402_16V4Z

C506

10U_0805_10V4Z

12

1

2

1

C498

2

C330

R318
470_0402_5%

13

D

SYSON#

2

G

Q29

S

10U_0805_10V4Z

2N7002_SOT23

12

R431
470_0402_5%@

13

D

SUSP

2

G

Q36

S

2N7002_SOT23@

100K_0402_5%

SUSP

10U_0805_10V4Z

SUSON<36>

SYSON#

+12VALW

1

2

SUSON

2

G

12

R476
100K_0402_5%

13

D

Q30

2N7002_SOT23

S

+3VALW to +3VS Transfer

+12VALW

Q37
2N7002_SOT23

1

C525

2

10U_0805_10V4Z

RUNON

R466

100K_0402_5%

2

G

12

13

D

S

1 1

2 2

+5VALW to +5VS Transfer

+5VALW

+12VALW

R618

2

G

12

13

D

Q44
2N7002_SOT23

S

1

2

5VS_ON

8
7
6
5

C226

10U_0805_10V4Z

U19

S

D

S

D

S

D

G

D

SI4800DY_SO8

1

C700

0.01U_0402_16V7K

2

1
2
3
4

0.1U_0402_16V4Z

+1.5VALW to +1.5VS Transfer

+1.5VALW +1.5VS

U3

S

D

S

D

S

D

G

D

SI4800DY_SO8

1
2
3
4

C21

1

2

10U_0805_10V4Z

8
7
6

C19

5

1

C20

10U_0805_10V4Z

2

1

2

+5VS

1

C218

2

22U_1206_16V4Z_V1

RUNONSUSP

1

C214

10U_0805_10V4Z

2

2N7002_SOT23

1

C22

2

0.1U_0402_16V4Z

12

R204
470_0402_5%

13

D

Q8

1

C23

2

SUSP

2

G

S

SYSON#<35>

SYSON<34,36,43>

12

R33
470_0402_5%@

13

D

SUSP

Q28

2

G

2N7002_SOT23@

S

SUSP#<31,34,42,43,44>

SYSON

SUSP<44>

SYSON#

SUSP

2

G

2

G

+5VALW

+5VALW

12

R211
100K_0402_5%

13

D

Q10
2N7002_SOT23

S

12

R210
100K_0402_5%

13

D

Q11
2N7002_SOT23

S

3 3

remove on integrated VGA sku

+2.5V to +2.5VS Transfer

VR_ON#<44>

+2.5V

U6

M11@

8

D

7

D

6

1

2

10U_0805_10V4Z

4 4

A

C44

M11@

D

5

D

SI4800DY_SO8

RUNON

S
S
S

G

+2.5VS

1
2
3
4

0.1U_0402_16V4Z

1

M11@

C25

2

1

M11@

C26

10U_0805_10V4Z

2

12

R51

470_0402_5%@

13

D

SUSP

2

G

Q4

2N7002_SOT23@

S

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CO NFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

VR_ON<34,45>

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

星期三 八月

+5VALW

R208

10K_0402_5%

1 2

VR_ON#

13

D

Q9

2

2N7002_SOT23

G

S

DC/DC Interface

EAL20 LA-2461

E

37

0.3

of

47, 04, 2004

A

PJP1

1

3

G

2

4

1 1

2 2

3 3

G

SINGA_2DC-G213-B04

51_ON#<36>

PR20

+CHGRTC

1 2

200_0603_5%

+3VALWP +3VALW

(5A,200mils ,Via NO.= 10)

+5VALWP +5VALW

(5A,200mils ,Via NO.= 10)

+12VALWP +12VALW

(120mA,40mils ,Via NO.= 2)

+2.5VP +2.5V

(8A,320mils ,Via NO.= 16)

4 4

(3.5A,140mils ,Via NO.= 7)

DC_IN_S1 DC_IN_S2

1

2

BATT+

CHGRTCP

PR21

1 2

200_0603_5%

PJ1

2

JUMP_43X118

PJ3

2

JUMP_43X118

PJ5

2

JUMP_43X39

PJ7

2

JUMP_43X118

PJ9

2

JUMP_43X118

PJ11

2

JUMP_43X118

PF1

7A_24VDC_429007

PD3

RB751V_SOD323

12

1 2

PR11
200_0603_5%

100K_0402_5%

PR14 22K_0402_5%

RTCVREF

PR13

1 2

12

S-812C33AUA-C2N-T2_SOT89

3.3V

12

PC10
10U_0805_10V4Z

112

112

112

112

112

112

21

3

OUT

+VCCP+1.05VP

12

PC1
1000P_0402_50V7K

N1

12

PC7

0.22U_1206_25V7M

PU2

IN

GND

1

12

100P_0402_50V8J

2

12

PR16

200_0603_5%

2

12

PC9

1U_0805_25V4Z

+1.8VSP +1.8VS

+1.5VALWP +1.5VALW

(3.5A,140mils ,Via NO.= 7)

(2A,80mils ,Via NO.= 4)

(2A,80mils ,Via NO.= 4)

+VGA_COREP +VGA_CORE

(5A,200mils ,Via NO.= 10)

PL1

FBM-L18-453215-900LMA90T_1812

1 2

PD2

PR9

33_1206_5%

PC8

0.1U_0603_25V7K

PD5
RLZ16B_LL34

2 1

PJ2

2

112

JUMP_43X79

PJ4

2

112

JUMP_43X118

PJ6

2

JUMP_43X118

PJ8

2

JUMP_43X118

PJ10

2

JUMP_43X118

12

VS

112

112

112

PC2

VIN

1N4148_SOD80

1 2

12

13

PQ1
TP0610T_SOT23

12

N2

(1A,40mils ,Via NO.= 2)

B

PC3
1000P_0402_50V7K

+1.25VS+1.25VSP

+1.35VS+1.35VSP

VIN

12

PC4
100P_0402_50V8J

MAINPWON<39,41>

PC5

1000P_0402_50V7K

ACON<40>

VIN

12

PR3

84.5K_0402_1%

12

12

PR6

20K_0402_1%

VIN

VL

PD6

2

1

3

RB715F_SOT323

Precharge detector

15.97V/14.84V FOR
ADAPTOR

1 2

PR5 22K_0402_1%

12

PC6

0.1U_0402_16V7K

PD4

12

1N4148_SOD80

1 2

100K_0402_5%

PR17

1000P_0402_50V7K

1 2

PR1 1M_0402_1%

VS

8

PU1A

3

P

+

O

2

-

G

LM393M_SO8

4

PR8

12

10K_0402_5%

3.3V

1 2

PR10
1K_1206_5%

N3

1 2

PR12
1K_1206_5%

1 2

PR15
1K_1206_5%

LM393M_SO8

12

PC12

C

1

RTCVREF

PU1B

7

O

1000P_0402_50V7K

PD1

RLZ4.3B_LL34

PR18

8

5

P

+

6

-

G

4

PC13

VS

12

PR2

5.6K_0402_5%

12

12

2.2M_0402_5%

12

12

PR22

34K_0402_1%

PR24

66.5K_0402_1%

PR4
1K_0402_5%

12

PR7
10K_0402_5%

12

VL

1 2

PACIN

ACI N <22,34,36>

PACI N <40,41>

Vin Detector

High 18.384 17.901 17.430
Low 17.728 17.257 16.976

B+

12

PR19
499K_0402_1%

12

PR25
191K_0402_1%

PQ2

2

2N7002_SOT23

G

PR23

499K_0402_1%

PR26 47K_0402_5%

13

PQ3
DTC115EUA_SC70

2

12

13

D

S

12

D

12

PC11
1000P_0402_50V7K

PACIN

+5VALWP

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. T HIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

A

B

INC.

C

Title

Size Document Number Re v

Date: Sheet

Compal Electronics, Inc.

DCIN & DETECTOR

, 04, 2004

三八月

EAL20 LA-2461

D

星期

of

38 47

0.3

A

B

C

D

PH1 under CPU botten side :

CPU thermal protection at 84 degree C
Recovery at 45 degree C

VL VS

12

PH1

PR32

1 2

16.9K_0402_1%

12

12

PC17

PR35

3.32K_0402_1%

1000P_0402_50V7K

TM_REF1

12

PC18

12

PC14

0.1U_0603_25V7K

3

2

100K_0402_1%

12

PR39

100K_0402_1%

+

-

PR37

1 2

47K_0402_1%

8

PU3A

P

G

LM393M_SO8

4

+3VALWP

VMB

12

PL2

FBM-L18-453215-900LMA90T_1812

1 2

PC15
1000P_0402_50V7K

LI/NIMH# <34>

12

PC16

0.01U_0402_25V7Z

BATT+

10KB_0603_1%_TH11-3H103FT

0.22U_0805_16V7K_V2

1 1

PJP2
BTC-07GR1 7P

1
2
3
4
5
6
7

ALI/NIMH#

AB/I

TS_A
EC_SMDA
EC_SMCA

PR33

100_0402_5%

1 2

BATT_S1

1K_0402_5%

PR34

100_0402_5%

1 2

PR38

1K_0402_5%

PR28

1 2

PR31

12

1K_0402_5%

2 2

12

PF2

12A_65VDC_451012

21

PR29

1 2

47K_0402_5%

PR36

12

6.49K_0402_1%

+3VALWP

PR30

O

12

VL

PR27

47K_0402_1%

1 2

1

PD7

12

1SS355_SOD323

2

13

PQ4
DTC115EUA_SC70

MAINPWON <38,41>

VL

BATT_TEMP <34>

EC_SMD_1 <34,35>

EC_SMC_1 <34,35>

PH2 near main Battery CONN :

BAT. thermal protection at 79 degree C
Recovery at 45 degree C

VLVL

12

PH2

10KB_0603_1%_TH11-3H103FT

3 3

12

PC19

0.22U_0805_16V7K_V2

14.7K_0402_1%

1 2

12

PR43

3.48K_0402_1%

PR42

TM_REF1

5

+

6

-

1 2

PR41

47K_0402_1%

8

PU3B

P

G

LM393M_SO8

4

PR40
47K_0402_1%

1 2

PD8

7

O

12

1SS355_SOD323

4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. T HIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

A

B

INC.

C

Title

Size Document Number Re v

Date: Sheet

Compal Electronics, Inc.

BATTERY CONN / OTP

, 04, 2004

三八月

EAL20 LA-2461

D

星期

of

39 47

0.3

A

PC23

1
2
36

PR53

2

G

P2

12

12

PR45

200K_0402_1%

12

13

D

S

PQ7
AO4407_SO8

1
2
3 6

4

0.1U_0402_16V7K

PC26

IREF<34>

PQ13
2N7002_SOT23

12

8
7

5

ADP_I<34>

12

PR51
10K_0402_1%

205K_0402_1%

1 2

PR56

100K_0402_1%

12

PR61

PQ6
AO4407_SO8

VIN

1 1

12

PR46
47K_0402_5%

2

13

D

PQ12

2

2N7002_SOT23

G

S

2 2

PACIN<38,41>

ACON<38>

8
7

5

47K

2

13

PQ10

DTC115EUA_SC70

PACIN

DTA144EUA_SC70

47K

1 3

ACOFF#

1 2

1SS355_SOD323

1 2

PR57
3K_0402_1%

ACON

4

PQ8

0.1U_0603_25V7K

150K_0402_1%

PD12

IREF=1.31*Icharge

P3

12

PR50

33.2K_0402_1%

PC29

0.1U_0402_16V7K

12

4700P_0402_25V7K

1000P_0402_50V7K

12

PC33

0.1U_0402_16V7K

IREF=0.73~3.3V

B

Iadp=0~2.87A

PR44

12

0.02_2512_1%

12

PR49 100K_0402_5%

PR52

PC27

1 2

1 2

10K_0402_5%

PR54

PC30

1 2

1 2

1K_0402_5%

12

PR59 10K_0402_5%

B+

PU4

1

-INC2

2

OUTC2

3

+INE2

4

-INE2

5

FB2

6

VREF

7

FB1

8

-INE1

9

+INE1

10

OUTC1

11

OUTD

12

-INC1

MB3887_SSOP24

PL3

FBM-L18-453215-900LMA90T_1812

1 2

24

+INC2

23

GND

CS

22

CS

21

VCC(o)

20

OUT

1 2

19

VH

PC28

0.1U_0603_25V7K

18

VCC

1 2

17

RT

PR55
68K_0402_5%

16

-INE3

FB3

CTL

+INC1

15

14

13

PR60

1 2

47K_0402_5%

ACON

12

PC20

4.7U_1206_25V6K

PC24

0.022U_0402_16V7K

1 2

PC25

1 2

0.1U_0603_25V7K

1 2

PC31

0.1U_0603_25V7K

PC32

1 2

1500P_0402_50V7K

C

PQ5

AO4407_SO8

1
2
3 6

B++

12

PC21

4.7U_1206_25V6K

12

PC22

4.7U_1206_25V6K

36

241

N18

578

1 2

16UH_D104C-919AS-160M_3.7A_20%

12

PD13

EC31QS04

PQ9
AO4407_SO8

LXCHRG

PL4

PR48

10K_0402_5%

ACOFF#

1 2

13

DTC115EUA_SC70

CC=0.5~2.7A
CV=16.8V(12 CELLS LI-ION)

PR58

1 2

0.02_2512_1%

PR47

1 2

47K_0402_5%

2

PQ11

4.7U_1206_25V6K

PC34

4

12

4.7U_1206_25V6K

PC35

8
7

5

VIN

ACOFF <34>

12

4.7U_1206_25V6K

D

BATT+

12

PC36

+3VALWP

12

PR64
47K_0402_5%

2

13

PQ15
DTC115EUA_SC70

3 3

FSTCHG<34>

2

CS

13

PQ14
DTC115EUA_SC70

VMB

PR62

12

95.3K_0603_0.1%

PR65

12

95.3K_0603_0.1%

4.2V

PR63

12

143K_0603_0.1%

12

PR66
340K_0402_1%

OVP voltage : LI

4S2P : 17.4V--> BATT_OVP= 1.935V

+12VALWP

(BAT_OVP=0.1111 *VMB)

8

PU5A

LM358A_SO8

PR68

2.2K_0402_5%

1

BATT_OVP<34>

12

4 4

A

3

P

+

0

2

-

G

4

105K_0402_1%

PR69

12

PR67
499K_0402_1%

12

12

PC37

0.01U_0402_25V7Z

B

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. T HIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.

C

Title

Size Document Number Re v

Date: Sheet

Compal Electronics, Inc.

CHARGER

, 04, 2004

三八月

EAL20 LA-2461

D

星期

of

40 47

0.3

5

4

3

2

1

N4

PJ17

D D

C C

B B

2

B+

JUMP_43X118

B+++

112

12

12

PC41

4.7U_1206_25V6K

10UH_D104C-919AS-100M_4.5A_20%

PC42

4.7U_1206_25V6K

PL6

+3VALWP

1

470U_6.3V_M

PC53

+

2

PD17

SKUL30-02AT_SMA

2 1

12

PC49

12

47P_0402_50V8J

1M_0402_1%

PR75

1 2

3.32K_0402_1%

PR80

1.87K_0402_1%

1 2

1 2

5

D8D7D6D

S1S2S3G

4

5

D8D7D6D

S1S2S3G

4

PR72

PR73

3.74K_0402_1%

PR76

0_0402_5%

12

PC54
100P_0402_50V8J

PR83

10K_0402_1%

1 2

PQ16
SI4800DY-T1_SO8

PQ18
SI4810DY_SO8

PDL3

12

12

PC51

0.47U_0603_16V7K

1 2

12

PACIN<38,40>

VS

47K_0402_5%

0.047U_0402_16V4Z@

PC40

0.1U_0603_25V7K

PLX3

PR77

1.24K_0402_1%

1 2

PR78

10K_0402_5%

PR81

1 2

PC59

BST31

12

CSH3
CSL3

12

PDH3

12

PC47

0.1U_0603_25V7K

PU6

25

BST3

27

DH3

26

LX3

24

DL3

1

CSH3

2

CSL3

3

FB3

10

SKIP#

23

SHDN#

7

TIME/ON5

28

RUN/ON3

12

PC56
1000P_0402_50V7K

PR85
220K_0402_5%

12

PC60

0.47U_0603_16V7K

VS

PD16

1SS355_SOD323

1 2

22

12

VL

V+

GND

8

VL

MAINPWON <38,39>

2

3

PD15

DAP202U_SOT323

1

12

PC46

4.7U_0805_6.3V6K

21

4

12OUT

VL

5

VDD

18

BST5

16

DH5

17

LX5

19

DL5

20

PGND

14

CSH5

13

CSL5

12

FB5

15

SEQ

9

REF

6

SYNC

11

RST#

MAX1902EAI_SSOP28

BST51

+12VALWP

12

PC48

4.7U_1206_25V6K

12

PC55

4.7U_0805_6.3V6K

+2.5VREF

PC43

1 2

0.1U_0603_25V7K

PDH5

PLX5

PC52

0.47U_0603_16V7K

10.2K_0402_1%

PC44

4.7U_1206_25V6K

12

12

PR82

12

B+++

12

12

4.7U_1206_25V6K

PDL5

12

PR79

1.82K_0402_1%

12

PR84

10K_0402_1%

PC45

SI4810DY_SO8

PC57
100P_0402_50V8J

PC39
470P_0805_100V7K

1 2

PR70 22_1206_5%

5

PQ17

SI4800DY-T1_SO8

4

5

PQ19

4

12

D8D7D6D

S1S2S3G

1.27K_0402_1%

D8D7D6D

S1S2S3G

CSH5

FLYBACKSNB

PR71

12

12

PR74

2M_0402_1%

PC50
47P_0402_50V8J

PC38

1 2

12

PD14

4.7U_1206_25V6K

EC11FS2_SOD106

PT1

10uH_SDT-1205P-100-118_5A_20%

1 4

3 2

12

1

470U_6.3V_M

PC58

+

2

PD18

SKUL30-02AT_SMA

2 1

+5VALWP

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. T HIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

5

4

3

INC.

2

Title

Size Document Number Re v

Date: Sheet

Compal Electronics, Inc.

5V/3.3V/12V

, 04, 2004

三八月

EAL20 LA-2461

1

星期

of

41 47

0.3

A

PC61

12

4.7U_1206_25V6K

1 1

B

12

PR86

0_1206_5%

+5VALWP

C

PC62

12

4.7U_1206_25V6K

PL7

FBM-L18-453215-900LMA90T_1812

1 2

12

PC63

4.7U_1206_25V6K

D

B+

PD19

1

DAP202U_SOT323

0.1U_0603_25V7K

2

5

+1.35V

+1.35VSP

1

+

PC70

470U_6.3V_M

2 2

2

PR90

4.99K_0402_1%

3UH_SPC-07040-3R0_5A_30%

0.01U_0402_25V7Z

12

12

PC71

PL8

1 2

SI4800DY-T1_SO8

SI4800DY-T1_SO8

PQ20

PHASE1

PQ22

D8D7D6D

S1S2S3G

D8D7D6D

S1S2S3G

4

5

PC68

0.1U_0402_16V7K

4

N10

PR94

SUSP#

12

PR97

10K_0402_1%

3 3

SUSP#<31,34,37,43,44>

1 2

0_0402_5%

0.1U_0402_16V7K@

3

PC66

12

0.01U_0402_25V7Z

PR88

12

1 2

0_0603_5%

N9 N11

PR91

1 2

2K_0402_1%

12

PC74

12

PC64

PU7

12

SOFT1

6

BOOT1

5

UGATE1

4

PHASE1

7

ISEN1

2

LGATE1

3

PGND1

9

VOUT1

10

VSEN1

8

EN1

15

PG1

11

OCSET1

PR99

71.5K_0402_1%

12

14

VIN

PR87

2.2_0603_5%

1 2

28

SOFT2

VCC

BOOT2

UGATE2

PHASE2

ISEN2

LGATE2

PGND2

VOUT2
VSEN2

EN2

PG2/REF

GND

1

OCSET2

DDR

ISL6225BCA-T_SSOP28

13

71.5K_0402_1%

PC67

17

0.01U_0402_25V7Z

1 2

23

PR89
0_0603_5%

24

25

PR92
2K_0402_1%

1 2

22

27

26

20
19
21
16

18

12

PR98

12

PC65

2.2U_0805_10V6K

12

PC69

0.1U_0402_16V7K

12

PR95

1 2

12

10K_0402_1%

PC75

5

D8D7D6D

PQ21

SI4800DY-T1_SO8

4

5

4

S1S2S3G

PHASE2

D8D7D6D

PQ23

SI4800DY-T1_SO8

S1S2S3G

+3VALWP

PL9
3UH_SPC-07040-3R0_5A_30%

1 2

0.01U_0402_25V7Z
PC73

12

PR93

6.81K_0402_1%

12

470U_6.3V_M

12

PR96

10K_0402_1%

+1.5V

+1.5VALWP

1

+

PC72

2

N12

0.1U_0402_16V7K@

4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. T HIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

A

B

INC.

C

Title

Size Document Number Re v

Date: Sheet

Compal Electronics, Inc.

1.35V/1.5V

, 04, 2004

三八月

EAL20 LA-2461

D

星期

of

42 47

0.3

5

4

3

2

1

PR100

1 2

10_0603_5%

12

PC76

1U_0603_6.3V6M

12

2

G

PC79

470P_0402_50V8J

PR106

20.5K_0402_1%

1 2
13

D

PQ28
2N7002_SOT23

S

PU8

7

OCSET

6

FB

3

GND

APW7057KC-TR_SOP8

PC83

0.1U_0402_16V7K@

1 2

PR101

12

13

D

2

G

S

PR143

100K_0402_5%

6.81K_0402_1%

PQ27
2N7002_SOT23

12

2

G

D D

PR102

100K_0402_5%

VL

SUSP#<31,34,37,42,44>

0.1U_0402_16V7K@

C C

PR103
0_0402_5%

1 2

PC82

1 2

VL

POWER_SEL<13 >

Low:1.2V
High:1.0V

2

G

20.5K_0402_1%

13

D

PQ43
2N7002_SOT23

S

1 2

13

D

PQ25
2N7002_SOT23

S

PR105

PR108

6.81K_0402_1%

PR109

100K_0402_5%

VL

B B

PR110

0_0402_5%

SYSON< 34,36,37>

1 2

PC91

0.1U_0402_16V7K@

12

13

D

2

G

S

1 2

1 2

2

G

PQ32
2N7002_SOT23

13

D

S

5

VCC

BOOT

UGATE

PHASE

LGATE

1 2

12

470P_0402_50V8J

PQ30
2N7002_SOT23

1

2

8

4

PR104

5.36K_0402_1%

1 2

1 2

PC88

0.1U_0402_16V7K

PC84

0.1U_0402_16V7K

PR112

2.4K_0402_1%

1 2

PD20

1N4148_SOD80

1 2

12

PC80

5

PU9

7

6

3

VCC

OCSET

FB

GND

APW7057KC-TR_SOP8

PR111

5.11K_0402_1%

1 2

1 2

PC92

0.1U_0402_16V7K

12

BOOT

UGATE

PHASE

LGATE

PC78

12

4.7U_1206_25V6K

5

D8D7D6D

PQ24

SI4800DY-T1_SO8

S1S2S3G

4

PL10

1.8UH_D104C-919AS-1R8N_9.5A_20%

5

D8D7D6D

PQ26

SI4810DY_SO8

S1S2S3G

4

PR107

1 2

10_0603_5%

PC85

1U_0603_6.3V6M

1

2

8

4

12

PD21

1N4148_SOD80

1 2

0.1U_0402_16V7K

12

PC89

1

+

PC77
470U_6.3V_M

2

5

4

5

4

PJ12

2

112

JUMP_43X118

+VGA_COREP

1

+

PC81
470U_6.3V_M

2

12

4.7U_1206_25V6K

PQ29

D8D7D6D

SI4800DY-T1_SO8

S1S2S3G

PL11

1.8UH_D104C-919AS-1R8N_9.5A_20%

D8D7D6D

PQ31

SI4810DY_SO8

S1S2S3G

PC86

+5VS

PJ13

2

112

JUMP_43X118

PC87
220U_6.3V_M

1

+

2

12

1

+

PC90
220U_6.3V_M

2

+5VALWP

+2.5VP

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. T HIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

5

4

3

INC.

2

Title

Size Document Number Re v

Date: Sheet

Compal Electronics, Inc.

2.5V/VGA_CORE

, 05, 2004

四八月

EAL20 LA-2461

1

星期

of

43 47

0.3

5

4

3

2

1

NC

NC

NC

TP

+1.8VSP

PC94
10U_1206_6.3V7K

1 2

6

5

7

8

9

+3VALWP

12

PC102
1U_0603_6.3V6M

+2.5VP

1

PJ15

1

JUMP_43X118

2

2

12

PC96

10U_1206_6.3V7K

PR115

0_0402_5%

VR_ON#<37 >

1 2

0.1U_0402_16V7K@

PC100

12

13

D

2N7002_SOT23

2

G

S

PR114

1.37K_0402_1%

PQ33

PR116

1K_0402_1%

12

12

PC98

0.1U_0402_16V7K

12

12

PU11

VIN1VCNTL

2

GND

3

VREF

4

VOUT

APL5331KAC-TR_SO8

+1.05VP

PC99
10U_1206_6.3V7K

6

5

NC

7

NC

8

NC

9

TP

+3VALWP

12

PC97
1U_0603_6.3V6M

D D

+2.5VP

SUSP#4,37,42,43>

C C

PJ14

2

JUMP_43X118

112

4.7U_0805_6.3V6K

1 2

PR113

84.5K_0402_1%

0.1U_0402_16V7K

PC95

PC93

1 2

12

PU10

VIN2VO

1

EN

5

GND

6

GND

G965-18P1U_SO8

GND

GND

3

4

ADJ

7

8

+2.5V

1

PJ16

1

JUMP_43X118

2

2

12

PC101

10U_1206_6.3V7K

B B

SUSP<37>

SUSP

0.1U_0402_16V7K@

PR118

0_0402_5%

1 2

PC105

13

D

2

G

S

12

PR117

1K_0402_1%

PQ34
2N7002_SOT23

PR119

1K_0402_1%

12

12

PC103

0.1U_0402_16V7K

12

12

PU12

VIN1VCNTL

2

GND

3

VREF

4

VOUT

APL5331KAC-TR_SO8

+1.25VSP

PC104
10U_1206_6.3V7K

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. T HIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

5

4

3

INC.

2

Title

Size Document Number Re v

Date: Sheet

Compal Electronics, Inc.

1.8V/1.25V/1.05V

, 04, 2004

三八月

EAL20 LA-2461

1

星期

of

44 47

0.3

STP_CPU#<12,23>

VR_ON <34,37>

FB

PR133 100K_0402_1%

PM_DPRSLPVR<23>

PR127
0_0402_5%

1 2

1 2

PR132

78.7K_0402_1%

1 2

PQ37

2

G

PSI#<5>

1 2

PR130 200K_0402_1%

13

D

PR135

10.7K_0402_1%

RHU002N06_SOT323

S

PR137
0_0402_5%

1 2

100K_0402_1%

1 2

+5VS

CPU_VID0<5>

CPU_VID1<5>

CPU_VID2<5>

CPU_VID3<5>

CPU_VID4<5>

CPU_VID5<5>

VGATE<7,12,23>

PR140

12

PC119

C

2

B

E

PR128 30.1 K_0402_1%

PC115

1 2

270P_0402_50V7K

1 2

PC117 0 .22U_0603_16V7K

13

D

PQ38

2

100P_0402_50V8J

1 2

1

3

RHU002N06_SOT323

G

S

1 2

PR138

20K_0402_1%

PQ41

2

G

PQ42

HMBT2222A_SOT23

1 2

12

1 2

PC120

PR139

10K_0402_1%

1 2
13

D

RHU002N06_SOT323

S

12

PR120
10_0402_5%

PC110
1U_0603_6.3V6M

VCC

10

24

23

22

21

20

19

25

4

VCC

5

6

1

12

2

8

9

7

3

18

11

27P_0402_50V8J

+5VS

2.2U_0603_6.3V6K

PU13

VCC

D0

D1

D2

D3

D4

D5

VROK

S0

S1

SHDN#

TIME

CCV

TON

REF

ILIM

OFS

SUS

SKIP

GND

MAX1532AETL_TQFN40

PC109

BSTM

PGND

OAIN+

OAIN-

GNDS

VDD

DHM

LXM

DLM

CMP

CMN

BSTS

DHS

LXS

DLS

CSP

CSN

CPU_B+ B+

PD22

EP10QY03

2 1

2

1

30

36

V+

26

28

27

29

31

37

38

17

16

15

FB

14

CCI

35

33

34

32

40

39

13

12

PC111

PR121

2.2_0603_5%

FB

1 2

PC116 470P_0402_50V8J

12

PC112

0.01U_0402_25V7Z

12

PR136

PC123

1 2

12

0.22U_0603_16V7K

2.2_0603_5%

0.22U_0603_16V7K

N8

N5

EP10QY03

N7

PD24

5

S

4

2

5

PQ36

S

AO4410_SO8

4

2

N6

PR129 909_0402_1%

1 2

+5VS

21

5

PQ39

AO4408_SO8

4

5

PQ40

AO4410_SO8

4

D8D7D6D

S1S3G

D8D7D6D

S1S3G

D8D7D6D

S1S3G

S

2

D8D7D6D

S1S3G

S

2

PQ35

AO4408_SO8

12

@

@

12

PC107

4.7U_1206_25V6K

CPUPHASE1

PD23

EC31QS04

12

PC121

4.7U_1206_25V6K

12

PD25

12

PC108

4.7U_1206_25V6K

0.56UH_ETQP4 LR56WFC_21A_20%

PR123 909_0402_1%

CPU_B+

12

PC122

4.7U_1206_25V6K

CPUPHASE2

EC31QS04

1

+

PC106
220U_25V_M

2

PL13

1 2

12

PC114

1 2

0.47U_0603_16V7K

1 2

PC118

2200P_0402_50V7K

PL14

0.56UH_ETQP4 LR56WFC_21A_20%

1 2

12

1 2

PR141 909_0402_1%

0.47U_0603_16V7K

PC124

PL12

1 2

FBM-L18-453215-900LMA90T_1812

PR122

1 2

0.001_2512_5%

12

PR131

PR134

0_0402_5%

PR125 499_0402_1%

PR124 499_0402_1%

1 2

2.7K_0402_1%

1 2

12

PR126

2.7K_0402_1%

+CPU_CORE

CPU VCC SENSE

1 2

1 2

@

PC113

1000P_0402_50V7K

909_0402_1%

1 2

PR142

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.

Title

Size Document Number Re v

Date: Sheet

Compal Electronics, Inc.

CPU_CORE

, 05, 2004

四八月

EAL20 LA-2461

星期

of

45 47

0.3

PWR PIR LIST

EVT

page

41 Improve design margin Change PD17,PD18 from SSM14 to SKUL30-02AT

43 Change 2.5V,VGA_CORE OCP to 8A Change PR101,PR108 from 5.11K to 6.81K

39 Improve design margin Change PF2 rating from 7A to 12A

DVT

43 Reverse POWER_SEL signal level

Reason for change Modify list

Add PR143(100K),PQ43

for HW request

41 Adjust 3.3V OCP Change PR72 from 1.27K to 1.87K_0402_1%

Change PR73 from 1.27K to 3.74K_0402_1%
Change PR77 from 620 to 1.24K_0402_1%

Adjust 5V OCP41 Change PR71 from 1.54K to 1.27K_0402_1%

Change PR79 from 698 to 1.82K_0402_1%

43 Change choke for design margen Change PL10,PL11 from 4.7UH to 1.8UH

44 Add 1.8V delay time for HW Change PR113 from 0 to 84.5K_0402_1%

Add 0.1U at PC95

45 For EMI requirement Change PR121,PR136 from 0 to 2.2_0603_5%

Adjust CPU_CORE voltage45 Change PR126,PR131 from 3K to 2.7K_0402_1%

42 Modify 1.5V enable signal for HW request Change PR95 from 0 to 10K_0402_1%

PVT

43 Modify PL10 and PL11 Footprint
38 Change DC-IN Jack as "SINGA_2DC-G213-B04_4P"
41 Change PL5 as PJ17
43 Raise VGA_CORE voltage to 1.21V for HW

requirement

45 Adjust CPU_CORE voltage

Change PR104 from 5.11K_0402_1% to 5.36K_0402_1%

Change PC118 from 0.022U to 2200P

PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

EAL20 PIR LIST

FortWorth Banias

星期三

04, 2004

八月

0.3

46 47,

A

EAL20 LA-2461 SCHEMATIC CHANGE LIST
REVISION CHANGE: 0.1 TO 0.2

NO DATE PAGE MODIFICATION LIST PURPOSE

----------------------------------------------------------------------------------------------------­ 1 6/23 P31 POP R521 CODEC CLOCK SOURCE FROM CLOCK GEN
2 6/23 P35 CHANGE R342.1 CONNECTION FROM SYSON TO SYSON# CHANGE USB POWER TO LOW ACTIVE
3 6/23 P29 CHANGE R492.2 PULL HIGH FROM +3VS TO +VCC_5IN1 CHANGE PULL HIGH POWER
4 6/23 P36 SWAP PIN OF JP16 CHANGE JP16 DIRECTION
5 6/23 P12 RESERVE C671 ADD CAP TO CONTROL VGATE RISING TIME

4 4

6 7/05 P12 CHANGE CLK_PCI_ICH CONNECT FROM U49.11 TO U49.7 CHANGE ICH PCI CLK SOURCE TO FREE RUN
CHANGE CLK_PCI_1394 CONNECT FROM U49.7 TO U49.11 CLOCK, TO SOLVE SYSTEM CAN NOT SHUTDOWN
ISSUE
7 7/05 P29 CHANGE 5IN1 CONNECTOR FROM TAISOL TO TAITWAN CHANGE CONNECTOR VENDOR
8 7/06 P29 DEL R251,R249 DEL 75OHM TERMINATION
P13 ADD R603,R604 ADD 75OHM TERMINATION CLOSE TO CHIP
P19 RESERVE R605,R606 RESERVE 75OHM TERMINATION CLOSE TO CHIP
9 7/06 P22 INSERT D29 BETWEEN GPI11 AND ACIN PREVENT SB LEAKAGE DURING DC-IN
TO SOLVE POWER BOTTON NO FUNCTION ISSUE
10 7/06 P13 ADD R317 100K_0402_5% PULL DOWN POWER_SEL PREVENT SIGNAL FLOATING
11 7/06 P29 CHANGE R528 CONNECTION FOR CUSTOMER REQUEST
12 7/06 P36 DEL CP1~CP6, ADD C329,C672~C697 FOR EMI REQUEST
13 7/06 P36 CHANGE Q16.1 CONNECT TO ON/OFF TO CORRECT LID SW FUNCTION
14 7/06 P20 CHANGE R294 FROM 0603 TO 0805,R19 FROM 0805 TO 1206 TO INCREASE RATING
15 7/07 P31 RESERVE 1M_0402_5% R607~R614,HCT4066 U48 TO CONTROL POWER ON/OFF AUDIO CD PATH
RESERVE 10K_5%_0402 R615,0_0402_5% R617,RESERVE R616 ADD MUX SW CONTROL
16 7/07 P12 ADD L35 BETWEEN +3VS AND +3VS_CLK FOR CUSTOMER REQUST
17 7/08 P37 CHANGE C554 FROM 0.01U TO 0.1U CHANGE POWER ON SEQUENCE
CHANGE U19.4 NET FROM RUNON TO 5VS_ON
ADD R618,Q44,C700, ADD 5VS_ON NET CONTROL +5VS CONTROL GATE

3 3

18 7/09 P06 CHANGE R461 FROM 27.4 TO 37.4OHM CHANGE RESISTANCE FOR 855GME
19 7/09 P26 CHANGE C325 FROM 0.01U TO 0.1U,R292 FROM 5.9K TO 5.36K CHANGE R,C TO PASS LAN TEST
20 7/09 P29 CHANGE CP2211 U18 FROM C1 TO D3 VERSION CHANGE FOR MATERIAL EOL

2 2

B

C

EAL20 LA-2461 SCHEMATIC CHANGE LIST
REVISION CHANGE: 0.2 TO 0.3

NO DATE PAGE MODIFICATION LIST PURPOSE

----------------------------------------------------------------------------------------------------­ 1 7/15 P19 CHANGE R389,R393 BOM STUCTURE FROM UMA@ TO @ REMOVE IN UMA SKU
2 7/20 P16 RESERVE D2 SIZE CAP C701 ON +VGA_CORE PLANE ADD ONE MORE BULK CAP FOR VGA CORE
3 7/20 P28 ADD D12,R217,R438,R440,R443,R447,R448,R456,R458,R474 CHANGE BOM STRUCTURE TO CONTROL BOM
,R495,R501 BOM STRUCTURE 5IN1@
P29 ADD C518,C585,C592,C617,C618,R449,R455,R492,R494,R502
,R520,R528,JP13,U44 BOM STRUCTURE 5IN1@
P12 ADD R524 BOM STRUCTURE 5IN1@
4 7/20 P31 NEW ADD R619 BETWEEN L_OUT_L AND AMP_LEFT ADD RES TO BYPASS MUX
NEW ADD R620 BETWEEN L_OUT_R AND AMP_RIGHT
5 7/20 P12 CHANGE R574 TO RESERVE CHANGE AC CODEC CLOCK SOURCE
P31 CHANGE R527,R521 TO RESERVE
CHANGE X3,C610,C619 TO MOUNT
6 7/20 P31 CHANGE U45.47 NET NAME FROM EAPD TO EAPD_CODEC USE KBC TO MUTE AMP
P34 NEW ADD R621 BETWEEN EAPD_KBC AND U35.11
P32 ADD U9A, CONNECT U9A.1 TO EAPD_CODEC,U9A.2 TO EAPD_KBC
U9A.3 TO EAPD
7 7/21 P34 RESERVE R622.2,R623.2,R624.2 PULL HIGH TO +3VALW ADD SKU ID FUNCTION FOR EC RECOGNIZES
NEW ADD R625.2,R626.2,R627.2 PULL LOW TO GND
ADD SKU_ID0 CONNECT BETWEEN U35.93,R622.1,R625.1
ADD SKU_ID1 CONNECT BETWEEN U35.94,R623.1,R626.1
ADD SKU_ID2 CONNECT BETWEEN U35.75,R624.1,R627.1
8 7/26 P28 Modify "5IN1@ " to "5IN1@"
P29 Modify "5IN1@ " to "5IN1@"
P30 Modify "KS@ " to "KS@"
P33 Modify R15 7 remark from "FIR@" to "@"
P21 Modify JP3 footprint from
"SUYIN_030336FR004T115ZU_4P_EAL20" to
"030336FR004T115ZU_4P_EAL20"
9 7/29 P36 Shift SW/LED Connector signal up one pins, leave
JP15.11 as NC.
P35 Add 3 screw hole, H23(H_C126D126N), H24 and H25
(H_O79X126D40X87)
H23 for M/B location Keeping.
H24 and H25 for Double USB holding.
10 7/31 P20 L5 and L4 change as 0_0805_5%
P31 L9 and L11 change as 0_0603_5%, L26, L27 and L28
change as 0_0805_5%
P32 L29 and L30 change as 0_0805_5%, L26, L31, L32, L33 and
L34 change as 0_0603_5%
P28 SDCK_XDWE# saperate SD_CLK and XDWE#, add R628 for Some card can't detect because reflection
XDWE#
P29 R455.2 and JP13.36 SDCK_XDWE# change XDWE#.
R450.1 and JP13.8 SDCK_XDWE# change SD_CLK.
XXX Update schematic name from LA2641 to LA2461.
11 8/02 P20 Add D30 for EMI ESD test fail.
P32 L31, L32, L33 and L34 change as Bead.
12 8/03 P04 Delete P@ on PU5B.
12 8/04 P19 Update R396 and R397 as 75_0402_1%.
P13 Update R60 3, R604 and R365 as 75_0402_1%.

D

E

1 1

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONF IDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPA L ELECTRONIC S, INC. NEITHE R THIS SHEET NO R THE INFORMA TION IT CONT AINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

PIR LIST

EAL20 LA-2461

, 04, 2004

星期三 八月

E

of

47 47

0.3