Quanta LA-854 888F2, Satellite 1700 Schematic

COMPAL CONFIDENTIAL

MODEL NAME : 888F2 LA854

REV:0.1

LCD & CRT

PAGE 17

Celeron
uBGA2/uPGA2
CPU

PAGE 2,3

PSB

CLOCK

ICS9248-92

PAGE 12

PCI / ISA
PULL UP/DOWN
RESISTERS

PAGE 13

SGRAM

INTERNAL IDE

IDE/FDD

PAGE 22

FIR/USB

LPT PORT

PAGE 16

PIRQA#

Direct CD
Play

PAGE 21

IDE
Damping

PAGE 20

PAGE 32

PAGE 31

VGA

ATI Mobility P

PAGE 14,15

BUS#0,DEV#7

FUNC 0: PCI-TO-ISA BRIDGE
FUNC 1: IDE INTERFACE
FUNC 2: USB INTERFACE
FUNC 3: POWER MANAGEMENT

ISA

SIO

FDC37N869

PIIX4M

PAGE 30

PCI BUS

IDSEL: AD1 8

PIRQD#

PAGE 9,10,11

ISA

EC/KBC

PC87570

PAGE 23

443ZX-100M

BUS#0,DEV#0

IDSEL: AD1 1

HOST-TO-PCI BRIDGE

BUS#0,DEV#1

IDSEL: AD1 2

PCI-TO-PCI BRIDGE

PAGE 4,5,6

IDSEL: AD2 4
MASTER 2
PIRQB#

1394 OHCI

TSB12LV26

PAGE 26

1394 PHY
TSB41LV01

PAGE 27

MEMORY BUSAGP BUS

CARDBUS

PCI1420

PCMCIA
SOCKET

SODIMM

-BANK 2,3
ON BOARD 32/64MB

-BANK 0

PAGE 7,8

IDSEL: AD1 5
MASTER 3
PIRQA#, PIRQB#
SIRQ

IDSEL: AD1 9
MASTER 4
PIRQC#

AUDIO

CS4281-CQ

PAGE 18 PAGE 28

AC LINK

PAGE 19

POWER
INTERFACE

PAGE 25,35

IDSEL: AD27, A D28
MASTER 0, 1
PIRQD#

Mini PCI
Connector

PAGE 29

DC/DC POWER

+2.5V POWER
CPU_IO POWER
+3VALW POWER
+5VALW POWER
+12VALW POWER
CPU_CORE POWER

PAGE 36,37,38,39

TRACK POINT

PS2/KB
INTERFACE

BIOS

EC BUFFER

PAGE 24PAGE 33 PAGE 34

PROPRIETARY NOTE

Switchs &
Connectors

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

140Saturday, December 23, 2000

of

0C

A

B

C

D

E

D10
D11
C7
C8
B9
A9
C10
B11
C12
B13
A14
B12
E12
B16
A13
D13
D15
D12
B14
E14
C13
A19
B17
A18
C17
D17
C18
B19
D18
B20
A20
B21
D19
C21
E18
C20
F19
D20
D21
H18
F18
J18
F21
E20
H19
E21
J20
H21
L18
G20
P18
G21
K18
K21
M18
L21
R19
K19
T20
J21
L20
M19
U18
R18

V20
T21
U21
R21
V18
P21
P20
U19

AA3
T1

AA18
Y20
AB21

AA10
AC9
A6

M3
AA16

R318
110_1%

HD#[0..63]

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

R312 1K

CPUINIT#
FLUSH#
CPURST#

C

1 2

12

C118
10PF

R66
10

HD#[0..63] 4

DBSY# 4
DRDY# 4

CPUINIT# 9
CPURST# 4
HCLK_CPU 4,12

2200PF

+5VS

12

16
15
14
13
12
11
10

R132
1K

D9

RB751V

R133
200

12

+5VS

12

R134
1K

NMI
INTR
IGNNE#
A20M#

SLP#
CPUINIT#
STPCLK#

FLUSH#

IERR#

SMI#

PREQ#

CPURST#

PWRGD_CPU

21

from 87570

SMC 21,23,24
SMD 21,23,24

ATF#

RP26

1 8
2 7
3 6
4 5

8P4R-1.5K

1 2

R100 1.5K

1 2

R102 1K

1 2

R101 680

1 2

R320 1.5K

1 2

R321 1.5K

1 2

R104 270

1 2

R313 1.5K

1 2

R24 56.2_1%

1 2

R112 1.5K

ATF# 24

CPU_IO

+2.5V_CLK

12

C199
.1UF

12

C453

THERMDA
THERMDC

1617VCC

U11

1

NC

2

VCC

3

DXP

4

DXN

5

NC

6

ADD1

7

GND

8 9

GND NC

MAX1617

VR_POK35,39

STBY

SMBCLK

SMBDATA

ALERT

ADD0

NC

NC

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

D

Date: Sheet

240Saturday, December 23, 2000

E

0C

of

IERR#

A20M#
FERR#1.5
IGNNE#
PWRGD_CPU
SMI#

PREQ#
12
12
12
12

INTR

NMI

STPCLK#

SLP#

THERMDA

THERMDC

HA#[3..31]

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

AB2

AA1
AB1

AD9

AA21

W21
W19

AA2

AD10
AC12
AC13

AB10
AC15

AD13
AD14
AA14
AA11
AB20

W20
AA12
AB15

AB18
AC19
AC11
AB12

AA15
AB16

V21

Y21

L3
K3

J2
L4
L1
K5
K1

J1

J3
K4
G1
H1
E4
F1
F4
F2
E1
C4
D3
D1
E2
D5
D4
C3
C1
B3
A3
B2
C2
A4
A5
B4
C5

T2
V4
V2

W3
W5
W2

Y2
E6

C6
U4
T4
R1

V1
Y4
U3

U2
U1

W1

Y1

V5

U44A

A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
RP#

ADS#

AERR#
AP0#
AP1#
BERR#
BINIT#
IERR#

BREQ0#
BPRI#
BNR#
LOCK#

HIT#
HITM#
DEFER#

BP2#
BP3#
BPM0#
BPM1#
TRDY#
RS0#
RS1#
RS2#
RSP#

A20M#
FERR#
IGNNE#
PWRGOOD
SMI#

TDO
TDI
TMS
TRST#
TCK
PREQ#
PRDY#
SELPSB0
SELPSB1

INTR/LINT0
NMI/LINT1
STPCLK#
SLP#

THERMDA
THERMDC

MICRO-PGA

REQUEST
PHASE
SIGNALS

ERROR
SIGNALS

ARBITRATION
PHASE
SIGNALS

SNOOP PHASE
SIGNALS

RESPONSE
PHASE
SIGNALS

PC
COMPATIBILITY
SIGNALS

DIAGNOSTIC
& TEST
SIGNALS

EXECUTION
CONTROL
SIGNALS

THERMAL DIODE

B

COPPERMINE

DATA
PHASE
SIGNALS

PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

DEP0#
DEP1#
DEP2#
DEP3#
DEP4#
DEP5#
DEP6#
DEP7#

DBSY#

DRDY#

PICCLK

PICD1
PICD0

INIT#
FLUSH#
RESET#

BCLK

EDGCTRLN

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#

HA#[3..31]4

R326
1K

R120
10K

1 2

2

Q18
FDV301N

CPU_IO

A

+3VSCPU_IOCPU_IO

13

66MHZ
100MHZ
RESERVED
133MHZ

1 2

HREQ#04
HREQ#14
HREQ#24
HREQ#34
HREQ#44

BREQ0#4

HLOCK#4

DEFER#4

HTRDY#4

IGNNE#9

R80 @56
R322 10K
R323 @10K
R324 1K

STPCLK#9

FERR# 9

ADS#4

BPRI#4

BNR#4

HIT#4

HITM#4

RS#04
RS#14
RS#24

A20M#9

SMI#9

RP64 8P4R-1K

1 8
2 7
3 6
4 5

INTR9

NMI9

4 4

R103

1.5K

1 2

FERR#1.5

3 3

2 2

1 1

SELPSB[1:0] STSEM BUS FREQUENCY

00
01
10
11

A

R307

1 2

1K_1%

12

C150
.1UF

1 2

L9 4.7Uh

VCCTREF

12

+2.5V_CLK+2.5V_CLK

A

R308
2K_1%

1 2

1 2

R60
2K_1%

R53
2K_1%

CPU_IO

CPU_IO

CPU_IO

4 4

3 3

R109

1.5K_1%

1 2

2 2

1 1

R110
1K_1%

1 2

12

C448
.1UF

12

C149
.1UF

+

C415

33U_6.3X2.5

12

C67
.1UF

12

C110
.1UF

VCCT_VCCA

VCCT_VSSA
VCCTREF

12

C69
.1UF

4.7U_0805

CPU_CORE

CLKREF

CMOSREF

R325 1.5K

R316

56.2_1%

1 2

12

U44B

C99
.1UF

L2

VCCA

M2

VSSA

E5

VREF0

E16

12

C51

R111
1K

1 2

VREF1

E17

VREF2

F5

VREF3

F17

VREF4

U5

VREF5

Y17

VREF6

Y18

VREF7

H8

VCC0

H10

VCC1

H12

VCC2

H14

VCC3

H16

VCC4

J7

VCC5

J9

VCC6

J11

VCC7

J13

VCC8

J15

VCC9

K8

VCC10

K10

VCC11

K12

VCC12

K14

VCC13

K16

VCC14

L7

VCC15

L9

VCC16

L11

VCC17

L13

VCC18

L15

VCC19

M8

VCC20

M10

VCC21

M12

VCC22

M14

VCC23

M16

VCC24

N7

VCC25

N9

VCC26

N11

VCC27

N13

VCC28

N15

VCC29

P8

VCC30

P10

VCC31

P12

VCC32

P14

VCC33

P16

VCC34

R7

VCC35

R9

VCC36

R11

VCC37

R13

VCC38

R15

VCC39

T8

VCC40

T10

VCC41

T12

VCC42

T14

VCC43

T16

VCC44

U7

VCC45

U9

VCC46

U11

VCC47

U13

VCC48

U15

VCC49

AB19

RSVD

P2

CLKREF

AA9

CMOSREF1

AD18

CMOSREF2

R2

GHI#

AD19

RTTIMPEDP

AD17

12

TESTHI

Y5

TESTLO1

N5

TESTLO2

AD20

TESTP1

H4

TESTP2

AA17

TESTP3

G4

TESTP4

R70
1K

1 2

MICRO-PGA

B

PLL ANALOG VOLTAGE

COPPERMINE

POWER,
GROUND,
RESERVED
SIGNALS

B

VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8

VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99

VSS100
VSS101

A2
A7
A8
A12
A21
B1
B5
B6
B7
B8
B10
B15
B18
C9
C11
C15
C16
C19
D2
D6
D7
D9
E3
E7
E8
E9
E10
E11
E13
E19
F3
F6
F7
F8
F9
F10
F11
F12
F13
F14
F15
F16
F20
G3
G19
H2
H7
H9
H11
H13
H15
H20
J4
J8
J10
J12
J14
J16
J19
K2
K7
K9
K11
K13
K15
K20
L5
L8
L10
L12
L14
L16
L19
M7
M9
M11
M13
M15
M20
N2
N3
N4
N8
N10
N12
N14
N16
N18
N19
N20
P5
P7
P9
P11
P13
P15
P19
R3
R4
R5
R8
R10

12

C141
.1UF

CPU_CORE

12

C88

.1U

CPU_CORE

12

C121

.1U

CPU_CORE

12

C168

.1U

CPU_CORE

12

C68

.1U

CPU_CORE

12

C34

.1U

CPU_CORE

12

C91

2.2U_0805

CPU_CORE

+

C409
220U_E

6.3V

12

C125

.1UF

12

C147

.1UF

12

12

12

C48

.1U

12

C62

.1U

12

C33

.1U

C89

.1U

C122

.1U

12

C109

.1UF

12

C146

.1UF

12

C108

.1U

12

C123

.1U

12

C195

.1U

12

C59

.1U

12

C80

2.2U_0805

+

C410
220U_E

6.3V

C

12

C90

.1UF

12

C145

.1UF

12

C107

.1U

12

C124

.1U

12

C194

.1U

12

C57

.1U

12

C36

.1U

12

C92

2.2U_0805

C

12

C76
.1UF

12

C85

.1UF

12

12

12

C193

.1U

12

C53

.1U

12

C46

.1U

+

C87

.1U

C50

.1U

C405

220U_E

6.3V

12

C75

.1UF

12

C103

.1UF

12

C86

.1U

12

C49

.1U

12

C169

.1U

12

C38

.1U

12

C173

.1U

12

C416

2.2U_0805

PROPRIETARY NOTE

12

12

C74

C73

.1UF

.1UF

12

12

C144

C119

.1UF

.1UF

12

12

C84

.1U

12

C52

.1U

12

12

C164

C160

.1U

.1U

12

12

C40

C39

.1U

.1U

12

12

C179

C174

.1U

.1U

12

C427

2.2U_0805

+

C411

220U_E

6.3V

C106

.1U

12

C72
.1UF

12

C447

.1UF

+

C451
220U_E

12

C105

.1U

12

C151

.1U

12

C152

.1U

12

C41

.1U

12

C79

2.2U_0805

12

C419

2.2U_0805

+

C452
220U_E

6.3V

G6
G7
G8
G9

H6

J6
K6
L6

M6
N6

P1
P6

R6

T6

U6

V6
V7
V8
V9

Y6
Y7
Y8

U44C

VCCT0
VCCT1
VCCT2
VCCT3
VCCT4
VCCT5
VCCT6
VCCT7
VCCT8
VCCT9
VCCT10
VCCT11
VCCT12
VCCT13
VCCT14
VCCT15
VCCT16
VCCT17
VCCT18
VCCT19
VCCT20
VCCT21
VCCT22
VCCT23
VCCT24
VCCT25
VCCT26
VCCT27
VCCT28
VCCT29
VCCT30
VCCT31
VCCT32
VCCT33
VCCT34
VCCT35
VCCT36
VCCT37
VCCT38
VCCT39
VCCT40
VCCT41
VCCT42
VCCT43
VCCT44
VCCT45
VCCT46
VCCT47
VCCT48
VCCT49
VCCT50
VCCT51
VCCT52
VCCT53
VCCT54
VCCT55
VCCT56
VCCT57
VCCT58
VCCT59
VCCT60
VCCT61
VCCT62
VCCT63
VCCT64
VCCT65
VCCT66
VCCT67
VCCT68
VCCT69
VCCT70
VCCT71

MICRO-PGA

D

COPPERMINE

POWER, GROUND AND NC

VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138

VID4
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147

VID3
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155

VID0

VID1

VID2
VSS159
VSS160
VSS161

NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
NC19
NC20
NC21
NC22
NC23
NC24

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9

R12
R14
R16
R20
T3
T5
T7
T9
T11
T13
T15
T18
T19
U8
U10
U12
U14
U16
U20
V3
V19
W4
W18
Y3
Y9
Y10
Y11
Y12
Y13
Y14
Y15
Y16
Y19
AA4
AA13
AA20
AB3
AB4
AB5
AB9
AB11
AB13
AB14
AB17
AC1
AC2
AC4
AC5
AC10
AC14
AC16
AC18
AC21
AD1
AD2
AD3
AD4
AD5
AD16
AD21

A15
A16
A17
C14
D8
D14
D16
E15
G2
G5
G18
H3
H5
J5
M4
M5
P3
P4
AA5
AA19
AC3
AC17
AC20
AD15

VID[0..4]39

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CPU_IO

12

12

C71

C148

.1UF

.1UF

G10
G11

12

C131

.1UF

12

C450

.1UF

12

C120

.1U

12

C163

.1U

12

C132

.1U

12

C35

.1U

12

C413

2.2U_0805

+

C406
220U_E

6.3V

G12
G13
G14
G15
G16
G17

H17

K17

M17
N17

P17
R17

U17

V10
V11
V12
V13
V14
V15
V16
V17

W10
W11
W12
W13
W14
W15
W16
W17

AA6
AA7
AA8
AB6
AB7
AB8
AC6
AC7
AC8
AD6
AD7
AD8

J17

L17

T17

W6
W7
W8
W9

12

12

C159

.1U

12

C142

.1U

12

C42

.1U

CPU_IO

CPU_IO

C104

.1U

VID4

VID3

VID0
VID1
VID2

E

VID0
VID1
VID2
VID3

VID4

R319 1K

RP65

1 8
2 7
3 6
4 5

8P4R-1K

1 2

VID[0..4]

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

D

Date: Sheet

340Saturday, December 23, 2000

E

+5V

0C

of

1 1

A

2 2

3 3

4 4

HD#[0..63]2

A

2.32K_1%

1 2

.01UF

.1UF

.1UF

B

PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND

TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

R84

12

C435

12

C425

12

C426

1UF_0805

12

RB751V

C418

3.48K_1%
R69

1 2

VCCTREF

+3V

2 1

R35 1K

D3

HD#61

HD#60

C10

HD60#

HD#58

HD#59

C11

D9

HD58#

HD59#

CRESET#

M26

HD#57

HD#56

E11

A9

A7

HD55#

HD56#

HD57#

CPURST#

RS#2

L25

B23

CPURST# 2

RS#2 2

HD#55

HD#54

A10

HD54#

RS#1

L26

RS#1 2

HD#53

B10

HD52#

HD53#

HTRDY#

RS#0

K26

HTRDY# 2

RS#0 2

HD#52

C8

HD51#

H25

HD#51

C12

B7

HD50#

DRDY#

K23

DRDY# 2

HD#50

HD#49

A11

HD49#

DBSY#

L23

DBSY# 2

HD#48

B11

HD47#

HD48#

DEFER#

DEFER# 2

HD#47

A12

HD46#

HITM#

J26

HITM# 2

D11

L22

HD#63

+3V AGPREF

1 2

12

C112

5PF

+5V

1 2

REFVCC5

HD#62

B8A8B9

HD61#

HD62#

HD63#

443ZX-100M

HCLKIN

N23

R68

10

HCLK_CPU 2,12

HD#40

HD#37

HD#36

C14

B13

HD36#

HD37#

HREQ#3

HREQ#4

K25

J25

HREQ#3 2

HREQ#4 2

HD#34

HD#35

D14

D15

HD34#

HD35#

HREQ#1

HREQ#2

J23

K24

HREQ#1 2

HREQ#2 2

HD#32

HD#33

B15

A15

HD31#

HD32#

HD33#

HREQ#0

ADS#

J22

ADS# 2

HREQ#0 2

HD#31

D16

A16

HD30#

K21

HD#29

HD#30

B16

HD29#

HA31#

D23

HA#31

HD#28

C15

HD27#

HD28#

HA29#

HA30#

E22

HA#30

HD#27

C16

A17

HD26#

HA28#

C24

A23

HA#29

HD#25

HD#26

B17

HD25#

HA27#

B24

HA#27

HA#28

HD#24

D17

HD23#

HD24#

HA25#

HA26#

C23

HA#26

HD#23

E17

HD22#

HA24#

D24

HA#25

HD#22

C17

HD21#

HA23#

A24

HA#24

HD#21

B18

HD20#

HA22#

C25

HA#23

HD#20

A19

HD19#

HA21#

A25

HA#22

HD#42

HD#45

HD#46

E13

HD45#

HIT#

L24

HIT# 2

C13

HD44#

HD#38

HD#39

HD#43

HD#44

HD#41

D13

D12

E14

A13

B12

B14

HD38#

HD39#

HD40#

HD41#

HD42#

HD43#

HOST BUS INTERFACE (Processor System
Bus)

HLOCK#

BREQ0#

BPRI#

BNR#

B26

H26

H24

K22

BNR# 2

BPRI# 2

HLOCK# 2

BREQ0# 2

HD#19

A18

HD18#

HA20#

C26

HA#21

HD#18

C19

B19

HD17#

HA19#

D26

B25

HA#20

HD#16

HD#17

D18

HD16#

HA18#

D25

HA#18

HA#19

D19

HD15#

HA17#

E25

HD#14

HD#15

D20

HD14#

HA16#

E26

HA#16

HA#17

HD#13

E18

HD12#

HD13#

HA14#

HA15#

E23

HA#15

HD#12

E19

B20

HD11#

HA13#

F24

F25

HA#14

HD#11

HD#10

A20

HD9#

HD10#

HA11#

HA12#

F23

HA#12

HA#13

4.7U_0805

HD#9

B21

E20

HD8#

HA10#

G22

F22

HA#11

220U_E

C431

HD#7

HD#8

C20

HD7#

HA9#

G26

HA#9

HA#10

+

C414

12

HD#6

A21

HD6#

HA8#

F26

HA#8

HD#5

C21

HD5#

HA7#

G24

HA#7

D21

HD4#

HA6#

H23

HD#4

HD3#

HA5#

HA#6

HD#3

A22

G23

HA#5

+3V

HD#2

E21

HD2#

HA4#

H22

HA#4

HD#1

D22

HD1#

HA3#

G25

HA#3

HD#0

B22

HD0#

HD#[0..63]

U8A

B

HA#[3..31]

HA#[3..31] 2

C

VSS64

AF13

VSS63

AF1

AD22

VSS61

VSS62

AD18

VSS60

AD9

SUS_STAT#10,14

AD4

SUSTAT#

VSS58

VSS59

AB25

AD5

+3V

R72 1K

1 2

M25

TESTIN#

VSS57

AB15

AB24

VSS55

VSS56

AB12

AB3

.1UF

.1UF

AE23

NC1

NC2

VSS53

VSS54

AA21

AE22

NC0

VSS52

AA19

C420

C434

P22

AA8

AGPREF

12

12

AGPREF

VSS50

VSS51

AA6

N4

VSS49

REFVCC5

F17

C2

VTTB

REFVCC5

VSS46

VSS47

VSS48

T15V3V24W6W21

CPU_IO

M24

VTTA

VSS44

VSS45

R22

T12

VCCTREF

M23

E16

VCC40

GTL_REFA

GTL_REFB

VSS40

VSS41

VSS42

VSS43

R13

R14

R16

AF14

VCC39

VSS39

AF2

AE26

VCC37

VCC38

VSS37

VSS38

P26R5R11

AE1

VCC36

VSS36

P15

AA20

VCC35

VSS35

P14

AA18

P13

AA9

VCC33

VCC34

VSS33

VSS34

P12

12

.1UF

C433

12

.1UF

C439

12

.1UF

C429

12

.1UF

C436

12

.1UF

C432

12

.1UF

C438

12

.01UF

C430

12

.01UF

C437

AA7

VCC32

VCC30

VCC31

V21Y6Y21

T16

V6

VCC28

VCC29

T13

T14

VCC26

VCC27

T11

VCC24

VCC25

R15

VCC23

POWER and GROUND

VSS23

VSS24

VSS25

VSS26

VSS27

VSS28

VSS29

VSS30

VSS31

VSS32

M13

M14

M16

M22N1N12

N13

N14

N15

N24

R12

P11

P16

VCC21

VCC22

VSS21

VSS22

L15M5M11

.1UF

.1UF

.01UF

P1

VCC20

VSS20

L12

12

C443

12

C441

12

C442

N26

VCC18

VCC19

VSS18

VSS19

N22

N11

N16

VCC16

VCC17

VSS16

VSS17

M12

M15

VCC14

VCC15

VSS14

VSS15

F19

F21H6H21J3J24

L16

VCC12

VCC13

VSS12

VSS13

L14

L11

L13

VCC10

VCC11

VSS10

VSS11

E15

E24F6F8

.1UF

.1UF

.1UF

.1UF

.01UF

.01UF

.01UF

.01UF

J21

VCC9

VSS9

C446

C440

C444

C445

C422

C421

C424

C423

J6

VCC8

VSS8

12

12

12

12

12

12

12

12

G21

VCC7

VSS7

C22E3E12

G6

VCC6

VSS6

C18

F20

VCC5

VSS5

F18

VCC4

VSS4

F9

VCC3

VSS3

A26C5C9

F7

VCC2

VSS2

A14

B1

VCC1

VSS1

A1

U8D

D

+3V

RSMRST#10,35

R135 0

1 2

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

B

BXPWROKRSMRST#

443ZX-100M

4011720CSCHEMATIC, M/B LA-854

VSS65

VSS66BXPWROK

AF26AF3

E

440Saturday, December 23, 2000

of

E

A

GFRAME#
GIRDY#
GTRDY#
GDEVSEL#

GSTOP#

SBA[0..7]
GREQ#

GGNT#
RBF#
PIPE#
AD_STBA

AD_STBB
SBSTB

ST0
ST1
ST2

1 2

R87

GAD[0..31]

R99 0

18

GAD[0..31]14 AD[0..31] 9,18,26,28,29

GTRDY#

1 2

GIRDY#

1 2

GDEVSEL#

4 4

3 3

GPAR14

2 2

GSTOP#
AD_STBA
AD_STBB
GFRAME#
GREQ#
GGNT#
SBSTB
RBF#
PIPE#

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

8.2K

R315
R310 8.2K

8.2K

R314
R97 8.2K

8.2K

R105
R309 8.2K

R91 8.2K
R57 8.2K
R61 8.2K
R78 8.2K

8.2K

R86

8.2K

R83

R93

100K

1 2

GCLKO14

+3V

GC/BE#014
GC/BE#114
GC/BE#214
GC/BE#314

GFRAME#14

GIRDY#14

GTRDY#14

GDEVSEL#14

GSTOP#14

SBA[0..7]14

GREQ#14
GGNT#14

PIPE#14

AD_STBA14
AD_STBB14

SBSTB14

R92 18

RBF#14

ST014
ST114
ST214

1 2

GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31

SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7

1 2
1 2

R311 0

AGPCLKI
AGPCLKO

B

1 2
12

C428

15PF

R306

47

AB5
AE2
AD3
AD2
AD1
AC3
AC1
AB4
AB1
AA5
AA3
AA4
AA2
AA1

AB2

AC2

W1
W2

U5
U4

U3
U1

U6
R3
R4
R2

U2
W3

W4
W5

M2
M1
N2

R1

M4
M3

N3

N5

Y5
Y3

V2

V1

T3
T4
T2
T1

Y4
V4

V5

Y2
Y1
K1

P2
P4
P3

L5
L3

T5

L4
L2
L1

P5

U8C

G_AD0
G_AD1
G_AD2
G_AD3
G_AD4
G_AD5
G_AD6
G_AD7
G_AD8
G_AD9
G_AD10
G_AD11
G_AD12
G_AD13
G_AD14
G_AD15
G_AD16
G_AD17
G_AD18
G_AD19
G_AD20
G_AD21
G_AD22
G_AD23
G_AD24
G_AD25
G_AD26
G_AD27
G_AD28
G_AD29
G_AD30
G_AD31

G_CBE0#
G_CBE1#
G_CBE2#
G_CBE3#

G_FRAME#
G_IRDY#
G_TRDY#
G_DEVSEL#
G_PAR
G_STOP
SBA0

SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7

G_REQ#
G_GNT#

RBF#
PIPE#
AD_STBA

AD_STBB
SB_STB

ST0
ST1
ST2

GCLKIN
GCLKO

443ZX-100M

AGP INTERFACE

PCI INTERFACE

FRAME#

TRDY#

DEVSEL#

STOP#

SERR#
PLOCK#
PHOLD#

PHLDA#

PREQ0#
PREQ1#
PREQ2#
PREQ3#
PREQ4#

PGNT0#
PGNT1#
PGNT2#
PGNT3#
PGNT4#

PCIRST

CLKRUN#

PCLKIN

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8

AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

CBE0#
CBE1#
CBE2#
CBE3#

IRDY#

PAR

WSC#

K6
K2
K4
K3
K5
J1
J2
H2
H1
J5
H3
H5
H4
G1
G2
G4
D1
D3
D2
C1
A2
C3
B3
D4
E5
A4
D5
B4
B5
A5
E6
C6

J4
G3
E4
C4

E2
E1
F5
F3
G5
F4
F1
F2
B6

D6
AE3
A6

C7
F10
D8
D10

E7
D7
E10
E8
E9

A3
AC4
B2

AD[0..31]
AD0

AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

FRAME#
IRDY#
TRDY#
DEVSEL#

STOP#
SERR#

REQ#0
REQ#1
REQ#2
REQ#3
REQ#4

GNT#0
GNT#1
GNT#2
GNT#3
GNT#4

C

CLKRUN#

R305

1 2

12

C417

15PF

D

REQ#0
GNT#0
REQ#1
GNT#1

C/BE#0 9,18,26,28,29
C/BE#1 9,18,26,28,29
C/BE#2 9,18,26,28,29
C/BE#3 9,18,26,28,29

FRAME# 9,13,18,26,28,29
IRDY# 9,13,18,26,28,29
TRDY# 9,13,18,26,28,29
DEVSEL# 9,13,18,26,28,29
PAR 9,13,18,26,28,29
STOP# 9,13,18,26,28,29
SERR# 9,13,18,26,29
PLOCK# 13
PHLD# 9,13

PHLDA# 9,13

REQ#0 10,29
REQ#1 10,29
REQ#2 10,26
REQ#3 10,18
REQ#4 10,28

GNT#0 29
GNT#1 29
GNT#2 26
GNT#3 18
GNT#4 28

PCIRST# 9,18,19,26,28,29
CLKRUN# 9,13,18,26,28,29,30
PCLK_BX 12

47

+3VS

REQ#0
REQ#1
REQ#2
REQ#3
REQ#4

RP63

6
7
8
9

10

10P8R-10K

REQ#4

1 2

R303 10K

GNT#4

1 2

R302 10K

PCI REQ ASSIGME NT

LAN
MODEM
1394

PCMCIA CONTROLLER

PCI AUDIO

5

REQ#2

4

GNT#2

3

REQ#3

2

GNT#3

1

+3VS

E

+3VS

1 1

Compal Electronics, Inc.

Title

PROPRIETARY NOTE

A

B

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

540Saturday, December 23, 2000

E

of

0C

A

B

C

D

E

MD[0..63]

U8B

MMA0
MMA1
MMA2
MMA3
MMA4
MMA5
MMA6
MMA7
MMA8
MMA9
MMA10
MMA11
MMA12
MMA13

MMA[0..13]

AB14
AF15
AE15
AC15
AD15
AE16

AD13
AC13
AC25
AB26
AE14
AC14
AA22
AA24

AE13
AD14

AE12
AC12

AF16
AA17

AF12
AB13

AE11
AA10
AA23
AA26
AF11
AD12
AA25

AC22
AF23
AE24
AD23
AC23
AF24

AF17
AB16
AE17
AC17
AF18
AE19
AF19
AC18
AC19
AE20
AD20
AF21
AC21
AF25

AD16
AC16
AD17
AB17
AE18
AD19
AB18
AB19
AF20
AC20
AB20
AE21
AD21
AF22

Y22

CSA0#/RASA0#
CSA#1/RASA1#
CSA2#/RASA2#
CSA3#/RASA3#
NC30
NC31

DQMA0/CASA0#
DQMA1/CASA1#
DQMA2/CASA2#
DQMA3/CASA3#
DQMA4/CASA4#
DQMA5/CASA5#
DQMA6/CASA6#
DQMA7/CASA7#

NC3
NC4

WEA#
NC5

SRASA#
SRASB#

SCASA#
SCASB#

NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13

CKE0
CKE1
CKE2
CKE3
NC14
NC15

NC16
NC17
NC18
NC19
NC20
NC21
NC22
NC23
NC24
NC25
NC26
NC27
NC28
NC29

MAB0#
MAB1#
MAB2#
MAB3#
MAB4#
MAB5#
MAB6#
MAB7#
MAB8#
MAB9#
MAB10#
MAB11#
MAB12#
MAB13#

443ZX-100M

DRAM INTERFACE

4 4

3 3

2 2

RRAS#07
RRAS#28

RRAS#38

RCAS#07,8
RCAS#17,8
RCAS#27,8
RCAS#37,8
RCAS#47,8
RCAS#57,8
RCAS#67,8
RCAS#77,8

RMWEA#7,8

SRASA#7,8

SCASA#7,8

CKE07
CKE28

CKE38

MMA[0..13]7,8

NC32
NC33
NC34
NC35
NC36
NC37

MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MD8

MD9
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63

DCLKO

DCLKRD

DCLKWR

AE25
AD24
AD26
AC24
AC26
AB23

AF4
AE4
AF5
AD6
AE6
AB7
AC7
AF7
AB8
AB9
AC9
AE9
AB10
AC10
AF10
AD11
Y24
Y25
W23
W24
W26
W25
V26
U24
U23
T22
T23
T26
R24
R25
P23
N25
AC5
AE5
AB6
AC6
AF6
AD7
AE7
AC8
AD8
AF8
AE8
AF9
AD10
AE10
AB11
AC11
Y23
Y26
W22
V22
V23
V25
U22
U25
U26
T24
T25
U21
R23
R26
P24
P25

AB21
AB22
AD25

MDD0
MDD1
MDD2
MDD3
MDD4
MDD5
MDD6
MDD7
MDD8
MDD9
MDD10
MDD11
MDD12
MDD13
MDD14
MDD15
MDD16
MDD17
MDD18
MDD19
MDD20
MDD21
MDD22
MDD23
MDD24
MDD25
MDD26
MDD27
MDD28
MDD29
MDD30
MDD31
MDD32
MDD33
MDD34
MDD35
MDD36
MDD37
MDD38
MDD39
MDD40
MDD41
MDD42
MDD43
MDD44
MDD45
MDD46
MDD47
MDD48
MDD49
MDD50
MDD51
MDD52
MDD53
MDD54
MDD55
MDD56
MDD57
MDD58
MDD59
MDD60
MDD61
MDD62
MDD63

DCLKO1

1 2

R138 33

1 2

12

MDD3
MDD35
MDD34
MDD2
MDD33
MDD32
MDD0
MDD1

RP32 16P8R-10
MDD46
MDD47
MDD15
MDD12
MDD13
MDD44
MDD45
MDD14

RP35 16P8R-10
MDD24 MD24
MDD54
MDD59 MD59
MDD22
MDD53
MDD52
MDD51
MDD20

RP27 16P8R-10
MDD27
MDD58
MDD57
MDD26
MDD25
MDD56
MDD55
MDD23

RP22 16P8R-10
MDD8
MDD7
MDD38
MDD37
MDD6
MDD5
MDD36
MDD4

RP33 16P8R-10
MDD9
MDD10
MDD11
MDD43
MDD39
MDD40
MDD42
MDD41

RP34 16P8R-10
MDD21
MDD19
MDD18
MDD50
MDD49 MD49
MDD17
MDD16
MDD48

RP31 16P8R-10
MDD31
MDD63
MDD62
MDD30
MDD61
MDD29
MDD28
MDD60

RP20 16P8R-10

R131

@47

C204
@15PF

1
2
3
4
5
6
7
8 9

1
2
3
4
5
6
7
8 9

1
2
3
4
5
6
7
8 9

1
2
3
4
5
6
7
8 9

1
2
3
4
5
6
7
8 9

1
2
3
4
5
6
7
8 9

1
2
3
4
5
6
7
8 9

1
2
3
4
5
6
7
8 9

DCLKO 12
DCLKWR 12

MD3

16

MD35

15

MD34

14

MD2

13

MD33

12

MD32

11

MD0

10

MD1
MD46

16

MD47

15

MD15

14

MD12

13

MD13

12

MD44

11

MD45

10

MD14

16

MD54

15
14

MD22

13

MD53

12

MD52

11

MD51

10

MD20
MD27

16

MD58

15

MD57

14

MD26

13

MD25

12

MD56

11

MD55

10

MD23
MD8

16

MD7

15

MD38

14

MD37

13

MD6

12

MD5

11

MD36

10

MD4
MD9

16

MD10

15

MD11

14

MD43

13

MD39

12

MD40

11

MD42

10

MD41
MD21

16

MD19

15

MD18

14

MD50

13
12

MD17

11

MD16

10

MD48
MD31

16

MD63

15

MD62

14

MD30

13

MD61

12

MD29

11

MD28

10

MD60

MD[0..63] 7,8

MMA12

R146 10K

MMA10
MMA6

Pin Name Function Low High Interal Resistor

MAB12#

Host Frequency Select

MAB10#

Quick Start Select

MAB6#

Host Bus Buffer Mode Select

1 2

R137 10K

1 2

R317 10K

1 2

66MHz

Stop Clock Mode

Desktop GTL+

+3V

100MHz

Quick Start Mode
Mobile Low Power

GTL+

Pull-down

Pull-down

Pull-down none

Status Register

NBXCFG[13]

PMCR[3]

1 1

Compal Electronics, Inc.

Title

PROPRIETARY NOTE

A

B

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

640Saturday, December 23, 2000

E

of

0C

A

+3V

VSSQ

DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15DQML

CKE

CLK

RVD

RVD

U48

4
5
7
8
10
11
13
42
44
45
47
48
50
51
5315

37
38
36
40

4MX16S

MD11 MMA1 0 MD42
MD13 MMA1 2 MD44

MD14

RMWEA#6,8

SCASA#6,8
SRASA#6,8
RRAS#06

MMA0 MD0
MMA1 MD1 MMA0 MD32
MMA2 MD2 MMA1 MD33
MMA3 MD3 MMA2 MD34
MMA4 MD4 MMA3 MD35
MMA5 MD5 MMA4 MD36

1 1

MMA6 MD6 MMA5 MD37
MMA7 MD7 MMA6 MD38
MMA8 MD8 MMA7 MD39
MMA9 MD9 MMA8 MD40
MMA10 MD10 MMA9 MD41
MMA13
MMA12 MD12
MMA11

RCAS#0 MD15 MD46
RCAS#1 RCAS#4 MD47
RMWEA# CKE0 RCAS#5
SCASA# CLK_SDRAM0 RMWEA# CKE0
SRASA# SCASA# CLK_SDRAM0
RRAS#0 SRASA#

2 2

11427394349

23 2

A0 DQ0

24

A1

VCC

VCC
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BA1
A13/BA0

DQMH
WE#
CAS#
RAS#
CS#

VCC

VCCQ

VCCQ

VCCQ

VSS

VSS

VSS

VSSQ

VSSQ

2841546124652

MMA[0..13]

MD[0..63]

RCAS#[0..7]

VCCQ

VSSQ

25
26
29
30
31
32
33
34
22
35
21
20

39
16
17
18
19

MMA[0..13]6,8

MD[0..63]6,8

RCAS#[0..7]6,8

B

C

+3V

D

32/64MB

VSSQ

DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15DQML

CKE

CLK
RVD
RVD

U47

4
5
7
8
10
11
13
42
44
45
47
48
50
51
5315

37
38
36
40

4MX16S

MD43
MD45

MMA13
MMA11

SRASA#
RRAS#0

SDRAM

+3V

11427394349

23 2

A0 DQ0

24

A1

VCC

VCC
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BA1
A13/BA0

DQMH
WE#
CAS#
RAS#
CS#

VCC

VCCQ

VCCQ

VCCQ

VSS

VSS

VSS

VSSQ

VSSQ

2841546124652

VCCQ

VSSQ

25
26
29
30
31
32
33
34
22
35
21
20

39
16
17
18
19

VSSQ

DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15DQML

CKE

CLK

RVD

RVD

U45

4
5
7
8
10
11
13
42
44
45
47
48
50
51
5315

37
38
36
40

4MX16S

BANK0

MMA13
MMA11

CKE0 6
CLK_SDRAM0 12

VCCQ

VSSQ

VSSQ

DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15DQML

CKE

CLK

RVD
RVD

RRAS#0

U46

4
5
7
8
10
11
13
42
44
45
47
48
50
51
5315

37
38
36
40

4MX16S

R213
@10

C289
@15PF

MMA0 MD16
MMA1 MD17
MMA2 MD18 MMA0 MD48
MMA3 MD19 MMA1 MD49
MMA4 MD20 MMA2 MD50
MMA5 MD21 MMA3 MD51
MMA6 MD22 MMA4 MD52
MMA7 MD23 MMA5 MD53
MMA8 MD24 MMA6 MD54
MMA9 MD25 MMA7 MD55
MMA10 MD26 MMA8 MD56
MMA13
MMA12 MD28 MMA10 MD58
MMA11

RCAS#2 MD31
RCAS#3 MD62
RMWEA# CKE0 RCAS#6 MD63
SCASA# CLK_SDRAM0 RCAS#7
SRASA# RMWEA# CKE0
RRAS#0 SCASA# CLK_SDRAM0

+3V

11427394349

23 2

A0 DQ0

24

A1

VCC

VCC
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BA1
A13/BA0

DQMH
WE#
CAS#
RAS#
CS#

VCC

VCCQ

VCCQ

VCCQ

VSS

VSS

VSS

VSSQ

VSSQ

2841546124652

25
26
29
30
31
32
33
34
22
35
21
20

39
16
17
18
19

11427394349

23 2

A0 DQ0

24

A1

VCC

VCC
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BA1
A13/BA0

DQMH
WE#
CAS#
RAS#
CS#

VCC

VCCQ

VCCQ

VCCQ

VSS

VSS

VSS

VSSQ

VSSQ

2841546124652

VCCQ

VSSQ

25
26
29
30
31
32
33
34
22
35
21
20

39
16
17
18
19

MD27 MMA9 MD57
MD29

MD30 MMA12 MD60

E

MD59
MD61

3 3

C305
.1UF

C296
1000PF

+3V

+3V

C331
.1UF

C350
1000PF

+3V

12

C332
.1UF

+3V

C293

C216
.1UF

4 4

C381
1000PF

C217
.1UF

C510
1000PF

C253
.1UF

C511
1000PF

C254
.1UF

+3V

C351
1000PF

.1UF

C263
1000PF

C294
.1UF

C264
1000PF

Compal Electronics, Inc.

Title

PROPRIETARY NOTE

A

B

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

740Saturday, December 23, 2000

E

of

0C

A

SO-DIM 144 PINS

B

C

D

E

RAM MODULE CONN.

C483

22PF

MMA[0..13]

MD[0..63]

RCAS#[0..7]

RRAS#[0..3]

MD0
MD1
MD2
MD3

MD4
MD5
MD6
MD7

RCAS#0
RCAS#4

MMA0 MMA3
MMA1 MMA4
MMA2 MMA5

MD32
MD33
MD34
MD35

MD36
MD37
MD38
MD39

R348

33

RMWEA# CKE3
RRAS#2 MMA12
RRAS#3 MMA13

MD16
MD17
MD18
MD19

MD20
MD21
MD22
MD23

MMA6 MMA7
MMA8

MMA9 MMA12
MMA10

RCAS#2
RCAS#6

MD48
MD49
MD50

+3V +3V

MD51

MD52
R148
10K

MD53

MD54

MD55

MMA[0..13]6,7

1 1

2 2

3 3

4 4

MD[0..63]6,7

RCAS#[0..7]6,7

RRAS#[0..3]6,7

CLK_SDRAM212

SRASA#6,7

RMWEA#6,7

BANK2/3

+3V +3V

JP19
1
3
5
7
9

11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59

61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97

99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143

VSS
DQ0
DQ1
DQ2
DQ3
VCC
DQ4
DQ5
DQ6
DQ7
VSS
CE0#
CE1#
VCC
A0
A1
A2
VSS
DQ8
DQ9
DQ10
DQ11
VCC
DQ12
DQ13
DQ14
DQ15
VSS
RESVD/DQ64
RESVD/DQ65

RFU/CLK0
VCC
RFU
WE#
RE0#
RE1#
OE#/RESVD
VSS
RESVD/DQ66
RESVD/DQ67
VCC
DQ16
DQ17
DQ18
DQ19
VSS
DQ20
DQ21
DQ22
DQ23
VCC
A6
A8
VSS
A9
A10
VCC
CE2#/RESVD
CE3#/RESVD
VSS
DQ24
DQ25
DQ26
DQ27
VCC
DQ28
DQ29
DQ30
DQ31
VSS
SDA
VCC

SO-DIMM144

RESVD/DQ68
RESVD/DQ69

RESVD/DQ70
RESVD/DQ71

CE6#/RESVD
CE7#/RESVD

VSS
DQ32
DQ33
DQ34
DQ35

VCC
DQ36
DQ37
DQ38
DQ39

VSS
CE4#
CE5#

VCC

VSS
DQ40
DQ41
DQ42
DQ43

VCC
DQ44
DQ45
DQ46
DQ47

VSS

RFU/CKE0

VCC

RFU

RFU/CKE1

RFU

RFU

RFU/CLK1

VSS

VCC
DQ48
DQ49
DQ50
DQ51

VSS
DQ52
DQ53
DQ54
DQ55

VCC

A11/BA0

VSS

A12/BA1
A13/A11

VCC

VSS
DQ56
DQ57
DQ58
DQ59

VCC
DQ60
DQ61
DQ62
DQ63

VSS
SCL

VCC

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

A3

32

A4

34

A5

36
38
40
42
44
46
48
50
52
54
56
58
60

62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104

A7

106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144

MD8
MD9
MD10
MD11

MD12
MD13
MD14
MD15

RCAS#1
RCAS#5

MD40
MD41
MD42
MD43

MD44
MD45
MD46
MD47

CKE2

MD24
MD25
MD26
MD27

MD28
MD29
MD30
MD31

MMA11

MMA13
RCAS#3

RCAS#7
MD56

MD57
MD58
MD59

MD60
MD61
MD62
MD63

SCKP4SDAP4

CKE2 6
SCASA# 6,7

CKE3 6

R341
33

C472
22PF

R130
10K

CLK_SDRAM3 12

SCKP4 11,12SDAP411,12

+

C212
10UF_1206

6.3V

+3V

+

C509
10UF_1206

6.3V

C454
.1UF

C495
.01UF

C460
.1UF

+3V

1000PF

C505

C465
.1UF

C508

1000PF

C470
.1UF

1000PF

C208

C479
.01UF

1000PF

C219

C361
.01UF

C497
.01UF

DIMM1

Compal Electronics, Inc.

Title

PROPRIETARY NOTE

A

B

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

840Saturday, December 23, 2000

E

of

0C

1

2

3

4

5

6

7

8

SA[0..19]

U11
T11
W11
Y11
T10
W10
U9
V9
Y9
T8
W8
U7
V7
Y7
V6
Y6
T5
W5
U4
V4

V3
W3
U2
T2
W2
Y2
T1
V1
W16
T16
Y17
V17
Y18
W18
Y19
W19

Y5
T4
V15
U15
W4
U3
V12
Y12
T3
Y1
U10
W12
Y4
W7
Y3
W1

M2
K1
N4
L4
N5
L1
K2
M4
M3
P1

H20
J20
T9
W9
U8
V8
Y8
Y20
U1
U12
W13
T13
V14
Y14

J19
R3

R4
P5
G1

SD[0..15]

SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
SA10
SA11
SA12
SA13
SA14
SA15
SA16
SA17
SA18
SA19

SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7
SD8
SD9
SD10
SD11
SD12
SD13
SD14
SD15

R121 1K

FQS0

R73 10K

IRQ0
IRQ1
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7

IRQ8#

IRQ9
IRQ10
IRQ11
IRQ12
IRQ14
IRQ15

1 2
1 2

U12A

PCI

CLOCK

CPU

MISC

PIIX4

1of3

324 mBGA

ISA

X-BUS

IRQs

SA10
SA11
SA12
SA13
SA14
SA15
SA16
SA17
SA18
SA19

SD10
SD11
SD12
SD13
SD14
SD15

IOR#

IOW#
MEMR#
MEMW#

SMEMR#

SMEMW#

IOCS16#

MEMCS16#

IOCHRDY

IOCHK#/GPI_0

BALE

SBHE#

AEN

REFRESH#

ZEROWS#

RSTDRV
BIOSCS#

KBCCS#/GPO_26

MCCS#

PCS0#

PCS1#
RTCALE/GPO_25
RTCCS#/GPO_24

XOE#/GPO_23

XDIR#/GPO_22

A20GATE

IRQ0/GPO_14

IRQ1
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7

IRQ8#/GPI_6

IRQ9
IRQ10
IRQ11
IRQ12
IRQ14
IRQ15

SERIRQ/GPI_7

PIRQA#
PIRQB#
PIRQC#
PIRQD#

5

SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9

SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7
SD8
SD9

B10

AD0

A10

AD1

D9

AD2

C9

AD3

B9

AD4

A9

AD5

D8

AD6

E8

AD7

B8

AD8

A8

AD9

D7

AD10

C7

AD11

B7

AD12

A7

AD13

D6

AD14

E6

AD15

E4

AD16

C4

AD17

B4

AD18

A4

AD19

D3

AD20

E3

AD21

C3

AD22

B3

AD23

E2

AD24

C2

AD25

B2

AD26

A2

AD27

D1

AD28

E1

AD29

C1

AD30

B1

AD31

C8

C/BE0#

C6

C/BE1#

D4

C/BE2#

D2

C/BE3#

A5

FRAME#

B5

IRDY#

C5

TRDY#

D5

STOP#

E5

DEVSEL#

A6

SERR#

B6

PAR

A3

IDSEL

B12

PHOLD#

A12

PHLDA#

C10

CLKRUN#

A1

PCIRST#

D11

PCICLK

L3

CLK48

V11

OSC

P17

SUSCLK

T7

SYSCLK

N19

RTCX1#

R20

RTCX2#

M19

CPURST

L18

INIT

N20

RCIN#

L19

INTR

L20

NMI

P20

SMI#

J18

STPCLK#

K20

SLP#

L17

IGNNE#

K19

FERR#

M20

A20M#

R17

CONFIG1

R18

CONFIG2

M18

PWROK

V18

TEST#

K17

SPKR

PIIX4M

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

C/BE#05,18,26,28,29
C/BE#15,18,26,28,29
C/BE#25,18,26,28,29
C/BE#35,18,26,28,29

FRAME#5,13,18,26,28,29

IRDY#5,13,18,26,28,29
TRDY#5,13,18,26,28,29
STOP#5,13,18,26,28,29

DEVSEL#5,13,18,26,28,29

SERR#5,13,18,26,29

PAR5,13,18,26,28,29

PHLD#5,13

PHLDA#5,13

CLKRUN#5,13,18,26,28,29,30

PCIRST#5,18,19,26,28,29

RTCX1
RTCX2

100KR171

AD[0..31]

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

PROPRIETARY NOTE

AD[0..31]5,18,26,28,29

A A

B B

AD18

1 2

R76

100

PCLK_PIIX412

48M12

14MOSC12

C C

D D

RTCX2 RTCX1

12

1

1 2

R179 @1M

C246
22PF

X3

R115

33

1 2

C188

22P

1 2

32.768KHZ

12

R75

C135

22

10P

C247
22PF

R116

33

1 2

1 2

C189

22P

1 2

1 2

2

RTCCLK18,19

CPUINIT#2

RC#23

INTR2

NMI2

SMI#2

STPCLK#2

PX4_SLP#13

IGNNE#2

FERR#2

A20M#2

1 2

+3V

1 2

R147 100K

SPWROFF#23,35

1 2

+3V

R142 10K

SPKR34

3

SA[0..19] 13,23,30
SD[0..15] 13,23,30

IOR# 13,23,30
IOW# 13,23,30
MEMR# 13,23
MEMW# 13,23

IOCS16# 13
IOCHRDY 13,23,30

SBHE# 13
AEN 23,30
REFRESH# 13
ZWS# 13
RSTDRV 22,30

BIOSCS# 23

GATEA20 23

IRQ8# 13

SIRQ 13,18,30
PIRQA# 13,14,18

PIRQB# 13,18,26,29
PIRQC# 13,28
PIRQD# 13,29

6

+3VS
+3VS

IRQ[0..15]

IRQ[0..15] 13,20,21,23

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

7

940Saturday, December 23, 2000

8

0C

of

1

2

3

4

5

6

7

8

3 6

4 5

CP8
8P4C-33PF

RP12

4 5
3 6
2 7
1 8

8P4R-33

DMA

APIC

Power Mgmt

USB

182736

PIIX4

2of3

324 mBGA

USB1_D+
USB1_D-

45

RP13

8P4R-15K

IDE Bus

5

USB1_D+ 32
USB1_D- 32
USB0_D+ 32
USB0_D- 32

USB TRACE ROUTING 6 MILUSB Host Termination should be close to PIIX4

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8

PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

SDDO

SDD1

SDD2

SDD3

SDD4

SDD5

SDD6

SDD7

SDD8

SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

PDIOR#
PDIOW#
PIORDY

PDDREQ

PDDACK#

PDCS1#
PDCS3#

PDA0
PDA1
PDA2

SDIOR#
SDIOW#
SIORDY

SDDREQ

SDDACK#

SDCS1#
SDCS3#

SDA0
SDA1
SDA2

NC1
NC2
NC3

F20
E18
E20
D18
D20
C20
B20
A20
A19
B19
C19
D19
D17
E19
E17
F19

E15
B15
D14
C14
A14
C13
A13
C12
D12
B13
D13
B14
E14
A15
C15
D15

F17
F16
G20
F18
G19
H17
H16
G16
G18
G17

C16
B16
D16
A16
A17
B18
C18
C17
B17
A18

J4
N18
N3

PDD[0..15]
SDD[0..15]

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

PDD[0..15] 20
SDD[0..15] 20

PDIOR# 20
PDIOW# 20
PDIORDY 20
PDDREQ 20
PDDACK# 20
PDCS1# 20
PDCS3# 20
PDA0 20
PDA1 20
PDA2 20

SDIOR# 20
SDIOW# 20
SDIORDY 21
SDDREQ 21
SDDACK# 20
SDCS1# 20
SDCS3# 20
SDA0 20
SDA1 20
SDA2 20

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

6

Date: Sheet

7

10 40Saturday, December 23, 2000

8

0C

of

USBP1+
USBP1­USBP0+ USB0_D+
USBP0- USB0_D-

A A

1 8

2 7

REQA#
REQB#
REQC#

PROPRIETARY NOTE

DRQ[0..7]
DACK#[0..3]

DRQ0
DRQ1
DRQ2
DRQ3
DRQ5
DRQ6
DRQ7

DACK#0
DACK#1
DACK#2
DACK#3

ACIN_SYS#

PX4_RI#
PBTN#

PX4_REQ#1
PX4_REQ#2

OVCUR#0
OVCUR#1

USBP1+
USBP1­USBP0+
USBP0-

U12B

W15

DREQ0#

U6

DREQ1#

V2

DREQ2#

U5

DREQ3#

Y16

DREQ5#

U16

DREQ6#

U17

DREQ7#

U14

DACK0#

W6

DACK1#

Y10

DACK2#

V5

DACK3#

T15

DACK5#

V16

DACK6#

W17

DACK7#

V10

TC

M1

REQA#/GPI_2

N2

REQB#/GPI_3

P3

REQC#/GPI_4

N1

GNTA#/GPO_9

P2

GNTB#/GPO_10

P4

GNTC#/GPO_11

J17

APICACK#/GPO_12

H18

APICCS#/GPO_13

K18

APICREQ#/GPI_5

V20

EXTSMI#

U19

BATLOW#/GPI_9

R1

CPU_STP#/GPO_17

R2

PCI_STP#/GPO_18

H19

THRM#/GPI_8

P16

LID/GPI_10

P18

RIA_B/GPI_12

M17

RSMRST#

U20

PWRBTN#

W20

SUSA#

V19

SUSB#/GPO_15

U18

SUSC#/GPO_16

T17

SUS_ST1#/GPO_20

T18

SUS_ST2#/GPO_21

K16

ZZ/GPO_19

E10

PCIREQA#

A11

PCIREQB#

B11

PCIREQC#

C11

PCIREQD#

J1

OC0#

J2

OC1#

F1

USBP1+

H2

USBP1-

G2

USBP0+

H3

USBP0-

PIIX4M

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

DRQ[0..7]13,30

DACK#[0..3]30

B B

+3VS

12

R165

4.7K

ACIN_SYS#

13

1 2

R154 10K

D11

21

RB751V

D5

1
2

D8

1
2

Q22
2N7002

PBTN#

RB717F

RB717F

ACIN23,34,36

C C

ON/OFF23,34

REQ#15,29
REQ#35,18

D D

REQ#05,29
REQ#45,28

1

2

PX4_RI#

LLBATT#24

+3V

+3V

+3VS

R108

10K

+3VS

R122

10K

2

PX4_REQ#1

PX4_REQ#2

3

3

REQA#13
REQB#13
REQC#13

D12

RB751V

R161 10K

21

TC30

EXTSMI#23

CPU_STP#12

PCI_STP#12

ATF_INT#23

LID#13,24
PX4_RI#24

RSMRST#4,35

PBTN#13
SUSA#12,23
SUSB#23

SUSC#23

SUS_STAT#4,14

GGREQ#14

REQ#25,26

OVCUR#032
OVCUR#132

3

1

A A

2

3

4

5

6

7

8

PID[0..3]17

32#/64M

12

R65
0

B B

C C

+3VS

SCI#23

RP17
1 8
2 7
3 6
4 5

8P4R-10K
1 2

R351 10K

FLASH#24

SMBALT#13

SDAP48,12
SCKP48,12

PID[0..3]

PID0
PID1
32#/64M
MID1
MID2
MID3
PID2
PID3

U12C

P19

GPI_1

L2

GPI_13

J3

GPI_14

L5

GPI_15

K3

GPI_16

K4

GPI_17

H1

GPI_18

H4

GPI_19

H5

GPI_20

G3

GPI_21

G4

GPO_0

Y15

GPO_1/LA17

T14

GPO_2/LA18

W14

GPO_3/LA19

U13

GPO_4/LA20

V13

GPO_5/LA21

Y13

GPO_6/LA22

T12

GPO_7/LA23

T19

GPO_8

G5

GPO_27

F2

GPO_28

F3

GPO_29

F4

GPO_30

N17

SMBALERT/GPI_11

T20

SMBDATA

R19

SMBCLK

PIIX4M

GPIO

SMB

PIIX4

3of3

324 mBGA

POWER

VCCSUS1
VCCSUS2

VCC1
VCC2
VCC3
VCC4
VCC5

VCCP1
VCCP2
VCCP3
VCCP4
VCCP5
VCCP6
VCCP7
VCCP8
VCCP9

VCCUSB

VSSUSB

VREF
VBAT

GND
GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

R16
N16

R15
R6
F15
E11
F6

T6
P15
R7
G6
F14
F5
E16
E12
E9

K5
J5

J16
L16
J9

J10
J11
J12
K9
K10
K11
K12

L9
L10
L11
L12
M9
M10
M11
M12
D10
E7
E13

M5

NC

R5

NC

M16

NC

PIIX4_VREF

+RTCVCC

+3V

+3VS

+3VS

+3VS

3

D10 RB425D

C238
1U_25V_0805

12

C176

+

10U_25V_1210

+RTCVCC

12

C235
1U

+3VS

C196

C200
C183
.1U

.1U

+3VS

C237

R173

1K

C236

.1U

.1U

2
1

+3VS

C232

.01U

.1U

12

+5VS

+3V+3V

C136

1000P

C234
.01U

C137

1000P

C233
.01U

C231

.1U

C230
.01U

C134

C133

1000P

.1U

C170

1000P

C229
.01U

1000P

C165

D D

Compal Electronics, Inc.

Title

PROPRIETARY NOTE

1

2

3

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

5

6

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

7

11 40Saturday, December 23, 2000

of

8

0C

A

B

CLOCK GENERATOR & BUFFER

C

D

E

21

12

12

R164
10K

12

C262
.01UF

C242
1000PF

C220
10PF

+3VS

C239
.01UF

SDAP48,11
SCKP48,11

12

VCLK_+3VS

12

C225
1000PF

12

C258
1000PF

1 2

14.318MHZ

1 2

R160 2M

12

PWRDWN#

Y1

C221
10PF

SDAP4
SCKP4

R203 10

12

R167
10K

12

C223
.1UF

1 2

12

U17

7

VDDPCI

12

C271
.1UF

R201
10K

15

VDDPCI

21

VDD48

25

VDDCOR

46

VDDREF

48

VDDREF

28

VDDSDRAM

34

VDDSDRAM

40

VDDC

4

XIN

5

XOUT

39

SDRAM_IN

6

MODE

18

SEL_100/66#

26

SDRAM7/PCI_STP#

27

SDRAM6/CPU_STP#

44

PWR_DWN#

19

SDATA

20

SCLK

47

NC

3

GND

10

GND

17

GND

24

GND

31

GND

37

GND

43

GND

ICS9248-92

+3VS

12

IMI C9806 CLOCK TABLE

PIN 6 PIN 18

S1 S0 CPUCLK PCICLK
00

REF0
REF1
REF2

CPUCLK1
CPUCLK0

PCICLKF
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5

48/24MHZA
48/24MHZB

SDRAM5
SDRAM4
SDRAM3
SDRAM2
SDRAM1
SDRAM0

SDRAMFB

60MHZ 30MHZ
01
1X

100MHZ 33MHZ

CLK_14MOSC

2

CLK_14.3M_SIO

1
45

CLK_HCLK_CPU HCLK_CPU

41
42

CLK_PCLK_PIIX4

8

CLK_PCLK_BX

9

CLK_PCLK_PCM

11

CLK_PCLK_MOD

12

CLK_PCLK_SIO

13

CLK_PCLK_AUD

14

CLK_PCLK_1394

16

CLK_48M

22
23

29
30

SDRAM3

32

SDRAM2

33
35

SDRAM0

36

CLK_DCLKWR

38

33MHZ66MHZ

R168 22

1 2

R162 22

1 2

R169 15

1 2

R172 33

1 2

R177 33

1 2

R178 33

1 2

R184 33

1 2

R188 33

1 2

R185 33

1 2

R194 @F-33

1 2

888G1 Only

R202 22

1 2

R191 22

1 2

R186 22

1 2

R180 10

1 2

R181 22

1 2

*

MODE PIN26,27 FUNCTION

*

14MOSC 9

14.3M_SIO 30

HCLK_CPU 2,4

PCLK_PIIX4 9
PCLK_BX 5
PCLK_PCM 18
PCLK_MINI 29
PCLK_SIO 30
PCLK_AUD 28
PCLK_1394 26

48M 9

CLK_SDRAM3 8
CLK_SDRAM2 8

CLK_SDRAM0 7

C248

15PF

12

DCLKWR 6

ICS 9248-92 CLOCK TABLE

1
0

SDRAM7,SDRAM6
PCI_STOP#, CPU_STOP#

SEL_100/66# CPUCLK PCICLK

0

*

1

66.6MHZ 33.3MHZ

33.3MHZ100MHZ

+3VS

+3VS

+3V

+2.5V_CLK

CHB2012U170_0805

1 2

@CHB2012U170_0805

1 2

CHB2012U170_0805

1 2

CHB2012U170_0805

DCLKO6

PCI_STP#10

CPU_STP#10

SUSA#10,23

4 4

3 3

2 2

1 1

L36

L16

C277

4.7UF_0805_10V

L12

C210

4.7UF_0805_10V

@15PF

12

C267

4.7UF_0805_10V

12

12

12

R174

@47

12

C244

SUSA#

D13

12

VCLK_SDRAM

12

C276
.1UF

VCLK_CPUP

12

C213

.01UF

RB751V

C261
.1UF

L13

1 2

Compal Electronics, Inc.

N31B2

Title

PROPRIETARY NOTE

A

B

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

SCHEMATIC, M/B LA-854

Size Document Number Rev

401172

Date: Sheet

12 40Saturday, December 23, 2000

E

of

0C

A

B

C

D

E

ISA BUS Pullup PCI BUS Pullup Other PIIX4E Signals Pullup

1 2
1 2
1 2
1 2

1 2

RP28
1 8
2 7
3 6
4 5

8P4R-10K

RP24
1
2
3
4
5

10P8R-10K

RP19

10P8R-4.7K

RP40

10P8R-4.7K

RP21

10P8R-4.7K

RP25

10P8R-4.7K

RP29

10P8R-4.7K

RP37

10P8R-4.7K

SD[0..15]
SA[0..19]

ZWS#
IOCHRDY

5
4
3
2
1

5
4
3
2
1

5
4
3
2
1

10
9
8
7
6

10
9
8
7
6

1
2
3
4
5

10
9
8
7
6

SD1
SD3

SD9

SA11

SA5

SA7
SA6
SA4

+3VS

+3VS

ZWS# 9
IOCHRDY 9,23,30
REFRESH# 9
IOCS16# 9

IRQ14 9,20
IRQ15 9,21

IRQ11 9
IRQ12 9,23
IRQ5 9
SBHE# 9

+3VS

IRQ6 9
IRQ7 9
IRQ9 9
IRQ10 9

+3VS

+3VS

MEMW# 9,23
MEMR# 9,23
IOR# 9,23,30
IOW# 9,23,30

+3VS

DRQ5 10
DRQ6 10
DRQ7 10

+3VS

PERR#18,26,28,29

PHLDA#5,9

STOP#5,9,18,26,28,29
SERR#5,9,18,26,29

M1

2
3
4
5
6
7
8
9

SCREW-GND118

H15

S7X3.0mm

1

H11

S7X3.0mm

1

H6

C6X4.2mm

1

+3VS

2
3
4
5
6
7
8
9

SCREW-GND118

H8

S7X3.0mm

1

H13

S7X3.0mm

1

H9

C6X4.2mm

1

+3VS

+3VS

+3VS

1
2
3
4
5

M3

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

H2

S7X3.0mm

1

S7X3.0mm -A

H10

C6X4.2mm

1

RP14
1 8
2 7
3 6
4 5

8P4R-10K

RP16
1 8
2 7
3 6
4 5

8P4R-10K

RP15
1 8
2 7
3 6
4 5

8P4R-10K

R63

10K

RP18

10P8R-10K

SCREW-GND118

H7

1

REQC#

DEVSEL#
TRDY#
IRDY#
FRAME#

12

10
9
8
7
6

M4

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

M6

S7X3.0mm -A

1

REQA# 10
REQB# 10
REQC# 10

PIRQC# 9,28
PIRQD# 9,29
PAR 5,9,18,26,28,29
PLOCK# 5

DEVSEL# 5,9,18,26,28,29
TRDY# 5,9,18,26,28,29
IRDY# 5,9,18,26,28,29
FRAME# 5,9,18,26,28,29

SIRQ 9,18,30

+3VS

PIRQA# 9,14,18
PIRQB# 9,18,26,29
PHLD# 5,9
CLKRUN# 5,9,18,26,28,29,30

M5

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

SCREW-GND118

H4
GNDHOLD-B

1

H3
S7X2.8mm

1

H16

S7X2.9mm

1

M2

2
3
4
5
6
7
8
9

SCREW-GND118

H5
GNDHOLD-B

1

H12
S7X2.8mm

1

S7X4.3mm

2
3
4
5
6
7
8
9

H14
GNDHOLD-B

1

H17

1

+3V

+3VS

RP47

8P4R-4.7K

CF8
SMD40M80

1

CF14
SMD40M80

1

CF17
SMD40M80

1

CF4
SMD40M80

1

FD3
FIDUCAL

1

45
36
27
18

R197
10K

CF3
SMD40M80

1

CF15
SMD40M80

1

CF13
SMD40M80

1

CF2
SMD40M80

1

FD5
FIDUCAL

1

PBTN# 10
LID# 10,24

SMBALT# 11
IRQ8# 9

PX4_SLP# 9

CF6
SMD40M80

1

CF19
SMD40M80

1

CF10
SMD40M80

1

CF5
SMD40M80

1

FD2
FIDUCAL

1

CF9
SMD40M80

1

CF22
SMD40M80

1

CF12
SMD40M80

1

FD4
FIDUCAL

1

CF7
SMD40M80

1

CF18
SMD40M80

1

CF23
SMD40M80

1

FD1
FIDUCAL

1

CF11
SMD40M80

1

CF16
SMD40M80

1

CF24
SMD40M80

1

FD6
FIDUCAL

1

CF20
SMD40M80

1

CF21
SMD40M80

1

CF1
SMD40M80

1

Compal Electronics, Inc.

Title

PROPRIETARY NOTE

B

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

13

40Saturday, December 23, 2000

E

of

0C

SD[0..15]9,23,30
SA[0..19]9,23,30

+3VS

1 1

2 2

3 3

4 4

IRQ09
IRQ19,23
IRQ39
IRQ49

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

DRQ010,30
DRQ110,30
DRQ210,30
DRQ310,30

DRQ0
DRQ1
DRQ2
DRQ3

R74 1K
R62 1K
R94 1K
R119 4.7K

+5VS

R125 10K
R136 10K

+3VS

SD7

6

SD6 SD0

7

SD5

8

SD4 SD2

9

10

SD8

6

SD10 SD13

7

SD11 SD14

8

SD12 SD15

9

10

SA18

6

SA17

7

SA16

8

SA19

9

10

SA13

1

SA9 SA15

2

SA10 SA12

3

SA8 SA14

4
5

SA1

1

SA3

2

SA2

3

SA0

4
5

10

9
8
7
6

A

5

GAD[0..31]5

ST[0..2]5

SBA[0..7]5

GC/BE#[0..3]5

D D

C178

C C

B B

1 2

C94 10PF

12

C162 10PF

+3V

A A

1 2

R47 33

1 2

R89 33

1 2

R71 10K

+3V

5

1 2

R90 10K

R49

10K

AGP_BUSY#

GREQ#

@10PF

1 2

D7
RB751V

R98
@33

1 2

GFRAME#5

GDEVSEL#5

CLK_RUN#

AD_STBA5
AD_STBB5

SUS_STAT#4,10

+3VS

D6
RB751V

21

21

GAD[0..31]
ST[0..2]
SBA[0..7]
GC/BE#[0..3]

GCLKO5
CBRST#18,19,26,29
GIRDY#5

PIPE#5

GTRDY#5
GSTOP#5

GPAR5

PIRQA#9,13,18
GREQ#5
GGNT#5

SBSTB5

RBF#5

R123

10K

R95 10

R85 33

GREQ#

R79 10

CLK_RUN#

GGREQ# 10

1 2

1 2

1 2

+3V

+3V

GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31

GC/BE#0
GC/BE#1
GC/BE#2
GC/BE#3

ST0
ST1
ST2

SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7

AGP_BUSY#

4

U10A

B11

AD0

A11

AD1

C11

AD2

D12

AD3

C12

AD4

A12

AD5

B12

AD6

D13

AD7

A13

AD8

E14

AD9

C14

AD10

D14

AD11

A14

AD12

A18

AD13

D15

AD14

B14

AD15

D18

AD16

C19

AD17

E17

AD18

E18

AD19

D20

AD20

B20

AD21

F18

AD22

F19

AD23

G18

AD24

G19

AD25

F20

AD26

D17

AD27

J20

AD28

G16

AD29

G20

AD30

F16

AD31

J19

CPUCLK

G17

RESET#

A20

IRDY#

D19

FRAME#

E19

IDSEL/PIPE#

B19

TRDY#

D16

DEVSEL#

B17

STOP#

A16

PAR

B13

C/BE#0

E15

C/BE#1

E20

C/BE#2

C18

C/BE#3

K16

INTR#

J17

REQ#

J18

GNT#

C20

SB_STB

H16

ST0

H17

ST1

H20

ST2

A19

SBA0

B18

SBA1

A17

SBA2

C17

SBA3

E16

SBA4

B16

SBA5

C16

SBA6

A15

SBA7

H18

RBF#

C13

AD_STB0

F17

AD_STB1

H19

CLKRUN#

B15

AGP_BUSY#

C15

STP_AGP#

V4

PCI33EN

E13

VPP

F14

VPP

G15

VPP

J16

VPP

E11

AGPCLAMP

R2

GIOCLAMP

W2

TESTEN

ATI MOBILITY

4

PCI/AGP BUS INTERFACE

PROPRIETARY NOTE

3

12

R151
200K_1%

D11

ZVPORT0

D10

ZVPORT1

C10

ZVPORT2

B10

ZVPORT3

A10

ZVPORT4

D9

ZVPORT5

C9

ZVPORT6

B9

ZVPORT7
ZVPORT8

ZVPORT9
ZVPORT10
ZVPORT11
ZVPORT12

ZV PORTCORE I/O MEMORY POWER

ZVPORT13
ZVPORT14
ZVPORT15
ZVPORT16
ZVPORT17
ZVPORT18

SSOUT

VDDC
VDDC
VDDC
VDDC
VDDC
VDDC

VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR

VREF

VDDQ
VDDQ
VDDQ
VDDQ

VDDM
VDDM
VDDM
VDDM

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SSIN

NC/R

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

A9
D8
C8
B8
A8
E7
D7
C7
B7
A7
E6

R1
T1

T2

T10
H6
E10
K5
L16
U11

T12
T14
P15
E8
F6
H5
N5
P6
T7
T9

M16
T13

T16
T8
R5

P16
P5
R6
R15

R4
J10
J11
K9
J12
K10
K11
K12
L9
L10
L11
L12
M9
M10
M11
M12
G6
F7
F15
R7
T15
U8
T5
E12
E9
J5
U13
J9
R3
P3
T11

ZVPORT8
ZVPORT9
ZVPORT10
ZVPORT11
ZVPORT12
ZVPORT13
ZVPORT14
ZVPORT15

SSIN
SSOUT

1 2

R106 10K

12

VDDC

+3V

+3V

They are for Mobility
M/M1 only

3

R44
100K

12

C203

2.2UF_0805

1 2

R155 @0

1 2

R156 @0

1 2

R163 @0

12

C211

+

10UF_1210

4

3

1

6

U14

VIN

S-816A25AMC

ON/OFF

S-816A25AMC

+3VS

U15

X1/CLK

S1

2

Q19
2SB1188

1

EXT

2

VDD

CLK

PD#S0
LEE

GND

@MK1705

3

2

C222

1 2

VOUT

4

87
5

VSS

2

@.1UF

SSINSSOUT

5

ZVPORT8
ZVPORT9
ZVPORT10
ZVPORT11
ZVPORT12
ZVPORT13
ZVPORT14
ZVPORT15

+3V

+3V

+3V

1

2.5V+3V

12

R352
100K

12

C93
1UF_0805

12

C116
10UF_1210

12

C214
.1UF

T=80mil

12

C201
10UF_1210

RP11

8 9
7
6
5
4
3
2
1

16P8R-100K

12

C98
.1UF

12

C127
.1UF

12

C97
.01UF

T=40iml

CHB2012U121_0805

CHB2012U121_0805

10
11
12
13
14
15
16

12

C95
1000PF

12

C161
100PF

12

C82
1000PF

1 2

R118 0_0805

1 2

L10

1 2

L11

12

C96
100PF

12

12

C156
100PF

C177
1000PF

T=40iml

12

C215
1UF

T=20iml

12

T=20iml

12

12

C184
.1UF

12

C197
.1UF

12

C172
.1UF

C180
.1UF

C181
.1UF

12

C102
.01UF

12

C190
1UF

12

12

12

C218
.01UF

VDDC

PVDD

C185

10UF_1210

VAVDD

C187
10UF_1210

12

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

14 40Saturday, December 23, 2000

1

of

C207
.01UF

0C

5

VMD15
VMD14
VMD13
VMD12
VMD11
VMD10
VMD9
VMD8
VMD7

D D

C C

B B

+3V

12

R166
150

A A

CLK

12

R157
110

5

VCAS#016

VCS#016

VWE#16

VRAS#016

DSF16

VCKE16

VMD6
VMD5
VMD4
VMD3
VMD2
VMD1
VMD0
VMD31
VMD28
VMD27
VMD29
VMD25
VMD26
VMD23
VMD24
VMD30
VMD22
VMD21
VMD20
VMD19
VMD18
VMD17
VMD16

VMA10
VCAS#0
VMA4
VMA3
VMA2
VMA1
VMA7
VMA6

RP49 16P8R-22

VMA5
DQM#1
DQM#0

VMA9
VMA8
DQM#3
DQM#2

RP50 16P8R-22

CLK

CLK16

R158 22
VMA11
VCS#0
VWE#
VRAS#0

DSF
VCKE
VMA0

RP48 16P8R-22

16
15
14
13
12
11
10

16
15
14
13
12
11
10

16
15
14
13
12
11
10

16
15
14
13
12
11
10

16
15
14
13
12
11
10

1
2
3
4
5
6
7
8 9

1 2
1

2
3
4
5
6
7
8 9

1
2
3
4
5
6
7
89
1
2
3
4
5
6
7
89
1
2
3
4
5
6
7
89
1
2
3
4
5
6
7
89

1
2
3
4
5
6
7
89

16
15
14
13
12
11
10

16
15
14
13
12
11
10

RVMD15
RVMD14
RVMD13
RVMD12
RVMD11
RVMD10
RVMD9
RVMD8
RVMD7
RVMD6
RVMD5
RVMD4
RVMD3
RVMD2
RVMD1
RVMD0
RVMD31
RVMD28
RVMD27
RVMD29
RVMD25
RVMD26
RVMD23
RVMD24
RVMD30
RVMD22
RVMD21
RVMD20
RVMD19
RVMD18
RVMD17
RVMD16

RVMA10
CAS#0_R
RVMA4
RVMA3
RVMA2
RVMA1
RVMA7
RVMA6

RVMA5
RDQM#1
RDQM#0

RVMA9
RVMA8
RDQM#3
RDQM#2

RVMA11
RVCS#0
RVWE#
RAS#0_R

RDSF
CKE_R
RVMA0

4

RP42
22-16P8R

RP41
22-16P8R

RP44
22-16P8R

RP43
22-16P8R

4

RVMD0

Y11

RVMD1

U12

RVMD2

V12

RVMD3

W12

RVMD4

Y12

RVMD5

V13

RVMD6

W13

RVMD7

Y13

RVMD8

U14

RVMD9

V14

RVMD10

W14

RVMD11

Y14

RVMD12

U15

RVMD13

V15

RVMD14

W15

RVMD15

Y15

RVMD16

U16

RVMD17

V16

RVMD18

W16

RVMD19

Y16

RVMD20

V17

RVMD21

W17

RVMD22

Y17

RVMD23

W18

RVMD24

Y18

RVMD25

W19

RVMD26

Y19

RVMD27

Y20

RVMD28

W20

RVMD29

V19

RVMD30

V18

RVMD31

V20
U20
U19
U18
U17

T20

T19

T18

T17
R16
R20
R19
R18
R17

P20

P19

P18

P17
N16
N20
N19
N18
N17
M20
M19
M18
M17

L20

L19

L18

L17

K20

K19

RVMA0

T6

RVMA1

Y7

RVMA2

W7

RVMA3

V7

RVMA4

U7

RVMA5

Y8

RVMA6

W8

RVMA7

V8

RVMA8

Y9

RVMA9

W9

RVMA10

W6

RVMA11

U2

RAS#0_R

U5

CAS#0_R

Y6

RVWE#

W4

RDQM#0

V9

RDQM#1

U9

RDQM#2

Y10

RDQM#3

W10

V10
U10

V11

W11

V6

U6

CKE_R

Y5

RVCS#0

W3

Y4

PROPRIETARY NOTE

3

U10B

LCD0

G4

FLAT PANEL INTERFACEGPIODAC2 DAC1PLL

LCDDO0
LCDDO1
LCDDO2
LCDDO3
LCDDO4
LCDDO5
LCDDO6
LCDDO7
LCDDO8

LCDDO9
LCDDO10
LCDDO11
LCDDO12
LCDDO13
LCDDO14
LCDDO15
LCDDO16
LCDDO17
LCDDO18
LCDDO19
LCDDO20
LCDDO21
LCDDO22
LCDDO23

LTGIO0
LTGIO1
LTGIO2

LCDTMG0
LCDTMG1
LCDTMG2
LCDTMG3

DIGON

BIASON

BLON
STANDBY#
SUSPEND#

MONDET

LPVDD

LPVDDR

LPVSS
LPVSSR
LPVSSR

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8

GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16

HSYNC
VSYNC

RSET

AVDD
AVSSQ
AVSSN

COMP

SYNC

R2SET

A2VDD
A2VSSN
A2VSSQ

XTALIN

XTALOUT

PVDD
PVSS

PAVDD

PAVSS

ROMCS#

DSF

3

LCD1

F3

LCD2

F2

LCD3

E1

LCD4

F1

LCD5

G3

LCD6

G2

LCD7

G1
H1
H2
J3

R_LCD11

J2

R_LCD12

J1
K4
K3
K2
K1
L1
L2
L3
L4
M1
M2
M3

T3
T4
U1

LCDTMG0

U3

LCDTMG1

U4

LCDTMG2

V1

LCDTMG3

V2
V3

ENVEE

W1

BLON#

Y1

STANDBY#

Y2
Y3
P4

H4
H3

J4
L5
G5

A1
A2
B2
A3
B3
A4
B4
C4
A5
B5
C5

1 2

D5

R46 0

E5

1 2

A6

R50 @0

B6
C6
D6

C3

R

C2

G

B1

B

E3
F4
D3
D2
E4
D4

N1

Y

N2

C

N3
P2
N4
P1
M5
M4

F29MHZ

E2
D1

C1
F5

K17
K18

W5

RDSF

V5

R_LCD12
R_LCD11

** Do not populate RP23, R114, R117, R128,
R124, and C192 when use TFT panel.

R114 33
R128 33

R129 100K

PVDD

R45 10K

VAVDD

VAVDD

PVDD

1 2

RP23

16P8R-56
8 9
7
6
5
4
3
2
1

1 2

12
12

12

10
11
12
13
14
15
16

C186

R117 33
R124 33

R141 10K

R43 47K

R88 365_1%

MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63

MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11

RAS#
CAS#
WE#

DQM#0
DQM#1
DQM#2
DQM#3
DQM#4
DQM#5
DQM#6
DQM#7

MCK
MCKIN
CKE

CS0
CS1

ATI MOBILITY

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MEMORY INTERFACE

2

LCD8
LCD9
LCD10
LCD12
LCD11
LCD13
LCD14
LCD15

10PF

12
12

1 2

12

1 2

1 2

R107 357_1%

R59 33

12

C115
22PF

2

C192

10PF

1 2

+3V

+3V

1 2

BKOFF#23

1

VAVDD

PVDD

RB717F

VMD[0..31]
LCD[0..35]

VMA[0..11]
DQM#[0..3]

12

12

C143

C182

.1UF

.01UF

12

12

C167
.1UF

+3VS

R38

4.7K

3

13

D

2

G

S

C111
.1UF

C140
.1UF

DISPOFF#

Q11
2N7002

+3V

12

12

DE 17
SHFCLK 17
LP 17
FLM 17

ENVDD 17
ENVEE 24

ENVEE

M_SEN# 17
DDC_MD2 17
DDC_CLK 17
DDC_DATA 17

R17
G17
B17
HSYNC1 17
VSYNC1 17

X2

3

OUT

VDD

2

GND

OSC_29.498928M

VMD[0..31]16

LCD[0..35]17

VMA[0..11]16
DQM#[0..3]16

D4

1
2

BLON#

4
1

ST

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

15 40Saturday, December 23, 2000

1

12

C166
.01UF

DISPOFF# 17

of

C171
1000PF

0C

5

D D

C C

B B

4

VMA11
VMA8
VMA9
VMA10
VMA7
VMA6
VMA5
VMA4
VMA3
VMA2
VMA1
VMA0

CLK

R230
33

1 2

12

C320
22PF

VCKE15
VCS#015
VRAS#015
VCAS#015
CLK15

VWE#15
DSF15

VCKE
VCS#0
VRAS#0
VCAS#0
CLK

DQM#0
DQM#1
DQM#2
DQM#3

VWE#
DSF

U24

29

BA(A11)

45

A10

30

A9

51

A8/AP

50

A7

49

A6

48

A5

47

A4

34

A3

33

A2

32

A1

31

A0

44

NC

43

NC

42

NC

41

NC

40

NC

39

NC

38

NC

37

NC

36

NC

52

NC

86

NC

87

NC

88

NC

89

NC

90

NC

91

NC

92

NC

93

NC

94

NC

95

NC

58

MCH

54

CKE

28

CS#

27

RAS#

26

CAS#

55

CLK

23

DQM0

56

DQM1

24

DQM2

57

DQM3

25

WE#

53

DSF

16

VSS

46

VSS

66

VSS

DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VCCQ
VCCQ
VCCQ
VCCQ
VCCQ
VCCQ
VCCQ
VCCQ

VCC
VCC
VCC

VCC
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQVSS

512KX32X2

C269
1UF_0805

C283
.1UF

C290
.1UF

C284
100PF

VMA[0..11]15
VMD[0..31]15
DQM#[0..3]15

84
83
81
80
78
77
75
74
21
20
18
17
13
12
10
9
72
71
69
68
64
63
61
60
7
6
4
3
1
100
98
97

2
8
14
22
59
67
73
79
15
35
65
96
82
76
70
62
5
11
19
9985

1 2

1 2

1 2

1 2

3

VMD31
VMD30
VMD29
VMD28
VMD27
VMD26
VMD25
VMD24
VMD23
VMD22
VMD21
VMD20
VMD19
VMD18
VMD17
VMD16
VMD15
VMD14
VMD13
VMD12
VMD11
VMD10
VMD9
VMD8
VMD7
VMD6
VMD5
VMD4
VMD3
VMD2
VMD1
VMD0

VMA[0..11]
VMD[0..63]
DQM#[0..7]

C292
1UF_0805

C310
.1UF

C252
.1UF

C334
100PF

2

1

+3V

12

12

12

12

A A

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND

PROPRIETARY NOTE

5

4

TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

16 40Saturday, December 23, 2000

1

of

0C

A

+5VALW

12

C56

@4.7UF_C1210

INVT_PWM23

1 2

12

DAC_CONTR23

SHFCLK15

DISPOFF#15

R21 33

DE15
LP15

FLM15

C55 22PF

1 1

** Populate 0 ohm on

R21, and C55 when

use TFT panel.

2 2

4.7UF_C1210

+5VALW

C32

1 2

+3VS

2N7002

ENVDD15

SHFCLK

PID0
PID1
PID2
PID3
ENVDD
DISPOFF#

DE
LP
FLM

L_LCD11
L_LCD13
L_LCD15

Q10

LCDVDD

12

13

+5VALW

R40

100

ENVDD

2

JP2

12
34
56
78
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50

HEADER 25X2-LCD

+5VS

13

22K

2

22K

R29
10K

R28

47K

DISPOFF#

Q9
DTC124EK

2

L_LCD0
L_LCD1

L_LCD2
L_LCD3

L_LCD4
L_LCD5

L_LCD6
L_LCD7

L_LCD8L_LCD9
L_LCD10
L_LCD12
L_LCD14

22K

22K

+12VS

B

LCDVDD
LVDDVGA

13

DAC_BRIG 23

R25
100K

Q4

DTC124EK

R26
200K

+3VS

1000P

C61

LCD[0..23]
PID[0..3]

RP7
1 8
2 7
3 6
4 5

8P4R-10K

LVDDVGA

2

PID3
PID2
PID1
PID0

1

Q5

3

SI2302DS

C44

.1UF

LCD[0..23] 15
PID[0..3] 11

LCDVDD

+

+

C64

4.7UF_1206
10V

C65

4.7UF_1206
10V

C

D

L_LCD7
L_LCD6
L_LCD5
L_LCD4

L_LCD3
L_LCD2
L_LCD1
L_LCD0

L_LCD15
L_LCD13
L_LCD11
L_LCD9

L_LCD14
L_LCD12
L_LCD10
L_LCD8

** Do not populate LP3 and LP4
when use TFT panel.

LP1

8
7
6

8P4R-0

LP2
8
7
6

8P4R-0

LP3
1
2
3
4 5

8P4R-0

LP4
8
7
6

8P4R-0

1
2
3
45

1
2
3
45

8
7
6

1
2
3
45

DISPOFF#

DE

FLM

LP

E

LCD7
LCD6
LCD5
LCD4

LCD3
LCD2
LCD1
LCD0

LCD15
LCD13
LCD11
LCD9

LCD14
LCD12
LCD10
LCD8

C45
220PF
C18
220PF
C23
220PF
C24
220PF

+5VS

+5VS

3 3

DDC_MD215

M_SEN#15

R15

G15

B15

R6

75

4 4

A

CRT Connector

R7

75

1 2

1 2

HSYNC115

VSYNC115

+12VS

12

R2

75

1 2

2N7002

R5

100K

C399
18PF

12

C12
18PF

2

2N7002

12

13

Q1

Q3

2

L25

1 2

FCM2012C80_0805

L24

1 2

FCM2012C80_0805

L23

1 2

FCM2012C80_0805
C11
18PF

13

D33

DAN217

2

12

C9
15PF

L2

1 2

CHB1608U121

L1

1 2

CHB1608U121

B

1

1

D34

DAN217

2

3

12

C8
15PF

12

C21
68PF

PROPRIETARY NOTE

1

D35

DAN217

3

2

3

12

C7
15PF

12

12

C19

C10

68PF

100PF

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D1

2 1

RB491D

F4

21

C22

C20
.1UF

12

12

JP8
CRT-15P

6

11

1
7

12

2
8

13

3

CRT_VCC

9

14

4
10
15

5

12

C5
220PF

2

DGS

1 3

Q38
2N7002S

+12VS

1 2

2

DGS

1 3

Q2
2N7002S

100K

R9

+5VS

12

12

R8

R10

2K

2K

12

FUSE_1A

C6
100PF

220PF

Compal Electronics, Inc.

Title

Size Document Number Rev

B

C

D

Date: Sheet

** Populate 0 ohm on C18, C23, and
C24 when use TFT panel.

DDC_DATA 15

DDC_CLK 15

SCHEMATIC, M/B LA-854
401172

E

17 40Saturday, December 23, 2000

0C

of

A

2

13

1 2

S2_WP19

1420RST#

PCLK_PCM12

FRAME#5,9,13,26,28,29
DEVSEL#5,9,13,26,28,29

TRDY#5,9,13,26,28,29

IRDY#5,9,13,26,28,29
STOP#5,9,13,26,28,29

S2_D0 S1_D0
S2_D1 S1_D1
S2_D2 S1_D2
S2_D3 S1_D3
S2_D4 S1_D4
S2_D5 S1_D5
S2_D6 S1_D6
S2_D7 S1_D7
S2_D8 S1_D8
S2_D9 S1_D9
S2_D10 S1_D10
S2_D11 S1_D11
S2_D12 S1_D12
S2_D13 S1_D13
S2_D14 S1_D14
S2_D15 S1_D15

S2_A0 S1_A0
S2_A1 S1_A1
S2_A2 S1_A2
S2_A3 S1_A3
S2_A4 S1_A4
S2_A5 S1_A5
S2_A6 S1_A6
S2_A7 S1_A7
S2_A8 S1_A8
S2_A9 S1_A9
S2_A10 S1_A10
S2_A11 S1_A11
S2_A12 S1_A12
S2_A13 S1_A13
S2_A14 S1_A14
S2_A15 S1_A15

R244

S2_A17 S1_A17
S2_A18 S1_A18

47

S2_A19 S1_A19
S2_A20 S1_A20
S2_A21 S1_A21
S2_A22 S1_A22
S2_A23 S1_A23
S2_A24 S1_A24
S2_A25 S1_A25

S2_BVD1 S1_BVD1
S2_BVD2 S1_BVD2
S2_CD1# S1_CD1#
S2_CD2# S1_CD2#
S2_RDY# S1_RDY#
S2_WAIT# S1_WAIT#
S2_WP S1_WP
S2_INPACK# S1_INPACK#

S2_VS2
S2_RST

AD[0..31]5,9,26,28,29

W10

B_D0/CAD27

U10

B_D1/CAD29

P10

B_D2/RSVD

H2

B_D3/CAD0

J1

B_D4/CAD1

J3

B_D5/CAD3

K1

B_D6/CAD5

K3

B_D7/CAD7

V10

B_D8/CAD28

R10

B_D9/CAD30

W11

B_D10/CAD31

H1

B_D11/CAD2

J2

B_D12/CAD4

J6

B_D13/CAD6

K2

B_D14/RSVD

K5

B_D15/CAD8

R8

B_A0/CAD26

W7

B_A1/CAD25

V7

B_A2/CAD24

W6

B_A3/CAD23

V6

B_A4/CAD22

U6

B_A5/CAD21

V5

B_A6/CAD20

U5

B_A7/CAD18

N1

B_A8/CC/BE1#

M3

B_A9/CAD14

L1

B_A10/CAD9

M1

B_A11/CAD12

T1

B_A12/CC/BE2#

N3

B_A13/CPAR

P1

B_A14/CPERR#

P5

B_A15/CIRDY#

P6

B_A16/CCLK

M6

B_A17/CAD16

N2

B_A18/RSVD

N6

B_A19/CBLOCK#

N5

B_A20/CSTOP#

R1

B_A21/CDEVSEL#

R2

B_A22/CTRDY#

R3

B_A23/CFRAME#

W4

B_A24/CAD17

R6

B_A25/CAD19

V9

B_BVD1/CSTSCHG

W9 J15

B_BVD2/CAUDIO A_BVD2/CAUDIO

H3

B_CD1#/CCD1#

R9

B_CD2#/CCD2#

V8

B_READY/CINT#

W8

B_WAIT#/CSERR#

U9

B_WP/CCLKRUN#

R7

B_INPACK/CREQ#

K6

B_CE1#/CC/BE0#

L2

B_CE2#/CAD10

P3

B_WE#/CGNT#

L5

B_IORD#/CAD13

M2

B_IOWR#/CAD15

L6

B_OE#/CAD11

U8

B_VS1#/CVS1

P7

B_VS2#/CVS2

P8

B_REG#/CC/BE3#

W5

B_RESET/CRST#

AD[0..31]

PCIRST#5,9,19,26,28,29

1 1

2 2

3 3

4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPA L EL EC TRON ICS , INC . NE ITHE R TH IS SH EET N OR T HE IN FOR MAT ION I T CO NTAI NS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

S2_WP
S2_A23

S1_D[0..15]19
S1_A[0..25]19

S2_D[0..15]19

+12VS

S2_A[0..25]19

1 2

R254 22K

R235

1 2

R374 0

CBRST#

1 2

R375 @0

R347

1 2

100K

SERR#5,9,13,26,29

Q46 2N7002

S1_D[0..15]

S1_A[0..25]
S2_D[0..15]

S2_A[0..25]

S2_A16 SB_A16 SA_A16 S1_A16

Placement near
to PCMCIA
controller

S2_BVD119
S2_BVD219
S2_CD1#19
S2_CD2#19
S2_RDY#19

S2_WAIT#19

S2_INPACK#19

S2_CE1#19
S2_CE2#19
S2_WE#19

S2_IORD#19

S2_IOWR#19

S2_OE#19
S2_VS119

S2_VS219
S2_REG#19
S2_RST19

S2_VCC
S2_VCC

22K

A

B

SLATCH19
RTCCLK9,19
SLDATA19
GNT#35
REQ#35,10
C/BE#35,9,26,28,29
C/BE#25,9,26,28,29
C/BE#15,9,26,28,29
C/BE#05,9,26,28,29

12

STOP#

IRDY#

TRDY#

R256

33

12

C337
10PF

A10E2A5C8A15

PCLK

RSTIN#

FRAME#

DEVSEL#

B13

C13

F14

GNT#

REQ#

C/BE0#

C/BE1#

C/BE2#

C/BE3#

1420RST#

PERR#13,26,28,29

PAR5,9,13,26,28,29

C6B6A6F7A7B7A14C7F8

PAR

SERR#

PERR#

PCI

Interface

Slot

B

AD28

AD27

AD26

AD25

AD24

AD23

AD22

AD21

AD20

AD19

AD4

AD10

AD9

AD8

AD7

AD6

AD5

AD3

AD2

AD1

AD0

F2

G5

H6G3G1

H5

AD0

AD1

AD2

AD3

AD4

AD5

AD6

AD7

AD8

AD9

AD10

B

AD17

AD15

AD14

AD13

AD12

AD11

AD11

AD18

AD16

B12

A12

B11

C11

E13

F11

E10

F10A9B9F9A8F1F6B5E6A4C12E3F5G6E1

E9

B8

AD12

AD13

AD14

AD15

AD16

AD17

AD18

AD19

AD20

AD21

AD22

AD23

AD24

AD25

AD26

AD27

AD28

DATA

AD29

AD29

E19

F17

CLOCK

AD30

A13

E12

AD30

G15

LATCH

SPKOUT

AD31

IDSEL

C10

12

R245

AD31

100

AD15

C

PCM_SPK# 34

+3V

E11

D1

F18

VCCI

VCCP

VCCP

IRQ/DMA

INTA#/MFUNC0

INTB#/MFUNC1

SUSPEND#

DMAREQ#/MFUNC2

F15

E17

D19

A16

PCM_INTB#

PCM_INTA#

C

12

C506
.1UF

W12

L3

U7

F3

VCC

VCC

VCC

VCC

Power

Slot

A

DMAGNT#/MFUNC5

LOCK#/MFUNC4

IRQSER/MFUNC3

CLKRUN#/MFUNC6

F13

E14

C15

B15

PCM2_LED

12

+3V

N15

G19

B14

VCC

VCC

VCC

RIOUT#/PME#

C14

PCM_PME#

PCM1_LED

C9

VCC

+3V

C499
.1UF

E7

VCC

GND

GND

GND

J5

G2

M5

P2

VCCB

GND

P9

M17

GND

V14

C496 .1UF

S2_VCCR
S1_VCCR

C507 .1UF

CBRST#

A11

VCCA

A_D0/CAD27

GRST#

A_D1/CAD29

A_D2/RSVD
A_D3/CAD0
A_D4/CAD1
A_D5/CAD3
A_D6/CAD5

A_D7/CAD7
A_D8/CAD28
A_D9/CAD30

A_D10/CAD31

A_D11/CAD2
A_D12/CAD4
A_D13/CAD6
A_D14/RSVD
A_D15/CAD8

A_A0/CAD26
A_A1/CAD25
A_A2/CAD24
A_A3/CAD23
A_A4/CAD22
A_A5/CAD21
A_A6/CAD20
A_A7/CAD18

A_A8/CC/BE1#

A_A9/CAD14
A_A10/CAD9

A_A11/CAD12

A_A12/CC/BE2#

A_A13/CPAR

A_A14/CPERR#

A_A15/CIRDY#

A_A16/CCLK

A_A17/CAD16

A_A18/RSVD

A_A19/CBLOCK#

A_A20/CSTOP#

A_A21/CDEVSEL#

A_A22/TRDY#

A_A23/CFRAME#

A_A24/CAD17
A_A25/CAD19

A_BVD1/CSTSCHG

A_CD1#/CCD1#
A_CD2#/CCD2#

A_READY/CINT#

A_WAIT#/CSERR#

A_WP/CCLKRUN#

A_INPACK/CREQ#

A_CE1#/CC/BE0#

A_CE2#/CAD10

A_WE#/CGNT#

A_IORD#/CAD13

A_IOWR#/CAD15

A_OE#/CAD11

A_VS1#/CVS1

A_VS2#/CVS2
A_REG#/CC/BE3#
A_RESET/CRST#

GND

GND

GND

GND

GND

GND

K18

E18

F12

B10

E8

1 2

1 2

GND

C5

PCM_PME# 24
CLKRUN# 5,9,13,26,28,29,30
PCM1_LED 24
PCM_RI# 29
SIRQ 9,13,30
PCM2_LED 24

R283 22K
2 1

D30

RB751V

R242

75_0805

1 2

R281

1 2

75_0805

CBRST# 14,19,26,29

U33

H14
G18
G14
U11
R11
U12
R12
V13
H15
G17
F19
P11
V12
P12
W13
U13

J19
K14
K15
K19
L15
L17
L19
M15
W16
R14
W14
P14
N18
R17
N14
M14
P18
U15
T19
P15
R18
P17
P19
N17
N19
M18

H19
V11

H17
J17
J14
H18
L14

P13
R13
R19
W15
V15
U14
J18
M19
K17
L18

PCI1420-GHK

+3V

D

S2_VCC
S1_VCC

S1_VS1S2_VS1
S1_VS2

S1_RST

PCM_SUSP# 23

D

E

S1_A23
S1_WP

+3V

12

+3V

12

+3V

R284
22K

D21

RB751V
D31

RB751V

R277
R282

C498
.1UF

C494
1000PF

21

21

22K

1 2

CARDBUS
PCI1420

+3V

12

C501
.1UF

+3V

12

C502
1000PF

R278

1 2

47

Placement near
to PCMCIA
controller

S1_BVD1 19
S1_BVD2 19
S1_CD1# 19
S1_CD2# 19
S1_RDY# 19
S1_WAIT# 19
S1_WP 19
S1_INPACK# 19

S1_CE1# 19
S1_CE2# 19
S1_WE# 19
S1_IORD# 19
S1_IOWR# 19
S1_OE# 19
S1_VS1 19
S1_VS2 19
S1_REG# 19
S1_RST 19

12

12

PCM_INTA#

PCM_INTB#

C504
.1UF

C493
1000PF

R262

22K

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

E

12

C503
.1UF

12

C500
1000PF

PIRQA# 9,13,14

PIRQB# 9,13,26,29

S1_VCC
S1_VCC

22K

18 40Saturday, December 23, 2000

of

0C

PCMCIA POWER CTRL.

+12V+5V

+3V

C467
1UF_25V_0805

1 2

C464

1 2

.1UF
C257

1 2

.1UF

C463

1 2

.1UF

C285

1 2

.1UF

C473

1 2
1 2

S1_A[0..25]18
S1_D[0..15]18

S2_A[0..25]18

S2_D[0..15]18

S2_VPP

S1_VPP

.1UF
.1UF

+3V

C471

OCCB#24

C299
10U_1206

1 2

R204
100K

12

C489

.01UF

12

C312

.01UF

W=30mils

W=30mils

S1_A[0..25]
S1_D[0..15]
S2_A[0..25]
S2_D[0..15]

12
C316

56PF

SLDATA18
SLATCH18

RTCCLK9,18

12

12

C298

1UF_25V_0805

12

C317

.1UF

C486

1UF_25V_0805

S1_VCC

12

C300

1000PF

Wire ZV PORT to Slot A

S1_VPP

U20

25

VCC_5V

7

12V

24

12V

1

5V

2

5V

30

5V

15

3.3V

16

3.3V

17

3.3V

3

DATA

5

LATCH

4

CLOCK

13

APWR_GOOD#

19

BPWR_GOOD#

18 12

OC# GND

TPS2206AI/TPS2216

AVPP
AVCC
AVCC
AVCC

BVPP
BVCC
BVCC
BVCC

RESET

RESET#

NC
NC
NC
NC

PCIRST#5,9,18,26,28,29

W=40mils

8
9
10
11

S2_VPP

23
20

W=40mils

21
22

6
14

26
27
28

CBRST#

29

C251

1 2

+3V POWER

12

C272

4.7UF_10V_0805

12

C469

4.7UF_10V_0805

+3V

.1UF

14

2 3
7

S1_VPP
S1_VCC

S2_VPP
S2_VCC

1

U19A
74LVC125

12

+3V

PCMRST# 23

CBRST#

R175

10K

CBRST# 14,18,26,29

S1_CD1#

S1_CD2#

S2_CD1#

S2_CD2#

1000PF

1000PF

1000PF

C362

1 2

C226

1 2

C363

1 2

C240

1 2
1000PF

CARDBUS

SOCKET

JP20

A77

a68

A76

S1_CD2#18

S1_WP18

S1_BVD118

S1_BVD218
S1_REG#18

S1_INPACK#18

S1_WAIT#18

S1_RST18
S1_VS218

S1_VPP S2_VPP
S1_VCC

S1_RDY#18

S1_WE#18

S1_IOWR#18

S1_IORD#18

S1_VS118
S1_OE#18

S1_CE2#18

S1_CE1#18

S1_CD1#18

S1_CD2#
S1_WP

S1_D10
S1_D2
S1_D9
S1_D1
S1_D8
S1_D0
S1_BVD1

S1_A0
S1_BVD2
S1_A1
S1_REG#
S1_A2
S1_INPACK#
S1_A3

S1_WAIT#
S1_A4
S1_RST
S1_A5
S1_VS2
S1_A6
S1_A25

S1_A7
S1_A24
S1_A12
S1_A23
S1_A15
S1_A22

S1_A16

S1_A21
S1_RDY#
S1_A20
S1_WE#
S1_A19
S1_A14
S1_A18
S1_A13

S1_A17
S1_A8
S1_IOWR#
S1_A9
S1_IORD#

S1_A11
S1_VS1
S1_OE#
S1_CE2#
S1_A10

S1_D15
S1_CE1#
S1_D14
S1_D7
S1_D13
S1_D6

S1_D12 S2_D12
S1_D5
S1_D11

S1_D4

S1_CD1#

S1_D3

A75
A74
A73
A72
A71
A70
A69
A68
A67
A66
A65
A64
A63
A62
A61
A60
A59
A58
A57
A56
A55
A54
A53
A52
A51
A50
A49
A48
A47
A46
A45
A44
A43
A42
A41
A40
A39
A38
A37
A36
A35
A34
A33
A32
A31
A30
A29
A28
A27
A26
A25
A24
A23
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10

A9
A8
A7
A6
A5
A4
A3
A2
A1

a34
a67
a33
GND
a66
a32
a65
a31
a64
a30
a63
GND
a29
a62
a28
a61
a27
a60
a26
GND
a59
a25
a58
a24
a57
a23
a56
GND
a22
a55
a21
a54
a20
a53
GND
a19
a52
a18
a51
a17
a50
a16
a49
a15
a48
a14
a47
a13
GND
a46
a12
a45
a11
a44
GND
a10
a43
a9
a42
a8
GND
a41
a7
a40
a6
a39
a5
GND
a38
a4
a37
a3
a36
a2
a35
a1

PCMC154PIN

GND

GND

GND

GND

GND

GND

GND

GND

GND

B77

b68

B76

b34
b67
b33

b66
b32
b65
b31
b64
b30
b63

b29
b62
b28
b61
b27
b60
b26

b59
b25
b58
b24
b57
b23
b56

b22
b55
b21
b54
b20
b53

b19
b52
b18
b51
b17
b50
b16
b49
b15
b48
b14
b47
b13

b46
b12
b45
b11
b44

b10
b43

b9

b42

b8

b41

b7

b40

b6

b39

b5

b38

b4

b37

b3

b36

b2

b35

b1

S2_CD2#

B75

S2_WP

B74
B73

S2_D10

B72

S2_D2

B71

S2_D9

B70

S2_D1

B69

S2_D8

B68

S2_D0

B67

S2_BVD1

B66
B65

S2_A0

B64

S2_BVD2

B63

S2_A1

B62

S2_REG#

B61

S2_A2

B60

S2_INPACK#

B59

S2_A3

B58
B57

S2_WAIT#

B56

S2_A4

B55

S2_RST

B54

S2_A5

B53

S2_VS2

B52

S2_A6

B51

S2_A25

B50
B49

S2_A7

B48

S2_A24

B47

S2_A12

B46

S2_A23

B45

S2_A15

B44

S2_A22

B43
B42

S2_A16

B41
B40
B39
B38
B37

S2_A21

B36

S2_RDY#

B35

S2_A20

B34

S2_WE#

B33

S2_A19

B32

S2_A14

B31

S2_A18

B30

S2_A13

B29
B28

S2_A17

B27

S2_A8

B26

S2_IOWR#

B25

S2_A9

B24

S2_IORD#

B23
B22

S2_A11

B21

S2_VS1

B20

S2_OE#

B19

S2_CE2#

B18

S2_A10

B17
B16

S2_D15

B15

S2_CE1#

B14

S2_D14

B13

S2_D7

B12

S2_D13

B11

S2_D6

B10
B9
B8

S2_D5

B7

S2_D11

B6

S2_D4

B5

S2_CD1#

B4

S2_D3

B3
B2
B1

S2_CD2# 18
S2_WP 18

S2_BVD1 18

S2_BVD2 18
S2_REG# 18

S2_INPACK# 18

S2_WAIT# 18
S2_RST 18
S2_VS2 18

S2_VCC

S2_RDY# 18
S2_WE# 18

S2_IOWR# 18
S2_IORD# 18

S2_VS1 18
S2_OE# 18
S2_CE2# 18

S2_CE1# 18

S2_CD1# 18

C311
10U_1206

12
C301

56PF

S2_VCC

12

12

C318

C313

.1UF

1000PF

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPA L EL EC TRON ICS , INC . NE ITHE R TH IS SH EET N OR T HE IN FOR MAT ION I T CO NTAI NS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Inc

Title

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

19 40Saturday, December 23, 2000

of

0C

PDD11
PDD10
PDD9
PDD8
PDD1
PDD3
PDD14
PDD12

PDD0
PDD2
PDD4
PDD5
PDD6
PDD7
PDD15
PDD13

PDCS3#10
PDCS1#10
PDA010
PDA210

PDA110 PBA1 22

PDDACK#10

PDIOW#10
PDIOR#10

RP39

16
15
14
13
12
11
10

16P8R-33
RP46

16
15
14
13
12
11
10

16P8R-33
RP51

8P4R-33
R195

1 2

33
RP52

8P4R-22

1
2
3
4
5
6
7
89

1
2
3
4
5
6
7
89

18
27
36
45

18
27
36
45

PBD11
PBD10
PBD9
PBD8
PBD1
PBD3
PBD14
PBD12

PBD0
PBD2
PBD4
PBD5
PBD6
PBD7
PBD15
PBD13

PCS3#
PCS1#
PBA0
PBA2

PBA1

PBDIOW#
PBDIOR#

IDE Series Resistor

Place them close SB

+5VS

PDDREQ

1 2

R183

4.7K

PCS3# 22
PCS1# 22
PBA0 22
PBA2 22

PBDACK# 22
PBDIOW# 22

PBDIOR# 22

PDDREQ10

PDIORDY10

R127

1 2

R182

1 2

82

R196

1 2

R289

1 2

1K

PDDREQ

82

82

IIRQ14

PBIORDY

PBIORDY

IIRQ14 22IRQ149,13

PBDREQ 22

PBIORDY 22

SDD[0..15]10
PDD[0..15]10

SBD[0..15]21
PBD[0..15]22

SDA010
SDA210
SDCS1#10
SDCS3#10

SDIOW#10
SDIOR#10

SDDACK#10

SDD[0..15]
PDD[0..15]

SBD[0..15]
PBD[0..15]

SDD7
SDD8
SDD6
SDD9
SDD5
SDD10
SDD4
SDD11

SDD3
SDD2
SDD12
SDD13
SDD1
SDD14
SDD15
SDD0

SDA110

SDDACK#

RP30

1

16

2

15

3

14

4

13

5

12

6

11

7

10

8 9

16P8R-33
RP38

1

16

2

15

3

14

4

13

5

12

6

11

7

10

8 9

16P8R-33

RP45
1 8
2 7
3 6
4 5

8P4R-33

R126 33

1 2

RP36
1 8
2 7
3 6
4 5

8P4R-22

SBD7
SBD8
SBD6
SBD9
SBD5
SBD10
SBD4
SBD11

SBD3
SBD2
SBD12
SBD13
SBD1
SBD14
SBD15
SBD0

S_DA0
S_DA2
S_DCS1#
S_DCS3#

S_DA1

S_DIOW#
S_DIOR#

S_DDACK#

S_DA0 21
S_DA2 21
S_DCS1# 21
S_DCS3# 21

S_DA1 21

S_DIOW# 21
S_DIOR# 21

S_DDACK# 21

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPA L EL EC TRON ICS , INC . NE ITHE R TH IS SH EET N OR T HE IN FOR MAT ION I T CO NTAI NS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Inc

Title

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

20 40Saturday, December 23, 2000

of

0C

R36

1 2

4.7K

OSC1 OSC2

C29
10PF

+5VCD

+5VALW

C126
10U_1206

+5VALW

ISCDROM
CD_IRQ
CDASPN
MODE1

GPIO_0
GPIO_1
INTN

SDDREQ

X1

8MHZ
R11

1M

10UF_1206_10V

C28

R12 10K

1 2

D2

1N4148

C113
1UF_0805

+5VALW

R81 100K

1 2

1U_0805

SUSP#23,25,38,39

+5VCD

RP8
1 8
2 7
3 6
4 5

+5VCD

8P4R-10K

RP6
1 8
2 7
3 6
4 5

8P4R-10K

SDIORDY10

IRQ159,13
SDDREQ10
S_DDACK#20

SIDERST#22

C31
10PF

PLAYBTN34
FRDBTN34
REVBTN34
STOPBTN34

CD_INTA#24

21

+12VS

C139

SMD2,23,24

R39

1 2

100K

U7

1

S

2

S

3

S

4 5

GD

SI4425DY

1 2

R82 1K

22K

2

22K

Q15
DTC124EK

1 3

SMC2,23,24

SUSP# CDPLAY

S_DA020
S_DA120
S_DA220

S_DCS1#20
S_DCS3#20

S_DIOR#20
S_DIOW#20

SDDREQ
S_DDACK#

0

2N7002

2

8

D

7

D

6

D

13

Q7

+5VCD

R48 82

R30 33
R32 82

R23 33

R16

1 3

2

+5VCD

CDD[0..15]

SBD[0..15]

1 2

1 2
1 2

1 2

PLAYBTN
FRDBTN
REVBTN
STOPBTN

Q6
2N7002

13

22K

22K

R27

1 2

SBD0
SBD1
SBD2
SBD3
SBD4
SBD5
SBD6
SBD7
SBD8
SBD9
SBD10
SBD11
SBD12
SBD13
SBD14
SBD15

S_DA0
S_DA1
S_DA2

S_DCS1#
S_DCS3#

S_DIOR#
S_DIOW#

DM_ON

DM_ON

INTN

OSC1
OSC2

C153
10U_1206

2

Q16
DTC124EK

CD_SIORDY

1K

CDD[0..15] 22

SBD[0..15] 20

76
78
81
83
86
90
95
97

2
4

8
11
15
18
20
22

68
70
66

63
61

99

6
72
93

74
12
88

24
59

48
53
55
50
46

28
36
35
34
37

29
25
30

26

27

31
32

.1UF

HDD0
HDD1
HDD2
HDD3
HDD4
HDD5
HDD6
HDD7
HDD8
HDD9
HDD10
HDD11
HDD12
HDD13
HDD14
HDD15

HDA0
HDA1
HDA2

HCS0
HCS1

HDIOR#
HDIOW#
HIOCS16#
HIORDY

HINTRQ
HDMARQ
HDMACK#

HRESET#
HDASPN

HSYNC
HBIT_CLK
HDATA_OUT
HDATA_IN
HACRSTN

PAV_EN
PLAY/PAUSE
FFORWARD
REWIND
STOP/EJECT

PCSYSTEM_OFF
INTN
RESET#

SDATA

SCLK

OSCI
OSCO

C154

CD_PLAY 24

+5VOZ

94458

VDD

VDD

GND

GND

GND

GND

1633658592

VDD

CDIOR#

CDIOW#

CIOCS16#

CIORDY

CHINTRQ
CDMARQ

CHDMACK#

CRESET#

CDASPN

SBIT_CLK

SDATA_OUT

SDATA_IN
SACRSTN

PWR_CTL

ISCDROM

GPIO[1]/VOL_UP

GPIO[0]/VOL_DN

PAVMODE

GND

DM_ON

+5VOZ

C30

C43
.1UF

CDD0
CDD1
CDD2
CDD3
CDD4
CDD5
CDD6
CDD7
CDD8
CDD9
CDD10
CDD11
CDD12
CDD13
CDD14
CDD15

CD_SBA0
CD_SBA1
CD_SBA2

CD_SCS1#
CD_SCS3#

CD_SIOR#
CD_SIOW#
CIOCS16#
CD_SIORDY

CD_IRQ
CD_DREQ
CD_DACK#

1 2

@10K

1 2

1 2

MODE1

Q8
2N7002

C60
.1UF

.1UF

U2
OZ163

77

CDD0

79

CDD1

82

CDD2

84

CDD3

87

CDD4

91

CDD5

96

CDD6

98

CDD7

1

CDD8

3

CDD9

7

CDD10

10

CDD11

14

CDD12

17

CDD13

19

CDD14

21

CDD15

69

CDA0

71

CDA1

67

CDA2

64

CCS0

62

CCS1

100
5
73
94

75
13
89

CD_RSTDRV#

23

CDASPN

60
47

SSYNC

52
54
49
45

R14

51

R15 10K

ISCDROM

80

GPIO_1

39

GPIO_0

40

R22 1K

56

MODE0

57

MODE1

1 2

38

R13 10K

41

CSN

42

INCN

43

UDN

+5VCD

R33
100K

DM_ON#

13

2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPA L EL EC TRON ICS , INC . NE ITHE R TH IS SH EET N OR T HE IN FOR MAT ION I T CO NTAI NS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C54
.1UF

CD_SBA0 22
CD_SBA1 22
CD_SBA2 22

CD_SCS1# 22
CD_SCS3# 22

CD_SIOR# 22
CD_SIOW# 22

CD_SIORDY 22

CD_IRQ 22
CD_DREQ 22
CD_DACK# 22

CD_RSTDRV# 22

+5VCD

DM_ON# 34

1 2

L7 CHB1608U301

1 2

L8 CHB1608U301

SUSP#

+5VCD

+5VCD

R56
100K

DM_ON

13

2

Q12
2N7002

DM_ON 34

+5VCD

PLAYBTN
REVBTN
FRDBTN
STOPBTN

CDD3
CDD1
CDD2
CDD0
CDD4
CDD6
CDD5
CDD7

CDD8
CDD9
CDD10
CDD11
CDD12
CDD13
CDD14
CDD15

CD_DREQ

CIOCS16#

RP4
1 8
2 7
3 6
4 5

8P4R-10K

RP10
1
2
3
4
5
6
7
8 9

16P8R_4.7K

RP9
8 9
7
6
5
4
3
2
1

16P8R_4.7K

1 2

R31 5.6K

1 2
R34 47K

16
15
14
13
12
11
10

10
11
12
13
14
15
16

+5VCD

+5VCD

Compal Electronics, Inc

Title

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

21 40Saturday, December 23, 2000

of

0C

+5VS

12

C395

1000PF

IDE,CD-ROM & FDD Module CONN.

12

C391
10U_1210

C394

1UF_25V_0805

PBD[0..15]20

CDD[0..15]21

R292 10K

1 2

PBDREQ20
PBDIOW#20
PBDIOR#20
PBIORDY20
PBDACK#20
IIRQ1420
PBA120
PBA020
PCS1#20 PCS3# 20
PHDD_LED#24

+5VS

12

C396

.1UF

PIDERST#
PBD7
PBD6
PBD5
PBD4
PBD3
PBD2
PBD1
PBD0

IIRQ14
PBA1

PCS1#
DASP#

1 2

R288 100K

PBD[0..15]
CDD[0..15]

+5VS

JP21

12
34
56
78
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44

HDD 44P

PBD8
PBD9
PBD10
PBD11
PBD12
PBD13
PBD14
PBD15

PCSEL

PBA2PBA0

PCS3#

R291 470

+5VS

1 2

PBA2 20

+5VS

12

C367

1000PF

RP67

1 8
2 7
3 6
4 5

8P4R_1K

+5VS

+5VS

1 2

R350 1K

INDEX#30

DSKCHG#30

FDDIR#30

3MODE#30

WDATA#30
WGATE#30

TRACK0#30

RDATA#30
HDSEL#30

+5VS

RSTDRV

DRV0#24,30

MTR0#30

STEP#30

WP#30

WDATA#
WGATE#
HDSEL#
FDDIR#

+5VS

DRV0#

R266

1 2

10K

2

22K

22K

DSKCHG#
INDEX#
WP#
TRACK0#

12

C390
10U_1210

Place component's closely IDE CONN.Place component's closely CD-ROM CONN.

C365

1UF_25V_0805

12

C366

.1UF

RSTDRV9,30

INDEX#
DRV0#
DSKCHG#

MTR0#
FDDIR#

3MODE#
STEP#

WDATA#
WGATE#
TRACK0#
WP#
RDATA#
HDSEL#

13

RP66

6
7
8
9

10

10P8R_1K

PIDERST#

DTC124EK

+5VS

Q36

5
4
3
2
1

JP6

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

SFW26R-1STE1

STEP#
MTR0#
RDATA#

+5VS

+5VCD

CD_RSTDRV#21

CD_SIOW#21
CD_SIORDY21
CD_IRQ21
CD_SBA121
CD_SBA021
CD_SCS1#21
SHDD_LED#24

1 2

R304

CDROM_L34

CD_AGND34

1 2
R54 10K

SHDD_LED#

100K

SHDD_LED#

+5VCD

CD_RSTDRV#

CDD7
CDD6
CDD5
CDD4
CDD3
CDD2
CDD1
CDD0

12

R301
470

JP15

12
34
56
78
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50

CD-ROM CONN.

CDD8
CDD9
CDD10
CDD11
CDD12
CDD13
CDD14
CDD15

PDIAG#

W=80mils

1 2

C412

.1UF

R51

1 2

CDROM_R 34

CD_DREQ 21
CD_SIOR# 21

CD_DACK# 21

100K

+5VCD
CD_SBA2 21
CD_SCS3# 21

+5VCD
+5VCD

+5VCD

12

C63
1000PF

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPA L EL EC TRON ICS , INC . NE ITHE R TH IS SH EET N OR T HE IN FOR MAT ION I T CO NTAI NS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

W=80mils

12

C101

C78

1UF_25V_0805

10U_1210

Place component's closely CD-ROM CONN.

12

C100
.1UF

+5VCD

RSTDRV

R67

1 2

10K

2

SIDERST#

13

22K

22K

DTC124EK

SIDERST# 21

Q14

Compal Electronics, Inc

Title

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

22 40Saturday, December 23, 2000

0C

of

2

G

Q23
2N7002

S

R208

1 2

100K

+12VS

BIOSCS# 9

MEMR# 9,13

MEMW# 9,13
AEN 9,30

IOR# 9,13,30
IOW# 9,13,30
IOCHRDY 9,13,30

KBA[0..18]24

ADB[0..7]24

SA[0..18]9,13,30

SD[0..7]9,13,30
KSI[0..7]24
KSO[0..15]24

12

C281
.1UF

KBA[0..18]
ADB[0..7]
SA[0..18]
SD[0..7]
KSI[0..7]
KSO[0..15] SYSON

+3VALW

C282

1000PF

12

C352
.1UF

12

C321
.1UF

C326
1000PF

C376
.1UF

12

12

@CHB1608U800

1 2

R367 0

1 2

12

ECAGND

L37

12

L20

CHB1608U800

SA1

SA0

SA2

SA3

+3VALW

51AVCC

SA4

SA5

SA6

SA7

SA8

SA9

SA12

SA13

SA11

SA10

SD0

SA14

SA15

SA16

SA17

SD1

SD2

SD3

SD4

SD5

SD6

2N7002

Q25

SD7

2

1 3

D

G

S

Q24
2N7002

2

1 3

D

G

S

1 3

D

+3V

14

1 2

C358 .1UF

U37A

21

74LVC14

7

+3V POWER

ECSMI#

U19B

4

74LVC125

5 6

+3V POWER

EXTSMI#

R176

1 2

1K

+3V

EXTSMI# 10

EC_HPOWON9,35

CRY1

12

C330
10PF

GATEA209

IRQ19,13

IRQ129,13

+3VALW

R210
100K

R285
10K

RC#9

R241

1 2

22M

X4

32.768KHZ

242666

109

1602367

108

1619192

VCC

VCC

VCC

GND

GND

(P136)

VCC

AVCC

Non Shared Memories

Shared Memories

GND

GND

GND

KSI0

36

156
155
154
153

165

35
34
33
32
31
30
29

56
55
54
53
52
51
50
49
48
47
42
41
40
39
38
37

79
28

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15

IRQ1
IRQ8#
IRQ11
IRQ12

PFAIL#
HPWRON
VBAT

Environment ENV0 ENV1

IRE

IRD

Development

SHBM#(Shared/Non-Shared BIOS Memory)

1

0

HDEN#(Host Device Enable)

Mode

(P111)

Device are enabled o rese t

Devices are disabled on reset

KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15 ADB5

R279 10K

1 2

EC_HPOWON

+RTCVCC

1 2

166

167

168

169

HA0

HA1

HA2

170

HA3

01

80

AGND

AVREF

(P104) (P103)

00

01

171

172

173

174345678910111516171819202122157

HA4

HA5

HA6

HA7

HA8

HA9

HA10

HA11

HA12

HA13

HA14

HRMS#(Host Reset Mod e Sel ec t)

Mode HRMS#

Reset host when shared
memory access can not
be completed

Extend access until complete d

FXBUSEN#(FX Bus Interface Enable)

Mode FXBUSEN#

FX Bus Interface Enabled

ISA Bus Compatible Mode

HDEN#

1

0

HA15

HA16/PA3

HA17/PA4

(P105)

TRIS(TRI-STATE)

0

1

(P130)

HD0

HD1

HD2

HD3

HD4

HD5

HD6

HD7

162

HMEMCS#/PA0

(P102)

Normally

TriState

HMEMRD#/PA1

163

HMEMWR#/PA2

13

158

159

14

HIOR#

HIOW#

HIOCHRDY

HAEN/FXASTB#

2434445468788

NCNCNCNCNCNCNC

1

0

1

0

PG0/SELIO#

+3VS

R286

1 2

CRY2

10K

D27

1 2

2 1

RB751V

D28

2 1

RB751V

R240
51K

1 2
12

C329
33PF

G20

RCL#

PCM_SUSP#18

RING#29

SMC2,21,24
SMD2,21,24

INVT_PWM17

NUM_LED#34
CAPS_LED#34
ARROW_LED#34

32KX1

32KX2

PE0/HA18

PE1/A18

PB0/RING

PB1/SCL

PB2/SDA

PB3/TA

PB4/TB

PB5/GA20

PB6/HRSTO

PB7/SWIN

PC0

PC1

PC2

PC6/PSCLK3

PC7/PSDAT3

PSCLK1

PSCLK2

PSDAT1

PSDAT2

PD0/AD0

PD1/AD1

PC3/EXINT0

PC4/EXTINT11

PC5/EXINT15

252712

136717273747576777861626370695860575981

CRY1
CRY2

SA18
KBA18
RING#
CLK_SMB
DAT_SMB

PWM

G20
RCL#

ON/OFF10,34
EN_WOL#29
BATT_BQ36

SUSP#21,25,38,39

SUSP#

646568

PD2/AD2

82838485869394

1 2

R280 10K

+3VALW

DA0

DA1

DA2

PD3/AD3

PD4/AD4

PD5/AD5

BATT_TEMP
EXT_DATA
EXT_CLK
KBD_DATA
KBD_CLK
PS2_DATA
PS2_CLK

DA3

PD6/AD6

PD7/AD7

959697

Panasonic/Sanyo#

VBATT

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPA L EL EC TRON ICS , INC . NE ITHE R TH IS SH EET N OR T HE IN FOR MAT ION I T CO NTAI NS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PH1/BST1

PH3/PFS#

PH0/BST0

PH2/BST2

PH5/ISE#

PH4/PLI#

98

103

101

104

10299100

570SCI#
ECSMI#

TRIS/ACOFF

ENV1
ENV0

P/S#

BATT_TEMP 36
EXT_DATA 33
EXT_CLK 33
KBD_DATA 33
KBD_CLK 33
PS2_DATA 33,34
PS2_CLK 33,34

NC

NC

133

132

131 1

90

89

51ON 34

FAN_4.6V 25
FAN_4.2V 25

DAC_BRIG 17
DAC_CONTR 17
VOL_AMP 34
TRICKLE 37
P/S# 36

VOL_DW# 24,34
BATT_CHGI 37
VOL_UP# 24,34
VBATT 36

134

A13/BE0
A14/BE1

A15/PG1

A16/PA5
A17/PA6

SEL0#

WR0#

PG2/CLK

PG3/SEL1#

PG4/WR1#

PF0/D8

PF1/D9
PF2/D10
PF3/D11
PF4/D12
PF5/D13
PF6/D14
PF7/D15

HMR

NCNCNCNCNC NC

NC

175

176

A10
A11
A12

RD#

1 2

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9

D0
D1
D2
D3
D4
D5
D6
D7

R263
47K_1%

U28

KBA0

114

KBA1

115

KBA2

116

KBA3

117

KBA4

118

KBA5

119

KBA6

120

KBA7

121

KBA8

122

KBA9

123

KBA10

124

KBA11

125

KBA12

126

KBA13

127

KBA14

128

KBA15

129

KBA16

130

KBA17

135

ADB0

137

ADB1

138

ADB2

139

ADB3

140

ADB4

141
142

ADB6

143

ADB7

144

HDEN#

111

HRMS#

105
112

SELIO#

110

VGASUSP#_1

107

PCMRST#

106

ATFOUT#

113
145

G1/F1#

146
147
148
149

SYSON

150

ACIN

151

BKOFF#

152
164

PC87570-176PIN

VBATT

BATT_CHGI

BATT_TEMP

OCP 37

FRD# 24
FSEL# 24
FWR# 24

PIIX4_LID# 24
SUSA# 10,12

SUSB# 10
SUSC# 10
SYSON 25
ACIN 10,34,36
BKOFF# 15

51RST 34

C378 .01UF

1 2

C348 .01UF

1 2

C377 .01UF

1 2

CDON#/MAIL24

SELIO# 24
PCMRST# 19

ECAGND

CDON#34

ATFOUT#

+3VS

1 2

+3V

1 2

SCI#

1
2
3
4
5

10P8R_10K

1
2
3
4
5

R198

10K

R189

10K

+3V

12

HRMS#
ECSMI#
KBA18

KBD_DATA
KBD_CLK
PS2_DATA

ATF_INT# 10

R170

10K

SCI# 11

+5VS

U19C

10

74LVC125

9 8

ATFINT#

+3V POWER

VGASUSP#_1

U19D

13

74LVC125

12 11

+3V POWER

570SCI#

+3V

12
C344
.1UF

ENV1
KBA15
KBA16 ENV0
KBA17

+5VS

EXT_DATA PS2_CLK
EXT_CLK

1

14

2 3
7

+3V POWER

RP53

10

9
8
7
6

RP58

10

9
8
7
6

U36A

74LVC125

10P8R_10K

RP59

PCMRST#
SUSP#

RING#

8P4R_10K

1
2
3
4
5

10P8R_4.7K

CDON_BTN# 34

G1/F1#

RCL#

+3VALW

LID_SW# 24,34

888F1 Only

+3VALW

10

9
8
7
6

3

1 8
2 7
3 6
4 5

RP56

+3V

HDEN# BKOFF#

SELIO# G20

D23

1
2

DAN202U

Compal Electronics, Inc

Title

SCHEMATIC, M/B LA-854

Size Document Number Rev
B

401172

Date: Sheet

23 40Saturday, December 23, 2000

12

R353
@G-0

0C

of

+5VS

+3VALW

RP55

8P4R-100K

1 8

2 7

3 6

+3VALW

14

4
5

7

+3VALW

14

9

10

7

OE#

A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0

A0
A1
A2
A3

OE#

A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0

A0
A1
A2
A3

PCM_LED

U40B

74LVC32

U40C

74LVC32

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

4 5

FRD#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3

ADB2
ADB1
ADB0
KBA0
KBA1
KBA2
KBA3

FRD#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3

ADB2
ADB1
ADB0
KBA0
KBA1
KBA2
KBA3

VOL_DW#23,34
VOL_UP#23,34
CDON#/MAIL23
CD_INTA#21
BUTTON_LOCK#34

SHDD_LED#22
PHDD_LED#22
DRV0#22,30
OCCB#19

KBA2

D40

DAN202U

E_MAIL#34
INTERNET#34
BUTTON3#34
BUTTON4#34
ATF#2
LID_SW#23,34
ENVEE15

U49

1

A11

2

A9

3

A8

4

A13

5

A14

6

A17

7

WE#

8

VCC

9

A18

10

A16

11

A15

12

A12

13

A7

14

A6

15

A5

16

A4

SST39VF040_TSOP

U18

1

A11

2

A9

3

A8

4

A13

5

A14

6

A17

7

WE#

8

VCC

9

A18

10

A16

11

A15

12

A12

13

A7

14

A6

15

A5

16

A4

@29F040
KBA[0..18]
ADB[0..7]

3

SELIO#

KBA1
SELIO#

12

PCM_LED

R357

100K

SELIO#23

KBA11
KBA9
KBA8
KBA13
KBA14
KBA17
FWE#

KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4

+3VALW

KBA11
KBA9
KBA8
KBA13
KBA14
KBA17
FWE#

KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4

1
2

PCM1_LED18
PCM2_LED18

+3VALW

C255

1 2

.1UF

KBA[0..18]23

ADB[0..7]23

+5VCD

12

12

R190
100K

CC

6

+5VALW

RP57

8P4R-100K

1 8

2 7

3 6

4 5

E_MAIL#
INTERNET#

PME#

DD

8

FRD# 23
FSEL# 23

+3VALW
R356
100K

20

2 18

1A1 1Y1

4 16

1A2 1Y2

VCC

6 14

1A3 1Y3

8 12

1A4 1Y4

11 9

2A1 2Y1

13 7

2A2 2Y2

15 5

2A3 2Y3

17 3

2A4 2Y4

1

1G

19

2G

+3VALW

2 18

1A1 1Y1

4 16

1A2 1Y2

6 14

1A3 1Y3

8 12

1A4 1Y4

11 9

2A1 2Y1

13 7

2A2 2Y2

15 5

2A3 2Y3

17 3

2A4 2Y4

1

1G

19

2G

FWE#

4

U23
7SH32FU

GND

10

20

VCC

1 2

U21

74LVC244

C343

1 2

.1UF

U27

GND

10

C315

.1UF

74LVC244

+3VALW

.1UF

+5VALW

C369

1 2

20

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

+3VALW

12

2

2N7002

1

3 5

DD
AA
BB
CC

MMO_ON

LID_SW# LID#

PIIX4_LID#23

51RING#

R207

R206

1 2

100K

2

100K

G

Q27

1 3

D

S

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPA L EL EC TRON ICS , INC . NE ITHE R TH IS SH EET N OR T HE IN FOR MAT ION I T CO NTAI NS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3VALW

RP60

1 8
2 7
3 6
4 5

8P4R_100K

R272

1 2

+3V

D29

RB751V

D16

@RB751V

D15

RB751V
D39

RB751V

1 2

+12V

R276 100K

PCM_PME#18

MDMPME#28,29

AUD_PME#28,29

1 2

+12V

R349 @F100K

1394_PME#26

888G1 Only

+12VS

FLASH# 11
FWR# 23

10K

21

21

21

21

Q32
2N7002

Q48

@F2N7002

+3VALW

C357

1 2

U40A

.1UF

74LVC32

KBA3
SELIO# LARST#

VR_ON 36,39

LID# 10,13

PX4_RI# 10

KBA4
SELIO# LARST#

+3VALW

12

R233
10K

2

13

2

13

SMC2,21,23
SMD2,21,23

14

1
2

7

+5VALW

+3VALW

14
12

13

7

PME# 28,29

C372

1 2

.1UF

12

12

R368

4.7K

+5VALW +5VALW

R269

1 2

20K

U40D

74LVC32

+5VALW

R369

4.7K

3

11

U42
8
7
6
5

NM24C16

VCC
WC
SCL
SDA

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

AA

1 2

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

BB

C382

1UF_25V_0805

A0
A1
A2

GND

3
4 5
7 6

8 9
13 12
14 15
17 16
18 19

11

1

3
4 5
7 6

8 9
13 12
14 15
17 16
18 19

11

1

1

2

3

4

U35

D0
D1 Q1
D2 Q2
D3 Q3
D4 Q4
D5 Q5
D6 Q6
D7 Q7

CLK
CLR

+5VALW

20

D0
D1 Q1

VCC
D2 Q2
D3 Q3
D4 Q4
D5 Q5
D6 Q6
D7 Q7

CLK
CLR

+5VALW

12

12

Q0

VCC

GND

10

U34

Q0

GND

10

KSI[0..7]
KSO[0..15]

R265
100K

R274
100K

2

74HCT273

C278

1 2

.1UF

2

74HCT273

MMO_ON

51RING#

JP7

int. kb

PWR_LED# 34
EN_DFAN# 25

BATT_LOW_LED# 34
LLBATT# 10

BATT_CHGI_LED# 34
BEEP# 34

KSI[0..7] 23
KSO[0..15] 23

24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

EC_VOLUP# 28
EC_VOLDW# 28
MAIL_ACT_LED# 34

FSTCHG 37
CD_PLAY 21
SW_CLK/HDD_LED# 34
SW_DATA/CD_FDD_LED# 34

KSI1

1 8

KSI7

2 7

KSI6

3 6

KSO9

4 5

KSI4

1 8

KSI5

2 7

KSO0

3 6

KSI2

4 5

KSI3

1 8

KSO5

2 7

KSO1

3 6

KSI0

4 5

KSO2

1 8

KSO4

2 7

KSO7

3 6

KSO8

4 5

KSO6

1 8

KSO3

2 7

KSO12

3 6

KSO13

4 5

KSO14

1 8

KSO11

2 7

KSO10

3 6

KSO15

4 5

Compal Electronics, Inc

Title

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

24 40Saturday, December 23, 2000

CP10
8P4C-220P

CP11
8P4C-220P

CP12
8P4C-220P

CP13
8P4C-220P

CP14
8P4C-220P

CP15
8P4C-220P

of

0C

A

+3V

B

C

D

E

+

C304

1
2
3
4

1
2
3
4

+5VS
1

2
3
4

C302
.01UF

C138

.01UF

C387

.01UF

10UF_1206

6.3V

+

C157

10UF_1206

6.3V

+3VALW

U22

8

D1

S1

7

D1

G1

6

1 1

2 2

+

+3V

+

+5VALW

+

D2

5

D2

8936

C266
10UF_1206

6.3V

U9

8

D1

7

D1

6

D2

5

D2

8936

C158
10UF_1206

6.3V

U41

8

D1

7

D1

6

D2

5

D2

8936

C388

4.7UF_1206
16V

S2

G2

S1

G1

S2

G2

S1

G1

S2

G2

12

R221

+3VS

12

R96

+

C379

4.7UF_1206
16V

5VS_GATE

C478

1UF_0805

SYSON_ALW

@1M

C155

1UF_0805

5VS_GATE

2N7002

@1M

2N7002
Q45

Q17

C371

1UF_0805

1
3

1
3

R220 100K

SYSON#

2

R77

100K

SUSP

2

+12VALW

+12VALW

SUSP

2

Q31
2N7002

+5VALW

R227
10K

1
3

SYSON23

SYSON

+5VS+3VS +12VS +12V+3V +5V

1
3

C462
1UF_0805_50V
50V

R214
470

Q28
2N7002

2

+12VALW

C466
.1UF

2

R290
470

1

SUSPSUSP SUSP SYSON# SYSON# SYSON#

2

3

Q37
2N7002

+12VALW

R334
100K

2

R340
51K

1
Q43

3

2N7002

1
3

3
1

Q41

NDS352P

+12V

+

C287
1UF_1206_25V
25V

R343
470

2

Q29
2N7002

R55
470

Q13
2N7002

1

2

3

+5V

12

R344

100K

R192
470

1

2

3

Q44
2N7002

C468
.1UF

SUSP#

SUSP#21,23,38,39

2

+12VALW

1
3

R339
100K

R338
51K

1

Q40

3

2N7002

R335
470

2

Q47
2N7002

2

+12VALW

3
1

NDS352P

+

Q42

+12VS

C288
1UF_1206
25V

SUSP#

C481
1UF_0805
50V

SYSON#

Q30
2N7002

2

+5VALW

R219
10K

1
3

3 3

+5VALW

U31

D1
D1
D2
D2

8936

C325

4.7UF_1206
16V

1

S1

2

G1

3

S2

4

G2

.01UF

SYSON_ALW

C360

+

C324

4.7UF_1206
16V

C359

1UF_0805

+5V

+5V

12

R359

2.7K

12

EN_DFAN#24

EN_DFAN#

FAN_4.6V23 FAN_4.2V 23

1
Q53

2

3

2N7002

R360

10K

1

Q54

2

3

2N7002

8
7
6
5

+

4 4

+12V

12

R358

3.6K

21

D42

1N4148

Q52
2SA1036K

12

R361

6.8K

1

2

3

Q55
2N7002

FAN CONN.

+5V

1

C

2

B

12

E

3

C514
.1UF

2 1

Q51
2SC2411K

FAN1

D37
1N4148

D41

1SS355

2 1

FAN_CON_2P

JP16

1
2

12

C513
10UF_1206

Compal Electronics, Inc.

Title

PROPRIETARY NOTE

A

B

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

25 40Saturday, December 23, 2000

E

of

0C

5

888G1 Only

4

3

2

1

1394 Host controller

+3V

D D

C C

PCLK_1394

B B

12

C477

@F-0.01UF

12

R346

@F-33

12

C487
@F-10PF

AD24

12

C476

@F-0.01UF

1 2

R249 @F-100

12

C475

@F-0.01UF

AD[0..31]5,9,18,28,29

C/BE#05,9,18,28,29
C/BE#15,9,18,28,29
C/BE#25,9,18,28,29
C/BE#35,9,18,28,29

FRAME#5,9,13,18,28,29

IRDY#5,9,13,18,28,29

TRDY#5,9,13,18,28,29

DEVSEL#5,9,13,18,28,29

STOP#5,9,13,18,28,29

PERR#13,18,28,29
SERR#5,9,13,18,29

REQ#25,10
GNT#25

PIRQB#9,13,18,29

PCLK_139412

CLKRUN#5,9,13,18,28,29,30

1394_PME#24

PCIRST#5,9,18,19,28,29

CBRST#14,18,19,29

PAR5,9,13,18,28,29

12

C474

@F-0.01UF

12

C480

@F-0.01UF

AD[0..31]

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE#0
C/BE#1
C/BE#2
C/BE#3

PAR
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#

PERR#
SERR#

REQ#2
GNT#2

PIRQB#

PCLK_1394

1394_PME#
PCIRST#

12

C485

@F-0.1UF

U25

74

AD0

73

AD1

72

AD2

71

AD3

69

AD4

68

AD5

67

AD6

66

AD7

64

AD8

62

AD9

61

AD10

59

AD11

58

AD12

57

AD13

56

AD14

54

AD15

40

AD16

38

AD17

37

AD18

36

AD19

34

AD20

33

AD21

32

AD22

31

AD23

27

AD24

26

AD25

25

AD26

23

AD27

22

AD28

21

AD29

19

AD30

18

AD31

65

CBE#0

53

CBE#1

41

CBE#2

28

CBE#3

29

IDSEL

52

PAR

43

FRAME#

44

IRDY#

45

TRDY#

47

DEVSEL#

48

STOP#

49

PERR#

51

SERR#

15

PCIREQ#

14

PCIGNT#

8

INTA#

12

PCI_CLK

7

CLKRUN#

17

PCI_PME#

76

RST#

10

G_RST#

@F-TSB12LV26

12

C491

@F-0.1UF

12

C341

@F-0.1UF

VCCP
VCCP
VCCP
VCCP
VCCP

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

PHY_LREQ
PHY_DATA0
PHY_DATA1
PHY_DATA2
PHY_DATA3
PHY_DATA4
PHY_DATA5
PHY_DATA6
PHY_DATA7

PHY_CTL1
PHY_CTL0

PHY_SCLK

PHY_LINKON

PHY_LPS

GPIO2
GPIO3

SDA

CYCLEOUT

CYCLEIN

REG_EN#

REG18
REG18

GND
GND
GND
GND
GND
GND
GND
GND
GND

SCL

12

C339

@F-0.1UF

6
87
16
39
63

9
13
20
35
46
55
70
80
91
96

97
90
89
88
86
85
84
82
81

92
93
95

98
99

2
3

5
4

77
78
79

100
42

94
83
75
60
50
30
24
11
1

12

C338

@F-0.1UF

+3V

GPIO2
GPIO3

SEEPROM_DATA
SEEPROM_CLK

R205 @F-4.7K

12

C482

@F-4.7UF_0805

PHY_LREQ 27
PHY-DATA0 27
PHY-DATA1 27

PHY-DATA2 27
PHY-DATA3 27
PHY-DATA4 27
PHY-DATA5 27
PHY-DATA6 27

PHY-DATA7 27

PHY-CTL1 27
PHY-CTL0 27

PHY_SYSCLK 27
CMC_LKON 27

PHY_LPS 27

C340
@F-0.01UF

12

C279
@F-0.01UF

GPIO2
GPIO3

SEEPROM_CLK
SEEPROM_DATA

+3V

SEEPROM_CLK
SEEPROM_DATA

R345
@F-220
R342
@F-220

1 2

R354 @F-220

1 2

R355 @F-220

C355

@10K

@0.1UF

R259

1 2

R261

1 2

R260

1 2

+5V

12

@2.7K
@2.7K

8
7
6
5

U38

VCC
NC
SCL
SDA

@24C02

VSS

1

A0

2

A1

3

A2

4

Do not place these parts.

A A

Compal Electronics,Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPA L EL EC TRON ICS , INC . NE ITHE R TH IS SH EET N OR T HE IN FOR MAT ION I T CO NTAI NS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

SCHEMATIC, M/B LA-854

Size Document Number Rev
B

401172

Date: Sheet

26 40Saturday, December 23, 2000

1

of

0C

5

4

3

2

1

12

C484

@F-0.01UF

PHY

C455
@F-4.7UF_0805

888G1 Only

1 2

+3V

D D

C243

@F-0.1UF

C C

B B

12

C228 @F-18PF

@F-24.576 MHz

12

C249 @F-18PF

Y2

L35

@F-0_0805

1 2

+3VPLL

1 2

PLL_GND

L34
@F-CHB2012U121_0805

1 2

12

C457
@F-0.1UF

R327
@F-1M

R328

@F-6.34K_1%

1 2

C459 @F-0.1UF_10%

1 2

R330 @F-1K

PLL_GND

+3VPLL

+3V

X2

PWRDN

+3V

+3VDDA

12

12

C209

C224

@F-0.1UF

@F-0.1UF

U16

25

DVDD

26

DVDD

61

DVDD

62

DVDD

56

PLLVDD

40

R0

41

R1

X1

59

XI

60

XO

54

FILTER0

55

FILTER1

14

PD

53

RESET#

20

PC0

21

PC1

22

PC2

27

TESTM

28

SE

29

SM

16

NC

43

NC

44

NC

45

NC

46

NC

47

NC

57

PLLGND

58

PLLGND

17

DGND

18

DGND

63

DGND

64

DGND

@F-TSB41LV01

AVDD
AVDD
AVDD
AVDD
AVDD

CPS

ISO#

CNA

LREQ

SYSCLK

CTL0
CTL1

C/LKON
TPBIAS

TPA+

TPA-

TPB+

TPB-

AGND
AGND
AGND
AGND
AGND
AGND

LPS

D0
D1
D2
D3
D4
D5
D6
D7

12

C227

@F-0.1UF

51
52
30
31
42

24
23

15
3

1
2

4
5
6
7
8
9
10
11
12
13

19
38

37
36

35
34

32
33
39
48
49
50

12

C456

@F-0.1UF

+3VDDA

PHY_SYSCLK

R143 @F-56
R149 @F-56

TPBIAS0

R150
@F-56

C198
@F-270PF

R331@F-1K

PHY_LREQ 26
PHY_SYSCLK 26

PHY-CTL0 26
PHY-CTL1 26
PHY-DATA0 26
PHY-DATA1 26
PHY-DATA2 26
PHY-DATA3 26
PHY-DATA4 26
PHY-DATA5 26
PHY-DATA6 26
PHY-DATA7 26

R144
@F-56

R139
@F-5.1K

TPA0+
TPA0-

TPB0+
TPB0-

L33

@F-0_0805

+3V+3VDDA

+3V

12

12

C250

@F-0.01UF

12

C490
@F-0.1UF

1 2

R199 @F-33

12

C259

@F-0.01UF

12

C492
@F-1000PF

C268 @F-33pF

C461

@F-0.01UF

12

R333
@F-4.7K

C202
@F-1UF

PHY_LPS 26

R332
@F-10K

R200

@F-1K

CMC_LKON 26

12

C458

@F-0.01UF

+3V +3V +3V

12

C488

@F-0.01UF

PHY_SYSCLK

TPB0­TPB0+
TPA0­TPA0+

A A

R337

@F-0_1206

R336

@F-0_1206

JP17

1

1

2

2

3

3

4

4

@F-FOXCONN-UV31413

Compal Electronics,Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPA L EL EC TRON ICS , INC . NE ITHE R TH IS SH EET N OR T HE IN FOR MAT ION I T CO NTAI NS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

SCHEMATIC, M/B LA-854

Size Document Number Rev
B

401172

Date: Sheet

27 40Saturday, December 23, 2000

1

of

0C

1

PAR5,9,13,18,26,29

1 2

AD[0..31]

1 2

0

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

PCLK_AUD

R255 100

100

45
44
43
42
41
40
39
38
34
33
32
31
30
29
26
25

99
94
93
92
89
88
87
86
85

35
24
11
95

78
79
80
81
82
90
96
12
13
14
17
20
21
23
64

48
61
67
68

8
7
6
3
2
1

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE[0]#
C/BE[1]#
C/BE[2]#
C/BE[3]#

INTA#
RST#
PCICLK
GNT#
REQ#
CLKRUN#
IDSEL
FRAME#
IRDY#
TDRY#
DEVSEL#
STOP#
PERR#
PAR
PME#

TEST
TESTSEL
VOLUP
VOLDN

1 2

1 2

CRYVDD

+3VS

1 2

100K
R232

C528

22PF

IAC_BITCLK 34
IAC_SDATAO 34
IAC_SDATAI 34
IAC_SYNC 34
IAC_RST# 34

4.7K

+3VS

+3VS

+3VS

12

C307
1000PF

R216

1 2

12

C308
.1UF

100K

L19

1 2

CHB1608U800

+3VS

12

12

12

12

12

12

C309

C306

.1UF

.1UF

Place component's to CS-4281

+3VS

C328
.1UF

C356
.1UF

C353
.01UF

12

C373
.01UF

C335

12

C374

+

10UF_6.3V_1206

.01UF

1 2

71
72
73
74
75
63
91
76
77

49
50
51
52
53
54
55
56
57
60

22
16
15

66
69
65
70
9

58
83

97
5
18
28
36
47

84
98
4
19
27
37
46

62
59
10

R373 33

R225 47

R224 47

R248

1 2

R226 100K

R218 100K

1 2

U30

ABITCLK
ASDOUT

ASDIN

ASYNC

ARST#

ASDIN2/GPIO1

EECLK/GPOUT/PCREQ#

EEDAT/GPIO2/PCGNT#

GPIO3

JACX
JACY
JBCX
JBCY
JAB1
JAB2
JBB1
JBB2

MIDIIN

MIDIOUT

IRQA
IRQB

IRQC
CRYVDD
CRYGND

VAUX

VDD5REF

CVDD[1]
CVDD[2]

PCIVDD[0]
PCIVDD[2]
PCIVDD[3]
PCIVDD[4]
PCIVDD[5]
PCIVDD[6]
PCIVDD[7]

PCIGND[0]
PCIGND[2]
PCIGND[3]
PCIGND[4]
PCIGND[5]
PCIGND[6]
PCIGND[7]

CGND[3]
CGND[2]
CGND[1]

AD[0..31]5,9,18,26,29

Place closely to CS4280

PCLK_AUD

12

R236

33

12

C322

22PF

A A

C/BE#05,9,18,26,29
C/BE#15,9,18,26,29
C/BE#25,9,18,26,29
C/BE#35,9,18,26,29

PIRQC#9,13
PCIRST#5,9,18,19,26,29

PCLK_AUD12

GNT#45
REQ#45,10

CLKRUN#5,9,13,18,26,29,30

AD195,9,18,26,29

FRAME#5,9,13,18,26,29

IRDY#5,9,13,18,26,29
TRDY#5,9,13,18,26,29

DEVSEL#5,9,13,18,26,29

STOP#5,9,13,18,26,29
PERR#13,18,26,29

AUD_PME#24,29

R239

EC_VOLUP#24

EC_VOLDW#24

+3VS

R217

1 2

100K

CS4281-CQ

PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

Compal Electronics, Inc .

Title

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

28 40Saturday, December 23, 2000

of

0C

+3VALW

EN_WOL#23

12

C383
@1UF_25V_0805

Q33
@SI2301DS

S

G

2

D

13

1 2

R273

@100K

+3.3VAUX

12

R362

1 2

C375
@1UF_25V_0805

+5VALW

+3V

0

JP12

1

1

2

2

3

3

4

4

5

5

6

6

RJ11/RJ45

MINI_RI#

PCM_RI#18

PCM_RI#

D43

2

3

1

RB717F

RING# 23

+3VS_MINIPCI

+3V

CHB1608U121

PCLK_MINI

12

R187
10

12

C270
33PF

L14

1 2

0603

W=40mils

C/BE#35,9,18,26,28

TIP RING

1 2

R211 100

MOD_AUDIO_MON

MINI_RI#

1 2

L22 0

0603

AD[0..31]

PIRQB#

AD31
AD29

AD27
AD25

AD23
AD21

AD19
AD17

AD14
AD12

AD10
AD8

AD7
AD5
AD3

W=30mils

AD1

W=30mils W=20mils

PIRQB#9,13,18,26

REQ#05,10 GNT#0 5

PCLK_MINI12

REQ#15,10

AD28

C/BE#25,9,18,26,28

IRDY#5,9,13,18,26,28

CLKRUN#5,9,13,18,26,28,30

SERR#5,9,13,18,26

PERR#13,18,26,28
C/BE#15,9,18,26,28

+5VS_MINIPCI

+5VS

+5VS_MINIPCI

JP18

1 2

12

KEY KEY

3 4

34

5 6

56

7 8

78

9 10

910

11 12

11 12

13 14

13 14

15 16

15 16

17 18

17 18

19 20

19 20

21 22

21 22

23 24

23 24

25 26

25 26

27 28

27 28

29 30

29 30

31 32

31 32

33 34

33 34

35 36

35 36

37 38

37 38

39 40

39 40

41 42

41 42

43 44

43 44

45 46

45 46

47 48

47 48

49 50

49 50

51 52

51 52

53 54

53 54

55 56

55 56

57 58

57 58

59 60

59 60

61 62

61 62

63 64

63 64

65 66

65 66

67 68

67 68

69 70

69 70

71 72

71 72

73 74

73 74

75 76

75 76

77 78

77 78

79 80

79 80

81 82

81 82

83 84

83 84

85 86

85 86

87 88

87 88

89 90

89 90

91 92

91 92

93 94

93 94

95 96

95 96

97 98

97 98

99 100

99 100

101 102

101 102

103 104

103 104

105 106

105 106

107 108

107 108

109 110

109 110

111 112

111 112

113 114

113 114

115 116

115 116

117 118

117 118

119 120

119 120

121 122

121 122

123 124

123 124

Mini-PCI SLOT

AD[0..31] 5,9,18,26,28

LAN RESERVEDLAN RESERVED

W=30mils

PIRQD#

W=40mils

MINI_RST#

GNT#1

AD30
AD28

AD26
AD24

MINI_IDSEL

AD22
AD20

AD18
AD16

AD15
AD13
AD11

AD9

AD6
AD4
AD2
AD0

MOD_AUDIO_MON

12

C256
.1UF

1 2

+3.3VAUX

+3.3VAUX

R212

100

MINI_RST#

+5VS_MINIPCI

PIRQD# 9,13

GNT#1 5
MDMPME# 24,28

AD27

PAR 5,9,13,18,26,28

W=40mils

1 2

R365 0

1 2

R366 @0

PCIRST#

+3VS_MINIPCI

L18

1 2

CHB1608U121

0603

PCIRST# 5,9,18,19,26,28
CBRST# 14,18,19,26

+3V

IDSEL : AD27

FRAME# 5,9,13,18,26,28
TRDY# 5,9,13,18,26,28
STOP# 5,9,13,18,26,28

DEVSEL# 5,9,13,18,26,28

C/BE#0 5,9,18,26,28

C297
.1UF

C275
.1UF

C336
.1UF

MD_SPK 34

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPA L EL EC TRON ICS , INC . NE ITHE R TH IS SH EET N OR T HE IN FOR MAT ION I T CO NTAI NS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

L21

1 2

0_0805

C260
.1UF

12

C342
@1000PF

12

C241
.1UF

12

C245
@.1UF

C265
.1UF

12

C368
@.1UF

12

C323
.1UF

+5VS_MINIPCI

C389
@10U_1210

12

C295
.1UF

+3VS_MINIPCI

C286
10U_1210

Compal Electronics, Inc

Title

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

29 40Saturday, December 23, 2000

of

0C

A

B

C

D

E

SUPER I/O SMsC FDC37N869

1 1

U4

46

D0

47

D1

48

D2

49

D3

51

D4

52

D5

53

D6

54

D7

26

A0

27

A1

28

A2

29

A3

30

A4

31

A5

32

A6

39

A7

40

A8

41

A9

95

A10

35

A11

36

A12

1

A13

3

A14

25

A15

55

RESET

44

AEN

42

IOR#

43

IOW#

98

IOCHRDY

33

TC

37

SIRQ

92

CLKRUN#

38

CLK33

19

DRQ_A

50

FDRQ(DRQ_B)

97

PDRQ(DRQ_C)

17

DRQ_D

20

DACK_A#

34

FDACK#(DACK_B#)

94

PDACK#(DACK_C#)

22

DACK_D#

18

CLK14

96

IRQIN

70

VCC

13

VCC

93

VSS

65

VSS

45

VSS

4

VSS

SMsC FDC37N869

BUSY
SLCT

ERROR#

ACK#

INIT#
AUTOFD#
STROBE#

SLCTIN#

DTR2#
CTS2#
RTS2#
DSR2#

TXD2/IRTX

RXD2/IRRX

DCD2#

DTR1#
CTS1#
RTS1#
DSR1#

TXD1
RXD1

DCD1#

IRMODE

IRRX2

IRTX2

RDATA#
WDATA#
WGATE#

HDSEL#

DIR#

STEP#

DS0#

INDEX#
DSKCHG#
WRTPRT#

TRK0#
MTR0#

DRVDEN0
DRVDEN1

PWRGD/GAMECS#

PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7

RI2#

RI1#

PE

DACK#[0..3]

DRQ[0..3]

1 2

R64 33

+3VS

SD[0..7]

SA[0..19]

C58

4.7UF_0805

10V

SD[0..7]9,13,23

SA[0..19]9,13,23

DACK#[0..3]10

DRQ[0..3]10,13

2 2

RSTDRV9,22

AEN9,23
IOR#9,13,23
IOW#9,13,23

IOCHRDY9,13,23

TC10

SIRQ9,13,18

CLKRUN#5,9,13,18,26,28,29

PCLK_SIO12

1 2

C114 22PF

14.3M_SIO12

3 3

R37
10

1 2

C77
15PF

1 2

1 2

R18 10K

12

SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7

SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
SA10
SA11
SA12
SA13
SA14
SA15

DRQ0
DRQ2
DRQ3
DRQ1

DACK#0
DACK#2
DACK#3
DACK#1

C66
.1UF

LPD[0..7]
LPD0

69

LPD1

68

LPD2

67

LPD3

66

LPD4

64

LPD5

63

LPD6

62

LPD7

61
59

58
57
73
60
72
74
75
71

91

CTS#2

90
89

DSR#2

88
87
86

DCD#2

85

RI#2

84

DTR#1

81

CTS#1

80

RTS#1

79

DSR#1

78

TXD1

77

RXD1

76

DCD#1

83

RI#1

82
21

23
24

14
7
8
9
5
6
2
10
15
12
11
100
99

16
56

12

R19 1K

R20 1K

R293 1K

RDATA#
WDATA#
WGATE#

HDSEL#

FDDIR#

STEP#

DRV0#

INDEX#

DSKCHG#

WP#

TRACK0#

MTR0#

C81
.1UF

LPD[0..7] 31

LPTBUSY 31
LPTPE 31
LPTSLCT 31
LPTERR# 31
LPTACK# 31
INIT# 31
LPTAFD# 31
LPTSTB# 31
SLCTIN# 31

1 2

1 2

1 2

R17 10K

1 2

R42 1K

+3VS

IRRX 32
IRMODE 32

IRTXOUT 32
RDATA# 22

WDATA# 22
WGATE# 22
HDSEL# 22
FDDIR# 22
STEP# 22
DRV0# 22,24
INDEX# 22
DSKCHG# 22
WP# 22
TRACK0# 22
MTR0# 22
3MODE# 22

12

+5VS
+3VS

DCD#1
RI#1
CTS#1
DSR#1

1 8
2 7
3 6
4 5

888F1 Only

1 2

R41 @G-1K

RP61

8P4R-4.7K

+3VS

+5V

CTS#2
DSR#2
DCD#2
RI#2

RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1

RP5

1 8
2 7
3 6
4 5

8P4R-4.7K

JP1

1
2
3
4
5
6
7
8
9

10

@96212-1011S

+3VS

1
2
3
4
5
6
7
8
9
10

4 4

Compal Electronics, Inc.

Title

PROPRIETARY NOTE

A

B

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

30 40Saturday, December 23, 2000

E

of

0C

+3V POWER

4

56

U36B
74LVC125

+5V_PRN

109876

12345

+5V_PRN

109876

12345

LPTSLCT
LPTPE
LPTBUSY
LPTACK#

RP1
10P8R-2.7K

+5V_PRN

AFD#/3M#
LPTERR#
LPTINIT#
LPTSLCTIN#

FD4
FD5
FD6
FD7

RP62
10P8R-2.7K

+5V_PRN

FD3
FD2
FD1
FD0

R296
33

INIT#30

SLCTIN#30

LPD[0..7]30

1 2

R295
33

1 2

LPD3 FD3
LPD2 FD2
LPD1 FD1
LPD0 FD0
LPD7 FD7
LPD6 FD6
LPD5 FD5
LPD4 FD4

RP3
1 8
2 7
3 6
4 5

8P4R-68

LPD[0..7]

LPTINIT#

LPTSLCTIN#

RP2
1 8
2 7
3 6
4 5

8P4R-68

PARALLEL PORT

+5V_PRN

D36

2 1

+5VS

LPTSTB#30

LPTAFD#30
LPTERR#30

LPTACK#30

LPTBUSY30

LPTPE30

LPTSLCT30

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPA L EL EC TRON ICS , INC . NE ITHE R TH IS SH EET N OR T HE IN FOR MAT ION I T CO NTAI NS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

LPTSTB#
AFD#/3M#

FD0
LPTERR#

LPTINIT#
FD2
LPTSLCTIN#
FD3

FD4
FD5
FD6
FD7
LPTACK#
LPTBUSY
LPTPE
LPTSLCT

RB420D

R294

R3

33

R4

2.2K

C398
220PF

33

1

14

2

15

3

16

4

17

5

18

6

19

7

20

8

JP9

21

9

LPTCN-25

22
10
23
11
24
12
25
13

AFD#/3M#
LPTERR#
LPTINIT#
LPTSLCTIN#

LPTACK#
LPTBUSY
LPTPE
LPTSLCT

FD0
FD1
FD2
FD3FD1

FD4
FD5
FD6
FD7

CP1
1 8
2 7
3 6
4 5

8P4C-220PF

CP9
4 5
3 6
2 7
1 8

8P4C-220PF

CP3
1 8
2 7
3 6
4 5

8P4C-220PF

CP2
1 8
2 7
3 6
4 5

8P4C-220PF

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-854

Size Document Number Rev

401172

Date: Sheet

31 40Saturday, December 23, 2000

of

0C

+5VS

OVCUR#010

F2

POLYSWITCH_0.75A

12

C403

1000PF

USB_VCCA

12

12

R298

470K

R297

560K

12

C404
.1UF
USB_AGND

C2

150UF_E

+

C3

@F-6.8UF_6.3V_A

+3VS

FIR Module

12

12

+

IRMODE30

C1
@F-.47UF

1 2

R380 @F-10K

1 2

R381 @F-10K

IRMODE

The component's most place
cloely IRDA MODULE.

1

4
5
3

U1

VCC

MODE0
MODE1
FIR_SEL

LEDA

AGNDGND

RXD

@F-HSDL-3600

FIR_VCC

TXD

N.C

10
27
9
8
6

IRTXOUT
IRRX

W=40mils

IRTXOUT 30
IRRX 30

888G1 Only

+3VS

12

R1
@F-2.2_1206

1/4W

C4

+

@F-6.8U_A

+5VS

OVCUR#110

USB0_D-10

USB0_D+10

F5

POLYSWITCH_0.75A

12

USB1_D-10

USB1_D+10

C408

1000PF

USB_VCCB

12

12

USB0_D­USB0_D+

R299

470K

R300

560K

USB1_D­USB1_D+

L26
0_0805

1 2
1 2

L27
0_0805

L31

CHB4516G750_1806

4516

12

C401

C407

150UF_E

.1UF

USB_BGND

L28
0_0805

1 2
1 2

L29
0_0805

L30

CHB4516G750_1806

4516

JP13

1
2
3
4

C400
.1UF

C402
.1UF

USB_CONN1

JP14

1
2
3
4

USB_CONN1

12

12

+

12

12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPA L EL EC TRON ICS , INC . NE ITHE R TH IS SH EET N OR T HE IN FOR MAT ION I T CO NTAI NS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Inc

Title

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

32 40Saturday, December 23, 2000

of

0C

5

4

3

2

1

+5VS

3

E

47K

D D

1

C

2

@G-FMMT3904

TP_VCC

C C

3

12

E

B

Q49

R363

@G-100K

B

47K

C

1

12

C512

@G-1UF

888F1 Only

Q50

@G-DTA144EKA

2

JP5

1

1

2

2

3

3

4

4

5

5

6

6

@G-96212-0611S

12

@G-.1UF

U29

1

BX

VCC

2

BY

BO

3

CY

AO

4

CO

AY

5

CX

AX

6

INH

A

7

VEE

B

8 9

GND C

@G-74VHC4053

C354

TP_VCC

16
15
14
13
12
11
10

U39

Y3

@G-4MHz

PS2_DATA
PS2_CLK

C384

1 2

@G-33PF

1 2

1 2

C385 @G-33PF

TP_VCC

PS2_DATA 23,34
PS2_CLK 23,34

12

C393

@G-.1UF

14

Z_SIG0

15

Z_SIG1

12

DRV_XY0

13

12

C392
@G-1UF

4
2
3

26
27
28
29
30

5
31
32

1

6
25

24
23
22

1 2

R287

DRV_XY1
DRVZ

SELX
SELZ

SPWR0
SPWR1
SPWR2
SPWR3
SPWR4

VREF
DA
OFST
AD
RESET#
RB#

SUB#
LB#
SB#

@G-UR7HCPXZ-P444

TP_VCC

@G-100K

1 2

R258 @G-3.16K_1%

12

C386

R257

@G-1K

C370

12

SW_R#
SW_UP#
SW_L#

SW_DW#

@G-.1UF

12

C397

@G-100PF

VCC

U43

5
1

3
2

VEE

@G-LMV321_SOT23-5

1 2

R268 @G-2.7K

4

12

@G-.1UF

SW_R#34

SW_UP#34

SW_L#34

SW_DW#34

MDAT
MCLK

XCLK1

XCLK

XDAT

OSCIN

OSCOUT#

SDB#

VDD

GND
GND

21
20

18
17

16

9

10

19
8
11

7

B B

JP10

12

@F-KBD/PS2_6

4
2
1

563

C26
@F-220PF

12

C25
@F-220PF

+5VS

KBD_DATA23

KBD_CLK23

POLYSWITCH_1.1A

+5VS

EXT_DATA23

EXT_CLK23

A A

F3

@F-POLYSWITCH_1.1A

EXT_DATA
EXT_CLK

L4

1 2

@F-CHB1608U800

1 2

L3

@F-CHB1608U800

0603

12

C13

@F-1000PF

PS2_VCC

12

C27
@F-220PF

EXT_CLK
EXT_DATA

F1

L38
@G-CHB1608U800

1 2
1 2

L39
@G-CHB1608U800

KB_VCC

L6

1 2

CHB1608U800

1 2

L5

CHB1608U800

888G1 Only

1

Q56

3

2

C14
1000PF

12

3

2

1

12

@SMO5

C17

220PF

Q57
@SMO5

Keyboard CONN.PS2 CONN.

12

12

C525

@G-220PF

JP11

KBD/PS2_6

4
2
1

C16

220PF

12

C526

@G-220PF

563

12

C15

220PF

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPA L EL EC TRON ICS , INC . NE ITHE R TH IS SH EET N OR T HE IN FOR MAT ION I T CO NTAI NS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

33 40Saturday, December 23, 2000

1

of

0C

5

Reset Button

+3VALW

C280

C364

2

R193

4.7K

10K

10K

22K

B

22K

12

31

51RST

51ON_RST#

+3VALW

12

R264

ON/OFF

1

51ON#

2

13

C

E

+3V

14

7

PCM_SPK#18

+3V

14

7

Q26
DTA114EK

100K

Q35

U37B

+3V POWER

U37C

74LVC14

+3V POWER

43

74LVC14

65

D14

D D

SW3

MEOFFBTN

C C

B B

A A

SW2

3

4

HCH SMT1-02

BEEP#24

3

DAN202U

51ON23

5

D45

1
2

1

ON/OFFBTN#

2

+3VALW

12

13

D

S

10

9 8

U36C

74LVC125

1N4148

R275

4.7K

1 2

R267
33K

2

G

2N7002

Q34

+3V

12

R270
100K

1 2

+3V POWER

SPKR9

2 1

12

1UF_25V_0805

1 2

D25

3

DAN202U

2

DTC124EK

R271 8.2K

.22UF

4

51RST 23

ON/OFF 10,23
51ON# 37

12

C380

1000PF

WHEN R=0,Vbe=1.35V
WHEN R=33K,Vbe=0.8V

C303
1UF

1 2

C314

1 2

1UF

C319

1 2

1UF

4

D26

12

RLZ20A

2 1

1 2

R231

1 2

560

R234

1 2

560

CDON#23

R228
560

12

EMAIL_ON#

51ON_RST#

MONO_IN_R

R223
10K

2 1

3

CHGRTC

2

D46

1
2

DAN202U

51ON#

13

3

1

2

12

D20

21

RB751V

FRDBTN21

REVBTN21

STOPBTN21

PLAYBTN21

D17
RB751V

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPA L EL EC TRON ICS , INC . NE ITHE R TH IS SH EET N OR T HE IN FOR MAT ION I T CO NTAI NS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R370
20K

1 2

BUTTON_LOCK#24

C527

1UF

12

R371
1M

D24

2 1

RB751V
D22

2 1

RB751V
D18

2 1

RB751V
D19

2 1

RB751V

LID_SW#23,24

3

D44

RB751V

2 1

2

Q59
2N7002

BUTTON_LOCK#

BTN1#

BTN2#

BTN3#

BTN4#

LID_SW#

12

R372
100K

13

INTERNET# 24

E_MAIL# 24

BUTTON3# 24

BUTTON4# 24

SW1

3

4

HORNG CHIH

2

Q58
2N7002

+5VCD

2

12

C522
10UF_1206

SW_CLK/HDD_LED#24

SW_DATA/CD_FDD_LED#24

1

CDON_BTN# is Low , enable CD_PLAY
MAIL is High , enable
MAIL

MAIL_ACT_LED#24

CDON_BTN#23

VOL_UP#23,24

VOL_DW#23,24

VOL_AMP23

PWR_LED#24

PS2_CLK23,33

PS2_DATA23,33

SW_DW#33

SW_UP#33

SW_R#33
SW_L#33

IAC_BITCLK28
IAC_SDATAI28

IAC_SDATAO28

IAC_SYNC28

IAC_RST#28

BATT_LOW_LED#24

DM_ON21

DM_ON#21

BATT_CHGI_LED#24

MD_SPK29

CD_AGND22
CDROM_L22

CDROM_R22

12

C523

10UF_1206

+3VS

+5VALW

+5VS

BTN1#
BTN2#

BTN4#
BTN3#

BUT_LOCK#BUT_LOCK#
EMAIL_ON#

SW_DW#
SW_UP#
SW_R#
SW_L#

MONO_IN_R

12

C524

10UF_1206

JP4

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50

HEADER 50

System Window Connector

JP3

ACIN10,23,36

CAPS_LED#23

ARROW_LED#23

NUM_LED#23

+5VALW

+5VS
+3VS

1

2

3

4

5

6

7

8

9
10

96212-1011S

1
2
3
4
5
6
7
8
9
10

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

1

34 40Saturday, December 23, 2000

0C

of

A

+3V +3V +3V +3V +3V +3VS

12

12

12

C516

C517

.1UF

1 1

+3VS +3VS +3VALW +3VALWCPU_CORE CPU_CORE

.1UF

C518
.1UF

12

C519

.1UF

B

12

12

C520

.1UF

C521
.1UF

C

D

E

U6

RST

R253

330K

R251

330K

12

R252

47K

R243

47K

C128

.1UF

7
8
5

+3V

+5V

D

+3V +3V

U37D

14

74LVC14

7

+3V POWER +3V POWER

C347
.1UF

+3V

U37F

14

74LVC14

7

13

12 11

U36D

74LVC125

+3V POWER

+3V POWER

Title

Size Document Number Rev

Date: Sheet

C346
.1UF

U37E

14

89

7

+3V

2
1

3 5

1213

EC_HPOWON 9,23

12

SPWROFF# 9,23

R250
10K

1011

74LVC14

1 2

C345 .1UF
U32

7SH32FU

RSMRST#

4

Compal Electronics, Inc.

SCHEMATIC, M/B LA-854

B

401172

E

RSMRST# 4,10

35 40Saturday, December 23, 2000

of

0C

RTC BATT

BATT1

-+

+RTCBATT

12

RTCBATT

2 2

1 2

+RTCVCC

J9
JOPEN

C349
.1UF

1

D38
HSM1265

3

2

CHGRTC

DC/DC INTERFACE

J2

+12VALWP

3 3

+5VALWP

+3VALWP

+CPU_COREP CPU_CORE

4 4

+CPU_IOP

+2.5VP

2 1

JOPEN/+12V

J4

1 2

PAD-OPEN 4x4m
J3

1 2

PAD-OPEN 4x4m
J6

1 2

PAD-OPEN 4x4m

J7

1 2

PAD-OPEN 4x4m

J8

1 2

PAD-OPEN 4x4m

J5

2 1

3MMA/CPU_IO

J1

2 1

3MMA/+2.5V_CLK

A

+12VALW

+5VALW

+3VALW

CPU_IO

+2.5V_CLK

(120mA)

(5A)

(4A)

(8.5-10A)

(1A)

(1A)

R145
150K_1%

R153
100K_1%

R159
100K_1%

R152
200K_1%

+3V CPU_IO

12

12

+2.5V_CLK

12

12

B

12

R113
56K

5
6

12

C206

0.33UF_0805

12

R329
56K

3
2

12

C205

0.33UF_0805

PROPRIETARY NOTE

+5V

C191

1 2

.1UF

84

+

7

-

U13B
LM358

+5V+3V

U13A

84

LM358

+

1

-

+5VS

12

12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R58

240K

R52

100K

13

+3V

12

Q21
2N7002

12

R140
10K

13

Q20
2N7002

VR_POK2,39

12

C130

C129

.01UF

.1UF

+3VS

12

C70

U3

5

1
2

3

C

.1UF

4

7SH08FU

+3VS

MR#
PFI
NC

23

VCCGND

RST#

PFO#

MAX708

1
4
6

2

2

A

VMB

PC1

@4.7UF_1210_25V

1 1

PZD1

21

PC2

4.7UF_1210_25V

PC3

4.7UF_1210_25V

RLZ10C

PC5

1UF_1206_25V

DBV

PR5

2.2UH_SPC1002

1 2

12

@1000PF

84

+

-

100K_1%

PU1B
LM358A

5
6

PR15
100K_1%

PC12

1000PF

PL3

PR21

5.1K

PC21

0.047UF

2

3

PD2
BAS40-04

1

PC8

0.1UF_0805_25V

2 2

1
3

PQ3
2SC2411K

7

1

2

EC10QS04

PR20

47K

VS

84

+

-

PD5

PQ2 SI3443DV

PU3B

LM393

5
6

PJP2

1

3

3

2

2DC-S305-B02

+5V

21

3 3

4 4

PD6

RB751V

PR23

2.2K

PC17

PQ4
2SA1036K

2

1000PF

PF25A

12

654

S

D

D

DDG

123

PD7

EC10QS04

7

PC20

B

PC4

4.7UF_1210_25V

PC9

150PF

PC13

100PF

12

PC16

+

47UF_D_6.3V

PR26

127K_1%

105K_0.5%

VS

PR7
100K_1%

PR10
100K_1%

PL1

CHC4532UX

1 2

PL2

CHC4532UX

1 2

+CPU_IOP

51AVCC

PR35

PF15A

P/S#23

PQ5

13

DTC115EK

100K

100K

PC7

PC14
100PF

0.1UF_0805_25V

BATT+

+5VALWP

PR28
47K

2

PR1

@47K

+3VALWP

VBATT23

PQ6

13

DTC115EK

100K

100K

PR93

+3VALWP

PD26
RB751V

2 1

PC15

1000PF

2

47K

VIN

PR34

0

+5VALWP
+3VALWP

+5VALWP

2 1

PD4
@RB751V

PC10
100PF

C

BATT_TEMP23

1 2

PR94 @0

1 2

PR95 0

PR12

10K

PC18

1000PF

3

2

PD1

BAS40-04

PU2A

1

LM358A

PR14

@2.2K

VIN

PR32

88.7K_1%

VR_ON 24,39

1

PC6

4700PF

PR8

301K_0.1%

8 4

DBV

PR25
334K_1%

+RTCVREF

PR2 6.49K_1%

12

-

2

+

3

PR3
1K

PR11

150K_0.1%

PR13 34.8K_1%

PR16 15K_0.1%

PR27
10K

PR31

10K

PC19

0.22UF_0805_16V

D

Panasonic/Sanyo#

TS

GND

VS

3

+

2

-

51AVCC

84

PJP1

1
2
3
4
5
6
7

25063A-07G1

1

7

PR2210K

PR24
1M_1%

1

PU3A
LM393

VS

PR4

PU1A

84

LM358A

3

+

2

-

2.2K_1206

PR6

1.62K_0.1%

2

PD3

1 3

PR9

AS2431

5.11K_0.1%

VBS

84

+

-

PU2B
LM358A

5
6

PR17

1K_1%

PC11

PR18

1000PF

1M_0.1%

ACOFF#

PR29

0

PZD2

RLZ3.6B

21

PR33

10K

0

PR30

Compal Electronics, Inc

13

D

S

E

PR19
453K_1%

PQ1
2N7002

2

G

PD32

ISS355

PACIN 37

ACIN 10,23,34

21

PR111

47K

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPA L EL EC TRON ICS , INC . NE ITHE R TH IS SH EET N OR T HE IN FOR MAT ION I T CO NTAI NS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

36 40Saturday, December 23, 2000

E

of

0C

A

PJP3

2 1

PR37
200K

VIN

PR45
150K

2

G

PC26

4.7UF_1210 25V

@3MMA/GND

PQ8

1

S

2

S

3

S

4

G

SI4835DY

PR49

47K

PD30
ISS355

PR36

PQ11
2N7002

D

S

OCP23

0.02_2512_1%

PR39
150_1%

13

2

G

PR53

11.5K_1%

PC23

100PF

PR110
10K_1%

PR40
150_1%

3
2

DBV

+

-

VIN

PR38
10K

1 1

2 2

PC89

PQ7

D
D
D
D

SI4835DY

1

S

2

S

3

S

4

G

8
7
6
5

PU5A

84

LM358A

1

13

D

PQ10
2N7002

S

PU13

52

3

+

-

LM7221BIM5

4

1

0.1UF

+5VALWP

PD13

RLS4148

PZD3

21

12

P4

3 3

PR64 200_1206

RLZ4.3B

PR67
100K

51ON#34

PR71

22K

PQ20

SI2303DS

2

PC38

0.22UF_1206_25V

PD12
RLS4148

PR63

33_1206

13

PC36

CHGRTC

PU8

4 4

+RTCVREF

PR77
200_0805

PC41

4.7UF_1206_16V

S-81233SG

3

3

2

2

1

1

PC42

4.7UF_1206_16V

PZD4

21

PR43

47K

12

P1

1 2

0.1UF_0805_25V

RLZ16B

8

D

7

D

6

D

5

D

PACIN

4.7UF_1210 25V

VS

B

PC27

C

D

E

P4

B+P1 P2

ACOFF#

PD10
RLS4148

PR57

6.8K_0805

1 2

PQ17
2SA1036K

P1

84

3

+

2

-

CHARGERIN

PC29

1000PF

PR62

1.5K

VIN

PU4A
LM358A

RB751V

1

PR46

2.2K_1206

PC24

0.22UF_0805_16V

2

TP0610T

PR65
100K

PD8

PR56

47K

1
3

PQ16
2SC2411K

PQ21

2

1
2
3
4

51AVCC

PQ9

S
S
S
G

SI4835DY

PR44

22K

13

100K

100K

8

D

7

D

6

D

5

D

PR42

10K

ACOFF#

2

PQ38
DTC115EK

PJP4

2 1

3MMA/GND

PC28

4.7UF_1210 25V

CHARGER_SHDN#39

PD25

FSTCHG

PACIN

1 2

1SS355

PD15

1 2

1SS355

PR78

1 2

47K

PQ22

DTC115EK

100K

2

13

100K

VMB

FSTCHG24

PACIN36

12

PR72
100K

13

PD9
RB751V

PR61

61.9K_1%

PC22

1UF_0805_25V

12

PR50

4.7K

PQ14

1

S

2

S

3

S

4

G

SI4835DY

1UF_0805_25V

8

8

123

123

PC34

0.1UF_0805_25V

7

PR47

2.2K_1206

D
D
D
D

123

PC31

6

7

7

PC37

1000PF

PU4B

84

LM358A

+

-

PC25

0.022UF_0805

P3

PL4

8
7

1 2
6
5

22UH_SLF12565T

PD11
EA60QC04

6

PU7
TL5001

45

4 5

PC35

0.01UF

PR68

10K

1 2

PR73

5
6

10K

PR41
24K_0.5%

PR48

80.6K_1%

PQ13

TP0610T

P4

PQ12

3

TP0610T

31

2

1

2

P4

1 2

PR60
1K_1%

13

D

S

PR59

1.5K_1%

2

G

12

PR55

1.5K_1%

5

+

6

-

1 2

84

PC30

100PF

PU5B

LM358A

7

12

12

PR58
1K_1%

PC33

3
2

100PF

PR54

0.02_2512_1%

VMB

12

PC32

4.7UF_1206_16V

PQ18
2N7002

13

D

2

G

PQ19

S

DBV

+

-

VMB

12

PR51
100K

+5VALWP

12

100K

PU6A
LM358A

PR52
47K

2

DTC115EK
PQ15

13

100K

84

1

2N7002

PU6B

84

LM358A

5

+

7

6

-

12

PR66

10K_1%

12

PR74
22K_0.5%

D

12

S

PR76

100K_1%

13

2N7002
PQ24

G

2

1 2

PR69

16.9K_1%

0.1UF

PC40

PR75
47K

13

100K

100K

PR70
10K

1 2

PQ23
DTC115EK

2

+5VALWP

2 1

+5VALWP

PD14
RB751V

PC39

4.7UF_1206_16V

+3VALWP

2 1

TRICKLE 23

PD27
@RB751V

BATT_CHGI 23

Compal Electronics, Inc

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPA L EL EC TRON ICS , INC . NE ITHE R TH IS SH EET N OR T HE IN FOR MAT ION I T CO NTAI NS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

37 40Saturday, December 23, 2000

E

of

0C

A

B

C

D

E

B+

1 2

PR79
10_1206

22

V+

PU9

MAX1632

PD16

RB751V

VL

GND

8

51AVCC

PC48

0.1UF_0805_25V

21

12OUT

VL

VDD

BST5

DH5

LX5

DL5

PGND

CSH5

CSL5

FB5
SEQ
REF

SYNC
RST#

4
5
18
16
17
19
20
14
13
12
15
9
6
11

PD17

RB751V

12

PC46

4.7UF_1206_25V

PC63

4.7UF_1206_25V

+12VALWP

PC43

4.7UF_1206_16V

PC54

0.1UF_0805_25V

PQ27

SI4800DY

876

5

DDD

D

SSG

S

134

2

B+

PC57

4.7UF_1210 25V

+

PL5

BLM32A06_3216

1 2

PC51
1UF_0805_25V

470PF_0805_100V

PC56

4.7UF_1210 25V

PD20

EC10QS04

PC52

P7 P8

12

+

1 2

PQ28

SI4800DY

PD18

EC11FS2

PR80

47_1206

PT1

CDRH124B

876

134

PC58
1000PF

PC47

2.2UF_1206_25V

12

4

1

5

DDD

D

SSG

S

2

+

2

3

P9

PR82

0.015_2512_1%

PZD6
RLZ6.2C

21

12

+5VALWP

PD22
EC10QS04

PC55
1000PF

SUSP#21,23,25,39

876

DDD

SSG

S

134

2

B+

5

PQ26

D

SI4800DY

0.1UF_0805_25V

P5

SUSP#

PC53

PC45

0.1UF_0805_25V

PC44

4.7UF_1206_25V

25
27
26

24

10
23

28

1
2
3

7

PC67

0.01UF

BST3
DH3
LX3

DL3

CSH3
CSL3
FB3
SKIP#
SHDN#

TIME/ON5
RUN/ON3

PR83

100K

P6

1 1

PC49

4.7UF_1210 25V

PC50

4.7UF_1210 25V

PQ25
SI4800DY

876

DDD

SSG

S

134

2

5

D

12

PD19

EC10QS04

PL6

10UH_SLF12565T

PD21

EC10QS04

2 2

+3VALWP

PZD5

RLZ4.3B

12

21

PC59

150UF_D_6.3V_KO

+

0.018_2512_1%

+

150UF_D_6.3V_KO

PR81

PC60

PC62

@47UF_D_6.3V_SP

1 2

PC61

47UF_D_6.3V_SP

+

+

51AVCC

PC64

47UF_D_6.3V_SP

PZD7

2.2K_1206

21

3 3

PR84
1K

PC65

47UF_D_6.3V_SP

PC66

150UF_D_6.3V_KO

MAX1632_SHDN#39

PR85

PC68
1000PF

120K

4 4

Compal Electronics, Inc

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPA L EL EC TRON ICS , INC . NE ITHE R TH IS SH EET N OR T HE IN FOR MAT ION I T CO NTAI NS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

38 40Saturday, December 23, 2000

E

of

0C

A

PC69

MAX1711_SHDN#

VR_ON

PR89
100K

VID[0..4]

+5V

VOUT

VSS

2

0.1UF_0805_25V

PR87
0

PR90
0

5

VID0

VID1

VID2

VID3

PR92
243K_1%

2

21

20

19

18

17

5

8

6

+2.5VP+3V

12

PC82

+

22UF_B

1 1

VR_ON24,36

PC80
220PF

12

+

@22UF_B

4

3

S-816A25AMC

PC83

PR88

0

VID[0..4]3

PQ34
2SB1132

PU11

VIN

S-816A25AMC

ON/OFF

PC81

0.22UF_0805_16V

1

EXT

SUSP#21,23,25,38

2 2

3 3

VR_ON

4 4

SHDN#

SKIP#

D0

D1

D2

D3

CC

TON

ILIM

+5V

15

VDD

PU10
MAX1711

B

GND

10

7

VCC

BST

PGND

FBSREF

GNDS

PGOOD

PD23

2 1

RB751V
PR86
20

PC70

0.22UF_0805_16V

12

CPU_CORE

PC75

0.1UF_0805_25V

VR_POK 2,35

1

V+

22

24

DH

23

LX

13

DL

14

3

FB

VID4

16

D4

49

PR91
1K

11

12

For CPU thermal protection

For Battery thermal protection

CPU_CORE

PQ29
SI4800DY

876

134

876

134

0.1UF

PC85

0.1UF

PC86

DDD

SSG

S

2

DDD

SSG

S

2

5

D

5

D

C

PQ30
SI4800DY

876

134

PQ31
SI4810

PC79
2200PF

+RTCVREF

PR100

18K_1%

PR107

24K_0.5%

5

DDD

SSG

S

2

PTH1

10K_1%_0805

PR98

3.65K_1%

PTH2
10K_1%_0805

PR104

3.65K_1%

D

PC76
2200PF

876

DDD

SSG

134

D

B+

PC71

4.7UF_1210_25V

876

134

PR106

100K_1%

DDD

SSG

S

2

5

PQ33

D

SI4810

PR99
1K

PR108

249K_1%

5

PQ32

D

SI4810

S

2

PC72

4.7UF_1210_25V

PL8 HK-RM136-15A1R4

PD31
BYS10-45

2 1

PR105
1K

1000PF

PC87

12

PC73

4.7UF_1210_25V

VS

84

3

+

2

-

VS

84

5

+

6

-

1

PU12A
LM393

7

PU12B
LM393

47K

47K

2 1

PR9625.5K

PR97

PZD8

RLZ5.1B

PR10225.5K

PR103

PZD9

RLZ5.1B

PC74

@4.7UF_1210_25V

PD24
BYS10-45

PC77

220UF_D_4V

21

21

+

220UF_D_4V

PR101

453K

PR109

453K

PC78

+

PC84

0.1UF

1SS355

PC88

+CPU_COREP

1SS355

PD28

PD29

0.1UF

E

CHARGER_SHDN# 37

100K

2

12

100K

2

100K

2

12

100K

PQ35

13

DTC115EK

MAX1711_SHDN#

PQ36

13

DTC115EK

100K

100K

MAX1632_SHDN# 38

PQ37

13

DTC115EK

Compal Electronics, Inc

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPA L EL EC TRON ICS , INC . NE ITHE R TH IS SH EET N OR T HE IN FOR MAT ION I T CO NTAI NS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

39 40Saturday, December 23, 2000

E

of

0C

888F1 PIR LIST

03/13/00 Written by Jerry

P3, 4, 5: Change value of U8 to 443ZX-100M
P16: Change value of U24 to 512KX32X2
P24: Delete R247 and add net DD on pin 8 of U40
P30: Change net GND_SIGNALr to GND on pin2 of JP1
P33: Change value of U39 to UR7HCPXZ-P444
P35: Change net CPI_IO to CPU_IO on pin1 of R113

03/15/00 Written by Jerry

P14: Delete net +3V on pin T13, T16, T8, R5, P16,
P5, R6, R15 of U10, These pins should be NC.

P38: Change PT1 to CDRH124B
P39: Add PL8 and reserve it

03/17/00 Written by Jerry

P3: Delete C175
P14: Swap SSIN and SSOUT on U15
P16: Swap VMA8 and VMA10 on U24

03/20/00 Written by Jerry

P14: Add R352 on net SSIN for pull down

Change value of R151 to 200K
P34: Change tolerance of R270 and R271 to +/- 5%
P29: Short pin34 and pin36 of JP18 for PME#

Short pin 111 and pin 116 of JP18 for MD_SPK

P34: Delete net MOD_AUDIO_MON on pin 33 of JP4

03/21/00 Written by Jerry

P23: Add R353 for G1/F1# select

************* Rev0.2 PIR List **************

04/20/00 Written by Jerry

P07: Add @ on R213 and C289
P10: Add Correct library D5 and D8

Add module port PX4_RI# on net PX4_RI#
P12: Change value of R180 to 15 ohm

Change VCC of R164 and R201 to +3VS
P14: Change VCC to +3V on pin R2 of U10

Change value of R151 to 200K_1%
P15: Do not populate RP23, R114, R117, R128,

R124, and C192 when use TFT panel
P17: Do not populate CP6 and CP7 and populate 0 ohm on

CP4 and CP5 when use TFT panel

Populate 0 ohm on R21, and C55 when use TFT panel.

Populate 0 ohm on C18, C23, and C24 when use TFT panel

Change net B+ to +5VALW on pin1 and pin3 of JP2
P18: Add net PCM_RI# on pin E14 of U33
P20: Delete D32
P21: Delete L15, L17, C291, C333, C274, C273, C327,

R237, R209, R215, R246, R238, R222, R229 and U26
P22: Change value of L32 to 0_0805

P23: Add net NUM_LED# on pin 63 of U28

Add net CAPS_LED# on pin 64 of U28

Add net ARROW_LED# on pin 65 of U28

Add net FAN_4.6V on pin 103 of U28

Add net FAN_4.2V on pin 104 of U28

Add Module port RING# on net RING#
P24: Delete R349 and Q48 when 888F1 configuration

Add net 51RING# on pin 6 of U34

Change net EN_DFAN to EN_DFAN# on pin5 of U34

Add net BATT_LOW_LED# on pin 9 of U34

Add net BATT_CHGI_LED# on pin 16 of U34

Change net SW_CLK to SW_CLK/HDD_LED# on pin 16 of U35

Change net SW_DATA to SW_DATA/CD_FDD_LED# on pin 19 of U35

Add D39 and net PX4_RI# on pin 2 of D39

Change value of U42 to NM24C16

Add D40 and R357 for OR net PCM1_LED and PCM2_LED to net PCM_LED

Delete net PCM1_LED on pin8 of U21

Delete net PCM2_LED on pin11 of U21

Delete net HDD_LED# on pin13 of U21

Add net PCM_LED on pin8 of U21

Add net SHDD_LED# on pin11 of U21

Add net PHDD_LED# on pin13 of U21

Add R356 on net CD_INTA# for pull high +5VCD

Delete RP54

Pin3 of RP55 tie to net CDON#/MAIL

Pin4 of RP55 tie to net BUTTON_LOCK#
P25: Delete Q39 and C449 for FAN

Add Q55, Q54, Q53, Q52, Q51, D42, D41, R359, R360, R361,

R358, C514, and C513 for FAN
P26: Add R354 and R355 for signals of SEEPROM_CLK

and SEEPROM_DATA pull down
P29: Add R362 between +3.3VAUX and +3V

Change VCC +3VS to +3V on L14 and L18 for MINI PCI

Delete net MD_MIC on pin115 of JP18

Add parts D43, R364, C515, and U49 for net RING#

Add net MINI_RI# on pin 121 of JP18

Add R365 between pin 26 of JP18 and net PCIRST#

Add R366 between pin 26 of JP18 and net CBRST#

Add@onR366
P30: Change DRQ and DACK# signals on U4
P33: Delete C513 and add R363 on TP_VCC

Add @ on F3, C13, C27, C26, C25, L4, L3, and JP10 when 888F1

P34: Delete net MD_MIC on pin28 of JP4

P36: Change value of PC16 to 47UF_D_6.3V
P37: Add PD25 between net VMB and pin2 of PD15

04/28/00 Written by Jerry

P03: Delete C117
P12: Add L36 for SDRAM Clock VCC
P35: Add C516, C517, C518, C519, C520, and C521for EMI

04/29/00 Written by Jerry

P22: Delete L32
P34: Add C522, C523, and C524 for SW/B

05/02/00 Written by Jerry

P15: Add J10 between VGA_GND and GND

05/04/00 Written by Jerry

P29: Add @ on L22, C342, C245, C368, and C389
P34: Short pin49 and 50 of JP4

05/05/00 Written by Jerry

P23: RP56, U28, R279, R280 change VCC to +3VALW

P24: U21, U27, U40, U18, U23, RP55, RP60, R206,
and R233 change VCC to +3VALW

P29: Delete U49, C151, and R364
P34: D14, Q26, R264, and R275 chnage VCC to +3VALW

P35: Delete U5 and C83

05/08/00 Written by Jerry

P23: Add L37 and R367, add @ on L37
P36: Change value of PZD2 to RLZ3.6B

************* Rev0.3 PIR List **************

05/16/00 Written by Jerry

Change package of C1206, C1210, TAN_A, and TAN_B to
CAP-A_B_1206_1210_TAN

05/18/00 Written by Jerry

P19: Change value of C486 and C298 to 1UF_25V_0805
P27: Change value of C455 to 4.7UF_0805

06/13/00 Written by Jerry

P23: Change value of C352 to 0.1UF

P24: Add R368 and R369 for SMB pull high
P29: Add L22 for Mini PCI +5VS
P33: Add L38, L39, C525, and C526 for PS/2 Ycable

06/15/00 Written by Jerry

P03: Delete C37 and C47
P15: Delete J10
P23: Change net 51ON# to CDON#
P33: Add Q56, and Q57 for ESD
P34: Add D45, R370, R371, D44, R372, C527, Q59,

Q58, and D46 for 51ON# signal
P36: PJP2 pin2 and Pin3 short

P39: Delete PL7

06/16/00 Written by Jerry

P13: Add H17
P17: Delete CP6, CP7, CP4, and CP5 for EMI

P28: Add R373 and C528 for EMI

Delete net LEFT on pin30 of JP4
Delete net RIGHT on pin31 of JP4
Delete net AGND on pin29 and pin32 of JP4
Add net BATT_LOW_LED# on pin28 of JP4
Add net BATT_CHGI_LED# on pin33 of JP4
Add net DM_ON on pin30 of JP4
Add net DM_ON# on pin31 of JP4
Add net GND on pin29 and pin32 of JP4
Change JP3 to 10pin connector and re-assign pin out
Change value of SW2 to HCH SMT1-02

Add net VGA_GND on pin J4, L5, G5, E4, D4, M5, M4,
F5, and K18 of U10

RP59 change VCC to +3V
Change value of RP56 to 2.7K

Add@onU18
Add SST39VF040 on U49
Change value of U21 and U27 to 74LVC244
Change value of U40 to 74LVC32

Pin10 of JP3 change VCC to +3VS

Net EC_HPOWON tie to net SPWROFF#
C518 and C521 change VCC to +3VALW

Change value of RP56 to 10P8R_4.7K
Delete net CLK_SMB and DAT_SMB on RP56

Change value of D20 to RB751V

ADD LP1, LP2, LP3, and LP4 for EMI

PROPRIETARY NOTE

06/20/00 Written by Jerry

P08: Remove @ on R348, C483, R341, and C472
P12: Change value of R180 to 10 Ohm

Change package of Y1 to 2 pin package
P13: Add M6
P15: Change value of RP23 to 16P8R-56 Ohm
P16: Remove @ on R230 and C320
P17: Remove @ on R21 and C55

Change value of C45, C18, C23, and C24 to 220PF
P18: Add R374 and R375 for 1420RST#

06/23/00 Written by Jerry

P02: Change value of R132 and R134 to 1K

06/26/00 Written by Jerry

P14: Change value of C215 and C190 to 1UF
P24: Remove @ on CP10, CP11, CP12, CP13, CP14, and CP15

07/05/00 Written by Jerry

P17: Change value of L23, L24, and L25 to FCM2012C80

************* Rev0.4 PIR List **************

07/08/00 Written by Jerry

P23: Change value of R263 to 47K

Add net OCP
P32: Add R380 and R381 for 888G1
P36, 27, 38, 39: Update DC/DC circuit

07/10/00 Written by Jerry

P24: Remove @ on D15

Add@onD16

07/13/00 Written by Jerry

P37: Swap VCC and GND pin on PU13

************* Rev1.0 PIR List **************

07/29/00 Written by Jerry

P15: Change value of R158 to 22 Ohm

0/31/00 Written by Jerry

P34: Change vaule of R371 to 1M

888F2 PIR LIST

************* Rev0.1 PIR List **************

10/12/00 written by Allen

P23: Add BATT_BQ from 87570
P36: Add PD30,PR111,PR112 for Smart Battery
P39: Add PD31 at CPU_COREP

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-854

Size Document Number Rev

B

401172

Date: Sheet

40 40Saturday, December 23, 2000

of

0C