QUANTA R75 Schematics
1
2
3
4
5
6
7
8
+3V/+5V S5
PG.35
+1.1VS5/+2.5V
A A
+1.2V
PG.36
PG.37
SODIMM1
Max. 4GB
CPU Core
PG.38~39
SODIMM2
DDR3L
PG.40
Max. 4GB
Charge
B B
PG.34
Dis-Charge
PG.41
3&,([
+VGACORE
PG.42
+1.5 VGA
PG.43
+1.0V/+1.8/ +3 VGA
C C
PG.44
LAN
RTL8166EH
10/100
LANE0
Accelerometer
PG.32
SMBUS
HDD
ODD
BT COMBO
Card Reader
KBC
ITE8528
D D
TPKB
PG.30PG.30 PG.31PG.33
1
2
R7X AMD SYSTEM DIAGRAM
AMD
PG.12
PG.13
PG.31
PG.31
LANE1
WLAN
PG.32PG.29
3&,([
LANE3
RTS5239
PG.33
FANROM
ϭϲϬϬDdƐ
DDR3 L
Channel A
ϭϲϬϬDdƐ
DDR3 L
Channel B
SATA0
SATA1
USB 2.0
PORT8
PG.26
LPC
SLB9635
(option)
3
TPM
AMD
35mm X 35mm
RICHLAND 722 pin uPGA
TDP 35W
DP1
DP
PG.2~5
UMI
AMD FCH
BOLTON M3
24.5mm X 24.5mm
656pin FCBGA
TDP 4.7W
PG.6~10
AUDIO
CODEC
ALC3227-CG
PG.25
4
DP0
DP2
PG.27
PCI-E x8
ĞW;ϱϰ'ďƐͿ
/;ϱϰ'ďƐͿ
DP Port B
CRT
USB 3.0
PORT1,2
USB 2.0
USB2.0 Ports
5
Sun XT
PP;PP
ELW0SDFNDJH
DDR3 900MHz
128Mx16x4
256Mx16x4
eDP
USB3.0 Ports
X2
PORT0
PG.29
Speaker
COMBO JACK
HP/MIC
DIGITAL MIC
:
VRAM
or
Z>d<ϮϭϯϲZ
WƚŽ>s^ŽŶǀĞƌƚĞƌ
Webcam
PG.28
PORT11,12
Touch Screen
(option)
PG.27
PG.28
PG.23
6
PG.13~19
1GHz
PG.20~21
W'ϮϮ
PORT3
>s^/ŶƚĞƌĨĂĐĞ
PG.23
PORT2
PG.26
eDP
LVDS
HDMI
CRT
PG.23
PG.23
PG.25
PG.24
Stackup
352-(&75;
352-(&75;
352-(&75;
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
BLOCK DIAGRAM
BLOCK DIAGRAM
1%
1%
1%
7
BLOCK DIAGRAM
Date: Sheet
Date: Sheet
Date: Sheet of
01
TOP
GND
IN1
IN2
VCC
BOT
143Tuesday, March 12, 2013
143Tuesday, March 12, 2013
143Tuesday, March 12, 2013
8
1A
1A
1A
of
of
5
PEG_RXP013
PEG_RXN013
PEG_RXP113
PEG_RXN113
PEG_RXP213
PEG_RXN213
PEG_RXP313
PEG_RXN313
PEG_RXP413
PEG_RXN413
PEG_RXP513
D D
C C
PEG_RXN513
PEG_RXP613
PEG_RXN613
PEG_RXP713
PEG_RXN713
PCIE_RXP0_WLAN32
PCIE_RXN0_WLAN32
UMI_RXP07
UMI_RXN07
UMI_RXP17
UMI_RXN17
UMI_RXP27
UMI_RXN27
UMI_RXP37
UMI_RXN37
+1.2V_VDDP
4/19 For Comal.
HDT+ Connector for Debug only
B B
APU_RST#4,7
APU_PWRGD4,7
APU_RST# APU_RST_L_BUF
APU_PWRGD
U8
1
A1
2
GND
3
A2
74LVC2G07GW
VCC
6
Y1
5
4
Y2
4
PEG_RXP0
PEG_RXN0
PEG_RXP1
PEG_RXN1
PEG_RXP2
PEG_RXN2
PEG_RXP3
PEG_RXN3
PEG_RXP4
PEG_RXN4
PEG_RXP5
PEG_RXN5
PEG_RXP6
PEG_RXN6
PEG_RXP7
PEG_RXN7
R430 196/F_6
+3V
+1.5V
R239
*0_4/S
R241
1K/F_4
R235
1K/F_4
APU_PWROK_BUF
MV , remove it for cost down
U21F
AB8
P_GFX_RXP0
AB7
P_GFX_RXN0
AA9
P_GFX_RXP1
AA8
P_GFX_RXN1
AA5
P_GFX_RXP2
AA6
P_GFX_RXN2
Y8
P_GFX_RXP3
Y7
P_GFX_RXN3
W9
P_GFX_RXP4
W8
P_GFX_RXN4
W5
P_GFX_RXP5
W6
P_GFX_RXN5
V8
P_GFX_RXP6
V7
P_GFX_RXN6
U9
P_GFX_RXP7
U8
P_GFX_RXN7
U5
P_GFX_RXP8
U6
P_GFX_RXN8
T8
P_GFX_RXP9
T7
P_GFX_RXN9
R9
P_GFX_RXP10
R8
P_GFX_RXN10
R5
P_GFX_RXP11
R6
P_GFX_RXN11
P8
P_GFX_RXP12
P7
P_GFX_RXN12
N9
P_GFX_RXP13
N8
P_GFX_RXN13
N5
P_GFX_RXP14
N6
P_GFX_RXN14
M8
P_GFX_RXP15
M7
P_GFX_RXN15
AE5
P_GPP_RXP0
AE6
P_GPP_RXN0
AD8
P_GPP_RXP1
AD7
P_GPP_RXN1
AC9
P_GPP_RXP2
AC8
P_GPP_RXN2
AC5
P_GPP_RXP3
AC6
P_GPP_RXN3
AG8
P_UMI_RXP0
AG9
P_UMI_RXN0
AG6
P_UMI_RXP1
AG5
P_UMI_RXN1
AF7
P_UMI_RXP2
AF8
P_UMI_RXN2
AE8
P_UMI_RXP3
AE9
P_UMI_RXN3
AG11
P_ZVDDP
Richland APU
4/19 For Comal.
PCI EXPRESS
GRAPHICS
GPP
UMI-LINK
P_GFX_TXP0
P_GFX_TXN0
P_GFX_TXP1
P_GFX_TXN1
P_GFX_TXP2
P_GFX_TXN2
P_GFX_TXP3
P_GFX_TXN3
P_GFX_TXP4
P_GFX_TXN4
P_GFX_TXP5
P_GFX_TXN5
P_GFX_TXP6
P_GFX_TXN6
P_GFX_TXP7
P_GFX_TXN7
P_GFX_TXP8
P_GFX_TXN8
P_GFX_TXP9
P_GFX_TXN9
P_GFX_TXP10
P_GFX_TXN10
P_GFX_TXP11
P_GFX_TXN11
P_GFX_TXP12
P_GFX_TXN12
P_GFX_TXP13
P_GFX_TXN13
P_GFX_TXP14
P_GFX_TXN14
P_GFX_TXP15
P_GFX_TXN15
P_GPP_TXP0
P_GPP_TXN0
P_GPP_TXP1
P_GPP_TXN1
P_GPP_TXP2
P_GPP_TXN2
P_GPP_TXP3
P_GPP_TXN3
P_UMI_TXP0
P_UMI_TXN0
P_UMI_TXP1
P_UMI_TXN1
P_UMI_TXP2
P_UMI_TXN2
P_UMI_TXP3
P_UMI_TXN3
P_ZVSS
3
AB2
PEG_TXP0_C
AB1
PEG_TXN0_C
AA3
PEG_TXP1_C
AA2
PEG_TXN1_C
Y5
PEG_TXP2_C
Y4
PEG_TXN2_C
Y2
PEG_TXP3_C
Y1
PEG_TXN3_C
W3
PEG_TXP4_C
W2
PEG_TXN4_C
V5
PEG_TXP5_C
V4
PEG_TXN5_C
V2
PEG_TXP6_C
V1
PEG_TXN6_C
U3
PEG_TXP7_C
U2
PEG_TXN7_C
T5
T4
T2
T1
R3
R2
P5
P4
P2
P1
N3
N2
M5
M4
M2
M1
AD5
PCIE_TXP0_C
AD4
PCIE_TXN0_C
AD2
AD1
AC3
AC2
AB5
AB4
AG2
UMI_TXP0_C
AG3
UMI_TXN0_C
AF4
UMI_TXP1_C
AF5
UMI_TXN1_C
AF1
UMI_TXP2_C
AF2
UMI_TXN2_C
AE2
UMI_TXP3_C
AE3
UMI_TXN3_C
AH11
P_ZVSSP_ZVDDP
R432 196/F_6
VID Override Circuit
C681 *0.1U/10V_4
C679 *0.1U/10V_4
C687 *0.1U/10V_4
C686 *0.1U/10V_4
C695 *0.1U/10V_4
C694 *0.1U/10V_4
C700 *0.1U/10V_4
C698 *0.1U/10V_4
UMA can remove
C110 0.1U/10V_4
C117 0.1U/10V_4
C121 0.1U/10V_4
C130 0.1U/10V_4
C138 0.1U/10V_4
C684 *0.1U/10V_4
C682 *0.1U/10V_4
C693 *0.1U/10V_4
C689 *0.1U/10V_4
C697 *0.1U/10V_4
C696 *0.1U/10V_4
C702 *0.1U/10V_4
C701 *0.1U/10V_4
C111 0.1U/10V_4
C115 0.1U/10V_4
C125 0.1U/10V_4
C135 0.1U/10V_4
C146 0.1U/10V_4
2
PEG_TXP0
PEG_TXN0
PEG_TXP1
PEG_TXN1
PEG_TXP2
PEG_TXN2
PEG_TXP3
PEG_TXN3
PEG_TXP4
PEG_TXN4
PEG_TXP5
PEG_TXN5
PEG_TXP6
PEG_TXN6
PEG_TXP7
PEG_TXN7
UMI_TXP0
UMI_TXN0
UMI_TXP1
UMI_TXN1
UMI_TXP2
UMI_TXN2
UMI_TXP3
UMI_TXN3
PEG_TXP0 13
PEG_TXN0 13
PEG_TXP1 13
PEG_TXN1 13
PEG_TXP2 13
PEG_TXN2 13
PEG_TXP3 13
PEG_TXN3 13
PEG_TXP4 13
PEG_TXN4 13
PEG_TXP5 13
PEG_TXN5 13
PEG_TXP6 13
PEG_TXN6 13
PEG_TXP7 13
PEG_TXN7 13
PCIE_TXP0_WLAN 32
PCIE_TXN0_WLAN 32
UMI_TXP0 7
UMI_TXN0 7
UMI_TXP1 7
UMI_TXN1 7
UMI_TXP2 7
UMI_TXN2 7
UMI_TXP3 7
UMI_TXN3 7
SVC SVD
000
1
1
TO WLANTO WLAN
1
0
1
PEG X 8
VFIX_+VDD
=VCC/GND
1
BOOT VOLTAGE
VFIX_+VDD
=OPEN
1.1 1.1
1.0 1.2
0.9 1.0
0.8 0.8
02
J1
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
HDT CONN
88511-2001-20p-l
SVC4
SVD4
APU_PWRGD have pull up 300ohm
to +1.5V on page 4
3
SVC
SVD
APU_PWRGD
Rd
R273 *0_4/S
Re
R274 *0_4/S
Rf
R270 *0_4/S
2
CPU_SVC
CPU_SVD
CPU_PWRGD_SVID_REG
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
1%
1%
1%
Date: Sheet of
Date: Sheet of
Date: Sheet of
CPU_SVC 38
CPU_SVD 38
CPU_PWRGD_SVID_REG 38
352-(&75;
352-(&75;
352-(&75;
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
APU 1/4(PCIE/UMI/GPP /HDT)
APU 1/4(PCIE/UMI/GPP /HDT)
APU 1/4(PCIE/UMI/GPP /HDT)
1
243Tuesday, March 12, 2013
243Tuesday, March 12, 2013
243Tuesday, March 12, 2013
1A
1A
1A
close to HDT
APU_TDI
APU_TCK
APU_TMS
APU_TRST#
A A
APU_DBREQ#
DBRDY3
DBRDY2
DBRDY1
debug HEADER
R252 1K/F_4
R254 1K/F_4
R253 1K/F_4
R251 1K/F_4
R255 1K/F_4
4/19 For Comal.
R575 *10K_4
R576 *10K_4
R577 *10K_4
+1.5VSUS
APU_TEST184
APU_TEST194
APU_DBREQ#4
APU_DBRDY4
APU_TCK4
APU_TMS4
APU_TDI4
APU_TRST#4
APU_TDO4
+1.5VSUS
TP59
APU_TEST18
APU_TEST19
APU_RST_L_BUF
CPU_LDT_RST_HTPA#
APU_DBREQ#
APU_DBRDY
APU_TCK
APU_TMS
APU_TDI
APU_TRST#
APU_TDO
APU_PWROK_BUF
DBRDY3
DBRDY2
DBRDY1
Reserve for debug
5
4
5
4
3
2
1
M_A_A[15:0]11 M_B_A[15:0]12
D D
M_A_BS#011
M_A_BS#111
M_A_DM[7..0]11
C C
M_A_EVENT#11,12
R157 1K/F_4
C83
220P/50V_4
+1.5VSUS
+1.5VSUS
B B
M_A_BS#211
M_A_DQSP011
M_A_DQSN011
M_A_DQSP111
M_A_DQSN111
M_A_DQSP211
M_A_DQSN211
M_A_DQSP311
M_A_DQSN311
M_A_DQSP411
M_A_DQSN411
M_A_DQSP511
M_A_DQSN511
M_A_DQSP611
M_A_DQSN611
M_A_DQSP711
M_A_DQSN711
M_A_CLKP011
M_A_CLKN011
M_A_CLKP111
M_A_CLKN111
M_A_CKE011
M_A_CKE111
M_A_ODT011
M_A_ODT111
M_A_CS#011
M_A_CS#111
M_A_RAS#11
M_A_CAS#11
M_A_WE#11
M_A_RST#11
+MEMVREF_CPU
R146 39.2/F_4
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
Place close to APU within 1"
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS#0
M_A_BS#1
M_A_BS#2
+MEMVREF_CPU
+M_ZVDDIO
U21A
U20
MA_ADD0
R20
MA_ADD1
R21
MA_ADD2
P22
MA_ADD3
P21
MA_ADD4
N24
MA_ADD5
N23
MA_ADD6
N20
MA_ADD7
N21
MA_ADD8
M21
MA_ADD9
U23
MA_ADD10
M22
MA_ADD11
L24
MA_ADD12
AA25
MA_ADD13
L21
MA_ADD14
L20
MA_ADD15
U24
MA_BANK0
U21
MA_BANK1
L23
MA_BANK2
E14
MA_DM0
J17
MA_DM1
E21
MA_DM2
F25
MA_DM3
AD27
MA_DM4
AC23
MA_DM5
AD19
MA_DM6
AC15
MA_DM7
G14
MA_DQS_H0
H14
MA_DQS_L0
G18
MA_DQS_H1
H18
MA_DQS_L1
J21
MA_DQS_H2
H21
MA_DQS_L2
E27
MA_DQS_H3
E26
MA_DQS_L3
AE26
MA_DQS_H4
AD26
MA_DQS_L4
AB22
MA_DQS_H5
AA22
MA_DQS_L5
AB18
MA_DQS_H6
AA18
MA_DQS_L6
AA14
MA_DQS_H7
AA15
MA_DQS_L7
T21
MA_CLK_H0
T22
MA_CLK_L0
R23
MA_CLK_H1
R24
MA_CLK_L1
H28
MA_CKE0
H27
MA_CKE1
Y25
MA_ODT0
AA27
MA_ODT1
V22
MA_CS_L0
AA26
MA_CS_L1
V21
MA_RAS_L
W24
MA_CAS_L
W23
MA_WE_L
H25
MA_RESET_L
T24
MA_EVENT_L
W20
M_VREF
W21
M_ZVDDIO
Richland APU
MEMORY CHANNEL A
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
E13
M_A_DQ0
J13
M_A_DQ1
H15
M_A_DQ2
J15
M_A_DQ3
H13
M_A_DQ4
F13
M_A_DQ5
F15
M_A_DQ6
E15
M_A_DQ7
H17
M_A_DQ8
F17
M_A_DQ9
E19
M_A_DQ10
J19
M_A_DQ11
G16
M_A_DQ12
H16
M_A_DQ13
H19
M_A_DQ14
F19
M_A_DQ15
H20
M_A_DQ16
F21
M_A_DQ17
J23
M_A_DQ18
H23
M_A_DQ19
G20
M_A_DQ20
E20
M_A_DQ21
G22
M_A_DQ22
H22
M_A_DQ23
G24
M_A_DQ24
E25
M_A_DQ25
G27
M_A_DQ26
G26
M_A_DQ27
F23
M_A_DQ28
H24
M_A_DQ29
E28
M_A_DQ30
F27
M_A_DQ31
AB28
M_A_DQ32
AC27
M_A_DQ33
AD25
M_A_DQ34
AA24
M_A_DQ35
AE28
M_A_DQ36
AD28
M_A_DQ37
AB26
M_A_DQ38
AC25
M_A_DQ39
Y23
M_A_DQ40
AA23
M_A_DQ41
Y21
M_A_DQ42
AA20
M_A_DQ43
AB24
M_A_DQ44
AD24
M_A_DQ45
AA21
M_A_DQ46
AC21
M_A_DQ47
AA19
M_A_DQ48
AC19
M_A_DQ49
AC17
M_A_DQ50
AA17
M_A_DQ51
AB20
M_A_DQ52
Y19
M_A_DQ53
AD18
M_A_DQ54
AD17
M_A_DQ55
AA16
M_A_DQ56
Y15
M_A_DQ57
AA13
M_A_DQ58
AC13
M_A_DQ59
Y17
M_A_DQ60
AB16
M_A_DQ61
AB14
M_A_DQ62
Y13
M_A_DQ63
Soldermask openings for all bottom side vias/TPs under FS1
M_A_DQ[0..63] 11
M_B_DM[7..0]12
+1.5VSUS
M_B_BS#012
M_B_BS#112
M_B_BS#212
M_B_EVENT#12
M_B_DQSP012
M_B_DQSN012
M_B_DQSP112
M_B_DQSN112
M_B_DQSP212
M_B_DQSN212
M_B_DQSP312
M_B_DQSN312
M_B_DQSP412
M_B_DQSN412
M_B_DQSP512
M_B_DQSN512
M_B_DQSP612
M_B_DQSN612
M_B_DQSP712
M_B_DQSN712
M_B_CLKP012
M_B_CLKN012
M_B_CLKP112
M_B_CLKN112
M_B_CKE012
M_B_CKE112
M_B_ODT012
M_B_ODT112
M_B_CS#012
M_B_CS#112
M_B_RAS#12
M_B_CAS#12
M_B_WE#12
M_B_RST#12
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_BS#0
M_B_BS#1
M_B_BS#2
R162 1K/F_4
220P/50V_4
C85
U21B
T27
MB_ADD0
P24
MB_ADD1
P25
MB_ADD2
N27
MB_ADD3
N26
MB_ADD4
M28
MB_ADD5
M27
MB_ADD6
M24
MB_ADD7
M25
MB_ADD8
L26
MB_ADD9
U26
MB_ADD10
L27
MB_ADD11
K27
MB_ADD12
W26
MB_ADD13
K25
MB_ADD14
K24
MB_ADD15
U27
MB_BANK0
T28
MB_BANK1
K28
MB_BANK2
D14
MB_DM0
A18
MB_DM1
A22
MB_DM2
C25
MB_DM3
AF25
MB_DM4
AG22
MB_DM5
AH18
MB_DM6
AD14
MB_DM7
C15
MB_DQS_H0
B15
MB_DQS_L0
E18
MB_DQS_H1
D18
MB_DQS_L1
E22
MB_DQS_H2
D22
MB_DQS_L2
B26
MB_DQS_H3
A26
MB_DQS_L3
AG24
MB_DQS_H4
AG25
MB_DQS_L4
AG21
MB_DQS_H5
AF21
MB_DQS_L5
AG17
MB_DQS_H6
AG18
MB_DQS_L6
AH14
MB_DQS_H7
AG14
MB_DQS_L7
R26
MB_CLK_H0
R27
MB_CLK_L0
P27
MB_CLK_H1
P28
MB_CLK_L1
J26
MB_CKE0
J27
MB_CKE1
W27
MB_ODT0
Y28
MB_ODT1
V25
MB_CS_L0
Y27
MB_CS_L1
V24
MB_RAS_L
V27
MB_CAS_L
V28
MB_WE_L
J25
MB_RESET_L
T25
MB_EVENT_L
Richland APU
MEMORY CHANNEL B
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
A14
B14
D16
E16
B13
C13
B16
A16
C17
B18
B20
A20
E17
B17
B19
C19
C21
B22
C23
A24
D20
B21
E23
B23
E24
B25
B27
D28
B24
D24
D26
C27
AG26
AH26
AF23
AG23
AG27
AF27
AH24
AE24
AE22
AH22
AE20
AH20
AD23
AD22
AD21
AD20
AF19
AE18
AE16
AH16
AG20
AG19
AF17
AD16
AG15
AD15
AG13
AD13
AG16
AF15
AE14
AF13
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
03
M_B_DQ[0..63] 12
+1.5VSUS
R103
1K/F_4
A A
R104
1K/F_4
5
Reserved for AMD suggest
+MEMVREF_CPU
C128
0.1U/10V_4
4/19 For Comal.
C127
1000P/50V_4
4
R102 *0_4
Reserved
DDR_VTTREF 11,12,40
C87
220P/50V_4
+3VS5 4,6,8,9,10,25,32,33,35,36,38,41,43
+1.5VSUS 2,4,5,11,12,40,41,43
352-(&75;
352-(&75;
352-(&75;
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
APU 2/4(DDR3 MEM I/F)
APU 2/4(DDR3 MEM I/F)
1%
1%
3
2
1%
APU 2/4(DDR3 MEM I/F)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
343Tuesday, March 12, 2013
343Tuesday, March 12, 2013
343Tuesday, March 12, 2013
1A
1A
1A
5
EDP_TXP022
DP0 output to
eDP to LVDS converter
EDP_TXN022
EDP_TXP122
EDP_TXN122
Display port pow er 1.5V min 1.2v max : 1.65v
D D
DP1 output to Hudson-M2
for VGA translator interface
4/19 HDMI change to DP2 for Comal.
DP2 output to
HDMI connector
note --HDMI P&N can not swap
Note: CLK_APU_HCLKP/N is 100MHZ SSC
C C
B B
Note: CLK_DP_NSSCP/N is 100MHZ non-SSC
+1.5VSUS
Thermal
R429
R433
10K/F_4
1K/F_4
Q25
2
METR3904-G
13
2 1
R300 10K/F_4
2
R298 0_4
2 1
APU_THERMTRIP#
ECPWROK
D5MEK500V-40
1
FCH_THERMTRIP#THERMTRIP#
D17MEK500V-40
SI change from 0R to Diode for solve +3VS5 leakage
FCH_THERMTRIP#6
A A
THERMTRIP# sh utdown temperature 125⹎⹎⹎⹎C to EC reserve only
2
METR3904-G
1 3
Q14
3
Q16 *ME2N7002E
ADD VGA TEMP_ FAIL function is active Hi
5
APU_DP_TXP08
APU_DP_TXN08
APU_DP_TXP18
APU_DP_TXN18
APU_DP_TXP28
APU_DP_TXN28
APU_DP_TXP38
APU_DP_TXN38
C_TX2_HDMI+25
C_TX2_HDMI-25
C_TX1_HDMI+25
C_TX1_HDMI-25
C_TX0_HDMI+25
C_TX0_HDMI-25
C_TXC_HDMI+25
C_TXC_HDMI-25
CLK_APU_P7
CLK_APU_N7
CLK_DP_P7
CLK_DP_N7
CPU_SVT38
APU_RST#2,7
APU_PWRGD2,7
APU_TDI2
APU_TDO2
APU_TCK2
APU_TMS2
APU_TRST#2
APU_DBRDY2
APU_DBREQ#2
CPU_VDD0_RUN_FB_L38
VDDP_FB_H37
CPU_VDDNB_RUN_FB_H38
VDDIO_FB_H40
CPU_VDD0_RUN_FB_H38
TP57
TP63
TP64
TP58
4/19 For Comal,
close to APU.
EC_WRST# 33
ECPWROK 10,33
+3V
DGPU_OVT# 14
DGPU_PWROK 7,33,42,43
THRM_ALERT_HW#1 33
SVC2
SVD2
4
Place caps with APU < 1 inch
route PCIE as 85ohm +/- 10%
C718 0.1U/10V_4
C717 0.1U/10V_4
C725 0.1U/10V_4
C722 0.1U/10V_4
C357 0.1U/10V_4
C352 0.1U/10V_4
C333 0.1U/10V_4
C350 0.1U/10V_4
C366 0.1U/10V_4
C354 0.1U/10V_4
C383 0.1U/10V_4
C373 0.1U/10V_4
C295 0.1U/10V_4
C286 0.1U/10V_4
C284 0.1U/10V_4
C274 0.1U/10V_4
C299 0.1U/10V_4
C301 0.1U/10V_4
C260 0.1U/10V_4
C271 0.1U/10V_4
R461 *1K/F_4
+1.5V
R457 *0_4/S
4/19 For Comal.
R77 300_4
+1.5V
R275 300_4
+1.5V
+1.5VSUS
R434 1K/F_4
PV change to short-pad
4/19 For Comal.
R264 *0_4/S
FCH_PROCHOT#7
H_PROCHOT#33
4
U21C
AE11
AD11
AB11
AA11
AG12
AH12
AF10
AB12
AC10
AE12
AF12
L3
L2
K5
K4
K2
K1
J3
J2
H5
H4
H2
H1
G3
G2
F2
F1
L9
L8
L5
L6
K8
K7
J6
J5
B3
A3
C3
H10
J10
F10
G10
F9
G9
H9
B4
C5
A4
A5
C4
B5
DP0_TXP0
DP0_TXN0
DP0_TXP1
DP0_TXN1
DP0_TXP2
DP0_TXN2
DP0_TXP3
DP0_TXN3
DP1_TXP0
DP1_TXN0
DP1_TXP1
DP1_TXN1
DP1_TXP2
DP1_TXN2
DP1_TXP3
DP1_TXN3
DP2_TXP0
DP2_TXN0
DP2_TXP1
DP2_TXN1
DP2_TXP2
DP2_TXN2
DP2_TXP3
DP2_TXN3
CLKIN_H
CLKIN_L
DISP_CLKIN_H
DISP_CLKIN_L
SVC
SVD
SVT
SIC
SID
RESET_L
PWROK
PROCHOT_L
THERMTRIP_L
ALERT_L
TDI
TDO
TCK
TMS
TRST_L
DBRDY
DBREQ_L
VSS_SENSE
VDDP_SENSE
VDDNB_SENSE
VDDIO_SENSE
VDD_SENSE
VDDR_SENSE
INT_eDP_TXP0_C
INT_eDP_TXN0_C
INT_eDP_TXP1_C
INT_eDP_TXN1_C
TP106
TP105
TP107
TP108
APU_DP_TXP0_C
APU_DP_TXN0_C
APU_DP_TXP1_C
APU_DP_TXN1_C
APU_DP_TXP2_C
APU_DP_TXN2_C
APU_DP_TXP3_C
APU_DP_TXN3_C
PEG_HDMI_TXDP2
PEG_HDMI_TXDN2
PEG_HDMI_TXDP1
PEG_HDMI_TXDN1
PEG_HDMI_TXDP0
PEG_HDMI_TXDN0
PEG_HDMI_TXCP
PEG_HDMI_TXCN
CLK_APU_P
CLK_APU_N
CLK_DP_P
CLK_DP_N
SVC
SVD
APU_SVT_R
APU_SIC
APU_SID
APU_RST#
APU_PWRGD
APU_PROCHOT#
APU_THERMTRIP#
APU_ALERT
APU_TDI
APU_TDO
APU_TCK
APU_TMS
APU_TRST#
APU_DBRDY
APU_DBREQ#
VSS_SENSE
VDDP_FB_H
CPU_VDDNB_RUN_FB_H
VDDIO_FB_H
CPU_VDD0_RUN_FB_H
VDDP_FB_H
Richland APU
APU_PROCHOT# ⎗⎗⎗⎗ẍẍẍẍ䔞䔞䔞䔞 input or output
䔞䔞䔞䔞Low 㗪㗪㗪㗪CPU 㚫㚫㚫㚫旵旵旵旵 P - STATE
R435 *0_4/S
R436 *0_4/S
C662
220P/50V_4
APU_PROCHOT#
3
ANALOG/DISPLAY/MISC
DISPLAY
PORT 0
DISPLAY
PORT 1
DP_AUX_ZVSS
DISPLAY
PORT 2
CLK
TEST DISPLAY PORT
CTRL SER.
DMAACTIVE_L
JTAG
RSVD
SENSE
+1.5V
R61
*1K/F_4
reserve for leakage current verify
3
DP0_AUXP
DP0_AUXN
DP1_AUXP
DP1_AUXN
DP2_AUXP
DP2_AUXN
DP3_AUXP
DP3_AUXN
DP4_AUXP
DP4_AUXN
DP5_AUXP
DP5_AUXN
MISC.
DP0_HPD
DP1_HPD
DP2_HPD
DP3_HPD
DP4_HPD
DP5_HPD
DP_BLON
DP_DIGON
DP_VARY_BL
TEST6
TEST9
TEST10
TEST14
TEST15
TEST16
TEST17
TEST18
TEST19
TEST20
TEST24
TEST25_H
TEST25_L
TEST28_H
TEST28_L
TEST30_H
TEST30_L
TEST31
TEST32_H
TEST32_L
TEST35
FS1R2
TEST4
TEST5
RSVD_1
RSVD_2
RSVD_3
RSVD_4
+1.5VSUS
R62
1K/F_4
D1
D2
E1
APU_DP_AUXP_C
E2
APU_DP_AUXN_C
D5
SDVO_CLK
D6
SDVO_DATA
E5
E6
Display port pow er 1.5V min 1.2v max : 1.65v
F5
F6
G5
G6
D3
EDP_HPD
E3
FCH_VGA_HPD
D7
HDMI_HPD_CON
E7
F7
G7
C6
APU_LVDS_BLON
B6
APU_DISP_ON
A6
APU_DPST_PWM
C1
DP_AUX_ZVSS
AD12
M18
APU_TEST9
N18
APU_TEST10
F11
APU_TEST14_BP0
G11
APU_TEST15_BP1
H11
APU_TEST16_BP2
J11
APU_TEST17_BP3
F12
APU_TEST18
G12
APU_TEST19
J12
APU_TEST20_SCANCLK2
H12
APU_TEST24_SCANCLK1
AE10
APU_TEST25_H
AD10
APU_TEST25_L
L10
APU_TEST28_H
M10
APU_TEST28_L
P19
R19
K22
M_TEST
T19
N19
AA12
APU_TEST35
W10
FS1R2
AC12
DMAACTIVE_L
P18
CPU_THERMDA
R18
CPU_THERMDC
AMD internal test only
Y10
AA10
Y12
K21
C390 0.1U/10V_4
C395 0.1U/10V_4
R455 150/F_4
R66 10K/F_4
TP7
TP6
FS1R1 signals is for detect CPU TYPE and protect it.
FS1R1 CPU this pin is N.C
FS1R2 CPU this pin is LOW
can remove it at MP
VRHOT38
Add R5043 for verify this solution
+3V 2,6,8,9,10,11,12,22,23,24,25,26,27,29,30,31,32,33,41,42,43
+1.2V 5,37
+1.5V 2,22,23,27,32,38,41
+3VS5 6,8,9,10,25,32,33,35,36,38,41,43
+3VPCU 7,25,30,32,33,34,35
+1.5VSUS 2,3,5,11,12,40,41,43
TP10
TP8
TP41
TP36
TP18
TP25
TP39
TP27
TP4
TP5
TP11
TP9
DMAACTIVE_L controls
entry and exit from the
sleep and power states
+3VS5
R78 *1K/F_4
R79 1K/F_4
R72 *0_4/S
2
EDP_AUXP 22
EDP_AUXN 22
APU_DP_AUXP 8
APU_DP_AUXN 8
SDVO_CLK 25
SDVO_DATA 25
EDP_HPD 22,23
FCH_VGA_HPD 8
HDMI_HPD_CON 25
APU_LVDS_BLON 23
APU_DISP_ON 23
APU_DPST_PWM 22
APU_TEST18 2
APU_TEST19 2
+1.5V
+1.5VSUS
4/19 For Comal.
APU_PROCHOT#
MBCLK212,32,33
MBDATA212,32,33
2
LVDS
VGA
HDMI
M_TEST CONNECTION TBD
To AMD HDT
DMAACTIVE_L 7
SI
MBCLK2
MBDATA2
1
EDP_AUXP
EDP_AUXN
EDP_AUXP
EDP_AUXN
APU_DP_AUXP
APU_DP_AUXN
APU_DP_AUXP_C
APU_DP_AUXN_C
APU_TEST25_L
APU_TEST9
APU_TEST18
APU_TEST19
APU_TEST20_SCANCLK2
APU_TEST24_SCANCLK1
APU_TEST25_H
Q23
METR3904-G
D10 MEK500V-40
1%
1%
1%
R210 *100K/F_4
R215 *100K/F_4
R204 1.8K_4
R213 1.8K_4
R247 100K/F_4
R261 100K/F_4
R245 1.8K_4
R263 1.8K_4
+1.5VSUS
R191
*39.2/F_4
R200
39.2/F_4
R440
2K/F_4
2
13
Q24
METR3904-G
D9 MEK500V-40
352-(&75;
352-(&75;
352-(&75;
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
APU 3/4(Display/Misc)
APU 3/4(Display/Misc)
APU 3/4(Display/Misc)
Date: Sheet of
Date: Sheet of
Date: Sheet of
APU_TEST35M_TEST
7/8 For Comal.
TEST35 PU FOR INTERNAL
TEST35 PD FOR CUSTOMER
R88 510/F_4
4/19 For Comal.
R183 *0_4
R258 1K/F_4
R257 1K/F_4
R199 1K/F_4
R198 1K/F_4
R74 510/F_4
R437
2K/F_4
21
2
13
21
1
R438
1K/F_4
APU_SIC
APU_SID
04
+3V
+3V
+1.5VSUS
+1.5VSUS+1.5VSUS
R439
1K/F_4
443Tuesday, March 12, 2013
443Tuesday, March 12, 2013
443Tuesday, March 12, 2013
R202
301/_4
R201
*301/_4
+1.2V
1A
1A
1A
5
APU POWER TABLE
PIN NAME
VDD
VDDNB
VDDIO
VDDR +1.2V
D D
VDDA
C C
B B
A A
NET NAME
+VCC_CORE
+VDDNB_CORE
+1.5VSUS
+1.2V_VDDP
+1.2V_VDDR
+2.5V_VDDA
VOLTAGE
+1.1V
??
+1.5V
+1.2VVDDP
+2.5V
4/19 For Comal.
C753
22U/6.3V_8
C422
180P/50V_4
+VDDNB_CAP
C386
0.22U/10V_4
C759
22U/6.3V_8
C421
0.22U/10V_4
4/19 For Comal.
C276
22U/6.3VS_8
C292
22U/6.3VS_8
C275
180P/50V_4
2.8A Up to DDR3-1333 @ 1.50V VDDIO
+1.2V
C167
0.22U/10V_4
R428 *0_8/S
4/19 For Comal.
C283
0.22U/10V_4
+2.5V
5
C150
0.22U/10V_4
+1.2V_VDDP
VDDP = 5A
22U/6.3VS_8
C665
0.22U/6.3V_4
L17
PBY160808T-221Y-N(220,2A)
C411
22U/6.3V_8
C402
180P/50V_4
C151
0.22U/10V_4
C670
10U/6.3V_8
C667
0.22U/6.3V_4
+VDDNB_CORE
C393
180P/50V_4
+1.2V_VDDP
C674
10U/6.3V_8
C672
180P/50V_4
+VDDNB_CORE +VDDNB_CORE
+1.5VSUS
C218
0.22U/10V_4
C272
0.22U/10V_4
4/19 For Comal.
C239
180P/50V_4
C671
10U/6.3V_8
C666
180P/50V_4
VDDA= 0.75A
+2.5V_VDDA
C140
4.7U/6.3V_6
C139
0.22U/10V_4
4
+VCC_CORE
C147
3300P/50V_4
4
U21D
F8
VDD_1
H6
VDD_2
J1
VDD_3
J14
VDD_4
P6
VDD_5
P10
VDD_6
J16
VDD_7
J18
VDD_8
J9
VDD_9
K19
VDD_10
K3
VDD_11
K17
VDD_12
M3
VDD_13
K6
VDD_14
V10
VDD_15
V18
VDD_16
V3
VDD_17
F3
VDD_18
L18
VDD_19
V6
VDD_20
W1
VDD_21
T18
VDD_22
Y14
VDD_23
AA1
VDD_24
AB6
VDD_25
AC1
VDD_26
R1
VDD_27
P3
VDD_28
K10
VDD_29
H3
VDD_30
M19
VDD_31
C8
VDDNB_1
D10
VDDNB_2
B8
VDDNB_3
B12
VDDNB_4
C9
VDDNB_5
A9
VDDNB_6
A10
VDDNB_7
A8
VDDNB_8
A11
VDDNB_9
E10
VDDNB_10
E11
VDDNB_11
C10
VDDNB_12
H26
VDDIO_1
K20
VDDIO_2
J28
VDDIO_3
K23
VDDIO_4
K26
VDDIO_5
L22
VDDIO_6
L25
VDDIO_7
L28
VDDIO_8
M20
VDDIO_9
M23
VDDIO_10
M26
VDDIO_11
N22
VDDIO_12
N25
VDDIO_13
N28
VDDIO_14
P20
VDDIO_15
P23
VDDIO_16
P26
VDDIO_17
AA28
VDDIO_18
AH6
VDDP
AH5
VDDP
AH4
VDDP
AH3
VDDP
AH7
VDDP
AB10
VDDA
Richland APU
VDD_33
VDD_34
VDD_35
VDD_36
VDD_37
VDD_38
VDD_39
VDD_40
VDD_41
VDD_42
VDD_43
VDD_44
VDD_45
VDD_46
VDD_47
VDD_48
VDD_49
VDD_50
VDD_51
VDD_52
VDD_53
VDD_54
VDD_55
VDD_56
VDD_57
VDD_58
VDD_59
VDD_60
VDD_61
VDD_62
VDD_63
VDDNB_13
VDDNB_14
VDDNB_15
VDDNB_16
VDDNB_17
VDDNB_18
VDDNB_19
VDDNB_20
VDDNB_21
VDDNB_22
VDDNB_23
VDDNB_CAP
VDDNB_CAP
VDDIO_19
VDDIO_20
VDDIO_21
VDDIO_22
VDDIO_23
VDDIO_24
VDDIO_25
VDDIO_26
VDDIO_27
VDDIO_28
VDDIO_29
VDDIO_30
VDDIO_31
VDDIO_32
VDDIO_33
VDDIO_34
VDDIO_35
VDDIO_36
VDDR
VDDR
VDDR
VDDR
R11
T10
H8
G1
U11
W11
W13
W15
W17
W19
AB3
AD3
AD6
AE1
L1
Y6
M6
N11
N1
T3
T6
U19
U1
Y16
Y18
Y3
D4
F4
AF6
AF3
L11
C11
C12
D9
D8
D12
D11
B11
A12
B10
E12
B9
K13
K12
T23
T26
U22
U25
U28
Y26
T20
R28
R25
R22
V20
V23
V26
W22
W25
W28
Y24
G28
AG10
AH8
AH9
AH10
3
+VCC_CORE
25A
Maximum IDDNBspike 33A
+VDDNB_CAP
+1.5VSUS
36A
Maximum IDDspike 50A
C187
22U/6.3VS_8
C256
22U/6.3V_8
C170
22U/6.3VS_8
C237
0.22U/10V_4
C289
22U/6.3VS_8
C162
22U/6.3V_8
C225
22U/6.3V_8
C238
0.22U/10V_4
VDDR = 3.3A ( Up to DDR3-1333 @ 1.5V )
+1.2V_VDDR_B
C658
C668
10U/6.3V_8
10U/6.3V_8
C660
0.22U/6.3V_4
3
EMI suggestion
C186
22U/6.3V_8
C224
22U/6.3V_8
180P/50V_4
C164
C153
22U/6.3VS_8
C201
22U/6.3VS_8
C168
180P/50V_4
C200
22U/6.3VS_8
4/19 For Comal.
C193
22U/6.3VS_8
C228
0.01U/25V_4
C236
0.01U/25V_4
C220
0.01U/25V_4
DECOUPLING between PROCESSOR and DIMMs
Across VDDIO and VSS split
+1.5VSUS
0.22U/10V_4
C230
22U/6.3VS_8
C661
180P/50V_4
C166
C261
4.7U/6.3V_6
+1.2V
C663
180P/50V_4
C165
180P/50V_4
C249
4.7U/6.3V_6
C208
180P/50V_4
C207
4.7U/6.3V_6
C264
0.22U/10V_4
4/19 For Comal.
C229
22U/6.3VS_8
If the VSS plane is cut to create a VDDIO plane,
ceramic capacitors are connected across
the VDDIO and VSS plane split as follows
R426 *0_8/SC675
C657
10U/6.3V_8
C669
0.22U/10V_4
C659
1000P/50V_4
2
EC19
470P/50V_4
2
*470P/50V_4
C245
4.7U/6.3V_6
EC14
+VCC_CORE
EC18
*470P/50V_4
1
U21E
W18
AB17
AC22
AE21
AF24
AH23
AH25
AC11
AF11
W16
J20
VSS_1
L4
VSS_2
R7
VSS_3
VSS_4
A15
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
B7
VSS_12
C14
VSS_13
C16
VSS_14
C2
VSS_15
C20
VSS_16
C22
VSS_17
C24
VSS_18
C26
VSS_19
C28
VSS_20
D13
VSS_21
D15
VSS_22
D17
VSS_23
D19
VSS_24
D23
VSS_25
D25
VSS_26
D27
VSS_27
E4
VSS_28
E9
VSS_29
F14
VSS_30
F16
VSS_31
F18
VSS_32
F20
VSS_33
F22
VSS_34
F26
VSS_35
F28
VSS_36
G13
VSS_37
G15
VSS_38
G17
VSS_39
G19
VSS_40
G21
VSS_41
G23
VSS_42
G25
VSS_43
G4
VSS_44
J22
VSS_45
J24
VSS_46
J4
VSS_47
J7
VSS_48
K11
VSS_49
K14
VSS_50
K9
VSS_51
VSS_52
L19
VSS_53
L7
VSS_54
M11
VSS_55
VSS_56
V19
VSS_57
V9
VSS_58
VSS_59
W4
VSS_60
W7
VSS_61
Y11
VSS_62
Y20
VSS_63
Y22
VSS_64
Y9
VSS_65
A17
VSS_66
A13
VSS_68
K16
VSS_67
F24
VSS_69
G8
VSS_70
H7
VSS_71
J8
VSS_72
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
A19
A21
A23
A25
A7
AA4
AA7
AB13
AB15
AB19
AB21
AB23
AB25
AB27
AB9
AC14
AC16
AC18
AC20
AC24
AC26
AC28
AC4
AC7
AD9
AE13
AE15
AE17
M9
N10
N4
N7
R10
R4
T11
T9
U10
U18
U4
U7
V11
AE19
AE23
AE25
AE27
AE4
AE7
AF14
AF16
AF18
AF20
AF22
AF26
AF28
AF9
AG4
AG7
AH13
AH15
AH17
AH19
AH21
P9
C18
D21
W14
P11
C7
E8
K18
W12
Richland APU
352-(&75;
352-(&75;
352-(&75;
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
APU 4/4(POWER/GND)
APU 4/4(POWER/GND)
1%
1%
1%
APU 4/4(POWER/GND)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
05
543Tuesday, March 12, 2013
543Tuesday, March 12, 2013
543Tuesday, March 12, 2013
1A
1A
1A
5
4
3
2
1
remove PCIE_RST2# from AMD recommen d
SUSB#33
SUSC#33
DNBSWON#33
+3V
D D
C C
+3VS5
+3VS5
R369 2.2K_4
R365 2.2K_4
R508 *1K_4
1 2
J2
*SOLDERJUMPER-2
R370 10K/F_4
R371 10K/F_4
R364 2.2K_4
R367 2.2K_4
R344 2.2K_4
R343 2.2K_4
R360 *4.7K_4
C551 *0.01U/25V_4
R544 *10K/F_4
R494 10K/F_4
R570 *10K/F_4
SMB_RUN_CLK
to DDR3 SMBUS
SMB_RUN_DAT
SYS_RST#
SYS_RST# internal
10K pull up
SDA3
SCL2
SDA2
SMB_PCH_CLK
SMB_PCH_DAT
FCH_THERMTRIP#
PCIE_CLKREQ_WLAN#
DNBSWON#
ODD_DA#_FCH
GEVENT0# internal pull Hi 8.2K to +3V
GEVENT1# internal pull Hi 8.2K to +3V
GEVENT23# internal pull Hi 8.2K to +3V
GEVENT5# internal pull Hi 8.2K to +3VS5
PCIE_WAKE# no need to pull
Hi resistor from check list
GEVENT2# internal pull Hi 10K to +3VS5
CLK_REQ4# internal pull Hi 8.2K to +3V
CLK_REQ3# internal pull Hi 8.2K to +3V
CLK_REQ2# internal pull Hi 8.2K to +3V
This pin is used to
power down VGA DAC
regulators when CRT
no connected
GEVENT16# internal pull Hi 8.2K to +3VS5
GEVENT15# internal pull Hi 8.2K to +3VS5
LLB# Not Implemented ,left unconnected.
DB reserve
B B
A A
To Azalia
ACZ_SDOUT_R
ACZ_SYNC_R
ACZ_BCLK_R
ACZ_RST#_R
ACZ_SDIN0
Pure UMA can remove
VGA_REQ43
R496 33_4
R524 33_4
R495 33_4
R522 33_4
D6 *MEK500V-40
ACZ_SDOUT_AUDIO 27
ACZ_SYNC_AUDIO 27
BIT_CLK_AUDIO 27
ACZ_RST#_AUDIO 27
ACZ_SDIN0 27
CLK_REQ# already
internal pull up 8.2K
21
CLKREQ1#
FCH_PWRGD10
EC_A20GATE33
EC_RCIN#33
SIO_EXT_SMI#33
SIO_EXT_SCI#33
PCIE_WAKE#29,32
FCH_THERMTRIP#4
RSMRST#33
CLK_PCIE_REQ2#26
PCIE_CLKREQ_LAN#29
ACZ_SPKR27
SMB_RUN_CLK11,12,22
SMB_RUN_DAT11,12,22
SMB_PCH_CLK30
SMB_PCH_DAT30
PCIE_CLKREQ_WLAN#32
VGA_POWER_DOWN9
SPI_HOLD#8
ODD_PLUGIN#31
ODD_DA#_FCH31
For Zero ODD
HD audio
interface is
+3V_S5 voltage
4/19 For Comal.
+3V
4/19 For Comal.
R497 *0_4/S
C827 *100P/50V_4
R366 10K/F_4
R378 *0_4/S
R358 *0_4/S
R509 *10K/F_4
BT_COMBO_OFF#32
VGA_RSTB13
VGA_ON_SB33
TP78
TP112
TP74
TP85
TP82
TP76
TP113
TP100
TP81
TP98
TP115
TP110
TP83
TP109
TP114
TP84
TP125
TP95
TP96
TP111
TP116
TP117
PCIE_RST2#
RI#
SUSB#
SUSC#
DNBSWON#
FCH_PWRGD
FCH_TEST0
FCH_TEST1
FCH_TEST2
EC_A20GATE
EC_RCIN#
FCH_PME#
SIO_EXT_SMI#
GEVENT5#
SYS_RST#
PCIE_WAKE#
FCH_THERMTRIP#
WD_PWRGD
RSMRST#
CLK_PCIE_REQ2#
PCIE_CLKREQ_LAN#
FCH_GPIO66SCL3
SMB_RUN_CLK
SMB_RUN_DAT
SMB_PCH_CLK
SMB_PCH_DAT
PCIE_CLKREQ_WLAN#
CLKREQ1#
LLB#
SMARTVOLT2
VGA_PD
GBE_LED0
ODD_PLUGIN#
ODD_DA#_FCH
FCH_JTAG_TCK
FCH_JTAG_TDI
FCH_JTAG_RST#
ACZ_BCLK_R
ACZ_SDOUT_R
ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2_R
ACZ_SDIN3_R
ACZ_SYNC_R
ACZ_RST#_R
BT_COMBO_OFF#
VGA_RSTB
VGA_ON_SB
U28A
AB6
PCIE_RST2#/GEVENT4#
R2
RI#/GEVENT22#
W7
SPI_CS3#/GBE_STAT1/GEVENT21#
T3
SLP_S3#
W2
SLP_S5#
J4
PWR_BTN#
N7
PWR_GOOD
T9
TEST0
T10
TEST1/TMS
V9
TEST2
AE22
GA20IN/GEVENT0#
AG19
KBRST#/GEVENT1#
R9
PME#/GEVENT3#
C26
LPC_SMI#/GEVENT23#
T5
LPC_PD#/GEVENT5#
U4
SYS_RESET#/GEVENT19#
K1
WAKE#/GEVENT8#
V7
IR_RX1/GEVENT20#
R10
THRMTRIP#/SMBALERT#/GEVENT2#
AF19
WD_PWRGD
U2
RSMRST#
AG24
CLK_REQ4#/SATA_IS0#/GPIO64
AE24
CLK_REQ3#/SATA_IS1#/GPIO63
AE26
SMARTVOLT1/SATA_IS2#/GPIO50
AF22
CLK_REQ0#/SATA_IS3#/GPIO60
AH17
SATA_IS4#/FANOUT3/GPIO55
AG18
SATA_IS5#/FANIN3/GPIO59
AF24
SPKR/GPIO66
AD26
SCL0/GPIO43
AD25
SDA0/GPIO47
T7
SCL1/GPIO227
R7
SDA1/GPIO228
AG25
CLK_REQ2#/FANIN4/GPIO62
AG22
CLK_REQ1#/FANOUT4/GPIO61
J2
IR_LED#/LLB#/GPIO184
AG26
SMARTVOLT2/SHUTDOWN#/GPIO51
V8
DDR3_RST#/GEVENT7#/VGA_PD
W8
GBE_LED0/GPIO183
Y6
SPI_HOLD#/GBE_LED1/GEVENT9#
V10
GBE_LED2/GEVENT10#
AA8
GBE_STAT0/GEVENT11#
AF25
CLK_REQG#/GPIO65/OSCIN/IDLEEXIT#
M7
BLINK/USB_OC7#/GEVENT18#
R8
USB_OC6#/IR_TX1/GEVENT6#
T1
USB_OC5#/IR_TX0/GEVENT17#
P6
USB_OC4#/IR_RX0/GEVENT16#
F5
USB_OC3#/AC_PRES/TDO/GEVENT15#
P5
USB_OC2#/TCK/GEVENT14#
J7
USB_OC1#/TDI/GEVENT13#
T8
USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12#
AB3
AZ_BITCLK
AB1
AZ_SDOUT
AA2
AZ_SDIN0/GPIO167
Y5
AZ_SDIN1/GPIO168
Y3
AZ_SDIN2/GPIO169
Y1
AZ_SDIN3/GPIO170
AD6
AZ_SYNC
AE4
AZ_RST#
K19
PS2_DAT/SDA4/GPIO187
J19
PS2_CLK/CEC/SCL4/GPIO188
J21
SPI_CS2#/GBE_STAT2/GPIO166
D21
PS2KB_DAT/GPIO189
C20
PS2KB_CLK/GPIO190
D23
PS2M_DAT/GPIO191
C22
PS2M_CLK/GPIO192
F21
KSO_0/GPIO209
E20
KSO_1/GPIO210
F20
KSO_2/GPIO211
A22
KSO_3/GPIO212
E18
KSO_4/GPIO213
A20
KSO_5/GPIO214
J18
KSO_6/GPIO215
H18
KSO_7/GPIO216
G18
KSO_8/GPIO217
B21
KSO_9/GPIO218
K18
KSO_10/GPIO219
D19
KSO_11/GPIO220
A18
KSO_12/GPIO221
C18
KSO_13/GPIO222
B19
KSO_14/XDB0/GPIO223
B17
KSO_15/XDB1/GPIO224
A24
KSO_16/XDB2/GPIO225
D17
KSO_17/XDB3/GPIO226
Bolton-M3
BOLTON-M3
Part 4 of 5
USBCLK/14M_25M_48M_OSC
USB
MISC
USB
1.1
ACPI / WAKE UP
EVENTS
USB
GPIO
USB
OC
HD
AUDIO
USB
EC_PWM0/EC_TIMER0/GPIO197
EC_PWM1/EC_TIMER1/GPIO198
EC_PWM2/EC_TIMER2/WOL_EN/GPIO199
EC_PWM3/EC_TIMER3/GPIO200
EMBEDDED
CTRL
USB_RCOMP
USB_FSD1P/GPIO186
USB_FSD1N
USB_FSD0P/GPIO185
USB_FSD0N
USB_HSD13P
USB_HSD13N
USB_HSD12P
USB_HSD12N
USB_HSD11P
USB_HSD11N
USB_HSD10P
USB_HSD10N
USB_HSD9P
USB_HSD9N
USB_HSD8P
USB_HSD8N
USB_HSD7P
USB_HSD7N
USB_HSD6P
USB_HSD6N
2.0
USB_HSD5P
USB_HSD5N
USB_HSD4P
USB_HSD4N
USB_HSD3P
USB_HSD3N
USB_HSD2P
USB_HSD2N
USB_HSD1P
USB_HSD1N
USB_HSD0P
USB_HSD0N
USBSS_CALRP
USBSS_CALRN
USB_SS_TX3P
USB_SS_TX3N
USB_SS_RX3P
USB_SS_RX3N
USB_SS_TX2P
USB_SS_TX2N
USB_SS_RX2P
USB_SS_RX2N
USB_SS_TX1P
3.0
USB_SS_TX1N
USB_SS_RX1P
USB_SS_RX1N
USB_SS_TX0P
USB_SS_TX0N
USB_SS_RX0P
USB_SS_RX0N
SCL2/GPIO193
SDA2/GPIO194
SCL3_LV/GPIO195
SDA3_LV/GPIO196
KSI_0/GPIO201
KSI_1/GPIO202
KSI_2/GPIO203
KSI_3/GPIO204
KSI_4/GPIO205
KSI_5/GPIO206
KSI_6/GPIO207
KSI_7/GPIO208
G8
B9
USB_RCOMP_SB
H1
H3
H6
H5
H10
G10
K10
J12
G12
USBP11+
F12
USBP11-
K12
USBP10+
K13
USBP10-
B11
D11
E10
F10
C10
USBP7+
A10
USBP7-
H9
G9
A8
C8
F8
E8
C6
A6
C5
A5
C1
C3
E1
E3
C16
USBSS_CALRP
A16
USBSS_CALRN
A14
C14
C12
A12
USB 3.0 Not Implemented: left unconnected.
D15
B15
E14
F14
F15
G15
H13
G13
J16
H16
J15
K15
H19
SCL2
G19
SDA2
G22
SCL3
G21
SDA3
E22
H22
J22
EC_PWM2
H21
K21
K22
F22
F24
E24
B23
C24
F18
No need for GPIO200
R514 11.8K/F_6
USBP11+ 28
USBP11- 28
USBP10+ 28
USBP10- 28
USBP8+ 23
USBP8- 23
TP119
TP118
USBP3+ 26
USBN3- 26
USBP2+ 32
USBP2- 32
USBP0+ 29
USBP0- 29
R531 1K/F_4
R529 1K/F_4
USB30_TX1+ 28
USB30_TX1- 28
USB30_RX1+ 28
USB30_RX1- 28
USB30_TX0+ 28
USB30_TX0- 28
USB30_RX0+ 28
USB30_RX0- 28
EC_PWM2 10
06
Left side USB Combo 3.0/2.0.
Left side USB Combo 3.0/2.0.
Camera USB
WLAN Min-Card
Right side USB 2.0 Connector
+FCH_VDD_11_SSUSB_S
SCL3 of a TSI-capable APU's
thermal bus,Pulled up to
APU_VDDIO. Resistor value
verified in the relevant APU
design guide.
352-(&75;
352-(&75;
352-(&75;
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
FCH 1/5(GPIO/USB/AZ)
FCH 1/5(GPIO/USB/AZ)
1%
1%
5
4
3
2
1%
FCH 1/5(GPIO/USB/AZ)
Date: Sheet
Date: Sheet of
Date: Sheet of
1
643Tuesday, March 12, 2013
643Tuesday, March 12, 2013
643Tuesday, March 12, 2013
1A
1A
1A
of
5
CARD_PCIE_RST#26
MINI_PCIE_RST#25,32
LAN_PCIE_RST#29
GPU_RST#13
Place these PICE AC
D D
coupling cap close to FCH
PCIE_TXP3_CARD26
PCIE_TXN3_CARD26
TO LAN
TO LAN
C C
Pure UMA
can remove
B B
PCIE_TXP1_LAN29
PCIE_TXN1_LAN29
PCIE_RXP3_CARD26
PCIE_RXN3_CARD26
PCIE_RXP1_LAN29
PCIE_RXN1_LAN29
C834 150P/50V_4
C831 150P/50V_4
C830 150P/50V_4
C832 *150P/50V_4
UMI_RXP02
UMI_RXN02
UMI_RXP12
UMI_RXN12
UMI_RXP22
UMI_RXN22
UMI_RXP32
UMI_RXN32
UMI_TXP02
UMI_TXN02
UMI_TXP12
UMI_TXN12
UMI_TXP22
UMI_TXN22
UMI_TXP32
UMI_TXN32
+1.1V_PCIE_VDDR
PCIE_RXP3_CARD
PCIE_RXN3_CARD
PCIE_RXP1_LAN
PCIE_RXN1_LAN
+1.1V_CKVDD
CLK_DP_P4
CLK_DP_N4
PV change to shortpad
CLK_APU_P4
CLK_APU_N4
CLK_VGA_P13
CLK_VGA_N13
CLK_PCIE_WLAN32
CLK_PCIE_WLAN#32
CLK_PCIE_CARDP26
CLK_PCIE_CARDN26
R519 33_4
R515 33_4
R516 *33_4
R511 33_4
R512 *33_4
C880 0.1U/10V_4
C879 0.1U/10V_4
C891 0.1U/10V_4
C887 0.1U/10V_4
C612 0.1U/10V_4
C613 0.1U/10V_4
C890 0.1U/10V_4
C889 0.1U/10V_4
R381 590/F_4
R380 2K/F_4
C6170.1U/10V_4
C6150.1U/10V_4
R377 2K/F_4
2
RP4 *0X2/S
RP5 *0X2/S
RP8 *22X2
RP7 *0X2/S
RP6 47X2
1
4
3
4
3
2
1
4
3
2
1
4
3
2
1
2
1
4
3
Note: CLK_FCH_SRCP/N is 100MHZ SSC
Note: CLK_PCIE_TRAVISP/N is 100MHZ non-SSC
Note: CLK_DP_NSSCP/N is 100MHZ non-SSC
Note: CLK_APU_HCLKP/N is 100MHZ SSC
Note: CLK_PCIE_VGAP/N is 100MHZ SSC
Note: GPP_CLK(0:8)P/N is 100MHZ SSC capable
PV change to shortpad
4
2
R550
*1M/F_4
3
1
TP101
TP126
TP127
*27P/50V_4
*27P/50V_4
RP3 *0X2/S
R545 0_4
Y5
*25MHZ
CLK_PCIE_LANP29
CLK_PCIE_LANN29
PCH_XTAL25_IN25
C872
A A
C876
5
PCIE_RST#
A_RST#
UMI_RXP0_C
UMI_RXN0_C
UMI_RXP1_C
UMI_RXN1_C
UMI_RXP2_C
UMI_RXN2_C
UMI_RXP3_C
UMI_RXN3_C
PCIE_CALRP_FCH
PCIE_CALRN_FCH
PCIE_TXP3_CARD_C
C6180.1U/10V_4
PCIE_TXN3_CARD_C
C6160.1U/10V_4
CLK_CALRN_FCH
CLK_DP_FCH_P
CLK_DP_FCH_N
CLK_APU_FCH_P
CLK_APU_FCH_N
CLK_VGA_FCH_P
CLK_VGA_FCH_N
CLK_WLAN_FCH_P
CLK_WLAN_FCH_N
CLK_PCIE_CARDP_FCH
CLK_PCIE_CARDN_FCH
CLK_PCIE_LANP_FCH
CLK_PCIE_LANN_FCH
CLK_FLEX1_48M
4
PCIE_TXP1_C
PCIE_TXN1_C
25M_X1
25M_X2
4
U28E
AE2
PCIE_RST#
AD5
A_RST#
AE30
UMI_TX0P
AE32
UMI_TX0N
AD33
UMI_TX1P
AD31
UMI_TX1N
AD28
UMI_TX2P
AD29
UMI_TX2N
AC30
UMI_TX3P
AC32
UMI_TX3N
AB33
UMI_RX0P
AB31
UMI_RX0N
AB28
UMI_RX1P
AB29
UMI_RX1N
Y33
UMI_RX2P
Y31
UMI_RX2N
Y28
UMI_RX3P
Y29
UMI_RX3N
AF29
PCIE_CALRP
AF31
PCIE_CALRN
V33
GPP_TX0P
V31
GPP_TX0N
W30
GPP_TX1P
W32
GPP_TX1N
AB26
GPP_TX2P
AB27
GPP_TX2N
AA24
GPP_TX3P
AA23
GPP_TX3N
AA27
GPP_RX0P
AA26
GPP_RX0N
W27
GPP_RX1P
V27
GPP_RX1N
V26
GPP_RX2P
W26
GPP_RX2N
W24
GPP_RX3P
W23
GPP_RX3N
F27
CLK_CALRN
G30
PCIE_RCLKP
G28
PCIE_RCLKN
R26
DISP_CLKP
T26
DISP_CLKN
H33
DISP2_CLKP
H31
DISP2_CLKN
T24
APU_CLKP
T23
APU_CLKN
J30
SLT_GFX_CLKP
K29
SLT_GFX_CLKN
H27
GPP_CLK0P
H28
GPP_CLK0N
J27
GPP_CLK1P
K26
GPP_CLK1N
F33
GPP_CLK2P
F31
GPP_CLK2N
E33
GPP_CLK3P
E31
GPP_CLK3N
M23
GPP_CLK4P
M24
GPP_CLK4N
M27
GPP_CLK5P
M26
GPP_CLK5N
N25
GPP_CLK6P
N26
GPP_CLK6N
R23
GPP_CLK7P
R24
GPP_CLK7N
N27
GPP_CLK8P
R27
GPP_CLK8N
J26
14M_25M_48M_OSC
C31
25M_X1
C33
25M_X2
Bolton M3
BOLTON-M3
Part 1 of 5
PCI
CLKS
PCI EXPRESS
INTERFACES
LDRQ1#/CLK_REQ6#/GPIO49
CLOCK
GENERATOR
3
PCICLK0
PCICLK1/GPO36
PCICLK2/GPO37
PCICLK3/GPO38
PCICLK4/14M_OSC/GPO39
PCI
REQ2#/CLK_REQ8#/GPIO41
REQ3#/CLK_REQ5#/GPIO42
GNT3#/CLK_REQ7#/GPIO46
APU
S5
PLUS
PCIRST#
AD0/GPIO0
AD1/GPIO1
AD2/GPIO2
AD3/GPIO3
AD4/GPIO4
AD5/GPIO5
AD6/GPIO6
AD7/GPIO7
AD8/GPIO8
AD9/GPIO9
AD10/GPIO10
AD11/GPIO11
AD12/GPIO12
AD13/GPIO13
AD14/GPIO14
AD15/GPIO15
AD16/GPIO16
AD17/GPIO17
AD18/GPIO18
AD19/GPIO19
AD20/GPIO20
AD21/GPIO21
AD22/GPIO22
AD23/GPIO23
AD24/GPIO24
AD25/GPIO25
AD26/GPIO26
AD27/GPIO27
AD28/GPIO28
AD29/GPIO29
AD30/GPIO30
AD31/GPIO31
CBE0#
CBE1#
CBE2#
CBE3#
FRAME#
DEVSEL#
IRDY#
INTERFACE
GNT2#/SD_LED/GPO45
LPC
TRDY#
STOP#
PERR#
SERR#
REQ0#
REQ1#/GPIO40
GNT0#
GNT1#/GPO44
CLKRUN#
LOCK#
INTE#/GPIO32
INTF#/GPIO33
INTG#/GPIO34
INTH#/GPIO35
LPCCLK0
LPCCLK1
LFRAME#
LDRQ0#
SERIRQ/GPIO48
DMA_ACTIVE#
PROCHOT#
APU_PG
LDT_STP#
APU_RST#
32K_X1
32K_X2
S5_CORE_EN
RTCCLK
INTRUDER_ALERT#
VDDBT_RTC_G
3
PAR
LAD0
LAD1
LAD2
LAD3
AF3
AF1
AF5
AG2
AF6
AB5
AJ3
AL5
AG4
AL6
AH3
AJ5
AL1
AN5
AN6
AJ1
AL8
AL3
AM7
AJ6
AK7
AN8
AG9
AM11
AJ10
AL12
AK11
AN12
AG12
AE12
AC12
AE13
AF13
AH13
AH14
AD15
AC15
AE16
AN3
AJ8
AN10
AD12
AG10
AK9
AL10
AF10
AE10
AH1
AM9
AH8
AG15
AG13
AF15
AM17
AD16
AD13
AD21
AK17
AD19
AH9
AF18
AE18
AC16
AD18
B25
D25
D27
C28
A26
A29
A31
B27
AE27
AE19
G25
E28
E26
G26
F26
G2
G4
H7
F1
F3
E6
PCI_CLK1
PCI_CLK3
PCI_CLK4
PCIRST#_L
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
HUDSON_MEMHOT#_R
C838 100P/50V_4
FCH_GPIO44
CLKRUN#
TRAVIS_EN#
ACCEL_INTH#
LPC_CLK0
LPC_CLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ#0
LDRQ#1
SERIRQ
DMAACTIVE_L
FCH_PROCHOT#
APU_PWRGD_R
APU_STOP#
APU_RST#
32K_X1
32K_X2
S5_CORE_EN
CLK_RTC
INTRUDER_ALERT#
+3V_RTC
20MIL
R510 33_4
TP92
TP124
R528 *0_4
TP97
TP123
TP87
TP93
TP122
TP94
R705 *22_4
R538 33_4
LAD0 25,32,33
LAD1 25,32,33
LAD2 25,32,33
LAD3 25,32,33
LFRAME# 25,32,33
TP102
TP103
SERIRQ 25,33
DMAACTIVE_L 4
R383 *0_4/S
TP99
C601 0.022u/16V_4
TP80
TP77
C833
0.1U/10V_4
2
PCI_CLK1 10
PCI_CLK3 10
PCI_CLK4 10
KBC_RST#
PCI_AD23 10
PCI_AD24 10
PCI_AD25 10
PCI_AD26 10
PCI_AD27 10
DGPU_PWROK 4,33,42,43
C828 *150P/50V_4
KBC_RST# 33
+3V_RTC
20MIL
C907
PCI_SERR# 33
SPI_WP 8
CLKRUN# 25,33
ACCEL_INTH# 32
LPC_CLK0 10
LPC_CLK1 10
CLK_PCI_TPM 25
FCH PROCHOT#--- (input 0.8V threshold )
When it isasserted, it can generate SCI or
SMI to OS/BIOS
PV change to short-pad
APU_RST# 2,4
for AOS +3V noise issue
CLK_RTC 10
+3V_RTC
INTRUDER_ALERT# Left n ot connected
(FCH has 50-kohm internal pull-up to
VBAT).
1U/6.3V_4
CLK_PCI_TPM
Add R705 for support TPM function
FCH_PROCHOT# 4
APU_PWRGD 2,4
LDT_STP# let is NC from schematic recommend
2
MV change to reserve
R568 *499/F_4 R569 *10_4
EC72 *15P/50V_4
EC51 15P/50V_4R541 33_4
EC50 15P/50V_4
S5_CORE_EN is necessary to connect enable
pin of +3VPCU/+5VPCU regulator for S5+
mode implementation
+3VRTC_1 +3VRTC
CLK_33M_DEBUG 32
CLK_33M_KBC 33
32K_X1
R341
*20M_4
32K_X2
USE GROUND GUARD FOR 32K_X1 AND 32K_X2
1%
1%
1%
R338 0_4
4 1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
C527 *18P/50V_4
23
C532 *18P/50V_4
352-(&75;
352-(&75;
352-(&75;
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
FCH 2/5(ACPI/PCI/CLK)
FCH 2/5(ACPI/PCI/CLK)
FCH 2/5(ACPI/PCI/CLK)
Y3
*32.768KHZ
20MIL20MIL
1
*MEK500V-40
D16
88266-020L
1
07
D15
*MEK500V-40
20MIL
R565
*1K/F_4
20MIL
CN19
1
2
CLKGEN_RTC_X1 25
743Tuesday, March 12, 2013
743Tuesday, March 12, 2013
743Tuesday, March 12, 2013
+VCCRTC_2
+BAT
+BAT
+3VPCU
1A
1A
1A
5
U28D
BOLTON-M3
A3
VSS_1
A33
B7
B13
D9
D13
E5
E12
E16
E29
D D
C C
B B
F7
F9
F11
F13
F16
F17
F19
F23
F25
F29
G6
G16
G32
H12
H15
H29
J6
J9
J10
J13
J28
J32
K7
K16
K27
K28
L6
L12
L13
L15
L16
L21
M13
M16
M21
M25
N6
N11
N13
N23
N24
P12
P18
P20
P21
P31
P33
R4
R11
R25
R28
T11
T16
T18
N8
K25
H25
Bolton M3
ID4 CONFIG 31- Level BOM Item
0
0
001
0
0
0
11
0
1
0
0
1
A A
0
1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSSAN_HWM
VSSXL
VSSPL_SYS
1
11
0
1
0
1
000
00
1
1
1
Part 5 of 5
GROUND
VSSANQ_DAC
ID0ID1ID2ID3
0
0
0
0
0
0
0
0
00001
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSSPL_DAC
VSSAN_DAC
VSSIO_DAC
EFUSE
UMA
DIS
T25
T27
U6
U14
U17
U20
U21
U30
U32
V11
V16
V18
W4
W6
W25
W28
Y14
Y16
Y18
AA6
AA12
AA13
AA14
AA16
AA17
AA25
AA28
AA30
AA32
AB25
AC6
AC18
AC28
AD27
AE6
AE15
AE21
AE28
AF8
AF12
AF16
AF33
AG30
AG32
AH5
AH11
AH18
AH19
AH21
AH23
AH25
AH27
AJ18
AJ28
AJ29
AK21
AK25
AL18
AM21
AM25
AN1
AN18
AN28
AN33
T21
L28
K33
N28
R6
GPIO52 internal pull Hi 8.2K to +3V
GPIO53 internal pull Hi 8.2K to +3V
GPIO54 internal pull Hi 8.2K to +3V
GPIO56 internal pull Hi 8.2K to +3V
GPIO57 internal pull Hi 8.2K to +3V
GPIO58 internal pull Hi 8.2K to +3V
00101
1
0
01
1
0
1
1
11
5
4
SATA HDD
SATA ODD
+1.1V_AVDD_SATA
4/19 For Comal.
PLACE SATA AC COUPLING
CAPS CLOSE TO HUDSON-M2/ M 3
SATA_TXP031
SATA_TXN031
SATA_RXN031
SATA_RXP031
SATA_TXP131
SATA_TXN131
SATA_RXN131
SATA_RXP131
PLACE SATA_CAL RES VERY
CLOSE TO BALL OF
HUDSON-M2/M3
R379 1K/F_4
R375 931/F_4
R374 *220/F_6
+3V
SATA_LED#30
Integrated Clock Mode:
Leave unconnected.
Add GPIO for G-sensor LED control
RF_OFF#32
TP121
BT_COMBO_EN#32
ODD_PWR31
ACC_LED#30
1
2
3
4
5
6
7
8
9
10
11
12
4
SIDE_PORT_ID2
0
0
00NC
011
R353
10K/F_4
R350
10K/F_4
SATA_TXP0
SATA_TXN0
SATA_TXP1
SATA_TXN1
SATA_CALRP
SATA_CALRN
SATA_LED#
RF_OFF#
BT_OFF#
BT_COMBO_EN#
ODD_PWR
R506
10K/F_4
0
0
1
U28B
AK19
SATA_TX0P
AM19
SATA_TX0N
AL20
SATA_RX0N
AN20
SATA_RX0P
AN22
SATA_TX1P
AL22
SATA_TX1N
AH20
SATA_RX1N
AJ20
SATA_RX1P
AJ22
SATA_TX2P
AH22
SATA_TX2N
AM23
SATA_RX2N
AK23
SATA_RX2P
AH24
SATA_TX3P
AJ24
SATA_TX3N
AN24
SATA_RX3N
AL24
SATA_RX3P
AL26
SATA_TX4P
AN26
SATA_TX4N
AJ26
SATA_RX4N
AH26
SATA_RX4P
AN29
SATA_TX5P
AL28
SATA_TX5N
AK27
SATA_RX5N
AM27
SATA_RX5P
AL29
NC6
AN31
NC7
AL31
NC8
AL33
NC9
AH33
NC10
AH31
NC11
AJ33
NC12
AJ31
NC13
AF28
SATA_CALRP
AF27
SATA_CALRN
AD22
SATA_ACT#/GPIO67
AF21
SATA_X1
AG21
SATA_X2
AH16
FANOUT0/GPIO52
AM15
FANOUT1/GPIO53
AJ16
FANOUT2/GPIO54
AK15
FANIN0/GPIO56
AN16
FANIN1/GPIO57
AL16
FANIN2/GPIO58
K6
TEMPIN0
TEMPIN1
TEMPIN2
TEMPIN3
R351
10K/F_4
TEMPIN0/GPIO171
K5
TEMPIN1/GPIO172
K3
TEMPIN2/GPIO173
M6
TEMPIN3/TALERT#/GPIO174
Bolton M3
TEMP( 0 - 3 )
Temp Monitor Not Implemented
10-Kȍ 5% pull-up to +3VS5
or 10-Kȍ 5% pull-down
SIDE_PORT_ID0SIDE_PORT_ID1
0
1
3
BOLTON-M3
Samsung
Hynix
no supprot side port
3
SERIAL
ATA
HW
MONITOR
Part 2 of 5
SD_CLK/SCLK_2/GPIO73
SD_CMD/SLOAD_2/GPIO74
SD_DATA0/SDATI_2/GPIO77
SD_DATA1/SDATO_2/GPIO78
SD
CARD
GBE
LAN
SPI
ROM
ROM_RST#/SPI_WP#/GPIO161
VGA
DAC
VGA_DDC_SDA/GPO70
VGA_DDC_SCL/GPO71
VGA
MAINLINK
ML_VGA_HPD/GPIO229
VIN2/SDATI_1/GPIO177
VIN3/SDATO_1/GPIO178
VIN4/SLOAD_1/GPIO179
VIN5/SCLK_1/GPIO180
VIN6/GBE_STAT3/GPIO181
VIN7/GBE_LED3/GPIO182
+3VS5
SD_CD#/GPIO75
SD_WP/GPIO76
SD_DATA2/GPIO79
SD_DATA3/GPIO80
GBE_COL
GBE_CRS
GBE_MDCK
GBE_MDIO
GBE_RXCLK
GBE_RXD3
GBE_RXD2
GBE_RXD1
GBE_RXD0
GBE_RXCTL/RXDV
GBE_RXERR
GBE_TXCLK
GBE_TXD3
GBE_TXD2
GBE_TXD1
GBE_TXD0
GBE_TXCTL/TXEN
GBE_PHY_PD
GBE_PHY_RST#
GBE_PHY_INTR
SPI_DI/GPIO164
SPI_DO/GPIO163
SPI_CLK/GPIO162
SPI_CS1#/GPIO165
VGA_RED
VGA_GREEN
VGA_BLUE
VGA_HSYNC/GPO68
VGA_VSYNC/GPO69
VGA_DAC_RSET
AUX_VGA_CH_P
AUX_VGA_CH_N
AUXCAL
ML_VGA_L0P
ML_VGA_L0N
ML_VGA_L1P
ML_VGA_L1N
ML_VGA_L2P
ML_VGA_L2N
ML_VGA_L3P
ML_VGA_L3N
VIN0/GPIO175
VIN1/GPIO176
NC1
NC2
NC3
NC4
NC5
R489 *10K/F_4
R487 *10K/F_4
R486 *10K/F_4
R491 *10K/F_4
R490 *10K/F_4
R488 10K/F_4
R492 10K/F_4
R493 *10K/F_4
2
Vender
AMIC
WINBOND
AL14
AN14
Socket
AJ12
AH12
AK13
AM13
AH15
AJ14
AC4
AD3
AD9
W10
AB8
AH7
AF7
AE7
AD7
AG8
AD1
AB7
AF9
AG6
AE8
AD8
AB9
AC2
AA7
W9
V6
V5
V3
T6
V1
L30
L32
M29
M28
N30
M33
N32
K31
V28
V29
U28
T31
T33
T29
T28
R32
R30
P29
P28
C29
N2
M3
L2
N4
P1
P3
M1
M5
AG16
AH10
A28
G27
L4
GBE_PHY_INTR
SPI_SI
SPI_SO
SPI_CLK
SPI_CS0#
FCH_SPI_WP
FCH_CRT_R
FCH_CRT_G
FCH_CRT_B
VGA_HPD
SIDE_PORT_ID0
SIDE_PORT_ID1
SIDE_PORT_ID2
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
EC25
*22P/50V_4
R357 10K/F_4
R389 *0_4/S
R388 *0_4/S
R390 *0_4/S
VGA_DAC_REST
AUXCAL
R558 *10K/F_4
VIN ( 0 - 7 )
Voltage Monitor Not Implemented
10-Kȍ 5% pull-up to +3VS5
or 10-Kȍ 5% pull-down
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
SIDE_PORT_ID0
SIDE_PORT_ID1
SIDE_PORT_ID2
2
Size P/N
2M
2M
SPI_CLK
EMI
EC_BIOS_CS#33
EC_BIOS_SPI_CLK_I33
EC_BIOS_WR#33
EC_BIOS_RD#33
HMISO233
FCH_SPI_WP
TP75
TP73
TP72
TP79
ICT need TP2675 size
TP86
test point
HSYNC_COM 24
VSYNC_COM 24
DDCDATA 24
DDCCLK 24
R382 715/F_4
APU_DP_AUXP 4
APU_DP_AUXN 4
R557 100/F_4
APU_DP_TXP0 4
APU_DP_TXN0 4
APU_DP_TXP1 4
APU_DP_TXN1 4
APU_DP_TXP2 4
APU_DP_TXN2 4
APU_DP_TXP3 4
APU_DP_TXN3 4
FCH_VGA_HPD4
R501 10K/F_4
R499 10K/F_4
R498 10K/F_4
R503 10K/F_4
R502 10K/F_4
R500 *10K/F_4
R504 *10K/F_4
R505 10K/F_4
AKE38ZN0801
AKE38FP0N01
DFHS08FS023
R355 *0_4/S
R342 *0_4/S
R345 *0_4/S
R346 *0_4/S
R362 *0_4/S
R527 *0_4/S
+3VS5
SPI_HOLD#6
CRT_R 24
CRT_G 24
CRT_B 24
+FCH_VDDAN_11_MLDAC
+FCH_VDDAN_33_DAC_R
1%
1%
1%
1
08
FCH SPI ROM
Reserve for support quad read
+3VS5
Change U17 VDD
from +3V to +3VS5
for AMD DG.
R349
10K/F_4
HMISO333
FCH_VGA_HPD
ƵĂů
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
Date: Sheet of
C525 0.1U/10V_4
U17
1
SPI_CS0#
CE#
6
SPI_CLK
SCK
5
SPI_SO
SI
2
SPI_SI
SO
3
SPI_WP
WP#
*MX25L1605DM2I-12G
SPI_WP 7
R339 *0_4/S
R place close to PCH
FCH_CRT_R
FCH_CRT_G
FCH_CRT_B
FCH_VGA_HPD VGA_HPD
8
VDD
7
HOLD#
4
VSS
R361*10K/F_4
+3V
SPI_HOLD#
R387 150/F_4
R386 150/F_4
R385 150/F_4
R556 *0_4
Reserve for debug
+3V
VGA Hot-plug
+5V
R559
1K/F_4
Q26B
61
2
2N7002DW-7-F
352-(&75;
352-(&75;
352-(&75;
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
FCH 3/5(SATA/VGA/GND/ S P I )
FCH 3/5(SATA/VGA/GND/ S P I )
FCH 3/5(SATA/VGA/GND/ S P I )
ƵĂů
Q26A
34
2N7002DW-7-F
1
R553
100K/F_4
5
843Tuesday, March 12, 2013
843Tuesday, March 12, 2013
843Tuesday, March 12, 2013
+3VS5
VGA_HPD
R555
100K/F_4
of
R574
10K/F_4
1A
1A
1A
5
+3.3V_VDDIO
+3V
C563
0.1U/10V_4
D D
L48
+3V
PBY160808T-221Y-N(220,2A)
L47
+3V
PBY160808T-221Y-N(220,2A)
NOTE : LDO_CAP
A11 stepping : C will
install 1nf cap
A12 stepping : C will
let it to NC
+VDDPL_3.3V+3V
L50
PBY160808T-221Y-N(220,2A)
C C
VDDAN_33_USB_S : USB PHY I/O analog power
L41 PBY160808T-221Y-N(220,2A)
+3VS5
VDDAN_11_USB_S : USB PHY PLL analog power
VDDCR_11_USB_S : USB PHY core power
B B
M3 chipset need
to stuff for
support USB3.0
L60
+1.1VS5
PBY160808T-221Y-N(220,2A)
R530 *0_4
M2 chipset
need to
connect to GND
M3 remove
TRACE WIDTH >=15mil
C606
2.2U/6.3V_4
TRACE WIDTH >=15mil
C611
2.2U/6.3V_4
+FCH_VDDAN_11_MLDAC
C609
2.2U/6.3V_4
+1.1VS5
+1.1VS5
+FCH_VDD_11_SSUSB_S
C837
C836
1U/6.3V_4
0.1U/10V_4
C607
*0.1U/10V_4
C610
*0.1U/10V_4
VDDPL_33_USB_S : USB PHY PLL analog power
+3V_AVDD_USB +FCH_VDDPL_33_SUSB_S
C590
0.1U/10V_4
PBY160808T-221Y-N(220,2A)
PBY160808T-221Y-N(220,2A)
R525 *0_8/S
R526 *0_8/S
PBY160808T-221Y-N(220,2A)
C547
0.1U/10V_4
L66
L65
C839
0.1U/10V_4
VDDQ--3.3V I/O power
C540
C558
22U/6.3VS_8
M2 chipset need to connect to GND
M3 remove
+FCH_VDDAN_33_DAC_R
R368 *0_4
VDDAN_11_ML -- UMI 1.1V analog power
C580
0.1U/10V_4
L40
C554
10U/6.3V_8
VDDAN_11_SSUSB_S : USB3.0 PHY PLL analog power
C840
1U/6.3V_4
0.1U/10V_4
+FCH_VDDPL_33_MLDAC
+FCH_VDDPL_33_SSUSB_S
+FCH_VDDPL_33_SUSB_S
+FCH_VDDAN_11_DAC
+FCH_VDDAN_11_ML
C594
1U/6.3V_4
TRACE WIDTH >=50mil
C548
10U/6.3V_8
+FCH_VDDAN_11_USB_S
C861 0.1U/10V_4
C545 0.1U/10V_4
+FCH_VDDCR_11_USB_S
C544
0.1U/10V_4
+FCH_VDDAN_11_SSUSB_S_R
+FCH_VDDCR_11_SSUSB_S
C849
10U/6.3V_8
C534
2.2U/6.3V_4
C543
0.1U/10V_4
VDDCR_11_SSUSB_S : USB3.0 PHY core po wer
if support
Modem wake
up should be
change pull hi to
S5 power
A A
+3VS5 +FCH_VDDPL_33_SSUSB_S
L43
PBY160808T-221Y-N(220,2A)
M3 chipset need to stuff for support USB3.0
+3V
C572
2.2U/6.3V_6
5
M3 chipset need
to stuff for
support USB3.0
C578
0.1U/10V_4
VDDIO_AZ_S -- HD Audio
Interface I/O power
R356 *0_4/S
4
102mA
C550
0.1U/10V_4
+VDDPL_3.3V
+VDDPL_33_SYS
+VDDPL_33_DAC
+FCH_VDDPL_33_PCIE
+FCH_VDDPL_33_SATA
C605 *1000P/50V_4
C602
4.7U/6.3V_6
C538
1U/6.3V_4
+3V_AVDD_USB
C541
C537
1U/6.3V_4
1U/6.3V_4
2.2U/6.3V_4C542
TRACE WIDTH >=15mil
C860
10U/6.3V_8
C853
C854
0.1U/10V_4
1U/6.3V_4
+VDDIO_AZ
4
C557
0.1U/10V_4
47mA
20mA
20mA
30mA
11mA
14mA
11mA
12mA
+LDO_CAP
7mA
226mA
C586
0.1U/10V_4
470mA
140mA
TRACE WIDTH >=20mil
42mA
282mA
424mA
C855
0.1U/10V_4
C533
2.2U/6.3V_4
3
PLACE ALL THE DECOUPLING CAPS ON
THIS SHEET CLOSE TO SB AS POSSIBLE.
U28C
AB17
VDDIO_33_PCIGP_1
AB18
VDDIO_33_PCIGP_2
AE9
VDDIO_33_PCIGP_3
AD10
VDDIO_33_PCIGP_4
AG7
VDDIO_33_PCIGP_5
AC13
VDDIO_33_PCIGP_6
AB12
VDDIO_33_PCIGP_7
AB13
VDDIO_33_PCIGP_8
AB14
VDDIO_33_PCIGP_9
AB16
VDDIO_33_PCIGP_10
H24
VDDPL_33_SYS
V22
VDDPL_33_DAC
U22
VDDPL_33_ML
T22
VDDAN_33_DAC
L18
VDDPL_33_SSUSB_S
D7
VDDPL_33_USB_S
AH29
VDDPL_33_PCIE
AG28
VDDPL_33_SATA
M31
LDO_CAP
V21
VDDPL_11_DAC
Y22
VDDAN_11_ML_1
V23
VDDAN_11_ML_2
V24
VDDAN_11_ML_3
V25
VDDAN_11_ML_4
AB10
VDDIO_33_GBE_S
AB11
VDDCR_11_GBE_S_1
AA11
VDDCR_11_GBE_S_2
AA9
VDDIO_GBE_S_1
AA10
VDDIO_GBE_S_2
G7
VDDAN_33_USB_S_1
H8
VDDAN_33_USB_S_2
J8
VDDAN_33_USB_S_3
K8
VDDAN_33_USB_S_4
K9
VDDAN_33_USB_S_5
M9
VDDAN_33_USB_S_6
M10
VDDAN_33_USB_S_7
N9
VDDAN_33_USB_S_8
N10
VDDAN_33_USB_S_9
M12
VDDAN_33_USB_S_10
N12
VDDAN_33_USB_S_11
M11
VDDAN_33_USB_S_12
U12
VDDAN_11_USB_S_1
U13
VDDAN_11_USB_S_2
T12
VDDCR_11_USB_S_1
T13
VDDCR_11_USB_S_2
P16
VDDAN_11_SSUSB_S_1
M14
VDDAN_11_SSUSB_S_2
N14
VDDAN_11_SSUSB_S_3
P13
VDDAN_11_SSUSB_S_4
P14
VDDAN_11_SSUSB_S_5
N16
VDDCR_11_SSUSB_S_1
N17
VDDCR_11_SSUSB_S_2
P17
VDDCR_11_SSUSB_S_3
M17
VDDCR_11_SSUSB_S_4
Bolton-M3
BOLTON-M3
MAIN
POWER
PCI/GPIO I/O
PCI
LINK
GBE
LAN
SERIAL
Part 3 of 5
CORE
S0
VDDAN_11_CLK_1
VDDAN_11_CLK_2
VDDAN_11_CLK_3
VDDAN_11_CLK_4
VDDAN_11_CLK_5
VDDAN_11_CLK_6
VDDAN_11_CLK_7
VDDAN_11_CLK_8
CLKGEN
I/O
VDDAN_11_PCIE_1
VDDAN_11_PCIE_2
VDDAN_11_PCIE_3
VDDAN_11_PCIE_4
VDDAN_11_PCIE_5
VDDAN_11_PCIE_6
VDDAN_11_PCIE_7
EXPRESS
VDDAN_11_PCIE_8
VDDAN_11_SATA_1
VDDAN_11_SATA_4
VDDAN_11_SATA_2
VDDAN_11_SATA_3
VDDAN_11_SATA_5
VDDAN_11_SATA_6
VDDAN_11_SATA_7
VDDAN_11_SATA_8
ATA
VDDAN_11_SATA_9
VDDAN_11_SATA_10
VDDIO_33_S_1
VDDIO_33_S_2
VDDIO_33_S_3
VDDIO_33_S_4
VDDIO_33_S_5
VDDIO_33_S_6
VDDIO_33_S_7
VDDIO_33_S_8
3.3V_S5 I/O
USB
VDDCR_11_S_1
VDDCR_11_S_2
VDDPL_11_SYS_S
VDDAN_33_HW M_S
USB
SS
VDDCR_11_1
VDDCR_11_2
VDDCR_11_3
VDDCR_11_4
VDDCR_11_5
VDDCR_11_6
VDDCR_11_7
VDDCR_11_8
VDDCR_11_9
VDDXL_33_S
VDDIO_AZ_S
3
T14
T17
T20
U16
U18
V14
V17
V20
Y17
340mA
H26
J25
K24
L22
M22
N21
N22
P22
1088mA
AB24
Y21
AE25
AD24
AB23
AA22
AF26
AG27
1337mA
AA21
Y20
AB21
AB22
AC22
AC21
AA20
AA18
AB20
AC19
59mA
N18
L19
M18
V12
V13
Y12
Y13
W11
5mA
G24
187mA
N20
M20
70mA
J24
12mA
M8
26mA
AA4
Trace width >=20 mil
VGA_POWER_DOWN6
1007mA for M3
902mA for M2
TRACE WIDTH >=100mil
C562
0.1U/10V_4
TRACE WIDTH >=30mil
C600
1U/6.3V_4
+1.1V_PCIE_VDDR
C581
0.1U/10V_4
+1.1V_AVDD_SATA
C569
1U/6.3V_4
TRACE WIDTH >=20mil
+VDDXL_3.3V
+VDDCR_1.1V
TRACE WIDTH >=15mil
+VDDPL_1.1V
+VDDAN_3.3V_HWM
+VDDIO_AZ
VGA will power down
when CRT no insert
VGA_POWER_DOWN
VGA_PD is
generated
from FCH
2
+1.1V_VDDCR
VDDCR-- S/B CORE power
+1.1V
C571
C570
1U/6.3V_4
0.1U/10V_4
+1.1V_CKVDD
VDDAN_11_CLK-- Internal clock
Generator I/O power
C596
C598
1U/6.3V_4
0.1U/10V_4
C564
1U/6.3V_4
C599
0.1U/10V_4
C565
10U/6.3V_8
C608
22U/6.3VS_8
VDDAN_11_PCIE --PCIE/UMI analog power
C585
0.1U/10V_4
C597
1U/6.3V_4
C595
1U/6.3V_4
C603
22U/6.3VS_8
VDDAN_11_SATA--SATA PHY analog/IO power
C583
1U/6.3V_4
0.1U/10V_4
0.1U/10V_4
C574
22U/6.3VS_8
C568
C573
VDDIO_33_S-- 3.3v S5 I/O power
C546
C567
C561
*0.1U/10V_4
2.2U/6.3V_4
1U/6.3V_4
C556
1U/6.3V_4
VDDXL_33_S-- 25MHZ XTAL IO power
VDDCR_1.1_S-- 1.1V S5 Core power
+1.1VS5
C575
C842
1U/6.3V_4
2.2U/6.3V_4
+12VALW
R392
330K_6
1 2
+FCH_VGA_PWR_EN
3
Q18
ME2N7002E
2
R384
2.2K_4
C614
1U/6.3V_4
1
C620
0.022U/25V_4
2 1
+3V 2,4,6,8,10,11,12,22,23,24,25,26,27,29,30,31,32,33,41,42,43
+1.1V 41
+3VS5 4,6,8,10,25,32,33,35,36,38,41,43
+1.1VS5 36,41
+12VALW 34,41,43
2
L49
HCB1608KF-181T15
TRACE WIDTH >=100mil
L46
HCB1608KF-181T15
TRACE WIDTH >=50mil
L42
HCB1608KF-181T15
if support USB
3.0 wake up
should be
change pull hi
to S5 power
+VDDIO_3.3V
C559
C549
1U/6.3V_4
1U/6.3V_4
C588
*0.1U/10V_4
+3V
3
2
Q17
PMV45EN
1
+FCH_VDDAN_33_DAC
+1.1V +FCH_VDDPL_33_MLDAC+FCH_VDDAN_33_DAC_R
3
2
Q28
PMV45EN
1
+VDDAN_11_MLDAC
+1.1V
+1.1V
+1.1VS5
PBY160808T-221Y-N(220,2A)
+1.1V
+3VS5
+3VS5
L45
PBY160808T-221Y-N(220,2A)
C587
2.2U/6.3V_4
This circuit is
for switch DAC and
UMI analog power
L70
PBY160808T-221Y-N(220,2A)
233 mA Max
L67
PBY160808T-221Y-N(220,2A)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
1%
1%
1%
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
09
Reserve for VDDAN_11_CL
leakage current issue
VDDPL_11_SYS_S : System Clock Gen
PLLs analog power
L44
PBY160808T-221Y-N(220,2A)
if support USB
3.0 wake up
should be
change pull hi
to S5 power
352-(&75;
352-(&75;
352-(&75;
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
FCH 4/5(POWER)
FCH 4/5(POWER)
FCH 4/5(POWER)
+VDDPL_1.1V
C579
2.2U/6.3V_4
VDDAN_33_HWM_S -- Hardware
monitor interface I/O power
+VDDAN_3.3V_HWM
L58
C829
2.2U/6.3V_4
+3VS5
32 mA Max
+FCH_VDDAN_33_DAC_R
C888
2.2U/6.3V_4
R561 *0_8/S
+FCH_VDDAN_11_MLDAC
1
C892
0.1U/10V_4
C582
2.2U/6.3V_4
943Tuesday, March 12, 2013
943Tuesday, March 12, 2013
943Tuesday, March 12, 2013
C589
0.1U/10V_4
C536
0.1U/10V_4
C894
0.1U/10V_4
1A
1A
1A
STRAPS PINS
5
OVERLAP COMMON PADS WHERE
POSSIBLE FOR DUAL-OP RESISTORS.
+3V +3VS5 +3VS5 +3VS5
4
3
2
1
DEBUG STRAPS
10
D D
PCI_CLK17
PCI_CLK37
PCI_CLK47
LPC_CLK07
LPC_CLK17
EC_PWM26
CLK_RTC7
C C
PCI_CLK1
PCI_CLK3
PCI_CLK4
LPC_CLK0
LPC_CLK1
EC_PWM2
CLK_RTC
R517
10K/F_4
R520
*10K_4
R521
10K/F_4
R523
10K/F_4
R543
10K/F_4
R540
10K/F_4
R373
*10K/F_4
R372
2.2K_4
R507
10K/F_4
R513
*2.2K_4
FCH has 15K Internal Pull Up for PCI_AD[27:23]
PCI_AD277
PCI_AD267
PCI_AD257
PCI_AD247
PCI_AD237
PULL
HIGH
PULL
LOW
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD27 PCI_AD26
USE PCI
PLL
DEFAULT
BYPASS
PCI PLL
DISABLE ILA
AUTORUN
DEFAULT
ENABLE ILA
AUTORUN
PCI_AD25 PCI_AD24
USE FC
PLL
DEFAULT
BYPASS FC
PLL
TP120
TP90
remove reserve pull low resistor
TP89
reserve test point onl y .
TP88
TP91
USE DEFAULT
PCIE STRAPS
DEFAULT
USE EEPROM
PCIE STRAPS
PCI_AD23
DISABLE PCI
MEM BOOT
DEFAULT
ENABLE PCI
MEM BOOT
REQUIRED STRAPS
--------
PULL
HIGH
PULL
LOW
B B
FCH PWRGD
--------
--------
ALLOW
PCIE Gen2
DEFAULT
FORCE
PCIE Gen1
PCI_CLK3 PCI_CLK4
USE
DEBUG
--------
STRAP
IGNORE
--------
DEBUG
STRAP
DEFAULT
non_Fusion
CLOCK MODE
FUSION
CLOCK MODE
DEFAULT
LPC_CLK0
AMD internal EC
ENABLED
EC
DISABLED
DEFAULT
LPC_CLK1
CLKGEN
ENABLED
DEFAULT
CLKGEN
DISABLED
EC_PWM2
LPC ROM
SPI ROM S5 PLUS MODE
DEFAULT
CLK_RTCPCI_CLK1 --------
S5 PLUS MODE
DISABLED
DEFAULT
ENABLED
+3V
3
+3VS5
R584
*10K/F_4
C826
*2.2U/6.3V_4
R485
10K/F_4
FCH_PWRGD 6
352-(&75;
352-(&75;
352-(&75;
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
FCH 5/5(Strap &PWRGD)
FCH 5/5(Strap &PWRGD)
1%
1%
3
2
1%
FCH 5/5(Strap &PWRGD)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
10 43Tuesday, March 12, 2013
10 43Tuesday, March 12, 2013
10 43Tuesday, March 12, 2013
1A
1A
1A
SI reserve for AMD DG
D12 BAT54A
CPU_VRM8380_PG38
ECPWROK4,33
A A
5
2
1
4
5
4
3
2
1
M_A_A[15:0]3
D D
M_A_BS#03
M_A_BS#13
M_A_BS#23
M_A_CS#03
M_A_CS#13
M_A_CLKP03
M_A_CLKN03
M_A_CLKP13
M_A_CLKN13
M_A_CKE03
M_A_CKE13
M_A_CAS#3
M_A_RAS#3
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
EMI
M_A_WE#3
SMB_RUN_CLK6,12,22
SMB_RUN_DAT6,12,22
M_A_ODT03
M_A_ODT13
M_A_DQSP[7:0]3
M_A_DQSN[7:0]3
+VREF_CA0
+VREF_DQ0
R427 10K_4
R37 10K_4
M_A_DM[7..0]3
C C
B B
A A
Place these Caps near So-Dimm0.
+1.5VSUS +0.75V_DDR_VTT
C210 10U/6.3VS_6
C188 10U/6.3VS_6
C282 10U/6.3VS_6 C39 1U/6.3V_4
C144 10U/6.3VS_6
C258 10U/6.3VS_6
C189 0.1U/10V_4
C246 0.1U/10V_4
C198 0.1U/10V_4
C262 0.1U/10V_4
C197 0.1U/10V_4
EC12 150P/50V_4
EC8 150P/50V_4
C287 0.1U/10V_4
+3V
C64 2.2U/6.3V_4
C63 *0.1U/10V_4
C65 *0.047U/10V_4
5
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
DIMM0_SA0
DIMM0_SA1
SMB_RUN_CLK
SMB_RUN_DAT
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
C37 1U/6.3V_4
C38 1U/6.3V_4
C40 1U/6.3V_4
C33 *10U/6.3V_6
C35 10U/6.3VS_6C209 10U/6.3VS_6
C36 10U/6.3VS_6
C41 *0.047U/10V_4
C42 *0.047U/10V_4
EC1 0.1U/10V_4
EC2 0.1U/10V_4
EMI request
C126 0.1U/10V_4
C131 1000P/50V_4
EC7 *0.047U/10V_4
C417 0.1U/10V_4
C425 1000P/50V_4
JDIM2A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDR3-DIMM0_H=9.2_STD
PC2100 DDR3 SDRAM SO-DIMM
4
5
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
(204P)
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
M_A_DQ0
7
M_A_DQ1
15
M_A_DQ2
17
M_A_DQ3
4
M_A_DQ4
6
M_A_DQ5
16
M_A_DQ6
18
M_A_DQ7
21
M_A_DQ8
23
M_A_DQ9
33
M_A_DQ10
35
M_A_DQ11
22
M_A_DQ12
24
M_A_DQ13
34
M_A_DQ14
36
M_A_DQ15
39
M_A_DQ16
41
M_A_DQ17
51
M_A_DQ18
53
M_A_DQ19
40
M_A_DQ20
42
M_A_DQ21
50
M_A_DQ22
52
M_A_DQ23
57
M_A_DQ24
59
M_A_DQ25
67
M_A_DQ26
69
M_A_DQ27
56
M_A_DQ28
58
M_A_DQ29
68
M_A_DQ30
70
M_A_DQ31
129
M_A_DQ32
131
M_A_DQ33
141
M_A_DQ34
143
M_A_DQ35
130
M_A_DQ36
132
M_A_DQ37
140
M_A_DQ38
142
M_A_DQ39
147
M_A_DQ40
149
M_A_DQ41
157
M_A_DQ42
159
M_A_DQ43
146
M_A_DQ44
148
M_A_DQ45
158
M_A_DQ46
160
M_A_DQ47
163
M_A_DQ48
165
M_A_DQ49
175
M_A_DQ50
177
M_A_DQ51
164
M_A_DQ52
166
M_A_DQ53
174
M_A_DQ54
176
M_A_DQ55
181
M_A_DQ56
183
M_A_DQ57
191
M_A_DQ58
193
M_A_DQ59
180
M_A_DQ60
182
M_A_DQ61
192
M_A_DQ62
194
M_A_DQ63
SI stuff
M_A_DQ[63:0] 3
R105 1K_4
+VREF_CA0
+VREF_DQ
SI change from short pad to *0R
R93 *0_4
R121 1K_4
3
DDR_VTTREF 3,12,40
+1.5VSUS
M_A_EVENT#3,12
M_A_RST#3
R277 *0_6/S
+3V
+VREF_CA0
+1.5VSUS
2.48A
+3V
R38 *10K_4
M_A_EVENT#
+VREF_DQ0
+VREF_CA0
2
JDIM2B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
26
31
32
37
38
43
PC2100 DDR3 SDRAM SO-DIMM
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
DDR3-DIMM0_H=9.2_STD
+3V 2,4,6,8,9,10,12,22,23,24,25,26,27,29,30,31,32,33,41,42,43
+1.5V 2,4,22,23,27,32,38,41
+3VPCU 7,25,30,32,33,34,35
+1.5VSUS 2,3,4,5,12,40,41,43
+0.75V_DDR_VTT 12,40
1%
1%
1%
44
VSS16
48
VSS17
49
VSS18
54
VSS19
55
VSS20
60
VSS21
61
VSS22
65
VSS23
66
VSS24
71
VSS25
72
VSS26
127
VSS27
128
VSS28
133
VSS29
134
VSS30
138
VSS31
139
VSS32
144
VSS33
145
VSS34
150
VSS35
151
VSS36
155
VSS37
156
VSS38
161
VSS39
162
VSS40
167
VSS41
168
VSS42
172
VSS43
173
VSS44
178
VSS45
179
VSS46
184
VSS47
185
VSS48
189
VSS49
190
VSS50
195
VSS51
196
VSS52
(204P)
203
VTT1
204
VTT2
205
GND
206
GND
352-(&75;
352-(&75;
352-(&75;
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
DDR3 DIMM0-STD (9.2H)
DDR3 DIMM0-STD (9.2H)
DDR3 DIMM0-STD (9.2H)
Date: Sheet of
Date: Sheet of
Date: Sheet of
+0.75V_DDR_VTT
1
11
11 43Tuesday, March 12, 2013
11 43Tuesday, March 12, 2013
11 43Tuesday, March 12, 2013
1A
1A
1A
5
4
3
2
1
2.48A
+3V
M_B_EVENT#
+VREF_DQ1
+VREF_CA1
SCLK_G780
SDA_G780
SCLK_G780
SDA_G780
M_A_EVENT#
PM_EXTTS#0_EC
R281 *10K_4
2
+1.5VSUS
+3V
JDIM1B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
26
31
32
37
38
43
PC2100 DDR3 SDRAM SO-DIMM
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
DDR3-DIMM1_H=5.2_STD
DDR3 Thermal Sensor
U11
8
VCC
SCLK
7
DXP
SDA
6
DXN
ALERT#
4
GND
OVERT#
*G780P81U
1%
1%
1%
+3V
2
12
Q10
*METR3904-G
1 3
12 43Tuesday, March 12, 2013
12 43Tuesday, March 12, 2013
12 43Tuesday, March 12, 2013
44
VSS16
48
VSS17
49
VSS18
54
VSS19
55
VSS20
60
VSS21
61
VSS22
65
VSS23
66
VSS24
71
VSS25
72
VSS26
127
VSS27
128
VSS28
133
VSS29
134
VSS30
138
VSS31
139
VSS32
144
VSS33
145
VSS34
150
VSS35
151
VSS36
155
VSS37
156
VSS38
161
VSS39
162
VSS40
167
VSS41
168
VSS42
172
VSS43
173
VSS44
178
VSS45
179
VSS46
184
VSS47
185
VSS48
189
VSS49
190
VSS50
195
VSS51
196
VSS52
(204P)
203
VTT1
204
VTT2
205
GND
206
GND
C429 *0.01U/25V_4
1
2
3
5
+0.75V_DDR_VTT 11,40
+1.5VSUS 2,3,4,5,11,40,41,43
+3VPCU 7,25,30,32,33,34,35
+3V 2,4,6,8,9,10,11,22,23,24,25,26,27,29,30,31,32,33,41,42,43
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
+0.75V_DDR_VTT
DDR_THERMDA
C389
*2200P/50V_4
DDR_THERMDC
352-(&75;
352-(&75;
352-(&75;
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
DDR3 DIMM1-STD (5.2H)
DDR3 DIMM1-STD (5.2H)
DDR3 DIMM1-STD (5.2H)
1
1A
1A
1A
M_B_A[15:0]3
D D
M_B_BS#03
M_B_BS#13
M_B_BS#23
M_B_CS#03
M_B_CS#13
M_B_CLKP03
M_B_CLKN03
M_B_CLKP13
M_B_CLKN13
M_B_CKE03
M_B_CKE13
M_B_CAS#3
M_B_RAS#3
R39 4.7K_4
+3V
R40 10K_4
C C
B B
M_B_DM[7..0]3
M_B_WE#3
SMB_RUN_CLK6,11,22
SMB_RUN_DAT6,11,22
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQSP[7:0]3
M_B_DQSN[7:0]3
M_B_ODT03
M_B_ODT13
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
DIMM1_SA0
DIMM1_SA1
M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7
JDIM1A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDR3-DIMM1_H=5.2_STD
PC2100 DDR3 SDRAM SO-DIMM
5
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
(204P)
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
M_B_DQ0
7
M_B_DQ1
15
M_B_DQ2
17
M_B_DQ3
4
M_B_DQ4
6
M_B_DQ5
16
M_B_DQ6
18
M_B_DQ7
21
M_B_DQ8
23
M_B_DQ9
33
M_B_DQ10
35
M_B_DQ11
22
M_B_DQ12
24
M_B_DQ13
34
M_B_DQ14
36
M_B_DQ15
39
M_B_DQ16
41
M_B_DQ17
51
M_B_DQ18
53
M_B_DQ19
40
M_B_DQ20
42
M_B_DQ21
50
M_B_DQ22
52
M_B_DQ23
57
M_B_DQ24
59
M_B_DQ25
67
M_B_DQ26
69
M_B_DQ27
56
M_B_DQ28
58
M_B_DQ29
68
M_B_DQ30
70
M_B_DQ31
129
M_B_DQ32
131
M_B_DQ33
141
M_B_DQ34
143
M_B_DQ35
130
M_B_DQ36
132
M_B_DQ37
140
M_B_DQ38
142
M_B_DQ39
147
M_B_DQ40
149
M_B_DQ41
157
M_B_DQ42
159
M_B_DQ43
146
M_B_DQ44
148
M_B_DQ45
158
M_B_DQ46
160
M_B_DQ47
163
M_B_DQ48
165
M_B_DQ49
175
M_B_DQ50
177
M_B_DQ51
164
M_B_DQ52
166
M_B_DQ53
174
M_B_DQ54
176
M_B_DQ55
181
M_B_DQ56
183
M_B_DQ57
191
M_B_DQ58
193
M_B_DQ59
180
M_B_DQ60
182
M_B_DQ61
192
M_B_DQ62
194
M_B_DQ63
M_B_DQ[63:0] 3
M_B_EVENT#3
M_B_RST#3
5
2
6
*2N7002DW
R279 *0_6/S
+VREF_CA1
Q13
43
R289 *4.7K_4
R283 *4.7K_4
1
+VREF_DQ
+3V
MBCLK24,32,33
MBDATA24,32,33
Place these Caps near So-Dimm1.
+1.5VSUS
C129 10U/6.3VS_6
C134 10U/6.3VS_6
C157 10U/6.3VS_6
C219 10U/6.3VS_6
C244 10U/6.3VS_6 C44 1U/6.3V_4
C265 10U/6.3VS_6
C259 0.1U/10V_4
C216 0.1U/10V_4
C206 0.1U/10V_4
C263 0.1U/10V_4
EC11 150P/50V_4
EC9 150P/50V_4
EC13 150P/50V_4
EC10 150P/50V_4
+3V
C61 2.2U/6.3V_4
A A
C62 *0.1U/10V_4
C60 *0.047U/10V_4
EMI
5
+0.75V_DDR_VTT
+VREF_DQ1
+VREF_CA1
C46 1U/6.3V_4
C45 1U/6.3V_4
C52 1U/6.3V_4
C43 *10U/6.3V_6
C34 *10U/6.3V_6
C47 10U/6.3VS_6
C54 *0.047U/10V_4
C53 *0.047U/10V_4C288 0.1U/10V_4
C424 0.1U/10V_4
C423 1000P/50V_4
C116 0.1U/10V_4
C122 1000P/50V_4
C118 *0.047U/10V_4
EMI
for WiMAX
+1.5VSUS
150P/50V_4
EC23
150P/50V_4
R111 1K_4
4
EC16
SI stuff
150P/50V_4
EC22
+VREF_CA1
C227 *100P/50V_4
SI change from short pad to *0R
R95 *0_4
R118 1K_4
C285 *100P/50V_4
DDR_VTTREF 3,11,40
+1.5VSUS
+1.5VSUS
R267
1K/F_4
R276
1K/F_4
M_A_EVENT#3,11
+3V
+VREF_DQ
+VREF_DQ
C414
*0.47U/6.3V_4
3
5
4
U23A
PART 1 0F 9
3
2
1
13
AA38
W36
W38
AB35
AA36
AH16
AA30
Y37
Y35
V37
V35
U36
U38
T37
T35
R36
R38
P37
P35
N36
N38
M37
M35
L36
L38
K37
K35
J36
J38
H37
H35
G36
G38
F37
F35
E37
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_RX8P
PCIE_RX8N
PCIE_RX9P
PCIE_RX9N
PCIE_RX10P
PCIE_RX10N
PCIE_RX11P
PCIE_RX11N
PCIE_RX12P
PCIE_RX12N
PCIE_RX13P
PCIE_RX13N
PCIE_RX14P
PCIE_RX14N
PCIE_RX15P
PCIE_RX15N
CLOCK
PCIE_REFCLKP
PCIE_REFCLKN
TEST_PG
PERSTB
*SUN_M2_XT
PCI EXPRESS INTERFACE
CALIBRATION
SUN_M2_XT
+3V_DELAY
PEG_TXP02
D D
C C
B B
For Mars /Sun NC pin :
N38,M37,M35,L36,L38,K37,K35,J36,J38
H37,H35,G36,G38,F37,F35,E37
PEG_TXN02
PEG_TXP12
PEG_TXN12
PEG_TXP22
PEG_TXN22
PEG_TXP32
PEG_TXN32
PEG_TXP42
PEG_TXN42
PEG_TXP52
PEG_TXN52
PEG_TXP62
PEG_TXN62
PEG_TXP72
PEG_TXN72
CLK_VGA_P7
CLK_VGA_N7
Ra
R176 *1K/F_4
PEGX_RST#
100MHz (+/-300ppm) input frequency,
0-0.7V single-ended swing
DB change for leakage issue
*U74AHC1G08G-AL5-R
U7
A A
GPU_RST#7
VGA_RSTB6
R243 *330_4
2
1
3 5
5
4
*0.1U/10V_4
4
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
PCIE_CALR_TX
PCIE_CALR_RX
C374
R238
*100K_4
PEGX_RST#
Y33
Y32
W33
W32
U33
U32
U30
U29
T33
T32
T30
T29
P33
P32
P30
P29
N33
N32
N30
N29
L33
L32
L30
L29
K33
K32
J33
J32
K30
K29
H33
H32
Y30
Y29
C_PEG_RXP0
C_PEG_RXN0
C_PEG_RXP1
C_PEG_RXN1
C_PEG_RXP2
C_PEG_RXN2
C_PEG_RXP3
C_PEG_RXN3
C_PEG_RXP4
C_PEG_RXN4
C_PEG_RXP5
C_PEG_RXN5
C_PEG_RXP6
C_PEG_RXN6
C_PEG_RXP7
C_PEG_RXN7
C736 *0.1U/10V_4
C733 *0.1U/10V_4
C744 *0.1U/10V_4
C740 *0.1U/10V_4
C731 *0.1U/10V_4
C728 *0.1U/10V_4
C715 *0.1U/10V_4
C709 *0.1U/10V_4
C749 *0.1U/10V_4
C747 *0.1U/10V_4
C726 *0.1U/10V_4
C723 *0.1U/10V_4
C730 *0.1U/10V_4
C735 *0.1U/10V_4
C739 *0.1U/10V_4
C743 *0.1U/10V_4
FOR Mars / Sun NC pin :
N33,N32,N30,N29,L33,L32,L30,L29,K33,K32
J33,J32,K30,K29,H33,H32
Mars/ Sun Only : Stuff Ra
Ra
R230 *1.69K/F_4
Do not install for Mars/ Sun, check AMD can del?
PCIE_CALRP
PCIE_CALRN
Rb
R233 *1.27K/F_4
R234 *1K/F_4
Rc
Install 1k for Mars / Sun
MARS/SUN
Ra
1.69K
Rb
n/a
Rc
1K
3
+1.0V_VGA
+1.0V_VGA
PEG_RXP0 2
PEG_RXN0 2
PEG_RXP1 2
PEG_RXN1 2
PEG_RXP2 2
PEG_RXN2 2
PEG_RXP3 2
PEG_RXN3 2
PEG_RXP4 2
PEG_RXN4 2
PEG_RXP5 2
PEG_RXN5 2
PEG_RXP6 2
PEG_RXN6 2
PEG_RXP7 2
PEG_RXN7 2
+3V2,4,6,8,9,10,11,12,22,23,24,25,26,27,29,30,31,32,33,41,42,43
+1.0V_VGA15,17,18,43
352-(&75;
352-(&75;
352-(&75;
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
SUN_PCIE_Interface
SUN_PCIE_Interface
1%
1%
2
1%
SUN_PCIE_Interface
Date: Sheet
Date: Sheet
Date: Sheet
+3V
+1.0V_VGADGPU_HIN_RST#
1A
1A
13 43Tuesday, March 12, 2013
13 43Tuesday, March 12, 2013
1
13 43Tuesday, March 12, 2013
1A
of
of
of
Loading...