Quanta R62 Chief River, Pavilion 15 Schematic
5
Ivy Bridge Processor (GND)
U22H
AT35
VSS1
AT32
SS2
V
AT29
V
SS3
AT27
VSS4
AT25
SS5
V
AT22
V
SS6
AT19
D D
C C
B B
Processor Strapping
VSS7
AT16
SS8
V
AT13
V
SS9
AT10
VSS10
AT7
SS11
V
AT4
V
SS12
AT3
VSS13
AR25
VSS14
AR22
VSS15
AR19
VSS16
AR16
VSS17
AR13
VSS18
AR10
VSS19
AR7
VSS20
AR4
VSS21
AR2
VSS22
AP34
VSS23
AP31
VSS24
AP28
VSS25
AP25
VSS26
AP22
VSS27
AP19
VSS28
AP16
VSS29
AP13
VSS30
AP10
VSS31
AP7
VSS32
AP4
VSS33
AP1
VSS34
AN30
VSS35
AN27
VSS36
AN25
VSS37
AN22
VSS38
AN19
VSS39
AN16
VSS40
AN13
VSS41
AN10
VSS42
AN7
VSS43
AN4
VSS44
AM29
VSS45
AM25
VSS46
AM22
VSS47
AM19
VSS48
AM16
VSS49
AM13
VSS50
AM10
VSS51
AM7
VSS52
AM4
VSS53
AM3
VSS54
AM2
VSS55
AM1
VSS56
AL34
VSS57
AL31
VSS58
AL28
VSS59
AL25
VSS60
AL22
VSS61
AL19
VSS62
AL16
VSS63
AL13
VSS64
AL10
VSS65
AL7
VSS66
AL4
VSS67
AL2
VSS68
AK33
VSS69
AK30
VSS70
AK27
VSS71
AK25
VSS72
AK22
VSS73
AK19
VSS74
AK16
VSS75
AK13
VSS76
AK10
VSS77
AK7
VSS78
AK4
VSS79
AJ25
VSS80
Ivy Bridge_rPGA_2DPC_Rev0p61
VSS
The CFG signals have a default value of '1' if not terminated on the board.
1 0
CFG2
A A
(PEG Static Lane Reversal)
CFG4
(DP Presence Strap)
CFG7
(PEG Defer Training)
Normal Operation Lane Reversed
Disable; No physical DP attached to eDP
PEG train immediately following
xxRESETB de assertion
5
VSS81
SS82
V
V
SS83
VSS84
SS85
V
V
SS86
VSS87
SS88
V
V
SS89
VSS90
SS91
V
V
SS92
VSS93
VSS94
VSS95
VSS96
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2
Enable; An ext DP device is connected to eDP
PEG wait for BIOS training
4
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
P9
P8
P6
P5
P3
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
M34
L33
L30
L27
L9
L8
L6
L5
L4
L3
L2
L1
K35
K32
K29
K26
J34
J31
H33
H30
H27
H24
H21
H18
H15
H13
H10
H9
H8
H7
H6
H5
H4
H3
H2
H1
G35
G32
G29
G26
G23
G20
G17
G11
F34
F31
F29
4
U22I
V
SS161
VSS162
SS163
V
V
SS164
VSS165
SS166
V
V
SS167
VSS168
SS169
V
V
SS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
Ivy Bridge_rPGA_2DPC_Rev0p61
VSS
CFG2
CFG4
CFG7
CFG5
CFG6
V
SS234
VSS235
SS236
V
V
SS237
VSS238
SS239
V
V
SS240
VSS241
SS242
V
V
SS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
3
F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3
R184 *1K_4
R760 1K_4
R761 *1K_4
R183 1K_4
R179 1K_4
3
+3VPCU
or CPU debug.
F
P119
T
T
P117
P121
T
TP122
TP123
TP124
TP125
IO Thrm Protect
For 65 degree, 1.8v limit, (SW)
PR100
16.5K/F_4
C143
0.1U/10V_4
PR96
3.3K/F_4
PR95
100K_4 NTC
1 2
For 75 degree, 1.2v limit, (HW)
C62
0.1U/10V_4
1 2
2
I
vy Bridge Processor (RESERVED, CFG)
U22E
SVD28
R
R
SVD29
RSVD30
SVD31
R
RSVD32
RSVD33
RSVD34
RSVD35
RSVD37
RSVD38
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
BCLK_ITP
BCLK_ITP#
RSVD56
RSVD57
RSVD58
KEY
AH27
AH26
L7
AG7
AE7
AK2
W8
AT26
AM33
AJ27
T8
J16
H16
G16
AR35
AT34
AT33
AP35
AR34
B34
A33
A34
B35
C35
AJ32
AK32
AN35
AM35
AT2
AT1
AR1
B1
THRM_MOINTOR 30
C
C
C
C
C
CFG7CFG7
V
RESERVED
CC_DIE_SENSE
VSS_DIE_SENSE
AK28
FG0
FG2
FG4
FG5
FG6
CFG[0]
AK29
FG[1]
C
AL26
C
FG[2]
AL27
CFG[3]
AK26
FG[4]
C
AL29
C
FG[5]
AL30
CFG[6]
AM31
FG[7]
C
AM32
C
FG[8]
AM30
CFG[9]
AM28
CFG[10]
AM26
CFG[11]
AN28
CFG[12]
AN31
CFG[13]
AN26
CFG[14]
AM27
CFG[15]
AK31
CFG[16]
AN29
CFG[17]
AJ31
VAXG_VAL_SENSE
AH31
VSSAXG_VAL_SENSE
AJ33
VCC_VAL_SENSE
AH33
VSS_VAL_SENSE
AJ26
RSVD5
F25
RSVD8
F24
RSVD9
F23
RSVD10
D24
RSVD11
G25
RSVD12
G24
RSVD13
E23
RSVD14
D23
RSVD15
C30
RSVD16
A31
RSVD17
B30
RSVD18
B29
RSVD19
D30
RSVD20
B31
RSVD21
A30
RSVD22
C29
RSVD23
J20
RSVD24
B18
RSVD25
J15
RSVD27
Ivy Bridge_rPGA_2DPC_Rev0p61
CFG
For rPGA socket, RSVD59 pin should be left NC.
THRM_MOINTOR1 30
CFG[6:5] (PCIE Port Bifurcation Straps)
11: (Default) x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
1
V
CC_DIE_SENSE
V
SS_DIE_SENSE
TP78
TP76
PROJECT : R62
PROJECT : R62
PROJECT : R62
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
SNB 4/4 (GND)
SNB 4/4 (GND)
SNB 4/4 (GND)
P118
T
T
P120
758
R
RN
*0_4
For Sandy Bridge RN stuff
For Ivy Bridge RN no stuff
5 43Monday, October 22, 2012
5 43Monday, October 22, 2012
1
5 43Monday, October 22, 2012
05
1A
1A
1A
5
4
3
2
1
C
ougar Point/Panther Point (DMI,FDI,PM)
U
32C
EC_PWROK
EC_PWROK
BC24
DMI0RXN
BE20
MI1RXN
D
BG18
D
MI2RXN
BG20
DMI3RXN
BE24
D
MI0RXP
BC20
DMI1RXP
BJ18
MI2RXP
D
BJ20
D
MI3RXP
AW24
MI0TXN
D
AW20
D
MI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
(+3VS5)
K16
SUSWARN#/SUSPWRDNACK/GPIO30
E20
PWRBTN#
(DSW)
H20
ACPRESENT / GPIO31
(+3VS5)
E10
BATLOW# / GPIO72
A10
RI#
CPT_PPT_Rev_0p5
DMI
FDI
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVRMEN
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
System Power Management
SLP_LAN# / GPIO29
MI_RXN02
D
D
MI_RXN12
MI_RXN22
D
MI_RXN32
D
DMI_RXP02
MI_RXP12
+1.05V
SUSWARN#
SYS_PWROK
D
D
MI_RXP22
DMI_RXP32
D
MI_TXN02
DMI_TXN12
DMI_TXN22
DMI_TXN32
DMI_TXP02
DMI_TXP12
DMI_TXP22
DMI_TXP32
R567 49.9/F_4
R557 750/F_4
R900 *0_4
R764 0_4
R779 0_4
R485 0_4
R612 *0_4
R766 0_4
R768 0_4
R566 0_4
C488
*0.1U/10V_4
DMI_COMP
DMI_RBIAS
for DS3
SUSACK#
XDP_DBRST#1
SYS_PWROK_R
PM_DRAM_PWRGD
RSMRST#
SUSWARN#
DNBSWON#_R
AC_PRESENT_R
PM_BATLOW#
PM_RI#
D D
SUSACK#EC30
C C
2 PCIE_WAKE# 29,30,33
XDP_DBRST#
EC_PWROK30
6,40
IMVP_PWRGD
PM_DRAM_PWRGD2
RSMRST#30
for DS3
SUSWARN#EC30
DNBSWON#30
for DS3
AC_PRESENT30
B B
SYS_PWROK_R
FDI_RXN0
DI_RXN1
F
F
DI_RXN2
FDI_RXN3
DI_RXN4
F
F
DI_RXN5
FDI_RXN6
DI_RXN7
F
FDI_RXP0
DI_RXP1
F
F
DI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
FDI_INT
DPWROK
WAKE#
(+3V)
(+3VS5)
(+3VS5)
(+3VS5)
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
PMSYNCH
(+3VS5)
BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9
BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9
AW16
AV12
BC10
AV14
BB10
A18
E22
B9
N3
G8
N14
D10
H4
F4
G10
G16
AP14
K14
DSWVREN
DPWROKSUSACK#
PCIE_WAKE#
CLKRUN#
PCH_SUSCLK_L
R253 0_4
R767 0_4
TP56
R628 0_4
SLP_LAN#
F
FDI_TXN1
F
F
FDI_TXN4
F
F
FDI_TXN7
F
FDI_TXP1
F
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
R627 0_4
R562 *0_4
CLKRUN# 30
TP57
R304 0_4
TP71
SUSC# 30
SUSB# 30
SLP_SUS#EC 30
PM_SYNC
DI_TXN0
DI_TXN2
DI_TXN3
DI_TXN5
DI_TXN6
DI_TXP0
DI_TXP2
for DS3
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
for DS3
DPWROK_EC 30
RSMRST#
PCH to Res routeing 37.5 ohm Impedance.
Res to connector filter routeing 50ohm Impedance.
PCH_SUSCLK
TP126
Reserve from EMI request
CRT_B
2
C531
*5.6P/16V_4
30
DDCCLK23
DDCDATA23
HSYNC_COM23
VSYNC_COM23
CRT_G
C533
*5.6P/16V_4
+3V
CRT_B23
CRT_G23
CRT_R23
Reserve for power on sequence
PCH Pull-high/low(CLG)
PM_RI#
PM_BATLOW#
PCIE_WAKE#
SLP_LAN#
SUSACK#
SUSWARN#
PM_BATLOW#
AC_PRESENT_R
A A
CLKRUN#
XDP_DBRST#
RSMRST#
SYS_PWROK
R496 10K_4
R494 8.2K_4
R528 1K_4
R903 *10K_4
R548 *10K_4
R497 *10K_4
R909 *10K_4
R561 *10K_4
R604 *100K_4
R535 8.2K_4
R771 1K_4
R530 *1K_4
R565 10K_4
R486 *10K_4
5
+3V_DEEP_SUS
SI reserve
+3V
+3VS5
for DS3
INT HDMI disable (DIS only remove)
DPB_LANE0_N
DPB_LANE0_P
DPB_LANE1_N
DPB_LANE1_P
DPB_LANE2_N
DPB_LANE2_P
DPB_LANE3_N
DPB_LANE3_P
INT HDMI Detect Function
DPB_HPD_Q
R600 *0_4/S
4
IN_D2#
IN_D2
IN_D1#
IN_D1
IN_D0#
IN_D0
IN_CLK#
IN_CLK
HDMI_HPD_CON
25
System PWR_OK(CLG)
25
25
25
25
25
25
25
25
3
R483 0_4
C
ougar Point/Panther Point (LVDS,DDI)
VDS_BLON24
L
ISP_ON24
D
PST_PWM24
D
E
DIDCLK_2136 24
EDIDDATA_2136 24
R
762 2.2K_4
330 2.2K_4
R
R
763 2.37K/F_4
TP65
TXLCLKOUT-24
TXLCLKOUT+24
TXLOUT0-_213624
TXLOUT1-_213624
TXLOUT2-24
TXLOUT0+_213624
TXLOUT1+_213624
TXLOUT2+24
TXUCLKOUT-24
TXUCLKOUT+24
TXUOUT0-24
TXUOUT1-24
TXUOUT2-24
TXUOUT0+24
TXUOUT1+24
TXUOUT2+24
PD Res place close to PCH
R340 150/F_4
R342 150/F_4
R341 150/F_4
R354 33_4
R352 33_4
R769 1K/F_4
CRT_R
C532
*5.6P/16V_4
EC_PWROK
R482
100K_4
IMVP_PWRGDSYS_PWROK
_CTRL_CLK
L
_CTRL_DATA
L
LVDS_IBG
VDS_VBG
L
PCH_HSYNC_R
PCH_VSYNC_R
DAC_IREF
IMVP_PWRGD
2
U
J47
M45
P45
T40
K47
T45
P39
AF37
AF36
AE48
AE47
AK39
AK40
AN48
AM47
AK47
AJ48
AN47
AM49
AK49
AJ47
AF40
AF39
AH45
AH47
AF49
AF45
AH43
AH49
AF47
AF43
N48
P49
T49
T39
M40
M47
M49
T43
T42
CPT_PPT_Rev_0p5
6,40
32D
L
_BKLTEN
L_VDD_EN
L
_BKLTCTL
_DDC_CLK
L
L
_DDC_DATA
_CTRL_CLK
L
L
_CTRL_DATA
VD_IBG
L
L
VD_VBG
LVD_VREFH
LVD_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
CRT_BLUE
CRT_GREEN
CRT_RED
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_VSYNC
DAC_IREF
CRT_IRTN
+3V_DEEP_SUS
+3V_RTC
+1.05V
+3VPCU
+3VS5
+3V
+5V
S
DVO_INTN
SDVO_INTP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
R770 330K_4
AP43
AP45
AM42
AM40
AP39
AP40
P38
M39
AT49
AT47
AT40
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
P46
P42
AP47
AP49
AT38
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
M43
M36
AT45
AT43
BH41
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
DPB_HPD_Q
DPB_LANE0_N
DPB_LANE0_P
DPB_LANE1_N
DPB_LANE1_P
DPB_LANE2_N
DPB_LANE2_P
DPB_LANE3_N
DPB_LANE3_P
DSWVREN
S
DVO_TVCLKINN
SDVO_TVCLKINP
S
DVO_STALLN
SDVO_STALLP
DVO_CTRLCLK
S
S
DVO_CTRLDATA
DDPB_AUXN
DDPB_AUXP
LVDS
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
Digital Display Interface
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
CRT
DDPD_AUXP
7,8,9,10,39
7,10,25
2,4,7,8,9,10,25,30,36,40
5,7,25,30,31,33,34,35
7,9,10,33,35,36,39,43
2,7,8,9,10,12,13,14,23,24,25,26,27,29,30,31,32,33,36,39,40,42
7,10,23,25,27,31,32,33,39
+3V_RTC
On Die DSW VR Enable
High = Enable (Default)
Low = Disable
PROJECT : R62
PROJECT : R62
PROJECT : R62
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
PCH 1/6 (DMI/FDI/VIDEO)
PCH 1/6 (DMI/FDI/VIDEO)
PCH 1/6 (DMI/FDI/VIDEO)
S
DVO_CLK 25
SDVO_DATA 25
1
06
INT. HDMI
6 43Monday, October 22, 2012
6 43Monday, October 22, 2012
6 43Monday, October 22, 2012
1A
1A
1A
5
ougar Point/Panther Point (HDA,JTAG,SATA)
P97
T
TP98
C
LKGEN_RTC_X125
3V_RTC
D D
C C
B B
+
eserve for EMI
R
C529
*10P/50V_4
27
for DS3
+3V_DEEP_SUS
SIO_EXT_SCI#30
PCH Strap Table
SPKR
R741 0_4
P128
T
311 1M_4
R
P96
T
ACZ_SPKR
ACZ_SDIN027
TP64
R773 10K_4
SIO_EXT_SCI#
TP129
TP130
TP131
TP88
Pin Name Strap description Sampled Configuration
Different from
Calpella
GNT3# / GPIO55 Top-Block Swap Override
C
TC_X1
R
R
TC_X2
R
TC_RST#
RTC_RST#
S
S
M_INTRUDER#
CH_INVRMEN
P
ACZ_BCLK
ACZ_SYNC
ACZ_SPKR
ACZ_RST#
ACZ_SDOUT
GPIO33
PCH_JTAG_TCK_R
PCH_JTAG_TMS
PCH_JTAG_TDI_R
PCH_JTAG_TDO_R
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_CS1#
PCH_SPI_SI
PCH_SPI_SO
32A
U
A20
TCX1
R
C20
RTCX2
D20
R
TCRST#
G22
RTCRST#
S
K22
INTRUDER#
C17
I
NTVRMEN
N34
HDA_BCLK
L34
HDA_SYNC
T10
SPKR
K34
HDA_RST#
E34
HDA_SDIN0
G34
HDA_SDIN1
C34
HDA_SDIN2
A34
HDA_SDIN3
A36
HDA_SDO
(+3V)
C36
HDA_DOCK_EN# / GPIO33
(+3VS5)
N32
HDA_DOCK_RST# / GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK
Y14
SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
CPT_PPT_Rev_0p5
No reboot mode setting PWROK
PWROK
JTAG
INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up
HDA_DOCK_EN#/GPIO33
GNT1# / GPIO51
GPIO19
Different from
Calpella
GNT2# / GPIO53
NV_ALE
NV_CLE
A A
HDA_SYNC On-Die PLL VR Voltage Select RSMRST
Flash Descriptor Security
Only for Interposer
Boot BIOS Selection 1 [bit-1]
Boot BIOS Selection 0 [bit-0]
ESI strap (Server only)
Intel Anti-Theft HDD protection
Only for Interposer
DMI Termination voltage weak pull-down 20kohm
PWROK
PWROK
PWROK
PWROK
PWROK 0 = Disable (Internal pull-down 20kohm)
PWROK
HDA_SDO PWROKFlash Descriptor Security
GPIO8
GPIO28
Different from
Calpella
Integrated Clock Chip Enable Should be pull-down (weak pull-up 20K)RSMRST#
On-die PLL Voltage Regulator RSMRST#
SPI_MOSI iTPM function Disable APWROK
5
4
WH0 / LAD0
F
F
WH1 / LAD1
FWH2 / LAD2
WH3 / LAD3
F
LPC
FWH4 / LFRAME#
L
DRQ0#
LDRQ1# / GPIO23
RTCIHDA
SPI
(+3V)
S
ERIRQ
S
ATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA 6G
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3RCOMPO
SATA3COMPI
SATA3RBIAS
SATALED#
(+3V)
SATA0GP / GPIO21
(+3V)
SATA1GP / GPIO19
0 = Default (weak pull-down 20K)
1 = Setting to No-Reboot mode
0 = "top-block swap" mode
1 = Default (weak pull-up 20K)
0 = Override
1 = Default (weak pull-up 20K)
GNT0#GNT1#
11
00
Should not be pull-down
(weak pull-up 20K)
0 = Support by 1.8V (weak pull-down)
1 = Support by 1.5V
0 = Default (weak pull-down 20K)
1 = Overridden
0 = Disable
1 = Enable (Default)
0 = Default (weak pull-down 20K)
1 = Enable
4
C38
A38
B37
C37
D36
E36
CH_DRQ#0
P
K36
P
CH_DRQ#1
V5
ERIRQ
S
AM3
AM1
AP7
AP5
AM10
AM8
AP11
AP10
AD7
AD5
AH5
AH4
DG recommended that AC coupling capacitors should be
AB8
close to the connector (<100 mils) for optimal signal quality.
AB10
AF3
AF1
Y7
Y5
AD3
AD1
Y3
Y1
AB3
AB1
Y11
Y10
SATA_COMP
AB12
AB13
SATA3_COMP
AH1
SATA3_RBIAS
P3
V14
DGT_STOP#
P1
BBS_BIT0
DGT_STOP#
Boot Location
SPI
LPC
L
AD0 30,33
AD1 30,33
L
AD2 30,33
L
L
AD3 30,33
FRAME# 30,33
L
TP67
P66
T
772 8.2K_4
R
R299 37.4/F_4
R301 49.9/F_4
R521 750/F_4
R517 10K_4
R776 *0_4
R505 *10K_4
R519 10K_4
R595 10K_4
+3V
PCH_INVRMEN
GPIO33
[Need external pull-down for LPC BIOS]
Default weak pull-up on GNT0/1#
USE GPIO PIN
+1.8V
R526 2.2K_4
+1.8V
+V3.3A_1.5A_HDA_IO
GPIO33_E
+3V
S
S
SATA_RXP0
SATA_TXN0
SATA_TXP0
SATA_RXN4
SATA_RXP4
SATA_TXN4
SATA_TXP4
+1.05V
SATA_LED# 31
+3V
DGPU_HOLD_RST#9,14
+3V
+3V
Circuit
R563 330K_4
R572 0_4
1 2
R782 *1K_4
R585 *1K_4
R783 *1K_4
ACZ_SDOUT
3
ERIRQ 30
ATA_RXN0
PCI_GNT3#
R546 1K_4
R784 1K_4
3
+
1.8V
+1.05V
3V_RTC
+
+
3VPCU
+3V
V3.3A_1.5A_HDA_IO
+
+
+3V_DEEP_SUS
32
32
32
HDD0 (SATA3 6.0Gb/s)
32
32
32
32
ODD (SATA1 1.5Gb/s)
32
4,10,37,43
2,4,6,8,9,10,25,30,36,40
6,10,25
5,25,30,31,33,34,35
2,6,8,9,10,12,13,14,23,24,25,26,27,29,30,31,32,33,36,39,40,42
10
5V 10,23,25,27,31,32,33,39
6,8,9,10,39
BIT_CLK_AUDIO
EMI
8
+3V_RTC
BIOS_WP#
BBS_BIT0
BBS_BIT1 8
ACZ_SYNC
8
NV_CLE
H_SNB_IVB#
+V3.3A_1.5A_HDA_IO
NV_ALE
R573 *1K_4
30
C528
*33P/50V_4
9
2
sandy/Ivy bridge
2
RTC Circuitry(RTC)
+3V_RTC_0
+3VPCU
+3V_RTC_0 +3V_RTC_1
R622 *1K_4
12
CN20
BAT_CONN
DFHD02MS119
85204-0200-2p-l
RTC Power trace width 20mils.
HDA Bus(CLG)
BIT_CLK_AUDIO27
ACZ_RST#_AUDIO27
ACZ_SDOUT_AUDIO27
R590 10K_4
+5V
ACZ_SYNC_AUDIO27
R594 33_4
PCH SPI ROM(CLG)
PCH_SPI_CS1#
PCH_SPI_CS0#
If EC support embedded
flash , SPI power
must be used S5_0N
power rail for EC
load code.
2
R617 *0_4
R613 0_4
+SPI_PWR
R
TC Clock 32.768KHz
SI DEL reserve parts
C
802 *18P/50V_4
803 *18P/50V_4
C
30mils
+3V_RTC
D20
*BAT54C
SI Change connector type
2
TP133
R551 3.3K_4
Vender
EON
ACZ_BCLK
ACZ_RST#
ACZ_SDOUT
3
Q44
2N7002K
TP132
TP112
C797
*22P/50V_4
ACZ_SYNC
TP127
R610 0_4
BIOS_WP#
TP111
Size
4MB
R337 33_4
R774 33_4
R575 33_4
1
R579
1M_4
PCH_SPI_CS0#R
PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_SO
C793
*22P/50V_4
4MB
4MB AKE39F-0800 (A25LQ32AM-F/Q)AMIC
Socket
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
07
TC_X1_R
R
23
8
Y
*32.768KHZ
4 1
TC_X2_R
R
R616 20K/F_4
R615 20K/F_4
C869
1U/6.3V_4
PCH JTAG Debug(CLG)
+3VS5
R285
*210/F_4
R777
*100/F_4
U31
1
6
5
2
3
EN25Q32B-104HIP
P/N
AKE39ZN0Q02 (EN25Q32B-104HIP)
AKE39ZN0500 (PM25LQ032C-BCE)PMC
DFHS08FS023
PROJECT : R62
PROJECT : R62
PROJECT : R62
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PCH 2/6 (SATA/HDA/SPI)
PCH 2/6 (SATA/HDA/SPI)
PCH 2/6 (SATA/HDA/SPI)
CE#
SCK
SI
SO
WP#
C865
1U/6.3V_4
C860
1U/6.3V_4
R775
*210/F_4
R279
*100/F_4
HOLD#
1
R
564
R
*10M_4
R
RTC_RST#
SRTC_RST#
R493
*210/F_4
PCH_JTAG_TMS
PCH_JTAG_TDI_R
PCH_JTAG_TDO_R
R537
*100/F_4
+SPI_PWR
VDD
VSS
743 *0_4
791 *0_4
PCH_JTAG_TCK_R
R510
*51_4
R554 *0_4
R609 0_4
8
7
R605 3.3K_4
4
7 43Monday, October 22, 2012
7 43Monday, October 22, 2012
7 43Monday, October 22, 2012
TC_X1
R
TC_X2
R
C795
0.1U/10V_4
+3VS5
+3V
1A
1A
1A
5
ougar Point/Panther Point (PCI,USB,NVRAM)
C
P
CI/USBOC# Pull-up(CLG)
+
1
ACC_LED#
2
D
GPU_SELECT#
3
CCEL_INTH#
A
B
T_COMBO_EN#
56
1
USB_OC6#
2
USB_OC0#
3
PCH_AOCS#
USB_OC5#USB_OC2#
56
R351 22_4
R350 22_4
R353 22_4
CLK_PCI_FB_R
CLK_PCI_LPC_R
CLK_PCI_EC_R
3V
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
BT_COMBO_EN#
DGPU_SELECT#
EDID_SELECT#
BBS_BIT1
ACC_LED#
PCI_GNT3#
MPC_PWR_CTRL#
ACCEL_INTH#
33
EXTTS#1
PCI_PME#
PCI_PLTRST#
CLK_PCI_TPM_R
CLK_PCI_CARD_R
P
CI_PIRQA#
CI_PIRQB#
P
P
CI_PIRQC#
CI_PIRQD#
P
D D
M
PC_PWR_CTRL#
E
DID_SELECT#
for DS3
USB_OC4#
USB_OC1#
USB_OC3#
USB3.0
C C
B B
349 8.2K_4
R
R786 8.2K_4
R
787 8.2K_4
348 8.2K_4
R
3V
+
P9
R
0
1
9
8
7 4
10K_10P8R_6
+3V_DEEP_SUS
RP8
10
9
8
7 4
10K_10P8R_6
28
USB30_RX1-
28
USB30_RX2-
28
USB30_RX1+
28
USB30_RX2+
28
USB30_TX1-
28
USB30_TX2-
28
USB30_TX1+
28
USB30_TX2+
BT_COMBO_EN#33
BBS_BIT17
ACC_LED# 31
PCI_GNT3#7
ACCEL_INTH#
PM_EXTTS#012,13
EXTTS#1 13
SI change
CLK_33M_DEBUG33
CLK_33M_KBC30
CLK_PCI_FB
TP55
TP102
TP69
PLTRST#(CLG)
PCI_PLTRST#
A A
R792 *0_4/S
+1.05V
+3V
PLTRST#
R251
100K_4
2,4,6,7,9,10,25,30,36,40
2,6,7,9,10,12,13,14,23,24,25,26,27,29,30,31,32,33,36,39,40,42
PLTRST# 2,14,26,29,30,33
5
32E
U
BG26
P1
T
BJ26
TP2
BH25
T
P3
BJ16
P4
T
BG16
T
P5
AH38
P6
T
AH37
T
P7
AK43
P8
T
AK45
TP9
C18
P10
T
N30
TP11
H3
T
P12
AH12
TP13
AM4
TP14
AM5
TP15
Y13
TP16
K24
TP17
L24
TP18
AB46
TP19
AB45
TP20
AY16
BG46
BE28
BC30
BE32
BJ32
BC28
BE30
BF32
BG32
AV26
BB26
AU28
AY30
AU26
AY26
AV28
AW30
B21
M20
K40
K38
H38
G38
C46
C44
E40
D47
E42
F46
G42
G40
C42
D44
K10
C6
H49
H43
J48
K42
H40
TP21
TP22
TP23
TP24
TP25
TP26
TP27
TP28
TP29
TP30
TP31
TP32
TP33
TP34
TP35
TP36
TP37
TP38
TP39
TP40
PIRQA#
PIRQB#
PIRQC#
PIRQD#
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54
GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55
PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5
PME#
PLTRST#
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4
CPT_PPT_Rev_0p5
USB30_RX1N
USB30_RX2N
USB30_RX3N
USB30_RX4N
USB30_RX1P
USB30_RX2P
USB30_RX3P
USB30_RX4P
USB30_TX1N
USB30_TX2N
USB30_TX3N
USB30_TX4N
USB30_TX1P
USB30_TX2P
USB30_TX3P
USB30_TX4P
RSVD
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
PCI
SMBus/Pull-up(CLG)
Q21
MBCLK2 13,30
MBDATA2 13,30
+3V
SMB_PCH_DAT
SMB_PCH_CLK
4 3
1
*2N7002DW
5
2
6
2N7002DW
USB
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
Q23
4
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
5
R365 2.2K_4
SMB_ME1_CLK
+3V_DEEP_SUS
2
6
SMB_ME1_DAT
R367 2.2K_4
43
R364 4.7K_4
R363 4.7K_4
1
4
AY7
SVD1
R
AV7
R
SVD2
AU3
SVD3
R
BG4
RSVD4
AT10
SVD5
R
BC8
R
SVD6
AU2
R
SVD7
AT4
SVD8
R
AT3
RSVD9
AT1
SVD10
R
AY3
RSVD11
AT5
R
SVD12
AV3
RSVD13
AV1
RSVD14
BB1
RSVD15
BA3
RSVD16
BB5
RSVD17
BB3
RSVD18
BB7
RSVD19
BE8
RSVD20
BD4
RSVD21
BF6
RSVD22
AV5
RSVD23
AV10
RSVD24
AT8
RSVD25
AY5
RSVD26
BA2
RSVD27
AT12
RSVD28
BF3
RSVD29
C24
USBP0N
A24
USBP0P
C25
USBP1N
B25
USBP1P
C26
USBP2N
A26
USBP2P
K28
USBP3N
H28
USBP3P
E28
USBP4N
D28
USBP4P
C28
USBP5N
A28
USBP5P
C29
USBP6N
B29
USBP6P
N28
USBP7N
M28
USBP7P
L30
USBP8N
K30
USBP8P
G30
USBP9N
E30
USBP9P
C30
USBP10N
A30
USBP10P
L32
USBP11N
K32
USBP11P
G32
USBP12N
E32
USBP12P
C32
USBP13N
A32
USBP13P
C33
USBRBIAS#
B33
USBRBIAS
A14
K20
B17
C16
L16
A16
D14
C14
+3V
SMB_RUN_DAT 12,13
SMB_RUN_CLK 12,13
WLAN
AN
L
C
ardreader
NV_ALE
USB_BIAS
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
PCH_AOCS#
USBP0ÂUSBP0+
USBP1ÂUSBP1+
USBP4ÂUSBP4+
USBP9ÂUSBP9+
USBP10ÂUSBP10+
NV_ALE
R571
22.6/F_4
PCH_AOCS#
CLK_REQ/Strap Pin(CLG)
CLK_PCIE_REQ1#
CLK_PCIE_REQ2#
CLK_PCIE_REQ0#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
CLK_PEGB_REQ#
for DS3
CLK_PEGA_REQ#
CLK_BUF_BCLK_N
CLK_BUF_BCLK_P
CLK_BUF_PCIE_3GPLL#
CLK_BUF_PCIE_3GPLL
+3V
CLK_BUF_DREFCLK#
CLK_BUF_DREFCLK
CLK_BUF_DREFSSCLK#
CLK_BUF_DREFSSCLK
CLK_PCH_14M
CLOCK TERMINATION for FCIM
CIE_RXN133
P
PCIE_RXP133
CIE_TXN133
P
PCIE_TXP133
CIE_RXN2_LAN29
P
P
CIE_RXP2_LAN29
CIE_TXN2_LAN29
P
P
CIE_TXP2_LAN29
PCIE_RXN3_CARD26
P
CIE_RXP3_CARD26
PCIE_TXN3_CARD26
P
CIE_TXP3_CARD26
MPC Switch Control
MPC_PWR_CTRL#
7
MPC_PWR_CTRL#
28
USB2.0/USB3.0 COMBO 1st
USB2.0
28
28
USB2.0/USB3.0 COMBO 2nd
USB2.0
28
24
Webcam
24
29
Right_USB
29
33
WLAN
33
33
EMI
R788 10K_4
R293 10K_4
R542 10K_4
R789 10K_4
R790 10K_4
R269 10K_4
R273 *10K_4
Ra
R256 10K_4
Rb
SG : Rb ; UMA : Ra
R793 10K_4
R794 10K_4
R796 10K_4
R306 10K_4
R798 10K_4
R316 10K_4
R799 10K_4
R800 10K_4
R801 10K_4
3
519 0.1U/10V_4
C
C513 0.1U/10V_4
517 0.1U/10V_4
C
C
516 0.1U/10V_4
C524 0.1U/10V_4
C
523 0.1U/10V_4
CLK_PCIE_CARDN26
CLK_PCIE_CARDP26
CLK_PCIE_REQ2#26
CLK_33M_DEBUG
CLK_33M_DEBUG
CLK_33M_KBC
C910
*22P/50V_4
+3V
+3V_DEEP_SUS
3
P
CIE_TXN1_C
CIE_TXP1_C
P
CIE_TXN2_LAN_C
P
PCIE_TXP2_LAN_C
CIE_TXN3_CARD_C
P
P
CIE_TXP3_CARD_C
Low = MPC ON
High = MPC OFF (Default)
R582 *1K_4
CLK_PCH_SRC0N
CLK_PCH_SRC0P
CLK_PCIE_REQ0#
CLK_PCH_SRC2N
CLK_PCH_SRC2P
CLK_PCIE_REQ1#
CLK_PCH_CARD2N
CLK_PCH_CARD2P
CLK_PCIE_REQ2#
CLK_PCIE_REQ3#
BOARD_ID09
BOARD_ID19
BOARD_ID29
for DS3
CLK_PCIE_REQ4#
CLK_PEGB_REQ#
TP59
TP58
CLK_PCH_ITPN
CLK_PCH_ITPP
C534
*22P/50V_4
TP137
WLAN
LAN
GPU
2
ougar Point/Panther Point(PCI-E,SMBUS,CLK)
C
PCIE Clock
CLK_PCIE_WLAN#33
CLK_PCIE_WLAN33
PCIE_CLKREQ_WLAN#33
CLK_PCIE_LANP29
CLK_PCIE_LANN29
PCIE_CLKREQ_LAN#29
CLK_PCIE_VGA# 14
CLK_PCIE_VGA 14
U
32B
BG34
P
ERN1
BJ34
ERP1
P
AV32
PETN1
AU32
P
ETP1
BE34
P
ERN2
BF34
ERP2
P
BB32
P
ETN2
AY32
ETP2
P
BG36
ERN3
P
BJ36
PERP3
AV34
P
ETN3
AU34
PETP3
BF36
PERN4
BE36
PERP4
AY34
PETN4
BB34
PETP4
BG37
PERN5
BH37
PERP5
AY36
PETN5
BB36
PETP5
BJ38
PERN6
BG38
PERP6
AU36
PETN6
AV36
PETP6
BG40
PERN7
BJ40
PERP7
AY40
PETN7
BB40
PETP7
BE38
PERN8
BC38
PERP8
AW38
PETN8
AY38
PETP8
Y40
CLKOUT_PCIE0N
Y39
CLKOUT_PCIE0P
J2
PCIECLKRQ0# / GPIO73
(+3VS5)
AB49
CLKOUT_PCIE1N
AB47
CLKOUT_PCIE1P
M1
PCIECLKRQ1# / GPIO18
(+3V)
AA48
CLKOUT_PCIE2N
AA47
CLKOUT_PCIE2P
V10
PCIECLKRQ2# / GPIO20
(+3V)
Y37
CLKOUT_PCIE3N
Y36
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
(+3VS5)
Y43
CLKOUT_PCIE4N
Y45
CLKOUT_PCIE4P
L12
PCIECLKRQ4# / GPIO26
(+3VS5)
V45
CLKOUT_PCIE5N
V46
CLKOUT_PCIE5P
L14
PCIECLKRQ5# / GPIO44
(+3VS5)
AB42
CLKOUT_PEG_B_N
AB40
CLKOUT_PEG_B_P
E6
PEG_B_CLKRQ# / GPIO56
(+3VS5)
V40
CLKOUT_PCIE6N
V42
CLKOUT_PCIE6P
T13
PCIECLKRQ6# / GPIO45
(+3VS5)
V38
CLKOUT_PCIE7N
V37
CLKOUT_PCIE7P
K12
PCIECLKRQ7# / GPIO46
(+3VS5)
AK14
CLKOUT_ITPXDP_N
AK13
CLKOUT_ITPXDP_P
CPT_PPT_Rev_0p5
PCI-E*
R509 *0_4/S
R797 *0_4/S
4
0_4P2R_4
2
RP7
Remove for UMA only.
SMBUSController
SML1ALERT# / PCHHOT# / GPIO74
Link
CLOCKS
FLEX CLOCKS
CLK_PCH_SRC0N
CLK_PCH_SRC0P
CLK_PCIE_REQ0#
CLK_PCH_SRC2P
CLK_PCH_SRC2N
CLK_PCIE_REQ1#
3
CLK_PCH_PEGAN
1
CLK_PCH_PEGAP
2
(+3VS5)
MBALERT# / GPIO11
S
S
MBCLK
S
MBDATA
(+3VS5)
SML0ALERT# / GPIO60
SML0CLK
SML0DATA
(+3VS5)
(+3VS5)
SML1CLK / GPIO58
(+3VS5)
SML1DATA / GPIO75
CL_CLK1
CL_DATA1
CL_RST1#
(+3VS5)
PEG_A_CLKRQ# / GPIO47
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_DP_N
CLKOUT_DP_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N
CLKIN_SATA_P
REFCLK14IN
CLKIN_PCILOOPBACK
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67
(+3V)
(+3V)
(+3V)
(+3V)
for DS3
E12
SMBALERT#
H14
MB_PCH_CLK
S
C9
MB_PCH_DAT
S
A12
D
RAMRST_CNTRL_PCH
C8
S
MB_ME0_CLK
G12
S
MB_ME0_DAT
C13
SML1ALERT#_R
E14
SMB_ME1_CLK
M16
SMB_ME1_DAT
M7
T11
P10
M10
CLK_PEGA_REQ#
AB37
CLK_PCH_PEGAN
AB38
CLK_PCH_PEGAP
AV22
AU22
AM12
AM13
BF18
CLK_BUF_PCIE_3GPLL#
BE18
CLK_BUF_PCIE_3GPLL
BJ30
CLK_BUF_BCLK_N
BG30
CLK_BUF_BCLK_P
G24
CLK_BUF_DREFCLK#
E24
CLK_BUF_DREFCLK
AK7
CLK_BUF_DREFSSCLK#
AK5
CLK_BUF_DREFSSCLK
K45
CLK_PCH_14M
H45
CLK_PCI_FB
V47
XTAL25_IN
V49
XTAL25_OUT
Y47
XCLK_RCOMP
K43
CLK_FLEX0
F47
CLK_FLEX1
H47
CLK_FLEX2
K49
CLK_FLEX3
+3V_DEEP_SUS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
RF
CLK_PCH_14M
C530
*22P/50V_4
R816 *0_4
R817 *0_4
XTAL25_IN
R740 0_4
R583 90.9/F_4
SMBus/Pull-up(CLG)
R541 1K_4
R263 10K_4
R248 2.2K_4
R513 2.2K_4
R531 2.2K_4
R298 2.2K_4
R795 10K_4
PROJECT : R62
PROJECT : R62
PROJECT : R62
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PCH 3/6 (PCIE/USB/CLK)
PCH 3/6 (PCIE/USB/CLK)
PCH 3/6 (PCIE/USB/CLK)
1
08
SMB_PCH_CLK 31
MB_PCH_DAT 31
S
RAMRST_CNTRL_PCH2
D
TP53
CLK_PEGA_REQ# 15
CLK_CPU_BCLKN 2
CLK_CPU_BCLKP 2
CLK_DPLL_SSCLKN2
CLK_DPLL_SSCLKP2
C813 *33P/50V_4
R587
*1M_4
C814 *33P/50V_4
PCH_XTAL25_IN
+1.05V
SI DEL reserve parts
TP68
TP72
TP103
TP70
DRAMRST_CNTRL_PCH
SMBALERT#
SMB_PCH_CLK
SMB_PCH_DAT
SMB_ME0_CLK
SMB_ME0_DAT
SML1ALERT#_R
8 43Monday, October 22, 2012
8 43Monday, October 22, 2012
1
8 43Monday, October 22, 2012
Y9
*25MHZ
TP101
TP100
25
1A
1A
1A
5
Cougar Point/Panther Point (GPIO,VSS_NCTF,RSVD)
Cougar Point/Panther Point (GPIO,VSS_NCTF,RSVD)
Cougar Point/Panther Point (GPIO,VSS_NCTF,RSVD)Cougar Point/Panther Point (GPIO,VSS_NCTF,RSVD)
U
32F
S
CI_SERR#30
P
S
IO_EXT_SMI#30
D D
C C
33
33
Reserve
ODD_PRSNT#32
DGPU_PWROK30,42,43
DGPU_HOLD_RST# 7,14
DSW_WAKE#30
+3V
SI change net name
9,42,43
DGPU_PR_EN
BT_OFF#
F_OFF#
R
R804 10K_4
TP138
TP139
R543 *0_4
DGPU_HOLD_RST#
R357 *0_4
TP140
R271 0_4
_GPIO
IO_EXT_SMI#
S
B
OARD_ID4
OARD_ID5
B
T_OFF#
B
L
AN_DISABLE#_R
F_OFF#
R
ODD_PRSNT#_R
DGPU_PWROK
BIOS_REC
R503 0_4
GPIO27
PLL_ODVR_EN
GPIO34
GPIO35
DGPU_PWR_EN_R
FDI_OVRVLTG
MFG_MODE
DGPU_PRSNT#
TEST_SET_UP
GPIO49
SV_DET
GPIO27
With Intel LAN:
Connect to LANWAKE# pin on the LAN
Without Intel LAN:
Used to wake event from DSx
SI add
+3V
U37
9,42,43
B B
DGPU_PR_EN
+3V
4
2,6,7,8,10,12,13,14,23,24,25,26,27,29,30,31,32,33,36,39,40,42
2
1
DGPU_PWR_EN_R
3 5
*U74AHC1G08G-AL5-R
T7
B
MBUSY# / GPIO0
(+3V)
A42
ACH1 / GPIO1
T
(+3V)
H36
TACH2 / GPIO6
(+3V)
E38
T
ACH3 / GPIO7
(+3V)
C10
PIO8
G
(
+3VS5)
C4
LAN_PHY_PWR_CTRL / GPIO12
(+3VS5)
G2
G
PIO15
(+3VS5)
U2
SATA4GP / GPIO16
(+3V)
D40
TACH0 / GPIO17
(+3V)
T5
SCLOCK / GPIO22
(+3V)
E8
GPIO24 / MEM_LED
(+3VS5)
E16
GPIO27
(DSW)
P8
GPIO28
(+3VS5)
K1
STP_PCI# / GPIO34
(+3V)
K4
GPIO35
(+3V)
V8
SATA2GP / GPIO36
(+3V)
M5
SATA3GP / GPIO37
(+3V)
N2
SLOAD / GPIO38
(+3V)
M3
SDATAOUT0 / GPIO39
(+3V)
V13
SDATAOUT1 / GPIO48
(+3V)
V3
SATA5GP / GPIO49
(+3V)
D6
GPIO57
(+3VS5)
A4
VSS_NCTF_1
A44
VSS_NCTF_2
A45
VSS_NCTF_3
A46
VSS_NCTF_4
A5
VSS_NCTF_5
A6
VSS_NCTF_6
B3
VSS_NCTF_7
B47
VSS_NCTF_8
BD1
VSS_NCTF_9
BD49
VSS_NCTF_10
BE1
VSS_NCTF_11
BE49
VSS_NCTF_12
BF1
VSS_NCTF_13
BF49
VSS_NCTF_14
CPT_PPT_Rev_0p5
4
C40
G
B41
C41
A40
P4
AU16
P5
AY11
AY10
T14
AY1
AH8
AK11
AH10
AK10
P37
BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49
PIO68
PIO69
G
G
PIO70
PIO71
G
R586 *0_4
EC_RCIN#
PCH_THRMTRIP#
NV_CLE
GPIO
NCTF
T
ACH4 / GPIO68
(+3V)
ACH5 / GPIO69
T
(+3V)
TACH6 / GPIO70
(+3V)
T
ACH7 / GPIO71
(+3V)
A
20GATE
RCIN#
PROCPWRGD
THRMTRIP#
INIT3_3V#
DF_TVS
CPU/MISC
TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4
NC_1
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
PECI
574 10K_4
R
R
577 1.5K/F_4
578 *1.5K/F_4
R
R552 390_4
NV_CLE
3
3V
+
3V
+
EC_A20GATE 30
EC_PECI 2,30
EC_RCIN# 30
H_PWRGOOD 2
PM_THRMTRIP#R 2,30
Rb
R362 *100/F_4
7
Rb need placment near PCH
MFG-TEST
+1.05V_VTT
MFG_MODE
Swap GPIO
S_GPIO
RF_OFF#
Intel ME Crypto Transport Layer
Security (TLS) cipher suite
Low = Disable (Default)
High = Enable
R275 *0_4
TEST_SET_UP
SV_SET_UP
High = Strong (Default)
2
R802 10K_4
R518 *0_4
0 = SGPIO
1 = Default
R261 10K_4
R272 *0_4
+3V_DEEP_SUS
R511 1K_4
R807 10K_4
for DS3
+3V
1
09
+3V
+3V
DGPU_HOLD_RST#
LAN_DISABLE#_R
BT_OFF#
SIO_EXT_SMI#
BT_OFF#
EC_A20GATE
EC_RCIN#
GPIO49
GPIO70
GPIO71
ODD_PRSNT#_R
DGPU_PWROK
GPIO27
R803 10K_4
R512 10K_4
R625 10K_4
R580 10K_4
R805 *10K_4
R806 10K_4
R280 10K_4
R544 10K_4
R581 1.5K/F_4
R576 1.5K/F_4
R532 10K_4
R346 10K_4
R347 *10K_4
R302 10K_4
R358 *10K_4
SI change
R274 *0_4
BIOS RECOVERY High = Disable (Default)
R808 100K_4
TEST DETECT
Low = Default
BIOS_REC
R257 10K_4
Low = Enable
SV_DET
R809 *10K_4
R901 *10K_4
GPIO Pull-up/Pull-down(CLG)
for DS3
+3V_DEEP_SUS
+3V
+3VS5
+3V
+3V
+3V_DEEP_SUS
for DS3
+3V +3V
R254 100K_4
FDI_OVRVLTGDGPU_PWR_EN_R
R278 *1K_4
BOARD ID SETTING
BOARD_ID1
For Stage Use
BOARD_ID0 8
BOARD_ID1 8
BOARD_ID2 8
BOARD_ID0
BOARD_ID1
BOARD_ID2
R260 *200K/F_4
for DS3
Model
DB R62 UMA 000
A A
DB R62 DIS
0
0
1
0
5
BOARD_ID0BOARD_ID1BOARD_ID2BOARD_ID3BOARD_ID4BOARD_ID5
0
1
1
0
1
1
1
0
RD0
R549 *10K_4
RD1
R810 10K_4
RD2
R812 10K_4
RD4
R596 10K_4
RD5
R345 10K_4
4
BOARD_ID0
BOARD_ID1
BOARD_ID2
SI DEL Board ID3
BOARD_ID4
BOARD_ID5
RU0
R550 10K_4
RU1
R811 *10K_4
RU2
R813 *10K_4
RU4
R593 *10K_4
RU5
R344 *10K_4
+3V_DEEP_SUS
+3V
3
GFX Present
R814 *100K_4
DGPU_PRSNT#
Stuff
NC
SG
Ra
Rb
RaRb
R529 10K_4
UMA
Rb
Ra
2
+3V
PROJECT : R62
PROJECT : R62
PROJECT : R62
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
PCH 4/6 (GPIO/MISC)
PCH 4/6 (GPIO/MISC)
PCH 4/6 (GPIO/MISC)
1
9 43Monday, October 22, 2012
9 43Monday, October 22, 2012
9 43Monday, October 22, 2012
1A
1A
1A
5
C
ougar Point/Panther Point(POWER)
CPSUSBYP
OUT
GND
P
+3V_DEEP_SUS+3VS5
1
2
U
32J
CH_VCCDSW
+VCCRTCEXT
+VCCSST
C786
0.1U/10V_4
C804
0.1U/10V_4
AD49
BH23
AL29
AL24
AA19
AA21
AA24
AA26
AA27
AA29
AA31
AC26
AC27
AC29
AC31
AD29
AD31
BD47
BF47
AF17
AF33
AF34
AG34
AG33
W21
W23
W24
W26
W29
W31
W33
T16
V12
T38
N16
Y49
V16
T17
V19
BJ8
A22
CCACLK
V
CCDSW3_3
V
D
CC3_3[5]
V
VCCAPLLDMI2
VCCIO[14]
DCPSUS[3]
VCCASW[1]
VCCASW[2]
VCCASW[3]
VCCASW[4]
VCCASW[5]
VCCASW[6]
VCCASW[7]
VCCASW[8]
VCCASW[9]
VCCASW[10]
VCCASW[11]
VCCASW[12]
VCCASW[13]
VCCASW[14]
VCCASW[15]
VCCASW[16]
VCCASW[17]
VCCASW[18]
VCCASW[19]
VCCASW[20]
DCPRTC
VCCVRM[4]
VCCADPLLA
VCCADPLLB
VCCIO[7]
VCCDIFFCLKN[1]
VCCDIFFCLKN[2]
VCCDIFFCLKN[3]
VCCSSC
DCPSST
DCPSUS[1]
DCPSUS[2]
V_PROC_IO
VCCRTC
CPT_PPT_Rev_0p5
C511
1U/6.3V_4
C913
22U/6.3VS_8
+VCCAFDI_VRM
160mA (20mils)
+1.05V_VCCA_A_DPL
65mA (10mils)
+1.05V_VCCA_B_DPL
8mA (10mils)
+VCCDIFFCLKN
55mA (10mils)
+V1.05V_SSCVCC
95mA (10mils)
C490
0.1U/10V_4
+V1.05M_VCCSUS
C917
0.1U/10V_4
C809
0.1U/10V_4
+VCCACLK
+
VCCPDSW
3mA (10mils)
P
+3V_SUS_CLKF33
+VCCSUS1
C911
*1U/6.3V_4
C512
1U/6.3V_4
C914
22U/6.3VS_8
C489
0.1U/10V_4
TP94
R
315 0_4
+
3VS5
496
C
P95
T
C792
1U/6.3V_4
C817
1U/6.3V_4
C816
1U/6.3V_4
0.1U/10V_4
C505
1U/6.3V_4
TP134
C916
4.7U/6.3V_6
C805
1U/6.3V_4
1.01A (60mils)
D D
+1.05V
+1.05V
C C
+1.05V
+1.05V
+1.05V
B B
+1.05V_VTT
R592 0_4
R591 0_4
V_PROC_IO=1mA
(10mils)
+3V_RTC
VCCRTC<1mA
(10mils)
PCH DS3 PWR
A A
C526
1U/6.3V_4
SLP_SUS_ON
SLP_SUS_ON
5
30
R359
100K/F_4
R360 *0_8
U20
5
IN
4
IN
3
ON/OFF
AP2821KTR-G1
OWER
Clock and Miscellaneous
CPURTC
PCI/GPIO/LPCMISC
SATA USB
HDA
4
V
CCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[6]
V5REF_SUS
VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCAPLLSATA
VCCASW[22]
VCCASW[23]
VCCASW[21]
VCCSUSHDA
4
N26
CCIO[29]
V
P26
V
CCIO[30]
P28
V
CCIO[31]
T27
V
CCIO[32]
T29
VCCIO[33]
T23
3V_VCCPUSB
+
T24
V23
V24
P24
T26
VCCIO[34]
M26
+5V_PCH_VCC5REFSUS
AN23
DCPSUS[4]
V5REF
VCC3_3[1]
VCC3_3[8]
VCC3_3[4]
VCC3_3[2]
VCCIO[5]
VCCIO[12]
VCCIO[13]
VCCIO[6]
VCCVRM[1]
VCCIO[2]
VCCIO[3]
VCCIO[4]
+VCCA_USBSUS
AN24
+3V_VCCPSUS
P34
+5V_PCH_VCC5REF
N20
N22
119mA (15mils)
P20
+3V_VCCPSUS
P22
AA16
266mA (20mils)
W16
T34
C790
0.1U/10V_4
AJ2
AF13
AH13
AH14
AF14
AK1
AF11
+VCCAFDI_VRM
AC16
AC17
AD17
1.01A (60mils)
+1.05V
T21
V21
T19
P32
+1.05V +1.05V_VTT
If have power noise issue then stuff it.
10mA (10mils)
+V3.3A_1.5A_HDA_IO
C806
0.1U/10V_4
+5V +3V_LDO
C838
1U/6.3V_4
C504
0.1U/10V_4
+3V
C808
*1U/6.3V_4
U33
G910T21U
Vin3Vout
GND
2
C
815
1U/6.3V_4
R815 0_6
C501
0.1U/10V_4
C498 *1U/6.3V_4
R320 0_6
C499
1U/6.3V_4
+3V
C789
0.1U/10V_4
C484
1U/6.3V_4
C493
1U/6.3V_4
R570 0_6
1
1.05V
+
119mA (20mils)
+
3V_DEEP_SUS
+1.05V
C483
0.1U/10V_4
+3V_DEEP_SUS
3
for DS3
+3V_DEEP_SUS
+3V
(Mobile 1.5V)
+1.05V
+1.05V
for DS3
3
OUGAR POINT/Panther Point (POWER)
C
1.05V
+
for DS3
+1.05V
+1.05V
C503
10U/6.3VS_6
+3V
+VCCAFDI_VRM
160mA (15mils)
R598 *0_4/S
+1.5V
TP141
+1.05V
+1.05V
+1.05V
L66
10uH/100MA_8
L67
10uH/100MA_8
+3V
R606 1/F_4
PCH DS3 PWR
1.3 A (60mils)
C
1U/6.3V_4
C497
10U/6.3VS_6
2.925 A (140mils)
C912
1U/6.3V_4
C508
1U/6.3V_4
+VCCAFDI_VRM
+1.05V_VCCAPLL_FDI
506
C807
0.1U/10V_4
65mA (10mils)
+1.05V_VCCA_A_DPL
8mA (10mils)
+1.05V_VCCA_B_DPL
+3V_SUS_CLKF33
+3V_SUS_CLKF33_R
C536
1U/6.3V_4
SLP_SUS_ON
C
500
1U/6.3V_4
C510
1U/6.3V_4
C521
1U/6.3V_4
C509
1U/6.3V_4
R368
*100K/F_4
AA23
AC23
AD21
AD23
AF21
AF23
AG21
AG23
AG24
AG26
AG27
AG29
AJ23
AJ26
AJ27
AJ29
AJ31
AN19
BJ22
AN16
AN17
AN21
AN26
AN27
AP21
AP23
AP24
AP26
AT24
AN33
AN34
BH29
AP16
BG6
AP17
AU20
C818 1U/6.3V_4
C811 1U/6.3V_4
L62
10uH/100mA_8
R607 *0_4
U21
5
IN
4
IN
3
ON/OFF
AP2821KTR-G1
2
U
32G
CCCORE[1]
V
V
CCCORE[2]
CCCORE[3]
V
V
CCCORE[4]
CCCORE[5]
V
VCCCORE[6]
CCCORE[7]
V
VCCCORE[8]
V
CCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
VCCCORE[16]
VCCCORE[17]
VCCIO[28]
VCCAPLLEXP
VCCIO[15]
VCCIO[16]
VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[24]
VCCIO[25]
VCCIO[26]
VCC3_3[3]
VCCVRM[2]
VccAFDIPLL
VCCIO[27]
VCCDMI[2]
CPT_PPT_Rev_0p5
C846 1U/6.3V_4
C841 10U/6.3VS_6
OUT
GND
2
P
OWER
VCC CORE
VCCIO
FDI
+5V_DEEP_SUS+5VS5
1
2
CRTLVDS
DMI
DFT / SPI HVCMOS
+VCCAFDI_VRM
C1107
0.1U/10V_4
CCADAC
V
V
SSADAC
V
CCALVDS
VSSALVDS
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
VCC3_3[6]
VCC3_3[7]
VCCVRM[3]
VCCDMI[1]
VCCCLKDMI
VCCDFTERM[1]
VCCDFTERM[2]
VCCDFTERM[3]
VCCDFTERM[4]
VCCSPI
C907
4.7U/6.3V_6
+5V_PCH_VCC5REF
V5REF= 1mA20mA (10mils)
VCC5REFSUS=1mA
+5V_PCH_VCC5REFSUS
+3V_DEEP_SUS
+1.05V
+3V_RTC
+1.5V
+3VS5
+3V
+5VS5
+5V
+1.8V
NB5
NB5
NB5
1
1mA (10mils)
+
VCCA_DAC_1_2
U48
U47
AK36
AK37
AM37
AM38
60mA (10mils)
AP36
AP37
V33
V34
0.1U/10V_4
AT16
+VCCAFDI_VRM
AT20
AB36
AG16
AG17
AJ16
AJ17
20mA (10mils)
+3V_VCCME_SPI
V1
If EC support embedded flash , SPI
power must be used S5_0N power rail
for EC load code.
SI add C1107 for 3D mark Screen
garbage issue.
C890
0.1U/10V_4
6,7,8,9,39
2,4,6,7,8,9,25,30,36,40
6,7,25
4,12,27,33
6,7,9,33,35,36,39,43
2,6,7,8,9,12,13,14,23,24,25,26,27,29,30,31,32,33,36,39,40,42
28,29,33,35,36,37,38,39,40,41,42,43
7,23,25,27,31,32,33,39
4,7,37,43
PROJECT : R62
PROJECT : R62
PROJECT : R62
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
L
*HCB1608KF-181T15/1.5A_6
827 10U/6.3VS_6
C
819 0.1U/10V_4
C
823 0.01U/25V_4
C
1mA (10mils)
+VCC_TX_LVDS
C828 22U/6.3VS_8
C527 0.01U/25V_4
C525 0.01U/25V_4
C853
+1.05V
C837
C833
*10U/6.3V_6
1U/6.3V_4
R361 *0_6
R502 0_6
C783
1U/6.3V_4
R823 10_4
D12 RB500V-40
C514
1U/6.3V_4
R328 10_4
D13 RB500V-40
C515
0.1U/10V_4
PCH 5/6 (POWER)
PCH 5/6 (POWER)
PCH 5/6 (POWER)
1
61
0.1uH/250mA_8
42mA (10mils)
190 mA (15mils)
L64
C495
1U/6.3V_4
C492
0.1U/10V_4
+3V
10
3V_LDO
+
+1.8V
+3V
+1.05V_VTT
+3VS5
+3V
+5V
+3V
+5V_DEEP_SUS
+3V_DEEP_SUS
for DS3
10 43Monday, October 22, 2012
10 43Monday, October 22, 2012
10 43Monday, October 22, 2012
+1.8V
+3V
1A
1A
1A
5
4
3
2
1
Cougar Point/Panther Point (GND)
32I
U
AY4
SS[159]
V
AY42
V
SS[160]
AY46
VSS[161]
AY8
SS[162]
V
B11
V
SS[163]
B15
D D
C C
B B
A A
5
B19
B23
B27
B31
B35
B39
B7
F45
BB12
BB16
BB20
BB22
BB24
BB28
BB30
BB38
BB4
BB46
BC14
BC18
BC2
BC22
BC26
BC32
BC34
BC36
BC40
BC42
BC48
BD46
BD5
BE22
BE26
BE40
BF10
BF12
BF16
BF20
BF22
BF24
BF26
BF28
BD3
BF30
BF38
BF40
BF8
BG17
BG21
BG33
BG44
BG8
BH11
BH15
BH17
BH19
H10
BH27
BH31
BH33
BH35
BH39
BH43
BH7
D3
D12
D16
D18
D22
D24
D26
D30
D32
D34
D38
D42
D8
E18
E26
G18
G20
G26
G28
G36
G48
H12
H18
H22
H24
H26
H30
H32
H34
F3
CPT_PPT_Rev_0p5
VSS[164]
SS[165]
V
V
SS[166]
VSS[167]
SS[168]
V
V
SS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
SS[259]
V
V
SS[260]
VSS[261]
SS[262]
V
V
SS[263]
VSS[264]
SS[265]
V
V
SS[266]
VSS[267]
SS[268]
V
V
SS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
4
H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28
3
Cougar Point/Panther Point (GND)
32H
U
H5
VSS[0]
AA17
AA2
AA3
AA33
AA34
AB11
AB14
AB39
AB4
AB43
AB5
AB7
AC19
AC2
AC21
AC24
AC33
AC34
AC48
AD10
AD11
AD12
AD13
AD19
AD24
AD26
AD27
AD33
AD34
AD36
AD37
AD38
AD39
AD4
AD40
AD42
AD43
AD45
AD46
AD8
AE2
AE3
AF10
AF12
AD14
AD16
AF16
AF19
AF24
AF26
AF27
AF29
AF31
AF38
AF4
AF42
AF46
AF5
AF7
AF8
AG19
AG2
AG31
AG48
AH11
AH3
AH36
AH39
AH40
AH42
AH46
AH7
AJ19
AJ21
AJ24
AJ33
AJ34
AK12
AK3
CPT_PPT_Rev_0p5
V
SS[1]
VSS[2]
SS[3]
V
V
SS[4]
VSS[5]
SS[6]
V
V
SS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
V
SS[80]
VSS[81]
SS[82]
V
V
SS[83]
VSS[84]
SS[85]
V
V
SS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28
2
PROJECT : R62
PROJECT : R62
PROJECT : R62
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
PCH 6/6 (GND)
PCH 6/6 (GND)
PCH 6/6 (GND)
1
11
11 43Monday, October 22, 2012
11 43Monday, October 22, 2012
11 43Monday, October 22, 2012
1A
1A
1A
5
4
3
2
1
_A_DQ[63:0]
DIM5A
_A_A[15:0]
M
D D
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CS#0
M_A_CS#1
M_A_CLKP0
M_A_CLKN0
M_A_CLKP1
M_A_CLKN1
M_A_CKE0
M_A_CKE1
M_A_CAS#
M_A_RAS#
R824 10K_4
R198 10K_4
C C
B B
M_A_WE#
SMB_RUN_CLK 8,13
SMB_RUN_DAT 8,13
M_A_ODT0
M_A_ODT1
M_A_DQSP[7:0]
M_A_DQSN[7:0]
3
M_A_A0
_A_A1
M
M
_A_A2
M
_A_A3
_A_A4
M
M
_A_A5
M
_A_A6
_A_A7
M
_A_A8
M
M
_A_A9
_A_A10
M
_A_A11
M
M
_A_A12
M_A_A13
_A_A14
M
M_A_A15
DIMM0_SA0
DIMM0_SA1
SMB_RUN_CLK
SMB_RUN_DAT
M_A_DM1
M_A_DM2
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
J
98
0
A
97
1
A
96
A
2
95
A3
92
4
A
91
A
5
90
A6
86
7
A
89
A
8
85
A9
107
10/AP
A
84
A
11
83
A12/BC#
119
13
A
80
A
14
78
A15
109
3
BA0
108
3
BA1
79
3
BA2
114
3
S0#
121
3
S1#
101
3
CK0
103
3
CK0#
102
3
CK1
104
3
CK1#
73
3
CKE0
74
3
CKE1
115
3
CAS#
110
3
RAS#
113
3
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
3
ODT0
120
3
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
3
12
29
47
64
137
154
171
188
3
10
27
45
62
135
152
169
186
PC2100 DDR3 SDRAM SO-DIMM
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DDR3-DIMM0_H=5.2_RVS
ddr-78279-001-rvs-204p
DGMK4000278
SOCKET DDR3 SODIMM(204P,H5.2,RVS)QBCON
5
Q0
D
Q1
D
D
Q2
DQ3
Q4
D
D
Q5
DQ6
Q7
D
D
Q8
DQ9
Q10
D
D
Q11
DQ12
Q13
D
D
Q14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
(204P)
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
M_A_DQ4
7
_A_DQ5
M
15
M
_A_DQ7
17
M
_A_DQ6
4
_A_DQ1
M
6
M
_A_DQ0
16
M
_A_DQ3
18
_A_DQ2
M
21
_A_DQ9
M
23
M
_A_DQ8
33
_A_DQ15
M
35
_A_DQ10
M
22
M
_A_DQ12
24
M_A_DQ13
34
_A_DQ14
M
36
M_A_DQ11
39
M_A_DQ21
41
M_A_DQ16
51
M_A_DQ19
53
M_A_DQ18
40
M_A_DQ20
42
M_A_DQ17
50
M_A_DQ23
52
M_A_DQ22
57
M_A_DQ25
59
M_A_DQ24
67
M_A_DQ30
69
M_A_DQ26
56
M_A_DQ28
58
M_A_DQ29
68
M_A_DQ31
70
M_A_DQ27
129
M_A_DQ36
131
M_A_DQ37
141
M_A_DQ34
143
M_A_DQ38
130
M_A_DQ32
132
M_A_DQ33
140
M_A_DQ35
142
M_A_DQ39
147
M_A_DQ41
149
M_A_DQ45
157
M_A_DQ47
159
M_A_DQ46
146
M_A_DQ40
148
M_A_DQ44
158
M_A_DQ42
160
M_A_DQ43
163
M_A_DQ49
165
M_A_DQ48
175
M_A_DQ54
177
M_A_DQ55
164
M_A_DQ53
166
M_A_DQ52
174
M_A_DQ50
176
M_A_DQ51
181
M_A_DQ61
183
M_A_DQ60
191
M_A_DQ62
193
M_A_DQ63
180
M_A_DQ56
182
M_A_DQ57
192
M_A_DQ59
194
M_A_DQ58
M
3
Reseve for RF
+1.5VSUS
+1.5V
C237 *2.2U/6.3V_6
C96 *2.2U/6.3V_6
C61 *2.2U/6.3V_6
C60 *2.2U/6.3V_6
1.5VSUS
+
.48A
2
+3V
R169 10K_4
+3V
PM_EXTTS#0 8,13
DDR3_DRAMRST# 2,13
R45 *0_6/S
PM_EXTTS#0
+SMDDR_VREF_DQ0SMDDR_VREF_DQ0_M1
+SMDDR_VREF_DIMM
+1.5V
+0.75V_DDR_VTT
+1.5VSUS
+3VPCU
+3V
J
DIM5B
75
DD1
V
76
V
DD2
81
VDD3
82
DD4
V
87
V
DD5
88
VDD6
93
DD7
V
94
V
DD8
99
VDD9
100
DD10
V
105
V
DD11
106
VDD12
111
DD13
V
112
V
DD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
26
31
32
37
38
43
4,10,27,33
13,37,39
2,4,13,37,43
5,7,25,30,31,33,34,35
2,6,7,8,9,10,13,14,23,24,25,26,27,29,30,31,32,33,36,39,40,42
PC2100 DDR3 SDRAM SO-DIMM
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
DDR3-DIMM0_H=5.2_RVS
ddr-78279-001-rvs-204p
DGMK4000278
SOCKET DDR3 SODIMM(204P,H5.2,RVS)QBCON
(204P)
SS16
V
V
SS17
VSS18
SS19
V
V
SS20
VSS21
SS22
V
V
SS23
VSS24
SS25
V
V
SS26
VSS27
SS28
V
V
SS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VTT1
VTT2
GND
GND
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
205
206
12
+0.75V_DDR_VTT
+1.5VSUS
VREF DQ0 M1 SolutionPlace these Caps near So-Dimm0.
+1.5VSUS +0.75V_DDR_VTT
C918 1U/6.3V_4
C256 1U/6.3V_4
C246 1U/6.3V_4
C213 1U/6.3V_4
C269 10U/6.3VS_6
C653 10U/6.3VS_6
C621 10U/6.3VS_6
C631 10U/6.3VS_6
C642 10U/6.3VS_6
A A
5
4
C656 10U/6.3VS_6
C140 *10U/6.3V_6
C133 10U/6.3V_8
C252 10U/6.3V_8
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
3
C410 1U/6.3V_4
C919 1U/6.3V_4
C390 1U/6.3V_4
C397 1U/6.3V_4
C920 10U/6.3V_6
C388 *10U/6.3V_6
C306 0.1U/10V_4
C297 2.2U/6.3V_6
C49 0.1U/10V_4
C48 2.2U/6.3V_6
+3V
C367 0.1U/10V_4
C377 2.2U/6.3V_6
DDR_VTTREF
SMDDR_VREF_DQ0_M34
DRAMRST_CNTRL_DDR 2,13
2
R37 *0_6
1
2
Q50
AO3416
3
DDR_VTTREF4,13,37
NB5
NB5
NB5
R33
1K/F_4
SMDDR_VREF_DQ0_M1
R39
1K/F_4
R827 *0_6
PROJECT : R62
PROJECT : R62
PROJECT : R62
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
+1.5VSUS
R826
1K/F_4
+SMDDR_VREF_DIMM
R156
1K/F_4
DDR3 DIMM0-RVS (5.2H)
DDR3 DIMM0-RVS (5.2H)
DDR3 DIMM0-RVS (5.2H)
1
C268
470P/50V_4
12 43Monday, October 22, 2012
12 43Monday, October 22, 2012
12 43Monday, October 22, 2012
1A
1A
1A
5
M
_B_A[15:0]
D D
M_B_BS#0
M_B_BS#1
M_B_BS#2
M_B_CS#0
M_B_CS#1
M_B_CLKP0
M_B_CLKN0
M_B_CLKP1
M_B_CLKN1
M_B_CKE0
M_B_CKE1
M_B_CAS#
M_B_RAS#
R213 10K_4
R828 10K_4
+3V
C C
B B
M_B_WE#
SMB_RUN_CLK 8,12
SMB_RUN_DAT 8,12
M_B_ODT0 3
M_B_ODT1 3
M_B_DQSP[7:0]
M_B_DQSN[7:0]
3
_B_A0
M
M
_B_A1
M
_B_A2
_B_A3
M
M
_B_A4
M
_B_A5
_B_A6
M
_B_A7
M
M
_B_A8
_B_A9
M
_B_A10
M
M
_B_A11
M_B_A12
_B_A13
M
M_B_A14
M_B_A15
DIMM1_SA0
DIMM1_SA1
M_B_DM1
M_B_DM2
M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
109
3
108
3
79
3
114
3
121
3
101
3
103
3
102
3
104
3
73
3
74
3
115
3
110
3
113
3
197
201
202
200
116
120
11
28
46
63
136
153
170
187
3
12
29
47
64
137
154
171
188
3
10
27
45
62
135
152
169
186
4
J
DIM6A
0
A
A
1
A2
3
A
A
4
A5
6
A
A
7
A8
9
A
A
10/AP
A11
12/BC#
A
A
13
A14
A15
BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
ODT0
ODT1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
PC2100 DDR3 SDRAM SO-DIMM
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DDR3-DIMM1_H=9.2_RVS
ddr-as0a626-uarn-7f-204p-smt
DGMK4000288
SOCKET DDR3 SODIMM(204P,H9.2,RVS)QBCON
5
Q0
D
7
D
Q1
15
DQ2
17
Q3
D
4
D
Q4
6
DQ5
16
Q6
D
18
D
Q7
21
DQ8
23
Q9
D
33
D
Q10
35
DQ11
22
Q12
D
24
D
Q13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
(204P)
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
_B_DQ5
M
M
_B_DQ4
M
_B_DQ3
_B_DQ2
M
M
_B_DQ0
M
_B_DQ1
_B_DQ6
M
_B_DQ7
M
M
_B_DQ12
_B_DQ13
M
_B_DQ14
M
M
_B_DQ10
M_B_DQ8
_B_DQ9
M
M_B_DQ11
M_B_DQ15
M_B_DQ20
M_B_DQ21
M_B_DQ18
M_B_DQ22
M_B_DQ17
M_B_DQ16
M_B_DQ19
M_B_DQ23
M_B_DQ25
M_B_DQ29
M_B_DQ27
M_B_DQ26
M_B_DQ28
M_B_DQ24
M_B_DQ31
M_B_DQ30
M_B_DQ36
M_B_DQ37
M_B_DQ35
M_B_DQ34
M_B_DQ33
M_B_DQ32
M_B_DQ39
M_B_DQ38
M_B_DQ44
M_B_DQ40
M_B_DQ42
M_B_DQ43
M_B_DQ45
M_B_DQ41
M_B_DQ46
M_B_DQ47
M_B_DQ49
M_B_DQ48
M_B_DQ54
M_B_DQ55
M_B_DQ52
M_B_DQ53
M_B_DQ50
M_B_DQ51
M_B_DQ61
M_B_DQ56
M_B_DQ62
M_B_DQ63
M_B_DQ57
M_B_DQ60
M_B_DQ59
M_B_DQ58
_B_DQ[63:0]
M
+0.75V_DDR_VTT
+1.5VSUS
+3VPCU
+3V
3
3
SMDDR_VREF_DQ1_M1 +SMDDR_VREF_DQ1
+1.5VSUS
R829
1K/F_4
DDR_VTTREF4,12,13,37
12,37,39
2,4,12,37,43
5,7,25,30,31,33,34,35
2,6,7,8,9,10,12,14,23,24,25,26,27,29,30,31,32,33,36,39,40,42
R830 *0_6
+SMDDR_VREF_DIMM1
R145
1K/F_4
2
2
.48A
+3V
PM_EXTTS#0 8,12,13
DDR3_DRAMRST# 2,12
R398 0_6
C290
470P/50V_4
MBCLK2 8,13,30
MBDATA2 8,13,30
PM_EXTTS#0 8,12,13
EXTTS#1 8
SI change
PM_EXTTS#0
+SMDDR_VREF_DIMM1
MBCLK2
MBDATA2
R182 10K_4
+3V
1.5VSUS
+
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
199
77
122
125
198
30
126
13
14
19
20
25
26
31
32
37
38
43
DDR3 Thermal Sensor
R9190_4
R9200_4
PM_EXTTS#0
EXTTS#1
J
DIM6B
DD1
V
V
DD2
VDD3
DD4
V
V
DD5
VDD6
DD7
V
V
DD8
VDD9
DD10
V
V
DD11
VDD12
DD13
V
V
DD14
VDD15
VDD16
VDD17
VDD18
VDDSPD
NC1
NC2
NCTEST
EVENT#
RESET#
1
VREF_DQ
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
VSS5
VSS6
VSS7
VSS8
PC2100 DDR3 SDRAM SO-DIMM
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
DDR3-DIMM1_H=9.2_RVS
ddr-as0a626-uarn-7f-204p-smt
DGMK4000288
SOCKET DDR3 SODIMM(204P,H9.2,RVS)QBCON
U40
8
7
6
4
SCLK
SDA
ALERT#
OVERT#
G780P81U
VCC
DXP
DXN
GND
(204P)
SS16
V
V
SS17
VSS18
SS19
V
V
SS20
VSS21
SS22
V
V
SS23
VSS24
SS25
V
V
SS26
VSS27
SS28
V
V
SS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VTT1
VTT2
GND
GND
1
2
3
5
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
205
206
C381 0.01U/25V_4
1
+0.75V_DDR_VTT
DDR_THERMDA
C368
2200P/50V_4
DDR_THERMDC
+3V
2
13
Q20
MMBT3904-7-F
1 3
SI Add
Local Thermal Sensor
C1116 *0.01U/25V_4
U1
MBCLK2 8,13,30
MBDATA2 8,13,30
A A
MBCLK2
MBDATA2 IO_THERMDA_L
R916 *10K_4
+3V
5
8
R921*0_4
R922*0_4
7
6
4
*G781-1P8
SCLK
SDA
ALERT#
OVERT#
VCC
DXP
DXN
GND
1
2
3
IO_THERMDC_L
5
G781P8(98h)
+3V
R915 *0_4
C41
*2200P/50V_4
R492 *0_4
4
IO_THERMDA_IO
2
*METR3904-G
1 3
IO_THERMDC_IO
Q38
+1.5VSUS
C208 1U/6.3V_4
C129 1U/6.3V_4
C922 1U/6.3V_4
C171 1U/6.3V_4
C159 10U/6.3VS_6
C154 10U/6.3VS_6
C647 10U/6.3VS_6
C149 10U/6.3VS_6
C211 10U/6.3VS_6
C221 10U/6.3VS_6
C198 *10U/6.3V_6
C103 10U/6.3V_8
C228 10U/6.3V_8
Place these Caps near So-Dimm1.
+0.75V_DDR_VTT
C394 1U/6.3V_4
C398 1U/6.3V_4
C399 1U/6.3V_4
C405 1U/6.3V_4
C389 10U/6.3V_6
C396 *10U/6.3V_6
+3V
C385 0.1U/10V_4
C386 2.2U/6.3V_6
3
+SMDDR_VREF_DIMM1
+SMDDR_VREF_DQ1
C300 0.1U/10V_4
C318 2.2U/6.3V_6
C585 0.1U/10V_4
C584 2.2U/6.3V_6
2
VREF DQ1 M1 Solution
DDR_VTTREF4,12,13,37
SMDDR_VREF_DQ1_M34
DRAMRST_CNTRL_DDR 2,12
R415 *0_6
1
2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
3
Q31
AO3416
PROJECT : R62
PROJECT : R62
PROJECT : R62
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
DDR3 DIMM1-RVS (9.2H)
DDR3 DIMM1-RVS (9.2H)
DDR3 DIMM1-RVS (9.2H)
+1.5VSUS
1
R407
1K/F_4
SMDDR_VREF_DQ1_M1
R406
1K/F_4
13 43Monday, October 22, 2012
13 43Monday, October 22, 2012
13 43Monday, October 22, 2012
1A
1A
1A
5
4
U26A
PART 1 0F 9
3
2
1
1
4
AA38
P
W
W
AB35
AA36
AH16
AA30
Y
Y
V37
V35
U36
U38
R36
R38
P37
P35
N36
N38
M37
M35
K37
K35
H37
H35
G36
G38
CIE_RX0P
37
PCIE_RX0N
35
PCIE_RX1P
36
CIE_RX1N
P
38
CIE_RX2P
P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
T37
PCIE_RX4N
T35
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_RX8P
PCIE_RX8N
PCIE_RX9P
L36
PCIE_RX9N
L38
PCIE_RX10P
PCIE_RX10N
PCIE_RX11P
J36
PCIE_RX11N
J38
PCIE_RX12P
PCIE_RX12N
PCIE_RX13P
PCIE_RX13N
PCIE_RX14P
F37
PCIE_RX14N
F35
PCIE_RX15P
E37
PCIE_RX15N
CLOCK
PCIE_REFCLKP
PCIE_REFCLKN
TEST_PG
PERSTB
PCI EXPRESS INTERFACE
CALIBRATION
THAMES_M2_XT
+3V
2
P
EG_TX0
2
PEG_TX#0
D D
C C
B B
2
PEG_TX1
2
EG_TX#1
P
2
EG_TX2
P
2
PEG_TX#2
2
PEG_TX3
2
PEG_TX#3
2
PEG_TX4
2
PEG_TX#4
2
PEG_TX5
2
PEG_TX#5
2
PEG_TX6
2
PEG_TX#6
2
PEG_TX7
2
PEG_TX#7
For Mars /Sun NC pin :
N38,M37,M35,L36,L38,K37,K35,J36,J38
H37,H35,G36,G38,F37,F35,E37
CLK_PCIE_VGA
CLK_PCIE_VGA#
CLK_PCIE_VGA
CLK_PCIE_VGA#
8
8
Ra
PEGX_RST#
P
CIE_TX0P
PCIE_TX0N
PCIE_TX1P
CIE_TX1N
P
CIE_TX2P
P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
PCIE_CALR_TX
PCIE_CALR_RX
Y33
C
32
Y
33
W
W
32
U
33
U32
U30
U29
T33
T32
T30
T29
P33
P32
P30
P29
N33
N32
N30
N29
L33
L32
L30
L29
K33
K32
J33
J32
K30
K29
H33
H32
Y30
Y29
_PEG_RXP0
_PEG_RXN0
C
_PEG_RXP1
C
_PEG_RXN1
C
_PEG_RXP2
C
C_PEG_RXN2
C_PEG_RXP3
C_PEG_RXN3
C_PEG_RXP4
C_PEG_RXN4
C_PEG_RXP5
C_PEG_RXN5
C_PEG_RXP6
C_PEG_RXN6
C_PEG_RXP7
C_PEG_RXN7
PCIE_CALRP
PCIE_CALRN
C
748 0.22U/10V_4
C
745 0.22U/10V_4
C
755 0.22U/10V_4
750 0.22U/10V_4
C
C738 0.22U/10V_4
C734 0.22U/10V_4
C728 0.22U/10V_4
C726 0.22U/10V_4
C757 0.22U/10V_4
C751 0.22U/10V_4
C740 0.22U/10V_4
C739 0.22U/10V_4
C742 0.22U/10V_4
C744 0.22U/10V_4
C754 0.22U/10V_4
C758 0.22U/10V_4
FOR Mars / Sun NC pin :
N33,N32,N30,N29,L33,L32,L30,L29,K33,K32
J33,J32,K30,K29,H33,H32
Mars/ Sun Only : Stuff Ra
Ra
R262 1.69K/F_4
R255 1K/F_4R205 1K/F_4
Rc
Install 1k for Mars / Sun
+1.0V_VGA
+1.0V_VGA
P
EG_RX0
PEG_RX#0
PEG_RX1
EG_RX#1
P
EG_RX2
P
PEG_RX#2
PEG_RX3
PEG_RX#3
PEG_RX4
PEG_RX#4
PEG_RX5
PEG_RX#5
PEG_RX6
PEG_RX#6
PEG_RX7
PEG_RX#7
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
4
C330
0.1U/10V_4
PEGX_RST#
R237
100K_4
2,6,7,8,9,10,12,13,23,24,25,26,27,29,30,31,32,33,36,39,40,42
+3V
16,18,19,43
+1.0V_VGA
PROJECT : R62
PROJECT : R62
PROJECT : R62
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
THAMES_PCIE_Interface
THAMES_PCIE_Interface
NB5
NB5
NB5
3
2
THAMES_PCIE_Interface
Date: Sheet of
Date: Sheet of
Date: Sheet of
+3V
+1.0V_VGADGPU_HIN_RST#
1A
1A
14 43Monday, October 22, 2012
14 43Monday, October 22, 2012
1
14 43Monday, October 22, 2012
1A
U74AHC1G08G-AL5-R
U11
A A
PLTRST#2,8,26,29,30,33
DGPU_HOLD_RST#7,9
R235 330_4
2
1
3 5
5
4
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