Quanta R33 DA0R33MB6E0, R33 DA0R33MB6F0, R33 DA0R33MB6F1 Schematic
1
2
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4
5
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8
R33 INTEL UMA/DISCRETE SYSTEM DIAGRAM
01
+3V/+5V S5
A A
+1.05V_VTT
CPU Core
DDR3
VCCSA
Charge
B B
Dis-Charge
+VGACORE
+1.0V_VGA
C C
D D
PG.35
PG.38
PG.40~41
PG.37
PG.36
PG.34
PG.39
PG.42
PG.43
LANE2 LANE1
LAN
RTL8105EH
10/100
Accelerometer
PG.33
SMBUS
EnE KB3930QF A2
TPKB
PG.31PG.31 PG.32PG.30
1
SODIMM1
Max. 4GB
SODIMM2
Max. 4GB
HDD
ODD
PCI-E x 1
WLAN
BT COMBO
PCI-E x 1
Card Reader
RTS5229
KBC
2
PG.12
PG.13
PG.32
PG.32
PG.30
FANROM
PG.33PG.29
LANE3
PG.26
DDR3
Channel A
DDR3
Channel B
SATA0
SATA1
USB 2.0
PORT10
LPC
3
INTEL
IVY
37.5mm X 37.5mm
989pin PGA
TDP 35W
PG.2~5
FDI
DMI
INTEL PCH
Panther Point
PG.6~11
AUDIO
CODEC
IDT 92HD87
ICT
4
PCI-E x8
DP Port B
CRT
LVDS
USB 3.0
USB3.0 Ports
USB 2.0
USB2.0 Ports
PG.27
5
AMD
Thames XT
29mm X 29mm
TDP 25W
PG.14~20
DDR3 900MHz
VRAM
128Mx16x8,128bit
X2
Speaker
HP/MIC
Analog MIC
PORT1,2
PORT0,1
PG.28
PG.28
PG.27
PG.28
PG.28
6
PG.21~22
Webcam
PG.23
PORT4
NB5
NB5
NB5
HDMI
CRT
LVDS
PG.25
PG.24
PG.23
Stackup
TOP
GND
IN1
IN2
VCC
BOT
PROJECT : R33
PROJECT : R33
PROJECT : R33
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
1 43Wednesday, September 07, 2011
1 43Wednesday, September 07, 2011
1 43Wednesday, September 07, 2011
8
1A
1A
1A
5
4
3
2
1
Ivy Bridge Processor (DMI,PEG,FDI) Ivy Bridge Processor (CLK,MISC,JTAG)
CPU_DRAMRST#
1
R377
R377
4.99K/F_4
4.99K/F_4
02
U22B
U22A
U22A
DMI_TXN0<6>
DMI_TXN1<6>
DMI_TXN2<6>
DMI_TXN3<6>
D D
C C
B B
DMI_TXP0<6>
DMI_TXP1<6>
DMI_TXP2<6>
DMI_TXP3<6>
DMI_RXN0<6>
DMI_RXN1<6>
DMI_RXN2<6>
DMI_RXN3<6>
DMI_RXP0<6>
DMI_RXP1<6>
DMI_RXP2<6>
DMI_RXP3<6>
FDI_TXN0<6>
FDI_TXN1<6>
FDI_TXN2<6>
FDI_TXN3<6>
FDI_TXN4<6>
FDI_TXN5<6>
FDI_TXN6<6>
FDI_TXN7<6>
FDI_TXP0<6>
FDI_TXP1<6>
FDI_TXP2<6>
FDI_TXP3<6>
FDI_TXP4<6>
FDI_TXP5<6>
FDI_TXP6<6>
FDI_TXP7<6>
FDI_FSYNC0<6>
FDI_FSYNC1<6>
FDI_INT<6>
FDI_LSYNC0<6>
FDI_LSYNC1<6>
eDP_COMP
INT_eDP_HPD_Q
TP8TP8
TP10TP10
TP6TP6
TP13TP13
TP5TP5
TP14TP14
TP7TP7
TP9TP9
TP11TP11
TP12TP12
eDP_COMP connect to PIN A18 W:4mils/S:15mils/L: 500mils.
eDP_COMP connect to PIN A17 W:12mils/S:15mils/L: 500mils.
B27
DMI_RX#[0]
B25
DMI_RX#[1]
A25
DMI_RX#[2]
B24
DMI_RX#[3]
B28
DMI_RX[0]
B26
DMI_RX[1]
A24
DMI_RX[2]
B23
DMI_RX[3]
G21
DMI_TX#[0]
E22
DMI_TX#[1]
F21
DMI_TX#[2]
D21
DMI_TX#[3]
G22
DMI_TX[0]
D22
DMI_TX[1]
F20
DMI_TX[2]
C21
DMI_TX[3]
A21
FDI0_TX#[0]
H19
FDI0_TX#[1]
E19
FDI0_TX#[2]
F18
FDI0_TX#[3]
B21
FDI1_TX#[0]
C20
FDI1_TX#[1]
D18
FDI1_TX#[2]
E17
FDI1_TX#[3]
A22
FDI0_TX[0]
G19
FDI0_TX[1]
E20
FDI0_TX[2]
G18
FDI0_TX[3]
B20
FDI1_TX[0]
C19
FDI1_TX[1]
D19
FDI1_TX[2]
F17
FDI1_TX[3]
J18
FDI0_FSYNC
J17
FDI1_FSYNC
H20
FDI_INT
J19
FDI0_LSYNC
H17
FDI1_LSYNC
A18
eDP_COMPIO
A17
eDP_ICOMPO
B16
eDP_HPD
C15
eDP_AUX
D15
eDP_AUX#
C17
eDP_TX[0]
F16
eDP_TX[1]
C16
eDP_TX[2]
G15
eDP_TX[3]
C18
eDP_TX#[0]
E16
eDP_TX#[1]
D16
eDP_TX#[2]
F15
eDP_TX#[3]
Ivy Bridge_rPGA_2DPC_Rev0p61
Ivy Bridge_rPGA_2DPC_Rev0p61
DMI
DMI
Intel(R) FDI
Intel(R) FDI
eDP
eDP
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PCI EXPRESS* - GRAPHICS
PCI EXPRESS* - GRAPHICS
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
PEG_COMP
J22
J21
H22
K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32
J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32
M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25
M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25
PEG_RX#0
PEG_RX#1
PEG_RX#2
PEG_RX#3
PEG_RX#4
PEG_RX#5
PEG_RX#6
PEG_RX#7
PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
PEG_RX6
PEG_RX7
C_PEG_TX#0
C_PEG_TX#1
C_PEG_TX#2
C_PEG_TX#3
C_PEG_TX#4
C_PEG_TX#5
C_PEG_TX#6
C_PEG_TX#7
C_PEG_TX0
C_PEG_TX1
C_PEG_TX2
C_PEG_TX3
C_PEG_TX4
C_PEG_TX5
C_PEG_TX6
C_PEG_TX7
PEG_COMP connect to PIN H22&J22 W:4mils/S:15mils/L: 500mils.
PEG_COMP connect to PIN J21 W:12mils/S:15mils/L: 500mils.
PEG_RX#[0..7] <14>
SNB_IVB# N.A at SNB EDS #27637 0.7v1
close to VR side
PEG_RX[0..7] <14>
reserved for "boot hang 47" issue
+1.05V_VTT
CPU RESET#
PLTRST#<8,14,26,29,30,33>
2
1
SM_DRAMPWROK Processor Input.
H_SNB_IVB#<7>
TP79TP79
TP77TP77
Placement close to EC.
C33
C33
43P/50V_4
43P/50V_4
C735
C735
0.1U/10V_4
0.1U/10V_4
D8RB500V-40 D8RB500V-40
R191 *0_4/SR191 *0_4/S
R217 43_4R217 43_4
R177 56.2/F_4R177 56.2/F_4
Intel DG.
R448 *0_4/SR448 *0_4/S
C708 *0.1U/10V_4C708 *0.1U/10V_4
R453 *0_4/SR453 *0_4/S
R447 10K_4R447 10K_4
R457 *43_4R457 *43_4
U7
U7
1
VCC5NC
2
IN
4
GND3OUT
*74LVC1G07GW
*74LVC1G07GW
PM_DRAM_PWRGD <6>
PM_DRAM_PWRGD_C
R43
R43
*3K/F_4
*3K/F_4
PM_THRMTRIP#_R
EC_PECI<30>
H_PROCHOT#<30,40>
PM_THRMTRIP#<9,30>
PM_SYNC<6>
H_PWRGOOD<9>
R463 *75/F_4R463 *75/F_4
U26
U26
GND3OUT
IN
*74LVC1G07GW
*74LVC1G07GW
R461 1.5K/F_4R461 1.5K/F_4
+3VS5 +3VS5
CPU_PLTRST# CPU_PLTRST#_RCPU_PLTRST#_R
4
+3VS5
VCC5NC
R35
R35
10K_4
10K_4
PM_DRAM_PWRGD_PU
R40
R40
*0_4
*0_4
R41 *0_4/SR41 *0_4/S
SKTOCC#
TP_CATERR#
H_PECI
H_PROCHOT#_R
PM_SYNC_R
H_PWRGOOD_R
PM_DRAM_PWRGD_R
R460
R460
750/F_4
750/F_4
C44
C44
0.1U/10V_4
0.1U/10V_4
PM_DRAM_PWRGD_C
U22B
C26
PROC_SELECT#
AN34
SKTOCC#
AL33
CATERR#
AN33
PECI
AL32
PROCHOT#
AN32
THERMTRIP#
AM34
PM_SYNC
AP33
UNCOREPWRGOOD
V8
SM_DRAMPW ROK
AR33
RESET#
Ivy Bridge_rPGA_2DPC_Rev0p61
Ivy Bridge_rPGA_2DPC_Rev0p61
+1.5V_CPU
R44
R44
200/F_4
200/F_4
R42 130/F_4R42 130/F_4
R36
R36
3
*39_4
*39_4
2
Q8
*2N7002Q8*2N7002
1
PM_DRAM_PWRGD_R
MAIN_ONG <4,39>
CLK_CPU_BCLKP
A28
BCLK
BCLK#
MISCTHERMALPWR MANAGEMENT
MISCTHERMALPWR MANAGEMENT
CLOCKS
CLOCKS
DDR3
DDR3
JTAG & BPM
JTAG & BPM
DPLL_REF_CLK
DPLL_REF_CLK#
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
MISC
MISC
PRDY#
PREQ#
TRST#
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
CLK_CPU_BCLKN
A27
CLK_DPLL_SSCLKP
A16
CLK_DPLL_SSCLKN
A15
CPU_DRAMRST#
R8
SM_RCOMP_0
AK1
SM_RCOMP_1
A5
SM_RCOMP_2
A4
SM_RCOMP[0] W:20mils/S:20mils/L: 500mils,
SM_RCOMP[1] W:20mils/S:20mils/L: 500mils,
SM_RCOMP[2] W:15mils/S:20mils/L: 500mils,
XDP_PRDY#
AP29
XDP_PREQ#
AP27
XDP_TCLK
AR26
TCK
XDP_TMS
AR27
TMS
XDP_TRST#
AP30
XDP_TDI_R
AR28
TDI
XDP_TDO
AP26
TDO
XDP_DBRST#
AL35
XDP_BPM0
AT28
XDP_BPM1
AR29
XDP_BPM2
AR30
XDP_BPM3
AT30
XDP_BPM4
AP32
XDP_BPM5
AR31
XDP_BPM6
AT31
XDP_BPM7
AR32
R167 140/F_4R167 140/F_4
R393 25.5/F_4R393 25.5/F_4
R392 200/F_4R392 200/F_4
CLK_CPU_BCLKP <8>
CLK_CPU_BCLKN <8>
CLK_DPLL_SSCLKP <8>
CLK_DPLL_SSCLKN <8>
TP40TP40
TP46TP46
TP43TP43
TP44TP44
TP45TP45
TP87TP87
TP41TP41
R445 *1K_4R445 *1K_4
XDP_DBRST# <6>
TP82TP82
TP80TP80
TP83TP83
TP86TP86
TP42TP42
TP84TP84
TP81TP81
TP85TP85
CPU XDP
+3V
DDR3 DRAM RESET
+1.5VSUS
DDR3_DRAMRST#<12,13>
DRAMRST_CNTRL_PCH<8,12,13>
+1.05V_VTT <4,10,30,38,40>
+1.5V_CPU <4>
+3VS5 <6,7,8,9,10,23,33,35,38,39,42,43>
+3V <6,7,8,9,10,12,13,14,18,23,24,25,26,27,28,29,30,31,32,33,39,40,42,43>
R374 1K_4R374 1K_4
R375 1K_4R375 1K_4
CPU_DRAMRST#_R
R378 *0_4/SR378 *0_4/S
R376 *0_4R376 *0_4
3
C563
C563
0.047U/10V_4
0.047U/10V_4
2
Q30
Q30
2N7002
2N7002
FDI disable
(DIS only stuff)
A A
FDI_FSYNC can gang all these 4
signals together and tie them
with only one 1K resistor to GND
(DG V0.5 Ch2.2.9).
DEL
PEG x16 disable (UMA only remove)
PEG_TX[0..7]<14> PEG_TX#[0..7]<14>
C_PEG_TX0
C_PEG_TX1
C_PEG_TX2
C_PEG_TX3
C_PEG_TX4
C_PEG_TX5
C_PEG_TX6
C_PEG_TX7
C596 0.1U/10V_4C596 0.1U/10V_4
C600 0.1U/10V_4C600 0.1U/10V_4
C603 0.1U/10V_4C603 0.1U/10V_4
C607 0.1U/10V_4C607 0.1U/10V_4
C617 0.1U/10V_4C617 0.1U/10V_4
C619 0.1U/10V_4C619 0.1U/10V_4
C623 0.1U/10V_4C623 0.1U/10V_4
C632 0.1U/10V_4C632 0.1U/10V_4
0.22uF AC coupling Caps for PCIE GEN1/2/3 0.22uF AC coupling Caps for PCIE GEN1/2/3
5
PEG_TX0
PEG_TX1
PEG_TX2
PEG_TX3
PEG_TX4
PEG_TX5
PEG_TX6
PEG_TX7
C_PEG_TX#0
C_PEG_TX#1
C_PEG_TX#2
C_PEG_TX#3
C_PEG_TX#4
C_PEG_TX#5
C_PEG_TX#6
C_PEG_TX#7
4
C599 0.1U/10V_4C599 0.1U/10V_4
C602 0.1U/10V_4C602 0.1U/10V_4
C614 0.1U/10V_4C614 0.1U/10V_4
C618 0.1U/10V_4C618 0.1U/10V_4
C622 0.1U/10V_4C622 0.1U/10V_4
C627 0.1U/10V_4C627 0.1U/10V_4
C640 0.1U/10V_4C640 0.1U/10V_4
PEG_TX#0
PEG_TX#1
PEG_TX#2
PEG_TX#3
PEG_TX#4
PEG_TX#5
PEG_TX#6
PEG_TX#7
+1.05V_VTT
+1.05V_VTT
eDP_COMPIO and ICOMPO signals should be shorted
near balls and routed with typical impedance <25 mohms
+1.05V_VTT
PEG_ICOMPI and RCOMPO signals
should be routed within 500 mils typical
impedance = 43 mohms PEG_ICOMPO
signals should be routed within 500 mils
typical impedance = 14.5 mohms
3
DP & PEG Compensation
check
R59 *10K_4R59 *10K_4
R395 24.9/F_4R395 24.9/F_4
R97 24.9/F_4R97 24.9/F_4
INT_eDP_HPD_Q
eDP_COMP
PEG_COMP
Processor pull-up (CPU)
H_PROCHOT#
XDP_TDO
XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TCLK
XDP_TRST#
2
+1.05V_VTT
R176 62_4R176 62_4
R186 51_4R186 51_4
R189 51_4R189 51_4
R462 51_4R462 51_4
R188 *51_4R188 *51_4
R187 51_4R187 51_4
R190 51_4R190 51_4C605 0.1U/10V_4C605 0.1U/10V_4
PROJECT : R33
PROJECT : R33
PROJECT : R33
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
SNB 1/4 (PCIE&DMI&FDI)
SNB 1/4 (PCIE&DMI&FDI)
SNB 1/4 (PCIE&DMI&FDI)
1
1A
1A
2 43Wednesday, August 31, 2011
2 43Wednesday, August 31, 2011
2 43Wednesday, August 31, 2011
1A
5
4
3
2
1
Ivy Bridge Processor (DDR3)
U22C
U22C
D D
M_A_DQ[63:0]<12>
C C
B B
M_A_BS#0<12>
M_A_BS#1<12>
M_A_BS#2<12>
M_A_CAS#<12>
M_A_RAS#<12>
M_A_WE#<12>
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
G10
M10
AG6
AG5
AK6
AK5
AH5
AH6
AK8
AK9
AH8
AH9
AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15
AE10
AF10
AE8
AD9
C5
SA_DQ[0]
D5
SA_DQ[1]
D3
SA_DQ[2]
D2
SA_DQ[3]
D6
SA_DQ[4]
C6
SA_DQ[5]
C2
SA_DQ[6]
C3
SA_DQ[7]
F10
SA_DQ[8]
F8
SA_DQ[9]
SA_DQ[10]
G9
SA_DQ[11]
F9
SA_DQ[12]
F7
SA_DQ[13]
G8
SA_DQ[14]
G7
SA_DQ[15]
K4
SA_DQ[16]
K5
SA_DQ[17]
K1
SA_DQ[18]
J1
SA_DQ[19]
J5
SA_DQ[20]
J4
SA_DQ[21]
J2
SA_DQ[22]
K2
SA_DQ[23]
M8
SA_DQ[24]
N10
SA_DQ[25]
N8
SA_DQ[26]
N7
SA_DQ[27]
SA_DQ[28]
M9
SA_DQ[29]
N9
SA_DQ[30]
M7
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
AJ5
SA_DQ[38]
AJ6
SA_DQ[39]
AJ8
SA_DQ[40]
SA_DQ[41]
AJ9
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
AL9
SA_DQ[46]
AL8
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_BS[1]
V6
SA_BS[2]
SA_CAS#
SA_RAS#
AF9
SA_WE#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_CLK[0]
SA_CLK#[0]
SA_CKE[0]
SA_CLK[1]
SA_CLK#[1]
SA_CKE[1]
SA_CLK[2]
SA_CLK#[2]
SA_CKE[2]
SA_CLK[3]
SA_CLK#[3]
SA_CKE[3]
SA_CS#[0]
SA_CS#[1]
SA_CS#[2]
SA_CS#[3]
SA_ODT[0]
SA_ODT[1]
SA_ODT[2]
SA_ODT[3]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AB6
AA6
V9
AA5
AB5
V10
AB4
AA4
W9
AB3
AA3
W10
AK3
AL3
AG1
AH1
AH3
AG3
AG2
AH2
C4
G6
J3
M6
AL6
AM8
AR12
AM15
D4
F6
K3
N6
AL5
AM9
AR11
AM14
AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_CLKP0 <12>
M_A_CLKN0 <12>
M_A_CKE0 <12>
M_A_CLKP1 <12>
M_A_CLKN1 <12>
M_A_CKE1 <12>
M_A_CS#0 <12>
M_A_CS#1 <12>
M_A_ODT0 <12>
M_A_ODT1 <12>
M_A_DQSN[7:0] <12>
M_A_DQSP[7:0] <12>
M_A_A[15:0] <12>
M_B_DQ[63:0]<13>
M_B_BS#0<13>
M_B_BS#1<13>
M_B_BS#2<13>
M_B_CAS#<13>
M_B_RAS#<13>
M_B_WE#<13>
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
D10
K10
AM5
AM6
AR3
AP3
AN3
AN2
AN1
AP2
AP5
AN9
AT5
AT6
AP6
AN8
AR6
AR5
AR9
AJ11
AT8
AT9
AH11
AR8
AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15
AA9
AA7
AA10
AB8
AB9
J10
C9
A7
C8
A9
A8
D9
D8
G4
F4
F1
G1
G5
F5
F2
G2
J7
J8
K9
J9
K8
K7
M5
N4
N2
N1
M4
N5
M2
M1
R6
U22D
U22D
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CAS#
SB_RAS#
SB_WE#
AE2
SB_CLK[0]
AD2
SB_CLK#[0]
R9
SB_CKE[0]
AE1
SB_CLK[1]
AD1
SB_CLK#[1]
R10
SB_CKE[1]
AB2
SB_CLK[2]
AA2
SB_CLK#[2]
T9
SB_CKE[2]
AA1
SB_CLK[3]
AB1
SB_CLK#[3]
T10
SB_CKE[3]
AD3
SB_CS#[0]
AE3
SB_CS#[1]
AD6
SB_CS#[2]
AE6
SB_CS#[3]
AE4
SB_ODT[0]
AD4
SB_ODT[1]
AD5
SB_ODT[2]
AE5
SB_ODT[3]
M_B_DQSN0
D7
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_DQS[7]
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
F3
K6
N3
AN5
AP9
AK12
AP15
C7
G3
J6
M3
AN6
AP8
AK11
AP14
AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7
M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_CLKP0 <13>
M_B_CLKN0 <13>
M_B_CKE0 <13>
M_B_CLKP1 <13>
M_B_CLKN1 <13>
M_B_CKE1 <13>
M_B_CS#0 <13>
M_B_CS#1 <13>
M_B_ODT0 <13>
M_B_ODT1 <13>
M_B_DQSN[7:0] <13>
M_B_DQSP[7:0] <13>
M_B_A[15:0] <13>
03
Ivy Bridge_rPGA_2DPC_Rev0p61
Ivy Bridge_rPGA_2DPC_Rev0p61
A A
5
4
3
Ivy Bridge_rPGA_2DPC_Rev0p61
Ivy Bridge_rPGA_2DPC_Rev0p61
2
PROJECT : R33
PROJECT : R33
PROJECT : R33
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet
Date: Sheet
Date: Sheet of
SNB 2/4 (DDR3 I/F)
SNB 2/4 (DDR3 I/F)
SNB 2/4 (DDR3 I/F)
1
1A
1A
3 43Wednesday, August 31, 2011
3 43Wednesday, August 31, 2011
3 43Wednesday, August 31, 2011
1A
of
of
5
4
3
2
1
Ivy Bridge Processor (POWER)
POWER
U22F
U22F
IVY: 55A
C637
C637
22U/6.3VS_8
22U/6.3VS_8
C193
C193
22U/6.3VS_8
22U/6.3VS_8
C272
C272
22U/6.3VS_8
22U/6.3VS_8
C639
C639
22U/6.3VS_8
22U/6.3VS_8
C58
C58
22U/6.3VS_8
22U/6.3VS_8
C303
C303
22U/6.3VS_8
22U/6.3VS_8
C179
C179
22U/6.3VS_8
22U/6.3VS_8
C576
C576
22U/6.3VS_8
22U/6.3VS_8
C253
C253
22U/6.3VS_8
22U/6.3VS_8
C695
C695
*10U/6.3V_6S
*10U/6.3V_6S
5
+VCC_CORE
AG35
VCC1
AG34
VCC2
AG33
VCC3
AG32
VCC4
AG31
VCC5
AG30
VCC6
AG29
VCC7
AG28
VCC8
AG27
VCC9
AG26
VCC10
AF35
VCC11
AF34
VCC12
AF33
VCC13
AF32
VCC14
AF31
VCC15
AF30
VCC16
AF29
VCC17
AF28
VCC18
AF27
VCC19
AF26
VCC20
AD35
VCC21
AD34
VCC22
AD33
VCC23
AD32
VCC24
AD31
VCC25
AD30
VCC26
AD29
VCC27
AD28
VCC28
AD27
VCC29
AD26
VCC30
AC35
VCC31
AC34
VCC32
AC33
VCC33
AC32
VCC34
AC31
VCC35
AC30
VCC36
AC29
VCC37
AC28
VCC38
AC27
VCC39
AC26
VCC40
AA35
VCC41
AA34
VCC42
AA33
VCC43
AA32
VCC44
AA31
VCC45
AA30
VCC46
AA29
VCC47
AA28
VCC48
AA27
VCC49
AA26
VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56
Y29
VCC57
Y28
VCC58
Y27
VCC59
Y26
VCC60
V35
VCC61
V34
VCC62
V33
VCC63
V32
VCC64
V31
VCC65
V30
VCC66
V29
VCC67
V28
VCC68
V27
VCC69
V26
VCC70
U35
VCC71
U34
VCC72
U33
VCC73
U32
VCC74
U31
VCC75
U30
VCC76
U29
VCC77
U28
VCC78
U27
VCC79
U26
VCC80
R35
VCC81
R34
VCC82
R33
VCC83
R32
VCC84
R31
VCC85
R30
VCC86
R29
VCC87
R28
VCC88
R27
VCC89
R26
VCC90
P35
VCC91
P34
VCC92
P33
VCC93
P32
VCC94
P31
VCC95
P30
VCC96
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100
Ivy Bridge_rPGA_2DPC_Rev0p61
Ivy Bridge_rPGA_2DPC_Rev0p61
SNB: 55A
C638
C638
D D
22U/6.3VS_8
22U/6.3VS_8
C80
C80
22U/6.3VS_8
22U/6.3VS_8
C664
C664
22U/6.3VS_8
22U/6.3VS_8
C699
C699
22U/6.3VS_8
22U/6.3VS_8
C C
C199
C199
22U/6.3VS_8
22U/6.3VS_8
C160
C160
22U/6.3VS_8
22U/6.3VS_8
C248
C248
22U/6.3VS_8
22U/6.3VS_8
C684
C684
*22U/6.3VS_8
*22U/6.3VS_8
B B
C192
C192
22U/6.3VS_8
22U/6.3VS_8
C573
C573
22U/6.3VS_8
22U/6.3VS_8
22uF_8 x8 Socket TOP cavity
22uF_8 x10 Socket BOT cavity
22uF_8 x8 Socket TOP edge
470uF_7343 x4
A A
C682
C682
10U/6.3VS_6
10U/6.3VS_6
C67
C67
22U/6.3VS_8
22U/6.3VS_8
C196
C196
22U/6.3VS_8
22U/6.3VS_8
C53
C53
22U/6.3VS_8
22U/6.3VS_8
C691
C691
*10U/6.3V_6S
*10U/6.3V_6S
C277
C277
22U/6.3VS_8
22U/6.3VS_8
C233
C233
22U/6.3VS_8
22U/6.3VS_8
C222
C222
*22U/6.3VS_8
*22U/6.3VS_8
C678
C678
10U/6.3VS_6
10U/6.3VS_6
C572
C572
22U/6.3VS_8
22U/6.3VS_8
+1.5V <10,12,33>
+1.8V <7,10,38,43>
+VCCSA <36>
+1.5VSUS <2,10,12,13,37,43>
+1.5V_CPU <2>
+VCC_GFX <41>
+1.05V_VTT <2,10,30,38,40>
+VCC_CORE <41>
POWER
CORE SUPPLY
CORE SUPPLY
PEG AND DDR
PEG AND DDR
VCCIO_SENSE
VSS_SENSE_VCCIO
SENSE LINES SVID
SENSE LINES SVID
VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8
VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24
VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39
VCCIO40
VIDALERT#
VIDSCLK
VIDSOUT
VCC_SENSE
VSS_SENSE
4
SNB: 8.5A
IVY: 8.5A
AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12
E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
J23
AJ29
AJ30
AJ28
AJ35
AJ34
B10
A10
C165
C165
22U/6.3VS_8
22U/6.3VS_8
C271
C271
22U/6.3VS_8
22U/6.3VS_8
C155
C155
*22U/6.3VS_8
*22U/6.3VS_8
C677
C677
*22U/6.3VS_8
*22U/6.3VS_8
C635
C635
22U/6.3VS_8
22U/6.3VS_8
C188
C188
*22U/6.3VS_8
*22U/6.3VS_8
C657
C657
*22U/6.3VS_8
*22U/6.3VS_8
22uF_8 x7 Socket TOP cavity
22uF_8 x5 Socket BOT cavity
22uF_8 x2 Socket TOP cavity (no stuff)
22uF_8 x5 Socket BOT cavity (no stuff)
330uF_7343 x2
H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT
R157 100_4R157 100_4
R160 100_4R160 100_4
VCCP_SENSE
VSSP_SENSE
Trace Route to Power IC area.
VCCP_SENSE
VSSP_SENSE
+1.05V_VTT
C156
C156
22U/6.3VS_8
22U/6.3VS_8
C207
C207
22U/6.3VS_8
22U/6.3VS_8
C227
C227
22U/6.3VS_8
22U/6.3VS_8
C218
C218
*22U/6.3VS_8
*22U/6.3VS_8
5/14 modify
C94
C94
*22U/6.3VS_8
*22U/6.3VS_8
C652
C652
22U/6.3VS_8
22U/6.3VS_8
C645
C645
22U/6.3VS_8
22U/6.3VS_8
+1.05V_VTT
+VCC_CORE
VCC_SENSE <40>
VSS_SENSE <40>
VCCP_SENSE <38>
VSSP_SENSE <38>
R394 10/F_4R394 10/F_4
R390 10/F_4R390 10/F_4
C626
C626
22U/6.3VS_8
22U/6.3VS_8
C184
C184
22U/6.3VS_8
22U/6.3VS_8
C666
C666
22U/6.3VS_8
22U/6.3VS_8
C88
C88
*22U/6.3VS_8
*22U/6.3VS_8
C302
C302
*22U/6.3VS_8
*22U/6.3VS_8
C247
C247
*22U/6.3VS_8
*22U/6.3VS_8
C168
C168
22U/6.3VS_8
22U/6.3VS_8
+1.05V_VTT
22uF_8 x2 Socket TOP cavity
22uF_8 x2 Socket BOT cavity
22uF_8 x4 Socket TOP edge
22uF_8 x4 Socket BOT edge
470uF_7343 x2
+VCC_GFX
+1.8V
SNB: 1.5A
C51
C51
C55
C55
1U/6.3V_4
1U/6.3V_4
10U/6.3V_8
10U/6.3V_8
330uF x1, 10uF_8 x1, 1uF_4 x2
Socket BOT edge.
Layout note: need routing
together and ALERT need
between CLK and DATA.
H_CPU_SVIDCLK
Place PU resistor
close to CPU
H_CPU_SVIDDAT
Place PU resistor close to CPU
H_CPU_SVIDALRT#
3
SNB: 21.5A
C669
C669
22U/6.3V_8
22U/6.3V_8
C305
C305
22U/6.3V_8
22U/6.3V_8
C304
C304
22U/6.3V_8
22U/6.3V_8
C325
C325
22U/6.3V_8
22U/6.3V_8
C668
C668
22U/6.3V_8
22U/6.3V_8
C274
C274
22U/6.3V_8
22U/6.3V_8
C273
C273
22U/6.3V_8
22U/6.3V_8
C324
C324
22U/6.3V_8
22U/6.3V_8
C670
C670
22U/6.3V_8
22U/6.3V_8
C249
C249
22U/6.3V_8
22U/6.3V_8
C250
C250
22U/6.3V_8
22U/6.3V_8
C671
C671
22U/6.3V_8
22U/6.3V_8
C50
C50
1U/6.3V_4
1U/6.3V_4
+1.05V_VTT +1.05V_VTT
C352 0.1U/10V_4C352 0.1U/10V_4
+1.05V_VTT
12
+
C65
+
C65
*330u_2.5V_3528
*330u_2.5V_3528
R172
R172
130/F_4
130/F_4
R170 75/F_4R170 75/F_4
R171 43_4R171 43_4
U22G
U22G
AT24
VAXG1
AT23
VAXG2
AT21
VAXG3
AT20
VAXG4
AT18
VAXG5
AT17
VAXG6
AR24
VAXG7
AR23
VAXG8
AR21
VAXG9
AR20
VAXG10
AR18
VAXG11
AR17
VAXG12
AP24
VAXG13
AP23
VAXG14
AP21
VAXG15
AP20
VAXG16
AP18
VAXG17
AP17
VAXG18
AN24
VAXG19
AN23
VAXG20
AN21
VAXG21
AN20
VAXG22
AN18
VAXG23
AN17
VAXG24
AM24
VAXG25
AM23
VAXG26
AM21
VAXG27
AM20
VAXG28
AM18
VAXG29
AM17
VAXG30
AL24
VAXG31
AL23
VAXG32
AL21
VAXG33
AL20
VAXG34
AL18
VAXG35
AL17
VAXG36
AK24
VAXG37
AK23
VAXG38
AK21
VAXG39
AK20
VAXG40
AK18
VAXG41
AK17
VAXG42
AJ24
VAXG43
AJ23
VAXG44
AJ21
VAXG45
AJ20
VAXG46
AJ18
VAXG47
AJ17
VAXG48
AH24
VAXG49
AH23
VAXG50
AH21
VAXG51
AH20
VAXG52
AH18
VAXG53
AH17
VAXG54
B6
VCCPLL1
A6
VCCPLL2
A2
VCCPLL3
Ivy Bridge_rPGA_2DPC_Rev0p61
Ivy Bridge_rPGA_2DPC_Rev0p61
Place PU resistor
R175
R175
close to VR
*130/F_4
*130/F_4
POWER
POWER
SENSE
SENSE
GRAPHICS
GRAPHICS
1.8V RAIL
1.8V RAIL
SVID CLK
VR_SVID_CLK <40>
SVID DATA
VR_SVID_DATA <40>
SVID ALERT
VR_SVID_ALERT# <40>
2
SM_VREF
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8
VCCIO_SEL
AK35
AK34
AL1
B4
D1
R391
R391
*1K_4
*1K_4
AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1
M27
M26
L26
J26
J25
J24
H26
H25
VCCUSA_SENSE_R
H23
VCCSA_SEL0
C22
VCCSA_SEL
C24
VTTVID1
A19
R50 *0_8/SR50 *0_8/S
Q10
Q10
AON7410
AON7410
5 2
MAIND
NB5
NB5
NB5
VAXG_SENSE
VSSAXG_SENSE
LINES
LINES
SA_DIMM_VREFDQ
VREFMISC
VREFMISC
SB_DIMM_VREFDQ
DDR3 -1.5V RAILS
DDR3 -1.5V RAILS
SA RAIL
SA RAIL
VCCSA_SENSE
VCCSA_VID[0]
VCCSA_VID[1]
+1.5V_CPU +1.5V
R162 100/F_4R162 100/F_4
R166 100/F_4R166 100/F_4
+VDDR_REF_CPU
1
R192
R192
100K_4
100K_4
R386
R386
*1K_4
*1K_4
C320
C320
10U/6.3V_6
10U/6.3V_6
C209
C209
10U/6.3V_6
10U/6.3V_6
330uF x1, 10uF_8 x6 Socket BOT edge.
C625
C625
10U/6.3V_8
10U/6.3V_8
330uF x1, 10uF_8 x1 Socket BOT edge,
10uF_8 x2 Socket BOT cavity.
R85 *0_4/SR85 *0_4/S
R71 10K_4R71 10K_4
R73 10K_4R73 10K_4
R389 0_4R389 0_4
40mile routing
+1.5V_CPU+1.5VSUS
1
3
4
C54
C54
*470P/50V_4
*470P/50V_4
PROJECT : R33
PROJECT : R33
PROJECT : R33
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
SNB 3/4 (POWER)
SNB 3/4 (POWER)
SNB 3/4 (POWER)
+VCC_GFX
VCC_AXG_SENSE <40>
VSS_AXG_SENSE <40>
CAD Note: +VDDR_REF_CPU should
have 10 mil trace width
3
Q18
Q18
2N7002
2N7002
2
MAIND
SNB: 5A
C226
C226
10U/6.3V_8
10U/6.3V_8
+
+
C341
C341
10U/6.3V_6
10U/6.3V_6
SNB: 6A
C579
C579
10U/6.3V_8
10U/6.3V_8
R229
R229
220_8
220_8
3
Placement close to CPU.
2
Q22
Q22
2N7002
2N7002
1
1
04
DDR_VTTREF <12,13,37>
MAIND <39>
SMDDR_VREF_DQ0_M3 <12>
SMDDR_VREF_DQ1_M3 <13>
+1.5V_CPU
C310
C310
C275
C275
10U/6.3V_6
10U/6.3V_6
10U/6.3V_6
10U/6.3V_6
12
C737
C737
*330U_2.5V_5.0x5.9_ESR10m
*330U_2.5V_5.0x5.9_ESR10m
+VCCSA
C571
C571
C630
C630
*10U/6.3V_8
*10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
VCCUSA_SENSE <36>
VCCSA_SEL0 <36>
VCCSA_SEL <36>
H_VTTVID1 <38>
+1.5VSUS
C582 0.1U/10V_4C582 0.1U/10V_4
C580 0.1U/10V_4C580 0.1U/10V_4
C574 0.1U/10V_4C574 0.1U/10V_4
C577 0.1U/10V_4C577 0.1U/10V_4
MAIN_ONG <2,39>
CPU VDDQ
4 43Wednesday, August 31, 2011
4 43Wednesday, August 31, 2011
4 43Wednesday, August 31, 2011
1A
1A
1A
5
4
3
2
1
Ivy Bridge Processor (GND)
U22H
U22H
AT35
VSS1
AT32
VSS2
AT29
VSS3
AT27
VSS4
AT25
VSS5
AT22
VSS6
AT19
D D
C C
B B
AT16
AT13
AT10
AR25
AR22
AR19
AR16
AR13
AR10
AR7
AR4
AR2
AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10
AP7
AP4
AP1
AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10
AN7
AN4
AM29
AM25
AM22
AM19
AM16
AM13
AM10
AM7
AM4
AM3
AM2
AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10
AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10
AK7
AK4
AJ25
VSS7
VSS8
VSS9
VSS10
AT7
VSS11
AT4
VSS12
AT3
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
AL7
VSS66
AL4
VSS67
AL2
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS
VSS
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2
M34
H33
H30
H27
H24
H21
H18
H15
H13
H10
G35
G32
G29
G26
G23
G20
G17
G11
U22I
U22I
T35
VSS161
T34
VSS162
T33
VSS163
T32
VSS164
T31
VSS165
T30
VSS166
T29
VSS167
T28
VSS168
T27
VSS169
T26
VSS170
P9
VSS171
P8
VSS172
P6
VSS173
P5
VSS174
P3
VSS175
P2
VSS176
N35
VSS177
N34
VSS178
N33
VSS179
N32
VSS180
N31
VSS181
N30
VSS182
N29
VSS183
N28
VSS184
N27
VSS185
N26
VSS186
VSS187
L33
VSS188
L30
VSS189
L27
VSS190
L9
VSS191
L8
VSS192
L6
VSS193
L5
VSS194
L4
VSS195
L3
VSS196
L2
VSS197
L1
VSS198
K35
VSS199
K32
VSS200
K29
VSS201
K26
VSS202
J34
VSS203
J31
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
H9
VSS214
H8
VSS215
H7
VSS216
H6
VSS217
H5
VSS218
H4
VSS219
H3
VSS220
H2
VSS221
H1
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
F34
VSS231
F31
VSS232
F29
VSS233
VSS
VSS
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3
TP36TP36
TP34TP34
Ivy Bridge Processor (RESERVED, CFG)
U22E
U22E
For CPU debug.
TP39TP39
TP37TP37
TP38TP38
INTEL DG
TP32TP32
TP33TP33
CFG0
CFG2
CFG4
CFG5
CFG6
CFG7CFG7
R168 *0_4R168 *0_4
R161 *0_4R161 *0_4
AK28
CFG[0]
AK29
CFG[1]
AL26
CFG[2]
AL27
CFG[3]
AK26
CFG[4]
AL29
CFG[5]
AL30
CFG[6]
AM31
CFG[7]
AM32
CFG[8]
AM30
CFG[9]
AM28
CFG[10]
AM26
CFG[11]
AN28
CFG[12]
AN31
CFG[13]
AN26
CFG[14]
AM27
CFG[15]
AK31
CFG[16]
AN29
CFG[17]
AJ31
VAXG_VAL_SENSE
AH31
VSSAXG_VAL_SENSE
AJ33
VCC_VAL_SENSE
AH33
VSS_VAL_SENSE
AJ26
RSVD5
F25
RSVD8
F24
RSVD9
F23
RSVD10
D24
RSVD11
G25
RSVD12
G24
RSVD13
E23
RSVD14
D23
RSVD15
C30
RSVD16
A31
RSVD17
B30
RSVD18
B29
RSVD19
D30
RSVD20
B31
RSVD21
A30
RSVD22
C29
RSVD23
J20
RSVD24
B18
RSVD25
J15
RSVD27
Ivy Bridge_rPGA_2DPC_Rev0p61
Ivy Bridge_rPGA_2DPC_Rev0p61
VCC_DIE_SENSE
VSS_DIE_SENSE
CFG
CFG
RESERVED
RESERVED
AH27
AH26
L7
RSVD28
AG7
RSVD29
AE7
RSVD30
AK2
RSVD31
W8
RSVD32
AT26
RSVD33
AM33
RSVD34
AJ27
RSVD35
T8
RSVD37
J16
RSVD38
H16
RSVD39
G16
RSVD40
AR35
RSVD41
AT34
RSVD42
AT33
RSVD43
AP35
RSVD44
AR34
RSVD45
B34
RSVD46
A33
RSVD47
A34
RSVD48
B35
RSVD49
C35
RSVD50
AJ32
RSVD51
AK32
RSVD52
AN35
BCLK_ITP
AM35
BCLK_ITP#
AT2
RSVD56
AT1
RSVD57
AR1
RSVD58
B1
KEY
For rPGA socket, RSVD59 pin should be left NC.
VCC_DIE_SENSE
VSS_DIE_SENSE
TP35TP35
TP31TP31
R158
R158
*0_4
*0_4
For Sandy Bridge R122 stuff
For Ivy Bridge R122 no stuff
TP78TP78
TP76TP76
05
Ivy Bridge_rPGA_2DPC_Rev0p61
Ivy Bridge_rPGA_2DPC_Rev0p61
Processor Strapping
The CFG signals have a default value of '1' if not terminated on the board.
1 0
A A
CFG2
(PEG Static Lane Reversal)
CFG4
(DP Presence Strap)
CFG7
(PEG Defer Training)
5
Normal Operation Lane Reversed
Disable; No physical DP attached to eDP
PEG train immediately following
xxRESETB de assertion
4
Ivy Bridge_rPGA_2DPC_Rev0p61
Ivy Bridge_rPGA_2DPC_Rev0p61
Enable; An ext DP device is connected to eDP
PEG wait for BIOS training
CFG[6:5] (PCIE Port Bifurcation Straps)
11: (Default) x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
CFG2
R184 *1K_4R184 *1K_4
CFG4
R185 *1K_4R185 *1K_4
CFG7
R181 *1K_4R181 *1K_4
CFG5
R183 1K_4R183 1K_4
CFG6
R179 1K_4R179 1K_4
3
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
PROJECT : R33
PROJECT : R33
PROJECT : R33
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet
Date: Sheet
2
Date: Sheet of
SNB 4/4 (GND)
SNB 4/4 (GND)
SNB 4/4 (GND)
1
1A
1A
5 43Wednesday, August 31, 2011
5 43Wednesday, August 31, 2011
5 43Wednesday, August 31, 2011
1A
of
of
5
4
3
2
1
Cougar Point/Panther Point (DMI,FDI,PM)
U32C
U32C
DMI_RXN0<2>
DMI_RXN1<2>
DMI_RXN2<2>
DMI_RXN3<2>
DMI_RXP0<2>
+1.05V
SYS_PWROK
EC_PWROK_R
DMI_RXP1<2>
DMI_RXP2<2>
DMI_RXP3<2>
DMI_TXN0<2>
DMI_TXN1<2>
DMI_TXN2<2>
DMI_TXN3<2>
DMI_TXP0<2>
DMI_TXP1<2>
DMI_TXP2<2>
DMI_TXP3<2>
R567 49.9/F_4R567 49.9/F_4
R557 750/F_4R557 750/F_4
R540 *0_4/SR540 *0_4/S
R485 *0_4/SR485 *0_4/S
R478 *0_4/SR478 *0_4/S
R265 *0_4/SR265 *0_4/S
R514 *0_4/SR514 *0_4/S
R560 *0_4/SR560 *0_4/S
R566 *0_4R566 *0_4
C488
C488
*0.1U/10V_4
*0.1U/10V_4
DMI_COMP
DMI_RBIAS
SUSACK#_RSUS_PWR_ACK_R
XDP_DBRST#
SYS_PWROK_R
EC_PWROK_R
APWROK_R
PM_DRAM_PWRGD
RSMRST#
SUS_PWR_ACK_R
DNBSWON#_R
AC_PRESENT_R
PM_BATLOW#
PM_RI#
D D
C C
B B
XDP_DBRST#<2>
EC_PWROK<18,30>
PM_DRAM_PWRGD<2>
RSMRST#<30>
SUS_PWR_ACK<30>
DNBSWON#<30>
AC_PRESENT<30>
SYS_PWROK_R
BC24
DMI0RXN
BE20
DMI1RXN
BG18
DMI2RXN
BG20
DMI3RXN
BE24
DMI0RXP
BC20
DMI1RXP
BJ18
DMI2RXP
BJ20
DMI3RXP
AW24
DMI0TXN
AW20
DMI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
(+3VS5)
K16
SUSWARN#/SUSPWRDNACK/GPIO30
E20
PWRBTN#
(DSW)
H20
ACPRESENT / GPIO31
(+3VS5)
E10
BATLOW# / GPIO72
A10
RI#
CPT_PPT_Rev_0p5
CPT_PPT_Rev_0p5
DMI
FDI
DMI
FDI
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
System Power Management
System Power Management
SLP_LAN# / GPIO29
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVRMEN
Reserve for power on sequence
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
FDI_INT
DPWROK
WAKE#
(+3V)
(+3VS5)
(+3VS5)
(+3VS5)
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
PMSYNCH
(+3VS5)
BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9
BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9
AW16
AV12
BC10
AV14
BB10
A18
E22
B9
N3
G8
N14
D10
H4
F4
G10
G16
AP14
K14
DSWVREN
R562 *0_4/SR562 *0_4/S
PCIE_WAKE#
CLKRUN#
PCH_SUSCLK_L
R253 *0_4/SR253 *0_4/S
R538 *0_4/SR538 *0_4/S
TP56TP56
TP61TP61
SLP_LAN#
FDI_TXN0 <2>
FDI_TXN1 <2>
FDI_TXN2 <2>
FDI_TXN3 <2>
FDI_TXN4 <2>
FDI_TXN5 <2>
FDI_TXN6 <2>
FDI_TXN7 <2>
FDI_TXP0 <2>
FDI_TXP1 <2>
FDI_TXP2 <2>
FDI_TXP3 <2>
FDI_TXP4 <2>
FDI_TXP5 <2>
FDI_TXP6 <2>
FDI_TXP7 <2>
FDI_INT <2>
FDI_FSYNC0 <2>
FDI_FSYNC1 <2>
FDI_LSYNC0 <2>
FDI_LSYNC1 <2>
TP95TP95
TP99TP99
RSMRST#
PCIE_WAKE# <29,33>
CLKRUN# <30>
TP57TP57
R304 *0_4/SR304 *0_4/S
SLP_S5 <30>
SUSC# <30>
SUSB# <30>
PM_SYNC <2>
+3V
PD Res place close to PCH
PCH to Res routeing 37.5 ohm Impedance.
Res to connector filter routeing 50ohm Impedance.
PCH_SUSCLK <30>
TP62TP62
CRT_B<24>
CRT_G<24>
CRT_R<24>
DDCCLK<24>
DDCDATA<24>
HSYNC_COM<24>
VSYNC_COM<24>
Reserve from EMI request
CRT_B
CRT_G
C533
C533
C531
C531
*5.6P/16V_4
*5.6P/16V_4
*5.6P/16V_4
*5.6P/16V_4
Cougar Point/Panther Point (LVDS,DDI)
U32D
U32D
DAC_IREF
J47
M45
P45
T40
K47
T45
P39
AF37
AF36
AE48
AE47
AK39
AK40
AN48
AM47
AK47
AJ48
AN47
AM49
AK49
AJ47
AF40
AF39
AH45
AH47
AF49
AF45
AH43
AH49
AF47
AF43
N48
P49
T49
T39
M40
M47
M49
T43
T42
CPT_PPT_Rev_0p5
CPT_PPT_Rev_0p5
L_BKLTEN
L_VDD_EN
L_BKLTCTL
L_DDC_CLK
L_DDC_DATA
L_CTRL_CLK
L_CTRL_DATA
LVD_IBG
LVD_VBG
LVD_VREFH
LVD_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
CRT_BLUE
CRT_GREEN
CRT_RED
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_VSYNC
DAC_IREF
CRT_IRTN
LVDS
LVDS
CRT
CRT
+3V_RTC <7,10>
+1.05V <7,8,10,36>
+3VPCU <7,23,30,31,34,35>
+3VS5 <2,7,8,9,10,23,33,35,38,39,42,43>
+3V <2,7,8,9,10,12,13,14,18,23,24,25,26,27,28,29,30,31,32,33,39,40,42,43>
+5V <7,10,18,24,25,27,31,32,33,39>
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA
Digital Display Interface
Digital Display Interface
DDPD_CTRLCLK
DDPD_CTRLDATA
SDVO_STALLN
SDVO_STALLP
DDPB_AUXN
DDPB_AUXP
DDPC_AUXN
DDPC_AUXP
DDPD_AUXN
DDPD_AUXP
CRT_R
C532
C532
*5.6P/16V_4
*5.6P/16V_4
LVDS_BLON<23>
DISP_ON<23>
DPST_PWM<23>
EDIDCLK<23>
EDIDDATA<23>
R331 2.2K_4R331 2.2K_4
R330 2.2K_4R330 2.2K_4
R329 2.37K/F_4R329 2.37K/F_4
TP65TP65
TXLCLKOUT-<23>
TXLCLKOUT+<23>
TXLOUT0-<23>
TXLOUT1-<23>
TXLOUT2-<23>
TXLOUT0+<23>
TXLOUT1+<23>
TXLOUT2+<23>
TXUCLKOUT-<23>
TXUCLKOUT+<23>
TXUOUT0-<23>
TXUOUT1-<23>
TXUOUT2-<23>
TXUOUT0+<23>
TXUOUT1+<23>
TXUOUT2+<23>
R354 33_4R354 33_4
R352 33_4R352 33_4
R335 1K/F_4R335 1K/F_4
L_CTRL_CLK
L_CTRL_DATA
LVDS_IBG
LVDS_VBG
R340 150/F_4R340 150/F_4
R342 150/F_4R342 150/F_4
R341 150/F_4R341 150/F_4
PCH_HSYNC_R
PCH_VSYNC_R
SDVO_INTN
SDVO_INTP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
AP43
AP45
AM42
AM40
AP39
AP40
P38
M39
AT49
AT47
AT40
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
P46
P42
AP47
AP49
AT38
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
M43
M36
AT45
AT43
BH41
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
SDVO_CLK <25>
SDVO_DATA <25>
DPB_HPD_Q
DPB_LANE0_N
DPB_LANE0_P
DPB_LANE1_N
DPB_LANE1_P
DPB_LANE2_N
DPB_LANE2_P
DPB_LANE3_N
DPB_LANE3_P
06
INT. HDMI
PCH Pull-high/low(CLG)
PM_RI#
PM_BATLOW#
PCIE_WAKE#
SLP_LAN#
SUS_PWR_ACK
AC_PRESENT_R
A A
CLKRUN#
XDP_DBRST#
RSMRST#
SYS_PWROK
R496 10K_4R496 10K_4
R494 8.2K_4R494 8.2K_4
R528 10K_4R528 10K_4
R314 *10K_4R314 *10K_4
R497 *10K_4R497 *10K_4
R561 10K_4R561 10K_4
R535 8.2K_4R535 8.2K_4
R507 1K_4R507 1K_4
R530 *1K_4R530 *1K_4
R565 10K_4R565 10K_4
R486 *10K_4R486 *10K_4
+3VS5
INTEL DG
+3V
INTEL DG
5
INT HDMI disable (DIS only remove)
DPB_LANE0_N
DPB_LANE0_P
DPB_LANE1_N
DPB_LANE1_P
DPB_LANE2_N
DPB_LANE2_P
DPB_LANE3_N
DPB_LANE3_P
INT HDMI Detect Function
DPB_HPD_Q
R600 *0_4/SR600 *0_4/S
4
IN_D2# <25>
IN_D2 <25>
IN_D1# <25>
IN_D1 <25>
IN_D0# <25>
IN_D0 <25>
IN_CLK# <25>
IN_CLK <25>
HDMI_HPD_CON <25>
System PWR_OK(CLG)
R483 *0_4/SR483 *0_4/S
SYS_PWROK
3
4
U29
U29
*TC7SH08FU
*TC7SH08FU
R484 *0_4R484 *0_4
+3VS5
3 5
IMVP_PWRGD
C796 *0.1U/10V_4C796 *0.1U/10V_4
2
EC_PWROK
1
R482
R482
100K_4
100K_4
IMVP_PWRGD <40>
2
DPWROK FOR DSW
Remove DSW power rail
R559 330K_4R559 330K_4
+3V_RTC
On Die DSW VR Enable
High = Enable (Default)
Low = Disable
PROJECT : R33
PROJECT : R33
PROJECT : R33
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
DSWVREN
R558 *330K_4R558 *330K_4
PCH 1/6 (DMI/FDI/VIDEO)
PCH 1/6 (DMI/FDI/VIDEO)
PCH 1/6 (DMI/FDI/VIDEO)
1
1A
1A
6 43Wednesday, August 31, 2011
6 43Wednesday, August 31, 2011
6 43Wednesday, August 31, 2011
1A
5
TP97TP97
TP98TP98
TP63TP63
R311 1M_4R311 1M_4
D D
+3V_RTC
TP96TP96
Reserve for EMI
C529
C529
*10P/50V_4
*10P/50V_4
SIO_EXT_SCI#<30>
C C
PCH_SPI_CS1_R#<30>
B B
PCH Strap Table
ACZ_SPKR<27>
ACZ_SDIN0<27>
TP64TP64
R332 10K_4R332 10K_4
+3VS5
SIO_EXT_SCI#
TP92TP92
TP50TP50
TP49TP49
TP88TP88
+3VPCU
R533
R533
*10K_4
*10K_4
R516 0_4R516 0_4
Pin Name Strap description Sampled Configuration
SPKR
Different from
Calpella
GNT3# / GPIO55 Top-Block Swap Override
Cougar Point/Panther Point (HDA,JTAG,SATA)
RTC_X1
RTC_X2
RTC_RST#
SRTC_RST#
SM_INTRUDER#
PCH_INVRMEN
ACZ_BCLK
ACZ_SYNC
ACZ_SPKR
ACZ_RST#
ACZ_SDOUT
GPIO33
PCH_JTAG_TCK_R
PCH_JTAG_TMS
PCH_JTAG_TDI_R
PCH_JTAG_TDO_R
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_CS1#
PCH_SPI_SI
PCH_SPI_SO
U32A
U32A
A20
RTCX1
C20
RTCX2
D20
RTCRST#
G22
SRTCRST#
K22
INTRUDER#
C17
INTVRMEN
N34
HDA_BCLK
L34
HDA_SYNC
T10
SPKR
K34
HDA_RST#
E34
HDA_SDIN0
G34
HDA_SDIN1
C34
HDA_SDIN2
A34
HDA_SDIN3
A36
HDA_SDO
(+3V)
C36
HDA_DOCK_EN# / GPIO33
(+3VS5)
N32
HDA_DOCK_RST# / GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK
Y14
SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
CPT_PPT_Rev_0p5
CPT_PPT_Rev_0p5
JTAG
JTAG
No reboot mode setting PWROK
PWROK
INTVRMEN Integrated 1.05V VRM enable ALWAYS
HDA_DOCK_EN#/GPIO33
GNT1# / GPIO51
GPIO19
Different from
Calpella
GNT2# / GPIO53
NV_ALE
NV_CLE
A A
HDA_SYNC On-Die PLL VR Voltage Select RSMRST
Flash Descriptor Security
Only for Interposer
Boot BIOS Selection 1 [bit-1]
Boot BIOS Selection 0 [bit-0]
ESI strap (Server only)
Intel Anti-Theft HDD protection
Only for Interposer
DMI Termination voltage weak pull-down 20kohm
PWROK
PWROK
PWROK
PWROK
PWROK 0 = Disable (Internal pull-down 20kohm)
PWROK
HDA_SDO PWROKFlash Descriptor Security
GPIO8
GPIO28
Different from
Calpella
Integrated Clock Chip Enable Should be pull-down (weak pull-up 20K)RSMRST#
On-die PLL Voltage Regulator RSMRST#
SPI_MOSI iTPM function Disable APWROK
5
4
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
LPC
LPC
FWH4 / LFRAME#
LDRQ0#
LDRQ1# / GPIO23
RTCIHDA
RTCIHDA
SPI
SPI
(+3V)
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA 6G
SATA 6G
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA
SATA
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3RCOMPO
SATA3COMPI
SATA3RBIAS
SATALED#
(+3V)
SATA0GP / GPIO21
(+3V)
SATA1GP / GPIO19
0 = Default (weak pull-down 20K)
1 = Setting to No-Reboot mode
0 = "top-block swap" mode
1 = Default (weak pull-up 20K)
Should be always pull-up
0 = Override
1 = Default (weak pull-up 20K)
GNT0#GNT1#
11
00
Should not be pull-down
(weak pull-up 20K)
0 = Support by 1.8V (weak pull-down)
1 = Support by 1.5V
0 = Default (weak pull-down 20K)
1 = Overridden
0 = Disable
1 = Enable (Default)
0 = Default (weak pull-down 20K)
1 = Enable
4
C38
A38
B37
C37
D36
PCH_DRQ#0
E36
PCH_DRQ#1
K36
SERIRQ
V5
AM3
AM1
AP7
AP5
AM10
AM8
AP11
AP10
AD7
AD5
AH5
AH4
DG recommended that AC coupling capacitors should be
AB8
close to the connector (<100 mils) for optimal signal quality.
AB10
AF3
AF1
Y7
Y5
AD3
AD1
Y3
Y1
AB3
AB1
Y11
SATA_COMP
Y10
AB12
SATA3_COMP
AB13
SATA3_RBIAS
AH1
P3
DGT_STOP#
V14
BBS_BIT0
P1
Boot Location
SPI
LPC
LAD0 <30,33>
LAD1 <30,33>
LAD2 <30,33>
LAD3 <30,33>
LFRAME# <30,33>
TP67TP67
TP66TP66
R291 8.2K_4R291 8.2K_4
R299 37.4/F_4R299 37.4/F_4
R301 49.9/F_4R301 49.9/F_4
R521 750/F_4R521 750/F_4
R517 10K_4R517 10K_4
R277 *10K_4R277 *10K_4
R505 *10K_4R505 *10K_4
ACZ_SPKR
R584 *1K_4R584 *1K_4
R595 10K_4R595 10K_4
+3V
PCH_INVRMEN
GPIO33
[Need external pull-down for LPC BIOS]
Default weak pull-up on GNT0/1#
USE GPIO PIN
+1.8V
R526 2.2K_4R526 2.2K_4
+1.8V
+3VS5
GPIO33_E<30>
PCH_SPI_SI
+3V
SERIRQ <30>
SATA_RXN0 <32>
SATA_RXP0 <32>
SATA_TXN0 <32>
SATA_TXP0 <32>
SATA_RXN4 <32>
SATA_RXP4 <32>
SATA_TXN4 <32>
SATA_TXP4 <32>
+1.05V
SATA_LED# <28>
+3V
+3V
+3V
Circuit
R500 *1K_4R500 *1K_4
R563 330K_4R563 330K_4
R572 0_4R572 0_4
1 2
R534 *1K_4R534 *1K_4
R585 *1K_4R585 *1K_4
R547 *1K_4R547 *1K_4
R334 1K_4R334 1K_4
ACZ_SDOUT
R492 *1K_4R492 *1K_4
R292 1K_4R292 1K_4
3
PCI_GNT3# <8>
R546 1K_4R546 1K_4
3
+1.8V <4,10,38,43>
+1.05V <6,8,10,36>
+3V_RTC <6,10>
+3VPCU <23,30,31,34,35>
+3V <2,6,8,9,10,12,13,14,18,23,24,25,26,27,28,29,30,31,32,33,39,40,42,43>
+V3.3A_1.5A_HDA_IO <10>
+5V <10,18,24,25,27,31,32,33,39>
HDD0 (SATA3 6.0Gb/s)
ODD (SATA1 1.5Gb/s)
BIT_CLK_AUDIO
EMI
C528
C528
*33P/50V_4
*33P/50V_4
ACZ_SDOUT_AUDIO<27>
ACZ_SYNC_AUDIO<27>
Add for Intel leakage issue
+3V
+3V_RTC
BIOS_WP#
BBS_BIT0
BBS_BIT1 <8>
NV_ALE <8>
ACZ_SYNC
R573 *1K_4R573 *1K_4
PLL_ODVR_EN <9>
+3V
NV_CLE <9>
H_SNB_IVB# <2>
+V3.3A_1.5A_HDA_IO
PCH_SPI_CS0_R#<30>
PCH_SPI_CLK_R<30>
PCH_SPI_SI_R<30>
PCH_SPI_SO_R<30>
sandy/Ivy bridge
2
RTC Circuitry(RTC)
R623 *0_6/SR623 *0_6/S
+3VPCU
+3V_RTC_0
R622 1K_4R622 1K_4
12
CN26
CN26
BAT_CONN
BAT_CONN
DFWF02MS022
DFWF02MS022
50273-0027N-001-2P-L
50273-0027N-001-2P-L
RTC Power trace width 20mils.
HDA Bus(CLG)
R594 33_4R594 33_4
PCH_SPI_CS0#
R337 33_4R337 33_4
R336 33_4R336 33_4
R575 33_4R575 33_4
1
R579
R579
1M_4
1M_4
PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_SO
C795
C795
*22P/50V_4
*22P/50V_4
R524 3.3K_4R524 3.3K_4
+3V
Vender
EON
Socket
TP91TP91
BIT_CLK_AUDIO<27>
ACZ_RST#_AUDIO<27>
+5V
2
R590 10K_4R590 10K_4
R498 *0_4R498 *0_4
R548 0_4R548 0_4
R554 0_4R554 0_4
R490 0_4R490 0_4
RTC Clock 32.768KHz
C802 18P/50V_4C802 18P/50V_4
C803 18P/50V_4C803 18P/50V_4
+3V_RTC_2
+3V_RTC_1
D20
D20
BAT54C
BAT54C
30mils
+3V_RTC
R616 20K/F_4R616 20K/F_4
R615 20K/F_4R615 20K/F_4
C869
C869
1U/6.3V_4
1U/6.3V_4
23
Y8
Y8
32.768KHZ
32.768KHZ
4 1
PCH JTAG Debug(CLG)
ACZ_BCLK
ACZ_RST#
2
Q44
Q44
2N7002K
2N7002K
TP89TP89
TP94TP94
C797
C797
*22P/50V_4
*22P/50V_4
NB5
NB5
NB5
ACZ_SDOUT
ACZ_SYNC
3
TP48TP48
BIOS_WP#
TP90TP90
Size
4MB
4MB
R285
R285
*210/F_4
*210/F_4
R286
R286
*100/F_4
*100/F_4
R555 0_4R555 0_4
R551 0_4R551 0_4
R525 0_4R525 0_4
1
6
5
2
3
P/N
AKE39ZN0Q02 (EN25Q32B-104HIP)
AKE39FP0Z02 (MX25L3206EM2I-12G)Max
DFHS08FS023
PROJECT : R33
PROJECT : R33
PROJECT : R33
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet of
PCH 2/6 (SATA/HDA/SPI)
PCH 2/6 (SATA/HDA/SPI)
PCH 2/6 (SATA/HDA/SPI)
1
07
RTC_X1
R564
R564
10M_4
10M_4
RTC_X2
RTC_RST#
12
C865
C865
1U/6.3V_4
1U/6.3V_4
C860
C860
1U/6.3V_4
1U/6.3V_4
R305 *0_6R305 *0_6
+3VS5
R255
R255
*210/F_4
*210/F_4
R279
R279
*100/F_4
*100/F_4
PCH SPI ROM(CLG)
U31
U31
CE#
SCK
SI
SO
HOLD#
WP#
EN25Q32B-104HIP
EN25Q32B-104HIP
1
VDD
VSS
J6
J6
*SOLDERJUMPER-2
*SOLDERJUMPER-2
SRTC_RST#
12
J5
J5
*SOLDERJUMPER-2
*SOLDERJUMPER-2
SRTC_RST#RTC_RST#
R493
R493
*210/F_4
*210/F_4
PCH_JTAG_TMS
PCH_JTAG_TDI_R
PCH_JTAG_TDO_R
PCH_JTAG_TCK_R
R510
R510
R537
R537
*51_4
*51_4
*100/F_4
*100/F_4
8
R553 3.3K_4R553 3.3K_4
7
4
0.1U/10V_4
0.1U/10V_4
7 43Wednesday, August 31, 2011
7 43Wednesday, August 31, 2011
7 43Wednesday, August 31, 2011
C798
C798
of
of
+3V
1A
1A
1A
5
Cougar Point/Panther Point (PCI,USB,NVRAM) Cougar Point/Panther Point(PCI-E,SMBUS,CLK)
PCI/USBOC# Pull-up(CLG)
PCI_PIRQA#
R349 8.2K_4R349 8.2K_4
PCI_PIRQB#
R339 8.2K_4R339 8.2K_4
PCI_PIRQC#
R338 8.2K_4R338 8.2K_4
PCI_PIRQD#
R348 8.2K_4R348 8.2K_4
+3V
RP9
CLK_33M_DEBUG<33>
+3VS5
USB30_RX1-<28>
USB30_RX2-<28>
USB30_RX1+<28>
USB30_RX2+<28>
USB30_TX1-<28>
USB30_TX2-<28>
USB30_TX1+<28>
USB30_TX2+<28>
BT_COMBO_EN#<33>
BOARD_ID3<9>
ACCEL_INTH#<33>
CLK_33M_KBC<30>
CLK_PCI_FB
2
1
PLTRST#
RP9
10
9
8
7 4
10K_10P8R_6
10K_10P8R_6
RP8
RP8
10
9
8
7 4
10K_10P8R_6
10K_10P8R_6
BBS_BIT1<7>
ACC_LED#<28>
PCI_GNT3#<7>
LCD_BK<23>
TP55TP55
TP102TP102
TP69TP69
+3VS5
C480 0.01U/16V_4C480 0.01U/16V_4
U19
U19
3 5
*TC7SH08FU
*TC7SH08FU
D D
EDID_SELECT#
LCD_BK
USB_OC4#
USB_OC1#
USB_OC3#
USB3.0
C C
B B
PLTRST#(CLG)
PCI_PLTRST#
A A
R266 *0_4/SR266 *0_4/S
+1.05V <6,7,10,36>
+3VS5 <2,6,7,9,10,23,33,35,38,39,42,43>
+3V <2,6,7,9,10,12,13,14,18,23,24,25,26,27,28,29,30,31,32,33,39,40,42,43>
+3V
ACC_LED#
1
ACCEL_INTH#MPC_PWR_CTRL#
2
BT_COMBO_EN#
3
DGPU_SELECT#
56
USB_OC6#
1
USB_OC0#
2
PCH_AOCS#
3
USB_OC5#USB_OC2#
56
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
BT_COMBO_EN#
DGPU_SELECT#
EDID_SELECT#
BBS_BIT1
ACC_LED#
PCI_GNT3#
MPC_PWR_CTRL#
LCD_BK
ACCEL_INTH#
PCI_PME#
PCI_PLTRST#
CLK_PCI_TPM_R
CLK_PCI_CARD_R
R351 22_4R351 22_4
R350 22_4R350 22_4
R353 22_4R353 22_4
CLK_PCI_FB_R
CLK_PCI_LPC_R
CLK_PCI_EC_R
PLTRST#
4
R251
R251
100K_4
100K_4
PLTRST# <2,14,26,29,30,33>
5
BG26
BJ26
BH25
BJ16
BG16
AH38
AH37
AK43
AK45
C18
N30
H3
AH12
AM4
AM5
Y13
K24
L24
AB46
AB45
B21
M20
AY16
BG46
BE28
BC30
BE32
BJ32
BC28
BE30
BF32
BG32
AV26
BB26
AU28
AY30
AU26
AY26
AV28
AW30
K40
K38
H38
G38
C46
C44
E40
D47
E42
F46
G42
G40
C42
D44
K10
C6
H49
H43
J48
K42
H40
SMB_PCH_DAT
SMB_PCH_CLK
U32E
U32E
TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP20
RSVD
USB30_RX1N
USB30_RX2N
USB30_RX3N
USB30_RX4N
USB30_RX1P
USB30_RX2P
USB30_RX3P
USB30_RX4P
USB30_TX1N
USB30_TX2N
USB30_TX3N
USB30_TX4N
USB30_TX1P
USB30_TX2P
USB30_TX3P
USB30_TX4P
RSVD
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
PCI
PCI
TP21
TP22
TP23
TP24
TP25
TP26
TP27
TP28
TP29
TP30
TP31
TP32
TP33
TP34
TP35
TP36
TP37
TP38
TP39
TP40
PIRQA#
PIRQB#
PIRQC#
PIRQD#
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54
GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55
PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5
PME#
PLTRST#
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4
CPT_PPT_Rev_0p5
CPT_PPT_Rev_0p5
SMBus/Pull-up(CLG)
*2N7002K
*2N7002K
MBCLK2<13,30,33>
MBDATA2<13,30,33>
Q24
Q24
2N7002K
2N7002K
1
Q25
Q25
+3V
1
Q26
Q26
*2N7002K
*2N7002K
3
R250 4.7K_4R250 4.7K_4
2
+3V
3
2
Q23
Q23
2N7002K
2N7002K
R246 4.7K_4R246 4.7K_4
1
1
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
2
2
USB
USB
USBRBIAS#
USBRBIAS
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
SMB_ME1_CLK
3
R303 2.2K_4R303 2.2K_4
R308 2.2K_4R308 2.2K_4
SMB_ME1_DAT
3
SMB_RUN_DAT <12,13>
SMB_RUN_CLK <12,13>
4
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
+3VS5
4
AY7
AV7
AU3
BG4
AT10
BC8
AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6
AV5
AV10
AT8
AY5
BA2
AT12
BF3
C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32
C33
B33
A14
K20
B17
C16
L16
A16
D14
C14
WLAN
LAN
PCIE_RXN2_LAN<29>
PCIE_RXN3_CARD<26>
Cardreader
NV_ALE
USB_BIAS
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
PCH_AOCS#
USBP0- <28>
USBP0+ <28>
USBP1- <28>
USBP1+ <28>
USBP4- <23>
USBP4+ <23>
USBP9- <28>
USBP9+ <28>
USBP10- <33>
USBP10+ <33>
PCIE_RXP3_CARD<26>
PCIE_TXN3_CARD<26>
PCIE_TXP3_CARD<26>
NV_ALE <7>
USB2.0
USB2.0
Webcam
Right_USB
WLAN
R571
R571
22.6/F_4
22.6/F_4
PCH_AOCS# <33>
CLK_REQ/Strap Pin(CLG)
CLK_PCIE_REQ1#
CLK_PCIE_REQ2#
CLK_PCIE_REQ0#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
CLK_PEGB_REQ#
CLK_PEGA_REQ#
CLK_PEGA_REQ#
CLK_PEGB_REQ#
CLK_BUF_BCLK_N
CLK_BUF_BCLK_P
CLK_BUF_PCIE_3GPLL#
CLK_BUF_PCIE_3GPLL
CLK_BUF_DREFCLK#
CLK_BUF_DREFCLK
CLK_BUF_DREFSSCLK#
CLK_BUF_DREFSSCLK
CLK_PCH_14M
CLOCK TERMINATION for FCIM
PCIE_RXN1<33>
PCIE_RXP1<33>
PCIE_TXN1<33>
PCIE_TXP1<33>
PCIE_RXP2_LAN<29>
PCIE_TXN2_LAN<29>
PCIE_TXP2_LAN<29>
MPC Switch Control
MPC_PWR_CTRL#
MPC_PWR_CTRL#
USB2.0/USB3.0 COMBO 1st
USB2.0/USB3.0 COMBO 2nd
CLK_33M_DEBUG
CLK_33M_DEBUG
C535
C535
*22P/50V_4
*22P/50V_4
EMI
R515 10K_4R515 10K_4
R293 10K_4R293 10K_4
R542 10K_4R542 10K_4
R495 10K_4R495 10K_4
R264 10K_4R264 10K_4
R269 10K_4R269 10K_4
R273 *10K_4R273 *10K_4
Ra
R256 10K_4R256 10K_4
Rb
R270 *10K_4R270 *10K_4
SG : Rb ; UMA : Ra
R325 10K_4R325 10K_4
R323 10K_4R323 10K_4
R307 10K_4R307 10K_4
R306 10K_4R306 10K_4
R321 10K_4R321 10K_4
R316 10K_4R316 10K_4
R290 10K_4R290 10K_4
R289 10K_4R289 10K_4
R343 10K_4R343 10K_4
C519 0.1U/10V_4C519 0.1U/10V_4
C513 0.1U/10V_4C513 0.1U/10V_4
C517 0.1U/10V_4C517 0.1U/10V_4
C516 0.1U/10V_4C516 0.1U/10V_4
C524 0.1U/10V_4C524 0.1U/10V_4
C523 0.1U/10V_4C523 0.1U/10V_4
Low = MPC ON
High = MPC OFF (Default)
R582 *1K_4R582 *1K_4
CLK_PCIE_CARDN<26>
CLK_PCIE_CARDP<26>
CLK_PCIE_REQ2#<26>
CLK_33M_KBC
+3V
+3VS5
3
C534
C534
*22P/50V_4
*22P/50V_4
BOARD_ID0<9>
TP47TP47
BOARD_ID1<9>
BOARD_ID2<9>
3
PCIE_TXN1_C
PCIE_TXP1_C
PCIE_TXN2_LAN_C
PCIE_TXP2_LAN_C
PCIE_TXN3_CARD_C
PCIE_TXP3_CARD_C
CLK_PCH_CARD2N
CLK_PCH_CARD2P
CLK_PCIE_REQ2#
TP59TP59
TP58TP58
CLK_PCH_ITPN
CLK_PCH_ITPP
WLAN
LAN
GPU
CLK_PCH_SRC0N
CLK_PCH_SRC0P
CLK_PCIE_REQ0#
CLK_PCH_SRC2N
CLK_PCH_SRC2P
CLK_PCIE_REQ1#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
CLK_PEGB_REQ#
CLK_PCIE_WLAN#<33>
CLK_PCIE_WLAN<33>
PCIE_CLKREQ_WLAN#<33>
CLK_PCIE_LANP<29>
CLK_PCIE_LANN<29>
PCIE_CLKREQ_LAN#<29>
CLK_PCIE_VGA#<14>
CLK_PCIE_VGA<14>
U32B
U32B
BG34
PERN1
BJ34
PERP1
AV32
PETN1
AU32
PETP1
BE34
PERN2
BF34
PERP2
BB32
PETN2
AY32
PETP2
BG36
PERN3
BJ36
PERP3
AV34
PETN3
AU34
PETP3
BF36
PERN4
BE36
PERP4
AY34
PETN4
BB34
PETP4
BG37
PERN5
BH37
PERP5
AY36
PETN5
BB36
PETP5
BJ38
PERN6
BG38
PERP6
AU36
PETN6
AV36
PETP6
BG40
PERN7
BJ40
PERP7
AY40
PETN7
BB40
PETP7
BE38
PERN8
BC38
PERP8
AW38
PETN8
AY38
PETP8
Y40
CLKOUT_PCIE0N
Y39
CLKOUT_PCIE0P
J2
PCIECLKRQ0# / GPIO73
(+3VS5)
AB49
CLKOUT_PCIE1N
AB47
CLKOUT_PCIE1P
M1
PCIECLKRQ1# / GPIO18
(+3V)
AA48
CLKOUT_PCIE2N
AA47
CLKOUT_PCIE2P
V10
PCIECLKRQ2# / GPIO20
(+3V)
Y37
CLKOUT_PCIE3N
Y36
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
(+3VS5)
Y43
CLKOUT_PCIE4N
Y45
CLKOUT_PCIE4P
L12
PCIECLKRQ4# / GPIO26
(+3VS5)
V45
CLKOUT_PCIE5N
V46
CLKOUT_PCIE5P
L14
PCIECLKRQ5# / GPIO44
(+3VS5)
AB42
CLKOUT_PEG_B_N
AB40
CLKOUT_PEG_B_P
E6
PEG_B_CLKRQ# / GPIO56
(+3VS5)
V40
CLKOUT_PCIE6N
V42
CLKOUT_PCIE6P
T13
PCIECLKRQ6# / GPIO45
(+3VS5)
V38
CLKOUT_PCIE7N
V37
CLKOUT_PCIE7P
K12
PCIECLKRQ7# / GPIO46
(+3VS5)
AK14
CLKOUT_ITPXDP_N
AK13
CLKOUT_ITPXDP_P
CPT_PPT_Rev_0p5
CPT_PPT_Rev_0p5
PCI-E*
PCI-E*
R509 *0_4/SR509 *0_4/S
R499 *0_4/SR499 *0_4/S
RP7
RP7
2
0_4P2R_4
0_4P2R_4
4
Remove for UMA only.
2
SMBALERT# / GPIO11
SML0ALERT# / GPIO60
SMBUSController
SMBUSController
SML1ALERT# / PCHHOT# / GPIO74
SML1CLK / GPIO58
SML1DATA / GPIO75
Link
Link
PEG_A_CLKRQ# / GPIO47
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKIN_PCILOOPBACK
CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67
FLEX CLOCKS
FLEX CLOCKS
CLK_PCIE_REQ0#
CLK_PCIE_REQ1#
2
CLKOUT_DMI_P
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLOCKS
CLOCKS
CLK_PCH_SRC0N
CLK_PCH_SRC0P
CLK_PCH_SRC2P
CLK_PCH_SRC2N
CLK_PCH_PEGAN
1
CLK_PCH_PEGAP
3
(+3VS5)
SMBCLK
SMBDATA
(+3VS5)
SML0CLK
SML0DATA
(+3VS5)
(+3VS5)
(+3VS5)
CL_CLK1
CL_DATA1
CL_RST1#
(+3VS5)
CLKOUT_DP_N
CLKOUT_DP_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_SATA_N
CLKIN_SATA_P
REFCLK14IN
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
(+3V)
(+3V)
(+3V)
(+3V)
SMBALERT#
E12
SMB_PCH_CLK
H14
SMB_PCH_DAT
C9
DRAMRST_CNTRL_PCH
A12
SMB_ME0_CLK
C8
SMB_ME0_DAT
G12
SML1ALERT#_R
C13
SMB_ME1_CLK
E14
SMB_ME1_DAT
M16
CL_CLK_R
M7
CL_DAT_R
T11
CL_RST#_R
P10
CLK_PEGA_REQ#
M10
CLK_PCH_PEGAN
AB37
CLK_PCH_PEGAP
AB38
AV22
AU22
AM12
AM13
CLK_BUF_PCIE_3GPLL#
BF18
CLK_BUF_PCIE_3GPLL
BE18
CLK_BUF_BCLK_N
BJ30
CLK_BUF_BCLK_P
BG30
CLK_BUF_DREFCLK#
G24
CLK_BUF_DREFCLK
E24
CLK_BUF_DREFSSCLK#
AK7
CLK_BUF_DREFSSCLK
AK5
CLK_PCH_14M
K45
CLK_PCI_FB
H45
XTAL25_IN
V47
XTAL25_OUT
V49
Y47
XCLK_RCOMP
CLK_FLEX0
K43
CLK_FLEX1
F47
CLK_FLEX2
H47
CLK_FLEX3
K49
1
08
DRAMRST_CNTRL_PCH <2,12,13>
TP53TP53
TP54TP54
TP51TP51
TP60TP60
CLK_CPU_BCLKN <2>
CLK_CPU_BCLKP <2>
CLK_DPLL_SSCLKN <2>
CLK_DPLL_SSCLKP <2>
change 25M to small size
TP100TP100
C813 33P/50V_4C813 33P/50V_4
Y9
R587
R587
1M_4
1M_4
25MHZY925MHZ
C814 27P/50V_4C814 27P/50V_4
TP101TP101
R583 90.9/F_4R583 90.9/F_4
R586 *22_4R586 *22_4
Rb
Remove Ra, Rb for UMA &
SG. 27MHz support DIS only.
+3VS5
R541 1K_4R541 1K_4
R263 10K_4R263 10K_4
R248 2.2K_4R248 2.2K_4
R513 2.2K_4R513 2.2K_4
R531 2.2K_4R531 2.2K_4
R298 2.2K_4R298 2.2K_4
R294 10K_4R294 10K_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
+1.05V
TP68TP68
TP70TP70
TP103TP103
PCH_CLK_27M_1
CLK_PCH_14M
PCH_CLK_27M_1
C530
C530
*22P/50V_4
*22P/50V_4
SMBus/Pull-up(CLG)PCIE Clock
DRAMRST_CNTRL_PCH
SMBALERT#
SMB_PCH_CLK
SMB_PCH_DAT
SMB_ME0_CLK
SMB_ME0_DAT
SML1ALERT#_R
PROJECT : R33
PROJECT : R33
PROJECT : R33
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PCH 3/6 (PCIE/USB/CLK)
PCH 3/6 (PCIE/USB/CLK)
PCH 3/6 (PCIE/USB/CLK)
1
RF
C821
C821
*22P/50V_4
*22P/50V_4
1A
1A
8 43Wednesday, August 31, 2011
8 43Wednesday, August 31, 2011
8 43Wednesday, August 31, 2011
1A
5
Cougar Point/Panther Point (GPIO,VSS_NCTF,RSVD)
Cougar Point/Panther Point (GPIO,VSS_NCTF,RSVD)
Cougar Point/Panther Point (GPIO,VSS_NCTF,RSVD)Cougar Point/Panther Point (GPIO,VSS_NCTF,RSVD)
U32F
PCI_SERR#<30>
SIO_EXT_SMI#<30>
D D
Reserve
C C
B B
+3VS5 <2,6,7,8,10,23,33,35,38,39,42,43>
+3V <2,6,7,8,10,12,13,14,18,23,24,25,26,27,28,29,30,31,32,33,39,40,42,43>
ODD_PRSNT#<32>
DGPU_PWROK<18,30,42,43>
DGPU_HOLD_RST#<14>
PLL_ODVR_EN<7>
+3V
DGPU_PWR_EN<43>
BT_OFF#<33>
RF_OFF#<33>
R508 10K_4R508 10K_4
TP52TP52
TP93TP93
R252 *0_4/SR252 *0_4/S
R543 *0_4R543 *0_4
R491 *0_4/SR491 *0_4/S
R271 *0_4/SR271 *0_4/S
S_GPIO
SIO_EXT_SMI#
BOARD_ID4
BOARD_ID5
BT_OFF#
LAN_DISABLE#_R
RF_OFF#
ODD_PRSNT#_R
DGPU_PWROK
BIOS_REC
DGPU_HOLD_RST#
GPIO27
PLL_ODVR_EN_R
GPIO34
GPIO35
DGPU_PWR_EN_R
FDI_OVRVLTG
MFG_MODE
DGPU_PRSNT#
TEST_SET_UP
GPIO49
SV_DET
U32F
T7
BMBUSY# / GPIO0
(+3V)
A42
TACH1 / GPIO1
(+3V)
H36
TACH2 / GPIO6
(+3V)
E38
TACH3 / GPIO7
(+3V)
C10
GPIO8
(+3VS5)
C4
LAN_PHY_PWR_CTRL / GPIO12
(+3VS5)
G2
GPIO15
(+3VS5)
U2
SATA4GP / GPIO16
(+3V)
D40
TACH0 / GPIO17
(+3V)
T5
SCLOCK / GPIO22
(+3V)
E8
GPIO24 / MEM_LED
(+3VS5)
E16
GPIO27
(DSW)
P8
GPIO28
(+3VS5)
K1
STP_PCI# / GPIO34
(+3V)
K4
GPIO35
(+3V)
V8
SATA2GP / GPIO36
(+3V)
M5
SATA3GP / GPIO37
(+3V)
N2
SLOAD / GPIO38
(+3V)
M3
SDATAOUT0 / GPIO39
(+3V)
V13
SDATAOUT1 / GPIO48
(+3V)
V3
SATA5GP / GPIO49
(+3V)
D6
GPIO57
(+3VS5)
A4
VSS_NCTF_1
A44
VSS_NCTF_2
A45
VSS_NCTF_3
A46
VSS_NCTF_4
A5
VSS_NCTF_5
A6
VSS_NCTF_6
B3
VSS_NCTF_7
B47
VSS_NCTF_8
BD1
VSS_NCTF_9
BD49
VSS_NCTF_10
BE1
VSS_NCTF_11
BE49
VSS_NCTF_12
BF1
VSS_NCTF_13
BF49
VSS_NCTF_14
CPT_PPT_Rev_0p5
CPT_PPT_Rev_0p5
4
GPIO68
(+3V)
(+3V)
(+3V)
(+3V)
A20GATE
PECI
RCIN#
THRMTRIP#
INIT3_3V#
DF_TVS
TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4
NC_1
C40
B41
C41
A40
P4
AU16
P5
AY11
AY10
T14
AY1
AH8
AK11
AH10
AK10
P37
BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49
GPIO69
GPIO70
GPIO71
EC_RCIN#
PCH_THRMTRIP#
NV_CLE
TACH4 / GPIO68
TACH5 / GPIO69
TACH6 / GPIO70
TACH7 / GPIO71
PROCPWRGD
GPIO
GPIO
CPU/MISC
CPU/MISC
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
NCTF
NCTF
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
3
R574 10K_4R574 10K_4
R577 1.5K/F_4R577 1.5K/F_4
R578 *1.5K/F_4R578 *1.5K/F_4
R552 390_4R552 390_4
NV_CLE <7>
+3V
+3V
EC_A20GATE <30>
EC_RCIN# <30>
H_PWRGOOD <2>
PM_THRMTRIP# <2,30>
MFG_MODE
S_GPIO
RF_OFF#
Intel ME Crypto Transport Layer
Security (TLS) cipher suite
Low = Disable (Default)
High = Enable
R275 *0_4R275 *0_4
TEST_SET_UP
SV_SET_UP
High = Strong (Default)
2
MFG-TEST
R536 10K_4R536 10K_4
R518 *0_4R518 *0_4
R261 10K_4R261 10K_4
R272 *0_4R272 *0_4
R511 1K_4R511 1K_4
R258 10K_4R258 10K_4
+3VS5
+3V
Clock Gen Power OK (CLG)
+3V
+3V
R274 *0_4R274 *0_4
BIOS RECOVERY High = Disable (Default)
R295 100K_4R295 100K_4
1
GPIO Pull-up/Pull-down(CLG)
DGPU_HOLD_RST#
LAN_DISABLE#_R
SIO_EXT_SMI#
BT_OFF#
EC_A20GATE
EC_RCIN#
GPIO49
GPIO70
GPIO71
ODD_PRSNT#_R
DGPU_PWROK
DGPU_PWROK
GPIO27
R268 10K_4R268 10K_4
R512 10K_4R512 10K_4
R580 10K_4R580 10K_4
R539 10K_4R539 10K_4
R262 10K_4R262 10K_4
R280 10K_4R280 10K_4
R544 *10K_4R544 *10K_4
R581 1.5K/F_4R581 1.5K/F_4
R576 1.5K/F_4R576 1.5K/F_4
R532 10K_4R532 10K_4
R346 10K_4R346 10K_4
R347 *10K_4R347 *10K_4
R302 10K_4R302 10K_4
BIOS_REC
Low = Enable
SV_DET
TEST DETECT
Low = Default
+3VS5
+3V
R257 10K_4R257 10K_4
R296 *10K_4R296 *10K_4
09
+3V
+3V
+3V +3V
R254 100K_4R254 100K_4
FDI TERMINATION
VOLTAGE OVERRIDE
+3V
NB5
NB5
NB5
2
FDI_OVRVLTGDGPU_PWR_EN_R
LOW - Tx, Rx terminated
to same voltage
PROJECT : R33
PROJECT : R33
PROJECT : R33
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet of
PCH 4/6 (GPIO/MISC)
PCH 4/6 (GPIO/MISC)
PCH 4/6 (GPIO/MISC)
1
R278 *1K_4R278 *1K_4
1A
1A
9 43Wednesday, August 31, 2011
9 43Wednesday, August 31, 2011
9 43Wednesday, August 31, 2011
1A
of
of
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
R550 10K_4R550 10K_4
R259 *10K_4R259 *10K_4
R288 *10K_4R288 *10K_4
R355 *10K_4R355 *10K_4
R593 *10K_4R593 *10K_4
R344 *10K_4R344 *10K_4
RU0
RU1
RU2
RU3
RU4
RU5
+3VS5
+3V
9/3 SI for H/W.
DMI TERMINATION
VOLTAGE OVERRIDE
R260 *200K/F_4R260 *200K/F_4
Low = Tx, Rx terminated to
same voltage (DC Coupling Mode)
(DEFAULT)
GFX Present
SG
Ra
Rb
RaRb
R529 10K_4R529 10K_4
UMA
Rb
Ra
R506 *100K_4R506 *100K_4
DGPU_PRSNT#
Stuff
NC
3
BOARD_ID0<8>
BOARD ID SETTING
Model
R33 UMA 000000
A A
R33 DIS
0
0
0
0
0
0
0
0
5
0
0
0
0
1
0
0
0
BOARD_ID0BOARD_ID1BOARD_ID2BOARD_ID3BOARD_ID4BOARD_ID5
0
1
1
0
1
1
1
0
BOARD_ID1<8>
BOARD_ID2<8>
BOARD_ID3<8>
RD0
R549 *10K_4R549 *10K_4
RD1
R276 10K_4R276 10K_4
RD2
R284 10K_4R284 10K_4
RD3
R356 10K_4R356 10K_4
RD4
R596 10K_4R596 10K_4
RD5
R345 10K_4R345 10K_4
4
5
R589 *0_8R589 *0_8
+1.05V
C487
C487
*0.1U/10V_4
*0.1U/10V_4
1.01A (60mils)
C511
C511
1U/6.3V_4
1U/6.3V_4
C482
C482
22U/6.3VS_8
22U/6.3VS_8
C489
C489
0.1U/10V_4
0.1U/10V_4
+VCCAFDI_VRM
160mA (20mils)
+1.05V_VCCA_A_DPL
65mA (10mils)
+1.05V_VCCA_B_DPL
8mA (10mils)
+VCCDIFFCLK
+VCCDIFFCLKN
55mA (10mils)
+V1.05V_SSCVCC
95mA (10mils)
C490
C490
0.1U/10V_4
0.1U/10V_4
+V1.05M_VCCSUS
+VTT_VCCPCPU
C785
C785
0.1U/10V_4
0.1U/10V_4
C809
C809
0.1U/10V_4
0.1U/10V_4
+VCCACLK
+VCCPDSW
3mA (10mils)
PCH_VCCDSW
+3V_SUS_CLKF33
+VCCDPLL_CPY
+VCCSUS1
R315 *0_4/SR315 *0_4/S
+3VS5
C496
C496
0.1U/10V_4
D D
+1.05V
L55
L55
*10uH/100mA_8
*10uH/100mA_8
+1.05V
R324
R324
*0_6/S
*0_6/S
+1.05V +1.05V_VCCEPW
C C
R527 *0_6/SR527 *0_6/S
+1.05V
R592 *0_6/SR592 *0_6/S
+1.05V
R591 *0_6/SR591 *0_6/S
+1.05V
B B
+1.05V
+1.05V_VTT
A A
+1.05V
R310 *0_6R310 *0_6
R523 *0_4R523 *0_4
V_PROC_IO=1mA
(10mils)
VCCRTC<1mA
(10mils)
0.1U/10V_4
+VCCAPLL_CPY_PCH
C801
C801
*10U/6.3V_6
*10U/6.3V_6
C505
C505
1U/6.3V_4
1U/6.3V_4
C792
C792
1U/6.3V_4
1U/6.3V_4
C817
C817
1U/6.3V_4
1U/6.3V_4
C816
C816
1U/6.3V_4
1U/6.3V_4
C494
C494
*1U/6.3V_4
*1U/6.3V_4
C784
C784
4.7U/6.3V_6
4.7U/6.3V_6
+3V_RTC
C805
C805
1U/6.3V_4
1U/6.3V_4
+1.05V <6,7,8,36>
+3V_RTC <6,7>
+1.5V <4,12,33>
+3VS5 <2,6,7,8,9,23,33,35,38,39,42,43>
+3V <2,6,7,8,9,12,13,14,18,23,24,25,26,27,28,29,30,31,32,33,39,40,42,43>
+5VS5 <28,35,36,37,38,39,40,41,42>
+5V <7,18,24,25,27,31,32,33,39>
+1.5VSUS <2,4,12,13,37,43>
+1.8V <4,7,38,43>
5
Cougar Point/Panther Point(POWER)
POWER
POWER
C502
C502
*1U/6.3V_4
*1U/6.3V_4
C512
C512
1U/6.3V_4
1U/6.3V_4
C481
C481
22U/6.3VS_8
22U/6.3VS_8
+VCCRTCEXT
+VCCSST
C786
C786
0.1U/10V_4
0.1U/10V_4
C804
C804
0.1U/10V_4
0.1U/10V_4
AD49
BH23
AL29
AL24
AA19
AA21
AA24
AA26
AA27
AA29
AA31
AC26
AC27
AC29
AC31
AD29
AD31
BD47
BF47
AF17
AF33
AF34
AG34
AG33
T16
V12
T38
W21
W23
W24
W26
W29
W31
W33
N16
Y49
V16
T17
V19
BJ8
A22
U32J
U32J
VCCACLK
VCCDSW3_3
DCPSUSBYP
VCC3_3[5]
VCCAPLLDMI2
VCCIO[14]
DCPSUS[3]
VCCASW[1]
VCCASW[2]
VCCASW[3]
VCCASW[4]
VCCASW[5]
VCCASW[6]
VCCASW[7]
VCCASW[8]
VCCASW[9]
VCCASW[10]
VCCASW[11]
VCCASW[12]
VCCASW[13]
VCCASW[14]
VCCASW[15]
VCCASW[16]
VCCASW[17]
VCCASW[18]
VCCASW[19]
VCCASW[20]
DCPRTC
VCCVRM[4]
VCCADPLLA
VCCADPLLB
VCCIO[7]
VCCDIFFCLKN[1]
VCCDIFFCLKN[2]
VCCDIFFCLKN[3]
VCCSSC
DCPSST
DCPSUS[1]
DCPSUS[2]
V_PROC_IO
VCCRTC
CPT_PPT_Rev_0p5
CPT_PPT_Rev_0p5
4
N26
VCCIO[29]
P26
VCCIO[30]
P28
VCCIO[31]
T27
VCCIO[32]
T29
VCCIO[33]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[6]
VCCIO[34]
V5REF_SUS
DCPSUS[4]
VCCSUS3_3[1]
V5REF
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
Clock and Miscellaneous
Clock and Miscellaneous
CPURTC
CPURTC
VCC3_3[1]
VCC3_3[8]
PCI/GPIO/LPCMISC
PCI/GPIO/LPCMISC
VCC3_3[4]
VCC3_3[2]
VCCIO[5]
VCCIO[12]
VCCIO[13]
VCCIO[6]
VCCAPLLSATA
SATA USB
SATA USB
VCCVRM[1]
VCCIO[2]
VCCIO[3]
VCCIO[4]
VCCASW[22]
VCCASW[23]
VCCASW[21]
VCCSUSHDA
HDA
HDA
+1.05V +1.05V_VTT
+3V_VCCPUSB
T23
T24
V23
V24
+3V_VCCAUBG
P24
+VCCAUPLL
T26
+5V_PCH_VCC5REFSUS
M26
+VCCA_USBSUS
AN23
+3V_VCCPSUS
AN24
+5V_PCH_VCC5REF
P34
N20
N22
119mA (15mils)
P20
P22
AA16
266mA (20mils)
W16
T34
AJ2
AF13
AH13
AH14
AF14
AK1
+V1.1LAN_VCCAPLL
+VCCAFDI_VRM
AF11
AC16
+1.05V_VCCIO1
AC17
AD17
1.01A (60mils)
+1.05V_VCCEPW
T21
V21
T19
P32
R232
R232
F3_2X1_65-2_8
F3_2X1_65-2_8
1 2
RC1206-R020
RC1206-R020
+3V_VCCPSUS
+3V_VCCPCORE
+3V
C790
C790
0.1U/10V_4
0.1U/10V_4
+V1.05S_SATA3
10mA (10mils)
+V3.3A_1.5A_HDA_IO
C806
C806
0.1U/10V_4
0.1U/10V_4
Reserve for DB only, after DB change to short pad
4
R588 *0_8/SR588 *0_8/S
C815
C815
1U/6.3V_4
1U/6.3V_4
119mA (20mils)
R319 *0_6/SR319 *0_6/S
C501
C501
0.1U/10V_4
0.1U/10V_4
R318 *0_6/SR318 *0_6/S
C504
C504
0.1U/10V_4
0.1U/10V_4
R322 *0_6/SR322 *0_6/S
C498 *1U/6.3V_4C498 *1U/6.3V_4
R320 *0_6/SR320 *0_6/S
C499
C499
1U/6.3V_4
1U/6.3V_4
R267 *0_6/SR267 *0_6/S
C483
C483
0.1U/10V_4
0.1U/10V_4
+3V
C789
C789
0.1U/10V_4
0.1U/10V_4
R287 *0_8/SR287 *0_8/S
C484
C484
1U/6.3V_4
1U/6.3V_4
L53
L53
*10uH/100mA_8
*10uH/100mA_8
C788
C788
*10U/6.3V_6
*10U/6.3V_6
R281 *0_6/SR281 *0_6/S
C493
C493
1U/6.3V_4
1U/6.3V_4
R569 *0_4R569 *0_4
R570 *0_4/SR570 *0_4/S
C808
C808
*1U/6.3V_4
*1U/6.3V_4
+1.05V+1.05V_VCCUSBCORE
+3VS5
+1.05V
+1.5VSUS
+3VS5
3
+1.05V +1.05V_PCH_VCC
+1.05V +1.05V_VCCAPLL_EXP
+1.05V
+3VS5
+3V
160mA (15mils)
(Mobile 1.5V)
+1.05V
+1.05V
+1.05V
R598 *0_6/SR598 *0_6/S
+1.5V
R599 *0_6R599 *0_6
+1.05V
+1.05V
+1.05V
+1.05V_VTT
3
2
COUGAR POINT/Panther Point (POWER)
1.3 A (60mils)
AA23
AC23
C500
C500
C506
C506
1U/6.3V_4
1U/6.3V_4
C497
C497
10U/6.3VS_6
10U/6.3VS_6
+1.05V_PCH_VCCDPLL_EXP+1.05V
R309
R309
*0_6/S
*0_6/S
L54
L54
*1uH/25mA_6
*1uH/25mA_6
C800
C800
*10U/6.3V_6
*10U/6.3V_6
2.925 A (140mils)
C520
C520
1U/6.3V_4
1U/6.3V_4
C503
C503
C508
C508
10U/6.3VS_6
10U/6.3VS_6
1U/6.3V_4
1U/6.3V_4
R568 *0_8/SR568 *0_8/S
+VCCAFDI_VRM
+VCCAFDI_VRM
+1.05V_VCCAPLL_FDI
R545 *0_8R545 *0_8
R556 *0_8/SR556 *0_8/S
+1.05V_VCCDPLL_FDI
R520 0_4R520 0_4
R504 *0_4R504 *0_4
20mA (10mils)
+3V_VCC_EXP
C807
C807
0.1U/10V_4
0.1U/10V_4
65mA (10mils)
+1.05V_VCCA_A_DPL
8mA (10mils)
+1.05V_VCCA_B_DPL
20mA (10mils)
+3V_SUS_CLKF33
+3V_SUS_CLKF33_R
L60
L60
*10uH/100mA_8
*10uH/100mA_8
+3V
+1.05V
L57
L57
10uH/100MA_8
10uH/100MA_8
L56
L56
10uH/100MA_8
10uH/100MA_8
+3V
R603 *0_6R603 *0_6
R606 1/F_4R606 1/F_4
+1.05V +VCC_DMI_CCI +1.1V_VCC_DMI_CCI
R601 *1/F_4R601 *1/F_4
R602 *0_4/SR602 *0_4/S
AD21
1U/6.3V_4
1U/6.3V_4 C827 10U/6.3VS_6C827 10U/6.3VS_6
AD23
AF21
AF23
AG21
AG23
AG24
AG26
C510
C510
AG27
1U/6.3V_4
1U/6.3V_4
AG29
AJ23
AJ26
AJ27
AJ29
AJ31
AN19
BJ22
AN16
AN17
AN21
AN26
AN27
AP21
C521
C521
1U/6.3V_4
1U/6.3V_4
AP23
AP24
AP26
C509
C509
1U/6.3V_4
1U/6.3V_4
AT24
AN33
AN34
BH29
AP16
BG6
AP17
AU20
C818 1U/6.3V_4C818 1U/6.3V_4
+
+
C839 *220U/2.5V_3528
C839 *220U/2.5V_3528
C811 1U/6.3V_4C811 1U/6.3V_4
+
+
C812 *220U/2.5V_3528
C812 *220U/2.5V_3528
L62
L62
10uH/100mA_8
10uH/100mA_8
U32G
U32G
VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
VCCCORE[16]
VCCCORE[17]
VCCIO[28]
VCCAPLLEXP
VCCIO[15]
VCCIO[16]
VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[24]
VCCIO[25]
VCCIO[26]
VCC3_3[3]
VCCVRM[2]
VccAFDIPLL
VCCIO[27]
VCCDMI[2]
CPT_PPT_Rev_0p5
CPT_PPT_Rev_0p5
POWER
POWER
C846 1U/6.3V_4C846 1U/6.3V_4
C841 10U/6.3VS_6C841 10U/6.3VS_6
2
CRTLVDS
CRTLVDS
VCC CORE
VCC CORE
DMI
DMI
VCCIO
VCCIO
DFT / SPI HVCMOS
DFT / SPI HVCMOS
FDI
FDI
If have power noise issue then stuff it.
1mA (10mils)
+VCCA_DAC_1_2
U48
VCCADAC
U47
VSSADAC
AK36
VCCALVDS
AK37
VSSALVDS
VCC3_3[6]
VCC3_3[7]
VCCVRM[3]
VCCDMI[1]
VCCCLKDMI
VCCSPI
AM37
AM38
AP36
AP37
+3V_VCC_GIO
V33
V34
+VCCAFDI_VRM
AT16
AT20
AB36
AG16
AG17
AJ16
AJ17
V1
+5V_PCH_VCC5REF
60mA (10mils)
C853
C853
0.1U/10V_4
0.1U/10V_4
+1.1V_VCC_DMI_CCI
C833
C833
1U/6.3V_4
1U/6.3V_4
20mA (10mils)
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
VCCDFTERM[1]
VCCDFTERM[2]
VCCDFTERM[3]
VCCDFTERM[4]
V5REF= 1mA
+5V_PCH_VCC5REFSUS
VCC5REFSUS=1mA
+5V +3V_LDO
U33
U33
G910T21U
G910T21U
Vin3Vout
C838
C838
1U/6.3V_4
1U/6.3V_4
NB5
NB5
NB5
GND
2
PROJECT : R33
PROJECT : R33
PROJECT : R33
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
L61
L61
*HCB1608KF-181T15/1.5A_6
*HCB1608KF-181T15/1.5A_6
C819 0.1U/10V_4C819 0.1U/10V_4
C823 0.01U/25V_4C823 0.01U/25V_4
R597 *0_6R597 *0_6
1mA (10mils)
+VCCALVDS +3V
+VCC_TX_LVDS
0.1uH/250mA_8
0.1uH/250mA_8
C828 22U/6.3VS_8C828 22U/6.3VS_8
C527 0.01U/25V_4C527 0.01U/25V_4
C525 0.01U/25V_4C525 0.01U/25V_4
R608 *0_6/SR608 *0_6/S
42mA (10mils)
C837
C837
*10U/6.3V_6
*10U/6.3V_6
190 mA (15mils)
R502 *0_6/SR502 *0_6/S
C783
C783
1U/6.3V_4
1U/6.3V_4
R326 10_4R326 10_4
D12 RB500V-40D12 RB500V-40
C514
C514
1U/6.3V_4
1U/6.3V_4R519 0_4R519 0_4
R328 10_4R328 10_4
D13 RB500V-40D13 RB500V-40
C515
C515
0.1U/10V_4
0.1U/10V_4
1
PCH 5/6 (POWER)
PCH 5/6 (POWER)
PCH 5/6 (POWER)
1
+1.8V
L59
L59
R501 *0_4R501 *0_4
R503 0_4R503 0_4
C495
C495
1U/6.3V_4
1U/6.3V_4
R282 *0_8/SR282 *0_8/S
C492
C492
0.1U/10V_4
0.1U/10V_4
+3V+3V_VCCME_SPI
+3V
10
+3V_LDO
+3V
+1.05V_VTT
+1.8V+VCCP_NAND
+5V
+3V
+5VS5
+3VS5
10 43Wednesday, August 31, 2011
10 43Wednesday, August 31, 2011
10 43Wednesday, August 31, 2011
+1.05V+1.1V_VCC_DMI
1A
1A
1A
5
4
3
2
1
Cougar Point/Panther Point (GND)
U32I
U32I
AY4
VSS[159]
AY42
VSS[160]
AY46
VSS[161]
AY8
VSS[162]
B11
VSS[163]
B15
D D
C C
B B
A A
5
B19
B23
B27
B31
B35
B39
B7
F45
BB12
BB16
BB20
BB22
BB24
BB28
BB30
BB38
BB4
BB46
BC14
BC18
BC2
BC22
BC26
BC32
BC34
BC36
BC40
BC42
BC48
BD46
BD5
BE22
BE26
BE40
BF10
BF12
BF16
BF20
BF22
BF24
BF26
BF28
BD3
BF30
BF38
BF40
BF8
BG17
BG21
BG33
BG44
BG8
BH11
BH15
BH17
BH19
H10
BH27
BH31
BH33
BH35
BH39
BH43
BH7
D3
D12
D16
D18
D22
D24
D26
D30
D32
D34
D38
D42
D8
E18
E26
G18
G20
G26
G28
G36
G48
H12
H18
H22
H24
H26
H30
H32
H34
F3
CPT_PPT_Rev_0p5
CPT_PPT_Rev_0p5
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
4
H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28
3
Cougar Point/Panther Point (GND)
U32H
U32H
H5
VSS[0]
AA17
AA2
AA3
AA33
AA34
AB11
AB14
AB39
AB4
AB43
AB5
AB7
AC19
AC2
AC21
AC24
AC33
AC34
AC48
AD10
AD11
AD12
AD13
AD19
AD24
AD26
AD27
AD33
AD34
AD36
AD37
AD38
AD39
AD4
AD40
AD42
AD43
AD45
AD46
AD8
AE2
AE3
AF10
AF12
AD14
AD16
AF16
AF19
AF24
AF26
AF27
AF29
AF31
AF38
AF4
AF42
AF46
AF5
AF7
AF8
AG19
AG2
AG31
AG48
AH11
AH3
AH36
AH39
AH40
AH42
AH46
AH7
AJ19
AJ21
AJ24
AJ33
AJ34
AK12
AK3
CPT_PPT_Rev_0p5
CPT_PPT_Rev_0p5
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28
2
PROJECT : R33
PROJECT : R33
PROJECT : R33
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet
Date: Sheet
Date: Sheet of
PCH 6/6 (GND)
PCH 6/6 (GND)
PCH 6/6 (GND)
1
11
11 43Wednesday, August 31, 2011
11 43Wednesday, August 31, 2011
11 43Wednesday, August 31, 2011
of
of
1A
1A
1A
5
4
3
2
1
JDIM5A
M_A_A[15:0]<3>
D D
M_A_BS#0<3>
M_A_BS#1<3>
M_A_BS#2<3>
M_A_CS#0<3>
M_A_CS#1<3>
M_A_CLKP0<3>
M_A_CLKN0<3>
M_A_CLKP1<3>
M_A_CLKN1<3>
M_A_CKE0<3>
M_A_CKE1<3>
M_A_CAS#<3>
M_A_RAS#<3>
R199 10K_4R199 10K_4
R198 10K_4R198 10K_4
C C
B B
M_A_WE#<3>
SMB_RUN_CLK<8,13>
SMB_RUN_DAT<8,13>
M_A_ODT0<3>
M_A_ODT1<3>
M_A_DQSP[7:0]<3>
M_A_DQSN[7:0]<3>
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
DIMM0_SA0
DIMM0_SA1
SMB_RUN_CLK
SMB_RUN_DAT
M_A_DM1
M_A_DM2
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
JDIM5A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDR3-DIMM0_H=5.2_RVS
DDR3-DIMM0_H=5.2_RVS
DDR-78279-001-RVS-204P
DDR-78279-001-RVS-204P
DGMK4000271
DGMK4000271
IC SOCKET DDRIII SO-DIMM(204P,H5.2,RVS)
IC SOCKET DDRIII SO-DIMM(204P,H5.2,RVS)
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
(204P)
(204P)
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
M_A_DQ4
5
M_A_DQ5
7
M_A_DQ7
15
M_A_DQ6
17
M_A_DQ1
4
M_A_DQ0
6
M_A_DQ3
16
M_A_DQ2
18
M_A_DQ9
21
M_A_DQ8
23
M_A_DQ15
33
M_A_DQ10
35
M_A_DQ12
22
M_A_DQ13
24
M_A_DQ14
34
M_A_DQ11
36
M_A_DQ21
39
M_A_DQ16
41
M_A_DQ19
51
M_A_DQ18
53
M_A_DQ20
40
M_A_DQ17
42
M_A_DQ23
50
M_A_DQ22
52
M_A_DQ25
57
M_A_DQ24
59
M_A_DQ30
67
M_A_DQ26
69
M_A_DQ28
56
M_A_DQ29
58
M_A_DQ31
68
M_A_DQ27
70
M_A_DQ36
129
M_A_DQ37
131
M_A_DQ34
141
M_A_DQ38
143
M_A_DQ32
130
M_A_DQ33
132
M_A_DQ35
140
M_A_DQ39
142
M_A_DQ41
147
M_A_DQ45
149
M_A_DQ47
157
M_A_DQ46
159
M_A_DQ40
146
M_A_DQ44
148
M_A_DQ42
158
M_A_DQ43
160
M_A_DQ49
163
M_A_DQ48
165
M_A_DQ54
175
M_A_DQ55
177
M_A_DQ53
164
M_A_DQ52
166
M_A_DQ50
174
M_A_DQ51
176
M_A_DQ61
181
M_A_DQ60
183
M_A_DQ62
191
M_A_DQ63
193
M_A_DQ56
180
M_A_DQ57
182
M_A_DQ59
192
M_A_DQ58
194
M_A_DQ[63:0] <3>
SMDDR_VREF_DQ0_M3<4>
Reseve for RF
+1.5VSUS
+1.5V
SMDDR_VREF_DQ0_M3
C237 *2.2U/6.3V_6C237 *2.2U/6.3V_6
C96 *2.2U/6.3V_6C96 *2.2U/6.3V_6
C61 *2.2U/6.3V_6C61 *2.2U/6.3V_6
C60 *2.2U/6.3V_6C60 *2.2U/6.3V_6
PM_EXTTS#0<13>
DDR3_DRAMRST#<2,13>
R45 *0_6/SR45 *0_6/S
R46 *0_6R46 *0_6
+3V
2.48A
+3V
R169 10K_4R169 10K_4
PM_EXTTS#0
+SMDDR_VREF_DQ0SMDDR_VREF_DQ0_M1
+SMDDR_VREF_DIMM
+1.5VSUS
+1.5V <4,10,33>
+0.75V_DDR_VTT <13,37,39>
+1.5VSUS <2,4,10,13,37,43>
+3VPCU <7,23,30,31,34,35>
+3V <2,6,7,8,9,10,13,14,18,23,24,25,26,27,28,29,30,31,32,33,39,40,42,43>
JDIM5B
JDIM5B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3-DIMM0_H=5.2_RVS
DDR3-DIMM0_H=5.2_RVS
DDR-78279-001-RVS-204P
DDR-78279-001-RVS-204P
DGMK4000271
DGMK4000271
IC SOCKET DDRIII SO-DIMM(204P,H5.2,RVS)
IC SOCKET DDRIII SO-DIMM(204P,H5.2,RVS)
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
(204P)
(204P)
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
VTT1
VTT2
GND
GND
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
205
206
12
+0.75V_DDR_VTT
VREF DQ0 M2 Solution VREF DQ0 M1 SolutionPlace these Caps near So-Dimm0.
+1.5VSUS
+1.5VSUS +0.75V_DDR_VTT
C178 1U/6.3V_4C178 1U/6.3V_4
C256 1U/6.3V_4C256 1U/6.3V_4
C246 1U/6.3V_4C246 1U/6.3V_4
C213 1U/6.3V_4C213 1U/6.3V_4
del M2 solution
A A
C269 10U/6.3VS_6C269 10U/6.3VS_6
C653 10U/6.3VS_6C653 10U/6.3VS_6
C621 10U/6.3VS_6C621 10U/6.3VS_6
C631 10U/6.3VS_6C631 10U/6.3VS_6
C642 10U/6.3VS_6C642 10U/6.3VS_6
C656 10U/6.3VS_6C656 10U/6.3VS_6
C140 *10U/6.3V_6C140 *10U/6.3V_6
C133 10U/6.3V_8C133 10U/6.3V_8
C252 10U/6.3V_8C252 10U/6.3V_8
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
4/27: layout modify
5
4
3
C410 1U/6.3V_4C410 1U/6.3V_4
C738 1U/6.3V_4C738 1U/6.3V_4
C390 1U/6.3V_4C390 1U/6.3V_4
C397 1U/6.3V_4C397 1U/6.3V_4
C734 10U/6.3V_6C734 10U/6.3V_6
C388 *10U/6.3V_6C388 *10U/6.3V_6
C306 0.1U/10V_4C306 0.1U/10V_4
C297 2.2U/6.3V_6C297 2.2U/6.3V_6
C49 0.1U/10V_4C49 0.1U/10V_4
C48 2.2U/6.3V_6C48 2.2U/6.3V_6
+3V
C367 0.1U/10V_4C367 0.1U/10V_4
C377 2.2U/6.3V_6C377 2.2U/6.3V_6
DDR_VTTREF
SMDDR_VREF_DQ0_M3
DRAMRST_CNTRL_PCH<2,8,13>
2
R37 *0_6R37 *0_6
1
2
Q7
AO3416Q7AO3416
3
DDR_VTTREF<4,13,37>
NB5
NB5
NB5
R33
R33
1K/F_4
1K/F_4
SMDDR_VREF_DQ0_M1
R39
R39
1K/F_4
1K/F_4
R164 *0_6R164 *0_6
PROJECT : R33
PROJECT : R33
PROJECT : R33
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
+1.5VSUS
R143
R143
1K/F_4
1K/F_4
+SMDDR_VREF_DIMM
R156
R156
1K/F_4
1K/F_4
DDR3 DIMM0-RVS (5.2H)
DDR3 DIMM0-RVS (5.2H)
DDR3 DIMM0-RVS (5.2H)
1
C268
C268
470P/50V_4
470P/50V_4
12 43Wednesday, August 31, 2011
12 43Wednesday, August 31, 2011
12 43Wednesday, August 31, 2011
1A
1A
1A
5
4
3
2
1
2.48A
+3V
PM_EXTTS#0
+SMDDR_VREF_DQ1
MBCLK2
MBDATA2
PM_EXTTS#0
PM_EXTTS#0_EC
R182 *10K_4R182 *10K_4
+1.5VSUS
JDIM6B
JDIM6B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3-DIMM1_H=9.2_RVS
DDR3-DIMM1_H=9.2_RVS
DDR-AS0A626-UARN-7F-204P
DDR-AS0A626-UARN-7F-204P
DGMK4000272
DGMK4000272
IC SOCKET DDRIII SO-DIMM(204P,H9.2,RVS)
IC SOCKET DDRIII SO-DIMM(204P,H9.2,RVS)
DDR3 Thermal Sensor
U15
U15
8
SCLK
7
SDA
6
ALERT#
4
OVERT#
*LM95245CIMM
*LM95245CIMM
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
VCC
DXP
DXN
GND
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
(204P)
(204P)
VTT1
VTT2
GND
GND
1
2
3
5
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
205
206
C379 *0.01U/25V_4C379 *0.01U/25V_4
DDR_THERMDA
C368
C368
*2200P/50V_4
*2200P/50V_4
DDR_THERMDC
+0.75V_DDR_VTT
+3V
2
13
Q19
Q19
*MMBT3904-7-F
*MMBT3904-7-F
1 3
JDIM6A
M_B_A[15:0]<3>
D D
M_B_BS#0<3>
M_B_BS#1<3>
M_B_BS#2<3>
M_B_CS#0<3>
M_B_CS#1<3>
M_B_CLKP0<3>
M_B_CLKN0<3>
M_B_CLKP1<3>
M_B_CLKN1<3>
M_B_CKE0<3>
M_B_CKE1<3>
M_B_CAS#<3>
M_B_RAS#<3>
R213 10K_4R213 10K_4
R207 10K_4R207 10K_4
+3V
C C
B B
M_B_WE#<3>
SMB_RUN_CLK<8,12>
SMB_RUN_DAT<8,12>
M_B_ODT0<3>
M_B_ODT1<3>
M_B_DQSP[7:0]<3>
M_B_DQSN[7:0]<3>
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
DIMM1_SA0
DIMM1_SA1
M_B_DM1
M_B_DM2
M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7
JDIM6A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDR3-DIMM1_H=9.2_RVS
DDR3-DIMM1_H=9.2_RVS
DDR-AS0A626-UARN-7F-204P
DDR-AS0A626-UARN-7F-204P
DGMK4000272
DGMK4000272
IC SOCKET DDRIII SO-DIMM(204P,H9.2,RVS)
IC SOCKET DDRIII SO-DIMM(204P,H9.2,RVS)
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
(204P)
(204P)
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
M_B_DQ5
5
M_B_DQ4
7
M_B_DQ3
15
M_B_DQ2
17
M_B_DQ0
4
M_B_DQ1
6
M_B_DQ6
16
M_B_DQ7
18
M_B_DQ12
21
M_B_DQ13
23
M_B_DQ14
33
M_B_DQ10
35
M_B_DQ8
22
M_B_DQ9
24
M_B_DQ11
34
M_B_DQ15
36
M_B_DQ20
39
M_B_DQ21
41
M_B_DQ18
51
M_B_DQ22
53
M_B_DQ17
40
M_B_DQ16
42
M_B_DQ19
50
M_B_DQ23
52
M_B_DQ25
57
M_B_DQ29
59
M_B_DQ27
67
M_B_DQ26
69
M_B_DQ28
56
M_B_DQ24
58
M_B_DQ31
68
M_B_DQ30
70
M_B_DQ36
129
M_B_DQ37
131
M_B_DQ35
141
M_B_DQ34
143
M_B_DQ33
130
M_B_DQ32
132
M_B_DQ39
140
M_B_DQ38
142
M_B_DQ44
147
M_B_DQ40
149
M_B_DQ42
157
M_B_DQ43
159
M_B_DQ45
146
M_B_DQ41
148
M_B_DQ46
158
M_B_DQ47
160
M_B_DQ49
163
M_B_DQ48
165
M_B_DQ54
175
M_B_DQ55
177
M_B_DQ52
164
M_B_DQ53
166
M_B_DQ50
174
M_B_DQ51
176
M_B_DQ61
181
M_B_DQ56
183
M_B_DQ62
191
M_B_DQ63
193
M_B_DQ57
180
M_B_DQ60
182
M_B_DQ59
192
M_B_DQ58
194
M_B_DQ[63:0] <3>
SMDDR_VREF_DQ1_M1
SMDDR_VREF_DQ1_M3<4>
DDR_VTTREF<4,12,37>
+0.75V_DDR_VTT <12,37,39>
+1.5VSUS <2,4,10,12,37,43>
+3VPCU <7,23,30,31,34,35>
+3V <2,6,7,8,9,10,12,14,18,23,24,25,26,27,28,29,30,31,32,33,39,40,42,43>
SMDDR_VREF_DQ1_M3
R159 *0_6R159 *0_6
+1.5VSUS
R144
R144
1K/F_4
1K/F_4
+SMDDR_VREF_DIMM1
R145
R145
1K/F_4
1K/F_4
DDR3_DRAMRST#<2,12>
R398 *0_6/SR398 *0_6/S
R387 *0_6R387 *0_6
C290
C290
470P/50V_4
470P/50V_4
+SMDDR_VREF_DIMM1
MBCLK2<8,30,33>
MBDATA2<8,30,33>
PM_EXTTS#0<12>
+3V
Place these Caps near So-Dimm1.
+1.5VSUS
C208 1U/6.3V_4C208 1U/6.3V_4
C129 1U/6.3V_4C129 1U/6.3V_4
C181 1U/6.3V_4C181 1U/6.3V_4
del M2 solution
A A
5
4
C171 1U/6.3V_4C171 1U/6.3V_4
C154 10U/6.3VS_6C154 10U/6.3VS_6
C647 10U/6.3VS_6C647 10U/6.3VS_6
C149 10U/6.3VS_6C149 10U/6.3VS_6
C211 10U/6.3VS_6C211 10U/6.3VS_6
C221 10U/6.3VS_6C221 10U/6.3VS_6
C198 *10U/6.3V_6C198 *10U/6.3V_6
C103 10U/6.3V_8C103 10U/6.3V_8
C228 10U/6.3V_8C228 10U/6.3V_8
+0.75V_DDR_VTT
C394 1U/6.3V_4C394 1U/6.3V_4
C398 1U/6.3V_4C398 1U/6.3V_4 C318 2.2U/6.3V_6C318 2.2U/6.3V_6
C399 1U/6.3V_4C399 1U/6.3V_4
C405 1U/6.3V_4C405 1U/6.3V_4
C389 10U/6.3V_6C389 10U/6.3V_6C159 10U/6.3VS_6C159 10U/6.3VS_6
C396 *10U/6.3V_6C396 *10U/6.3V_6
+3V
C385 0.1U/10V_4C385 0.1U/10V_4
C386 2.2U/6.3V_6C386 2.2U/6.3V_6
3
+SMDDR_VREF_DIMM1
C300 0.1U/10V_4C300 0.1U/10V_4
+SMDDR_VREF_DQ1
C585 0.1U/10V_4C585 0.1U/10V_4
C584 2.2U/6.3V_6C584 2.2U/6.3V_6
2
VREF DQ1 M1 Solution
DDR_VTTREF<4,12,37>
SMDDR_VREF_DQ1_M3
DRAMRST_CNTRL_PCH<2,8,12>
NB5
NB5
NB5
1
R415 *0_6R415 *0_6
3
Q31
Q31
2
AO3416
AO3416
PROJECT : R33
PROJECT : R33
PROJECT : R33
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet of
DDR3 DIMM1-RVS (9.2H)
DDR3 DIMM1-RVS (9.2H)
DDR3 DIMM1-RVS (9.2H)
+1.5VSUS
1
R407
R407
1K/F_4
1K/F_4
SMDDR_VREF_DQ1_M1
R406
R406
1K/F_4
1K/F_4
13 43Wednesday, August 31, 2011
13 43Wednesday, August 31, 2011
13 43Wednesday, August 31, 2011
of
of
1A
1A
1A
5
4
U23A
U23A
PART 1 0F 9
PART 1 0F 9
3
2
1
14
PCIE_RX0P
PEG_TX0<2>
D D
C C
B B
PEG_TX#0<2>
PEG_TX1<2>
PEG_TX#1<2>
PEG_TX2<2>
PEG_TX#2<2>
PEG_TX3<2>
PEG_TX#3<2>
PEG_TX4<2>
PEG_TX#4<2>
PEG_TX5<2>
PEG_TX#5<2>
PEG_TX6<2>
PEG_TX#6<2>
PEG_TX7<2>
PEG_TX#7<2>
CLK_PCIE_VGA<8>
CLK_PCIE_VGA#<8>
CLK_PCIE_VGA
CLK_PCIE_VGA#
R117 1K/F_4R117 1K/F_4
PEGX_RST#
AA38
W36
W38
V37
V35
U36
U38
R36
R38
P37
P35
N36
N38
M37
M35
K37
K35
H37
H35
G36
G38
E37
AB35
AA36
AH16
AA30
PCIE_RX0N
Y37
PCIE_RX1P
Y35
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
PCIE_RX4N
T37
PCIE_RX5P
T35
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_RX8P
PCIE_RX8N
PCIE_RX9P
PCIE_RX9N
L36
PCIE_RX10P
L38
PCIE_RX10N
PCI EXPRESS INTERFACE
PCIE_RX11P
PCIE_RX11N
J36
PCIE_RX12P
J38
PCIE_RX12N
PCIE_RX13P
PCIE_RX13N
PCIE_RX14P
PCIE_RX14N
F37
PCIE_RX15P
F35
PCIE_RX15N
CLOCK
CLOCK
PCIE_REFCLKP
PCIE_REFCLKN
TEST_PG
PERSTB
PCI EXPRESS INTERFACE
THAMES_M2_XT
THAMES_M2_XT
CALIBRATION
CALIBRATION
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
PCIE_CALR_TX
PCIE_CALR_RX
Y33
Y32
W33
W32
U33
U32
U30
U29
T33
T32
T30
T29
P33
P32
P30
P29
N33
N32
N30
N29
L33
L32
L30
L29
K33
K32
J33
J32
K30
K29
H33
H32
Y30
Y29
C_PEG_RXP0
C_PEG_RXN0
C_PEG_RXP1
C_PEG_RXN1
C_PEG_RXP2
C_PEG_RXN2
C_PEG_RXP3
C_PEG_RXN3
C_PEG_RXP4
C_PEG_RXN4
C_PEG_RXP5
C_PEG_RXN5
C_PEG_RXP6
C_PEG_RXN6
C_PEG_RXP7
C_PEG_RXN7
PCIE_CALRP
PCIE_CALRN
+3V
C267
4
C267
0.1U/10V_4
0.1U/10V_4
PEGX_RST#
R149
R149
100K_4
100K_4
3
U11
MC74VHC1G08DFT2G
A A
PLTRST#<2,8,26,29,30,33>
DGPU_HOLD_RST#<9>
R140 330_4R140 330_4
MC74VHC1G08DFT2G
DGPU_HIN_RST#
U11
2
1
3 5
5
4
C702 0.1U/10V_4C702 0.1U/10V_4
C704 0.1U/10V_4C704 0.1U/10V_4
C711 0.1U/10V_4C711 0.1U/10V_4
C713 0.1U/10V_4C713 0.1U/10V_4
C705 0.1U/10V_4C705 0.1U/10V_4
C709 0.1U/10V_4C709 0.1U/10V_4
C697 0.1U/10V_4C697 0.1U/10V_4
C700 0.1U/10V_4C700 0.1U/10V_4
C715 0.1U/10V_4C715 0.1U/10V_4
C718 0.1U/10V_4C718 0.1U/10V_4
C693 0.1U/10V_4C693 0.1U/10V_4
C696 0.1U/10V_4C696 0.1U/10V_4
C683 0.1U/10V_4C683 0.1U/10V_4
C688 0.1U/10V_4C688 0.1U/10V_4
C689 0.1U/10V_4C689 0.1U/10V_4
C692 0.1U/10V_4C692 0.1U/10V_4
Chelsea Only
Do not install For Thames
Ra
R142 *1.69K/F_4R142 *1.69K/F_4
Do not install for Chelsea
Install for Thames ONLY
Rb
R147 1.27K/F_4R147 1.27K/F_4
R150 2K/F_4R150 2K/F_4
Rc
Install 2k for Thames
Chelsea Thames
Ra
1.69K n/a
Rb
n/a 1.27K
Rc
1K
2K
NB5
NB5
NB5
2
PEG_RX0 <2>
PEG_RX#0 <2>
PEG_RX1 <2>
PEG_RX#1 <2>
PEG_RX2 <2>
PEG_RX#2 <2>
PEG_RX3 <2>
PEG_RX#3 <2>
PEG_RX4 <2>
PEG_RX#4 <2>
PEG_RX5 <2>
PEG_RX#5 <2>
PEG_RX6 <2>
PEG_RX#6 <2>
PEG_RX7 <2>
PEG_RX#7 <2>
+1.0V_VGA
+1.0V_VGA
+1.0V_VGA<16,18,19,43>
PROJECT : R33
PROJECT : R33
PROJECT : R33
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
THAMES_PCIE_Interface
THAMES_PCIE_Interface
THAMES_PCIE_Interface
Date: Sheet of
Date: Sheet of
Date: Sheet of
+1.0V_VGA
1A
1A
14 43Wednesday, August 31, 2011
14 43Wednesday, August 31, 2011
14 43Wednesday, August 31, 2011
1
1A
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