5
4
3
2
1
Sandy Bridge Processor (DMI,PEG,FDI) Sandy Bridge Processor (CLK,MISC,JTAG)
CPU_DRAMRST#
1
R314
R314
4.99K/F_4
4.99K/F_4
U15A
U15A
DMI_TXN0 6
DMI_TXN1 6
DMI_TXN2 6
DMI_TXN3 6
D D
C C
B B
DMI_TXP0 6
DMI_TXP1 6
DMI_TXP2 6
DMI_TXP3 6
DMI_RXN0 6
DMI_RXN1 6
DMI_RXN2 6
DMI_RXN3 6
DMI_RXP0 6
DMI_RXP1 6
DMI_RXP2 6
DMI_RXP3 6
FDI_TXN0 6
FDI_TXN1 6
FDI_TXN2 6
FDI_TXN3 6
FDI_TXN4 6
FDI_TXN5 6
FDI_TXN6 6
FDI_TXN7 6
FDI_TXP0 6
FDI_TXP1 6
FDI_TXP2 6
FDI_TXP3 6
FDI_TXP4 6
FDI_TXP5 6
FDI_TXP6 6
FDI_TXP7 6
FDI_FSYNC0 6
FDI_FSYNC1 6
FDI_INT 6
FDI_LSYNC0 6
FDI_LSYNC1 6
eDP_COMP
INT_eDP_HPD_Q
eDP_COMP connect to PIN A18 W:4mils/S:15mils/L: 500mils.
eDP_COMP connect to PIN A17 W:12mils/S:15mils/L: 500mils.
B27
DMI_RX#[0]
B25
DMI_RX#[1]
A25
DMI_RX#[2]
B24
DMI_RX#[3]
B28
DMI_RX[0]
B26
DMI_RX[1]
A24
DMI_RX[2]
B23
DMI_RX[3]
G21
DMI_TX#[0]
E22
DMI_TX#[1]
F21
DMI_TX#[2]
D21
DMI_TX#[3]
G22
DMI_TX[0]
D22
DMI_TX[1]
F20
DMI_TX[2]
C21
DMI_TX[3]
A21
FDI0_TX#[0]
H19
FDI0_TX#[1]
E19
FDI0_TX#[2]
F18
FDI0_TX#[3]
B21
FDI1_TX#[0]
C20
FDI1_TX#[1]
D18
FDI1_TX#[2]
E17
FDI1_TX#[3]
A22
FDI0_TX[0]
G19
FDI0_TX[1]
E20
FDI0_TX[2]
G18
FDI0_TX[3]
B20
FDI1_TX[0]
C19
FDI1_TX[1]
D19
FDI1_TX[2]
F17
FDI1_TX[3]
J18
FDI0_FSYNC
J17
FDI1_FSYNC
H20
FDI_INT
J19
FDI0_LSYNC
H17
FDI1_LSYNC
A18
eDP_COMPIO
A17
eDP_ICOMPO
B16
eDP_HPD
C15
eDP_AUX
D15
eDP_AUX#
C17
eDP_TX[0]
F16
eDP_TX[1]
C16
eDP_TX[2]
G15
eDP_TX[3]
C18
eDP_TX#[0]
E16
eDP_TX#[1]
D16
eDP_TX#[2]
F15
eDP_TX#[3]
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000005
DGG^9000005
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
DMI
DMI
Intel(R) FDI
Intel(R) FDI
eDP
eDP
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PCI EXPRESS* - GRAPHICS
PCI EXPRESS* - GRAPHICS
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
J22
J21
H22
K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32
J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32
M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25
M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25
PEG_COMP
PEG_RX#0
PEG_RX#1
PEG_RX#2
PEG_RX#3
PEG_RX#4
PEG_RX#5
PEG_RX#6
PEG_RX#7
PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
PEG_RX6
PEG_RX7
C_PEG_TX#0
C_PEG_TX#1
C_PEG_TX#2
C_PEG_TX#3
C_PEG_TX#4
C_PEG_TX#5
C_PEG_TX#6
C_PEG_TX#7
C_PEG_TX0
C_PEG_TX1
C_PEG_TX2
C_PEG_TX3
C_PEG_TX4
C_PEG_TX5
C_PEG_TX6
C_PEG_TX7
PEG_COMP connect to PIN H22&J22 W:4mils/S:15mils/L: 500mils.
PEG_COMP connect to PIN J21 W:12mils/S:15mils/L: 500mils.
PEG_RX#[0..7] 14
SNB_IVB# N.A at SNB EDS #27637 0.7v1
PEG_RX[0..7] 14
9/15 SI for H/W.
CPU RESET#
PLTRST# 8,14,24,27,29,30
SM_DRAMPWROK Processor Input. DDR3 DRAM RESET
H_SNB_IVB# 7
TP4TP4
Placement close to EC.
EC_PECI 29
H_PROCHOT# 29,33
PM_THRMTRIP# 9,29
PM_SYNC 6
H_PWRGOOD 9
+1.05V_VTT
U18
U18
GND3OUT
2
IN
1
*74LVC1G07GW
*74LVC1G07GW
R402 1.5K/F_4 R402 1.5K/F_4
+3VS5 +3VS5
CPU_PLTRST# CPU_PLTRST#_R CPU_PLTRST#_R
4
+3VS5
C560
VCC5NC
R49
R49
10K_4
10K_4
PM_DRAM_PWRGD_PU
R48
R48
*0_4
*0_4
R47 0_4 R47 0_4
C560
0.1U/10V_4
0.1U/10V_4
PM_DRAM_PWRGD 6
TP2TP2
R386 43_4 R 386 43_4
R146 56.2/F_4 R146 56.2/F_4
R148 0_4 R148 0_4
R377 0_4 R377 0_4
R378 0_4 R378 0_4
R384 10K_4 R384 10K_4
R404 *75/F_4 R404 *75/F_4
R400 *43_4 R400 *43_4
U2
U2
1
VCC5NC
2
IN
GND3OUT
*74LVC1G07GW
*74LVC1G07GW
PM_DRAM_PWRGD_R
R43
R43
*3K/F_4
*3K/F_4
SKTOCC#
TP_CATERR#
H_PECI
H_PROCHOT#_R
PM_THRMTRIP#_R
PM_SYNC_R
H_PWRGOOD_R
PM_DRAM_PWRGD_R
R401
R401
750/F_4
750/F_4
C27
C27
0.1U/10V_4
0.1U/10V_4
PM_DRAM_PWRGD_C
4
3
Q3
*2N7002Q3*2N7002
1
U15B
U15B
C26
SNB_IVB#
AN34
SKTOCC#
AL33
CATERR#
AN33
PECI
AL32
PROCHOT#
AN32
THERMTRIP#
AM34
PM_SYNC
AP33
UNCOREPWRGOOD
V8
SM_DRAMPWROK
AR33
RESET#
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000005
DGG^9000005
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
+1.5V_CPU
R40
R40
200/F_4
200/F_4
R42 130/F_4 R42 130/F_4
R37
R37
*39_4
*39_4
MAIN_ONG 4,38
2
MISC THERMAL PWR MANAGEMENT
MISC THERMAL PWR MANAGEMENT
PM_DRAM_PWRGD_R
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
CLOCKS
CLOCKS
DDR3
MISC
DDR3
MISC
JTAG & BPM
JTAG & BPM
BCLK
BCLK#
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
PRDY#
PREQ#
TCK
TMS
TRST#
TDO
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
DDR3_DRAMRST# 12,13
DRAMRST_CNTRL_PCH 8
A28
A27
A16
A15
R8
AK1
A5
A4
SM_RCOMP[0] W:20mils/S:20mils/L: 500mils,
SM_RCOMP[1] W:20mils/S:20mils/L: 500mils,
SM_RCOMP[2] W:15mils/S:20mils/L: 500mils,
AP29
AP27
AR26
AR27
AP30
AR28
TDI
AP26
AL35
AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32
+1.5VSUS
+1.05V_VTT 4,6,7,8,10,29,32,33
+1.5V_CPU 4
+3VS5 6,7,8,9,10,22,26,31,32,38,39
+3V 6,7,8,9,10,12,13,14,17,20,21,22,23,24,25,27,28,29,30,33,38,39
CLK_CPU_BCLKP 8
CLK_CPU_BCLKN 8
CLK_DPLL_SSCLKP
CLK_DPLL_SSCLKN
CPU_DRAMRST#
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
XDP_PRDY#
XDP_PREQ#
XDP_TCLK
XDP_TMS
XDP_TRST#
XDP_TDI_R
XDP_TDO
XDP_DBRST#
XDP_BPM0
XDP_BPM1
XDP_BPM2
XDP_BPM3
XDP_BPM4
XDP_BPM5
XDP_BPM6
XDP_BPM7
R143 140/F_4 R143 140/F_4
R318 26.1/F_4 R318 26.1/F_4
R316 200/F_4 R316 200/F_4
R311 1K_4 R311 1K_4
R312 1K_4 R312 1K_4
CPU_DRAMRST#_R
R315 0_4 R315 0_4
TP12TP12
TP11TP11
TP8TP8
TP10TP10
TP13TP13
TP39TP39
TP7TP7
R375 *1K_4 R375 *1K_4
XDP_DBRST# 6
TP40TP40
TP41TP41
TP43TP43
TP42TP42
TP5TP5
TP45TP45
TP44TP44
TP46TP46
R313 *0_4 R313 *0_4
3
C442
C442
0.047U/10V_4
0.047U/10V_4
CPU XDP
+3V
Q24
Q24
2
2N7002
2N7002
FDI disable
(DIS only stuff)
A A
FDI_FSYNC can gang all these 4
signals togeth er and tie them
with only one 1K resistor to GND
(DG V0.5 Ch2.2.9).
DEL
PEG x16 disable (UMA only remove)
PEG_TX[0..7] 14 PEG_TX#[0..7] 14
C_PEG_TX0
C_PEG_TX1
C_PEG_TX2
C_PEG_TX3
C_PEG_TX4
C_PEG_TX5
C_PEG_TX6
C_PEG_TX7
C483 0.1U/10V_4 C483 0.1U/10V_4
C489 0.1U/10V_4 C489 0.1U/10V_4
C492 0.1U/10V_4 C492 0.1U/10V_4
C498 0.1U/10V_4 C498 0.1U/10V_4
C501 0.1U/10V_4 C501 0.1U/10V_4
C504 0.1U/10V_4 C504 0.1U/10V_4
C508 0.1U/10V_4 C508 0.1U/10V_4
C512 0.1U/10V_4 C512 0.1U/10V_4
0.22uF AC coupling Caps for PCIE GEN1/2/3 0.22uF AC coupling Caps for PCIE GEN1/2/3
5
PEG_TX0
PEG_TX1
PEG_TX2
PEG_TX3
PEG_TX4
PEG_TX5
PEG_TX6
PEG_TX7
C_PEG_TX#0
C_PEG_TX#1
C_PEG_TX#2
C_PEG_TX#3
C_PEG_TX#4
C_PEG_TX#5
C_PEG_TX#6
C_PEG_TX#7
4
C488 0.1U/10V_4 C488 0.1U/10V_4
C490 0.1U/10V_4 C490 0.1U/10V_4
C496 0.1U/10V_4 C496 0.1U/10V_4
C500 0.1U/10V_4 C500 0.1U/10V_4
C503 0.1U/10V_4 C503 0.1U/10V_4
C507 0.1U/10V_4 C507 0.1U/10V_4
C511 0.1U/10V_4 C511 0.1U/10V_4
C517 0.1U/10V_4 C517 0.1U/10V_4
PEG_TX#0
PEG_TX#1
PEG_TX#2
PEG_TX#3
PEG_TX#4
PEG_TX#5
PEG_TX#6
PEG_TX#7
Embedded Display PLL Clock
3/26 DB change
Ra
CLK_DPLL_SSCLKP
CLK_DPLL_SSCLKN
Part reference.
CLK_DPLL_SSCLKP 8
CLK_DPLL_SSCLKN 8
DEL
Ra Rb Rc
NC DIS
3
Stuff
Stuff Stuff
NC NC
SG/UMA
DP & PEG Compensation
+1.05V_VTT
+1.05V_VTT
eDP_COMPIO and ICOMPO signals should be shorted
near balls and routed with typical impedance <25 mohms
+1.05V_VTT
PEG_ICOMPI and RCOMPO signals
should be routed within 500 mils typical
impedance = 43 mohms PEG_ICOMPO
signals should be routed within 500 mils
typical impedance = 14.5 mohms
R67 10K_4 R67 10K_4
R319 24.9/F_4 R319 24.9/F_4
R85 24.9/F_4 R85 24.9/F_4
2
INT_eDP_HPD_Q
eDP_COMP
PEG_COMP
1%
1%
1%
Processor pull-up (CPU)
H_PROCHOT#
XDP_TDO
XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TCLK
XDP_TRST#
352-(&75
352-(&75
352-(&75
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
R145 62_4 R145 62_4
R155 51_4 R155 51_4
R159 51_4 R159 51_4
R403 51_4 R403 51_4
R158 *51_4 R158 *51_4
R156 51_4 R156 51_4
R163 51_4 R163 51_4
SNB 1/4 (PCIE&DMI&FDI)
SNB 1/4 (PCIE&DMI&FDI)
SNB 1/4 (PCIE&DMI&FDI)
1
+1.05V_VTT
23 9 Saturday, Sep tember 18, 2010
23 9 Saturday, Sep tember 18, 2010
23 9 Saturday, Sep tember 18, 2010
3A
3A
3A
5
4
3
2
1
Sandy Bridge Processor (DDR3)
U15C
U15C
D D
M_A_DQ[63:0] 12
C C
B B
M_A_BS#0 12
M_A_BS#1 12
M_A_BS#2 12
M_A_CAS# 12
M_A_RAS# 12
M_A_WE# 12
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
G10
N10
M10
AG6
AG5
AK6
AK5
AH5
AH6
AJ5
AJ6
AJ8
AK8
AJ9
AK9
AH8
AH9
AL9
AL8
AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15
AE10
AF10
AE8
AD9
AF9
F10
C5
D5
D3
D2
D6
C6
C2
C3
F8
G9
F9
F7
G8
G7
K4
K5
K1
J1
J5
J4
J2
K2
M8
N8
N7
M9
N9
M7
V6
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_CLK[0]
SA_CLK#[0]
SA_CKE[0]
SA_CLK[1]
SA_CLK#[1]
SA_CKE[1]
SA_CLK[2]
SA_CLK#[2]
SA_CKE[2]
SA_CLK[3]
SA_CLK#[3]
SA_CKE[3]
SA_CS#[0]
SA_CS#[1]
SA_CS#[2]
SA_CS#[3]
SA_ODT[0]
SA_ODT[1]
SA_ODT[2]
SA_ODT[3]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AB6
AA6
V9
AA5
AB5
V10
AB4
AA4
W9
AB3
AA3
W10
AK3
AL3
AG1
AH1
AH3
AG3
AG2
AH2
C4
G6
J3
M6
AL6
AM8
AR12
AM15
D4
F6
K3
N6
AL5
AM9
AR11
AM14
AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_CLKP0 12
M_A_CLKN0 12
M_A_CKE0 12
M_A_CLKP1 12
M_A_CLKN1 12
M_A_CKE1 12
M_A_CS#0 12
M_A_CS#1 12
M_A_ODT0 12
M_A_ODT1 12
M_A_DQSN[7:0] 12
M_A_DQSP[7:0] 12
M_A_A[15:0] 12
M_B_DQ[63:0] 13
M_B_BS#0 13
M_B_BS#1 13
M_B_BS#2 13
M_B_CAS# 13
M_B_RAS# 13
M_B_WE# 13
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
D10
K10
AM5
AM6
AR3
AP3
AN3
AN2
AN1
AP2
AP5
AN9
AT5
AT6
AP6
AN8
AR6
AR5
AR9
AJ11
AT8
AT9
AH11
AR8
AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15
AA9
AA7
AA10
AB8
AB9
J10
C9
A7
C8
A9
A8
D9
D8
G4
F4
F1
G1
G5
F5
F2
G2
J7
J8
K9
J9
K8
K7
M5
N4
N2
N1
M4
N5
M2
M1
R6
U15D
U15D
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CAS#
SB_RAS#
SB_WE#
AE2
SB_CLK[0]
AD2
SB_CLK#[0]
R9
SB_CKE[0]
AE1
SB_CLK[1]
AD1
SB_CLK#[1]
R10
SB_CKE[1]
AB2
SB_CLK[2]
AA2
SB_CLK#[2]
T9
SB_CKE[2]
AA1
SB_CLK[3]
AB1
SB_CLK#[3]
T10
SB_CKE[3]
AD3
SB_CS#[0]
AE3
SB_CS#[1]
AD6
SB_CS#[2]
AE6
SB_CS#[3]
AE4
SB_ODT[0]
AD4
SB_ODT[1]
AD5
SB_ODT[2]
AE5
SB_ODT[3]
M_B_DQSN0
D7
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_DQS[7]
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
F3
K6
N3
AN5
AP9
AK12
AP15
C7
G3
J6
M3
AN6
AP8
AK11
AP14
AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7
M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_CLKP0 13
M_B_CLKN0 13
M_B_CKE0 13
M_B_CLKP1 13
M_B_CLKN1 13
M_B_CKE1 13
M_B_CS#0 13
M_B_CS#1 13
M_B_ODT0 13
M_B_ODT1 13
M_B_DQSN[7:0] 13
M_B_DQSP[7:0] 13
M_B_A[15:0] 13
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000005
DGG^9000005
IC SOCKET RPGA 989P(P1.0,M/H3.0)
A A
5
IC SOCKET RPGA 989P(P1.0,M/H3.0)
4
3
Sandy Bridge_rPGA_Re v 0 p61
Sandy Bridge_rPGA_Re v 0 p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000005
DGG^9000005
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
2
352-(&75
352-(&75
352-(&75
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
1%
1%
1%
Date: Sheet of
Date: Sheet of
Date: Sheet of
SNB 2/4 (DDR3 I/F)
SNB 2/4 (DDR3 I/F)
SNB 2/4 (DDR3 I/F)
1
3A
1A
3A
1A
3A
33 9 Saturday, Sep tember 18, 2010
33 9 Saturday, Sep tember 18, 2010
33 9 Saturday, Sep tember 18, 2010
1A
5
4
3
2
1
Sandy Bridge Processor (POWER) Sandy Bridge Processor (GRAPHIC POWER)
U15G
U15F
SNB: 55A
C493
C493
D D
22U/6.3VS_8
22U/6.3VS_8
C42
C42
22U/6.3VS_8
22U/6.3VS_8
C509
C509
22U/6.3VS_8
22U/6.3VS_8
C300
C300
22U/6.3VS_8
22U/6.3VS_8
C C
C177
C177
22U/6.3VS_8
22U/6.3VS_8
C151
C151
22U/6.3VS_8
22U/6.3VS_8
C237
C237
22U/6.3VS_8
22U/6.3VS_8
C535
C535
*22U/6.3VS_8
*22U/6.3VS_8
B B
C173
C173
22U/6.3VS_8
22U/6.3VS_8
C450
C450
22U/6.3VS_8
22U/6.3VS_8
22uF_8 x8 Socket TOP cavity
22uF_8 x10 Socket BOT cavity
22uF_8 x8 Socket TOP edge
470uF_7343 x4
C521
C521
10U/6.3VS_6
10U/6.3VS_6
C36
C36
22U/6.3VS_8
22U/6.3VS_8
C172
C172
22U/6.3VS_8
22U/6.3VS_8
C39
C39
22U/6.3VS_8
22U/6.3VS_8
C527
C527
*10U/6.3V_6S
*10U/6.3V_6S
C286
C286
22U/6.3VS_8
22U/6.3VS_8
C242
C242
22U/6.3VS_8
22U/6.3VS_8
C220
C220
*22U/6.3VS_8
*22U/6.3VS_8
C515
C515
10U/6.3VS_6
10U/6.3VS_6
C451
C451
22U/6.3VS_8
22U/6.3VS_8
+VCC_CORE
C516
C516
22U/6.3VS_8
22U/6.3VS_8
C174
C174
22U/6.3VS_8
22U/6.3VS_8
C263
C263
22U/6.3VS_8
22U/6.3VS_8
C502
C502
22U/6.3VS_8
22U/6.3VS_8
C33
C33
22U/6.3VS_8
22U/6.3VS_8
C283
C283
22U/6.3VS_8
22U/6.3VS_8
C163
C163
22U/6.3VS_8
22U/6.3VS_8
C447
C447
22U/6.3VS_8
22U/6.3VS_8
C270
C270
22U/6.3VS_8
22U/6.3VS_8
C542
C542
*10U/6.3V_6S
*10U/6.3V_6S
3/26 DB change 10U FP to 0805.
A A
+VCC_CORE 22,34
+VCC_GFX 34
+VCCSA 36
+1.05V_VTT 2,6,7,8,10,29,32,33
+1.5V_CPU 2
+1.5V_CPU 2
+1.5VSUS 2,10,12,13,22,35,39
5
U15F
AG35
VCC1
AG34
VCC2
AG33
VCC3
AG32
VCC4
AG31
VCC5
AG30
VCC6
AG29
VCC7
AG28
VCC8
AG27
VCC9
AG26
VCC10
AF35
VCC11
AF34
VCC12
AF33
VCC13
AF32
VCC14
AF31
VCC15
AF30
VCC16
AF29
VCC17
AF28
VCC18
AF27
VCC19
AF26
VCC20
AD35
VCC21
AD34
VCC22
AD33
VCC23
AD32
VCC24
AD31
VCC25
AD30
VCC26
AD29
VCC27
AD28
VCC28
AD27
VCC29
AD26
VCC30
AC35
VCC31
AC34
VCC32
AC33
VCC33
AC32
VCC34
AC31
VCC35
AC30
VCC36
AC29
VCC37
AC28
VCC38
AC27
VCC39
AC26
VCC40
AA35
VCC41
AA34
VCC42
AA33
VCC43
AA32
VCC44
AA31
VCC45
AA30
VCC46
AA29
VCC47
AA28
VCC48
AA27
VCC49
AA26
VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56
Y29
VCC57
Y28
VCC58
Y27
VCC59
Y26
VCC60
V35
VCC61
V34
VCC62
V33
VCC63
V32
VCC64
V31
VCC65
V30
VCC66
V29
VCC67
V28
VCC68
V27
VCC69
V26
VCC70
U35
VCC71
U34
VCC72
U33
VCC73
U32
VCC74
U31
VCC75
U30
VCC76
U29
VCC77
U28
VCC78
U27
VCC79
U26
VCC80
R35
VCC81
R34
VCC82
R33
VCC83
R32
VCC84
R31
VCC85
R30
VCC86
R29
VCC87
R28
VCC88
R27
VCC89
R26
VCC90
P35
VCC91
P34
VCC92
P33
VCC93
P32
VCC94
P31
VCC95
P30
VCC96
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100
Sandy Bridge_rPGA_Rev0p61
Sandy Bridge_rPGA_Rev0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000005
DGG^9000005
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8
VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24
VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
PEG AND DDR
PEG AND DDR
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39
VCCIO40
CORE SUPPLY
CORE SUPPLY
SENSE LINES SVID
SENSE LINES SVID
VIDALERT#
VIDSCLK
VIDSOUT
VCC_SENSE
VSS_SENSE
VCCIO_SENSE
VSSIO_SENSE
4
AH13
SNB: 8.5A
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12
E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
J23
AJ29
AJ30
AJ28
AJ35
AJ34
B10
A10
C145
C145
22U/6.3VS_8
22U/6.3VS_8
C260
C260
22U/6.3VS_8
22U/6.3VS_8
C146
C146
*22U/6.3VS_8
*22U/6.3VS_8
C532
C532
*22U/6.3VS_8
*22U/6.3VS_8
C491
C491
22U/6.3VS_8
22U/6.3VS_8
C167
C167
*22U/6.3VS_8
*22U/6.3VS_8
C513
C513
*22U/6.3VS_8
*22U/6.3VS_8
22uF_8 x7 Socket TOP cavity
22uF_8 x5 Socket BOT cavity
22uF_8 x2 Socket TOP cavity (no stuff)
22uF_8 x5 Socket BOT cavity (no stuff)
330uF_7343 x2
+1.05V_VTT_40
H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT
R86 *0_4/S R86 *0_4/S
R136 100_4 R136 100_4
R139 100_4 R139 100_4
VSSP_SENSE
Trace Route to Po wer IC area.
C147
C147
22U/6.3VS_8
22U/6.3VS_8
C180
C180
22U/6.3VS_8
22U/6.3VS_8
C215
C215
22U/6.3VS_8
22U/6.3VS_8
C200
C200
*22U/6.3VS_8
*22U/6.3VS_8
5/14 modify
C66
C66
*22U/6.3VS_8
*22U/6.3VS_8
C506
C506
22U/6.3VS_8
22U/6.3VS_8
C499
C499
22U/6.3VS_8
22U/6.3VS_8
+1.05V_VTT
VCC_SENSE 33
VSS_SENSE 33
VCCP_SENSE 32
+1.05V_VTT
C482
C482
22U/6.3VS_8
22U/6.3VS_8
C166
C166
22U/6.3VS_8
22U/6.3VS_8
C526
C526
22U/6.3VS_8
22U/6.3VS_8
C61
C61
*22U/6.3VS_8
*22U/6.3VS_8
C282
C282
*22U/6.3VS_8
*22U/6.3VS_8
C236
C236
*22U/6.3VS_8
*22U/6.3VS_8
C158
C158
22U/6.3VS_8
22U/6.3VS_8
+VCC_CORE
VSSP_SENSE 32
22uF_8 x2 Socket TOP cavity
22uF_8 x2 Socket BOT cavity
22uF_8 x4 Socket TOP edge
22uF_8 x4 Socket BOT edge
470uF_7343 x2
+VCC_GFX
+1.8V
SNB: 1.5A
C441
C441
C449
C449
10U/6.3V_8
10U/6.3V_8
1U/6.3V_4
1U/6.3V_4
330uF x1, 10uF_8 x1, 1uF_4 x2
Socket BOT edge.
Layout note: need routing
together and ALERT need
between CLK and DATA.
H_CPU_SVIDCLK
Place PU resistor
close to CPU
H_CPU_SVIDDAT
Place PU resistor close to CPU
H_CPU_SVIDALRT#
3
SNB: 21.5A
C529
C529
22U/6.3V_8
22U/6.3V_8
C285
C285
22U/6.3V_8
22U/6.3V_8
C284
C284
22U/6.3V_8
22U/6.3V_8
C301
C301
22U/6.3V_8
22U/6.3V_8
C528
C528
22U/6.3V_8
22U/6.3V_8
C265
C265
22U/6.3V_8
22U/6.3V_8
C264
C264
22U/6.3V_8
22U/6.3V_8
C299
C299
22U/6.3V_8
22U/6.3V_8
C530
C530
22U/6.3V_8
22U/6.3V_8
C238
C238
22U/6.3V_8
22U/6.3V_8
C239
C239
22U/6.3V_8
22U/6.3V_8
C531
C531
22U/6.3V_8
22U/6.3V_8
DEL
DISNCSG/UMA
Ra Stuff
C443
C443
1U/6.3V_4
1U/6.3V_4
+1.05V_VTT +1.05V_VTT
+1.05V_VTT
+
+
C440
C440
330U/2V_7343
330U/2V_7343
R137
R137
130/F_4
130/F_4
R26 75/F_4 R26 75/F_4
R25 43_4 R25 43_4
U15G
AT24
VAXG1
AT23
VAXG2
AT21
VAXG3
AT20
VAXG4
AT18
VAXG5
AT17
VAXG6
AR24
VAXG7
AR23
VAXG8
AR21
VAXG9
AR20
VAXG10
AR18
VAXG11
AR17
VAXG12
AP24
VAXG13
AP23
VAXG14
AP21
VAXG15
AP20
VAXG16
AP18
VAXG17
AP17
VAXG18
AN24
VAXG19
AN23
VAXG20
AN21
VAXG21
AN20
VAXG22
AN18
VAXG23
AN17
VAXG24
AM24
VAXG25
AM23
VAXG26
AM21
VAXG27
AM20
VAXG28
AM18
VAXG29
AM17
VAXG30
AL24
VAXG31
AL23
VAXG32
AL21
VAXG33
AL20
VAXG34
AL18
VAXG35
AL17
VAXG36
AK24
VAXG37
AK23
VAXG38
AK21
VAXG39
AK20
VAXG40
AK18
VAXG41
AK17
VAXG42
AJ24
VAXG43
AJ23
VAXG44
AJ21
VAXG45
AJ20
VAXG46
AJ18
VAXG47
AJ17
VAXG48
AH24
VAXG49
AH23
VAXG50
AH21
VAXG51
AH20
VAXG52
AH18
VAXG53
AH17
VAXG54
B6
VCCPLL1
A6
VCCPLL2
A2
VCCPLL3
Sandy Bridge_r PGA_Re v0p61
Sandy Bridge_r PGA_Re v0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000005
DGG^9000005
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
Place PU resistor
close to VR
R309 *54.9/F_4 R309 *54.9/F_4
Place PU resistor
R308
R308
close to VR
*130/F_4
*130/F_4
VSSAXG_SENSE
SENSE
LINES
SENSE
LINES
VREF MISC
VREF MISC
GRAPHICS
GRAPHICS
DDR3 -1.5V RAILS
DDR3 -1.5V RAILS
SA RAIL
SA RAIL
VCCSA_SENSE
1.8V RAIL
1.8V RAIL
+1.5V_CPU +1.5V
SVID CLK
+1.05V_VTT
VR_SVID_CLK 33
SVID DATA
VR_SVID_DATA 33
SVID ALERT
VR_SVID_ALERT# 33
2
VAXG_SENSE
SM_VREF
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8
FC_C22
VCCSA_VID1
AK35
AK34
+VDDR_REF_CPU
AL1
AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1
M27
M26
L26
J26
J25
J24
H26
H25
VCCUSA_SENSE_R
H23
H_FC_C22
C22
C24
R310 *0_8/S R310 *0_8/S
Q36
Q36
AON7410
AON7410
5 2
MAIND
1%
1%
1%
R31
R31
100K_4
100K_4
1
C297
C297
10U/6.3V_6
10U/6.3V_6
R140 100_4 R140 100_4
R142 100_4 R142 100_4
CAD Note: +VDDR_REF_CPU should
have 10 mil trace width
R28 *0_8 R28 *0_8
Q2
2N7002Q22N7002
2
MAIND
C214
C214
10U/6.3V_8
10U/6.3V_8
+VCC_GFX
VCC_AXG_SENSE 33
VSS_AXG_SENSE 33
DDR_VTTREF 12,13,35
3
MAIND 38
SNB: 5A
+1.5V_CPU
C289
C289
10U/6.3V_6
10U/6.3V_6
C268
C268
10U/6.3V_6
10U/6.3V_6
4/27: layout modify
9/10 SI for H/W.
1 2
+
+
C576
C190
C190
10U/6.3V_6
10U/6.3V_6
C305
C305
10U/6.3V_6
10U/6.3V_6
C576
*330U_2.5V_5.0x5.9_ESR10m
*330U_2.5V_5.0x5.9_ESR10m
330uF x1, 10uF_8 x6 Socket BO T edge.
+VCCSA
SNB: 6A
C448
C448
C485
C485
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
330uF x1, 10uF_8 x1 Socket BO T edge,
10uF_8 x2 Socket BOT cavity.
R82 0_4 R82 0_4
R77 10K_4 R77 10K_4
R81 10K_4 R81 10K_4
C484
C484
10U/6.3V_8
10U/6.3V_8
VCCUSA_SENSE 36
VCCSA_SEL 36
C445
C445
*10U/6.3V_8
*10U/6.3V_8
5/11: Add for intel CRB
40mile routing
+1.5V_CPU +1.5VSUS
C455 0.1U/10V_4 C455 0.1U/10V_4
C452 0.1U/10V_4 C452 0.1U/10V_4
C554 0.1U/10V_4 C554 0.1U/10V_4
R185
R185
1
220_8
220_8
3
4
C438
C438
*470P/50V_4
*470P/50V_4
352-(&75
352-(&75
352-(&75
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
Date: Sheet of
SNB 3/4 (POWER)
SNB 3/4 (POWER)
SNB 3/4 (POWER)
C558 0.1U/10V_4 C558 0.1U/10V_4
3
3/26 DB add for Intel .
Placement close to CPU.
2
Q16
Q16
2N7002
2N7002
1
1
CPU VDDQ
MAIN_ONG 2,38
43 9 Saturday, Sep tember 18, 2010
43 9 Saturday, Sep tember 18, 2010
43 9 Saturday, Sep tember 18, 2010
+1.5VSUS
of
3A
1A
3A
1A
3A
1A
5
4
3
2
1
Sandy Bridge Processor (GND)
U15H
U15H
AT35
VSS1
AT32
VSS2
AT29
VSS3
AT27
VSS4
AT25
VSS5
AT22
VSS6
AT19
D D
C C
B B
AT16
AT13
AT10
AR25
AR22
AR19
AR16
AR13
AR10
AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10
AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10
AM29
AM25
AM22
AM19
AM16
AM13
AM10
AM7
AM4
AM3
AM2
AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10
AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10
AJ25
AT7
AT4
AT3
AR7
AR4
AR2
AP7
AP4
AP1
AN7
AN4
AL7
AL4
AL2
AK7
AK4
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS
VSS
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH26
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2
M34
H33
H30
H27
H24
H21
H18
H15
H13
H10
G35
G32
G29
G26
G23
G20
G17
G11
U15I
U15I
T35
VSS161
T34
VSS162
T33
VSS163
T32
VSS164
T31
VSS165
T30
VSS166
T29
VSS167
T28
VSS168
T27
VSS169
T26
VSS170
P9
VSS171
P8
VSS172
P6
VSS173
P5
VSS174
P3
VSS175
P2
VSS176
N35
VSS177
N34
VSS178
N33
VSS179
N32
VSS180
N31
VSS181
N30
VSS182
N29
VSS183
N28
VSS184
N27
VSS185
N26
VSS186
VSS187
L33
VSS188
L30
VSS189
L27
VSS190
L9
VSS191
L8
VSS192
L6
VSS193
L5
VSS194
L4
VSS195
L3
VSS196
L2
VSS197
L1
VSS198
K35
VSS199
K32
VSS200
K29
VSS201
K26
VSS202
J34
VSS203
J31
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
H9
VSS214
H8
VSS215
H7
VSS216
H6
VSS217
H5
VSS218
H4
VSS219
H3
VSS220
H2
VSS221
H1
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
F34
VSS231
F31
VSS232
F29
VSS233
VSS
VSS
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3
SMDDR_VREF_DQ0_M3 12
SMDDR_VREF_DQ1_M3 13
H_VTTVID1 32
Sandy Bridge Processor (RESERVED, CFG)
U15E
U15E
For CPU debug.
TP6TP6
TP3TP3
TP9TP9
TP1TP1
R321
R321
*1K_4
*1K_4
R320 0_4 R320 0_4
CFG0
CFG2
CFG4
CFG5
CFG6
CFG7 CFG7
R317
R317
*1K_4
*1K_4
AK28
CFG[0]
AK29
CFG[1]
AL26
CFG[2]
AL27
CFG[3]
AK26
CFG[4]
AL29
CFG[5]
AL30
CFG[6]
AM31
CFG[7]
AM32
CFG[8]
AM30
CFG[9]
AM28
CFG[10]
AM26
CFG[11]
AN28
CFG[12]
AN31
CFG[13]
AN26
CFG[14]
AM27
CFG[15]
AK31
CFG[16]
AN29
CFG[17]
AJ31
RSVD1
AH31
RSVD2
AJ33
RSVD3
AH33
RSVD4
AJ26
RSVD5
B4
RSVD6
D1
RSVD7
F25
RSVD8
F24
RSVD9
F23
RSVD10
D24
RSVD11
G25
RSVD12
G24
RSVD13
E23
RSVD14
D23
RSVD15
C30
RSVD16
A31
RSVD17
B30
RSVD18
B29
RSVD19
D30
RSVD20
B31
RSVD21
A30
RSVD22
C29
RSVD23
J20
RSVD24
B18
RSVD25
A19
RSVD26
J15
RSVD27
Sandy Bridge_r PGA_Re v0p61
Sandy Bridge_r PGA_Re v0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000005
DGG^9000005
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
RESERVED
RESERVED
L7
RSVD28
AG7
RSVD29
AE7
RSVD30
AK2
RSVD31
W8
RSVD32
AT26
RSVD33
AM33
RSVD34
AJ27
RSVD35
T8
RSVD37
J16
RSVD38
H16
RSVD39
G16
RSVD40
AR35
RSVD41
AT34
RSVD42
AT33
RSVD43
AP35
RSVD44
AR34
RSVD45
B34
RSVD46
A33
RSVD47
A34
RSVD48
B35
RSVD49
C35
RSVD50
AJ32
RSVD51
AK32
RSVD52
AH27
RSVD53
AN35
RSVD54
AM35
RSVD55
#27636 SNB EDS0.7v1 no function.
AT2
RSVD56
AT1
RSVD57
AR1
RSVD58
For rPGA socket, RSVD59 pin should be left NC.
B1
KEY
TP38TP38
TP37TP37
Sandy Bridge_r PGA_Re v0p61
Sandy Bridge_r PGA_Re v0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000005
DGG^9000005
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
Processor Strapping
The CFG signals have a default value of '1' if not terminat ed on the board.
10
A A
CFG2
(PEG Static Lane Reversal)
CFG4
(DP Presence Strap)
CFG7
(PEG Defer Training)
5
Normal Operation Lane Reversed
Disable; No physical DP attached to eDP
PEG train immediately following
xxRESETB de assertion
Sandy Bridge_r PGA_Re v0p61
Sandy Bridge_r PGA_Re v0p61
rpga989-47989-socket
rpga989-47989-socket
DGG^9000005
DGG^9000005
IC SOCKET RPGA 989P(P1.0,M/H3.0)
IC SOCKET RPGA 989P(P1.0,M/H3.0)
4
Enable; An ext DP device is connected to eDP
PEG wait for BIOS training
CFG[6:5] (PCIE Port Bifurcation Straps)
11: (Default) x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
CFG2
R153 *1K_4 R153 *1K_4
CFG4
R154 *1K_4 R154 *1K_4
CFG7
R149 *1K_4 R149 *1K_4
CFG5
R152 1K_4 R152 1K_4
CFG6
R147 1K_4 R147 1K_4
3
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
352-(&75
352-(&75
352-(&75
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
1%
1%
1%
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
SNB 4/4 (GND)
SNB 4/4 (GND)
SNB 4/4 (GND)
1
3A
1A
3A
1A
3A
53 9 Saturday, Sep tember 18, 2010
53 9 Saturday, Sep tember 18, 2010
53 9 Saturday, Sep tember 18, 2010
1A
5
4
3
2
1
Cougar Point (DMI,FDI,PM)
U24C
U24C
DMI_RXN0 2
DMI_RXN1 2
DMI_RXN2 2
DMI_RXN3 2
DMI_RXP0 2
D D
+1.05V_VTT
SUS_PWR_ACK_R
C C
B B
XDP_DBRST# 2
9/10 SI for H/W.
EC_PWROK 17,29
PM_DRAM_PWRGD 2
SUS_PWR_ACK 29
DNBSWON# 29
AC_PRESENT 29
SYS_PWROK_R
SYS_PWROK
EC_PWROK_R
RSMRST# 29
DMI_RXP1 2
DMI_RXP2 2
DMI_RXP3 2
DMI_TXN0 2
DMI_TXN1 2
DMI_TXN2 2
DMI_TXN3 2
DMI_TXP0 2
DMI_TXP1 2
DMI_TXP2 2
DMI_TXP3 2
R500 49.9/F_4 R500 49.9/F_4
R498 750/F_4 R498 750/F_4
R489 0_4 R489 0_4
R433 0_4 R433 0_4
R423 0_4 R423 0_4
R233 0_4 R233 0_4
R477 0_4 R477 0_4
R495 0_4 R495 0_4
R494 0_4 R494 0_4
C698
C698
*0.1U/10V_4
*0.1U/10V_4
DMI_COMP
DMI_RBIAS
SUSACK#_R
XDP_DBRST#
SYS_PWROK_R
EC_PWROK_R
APWROK_R
PM_DRAM_PWRGD
RSMRST#
SUS_PWR_ACK_R
DNBSWON#_R
AC_PRESENT_R
PM_BATLOW#
PM_RI#
9/3 SI for H/W.
BC24
DMI0RXN
BE20
DMI1RXN
BG18
DMI2RXN
BG20
DMI3RXN
BE24
DMI0RXP
BC20
DMI1RXP
BJ18
DMI2RXP
BJ20
DMI3RXP
AW24
DMI0TXN
AW20
DMI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
(+3VS5)
K16
SUSWARN#/SUSPWRDNACK/GPIO30
E20
PWRBTN#
(DSW)
H20
ACPRESENT / GPIO31
(+3VS5)
E10
BATLOW# / GP IO72
A10
RI#
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QMZQ0T00
AJ0QMZQ0T00
IC CTRL(989P)COUGARPOINT QMVY TOP B/S
IC CTRL(989P)COUGARPOINT QMVY TOP B/S
DMI
FDI
DMI
FDI
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVRMEN
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
System Power Management
System Power Management
SLP_LAN# / GPIO29
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
FDI_INT
DPWROK
WAKE#
(+3V)
(+3VS5)
(+3VS5)
(+3VS5)
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
PMSYNCH
(+3VS5)
BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9
BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9
AW16
AV12
BC10
AV14
BB10
A18
E22
B9
N3
G8
N14
D10
H4
F4
G10
G16
AP14
K14
DSWVREN
R501 0_4 R501 0_4
PCIE_WAKE#
CLKRUN#
PCH_SUSCLK_L
R211 0_4 R211 0_4
R467 0_4 R467 0_4
TP55TP55
SLP_LAN#
FDI_TXN0 2
FDI_TXN1 2
FDI_TXN2 2
FDI_TXN3 2
FDI_TXN4 2
FDI_TXN5 2
FDI_TXN6 2
FDI_TXN7 2
FDI_TXP0 2
FDI_TXP1 2
FDI_TXP2 2
FDI_TXP3 2
FDI_TXP4 2
FDI_TXP5 2
FDI_TXP6 2
FDI_TXP7 2
FDI_INT 2
FDI_FSYNC0 2
FDI_FSYNC1 2
FDI_LSYNC0 2
FDI_LSYNC1 2
TP54TP54
TP53TP53
RSMRST#
PCIE_WAKE# 27,30
CLKRUN# 29
TP21TP21
R249 0_4 R249 0_4 R282 150/F_4 R282 150/F_4
SLP_S5 29
SUSC# 29
SUSB# 29
TP22TP22
5/7: DEL R8304 , Add TP9041
PM_SYNC 2
9/10 SI for H/W.
PD Res place close to PCH
PCH to Res routeing 50 ohm Impedance.
Res to connector filter routeing 37.5ohm Impedance.
PCH_SUSCLK 29
TP26TP26
5/11: add TP9048
Reserve for R13 power on sequence
LVDS_BLON 20
DISP_ON 20
DPST_PWM 20
EDIDCLK 20
EDIDDATA 20
R276 2.2K_4 R276 2.2K_4
+3V
CRT_B 22
CRT_G 22
CRT_R 22
DDCCLK 22
DDCDATA 22
HSYNC_COM 22
VSYNC_COM 22
R275 2.2K_4 R275 2.2K_4
R273 2.37K/F_4 R273 2.37K/F_4
TXLCLKOUT- 20
TXLCLKOUT+ 20
TXLOUT0- 20
TXLOUT1- 20
TXLOUT2- 20
TXLOUT0+ 20
TXLOUT1+ 20
TXLOUT2+ 20
TXUCLKOUT- 20
TXUCLKOUT+ 20
TXUOUT0- 20
TXUOUT1- 20
TXUOUT2- 20
TXUOUT0+ 20
TXUOUT1+ 20
TXUOUT2+ 20
R296 33_4 R 296 33_4
R297 33_4 R 297 33_4
R279 1K/F_4 R279 1K/F_4
TP30TP30
R284 150/F_4 R284 150/F_4
R283 150/F_4 R283 150/F_4
L_CTRL_CLK
L_CTRL_DATA
LVDS_IBG
LVDS_VBG
PCH_HSYNC_R
PCH_VSYNC_R
Cougar Point (LVDS,DDI)
U24D
U24D
J47
DAC_IREF
L_BKLTEN
M45
L_VDD_EN
P45
L_BKLTCTL
T40
L_DDC_CLK
K47
L_DDC_DATA
T45
L_CTRL_CLK
P39
L_CTRL_DATA
AF37
LVD_IBG
AF36
LVD_VBG
AE48
LVD_VREFH
AE47
LVD_VREFL
AK39
LVDSA_CLK#
AK40
LVDSA_CLK
AN48
LVDSA_DATA#0
AM47
LVDSA_DATA#1
AK47
LVDSA_DATA#2
AJ48
LVDSA_DATA#3
AN47
LVDSA_DATA0
AM49
LVDSA_DATA1
AK49
LVDSA_DATA2
AJ47
LVDSA_DATA3
AF40
LVDSB_CLK#
AF39
LVDSB_CLK
AH45
LVDSB_DATA#0
AH47
LVDSB_DATA#1
AF49
LVDSB_DATA#2
AF45
LVDSB_DATA#3
AH43
LVDSB_DATA0
AH49
LVDSB_DATA1
AF47
LVDSB_DATA2
AF43
LVDSB_DATA3
N48
CRT_BLUE
P49
CRT_GREEN
T49
CRT_RED
T39
CRT_DDC_CLK
M40
CRT_DDC_DATA
M47
CRT_HSYNC
M49
CRT_VSYNC
T43
DAC_IREF
T42
CRT_IRTN
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QMZQ0T00
AJ0QMZQ0T00
IC CTRL(989P)COUGARPO INT QMVY TOP B/S
IC CTRL(989P)COUGARPO INT QMVY TOP B/S
LVDS
LVDS
CRT
CRT
+1.05V_VTT 2,4,7,8,10,29,32,33
+3V_RTC 7,10
+3V_DSW
+3VPCU 7,20,28,29,31,37
+3VS5 2,7,8,9,10,22,26,31,32,38,39
+3V 2,7,8,9,10,12,13,14,17,20,21,22,23,24,25,27,28,29,30,33,38,39
+5V 7,10,17,21,22,23,25,28,30,38
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPB_AUXN
DDPB_AUXP
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
Digital Display Interface
Digital Display Interface
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
DDPD_AUXP
SDVO_INTN
SDVO_INTP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
AP43
AP45
AM42
AM40
AP39
AP40
P38
M39
AT49
AT47
AT40
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
P46
P42
AP47
AP49
AT38
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
M43
M36
AT45
AT43
BH41
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
SDVO_CLK 21
SDVO_DATA 21
DPB_HPD_Q
DPB_LANE0_N
DPB_LANE0_P
DPB_LANE1_N
DPB_LANE1_P
DPB_LANE2_N
DPB_LANE2_P
DPB_LANE3_N
DPB_LANE3_P
INT. HDMI
PCH Pull-high/low(CLG)
PM_RI#
PM_BATLOW#
PCIE_WAKE#
SLP_LAN#
SUS_PWR_ACK
AC_PRESENT_R
A A
CLKRUN#
XDP_DBRST#
RSMRST#
SYS_PWROK
R485 10K_4 R485 10K_4
R473 *8.2K_4 R473 *8.2K_4
R476 10K_4 R476 10K_4
R260 *10K_4 R260 *10K_4
R474 10K_4 R474 10K_4
R496 10K_4 R496 10K_4
R439 8.2K_4 R439 8.2K_4
R443 10K_4 R443 10K_4
R459 *1K_4 R459 *1K_4
R503 10K_4 R503 10K_4
R434 *10K_4 R434 *10K_4
+3VS5 +3VS5
+3V
9/3 SI for H/W.
5
4
DPB_LANE0_N
DPB_LANE0_P
DPB_LANE1_N
DPB_LANE1_P
DPB_LANE2_N
DPB_LANE2_P
DPB_LANE3_N
DPB_LANE3_P
INT HDMI Detect Function
R537 0_4 R537 0_4
DPB_HPD_Q
R535
R535
*100K_4
*100K_4
1
Q40
Q40
2
*2N7002K
*2N7002K
+5V
IN_D2# 21
IN_D2 21
IN_D1# 21
IN_D1 21
IN_D0# 21
IN_D0 21
IN_CLK# 21
IN_CLK 21
3
R546
R546
*100K_4
*100K_4
HDMI_HPD_CON 21
3
R420 0_4 R420 0_4
+3V_RTC
System PWR_OK(CLG) DPWROK FOR DSW INT HDMI disable (DIS only remove)
SYS_PWROK
R493 330K_4 R493 330K_4
IMVP_PWRGD SYS_PWROK
4
U21
U21
*TC7SH08FU
*TC7SH08FU
R430 *0_4 R430 *0_4
DSWVREN
On Die DSW VR Enable
High = Enable (Default)
Low = Disable
C596 *0.1U/10V_4 C596 *0.1U/10V_4
2
IMVP_PWRGD 33
1
3 5
R427
R427
*100K_4
*100K_4
R491 *330K_4 R491 *330K_4
2
EC_PWROK
9/10 SI for EE
1%
1%
1%
Remove DSW power rail
352-(&75
352-(&75
352-(&75
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
PCH 1/6 (DMI/FDI/VIDEO)
PCH 1/6 (DMI/FDI/VIDEO)
PCH 1/6 (DMI/FDI/VIDEO)
1
63 9 Saturday, Sep tember 18, 2010
63 9 Saturday, Sep tember 18, 2010
63 9 Saturday, Sep tember 18, 2010
3A
1A
3A
1A
3A
1A
5
TP58TP58
TP57TP57
TP27TP27
R258 1M_4 R258 1M_4
D D
C C
B B
+3V_RTC
TP56TP56
ACZ_BCLK
RF
C408
C408
*10P/50V_4
*10P/50V_4
+3VPCU
ACZ_SPKR 25
ACZ_SDIN0 25
TP29TP29
TP28TP28
TP49TP49
TP15TP15
TP14TP14
TP50TP50
R454 *10K_4 R454 *10K_4
PCH Strap Table
Pin Name Strap description Sampled Configuration
SPKR
Different from
Calpella
GNT3# / GPIO55 Top-Block Swap Override
Cougar Point (HDA,JTAG,SATA)
U24A
RTC_X1
RTC_X2
RTC_RST#
SRTC_RST#
SM_INTRUDER#
PCH_INVRMEN
ACZ_SYNC
ACZ_SPKR
ACZ_RST#
ACZ_SDOUT
GPIO33
PCH_JTAG_TCK_R
PCH_JTAG_TMS
PCH_JTAG_TDI_R
PCH_JTAG_TDO_R
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_CS1#
PCH_SPI_SI
PCH_SPI_SO
No reboot mode setting PWROK
U24A
A20
RTCX1
C20
RTCX2
D20
RTCRST#
G22
SRTCRST#
K22
INTRUDER#
C17
INTVRMEN
N34
HDA_BCLK
L34
HDA_SYNC
T10
SPKR
K34
HDA_RST#
E34
HDA_SDIN0
G34
HDA_SDIN1
C34
HDA_SDIN2
A34
HDA_SDIN3
A36
HDA_SDO
(+3V)
C36
HDA_DOCK_EN# / GPIO33
(+3VS5)
N32
HDA_DOCK_RST# / GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK
Y14
SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QMZQ0T00
AJ0QMZQ0T00
IC CTRL(989P)COUGARPO I NT QMVY TOP B/S
IC CTRL(989P)COUGARPO I NT QMVY TOP B/S
PWROK
INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up
HDA_DOCK_EN#/GPIO33
GNT1# / GPIO51
GPIO19
Different from
Calpella
GNT2# / GPIO53
NV_ALE
NV_CLE
A A
HDA_SYNC On-Die PLL VR Voltage S elect RSMRST
Flash Descriptor Security
Only for Interposer
Boot BIOS Selection 1 [bit-1]
Boot BIOS Selection 0 [bit-0]
ESI strap (Server only)
Intel Anti-Theft HDD protect ion
Only for Interposer
DMI Termination voltage
PWROK
PWROK
PWROK
PWROK
PWROK 0 = Disable (Internal pull-down 20kohm)
PWROK
HDA_SDO PWROK Flash Descriptor Security
GPIO8
GPIO28
Different from
Calpella
Integrated Clock Chip Enable Should be pull-down (weak pull-up 20K)RSMRST#
On-die PLL Voltage Regulator RSMRST#
SPI_MOSI iTPM function Disable APWROK
5
4
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
LPC
LPC
FWH4 / LFRAME#
RTC IHDA
RTC IHDA
SPI JTAG
SPI JTAG
LDRQ0#
LDRQ1# / GPIO23
(+3V)
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA 6G
SATA 6G
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA
SATA
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3RCOMPO
SATA3COMPI
SATA3RBIAS
SATALED#
(+3V)
SATA0GP / GPIO21
(+3V)
SATA1GP / GPIO19
0 = Default (weak pull-down 20K)
1 = Setting to No-Reboot mode
0 = "top-block swap" mode
1 = Default (weak pull-up 20K)
0 = Override
1 = Default (weak pull-up 20K)
GNT0# GNT1#
1 1
0 0
Should not be pull-down
(weak pull-up 20K)
weak pull-down 20kohm
0 = Support by 1.8V (weak pull-down)
1 = Support by 1.5V
0 = Override
1 = Default (weak pull-up 20K)
0 = Disable
1 = Enable (Default)
0 = Default (weak pull-down 20K)
1 = Enable
4
C38
A38
B37
C37
D36
PCH_DRQ#0
E36
PCH_DRQ#1
K36
SERIRQ
V5
AM3
AM1
AP7
AP5
AM10
AM8
AP11
AP10
AD7
AD5
AH5
AH4
DG recommended that AC coupling capacitors should be
AB8
close to the connector (<100 mils) for optimal signal quality.
AB10
AF3
AF1
Y7
Y5
AD3
AD1
Y3
Y1
AB3
AB1
Y11
SATA_COMP
Y10
AB12
SATA3_COMP
AB13
SATA3_RBIAS
AH1
P3
DGT_STOP#
V14
BBS_BIT0
P1
Boot Location
SPI
LPC
LAD0 29,30
LAD1 29,30
LAD2 29,30
LAD3 29,30
LFRAME# 29,30
TP32TP32
TP31TP31
R234 8.2K_4 R234 8.2K_4
3/26 DB modify for pl acement.
R244 37.4/F_4 R244 37.4/F_4
R246 49.9/F_4 R246 49.9/F_4
R465 750/F_4 R465 750/F_4
R438 10K_4 R438 10K_4
+3V
+3V
ACZ_SPKR
R522 *1K_4 R522 *1K_4
R521 10K_4 R521 10K_4
PCH_INVRMEN
GPIO33
[Need external pull-down for LPC BIOS]
Default weak pull-up on GNT0/1#
USE GPIO PIN
+1.8V
R470 2.2K_4 R470 2.2K_4
+1.8V
+3VS5
ACZ_SDOUT
PCH_SPI_SI
3
+3V
SERIRQ 29
SATA_RXN0 23
SATA_RXP0 23
SATA_TXN0 23
SATA_TXP0 23
SATA_RXN4 23
SATA_RXP4 23
SATA_TXN4 23
SATA_TXP4 23
+1.05V_VTT
SATA_LED# 28
DGT_STOP#
Circuit
R435 *1K_4 R435 *1K_4
R497 330K_4 R497 330K_4
R509 1K_4 R509 1K_4
R455 *1K_4 R455 *1K_4
R523 *1K_4 R523 *1K_4
R468 *1K_4 R468 *1K_4
R278 1K_4 R278 1K_4
R510 *1K_4 R510 *1K_4
R483 *1K_4 R483 *1K_4
R447 *1K_4 R447 *1K_4
R198 1K_4 R198 1K_4
3
+1.05V_VTT 2,4,6,8,10,29,32,33
+1.8V 4,10,32,39
+3V_RTC 6,10
+3V_DSW
+3VPCU 20,28,29,31,37
+3V 2,6,8,9,10,12,13,14,17,20,21,22,23,24,25,27,28,29,30,33,38,39
+V3.3A_1.5A_HDA_IO 10
HDD0 (SATA3 6.0Gb/s)
OD D (SATA1 1.5Gb/s)
BIT_CLK_AUDIO
EMI
R217 *10K_4 R217 *10K_4
+3V
PCI_GNT3# 8
+3V_RTC
R469 4.7K_4 R469 4.7K_4
+V3.3A_1.5A_HDA_IO
+3V
GPIO33_E 29
BBS_BIT0
BBS_BIT1 8
NV_ALE 8
ACZ_SYNC
ICC_EN# 9
PLL_ODVR_EN 9
+3V
NV_CLE 8
H_SNB_IVB# 2
N.A at CPT EDS 0.7
C411
C411
*33P/50V_4
*33P/50V_4
2
RTC Circuitry(RTC)
9/10 SI for H/W.
R558 0_6 R558 0_6
+3VPCU
+3V_RTC_0
R573 1K_4 R573 1K_4
1 2
CN24
CN24
BAT_CONN
BAT_CONN
DFWF02MS032
DFWF02MS032
50273-0027N-001-2P-L
50273-0027N-001-2P-L
RTC Power trace width 20mils.
HDA Bus(CLG)
BIT_CLK_AUDIO 25
ACZ_RST#_AUDIO 25
ACZ_SDOUT_AUDIO 25
R529 10K_4 R529 10K_4
+5V
ACZ_SYNC_AUDIO 25
PCH_SPI_CS0#
PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_SO PCH_SPI1_SO_R
2
R280 33_4 R 280 33_4
R277 33_4 R 277 33_4
R514 33_4 R 514 33_4
R531 33_4 R531 33_4
Q39
Q39
2N7002K
2N7002K
TP47TP47
TP48TP48 TP51TP51
R479 0_4 R479 0_4
R216 0_4 R216 0_4
R437 0_4 R437 0_4
C598
C598
*22P/50V_4
*22P/50V_4
R432 3.3K_4 R432 3.3K_4
+3V
RTC Clock 32.768KHz
C608 18P/50V_4 C608 18P/50V_4
C609 18P/50V_4 C609 18P/50V_4
30mils
+3V_RTC
FOR DSW
+3V_RTC_2
+3V_RTC_1
D14
D14
BAT54C
BAT54C
8/25 SI for M/E.
ACZ_BCLK
ACZ_RST#
ACZ_SDOUT
2
ACZ_SYNC
TP52TP52
PCH_SPI1_CLK_R
PCH_SPI1_SI_R
PCH_SPI1_SO_R
C597
C597
*22P/50V_4
*22P/50V_4
1%
1%
1%
3
RF
P/N
Size
4MB
AKE39FN0Q00 (EN25F32-100HIP)
AKE391P0N00 (W25Q32BVSSIG)
4MB
DG008000031
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
Vender
EON
Winbond
Socket
1
2 3
4 1
R567
R567
20K/F_4
20K/F_4
R568
R568
20K/F_4
20K/F_4
C687
C687
1U/6.3V_4
1U/6.3V_4
Y4
Y4
32.768KHZ
32.768KHZ
RTC_X1
R499
R499
10M_4
10M_4
RTC_X2
C683
C683
1U/6.3V_4
1U/6.3V_4
C692
C692
1U/6.3V_4
1U/6.3V_4
1 2
J1
J1
*SOLDERJUMPER-2
*SOLDERJUMPER-2
1 2
J2
J2
*SOLDERJUMPER-2
*SOLDERJUMPER-2
4/20 DB add.
R253 *0_6 R253 *0_6
SRTC_RST# RTC_RST#
PCH JTAG Debug(CLG)
+3VS5
R225
R225
210/F_4
210/F_4
R224
R224
100/F_4
100/F_4
R202
R202
210/F_4
210/F_4
R219
R219
100/F_4
100/F_4
R463
R463
210/F_4
210/F_4
PCH_JTAG_TMS
PCH_JTAG_TDI_R
PCH_JTAG_TDO_R
R462
R462
100/F_4
100/F_4
PCH SPI ROM(CLG)
U22
U22
1
CE#
6
SCK
5
SI
2
SO
3
WP#
W25Q32BVSSIG
W25Q32BVSSIG
352-(&75
352-(&75
352-(&75
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
8
VDD
R480 3.3K_4 R480 3.3K_4
7
HOLD#
4
VSS
PCH 2/6 (SATA/HDA/SPI)
PCH 2/6 (SATA/HDA/SPI)
PCH 2/6 (SATA/HDA/SPI)
0.1U/10V_4
0.1U/10V_4
1
C599
C599
73 9 Saturday, Sep tember 18, 2010
73 9 Saturday, Sep tember 18, 2010
73 9 Saturday, Sep tember 18, 2010
RTC_RST#
SRTC_RST#
PCH_JTAG_TCK_R
R446
R446
51_4
51_4
+3V
3A
1A
3A
1A
3A
1A
5
Cougar Point-M (PCI,USB,NVRAM)
PCI/USBOC# Pull-up(CLG)
PCI_PIRQA#
R294 8.2K_4 R294 8.2K_4
PCI_PIRQB#
R286 8.2K_4 R286 8.2K_4
PCI_PIRQC#
R287 8.2K_4 R287 8.2K_4
PCI_PIRQD#
R295 8.2K_4 R295 8.2K_4
+3V
RP8
+3VS5
RP8
10
9
8
7 4
10K_10P8R_6
10K_10P8R_6
RP6
RP6
10
9
8
7 4
10K_10P8R_6
10K_10P8R_6
D D
EDID_SELECT#
LCD_BK
USB_OC4#
USB_OC1#
USB_OC3#
MPC Switch Control
MPC_PWR_CTRL#
MPC_PWR_CTRL#
C C
DGPU_HOLD_RST# 9,14
Low = MPC ON
High = MPC OFF (Default)
R519 *1K_4 R519 *1K_4
9/3 SI for H/W.
BT_COMBO_EN# 30
BBS_BIT1 7
TP33TP33
PCI_GNT3# 7
LCD_BK 20
BOARD_ID4 9
9/3 SI for H/W.
B B
TP61TP61
CLK_33M_KBC 29
CLK_PCI_FB
+3VS5
C365 *0.1U/10V_4 C365 *0.1U/10V_4
2
1
U11
U11
3 5
*TC7SH08FU
*TC7SH08FU
PLTRST# 2,14,24,27,29,30
TP35TP35
CLK_33M_DEBUG 30
PLTRST#(CLG)
PCI_PLTRST#
R208
R208
0_4
0_4
A A
PLTRST#
+3V
DGPU_HOLD_RST#
1
INTH# MPC_PWR_CTRL#
2
BT_COMBO_EN#
3
DGPU_SELECT#
5 6
USB_OC6#
1
USB_OC0#
2
USB_OC7#
3
USB_OC5# USB_OC2#
5 6
DGPU_HOLD_RST#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
BT_COMBO_EN#
DGPU_SELECT#
EDID_SELECT#
BBS_BIT1
PWM_SELECT#
PCI_GNT3#
MPC_PWR_CTRL#
LCD_BK
BOARD_ID4
INTH#
TP19TP19
PCI_PLTRST#
CLK_PCI_TPM_R
CLK_PCI_CARD_R
R293 22_4 R293 22_4
R292 22_4 R292 22_4
R281 22_4 R281 22_4
CLK_PCI_FB_R
CLK_PCI_LPC_R
CLK_PCI_EC_R
PLTRST#
4
R193
R193
100K_4
100K_4
PCI_PME#
PEG Clock detect (SG only)
DGPU_PWROK_1 35
2
CLK_PEGA_REQ#
Q19
Q19
*2N7002
*2N7002
3
5
1
U24E
U24E
BG26
TP1
BJ26
TP2
BH25
TP3
BJ16
TP4
BG16
TP5
AH38
TP6
AH37
TP7
AK43
TP8
AK45
TP9
C18
TP10
N30
TP11
H3
TP12
AH12
TP13
AM4
TP14
AM5
TP15
Y13
TP16
K24
TP17
L24
TP18
AB46
TP19
AB45
TP20
B21
TP21
M20
TP22
AY16
TP23
BG46
TP24
BE28
TP25
BC30
TP26
BE32
TP27
BJ32
TP28
BC28
TP29
BE30
TP30
BF32
TP31
BG32
TP32
AV26
TP33
BB26
TP34
AU28
TP35
AY30
TP36
AU26
TP37
AY26
TP38
AV28
TP39
AW30
TP40
K40
PIRQA#
K38
PIRQB#
H38
PIRQC#
G38
PIRQD#
C46
REQ1# / GPIO50
C44
REQ2# / GPIO52
E40
REQ3# / GPIO54
D47
GNT1# / GPIO51
E42
GNT2# / GPIO53
F46
GNT3# / GPIO55
G42
PIRQE# / GPIO2
G40
PIRQF# / GPIO3
C42
PIRQG# / GPIO4
D44
PIRQH# / GPIO5
K10
PME#
C6
PLTRST#
H49
CLKOUT_PCI0
H43
CLKOUT_PCI1
J48
CLKOUT_PCI2
K42
CLKOUT_PCI3
H40
CLKOUT_PCI4
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QMZQ0T00
AJ0QMZQ0T00
IC CTRL(989P)COUGARPOINT QMVY TOP B/S
IC CTRL(989P)COUGARPOINT QMVY TOP B/S
SMBus/Pull-up(CLG)
2N7002K
2N7002K
MBCLK2 13,29
+3V
MBDATA2 13,29
2N7002K
2N7002K
SMB_PCH_DAT
SMB_PCH_CLK
3
Q18
Q18
2N7002K
2N7002K
+3V
3
2
2
RSVD
RSVD
PCI
PCI
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
1
Q21
Q21
1
Q20
Q20
1
R192 4.7K_4 R192 4.7K_4
R191 4.7K_4 R191 4.7K_4
1
Q17
Q17
2N7002K
2N7002K
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
2
2
NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11
NVRAM
NVRAM
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15
NV_RE#_WRB0
NV_RE#_WRB1
NV_WE#_CK0
NV_WE#_CK1
USB
USB
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
SMB_ME1_CLK
3
R250 2.2K_4 R250 2.2K_4
R248 2.2K_4 R248 2.2K_4
SMB_ME1_DAT
3
SMB_RUN_DAT 12,13
SMB_RUN_CLK 12,13
4
NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3
NV_DQS0
NV_DQS1
NV_ALE
NV_CLE
NV_RCOMP
NV_RB#
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
+3VS5
4
AY7
AV7
AU3
BG4
AT10
BC8
AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6
AV5
AY1
AV10
AT8
AY5
BA2
AT12
BF3
C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32
C33
B33
A14
K20
B17
C16
L16
A16
D14
C14
WLAN
LAN
PCIE_RXN2_LAN 27
PCIE_RXN3_CARD 24
NV_ALE
NV_CLE
Cardreader
NV_ALE 7
NV_CLE 7
PCH_CLK_27M_1
PCIE_RXP3_CARD 24
C646 *0.1U/10V_4 C646 *0.1U/10V_4
9/3 SI for H/W.
USBP0- 26
Left_USB
USBP0+ 26
USBP1- 26
Left_USB 2
USBP1+ 26
USBP4- 20
Webcam
USBP4+ 20
CLK_PCIE_CARDN 24
CLK_PCIE_CARDP 24
USBP8- 26
Right_USB
USBP8+ 26
USBP10- 30
WLAN
USBP10+ 30
USBP2- 26
Blue tooth
USBP2+ 26
USB_BIAS
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#
R508
R508
22.6/F_4
22.6/F_4
CLK_33M_DEBUG
CLK_33M_KBC
C415
C415
*22P/50V_4
*22P/50V_4
EMI
CLK_REQ/Strap Pin(CLG)
CLK_PCIE_REQ1#
CLK_PCIE_REQ2#
CLK_PCIE_REQ0#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
CLK_PEGB_REQ#
CLK_PEGA_REQ#
CLK_PEGA_REQ#
CLK_BUF_BCLK_N
CLK_BUF_BCLK_P
CLK_BUF_PCIE_3GPLL#
CLK_BUF_PCIE_3GPLL
CLK_BUF_DREFCLK#
CLK_BUF_DREFCLK
CLK_BUF_DREFSSCLK#
CLK_BUF_DREFSSCLK
CLK_PCH_14M
CLOCK TERMINATION for FCIM
PCIE_RXN1 30
PCIE_RXP1 30
PCIE_TXN1 30
PCIE_TXP1 30
PCIE_RXP2_LAN 27
PCIE_TXN2_LAN 27
PCIE_TXP2_LAN 27
PCIE_TXN3_CARD 24
PCIE_TXP3_CARD 24
U25
U25
2 4
R441 10K_4 R441 10K_4
R229 10K_4 R229 10K_4
R445 10K_4 R445 10K_4
R478 10K_4 R478 10K_4
R237 10K_4 R237 10K_4
R222 10K_4 R222 10K_4
R212 *10K_4 R212 *10K_4
Ra
R194 10K_4 R194 10K_4
Rb
SG : Rb ; UMA : Ra
R270 10K_4 R270 10K_4
R269 10K_4 R269 10K_4
R243 10K_4 R243 10K_4
R242 10K_4 R242 10K_4
R266 10K_4 R266 10K_4
R262 10K_4 R262 10K_4
R231 10K_4 R231 10K_4
R230 10K_4 R230 10K_4
R285 10K_4 R285 10K_4
+3V
5
C414
C414
*22P/50V_4
*22P/50V_4
C399 0.1U/10V_4 C399 0.1U/10V_4
C396 0.1U/10V_4 C396 0.1U/10V_4
C398 0.1U/10V_4 C398 0.1U/10V_4
C397 0.1U/10V_4 C397 0.1U/10V_4
C405 0.1U/10V_4 C405 0.1U/10V_4
C404 0.1U/10V_4 C404 0.1U/10V_4
1
*74LVC1G126
*74LVC1G126
RP7
RP7
0_4P2R_4
0_4P2R_4
CLK_PCIE_REQ2# 24
+3V
+3VS5
3
Cougar Point-M (PCI-E,SMBUS,CLK)
PCIE_TXN1_C
PCIE_TXP1_C
PCIE_TXN2_LAN_C
PCIE_TXP2_LAN_C
PCIE_TXN3_CARD_C
PCIE_TXP3_CARD_C
DGPU_PWROK 9,17,29,35,39
PCH_CLK_27M 15
CLK_PCH_SRC0N
CLK_PCH_SRC0P
CLK_PCIE_REQ0#
CLK_PCH_SRC2N
CLK_PCH_SRC2P
CLK_PCIE_REQ1#
CLK_PCH_CARD2N
2
1
CLK_PCH_CARD2P
4
3
CLK_PCIE_REQ2#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
BOARD_ID0 9
TP17TP17
CLK_PEGB_REQ#
BOARD_ID1 9
BOARD_ID2 9
TP25TP25
TP23TP23
CLK_PCH_ITPN
CLK_PCH_ITPP
WLAN
PCIE_CLKREQ_WLAN# 30
LAN
PCIE_CLKREQ_LAN# 27
GPU
+3VS5 2,6,7,9,10,22,26,31,32,38,39
+3V 2,6,7,9,10,12,13,14,17,20,21,22,23,24,25,27,28,29,30,33,38,39
3
BG34
BJ34
AV32
AU32
BE34
BF34
BB32
AY32
BG36
BJ36
AV34
AU34
BF36
BE36
AY34
BB34
BG37
BH37
AY36
BB36
BJ38
BG38
AU36
AV36
BG40
BJ40
AY40
BB40
BE38
BC38
AW38
AY38
Y40
Y39
AB49
AB47
AA48
AA47
V10
Y37
Y36
Y43
Y45
L12
V45
V46
L14
AB42
AB40
V40
V42
T13
V38
V37
K12
AK14
AK13
PCIE Clock
CLK_PCIE_WLANN 30
CLK_PCIE_WLANP 30
CLK_PCIE_LANP 27
CLK_PCIE_LANN 27
CLK_PCIE_VGA# 14
CLK_PCIE_VGA 14
U24B
U24B
PERN1
PERP1
PETN1
PETP1
PERN2
PERP2
PETN2
PETP2
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PERN5
PERP5
PETN5
PETP5
PERN6
PERP6
PETN6
PETP6
PERN7
PERP7
PETN7
PETP7
PERN8
PERP8
PETN8
PETP8
CLKOUT_PCIE0N
CLKOUT_PCIE0P
J2
PCIECLKRQ0# / GPIO73
(+3VS5)
CLKOUT_PCIE1N
CLKOUT_PCIE1P
M1
PCIECLKRQ1# / GPIO18
(+3V)
CLKOUT_PCIE2N
CLKOUT_PCIE2P
PCIECLKRQ2# / GPIO20
(+3V)
CLKOUT_PCIE3N
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
(+3VS5)
CLKOUT_PCIE4N
CLKOUT_PCIE4P
PCIECLKRQ4# / GPIO26
(+3VS5)
CLKOUT_PCIE5N
CLKOUT_PCIE5P
PCIECLKRQ5# / GPIO44
(+3VS5)
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
E6
PEG_B_CLKRQ# / GPIO56
(+3VS5)
CLKOUT_PCIE6N
CLKOUT_PCIE6P
PCIECLKRQ6# / GPIO45
(+3VS5)
CLKOUT_PCIE7N
CLKOUT_PCIE7P
PCIECLKRQ7# / GPIO46
(+3VS5)
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
3/26 DB change Part reference.
RP1
RP1
0_4P2R_4
0_4P2R_4
3/26 DB change Part reference.
RP3
RP3
0_4P2R_4
0_4P2R_4
3/26 DB change Part reference.
RP2
RP2
0_4P2R_4
0_4P2R_4
PCI-E*
PCI-E*
CLOCKS
CLOCKS
2
1
4
3
R461 0_4 R461 0_4
4
3
2
1
R457 0_4 R457 0_4
2
1
4
3
Remove for UMA only.
2
(+3VS5)
SMBCLK
SMBDATA
(+3VS5)
SML0CLK
SML0DATA
(+3VS5)
(+3VS5)
(+3VS5)
CL_CLK1
CL_DATA1
CL_RST1#
(+3VS5)
REFCLK14IN
XTAL25_IN
XTAL25_OUT
(+3V)
(+3V)
(+3V)
(+3V)
E12
H14
C9
A12
C8
G12
C13
E14
M16
M7
T11
P10
M10
AB37
AB38
AV22
AU22
AM12
AM13
BF18
BE18
BJ30
BG30
G24
E24
AK7
AK5
K45
H45
V47
V49
Y47
K43
F47
H47
K49
SMBALERT# / GPIO11
SML0ALERT# / GPIO60
SMBUS Controller
SMBUS Controller
SML1ALERT# / PCHHOT# / GPIO74
SML1CLK / GPIO58
SML1DATA / GPIO75
Link
Link
PEG_A_CLKRQ# / GPIO47
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_DP_N
CLKOUT_DP_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N
CLKIN_SATA_P
CLKIN_PCILOOPBACK
XCLK_RCOMP
CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67
FLEX CLOCKS
FLEX CLOCKS
AJ0QMZQ0T00
AJ0QMZQ0T00
IC CTRL(989P)COUG ARPOINT QMVY TOP B/S
IC CTRL(989P)COUG ARPOINT QMVY TOP B/S
CLK_PCH_SRC0N
CLK_PCH_SRC0P
CLK_PCIE_REQ0#
CLK_PCH_SRC2P
CLK_PCH_SRC2N
CLK_PCIE_REQ1#
CLK_PCH_PEGAN
CLK_PCH_PEGAP
2
SMBALERT#
SMB_PCH_CLK
SMB_PCH_DAT
DRAMRST_CNTRL_PCH
SMB_ME0_CLK
SMB_ME0_DAT
SML1ALERT#_R
SMB_ME1_CLK
SMB_ME1_DAT
CL_CLK_R
CL_DAT_R
CL_RST#_R
CLK_PEGA_REQ#
CLK_PCH_PEGAN
CLK_PCH_PEGAP
CLK_BUF_PCIE_3GPLL#
CLK_BUF_PCIE_3GPLL
CLK_BUF_BCLK_N
CLK_BUF_BCLK_P
CLK_BUF_DREFCLK#
CLK_BUF_DREFCLK
CLK_BUF_DREFSSCLK#
CLK_BUF_DREFSSCLK
CLK_PCH_14M
9/8 SI for TXC
CLK_PCI_FB
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
R520 90.9/F_4 R520 90.9/F_4
CLK_FLEX0
CLK_FLEX1
CLK_FLEX2
Rb
CLK_FLEX3
R524 22_4 R524 22_4
Remove Ra, Rb for UMA &
SG. 27MHz support DIS only.
1%
1%
1%
1
DRAMRST_CNTRL_PCH 2
TP18TP18
TP20TP20
TP16TP16
TP24TP24
CLK_CPU_BCLKN 2
CLK_CPU_BCLKP 2
CLK_DPLL_SSCLKN 2
CLK_DPLL_SSCLKP 2
change 25M to small size
TP59TP59
C621 33P/50V_4 C621 33P/50V_4
Y5
R525
R525
1M_4
1M_4
25MHZY525MHZ
C622 27P/50V_4 C622 27P/50V_4
TP60TP60
TP34TP34
+3VS5
R490 1K_4 R490 1K_4
R240 10K_4 R240 10K_4
R188 2.2K_4 R188 2.2K_4
R482 2.2K_4 R482 2.2K_4
R475 2.2K_4 R475 2.2K_4
R245 2.2K_4 R245 2.2K_4
R238 10K_4 R238 10K_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
+1.05V_VTT
TP36TP36
TP62TP62
PCH_CLK_27M_1
SMBus/Pull-up(CLG)
DRAMRST_CNTRL_PCH
SMBALERT#
SMB_PCH_CLK
SMB_PCH_DAT
SMB_ME0_CLK
SMB_ME0_DAT
SML1ALERT#_R
352-(&75
352-(&75
352-(&75
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
PCH 3/6 (PCIE/USB/CLK)
PCH 3/6 (PCIE/USB/CLK)
PCH 3/6 (PCIE/USB/CLK)
1
RF
CLK_PCH_14M
PCH_CLK_27M_1
C410
C410
*22P/50V_4
*22P/50V_4
83 9 Saturday, September 18, 2010
83 9 Saturday, September 18, 2010
83 9 Saturday, September 18, 2010
C628
C628
*22P/50V_4
*22P/50V_4
3A
3A
3A
1A
1A
1A
5
ʹΠΦΘΒΣΠΚΟΥͺ·΄΄ΐͿʹ΅ͷ΄·͵
ʹΠΦΘΒΣΠΚΟΥͺ·΄΄ΐͿʹ΅ͷ΄·͵
ʹΠΦΘΒΣΠΚΟΥͺ·΄΄ΐͿʹ΅ͷ΄·͵ ʹΠΦΘΒΣΠΚΟΥͺ·΄΄ΐͿʹ΅ͷ΄·͵
U24F
PCI_SERR# 29
SIO_EXT_SMI# 29
SIO_EXT_SCI# 29
D D
Reserve
BT_OFF# 26,30
ICC_EN# 7
RF_OFF# 30
ODD_PRSNT# 23
DGPU_PWROK 8,17,29,35,39
PLL_ODVR_EN 7
R190 *0_4 R190 *0_4
ACCLED_EN
R452 *0_4 R452 *0_4
R448 0_4 R448 0_4
9/3 SI for H/W.
DGPU_HOLD_RST# 8,14
DGPU_PWR_EN 35
C C
GPIO49 24
B B
+3VS5 2,6,7,8,10,22,26,31,32,38,39
+3V 2,6,7,8,10,12,13,14,17,20,21,22,23,24,25,27,28,29,30,33,38,39
R209 0_4 R209 0_4
S_GPIO
SIO_EXT_SMI#
SIO_EXT_SCI#
BT_OFF#
ICC_EN#
LAN_DISABLE#_R
RF_OFF#
ODD_PRSNT#_R
DGPU_PWROK
BIOS_REC
BOARD_ID5
GPIO27
PLL_ODVR_EN_R
BOARD_ID3
DGPU_HOLD_RST#
DGPU_PWR_EN_R
FDI_OVRVLTG
MFG_MODE
DGPU_PRSNT#
TEST_SET_UP
GPIO49
SV_DET
U24F
T7
BMBUSY# / GPIO0
(+3V)
A42
TACH1 / GPIO1
(+3V)
H36
TACH2 / GPIO6
(+3V)
E38
TACH3 / GPIO7
(+3V)
C10
GPIO8
(+3VS5)
C4
LAN_PHY_PWR_CTRL / GPIO12
(+3VS5)
G2
GPIO15
(+3VS5)
U2
SATA4GP / GPIO16
(+3V)
D40
TACH0 / GPIO17
(+3V)
T5
SCLOCK / GPIO22
(+3V)
E8
GPIO24 / MEM_LED
(+3VS5)
E16
GPIO27
(DSW)
P8
GPIO28
(+3VS5)
K1
STP_PCI# / GPIO34
(+3V)
K4
GPIO35
(+3V)
V8
SATA2GP / GPIO36
(+3V)
M5
SATA3GP / GPIO37
(+3V)
N2
SLOAD / GPIO38
(+3V)
M3
SDATAOUT0 / GPIO39
(+3V)
V13
SDATAOUT1 / GPIO48
(+3V)
V3
SATA5GP / GPIO49
(+3V)
D6
GPIO57
(+3VS5)
A4
VSS_NCTF_1
A44
VSS_NCTF_2
A45
VSS_NCTF_3
A46
VSS_NCTF_4
A5
VSS_NCTF_5
A6
VSS_NCTF_6
B3
VSS_NCTF_7
B47
VSS_NCTF_8
BD1
VSS_NCTF_9
BD49
VSS_NCTF_10
BE1
VSS_NCTF_11
BE49
VSS_NCTF_12
BF1
VSS_NCTF_13
BF49
VSS_NCTF_14
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QMZQ0T00
AJ0QMZQ0T00
4
TACH4 / GPIO68
(+3V)
TACH5 / GPIO69
(+3V)
TACH6 / GPIO70
(+3V)
TACH7 / GPIO71
(+3V)
A20GATE
PECI
RCIN#
PROCPWRGD
CPU/MISC
CPU/MISC
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
NCTF
NCTF
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
THRMTRIP#
INIT3_3V#
NC_1
NC_2
NC_3
NC_4
NC_5
GPIO
GPIO
IC CTRL(989P)COUGARPOINT QMVY TOP B/S
IC CTRL(989P)COUGARPOINT QMVY TOP B/S
3
C40
B41
C41
A40
P4
AU16
P5
AY11
AY10
T14
AH8
AK11
AH10
AK10
P37
GPIO68
GPIO69
GPIO70
GPIO71
EC_RCIN#
PCH_THRMTRIP#
R512 10K_4 R512 10K_4
R515 1.5K/F_4 R515 1.5K/F_4
R516 *1.5K/F_4 R516 *1.5K/F_4
R247 0_4 R247 0_4
R481 390_4 R481 390_4
+3V
+3V
EC_A20GATE 29
EC_RCIN# 29
H_PWRGOOD 2
PM_THRMTRIP# 2,29
DG rev0.9 suggest to TS_VSS connect to GND.
BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49
MFG_MODE
S_GPIO
RF_OFF#
Intel ME Crypto Transport Layer
Security (TLS) cipher suite
Low = Disable (Default)
High = Enable
R214 *0_4 R214 *0_4
TEST_SET_UP
SV_SET_UP
High = Strong (Default)
2
MFG-TEST
R456 10K_4 R456 10K_4
R440 *0_4 R440 *0_4
R200 10K_4 R200 10K_4
R210 *0_4 R210 *0_4
R449 1K_4 R449 1K_4
R196 10K_4 R196 10K_4
+3VS5
+3V
Clock Gen Power OK (CLG)
+3V
+3V
R213 *0_4 R213 *0_4
BIOS RECOVERY High = Disable (Default)
R236 100K_4 R236 100K_4
1
GPIO Pull-up/Pull-down(CLG)
LAN_DISABLE#_R
ACCLED_EN
SIO_EXT_SCI#
SIO_EXT_SMI#
BT_OFF#
EC_A20GATE
EC_RCIN#
GPIO49
GPIO70
GPIO71
ODD_PRSNT#_R
DGPU_PWROK
DGPU_PWROK
GPIO27
R472 10K_4 R472 10K_4
R486 *10K_4 R486 *10K_4
R288 10K_4 R288 10K_4
R517 10K_4 R517 10K_4
R289 10K_4 R289 10K_4
R203 10K_4 R203 10K_4
R220 10K_4 R220 10K_4
R464 *10K_4 R464 *10K_4
R518 1.5K/F_4 R518 1.5K/F_4
R513 1.5K/F_4 R513 1.5K/F_4
R453 10K_4 R453 10K_4
R290 10K_4 R290 10K_4
R291 *10K_4 R291 *10K_4
R251 10K_4 R251 10K_4
BIOS_REC
Low = Enable
SV_DET
TEST DETECT
Low = Default
+3VS5
+3V
R195 10K_4 R195 10K_4
R235 *10K_4 R235 *10K_4
+3V
+3V
+3V +3V
R201 100K_4 R201 100K_4
FDI TERMINATION
VOLTAGE OVERRIDE
+3V
1%
1%
2
1%
FDI_OVRVLTG DGPU_PWR_EN_R
LOW - Tx, Rx terminated
to same voltage
352-(&75
352-(&75
352-(&75
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
Date: Sheet of
PCH 4/6 (GPIO/MISC)
PCH 4/6 (GPIO/MISC)
PCH 4/6 (GPIO/MISC)
1
R218 *1K_4 R218 *1K_4
3A
1A
3A
1A
3A
1A
of
93 9 Saturday, Sep tember 18, 2010
93 9 Saturday, Sep tember 18, 2010
93 9 Saturday, Sep tember 18, 2010
9/3 SI for H/W.
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID4
R466 10K_4 R466 10K_4
R197 *10K_4 R197 *10K_4
R232 *10K_4 R232 *10K_4
R444 *10K_4 R444 *10K_4
R205 *10K_4 R205 *10K_4
R227 *10K_4 R227 *10K_4
RU0
RU1
RU2
RU3
RU4
RU5
+3VS5
+3V
+3VS5
9/3 SI for H/W.
DMI TERMINATION
VOLTAGE OVERRIDE
R199 *200K/F_4 R199 *200K/F_4
Low = Tx, Rx terminated to
same voltage (DC Coupling Mode)
(DEFAULT)
GFX Present
SG
Ra
Rb
Ra Rb
R458 10K_4 R458 10K_4
UMA
Rb
Ra
R442 *100K_4 R442 *100K_4
DGPU_PRSNT#
Stuff
NC
3
BOARD ID SETTING
Model
R13 UMA 0 0 0 0 0 0
0
0
0
R13 DIS
A A
0
0
0
0
0
0
0
0
0
0
0
0
0
5
BOARD_ID0 BOARD_ID1 BOARD_ID2 BOARD_ID3 BOARD_ID4 BOARD_ID5
0
0
0
0
1
0
0
0
BOARD_ID0 8
BOARD_ID1 8
BOARD_ID2 8
BOARD_ID4 8
RD0
R451 *10K_4 R451 *10K_4
RD1
R215 10K_4 R215 10K_4
RD2
R226 10K_4 R226 10K_4
RD3
R460 10K_4 R460 10K_4
RD4
R221 10K_4 R221 10K_4
RD5
R241 10K_4 R241 10K_4
4
5
Cougar Point-M (POWER)
U24J
+1.05V_VTT
D D
C C
B B
A A
R526 *0_8 R526 *0_8
R257 0_4 R257 0_4
+3VS5
9/10 SI for H/W.
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT +1.05V_VCCEPW
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+VCCAPLL_CPY_PCH
L49
L49
*10uH/100mA_8
*10uH/100mA_8
R268
R268
0_6
0_6
R471 0_6 R471 0_6
C595
C595
1U/6.3V_4
1U/6.3V_4
R528 0_6 R528 0_6
C623
C623
1U/6.3V_4
1U/6.3V_4
R527 0_6 R527 0_6
C625
C625
1U/6.3V_4
1U/6.3V_4
R256 *0_6 R256 *0_6
C375
C375
*1U/6.3V_4
*1U/6.3V_4
R488 0_4 R488 0_4
V_PROC_IO=1mA
(10mils)
+3V_RTC
VCCRTC<1mA
(10mils)
C369
C369
C377
C377
0.1U/10V_4
0.1U/10V_4
*0.1U/10V_4
*0.1U/10V_4
C607
C607
*10U/6.3V_6
*10U/6.3V_6
1.01A (60mils)
C387
C387
C394
C394
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C366
C366
22U/6.3VS_8
22U/6.3VS_8
C603
C603
4.7U/6.3V_6
4.7U/6.3V_6
C606
C606
1U/6.3V_4
1U/6.3V_4
+1.05V_VTT 2,4,6,7,8,29,32,33
+1.5VSUS 2,4,12,13,22,35,39
+1.8V 4,7,32,39
+VCCACLK
+VCCPDSW
3mA (10mils)
PCH_VCCDSW
+3V_SUS_CLKF33
+VCCDPLL_CPY
+VCCSUS1
C384
C384
*1U/6.3V_4
*1U/6.3V_4
C393
C393
1U/6.3V_4
1U/6.3V_4
C367
C367
22U/6.3VS_8
22U/6.3VS_8
+VCCRTCEXT
C371
C371
0.1U/10V_4
0.1U/10V_4
+VCCAFDI_VRM
160mA (20mils)
+1.05V_VCCA_A_DPL
65mA (10mils)
+1.05V_VCCA_B_DPL
8mA (10mils)
+VCCDIFFCLK
+VCCDIFFCLKN
55mA (10mils)
+V1.05V_SSCVCC
95mA (10mils)
C372
C372
0.1U/10V_4
0.1U/10V_4
+V1.05M_VCCSUS
+VTT_VCCPCPU
C601
C601
C602
C602
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
C610
C610
C612
C612
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
+VCCSST
U24J
AD49
VCCACLK
T16
VCCDSW3_3
V12
DCPSUSBYP
T38
VCC3_3[5]
BH23
VCCAPLLDMI2
AL29
VCCIO[14]
AL24
DCPSUS[3]
AA19
VCCASW[1]
AA21
VCCASW[2]
AA24
VCCASW[3]
AA26
VCCASW[4]
AA27
VCCASW[5]
AA29
VCCASW[6]
AA31
VCCASW[7]
AC26
VCCASW[8]
AC27
VCCASW[9]
AC29
VCCASW[10]
AC31
VCCASW[11]
AD29
VCCASW[12]
AD31
VCCASW[13]
W21
VCCASW[14]
W23
VCCASW[15]
W24
VCCASW[16]
W26
VCCASW[17]
W29
VCCASW[18]
W31
VCCASW[19]
W33
VCCASW[20]
N16
DCPRTC
Y49
VCCVRM[4]
BD47
VCCADPLLA
BF47
VCCADPLLB
AF17
VCCIO[7]
AF33
VCCDIFFCLKN[1]
AF34
VCCDIFFCLKN[2]
AG34
VCCDIFFCLKN[3]
AG33
VCCSSC
V16
DCPSST
T17
DCPSUS[1]
V19
DCPSUS[2]
BJ8
V_PROC_IO
A22
VCCRTC
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QMZQ0T00
AJ0QMZQ0T00
IC CTRL(989P)COUGARPOINT QMVY TOP B/S
IC CTRL(989P)COUGARPOINT QMVY TOP B/S
+3V_RTC 6,7
+3V_DSW
+3VS5 2,6,7,8,9,22,26,31,32,38,39
+3V 2,6,7,8,9,12,13,14,17,20,21,22,23,24,25,27,28,29,30,33,38,39
+5VS5 20,26,31,32,33,34,35,36,38,39
+5V 6,7,17,21,22,23,25,28,30,38
4
N26
VCCIO[29]
P26
VCCIO[30]
P28
VCCIO[31]
T27
VCCIO[32]
T29
VCCIO[33]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[6]
VCCIO[34]
V5REF_SUS
DCPSUS[4]
VCCSUS3_3[1]
V5REF
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCC3_3[1]
VCC3_3[8]
PCI/GPIO/LPC MISC
PCI/GPIO/LPC MISC
SATA USB
SATA USB
HDA
HDA
VCC3_3[4]
VCC3_3[2]
VCCIO[5]
VCCIO[12]
VCCIO[13]
VCCIO[6]
VCCAPLLSATA
VCCVRM[1]
VCCIO[2]
VCCIO[3]
VCCIO[4]
VCCASW[22]
VCCASW[23]
VCCASW[21]
VCCSUSHDA
Clock and Miscellaneous
Clock and Miscellaneous
CPU RTC
CPU RTC
+3V_VCCPUSB
T23
T24
V23
V24
+3V_VCCAUBG
P24
+VCCAUPLL
T26
+5V_PCH_VCC5REFSUS
M26
+VCCA_USBSUS
AN23
+3V_VCCPSUS
AN24
+5V_PCH_VCC5REF
P34
N20
N22
119mA (15mils)
P20
P22
AA16
266mA (20mils)
W16
T34
AJ2
AF13
AH13
AH14
AF14
+V1.1LAN_VCCAPLL
AK1
+VCCAFDI_VRM
AF11
AC16
+1.05V_VCCIO1
AC17
AD17
1.01A (60mils)
+1.05V_VCCEPW
T21
V21
T19
P32
+3V_VCCPSUS
+3V_VCCPCORE
+3V
C594
C594
0.1U/10V_4
0.1U/10V_4
+V1.05S_SATA3
10mA (10mils)
+V3.3A_1.5A_HDA_IO
C613
C613
0.1U/10V_4
0.1U/10V_4
R506 0_8 R506 0_8
C615
C615
1U/6.3V_4
1U/6.3V_4
119mA (20mils)
R263 0_6 R263 0_6
C382
C382
0.1U/10V_4
0.1U/10V_4
R261 0_6 R261 0_6
C383
C383
0.1U/10V_4
0.1U/10V_4
R267 0_6 R267 0_6
C379 *1U/6.3V_4 C379 *1U/6.3V_4
R265 0_6 R265 0_6
C380
C380
1U/6.3V_4
1U/6.3V_4
R189 0_6 R189 0_6
C363
C363
0.1U/10V_4
0.1U/10V_4
+3V
C403
C403
0.1U/10V_4
0.1U/10V_4
R228 0_8 R228 0_8
C368
C368
1U/6.3V_4
1U/6.3V_4
L47
L47
*10uH/100mA_8
*10uH/100mA_8
C593
C593
*10U/6.3V_6
*10U/6.3V_6
R206 0_6 R206 0_6
C374
C374
1U/6.3V_4
1U/6.3V_4
R505 *0_4 R505 *0_4
R507 0_4 R507 0_4
C614
C614
*1U/6.3V_4
*1U/6.3V_4
+1.05V_VTT +1.05V_VCCUSBCORE
+3VS5
+1.05V_VTT
+3VS5
+3V
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+1.5VSUS
+3VS5
3
+1.05V_VTT +1.05V_PCH_VCC
+1.05V_VTT +1.05V_VCCAPLL_EXP
*1uH/25mA_6
*1uH/25mA_6
+1.05V_VTT
(Mobile 1.5V)
R534 0_6 R534 0_6
+1.5V
R536 *0_6 R536 *0_6
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
L53
L53
10uH/100MA_8
10uH/100MA_8
L50
L50
10uH/100MA_8
10uH/100MA_8
+3V
R539 *0_6 R539 *0_6
R543 1/F_4 R543 1/F_4
+1.05V_VTT +VCC_DMI_CCI +1.1V_VCC_DMI_CCI
R540 *1/F_4 R540 *1/F_4
R541 0_4 R541 0_4
1.3 A (60mils)
+1.05V_PCH_VCCDPLL_EXP +1.05V_VTT
R254
R254
0_6
0_6
L48
L48
C386
C386
10U/6.3VS_6
10U/6.3VS_6
R504 0_8 R504 0_8
160mA (15mils)
+VCCAFDI_VRM
+1.05V_VTT
C388
C388
1U/6.3V_4
1U/6.3V_4
C378
C378
10U/6.3VS_6
10U/6.3VS_6
C605
C605
*10U/6.3V_6
*10U/6.3V_6
2.925 A (140mils)
C400
C400
1U/6.3V_4
1U/6.3V_4
C389
C389
1U/6.3V_4
1U/6.3V_4
+3V_VCC_EXP +3V
+VCCAFDI_VRM
+1.05V_VCCAPLL_FDI
R450 *0_8 R450 *0_8
R492 0_8 R492 0_8
+1.05V_VCCDPLL_FDI
65mA (10mils)
+1.05V_VCCA_A_DPL
8mA (10mils)
+1.05V_VCCA_B_DPL
20mA (10mils)
+3V_SUS_CLKF33
+3V_SUS_CLKF33_R
20mA (10mils)
2
1mA (10mils)
+VCCA_DAC_1_2
COUGAR POINT (POWER)
U24G
U24G
AA23
VCCCORE[1]
AC23
C381
C381
1U/6.3V_4
1U/6.3V_4 C632 10U/6.3VS_6 C632 10U/6.3VS_6
C392
C392
1U/6.3V_4
1U/6.3V_4
C401
C401
1U/6.3V_4
1U/6.3V_4
C390
C390
1U/6.3V_4
1U/6.3V_4
C611
C611
0.1U/10V_4
0.1U/10V_4
L55
L55
*10uH/100mA_8
*10uH/100mA_8
VCCCORE[2]
AD21
VCCCORE[3]
AD23
VCCCORE[4]
AF21
VCCCORE[5]
AF23
VCCCORE[6]
AG21
VCCCORE[7]
AG23
VCCCORE[8]
AG24
VCCCORE[9]
AG26
VCCCORE[10]
AG27
VCCCORE[11]
AG29
VCCCORE[12]
AJ23
VCCCORE[13]
AJ26
VCCCORE[14]
AJ27
VCCCORE[15]
AJ29
VCCCORE[16]
AJ31
VCCCORE[17]
AN19
VCCIO[28]
BJ22
VCCAPLLEXP
AN16
VCCIO[15]
AN17
VCCIO[16]
AN21
VCCIO[17]
AN26
VCCIO[18]
AN27
VCCIO[19]
AP21
VCCIO[20]
AP23
VCCIO[21]
AP24
VCCIO[22]
AP26
VCCIO[23]
AT24
VCCIO[24]
AN33
VCCIO[25]
AN34
VCCIO[26]
BH29
VCC3_3[3]
AP16
VCCVRM[2]
BG6
VccAFDIPLL
AP17
VCCIO[27]
AU20
VCCDMI[2]
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
fcbga989-intel-cougarpoint
fcbga989-intel-cougarpoint
AJ0QMZQ0T00
AJ0QMZQ0T00
IC CTRL(989P)COUGARPOINT QMVY TOP B/S
IC CTRL(989P)COUGARPOINT QMVY TOP B/S
C620 1U/6.3V_4 C620 1U/6.3V_4
+
+
C627 *220U/2.5V_3528
C627 *220U/2.5V_3528
C617 1U/6.3V_4 C617 1U/6.3V_4
+
+
C406 *220U/2.5V_3528
C406 *220U/2.5V_3528
C642 1U/6.3V_4 C642 1U/6.3V_4
C639 10U/6.3VS_6 C639 10U/6.3VS_6
L58
L58
10uH/100mA_8
10uH/100mA_8
CRT LVDS
CRT LVDS
VCC CORE
VCC CORE
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
VCCIO
VCCIO
DMI
DMI
NAND / SPI HVCMOS
NAND / SPI HVCMOS
FDI
FDI
UMA Only, If have power noise issue then stuff it.
U48
VCCADAC
U47
VSSADAC
1mA (10mils)
AK36
VCCALVDS
AK37
VSSALVDS
AM37
AM38
AP36
AP37
SG & UMA : Ra
DIS : Rb
V33
VCC3_3[6]
V34
VCC3_3[7]
+VCCAFDI_VRM
AT16
VCCVRM[3]
AT20
VCCDMI[1]
VCCCLKDMI
VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCSPI
+5V_PCH_VCC5REF
AB36
AG16
AG17
AJ16
AJ17
V1
+1.1V_VCC_DMI_CCI
C631
C631
1U/6.3V_4
1U/6.3V_4
190 mA (15mils)
20mA (10mils)
V5REF= 1mA
+5V_PCH_VCC5REFSUS
VCC5REFSUS=1mA
+5V +3V_LDO
C699
C699
1U/6.3V_4
1U/6.3V_4
U29
U29
G910T21U
G910T21U
Vin3Vout
GND
2
1
L56
L56
*HCB1608KF-181T15/1.5A_6
*HCB1608KF-181T15/1.5A_6
C626 0.1U/10V_4 C626 0.1U/10V_4
C629 0.01U/25V_4 C629 0.01U/25V_4
R533 *0_6 R533 *0_6
+VCCALVDS +3V
Ra
DEL
60mA (10mils)
0.1uH/250mA_8
0.1uH/250mA_8
DEL
C633 22U/6.3VS_8 C633 22U/6.3VS_8
C635 0.01U/25V_4 C635 0.01U/25V_4
C630 0.01U/25V_4 C630 0.01U/25V_4
R548 0_6 R548 0_6
C662
C662
0.1U/10V_4
0.1U/10V_4
Ra
L54
L54
42mA (10mils)
C640
C640
*10U/6.3V_6
*10U/6.3V_6
R223 0_8 R223 0_8
C373
C373
0.1U/10V_4
0.1U/10V_4
R436 0_6 R436 0_6
C590
C590
1U/6.3V_4
1U/6.3V_4
R271 10_4 R271 10_4
D7 RB500V-40 D7 RB500V-40
C395
C395
1U/6.3V_4
1U/6.3V_4
R274 10_4 R274 10_4
D8 RB500V-40 D8 RB500V-40
C402
C402
0.1U/10V_4
0.1U/10V_4
1
9/15 SI for EE
9/15 SI for EE
+3V +3V_VCC_GIO
R252 0_4 R252 0_4
C376
C376
1U/6.3V_4
1U/6.3V_4
+1.8V +VCCP_NAND
+3V +3V_VCCME_SPI
+3V
+3V_LDO
+1.8V +VCC_TX_LVDS
+1.05V_VTT +1.1V_VCC_DMI
+5V
+3V
+5VS5
+3VS5
352-(&75
352-(&75
352-(&75
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
PCH 5/6 (POWE R)
PCH 5/6 (POWE R)
1%
1%
5
4
3
2
1%
PCH 5/6 (POWE R)
Date: Sheet
Date: Sheet
Date: Sheet
1
10 39 Saturday, September 18, 2010
10 39 Saturday, September 18, 2010
10 39 Saturday, September 18, 2010
3A
3A
3A
of
of
of
5
4
3
2
1
IBEX PEAK-M (GND)
U24I
U24I
AY4
VSS[159]
AY42
VSS[160]
AY46
VSS[161]
AY8
VSS[162]
B11
VSS[163]
B15
D D
C C
B B
A A
5
VSS[164]
B19
VSS[165]
B23
VSS[166]
B27
VSS[167]
B31
VSS[168]
B35
VSS[169]
B39
VSS[170]
B7
VSS[171]
F45
VSS[172]
BB12
VSS[173]
BB16
VSS[174]
BB20
VSS[175]
BB22
VSS[176]
BB24
VSS[177]
BB28
VSS[178]
BB30
VSS[179]
BB38
VSS[180]
BB4
VSS[181]
BB46
VSS[182]
BC14
VSS[183]
BC18
VSS[184]
BC2
VSS[185]
BC22
VSS[186]
BC26
VSS[187]
BC32
VSS[188]
BC34
VSS[189]
BC36
VSS[190]
BC40
VSS[191]
BC42
VSS[192]
BC48
VSS[193]
BD46
VSS[194]
BD5
VSS[195]
BE22
VSS[196]
BE26
VSS[197]
BE40
VSS[198]
BF10
VSS[199]
BF12
VSS[200]
BF16
VSS[201]
BF20
VSS[202]
BF22
VSS[203]
BF24
VSS[204]
BF26
VSS[205]
BF28
VSS[206]
BD3
VSS[207]
BF30
VSS[208]
BF38
VSS[209]
BF40
VSS[210]
BF8
VSS[211]
BG17
VSS[212]
BG21
VSS[213]
BG33
VSS[214]
BG44
VSS[215]
BG8
VSS[216]
BH11
VSS[217]
BH15
VSS[218]
BH17
VSS[219]
BH19
VSS[220]
H10
VSS[221]
BH27
VSS[222]
BH31
VSS[223]
BH33
VSS[224]
BH35
VSS[225]
BH39
VSS[226]
BH43
VSS[227]
BH7
VSS[228]
D3
VSS[229]
D12
VSS[230]
D16
VSS[231]
D18
VSS[232]
D22
VSS[233]
D24
VSS[234]
D26
VSS[235]
D30
VSS[236]
D32
VSS[237]
D34
VSS[238]
D38
VSS[239]
D42
VSS[240]
D8
VSS[241]
E18
VSS[242]
E26
VSS[243]
G18
VSS[244]
G20
VSS[245]
G26
VSS[246]
G28
VSS[247]
G36
VSS[248]
G48
VSS[249]
H12
VSS[250]
H18
VSS[251]
H22
VSS[252]
H24
VSS[253]
H26
VSS[254]
H30
VSS[255]
H32
VSS[256]
H34
VSS[257]
F3
VSS[258]
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
4
H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28
3
IBEX PEAK-M (GND)
U24H
U24H
H5
VSS[0]
AA17
VSS[1]
AA2
VSS[2]
AA3
VSS[3]
AA33
VSS[4]
AA34
VSS[5]
AB11
VSS[6]
AB14
VSS[7]
AB39
VSS[8]
AB4
VSS[9]
AB43
VSS[10]
AB5
VSS[11]
AB7
VSS[12]
AC19
VSS[13]
AC2
VSS[14]
AC21
VSS[15]
AC24
VSS[16]
AC33
VSS[17]
AC34
VSS[18]
AC48
VSS[19]
AD10
VSS[20]
AD11
VSS[21]
AD12
VSS[22]
AD13
VSS[23]
AD19
VSS[24]
AD24
VSS[25]
AD26
VSS[26]
AD27
VSS[27]
AD33
VSS[28]
AD34
VSS[29]
AD36
VSS[30]
AD37
VSS[31]
AD38
VSS[32]
AD39
VSS[33]
AD4
VSS[34]
AD40
VSS[35]
AD42
VSS[36]
AD43
VSS[37]
AD45
VSS[38]
AD46
VSS[39]
AD8
VSS[40]
AE2
VSS[41]
AE3
VSS[42]
AF10
VSS[43]
AF12
VSS[44]
AD14
VSS[45]
AD16
VSS[46]
AF16
VSS[47]
AF19
VSS[48]
AF24
VSS[49]
AF26
VSS[50]
AF27
VSS[51]
AF29
VSS[52]
AF31
VSS[53]
AF38
VSS[54]
AF4
VSS[55]
AF42
VSS[56]
AF46
VSS[57]
AF5
VSS[58]
AF7
VSS[59]
AF8
VSS[60]
AG19
VSS[61]
AG2
VSS[62]
AG31
VSS[63]
AG48
VSS[64]
AH11
VSS[65]
AH3
VSS[66]
AH36
VSS[67]
AH39
VSS[68]
AH40
VSS[69]
AH42
VSS[70]
AH46
VSS[71]
AH7
VSS[72]
AJ19
VSS[73]
AJ21
VSS[74]
AJ24
VSS[75]
AJ33
VSS[76]
AJ34
VSS[77]
AK12
VSS[78]
AK3
VSS[79]
CougarPoint_Rev_0p7
CougarPoint_Rev_0p7
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28
352-(&75
352-(&75
352-(&75
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
1%
1%
1%
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PCH 6/6 (GND)
PCH 6/6 (GND)
PCH 6/6 (GND)
1
11 39 Saturday, Sep tember 18, 2010
11 39 Saturday, Sep tember 18, 2010
11 39 Saturday, Sep tember 18, 2010
3A
1A
3A
1A
3A
1A
5
4
3
2
1
JDIM1A
M_A_A[15:0] 3
D D
M_A_BS#0 3
M_A_BS#1 3
M_A_BS#2 3
M_A_CS#0 3
M_A_CS#1 3
M_A_CLKP0 3
M_A_CLKN0 3
M_A_CLKP1 3
M_A_CLKN1 3
M_A_CKE0 3
M_A_CKE1 3
M_A_CAS# 3
M_A_RAS# 3
R157 10K_4 R157 10K_4
R161 10K_4 R161 10K_4
C C
B B
M_A_WE# 3
SMB_RUN_CLK 8,13
SMB_RUN_DAT 8,13
M_A_ODT0 3
M_A_ODT1 3
M_A_DQSP[7:0] 3
M_A_DQSN[7:0] 3
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
DIMM0_SA0
DIMM0_SA1
SMB_RUN_CLK
SMB_RUN_DAT
M_A_DM1
M_A_DM2
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
JDIM1A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDR3-DIMM0_H=5.2_RVS
DDR3-DIMM0_H=5.2_RVS
DDR-78279-001-RVS-204P
DDR-78279-001-RVS-204P
DGMK4000125
DGMK4000125
IC SOCKET DDRIII SO-DIMM(204P,H5.2,RVS)
IC SOCKET DDRIII SO-DIMM(204P,H5.2,RVS)
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
(204P)
(204P)
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
M_A_DQ4
5
M_A_DQ5
7
M_A_DQ7
15
M_A_DQ6
17
M_A_DQ1
4
M_A_DQ0
6
M_A_DQ3
16
M_A_DQ2
18
M_A_DQ9
21
M_A_DQ8
23
M_A_DQ15
33
M_A_DQ10
35
M_A_DQ12
22
M_A_DQ13
24
M_A_DQ14
34
M_A_DQ11
36
M_A_DQ21
39
M_A_DQ16
41
M_A_DQ19
51
M_A_DQ18
53
M_A_DQ20
40
M_A_DQ17
42
M_A_DQ23
50
M_A_DQ22
52
M_A_DQ25
57
M_A_DQ24
59
M_A_DQ30
67
M_A_DQ26
69
M_A_DQ28
56
M_A_DQ29
58
M_A_DQ31
68
M_A_DQ27
70
M_A_DQ36
129
M_A_DQ37
131
M_A_DQ34
141
M_A_DQ38
143
M_A_DQ32
130
M_A_DQ33
132
M_A_DQ35
140
M_A_DQ39
142
M_A_DQ41
147
M_A_DQ45
149
M_A_DQ47
157
M_A_DQ46
159
M_A_DQ40
146
M_A_DQ44
148
M_A_DQ42
158
M_A_DQ43
160
M_A_DQ49
163
M_A_DQ48
165
M_A_DQ54
175
M_A_DQ55
177
M_A_DQ53
164
M_A_DQ52
166
M_A_DQ50
174
M_A_DQ51
176
M_A_DQ61
181
M_A_DQ60
183
M_A_DQ62
191
M_A_DQ63
193
M_A_DQ56
180
M_A_DQ57
182
M_A_DQ59
192
M_A_DQ58
194
M_A_DQ[63:0] 3
SMDDR_VREF_DQ0_M3 5
SI reseve pad for RF
+1.5VSUS
+1.5V
SMDDR_VREF_DQ0_M3
C234 *2.2U/6.3V_6 C234 *2.2U/6.3V_6
C99 *2.2U/6.3V_6 C99 *2.2U/6.3V_6
C436 *2.2U/6.3V_6 C436 *2.2U/6.3V_6
C437 *2.2U/6.3V_6 C437 *2.2U/6.3V_6
PM_EXTTS#0 13
DDR3_DRAMRST# 2,13
R74 0_6 R74 0_6
R35 *0_6 R35 *0_6
+3V
2.48A
+3V
R150 10K_4 R150 10K_4
PM_EXTTS#0
+SMDDR_VREF_DQ0 SMDDR_VREF_DQ0_M1
+SMDDR_VREF_DIMM
+1.5VSUS
+0.75V_DDR_VTT 13,35,38
+1.5VSUS 2,4,10,13,22,35,39
+3VPCU 7,20,28,29,31,37
+3V 2,6,7,8,9,10,13,14,17,20,21,22,23,24,25,27,28,29,30,33,38,39
+5VPCU 29,31,37
JDIM1B
JDIM1B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3-DIMM0_H=5.2_RVS
DDR3-DIMM0_H=5.2_RVS
DDR-78279-001-RVS-204P
DDR-78279-001-RVS-204P
DGMK4000125
DGMK4000125
IC SOCKET DDRIII SO-DIMM(204P,H5.2,RVS)
IC SOCKET DDRIII SO-DIMM(204P,H5.2,RVS)
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
(204P)
(204P)
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VTT1
VTT2
GND
GND
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
205
206
+0.75V_DDR_VTT
VREF DQ0 M2 Solution VREF DQ0 M1 Solution Place these Caps near So-Dimm0.
R131 *0_6 R131 *0_6
+1.5VSUS
R78
R78
1K/F_4
1K/F_4
R128
R128
1K/F_4
1K/F_4
+1.5VSUS
DDR_VTTREF 4,13,35
1%
1%
1%
R138 *0_6 R138 *0_6
352-(&75
352-(&75
352-(&75
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
DDR3 DIMM0-RVS (5.2H)
DDR3 DIMM0-RVS (5.2H)
DDR3 DIMM0-RVS (5.2H)
1
R126
R126
10K_4
10K_4
+SMDDR_VREF_DIMM
C315
C315
R144
R144
470P/50V_4
470P/50V_4
10K_4
10K_4
12 39 Saturday, Sep tember 18, 2010
12 39 Saturday, Sep tember 18, 2010
12 39 Saturday, Sep tember 18, 2010
3A
1A
3A
1A
3A
1A
+1.5VSUS +0.75V_DDR_VTT
C192 1U/6.3V_4 C192 1U/6.3V_4
C243 1U/6.3V_4 C243 1U/6.3V_4
C223 1U/6.3V_4 C223 1U/6.3V_4
C142 1U/6.3V_4 C142 1U/6.3V_4
del M2 solution
A A
C202 10U/6.3VS_6 C202 10U/6.3VS_6
C153 10U/6.3VS_6 C153 10U/6.3VS_6
C127 10U/6.3VS_6 C127 10U/6.3VS_6
C137 10U/6.3VS_6 C137 10U/6.3VS_6
C182 10U/6.3VS_6 C182 10U/6.3VS_6
C255 10U/6.3VS_6 C255 10U/6.3VS_6
C132 *10U/6.3V_6 C132 *10U/6.3V_6
C117 10U/6.3V_8 C117 10U/6.3V_8
C114 10U/6.3V_8 C114 10U/6.3V_8
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
4/27: layout modify
5
4
3
C338 1U/6.3V_4 C338 1U/6.3V_4
C564 1U/6.3V_4 C564 1U/6.3V_4
C568 1U/6.3V_4 C568 1U/6.3V_4
C345 1U/6.3V_4 C345 1U/6.3V_4
C561 10U/6.3V_6 C561 10U/6.3V_6
C325 *10U/6.3V_6 C325 *10U/6.3V_6
C308 0.1U/10V_4 C308 0.1U/10V_4
C294 2.2U/6.3V_6 C294 2.2U/6.3V_6
C28 0.1U/10V_4 C28 0.1U/10V_4
C80 2.2U/6.3V_6 C80 2.2U/6.3V_6
+3V
C306 0.1U/10V_4 C306 0.1U/10V_4
C321 2.2U/6.3V_6 C321 2.2U/6.3V_6
DDR_VTTREF SMDDR_VREF_DQ0_M1
2