Quanta R0AA, Inspiron M421R Schematic
5
+3.3V/+5V(TPS51125ARGER)
Page 46
4
3
2
1
Audi R0AA SYSTEM DIAGRAM
+1.1V_SUS(RT8228AZ)
+1.5_DDR/0.75(TPS51216RUKR)
D D
+2.5V_RUN(G9334TB1U)
+CPU VCORE(OZ8321LN)
+1.2V_VDDPR(RT8228AZ)
Charger(BQ24707ARGRR)
+VCC_DGFX_CORE(NCP5269)
C C
Card Reader
RTS 5179
Page 26
Webcam
IO
USB3.0&2.0
B B
Combo port
PWR SW
Page 34
X1
Page 29
Page 44
Page 42
Page 41
Page 45
Page 43
Page 40
Page 45
RJ45
Page 22
USB3.0&2.0
Combo port
Debug port
USB Share
SODIMM0
Max. 4GB
SODIMM1
Max. 4GB
LAN
AR8162
10/100
IO Board
WLAN
WiFi+BT4.0
Page 25
Dual Channel
1333/1600Mhz
DDR3
Channel A
Page 13
Dual Channel
1333/1600Mhz
DDR3
Channel B
Page 14
IO Board
Page 29
3&,(
Page 29
USB 2.0
USB3.0&2.0
Combo port
Page 25 & 38
USB 3.0
x2
AMD
35W
Socket FS1r2-Trinity
APU ( CPU + GPU )
uPGA 722 pin
Page 3~7
UMI
DP1
DP to VGA
AMD
FCH
Hudson-M3
FCBGA 656 pin
DP2
DP0
P_GFX[0:7]
CRT
SATA0
SATA1
HDMI
Page 24
TRAVIS
AX3112
Page 27
AMD
Thames - Pro
PP;PP
7'3a:
CRT
HDD
ODD
Page 23
Page 28
Page 28
Travis LVDS
LVDS
DDR3 900MHz
64x16x8,128bit
THERMAL
Page 15~19
G781-1P8
FAN & THERMAL
G990P11U & EMC1422
Page 35
Page 22
VRAM
SW Board
Page 31
Page 32
LPC
SPI ROM
4M Byte
SPI
Page 32
CX20672-21Z
HOTKEY
Page 33
HOTKEY Board
A A
KBC
ITE 8518
KB TP
Page 33Page 33
ROM 512 Byte
TP Board
5
4
Page 8~12
Azalia
AUDIO
CODEC
3
Page 30
SPEAKER 2W
HP/MIC
DIGITAL MIC
Page 30
Page 30
Page 22
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
Block Diagram
Block Diagram
Block Diagram
R0AA
R0AA
R0AA
of
of
of
155Monday, June 25, 2012
155Monday, June 25, 2012
155Monday, June 25, 2012
1
B
B
B
5
4
3
2
1
USB Master
USB0
D D
C C
USB1
USB2
USB3
USB4
USB5
USB6
USB7 Card Reader
USB8
USB9
USB10
USB11
USB12
USB13
Port Assignment
DEBUG
MiniCard 1 (WLAN/BT)
NC
NC
NC
NC
NC
NC
Camera
External port#1 (USB3.0)
External port#2 (USB3.0)
External port#3 (USB3.0)
External port#4 (Power share)
SATA0
SATA1
SATA2
SATA3
SATA4
SATA5
Port AssignmentSATA Master
HDD
ODD
NC
NC
NC NC
NC
CPU_GPP 0
CPU_GPP 1
CPU_GPP 2
CPU_GPP 3
FCH_GPP 0
FCH_GPP 1
FCH_GPP 2
FCH_GPP 3
Port AssignmentPCIE Master
LAN
WLAN
NC
NC
NC
NC
NC
B B
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Monday, June 25, 2012
Monday, June 25, 2012
Monday, June 25, 2012
Date: Sheet
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
PORT ASSIGNMENT
PORT ASSIGNMENT
PORT ASSIGNMENT
R0AA
R0AA
R0AA
255
255
255
1
B
B
B
of
5
D D
C C
LAN
WLAN
PCIE_RXP0_LAN[29]
PCIE_RXN0_LAN[29]
PCIE_RXP1_WLAN[29]
PCIE_RXN1_WLAN[29]
+1.2V_VDDPR
PEG_RXP0[15]
PEG_RXN0[15]
PEG_RXP1[15]
PEG_RXN1[15]
PEG_RXP2[15]
PEG_RXN2[15]
PEG_RXP3[15]
PEG_RXN3[15]
PEG_RXP4[15]
PEG_RXN4[15]
PEG_RXP5[15]
PEG_RXN5[15]
PEG_RXP6[15]
PEG_RXN6[15]
PEG_RXP7[15]
PEG_RXN7[15]
UMI_RXP0[9]
UMI_RXN0[9]
UMI_RXP1[9]
UMI_RXN1[9]
UMI_RXP2[9]
UMI_RXN2[9]
UMI_RXP3[9]
UMI_RXN3[9]
R378 196/F_6 R376 196/F_6
4
PEG_RXP0
PEG_RXN0
PEG_RXP1
PEG_RXN1
PEG_RXP2
PEG_RXN2
PEG_RXP3
PEG_RXN3
PEG_RXP4
PEG_RXN4
PEG_RXP5
PEG_RXN5
PEG_RXP6
PEG_RXN6
PEG_RXP7
PEG_RXN7
AG11
AB8
AB7
AA9
AA8
AA5
AA6
AE5
AE6
AD8
AD7
AC9
AC8
AC5
AC6
AG8
AG9
AG6
AG5
AF7
AF8
AE8
AE9
W9
W8
W5
W6
U9
U8
U5
U6
R9
R8
R5
R6
N9
N8
N5
N6
M8
M7
U29F
P_GFX_RXP0
P_GFX_RXN0
P_GFX_RXP1
P_GFX_RXN1
P_GFX_RXP2
P_GFX_RXN2
Y8
P_GFX_RXP3
Y7
P_GFX_RXN3
P_GFX_RXP4
P_GFX_RXN4
P_GFX_RXP5
P_GFX_RXN5
V8
P_GFX_RXP6
V7
P_GFX_RXN6
P_GFX_RXP7
P_GFX_RXN7
P_GFX_RXP8
P_GFX_RXN8
T8
P_GFX_RXP9
T7
P_GFX_RXN9
P_GFX_RXP10
P_GFX_RXN10
P_GFX_RXP11
P_GFX_RXN11
P8
P_GFX_RXP12
P7
P_GFX_RXN12
P_GFX_RXP13
P_GFX_RXN13
P_GFX_RXP14
P_GFX_RXN14
P_GFX_RXP15
P_GFX_RXN15
P_GPP_RXP0
P_GPP_RXN0
P_GPP_RXP1
P_GPP_RXN1
P_GPP_RXP2
P_GPP_RXN2
P_GPP_RXP3
P_GPP_RXN3
P_UMI_RXP0
P_UMI_RXN0
P_UMI_RXP1
P_UMI_RXN1
P_UMI_RXP2
P_UMI_RXN2
P_UMI_RXP3
P_UMI_RXN3
P_ZVDDP
PCI EXPRESS
GRAPHICS
GPP
UMI-LINK
P_GFX_TXP0
P_GFX_TXN0
P_GFX_TXP1
P_GFX_TXN1
P_GFX_TXP2
P_GFX_TXN2
P_GFX_TXP3
P_GFX_TXN3
P_GFX_TXP4
P_GFX_TXN4
P_GFX_TXP5
P_GFX_TXN5
P_GFX_TXP6
P_GFX_TXN6
P_GFX_TXP7
P_GFX_TXN7
P_GFX_TXP8
P_GFX_TXN8
P_GFX_TXP9
P_GFX_TXN9
P_GFX_TXP10
P_GFX_TXN10
P_GFX_TXP11
P_GFX_TXN11
P_GFX_TXP12
P_GFX_TXN12
P_GFX_TXP13
P_GFX_TXN13
P_GFX_TXP14
P_GFX_TXN14
P_GFX_TXP15
P_GFX_TXN15
P_GPP_TXP0
P_GPP_TXN0
P_GPP_TXP1
P_GPP_TXN1
P_GPP_TXP2
P_GPP_TXN2
P_GPP_TXP3
P_GPP_TXN3
P_UMI_TXP0
P_UMI_TXN0
P_UMI_TXP1
P_UMI_TXN1
P_UMI_TXP2
P_UMI_TXN2
P_UMI_TXP3
P_UMI_TXN3
P_ZVSS
AB2
AB1
AA3
AA2
Y5
Y4
Y2
Y1
W3
W2
V5
V4
V2
V1
U3
U2
T5
T4
T2
T1
R3
R2
P5
P4
P2
P1
N3
N2
M5
M4
M2
M1
AD5
PCIE_TXP0_LAN_C
AD4
PCIE_TXN0_LAN_C
AD2
PCIE_TXP1_WLAN_C
AD1
PCIE_TXN1_WLAN_C
AC3
AC2
AB5
AB4
AG2
AG3
AF4
AF5
AF1
AF2
AE2
AE3
AH11
3
PEG_TXP0_C
PEG_TXN0_C
PEG_TXP1_C
PEG_TXN1_C
PEG_TXP2_C
PEG_TXN2_C
PEG_TXP3_C
PEG_TXN3_C
PEG_TXP4_C
PEG_TXN4_C
PEG_TXP5_C
PEG_TXN5_C
PEG_TXP6_C
PEG_TXN6_C
PEG_TXP7_C
PEG_TXN7_C
UMI_TXP0_C
UMI_TXN0_C
UMI_TXP1_C
UMI_TXN1_C
UMI_TXP2_C
UMI_TXN2_C
UMI_TXP3_C
UMI_TXN3_C
C534 0.1U/16V/X7R_4
C565 0.1U/16V/X7R_4
C563 0.1U/16V/X7R_4
C532 0.1U/16V/X7R_4
C561 0.1U/16V/X7R_4
C536 0.1U/16V/X7R_4
C558 0.1U/16V/X7R_4
C556 0.1U/16V/X7R_4
C247 0.1U/16V/X7R_4
C246 0.1U/16V/X7R_4
C245 0.1U/16V/X7R_4
C244 0.1U/16V/X7R_4
C570 0.1U/16V/X7R_4
C571 0.1U/16V/X7R_4
C572 0.1U/16V/X7R_4
C573 0.1U/16V/X7R_4
C568 0.1U/16V/X7R_4
C569 0.1U/16V/X7R_4
C566 0.1U/16V/X7R_4
C567 0.1U/16V/X7R_4
C533 0.1U/16V/X7R_4
C564 0.1U/16V/X7R_4
C562 0.1U/16V/X7R_4
C531 0.1U/16V/X7R_4
C560 0.1U/16V/X7R_4
C535 0.1U/16V/X7R_4
C559 0.1U/16V/X7R_4
C557 0.1U/16V/X7R_4
PCIE_TXP0_LAN [29]
PCIE_TXN0_LAN [29]
PCIE_TXP1_WLAN [29]
PCIE_TXN1_WLAN [29]
UMI_TXP0 [9]
UMI_TXN0 [9]
UMI_TXP1 [9]
UMI_TXN1 [9]
UMI_TXP2 [9]
UMI_TXN2 [9]
UMI_TXP3 [9]
UMI_TXN3 [9]
2
PEG_TXP0
PEG_TXN0
PEG_TXP1
PEG_TXN1
PEG_TXP2
PEG_TXN2
PEG_TXP3
PEG_TXN3
PEG_TXP4
PEG_TXN4
PEG_TXP5
PEG_TXN5
PEG_TXP6
PEG_TXN6
PEG_TXP7
PEG_TXN7
PEG_TXP0 [15]
PEG_TXN0 [15]
PEG_TXP1 [15]
PEG_TXN1 [15]
PEG_TXP2 [15]
PEG_TXN2 [15]
PEG_TXP3 [15]
PEG_TXN3 [15]
PEG_TXP4 [15]
PEG_TXN4 [15]
PEG_TXP5 [15]
PEG_TXN5 [15]
PEG_TXP6 [15]
PEG_TXN6 [15]
PEG_TXP7 [15]
PEG_TXN7 [15]
LAN
WLAN
1
PEG X 8
Trinity APU
B B
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT :
Trinity PCIE/UMI/GPP
Trinity PCIE/UMI/GPP
Trinity PCIE/UMI/GPP
R0AA
R0AA
R0AA
B
B
B
of
of
of
355Monday, June 25, 2012
355Monday, June 25, 2012
355Monday, June 25, 2012
1
5
4
3
2
1
M_A_DQ[0..63] [13]
M_B_A[15:0][14]
M_B_BS[2..0][14]
M_B_DM[7 ..0][14]
M_B_DQSP0[14]
M_B_DQSN0[14]
M_B_DQSP1[14]
M_B_DQSN1[14]
M_B_DQSP2[14]
M_B_DQSN2[14]
M_B_DQSP3[14]
M_B_DQSN3[14]
M_B_DQSP4[14]
M_B_DQSN4[14]
M_B_DQSP5[14]
M_B_DQSN5[14]
M_B_DQSP6[14]
M_B_DQSN6[14]
M_B_DQSP7[14]
M_B_DQSN7[14]
M_B_CLKP0[14]
M_B_CLKN0[14]
M_B_CLKP1[14]
M_B_CLKN1[14]
M_B_CKE0[14]
M_B_CKE1[14]
M_B_ODT0[14]
M_B_ODT1[14]
M_B_CS#0[14]
M_B_CS#1[14]
M_B_RAS#[14]
M_B_CAS#[14]
M_B_WE#[14]
M_B_RST#[14]
M_B_EVENT#[14]
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_BS0
M_B_BS1
M_B_BS2
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_EVENT#
AA25
AD27
AC23
AD19
AC15
AE26
AD26
AB22
AA22
AB18
AA18
AA14
AA15
AA27
AA26
W24
W23
W20
W21
U20
R20
R21
P22
P21
N24
N23
N20
N21
M21
U23
M22
U24
U21
E14
E21
G14
H14
G18
L24
L21
L20
L23
J17
F25
H18
J21
H21
E27
E26
T21
T22
R23
R24
H28
H27
Y25
V22
V21
H25
T24
U29A
MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8
MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15
MA_BANK0
MA_BANK1
MA_BANK2
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7
MA_CLK_H0
MA_CLK_L0
MA_CLK_H1
MA_CLK_L1
MA_CKE0
MA_CKE1
MA_ODT0
MA_ODT1
MA_CS_L0
MA_CS_L1
MA_RAS_L
MA_CAS_L
MA_WE_L
MA_RESET_L
MA_EVENT_L
M_VREF
M_ZVDDIO
MEMORY CHANNEL A
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
E13
J13
H15
J15
H13
F13
F15
E15
H17
F17
E19
J19
G16
H16
H19
F19
H20
F21
J23
H23
G20
E20
G22
H22
G24
E25
G27
G26
F23
H24
E28
F27
AB28
AC27
AD25
AA24
AE28
AD28
AB26
AC25
Y23
AA23
Y21
AA20
AB24
AD24
AA21
AC21
AA19
AC19
AC17
AA17
AB20
Y19
AD18
AD17
AA16
Y15
AA13
AC13
Y17
AB16
AB14
Y13
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_A[15:0][13]
D D
M_A_BS[2..0][13]
M_A_DM[7 ..0][13]
M_A_DQSP0[13]
M_A_DQSN0[13]
M_A_DQSP1[13]
M_A_DQSN1[13]
M_A_DQSP2[13]
M_A_DQSN2[13]
C C
B B
+1.5V_SUS
M_A_DQSP3[13]
M_A_DQSN3[13]
M_A_DQSP4[13]
M_A_DQSN4[13]
M_A_DQSP5[13]
M_A_DQSN5[13]
M_A_DQSP6[13]
M_A_DQSN6[13]
M_A_DQSP7[13]
M_A_DQSN7[13]
M_A_CLKP0[13]
M_A_CLKN0[13]
M_A_CLKP1[13]
M_A_CLKN1[13]
M_A_CKE0[13]
M_A_CKE1[13]
M_A_ODT0[13]
M_A_ODT1[13]
M_A_CS#0[13]
M_A_CS#1[13]
M_A_RAS#[13]
M_A_CAS#[13]
M_A_WE#[13]
M_A_RST#[13]
M_A_EVENT#[13]
R130 39.2/F_4
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS0
M_A_BS1
M_A_BS2
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_EVENT#
+M_VREF
Place close to APU within 1"
U29B
T27
MB_ADD0
P24
MB_ADD1
P25
MB_ADD2
N27
MB_ADD3
N26
MB_ADD4
M28
MB_ADD5
M27
MB_ADD6
M24
MB_ADD7
M25
MB_ADD8
L26
MB_ADD9
U26
MB_ADD10
L27
MB_ADD11
K27
MB_ADD12
W26
MB_ADD13
K25
MB_ADD14
K24
MB_ADD15
U27
MB_BANK0
T28
MB_BANK1
K28
MB_BANK2
D14
MB_DM0
A18
MB_DM1
A22
MB_DM2
C25
MB_DM3
AF25
MB_DM4
AG22
MB_DM5
AH18
MB_DM6
AD14
MB_DM7
C15
MB_DQS_H0
B15
MB_DQS_L0
E18
MB_DQS_H1
D18
MB_DQS_L1
E22
MB_DQS_H2
D22
MB_DQS_L2
B26
MB_DQS_H3
A26
MB_DQS_L3
AG24
MB_DQS_H4
AG25
MB_DQS_L4
AG21
MB_DQS_H5
AF21
MB_DQS_L5
AG17
MB_DQS_H6
AG18
MB_DQS_L6
AH14
MB_DQS_H7
AG14
MB_DQS_L7
R26
MB_CLK_H0
R27
MB_CLK_L0
P27
MB_CLK_H1
P28
MB_CLK_L1
J26
MB_CKE0
J27
MB_CKE1
W27
MB_ODT0
Y28
MB_ODT1
V25
MB_CS_L0
Y27
MB_CS_L1
V24
MB_RAS_L
V27
MB_CAS_L
V28
MB_WE_L
J25
MB_RESET_L
T25
MB_EVENT_L
Trinity APU
MEMORY CHANNEL B
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
A14
B14
D16
E16
B13
C13
B16
A16
C17
B18
B20
A20
E17
B17
B19
C19
C21
B22
C23
A24
D20
B21
E23
B23
E24
B25
B27
D28
B24
D24
D26
C27
AG26
AH26
AF23
AG23
AG27
AF27
AH24
AE24
AE22
AH22
AE20
AH20
AD23
AD22
AD21
AD20
AF19
AE18
AE16
AH16
AG20
AG19
AF17
AD16
AG15
AD15
AG13
AD13
AG16
AF15
AE14
AF13
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_DQ[0..63] [14]
Trinity APU
Soldermask openings for all bottom side vias/TPs under FS1R2
+1.5V_SUS
R131
1K/F_4
+1.5V_SUS
A A
R109 1K_4
R159 1K_4
M_A_EVENT#
M_B_EVENT#
5
+M_VREF
R126
1K/F_4
C297
*1000P/50V/X7R_4_NC
4
C296
0.1U/16V/X7R_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
3
2
Date: Sheet
PROJECT :
DDR3 MEM I/F
DDR3 MEM I/F
DDR3 MEM I/F
R0AA
R0AA
R0AA
B
B
B
of
of
of
455Monday, June 25, 2012
455Monday, June 25, 2012
455Monday, June 25, 2012
1
5
VGA
R380
*10K_4_NC
2
INT_HDMI_TXDP2[24]
INT_HDMI_TXDN2[24]
INT_HDMI_TXDP1[24]
INT_HDMI_TXDN1[24]
INT_HDMI_TXDP0[24]
INT_HDMI_TXDN0[24]
INT_HDMI_TXCP[24]
INT_HDMI_TXCN[24]
APU_SVC[45]
APU_SVD[45]
APU_SVT[45]
APU_PROCHOT#_VDDIO[9]
13
DP0 to LVDS
PEG_LVDS_TXP0[27]
PEG_LVDS_TXN0[27]
DP1 to FCH VGA
APU_DP_TXP0[10]
APU_DP_TXN0[10]
APU_DP_TXP1[10]
APU_DP_TXN1[10]
APU_DP_TXP2[10]
APU_DP_TXN2[10]
APU_DP_TXP3[10]
APU_DP_TXN3[10]
CLK_APU_HCLKP[9]
CLK_APU_HCLKN[9 ]
CLK_DP_NSSCP[9]
CLK_DP_NSSCN[9]
APU_SVC
APU_SVD
APU_SVT
+1.5V_SUS
R373 1K_4
+1.5V_SUS
R372
1K_4
12
C654
470P/50V/X7R_4
C555 0.1U/16V/X7R_4
C554 0.1U/16V/X7R_4
C550 0.1U/16V/X7R_4
C551 0.1U/16V/X7R_4
C553 0.1U/16V/X7R_4
C552 0.1U/16V/X7R_4
C548 0.1U/16V/X7R_4
C549 0.1U/16V/X7R_4
C546 0.1U/16V/X7R_4
C547 0.1U/16V/X7R_4
SR424 *SHORT_4_NC
SR425 *SHORT_4_NC
SR426 *SHORT_4_NC
THERMTRIP#[36]
APU_PWRGD
LVDS
SVC SVD BOOT VOLTAGE
D D
+1.5V_SUS
VFIX@O2 VRM VF IX@O2 VRM
= GND = HIGH
0 0 1.1 1.4
0 1 1.0 1.2
1 0 0.9 1.0
1 1 0.8 0.8
R123 1K_4
R125 1K_4
R122 *1K/F_4_NC
APU_SVC
APU_SVD
APU_SVT
HDMI
Note: CLK_APU_HCLKP/N is 100MHZ SSC
Note: CLK_DP_NSSCP/N is 100MHZ non-SSC
C C
B B
APU_PWRGD_SVID_REG[45]
A A
+1.5V_SUS
R93
R379
300_4
APU_RST#[9]
APU_PWRGD[9]
Ib = ( Vb - Vbe<sat> ) / Rb => (1.5-0.7)/10=80uA
Ic = ( Vc - Vce<sat> ) / Rc => (3.3-0.25)/10=305uA
Ib >> ( Ic / 40~70 ) => 80uA > 305/40 [BJT is on sat status]
APU_PROCHOT#[31,40]
H_PROCHOT#[45]
300_4
APU_TD I[7]
APU_TD O[7]
APU_TC K[7]
APU_TM S[7]
APU_TR ST#[7]
APU_DBRDY[7]
APU_DBREQ#[7]
APU_VDD_RUN_FB_L[45]
APU_VDDNB_RUN_FB_H[45]
APU_VDD_RUN_FB_H[45]
+1.5V_SUS
+3.3V_RUN
R377
*10K_4_NC
Q31
*MMST3904-7-F_NC
SR465 *SHORT_4_NC
APU_PROCHOT#_VDDIO
SR17 *SHORT_4_NC
SR137 *SHORT_4_NC
5
4
U29C
ANALOG/D ISPLAY/MISC
PEG_LVDS_TXP0_C
PEG_LVDS_TXN0_C
APU_DP_TXP0_C
APU_DP_TXN0_C
APU_DP_TXP1_C
APU_DP_TXN1_C
APU_DP_TXP2_C
APU_DP_TXN2_C
APU_DP_TXP3_C
APU_DP_TXN3_C
INT_HDMI_TXDP2_C
C2620.1U/16V/X7R_4
INT_HDMI_TXDN2_C
C2630.1U/16V/X7R_4
INT_HDMI_TXDP1_C
C2640.1U/16V/X7R_4
INT_HDMI_TXDN1_C
C2650.1U/16V/X7R_4
INT_HDMI_TXDP0_C
C2680.1U/16V/X7R_4
INT_HDMI_TXDN0_C
C2560.1U/16V/X7R_4
INT_HDMI_TXCP_C
C2660.1U/16V/X7R_4
INT_HDMI_TXCN_C
C2670.1U/16V/X7R_4
APU_SVC_R
APU_SVD_R
APU_SVT _R
APU_SIC
APU_SID
APU_RST#
APU_PWRGD
APU_PROCHOT#_VDDIO
APU_THERMTRIP#_VDDIO
APU_ALE RT
APU_TD I
APU_TD O
APU_TC K
APU_TM S
APU_TR ST#
APU_DBRDY
APU_DBREQ#
VDDP_SENSE
TP24
VDDIO_SENSE
TP22
VDDR_SENSE
TP23
Ib = ( Vb - Vbe<sat> ) / Rb => (1.5-0.7)/10=80uA
Ic = ( Vc - Vce<sat> ) / Rc => (5-0.25)/10=47.5uA
Ib >> ( Ic / 40~70 ) => 80uA > 47.5/40 [BJT is on sat status]
SR10 *SHORT_4_NC
U12
1
A1
2
GND
3
A2
*74LVC2G07_NC
SR11 *SHORT_4_NC
4
L3
DP0_TXP0
L2
DP0_TXN0
K5
DP0_TXP1
K4
DP0_TXN1
K2
DP0_TXP2
K1
DP0_TXN2
J3
DP0_TXP3
J2
DP0_TXN3
H5
DP1_TXP0
H4
DP1_TXN0
H2
DP1_TXP1
H1
DP1_TXN1
G3
DP1_TXP2
G2
DP1_TXN2
F2
DP1_TXP3
F1
DP1_TXN3
L9
DP2_TXP0
L8
DP2_TXN0
L5
DP2_TXP1
L6
DP2_TXN1
K8
DP2_TXP2
K7
DP2_TXN2
J6
DP2_TXP3
J5
DP2_TXN3
AE11
CLKIN_H
AD11
CLKIN_L
AB11
DISP_CLKIN_H
AA11
DISP_CLKIN_L
B3
SVC
A3
SVD
C3
SVT
AG12
SIC
AH12
SID
AF10
RESET_L
AB12
PWROK
AC10
PROCHOT_L
AE12
THERMTRIP_L
AF12
ALERT_ L
H10
TDI
J10
TDO
F10
TCK
G10
TMS
F9
TRST_L
G9
DBRDY
H9
DBREQ_L
B4
VSS_SENSE
C5
VDDP_SENSE
A4
VDDNB_SENSE
A5
VDDIO_SENSE
C4
VDD_SENSE
B5
VDDR_SENSE
Trinity APU
+1.5V_SUS
R381
10K_4
2
13
Q32
MMST3904-7-F
6
Y1
5
VCC
4
Y2
R147
*300_4_NC
+3.3V_SUS
DISPLAY
PORT 0
DISPLAY
PORT 1
DISPLAY
PORT 2
CLK
CTRL SER.
JTAG
SENSE
R110
1K_4
APU_THERMTRIP#_VDDIOAPU_PWRGD
+1.5V_SUS
3
D1
DP0_AUXP
D2
DP0_AUXN
E1
TEST6
TEST9
TEST10
TEST14
TEST15
TEST16
TEST17
TEST18
TEST19
TEST20
TEST24
TEST31
TEST35
FS1R2
TEST4
TEST5
RSVD_1
RSVD_2
RSVD_3
RSVD_4
APU_VGA_AU XP_C
E2
APU_VGA_AU XN_C
D5
HDMI_SCL
D6
HDMI_SDA
E5
E6
F5
F6
G5
G6
D3
E3
D7
E7
F7
G7
C6
B6
A6
C1
AD12
M18
N18
F11
G11
H11
J11
F12
G12
J12
H12
AE10
AD10
L10
M10
P19
R19
K22
T19
N19
AA12
W10
AC12
P18
R18
Y10
AA10
Y12
K21
SMBCLK1[31,45]
SMBDAT1[31,45]
TRAVIS_H PD
VGA_HPD_ Q
INT_HDMI_HPD_Q
R101 150/F_4
APU_TEST9
APU_TEST10
APU_TEST14_BP0
APU_TEST15_BP1
APU_TEST16_BP2
APU_TEST17_BP3
APU_TEST18_PLLTEST1
APU_TEST19_PLLTEST0
APU_TEST20_SCANCLK2
APU_TEST24_SCANCLK1
APU_TEST25_H
APU_TEST25_L
APU_TEST28_H
APU_TEST28_L
M_TEST
APU_TEST35
FS1R2
DMAACTIVE _L
APU_TEST4
APU_TEST5
APU_RST_L_BUF [7]
APU_PWROK_BUF [7]
DP1_AUXP
DP1_AUXN
DP2_AUXP
DP2_AUXN
DP3_AUXP
DP3_AUXN
DP4_AUXP
DP4_AUXN
DP5_AUXP
DP5_AUXN
MISC.
DP0_HPD
DP1_HPD
DP2_HPD
DP3_HPD
DP4_HPD
DP5_HPD
DP_BLON
DP_DIGON
DP_VARY_ BL
DP_AUX_ZVSS
TEST25_H
TEST DISPLAY PORT
TEST25_L
TEST28_H
TEST28_L
TEST30_H
TEST30_L
TEST32_H
TEST32_L
DMAACTIVE _L
RSVD
R146
*300_4_NC
Debug only(Remove after MP)
3
LVDS_AUXP_C
LVDS_AUXN_C
APU_VGA_AU XP_C
APU_VGA_AU XN_C
C542 0.1U/16V/X7R_4
C541 0.1U/16V/X7R_4
C545 0.1U/16V/X7R_4
C544 0.1U/16V/X7R_4
/9'6B+3'B4
5
Q33A
3 4
DMN5L06DWK
QA
INT_LVDS_AUXPLVDS_AUXP_C
INT_LVDS_AUXNLVDS_AUXN_C
APU_VGA_AU XP [10 ]
APU_VGA_AU XN [1 0]
HDMI_SCL [24]
HDMI_SDA [24]
TRAVIS_HPD [27]
APU_BLPWM [27]
TP33
TP30
TP29
TP26
TP27
TP28
TP25
TP32
TP31
+1.5V_SUS+1.5V_SUS
2
6 1
Q33B
DMN5L06DWK
M_TESTAPU_RST#
M_TEST CONNECTION TBD
R371 1.8K_4
R370 1.8K_4
R369 *1.8K_4_NC
R368 *1.8K_4_NC R233 *100K_4_NC
6WXII55
INT_LVDS_AUXP [27]
INT_LVDS_AUXN [27]
CRT I2C to FCH
2
APU to Travis IC
INT_HDMI_HPD_Q[24]
INT_HDMI_HPD_Q
100K R near APU
INT_LVDS_AUXP
INT_LVDS_AUXN
HDMI Hot-plug
+3.3V_SUS
2
Q10
MMST3904-7-F
1 3
R100
20K_4
1
R240 *100K_4_NC
R95 100K_4
R96
100K_4
Ib = ( Vb - Vbe<sat> ) / Rb
Ic = ( Vc - Vce<sat> ) / Rc
Ib >> ( Ic / 40~70 )
(3.3-0.25)/20 = 152.5uA
152.5/ 40~70 = 3.8125 ~2.179 uA
(2.9-2.1)/ 3.8125 = 183.6K
CRT Hot-plug
APU_TEST18_PLLTEST1 [7]
APU_TEST19_PLLTEST0 [7]
+1.5V_SUS+3.3V_AL W
R117
R374
10K_4
1K_4
FS1R2 pin is pulled low by insertion of a non-FS1r2 APU
FS1R2 [45]
DMAACTIVE _L [9]
R382
R383
1K_4
1K_4
APU_SIC
APU_SID
DMN5L06DWK
Vgs(th) = 1v , Rds(on) = 190 mȍ , Id = -3A
Vg= 1.5v, Vs= 0.3~1.5v, so MOS will turn on /off
R142
*39.2/F_4_NC
R141
39.2/F_4
APU_TEST35
Test35 PU for Internal.
Test35 PD for Customer.
2
VGA_HPD_ Q
'HO455
5FKDQJHWRRKP$GG&
APU_TEST25_L
APU_TEST9
APU_TEST25_H
APU_TEST18_PLLTEST1
APU_TEST19_PLLTEST0
APU_TEST20_SCANCLK2
+1.5V_SUS+1.5V_SUS
R128
300_4
R112
*300_4_NC
APU_TEST24_SCANCLK1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
SR97 *SHORT_4_NC
C614
*0.1U/16V/X7R_4_NC
R367 510/F_6
R140 *0_4_NC
R375 510/F_6
R103 1K_4
R104 1K_4
R115 1K_4
R111 1K_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Display/Misc
Display/Misc
Display/Misc
1
+3.3V_RUN
HDMI_HPD [24]
FCH_VGA_HPD [10]
+1.2V_VDDPR
R0AA
R0AA
R0AA
of
of
of
555Monday, June 25, 2012
555Monday, June 25, 2012
555Monday, June 25, 2012
B
B
B
5
4
3
2
1
+VDD_CORE +VDD_ CORE
APU POWER TABLE
NET NAME
PIN NAME
VDD
VDDNB
D D
C C
+2.5V_RUN
B B
VDDIO
VDDR +1.2V
VDDA
+1.2V_VDDPR
SL9 *SHORT_8_NC
VOLTAGE
+VDD_CORE
+VDDNB_CORE
+1.5VSUS
+1.2V_VDDP
+1.2V_VDDR
+2.5V_VDDA
+1.1V
+1.5V
+1.2VVDDP
+2.5V
+VDDNB_CORE +VDDNB_CORE
+1.5V_SUS
+VDDNB_CORE=25A
VDDIO = 3.2A
VDDP_A + VDDP_B = 5
VDDA= 0.75A
C273
*1U/6.3V/X5R_NC
C270
0.1U/16V/X7R_4
+2.5V_APU
C284
*3300P/50V/X7R_NC
BOTTOM SIDE DECOUPLING
12
C252
10U/6.3V/X5R_6
+VDDNB_CORE
C272
10U/6.3V/X5R_8
C293
10U/6.3V/X5R_8
C281
10U/6.3V/X5R_8
C291
10U/6.3V/X5R_8
U29D
F8
VDD_1
H6
VDD_2
J1
VDD_3
J14
VDD_4
P6
VDD_5
P10
VDD_6
J16
VDD_7
J18
VDD_8
J9
VDD_9
K19
VDD_10
K3
VDD_11
K17
VDD_12
M3
VDD_13
K6
V10
V18
V3
F3
L18
V6
W1
T18
Y14
AA1
AB6
AC1
R1
P3
K10
H3
M19
C8
D10
B8
B12
C9
A9
A10
A8
A11
E10
E11
C10
H26
K20
J28
K23
K26
L22
L25
L28
M20
M23
M26
N22
N25
N28
P20
P23
P26
AA28
AH6
AH5
AH4
AH3
AH7
AB10
Keep trace from Res to APU within 0.6"
CORE
VDD_14
S0
VDD_15
VDD_16
VDD_17
VDD_18
VDD_19
VDD_20
VDD_21
VDD_22
VDD_23
VDD_24
VDD_25
VDD_26
VDD_27
VDD_28
VDD_29
VDD_30
VDD_31
NB/GPU
S0
VDDNB_1
VDDNB_2
VDDNB_3
VDDNB_4
VDDNB_5
VDDNB_6
VDDNB_7
VDDNB_8
VDDNB_9
VDDNB_10
DDDR
VDDNB_11
S0/S3
VDDNB_12
VDDIO_1
VDDIO_2
VDDIO_3
VDDIO_4
VDDIO_5
VDDIO_6
VDDIO_7
VDDIO_8
VDDIO_9
VDDIO_10
VDDIO_11
PCIE
VDDIO_12
S0
VDDIO_13
VDDIO_14
VDDIO_15
VDDIO_16
DDR3 PHY
VDDIO_17
S0
VDDIO_18
PLL
VDDP
S0
VDDP
VDDP
VDDP
VDDP
VDDA
Trinity APU
VDD_33
VDD_34
VDD_35
VDD_36
VDD_37
VDD_38
VDD_39
VDD_40
VDD_41
VDD_42
VDD_43
VDD_44
VDD_45
VDD_46
VDD_47
VDD_48
VDD_49
VDD_50
VDD_51
VDD_52
VDD_53
VDD_54
VDD_55
VDD_56
VDD_57
VDD_58
VDD_59
VDD_60
VDD_61
VDD_62
VDD_63
VDDNB_13
VDDNB_14
VDDNB_15
VDDNB_16
VDDNB_17
VDDNB_18
VDDNB_19
VDDNB_20
VDDNB_21
VDDNB_22
VDDNB_23
VDDNB_CAP
VDDNB_CAP
VDDIO_19
VDDIO_20
VDDIO_21
VDDIO_22
VDDIO_23
VDDIO_24
VDDIO_25
VDDIO_26
VDDIO_27
VDDIO_28
VDDIO_29
VDDIO_30
VDDIO_31
VDDIO_32
VDDIO_33
VDDIO_34
VDDIO_35
VDDIO_36
VDDR
VDDR
VDDR
VDDR
R11
T10
H8
G1
U11
W11
W13
W15
W17
W19
AB3
AD3
AD6
AE1
L1
Y6
M6
N11
N1
T3
T6
U19
U1
Y16
Y18
Y3
D4
F4
AF6
AF3
L11
C11
C12
D9
D8
D12
D11
B11
A12
B10
E12
B9
K13
K12
T23
T26
U22
U25
U28
Y26
T20
R28
R25
R22
V20
V23
V26
W22
W25
W28
Y24
G28
AG10
AH8
AH9
AH10
VDDR = 1.2A
Keep trace from Cap to APU within 1.2"
12
C258
10U/6.3V/X5R_6
C271
10U/6.3V/X5R_8
C294
0.1U/16V/X7R_4
C254
0.1U/16V/X7R_4
+VDD_CORE=36A
C290
*10U/6.3V/X5R_8_NC
+1.5V_SUS
+1.2V_VDDPR
EC13
EC11
*180P/50V_4_NC
*180P/50V_4_NC
Sequence
GROUP A(VDDIO,VDDA)
ĻĻĻ
GROUP B(VDD_RUN, VDDNB_RUN, VDDP, VDDR)
+VDDNB_CAP
C287
10U/6.3V/X5R_8
New Add
Internal Regulator
12
C581
C543
*1U/10V/Y5V_6_NC
*10U/6.3V/X5R_8_NC
C584
C251
*1000P/50V/X7R_4_NC
1000P/50V/X7R_4
C280
0.01U/25V/X7R_4
C286
*180P/50V_4_NC
12
C259
10U/6.3V/X5R_6
C580
*1000P/50V/X7R_4_NC
C275
0.01U/25V/X7R_4
C282
0.1U/16V/X7R_4
C253
1000P/50V/X7R_4
C288
0.01U/25V/X7R_4
+1.2V_VDDPR
C578
0.1U/16V/X7R_4
C260
0.1U/16V/X7R_4
EC12
*180P/50V_4_NC
C283
0.1U/16V/X7R_4
EC46
*180P/50V_4_NC
C576
*0.1U/16V/X7R_4_NC
C257
C261
1U/6.3V/X5R
1U/6.3V/X5R
C583
C255
1U/6.3V/X5R
*0.1U/16V/X7R_4_NC
U29E
J20
C585
1U/6.3V/X5R
VSS_1
L4
VSS_2
R7
VSS_3
W18
VSS_4
A15
VSS_5
AB17
VSS_6
AC22
VSS_7
AE21
VSS_8
AF24
VSS_9
AH23
VSS_10
AH25
VSS_11
B7
VSS_12
C14
VSS_13
C16
VSS_14
C2
VSS_15
C20
VSS_16
C22
VSS_17
C24
VSS_18
C26
VSS_19
C28
VSS_20
D13
VSS_21
D15
VSS_22
D17
VSS_23
D19
VSS_24
D23
VSS_25
D25
VSS_26
D27
VSS_27
E4
VSS_28
E9
VSS_29
F14
VSS_30
F16
VSS_31
F18
VSS_32
F20
VSS_33
F22
VSS_34
F26
VSS_35
F28
VSS_36
G13
VSS_37
G15
VSS_38
G17
VSS_39
G19
VSS_40
G21
VSS_41
G23
VSS_42
G25
VSS_43
G4
VSS_44
J22
VSS_45
J24
VSS_46
J4
VSS_47
J7
VSS_48
K11
VSS_49
K14
VSS_50
K9
VSS_51
AC11
VSS_52
L19
VSS_53
L7
VSS_54
M11
VSS_55
AF11
VSS_56
V19
VSS_57
V9
VSS_58
W16
VSS_59
W4
VSS_60
W7
VSS_61
Y11
VSS_62
Y20
VSS_63
Y22
VSS_64
Y9
VSS_65
A17
VSS_66
A13
VSS_68
K16
VSS_67
F24
VSS_69
G8
VSS_70
H7
VSS_71
J8
VSS_72
Trinity APU
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
DECOUPLING between PROCESSOR and DIMMs
Across VDDIO and VSS split
+1.5V_SUS+VDD_CORE
C300
0.1U/16V/X7R_4
C298
0.1U/16V/X7R_4
EC14
*180P/50V_4_NC
A19
A21
A23
A25
A7
AA4
AA7
AB13
AB15
AB19
AB21
AB23
AB25
AB27
AB9
AC14
AC16
AC18
AC20
AC24
AC26
AC28
AC4
AC7
AD9
AE13
AE15
AE17
M9
N10
N4
N7
R10
R4
T11
T9
U10
U18
U4
U7
V11
AE19
AE23
AE25
AE27
AE4
AE7
AF14
AF16
AF18
AF20
AF22
AF26
AF28
AF9
AG4
AG7
AH13
AH15
AH17
AH19
AH21
P9
C18
D21
W14
P11
C7
E8
K18
W12
EC15
1U/6.3V/X5R
C309
1U/6.3V/X5R
C269
0.1U/16V/X7R_4
C311
1U/6.3V/X5R
C295
0.1U/16V/X7R_4
C574
22U/4V/X6S_8
C315
0.1U/16V/X7R_4
4
C575
22U/4V/X6S_8
C376
0.1U/16V/X7R_4
C312
0.1U/16V/X7R_4
C615
22U/4V/X6S_8
C314
0.1U/16V/X7R_4
C310
0.1U/16V/X7R_4
EC19
*180P/50V_4_NC
EC18
*180P/50V_4_NC
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
PROJECT :
POWER/GND
POWER/GND
POWER/GND
R0AA
R0AA
R0AA
655Monday, June 25, 2012
655Monday, June 25, 2012
1
655Monday, June 25, 2012
B
B
B
of
of
of
C279
22U/4V/X6S_8
C299
1U/6.3V/X5R
C292
22U/4V/X6S_8
C302
*1U/6.3V/X5R_NC
C274
0.1U/16V/X7R_4
C277
C278
22U/4V/X6S_8
22U/4V/X6S_8
A A
+1.5V_SUS
C317
C313
*10U/6.3V/X5R_8_NC
10U/6.3V/X5R_8
If the VSS plane is cut to create a VDDI O plane,
ceramic capacitor s are connected across
the VDDIO and VSS plane split as fol lows
5
5
4
3
2
1
HDT+ Connector
Remove after MP
+1.5V_SUS
D D
APU_TRST#[5]
C C
APU_TRST#
SR13 *SHORT_4_NC
R190 10K_4
R191 10K_4
R192 10K_4
1
3
5
7
9
11
13
15
17
19
Debug only
J4
CPU_VDDIO1
GND1
GND2
GND3
CPU_TRST_L
CPU_DBRDY3
CPU_DBRDY2
CPU_DBRDY1
GND4
CPU_VDDIO2
*HDT+ HEADER_NC
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TDO
CPU_PWROK_BUF
CPU_RST_L_BUF
CPU_DBRDY0
CPU_DBREQ_L
CPU_PLLTEST0
CPU_PLLTEST1
2
4
6
8
10
12
14
16
18
20
APU_TCK
APU_TMS
APU_TDI
APU_DBREQ#
APU_TCK [5]
APU_TMS [5]
APU_TDI [5]
APU_TDO [5]
APU_PWROK_BUF [5]
APU_RST_L_BUF [5]
APU_DBRDY [5]
APU_DBREQ# [5]
APU_TEST19_PLLTEST0 [5]
APU_TEST18_PLLTEST1 [5]
APU_TDI
APU_TCK
APU_TMS
APU_TRST#
APU_DBREQ#
R181 1K_4
R179 1K_4
R180 1K_4
R193 1K_4
R183 1K_4
+1.5V_SUS
B B
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Monday, June 25, 2012
Monday, June 25, 2012
Monday, June 25, 2012
5
4
3
2
Date: Sheet
PROJECT :
DEBUG&OTHER
DEBUG&OTHER
DEBUG&OTHER
R0AA
R0AA
R0AA
755
755
755
1
B
B
B
of
5
4
3
2
1
DEL MEMHOT# Function / +3.3V
TP51
TP47
SIO_SLP_S3#[31,42]
SIO_SLP_S5#[31,42]
SIO_PWRBTN#[31]
FCH_PCIE_LAN_CLKREQ#[29]
FCH_PCIE_WLAN_CLKREQ#[29]
EC45
ACZ_BITCLK
FCH_PWRGD[36]
SIO_A20GATE[31]
EC_KBRST#[31]
SIO_EXT_SCI#[31]
SIO_EXT_SMI#[31]
SIO_EXT_WAKE#[31]
RSMRST#[31]
ACZ_SPKR[30]
SMB_RUN_CLK0[13,14,33]
SMB_RUN_DAT0[13,14,33]
VGA_PD[11]
SPI_HOLD#[32]
PEG_A_CLKRQ#[15]
USB_OC6#[29]
SATA_ODD_PRSNT#[28]
SATA_ODD_MD#[28]
AC_PRESENT[16,31]
USB_OC2#[25]
USB_OC1#[38]
USB_OC0#[25]
*22P/50V_4_NC
TP45
TP43
TP53
TP14
TP46
27
ER20 33_4
R285 33_4
R279 33_4
R280 33_4
SATA_ODD_PRSNT#
SATA_ODD_MD#
AC_PRESENT
USB_OC#
Function FCH port
D D
USB12 (MB)
USB13 (MB)
USB11 (MB)
USB10 (I/O)
+3.3V_SUS
R43 *2.2K_4_NC
R46 *2.2K_4_NC
R30 *2.2K_4_NC
R283 *10K_4_NC
R286 *10K_4_NC
R31 10K_4
R48 10K_4
R301 *10K_4_NC
R288 10K_4
AC_PRESENT high to enter S5+
LLB#, WAKE# and PW R_BTN
need pull up to 3 .3V_S5+ (SUS) only if S5+ mode i s supported
R289 10K_4
R27 10K_4
R298 10K_4
R62 10K_4
R65 10K_4
R33 10K_4
C C
R304 10K_4
R35 10K_4
R32 10K_4
R275 *10K_4_NC
R270 *10K_4_NC
R337 10K_4
R334 10K_4
+3.3V_RUN
R82 2.2K_4
R83 2.2K_4
R22 10K_4
R58 10K_4
R218 10K_4
R61 10K_4
R306 *10K_4_NC
R333 *10K_4_NC
R54 10K_4
R459 *10K_4_NC
B B
USB_OC0#
*USB_OC2#
USB_OC1#
USB_OC6#
NC,no install by default
FCH_TEST0
FCH_TEST1
FCH_TEST2
SIO_SLP_S3#
SIO_SLP_S5#
GEVENT#9
APU_THERMTRIP#
AC_PRESENT
LLB#
SIO_PWRBTN#
SMB_RUN_CLK1
SMB_RUN_DAT1
SMB_RUN_CLK2
SMB_RUN_DAT2
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC6#
SATA_ODD_PRSNT#
SATA_ODD_MD#
SMB_LV_CLK
SMB_LV_DAT
SMB_RUN_CLK0
SMB_RUN_DAT0
FCH_PCIE_WLAN_CLKREQ#
EC_KBRST#
SIO_A20GATE
WD_PWRGD
MEMHOT#
SIO_EXT_SMI#
FCH_PCIE_LAN_CLKREQ#
PEG_A_CLKRQ#
ACZ_BITCLK[30]
ACZ_SDOUT[30]
ACZ_SDIN0[30]
ACZ_SYNC[30]
ACZ_RST#[30]
MEMHOT#
SIO_SLP_S3#
SIO_SLP_S5#
SIO_PWRBTN#
FCH_TEST0
FCH_TEST1
FCH_TEST2
SIO_A20GATE
EC_KBRST#
SIO_EXT_SCI#
SIO_EXT_SMI#
APU_THERMTRIP#
WD_PWRGD
R276 10K_4
FCH_PCIE_LAN_CLKREQ#
SMB_RUN_CLK0
SMB_RUN_DAT0
SMB_RUN_CLK1
SMB_RUN_DAT1
FCH_PCIE_WLAN_CLKREQ#
LLB#
SR4 *SHORT_4_NC
PEG_A_CLKRQ#
USB_OC6#
USB_OC2#
USB_OC1#
USB_OC0#
ACZ_BITCLK_R
ACZ_SDOUT_R
ACZ_SDIN0
ACZ_SYNC_R
ACZ_RST#_R
GEVENT#9
U26A
AB6
PCIE_RST2#/GEVENT4#
R2
RI#/GEVENT22#
W7
SPI_CS3#/GBE_STAT1/GEVENT21#
T3
SLP_S3#
W2
SLP_S5#
J4
PWR_BTN#
N7
PWR_GOOD
T9
TEST0
T10
TEST1/TMS
V9
TEST2
AE22
GA20IN/GEVENT0#
AG19
KBRST#/GEVENT1#
R9
PME#/GEVENT3#
C26
LPC_SMI#/GEVENT23#
T5
LPC_PD#/GEVENT5#
U4
SYS_RESET#/GEVENT19#
K1
WAKE#/GEVENT8#
V7
IR_RX1/GEVENT20#
R10
THRMTRIP#/SMBALERT#/GEVENT2#
AF19
WD_PWRGD
U2
RSMRST#
AG24
CLK_REQ4#/SATA_IS0#/G PIO64
AE24
CLK_REQ3#/SATA_IS1#/G PIO63
AE26
SMARTVOLT1/SATA_IS2#/GPIO5 0
AF22
CLK_REQ0#/SATA_IS3#/G PIO60
AH17
SATA_IS4#/FANOUT3/GPIO55
AG18
SATA_IS5#/FANIN3/GPIO5 9
AF24
SPKR/GPIO66
AD26
SCL0/GPIO43
AD25
SDA0/GPIO47
T7
SCL1/GPIO227
R7
SDA1/GPIO228
AG25
CLK_REQ2#/FANIN4/GPIO62
AG22
CLK_REQ1#/FANOUT4/GPIO61
J2
IR_LED#/LLB#/GPIO184
AG26
SMARTVOLT2/SHUTDOWN#/GPIO51
V8
DDR3_RST#/GEVENT7#/VGA_PD
W8
GBE_LED0/GPIO183
Y6
SPI_HOLD#/GBE_LED1/ GEVENT9#
V10
GBE_LED2/GEVENT10#
AA8
GBE_STAT0/GEVENT11#
AF25
CLK_REQG#/GPIO65/ OSCIN/IDLEEXIT#
M7
BLINK/USB_OC7#/GEVENT18 #
R8
USB_OC6#/IR_TX1/GEVENT6#
T1
USB_OC5#/IR_TX0/GEVENT17 #
P6
USB_OC4#/IR_RX0/GEVEN T16#
F5
USB_OC3#/AC_PRES/TDO/GEVEN T15#
P5
USB_OC2#/TCK/GEVENT14#
J7
USB_OC1#/TDI/GEVENT13#
T8
USB_OC0#/SPI_TPM_CS#/ TRST#/GEVENT12#
AB3
AZ_BITCLK
AB1
AZ_SDOUT
AA2
AZ_SDIN0/GPIO167
Y5
AZ_SDIN1/GPIO168
Y3
AZ_SDIN2/GPIO169
Y1
AZ_SDIN3/GPIO170
AD6
AZ_SYNC
AE4
AZ_RST#
K19
PS2_DAT/SDA4/GPIO187
J19
PS2_CLK/CEC/SCL4/GPIO188
J21
SPI_CS2#/GBE_STAT2/GPIO16 6
D21
PS2KB_DAT/GPIO189
C20
PS2KB_CLK/GPIO190
D23
PS2M_DAT/GPIO191
C22
PS2M_CLK/GPIO192
F21
KSO_0/GPIO209
E20
KSO_1/GPIO210
F20
KSO_2/GPIO211
A22
KSO_3/GPIO212
E18
KSO_4/GPIO213
A20
KSO_5/GPIO214
J18
KSO_6/GPIO215
H18
KSO_7/GPIO216
G18
KSO_8/GPIO217
B21
KSO_9/GPIO218
K18
KSO_10/GPIO219
D19
KSO_11/GPIO220
A18
KSO_12/GPIO221
C18
KSO_13/GPIO222
B19
KSO_14/XDB0/GPIO223
B17
KSO_15/XDB1/GPIO224
A24
KSO_16/XDB2/GPIO225
D17
KSO_17/XDB3/GPIO226
HUNSON M3
M3_100-CK4148(218-0755042)
HUDSON-M2
Part 4 of 5
USBCLK/14M_25M_48M_OSC
USB
MISC
USB
1.1
ACPI / WAKE UP
EVENTS
USB
GPIO
USB
OC
HD
AUDIO
EMBEDDED
CTRL
USB
EC_PWM0/EC_TIMER0/GPIO197
EC_PWM1/EC_TIMER1/GPIO198
EC_PWM2/EC_TIMER2/WOL_EN/GPIO199
EC_PWM3/EC_TIMER3/GPIO200
USB_RCOMP
USB_FSD1P/GPIO186
USB_FSD1N
USB_FSD0P/GPIO185
USB_FSD0N
USB_HSD13P
USB_HSD13N
USB_HSD12P
USB_HSD12N
USB_HSD11P
USB_HSD11N
USB_HSD10P
USB_HSD10N
USB_HSD9P
USB_HSD9N
USB_HSD8P
USB_HSD8N
USB_HSD7P
USB_HSD7N
USB_HSD6P
USB_HSD6N
2.0
USB_HSD5P
USB_HSD5N
USB_HSD4P
USB_HSD4N
USB_HSD3P
USB_HSD3N
USB_HSD2P
USB_HSD2N
USB_HSD1P
USB_HSD1N
USB_HSD0P
USB_HSD0N
USBSS_CALRP
USBSS_CALRN
USB_SS_TX3P
USB_SS_TX3N
USB_SS_RX3P
USB_SS_RX3N
USB_SS_TX2P
USB_SS_TX2N
USB_SS_RX2P
USB_SS_RX2N
USB_SS_TX1P
3.0
USB_SS_TX1N
USB_SS_RX1P
USB_SS_RX1N
USB_SS_TX0P
USB_SS_TX0N
USB_SS_RX0P
USB_SS_RX0N
SCL2/GPIO193
SDA2/GPIO194
SCL3_LV/GPIO195
SDA3_LV/GPIO196
KSI_0/GPIO201
KSI_1/GPIO202
KSI_2/GPIO203
KSI_3/GPIO204
KSI_4/GPIO205
KSI_5/GPIO206
KSI_6/GPIO207
KSI_7/GPIO208
G8
B9
H1
H3
H6
H5
H10
G10
K10
J12
G12
F12
K12
K13
B11
D11
E10
F10
C10
A10
H9
G9
A8
C8
F8
E8
C6
A6
C5
A5
C1
C3
E1
E3
C16
A16
A14
C14
C12
A12
D15
B15
E14
F14
F15
G15
H13
G13
J16
H16
J15
K15
H19
G19
G22
G21
E22
H22
J22
H21
K21
K22
F22
F24
E24
B23
C24
F18
USB_RCOMP_SB
USBSS_CALRP
USBSS_CALRN
SMB_RUN_CLK2
SMB_RUN_DAT2
SMB_LV_CLK
SMB_LV_DAT
R310 11.8K/F_6
Note: USB P/N pairs with trace lengths up to 10"
USBP13P [25]
USBP13N [25]
USBP12P [25]
USBP12N [25]
USBP11P [38]
USBP11N [38]
USBP10P [29]
USBP10N [29]
USBP9P [22]
USBP9N [22]
USBP7P [26]
USBP7N [ 26]
USBP1P [29]
USBP1N [ 29]
USBP0P [25]
R329 1K/F_4
R327 1K/F_4
USBP0N [ 25]
USB REDRIVER RESERVE , CAP close Connector , C79~C82 stuff 0 ohm
+1.1V_SUS
USB3_TXP3 [25]
USB3_TXN3 [25]
USB3_RXP3 [25]
USB3_RXN3 [25]
USB3_TXP2 [25]
USB3_TXN2 [25]
USB3_RXP2 [25]
USB3_RXN2 [25]
USB3_TXP1 [38]
USB3_TXN1 [38]
USB3_RXP1 [38]
USB3_RXN1 [38]
USB3_TXP0 [29]
USB3_TXN0 [29]
USB3_RXP0 [29]
USB3_RXN0 [29]
EC_PWM2 [12]
USB 3.0/2.0 Combo
USB 3.0/2.0 Combo
USB 3.0/2.0 Combo
USB 3.0/2.0 Combo
Camera
Card Reader
WLAN
Debug
USB 3.0/2.0 Combo (MB)
USB 3.0/2.0 Combo (MB)
USB 3.0/2.0 Combo (MB)
USB 3.0/2.0 Combo (IO)
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Monday, June 25, 2012
Monday, June 25, 2012
Monday, June 25, 2012
5
4
3
2
Date: Sheet
PROJECT :
Hudson-M3 GPIO/USB/AZ/RGMII
Hudson-M3 GPIO/USB/AZ/RGMII
Hudson-M3 GPIO/USB/AZ/RGMII
R0AA
R0AA
R0AA
855
855
1
855
B
B
B
of
5
4
3
2
1
PCIE_RST#_R
C484 150P/50V_4
+1.1V_RUN
CLK_DP_NSSCP[5]
CLK_DP_NSSCN[5]
CLK_APU_HCLKP[5]
CLK_APU_HCLKN[5]
CLK_PCIE_VGAP[15]
CLK_PCIE_VGAN[15]
C508
C513
CLK_PCIE_WLANP[29]
CLK_PCIE_WLANN[29]
27P/50V_4
Y2
25MHz
27P/50V_4
CLK_PCIE_LANP[29]
CLK_PCIE_LANN[29]
R278 33_4
C527 0.1U/16V/X7R_4
C526 0.1U/16V/X7R_4
C523 0.1U/16V/X7R_4
C522 0.1U/16V/X7R_4
C525 0.1U/16V/X7R_4
C524 0.1U/16V/X7R_4
C520 0.1U/16V/X7R_4
C521 0.1U/16V/X7R_4
R359 590/F
R358 2K/F_4
R66 2K/F_4
1 2
R446 22_4
1 2
R447 22_4
1 2
R428 22_4
1 2
R427 22_4
1 2
R461 22_4
1 2
R460 22_4
R346
1M_4
1 2
UMI_RXP0_C
UMI_RXN0_C
UMI_RXP1_C
UMI_RXN1_C
UMI_RXP2_C
UMI_RXN2_C
UMI_RXP3_C
UMI_RXN3_C
FCH_PCIE_CALRP
FCH_PCIE_CALRN
CLK_DP_NSSCP_R
CLK_DP_NSSCN_R
CLK_APU_HCLKP_R
CLK_APU_HCLKN_R
CLK_PCIE_VGAP_R
CLK_PCIE_VGAN_R
25M_X1
25M_X2
U26E
AE2
PCIE_RST#
AD5
A_RST#
AE30
UMI_TX0P
AE32
UMI_TX0N
AD33
UMI_TX1P
AD31
UMI_TX1N
AD28
UMI_TX2P
AD29
UMI_TX2N
AC30
UMI_TX3P
AC32
UMI_TX3N
AB33
UMI_RX0P
AB31
UMI_RX0N
AB28
UMI_RX1P
AB29
UMI_RX1N
Y33
UMI_RX2P
Y31
UMI_RX2N
Y28
UMI_RX3P
Y29
UMI_RX3N
AF29
PCIE_CALRP
AF31
PCIE_CALRN
V33
GPP_TX0P
V31
GPP_TX0N
W30
GPP_TX1P
W32
GPP_TX1N
AB26
GPP_TX2P
AB27
GPP_TX2N
AA24
GPP_TX3P
AA23
GPP_TX3N
AA27
GPP_RX0P
AA26
GPP_RX0N
W27
GPP_RX1P
V27
GPP_RX1N
V26
GPP_RX2P
W26
GPP_RX2N
W24
GPP_RX3P
W23
GPP_RX3N
F27
CLK_CALRN
G30
PCIE_RCLKP
G28
PCIE_RCLKN
R26
DISP_CLKP
T26
DISP_CLKN
H33
DISP2_CLKP
H31
DISP2_CLKN
T24
APU_CLKP
T23
APU_CLKN
J30
SLT_GFX_CLKP
K29
SLT_GFX_CLKN
H27
GPP_CLK0P
H28
GPP_CLK0N
J27
GPP_CLK1P
K26
GPP_CLK1N
F33
GPP_CLK2P
F31
GPP_CLK2N
E33
GPP_CLK3P
E31
GPP_CLK3N
M23
GPP_CLK4P
M24
GPP_CLK4N
M27
GPP_CLK5P
M26
GPP_CLK5N
N25
GPP_CLK6P
N26
GPP_CLK6N
R23
GPP_CLK7P
R24
GPP_CLK7N
N27
GPP_CLK8P
R27
GPP_CLK8N
J26
14M_25M_48M_OSC
C31
25M_X1
C33
25M_X2
?
M3_100-CK4148(218-0755042)
HUDSON-M2
Part 1 of 5
PCI
CLKS
PCI EXPRESS
INTERFACES
100MHZ SSC
100MHZ non-SSC
100MHZ non-SSC
100MHZ SSC
100MHZ SSC capable
CLOCK
GENERATOR
PCICLK0
PCICLK1/GPO36
PCICLK2/GPO37
PCICLK3/GPO38
PCICLK4/14M_OSC/GPO39
PCIRST#
AD0/GPIO0
AD1/GPIO1
AD2/GPIO2
AD3/GPIO3
AD4/GPIO4
AD5/GPIO5
AD6/GPIO6
AD7/GPIO7
AD8/GPIO8
AD9/GPIO9
AD10/GPIO10
AD11/GPIO11
AD12/GPIO12
AD13/GPIO13
AD14/GPIO14
AD15/GPIO15
AD16/GPIO16
AD17/GPIO17
AD18/GPIO18
AD19/GPIO19
AD20/GPIO20
AD21/GPIO21
AD22/GPIO22
AD23/GPIO23
AD24/GPIO24
AD25/GPIO25
AD26/GPIO26
AD27/GPIO27
PCI
INTERFACE
AD28/GPIO28
AD29/GPIO29
AD30/GPIO30
AD31/GPIO31
CBE0#
CBE1#
CBE2#
CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
STOP#
PERR#
SERR#
REQ0#
REQ1#/GPIO40
REQ2#/CLK_REQ8#/GPIO41
REQ3#/CLK_REQ5#/GPIO42
GNT3#/CLK_REQ7#/GPIO46
LDRQ1#/CLK_REQ6#/GPIO49
APU
S5
PLUS
GNT0#
GNT1#/GPO44
GNT2#/SD_LED/GPO45
CLKRUN#
LOCK#
INTE#/GPIO32
INTF#/GPIO33
INTG#/GPIO34
INTH#/GPIO35
LPCCLK0
LPCCLK1
LPC
LFRAME#
LDRQ0#
SERIRQ/GPIO48
DMA_ACTIVE#
PROCHOT#
APU_PG
LDT_STP#
APU_RST#
32K_X1
32K_X2
S5_CORE_EN
RTCCLK
INTRUDER_ALERT#
VDDBT_RTC_G
LAD0
LAD1
LAD2
LAD3
AF3
AF1
AF5
AG2
AF6
AB5
PCIRST#
AJ3
AL5
AG4
AL6
AH3
AJ5
AL1
AN5
AN6
AJ1
AL8
AL3
AM7
AJ6
AK7
AN8
AG9
AM11
AJ10
AL12
AK11
AN12
AG12
AE12
AC12
AE13
AF13
AH13
AH14
DGPU_PWROK
AD15
AC15
AE16
AN3
AJ8
AN10
AD12
AG10
AK9
AL10
AF10
AE10
PAR
AH1
AM9
AH8
AG15
AG13
AF15
AM17
AD16
AD13
AD21
AK17
AD19
AH9
AF18
AE18
AC16
AD18
B25
LPC_CLK0_R
D25
LPC_CLK1_R
D27
C28
A26
A29
A31
B27
LDRQ#0
AE27
LDRQ#1
AE19
G25
E28
E26
APU_PWRGD_R
G26
APU_ST OP#
F26
G2
32K_X1
G4
32K_X2
H7
F1
F3
INTRUDER_ALERT#
E6
INTRUDER_ALERT# Left not connected (FCH
has 50-kohm internal pull- up to VBAT).
SR15 *SHORT_4_NC
ER4 33_4
ER3 33_4
SR16 *SHORT_4_NC
R34 *1M/F_4_NC
1.8V_GFX_PWROK
USB_MCARD1_DET#
PCIE_MCARD1_DET#
LPC_CLK0
LPC_CLK1
S5_CORE_EN is necessary to connect enable pin of
+3VPCU/+5VPCU regulator for S5+ mode implementation
S5_CORE_EN
PCI_CLK1 [12]
PCI_CLK3 [12]
PCI_CLK4 [12]
TP44
TP49
TP4
TP48
PCI_AD23 [12]
PCI_AD24 [12]
PCI_AD25 [12]
PCI_AD26 [12]
PCI_AD27 [12]
1.8V_GFX_PWROK [47]
USB_MCARD1_DET# [29]
PCIE_MCARD1_DET# [29]
TP52
DGPU_PWR_EN [47]
DGPU_HOLD_RST# [15]
WLAN_RADIO_DIS# [29]
CLKRUN# [31]
BT_RADIO_DIS# [29]
LPC_CLK0 [12,31]
LPC_CLK1 [29]
LPC_CLK1_R [12]
LPC_LAD0 [29,31]
LPC_LAD1 [29,31]
LPC_LAD2 [29,31]
LPC_LAD3 [29,31]
LPC_LFRAME# [29,31]
TP56
TP17
IRQ_S ERIRQ [31]
DMAACTIVE _L [5]
APU_PROCHOT#_VDDIO [5]
APU_PW RGD [5 ]
TP19
APU_RS T# [5]
TP50
RTC_CLK [12]
C41
0.1U/16V/X7R_4
+RTC_CELL
USB_MCARD1_DET#
PCIE_MCARD1_DET#
LPC_CLK0
R324 10K_4
R332 10K_4
EC10 *22P/50V_4_NC
LPC_CLK0 to EC
32K_X1
Y1
R284
32.768KHZ
20M
32K_X2
USE GROUND GUARD FOR 32K_X1 AND 32K_X2
23
4 1
C485 18P/50V_4
C486 18P/50V_4
+3.3V_RUN
APU_PCIE_RST#[15,27,29]
APU_PCIE_RST# is for APU PCIE devices reset
D D
C C
CLKREQ#
CLK
APU_GPP0
B B
APU_GPP1
GPP_CLK3
GPP_CLK1
CLKREQ3#
CLKREQ1#
C483
150P/50V_4
R272 33_4
A_RST#[31]
UMI_RXP0[3]
UMI_RXN0[3]
UMI_RXP1[3]
UMI_RXN1[3]
UMI_RXP2[3]
UMI_RXN2[3]
UMI_RXP3[3]
UMI_RXN3[3]
UMI_TXP0[3]
UMI_TXN0[3]
UMI_TXP1[3]
UMI_TXN1[3]
UMI_TXP2[3]
UMI_TXN2[3]
UMI_TXP3[3]
UMI_TXN3[3]
+1.1V_RUN
DEVICEAPU_GPP
LAN
WALN
PEG 8X STL_GFX_CLK ThamesCLKREQG#
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Monday, June 25, 2012
Monday, June 25, 2012
Monday, June 25, 2012
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
Hudson-M3 ACPI/PCI/CLOCK
Hudson-M3 ACPI/PCI/CLOCK
Hudson-M3 ACPI/PCI/CLOCK
R0AA
R0AA
R0AA
955
955
1
955
B
B
B
of
5
4
3
2
1
U26B
HUDSON-M2
SERIAL
ATA
HW
MONITOR
TEMPIN0
TEMPIN1
TEMPIN2
TEMPIN3
AK19
SATA_TX0P
AM19
SATA_TX0N
AL20
SATA_RX0N
AN20
SATA_RX0P
AN22
SATA_TX1P
AL22
SATA_TX1N
AH20
SATA_RX1N
AJ20
SATA_RX1P
AJ22
SATA_TX2P
AH22
SATA_TX2N
AM23
SATA_RX2N
AK23
SATA_RX2P
AH24
SATA_TX3P
AJ24
SATA_TX3N
AN24
SATA_RX3N
AL24
SATA_RX3P
AL26
SATA_TX4P
AN26
SATA_TX4N
AJ26
SATA_RX4N
AH26
SATA_RX4P
AN29
SATA_TX5P
AL28
SATA_TX5N
AK27
SATA_RX5N
AM27
SATA_RX5P
AL29
NC6
AN31
NC7
AL31
NC8
AL33
NC9
AH33
NC10
AH31
NC11
AJ33
NC12
AJ31
NC13
AF28
SATA_CALRP
AF27
SATA_CALRN
AD22
SATA_ACT#/GPIO67
AF21
SATA_X1
AG21
SATA_X2
AH16
FANOUT0/GPIO52
AM15
FANOUT1/GPIO53
AJ16
FANOUT2/GPIO54
AK15
FANIN0/GPIO56
AN16
FANIN1/GPIO57
AL16
FANIN2/GPIO58
K6
TEMPIN0/GPIO171
K5
TEMPIN1/GPIO172
K3
TEMPIN2/GPIO173
M6
TEMPIN3/TALERT#/GPIO174
?
M3_100-CK4148(218-0755042)
D D
SATA HDD/SSD
SATA ODD
C C
B B
A A
SATA_TXP0[28]
SATA_TXN0[28]
SATA_RXN0[28]
SATA_RXP0[28]
SATA_TXP1[28]
SATA_TXN1[28]
SATA_RXN1[28]
SATA_RXP1[28]
+1.1V_RUN
SATA_LED#[37]
USB_DEBUG_ON[25]
FCH_ODD_EN[28]
LCD_DBC[22]
R360 1K/F_4
R363 931/F
Integrated Clock Mode:
Leave unconnected.
USB_DEBUG_ON
R261 10K_4
R259 10K_4
R258 10K_4
R264 10K_4
SATA_CALRP
SATA_CALRN
Part 2 of 5
SD_CLK/SCLK_0/GPIO73
SD_CMD/SLOAD_0/GPIO74
SD_DATA0/SDATI_0/GPIO77
SD_DATA1/SDATO_0/GPIO78
SD
CARD
GBE
LAN
ROM_RST#/SPI_WP#/ GPIO161
SPI
ROM
VGA
DAC
VGA_DDC_SDA/GPO70
VGA_DDC_SCL/GPO71
VGA
MAINLINK
ML_VGA_HPD/GPIO229
VIN2/SDATI_1/GPIO177
VIN3/SDATO_1/GPIO178
VIN4/SLOAD_1/GPIO179
VIN6/GBE_STAT3/GPIO 181
VIN7/GBE_LED3/GPIO182
SD_CD#/GPIO75
SD_WP/GPIO 76
SD_DATA2/GPIO79
SD_DATA3/GPIO80
GBE_COL
GBE_CRS
GBE_MDCK
GBE_MDIO
GBE_RXCLK
GBE_RXD3
GBE_RXD2
GBE_RXD1
GBE_RXD0
GBE_RXCTL/RXDV
GBE_RXERR
GBE_TXCLK
GBE_TXD3
GBE_TXD2
GBE_TXD1
GBE_TXD0
GBE_TXCTL/TXEN
GBE_PHY_PD
GBE_PHY_RST#
GBE_PHY_INTR
SPI_DI/GPIO164
SPI_DO/GPIO163
SPI_CLK/GPIO162
SPI_CS1#/GPIO165
VGA_RED
VGA_GREEN
VGA_BLUE
VGA_HSYNC/GPO68
VGA_VSYNC/GPO69
VGA_DAC_RSET
AUX_VGA_CH_P
AUX_VGA_CH_N
AUXCAL
ML_VGA_L0P
ML_VGA_L0N
ML_VGA_L1P
ML_VGA_L1N
ML_VGA_L2P
ML_VGA_L2N
ML_VGA_L3P
ML_VGA_L3N
VIN0/GPIO175
VIN1/GPIO176
VIN5/SCLK_1/GPIO180
NC1
NC2
NC3
NC4
NC5
AL14
AN14
AJ12
AH12
AK13
AM13
AH15
AJ14
AC4
AD3
AD9
W10
AB8
AH7
AF7
AE7
AD7
AG8
AD1
AB7
AF9
AG6
AE8
AD8
AB9
AC2
AA7
W9
V6
V5
V3
T6
V1
L30
L32
M29
M28
N30
M33
N32
K31
V28
V29
U28
T31
T33
T29
T28
R32
R30
P29
P28
C29
N2
M3
L2
N4
P1
P3
M1
M5
AG16
AH10
A28
G27
L4
GBE_PHY_INTR
FCH_SPI_WP
INT_CRT_RED
INT_CRT_GRE
INT_CRT_BLU
FCH_VGA_HPD
FCH_GPIO175
FCH_GPIO176
FCH_GPIO177
FCH_GPIO178
FCH_GPIO179
FCH_GPIO180
FCH_GPIO181
FCH_GPIO182
R40 10K_4
R277 *10K_4_NC
R81 715/F_4
R357 100/F_4
R265 10K_4
R263 10K_4
R260 10K_4
R267 10K_4
R268 10K_4
R269 10K_4
R262 10K_4
R266 10K_4
FKHFN
+3.3V_SUS
INT_CRT_RED
INT_CRT_GRE
INT_CRT_BLU
+3.3V_SUS
EC7 *10P/50V_4_NC
INT_CRT_RED [23]
INT_CRT_GRE [23]
INT_CRT_BLU [23]
INT_CRT_HSYNC [23]
INT_CRT_VSYNC [23]
APU_VGA_AUXP [5]
APU_VGA_AUXN [5]
R place close to FCH
R89
150/F_4
FCH_SPI_SO [32]
FCH_SPI_SI [32]
FCH_SPI_CLK [32]
FCH_SPI_CS0# [32]
1 2
INT_DDCDAT [23]
INT_DDCCLK [23]
+1.1V_RUN
APU_DP_TXP0 [5]
APU_DP_TXN0 [5]
APU_DP_TXP1 [5]
APU_DP_TXN1 [5]
APU_DP_TXP2 [5]
APU_DP_TXN2 [5]
APU_DP_TXP3 [5]
APU_DP_TXN3 [5]
different with INTEL
AMD is SPI_DI to DO / SPI_DO to DI
(0,5HVHUYH
R88
150/F_4
R87
150/F_4
FCH_VGA_HPD [5]
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Monday, June 25, 2012
Monday, June 25, 2012
Monday, June 25, 2012
5
4
3
2
Date: Sheet
PROJECT :
Hudson-M3 SATA/HWM/SPI
Hudson-M3 SATA/HWM/SPI
Hudson-M3 SATA/HWM/SPI
1
R0AA
R0AA
R0AA
10 55
10 55
10 55
B
B
B
of
5
4
3
2
1
C176
0.1U/16V/X7R_4
C172
1U/6.3V/X5R
C147
0.1U/16V/X7R_4
C146
*1U/6.3V/X5R_NC
S5_3.3--3.3v standby power
C57
*1U/6.3V/X5R_NC
+VDDXL_3.3V
S5_1.1V--1.1V standby power
C45
*1U/6.3V/X5R_NC
VDD-- S/B CORE power
C166
C116
*1U/6.3V/X5R_NC
1U/6.3V/X5R
+1.1V_CKVDD
C180
C173
0.1U/16V/X7R_4
0.1U/16V/X7R_4
C169
*1U/6.3V/X5R_NC
C192
C117
0.1U/16V/X7R_4
*0.1U/16V/X7R_4_NC
C74
C56
*1U/6.3V/X5R_NC
1U/6.3V/X5R
C114
C134
0.1U/16V/X7R_4
1U/6.3V/X5R
+3.3V_SUS
C51
0.1U/16V/X7R_4
C122
10U/6.3V/X5R_8
CKVDD_1.1V-Internal clock
Generator I/O
power
C191
10U/6.3V/X5R_8
*1U/6.3V/X5R_NC
*1U/6.3V/X5R_NC
6WXII&&IRU($WHVW
C155
1U/6.3V/X5R
C131
C183
PCIE_VDDR--PCIE I/O power
C167
C184
1U/6.3V/X5R
1U/6.3V/X5R
AVDD_SATA--SATA phy power
C132
C104
10U/6.3V/X5R_8
1U/6.3V/X5R
VDDIO33
SR3 *SHORT_4_NC
C137
+1.1V_SUS
*1U/6.3V/X5R_NC
C190
0.1U/16V/X7R_4
C136
*1U/6.3V/X5R_NC
C64
*1U/6.3V/X5R_NC
C178
*1U/6.3V/X5R_NC
+3.3V_SUS
SR6 *SHORT_4_NC
+1.1V_RUN
+3.3V_SUS
U26D
HUDSON-M2
A3
VSS_1
A33
VSS_2
B7
VSS_3
B13
VSS_4
D9
VSS_5
D13
VSS_6
E5
VSS_7
E12
VSS_8
E16
VSS_9
E29
VSS_10
F7
VSS_11
F9
VSS_12
F11
VSS_13
F13
VSS_14
F16
VSS_15
F17
VSS_16
F19
VSS_17
F23
VSS_18
F25
VSS_19
F29
VSS_20
G6
VSS_21
G16
VSS_22
G32
VSS_23
H12
VSS_24
H15
VSS_25
H29
VSS_26
J6
VSS_27
J9
VSS_28
J10
VSS_29
J13
VSS_30
J28
VSS_31
J32
VSS_32
K7
VSS_33
K16
VSS_34
K27
VSS_35
K28
VSS_36
L6
VSS_37
L12
VSS_38
L13
VSS_39
L15
VSS_40
L16
VSS_41
L21
VSS_42
M13
VSS_43
M16
VSS_44
M21
VSS_45
M25
VSS_46
N6
VSS_47
N11
VSS_48
N13
VSS_49
N23
VSS_50
N24
VSS_51
P12
VSS_52
P18
VSS_53
P20
VSS_54
P21
VSS_55
P31
VSS_56
P33
VSS_57
R4
VSS_58
R11
VSS_59
R25
VSS_60
R28
VSS_61
T11
VSS_62
T16
VSS_63
T18
VSS_64
N8
VSSAN_HWM
K25
VSSXL
H25
VSSPL_SYS
?
M3_100-CK4148(218-0755042)
Part 5 of 5
GROUND
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSSPL_DAC
VSSAN_D AC
VSSANQ_DAC
VSSIO_DAC
EFUSE
T25
T27
U6
U14
U17
U20
U21
U30
U32
V11
V16
V18
W4
W6
W25
W28
Y14
Y16
Y18
AA6
AA12
AA13
AA14
AA16
AA17
AA25
AA28
AA30
AA32
AB25
AC6
AC18
AC28
AD27
AE6
AE15
AE21
AE28
AF8
AF12
AF16
AF33
AG30
AG32
AH5
AH11
AH18
AH19
AH21
AH23
AH25
AH27
AJ18
AJ28
AJ29
AK21
AK25
AL18
AM21
AM25
AN1
AN18
AN28
AN33
T21
L28
K33
N28
R6
47mA
20mA
12mA
200mA
11mA
14mA
11mA
12mA
7mA
226mA
U26C
AB17
VDDIO_33_PCIGP_1
AB18
VDDIO_33_PCIGP_2
AE9
VDDIO_33_PCIGP_3
AD10
VDDIO_33_PCIGP_4
AG7
VDDIO_33_PCIGP_5
AC13
VDDIO_33_PCIGP_6
AB12
VDDIO_33_PCIGP_7
AB13
VDDIO_33_PCIGP_8
AB14
VDDIO_33_PCIGP_9
AB16
VDDIO_33_PCIGP_10
H24
VDDPL_33_SYS
V22
VDDPL_33_DAC
U22
VDDPL_33_ML
T22
VDDAN_33_DAC
L18
VDDPL_33_SSUSB_S
D7
VDDPL_33_USB_S
AH29
VDDPL_33_PCIE
AG28
VDDPL_33_SATA
M31
LDO_CAP
V21
VDDPL_11_DAC
Y22
VDDAN_11_ML_1
V23
VDDAN_11_ML_2
V24
VDDAN_11_ML_3
V25
VDDAN_11_ML_4
AB10
VDDIO_33_GBE_S
AB11
VDDCR_11_GBE_S_1
AA11
VDDCR_11_GBE_S_2
AA9
VDDIO_GBE_S_1
AA10
VDDIO_GBE_S_2
G7
VDDAN_33_USB_S_1
H8
VDDAN_33_USB_S_2
J8
VDDAN_33_USB_S_3
K8
VDDAN_33_USB_S_4
K9
VDDAN_33_USB_S_5
M9
VDDAN_33_USB_S_6
M10
VDDAN_33_USB_S_7
N9
VDDAN_33_USB_S_8
N10
VDDAN_33_USB_S_9
M12
VDDAN_33_USB_S_10
N12
VDDAN_33_USB_S_11
M11
VDDAN_33_USB_S_12
U12
VDDAN_11_USB_S_1
U13
VDDAN_11_USB_S_2
T12
VDDCR_11_USB_S_1
T13
VDDCR_11_USB_S_2
P16
VDDAN_11_SSUSB_S_1
M14
VDDAN_11_SSUSB_S_2
N14
VDDAN_11_SSUSB_S_3
P13
VDDAN_11_SSUSB_S_4
P14
VDDAN_11_SSUSB_S_5
N16
VDDCR_11_SSUSB_S_1
N17
VDDCR_11_SSUSB_S_2
P17
VDDCR_11_SSUSB_S_3
M17
VDDCR_11_SSUSB_S_4
HUDSON-M2
PCI
MAIN
LINK
GBE
LAN
SERIAL
POWER
Part 3 of 5
CORE
S0
PCI/GPIO I/O
VDDAN_11_CLK_1
VDDAN_11_CLK_2
VDDAN_11_CLK_3
VDDAN_11_CLK_4
VDDAN_11_CLK_5
VDDAN_11_CLK_6
VDDAN_11_CLK_7
CLKGEN
I/O
VDDAN_11_CLK_8
VDDAN_11_PCIE_1
VDDAN_11_PCIE_2
VDDAN_11_PCIE_3
VDDAN_11_PCIE_4
VDDAN_11_PCIE_5
EXPRESS
VDDAN_11_PCIE_6
VDDAN_11_PCIE_7
VDDAN_11_PCIE_8
VDDAN_11_SATA_1
VDDAN_11_SATA_4
VDDAN_11_SATA_2
VDDAN_11_SATA_3
VDDAN_11_SATA_5
VDDAN_11_SATA_6
VDDAN_11_SATA_7
VDDAN_11_SATA_8
ATA
VDDAN_11_SATA_9
VDDAN_11_SATA_10
3.3V_S5 I/O
USB
VDDCR_11_S_1
VDDCR_11_S_2
VDDPL_11_SYS_S
VDDAN_33_HWM_S
USB
SS
VDDCR_11_1
VDDCR_11_2
VDDCR_11_3
VDDCR_11_4
VDDCR_11_5
VDDCR_11_6
VDDCR_11_7
VDDCR_11_8
VDDCR_11_9
VDDIO_33_S_1
VDDIO_33_S_2
VDDIO_33_S_3
VDDIO_33_S_4
VDDIO_33_S_5
VDDIO_33_S_6
VDDIO_33_S_7
VDDIO_33_S_8
VDDXL_33_S
VDDIO_AZ_S
1007mA
T14
T17
T20
U16
U18
V14
V17
V20
Y17
340mA
H26
J25
K24
L22
M22
N21
N22
P22
1088mA
AB24
Y21
AE25
AD24
AB23
AA22
AF26
AG27
1337mA
AA21
Y20
AB21
AB22
AC22
AC21
AA20
AA18
AB20
AC19
59mA
N18
L19
M18
V12
V13
Y12
Y13
W11
5mA
G24
187mA
N20
M20
TRACE WIDTH >=15mil
70mA
J24
12mA
M8
26mA
AA4
Trace width >=20 mil
C42
1U/6.3V/X5R
TRACE WIDTH >=100mil
C133
*0.1U/16V/X7R_4_NC
TRACE WIDTH >=30mil
C171
1U/6.3V/X5R
TRACE WIDTH >=100mil
C153
*0.1U/16V/X7R_4_NC
TRACE WIDTH >=50mil
C139
*1U/6.3V/X5R_NC
TRACE WIDTH >=20mil
C70
*0.1U/16V/X7R_4_NC
+VDDPL_1.1V
+3.3V_SUS
+3.3V_RUN
SL8 0_6
+3.3V_RUN
D D
+FCH_VDDAN_11_MLDAC
+3.3V_SUS +FCH_VDDPL_33_SSUSB_S
SL5 0_6
SR5
*SHORT_4_NC
C C
+1.1V_SUS
+3.3V_SUS
+1.1V_SUS
SL4 0_short_6
112
C85
*1U/6.3V/X5R_NC
C212
1U/6.3V/X5R
C207
1U/6.3V/X5R
SL6 0_short_6
C113
*1U/6.3V/X5R_NC
+FCH_VDDPL_33_SUSB_S
C65
*1U/6.3V/X5R_NC
2
C81
*1U/6.3V/X5R_NC
TRACE WIDTH >=15mil
C214
*0.1U/16V/X7R_4_NC
TRACE WIDTH >=15mil
C208
*0.1U/16V/X7R_4_NC
2
112
C96
0.1U/16V/X7R_4
C55
0.1U/16V/X7R_4
SL2 0_short_6
2
112
SL3 0_short_6
C101
C87
1U/6.3V/X5R
0.1U/16V/X7R_4
C94
*1U/6.3V/X5R_NC
+FCH_VDDAN_11_ML
EC8
*0.1U/16V/X7R_4_NC
2
112
C88
0.1U/16V/X7R_4
VDDQ--3.3V I/O power
C103
C50
*10U/6.3V/X5R_8_NC
1U/6.3V/X5R
+VDDPL_3.3V
+FCH_VDDAN_33_DAC_R
+FCH_VDDPL_33_SSUSB_S
+FCH_VDDPL_33_SUSB_S
+1.5V_SUS
C179
0.1U/16V/X7R_4
C49
C47
10U/6.3V/X5R_8
10U/6.3V/X5R_8
+FCH_VDDAN_11_USB_S
C62
0.1U/16V/X7R_4
+FCH_VDDAN_11_SSUSB_S_R
C75
C102
1U/6.3V/X5R
1U/6.3V/X5R
C63
C48
0.1U/16V/X7R_4
*0.1U/16V/X7R_4_NC
+FCH_VDDPL_33
C159
C200
1U/6.3V/X5R
*4.7U/6.3V/X5R_6_NC
TRACE WIDTH >=50mil
C61
1U/6.3V/X5R
C73 1U/6.3V/X5R
C77 0.1U/16V/X7R_4
C69
0.1U/16V/X7R_4
C110
1U/6.3V/X5R
102mA
C71
*0.1U/16V/X7R_4_NC
R356 *0_4_NC
C529 *4. 7U/6.3V/X5R_6_NC
C187
*0.1U/16V/X7R_4_NC
+3V_AVDD_USB
470mA
C59
C58
1U/6.3V/X5R
1U/6.3V/X5R
TRACE WIDTH >=20mil
140mA
TRACE WIDTH >=15mil
42mA
C84
*10U/6.3V/X5R_8_NC
282mA
424mA
C89
0.1U/16V/X7R_4
6WXIIIRU($WHVW
M3_100-CK4148(218-0755042)
B B
SL11 0_6
+1.1V_SUS
SL7 0_6
A A
5
+VDDPL_1.1V
C154
1U/6.3V/X5R
+1.1V_RUN
340mA
Errata : S3 have 400mV for VDDAN (A12 only)
4
SR2 0_6
+1.1V_C KVDD
+VDDPL_3.3V+3.3V_RUN
C518
C148
0.1U/16V/X7R_4
1U/6.3V/X5R
+3.3V_SUS
VGA_PD[8]
3
R3
10K_4
ME2N7002E
Vgs(th) = 2.5v , Rds(on) = 7.5 ȍ
Vg= 3.3v, Vs= 0v, so MOS will turn on
R4
*10K_4_NC
C2
1U/6.3V/X5R
2
+15V_ALW
31
R6
1M_4
Q1
2N7002W
C3
*0.1U/25V/X7R_6_NC
10
240mA
3
Q5
2
AO3404
1
+1.1V_RUN
3
Q6
2
AO3404
1
+FCH_VDDAN_11_MLDAC
2
AO3404
Vgs(th) = 3v , Rds(on) = 28 mȍ , Id = 5.8A
Vg= 15v, Vs= 3.3v, so MOS will turn on
233mA
AO3404
Vgs(th) = 3v , Rds(on) = 28 mȍ , Id = 5.8A
Vg= 15v, Vs= 1.1v, so MOS will turn on
+FCH_VDDAN_33_DAC_R+3.3V_RUN
C32
C151
1U/6.3V/X5R
*10U/6.3V/X5R_8_NC
C28
0.1U/16V/X7R_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Wednesday, July 04, 2012
Wednesday, July 04, 2012
Wednesday, July 04, 2012
Date: Sheet of
Date: Sheet of
PROJECT :
Hudson-M3 POWER/GND
Hudson-M3 POWER/GND
Hudson-M3 POWER/GND
R0AA
R0AA
R0AA
of
11 55
11 55
1
11 55
B
B
B
5
+3.3V_RUN +3.3V_RUN +3.3V_RUN +3.3V_SUS +3.3V_SUS +3.3V_SUS +3.3V_SUS
4
3
2
1
STRAPS PINS
R68
R78
R273
R274
*10K_4_NC
D D
PCI_CLK1[9]
PCI_CLK3[9]
PCI_CLK4[9]
LPC_CLK0[9,3 1]
LPC_CLK1_R[9]
EC_PWM2[8]
RTC_CLK[9]
*10K_4_NC
R305
*10K_4_NC
R84
*10K_4_NC
10K_4
*10K_4_NC
R295
10K_4
R74
2.2K_4
LPC_CLK1
CLKGEN
ENABLED
CLKGEN
DISABLED
Setting
R292
*2.2K_4_NC
LPC ROM
SPI ROM S5 PLUS MODE
Setting
RTC_CLKPCI_CLK1 --------
S5 PLUS MODE
DISABLED
Setting
ENABLED
R281
10K_4
C C
REQUIRED
STRAPS
PULL
HIGH
PULL
LOW
--------
--------
--------
ALLOW
PCIE Gen2
FORCE
PCIE Gen1
Setting
--------
--------
R294
R282
10K_4
10K_4
PCI_CLK3 PCI_CLK4
USE
DEBUG
STRAP
IGNORE
DEBUG
STRAP
Setting Setting Setting
non_Fusion
CLOCK MODE
FUSION
CLOCK MODE
R72
R77
*10K_4_NC
10K_4
LPC_CLK0 EC_PWM2
EC
ENABLED
EC
DISABLED
DEBUG STRAPS
FCH HAS 15K INTERNAL PU FOR PCI_AD[27:23]
B B
PCI_AD27[9]
PCI_AD26[9]
PCI_AD25[9]
PCI_AD24[9]
PCI_AD23[9]
R311
*2.2K_4_NC
R318
*2.2K_4_NC
R321
*2.2K_4_NC
R315
*2.2K_4_NC
R314
*2.2K_4_NC
PULL
HIGH
PULL
LOW
PCI_AD27 PCI_AD26
USE PCI
PLL
Setting Setting Setting Setting Setting
BYPASS
PCI PLL
DISABLE ILA
AUTORUN
ENABLE ILA
AUTORUN
PCI_AD25 PCI_AD24
USE FC
PLL
BYPASS FC
PLL
USE DEFAULT
PCIE STRAPS
USE EEPROM
PCIE STRAPS
PCI_AD23
DISABLE PCI
MEM BOOT
ENABLE PCI
MEM BOOT
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Monday, June 25, 2012
Monday, June 25, 2012
Monday, June 25, 2012
5
4
3
2
Date: Sheet
PROJECT :
Hudson-M3 STRAP/PWRGD
Hudson-M3 STRAP/PWRGD
Hudson-M3 STRAP/PWRGD
1
R0AA
R0AA
R0AA
12 55
12 55
12 55
B
B
B
of
1
M_A_A[15:0][4]
A A
SO-DIMMA SPD Address is 0XA0
SO-DIMMA TS Address is 0X30
M_A_BS0[4]
M_A_BS1[4]
M_A_BS2[4]
M_A_CS#0[4]
M_A_CS#1[4]
M_A_CLKP0[4]
M_A_CLKN0[4]
M_A_CLKP1[4]
M_A_CLKN1[4]
M_A_CKE0[4 ]
M_A_CKE1[4 ]
M_A_CAS#[4 ]
RP2 10KX2
1
3
B B
C C
M_A_RAS#[4 ]
M_A_WE#[4]
2
4
SMB_RUN_CLK0[8,14,33]
SMB_RUN_DAT0[8,14,33]
M_A_ODT0[4]
M_A_ODT1[4]
M_A_DM[7 ..0][4]
M_A_DQSP[7:0][4]
M_A_DQSN[7:0][4]
2
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
DIMM0_SA0
DIMM0_SA1
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
JDIM2A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDRRK-20401-TP4B
PC2100 DDR3 SDRAM SO-DIMM
3
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
(204P)
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
4
M_A_DQ[63:0] [4]
5
M_A_EVENT#[4]
+SMDDR_VREF_DIMM0
6
+3.3V_RUN
M_A_RST#[4]
+SMDDR_VREF_DQ0
+1.5V_SUS
7
JDIM2B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDRRK-20401-TP4B
(204P)
PC2100 DDR3 SDRAM SO-DIMM
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VTT1
VTT2
GND
205
8
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
GND
206
+0.75V_DDR_VTT
+3.3V_RUN
12
RT1
10K/NTC_6
Place these Caps near So-Dimm0.
+1.5V_SUS
C398 1U/6.3V/X5R
C373 1U/6.3V/X5R
C397 *10U/6.3V/X5R_8_NC
C377 *10U/6.3V/X5R_8_NC
C392 *10U/6.3V/X5R_8_NC
D D
C399 0.1U/16V/X7R_4
C358 *0.1U/16V/X7R_4_NC
C400 0.1U/16V/X7R_4
C375 *0.1U/16V/X7R_4_NC
C374 0.1U/16V/X7R_4
1
+0.75V_DDR_VTT
C367 1U/6.3V/X5R
C393 1U/6.3V/X5R
C385 1U/6.3V/X5R
C370 1U/6.3V/X5R
C365 *10U/6.3V/X5R_6_NC
C379 *10U/6.3V/X5R_8_NC
C402 *10U/6.3V/X5R_8_NCC316 10U/6.3V/X5R_8
+3.3V_RUN
C336 1U/6.3V/X5R
C337 *0.1U/16V/X7R_4_NC
R185
1K/F_4
12
R184
1K/F_4
2
3
4
C369
0.1U/16V/X7R_4
C368
1U/6.3V/X5 R
5
+1.5V_SUS +SMDDR_VREF_DIMM0+1.5V_SUS +SMDDR_VREF_DQ0
R196
1K/F_4
R197
1K/F_4
12
C410
0.1U/16V/X7R_4
C411
1U/6.3V/X5 R
6
T_DDR[31]
80 degree = 1.98V
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
DDR3 DIMM-0
DDR3 DIMM-0
DDR3 DIMM-0
Monday, June 25, 2012
Monday, June 25, 2012
Monday, June 25, 2012
7
12
R423
1.5K/F_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
R0AA
R0AA
R0AA
13 55
13 55
13 55
8
of
B
B
B
1
M_B_A[15:0][4]
SO-DIMMB SPD Address is 0XA4
A A
SO-DIMMB TS Address is 0X34
M_B_BS0[4]
M_B_BS1[4]
M_B_BS2[4]
M_B_CS#0[4]
M_B_CS#1[4]
M_B_CLKP0[4]
M_B_CLKN0[4]
M_B_CLKP1[4]
M_B_CLKN1[4]
M_B_CKE0[4 ]
M_B_CKE1[4 ]
M_B_CAS#[4 ]
RP1 10KX2
+3.3V_RUN
B B
C C
3
1
M_B_RAS#[4 ]
M_B_WE#[4]
4
2
SMB_RUN_CLK0[8,13,33]
SMB_RUN_DAT0[8,13,33]
M_B_ODT0[4]
M_B_ODT1[4]
M_B_DM[7 ..0][4]
M_B_DQSP[7:0][4]
M_B_DQSN[7:0][4]
2
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
DIMM1_SA0
DIMM1_SA1
M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP5
M_B_DQSP4
M_B_DQSP6
M_B_DQSP7
M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN5
M_B_DQSN4
M_B_DQSN6
M_B_DQSN7
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM5
M_B_DM4
M_B_DM6
M_B_DM7
JDIM1A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDRRK-20401-TP8D
PC2100 DDR3 SDRAM SO-DIMM
3
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
(204P)
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ43
M_B_DQ46
M_B_DQ40
M_B_DQ41
M_B_DQ47
M_B_DQ42
M_B_DQ45
M_B_DQ44
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ37
M_B_DQ36
M_B_DQ38
M_B_DQ39
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
4
M_B_DQ[63:0] [4]
5
+SMDDR_VREF_DQ1
+SMDDR_VREF_DIMM1
6
+3.3V_RUN
M_B_EVENT#[4]
M_B_RST#[4]
+1.5V_SUS
7
JDIM1B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDRRK-20401-TP8D
(204P)
PC2100 DDR3 SDRAM SO-DIMM
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VTT1
VTT2
GND
205
8
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
GND
206
+0.75V_DDR_VTT
Place these Caps near So-Dimm1.
CH6101M9905
+1.5V_SUS +0.75V_DDR_VTT
D D
+3.3V_RUN
CAP CHIP 10U 6.3V(+-20%,X5R,0603)
C332 *10U/6.3V/X5R_8_NC
C359 0.1U/16V/X7R_4
C331 *10U/6.3V/X5R_8_NC
C361 10U/6.3V/X5R_8
C395 10U/6.3V/X5R_8
C357 10U/6.3V/X5R_8
C360 *0.1U/16V/X7R_4_NC
C333 0.1U/16V/X7R_4
C362 0.1U/16V/X7R_4
C327 0.1U/16V/X7R_4
C326 0.1U/16V/X7R_4
C378 1U/6.3V/X5R
C344 *0.1U/16V/X7R_4_NC
1
C405 *1U/6.3V/X5R_NC
C394 1U/6.3V/X5R
C350 1U/6.3V/X5R
C348 1U/6.3V/X5R
C407 *10U/6.3V/X5R_8_NC
C419 *10U/6.3V/X5R_8_NC
C356 *10U/6.3V/X5R_8_NC
2
+1.5V_SUS
R165
1K/F_4
R164
1K/F_4
3
+SMDDR_VREF_DQ1
12
C339
0.1U/16V/X7R_4
C340
1U/6.3V/X5 R
4
+1.5V_SUS
5
R186
1K/F_4
R187
1K/F_4
+SMDDR_VREF_DIMM1
12
C364
0.1U/16V/X7R_4
C363
1U/6.3V/X5 R
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
Monday, June 25, 2012
Monday, June 25, 2012
6
Monday, June 25, 2012
7
PROJECT :
DDR3 DIMM-1
DDR3 DIMM-1
DDR3 DIMM-1
R0AA
R0AA
R0AA
14 55
14 55
14 55
8
B
B
B
of
5
U27A
PART 1 0F 9
4
3
2
1
Thames/Whistler/Seymour PCIE-Gen2
0.1uF AC coupling Caps for PCIE GEN1/2
AA38
W36
W38
AB35
AA36
AH16
AA30
Y37
Y35
V37
V35
U36
U38
R36
R38
P37
P35
N36
N38
M37
M35
K37
K35
H37
H35
G36
G38
E37
T37
T35
L36
L38
J36
J38
F37
F35
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_RX8P
PCIE_RX8N
PCIE_RX9P
PCIE_RX9N
PCIE_RX10P
PCIE_RX10N
PCIE_RX11P
PCIE_RX11N
PCIE_RX12P
PCIE_RX12N
PCIE_RX13P
PCIE_RX13N
PCIE_RX14P
PCIE_RX14N
PCIE_RX15P
PCIE_RX15N
CLOCK
PCIE_REFCLKP
PCIE_REFCLKN
TEST_PG
PERSTB
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCI EXPRESS INTERFACE
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
CALIBRATION
PCIE_CALR_TX
PCIE_CALR_RX
GPU_RST#
PEG_TXP0
PEG_TXN0
PEG_TXP1
PEG_TXN1
PEG_TXP2
PEG_TXN2
PEG_TXP3
PEG_TXN3
PEG_TXP4
PEG_TXN4
PEG_TXP5
PEG_TXN5
PEG_TXP6
PEG_TXN6
PEG_TXP7
PEG_TXN7
CLK_PCIE_VGAP
CLK_PCIE_VGAN
12
PEG_TXP0[3]
PEG_TXN0[3 ]
PEG_TXP1[3]
PEG_TXN1[3 ]
D D
PEG_TXP2[3]
PEG_TXN2[3 ]
PEG_TXP3[3]
PEG_TXN3[3 ]
PEG_TXP4[3]
PEG_TXN4[3 ]
PEG_TXP5[3]
PEG_TXN5[3 ]
PEG_TXP6[3]
PEG_TXN6[3 ]
PEG_TXP7[3]
PEG_TXN7[3 ]
C C
B B
CLK_PCIE_VGAP[9]
CLK_PCIE_VGAN[9]
R323 1K_4
HEATHROW M2
Y33
Y32
W33
W32
U33
U32
U30
U29
T33
T32
T30
T29
P33
P32
P30
P29
N33
N32
N30
N29
L33
L32
L30
L29
K33
K32
J33
J32
K30
K29
H33
H32
Y30
Y29
PEG_RXP0_C
PEG_RXN0_C
PEG_RXP1_C
PEG_RXN1_C
PEG_RXP2_C
PEG_RXN2_C
PEG_RXP3_C
PEG_RXN3_C
PEG_RXP4_C
PEG_RXN4_C
PEG_RXP5_C
PEG_RXN5_C
PEG_RXP6_C
PEG_RXN6_C
PEG_RXP7_C
PEG_RXN7_C
PCIE_CALRP
PCIE_CALRN
C243 0.1U/16V/X7R_4
C227 0.1U/16V/X7R_4
C242 0.1U/16V/X7R_4
C226 0.1U/16V/X7R_4
C238 0.1U/16V/X7R_4
C239 0.1U/16V/X7R_4
C236 0.1U/16V/X7R_4
C237 0.1U/16V/X7R_4
C232 0.1U/16V/X7R_4
C233 0.1U/16V/X7R_4
C234 0.1U/16V/X7R_4
C235 0.1U/16V/X7R_4
C230 0.1U/16V/X7R_4
C231 0.1U/16V/X7R_4
C228 0.1U/16V/X7R_4
C229 0.1U/16V/X7R_4
Support Themas & Seymour only
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
R91 1.27K/F_4
R70 2K/F_4
12
12
PEG_RXP0
PEG_RXN0
PEG_RXP1
PEG_RXN1
PEG_RXP2
PEG_RXN2
PEG_RXP3
PEG_RXN3
PEG_RXP4
PEG_RXN4
PEG_RXP5
PEG_RXN5
PEG_RXP6
PEG_RXN6
PEG_RXP7
PEG_RXN7
+1.0V_GFX
DGPU_HOLD_RST#[9]
APU_PCIE_RST#[9,27,29]
PEG_RXP0 [3]
PEG_RXN0 [3]
PEG_RXP1 [3]
PEG_RXN1 [3]
PEG_RXP2 [3]
PEG_RXN2 [3]
PEG_RXP3 [3]
PEG_RXN3 [3]
PEG_RXP4 [3]
PEG_RXN4 [3]
PEG_RXP5 [3]
PEG_RXN5 [3]
PEG_RXP6 [3]
PEG_RXN6 [3]
PEG_RXP7 [3]
PEG_RXN7 [3]
Part Description,
Part Number,
Footprint need update
*MC74VHC1G08DFT2G_NC
1 2
R56 0_4
GPU_RST#
+3.3V_GFX
2
31
Q24
*2N7002W_NC
U8
2
1
+3.3V_RUN
3 5
1 2
*10K_4_NC
R309
C135
*0.1U/16V/X7R_4_NC
4
GPU_RST#
R69
100K_4
PEG_A_CLKRQ# [8]PCIE_CLKREQ_PEG#[16]
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Monday, June 25, 2012
Monday, June 25, 2012
Monday, June 25, 2012
5
4
3
2
Date: Sheet
PROJECT :
London_PCIE I/F
London_PCIE I/F
London_PCIE I/F
1
R0AA
R0AA
R0AA
15 55
15 55
15 55
B
B
B
of
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