Quanta R09, R09A, Inspiron 5720, Inspiron 7720 Schematic

Name: Quanta R09
Brand: Quanta
SKU: 3832257
Rating: 5 (1 reviews)

5 (1)

R09/A 17" OPT BLOCK DIAGRAM

A A

DDRIII-SODIMM1

H=4mm

PAGE12

DDRIII-SODIMM2

H=8mm

SATA -HDD(Main)

B B

SATA -HDD(Second)

m-SATA

ODD

USB3.0 Ports x2

USB Power share port1

3-axis Fall Sensor

FFS_INT2_R

C C

D D

FFS LNG3DMTR

Keyboard Conn.

Touch Pad

PAGE11

PAGE34

PAGE41

PAGE34

PAGE35, 36

PAGE33

PAGE40

HDD_FALL_INT1

PWM FAN &Thermal

DDRIII 1600 MT/s

SATA0 Gen3

SATA1 Gen3

SATA2 Gen2

SATA3 Gen2

USB3.0/2.0

SMBUS

KBC ITE 8518

PAGE38

SPI ROM 8MB

PAGE44 PAGE39

FDI LINK

LPC

CPU

Ivy Bridge/ Sandy Bridge 35W / 45W CPU

PGA 988

2.7GT /s

Mobile Intel

Series 7 Chipset

PCH

HM77

Panther Point

BGA 989

25 mm X 25 mm

SPI

SPI ROM 8MB

PAGE39

25MHz

PAGE6~10

DMI LINK

5GT /s

iGFX Interfaces

PAGE20~26

32.768KHz

PCIEx16

HDMI 1.4a

CRT

LVDS

USB2.0

PCI-E

USB3.0/2.0

IHDA

N13P-GT/GV (128bit/64bit)

USB[12]

Camera

PAGE27 PAGE32

USB[4]

WLAN/BT

PAGE41

PCIE[1]

USB3.0 Ports x1

DB1

Audio Codec

IDT 92HD94

PAGE30

Nvidia

29mm X 29mm

BGA 973

GDDR5 2GB/1GB 128Mbx16bitx8 128Mbx16bitx4

PAGE18,19

Card reader RTS5179GR

LAN 10/100/1000

RTL8111F/8105E

PAGE13~17

HDMI 1.4a

USB[11]

PCIE[5]

25MHz

eDP

CRT

Finger print

RJ45

3D LCD CONN 1920 x 1080 (FHD)

CRT CONN

HDMI CONN

PAGE29

USB[8]

PAGE27

PAGE28

LCD CONN 1600 x 900 (HD+) 1920 x 1080 (FHD)

DB2

Hot key board

DB3

USB3.0 Ports x1

DB4

Poewr button board

DB5

TP button board

PCB STACK UP

LAYER 1 : TOP

LAYER 2 : GND

LAYER 3 : IN1

LAYER 4 : IN2

LAYER 5 : VCC

LAYER 6 : BOT

PAGE27

DIS

Subwoofer TI TPA3111

PAGE31 PAGE30 PAGE30 PAGE27

Jack x 2Speaker Digital-MIC

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Monday, February 20, 2012

Date: Sheet of

Monday, February 20, 2012

Date: Sheet of

Monday, February 20, 2012

PROJECT :

BLOCK DIAGRAM

R09A

1 58

A A

+3.3V_SUS

+3.3V_RUN

JDIM1A

2.2K

2.2K2.2K

JDIM2A

FALL SENSOR STM LNG3DM

2.2K2.2K

SMBCLK

H14

SMBDATA

PCH

SML0CLK

G12

SML0DATA

B B

+3.3V_RUN

N-MOSFET

+3.3V_RUN

2.2K

WLAN_SCLK WLAN_SDATA

+3.3V_SUS

2.2K2.2K

E14

SMB_CLK_ME1

M16

SMB_DATA_ME1

+3.3V_ALW

2.2K2.2K

SMBDAT1116 SMBCLK1

115

+3.3V_ALW

C C

SIO

ITE8518E

110

SMBCLK0

111 SMBDAT0

2.2K2.2K

+3.3V_RUN

2.2K2.2K

SMBCLK3

SMBDAT3

N-MOS

+3.3V_SUS

100

Battery

Charger

THERMAL(NCT7718W)

16h

Function

DDR3

Thermal IC Charge IC

Battery Fall Sensor

JDIM1A A0 JDIM2A A4 G781-1P8 EMC1422 BQ24707ARGRR Battery LNG3DM

SMBus AddressIC

1001101xb (9Ah)

1001100xb (98h) 0b00010010 (0x12) 16h 01010000 (50h)

THERMAL(G781-1)

For GPU

D D

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Wednesday, February 08, 2012

Date: Sheet of

Wednesday, February 08, 2012

Date: Sheet of

Wednesday, February 08, 2012

PROJECT :

SMB/SCREW PAD

R09A

2 58

USB Master

A A

USB0

USB1

USB2

USB3

USB4

USB5

B B

USB6

Port Assignment

External port#1 (USB3.0)

External port#2 (USB3.0 / Power share)

External port#3 (USB3.0)

External port#4 (USB3.0)

MiniCard 1 (WLAN/BT/WiMAX)

X(FOR HM77)

SATA0

SATA1

SATA2

SATA3

SATA4

SATA5

Port AssignmentSATA Master

HDD Main

HDD Second

mSATA

ODD

PCIE 1

PCIE 2

PCIE 3

PCIE 4

PCIE 5

PCIE 6

PCIE 7

Port AssignmentPCIE Master

WLAN

LAN

NCPCIE 8

USB7

X(FOR HM77)

FingerprintUSB8

USB9

USB10

USB11

USB12

Card Reader

Express Card

Camera

C C

D D

USB13

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Wednesday, February 08, 2012 3 58

Date: Sheet of

Wednesday, February 08, 2012 3 58

Date: Sheet of

Wednesday, February 08, 2012 3 58

PROJECT :

PORT ASSIGNMENT

R11

Adapter 90W

Charger BQ24707RGRR

D D

PWR_SRC

Shapes: 280mil Via: 10

VER : 1A

Battery 3S2P

+3.3V_EN2 ALW_ON

TI (PU1) TPS51125ARGER

+3.3V_ALW

TDC: 6.2A Shapes: 155mil

C C

Via: ?

SUS_ON

Load Switch(PQ18) FDC655BN

+3.3V_SUS

TDC: 0.226A Shapes: 8mil Via: ?

B B

+5V_ALW

TDC: 10.8A Shapes: 720mil Via: ?

Load Switch(PQ24) FDC655BN

+5V_SUS

TDC: 0.1A Shapes: 56.4mil Via: ?

RUN_ON

Load Switch(PQ23) MDV1522URH

+3.3V_RUN

TDC: 2.6A Shapes: 140.8mil Via: ?

+15V_ALW

SUS_ON

Load Switch(PQ17) MDV1522URH

+5V_RUN

TDC: 4.13A Shapes: 140mil Via: ?

DGPU_PWR_EN

Load Switch(PQ20) FDC655BN

For dGPU only

+3.3V_GFX

TDC: 0.966A Shapes: 8mil Via: ?

SIO_SLP_S3#

+1.5V_SUS

TDC: 16A Shapes: 326mil Via: ?

RUN_ON

RichTek(PU5) RT8068AZQW

+1.8V_RUN

TDC: 0.869A Shapes: 40.8mil Via: ?

SIO_SLP_S4#

TI(PU2) TPS51216RUKR

+0.75V_DDR_VTT

Load Switch(PQ25) FDC655BN

+1.5V_RUN

TDC: 0.922A

Shapes: 40mil

Via: ?

1.05V_PCH_PWRGD

1.5V_SUS_PWRGD

LDO

TDC: 1A Shapes: 40mil Via: ?

RUN_ON

Load Switch(PQ26) MDV1522URH

VCCSA_EN

RichTek(PU4) RT8241DGQW

RichTek(PU3) RT8240BGQW

+1.5V_SUS

+VCCSA_CORE

TDC: 4.2A Shapes: 168mil Via: ?

DGPU_PWR_ON#

SIO_SLP_S3#

Load Switch(Q4) AON7410

For dGPU only For dGPU only

+1.5V_GFX

TDC: 7.9A Shapes: 40mil

For dGPU

Via: ?

+1.5V_CPU

TDC: 5A Shapes: 200mil Via: ?

+1.05V_PCH

Load Switch(PQ28) MDV1522URH

TDC: 13.4A Shapes: 415.6mil Via: ?

+1.05V_GFX

TDC: 2.7A Shapes: 40mil Via: ?

+3.3V_RUN

DGFX_VR_PWRGD

IMVP_VR_ON

ON(PU7) NCP6132A

PQ34 PQ35 PQ36

+VCC_CORE

TDC: 52A Shapes: 1696mil Via: ?

+VCC_iGFX_CORE

TDC: 38A Shapes: 920mil Via: ?

ON(PU10) NCP3218MNR2G

+VCC_DGFX_CORE

TDC: 60A Shapes: 1600mil Via: ?

+3V_GFX

For dGPU only

A A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Power Block Diagram

Date: Sheet of

Wednesday, February 08, 2012 4 58

Date: Sheet of

Wednesday, February 08, 2012 4 58

Date: Sheet of

Wednesday, February 08, 2012 4 58

PROJECT :

R09A

Battery Mode

+5V_ALW

+3.3V_ALW

A A

B B

C C

+5V_ALW

+3.3V_ALW

+1.5V_SUS

D D

SUS SW

+PWR_SRC

DDR/0.75V

SLP_S3 SWITCH

+PWR_SRC

RUN PWR SWITCH

+PWR_SRC

1.05V VR

RC Delay

+5V_SUS

+3.3V_SUS

SUS_ON

+1.5V_SUS

+DDR_VTTREF

+0.75V_DDR_VTT

1.5V_SUS_PWRGD

SIO_SLP_S3# SIO_SLP_S4#

+1.5V_CPU+1.5V_SUS

SIO_SLP_S3#

+GFX_PWR_SRC

+5V_RUN

+3.3V_RUN

+1.5V_RUN

RUN_ON

+1.05V_PCH

1.05V_PCH_PWRGD

+3.3V_RUN

19 18

VCCSA_PWRGD

+5V_ALW

SVID

1.8V VR

+PWR_SRC

VCCSA VR

+PWR_SRC

IMVP VR

CPUPCH

HWPG

IMVP_VR_ON

POWER_SW_IN0#

SUS_ON

+1.8V_RUN

VCCSA_EN

+VCCSA_CORE

VCCSA_PWRGD

VCCSA_EN

+VCC_CORE

+VCC_GFX_CORE

IMVP_PWRGD

SYS_PWR_SW#

RUN_ON

+3.3V_ALW

+1.5V_SUS

+5V_ALW2

PWR SW VR

3.3V_ALW_ON

ALW_ON

RSMRST# ME_SUS_PWR_ACK AC_PRESENT

EC_PWROK

IMVP_VR_ON

3637

SIO_SLP_S5#17SIO_SLP_S4#18SIO_SLP_S3#

GPU PWR

SIO_PWRBTN#

35.2

+3V_GFX

SWITCH

DGPU_PWR_EN

+PWR_SRC

GPU VR

35.3

GPU PWR SWITCH

35.5

+VCC_DGFX_CORE

35.4

DGFX_VR_PWRGD

DGPU_VREN

35.6

35.7

DGFX_VR_PWRGD

+1.5V_GFX

+1.05V_GFX+1.05V_PCH

GPU

3V/5V

EN2

35.1

+PWR_SRC

+3.3V_ALW

+5V_ALW

+15V_ALW

EN1

SIO_SLP_S5# SIO_SLP_S4# SIO_SLP_S3#

PM_DRAM_PWRGD PCH_CLK SYS_PWROK DGPU_PWR_EN DGPU_VREN

SYS_PWROK

IMVP_PWRGD

EC_PWROK

PM_DRAM_PWRGD

EC_PWROK

PLTRST#

DGPU_HOLD_RST#

35.10

+VCHGR+PWR_SRC

5 8 9

35.1

CHARGER Battery

DPWROK SUSWARN# ACPRESENT PWRBTN#

SLP_S5# SLP_S3#

APWROK DRAMPWROK

SYS_PWROK

PCH

35.3

35.8

GPIO17DGPU_PWROK

PROCPWRGD

35.10

H_PWRGOOD

DGPU_HOLD_RST#

SM_SDRAMPWROK

SVID

GPU_RST#

GPU

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Wednesday, February 08, 2012 5 58

Date: Sheet of

Wednesday, February 08, 2012 5 58

Date: Sheet of

Wednesday, February 08, 2012 5 58

PROJECT :

POWER SEQUENCE

R09

UNCOREPWRGOOD

CPU

PLTRST#

RESET# PLTRST#

Ivy Bridge Processor (RESERVED, CFG)

DP & PEG Compensation

+1.05V_PCH

D D

U29A

DMI_TXN0[20] DMI_TXN1[20] DMI_TXN2[20] DMI_TXN3[20]

DMI_TXP0[20] DMI_TXP1[20] DMI_TXP2[20] DMI_TXP3[20]

DMI_RXN0[20] DMI_RXN1[20] DMI_RXN2[20] DMI_RXN3[20]

DMI_RXP0[20] DMI_RXP1[20] DMI_RXP2[20] DMI_RXP3[20]

C C

B B

eDP_ICOMPO 12mil eDP_COMPIO 4mil

Programing Disable eDP interface(BIOS)

FDI_TXN0[20] FDI_TXN1[20] FDI_TXN2[20] FDI_TXN3[20] FDI_TXN4[20] FDI_TXN5[20] FDI_TXN6[20] FDI_TXN7[20]

FDI_TXP0[20] FDI_TXP1[20] FDI_TXP2[20] FDI_TXP3[20] FDI_TXP4[20] FDI_TXP5[20] FDI_TXP6[20] FDI_TXP7[20]

FDI_FSYNC0[20] FDI_FSYNC1[20]

FDI_LSYNC0[20] FDI_LSYNC1[20]

FDI_INT[20]

eDP_COMP INT_eDP_HPD

DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3

DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3

DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3

DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3

FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7

FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7

FDI_FSYNC0 FDI_FSYNC1

FDI_INT FDI_LSYNC0

FDI_LSYNC1

FDI Disabling (Discrete Only)

FDI_INT

R190 0_4_DISR190 0_4_DIS

1 2

R200 0_4_DISR200 0_4_DIS

1 2

R185 0_4_DISR185 0_4_DIS

1 2

R197 0_4_DISR197 0_4_DIS

1 2

R184

R184 1K_4_DIS

1K_4_DIS

A A

DIS: POP UMA/ OTP: NC

R186

R186 1K_4_DIS

1K_4_DIS

FDI_FSYNC can gang all these 4 signals together and tie them with only one 1K resistor to GND (DG V0.5 Ch2.2.9).

FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1

B27

DMI_RX#[0]

B25

DMI_RX#[1]

A25

DMI_RX#[2]

B24

DMI_RX#[3]

B28

DMI_RX[0]

B26

DMI_RX[1]

A24

DMI_RX[2]

B23

DMI_RX[3]

G21

DMI_TX#[0]

E22

DMI_TX#[1]

F21

DMI_TX#[2]

D21

DMI_TX#[3]

G22

DMI_TX[0]

D22

DMI_TX[1]

F20

DMI_TX[2]

C21

DMI_TX[3]

A21

FDI0_TX#[0]

H19

FDI0_TX#[1]

E19

FDI0_TX#[2]

F18

FDI0_TX#[3]

B21

FDI1_TX#[0]

C20

FDI1_TX#[1]

D18

FDI1_TX#[2]

E17

FDI1_TX#[3]

A22

FDI0_TX[0]

G19

FDI0_TX[1]

E20

FDI0_TX[2]

G18

FDI0_TX[3]

B20

FDI1_TX[0]

C19

FDI1_TX[1]

D19

FDI1_TX[2]

F17

FDI1_TX[3]

J18

FDI0_FSYNC

J17

FDI1_FSYNC

H20

FDI_INT

J19

FDI0_LSYNC

H17

FDI1_LSYNC

A18

eDP_COMPIO

A17

eDP_ICOMPO

B16

eDP_HPD

C15

eDP_AUX

D15

eDP_AUX#

C17

eDP_TX[0]

F16

eDP_TX[1]

C16

eDP_TX[2]

G15

eDP_TX[3]

C18

eDP_TX#[0]

E16

eDP_TX#[1]

D16

eDP_TX#[2]

F15

eDP_TX#[3]

Ivy Bridge_rPGA_2DPC_Rev0p61

DMI

Intel(R) FDI

eDP

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]

PEG_TX#[10] PEG_TX#[11]

PCI EXPRESS* - GRAPHICS

PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

VGA(U3)

N13P-GV

N13P-GT

PEG_ICOMPO 12mil PEG_ICOMPI, PEG_RCOMPO 4mil,

J22 J21 H22

K33 M35 L34 J35 J32 H34 H31 G33 G30 F35 E34 E32 D33 D31 B33 C32

J33 L35 K34 H35 H32 G34 G31 F33 F30 E35 E33 F32 D34 E31 C33 B32

M29 M32 M31 L32 L29 K31 K28 J30 J28 H29 G27 E29 F27 D28 F26 E25

M28 M33 M30 L31 L28 K30 K27 J29 J27 H28 G28 E28 F28 D27 E26 D25

PEG_COMP

PEG_RXN0 PEG_RXN1 PEG_RXN2 PEG_RXN3 PEG_RXN4 PEG_RXN5 PEG_RXN6 PEG_RXN7 PEG_RXN8 PEG_RXN9 PEG_RXN10 PEG_RXN11 PEG_RXN12 PEG_RXN13 PEG_RXN14 PEG_RXN15

PEG_RXP0 PEG_RXP1 PEG_RXP2 PEG_RXP3 PEG_RXP4 PEG_RXP5 PEG_RXP6 PEG_RXP7 PEG_RXP8 PEG_RXP9 PEG_RXP10 PEG_RXP11 PEG_RXP12 PEG_RXP13 PEG_RXP14 PEG_RXP15

PEG_TXN0_C PEG_TXN1_C PEG_TXN1 PEG_TXN2_C PEG_TXN3_C PEG_TXN4_C PEG_TXN5_C PEG_TXN6_C PEG_TXN7_C PEG_TXN8_C PEG_TXN9_C PEG_TXN10_C PEG_TXN11_C PEG_TXN12_C PEG_TXN13_C PEG_TXN14_C PEG_TXN15_C

PEG_TXP0_C PEG_TXP1_C PEG_TXP2_C PEG_TXP3_C PEG_TXP4_C PEG_TXP5_C PEG_TXP6_C PEG_TXP7_C PEG_TXP8_C PEG_TXP9_C PEG_TXP10_C PEG_TXP11_C PEG_TXP12_C PEG_TXP13_C PEG_TXP14_C PEG_TXP15_C

C497 0.22U/16V_4C497 0.22U/16V_4 C496 0.22U/16V_4C496 0.22U/16V_4 C494 0.22U/16V_4C494 0.22U/16V_4 C490 0.22U/16V_4C490 0.22U/16V_4 C482 0.22U/16V_4C482 0.22U/16V_4 C484 0.22U/16V_4C484 0.22U/16V_4 C481 0.22U/16V_4C481 0.22U/16V_4 C474 0.22U/16V_4C474 0.22U/16V_4 C472 0.22U/16V_4C472 0.22U/16V_4 C467 0.22U/16V_4C467 0.22U/16V_4 C463 0.22U/16V_4C463 0.22U/16V_4 C461 0.22U/16V_4C461 0.22U/16V_4 C456 0.22U/16V_4C456 0.22U/16V_4 C455 0.22U/16V_4C455 0.22U/16V_4 C451 0.22U/16V_4C451 0.22U/16V_4 C452 0.22U/16V_4C452 0.22U/16V_4

C491 0.22U/16V_4C491 0.22U/16V_4 C495 0.22U/16V_4C495 0.22U/16V_4 C493 0.22U/16V_4C493 0.22U/16V_4 C489 0.22U/16V_4C489 0.22U/16V_4 C480 0.22U/16V_4C480 0.22U/16V_4 C486 0.22U/16V_4C486 0.22U/16V_4 C479 0.22U/16V_4C479 0.22U/16V_4 C471 0.22U/16V_4C471 0.22U/16V_4 C473 0.22U/16V_4C473 0.22U/16V_4 C465 0.22U/16V_4C465 0.22U/16V_4 C459 0.22U/16V_4C459 0.22U/16V_4 C460 0.22U/16V_4C460 0.22U/16V_4 C457 0.22U/16V_4C457 0.22U/16V_4 C454 0.22U/16V_4C454 0.22U/16V_4 C453 0.22U/16V_4C453 0.22U/16V_4 C450 0.22U/16V_4C450 0.22U/16V_4

PEG_RXN0 [13] PEG_RXN1 [13] PEG_RXN2 [13] PEG_RXN3 [13] PEG_RXN4 [13] PEG_RXN5 [13] PEG_RXN6 [13] PEG_RXN7 [13] PEG_RXN8 [13] PEG_RXN9 [13] PEG_RXN10 [13] PEG_RXN11 [13] PEG_RXN12 [13] PEG_RXN13 [13] PEG_RXN14 [13] PEG_RXN15 [13]

PEG_RXP0 [13] PEG_RXP1 [13] PEG_RXP2 [13] PEG_RXP3 [13] PEG_RXP4 [13] PEG_RXP5 [13] PEG_RXP6 [13] PEG_RXP7 [13] PEG_RXP8 [13] PEG_RXP9 [13] PEG_RXP10 [13] PEG_RXP11 [13] PEG_RXP12 [13] PEG_RXP13 [13] PEG_RXP14 [13] PEG_RXP15 [13]

12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12

0.22uF AC coupling Caps for PCIE GEN1/2/3 - GT

0.1uF AC coupling Caps for PCIE GEN1/2 - GV

AC coupling Cap

0.1uF

CAP CHIP 0.1U 16V(10%,X7R,0402)

0.22uF

CAP CHIP 0.22U 16V(10%,X7R,0402)

CH4103K1B08

CH4223K1B00

PEG_TXN0 PEG_TXN2

PEG_TXN3 PEG_TXN4 PEG_TXN5 PEG_TXN6 PEG_TXN7 PEG_TXN8 PEG_TXN9 PEG_TXN10 PEG_TXN11 PEG_TXN12 PEG_TXN13 PEG_TXN14

PEG_TXN15

PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3 PEG_TXP4 PEG_TXP5 PEG_TXP6 PEG_TXP7 PEG_TXP8 PEG_TXP9 PEG_TXP10 PEG_TXP11 PEG_TXP12 PEG_TXP13 PEG_TXP14 PEG_TXP15

PEG_TXN0 [13] PEG_TXN1 [13] PEG_TXN2 [13] PEG_TXN3 [13] PEG_TXN4 [13] PEG_TXN5 [13] PEG_TXN6 [13] PEG_TXN7 [13] PEG_TXN8 [13] PEG_TXN9 [13] PEG_TXN10 [13] PEG_TXN11 [13] PEG_TXN12 [13] PEG_TXN13 [13] PEG_TXN14 [13] PEG_TXN15 [13]

PEG_TXP0 [13] PEG_TXP1 [13] PEG_TXP2 [13] PEG_TXP3 [13] PEG_TXP4 [13] PEG_TXP5 [13] PEG_TXP6 [13] PEG_TXP7 [13] PEG_TXP8 [13] PEG_TXP9 [13] PEG_TXP10 [13] PEG_TXP11 [13] PEG_TXP12 [13] PEG_TXP13 [13] PEG_TXP14 [13] PEG_TXP15 [13]

TX location RX location(page13)

C452,C451,C455, C456,C461,C463, C467,C472,C450, C453,C454,C457, C460,C459,C465, C473

C125,C126,C147 C145,C123,C124 C152,C153,C121 C122,C151,C150 C119,C120,C149 C148

ALL ALL

eDP_COMP

R432 24.9/F_4R432 24.9/F_4

eDP_COMPIO and ICOMPO signals should be shorted near balls and routed within 500 mils

PEG_COMP

PEG_ICOMPI and RCOMPO signals should be routed within 500 mils

PEG_ICOMPO signals should be routed within 500 mils

1 2

+1.05V_PCH

R183 24.9/F_4R183 24.9/F_4

1 2

eDP Hot-plug (Disable)

+1.05V_PCH

R434

INT_eDP_HPD

CAD Note: Place PU resistor within 2 inches of CPU

This signal can be left as no connect if entire eDP interface is disabled.

Size Document Number Rev

Date: Sheet of

Ivy Bridge 1/5

Monday, March 05, 2012

R434

*10K_4_NC

Quanta Computer Inc.

PROJECT :

R09A

6 58

Ivy Bridge Processor (CLK,MISC,JTAG)

U29B

SNB_IVB# N.A at SNB EDS #27637 0.7v1

H_SNB_IVB#[23]

D D

IMVP7_PROCHOT#[38,53,55]

Over 130 degree C will drive low

C C

H_CPUDET#[38]

PECI_EC[38]

H_PM_SYNC[20]

H_PWRGOOD[25]

PLTRST#[13,23,38,41,57]

PECI_EC

IMVP7_PROCHOT#

PM_THRMTRIP#[25]

H_PWRGOOD

R146 1.5K/F_4R146 1.5K/F_4

H_SNB_IVB#

H_CPUDET#

TP10TP10

CATERR#

R150 43_4R150 43_4

1 2

R151 56_4R151 56_4

1 2

PM_THRMTRIP#

R13610K_4 R13610K_4

SM_DRAMPWROK

CPU_PLTRST#_RPLTRST#

R147

R147 750/F_4

750/F_4

PECI_EC_R

H_PROCHOT#

C26

PROC_SELECT#

AN34

SKTOCC#

AL33

CATERR#

AN33

PECI

AL32

PROCHOT#

AN32

THERMTRIP#

AM34

PM_SYNC

AP33

UNCOREPWRGOOD

SM_DRAMPWROK

AR33

RESET#

Ivy Bridge_rPGA_2DPC_Rev0p61

MISCTHERMALPWR MANAGEMENT

CLOCKS

DDR3

JTAG & BPM

DPLL_REF_CLK

DPLL_REF_CLK#

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

MISC

A28

BCLK

A27

BCLK#

CLK_DP_P_R

A16

CLK_DP_N_R

A15

CPU_DRAMRST#

SM_RCOMP_0

AK1

SM_RCOMP_1

SM_RCOMP_2

SM_RCOMP_0, SM_RCOMP_1 20mil / SM_RCOMP_2 15mil.

AP29

PRDY#

AP27

PREQ#

TCK TMS

TRST#

TDO

DBR#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

TDI

XDP_TCLK

AR26

XDP_TMS

AR27

XDP_TRST#H_PM_SYNC

AP30

XDP_TDI XDP_TDO

AR28

XDP_TDO

AP26

XDP_DBRST#

AL35

AT28 AR29 AR30 AT30 AP32 AR31 AT31 AR32

CLK_CPU_BCLKP CLK_CPU_BCLKN

R436 1K_4R436 1K_4

1 2

R438 1K_4R438 1K_4

1 2

R236 140/F_4R236 140/F_4

1 2

R231 25.5/F_4R231 25.5/F_4

1 2

R230 200/F_4R230 200/F_4

1 2

TP3TP3 TP5TP5 TP7TP7

TP6TP6 TP4TP4

+3.3V_RUN

1 2

R152 1K_4R152 1K_4

CLK_CPU_BCLKP [24] CLK_CPU_BCLKN [24]

+1.05V_PCH

For internal eDP (Disable)

XDP_TMS XDP_TDI

IMVP7_PROCHOT#

XDP_TCLK XDP_TRST#

+1.05V_PCH

R142 *51_4_NCR142 *51_4_NC R143 *51_4_NCR143 *51_4_NC R141 *51_4_NCR141 *51_4_NC R139 62_4R139 62_4

R129 *51_4_NCR129 *51_4_NC R144 *51_4_NCR144 *51_4_NC

1 2 1 2

12 12 12 12

Intel spec VinH min =VCCIO X 0.7

B B

Boot S3

S3 RSM

+1.5V_CPU

DRAM_PWRGD

SYS_PWROK

100 ns after +1.5V_CPU reaches 80%

Follow #DG1.5 471984 P130 DRAMRST# Routing Illustration

+1.5V_SUS

SM_DRAMPWROK

Follow #DG1.5 471984 P119

Follow #DG1.5 471984 P128 DDR Power Gating Topology

A A

PM_DRAM_PWRGD[20]

EC_PWROK[20,38]

PM_DRAM_PWRGD

+3.3V_SUS

R460

R460 200_4

200_4

2 1

U30

74AHC1G09GW

3 5

C585

0.1U/16V_4

+1.5V_CPU

R229

R229 200_4

200_4

1 2

R225 130_4R225 130_4

1 2

SM_DRAMPWROKSM_DRAMPWROK_R

DDR3_DRAMRST#[11,12]

DDR_HVREF_RST_PCH[9,24]

R464 1K_4R464 1K_4

DDR_HVREF_RST_PCH

when 1,2 is high, 4 is high-impedance OFF-state

+3.3V_SUS

1 2

R462 1K_4R462 1K_4

Size Document Number Rev

Date: Sheet of

Ivy Bridge 2/5

Friday, March 02, 2012

Q45

R463

2N7002W

1K_4

1 2

3 1

C586

0.047U/10V_4

Quanta Computer Inc.

PROJECT :

R461

4.99K/F_4

R09A

7 58

CPU_DRAMRST#DDR3_DRAMRST#_RDDR3_DRAMRST#

Ivy Bridge Processor (DDR3)

U29D

D10

K10

AM5 AM6 AR3

AP3 AN3 AN2 AN1

AP2

AP5 AN9

AT5

AT6

AP6 AN8 AR6 AR5 AR9

AJ11

AT8

AT9

AH11

AR8

AJ12

AH12

AT11 AN14 AR14

AT14

AT12 AN15 AR15

AT15

AA9 AA7

AA10

AB8 AB9

C9 A7

C8 A9 A8 D9 D8

F1 G1 G5

F2 G2

J10

K7 M5

N1 M4

N5 M2 M1

J7 J8

U29D

SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

SB_BS[0] SB_BS[1] SB_BS[2]

SB_CAS# SB_RAS# SB_WE#

M_B_CLKP0

AE2

SB_CLK[0]

SB_CLK#[0]

SB_CKE[0]

SB_CLK[1]

SB_CLK#[1]

SB_CKE[1]

SB_CLK[2]

SB_CLK#[2]

SB_CKE[2]

SB_CLK[3]

SB_CLK#[3]

SB_CKE[3]

SB_CS#[0] SB_CS#[1] SB_CS#[2] SB_CS#[3]

SB_ODT[0]

SB_ODT[1] SB_ODT[2] SB_ODT[3]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6]

DDR SYSTEM MEMORY B

SB_DQS[7]

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

AD2 R9

AE1 AD1 R10

AB2 AA2 T9

AA1 AB1 T10

AD3 AE3 AD6 AE6

AE4 AD4 AD5 AE5

D7 F3 K6 N3 AN5 AP9 AK12 AP15

C7 G3 J6 M3 AN6 AP8 AK11 AP14

AA8 T7 R7 T6 T2 T4 T3 R2 T5 R3 AB7 R1 T1 AB10 R5 R4

M_B_CLKN0 M_B_CKE0

M_B_CLKP1 M_B_CLKN1 M_B_CKE1

M_B_CS#0 M_B_CS#1

M_B_ODT0 M_B_ODT1

M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7

M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_CLKP0 [12] M_B_CLKN0 [12] M_B_CKE0 [12]

M_B_CLKP1 [12] M_B_CLKN1 [12] M_B_CKE1 [12]

M_B_CS#0 [12] M_B_CS#1 [12]

M_B_ODT0 [12] M_B_ODT1 [12]

M_B_DQSN[7..0] [12]

M_B_DQSP[7..0] [12]

M_B_A[15..0] [12]

U29C

D D

C C

B B

M_A_DQ[63..0][11]

M_A_BS0[11] M_A_BS1[11] M_A_BS2[11]

M_A_CAS#[11] M_A_RAS#[11] M_A_WE#[11]

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_BS0 M_A_BS1 M_A_BS2

M_A_CAS# M_A_RAS# M_A_WE#

G10

N10

M10

AG6 AG5 AK6 AK5 AH5 AH6

AK8 AK9

AH8 AH9 AL9

AL8 AP11 AN11

AL12 AM12 AM11

AL11 AP12 AN12

AJ14 AH14

AL15 AK15

AL14 AK14

AJ15 AH15

AE10

AF10

AE8 AD9 AF9

F10

AJ5 AJ6 AJ8

AJ9

C5 D5 D3 D2 D6 C6 C2 C3

F7 G8 G7

J1 J5 J4 J2

K2 M8

N7 M9

N9 M7

SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1] SA_BS[2]

SA_CAS# SA_RAS# SA_WE#

SA_CLK#[0]

SA_CLK#[1]

SA_CLK#[2]

SA_CLK#[3]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

DDR SYSTEM MEMORY A

SA_CLK[0]

SA_CKE[0]

SA_CLK[1]

SA_CKE[1]

SA_CLK[2]

SA_CKE[2]

SA_CLK[3]

SA_CKE[3]

SA_CS#[0] SA_CS#[1] SA_CS#[2] SA_CS#[3]

SA_ODT[0] SA_ODT[1] SA_ODT[2] SA_ODT[3]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

AB6 AA6 V9

AA5 AB5 V10

AB4 AA4 W9

AB3 AA3 W10

AK3 AL3 AG1 AH1

AH3 AG3 AG2 AH2

C4 G6 J3 M6 AL6 AM8 AR12 AM15

D4 F6 K3 N6 AL5 AM9 AR11 AM14

AD10 W1 W2 W7 V3 V2 W3 W6 V1 W5 AD8 V4 W4 AF8 V5 V7

M_A_CLKN0 M_A_CKE0

M_A_CLKP1 M_A_CLKN1 M_A_CKE1

M_A_CS#0 M_A_CS#1

M_A_ODT0 M_A_ODT1

M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7

M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_CLKP0 [11] M_A_CLKN0 [11] M_A_CKE0 [11]

M_A_CLKP1 [11] M_A_CLKN1 [11] M_A_CKE1 [11]

M_A_CS#0 [11] M_A_CS#1 [11]

M_A_ODT0 [11] M_A_ODT1 [11]

M_A_DQSN[7..0] [11]

M_A_DQSP[7..0] [11]

M_A_A[15..0] [11]

M_A_CLKP0

M_B_DQ[63..0][12]

M_B_BS0[12] M_B_BS1[12] M_B_BS2[12]

M_B_CAS#[12] M_B_RAS#[12] M_B_WE#[12]

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_BS0 M_B_BS1 M_B_BS2

M_B_CAS# M_B_RAS# M_B_WE#

Ivy Bridge_rPGA_2DPC_Rev0p61

A A

Ivy Bridge_rPGA_2DPC_Rev0p61

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Wednesday, February 08, 2012

Date: Sheet of

Wednesday, February 08, 2012

Date: Sheet of

Wednesday, February 08, 2012

PROJECT :

Ivy Bridge 3/5

R09A

8 58

10U/6.3V_6

*10U/6.3V_6_NC

10U/6.3V_6

*10U/6.3V_6_NC

CPU Core Power

IVY, SNB: 35W ~ 53A IVY, SNB: 45W ~ 94A

10F x24

C216

C210

*10U/6.3V_6_45W_NC

C523

C209

10U/6.3V_6

C524

C186

10U/6.3V_6

C528

C527

*10U/6.3V_6_45W_NC

C206

C187

10U/6.3V_6

C529

C188

*10U/6.3V_6_45W_NC

C184

C220

10U/6.3V_6

C545

C183

*10U/6.3V_6_NC

+VCC_CORE

10U/6.3V_6

*10U/6.3V_6_45W_NC

10U/6.3V_6

*10U/6.3V_6_45W_NC

10U/6.3V_6

VR_SVID_CLK

U29F

AG35

VCC1

AG34

VCC2

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

AC27

VCC39

AC26

VCC40

AA35

VCC41

AA34

VCC42

AA33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

Ivy Bridge_rPGA_2DPC_Rev0p61

VR_SVID_CLK [53]

POWER

CORE SUPPLY

SENSE LINES SVID

Place PU resistor close to CPU

+1.05V_PCH +1.05V_PCH

35W

16pcs

45W 24pcs

C224

C205

D D

*10U/6.3V_6_NC

C208

C207

10U/6.3V_6

C537

C222

*10U/6.3V_6_45W_NC

C526

C525

10U/6.3V_6

C C

C535

C556

*10U/6.3V_6_45W_NC

C555

C185

10U/6.3V_6

C225

C534

*10U/6.3V_6_45W_NC

B B

A A

Layout note: need routing together and ALERT need between CLK and DATA

VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8

VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14 VCCIO15 VCCIO16 VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21 VCCIO22 VCCIO23 VCCIO24

VCCIO25 VCCIO26 VCCIO27 VCCIO28 VCCIO29 VCCIO30

PEG AND DDR

VCCIO31 VCCIO32 VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39

VCCIO40

VIDALERT#

VIDSCLK VIDSOUT

VCC_SENSE

VSS_SENSE

VCCIO_SENSE

VSS_SENSE_VCCIO

SVID DATA SVID ALERTSVID CLK

R148 130_4

130_4

AH13 AH10 AG10 AC10 Y10 U10 P10 L10 J14 J13 J12 J11 H14 H12 H11 G14 G13 G12 F14 F13 F12 F11 E14 E12

E11 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

J23

AJ29 AJ30 AJ28

AJ35 AJ34

B10 A10

1.05V_PCH

SNB: 8.5A IVY: 8.5A

10F x12

C564

C227

H_CPU_SVIDALRT# VR_SVID_CLK VR_SVID_DATA

R155 100/FR155 100/F

R156 100/FR156 100/F

1 2

R445 10_4R445 10_4

1 2

R447 10_4R447 10_4

VR_SVID_DATA [53]

+1.05V_PCH

C228

10U/6.3V_6

C230

10U/6.3V_6

SMDDR_VREF_DQ0_M3_C

*AP2302GN_NC

SMDDR_VREF_DQ1_M3_C

*AP2302GN_NC

+VCC_CORE

VCCSENSE VSSSENSE

+1.05V_PCH

VCCIO_SENSE VSSIO_SENSE

C229

*10U/6.3V_6_NC

C231

10U/6.3V_6

C567

C566

Q43

2 2

Q44

*10U/6.3V_6_NC

10U/6.3V_6

+1.8V_RUN

CPU VCCPL

SNB: 1.2A IVY: 1.2A

10uF x 1

M3 VREF

SMDDR_VREF_DQ0_M3

DDR_HVREF_RST_PCH

SMDDR_VREF_DQ1_M3

1uF x 2

Vgs=2.5V Rds=115m

VCCSENSE [53] VSSSENSE [53]

VCCIO_SENSE [51] VSSIO_SENSE [51]

Place PU resistor close to CPU

1 2

R149 43_4R149 43_4

CPU VGT

SNB: 33A IVY: 33A 10uF x 12

+VCC_GFX_CORE

OTP/UMA

C548

*10U/6.3V_6_NC

C221

0_6

C223

0_6

CS00003J951 RESISTOR CHIP 0 1/10W+-5%(0603)

UMA/OPT

10uF

CH6101M9905 CAP CHIP 10U 6.3V(+-20%,X5R,0603)

C596

*10U/6.3V_6_NC

SMDDR_VREF_DQ0_M3 [11]

DDR_HVREF_RST_PCH [7,24]

SMDDR_VREF_DQ1_M3 [12]

R138

R138 75/F

75/FR148

VR_SVID_ALERT#H_CPU_SVIDALRT#VR_SVID_DATA

C539

C202

*10U/6.3V_6_NC

C554

C536

*10U/6.3V_6_NC

C213

C217

*10U/6.3V_6_NC

C221,C223,C2150 ohmDIS

C548,C202,C539,C530,C221, C536,C554,C219,C223,C217, C213,C215

C259

C569

10U/6.3V_6

1U/6.3V_4

VR_SVID_ALERT# [53]

Ivy Bridge Processor (GRAPHIC POWER)

POWER

1.8V RAIL

+5V_ALW

GRAPHICS

R242

R242 10K_4

10K_4

Q19A

Q19A DMN66D0LDW-7

DMN66D0LDW-7

VAXG_SENSE

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

SA_DIMM_VREFDQ

VREFMISC

SB_DIMM_VREFDQ

DDR3 -1.5V RAILS

SA RAIL

VCCSA_SENSE

VCCSA_VID[0] VCCSA_VID[1]

VCCIO_SEL

PS_S3CNTRL

C273 0.1U/16V_4C273 0.1U/16V_4

1 2

C276 0.1U/16V_4C276 0.1U/16V_4

1 2

C275 0.1U/16V_4C275 0.1U/16V_4

1 2

C274 0.1U/16V_4C274 0.1U/16V_4

1 2

SM_VREF

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15

VCCSA1 VCCSA2 VCCSA3 VCCSA4 VCCSA5 VCCSA6 VCCSA7 VCCSA8

R153 *100_4_UO_NCR153 *100_4_UO_NC

AK35 AK34

R154 *100_4_UO_NCR154 *100_4_UO_NC

+VDDR_REF_CPU

AL1

CAD Note: +VDDR_REF_CPU should have 10 mil trace width

B4 D1

R458

R458 *1K_4_NC

*1K_4_NC

1 2

AF7 AF4 AF1

C258

AC7 AC4 AC1 Y7 Y4 Y1 U7 U4

C254

U1 P7 P4 P1

M27 M26 L26 J26 J25 J24 H26 H25

1 2

R180 100_4R180 100_4

H23

VCCSA_VID0

C22

VCCSA_VID1

C24

A19

1 2

+15V_ALW

PS_S3CNTRL [11]

C530

*10U/6.3V_6_NC

C219

*10U/6.3V_6_NC

C215

0_6

C256

C256 *1U/6.3V_4_NC

*1U/6.3V_4_NC

SIO_SLP_S3#[20,38,49]

U29G

AT24

VAXG1

AT23

VAXG2

AT21

VAXG3

AT20

VAXG4

AT18

VAXG5

AT17

VAXG6

AR24

VAXG7

AR23

VAXG8

AR21

VAXG9

AR20

VAXG10

AR18

VAXG11

AR17

VAXG12

AP24

VAXG13

AP23

VAXG14

AP21

VAXG15

AP20

VAXG16

AP18

VAXG17

AP17

VAXG18

AN24

VAXG19

AN23

VAXG20

AN21

VAXG21

AN20

VAXG22

AN18

VAXG23

AN17

VAXG24

AM24

VAXG25

AM23

VAXG26

AM21

VAXG27

AM20

VAXG28

AM18

VAXG29

AM17

VAXG30

AL24

VAXG31

AL23

VAXG32

AL21

VAXG33

AL20

VAXG34

AL18

VAXG35

AL17

VAXG36

AK24

VAXG37

AK23

VAXG38

AK21

VAXG39

AK20

VAXG40

AK18

VAXG41

AK17

VAXG42

AJ24

VAXG43

AJ23

VAXG44

AJ21

VAXG45

AJ20

VAXG46

AJ18

VAXG47

AJ17

VAXG48

AH24

VAXG49

AH23

VAXG50

AH21

VAXG51

AH20

VAXG52

AH18

VAXG53

AH17

VAXG54

VCCPLL1

VCCPLL2

VCCPLL3

Ivy Bridge_rPGA_2DPC_Rev0p61

SIO_SLP_S3#

OTP/UMA : POP DIS : NC

1 2

SMDDR_VREF_DQ0_M3_C SMDDR_VREF_DQ1_M3_C

R459

R459 *1K_4_NC

*1K_4_NC

1 2

C253

10U/6.3V_6

C260

10U/6.3V_6

C214

10U/6.3V_6

VCCSA_SENSE

R429*0_4_NC R429*0_4_NC

VCCSA_VID0 VCCSA_VID1

R241

R241 100K_4

100K_4

PS_S3CNTRL_S

Q19B

Q19B DMN66D0LDW-7

DMN66D0LDW-7

+1.5V_CPU+1.5V_SUS

Size Document Number Rev

Date: Sheet of

+VCC_GFX_CORE

VCC_AXG_SENSE [53] VSS_AXG_SENSE [53]

For internal GFX

+VDDR_REF_CPU

CPU MCH

SNB: 5A IVY: 5A 10uF x 6

C262

C257

10U/6.3V_6

CPU SA

SNB: 6A IVY: 6A

C522

10U/6.3V_6

+VCCSA_CORE

VCCSA_SENSE [52]

VCCSA_VID0 [52] VCCSA_VID1 [52]

H_VTTVID1

1 2

R179 1K_4R179 1K_4

1 2

R176 1K_4R176 1K_4

S3 Power reduce

+1.5V_SUS +1.5V_CPU

Q20

EC101

EC101 2200P/50V_4

2200P/50V_4

Take care Q20 Vgs(MAX)=2.5

Q20 AON7410

AON7410

8 762

C272

*4700P/25V_4_NC

+VDDR_REF_CPU

+1.5V_CPU

R228

R228 1K/F_4

1K/F_4

1 2

R235

R235 1K/F_4

1K/F_4

1 2

Ivy Bridge 4/5

Monday, March 05, 2012

+1.5V_CPU

10U/6.3V_6

10uF x 3

+VCCSA_CORE

C203

1U/25V_6

item18

+3.3V_RUN

R428

R428 10K_4

10K_4

R34 and R36 pull-down 1K Spec:This will ensure the VID is 00 prior to VCCIO stability.

3 1

0.1U/16V_4

0.1U/16V_4 C263

C263

Quanta Computer Inc.

PROJECT :

R09A

H_VTTVID1 [51]

9 58

Ivy Bridge Processor (GND) Ivy Bridge Processor (RESERVED, CFG)

U29I

U29H

AT35

VSS1

AT32

VSS2

AT29

VSS3

AT27

VSS4

AT25

VSS5

AT22

VSS6

AT19

VSS7

AT16

VSS8

D D

C C

B B

A A

AT13

VSS9

AT10

VSS10

AT7

VSS11

AT4

VSS12

AT3

VSS13

AR25

VSS14

AR22

VSS15

AR19

VSS16

AR16

VSS17

AR13

VSS18

AR10

VSS19

AR7

VSS20

AR4

VSS21

AR2

VSS22

AP34

VSS23

AP31

VSS24

AP28

VSS25

AP25

VSS26

AP22

VSS27

AP19

VSS28

AP16

VSS29

AP13

VSS30

AP10

VSS31

AP7

VSS32

AP4

VSS33

AP1

VSS34

AN30

VSS35

AN27

VSS36

AN25

VSS37

AN22

VSS38

AN19

VSS39

AN16

VSS40

AN13

VSS41

AN10

VSS42

AN7

VSS43

AN4

VSS44

AM29

VSS45

AM25

VSS46

AM22

VSS47

AM19

VSS48

AM16

VSS49

AM13

VSS50

AM10

VSS51

AM7

VSS52

AM4

VSS53

AM3

VSS54

AM2

VSS55

AM1

VSS56

AL34

VSS57

AL31

VSS58

AL28

VSS59

AL25

VSS60

AL22

VSS61

AL19

VSS62

AL16

VSS63

AL13

VSS64

AL10

VSS65

AL7

VSS66

AL4

VSS67

AL2

VSS68

AK33

VSS69

AK30

VSS70

AK27

VSS71

AK25

VSS72

AK22

VSS73

AK19

VSS74

AK16

VSS75

AK13

VSS76

AK10

VSS77

AK7

VSS78

AK4

VSS79

AJ25

VSS80

Ivy Bridge_rPGA_2DPC_Rev0p61

VSS

VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

AJ22 AJ19 AJ16 AJ13 AJ10 AJ7 AJ4 AJ3 AJ2 AJ1 AH35 AH34 AH32 AH30 AH29 AH28 AH25 AH22 AH19 AH16 AH7 AH4 AG9 AG8 AG4 AF6 AF5 AF3 AF2 AE35 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2

U29I

T35

VSS161

T34

VSS162

T33

VSS163

T32

VSS164

T31

VSS165

T30

VSS166

T29

VSS167

T28

VSS168

T27

VSS169

T26

VSS170

VSS171

VSS172

VSS173

VSS174

VSS175

VSS176

N35

VSS177

N34

VSS178

N33

VSS179

N32

VSS180

N31

VSS181

N30

VSS182

N29

VSS183

N28

VSS184

N27

VSS185

N26

VSS186

M34

VSS187

L33

VSS188

L30

VSS189

L27

VSS190

VSS191

VSS192

VSS193

VSS194

VSS195

VSS196

VSS197

VSS198

K35

VSS199

K32

VSS200

K29

VSS201

K26

VSS202

J34

VSS203

J31

VSS204

H33

VSS205

H30

VSS206

H27

VSS207

H24

VSS208

H21

VSS209

H18

VSS210

H15

VSS211

H13

VSS212

H10

VSS213

VSS214

VSS215

VSS216

VSS217

VSS218

VSS219

VSS220

VSS221

VSS222

G35

VSS223

G32

VSS224

G29

VSS225

G26

VSS226

G23

VSS227

G20

VSS228

G17

VSS229

G11

VSS230

F34

VSS231

F31

VSS232

F29

VSS233

Ivy Bridge_rPGA_2DPC_Rev0p61

VSS

Processor Strapping

CFG2 (PCI-E Static x16 Lane Reversal)

CFG4 (DP Presence Strap)

F22

VSS234

F19

VSS235

E30

VSS236

E27

VSS237

E24

VSS238

E21

VSS239

E18

VSS240

E15

VSS241

E13

VSS242

E10

VSS243

VSS244

VSS245

VSS246

VSS247

VSS248

VSS249

VSS250

VSS251

VSS252

D35

VSS253

D32

VSS254

D29

VSS255

D26

VSS256

D20

VSS257

D17

VSS258

C34

VSS259

C31

VSS260

C28

VSS261

C27

VSS262

C25

VSS263

C23

VSS264

C10

VSS265

VSS266

B22

VSS267

B19

VSS268

B17

VSS269

B15

VSS270

B13

VSS271

B11

VSS272

VSS273

VSS274

VSS275

VSS276

VSS277

VSS278

A35

VSS279

A32

VSS280

A29

VSS281

A26

VSS282

A23

VSS283

A20

VSS284

VSS285

GV - R470 POP GT, UMA - ALL NC

The CFG signals have a default value of '1' if not terminated on the board.

1 0

Normal Operation

Disable; No physical DP attached to eDP

TP17TP17 TP20TP20

CFG2

TP16TP16 TP18TP18

CFG5 CFG6

TP8TP8

TP9TP9

R470 *1K_4_GV_NCR470 *1K_4_GV_NC R471 *1K_4_NCR471 *1K_4_NC

12 12

Lane Reversed

CFG2

R145 1K_4R145 1K_4

Enable; An ext DP device is connected to eDP

U29E

AK28

CFG[0]

AK29

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD5

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

J15

RSVD27

Ivy Bridge_rPGA_2DPC_Rev0p61

CFG[6:5] (PCIE Port Bifurcation Straps)

CFG5

11: (Default) 1x16 PCI Express*

CFG6

10: 2x8 PCI Express* 01: Reserved 00: 1x8, 2x4 PCI Express*

CFG

RSVD28 RSVD29 RSVD30 RSVD31

RSVD32

RSVD33 RSVD34 RSVD35

RSVD37 RSVD38 RSVD39 RSVD40

RSVD41 RSVD42 RSVD43 RSVD44 RSVD45

RSVD46 RSVD47 RSVD48 RSVD49 RSVD50

RSVD51 RSVD52

AH27 AH26

L7 AG7 AE7 AK2

AT26 AM33 AJ27

T8 J16 H16 G16

AR35 AT34 AT33 AP35 AR34

B34 A33 A34 B35 C35

AJ32 AK32

RESERVED

VCC_DIE_SENSE

VSS_DIE_SENSE

#27636 SNB EDS0.7v1 no function.

AN35

BCLK_ITP

AM35

BCLK_ITP#

AT2

RSVD56

AT1

RSVD57

AR1

RSVD58

KEY

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Saturday, March 03, 2012

Date: Sheet of

Saturday, March 03, 2012

Date: Sheet of

Saturday, March 03, 2012

PROJECT :

Ivy Bridge 5/5

R09A

10 58

M_A_A[15..0][8]

A A

M_A_BS0[8] M_A_BS1[8] M_A_BS2[8] M_A_CS#0[8] M_A_CS#1[8] M_A_CLKP0[8] M_A_CLKN0[8] M_A_CLKP1[8] M_A_CLKN1[8] M_A_CKE0[8] M_A_CKE1[8] M_A_CAS#[8]

RP21 10KX2RP21 10KX2

1 3

B B

C C

+1.5V_SUS

C313

0.1U/16V_4

M_A_RAS#[8] M_A_WE#[8]

2 4

WLAN_SCLK[12,24,33] WLAN_SDATA[12,24,33]

M_A_ODT0[8] M_A_ODT1[8]

M_A_DQSP[7..0][8]

M_A_DQSN[7..0][8]

Place these Caps near So-Dimm0.

C290

C339

0.1U/16V_4

C341

C289

10U/6.3V_8

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_BS0 M_A_BS1 M_A_BS2 M_A_CS#0 M_A_CS#1 M_A_CLKP0 M_A_CLKN0 M_A_CLKP1 M_A_CLKN1 M_A_CKE0 M_A_CKE1 M_A_CAS# M_A_RAS#

M_A_WE# DIMM0_SA0 DIMM0_SA1 WLAN_SCLK WLAN_SDATA

M_A_ODT0 M_A_ODT1

M_A_DQSP0

M_A_DQSP1

M_A_DQSP2

M_A_DQSP3

M_A_DQSP4

M_A_DQSP5

M_A_DQSP6

M_A_DQSP7

M_A_DQSN0

M_A_DQSN1

M_A_DQSN2

M_A_DQSN3

M_A_DQSN4

M_A_DQSN5

M_A_DQSN6

M_A_DQSN7

C317

10U/6.3V_8

SMDDR_VREF_DQ0_M3[9]

98 97 96 95 92 91 90 86 89 85

107

84 83

119

80 78

109 108

79 114 121 101 103 102 104

74 115 110 113 197 201 202 200

116 120

63 136 153 170 187

64 137 154 171 188

62 135 152 169 186

C318

10U/6.3V_8

JDIM1A

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15

BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA

ODT0 ODT1

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

PC2100 DDR3 SDRAM SO-DIMM

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

DDRRK-20401-TP9D

+0.75V_DDR_VTT

C295

C295 1U/6.3V_4

1U/6.3V_4

SMDDR_VREF_DQ0_M3

M3 VREF

M_A_DQ5

DQ0

M_A_DQ4

DQ1

M_A_DQ7

DQ2

M_A_DQ6

DQ3

M_A_DQ1

DQ4

M_A_DQ0

DQ5

M_A_DQ3

DQ6

M_A_DQ2

DQ7

M_A_DQ8

DQ8

M_A_DQ9

DQ9

M_A_DQ15

DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46

(204P)

DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

M_A_DQ10 M_A_DQ13 M_A_DQ12 M_A_DQ11 M_A_DQ14 M_A_DQ20 M_A_DQ21 M_A_DQ18 M_A_DQ19 M_A_DQ16 M_A_DQ17 M_A_DQ23 M_A_DQ22 M_A_DQ29 M_A_DQ25 M_A_DQ27 M_A_DQ31 M_A_DQ28 M_A_DQ24 M_A_DQ26 M_A_DQ30 M_A_DQ36 M_A_DQ37 M_A_DQ34 M_A_DQ39 M_A_DQ32 M_A_DQ33 M_A_DQ38 M_A_DQ35 M_A_DQ45 M_A_DQ44 M_A_DQ42 M_A_DQ43 M_A_DQ41 M_A_DQ40 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ54 M_A_DQ55 M_A_DQ53 M_A_DQ52 M_A_DQ51 M_A_DQ50 M_A_DQ61 M_A_DQ60 M_A_DQ62 M_A_DQ63 M_A_DQ56 M_A_DQ57 M_A_DQ59 M_A_DQ58

M_A_DQ[63..0] [8]

H=9.2mm,RVS

S3 Power reduce

+0.75V_DDR_VTT

R250

R250 22_4

22_4

1 2

Q22

PS_S3CNTRL

2N7002W

*2.2U/6.3V_6_NC

PS_S3CNTRL [9]

C602

+3.3V_RUN

DDR3_DRAMRST#[7,12]

+SMDDR_VREF_DQ0

+SMDDR_VREF_DIMM0

+1.5V_SUS

+3.3V_RUN

C322

0.1U/16V_4

R246 *10K_4_NCR246 *10K_4_NC

1 2

DDR3_DRAMRST#

JDIM1B

VDD1

VDD2

VDD3

VDD4

VDD5

VDD6

VDD7

VDD8

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

NC1

122

NC2

125

NCTEST

198

EVENT#

RESET#

VREF_DQ

126

VREF_CA

VSS1

VSS2

VSS3

VSS4

VSS5

VSS6

VSS7

VSS8

VSS9

VSS10

VSS11

VSS12

VSS13

VSS14

VSS15

DDRRK-20401-TP9D

PC2100 DDR3 SDRAM SO-DIMM

(204P)

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

VTT1 VTT2

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205

206

207

208

+0.75V_DDR_VTT

M1 VREF

C304

1U/6.3V_4

+1.5V_SUS

1 2

R248

R248 1K/F_4

1K/F_4

R247

R247 1K/F_4

1K/F_4

+SMDDR_VREF_DIMM0

C288

0.1U/16V_4

C287

1U/6.3V_4

C332

C332 1U/6.3V_4

1U/6.3V_4

C597

C597 *1U/6.3V_4_NC

*1U/6.3V_4_NC

R255 *0_4_NCR255 *0_4_NC

1 2

C598

C598 *1U/6.3V_4_NC

*1U/6.3V_4_NC

+1.5V_SUS

1 2

+SMDDR_VREF_DQ0

R256

R256 1K/F_4

1K/F_4

R253

R253 1K/F_4

1K/F_4

C301

0.1U/16V_4

D D

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Wednesday, February 08, 2012

Date: Sheet of

Wednesday, February 08, 2012

Date: Sheet of

Wednesday, February 08, 2012

PROJECT :

DDR3 DIMM-0

R09A

11 58

JDIM2A

M_B_A[15..0][8]

A A

M_B_BS0[8] M_B_BS1[8] M_B_BS2[8] M_B_CS#0[8] M_B_CS#1[8] M_B_CLKP0[8] M_B_CLKN0[8] M_B_CLKP1[8] M_B_CLKN1[8] M_B_CKE0[8] M_B_CKE1[8] M_B_CAS#[8]

RP22 10KX2RP22 10KX2

+3.3V_RUN

B B

C C

+1.5V_SUS

C343

0.1U/16V_4

M_B_RAS#[8] M_B_WE#[8]

WLAN_SCLK[11,24,33] WLAN_SDATA[11,24,33]

M_B_ODT0[8] M_B_ODT1[8]

M_B_DQSP[7..0][8]

M_B_DQSN[7..0][8]

Place these Caps near So-Dimm1.

0.1U/16V_4

C323

C344

0.1U/16V_4

C338

0.1U/16V_4

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_BS0 M_B_BS1 M_B_BS2 M_B_CS#0 M_B_CS#1 M_B_CLKP0 M_B_CLKN0 M_B_CLKP1 M_B_CLKN1 M_B_CKE0 M_B_CKE1 M_B_CAS# M_B_RAS# M_B_WE# DIMM1_SA0

DIMM1_SA1 WLAN_SCLK WLAN_SDATA

M_B_ODT0 M_B_ODT1

M_B_DQSP0

M_B_DQSP1

M_B_DQSP2

M_B_DQSP3

M_B_DQSP4

M_B_DQSP5

M_B_DQSP6

M_B_DQSP7

M_B_DQSN0

M_B_DQSN1

M_B_DQSN2

M_B_DQSN3

M_B_DQSN4

M_B_DQSN5

M_B_DQSN6

M_B_DQSN7

C340

10U/6.3V_8

98 97 96 95 92 91 90 86 89 85

107

84 83

119

80 78

109 108

79 114 121 101 103 102 104

74 115 110 113 197 201 202 200

116 120

63 136 153 170 187

64 137 154 171 188

62 135 152 169 186

C319

10U/6.3V_8

JDIM2A

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15

BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA

ODT0 ODT1

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

PC2100 DDR3 SDRAM SO-DIMM

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

DDRRK-20401-TP5B

+0.75V_DDR_VTT

C342

10U/6.3V_8

SMDDR_VREF_DQ1_M3[9]

(204P)

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

C312

C312 1U/6.3V_4

1U/6.3V_4

5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

M_B_DQ5 M_B_DQ4 M_B_DQ3 M_B_DQ2 M_B_DQ0 M_B_DQ1 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ14 M_B_DQ10 M_B_DQ12 M_B_DQ13 M_B_DQ11 M_B_DQ15 M_B_DQ21 M_B_DQ17 M_B_DQ19 M_B_DQ23 M_B_DQ16 M_B_DQ20 M_B_DQ18 M_B_DQ22 M_B_DQ28 M_B_DQ24 M_B_DQ30 M_B_DQ31 M_B_DQ25 M_B_DQ29 M_B_DQ27 M_B_DQ26 M_B_DQ36 M_B_DQ37 M_B_DQ35 M_B_DQ34 M_B_DQ32 M_B_DQ33 M_B_DQ39 M_B_DQ38 M_B_DQ44 M_B_DQ40 M_B_DQ42 M_B_DQ43 M_B_DQ45 M_B_DQ41 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ54 M_B_DQ55 M_B_DQ52 M_B_DQ53 M_B_DQ51 M_B_DQ50 M_B_DQ61 M_B_DQ60 M_B_DQ63 M_B_DQ62 M_B_DQ57 M_B_DQ56 M_B_DQ59 M_B_DQ58

C345

C345 1U/6.3V_4

1U/6.3V_4

SMDDR_VREF_DQ1_M3

M3 REF

M_B_DQ[63..0] [8]

C599

C599 *1U/6.3V_4_NC

*1U/6.3V_4_NC

H=5.2mm,RVS

C600

C600 *1U/6.3V_4_NC

*1U/6.3V_4_NC

R259 *0_4_NCR259 *0_4_NC

1 2

R257

R257 1K/F_4

1K/F_4

R262

R262 1K/F_4

1K/F_4

C601

*2.2U/6.3V_6_NC

+3.3V_RUN

DDR3_DRAMRST#[7,11]

M1 VREF

C324

0.1U/16V_4

+3.3V_RUN

C337

0.1U/16V_4

R258 *10K_4_NCR258 *10K_4_NC

+SMDDR_VREF_DQ1

+SMDDR_VREF_DIMM1

+1.5V_SUS +SMDDR_VREF_DIMM1+1.5V_SUS +SMDDR_VREF_DQ1

R260

R260 1K/F_4

1K/F_4

1 2

C325

1U/6.3V_4

1 2

R261

R261 1K/F_4

1K/F_4

1 2

DDR3_DRAMRST#

C327

0.1U/16V_4

+1.5V_SUS

C328

1U/6.3V_4

JDIM2B

VDD1

VDD2

VDD3

VDD4

VDD5

VDD6

VDD7

VDD8

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

NC1

122

NC2

125

NCTEST

198

EVENT#

RESET#

VREF_DQ

126

VREF_CA

VSS1

VSS2

VSS3

VSS4

VSS5

VSS6

VSS7

VSS8

VSS9

VSS10

VSS11

VSS12

VSS13

VSS14

VSS15

DDRRK-20401-TP5B

PC2100 DDR3 SDRAM SO-DIMM

(204P)

VTT1 VTT2

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205

206

207

208

+0.75V_DDR_VTT

D D

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Wednesday, February 08, 2012

Date: Sheet of

Wednesday, February 08, 2012

Date: Sheet of

Wednesday, February 08, 2012

PROJECT :

DDR3 DIMM-1

R09A

12 58

U24A

U24A N13P-GT-A2

PEX_IOVDD/Q <3.3A

+1.05V_GFX

A A

+1.05V_GFX

B B

+3.3V_GFX

12~16 mils width

C C

+3.3V_GFX

C89 0.1U/16V_4C89 0.1U/16V_4 C45 1U/6.3V_4C45 1U/6.3V_4 C70 10U/6.3V_6C70 10U/6.3V_6 C104 10U/6.3V_6C104 10U/6.3V_6

C46 0.047U/10V_4C46 0.047U/10V_4 C61 0.1U/16V_4C61 0.1U/16V_4 C53 1U/6.3V_4C53 1U/6.3V_4 C75 1U/6.3V_4C75 1U/6.3V_4 C77 10U/6.3V_6C77 10U/6.3V_6 C65 10U/6.3V_6C65 10U/6.3V_6 C476 0.1U/16V_4C476 0.1U/16V_4

C5 0.1U/16V_4C5 0.1U/16V_4 C28 0.1U/16V_4C28 0.1U/16V_4

+VCC_DGFX_CORE

VDD_SENSE[56] GND_SENSE[56]

C85 0.1U/16V_4C85 0.1U/16V_4 C98 1U/6.3V_4C98 1U/6.3V_4 C102 1U/25V_6C102 1U/25V_6

C36 0.1U/16V_4C36 0.1U/16V_4 C6 1U/25V_6C6 1U/25V_6

12 12 12 12

12 12 12 12 12 12

1 2

C35 1U/25V_6C35 1U/25V_6 C19 1U/6.3V_4C19 1U/6.3V_4

12 12

VDD_SENSE GND_SENSE

BLM18AG121SN1D

12 12 12

12 12

R41 100_4R41 100_4

R40 100_4R40 100_4

+1.05V_GFX

150mA

+PEX_PLLVDD

12~16 mils width210mA

+3.3V_GFX

C413 *0.1U/16V_4_NCC413 *0.1U/16V_4_NC

1 2

GPU_RST#

D D

R351 0_4_DISR351 0_4_DIS

1 2

R395 *0_4_OPT_NCR395 *0_4_OPT_NC

1 2

2 1

3 5

U21

U21 *TC7SH08FU_NC

*TC7SH08FU_NC

N13P-GT-A2

AG19

PEX_IOVDD_1

AG21

PEX_IOVDD_2

AG22

PEX_IOVDD_3

AG24

PEX_IOVDD_4

AH21

PEX_IOVDD_5

AH25

PEX_IOVDD_6

AG13

PEX_IOVDDQ_1

AG15

PEX_IOVDDQ_2

AG16

PEX_IOVDDQ_3

AG18

PEX_IOVDDQ_4

AG25

PEX_IOVDDQ_5

AH15

PEX_IOVDDQ_6

AH18

PEX_IOVDDQ_7

AH26

PEX_IOVDDQ_8

AH27

PEX_IOVDDQ_9

AJ27

PEX_IOVDDQ_10

AK27

PEX_IOVDDQ_11

AL27

PEX_IOVDDQ_12

AM28

PEX_IOVDDQ_13

AN28

PEX_IOVDDQ_14

GB4-128

PCI EXPRESS

VDD33_1

VDD33_2

VDD33_3

VDD33_4

VDD_SENSE

GND_SENSE

AG26

PEX_PLLVDD

3V3AUX_NC

AG12

PEX_SVDD_3V3

AH12

PEX_PLL_HVDD

AJ11

PEX_WAKE#

PCI EXPRESS

PLTRST# [7,23,38,41,57] DGPU_HOLD_RST# [23]

PEX_RX0

PEX_RX0*

PEX_RX1

PEX_RX1*

PEX_RX2

PEX_RX2*

PEX_RX3

PEX_RX3*

PEX_RX4

PEX_RX4*

PEX_RX5

PEX_RX5*

PEX_RX6

PEX_RX6*

PEX_RX7

PEX_RX7*

PEX_RX8

PEX_RX8*

PEX_RX9 PEX_RX9* PEX_RX10

PEX_RX10*

PEX_RX11

PEX_RX11*

PEX_RX12

PEX_RX12*

PEX_RX13

PEX_RX13*

PEX_RX14

PEX_RX14*

PEX_RX15

PEX_RX15*

PEX_TX0

PEX_TX0*

PEX_TX1

PEX_TX1*

PEX_TX2

PEX_TX2*

PEX_TX3

PEX_TX3*

PEX_TX4

PEX_TX4*

PEX_TX5

PEX_TX5*

PEX_TX6

PEX_TX6*

PEX_TX7

PEX_TX7*

PEX_TX8

PEX_TX8*

PEX_TX9

PEX_TX9*

PEX_TX10

PEX_TX10*

PEX_TX11

PEX_TX11*

PEX_TX12

PEX_TX12*

PEX_TX13

PEX_TX13*

PEX_TX14

PEX_TX14*

PEX_TX15

PEX_TX15*

PEX_REFCLK

PEX_REFCLK*

PEX_TSTCLK_OUT

PEX_TSTCLK_OUT*

PEX_RST*

PEX_CLKREQ*

PEX_TERMP

TESTMODE

DIS

OPT

AN12 AM12 AN14 AM14 AP14 AP15 AN15 AM15 AN17 AM17 AP17 AP18 AN18 AM18 AN20 AM20 AP20 AP21 AN21 AM21 AN23 AM23 AP23 AP24 AN24 AM24 AN26 AM26 AP26 AP27 AN27 AM27

AK14 AJ14 AH14 AG14 AK15 AJ15 AL16 AK16 AK17 AJ17 AH17 AG17 AK18 AJ18 AL19 AK19 AK20 AJ20 AH20 AG20 AK21 AJ21 AL22 AK22 AK23 AJ23 AH23 AG23 AK24 AJ24 AL25 AK25

AL13 AK13

AJ26 AK26

AJ12 AK12 AP29 AK11

PEG_TXP15 PEG_TXN15 PEG_TXP14 PEG_TXN14 PEG_TXP13 PEG_TXN13 PEG_TXP12 PEG_TXN12 PEG_TXP11 PEG_TXN11 PEG_TXP10 PEG_TXN10 PEG_TXP9 PEG_TXN9 PEG_TXP8 PEG_TXN8 PEG_TXP7 PEG_TXN7 PEG_TXP6 PEG_TXN6 PEG_TXP5 PEG_TXN5 PEG_TXP4 PEG_TXN4 PEG_TXP3 PEG_TXN3 PEG_TXP2 PEG_TXN2 PEG_TXP1 PEG_TXN1 PEG_TXP0 PEG_TXN0

PEG_RXP15_C PEG_RXN15_C PEG_RXP14_C PEG_RXN14_C PEG_RXP13_C PEG_RXN13_C PEG_RXP12_C PEG_RXN12_C PEG_RXP11_C PEG_RXN11_C PEG_RXP10_C PEG_RXN10_C PEG_RXP9_C PEG_RXN9_C PEG_RXP8_C PEG_RXN8_C PEG_RXP7_C PEG_RXN7_C PEG_RXP6_C PEG_RXN6_C PEG_RXP5_C PEG_RXN5_C PEG_RXP4_C PEG_RXN4_C PEG_RXP3_C PEG_RXN3_C PEG_RXP2_C PEG_RXN2_C PEG_RXP1_C PEG_RXN1_C PEG_RXP0_C PEG_RXN0_C

CLK_PCIE_VGAP CLK_PCIE_VGAN

PEX_TSTCLK PEX_TSTCLK#

GPU_RST# PEX_CLKREQ# PEX_TERMP TESTMODE

PEG_TXP15 [6] PEG_TXN15 [6] PEG_TXP14 [6] PEG_TXN14 [6] PEG_TXP13 [6] PEG_TXN13 [6] PEG_TXP12 [6] PEG_TXN12 [6] PEG_TXP11 [6] PEG_TXN11 [6] PEG_TXP10 [6] PEG_TXN10 [6] PEG_TXP9 [6] PEG_TXN9 [6] PEG_TXP8 [6] PEG_TXN8 [6] PEG_TXP7 [6] PEG_TXN7 [6] PEG_TXP6 [6] PEG_TXN6 [6] PEG_TXP5 [6] PEG_TXN5 [6] PEG_TXP4 [6] PEG_TXN4 [6] PEG_TXP3 [6] PEG_TXN3 [6] PEG_TXP2 [6] PEG_TXN2 [6] PEG_TXP1 [6] PEG_TXN1 [6] PEG_TXP0 [6] PEG_TXN0 [6]

C125 0.22U/16VC125 0.22U/16V

1 2

C126 0.22U/16VC126 0.22U/16V

1 2

C147 0.22U/16VC147 0.22U/16V

1 2

C145 0.22U/16VC145 0.22U/16V

1 2

C123 0.22U/16VC123 0.22U/16V

1 2

C124 0.22U/16VC124 0.22U/16V

1 2

C152 0.22U/16VC152 0.22U/16V

1 2

C153 0.22U/16VC153 0.22U/16V

1 2

C121 0.22U/16VC121 0.22U/16V

1 2

C122 0.22U/16VC122 0.22U/16V

1 2

C151 0.22U/16VC151 0.22U/16V

1 2

C150 0.22U/16VC150 0.22U/16V

1 2

C119 0.22U/16VC119 0.22U/16V

1 2

C120 0.22U/16VC120 0.22U/16V

1 2

C149 0.22U/16VC149 0.22U/16V

1 2

C148 0.22U/16VC148 0.22U/16V

1 2

C128 0.22U/16VC128 0.22U/16V

1 2

C127 0.22U/16VC127 0.22U/16V

1 2

C161 0.22U/16VC161 0.22U/16V

1 2

C160 0.22U/16VC160 0.22U/16V

1 2

C129 0.22U/16VC129 0.22U/16V

1 2

C130 0.22U/16VC130 0.22U/16V

1 2

C158 0.22U/16VC158 0.22U/16V

1 2

C159 0.22U/16VC159 0.22U/16V

1 2

C157 0.22U/16VC157 0.22U/16V

1 2

C156 0.22U/16VC156 0.22U/16V

1 2

C134 0.22U/16VC134 0.22U/16V

1 2

C133 0.22U/16VC133 0.22U/16V

1 2

C155 0.22U/16VC155 0.22U/16V

1 2

C154 0.22U/16VC154 0.22U/16V

1 2

C131 0.22U/16VC131 0.22U/16V

1 2

C132 0.22U/16VC132 0.22U/16V

1 2

R64 *200_4_NCR64 *200_4_NC

R63 *10K_4_NCR63 *10K_4_NC R80 2.49K/F_4R80 2.49K/F_4

1 2

R46 10K_4R46 10K_4

1 2

PEX_CLKREQ#

+1.05V_GFX

CLK_PCIE_VGAP [24] CLK_PCIE_VGAN [24]

PDTC143TT Hfe=200, Vce(sat)=0.1V, Vbe(sat)=0.7V, Rb=4.7K Ib=(1.05-0.7)/4.7K=74.46uA, Ic=(3.3-0.1)/220=9.69mA Hfe*Ib > Ic, Saturation

+3.3V_GFX

Q3 *2N7002W _NC

*2N7002W _NC

R61 0_4R61 0_4

GPU all PWROK

+3.3V_GFX

*PDTC143TT_NC

PEG_RXP15 PEG_RXN15 PEG_RXP14 PEG_RXN14 PEG_RXP13 PEG_RXN13 PEG_RXP12 PEG_RXN12 PEG_RXP11 PEG_RXN11 PEG_RXP10 PEG_RXN10 PEG_RXP9 PEG_RXN9 PEG_RXP8 PEG_RXN8 PEG_RXP7 PEG_RXN7 PEG_RXP6 PEG_RXN6 PEG_RXP5 PEG_RXN5 PEG_RXP4 PEG_RXN4 PEG_RXP3 PEG_RXN3 PEG_RXP2 PEG_RXN2 PEG_RXP1 PEG_RXN1 PEG_RXP0 PEG_RXN0

+3.3V_RUN

R13

R13 *330_4_NC

*330_4_NC

1 2

1 3

PEG_RXP15 [6] PEG_RXN15 [6] PEG_RXP14 [6] PEG_RXN14 [6] PEG_RXP13 [6] PEG_RXN13 [6] PEG_RXP12 [6] PEG_RXN12 [6] PEG_RXP11 [6] PEG_RXN11 [6] PEG_RXP10 [6] PEG_RXN10 [6] PEG_RXP9 [6] PEG_RXN9 [6] PEG_RXP8 [6] PEG_RXN8 [6] PEG_RXP7 [6] PEG_RXN7 [6] PEG_RXP6 [6] PEG_RXN6 [6] PEG_RXP5 [6] PEG_RXN5 [6] PEG_RXP4 [6] PEG_RXN4 [6] PEG_RXP3 [6] PEG_RXN3 [6] PEG_RXP2 [6] PEG_RXN2 [6] PEG_RXP1 [6] PEG_RXN1 [6] PEG_RXP0 [6] PEG_RXN0 [6]

R25

R25 *10K_4_NC

*10K_4_NC

1 2

C2 *4700P/25V_4_NC

*4700P/25V_4_NC

0.22uF AC coupling Caps for PCIE GEN1/2/3

0.1uF AC coupling Caps for PCIE GEN1/2

PEG_A_CLKRQ# [24]

DGPU_PW ROK [25]

Q1 *2N7002W _NC

*2N7002W _NC

Power up sequence

VDD33 +3.3V_GFX

IFP(AB)_IOVDD +1.8V_GFX

NVVDD +VCC_DGFX_CORE

FBVDDQ +1.5V_GFX

PEX_VDD +1.05V_GFX

IFP(CDEF)_IOVDD +1.05V_GFX

NVVDD Maximum Settling Time

NVVDD

GPIO

I/O 3.3V

PEX_RST

Trise >= 1uS Tfail <=500nS

Size Document Number Rev

Date: Sheet of

Monday, March 05, 2012

Date: Sheet of

Monday, March 05, 2012

Date: Sheet of

Monday, March 05, 2012

t>=0

t>0

tsNVVDD<100us

PEX_RST timing

Quanta Computer Inc.

PROJECT :

N13P-GS (PCIE I/F) 1/5

R09A

13 58

t>=0

U24B

U24B N13P-GT-A2

N13P-GT-A2

VMA_CMD0[18] VMA_CMD1[18] VMA_CMD2[18] VMA_CMD3[18] VMA_CMD4[18] VMA_CMD5[18] VMA_CMD6[18] VMA_CMD7[18] VMA_CMD8[18]

A A

VMA_CMD9[18] VMA_CMD10[18] VMA_CMD11[18] VMA_CMD12[18] VMA_CMD13[18] VMA_CMD14[18] VMA_CMD15[18] VMA_CMD16[18] VMA_CMD17[18] VMA_CMD18[18] VMA_CMD19[18] VMA_CMD20[18] VMA_CMD21[18] VMA_CMD22[18] VMA_CMD23[18] VMA_CMD24[18] VMA_CMD25[18] VMA_CMD26[18] VMA_CMD27[18] VMA_CMD28[18] VMA_CMD29[18] VMA_CMD30[18] VMA_CMD31[18]

DBI

B B

EDC

VMA_WDQS0 VMA_WDQS1 VMA_WDQS2 VMA_WDQS3 VMA_WDQS4 VMA_WDQS5 VMA_WDQS6 VMA_WDQS7

VMA_DM0 VMA_DM1 VMA_DM2 VMA_DM3 VMA_DM4 VMA_DM5 VMA_DM6 VMA_DM7

GDDR5 NO USE

VMA_WCK01[18] VMA_WCK01#[18] VMA_WCK23[18] VMA_WCK23#[18] VMA_WCK45[18] VMA_WCK45#[18] VMA_WCK67[18]

C C

VMA_WCK67#[18]

+1.5V_GFX

D D

U30 U29

R34 R33 U32 U33 U28 V28 V29 V30 U34 U31 V34 V33

Y32 AA31 AA29 AA28 AC34 AC33 AA32 AA33

Y28

Y29

W31

Y30 AA34

Y31

Y34

Y33

V31

P30

M32 AD31

AL29

AM32

AF34

M31

G31

E33

M33 AE31 AK30 AN33

AF33

M30

H30

E34

M34

AF30 AK31 AM34

AF32

K31 H34

AG30 AG31

AJ34

AK34

AH31

AJ31

AJ32

AJ33 AA27

AA30 AB27 AB33 AC27 AD27 AE27

AF27 AG27

B13 B16 B19 E13 E16 E19 H10 H11 H12 H13

T31

F31 F34

L30 J34

J30 J31 J32 J33

FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8 FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31

FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7

FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7

FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7

FBA_WCK01 FBA_WCK01_N FBA_WCK23 FBA_WCK23_N FBA_WCK45 FBA_WCK45_N FBA_WCK67 FBA_WCK67_N

FBA_WCKB01 FBA_WCKB01_N FBA_WCKB23 FBA_WCKB23_N FBA_WCKB45 FBA_WCKB45_N FBA_WCKB67 FBA_WCKB67_N

FBVDDQ_1 FBVDDQ_2 FBVDDQ_3 FBVDDQ_4 FBVDDQ_5 FBVDDQ_6 FBVDDQ_7 FBVDDQ_8 FBVDDQ_9 FBVDDQ_10 FBVDDQ_11 FBVDDQ_12 FBVDDQ_13 FBVDDQ_14 FBVDDQ_15 FBVDDQ_16 FBVDDQ_17 FBVDDQ_18 FBVDDQ_19

GB4-128

MEMORY I/F A

FBA_D00 FBA_D01 FBA_D02 FBA_D03 FBA_D04 FBA_D05 FBA_D06 FBA_D07 FBA_D08 FBA_D09 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63

FBA_CLK0

FBA_CLK0*

FBA_CLK1

FBA_CLK1*

FB_VREF

FBA_DEBUG0 FBA_DEBUG1

FBA_CMD_RFU0 FBA_CMD_RFU1

FB_DLL_AVDD

FBA_PLL_AVDD

FBVDDQ_22 FBVDDQ_21 FBVDDQ_20

FB_CLAMP

L28 M29 L29 M28 N31 P29 R29 P28 J28 H29 J29 H28 G29 E31 E32 F30 C34 D32 B33 C33 F33 F32 H33 H32 P34 P32 P31 P33 L31 L34 L32 L33 AG28 AF29 AG29 AF28 AD30 AD29 AC29 AD28 AJ29 AK29 AJ30 AK28 AM29 AM31 AN29 AM30 AN31 AN32 AP30 AP32 AM33 AL31 AK33 AK32 AD34 AD32 AC30 AD33 AF31 AG34 AG32 AG33

R30 R31 AB31 AC31

+FB_VREF1

H26

15mils width

FBA_DEBUG0

R28

FBA_DEBUG1

AC28 R32

AC32

+FB_PLLAVDD

K27 U27

100mA

H16 H15 H14 E1

VMA_DQ0 VMA_DQ1 VMA_DQ2 VMA_DQ3 VMA_DQ4 VMA_DQ5 VMA_DQ6 VMA_DQ7 VMA_DQ8 VMA_DQ9 VMA_DQ10 VMA_DQ11 VMA_DQ12 VMA_DQ13 VMA_DQ14 VMA_DQ15 VMA_DQ16 VMA_DQ17 VMA_DQ18 VMA_DQ19 VMA_DQ20 VMA_DQ21 VMA_DQ22 VMA_DQ23 VMA_DQ24 VMA_DQ25 VMA_DQ26 VMA_DQ27 VMA_DQ28 VMA_DQ29 VMA_DQ30 VMA_DQ31 VMA_DQ32 VMA_DQ33 VMA_DQ34 VMA_DQ35 VMA_DQ36 VMA_DQ37 VMA_DQ38 VMA_DQ39 VMA_DQ40 VMA_DQ41 VMA_DQ42 VMA_DQ43 VMA_DQ44 VMA_DQ45 VMA_DQ46 VMA_DQ47 VMA_DQ48 VMA_DQ49 VMA_DQ50 VMA_DQ51 VMA_DQ52 VMA_DQ53 VMA_DQ54 VMA_DQ55 VMA_DQ56 VMA_DQ57 VMA_DQ58 VMA_DQ59 VMA_DQ60 VMA_DQ61 VMA_DQ62 VMA_DQ63

VMA_CLKP0 VMA_CLKN0 VMA_CLKP1 VMA_CLKN1

T7T7

For Debug only

R71 *60.4/F_4_NCR71 *60.4/F_4_NC

1 2

R72 *60.4/F_4_NCR72 *60.4/F_4_NC

1 2

L5 BLM18PG300SN1DL5 BLM18PG300SN1D

1 2 1 2

+1.5V_GFX

R35

R35 10K_4

10K_4

1 2

C86 1U/6.3V_4C86 1U/6.3V_4 C88 0.1U/16V_4C88 0.1U/16V_4

VMA_DQ[63..0][18] VMA_DM[7..0][18]

VMA_WDQS[7..0][18] VMC_DQ[63..0][19]

VMC_DM[7..0][19] VMC_WDQS[7..0][19]

VMA_CLKP0 [18] VMA_CLKN0 [18] VMA_CLKP1 [18] VMA_CLKN1 [18]

100mA

+1.5V_GFX

+1.05V_GFX

15mils width

+1.5V_GFX

C20 0.1U/16V_4_GTC20 0.1U/16V_4_GT

1 2

C33 0.1U/16V_4_GTC33 0.1U/16V_4_GT

1 2

C174 0.1U/16V_4C174 0.1U/16V_4

1 2

C47 0.1U/16V_4C47 0.1U/16V_4

1 2

C87 0.1U/16V_4C87 0.1U/16V_4

1 2

C78 0.1U/16V_4C78 0.1U/16V_4

1 2

C71 0.1U/16V_4C71 0.1U/16V_4

1 2

C138 1U/6.3V_4_GTC138 1U/6.3V_4_GT

1 2

C117 1U/6.3V_4C117 1U/6.3V_4

1 2

C76 1U/6.3V_4C76 1U/6.3V_4

1 2

C101 1U/6.3V_4C101 1U/6.3V_4

1 2

VMC_CMD0[19] VMC_CMD1[19] VMC_CMD2[19] VMC_CMD3[19] VMC_CMD4[19] VMC_CMD5[19] VMC_CMD6[19] VMC_CMD7[19] VMC_CMD8[19] VMC_CMD9[19] VMC_CMD10[19] VMC_CMD11[19] VMC_CMD12[19] VMC_CMD13[19] VMC_CMD14[19] VMC_CMD15[19] VMC_CMD16[19] VMC_CMD17[19] VMC_CMD18[19] VMC_CMD19[19] VMC_CMD20[19] VMC_CMD21[19] VMC_CMD22[19] VMC_CMD23[19] VMC_CMD24[19] VMC_CMD25[19] VMC_CMD26[19] VMC_CMD27[19] VMC_CMD28[19] VMC_CMD29[19] VMC_CMD30[19] VMC_CMD31[19]

DBI

EDC

VMC_WDQS0 VMC_WDQS1 VMC_WDQS2 VMC_WDQS3 VMC_WDQS4 VMC_WDQS5 VMC_WDQS6 VMC_WDQS7

VMC_DM0 VMC_DM1 VMC_DM2 VMC_DM3 VMC_DM4 VMC_DM5 VMC_DM6 VMC_DM7

GDDR5 NO USE

VMC_WCK01[19] VMC_WCK01#[19] VMC_WCK23[19] VMC_WCK23#[19] VMC_WCK45[19] VMC_WCK45#[19] VMC_WCK67[19] VMC_WCK67#[19]

+1.5V_GFX

U24C

U24C N13P-GT-A2

N13P-GT-A2

D13

FBB_CMD0

E14

FBB_CMD1

F14

FBB_CMD2

A12

FBB_CMD3

B12

FBB_CMD4

C14

FBB_CMD5

B14

FBB_CMD6

G15

FBB_CMD7

F15

FBB_CMD8

E15

FBB_CMD9

D15

FBB_CMD10

A14

FBB_CMD11

D14

FBB_CMD12

A15

FBB_CMD13

B15

FBB_CMD14

C17

FBB_CMD15

D18

FBB_CMD16

E18

FBB_CMD17

F18

FBB_CMD18

A20

FBB_CMD19

B20

FBB_CMD20

C18

FBB_CMD21

B18

FBB_CMD22

G18

FBB_CMD23

G17

FBB_CMD24

F17

FBB_CMD25

D16

FBB_CMD26

A18

FBB_CMD27

D17

FBB_CMD28

A17

FBB_CMD29

B17

FBB_CMD30

E17

FBB_CMD31

E11

FBB_DQM0

FBB_DQM1

FBB_DQM2

FBB_DQM3

F23

FBB_DQM4

F27

FBB_DQM5

C30

FBB_DQM6

A24

FBB_DQM7

D10

FBB_DQS_WP0

FBB_DQS_WP1

FBB_DQS_WP2

FBB_DQS_WP3

E23

FBB_DQS_WP4

E28

FBB_DQS_WP5

B30

FBB_DQS_WP6

A23

FBB_DQS_WP7

FBB_DQS_RN0

FBB_DQS_RN1

FBB_DQS_RN2

FBB_DQS_RN3

D22

FBB_DQS_RN4

D28

FBB_DQS_RN5

A30

FBB_DQS_RN6

B23

FBB_DQS_RN7

FBB_WCK01

FBB_WCK01_N

FBB_WCK23

FBB_WCK23_N

D24

FBB_WCK45

D25

FBB_WCK45_N

B27

FBB_WCK67

C27

FBB_WCK67_N

FBB_WCKB01

FBB_WCKB01_N

FBB_WCKB23

FBB_WCKB23_N

F26

FBB_WCKB45

E26

FBB_WCKB45_N

A26

FBB_WCKB67

A27

FBB_WCKB67_N

H18

FBVDDQ_23

H19

FBVDDQ_24

H20

FBVDDQ_25

H21

FBVDDQ_26

H22

FBVDDQ_27

H23

FBVDDQ_28

H24

FBVDDQ_29

FBVDDQ_30

FBVDDQ_31

L27

FBVDDQ_32

M27

FBVDDQ_33

N27

FBVDDQ_34

P27

FBVDDQ_35

R27

FBVDDQ_36

T27

FBVDDQ_37

T30

FBVDDQ_38

all POP

NC C20,C33,C138

GB4-128

MEMORY I/F C

FB_CAL_TERM_GND

GDDR5 Mode H Mapping

VMC_DQ0

FBB_D00

FBB_D01

FBB_D02

FBB_D03

F11

FBB_D04

G11

FBB_D05

F12

FBB_D06

G12

FBB_D07

FBB_D08

FBB_D09

FBB_D10

FBB_D11

FBB_D12

FBB_D13

FBB_D14

FBB_D15

FBB_D16

FBB_D17

FBB_D18

FBB_D19

FBB_D20

FBB_D21

FBB_D22

FBB_D23

A11

FBB_D24

C11

FBB_D25

D11

FBB_D26

B11

FBB_D27

FBB_D28

FBB_D29

FBB_D30

FBB_D31

F24

FBB_D32

G23

FBB_D33

E24

FBB_D34

G24

FBB_D35

D21

FBB_D36

E21

FBB_D37

G21

FBB_D38

F21

FBB_D39

G27

FBB_D40

D27

FBB_D41

G26

FBB_D42

E27

FBB_D43

E29

FBB_D44

F29

FBB_D45

E30

FBB_D46

D30

FBB_D47

A32

FBB_D48

C31

FBB_D49

C32

FBB_D50

B32

FBB_D51

D29

FBB_D52

A29

FBB_D53

C29

FBB_D54

B29

FBB_D55

B21

FBB_D56

C23

FBB_D57

A21

FBB_D58

C21

FBB_D59

B24

FBB_D60

C24

FBB_D61

B26

FBB_D62

C26

FBB_D63

VMC_CLKP0

D12

FBB_CLK0

FBB_CLK0*

FBB_CLK1

FBB_CLK1*

FBB_PLL_AVDD

FBB_CMD_RFU0 FBB_CMD_RFU1

FB_VDDQ_SENSE

FB_GND_SENSE

FB_CAL_PD_VDDQ

FB_CAL_PU_GND

FBB_DEBUG0 FBB_DEBUG1

FBVDDQ_39 FBVDDQ_40 FBVDDQ_41 FBVDDQ_42 FBVDDQ_43 FBVDDQ_44

Size Document Number Rev

Date: Sheet of

VMC_CLKN0

E12

VMC_CLKP1

E20

VMC_CLKN1

F20

+FB_PLLAVDD

H17 C12

C20 F1

FB_CAL_PD_VDDQ

J27

FB_CAL_PU_GND

H27

FB_CAL_TERM_GND

H25

FBC_DEBUG0

G14

FBC_DEBUG1

G20 T33

V27 W27 W30 W33 Y27

N13P-GS (MEMORY I/F) 2/5

Saturday, March 03, 2012

N13P-GS (MEMORY I/F) 2/5

< 0-31 > < 32-63 > Memory

VMC_DQ1 VMC_DQ2 VMC_DQ3 VMC_DQ4 VMC_DQ5 VMC_DQ6 VMC_DQ7 VMC_DQ8

VMC_DQ9 VMC_DQ10 VMC_DQ11 VMC_DQ12 VMC_DQ13 VMC_DQ14 VMC_DQ15 VMC_DQ16 VMC_DQ17 VMC_DQ18 VMC_DQ19 VMC_DQ20 VMC_DQ21 VMC_DQ22 VMC_DQ23 VMC_DQ24 VMC_DQ25 VMC_DQ26 VMC_DQ27 VMC_DQ28 VMC_DQ29 VMC_DQ30 VMC_DQ31 VMC_DQ32 VMC_DQ33 VMC_DQ34 VMC_DQ35 VMC_DQ36 VMC_DQ37 VMC_DQ38 VMC_DQ39 VMC_DQ40 VMC_DQ41 VMC_DQ42 VMC_DQ43 VMC_DQ44 VMC_DQ45 VMC_DQ46 VMC_DQ47 VMC_DQ48 VMC_DQ49 VMC_DQ50 VMC_DQ51 VMC_DQ52 VMC_DQ53 VMC_DQ54 VMC_DQ55 VMC_DQ56 VMC_DQ57 VMC_DQ58 VMC_DQ59 VMC_DQ60 VMC_DQ61 VMC_DQ62 VMC_DQ63

CMD0 CMD16 CS* CMD1 CMD17 A3_BA3 CMD2 CMD18 A2_BA0 CMD3 CMD19 A4_BA2 CMD4 CMD20 A5_BA1 CMD5 CMD21 WE* CMD6 CMD22 A7_A8 CMD7 CMD23 A6_A11 CMD8 CMD24 ABI* CMD9 CMD25 A12_RFU CMD10 CMD26 A0_A10 CMD11 CMD27 A1_A9 CMD12 CMD28 RAS* CMD13 CMD29 RST* CMD14 CMD30 CKE* CMD15 CMD31 CAS*

VMC_CLKP0 [19] VMC_CLKN0 [19] VMC_CLKP1 [19] VMC_CLKN1 [19]

C64 0.1U/16V_4C64 0.1U/16V_4

1 2

C62 0.047U/10V_4C62 0.047U/10V_4

1 2

C57 1U/6.3V_4C57 1U/6.3V_4

1 2

R70 40.2/F_4R70 40.2/F_4

1 2

R69 40.2/F_4R69 40.2/F_4

1 2

R62 60.4/F_4R62 60.4/F_4

R52 *60.4/F_4_NCR52 *60.4/F_4_NC

1 2

R57 *10K_4_NCR57 *10K_4_NC

1 2

+1.5V_GFX

Quanta Computer Inc.

PROJECT :

R09A

+1.5V_GFX

14 58

A A

DIS

B B

C18,C24 - 0.1uF

+3.3V_GFX

+1.05V_GFX

CH4103K1B08 CAP CHIP 0.1U 16V(+-10%,X7R,0402)

eDP_HPD[27]

1 2

R364 1K_4_DISR364 1K_4_DIS

DIS

+3.3V_GFX

C C

DIS C30 - 0.1uF CH4103K1B08 CAP CHIP 0.1U 16V(+-10%,X7R,0402)

D D

L2 HCB1608KF-301T20_DISL2 HCB1608KF-301T20_DIS

1 2

L4 BLM18EG121SN1D_DISL4 BLM18EG121SN1D_DIS

eDP_HPD_R

R47

100K_4_DIS

L1 HCB1608KF-301T20_DISL1 HCB1608KF-301T20_DIS

1 2

C17 1U/25V_6_DISC17 1U/25V_6_DIS C18 0.1U_4C18 0.1U_4

+1.05V_GFX

1 2 1 2

C41 1U/6.3V_4_DISC41 1U/6.3V_4_DIS C24 0.1U_4C24 0.1U_4

C42 0.1U/16V_4_DISC42 0.1U/16V_4_DIS

C23 0.1U/16V_4_DISC23 0.1U/16V_4_DIS

1 2

C30 0.1U/16V_4_DISC30 0.1U/16V_4_DIS

1 2

L3 BLM18EG221SN1DL3 BLM18EG221SN1D

1 2 1 2

1 2

R357 1K/F_4_DISR357 1K/F_4_DIS

1 2

R376 1K/F_4_DISR376 1K/F_4_DIS

1 2

R49 10K_4R49 10K_4 R48 10K_4R48 10K_4

0.1U/16V_4_DIS

C22 0.1U/16V_4C22 0.1U/16V_4 C29 1U/6.3V_4C29 1U/6.3V_4

R50 10K_4R50 10K_4

R51 10K_4R51 10K_4

EXT_HDMI_HPD_R[29]

12 12

120 mA

C447

60mA

45mA

1 2 1 2

R45*1K/F_4_NC R45*1K/F_4_NC

IFPAB_RSET

T5T5

110 mA

+IFPCD_PLLVDD

eDP_HPD_R

IFPC_RSET IFPD_RSET

+IFPCD_IOVDD

200 mA

+IFPEF_PLLVDD +IFPEF_IOVDD

+DACA_VDD

R377

R377 124/F_DIS

124/F_DIS

+NV_PLLVDD

U24D

U24D N13P-GT-A2

N13P-GT-A2

AH8

IFPAB_PLLVDD

AJ8

IFPAB_RSET

AG8

IFPA_IOVDD

AG9

IFPB_IOVDD

GPIO14

AF7

IFPCD_PLLVDD/

IFPC_PLLVDD

AG7

DACB_VDD/

IFPD_PLLVDD

GPIO15

GPIO17

AF8

IFPCD_RSET/ IFPC_RSET

AN2

DACB_RSET/ IFPD_RSET

AF6

IFPC_IOVDD

AG6

IFPD_IOVDD

AD6

IFPEF_RSET

AB8

IFPEF_PLLVDD

AC7

IFPE_IOVDD

AC8

IFPF_IOVDD

GPIO18

GPIO19

AG10

DACA_VDD

AP9

DACA_VREF

AP8

DACA_RSET

AC6

NC_1

AJ28

NC_2

AJ4

NC_3

AJ5

NC_4

AL11

NC_5

C15

NC_6

D19

NC_7

D20

NC_8

D23

NC_9

D26

NC_10

H31

NC_11

NC_12

V32

NC_13

AD8

PLLVDD

AD7

VID_PLLVDD

GF108/GKx

AE8

SP_PLLVDD

IFPAB(LVDS)

IFPCD

DACA(CRT)

GF117

GB4-128

I2CW_SDA/ IFPC_AUX_N

I2CW_SCL/ IFPC_AUX

IFPC

I2CX_SDA/ IFPD_AUX_N

I2CX_SCL/ IFPD_AUX

IFPD

I2CY_SCL/ IFPE_AUX

I2CY_SDA/ IFPE_AUX*

IFPEF

I2CZ_SCL/ IFPF_AUX

I2CZ_SDA/ IFPF_AUX*

XTAL_PLL

IFPA_TXC

IFPA_TXC*

IFPA_TXD0

IFPA_TXD0*

IFPA_TXD1

IFPA_TXD1*

IFPA_TXD2

IFPA_TXD2*

IFPA_TXD3

IFPA_TXD3*

IFPB_TXC

IFPB_TXC*

IFPB_TXD4

IFPB_TXD4*

IFPB_TXD5

IFPB_TXD5*

IFPB_TXD6

IFPB_TXD6*

IFPB_TXD7

IFPB_TXD7*

IFPC_L3_N

IFPC_L3

IFPC_L2_N

IFPC_L2

IFPC_L1_N

IFPC_L1

IFPC_L0_N

IFPC_L0

IFPD_L3_N

IFPD_L3

IFPD_L2_N

IFPD_L2

IFPD_L1_N

IFPD_L1

IFPD_L0_N

IFPD_L0

IFPE_L0

IFPE_L0*

IFPE_L1

IFPE_L1*

IFPE_L2

IFPE_L2*

IFPE_L3

IFPE_L3*

IFPF_L0

IFPF_L0*

IFPF_L1

IFPF_L1*

IFPF_L2

IFPF_L2*

IFPF_L3

IFPF_L3*

DACA_RED

DACA_GREEN

DACA_BLUE

DACA_HSYNC

DACA_VSYNC

I2CA_SCL

I2CA_SDA

XTAL_SSIN

XTAL_OUTBUFF

XTAL_IN

XTAL_OUT

AM6 AN6 AP3 AN3 AN5 AM5 AL6 AK6 AJ6 AH6 AJ9 AH9 AP6 AP5 AM7 AL7 AN8 AM8 AK8 AL8

AG2 AG3 AG4 AG5 AH4 AH3 AJ2 AJ3 AJ1 AK1 AK2 AK3 AK5 AK4 AL4 AL3 AM4 AM3 AM2 AM1

AB3 AB4 AD2 AD3 AD1 AC1 AC2 AC3 AC4 AC5 AF3 AF2 AE3 AE4 AF4 AF5 AD4 AD5 AG1 AF1

AK9 AL10 AL9 AM9

AN9 R4

DIS

EXT_CRT_RED EXT_CRT_GRE

EXT_CRT_BLU

EXT_CRT_HSYNC EXT_CRT_VSYNC

EXT_DDCCLK EXT_DDCDAT

DIS:POP UMA/OPT:NC

CLK_VGA_27M_SS

BXTALOUT

XTALIN

XTALOUT

C418

*27P/50V_4_OPT_NC

OPT

eDP_1_AUXN eDP_1_AUXP

R44 150/F_4_DISR44 150/F_4_DIS R36 150/F_4_DISR36 150/F_4_DIS R34 150/F_4_DISR34 150/F_4_DIS

R355 10K_4R355 10K_4 R14 10K_4R14 10K_4

Y3 *27MHZ_OPT_NCY3 *27MHZ_OPT_NC

2 1

EXT_HDMI_TXCN [29] EXT_HDMI_TXCP [29] EXT_HDMI_TXN0 [29] EXT_HDMI_TXP0 [29] EXT_HDMI_TXN1 [29] EXT_HDMI_TXP1 [29] EXT_HDMI_TXN2 [29]

eDP_1_AUXN eDP_1_AUXP

R372 100K_EDPR372 100K_EDP R375 100K_EDPR375 100K_EDP

EC118 *15P/50V_4_NCEC118 *15P/50V_4_NC

1 2

EC103 *15P/50V_4_NCEC103 *15P/50V_4_NC

1 2

EC117 *15P/50V_4_NCEC117 *15P/50V_4_NC

1 2

EXT_HDMI_TXP2 [29] eDP_1_AUXN [27] eDP_1_AUXP [27] eDP_1_TXN3 [27] eDP_1_TXP3 [27] eDP_1_TXN2 [27] eDP_1_TXP2 [27] eDP_1_TXN1 [27] eDP_1_TXP1 [27] eDP_1_TXN0 [27] eDP_1_TXP0 [27]

EXT_CRT_RED [28] EXT_CRT_GRE [28]

EXT_CRT_BLU [28]

EXT_CRT_HSYNC [28] EXT_CRT_VSYNC [28]

EXT_DDCCLK [28] EXT_DDCDAT [28]

EXT_HDMI_SDA [29] EXT_HDMI_SCL [29]

EXT_CRT_RED

EXT_CRT_GRE EXT_CRT_BLU

HDMI

eDP

VGA

R place close to GPU

1 2 1 2 1 2

10 kΩ pull-down only if no spread chip used.

1 2 1 2

1 2

R363 0_4_DISR363 0_4_DIS

C419

*27P/50V_4_OPT_NC

Size Document Number Rev

Date: Sheet of

DIS

Monday, March 05, 2012

EXT_CRT_RED EXT_CRT_GRE EXT_CRT_BLU

CLK_VGA_27M [24]

Quanta Computer Inc.

PROJECT :

N13P-GS (DISPLAY) 3/5

R09A

15 58

A A

U24E

U24E N13P-GT-A2

N13P-GT-A2

MISC1

MISC1 (GPIOS,JTAG,THERM,I2C)

(GPIOS,JTAG,THERM,I2C)

GB4-128

N13P-GT

10K/F_4: CS31002FB26 [RES CHIP 10K 1/16W +1% (0402)]

4.99K/F_4: CS24992FB26 [RES CHIP 4.99K 1/16W +1%(0402)] 15K/F_4: CS31502FB24 [RES CHIP 15K 1/16W +1% (0402)] 20K/F_4: CS32002FB29 RES CHIP 20K 1/16W +-1%(0402)

R19

*4.99K/F_4_NC

ROM_SO ROM_SCLK

R20

24.9K/F_4

1 2

24.9K/F_4: CS32492FB16 [RES CHIP 24.9K 1/16W +-1%(0402)] 30K/F_4: CS33002FB13 [RES CHIP 30K 1/16W +-1%(0402)]

35.7K/F_4: CS33572FB13 [RES CHIP 35.7K 1/16W +-1%(0402)]

45.3K/F_4: CS34532FB18 [RES CHIP 45.3K 1/16W +-1% (0402)]

+3.3V_GFX +3.3V_GFX

R345

R345 10K/F_4

10K/F_4

R21

1 2

4.99K/F_4

1 2 12

R16

R16 *10K/F_4_NC

*10K/F_4_NC

R346

R346 *10K/F_4_NC

*10K/F_4_NC

R22

45.3/F_4

STRAP0 STRAP1ROM_SI STRAP2 STRAP3 STRAP4

R23

*10K/F_4_NC

1 2

R15

*35.7K/F_4_NC

1 2

R18

4.99K/F_4

1 2

R343

*10K/F_4_NC

1 2

R344

R344 10K/F_4

10K/F_4

1 2

R341

R341 *15K/F_4_NC

*15K/F_4_NC

1 2

R342

R342 15K/F_4

15K/F_4

1 2

R340

R340 *10K/F_4_NC

*10K/F_4_NC

1 2

R339

45.3K/F_4

1 2

N13P-GV

B B

P6 M3 L6 P5 P7 L7 M7 N8 M1 M2 L1 M5 N3 M4

P4 P1

H6 H5 H7 H4

DGPU_VID4 DGPU_VID3 EXT_LCD_PWM EXT_LVDS_VDDEN EXT_LVDS_BLEN DGPU_VID1 DGPU_VID2

VGA_OVT# VGA_ALERT GPIO10_VREF DGPU_VID0

VGA_PW R_LEVEL#

DGPU_VID5

ROM_SI ROM_SO ROM_SCLK

DGPU_VID4 [56] DGPU_VID3 [56] EXT_LCD_PWM [27] EXT_LVDS_VDDEN [27] EXT_LVDS_BLEN [38] DGPU_VID1 [56] DGPU_VID2 [56]

GPIO10_VREF [18,19] DGPU_VID0 [56] VGA_PW R_LEVEL# [38,56] DGPU_VID5 [56]

T14T14

T2T2

RAMCFG [3:0]

0100 0101

JTAG_TMS JTAG_TDI VGA_OVT# VGA_ALERT VGA_PW R_LEVEL# DGPU_VID0 DGPU_VID1 DGPU_VID2 DGPU_VID3 DGPU_VID4 DGPU_VID5

DGPU_VID0 DGPU_VID1 DGPU_VID2 DGPU_VID3 DGPU_VID4 DGPU_VID5 JTAG_TCK JTAG_TRST#

DESCRIPTION

GDDR5 128Mx16, 2500MHz

SOR_EXPOSED[3:0]

0000 0010

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

T16T16 T17T17 T19T19 T18T18 T15T15

VGA_THERMDN

VGA_THERMDP

JTAG_TCK JTAG_TMS JTAG_TDI JTAG_TDO JTAG_TRST#

I2CS_SCL

I2CS_SDA EXT_EDIDCLK EXT_EDIDDATA I2CB_SCL_G I2CB_SDA_G

STRAP_REF_GND

VGA_THERMDN[44]

VGA_THERMDP[44]

R24 2.2K_4R24 2.2K_4

1 2

R352 2.2K_4R352 2.2K_4

C C

+3.3V_GFX +3.3V_GFX +3.3V_GFX

1 2

R359 2.2K_4R359 2.2K_4

1 2

R353 2.2K_4R353 2.2K_4

1 2

R17 2.2K_4R17 2.2K_4

1 2

R358 2.2K_4R358 2.2K_4

1 2

R362 40.2K/F_4R362 40.2K/F_4

GT : R362 POP

D D

GV : R362 NC

STRAP0 STRAP1 STRAP2 STRAP3 STRAP4

THERMDN

THERMDP

AM10

JTAG_TCK

AP11

JTAG_TMS

AM11

JTAG_TDI

AP12

JTAG_TDO

AN11

JTAG_TRST*

I2CS_SCL

I2CS_SDA

I2CC_SCL

I2CC_SDA

I2CB_SCL

I2CB_SDA

STRAP0

STRAP1

STRAP2

STRAP3

STRAP4

MULTI_STRAP_REF_GND

MISC2(ROM)

Output

0.875V

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8

GPIO9 GPIO10 GPIO11 GPIO12 GPIO13

GPIO16

GPIO20 GPIO21

ROM_CS*

ROM_SI

ROM_SO

ROM_SCLK

BUFRST*

CEC

VID0 VID1 VID2 VID3 VID4 VID5

0 1 0 0 1 1N13P-GV(QS)

N13P-GT(QS) 0.9V 0 0 0 0 1 1

Default: Hynix VRAM (0100)

VRAM Configuration Table

Vendor Vendor P/N

Hynix SamsungGDDR5 128Mx16, 2500MHz

Optimus Discret only

+3.3V_GFX

R381*10K_4_NC R381*10K_4_NC R382*10K_4_NC R382*10K_4_NC R36110K_4 R36110K_4 R35410K_4 R35410K_4 R36010K_4 R36010K_4 R596*10K_4_NC R596*10K_4_NC R597*10K_4_GV_NC R597*10K_4_GV_NC R598*10K_4_NC R598*10K_4_NC R599*10K_4_NC R599*10K_4_NC R60010K_4 R60010K_4 R60110K_4 R60110K_4

R60210K_4 R60210K_4 R60310K_4_GT R60310K_4_GT R60410K_4 R60410K_4 R60510K_4 R60510K_4 R606*10K_4_NC R606*10K_4_NC

R607*10K_4_NC R607*10K_4_NC R378*10K_4_NC R378*10K_4_NC R37910K_4 R37910K_4

GPIO

10 11 12 13

Quanta P/N

AKG5MWUTW14 H5GQ2H24MFR-T2C AKG5MWDT509

STRAP3

PD 5K PD 15K

0 1

3 4 5 6 7 8 9

Display confiauration table

ACTIVE

I/O OUT

N/A

OUT

N/A

OUT

HIGH OUT2HIGH OUT

HIGH OUT

N/A OUT

N/A I/O

LOW I/O

LOW OUT

N/A OUT

N/A IN

N/A OUT

N/A

Size Document Number Rev

Date: Sheet of

Wednesday, March 21, 2012

Date: Sheet of

Wednesday, March 21, 2012

Date: Sheet of

Wednesday, March 21, 2012

K4G20325FD-F

USAGE NVVDD VID4

NVVDD VID3 PANEL BACKLIGHT PWM PANEL POWER ENABLE PANEL BACKLIGHT ENABLE NVVDD VID1 NVVDD VID2 3D VERSION LEFT/RIGHT SIGNAL OVERT ALERT MEMORY VREF CONTROL NVVDD VID0 PWR_LEVEL NVVDD VID5

Quanta Computer Inc.

PROJECT :

N13P-GT (GPIO&STRAPS) 4/5

ROM_SI

PD 25K

PD 30K

R09T

16 57

A A

B B

C C

GT: 60A

GV: 42A

D D

all POP

NC C34,C38,C72

U24F

U24F N13P-GT-A2

N13P-GT-A2

AA12

VDD_001

AA14

VDD_002

AA16

VDD_003

AA19

VDD_004

AA21

VDD_005

AA23

VDD_006

AB13

VDD_007

AB15

VDD_008

AB17

VDD_009

AB20

VDD_010

AB22

VDD_011

AC12

VDD_012

AC14

VDD_013

AC16

VDD_014

AC19

VDD_015

AC21

VDD_016

AC23

VDD_017

M12

VDD_018

M14

VDD_019

M16

VDD_020

M19

VDD_021

M21

VDD_022

M23

VDD_023

N13

VDD_024

N15

VDD_025

N17

VDD_026

N18

VDD_027

N20

VDD_028

N22

VDD_029

P12

VDD_030

P14

VDD_031

P16

VDD_032

P19

VDD_033

P21

VDD_034

P23

VDD_035

R13

VDD_036

R15

VDD_037

R17

VDD_038

R18

VDD_039

R20

VDD_040

R22

VDD_041

T12

VDD_042

T14

VDD_043

T16

VDD_044

T19

VDD_045

T21

VDD_046

T23

VDD_047

U13

VDD_048

U15

VDD_049

U17

VDD_050

U18

VDD_051

U20

VDD_052

U22

VDD_053

V13

VDD_054

V15

VDD_055

V17

VDD_056

+VCC_DGFX_CORE

VDD_057 VDD_058 VDD_059

GB4-128

GB4-128 NVVDD

NVVDD

VDD_060 VDD_061 VDD_062 VDD_063 VDD_064 VDD_065 VDD_066 VDD_067 VDD_068 VDD_069 VDD_070 VDD_071 VDD_072 XVDD_01 XVDD_02 XVDD_03 XVDD_04 XVDD_05 XVDD_06 XVDD_07 XVDD_08 XVDD_09 XVDD_10 XVDD_11 XVDD_12 XVDD_13 XVDD_14 XVDD_15 XVDD_16 XVDD_17 XVDD_18 XVDD_19 XVDD_20 XVDD_21 XVDD_22 XVDD_23 XVDD_24 XVDD_25 XVDD_26 XVDD_27 XVDD_28 XVDD_29 XVDD_30 XVDD_31 XVDD_32 XVDD_33 XVDD_34 XVDD_35 XVDD_36 XVDD_37 XVDD_38

NVVDD Decoupling

C34 0.01U/25V_4_GTC34 0.01U/25V_4_GT

1 2

C73 0.01U/25V_4C73 0.01U/25V_4

1 2

C83 0.01U/25V_4C83 0.01U/25V_4

1 2

C74 0.01U/25V_4C74 0.01U/25V_4

1 2

C69 0.01U/25V_4C69 0.01U/25V_4

1 2

C81 0.01U/25V_4C81 0.01U/25V_4

1 2

C84 0.01U/25V_4C84 0.01U/25V_4

1 2

C50 0.01U/25V_4C50 0.01U/25V_4

1 2

C38 0.01U/25V_4_GTC38 0.01U/25V_4_GT

1 2

C51 0.01U/25V_4C51 0.01U/25V_4

1 2

C39 0.01U/25V_4C39 0.01U/25V_4

1 2

C66 0.1U/16V_4C66 0.1U/16V_4

1 2

C72 0.1U/16V_4_GTC72 0.1U/16V_4_GT

1 2

C48 0.1U/16V_4C48 0.1U/16V_4

1 2

C80 0.1U/16V_4C80 0.1U/16V_4

1 2

C40 0.1U/16V_4C40 0.1U/16V_4

1 2

C52 1U/6.3V_4C52 1U/6.3V_4

1 2

C68 1U/6.3V_4C68 1U/6.3V_4

1 2

C82 1U/6.3V_4C82 1U/6.3V_4

1 2

C67 1U/6.3V_4C67 1U/6.3V_4

1 2

C60 1U/25V_6C60 1U/25V_6

1 2

C59 10U/6.3V_6C59 10U/6.3V_6

1 2

C43 10U/6.3V_6C43 10U/6.3V_6

1 2

C58 10U/6.3V_6C58 10U/6.3V_6

1 2

C26 10U/6.3V_6C26 10U/6.3V_6

1 2

330uF*2 at power page

+VCC_DGFX_CORE+VCC_DGFX_CORE

V18 AB18 V20 V22 W12 W14 W16 W19 W21 W23 Y13 Y15 Y17 Y18 Y20 Y22 U1 U2 U3 U4 U5 U6 U7 U8 V1 V2 V3 V4 V5 V6 V7 V8 W2 W3 W4 W5 W7 W8 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 AA1 AA2 AA3 AA4 AA5 AA6 AA7 AA8

U24G

U24G N13P-GT-A2

N13P-GT-A2

GND_1

A33

GND_2

AA13

GND_3

AA15

GND_4

AA17

GND_5

AA18

GND_6

AA20

GND_7

AA22

GND_8

AB12

GND_9

AB14

GND_10

AB16

GND_11

AB19

GND_12

AB2

GND_13

AB21

GND_14

AB23

GND_15

AB28

GND_16

AB30

GND_17

AB32

GND_18

AB5

GND_19

AB7

GND_20

AC13

GND_21

AC15

GND_22

AC17

GND_23

AC18

GND_24

AC20

GND_25

AC22

GND_26

AE2

GND_27

AE28

GND_28

AE30

GND_29

AE32

GND_30

AE33

GND_31

AE5

GND_32

AE7

GND_33

AH10

GND_34

AH13

GND_35

AH16

GND_36

AH19

GND_37

AH2

GND_38

AH22

GND_39

AH24

GND_40

AH28

GND_41

AH29

GND_42

AH30

GND_43

AH32

GND_44

AH33

GND_45

AH5

GND_46

AH7

GND_47

AJ7

GND_48

AK10

GND_49

AK7

GND_50

AL12

GND_51

AL14

GND_52

AL15

GND_53

AL17

GND_54

AL18

GND_55

AL2

GND_56

AL20

GND_57

AL21

GND_58

AL23

GND_59

AL24

GND_60

AL26

GND_61

AL28

GND_62

AL30

GND_63

AL32

GND_64

AL33

GND_65

AL5

GND_66

AM13

GND_67

AM16

GND_68

AM19

GND_69

AM22

GND_70

AM25

GND_71

AN1

GND_72

AN10

GND_73

AN13

GND_74

AN16

GND_75

AN19

GND_76

AN22

GND_77

AN25

GND_78

AN30

GND_79

AN34

GND_80

AN4

GND_081

AN7

GND_082

AP2

GND_083

AP33

GND_084

GND_085

B10

GND_086

B22

GND_087

B25

GND_088

B28

GND_089

B31

GND_090

B34

GND_091

GND_092

GND_093

C10

GND_094

C13

GND_095

C19

GND_096

C22

GND_097

C25

GND_098

C28

GND_099

GND_100

GND_101

D31

GND_102

GB4-128

GB4-128 GROUND

GROUND

GND_105 GND_104 GND_103 GND_106 GND_107 GND_108 GND_109 GND_110 GND_111 GND_112 GND_113 GND_114 GND_115 GND_116 GND_117 GND_118 GND_119 GND_120 GND_121 GND_122 GND_123 GND_124 GND_125 GND_126 GND_127 GND_128 GND_129 GND_130 GND_131 GND_132 GND_133 GND_134 GND_135 GND_136 GND_137 GND_138 GND_139 GND_140 GND_141 GND_142 GND_143 GND_144 GND_145 GND_146 GND_147 GND_148 GND_149 GND_150 GND_151 GND_152 GND_153 GND_154 GND_155 GND_156 GND_157 GND_158 GND_159 GND_160 GND_161 GND_162 GND_163 GND_164 GND_165 GND_166 GND_167 GND_168 GND_169 GND_170 GND_171 GND_172 GND_173 GND_174 GND_175 GND_176 GND_177 GND_178 GND_179 GND_180 GND_181 GND_182 GND_183 GND_184 GND_185 GND_186 GND_187 GND_188 GND_189 GND_190 GND_191 GND_192 GND_193 GND_194 GND_195 GND_196 GND_197 GND_198 GND_199 GND_200

GND_201 GND_202

E22 E10 D33 E25 E5 E7 F28 F7 G10 G13 G16 G19 G2 G22 G25 G28 G3 G30 G32 G33 G5 G7 K2 K28 K30 K32 K33 K5 K7 M13 M15 M17 M18 M20 M22 N12 N14 N16 N19 N2 N21 N23 N28 N30 N32 N33 N5 N7 P13 P15 P17 P18 P20 P22 R12 R14 R16 R19 R21 R23 T13 T15 T17 T18 T2 T20 T22 AG11 T28 T32 T5 T7 U12 U14 U16 U19 U21 U23 V12 V14 V16 V19 V21 V23 W13 W15 W17 W18 W20 W22 W28 Y12 Y14 Y16 Y19 Y21 Y23 AH11

C16 W32

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Saturday, March 03, 2012

Date: Sheet of

Saturday, March 03, 2012

Date: Sheet of

Saturday, March 03, 2012

PROJECT :

N13P-GS (POWER & GND) 5/5

R09A

17 58

VMA_DQ[63..0][14] VMA_DM[7..0][14] VMA_WDQS[7..0][14]

CHANNEL A: 1024MB GDDR5

LOWER HALF UPPER HALF

M2 M4 N2 N4 T2 T4 U2

U4 M13 M11

N13 N11 T13 T11 U13 U11 F13 F11 E13 E11 B13 B11 A13 A11

J5 K4 K5

K10 K11 H10 H11

H5 H4

D4 D5

P4 P5

R13 C13

C2 P2

P13 D13

J11 J12

G12

L12

J13 J10

A5 U5

A10 U10

J14

MF=1

U27

WCK01 | WCK23 WCK01# | WCK23#

WCK23 | WCK01 WCK23# | WCK01#

EDC3 | EDC0 EDC2 | EDC1 EDC1 | EDC2 EDC0 | EDC3

DBI3# | DBI0# DBI2 #| DBI1# DBI1# | DBI2# DBI0# | DBI3#

RAS# | CAS# CAS# | RAS#

CKE# CK# CK

CS# | WE# WE# | CS#

ZQ SEN

RESET# MF

Vpp,NC Vpp,NC1

VREFD1 VREFD2

VREFC

ABI#

GDDR5

VDDQ-B1

VDDQ-B3 VDDQ-B12 VDDQ-B14

VDDQ-D1

VDDQ-D3 VDDQ-D12 VDDQ-D14

VDDQ-E5 VDDQ-E10

VDDQ-F1

VDDQ-F3 VDDQ-F12 VDDQ-F14

VDDQ-G2

VDDQ-G13

VDDQ-H3

VDDQ-H12

VDDQ-K3

VDDQ-K12

VDDQ-L2 VDDQ-L13

VDDQ-M1

VDDQ-M3

VDDQ-M12 VDDQ-M14

VDDQ-N5

VDDQ-N10

VDDQ-P1

VDDQ-P3

VDDQ-P12 VDDQ-P14

VDDQ-T1

VDDQ-T3

VDDQ-T12 VDDQ-T14

VDD-C5 VDD-C10 VDD-D11

VDD-G1

VDD-G4

VDD-G11 VDD-G14

VDD-L1

VDD-L4 VDD-L11 VDD-L14 VDD-P11

VDD-R5

VDD-R10

VSSQ-A1

VSSQ-A3 VSSQ-A12 VSSQ-A14

VSSQ-C1

VSSQ-C3

VSSQ-C4

VSSQ-C11 VSSQ-C12 VSSQ-C14

VSSQ-E1

VSSQ-E3

VSSQ-E12 VSSQ-E14

VSSQ-F5 VSSQ-F10

VSSQ-H2

VSSQ-H13

VSSQ-K2

VSSQ-K13

VSSQ-M5

VSSQ-M10

VSSQ-N1

VSSQ-N3

VSSQ-N12 VSSQ-N14

VSSQ-R1

VSSQ-R3

VSSQ-R4

VSSQ-R11 VSSQ-R12 VSSQ-R14

VSSQ-V1

VSSQ-V3 VSSQ-V12 VSSQ-V14

VSS-B5 VSS-B10 VSS-D10

VSS-G5

VSS-G10

VSS-H1 VSS-H14

VSS-K1 VSS-K14

VSS-L5 VSS-L10 VSS-P10

VSS-T5 VSS-T10

+1.5V_GFX+1.5V_GFX

B1 B3 B12 B14 D1 D3 D12 D14 E5 E10 F1 F3 F12 F14 G2 G13 H3 H12 K3 K12 L2 L13 M1 M3 M12 M14 N5 N10 P1 P3 P12 P14 T1 T3 T12 T14

C5 C10 D11 G1 G4 G11 G14 L1 L4 L11 L14 P11 R5 R10

A1 A3 A12 A14 C1 C3 C4 C11 C12 C14 E1 E3 E12 E14 F5 F10 H2 H13 K2 K13 M5 M10 N1 N3 N12 N14 R1 R3 R4 R11 R12 R14 U1 U3 U12 U14

B5 B10 D10 G5 G10 H1 H14 K1 K14 L5 L10 P10 T5 T10

U27

MF=0

U28

DQ31 | DQ7

DQ30 | DQ6

WCK01 | WCK23 WCK01# | WCK23#

WCK23 | WCK01 WCK23# | WCK01#

EDC3 | EDC0 EDC2 | EDC1 EDC1 | EDC2 EDC0 | EDC3

DBI3# | DBI0# DBI2 #| DBI1# DBI1# | DBI2# DBI0# | DBI3#

RAS# | CAS# CAS# | RAS#

CKE# CK# CK

CS# | WE# WE# | CS#

ZQ SEN

RESET# MF

Vpp,NC Vpp,NC1

VREFD1 VREFD2

VREFC

ABI#

GDDR5

VDDQ-B12 VDDQ-B14

VDDQ-D12 VDDQ-D14

VDDQ-E10

VDDQ-F12 VDDQ-F14

VDDQ-G13 VDDQ-H12 VDDQ-K12 VDDQ-L13

VDDQ-M12 VDDQ-M14

VDDQ-N10

VDDQ-P12 VDDQ-P14

VDDQ-T12 VDDQ-T14

VSSQ-A12 VSSQ-A14

VSSQ-C11 VSSQ-C12 VSSQ-C14

VSSQ-E12 VSSQ-E14

VSSQ-F10 VSSQ-H13 VSSQ-K13 VSSQ-M10

VSSQ-N12 VSSQ-N14

VSSQ-R11 VSSQ-R12 VSSQ-R14

VSSQ-V12 VSSQ-V14

A A

QD16~23

QD0~7

VMA_CMD9[14] VMA_CMD6[14] VMA_CMD7[14] VMA_CMD4[14] VMA_CMD3[14] VMA_CMD1[14] VMA_CMD2[14] VMA_CMD11[14] VMA_CMD10[14]

VMA_CMD8[14]

VMA_WCK01[14] VMA_WCK01#[14]

VMA_WCK23[14] VMA_WCK23#[14]

VMA_CMD12[14] VMA_CMD15[14]

VMA_CMD14[14] VMA_CLKN0[14] VMA_CLKP0[14]

VMA_CMD0[14] VMA_CMD5[14]

R124 120/F_4R124 120/F_4 R386 1K_4R386 1K_4

VMA_CMD13[14]

1 2

R105 1K_4R105 1K_4

VREFC_VMA1

VREFD_VMA1

B B

C C

VMA_DQ23 VMA_DQ22 VMA_DQ21 VMA_DQ20 VMA_DQ19 VMA_DQ18 VMA_DQ17 VMA_DQ16

VMA_DQ7 VMA_DQ6 VMA_DQ5 VMA_DQ4 VMA_DQ3 VMA_DQ2 VMA_DQ1 VMA_DQ0

VMA_DM2 VMA_DM0

VMA_WDQS2 VMA_WDQS0

VMA_CMD14

VMA_CMD13

SEN_A

T4 U2 U4

M13 M11 N13 N11 T13 T11 U13 U11 F13 F11 E13 E11 B13 B11 A13 A11

K10 K11 H10 H11

H5 H4

D4 D5

P5 R2

R13 C13

P13 D13

J3 J11 J12

G12

L12

J13 J10

A5 U5

A10 U10

J14

+1.5V_GFX +1.5V_GFX

VDDQ-B1

VDDQ-B3

B12 B14 D1

VDDQ-D1

VDDQ-D3

D12

VDDQ-E5 VDDQ-F1

VDDQ-F3

VDDQ-G2 VDDQ-H3 VDDQ-K3

VDDQ-L2

VDDQ-M1 VDDQ-M3

VDDQ-N5 VDDQ-P1

VDDQ-P3

VDDQ-T1 VDDQ-T3

VDD-C5 VDD-C10 VDD-D11

VDD-G1

VDD-G4 VDD-G11 VDD-G14

VDD-L1

VDD-L4 VDD-L11 VDD-L14 VDD-P11

VDD-R5

VDD-R10

VSSQ-A1 VSSQ-A3

VSSQ-C1 VSSQ-C3 VSSQ-C4

VSSQ-E1 VSSQ-E3

VSSQ-F5

VSSQ-H2 VSSQ-K2 VSSQ-M5 VSSQ-N1

VSSQ-N3

VSSQ-R1 VSSQ-R3 VSSQ-R4

VSSQ-V1 VSSQ-V3

VSS-B5 VSS-B10 VSS-D10

VSS-G5

VSS-G10

VSS-H1 VSS-H14

VSS-K1

VSS-K14

VSS-L5

VSS-L10

VSS-P10

VSS-T5

VSS-T10

D14 E5 E10 F1 F3 F12 F14 G2 G13 H3 H12 K3 K12 L2 L13 M1 M3 M12 M14 N5 N10 P1 P3 P12 P14 T1 T3 T12 T14

C5 C10 D11 G1 G4 G11 G14 L1 L4 L11 L14 P11 R5 R10

A1 A3 A12 A14 C1 C3 C4 C11 C12 C14 E1 E3 E12 E14 F5 F10 H2 H13 K2 K13 M5 M10 N1 N3 N12 N14 R1 R3 R4 R11 R12 R14 U1 U3 U12 U14

B5 B10 D10 G5 G10 H1 H14 K1 K14 L5 L10 P10 T5 T10

U28

QD8~15

QD24~31

VMA_CMD9[14] VMA_CMD10[14] VMA_CMD11[14] VMA_CMD1[14] VMA_CMD2[14] VMA_CMD4[14] VMA_CMD3[14] VMA_CMD7[14] VMA_CMD6[14]

VMA_WCK23[14] VMA_WCK23#[14]

VMA_WCK01[14] VMA_WCK01#[14]

+1.5V_GFX

VMA_CMD8[14]

VMA_CMD15[14] VMA_CMD12[14]

VMA_CMD14[14] VMA_CLKN0[14] VMA_CLKP0[14]

VMA_CMD5[14] VMA_CMD0[14]

R123 120/F_4R123 120/F_4

VMA_CMD13[14]

1 2

R111 1K_4R111 1K_4

VREFC_VMA1

VREFD_VMA1

VMA_DQ15 VMA_DQ14 VMA_DQ13 VMA_DQ12 VMA_DQ11 VMA_DQ10 VMA_DQ9 VMA_DQ8

VMA_DQ31 VMA_DQ30 VMA_DQ29 VMA_DQ28 VMA_DQ27 VMA_DQ26 VMA_DQ25 VMA_DQ24

VMA_DM1 VMA_DM3

VMA_WDQS1 VMA_WDQS3

VMA_CMD14

VMA_CMD13

SEN_A

MF=1 MF=0

M2 M4

N2 N4 T2 T4 U2

U4 M13 M11 N13 N11 T13 T11 U13 U11 F13 F11 E13 E11 B13 B11 A13 A11

K5 K10 K11 H10 H11

R2 R13 C13

P2 P13 D13

J11 J12

G12 L12

J13 J10

U5 A10

U10

J14

GDDR5

WCK01 | WCK23 WCK01# | WCK23#

WCK23 | WCK01 WCK23# | WCK01#

EDC3 | EDC0 EDC2 | EDC1 EDC1 | EDC2 EDC0 | EDC3

DBI3# | DBI0# DBI2 #| DBI1# DBI1# | DBI2# DBI0# | DBI3#

RAS# | CAS# CAS# | RAS#

CKE# CK# CK

CS# | WE# WE# | CS#

ZQ SEN

RESET# MF

Vpp,NC Vpp,NC1

VREFD1 VREFD2

VREFC

ABI#

VDDQ-B1

VDDQ-B3 VDDQ-B12 VDDQ-B14

VDDQ-D1

VDDQ-D3 VDDQ-D12 VDDQ-D14

VDDQ-E5 VDDQ-E10

VDDQ-F1

VDDQ-F3 VDDQ-F12 VDDQ-F14

VDDQ-G2 VDDQ-G13

VDDQ-H3 VDDQ-H12

VDDQ-K3 VDDQ-K12

VDDQ-L2 VDDQ-L13

VDDQ-M1

VDDQ-M3 VDDQ-M12 VDDQ-M14

VDDQ-N5 VDDQ-N10

VDDQ-P1

VDDQ-P3 VDDQ-P12 VDDQ-P14

VDDQ-T1

VDDQ-T3 VDDQ-T12 VDDQ-T14

VDD-C5 VDD-C10 VDD-D11

VDD-G1

VDD-G4

VDD-G11 VDD-G14

VDD-L1

VDD-L4 VDD-L11 VDD-L14 VDD-P11

VDD-R5

VDD-R10

VSSQ-A1

VSSQ-A3 VSSQ-A12 VSSQ-A14

VSSQ-C1

VSSQ-C3

VSSQ-C4 VSSQ-C11 VSSQ-C12 VSSQ-C14

VSSQ-E1

VSSQ-E3 VSSQ-E12 VSSQ-E14

VSSQ-F5 VSSQ-F10

VSSQ-H2 VSSQ-H13

VSSQ-K2 VSSQ-K13

VSSQ-M5 VSSQ-M10

VSSQ-N1

VSSQ-N3 VSSQ-N12 VSSQ-N14

VSSQ-R1

VSSQ-R3

VSSQ-R4 VSSQ-R11 VSSQ-R12 VSSQ-R14

VSSQ-V1

VSSQ-V3 VSSQ-V12 VSSQ-V14

VSS-B5 VSS-B10 VSS-D10

VSS-G5

VSS-G10

VSS-H1 VSS-H14

VSS-K1 VSS-K14

VSS-L5

VSS-L10

VSS-P10

VSS-T5

VSS-T10

B1 B3 B12 B14 D1 D3 D12 D14 E5 E10 F1 F3 F12 F14 G2 G13 H3 H12 K3 K12 L2 L13 M1 M3 M12 M14 N5 N10 P1 P3 P12 P14 T1 T3 T12 T14

C5 C10 D11 G1 G4 G11 G14 L1 L4 L11 L14 P11 R5 R10

A1 A3 A12 A14 C1 C3 C4 C11 C12 C14 E1 E3 E12 E14 F5 F10 H2 H13 K2 K13 M5 M10 N1 N3 N12 N14 R1 R3 R4 R11 R12 R14 U1 U3 U12 U14

B5 B10 D10 G5 G10 H1 H14 K1 K14 L5 L10 P10 T5 T10

QD48~55

QD32~39

VMA_WCK45[14] VMA_WCK45#[14]

VMA_WCK67[14] VMA_WCK67#[14]

VMA_CMD24[14]

VMA_CMD25[14] VMA_CMD22[14] VMA_CMD23[14] VMA_CMD20[14] VMA_CMD19[14] VMA_CMD17[14] VMA_CMD18[14] VMA_CMD27[14] VMA_CMD26[14]

VMA_CMD28[14] VMA_CMD31[14]

VMA_CMD30[14] VMA_CLKN1[14] VMA_CLKP1[14]

VMA_CMD16[14] VMA_CMD21[14]

R391 120/F_4R391 120/F_4

1 2

R403 1K_4R403 1K_4

VMA_CMD29[14]

1 2

R112 1K_4R112 1K_4

VREFC_VMA3

VREFD_VMA3

VMA_DQ55 VMA_DQ54 VMA_DQ53 VMA_DQ52 VMA_DQ51 VMA_DQ50 VMA_DQ49 VMA_DQ48

VMA_DQ39 VMA_DQ38 VMA_DQ37 VMA_DQ36 VMA_DQ35 VMA_DQ34 VMA_DQ33 VMA_DQ32

VMA_DM6 VMA_DM4

VMA_WDQS6 VMA_WDQS4

VMA_CMD30

VMA_CMD29

SEN_B

M2 M4 N2 N4 T2 T4 U2 U4

M13 M11 N13 N11 T13 T11 U13 U11 F13 F11 E13 E11 B13 B11 A13 A11

F2 F4 E2 E4 B2 B4 A2 A4

J5 K4 K5

K10 K11 H10 H11

H5 H4

D4 D5

P4 P5

R13 C13

C2 P2

P13 D13

J11 J12

G12

L12

J13 J10

A5 U5

A10 U10

J14

GDDR5

WCK01 | WCK23 WCK01# | WCK23#

WCK23 | WCK01 WCK23# | WCK01#

EDC3 | EDC0 EDC2 | EDC1 EDC1 | EDC2 EDC0 | EDC3

DBI3# | DBI0# DBI2 #| DBI1# DBI1# | DBI2# DBI0# | DBI3#

RAS# | CAS# CAS# | RAS#

CKE# CK# CK

CS# | WE# WE# | CS#

ZQ SEN

RESET# MF

Vpp,NC Vpp,NC1

VREFD1 VREFD2

VREFC

ABI#

VDDQ-B1

VDDQ-B3 VDDQ-B12 VDDQ-B14

VDDQ-D1

VDDQ-D3 VDDQ-D12 VDDQ-D14

VDDQ-E5 VDDQ-E10

VDDQ-F1

VDDQ-F3 VDDQ-F12 VDDQ-F14

VDDQ-G2

VDDQ-G13

VDDQ-H3 VDDQ-H12

VDDQ-K3 VDDQ-K12

VDDQ-L2

VDDQ-L13 VDDQ-M1

VDDQ-M3 VDDQ-M12 VDDQ-M14

VDDQ-N5

VDDQ-N10

VDDQ-P1

VDDQ-P3 VDDQ-P12 VDDQ-P14

VDDQ-T1

VDDQ-T3

VDDQ-T12 VDDQ-T14

VDD-C5 VDD-C10 VDD-D11

VDD-G1

VDD-G4

VDD-G11 VDD-G14

VDD-L1

VDD-L4 VDD-L11 VDD-L14 VDD-P11

VDD-R5

VDD-R10

VSSQ-A1

VSSQ-A3 VSSQ-A12 VSSQ-A14

VSSQ-C1

VSSQ-C3

VSSQ-C4

VSSQ-C11 VSSQ-C12 VSSQ-C14

VSSQ-E1

VSSQ-E3 VSSQ-E12 VSSQ-E14

VSSQ-F5 VSSQ-F10

VSSQ-H2

VSSQ-H13

VSSQ-K2 VSSQ-K13

VSSQ-M5

VSSQ-M10

VSSQ-N1

VSSQ-N3

VSSQ-N12 VSSQ-N14

VSSQ-R1

VSSQ-R3

VSSQ-R4

VSSQ-R11 VSSQ-R12 VSSQ-R14

VSSQ-V1

VSSQ-V3 VSSQ-V12 VSSQ-V14

VSS-B5 VSS-B10 VSS-D10

VSS-G5

VSS-G10

VSS-H1 VSS-H14

VSS-K1 VSS-K14

VSS-L5 VSS-L10 VSS-P10

VSS-T5 VSS-T10

B1 B3 B12 B14 D1 D3 D12 D14 E5 E10 F1 F3 F12 F14 G2 G13 H3 H12 K3 K12 L2 L13 M1 M3 M12 M14 N5 N10 P1 P3 P12 P14 T1 T3 T12 T14

C5 C10 D11 G1 G4 G11 G14 L1 L4 L11 L14 P11 R5 R10

A1 A3 A12 A14 C1 C3 C4 C11 C12 C14 E1 E3 E12 E14 F5 F10 H2 H13 K2 K13 M5 M10 N1 N3 N12 N14 R1 R3 R4 R11 R12 R14 U1 U3 U12 U14

B5 B10 D10 G5 G10 H1 H14 K1 K14 L5 L10 P10 T5 T10

QD40~47

QD56~63

VMA_WCK67[14] VMA_WCK67#[14]

VMA_WCK45[14] VMA_WCK45#[14]

+1.5V_GFX

VMA_CMD24[14]

VMA_CMD25[14] VMA_CMD26[14] VMA_CMD27[14] VMA_CMD17[14] VMA_CMD18[14] VMA_CMD20[14] VMA_CMD19[14] VMA_CMD23[14] VMA_CMD22[14]

VMA_CMD31[14] VMA_CMD28[14]

VMA_CMD30[14] VMA_CLKN1[14] VMA_CLKP1[14]

VMA_CMD21[14] VMA_CMD16[14]

R399 120/F_4R399 120/F_4

VMA_CMD29[14]

1 2

R117 1K_4R117 1K_4

VMA_DQ47 VMA_DQ46 VMA_DQ45 VMA_DQ44 VMA_DQ43 VMA_DQ42 VMA_DQ41 VMA_DQ40

VMA_DQ63 VMA_DQ62 VMA_DQ61 VMA_DQ60 VMA_DQ59 VMA_DQ58 VMA_DQ57 VMA_DQ56

VMA_DM5 VMA_DM7

VMA_WDQS5 VMA_WDQS7

VREFC_VMA3

VREFD_VMA3

VMA_CMD30

SEN_B

VMA_CMD29

931/F_4

R104

VREF_VMA1_MOS

R122

549/F_4

1 2

1.33K/F_4

C100

C100 820P/50V_4

820P/50V_4

1 2

C462 1U/6.3V_4C462 1U/6.3V_4 C449 1U/6.3V_4C449 1U/6.3V_4 C139 1U/6.3V_4C139 1U/6.3V_4 C137 1U/6.3V_4C137 1U/6.3V_4 C511 0.1U/16V_4C511 0.1U/16V_4

1 2

C508 0.047U/10V_4C508 0.047U/10V_4

1 2

C499 0.1U/16V_4C499 0.1U/16V_4

1 2

C502 0.047U/10V_4C502 0.047U/10V_4

1 2

C10 *0.1U/16V_4_NCC10 *0.1U/16V_4_NC

1 2

C7 *0.1U/16V_4_NCC7 *0.1U/16V_4_NC

1 2

R120

931/F_4

1 2

VREFD_VMA1

R115

C115

C115 820P/50V_4

820P/50V_4

1 2

VMA_CLKP0

R397

80.6/F_4

VMA_CLKN0

D D

+1.5V_GFX

C106 *330U/2.5V_3528_NC

C106 *330U/2.5V_3528_NC C175 1U/6.3V_4C175 1U/6.3V_4

C458 10U/6.3V_8C45 8 10U/6.3V_8

1 2

C166 10U/6.3V_8C16 6 10U/6.3V_8

1 2

C464 10U/6.3V_8C46 4 10U/6.3V_8

1 2

+1.5V_GFX +1.5V_GFX +1.5V_GFX +1.5V_GFX

C105 1U/6.3V_4C105 1U/6.3V_4 C168 1U/6.3V_4C168 1U/6.3V_4 C167 1U/6.3V_4C167 1U/6.3V_4 C498 0.047U/10V_4C498 0.047U/10V_4

1 2

C103 0.1U/16V_4C103 0.1U/16V_4

1 2

C163 0.047U/10V_4C163 0.047U/10V_4

1 2

C162 0.1U/16V_4C162 0.1U/16V_4

1 2

C165 0.1U/16V_4C165 0.1U/16V_4

1 2

C164 0.1U/16V_4C164 0.1U/16V_4

1 2

+1.5V_GFX +1.5V_GFX

R98

549/F_4

VREFC_VMA1

R102

1.33K/F_4

1 2

VREF_VMA1_MOS

2N7002WQ62N7002W

C170 1U/6.3V_4C170 1U/6.3V_4 C169 1U/6.3V_4C169 1U/6.3V_4 C176 1U/6.3V_4C176 1U/6.3V_4

C108 0.1U/16V_4C108 0.1U/16V_4

1 2

C470 0.1U/16V_4C470 0.1U/16V_4

1 2

C178 0.1U/16V_4C178 0.1U/16V_4

1 2

C177 *0.1U/16V_4_NCC177 *0.1U/16V_4_NC

1 2

C172 *0.1U/16V_4_NCC172 *0.1U/16V_4_NC

1 2

C171 *0.1U/16V_4_NCC171 *0.1U/16V_4_NC

1 2

GPIO10_VREF

2N7002W

Q12

VREF_VMA3_MOS

GPIO10_VREF

C488 1U/6.3V_4C488 1U/6.3V_4 C487 *1U/6.3V_4_NCC487 *1U/6.3V_4_NC C63 1U/6.3V_4C63 1U/6.3V_4 C49 1U/6.3V_4C49 1U/6.3V_4 C56 0.047U/10V_4C56 0.047U/10V_4

1 2

C110 0.047U/10V_4C110 0.047U/10V_4

1 2

C485 0.1U/16V_4C485 0.1U/16V_4

1 2

C483 0.1U/16V_4C483 0.1U/16V_4

1 2

C500 0.1U/16V_4C500 0.1U/16V_4

1 2

C501 0.1U/16V_4C501 0.1U/16V_4

1 2

R99

R99 100K_4

100K_4

GPIO10_VREF [16,19]

+1.5V_GFX +1.5V_GFX

R113

931/F_4

549/F_4

VREFC_VMA3 VREFD_VMA3

R108

1.33K/F_4

1 2

VMA_CMD14 VMA_CMD30

VMA_CMD13 VMA_CMD29

VREF_VMA3_MOS

R118

549/F_4

1 2

1.33K/F_4

C135

C135 820P/50V_4

820P/50V_4

1 2

R394

R392

931/F_4

1 2

R396

C514

C514 820P/50V_4

820P/50V_4

1 2

+1.5V_GFX

R11610K_4 R11610K_4

R10610K_4 R10610K_4

R12110K_4 R12110K_4

R10010K_4 R10010K_4

VMA_CLKP1

R97

80.6/F_4

VMA_CLKN1

Size Document Number Rev

Date: Sheet of

GDDR5 Mode H Mapping

< 0-31 > < 32-63 > Memory

Quanta Computer Inc.

PROJECT :

N13P-GS VRAM-1(GDDR5 BGA170)

Friday, March 02, 2012

R09A

18 58

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