QUANTA R08 Schematics
1
2
3
4
5
6
7
8
R08/V08 BLOCK DIAGRAM
A A
DDRIII-SODIMM1
H=4mm
PAGE11
DDRIII 1600 MT/s
CPU
Ivy Bridge 35W /
PCIEx16
N13P-GS (128bit)
N13P-GL (128bit)
Sandy Bridge
DDRIII-SODIMM2
H=8mm
PAGE12
DDRIII 1600 MT/s
PGA 988
PAGE 6~10
Nvidia
29mm X 29mm
BGA 908
PAGE 13~17
DDR3 1GB
V08x only
64Mx16bitx8
PCIE[1]
PCIE[5]
25MHz
DDR3 2GB
128Mx16bitx8
PAGE 18~19
USB[5]USB[4]
RJ45
Card Reader
SIM CARD
Page2
PAGE32 PAGE40
USB[10]
10/100 support
China Go-Rural
SATA1
Fingerprint
USB[8]
USB3.0 Ports x1
page4
IO SB
HDMI CONN
PAGE29
CRT CONN
LCD CONN
Camera
PAGE27
PAGE28
PAGE27
USB[12]
PCB STACK UP
6L
LAYER 1 : TOP
LAYER 2 : VCC
LAYER 3 : IN1
LAYER 4 : IN2
LAYER 5 : GND
LAYER 6 : BOT
DIS
FDI LINK
2.7GT /s
B B
SATA -HDD
PAGE34
ODD
PAGE34
SATA0 600MB /S
SATA3 300MB /S
Mobile Intel
DMI LINK
5GT /s
iGFX Interfaces
INT HDMI
INT CRT
INT Dual CHANNEL LVDS
Series 7 Chipset
USB3.0 Ports x2
USB PWR SHARE x1
PAGE31
PAGE31
USB3.0
USB3.0
PCH
HM77
USB2.0
Panther Point
3-axis Fall Sensor
C C
Keyboard Conn.
PAGE40
PAGE33
SMBUS
LPC
BGA 989
25 mm X 25 mm
PCI-E
KBC
Touch Pad
D D
PAGE40
ITE 8518
PAGE 38
SPI
PWM FAN
&Thermal
PAGE42 PAGE39 PAGE39
SPI ROM
8MB
SPI ROM
8MB
PAGE 20~26
25MHz
IHDA
32.768KHz
WLAN/BT WWAN/mSATA
page3 page3
PCI-E
LAN
AR8161(1G)
AR8162(10/100)
Page 2
IHDA
Audio Codec
PAGE37
JackSpeaker Digital-MIC
MB Side
PAGE37 PAGE37 PAGE27
1
2
3
4
5
X2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, February 13, 2012
Date: Sheet of
Monday, February 13, 2012
Date: Sheet of
6
Monday, February 13, 2012
7
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
R08
R08
R08
1 55
1 55
1 55
8
1A
1A
1A
1
SMBCLK
H14
SMBDATA
C9
A A
PCH
C8
SML0CLK
G12
SML0DATA
+3.3V_SUS
2
2.2K2.2K
+3.3V_RUN
N-MOSFET
N-MOSFET
WLAN_SCLK
WLAN_SDATA
+3.3V_RUN
2.2K
3
+3.3V_RUN
+3.3V_SUS
2.2K
4
5
6
7
8
202
200
JDIM1A
2.2K2.2K
A0
202
200
JDIM2A
A4
6
FALL SENSOR
4
STM LNG3DM
50
+3.3V_SUS
2.2K2.2K
E14
SMB_CLK_ME1
M16
SMB_DATA_ME1
+3.3V_ALW
B B
SMBDAT1116
SMBCLK1
115
+3.3V_ALW
SIO
ITE8518E
110
SMBCLK0
111 SMBDAT0
+3.3V_RUN
2.2K2.2K
SMBCLK3
C C
94
SMBDAT3
95
SCREW PAD
H17
H16
H16
h-c154d154n
h-c154d154n
1
H21
H21
o-r08-1
D D
o-r08-1
1
H17
1
H22
H22
1
1
h-c154d154n
h-c154d154n
h-o118x142d118x142n
h-o118x142d118x142n
H18
H18
1
H-C142D142N
H-C142D142N
H23
H23
1
H-C276D276N
H-C276D276N
H19
H19
1
H-C142D142N
H-C142D142N
2
2.2K2.2K
2.2K2.2K
MB
H1
O-R08-2H1O-R08-2
1
H9
H9
H-C315IC158D118P2
H-C315IC158D118P2
1
3
+3.3V_SUS
H2
H2
H-C236D118P2
H-C236D118P2
1
H10
H10
H-C315IC158D118P2
H-C315IC158D118P2
1
N-MOS
N-MOS
8
7
8
7
H-C315IC158D118P2
H-C315IC158D118P2
H-TC236BC197D118P2
H-TC236BC197D118P2
+3.3V_SUS
100
100
H3
H3
H12
H12
1
1
3
4
9
8
Charger
THERMAL(EMC1422)
THERMAL (G781-1P8)
H4
H4
H5
H5
H-C315IC158D118P2
H-C315IC158D118P2
1
H13
H13
H-C315IC158D118P2-1
H-C315IC158D118P2-1
1
4
Battery
98
9A
H6
H6
H-TC236I20BC197D118P2
H-TC236I20BC197D118P2
1
1
H14
H14
H-C276D118P2
H-C276D118P2
1
16h
12
H-C315IC158D118P2
H-C315IC158D118P2
Function
DDR3
Thermal IC
Charge IC
Battery
Fall Sensor
H7
H7
H8
H8
H-C315IC158D118P2
H-C315IC158D118P2
1
1
5
JDIM1A A0h
SMBus AddressIC
JDIM2A A4h
EMC1422 1001100xb (98h)
G781-1P8
BQ24707ARGRR
Battery
STM LNG3DM
For CPU Use
H-C315IC158D118P2
H-C315IC158D118P2
20120206
Modify H11 pin1,2,3,4 no connect to GND
20120209
Modify H11 pin3 connect to GND
1001101xb (9Ah)
0b0001001x (0x12h)
16h
01010000 (50h)
H11
H11
2
*H-C283D146P2-r08_NC
*H-C283D146P2-r08_NC
intel-cpu-bkt2-r08
intel-cpu-bkt2-r08
34
1
6
20120204
Modify PV1 PV2 subsystem ID to OTH
20120204
Add two label PN HCR07003010 and HCJM5004013
PV1
PV1
emipad98x79-3_1h
emipad98x79-3_1h
1
LABEL68X5.5JM5
LABEL68X5.5JM5
LABEL1
LABEL1
7
PV2
PV2
emipad118x79-3_1h
emipad118x79-3_1h
1
30X6MM,ON SMT,R07
30X6MM,ON SMT,R07
LABEL2
LABEL2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, February 13, 2012
Date: Sheet of
Monday, February 13, 2012
Date: Sheet of
Monday, February 13, 2012
PROJECT :
SMB/SCREW PAD
SMB/SCREW PAD
SMB/SCREW PAD
R08
R08
R08
8
2 55
2 55
2 55
1A
1A
1A
1
2
3
4
5
6
7
8
USB Master
A A
USB0
USB1
USB2
USB3
USB4
USB5
B B
USB6
Port Assignment
External port#1 (USB3.0)
External port#2 (USB3.0/eSATA/
Power share/ debug port)
External port#3 (USB3.0)
External port#4 (USB3.0)
MiniCard 1 (WLAN/BT)
MiniCard 2 (WWAN/WiMAX)
X(FOR HM77)
SATA0
SATA1
SATA2
SATA3
SATA4
SATA5
Port AssignmentSATA Master
HDD
mSATA
NC
ODD
eSATA (NC)
NC
PCIE 1
PCIE 2
PCIE 3
PCIE 4
PCIE 5
PCIE 6
PCIE 7
Port AssignmentPCIE Master
WLAN
WWAN (NC)
Card reader (NC)
NC
LAN
Express card (NC)
NC
NCPCIE 8
USB7
X(FOR HM77)
FingerprintUSB8
USB9
USB10
USB11
USB12
Touch panel (NC, for debug)
Card Reader
Express Card (NC)
Camera
C C
D D
USB13
1
NC
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, February 13, 2012 3 55
Date: Sheet of
Monday, February 13, 2012 3 55
Date: Sheet of
2
3
4
5
6
Monday, February 13, 2012 3 55
7
PROJECT :
PORT ASSIGNMENT
PORT ASSIGNMENT
PORT ASSIGNMENT
R08
1A
1A
1A
8
5
4
3
2
1
Adapter 90W
Charger
BQ24707ARGRR
D D
PWR_SRC
Shapes: 280mil
Via: 10
VER : 1A
Battery 3S2P
+3.3V_EN2 ALW_ON
TI (PU1)
TPS51125ARGER
+3.3V_ALW
TDC: 3.87A
Shapes: 155mil
C C
Via: 6
SUS_ON
Load Switch(PQ17)
FDC655BN
+3.3V_SUS
TDC: 0.2A
Shapes: 8mil
Via: 1
B B
+5V_ALW
TDC: 18A
Shapes: 720mil
Via: 26
Load Switch(PQ23)
FDC655BN
+5V_SUS
TDC: 1.41A
Shapes: 56.4mil
Via: 2
RUN_ON
Load Switch(PQ22)
TPCC8065-H
+3.3V_RUN
TDC: 3.52A
Shapes: 140.8mil
Via: 5
+15V_ALW
SUS_ON
Load Switch(PQ16)
TPCC8065-H
+5V_RUN
TDC: 3.5A
Shapes: 140mil
Via: 5
DGPU_PWR_EN
Load Switch(PQ18)
FDC655BN
For dGPU only
+3V_GFX
TDC: 0.2A
Shapes: 8mil
Via: 1
SIO_SLP_S4#
SIO_SLP_S3#
+1.5V_SUS
TDC: 8.15A
Shapes: 326mil
Via: 12
RUN_ON
1.05V_PCH_PWRGD
RichTek(PU6)
RT8068AZQW
+1.8V_RUN
TDC: 1.02A
Shapes: 40.8mil
Via: 2
1.5V_SUS_PWRGD
TI(PU2)
TPS51216RUKR
+0.75V_DDR_VTT
TDC: 1A
Shapes: 40mil
Via: 2
RUN_ON
Load Switch(PQ25)
TPCC8065-H
+1.5V_RUN
TDC: 1A
Shapes: 40mil
Via: 2
LDO
RT8241DGQW
+1.5V_SUS
+VCCSA_CORE
RichTek(PU5)
TDC: 4.2A
Shapes: 168mil
Via: 6
DGPU_PWR_ON#
Load Switch(PQ24)
TPCC8065-H
For dGPU only For dGPU only
+1.5V_GFX
TDC: 1A
Shapes: 40mil
For dGPU
Via: 2
VCCSA_EN
SIO_SLP_S3#
Load Switch(Q4)
FDMS7670
+1.5V_CPU
TDC: 5A
Shapes: 200mil
Via: 8
RichTek(PU3)
RT8240BGQW
+1.05V_PCH
TDC: 10.39A
Shapes: 415.6mil
Via: 15
Load Switch(PQ27)
FDMS7670
+1.05V_GFX
TDC: 1A
Shapes: 40mil
Via: 2
+3.3V_RUN
DGFX_VR_PWRGD
IMVP_VR_ON
ON(PU7)
NCP6132A
PQ35 PQ36 PQ37
+VCC_CORE
TDC: 42.4A
Shapes: 1696mil
Via: 61
+VCC_iGFX_CORE
TDC: 23A
Shapes: 920mil
Via: 33
ON(PU11)
NCP3218MNR2G
+VCC_DGFX_CORE
TDC: 40A
Shapes: 1600mil
Via: 57
+3V_GFX
For dGPU only
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Power Block Diagram
Power Block Diagram
Power Block Diagram
Date: Sheet of
Monday, February 13, 2012 4 55
Date: Sheet of
Monday, February 13, 2012 4 55
Date: Sheet of
5
4
3
2
Monday, February 13, 2012 4 55
PROJECT :
R08
R08
R08
1A
1A
1A
1
1
Battery Mode
+5V_ALW
+3.3V_ALW
A A
B B
C C
+5V_ALW
+3.3V_ALW
+1.5V_SUS
D D
SUS
SW
G
+PWR_SRC
DDR/0.75V
S3
S4
SLP_S3
SWITCH
G
+PWR_SRC
RUN PWR
SWITCH
G
+PWR_SRC
1.05V
VR
EN
1
PG
RC Delay
PG
2
+5V_SUS
+3.3V_SUS
SUS_ON
+1.5V_SUS
+DDR_VTTREF
+0.75V_DDR_VTT
1.5V_SUS_PWRGD
SIO_SLP_S3#
SIO_SLP_S4#
+1.5V_CPU+1.5V_SUS
SIO_SLP_S3#
+GFX_PWR_SRC
+5V_RUN
+3.3V_RUN
+1.5V_RUN
RUN_ON
+1.05V_PCH
1.05V_PCH_PWRGD
30
+3.3V_RUN
2
21
11
12
10
26
27
28
25
29
20
22
23
24
19
18
19
VCCSA_PWRGD
34
+5V_ALW
SVID
42
3
1.8V
VR
EN
+PWR_SRC
VCCSA
VR
EN
+PWR_SRC
IMVP
VR
3
4
3
POWER_SW_IN0#
PWR SW VR
SYS_PWR_SW#
7
EC_PWROK
RUN_ON
+3.3V_ALW
+1.5V_SUS
36
3637
EC
IMVP_VR_ON
19
35
HWPG
10
SUS_ON
25
31
+1.8V_RUN
VCCSA_EN
PG
32
33
+VCCSA_CORE
34
VCCSA_PWRGD
PG
VCCSA_EN
+VCC_CORE
+VCC_GFX_CORE
IMVP_PWRGD
PG
EN
43
47
44
IMVP_VR_ON
4
5
SIO_SLP_S5#17SIO_SLP_S4#18SIO_SLP_S3#
GPU PWR
SWITCH
G
+PWR_SRC
GPU
VR
EN
GPU PWR
SWITCH
G
GPUCPUPCH
5
2
+5V_ALW2
3.3V_ALW_ON
4
6
ALW_ON
13
RSMRST#
ME_SUS_PWR_ACK
AC_PRESENT
SIO_PWRBTN#
16
49
+3V_GFX
+1.5V_GFX
DGPU_PWR_EN
50
+VCC_DGFX_CORE
DGFX_VR_PWRGD
PG
+3.3V_GFX
53
+1.05V_GFX+1.05V_PCH
DGFX_VR_PWRGD
52
6
+PWR_SRC
3V/5V
EN2
14
15
53
48
51
6
EN1
SIO_SLP_S5#
SIO_SLP_S4#
SIO_SLP_S3#
PM_DRAM_PWRGD
38
PCH_CLK
SYS_PWROK
DGPU_PWR_EN
48
Buffer
44
IMVP_PWRGD
37
EC_PWROK
38
PM_DRAM_PWRGD
37
EC_PWROK
46
PLTRST#
DGPU_HOLD_RST#
55
+3.3V_ALW
+5V_ALW
+15V_ALW
39
7
1
+VCHGR+PWR_SRC
8
5
8
9
17
18
19
DGPU_PWROK
54
CHARGER Battery
DPWROK
SUSWARN#
ACPRESENT
PWRBTN#
SLP_S5#
SLP_S3#
APWROK
DRAMPWROK
SYS_PWROK
SYS_PWROK
45
55
PCH
PROCPWRGD
H_PWRGOOD
DGPU_HOLD_RST#
41
46
40
U2
SM_SDRAMPWROK
SVID
42
UNCOREPWRGOOD
CPU
56
GPU_RST#
GPU
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, February 13, 2012 5 55
Date: Sheet of
Monday, February 13, 2012 5 55
Date: Sheet of
Monday, February 13, 2012 5 55
7
PROJECT :
POWER SEQUENCE
POWER SEQUENCE
POWER SEQUENCE
R08
8
PLTRST#
RESET# PLTRST#
1A
1A
1A
5
4
Ivy Bridge Processor (RESERVED, CFG)
3
2
1
DP & PEG Compensation
+1.05V_PCH
D D
U1A
U1A
DMI_TXN020
DMI_TXN120
DMI_TXN220
DMI_TXN320
DMI_TXP020
DMI_TXP120
DMI_TXP220
DMI_TXP320
DMI_RXN020
DMI_RXN120
DMI_RXN220
DMI_RXN320
DMI_RXP020
DMI_RXP120
DMI_RXP220
DMI_RXP320
C C
B B
eDP_ICOMPO 12mil
eDP_COMPIO 4mil
Programing Disable eDP interface(BIOS)
FDI_FSYNC020
FDI_FSYNC120
FDI_LSYNC020
FDI_LSYNC120
FDI_TXN020
FDI_TXN120
FDI_TXN220
FDI_TXN320
FDI_TXN420
FDI_TXN520
FDI_TXN620
FDI_TXN720
FDI_TXP020
FDI_TXP120
FDI_TXP220
FDI_TXP320
FDI_TXP420
FDI_TXP520
FDI_TXP620
FDI_TXP720
FDI_INT20
eDP_COMP
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7
FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7
FDI_FSYNC0
FDI_FSYNC1
FDI_INT
FDI_LSYNC0
FDI_LSYNC1
B27
DMI_RX#[0]
B25
DMI_RX#[1]
A25
DMI_RX#[2]
B24
DMI_RX#[3]
B28
DMI_RX[0]
B26
DMI_RX[1]
A24
DMI_RX[2]
B23
DMI_RX[3]
G21
DMI_TX#[0]
E22
DMI_TX#[1]
F21
DMI_TX#[2]
D21
DMI_TX#[3]
G22
DMI_TX[0]
D22
DMI_TX[1]
F20
DMI_TX[2]
C21
DMI_TX[3]
A21
FDI0_TX#[0]
H19
FDI0_TX#[1]
E19
FDI0_TX#[2]
F18
FDI0_TX#[3]
B21
FDI1_TX#[0]
C20
FDI1_TX#[1]
D18
FDI1_TX#[2]
E17
FDI1_TX#[3]
A22
FDI0_TX[0]
G19
FDI0_TX[1]
E20
FDI0_TX[2]
G18
FDI0_TX[3]
B20
FDI1_TX[0]
C19
FDI1_TX[1]
D19
FDI1_TX[2]
F17
FDI1_TX[3]
J18
FDI0_FSYNC
J17
FDI1_FSYNC
H20
FDI_INT
J19
FDI0_LSYNC
H17
FDI1_LSYNC
A18
eDP_COMPIO
A17
eDP_ICOMPO
B16
eDP_HPD
C15
eDP_AUX
D15
eDP_AUX#
C17
eDP_TX[0]
F16
eDP_TX[1]
C16
eDP_TX[2]
G15
eDP_TX[3]
C18
eDP_TX#[0]
E16
eDP_TX#[1]
D16
eDP_TX#[2]
F15
eDP_TX#[3]
Ivy Bridge_rPGA_2DPC_Rev0p61
Ivy Bridge_rPGA_2DPC_Rev0p61
DMI
DMI
Intel(R) FDI
Intel(R) FDI
eDP
eDP
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PCI EXPRESS* - GRAPHICS
PCI EXPRESS* - GRAPHICS
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
VGA(U3)
A A
N13P-GL
N13P-GS
5
4
PEG_ICOMPO 12mil
PEG_ICOMPI, PEG_RCOMPO 4mil,
J22
J21
H22
K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32
J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32
M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25
M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25
PEG_COMP
PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15
PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15
PEG_TXN0_C
PEG_TXN1_C PEG_TXN1
PEG_TXN2_C
PEG_TXN3_C
PEG_TXN4_C
PEG_TXN5_C
PEG_TXN6_C
PEG_TXN7_C
PEG_TXN8_C
PEG_TXN9_C
PEG_TXN10_C
PEG_TXN11_C
PEG_TXN12_C
PEG_TXN13_C
PEG_TXN14_C
PEG_TXN15_C
PEG_TXP0_C
PEG_TXP1_C
PEG_TXP2_C
PEG_TXP3_C
PEG_TXP4_C
PEG_TXP5_C
PEG_TXP6_C
PEG_TXP7_C
PEG_TXP8_C
PEG_TXP9_C
PEG_TXP10_C
PEG_TXP11_C
PEG_TXP12_C
PEG_TXP13_C
PEG_TXP14_C
PEG_TXP15_C
C1 0.1U/16V_4C1 0.1U/16V_4
C2 0.1U/16V_4C2 0.1U/16V_4
C3 0.1U/16V_4C3 0.1U/16V_4
C4 0.1U/16V_4C4 0.1U/16V_4
C5 0.1U/16V_4C5 0.1U/16V_4
C6 0.1U/16V_4C6 0.1U/16V_4
C7 0.1U/16V_4C7 0.1U/16V_4
C8 0.1U/16V_4C8 0.1U/16V_4
C9 0.1U/16V_4C9 0.1U/16V_4
C10 0.1U/16V_4C10 0.1U/16V_4
C11 0.1U/16V_4C11 0.1U/16V_4
C12 0.1U/16V_4C12 0.1U/16V_4
C13 0.1U/16V_4C13 0.1U/16V_4
C14 0.1U/16V_4C14 0.1U/16V_4
C15 0.1U/16V_4C15 0.1U/16V_4
C16 0.1U/16V_4C16 0.1U/16V_4
C17 0.1U/16V_4C17 0.1U/16V_4
C18 0.1U/16V_4C18 0.1U/16V_4
C19 0.1U/16V_4C19 0.1U/16V_4
C20 0.1U/16V_4C20 0.1U/16V_4
C21 0.1U/16V_4C21 0.1U/16V_4
C22 0.1U/16V_4C22 0.1U/16V_4
C23 0.1U/16V_4C23 0.1U/16V_4
C24 0.1U/16V_4C24 0.1U/16V_4
C25 0.1U/16V_4C25 0.1U/16V_4
C26 0.1U/16V_4C26 0.1U/16V_4
C27 0.1U/16V_4C27 0.1U/16V_4
C28 0.1U/16V_4C28 0.1U/16V_4
C29 0.1U/16V_4C29 0.1U/16V_4
C30 0.1U/16V_4C30 0.1U/16V_4
C31 0.1U/16V_4C31 0.1U/16V_4
C32 0.1U/16V_4C32 0.1U/16V_4
PEG_RXN0 13
PEG_RXN1 13
PEG_RXN2 13
PEG_RXN3 13
PEG_RXN4 13
PEG_RXN5 13
PEG_RXN6 13
PEG_RXN7 13
PEG_RXN8 13
PEG_RXN9 13
PEG_RXN10 13
PEG_RXN11 13
PEG_RXN12 13
PEG_RXN13 13
PEG_RXN14 13
PEG_RXN15 13
PEG_RXP0 13
PEG_RXP1 13
PEG_RXP2 13
PEG_RXP3 13
PEG_RXP4 13
PEG_RXP5 13
PEG_RXP6 13
PEG_RXP7 13
PEG_RXP8 13
PEG_RXP9 13
PEG_RXP10 13
PEG_RXP11 13
PEG_RXP12 13
PEG_RXP13 13
PEG_RXP14 13
PEG_RXP15 13
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
0.22uF AC coupling Caps for PCIE GEN3
0.1uF AC coupling Caps for PCIE GEN1/2
AC coupling Cap
0.1uF
0.22uF
CH4103K1B08 C1~C32
CH4223K1B00
3
PEG_TXN0
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15
PN
PEG_TXN0 13
PEG_TXN1 13
PEG_TXN2 13
PEG_TXN3 13
PEG_TXN4 13
PEG_TXN5 13
PEG_TXN6 13
PEG_TXN7 13
PEG_TXN8 13
PEG_TXN9 13
PEG_TXN10 13
PEG_TXN11 13
PEG_TXN12 13
PEG_TXN13 13
PEG_TXN14 13
PEG_TXN15 13
PEG_TXP0 13
PEG_TXP1 13
PEG_TXP2 13
PEG_TXP3 13
PEG_TXP4 13
PEG_TXP5 13
PEG_TXP6 13
PEG_TXP7 13
PEG_TXP8 13
PEG_TXP9 13
PEG_TXP10 13
PEG_TXP11 13
PEG_TXP12 13
PEG_TXP13 13
PEG_TXP14 13
PEG_TXP15 13
20120203
Change C1~C32 to 0.1U/16V_4 (CH4103K1B08)
TX location RX location(page13)
C144 C145 C147 C149 C150
C152 C154 C156 C157 C158
C159 C160 C161 C162 C163
C164 C165 C166 C167 C168
C169 C171 C173 C175 C176
C177 C178 C179 C180 C182
C184 C185
C144 C145 C147 C149 C150
C152 C154 C156 C157 C158
C159 C160 C161 C162 C163
C1~C32
C164 C165 C166 C167 C168
C169 C171 C173 C175 C176
C177 C178 C179 C180 C182
C184 C185
2
eDP_COMP
eDP_COMPIO and ICOMPO signals should
be shorted near balls and
routed within 500 mils
PEG_ICOMPI and RCOMPO signals should
be routed within 500 mils
PEG_ICOMPO signals should
be routed within 500 mils
PEG_COMP
R1 24.9/F_4R1 24.9/F_4
1 2
+1.05V_PCH
R2 24.9/F_4R2 24.9/F_4
1 2
eDP Hot-plug (Disable)
CAD Note: Place PU resistor within 2 inches
of CPU
This signal can be left as no connect if
entire eDP interface is disabled.
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, February 13, 2012
Date: Sheet of
Monday, February 13, 2012
Date: Sheet of
Monday, February 13, 2012
PROJECT :
Ivy Bridge 1/5
Ivy Bridge 1/5
Ivy Bridge 1/5
1
R08
R08
R08
6 55
6 55
6 55
1A
1A
1A
5
4
3
2
1
Ivy Bridge Processor (CLK,MISC,JTAG)
U1B
U1B
SNB_IVB# N.A at SNB EDS #27637 0.7v1
H_SNB_IVB#23
D D
IMVP7_PROCHOT#38,52,54
Over 130 degree C will
drive low
C C
H_CPUDET#38
PECI_EC38
H_PM_SYNC20
H_PWRGOOD25
PLTRST#13,23,35,38
PECI_EC
IMVP7_PROCHOT#
PM_THRMTRIP#25
H_PWRGOOD
R19 1.5K/F_4R19 1.5K/F_4
H_SNB_IVB#
H_CPUDET#
TP1TP1
CATERR#
R6 43_4R6 43_4
1 2
R7 56_4R7 56_4
1 2
PM_THRMTRIP#
12
R1710K_4 R1710K_4
12
SM_DRAMPWROK
CPU_PLTRST#_RPLTRST#
12
R20
R20
750/F_4
750/F_4
PECI_EC_R
H_PROCHOT#
Intel spec VinH min =VCCIO X 0.7
C26
PROC_SELECT#
AN34
SKTOCC#
AL33
CATERR#
AN33
PECI
AL32
PROCHOT#
AN32
THERMTRIP#
AM34
PM_SYNC
AP33
UNCOREPWRGOOD
V8
SM_DRAMPWROK
AR33
RESET#
Ivy Bridge_rPGA_2DPC_Rev0p61
Ivy Bridge_rPGA_2DPC_Rev0p61
Boot S3
MISCTHERMALPWR MANAGEMENT
MISCTHERMALPWR MANAGEMENT
S3 RSM
CLOCKS
CLOCKS
DDR3
DDR3
JTAG & BPM
JTAG & BPM
DPLL_REF_CLK
DPLL_REF_CLK#
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
MISC
MISC
A28
BCLK
A27
BCLK#
CLK_DP_P_R
A16
CLK_DP_N_R
A15
CPU_DRAMRST#
R8
SM_RCOMP_0
AK1
SM_RCOMP_1
A5
SM_RCOMP_2
A4
SM_RCOMP_0, SM_RCOMP_1 20mil / SM_RCOMP_2 15mil.
AP29
PRDY#
AP27
PREQ#
TCK
TMS
TRST#
TDO
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
TDI
AR26
AR27
AP30
AR28
AP26
AL35
AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32
XDP_TCLK
XDP_TMS
XDP_TRST#H_PM_SYNC
XDP_TDI
XDP_TDO
XDP_DBRST#
CLK_CPU_BCLKP
CLK_CPU_BCLKN
R4 1K_4R4 1K_4
1 2
R5 1K_4R5 1K_4
1 2
For eDP
R8 140/F_4R8 140/F_4
1 2
R9 25.5/F_4R9 25.5/F_4
1 2
R10 200/F_4R10 200/F_4
1 2
TP28TP28
TP37TP37
TP38TP38
TP41TP41
TP42TP42
+3.3V_RUN
1 2
R18 1K_4R18 1K_4
CLK_CPU_BCLKP 24
CLK_CPU_BCLKN 24
+1.05V_PCH
IMVP7_PROCHOT#
R14 62_4R14 62_4
12
+1.05V_PCH
DRAM_PWRGD
SYS_PWROK
SM_DRAMPWROK
U2
U2
74AHC1G09GW
74AHC1G09GW
3 5
+1.5V_CPU
12
C33
C33
0.1U/16V_4
0.1U/16V_4
SM_DRAMPWROK_R
4
4
+1.5V_CPU
R25
R25
200_4
200_4
1 2
R27 130_4R27 130_4
1 2
100 ns after +1.5V_CPU
reaches 80%
Follow #DG1.5 471984 P119
SM_DRAMPWROK
Follow #DG1.5 471984 P130
DRAMRST# Routing Illustration
+1.5V_SUS
Q1
Q1
R21
R21
2N7002W
2N7002W
1K_4
1K_4
1 2
DDR3_DRAMRST#11,12
DDR_HVREF_RST_PCH9,24
3
R22 1K_4R22 1K_4
DDR_HVREF_RST_PCH
2
12
+3.3V_SUS
1 2
R26 1K_4R26 1K_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, February 13, 2012
Date: Sheet of
Monday, February 13, 2012
Date: Sheet of
Monday, February 13, 2012
3 1
2
12
C34
C34
0.047U/10V_4
0.047U/10V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Ivy Bridge 2/5
Ivy Bridge 2/5
Ivy Bridge 2/5
1
12
R23
R23
4.99K/F_4
4.99K/F_4
R08
R08
R08
7 55
7 55
7 55
CPU_DRAMRST#DDR3_DRAMRST#_RDDR3_DRAMRST#
1A
1A
1A
B B
Follow #DG1.5 471984 P128
DDR Power Gating Topology
A A
C854 *100P/50V_4_NCC854 *100P/50V_4_NC
12
C860 *100P/50V_4_NCC860 *100P/50V_4_NC
12
PM_DRAM_PWRGD20
EC_PWROK20,38
5
PM_DRAM_PWRGD
EC_PWROK
H_PROCHOT#
CPU_PLTRST#_R
12
R24
R24
200_4
200_4
+3.3V_SUS
2
1
5
4
3
2
1
Ivy Bridge Processor (DDR3)
U1D
D10
K10
AM5
AM6
AR3
AP3
AN3
AN2
AN1
AP2
AP5
AN9
AT5
AT6
AP6
AN8
AR6
AR5
AR9
AJ11
AT8
AT9
AH11
AR8
AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15
AA9
AA7
AA10
AB8
AB9
C9
A7
C8
A9
A8
D9
D8
G4
F4
F1
G1
G5
F5
F2
G2
K9
J10
K8
K7
M5
N4
N2
N1
M4
N5
M2
M1
R6
J7
J8
J9
U1D
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CAS#
SB_RAS#
SB_WE#
M_B_CLKP0
AE2
SB_CLK[0]
SB_CLK#[0]
SB_CKE[0]
SB_CLK[1]
SB_CLK#[1]
SB_CKE[1]
SB_CLK[2]
SB_CLK#[2]
SB_CKE[2]
SB_CLK[3]
SB_CLK#[3]
SB_CKE[3]
SB_CS#[0]
SB_CS#[1]
SB_CS#[2]
SB_CS#[3]
SB_ODT[0]
SB_ODT[1]
SB_ODT[2]
SB_ODT[3]
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_DQS[7]
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
AD2
R9
AE1
AD1
R10
AB2
AA2
T9
AA1
AB1
T10
AD3
AE3
AD6
AE6
AE4
AD4
AD5
AE5
D7
F3
K6
N3
AN5
AP9
AK12
AP15
C7
G3
J6
M3
AN6
AP8
AK11
AP14
AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4
M_B_CLKN0
M_B_CKE0
M_B_CLKP1
M_B_CLKN1
M_B_CKE1
M_B_CS#0
M_B_CS#1
M_B_ODT0
M_B_ODT1
M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7
M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_CLKP0 12
M_B_CLKN0 12
M_B_CKE0 12
M_B_CLKP1 12
M_B_CLKN1 12
M_B_CKE1 12
M_B_CS#0 12
M_B_CS#1 12
M_B_ODT0 12
M_B_ODT1 12
M_B_DQSN[7..0] 12
M_B_DQSP[7..0] 12
M_B_A[15..0] 12
U1C
U1C
D D
C C
B B
M_A_DQ[63..0]11
M_A_BS011
M_A_BS111
M_A_BS211
M_A_CAS#11
M_A_RAS#11
M_A_WE#11
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_BS0
M_A_BS1
M_A_BS2
M_A_CAS#
M_A_RAS#
M_A_WE#
F10
G10
N10
M10
AG6
AG5
AK6
AK5
AH5
AH6
AJ5
AJ6
AJ8
AK8
AJ9
AK9
AH8
AH9
AL9
AL8
AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15
AE10
AF10
AE8
AD9
AF9
C5
D5
D3
D2
D6
C6
C2
C3
F8
G9
F9
F7
G8
G7
K4
K5
K1
J1
J5
J4
J2
K2
M8
N8
N7
M9
N9
M7
V6
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
SA_CLK#[0]
SA_CLK#[1]
SA_CLK#[2]
SA_CLK#[3]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_CLK[0]
SA_CKE[0]
SA_CLK[1]
SA_CKE[1]
SA_CLK[2]
SA_CKE[2]
SA_CLK[3]
SA_CKE[3]
SA_CS#[0]
SA_CS#[1]
SA_CS#[2]
SA_CS#[3]
SA_ODT[0]
SA_ODT[1]
SA_ODT[2]
SA_ODT[3]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AB6
AA6
V9
AA5
AB5
V10
AB4
AA4
W9
AB3
AA3
W10
AK3
AL3
AG1
AH1
AH3
AG3
AG2
AH2
C4
G6
J3
M6
AL6
AM8
AR12
AM15
D4
F6
K3
N6
AL5
AM9
AR11
AM14
AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7
M_A_CLKN0
M_A_CKE0
M_A_CLKP1
M_A_CLKN1
M_A_CKE1
M_A_CS#0
M_A_CS#1
M_A_ODT0
M_A_ODT1
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_CLKP0 11
M_A_CLKN0 11
M_A_CKE0 11
M_A_CLKP1 11
M_A_CLKN1 11
M_A_CKE1 11
M_A_CS#0 11
M_A_CS#1 11
M_A_ODT0 11
M_A_ODT1 11
M_A_DQSN[7..0] 11
M_A_DQSP[7..0] 11
M_A_A[15..0] 11
M_A_CLKP0
M_B_DQ[63..0]12
M_B_BS012
M_B_BS112
M_B_BS212
M_B_CAS#12
M_B_RAS#12
M_B_WE#12
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_BS0
M_B_BS1
M_B_BS2
M_B_CAS#
M_B_RAS#
M_B_WE#
Ivy Bridge_rPGA_2DPC_Rev0p61
Ivy Bridge_rPGA_2DPC_Rev0p61
Ivy Bridge_rPGA_2DPC_Rev0p61
A A
5
4
3
Ivy Bridge_rPGA_2DPC_Rev0p61
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, February 13, 2012
Date: Sheet of
Monday, February 13, 2012
Date: Sheet of
Monday, February 13, 2012
PROJECT :
Ivy Bridge 3/5
Ivy Bridge 3/5
Ivy Bridge 3/5
1
R08
R08
R08
8 55
8 55
8 55
1A
1A
1A
5
Ivy Bridge Processor
CPU Core Power
SNB: 53A
IVY: 53A
10uF x 24
C35
C35
C38
C43
C43
C58
C58
C76
C76
C82
C82
C89
C89
12
10U/6.3V_8
10U/6.3V_8
12
10U/6.3V_8
10U/6.3V_8
12
10U/6.3V_8
10U/6.3V_8
12
10U/6.3V_8
10U/6.3V_8
12
10U/6.3V_6
10U/6.3V_6
12
10U/6.3V_6
10U/6.3V_6
C38
C44
C44
C59
C59
C77
C77
C83
C83
C90
C90
12
10U/6.3V_8
10U/6.3V_8
12
10U/6.3V_8
10U/6.3V_8
12
10U/6.3V_8
10U/6.3V_8
12
10U/6.3V_8
10U/6.3V_8
12
10U/6.3V_6
10U/6.3V_6
12
10U/6.3V_6
10U/6.3V_6
C37
C37
12
D D
10U/6.3V_6
10U/6.3V_6
C51
C51
12
10U/6.3V_6
10U/6.3V_6
C57
C57
12
10U/6.3V_8
10U/6.3V_8
C75
C75
12
10U/6.3V_8
10U/6.3V_8
C C
C81
C81
12
10U/6.3V_6
10U/6.3V_6
C88
C88
12
10U/6.3V_6
10U/6.3V_6
B B
C50
C50
C36
C36
C60
C60
C78
C78
C84
C84
C91
C91
12
10U/6.3V_8
10U/6.3V_8
12
10U/6.3V_8
10U/6.3V_8
12
10U/6.3V_8
10U/6.3V_8
12
10U/6.3V_8
10U/6.3V_8
12
10U/6.3V_6
10U/6.3V_6
12
10U/6.3V_6
10U/6.3V_6
+VCC_CORE
AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26
POWER
POWER
U1F
U1F
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100
Ivy Bridge_rPGA_2DPC_Rev0p61
Ivy Bridge_rPGA_2DPC_Rev0p61
CORE SUPPLY
CORE SUPPLY
SENSE LINES SVID
SENSE LINES SVID
VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8
VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24
VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
PEG AND DDR
PEG AND DDR
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39
VCCIO40
VIDALERT#
VIDSCLK
VIDSOUT
VCC_SENSE
VSS_SENSE
VCCIO_SENSE
VSS_SENSE_VCCIO
4
AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12
E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
J23
AJ29
AJ30
AJ28
AJ35
AJ34
B10
A10
1.05V_PCH
SNB: 8.5A
IVY: 8.5A
10F x12
C45
C45
C61
C61
H_CPU_SVIDALRT#
VR_SVID_CLK
VR_SVID_DATA
1 2
R39 100/F_4R39 100/F_4
1 2
R40 100/F_4R40 100/F_4
1 2
R41 10_4R41 10_4
1 2
R42 10_4R42 10_4
+1.05V_PCH
C52
C52
10U/6.3V_8
10U/6.3V_8
12
12
10U/6.3V_8
10U/6.3V_8
C62
C62
10U/6.3V_8
10U/6.3V_8
12
12
10U/6.3V_8
10U/6.3V_8
SMDDR_VREF_DQ0_M3_C
*AP2302GN_NC
*AP2302GN_NC
SMDDR_VREF_DQ1_M3_C
*AP2302GN_NC
*AP2302GN_NC
+VCC_CORE
VCCSENSE
VSSSENSE
+1.05V_PCH
VCCIO_SENSE
VSSIO_SENSE
C46
C46
C63
C63
10U/6.3V_8
10U/6.3V_8
12
10U/6.3V_8
10U/6.3V_8
12
Q2
Q2
Q3
Q3
C47
C47
C64
C64
2
2
C49
C49
C48
C48
10U/6.3V_8
10U/6.3V_8
12
12
10U/6.3V_8
10U/6.3V_8
C65
C65
C66
C66
10U/6.3V_8
10U/6.3V_8
12
12
10U/6.3V_8
10U/6.3V_8
M3 VREF
SMDDR_VREF_DQ0_M3
31
DDR_HVREF_RST_PCH
SMDDR_VREF_DQ1_M3
31
Vgs=2.5V Rds=115m
VCCSENSE 52
VSSSENSE 52
VCCIO_SENSE 50
VSSIO_SENSE 50
3
12
*10U/6.3V_8_NC
*10U/6.3V_8_NC
12
10U/6.3V_8
10U/6.3V_8
+1.8V_RUN
CPU VGT
SNB: 21.5A
IVY: 33A
10uF x 12
C39
C39
12
22U/6.3V_8
22U/6.3V_8
C53
C53
12
22U/6.3V_8
22U/6.3V_8
C67
C67
12
22U/6.3V_8
22U/6.3V_8
CPU VCCPL
SNB: 1.2A
IVY: 1.2A
10uF x 1
1uF x 2
SMDDR_VREF_DQ0_M3 11
DDR_HVREF_RST_PCH 7,24
SMDDR_VREF_DQ1_M3 12
+VCC_GFX_CORE
C40
C40
12
10U/6.3V_6
10U/6.3V_6
C54
C54
22U/6.3V_8
22U/6.3V_8
12
C68
C68
12
10U/6.3V_6
10U/6.3V_6
C92
C92
12
10U/6.3V_6
10U/6.3V_6
2
Ivy Bridge Processor (GRAPHIC POWER)
POWER
POWER
VAXG_SENSE
VSSAXG_SENSE
SENSE
LINES
SENSE
LINES
SM_VREF
SA_DIMM_VREFDQ
VREFMISC
VREFMISC
SB_DIMM_VREFDQ
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
DDR3 -1.5V RAILS
DDR3 -1.5V RAILS
SA RAIL
SA RAIL
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8
VCCSA_SENSE
VCCSA_VID[0]
VCCSA_VID[1]
VCCIO_SEL
PS_S3CNTRL 11
GRAPHICS
GRAPHICS
1.8V RAIL
1.8V RAIL
+5V_ALW +15V_ALW
12
R37
R37
10K_4
10K_4
PS_S3CNTRL
34
Q5A
Q5A
5
DMN66D0LDW-7
DMN66D0LDW-7
C41
C41
C55
C55
C93
C93
12
22U/6.3V_8
22U/6.3V_8
12
22U/6.3V_8
22U/6.3V_8
C69
C69
12
10U/6.3V_6
10U/6.3V_6
12
1U/6.3V_4
1U/6.3V_4
SIO_SLP_S3#20,38,48
C42
C42
C56
C56
22U/6.3V_8
22U/6.3V_8
C70
C70
C94
C94
12
10U/6.3V_6
10U/6.3V_6
12
12
22U/6.3V_8
22U/6.3V_8
12
1U/6.3V_4
1U/6.3V_4
AT24
AT23
AT21
AT20
AT18
AT17
AR24
AR23
AR21
AR20
AR18
AR17
AP24
AP23
AP21
AP20
AP18
AP17
AN24
AN23
AN21
AN20
AN18
AN17
AM24
AM23
AM21
AM20
AM18
AM17
AL24
AL23
AL21
AL20
AL18
AL17
AK24
AK23
AK21
AK20
AK18
AK17
AJ24
AJ23
AJ21
AJ20
AJ18
AJ17
AH24
AH23
AH21
AH20
AH18
AH17
SIO_SLP_S3#
B6
A6
A2
U1G
U1G
VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54
VCCPLL1
VCCPLL2
VCCPLL3
Ivy Bridge_rPGA_2DPC_Rev0p61
Ivy Bridge_rPGA_2DPC_Rev0p61
1 2
R28 100_4R28 100_4
VCC_AXG_SENSE
AK35
VSS_AXG_SENSE
AK34
1 2
R29 100_4R29 100_4
+VDDR_REF_CPU
AL1
CAD Note: +VDDR_REF_CPU should
have 10 mil trace width
SMDDR_VREF_DQ0_M3_C
B4
SMDDR_VREF_DQ1_M3_C
D1
R31
R31
R30
R30
*1K_4_NC
*1K_4_NC
*1K_4_NC
*1K_4_NC
1 2
C71
C71
12
10U/6.3V_6
10U/6.3V_6
C79
C79
12
10U/6.3V_6
10U/6.3V_6
12
C85
C85
10U/6.3V_6
10U/6.3V_6
1 2
R399 100_4R399 100_4
VCCSA_SENSE
VCCSA_VID0
VCCSA_VID1
1 2
VCCSA_VID0
VCCSA_VID1
12
R38
R38
100K_4
100K_4
61
Q5B
Q5B
2
DMN66D0LDW-7
DMN66D0LDW-7
1 2
C72
C72
12
10U/6.3V_6
10U/6.3V_6
C80
C80
12
10uF x 3
12
10U/6.3V_6
10U/6.3V_6
R33*0_4_NC R33*0_4_NC
PS_S3CNTRL_S
10U/6.3V_6
10U/6.3V_6
AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1
M27
M26
L26
J26
J25
J24
H26
H25
H23
C22
C24
A19
Take care Q3 Vgs(MAX)=2.5
1
+VCC_GFX_CORE
VCC_AXG_SENSE 52
VSS_AXG_SENSE 52
+VDDR_REF_CPU
CPU MCH
SNB: 5A
IVY: 5A
10uF x 6
C74
C74
C73
C73
12
12
10U/6.3V_6
10U/6.3V_6
10U/6.3V_6
10U/6.3V_6
CPU SA
SNB: 6A
IVY: 6A
12
C86
C86
C87
C87
10U/6.3V_6
10U/6.3V_6
H_VTTVID1
5A
Q4
AON7410Q4AON7410
8
762
5
4
12
C95
C95
*4700P/25V_4_NC
*4700P/25V_4_NC
+VDDR_REF_CPU
+3.3V_RUN
3
1
+VCCSA_CORE
VCCSA_SENSE 51
VCCSA_VID0 51
VCCSA_VID1 51
1 2
R34 1K_4R34 1K_4
1 2
R35 *1K_4_NCR35 *1K_4_NC
1 2
R36 1K_4R36 1K_4
S3 Power reduce
+1.5V_SUS +1.5V_CPU
+1.5V_CPU
+1.5V_CPU
+VCCSA_CORE
12
R32
R32
10K_4
10K_4
H_VTTVID1 50
+1.05V_PCH
R43
R43
1K/F_4
1K/F_4
A A
Layout note: need routing
together and ALERT need
between CLK and DATA
5
VR_SVID_CLK
VR_SVID_CLK 52
Place PU resistor close to CPU
+1.05V_PCH +1.05V_PCH
SVID DATA SVID ALERTSVID CLK
12
R45
R45
130_4
130_4
4
VR_SVID_DATA 52
Place PU resistor close to CPU
12
R46
R46
75/F_4
1 2
R47 43_4R47 43_4
75/F_4
3
VR_SVID_ALERT#H_CPU_SVIDALRT#VR_SVID_DATA
VR_SVID_ALERT# 52
2
1 2
12
0.1U/16V_4
0.1U/16V_4
R44
R44
C96
C96
1K/F_4
1K/F_4
1 2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, February 13, 2012
Date: Sheet of
Monday, February 13, 2012
Date: Sheet of
Monday, February 13, 2012
PROJECT :
Ivy Bridge 4/5
Ivy Bridge 4/5
Ivy Bridge 4/5
1
R08
R08
R08
9 55
9 55
9 55
1A
1A
1A
5
4
3
2
1
Ivy Bridge Processor (GND) Ivy Bridge Processor (RESERVED, CFG)
U1H
U1H
AT35
VSS1
AT32
VSS2
AT29
VSS3
AT27
VSS4
AT25
VSS5
AT22
VSS6
AT19
VSS7
AT16
VSS8
D D
C C
B B
AT13
VSS9
AT10
VSS10
AT7
VSS11
AT4
VSS12
AT3
VSS13
AR25
VSS14
AR22
VSS15
AR19
VSS16
AR16
VSS17
AR13
VSS18
AR10
VSS19
AR7
VSS20
AR4
VSS21
AR2
VSS22
AP34
VSS23
AP31
VSS24
AP28
VSS25
AP25
VSS26
AP22
VSS27
AP19
VSS28
AP16
VSS29
AP13
VSS30
AP10
VSS31
AP7
VSS32
AP4
VSS33
AP1
VSS34
AN30
VSS35
AN27
VSS36
AN25
VSS37
AN22
VSS38
AN19
VSS39
AN16
VSS40
AN13
VSS41
AN10
VSS42
AN7
VSS43
AN4
VSS44
AM29
VSS45
AM25
VSS46
AM22
VSS47
AM19
VSS48
AM16
VSS49
AM13
VSS50
AM10
VSS51
AM7
VSS52
AM4
VSS53
AM3
VSS54
AM2
VSS55
AM1
VSS56
AL34
VSS57
AL31
VSS58
AL28
VSS59
AL25
VSS60
AL22
VSS61
AL19
VSS62
AL16
VSS63
AL13
VSS64
AL10
VSS65
AL7
VSS66
AL4
VSS67
AL2
VSS68
AK33
VSS69
AK30
VSS70
AK27
VSS71
AK25
VSS72
AK22
VSS73
AK19
VSS74
AK16
VSS75
AK13
VSS76
AK10
VSS77
AK7
VSS78
AK4
VSS79
AJ25
VSS80
Ivy Bridge_rPGA_2DPC_Rev0p61
Ivy Bridge_rPGA_2DPC_Rev0p61
VSS
VSS
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2
U1I
U1I
T35
VSS161
T34
VSS162
T33
VSS163
T32
VSS164
T31
VSS165
T30
VSS166
T29
VSS167
T28
VSS168
T27
VSS169
T26
VSS170
P9
VSS171
P8
VSS172
P6
VSS173
P5
VSS174
P3
VSS175
P2
VSS176
N35
VSS177
N34
VSS178
N33
VSS179
N32
VSS180
N31
VSS181
N30
VSS182
N29
VSS183
N28
VSS184
N27
VSS185
N26
VSS186
M34
VSS187
L33
VSS188
L30
VSS189
L27
VSS190
L9
VSS191
L8
VSS192
L6
VSS193
L5
VSS194
L4
VSS195
L3
VSS196
L2
VSS197
L1
VSS198
K35
VSS199
K32
VSS200
K29
VSS201
K26
VSS202
J34
VSS203
J31
VSS204
H33
VSS205
H30
VSS206
H27
VSS207
H24
VSS208
H21
VSS209
H18
VSS210
H15
VSS211
H13
VSS212
H10
VSS213
H9
VSS214
H8
VSS215
H7
VSS216
H6
VSS217
H5
VSS218
H4
VSS219
H3
VSS220
H2
VSS221
H1
VSS222
G35
VSS223
G32
VSS224
G29
VSS225
G26
VSS226
G23
VSS227
G20
VSS228
G17
VSS229
G11
VSS230
F34
VSS231
F31
VSS232
F29
VSS233
Ivy Bridge_rPGA_2DPC_Rev0p61
Ivy Bridge_rPGA_2DPC_Rev0p61
VSS
VSS
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3
TP2TP2
TP5TP5
TP3TP3
TP4TP4
CFG2
U1E
U1E
AK28
CFG[0]
AK29
CFG[1]
AL26
CFG[2]
AL27
CFG[3]
AK26
CFG[4]
AL29
CFG[5]
AL30
CFG[6]
AM31
CFG[7]
AM32
CFG[8]
AM30
CFG[9]
AM28
CFG[10]
AM26
CFG[11]
AN28
CFG[12]
AN31
CFG[13]
AN26
CFG[14]
AM27
CFG[15]
AK31
CFG[16]
AN29
CFG[17]
AJ31
VAXG_VAL_SENSE
AH31
VSSAXG_VAL_SENSE
AJ33
VCC_VAL_SENSE
AH33
VSS_VAL_SENSE
AJ26
RSVD5
F25
RSVD8
F24
RSVD9
F23
RSVD10
D24
RSVD11
G25
RSVD12
G24
RSVD13
E23
RSVD14
D23
RSVD15
C30
RSVD16
A31
RSVD17
B30
RSVD18
B29
RSVD19
D30
RSVD20
B31
RSVD21
A30
RSVD22
C29
RSVD23
J20
RSVD24
B18
RSVD25
J15
RSVD27
Ivy Bridge_rPGA_2DPC_Rev0p61
Ivy Bridge_rPGA_2DPC_Rev0p61
VCC_DIE_SENSE
VSS_DIE_SENSE
CFG
CFG
RESERVED
RESERVED
AH27
AH26
L7
RSVD28
AG7
RSVD29
AE7
RSVD30
AK2
RSVD31
W8
RSVD32
AT26
RSVD33
AM33
RSVD34
AJ27
RSVD35
T8
RSVD37
J16
RSVD38
H16
RSVD39
G16
RSVD40
AR35
RSVD41
AT34
RSVD42
AT33
RSVD43
AP35
RSVD44
AR34
RSVD45
B34
RSVD46
A33
RSVD47
A34
RSVD48
B35
RSVD49
C35
RSVD50
AJ32
RSVD51
AK32
RSVD52
#27636 SNB EDS0.7v1 no function.
AN35
BCLK_ITP
AM35
BCLK_ITP#
AT2
RSVD56
AT1
RSVD57
AR1
RSVD58
B1
KEY
For rPGA socket, RSVD59 pin should be left NC
CFG[6:5] (PCIE Port Bifurcation Straps)
11: (Default) x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
Processor Strapping
A A
5
CFG2
(PEG Static Lane Reversal)
CFG4
(DP Presence Strap)
CFG7
(PEG Defer Training)
4
Normal Operation Lane Reversed
Disable; No physical DP attached to eDP
PEG train immediately following
xxRESETB de assertion
The CFG signals have a default value of '1' if not terminated on the board.
1 0
Enable; An ext DP device is connected to eDP
PEG wait for BIOS training
3
CFG2
R48 1K_4R48 1K_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Ivy Bridge 5/5
Ivy Bridge 5/5
Ivy Bridge 5/5
Monday, February 13, 2012
Monday, February 13, 2012
Monday, February 13, 2012
12
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
R08
R08
R08
10 55
10 55
10 55
1A
1A
1A
1
M_A_A[15..0]8
A A
SO-DIMMA SPD Address is 0XA0
SO-DIMMA TS Address is 0X30
M_A_BS08
M_A_BS18
M_A_BS28
M_A_CS#08
M_A_CS#18
M_A_CLKP08
M_A_CLKN08
M_A_CLKP18
M_A_CLKN18
M_A_CKE08
M_A_CKE18
M_A_CAS#8
RP2 10KX2RP2 10KX2
1
3
B B
C C
+1.5V_SUS
12
12
C98
C98
0.1U/16V_4
0.1U/16V_4
0.1U/16V_4
0.1U/16V_4
D D
M_A_RAS#8
M_A_WE#8
2
4
WLAN_SCLK12,24,33
WLAN_SDATA12,24,33
M_A_ODT08
M_A_ODT18
M_A_DQSP[7..0]8
M_A_DQSN[7..0]8
Place these Caps near So-Dimm0.
C101
C101
12
C100
C100
0.1U/16V_4
0.1U/16V_4
12
0.1U/16V_4
0.1U/16V_4
C99
C99
2
C102
C102
12
10U/6.3V_8
10U/6.3V_8
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS0
M_A_BS1
M_A_BS2
M_A_CS#0
M_A_CS#1
M_A_CLKP0
M_A_CLKN0
M_A_CLKP1
M_A_CLKN1
M_A_CKE0
M_A_CKE1
M_A_CAS#
M_A_RAS#
M_A_WE#
DIMM0_SA0
DIMM0_SA1
WLAN_SCLK
WLAN_SDATA
M_A_ODT0
M_A_ODT1
M_A_DQSP1
M_A_DQSP0
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN1
M_A_DQSN0
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
C103
C103
12
10U/6.3V_8
10U/6.3V_8
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200
116
120
11
28
46
63
136
153
170
187
12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186
C104
C104
12
10U/6.3V_8
10U/6.3V_8
SMDDR_VREF_DQ0_M39
JDIM1A
JDIM1A
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
ODT0
ODT1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DDR3-DIMM0
DDR3-DIMM0
+0.75V_DDR_VTT
C105
C105
12
10U/6.3V_8
10U/6.3V_8
3
(204P)
(204P)
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
C106
C106
12
10U/6.3V_8
10U/6.3V_8
M3 VREF
12
M_A_DQ12
5
DQ0
M_A_DQ11
7
DQ1
M_A_DQ9
15
DQ2
M_A_DQ14
17
DQ3
M_A_DQ8
4
DQ4
M_A_DQ10
6
DQ5
M_A_DQ15
16
DQ6
M_A_DQ13
18
DQ7
M_A_DQ4
21
DQ8
M_A_DQ5
23
DQ9
M_A_DQ3
33
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
M_A_DQ6
35
M_A_DQ0
22
M_A_DQ1
24
M_A_DQ7
34
M_A_DQ2
36
M_A_DQ20
39
M_A_DQ17
41
M_A_DQ19
51
M_A_DQ18
53
M_A_DQ16
40
M_A_DQ21
42
M_A_DQ22
50
M_A_DQ23
52
M_A_DQ29
57
M_A_DQ25
59
M_A_DQ30
67
M_A_DQ26
69
M_A_DQ28
56
M_A_DQ24
58
M_A_DQ27
68
M_A_DQ31
70
M_A_DQ33
129
M_A_DQ32
131
M_A_DQ35
141
M_A_DQ38
143
M_A_DQ37
130
M_A_DQ36
132
M_A_DQ34
140
M_A_DQ39
142
M_A_DQ44
147
M_A_DQ45
149
M_A_DQ43
157
M_A_DQ42
159
M_A_DQ41
146
M_A_DQ40
148
M_A_DQ47
158
M_A_DQ46
160
M_A_DQ49
163
M_A_DQ48
165
M_A_DQ54
175
M_A_DQ55
177
M_A_DQ53
164
M_A_DQ52
166
M_A_DQ50
174
M_A_DQ51
176
M_A_DQ60
181
M_A_DQ61
183
M_A_DQ62
191
M_A_DQ63
193
M_A_DQ56
180
M_A_DQ57
182
M_A_DQ59
192
M_A_DQ58
194
12
12
C107
C107
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
SMDDR_VREF_DQ0_M3
C108
C108
4
M_A_DQ[63..0] 8
12
*1U/6.3V_4_NC
*1U/6.3V_4_NC
12
EC830
EC830
EC829
EC829
*1U/6.3V_4_NC
*1U/6.3V_4_NC
R53 *0_4_NCR53 *0_4_NC
1 2
H=8mm,RVS
S3 Power reduce
+0.75V_DDR_VTT
R50
R50
22_4
22_4
1 2
Q7
Q7
31
PS_S3CNTRL
2
2N7002W
2N7002W
+1.5V_SUS
+SMDDR_VREF_DQ0
R51
R51
1K/F_4
1K/F_4
1 2
12
R54
R54
1K/F_4
1K/F_4
5
PS_S3CNTRL 9
M1 VREF
12
C109
C109
0.1U/16V_4
0.1U/16V_4
12
C110
C110
1U/10V_6
1U/10V_6
+3.3V_RUN
+1.5V_SUS
1 2
1 2
R52
R52
1K/F_4
1K/F_4
R55
R55
1K/F_4
1K/F_4
6
+3.3V_RUN
DDR3_DRAMRST#7,12
+SMDDR_VREF_DIMM0
R49 *10K_4_NCR49 *10K_4_NC
+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM0
12
C111
C111
0.1U/16V_4
0.1U/16V_4
12
C97
C97
0.1U/16V_4
0.1U/16V_4
1 2
12
C112
C112
1U/10V_6
1U/10V_6
+1.5V_SUS
DDR3_DRAMRST#
20120213
Change C110 C112 to 1U
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
199
77
122
125
198
30
1
126
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
7
JDIM1B
JDIM1B
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDDSPD
NC1
NC2
NCTEST
EVENT#
RESET#
VREF_DQ
VREF_CA
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
DDR3-DIMM0
DDR3-DIMM0
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
(204P)
(204P)
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VTT1
VTT2
GND
205
8
12
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
GND
206
+0.75V_DDR_VTT
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, February 13, 2012
Date: Sheet of
Monday, February 13, 2012
Date: Sheet of
1
2
3
4
5
6
Monday, February 13, 2012
7
PROJECT :
DDR3 DIMM-0
DDR3 DIMM-0
DDR3 DIMM-0
R08
R08
R08
11 55
11 55
11 55
8
1A
1A
1A
1
2
3
4
5
6
7
8
JDIM2A
M_B_A[15..0]8
A A
M_B_BS08
M_B_BS18
M_B_BS28
M_B_CS#08
M_B_CS#18
M_B_CLKP08
M_B_CLKN08
M_B_CLKP18
M_B_CLKN18
M_B_CKE08
M_B_CKE18
M_B_CAS#8
M_B_RAS#8
R57 10K_4R57 10K_4
1 2
R58 10K_4R58 10K_4
+3.3V_RUN
B B
C C
1 2
SO-DIMMB SPD Address is 0XA4
SO-DIMMB TS Address is 0X34
M_B_WE#8
WLAN_SCLK11,24,33
WLAN_SDATA11,24,33
M_B_ODT08
M_B_ODT18
M_B_DQSP[7..0]8
M_B_DQSN[7..0]8
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_BS0
M_B_BS1
M_B_BS2
M_B_CS#0
M_B_CS#1
M_B_CLKP0
M_B_CLKN0
M_B_CLKP1
M_B_CLKN1
M_B_CKE0
M_B_CKE1
M_B_CAS#
M_B_RAS#
M_B_WE#
DIMM1_SA0
DIMM1_SA1
WLAN_SCLK
WLAN_SDATA
M_B_ODT0
M_B_ODT1
M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200
116
120
11
28
46
63
136
153
170
187
12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186
JDIM2A
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
ODT0
ODT1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DDR3-DIMM1
DDR3-DIMM1
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
M_B_DQ4
5
DQ0
M_B_DQ5
7
DQ1
M_B_DQ3
15
DQ2
M_B_DQ7
17
DQ3
M_B_DQ0
4
DQ4
M_B_DQ1
6
DQ5
M_B_DQ6
16
DQ6
M_B_DQ2
18
DQ7
M_B_DQ8
21
DQ8
M_B_DQ9
23
DQ9
M_B_DQ15
33
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
(204P)
(204P)
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
M_B_DQ14
M_B_DQ12
M_B_DQ13
M_B_DQ10
M_B_DQ11
M_B_DQ17
M_B_DQ21
M_B_DQ19
M_B_DQ23
M_B_DQ16
M_B_DQ20
M_B_DQ18
M_B_DQ22
M_B_DQ28
M_B_DQ24
M_B_DQ25
M_B_DQ29
M_B_DQ31
M_B_DQ30
M_B_DQ26
M_B_DQ27
M_B_DQ36
M_B_DQ37
M_B_DQ34
M_B_DQ35
M_B_DQ32
M_B_DQ33
M_B_DQ38
M_B_DQ39
M_B_DQ44
M_B_DQ40
M_B_DQ42
M_B_DQ43
M_B_DQ45
M_B_DQ41
M_B_DQ46
M_B_DQ47
M_B_DQ53
M_B_DQ48
M_B_DQ54
M_B_DQ55
M_B_DQ52
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ61
M_B_DQ60
M_B_DQ63
M_B_DQ62
M_B_DQ57
M_B_DQ56
M_B_DQ59
M_B_DQ58
M_B_DQ[63..0] 8
H=4mm,RVS
+3.3V_RUN
12
C113
C113
0.1U/16V_4
0.1U/16V_4
+3.3V_RUN
DDR3_DRAMRST#7,11
+SMDDR_VREF_DQ1
+SMDDR_VREF_DIMM1
R56 *10K_4_NCR56 *10K_4_NC
1 2
DDR3_DRAMRST#
+1.5V_SUS
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
199
77
122
125
198
30
1
126
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
JDIM2B
JDIM2B
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDDSPD
NC1
NC2
NCTEST
EVENT#
RESET#
VREF_DQ
VREF_CA
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
DDR3-DIMM1
DDR3-DIMM1
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
(204P)
(204P)
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VTT1
VTT2
GND
205
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
GND
206
+0.75V_DDR_VTT
+1.5V_SUS
12
0.1U/16V_4
0.1U/16V_4
D D
1
Place these Caps near So-Dimm1.
12
C114
C114
12
C115
C115
0.1U/16V_4
0.1U/16V_4
12
C116
C116
0.1U/16V_4
0.1U/16V_4
2
C117
C117
0.1U/16V_4
0.1U/16V_4
12
10U/6.3V_8
10U/6.3V_8
C118
C118
12
C119
C119
10U/6.3V_8
10U/6.3V_8
12
C120
C120
10U/6.3V_8
10U/6.3V_8
12
*10U/6.3V_8_NC
*10U/6.3V_8_NC
SMDDR_VREF_DQ1_M39
3
+0.75V_DDR_VTT
C121
C121
12
C122
C122
10U/6.3V_8
10U/6.3V_8
M3 REF
12
12
1U/6.3V_4
1U/6.3V_4
C124
C124
C123
C123
1U/6.3V_4
1U/6.3V_4
SMDDR_VREF_DQ1_M3
4
12
12
*1U/6.3V_4_NC
*1U/6.3V_4_NC
EC832
EC832
EC831
EC831
*1U/6.3V_4_NC
*1U/6.3V_4_NC
R61 *0_4_NCR61 *0_4_NC
1 2
1 2
1 2
R59
R59
1K/F_4
1K/F_4
R62
R62
1K/F_4
1K/F_4
5
M1 VREF
C125
C125
12
0.1U/16V_4
0.1U/16V_4
C126
C126
12
1U/10V_6
1U/10V_6
+1.5V_SUS +SMDDR_VREF_DIMM1+1.5V_SUS +SMDDR_VREF_DQ1
R60
R60
1K/F_4
1 2
1 2
1K/F_4
R63
R63
1K/F_4
1K/F_4
C127
C127
12
0.1U/16V_4
0.1U/16V_4
6
20120213
Change C126 C128 to 1U
C128
C128
12
1U/10V_6
1U/10V_6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, February 13, 2012
Date: Sheet of
Monday, February 13, 2012
Date: Sheet of
Monday, February 13, 2012
7
PROJECT :
DDR3 DIMM-1
DDR3 DIMM-1
DDR3 DIMM-1
R08
R08
R08
12 55
12 55
12 55
8
1A
1A
1A
1
PEX_IOVDD+PEX_IOVDDQ >3.3A
+1.05V_GFX
A A
+1.05V_GFX
B B
+3V_GFX
C132 *0.1U/16V_4_NCC132 *0.1U/16V_4_NC
C133 0.1U/16V_4C133 0.1U/16V_4
C134 1U/6.3V_4C134 1U/6.3V_4
C135 1U/6.3V_4C135 1U/6.3V_4
C136 4.7U/6.3V_6C136 4.7U/6.3V_6
C137 10U/6.3V_8C137 10U/6.3V_8
C129 10U/6.3V_8C129 10U/6.3V_8
C138 0.047U/10V_4C138 0.047U/10V_4
C139 0.1U/16V_4C139 0.1U/16V_4
C130 1U/6.3V_4C130 1U/6.3V_4
C140 1U/6.3V_4C140 1U/6.3V_4
C141 4.7U/6.3V_6C141 4.7U/6.3V_6
C142 10U/6.3V_8C142 10U/6.3V_8
C131 10U/6.3V_8C131 10U/6.3V_8
0.1u *4 under GPU
Others Near GPU
C146 4.7U/6.3V_6C146 4.7U/6.3V_6
C148 1U/6.3V_4C148 1U/6.3V_4
C151 0.1U/16V_4C151 0.1U/16V_4
C153 0.1U/16V_4C153 0.1U/16V_4
C155 0.1U/16V_4C155 0.1U/16V_4
+VCC_DGFX_CORE
VDD_SENSE55
GND_SENSE55
12~16 mils width
BLM18AG121SN1D
0.1u under GPU
Others Near GPU
C C
C170 0.1U/16V_4C170 0.1U/16V_4
C172 1U/6.3V_4C172 1U/6.3V_4
C174 4.7U/6.3V_6C174 4.7U/6.3V_6
+3V_GFX
C181 0.1U/16V_4C181 0.1U/16V_4
C183 4.7U/6.3V_6C183 4.7U/6.3V_6
C475 4.7U/6.3V_6C475 4.7U/6.3V_6
+1.05V_GFX
C186 *0.1U/16V_4_NCC186 *0.1U/16V_4_NC
C187 *0.1U/16V_4_NCC187 *0.1U/16V_4_NC
C188 0.1U/16V_4C188 0.1U/16V_4
BLM18AG121SN1D
210mA
L2 0_6L2 0_6
1 2
1 2
1 2
~ 1000mA
12
12
12
12
12
12
12
2300mA
12
12
12
12
12
12
12
0.1u under GPU
Others Near GPU
12
12
12
12
12
R66 100_4R66 100_4
VDD_SENSE
GND_SENSE
R67 100_4R67 100_4
+1.05V_GFX
21
L1
L1
(120,200MA)
(120,200MA)
12
12
12
12~16 mils width
12
12
12
+PEX_SVDD_3V3
21
0.1u under GPU
Others Near GPU
12
12
120mA
+PEX_PLLVDD
2
AG19
AG21
AG22
AG24
AH21
AH25
AG13
AG15
AG16
AG18
AG25
AH15
AH18
AH26
AH27
AJ27
AK27
AL27
AM28
AN28
AG26
AG12
AH12
AJ11
U3A
U3A
N13P-GL-A1
N13P-GL-A1
PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4
PEX_IOVDD_5
PEX_IOVDD_6
PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8
PEX_IOVDDQ_9
PEX_IOVDDQ_10
PEX_IOVDDQ_11
PEX_IOVDDQ_12
PEX_IOVDDQ_13
PEX_IOVDDQ_14
J8
VDD33_1
K8
VDD33_2
L8
VDD33_3
M8
VDD33_4
L4
VDD_SENSE
L5
GND_SENSE
PEX_PLLVDD
P8
3V3AUX_NC
PEX_SVDD_3V3
PEX_PLL_HVDD
PEX_WAKE#
3
20120203
Change U3 to AJ0N13P0T02(N13P-GL)
20120204
Change U3 to AJ0N13P0T49(WINCON)
PEG_TXP15
AN12
GB4-128
GB4-128
PCI EXPRESS
PCI EXPRESS
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT*
PEX_RX0
PEX_RX0*
PEX_RX1
PEX_RX1*
PEX_RX2
PEX_RX2*
PEX_RX3
PEX_RX3*
PEX_RX4
PEX_RX4*
PEX_RX5
PEX_RX5*
PEX_RX6
PEX_RX6*
PEX_RX7
PEX_RX7*
PEX_RX8
PEX_RX8*
PEX_RX9
PEX_RX9*
PEX_RX10
PEX_RX10*
PEX_RX11
PEX_RX11*
PEX_RX12
PEX_RX12*
PEX_RX13
PEX_RX13*
PEX_RX14
PEX_RX14*
PEX_RX15
PEX_RX15*
PEX_TX0
PEX_TX0*
PEX_TX1
PEX_TX1*
PEX_TX2
PEX_TX2*
PEX_TX3
PEX_TX3*
PEX_TX4
PEX_TX4*
PEX_TX5
PEX_TX5*
PEX_TX6
PEX_TX6*
PEX_TX7
PEX_TX7*
PEX_TX8
PEX_TX8*
PEX_TX9
PEX_TX9*
PEX_TX10
PEX_TX10*
PEX_TX11
PEX_TX11*
PEX_TX12
PEX_TX12*
PEX_TX13
PEX_TX13*
PEX_TX14
PEX_TX14*
PEX_TX15
PEX_TX15*
PEX_REFCLK
PEX_REFCLK*
PEX_RST*
PEX_CLKREQ*
PEX_TERMP
TESTMODE
AM12
AN14
AM14
AP14
AP15
AN15
AM15
AN17
AM17
AP17
AP18
AN18
AM18
AN20
AM20
AP20
AP21
AN21
AM21
AN23
AM23
AP23
AP24
AN24
AM24
AN26
AM26
AP26
AP27
AN27
AM27
AK14
AJ14
AH14
AG14
AK15
AJ15
AL16
AK16
AK17
AJ17
AH17
AG17
AK18
AJ18
AL19
AK19
AK20
AJ20
AH20
AG20
AK21
AJ21
AL22
AK22
AK23
AJ23
AH23
AG23
AK24
AJ24
AL25
AK25
AL13
AK13
AJ26
AK26
AJ12
AK12
AP29
AK11
PEG_TXN15
PEG_TXP14
PEG_TXN14
PEG_TXP13
PEG_TXN13
PEG_TXP12
PEG_TXN12
PEG_TXP11
PEG_TXN11
PEG_TXP10
PEG_TXN10
PEG_TXP9
PEG_TXN9
PEG_TXP8
PEG_TXN8
PEG_TXP7
PEG_TXN7
PEG_TXP6
PEG_TXN6
PEG_TXP5
PEG_TXN5
PEG_TXP4
PEG_TXN4
PEG_TXP3
PEG_TXN3
PEG_TXP2
PEG_TXN2
PEG_TXP1
PEG_TXN1
PEG_TXP0
PEG_TXN0
PEG_RXP15_C
PEG_RXN15_C
PEG_RXP14_C
PEG_RXN14_C
PEG_RXP13_C
PEG_RXN13_C
PEG_RXP12_C
PEG_RXN12_C
PEG_RXP11_C
PEG_RXN11_C
PEG_RXP10_C
PEG_RXN10_C
PEG_RXP9_C
PEG_RXN9_C
PEG_RXP8_C
PEG_RXN8_C
PEG_RXP7_C
PEG_RXN7_C
PEG_RXP6_C
PEG_RXN6_C
PEG_RXP5_C
PEG_RXN5_C
PEG_RXP4_C
PEG_RXN4_C
PEG_RXP3_C
PEG_RXN3_C
PEG_RXP2_C
PEG_RXN2_C
PEG_RXP1_C
PEG_RXN1_C
PEG_RXP0_C
PEG_RXN0_C
PEX_TSTCLK
PEX_TSTCLK#
GPU_RST#
PEX_CLKREQ#
PEX_TERMP
TESTMODE
4
PEG_TXP15 6
PEG_TXN15 6
PEG_TXP14 6
PEG_TXN14 6
PEG_TXP13 6
PEG_TXN13 6
PEG_TXP12 6
PEG_TXN12 6
PEG_TXP11 6
PEG_TXN11 6
PEG_TXP10 6
PEG_TXN10 6
PEG_TXP9 6
PEG_TXN9 6
PEG_TXP8 6
PEG_TXN8 6
PEG_TXP7 6
PEG_TXN7 6
PEG_TXP6 6
PEG_TXN6 6
PEG_TXP5 6
PEG_TXN5 6
PEG_TXP4 6
PEG_TXN4 6
PEG_TXP3 6
PEG_TXN3 6
PEG_TXP2 6
PEG_TXN2 6
PEG_TXP1 6
PEG_TXN1 6
PEG_TXP0 6
PEG_TXN0 6
C144 0.1U/16V_4C144 0.1U/16V_4
1 2
C145 0.1U/16V_4C145 0.1U/16V_4
1 2
C147 0.1U/16V_4C147 0.1U/16V_4
1 2
C149 0.1U/16V_4C149 0.1U/16V_4
1 2
C150 0.1U/16V_4C150 0.1U/16V_4
1 2
C152 0.1U/16V_4C152 0.1U/16V_4
1 2
C154 0.1U/16V_4C154 0.1U/16V_4
1 2
C156 0.1U/16V_4C156 0.1U/16V_4
1 2
C157 0.1U/16V_4C157 0.1U/16V_4
1 2
C158 0.1U/16V_4C158 0.1U/16V_4
1 2
C159 0.1U/16V_4C159 0.1U/16V_4
1 2
C160 0.1U/16V_4C160 0.1U/16V_4
1 2
C161 0.1U/16V_4C161 0.1U/16V_4
1 2
C162 0.1U/16V_4C162 0.1U/16V_4
1 2
C163 0.1U/16V_4C163 0.1U/16V_4
1 2
C164 0.1U/16V_4C164 0.1U/16V_4
1 2
C165 0.1U/16V_4C165 0.1U/16V_4
1 2
C166 0.1U/16V_4C166 0.1U/16V_4
1 2
C167 0.1U/16V_4C167 0.1U/16V_4
1 2
C168 0.1U/16V_4C168 0.1U/16V_4
1 2
C169 0.1U/16V_4C169 0.1U/16V_4
1 2
C171 0.1U/16V_4C171 0.1U/16V_4
1 2
C173 0.1U/16V_4C173 0.1U/16V_4
1 2
C175 0.1U/16V_4C175 0.1U/16V_4
1 2
C176 0.1U/16V_4C176 0.1U/16V_4
1 2
C177 0.1U/16V_4C177 0.1U/16V_4
1 2
C178 0.1U/16V_4C178 0.1U/16V_4
1 2
C179 0.1U/16V_4C179 0.1U/16V_4
1 2
C180 0.1U/16V_4C180 0.1U/16V_4
1 2
C182 0.1U/16V_4C182 0.1U/16V_4
1 2
C184 0.1U/16V_4C184 0.1U/16V_4
1 2
C185 0.1U/16V_4C185 0.1U/16V_4
1 2
CLK_PCIE_VGAP
CLK_PCIE_VGAN
R68 *200_4_NCR68 *200_4_NC
R69 10K_4R69 10K_4
R70 2.49K/F_4R70 2.49K/F_4
1 2
R71 10K_4R71 10K_4
1 2
5
GPU all
+3.3V_RUN
PWROK
R65
R65
*220_4_NC
*220_4_NC
1 2
+3V_GFX
2
Q9
Q9
*PDTC143TT_NC
*PDTC143TT_NC
PEG_RXP15
PEG_RXN15
PEG_RXP14
PEG_RXN14
PEG_RXP13
PEG_RXN13
PEG_RXP12
PEG_RXN12
PEG_RXP11
PEG_RXN11
PEG_RXP10
PEG_RXN10
PEG_RXP9
PEG_RXN9
PEG_RXP8
PEG_RXN8
PEG_RXP7
PEG_RXN7
PEG_RXP6
PEG_RXN6
PEG_RXP5
PEG_RXN5
PEG_RXP4
PEG_RXN4
PEG_RXP3
PEG_RXN3
PEG_RXP2
PEG_RXN2
PEG_RXP1
PEG_RXN1
PEG_RXP0
PEG_RXN0
1 3
20120203
Change C144 C145 C147 C149 C150
C152 C154 C156 C157 C158
C159 C160 C161 C162 C163
C164 C165 C166 C167 C168
C169 C171 C173 C175 C176
C177 C178 C179 C180 C182
C184 C185 to 0.1U/16V_4(CH4103K1B08)
+1.05V_GFX
Q9: H(sat), L(cut-off)
0.22uF AC coupling Caps for PCIE GEN3
0.1uF AC coupling Caps for PCIE GEN1/2
CLK_PCIE_VGAP 24
CLK_PCIE_VGAN 24
12
12
+3V_GFX
2
12
C143
C143
*4700P/25V_4_NC
*4700P/25V_4_NC
PEG_RXP15 6
PEG_RXN15 6
PEG_RXP14 6
PEG_RXN14 6
PEG_RXP13 6
PEG_RXN13 6
PEG_RXP12 6
PEG_RXN12 6
PEG_RXP11 6
PEG_RXN11 6
PEG_RXP10 6
PEG_RXN10 6
PEG_RXP9 6
PEG_RXN9 6
PEG_RXP8 6
PEG_RXN8 6
PEG_RXP7 6
PEG_RXN7 6
PEG_RXP6 6
PEG_RXN6 6
PEG_RXP5 6
PEG_RXN5 6
PEG_RXP4 6
PEG_RXN4 6
PEG_RXP3 6
PEG_RXN3 6
PEG_RXP2 6
PEG_RXN2 6
PEG_RXP1 6
PEG_RXN1 6
PEG_RXP0 6
PEG_RXN0 6
R64
R64
10K_4
10K_4
1 2
31
6
DGPU_PW ROK 25
Q8
Q8
*2N7002W _NC
*2N7002W _NC
7
Power up sequence
VDD33
+3V_GFX
IFP(AB)_IOVDD
+1.8V_GFX
NVVDD
+VCC_DGFX_CORE
FBVDDQ
+1.5V_GFX
PEX_VDD
+1.05V_GFX
IFP(CDEF)_IOVDD
+1.05V_GFX
NB9M: VGACORE +0.90V (Normal) , +1.09V
NVVDD Maximum Settling Time
NVVDD
GPIO
I/O 3.3V
PEX_RST
Trise >= 1uS Tfail <=500nS
t>0
t>0
t>0
tsNVVDD<100us
PEX_RST timing
8
t>0
t>0
+3V_GFX
C189 0.1U/16V_4C189 0.1U/16V_4
1 2
D D
GPU_RST#
1
4
12
R72
R72
100K_4
100K_4
2
3 5
U4
U4
TC7SH08FU
TC7SH08FU
2
1
12
R73
R73
100K_4
100K_4
3
PLTRST# 7,23,35,38
DGPU_HOLD_RST# 23
PEX_CLKREQ#
4
+3V_GFX
5
2
Q10
Q10
2N7002W
2N7002W
31
PU in PCH
PEG_A_CLKRQ# 24
6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, February 13, 2012 13 55
Date: Sheet of
Monday, February 13, 2012 13 55
Date: Sheet of
Monday, February 13, 2012 13 55
7
PROJECT :
N13P-GS (PCIE I/F) 1/5
N13P-GS (PCIE I/F) 1/5
N13P-GS (PCIE I/F) 1/5
R08
8
A00
A00
A00
1
U3B
U3B
N13P-GL-A1
N13P-GL-A1
VMA_CMD018
T1T1
VMA_CMD218
VMA_CMD318
VMA_CMD418
VMA_CMD518
VMA_CMD618
VMA_CMD718
A A
VMA_CMD818
VMA_CMD918
VMA_CMD1018
VMA_CMD1118
VMA_CMD1218
VMA_CMD1318
VMA_CMD1418
VMA_CMD1518
VMA_CMD1618
T2T2
VMA_CMD1818
VMA_CMD1918
VMA_CMD2018
VMA_CMD2118
VMA_CMD2218
VMA_CMD2318
VMA_CMD2418
VMA_CMD2518
VMA_CMD2618
VMA_CMD2718
VMA_CMD2818
VMA_CMD2918
VMA_CMD3018
T5T5
B B
C C
D D
VMA_CMD1
VMA_CMD17
VMA_CMD31
VMA_DM0
VMA_DM1
VMA_DM2
VMA_DM3
VMA_DM4
VMA_DM5
VMA_DM6
VMA_DM7
VMA_WDQS0
VMA_WDQS1
VMA_WDQS2
VMA_WDQS3
VMA_WDQS4
VMA_WDQS5
VMA_WDQS6
VMA_WDQS7
VMA_RDQS0
VMA_RDQS1
VMA_RDQS2
VMA_RDQS3
VMA_RDQS4
VMA_RDQS5
VMA_RDQS6
VMA_RDQS7
+1.5V_GFX
U30
T31
U29
R34
R33
U32
U33
U28
V28
V29
V30
U34
U31
V34
V33
Y32
AA31
AA29
AA28
AC34
AC33
AA32
AA33
Y28
Y29
W31
Y30
AA34
Y31
Y34
Y33
V31
P30
F31
F34
M32
AD31
AL29
AM32
AF34
M31
G31
E33
M33
AE31
AK30
AN33
AF33
M30
H30
E34
M34
AF30
AK31
AM34
AF32
K31
L30
H34
AG30
AG31
AJ34
AK34
AH31
AJ31
AJ32
AJ33
AA27
AA30
AB27
AB33
AC27
AD27
AE27
AF27
AG27
B13
B16
B19
E13
E16
E19
H10
H11
H12
H13
J34
J30
J31
J32
J33
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
FBA_WCK01
FBA_WCK01_N
FBA_WCK23
FBA_WCK23_N
FBA_WCK45
FBA_WCK45_N
FBA_WCK67
FBA_WCK67_N
FBA_WCKB01
FBA_WCKB01_N
FBA_WCKB23
FBA_WCKB23_N
FBA_WCKB45
FBA_WCKB45_N
FBA_WCKB67
FBA_WCKB67_N
FBVDDQ_1
FBVDDQ_2
FBVDDQ_3
FBVDDQ_4
FBVDDQ_5
FBVDDQ_6
FBVDDQ_7
FBVDDQ_8
FBVDDQ_9
FBVDDQ_10
FBVDDQ_11
FBVDDQ_12
FBVDDQ_13
FBVDDQ_14
FBVDDQ_15
FBVDDQ_16
FBVDDQ_17
FBVDDQ_18
FBVDDQ_19
3050mA
1
2
GB4-128
GB4-128
MEMORY I/F A
MEMORY I/F A
2
FBA_D00
FBA_D01
FBA_D02
FBA_D03
FBA_D04
FBA_D05
FBA_D06
FBA_D07
FBA_D08
FBA_D09
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
FBA_CLK0
FBA_CLK0*
FBA_CLK1
FBA_CLK1*
FB_VREF
FBA_DEBUG0
FBA_DEBUG1
FBA_CMD_RFU0
FBA_CMD_RFU1
FB_DLL_AVDD
FBA_PLL_AVDD
FBVDDQ_22
FBVDDQ_21
FBVDDQ_20
FB_CLAMP
3
VMA_DQ0
L28
VMA_DQ1
M29
VMA_DQ2
L29
VMA_DQ3
M28
VMA_DQ4
N31
VMA_DQ5
P29
VMA_DQ6
R29
VMA_DQ7
P28
VMA_DQ8
J28
VMA_DQ9
H29
VMA_DQ10
J29
VMA_DQ11
H28
VMA_DQ12
G29
VMA_DQ13
E31
VMA_DQ14
E32
VMA_DQ15
F30
VMA_DQ16
C34
VMA_DQ17
D32
VMA_DQ18
B33
VMA_DQ19
C33
VMA_DQ20
F33
VMA_DQ21
F32
VMA_DQ22
H33
VMA_DQ23
H32
VMA_DQ24
P34
VMA_DQ25
P32
VMA_DQ26
P31
VMA_DQ27
P33
VMA_DQ28
L31
VMA_DQ29
L34
VMA_DQ30
L32
VMA_DQ31
L33
VMA_DQ32
AG28
VMA_DQ33
AF29
VMA_DQ34
AG29
VMA_DQ35
AF28
VMA_DQ36
AD30
VMA_DQ37
AD29
VMA_DQ38
AC29
VMA_DQ39
AD28
VMA_DQ40
AJ29
VMA_DQ41
AK29
VMA_DQ42
AJ30
VMA_DQ43
AK28
VMA_DQ44
AM29
VMA_DQ45
AM31
VMA_DQ46
AN29
VMA_DQ47
AM30
VMA_DQ48
AN31
VMA_DQ49
AN32
VMA_DQ50
AP30
VMA_DQ51
AP32
VMA_DQ52
AM33
VMA_DQ53
AL31
VMA_DQ54
AK33
VMA_DQ55
AK32
VMA_DQ56
AD34
VMA_DQ57
AD32
VMA_DQ58
AC30
VMA_DQ59
AD33
VMA_DQ60
AF31
VMA_DQ61
AG34
VMA_DQ62
AG32
VMA_DQ63
AG33
VMA_CLKP0
R30
VMA_CLKN0
R31
VMA_CLKP1
AB31
VMA_CLKN1
AC31
+FB_VREF1
H26
15mils width
T7T7
For Debug only
R28
AC28
R32
AC32
K27
U27
66mA
H16
H15
H14
E1
FBA_DEBUG0
FBA_DEBUG1
+FB_PLLAVDD
R84 *60.4/F_4_NCR84 *60.4/F_4_NC
1 2
R86 *10K_4_NCR86 *10K_4_NC
1 2
35mA
C194 10U/6.3V_8C194 10U/6.3V_8
C195 1U/6.3V_4C195 1U/6.3V_4
C196 0.1U/16V_4C196 0.1U/16V_4
C197 0.047U/10V_4C197 0.047U/10V_4
12
L4 BLM18PG300SN1DL4 BLM18PG300SN1D
1 2
1 2
1 2
1 2
1 2
+1.5V_GFX
R585
R585
10K_4
10K_4
0.1u *8 under GPU
Others Near GPU
3
4
VMA_DQ[63..0]18
VMA_DM[7..0]18
VMA_WDQS[7..0]18
VMA_RDQS[7..0]18
VMC_DQ[63..0]19
VMC_DM[7..0]19
VMC_WDQS[7..0]19
VMC_RDQS[7..0]19
VMA_CMD2
VMA_CMD3
VMA_CMD5
VMA_CMD18
VMA_CMD19
VMC_CMD2
VMC_CMD3
VMC_CMD5
VMC_CMD18
VMC_CMD19
Follow Mode E Command Mapping
VMA_CLKP0 18
VMA_CLKN0 18
VMA_CLKP1 18
VMA_CLKN1 18
R74 10K_4R74 10K_4
1 2
R75 10K_4R75 10K_4
1 2
R76 10K_4R76 10K_4
1 2
R77 10K_4R77 10K_4
1 2
R78 10K_4R78 10K_4
1 2
R79 10K_4R79 10K_4
1 2
R80 10K_4R80 10K_4
1 2
R81 10K_4R81 10K_4
1 2
R82 10K_4R82 10K_4
1 2
R83 10K_4R83 10K_4
1 2
(ODTX, CKE*, RST)
+1.5V_GFX
15mils width
+1.5V_GFX
C198 *0.1U/16V_4_NCC198 *0.1U/16V_4_NC
1 2
C199 0.1U/16V_4C199 0.1U/16V_4
1 2
C200 0.047U/10V_4C200 0.047U/10V_4
1 2
C201 0.1U/16V_4C201 0.1U/16V_4
1 2
C202 0.1U/16V_4C202 0.1U/16V_4
1 2
C203 0.047U/10V_4C203 0.047U/10V_4
1 2
C204 0.1U/16V_4C204 0.1U/16V_4
1 2
C205 0.047U/10V_4C205 0.047U/10V_4
1 2
C206 1U/6.3V_4C206 1U/6.3V_4
1 2
C207 1U/6.3V_4C207 1U/6.3V_4
1 2
C208 4.7U/6.3V_6C208 4.7U/6.3V_6
1 2
C209 4.7U/6.3V_6C209 4.7U/6.3V_6
1 2
4
+1.05V_GFX
5
U3C
U3C
N13P-GL-A1
N13P-GL-A1
VMC_CMD019
T4T4
VMC_CMD219
VMC_CMD319
VMC_CMD419
VMC_CMD519
VMC_CMD619
VMC_CMD719
VMC_CMD819
VMC_CMD919
VMC_CMD1019
VMC_CMD1119
VMC_CMD1219
VMC_CMD1319
VMC_CMD1419
VMC_CMD1519
VMC_CMD1619
T3T3
VMC_CMD1819
VMC_CMD1919
VMC_CMD2019
VMC_CMD2119
VMC_CMD2219
VMC_CMD2319
VMC_CMD2419
VMC_CMD2519
VMC_CMD2619
VMC_CMD2719
VMC_CMD2819
VMC_CMD2919
VMC_CMD3019
T6T6
+1.5V_GFX
5
VMC_CMD1
VMC_CMD17
VMC_CMD31
VMC_DM0
VMC_DM1
VMC_DM2
VMC_DM3
VMC_DM4
VMC_DM5
VMC_DM6
VMC_DM7
VMC_WDQS0
VMC_WDQS1
VMC_WDQS2
VMC_WDQS3
VMC_WDQS4
VMC_WDQS5
VMC_WDQS6
VMC_WDQS7
VMC_RDQS0
VMC_RDQS1
VMC_RDQS2
VMC_RDQS3
VMC_RDQS4
VMC_RDQS5
VMC_RDQS6
VMC_RDQS7
D13
E14
F14
A12
B12
C14
B14
G15
F15
E15
D15
A14
D14
A15
B15
C17
D18
E18
F18
A20
B20
C18
B18
G18
G17
F17
D16
A18
D17
A17
B17
E17
E11
F23
F27
C30
A24
D10
E23
E28
B30
A23
D22
D28
A30
B23
D24
D25
B27
C27
F26
E26
A26
A27
H18
H19
H20
H21
H22
H23
H24
L27
M27
N27
P27
R27
T27
T30
E3
A3
C9
D5
C3
B9
D9
E4
B2
A9
F8
E8
A5
A6
D6
D7
C6
B6
H8
H9
FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD7
FBB_CMD8
FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBB_CMD29
FBB_CMD30
FBB_CMD31
FBB_DQM0
FBB_DQM1
FBB_DQM2
FBB_DQM3
FBB_DQM4
FBB_DQM5
FBB_DQM6
FBB_DQM7
FBB_DQS_WP0
FBB_DQS_WP1
FBB_DQS_WP2
FBB_DQS_WP3
FBB_DQS_WP4
FBB_DQS_WP5
FBB_DQS_WP6
FBB_DQS_WP7
FBB_DQS_RN0
FBB_DQS_RN1
FBB_DQS_RN2
FBB_DQS_RN3
FBB_DQS_RN4
FBB_DQS_RN5
FBB_DQS_RN6
FBB_DQS_RN7
FBB_WCK01
FBB_WCK01_N
FBB_WCK23
FBB_WCK23_N
FBB_WCK45
FBB_WCK45_N
FBB_WCK67
FBB_WCK67_N
FBB_WCKB01
FBB_WCKB01_N
FBB_WCKB23
FBB_WCKB23_N
FBB_WCKB45
FBB_WCKB45_N
FBB_WCKB67
FBB_WCKB67_N
FBVDDQ_23
FBVDDQ_24
FBVDDQ_25
FBVDDQ_26
FBVDDQ_27
FBVDDQ_28
FBVDDQ_29
FBVDDQ_30
FBVDDQ_31
FBVDDQ_32
FBVDDQ_33
FBVDDQ_34
FBVDDQ_35
FBVDDQ_36
FBVDDQ_37
FBVDDQ_38
6
GB4-128
GB4-128
MEMORY I/F C
MEMORY I/F C
FB_CAL_TERM_GND
6
7
VMC_DQ0
G9
FBB_D00
FBB_D01
FBB_D02
FBB_D03
FBB_D04
FBB_D05
FBB_D06
FBB_D07
FBB_D08
FBB_D09
FBB_D10
FBB_D11
FBB_D12
FBB_D13
FBB_D14
FBB_D15
FBB_D16
FBB_D17
FBB_D18
FBB_D19
FBB_D20
FBB_D21
FBB_D22
FBB_D23
FBB_D24
FBB_D25
FBB_D26
FBB_D27
FBB_D28
FBB_D29
FBB_D30
FBB_D31
FBB_D32
FBB_D33
FBB_D34
FBB_D35
FBB_D36
FBB_D37
FBB_D38
FBB_D39
FBB_D40
FBB_D41
FBB_D42
FBB_D43
FBB_D44
FBB_D45
FBB_D46
FBB_D47
FBB_D48
FBB_D49
FBB_D50
FBB_D51
FBB_D52
FBB_D53
FBB_D54
FBB_D55
FBB_D56
FBB_D57
FBB_D58
FBB_D59
FBB_D60
FBB_D61
FBB_D62
FBB_D63
FBB_CLK0
FBB_CLK0*
FBB_CLK1
FBB_CLK1*
FBB_PLL_AVDD
FBB_CMD_RFU0
FBB_CMD_RFU1
FB_VDDQ_SENSE
FB_GND_SENSE
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FBB_DEBUG0
FBB_DEBUG1
FBVDDQ_39
FBVDDQ_40
FBVDDQ_41
FBVDDQ_42
FBVDDQ_43
FBVDDQ_44
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, February 13, 2012 14 55
Date: Sheet of
Monday, February 13, 2012 14 55
Date: Sheet of
Monday, February 13, 2012 14 55
VMC_DQ1
E9
VMC_DQ2
G8
VMC_DQ3
F9
VMC_DQ4
F11
VMC_DQ5
G11
VMC_DQ6
F12
VMC_DQ7
G12
VMC_DQ8
G6
VMC_DQ9
F5
VMC_DQ10
E6
VMC_DQ11
F6
VMC_DQ12
F4
VMC_DQ13
G4
VMC_DQ14
E2
VMC_DQ15
F3
VMC_DQ16
C2
VMC_DQ17
D4
VMC_DQ18
D3
VMC_DQ19
C1
VMC_DQ20
B3
VMC_DQ21
C4
VMC_DQ22
B5
VMC_DQ23
C5
VMC_DQ24
A11
VMC_DQ25
C11
VMC_DQ26
D11
VMC_DQ27
B11
VMC_DQ28
D8
VMC_DQ29
A8
VMC_DQ30
C8
VMC_DQ31
B8
VMC_DQ32
F24
VMC_DQ33
G23
VMC_DQ34
E24
VMC_DQ35
G24
VMC_DQ36
D21
VMC_DQ37
E21
VMC_DQ38
G21
VMC_DQ39
F21
VMC_DQ40
G27
VMC_DQ41
D27
VMC_DQ42
G26
VMC_DQ43
E27
VMC_DQ44
E29
VMC_DQ45
F29
VMC_DQ46
E30
VMC_DQ47
D30
VMC_DQ48
A32
VMC_DQ49
C31
VMC_DQ50
C32
VMC_DQ51
B32
VMC_DQ52
D29
VMC_DQ53
A29
VMC_DQ54
C29
VMC_DQ55
B29
VMC_DQ56
B21
VMC_DQ57
C23
VMC_DQ58
A21
VMC_DQ59
C21
VMC_DQ60
B24
VMC_DQ61
C24
VMC_DQ62
B26
VMC_DQ63
C26
VMC_CLKP0
D12
VMC_CLKN0
E12
VMC_CLKP1
E20
VMC_CLKN1
F20
+FB_PLLAVDD1
H17
C12
C20
F1
F2
FB_CAL_PD_VDDQ
J27
FB_CAL_PU_GND
H27
FB_CAL_TERM_GND
H25
FBC_DEBUG0
G14
FBC_DEBUG1
G20
T33
V27
W27
W30
W33
Y27
N13P-GS (MEMORY I/F) 2/5
N13P-GS (MEMORY I/F) 2/5
N13P-GS (MEMORY I/F) 2/5
7
1 2
L3 BLM18PG300SN1DL3 BLM18PG300SN1D
C190 10U/6.3V_8C190 10U/6.3V_8
1 2
C191 0.047U/10V_4C191 0.047U/10V_4
1 2
C192 0.1U/16V_4C192 0.1U/16V_4
1 2
C193 1U/6.3V_4C193 1U/6.3V_4
1 2
R85 40.2/F_4R85 40.2/F_4
R87 42.2/F_4R87 42.2/F_4
R88 51.1/F_4R88 51.1/F_4
R89 *60.4/F_4_NCR89 *60.4/F_4_NC
1 2
R90 *10K_4_NCR90 *10K_4_NC
1 2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
VMC_CLKP0 19
VMC_CLKN0 19
VMC_CLKP1 19
VMC_CLKN1 19
1 2
1 2
1 2
+1.5V_GFX
R08
8
66mA
8
+1.05V_GFX
+1.5V_GFX
+1.5V_GFX
A00
A00
A00
1
A A
B B
C C
L7 HCB1608KF-221T20L7 HCB1608KF-221T20
+1.05V_GFX
D D
1
1 2
2
50 mA
+IFPAB_PLLVDD
R9110K_4 R9110K_4
12
12
+IFPAB_IOVDD
R9210K_4 R9210K_4
IFPAB_RSET
TP48TP48
320 mA
220 mA
R94 *1K/F_4_NCR94 *1K/F_4_NC
R95 *1K/F_4_NCR95 *1K/F_4_NC
12
12
200mA (1.05V +/- 3% )
TP47TP47
220 mA
R97 10K_4R97 10K_4
R98 10K_4R98 10K_4
12
12
R10210K_4 R10210K_4
R12110K_4 R12110K_4
12
12
+IFPCD_PLLVDD
IFPC_RSET
IFPD_RSET
+IFPCD_IOVDD
IFPAB_RSET
IFPEF_PLLVDD
IFPEF_IOVDD
200 mA
R99 10K_4R99 10K_4
60mA
45mA
C218 *0.1U/16V_4_NCC218 *0.1U/16V_4_NC
1 2
C219 0.1U/16V_4C219 0.1U/16V_4
1 2
C220 0.1U/16V_4C220 0.1U/16V_4
1 2
C221 0.047U/10V_4C221 0.047U/10V_4
1 2
C222 22U/6.3V_8C222 22U/6.3V_8
1 2
2
+DACA_VDD
12
+NV_PLLVDD
3
AH8
AG8
AG9
AF7
AG7
AF8
AN2
AF6
AG6
AD6
AB8
AC7
AC8
AG10
AP9
AP8
AC6
AJ28
AL11
C15
D19
D20
D23
D26
H31
AD8
AD7
AE8
45mA
3
U3D
U3D
N13P-GL-A1
N13P-GL-A1
IFPAB_PLLVDD
AJ8
IFPAB_RSET
IFPA_IOVDD
IFPB_IOVDD
N4
GPIO14
IFPCD_PLLVDD/
IFPC_PLLVDD
IFPC_PLLVDD
DACB_VDD/
IFPD_PLLVDD
IFPD_PLLVDD
P2
GPIO15
M6
GPIO17
IFPCD_RSET/ IFPC_RSET
DACB_RSET/ IFPD_RSET
IFPCD
IFPCD
IFPC_IOVDD
IFPD_IOVDD
IFPEF_RSET
IFPEF_PLLVDD
IFPE_IOVDD
IFPF_IOVDD
R1
GPIO18
P3
GPIO19
DACA_VDD
DACA_VREF
DACA_RSET
NC_1
NC_2
AJ4
NC_3
AJ5
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
T8
NC_12
V32
NC_13
PLLVDD
VID_PLLVDD
GF108/GKx
GF108/GKx
SP_PLLVDD
4
IFPAB(LVDS)
IFPAB(LVDS)
GB4-128
GB4-128
I2CW_SDA/ IFPC_AUX_N
I2CW_SCL/ IFPC_AUX
IFPC
IFPC
I2CX_SDA/ IFPD_AUX_N
I2CX_SCL/ IFPD_AUX
IFPD
IFPD
I2CY_SCL/ IFPE_AUX
I2CY_SDA/ IFPE_AUX*
IFPEF
IFPEF
I2CZ_SCL/ IFPF_AUX
I2CZ_SDA/ IFPF_AUX*
DACA(CRT)
DACA(CRT)
NC
NC
GF117
GF117
XTAL_PLL
XTAL_PLL
4
IFPA_TXC
IFPA_TXC*
IFPA_TXD0
IFPA_TXD0*
IFPA_TXD1
IFPA_TXD1*
IFPA_TXD2
IFPA_TXD2*
IFPA_TXD3
IFPA_TXD3*
IFPB_TXC
IFPB_TXC*
IFPB_TXD4
IFPB_TXD4*
IFPB_TXD5
IFPB_TXD5*
IFPB_TXD6
IFPB_TXD6*
IFPB_TXD7
IFPB_TXD7*
IFPC_L3_N
IFPC_L3
IFPC_L2_N
IFPC_L2
IFPC_L1_N
IFPC_L1
IFPC_L0_N
IFPC_L0
IFPD_L3_N
IFPD_L3
IFPD_L2_N
IFPD_L2
IFPD_L1_N
IFPD_L1
IFPD_L0_N
IFPD_L0
IFPE_L0
IFPE_L0*
IFPE_L1
IFPE_L1*
IFPE_L2
IFPE_L2*
IFPE_L3
IFPE_L3*
IFPF_L0
IFPF_L0*
IFPF_L1
IFPF_L1*
IFPF_L2
IFPF_L2*
IFPF_L3
IFPF_L3*
DACA_RED
DACA_GREEN
DACA_BLUE
DACA_HSYNC
DACA_VSYNC
I2CA_SCL
I2CA_SDA
XTAL_SSIN
XTAL_OUTBUFF
XTAL_IN
XTAL_OUT
AM6
AN6
AP3
AN3
AN5
AM5
AL6
AK6
AJ6
AH6
AJ9
AH9
AP6
AP5
AM7
AL7
AN8
AM8
AK8
AL8
AG2
AG3
AG4
AG5
AH4
AH3
AJ2
AJ3
AJ1
AK1
AK2
AK3
AK5
AK4
AL4
AL3
AM4
AM3
AM2
AM1
AB3
AB4
AD2
AD3
AD1
AC1
AC2
AC3
AC4
AC5
AF3
AF2
AE3
AE4
AF4
AF5
AD4
AD5
AG1
AF1
AK9
AL10
AL9
AM9
AN9
R4
R5
H1
J4
H3
H2
I2CA_SCL
I2CA_SDA
XTAL_SSIN
BXTALOUT
XTALIN
XTALOUT
C223
C223
27P/50V_4
27P/50V_4
5
R100 2.2K_4R100 2.2K_4
1 2
R101 2.2K_4R101 2.2K_4
1 2
Y1 27MHZY1 27MHZ
2 1
12
5*3 package
5
12
C224
C224
27P/50V_4
27P/50V_4
+3V_GFX
6
XTAL_SSIN
BXTALOUT
7
R103 10K_4R103 10K_4
R104 10K_4R104 10K_4
1 2
1 2
8
10 kΩ pull-down only if no spread chip used.
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, February 13, 2012 15 55
Date: Sheet of
Monday, February 13, 2012 15 55
Date: Sheet of
6
Monday, February 13, 2012 15 55
7
PROJECT :
N13P-GS (DISPLAY) 3/5
N13P-GS (DISPLAY) 3/5
N13P-GS (DISPLAY) 3/5
R08
A00
A00
A00
8
1
A A
B B
T8T8
T9T9
T10T10
T11T11
T12T12
2
4
2
4
2
4
12
VGA_THERMDN
VGA_THERMDP
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST#
EXT_EDIDCLK
EXT_EDIDDATA
I2CB_SCL_G
I2CB_SDA_G
STRAP_REF_GND
VGA_THERMDN42
VGA_THERMDP42
RP31 2.2KX2RP31 2.2KX2
1
C C
+3V_GFX
+3V_GFX
+3V_GFX
D D
3
RP32 2.2KX2RP32 2.2KX2
1
3
RP33 2.2KX2RP33 2.2KX2
1
3
R137 40.2K/F_4R137 40.2K/F_4
1
I2CS_SCL
I2CS_SDA
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
2
U3E
U3E
N13P-GL-A1
N13P-GL-A1
K4
THERMDN
K3
THERMDP
AM10
JTAG_TCK
AP11
JTAG_TMS
AM11
JTAG_TDI
AP12
JTAG_TDO
AN11
JTAG_TRST*
T4
I2CS_SCL
T3
I2CS_SDA
R2
I2CC_SCL
R3
I2CC_SDA
R7
I2CB_SCL
R6
I2CB_SDA
J2
STRAP0
J7
STRAP1
J6
STRAP2
J5
STRAP3
J3
STRAP4
J1
MULTI_STRAP_REF_GND
2
3
GB4-128
GB4-128
MISC1
MISC1
(GPIOS,JTAG,THERM,I2C)
(GPIOS,JTAG,THERM,I2C)
MISC2(ROM)
MISC2(ROM)
Output
N13P-GL
N13P-GS
0.95V
0.9V
3
4
N13P-GL (AJ0N13P0T02)
N13P-GS for Turbo (AJ001070T00)
Strap Bit Description
USER[3:0] 1111 EDID is used
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO16
GPIO20
GPIO21
ROM_CS*
ROM_SI
ROM_SO
ROM_SCLK
BUFRST*
CEC
3GIO_PADCFG
[3:0]
PCI_DEVID[5:0] D2 PCI_Device_ID
SORx_EXPOSED
[3:0]
DP_PLL_VDD33V Default
PCIE_MAX_SPEED11 PCIE Gen2/3 capable
PCI_SPEED_CHANGE
_GEN3
RAMCFG[3:0] 0010 Default Hynix1G
PEX_PLL_EN_TERM
SUB_VENDOR 0 No vedio BIOS ROM
FB[1:0]
SMB_ALT_ADDR 0 Default (1GPU)
VGA_DEVICE 1 Default (non 3D)
DGPU_VID4
P6
DGPU_VID3
M3
L6
P5
P7
DGPU_VID1
L7
DGPU_VID2
M7
N8
M1
M2
L1
M5
N3
M4
R8
P4
P1
H6
H5
H7
H4
L2
L3
VGA_OVT#
VGA_ALERT
DGPU_VID0
VGA_PW R_LEVEL#
DGPU_VID5
ROM_SI
ROM_SO
ROM_SCLK
0110 Notebook Default
Audio capability
0000
on each display port
Not in use
0 Default
0 PCIE PLL termination
disable (Default)
01 Frame Buffer size
Reserve
DGPU_VID4 55
DGPU_VID3 55
DGPU_VID1 55
DGPU_VID2 55
DGPU_VID0 55
VGA_PW R_LEVEL# 38,55
DGPU_VID5 55
20120203
NC R605 R604 R600
Mount R598 R599 R603
VID0 VID1 VID2 VID3 VID4 VID5
0 0 0
0 0 0 0
1 1 1
1 1
4
5
CHIP
PCI_DEVID: STRAP2
N13P-GS 0x0FD2(QS)
N13P-LP
N13M-GS
0x0FD3
0x1142
N13P-GL 0x0DE9
Logical Strap Bit Mapping
PU-VDD PD
4.99K
10K
1000 0000
1001 0001
15K
20K
24.9K
30.1K
34.8K
45.3K
Check VID PU/PD
1011 0011
1100
1101
1110 0110
1111
10K/F_4: CS31002FB26 [RES CHIP 10K 1/16W +1% (0402)]
4.99K/F_4: CS24992FB26 [RES CHIP 4.99K 1/16W +1%(0402)]
15K/F_4: CS31502FB24 [RES CHIP 15K 1/16W +1% (0402)]
20K/F_4: CS32002FB29 RES CHIP 20K 1/16W +-1%(0402)
ROM_SO
ROM_SCLK 0010
ROM_SI
STRAP4
STRAP3
STRAP2
STRAP1
STRAP0
RAMCFG
[3:0]
JTAG_TMS
JTAG_TDI
VGA_OVT#
DGPU_VID0
DGPU_VID1
DGPU_VID2
DGPU_VID3
DGPU_VID4
DGPU_VID5
VGA_ALERT
VGA_PW R_LEVEL#
DGPU_VID0
DGPU_VID1
DGPU_VID2
DGPU_VID3
DGPU_VID4
DGPU_VID5
VGA_PW R_LEVEL#
JTAG_TCK
JTAG_TRST#
5
Default: Hynix VRAM 2G (0110)
DESCRIPTION
0000
0001
Reserve Reserve Reserve
0010
DDR3 64Mx16, 900MHz
0011
DDR3 64Mx16, 900MHz (G-die)
0110
DDR3 128Mx16, 900MHz
0111
DDR3 128Mx16, 900MHz
C861 100P/50V_4C861 100P/50V_4
00101010
0100
6
0010
PD 15K
0011
PD 20K
0010
PD 15K
1001
PU 10K
*4.99K/F_4_NC
*4.99K/F_4_NC
ROM_SO
ROM_SCLK
15K/F_4
15K/F_4
R105
R105
R113
R113
ROM_SCLK
1000
1000
0000
0010
*10K/F_4_NC
*10K/F_4_NC
1 2
12
PU 5K
PU 5K
PD 5K
PD 15K
R106
R106
1 2
12
R114
R114
10K/F_4
10K/F_4
*4.99K/F_4_NC
*4.99K/F_4_NC
1 2
12
15K/F_4
15K/F_4
0101
0111
Logical
Strapping Bit3
FB[1]
PCI_DEVIDE[4]
RAMCFG[3]
RESERVED
SOR3_EXPOSED
PCI_DEVID[3] PCI_DEVID[1]
3GIO_PADCFG[3]
Strapping Bit2
FB[0]
SUB_VENDOR
RAMCFG[2]
PCI_SPEED_CHANGE_GEN3
SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSED
PCI_DEVID[2]
3GIO_PADCFG[2]
7
ROM_SO
1001
PU 10K
0001
PD 10K
+3V_GFX
R107
R107
45.3K/F_4
45.3K/F_4
R112
R112
STRAP0
STRAP1ROM_SI
STRAP2
STRAP3
STRAP4
R115
R115
*4.99K/F_4_NC
*4.99K/F_4_NC
R116
R116
24.9K/F_4: CS32492FB16 [RES CHIP 24.9K 1/16W +-1%(0402)]
30.1K/F_4: CS33012FB18 [RES CHIP 30.1K 1/16W +-1%(0402)]
35.7K/F_4: CS33572FB13 [RES CHIP 35.7K 1/16W +-1%(0402)]
45.3K/F_4: CS34532FB18 [RES CHIP 45.3K 1/16W +-1% (0402)]
LogicalLogical
Strapping Bit1
SMB_ALT_ADDR
PCI_DEVID[5]
RAMCFG[1]
PCIE_MAX_SPEED DP_PLL_VDD33V
3GIO_PADCFG[1] 3GIO_PADCFG[0]
USER[1]
VRAM Configuration Table
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
Vendor Vendor P/N
Reserved
Reserve
Hynix
Samsung
Hynix
Samsung
+3V_GFX
R123*10K_4_NC R123*10K_4_NC
R126*10K_4_NC R126*10K_4_NC
R12910K_4 R12910K_4
R596*10K_4_NC R596*10K_4_NC
R597*10K_4_NC R597*10K_4_NC
R59810K_4 R59810K_4
R59910K_4 R59910K_4
R600*10K_4_NC R600*10K_4_NC
R60110K_4 R60110K_4
R13210K_4 R13210K_4
R13310K_4 R13310K_4
R60710K_4 R60710K_4
R60610K_4 R60610K_4
R605*10K_4_NC R605*10K_4_NC
R604*10K_4_NC R604*10K_4_NC
R60310K_4 R60310K_4
R602*10K_4_NC R602*10K_4_NC
R136*10K_4_NC R136*10K_4_NC
R13810K_4 R13810K_4
6
GPIO
0
1
3
4
5
6
7
8
9
10
11
12
13
Quanta P/N
AKD5LZWTW07
AKD5EGGT509
AKD5MGWTW06
AKD5MGWT507
ACTIVE
I/O
N/A
IN
OUT
N/A
N/A
HIGH
OUT2HIGH
OUT
OUT
OUT
OUT
I/O
I/O
OUT
OUT
IN
OUT
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
HIGH
N/A
N/A
N/A
LOW
LOW
N/A
N/A
N/A
N/A
Monday, February 13, 2012 16 55
Monday, February 13, 2012 16 55
Monday, February 13, 2012 16 55
7
8
+3V_GFX
R108
R108
*35.7K/F_4_NC
*35.7K/F_4_NC
1 2
12
Strapping Bit0
R109
R109
10K/F_4
10K/F_4
1 2
1 2
12
12
R118
R118
R117
R117
*15K/F_4_NC
*15K/F_4_NC
45.3K/F_4
45.3K/F_4
Logical
VGA_DEVICE
1 2
R110
R110
*45.3K/F_4_NC
*45.3K/F_4_NC
12
R119
R119
4.99K/F_4
4.99K/F_4
0001
PEX_PLL_EN_TERM
RAMCFG[0]
0010
0001
0000
PCI_DEVID[0]
1001
0111
USER[0]USER[3] USER[2]
1111
ROM_SI
PD 5K
H5TQ1G63DFR-11C
K4W1G1646G-BC11
H5TQ2G63BFR-11C
K4W2G1646C-HC11
USAGE
GPIO ASSIGNMENTS
PD 10K
PD 15K
PD 20K
PD 35K
PD 45K
NVVDD_VID4
NVVDD_VID3
NC
NC
NC
NVVDD_VID1
NVVDD_VID2
NC
OVERT
ALERT
NC
NVVDD VID0
PWR_LEVEL
NVVDD VID5
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
N13P-GS (GPIO&STRAPS) 4/5
N13P-GS (GPIO&STRAPS) 4/5
N13P-GS (GPIO&STRAPS) 4/5
R08
8
R111
R111
*10K/F_4_NC
*10K/F_4_NC
1 2
12
R120
R120
10K/F_4
10K/F_4
A00
A00
A00
1
50 AN13P-GS
N13P-LP
U3F
U3F
N13P-GL-A1
N13P-GL-A1
AA12
VDD_001
AA14
VDD_002
AA16
VDD_003
A A
B B
C C
D D
AA19
VDD_004
AA21
VDD_005
AA23
VDD_006
AB13
VDD_007
AB15
VDD_008
AB17
VDD_009
AB20
VDD_010
AB22
VDD_011
AC12
VDD_012
AC14
VDD_013
AC16
VDD_014
AC19
VDD_015
AC21
VDD_016
AC23
VDD_017
M12
VDD_018
M14
VDD_019
M16
VDD_020
M19
VDD_021
M21
VDD_022
M23
VDD_023
N13
VDD_024
N15
VDD_025
N17
VDD_026
N18
VDD_027
N20
VDD_028
N22
VDD_029
P12
VDD_030
P14
VDD_031
P16
VDD_032
P19
VDD_033
P21
VDD_034
P23
VDD_035
R13
VDD_036
R15
VDD_037
R17
VDD_038
R18
VDD_039
R20
VDD_040
R22
VDD_041
T12
VDD_042
T14
VDD_043
T16
VDD_044
T19
VDD_045
T21
VDD_046
T23
VDD_047
U13
VDD_048
U15
VDD_049
U17
VDD_050
U18
VDD_051
U20
VDD_052
U22
VDD_053
V13
VDD_054
V15
VDD_055
V17
VDD_056
+VCC_DGFX_CORE
GB4-128
GB4-128
NVVDD
NVVDD
NVVDD Decoupling
PLACE UNDER BALLS
C225 0.01U/25V_4C225 0.01U/25V_4
1 2
C226 0.01U/25V_4C226 0.01U/25V_4
1 2
C227 0.01U/25V_4C227 0.01U/25V_4
1 2
C228 0.01U/25V_4C228 0.01U/25V_4
1 2
C229 0.01U/25V_4C229 0.01U/25V_4
1 2
C230 0.01U/25V_4C230 0.01U/25V_4
1 2
C231 0.01U/25V_4C231 0.01U/25V_4
1 2
C232 0.01U/25V_4C232 0.01U/25V_4
1 2
C233 0.022U/16V_4C233 0.022U/16V_4
1 2
C234 0.022U/16V_4C234 0.022U/16V_4
1 2
C235 0.022U/16V_4C235 0.022U/16V_4
1 2
C236 0.047U/10V_4C236 0.047U/10V_4
1 2
C237 0.047U/10V_4C237 0.047U/10V_4
1 2
C238 0.047U/10V_4C238 0.047U/10V_4
1 2
C239 0.1U/16V_4C239 0.1U/16V_4
1 2
C240 0.1U/16V_4C240 0.1U/16V_4
1 2
C241 0.22U/10V_6C241 0.22U/10V_6
1 2
C242 0.22U/10V_6C242 0.22U/10V_6
1 2
C243 0.22U/10V_6C243 0.22U/10V_6
1 2
C244 1U/6.3V_4C244 1U/6.3V_4
1 2
PLACE NEAR BALLS
C245 4.7U/6.3V_6C245 4.7U/6.3V_6
1 2
C246 10U/6.3V_8C246 10U/6.3V_8
1 2
C247 10U/6.3V_8C247 10U/6.3V_8
1 2
C248 22U/6.3V_8C248 22U/6.3V_8
1 2
C249 22U/6.3V_8C249 22U/6.3V_8
1 2
40 A
VDD_057
VDD_058
VDD_059
VDD_060
VDD_061
VDD_062
VDD_063
VDD_064
VDD_065
VDD_066
VDD_067
VDD_068
VDD_069
VDD_070
VDD_071
VDD_072
XVDD_01
XVDD_02
XVDD_03
XVDD_04
XVDD_05
XVDD_06
XVDD_07
XVDD_08
XVDD_09
XVDD_10
XVDD_11
XVDD_12
XVDD_13
XVDD_14
XVDD_15
XVDD_16
XVDD_17
XVDD_18
XVDD_19
XVDD_20
XVDD_21
XVDD_22
XVDD_23
XVDD_24
XVDD_25
XVDD_26
XVDD_27
XVDD_28
XVDD_29
XVDD_30
XVDD_31
XVDD_32
XVDD_33
XVDD_34
XVDD_35
XVDD_36
XVDD_37
XVDD_38
+VCC_DGFX_CORE+VCC_DGFX_CORE
V18
AB18
V20
V22
W12
W14
W16
W19
W21
W23
Y13
Y15
Y17
Y18
Y20
Y22
U1
U2
U3
U4
U5
U6
U7
U8
V1
V2
V3
V4
V5
V6
V7
V8
W2
W3
W4
W5
W7
W8
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
AA1
AA2
AA3
AA4
AA5
AA6
AA7
AA8
2
A33
AA13
AA15
AA17
AA18
AA20
AA22
AB12
AB14
AB16
AB19
AB2
AB21
AB23
AB28
AB30
AB32
AB5
AB7
AC13
AC15
AC17
AC18
AC20
AC22
AE2
AE28
AE30
AE32
AE33
AE5
AE7
AH10
AH13
AH16
AH19
AH2
AH22
AH24
AH28
AH29
AH30
AH32
AH33
AH5
AH7
AJ7
AK10
AK7
AL12
AL14
AL15
AL17
AL18
AL2
AL20
AL21
AL23
AL24
AL26
AL28
AL30
AL32
AL33
AL5
AM13
AM16
AM19
AM22
AM25
AN1
AN10
AN13
AN16
AN19
AN22
AN25
AN30
AN34
AN4
AN7
AP2
AP33
B10
B22
B25
B28
B31
B34
C10
C13
C19
C22
C25
C28
D31
A2
B1
B4
B7
C7
D2
U3G
U3G
N13P-GL-A1
N13P-GL-A1
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_081
GND_082
GND_083
GND_084
GND_085
GND_086
GND_087
GND_088
GND_089
GND_090
GND_091
GND_092
GND_093
GND_094
GND_095
GND_096
GND_097
GND_098
GND_099
GND_100
GND_101
GND_102
3
GB4-128
GB4-128
GROUND
GROUND
GND_105
GND_104
GND_103
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
GND_137
GND_138
GND_139
GND_140
GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
GND_154
GND_155
GND_156
GND_157
GND_158
GND_159
GND_160
GND_161
GND_162
GND_163
GND_164
GND_165
GND_166
GND_167
GND_168
GND_169
GND_170
GND_171
GND_172
GND_173
GND_174
GND_175
GND_176
GND_177
GND_178
GND_179
GND_180
GND_181
GND_182
GND_183
GND_184
GND_185
GND_186
GND_187
GND_188
GND_189
GND_190
GND_191
GND_192
GND_193
GND_194
GND_195
GND_196
GND_197
GND_198
GND_199
GND_200
GND_201
GND_202
E22
E10
D33
E25
E5
E7
F28
F7
G10
G13
G16
G19
G2
G22
G25
G28
G3
G30
G32
G33
G5
G7
K2
K28
K30
K32
K33
K5
K7
M13
M15
M17
M18
M20
M22
N12
N14
N16
N19
N2
N21
N23
N28
N30
N32
N33
N5
N7
P13
P15
P17
P18
P20
P22
R12
R14
R16
R19
R21
R23
T13
T15
T17
T18
T2
T20
T22
AG11
T28
T32
T5
T7
U12
U14
U16
U19
U21
U23
V12
V14
V16
V19
V21
V23
W13
W15
W17
W18
W20
W22
W28
Y12
Y14
Y16
Y19
Y21
Y23
AH11
C16
W32
4
5
6
7
8
330uF*2 at power page
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, February 13, 2012 17 55
Date: Sheet of
Monday, February 13, 2012 17 55
Date: Sheet of
1
2
3
4
5
6
Monday, February 13, 2012 17 55
7
PROJECT :
N13P-GS (POWER & GND) 5/5
N13P-GS (POWER & GND) 5/5
N13P-GS (POWER & GND) 5/5
R08
A00
A00
A00
8
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