QUANTA QU1T Schematics
http://mycomp.su/x/
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QU1T SYSTEM BLOCK DIAGRAM
D D
AMD AM2
DDRII-SODIMM1
DDRII-SODIMM2
LCD Connector
C C
VRAM
512Mb
PG 20,21,22,23,24
VRAM
512Mb
PG 8,9
PG 19
M92+
VRAM
512Mb
SATA - HDD
PG 29
SATA - ODD
PG 29
B B
R5C833
PCI Interface
1394a
PG 28
DDR II 667 MHZ PG 8,9
LVDS(2ch)
PCI-E, 16X
VRAM
512Mb
SATA0
SATA1 549 BGA
PCI-E, 1X
PG 25
PG 28
4 IN 1
PG 28
Athlon X2 1.8G AM2 Dual Core
Athlon X2 3450e 1.5G Dual Core
Athlon 2650e 1.6G single core
HT_LINK
RS690M
465 FCBGA
PG 10,11,12,13
A_LINK (X4)
SB600
PG 14,15,16,17,18
LPC
EC
ITE 8512
SPI
Flash
ROM
PG 33
PS/II
KB
PG 27
PG 4,5,6,7
PG 33
Front Panel
Touch Button
PG 33
HOST 200MHz
PCIE 100MHz
USB 48MHz
REF 14MHz
PCI-E, 1X
PCI-E, 1X
USB2.0 (P6)
PCI-E, 1X
USB2.0 (P7)
USB2.0 (P8)
USB2.0 (P0~P5)
USB2.0 (P9)
Azalia
CLOCK GENERATOR
ICS951462
PG 3
FAN CONTROL THERMAL SENSOR
PG 32 PG 6,12,23
BCM5906
PG 26
Mini Card (WLAN)
PCI Express Mini Card
RJ45
PG 26
PG 31
MINI CARD (TV)
PCI Express Mini Card
WEB CAM
USB2.0 I/O Ports X6
TOUCH PANEL
Azalia Audio Codec
ALC262
Amplifier
Max9710
DMIC.
PG 30
INT.
S.P.
PG 30 PG 30
PG 30
PG 30
Amplifier
TPA4411
PG 30
H.P
PG 27
PG 31
PG 19
PG 27
VCC_CORE
+1.2V
VLDT_RUN
+1.8VSUS
+1.8V
SMDDR_VTERM
3VPCU
5VPCU
RVCC3
3VSUS
5VSUS
VCC3
VCC5
VCC12
CPU VR
PG 37
+1.2V
PG 38
+1.8VSUS
SMDDR
VTERM
PG 36
3V/5V
PG 35
HDD PWR
PG 40
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
5
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PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
PROJECT :
QU1T
QU1T
QU1T
1 44Tuesday, September 01, 2009
1 44Tuesday, September 01, 2009
1
1 44Tuesday, September 01, 2009
B
B
B
http://mycomp.su/x/
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Voltage Rails
D D
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Block diagram
System information
Clock generator ICS951462
AMD M2+ HT I/F
AMD M2+ DDRII MEMORY I/F
AMD M2+ CTRL & DEBUG
AMD M2+ PWR & GND
DDR2 SODIMM X 2
DDR2 Termination
RS690MC HT interface
RS690MC PCIE interface
RS690MC PLL & VEDIO I/F
RS690MC Power
SB600 PCIE/PCI/RTC/LPC/CPU Interface
SB600 ACPI/GPIO/USB/AC97
SB600 SATA/PATA Interface
SB600 POWER & Decoupling
SB600 Straps
LCD PANEL/WEBCAM
M92-M(PCIE I/F)
M92M(LVDS/RGB/HDMI/TV)
M92-M(MEM I/F)
M92-M(Thermal/STRAP/EEPROM)
M92-M(POWER/GND)
VRAM1*4(GDDR2-BGA84)
LAN BCM5906
USB
R5C843 PCI/1394
SATA HDD/ODD
HD_ALC262
MINI CARD
FAN/ Daughter board
EC ITE8512
ACIN
5V / 3V (MAX10720)
DDR 1.8V(TPS51116)
CPU CORE (MAX8774)
NB 1.2V(OZ8116)
VDD_CORE (OZ8118)
12V/ HDD(MAX15026)
NB CORE(OZ8116)
POWER MANGER DIAGRAM
SCREW HOLE & EMI
History
Power S0~S2 Ctl SignalS3 S4 S5
VIN
5VPCU
3VPCU
15VPCU 15V V V V V 3V5V_EN
+3.3VALW
+1.2VALW 1.2V
5VSUS
3VSUS
1.8VSUS
VCC5
VCC3
VCC2.5
VCC1.8 1.8V
VCC1.5
VCC1.2 1.2V
CPU_VDDA
VCC_NB
SMDDR_VTERM
VCC_CORE
VCC1.1 1.1V V MAINON
Voltage
19V
5V
3V
3V
5V
3V
1.8V SUSON
5V
3V
2.5V
1.5V
2.5V
1.2V
0.9V
By CPU
V
V V V V
V V
V V
V
V
V
V
V
V
V
V
V
V
V V VV
V V V
V
VV
V
VV
VV
3V5V_EN
3V5V_EN
STB_ON
V
STB_ON
V
SUSON
SUSON
MAINON
MAINON
MAINON
MAINON
MAINON
MAINON
MAINON
MAINON
MAINON
VR_ON
PCB STACK UP
LAYER 1 : TOP
LAYER 2 : GND
LAYER 3 : IN1
LAYER 4 : GND
LAYER 5 : VCC
LAYER 6 : IN2
LAYER 7 : GND
LAYER 8 : BOT
PCI DEVICES IRQ ROUTING
IDSEL#
NANB VGA A
AD31(INT)SB NA
AD31 BAC97/AZALIA
NA
AD30
NA
AD16 E/F/GR5C843 0
Power On Sequence
ACIN
5VPCU/3VPCU
PWRBTN#
PWRBTNON#
RSMRST#
SUSB#,SUSC#
SUSON
MAINON
VSUS,VCC
VR_ON
VCORE_CPU
NB_PWRGD
PWROK
PCIRST#
InterruptsPCI DEVICE REQ# / GNT#
CLK
NA
INT
DUSB
INT
PCLK0
From 8512
From 8512
From 8512
From 8512
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
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PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
SYSTEM INFORMATION
SYSTEM INFORMATION
SYSTEM INFORMATION
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
PROJECT :
QU1T
QU1T
QU1T
2 44Tuesday, September 01, 2009
2 44Tuesday, September 01, 2009
1
2 44Tuesday, September 01, 2009
B
B
B
http://mycomp.su/x/
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VCC3
L90 22ohm,1500mAL90 22ohm,1500mA
D D
Put Decoupling Caps close to Clock Fen. power pin
VCC3
L88
L88
220ohm_2A
220ohm_2A
VCC3
L87
L87
220ohm_2A
220ohm_2A
C C
B B
CLK_VDD
R596
R596
10K
10K
EXT CLK FREQUENCY SELECT TABLE(MHZ)
FS2
0 0 0
0 0 1
A A
0 1 0
0 1 1
1 0 0
1 0 1
1 1 1
5
CLK_VDD
C864
C864
C865
C865
10U_0805
10U_0805
22U/6.3V/8
22U/6.3V/8
C8351UC835
1U
C8251UC825
1U
C831
C831
*0.1U
*0.1U
C821
C821
*0.1U
*0.1U
C828 33PC828 33P
14.318MHZ
14.318MHZ
C827 33PC827 33P
Parallel Resonance Crystal
FS1
CPU
FS0 HTT
SRCCLK
Hi-Z
X
180.00
220.00
100.00
133.33
200.00
C834
C834
C857
C857
C850
C850
C863
C863
C860
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
CLK_VDD_USB
C832
C832
2.2U/10V/6
2.2U/10V/6
CLK_VDD_REF
C830
C830
2.2U/10V/6
2.2U/10V/6
21
R580
SCLK0{8,15,23}
SDATA0{8,15,23}
R580
*1M
*1M
Ioh = 5 * Iref
(2.32mA)
Y6
Y6
Voh = 0.71V @ 60 ohm
USB
[2:1]
100.00
100.00
100.00
100.00 48.00
100.00
100.00
100.00 Normal ATHLON64 operation
PCI
Hi-Z
Hi-Z
X/3 X/6
30.00
60.00
73.12
36.56
66.66
33.33
33.33
66.66
66.66
33.33 48.00
48.00
48.00
48.00
48.00
48.00
C860
*0.1U
*0.1U
0.1U
0.1U
CLK_VDD
CLK_XIN
CLK_XOUT
R608
R608
475/F
475/F
CLKREQA# CONTROL SRC5,6,7
CLKREQB# CONTROL SRC2,3,4 ATIG3
CLKREQC# CONTROL SRC0,1 ATIG0,1,2
COMMENT
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
C841
C841
0.1U
0.1U
54
14
23
28
44
5
39
2
60
53
15
22
29
45
8
38
1
58
3
4
11
61
9
10
48
C839
C839
0.1U
0.1U
U25
U25
VDDCPU
VDD_SRC1
VDD_SRC2
VDD_SRC3
VDD_SRC4
VDD_48
VDD_ATIG
VDD_REF
VDDHTT
GND_CPU
GND_SRC1
GND_SRC2
GND_SRC3
GND_SRC4
GND_48
GND_ATIG
GND_REF
GNDHTT
XIN
XOUT
RESET_IN#
NC
SMBCLK
SMBDAT
IREF
ICS951462
ICS951462
Check AMD clock
4
C848
C848
0.1U
0.1U
VDDA
GNDA
CPUCLK8T0
CPUCLK8C0
CPUCLK8T1
CPUCLK8C1
SRCCLKT6
SRCCLKC6
ATIGCLKT0
ATIGCLKC0
ATIGCLKT1
ATIGCLKC1
ATIGCLKT2
ATIGCLKC2
ATIGCLKT3
ATIGCLKC3
SRCCLKT5
SRCCLKC5
SRCCLKT4
SRCCLKC4
SRCCLKT3
SRCCLKC3
SRCCLKT2
SRCCLKC2
SRCCLKT0
SRCCLKC0
SRCCLKT1
SRCCLKC1
SRCCLKT7
SRCCLKC7
CLKREQA#
CLKREQB#
CLKREQC#
48MHz_1
48MHz_0
FS1/REF1
FS0/REF0
FS2/REF2
HTTCLK0
3
CLK_VDDA
50
49
56
55
52
51
16
17
41
40
37
36
35
34
30
31
18
19
20
21
24
25
26
27
47
46
43
42
12
13
57
32
33
7
6
63
64
62
59
C845
C845
22U/6.3V/8
22U/6.3V/8
CLK_VDDA
CPUCLK_EXT_R
CPUCLK#_EXT_R
SBLINK_CLKP_R
SBLINK_CLKN_R
NBSRC_CLKP_R
NBSRC_CLKN_R
PCIE_REFCLKP_R
PCIE_REFCLKN_R
SBSRC_CLKP_R
SBSRC_CLKN_R
GPP_CLK0P_R
GPP_CLK0N_R
GPP_CLK1P_R
GPP_CLK1N_R
GPP_CLK2P_R
GPP_CLK2N_R
R592
R592
*10K
*10K
CLK_48M_2_R
L89
L89
220ohm_2A
220ohm_2A
C844
C844
C843
C843
10U_0805
10U_0805
0.1U
0.1U
R595 47.5/FR595 47.5/F
R601 47.5/FR601 47.5/F
3
RP20 33X2RP20 33X2
1
1
RP23 33X2RP23 33X2
3
1
RP25 33X2RP25 33X2
3
3
RP21
RP21
1
3
RP22
RP22
1
3
RP24
RP24
1
3
RP26
RP26
1
CLK_VDD
R624
R624
*10K
*10K
PE1_CLKREQ- {31}
PE2_CLKREQ- {31}
R593 33R593 33
SB_OSCIN_R
NB_OSCIN_R
HTREFCLK_R
R573 33R573 33
R581 33R581 33
R590 33R590 33
VCC3
4
2
2
4
2
4
4
33X2
33X2
2
4
33X2
33X2
2
4
33X2
33X2
2
4
33X2
33X2
2
USBCLK {15}
R623 49.9/FR623 49.9/F
R574
R574
10K
10K
R589
R589
49.9/F
49.9/F
2
R598 261/FR598 261/F
R619 49.9/FR619 49.9/F
R621 49.9/FR621 49.9/F
R617 49.9/FR617 49.9/F
CLK_VDD
R577
R577
10K
10K
SB_OSCIN {15}
NB_OSC {12}
HTREFCLK {12}
CPUCLKP {6}
CPUCLKN {6}
SBLINK_CLKP {12}
SBLINK_CLKN {12}
NBSRC_CLKP {12}
NBSRC_CLKN {12}
PCIE_REFCLKP {20}
PCIE_REFCLKN {20}
CLK_PCIE_WLAN {31}
CLK_PCIE_WLAN# {31}
CLK_PCIE_LAN {26}
CLK_PCIE_LAN# {26}
SBSRCCLKP {14}
SBSRCCLKN {14}
CLK_PCIE_CARD {31}
CLK_PCIE_CARD# {31}
R605 49.9/FR605 49.9/F
R611 49.9/FR611 49.9/F
R609 49.9/FR609 49.9/F
R582
R582
10K
10K
R575 *0R575 *0
R578 *0R578 *0
R583 *0R583 *0
R622 49.9/FR622 49.9/F
R607 49.9/FR607 49.9/F
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
R618 49.9/FR618 49.9/F
R616 49.9/FR616 49.9/F
Clock Generator
Clock Generator
Clock Generator
R599 49.9/FR599 49.9/F
R603 49.9/FR603 49.9/F
R610 49.9/FR610 49.9/F
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
QU1T
QU1T
QU1T
3 44Tuesday, September 01, 2009
3 44Tuesday, September 01, 2009
3 44Tuesday, September 01, 2009
1
B
B
B
3
http://mycomp.su/x/
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CPU HyperTransport Interface
D D
VLDT==>0.5A
C C
VLDT_RUN
R184 49.9/FR184 49.9/F
R179 49.9/FR179 49.9/F
B B
VDDLDTRUNCPU is connected to the VDD_LDT_RUN power
supply through the package or on the die. It is only connected
on the board to decoupling near the CPU package.
VLDT_RUN
HT_CADIN15_P{10}
HT_CADIN15_N{10}
HT_CADIN14_P{10}
HT_CADIN14_N{10}
HT_CADIN13_P{10}
HT_CADIN13_N{10}
HT_CADIN12_P{10}
HT_CADIN12_N{10}
HT_CADIN11_P{10}
HT_CADIN11_N{10}
HT_CADIN10_P{10}
HT_CADIN10_N{10}
HT_CADIN9_P{10}
HT_CADIN9_N{10}
HT_CADIN8_P{10}
HT_CADIN8_N{10}
HT_CADIN7_P{10}
HT_CADIN7_N{10}
HT_CADIN6_P{10}
HT_CADIN6_N{10}
HT_CADIN5_P{10}
HT_CADIN5_N{10}
HT_CADIN4_P{10}
HT_CADIN4_N{10}
HT_CADIN3_P{10}
HT_CADIN3_N{10}
HT_CADIN2_P{10}
HT_CADIN2_N{10}
HT_CADIN1_P{10}
HT_CADIN1_N{10}
HT_CADIN0_P{10}
HT_CADIN0_N{10}
HT_CLKIN1_P{10}
HT_CLKIN1_N{10}
HT_CLKIN0_P{10}
HT_CLKIN0_N{10}
HT_CTLIN0_P{10}
HT_CTLIN0_N{10}
U22A
U22A
AJ4
AJ3
AJ2
AJ1
U6
V6
T4
T5
R6
T6
P4
P5
M4
M5
L6
M6
K4
K5
J6
K6
U3
U2
R1
T1
R3
R2
N1
P1
L1
M1
L3
L2
J1
K1
J3
J2
N6
P6
N3
N2
V4
V5
U1
V1
Athlon 64 M2
Processor Socket
VLDT_06
VLDT_05
VLDT_02
VLDT_01
L0_CADIN_H15
L0_CADIN_L15
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0
L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKIN_H0
L0_CLKIN_L0
L0_CTLIN_H1
L0_CTLIN_L1
L0_CTLIN_H0
L0_CTLIN_L0
VLDT_08
VLDT_07
VLDT_04
VLDT_03
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
HT LINK
HT LINK
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
H6
H5
H2
H1
Y5
Y4
AB6
AA6
AB5
AB4
AD6
AC6
AF6
AE6
AF5
AF4
AH6
AG6
AH5
AH4
Y1
W1
AA2
AA3
AB1
AA1
AC2
AC3
AE2
AE3
AF1
AE1
AG2
AG3
AH1
AG1
AD5
AD4
AD1
AC1
Y6
W6
W2
W3
HT_CPU_CTLOUT1_PHT_CTLIN1_P
HT_CPU_CTLOUT1_NHT_CTLIN1_N
C234
C234
4.7U_0603
4.7U_0603
HT_CADOUT15_P {10}
HT_CADOUT15_N {10}
HT_CADOUT14_P {10}
HT_CADOUT14_N {10}
HT_CADOUT13_P {10}
HT_CADOUT13_N {10}
HT_CADOUT12_P {10}
HT_CADOUT12_N {10}
HT_CADOUT11_P {10}
HT_CADOUT11_N {10}
HT_CADOUT10_P {10}
HT_CADOUT10_N {10}
HT_CADOUT9_P {10}
HT_CADOUT9_N {10}
HT_CADOUT8_P {10}
HT_CADOUT8_N {10}
HT_CADOUT7_P {10}
HT_CADOUT7_N {10}
HT_CADOUT6_P {10}
HT_CADOUT6_N {10}
HT_CADOUT5_P {10}
HT_CADOUT5_N {10}
HT_CADOUT4_P {10}
HT_CADOUT4_N {10}
HT_CADOUT3_P {10}
HT_CADOUT3_N {10}
HT_CADOUT2_P {10}
HT_CADOUT2_N {10}
HT_CADOUT1_P {10}
HT_CADOUT1_N {10}
HT_CADOUT0_P {10}
HT_CADOUT0_N {10}
HT_CLKOUT1_P {10}
HT_CLKOUT1_N {10}
HT_CLKOUT0_P {10}
HT_CLKOUT0_N {10}
HT_CTLOUT0_P {10}
HT_CTLOUT0_N {10}
T62T62
T61T61
VLDT_RUN
C254
C254
180P
180P
12
C265
C265
180P
180P
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
AMD M2+ HT I/F
AMD M2+ HT I/F
AMD M2+ HT I/F
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT :
QU1T
QU1T
QU1T
B
B
B
4 44Tuesday, September 01, 2009
4 44Tuesday, September 01, 2009
4 44Tuesday, September 01, 2009
1
C279
C279
4.7U_0603
4.7U_0603
A A
5
4
C273
C273
4.7U_0603
4.7U_0603
C246
C246
0.22U
0.22U
C261
C261
0.22U
0.22U
12
3
http://mycomp.su/x/
5
U22C
M_B_DQ63
M_B_DQ62
M_B_DQ61
M_B_DQ60
M_B_DQ59
M_B_DQ58
M_B_DQ57
M_B_DQ56
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQ55
M_B_DQ54
M_B_DQ53
M_B_DQ52
M_B_DQ51
M_B_DQ50
M_B_DQ49
M_B_DQ48
M_B_DQ47
M_B_DQ46
M_B_DQ45
M_B_DQ44
M_B_DQ43
M_B_DQ42
M_B_DQ41
M_B_DQ40
M_B_DQ39
M_B_DQ38
M_B_DQ37
M_B_DQ36
M_B_DQ35
M_B_DQ34
M_B_DQ33
M_B_DQ32
M_B_DQ31
M_B_DQ30
M_B_DQ29
M_B_DQ28
M_B_DQ27
M_B_DQ26
M_B_DQ25
M_B_DQ24
M_B_DQ23
M_B_DQ22
M_B_DQ21
M_B_DQ20
M_B_DQ19
M_B_DQ18
M_B_DQ17
M_B_DQ16
M_B_DQ15
M_B_DQ14
M_B_DQ13
M_B_DQ12
M_B_DQ11
M_B_DQ10
M_B_DQ9
M_B_DQ8
M_B_DQ7
M_B_DQ6
M_B_DQ5
M_B_DQ4
M_B_DQ3
M_B_DQ2
M_B_DQ1
M_B_DQ0
M_B_DM7
M_B_DM6
M_B_DM4
M_B_DM3
M_B_DM2
M_B_DM1
M_B_DM0
M_B_DQS7
M_B_DQS#7
M_B_DQS6
M_B_DQS#6
M_B_DQS5
M_B_DQS#5
M_B_DQS4
M_B_DQS#4
M_B_DQS3
M_B_DQS#3
M_B_DQS2
M_B_DQS#2
M_B_DQS1
M_B_DQS#1
M_B_DQS0
M_B_DQS#0
D D
C C
B B
A A
M_B_DQS[0..7]{8}
M_B_DQS#[0..7]{8}
5
AH13
AL13
AL15
AJ15
AF13
AG13
AL14
AK15
AL16
AL17
AK21
AL21
AH15
AJ16
AH19
AL20
AJ22
AL22
AL24
AK25
AJ21
AH21
AH23
AJ24
AL27
AK27
AH31
AG30
AL25
AL26
AJ30
AJ31
AJ14
AH17
AJ23
AK29
AK13
AJ13
AK17
AJ17
AK23
AL23
AL28
AL29
E31
E30
B27
A27
F29
F31
A29
A28
A25
A24
C22
D21
A26
B25
B23
A22
B21
A20
C16
D15
C21
A21
A17
A16
B15
A14
E13
F13
C15
A15
A13
D13
K29
K31
G30
G29
L29
L28
H31
G31
C30
A23
B17
B13
D31
C31
C24
C23
D17
C17
C14
C13
J29
J31
J30
U22C
MB_DATA63
MB_DATA62
MB_DATA61
MB_DATA60
MB_DATA59
MB_DATA58
MB_DATA57
MB_DATA56
MB_DATA55
MB_DATA54
MB_DATA53
MB_DATA52
MB_DATA51
MB_DATA50
MB_DATA49
MB_DATA48
MB_DATA47
MB_DATA46
MB_DATA45
MB_DATA44
MB_DATA43
MB_DATA42
MB_DATA41
MB_DATA40
MB_DATA39
MB_DATA38
MB_DATA37
MB_DATA36
MB_DATA35
MB_DATA34
MB_DATA33
MB_DATA32
MB_DATA31
MB_DATA30
MB_DATA29
MB_DATA28
MB_DATA27
MB_DATA26
MB_DATA25
MB_DATA24
MB_DATA23
MB_DATA22
MB_DATA21
MB_DATA20
MB_DATA19
MB_DATA18
MB_DATA17
MB_DATA16
MB_DATA15
MB_DATA14
MB_DATA13
MB_DATA12
MB_DATA11
MB_DATA10
MB_DATA9
MB_DATA8
MB_DATA7
MB_DATA6
MB_DATA5
MB_DATA4
MB_DATA3
MB_DATA2
MB_DATA1
MB_DATA0
MB_CHECK7
MB_CHECK6
MB_CHECK5
MB_CHECK4
MB_CHECK3
MB_CHECK2
MB_CHECK1
MB_CHECK0
MB_DM8
MB_DM7
MB_DM6
MB_DM5
MB_DM4
MB_DM3
MB_DM2
MB_DM1
MB_DM0
MB_DQS_H8
MB_DQS_L8
MB_DQS_H7
MB_DQS_L7
MB_DQS_H6
MB_DQS_L6
MB_DQS_H5
MB_DQS_L5
MB_DQS_H4
MB_DQS_L4
MB_DQS_H3
MB_DQS_L3
MB_DQS_H2
MB_DQS_L2
MB_DQS_H1
MB_DQS_L1
MB_DQS_H0
MB_DQS_L0
Athlon 64 M2
Processor Socket
DDRII: DATA
DDRII: DATA
4
3
Processor DDR2 Memory Interface
M_A_DQ63
MA_DATA63
MA_DATA62
MA_DATA61
MA_DATA60
MA_DATA59
MA_DATA58
MA_DATA57
MA_DATA56
MA_DATA55
MA_DATA54
MA_DATA53
MA_DATA52
MA_DATA51
MA_DATA50
MA_DATA49
MA_DATA48
MA_DATA47
MA_DATA46
MA_DATA45
MA_DATA44
MA_DATA43
MA_DATA42
MA_DATA41
MA_DATA40
MA_DATA39
MA_DATA38
MA_DATA37
MA_DATA36
MA_DATA35
MA_DATA34
MA_DATA33
MA_DATA32
MA_DATA31
MA_DATA30
MA_DATA29
MA_DATA28
MA_DATA27
MA_DATA26
MA_DATA25
MA_DATA24
MA_DATA23
MA_DATA22
MA_DATA21
MA_DATA20
MA_DATA19
MA_DATA18
MA_DATA17
MA_DATA16
MA_DATA15
MA_DATA14
MA_DATA13
MA_DATA12
MA_DATA11
MA_DATA10
MA_DATA9
MA_DATA8
MA_DATA7
MA_DATA6
MA_DATA5
MA_DATA4
MA_DATA3
MA_DATA2
MA_DATA1
MA_DATA0
MA_CHECK7
MA_CHECK6
MA_CHECK5
MA_CHECK4
MA_CHECK3
MA_CHECK2
MA_CHECK1
MA_CHECK0
MA_DM8
MA_DM7
MA_DM6
MA_DM5
MA_DM4
MA_DM3
MA_DM2
MA_DM1
MA_DM0
MA_DQS_H8
MA_DQS_L8
MA_DQS_H7
MA_DQS_L7
MA_DQS_H6
MA_DQS_L6
MA_DQS_H5
MA_DQS_L5
MA_DQS_H4
MA_DQS_L4
MA_DQS_H3
MA_DQS_L3
MA_DQS_H2
MA_DQS_L2
MA_DQS_H1
MA_DQS_L1
MA_DQS_H0
MA_DQS_L0
4
AE14
AG14
AG16
AD17
AD13
AE13
AG15
AE16
AG17
AE18
AD21
AG22
AE17
AF17
AF21
AE21
AF23
AE23
AJ26
AG26
AE22
AG23
AH25
AF25
AJ28
AJ29
AF29
AE26
AJ27
AH27
AG29
AF27
E29
E28
D27
C27
G26
F27
C28
E27
F25
E25
E23
D23
E26
C26
G23
F23
E22
E21
F17
G17
G22
F21
G18
E17
G16
E15
G13
H13
H17
E16
E14
G14
K25
J26
G28
G27
L24
K27
H29
H27
J25
AF15
AF19
AJ25
AH29
B29
E24
E18
H15
J28
J27
AD15
AE15
AG18
AG19
AG24
AG25
AG27
AG28
D29
C29
C25
D25
E19
F19
F15
G15
M_A_DQ62
M_A_DQ61
M_A_DQ60
M_A_DQ59
M_A_DQ58
M_A_DQ57
M_A_DQ56
M_A_DQ55
M_A_DQ54
M_A_DQ53
M_A_DQ52
M_A_DQ51
M_A_DQ50
M_A_DQ49
M_A_DQ48
M_A_DQ47
M_A_DQ46
M_A_DQ45
M_A_DQ44
M_A_DQ43
M_A_DQ42
M_A_DQ41
M_A_DQ40
M_A_DQ39
M_A_DQ38
M_A_DQ37
M_A_DQ36
M_A_DQ35
M_A_DQ34
M_A_DQ33
M_A_DQ32
M_A_DQ31
M_A_DQ30
M_A_DQ29
M_A_DQ28
M_A_DQ27
M_A_DQ26
M_A_DQ25
M_A_DQ24
M_A_DQ23
M_A_DQ22
M_A_DQ21
M_A_DQ20
M_A_DQ19
M_A_DQ18
M_A_DQ17
M_A_DQ16
M_A_DQ15
M_A_DQ14
M_A_DQ13
M_A_DQ12
M_A_DQ11
M_A_DQ10
M_A_DQ9
M_A_DQ8
M_A_DQ7
M_A_DQ6
M_A_DQ5
M_A_DQ4
M_A_DQ3
M_A_DQ2
M_A_DQ1
M_A_DQ0
M_A_DM7
M_A_DM6
M_A_DM5M_B_DM5
M_A_DM4
M_A_DM3
M_A_DM2
M_A_DM1
M_A_DM0
M_A_DQS7
M_A_DQS#7
M_A_DQS6
M_A_DQS#6
M_A_DQS5
M_A_DQS#5
M_A_DQS4
M_A_DQS#4
M_A_DQS3
M_A_DQS#3
M_A_DQS2
M_A_DQS#2
M_A_DQS1
M_A_DQS#1
M_A_DQS0
M_A_DQS#0
To SODIMM socket A (near)To SODIMM socket B (Far)
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQ[0..63] {8}M_B_DQ[0..63]{8}
M_A_DM[0..7] {8}M_B_DM[0..7]{8}
M_A_DQS[0..7] {8}
M_A_DQS#[0..7] {8}
3
VTT==>1.75A
PLACE THEM CLOSE TO
CPU WITHIN 1"
1.8VSUS
R167
R167
39.2F
39.2F
1 2
R163
R163
39.2F
39.2F
1 2
T35T35
M_A_CS#3{8,9}
M_A_CS#2{8,9}
M_A_CS#1{8,9}
M_A_CS#0{8,9}
M_B_CS#3{8,9}
M_B_CS#2{8,9}
M_B_CS#1{8,9}
M_B_CS#0{8,9}
M_CKE3{8,9}
M_CKE2{8,9}
M_CKE1{8,9}
M_CKE0{8,9}
M_A_A[0..15]{8,9}
M_A_BS#2{8,9}
M_A_BS#1{8,9}
M_A_BS#0{8,9}
M_A_RAS#{8,9}
M_A_CAS#{8,9}
M_A_WE#{8,9}
SMDDR_VTERM
CPU_M_VREF
M_ZN
M_ZP
C180
C180
4.7U_0603
4.7U_0603
C795
C795
1000P
1000P
2
CPU_M_VREF
VTT_SENSE
M_A_A15
M_A_A14
M_A_A13
M_A_A12
M_A_A11
M_A_A10
M_A_A9
M_A_A8
M_A_A7
M_A_A6
M_A_A5
M_A_A4
M_A_A3
M_A_A2
M_A_A1
M_A_A0
C182
C182
4.7U_0603
4.7U_0603
C774
C774
1000P
1000P
2
D12
C12
B12
A12
AK12
AJ12
AH12
AG12
AL12
F12
E12
AH11
AJ11
AD27
AA25
AC25
AA24
AE29
AB31
AE30
AC31
M31
M29
M25
M27
N24
AC26
N26
P25
Y25
N27
R24
P27
R25
R26
R27
T25
U25
T27
W24
N25
Y27
AA27
AA26
AB25
AB27
C189
C189
0.1U
0.1U
L27
1
1.8VSUS
R136
R136
2K/F
2K/F
C188
C188
R137
R137
1000P
1000P
2K/F
2K/F
U22B
U22B
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
MEMVREF
VTT_SENSE
MEMZN
MEMZP
MA1_CS_L1
MA1_CS_L0
MA0_CS_L1
MA0_CS_L0
MB1_CS_L1
MB1_CS_L0
MB0_CS_L1
MB0_CS_L0
MB_CKE1
MB_CKE0
MA_CKE1
MA_CKE0
MA_ADD15
MA_ADD14
MA_ADD13
MA_ADD12
MA_ADD11
MA_ADD10
MA_ADD9
MA_ADD8
MA_ADD7
MA_ADD6
MA_ADD5
MA_ADD4
MA_ADD3
MA_ADD2
MA_ADD1
MA_ADD0
MA_BANK2
MA_BANK1
MA_BANK0
MA_RAS_L
MA_CAS_L
MA_WE_L
Athlon 64 M2
Processor Socket
C179
C179
4.7U_0603
4.7U_0603
C796
C796
1000P
1000P
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
MA1_CLK_H2
MA1_CLK_L2
MA1_CLK_H1
MA1_CLK_L1
MA1_CLK_H0
MA1_CLK_L0
MA0_CLK_H2
MA0_CLK_L2
MA0_CLK_H1
MA0_CLK_L1
MA0_CLK_H0
MA0_CLK_L0
MB1_CLK_H2
MB1_CLK_L2
MB1_CLK_H1
MB1_CLK_L1
MB1_CLK_H0
MB1_CLK_L0
MB0_CLK_H2
MB0_CLK_L2
MB0_CLK_H1
MB0_CLK_L1
MB0_CLK_H0
MB0_CLK_L0
DDR II: CMD/CTRL/CLK
DDR II: CMD/CTRL/CLK
C34
C34
4.7U_0603
4.7U_0603
C779
C779
1000P
1000P
AMD M2+ DDR II Memory I/F
AMD M2+ DDR II Memory I/F
AMD M2+ DDR II Memory I/F
MB1_ODT0
MB0_ODT0
MA1_ODT0
MA0_ODT0
MB_ADD15
MB_ADD14
MB_ADD13
MB_ADD12
MB_ADD11
MB_ADD10
MB_ADD9
MB_ADD8
MB_ADD7
MB_ADD6
MB_ADD5
MB_ADD4
MB_ADD3
MB_ADD2
MB_ADD1
MB_ADD0
MB_BANK2
MB_BANK1
MB_BANK0
MB_RAS_L
MB_CAS_L
MB_WE_L
C35
C35
0.22U
0.22U
C797
C797
180P
180P
AE20
AE19
G20
G21
V27
W27
AG21
AG20
G19
H19
U27
U26
AL19
AL18
C19
D19
W29
W28
AJ19
AK19
A18
A19
U31
U30
AD31
AD29
AC27
AC28
M_B_A15
N28
M_B_A14
N29
M_B_A13
AE31
M_B_A12
N30
M_B_A11
P29
M_B_A10
AA29
M_B_A9
P31
M_B_A8
R29
M_B_A7
R28
M_B_A6
R31
M_B_A5
R30
M_B_A4
T31
M_B_A3
T29
M_B_A2
U29
M_B_A1
U28
M_B_A0
AA30
N31
AA31
AA28
AB29
AC29
AC30
C122
C122
0.22U
0.22U
C784
C784
180P
180P
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
C170
C170
0.22U
0.22U
C800
C800
180P
180P
1
M_CLKOUT1 {8}
M_CLKOUT1# {8}
M_CLKOUT0 {8}
M_CLKOUT0# {8}
M_CLKOUT4 {8}
M_CLKOUT4# {8}
M_CLKOUT3 {8}
M_CLKOUT3# {8}
M_ODT3 {8,9}
M_ODT2 {8,9}
M_ODT1 {8,9}
M_ODT0 {8,9}
M_B_A[0..15] {8,9}
M_B_BS#2 {8,9}
M_B_BS#1 {8,9}
M_B_BS#0 {8,9}
M_B_RAS# {8,9}
M_B_CAS# {8,9}
M_B_WE# {8,9}
SMDDR_VTERM
C26
C26
0.22U
0.22U
C787
C787
180P
180P
QU1T
QU1T
QU1T
5 44Tuesday, September 01, 2009
5 44Tuesday, September 01, 2009
5 44Tuesday, September 01, 2009
5
B
B
B
http://mycomp.su/x/
5
4
3
2
1
CPU_VDDA
L15 40ohm_600mAL15 40ohm_600mA
VCC3
D D
Vout =0.8(1+R1/R2)
= 0.8 (1+10K/4.7K)
= 2.5V
If AMD SI is not used, the SID pin can be left unconnected and SIC
should have a 300- ( 5%) pulldown to VSS.
1.8VSUS
CPU_SIC{14}
CPU_SID{14}
C C
CPUCLKP{3}
CPUCLKN{3}
CPU_PWRGD{14}
LDT_STOP#{12,14}
LDT_RST#{14}
B B
H_PROCHOT#
R210 *10KR210 *10K
VCC3
VCC3
A A
VCC3
R209 *10KR209 *10K
5
PU5
PU5
1
SHDN
2
GND
3
VIN
APL5315BI-TRL
APL5315BI-TRL
PC28
PC28
10U_0805
10U_0805
 
R495 *300R495 *300
R497 *300R497 *300
R506 *0R506 *0
R496 *0R496 *0
C230 3900PC230 3900P
C229 3900PC229 3900P
R182
R182
680
680
1.8VSUS
R129
R129
300
300
THMDAT
1
THMCLK
1
VO
SET
R164
R164
169_0603F
169_0603F
R183
R183
680
680
1.8VSUS
R131
R131
10K
10K
2
1 3
MMBT3904
MMBT3904
Q10
Q10
R211 0R211 0
2
2
R208 0R208 0
4
5
R1
R2
CPU_SIC_R
CPU_SID_R
R173 0R173 0
R174 0R174 0
R172 0R172 0
R180
R180
680
680
VCC3
Q17
Q17
*2N7002E-LF
*2N7002E-LF
3
3
Q16
Q16
*2N7002E-LF
*2N7002E-LF
PR68
PR68
10K_6
10K_6
PR67
PR67
4.7K_6
4.7K_6
R501300 R501300
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
R128
R128
4.7K
4.7K
MBDATA
MBCLK
CPU_VDDA
PC33
PC33
10U_0805
10U_0805
CPU_ALL_PWROK
CPU_LDTSTOP#
CPU_HT_RESET#
TALERT# {16}
MBDATA {33}
MBCLK {33}
COREFB+V{37}
COREFB-{37}
CPU_TEST27_SINGLECHAIN
CPU_TEST26_BURNIN#
CPU_PRESENT#
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST21_SCANEN
CPU_TEST20_SCANCLK2
CPU_TEST24_SCANCLK1
CPU_TEST22_SCANSHIFTEN
CPU_TEST12_SCANSHIFTENB
CPU_TEST15_BP1
CPU_TEST14_BP0
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST19_PLLTEST0
CPU_TEST18_PLLTEST1
1.8VSUS
R125 *220R125 *220
R124 300_4R124 300_4
R126 *220R126 *220
R152 *220R152 *220
R159 *220R159 *220
CPU_DBREQ#
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
NOTE: HDT TERMINATION IS REQUIRED
FOR REV. Ax SILICON ONLY.
4
CPU_TDO
C292 0.1UC292 0.1U
C270 2200P_0603C270 2200P_0603
H_THERMDA
H_THERMDC
SYS_SHDN#1
CPU_CORE
T180T180
T182T182
T40T40
T43T43
T21T21
T51T51
T24T24
U6
U6
1
2
3
4
ADM1032ARMZ-1RL
ADM1032ARMZ-1RL
MSOP8-4_9-65
MSOP8-4_9-65
close to CPU
R154 *300R154 *300
R493 300R493 300
R491 1K/FR491 1K/F
R511 510/FR511 510/F
R519 300R519 300
R510 *300R510 *300
R516 *300R516 *300
R526 *300R526 *300
R522 *300R522 *300
R157 *300R157 *300
R181 *300R181 *300
R507 510/FR507 510/F
R151 300R151 300
R156 300R156 300
R201 0RR201 0R
VCC
DXP
DXN
-OVT
PR6510/F PR6510/F
PR6410/F PR6410/F
C293
C293
*0.1U
*0.1U
SMCLK
SMDATA
-ALT
GND
1.8VSUS
THMCLKTHERM_VCC
8
THMDAT
7
THERM_ALERT#
6
5
3
VLDT_RUN
VCC3
VDDA==>250mA
VDDA_RUN
C200
C200
4.7U_0603
4.7U_0603
CPU_HT_RESET#
T28T28
CPU_ALL_PWROK
T52T52
CPU_LDTSTOP#
T59T59
CPU_SIC_R
CPU_SID_R
R166 44.2FR166 44.2F
R162 44.2FR162 44.2F
place them to CPU within 1"
CPU_VDDIO_SUS_FB_H
T36T36
CPU_VDDIO_SUS_FB_L
T33T33
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST19_PLLTEST0
CPU_TEST18_PLLTEST1
CPU_TEST17_BP3
T177T177
CPU_TEST16_BP2
T60T60
CPU_TEST15_BP1
CPU_TEST14_BP0
CPU_TEST12_SCANSHIFTENB
CPU_TEST07_ANALOG_T
T169T169
CPU_TEST6_DIECRACKMON
T76T76
H_THERMDC
T46T46
H_THERMDA
T57T57
CPU_TEST3_GATE0
T63T63
CPU_TEST2_DRAIN0
T70T70
T19T19
T18T18
T7T7
T13T13
CPU_RSVD_MA0_CLK3_P
T16T16
CPU_RSVD_MA0_CLK3_N
T17T17
T14T14
CPU_RSVD_MB0_CLK3_P
T15T15
CPU_RSVD_MB0_CLK3_N
T20T20
THMCLK {12}
THMDAT {12}
THERM_ALERT# {12,21,32}
ATHLON Control and Debug
12
C215
C215
C212
C212
0.22U
0.22U
3300pF
3300pF
U22D
U22D
C10
VDDA2
VDDA1
RESET_L
PWROK
LDTSTOP_L
SIC
SID
HT_REF1
HT_REF0
VDD_FB_H
VDD_FB_L
VDDIO_FB_H
VDDIO_FB_L
CLKIN_H
CLKIN_L
DBRDY
TMS
TCK
TRST_L
TDI
TEST25_H
TEST25_L
TEST19
TEST18
TEST13
TEST9
TEST17
TEST16
TEST15
TEST14
TEST12
TEST7
TEST6
TEST5
TEST4
TEST3
TEST2
RSVD0
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
SYS_SHDN#1
2
THERMTRIP_L
PROCHOT_L
CPU_PRESENT_L
DBREQ_L
TEST29_H
TEST29_L
TEST24
TEST23
TEST22
TEST21
TEST20
TEST28_H
TEST28_L
TEST27
TEST26
TEST10
TEST8
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
MISC
MISC
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD36
RSVD37
R196 0R196 0
CPU_HTREF1
CPU_HTREF0
ADM1032ARMZ-2RL
ADM1032ARMZ-1RL
D10
C7
C9
D8
AL6
AK6
V8
V7
G2
G1
AK11
AL11
A8
B8
B6
AL9
AH10
AJ10
AL10
A10
B10
F10
E9
AJ7
F6
D6
E7
F8
C5
AH9
E5
AJ5
AG9
AG8
AH7
AJ6
L25
L26
L31
L30
W26
W25
AE27
U24
V24
AE28
AD25
AE24
AE25
AJ18
AJ20
C18
C20
G24
G25
H25
V29
W30
AMD NPT M2 SOCKET
Processor Socket
SYS_SHDN#1{12}
SMBUS SLAVE ADDRESS
98 (NB)
9A (CPU)
VID5
VID4
VID3
VID2
VID1
VID0
PSI_L
NC#1
NC#2
NC#3
NC#4
NC#5
NC#6
NC#7
NC#8
TDO
AK7
AL7
D2
D1
C1
E3
E2
E1
AL3
F1
H3
H4
H20
H21
A5
AK10
C11
D11
AE7
AD19
AE8
AD18
AK8
AH8
AJ9
AL8
AJ8
J10
H9
AK9
AK5
G7
D4
E20
B19
AL4
AK4
AK3
F2
F3
G4
G3
G5
Y31
Y30
AG31
V31
W31
AF31
VCC3
1.8VSUS
H_THERMTRIP#
H_PROCHOT#
CPU_PRESENT#
CPU_DBREQ#
CPU_TDO
CPU_TEST29_H_FBCLKOUT_P
CPU_TEST29_L_FBCLKOUT_N
CPU_TEST24_SCANCLK1
CPU_TEST23_TSTUPD
CPU_TEST22_SCANSHIFTEN
CPU_TEST21_SCANEN
CPU_TEST20_SCANCLK2
CPU_TEST28_H_PLLCHRZ_P
CPU_TEST28_L_PLLCHRZ_N
CPU_TEST27_SINGLECHAIN
CPU_TEST26_BURNIN#
CPU_TEST10_ANALOGOUT
CPU_TEST08_DIG_T
CPU_MA_RESET#
CPU_MB_RESET#
CPU_RSVD_VIDSTRB1
CPU_RSVD_VIDSTRB0
CPU_RSVD_VDDNB_FB_P
CPU_RSVD_VDDNB_FB_N
CPU_RSVD_CORE_TYPE
R195
R195
10K
10K
3
Q14
Q14
ME2N7002E
ME2N7002E
2
1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
1.8VSUS 1.8VSUS
R135
R135
10K
10K
R487
R132
R132
300
300
T159T159
AMD M2+ CTRL & DEBUG
AMD M2+ CTRL & DEBUG
AMD M2+ CTRL & DEBUG
R487
300
300
2
1 3
MMBT3904
MMBT3904
Q11
Q11
VID5 {37}
VID4 {37}
VID3 {37}
VID2 {37}
VID1 {37}
VID0 {37}
PSI_L is a Power Status Indicator
PSI# {37}
signal. This signal is asserted when
the processor is in a low powerstate.
PSI_L should be connected to the power
supply controller, if the controller
supports ¨skipmode, or diode emulation
mode. PSI_L is asserted by the
processor during the C3 and S1 states.
R149 80.6FR149 80.6F
PLACE IT CLOSE TO CPU WITHIN 1"
ROUTE AS 80 Ohm DIFFERENTIAL PAIR
T67T67
T39T39
T45T45
T53T53
T172T172
T22T22
T23T23
T80T80
T78T78
T82T82
T160T160
T165T165
T167T167
T164T164
T72T72
T8T8
T11T11
T6T6
T10T10
T5T5
T9T9
VCC3
R153
R153
200K_0603
200K_0603
SYS_SHDN# {37}
3
Q13
Q13
2N7002E-LF
2N7002E-LF
2
C197
C197
0.01U_0603
0.01U_0603
1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
SB_THERMTRIP# {15}
QU1T
QU1T
QU1T
6 44Tuesday, September 01, 2009
6 44Tuesday, September 01, 2009
6 44Tuesday, September 01, 2009
6
B
B
B
http://mycomp.su/x/
5
4
3
2
1
PROCESSOR POWER AND GROUND
U22H
U22H
U22G
U22G
A3
VSS1
AA11
AA13
AA15
AA17
AA19
AA21
AA23
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC7
AC9
AC11
AC13
AC15
AC17
AC19
AC21
AC23
AD8
AD10
AD12
AD14
AD16
AD20
AD22
AD24
AE4
AE5
AE9
AE11
AF2
AF3
AF8
AF10
AF12
AF14
AF16
AF18
AF20
AF22
AF24
AF26
AF28
AG10
A11
AA4
AA5
AA7
AA9
AB2
AB3
AB8
A7
A9
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS61
Athlon 64 M2
Processor Socket
GND1
GND1
VDDIO==>3.6A
Y29
Y28
Y26
Y24
V30
V28
V26
V25
T30
T28
T26
T24
P30
P28
P26
P24
M30
M28
M26
M24
AF30
AD30
AD28
AD26
AC24
AB30
AB28
AB26
AB24
Y23
W22
V23
U22
T23
R22
P23
P21
N22
N20
M23
M21
L22
L20
AF11
AE12
AD23
AD11
AC22
AC20
AC18
AC16
AC14
AC12
1.8VSUS
CPU_CORE
D D
C C
B B
CPU_CORE
AA8
AA10
AA12
AA14
AA16
AA18
AB7
AB9
AB11
AC4
AC5
AC8
AC10
AD2
AD3
AD7
AD9
AE10
AF7
AF9
AG4
AG5
AG7
AH2
AH3
E10
F11
G10
G12
H11
H23
A4
A6
B3
B5
B7
C2
C4
C6
C8
D3
D5
D7
D9
E4
E6
E8
F5
F7
F9
G6
G8
H7
U22E
U22E
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD37
VDD38
VDD39
VDD40
VDD41
VDD42
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
Athlon 64 M2
Processor Socket
VDD106
VDD105
VDD104
VDD103
VDD102
VDD101
VDD100
VDD99
VDD98
VDD97
VDD96
VDD95
VDD94
VDD93
VDD92
VDD91
VDD90
VDD89
VDD88
VDD87
VDD86
VDD85
VDD84
VDD83
VDD82
VDD81
VDD80
VDD79
VDD78
VDD77
VDD76
POWER1
POWER1
VDD75
VDD74
VDD73
VDD72
VDD71
VDD70
VDD69
VDD68
VDD67
VDD66
VDD65
VDD64
VDD63
VDD62
VDD61
VDD60
VDD59
VDD58
VDD57
VDD56
VDD55
VDD54
CPU_CORE CPU_CORE
R10
R8
R5
R4
P19
P17
P15
P13
P11
P9
P7
N18
N16
N14
N12
N10
N8
M19
M17
M15
M13
M11
M9
M7
M3
M2
L18
L16
L14
Y19
Y17
L12
L10
L8
L5
L4
K23
K21
K19
K17
K15
K13
K11
K9
K7
J24
J22
J20
J18
J16
J14
J12
J8
R12
R14
R16
R18
R20
T11
T13
T15
T17
T19
T21
U10
U12
U14
U16
U18
U20
V11
V13
V15
V17
V19
V21
W10
W12
W14
W16
W18
W20
Y11
Y13
Y15
Y21
AA20
AA22
AB13
AB15
AB17
AB19
AB21
AB23
U22F
U22F
VDD107
VDD108
VDD109
VDD110
VDD111
T2
VDD112
T3
VDD113
T7
VDD114
T9
VDD115
VDD116
VDD117
VDD118
VDD119
VDD120
VDD121
U8
VDD122
VDD123
VDD124
VDD125
VDD126
VDD127
VDD128
V9
VDD129
VDD130
VDD131
VDD132
VDD133
VDD134
VDD135
W4
VDD136
W5
VDD137
W8
VDD138
VDD139
VDD140
VDD141
VDD142
VDD143
VDD144
Y2
VDD145
Y3
VDD146
Y7
VDD147
Y9
VDD148
VDD149
VDD150
VDD151
VDD152
VDD153
VDD154
VDD155
VDD156
VDD157
VDD158
VDD159
VDD160
VDDIO28
VDDIO27
VDDIO26
VDDIO25
VDDIO24
VDDIO23
VDDIO22
VDDIO21
VDDIO20
VDDIO19
VDDIO18
VDDIO17
VDDIO16
VDDIO15
VDDIO14
VDDIO13
VDDIO12
VDDIO11
VDDIO10
POWER2
POWER2
VDDIO9
VDDIO
VDDIO8
VDDIO7
VDDIO6
VDDIO5
VDDIO4
VDDIO3
VDDIO2
VDDIO1
VDD184
VDD183
VDD182
VDD181
VDD180
VDD179
VDD178
VDD177
VDD176
VDD175
VDD174
VDD173
VDD172
VDD171
VDD170
VDD169
VDD168
VDD167
VDD166
VDD165
VDD164
VDD163
VDD162
VDD161
VSS121
VSS120
VSS119
VSS118
VSS117
VSS116
VSS115
VSS114
VSS113
VSS112
VSS111
VSS110
VSS109
VSS108
VSS107
VSS106
VSS105
VSS104
VSS103
VSS102
VSS101
VSS100
VSS99
VSS98
VSS97
VSS96
VSS95
VSS94
VSS93
VSS92
VSS91
VSS90
VSS89
VSS88
VSS87
VSS86
VSS85
VSS84
VSS83
VSS82
VSS81
VSS80
VSS79
VSS78
VSS77
VSS76
VSS75
VSS74
VSS73
VSS72
VSS71
VSS70
VSS69
VSS68
VSS67
VSS66
VSS65
VSS64
VSS63
VSS62
H10
H8
G11
G9
F30
F28
F26
F24
F22
F20
F18
F16
F14
F4
E11
D30
D28
D26
D24
D22
D20
D18
D16
D14
C3
B30
B28
B26
B24
B22
B20
B18
B16
B14
B11
B9
B4
AL5
AK30
AK28
AK26
AK24
AK22
AK20
Y16
Y14
AK18
AK16
AK14
AK2
AH30
AH28
AH26
AH24
AH22
AH20
AH18
AH16
AH14
AG11
T22
T20
T18
T16
T14
T12
T10
R23
R21
R19
R17
R15
R13
R11
P22
P20
P18
P16
P14
P12
P10
N23
N21
N19
N17
Y18
K22
K20
K18
K16
K14
K12
K10
H30
H28
H26
H24
H22
H18
H16
H14
H12
VSS183
VSS182
VSS181
VSS180
VSS179
VSS178
VSS177
T8
VSS176
VSS175
VSS174
VSS173
VSS172
VSS171
VSS170
VSS169
R9
VSS168
R7
VSS167
VSS166
VSS165
VSS164
VSS163
VSS162
VSS161
VSS160
P8
VSS159
P3
VSS158
P2
VSS157
VSS156
VSS155
VSS154
VSS153
VSS152
VSS151
VSS150
VSS149
VSS148
VSS147
VSS146
VSS145
K8
VSS144
K3
VSS143
K2
VSS142
J23
VSS141
J21
VSS140
J19
VSS139
J17
VSS138
J15
VSS137
J13
VSS136
J11
VSS135
J9
VSS134
J7
VSS133
J5
VSS132
J4
VSS131
VSS130
VSS129
VSS128
VSS127
VSS126
VSS125
VSS124
VSS123
VSS122
GND2
GND2
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
U4
U5
U7
U9
U11
U13
U15
U17
U19
U21
U23
V2
V3
V10
V12
V14
V16
V18
V20
V22
W9
W11
W13
W15
W17
W19
W21
W23
Y8
Y10
Y12
W7
Y20
Y22
K24
K26
K28
K30
L7
L9
L11
L13
L15
L17
L19
L21
L23
M8
M10
M12
M14
M16
M18
M20
M22
N4
N5
N7
N9
N11
N13
N15
A1
AL1
Athlon 64 S1g1
uPGA940
Top View
7
A31
BOTTOMSIDE DECOUPLING
CPU_CORE
C204
C204
10U_0603
10U_0603
C205
C205
10U_0603
10U_0603
C203
C203
10U_0603
10U_0603
C206
C206
10U_0603
10U_0603
C207
C207
10U_0603
10U_0603
C208
C208
10U_0603
10U_0603
C209
C209
10U_0603
10U_0603
C211
C211
10U_0603
10U_0603
C210
C210
10U_0603
10U_0603
DECOUPLING BETWEEN PROCESSOR AND DIMMs
PLACE CLOSE TO PROCESSOR AS POSSIBLE
1.8VSUS
C145
C145
4.7U_0603
4.7U_0603
C151
C151
4.7U_0603
4.7U_0603
C147
C147
4.7U_0603
4.7U_0603
C157
C157
0.22U
0.22U
C150
C150
0.22U
0.22U
C154
C154
0.22U
0.22U
C160
C160
0.22U
0.22U
C159
C159
0.22U
0.22U
1.8VSUS
C146
C146
4.7U_0603
4.7U_0603
C164
C164
0.22U
0.22U
C158
C158
0.01U
0.01U
C165
C165
180P
180P
1.8VSUS
C223
C223
0.22U
0.22U
C144
C144
10U_0805
10U_0805
C224
C224
0.22U
0.22U
C143
C143
10U_0805
10U_0805
C222
C222
0.01U
0.01U
C166
C166
0.22U
0.22U
C225
C225
180P
180P
C169
C169
0.22U
0.22U
C167
C155
C155
C153
A A
CPU_CORE
C173
C195
C193
C193
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
C194
C194
5
C191
C191
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
C192
C192
C195
22U/6.3V_8
22U/6.3V_8
C183
C183
22U/6.3V_8
22U/6.3V_8
C756
C756
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
C759
C759
C770
C770
22U/6.3V_8
22U/6.3V_8
4
22U/6.3V_8
22U/6.3V_8
C185
C185
C173
22U/6.3V_8
22U/6.3V_8
C174
C174
22U/6.3V_8
22U/6.3V_8
C175
C175
22U/6.3V_8
22U/6.3V_8
C176
C176
22U/6.3V_8
22U/6.3V_8
C178
C178
22U/6.3V_8
22U/6.3V_8
3
C153
0.01U
0.01U
180P
180P
C167
180P
180P
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
AMD M2+ PWR & GND
AMD M2+ PWR & GND
AMD M2+ PWR & GND
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT :
QU1T
QU1T
QU1T
B
B
B
7 44Tuesday, September 01, 2009
7 44Tuesday, September 01, 2009
7 44Tuesday, September 01, 2009
1
http://mycomp.su/x/
5
1.8VSUS
4
3
1.8VSUS
2
1
8
103
111
104
112
117
VDD7
SO-DIMM
SO-DIMM
VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21
VDD8
VSS29
122
121
118
VDD9
VDD10
VDD11
NC/TEST
GuidePin
GuidePin
VSS32
VSS31
VSS30
128
127
CN14
CN14
5
DQ0
7
DQ1
17
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
DQ10
37
DQ11
20
DQ12
22
DQ13
36
DQ14
38
DQ15
43
DQ16
45
DQ17
55
DQ18
57
DQ19
44
DQ20
46
DQ21
56
DQ22
58
DQ23
61
DQ24
63
DQ25
73
DQ26
75
DQ27
62
DQ28
64
DQ29
74
DQ30
76
DQ31
123
DQ32
125
DQ33
135
DQ34
137
DQ35
124
DQ36
126
DQ37
134
DQ38
136
DQ39
141
DQ40
143
DQ41
151
DQ42
153
DQ43
140
DQ44
142
DQ45
152
DQ46
154
DQ47
157
DQ48
159
DQ49
173
DQ50
175
DQ51
158
DQ52
160
DQ53
174
DQ54
176
DQ55
179
DQ56
181
DQ57
189
DQ58
191
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
50
NC1
69
NC2
83
NC3
120
NC4
163
201
202
196
VSS56
193
VSS55
190
VSS54
187
VSS53
184
VSS52
183
VSS51
178
VSS50
177
VSS49
172
VSS48
171
VSS47
168
VSS46
165
VSS45
162
VSS44
161
VSS43
156
VSS42
155
VSS41
150
VSS40
149
VSS39
145
VSS38
144
VSS37
139
VSS36
138
VSS35
133
VSS34
VSS33
DDRII_SODIMM_R
DDRII_SODIMM_R
132
2
M_B_DQ4
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ5
M_B_DQ0
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ15
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ11
M_B_DQ20
M_B_DQ16
M_B_DQ19
M_B_DQ23
M_B_DQ21
M_B_DQ17
M_B_DQ18
M_B_DQ22
M_B_DQ29
M_B_DQ28
M_B_DQ26
M_B_DQ27
M_B_DQ24
M_B_DQ25
M_B_DQ30
M_B_DQ31
M_B_DQ33
M_B_DQ36
M_B_DQ39
M_B_DQ35
M_B_DQ32
M_B_DQ37
M_B_DQ34
M_B_DQ38
M_B_DQ40
M_B_DQ41
M_B_DQ46
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ47
M_B_DQ42
M_B_DQ53
M_B_DQ49
M_B_DQ55
M_B_DQ54
M_B_DQ48
M_B_DQ52
M_B_DQ50
M_B_DQ51
M_B_DQ60
M_B_DQ57
M_B_DQ62
M_B_DQ59
M_B_DQ61
M_B_DQ56
M_B_DQ63
M_B_DQ58
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
103
111
104
112
117
VDD7
SO-DIMM
SO-DIMM
VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21
VDD8
VSS29
122
121
118
VDD9
VDD10
VDD11
NC/TEST
GuidePin
GuidePin
VSS32
VSS31
VSS30
132
128
127
CN15
CN15
5
DQ0
7
DQ1
17
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
DQ10
37
DQ11
20
DQ12
22
DQ13
36
DQ14
38
DQ15
43
DQ16
45
DQ17
55
DQ18
57
DQ19
44
DQ20
46
DQ21
56
DQ22
58
DQ23
61
DQ24
63
DQ25
73
DQ26
75
DQ27
62
DQ28
64
DQ29
74
DQ30
76
DQ31
123
DQ32
125
DQ33
135
DQ34
137
DQ35
124
DQ36
126
DQ37
134
DQ38
136
DQ39
141
DQ40
143
DQ41
151
DQ42
153
DQ43
140
DQ44
142
DQ45
152
DQ46
154
DQ47
157
DQ48
159
DQ49
173
DQ50
175
DQ51
158
DQ52
160
DQ53
174
DQ54
176
DQ55
179
DQ56
181
DQ57
189
DQ58
191
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
50
NC1
69
NC2
83
NC3
120
NC4
163
201
202
196
VSS56
193
VSS55
190
VSS54
187
VSS53
184
VSS52
183
VSS51
178
VSS50
177
VSS49
172
VSS48
171
VSS47
168
VSS46
165
VSS45
162
VSS44
161
VSS43
156
VSS42
155
VSS41
150
VSS40
149
VSS39
145
VSS38
144
VSS37
139
VSS36
138
VSS35
133
VSS34
VSS33
DDRII_SODIMM_R
DDRII_SODIMM_R
4
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ5
M_A_DQ4
M_A_DQ7
M_A_DQ6
M_A_DQ12
M_A_DQ8
M_A_DQ10
M_A_DQ14
M_A_DQ13
M_A_DQ9
M_A_DQ15
M_A_DQ11
M_A_DQ21
M_A_DQ17
M_A_DQ19
M_A_DQ18
M_A_DQ20
M_A_DQ16
M_A_DQ22
M_A_DQ23
M_A_DQ29
M_A_DQ28
M_A_DQ31
M_A_DQ30
M_A_DQ25
M_A_DQ24
M_A_DQ27
M_A_DQ26
M_A_DQ36
M_A_DQ32
M_A_DQ38
M_A_DQ35
M_A_DQ33
M_A_DQ37
M_A_DQ34
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ46
M_A_DQ44
M_A_DQ45
M_A_DQ43
M_A_DQ47
M_A_DQ49
M_A_DQ53
M_A_DQ55
M_A_DQ51
M_A_DQ52
M_A_DQ48
M_A_DQ50
M_A_DQ54
M_A_DQ56
M_A_DQ61
M_A_DQ58
M_A_DQ59
M_A_DQ57
M_A_DQ60
M_A_DQ62
M_A_DQ63
M_A_A[0..15]{5,9}
R73 *4.7KR73 *4.7K
VCC3
R74 *4.7KR74 *4.7K
D D
SA_A : 00
M_A_DM[0..7]{5}
C C
M_A_DQS[0..7]{5}
M_A_DQS#[0..7]{5}
B B
VCC3
1.8VSUS
A A
SA0_A
SA1_A
12
12
R750 R750
M_A_BS#0{5,9}
M_A_BS#1{5,9}
M_A_BS#2{5,9}
M_CLKOUT0{5}
M_CLKOUT0#{5}
M_CLKOUT1{5}
M_CLKOUT1#{5}
M_CKE0{5,9}
M_CKE1{5,9}
M_A_RAS#{5,9}
M_A_CAS#{5,9}
M_A_WE#{5,9}
M_A_CS#0{5,9}
M_A_CS#1{5,9}
M_ODT0{5,9}
M_ODT1{5,9}
SDATA0{3,15,23}
SCLK0{3,15,23}
C92 0.1UC92 0.1U
C75
C75
2.2U_0805
2.2U_0805
M_CLKOUT0
C62
C62
1.5P
1.5P
M_CLKOUT0#
M_CLKOUT1
C61
C61
1.5P
1.5P
M_CLKOUT1#
R720 R720
1 2
5
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_CLKOUT0
M_CLKOUT0#
M_CLKOUT1
M_CLKOUT1#
SA1_A
C104 0.1UC104 0.1U
MVREF_DIM
C89
C89
0.1U
0.1U
102
A0
101
A1
1
2
3
8
9
VDD081VDD182VDD287VDD388VDD495VDD596VDD6
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
BA0
BA1
BA2
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
CK0
CK0
CK1
CK1
CKE0
CKE1
RAS
CAS
WE
S0
S1
ODT0
ODT1
SA0
SA1
SDA
SCL
VDDspd
VREF
VSS0
VSS1
(H=6.5)
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
59
100
99
98
97
94
92
93
91
105
90
89
116
86
84
107
106
85
10
26
52
67
130
147
170
185
13
31
51
70
131
148
169
188
11
29
49
68
129
146
167
186
30
32
164
166
79
80
108
113
109
110
115
114
119
198
200
195
197
199
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
M_A_DQ[0..63] {5}
R81 4.7KR81 4.7K
VCC3
R80 *4.7KR80 *4.7K
SA_B : 10
M_A_CS#2 {5,9}
M_A_CS#3 {5,9}
VCC3
1.8VSUS
1.This part should not contain any substances which are specified in SS-00259-1
2.Purchase ink, paint, wire rods and molding resins only from the business partners that Sony approves as Green Partners.
M_B_A[0..15]{5,9}
SA1_B
12
12
R910 R910
M_B_DM[0..7]{5}
M_B_DQS[0..7]{5}
M_B_DQS#[0..7]{5}
M_CLKOUT3{5}
M_CLKOUT3#{5}
M_CLKOUT4{5}
M_CLKOUT4#{5}
M_CKE2{5,9}
M_CKE3{5,9}
M_B_RAS#{5,9}
M_B_CAS#{5,9}
M_B_WE#{5,9}
M_B_CS#0{5,9}
M_B_CS#1{5,9}
M_ODT2{5,9}
M_ODT3{5,9}
ES2 1121
SDATA0{3,15,23}
SCLK0{3,15,23}
C100 0.1UC100 0.1U
C106
C106
2.2U_0805
2.2U_0805
M_CLKOUT3
C101
C101
1.5P
1.5P
M_CLKOUT3#
M_CLKOUT4
C102
C102
1.5P
1.5P
M_CLKOUT4#
SA0_B
R92*0 R92*0
M_B_BS#0{5,9}
M_B_BS#1{5,9}
M_B_BS#2{5,9}
1 2
3
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_CLKOUT3
M_CLKOUT3#
M_CLKOUT4
M_CLKOUT4#
SA0_B
SA1_BSA0_A
C105 0.1UC105 0.1U
MVREF_DIM
C113
C113
0.1U
0.1U
102
A0
101
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
BA0
BA1
BA2
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
CK0
CK0
CK1
CK1
CKE0
CKE1
RAS
CAS
WE
S0
S1
ODT0
ODT1
SA0
SA1
SDA
SCL
VDDspd
1
VREF
2
VSS0
3
VSS1
8
VSS2
9
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VDD081VDD182VDD287VDD388VDD495VDD596VDD6
(H=11)
59
100
99
98
97
94
92
93
91
105
90
89
116
86
84
107
106
85
10
26
52
67
130
147
170
185
13
31
51
70
131
148
169
188
11
29
49
68
129
146
167
186
30
32
164
166
79
80
108
113
109
110
115
114
119
198
200
195
197
199
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
M_B_DQ[0..63] {5}
1.8VSUS
M_B_CS#2 {5,9}
M_B_CS#3 {5,9}
SMDDR_VREF
DDRII SODIMM x2
DDRII SODIMM x2
DDRII SODIMM x2
*10U_0805C128 *10U_0805C128
*10U_0805C76 *10U_0805C76
10U_0805C25 10U_0805C25
10U_0805C82 10U_0805C82
0.1UC134 0.1UC134
0.1UC83 0.1UC83
0.1UC84 0.1UC84
0.1UC135 0.1UC135
0.1UC86 0.1UC86
0.1UC131 0.1UC131
0.1UC133 0.1UC133
0.1UC136 0.1UC136
0.1UC78 0.1UC78
0.1UC129 0.1UC129
0.1UC85 0.1UC85
0.1UC87 0.1UC87
0.1UC88 0.1UC88
0.1UC80 0.1UC80
0.1UC79 0.1UC79
0.1UC27 0.1UC27
0.1UC29 0.1UC29
0.1UC30 0.1UC30
0.1UC31 0.1UC31
0.1UC33 0.1UC33
1.8VSUS
*0.1UC132 *0.1UC132
*0.1UC130 *0.1UC130
*0.1UC32 *0.1UC32
*0.1UC28 *0.1UC28
For EMI
1.8VSUS
R93
R98*0R98
*0
MVREF_DIM
C1251UC125
1U
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
R93
1K/F
1K/F
R108
R108
1K/F
1K/F
1
QU1T
QU1T
QU1T
8 44Tuesday, September 01, 2009
8 44Tuesday, September 01, 2009
8 44Tuesday, September 01, 2009
B
B
B
http://mycomp.su/x/
5
4
3
2
1
9
SMDDR_VTERM
D D
SMDDR_VTERM
*10U_0805C77 *10U_0805C77
*10U_0805C124 *10U_0805C124
0.1UC110 0.1UC110
0.1UC111 0.1UC111
C C
0.1UC96 0.1UC96
0.1UC94 0.1UC94
0.1UC108 0.1UC108
0.1UC93 0.1UC93
0.1UC49 0.1UC49
0.1UC68 0.1UC68
*0.1UC98 *0.1UC98
*0.1UC109 *0.1UC109
0.1UC112 0.1UC112
0.1UC99 0.1UC99
0.1UC97 0.1UC97
0.1UC126 0.1UC126
0.1UC54 0.1UC54
*0.1UC123 *0.1UC123
0.1UC95 0.1UC95
0.1UC70 0.1UC70
0.1UC69 0.1UC69
*0.1UC71 *0.1UC71
0.1UC67 0.1UC67
0.1UC50 0.1UC50
0.1UC51 0.1UC51
*0.1UC52 *0.1UC52
0.1UC53 0.1UC53
1.8VSUS
SMDDR_VTERM
0.1UC120 0.1UC1200.1UC127 0.1UC127
0.1UC119 0.1UC119 R64 47_4R64 47_4
0.1UC39 0.1UC39
0.1UC44 0.1UC44
0.1UC118 0.1UC118
0.1UC121 0.1UC121
0.1UC114 0.1UC114
0.1UC115 0.1UC115
0.1UC116 0.1UC116
0.1UC117 0.1UC117
0.1UC38 0.1UC38
0.1UC45 0.1UC45
0.1UC40 0.1UC40
0.1UC41 0.1UC41
0.1UC42 0.1UC42
0.1UC43 0.1UC43
M_CKE0{5,8}
M_CKE1{5,8}
M_CKE2{5,8}
M_CKE3{5,8}
M_ODT0{5,8}
M_ODT1{5,8}
M_ODT2{5,8}
M_ODT3{5,8}
M_A_BS#0{5,8}
M_A_BS#1{5,8}
M_A_BS#2{5,8}
M_A_WE#{5,8}
M_A_CAS#{5,8}
M_A_RAS#{5,8}
M_B_BS#0{5,8}
M_B_BS#1{5,8}
M_B_BS#2{5,8}
M_B_WE#{5,8}
M_B_CAS#{5,8}
M_B_RAS#{5,8}
M_A_CS#0{5,8}
M_A_CS#1{5,8}
M_A_CS#2{5,8}
M_A_CS#3{5,8}
M_B_CS#0{5,8}
M_B_CS#1{5,8}
M_B_CS#2{5,8}
M_B_CS#3{5,8}
M_A_A[0..15]{5,8}
M_A_A13
M_A_A10
M_A_A0
M_A_A2
M_A_A4
M_A_A6
M_A_A7
M_A_A11
M_A_A12
M_A_A9
M_A_A3
M_A_A1
M_A_A8
M_A_A5
M_A_A14
M_A_A15
R65 47_4R65 47_4
R45 47_4R45 47_4
R99 47_4R99 47_4
R88 47_4R88 47_4
R48 47_4R48 47_4
R63 47_4R63 47_4
R84 47_4R84 47_4
R107 47_4R107 47_4
R69 47_4R69 47_4
R46 47_4R46 47_4
R67 47_4R67 47_4
R70 47_4R70 47_4
R71 47_4R71 47_4
R47 47_4R47 47_4
R103 47_4R103 47_4
R82 47_4R82 47_4
R101 47_4R101 47_4
R104 47_4R104 47_4
R105 47_4R105 47_4
R83 47_4R83 47_4
R49 47_4R49 47_4
R66 47_4R66 47_4
R50 47_4R50 47_4
R85 47_4R85 47_4
R106 47_4R106 47_4
R100 47_4R100 47_4
R87 47_4R87 47_4
R44 47_4R44 47_4
R68 47_4R68 47_4
RP7 0404-47X2RP7 0404-47X2
1 2
3 4
RP6 0404-47X2RP6 0404-47X2
1 2
3 4
RP5 0404-47X2RP5 0404-47X2
1 2
3 4
RP8 0404-47X2RP8 0404-47X2
1 2
3 4
RP10 0404-47X2RP10 0404-47X2
1 2
3 4
RP9 0404-47X2RP9 0404-47X2
1 2
3 4
RP4 0404-47X2RP4 0404-47X2
1 2
3 4
B B
A A
5
4
M_B_A[0..15]{5,8}
3
M_B_A2
M_B_A0
M_B_A6
M_B_A4
M_B_A11
M_B_A7
M_B_A3
M_B_A1
M_B_A8
M_B_A5
M_B_A12
M_B_A9
M_B_A10
M_B_A13
M_B_A15
M_B_A14
RP14 0404-47X2RP14 0404-47X2
1 2
3 4
RP13 0404-47X2RP13 0404-47X2
1 2
3 4
RP12 0404-47X2RP12 0404-47X2
1 2
3 4
RP17 0404-47X2RP17 0404-47X2
1 2
3 4
RP16 0404-47X2RP16 0404-47X2
1 2
3 4
RP15 0404-47X2RP15 0404-47X2
1 2
3 4
R102 47_4R102 47_4
R86 47_4R86 47_4
RP11 0404-47X2RP11 0404-47X2
1 2
3 4
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDRII TERMINATION
DDRII TERMINATION
DDRII TERMINATION
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
QU1T
QU1T
QU1T
9 44Tuesday, September 01, 2009
9 44Tuesday, September 01, 2009
9 44Tuesday, September 01, 2009
1
B
B
B
http://mycomp.su/x/
5
4
3
2
1
10
D D
U19A
U19A
HT_CADOUT15_P{4}
HT_CADOUT15_N{4}
HT_CADOUT14_P{4}
HT_CADOUT14_N{4}
HT_CADOUT13_P{4}
HT_CADOUT13_N{4}
HT_CADOUT12_P{4}
HT_CADOUT12_N{4}
HT_CADOUT11_P{4}
HT_CADOUT11_N{4}
HT_CADOUT10_P{4}
HT_CADOUT10_N{4}
HT_CADOUT9_P{4}
HT_CADOUT9_N{4}
HT_CADOUT8_P{4}
HT_CADOUT8_N{4}
HT_CADOUT7_P{4}
C C
VDDHT_PKG
HT_CADOUT7_N{4}
HT_CADOUT6_P{4}
HT_CADOUT6_N{4}
HT_CADOUT5_P{4}
HT_CADOUT5_N{4}
HT_CADOUT4_P{4}
HT_CADOUT4_N{4}
HT_CADOUT3_P{4}
HT_CADOUT3_N{4}
HT_CADOUT2_P{4}
HT_CADOUT2_N{4}
HT_CADOUT1_P{4}
HT_CADOUT1_N{4}
HT_CADOUT0_P{4}
HT_CADOUT0_N{4}
HT_CLKOUT1_P{4}
HT_CLKOUT1_N{4}
HT_CLKOUT0_P{4}
HT_CLKOUT0_N{4}
HT_CTLOUT0_P{4}
HT_CTLOUT0_N{4}
R480 49.9R_4R480 49.9R_4
R222 49.9R_4R222 49.9R_4
R19
HT_RXCAD15P
R18
HT_RXCAD15N
R21
HT_RXCAD14P
R22
HT_RXCAD14N
U22
HT_RXCAD13P
U21
HT_RXCAD13N
U18
HT_RXCAD12P
U19
HT_RXCAD12N
W19
HT_RXCAD11P
W20
HT_RXCAD11N
AC21
HT_RXCAD10P
AB22
HT_RXCAD10N
AB20
HT_RXCAD9P
AA20
HT_RXCAD9N
AA19
HT_RXCAD8P
Y19
HT_RXCAD8N
T24
HT_RXCAD7P
R25
HT_RXCAD7N
U25
HT_RXCAD6P
U24
HT_RXCAD6N
V23
HT_RXCAD5P
U23
HT_RXCAD5N
V24
HT_RXCAD4P
V25
HT_RXCAD4N
AA25
HT_RXCAD3P
AA24
HT_RXCAD3N
AB23
HT_RXCAD2P
AA23
HT_RXCAD2N
AB24
HT_RXCAD1P
AB25
HT_RXCAD1N
AC24
HT_RXCAD0P
AC25
HT_RXCAD0N
W21
HT_RXCLK1P
W22
HT_RXCLK1N
Y24
HT_RXCLK0P
W25
HT_RXCLK0N
P24
HT_RXCTLP
P25
HT_RXCTLN
A24
C24
HT_RXCALP
HT_RXCALN
RS690MC
RS690MC
HT_RXCALN HT_TXCALN
PART 1 OF 5
PART 1 OF 5
HYPER TRANSPORT CPU I/F
HYPER TRANSPORT CPU I/F
HT_TXCAD15P
HT_TXCAD15N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD0P
HT_TXCAD0N
HT_TXCLK1P
HT_TXCLK1N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCTLP
HT_TXCTLN
HT_TXCALP
HT_TXCALN
P21
P22
P18
P19
M22
M21
M18
M19
L18
L19
G22
G21
J20
J21
F21
F22
N24
N25
L25
M24
K25
K24
J23
K23
G25
H24
F25
F24
E23
F23
E24
E25
L21
L22
J24
J25
N23
P23
C25
D24
HT_TXCALPHT_RXCALP
HT_CADIN15_P {4}
HT_CADIN15_N {4}
HT_CADIN14_P {4}
HT_CADIN14_N {4}
HT_CADIN13_P {4}
HT_CADIN13_N {4}
HT_CADIN12_P {4}
HT_CADIN12_N {4}
HT_CADIN11_P {4}
HT_CADIN11_N {4}
HT_CADIN10_P {4}
HT_CADIN10_N {4}
HT_CADIN9_P {4}
HT_CADIN9_N {4}
HT_CADIN8_P {4}
HT_CADIN8_N {4}
HT_CADIN7_P {4}
HT_CADIN7_N {4}
HT_CADIN6_P {4}
HT_CADIN6_N {4}
HT_CADIN5_P {4}
HT_CADIN5_N {4}
HT_CADIN4_P {4}
HT_CADIN4_N {4}
HT_CADIN3_P {4}
HT_CADIN3_N {4}
HT_CADIN2_P {4}
HT_CADIN2_N {4}
HT_CADIN1_P {4}
HT_CADIN1_N {4}
HT_CADIN0_P {4}
HT_CADIN0_N {4}
HT_CLKIN1_P {4}
HT_CLKIN1_N {4}
HT_CLKIN0_P {4}
HT_CLKIN0_N {4}
HT_CTLIN0_P {4}
HT_CTLIN0_N {4}
R482 100R_4R482 100R_4
B B
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
5
4
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
RS690MC HT LINK I/F
RS690MC HT LINK I/F
RS690MC HT LINK I/F
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
PROJECT :
QU1T
QU1T
QU1T
10 44Tuesday, September 01, 2009
10 44Tuesday, September 01, 2009
1
10 44Tuesday, September 01, 2009
B
B
B
http://mycomp.su/x/
5
4
3
2
1
11
D D
U19B
U19B
AD16
AE16
AD20
AE20
AB12
AA12
AA11
AB11
AA14
AB14
G5
G4
J8
J7
J4
J5
L8
L7
L4
L5
M8
M7
M4
M5
P8
P7
P4
P5
R4
R5
R7
R8
U4
U5
W4
W5
Y4
Y5
V9
W9
AB7
AB6
Y7
AA7
AB9
AA9
W14
W15
W11
W12
PCIE_RXP0{20}
PCIE_RXN0{20}
PCIE_RXP1{20}
PCIE_RXN1{20}
PCIE_RXP2{20}
PCIE_RXN2{20}
PCIE_RXP[15..0]{20}
PCIE_RXN[15..0]{20}
PCIE_TXP[15..0]{20}
PCIE_TXN[15..0]{20}
C C
B B
PCIE_RXP[15..0]
PCIE_RXN[15..0]
PCIE_TXP[15..0]
PCIE_TXN[15..0]
PCIE_RXP3{20}
PCIE_RXN3{20}
PCIE_RXP4{20}
PCIE_RXN4{20}
PCIE_RXP5{20}
PCIE_RXN5{20}
PCIE_RXP6{20}
PCIE_RXN6{20}
PCIE_RXP7{20}
PCIE_RXN7{20}
PCIE_RXP8{20}
PCIE_RXN8{20}
PCIE_RXP9{20}
PCIE_RXN9{20}
PCIE_RXP10{20}
PCIE_RXN10{20}
PCIE_RXP11{20}
PCIE_RXN11{20}
PCIE_RXP12{20}
PCIE_RXN12{20}
PCIE_RXP13{20}
PCIE_RXN13{20}
PCIE_RXP14{20}
PCIE_RXN14{20}
PCIE_RXP15{20}
PCIE_RXN15{20}
GPP_RX0P_LAN{26}
GPP_RX0N_LAN{26}
GPP_RX1P_WLAN{31}
GPP_RX1N_WLAN{31}
GPP_RX2P_MINICARD{31}
GPP_RX2N_MINICARD{31}
A_RX0P{14}
A_RX0N{14}
A_RX1P{14}
A_RX1N{14}
A_RX2P{14}
A_RX2N{14}
A_RX3P{14}
A_RX3N{14}
R237 *10K_4R237 *10K_4
R238 *8.25K_4R238 *8.25K_4
GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N
GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
PCE_ISET(PCE_CALI)
PCE_TXISET(NC)
RS690MC
RS690MC
PART 2 OF 5
PART 2 OF 5
PCIE I/F GFX
PCIE I/F GFX
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
PCE_PCAL(PCE_CALRP)
PCE_NCAL(PCE_CALRN)
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
GFX_TXP0
J1
GFX_TXN0
H2
GFX_TXP1
K2
GFX_TXN1
K1
GFX_TXP2
K3
GFX_TXN2
L3
GFX_TXP3
L1
GFX_TXN3
L2
GFX_TXP4
N2
GFX_TXN4
N1
GFX_TXP5
P2
GFX_TXN5
P1
GFX_TXP6
P3
GFX_TXN6
R3
GFX_TXP7
R1
GFX_TXN7
R2
GFX_TXP8
T2
GFX_TXN8
U1
GFX_TXP9
V2
GFX_TXN9
V1
GFX_TXP10
V3
GFX_TXN10
W3
GFX_TXP11
W1
GFX_TXN11
W2
GFX_TXP12
Y2
GFX_TXN12
AA1
GFX_TXP13
AA2
GFX_TXN13
AB2
GFX_TXP14
AB1
GFX_TXN14
AC1
GFX_TXP15
AE3
GFX_TXN15
AE4
AD14
AD15
AD19
AE19
AD4
AE5
AD5
AD6
AE9
AD10
AC8
AD9
AD8
AE8
AD7
AE7
R242 562R_4R242 562R_4
AD11
R243 2K_4R243 2K_4
AE11
GPP_TX0P_C
GPP_TX0N_C
GPP_TX1P_C
GPP_TX1N_C
GPP_TX2P_C
GPP_TX2N_C
A_TX0P_C
A_TX0N_C
A_TX1P_C
A_TX1N_C
A_TX2P_C
A_TX2N_C
A_TX3P_C
A_TX3N_C
C620 0.1U/10V/4C620 0.1U/10V/4
C619 0.1U/10V/4C619 0.1U/10V/4
C645 0.1U/10V/4C645 0.1U/10V/4
C644 0.1U/10V/4C644 0.1U/10V/4
C646 0.1U/10V/4C646 0.1U/10V/4
C647 0.1U/10V/4C647 0.1U/10V/4
C622 0.1U/10V/4C622 0.1U/10V/4
C621 0.1U/10V/4C621 0.1U/10V/4
C624 0.1U/10V/4C624 0.1U/10V/4
C623 0.1U/10V/4C623 0.1U/10V/4
C649 0.1U/10V/4C649 0.1U/10V/4
C648 0.1U/10V/4C648 0.1U/10V/4
C650 0.1U/10V/4C650 0.1U/10V/4
C651 0.1U/10V/4C651 0.1U/10V/4
C626 0.1U/10V/4C626 0.1U/10V/4
C625 0.1U/10V/4C625 0.1U/10V/4
C627 0.1U/10V/4C627 0.1U/10V/4
C628 0.1U/10V/4C628 0.1U/10V/4
C653 0.1U/10V/4C653 0.1U/10V/4
C652 0.1U/10V/4C652 0.1U/10V/4
C654 0.1U/10V/4C654 0.1U/10V/4
C655 0.1U/10V/4C655 0.1U/10V/4
C630 0.1U/10V/4C630 0.1U/10V/4
C629 0.1U/10V/4C629 0.1U/10V/4
C631 0.1U/10V/4C631 0.1U/10V/4
C632 0.1U/10V/4C632 0.1U/10V/4
C642 0.1U/10V/4C642 0.1U/10V/4
C643 0.1U/10V/4C643 0.1U/10V/4
C633 0.1U/10V/4C633 0.1U/10V/4
C634 0.1U/10V/4C634 0.1U/10V/4
C635 0.1U/10V/4C635 0.1U/10V/4
C636 0.1U/10V/4C636 0.1U/10V/4
C683 0.1U/10V/4C683 0.1U/10V/4
C684 0.1U/10V/4C684 0.1U/10V/4
C688 0.1U/10V/4C688 0.1U/10V/4
C687 0.1U/10V/4C687 0.1U/10V/4
C662 0.1U/10V/4C662 0.1U/10V/4
C663 0.1U/10V/4C663 0.1U/10V/4
C679 0.1U/10V/4C679 0.1U/10V/4
C682 0.1U/10V/4C682 0.1U/10V/4
C673 0.1U/10V/4C673 0.1U/10V/4
C678 0.1U/10V/4C678 0.1U/10V/4
C667 0.1U/10V/4C667 0.1U/10V/4
C668 0.1U/10V/4C668 0.1U/10V/4
C665 0.1U/10V/4C665 0.1U/10V/4
C666 0.1U/10V/4C666 0.1U/10V/4
VDDA12_PKG2
PCIE_TXP0 {20}
PCIE_TXN0 {20}
PCIE_TXP1 {20}
PCIE_TXN1 {20}
PCIE_TXP2 {20}
PCIE_TXN2 {20}
PCIE_TXP3 {20}
PCIE_TXN3 {20}
PCIE_TXP4 {20}
PCIE_TXN4 {20}
PCIE_TXP5 {20}
PCIE_TXN5 {20}
PCIE_TXP6 {20}
PCIE_TXN6 {20}
PCIE_TXP7 {20}
PCIE_TXN7 {20}
PCIE_TXP8 {20}
PCIE_TXN8 {20}
PCIE_TXP9 {20}
PCIE_TXN9 {20}
PCIE_TXP10 {20}
PCIE_TXN10 {20}
PCIE_TXP11 {20}
PCIE_TXN11 {20}
PCIE_TXP12 {20}
PCIE_TXN12 {20}
PCIE_TXP13 {20}
PCIE_TXN13 {20}
PCIE_TXP14 {20}
PCIE_TXN14 {20}
PCIE_TXP15 {20}
PCIE_TXN15 {20}
GPP_TX0P_LAN {26}
GPP_TX0N_LAN {26}
GPP_TX1P_WLAN {31}
GPP_TX1N_WLAN {31}
GPP_TX2P_MINICARD {31}
GPP_TX2N_MINICARD {31}
A_TX0P {14}
A_TX0N {14}
A_TX1P {14}
A_TX1N {14}
A_TX2P {14}
A_TX2N {14}
A_TX3P {14}
A_TX3N {14}
Place these caps
close to connector
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
5
4
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
RS690MC PCIE LINK I/F
RS690MC PCIE LINK I/F
RS690MC PCIE LINK I/F
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
PROJECT :
QU1T
QU1T
QU1T
11 44Wednesday, November 25, 2009
11 44Wednesday, November 25, 2009
1
11 44Wednesday, November 25, 2009
B
B
B
http://mycomp.su/x/
5
4
3
2
1
HTPVDD==>2.98mA(min)/3.03mA(MAX)
VCC1.8
L24
L24
220ohm_2A
220ohm_2A
D D
C C
B B
PLLVDD==>3.54mA(min)/3.61mA(MAX)
VCC1.8
L64
L64
220ohm_2A
220ohm_2A
AVDDQ==>0.1mA(min)/0.11mA(MAX)
VCC1.8 AVDDQ
L70
L70
220ohm_2A
220ohm_2A
AVDD_NB==>5.42mA(min)/5.44mA(MAX) LPVDD==>4.86mA(min)/4.9mA(MAX)
VCC3 AVDD_NB
L26 22ohm,1500mAL26 22ohm,1500mA
LDT_STOP#{6,14}
HTPVDD
PLLVDD
VCC1.8
1 3
Q21
Q21
MMBT3904
MMBT3904
C671
C671
2.2U/10V/6
2.2U/10V/6
1 2
3VPCU
C313
C313
*10U/6.3V/6
*10U/6.3V/6
C670
C670
*10U/6.3V/6
*10U/6.3V/6
C694
C694
*10U/6.3V/6
*10U/6.3V/6
C321
C321
2.2U/10V/6
2.2U/10V/6
R260
R260
10K_4
10K_4
2
PLLVDD12
VCC3
R259
R259
10K_4
10K_4
LDT_STOP#_NB
C311
C311
2.2U/10V/6
2.2U/10V/6
C669
C669
2.2U/10V/6
2.2U/10V/6
C693
C693
2.2U/10V/6
2.2U/10V/6
1 2
C323
C323
*0.1U/25V/4
*0.1U/25V/4
VCC1.8 AVDDI
R473 0R_6R473 0R_6
C689
C689
2.2U/10V/6
2.2U/10V/6
1 2
AVDDI==>0mA(min)/0mA(MAX)
AVDD_NB
AVDDI
AVDDQ
C692
C692
*0.1U/25V/4
*0.1U/25V/4
PLLVDD
HTPVDD
NB_RST#{14}
NB_PWRGD{19,33}
ALLOW_LDTSTOP{14}
HTREFCLK{3}
NB_OSC{3}
NBSRC_CLKP{3}
NBSRC_CLKN{3}
SBLINK_CLKP{3}
SBLINK_CLKN{3}
R250 *3K_4R250 *3K_4
BMREQ#{14}
NB_LVDS_CLK{19}
NB_LVDS_DAT{19}
NB_THERMDA{23}
NB_THERMDC{23}
VCC3
VDDA12
T148T148
T129T129
T102T102
T101T101
T106T106
T103T103
T128T128
T124T124
R474 715R_4R474 715R_4
T126T126
T127T127
R219 10K_4R219 10K_4
L65
L65
60ohm,500mA
60ohm,500mA
R256 *3K_4R256 *3K_4
R471 *3K_4R471 *3K_4
R253 *3K_4R253 *3K_4
R469 *3K_4R469 *3K_4
R470 *3K_4R470 *3K_4
R467 *0R_4R467 *0R_4
NB_THERMDA
NB_THERMDC
T111T111
T125T125
STRP_DATA{41}
R261
R261
4.7K_4
4.7K_4
LDT_STOP#_NB
TV_SWITCH
PLLVDD12
DFT_GPIO0
LOAD_ROM#
DFT_GPIO2
DFT_GPIO3
DFT_GPIO4
DFT_GPIO5
STRP_DATA
U19C
U19C
B22
AVDD1
C22
AVDD2
G17
AVSSN1
H17
AVSSN2
A20
AVDDDI
B20
AVSSDI
A21
AVDDQ
A22
AVSSQ
C21
C
C20
Y
D19
COMP
E19
RED
F19
GREEN
G19
BLUE
C6
DACVSYNC
A5
DACHSYNC
B21
RSET
B6
DACSCL
A6
DACSDA
A10
PLLVDD18
B10
PLLVSS
B24
HTPVDD
B25
HTPVSS
C10
SYSRESET#
C11
POWERGOOD
C5
LDTSTOP#
B5
ALLOW_LDTSTOP
C23
HTTSTCLK
B23
HTREFCLK
C2
TVCLKIN
B11
OSCIN
A11
OSCOUT(PLLVDD12)
F2
GFX_CLKP
E1
GFX_CLKN
G1
SB_CLKP
G2
SB_CLKN
D6
DFT_GPIO0
D7
DFT_GPIO1
C8
DFT_GPIO2
C7
DFT_GPIO3
B8
DFT_GPIO4
A8
DFT_GPIO5
B2
BMREQ#
A2
I2C_CLK
B4
I2C_DATA
AA15
THERMALDIODE_P
AB15
THERMALDIODE_N
C14
TMDS_HPD
B3
DDC_DATA
C3
TESTMODE
A3
STRP_DATA
RS690MC
RS690MC
PART 3 OF 5
PART 3 OF 5
CRT/TVOUT
CRT/TVOUT
PM
PM
PLL PWR
PLL PWR
CLOCKs
CLOCKs
MIS.
MIS.
TXOUT_L0P
TXCLK_LP
TXCLK_LN
TXCLK_UP
TXCLK_UN
LPVDD
LPVSS
LVSSR1
LVSSR3
LVSSR5
LVSSR6
LVSSR7
LVSSR8
LVSSR12
LVSSR13
DEBUG_6
DEBUG_9
DEBUG_10
DEBUG_15
DEBUG_0
DEBUG_2
DEBUG_1
DEBUG_14
DEBUG_13
B14
B15
B13
A13
H14
G14
D17
E17
A15
B16
C17
C18
B17
A17
A18
B18
E15
D15
H15
G15
D14
E14
A12
B12
C12
C13
A16
A14
D12
C19
C15
C16
F14
F15
E12
G12
F12
AE15
AC17
AD18
AE21
AD13
AC13
AE13
AE17
AD17
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N
TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N
TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N
TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N
LVDDR18D_1
LVDS
LVDS
LVDDR18D_2
LVDDR33_1
LVDDR33_2
LVDS_DIGON
LVDS_BLON
LVDS_BLEN
DEBUG
DEBUG
TXCLK_LP
TXCLK_LN
TXCLK_UP
TXCLK_UN
R239 0R239 0
R240 0R240 0
R245 0R245 0
R246 0R246 0
R241 0R241 0
R244 0R244 0
R247 0R247 0
R248 0R248 0
R227 0R227 0
R225 0R225 0
R233 0R233 0
R231 0R231 0
R220 0R220 0
R218 0R218 0
R226 0R226 0
R223 0R223 0
R232 0R232 0
R234 0R234 0
R236 0R236 0
R235 0R235 0
C358
C358
0.1U/25V/4
0.1U/25V/4
NB_TXLOUT0+ {19}
NB_TXLOUT0- {19}
NB_TXLOUT1+ {19}
NB_TXLOUT1- {19}
NB_TXLOUT2+ {19}
NB_TXLOUT2- {19}
NB_TXLOUT3+ {19}
NB_TXLOUT3- {19}
NB_TXUOUT0+ {19}
NB_TXUOUT0- {19}
NB_TXUOUT1+ {19}
NB_TXUOUT1- {19}
NB_TXUOUT2+ {19}
NB_TXUOUT2- {19}
NB_TXUOUT3+ {19}
NB_TXUOUT3- {19}
NB_TXLCLKOUT+ {19}
NB_TXLCLKOUT- {19}
NB_TXUCLKOUT+ {19}
NB_TXUCLKOUT- {19}
LVDDR18D==>40.2mA(min)/43.84mA(MAX)
LVDDR33==>76.77mA(min)/78.64mA(MAX)
C680
C680
C681
C681
0.1U/25V/4
0.1U/25V/4
4.7U/6.3V/6
4.7U/6.3V/6
R472 0R_6R472 0R_6
DIGON {19}
BLON {19}
T114T114
T110T110
T107T107
T104T104
T136T136
T112T112
T109T109
T113T113
T108T108
T105T105
LPVDD
L30
L30
C359
C359
4.7U/6.3V/6
4.7U/6.3V/6
L66
L66
220ohm_2A
220ohm_2A
C685
C685
0.1U/25V/4
0.1U/25V/4
R249 0R_6R249 0R_6
220ohm_2A
220ohm_2A
L67
L67
GND_LVSSR
220ohm_2A
220ohm_2A
C686
C686
4.7U/6.3V/6
4.7U/6.3V/6
GND_LPVSS
VCC1.8
12
VCC1.8
GND_LPVSS
VCC3
R689
C318 0.1U/25V/4C318 0.1U/25V/4
U7
A A
C325 2200P/50V/4C325 2200P/50V/4
SYS_SHDN#1{6}
THERM_NB_VCC
NB_THERMDA
NB_THERMDC
5
U7
1
2
3
4
ADM1032ARMZ-2R
ADM1032ARMZ-2R
MSOP8-4_9-65
MSOP8-4_9-65
VCC
DXP
DXN
-OVT
C319 *0.1U/25V/4C319 *0.1U/25V/4
8
SMCLK
7
SMDATA
6
-ALT
5
GND
THMCLK {6}
THMDAT {6}
4
R689
10K_4
10K_4
THERM_ALERT# {6,21,32}
VCC3
R468 *10K_4R468 *10K_4
R465 10K_4R465 10K_4
STRP_DATA
TV_SWITCH
3
High, LOAD ROM STRAP DISABLE
Low, LOAD ROM STRAP ENABLE
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
RS690MC PLL & VEDIO I/F
RS690MC PLL & VEDIO I/F
RS690MC PLL & VEDIO I/F
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
QU1T
QU1T
QU1T
12 44Tuesday, September 01, 2009
12 44Tuesday, September 01, 2009
12 44Tuesday, September 01, 2009
1
B
B
B
LOAD_ROM#: LOAD ROM STRAP ENABLE
http://mycomp.su/x/
5
4
3
2
1
13
V12
V11
V14
V15
VSSA3
VSSA4
VSS3
VSS4E9VSS5
D23
C320
C320
1U/10V/4
1U/10V/4
G3
AE6
AE10
VSSA5F3VSSA6
VSSA7A1VSSA8H1VSSA9
VSSA10J2VSSA11H3VSSA13J6VSSA15F1VSSA16L6VSSA17M2VSSA18M6VSSA19J3VSSA20P6VSSA21T1VSSA22N3VSSA24R6VSSA25U2VSSA26T3VSSA27U3VSSA28U6VSSA30Y1VSSA32W6VSSA33
VSSA14
VSSA12
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
J22
J12
L12
L14
L20
Y23
G11
C349
C349
1U/10V/4
1U/10V/4
P11
R24
M15
AE18
L23
G23
AE24
AD24
AD22
AB17
AE23
AC18
AD21
AC19
AC20
AB19
AD23
AA17
AE25
AC12
AD12
AE12
AC11
M11
M20
M23
U19D
U19D
PART 4 OF 5
PART 4 OF 5
VDD_HT1
VDD_HT2
VDD_HT3
VDD_HT4
VDD_HT5
Y17
VDD_HT6
W17
VDD_HT7
VDD_HT8
VDD_HT9
VDD_HT10
VDD_HT11
VDD_HT12
VDD_HT13
VDD_HT14
VDD_HT15
J14
VDD18_1
J15
VDD18_2
AE2
VDDA12_13
AB3
VDDA12_14
U7
VDDA12_15
W7
VDDA12_16
AB4
VDDA12_17
AC3
VDDA12_18
AD2
VDDA12_19
AE1
VDDA12_20
E11
VDDR3_1
D11
VDDR3_2
VDDR_1
VDDR_2
VDDR_3
E7
VDDPLL_1
F7
VDDPLL_2
F9
VSSPLL_1
G9
VSSPLL_2
D22
VDDHT_PKG
M1
VDDA12_PKG1
VDDA12_PKG2
RS690MC
RS690MC
VCC3 VCC1.8
D44
D44
2 1
1SS355
1SS355
AC2
Y11
AD1
AC5
AC6
AC7
AD3
AC9
AC10
Y15
VSSA23
VSS23
VSS24
B7
VSS25
VSS26
VSS27
L24
P13
P20
VDDA12_10
VDDA12_11
VDDA12_12
POWER
POWER
2 1
1SS355
1SS355
AC4
VSSA29
VSS28
VSS29
VSS30
P15
R12
R14
VDDA12_1
VDDA12_2
VDDA12_3
VDDA12_4
VDDA12_5
VDDA12_6
VDDA12_7
VDDA12_8
VDDA12_9
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_24
VDDC_25
VDDC_26
VDDC_27
VDDC_28
VDDC_29
VDDC_30
VDDC_31
VDDC_32
D43
D43
VSSA31
VSS31
VSS32
Y25
R20
W23
2 1
GROUND
GROUND
VSS33
D1
G7
E2
C1
E3
D2
M9
F4
B1
D3
L9
E6
L11
L13
L15
M12
R15
M14
N11
N13
N15
J11
H11
P12
P14
R11
R13
A19
B19
U11
U14
P17
L17
J19
D20
G20
A9
B9
C9
D9
A7
A4
U12
U15
VSSA34Y3VSSA35Y9VSSA36
VSS34
VSS35
U20
AD25
D42
D42
1SS355
1SS355
VSSA37R9VSSA38
VSS36
VSS37
VSS38
Y22
H25
W24
AC23
P9
VSS21
VSS22
N12
N14
M25
G6
Y12
Y14
AA3
VSSA39
VSSA40
VSSA41
VSSA42
VSSA43
VSSA44
VSSA45
VSSA46
VSSA47
VSSA48
VSS39
VSS40
VSS41
VSS42
VSS44
VSS45
VSS46C4VSS47
VSS48
VSS49
VSS50
VSS52
VSS43
D25
G24
AC14
T23
R23
H12
AE22
AC22
VDDA12
VSS54
VSS55
VSS53
VSS51
T25
A23
H23
R17
M17
AE14
AC15
U19E
U19E
RS690MC
RS690MC
VSS56
VSS57D4VSS59
VSS58
F17
M13
AC16
80 ohm(4A)
VCC1.2
L71
L71
0R_8
0R_8
VDDA12==>143.16mA(min)/148.02mA(MAX)
C707
C360
C360
C348
1U/10V/4
1U/10V/4
C348
1U/10V/4
1U/10V/4
C356
C356
C362
C362
1U/10V/4
1U/10V/4 10U/6.3V/6
10U/6.3V/6
C353
C353
1U/10V/4
1U/10V/4
VDDC==>874.38mA(min)/2261.84mA(MAX)
C344
C355
C355
10U/6.3V/6
10U/6.3V/6
C352
C352
10U/6.3V/6
10U/6.3V/6
C344
C342
C342
1U/10V/4
1U/10V/4
1U/10V/4
1U/10V/4
C341
C341
C337
C337
1U/10V/4
1U/10V/4
1U/10V/4
1U/10V/4
For EMI VDDC: Decrease 800MHz frequency
VDDC VDDC VDDC VDDC
C332
C332
0.1U/25V/4
0.1U/25V/4
C336
C336
0.1U/25V/4
0.1U/25V/4
C363
C363
10U/6.3V/6
10U/6.3V/6
C340
C340
1U/10V/4
1U/10V/4
C326
C326
1U/10V/4
1U/10V/4
C707
100U/6.3V/3528
100U/6.3V/3528
C338
C338
1U/10V/4
1U/10V/4
C339
C339
0.1U/25V/4
0.1U/25V/4
Cgange power rail from NB_CORE
to VCC1.2 and reserve NB_CPRE plan
-->new add on 7/24
VDDC
L77 60ohm,3AL77 60ohm,3A
L100 *60ohm,3AL100 *60ohm,3A
C331
C331
100U/6.3V/3528
100U/6.3V/3528
C347
C347
0.1U/25V/4
0.1U/25V/4
VCC1.2
NB_CORE
M3
VSSA2
D D
VLDT_RUN
L25
L25
120ohm,600mA
120ohm,600mA
VSSA1
PAR 5 OF 5
PAR 5 OF 5
VSS1
VSS2
F11
A25
VDD_HT==>97.39mA(min)/306.02mA(MAX)
C322
C350
C350
10U/6.3V/6
10U/6.3V/6
C322
1U/10V/4
1U/10V/4
VDD18
VDDR3
C315
C324
VCC1.8
VCC1.2
VCC3
VCC1.8
VDDA12
C324
10U/6.3V/6
10U/6.3V/6
C C
B B
A A
C315
10U/6.3V/6
10U/6.3V/6
L23 120ohm,600mAL23 120ohm,600mA
VDDA12
L72 180ohm,1500mAL72 180ohm,1500mA
L31 120ohm,600mAL31 120ohm,600mA
L29 0R_8L29 0R_8
L32 22ohm,1500mAL32 22ohm,1500mA
C317
C317
1U/10V/4
1U/10V/4
VDD_18==>0.03mA(min)/0.1mA(MAX)
C330
C330
1U/10V/4
1U/10V/4
1 2
1 2
VDD_12==>143.16mA(min)/148.02mA(MAX)
C345
C345
10U/6.3V/6
10U/6.3V/6
VDDR3==>0.44mA(min)/0.46mA(MAX)
C365
C365
2.2U/10V/6
2.2U/10V/6
VDDDVO
C333
C333
C335
C335
*1U/10V/4
*1U/10V/4
*1U/10V/4
*1U/10V/4
VDDPLL
C368
C368
2.2U/10V/6
2.2U/10V/6
C327
C329
C329
1U/10V/4
1U/10V/4
C354
C354
1U/10V/4
1U/10V/4
C327
1U/10V/4
1U/10V/4
C351
C351
1U/10V/4
1U/10V/4
C346
C346
1U/10V/4
1U/10V/4
C328
C328
1U/10V/4
1U/10V/4
C343
C343
1U/10V/4
1U/10V/4
VDDR==>53.32mA(min)/157.89mA(MAX)
VDDPLL==>15.38mA(min)/15.49mA(MAX)
C334
C366
C366
1U/10V/4
1U/10V/4
C334
1U/10V/4
1U/10V/4
C367
C367
4.7U/6.3V/6
4.7U/6.3V/6
VDDHT_PKG
VDDA12_PKG1
VDDA12_PKG2
VDDA12_PKG1
C357
C357
0.1U/25V/4
0.1U/25V/4
5
4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
RS690MC POWER
RS690MC POWER
RS690MC POWER
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
PROJECT :
QU1T
QU1T
QU1T
B
B
B
13 44Tuesday, September 01, 2009
13 44Tuesday, September 01, 2009
13 44Tuesday, September 01, 2009
1
http://mycomp.su/x/
5
4
3
2
1
U20A
R498 8.2KR498 8.2K
SBSRCCLKP{3}
SBSRCCLKN{3}
A_RX0P{11}
A_RX0N{11}
A_RX1P{11}
A_RX1N{11}
A_RX2P{11}
A_RX2N{11}
A_RX3P{11}
A_RX3N{11}
PCIE_VDDR
C6971UC697
1U
C300
C300
0.1U
0.1U
8
7
5
2009/4/30
LDT_STOP#{6,12}
ALLOW_LDTSTOP{12}
ALINK_RST#
A_TX0P{11}
A_TX0N{11}
A_TX1P{11}
A_TX1N{11}
A_TX2P{11}
A_TX2N{11}
A_TX3P{11}
A_TX3N{11}
C704
C704
0.1U
0.1U
C3011UC301
1U
PQ5
PQ5
AO4468
AO4468
CPU_PWRGD{6}
CPU_SIC{6}
CPU_SID{6}
LDT_RST#{6}
C699 0.1UC699 0.1U
C698 0.1UC698 0.1U
C701 0.1UC701 0.1U
C700 0.1UC700 0.1U
C703 0.1UC703 0.1U
C702 0.1UC702 0.1U
C696 0.1UC696 0.1U
C695 0.1UC695 0.1U
R478 562R478 562
R481 2.05KR481 2.05K
R477 0R477 0
C3031UC303
1U
4
PCIE_PWR_D
CPU_PWR_SB
PCIE_VDDR
C2991UC299
1U
1
2
36
QU1T
R202
R202
10K
10K
R499 33R499 33
PCIE_CALRP
PCIE_CALRN
PCIE_CALI
C3021UC302
C3061UC306
1U
1U
PCIE_PWR5VPCU 15VPCU PCIE_PWRVCC_SB
R230
R230
220R_6
220R_6
3
2
Q20
Q20
ME2N7002E
ME2N7002E
1
R204 0R204 0
T92T92
T90T90
T93T93
T88T88
T97T97
T185T185
T168T168
T89T89
A_RX0P_C
A_RX0N_C
A_RX1P_C
A_RX1N_C
A_RX2P_C
A_RX2N_C
A_RX3P_C
A_RX3N_C
32K_X1
32K_X2
2A
C316
C316
10U
10U
2
C305
C305
0.1U
0.1U
2 3
Y5
Y5
32.768KHZ
32.768KHZ
R517 0R517 0
R512 0R512 0
R520 0R520 0
PCIE_PVDD
PCIE_PVDD==>27.92mA(MAX)
C691
C691
10U
10U
PCIE_VDDR==>391.01mA(MAX)
C297
C297
C312
C312
10U
10U
R221
R221
100K_0603
100K_0603
PCIE_PWR_D
3
Q18
Q18
ME2N7002E
ME2N7002E
1
41
C766
C766
15P
15P
2
32K_X2
32K_X1
0.1U
0.1U
C285
C285
0.1U
0.1U
R224
R224
1M_6
1M_6
3
Q19
Q19
ME2N7002E
ME2N7002E
1
NB_RST#{12}
PCIE_RST#{20,31}
LPC_RST#{33}
D D
Stuff L81 in A-test
PCIE_PWR
L69 220ohm_2AL69 220ohm_2A
PCIE Power
C C
PCIE_PWR
L28
L28
220ohm_2A
220ohm_2A
PCIEPWR_ON{33}
B B
A A
MAINON
R528
R528
*20M
*20M
R215*0R215
*0
D36
D36
*1SS355
*1SS355
R217
R217
10K
10K
C308
C308
22U
22U
21
R527 20MR527 20M
C761
C761
15P
15P
U20A
AG10
A_RST#
J24
PCIE_RCLKP
J25
PCIE_RCLKN
P29
PCIE_TX0P
P28
PCIE_TX0N
M29
PCIE_TX1P
M28
PCIE_TX1N
K29
PCIE_TX2P
K28
PCIE_TX2N
H29
PCIE_TX3P
H28
PCIE_TX3N
T25
PCIE_RX0P
T26
PCIE_RX0N
T22
PCIE_RX1P
T23
PCIE_RX1N
M25
PCIE_RX2P
M26
PCIE_RX2N
M22
PCIE_RX3P
M23
PCIE_RX3N
E29
PCIE_CALRP
E28
PCIE_CALRN
E27
PCIE_CALI
U29
PCIE_PVDD
U28
PCIE_PVSS
F27
PCIE_VDDR_1
F28
PCIE_VDDR_2
F29
PCIE_VDDR_3
G26
PCIE_VDDR_4
G27
PCIE_VDDR_5
G28
PCIE_VDDR_6
G29
PCIE_VDDR_7
J27
PCIE_VDDR_8
J29
PCIE_VDDR_9
L25
PCIE_VDDR_10
L26
PCIE_VDDR_11
L29
PCIE_VDDR_12
N29
PCIE_VDDR_13
D2
X1
C1
X2
AC26
CPU_PG/LDT_PG
W26
INTR/LINT0
W24
NMI/LINT1
W25
INIT#
AA24
SMI#
AA23
SLP#/LDT_STP#
AA22
IGNNE#/SIC
AA26
A20M#/SID
Y27
FERR#
AA25
STPCLK#/ALLOW_LDTSTP
AH9
CPU_STP#/DPSLP_3V#
B24
DPSLP_OD#/GPIO37
W23
DPRSLPVR
AC25
LDT_RST#/DPRSTP#/PROCHOT#
SB600
SB600
SB600 SB 23x23mm
SB600 SB 23x23mm
Part 1 of 4
Part 1 of 4
SPDIF_OUT/PCICLK7/GPIO41
PCI CLKS
PCI CLKS
CBE2#/ROMWE#
PCI INTERFACE
PCI INTERFACE
DEVSEL#/ROMA0
PCI EXPRESS INTERFACE
PCI EXPRESS INTERFACE
XTAL
XTAL
TRDY#/ROMOE#
LPC
LPC
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65
CPU
CPU
RTC_IRQ#/GPIO69
RTC
RTC
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
PCIRST#
AD0/ROMA18
AD1/ROMA17
AD2/ROMA16
AD3/ROMA15
AD4/ROMA14
AD5/ROMA13
AD6/ROMA12
AD7/ROMA11
AD8/ROMA9
AD9/ROMA8
AD10/ROMA7
AD11/ROMA6
AD12/ROMA5
AD13/ROMA4
AD14/ROMA3
AD15/ROMA2
AD16/ROMD0
AD17/ROMD1
AD18/ROMD2
AD19/ROMD3
AD20/ROMD4
AD21/ROMD5
AD22/ROMD6
AD23/ROMD7
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#/ROMA10
CBE1#/ROMA1
CBE3#
FRAME#
IRDY#
PAR/ROMA19
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
REQ3#/GPIO70
REQ4#/GPIO71
GNT0#
GNT1#
GNT2#
GNT3#/GPIO72
GNT4#/GPIO73
CLKRUN#
LOCK#
INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
SERIRQ
RTCCLK
VBAT
RTC_GND
U2
T2
U1
V2
W3
U3
V1
T1
AJ9
W7
Y1
W8
W5
AA5
Y3
AA6
AC5
AA7
AC3
AC7
AJ7
AD4
AB11
AE6
AC9
AA3
AJ4
AB1
AH4
AB2
AJ3
AB3
AH3
AC1
AH2
AC2
AH1
AD2
AG2
AD1
AG1
AB9
AF9
AJ5
AG3
AA2
AH6
AG5
AA1
AF7
Y2
AG8
AC11
AJ8
AE2
AG9
AH8
AH5
AD11
AF2
AH7
AB12
AG4
AG7
AF6
AD3
AF1
AF4
AF3
AG24
AG25
AH24
AH25
AF24
AJ24
AH26
W22
AF23
D3
F5
E1
D1
PCICLK0_R
PCICLK1_R
PCICLK2_R
PCICLK3_R
PCICLK4_R
PCICLK5_R
PCICLK6_R
SB_SPDIF_R
PCIRST#_C
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
REQ1#REQ1#
REQ2#REQ2#
REQ3#
REQ4#
GNT0#
GNT1#GNT1#
GNT2#GNT2#
GNT3#
GNT4#
CLKRUN#
CLKRUN#
PCI_LOCK#
INTE#INTE#
INTF#INTF#
INTG#INTG#
INTH#INTH#
LPC_DRQ0#
LPC_DRQ1#
R198 *0R198 *0
RTC_CLK
C2021UC202
R537 22R537 22
R550 22R550 22
R538 22R538 22
R685 22R685 22
R535 22R535 22
R536 22R536 22
T195T195
T32T32
AD[0..31] {18,28}
Modify 0915 for EMI
C/BE0# {28}
C/BE1# {28}
C/BE2# {28}
C/BE3# {28}
FRAME# {28}
DEVSEL# {28}
IRDY# {28}
TRDY# {28}
PAR {28}
STOP# {28}
PERR# {28}
SERR# {28}
REQ0# {28}
T41T41
T73T73
T184T184
T189T189
GNT0# {28}
T203T203
T186T186
T85T85
T191T191
T54T54
CLKRUN# {28}
T30T30
INTE# {28}
INTF# {28}
T49T49
T25T25
LAD0 {31,33}
LAD1 {31,33}
LAD2 {31,33}
LAD3 {31,33}
LFRAME# {31,33}
T149T149
T150T150
BMREQ# {12}
SERIRQ {28,33}
T193T193
T64T64
VCCRTC
1U
PCLK_R5C833
PCLK_DBC
PCLK_EC
PCICLK_DB
PCICLK4
PCIRST#_C
AD29
PCLK_R5C833 {18,28}
PCLK_DBC {18}
PCLK_EC {33}
PCICLK_DB {31}
PCICLK4 {18}
PCICLK6 {18}
R503 33R503 33
T37T37
RTC
VCCRTC
D3010
D3010
CH500H-40
CH500H-40
R142
R142
BT1
BT1
510_0603
510_0603
12
CR2032-SOCKET
CR2032-SOCKET
Add D3010 CH500H-40
-->new add on 12/23
SERIRQ
BMREQ#
Reserved For EMI
PCLK_R5C833
PCLK_DBC
PCLK_EC
PCICLK4
R502
R502
8.2K
8.2K
BAT-AP-AAA-BAT-046-2P
Change R569 to D3009
-->new add on 8/26
30mil
C187
C187
0.1U
0.1U
R483 *10KR483 *10K
R197 *10KR197 *10K
C280
C280
*18P
*18P
C776 10PC776 10P
C794 10PC794 10P
C777 10PC777 10P
C768 10PC768 10P
R5700RR570
0R
VCC3
VCC3
14
PCIRST# {28}
3VPCU
CH500H-40
CH500H-40
D3009
D3009
C196
C196
1U_0603
1U_0603
JP26
JP26
1
2
3
3P*1
3P*1
1-2 normal
2-3 clear CMOS
C247
C247
*0.1U
*0.1U
5
4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
SB600 PCIE/PCI/CPU/LPC
SB600 PCIE/PCI/CPU/LPC
SB600 PCIE/PCI/CPU/LPC
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
PROJECT :
1
QU1T
QU1T
QU1T
B
B
B
14 44Wednesday, December 23, 2009
14 44Wednesday, December 23, 2009
14 44Wednesday, December 23, 2009
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