Quanta QT8, Pavilion dv5 Schematic

1

2

3

4

5

6

7

8

PCB STACK UP

LAYER 1 : TOP
LAYER 2 : IN1

A A

LAYER 3 : IN2
LAYER 4 : VCC
LAYER 5 : IN3
LAYER 6 : BOT

Cable
Docking

VGA
RJ-45
CIR/Pwr btn
SPDIF Out

B B

Stereo MIC
Headphone Jack
USB Port

X1

LAN

Realtek
PCIE-LAN

RTL8102E/8111C

(10/100/GagaLAN)

PAGE 31,32

VOL Cntr

PAGE 37

RJ45

PAGE 31

SYSTEM CHARGER(ISL6251A)

PAGE 44

SYSTEM POWER ISL6236IRZA-T

PAGE 38

DDR II SMDDR_VTERM

1.8V/1.8VSUS(TPS51116REGR)

C C

VCCP +1.1V AND +1.2V(MAX8717)

PAGE 41

PAGE 39

VGACORE(1.1V~1.2V)Oz8118

PAGE 42

CPU CORE ISL6265A

PAGE 40

SMBUS TABLE

Clock gen/Robson/TV tuner

SB--SCL0/SD0

D D

EC --SCL/SD

EC--SCL2/SD2

/DDR2/DDR2 thermal/Accelerometer

epress card

Wlan Card

Battery charge/discharge

VGA thermal/system thermal

1

2

DDRII-SODIMM1

PAGE 7,8

DDRII-SODIMM2

PAGE 7,8

Express
Card

(NEW CARD)

TWO SATA - HDD

PAGE 33

SATA - CD-ROM

PAGE 33

E-SATA

PAGE 30

Accelerometer

LIS3LV02DL

Keyboard
Touch Pad

CIR (AUDIO CONN)

Capacitive Sense

+3V

+3VS5

+3VPCU

+3V

SW

X1

PAGE 33

PAGE 28

PAGE 34
PAGE 34

PAGE 27

DDRII 667/800 MHz

DDRII 667/800 MHz

X3

Mini PCI-E
Card

(Wireless LAN/TV
TUNNER)

PAGE 36

SATA0,1 150MB

SATA0 150MB

SATA4 150MB

PAGE 34

3

PCI-E

SMBUS

ENE KBC

KB3926 Cx

FAN

PAGE 37

AMD
Griffin

S1G2 Processor

Lion
Sabie

638P (uPGA)/35W

PAGE 3,4,5,6

HT3

CPU THERMAL
SENSOR

PCI-Express 16X

PAGE 5

CPU_CLK
NBGFX_CLK
NBGPP_CLK
SBLINK_CLK

HDMI

PAGE 23

NORTH BRIDGE

RX781

RS780MN

/

A12

21mm X 21mm, 528pin BGA

PAGE 8,9,10,11,

ALINK X4

SOUTH BRIDGE

Side port

256mb RAM
for UMA only

PAGE 8

USB2.0

1,8,9

PAGE 30 PAGE 30

X3

SB700 A12

21mm X 21mm, 528pin BGA

4.5W(Ext)

4.3W(Int)

PAGE 12,13.14.15.16 PAGE 27

LPC

MDC CONN

PAGE 29

PAGE 35

SPI

PAGE 35

4

PCIE BUS

Azalia

AUDIO CONNDigital MIC

(Phone/ MIC)

PAGE 27PAGE 30

5

IDT
92HD71B7

PAGE 27

AUDIO
Amplifier
TPA6017A2

PAGE 28

CRT

PAGE 24

LVDS

PAGE 23

5

BlueflameUSB2.0 Ports

Audio

Conn

PAGE 28

IEEE1394
connect for
Discrete
only

6

2

Webcam
X1

JMICRON
JMD380 for
Discrete
only

ATI M82-S
for

Discrete
only

64 Bit,DDR2*4

M82-SCE A11

PAGE 17,18,19

20,21,22

SBSRC_CLK

PAGE 30

Fingerprint

Memory
CardReader

PAGE 25PAGE 26

NB5/RD5

14.318MHz

CLOCK GEN

ICS9LPRS476AKLFT-->HP
SLG8SP626VTR-->HP
RTM880N-795 -->HP

10

PCI-E WLAN Card x1

11

TV-TUNER Card x1

7

Express Card x1

4

Cable Docking x1

6

PAGE 30

3

Flash Media
for UMA only
RTS5158

PAGE 25

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

Block Diagram

Date: Sheet

7

QT8 SYSTEM DIAGRAM

01

PAGE 2

PAGE 36

PAGE 36

PAGE 33

PAGE 37

Touch Screen
for Discrete
only

of

145Tuesday, February 19, 2008

8

1A

5

4

3

2

1

L49

+1.2V

BLM18PG181SN1D(180,1.5A)_6

600 ohms@100Mhz

D D

+3V

C C

B B

A A

DCR: 0.5 ohm

600 ohms@100Mhz

L51

BLM18PG181SN1D(180,1.5A)_6

can remove MOSFET level shift
SB/clock gen / DDR2 is 3.3V/S0
power level

C952 *10P/50V_4
C953 *10P/50V_4
C954 *10P/50V_4
C955 *10P/50V_4
C956 *10P/50V_4

SI-1 modified -- reserve for EMT

60 ohm, 0.5A

C523

10U/6.3V_8

+3V_CLKVDD

C541

10U/6.3V_8

+3V_CLKVDD

BLM18PG181SN1D(180,1.5A)_6

CHIPSET_PCIE_SLOW_SB#14

when driven low
to reduced setpoint

EXT_NB_OSC
CLK_48M_USB
CLK_48M_CR
EVGA-XTALI
OSC_SPREAD

5

C518

0.1U/10V_4

60 ohm, 0.5A

C468

0.1U/10V_4

0.1U/10V_4

L42

10U/6.3V_8

C466 33P/50V_4

C465 33P/50V_4

C496

0.1U/10V_4

C473

C464

14.318MHZ

0.1U/10V_4

C512

0.1U/10V_4

Place very
close to
C/G

Y2

1 2

PCLK_SMB6,7,13,28,36
PDAT_SMB6,7,13,28,36

D17 *CH501H-40PT L-F

SB_SRC clocks slow

custom CG IC

+3V

R756 *8.2K_4
R757 *8.2K_4
R758 *8.2K_4
R759 *8.2K_4

if use clock
request pin , need
to pull Hi for
default sttting

+1.2V_CLKVDDIO

C527

0.1U/10V_4

+3V_CLKVDD

C522

0.1U/10V_4

+3V_CLK_VDDA

C482

0.1U/10V_4

+3V_CLK_VDDA

C470

0.1U/10V_4

CG_XIN

CG_XOUT

21

only supported with

C521

0.1U/10V_4

C508

0.1U/10V_4

+3V_CLKVDD

+1.2V_CLKVDDIO

CG_XIN
CG_XOUT

CLK_PD#

PCLK_SMB
PDAT_SMB

SB_SRC_SLOW#

CLKREQ0#
CLKREQ2#
CLKREQ3#
CLKREQ4#

4

C476

C500

0.1U/10V_4

C515

0.1U/10V_4

C474

0.1U/10V_4

49
48

62
66

69
29
54
61
38
17
44

3

53
28
37
12
18

72
27

6
52
58
47
36
11
19

67
68

57

1

2

41

73
74
75

0.1U/10V_4

U10A

VDDA
GNDA

VDDREF
GNDREF

VDD48
VDDATIG
VDDCPU
VDDHTT
VDDSB_SRC
VDDSRC
VDDSATA
VDDDOT

VDDCPU_IO
VDDATIG_IO
VDDSB_SRC_IO
VDDSRC_IO1
VDDSRC_IO2

GND48
GNDATIG1
GNDDOT
GNDCPU
GNDHTT
GNDSATA
GNDSB_SRC
GNDSRC1
GNDSRC2

X1
X2

PD#

SMBCLK
SMBDAT

SB_SRC_SLOW#

SLG8SP626VTR

eGND73
eGND74
eGND75

U10B

SLG8SP626VTR

C471

THERMAL GND

C469

0.1U/10V_4

CPUKG0T_LPRS

CPUKG0C_LPRS

ATIG0T_LPRS
ATIG0C_LPRS
ATIG1T_LPRS
ATIG1C_LPRS
ATIG2T_LPRS
ATIG2C_LPRS

SB_SRC0T_LPRS
SB_SRC0C_LPRS
SB_SRC1T_LPRS
SB_SRC1C_LPRS

SRC0T_LPRS

SRC0C_LPRS

SRC1T_LPRS

SRC1C_LPRS

SRC2T_LPRS

SRC2C_LPRS

SRC3T_LPRS

SRC3C_LPRS

SRC4T_LPRS

SRC4C_LPRS

SRC5T_LPRS

SRC5C_LPRS

SRC6T/SATAT_LPRS

SRC6C/SATAC_LPRS

SRC7T_LPRS/27Mhz_SS

SRC7C_LPRS/27Mhz_NS

HTT0T/66M_LPRS
HTT0C/66M_LPRS

48MHz_0
48MHz_1

REF0/SEL_HTT66

REF1/SEL_SATA

REF2/SEL_27

CLKREQ0#
CLKREQ1#
CLKREQ2#
CLKREQ3#
CLKREQ4#

eGND77
eGND76
eGND78

CLK_VGA_27M_SS
CLK_VGA_27M_NSS

56
55

33
32
31
30
26
25

40
39
35
34

23
22
21
20
16
15
14
13
10
9
8
7
46
45
5
4

60
59
71
70

65
64
63

24
51
50
43
42

77
76
78

ICS ICS9LPR476BKLFT--AJRS4760000

SLG8SP626VTR--AJ006260000

SLG

RTM880N-795-- AJ008800000RTL

* default

SEL_HTT66

SEL_SATA

SEL_27 1027MHz non-spreading singled clock

66 MHz 3.3V single ended HTT clock

1

*01100 MHz differential HTT clock

100 MHz non-spreading differential SRC clock

100 MHz spreading differential SRC clock

*0
*

100 MHz spreading differential SRC clock

3

NBGFX_CLKP
NBGFX_CLKN

EXT_GFX_CLKP
EXT_GFX_CLKN

NBGPP_CLKP
NBGPP_CLKN

SBLINK_CLKP
SBLINK_CLKN

CPUCLKP
CPUCLKN

NBGFX_CLKP
NBGFX_CLKN

EXT_GFX_CLKN EXT_GFX_CLKN

CLK_PCIE_CARD
CLK_PCIE_CARD# CLK_PCIE_CARD#

NBGPP_CLKN_R
NBGPP_CLKN_L
PCIE_NEW_CLKP
PCIE_NEW_CLKN
PCIE_MINI1_CLKP
PCIE_MINI1_CLKN

SBSRC_CLKP SBSRC_CLKP
SBSRC_CLKN SBSRC_CLKN

PCIE_LAN_CLKN

CLK_VGA_27M_NSS

NBHTREFCLK0P
NBHTREFCLK0N
CLK_48M_CR_L

CLK48MUSB
SEL_HT66SEL_HT66SEL_HT66SEL_HT66
SEL_SATASEL_SATASEL_SATASEL_SATASEL_SATASEL_SATASEL_SATASEL_SATA
SEL_27

CLKREQ0#
EXT_NWD_CLK_REQ#
CLKREQ2#
CLKREQ3#
CLKREQ4#

RX780 RS780CLOCKS name

RP64 STUFF

RP66 STUFF to M82-S external reference clock -RX780 only

RP70 STUFF RP70 NC

RP72 STUFF RP72 STUFF

R653,R656,R612
STUFF

Place within 0.5"
of CLKGEN

RP43 *0_4P2R_4

4
2

RP54 *0_4P2R_4

4
2

RP53 *0_4P2R_4

4
2

T196
T84

RP48 *0_4P2R_4

4
2

RP55 *0_4P2R_4

4
2

RP51 *0_4P2R_4

4
2

RP49 *0_4P2R_4

4
2

RP47 *0_4P2R_4

4
2

RP45 *0_4P2R_4

4
2

RP44 *0_4P2R_4

4
2

R527 33_4
R215 75/F_4
R490 100/F_4

R193 0_4
R194 0_4
R201 33_4
R192 33_4

RP64 STUFF

to NB for VGA reference clock

RP66 NC

to NB for RX780 for PCIEX2 interface reference clock only
RS780 is internal share with AC-LINK clock,RS780 not need

to NB for AC-LINK reference clock

R653,R656,R612
NC

3
1

3
1
3
1

3
1
3
1

T59
T62

3
1
3
1
3
1
3
1
3
1

EXT_NWD_CLK_REQ# 33

Clock chip has internal serial
terminations
for differencial pairs, external resistors
are
reserved for debug purpose.

+3V_CLKVDD

R189
*8.2K_4

R203

8.2K_4

To M82-S 27Mhz - RX780 only

R196 *261_4

CPUCLKP
CPUCLKN

NBGFX_CLKP
NBGFX_CLKN
EXT_GFX_CLKPEXT_GFX_CLKP

PCIE_MINI2_CLKPPCIE_MINI2_CLKP
PCIE_MINI2_CLKNPCIE_MINI2_CLKN
CLK_PCIE_CARD

Del RP52 for NBGPP CLK

PCIE_NEW_CLKP
PCIE_NEW_CLKN
PCIE_MINI1_CLKP
PCIE_MINI1_CLKN
SBLINK_CLKPSBLINK_CLKP
SBLINK_CLKNSBLINK_CLKN

PCIE_LAN_CLKPPCIE_LAN_CLKP
PCIE_LAN_CLKN

OSC_SPREADCLK_VGA_27M_SS

NBHT_REFCLKP
NBHT_REFCLKN
CLK_48M_CR
CLK_48M_USB

R195

8.2K_4

R202
*8.2K_4

RS780M/RX780M

2

Clock pin function

Del RP for TP on PV

CPUCLKP 3
CPUCLKN 3

NBGFX_CLKP 10
NBGFX_CLKN 10
EXT_GFX_CLKP 17
EXT_GFX_CLKN 17

PCIE_MINI2_CLKP 36
PCIE_MINI2_CLKN 36
CLK_PCIE_CARD 26
CLK_PCIE_CARD# 26

PCIE_NEW_CLKP 33
PCIE_NEW_CLKN 33
PCIE_MINI1_CLKP 36
PCIE_MINI1_CLKN 36
SBLINK_CLKP 10
SBLINK_CLKN 10
SBSRC_CLKP 12
SBSRC_CLKN 12
PCIE_LAN_CLKP 31
PCIE_LAN_CLKN 31

OSC_SPREAD 18
EVGA-XTALI 18

NBHT_REFCLKP 10
NBHT_REFCLKN 10
CLK_48M_CR 25
CLK_48M_USB 13

T58
T167

SEL_27
SEL_SATA
SEL_HT66

to NB for external Graphics
reference clock
to M82-S -RX780 only

to TV TUNER CARD

to PCIE-CARD READER

to EPRESS CARD

to WLAN

to NB for AC-LINK reference clock

to SB

to PCIE-LAN

SI-1 Modified --remove

SSIN - for M82 - 3.3V level input
X_TALIN --for M82 -1.8V level input

Ra

R186 158/F_4
R184 90.9/F_4

1 2

Rb

1.8V

82.5RRa

130R

Rb

RES CHIP 130 1/16W +-1%(0402)L-F -->CS11302FB15
RES CHIP 158 1/16W +-1%(0402) -->CS11582FB00
RES CHIP 90.9 1/16W +-1%(0402) -->CS09092FB15
RES CHIP 82.5 1/16W +-1%(0402) -->CS08252FB11

EXT_NWD_CLK_REQ#
CLK_PD#
SB_SRC_SLOW#

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

NB5/RD5

Clock Generator

Date: Sheet

to ROBSON

RS780RX780

1.1V

158R

90.9R

1

02

EXT_NB_OSC 10

R2198.2K_4
R2048.2K_4
R2618.2K_4

of

245Tuesday, February 19, 2008

+3V

1A

5

+1.2V +1.2V_VLDT

R474 0_8
R473 0_8

D D

HT_NB_CPU_CAD_H[15..0]8
HT_NB_CPU_CAD_L[15..0]8
HT_NB_CPU_CLK_H[1..0]8
HT_NB_CPU_CLK_L[1..0]8
HT_NB_CPU_CTL_H[1..0]8
HT_NB_CPU_CTL_L[1..0]8
HT_CPU_NB_CAD_H[15..0]8
HT_CPU_NB_CAD_L[15..0]8
HT_CPU_NB_CLK_H[1..0]8
HT_CPU_NB_CLK_L[1..0]8

C C

HT_CPU_NB_CTL_H[1..0]8
HT_CPU_NB_CTL_L[1..0]8

FOX PZ63826-284R-41F
DG0^8000004 IC SOCKET SMD 638P S1(P1.27,H3.2)
MLX 47296-4131
DG0^8000003 IC SOCKET SMD 638P S1(P1.27,H3.2)
TYC 4-1903401-2
DG0^8000005 IC SOCKET SMD 638P S1(P1.27,H3.2)

+1.2V_VLDT

HT_NB_CPU_CAD_H[15..0]
HT_NB_CPU_CAD_L[15..0]

HT_NB_CPU_CLK_H[1..0]

HT_NB_CPU_CLK_L[1..0]

HT_NB_CPU_CTL_H[1..0]

HT_NB_CPU_CTL_L[1..0]
HT_CPU_NB_CAD_H[15..0]
HT_CPU_NB_CAD_L[15..0]

HT_CPU_NB_CLK_H[1..0]

HT_CPU_NB_CLK_L[1..0]

HT_CPU_NB_CTL_H[1..0]

HT_CPU_NB_CTL_L[1..0]

C739 4.7U/6.3V_6
C744 4.7U/6.3V_6
C758 0.22U/6.3V_4
C753 180P/50V_4

HT_NB_CPU_CAD_H0
HT_NB_CPU_CAD_L0
HT_NB_CPU_CAD_H1
HT_NB_CPU_CAD_L1
HT_NB_CPU_CAD_H2
HT_NB_CPU_CAD_L2
HT_NB_CPU_CAD_H3
HT_NB_CPU_CAD_L3
HT_NB_CPU_CAD_H4
HT_NB_CPU_CAD_L4
HT_NB_CPU_CAD_H5
HT_NB_CPU_CAD_L5
HT_NB_CPU_CAD_H6
HT_NB_CPU_CAD_L6
HT_NB_CPU_CAD_H7
HT_NB_CPU_CAD_L7
HT_NB_CPU_CAD_H8
HT_NB_CPU_CAD_L8
HT_NB_CPU_CAD_H9
HT_NB_CPU_CAD_L9
HT_NB_CPU_CAD_H10
HT_NB_CPU_CAD_L10
HT_NB_CPU_CAD_H11
HT_NB_CPU_CAD_L11
HT_NB_CPU_CAD_H12
HT_NB_CPU_CAD_L12
HT_NB_CPU_CAD_H13
HT_NB_CPU_CAD_L13
HT_NB_CPU_CAD_H14
HT_NB_CPU_CAD_L14
HT_NB_CPU_CAD_H15
HT_NB_CPU_CAD_L15

HT_NB_CPU_CLK_H0
HT_NB_CPU_CLK_L0
HT_NB_CPU_CLK_H1
HT_NB_CPU_CLK_L1

HT_NB_CPU_CTL_H0
HT_NB_CPU_CTL_L0
HT_NB_CPU_CTL_H1
HT_NB_CPU_CTL_L1

BLM21PG221SN1D(220,100M,2A)_8

+2.5V

C416

10U/6.3V_8

+1.2V_VLDT
+1.2V_VLDT
+1.2V_VLDT
+1.2V_VLDT

L36

LS0805-100M-N

U31A

D1

VLDT_A0

D2

VLDT_A1

D3

VLDT_A2

D4

VLDT_A3

E3

L0_CADIN_H0

E2

L0_CADIN_L0

E1

L0_CADIN_H1

F1

L0_CADIN_L1

G3

L0_CADIN_H2

G2

L0_CADIN_L2

G1

L0_CADIN_H3

H1

L0_CADIN_L3

J1

L0_CADIN_H4

K1

L0_CADIN_L4

L3

L0_CADIN_H5

L2

L0_CADIN_L5

L1

L0_CADIN_H6

M1

L0_CADIN_L6

N3

L0_CADIN_H7

N2

L0_CADIN_L7

E5

L0_CADIN_H8

F5

L0_CADIN_L8

F3

L0_CADIN_H9

F4

L0_CADIN_L9

G5

L0_CADIN_H10

H5

L0_CADIN_L10

H3

L0_CADIN_H11

H4

L0_CADIN_L11

K3

L0_CADIN_H12

K4

L0_CADIN_L12

L5

L0_CADIN_H13

M5

L0_CADIN_L13

M3

L0_CADIN_H14

M4

L0_CADIN_L14

N5

L0_CADIN_H15

P5

L0_CADIN_L15

J3

L0_CLKIN_H0

J2

L0_CLKIN_L0

J5

L0_CLKIN_H1

K5

L0_CLKIN_L1

N1

L0_CTLIN_H0

P1

L0_CTLIN_L0

P3

L0_CTLIN_H1

P4

L0_CTLIN_L1

SOCKET_638_PIN

4

HT LINK

+CPUVDDA

C392

4.7U/6.3V_6

VLDT_B0
VLDT_B1
VLDT_B2
VLDT_B3

L0_CADOUT_H0

L0_CADOUT_L0

L0_CADOUT_H1

L0_CADOUT_L1

L0_CADOUT_H2

L0_CADOUT_L2

L0_CADOUT_H3

L0_CADOUT_L3

L0_CADOUT_H4

L0_CADOUT_L4

L0_CADOUT_H5

L0_CADOUT_L5

L0_CADOUT_H6

L0_CADOUT_L6

L0_CADOUT_H7

L0_CADOUT_L7

L0_CADOUT_H8

L0_CADOUT_L8

L0_CADOUT_H9

L0_CADOUT_L9

L0_CADOUT_H10

L0_CADOUT_L10

L0_CADOUT_H11

L0_CADOUT_L11

L0_CADOUT_H12

L0_CADOUT_L12

L0_CADOUT_H13

L0_CADOUT_L13

L0_CADOUT_H14

L0_CADOUT_L14

L0_CADOUT_H15

L0_CADOUT_L15

L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1

L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1

3

W/S= 15 mil/20mil

C368

0.22U/6.3V_4

C363
3300P/50V_4

+1.2V_VLDT

AE2

+1.2V_VLDT

AE3

+1.2V_VLDT CPU_SVC_R

AE4

+1.2V_VLDT

AE5

HT_CPU_NB_CAD_H0

AD1

HT_CPU_NB_CAD_L0

AC1

HT_CPU_NB_CAD_H1

AC2

HT_CPU_NB_CAD_L1

AC3

HT_CPU_NB_CAD_H2

AB1

HT_CPU_NB_CAD_L2

AA1

HT_CPU_NB_CAD_H3

AA2

HT_CPU_NB_CAD_L3

AA3

HT_CPU_NB_CAD_H4

W2

HT_CPU_NB_CAD_L4

W3

HT_CPU_NB_CAD_H5

V1

HT_CPU_NB_CAD_L5

U1

HT_CPU_NB_CAD_H6

U2

HT_CPU_NB_CAD_L6

U3

HT_CPU_NB_CAD_H7

T1

HT_CPU_NB_CAD_L7

R1

HT_CPU_NB_CAD_H8

AD4

HT_CPU_NB_CAD_L8

AD3

HT_CPU_NB_CAD_H9

AD5

HT_CPU_NB_CAD_L9

AC5

HT_CPU_NB_CAD_H10

AB4

HT_CPU_NB_CAD_L10

AB3

HT_CPU_NB_CAD_H11

AB5

HT_CPU_NB_CAD_L11

AA5

HT_CPU_NB_CAD_H12

Y5

HT_CPU_NB_CAD_L12

W5

HT_CPU_NB_CAD_H13

V4

HT_CPU_NB_CAD_L13

V3

HT_CPU_NB_CAD_H14

V5

HT_CPU_NB_CAD_L14

U5

HT_CPU_NB_CAD_H15

T4

HT_CPU_NB_CAD_L15

T3

HT_CPU_NB_CLK_H0

Y1

HT_CPU_NB_CLK_L0

W1

HT_CPU_NB_CLK_H1

Y4

HT_CPU_NB_CLK_L1

Y3

HT_CPU_NB_CTL_H0

R2

HT_CPU_NB_CTL_L0

R3

HT_CPU_NB_CTL_H1

T5

HT_CPU_NB_CTL_L1

R5

CPU CLK

CPUCLKP2
CPUCLKN2

Keep trace from resisor to CPU within 0.6"
keep trace from caps to CPU within 1.2"

C8404.7U/6.3V_6
C8180.22U/6.3V_4
C829180P/50V_4

SI-2 modified for AMD
sighting update

CPUCLKIN
CPUCLKP

CPUCLKN

SideBand Temp sense I2C

+1.8VSUS

CPUCLKP
CPUCLKN

R137 169/F_4

C408 3900P/25V_4
C409 3900P/25V_4

CPU_LDT_RST#10,12

CPU_LDT_STOP#10,12

+1.2V_VLDT

CPU_VDD0_RUN_FB_H40
CPU_VDD0_RUN_FB_L40

CPU_VDD1_RUN_FB_H40
CPU_VDD1_RUN_FB_L40

+1.8VSUS

R776 300/F_4
R777 300/F_4

R455 300_4

CPUCLKIN#

CPU_PWRGD12

CPU_SIC5
CPU_SID5

CPU_ALERT5

R128 44.2/F_4
R135 44.2/F_4

R141 510/F_4

R108 510/F_4

R535 0_4

2

+CPUVDDA

W/S= 15 mil/20mil

+CPUVDDA
+CPUVDDA

CPUCLKIN
CPUCLKIN#

CPU_LDT_RST#
CPU_PWRGD
CPU_LDT_STOP#
CPU_LDT_REQ#_CPU

CPU_SIC
CPU_SID
CPU_ALERT

CPU_HTREF0
CPU_HTREF1

place them to CPU within 1.5"

CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI

T7
T42

T45

T116
T118

T9

CPUTEST23
CPUTEST18

CPUTEST19
CPUTEST25H

CPUTEST25L

CPUTEST21
CPUTEST20
CPUTEST24
CPUTEST22
CPUTEST12
CPUTEST27

CPU_THERMDC
CPU_THERMDA

CPU_LDT_RST#
CPU_LDT_STOP#
CPU_PWRGD
CPU_LDT_REQ#_CPU

F8
F9

A9
A8

B7
A7

F10

C6

AF4
AF5

AE6

R6
P6

F6
E6

Y6

AB6
G10

AA9
AC9
AD9
AF9

AD7
H10

G9

E9
E8

AB8
AF7
AE7
AE8
AC8
AF8

C2

AA6

A3
A5

B3

B5

C1

R569 0_4
R567 0_4

U31D

VDDA1
VDDA2

CLKIN_H
CLKIN_L

RESET_L
PWROK
LDTSTOP_L
LDTREQ_L

SIC
SID
ALERT_L

HT_REF0
HT_REF1

VDD0_FB_H
VDD0_FB_L

VDD1_FB_H
VDD1_FB_L

DBRDY
TMS
TCK
TRST_L
TDI

TEST23
TEST18

TEST19
TEST25_H

TEST25_L
TEST21

TEST20
TEST24
TEST22
TEST12
TEST27

TEST9
TEST6

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5

SOCKET_638_PIN

R142300_4
R140300_4
R144300_4
R563300_4

KEY1
KEY2

THERMTRIP_L

PROCHOT_L

MEMHOT_L

THERMDC
THERMDA

VDDIO_FB_H

VDDIO_FB_L

VDDNB_FB_H

VDDNB_FB_L

DBREQ_L

TEST28_H

TEST28_L

TEST17
TEST16
TEST15
TEST14

TEST7

TEST10

TEST8

TEST29_H

TEST29_L

RSVD10

RSVD9
RSVD8
RSVD7
RSVD6

SVC
SVD

TDO

H_THRMDC 5
H_THRMDA 5

+1.8V

M11
W18

A6

CPU_SVD_R

A4

CPU_THERMTRIP_L#

AF6

CPU_PROCHOT_L#

AC7

CPU_MEMHOT_L#

AA8

CPU_THERMDC

W7

CPU_THERMDA

W8

VDDIO_FB_H

W9

VDDIO_FB_L

Y9
H6

G6

CPU_DBREQ#

E10

CPU_TDO

AE9

CPUTEST28H

J7

CPUTEST28L

H8

CPUTEST17

D7

CPUTEST16

E7

CPUTEST15

F7

CPUTEST14

C7
C3

K8
C4

CPUTEST29H

C9

CPUTEST29L

C8

H18
H19
AA7
D5
C5

1

03

SI-2 modified -­confirm AMD R563
need to stuff

VDDIO_FB_H 41

VDDIO_FB_L 41

CPU_VDDNB_RUN_FB_H 40
CPU_VDDNB_RUN_FB_L 40

R775 300/F_4

SI-2

T40

modified for

T43

AMD sighting

T48

update

T46
T44
T49

T47
T50

+1.8VSUS

CNTR_VREF

B B

A A

R571 20K/F_4

+3V

Q39 *BSS138_NL/SOT23

1

R570 0_4

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

R59 10K/F_4

R62 300_4

CPU_MEMHOT_L# CPU_MEMHOT#

R453 10K/F_4

R452 300_4

CPU_PROCHOT_L#

C854 0.1U/10V_4

R574 34.8K/F_4

CNTR_VREF

2

3

2

2

Q35

1 3

MMBT3904

5

CPU_LDT_REQ# 10

Q11
MMBT3904

13

CNTR_VREF 5

CPU_LDT_RST#

CPU_PROCHOT# 12

R143
0_4

12

G1
*SHORT_ PAD1

for debug only

CPU_MEMHOT# 7,13

+1.8VSUS

+1.8VSUS

CPU_THERMTRIP_L#

2

1

R60 10K/F_4

R454 300_4

4

+3V

3

Q40
BSS138_NL/SOT23

2

Q10
MMBT3904

1 3

R577
1K/F_4

CPU_LDT_RST_HTPA#CPU_LDT_REQ#_CPU

CPU_THERMTRIP# 13

Serial VID

R145 *2.2K_4
R561 1K/F_4

+1.8VSUS

CPU_SVC_R
CPU_SVD_R CPU_SVD
CPU_PWRGD

R562 1K/F_4
R554 0_4

R553 0_4
R147 0_4

R560 *220_4
R559 *220_4

C926 *0.1U/10V_4

SI-2 remove for power up seq

HDT Connector

+1.8VSUS

CPU_DBREQ#
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO

C54 *0.1U/10V_4

3

CPU_SVC

CPU_PWRGD_SVID_REG

1 2
3 4
5 6
7 8

9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24

KEY

CN6 *HDT CONN

25

CPU_SVC 40
CPU_SVD 40
CPU_PWRGD_SVID_REG 40

CPU_LDT_RST_HTPA#

2

NB5/RD5

VFIX MODE

VID Override Circuit

SVC SVD Voltage Output

00
0

1
0

1

11

CPUTEST20
CPUTEST22
CPUTEST12
CPUTEST15
CPUTEST14
CPUTEST19
CPUTEST18

SI-2 reserve for AMD recommend

R798 *300/F_4
R799 *300/F_4
R800 *300/F_4
R801 *300/F_4
R802 *300/F_4
R803 *300/F_4
R804 *300/F_4

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

S1G2 HT,CTL I/F 1/3

Date: Sheet

1

1.4V

1.2V

1.0V

0.8V

345Tuesday, February 19, 2008

1A

of

A

B

C

D

E

+0.9VSMVTT +0.9VSMVTT

PLACE THEM CLOSE TO
CPU WITHIN 1"

R459 39.2/F_4

MEM_MA0_ODT06,7
MEM_MA0_ODT16,7

MEM_MA0_CS#06,7
MEM_MA0_CS#16,7

MEM_MA_CLK1_P6
MEM_MA_CLK1_N6
MEM_MA_CLK7_P6
MEM_MA_CLK7_N6

MEM_MA_BANK06,7
MEM_MA_BANK16,7
MEM_MA_BANK26,7

MEM_MA_RAS#6,7
MEM_MA_CAS#6,7
MEM_MA_WE#6,7

MEM_MA_CKE06,7
MEM_MA_CKE16,7

R458 39.2/F_4

T41

A

+1.8VSUS

4 4

MEM_MA_ADD[0..15]6,7

3 3

2 2

1 1

M_ZP
M_ZN

MEM_MA_RESET#

MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15

MEM_MB_CLK7_P

MEM_MB_CLK7_N
MEM_MB_CLK1_P

MEM_MB_CLK1_N

U31B

D10

VTT1

C10

VTT2

B10

VTT3

AD10

VTT4

AF10

MEMZP

AE10

MEMZN

H16

RSVD_M1

T19

MA0_ODT0

V22

MA0_ODT1

U21

MA1_ODT0

V19

MA1_ODT1

T20

MA0_CS_L0

U19

MA0_CS_L1

U20

MA1_CS_L0

V20

MA1_CS_L1

J22

MA_CKE0

J20

MA_CKE1

N19

MA_CLK_H5

N20

MA_CLK_L5

E16

MA_CLK_H1

F16

MA_CLK_L1

Y16

MA_CLK_H7

AA16

MA_CLK_L7

P19

MA_CLK_H4

P20

MA_CLK_L4

N21

MA_ADD0

M20

MA_ADD1

N22

MA_ADD2

M19

MA_ADD3

M22

MA_ADD4

L20

MA_ADD5

M24

MA_ADD6

L21

MA_ADD7

L19

MA_ADD8

K22

MA_ADD9

R21

MA_ADD10

L22

MA_ADD11

K20

MA_ADD12

V24

MA_ADD13

K24

MA_ADD14

K19

MA_ADD15

R20

MA_BANK0

R23

MA_BANK1

J21

MA_BANK2

R19

MA_RAS_L

T22

MA_CAS_L

T24

MA_WE_L

SOCKET_638_PIN

+0.9VSMVTT

4.7U/6.3V_6

+0.9VSMVTT

1000P/50V_4

C736

1.5P/50V_4

C366

1.5P/50V_4

MEM:CMD/CTRL/CLK

VTT5
VTT6
VTT7
VTT8
VTT9

VTT_SENSE

MEMVREF

RSVD_M2

MB0_ODT0
MB0_ODT1
MB1_ODT0

MB0_CS_L0
MB0_CS_L1
MB1_CS_L0

MB_CKE0
MB_CKE1

MB_CLK_H5

MB_CLK_L5

MB_CLK_H1

MB_CLK_L1

MB_CLK_H7

MB_CLK_L7

MB_CLK_H4

MB_CLK_L4

MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8

MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15

MB_BANK0
MB_BANK1
MB_BANK2

MB_RAS_L
MB_CAS_L

MB_WE_L

Place close to socket

C399

C112

4.7U/6.3V_6

C401

1000P/50V_4

Close to CPU within 1500 mils

C202

4.7U/6.3V_6

1000P/50V_4

C99

C400

W10
AC10
AB10
AA10
A10

CPU_VTT_SENSE

Y10

MEMVREF_CPU

W17

MEM_MB_RESET#

B18
W26

W23
Y26

V26
W25
U22

J25
H26

P22
R22
A17
A18
AF18
AF17
R26
R25

MEM_MB_ADD0

P24

MEM_MB_ADD1

N24

MEM_MB_ADD2

P26

MEM_MB_ADD3

N23

MEM_MB_ADD4

N26

MEM_MB_ADD5

L23

MEM_MB_ADD6

N25

MEM_MB_ADD7

L24

MEM_MB_ADD8

M26

MEM_MB_ADD9

K26

MEM_MB_ADD10

T26

MEM_MB_ADD11

L26

MEM_MB_ADD12

L25

MEM_MB_ADD13

W24

MEM_MB_ADD14

J23

MEM_MB_ADD15

J24
R24

U26
J26

U25
U24
U23

4.7U/6.3V_6

1000P/50V_4

B

C398

C185

750 mA

CPU_VTT_SENSE 41

T51

MEM_MB0_ODT0 6,7
MEM_MB0_ODT1 6,7

MEM_MB0_CS#0 6,7
MEM_MB0_CS#1 6,7

MEM_MB_CKE0 6,7
MEM_MB_CKE1 6,7

MEM_MB_CLK1_P 6
MEM_MB_CLK1_N 6
MEM_MB_CLK7_P 6
MEM_MB_CLK7_N 6

MEM_MB_BANK0 6,7
MEM_MB_BANK1 6,7
MEM_MB_BANK2 6,7

MEM_MB_RAS# 6,7
MEM_MB_CAS# 6,7
MEM_MB_WE# 6,7

C213

0.22U/6.3V_4

C183

180P/50V_4

MEM_MA_CLK7_P

MEM_MA_CLK7_N
MEM_MA_CLK1_P

MEM_MA_CLK1_N

R81

2K/F_4

R77

2K/F_4

MEM_MB_ADD[0..15] 6,7

C369

0.22U/6.3V_4

C189

180P/50V_4

C734

1.5P/50V_4

C367

1.5P/50V_4

+1.8VSUS

C364

0.22U/6.3V_4

C390

180P/50V_4

R82
*0_4

C197

0.1U/10V_4

0.22U/6.3V_4

180P/50V_4

MEM_MB_DATA[0..63]6

+0.9VSMVREF 6,41

Reserved

C177

1000P/50V_4

MEM_MB_DM[0..7]6

C201

C396

C

Processor Memory Interface

U31C

MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63

MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7

MEM_MB_DQS0_P6
MEM_MB_DQS0_N6
MEM_MB_DQS1_P6
MEM_MB_DQS1_N6
MEM_MB_DQS2_P6
MEM_MB_DQS2_N6
MEM_MB_DQS3_P6
MEM_MB_DQS3_N6
MEM_MB_DQS4_P6
MEM_MB_DQS4_N6
MEM_MB_DQS5_P6
MEM_MB_DQS5_N6
MEM_MB_DQS6_P6
MEM_MB_DQS6_N6
MEM_MB_DQS7_P6
MEM_MB_DQS7_N6

C11
A11
A14
B14
G11
E11
D12
A13
A15
A16
A19
A20
C14
D14
C18
D18
D20
A21
D24
C25
B20
C20
B24
C24
E23
E24
G25
G26
C26
D26
G23

G24
AA24
AA23
AD24
AE24
AA26
AA25
AD26
AE25
AC22
AD22
AE20
AF20
AF24
AF23
AC20
AD20
AD18
AE18
AC14
AD14
AF19
AC18
AF16
AF15
AF13
AC12
AB11

Y11
AE14
AF14
AF11
AD11

A12

B16

A22

E25
AB26
AE22
AC16
AD12

C12

B12

D16

C16

A24

A23

F26

E26
AC25
AC26
AF21
AF22
AE16
AD16
AF12
AE12

SOCKET_638_PIN

MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63

MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7

MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7

MEM:DATA

MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8

MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63

MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7

MA_DQS_H0

MA_DQS_L0

MA_DQS_H1

MA_DQS_L1

MA_DQS_H2

MA_DQS_L2

MA_DQS_H3

MA_DQS_L3

MA_DQS_H4

MA_DQS_L4

MA_DQS_H5

MA_DQS_L5

MA_DQS_H6

MA_DQS_L6

MA_DQS_H7

MA_DQS_L7

G12
F12
H14
G14
H11
H12
C13
E13
H15
E15
E17
H17
E14
F14
C17
G17
G18
C19
D22
E20
E18
F18
B22
C23
F20
F22
H24
J19
E21
E22
H20
H22
Y24
AB24
AB22
AA21
W22
W21
Y22
AA22
Y20
AA20
AA18
AB18
AB21
AD21
AD19
Y18
AD17
W16
W14
Y14
Y17
AB17
AB15
AD15
AB13
AD13
Y12
W11
AB14
AA14
AB12
AA12

E12
C15
E19
F24
AC24
Y19
AB16
Y13

G13
H13
G16
G15
C22
C21
G22
G21
AD23
AC23
AB19
AB20
Y15
W15
W12
W13

MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8

MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12

MEM_MA_DATA13

MEM_MA_DATA14

MEM_MA_DATA15

MEM_MA_DATA16

MEM_MA_DATA17

MEM_MA_DATA18

MEM_MA_DATA19

MEM_MA_DATA20

MEM_MA_DATA21

MEM_MA_DATA22

MEM_MA_DATA23

MEM_MA_DATA24

MEM_MA_DATA25

MEM_MA_DATA26

MEM_MA_DATA27

MEM_MA_DATA28

MEM_MA_DATA29

MEM_MA_DATA30

MEM_MA_DATA31

MEM_MA_DATA32

MEM_MA_DATA33

MEM_MA_DATA34

MEM_MA_DATA35

MEM_MA_DATA36

MEM_MA_DATA37

MEM_MA_DATA38

MEM_MA_DATA39

MEM_MA_DATA40

MEM_MA_DATA41

MEM_MA_DATA42

MEM_MA_DATA43

MEM_MA_DATA44

MEM_MA_DATA45

MEM_MA_DATA46

MEM_MA_DATA47

MEM_MA_DATA48

MEM_MA_DATA49

MEM_MA_DATA50

MEM_MA_DATA51

MEM_MA_DATA52

MEM_MA_DATA53

MEM_MA_DATA54

MEM_MA_DATA55

MEM_MA_DATA56

MEM_MA_DATA57

MEM_MA_DATA58

MEM_MA_DATA59

MEM_MA_DATA60

MEM_MA_DATA61

MEM_MA_DATA62

MEM_MA_DATA63

MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7

MEM_MA_DATA[0..63] 6

MEM_MA_DM[0..7] 6

MEM_MA_DQS0_P 6
MEM_MA_DQS0_N 6
MEM_MA_DQS1_P 6
MEM_MA_DQS1_N 6
MEM_MA_DQS2_P 6
MEM_MA_DQS2_N 6
MEM_MA_DQS3_P 6
MEM_MA_DQS3_N 6
MEM_MA_DQS4_P 6
MEM_MA_DQS4_N 6
MEM_MA_DQS5_P 6
MEM_MA_DQS5_N 6
MEM_MA_DQS6_P 6
MEM_MA_DQS6_N 6
MEM_MA_DQS7_P 6
MEM_MA_DQS7_N 6

04

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

D

NB5/RD5

S1G2 DDRII MEMORY I/F 2/3

Date: Sheet

E

445Tuesday, February 19, 2008

1A

of

5

4

3

2

1

U31F

AA4

VSS1

AA11

U31E

G4

VDD0_1

H2

VDD0_2

J9

VDD0_3

J11

VDD0_4

J13

VDD0_5

3

R149

10K/F_4

J15

VDD0_6

K6

VDD0_7

K10

VDD0_8

K12

VDD0_9

K14

VDD0_10

L4

VDD0_11

L7

VDD0_12

L9

VDD0_13

L11

VDD0_14

L13

VDD0_15

L15

VDD0_16

M2

VDD0_17

M6

VDD0_18

M8

VDD0_19

M10

VDD0_20

N7

VDD0_21

N9

VDD0_22

N11

VDD0_23

K16

VDDNB_1

M16

VDDNB_2

P16

VDDNB_3

T16

VDDNB_4

V16

VDDNB_5

H25

VDDIO1

J17

VDDIO2

K18

VDDIO3

K21

VDDIO4

K23

VDDIO5

K25

VDDIO6

L17

VDDIO7

M18

VDDIO8

M21

VDDIO9

M23

VDDIO10

M25

VDDIO11

N17

VDDIO12

SOCKET_638_PIN

2

Q14

1

3

*BSS138_NL/SOT23

R151

10K/F_4

D D

+CPUVDDNB

3A

+1.8VSUS

2A

C C

CNTR_VREF3

MBCLK218,35

MBDATA218,35

B B

Del R150, R152
on PV

PM_THERM#13

A A

MBCLK2

*BSS138_NL/SOT23

MBDATA2

*BSS138_NL/SOT23

SMBALERT#

MBCLK218,35
MBDATA218,35

VDD1_1
VDD1_2
VDD1_3
VDD1_4
VDD1_5
VDD1_6
VDD1_7
VDD1_8

VDD1_9
VDD1_10
VDD1_11
VDD1_12
VDD1_13
VDD1_14
VDD1_15
VDD1_16
VDD1_17
VDD1_18
VDD1_19
VDD1_20
VDD1_21
VDD1_22
VDD1_23
VDD1_24
VDD1_25
VDD1_26

VDDIO27
VDDIO26
VDDIO25
VDDIO24
VDDIO23
VDDIO22
VDDIO21
VDDIO20
VDDIO19
VDDIO18
VDDIO17
VDDIO16
VDDIO15
VDDIO14
VDDIO13

2

Q15

1

2

3

10K/F_4

SI-2 Modified for H/W thermal shutdown

+1.8VSUS

+1.8VSUS

CPU_THERMTRIP_L#

5

R805 *10K/F_4

R806 *300_4

CPU_THERMTRIP_L# SMBALERT#

+VCORE1+VCORE0 +VCORE0

P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
U15
V6
V8
V10
V12
V14
W4
Y2

Q13

8
7
6
4

AC4
AD2

Y25
V25
V23
V21
V18
U17
T25
T23
T21
T18
R17
P25
P23
P21
P18

CPU_SIC

CPU_SID

CPU_ALERT

1

U36

SCLK
SDA
ALERT#
OVERT#

G781P8

2

1 3

MSOP

Q71
*MMBT3904

R164
390_4

VCC
DXP
DXN

GND

+1.8VSUS

R572

200/F_6

1
2
3
5

+1.8VSUS

R166
390_4

+3V+3V

Update U36 P/N
on PV

SMBALERT#

4

C856

0.1U/10V_4

C855
2200P/50V_4

R167
1K/F_4

CPU_SIC 3

CPU_SID 3

CPU_ALERT 3

H_THRMDA 3

H_THRMDC 3

PQ60

*2N7002E-G

VSS2

AA13

VSS3

AA15

VSS4

AA17

VSS5

AA19

VSS6

AB2

VSS7

AB7

VSS8

AB9

VSS9

AB23

VSS10

AB25

VSS11

AC11

VSS12

AC13

VSS13

AC15

VSS14

AC17

VSS15

AC19

VSS16

AC21

VSS17

AD6

VSS18

AD8

VSS19

AD25

VSS20

AE11

VSS21

AE13

VSS22

AE15

VSS23

AE17

VSS24

AE19

VSS25

AE21

VSS26

AE23

VSS27

B4

VSS28

B6

VSS29

B8

VSS30

B9

VSS31

B11

VSS32

B13

VSS33

B15

VSS34

B17

VSS35

B19

VSS36

B21

VSS37

B23

VSS38

B25

VSS39

D6

VSS40

D8

VSS41

D9

VSS42

D11

VSS43

D13

VSS44

D15

VSS45

D17

VSS46

D19

VSS47

D21

VSS48

D23

VSS49

D25

VSS50

E4

VSS51

F2

VSS52

F11

VSS53

F13

VSS54

F15

VSS55

F17

VSS56

F19

VSS57

F21

VSS58

F23

VSS59

F25

VSS60

H7

VSS61

H9

VSS62

H21

VSS63

H23

VSS64

J4

VSS65

SOCKET_638_PIN

PROCESSOR POWER AND GROUND

R170 *0_4

reserve for
power shutdown
( if can )

R168 0_4

Q16

MMBT3904

2

1 3

3

1

R760 *10K/F_4

2

ADD VGA TEMP_ FAIL function
M8X is active Hi , M7X acvite Low

J6

VSS66

J8

VSS67

J10

VSS68

J12

VSS69

J14

VSS70

J16

VSS71

J18

VSS72

K2

VSS73

K7

VSS74

K9

VSS75

K11

VSS76

K13

VSS77

K15

VSS78

K17

VSS79

L6

VSS80

L8

VSS81

L10

VSS82

L12

VSS83

L14

VSS84

L16

VSS85

L18

VSS86

M7

VSS87

M9

VSS88

AC6

VSS89

M17

VSS90

N4

VSS91

N8

VSS92

N10

VSS93

N16

VSS94

N18

VSS95

P2

VSS96

P7

VSS97

P9

VSS98

P11

VSS99

P17

VSS100

R8

VSS101

R10

VSS102

R16

VSS103

R18

VSS104

T7

VSS105

T9

VSS106

T11

VSS107

T13

VSS108

T15

VSS109

T17

VSS110

U4

VSS111

U6

VSS112

U8

VSS113

U10

VSS114

U12

VSS115

U14

VSS116

U16

VSS117

U18

VSS118

V2

VSS119

V7

VSS120

V9

VSS121

V11

VSS122

V13

VSS123

V15

VSS124

V17

VSS125

W6

VSS126

Y21

VSS127

Y23

VSS128

N6

VSS129

SYS_SHDN#

SYS_SHDN#

D34

*CH500H

2 1

D33

2 1

CH501H-40PT

R172 10K/F_4

3

3920_RST#

ECPWROK

TEMP_FAIL 18

BOTTOM SIDE DECOUPLING

C267

22U/6.3V_8

C285

0.22U/6.3V_4

C206

0.22U/6.3V_4

C284

22U/6.3V_8

C286

0.01U/16V_4

C226

0.01U/16V_4

C309

0.22U/6.3V_4

C301

180P/50V_4

C205

180P/50V_4

C247

0.22U/6.3V_4

C287

22U/6.3V_8

+VCORE1

+CPUVDDNB

C230

22U/6.3V_8

C264

22U/6.3V_8

C308

22U/6.3V_8

C272

22U/6.3V_8

C231

22U/6.3V_8

C307

22U/6.3V_8

C273

22U/6.3V_8

C279

22U/6.3V_8

22U/6.3V_8

+1.8VSUS

C306

C248
22U/6.3V_8

DECOUPLING BETWEEN PROCESSOR AND DIMMs
PLACE CLOSE TO PROCESSOR AS POSSIBLE

+1.8VSUS

+1.8VSUS

SYS_SHDN# 38,44

3920_RST# 35,44

ECPWROK 16,35

+3V

*0.1U/10V_4

C750

4.7U/6.3V_6

C238

0.22U/6.3V_4

EC13

0.22U/6.3V_4

*0.1U/10V_4

C802

4.7U/6.3V_6

C751

EC14

C236

4.7U/6.3V_6

C752

0.01U/16V_4

+1.8VSUS +3VPCU

+1.8V

+3VPCU

+5V

+VGA_CORE +1.8V

+3V +1.8V+3VS5 +3VS5

EC11

*0.1U/10V_4

2

C120

0.01U/16V_4

EC12

*0.1U/10V_4

C749

4.7U/6.3V_6

0.22U/6.3V_4

C118

180P/50V_4

EC10 0.01U/16V_4

EC5 0.01U/16V_4R148

EC4 0.01U/16V_4

EC7 0.01U/16V_4

EC1 *0.01U/16V_4
EC2 *0.01U/16V_4

EC8 0.01U/16V_4
EC9 0.01U/16V_4

NB5/RD5

C803

Size Document Number Rev
Custom

Date: Sheet

C240

0.22U/6.3V_4

+3VPCU+1.8V

+3V

+3V

+1.8VSUS +5V

+3V

For fix HyperTransport nets
across plane splits

PROJECT : QT8

Quanta Computer Inc.

S1G2 PWR & GND 3/3

C225

0.01U/16V_4

C214

180P/50V_4

+VCORE0 +VCORE1

EC3 0.01U/16V_4

EC6 0.01U/16V_4

1

05

C315

180P/50V_4

C69 0.01U/16V_4
C71 0.01U/16V_4
C67 0.01U/16V_4
C64 0.01U/16V_4

545Tuesday, February 19, 2008

+3VPCU+5V

1A

of

5

+1.8VSUS +1.8VSUS

103

111

104

112

MEM_MA_ADD[0..15]4,7

D D

MEM_MA_BANK[0..2]4,7

MEM_MA_DQS0_P4
MEM_MA_DQS1_P4
MEM_MA_DQS2_P4
MEM_MA_DQS3_P4
MEM_MA_DQS4_P4
MEM_MA_DQS5_P4
MEM_MA_DQS6_P4

MEM_MA_CLK1_P4
MEM_MA_CLK1_N4
MEM_MA_CLK7_P4
MEM_MA_CLK7_N4

MEM_MA_CKE04,7
MEM_MA_CKE14,7

MEM_MA_RAS#4,7
MEM_MA_CAS#4,7
MEM_MA_WE#4,7
MEM_MA0_CS#04,7
MEM_MA0_CS#14,7

MEM_MA0_ODT04,7
MEM_MA0_ODT14,7

PDAT_SMB2,7,13,28,36
PCLK_SMB2,7,13,28,36

MEM_MA_DQS7_P4
MEM_MA_DQS0_N4

MEM_MA_DQS1_N4
MEM_MA_DQS2_N4
MEM_MA_DQS3_N4
MEM_MA_DQS4_N4
MEM_MA_DQS5_N4
MEM_MA_DQS6_N4
MEM_MA_DQS7_N4

+3V

C370

2.2U/6.3V_6

C C

B B

A A

C391

0.1U/10V_4

MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8

MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15

MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2

MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7

DIM1_SA0
DIM1_SA1

PDAT_SMB
PCLK_SMB

C701

0.1U/10V_4

C849

1000P/50V_4

102

A0

101

A1

100

105

116

107
106

130
147
170
185

131
148
169
188

129
146
167
186

164
166

108
113
109
110
115

114
119

198
200

195
197

199

VDD081VDD182VDD287VDD388VDD495VDD596VDD6

A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9
A10

90

A11

89

A12
A13

86

A14

84

A15
BA0

BA1

85

BA2

10

DM0

26

DM1

52

DM2

67

DM3
DM4
DM5
DM6
DM7

13

DQS0

31

DQS1

51

DQS2

70

DQS3
DQS4
DQS5
DQS6
DQS7

11

DQS0

29

DQS1

49

DQS2

68

DQS3
DQS4
DQS5
DQS6
DQS7

30

CK0

32

CK0
CK1
CK1

79

CKE0

80

CKE1
RAS

CAS
WE
S0
S1

ODT0
ODT1

SA0
SA1

SDA
SCL

VDDspd

1

VREF

2

VSS0

3

VSS1

8

VSS2

9

VSS3

12

VSS4

15

VSS5

18

VSS6

21

VSS7

24

VSS8

27

VSS9

28

VSS10

33

VSS11

34

VSS12

39

VSS13

40

VSS14

41

VSS15

42

VSS16

47

VSS17

48

VSS18

53

VSS19

54

VSS20

GND

GND

59

201

202

DDR SO-DIMM SOCKET 1.8V

H=5.2

R40 10K/F_4
R43 10K/F_4

SO-DIMM

117

VDD8

VDD7

VDD9

VDD10

(Normal)

VSS31

VSS30

VSS29

VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21

127

122

121

SMbus address A0

5

118

VDD11

DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

NC/TEST

VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34

VSS33

VSS32

132

128

DIM1_SA0
DIM1_SA1

CN30

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9

NC1
NC2
NC3
NC4

4

MEM_MA_DATA0

5

MEM_MA_DATA1

7

MEM_MA_DATA2

17

MEM_MA_DATA3

19

MEM_MA_DATA4

4

MEM_MA_DATA5

6

MEM_MA_DATA6

14

MEM_MA_DATA7

16

MEM_MA_DATA8

23

MEM_MA_DATA9

25

MEM_MA_DATA10

35

MEM_MA_DATA11

37

MEM_MA_DATA12

20

MEM_MA_DATA13

22

MEM_MA_DATA14

36

MEM_MA_DATA15

38

MEM_MA_DATA16

43

MEM_MA_DATA17

45

MEM_MA_DATA18

55

MEM_MA_DATA19

57

MEM_MA_DATA20

44

MEM_MA_DATA21

46

MEM_MA_DATA22

56

MEM_MA_DATA23

58

MEM_MA_DATA24

61

MEM_MA_DATA25

63

MEM_MA_DATA26

73

MEM_MA_DATA27

75

MEM_MA_DATA28

62

MEM_MA_DATA29

64

MEM_MA_DATA30

74

MEM_MA_DATA31

76

MEM_MA_DATA36

123

MEM_MA_DATA37

125

MEM_MA_DATA35

135

MEM_MA_DATA39

137

MEM_MA_DATA38

124

MEM_MA_DATA32

126

MEM_MA_DATA33

134

MEM_MA_DATA34

136

MEM_MA_DATA40

141

MEM_MA_DATA41

143

MEM_MA_DATA46

151

MEM_MA_DATA47

153

MEM_MA_DATA44

140

MEM_MA_DATA45

142

MEM_MA_DATA42

152

MEM_MA_DATA43

154

MEM_MA_DATA52

157

MEM_MA_DATA49

159

MEM_MA_DATA54

173

MEM_MA_DATA55

175

MEM_MA_DATA53

158

MEM_MA_DATA48

160

MEM_MA_DATA51

174

MEM_MA_DATA50

176

MEM_MA_DATA61

179

MEM_MA_DATA60

181

MEM_MA_DATA63

189

MEM_MA_DATA62

191

MEM_MA_DATA56

180

MEM_MA_DATA57

182

MEM_MA_DATA58

192

MEM_MA_DATA59

194

MEMHOT_SODIMM#_1

50

MEM_MA_RESET#1

69
83
120

MEM_MA_NC5

163

196
193
190
187
184
183
178
177
172
171
168
165
162
161
156
155
150
149
145
144
139
138
133

4

3

MEM_MA_DATA[0..63] 4

R106 0_4

T155

T115

+0.9VSMVREF_DIMM+0.9VSMVREF_DIMM

+0.9VSMVREF_DIMM

+0.9VSMVREF4,41

R139 *0_4

Only for reserved

MEM_MB_ADD[0..15]4,7 MEM_MB_DATA[0..63] 4

MEM_MB_BANK[0..2]4,7

MEM_MB_DM[0..7]4MEM_MA_DM[0..7]4

MEM_MB_DQS0_P4
MEM_MB_DQS1_P4
MEM_MB_DQS2_P4
MEM_MB_DQS3_P4
MEM_MB_DQS4_P4
MEM_MB_DQS5_P4
MEM_MB_DQS6_P4
MEM_MB_DQS7_P4

MEM_MB_DQS0_N4
MEM_MB_DQS1_N4
MEM_MB_DQS2_N4
MEM_MB_DQS3_N4
MEM_MB_DQS4_N4
MEM_MB_DQS5_N4
MEM_MB_DQS6_N4
MEM_MB_DQS7_N4

MEM_MB_CLK1_P4
MEM_MB_CLK1_N4
MEM_MB_CLK7_P4
MEM_MB_CLK7_N4

MEM_MB_CKE04,7
MEM_MB_CKE14,7

MEM_MB_RAS#4,7
MEM_MB_CAS#4,7

MEM_MB_WE#4,7
MEM_MB0_CS#04,7
MEM_MB0_CS#14,7

MEM_MB0_ODT04,7

MEMHOT_SODIMM# 7

C848

2.2U/6.3V_6

+0.9VSMVREF_DIMM

MEM_MB0_ODT14,7

+3V

C406

0.1U/10V_4

+1.8VSUS

R138
2K/F_4

R130
2K/F_4

MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8

MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15

MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2

MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7

DIM2_SA0
DIM2_SA1

PDAT_SMB
PCLK_SMB

C702

0.1U/10V_4

C397
1000P/50V_4

102

A0

101

A1

99
98
97
94
92
93
91

90
89

86
84

85
10

26
52
67

13
31
51
70

11
29
49
68

30
32

79
80

1
2

o

3
8

9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54

A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15

BA0
BA1
BA2

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

CK0
CK0
CK1
CK1

CKE0
CKE1

RAS
CAS
WE
S0
S1

ODT0
ODT1

SA0
SA1

SDA
SCL

VDDspd
VREF
VSS0

VSS1
VSS2

o

VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20

GND

202

201

GND

DIM2_SA0
DIM2_SA1

VDD081VDD182VDD287VDD388VDD495VDD596VDD6

59

100

105

116

107
106

130
147
170
185

131
148
169
188

129
146
167
186

164
166

108
113
109
110
115

114
119

198
200

195
197

199

SMbus address A2

3

2

103

111

104

112

117

118

VDD8

VDD7

VDD9

VDD10

VDD11

NC/TEST

SO-DIMM

(REVERSE)

VSS33

VSS32

VSS31

VSS30

VSS29

VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21

132

128

127

122

121

R423 10K/F_4
R424 10K/F_4

2

CN31

MEM_MB_DATA4

5

DQ0

MEM_MB_DATA5

7

DQ1

MEM_MB_DATA2

17

DQ2

MEM_MB_DATA3

19

DQ3

MEM_MB_DATA0

4

DQ4

MEM_MB_DATA1

6

DQ5

MEM_MB_DATA6

14

DQ6

MEM_MB_DATA7

16

DQ7

MEM_MB_DATA13

23

DQ8

MEM_MB_DATA12

25

DQ9

MEM_MB_DATA11

35

DQ10

MEM_MB_DATA10

37

DQ11

MEM_MB_DATA8

20

DQ12

MEM_MB_DATA9

22

DQ13

MEM_MB_DATA14

36

DQ14

MEM_MB_DATA15

38

DQ15

MEM_MB_DATA16

43

DQ16

MEM_MB_DATA17

45

DQ17

MEM_MB_DATA18

55

DQ18

MEM_MB_DATA19

57

DQ19

MEM_MB_DATA20

44

DQ20

MEM_MB_DATA21

46

DQ21

MEM_MB_DATA22

56

DQ22

MEM_MB_DATA23

58

DQ23

MEM_MB_DATA24

61

DQ24

MEM_MB_DATA25

63

DQ25

MEM_MB_DATA26

73

DQ26

MEM_MB_DATA27

75

DQ27

MEM_MB_DATA28

62

DQ28

MEM_MB_DATA29

64

DQ29

MEM_MB_DATA30

74

DQ30

MEM_MB_DATA31

76

DQ31

MEM_MB_DATA37

123

DQ32

MEM_MB_DATA36

125

DQ33

MEM_MB_DATA34

135

DQ34

MEM_MB_DATA35

137

DQ35

MEM_MB_DATA33

124

DQ36

MEM_MB_DATA32

126

DQ37

MEM_MB_DATA38

134

DQ38

MEM_MB_DATA39

136

DQ39

MEM_MB_DATA40

141

DQ40

MEM_MB_DATA45

143

DQ41

MEM_MB_DATA47

151

DQ42

MEM_MB_DATA46

153

DQ43

MEM_MB_DATA44

140

DQ44

MEM_MB_DATA41

142

DQ45

MEM_MB_DATA43

152

DQ46

MEM_MB_DATA42

154

DQ47

MEM_MB_DATA52

157

DQ48

MEM_MB_DATA53

159

DQ49

MEM_MB_DATA50

173

DQ50

MEM_MB_DATA51

175

DQ51

MEM_MB_DATA48

158

DQ52

MEM_MB_DATA49

160

DQ53

MEM_MB_DATA54

174

DQ54

MEM_MB_DATA55

176

DQ55

MEM_MB_DATA56

179

DQ56

MEM_MB_DATA60

181

DQ57

MEM_MB_DATA58

189

DQ58

MEM_MB_DATA59

191

DQ59

MEM_MB_DATA61

180

DQ60

MEM_MB_DATA57

182

DQ61

MEM_MB_DATA62

192

DQ62

MEM_MB_DATA63

194

DQ63

MEMHOT_SODIMM#_2

50

NC1

MEM_MB_RESET#2

69

NC2

83

NC3

120

NC4

MEM_MB_NC5

163

196

VSS56

193

VSS55

190

VSS54

187

VSS53

184

VSS52

183

VSS51

178

VSS50

177

VSS49

172

VSS48

171

VSS47

168

VSS46

165

VSS45

162

VSS44

161

VSS43

156

VSS42

155

VSS41

150

VSS40

149

VSS39

145

VSS38

144

VSS37

139

VSS36

138

VSS35

133

VSS34

DDR SO-DIMM SOCKET 1.8V

H=9.2

+3V

NB5/RD5

1

07

R105 0_4
T156

T114

Size Document Number Rev
Custom

Date: Sheet

MEMHOT_SODIMM#

PROJECT : QT8

Quanta Computer Inc.

DDR2 SODIMMS: A/B CHANNEL

1

645Tuesday, February 19, 2008

of

1A

5

4

3

2

1

4
2
4
2
2
4
2
4
4
2
4
2
4
2
4
2

4
2
4
2

4
2

2
4

4
2

4
2

MEM_MA_ADD[0..15]
MEM_MA_BANK[0..2]

+0.9VSMVTT

3
1
3
1
1
3
1
3
3
1
3
1
3
1
3
1

3
1
3
1

3
1

1
3

3
1

3
1

C176 0.1U/10V_4
C256 0.1U/10V_4
C223 0.1U/10V_4
C104 0.1U/10V_4
C217 0.1U/10V_4
C96 0.1U/10V_4
C152 0.1U/10V_4
C271 0.1U/10V_4

C162 0.1U/10V_4
C101 0.1U/10V_4
C208 0.1U/10V_4
C102 0.1U/10V_4

C107 0.1U/10V_4
C270 0.1U/10V_4
C146 0.1U/10V_4
C269 0.1U/10V_4

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

MEM_MB_ADD[0..15]4,6
MEM_MB_BANK[0..2]4,6

MEM_MB_CKE04,6

MEM_MB_WE#4,6
MEM_MB_CAS#4,6
MEM_MB0_ODT14,6
MEM_MB0_CS#14,6
MEM_MB_CKE14,6

MEM_MB0_CS#04,6MEM_MA0_CS#04,6
MEM_MB_RAS#4,6

MEM_MB0_ODT04,6

MEM_MB_CKE0
MEM_MB_BANK2
MEM_MB_ADD12
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD5
MEM_MB_ADD3
MEM_MB_ADD1
MEM_MB_ADD10
MEM_MB_BANK0
MEM_MB_WE#
MEM_MB_CAS#
MEM_MB0_ODT1
MEM_MB0_CS#1
MEM_MB_CKE1
MEM_MB_ADD15

MEM_MB_ADD7
MEM_MB_ADD14

MEM_MB_ADD6
MEM_MB_ADD11

MEM_MB_ADD2
MEM_MB_ADD4

MEM_MB_BANK1
MEM_MB_ADD0

MEM_MB0_CS#0
MEM_MB_RAS#MEM_MA_RAS#

MEM_MB0_ODT0
MEM_MB_ADD13

+1.8VSUS

MEM_MA_ADD[0..15]4,6
MEM_MA_BANK[0..2]4,6

MEM_MA_CKE04,6

D D

MEM_MA_WE#4,6
MEM_MA_CAS#4,6
MEM_MA0_ODT14,6
MEM_MA0_CS#14,6

MEM_MA_CKE14,6

C C

MEM_MA_RAS#4,6

MEM_MA0_ODT04,6

MEM_MA_CKE0
MEM_MA_BANK2
MEM_MA_ADD12
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD5
MEM_MA_ADD3
MEM_MA_ADD1
MEM_MA_ADD10
MEM_MA_BANK0
MEM_MA_WE#
MEM_MA_CAS#
MEM_MA0_ODT1
MEM_MA0_CS#1
MEM_MA_ADD15
MEM_MA_CKE1

MEM_MA_ADD7
MEM_MA_ADD14
MEM_MA_ADD6
MEM_MA_ADD11

MEM_MA_ADD2
MEM_MA_ADD4

MEM_MA_BANK1
MEM_MA_ADD0

MEM_MA0_CS#0

MEM_MA_ADD13
MEM_MA0_ODT0

+1.8VSUS

RP40 47_4P2R_4
RP35 47_4P2R_4
RP28 47_4P2R_4
RP26 47_4P2R_4
RP20 47_4P2R_4
RP16 47_4P2R_4
RP10 47_4P2R_4
RP39 47_4P2R_4

RP33 47_4P2R_4
RP29 47_4P2R_4

RP24 47_4P2R_4

RP21 47_4P2R_4

RP14 47_4P2R_4

RP12 47_4P2R_4

PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH

MEM_MB_ADD[0..15]
MEM_MB_BANK[0..2]

+0.9VSMVTT

RP36 47_4P2R_4

4

3

2

RP32 47_4P2R_4
RP27 47_4P2R_4
RP25 47_4P2R_4
RP18 47_4P2R_4
RP15 47_4P2R_4
RP9 47_4P2R_4
RP38 47_4P2R_4

RP34 47_4P2R_4

RP30 47_4P2R_4

RP22 47_4P2R_4

RP19 47_4P2R_4

RP13 47_4P2R_4

RP11 47_4P2R_4

PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH

1

2

1

4

3

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

2

1

4

3

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

2

1

4

3

C193 0.1U/10V_4
C245 0.1U/10V_4
C154 0.1U/10V_4
C100 0.1U/10V_4
C137 0.1U/10V_4
C94 0.1U/10V_4
C190 0.1U/10V_4
C93 0.1U/10V_4
C160 0.1U/10V_4
C254 0.1U/10V_4
C173 0.1U/10V_4
C255 0.1U/10V_4
C126 0.1U/10V_4

C253 0.1U/10V_4
C178 0.1U/10V_4
C105 0.1U/10V_4

08

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

C239

0.1U/10V_4

C121

0.1U/10V_4

C241

0.1U/10V_4

C242

0.1U/10V_4

PLACE CLOSE TO SOCKET( PER EMI/EMC)

B B

+3V

Close DDR2 socket

+VS

O.S

GND

+3V

C706 0.1U/10V_4

8

MEMHOT_SODIMM#

3

4

Address:92h

2

Q33

*2N7002E-G

MEMHOT_SODIMM# 6

U25

7

A0

+3V

PDAT_SMB2,6,13,28,36
PCLK_SMB2,6,13,28,36

A A

PDAT_SMB
PCLK_SMB

+3V

6

A1

5

A2

1

SDA

2

SCL

*DS75U+T&R

R422 10K/F_4

MEMHOT_SODIMM#

C117

0.1U/10V_4

R421
*10K/F_4

R416 *33_4

3

1

C235

0.1U/10V_4

2

Q32

*2N7002E-G

+3VS5

3

1

SI-2 modified --SB internal pull HI to 3vs5

R417
*10K/F_4

CPU_MEMHOT# 3,13

C122

0.1U/10V_4

C119

0.1U/10V_4

C237

0.1U/10V_4

PLACE CLOSE TO SOCKET( PER EMI/EMC)

C115

0.1U/10V_4

C116

0.1U/10V_4

C745

0.1U/10V_4

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

NB5/RD5

5

4

3

2

DDR2 SODIMMS TERMINATIONS

Date: Sheet

1

745Tuesday, February 19, 2008

1A

of

5

HT_CPU_NB_CAD_H0
HT_CPU_NB_CAD_L0
HT_CPU_NB_CAD_H1
HT_CPU_NB_CAD_L1
HT_CPU_NB_CAD_H2
HT_CPU_NB_CAD_L2
HT_CPU_NB_CAD_H3
HT_CPU_NB_CAD_L3
HT_CPU_NB_CAD_H4
HT_CPU_NB_CAD_L4
HT_CPU_NB_CAD_H5
HT_CPU_NB_CAD_L5

R533 301/F_4

BA0
BA1

A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

CK
CK

CKE

CS
WE
RAS
CAS
LDM

UDM

ODT

LDQS
LDQS

UDQS
UDQS

VREF
NC#A2

NC#E2
NC#L1
NC#R3
NC#R7
NC#R8

HT_CPU_NB_CAD_H6
HT_CPU_NB_CAD_L6
HT_CPU_NB_CAD_H7
HT_CPU_NB_CAD_L7

HT_CPU_NB_CAD_H8
HT_CPU_NB_CAD_L8
HT_CPU_NB_CAD_H9
HT_CPU_NB_CAD_L9
HT_CPU_NB_CAD_H10
HT_CPU_NB_CAD_L10
HT_CPU_NB_CAD_H11
HT_CPU_NB_CAD_L11
HT_CPU_NB_CAD_H12
HT_CPU_NB_CAD_L12
HT_CPU_NB_CAD_H13
HT_CPU_NB_CAD_L13
HT_CPU_NB_CAD_H14
HT_CPU_NB_CAD_L14
HT_CPU_NB_CAD_H15
HT_CPU_NB_CAD_L15

HT_CPU_NB_CLK_H0
HT_CPU_NB_CLK_L0
HT_CPU_NB_CLK_H1
HT_CPU_NB_CLK_L1

HT_CPU_NB_CTL_H0
HT_CPU_NB_CTL_L0
HT_CPU_NB_CTL_H1
HT_CPU_NB_CTL_L1

B9

DQ15

B1

DQ14

D9

DQ13

D1

DQ12

D3

DQ11

D7

DQ10

C2

DQ9

C8

DQ8

F9

DQ7

F1

DQ6

H9

DQ5

H1

DQ4

H3

DQ3

H7

DQ2

G2

DQ1

G8

DQ0

A9

VDDQ1

C1

VDDQ2

C3

VDDQ3

C7

VDDQ4

C9

VDDQ5

E9

VDDQ6

G1

VDDQ7

G3

VDDQ8

G7

VDDQ9

G9

VDDQ10

A1

VDD1

E1

VDD2

J9

VDD3

M9

VDD4

R1

VDD5

J1

VDDL

J7

VSSDL

A7

VSSQ1

B2

VSSQ2

B8

VSSQ3

D2

VSSQ4

D8

VSSQ5

E7

VSSQ6

F2

VSSQ7

F8

VSSQ8

H2

VSSQ9

H8

VSSQ10

A3

VSS1

E3

VSS2

J3

VSS3

N1

VSS4

P9

VSS5

D D

SI-2 modified

-- follow AMD

C C

B B

*0.1U/10V_4

A A

*0.1U/10V_4

R56 *100_4

Within 200mils

+1.8V_MEM_VDDQ

C95

C89

check list to
change part
number 300 ohm
to 301 ohm

SPM_BA0
SPM_BA1

SPM_A12
SPM_A10

SPM_A9
SPM_A8
SPM_A7
SPM_A6
SPM_A5
SPM_A4
SPM_A3
SPM_A2 SPM_DQ7
SPM_A1
SPM_A0

SPM_CLKN
SPM_CLKP

SPM_CKE

SPM_CS#
SPM_WE#
SPM_RAS#
SPM_CAS#
SPM_DM0

SPM_DM1

SPM_ODT

SPM_DQS0P
SPM_DQS0N

SPM_DQS1P
SPM_DQS1N

R63

*1K_4

R61

*1K_4

SPM_VREF

SPM_BA2

5

U27

L2
L3

R2

P7

M2

P3
P8

P2
N7
N3
N8
N2
M7
M3
M8

K8

J8

K2

L8

K3

K7

L7

F3

B3

K9

F7

E8

B7

A8

J2

A2

E2

L1
R3
R7
R8

*HYB18T512161B2F-25

HT_RXCALP
HT_RXCALN

SPM_DQ15
SPM_DQ14
SPM_DQ9
SPM_DQ12
SPM_DQ8SPM_A11
SPM_DQ10
SPM_DQ13
SPM_DQ11
SPM_DQ5
SPM_DQ3
SPM_DQ4
SPM_DQ1
SPM_DQ0

SPM_DQ2
SPM_DQ6

MEM_VDDQ_VDDL

4

U32A

Y25

HT_RXCAD0P

Y24

HT_RXCAD0N

V22

HT_RXCAD1P

V23

HT_RXCAD1N

V25

HT_RXCAD2P

V24

HT_RXCAD2N

U24

HT_RXCAD3P

U25

HT_RXCAD3N

T25

HT_RXCAD4P

T24

HT_RXCAD4N

P22

HT_RXCAD5P

P23

HT_RXCAD5N

P25

HT_RXCAD6P

P24

HT_RXCAD6N

N24

HT_RXCAD7P

N25

HT_RXCAD7N

AC24

HT_RXCAD8P

AC25

HT_RXCAD8N

AB25

HT_RXCAD9P

AB24

HT_RXCAD9N

AA24

HT_RXCAD10P

AA25

HT_RXCAD10N

Y22

HT_RXCAD11P

Y23

HT_RXCAD11N

W21

HT_RXCAD12P

W20

HT_RXCAD12N

V21

HT_RXCAD13P

V20

HT_RXCAD13N

U20

HT_RXCAD14P

U21

HT_RXCAD14N

U19

HT_RXCAD15P

U18

HT_RXCAD15N

T22

HT_RXCLK0P

T23

HT_RXCLK0N

AB23

HT_RXCLK1P

AA22

HT_RXCLK1N

M22

HT_RXCTL0P

M23

HT_RXCTL0N

R21

HT_RXCTL1P

R20

HT_RXCTL1N

C23

HT_RXCALP

A24

HT_RXCALN

RS780(RX780)

+1.8V_MEM_VDDQ

L76

*BLM18PG181SN1D(180,1.5A)_6

C757
*1U/10V_4

4

3

HT_NB_CPU_CAD_H0

PART 1 OF 6

HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N

HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P

HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N

HT_TXCLK0P

HT_TXCLK0N

HT_TXCLK1P

HT_TXCLK1N

HYPER TRANSPORT CPU I/F

HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N

HT_TXCALP

HT_TXCALN

D24

HT_NB_CPU_CAD_L0

D25

HT_NB_CPU_CAD_H1

E24

HT_NB_CPU_CAD_L1

E25

HT_NB_CPU_CAD_H2

F24

HT_NB_CPU_CAD_L2

F25

HT_NB_CPU_CAD_H3

F23

HT_NB_CPU_CAD_L3

F22

HT_NB_CPU_CAD_H4

H23

HT_NB_CPU_CAD_L4

H22

HT_NB_CPU_CAD_H5

J25

HT_NB_CPU_CAD_L5

J24

HT_NB_CPU_CAD_H6

K24

HT_NB_CPU_CAD_L6

K25

HT_NB_CPU_CAD_H7

K23

HT_NB_CPU_CAD_L7

K22

HT_NB_CPU_CAD_H8

F21

HT_NB_CPU_CAD_L8

G21

HT_NB_CPU_CAD_H9

G20

HT_NB_CPU_CAD_L9

H21

HT_NB_CPU_CAD_H10

J20

HT_NB_CPU_CAD_L10

J21

HT_NB_CPU_CAD_H11

J18

HT_NB_CPU_CAD_L11

K17

HT_NB_CPU_CAD_H12

L19

HT_NB_CPU_CAD_L12

J19

HT_NB_CPU_CAD_H13

M19

HT_NB_CPU_CAD_L13

L18

HT_NB_CPU_CAD_H14

M21

HT_NB_CPU_CAD_L14

P21

HT_NB_CPU_CAD_H15

P18

HT_NB_CPU_CAD_L15

M18

HT_NB_CPU_CLK_H0

H24

HT_NB_CPU_CLK_L0

H25

HT_NB_CPU_CLK_H1

L21

HT_NB_CPU_CLK_L1

L20

HT_NB_CPU_CTL_H0

M24

HT_NB_CPU_CTL_L0

M25

HT_NB_CPU_CTL_H1

P19

HT_NB_CPU_CTL_L1

R18

HT_TXCALP

B24

HT_TXCALN

B25

R641R655

R534 301/F_4

SI-2 modified

-- follow AMD
check list to
change part
number 300 ohm
to 301 ohm

This block is for UMA RS780 only , RX780 can
remove all component

U32D

T24

R502 *40.2/F_4
R501 *40.2/F_4

+1.8V_MEM_VDDQ

SPM_A0
SPM_A1 SPM_DQ1
SPM_A2
SPM_A3
SPM_A4
SPM_A5
SPM_A6
SPM_A7
SPM_A8
SPM_A9
SPM_A10
SPM_A11
SPM_A12
SPM_A13

SPM_BA0
SPM_BA1
SPM_BA2

SPM_RAS#
SPM_CAS#
SPM_WE#
SPM_CS#
SPM_CKE
SPM_ODT

SPM_CLKP
SPM_CLKN

SPM_COMPP
SPM_COMPN

3

AB12
AE16

AE15
AA12
AB16
AB14
AD14
AD13
AD15
AC16
AE13
AC14

AD16
AE17
AD17

W12

AD18
AB13
AB18

W14

AE12
AD12

V11

Y14

Y12

V14
V15

MEM_A0(NC)
MEM_A1(NC)
MEM_A2(NC)
MEM_A3(NC)
MEM_A4(NC)
MEM_A5(NC)
MEM_A6(NC)
MEM_A7(NC)
MEM_A8(NC)
MEM_A9(NC)
MEM_A10(NC)
MEM_A11(NC)
MEM_A12(NC)
MEM_A13(NC)

MEM_BA0(NC)
MEM_BA1(NC)
MEM_BA2(NC)

MEM_RASb(NC)
MEM_CASb(NC)
MEM_WEb(NC)
MEM_CSb(NC)
MEM_CKE(NC)
MEM_ODT(NC)

MEM_CKP(NC)
MEM_CKN(NC)

MEM_COMPP(NC)
MEM_COMPN(NC)

RS780(RX780)

HT_CPU_NB_CAD_H[15..0]
HT_CPU_NB_CAD_L[15..0]
HT_CPU_NB_CLK_H[1..0]
HT_CPU_NB_CLK_L[1..0]
HT_CPU_NB_CTL_H[1..0]
HT_CPU_NB_CTL_L[1..0]
HT_NB_CPU_CAD_H[15..0]
HT_NB_CPU_CAD_L[15..0]
HT_NB_CPU_CLK_H[1..0]
HT_NB_CPU_CLK_L[1..0]
HT_NB_CPU_CTL_H[1..0]
HT_NB_CPU_CTL_L[1..0]

signals

HT_TXCALP

HT_TXCALN

HT_RXCALP

HT_RXCALN

PAR 4 OF 6

MEM_DQ0/DVO_VSYNC(NC)
MEM_DQ1/DVO_HSYNC(NC)

MEM_DQ2/DVO_DE(NC)
MEM_DQ3/DVO_D0(NC)

MEM_DQ4(NC)
MEM_DQ5/DVO_D1(NC)
MEM_DQ6/DVO_D2(NC)
MEM_DQ7/DVO_D4(NC)
MEM_DQ8/DVO_D3(NC)
MEM_DQ9/DVO_D5(NC)

MEM_DQ10/DVO_D6(NC)
MEM_DQ11/DVO_D7(NC)

MEM_DQ12(NC)

MEM_DQ13/DVO_D9(NC)
MEM_DQ14/DVO_D10(NC)
MEM_DQ15/DVO_D11(NC)

MEM_DQS0P/DVO_IDCKP(NC)
MEM_DQS0N/DVO_IDCKN(NC)

MEM_DQS1P(NC)
MEM_DQS1N(NC)

MEM_DM0(NC)

MEM_DM1/DVO_D8(NC)

SBD_MEM/DVO_I/F

IOPLLVDD18(NC)

IOPLLVDD(NC)
IOPLLVSS(NC)

MEM_VREF(NC)

2

HT_CPU_NB_CAD_H[15..0] 3

HT_CPU_NB_CAD_L[15..0] 3

HT_CPU_NB_CLK_H[1..0] 3

HT_CPU_NB_CLK_L[1..0] 3

HT_CPU_NB_CTL_H[1..0] 3

HT_CPU_NB_CTL_L[1..0] 3

HT_NB_CPU_CAD_H[15..0] 3

HT_NB_CPU_CAD_L[15..0] 3

HT_NB_CPU_CLK_H[1..0] 3

HT_NB_CPU_CLK_L[1..0] 3

HT_NB_CPU_CTL_H[1..0] 3

HT_NB_CPU_CTL_L[1..0] 3

RS780 RX780

R641
301 ohm 1%

R655
301 ohm 1%

R641

1.21k ohm 1%

R655

1.21k ohm 1%

40mils wdith or more

SPM_DQ0

AA18
AA20

SPM_DQ2

AA19

SPM_DQ3

Y19

SPM_DQ4

V17

SPM_DQ5

AA17

SPM_DQ6

AA15

SPM_DQ7

Y15

SPM_DQ8

AC20

SPM_DQ9

AD19

SPM_DQ10

AE22

SPM_DQ11

AC18

SPM_DQ12

AB20

SPM_DQ13

AD22

SPM_DQ14

AC22

SPM_DQ15

AD21

SPM_DQS0P

Y17

SPM_DQS0N

W18

SPM_DQS1P

AD20

SPM_DQS1N

AE21

SPM_DM0

W17

SPM_DM1

AE19

+1.8_IOPLLVDD18_NB

AE23

+1.1V_IOPLLVDD

AE24
AD23

SPM_VREF1

AE18

R498 *1K_4

C775 *0.1U/10V_4 C774 *0.1U/10V_4

2

C762

*2.2U/6.3V_6

R497 *1K_4

NB5/RD5

C70
*1U/10V_4

C87
*0.1U/10V_4

1

08

RES CHIP 1.21K 1/16W +-1%(0402)
P/N : CS21212FB18

RES CHIP 301 1/16W +-1%(0402)
P/N : CS13012FB14

+1.8V_MEM_VDDQ

R487 *0_6

C738
*10U/6.3V_8

C77
*0.1U/10V_4

IOPLLVDD18 - memory PLL
not applicable to RX780

C763
*2.2U/6.3V_6

C76
*10U/6.3V_8

C74
*1U/10V_4

IOPLLVDD- memory PLL
not applicable to RX780

+1.8V_MEM_VDDQ

Del L77, L78
for TP on PV

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

RS740/RS780-HT LINK I/F 1/5

Date: Sheet

1

+1.8V

of

845Tuesday, February 19, 2008

1A

5

AE3
AD4
AE2
AD3
AD1
AD2

AA8
AA7
AA5

AA6

D4
C4
A3
B3
C2
C1
E5

F5
G5
G6

H5

H6

L5

L6
M8

L8

P7
M7

P5
M5

R8

P8

R6

R5

P4

P3

T4

T3

V5
W6

U5

U6

U8

U7

Y8

Y7

W5

Y5

J6
J5
J7
J8

U32B

GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N

GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
GPP_RX4P
GPP_RX4N
GPP_RX5P
GPP_RX5N

SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N

PART 2 OF 6

PCIE I/F GFX

PCIE I/F GPP

PCIE I/F SB

PCE_CALRP(PCE_BCALRP)

PCE_CALRN(PCE_BCALRN)

PEG_RX15
PEG_RX#15
PEG_RX14
PEG_RX#14
PEG_RX13
PEG_RX#13
PEG_RX12
PEG_RX#12
PEG_RX11
PEG_RX#11
PEG_RX10

D D

PCIE_RXP6_LAN31

C C

PCIE_SB_NB_RX0P12
PCIE_SB_NB_RX0N12
PCIE_SB_NB_RX1P12
PCIE_SB_NB_RX1N12
PCIE_SB_NB_RX2P12
PCIE_SB_NB_RX2N12
PCIE_SB_NB_RX3P12
PCIE_SB_NB_RX3N12

PEG_RX#10
PEG_RX9
PEG_RX#9
PEG_RX8
PEG_RX#8
PEG_RX7
PEG_RX#7
PEG_RX6
PEG_RX#6
PEG_RX5
PEG_RX#5
PEG_RX4
PEG_RX#4
PEG_RX3
PEG_RX#3
PEG_RX2
PEG_RX#2
PEG_RX1
PEG_RX#1
PEG_RX0
PEG_RX#0

PCIE_RXP033
PCIE_RXN033
PCIE_RXP136
PCIE_RXN136

PCIE_RXP336
PCIE_RXN336

PCIE_RXP526 PCIE_TXP5 26
PCIE_RXN526

PCIE_RXP0
PCIE_RXN0
PCIE_RXP1
PCIE_RXN1
PCIE_RXP6_LAN
PCIE_RXN6_LAN PCIE_TXN6_C
PCIE_RXP3
PCIE_RXN3
PCIE_RXP4

T223

PCIE_RXN4

T225

PCIE_RXP5

4

GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P

GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N

GPP_TX0P

GPP_TX0N

GPP_TX1P

GPP_TX1N

GPP_TX2P

GPP_TX2N

GPP_TX3P

GPP_TX3N

GPP_TX4P

GPP_TX4N

GPP_TX5P

GPP_TX5N

SB_TX0P

SB_TX0N

SB_TX1P

SB_TX1N

SB_TX2P

SB_TX2N

SB_TX3P

SB_TX3N

A5
B5
A4
B4
C3
B2
D1
D2
E2
E1
F4
F3
F1
F2
H4
H3
H1
H2
J2
J1
K4
K3
K1
K2
M4
M3
M1
M2
N2
N1
P1
P2

AC1
AC2
AB4
AB3
AA2
AA1
Y1
Y2
Y4
Y3
V1
V2

AD7
AE7
AE6
AD6
AB6
AC6
AD5
AE5

AC8
AB8

C_PEG_TX15
C_PEG_TX#15
C_PEG_TX14
C_PEG_TX#14
C_PEG_TX13
C_PEG_TX#13
C_PEG_TX12
C_PEG_TX#12
C_PEG_TX11
C_PEG_TX#11
C_PEG_TX10
C_PEG_TX#10
C_PEG_TX9
C_PEG_TX#9
C_PEG_TX8
C_PEG_TX#8
C_PEG_TX7
C_PEG_TX#7
C_PEG_TX6
C_PEG_TX#6
C_PEG_TX5
C_PEG_TX#5
C_PEG_TX4
C_PEG_TX#4

C_PEG_TX#3
C_PEG_TX2
C_PEG_TX#2
C_PEG_TX1

C_PEG_TX0
C_PEG_TX#0

PCIE_TXP0_C
PCIE_TXN0_C
PCIE_TXP1_C
PCIE_TXN1_C
PCIE_TXP6_C

PCIE_TXP3_C
PCIE_TXN3_C
PCIE_TXP4_C
PCIE_TXN4_C
PCIE_TXP5_C
PCIE_TXN5_CPCIE_RXN5

A_TX0P_CA_TX0P_C
A_TX0N_CA_TX0N_C
A_TX1P_CA_TX1P_C
A_TX1N_CA_TX1N_C
A_TX2P_C
A_TX2N_C
A_TX3P_C
A_TX3N_C

NB_PCIECALRP
NB_PCIECALRN

C360 0.1U/10V_4
C359 0.1U/10V_4
C362 0.1U/10V_4
C361 0.1U/10V_4
C343 0.1U/10V_4
C354 0.1U/10V_4
C351 0.1U/10V_4
C350 0.1U/10V_4
C814 0.1U/10V_4
C815 0.1U/10V_4
C810 0.1U/10V_4
C809 0.1U/10V_4
C811 0.1U/10V_4
C813 0.1U/10V_4
C806 0.1U/10V_4
C805 0.1U/10V_4
C804 0.1U/10V_4
C800 0.1U/10V_4
C798 0.1U/10V_4
C801 0.1U/10V_4
C791 0.1U/10V_4
C795 0.1U/10V_4
C792 0.1U/10V_4
C796 0.1U/10V_4
C788 0.1U/10V_4
C785 0.1U/10V_4
C787 0.1U/10V_4
C784 0.1U/10V_4
C778 0.1U/10V_4
C783 0.1U/10V_4
C771 0.1U/10V_4
C777 0.1U/10V_4

C158 0.1U/10V_4
C159 0.1U/10V_4
C131 0.1U/10V_4
C130 0.1U/10V_4
C149 0.1U/10V_4
C148 0.1U/10V_4
C772 0.1U/10V_4
C773 0.1U/10V_4

T224
T226

C139 0.1U/10V_4
C140 0.1U/10V_4

C766 0.1U/10V_4
C767 0.1U/10V_4
C765 0.1U/10V_4
C764 0.1U/10V_4
C150 0.1U/10V_4
C151 0.1U/10V_4
C754 0.1U/10V_4
C755 0.1U/10V_4

R491 1.27K/F_4
R489 2K/F_4

PEG_TX15
PEG_TX#15
PEG_TX14
PEG_TX#14
PEG_TX13
PEG_TX#13
PEG_TX12
PEG_TX#12
PEG_TX11
PEG_TX#11
PEG_TX10
PEG_TX#10
PEG_TX9
PEG_TX#9
PEG_TX8
PEG_TX#8
PEG_TX7
PEG_TX#7
PEG_TX6
PEG_TX#6
PEG_TX5
PEG_TX#5
PEG_TX4
PEG_TX#4
PEG_TX3C_PEG_TX3
PEG_TX#3
PEG_TX2
PEG_TX#2
PEG_TX1
PEG_TX#1C_PEG_TX#1
PEG_TX0
PEG_TX#0

PCIE_TXP0 33
PCIE_TXN0 33
PCIE_TXP1 36
PCIE_TXN1 36

PCIE_TXP6_LAN 31

PCIE_TXN6_LAN 31PCIE_RXN6_LAN31

PCIE_TXP3 36
PCIE_TXN3 36

PCIE_TXN5 26

PCIE_NB_SB_TX0P 12
PCIE_NB_SB_TX0N 12
PCIE_NB_SB_TX1P 12
PCIE_NB_SB_TX1N 12
PCIE_NB_SB_TX2P 12
PCIE_NB_SB_TX2N 12
PCIE_NB_SB_TX3P 12
PCIE_NB_SB_TX3N 12

3

+1.1V

PEG_RX#[15:0]17

PEG_RX[15:0]17

PEG_RX#[15:0] PEG_TX#[15:0]

Close to North Bridge

C_PEG_TX15
C_PEG_TX#15

C_PEG_TX14
C_PEG_TX#14

C_PEG_TX13
C_PEG_TX#13

C_PEG_TX12
C_PEG_TX#12

To HDMI CONN

TO EPRESS CARD

TO WLAN

TO PCIE-LAN

TO TV TUNNER

TO PCIE CARD READER

2

C_PEG_TX15 23
C_PEG_TX#15 23

C_PEG_TX14 23
C_PEG_TX#14 23

C_PEG_TX13 23
C_PEG_TX#13 23

C_PEG_TX12 23
C_PEG_TX#12 23

1

PEG_TX[15:0]PEG_RX[15:0]

PEG_TX#[15:0] 17
PEG_TX[15:0] 17

9

RS780(RX780)

RX780/RS740/RS780 difference table (PCIE LINK)

RS740 RX780/RS780

NB_PCIECALRP

GPP4

B B

A A

GPP5

562R (GND)

NC

NC

1.27K (GND)

GPP4

GPP5

RS780 Display Port Support (muxed on GFX)

DP0

DP1

GFX_TX0,TX1,TX2 and TX3
AUX0 and HPD0

GFX_TX4,TX5,TX6 and TX7
AUX1 and HPD1

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

5

4

3

2

NB5/RD5

RS740/RS780-PCIE I/F 2/5

Date: Sheet

1

945Tuesday, February 19, 2008

1A

of

5

RX780: Powered from the 1.8-V rail
and driven by SB600 LDT_RST#, or
SB700 LDT_RST# or A_RST#.
RS780: Powered from the 3.3-V rail
and driven by SB600 LDT_RST#, or
SB700 LDT_RST# or A_RST#.

RX780

CPU_LDT_RST#3,12

RS780

D D

C C

selects Loading of straps from
EPROM
1 : use default vaule , default
0 : I2C Master can load strap
values from EEPROM
if connected, or use default
values if not connected
RX780 --RS780_AUX_CAL
RS780 -- SUS_ATAT

Enables Debug Bus acess

B B

through memory T/O pads and GPIO.
0 : Enable RS780 , Default
1 : Disable RS780
(RS780 use VSYNC#)

Indicates if memory Side port
is available or not
0: available RS780 , Default
1: Not available RS780
( RS780 use HSYNC#)

NB_PLTRST#12

R157 *0_4

R160 0_4

North Bridge RESET

+3V

RS780 only

For extrnal EEPROM Debug only

STRP_DATA

A A

Enables Debug Bus acess
through memory T/O pads and GPIO.
1 : Enable RX780 , Default
0 : Disable RX780

NB_RST#_IN

R536 4.7K_4
R539 4.7K_4
R538 4.7K_4

RS780_AUX_CAL

VSYNC_COM

HSYNC_COM

S-CD1

Del NBGPP CLK

HDTV_DET
NB_I2C_DATA
NB_I2C_CLK

R543 3K_4

R124 3K_4

R129 3K_4
R136 *3K_4

RS780/RX780

R548 10K/F_4

R558 *10K/F_4

R810 *3K_4

HDMI_DDC_DATA23
HDMI_DDC_CLK23

RX780

RS780

RS780

RX780

+VDDG_NB

Reserved only

5

4

+3V_AVDD_NB
+1.8V_AVDDDI_NB
+1.8V_AVDDQ_NB

R117 0_4

+3V_AVDD_NB

20mils width

20mils width

S-CD1

CRT_R_1
CRT_G_1
CRT_B_1

HSYNC_INTHSYNC_INT
VSYNC_INTVSYNC_INT
DDCDATA_INTDDCDATA_INT
DDCCLK_INTDDCCLK_INT

DAC_RSET_NBDAC_RSET_NB
+1.1V_PLLVDD

+1.8V_PLLVDD18

+1.8V_VDDA18HTPLL
+1.8V_VDDA18PCIEPLL

NB_RST#_IN
NB_PWRGD_IN
NB_LDT_STOP#
NB_ALLOW_LDTSTOP

NBHT_REFCLKP
NBHT_REFCLKN

NBGFX_CLKP
NBGFX_CLKN

NBGPP_CLKP
NBGPP_CLKN

SBLINK_CLKP
SBLINK_CLKN

T161
T158

R27 0_4

T164

C340

2.2U/6.3V_6

+1.8V_PLLVDD18

C333

2.2U/6.3V_6

C358

2.2U/6.3V_6

C356

2.2U/6.3V_6

NB_I2C_DATANB_I2C_DATA
NB_I2C_CLKNB_I2C_CLK
HDTV_DET
RS740_DFT_GPIO0
RS740_DFT_GPIO1

R109 for UAM use 140 ohm

CRT_R18,24
CRT_G18,24
CRT_B18,24

HSYNC_COM18,19,24
VSYNC_COM18,19,24

DDCDATA18,24
DDCCLK18,24

NB_PWRGD_IN16

NBHT_REFCLKP2

NBHT_REFCLKN2

EXT_NB_OSC2

+1.1V

NBGFX_CLKP2
NBGFX_CLKN2

T168
T169

SBLINK_CLKP2

SBLINK_CLKN2

EDIDDATA18,23
EDIDCLK18,23

AVDD-DAC Analog
not applicable to RX780

+3V

PLLVDD18 - Graphics PLL
not applicable to RX780

+3V

R446 *0_4
R109 *150/F_4
R445 *0_4
R110 *150/F_4
R444 *0_4
R111 *150/F_4

R549 *0_4
R540 *0_4
R133 *0_4
R134 *0_4

R119 *715/F_6

R125

RS780

4.7K_4

R547 *0_4
R546 *0_4
R537 *0_4
R544 *0_4

RX780 -->NC / RS780 --- ADD

+3V

BLM18PG181SN1D(180,1.5A)_6

+1.8V

BLM18PG181SN1D(180,1.5A)_6

C405
10U/6.3V_8

+1.8V

VDDA18PCIEPLL -PCIE PLL

BLM18PG181SN1D(180,1.5A)_6

R120

RS780

4.7K_4

DYN_PWR_EN39

L35

L33

L32

+1.8V_VDDA18PCIEPLL

VDDA18HTPLL -HT LINK PLL

L31

BLM18PG181SN1D(180,1.5A)_6

4

+1.8V_VDDA18HTPLL

3

NB_REFCLK_P
NB_REFCLK_N

STRP_DATA

RS780_AUX_CAL

BLM18PG181SN1D(180,1.5A)_6

+1.1V

L82

+1.8V

R107 0_6

BLM18PG181SN1D(180,1.5A)_6

L34

CPU_LDT_STOP#3,12

CPU_LDT_REQ#3

ALLOW_LDTSTOP12

3

U32C

F12

AVDD1(NC)

E12

AVDD2(NC)

F14

AVDDDI(NC)

G15

AVSSDI(NC)

H15

AVDDQ(NC)

H14

AVSSQ(NC)

E17

C_Pr(DFT_GPIO5)

F17

Y(DFT_GPIO2)

F15

COMP_Pb(DFT_GPIO4)

G18

RED(DFT_GPIO0)

G17

REDb(NC)

E18

GREEN(DFT_GPIO1)

F18

GREENb(NC)

E19

BLUE(DFT_GPIO3)

F19

BLUEb(NC)

A11

DAC_HSYNC(PWM_GPIO4)

B11

DAC_VSYNC(PWM_GPIO6)

E8

DAC_SDA(PCE_TCALRN)

F8

DAC_SCL(PCE_RCALRN)

G14

DAC_RSET(PWM_GPIO1)

A12

PLLVDD(NC)

D14

PLLVDD18(NC)

B12

PLLVSS(NC)

H17

VDDA18HTPLL

D7

VDDA18PCIEPLL1

E7

VDDA18PCIEPLL2

D8

SYSRESETb

A10

POWERGOOD

C10

LDTSTOPb

C12

ALLOW_LDTSTOP

C25

HT_REFCLKP

C24
E11

F11

T2
T1

U1
U2

V4
V3

A9
B9
B8
A8
B7

A7
B10
G11

C8

I

HT_REFCLKN
REFCLK_P/OSCIN(OSCIN)

REFCLK_N(PWM_GPIO3)
GFX_REFCLKP

GFX_REFCLKN
GPP_REFCLKP

GPP_REFCLKN
GPPSB_REFCLKP(SB_REFCLKP)

GPPSB_REFCLKN(SB_REFCLKN)
I2C_DATA

I2C_CLK
DDC_DATA/AUX0N(NC)
DDC_CLK/AUX0P(NC)
AUX1P(NC)
AUX1N(NC)

STRP_DATA
RSVD
AUX_CAL(NC)

RS780(RX780)

+1.1V_PLLVDD

+1.8V_AVDDDI_NB

C321

2.2U/6.3V_6

+1.8V_AVDDQ_NB

C349

2.2U/6.3V_6

R568 0_4

PART 3 OF 6

I

I/O

I/O

C842

2.2U/6.3V_6

RS780

Q37
BSS138_NL/SOT23

1

R555 *0_4

RS780

Q38

BSS138_NL/SOT23

1

TXOUT_L0P(NC)
TXOUT_L0N(NC)
TXOUT_L1P(NC)
TXOUT_L1N(NC)
TXOUT_L2P(NC)

TXOUT_L2N(DBG_GPIO0)

TXOUT_L3P(NC)

TXOUT_L3N(DBG_GPIO2)

TXOUT_U0P(NC)

TXOUT_U1P(PCIE_RESET_GPIO3)
TXOUT_U1N(PCIE_RESET_GPIO2)

TXOUT_U3P(PCIE_RESET_GPIO5)

CRT/TVOUT

PM

TXOUT_U0N(NC)

TXOUT_U2P(NC)
TXOUT_U2N(NC)

TXOUT_U3N(NC)

TXCLK_LP(DBG_GPIO1)

TXCLK_LN(DBG_GPIO3)
TXCLK_UP(PCIE_RESET_GPIO4)
TXCLK_UN(PCIE_RESET_GPIO1)

VDDLTP18(NC)
VSSLTP18(NC)

VDDLT18_1(NC)
VDDLT18_2(NC)
VDDLT33_1(NC)

LVTM

VDDLT33_2(NC)

VSSLT1(VSS)
VSSLT2(VSS)
VSSLT3(VSS)
VSSLT4(VSS)
VSSLT5(VSS)
VSSLT6(VSS)
VSSLT7(VSS)

LVDS_DIGON(PCE_TCALRP)

LVDS_BLON(PCE_RCALRP)

LVDS_ENA_BL(PWM_GPIO2)

CLOCKs PLL PWR

TVCLKIN(PWM_GPIO5)

2

3

2

3

TMDS_HPD(NC)

HPD(NC)

THERMALDIODE_P

THERMALDIODE_N

TESTMODE

R556

4.7K_4

+VDDG_NB

RS780

R557

4.7K_4

NB_ALLOW_LDTSTOP

MIS.

PLLVDD - Graphics PLL
not applicable to
RX780

AVDDI-DAC Digital
not applicable to RX780

AVDDQ-DAC Bandgap Reference
not applicable to RX780

+1.8V +VDDG_NB

RX780

+1.8V

R564 *0_4

RX780

2

A22
B22
A21
B21
B20
A20
A19
B19

B18
A18
A17
B17
D20
D21
D18
D19

B16
A16
D16
D17

A13
B13

A15
B15
A14
B14

C14
D15
C16
C18
C20
E20
C22

E9
F7
G12

D9
D10

D12
AE8

AD8
D13

+1.8V

RS780

NB_LDT_STOP#

2

LA_DATAP0
LA_DATAN0
LA_DATAP1
LA_DATAN1
LA_DATAP2
LA_DATAN2
LA_DATAP3
LA_DATAN3

LB_DATAP0
LB_DATAN0
LB_DATAP1
LB_DATAN1
LB_DATAP2
LB_DATAN2
LB_DATAP3
LB_DATAN3

LA_CLK
LA_CLK#
LB_CLK
LB_CLK#

+1.8V_VDDLTP18_NB

+1.8V_VDDLT_18_NB

+3V_VDLT33_NB

RS780 only

R132 *0_4
R126 *0_4
R118 *0_4

R121 *1.27K/F_4
R127 *1.27K/F_4

TMDS_HPD0
TMDS_HPD1

SUS_STAT#_NB
R_NB_THRMDA

R_NB_THRMDC

TEST_EN

L83

L85

R131 0_4

R541

1.82K/F_4

BLM18PG181SN1D(180,1.5A)_6

2.2U/6.3V_6

BLM21PG221SN1D(220,100M,2A)_8

4.7U/6.3V_6

LA_DATAP0 23
LA_DATAN0 23
LA_DATAP1 23
LA_DATAN1 23
LA_DATAP2 23

LA_DATAN2 23

T159
T157

LB_DATAP0 23

LB_DATAN0 23

LB_DATAP1 23

LB_DATAN1 23

LB_DATAP2 23

LB_DATAN2 23

T163
T160

LA_CLK 23

LA_CLK# 23

LB_CLK 23

LB_CLK# 23

DISP_ON
LVDS_BLON
DPST_PWM

For RX780 only

R545
*0_4

T162

T136
T135

C841

C846

+1.8V_VDDLTP18_NB

C838

0.1U/10V_4

RX780

+1.8V +VDDG_NB

+3V

RS780

+3V

*BLM21PG221SN1D(220,100M,2A)_8

VDDLT33 - LVDS or DVI/HDMI ANALOG
RS740 only

NB5/RD5

UMA only

TMDS_HPD 18,23

SUS_STAT# 13

VDDLTP18 - LVDS or DVI/HDMI PLL
not applicable to RX780

+1.8V_VDDLT_18_NB

VDDLT18 - LVDS or
DVI/HDMI digital
not applicable to
RX780

R566 *0_6

R565 0_6

L84

+3V_VDLT33_NB

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

RS740/RS780-SYSTEM I/F 3/5

Date: Sheet

1

DISP_ON 19,23
LVDS_BLON 18,23
DPST_PWM 19,23

C844

*2.2U/6.3V_6

1

10

10 45Tuesday, February 19, 2008

of

1A

5

4

3

2

1

B1

E4

G2

H7

J4

R7

L1

L2

L4

L7

M6

N4

P6

R1

R2

R4

V7

U4

V8

V6

W1

W2

W4

W7

W8

Y6

AA4

AB5

AB1

AB7

AC3

AC4

VSSAPCIE32

VSSAPCIE33

VSSAPCIE34

VSSAPCIE35

AE1

VSSAPCIE36

VSSAPCIE37

U32F

VSSAPCIE1A2VSSAPCIE2

VSSAPCIE3D3VSSAPCIE4D5VSSAPCIE5

VSSAPCIE6G1VSSAPCIE7

VSSAPCIE8G4VSSAPCIE9

VSSAPCIE10

VSSAPCIE11

VSSAPCIE12

VSSAPCIE13

VSSAPCIE14

VSSAPCIE15

VSSAPCIE16

VSSAPCIE17

VSSAPCIE18

VSSAPCIE19

VSSAPCIE20

VSSAPCIE21

VSSAPCIE22

VSSAPCIE23

VSSAPCIE24

VSSAPCIE25

VSSAPCIE26

VSSAPCIE27

VSSAPCIE28

VSSAPCIE29

VSSAPCIE30

D D

VSSAPCIE31

GROUND

AE4

AB2

VSSAPCIE38

VSSAPCIE39

VSSAPCIE40

AE14

VSS1

D11

VSS2

E14

E15

VSS3G8VSS4

VSS5

J15

J12

VSS6

K14

VSS7

VSS8

M11

VSS9

L15

VSS10

PIN NAME
VDDHT
VDDHTRX
VDDHTTX
VDDA18PCIE

PART 6/6

VDD18_MEM

VSSAHT1

VSSAHT2

VSSAHT3

VSSAHT4

VSSAHT5

VSSAHT6

VSSAHT7

VSSAHT8

VSSAHT9

VSSAHT10

VSSAHT11

VSSAHT12

VSSAHT13

VSSAHT14

VSSAHT15

VSSAHT16

VSSAHT17

VSSAHT18

VSSAHT19

VSSAHT21

VSSAHT22

VSSAHT23

VSSAHT24

VSSAHT25

VSSAHT26

VSSAHT27

VSS11

VSS12

VSS13

VSS14

VSS15

VSS16

VSS17

VSS18

VSS19

VSS20

VSS21

VSS22

VSS23

VSS24

VSS25

VSS26

VSS27

VSS28

VSS29

VSS30

VSS31

VSS32

AB15

AB17

VSS33

K11

AB19

AE20

AB21

C280

0.1U/10V_4

C839

0.1U/10V_4

C199

0.1U/10V_4

C234

0.1U/10V_4

VSS34

U32E

J17

VDDHT_1

K16

VDDHT_2

L16

VDDHT_3

M16

VDDHT_4

P16

VDDHT_5

R16

VDDHT_6

T16

VDDHT_7

H18

VDDHTRX_1

G19

VDDHTRX_2

F20

VDDHTRX_3

E21

VDDHTRX_4

D22

VDDHTRX_5

B23

VDDHTRX_6

A23

VDDHTRX_7

AE25

VDDHTTX_1

AD24

VDDHTTX_2

AC23

VDDHTTX_3

AB22

VDDHTTX_4

AA21

VDDHTTX_5

Y20

VDDHTTX_6

W19

VDDHTTX_7

V18

VDDHTTX_8

U17

VDDHTTX_9

T17

VDDHTTX_10

R17

VDDHTTX_11

P17

VDDHTTX_12

M17

VDDHTTX_13

J10

VDDA18PCIE_1

P10

VDDA18PCIE_2

K10

VDDA18PCIE_3

M10

VDDA18PCIE_4

L10

VDDA18PCIE_5

W9

VDDA18PCIE_6

H9

VDDA18PCIE_7

T10

VDDA18PCIE_8

R10

VDDA18PCIE_9

Y9

VDDA18PCIE_10

AA9

VDDA18PCIE_11

AB9

VDDA18PCIE_12

AD9

VDDA18PCIE_13

AE9

VDDA18PCIE_14

U10

VDDA18PCIE_15

F9

VDDG18_1(VDD18_1)

G9

VDDG18_2(VDD18_2)

AE11

VDD18_MEM1(NC)

AD11

VDD18_MEM2(NC)

RS780(RX780)

PART 5/6

VSSAHT20

J22

L17

L22

L24

A25

E22

D23

G22

G24

C C

+1.35V for
A1-1 chip
bug , A1-2
can remove

B B

VDDA18PCIE ­PCIE TX stage
I/O for
RX780/RS780

A A

VDDHT - HT
LINK digital
I/O for
RX780/RS780

VDDHTRX - HT
LINK RX I/O for
RX780/RS780

L12

+1.2V

BLM21PG221SN1D(220,100M,2A)_8

+1.35V

L13

*BLM21PG221SN1D(220,100M,2A)_8

VDDHTTX - HT
LINK TX I/O for
RX780/RS780

+1.8V 1A for RS780M+SB700

+1.8V

BLM21PG221SN1D(220,100M,2A)_8

L25

H19

G25

L22

VDD18 - RS780 I/O
transform

P20

N22

R19

R22

R24

R25

M20

+1.1V

H20

+1.1V 2A for RS780M

0.6A

L72
BLM21PG221SN1D(220,100M,2A)_8

0.45A

L81
BLM21PG221SN1D(220,100M,2A)_8

0.5A

+1.2V 2A for RS780M+SB700

C124

4.7U/6.3V_6

600mA

C188

4.7U/6.3V_6

VDD18_MEM For UMA RS780 only
Not applicable to RX780
memory I/O transform

+1.8V

U22

+1.8V

V19

W22

W24

W25

C175

4.7U/6.3V_6

L12

Y21

N13

M14

AD25

C770

4.7U/6.3V_6

C847

4.7U/6.3V_6

C195

0.1U/10V_4

C258

0.1U/10V_4

R122 0_6

R499 0_6

P12

P15

T12

R11

R14

U14

C274

0.1U/10V_4

C323

0.1U/10V_4

C194

0.1U/10V_4

C209

0.1U/10V_4

0.005A

C317
1U/10V_4

0.005A

V12

U11

U15

C769
1U/10V_4

Y18

W11

W15

AA14

AC12

+1.1V_VDDHT

C313

0.1U/10V_4

+1.1V_VDDHTRX

C843

0.1U/10V_4

+1.2V_VDDHTTX

C249

0.1U/10V_4

+1.8V_VDDA18PCIE

C302

0.1U/10V_4

+1.8V_VDDG18_NB

+1.8V_VDD18_MEM

AB11

VDDPCIE
VDDC
VDD_MEM
VDDG33
IOPLLVDD18

VDDPCIE_1
VDDPCIE_2
VDDPCIE_3
VDDPCIE_4
VDDPCIE_5
VDDPCIE_6
VDDPCIE_7
VDDPCIE_8

VDDPCIE_9
VDDPCIE_10
VDDPCIE_11
VDDPCIE_12
VDDPCIE_13
VDDPCIE_14
VDDPCIE_15
VDDPCIE_16
VDDPCIE_17

VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8

VDDC_9
VDDC_10
VDDC_11

POWER

VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22

VDD_MEM1(NC)
VDD_MEM2(NC)
VDD_MEM3(NC)
VDD_MEM4(NC)
VDD_MEM5(NC)
VDD_MEM6(NC)

VDDG33_1(NC)
VDDG33_2(NC)

RX780/RS780 POWER DIFFERENCE TABLE

RX780

+1.1V
+1.1V
+1.2V
+1.8V
+1.8VVDDG18
NC
+1.1V +1.1V +1.8V
+1.1V
NC

+1.8V/1.5V

NC

+1.1V_VDD_PCIE

A6
B6
C6
D6
E6
F6
G7
H8
J9
K9
M9
L9
P9
R9
T9
V9
U9

K12
J14
U16
J11
K15
M12
L14
L11
M13
M15
N12
N14
P11
P13
P14
R12
R15
T11
T15
U12
T14
J16

AE10
AA11
Y11
AD10
AB10
AC10

H11
H12

C275

0.1U/10V_4

C251

0.1U/10V_4

C281

0.1U/10V_4

+1.8V_VDD_MEM

C192

0.1U/10V_4

+3V_VDDG33

C336

0.1U/10V_4

RS780

+1.1V
+1.1V
+1.2V
+1.8V
+1.8V
+1.8V

+1.1V

+3.3V
+1.8VNC

PIN NAME
IOPLLVDD

AVDDDI
AVDDQ
PLLVDD
PLLVDD18
VDDA18PCIEPLL
VDDA18HTPLL
VDDLTP18
VDDLT18
VDDLT33

C337

0.1U/10V_4

C292

0.1U/10V_4

C179

0.1U/10V_4

C329

0.1U/10V_4

C318
1U/10V_4

C297

0.1U/10V_4

C278

0.1U/10V_4

C172

0.1U/10V_4

R123 0_6

RX780 RS780

NC

+1.1V

NC

+3.3VAVDD
NC +1.8V
NC +1.8V

+1.1V

NC

+1.8V

NC

+1.8V
+1.8V

+1.8V

+1.8V

NC

+1.8V

NC

NC

NC

0.7A

C328
1U/10V_4

C303

0.1U/10V_4

C250

0.1U/10V_4

1.8V(0.15A)

C216

0.1U/10V_4

RS780

3.3V(0.03A)

VDD33 - 3.3V I/O
Not applicable to RX780

VDDPCIE - PCIE-E Main power

R542 0_8

C845

4.7U/6.3V_6

VDDC - Core Logic power

7A

C59

10U/6.3V_8

C60

10U/6.3V_8

L23

C153

4.7U/6.3V_6

BLM21PG221SN1D(220,100M,2A)_8

+3V

+1.1V

+1.1V_DYN

VDD_MEM For UMA RS780 only
Not applicable to RX780
memory I/O transform

+1.8V

11

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

5

4

3

2

NB5/RD5

RS740/RS780-POWER5/5

Date: Sheet

1

11 45Tuesday, February 19, 2008

1A

of

5

4

3

2

1

D21

RB500V-40

D20

RB500V-40

20MIL

20MIL

BT1

BAT_CONN

SI-2
modified

-- for EMI
suggestion

12

+3VPCU

+VCCRTC_2+BAT

R298
0_4

12

NB_PLTRST#10
PCIE_RST#17
CARD_PLTRST#26
LAN_PLTRST#31
EPRESS_PLTRST#33
MINI_PLTRST#36

PCIE_SB_NB_RX0P9

D D

PLACE THESE
PCIE AC
COUPLING CAPS
CLOSE TO U600

+1.2V

PCIE_SB_NB_RX0N9
PCIE_SB_NB_RX1P9
PCIE_SB_NB_RX1N9
PCIE_SB_NB_RX2P9
PCIE_SB_NB_RX2N9
PCIE_SB_NB_RX3P9
PCIE_SB_NB_RX3N9

PCIE_NB_SB_TX0P9

To RS780

PCIE_NB_SB_TX0N9
PCIE_NB_SB_TX1P9
PCIE_NB_SB_TX1N9
PCIE_NB_SB_TX2P9
PCIE_NB_SB_TX2N9
PCIE_NB_SB_TX3P9
PCIE_NB_SB_TX3N9

+1.2V_PCIE_VDDR

L44 BLM18PG181SN1D(180,1.5A)_6

PCIE_PVDD-- PCIE PLL POWER

C C

SBSRC_CLKP2
SBSRC_CLKN2

Y8

R632

B B

A A

*20M_6

PV-1
Modified

-- change
to pull hi
to 3VS5
for power
leakage
issue

4

32.768KHZ

R626 20M_6

C900
18P/50V_4

RTC_X1

23

RTC_X2

1

C899
18P/50V_4

If CPU have pull Hi ,this
pin should be not need

+1.8V

+3VS5

ALLOW_LDTSTOP10
CPU_PROCHOT#3

CPU_PWRGD3

CPU_LDT_STOP#3,10

CPU_LDT_RST#3,10

R250 33_4
R252 33_4
R312 33_4
R251 33_4
R241 33_4
R660 33_4

C869 0.1U/10V_4
C868 0.1U/10V_4
C865 0.1U/10V_4
C864 0.1U/10V_4
C871 0.1U/10V_4
C870 0.1U/10V_4
C867 0.1U/10V_4
C866 0.1U/10V_4

R581 562/F_4
R587 2.05K/F_4

R232 *10K/F_4

R588 10K/F_4

C485
10U/6.3V_8

ALLOW_LDTSTOP
CPU_PROCHOT#
CPU_PWRGD
CPU_LDT_STOP#
CPU_LDT_RST#

A_RST#_SB

A_RX0P_C
A_RX0N_C
A_RX1P_C
A_RX1N_C
A_RX2P_C
A_RX2N_C
A_RX3P_C
A_RX3N_C

PCIE_NB_SB_TX0P
PCIE_NB_SB_TX0N
PCIE_NB_SB_TX1P
PCIE_NB_SB_TX1N
PCIE_NB_SB_TX2P
PCIE_NB_SB_TX2N
PCIE_NB_SB_TX3P
PCIE_NB_SB_TX3N

PCIE_CALRP_SB
PCIE_CALRN_SB

+1.2V_PCIE_PVDD

40mA

C503
1U/10V_4

SBSRC_CLKPSBSRC_CLKPSBSRC_CLKPSBSRC_CLKP
SBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKN

R257 0_4

T74

RTC_X1

RTC_X2

U37A

N2

A_RST#

V23

PCIE_TX0P

V22

PCIE_TX0N

V24

PCIE_TX1P

V25

PCIE_TX1N

U25

PCIE_TX2P

U24

PCIE_TX2N

T23

PCIE_TX3P

T22

PCIE_TX3N

U22

PCIE_RX0P

U21

PCIE_RX0N

U19

PCIE_RX1P

V19

PCIE_RX1N

R20

PCIE_RX2P

R21

PCIE_RX2N

R18

PCIE_RX3P

R17

PCIE_RX3N

T25

PCIE_CALRP

T24

PCIE_CALRN

P24

PCIE_PVDD

P25

PCIE_PVSS

N25

PCIE_RCLKP/NB_LNK_CLKP

N24

PCIE_RCLKN/NB_LNK_CLKN

K23

NB_DISP_CLKP

K22

NB_DISP_CLKN

M24

NB_HT_CLKP

M25

NB_HT_CLKN

P17

CPU_HT_CLKP

M18

CPU_HT_CLKN

M23

SLT_GFX_CLKP

M22

SLT_GFX_CLKN

J19

GPP_CLK0P

J18

GPP_CLK0N

L20

GPP_CLK1P

L19

GPP_CLK1N

M19

GPP_CLK2P

M20

GPP_CLK2N

N22

GPP_CLK3P

P22

GPP_CLK3N

L18

25M_48M_66M_OSC

J21

25M_X1

J20

25M_X2

A3

X1

B3

X2

F23

ALLOW_LDTSTP

F24

PROCHOT#

F22

LDT_PG

G25

LDT_STP#

G24

LDT_RST#

SB700

IC CTRL(528P) SB700 A11(218S7EALA11FG)
P/N : AJALA110T00

SB700

Part 1 of 5

PCI EXPRESS INTERFACE

100MHZ

CPU

LPC

RTC

RTC XTAL

PCI CLKS

PCI INTERFACE

CLOCK GENERATOR

LDRQ1#/GNT5#/GPIO68

BMREQ#/REQ5#/GPIO65

PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4

PCICLK5/GPIO41

PCIRST#

AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30

AD31
CBE0#
CBE1#
CBE2#
CBE3#

FRAME#

DEVSEL#

IRDY#

TRDY#
STOP#

PERR#
SERR#
REQ0#
REQ1#
REQ2#

REQ3#/GPIO70
REQ4#/GPIO71

GNT0#
GNT1#
GNT2#

GNT3#/GPIO72
GNT4#/GPIO73

CLKRUN#

LOCK#

INTE#/GPIO33

INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36

LPCCLK0
LPCCLK1

LAD0
LAD1
LAD2
LAD3

LFRAME#

LDRQ0#

SERIRQ

RTCCLK

INTRUDER_ALERT#

VBAT

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9

PAR

Del R639, R640, R641, R642 on PV

P4
P3

PCI_CLK2_R

P1

PCI_CLK3_R

P2

PCI_CLK4_R

T4

PCI_CLK5_R

T3

PCIRST#_L

N1

U2
P7
V4
T1
V3
U1
V1
V2
T2
W1
T9
R6
R7
R5
U8
U5
Y7
W8
V9
Y8
AA8
Y4
Y3
Y2
AA2
AB4
AA1
AB3
AB2
AC1
AC2
AD1
W2
U7
AA7
Y1
AA6
W5
AA5
Y5
U6
W6
W4
V7
AC3
AD4
AB7
AE6
AB6
AD2
AE4
AD5
AC6
AE5
AD6
V5

AD3
AC4
AE2
AE3

G22
E22
H24
H23
J25
J24
H25
H22
AB8
AD7
V15

C3
C2
B2

R643 33_4

AD23
AD24
AD25
AD26
AD27
AD28

All the PCI bus has
build-in Pull-UP/Down
resistors

SERR#

SI-2 Modified-- for power leakage issue

R187 0_4

SI-2 Modified-- Add GPIO pin for control D3E wake up ( need low 1ms
for Jmicron request)

PE_GPIO1
CLKRUN#_R

INTE#
INTF#
INTG#
INTH#

LPC_CLK0
LPC_CLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#_SB
LDRQ1#_SB
SB_GPIO65
SERIRQ

RTC_CLK
INTRUDER_ALERT#
+AVBAT

PE_GPIO1

R294 8.2K_4
R299 *8.2K_4

SB_GPIO65

SERR# 35

R631 0_4
R629 0_4

T94

T213
T110
T217

INTH# 28

R243 22_4
R589 10_4

LAD0 35,36
LAD1 35,36
LAD2 35,36
LAD3 35,36

LFRAME# 35,36

T61
T90
T107

SERIRQ 35

RTC_CLK 16

20MIL

T108
T214

PCIRST#

R274 *100K/F_4

R809 8.2K_4

AD23 16
AD24 16
AD25 16
AD26 16
AD27 16
AD28 16

+AVBAT

+3V

20MIL

C906
1U/10V_4

RF_OFF# 36
D3E GPIO# 26

LCD_BK 23

CLKRUN# 35

PCI_CLK_TPM 16
PCI_CLK3 16
PCI_CLK4 16
PCI_CLK5 16

PCIRST# 35

+3V

R796 499/F_4

C907
1U/10V_4

Del R783 for
TP on PV

R589 change to 10 ohm on PV

LPC_CLK0 16
LPC_CLK1 16

C940

5.6P/50V_6

SI-1 Modified - for EMI

12

G3
*SHORT_ PAD1

R782 *1M/F_4

+AVBAT

C902

0.1U/10V_4

change D21, D20 type for PV

SI-2 mofified for satify -­remove R560 , add R796 ,R797

+3VRTC_1

R797 10_4

+3VRTC

20MIL20MIL

C939
22P/50V_4

PCLK_LPC_DEBUG 36

PCLK_LPC_KB3920 35

+AVBAT

INTRUDER_ALERT# Left not connected (Southbridge
has 50-kohm internal pull-up to VBAT).

SI-2 Modified--reserve

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

NB5/RD5

5

4

3

2

SB700-PCIE/PCI/CPU/LPC 1/4

Date: Sheet

1

12 45Tuesday, February 19, 2008

1A

of

5

+3VSUS

NC only ,Can't be install

R297 *2.2K_4

R240 *2.2K_4

R287 *2.2K_4

+3VSUS

D D

C C

R289 *10K/F_4

+3V

SCL0/SDATA0 is 3V tolerance
AMD datasheet define it

R245 2.2K_4
R253 2.2K_4

+3VS5

SCL1/SDATA1 is 3V/S5 tolerance
AMD datasheet define it

R648 *2.2K_4
R649 *2.2K_4

remove pull hi
( chip internal
have pull hi )

+3VS5

SCL2/SDATA2 is 3V/S5 tolerance
AMD datasheet define it

R222 *2.2K_4
R227 *2.2K_4

+3V

R276 4.7K_4

+3VS5

R763 2.2K_4

G4

12

*SHORT_ PAD1

SB_TEST0

SB_TEST1

SB_TEST2

SWI#

PCLK_SMB
PDAT_SMB

SB_SMBCLK1
SB_SMBDATA1

SB_SCLK2

SUS_STAT#

SYS_RST#

DNBSWON#

SI-2 modified add D3E function

Clock gen/Robson/TV
tuner
/DDR2/DDR2
thermal/Accelerometer

SI-2 modified -- Change lan
disable control from SB to EC SB
reserve

D3E_SCI# from Gevent5# change to Gevent7# on PV

CPU_MEMHOT#3,7

PM_THERM#5

NEWCARD_DETECT33

To Azalia

ACZ_SDOUT

B B

ACZ_SYNC

ACZ_BCLK

ACZ_RST#

ACZ_SDIN0_R

ACZ_SDOUT

ACZ_SYNC

A A

ACZ_BCLK

ACZ_RST#

ACZ_SDIN1_R

R644 33_4

C908 *10P/50V_4

R290 33_4

C569 *10P/50V_4

R646 33_4

C910 10P/50V_4

R296 33_4

R295 0_4

ACZ_SDOUT_AUDIO 27

ACZ_SYNC_AUDIO 27

BIT_CLK_AUDIO 27

ACZ_RST#_AUDIO 27

ACZ_SDIN0 27

To Modem Board

R645 33_4

C909 *10P/50V_4

R292 33_4

C577 *10P/50V_4

R647 33_4

C911 10P/50V_4

R293 33_4

R286 0_4

5

ACZ_SDOUT_AUDIO_MDC 29

ACZ_SYNC_AUDIO_MDC 29

BIT_CLK_AUDIO_MDC 29

ACZ_RST#_AUDIO_MDC 29

ACZ_SDIN1 29

SI-2 Modified --for
EMI suggestion

SB JTAG

SB_PWRGD_IN16

CPU_THERMTRIP#3

WD_PWRGD16

LAN_DISABLE#31,35

PM_BATLOW#35

4

T211
T99

SUSB#35

SUSC#35

DNBSWON#35
SUS_STAT#10

GATEA2035

RCIN#35

SCI#35

KBSMI#35

T109

PCIE_WAKE#31,33,36

SWI#35

RSMRST#35

T63
T194

T222

ACZ_SPKR27,28

PCLK_SMB2,6,7,28,36
PDAT_SMB2,6,7,28,36

D3E_SCI#26

SI-2 modified Del D35

+3VS5

ACZ_RST#16

+3VS5

CN16

1
2
3
4
5
6
7
8

*S/W JTAG DEBUG

4

R271 *0_4
R191 *0_4
R233 *0_4

R211 *0_4
R786 0_4

R284 *0_4

R217 *0_4

R302 *0_4

T69
T75

T72

T98
T209

R592 22K_4

+3VSUS

NEWCARD_DETECT
RI#
SLP_S2
SUSB#
SUSC#
DNBSWON#
SB_PWRGD_IN
SUS_STAT#
SB_TEST2
SB_TEST1
SB_TEST0
GATEA20
RCIN#
SCI#
KBSMI#
GEVENT5#
SYS_RST#
PCIE_WAKE#
SWI#
SB_THERMTRIP#
WD_PWRGD

RSMRST#

SATA_IS1
LAN_DISABLE#_SB

SB_NWD_CLK_REQ#
ACZ_SPKR

PCLK_SMB
PDAT_SMB
SB_SMBCLK1
SB_SMBDATA1

PM_BATLOW#SB_SDATA2
SES_INT

CPU_MEMHOT#_IN

R275 *0_4
R279 *10K/F_4

SB_JTAG_TDO
SB_JTAG_TCK
SB_JTAG_TDI
SB_JTAG_RST#

ACZ_BCLK
ACZ_SDOUT
ACZ_SDIN0_R
ACZ_SDIN1_R

ACZ_SYNC
ACZ_RST#

HD audio
interface is

3.3S5 voltage

HDD_AUX_RST#

SB_JTAG_TCK
SB_JTAG_TDO
SB_JTAG_TDI
SB_TEST1

SB_JTAG_RST#

SMBALERT#_1

C462
10P/50V_4

3

U37D

E1

PCI_PME#/GEVENT4#

E2

RI#/EXTEVNT0#

H7

SLP_S2/GPM9#

F5

SLP_S3#

G1

SLP_S5#

H2

PWR_BTN#

H1

PWR_GOOD

K3

SUS_STAT#

H5

TEST2

H4

TEST1

H3

TEST0

Y15

GA20IN/GEVENT0#

W15

KBRST#/GEVENT1#

K4

LPC_PME#/GEVENT3#

K24

LPC_SMI#/EXTEVNT1#

F1

S3_STATE/GEVENT5#

J2

SYS_RESET#/GPM7#

H6

WAKE#/GEVENT8#

F2

BLINK/GPM6#

J6

SMBALERT#/THRMTRIP#/GEVENT2#

W14

NB_PWRGD

D3

RSMRST#

AE18

SATA_IS0#/GPIO10

AD18

CLK_REQ3#/SATA_IS1#/GPIO6

AA19

SMARTVOLT/SATA_IS2#/GPIO4

W17

CLK_REQ0#/SATA_IS3#/GPIO0

V17

CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39

W20

CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40

W21

SPKR/GPIO2

AA18

SCL0/GPOC0#

W18

SDA0/GPOC1#

K1

SCL1/GPOC2#

K2

SDA1/GPOC3#

AA20

DDC1_SCL/GPIO9

Y18

DDC1_SDA/GPIO8

C1

LLB#/GPIO66

Y19

SHUTDOWN#/GPIO5

G5

DDR3_RST#/GEVENT7#

B9

USB_OC6#/IR_TX1/GEVENT6#

B8

USB_OC5#/IR_TX0/GPM5#

A8

USB_OC4#/IR_RX0/GPM4#

A9

USB_OC3#/IR_RX1/GPM3#

E5

USB_OC2#/GPM2#

F8

USB_OC1#/GPM1#

E4

USB_OC0#/GPM0#

M1

AZ_BITCLK

M2

AZ_SDOUT

J7

AZ_SDIN0/GPIO42

J8

AZ_SDIN1/GPIO43

L8

AZ_SDIN2/GPIO44

M3

AZ_SDIN3/GPIO46

L6

AZ_SYNC

M4

AZ_RST#

L5

AZ_DOCK_RST#/GPM8#

H19

IMC_GPIO0

H20

IMC_GPIO1

H21

SPI_CS2#/IMC_GPIO2

F25

IDE_RST#/F_RST#/IMC_GPO3

D22

IMC_GPIO4

E24

IMC_GPIO5

E25

IMC_GPIO6

D23

IMC_GPIO7

SB700

SI-2 Modified -- discrete remove RP56

USBP3­USBP3+

3

USB OC

HD AUDIO

CLOSE TO SB

2
4

RP50

SB700

USBCLK/14M_25M_48M_OSC

USB MISC

ACPI / WAKE UP EVENTS

GPIO

IMC_PWM0/IMC_GPIO10

SCL3_LV/IMC_GPIO13
SDA3_LV/IMC_GPIO14

IMC_PWM1/IMC_GPIO15

IMC_PWM2/IMC_GPO16
IMC_PWM3/IMC_GPO17

INTEGRATED uC

INTEGRATED uC

1
3

*0_4P2R_4

UMA

Part 4 of 5

USB_RCOMP

USB_FSD13P
USB_FSD13N

USB_FSD12P
USB_FSD12N

USB 1.1

USB_HSD11P
USB_HSD11N

USB_HSD10P
USB_HSD10N

USB_HSD9P
USB_HSD9N

USB_HSD8P
USB_HSD8N

USB_HSD7P
USB_HSD7N

USB_HSD6P
USB_HSD6N

USB_HSD5P
USB_HSD5N

USB_HSD4P

USB 2.0

USB_HSD4N
USB_HSD3P

USB_HSD3N
USB_HSD2P

USB_HSD2N
USB_HSD1P

USB_HSD1N
USB_HSD0P

USB_HSD0N

IMC_GPIO8
IMC_GPIO9

SCL2/IMC_GPIO11

SDA2/IMC_GPIO12

IMC_GPIO18
IMC_GPIO19
IMC_GPIO20
IMC_GPIO21
IMC_GPIO22
IMC_GPIO23
IMC_GPIO24
IMC_GPIO25

IMC_GPIO26
IMC_GPIO27
IMC_GPIO28
IMC_GPIO29
IMC_GPIO30
IMC_GPIO31
IMC_GPIO32
IMC_GPIO33
IMC_GPIO34
IMC_GPIO35
IMC_GPIO36
IMC_GPIO37
IMC_GPIO38
IMC_GPIO39
IMC_GPIO40
IMC_GPIO41

2

CLK_48M_USB

C8

USB_RCOMP_SB

G8

USB_FSD13P

E6

USB_FSD13N

E7

USB_FDS12P

F7

USB_FSD12N

E8
H11

J10
E11

F11
A11

B11
C10

D10
G11

H12
E12

E14
C12

D12
B12

A12
G12

G14
H14

H15
A13

B13
B14

A14
A18

B18
F21
D21
F19
E20
E21
E19
D19
E18

G20
G21
D25
D24
C25
C24
B25
C23

B24
B23
A23
C22
A22
B22
B21
A21
D20
C20
A20
B20
B19
A19
D18
C18

USBP6_CR- 25
USBP6_CR+ 25

2

SB_SCLK2
SB_SDATA2
SB_SCLK3
SB_SDATA3

SB_GPIO16
SB_GPIO17

SCLK_WLAN33,36

SDATA_WLAN33,36

R267 11.8K/F_6

USBP11+ 36
USBP11- 36

USBP10+ 36
USBP10- 36

USBP9+ 30
USBP9- 30

USBP8+ 30
USBP8- 30

USBP7+ 33
USBP7- 33

USBP6+ 30
USBP6- 30

USBP5+ 30
USBP5- 30

USBP4+ 37
USBP4- 37

USBP3+
USBP3-

USBP2+ 30
USBP2- 30

USBP1+ 30
USBP1- 30

USBP0+ 30
USBP0- 30

NB5/RD5

1

13

CLK_48M_USB 2

T101
T199

T91
T93

TV Min-Card

WLAN Min-Card

USB Connector

USB Connector

NEW CARD

FINGERPRINT

BLUETOOTH

Docking

USB card reader or Touch screen

Carama USB

E-SATA and USB Connector

USB Connector

T64
T70

SB_GPIO16 16
SB_GPIO17 16

+3VS5

+3VS5

SPI/LPC define

R764
2K/04

3

2N7002EPT

R765
2K/04

3

+3V

2

Q66

+3V

2

Q672N7002EPT

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

SB700-ACPI/GPIO/USB 2/4

Date: Sheet

CLK_48M_USB

C554
*2.2P/50V_4

for EMI & del R268
change 2.2P

PCLK_SMB

1

PDAT_SMB

1

of

13 45Tuesday, February 19, 2008

1

1A

5

SATA PORT 0,1,2,3
can support AHCI
mode

SATA1

D D

SATA ODD

E-SATA

SATA PORT 4,5 are
only support IDE
mode

C C

PLACE SATA_CAL
RES VERY CLOSE
TO BALL OF SB700

NOTE:

R361 IS 1K 1% FOR 25MHz
XTAL, 4.99K 1% FOR 100MHz
INTERNAL CLOCK

B B

PLACE SATA AC COUPLING
CAPS CLOSE TO SB600

SATA_TXP033
SATA_TXN033

SATA_RXN033
SATA_RXP033

SATA_TXP433
SATA_TXN433

SATA_RXN433
SATA_RXP433

SATA_TXP230
SATA_TXN230

SATA_RXN230
SATA_RXP230

R264 1K/F_4

PLVDD_SATA-­SATA PLL
POWER

C559 0.01U/16V_4
C558 0.01U/16V_4

C563 0.01U/16V_4
C562 0.01U/16V_4

C544 0.01U/16V_4
C543 0.01U/16V_4

C535 0.01U/16V_4
C529 0.01U/16V_4

R613 4.99/F_4
R615 4.99/F_4

T197
T198

T88
T85

T227
T228

T229
T230

T89
T87

T86
T82

R361

+3V

SATA_TXP0_C
SATA_TXN0_C

SATA_RXN0_C
SATA_RXP0_C

SATA_TXP1_C
SATA_TXN1_C

SATA_RXN1_C
SATA_RXP1_C

SATA_TXP2_C
SATA_TXN2_C

SATA_RXN2_C
SATA_RXP2_C

SATA_TXP3_C
SATA_TXN3_C

SATA_RXN3_C
SATA_RXP3_C

SATA_TXP4_C
SATA_TXN4_C

SATA_RXN4_C
SATA_RXP4_C

SATA_TXP5_C
SATA_TXN5_C

SATA_RXN5_C
SATA_RXP5_C

SATA_RBIAS_PN

SATA_X1
SATA_X2

SB_SATA_LED#

R382 10K/F_4

+3V

+1.2V_PLLVDD_SATA
+3V_XTLVDD_SATA

XTLVDD_SATA-- SATA
crystal power

C534

27P/50V_4

21

Y4
25MHZ

C517

27P/50V_4

R262
10M_6

SATA_X1

SATA_X2

AD9
AE9

AB10

AC10

AE10

AD10
AD11

AE11
AB12

AC12

AE12

AD12
AD13

AE13
AB14

AC14

AE14

AD14
AD15

AE15
AB16

AC16

AE16

AD16

AA12

W11

AA11

W12

4

U37B

V12
Y12

SATA_TX0P
SATA_TX0N

SATA_RX0N
SATA_RX0P

SATA_TX1P
SATA_TX1N

SATA_RX1N
SATA_RX1P

SATA_TX2P
SATA_TX2N

SATA_RX2N
SATA_RX2P

SATA_TX3P
SATA_TX3N

SATA_RX3N
SATA_RX3P

SATA_TX4P
SATA_TX4N

SATA_RX4N
SATA_RX4P

SATA_TX5P
SATA_TX5N

SATA_RX5N
SATA_RX5P

SATA_CAL
SATA_X1
SATA_X2
SATA_ACT#/GPIO67

PLLVDD_SATA
XTLVDD_SATA

SB700

SB700

Part 2 of 5

SATA PWR SERIAL ATA

HW MONITOR

IDE_IORDY

IDE_IRQ

IDE_A0
IDE_A1
IDE_A2

IDE_DACK#

IDE_DRQ
IDE_IOR#

IDE_IOW#

IDE_CS1#
IDE_CS3#

IDE_D0/GPIO15
IDE_D1/GPIO16
IDE_D2/GPIO17
IDE_D3/GPIO18
IDE_D4/GPIO19
IDE_D5/GPIO20
IDE_D6/GPIO21
IDE_D7/GPIO22
IDE_D8/GPIO23

ATA 66/100/133

IDE_D9/GPIO24
IDE_D10/GPIO25
IDE_D11/GPIO26
IDE_D12/GPIO27
IDE_D13/GPIO28
IDE_D14/GPIO29
IDE_D15/GPIO30

SPI_DI/GPIO12

SPI_DO/GPIO11

SPI_CLK/GPIO47

SPI_HOLD#/GPIO31

SPI_CS#/GPIO32

LAN_RST#/GPIO13

SPI ROM

ROM_RST#/GPIO14

FANOUT0/GPIO3
FANOUT1/GPIO48
FANOUT2/GPIO49

FANIN0/GPIO50
FANIN1/GPIO51
FANIN2/GPIO52

TEMP_COMM
TEMPIN0/GPIO61
TEMPIN1/GPIO62
TEMPIN2/GPIO63

TEMPIN3/TALERT#/GPIO64

VIN0/GPIO53
VIN1/GPIO54
VIN2/GPIO55
VIN3/GPIO56
VIN4/GPIO57
VIN5/GPIO58
VIN6/GPIO59
VIN7/GPIO60

AVDD

AVSS

3

AA24
AA25
Y22
AB23
Y23
AB24
AD25
AC25
AC24
Y25
Y24

AD24
AD23
AE22
AC22
AD21
AE20
AB20
AD19
AE19
AC20
AD20
AE21
AB22
AD22
AE23
AC23

G6
D2
D1
F4
F3

U15
J1

M8
M5
M7

P5
P8
R8

C6
B6
A6
A5
B5

A4
B4
C4
D4
D5
D6
A7
B7

F6
G7

ROM_RST#
SB_FANOUT0

SB_FANOUT1

SB_FANTACH0
SB_FANTACH1
PORT_80_PWR_DWN

TEMP_COMM
TEMPIN0
TEMPIN1
MB_THRMDA_SB

BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4

5mA

+3V_VDD_HWM

C571
*0.1U/10V_4

T231
T232
T233
T234
T235
T236
T237
T238
T239
T240

IF THERE IS NO IDE, TEST

T241

POINTS FOR DEBUG BUS

T242

IS MANDATORY

T243
T244
T245
T246
T247
T248
T249
T250
T251
T252
T253
T254
T255
T256
T257

T100
T219
T218
T111
T220

R265 0_4
T215

T96
T97

T104
T92
T95

T208
T202
T203
T207
T259

Del R220 for TP on PV

Del WAN off#
and R597 on
PV

L52 0_6

C572
*2.2U/6.3V_6

2

BT_OFF# 30

CHIPSET_PCIE_SLOW_SB# 2

ACCLED_EN 29

BT_COMBO_EN# 36

+3VS5

SI-2 modified -- for fix +3V power leakage in S5 mode

AVDD--H/W monitor
Analog power

SI-2 modified -- SB
internal pull Hi to 3VS5
, modified to same power
rail with SB

+3VS5

R221 10K/F_4

R247 *10K/F_4

R225 *10K/F_4

R230 *10K/F_4

R596 *10K/F_4

BOARD_ID0

BOARD_ID1

BOARD_ID2

BOARD_ID3

BOARD_ID4

1

14

R229 *10K/F_4

R248 *10K/F_4

R228 *10K/F_4R216 0_4

R242 *10K/F_4

R600 *10K/F_4

C655

U20
TC7SH08FU

SATA_LED#29

4

3 5

0.1U/10V_4

2
1

SB_SATA_LED#

SI-2 modified for SATA LED fail issue

A A

+1.2V

( 1.2V @ 60mA)

L47

BLM18PG181SN1D(180,1.5A)_6

+3V

( 3.3V @ 1.2mA)

L46

BLM18PG181SN1D(180,1.5A)_6

+1.2V_PLLVDD_SATA

C524

1U/10V_4

+3V_XTLVDD_SATA

77mA

C550

0.1U/10V_4

1mA

C539

1U/10V_4

Place near
ball

XXX

XXX

XXXXX

XXXXX

ID0ID1ID2ID3ID4

00

01

UMA

discrete

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

5

4

3

2

NB5/RD5

SB700-ACPI/GPIO/USB 2/4

Date: Sheet

1

14 45Tuesday, February 19, 2008

1A

of

5

Del R285 for TP on PV

+3V

D D

C C

100U/6.3V_3528

1.8V : FLASH MEMORY MODE(DEFAULT)

3.3V: IDE MODE

+1.8V

+1.2V

BLM18PG181SN1D(180,1.5A)_6

12

C576

+3V

+1.2V

BLM18PG181SN1D(180,1.5A)_6

12

C557
10U/6.3V_8

R226 0_8
R751 *0_8

L89

L92

12

C560
1U/10V_4

12
12

12

PCIE_VDDR--PCIE I/O power

12

C477
10U/6.3V_8

AVDD_SATA--SATA phy power

12

C888
10U/6.3V_8

For support USB wakeup-->3V_S5

L91

+3VS5

BLM18PG181SN1D(180,1.5A)_6

B B

12

C528

1U/10V_4

12

1U/10V_4

C537

C885

1U/10V_4

12

VDDQ--3.3V I/O power

12

C565
1U/10V_4

C501
1U/10V_4

12

C484
1U/10V_4

12

C882
10U/6.3V_8

12

C510

0.1U/10V_4

12

12

C884

0.1U/10V_4

12

C547
1U/10V_4

C487
1U/10V_4

12

C504
1U/10V_4

12

12

C878

0.1U/10V_4

C879

0.1U/10V_4

12

C573
1U/10V_4

VDD33_18--3.3V IDE I/O power

1.8V flash memory I/O power

12

C486
10U/6.3V_8

12

C502
1U/10V_4

12

C880

0.1U/10V_4

AVDDTX--USB Phy
Analog I/O power

12

C889
10U/6.3V_8

12

C511

0.1U/10V_4

12

C553
1U/10V_4

+VDD33_18

12

C497
1U/10V_4

+1.2V_PCIE_VDDR

12

C492
1U/10V_4

+1.2V_AVDD_SATA

12

C883
1U/10V_4

+3V_AVDD_USB

12

12

4

12

C574
1U/10V_4

0.45A

12

C488
1U/10V_4

12

C483
1U/10V_4

12

C881
1U/10V_4

C886

0.1U/10V_4

C536

0.1U/10V_4

844mA

0.2A

0.2A

PLACE ALL THE DECOUPLING CAPS ON
THIS SHEET CLOSE TO SB AS POSSIBLE.

AB21

AA21
AA22
AE25

T15
U16

U17

AA4
AB5

Y20

L9

M9
U9

V8

W7

Y6

U37C

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12

VDD33_18_1
VDD33_18_2
VDD33_18_3
VDD33_18_4

SB700

Part 3 of 5

PCI/GPIO I/O

CKVDD_1.2V_1
CKVDD_1.2V_2
CKVDD_1.2V_3
CKVDD_1.2V_4

IDE/FLSH I/O

POWER

P18

PCIE_VDDR_1

P19

PCIE_VDDR_2

P20

PCIE_VDDR_3

P21

PCIE_VDDR_4

R22

PCIE_VDDR_5

R24

PCIE_VDDR_6

R25

AA14
AB18
AA15
AA17
AC18
AD17
AE17

A16
B16
C16
D16
D17
E17
F15
F17
F18
G15
G17
G18

PCIE_VDDR_7

AVDD_SATA_1
AVDD_SATA_4
AVDD_SATA_2
AVDD_SATA_3
AVDD_SATA_5
AVDD_SATA_6
AVDD_SATA_7

AVDDTX_0
AVDDTX_1
AVDDTX_2
AVDDTX_3
AVDDTX_4
AVDDTX_5
AVDDRX_0
AVDDRX_1
AVDDRX_2
AVDDRX_3
AVDDRX_4
AVDDRX_5

SB700

A-LINK I/O

SATA I/O

PLL CLKGEN I/O

USB I/O

3.3V_S5 I/OCORE S5

USB_PHY_1.2V_1
USB_PHY_1.2V_2

AVDDCK_3.3V
AVDDCK_1.2V

CORE S0

S5_3.3V_1
S5_3.3V_2
S5_3.3V_3
S5_3.3V_4
S5_3.3V_5
S5_3.3V_6
S5_3.3V_7

S5_1.2V_1
S5_1.2V_2

V5_VREF

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

AVDDC

3

VDD-- S/B CORE power

L15
M12
M14
N13
P12
P14
R11
R15
T16

L21
L22
L24
L25

A17
A24
B17
J4
J5
L1
L2

G2
G4

A10
B10

AE7
J16
K17
E9

+1.2V_VCC_SB_R

+1.2V_CKVDD

+3VALW_R

0.2A

+1.2V_USB_PHY_R

+5V_VREF

+3V_AVDDCK
+1.2V_AVDDCK
+3V_AVDDC

12

C533
1U/10V_4

12

C505

2.2U/6.3V_6

12

C875

0.1U/10V_4

0.22A

604mA0.8A

12

12

C545

C538

1U/10V_4

1U/10V_4

CKVDD_1.2V-- Internal
clock Generator I/O
power

286mA

12

0.01A

12

4mA

7mA
44mA

12

C489

0.1U/50V_6

C475

0.1U/50V_6

S5_3.3--3.3v standby power

R604 0_6

Change to 0603

12

C570

C876

0.1U/10V_4

10U/6.3V_8

12

C903

0.1U/10V_4

V5_VREF--PCI 5V TOLERANCE

R621 1K/F_4

1 2

12

C898
1U/10V_4

16mA

2

R590
*0_8

12

R198
0_8

12

12

12

C467

C532

10U/6.3V_8

1U/10V_4

L43
BLM18PG181SN1D(180,1.5A)_6

12

C478

2.2U/6.3V_6

12

+1.2V

+3VS5

S5_1.2V--1.2V standby power

12

C901

0.1U/10V_4

D36

21

CH501H-40PT

+1.2V_S5

Del R661
for TP on
PV

+5V

+3V

For SB700 issue(6/22)

A1-1 chip bug
use A1-2 chip can remove

+1.2V_S5

+1.2V

U37E

SB700

T10

AVSS_SATA_1

U10

AVSS_SATA_2

U11

AVSS_SATA_3

U12

AVSS_SATA_4

V11

AVSS_SATA_5

V14

AVSS_SATA_6

W9

AVSS_SATA_7

Y9

AVSS_SATA_8

Y11

AVSS_SATA_9

Y14

AVSS_SATA_10

Y17

AVSS_SATA_11

AA9

AVSS_SATA_12

AB9

AVSS_SATA_13

AB11

AVSS_SATA_14

AB13

AVSS_SATA_15

AB15

AVSS_SATA_16

AB17

AVSS_SATA_17

AC8

AVSS_SATA_18

AD8

AVSS_SATA_19

AE8

AVSS_SATA_20

A15

AVSS_USB_1

B15

AVSS_USB_2

C14

AVSS_USB_3

D8

AVSS_USB_4

D9

AVSS_USB_5

D11

AVSS_USB_6

D13

AVSS_USB_7

D14

AVSS_USB_8

D15

AVSS_USB_9

E15

AVSS_USB_10

F12

AVSS_USB_11

F14

AVSS_USB_12

G9

AVSS_USB_13

H9

AVSS_USB_14

H17

AVSS_USB_15

J9

AVSS_USB_16

J11

AVSS_USB_17

J12

AVSS_USB_18

J14

AVSS_USB_19

J15

AVSS_USB_20

K10

AVSS_USB_21

K12

AVSS_USB_22

K14

AVSS_USB_23

K15

H18

K25
M16
M17
M21
P16

J17
J22

F9

AVSS_USB_24

PCIE_CK_VSS_1
PCIE_CK_VSS_2
PCIE_CK_VSS_3
PCIE_CK_VSS_4
PCIE_CK_VSS_5
PCIE_CK_VSS_6
PCIE_CK_VSS_7
PCIE_CK_VSS_8

AVSSC

SB700

PCIE_CK_VSS_10
PCIE_CK_VSS_11
PCIE_CK_VSS_12
PCIE_CK_VSS_13
PCIE_CK_VSS_14
PCIE_CK_VSS_15
PCIE_CK_VSS_16
PCIE_CK_VSS_17
PCIE_CK_VSS_18
PCIE_CK_VSS_19
PCIE_CK_VSS_20
PCIE_CK_VSS_21

Part 5 of 5

1

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42

GROUND

VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50

PCIE_CK_VSS_9

AVSSCK

23

A2
A25
B1
D7
F20
G19
H8
K9
K11
K16
L4
L7
L10
L11
L12
L14
L16
M6
M10
M11
M13
M15
N4
N12
N14
P6
P9
P10
P11
P13
P15
R1
R2
R4
R9
R10
R12
R14
T11
T12
T14
U4
U14
V6
Y21
AB1
AB19
AB25
AE1
AE24

P23
R16
R19
T17
U18
U20
V18
V20
V21
W19
W22
W24
W25

L17

12

10U/6.3V_8

+3V_AVDDC

AVDDC--USB Analog PLL power

12

C540

AVDDCK_3.3--Analog
system PLL power

12

C516

2.2U/6.3V_6

2

NB5/RD5

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

SB700-PWR/DECOUPLING 4/4

Date: Sheet

1

of

15 45Tuesday, February 19, 2008

1A

+1.2V_USB_PHY_R+1.2V_S5

R616 0_6

12

12

12

C891

C890

0.1U/10V_4

0.1U/10V_4

A A

5

+1.2V

L45

BLM18PG181SN1D(180,1.5A)_6

4

10U/6.3V_8

USB_PHY_1.2V--USB Phy
digital power

12

C892

+1.2V_AVDDCK

AVDDCK_1.2--USB Phy
digital power

12

C509

2.2U/6.3V_6

3

+3VS5

L50

BLM18PG181SN1D(180,1.5A)_6

C546

0.1U/10V_4

+3V +3V_AVDDCK

L48

BLM18PG181SN1D(180,1.5A)_6

5

4

3

2

1

OVERLAP COMMON PADS WHERE
POSSIBLE FOR DUAL-OP RESISTORS.

16

It must ready
refore RSMRST#

D D

PCI_CLK_TPM12

12

R659
10K/F_4

PCI_CLK_TPM

C C

PULL
HIGH

PULL
LOW

BOOTFAIL
TIMER
ENABLED

BOOTFAIL
TIMER
DISABLED

DEFAULT

PCI_CLK412

PCI_CLK312

PCI_CLK3

USE
DEBUG
STRAPS

IGNORE
DEBUG
STRAPS

DEFAULT

+3V +3V +3VS5

12

R655

10K/F_4

PCI_CLK512

R658
10K/F_4

12

R654
*10K/F_4

12

PCI_CLK4 PCI_CLK5

RESERVED

12

R656
10K/F_4

LPC_CLK012

12

R657
*10K/F_4

RESERVED

LPC_CLK112

12

R231
10K/F_4

LPC_CLK0

IMC
ENABLED

IMC
DISABLED

DEFAULT

RTC_CLK12

12

CLKGEN
ENABLED

CLKGEN
DISABLED

DEFAULT

R595
10K/F_4

ACZ_RST#13

RTC_CLKLPC_CLK1

INTERNAL
RTC

DEFAULT

EXT. RTC

(PD on X1,
apply
32KHz to
RTC_CLK)

12

R300
*10K/F_4

ENABLE PCI
ROM BOOT

DISABLE PCI
ROM BOOT

intermal have pull
Hi 10K , confirm AMD
ward this pull Hi
not need

AZ_RST#

DEFAULT

REQUIRED STRAPS

12

R291
10K/F_4

SB_GPIO1713
SB_GPIO1613

GPIO16

TYPE

FWH

LPC

SPI

RSVD

+3VS5

12

12

R599

2.2K_4

R598
*2.2K_4

12

SI-2 Modified

-R599 change from
10kohm to 2.2kohm
for fix system can
not boot

R255

GPIO17

2.2K_4

GPIO16 GPIO17

L : 2.2K
pull down

NC

L : 2.2K
pull down

L : 2.2K
pull down

L : 2.2K
pull down

NC

NC

NC

NB_PWRGD_IN:
RS780/RX780 = 1.8V; RS740 = 3.3V

DEBUG STRAPS

SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]

SI-2 modified -- remove

AD2812

B B

A A

AD2712
AD2612
AD2512
AD2412
AD2312

PULL
HIGH

PULL
LOW

PCI_AD28

USE
LONG
RESET

DEFAULT

USE
SHORT
RESET

12

R651
*2.2K_4

12

R636
*2.2K_4

PCI_AD27 PCI_AD26

USE PCI
PLL

DEFAULT

BYPASS
PCI PLL

USE ACPI
BCLK

DEFAULT

BYPASS
ACPI
BCLK

12

12

R638

R652

*2.2K_4

*2.2K_4

PCI_AD25 PCI_AD24

USE IDE
PLL

DEFAULT

BYPASS IDE
PLL

12

R637
*2.2K_4

USE DEFAULT
PCIE STRAPS

DEFAULT

USE EEPROM
PCIE STRAPS

+3V pull Hi resistor .

12

R653
*2.2K_4

Use 2.2K PD.

PCI_AD23

RESERVED

SI-2 modified -- confirm AMD R563 need to stuff

R282 10K/F_4 R278 0_4

+3VS5

C564

*2.2U/6.3V_6

VRM_PWRGD40

ECPWROK5,35

D18 CH501H-40PT

D19 CH501H-40PT

21

21

Do NOT share it with SB_PWRGD when use Internal Clk Gen
(Need SB PLL initialize firstly)

U14

1

NC

VCC

2

A

3

GND

*NL17SZ17DFT2G

SOT-353

5

4

Y

SB_PWRGD_IN

+1.8V

C549 *0.1U/10V_4

R273 *33_4

SB_PWRGD_IN 13

+1.8V

R269
10K/F_4

RX780,RS780

NB/SB POWER GOOD CIRCUIT

ALUC1G17000 IC OTHER(5P) SN74AUC1G17DBVR(SOT23-5)

IC(5P) NL17SZ17DFT2G(SOT-353)AL17SZ17000

NB_PWRGD_IN

R2720_4

NB_PWRGD_IN 10

R266 *10K/F_4

SOT-353
SOT23-5

+1.8V

WD_PWRGD 13

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

5

4

3

2

NB5/RD5

SB700-STRAPS

Date: Sheet

1

16 45Tuesday, February 19, 2008

1A

of

5

4

3

2

1

IC CTRL(632P) 216-0707001-00(BGA)
VGA P/N : AJ070700T00

Clock

SM BUS

PART 1 OF 6

P
C
I

­E
X
P
R
E
S
S

I
N
T
E
R
F
A
C
E

PCIE_TX0P
PCIE_TX0N

PCIE_TX1P
PCIE_TX1N

PCIE_TX2P
PCIE_TX2N

PCIE_TX3P
PCIE_TX3N

PCIE_TX4P
PCIE_TX4N

PCIE_TX5P
PCIE_TX5N

PCIE_TX6P
PCIE_TX6N

PCIE_TX7P
PCIE_TX7N

PCIE_TX8P
PCIE_TX8N

PCIE_TX9P
PCIE_TX9N

PCIE_TX10P
PCIE_TX10N

PCIE_TX11P
PCIE_TX11N

PCIE_TX12P
PCIE_TX12N

PCIE_TX13P
PCIE_TX13N

PCIE_TX14P
PCIE_TX14N

PCIE_TX15P
PCIE_TX15N

Calibration

PCIE_CALRN
PCIE_CALRP

NC_1
NC_2

AA28
AA27

AA25
AA24

Y28
Y27

Y25
Y24

V28
V27

V25
V24

T28
T27

T25
T24

P28
P27

P25
P24

M28
M27

M25
M24

L28
L27

L25
L24

J28
J27

G28
G27

AF25
AE25

AE23
AH30

C_PEG_RXP0
C_PEG_RXN0

C_PEG_RXP1
C_PEG_RXN1

C_PEG_RXP2
C_PEG_RXN2

C_PEG_RXP3
C_PEG_RXN3

C_PEG_RXP4
C_PEG_RXN4

C_PEG_RXP5
C_PEG_RXN5

C_PEG_RXP6
C_PEG_RXN6

C_PEG_RXP7
C_PEG_RXN7

C_PEG_RXP8
C_PEG_RXN8

C_PEG_RXP9
C_PEG_RXN9

C_PEG_RXP10
C_PEG_RXN10

C_PEG_RXP11
C_PEG_RXN11

C_PEG_RXP12
C_PEG_RXN12

C_PEG_RXP13
C_PEG_RXN13

C_PEG_RXP14
C_PEG_RXN14

C_PEG_RXP15
C_PEG_RXN15

M72_PCIE_CALRN
M72_PCIE_CALRP

C163 0.1U/10V_4
C156 0.1U/10V_4

C167 0.1U/10V_4
C170 0.1U/10V_4

C180 0.1U/10V_4
C196 0.1U/10V_4

C164 0.1U/10V_4
C157 0.1U/10V_4

C218 0.1U/10V_4
C204 0.1U/10V_4

C203 0.1U/10V_4
C187 0.1U/10V_4

C220 0.1U/10V_4
C224 0.1U/10V_4

C243 0.1U/10V_4
C252 0.1U/10V_4

C276 0.1U/10V_4
C268 0.1U/10V_4

C259 0.1U/10V_4
C246 0.1U/10V_4

C289 0.1U/10V_4
C277 0.1U/10V_4

C290 0.1U/10V_4
C296 0.1U/10V_4

C288 0.1U/10V_4
C295 0.1U/10V_4

C330 0.1U/10V_4
C324 0.1U/10V_4

C325 0.1U/10V_4
C331 0.1U/10V_4

C304 0.1U/10V_4
C316 0.1U/10V_4

R74 2K/F_4
R70 1.27K/F_4

1.27K for M82-S

PEG_RX0 9
PEG_RX#0 9

PEG_RX1 9
PEG_RX#1 9

PEG_RX2 9
PEG_RX#2 9

PEG_RX3 9
PEG_RX#3 9

PEG_RX4 9
PEG_RX#4 9

PEG_RX5 9
PEG_RX#5 9

PEG_RX6 9
PEG_RX#6 9

PEG_RX7 9
PEG_RX#7 9

PEG_RX8 9
PEG_RX#8 9

PEG_RX9 9
PEG_RX#9 9

PEG_RX10 9
PEG_RX#10 9

PEG_RX11 9
PEG_RX#11 9

PEG_RX12 9
PEG_RX#12 9

PEG_RX13 9
PEG_RX#13 9

PEG_RX14 9
PEG_RX#14 9

PEG_RX15 9
PEG_RX#15 9

+1.1V_PCIE_VDDC

PEG_TX09

D D

C C

B B

PEG_TX#09

PEG_TX19
PEG_TX#19

PEG_TX29
PEG_TX#29

PEG_TX39
PEG_TX#39

PEG_TX49
PEG_TX#49

PEG_TX59
PEG_TX#59

PEG_TX69
PEG_TX#69

PEG_TX79
PEG_TX#79

PEG_TX89
PEG_TX#89

PEG_TX99
PEG_TX#99

PEG_TX109
PEG_TX#109

PEG_TX119
PEG_TX#119

PEG_TX129
PEG_TX#129

PEG_TX139
PEG_TX#139

PEG_TX149
PEG_TX#149

PEG_TX159
PEG_TX#159

EXT_GFX_CLKP2

EXT_GFX_CLKN2

PCIE_RST#12

2.5Gb/s bit rate

100MHz (+/-300ppm) input frequency,
0-0.7V single-ended swing

R71 0_4

PEG_TX0
PEG_TX#0

PEG_TX1
PEG_TX#1

PEG_TX2
PEG_TX#2

PEG_TX3
PEG_TX#3

PEG_TX4
PEG_TX#4

PEG_TX5
PEG_TX#5

PEG_TX6
PEG_TX#6

PEG_TX7
PEG_TX#7

PEG_TX8
PEG_TX#8

PEG_TX9
PEG_TX#9

PEG_TX10
PEG_TX#10

PEG_TX11
PEG_TX#11

PEG_TX12
PEG_TX#12

PEG_TX13
PEG_TX#13

PEG_TX14
PEG_TX#14

PEG_TX15
PEG_TX#15

EXT_GFX_CLKP
EXT_GFX_CLKN

AC30
AC31

AC29
AB29

AB31
AB30

AA31
AA30

W30
W31

W29

V29

V31
V30

U31
U30

P30
P31

P29

N29

N31
N30

M31
M30

K30
K31

K29

H31
H30

AD29
AD30

AC28
AC27

AG25

J29

J31
J30

PCIE_RX0P
PCIE_RX0N

PCIE_RX1P
PCIE_RX1N

PCIE_RX2P
PCIE_RX2N

PCIE_RX3P
PCIE_RX3N

PCIE_RX4P
PCIE_RX4N

PCIE_RX5P
PCIE_RX5N

PCIE_RX6P
PCIE_RX6N

PCIE_RX7P
PCIE_RX7N

PCIE_RX8P
PCIE_RX8N

PCIE_RX9P
PCIE_RX9N

PCIE_RX10P
PCIE_RX10N

PCIE_RX11P
PCIE_RX11N

PCIE_RX12P
PCIE_RX12N

PCIE_RX13P
PCIE_RX13N

PCIE_RX14P
PCIE_RX14N

PCIE_RX15P
PCIE_RX15N

PCIE_REFCLKP
PCIE_REFCLKN

NC_SMBCLK
NC_SMBDATA

PERSTB

M72-S/M82-S
U29A

POWER
+PCIE_VDDR=1.2V
+VDD_MEM1.8V=1.8V
+VGA_CORE=1.0~1.1V - M62S,M71S

0.95~1.1V - M72S

17

VGA Core
VGA Core

A A

+1.8V
+1.8V
+1.8V

BPP
VDDC

PCIE_VDDR
PCIE_PVDD
VDDR1

PROJECT : QT8

3.3V_Delay

5

VDDR3

4

20ms 20ms

3

2

NB5/RD5

Quanta Computer Inc.

Size Document Number Rev
Custom

M7X/M8X_PCIE_Interface

Date: Sheet

1

of

17 45Tuesday, February 19, 2008

1A

5

R100 1K/F_4

R522 10K/F_4

R87 10K/F_4

D D

R95 10K/F_4

MEM_ID[3:0] Vendor Type Vendor P/N

0000 Qimonda (Infineon) 16*16 HYB18T256161BF-25

0001 Qimonda (Infineon) 32*16-500MHZ HYB18T512161B2F-20

0010 Hynix 16*16 HY5PS561621AFP-25

0011 Hynix 32*16-500MHZ H5PS5162FFR-20L

0100 Samsung 16*16 K4N56163QG-ZC25

0101 Samsung 32*16-500MHZ K4N51163QG-HC20

0110 Reserved
0111 Reserved
1000 Reserved
1001 Reserved
1010 Reserved
1011 Reserved
1100 Reserved
1101 Reserved
1110 Reserved
1111 Reserved

PWRCNTL1

H

C C

0

M

0

M

1

L

1

BBEN

L

0 V-CORE

H

1

DPLL_PVDD
Phase Lock Loop
Power
Dedicated analog
power pin for
display PLLs.

1.8 V ± 3%

B B

PCIE_PVDD
PCI-E PLL power.

1.8 V ± 5%

+1.1V

C741 *22P/50V_4

CL=20PF

C735

*22P/50V_4

+VGA_CORE

Y7
*27MHZ

MPVDD
Memory Phase Lock Loop Power
Same as VDDC

DPLL_VDDC
Phase Lock Loop Power
Dedicated digital power pin for display PLLs.

1.1 V ± 5%

A A

GPIO_24_JMODE

ROMCS#

GPIO22(ROMCS#)
PD without external VBIOS ROM

BBEN

TEMP_FAIL

PWRCNTL0

0 1.1V

1

0

1

BBP

+1.8V

+1.8V

BLM18PG181SN1D(180,1.5A)_6

+1.8V

L71

BLM18PG181SN1D(180,1.5A)_6

L79

BLM18PG181SN1D(180,1.5A)_6

L18

EVGA-XTALI

R468
*10M_6

2 1

EVGA-XTALO

5

NA- M62S,M71S
PD 1K- M72S

NA - M64/M62, M71
BBEN- M66
BBEN(10K PD)- M76

NA- M62S,M71S
PU to 3.3V- M72S

V-CORE

1.0V

1.0V

0.9V

BLM18PG181SN1D(180,1.5A)_6

L17

10U/6.3V_8

1.8V(40mA)

C743

C747

10U/6.3V_8

1U/10V_4

C822

10U/6.3V_8

C106
10U/6.3V_8

For Int Clk 27Mhz

C824

1U/10V_4

1.1V(100mA)

C169

1U/10V_4

C114

GFX_CORE_CNTRL142
BBEN20

1.8V(40mA)

C147

0.1U/10V_4

C746

0.1U/10V_4

C823

0.1U/10V_4

C161

0.1U/10V_4

GFX_CORE_CNTRL042

OSC_SPREAD2

TEMP_FAIL5

VDDC(345mA)

+1.8V

4

+VDDR4

R495
R496 *10K/F_4
R493 *10K/F_4

R492 *10K/F_4

GPIO019
GPIO119

T151
T18
T152

GPIO519

LVDS_BLON10,23

GPIO819
GPIO919

T153

GPIO1119
GPIO1219
GPIO1319

T154

T37

+3V

1.8V+R6043(249R)=1.8V/3=0.6V

R75 499/F_4
R76 249/F_4

EVGA-XTALI2

4

Memory ID

10K/F_4

R93 0_4

R526 0_4

HPD3

R99 0_4

R91

T36
T34
T35
T38

T123

PSYNC19

10K/F_4

PSYNC

MEM_ID0
MEM_ID1
MEM_ID2
MEM_ID3

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5

EXT_LVDS_BLON
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
HDMI_HP2

OSC_SPREAD
VGA_ALERT

TEMP_FAIL
PWRCNTL_1
BBEN
ROMCS#
GPIO_23_CLKREQb
GPIO_24_JMODE

GENERICC

+0.6V_M72_VREFG

+1.8V_DPLL_PVDD
DPLL_PVSS

+1.8V_VPCIE_PVDD

+VGACORE_MPVDD
MPVSS

+1.1V_DPLL_VDDC
EVGA-XTALI
EVGA-XTALO

R671K/F_4

MBCLK25,35
MBDATA25,35

VTHM_CLK

+3V_DELAY

U29B

AJ4

TXCM_DPA0P

AJ5

TXCP_DPA0N

AL5

TX0M_DPA1P

AK5

TX0P_DPA1N

AL6

TX1M_DPA2P

AK6

TX1P_DPA2N

AK8

TX2M_DPA3P

AL8

TX2P_DPA3N

AD9

DVALID

AE7

PSYNC_NEW

AK4

DVPCNTL_MVP_0

AL3

DVPCNTL_MVP_1

V2

DVPCNTL_0

V1

DVPCNTL_1

W3

DVPCNTL_2

W1

DVPCLK

Y1

DVPDATA_0

Y2

DVPDATA_1

Y3

DVPDATA_2

AA2

DVPDATA_3

AA3

DVPDATA_4

AB1

DVPDATA_5

AB2

DVPDATA_6

AB3

DVPDATA_7

AC1

DVPDATA_8

AC3

DVPDATA_9

AD1

DVPDATA_10

AD2

DVPDATA_11

AD3

DVPDATA_12

AF3

DVPDATA_13

AG3

DVPDATA_14

AH3

DVPDATA_15

AG1

DVPDATA_16

AH2

DVPDATA_17

AH1

DVPDATA_18

AJ3

DVPDATA_19

AJ1

DVPDATA_20

AJ2

DVPDATA_21

AK2

DVPDATA_22

AK3

DVPDATA_23

Y4

GPIO_0

V3

GPIO_1

V4

GPIO_2

V5

GPIO_3

U3

GPIO_4

U2

GPIO_5

T4

GPIO_6

T5

GPIO_7_BLON

T7

GPIO_8_ROMSO

T8

GPIO_9_ROMSI

R1

GPIO_10_ROMSCK

R2

GPIO_11

R3

GPIO_12

P1

GPIO_13

P3

GPIO_14_HPD2

N1

GPIO_15_PWRCNTL0

N2

GPIO_16_SSIN

P4

GPIO_17_THERMAL_INT

P7

GPIO_18_HPD3

P8

GPIO_19_CTFB

P5

GPIO_20_PWRCNTL1

V7

GPIO_21_BB_EN

N3

GPIO_22_ROMCSB

Y5

GPIO_23_CLKREQB

M4

GPIO_24_JMODE

M5

GPIO_25_TDI

M7

GPIO_26_TCK

M8

GPIO_27_TMS

L8

GPIO_28_TDO

Y8

GEN_A

Y7

GEN_B

V8

GEN_C

AH6

GEN_D_HPD4

AG6

GEN_E

AC11

VREFG

AH12

DPLL_PVDD

AG12

DPLL_PVSS

AH31

PCIE_PVDD

A9

MPVDD

B9

MPVSS

AE12

DPLL_VDDC

AJ31

XTALIN

AJ30

XTALOUT

AH26

TESTEN

AD12

PLLTEST

M72-S/M82-S

R524 0_4
R525 0_4

R518 *0_4
R519 *0_4

R516 10K/F_4

INTEGRATED
TMDS/DP PORT

EXT TMDS
DVO

GENERAL
PURPOSE
I/O

PLL &
XTAL

TEST

3

PART 2 OF 6

DAC1 / CRT

DAC2 (TV/CRT2)

SERIAL
BUSES

DDC3DATA_DP3_AUXN

DDC3CLK_DP3_AUXP

DDC4DATA_DP4_AUXN

DDC4CLK_DP4_AUXP

THERMAL

MBCLK2
MBDATA2VTHM_DAT
VGA_ALERT

3

AK9

TXCM_DPB0P

AL9

TXCP_DPB0N

AJ9

TX0M_DPB1P

AJ10

TX0P_DPB1N

AL10

TX1M_DPB2P

AK10

TX1P_DPB2N

AL11

TX2M_DPB3P

AK11

TX2P_DPB3N

AL7

DPA_PVDD

AK7

DPA_PVSS

AE11

DPB_PVDD

AF11

DPB_PVSS

AJ12

DPA_VDDR_1

AJ13

DPA_VDDR_2

AK13

DPB_VDDR_1

AL13

DPB_VDDR_2

AL12

DPB_VSSR_5

AK12

DPB_VSSR_4

AJ11

DPB_VSSR_3

AH9

DPB_VSSR_2

AH11

DPB_VSSR_1

AJ8

DPA_VSSR_5

AF7

DPA_VSSR_4

AG7

DPA_VSSR_3

AJ7

DPA_VSSR_2

AH7

DPA_VSSR_1

AG11

DP_CALR

AA8

HPD1

AL28

R

AK28

RB

AL27

G

AK27

GB

AL26

B

AK26

BB

AK29

HSYNC

AK30

VSYNC

AJ28

RSET

AL29

AVDD

AH28

AVSSQ

AJ27

VDD1DI

AJ26

VSS1DI

AL17

R2

AK17

R2B

AL15

G2

AK15

G2B

AL14

B2

AK14

B2B

AJ17

C

AJ15

Y

AJ14

COMP

AE16

V2SYNC

AF16

H2SYNC

AH14

A2VDD

AH16

A2VDDQ

AG16

A2VSSQ

AF18

VDD2DI

AE18

VSS2DI

AG14

R2SET

AA5

SCL

AA4

SDA

AJ29

DDC1DATA

AH29

DDC1CLK

AC5

DDC2DATA

AC4

DDC2CLK

AF4
AH4

AF9
AG9

AE14

TS_FDO

AE5

DPLUS

AE4

DMINUS

Thermal Sensor

8

SMCLK

7

SMDATA

6

-ALT

5

GND

I2C ADDRESS: 9AH

TXC_HDMI_L­TXC_HDMI_L+

TX0_HDMI_L­TX0_HDMI_L+

TX1_HDMI_L­TX1_HDMI_L+

TX2_HDMI_L­TX2_HDMI_L+

+1.8V_TPVDD

DPB_PVDD

DPA_B_VDDR

DPA_B_VDDR

DPA_VSSR_2

TMDS_HPD
L_CRT_R

L_CRT_G

L_CRT_B

R484 499/F_4

+1.8V_A2VDD_Q

+VDDD1

DAC2_VSY
DAC2_HSY

+1.8V_A2VDD_Q

R69 715/F_4

VGATHRM+
VGATHRM-

G781-1P8@EV

Remove 180R
SHUNT RESISTOR
for M82-S
from AMD Jackson
confirm

ENABLE HD AUDIO ( M8X-M )

R488 *0_4

R476 0_4

150 OHM

L_CRT_R

L_CRT_G

L_CRT_B

+VDDD1

C127

0.1U/10V_4

Del R470, R478,
R450, R472, R471,
R469, R451 for TP on
PV

+1.8V_A2VDD_Q

VTHM_DAT
VTHM_CLK

T12
T11

HDMI_SDA 23
HDMI_SCL 23

781-1_3V

U30

1

VCC

2

DXP

3

DXN

4

-OVT

-VGATHRM

2

TXC_HDMI_L- 23
TXC_HDMI_L+ 23

TX0_HDMI_L- 23
TX0_HDMI_L+ 23

TX1_HDMI_L- 23
TX1_HDMI_L+ 23

TX2_HDMI_L- 23
TX2_HDMI_L+ 23

+1.8V_TPVDD

DPB_PVDD

DPA_B_VDDR

DPA_B_VDDR

DPA_PVDD / DPB_PVDD
DP/TMDS PLL Power (Link A)
DP/TMDS PLL Power (Link B)

1.8 V ± 3%

DPA_VDDR / DPB_VDDR
DP/TMDS Transmitter Power (Link A)
DP/TMDS Transmitter Power (Link B)

1.1 V ± 3%

VIP_3

M82-S

TMDS_HPD

R65 *100K/F_4
R463 150/F_4
R449 0_4

R462 150/F_4
R448 0_4

R461 150/F_4
R447 0_4

C111

0.1U/10V_4

A2VDDQ
DAC2 Band Gap (clean) power supply.

1.8 V ± 5%

T13

T10

+VDDD1

R511 *4.7K_4

R510 *4.7K_4

DDC 3V tolerance

--DDC1,DDC2,SDA/SCL
DDC 5V tolerance

--DDC3,DDC4

R509 200/F_6

C790 0.1U/10V_4

VGATHRM+

C793
2200P/50V_4

VGATHRM-

R513 10K/F_4

+VDDD1

2

C171

0.1U/10V_4

w/s

VDD2DI
DAC2 Digital Power.

1.8 V ± 5%

EDIDCLK 10,23

EDIDDATA 10,23

DDCDATA 10,24

DDCCLK 10,24

+3V_DELAY

+3V_DELAY

+3V_DELAY

+3V_DELAY

VIP_3 19

TMDS_HPD 10,23

CRT_R 10,24

CRT_G 10,24

CRT_B 10,24

HSYNC_COM 10,19,24
VSYNC_COM 10,19,24

+1.8V_A2VDD_Q

A2VDD
DAC2 Analog Power.

3.3 V ± 5%

AVDD
DAC1 Analog Power
Dedicated power for DAC1.

1.8 V ± 5%

VDD1DI
DAC1 Digital Power.

1.8 V ± 5%

C136

Del L25 for

0.1U/10V_4

TP on PV

Del R84, R85,
R466, R467
for TP on PV

10 / 10

Del R481, R482, R483,
R68, R464, R486 for TP
on PV

+1.8V_A2VDD_Q

+1.8V_A2VDD_Q

C129

0.1U/10V_4

DPB_PVDD

C165

+3V_DELAY

0.1U/10V_4

+VDDD1

+VDDD1

C110

0.1U/10V_4

+1.8V_TPVDD

+1.8V_TPVDD

C113

0.1U/10V_4

DPA_B_VDDR

DPA_B_VDDR

C740

0.1U/10V_4

Size Document Number Rev
Custom

NB5/RD5

Date: Sheet

1

18

1.8V(65mA)

L16

BLM18PG181SN1D(180,1.5A)_6

C98

C168

10U/6.3V_8

1U/10V_4

DPB_PVDD

C182
1000P/50V_4

C135

1U/10V_4

C108
1000P/50V_4

C742
1000P/50V_4

PROJECT : QT8

Quanta Computer Inc.

M7X/M8X_Main

1.8V(20mA)

L24

BLM18PG181SN1D(180,1.5A)_6
C145
10U/6.3V_8

1.8V(100mA)

L15

BLM18PG181SN1D(180,1.5A)_6

C97
10U/6.3V_8

1.8V(20mA)

L20

C134
10U/6.3V_8

1.1V(S100,D200mA)

L70

BLM18PG181SN1D(180,1.5A)_6

C737

10U/6.3V_8

1

+1.8V

BLM18PG181SN1D(180,1.5A)_6

18 45Tuesday, February 19, 2008

+1.8V

+1.8V

+1.1V

of

+1.8V

1A

5

U29E

AA26

PCIE_VSS_1

AA29

PCIE_VSS_2

AC26

PCIE_VSS_3

AD31

PCIE_VSS_4

AE29

PCIE_VSS_5

AE30

PCIE_VSS_6

AE31

PCIE_VSS_7

D D

C C

B B

F28
G26
G29
G30
G31
H29

M26
M29

P26
R29
R30
R31
T26
U29
V26
Y26
Y29
Y30
Y31

A13
C18

A24
A30

AA1
AA11
AA14
AA17
AA20

AA6

AC2
AC7

AE3

AL4
AD14
AF12
AF14
AD16
AD18

AE6

AG2

AE9
AH25

AK1
AK31

AJ6

AL2

AL30

C13

J25
J26
L26
L29
L30
L31

A2

B1

PCIE_VSS_8
PCIE_VSS_9
PCIE_VSS_10
PCIE_VSS_11
PCIE_VSS_12
PCIE_VSS_13
PCIE_VSS_14
PCIE_VSS_15
PCIE_VSS_16
PCIE_VSS_17
PCIE_VSS_18
PCIE_VSS_19
PCIE_VSS_20
PCIE_VSS_21
PCIE_VSS_22
PCIE_VSS_23
PCIE_VSS_24
PCIE_VSS_25
PCIE_VSS_26
PCIE_VSS_27
PCIE_VSS_28
PCIE_VSS_29
PCIE_VSS_30
PCIE_VSS_31
PCIE_VSS_32

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32

Part 5 of 6

PCI-Express GND

VSS_100
VSS_101
VSS_102

VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99

B25
J8
B5
D11
C17
C22
C27
D29
C3
C6
D3
D28
F29
D4
F11
F12
F14
F16
F18
F20
F21
F23
F25
F7
F9
G3
G6
H23
J3
J4
J6
K1
L12
L15
L18
L21
L6
M11
M14
M17
M20
M6
P12
P15
P18
P21
P6
AC21
R14
R17
R20
T6
U1
U12
U15
U18
U21
AE20
V14
V17
V20
P2
V6
W2
Y12
Y15
Y18
Y21
Y6
M9

CORE GND

M72-S/M82-S

A A

4

1.8V -(300mA)

L14 BLM18PG181SN1D(180,1.5A)_6

+1.8V

1.8V(100mA)

L19 BLM18PG181SN1D(180,1.5A)_6

+1.8V

LVDDR
LVDS Output Driver Analog Power Supply

1.8 V ± 3%

LVDDC
LVDS Output Driver Digital Power Supply

1.8 V ± 3%

LPVDD
Analog Power for
transmitter PLL. It should
be a power for the PLL
block of the macro.

1.8 V ± 3%

CONFIGURATION STRAPS

PIN DESCRIPTION OF DEFAULT SETTINGS

PCIE FULL TX OUTPUT SWINGGPIO0

PCIE TRANSMITTER DE-EMPHASIS ENABLEDGPIO1
GPIO5
VIP3
GPIO8

Allows eitherPCIe 2.5GT/s or 5GT/s operation

ENABLE HD AUDIO ( M8X-M )

ENABLE HD AUDIO ( M82-S )
HSYNC ENABLED HDMI

Memory Aperture size

GPIO9

BIOSROM

0
0
0
0
0
0

C109

1U/10V_4

C133

1U/10V_4

128M

256M

64M
32M
512M
1G
2G
4G

3

C103

1U/10V_4

C125

1U/10V_4

+1.8V_TPVDD

+LVDDR_1-2

+1.8V_LVDDC

C143
100P/50V_4

C123

0.1U/10V_4

C144

1U/10V_4

1.8V(40mA)

C132

1U/10V_4

AG20

AG18

C155

0.1U/10V_4

GPIO13 GPIO12 GPIO11

ROMIDCFG0ROMIDCFG1ROMIDCFG2

0

00

0

0
0

1

11

0

100

0

001

110

11

0

111

AF20

AJ18

AH20

AF23
AF21

AL18
AJ22

AJ25
AK18
AK23
AK25

AJ21

AL23

AL25

AH18

M82-S

0
0

REV

1
1
1

U29F

LVDDR_1
LVDDR_2

LVDDC_1
LVDDC_2

LVSSR_1
LVSSR_2
LVSSR_3
LVSSR_4
LVSSR_5
LVSSR_6
LVSSR_7
LVSSR_8
LVSSR_9
LVSSR_10
LVSSR_11

LPVDD
LPVSS

M72-S/M82-S

2

PART 6 OF 6

Control

LVDS channel

VARY_BL

DIGON

TXCLK_UP

TXCLK_UN
TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N

TXCLK_LP

TXCLK_LN

TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N

GPIO018
GPIO118
GPIO518

VIP_318

GPIO818

HSYNC_COM10,18,24

VSYNC_COM10,18,24

PSYNC18

AA7
AC6

AD21
AE21
AJ24
AJ23
AK24
AL24
AG21
AH21
AG23
AH23

AL19
AK19
AJ20
AJ19
AK20
AL20
AK21
AL21
AK22
AL22

GPIO918
GPIO1318
GPIO1218
GPIO1118

R83 10K/F_4

R890_4
R800_4

EXT_TXUCLKOUT+ 23
EXT_TXUCLKOUT- 23
EXT_TXUOUT0+ 23
EXT_TXUOUT0- 23
EXT_TXUOUT1+ 23
EXT_TXUOUT1- 23
EXT_TXUOUT2+ 23
EXT_TXUOUT2- 23

EXT_TXLCLKOUT+ 23
EXT_TXLCLKOUT- 23
EXT_TXLOUT0+ 23
EXT_TXLOUT0- 23
EXT_TXLOUT1+ 23
EXT_TXLOUT1- 23
EXT_TXLOUT2+ 23
EXT_TXLOUT2- 23

GPIO0
GPIO1
GPIO5
VIP_3
GPIO8

SI-1 Modified -- follow AMD
reference schematic change for
reduce leakage to VDDR3 BUS

GPIO9
GPIO13
GPIO12
GPIO11

1

DPST_PWM 10,23
DISP_ON 10,23

R92 *10K/F_4
R514 *10K/F_4
R517 *10K/F_4
R475 *10K/F_4
R94 10K/F_4
R465 10K/F_4
R485 *10K/F_4
R79 *10K/F_4

R90 *10K/F_4
R523 *10K/F_4
R521 *10K/F_4
R520 10K/F_4

19

+3V_DELAY

+3V_DELAY

It is a shared pin strap with CONFIG[2:0] if BIOS_ROM_EN is set to 0.

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

5

4

3

2

NB5/RD5

M7X/M8X_GND / LVDS/ Straps

Date: Sheet

1

19 45Tuesday, February 19, 2008

1A

of

5

4

3

2

1

20

D D

VDD_CT -- Level
translation between
core and I/O,
excluding memory
receivers.1.8 V ± 5%

C C

VDD_R3 --IO power for

3.3 V pins (e.g.
GPIO’s). 3.3 V ± 5%

MAINON27,35,39,42,43,44

HWPG23,35,38,39,41,42

B B

A A

+3V

D8 CH501H-40PT

R42 68.1K_4

*CH501H-40PT L-F

R45 *75K/F_4

VDD_R4 -- Power for DVPDATA_[23:12] - external
TMDS or GPIO; corresponds to
DVOA_MSB_VMODE register bit; '1' - 3.3 V(default);
'0' - 1.8 V; 1.8 V ± 5% or 3.3 V ± 5%

VDD_R5 -- Power for DVP control pins
(DVPCNTL_[0-2] and DVPCLK) and
DVPDATA_[11:0] - external TMDS or GPIO;
corresponds to DVOA_LSB_VMODE register bit;
'1' - 3.3 V(default); '0' - 1.8 V; 1.8 V
± 5% or 3.3 V ± 5%

VDDRH_1 & VDDRH_2 --Dedicated power
pins for memory clock pads for each
channel. Should have the same
voltage level as VDDR1.

5

VDDR1-- I/O power for the memory interface on M82 1.8 V ± 5%

1.8V(1.1A)

C820

C438

10U/6.3V_8

10U/6.3V_8

1.8V(110mA)

L28 BLM18PG181SN1D(180,1.5A)_6

Q34

P-MOS,2.6A

AO3409

1

2

C58

0.1U/10V_4

2

3

1

+1.8V

+1.8V

+1.8V

Gated 3.3V
50mA by
VDDC

3

L94
BLM18PG181SN1D(180,1.5A)_6

SI-1 Modified -- follow AMD
reference schematic change

1.8/3.3V 150mA

L95

BLM18PG181SN1D(180,1.5A)_6

Q8
2N7002E

+1.8V

L80 BLM18PG181SN1D(180,1.5A)_6

C339

10U/6.3V_8

L30 BLM18PG181SN1D(180,1.5A)_6

4

C311

0.1U/10V_4

+3V_DELAY

+VDDR4

+VDDR5

C826

10U/6.3V_8

C312

10U/6.3V_8

+1.8V_VDD_CT

D9

+1.8V

+1.8V

R443
100K/F_4

21

21

C326

0.1U/10V_4

C314

10U/6.3V_8

C174

C935
*10U/6.3V_8

C938
*10U/6.3V_8

C825

0.1U/10V_4

+VGA_CORE

C263

1U/10V_4

1U/10V_4

C780

1U/10V_4

C346
10U/6.3V_8

+1.8V_VDD_CT

C257
1000P/50V_4

C936

1U/10V_4

C300

1U/10V_4

C298

0.1U/10V_4

+3V_DELAY

C184

1U/10V_4

0.1U/10V_4

C291

0.1U/10V_4

C191

0.1U/10V_4

C937

0.1U/10V_4

C781

1U/10V_4

+1.8V_VDDRH_1

C347

0.1U/10V_4

+1.8V_VDDRH_2

C327

C779

0.1U/10V_4

BBN -0.75V 100mA

+VBBP

1.5/1.8V 120mA

C212

C260

1U/10V_4

0.1U/10V_4

*BLM18PG181SN1D(180,1.5A)_6
L93

Q61
2N7002E

3

2

BBEN18

C305

1U/10V_4

1

U29D

A15
A22
A28

A4
A8
B8
C9
D1

H1
H11
H12
H14
H16
H18
H20
H21
B31

M1

AA9

Y9

V9

T9

J11
J20
J21

L9

AC18
AC16
AC14
AC12

AF1
AF2

AE1
AE2

M2
M3

L4

AD11

A10
A19

B10
B19

V11
U11

R11
P11

+VGA_CORE

3

VDDR1_1
VDDR1_2
VDDR1_3
VDDR1_4
VDDR1_5
VDDR1_6
VDDR1_7
VDDR1_8
VDDR1_9
VDDR1_10
VDDR1_11
VDDR1_12
VDDR1_13
VDDR1_14
VDDR1_15
VDDR1_16
VDDR1_17
VDDR1_18

VDD_CT_1
VDD_CT_2
VDD_CT_3
VDD_CT_4
VDD_CT_5
VDD_CT_6
VDD_CT_7
VDD_CT_8

M72-S/M82-S

VDDR3_1
VDDR3_2
VDDR3_3
VDDR3_4

VDDR4_1
VDDR4_2

VDDR5_1
VDDR5_2

RSVD_1
RSVD_2
RSVD_3
RSVD_4

VDDRH_1
VDDRH_2

VSSRH_1
VSSRH_2

BBN_1
BBN_2

BBP_1
BBP_2

+VBBP

I/O Internal

Memory

I/O

Clock

SI-1 modified -- ADD
power play function

3

2

3

2

1

PART 4 OF 6

Memory I/O

P
O
W
E
R

Back Bias

Q62
ME2303T1

1

+1.8V

R752 100K/F_4

1 2

Q63
2N7002E

PCIE_VDDR_1
PCIE_VDDR_2
PCIE_VDDR_3
PCIE_VDDR_4
PCIE_VDDR_5
PCIE_VDDR_6
PCIE_VDDR_7
PCIE_VDDR_8

PCIE_VDDC_1
PCIE_VDDC_2
PCIE_VDDC_3
PCIE_VDDC_4
PCIE_VDDC_5
PCIE_VDDC_6
PCIE_VDDC_7
PCIE_VDDC_8

PCIE_VDDC_9
PCIE_VDDC_10
PCIE_VDDC_11

PCI-Express

PCIE_VDDC_12

VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8

VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15

Core

VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_24
VDDC_25
VDDC_26
VDDC_27
VDDC_28
VDDC_29
VDDC_30
VDDC_31
VDDC_32
VDDC_33

VDDCI_1
VDDCI_2
VDDCI_3
VDDCI_4

+5V

AF30
AF31
AF29
AF27
AF28
AG29
AG30
AG31

AA23
AC24
AC25
AE26
AE27
AE28
L23
M23
P23
T23
V23
Y23

L11
L14
L17
L20
M12
M15
M18
M21
AC20
P14
P17
P20
R12
R15
R18
R21
AD20
U14
U17
U20
V12
V15
V18
V21
Y11
Y14
Y17
Y20
AA12
AA15
AA18
AA21
P9

J12
J14
J16
J18

BBP -- Connect to VBBP back bias regulator / generator.
If back bias is not used, connect directly to VDDC.

Back Bias Enabled:
(GPIO_21_BB_EN = 3.3 V):

1.5 V or 1.8 V

Back Bias Disabled:
(GPIO_21_BB_EN = 0 V):
VDDC

PCIE_VDDR--PCI-E I/O power. 1.8 V ± 5%

+1.8V_PCIE_VDDR

+1.8V_PCIE_VDDR

C759
*0.1U/10V_4

+1.1V_PCIE_VDDC

C244

0.1U/10V_4

VDDC+VDDCI

0.95~1.1V(15A peak )( Ripple < 87.2mV)

C222
1U/10V_4

C210
1U/10V_4

C233
1U/10V_4

C181
1U/10V_4

C294

0.1U/10V_4

2

C760

1U/10V_4

C219

0.1U/10V_4

C232
1U/10V_4

C262
1U/10V_4

C198
1U/10V_4

C265
1U/10V_4

C282

0.1U/10V_4

NB5/RD5

1.8V(400mA)

L74

BLM18PG181SN1D(180,1.5A)_6

C761

10U/6.3V_8

+1.1V_PCIE_VDDC

C186

1U/10V_4

C215

C227

1U/10V_4

1U/10V_4

C261

C266

1U/10V_4

1U/10V_4

C228

C200

1U/10V_4

1U/10V_4

C211

C229

1U/10V_4

1U/10V_4

+VDDCI

C283

1U/10V_4

Size Document Number Rev
Custom

Date: Sheet

+1.8V

1.1V(1.0A)

L21

BLM18PG181SN1D(180,1.5A)_6

C138

C207

1U/10V_4

+VGA_CORE

10U/6.3V_8

L27

C293

10U/6.3V_8

C73

10U/6.3V_8

10U/6.3V_8

10U/6.3V_8

PCIE_VDDC--PCI-E

10U/6.3V_8

Digital Power
Supply (Either 1.0
V or 1.1 V) 1.0 V

-5% to 1.1 V +5%

VDDC--Dedicated core
power, provides power
to the internal
logic. 0.9 V - 1.2 V
(± 5%)

C86

C91

C90

BLM18PG181SN1D(180,1.5A)_6

VDDCI--Isolated (clean)
core power for the l/O
logic. Voltage level
should match that of
VDDC. POWER Same as VDDC

PROJECT : QT8

Quanta Computer Inc.

M7X/M8X_Power_and_NC

1

+1.1V

+VGA_CORE

20 45Tuesday, February 19, 2008

1A

of

5

QSA#[7..0]
QSA[7..0]
DQMA#[7..0]
MDA[63..0]
MAA[12..0]

A_BA0
A_BA1

+1.8V

R116

R113

0.1U/10V_4

ODTA0
ODTA1

RASA0#
RASA1#

CASA0#
CASA1#

WEA0#
WEA1#

CSA0#_0

CSA1#_0

CKEA0
CKEA1

CLKA0
CLKA0#

CLKA1
CLKA1#

100/F_4

100/F_4

C817

MVREFD

+1.8V

R532

100/F_4

R529

100/F_4

MVREFS

ODTA022
ODTA122

RASA0#22

D D

C C

B B

A A

RASA1#22
CASA0#22

CASA1#22

WEA0#22
WEA1#22

CSA0#_022

CSA1#_022

CKEA022
CKEA122

CLKA022

CLKA0#22

CLKA122

CLKA1#22

QSA#[7..0]22

QSA[7..0]22

DQMA#[7..0]22

MDA[63..0]22
MAA[12..0]22

A_BA022
A_BA122

0.1U/10V_4

5

C338

4

MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63

R98 4.7K_4
R102 4.7K_4
R97 240/F_4

Change MEMTEST to 240 1%
ohm to GND , AMD update

4

E29
E30
E31
D31
C29
B29
B30
A29
E26
D26
E25
D25
G23
G21
E21
D21
C28
B28
B27
A27
C25
A25
C24
B24
C23
B23
A23
B22
C20
B20
A20
C19

F30
F31

C8
C7
B7
A7
A5
C4
B4
A3
G9
E9
D9
G7
G5

F5

G4

F4
B3
B2
C2
C1
E3

F3

F2

F1
G2
G1
H3
H2
K2

L3

L2

L1

L5

L7

J7

U29C

DQ_0
DQ_1
DQ_2
DQ_3
DQ_4
DQ_5
DQ_6
DQ_7
DQ_8
DQ_9
DQ_10
DQ_11
DQ_12
DQ_13
DQ_14
DQ_15
DQ_16
DQ_17
DQ_18
DQ_19
DQ_20
DQ_21
DQ_22
DQ_23
DQ_24
DQ_25
DQ_26
DQ_27
DQ_28
DQ_29
DQ_30
DQ_31
DQ_32
DQ_33
DQ_34
DQ_35
DQ_36
DQ_37
DQ_38
DQ_39
DQ_40
DQ_41
DQ_42
DQ_43
DQ_44
DQ_45
DQ_46
DQ_47
DQ_48
DQ_49
DQ_50
DQ_51
DQ_52
DQ_53
DQ_54
DQ_55
DQ_56
DQ_57
DQ_58
DQ_59
DQ_60
DQ_61
DQ_62
DQ_63

MVREFD
MVREFS

TEST_MCLK
TEST_YCLK
MEMTEST

Part 3 of 6

MEMORY
INTERFACE

write strobe read strobe

DRAM_RST

M72-S/M82-S

3

MA_0
MA_1
MA_2
MA_3
MA_4
MA_5
MA_6
MA_7
MA_8

MA_9
MA_10
MA_11

MA_BA0
MA_BA1
MA_A12
MA_BA2

DQMb_0
DQMb_1
DQMb_2
DQMb_3
DQMb_4
DQMb_5
DQMb_6
DQMb_7

QS_0
QS_1
QS_2
QS_3
QS_4
QS_5
QS_6
QS_7

QS_0B
QS_1B
QS_2B
QS_3B
QS_4B
QS_5B
QS_6B
QS_7B

ODT0

ODT1

CLK0
CLK1

CLK0b
CLK1b

RAS0b
RAS1b

CAS0b
CAS1b

CS0b_0
CS0b_1

CS1b_0
CS1b_1

CKE0

CKE1

WE0b

WE1b

3

B14
A14
B13
E14
B17
A17
C15
G16
E16
C14
A12
B12
C12
D14
B15
G14

D30
G25
C26
C21
C5
D6
D2
K3

C30
D23
B26
B21
B6
E7
E2
J2

C31
E23
A26
A21
A6
D7
E1
J1

E20
C11

A18
A11

B18
B11

G20
D12

D20
E12

E18
G18

G11
E11

D18
G12

D16
C10

J5

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
A_BA0
A_BA1
MAA12
A_BA2

DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7

QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7

QSA#0
QSA#1
QSA#2
QSA#3
QSA#4
QSA#5
QSA#6
QSA#7

ODTA0
ODTA1

CLKA0
CLKA1

CLKA0#
CLKA1#

RASA0#
RASA1#

CASA0#
CASA1#

CSA0#_0

CSA1#_0

CKEA0
CKEA1

WEA0#
WEA1#

R101 4.7K_4

A_BA2 22

SI-1 modified -­for support
1Gbit VRAM ( 64M
X 16 )

+1.8V

2

1

21

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
B

NB5/RD5

2

M7X/M8X/MEM_Interface

Date: Sheet

1

21 45Tuesday, February 19, 2008

1A

of

5

C428

0.1U/10V_4

U5

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS
WEK3VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

BA2

R3

NC#R3

R7

A15

R8

A13

HYB18T512161B2F-20

C423

0.1U/10V_4

U34

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS
WEK3VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

BA2

R3

NC#R3

R7

A15

R8

A13

HYB18T512161B2F-20

C335

0.1U/10V_4

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

C437

0.1U/10V_4

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

A_BA0
A_BA1

MAA12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2

D D

+1.8V

R115

4.99K/F_4

(SSTL-1.8) VREF = .5*VDDQ

M_VREF1

4.99K/F_4

4.99K/F_4

10U/6.3V_8

C357

C341

0.1U/10V_4

+1.8V

C418

10U/6.3V_8

M_VREF3

C816

0.1U/10V_4

SI-1 modified -­for support
1Gbit VRAM ( 64M
X 16 )

SI-1 modified -­for support
1Gbit VRAM ( 64M
X 16 )

C C

R114

4.99K/F_4

B B

+1.8V

R530

R531

A A

MAA1
MAA0

CLKA0#
CLKA0

CKEA0

CSA0#_0
WEA0#
RASA0#
CASA0#
DQMA#2

DQMA#1

ODTA0

QSA2
QSA#2

QSA1
QSA#1

A_BA221

C431
1U/10V_4

A_BA0
A_BA1

MAA11
MAA10

MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0

CLKA1#
CLKA1

CKEA1

CSA1#_0
WEA1#
RASA1#
CASA1#
DQMA#6

DQMA#7

ODTA1

QSA6
QSA#6

QSA7
QSA#7

A_BA221 A_BA221

C393
1U/10V_4

5

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

C322

0.1U/10V_4

MDA9

B9

MDA13

B1

MDA10

D9

MDA15

D1

MDA14

D3

MDA8

D7

MDA12

C2

MDA11

C8

MDA17

F9

MDA22

F1

MDA16

H9

MDA21

H1

MDA23

H3

MDA18

H7

MDA20

G2

MDA19

G8

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

C436

0.1U/10V_4

MDA60

B9

MDA59

B1

MDA61

D9

MDA58MAA12

D1

MDA56

D3

MDA62

D7

MDA57MAA9

C2

MDA63

C8

MDA52

F9

MDA50

F1

MDA53

H9

MDA49

H1

MDA48

H3

MDA54

H7

MDA51

G2

MDA55

G8

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

C429

0.1U/10V_4

+1.8V

C432

0.1U/10V_4

C821

0.1U/10V_4

+1.8V

C365

0.1U/10V_4

4

C371

0.01U/16V_4

4

DDR2 BGA
MEMORY

+1.8V

R159

4.99K/F_4

R161

4.99K/F_4

C422

0.01U/16V_4

+1.8V

R162

4.99K/F_4

R158

4.99K/F_4

(SSTL-1.8) VREF = .5*VDDQ

C425

0.1U/10V_4

SI-1 modified -­for support
1Gbit VRAM ( 64M
X 16 )

M_VREF4

(SSTL-1.8) VREF = .5*VDDQ(SSTL-1.8) VREF = .5*VDDQ

C424

0.1U/10V_4

A_BA221

+1.8V

C439

*10U/6.3V_8

SI-1 modified -­for support
1Gbit VRAM ( 64M
X 16 )

+1.8V+1.8V

C444

10U/6.3V_8

A_BA0
A_BA1

MAA12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0

CLKA0#
CLKA0

CKEA0

CSA0#_0
WEA0#
RASA0#
CASA0#
DQMA#3

DQMA#0

ODTA0

QSA3
QSA#3

QSA0
QSA#0

M_VREF2

A_BA0
A_BA1

MAA12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0

CLKA1#
CLKA1

CKEA1

CSA1#_0
WEA1#
RASA1#
CASA1#
DQMA#4

DQMA#5

ODTA1

QSA4
QSA#4

QSA5
QSA#5

3

C348
1U/10V_4

3

U35

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS
WEK3VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

BA2

R3

NC#R3

R7

A15

R8

A13

HYB18T512161B2F-20

C433
1U/10V_4

U4

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS
WEK3VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

BA2

R3

NC#R3

R7

A15

R8

A13

HYB18T512161B2F-20

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSSQ10

C421

0.1U/10V_4

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSS1
VSS2
VSS3
VSS4
VSS5

C427

0.1U/10V_4

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSS1
VSS2
VSS3
VSS4
VSS5

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

C342

0.1U/10V_4

MDA6
MDA0
MDA7
MDA1
MDA2
MDA5
MDA3
MDA4
MDA28
MDA25
MDA30
MDA27
MDA26
MDA29
MDA24
MDA31

C426

0.1U/10V_4

MDA43
MDA47
MDA41
MDA46
MDA44
MDA42
MDA45
MDA40
MDA35
MDA37
MDA33
MDA38
MDA36
MDA32
MDA39
MDA34

C345

0.1U/10V_4

C435

0.1U/10V_4

C430

0.1U/10V_4

+1.8V

C413

0.1U/10V_4

+1.8V

C404

0.1U/10V_4

2

C407

0.1U/10V_4

2

QSA[7..0]21

QSA#[7..0]21

DQMA#[7..0]21

MDA[63..0]21
MAA[12..0]21

A_BA021
A_BA121

C395

0.01U/16V_4

C434

0.01U/16V_4

QSA[7..0]
QSA#[7..0]

DQMA#[7..0]

MDA[63..0]

MAA[12..0]

A_BA0
A_BA1

CLKA021

CLKA0#21

56.2/F_4

ODTA021
RASA0#21
CASA0#21
WEA0#21
CSA0#_021
CKEA021

ODTA121
RASA1#21
CASA1#21
WEA1#21
CSA1#_021
CKEA121

CLKA121

CLKA1#21

56.2/F_4

DDR2 BGA MEMORY

Size Document Number Rev
C

NB5/RD5

Date: Sheet

1

CLKA0

CLKA0#

R155

R576

R156

56.2/F_4

C440
470P/50V_4

ODTA0

RASA0#
CASA0#
WEA0#
CSA0#_0
CKEA0

ODTA1

RASA1#
CASA1#
WEA1#
CSA1#_0
CKEA1

CLKA1
CLKA1#

R575

56.2/F_4

C857
470P/50V_4

PROJECT : QT8

Quanta Computer Inc.

M7X/M8X/VRAM_A0,A1

1

22

22 45Tuesday, February 19, 2008

of

1A

1

1. If LCD connector near GPU, then place these series Resistors near GPU

2. If LCD connector near N/B, then place these series Resistors near N/B

OPTION SIGNAL FROM NB to LVDS for UMA

LA_CLK10

LA_CLK#10
LA_DATAP010
LA_DATAN010

LA_DATAP110
LA_DATAN110
LA_DATAP210

A A

B B

LA_DATAN210

LB_CLK10

LB_CLK#10
LB_DATAP010

LB_DATAN010
LB_DATAP110
LB_DATAN110
LB_DATAN210
LB_DATAP210

EXT_TXLCLKOUT-19
EXT_TXLCLKOUT+19

EXT_TXLOUT0-19
EXT_TXLOUT0+19
EXT_TXLOUT1-19
EXT_TXLOUT1+19
EXT_TXLOUT2+19
EXT_TXLOUT2-19

EXT_TXUCLKOUT-19
EXT_TXUCLKOUT+19

EXT_TXUOUT0+19
EXT_TXUOUT0-19
EXT_TXUOUT1-19
EXT_TXUOUT1+19
EXT_TXUOUT2-19
EXT_TXUOUT2+19

LA_CLK
LA_CLK#
LA_DATAP0
LA_DATAN0
LA_DATAP1
LA_DATAN1
LA_DATAP2
LA_DATAN2

LB_CLK
LB_CLK#
LB_DATAP0
LB_DATAN0
LB_DATAP1
LB_DATAN1
LB_DATAN2
LB_DATAP2

OPTION SIGNAL FROM M8X to LVDS for discrete

EXT_TXLCLKOUT­EXT_TXLCLKOUT+
EXT_TXLOUT0­EXT_TXLOUT0+
EXT_TXLOUT1­EXT_TXLOUT1+
EXT_TXLOUT2+
EXT_TXLOUT2-

EXT_TXUCLKOUT­EXT_TXUCLKOUT+
EXT_TXUOUT0+
EXT_TXUOUT0­EXT_TXUOUT1­EXT_TXUOUT1+
EXT_TXUOUT2­EXT_TXUOUT2+

2

RP3 *0_4P2R_4
RP1 *0_4P2R_4

RP4 *0_4P2R_4

RP5 *0_4P2R_4

RP2 *0_4P2R_4
RP6 *0_4P2R_4
RP8
RP7 *0_4P2R_4

RP59 0_4P2R_4
RP57 0_4P2R_4
RP60 0_4P2R_4

RP61 0_4P2R_4

RP58 0_4P2R_4
RP62 0_4P2R_4
RP64 0_4P2R_4
RP63 0_4P2R_4

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

4

3

2

1

2

1

4

3
1
3
3
1

1
3
1
3
1
3
3
1

3
1
3
1
1
3
1
3

*0_4P2R_4

2
4
4
2

2
4
2
4
2
4
4
2

4
2
4
2
2
4
2
4

TXLCLKOUT+
TXLCLKOUT­TXLOUT0+
TXLOUT0­TXLOUT1+
TXLOUT1­TXLOUT2+
TXLOUT2-

TXUCLKOUT+
TXUCLKOUT­TXUOUT0+
TXUOUT0­TXUOUT1+
TXUOUT1­TXUOUT2­TXUOUT2+

TXLCLKOUT­TXLCLKOUT+
TXLOUT0­TXLOUT0+
TXLOUT1­TXLOUT1+
TXLOUT2+
TXLOUT2-

TXUCLKOUT­TXUCLKOUT+
TXUOUT0+
TXUOUT0­TXUOUT1­TXUOUT1+
TXUOUT2­TXUOUT2+

3

DISP_ON10,19

LVDS_BLON LID_EC#

LCD_BK12

+3VS5

PDTC144EU

R17

2.2K_4

LCD_BK

R259

*10K/F_4

4

+5VSUS

R14

100K/F_4

Q3

2

R23 1K/F_4

PDTC144EU

+12VALW

R19

330K_6

12

2

Q4

2N7002E

1 3

PN_BLON

2

Q5

1 3

5

AO3404 ID
current

5.8A

1 2

LCDONG

3

1

+3VPCU

PN_BLON

3

N-MOS,5.8A

Q1

AO3404

2

1

C22

0.1U/10V_4

2 1

LCDON#

Del R21 and Pull hi R259 to
+3VS5, add D7 to HWPG on PV

2

D5 CH501H-40PT

2 1

R24 33K_6

D6 CH501H-40PT

2 1

2 1

D7 CH501H-40PT

C16

0.1U/10V_4

+3VLCD

12

R10
22_8

LCDDISCHG

3

Q2
2N7002E

1

BLONCON

HWPG 20,35,38,39,41,42

6

+3V

R401 75R/F_6

+5V

SI-2 modified-delete R402 and
R401 from 0ohm to 75ohm

C6 1000P/50V_4

+3V

EDIDDATA10,18

C678 1000P/50V_4

C28 22P/50V_4

R22 100K/F_4

LID_EC# 34,35LVDS_BLON10,18

PV del logo light

+3V

+LOGO_PWR

+3VLCD

+3VLCD_CON

EDIDDATA
+LOGO_PWR

BLONCON
TXLCLKOUT+

TXLCLKOUT­TXLOUT0+

TXLOUT0­TXLOUT1+

TXLOUT1­TXLOUT2+

TXLOUT2-

DPST_PWM10,19

PWM_VADJ35

7

R8 2.2K_4
R7 2.2K_4

L1

PBY201209T-4A_8

+VIN_BLIGHT

DPST_PWM
PWM_VADJ

+VIN_BLIGHT

41

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41 42

42

R88 *0_4
R96 0_4

*4.7U/6.3V_6

EDIDCLK
EDIDDATA

+3VLCD_CON

C12 10U/6.3V_8
C10 0.1U/10V_4
C13 0.01U/16V_4

+3VLCD_CON

VADJ1

Camera Pin

CN1
LCD CONN

C5

8

23

EDIDCLK 10,18

TXUCLKOUT+
TXUCLKOUT-

TXUOUT0+
TXUOUT0-

TXUOUT1+
TXUOUT1-

TXUOUT2+
TXUOUT2-

VADJ1

C7

0.1U/10V_4

UMA/DISCRETE select for HDMI

From RS780M

C_PEG_TX#159
C_PEG_TX159

C_PEG_TX#149
C_PEG_TX149

C_PEG_TX#139
C_PEG_TX139

C C

C_PEG_TX#129
C_PEG_TX129

From M82-S

TX2_HDMI_L-18
TX2_HDMI_L+18

TX1_HDMI_L-18
TX1_HDMI_L+18

TX0_HDMI_L-18
TX0_HDMI_L+18

TXC_HDMI_L-18
TXC_HDMI_L+18

+5V

D D

1 2

Q36

2N7002E

100K/F_4

3

2

1

1

C_PEG_TX#15

C_PEG_TX15

C_PEG_TX#14
C_PEG_TX14

C_PEG_TX#13
C_PEG_TX13

C_PEG_TX#12
C_PEG_TX12

TX2_HDMI_L­TX2_HDMI_L+

TX1_HDMI_L­TX1_HDMI_L+

TX0_HDMI_L­TX0_HDMI_L+

TXC_HDMI_L­TXC_HDMI_L+

for Layout
concern
,placement close
north bridge

C386 *0.1U/10V_4
C387 *0.1U/10V_4

C388 *0.1U/10V_4
C389 *0.1U/10V_4

C355 *0.1U/10V_4
C344 *0.1U/10V_4

C827 *0.1U/10V_4
C828 *0.1U/10V_4

C794 0.1U/10V_4
C789 0.1U/10V_4

C782 0.1U/10V_4
C786 0.1U/10V_4

C799 0.1U/10V_4
C797 0.1U/10V_4

C768 0.1U/10V_4
C776 0.1U/10V_4

R507 499/F_4
R508 499/F_4
R506 499/F_4
R505 499/F_4
R512 499/F_4
R515 499/F_4
R504 499/F_4R528
R500 499/F_4

2

TX2_HDMI-L
TX2_HDMI+L

TX1_HDMI-L
TX1_HDMI+L

TX0_HDMI-L
TX0_HDMI+L

TXC_HDMI-L
TXC_HDMI+L

TX2_HDMI+

TX2_HDMI-

TX1_HDMI+
TX1_HDMI­TX0_HDMI+
TX0_HDMI­TXC_HDMI+
TXC_HDMI-

TX2_HDMI­TX2_HDMI+

TX1_HDMI­TX1_HDMI+

TX0_HDMI­TX0_HDMI+

TXC_HDMI­TXC_HDMI+

Close to HDMI Connector

for Layout
concern
,placement close
HDMI conn

RP31

TX2_HDMI+L
TX2_HDMI-L

TX1_HDMI-L

TX1_HDMI+L

TX0_HDMI+L
TX0_HDMI-L

TXC_HDMI-L

TXC_HDMI+L

RP23

RP37

RP17

3
1

3
1

3
1

3
1

*0_4P2R_4

4
2

*0_4P2R_4

4
2

*0_4P2R_4

4
2

*0_4P2R_4

4
2

for Layout
concern
,placement close
HDMI conn

UMA RS780M

上

750 ohm CS17502FB19

DIS M82-S

上

499 ohm CS14992FB24

3

TX2_HDMI+
TX2_HDMI-

TX1_HDMI­TX1_HDMI+

TX0_HDMI+
TX0_HDMI-

TXC_HDMI­TXC_HDMI+

+VIN

C15

0.1U/50V_6

Del C748, C756 for
HDMI on PV

HDMI_SCLK
HDMI_SDATA

+5V

4

L2 FBM2125 HM330-T(4A,0.015)_8

C11

0.01U/50V_4C90.1U/50V_6

+5V_HDMVCC+5V_HDMVCC

D31

CH501H-40PT

HDMI_SCLK

21

R494

4.7K_4

21

HDMI PORT

TX2_HDMI+
TX2_HDMI-

TX1_HDMI+
TX1_HDMI-

TX0_HDMI+
TX0_HDMI-

TXC_HDMI+
TXC_HDMI-

L73

1 2

L75

1 2

FUSE1A6V_POLY

F1

12

C128 *0.1U/10V_4

HDMISCL

0_6
0_6

HDMISDA
+5V_HDMVCC

HDMI_DET

5

D32
CH501H-40PT

R503

4.7K_4

HDMI_SDATA

+VIN_BLIGHT

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19

CN29

SHELL1

D2+

SHELL3
D2 Shield
D2­D1+
D1 Shield
D1­D0+
D0 Shield
D0­CK+
CK Shield
CK­CE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET

SHELL4

SHELL2

HDMI CONN

C8

0.1U/50V_6

C14
*10U/25V_12

Change R494,
R503 to 4.7K for
AMD on PV

Discrete DDC4 is 5V
tolerance , the MOSFET
level shifter no need
UMA DDC is 3V
tolerance,the MOSFET
level shifter is need

20
22

HDMI_DDC_CLK
HDMI_DDC_DATA

23
21

6

R753 *0_4
R755 *0_4

HDMI HPD SENSE

TMDS_HPD10,18

TMDS_HPD HDMI_DET

D10

UDZS2.7BTE-17

2 1

R66 20K/F_4

R64
100K/F_4

check 3v or 5v

UMA AND DISCRETE HDMI I2C SELECT

Close to HDMI Connector

RP65 0_4P2R_4

HDMI_SDA18
HDMI_SCL18

1
3

HDMI_SDATA

2

HDMI_SCLK

4

DIS

Change 2N7002

+3V

R680
*2K/04

HDMI_DDC_CLK10

HDMI_SCLK
HDMI_SDATA

HDMI_DDC_DATA10

+3V

R681
*2K/04

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

NB5/RD5

LCD CONN,HDMI CONN

Date: Sheet of

7

+5V

to FDV301N for
AMD on PV

2

HDMI_SCLK

+5V

2

3

Q59

*FDV301N

Q60
*FDV301N

3

UMA

HDMI_SDATA

23 45Tuesday, February 19, 2008

8

1

1

1A

5

CRT PORT

+5V

D D

CRT_R_1_L
CRT_G_1_L
CRT_B_1_L

R400
150/F_4

R399

150/F_4

R398

150/F_4

C677

5.6P/50V_6

C675

5.6P/50V_6

R400 for UAM use 140 ohm
on PV(AMD)

C673 0.1U/10V_4

VSYNC_COM10,18,19

C C

HSYNC_COM10,18,19

follow AMD
reference
schematic change
for reduce
leakage to VDDR3
BUS

B B

+3V_DELAY

+3V

DDCCLK10,18

+3V_DELAY

+3V

DDCDATA10,18

R761 4.7K_4
R25 *4.7K_4

DDCCLK

R762 4.7K_4

R26 *4.7K_4

DDCDATA

L61 BLM18BA470SN1(47,300MA)_6
L60 BLM18BA470SN1(47,300MA)_6
L59 BLM18BA470SN1(47,300MA)_6

C672

5.6P/50V_6

close conn
within 600mils

+5V

1

5

U21

2 4

AHCT1G125DCH

1

5

U22 AHCT1G125DCH

2 4

+3V

2

1

1

+3V

+5VCRT

2

Q6
2N7002E

Q7
2N7002E

F2

FUSE1A6V_POLY

3

3

+5VCRT

4

40 mils

12

2 1

DDCCLK2

DDCDAT2

D25CH501H-40PT

C671

5.6P/50V_6

R2

6.81K_4

+5V_CRT2

+5VCRT

+5VCRT

CRT_R1
CRT_G1
CRT_B1

C674

5.6P/50V_6

R6

6.81K_4

C670

0.1U/10V_4

40 MIL

C676

5.6P/50V_6

PR_VSYNC 37

PR_HSYNC 37

DDCCLK2 37

DDCDAT2 37

3

EMI

R1 0_4
R3 33_4
R4 33_4
R5 0_4

SI-2 modified --Change Layout footprint 12/27

1617

6

111

7

12

2
8

13

3
9

14

4

10

CRTDDCCLK2
CRTVSYNC
CRTHSYNC
CRTDDCDAT2

C1

*470P/50V_4

15

5

CRT CONN
CN20

C2

*47P/50V_4

C3

*47P/50V_4

2

C4
*47P/50V_4

+3V

+5V

D28 *BAV99W

1

3

2

D27 *BAV99W

1

3

2

D26 *BAV99W

1

3

2

D1 *BAV99W

1

3

2

D2 *BAV99W

1

3

2

D3 *BAV99W

1

3

2

D4 *BAV99W

1

3

2

1

24

CRT_R1

CRT_G1

CRT_B1

DDCCLK2

CRTVSYNC

CRTHSYNC

DDCDAT2

PR_RED37
PR_GEN37
PR_BLU37

PR_INSERT#35,37

A A

PR_RED
CRT_R_1_L
PR_GEN
CRT_G_1_L
PR_BLU
CRT_B_1_L

U23

2

IA0

3

IA1

5

IB0

6

IB1

11

IC0

10

IC1

14

ID0

13

ID1

1

SEL

15

/E

VCC
GND

4

YA

7

YB

9

YC

12

YD

16
8

74CBT3257

CRT SWITCH

+5V_SW

CRT_R
CRT_G
CRT_B

R403 0_6

12

C679

0.1U/10V_4

EMI

CRT_R 10,18
CRT_G 10,18
CRT_B 10,18

functioninputs

/E SET

H

Y - port 0

Y - port 1

Disconnect

+5V

R404
10K/F_4

LL
L
HX

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

5

4

3

2

NB5/RD5

CRT

Date: Sheet

1

24 45Tuesday, February 19, 2008

1A

of

8

For 5158E

CLK_48M_CR2

+3VSUS

CARD_LED#26,29

D D

SI-2 modified --Fix
Y5 layout footprint
to XTAL-5X3_2-3_8
(ME placement)

C C

*10K/F_4

R397 *0_4

R321 *100K/F_4

R320 *0_4

R362 *6.19K/F_4

USBP6_CR-13
USBP6_CR+13

C665 *5.6P/50V_4

R395
*270K_4

C668 *5.6P/50V_4

R394

XD_CD#
SP2
SD_CD#

SP4

For 5158

C667

*47P/50V_4

CARD_LEDO

1 2

For 5158

+3VSUS

If SD_DAT1 connect to
SP4 , MOD_SEL need to
let it to N.C

R667 *100K/F_4

*1U/10V_4

XTLO

RREF

XTLO

*12MHz

Y5

XTLI

BG612000717

MODE_SEL

5158_RST#

C925

7

UMA BOM need to add

13

CF_CD#

14

GPIO0

15

CF_D10

16

CF_D9

17

CF_D2

18

CF_D8/SM_CD#

19

CF_D1/XD_CD#

20

CF_D0/SM_WPM#/SD_WP

21

CF_A0/SD_CD#

22

CF_DMACK#

23

CF_A1/XD_D4

24

CF_DMARQ

2

RREF

4

DM

5

DP

48

XTLO

47

XTLI

45

MODE_SEL

44

RST#

U19

SD_DAT2/XD_RE#/CF_D12

SD_DAT3/XD_WE#/CF_D5
SD_DAT4/XD_WP#/CF_D6

SD_DAT5/XD_D0/CF_D14

SD_CLK/XD_D1/MS_CLK/CF_D7

SD_DAT6/XD_D7/MS_D3/CF_D15

SD_DAT7/XD_D2/MS_D2/CF_IOWR#

SD_DAT0/XD_D6/MS_D0/CF_RST#

SD_DAT1/XD_D3/MS_D1/CF_IORDY

*RTS5158

6

XD_CLE/CF_D3

XD_CE#/CF_D11

XD_ALE/CF_D4

XD_RDY/CF_D13

SD_CMD

CF_CS0#

MS_INS#/CF_IORD#

XD_D5/MS_BS/CF_A2

AV_PLL_IN

VREG_OUT

5V_IN
A3V3_ IN
D3V3_ IN

D3V3_OUT

A3V3_OUT

CARD_3V3_OUT

AG33

AG_PLL

DGND2
DGND1

5

SP6

SP19

43

SP18

42

SP17

41

SP16

40

SP15

39

SP14

38

SP13

37

SD_CMD_R

36

SP12

35

SP11

34

SP10

31
30

MS_CD#

29

SP8

28

SP7

27

SP6

26

SP5

25
1

C647

*0.1U/10V_4

VREG

10
8
3
33

11

7
9
6

46
32
12

SP4

C633*0.1U/10V_4

C612*0.1U/10V_4

+3VCARD

C629
*1U/10V_4

For 5158

R339 *0_4

R333 *0_4

For 5158E

AL005158B10 -->RTS5158E
AL005158B00 -->RTS5158

SI-2 remove R673 not
need -- UMA BOM remove

C918
*1U/10V_4

C634

*0.1U/10V_4

+3VSUS

C589
*4.7U/6.3V_6

C624

*0.1U/10V_4

*0.1U/10V_4

+3VSUS

C917

4

SD_DAT1

+3VSUS_RTS

C593
*0.1U/10V_4

Note:

SD/MMC MS XD

SP1 XD_CD#
SP2 SD_WP
SP3 SD_CD#
SP4 XD_D4

SD_DAT1

SP5 XD_D5MS_BS
SP6

SD_DAT1

SP7 SD_DAT0
SP8 SD_DAT7 XD_D2
SP9 MS_INS#
SP10 SD_DAT6 XD_D7
SP11 XD_D1SD_CLK
SP12 SD_DAT5 XD_D0
SP13 SD_DAT4 XD_WP#
SP14 XD_R/B#
SP15 SD_DAT3 XD_WE#
SP16 SD_DAT2 XD_RE#
SP17 XD_ALE
SP18 XD_CE#
SP19 XD_CLE

R323 *0_6

C598
*4.7U/6.3V_6

+3VCARD

C628

*0.1U/10V_4

*0.1U/10V_4

C618

MS_D1
MS_D2
MS_D3

MS_SCLK

+3VSUS

XD_D3
XD_D6MS_D0

C617

*0.1U/10V_4

3

SP7
SP6
SP8

SP16
SP5
SP15
SP11
SP2

SP13
SP19
SP4
SP10

SP14
SP12
SP17
SP18
SD_CMD_R

CH501H-40PT

XD_CD#

D23

C873

270P/25V_4

21
21

CH501H-40PT

RTS5158 need to remove
D23/D24/C873

MS_CD#
SD_CD#

2

R315 *0_4
R316 *0_4
R334 *0_4
R338 *0_4
R345 *0_4
R666 *0_4
R676 *0_4
R327 *0_4
R335 *0_4
R675 *0_4
R390 *0_4
R354 *0_4
R358 *0_4
R319 *0_4
R677 *0_4
R393 *0_4
R317 *0_4
R351 *0_4
R348 *0_4
R389 *0_4
R369 *0_4
R391 *0_4
R392 *0_4
R372 *0_4

CR1_PCTLN

MS_DATA0_SD_DAT0

XD-D6

MS_DATA1

XD-D3

MS_DATA2_XD_D2

SD_DAT2
XD-RE#
MS_BS

XD-D5

SD_DAT3

XD_WE

SD_CLK_MS_CLK

XD-D1
SD_WP
XD-WP#
XD-CLE
XD-D4

MS_DATA3

XD-D7
XD-RB#
XD-D0
XD-ALE
XD-CE#
SD_CMD

JMB 380 Note:

MDID0

SD_DAT0

MS_D0

MDID1
MDID2
MDID3

MDID5
MDID6
MDID7
MDID8
MDID9
MDID10
MDID11
MDID12
MDID13
MDID14

MS_D1

SD_DAT1

MS_D2

SD_DAT3

MS_D3

SD_CMDMDID4 MS_BS
SD_CLK

MS_SCLK

SD_WP
SD_DAT4

SD_DAT5
SD_DAT6
SD_DAT7

MS1_LED#SD1_LED#

SD1_PCTL#MS1_PCTL#XD1_PCTL#
SD1_CD#

MS1_CD#

1

25

XDMSSD/MMC

XD_D0
XD_D1
XD_D2SD_DAT2
XD_D3
XD_WE#
XD_CE#
XD_WP#
XD_CLE
XD_D4
XD_D5
XD_D6
XD_D7
XD_RE#
XD_R/B#
XD_ALE
XD_LED#CR1_LEDN

XD_CV#CR1_CD0
XD_CD#CR1_CD1

H31

*H-S315D110P2

H32

1

1

H3

*H-C256D157P2

1

PAD4

H17

*H-C256D217P2

MDC_SPRING

PAD5

MDC_SPRING

PAD6

*MDC_SPRING

for MDC cable
routing

1

*H-S315D110P2

*H-O173X118D173X118N

H2

*H-S315D110P2

1

1

PAD2

1

*MDC_SPRING
PAD3

1

*MDC_SPRING

H26

*H-C256D217P2

*H-C256D217P2

1

25 45Tuesday, February 19, 2008

1

H13

PAD7

*MDC_SPRING

Del PAD1
for TP
on PV

1

1

H27

of

1

1A

PAD10

PAD8

+3VCARD+3VCARD

37

GND

38

GND

41

GND

42

GND

40

NC

39

NC

36
35
34
33
32

xD-D7

31

xD-D6

30

xD-D5

29
28

xD-D4

27

xD-D3

26

xD-D2

25
24
23

MS_DATA0_SD_DAT0
XD-D0
SD_DAT1
MS_DATA1
XD-D1
MS_DATA2_XD_D2
SD_DAT2
MS_DATA3
SD_DAT3
XD-D3
SD_CMD
MS_BS
XD_WE
SD_CLK_MS_CLK
XD-CE#
SD_WP
XD-WP#
XD-CLE
XD-D4
XD-D5
XD-D6
XD-D7
XD-RE#
XD-RB#
XD-ALE

SD_CD#
SD_WP
XD_CD#

XD-D7
XD-D6
XD-D5
SD_DAT1
XD-D4
XD-D3
MS_DATA2_XD_D2
MS_DATA0_SD_DAT0
SD_CLK_MS_CLK

3

SD_CD# 26

+5V

+3VCARD

SI-2 for 台端Conn

XD-RB#
XD-RE#
XD-CE#
XD-CLE
XD-ALE
XD_WE
XD-WP#
XD-D0
XD-D1
SD_DAT2
SD_DAT3
SD_CMD

SD_CLK_MS_CLK
MS_DATA3
MS_CD#
MS_DATA2_XD_D2
MS_DATA0_SD_DAT0
MS_DATA1
MS_BS

5

MDIO0026
MDIO0126

MDIO0226
MDIO0326

MDIO0426

MDIO0526
MDIO0626
MDIO0726

MDIO0826
MDIO0926
MDIO1026
MDIO1126
MDIO1226
MDIO1326
MDIO1426

SI-2 modified - for
Jmicron updae

CN42

1

xD-R/B

2

xD-RE

3

xD-CE

4

xD-CLE

5

xD-ALE

6

xD-WE

7

xD-WP

8

xD-D0

9

xD-D1

10

SD-DAT2

11

SD-DAT3

12

SD-CMD

13

GND

14

MS-VCC

15

MS-SDLK

16

MS-DATA3

17

MS-INS

18

MS-DATA2

19

MS-DATA0

20

MS-DATA1

21

MS-BS

22

GND

*TAI TWUM 5IN1 CARD READER SOCKET

R611 0_4
R623 0_4
R608 0_4
R610 0_4
R622 0_4
R612 0_4
R620 0_4
R614 0_4
R619 0_4
R606 0_4
R618 0_4
R609 0_4
R627 0_4
R617 47/F_4
R634 47/F_4
R593 0_4
R591 0_4
R633 0_4
R605 0_4
R603 0_4
R602 0_4
R601 0_4
R679 0_4
R635 0_4
R628 0_4

SD-CD

SD-WP

xD-CD

xD-VCC

SD-DAT1

SD-DAT0

SD-CLK

SD-VCC

4

5 IN1 CARD READER

C905

MS_CD#26

+3VCARD

C872

+3VCARD

C887

0.1U/10V_4

8

*270P/25V_4

R607
150K/F_4

C894

0.1U/10V_4

XD-RB#
XD-RE#
XD-CE#
XD-CLE
XD-ALE
XD_WE

XD-D0
XD-D1
SD_DAT2
SD_DAT3
SD_CMD

SD_CLK_MS_CLK
MS_DATA3

MS_CD#
MS_DATA2_XD_D2
MS_DATA0_SD_DAT0
MS_DATA1
MS_BS

+3VCARD

R678

B B

*10K/F_4

XD-WP#

Del R625
for TP
on PV

2.2U/6.3V_6

CLOSE CONN

A A

XD,MMC/SD,MS/MSP

+3VCARD +3VCARD

CN36

1

XD-R/B

2

XD-RE

3

XD-CE

4

XD-CLE

5

XD-ALE

6

XD-WE

7

MC_PWR_CTRL_0#26

C874

0.1U/10V_4

XD-WP

8

XD-DATA0

9

XD-DATA1

10

SD-DATA2

11

SD-DAT3

12

SD-CMD

13

GND

14

MS-VCC

15

MS-SDLK

16

MS-DATA3

17

MS-INS

18

MS-DATA2

19

MS-DATA0

20

MS-DATA1

21

MS-BS

22

GND

5IN1 CARD READER SOCKET

7

SD-C/D

SD-CD-SW

SD-W/P

SD-WP-SW

XD-CD

XD-VCC
XD-DATA7
XD-DATA6
XD-DATA5
SD-DATA1
XD-DATA4
XD-DATA3
XD-DATA2
SD-DATA0

SD-CLK

SD-VCC

Q25
*AO3409

1

RESERVED for JMicron -- after

programming can out-put +3.3V

throught MC_PWR_CTRL_0# signal

GND
GND
GND
GND
GND

37
38
40
42
43

39
36
41
35
34
33
32
31
30
29
28
27
26
25
24
23

2

XD_PWON

SD_CD#
SD_CD#
SD_WP
SD_WP
XD_CD#

XD-D7
XD-D6
XD-D5
SD_DAT1
XD-D4
XD-D3
MS_DATA2_XD_D2
MS_DATA0_SD_DAT0
SD_CLK_MS_CLK

+3VCARD+3V

3

R387 *10K/F_4

R332 0_8

6

MDC_SPRING

K/B SCREW HOLE

Mini Card Hole

PAD12

MDC_SPRING

1

H22

*H-S315D110P2

1

1

H5

*H-S315D110P2

1

H20

*H-C256D217P2

1

1

PAD9
MDC_SPRING

1

H23

*H-C244D181P2

1

*H-C315D118P2

H12

1

H11

*H-S315D110P2

1

H14

*H-C256D217P2

1

1

*H-C217D157P2

H7

*H-S315D110P2

1

VGA Hole

*H-C217D181P2

1

SI-2 for CN37

NB5/RD5

PAD11

MDC_SPRING

MDC_SPRING

1

1

H9

H6

1

H25

*H-C315D118P2

H4

1

H28

*H-C236D87P2

1

1

*H-C217D157P2

1

H10

*H-C217D181P2

1

H29

*H-C236D87P2

1

H8

1

*H-C217D157P2

H18

*H-C256D217P2

1

H1

*H-C315d118p2

H30

*H-C236D87P2

1

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

RTS5158 & CR SOCKET &HOLE

Date: Sheet

2

5

+3V

C615 0.1U/10V_4

C609 0.1U/10V_4

D D

+1.8V

L53

C636 0.1U/10V_4

C657 10U/6.3V_8

*BLM18PG181SN1D(180,1.5A)_6

C578 10U/6.3V_8
C610 0.1U/10V_4
C613 0.1U/10V_4
C580 1000P/50V_4
C635 0.1U/10V_4
C579 0.1U/10V_4

+1.8V_CARD

TPB0N
TPB0P
TPA0N
TPA0P
TPBIAS0

12K %1
:CS31202FB15
or
CS31202FB07

R361

12K/F_4

U16

4

3

TPBIAS0

2

C862 0.33U/16V_4

1

26

R586

56.2/F_4

TPA0N
TPA0P

MDIO08 25

+3V

36

35

34

33

30

32

31

27

29

MDIO09 25
MDIO10 25
MDIO11 25
MDIO12 25

TPB0P
TPB0N

R585

56.2/F_4

*WCM-2012-900T(400mA)

4 3
1

2

L87

L88

1

2

4 3

*WCM-2012-900T(400mA)

R580 56.2/F_4
R582 56.2/F_4

TPA0P

TPA0N
TPB0P
TPB0N

R583 4.99K/F_4

C863
220P/50V_4

4

4

3

3

2

2

1

1

1394_CONN
CN34

8

5566778

1

C C

R364

1M/F_4

Y6

C641
22P/50V_4

B B

A A

24.576MHZ
C642

27P/50V_4

5

+1.8V_CARD

MDIO0725
MDIO0625
MDIO0525
MDIO0425

MDIO0325
MDIO0225
MDIO0125
MDIO0025

CARD_PLTRST#12

37

DV18

38

TXIN

39

TXOUT

40

MDIO7

41

MDIO6

42

MDIO5

43

MDIO4

+3V

CLK_PCIE_CARD#2
CLK_PCIE_CARD2

PCIE_TXP59

PCIE_TXN59
PCIE_RXN59
PCIE_RXP59

44

DV33

45

MDIO3

46

MDIO2

47

MDIO1

48

MDIO0

49

EPAD

C583 0.1U/10V_4
C582 0.1U/10V_4

4

TPA1P

TPBIAS_1

TPA1N

TREXT

XRSTN1XTEST2APCLKN3APCLKP4APVDD5APGND6APREXT7APRXP8APRXN9APV1810APTXN11APTXP

TPB1P

TPB1N

+1.8V_CARD

PCIE_RXN5_C
PCIE_RXP5_C

TAV33

JMB380

R301 8.2K/F_4

MDIO928MDIO8

MDIO1225MDIO1126MDIO10

TCPS
MDIO13
MDIO14

CR_LEDN

DV33
DV33
DV18

CR1_PCTLN

CR1_CD0N
CR1_CD1N

NC

D3E_WAKEN

12

+1.8V_CARD

3

R359 10K/F_4

24
23
22
21
20
19
18
17
16
15
14
13

D3E _WAKEN pin :out put Hi into D3E mode
out put low normal mode

MDIO13 25
MDIO14 25

CARD_LED# 25,29

+3V

+1.8V_CARD

MC_PWR_CTRL_0# 25

T113

D3E_WAKEUP

MDIO06

MDIO13

MDIO07

MDIO12

MDIO14

R594 10K/F_4

R318 10K/F_4

R360 200K/F_4

R630 200K/F_4

R324

4.7K_4

R342 10K/F_4

12

12

D3E :
mode 1 : when card device insert can wake up card reader chip
mode 2 : need to use pin16 to wake up card reader device

+3V

D3E _WAKEN pin :out put low 1ms can wake up
system when system into D3E mode 2

R313

4.7K_4

+3VCARD

2 1

MS_CD# 25

+3V

D39RB501V-40

SD_CD# 25

D3E GPIO# 12

2

3

1

SI-2 modified - for
Jmicron updae

Q69

2N7002E-G

Q69 for power
leakage
concern

R795 2.2K_4

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
B

NB5/RD5

2

JMB380 Controller/1394

Date: Sheet

1

D3E_SCI# 13

+3VS5

26 45Tuesday, February 19, 2008

of

1A

A

3

SI-2 Modified -- change
footrint QFN48-7X7-5-49P-1H
for datasheet update

SPDIF37

+3V

L54 0_8

1 2

C590

1U/10V_4

SI-2 for EMI

C961 *22P/50V_4

DIGITAL_D130

+3V_DVDD

ACZ_SDOUT_AUDIO

BIT_CLK_AUDIO13

ACZ_SDIN013

ACZ_SYNC_AUDIO13
ACZ_RST#_AUDIO13

ACZ_SPKR13,28

R314
10K/F_4

1 1

AGND

CIR_IN35,37

C922

*180P/50V_4

for EMI

C600

0.01U/16V_4

*180P/50V_4

AGND

+3V_DVDD

C604

0.1U/10V_4

R787 0_6

R306 0_6

T221

R305 22_4

ACZ_SYNC_AUDIO
ACZ_RST#_AUDIO

R309 47K_4

C601

0.1U/10V_4

JACK_SEN#
SA_B#

+5VPCU

C921

C919

*180P/50V_4

AGND

AGND AGND

C588
10U/6.3V_8

+3V_DVDD

C602 0.01U/16V_4

C597 0.1U/10V_4

DIGITAL_D2

BIT_CLK_AUDIO

ACZ_SDIN0_ADC

0.1U/10V_4

+3V_DVDD

C585
10U/6.3V_8

R330 39.2K/F_4
R329 20K/F_4

C614 0.1U/10V_4

EARP_L
EARP_R
SA_A#

SA_B#

EXT_MIC_L

EXT_MIC_R

C920

*180P/50V_4

21

+4.75VAVDD

AGND

AGND

Del R672
direct
on PV

R328

5.11K/F_4

C599
1000P/50V_4

TO Headphone jack

SI-2 Modified

EAPD#--DEFAULT is Hi

C946
*.1U/10V_4

AGND

49

48

U17

EAPD

1
2
3
4
5
6
7
8
9

10
11
12

SENSE_A

TO AUDIO/B CON.

SPDIF0

DVDD_CORE
VOL_UP/DMIC_0
DVDD_IO
VOL_DN/DMIC_1
SDO
BITCLK
DVSS
SDI_CODEC
DVDD_CORE
SYNC
RESET#
PCBEEP

SENSE_A13PORTE_L14PORTE_R15PORTF_L16PORTF_R17NC18NC19NC20PORTB_L21PORTB_R22PORTC_L23PORTC_R

13
1
2
3
4
5
6
7
8
9
10
11
12
14

SI-2 modified

-- Change
footprint for
ME request ,
pin 13,14 are

固定

pin

C947 22P/50V_4

R78
22_6

45

47

46

EAPD

DMIC_CLK

CN19
AUDIO CONN

B

EAPD# 28

DIGITAL_CLK 30

AGND

41

43

44

GPIO 6

GPIO 7 / SPDIF OUT1

GPIO 5

42

AVSS2**

40

39

NC

PORTA_R

VREFOUT-E / GPIO 4

92HD71B7

DOCK MIC DETECT

R366

DOCK_MIC_L DKMIC_SEN

10K/F_4

10U/6.3V_8

38

37

AVDD2**

PORTA_L

PORT-D_R
PORT-D_L

SENSE_B / NC

MONO_OUT

VREFOUT-C
VREFOUT-B

VREFFILT

24

MIC1_R1
MIC1_L1

DOCK_MIC_R1
DOCK_MIC_L1

C660

1U/10V_4

+4.75VAVDD

C625

NC

CAP2

GPIO 3

AVSS1

AVDD1

C643

0.1U/10V_4

AGND

TO Internal Speakers

36
35

SENSE_B

34
33
32

MIC1-VREFO-E

31

IDT_GPIO3#

30

MIC1-VREFO-C

29

MIC1-VREFO-B

28

VREF_FLT

27

CDC_AVSS

26

+4.75VAVDD

25

recommand use X7R /10V

C640 2.2U/6.3V_6
C630 2.2U/6.3V_6

C616 2.2U/6.3V_6
C611 2.2U/6.3V_6

R371
47K_4

MMBT3904

Q27

2

MMBT3904

R396

1 3

47K_4

C

C626
10U/6.3V_8

AGND AGND

EARPO_R
EARPO_L

Change C923, 924
footprint

C663 1U/10V_4

C661

0.1U/10V_4

AGND

MIC1-VREFO-E

SB_E#

+5V

R367
47K_4

Q28

2

2

1 3

AGND

C924 100U/6.3V_3528

+

C923 100U/6.3V_3528

+

AGND AGND

3

Q29
2N7002E

1

AGND

L56 *0_8

1 2

C645

0.1U/10V_4

HP-R 28
HP-L 28

C662
10U/6.3V_8

MIC1-VREFO-B

R687 4.7K_4

R688 4.7K_4

1U/10V_4

EARP_R

EARP_L

AGND

IDT_GPIO3# 28

AGND AGND

SA_A#

R816 100K/F_4

+3V

+5V

C644

C608
1U/10V_4

AGND

AGND

TO Headphone jack

+4.75VAVDD

R385

5.11K/F_4

R384 39.2K/F_4
C664 1U/10V_4

C639

C620

1U/10V_4

1U/10V_4

AGND

R363 4.7K_4
R357 4.7K_4

R344 1.21K/F_4
R343 10K/F_4
R336 10K/F_4
R337 1.21K/F_4

R807 change to 330K
for HP on PV

JACK_SEN#37

+3V

R812

*0_4

R808
100K/F_4

1 2

2

12

AGND

D

U15

5

Vout

4

BYP
GND2EN

TPS793475

SB_E#

Del R686,
R356, R349
direct on PV

C931
1U/10V_4

3

2

1

AGND

3

Q76
2N7002E

1

1

Vin

3

EXT_MIC_R
EXT_MIC_L

2N7002E

Q74

2N7002E

Add C141
for
soft-star
on PV

AGND

+12VALW

Q72

2

L55 0_8

1 2

C587

0.1U/10V_4

R325 0_4

C586

0.047U/25V_4

BIT_CLK_AUDIO

C581
1U/10V_4

MAINON 20,35,39,42,43,44

ACZ_SDIN0_ADC

C596
*27P/50V_4

FOR EMI

Audio JACK: Normal Open
SA_A# -->EXT HP
SA_B# -->EXT MIC
SB_E#-->DOCK MIC

Change to SHORT-1A for EMI on PV

R788 *0_6
R789 *0_6
R368 *0_6
R331 *0_6
R353 *0_6C594
R674 *0_6

AGND

AGND

DOCK_MIC_R 37
DOCK_MIC_L 37

AGND

R807
330K/F_4

3

1

AGND

AGND

Q73

2N7002E

2

2

Q75
2N7002E

C141
.01U/25V_4

AGND SHIELD
AGND SHIELD

AGND SHIELD
AGND SHIELD
AGND SHIELD

AGND SHIELD

EARPO_R

3

1

R668 47/F_6

EARPO_L

3

1

TO EXTERNAL MIC

TO DOCK MIC

Change C962, 963

R811

footprint

*0_4

C962 100U/6.3V_3528

Del R814, R815 on PV

R813
*0_4

R669

C963 100U/6.3V_3528

47/F_6

PROJECT : QT8

E

+5V+4.75VAVDD

C646

0.1U/10V_4

C595
*27P/50V_4

+

TO DOCK Headphone

+

27

C584
10U/6.3V_8

RSPK_DK 37

LSPK_DK 37

Quanta Computer Inc.

Size Document Number Rev
Custom

A

B

C

D

NB5/RD5

Azalia AD1883

Date: Sheet of

27 45Tuesday, February 19, 2008

E

1A

1

AUDIO AMPLIFIER

LIN-,RIN- and LIN+,RIN+ swap for BOBO noise on PV

AV

R383 20K/F_4
R373 20K/F_4

HP-L27

A A

HP-R27

PV-1 Modified --R383 , R373
change from 20Kohm to 0 ohm
for Volume too low issue

6017A2 Gain Table

GAIN0 GAIN1

0 0 6dB 90K
0 1 10dB 70K

1 0 15.6dB 45K

1 1 21.6dB 25K

B B

2

SI-2 Modified -- remove C621/C623

HP_L_C

C659 0.047U/16V_6
C656

C650 0.47U/10V_6

AGND

R346

100K/F_4

R347
1K_4

1 2

1 2
1 2

+5VAMP

AGND

1 2

HP_R_C C_SPKR_R

RIN

0.047U/16V_6

PC_BEEP

12

R340

100K/F_4

AUDIO_G0
AUDIO_G1

R341
*1K/F_4

3

C_SPKR_L

AUDIO_G0
AUDIO_G1

+5VAMP

6
15
16

5
17

9

AMP_BYPASS

7
10

2

3

TPA6017A2/FAN7031/LM4874

SI-2 modified -­remove D22 , add
D40

VOLMUTE#35

EAPD#27

PVDD1
PVDD2
VDD

LIN­RIN-

LIN+
RIN+

BYPASS
GAIN0

GAIN1

U18

SHUTDOWN

2

1

4

ROUT+

ROUT-

LOUT+

LOUT-

D40
BAT54A

EPAD
GND1
GND2
GND3
GND4

5

18
14

4
8

19
12

NC

21
1
11
13
20

+3V

R322
100K/F_4

1 2

3

+5V

C619 100P/50V_4

1 2

1 2

R376 0_6

C651 100P/50V_4

1 2

+5VAMP

AGND

C622 100P/50V_4

AGNDAGNDAGNDAGNDAGND

12

C649
10U/6.3V_8

C637 100P/50V_4

1 2

12

C638

0.1U/10V_4

6

R_SPK+4
R_SPK-3

L6 BK1608HM241
L7 BK1608HM241

DC impedance 0.35ohm

L_SPK+2
L_SPK-1

L11 BK1608HM241
L10 BK1608HM241

SI-2 modified -­for EMI
suggestion

12

C632

0.1U/10V_4

12

C631

0.047U/25V_4

C34

470P/50V_4

C53

470P/50V_4

7

AGND

AGND

R_SPK+
R_SPK-

C37
470P/50V_4

L_SPK+
L_SPK-

C52
470P/50V_4

8

CN5

4
3
2
1

INT SPEAKER CONN

INT. SPEAKER

Vrms = Vpp / 2 √2

Power = (Vrms) / R

QT8 speaker -- 3.2ohm / 2W

R386 *0_6
R310 *0_6

AGND

R386, R310 change
to SHORT-1A on PV

28

2

PC-BEEP

C942 *.1U/16V/04

AGND

KEY_BEEP35

ACZ_SPKR13,27

TO CODE

C C

+5VAMP

1
2

AGND

R773 *0_4

SI-2 modified - from Hp suggestion

53

R771 *1K/04

4

U38
*NC7SZ86

R772
*1K/04

AGND

C943 *0.1UF/06

PC_BEEP

C944
*.47U/10V_6

1 2

TO AMP

1 2

AMP_GND

C945
*.47U/10V_6

MUTE_LED

Low -->un-MUTE
High-->Mute

SI-2 modified -- remove
R307,Q24 , add
R781,D41,Q70

MUTE_LED35,37

VOLMUTE#35

IDT_GPIO3#27

+3V

R781 10K/F_4

SI-2 Modified

2

3

1

D41
BAT54A

+5VPCU

SI-2 Modified --

R311

R311 change from
10k to 100k

100K/F_4

1 2

3

Q70
ME2N7002E

2

1

Acceleration sensor

C442

*0.22U/6.3V_4

PDAT_SMB
PCLK_SMBPDAT_SMB

+3V

reserved second source

U7

2

VDD

9

VDD_IO

4

INT

8

SDI

6

SCK

5

CSB

*BOSCH BMA150

6

Reserved
Reserved

SDO
GND

NB5/RD5

1
10

7
3

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

AMP_TPA6017/INT SPK

Date: Sheet

7

28 45Tuesday, February 19, 2008

8

1A

of

+3V

C449

10U/6.3V_8

Del R767

D D

1

2

INTH#12

C448

0.1U/10V_4

PDAT_SMB2,6,7,13,36
PCLK_SMB2,6,7,13,36

+3V

C450

0.1U/10V_4

PCLK_SMB

R169 10K/F_4

SGT-LIS302DLTR interrupt pin default
is low / active Hi , BIOS need to
programming 22h to change status
from active Hi to low

3

U6

1

Vdd_IO

6

VDD

3

Reserved

11

Reserved

8

INT1

9

INT2

12

SDO

13

SDA/SDI/SDO

14

SCL/SPC

7

CS

SGT-LIS302DLTR

C443
*0.1U/10V_4

Del R768

2

GND

4

GND

5

GND

10

GND

4

INTH#12

PDAT_SMB2,6,7,13,36
PCLK_SMB2,6,7,13,36

5

A

B

C

D

E

Modem CONN

1

H21

FBSA1017

1

H19

FBSA1017

29

+3V

MDC

1 3

CN18

1

GND
A_SDO3REV

5

GND
A_SYNC7GND
A_SDI9GND
A_RST#11A_BCLK

MDC CONN

R766
0_6

2

REV

4
6

VCC

8
10
12

ACCLED_EN14

Del R380
Change R381 to 100
Add R766, R817, R818,
R819
LED PWR control no-stuff
on PV

C

C653

0.1U/10V_4

C652
*10P/50V_4

Q26

2

PDTC144EU

R377 0_4

For EMI

TP_LED1#35
TP_LED2#35

C654

2.2U/6.3V_6

C658
1000P/50V_4

BIT_CLK_AUDIO_MDC 13

(White)

(Amber)

1 3

PWR_LED#34,35

MBATLED0#35

CARD_LED#25,26

CAPSLED#35

TP_LED2# TPLD4

SI-1 modified -­change LED part
number

LED6 2P WHITE LED

LED5 2P WHITE LED

LED7

LED1 2P WHITE

LED Vf

(Amber)

(White)

SI-2 modified -- LED4
change footprint

2

SATA_R_LED1

3

LED4

1

LED 3P WHITE/AMBER

PWR_R_LED1

21

MBAT_R_LED1

21

2P WHITE LED

CARD_LED1

21

CAP_LED

21

I = Vcc -Vf / R

TPLD3TP_LED1#

4 2

13

LED3 LED 4P WHITE/AMBER

D

R381 100F_6

R378 20_6

R379 20_6

R584 20_6

R185 20_6

R

R183 200/F_6
R182 20_6

For PA

Size Document Number Rev

NB5/RD5

Custom
Date: Sheet

+3V

SI-1 modified -­for fix SATA LED
no support LED
light control

+3VPCU_LED

+3VPCU_LED

+3V

+3V_LED

+3V_LED
+3V_LED

+

Single Color ,Right angle

Anode 12

Dual Color ,Right angle

Vcc

PROJECT : QT8

Quanta Computer Inc.

MDC1.5 Con Accelerometer/lLED

E

3

LTW-110TLA

3

LTW-326DSKF-5A

Amber

3

White

29 45Tuesday, February 19, 2008

LED

21-

White

Amber

+

24

Anode

1+

1A

of

4 4

3 3

LEDVCC_EN#35

LED PWR CONTROL

+12VALW

SI-2 change R180
from 100k to
1Mohm for current
limit

2 2

1 1

LEDVCC_EN#35

LEDVCC_EN#

+3VPCU +3VPCU_LED

A

2

R180
*1M_4

R178 *1M/F_4

3

*2N7002E
Q17

1

R818 0_8

3

LED_CTL

R819 0_8

3

LED_CTL

Q23

*2N7002E

2

*AO3404

ACZ_SDOUT_AUDIO_MDC13

ACZ_SYNC_AUDIO_MDC13

ACZ_SDIN113

ACZ_RST#_AUDIO_MDC13

+3V

R750
*10K/F_4

2

1

1

C451

*1U/25V_8

3

LED_CTL

C566

10U/6.3V_8

+3V +3V_LED

Q12

2

Q65
*PDTC144EU

1 3

R817 0_8

Q18

*2N7002E

2

C932

*.22U/25V_6

add LED auto dim
function

+3VPCU_LED

C568

0.1U/10V_4

20~40mils

C410

0.1U/10V_4

B

1

C933
*.22U/25V_6

C556

*10U/6.3V_8

R326 33_4
C603 *10P/50V_4

SATA_LED#14

+5V_LED+5V

ACZ_SDOUT_AUDIO_MDC
ACZ_SYNC_AUDIO_MDC

AC_SDIN1_MDC

2

Q64

*PDTC144EU

20~40mils

+3V_LED

C457

10U/6.3V_8

C460

0.1U/10V_4

20~40mils

5

BLUETOOTH

R181

4.7K_4

Del R179 on PV

D D

BT_OFF#14

SI-2 Modified footprint -­for ME change pitch for

1.25mm to 1.0mm

2

Q20
PDTC144EU

1 3

CN15
BLUE TOOTH CONN

87213-0600-6P-L

6
5
4
3
2
1

For Discrete Touch-Screen

C C

SI-2 Modified -- remove touch-screen function

USB CAMERA CONNECT

CN10
CAMERA-BOARD

DIGITAL_D127

DIGITAL_CLK27

USBP2-13

B B

A A

USBP2+13

SI-2

Add for EMI solution

C166

1U/10V_4

DIGITAL_CLK

+5V

DIGITAL_D1
DIGITAL_CLK

L26

4 3
1

*WCM-2012-900T(400mA)

C951
*27P/50V_4

U3

VIN3VOUT

1

SHDN

2

GND

IC(5P) G913C (SOT23-5)EP

2

SET

C92

0.1U/10V_4

R86

*0_6

4

R1

5

R2

+3V

+3.9V-CAMARA
USBP2­USBP2+

+3.9V-CAMARA

R73
*215K/F_4

R72
*100K/F_4

6
5
4
3
2
1

SI-2 Modified

C221

4.7U/6.3V_6

R73 and R72
no-stuff for
fix Vout on PV

4

+3VSUS+3VPCU

1

Q19

3

BTCON_P1

BLUELED
USBP5­USBP5+

BTV

ME2303T1

BTV

C454

10U/6.3V_8

24mil

T258

C447

0.1U/10V_4

BLUELED 35,36
USBP5- 13
USBP5+ 13

2

C459

0.1U/10V_4

USB Fingerprint CON

USBP6+13

USBP6-13

12

C452

*100U/6.3V_3528

Del R154 on PV

C412 0.1U/10V_4

L40

1

2

4 3

*WCM-2012-900T(400mA)

3

1. ESD GND

2. SYSTEM GND

3. USB-

4. USB+

5. USB PWR(+3V)

+3V

USBP6+
USBP6-

FINGER PRINTER CONN

PCB footprint
BL123-05R-5P-L-QT6

CN13

LEFT SIDE USBX1 and E-SATA/USB COMBO

+5VSUS

C819

1U/10V_4

USBP0-13

USBP0+13

USBP1+
USBP1-

12

12

C334

*Clamp-Diode_6

USBP1-13

USBP1+13

C319
*Clamp-Diode_6

*WCM-2012-900T(400mA)

4 3
1

L29

RIGHT SIDE USBX2

5
4
3
2
1

2

U33

2

VIN1

3

VIN2

4

EN

1

GND

G545B2PU8

(TPS2061D)

AL000545017
IC(8P)G545B2P8U(MSOP-8) - 1.5A
AL000545000
IC OTHER(8P) G545A2P8U(MSOP-8) - 2A

*WCM-2012-900T(400mA)

4 3
1

L37

12

+

2

USBP8+13

USBP8-13

USBP9+13

USBP9-13

OUT3
OUT2
OUT1

2

*47P/50V_4

C812

*100UF_16V

C320

*47P/50V_4

OC

C415

C332

*47P/50V_4

8
7
6
5

C808

0.1U/10V_4

SATA_TXP214
SATA_TXN214

SATA_RXN214
SATA_RXP214

+5VSUS

80 mils (Iout=2A)

C853
*470P/50V_4

C419
*47P/50V_4

C414
*Clamp-Diode_6

C807
*470P/50V_4

1
2
3
4
5
6
7
8
9
10

CN7
DUAL USB CONN

PCB footprint
BL123-10R-10P-L-QT6

USB0PWR

C852

0.1U/10V_4

USB0PWR
USBP0­USBP0+

12

Close to ESATA
CON from AMD
recommend

12

C420
*Clamp-Diode_6

USB0PWR
USBP1­USBP1+

C352 0.01U/16V_4
C353 0.01U/16V_4

C310 0.01U/16V_4
C299 0.01U/16V_4

+5VSUS

C56

0.1U/10V_4

PROJECT : QT8

1

30

12

C850

+

100UF_16V

USB 0

CN33

1

8

1

GND

2

7

2

GND

3

6

3

GND

5

44GND

USB CONN

SI-2 modified -- Change
Connector layout type
from SMD PAD to Dip as
SMT request

USB & ESATA

CN32

1

USB Vcc

2

D-

3

D+

4

GND

5

GND

Shield

6

A+

7

A-

Shield

8

GND

9

B-

Shield

10

B+

11

Shield

GND

USB_ESATA_COMBO

14
15
12
13

Quanta Computer Inc.

Size Document Number Rev

Vout=1.25(1+R1/R2)

5

Custom

4

3

2

NB5/RD5

BT/WEBCAM/FT/USBX4/ESATA

Date: Sheet

1

30 45Tuesday, February 19, 2008

1A

of

5

4

3

2

1

+3VLANVCC

+FB1232

R41 0_6

+LAN_A1.8_FB12

Stuffed for 8101E/8102E/RTL8111C

+3VLANVCC

D D

Y1

21

25MHZ

C45

30P/50V_4

C C

Del R429, R431, R433, R435,
C718, C726 for 8111B on PV

B B

Del R50 on PV

C44

30P/50V_4

+LAN_D1.5

R778
SI-2 modified -­RTL8111C remove ,
RTL8111B,8101E,8102E
need to stuff

+LAN_D1.5

Del R36, C712,
C710 on PV

+CTRL1832

+3V_A_LAN

+LAN_A1.8

R778 *0_4

+LAN_D1.5

+3V_A_LAN

R37 2.49K/F_4

+3V_A_LAN

MDI0+
MDI0-

+LAN_A1.8_FB12

MDI1+
MDI1-

+LAN_A1.8

MDI2+

MDI2­+LAN_A1.8
MDI3+
MDI3­+LAN_A1.8

+3V_LAN

+3V_LAN

PCIE_WAKE#13,33,36 PCIE_RXN6_LAN 9

+LAN_D1.5
+LAN_E1.8

PCIE_TXP6_LAN9
PCIE_TXN6_LAN9

LAN_REST#35

AL08111C001
AL08101E005

LAN_GLINK10#

LAN_GLINK100#

LAN_GLINK1000#
LAN_TX#

Link

A A

2

3

1

D37 BAT54A

D38 RB501V-40

21

R55 0_4

LAN_GLED#
LAN_YLED#

C39
*0.01U/16V_4

LAN_PLTRST#12

C85
*0.01U/16V_4

LAN_TX#

+3V_A_LAN
XTAL1

XTAL2
+3V_GVDD
+CTRL15_E

LANRSET

U2

1

VCTRL18

2

AVDD33

3

MDIP0

4

MDIN0

5

AVDD18

6

MDIP1

7

MDIN1

8

AVDD18

9

MDIP2

10

MDIN2

11

AVDD18

12

MDIP3

13

MDIN3

14

AVDD18

15

VDD15

16

VDD33

T5
T6

PCIE_WAKE#

PCIE_TXP6_LAN
PCIE_TXN6_LAN

LAN_REST_R#

+LAN_D1.5_RVD

63

59

60

64

62

57

EPAD

RSET

VCTRL15

58

GVDD

VDD15

CKTAL261CKTAL1

AVDD33

65

RTL8111C-VB-GR

PDAT_SMB18LANWAKEB#19PERSTB#20VDD1521EVDD1822HSIP23HSIN24AGND25REFCLK_P26REFCLK_N27EVDD1828HSOP29HSON30AGND31VDD15

PCLK_SMB

17

R38 0_6

+LAN_D1.5
+LAN_E1.8

R460 *0_4

IC CTRL(64P) RTL8111C-VB-GR(QFN)
IC(64P)RTL8101E-GR(QFN)

+3V_LAN

C733 0.1U/10V_4

LAN_PLTRST#

SI-2 modified -­LAN_PLTRST# is 3VS5 power
rail , Maybe can remove
NAND GATE

U28

2
1

TC7SH08FU

R785 *0_4

4

3 5

LAN_LED_100#

54

55

56

LED_10#

LED_TX#

LED_100#

LED_1000#

LAN_REST_R#

52

NC51NC

VDD3353VDD15

R30 0_4

50

49

VDD15

EESK

EEDI

VDD33

EEDO
EECS

VDD15

NC

VDD15

NC

NC
VDD15
VDD33

ISOLATEB#

NC

NC
VDD15

32

PCIE_RXN6_LAN_L

PCIE_RXP6_LAN_L

+LAN_E1.8

PCIE_LAN_CLKN

PCIE_LAN_CLKP

+LAN_D1.5
+LAN_D1.5

R427

3.6K_6

48

EEDI

47
46
45
44

+LAN_D1.5

43
42
41
40
39

+LAN_D1.5

38

+3V_LAN

37
36
35
34
33

+LAN_D1.5

C709 0.01U/16V_4

C68 0.01U/16V_4

C65 0.01U/16V_4

LAN_GLINK100#
LAN_GLINK10#
LAN_GLINK1000#
+3V_LAN

1 2

+3V_LAN

+3V_LAN

+LAN_E1.8

MDI0+
MDI0-

MDI1+
MDI1-

MDI2+
MDI2-

MDI3+
MDI3-

+3V_LAN
LAN CABLE DETECT 35

+LAN_D1.5

Del R766 for TP on PV

+3V_LAN

Del U1, R46 on PV

+3V

Remove R456 and Add D42 on PV

R456
*1K/F_4

1 2

15K/F_4

ISOLATEB

R457 100_4

2 1

R441

*RB501V-40

D42

C82 0.1U/10V_4

C81 0.1U/10V_4

Del R428 on PV

U26

V_DAC

1

TCT1

2

TD1+

3

TD1-

V_DAC

4

TCT2

5

TD2+

6

TD2-

V_DAC

7

TCT3

8

TD3+

9

TD3-

V_DAC

10

TCT4

11

TD4+
TD4-12MX4-

NS892402

NS892402:GIGABIT

NS892405:10/100

+CTRL1532

MCT1
MX1+

MX1­MCT2
MX2+

MX2­MCT3
MX3+

MX3­MCT4
MX4+

R425 0_6

C713

0.1U/10V_4

R426 0_6

Stuffed for RTL8111C(10/100/1000)

R418 *0_6

Stuffed for 8102E/RTL8101E

use BIOS to programming
EEPROM , EEDI should be
pull Hi

R46
only for 8111B,
8101E&8102E&8111C can
remove

LAN_DISABLE# 13,35

PCIE_RXP6_LAN 9

PCIE_LAN_CLKN 2
PCIE_LAN_CLKP 2

LAN_MCT0

24

LAN_MX0+

23

LAN_MX0-

22

LAN_MCT1

21

LAN_MX1+

20

LAN_MX1-

19

LAN_MCT2

18

LAN_MX2+

17

LAN_MX2-

16

LAN_MCT3

15

LAN_MX3+

14

LAN_MX3-

13

DB0AT9LAN05
DB0ZB1LAN04

+CTRL15_E

C700

10U/6.3V_8

+3V_GVDD

+CTRL15_E

if ISOLATEB pin
pull-low,the LAN
chip will not drive
it's PCI-E outputs
( excluding
PCIE_WAKE# pin )

R58 330_4

+3V_LAN

R34 330_4

+3V_LAN

C927 0.01U/100V_6

LAN_MX0+ 37
LAN_MX0- 37

C928 0.01U/100V_6

LAN_MX1+ 37
LAN_MX1- 37

C929 0.01U/100V_6C62 0.01U/16V_4

LAN_MX2+ 37
LAN_MX2- 37

C930 0.01U/100V_6

LAN_MX3+ 37
LAN_MX3- 37

C703

10U/6.3V_8

R39 75/F_4

R44 75/F_4

R47 75/F_4

R51 75/F_4

LAN_GLED
LAN_GLED#

LAN_MX3­LAN_MX3+
LAN_MX1­LAN_MX2­LAN_MX2+
LAN_MX1+
LAN_MX0­LAN_MX0+

LAN_YLED
LAN_YLED#

EMI

C88
*0.1U/50V_6

RJ45

CN27

12

LED_GRE_P

10

LED_GRE_N

8

RX1-

7

RX1+

6

RX0-

5

TX1-

4

TX1+

3

RX0+

2

TX0-

1

TX0+

9

LED_YEL_P

11

LED_YEL_N

RJ45_CONN

C708

1000P/3KV_1808

LAN_YLED
LAN_GLED

C40
*0.1U/50V_6

GND1

31

14
13

GND

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

5

4

3

2

NB5/RD5

RTL8111C/8101E/RJ11-RJ45 CN

Date: Sheet

1

31 45Tuesday, February 19, 2008

1A

of

5

4

3

2

1

Power trace Layout 寬度> 30mil

32

+3VLANVCC

LANVCC

1.2W
364mA

+3V_LAN

>30mil

D D

L8
RTL8111C ( Gaga lan ) use 4.7uH
power choke A>500mA tolerance

C C

±15%
RTL8101E & RTL8102E stuff 0ohm

L8

+CTRL1831

C50
*10U/6.3V_8

RTL 8101E /8102E stuff ,
RTL 8111C need to remove

B B

Del L68, L69 direct
on PV

4.7UH,+-20%,580MA_8

L8

C46
RTL8111C stuff
RTL8101E / 8102E can remove

C46

10U/6.3V_8

C46

placement close to lan chipset

L9
RTL8111C stuff
RTL8102E need to remove L9

C51
10U/6.3V_8

placement close to lan chipset

C57

0.1U/10V_4

C720
10U/6.3V_8

L9

L9 0_8

C723

0.1U/10V_4

+FB12 31

L66
0_8

L66

>30mil

C728

0.1U/10V_4

R442 0_8

R220

L66
RTL8111C used 0ohm
RTL 8101E/8102E need to
remove

C719

0.1U/10V_4

+LAN_A1.8

C727

0.1U/10V_4

C731

0.1U/10V_4

C722

0.1U/10V_4

>30mil

+LAN_A1.8

C721

0.1U/10V_4

R220

+LAN_E1.8

8102E need to remove
8101E use 0 ohm
8111C use 4.7uH

C732

1U/10V_4

C716

0.1U/10V_4

C715

0.1U/10V_4

C729

0.1U/10V_4

+3V_A_LAN

C714

0.1U/10V_4

these CAP are for LAN CHIP LAN_A3.3
pins-- 2 and 59.placement close lan chip

Power trace Layout 寬度> 30mil

these cap are for lan
chip LAN_A1.8

C730

0.1U/10V_4

pins--5, 8, 11 and 14.
placement close chip

C732 change to 1U on PV

these cap are for lan chip
LAN_D1.8 pins, such as 22 and 28.
placement close lan chip

these CAP are for LAN CHIP LANVCC
pins--16, 37, 46 and 53.placement close lan
chip

Power domain chart

RTL8111B /
RTL8101E

LANVCC

LAN_D1.8
LAN_A1.8
LAN_D1.5

3.3V

1.8V

1.8V

1.5V

RTL8111C
RTL8102E

3.3V

1.2V

1.2V

1.2V

C705
RTL8111C stuff

L67 *0_8

C704

L67

C704
*10U/6.3V_8

L67 & C704
8101E/8102E stuff
8111C need to remove

5

+CTRL1531

A A

RTL8101E / 8102E can remove

C705

C705
10U/6.3V_8

C711
10U/6.3V_8

4

C49

0.1U/10V_4

C79

0.1U/10V_4

C84

0.1U/10V_4

C83

0.1U/10V_4

0.1U/10V_4

these cap are for lan chip LAN_D1.5 pins-- 15,
21, 32, 33, 38, 41, 43, 49, 52 and 58.placement
close lan chip

C61

3

C63

0.1U/10V_4

>30mil

C48

0.1U/10V_4

C47

0.1U/10V_4

Power trace Layout 寬度> 30mil

+LAN_D1.5

C55

C80

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

2

C66

NB5/RD5

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

LAN Power

Date: Sheet

1

of

32 45Tuesday, February 19, 2008

1A

A

B

C

D

E

NEWCARD (PCIEXPRESS*1 + USB*1)

SI-2 Modified footprint -- Modify 12/27

CN37

S1

1

GND1

SATA_TXP414
SATA_TXN414

SATA_RXN414
SATA_RXP414

D D

ODD_5V

R624 1K/F_4

1 2

2
3
4
5
6
7

8

9
10
11
12
13

TXP
TXN
GND2
RXN
RXP
GND3

DP
+5V
+5V
MD
GND
GND

SATA ODD

14

14

S7
P1

15

15

P6

Del L90 direct on PV

ODD_5V

+5V

C877

10U/6.3V_8

C896

0.1U/10V_4

120 mils

0.1U/10V_4

C893

C897

0.1U/10V_4

C895

0.1U/10V_4

NEWCARDSATA CD-ROM

USBP7-13
USBP7+13

NEWCARD_DETECT13

SCLK_WLAN13,36
SDATA_WLAN13,36

PCIE_WAKE#13,31,36

PCIE_NEW_CLKN2
PCIE_NEW_CLKP2

PCIE_RXN09
PCIE_RXP09

PCIE_TXN09
PCIE_TXP09

R258 SI-2 remove --internal pull hi

CPUSB#
CPPE#

C C

SI-2 Modified footprint -- Modify

21

SI Build

22

CN40 SATA HDD(1ST)

Main HDD

1

123456789

+3V_HDD1
+5V_HDD1

B B

+5V_HDD1

+5V

固定孔

Size as SMT request

1011121314151617181920

+3V_HDD1 +3V

R754 *0_8

23

24

+5V: 2 A(4 Pin)

20

+3V: 2 A(4 Pin)
Gnd : (5 Pin)

SATA_TXP0 14
SATA_TXN0 14

SATA_RXN0 14
SATA_RXP0 14

2231_STBY#

N_PLTRST#
NEWCARD_DETECT

PERST#
2231_SHDN#
NEWCLKEN
NEW_OC#

Del R578 direct on PV

+5V_HDD1

C858

10U/6.3V_8

A A

C860

4.7U/6.3V_6

0.1U/10V_4

A

C861

C859

10U/6.3V_8

+3V_HDD1

C33
*10U/6.3V_8

C31
*4.7U/6.3V_6

C697
*0.1U/10V_4

B

C32
*10U/6.3V_8

EPRESS_PLTRST#12

SI-2 modified -­EPRESS_PLTRST# is
3VS5 power rail ,
Maybe can remove NAND
GATE

2231_SHDN#
2231_STBY#

0.7A

+3VS5

+3VAUX

R270 0_6

OC#

R5538 NEW CARD POWER SWITCH

CPPE#

internal pull up to AUXIN

SYSRST#

internal pull up to AUXIN

CPUSB##

internal pull up to AUXIN

PERST#

a logic level power good

SHDN#

internal pull up to AUXIN

RCLKEN

internal pull up to AUXIN

OC#

over current status

STBY#

internal pull up to AUXIN

C

SI-1 modified -- change
footprint CN17 #31,32 as
ME request for Hole pad
change

USBP7­USBP7+
NEWCARD_DETECT

SCLK_WLAN
SDATA_WLAN

PCIE_WAKE#
PERST#

CLK_NEW_OE#
NEWCARD_DETECT
PCIE_NEW_CLKN
PCIE_NEW_CLKP

L96 *WCM2012-110

PCIE_RXN0
PCIE_RXP0

PCIE_TXN0
PCIE_TXP0

R218 *10K/F_4
R258 *10K/F_4
R280 *10K/F_4
R281 *10K/F_4

L97 *WCM2012-110

U13

STBY#13.3VIN

17

AUXIN

15

AUXOUT

6

SYSRST#

10

CPPE#

9

CPUSB#

8

PERST#

20

SHDN#

18

RCLKEN

19

OC#

7

GND

1
4 3

1
4 3

pull hi/lowpin name

EPRESS_PLTRST#

U11

*TC7SH08FU

R209 0_4
R212 0_4
R214 0_4

R260 0_4

2

2

+3VS5

3.3VIN

1.5VIN

1.5VIN

3.3VOUT

3.3VOUT

1.5VOUT

1.5VOUT

R5538D001-TR-F

+3VS5

2
1

3 5

R784 0_6

USB7-1
USB7+1
CPUSB#

+1.5V_NEWCARD

+3VAUX

CPPE#

PCIE_RXN0
PCIE_RXP0

PCIE_TXN0
PCIE_TXP0

2

+3V

4
12

+1.5V

14
3

+3V_NEWCARD

5
11

+1.5V_NEWCARD

13

SI-2
modified for
add Pin
21~25 as U25
Thermal pad
tied to Gnd

+1.5V

12

C525

0.1U/10V_4

C514 0.1U/10V_4

N_PLTRST#

4

+3V_NEWCARD

2A
1A

C526

0.1U/10V_4

CN17

EXPCARD-48303-0042-26P-L-QT6

1

GND_1

2

USB-

3

USB+

4

CPUSB#

5

RSV_0

6

RSV_1

7

SMBCLK

8

SMBDATA

9

+1.5V_0

10

+1.5V_1

11

WAKE#

12

+3.3VAUX

13

PERST#

14

+3.3V_1

15

+3.3V_2

16

CLKREQ#

17

CPPE#

18

REFCLK-

19

REFCLK+

20

GND_2

21

PERn0

22

PERp0

23
24
25
26

Del R790,
R791,
R792,
R793 for
RF on PV

EXT_NWD_CLK_REQ#2

D

GND_3
PETn0
PETp0
GND_4

31

NC5

32

NC5

NC430NC329NC228NC1

27

NB5/RD5

SI-2

12

C957
*.1U/10V_4

R224 0_6

CLK_NEW_OE#

+3V

12

C567

0.1U/10V_4

+3VAUX

12

C507

0.1U/10V_4

+3VS5

12

C531

0.1U/10V_4

For HP request to
reserve

12

C958
*.1U/10V_4

3

1

C561

0.1U/10V_4

C506

0.1U/10V_4

C530

0.1U/10V_4

12

C959
*.1U/10V_4

2

Q21
2N7002E

+3VS5

+3V +3VS5

+3V_NEWCARD

+1.5V_NEWCARD

PCIE_RXN0
PCIE_RXP0

PCIE_TXN0

PCIE_TXP0

12

R223
*22K_4

NEWCLKEN

follow AMD schematic

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

NEW CARD/SATA ODD/SATA HDD

Date: Sheet

E

C575
10U/6.3V_8

12

C519

0.1U/10V_4

12

C498

0.1U/10V_4

C960
*.1U/10V_4

33

C520

0.1U/10V_4

of

33 45Tuesday, February 19, 2008

C513

0.1U/10V_4

C499

0.1U/10V_4

1A

5

4

3

2

1

POWER BUTTON CONNECT

MY5

C379 220P/50V_4

MY6 MX0

C833 220P/50V_4

MY3
MY7

C834 220P/50V_4

MY8 MY12

C376 220P/50V_4

MY9

C403 220P/50V_4

MY10

C830 220P/50V_4 C831 220P/50V_4

MY11

C373 220P/50V_4

SI-2 Modified

-- net swap for
layout concern

Del R770 on PV

+5V_LED

C394

0.1U/10V_4

KEYBOARD PULL-UP

RP42

10

MY15 MY5

9

MY11

8

MY13

7 4

MY3

+3VPCU

MY[0..15]35

MX[0..7]35

MY9
MY1
MY2
MY7

10K_10P8R
RP41

10

9
8
7 4

10K_10P8R

SI-2 Modified 12/27

140 mA

+PWLEDVCC

PWR_LED#

NBSWON1#

12

G2
*SHORT_ PAD1

+3VPCU

CN4
PWR BTN CONN

1
2
3
4
5
6

1. +3VPCU(LIDSWITCH PWR)

2. LEDVCC(+3VPCU)

3. LIDSWITCH

4.POWERON#

5. PWRLED#

6. GND

D D

C C

+PWLEDVCC

12

C36

0.1U/10V_4

C38

0.1U/10V_4

Add R36 for +5VPCU

+5VPCU

+3VPCU_LED

LID_EC#23,35

NBSWON1#35

PWR_LED#29,35

0.1U/10V_4

C699 0.1U/10V_4

R36 *39_6

1 2

R33 39_6

1 2

C481

CAP SW CONNECT

MY1
MY2
MY4
MY0

MX4
MX6
MX3
MX2

MY0

1
2

MY4

3

MY8

56

MY10

1

MY14

2

MY12

3

MY6

56

MY[0..15]

MX[0..7]

CN12

4
3
2
1

BL123-04R-TAND

BL123-04R-4P-L-QT6

C836 220P/50V_4
C835 220P/50V_4
C377 220P/50V_4C375 220P/50V_4
C381 220P/50V_4 C385 220P/50V_4

C402 220P/50V_4
C383 220P/50V_4
C837 220P/50V_4
C380 220P/50V_4

MX1
MX7
MX6
MY9
MX4
MX5
MY0
MX2
MX3
MY5
MY1
MX0
MY2
MY4
MY7
MY8
MY6
MY3
MY12
MY13
MY14
MY11
MY10
MY15

1.LEDVCC

2.LEDVCC

3. NC

4. GND

MX7
MX5

MX1

MY13
MY14
MY15

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

KB CONN

gb1rf240-1253-7f-24p-l

C384 220P/50V_4
C378 220P/50V_4
C382 220P/50V_4

C832 220P/50V_4
C374 220P/50V_4

C372 220P/50V_4

CN11

SI-2 Modified

34

B B

+5V_LED

C934

0.1U/10V_4

+3VPCU

MBCLK35,44
MBDATA35,44
IC2_INT35

NUMLED#35

C75

0.1U/10V_4

CN8

CAP SW BOARD

1
2
3
4
5
6
7
8
9

1. +3VPCU

2. MBCLK

3. MBDATA

4. CAP_INT

5. GND

6. NUM LOCK LED

7. +5V

8. ESB_CLK

9. ESB_DAT

CAP_ESB_CLK35
CAP_ESB_DAT35

A A

L77 BK1608HS470
L57 BK1608HS470

ESB_CLK

ESB_DAT

C904

10P/50V_4

C621
10P/50V_4

PV modified:
CN8 update type
Add L57, L77, C904, C621 for ESB
Del R104, R103

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

5

4

3

2

NB5/RD5

LED/KEYBOARD/SW

Date: Sheet

1

34 45Tuesday, February 19, 2008

1A

of

5

Change U9 layout footprint

to LQFP128-16X16-4-AA1

SERIRQ12

LFRAME#12,36

LAD012,36
LAD112,36
LAD212,36

PCLK_LPC_KB392012

D D

C C

+3VPCU

LAN CABLE DETECT31

B B

LAD312,36

PCIRST#12

CLKRUN#12

GATEA2013

RCIN#13

MX034
MX134
MX234
MX334
MX434
MX534
MX634
MX734

MY034
MY134
MY234
MY334
MY434
MY534
MY634
MY734
MY834
MY934
MY1034
MY1134
MY1234
MY1334
MY1434
MY1534

IC2_INT34

R200 10K/F_4

ACIN44

SERR#12

VOLME_UP#37
VOLME_DN#37

PR_INSERT#24,37
MUTE_LED28,37

R235 *4.7K_4

LAN_POWER43

LAN_DISABLE#13,31

LEDVCC_EN#29

MBATLED0#29
TP_LED1#29

TP_LED2#29

R234 0_4

RF_LINK#36

T60

SUSON41,43
MAINON20,27,39,42,43,44

S5_ON42,43 LID_EC# 23,34

VR2.5_ON41

C493

0.1U/10V_4

SERIRQ
LFRAME#
LAD0
LAD1
LAD2
LAD3
PCLK_LPC_KB3920

R208 0_4

CLKRUN#
SCI1#

GATEA20
RCIN#
3920_RST#

MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15

IC2_INT
SLPBTN#

ACIN
TPCLK
TPDATA

BIOS_RD#
BIOS_WR#
BIOS_CS#

VOLME_UP#
VOLME_DN#
PR_INSERT#
MUTE_LED
RF_LINK#
BLUELED
LAN CABLE DETECT

BIOS_A0
SUSON
MAINON
LAN_POWER
S5_ON
VR2.5_ON

LEDVCC_EN#
MBATLED0#

TP_LED1#
TP_LED2#

C494

4.7U/6.3V_6

1 2

For KB3926 C version

SERR#_1

3
4

10

8
7

5
12
13
38

20

1

2
37

55
56
57
58
59
60
61
62

39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82

83
84
85
86
87
88

119
120
128

89
76

109
110
112
114
115
116
117
118

97
98
99

100
101
102
103
104
105
106
107
108

124

KB3926

U9

SERIRQ
LFRAME
LAD0
LAD1
LAD2
LAD3
PCICLK
PCIRST/GPIO5
CLKRUN

SCI/GPIOE
GA20/GPIO0
KBRST/GPIO1
ECRST

KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37

KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25
KSO6/GPIO26
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49

PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D
PSCLK3/GPIO4E
PSDAT3/GPIO4F

RD
WR
SELMEM/SPICS
SELIO/GPIO50
AD5/GPI43
D0/GPXD0
D1/GPXD1
D2/GPXD2
D3/GPXD3
D4/GPXD4
D5/GPXD5
D6/GPXD6
D7/GPXD7

A0/GPXA0
A1/GPXA1
A2/GPXA2
A3/GPXA3
A4/GPXA4
A5/GPXA5
A6/GPXA6
A7/GPXA7
A8/GPXA8
A9/GPXA9
A10/GPXA10
A11/GPXA11

V18R

SI-2 Add Pin 117,103 for DSM,116 for Bluetooth,Pin 23 for Key Beep to Amplifier

SCI1#

PM_BATLOW1#

A A

DNBSWON#1

KBSMI#1

SWI#1

D13 CH501H-40PT

D15 CH501H-40PT

D16 RB500V-40

D12 RB500V-40

D14 *CH501H-40PT L-F

21

21

21

5

SCI# 13

PM_BATLOW# 13

DNBSWON# 13

KBSMI# 13

SWI# 13

Change D12, D16 to RB500
for current loss

4

+3VPCU

9

VCC1

22

VCC2

33

VCC3

96

VCC4

111

VCC5

125

VCC6

67

AVCC

TEMP_MBAT

63

AD0/GPI38
AD1/GPI39
AD2/GPI3A
AD3/GPI3B

DA0/GPO3C
DA1/GPO3D
DA2/GPO3E

DA3/GPO3F

PWM1/GPIOF

PWM2/GPIO10

FANPWM1/GPIO12
FANPWM2/GPIO13

FANFB1/GPIO14
FANFB2/GPIO15

SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47

GPIO4
GPIO7

GPIO8
GPIOA

GPIOB
GPIOC
GPIOD

GPIO11
GPIO16
GPIO17
GPIO18

GPIO19

GPIO1A

GPIO40
GPIO41

AD4/GPI42

GPIO52
GPIO53
GPIO54
GPIO55
GPIO56
GPIO57
GPIO58
GPIO59

XCLKO

XCLKI

GND1
GND2
GND3
GND4
GND5

AGND

SB internal pull Hi 10k
to 3v_s5

SB internal pull Hi
10k to 3v_s5

4

64
65
66

68
70
71
72

21
23

26
27
28
29

77
78
79
80

6
14

15
16

17
18
19
25
30
31
32

34
36

73
74
75
90
91
92
93
95
121
126
127

123

122

11
24
35
94
113
69

AD_TYPE
AD_AIR
SYS_I

CC-SET
CELL_SLT
FAN1ON
D/C#

PWM_VADJ
KEY_BEEP

FAN2ON
FAN1SIG

MBCLK
MBDATA
MBCLK2
MBDATA2

SUSB#
HWPG

PM_BATLOW1#
SUSC#

NBSWON1#

SWI#1

KBSMI#1

VRON
NUMLED#

DNBSWON#1

CAPSLED#
PWR_LED#
ECPWROK
RSMRST#
VOLMUTE#
SPI_CLK
LID_EC#

CRY2

CRY1

C456 4.7U/6.3V_6
C472 0.1U/10V_4
C463 0.1U/10V_4
C491 0.1U/10V_4
C495 0.1U/10V_4
C490 0.1U/10V_4
C455 0.1U/10V_4
C461 4.7U/6.3V_6

+3VPCU_EC

(1KHz)

reserved for H/W CIR

C479 18P/50V_4

4

1

C480 18P/50V_4

SI-2 modified
for avoid AD-_ID
noise

+3VPCU

SLPBTN#
NBSWON1#

+3VPCU

TEMP_MBAT 44
AD_AIR 44

SYS_I 44
CC-SET 44
FAN1ON 37

D/C# 44
PWM_VADJ 23

KEY_BEEP 28

T54
T53

CIR_IN

MBCLK 34,44
MBDATA 34,44
MBCLK2 5,18
MBDATA2 5,18

SUSB# 13
HWPG 20,23,38,39,41,42

SUSC# 13

CAP_ESB_CLK 34

CAP_ESB_DAT 34
NBSWON1# 34
LAN_REST# 31
EC_DEBUG1 36

VRON 39,40
NUMLED# 34

Del R256 for TP
on PV

T56
T57

CAPSLED# 29
PWR_LED# 29,34
ECPWROK 5,16
RSMRST# 13
VOLMUTE# 28

Y3

32.768KHZ

2 3

change D11 type
for PV

AD_TYPE

C941

0.1U/10V_4

1 2

R176 47K_4

R206 0_4
R205 *0_4

3

U8

L41

BLM18BA470SN1(47,300MA)_6

*GMT_G910T21U

1

Vout

SI-2 for fix cpu vcore

R794 0_4

FAN1SIG 37
CIR_IN 27,37

Battery charge/discharge
Cap button

VGA thermal
system thermal

CIR_IN 27,37

+3VPCU

+3VPCU

3

CPU_SVID 40

SI-2 Modified for hp request

Del R249 on PV

Pin 17 (GPIO0B) ==> assigned for
ESB_CLK / Pull high 4.7K
Pin 18 (GPIO0C) ==> assigned for
ESB_DAT / Pull high 4.7K

LAN_RESET# move to Pin 25
pin 18 (SWI#1) move to Pin 31

SI-2 ADD R256
for H/W CIR

+3V

R199 *10K/F_4

R244 100K/F_4
R188 10K/F_4
R236 10K/F_4
R237 10K/F_4
R207 10K/F_4
R190 4.7K_4
R197 4.7K_4
R210 *8.2K_4
R175 *8.2K_4
R213 *8.2K_4

R256 4.7K_4
R220 4.7K_4

SB780 internal have pull hi

SI-1
modified

D11
RB500V-40

R174 100/F_4

R173

33.2K/F_4

-- change
vaule

64.9K -->65W

33.7K -->90W

CS36492FB17
CS33322FB13

3920_RST#

C453 0.1U/10V_4

3920_RST# 5,44

12

SLP_BTN# 37

+5VPCU+3VPCU_EC

3

Vin

GND

2

C458
1U/10V_4

HWPG

CIR_IN
NBSWON1#
VOLME_UP#
VOLME_DN#
SLPBTN#
MBCLK
MBDATA
PM_BATLOW#
CLKRUN#
SERIRQ

CAP_ESB_CLK
CAP_ESB_DAT

UMA BOM missing

AD_ID 44

RES CHIP 64.9K 1/16W +-1%(0402)
RES CHIP 33.2K 1/16W +-1% (0402)

2

+5VSUS

Del L86 on PV

+5VSUS
+3V_LED

TPCLK

L38 BLM18BA470SN1(47,300MA)_6

TPDATA

L39 BLM18BA470SN1(47,300MA)_6

SW2

MY7

PA

TMG-533-S-V-TR

R153 4.7K_4
R163 4.7K_4

close conn

TOUCH PAD CONNECTOR

25 mils

C417

*10P/50V_4

C441
*10P/50V_4

13

MX4

24
56

1

TPCLK

35

TPDATA

C851 0.1U/10V_4
C411 0.1U/10V_4

12

TPCLK-1
TPDATA-1
TP_LED1#
TP_LED2#

TP_L
TP_R

PCB footprint
BL121-12R-12P-L-QT6

Update SW2, SW4, SW6
P/N on PV

11
10
9
8
7
6
5
4
3
2
1

CN14

TOUCH PAD CONN

TOUCH PAD ON/OFF

TP_L

TP_R

R352 1K/F_4

C445

0.1U/10V_4

1 2

R365 1K/F_4

C446

0.1U/10V_4

1 2

TP_L_CONN

TP_R_CONN

SW4

TMG-533-S-V-TR

SW6

TMG-533-S-V-TR

13
24
56

13
24
56

TOUCH PAD L/R

Blue LED change to 100K ohm
pull low on PV

BLUELED

BLUELED30,36

Del R246, R254 direct on PV

BIOS_CS#
SPI_CLK
BIOS_WR#

BIOS_RD#

R238 10K/F_4

+3VPCU

2

NB5/RD5

R268 100K/F_4

R239 33_4

AKE5GFK0Z09

SST

AKE3GFP0N08WINBOND
AKE3GZP0500

PME

SPI_3P

U12

1
6
5
2

3

CE#
SCK
SI
SO

WP#

MX25L8005

1M byte
SPI
BIOS

C542

0.1U/10V_4

VDD

HOLD#

VSS

+3VPCU

8

7
4

SPI_7P

AKE3GZP0Q00EON

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

KB3926/ROM/TP

Date: Sheet

35 45Tuesday, February 19, 2008

1

R263
10K/F_4

1A

of

A

B

C

D

E

Mini PCI-E Card 1

SI-2 modified --Change Library to MIPCI-C-1775861-52P-LDV-QT6

D D

PCIE_TXP19
PCIE_TXN19

PCIE_RXP19
PCIE_RXN19

PCLK_LPC_DEBUG12

PCIE_MINI1_CLKP2

PCIE_MINI1_CLKN2

T3

BT_COMBO_EN#14

C C

BT_DATA,BT_CHCLK,CLKREQ#
internal pull-DOWN 100k
ohm

T4

PCIE_TXP1
PCIE_TXN1

PCIE_RXP1
PCIE_RXN1

PCLK_LPC_DEBUG
MINI_PLTRST#

PCIE_MINI1_CLKP
PCIE_MINI1_CLKN

CLK_MINI_OE#

MINICAR_PME#

R579
*10K/F_4

PCLK_LPC_DEBUG

CN25

51

Reserved

49

Reserved

47

Reserved

45

Reserved

43

Reserved

41

Reserved

39

Reserved

37

Reserved

35

GND

33

PETp0

31

PETn0

29

GND

27

GND

25

PERp0

23

PERn0

21

GND

19

Reserved

17

Reserved

15

GND

13

REFCLK+

11

REFCLK-

9

GND

7

CLKREQ#

5

BT_CHCLK

3

BT_DATA

1

WAKE#

MINI PCIE H=4.0

R432 *0_4

+3V_WLAN

+3V

LED_WPAN#
LED_WLAN#

LED_WWAN#

USB_D+

SMB_DATA

SMB_CLK

+3.3Vaux

W_DISABLE#

Reserved
Reserved
Reserved
Reserved
Reserved

C717 *27PF/50V_4

+3.3V

GND

+1.5V

GND

USB_D-

GND

+1.5V

GND

PERST#

GND

+1.5V

GND

+3.3V

Del R419

52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18

16
14
12
10
8
6
4
2

WLAN

+1.5V

MINI_BLED

R277 *0_4

RF_LINK#

DAT_SMB
CLK_SMB

MINI_PLTRST#

LAD0_1
LAD1_1
LAD2_1
LAD3_1
LFRAME#_1 LFRAME#

R288 10K/F_4

R434 0_4
R436 0_4
R437 0_4
R438 0_4
R440 0_4

LAD0
LAD1
LAD2
LAD3

PCIE_WAKE#13,31,33

BLUELED 30,35
RF_LINK# 35

+3V

USBP10+ 13
USBP10- 13

SDATA_WLAN 13,33
SCLK_WLAN 13,33

MINI_PLTRST# 12
RF_OFF# 12

LAD0 12,35
LAD1 12,35
LAD2 12,35
LAD3 12,35
LFRAME# 12,35

+3VSUS

R57 *10K/F_4

2

13

Q9
*PDTC144EU

Del R48, R49
for USB
power shape

Change +3VSUS to +3V
Del R35 on PV

INTEL WLAN
CARD PIN 20
W_DISABLE#
have
internal
pull-up 110k
ohm

MINICAR_PME#

C78

0.01U/16V_4

C42

0.1U/10V_4

C72

0.1U/10V_4

C30

0.1U/10V_4

+1.5V

+3V_WLAN

C707
10U/6.3V_8

+3V

C41
1U/10V_4

C35
10U/6.3V_8

36

for EMI request

Mini PCI-E Card 2 TV tuner card

Del EC_debug2 for
CAP board update

PCIE_TXP39
PCIE_TXN39

PCIE_RXP39
PCIE_RXN39

on PV

FOR KBC DEBUG

R350 *0_6

+5V

EC_DEBUG135

PCIE_TXP3

PCIE_RXP3
PCIE_RXN3

PCIE_MINI2_CLKP
PCIE_MINI2_CLKN

MINIEC_5V

CN39

51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17

15
13
11

9
7
5
3
1

MINIPCIE H=7.0

COMP VIDEO IN
Therm Trip out
AUD_R_IN
AUD_L_IN
GND
+3.3Vaux
+3.3Vaux
GND
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
S-Video Y/in
S-Video C/in

GND
REFCLK+
REFCLK­GND
CLKREQ#
NC
NC
NC

67910-0002

+3.3Vaux

GND

+1.5V

GND

NC(USB_D+)

NC(USB_D-)

GND

NC(SMB_DATA)

NC(SMB_CLK)

+1.5V

GND

NC(+3.3Vaux)

PERST#

GND

+1.5V

GND

+3.3Vaux

+1.5V

52
50
48
46

NC

44

NC

42

NC

40
38
36
34
32
30
28
26
24
22
20

NC

18
16

NC

14

NC

12

NC

10

NC

8

NC

6
4
2

B B

PCIE_MINI2_CLKP2
PCIE_MINI2_CLKN2

A A

Del R308

PDAT_SMBPCIE_TXN3
PCLK_SMB

MINI_PLTRST#

Del WAN off#

C606

0.01U/16V_4

SI-2 modified --Change Library to MIPCIE-P04-FJ504-170-52P-QT6

A

B

+3V

C605

0.1U/10V_4

R304 0_6
R303 *0_6

+1.5V

C607

C591

0.1U/10V_4

10U/6.3V_8

C592
10U/6.3V_8

USBP11+ 13
USBP11- 13

PDAT_SMB 2,6,7,13,28
PCLK_SMB 2,6,7,13,28

+3V
+3VSUS

C

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

D

NB5/RD5

Mini CARD X 3

Date: Sheet

E

36 45Tuesday, February 19, 2008

1A

of

A

CABLE DOCK

SI-2 modified follow QT6 schematic
remove R671,R670,C916,Q30,L65,C669,R388

4 4

SPDIF27

SI-2 modified -­for power leakage
concern

docking
insert is HI

3 3

voltage

DOCK_PRESENT

R409 10K/F_4

+5VSUS

R779 221/F_4

+3V

12

DKPR#DKPR#DKPR#

1 2

R412 1K/F_4

+5V

1 2

S0: 4V
S3: 2.5V
S4/S5:
0V

R413
100K/F_4

*Check
voltage on
DB

2

R414
2K/F_4

DK_PWRON

C949 .1U/50V_6

+3VPCU

12

R415
*100K_4

PR_INSERT#

Q31
MMBT3904

1 3

D29

D30

R780

100/F_4

RB500V-40

RB500V-40

SPDIF_DOCK

C950
220P/50V_4

PR_INSERT# 24,35

Change D29, D30 to RB500
for current loss on PV

PWR_ON

12

R408
15K/F_4

B

support 6A 200mils
CX000480005

+DOCK_VA

+DOCK_VA44

USBP4-13

USBP4+13

PR_GEN24
PR_RED24
PR_BLU24

L5

C29

0.1U/50V_6

4 3
1

2

L4 *WCM-2012-900T(400mA)

R16

150/F_4

150/F_4

48/6A_12

C17

0.1U/50V_6

R9

150/F_4

USBP4­USBP4+

R13

VA_P

C

PR_GEN
PR_RED
PR_BLU

C25

5.6P/50V_6

DDCDAT224

PR_HSYNC24

DDCCLK224

PR_VSYNC24

LAN_MX3+31
LAN_MX3-31

LAN_MX2+31
LAN_MX2-31
LAN_MX1+31
LAN_MX1-31
LAN_MX0+31
LAN_MX0-31

5.6P/50V_6

C19

R18 33_6

R20 33_6

+VIN

R12 0_6
R11 0_6
R15 0_6

C23

5.6P/50V_6

C698

0.1U/50V_6

CRT_GDK
CRT_RDK

CRT_BDK

D

C24

5.6P/50V_6

CN21

44

VDD

38

38

40

40

34

34

36

36

30

30

32

32

26

26

28

28

22

22

24

24

18

18

20

20

14

14

16

16

10

10

12

12

6

6

8

8

2

2

4

4

42

VSS

46

46

DOCKING CONN

C20

5.6P/50V_6

VDD

39
37
35
33
31
29
27

25
23
21
19
17
15

13
11

9
7
5
3
1

VSS

45

C21

5.6P/50V_6

43

39
37
35
33
31
29

PWR_ON

27

MUTE_LED

25

SLP_BTN#

23

JACK_SEN#

21

VOLME_UP#

19

VOLME_DN#

17

SPDIF_DOCK

15
13

RSPK_DK_L

11

LSPK_DK_L

9
7
5
3

DOCK_PRESENT

1
41

45

VA_P VA_P

CRT_GDK
CRT_RDK

CRT_BDK
PR_HSYNC_D

USBP4-

PR_VSYNC_D

USBP4+

E

CIR_IN 27,35

MUTE_LED 28,35
SLP_BTN# 35
JACK_SEN# 27
VOLME_UP# 35
VOLME_DN# 35

Remove R410, R411

AGND
RSPK_DK 27
LSPK_DK 27

DOCK_MIC_R 27
DOCK_MIC_L 27

AGND

37

filter for docking CRT

2 2

CPU FAN

FAN1SIG35

20 mil

C725

2.2U/6.3V_6

G955 /FON
signal have
internal
pull Hi to
VIN , R420

1 1

maybe can
remove

FAN1ON35

R420
10K/F_4

FAN_SMBALERT#

FANPWR = 1.6*VSET

A

C724

0.1U/10V_4

+5V

+5VFAN1

C687 1U/10V_4

U24

VIN2VO

1

/FON

4

VSET

G995

GND
GND
GND
GND

+3V

R177

4.7K_6

VOLME_DN#

3
5
6
7
8

CN26

1
2
3

FAN CONN

+5VFAN1

1
2
3

Gnd shape

1234

B

5678

CIR_IN
PR_HSYNC_D
PR_VSYNC_D

C27

*47P/50V_4

G995 layout notice

C26

*47P/50V_4

C

C688

*100P/50V_4

*100P/50V_4

C692

DOCK_MIC_R
DOCK_MIC_L
RSPK_DK_L
LSPK_DK_L
JACK_SEN#

C691

*270P/25V_4

C693

*180P/50V_4

SI-2 modified

D

C694

*180P/50V_4

C696

*180P/50V_4

AGNDAGNDAGNDAGNDAGND

NB5/RD5

C695

*180P/50V_4

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

CABLE DOCKING/FAN

Date: Sheet

E

1A

of

37 45Tuesday, February 19, 2008

5

4

3

2

1

+3V 2,3,5,6,7,10,11,12,13,14,15,16,18,20,23,24,25,26,27,28,29,30,31,33,35,36,37,39,43

+3V

38

+3V

6.76A

S0-S1

38 45Tuesday, February 19, 2008

of

1A

DC/DC +3VPCU/+ 5VPCU/ +12VALW

+5VPCU 27,28,34,35,39,40,41,42,43

D D

+3VSUS 13,25,30,36,39,41,43
+3VS5 5,7,12,13,14,15,16,23,26,33,43
+5VSUS 23,30,35,37,43
+5V 5,15,20,23,24,25,27,28,29,30,33,36,37,39,42,43
+LANVCC

+3VPCU 5,12,23,29,30,34,35,37,40,41,42,44

10U/25VD_1206

5 Volt +/- 5%

PC157

0.1U/50VB_6

+5VPCU
C/C:8A
P/C:10A

C C

+5VPCU

+

SI-1 Modified ­ECAP6_3X6_1-7_2-QT8

B B

A A

MAIND43 SUSD43

For EMI-SI

0.1U/10VC_4

Vout=0.7(Ra+Rb)/Rb

Rb around 49.9k

+5V_ALWP

330U/6.3V_ESR25_6X5.8

12

PC195

0.1U/10VC_4

PC177

MAIND

5

PL12

2.5uH/7.5A_10

PC179

Ra

PR155
*0_4

Rb

PR156
0_4

6236AGND

1 2

1 2

PC161

*100P/50VA_6

I_lim*MOSFET(RDSON)=V_ILIM(mV)/10
V_ILIM(mV)=5uA*R_ILIM

578

PQ24

+5V

SI4800BDY

4.31A

3 6

+5V

241

S0-S1

+5V 5,15,20,23,24,25,27,28,29,30,33,36,37,39,42,43 +5VSUS 23,30,35,37,43

PC76

PR208
*2.2_6

2200P/50VB_4

1 2

+12VALW

+VIN

PC79

Place these CAPs
close to FETs

578

PQ53
SI4800BDY

3 6

241

578

PQ54
FDS6690AS

3 6

241

Rds(on) 15m ohm

PC97

0.1U/50VB_6

PR147
0_6

PR161
100K_4

+5VAL

SYS_SHDN#5,44

5V_DH
5V_LX

5V_DL

+12V_ALWP

For EMI-SI

0.1U/10VC_4

4

PR151
0_4

PC194

+VIN

6236AGND

CHN217PT

PD17
CHN217PT

1 2

PR164

0_8

PR153
309K/F_4

PD18

1

2

1

2

PC96

2.2U/50VB_8

+5VPCU+5VPCU

578

3 6

12

*0.1U/10VC_4

+5VPCU

1 2

PC103

0.1U/50VB_6

5VBST1R

1 2

241

0.1U/50VB_6

PC105

6236FB1
PGOOD1

6237ON1

PR149 1_6

PC101

3

0.1U/50VB_6

PC100

3

0.1U/50VB_6

SI2

PR150

12

0_4

PQ23
SI4800BDY

6237VIN

PC109

6236AGND

+5VSUS

PR163
390K_4

150K/F_4

6236AGND

9
10
11
12
13
14
15
16

5VBST1

6236AGND

PR162

PC108

*1U/10VC_4

BYP
OUT1
FB1
ILIM1
PGOOD1
ON1
DH1
LX1

PAD

33

+5VAL

PC180
1U/10VC_4

+5VSUS

4.5A

S0-S3

Del PR159 for TP on PV

6237ONLDO

REF

TON

3

5

7

6

1

4

8

IN

RTC

LDO

TON2VCC

ONLDO

LDOREFIN

PU8

ISL6237

BST117DL118VDD19SECFB20AGND21PGND22DL223BST2

24

PR216

*SHORT-1A

3

4.7U/6.3VC_6

+

REF

REFIN2

ILIM2

OUT2

SKIP

PGOOD2

ON2
DH2

3VBST2

1 2

PR160

*47_6

PC110

PC106

0.1U/10VC_4

LX2

PR148

6236AGND

32
31
30
29
28
27
26
25

1_6

6237ON2

+5V_VCC1+5VAL

12

REFIN2

PR217
309K/F_4

1 2

PGOOD2
3V_DH

0.1U/50VB_6

LAN_ON43

12

PR158
0_4

PC102

3VBST2R

6236AGND

6236AGND

PR152

0_4

1 2

6236AGND6236AGND

PC107
1U/10VC_4

3V_DL3V_DL

+3VPCU

3

TON: 5V / 3.3V
GND = 400 / 500KHz
REF = 400 / 300KHz
VCC = 200 / 300KHz

+VIN_6237

578

3V_LX

578

Rds(on) 15m ohm

6236AGND

65241

PQ51
SI3456

+3VLANVCC

2200P/50VB_4

PC94

Place these CAPs
close to FETs

PC93

PC98

3.3 Volt +/- 5%

10U/25VD_1206

0.1U/50VB_6

+3VPCU
C/C:8A
P/C:10A

PQ58
SI4800BDY

3 6

241

3 6

241

PQ59
FDS6690AS

PC104
*0.1U/10VC_4

PGOOD2
PGOOD1

+3VS5 +3VSUS

2.5uH/7.5A_10

PR214
*2.2_6

1 2

PC174
*100P/50VA_6

PL13

PR183
0_4

1 2

1 2

6236AGND

PR157
0_4

PR154
*0_4

876

0.5A

S0-S5

+3VS55,7,12,13,14,15,16,23,26,33,43 +3VSUS 13,25,30,36,39,41,43

+3VS5

123

+LANVCC

0.27A

+3VLANVCC 31,32,43

2

+3VPCU

330U/6.3V_ESR25_6X5.8

0.1U/10VC_4

12

PC182

PC181

+

MAIND43

HWPG 20,23,35,39,41,42

+3VPCU

5

PQ35
AP4228

+3VSUS

4

+3VSUS

SUSD

Size Document Number Rev
Custom

NB5/RD5

Date: Sheet

SI-1 Modified

-ECAP6_3X6_1-7_2-QT8

+3VPCU

578

PQ34
SI4800BDY

3 6

241

1.84A

S0-S3

SUSD 43S5_OND43

PROJECT : QT8

Quanta Computer Inc.

+5V/+3V(ISL6237)

1

5

4

3

2

1

+1.1V & +1.2V

PD1

CH501H-40PT L-F

2 1

1U/10VC_4

PC23

PR8

BST8204VDD

13

12

BST

DH

11

LX

10

ILIM

8

DL

3

FB

RTFBRTFB

PR45

6.04K/F_6

R1 R2

PC19
*100P/50VA_4

R1

PR58

5.11K/F_6

R2

3

0_6

RTDHRTDHRTDHRTDH
RTLXRTLX

ILIM

PR50
10K/F_4

578

RTBSTRTBST

PC4

0.1U/50VB_6

PR38

10.7K/F_4

RTDL

+1.2V

PQ56
SI4856

3 6

241

*22P/50VA_4

PC32

Vo=0.75(R1+R2)/R2

PR49
10K/F_4

578

PQ42

SI4800BDY

3 6

241

578

PQ41
FDS6690AS

3 6

241

RDSon=15m-ohm

Vo=0.75(R1+R2)/R2

R_ILIM=I_LIMIT*Rsense/20uA

Keep R2 higher than 10Kohm

PC90
10U/4VD_8

PC162

0.1U/10VC_4

10U/4VD_8

2200P/50VB_4

PC127

PC163

0.1U/50VB_6

PR200
*2.2_6

1 2

*100P/50VA_6

+1.1V

+1.1V_DYN

PC128

1.5uH/10A_10

PC140

10U/4VD_8

PC165

PL7

2

10U/25VD_1206

PC126

7.0A

S0-S1

+VIN

*10U/25VD_1206

PC131

NB5/RD5

+1.2V

12A (4.3A+7.0A)

S0-S1

+1.2V

PC160

12

+

PC150

390U/2.5V_6X5.8ESR10

+1.1V 9,10,11,18,20,43
+1.2V 2,3,11,12,14,15

+1.1V_DYN 11

0.1U/10VC_4

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
B

+1.2V & +1.1V(RT8204)

Date: Sheet

1

2

VDD

LEN

14

+5VPCU

PR32
10_6

PU1

RT8204

LFB6LDRI

9

VDDP

VOUT

1

7

D D

PR7
604K_4

PR53

0_4

+VIN

PC15

1U/10VC_4

RTTONRTTON

RTLPPGRTLPPG

*100P/50VA_4

PC2

RTPGRTPG

RTENRTEN

16

TON

4

PGD

5

LPGD

15

EN/DEM

17

PAD

Ton=3.85p*R_TON*VOUT/(VIN-0.5)

+3VSUS

Frequency=Vout/(VIN*TON)

PR51
47K_4

HWPG20,23,35,38,41,42

VRON35,40

C C

MAINON20,27,35,42,43,44

PR1

0_4

PR13 *0_4

reserved for pwr seq -- andrew

2

0_4
PC3

RTLENRTLENRTLEN

RTLDRI

PR54
0_6

PC37

22P/50VA_4

3

1

RTLFB

PQ5
2N7002E-G

+3V

13.7K/F_4

PR222
*10K/F_4

PC189
*0.1U/10VC_4

PR52

*100P/50VA_4

PC26

22P/50VA_4

PR223

+1.1V

PC173
10U/4VD_8

PC175

0.033U/25VB_6

PR210
127/F_6

RTPG

R1

3.82A

PQ57

PC169
.1U/10V/04

G9338

SI3456

DRV

ADJ

GND

6
5
2
1

+1.2V

PC168

10U/4VD_8

B B

HWPG20,23,35,38,41,42

PR213
0_4

PR215
*0_4

9338ENRTPG

PC176
*.1U/10V/04

+5V

PU11

3

PGD

4

EN

1

VCC

PC178
.1U/10V/04

S0-S1

4

.1U/10V/04

PC170

3

PR211

9338DRV

47/F_4

6

9338ADJ +1.1V

5
2

PR212
100/F_4

R2

Vout1= 0.5 * ( 1 + R1/R2 )

DYN_PWR_EN

A A

+1.1V_DYN 1.0

High

Low

1.1

DYN_PWR_EN10

PR224

0_4

PR225
2K_4

PR31 for UMA only

5

4

39

39 45Tuesday, February 19, 2008

of

1A

A

B

C

D

E

F

G

H

3A

+CPUVDDNB

12

43

VSEN_NB

VSEN_1

18

12

0_4

12

PR80
0_4

PR81

42

RTN_NB

VDIFF_119FB_120COMP_1

PR26

1K/F_4

PR33

PR93

47/F_4

PR92

47/F_4

PR198

12.1K/F_4

41

OCSET_NB

1200P/50VB_6

54.9K/F_4

40

PGND_NB

21

6.81K/F_4

PC5

PR2

39

LGATE_NB

VW_122ISP_123ISN_1

SI-1 Modified ­ECAP6_3X6_1-7_2-QT8

38

PHASE_NB

1000P/50VB_4

PC11

PR23

180P/50VA_4

PC1

+5VPCU

PR195

PR24

PR100
10_6

PR101
10_6

PC46

0.01U/50VB_4

6265AGND

1

2

3

4

5

6

7

8

9

10

11

12

+1.8VSUS

CPU_VDDNB_RUN_FB_H3

CPU_VDDNB_RUN_FB_L3

6265AGND

1 2

49

GND

OFS/VFIXEN

PGOOD

PWROK

SVD

SVC

ENABLE

RBIAS

OCSET

VDIFF_0

FB_0

COMP_0

VW_0

PC9

0.1U/50VB_6

1 2

PC45
1U/10VC_4

1 2

48

13

VIN

ISP_0

PR189

*1K/F_4

22.1K/F_4

33P/10VB_4

47

VCC

ISN_0

14

PR27

0_4

PR94

46

15

12

6265AGND

1200P/50VB_6

PC141

45

FB_NB

VSEN_0

16

PR29

12

0_4

12

1000P/50VB_4

PC44

PC137

PR197

44.2K/F_6

0_4

44

FSET_NB

COMP_NB

Pin 49 is GND Pin

ISL6265HRTZ-T

RTN_1

RTN_0

17

PR28

0_4

4700P/25VB_4

PC6

PR16
255/F_4

VFIXENISL6265 Pin1

OFS

1.2V

3.3V

1 1

5V

X

V

X

V

XX

VFIXEN VID Codes

SVD

0
1
01

VRM_PWRGD16

+VCORE0

+VCORE1

Output

PR226

10K_4

1.4

1.2

1.0

PR69 *0_4

1 2

PR84
0_4

1 2

PR44
255/F_4

PR17

54.9K/F_4

PR6

10_4

PR5

10_4

PR4

10_4

PR3

10_4

6265AGND

6265AGND

4700P/25VB_4

PR46
1K/F_4

PC18
180P/50VA_4

Close to
CPU
socket

Close to
CPU socket

PR193

*short

+3VPCU

PR83
10K_4

CPU_SVD3

CPU_SVC3

PC28

PC8

1200P/50VB_6

+5VPCU

+3VPCU

6265AGND

PR194

22K/F_4

Parallel

+VIN

PR96
0_4

1 2

PR82
*0_4

1 2

PR95

*10K_4

PR66 0_4

1 2

PR60 0_4

1 2

PR55 0_4

1 2

PC135

180P/50VA_4

100K/F_4

PR40

6.81K/F_4

PC17

1000P/50VB_4

PR25

ISP_0

16.2K/F_4

4.02K/F_4

ISN_0ISN_0ISN_0ISN_0

Reserve for uni-plane

SVC

0
0

1 1 0.8

2 2

CPU_PWRGD_SVID_REG3

SI-2 for fix cpu vcore

3 3

4 4

CPU_SVID35

VRON35,39

CPU_VDD0_RUN_FB_H3

CPU_VDD0_RUN_FB_L3

CPU_VDD1_RUN_FB_L3

CPU_VDD1_RUN_FB_H3

37

UGATE_NB

24

+

LGATE_NB
PHASE_NBPHASE_NBPHASE_NBPHASE_NBPHASE_NBPHASE_NBPHASE_NBPHASE_NB

UGATE_NB

PU3

BOOT_NB

BOOT_0

UGATE_0

PHASE_0

PGND_0

LGATE_0

PVCC

LGATE_1

PGND_1

PHASE_1

UGATE_1

BOOT_1

12

1 2

390U/2.5V_ESR10_6X5.8

PC171

BOOT_NB

36

BOOT_0

35

UGATE_0

34

PHASE_0

33

32

LGATE_0

31

30

LGATE_1

29

28

PHASE_1

27

UGATE_1

26

25

PC13

0.1U/50VB_6

PR37

2.5UH/7.5A_10

0.1U/10VC_4
PC167

PC136

0.1U/50VB_6

PR196
1_6

PR73

1_6

1_6

PR10

4.02K/F_4

PL10

+5VPCU

PC20

0.22U/25VB_6

PR9

16.2K/F_4

UGATE_NB

PC42

0.22U/25VB_6

PC30

4.7U/6.3VC_6

PQ50

G1

8
7
6
5

SI4914DY

52

4

3

1

52

4

3

1

12

52

4

3

52

4

3

D1

D1S1/D2
G2

S2

PQ43
SI7686DP

PQ46

SI7636DP

PQ44
SI7686DP

1

1

PQ47
SI7636DP

1
2
3
4

2200P/50VB_4

PR207
*2.2_8

+VIN_CPU_NB

LGATE_NB

PC139

12

*100P/50VA_6

PC158

ISP_0
ISN_0

2200P/50VB_4

PC132

PR205
*2.2_8

*100P/50VA_6

PC146

ISP_1

ISN_1

0.1U/50VB_6
PC134

0.36uH/25A_11

1 2
3 4

0.1U/50VB_6
PC133

12

0.36uH/25A_11

1 2
3 4

2200P/50VB_4

10U/25VD/1206

PL8

PL9

PC144

PC27

+VIN

40

10U/25VD_1206

0.1U/50VB_6

12

PC142

PC149

+VIN

10U/25VD/1206

PC36

36A

+VCORE0

330U/2V_ESR9_7

330U/2V_ESR9_7

12

12

PC85

PC84

+VIN

10U/25VD/1206

10U/25VD/1206

PC22

PC29

36A

+VCORE1

PC87

PC86

12

12

330U/2V_ESR9_7

330U/2V_ESR9_7

+VCORE0 +VCORE1

PR209

2

112

*0.001_2512

Reserve for uni-plane

+VCORE0 5

+VCORE1 5
+CPUVDDNB5

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
C

A

B

C

D

E

F

G

NB5/RD5

CPU_CORE(ISL6265)

Date: Sheet

40 45Tuesday, February 19, 2008

H

1A

of

A

B

C

D

E

+2.5V 3
+1.8VSUS 3,4,5,6,7,40,42,43

+VIN

4 4

*100U/25V_6.3X7.7

12

+

PC159

*100U/25V_6.3X7.7

12

+

*10U/25VD_1206

PC164

+1.8VSUS

23.65A

S0~S3

+1.8VSUS

12

+

3 3

2 2

VR2.5_ON35

PC143

390U/2.5V_6X5.8ESR10

PR167
10K_4

PC112

0.1U/10VC_4

Ra=(Vout-0.75)/0.75*Rb
Rb value from 100K to 300K ohm

+1.8VSUS_J+1.8VSUS_J+1.8VSUS_J+1.8VSUS_J+1.8VSUS_J+1.8VSUS_J+1.8VSUS_J+1.8VSUS_J+1.8VSUS_J+1.8VSUS_J+1.8VSUS_J+1.8VSUS_J

0.1U/10VC_4
PC153

Ra

PR21

VOUT

SET

147/F_4

Rb

PR20
100K/F_4

Fix 1.8V Output

51116_V5FILT

+3VPCU

PC113

1U/10VC_4

*100P/50VA_4

PR36

*0_4

12

PC10

Close to CPU

SI power

PU9

1

SHDN

3

VIN

2

GND

G913C

PR22
0_4

4

R1

SET

5

R2

1 1

10U/25VD_1206

PC47

PL6

1.5uH/10A_10

PR30
*0_4

PR15
*0_4

+2.5V

0.25A

S0~S1

+2.5V

PR166
100K/F_4

Vout=1.25(1+R1/R2)

PR165
100K/F_4

PC48

0.1U/50VB_6

+

PC111

4.7U/6.3VC_6

2200P/50VB_4

PC34

AOL1426

VDDIO_FB_H 3

Differential Pair

VDDIO_FB_L 3

PC33

52

PQ39

1

52

1

1.8V_OND43

For EMI-SI

+5VPCU

PC25

2.2U/6.3VC_6

PC39

4

3

4

PQ48
AOL1412

3

0.1U/50VB_6

51116_V5FILT

PR71

PR41
0_4

+0.9VSMVREF4,6

1 2

0_6

1.8V_DH

1.8V_LX1.8V_LX

1.8_DL1.8_DL1.8_DL1.8_DL1.8_DL1.8_DL1.8_DL1.8_DL1.8_DL1.8_DL1.8_DL1.8_DL

1.8V_OUT

COMP

22

21

20

19

8
9

6
7

12

PR39

PU2

VBST

DRVH

LL

DRVL

VDDQSNS
VDDQSET

COMP
NC

NC

PR43
0_6

10_6

15

V5IN

TI51116

VTTGND

VTTSNS

VTTREF

CS_GND

5

17

EC:1108 SI

PC35

0.033U/25VB_6

14

V5FILT

PGOOD

VLDOIN

MODE

PGND

GND

3

CS

S5
S3

VTT

PAD

51116_V5FILT

PC16
1U/10VC_4

1 2

PR48

CSBST

16

8.45K/F_6

13

S5ON

11

S3ON

10

+1.8VSUS

23

1
4

24

VTTSNS

2
18
25

MODE +1.8VSUS

12

PC40
1U/10VC_4

PC41
10U/4VD_8

+3VSUS

I_lim(Valley)=10uA*R_ILIM/RDS_ON

For OCP set.

PR31
10K_4

HWPG 20,23,35,38,39,42

PR18
0_4
PR19
0_4

PC14

+0.9VSMVTT 4,7

PR47

0_4

PC38
10U/4VD_8

PR56
0_4

PR57
*0_4

*100P/50VA_4

PC7

+0.9VSMVTT

*100P/50VA_4

CPU_VTT_SENSE 4

Mode Discharge Mode
V5IN No discharge

SUSON 35,43

+0.9VSMVT

2.25A

S0~S3

VDDQ Tracking discharge
Gnd Non-tracking discharge

V_TRIP(mV)=R_TRIP(Kohm)*10(uA)
I_OCP=V_trip/Rds_on+I_Ripple/2

VDDQSET VDDQ(V) VTTREF and Vtt Note
GND 2.5 V_ vddqsns/2 DDR
V5IN 1.8 V _vddqsns/2 DDR2
FB adjustable V_VDDQSNS/2 1.5V<VDDQ<3V

PC197

0.1U/10VC_4

+1.8VSUS

578

3 6

241

PC196

0.1U/10VC_4

PQ27
SI4856

+1.8V

For EMI-SI

+1.8V

10.4A

S0~S1

+1.8V 3,5,8,10,11,12,15,16,18,19,20,21,22,26,43

41

Discrete:SI4856

UMA:SI4800

A

B

C

D

NB5/RD5

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

1.8VSUS/DDR_VTER/+1.8V/2.5V

Date: Sheet

E

41 45Tuesday, February 19, 2008

of

1A

5

4

3

2

1

ATI M82-SE

PR116
0_4

V-CORE

1.0V

1.0V

0.9V

PR118

15K_4

3

2

1

PR98
0_4

8118AGND

PR65
665K/F_6

PQ10

2N7002E-G

VCORE_PG43

HWPG20,23,35,38,39,41

*100P/50VA_4

PC75

2

PR70
665K/F_6

3

1

PR119
10K_4

PQ8
2N7002E-G

PD10

SW1010CPT

1000P/50VB_4

PC57

PR117
10K_4

PR74
162K/F_6

PR75
110K/F_6

+5VPCU

8118AGND

0.1U/50VB_6
PC54

PR105
1K_4

PC65

0.01U/50VB_4
PR125

0_4

PR79

63.4K/F_4

PR78
130K/F_6

PC53

5

BST

VDDP

HDR

LDR

CSP

CSN

GNDP

6

8118AGND

LX

PR76

*short

+5VPCU

1 2

8
9

10

7

11

12

PC83
1U/10VC_4

PR91
20_6

PC55

1U/10VC_4

1 2

8118VDDA

8118AGND

8118VIN 8118BST

8118PG

8118EN8118EN

8118VSET8118VSET8118VSET8118VSET8118VSET8118VSET8118VSET8118VSET8118VSET8118VSET8118VSET8118VSET8118VSET8118VSET8118VSET8118VSET8118VSET8118VSET8118VSET8118VSET
+8118VREF

8118TSET

1000P/50VB_4

PC56

16

2

VIN

VDDA

4

PGD

3

ON/SKIP

VSET
VREF

TSET

17

8118AGND

GNDA1

PU6

OZ8119

OCT

1

0.022U/25VB_6

13
14

15

8118HDR

8118LX

8118LDR

8118CSP

8118CSN

0.1U/50VB_6

1000P/50VB_4

PC49

PR121
0_6

PC72

22P/50VA_4

PC63

+VIN

CH501H-40PT L-F

PD9

21

578

3 6

241

578

3 6

241

PQ52
SI4800BDY

PQ55
FDS6690AS

2200P/50VB_4

PC154

PR206
*2.2_6

*100P/50VA_6

PC151

0.1U/50VB_6
PC155

+1.8VSUS

10U/25VD_1206

*10U/25VD_1206

PC89

PC88

DCR=8.1m-ohm (max)

PL11

1.5UH/16A_PCMC104T-1R5MN
PR103

191K/F_4

PR104

PC60

11K/F_4

33N/10VB_4

PWRCNTL1

H

0

D D

M

0

M

1

L

1

C C

GFX_CORE_CNTRL018

PWRCNTL0

0 1.1V

1

0

1

MAINON20,27,35,39,43,44

GFX_CORE_CNTRL118

PR99

51.1/F_4

PR89
*49.9K/F_4

+VGA_CORE5,18,20
+1.2V_S5 15
+1.5V 33,36

+VGA_CORE

9.4A

S0~S1

+VGA_CORE

+VGA_CORE 5,18,20

12

+

PC172

0.1U/10VC_4

PC166
390U/2.5V_ESR10_6X5.8

SI-1 Modified -ECAP6_3X6_1-7_2-QT8

42

+1.5V

PC114

B B

PR220

S5_ON35,43

A A

10K_4

+3VPCU +1.2V_S5

PC188
10U/4VD_8

S5EN_G966 5913EN

PC186
*0.1U/10VC_4

PC187

0.1U/10VC_4

+5VPCU

PU12

1

POK

2

VEN

3

VIN
VPP4NC

PC185

0.1U/10VC_4

8

GND

7

ADJ

6

VO

5

9

G966

9

966ADJ

R2

PR219
100K/F_4

R1

PR218

51.1K/F_6

PC183
10U/4VD_8

Vo=0.8(R1+R2)/R2

R2<120Kohm

+1.2V_S5

0.5A

S0~S5

+1.2V_S5 15

PC184

0.1U/10VC_4

Sequence control ??

PR174
10K_4

+5V

10U/4VD_8

PC115

0.1U/10VC_4

PC116

0.1U/10VC_4

+5V

PU10

5

VIN

9

VIN1

8

EN

6

VCNTL

PC117

0.1U/10VC_4

PR172
47K/F_4

APL5913

POK

GND

VOUT

VOUT

FB

2

5913FB

R2

7

1

3

4

PR176

R1

41.2K/F_6
PC118

1 2

56P/50VA_6

Vo=0.8(1+R1/R2)

PC119

0.1U/10VC_4

2.0A

S0~S1

+1.5V

PC121
10U/4VD_8

+1.5V 33,36

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

5

4

3

2

NB5/RD5

VGA PWR OZ8118/1.2V_S5/+1.5

Date: Sheet

1

42 45Tuesday, February 19, 2008

1A

of

1

2

3

4

5

SI-1 Modified - can remove +1.35V for AMD update

PR129
*22_8

PQ12
*2N7002E-G

+12VALW

2

3

1

+12VALW

2

PR180
1M_4

PQ32
2N7002E-G

PR111
1M_4

3

1

12

LAN_ONLAN_ON

PQ13
2N7002E-G

PC122
*2200P/50VB_4

12

MAIND 38

PC70
*2200P/50VB_4

PR109

MAINON20,27,35,39,42,44

A A

PC67

*10U/4VD_8

*10K_4

+1.8VSUS +1.35V

PC58
*0.1U/10VC_4

*0.1U/10VC_4

+5VPCU

PC66

1
2
3

PC51
*0.1U/10VC_4

PU5

POK
VEN
VIN
VPP4NC

9

9

GND

ADJ

VO

*G966

8
7
6
5

PR113
*100K/F_4

R1

PR106
*69.8K/F_6

R2

Vo=0.8(R1+R2)/R2

R2<120Kohm

+3VSUS +5VSUS

+VIN

B B

SUSON35,41

2

PQ4
PDTC144EU

PR90
1M_4

SUSON_G

PR87
1M_4

1 3

PR188
*22_8

3

PQ3

*2N7002E-G

2

1

PR88
*22_8

3

PQ7
*2N7002E-G

2

1

PC68
*10U/4VD_8

+12VALW

2

0.5A

S0-S1

PR114
1M_4

3

1

PC73
*0.1U/10VC_4

SUSD

PQ9
2N7002E-G

12

PC74

*2200P/50VB_4

SUSD 38

+5V

+VIN

PR179
1M_4

MAINON_GMAINON_GMAINON_G

MAINON20,27,35,39,42,44

2

PQ30
PDTC144EU

PR181
1M_4

1 3

LAN_POWER35

PR178
*22_8

PQ31

3

*2N7002E-G

2

1

PDTC144EU

PQ14

+3V

PR182
*22_8

3

PQ33
*2N7002E-G

2

1

+VIN

2

1 3

PR124
1M_4

PR123
1M_4

2

+1.1V

PR175
*22_8

3

PQ29
*2N7002E-G

1

+3VLANVCC

3

2

1

LAN_POWER_G

43

LAN_ON 38

For Discrete Only

C C

+3VS5

+VIN

PR186
1M_4

2

PR187

S5_ON35,42

D D

1

2

PQ38

PDTC144EU

1M_4

1 3

S5_ONG

PR185
*22_8

PQ37

3

*2N7002E-G

1

+12VALW

2

+1.8V

3

1

PR184
1M_4

S5_ONDS5_OND

PQ36
2N7002E-G

12

PC123
*2200P/50VB_4

S5_OND 38

+VIN

PR171

PR170

MAINON20,27,35,39,42,44

VCORE_PG42

*0_4

PR169
0_4

2

PQ25

PDTC144EU

1M_4

2

PR168
1M_4

1 3

3

1

PR173
*22_8

PQ26

*2N7002E-G

2

+12VALW

3

1

PR177
1M_4

PQ28
2N7002E-G

12

PC120
*2200P/50VB_4

1.8V_OND 41

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

2

3

4

NB5/RD5

DISCHARGE

Date: Sheet

5

43 45Tuesday, February 19, 2008

1A

of

5

PD8

+VA

PC156

0.1U/50VB_6

2 1

*UDZS5.6BTE-17

3

PQ21

1

*2N7002E-G

PR131
75K/F_4

PR132

12.4K/F_4

PC81

*1U/25VC_8

S10P40CPT/40V/10A

2
1

2
1

S10P40CPT/40V/10A

PR12
0_6

J1-1JACK-LED

PD4

PC200 1000P/50V_4

SI-2 modified -- EMI

+VAD2

PR136
*200K_4

2

PR141
*200K_4

PR128

100K/F_4

Setting the Vin min to 15.88V
For EN = 1.06V

PR120

7.15K/F_6

+6251_VDDACOK

13

PQ15
PDTA124EU

2

ACOK#

PR137

3

*100_4

2

PQ17
*2N7002E-G

1

PD20

+VH28

ACOK_IN

6251_ACIN

3

1

MAINON20,27,35,39,42,43

PQ19
*2N7002E-G

BATDIS_G

TOP DC_JACK
65W/90W

AD_ID 35

CN3

D D

C C

+DOCK_VA +VA

B B

A A

+VH28

ACOK#

+VAD2

PQ16

*2N7002E-G

9
10

DC-IN CONN

2

PD15

*UDZS5.6BTE-17

SW1010CPT

2 1

2 1

PD12

CH501H-40PT L-F

AD_AIR35

6251_ACIN

6534

2
1

PR135

*0_4

PD13

3

1

21

ACIN35

3

1

+DOCK_VA37

PL3

HI0805R800R_5A/08

J1-1

HI0805R800R_5A/08

PC124

0.1U/50VB_6

PR11
10K_6

PQ18
2N7002E-G

PR140

*200K_4

2

PQ20

*2SB1197K

PR146

*680K/F_6

PC82

0.1U/10VC_4

PR133
10K_4

PD14

2

2 1

*CH501H-40PT L-F

PL4

13

2

+VAD2

PR134
15K_4

PR127
*1M_4

5

3

3

PD11

SW1010CPT

+VAD

PR190
100_4

PD19

*SW1010CPT

3216

4

PQ45

IRFR3707ZCTRPBF

EC:11/05_SI

4 3

PR192
100K/F_4

3920_RST#5,35

SYS_SHDN#5,38

+VAD

PQ11
IMD2

5

Setting the Vin
min to 11.42V
For ACSET

1.26V

4

1

BATDIS_G

PC138

1U/25VC_8

PD6 SW1010CPT

PQ2

2N7002E-G

Close to AC soft start MOSFET

PR110 20_4

CSOP_1

CSON_1 CSON

PR115 20_4

PR126
10_6

PR122 100K/F_4

PR130

12.4K/F_4

ONLY for 3S battery pack

4

+PRWSRC

+6251_VDD

3

2

1

CSOP

PC69

0.047U/25VB_4

ACOK#

+DCIN+DCIN+DCIN+DCIN+DCIN+DCIN

PC80

1U/25VC_8

6251_ACIN

PC78

0.1U/10VC_4

PR112
0_4

PR59
*100K/F_4

1 2

PR201

470_4 PTC

1 2

6251_EN

6251_CELLS

21

22
23

24

1 2

+VAD +VAD

PC198

0.1U/50VB_6

EC:11/05_SI

PR61

RC7520WT-R020

CSIP_1

PR102
2_6

CSIP

PC61

0.1U/50VB_6

19

CSIP

CSOP

CSON
ACPRN

DCIN

2

ACSET

3

EN

6251_ICOMP

PC64

6800P/25VB_4

100P/50VA_4

PC62

ISL6251A

CELLS

ICOMP5VCOMP

4

*PDTC144EU

PC199

0.1U/50VB_6

CSIN

20

CSIN

6

6251_VCOMP1

PR108
10K_4

PC71

0.01U/50VB_4

1 2

PQ1

21

CSIN_1

PR107
20_4

ICM

7

6251_ICM

PC50

100P/50VA_4

PC77

2.2U/6.3VC_6

1 2

+6251_VDD

VREF = 5.075V

1

VDD

VRFE

8

+6251_VREF

VREF = 2.39V

PR97

100_4

ACOK_IN

1 3

EC:SI2
For VAD noise

PR67

4.7_6

15

VDDP

16

BOOT

17

UGATE

18

PHASE

14

LGATE

13

PGND

12

GND

11

VADJ

10

ACLIM

CHLIM

9

PU4

6251_CHLIM

PR77 100K_4

PR85
100K_4

PC59

3300P/25VB_4

2

3

+6251_VDD

+6251_VDDP

PC43

1 2

4.7U/6.3VC_6
PR86

6251_BOOT

1_6

6251_UGATE

6251_PHASE

6251_LGATE

EC:11/05_SI

6251_VADJ
6251_ACLIM

Charging Curret setting =
I chg = 165mV / Rsense * (Vchlim / 3.3V)

Input Current monitor
V icm = 19.9 * (Vcsip - Vcsin)

SYS_I 35

PR42

*0_4

PD5

*CH501H-40PT L-F

PC21
*10U/10VD_8

3

21

PD7

CH501H-40PT L-F

PC52

0.1U/50VB_6

+6251_VREF

PR72

7.5K/F_4

PR68
10K/F_4

D/C# 35

*100K/F_4

1 2

*100K/F_4

1 2

CC-SET 35

+VIN

PC129

PC130

2200P/50VB_4

0.1U/50VB_6

578

PQ40

SI4800BDY

3 6

241

PR63

PR62

578

3 6

VADJ =
VERF >> 4.2V +5%
Float >> 4.2V
GND >> 4.2 -5%

PR191
*2.2_8

241

PQ49

SI4800BDY

V ACLIM = VREF *
(Rhi // 152K) / (Rhi // 152K + Rlow// 152K)
Input curretn = 2.9A (71.5K , 10K)
(0.05/Vref * Vaclim + 0.05 ) / Rsense

ADP TYPE PR72 Value P/N

65W

90W

EC:11/05_SI

+VAD2

PR227
22_6

12

PC190

.1U/50V_6

BATDIS_G

PC31

10U/25VD_1206

PL5

10UH/4.4A_10

PC125

*100P/50VA_4

102K/F

7.5K/F

PU13

1

VIN

2

GND

4

NC

3

CN

PC193

0.01U/50V_6

PC24

12

FDS6679AZ

1
2
3

*10U/25VD_1206

P2805

CP

7

PQ6

2

2

CSOP_1

CSON_1

Vout

PG

D_CAP

2

8
7
6
54

PR199
RL3720WT-R020

2P11P

CS41022FB19

CS27502FB11

8

6251_ACIN

6

5

12

PC192

1U/50V_6

+VH28

10U/25VD/1206

PC148

12

.1U/50V_6

+BATCHG

+BATCHG

PC191

1

PL1

HI0805R800R-00/5A_8

PL2

HI0805R800R-00/5A_8

PR203

100K/F_4

MBATV

PR202

MBDATA34,35

MBCLK34,35

14K/F_4

PR35
330_4

PD3

UDZS5.6BTE-17

+VAD2

PR144

PC91

*0.1U/50VB_6

4

PU7
*TL331

PC92
*220P/50VB_4

NB5/RD5

2 1

PR145
*10K_4

5

4

321 6

*47K_4

+VAD2

52

3

+

1

-

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

CHARGER ( ISL6251)

Date: Sheet

PC145

0.01U/50VB_4

10U/25VD/1206

PC147

PR139
*22K_4

PR138
*47K_4

SMD
SMC

+3VPCU

PR34
330_4

PD2

UDZS5.6BTE-17

2 1

PC99

3

*0.01U/50VB_4

PQ22
*IMZ2

PR142
*100K_4

PR143
*10K_4

1

+BATT

PR14
10K/F_4

PC12

0.01U/50VB_4

+VAD2

PD16

1

2

CN23

7

7

6

6

5

5

4

4

3

BP07061-BA015

*CHN217PT

+VH28

PC95

*0.1U/50VB_6

44 45Tuesday, February 19, 2008

44

8

8

10

10

9

9

2

2
113

11

11

12

12

TEMP_MBAT 35

of

1A

5

4

3

2

1

CPU Power 1

CPU Power 2

EC Pin98

SUSON

+1.8VSUS

D D

HWPG

+VCORE0

VRM_PWRGD

EC Pin99
EC Pin34

VDDA_EN

MAINON

+VCORE1

+0.9VSMVTT

+CPUVDDNB

+2.5V

+1.2V

EC Pin101

C C

S5_ON

Delay

S5_OND

+3VS5

+1.1V

EC Pin101

HWPG

HWPG

VCORE_PG

S5_ON

+1.2VS5

+5VSUS

EC Pin99

+VGACORE

HWPG

MAINON

EC Pin98

SUSON

B B

Delay

SUSD

+3VSUS

Option

VCORE_PG

Delay

1.8V_OND

+1.8V

+5V

+5V

+1.5V
EC Pin99

MAINON

A A

Delay

123 4

S5_ON SUSON MAINON HWPG
S5_OND MAINDSUSD

RSMRST# VRM_PWRGD

MAIND

+3V

VCORE_PG

EC Pin76

ECPWROK

Delay 600ms

SB_PWRGD_IN NB_PWRGD_IN

3.3V 1.8V

PROJECT : QT8

Quanta Computer Inc.

Size Document Number Rev
Custom

5

4

3

2

NB5/RD5

Power control

Date: Sheet

1

45 45Tuesday, February 19, 2008

1A

of