QUANTA QLC Schematics

1

www.schematic-x.blogspot.com

2

3

4

5

6

7

8

PCB 8L STACK UP

LAYER 1 : TOP
LAYER 2 : SGND
LAYER 3 : IN1(High)

A A

LAYER 4 : IN2(Low)
LAYER 5 : SVCC
LAYER 6 : IN3(High)
LAYER 7 : SGND
LAYER 8 : BOT

B B

DDR III SMDDR_VTERM and
GPU+1.5V/+1.0V(RT8207G)

C C

D D

BATTERY SELECTOR

SYSTEM CHARGER(P2806)

SYSTEM POWER RT8206B

+1.05V_VTT and GPU
+1.8V/+3V(VT358)

VCCP +1.05V/+1.8V(RT8204)

VGACORE/VDDCI(RT8208/RT9018A)

CPU CORE (ADP3212)

1

PAGE 36

PAGE 38

PAGE 37

PAGE 31

PAGE 34

PAGE 32

PAGE 35

PAGE 33

QLC 14" (Huron River) BLOCK DIAGRAM

VRAM DDR3*4
(512MB) (1GB)

PAGE 18

nVidia
N12P-GV

PAGE 14-17

8,9

USB2.0 Port

PAGE 26

X1

LAN

Athous PCIE-LAN

AR8151
GigaLAN

PAGE 24

25MHz

RJ45

PAGE 24

5

27MHz

CRT

iGPU HDMI

LVDS

LCD CONN for
dual channel
(14")

Dual Channel LVDS

CRT

HDMI CON
(1920*1200)

4

Webcam w/ Mic

PAGE 20

X1

half size
mini-card

Wireless LAN

PAGE 25

6

1

PAGE 20

PAGE 19

PAGE 19

3

Card Reader

Realtek
RTS5138

PAGE 21

5-in-1
flash media
slot(SD/MS/MMC/
XD/MSP)

PAGE 21

DDR3-SODIMM1

PAGE 12

DDR3-SODIMM2

PAGE 13

SATA - 1st HDD

SATA - CD-ROM

SPI ROM
System BIOS

PAGE 25

PAGE 25

PAGE 7

Keyboard

Touch Pad

GMT G9931P1U

SYSTEM FAN

2

PAGE 26

PAGE 26

DDR3 800,1066,1333 MT/s

DDR3 800,1066,1333 MT/s

FDI*8
DMI*4

SATA0 300MB/s

SATA0 300MB/s

ITE

IT8518/BX

3

LPC

PAGE 27

Intel Sandy

CPU 35Watt

Dual Core

( rPGA 989 )

PAGE 2-5

BCLK133M
DMI100M
DP120M

PCH 3.5Watt

Platform
Controller
Hub

PAGE 6-11

Azalia

Audio

ALC269Q-VB5-GR

Audio Jack
(Headphone/MIC)

PAGE 23

4

PCI-Express
Gen2 X 16

32.768KHz

PCI-E 100M

Realtek

PAGE 22

Jack to
Speaker

PAGE 22

100M PCIE

USB2.0 48M

11

USB2.0 Port

PAGE 26

PROJECT : QLC

PROJECT : QLC

PROJECT : QLC

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

NB5

NB5

NB5

Date: Sheet of

Date: Sheet of

Date: Sheet of

7

BLOCK DIAGRAM

BLOCK DIAGRAM

BLOCK DIAGRAM

?

?

1 36Friday, November 26, 2010

1 36Friday, November 26, 2010

1 36Friday, November 26, 2010

8

?

01

http://www.vinafix.vn

5

4

3

2

1

Sandy Bridge Processor (DMI,PEG,FDI)

U17A

U17A

DMI_TXN0[6]
DMI_TXN1[6]
DMI_TXN2[6]
DMI_TXN3[6]

D D

C C

B B

DMI_TXP0[6]
DMI_TXP1[6]
DMI_TXP2[6]
DMI_TXP3[6]

DMI_RXN0[6]
DMI_RXN1[6]
DMI_RXN2[6]
DMI_RXN3[6]

DMI_RXP0[6]
DMI_RXP1[6]
DMI_RXP2[6]
DMI_RXP3[6]

FDI_TXN0[6]
FDI_TXN1[6]
FDI_TXN2[6]
FDI_TXN3[6]
FDI_TXN4[6]
FDI_TXN5[6]
FDI_TXN6[6]
FDI_TXN7[6]

FDI_TXP0[6]
FDI_TXP1[6]
FDI_TXP2[6]
FDI_TXP3[6]
FDI_TXP4[6]
FDI_TXP5[6]
FDI_TXP6[6]
FDI_TXP7[6]

FDI_FSYNC0[6]
FDI_FSYNC1[6]

FDI_INT[6]

FDI_LSYNC0[6]
FDI_LSYNC1[6]

eDP_COMP
INT_eDP_HPD_Q

eDP_COMP connect to PIN A18 W:4mils/S:15mils/L: 500mils.
eDP_COMP connect to PIN A17 W:12mils/S:15mils/L: 500mils.

B27

DMI_RX#[0]

B25

DMI_RX#[1]

A25

DMI_RX#[2]

B24

DMI_RX#[3]

B28

DMI_RX[0]

B26

DMI_RX[1]

A24

DMI_RX[2]

B23

DMI_RX[3]

G21

DMI_TX#[0]

E22

DMI_TX#[1]

F21

DMI_TX#[2]

D21

DMI_TX#[3]

G22

DMI_TX[0]

D22

DMI_TX[1]

F20

DMI_TX[2]

C21

DMI_TX[3]

A21

FDI0_TX#[0]

H19

FDI0_TX#[1]

E19

FDI0_TX#[2]

F18

FDI0_TX#[3]

B21

FDI1_TX#[0]

C20

FDI1_TX#[1]

D18

FDI1_TX#[2]

E17

FDI1_TX#[3]

A22

FDI0_TX[0]

G19

FDI0_TX[1]

E20

FDI0_TX[2]

G18

FDI0_TX[3]

B20

FDI1_TX[0]

C19

FDI1_TX[1]

D19

FDI1_TX[2]

F17

FDI1_TX[3]

J18

FDI0_FSYNC

J17

FDI1_FSYNC

H20

FDI_INT

J19

FDI0_LSYNC

H17

FDI1_LSYNC

A18

eDP_COMPIO

A17

eDP_ICOMPO

B16

eDP_HPD

C15

eDP_AUX

D15

eDP_AUX#

C17

eDP_TX[0]

F16

eDP_TX[1]

C16

eDP_TX[2]

G15

eDP_TX[3]

C18

eDP_TX#[0]

E16

eDP_TX#[1]

D16

eDP_TX#[2]

F15

eDP_TX#[3]

Sandy Bridge_rPGA_Rev0p61

Sandy Bridge_rPGA_Rev0p61

rpga989-47989-socket

rpga989-47989-socket

DGG^9000014

DGG^9000014

IC SOCKET RPGA 989P(P1.0,M/H3.0)

IC SOCKET RPGA 989P(P1.0,M/H3.0)

DMI

DMI

Intel(R) FDI

Intel(R) FDI

eDP

eDP

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]

PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]

PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]

PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]

PCI EXPRESS* - GRAPHICS

PCI EXPRESS* - GRAPHICS

PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

DV2: Change net name PM_DRAM_PWRGD_C

J22
J21
H22

K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32

J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32

M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25

M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25

PEG_COMP

PEG_RX#0
PEG_RX#1
PEG_RX#2
PEG_RX#3
PEG_RX#4
PEG_RX#5
PEG_RX#6
PEG_RX#7
PEG_RX#8
PEG_RX#9
PEG_RX#10
PEG_RX#11
PEG_RX#12
PEG_RX#13
PEG_RX#14
PEG_RX#15

PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
PEG_RX6
PEG_RX7
PEG_RX8
PEG_RX9
PEG_RX10
PEG_RX11
PEG_RX12
PEG_RX13
PEG_RX14
PEG_RX15

C_PEG_TX#0
C_PEG_TX#1
C_PEG_TX#2
C_PEG_TX#3
C_PEG_TX#4
C_PEG_TX#5
C_PEG_TX#6
C_PEG_TX#7
C_PEG_TX#8
C_PEG_TX#9
C_PEG_TX#10
C_PEG_TX#11
C_PEG_TX#12
C_PEG_TX#13
C_PEG_TX#14
C_PEG_TX#15

C_PEG_TX0
C_PEG_TX1
C_PEG_TX2
C_PEG_TX3
C_PEG_TX4
C_PEG_TX5
C_PEG_TX6
C_PEG_TX7
C_PEG_TX8
C_PEG_TX9
C_PEG_TX10
C_PEG_TX11
C_PEG_TX12
C_PEG_TX13
C_PEG_TX14
C_PEG_TX15

PEG_COMP connect to PIN H22&J22 W:4mils/S:15mils/L: 500mils.
PEG_COMP connect to PIN J21 W:12mils/S:15mils/L: 500mils.

SNB_IVB# N.A at SNB EDS #27637 0.7v1

EC_PECI[27]

PEG_RX[0..15] [14]

PV: Reserve for future

H_PROCHOT#[27,35]

C543 *0.1U/10V_4C543 *0.1U/10V_4

PM_THRMTRIP#[9,27]

PV: Change to short pad

PV: Change to short pad

PM_SYNC[6]

H_PWRGOOD[9]

+1.05V_VTT

CPU RESET#

PLTRST#[8,14,24,25,27]

2
1

SM_DRAMPWROK Processor Input. DDR3 DRAM RESET

PV: Unstuff

R136 *75_4R136 *75_4

U3

U3

GND3OUT
IN

*74LVC1G07GW

*74LVC1G07GW

R469 1.5K/F_4R469 1.5K/F_4

+3VS5 +3VS5

CPU_PLTRST# CPU_PLTRST#_RCPU_PLTRST#_R

4

+3VS5

VCC5NC

R142

R142
*10K_4

*10K_4

PM_DRAM_PWRGD_PU

R145

R145
*0_4

*0_4

PM_DRAM_PWRGD [6]

R101 0_4R101 0_4

DV2: Change to 0 ohm

Sandy Bridge Processor (CLK,MISC,JTAG)

U17B

U17B

R466

R466
750/F_4

750/F_4

C254

C254
*0.1U/10V_4

*0.1U/10V_4

R139

R139

3

39_4

39_4

2

Q18

Q18
2N7002

2N7002

1

C26

SNB_IVB#

AN34

SKTOCC#

AL33

CATERR#

AN33

PECI

AL32

PROCHOT#

AN32

THERMTRIP#

AM34

PM_SYNC

AP33

UNCOREPWRGOOD

V8

SM_DRAMPW ROK

AR33

RESET#

Sandy Bridge_rPGA_Rev0p61

Sandy Bridge_rPGA_Rev0p61

rpga989-47989-socket

rpga989-47989-socket

DGG^9000014

DGG^9000014

IC SOCKET RPGA 989P(P1.0,M/H3.0)

IC SOCKET RPGA 989P(P1.0,M/H3.0)

+1.5V_CPU

R141

R141
200/F_4

200/F_4
R104 130/F_4R104 130/F_4

MAIN_ONG [4,36]

MISCTHERMALPWR MANAGEMENT

MISCTHERMALPWR MANAGEMENT

PM_DRAM_PWRGD_R

CLOCKS

CLOCKS

DDR3

DDR3

JTAG & BPM

JTAG & BPM

H_SNB_IVB#[7]

TP3TP3

Placement close to EC.

C232

C232

*0.1U/10V_4

*0.1U/10V_4

TP5TP5

R465 43_4R465 43_4

R108 56.2/F_4R108 56.2/F_4

R110 *0_4/SR110 *0_4/S

R107 *0_4/SR107 *0_4/S

R128 *0_4/SR128 *0_4/S

R467 10K_4R467 10K_4

R468 *43_4R468 *43_4

PV: Unstuff

DV2: un-stuff

U5

U5

1

VCC5NC

2

IN
GND3OUT

*74LVC1G07GW

*74LVC1G07GW

PM_DRAM_PWRGD_C

R96

R96
*3K/F_4

*3K/F_4

SKTOCC#

TP_CATERR#

H_PECI

H_PROCHOT#_R

PM_THRMTRIP#_R

PM_SYNC_R

H_PWRGOOD_R

PM_DRAM_PWRGD_R

PV: Unstuff

PM_DRAM_PWRGD_C

4

A28

BCLK

A27

BCLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

SM_DRAMRST#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

MISC

MISC

DRAMRST_CNTRL_PCH[8]

A16
A15

R8

AK1
A5
A4

SM_RCOMP[0] W:20mils/S:20mils/L: 500mils,
SM_RCOMP[1] W:20mils/S:20mils/L: 500mils,
SM_RCOMP[2] W:15mils/S:20mils/L: 500mils,

AP29

PRDY#

AP27

PREQ#

AR26

TCK

AR27

TMS

AP30

TRST#

AR28

TDI

AP26

TDO

AL35

DBR#

AT28

BPM#[0]

AR29

BPM#[1]

AR30

BPM#[2]

AT30

BPM#[3]

AP32

BPM#[4]

AR31

BPM#[5]

AT31

BPM#[6]

AR32

BPM#[7]

+1.5VSUS

DDR3_DRAMRST#[12,13]

PV: Change to short pad

CLK_CPU_BCLKP [8]PEG_RX#[0..15] [14]
CLK_CPU_BCLKN [8]

CLK_DPLL_SSCLKP_R
CLK_DPLL_SSCLKN_R

CPU_DRAMRST#

SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2

XDP_PRDY#
XDP_PREQ#

XDP_TCLK
XDP_TMS
XDP_TRST#

XDP_TDI_R
XDP_TDO

XDP_BPM0
XDP_BPM1
XDP_BPM2
XDP_BPM3
XDP_BPM4
XDP_BPM5
XDP_BPM6
XDP_BPM7

R94 140/F_4R94 140/F_4
R371 26.1/F_4R371 26.1/F_4
R369 200/F_4R369 200/F_4

R137 *1K_4R137 *1K_4

R25 1K_4R25 1K_4

R23 1K_4R23 1K_4

CPU_DRAMRST#_R

R21*0_4/S R21*0_4/S

TP40TP40
TP49TP49

TP45TP45
TP38TP38
TP48TP48

TP46TP46
TP50TP50

XDP_DBRST# [6]

TP37TP37
TP47TP47
TP39TP39
TP43TP43
TP36TP36
TP42TP42
TP44TP44
TP41TP41

R24 *0_4R24 *0_4

3

C23

C23

.047U/25V_4

.047U/25V_4

CPU XDP

+3V

Q6

2

2N7002Q62N7002

CPU_DRAMRST#

1

R27

R27

4.99K/F_4

4.99K/F_4

+1.5V_CPU[4,10,25]
+1.05V_VTT[4,10,27,32,34,35]

+1.5VSUS[4,10,12,13,30,31]

02

+3V[6,7,8,9,10,12,13,14,16,19,20,21,22,23,24,25,26,27,31,32,35,36]

+3VS5[6,7,8,9,10,14,24,27,29,31,33,34,35,36]

FDI disable
(DIS only stuff)

FDI_INT

R475 *0_4R475 *0_4

A A

R478 *0_4R478 *0_4

R483 *1K_4R483 *1K_4
R474 *1K_4R474 *1K_4

FDI_FSYNC can gang all these 4
signals together and tie them
with only one 1K resistor to GND
(DG V0.5 Ch2.2.9).

FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1

PEG x16 disable (UMA only remove)

PEG_TX[0..15][14] PEG_TX#[0..15][14]

C_PEG_TX0
C_PEG_TX1
C_PEG_TX2
C_PEG_TX3
C_PEG_TX4
C_PEG_TX5
C_PEG_TX6
C_PEG_TX7
C_PEG_TX8
C_PEG_TX9
C_PEG_TX10
C_PEG_TX11
C_PEG_TX12
C_PEG_TX13
C_PEG_TX14
C_PEG_TX15

C578 0.1U/10V_4C578 0.1U/10V_4
C571 0.1U/10V_4C571 0.1U/10V_4
C569 0.1U/10V_4C569 0.1U/10V_4
C566 0.1U/10V_4C566 0.1U/10V_4
C565 0.1U/10V_4C565 0.1U/10V_4
C562 0.1U/10V_4C562 0.1U/10V_4
C561 0.1U/10V_4C561 0.1U/10V_4
C558 0.1U/10V_4C558 0.1U/10V_4
C556 0.1U/10V_4C556 0.1U/10V_4
C551 0.1U/10V_4C551 0.1U/10V_4
C548 0.1U/10V_4C548 0.1U/10V_4
C545 0.1U/10V_4C545 0.1U/10V_4
C546 0.1U/10V_4C546 0.1U/10V_4
C538 0.1U/10V_4C538 0.1U/10V_4
C536 0.1U/10V_4C536 0.1U/10V_4
C532 0.1U/10V_4C532 0.1U/10V_4

0.22uF AC coupling Caps for PCIE GEN1/2/3

5

PEG_TX0
PEG_TX1
PEG_TX2
PEG_TX3
PEG_TX4
PEG_TX5
PEG_TX6
PEG_TX7
PEG_TX8
PEG_TX9
PEG_TX10
PEG_TX11
PEG_TX12
PEG_TX13
PEG_TX14
PEG_TX15

C_PEG_TX#0
C_PEG_TX#1
C_PEG_TX#2
C_PEG_TX#3
C_PEG_TX#4
C_PEG_TX#5
C_PEG_TX#6
C_PEG_TX#7
C_PEG_TX#8
C_PEG_TX#9
C_PEG_TX#10
C_PEG_TX#11
C_PEG_TX#12
C_PEG_TX#13
C_PEG_TX#14
C_PEG_TX#15

C582 0.1U/10V_4C582 0.1U/10V_4
C575 0.1U/10V_4C575 0.1U/10V_4
C573 0.1U/10V_4C573 0.1U/10V_4
C568 0.1U/10V_4C568 0.1U/10V_4
C567 0.1U/10V_4C567 0.1U/10V_4R480 *0_4R480 *0_4
C564 0.1U/10V_4C564 0.1U/10V_4
C563 0.1U/10V_4C563 0.1U/10V_4
C560 0.1U/10V_4C560 0.1U/10V_4
C559 0.1U/10V_4C559 0.1U/10V_4
C555 0.1U/10V_4C555 0.1U/10V_4
C552 0.1U/10V_4C552 0.1U/10V_4
C547 0.1U/10V_4C547 0.1U/10V_4
C542 0.1U/10V_4C542 0.1U/10V_4
C540 0.1U/10V_4C540 0.1U/10V_4
C539 0.1U/10V_4C539 0.1U/10V_4
C535 0.1U/10V_4C535 0.1U/10V_4

PEG_TX#0
PEG_TX#1
PEG_TX#2
PEG_TX#3
PEG_TX#4
PEG_TX#5
PEG_TX#6
PEG_TX#7
PEG_TX#8
PEG_TX#9
PEG_TX#10
PEG_TX#11
PEG_TX#12
PEG_TX#13
PEG_TX#14
PEG_TX#15

0.22uF AC coupling Caps for PCIE GEN1/2/3

4

Embedded Display PLL Clock

Ra

RP6

CLK_DPLL_SSCLKP_R
CLK_DPLL_SSCLKN_R

CLK_DPLL_SSCLKP_R
CLK_DPLL_SSCLKN_R

SG/UMA

RP6

4

3

2

1

0_4P2R_4

0_4P2R_4

Rb

R373 *0_4R373 *0_4

Rc

R372 *0_4R372 *0_4

Ra Rb Rc
NCDIS

Stuff Stuff

Stuff

NC NC

3

CLK_DPLL_SSCLKP [8]
CLK_DPLL_SSCLKN [8]

DP & PEG Compensation

+1.05V_VTT

+1.05V_VTT

eDP_COMPIO and ICOMPO signals should be shorted
near balls and routed with typical impedance <25 mohms

+1.05V_VTT

PEG_ICOMPI and RCOMPO signals
should be routed within 500 mils typical
impedance = 43 mohms PEG_ICOMPO
signals should be routed within 500 mils
typical impedance = 14.5 mohms

R374 10K_4R374 10K_4

R375 24.9/F_4R375 24.9/F_4

R43 24.9/F_4R43 24.9/F_4

2

INT_eDP_HPD_Q

eDP_COMP

PEG_COMP

NB5

NB5

NB5

Processor pull-up (CPU)

H_PROCHOT#
XDP_TDO
XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TCLK
XDP_TRST#

PROJECT : QLC

PROJECT : QLC

PROJECT : QLC

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

SNB 1/4 (PCIE&DMI&FDI)

SNB 1/4 (PCIE&DMI&FDI)

SNB 1/4 (PCIE&DMI&FDI)

Date: Sheet of

Friday, November 26, 2010 2 36

Date: Sheet of

Friday, November 26, 2010 2 36

Date: Sheet of

Friday, November 26, 2010 2 36

R111 62_4R111 62_4
R479 51_4R479 51_4
R477 51_4R477 51_4
R472 51_4R472 51_4
R471 *51_4R471 *51_4
R476 51_4R476 51_4
R473 51_4R473 51_4

1

+1.05V_VTT

1A

1A

1A

http://www.vinafix.vn

5

4

3

2

1

Sandy Bridge Processor (DDR3)

U17C

U17C

D D

M_A_DQ[63:0][12]

C C

B B

M_A_BS#0[12]
M_A_BS#1[12]
M_A_BS#2[12]

M_A_CAS#[12]
M_A_RAS#[12]
M_A_WE#[12]

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

G10

N10

M10

AG6
AG5
AK6
AK5
AH5
AH6
AJ5
AJ6
AJ8
AK8
AJ9
AK9
AH8
AH9
AL9

AL8
AP11
AN11

AL12
AM12
AM11

AL11
AP12
AN12

AJ14
AH14

AL15
AK15

AL14
AK14

AJ15
AH15

AE10
AF10

AE8
AD9
AF9

F10

C5
D5
D3
D2
D6
C6
C2
C3

F8

G9

F9

F7
G8
G7

K4

K5

K1

J1

J5

J4

J2

K2
M8

N8

N7
M9

N9
M7

V6

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_CLK[0]

SA_CLK#[0]

SA_CKE[0]

SA_CLK[1]

SA_CLK#[1]

SA_CKE[1]

SA_CLK[2]

SA_CLK#[2]

SA_CKE[2]

SA_CLK[3]

SA_CLK#[3]

SA_CKE[3]

SA_CS#[0]
SA_CS#[1]
SA_CS#[2]
SA_CS#[3]

SA_ODT[0]
SA_ODT[1]
SA_ODT[2]
SA_ODT[3]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]

SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

AB6
AA6
V9

AA5
AB5
V10

AB4
AA4
W9

AB3
AA3
W10

AK3
AL3
AG1
AH1

AH3
AG3
AG2
AH2

C4
G6
J3
M6
AL6
AM8
AR12
AM15

D4
F6
K3
N6
AL5
AM9
AR11
AM14

AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7

M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7

M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_CLKP0 [12]
M_A_CLKN0 [12]
M_A_CKE0 [12]

M_A_CLKP1 [12]
M_A_CLKN1 [12]
M_A_CKE1 [12]

M_A_CS#0 [12]
M_A_CS#1 [12]

M_A_ODT0 [12]
M_A_ODT1 [12]

M_A_DQSN[7:0] [12]

M_A_DQSP[7:0] [12]

M_A_A[15:0] [12]

M_B_DQ[63:0][13]

M_B_BS#0[13]
M_B_BS#1[13]
M_B_BS#2[13]

M_B_CAS#[13]
M_B_RAS#[13]
M_B_WE#[13]

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

D10

K10

AM5
AM6
AR3

AP3
AN3
AN2
AN1

AP2

AP5
AN9

AT5

AT6

AP6
AN8
AR6
AR5
AR9

AJ11

AT8

AT9

AH11

AR8

AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15

AA9

AA7

AA10

AB8

AB9

J10

C9
A7

C8
A9
A8
D9
D8
G4
F4
F1
G1
G5
F5
F2
G2

J7
J8

K9

J9

K8
K7
M5
N4
N2
N1
M4
N5
M2
M1

R6

U17D

U17D

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

SB_BS[0]
SB_BS[1]
SB_BS[2]

SB_CAS#
SB_RAS#
SB_WE#

AE2

SB_CLK[0]

AD2

SB_CLK#[0]

R9

SB_CKE[0]

AE1

SB_CLK[1]

AD1

SB_CLK#[1]

R10

SB_CKE[1]

AB2

SB_CLK[2]

AA2

SB_CLK#[2]

T9

SB_CKE[2]

AA1

SB_CLK[3]

AB1

SB_CLK#[3]

T10

SB_CKE[3]

AD3

SB_CS#[0]

AE3

SB_CS#[1]

AD6

SB_CS#[2]

AE6

SB_CS#[3]

AE4

SB_ODT[0]

AD4

SB_ODT[1]

AD5

SB_ODT[2]

AE5

SB_ODT[3]

M_B_DQSN0

D7

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

F3
K6
N3
AN5
AP9
AK12
AP15

C7
G3
J6
M3
AN6
AP8
AK11
AP14

AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4

M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7

M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_B_CLKP0 [13]
M_B_CLKN0 [13]
M_B_CKE0 [13]

M_B_CLKP1 [13]
M_B_CLKN1 [13]
M_B_CKE1 [13]

M_B_CS#0 [13]
M_B_CS#1 [13]

M_B_ODT0 [13]
M_B_ODT1 [13]

M_B_DQSN[7:0] [13]

M_B_DQSP[7:0] [13]

M_B_A[15:0] [13]

03

Sandy Bridge_rPGA_Rev0p61

Sandy Bridge_rPGA_Rev0p61

rpga989-47989-socket

rpga989-47989-socket

DGG^9000014

DGG^9000014

IC SOCKET RPGA 989P(P1.0,M/H3.0)

A A

5

IC SOCKET RPGA 989P(P1.0,M/H3.0)

4

3

Sandy Bridge_rPGA_Rev0p61

Sandy Bridge_rPGA_Rev0p61

rpga989-47989-socket

rpga989-47989-socket

DGG^9000014

DGG^9000014

IC SOCKET RPGA 989P(P1.0,M/H3.0)

IC SOCKET RPGA 989P(P1.0,M/H3.0)

2

PROJECT : QLC

PROJECT : QLC

PROJECT : QLC

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

SNB 2/4 (DDR3 I/F)

SNB 2/4 (DDR3 I/F)

NB5

NB5

NB5

SNB 2/4 (DDR3 I/F)

Date: Sheet of

Friday, November 26, 2010 3 36

Date: Sheet of

Friday, November 26, 2010 3 36

Date: Sheet of

Friday, November 26, 2010 3 36

1

1A

1A

1A

http://www.vinafix.vn

5

4

3

2

1

Sandy Bridge Processor (POWER) Sandy Bridge Processor (GRAPHIC POWER)

04

U17G

U17F

SNB: 55A

C156

C156

D D

22U/6.3VS_8

22U/6.3VS_8

C512

C512
22U/6.3VS_8

22U/6.3VS_8

C161

C161
22U/6.3VS_8

22U/6.3VS_8

C155

C155
22U/6.3VS_8

22U/6.3VS_8

C C

C93

C93
22U/6.3VS_8

22U/6.3VS_8

C488

C488
22U/6.3VS_8

22U/6.3VS_8

C125

C125
22U/6.3VS_8

22U/6.3VS_8

C42

C42
*22U/6.3VS_8

*22U/6.3VS_8

B B

C61

C61
22U/6.3VS_8

22U/6.3VS_8

C492

C492
22U/6.3VS_8

22U/6.3VS_8

22uF_8 x8 Socket TOP cavity
22uF_8 x10 Socket BOT cavity
22uF_8 x8 Socket TOP edge
470uF_7343 x4

C28

C28
22U/6.3VS_8

22U/6.3VS_8

C504

C504
22U/6.3VS_8

22U/6.3VS_8

C528

C528
22U/6.3VS_8

22U/6.3VS_8

C96

C96
22U/6.3VS_8

22U/6.3VS_8

C39

C39
*22U/6.3VS_8

*22U/6.3VS_8

C115

C115
22U/6.3VS_8

22U/6.3VS_8

C124

C124
22U/6.3VS_8

22U/6.3VS_8

C35

C35
*22U/6.3VS_8

*22U/6.3VS_8

C496

C496
22U/6.3VS_8

22U/6.3VS_8

C87

C87
22U/6.3VS_8

22U/6.3VS_8

+VCC_CORE

C517

C517
22U/6.3VS_8

22U/6.3VS_8

C500

C500
22U/6.3VS_8

22U/6.3VS_8

C136

C136
22U/6.3VS_8

22U/6.3VS_8

C33

C33
22U/6.3VS_8

22U/6.3VS_8

C92

C92
22U/6.3VS_8

22U/6.3VS_8

C147

C147
22U/6.3VS_8

22U/6.3VS_8

C495

C495
22U/6.3VS_8

22U/6.3VS_8 C40

C79

C79
22U/6.3VS_8

22U/6.3VS_8

C135

C135
22U/6.3VS_8

22U/6.3VS_8

C148

C148
*22U/6.3VS_8

*22U/6.3VS_8

3/26 DB change 10U FP to 0805.

A A

5

U17F

AG35

VCC1

AG34

VCC2

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

AC27

VCC39

AC26

VCC40

AA35

VCC41

AA34

VCC42

AA33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

Sandy Bridge_rPGA_Rev0p61

Sandy Bridge_rPGA_Rev0p61

rpga989-47989-socket

rpga989-47989-socket

DGG^9000014

DGG^9000014

IC SOCKET RPGA 989P(P1.0,M/H3.0)

IC SOCKET RPGA 989P(P1.0,M/H3.0)

AH13

SNB: 8.5A

VCCIO1

AH10

VCCIO2

AG10

VCCIO3

AC10

VCCIO4

Y10

VCCIO5

U10

VCCIO6

P10

VCCIO7

L10

VCCIO8

J14

VCCIO9

J13

VCCIO10

J12

VCCIO11

J11

VCCIO12

H14

VCCIO13

H12

VCCIO14

H11

VCCIO15

G14

VCCIO16

G13

VCCIO17

G12

VCCIO18

F14

VCCIO19

F13

VCCIO20

F12

VCCIO21

F11

VCCIO22

E14

VCCIO23

E12

VCCIO24

E11

VCCIO25

D14

VCCIO26

D13

VCCIO27

D12

VCCIO28

D11

VCCIO29

C14

VCCIO30

C13

VCCIO31

C12

VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39

VCCIO40

VIDALERT#

VIDSCLK

VIDSOUT

4

C11
B14
B12
A14
A13
A12
A11

J23

AJ29
AJ30
AJ28

AJ35
AJ34

B10
A10

PEG AND DDR

PEG AND DDR

CORE SUPPLY

CORE SUPPLY

VCC_SENSE
VSS_SENSE

VCCIO_SENSE

VSSIO_SENSE

SENSE LINES SVID

SENSE LINES SVID

C41

C41
22U/6.3VS_8

22U/6.3VS_8

C139

C139
22U/6.3VS_8

22U/6.3VS_8

C45

C45
*22U/6.3VS_8

*22U/6.3VS_8

C527

C527
*22U/6.3VS_8

*22U/6.3VS_8

C491

C491
22U/6.3VS_8

22U/6.3VS_8

C80

C80
*22U/6.3VS_8

*22U/6.3VS_8

C513

C513
*22U/6.3VS_8

*22U/6.3VS_8

22uF_8 x7 Socket TOP cavity
22uF_8 x5 Socket BOT cavity
22uF_8 x2 Socket TOP cavity (no stuff)
22uF_8 x5 Socket BOT cavity (no stuff)
330uF_7343 x2

+1.05V_VTT_40

H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT

VSSP_SENSE

R42 *0_4/SR42 *0_4/S

R93 100_4R93 100_4

R95 100_4R95 100_4

TP33TP33

Trace Route to Power IC area.

R632

R632
10_4

10_4

DV2: Add PD 10 ohm

+1.05V_VTT

C38

C38
22U/6.3VS_8

22U/6.3VS_8

C89

C89
22U/6.3VS_8

22U/6.3VS_8

C117

C117
22U/6.3VS_8

22U/6.3VS_8

C98

C98
*22U/6.3VS_8

*22U/6.3VS_8

C51

C51
*22U/6.3VS_8

*22U/6.3VS_8

C505

C505
22U/6.3VS_8

22U/6.3VS_8

C499

C499
22U/6.3VS_8

22U/6.3VS_8

+1.05V_VTT

+VCC_CORE

VCC_SENSE [35]
VSS_SENSE [35]

C487

C487
22U/6.3VS_8

22U/6.3VS_8

C30

C30
22U/6.3VS_8

22U/6.3VS_8

C518

C518
22U/6.3VS_8

22U/6.3VS_8

C50

C50
*22U/6.3VS_8

*22U/6.3VS_8

C151

C151
*22U/6.3VS_8

*22U/6.3VS_8

C131

C131
*22U/6.3VS_8

*22U/6.3VS_8

C64

C64
22U/6.3VS_8

22U/6.3VS_8

5/4: add C8260/ C8322

VCCP_SENSE [32]

+1.8V[7,10,33,36]

+1.5VSUS[2,10,12,13,30,31]
+1.5V_CPU[2,10,25]
+1.05V_VTT[2,10,27,32,34,35]

+VCCSA[34,36]

+VCC_GFX[35]

+VCC_CORE[35]

22uF_8 x2 Socket TOP cavity
22uF_8 x2 Socket BOT cavity
22uF_8 x4 Socket TOP edge
22uF_8 x4 Socket BOT edge
470uF_7343 x2

+VCC_GFX

+1.8V

SNB: 1.5A

C53

C53

C52

C52

1U/6.3V_4

1U/6.3V_4

10U/6.3V_8

10U/6.3V_8

330uF x1, 10uF_8 x1, 1uF_4 x2
Socket BOT edge.

3/26 DB change 10U FP to 0805.

Layout note: need routing
together and ALERT need
between CLK and DATA.

H_CPU_SVIDCLK

Place PU resistor
close to CPU

H_CPU_SVIDDAT

Place PU resistor close to CPU

H_CPU_SVIDALRT#

3

SNB: 21.5A

C523

C523
22U/6.3V_8

22U/6.3V_8

C152

C152
22U/6.3V_8

22U/6.3V_8

C149

C149
22U/6.3V_8

22U/6.3V_8

C157

C157
22U/6.3V_8

22U/6.3V_8

C509

C509
22U/6.3V_8

22U/6.3V_8

C142

C142
22U/6.3V_8

22U/6.3V_8

R127 *0_4R127 *0_4

Ra

C138

C138
22U/6.3V_8

22U/6.3V_8

C127

C127
22U/6.3V_8

22U/6.3V_8

C522

C522
22U/6.3V_8

22U/6.3V_8

C570

C570
22U/6.3V_8

22U/6.3V_8

C226

C226
22U/6.3V_8

22U/6.3V_8

C508

C508
22U/6.3V_8

22U/6.3V_8

DISNCSG/UMA

Ra Stuff

+

+

C54

C54

C59

C59

1U/6.3V_4

1U/6.3V_4 R377 10K_4R377 10K_4

330U/2V_7343

330U/2V_7343

+1.05V_VTT +1.05V_VTT

R125

R125
130/F_4

130/F_4

+1.05V_VTT

R115 75_4R115 75_4

R112 43_4R112 43_4

U17G

AT24

VAXG1

AT23

VAXG2

AT21

VAXG3

AT20

VAXG4

AT18

VAXG5

AT17

VAXG6

AR24

VAXG7

AR23

VAXG8

AR21

VAXG9

AR20

VAXG10

AR18

VAXG11

AR17

VAXG12

AP24

VAXG13

AP23

VAXG14

AP21

VAXG15

AP20

VAXG16

AP18

VAXG17

AP17

VAXG18

AN24

VAXG19

AN23

VAXG20

AN21

VAXG21

AN20

VAXG22

AN18

VAXG23

AN17

VAXG24

AM24

VAXG25

AM23

VAXG26

AM21

VAXG27

AM20

VAXG28

AM18

VAXG29

AM17

VAXG30

AL24

VAXG31

AL23

VAXG32

AL21

VAXG33

AL20

VAXG34

AL18

VAXG35

AL17

VAXG36

AK24

VAXG37

AK23

VAXG38

AK21

VAXG39

AK20

VAXG40

AK18

VAXG41

AK17

VAXG42

AJ24

VAXG43

AJ23

VAXG44

AJ21

VAXG45

AJ20

VAXG46

AJ18

VAXG47

AJ17

VAXG48

AH24

VAXG49

AH23

VAXG50

AH21

VAXG51

AH20

VAXG52

AH18

VAXG53

AH17

VAXG54

B6

VCCPLL1

A6

VCCPLL2

A2

VCCPLL3

Sandy Bridge_rPGA_Rev0p61

Sandy Bridge_rPGA_Rev0p61

rpga989-47989-socket

rpga989-47989-socket

DGG^9000014

DGG^9000014

IC SOCKET RPGA 989P(P1.0,M/H3.0)

IC SOCKET RPGA 989P(P1.0,M/H3.0)

Place PU resistor
close to VR

R124 *54.9/F_4R124 *54.9/F_4

Place PU resistor

R126

R126

close to VR

*130/F_4

*130/F_4

SENSE

SENSE

GRAPHICS

GRAPHICS

1.8V RAIL

1.8V RAIL

SVID CLK

+1.05V_VTT

VR_SVID_CLK [35]

SVID DATA

VR_SVID_DATA [35]

SVID ALERT

VR_SVID_ALERT# [35]

2

VSSAXG_SENSE

LINES

LINES

VREFMISC

VREFMISC

DDR3 -1.5V RAILS

DDR3 -1.5V RAILS

SA RAIL

SA RAIL

VCCSA_SENSE

VAXG_SENSE

SM_VREF

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15

VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8

FC_C22

VCCSA_VID1

R114

R114
100K_4

100K_4

1

C88

C88
10U/6.3V_8

10U/6.3V_8

C137

C137
10U/6.3V_8

10U/6.3V_8

R100 100_4R100 100_4

VCC_AXG_SENSE [35]
VSS_AXG_SENSE [35]

R103 100_4R103 100_4

CAD Note: +VDDR_REF_CPU should
have 10 mil trace width

R119 *0_8R119 *0_8

3

Q17

Q17
2N7002

2N7002

2

MAIND

SNB: 5A

C121

C121
10U/6.3V_8

10U/6.3V_8

4/27: layout modify

+

+

C158

C158
10U/6.3V_8

10U/6.3V_8

AK35
AK34

AL1

AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1

+VDDR_REF_CPU

330uF x1, 10uF_8 x6 Socket BOT edge.

3/26 DB change 10U FP to 0805.

SNB: 6A

M27
M26
L26
J26
J25
J24
H26
H25

VCCUSA_SENSE_R

H23

C483

C483

C78

C78

10U/6.3V_8

10U/6.3V_8

10U/6.3V_8

10U/6.3V_8

330uF x1, 10uF_8 x1 Socket BOT edge,
10uF_8 x2 Socket BOT cavity.

3/26 DB change 10U FP to 0805.

R370 *0_4/SR370 *0_4/S

PV: Change to short pad

H_FC_C22

C22
C24

R378 *10K_4R378 *10K_4

5/11: Add for intel CRB

DV2: Unstuff

JP1

JP1
*SOLDERJUMPER-2

*SOLDERJUMPER-2

Q43

Q43
AON7410

AON7410

5 2

MAIND

NB5

NB5

NB5

+1.5V_CPU+1.5VSUS

12

R129

R129

1

220_8

220_8

3

3

3/26 DB add for Intel.

4

C235

C235
*470P/50V_4

*470P/50V_4

PROJECT : QLC

PROJECT : QLC

PROJECT : QLC

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

SNB 3/4 (POWER)

SNB 3/4 (POWER)

SNB 3/4 (POWER)

Date: Sheet of

Friday, November 26, 2010 4 36

Date: Sheet of

Friday, November 26, 2010 4 36

Date: Sheet of

Friday, November 26, 2010 4 36

Placement close to CPU.

2

Q19

Q19

2N7002

2N7002

1

1

+VCC_GFX

DDR_VTTREF [12,13,30]

MAIND [36]

+1.5V_CPU

C123

C123

C150

C150

10U/6.3V_8

10U/6.3V_8

10U/6.3V_8

10U/6.3V_8

12

C574

C574
*390U/2.5V_6X5.8ESR10

*390U/2.5V_6X5.8ESR10

+VCCSA

C40

C489

C489

10U/6.3V_8

10U/6.3V_8

*10U/6.3V_8

*10U/6.3V_8

VCCUSA_SENSE [34]

VCCSA_SEL [34]

+1.5VSUS

C572 0.1U/10V_4C572 0.1U/10V_4
C577 0.1U/10V_4C577 0.1U/10V_4
C581 0.1U/10V_4C581 0.1U/10V_4
C584 0.1U/10V_4C584 0.1U/10V_4

MAIN_ONG [2,36]

CPU VDDQ

1A

1A

1A

http://www.vinafix.vn

5

4

3

2

1

Sandy Bridge Processor (GND)

U17H

U17H

AT35

VSS1

AT32

VSS2

AT29

VSS3

AT27

VSS4

AT25

VSS5

AT22

VSS6

AT19

D D

C C

B B

AT16
AT13
AT10

AR25
AR22
AR19
AR16
AR13
AR10

AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10

AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10

AM29
AM25
AM22
AM19
AM16
AM13
AM10

AM7
AM4
AM3
AM2

AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10

AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10

AJ25

AT7
AT4
AT3

AR7
AR4
AR2

AP7
AP4
AP1

AN7
AN4

AL7
AL4
AL2

AK7
AK4

VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80

VSS

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH26
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2

M34

H33
H30
H27
H24
H21
H18
H15
H13
H10

G35
G32
G29
G26
G23
G20
G17
G11

U17I

U17I

T35

VSS161

T34

VSS162

T33

VSS163

T32

VSS164

T31

VSS165

T30

VSS166

T29

VSS167

T28

VSS168

T27

VSS169

T26

VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176

N35

VSS177

N34

VSS178

N33

VSS179

N32

VSS180

N31

VSS181

N30

VSS182

N29

VSS183

N28

VSS184

N27

VSS185

N26

VSS186
VSS187

L33

VSS188

L30

VSS189

L27

VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198

K35

VSS199

K32

VSS200

K29

VSS201

K26

VSS202

J34

VSS203

J31

VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230

F34

VSS231

F31

VSS232

F29

VSS233

VSS

VSS

VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285

F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3

SMDDR_VREF_DQ0_M3[12]
SMDDR_VREF_DQ1_M3[13]

PV: Change to short pad

H_VTTVID1[32]

Sandy Bridge Processor (RESERVED, CFG)

U17E

U17E

For CPU debug.

TP8TP8
TP9TP9

TP6TP6

R368

R368
*1K_4

*1K_4

CFG0
CFG2
CFG4

CFG5
CFG6
CFG7CFG7

R36

R36
*1K_4

*1K_4

R376 *0_4/SR376 *0_4/S

AK28

CFG[0]

AK29

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

RSVD1

AH31

RSVD2

AJ33

RSVD3

AH33

RSVD4

AJ26

RSVD5

B4

RSVD6

D1

RSVD7

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

A19

RSVD26

J15

RSVD27

Sandy Bridge_rPGA_Rev0p61

Sandy Bridge_rPGA_Rev0p61

rpga989-47989-socket

rpga989-47989-socket

DGG^9000014

DGG^9000014

IC SOCKET RPGA 989P(P1.0,M/H3.0)

IC SOCKET RPGA 989P(P1.0,M/H3.0)

RESERVED

RESERVED

L7

RSVD28

AG7

RSVD29

AE7

RSVD30

AK2

RSVD31

W8

RSVD32

AT26

RSVD33

AM33

RSVD34

AJ27

RSVD35

T8

RSVD37

J16

RSVD38

H16

RSVD39

G16

RSVD40

AR35

RSVD41

AT34

RSVD42

AT33

RSVD43

AP35

RSVD44

AR34

RSVD45

B34

RSVD46

A33

RSVD47

A34

RSVD48

B35

RSVD49

C35

RSVD50

AJ32

RSVD51

AK32

RSVD52

AH27

RSVD53

AN35

RSVD54

AM35

RSVD55

#27636 SNB EDS0.7v1 no function.

AT2

RSVD56

AT1

RSVD57

AR1

RSVD58

For rPGA socket, RSVD59 pin should be left NC.

B1

KEY

TP35TP35
TP34TP34

05

Sandy Bridge_rPGA_Rev0p61

Sandy Bridge_rPGA_Rev0p61

rpga989-47989-socket

rpga989-47989-socket

DGG^9000014

DGG^9000014

IC SOCKET RPGA 989P(P1.0,M/H3.0)

IC SOCKET RPGA 989P(P1.0,M/H3.0)

Processor Strapping

The CFG signals have a default value of '1' if not terminated on the board.

1 0

A A

CFG2
(PEG Static Lane Reversal)

CFG4
(DP Presence Strap)

CFG7
(PEG Defer Training)

5

Normal Operation Lane Reversed

Disable; No physical DP attached to eDP

PEG train immediately following
xxRESETB de assertion

Sandy Bridge_rPGA_Rev0p61

Sandy Bridge_rPGA_Rev0p61

rpga989-47989-socket

rpga989-47989-socket

DGG^9000014

DGG^9000014

IC SOCKET RPGA 989P(P1.0,M/H3.0)

IC SOCKET RPGA 989P(P1.0,M/H3.0)

4

Enable; An ext DP device is connected to eDP

PEG wait for BIOS training

CFG[6:5] (PCIE Port Bifurcation Straps)

11: (Default) x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)

CFG2

R132 1K_4R132 1K_4

CFG4

R134 *1K_4R134 *1K_4

CFG7

R120 *1K_4R120 *1K_4

CFG5

R121 *1K_4R121 *1K_4

CFG6

R116 *1K_4R116 *1K_4

3

00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

PROJECT : QLC

PROJECT : QLC

PROJECT : QLC

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

NB5

NB5

NB5

Date: Sheet of

Friday, November 26, 2010 5 36

Date: Sheet of

Friday, November 26, 2010 5 36

Date: Sheet of

2

Friday, November 26, 2010 5 36

SNB 4/4 (GND)

SNB 4/4 (GND)

SNB 4/4 (GND)

1

1A

1A

1A

http://www.vinafix.vn

5

4

3

2

1

Cougar Point (DMI,FDI,PM)

U28C

U28C

DMI_RXN0[2]
DMI_RXN1[2]
DMI_RXN2[2]
DMI_RXN3[2]

DMI_RXP0[2]

+1.05V

DMI_RXP1[2]
DMI_RXP2[2]
DMI_RXP3[2]

DMI_TXN0[2]
DMI_TXN1[2]
DMI_TXN2[2]
DMI_TXN3[2]

DMI_TXP0[2]
DMI_TXP1[2]
DMI_TXP2[2]
DMI_TXP3[2]

R589 49.9/F_4R589 49.9/F_4
R578 750/F_4R578 750/F_4

DMI_COMP
DMI_RBIAS

D D

PV: Change to short pad

SUS_PWR_ACK_R

SUSACK#[27]

C C

5/7: DEL R8293 for SUSACK# From EC

XDP_DBRST#[2]

PV: Change to short pad

PV: Change to short pad

PV: Change to short pad

SYS_PWROK

EC_PWROK[27]

EC_PWROK_R

PM_DRAM_PWRGD[2]

SUS_PWR_ACK[27]

DNBSWON#[27]

AC_PRESENT[27]

R565 *0_4R565 *0_4

RSMRST#[27]

DV2: Unstuff

B B

R570*0_4/S R570*0_4/S

R568*0_4/S R568*0_4/S

R573 *0_4R573 *0_4
R576 0_4R576 0_4

R151*0_4/S R151*0_4/S

R582*0_4/S R582*0_4/S

R596 *0_4R596 *0_4

SUSACK#_R

XDP_DBRST#

SYS_PWROK_R

EC_PWROK_R

APWROK_R

PM_DRAM_PWRGD

RSMRST#

SUS_PWR_ACK_R

DNBSWON#_R

AC_PRESENT_R

PM_BATLOW#

PM_RI#

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

(+3VS5)

K16

SUSWARN#/SUSPWRDNACK/GPIO30

E20

PWRBTN#

(DSW)

H20

ACPRESENT / GPIO31

(+3VS5)

E10

BATLOW# / GPIO72

A10

RI#

CougarPoint_Rev_0p7

CougarPoint_Rev_0p7

fcbga989-intel-cougarpoint

fcbga989-intel-cougarpoint

AJ0QNJH0T08

AJ0QNJH0T08

IC CTRL(989P)COUGARPOINT QMVY TOP B/S

IC CTRL(989P)COUGARPOINT QMVY TOP B/S

DMI

FDI

DMI

FDI

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

System Power Management

System Power Management

SLP_LAN# / GPIO29

FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1

DSWVRMEN

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

FDI_INT

DPWROK

WAKE#

(+3V)

(+3VS5)

(+3VS5)

(+3VS5)

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

(+3VS5)

BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9

BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9

AW16
AV12
BC10
AV14
BB10

A18

E22

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

DSWVREN

R586 *0_4R586 *0_4

PCIE_WAKE#

CLKRUN#

PCH_SUSCLK_LPCH_SUSCLK_L

R165*0_4/S R165*0_4/S

R547*0_4/S R547*0_4/SR571*0_4/S R571*0_4/S

R160 *0_4R160 *0_4

R583 *0_4R583 *0_4

SLP_LAN#

FDI_TXN0 [2]
FDI_TXN1 [2]
FDI_TXN2 [2]
FDI_TXN3 [2]
FDI_TXN4 [2]
FDI_TXN5 [2]
FDI_TXN6 [2]
FDI_TXN7 [2]

FDI_TXP0 [2]
FDI_TXP1 [2]
FDI_TXP2 [2]
FDI_TXP3 [2]
FDI_TXP4 [2]
FDI_TXP5 [2]
FDI_TXP6 [2]
FDI_TXP7 [2]

FDI_INT [2]
FDI_FSYNC0 [2]
FDI_FSYNC1 [2]
FDI_LSYNC0 [2]
FDI_LSYNC1 [2]

DV2: Change to RSMRST#

RSMRST#

R585*0_4/S R585*0_4/S

DPWROK

PCIE_WAKE# [24]

CLKRUN# [27]

TP17TP17

R166 0_4R166 0_4

TP14TP14

SLP_S5 [27]

SUSC# [27]

SUSB# [27]

SLP_A# [27]

SLP_SUS# [27]

PM_SYNC [2]

PV: Change to short pad

PCH_SUSCLK [27]

PV: Change to short pad

PV: Unstuff

PCH_LVDS_BLON[20]

PCH_DISP_ON[20]

PCH_DPST_PWM[20]

PCH_EDIDCLK[20]
PCH_EDIDDATA[20]

PCH_LA_CLK#[20]

PCH_LA_CLK[20]

PCH_LA_DATAN0[20]
PCH_LA_DATAN1[20]
PCH_LA_DATAN2[20]

PCH_LA_DATAP0[20]
PCH_LA_DATAP1[20]
PCH_LA_DATAP2[20]

PCH_LB_CLK#[20]
PCH_LB_CLK[20]

PCH_LB_DATAN0[20]
PCH_LB_DATAN1[20]
PCH_LB_DATAN2[20]

PCH_LB_DATAP0[20]
PCH_LB_DATAP1[20]
PCH_LB_DATAP2[20]

PCH_CRT_B[19]
PCH_CRT_G[19]
PCH_CRT_R[19]

PCH_DDCCLK[19]
PCH_DDCDATA[19]

PCH_EDIDCLK
PCH_EDIDDATA

CTRL_CLK
CTRL_DATA

LVD_IBG

PCH_LA_CLK#
PCH_LA_CLK

PCH_LA_DATAN0
PCH_LA_DATAN1
PCH_LA_DATAN2

PCH_LA_DATAP0
PCH_LA_DATAP1
PCH_LA_DATAP2

PCH_LB_CLK#
PCH_LB_CLK

PCH_LB_DATAN0
PCH_LB_DATAN1
PCH_LB_DATAN2

PCH_LB_DATAP0
PCH_LB_DATAP1
PCH_LB_DATAP2

PCH_CRT_B
PCH_CRT_G
PCH_CRT_R

PCH_HSYNC_R
PCH_VSYNC_R

Cougar Point (LVDS,DDI)

U28D

U28D

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

AF37

LVD_IBG

AF36

T25T25

DAC_IREF

R274

R274
1K/F_4

1K/F_4

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

M40

CRT_DDC_DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

CougarPoint_Rev_0p7

CougarPoint_Rev_0p7

fcbga989-intel-cougarpoint

fcbga989-intel-cougarpoint

AJ0QNJH0T08

AJ0QNJH0T08

IC CTRL(989P)COUGARPOINT QMVY TOP B/S

IC CTRL(989P)COUGARPOINT QMVY TOP B/S

LVDS

LVDS

CRT

CRT

Digital Display Interface

Digital Display Interface

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_STALLN
SDVO_STALLP

SDVO_INTN
SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN
DDPB_AUXP

DDPB_HPD

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN
DDPC_AUXP

DDPC_HPD

DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN
DDPD_AUXP

DDPD_HPD

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

AP43
AP45

AM42
AM40

AP39
AP40

P38
M39

AT49
AT47
AT40

AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49

P46
P42

AP47
AP49
AT38

AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49

M43
M36

AT45
AT43
BH41

BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42

SDVO_CLK [19]
SDVO_DATA [19]

DPB_HPD_Q
DPB_LANE0_N

DPB_LANE0_P
DPB_LANE1_N
DPB_LANE1_P
DPB_LANE2_N
DPB_LANE2_P
DPB_LANE3_N
DPB_LANE3_P

+3VPCU[7,20,26,27,28,29]

+3V_DSW[7,10]

+3V_RTC[7,10,27]

+1.05V[7,8,10,31,33]

06

+5V[7,10,19,20,22,25,26,36]
+3V[2,7,8,9,10,12,13,14,16,19,20,21,22,23,24,25,26,27,31,32,35,36]

+3VS5[2,7,8,9,10,14,24,27,29,31,33,34,35,36]

INT. HDMI

PCH Pull-high/low(CLG)

PM_RI#
PM_BATLOW#
PCIE_WAKE#
SLP_LAN#
SUS_PWR_ACK
AC_PRESENT_R

A A

CLKRUN#
XDP_DBRST#

RSMRST#
SYS_PWROK

R562 10K_4R562 10K_4
R561 *8.2K_4R561 *8.2K_4
R559 10K_4R559 10K_4
R231 *10K_4R231 *10K_4
R572 10K_4R572 10K_4
R595 10K_4R595 10K_4

R519 8.2K_4R519 8.2K_4
R523 10K_4R523 10K_4
R542 *1K_4R542 *1K_4
R251 10K_4R251 10K_4
R567 *10K_4R567 *10K_4

+3VS5 +3VS5

+3V

INT LVDS & CRT disable
(DIS only remove)

R285 2.2K_4R285 2.2K_4

+3V

R273 2.2K_4R273 2.2K_4
R267 2.37K/F_4R267 2.37K/F_4

PCH_HSYNC[19]
PCH_VSYNC[19]

R295 33_4R295 33_4
R296 33_4R296 33_4

PD Res place close to PCH
PCH to Res routeing 50 ohm Impedance.

Res to connector filter routeing 37.5ohm Impedance.

R298 150/F_4R298 150/F_4
R297 150/F_4R297 150/F_4
R299 150/F_4R299 150/F_4

CTRL_CLK
CTRL_DATA

LVD_IBG

PCH_HSYNC_R
PCH_VSYNC_R

PCH_CRT_B
PCH_CRT_G
PCH_CRT_R

DPB_LANE0_N
DPB_LANE0_P
DPB_LANE1_N
DPB_LANE1_P
DPB_LANE2_N
DPB_LANE2_P
DPB_LANE3_N
DPB_LANE3_P

INT HDMI Detect Function

R603 0_4R603 0_4

DPB_HPD_Q

R608

R608
*100K_4

*100K_4

1

Q52

Q52

2

*2N7002K

*2N7002K

+5V

IN_D2# [19]
IN_D2 [19]
IN_D1# [19]
IN_D1 [19]
IN_D0# [19]
IN_D0 [19]
IN_CLK# [19]
IN_CLK [19]

3

R607

R607
*100K_4

*100K_4

HDMI_HPD_CON [19]

DV2: Unstuff

5

4

3

System PWR_OK(CLG)

C647 *0.1U/10V_4C647 *0.1U/10V_4

SYS_PWROK

+3V_RTC

4

U29

U29
*TC7SH08FU

*TC7SH08FU

R615 0_4R615 0_4

R579 330K_4R579 330K_4

2
1

3 5

DSWVREN

On Die DSW VR Enable
High = Enable (Default)

Low = Disable

IMVP_PWRGD [35]

EC_PWROK

R614

R614
100K_4

100K_4

R580 *330K_4R580 *330K_4

2

DPWROK FOR DSWINT HDMI disable (DIS only remove)

+3VPCU

+3VS5

DV2: unstuff

D9

D9

*RB500V-40

*RB500V-40
D10

D10

*RB500V-40

*RB500V-40

NB5

NB5

NB5

+3VPCU

+3VPCU

+3V_DSW

2

Q21

Q21
*PDTC144EU

*PDTC144EU

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

1 3

PROJECT : QLC

PROJECT : QLC

PROJECT : QLC

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PCH 1/6 (DMI/FDI/VIDEO)

PCH 1/6 (DMI/FDI/VIDEO)

PCH 1/6 (DMI/FDI/VIDEO)

Friday, November 26, 2010 6 36

Friday, November 26, 2010 6 36

Friday, November 26, 2010 6 36

R206

R206
*10K_4

*10K_4

R199

R199
*10K_4

*10K_4

DPWROK

3

C316

C316
*0.1U/10V_4

1

Q20

Q20
*2N7002

*2N7002

*0.1U/10V_4

add cap to
timing tune

2

1

1A

1A

1A

http://www.vinafix.vn

5

4

3

2

1

Cougar Point (HDA,JTAG,SATA)

U28A

RTC_X1
RTC_X2
RTC_RST#
SRTC_RST#

R240 1M_4R240 1M_4

D D

C C

B B

+3V_RTC

SPKR[22]

ACZ_SDIN0[22]

TP23TP23

PV: Change to TP3050

PV: reserver

R644 *10K_4R644 *10K_4

+3VS5

+3VS5

TP22TP22

TP13TP13
TP10TP10
TP12TP12
TP52TP52

PCH_SPI_CLK[27]

PCH_SPI_CS0#[27]

R537 *10K_4R537 *10K_4

PCH_SPI_SI[27]

PCH_SPI_SO[27]

PCH Strap Table

Pin Name Strap description Sampled Configuration

SPKR

Different from
Calpella

SM_INTRUDER#
PCH_INVRMEN

ACZ_BCLK

ACZ_SYNC_R

SPKR
ACZ_RST#

ACZ_SDOUT

GPIO33

PCH_JTAG_TCK_R
PCH_JTAG_TMS
PCH_JTAG_TDI_R
PCH_JTAG_TDO_R

PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_CS1#

PCH_SPI_SI
PCH_SPI_SO

No reboot mode setting PWROK

GNT3# / GPIO55 Top-Block Swap Override
INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up
HDA_DOCK_EN#/GPIO33
GNT1# / GPIO51

GPIO19

Different from
Calpella

GNT2# / GPIO53
NV_ALE

NV_CLE

A A

HDA_SYNC On-Die PLL VR Voltage Select RSMRST

Flash Descriptor Security

Only for Interposer

Boot BIOS Selection 1 [bit-1]
Boot BIOS Selection 0 [bit-0]
ESI strap (Server only)

Intel Anti-Theft HDD protection

Only for Interposer

DMI Termination voltage weak pull-down 20kohm

HDA_SDO PWROKFlash Descriptor Security
GPIO8

GPIO28

Different from
Calpella

Integrated Clock Chip Enable Should be pull-down (weak pull-up 20K)RSMRST#
On-die PLL Voltage Regulator RSMRST#

SPI_MOSI iTPM function Disable APWROK

5

U28A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

(+3V)

C36

HDA_DOCK_EN# / GPIO33

(+3VS5)

N32

HDA_DOCK_RST# / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

CougarPoint_Rev_0p7

CougarPoint_Rev_0p7

fcbga989-intel-cougarpoint

fcbga989-intel-cougarpoint

AJ0QNJH0T08

AJ0QNJH0T08

IC CTRL(989P)COUGARPOINT QMVY TOP B/S

IC CTRL(989P)COUGARPOINT QMVY TOP B/S

RTCIHDA

RTCIHDA

SPI JTAG

SPI JTAG

PWROK

PWROK
PWROK
PWROK
PWROK
PWROK 0 = Disable (Internal pull-down 20kohm)

PWROK

LDRQ0#

(+3V)

SERIRQ

SATA0RXN
SATA0RXP
SATA0TXN

SATA0TXP

SATA1RXN
SATA1RXP
SATA1TXN

SATA1TXP

SATA2RXN
SATA2RXP
SATA2TXN

SATA2TXP

SATA3RXN
SATA3RXP
SATA3TXN

SATA3TXP

SATA4RXN
SATA4RXP
SATA4TXN

SATA4TXP

SATA5RXN
SATA5RXP
SATA5TXN

SATA5TXP

SATALED#

(+3V)
(+3V)

C38
A38
B37
C37

D36

PCH_DRQ#0

E36

PCH_DRQ#1

K36

SERIRQ

V5

SATA_RXN0_C

AM3

SATA_RXP0_C

AM1

SATA_TXN0_C

AP7

SATA_TXP0_C

AP5

SATA_RXN1_C

AM10

SATA_RXP1_C

AM8

SATA_TXN1_C

AP11

SATA_TXP1_C

AP10
AD7

AD5
AH5
AH4

AB8
AB10
AF3
AF1

Y7
Y5
AD3
AD1

Y3
Y1
AB3
AB1

Y11

SATA_COMP

Y10

AB12

SATA3_COMP

AB13

SATA3_RBIAS

AH1

P3

SATA0GP

V14

BBS_BIT0

P1

GNT0#GNT1#

Boot Location

11

SPI

00

LPC

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

LPC

LPC

FWH4 / LFRAME#

LDRQ1# / GPIO23

SATA 6G

SATA 6G

SATA

SATA

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATA0GP / GPIO21
SATA1GP / GPIO19

0 = Default (weak pull-down 20K)

1 = Setting to No-Reboot mode

0 = "top-block swap" mode

1 = Default (weak pull-up 20K)

0 = Override

1 = Default (weak pull-up 20K)

Should not be pull-down
(weak pull-up 20K)

0 = Support by 1.8V (weak pull-down)
1 = Support by 1.5V

0 = Override

1 = Default (weak pull-up 20K)

0 = Disable

1 = Enable (Default)
0 = Default (weak pull-down 20K)

1 = Enable

4

R188 8.2K_4R188 8.2K_4

C397 0.01U/25V_4C397 0.01U/25V_4
C394 0.01U/25V_4C394 0.01U/25V_4
C405 0.01U/25V_4C405 0.01U/25V_4
C413 0.01U/25V_4C413 0.01U/25V_4

C388 0.01U/25V_4C388 0.01U/25V_4
C389 0.01U/25V_4C389 0.01U/25V_4
C383 0.01U/25V_4C383 0.01U/25V_4
C382 0.01U/25V_4C382 0.01U/25V_4

R209 37.4/F_4R209 37.4/F_4

R222 49.9/F_4R222 49.9/F_4

R516 750/F_4R516 750/F_4

R518 10K_4R518 10K_4
R190 10K_4R190 10K_4

4/29 modify

LAD0 [25,27]
LAD1 [25,27]
LAD2 [25,27]
LAD3 [25,27]

LFRAME# [25,27]

TP24TP24
TP25TP25

+3V
SERIRQ [27]

SATA_RXN0 [25]
SATA_RXP0 [25]
SATA_TXN0 [25]
SATA_TXP0 [25]

SATA_RXN1 [25]
SATA_RXP1 [25]
SATA_TXN1 [25]
SATA_TXP1 [25]

+1.05V

+1.05V

SATA_LED# [26]
+3V
+3V

Circuit

SPKR

+3V

PCH_INVRMEN

GPIO33

[Need external pull-down for LPC BIOS]
Default weak pull-up on GNT0/1#

R292 *1K_4R292 *1K_4
R290 10K_4R290 10K_4

R185 *1K_4R185 *1K_4

R581 330K_4R581 330K_4

R600 *1K_4R600 *1K_4

R538 *1K_4R538 *1K_4
R288 *1K_4R288 *1K_4

USE GPIO PIN

R212 *1K_4R212 *1K_4

+1.8V

R548 2.2K_4R548 2.2K_4

+1.8V

+3VS5

GPIO33_E[27]

PCH_SPI_SI

R283 1K_4R283 1K_4

ACZ_SDOUT

R566 *1K_4R566 *1K_4

R550 *1K_4R550 *1K_4

R173 1K_4R173 1K_4

3

HDD0 (SATA3 6.0Gb/s)

ODD (SATA1 1.5Gb/s)

RTC Power trace width 20mils.

+5VPCU

R339 4.7K_4R339 4.7K_4

R340 4.7K_4R340 4.7K_4

+3V

PCI_GNT3# [8]

Bios request, for can't boot Capella 4/23.

+3V_RTC

GPIO33_E [27]

BBS_BIT0

BBS_BIT1 [8]

R549 4.7K_4R549 4.7K_4

NV_ALE [8]

ACZ_SYNC_R

R259 *1K_4R259 *1K_4

4/29 reserve.

ICC_EN# [9]

PLL_ODVR_EN [9]

+3V

NV_CLE [8]
H_SNB_IVB# [2]

+V3.3A_1.5A_HDA_IO

N.A at CPT EDS 0.7

RTC Circuitry(RTC)

R574 *0_6R574 *0_6

+3V_DSW

PV: Change to short pad

+VCCRTC_1

MMBT3904

MMBT3904

+VCCRTC_2

13

Q32

Q32

2

R341

R341
12K/F_4

12K/F_4

2nd source DFHS02FS043
Coil:AHL03017100/AHL03001424

+3V_RTC_0

+3VPCU

12

BT2

BT2
RTC_CONN

RTC_CONN

R575 *0_6/SR575 *0_6/S
R577 1K_4R577 1K_4

HDA Bus(CLG)

BIT_CLK_AUDIO[22]

ACZ_RST#_AUDIO[22]

ACZ_SDOUT_AUDIO[22]

ACZ_SYNC_AUDIO[22]

C657 220P/50V_4C657 220P/50V_4

R300 10K_4R300 10K_4

+5V

ACZ_SYNC ACZ_SYNC_R

Vender
EON

Socket

PCH_SPI_CS0#
PCH_SPI_CLK
PCH_SPI_SI PCH_SPI1_SI_R
PCH_SPI_SO

2

R275 33_4R275 33_4
R278 33_4R278 33_4
R261 33_4R261 33_4
R301 33_4R301 33_4

DV2: EMI suggest

2

1

Q27

Q27
2N7002

2N7002

Size

P/N

4MB

AKE39FN0Q00 (EN25F32-100HIP)
AKE391P0N00 (W25Q32BVSSIG)Winbond

4MB

DG008000031

R303 *0_4R303 *0_4
R308 *0_4R308 *0_4
R307 *0_4R307 *0_4

R321 *3.3K_4R321 *3.3K_4

+3V

DV2:unstuff

RTC Clock 32.768KHz

C638 18P/50V_4C638 18P/50V_4

C641 18P/50V_4C641 18P/50V_4

FOR DSW

+3V_RTC_2
+3V_RTC_1

D28

D28
BAT54C

BAT54C

PV: Remove BT1

3

PCH_SPI1_CLK_R
PCH_SPI1_SO_R

C401

C401
*22P/50V_4

*22P/50V_4

ACZ_BCLK
ACZ_RST#
ACZ_SDOUT
ACZ_SYNC

ACZ_SYNC

NB5

NB5

NB5

4/20 DB add.

R294 1M_4R294 1M_4

DV2: DG

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

07

23

Y3

Y3

32.768KHZ

32.768KHZ

4 1

30mils

+3V_RTC

PCH JTAG Debug(CLG)

R180

R180
*210/F_4

*210/F_4

R175

R175
*100/F_4

*100/F_4

U10

U10

1

CE#

6

SCK

5

SI

2

SO

HOLD#

3

WP#

*SPI Flash Socket

*SPI Flash Socket

PROJECT : QLC

PROJECT : QLC

PROJECT : QLC

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PCH 2/6 (SATA/HDA/SPI)

PCH 2/6 (SATA/HDA/SPI)

PCH 2/6 (SATA/HDA/SPI)

Friday, November 26, 2010

Friday, November 26, 2010

Friday, November 26, 2010

RTC_X1

R591

R591
10M_4

10M_4

RTC_X2

R590

R590

RTC_RST#

20K/F_4

20K/F_4

R584

R584
20K/F_4

20K/F_4

C635

C635
1U/6.3V_4

1U/6.3V_4

R239 *0_6R239 *0_6

+3VS5

R169

R169
*210/F_4

*210/F_4

R184

R184
*100/F_4

*100/F_4

12

C639

C639

J2

J2

1U/6.3V_4

1U/6.3V_4

*SOLDERJUMPER-2

*SOLDERJUMPER-2

SRTC_RST#

12

C630

C630

J1

J1
*SOLDERJUMPER-2

*SOLDERJUMPER-2

1U/6.3V_4

1U/6.3V_4

SRTC_RST#RTC_RST#

DV2: Unstuff

R528

R528
*210/F_4

*210/F_4

PCH_JTAG_TMS
PCH_JTAG_TDI_R
PCH_JTAG_TDO_R

PCH_JTAG_TCK_R

R152

R152

R527

R527

*51_4

*51_4

*100/F_4

*100/F_4

PCH SPI ROM(CLG)

8

VDD

R315 *3.3K_4R315 *3.3K_4

7
4

VSS

Arrandale+VGA

Arrandale+VGA

Arrandale+VGA

1

C420

C420

*0.1U/10V_4

*0.1U/10V_4

+3VS5[2,6,8,9,10,14,24,27,29,31,33,34,35,36]

+3VPCU[6,20,26,27,28,29]

+V3.3A_1.5A_HDA_IO[10]

+3V_DSW[6,10]

+3V_RTC[6,10,27]

+1.8V[4,10,33,36]

+1.05V[6,8,10,31,33]

7 36

7 36

7 36

+3V

+5V[6,10,19,20,22,25,26,36]

+3V[2,6,8,9,10,12,13,14,16,19,20,21,22,23,24,25,26,27,31,32,35,36]

1A

1A

1A

http://www.vinafix.vn

5

Cougar Point-M (PCI,USB,NVRAM)

U28E

U28E

PCI/USBOC# Pull-up(CLG)

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#

D D

PCI_PIRQD#

MPC_PWR_CTRL#

LCD_BK

USB_OC4#
USB_OC1#

USB_OC3#

R265 8.2K_4R265 8.2K_4
R601 8.2K_4R601 8.2K_4
R264 8.2K_4R264 8.2K_4
R266 8.2K_4R266 8.2K_4 C374 0.1U/10V_4C374 0.1U/10V_4

+3V

RP8

RP8

10

9
8
7 4

10K_10P8R_6

10K_10P8R_6

+3VS5

RP7

RP7

10

9
8
7 4

10K_10P8R_6

10K_10P8R_6

MPC Switch Control

MPC_PWR_CTRL#

C C

MPC_PWR_CTRL#

+3V

R631 10K_4R631 10K_4

Low = MPC ON
High = MPC OFF (Default)

R606 *1K_4R606 *1K_4

DV2: Add pull high

BT_COMBO_EN#[25]

BBS_BIT1[7]

7/27:BIOS swap GPIO

PCI_GNT3#[7]

LCD_BK[20]

TP30TP30

DGPU_IDLE_INT#[17]

Bios swap GPIO 4/23.

B B

TP31TP31

CLK_33M_KBC[27]

CLK_PCI_FB

+3VS5

2
1

3 5

TP28TP28

C607 *0.1U/10V_4C607 *0.1U/10V_4

U26

U26
*TC7SH08FU

*TC7SH08FU

PLTRST# [2,14,24,25,27]

CLK_33M_DEBUG[25]

PLTRST#(CLG)

PCI_PLTRST#

A A

PLTRST#

R532*0_4/S R532*0_4/S

PV: Change to short pad

+3V

3/26 DB change
Part reference.

1
2

BT_COMBO_EN#

3
56

3/26 DB change
Part reference.

USB_OC6#

1

USB_OC0#

2

USB_OC7#

3

USB_OC5#USB_OC2#

56

DGPU_HOLD_RST_N

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

BT_COMBO_EN#

BBS_BIT1
PCI_GNT3#

MPC_PWR_CTRL#
LCD_BK
DGPU_HOLD_RST_N

TP11TP11

PCI_PLTRST#

CLK_PCI_TPM_R
CLK_PCI_CARD_R

R280 22_4R280 22_4
R277 22_4R277 22_4

R284 22_4R284 22_4

CLK_PCI_FB_R
CLK_PCI_LPC_R
CLK_PCI_EC_R

PLTRST#

4

R533

R533
100K_4

100K_4

5

PCI_PME#

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

BE28

TP25

BC30

TP26

BE32

TP27

BJ32

TP28

BC28

TP29

BE30

TP30

BF32

TP31

BG32

TP32

AV26

TP33

BB26

TP34

AU28

TP35

AY30

TP36

AU26

TP37

AY26

TP38

AV28

TP39

AW30

TP40

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1# / GPIO50

C44

REQ2# / GPIO52

E40

REQ3# / GPIO54

D47

GNT1# / GPIO51

E42

GNT2# / GPIO53

F46

GNT3# / GPIO55

G42

PIRQE# / GPIO2

G40

PIRQF# / GPIO3

C42

PIRQG# / GPIO4

D44

PIRQH# / GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

CougarPoint_Rev_0p7

CougarPoint_Rev_0p7

fcbga989-intel-cougarpoint

fcbga989-intel-cougarpoint

AJ0QNJH0T08

AJ0QNJH0T08

IC CTRL(989P)COUGARPOINT QMVY TOP B/S

IC CTRL(989P)COUGARPOINT QMVY TOP B/S

SMBus/Pull-up(CLG)

2N7002K

2N7002K

MBCLK2[13,17,27]

MBDATA2[13,17,27]

SMB_PCH_DAT

SMB_PCH_CLK

3

Q49

Q49
2N7002K

2N7002K

+3V

3

2
2

RSVD

RSVD

PCI

PCI

(+3V)
(+3V)
(+3V)

(+3V)
(+3V)
(+3V)

(+3V)
(+3V)
(+3V)
(+3V)

1

Q24

Q24

+3V

1

Q26

Q26

2N7002K

2N7002K

R498 4.7K_4R498 4.7K_4
R499 4.7K_4R499 4.7K_4

Q50

Q50
2N7002K

2N7002K

4

3

Cougar Point-M (PCI-E,SMBUS,CLK)

AY7

NV_CE#0

AV7

NV_CE#1

AU3

NV_CE#2

NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11

NVRAM

NVRAM

NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15

USB

USB

(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)
(+3VS5)

NV_CE#3

NV_DQS0
NV_DQS1

NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9

NV_ALE
NV_CLE

NV_RCOMP

NV_RB#

NV_RE#_WRB0
NV_RE#_WRB1

NV_WE#_CK0
NV_WE#_CK1

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P

USBP10N

USBP10P

USBP11N

USBP11P

USBP12N

USBP12P

USBP13N

USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43

OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

BG4
AT10

BC8
AU2

AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6

AV5
AY1

AV10
AT8
AY5

BA2
AT12

BF3

C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32

C33

B33

A14
K20
B17
C16
L16
A16
D14
C14

NV_ALE
NV_CLE

USB_BIAS

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#

WLAN

LAN

NV_ALE [7]
NV_CLE [7]

USBP1- [26]
USBP1+ [26]
USBP2- [26]
USBP2+ [26]

USBP4- [26]
USBP4+ [26]

HM65 Port6 & Port7
are disable

USBP9- [20]
USBP9+ [20]
USBP10- [25]
USBP10+ [25]

USBP12- [21]
USBP12+ [21]

R598

R598

22.6/F_4

22.6/F_4

CLK_REQ/Strap Pin(CLG)

CLK_PCIE_REQ1#

SMB_ME1_CLK

3

R219 2.2K_4R219 2.2K_4

2
2

1

1

+3VS5

R233 2.2K_4R233 2.2K_4

SMB_ME1_DAT

3

SMB_RUN_DAT [12,13]

SMB_RUN_CLK [12,13]

4

http://www.vinafix.vn

CLK_PCIE_REQ2#

CLK_PCIE_REQ0#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#

CLK_PEGB_REQ#
CLK_PEGA_REQ#
CLK_PEGA_REQ#

CLK_BUF_BCLK_N
CLK_BUF_BCLK_P

CLK_BUF_PCIE_3GPLL#
CLK_BUF_PCIE_3GPLL
CLK_BUF_DREFCLK#
CLK_BUF_DREFCLK
CLK_BUF_DREFSSCLK#
CLK_BUF_DREFSSCLK
CLK_PCH_14M

CLOCK TERMINATION for FCIM

PCIE_RXN1[25]

PCIE_RXP1[25]
PCIE_TXN1[25]

PCIE_TXP1[25]

PCIE_RXN2_LAN[24]

PCIE_RXP2_LAN[24]
PCIE_TXN2_LAN[24]

PCIE_TXP2_LAN[24]

Left_USB
Right side

Right side

Webcam
Mini PCI-E Card - WLAN

Card Reaer

R521 10K_4R521 10K_4
R189 10K_4R189 10K_4

R545 10K_4R545 10K_4
R555 10K_4R555 10K_4
R214 10K_4R214 10K_4

R200 10K_4R200 10K_4
R182 *10K_4R182 *10K_4

Ra

R183 *10K_4R183 *10K_4

Rb

SG : Rb ; UMA : Ra

R592 10K_4R592 10K_4
R593 10K_4R593 10K_4

R236 10K_4R236 10K_4
R230 10K_4R230 10K_4
R247 10K_4R247 10K_4
R252 10K_4R252 10K_4
R205 10K_4R205 10K_4
R204 10K_4R204 10K_4
R279 10K_4R279 10K_4

+3VS5

C373 0.1U/10V_4C373 0.1U/10V_4
C372 0.1U/10V_4C372 0.1U/10V_4

C375 0.1U/10V_4C375 0.1U/10V_4

PCIE_TXN1_C
PCIE_TXP1_C

PCIE_TXN2_LAN_C
PCIE_TXP2_LAN_C

WLAN

LAN

BOARD_ID0[9]

TP29TP29
TP27TP27

INT_BT_COMBO_EN#[25]

PV: Change to TP3050

+3V

BOARD_ID2[9]

CLK_PCH_ITPN
CLK_PCH_ITPP

PCIE Clock

WLAN

PV: Change to short pad

PV: Change to short pad

3

CLK_PCH_SRC0N
CLK_PCH_SRC0P

CLK_PCIE_REQ0#

CLK_PCH_SRC2N
CLK_PCH_SRC2P

CLK_PCIE_REQ1#

CLK_PCIE_REQ2#

CLK_PCIE_REQ3#

CLK_PCIE_REQ4#

CLK_PCIEF#_R
CLK_PCIEF_R

CLK_PEGB_REQ#

TP21TP21
TP19TP19

CLK_PCIE_WLANN[25]

CLK_PCIE_WLANP[25]

PCIE_CLKREQ_WLAN#[25]

CLK_PCIE_LANN[24]

LAN

CLK_PCIE_LANP[24]

PCIE_CLKREQ_LAN#[24]

CLK_PCIE_VGA#[14]

GPU

CLK_PCIE_VGA[14]

PCIE_CLKREQ_VGA#[14]

PV: Change to short pad

U28B

U28B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

(+3VS5)

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

(+3V)

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

(+3V)

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

(+3VS5)

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

(+3VS5)

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

(+3VS5)

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

(+3VS5)

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

(+3VS5)

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

(+3VS5)

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

CougarPoint_Rev_0p7

CougarPoint_Rev_0p7

fcbga989-intel-cougarpoint

fcbga989-intel-cougarpoint

2

SMBUSController

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

PCI-E*

PCI-E*

CLOCKS

CLOCKS

AJ0QNJH0T08

AJ0QNJH0T08

IC CTRL(989P)COUGARPOINT QMVY TOP B/S

3/26 DB change Part reference.

RP5

RP5

1

0_4P2R_4

0_4P2R_4

3

3/26 DB change Part reference.

RP4

RP4

3

0_4P2R_4

0_4P2R_4

1

3/26 DB change Part reference.

RP3

RP3

2

0_4P2R_4

0_4P2R_4

4

IC CTRL(989P)COUGARPOINT QMVY TOP B/S

CLK_PCH_SRC0N

2

CLK_PCH_SRC0P

4

CLK_PCIE_REQ0#

R526*0_4/S R526*0_4/S

CLK_PCH_SRC2N

4

CLK_PCH_SRC2P

2

CLK_PCIE_REQ1#

R540*0_4/S R540*0_4/S

CLK_PCH_PEGAN

1

CLK_PCH_PEGAP

3

Remove for UMA only.

CLK_PEGA_REQ#

R167*0_4/S R167*0_4/S

2

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SML1CLK / GPIO58

SML1DATA / GPIO75

Link

Link

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N

CLKOUT_PEG_A_P

CLKOUT_DMI_N
CLKOUT_DMI_P

CLKOUT_DP_N
CLKOUT_DP_P

CLKIN_DMI_N
CLKIN_DMI_P

CLKIN_GND1_N
CLKIN_GND1_P

CLKIN_DOT_96N

CLKIN_DOT_96P

CLKIN_SATA_N

CLKIN_SATA_P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

FLEX CLOCKS

+3VS5[2,6,7,9,10,14,24,27,29,31,33,34,35,36]
+1.05V[6,7,10,31,33]

+3V[2,6,7,9,10,12,13,14,16,19,20,21,22,23,24,25,26,27,31,32,35,36]

(+3VS5)

SMBCLK

SMBDATA

(+3VS5)

SML0CLK

SML0DATA

(+3VS5)
(+3VS5)

(+3VS5)

CL_CLK1

CL_DATA1

CL_RST1#

(+3VS5)

XTAL25_IN

(+3V)
(+3V)

(+3V)
(+3V)

1

SMBALERT#

E12

SMB_PCH_CLK

H14

SMB_PCH_DAT

C9

DRAMRST_CNTRL_PCH

A12

SMB_ME0_CLK

C8

SMB_ME0_DAT

G12

SML1ALERT#_R

C13

SMB_ME1_CLK

E14

SMB_ME1_DAT

M16

CL_CLK_R

M7

CL_DAT_R

T11

CL_RST#_R

P10

CLK_PEGA_REQ#

M10

CLK_PCH_PEGAN

AB37

CLK_PCH_PEGAP

AB38

AV22
AU22

AM12
AM13

CLK_BUF_PCIE_3GPLL#

BF18

CLK_BUF_PCIE_3GPLL

BE18

CLK_BUF_BCLK_N

BJ30

CLK_BUF_BCLK_P

BG30

CLK_BUF_DREFCLK#

G24

CLK_BUF_DREFCLK

E24

CLK_BUF_DREFSSCLK#

AK7

CLK_BUF_DREFSSCLK

AK5

CLK_PCH_14M

K45

CLK_PCI_FB

H45

XTAL25_IN

V47

XTAL25_OUT

V49

XCLK_RCOMP

Y47

CLK_FLEX0

K43

CLK_FLEX1

F47

CLK_FLEX2

H47

CLK_FLEX3

K49

SMBus/Pull-up(CLG)

+3VS5

R208 1K_4R208 1K_4
R217 10K_4R217 10K_4

R227 2.2K_4R227 2.2K_4
R203 2.2K_4R203 2.2K_4
R552 2.2K_4R552 2.2K_4
R220 2.2K_4R220 2.2K_4
R224 10K_4R224 10K_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

NB5

NB5

NB5

Date: Sheet of

Friday, November 26, 2010

Date: Sheet of

Friday, November 26, 2010

Date: Sheet of

Friday, November 26, 2010

PV: Change to TP3050

3/26 DB del external
clock generator.

DV2: Change to 27pF

21

R616

R616
1M_4

1M_4

R286 90.9/F_4R286 90.9/F_4

R281 22_4R281 22_4

Ra

TP57TP57
TP32TP32

Rb

TP58TP58

Remove Ra, Rb for UMA & SG.
27MHz support DIS only.

DRAMRST_CNTRL_PCH
SMBALERT#

SMB_PCH_CLK
SMB_PCH_DAT
SMB_ME0_CLK
SMB_ME0_DAT
SML1ALERT#_R

PROJECT : QLC

PROJECT : QLC

PROJECT : QLC

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Arrandale+VGA

Arrandale+VGA

Arrandale+VGA

PCH 3/6 (PCIE/USB/CLK)

PCH 3/6 (PCIE/USB/CLK)

PCH 3/6 (PCIE/USB/CLK)

1

08

DRAMRST_CNTRL_PCH [2]

TP18TP18

TP15TP15

TP16TP16

TP20TP20

GPU

CLK_CPU_BCLKN [2]
CLK_CPU_BCLKP [2]

CLK_DPLL_SSCLKN [2]
CLK_DPLL_SSCLKP [2]

C648

C648

27P/50V_4

27P/50V_4

Y5
25MHZY525MHZ

C649

C649

27P/50V_4

27P/50V_4

+1.05V

CLK_48M_CR [21]

DV2: Removed 27MHz

8 36

8 36

8 36

1A

1A

1A

5

Cougar Point (GPIO,VSS_NCTF,RSVD)

Cougar Point (GPIO,VSS_NCTF,RSVD)

Cougar Point (GPIO,VSS_NCTF,RSVD)Cougar Point (GPIO,VSS_NCTF,RSVD)

U28F

Bios swap GPIO 4/23.

S_GPIO GPIO68

SIO_EXT_SMI#[27]
SIO_EXT_SCI#[27]

D D

Reserve

DGPU_PWROK[14,16,27]

Bios swap GPIO 4/23.

DGPU_HOLD_RST#[14,27]

PLL_ODVR_EN[7]

DGPU_PWR_EN[27,31]

C C

TP26TP26

ICC_EN#[7]

RF_OFF#[25]

ODD_PRSNT#[25]

R535

R535
*10K_4

*10K_4

R187 0_4R187 0_4

4/29 modify

R536 *0_4R536 *0_4

R272 0_4R272 0_4

R163 0_4R163 0_4

R553 0_4R553 0_4

R558 0_4R558 0_4

SIO_EXT_SMI#
SIO_EXT_SCI#
BT_OFF#
ICC_EN#
LAN_DISABLE#_R
RF_OFF#

ODD_PRSNT#_R

BIOS_REC
BOARD_ID5
GPIO27
PLL_ODVR_EN_R
BOARD_ID3
BOARD_ID4

DGPU_PWR_EN_R

FDI_OVRVLTG
MFG_MODE
DGPU_PRSNT#
TEST_SET_UP
SATA5GP
SV_DET

7/21:Remove ESATA

OPTIMUS POWER control pin
DGPU_PWROK
DGPU_HOLD_RST#
DGPU_PWR_EN

B B

GPIO17
GPIO24
GPIO36

U28F

T7

BMBUSY# / GPIO0

(+3V)

A42

TACH1 / GPIO1

(+3V)

H36

TACH2 / GPIO6

(+3V)

E38

TACH3 / GPIO7

(+3V)

C10

GPIO8

(+3VS5)

C4

LAN_PHY_PWR_CTRL / GPIO12

(+3VS5)

G2

GPIO15

(+3VS5)

U2

SATA4GP / GPIO16

(+3V)

D40

TACH0 / GPIO17

(+3V)

T5

SCLOCK / GPIO22

(+3V)

E8

GPIO24 / MEM_LED

(+3VS5)

E16

GPIO27

(DSW)

P8

GPIO28

(+3VS5)

K1

STP_PCI# / GPIO34

(+3V)

K4

GPIO35

(+3V)

V8

SATA2GP / GPIO36

(+3V)

M5

SATA3GP / GPIO37

(+3V)

N2

SLOAD / GPIO38

(+3V)

M3

SDATAOUT0 / GPIO39

(+3V)

V13

SDATAOUT1 / GPIO48

(+3V)

V3

SATA5GP / GPIO49

(+3V)

D6

GPIO57

(+3VS5)

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

CougarPoint_Rev_0p7

CougarPoint_Rev_0p7

fcbga989-intel-cougarpoint

fcbga989-intel-cougarpoint

AJ0QNJH0T08

AJ0QNJH0T08

BOARD ID SETTING

LG

ID0Board ID

0=LG
1-CB

ID3 ID4

ID1 ID2

UMA/Dis.

15.6"/ 14"

A A

0=QLH/TWH
1=QLC/SWH

MDC

0=NO

Dobly

1=YES

Optiums

5

ID5

4

TACH4 / GPIO68
TACH5 / GPIO69
TACH6 / GPIO70
TACH7 / GPIO71

PROCPWRGD

NCTF

NCTF

CPU/MISC

CPU/MISC

VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32

THRMTRIP#

GPIO

GPIO

IC CTRL(989P)COUGARPOINT QMVY TOP B/S

IC CTRL(989P)COUGARPOINT QMVY TOP B/S

ID6

RD0

R563 10K_4R563 10K_4

RD1

R164 10K_4R164 10K_4

RD2
RD3

R543 *10K_4R543 *10K_4

RD4

R544 10K_4R544 10K_4

RD5

R551 *10K_4R551 *10K_4

4

C40

(+3V)
(+3V)
(+3V)

GPIO69

B41

TACH0

C41

GPIO71

A40

(+3V)

P4

A20GATE

AU16

PECI

RCIN#

INIT3_3V#

NC_1
NC_2
NC_3
NC_4
NC_5

P5
AY11
AY10
T14

AH8
AK11
AH10
AK10
P37

EC_RCIN#

PCH_THRMTRIP#

R221 0_4R221 0_4

DG rev0.9 suggest to TS_VSS connect to GND 4/23.

BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49

BOARD_ID0

BOARD_ID1

BOARD_ID2

BOARD_ID3

BOARD_ID4

BOARD_ID5

BOARD_ID0
BOARD_ID2

R560 *10K_4R560 *10K_4

R181 *10K_4R181 *10K_4

R216 10K_4R216 10K_4R210 *10K_4R210 *10K_4

R524 10K_4R524 10K_4

R525 *10K_4R525 *10K_4

R554 10K_4R554 10K_4

BOARD_ID0[8]
BOARD_ID2[8]

DV2: Change ID2 setting

3

5/11 stuff R9144

R271 *10K_4R271 *10K_4
R610 1.5K/F_4R610 1.5K/F_4

R611 *1.5K/F_4R611 *1.5K/F_4

TP55TP55
TP56TP56

R226 390_4R226 390_4

DV2: Removed board ID1

RU0
RU1

RU2
RU3
RU4
RU5

3

DV2: Add RF power on/off control

RF_POWER_OFF [25]

+3V

+3V

EC_A20GATE [27]

EC_RCIN# [27]
H_PWRGOOD [2]
PM_THRMTRIP# [2,27]

R171 *0_4R171 *0_4

SV_SET_UP
High = Strong (Default)

7/27: BIOS swap GPIO

DMI TERMINATION
VOLTAGE OVERRIDE

+3VS5

+3V

+3VS5

R541 *100K_4R541 *100K_4

2

MFG-TEST

MFG_MODE

Bios swap GPIO 4/23.

S_GPIO

RF_OFF#

Intel ME Crypto Transport Layer
Security (TLS) cipher suite

Low = Disable (Default)
High = Enable

TEST_SET_UP

R520 10K_4R520 10K_4
R539 *0_4R539 *0_4

R157 10K_4R157 10K_4
R172 *0_4R172 *0_4

R529 1K_4R529 1K_4

R186 10K_4R186 10K_4 R179 *10K_4R179 *10K_4

DV2: Unstuff

Low = Tx, Rx terminated to
same voltage (DC Coupling Mode)
(DEFAULT)

GFX Present

OPT
Ra
Rb

RaRb

R522 10K_4R522 10K_4

UMA
Rb
Ra

2

DGPU_PRSNT#

Stuff
NC

1

09

+3V

+3V

+3VS5

+3V

+3V +3V

+3V

GPIO Pull-up/Pull-down(CLG)

LAN_DISABLE#_R

SIO_EXT_SCI#
SIO_EXT_SMI#
BT_OFF#
EC_A20GATE
EC_RCIN#
SATA5GP
TACH0
GPIO71
ODD_PRSNT#_R
DGPU_PWROK

DGPU_PWROK
GPIO27

R170 *0_4R170 *0_4

BIOS RECOVERY High = Disable (Default)

R162 100K_4R162 100K_4

R168 100K_4R168 100K_4R158 *200K/F_4R158 *200K/F_4

FDI TERMINATION
VOLTAGE OVERRIDE

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

NB5

NB5

NB5

Date: Sheet of

Date: Sheet of

Date: Sheet of

R546 10K_4R546 10K_4

R262 10K_4R262 10K_4
R612 10K_4R612 10K_4
R270 10K_4R270 10K_4
R155 10K_4R155 10K_4
R154 10K_4R154 10K_4
R502 10K_4R502 10K_4
R609 1.5K/F_4R609 1.5K/F_4
R605 1.5K/F_4R605 1.5K/F_4
R517 10K_4R517 10K_4
R269 *10K_4R269 *10K_4

R276 *10K_4R276 *10K_4
R232 10K_4R232 10K_4

4/29 modify

BIOS_REC

R156 10K_4R156 10K_4

Low = Enable

SV_DET

TEST DETECT
Low = Default

FDI_OVRVLTGDGPU_PWR_EN_R

PROJECT : QLC

PROJECT : QLC

PROJECT : QLC

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PCH 4/6 (GPIO/MISC)

PCH 4/6 (GPIO/MISC)

PCH 4/6 (GPIO/MISC)

Friday, November 26, 2010

Friday, November 26, 2010

Friday, November 26, 2010

R153 *1K_4R153 *1K_4

LOW - Tx, Rx terminated
to same voltage

Arrandale+VGA

Arrandale+VGA

Arrandale+VGA

1

+3VS5

+3V

DV2: Unstuff

9 36

9 36

9 36

+3V

+3V

+3V[2,6,7,8,10,12,13,14,16,19,20,21,22,23,24,25,26,27,31,32,35,36]

+3VS5[2,6,7,8,10,14,24,27,29,31,33,34,35,36]

1A

1A

1A

http://www.vinafix.vn

5

4

3

2

1

Cougar Point-M (POWER)

COUGAR POINT (POWER)

U28G

U28G

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

VccAFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

CougarPoint_Rev_0p7

CougarPoint_Rev_0p7

fcbga989-intel-cougarpoint

fcbga989-intel-cougarpoint

AJ0QNJH0T08

AJ0QNJH0T08

IC CTRL(989P)COUGARPOINT QMVY TOP B/S

IC CTRL(989P)COUGARPOINT QMVY TOP B/S

C410 1U/6.3V_4C410 1U/6.3V_4

+

+

C419 *220U/2.5V_3528

C419 *220U/2.5V_3528

C409 1U/6.3V_4C409 1U/6.3V_4

+

+

C418 *220U/2.5V_3528

C418 *220U/2.5V_3528

C404 1U/6.3V_4C404 1U/6.3V_4

L20

L20
10uH/100mA_8

10uH/100mA_8

C411 10U/6.3VS_6C411 10U/6.3VS_6

2

CRTLVDS

CRTLVDS

VCC CORE

VCC CORE

VCCIO

VCCIO

DMI

DMI

NAND / SPI HVCMOS

NAND / SPI HVCMOS

FDI

FDI

DV2: Unstuff

DV2: Unstuff

VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]

VCCADAC

VSSADAC

VCCALVDS
VSSALVDS

VCC3_3[6]
VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCCLKDMI

VCCPNAND[1]

VCCPNAND[2]

VCCPNAND[3]

VCCPNAND[4]

VCCSPI

NB5

NB5

NB5

1mA (10mils)

U48

U47

1mA (10mils)

AK36
AK37

AM37
AM38
AP36
AP37

SG & UMA : Ra
DIS : Rb

V33
V34

+VCCA_DAC_1_2

PV: Change to 1.5uH

L21

L21

1.5uH

1.5uH

C402 0.1U/10V_4C402 0.1U/10V_4
C406 0.01U/25V_4C406 0.01U/25V_4
R312 *0_6R312 *0_6

+VCCALVDS +3V

Ra

R599 0_4R599 0_4

Rb

R597 *0_4R597 *0_4

60mA (10mils)

R602 *0_6/SR602 *0_6/S

C643

C643

0.1U/10V_4

0.1U/10V_4

Ra

L22

L22

0.1uH/250mA_8

0.1uH/250mA_8

Rb

R319 *0_4R319 *0_4
C432 22U/6.3VS_8C432 22U/6.3VS_8
C422 0.01U/25V_4C422 0.01U/25V_4
C416 0.01U/25V_4C416 0.01U/25V_4

42mA (10mils)

+VCCAFDI_VRM

AT16
AT20

+1.1V_VCC_DMI_CCI

AB36

C408

C408

C414

C414

1U/6.3V_4

1U/6.3V_4

*10U/6.3V_6

*10U/6.3V_6

190 mA (15mils)

AG16

AG17

AJ16

AJ17

R218 *0_8/SR218 *0_8/S

C338

C338

0.1U/10V_4

0.1U/10V_4

20mA (10mils)

V1

+5V_PCH_VCC5REF

V5REF= 1mA

+5V_PCH_VCC5REFSUS

VCC5REFSUS=1mA

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

R515 *0_6/SR515 *0_6/S

C610

C610
1U/6.3V_4

1U/6.3V_4

R258 10_4R258 10_4
D12 RB500V-40D12 RB500V-40

C381

C381
1U/6.3V_4

1U/6.3V_4

R282 10_4R282 10_4
D13 RB500V-40D13 RB500V-40

C386

C386

0.1U/10V_4

0.1U/10V_4

PROJECT : QLC

PROJECT : QLC

PROJECT : QLC

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PCH 5/6 (POWER)

PCH 5/6 (POWER)

PCH 5/6 (POWER)

Friday, November 26, 2010 10 36

Friday, November 26, 2010 10 36

Friday, November 26, 2010 10 36

1

+3V

+5V[6,7,19,20,22,25,26,36]

+5VS5[20,26,29,30,31,32,33,34,35,36]

+3V[2,6,7,8,9,12,13,14,16,19,20,21,22,23,24,25,26,27,31,32,35,36]

+3VS5[2,6,7,8,9,14,24,27,29,31,33,34,35,36]

+1.05V+1.05V_VCCUSBCORE

119mA (20mils)

+3VS5

+1.05V

+3VS5

+3V

+1.05V

+1.05V

+1.05V

+1.5VSUS
+3VS5

+1.05V +1.05V_PCH_VCC

+1.05V +1.05V_VCCAPLL_EXP

+1.05V +1.05V_VCCIO

(Mobile 1.5V)

+1.5V_CPU

+1.05V

3

1.3 A (60mils)

R223

R223

0.002/F_1206

0.002/F_1206

+1.05V_PCH_VCCDPLL_EXP+1.05V

R244 *0_6/SR244 *0_6/S

L40

L40

*1uH/25mA_6

*1uH/25mA_6

R257

R257

0.002/F_1206

0.002/F_1206

C384

C384
10U/6.3VS_6

10U/6.3VS_6

R594 0_8R594 0_8

160mA (15mils)

R263 0_6R263 0_6
R260 *0_6R260 *0_6

+1.05V_VTT

+1.05V

L45

L45
10uH/100MA_8

10uH/100MA_8

+VCCAFDI_VRM

+1.05V

C345

C345
10U/6.3VS_6

10U/6.3VS_6

C357

C357

C365

C365

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4 C417 10U/6.3VS_6C417 10U/6.3VS_6

C362

C362
1U/6.3V_4

1U/6.3V_4

C628

C628
*10U/6.3V_6

*10U/6.3V_6

2.925 A (140mils)

C379

C380

C380

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

C361

C361

C366

C366

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

+3V_VCC_EXP+3V

C637

C637

0.1U/10V_4

0.1U/10V_4

+VCCAFDI_VRM
+1.05V_VCCAPLL_FDI

R202 *0_8R202 *0_8

R248 *0_8/SR248 *0_8/S

+1.05V_VCCDPLL_FDI

65mA (10mils)

+1.05V_VCCA_A_DPL

8mA (10mils)

L44

L44
10uH/100MA_8

10uH/100MA_8

+3V

R316 *0_6R316 *0_6
R318 1/F_4R318 1/F_4

+1.05V +VCC_DMI_CCI +1.1V_VCC_DMI_CCI

R622 *1/F_4R622 *1/F_4

R317 *0_4/SR317 *0_4/S

+1.05V_VCCA_B_DPL

20mA (10mils)

+3V_SUS_CLKF33
+3V_SUS_CLKF33_R

20mA (10mils)

L23

L23
*10uH/100mA_8

*10uH/100mA_8

U28J

R618 *0_8R618 *0_8

R229 *0_4R229 *0_4

+3V_DSW

+3VS5

D D

+1.05V

L42

L42

*10uH/100mA_8

*10uH/100mA_8

+1.05V

R250 *0_6/SR250 *0_6/S

+1.05V +1.05V_VCCEPW

R619

R619

0.002/F_1206

0.002/F_1206

C C

R534 *0_6/SR534 *0_6/S

+1.05V

R621 *0_6/SR621 *0_6/S

+1.05V

B B

R323 *0_6/SR323 *0_6/S

+1.05V

R241 *0_6R241 *0_6

+1.05V

+1.05V_VTT

V_PROC_IO=1mA
(10mils)

A A

+3V_RTC

VCCRTC<1mA
(10mils)

+1.05V

R235*0_4/S R235*0_4/S

C343

C343

0.1U/10V_4

0.1U/10V_4

+VCCAPLL_CPY_PCH

C634

C634
*10U/6.3V_6

*10U/6.3V_6

C364

C364
1U/6.3V_4

1U/6.3V_4

C613

C613

1U/6.3V_4

1U/6.3V_4

C650

C650

1U/6.3V_4

1U/6.3V_4

C421

C421

1U/6.3V_4

1U/6.3V_4

C339

C339

*1U/6.3V_4

*1U/6.3V_4

R564*0_4/S R564*0_4/S

C622

C622

4.7U/6.3V_6

4.7U/6.3V_6

C348

C348
1U/6.3V_4

1U/6.3V_4

5

C329

C329

*0.1U/10V_4

*0.1U/10V_4

DV2: un-stuff

1.01A (60mils)

C358

C358
1U/6.3V_4

1U/6.3V_4

C377

C377
22U/6.3VS_8

22U/6.3VS_8

+VCCACLK

+VCCPDSW

3mA (10mils)

PCH_VCCDSW

+3V_SUS_CLKF33

+VCCDPLL_CPY

+VCCSUS1

C353

C353
*1U/6.3V_4

*1U/6.3V_4

C363

C363
1U/6.3V_4

1U/6.3V_4

C376

C376
22U/6.3VS_8

22U/6.3VS_8 C379

+VCCRTCEXT

C331

C331

0.1U/10V_4

0.1U/10V_4

+VCCAFDI_VRM

160mA (20mils)

+1.05V_VCCA_A_DPL

65mA (10mils)

+1.05V_VCCA_B_DPL

8mA (10mils)

+VCCDIFFCLK
+VCCDIFFCLKN

55mA (10mils)

+V1.05V_SSCVCC

95mA (10mils)

+VCCSST

C333

C333

0.1U/10V_4

0.1U/10V_4

+V1.05M_VCCSUS
+VTT_VCCPCPU

C624

C624

C620

C620

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

C347

C347

C346

C346

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

U28J

AD49

VCCACLK

T16

VCCDSW3_3

V12

DCPSUSBYP

T38

VCC3_3[5]

BH23

VCCAPLLDMI2

AL29

VCCIO[14]

AL24

DCPSUS[3]

AA19

VCCASW[1]

AA21

VCCASW[2]

AA24

VCCASW[3]

AA26

VCCASW[4]

AA27

VCCASW[5]

AA29

VCCASW[6]

AA31

VCCASW[7]

AC26

VCCASW[8]

AC27

VCCASW[9]

AC29

VCCASW[10]

AC31

VCCASW[11]

AD29

VCCASW[12]

AD31

VCCASW[13]

W21

VCCASW[14]

W23

VCCASW[15]

W24

VCCASW[16]

W26

VCCASW[17]

W29

VCCASW[18]

W31

VCCASW[19]

W33

VCCASW[20]

N16

DCPRTC

Y49

VCCVRM[4]

BD47

VCCADPLLA

BF47

VCCADPLLB

AF17

VCCIO[7]

AF33

VCCDIFFCLKN[1]

AF34

VCCDIFFCLKN[2]

AG34

VCCDIFFCLKN[3]

AG33

VCCSSC

V16

DCPSST

T17

DCPSUS[1]

V19

DCPSUS[2]

BJ8

V_PROC_IO

A22

VCCRTC

CougarPoint_Rev_0p7

CougarPoint_Rev_0p7

fcbga989-intel-cougarpoint

fcbga989-intel-cougarpoint

AJ0QNJH0T08

AJ0QNJH0T08

IC CTRL(989P)COUGARPOINT QMVY TOP B/S

IC CTRL(989P)COUGARPOINT QMVY TOP B/S

+1.8V[4,7,33,36]

+1.5VSUS[2,4,12,13,30,31]

+1.05V_VTT[2,4,27,32,34,35]

+1.05V[6,7,8,31,33]

+1.5V_CPU[2,4,25]

+3V

R291 *0_8/SR291 *0_8/S

C370

C370
1U/6.3V_4

1U/6.3V_4

R243 *0_6/SR243 *0_6/S

C356

C356

0.1U/10V_4

0.1U/10V_4

R245 *0_6/SR245 *0_6/S

C359

C359

0.1U/10V_4

0.1U/10V_4

R253 *0_6/SR253 *0_6/S

C352 *1U/6.3V_4C352 *1U/6.3V_4

R237 *0_6/SR237 *0_6/S

C341

C341
1U/6.3V_4

1U/6.3V_4

R178 *0_6/SR178 *0_6/S

C315

C315

0.1U/10V_4

0.1U/10V_4

C371

C371

0.1U/10V_4

0.1U/10V_4

R176 *0_8/SR176 *0_8/S

C318

C318
1U/6.3V_4

1U/6.3V_4

L38

L38
*10uH/100mA_8

*10uH/100mA_8
C614

C614
*10U/6.3V_6

*10U/6.3V_6

R198 *0_6/SR198 *0_6/S

C319

C319
1U/6.3V_4

1U/6.3V_4

R256 *0_4R256 *0_4
R249 0_4R249 0_4

C368

C368
*1U/6.3V_4

*1U/6.3V_4

+3V_DSW[6,7]

+3V_RTC[6,7,27]

N26

VCCIO[29]

P26

VCCIO[30]

P28

VCCIO[31]

T27

VCCIO[32]

T29

VCCIO[33]

+3V_VCCPUSB

VCCIO[34]

V5REF_SUS

DCPSUS[4]

V5REF

VCC3_3[1]
VCC3_3[8]
VCC3_3[4]

VCC3_3[2]

VCCIO[5]
VCCIO[12]
VCCIO[13]

VCCIO[6]

VCCVRM[1]

VCCIO[2]

VCCIO[3]

VCCIO[4]

T23
T24
V23
V24

+3V_VCCAUBG

P24

+VCCAUPLL

T26

+5V_PCH_VCC5REFSUS

M26

+VCCA_USBSUS

AN23

+3V_VCCPSUS

AN24

+5V_PCH_VCC5REF

P34

N20
N22

119mA (15mils)

+3V_VCCPSUS

P20
P22

AA16

266mA (20mils)

+3V_VCCPCORE

W16
T34

AJ2

AF13
AH13
AH14
AF14

+V1.1LAN_VCCAPLL

AK1

+VCCAFDI_VRM

AF11

AC16

+1.05V_VCCIO1

AC17
AD17

1.01A (60mils)

+1.05V_VCCEPW

T21

V21

T19

P32

C317

C317

0.1U/10V_4

0.1U/10V_4

+V1.05S_SATA3

10mA (10mils)

+V3.3A_1.5A_HDA_IO

C369

C369

0.1U/10V_4

0.1U/10V_4

VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

VCCSUS3_3[1]

VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]

PCI/GPIO/LPCMISC

PCI/GPIO/LPCMISC

Clock and Miscellaneous

Clock and Miscellaneous

VCCAPLLSATA

SATA USB

SATA USB

VCCASW[22]

VCCASW[23]

CPURTC

CPURTC

VCCASW[21]

VCCSUSHDA

HDA

HDA

4

+3V+3V_VCC_GIO

+1.8V+VCCP_NAND

C342

C342
1U/6.3V_4

1U/6.3V_4

+3V+3V_VCCME_SPI

10

+3V

+1.8V+VCC_TX_LVDS

+1.05V_VTT+1.1V_VCC_DMI

R238*0_4/S R238*0_4/S

+5V
+3V

+5VS5
+3VS5

1A

1A

1A

http://www.vinafix.vn

5

4

3

2

1

IBEX PEAK-M (GND)

U28I

U28I

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

D D

C C

B B

A A

5

VSS[164]

B19

VSS[165]

B23

VSS[166]

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

CougarPoint_Rev_0p7

CougarPoint_Rev_0p7

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]

4

H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28

3

IBEX PEAK-M (GND)

U28H

U28H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

AA33

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD37

VSS[31]

AD38

VSS[32]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]

AD14

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

CougarPoint_Rev_0p7

CougarPoint_Rev_0p7

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]

VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28

11

PROJECT : QLC

PROJECT : QLC

PROJECT : QLC

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

PCH 6/6 (GND)

PCH 6/6 (GND)

NB5

NB5

NB5

2

PCH 6/6 (GND)

Date: Sheet of

Friday, November 26, 2010 11 36

Date: Sheet of

Friday, November 26, 2010 11 36

Date: Sheet of

Friday, November 26, 2010 11 36

1

1A

1A

1A

http://www.vinafix.vn

5

4

3

2

1

JDIM1A

M_A_A[15:0][3]

D D

M_A_BS#0[3]
M_A_BS#1[3]
M_A_BS#2[3]
M_A_CS#0[3]
M_A_CS#1[3]
M_A_CLKP0[3]
M_A_CLKN0[3]
M_A_CLKP1[3]
M_A_CLKN1[3]
M_A_CKE0[3]
M_A_CKE1[3]
M_A_CAS#[3]
M_A_RAS#[3]

R117 10K_4R117 10K_4
R118 10K_4R118 10K_4

C C

B B

M_A_WE#[3]

SMB_RUN_CLK[8,13]
SMB_RUN_DAT[8,13]

M_A_ODT0[3]
M_A_ODT1[3]

M_A_DQSP[7:0][3]

M_A_DQSN[7:0][3]

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

DIMM0_SA0
DIMM0_SA1
SMB_RUN_CLK
SMB_RUN_DAT

M_A_DM1

M_A_DM2

M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7

JDIM1A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

DDR3-DIMM0_H=5.2_RVS

DDR3-DIMM0_H=5.2_RVS

DDR-78279-001-RVS-204P

DDR-78279-001-RVS-204P

DGMK4000206

DGMK4000206

IC SOCKET DDRIII SO-DIMM(204P,H5.2,RVS)

IC SOCKET DDRIII SO-DIMM(204P,H5.2,RVS)

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46

(204P)

(204P)

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

M_A_DQ4

5

M_A_DQ5

7

M_A_DQ7

15

M_A_DQ6

17

M_A_DQ1

4

M_A_DQ0

6

M_A_DQ3

16

M_A_DQ2

18

M_A_DQ9

21

M_A_DQ8

23

M_A_DQ15

33

M_A_DQ10

35

M_A_DQ12

22

M_A_DQ13

24

M_A_DQ14

34

M_A_DQ11

36

M_A_DQ21

39

M_A_DQ16

41

M_A_DQ19

51

M_A_DQ18

53

M_A_DQ20

40

M_A_DQ17

42

M_A_DQ23

50

M_A_DQ22

52

M_A_DQ25

57

M_A_DQ24

59

M_A_DQ30

67

M_A_DQ26

69

M_A_DQ28

56

M_A_DQ29

58

M_A_DQ31

68

M_A_DQ27

70

M_A_DQ36

129

M_A_DQ37

131

M_A_DQ34

141

M_A_DQ38

143

M_A_DQ32

130

M_A_DQ33

132

M_A_DQ35

140

M_A_DQ39

142

M_A_DQ41

147

M_A_DQ45

149

M_A_DQ47

157

M_A_DQ46

159

M_A_DQ40

146

M_A_DQ44

148

M_A_DQ42

158

M_A_DQ43

160

M_A_DQ49

163

M_A_DQ48

165

M_A_DQ54

175

M_A_DQ55

177

M_A_DQ53

164

M_A_DQ52

166

M_A_DQ50

174

M_A_DQ51

176

M_A_DQ61

181

M_A_DQ60

183

M_A_DQ62

191

M_A_DQ63

193

M_A_DQ56

180

M_A_DQ57

182

M_A_DQ59

192

M_A_DQ58

194

M_A_DQ[63:0] [3]

+3V

PM_EXTTS#0[13]

PV: Change to short pad

SMDDR_VREF_DQ0_M3[5]

SMDDR_VREF_DQ0_M3

DDR3_DRAMRST#[2,13]

R32*0_6/S R32*0_6/S

R30 *0_6R30 *0_6

7/21: Remove M2 solution

+1.5VSUS

2.48A

+3V

R431 *10K_4R431 *10K_4

PM_EXTTS#0

+SMDDR_VREF_DQ0SMDDR_VREF_DQ0_M1
+SMDDR_VREF_DIMM

JDIM1B

JDIM1B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM0_H=5.2_RVS

DDR3-DIMM0_H=5.2_RVS

DDR-78279-001-RVS-204P

DDR-78279-001-RVS-204P

DGMK4000206

DGMK4000206

IC SOCKET DDRIII SO-DIMM(204P,H5.2,RVS)

IC SOCKET DDRIII SO-DIMM(204P,H5.2,RVS)

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

(204P)

(204P)

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

VTT1
VTT2

GND
GND

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

203
204

205
206

+0.75V_DDR_VTT

12

VREF DQ0 M2 Solution VREF DQ0 M1 SolutionPlace these Caps near So-Dimm0.

R85 *0_6R85 *0_6

+1.5VSUS

R89

R89
1K/F_4

1K/F_4

R90

R90
1K/F_4

1K/F_4

+1.5VSUS

DDR_VTTREF[4,13,30]

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

NB5

NB5

NB5

Date: Sheet of

Date: Sheet of

Date: Sheet of

R84 *0_6R84 *0_6

PROJECT : QLC

PROJECT : QLC

PROJECT : QLC

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Arrandale+VGA

Arrandale+VGA

Arrandale+VGA

DDR3 DIMM0-RVS (5.2H)

DDR3 DIMM0-RVS (5.2H)

DDR3 DIMM0-RVS (5.2H)

Friday, November 26, 2010

Friday, November 26, 2010

Friday, November 26, 2010

1

R79

R79
10K_4

10K_4

+SMDDR_VREF_DIMM

R76

R76

C143

C143

10K_4

10K_4

470P/50V_4

470P/50V_4

+3V[2,6,7,8,9,10,13,14,16,19,20,21,22,23,24,25,26,27,31,32,35,36]

+3VS5[2,6,7,8,9,10,14,24,27,29,31,33,34,35,36]

+1.5VSUS[2,4,10,13,30,31]

+0.75V_DDR_VTT[13,30,36]

12 36

12 36

12 36

1A

1A

1A

+1.5VSUS +0.75V_DDR_VTT

C99 1U/6.3V_4C99 1U/6.3V_4
C104 1U/6.3V_4C104 1U/6.3V_4
C94 1U/6.3V_4C94 1U/6.3V_4
C71 1U/6.3V_4C71 1U/6.3V_4
C60 10U/6.3VS_6C60 10U/6.3VS_6
C69 10U/6.3VS_6C69 10U/6.3VS_6
C95 10U/6.3VS_6C95 10U/6.3VS_6
C67 10U/6.3VS_6C67 10U/6.3VS_6
C116 10U/6.3VS_6C116 10U/6.3VS_6

A A

4/29: reserve M2 solution

7/21: Remove M2 solution

5

4

C101 10U/6.3VS_6C101 10U/6.3VS_6
C65 *10U/6.3V_6C65 *10U/6.3V_6
C86 10U/6.3V_8C86 10U/6.3V_8
C85 10U/6.3V_8C85 10U/6.3V_8

1 2

C586

C586

+

+

*390U/2.5V_6X5.8ESR10

*390U/2.5V_6X5.8ESR10

4/27: layout modify

+SMDDR_VREF_DIMM

+SMDDR_VREF_DQ0

3

C248 1U/6.3V_4C248 1U/6.3V_4
C251 1U/6.3V_4C251 1U/6.3V_4
C250 1U/6.3V_4C250 1U/6.3V_4
C249 1U/6.3V_4C249 1U/6.3V_4
C247 10U/6.3V_6C247 10U/6.3V_6
C253 *10U/6.3V_6C253 *10U/6.3V_6

C153 0.1U/10V_4C153 0.1U/10V_4
C154 2.2U/10V_6C154 2.2U/10V_6

C34 0.1U/10V_4C34 0.1U/10V_4
C36 2.2U/10V_6C36 2.2U/10V_6

+3V

C243 0.1U/10V_4C243 0.1U/10V_4
C242 2.2U/10V_6C242 2.2U/10V_6

DDR_VTTREF SMDDR_VREF_DQ0_M1

2

http://www.vinafix.vn