Quanta QD14XL07 Specification

QD14XL0701 Page

1

Prepared by: Date
HC Liu 5/19/2003

Formal

Quanta Display Inc.

SPECIFICATION

Specification for

TFT LCD Module
Model No.
QD14XL07 Rev.02

Doc No. QD14XL07-13
REV.: 13
Issue Date: 6/23/2004
Page: 29 pages
(Cover Page Included)

Customer’s Approval

Date

by By

Approved

QD14XL0701 Page

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These specification sheets are the proprietary product of Quanta Display Inc. (”QDI”) and
include materials protected under copyright of QDI. Do not reproduce or cause any third
party to reproduce them in any form or by any means, electronic or mechanical, for any
purpose, in whole or in part, without the express written permission of QDI.

The device listed in these technical literature sheets was designed and manufactured for
use in OA equipment.

In case of using the device for applications such as control and safety equipment for
transportation (aircraft, trains, automobiles, etc. ), rescue and security equipment and
various safety related equipment which require higher reliability and safety, take into
consideration that appropriate measures such as fail-safe functions and redundant system
design should be taken.

Do not use the device for equipment that requires an extreme level of reliability, such as
aerospace applications, telecommunication equipment (trunk lines), nuclear power control
equipment and medical or other equipment for life support.

QDI assumes no responsibility for any damage resulting from the use of the device which
does not comply with the instructions and the precautions specified in these technical
literature sheets.

Contact and consult with a QDI sales representative for any questions about this device.

QD14XL0701 Page

Doc. No. change from QD141X1LH07A to QD141X1LH07A0; Modify

10/23/2001

Page 3 299.5(W)x228.6(H)x5.5typ(D) change to 299.5(W) x228.6(H)x 5.5

D20SFYG (HONDA) Pin

), Checksum

3

Revision History

REV.

0 7/17/2001
1 8/24/2001

2 9/11/2001

3

4 1/23/2002

5 10/04/2002

Date ECN NO. Change Content

N/A Preliminary specification Initiate

N/A Rise/Fall time update, 5 points average 150 nits

N/A

N/A

N/A Update outline drawing

interface cable pin assignments

(D) 5.5 max
Page 6 WR-L16S-VF-1 (JAE) change to LVC­17~20 definition

Product ID Change QD141X1LH07 to QD14XL0701 Page 9

VIN=9V,VBB=5V:min 485 VIN=9V,VBB=5V:min 200 Max 300 Page
11 Brightness Control: eliminated block diagram and AC
Electrical characteristic Page15 Modified EDID data structure
Page 19 Optical Data:Wx=0.315±0.02 Wy=0.330

N/A

0.02 Ry=0.327±0.02 Bx=0.148±0.02 By=0.128±0.02

±0.02 Rx=0.595±

Luminance of

white:min 150 Typ:200 Color Gamunt:50% 5dW:1.25 13dW:1.53
Page23

≦

test:1.5G 30min/each axis 1.6G random

6 01/09/2003
7 01/20/2003
8 5/13/2003

9 5/23/2003
10 7/2/2003 N/A Update the LCD curent consumption spec.
11 11/21/2003

12 1/13/2004

13 6/23/2004

N/A Update EDID data for customer request.

N/A Update Data – Mass: 440g.
N/A Update EDID Code according to customer new spec.
N/A Add PPID “C1787” into EDID data and errors correction.

N/A Update PPID from C1787 to C4011 (EDID changed).

EDID Data Correction (Byte 17, “13” Replaced by “D”

N/A

Unchanged.

N/A EDID Update for Adding Ambit Inverter

Temperature cycle— Non Operating: -25? to +65?, Ramp

24?/min, Duration at Temp.=60min, Test cycles=50 Vibration

QD14XL0701 Page

1. Application
This specification applies to a color TFT-LCD module, QD14XL07.

2. Overview
This module is a color active matrix LCD module incorporating amorphous silicon TFT
(Thin Film Transistor). It is composed of a color TFT-LCD panel, driver ICs, control circuit
and power supply circuit and a backlight unit. Graphics and texts can be displayed on a
1024×3×768 dots panel with 262,144 colors by using LVDS (Low Voltage Differential
Signaling) to interface and supplying +3.3V DC supply voltage for TFT-LCD panel driving
and supply voltage for backlight.
The TFT-LCD panel used for this module has very high aperture ratio. A low-reflection and
higher-color-saturation type color filter is also used for this panel. Therefore, high­brightness and high-contrast image, which is suitable for the multimedia use, can be
obtained by using this module.

4

Optimum viewing direction is 6 o'clock.

[Features]

1) High aperture panel; high-brightness or low power consumption.

2) Brilliant and high contrast image.

3) Small footprint and thin shape.

4) Light weight.

5) 100% SPWG, style B

3. Mechanical Specifications
Parameter Specifications Unit

Display size 36 (14.1") Diagonal cm
Active area 285.7 (H)×214.3 (V) mm
Pixel format 1024 (H)×768 (V) Pixel
(1 pixel = R+G+B dots)
Pixel pitch 0.279 (H) × 0.279 (V) mm
Pixel configuration R,G,B vertical stripe
Display mode Normally white
Unit outline dimensions (typ.)*1 299(W)×228 (H)×5.2(D)

mm

5.5 Max
Mass (without inverter) Max: 440 g
Surface treatment Anti-glare and hard-coating 3H
Low reflection (~5%)

*1.Note: excluding backlight cables. Outline dimensions are shown in this specification.

QD14XL0701 Page

4. Input Terminals
4-1. TFT-LCD panel driving

CN1 (1 channel, LVDS signals – NSC/Ti standard and +3.3V DC power supply)

Using connector: FI-XB30Sx-HFxx/FI-X30Sx-HFxx/equivalent (JAE)

Corresponding connector: TBD
Interface Cable Pin Assignments
PIN NO . SYMBOL FUNCTION
1 VSS Ground
2 VDD Power Supply, 3.3 V (typical)
3 VDD Power Supply, 3.3 V (typical)
4 V EEDID DDC 3.3V power
5 NC Reserved for supplier test point
6 Clk EEDID DDC Clock
7 DATA EEDID DDC Data
8 Rin0- - LVDS differential data input (R0-R5, G0) (odd pixels)

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9 Rin0+ + LVDS differential data input (R0-R5, G0) (odd pixels)
10 VSS Ground
11 Odd_Rin1- - LVDS differential data input (G1-G5, B0-B1) (odd pixels)
12 Rin1+ + LVDS differential data input (G1-G5, B0-B1) (odd pixels)
13 VSS Ground
14 Rin2- - LVDS differential data input (B2-B5, HS, VS, DE) (odd pixels)
15 Rin2+ + LVDS differential data input (B2-B5, HS, VS, DE) (odd pixels)
16 VSS Ground
17 ClkIN- - LVDS differential clock input (odd pixels)
18 ClkIN+ + LVDS differential clock input (odd pixels)
19 VSS Ground
20 NC No connect
21 NC No connect
22 NC No connect
23 NC No connect
24 NC No connect
25 NC No connect
26 NC No connect
27 NC No connect
28 NC No connect
29 NC No connect
30 NC No connect

Note 1?Relation between LVDS signals and actual data shows below section (4-2).

?

?Note 2?The shielding case is connected with signal GND.

4-2 Interface block diagram

TxIN18

TxIN19

TxIN20

Controller

DS90C*363

DS90CF364

R0~R5 B0~B5

ENAB

Internal circuits

CK

CLK

TxCLK IN

QD14XL0701 Page

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Using receiver:DS90CF364(National semiconductor) Corresponding Transmitter:DS90C363,DS90C383(National semiconductor

( Computer side)

(TFT-LCD side)

)

R0~ R5

G0~ G5

B0~ B5

Hsync
Vsync
ENAB

TxIN 0~ 5

6

6

TxIN 6~ 11

6

TxIN12~ 17

PLL

TTL PARALLEL-TO-LVDS

RXIN0+(6)
RXIN0-(5)
RXIN1+(9)
RXIN1-(8)
RXIN2+(12)
RXIN2-(11)

RXCLKIN+(1
RXCLKIN-

PLL

RxOUT0~ 5
RxOUT6~ 11
RxOUT12~ 17

RxOUT18

RxOUT19

LVDS-TO-PARALLEL TTL

RxOUT20

RxCLK OUT

6
6

G0~ G5

6

Hsync
Vsync

4-3. Backlight driving

amp

Power supply for lamp

CN2: BHSR-02VS-1(JST)
Mating connector: SM02B-BHSS-1-TB (JST) or 87210-0200

QD14XL0701 Page

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Pin No. Symbol

1

V

HIGH

Power supply for l

Function

(High voltage side)

2

V

LOW

(Low voltage side)
4-4. Inverter driving
Connector pin assignment:
CN3:(Inverter signals and Inverter Power Supply)
Using connector:LVC-D20SYFG(HONDA)
Corresponding connector: LVC-D20LVM-SG (HONDA)

Pin no. Symbol Function

1,2,3 INV SRC Input voltage

4 N.C No connect

5,8,11,13

GND Ground
6 5VSUS System +5V voltage(Inverter no use)
7 5VALW Dallas IC VCC Voltage
9 SDA Brightness control data signal(SMBUS DATA)

10 SCL Brightness control clock signal(SMBUS CLOCK)
12 FPVEE MPS IC Enable voltage
14 N.C. No connect
15 N.C. No connect
16 N.C. No connect
17 N.C. No connect
18 N.C. No connect
19 N.C. No connect
20 N.C. No connect

Inverter power supply

Base of Brightness

5. Absolute Maximum Ratings
5-1 LCD module

QD14XL0701 Page

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Parameter Symbol Condition
Input voltage
+3.3V supply voltage Vcc Ta=25
Storage temperature Tstg
Operating temperature (Ambient) Topa

VI

Ta=25

-

-

? ­?

Ratings Unit Remark

0.3 ~ Vcc+0.3

0 ~ + 4

-25 ~ +60
0 ~ +50

V
V
?
?

[Note1]

[Note2]

[Note1] LVDS signals
[Note2] Humidity:95%RH Max. at Ta?40?.
Maximum wet-bulb temperature at 39? or less at Ta>40?.
No condensation.
5-2. Inverter driving
5-2.1. Backlight lifetime
The backlight system is an edge-lighting type with single CCFT (Cold Cathode
Fluorescent Tube).
The lifetime of the lamp are shown in the following table.

Parameter Symbol

Min. Typ. Max. Unit Remark

Lamp life time LL 10000 - - Hour [Note]

[Note] Lamp life time is defined as the time when ? occurs in the continuous
operation under the condition of Ta = 25℃ and SDA data=00HEX

? Brightness becomes 50% of the original value under standard condition.

5.2.2 Recommended Operation Condition
Parameter Symbol Min. Typ Max Unit

Vin 9 - 21 V

voltage

VBB 4.85 5.0 5.2 V
control voltage
Brightness control IC

VBC 4.5 5.0 5.5 V
supply voltage
Logic signals SDA, SCL

0 5 V

FPVEE

QD14XL0701 Page

t1

0V

Off

5.2.3 DC Electrical Conditions Ta=25℃

9

Parameter Symbol

Condition Min. Typ Max Unit Remark

IVin VIN=9V,VBB=5V 485

VIN=21V,VBB=5V

Brightness control IC

IVbc VBC=4.5~5.5V - - 200 uA

supply current

Input voltage

Vil VBC=4.5~5.5V - -

SDA
SCL

low

Input voltage

Vih VBC=4.5~5.5V

High

Input voltage

FPVE

E

low

Vil

Input voltage

Vih

VIN=9~21V

VIN=9~21V

High

Note: Brightness control from minmum to maximum

5.2.4. Power ON/OFF sequence
9V≦Vin<21V

10ms≦td

- 585 VIN supply current

200

-

0.7×

- - V

VBC

0 - 0.6

3.0

- 5.0 V

Vin

FPVEE

300

0.3×
VBC

mA Note

V

V

8.0V

td

5.2.5 FPVEE ON sequence
Backlight power on/off is possible with FPVEE.
Make sure to have more than 50-millisecond interval between each power-on.

50ms≦t1
t2≦20ms

3.0V

FPVEE

On

0.6V

t2

5.2.6 The Condition of Shut Down
Please refer to the figure below for the conditions that will cause the inverter shut down.
If the Vin voltage is higher than 8.0V but there is no enable signal, then the inverter will
shut down.