How it Works
Quanta
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PF1
Schematic
41 pgs1.29 Mb0

Quanta PF1, P53, EasyNote SL45, EasyNote SL51, PF1Q Schematic

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5
4
3
2
1
PF1/2/PF1Q BLOCK DIAGRAM
DDRII-SODIMM1
D D
DDRII-SODIMM2
PG 8,9
PG 8,9
DDR II 667 MHZ
AMD S1g2
Griffin Processor
CPU_CLK NBGFX_CLK NBGPP_CLK SBLINK_CLK
CLOCK GENERATOR
ICS9LPRS476AKLFT SLG8SP628VTR
(638 S1g2 socket)
PG 4,5,6,7
LVDS
DVI
PG 18
MXM Module
C C
PG 20
LVDS
PG 19
CRT
PG 18
HDMI
PG 18
LVDS(2ch)
PCI-E X16
HT_LINK
RX781/RS780MC
21mm X 21mm, 528pin BGA
PG 10,11,12,13
PCI-E, 1X (port2)
PCI-E, 1X (port0)
USB2.0 (P3)
PCI-E, 1X (port1)
USB2.0 (P8)
PCI-E, 1X (port3)
USB2.0 (P10)
PCI-E, 1X (port4)
RTL8102EL(10/100)
Mini Card (WLAN)
Mini Card (TV)
NEW CARD
JMB380
PG 25
RJ45
A_LINK (X4)
SATA - HDD1
PG 26
SATA - HDD2
SATA0
SB700
SATA1
PG 26
SATA - ODD
B B
PG 26
E - SATA
PG 27
SATA2
SATA3
21mm X 21mm, 528pin BGA
4.5W(Ext)
4.3W(Int)
SBSRC_CLK
Azalia
USB2.0 (P2)
USB2.0 (P9)
CCD
Bluetooth
PG 27
PG 27
Flash
PG 14,15,16,17,18
PG 26
LPC
EC
A A
IT8512
PG 28
PORT-A
H.P/ JACK
PG 22
HOST 200MHz PCIE 100MHz USB 48MHz REF 14MHz
PG 3
PG 23PG 23
PG 24
PG 24
PG 24
Card Reader
4 IN 1
IEEE1394 CN.
USB2.0 (P7)
USB2.0 (P0)
USB2.0 (P1)
USB2.0 (P6)
Azalia Audio Codec
ALC272/ALC268
PORT-B
MIC JACK
PG 22
INT. MIC
PG 22
PG 25
PG 25
USB2.0 I/O Ports X1
(MB)
USB2.0 I/O Ports X1
(DB)
USB2.0 I/O Ports X1
(DB)
USB2.0 I/O Ports X1
PG 21
Speaker Amplifier G1441
INT. S.P.
PG 21
PG 21
PG 27
PG 27
PG 27
PG 27(DB)
WOOFER
PG 22
PCB STACK UP
LAYER 1 : TOP LAYER 2 : GND LAYER 3 : IN1 LAYER 4 : IN2 LAYER 5 : VCC LAYER 6 : BOT
Daughter Board
MMB Board
USB Board
Touch Pad board
Switch board
CPU_CORE1 CPU_CORE2
CPU VDDNB_CORE
NB_CORE
RVCC1.2 VCC1.2
1.8VSUS VCC1.8
SMDDR_VTERM
VCC1.5
1.1V_NB
3VPCU RVCC3 3VSUS VCC3 5VPCU 5VSUS VCC5
VCC2.5
CPU CORE NB CORE
(1.0~1.1V)
RVCC1.2
1.8VSUS SMDDR VTERM
3V/5V
01
SPI
PROJECT : PF1
FAN
Keyboard
PG 6
5
PG 29
4
Flash ROM
PG 28 PG 27
Touch Pad
CIR
PG 28
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
Date: Sheet
Date: Sheet
3
2
Date: Sheet
PROJECT : PF1
Quanta Computer Inc.
Quanta Computer Inc.
of
of
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1
2A
2A
2A
5
4
3
2
1
02
PF1 Power On Sequence
From AC,Battery VIN 5VPCU 3VPCU
D D
From Power Button
From PWM
From EC
SYS_HWPG(PCU)
NBSWON#
RVCC_ON
RVCC5 RVCC3
From EC From EC From SB
From SB to EC
From EC
RVCC1.2
RSMRST# DNBSWON# PCIE_WAKE# SUSB#,SUSC#
SUSON
>10ms
>100ms
SUSON
3VSUS 1.8VSUS SMDDR_VREF SMDDR_VTERM
From PWM
C C
From EC
From PWM From EC
HWPG_1.8V (SUS)
MAINON
MAINON
VCC5 VCC3 VCC2.5 VCC1.8 VCC1.5 NB_CORE 1.1V_NB
HWPG_1.5V,HWPG_2.5V,GFXPG(MAIN) HWPG_1.2_NB
VRON
CPU_CORE0, CPU_CORE1, CPU VDDNB_CORE, VCC1.2
From PWM
VRM_PWRGD (CPU) HWPG
From EC
From SB From SB From SB From SB
B B
ECPWROK SB_PWRGD NB_PWRGD
CPU_PWRGD/LDT_PG
PLTRST# PCIRST# CPU_LDT_RST# CPU_LDT_STOP#
0ns~30ns
99ms~108ms
Items Function BTO Name Description
UMA
1
Discrete VGA
2
Subwoofer
3
IEEE 1394
4
DVI-I
5
D-SUB(CRT)
6
HDMI
7
CIR
8
TV
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
BOM naming rule
v
v
v
v
v
v
v For PF1P and PF2P(M86)
IV@
EV@
WF@
EV@
EV@
IV@
EV@
CIR@
TV@
Internal VGA stuffv
External VGA stuff
Only for PF2P
External VGA model stuff
External VGA model stuff
Internal VGA model stuff
External VGA model stuff
For PF1P and PF2P(M86)
*Note: EC will sampling SUSB# & SUSC# every 5ms.
AMD SB700 SMBUS Table
CLK GEN RAM Mini Card (TV) Mini-card(WL) New Card HDMI
SB700 SDATA0/SCLK0(VCC3)
A A
SB700 SDATA1/SCLK1(3V_S5) SB700 SDATA2/SCLK2(3V_S5) Power Reserve MOS ckt
5
V
VCC3 VCC3 VCC3(Atheros) VCC3 RVCC3
VCC3
4
VVVV
V
VVVVV
V
EC775 SDATA1/SCLK1(3VPCU) EC775 SDATA2/SCLK2(3VPCU) EC775 SDATA3/SCLK3(3VPCU) EC775 SDATA4/SCLK4(3VPCU) Power Reserve MOS ckt
3
Battery CPU thermal Sensor EC EEPROM VGA thermal Sensor Touch Sensor
V
3VPCU VCC3 3VPCU VCC3
XX
EC SMBUS Table
VV
2
HDMI CEC
VVV
3VPCU 5VPCU
XV VV
PROJECT : PF1
PROJECT : PF1
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Quanta Computer Inc.
SYSTEM INFORMATION
SYSTEM INFORMATION
SYSTEM INFORMATION
1
2A
2A
240Wednesday, June 11, 2008
240Wednesday, June 11, 2008
240Wednesday, June 11, 2008
2A
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of
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5
4
3
2
1
CLK_GEN_SLG8SP628
VCC3 CLK_VDD VCC1.2 CLK_VDDIO
L29
L29
BK1608HS600
BK1608HS600
D D
22U/6.3V_8
22U/6.3V_8
L33
L33
BK1608HS600
BK1608HS600
10/25 modify it
C C
R189
R189
*10K_4
*10K_4
CLKREQ4#
R201
R201
*10K_4
*10K_4
CLKREQ2#
B:(10/25) Add WLAN & LAN CLKREQ circuit (BOI request)
B B
CLK_VDD
R202 8.2K_4R202 8.2K_4 R213 8.2K_4R213 8.2K_4
VCC3
1
VCC3
1
NEW_CLKREQ# CLK_PD#
*RHU002N06
*RHU002N06
2
*RHU002N06
*RHU002N06
2
Q16
Q16
3
Q17
Q17
3
New Card CLKREQ#
CLKREQ_LAN# (23)
CLKREQ_WLAN# (24)
RX781 RS780CLOCKS name
NBGFX_CLKP NBGFX_CLKN
MXM_REFCLKP MXM_REFCLKN
A A
NBGPP_CLKP NBGPP_CLKN
SBLINK_CLKP SBLINK_CLKN RP35 STUFF RP35 STUFF
RP30 STUFF
RP31 STUFF to M82-S external reference clock -RX780 only
RP30 STUFF
RP31 NC
RP32 STUFF RP32 NC
5
to NB for VGA reference clock
to NB for RX780 for PCIEX2 interface reference clock only RS780 is internal share with AC-LINK clock,RS780 not need
to NB for AC-LINK reference clock
C266
C266
CLK_VDD_USB
12
C310
C310
2.2U/6.3V_6
2.2U/6.3V_6
PCLK_SMB(7,8,14,24) PDAT_SMB(7,8,14,24)
NEW_CLKREQ#(24)
Clock pin function
C259
C259
0.1u/10V_4
0.1u/10V_4
C316 30PC316 30P
C315 30PC315 30P
C272
C272
0.1u/10V_4
0.1u/10V_4
CLK_VDDVCC3
CLK_VDDIO
T58T58
NEW_CLKREQ#
T85T85
C313
C313
0.1u/10V_4
0.1u/10V_4
CG_XIN CG_XOUT
CLK_PD#
CLKREQ2# CLKREQ4#
CG_XIN
21
Y3
Y3
14.318MHZ/20P
14.318MHZ/20P
CG_XOUT
4
C290
C296
C296
0.1u/10V_4
0.1u/10V_4
C307
C307
0.1u/10V_4
0.1u/10V_4
C312
C312
0.1u/10V_4
0.1u/10V_4
C290
0.1u/10V_4
0.1u/10V_4
C277
C277
0.1u/10V_4
0.1u/10V_4
ICS9LPRS480 P/N : ALPRS480000 SLG8SP628 RTM880N-796
U4
U4
4
VDDDOT
16
VDDSRC
26
VDDATIG
35
VDDSB_SRC
40
VDDSATA
48
VDDCPU
55
VDDHTT
56
VDDREF
63
VDD48
11
VDDSRC_IO0
17
VDDSRC_IO1
25
VDDATIG_IO
34
VDDSB_SRC_IO
47
VDDCPU_IO
1
GND48
7
GNDDOT
10
GNDSRC0
18
GNDSRC1
24
GNDATIG
33
GNDSB_SRC
43
GNDSATA
46
GNDCPU
52
GNDHTT
60
GNDREF
61
X1
62
X2
2
SMBCLK
3
SMBDAT
51
PD#
23
CLKREQ0#
45
CLKREQ1#
44
CLKREQ2#
39
CLKREQ3#
38
CLKREQ4#
SLG8SP628
SLG8SP628
P/N : AL8SP628000 P/N : AL000880000
CPUK8_0T
CPUK8_0C
ATIG0T ATIG0C ATIG1T ATIG1C
SB_SRC0T SB_SRC0C SB_SRC1T SB_SRC1C
SRC0T SRC0C SRC1T SRC1C SRC2T
QFN64
QFN64
TGND065TGND166TGND267TGND368TGND469TGND570TGND671TGND772TGND873TGND9
CLK_VDD
2/5 B modify
SRC2C SRC3T SRC3C SRC4T SRC4C
SRC6T/SATAT
SRC6C/SATAC
SRC7T/27M_SS
SRC7C/27M_NS
HTT0T/66M HTT0C/66M
48MHz_0
REF0/SEL_HTT66
REF1/SEL_SATA
REF2/SEL_27
74
10/17 Add 10p for EMI issue (Suggestion by Seligo)
R222
R222 *8.2K_4
*8.2K_4
R230
R230
R223
R223
8.2K_4
8.2K_4
8.2K_4
8.2K_4
Clock chip has internal serial terminations for differencial pairs, external resistors are reserved for debug purpose.
Place within 0.5" of CLKGEN
CPUCLKP_R
50
CPUCLKN_R
49
NBGFX_CLKP_R NBGFX_CLKP
30
NBGFX_CLKN_R
29
MXM_REFCLKP_R MXM_REFCLKP
28
MXM_REFCLKN_R
27
SBLINK_CLKP_R
37
SBLINK_CLKN_R
36
SBSRC_CLKP_R
32
SBSRC_CLKN_R
31
NBGPP_CLKP_R
22
NBGPP_CLKN_R
21
CLK_PCIE_NEW_R
20
CLK_PCIE_NEW#_R
19
CLK_PCIE_MINI_R
15
CLK_PCIE_MINI#_R
14
CLK_PCIE_MINI2_R
13
CLK_PCIE_MINI2#_R
12
CLK_PCIE_LAN_R
9
CLK_PCIE_LAN#_R
8
CLK_PCIE_JM380_R CLK_PCIE_JM380
42
CLK_PCIE_JM380#_R CLK_PCIE_JM380#
41 6 5
NBHT_REFCLKP_R NBHT_REFCLKP
54 53
CLK_48M_USB_R
64
SEL_HTT66
59
SEL_SATA
58 57
C321
C321 *10P_4
*10P_4
SEL_SATA SEL_HTT66 SEL_27
R231
R231
8.2K_4
8.2K_4
3
RP39 0X2RP39 0X2
1 3
RP30 0X2RP30 0X2
1 3
RP31 EV@0X2RP31 EV@0X2
1 3
RP35 0X2RP35 0X2
1 3
RP29 0X2RP29 0X2
1 3
RP32 EV@0X2RP32 EV@0X2
1 3
RP33 0X2RP33 0X2
1 3
RP34 0X2RP34 0X2
1 3
RP36 0X2RP36 0X2
1 3
RP37 0X2RP37 0X2
1 3
RP38 0X2RP38 0X2
1
T89T89 T91T91
3
RP40 0X2RP40 0X2
1 3
R207 33_4R207 33_4
Ra
R224 158/F_4R224 158/F_4 R225 90.9/F_4R225 90.9/F_4
C306
C306 *10P_4
*10P_4
Rb
RES CHIP 130 1/16W +-1%(0402)L-F -->CS11302FB15 RES CHIP 158 1/16W +-1%(0402) -->CS11582FB00 RES CHIP 90.9 1/16W +-1%(0402) -->CS09092FB15 RES CHIP 82.5 1/16W +-1%(0402) -->CS08252FB11
SEL_HTT66
SEL_SATA
SEL_27
* default
L30
L30
BK1608HS600
2 4
2 4 2 4
2 4 2 4
2 4 2 4 2 4 2 4 2 4
2 4
2 4
BK1608HS600
C267
C267
22U/6.3V_8
22U/6.3V_8
R221
R221
*261/F_4
*261/F_4
NBGFX_CLKN MXM_REFCLKN
SBLINK_CLKP SBLINK_CLKN SBSRC_CLKP SBSRC_CLKN
CLK_PCIE_NEW CLK_PCIE_NEW# CLK_PCIE_WLAN CLK_PCIE_WLAN# CLK_PCIE_MINICARD CLK_PCIE_MINICARD# CLK_PCIE_LAN CLK_PCIE_LAN#
NBHT_REFCLKNNBHT_REFCLKN_R
CLK_48M_USB
EXT_NB_OSCSEL_27
RS780RX780
1.8V
82.5RRa
130RRb
66 MHz 3.3V single ended HTT clock
1
100 MHz differential HTT clock
*0
100 MHz non-spreading differential SRC clock
1* 0
100 MHz spreading differential SRC clock 27MHz and 27M SS outputs
1 0*
100 MHz SRC clock
1.1V
158R
90.9R
C273
C273
0.1u/10V_4
0.1u/10V_4
CPUCLKP CPUCLKN
MXM_REFCLKP (20) MXM_REFCLKN (20)
SBLINK_CLKP (11) SBLINK_CLKN (11) SBSRC_CLKP (13) SBSRC_CLKN (13)
NBGPP_CLKP NBGPP_CLKN
CLK_PCIE_NEW (24) CLK_PCIE_NEW# (24) CLK_PCIE_WLAN (24) CLK_PCIE_WLAN# (24) CLK_PCIE_MINICARD (24) CLK_PCIE_MINICARD# (24) CLK_PCIE_LAN (23) CLK_PCIE_LAN# (23)
CLK_PCIE_JM380 (25) CLK_PCIE_JM380# (25)
NBHT_REFCLKP (11) NBHT_REFCLKN (11)
CLK_48M_USB (14)
EXT_NB_OSC (11)
2
C301
C301
0.1u/10V_4
0.1u/10V_4
C289
C289
C260
C260
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
CPUCLKP (4) CPUCLKN (4)
NBGFX_CLKP (11) NBGFX_CLKN (11)
To NB To SB
NBGPP_CLKP (11) NBGPP_CLKN (11)
To New Card To Mini PCIE Slot
To Mini PCIE Slot
To LAN Controller
To 4 in 1 Controller
To NB
To SB
To NB
C258
C258
0.1u/10V_4
0.1u/10V_4
To CPU
RS780/RX781 for VGA
To NB
11/4 check RX781
RX781 only
To NB
NB CLOCK INPUT TABLE
NB CLOCKS HT_REFCLKP HT_REFCLKN REFCLK_P REFCLK_N GFX_REFCLK GPP_REFCLK GPPSB_REFCLK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
RX781 RS780 100M DIFF 100M DIFF 14M SE (1.8V) NC vref 100M DIFF 100M DIFF 100M DIFF
CLOCK GENERATOR_SLG8SP628
CLOCK GENERATOR_SLG8SP628
CLOCK GENERATOR_SLG8SP628
100M DIFF 100M DIFF 14M SE (1.1V)
100M DIFF(IN/OUT)*
NC or 100M DIFF OUTPUT
100M DIFF
PROJECT : PF1
PROJECT : PF1
Quanta Computer Inc.
Quanta Computer Inc.
1
03
of
of
of
340Wednesday, June 11, 2008
340Wednesday, June 11, 2008
340Wednesday, June 11, 2008
1A
1A
1A
5
VCC2.5
VCC1.2 +1.2V_VLDT
R338 0_8R338 0_8 R339 0_8R339 0_8
D D
HT_NB_CPU_CAD_H[15..0](9) HT_NB_CPU_CAD_L[15..0](9) HT_NB_CPU_CLK_H[1..0](9) HT_NB_CPU_CLK_L[1..0](9) HT_NB_CPU_CTL_H[1..0](9) HT_NB_CPU_CTL_L[1..0](9) HT_CPU_NB_CAD_H[15..0](9) HT_CPU_NB_CAD_L[15..0](9) HT_CPU_NB_CLK_H[1..0](9) HT_CPU_NB_CLK_L[1..0](9)
C C
HT_CPU_NB_CTL_H[1..0](9) HT_CPU_NB_CTL_L[1..0](9)
FOX PZ63826-284R-41F DG0^8000004 IC SOCKET SMD 638P S1(P1.27,H3.2) MLX 47296-4131 DG0^8000003 IC SOCKET SMD 638P S1(P1.27,H3.2) TYC 4-1903401-2 DG0^8000005 IC SOCKET SMD 638P S1(P1.27,H3.2)
+1.2V_VLDT
HT_NB_CPU_CAD_H[15..0] HT_NB_CPU_CAD_L[15..0]
HT_NB_CPU_CLK_H[1..0]
HT_NB_CPU_CLK_L[1..0]
HT_NB_CPU_CTL_H[1..0]
HT_NB_CPU_CTL_L[1..0] HT_CPU_NB_CAD_H[15..0] HT_CPU_NB_CAD_L[15..0]
HT_CPU_NB_CLK_H[1..0]
HT_CPU_NB_CLK_L[1..0]
HT_CPU_NB_CTL_H[1..0]
HT_CPU_NB_CTL_L[1..0]
C447 4.7U/6.3V_6C447 4.7U/6.3V_6 C448 4.7U/6.3V_6C448 4.7U/6.3V_6 C461 0.22U/6.3V_4C461 0.22U/6.3V_4 C449 180P/50V_4C449 180P/50V_4
BLM21PG221SN1D(220,100M,2A)_8
BLM21PG221SN1D(220,100M,2A)_8
L18
L18
LS0805-100M-N
C193
C193
10U/6.3V_8
10U/6.3V_8
+1.2V_VLDT +1.2V_VLDT +1.2V_VLDT +1.2V_VLDT
HT_NB_CPU_CAD_H0 HT_NB_CPU_CAD_L0 HT_NB_CPU_CAD_H1 HT_NB_CPU_CAD_L1 HT_NB_CPU_CAD_H2 HT_NB_CPU_CAD_L2 HT_NB_CPU_CAD_H3 HT_NB_CPU_CAD_L3 HT_NB_CPU_CAD_H4 HT_NB_CPU_CAD_L4 HT_NB_CPU_CAD_H5 HT_NB_CPU_CAD_L5 HT_NB_CPU_CAD_H6 HT_NB_CPU_CAD_L6 HT_NB_CPU_CAD_H7 HT_NB_CPU_CAD_L7 HT_NB_CPU_CAD_H8 HT_NB_CPU_CAD_L8 HT_NB_CPU_CAD_H9 HT_NB_CPU_CAD_L9 HT_NB_CPU_CAD_H10 HT_NB_CPU_CAD_L10 HT_NB_CPU_CAD_H11 HT_NB_CPU_CAD_L11 HT_NB_CPU_CAD_H12 HT_NB_CPU_CAD_L12 HT_NB_CPU_CAD_H13 HT_NB_CPU_CAD_L13 HT_NB_CPU_CAD_H14 HT_NB_CPU_CAD_L14 HT_NB_CPU_CAD_H15 HT_NB_CPU_CAD_L15
HT_NB_CPU_CLK_H0 HT_NB_CPU_CLK_L0 HT_NB_CPU_CLK_H1 HT_NB_CPU_CLK_L1
HT_NB_CPU_CTL_H0 HT_NB_CPU_CTL_L0 HT_NB_CPU_CTL_H1 HT_NB_CPU_CTL_L1
U15A
U15A
D1
VLDT_A0
D2
VLDT_A1
D3
VLDT_A2
D4
VLDT_A3
E3
L0_CADIN_H0
E2
L0_CADIN_L0
E1
L0_CADIN_H1
F1
L0_CADIN_L1
G3
L0_CADIN_H2
G2
L0_CADIN_L2
G1
L0_CADIN_H3
H1
L0_CADIN_L3
J1
L0_CADIN_H4
K1
L0_CADIN_L4
L3
L0_CADIN_H5
L2
L0_CADIN_L5
L1
L0_CADIN_H6
M1
L0_CADIN_L6
N3
L0_CADIN_H7
N2
L0_CADIN_L7
E5
L0_CADIN_H8
F5
L0_CADIN_L8
F3
L0_CADIN_H9
F4
L0_CADIN_L9
G5
L0_CADIN_H10
H5
L0_CADIN_L10
H3
L0_CADIN_H11
H4
L0_CADIN_L11
K3
L0_CADIN_H12
K4
L0_CADIN_L12
L5
L0_CADIN_H13
M5
L0_CADIN_L13
M3
L0_CADIN_H14
M4
L0_CADIN_L14
N5
L0_CADIN_H15
P5
L0_CADIN_L15
J3
L0_CLKIN_H0
J2
L0_CLKIN_L0
J5
L0_CLKIN_H1
K5
L0_CLKIN_L1
N1
L0_CTLIN_H0
P1
L0_CTLIN_L0
P3
L0_CTLIN_H1
P4
L0_CTLIN_L1
SOCKET_638_PIN
SOCKET_638_PIN
4
HT LINK
HT LINK
+CPUVDDA
C195
C195
4.7U/6.3V_6
4.7U/6.3V_6
VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3
L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
3
W/S= 15 mil/20mil
C196
C196
C197
C197
3300P/50V_4
0.22U/6.3V_4
0.22U/6.3V_4
3300P/50V_4
+1.2V_VLDT
AE2
+1.2V_VLDT
AE3
+1.2V_VLDT CPU_SVC_R
AE4
+1.2V_VLDT
AE5
HT_CPU_NB_CAD_H0
AD1
HT_CPU_NB_CAD_L0
AC1
HT_CPU_NB_CAD_H1
AC2
HT_CPU_NB_CAD_L1
AC3
HT_CPU_NB_CAD_H2
AB1
HT_CPU_NB_CAD_L2
AA1
HT_CPU_NB_CAD_H3
AA2
HT_CPU_NB_CAD_L3
AA3
HT_CPU_NB_CAD_H4
W2
HT_CPU_NB_CAD_L4
W3
HT_CPU_NB_CAD_H5
V1
HT_CPU_NB_CAD_L5
U1
HT_CPU_NB_CAD_H6
U2
HT_CPU_NB_CAD_L6
U3
HT_CPU_NB_CAD_H7
T1
HT_CPU_NB_CAD_L7
R1
HT_CPU_NB_CAD_H8
AD4
HT_CPU_NB_CAD_L8
AD3
HT_CPU_NB_CAD_H9
AD5
HT_CPU_NB_CAD_L9
AC5
HT_CPU_NB_CAD_H10
AB4
HT_CPU_NB_CAD_L10
AB3
HT_CPU_NB_CAD_H11
AB5
HT_CPU_NB_CAD_L11
AA5
HT_CPU_NB_CAD_H12
Y5
HT_CPU_NB_CAD_L12
W5
HT_CPU_NB_CAD_H13
V4
HT_CPU_NB_CAD_L13
V3
HT_CPU_NB_CAD_H14
V5
HT_CPU_NB_CAD_L14
U5
HT_CPU_NB_CAD_H15
T4
HT_CPU_NB_CAD_L15
T3
HT_CPU_NB_CLK_H0
Y1
HT_CPU_NB_CLK_L0
W1
HT_CPU_NB_CLK_H1
Y4
HT_CPU_NB_CLK_L1
Y3
HT_CPU_NB_CTL_H0
R2
HT_CPU_NB_CTL_L0
R3
HT_CPU_NB_CTL_H1
T5
HT_CPU_NB_CTL_L1
R5
CPUTEST23 CPUTEST12 CPUTEST14 CPUTEST15 CPUTEST18 CPUTEST19 CPUTEST20 CPUTEST21 CPUTEST22 CPUTEST24
CPU CLK
CPUCLKP(3) CPUCLKN(3)
Keep trace from resisor to CPU within 0.6" keep trace from caps to CPU within 1.2"
C4684.7U/6.3V_6 C4684.7U/6.3V_6 C4660.22U/6.3V_4 C4660.22U/6.3V_4 C467180P/50V_4 C467180P/50V_4
CPU_PWRGD
5/9 R297 ADD for PCB REV:F refer AMD CPU design guide
CPUCLKIN CPUCLKP
CPUCLKN
SideBand Temp sense I2C
C485
C485
0.1U/10V_4
0.1U/10V_4
11/28 AMD suggest, closed to CPU
R297 300_4R297 300_4 R51 *300_4R51 *300_4 R118 *300_4R118 *300_4 R80 *300_4R80 *300_4 R85 *300_4R85 *300_4 R119 *300_4R119 *300_4 R43 300_4R43 300_4 R52 300_4R52 300_4 R46 *300_4R46 *300_4 R45 300_4R45 300_4
CPUCLKP CPUCLKN
R111 169/F_4R111 169/F_4
C213 3900P/25V_4C213 3900P/25V_4 C214 3900P/25V_4C214 3900P/25V_4
CPU_LDT_RST#(11,13)
CPU_LDT_STOP#(11,13)
+1.2V_VLDT
CPU_VDD0_FB_H(33) CPU_VDD0_FB_L(33)
CPU_VDD1_FB_H(33) CPU_VDD1_FB_L(33)
5/9 R428,R423 ADD for PCB REV:F refer AMD CPU design guide
R428 300_4R428 300_4
1.8VSUS
1.8VSUS
R131 *300_4R131 *300_4 R69 *300_4R69 *300_4 R423 300_4R423 300_4
1.8VSUS
CPUCLKIN#
CPU_PWRGD(13)
CPU_SIC(6) CPU_SID(6)
CPU_ALERT(6)
R358 44.2/F_4R358 44.2/F_4 R355 44.2/F_4R355 44.2/F_4
R47
R47
*300_4
*300_4
R359 0_4R359 0_4
2
CPU_THERMDC CPU_THERMDA
CPU_LDT_RST# CPU_PWRGD CPU_LDT_REQ#_CPU
+CPUVDDA
W/S= 15 mil/20mil
+CPUVDDA +CPUVDDA
CPUCLKIN CPUCLKIN#
CPU_LDT_RST# CPU_PWRGD CPU_LDT_STOP# CPU_LDT_REQ#_CPU
CPU_SIC CPU_SID CPU_ALERT
CPU_HTREF0 CPU_HTREF1
place them to CPU within 1.5"
CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI
CPUTEST23
T6T6
CPUTEST18
T26T26
CPUTEST19
T28T28 T32T32
CPUTEST25H CPUTEST25L
CPUTEST21
T1T1
CPUTEST20
T2T2
CPUTEST24
T3T3
CPUTEST22
T5T5
CPUTEST12
T4T4
CPUTEST27
AE6
AB6 G10
AA9 AC9 AD9 AF9
AD7 H10
AB8 AF7 AE7 AE8 AC8 AF8
AA6
U15D
U15D
F8
VDDA1
F9
VDDA2
A9
CLKIN_H
A8
CLKIN_L
B7
RESET_L
A7
PWROK
F10
LDTSTOP_L
C6
LDTREQ_L
AF4
SIC
AF5
SID ALERT_L
R6
HT_REF0
P6
HT_REF1
F6
VDD0_FB_H
E6
VDD0_FB_L
Y6
VDD1_FB_H VDD1_FB_L
DBRDY TMS TCK TRST_L TDI
TEST23 TEST18
G9
TEST19
E9
TEST25_H
E8
TEST25_L TEST21
TEST20 TEST24 TEST22 TEST12 TEST27
C2
TEST9 TEST6
A3
RSVD1
A5
RSVD2
B3
RSVD3
B5
RSVD4
C1
RSVD5
SOCKET_638_PIN
SOCKET_638_PIN
R343 0_4R343 0_4 R341 0_4R341 0_4
THERMTRIP_L
PROCHOT_L
MEMHOT_L
THERMDC
THERMDA
VDDIO_FB_H VDDIO_FB_L
VDDNB_FB_H
VDDNB_FB_L
DBREQ_L
TEST28_H
TEST28_L
TEST29_H
TEST29_L
R362300_4 R362300_4 R371300_4 R371300_4 R373300_4 R373300_4
KEY1 KEY2
TEST17 TEST16 TEST15 TEST14
TEST7
TEST10
TEST8
RSVD10
RSVD9 RSVD8 RSVD7 RSVD6
SVC SVD
TDO
H_THERMDC (6) H_THERMDA (6)
VCC1.8
M11 W18
A6
CPU_SVD_R
A4
CPU_THERMTRIP_L#
AF6
CPU_PROCHOT_L#
AC7
CPU_MEMHOT_L#
AA8
CPU_THERMDC
W7
CPU_THERMDA
W8
VDDIO_FB_H
W9
VDDIO_FB_L
Y9 H6
G6
CPU_DBREQ#
E10
CPU_TDO
AE9
CPUTEST28H
J7
CPUTEST28L
H8
CPUTEST17
D7
CPUTEST16
E7
CPUTEST15
F7
CPUTEST14
C7 C3
K8 C4
CPUTEST29H
C9
CPUTEST29L
C8
H18 H19 AA7 D5 C5
1
CPU_VDDNB_FB_H (33) CPU_VDDNB_FB_L (33)
T23T23 T24T24
T39T39 T35T35 T40T40
T36T36 T37T37
04
VDDIO_FB_H (35)
VDDIO_FB_L (35)
CNTR_VREF
B B
A A
VCC3
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
R376 20K/F_4R376 20K/F_4
Q33 *BSS138_NL/SOT23Q33 *BSS138_NL/SOT23
1
R378 0_4R378 0_4
R41 10K/F_4R41 10K/F_4
R44 300_4R44 300_4
CPU_MEMHOT_L# CPU_MEMHOT#
R49 *10K/F_4R49 *10K/F_4
R50 300_4R50 300_4
CPU_PROCHOT_L#
C480 0.1U/10V_4C480 0.1U/10V_4
R368 34.8K/F_4R368 34.8K/F_4
CNTR_VREF
2
3
2
2
Q32
Q32
1 3
*MMBT3904
*MMBT3904
R333 0_4R333 0_4
5
CPU_LDT_REQ# (11)
Q8
Q8 MMBT3904
MMBT3904
13
CNTR_VREF (6)
CPU_LDT_RST#
CPU_PROCHOT# (13)
R365
R365 0_4
0_4
CPU_MEMHOT# (8,14)
1.8VSUS
1.8VSUS
R42 10K/F_4R42 10K/F_4
R48 300_4R48 300_4
CPU_THERMTRIP_L#
4
1
2
3
Q34
Q34 BSS138_NL/SOT23
BSS138_NL/SOT23
2
1 3
VCC3
Q9
Q9 MMBT3904
MMBT3904
R379
R379 1K/F_4
1K/F_4
CPU_LDT_RST_HTPA#CPU_LDT_REQ#_CPU
CPU_THERMTRIP# (14)
Serial VID
R135 *2.2K_4R135 *2.2K_4 R138 1K/F_4R138 1K/F_4
R304
R304 300_4
300_4
CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO
C29 *0.1U/10V_4C29 *0.1U/10V_4
R132 1K/F_4R132 1K/F_4 R372 0_4R372 0_4
R374 0_4R374 0_4 R370 0_4R370 0_4
R133 *220_4R133 *220_4 R139 *220_4R139 *220_4 R134 *220_4R134 *220_4
1.8VSUS
11 12 13 14 15 16 17 18 19 20 21 22 23 24
1.8VSUS
CPU_SVC_R CPU_SVD_R CPU_SVD CPU_PWRGD
HDT Connector
1.8VSUS
CPU_DBREQ#
3
CPU_SVC
CPU_PWRGD_SVID_REG
1 2 3 4 5 6 7 8 9 10
25
KEY
KEY
CN3 *HDT CONN
CN3 *HDT CONN
CPU_SVC (33) CPU_SVD (33) CPU_PWRGD_SVID_REG (33)
CPU_LDT_RST_HTPA#
2
VFIX MODE
VID Override Circuit
SVC SVD Voltage Output
00 0
1 0
1
11
PROJECT : PF1
PROJECT : PF1
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Quanta Computer Inc.
S1G2 HT,CTL I/F 1/3
S1G2 HT,CTL I/F 1/3
S1G2 HT,CTL I/F 1/3
1.4V
1.2V
1.0V
0.8V
of
of
of
440Wednesday, June 11, 2008
440Wednesday, June 11, 2008
440Wednesday, June 11, 2008
1
1A
1A
1A
A
B
C
D
E
SMDDR_VTERM SMDDR_VTERM
PLACE THEM CLOSE TO CPU WITHIN 1"
1.8VSUS
4 4
MEM_MA_ADD[0..15](7,8)
3 3
2 2
1 1
MEM_MA0_ODT0(7,8) MEM_MA0_ODT1(7,8)
MEM_MA0_CS#0(7,8) MEM_MA0_CS#1(7,8)
MEM_MA_CKE0(7,8) MEM_MA_CKE1(7,8)
MEM_MA_CLK1_P(7) MEM_MA_CLK1_N(7) MEM_MA_CLK7_P(7) MEM_MA_CLK7_N(7)
MEM_MA_BANK0(7,8) MEM_MA_BANK1(7,8) MEM_MA_BANK2(7,8)
MEM_MA_RAS#(7,8) MEM_MA_CAS#(7,8) MEM_MA_WE#(7,8)
R336 39.2/F_4R336 39.2/F_4 R337 39.2/F_4R337 39.2/F_4
T25T25
T14T14 T11T11
T10T10 T7T7
T20T20 T19T19
T12T12 T17T17
A
C441
C441
0.1U/10V_4
0.1U/10V_4
M_ZP M_ZN
MEM_MA_RESET#
MEM_MA1_ODT0 MEM_MA1_ODT1
CPU_MA1_CS_L0 CPU_MA1_CS_L1
CPU_MA_CLK_H5 CPU_MA_CLK_L5
CPU_MA_CLK_H4 CPU_MA_CLK_L4
MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15
MEM_MB_CLK7_P
MEM_MB_CLK7_N MEM_MB_CLK1_P
MEM_MB_CLK1_N
U15B
U15B
D10
VTT1
C10
VTT2
B10
VTT3
AD10
VTT4
AF10
MEMZP
AE10
MEMZN
H16
RSVD_M1
T19
MA0_ODT0
V22
MA0_ODT1
U21
MA1_ODT0
V19
MA1_ODT1
T20
MA0_CS_L0
U19
MA0_CS_L1
U20
MA1_CS_L0
V20
MA1_CS_L1
J22
MA_CKE0
J20
MA_CKE1
N19
MA_CLK_H5
N20
MA_CLK_L5
E16
MA_CLK_H1
F16
MA_CLK_L1
Y16
MA_CLK_H7
AA16
MA_CLK_L7
P19
MA_CLK_H4
P20
MA_CLK_L4
N21
MA_ADD0
M20
MA_ADD1
N22
MA_ADD2
M19
MA_ADD3
M22
MA_ADD4
L20
MA_ADD5
M24
MA_ADD6
L21
MA_ADD7
L19
MA_ADD8
K22
MA_ADD9
R21
MA_ADD10
L22
MA_ADD11
K20
MA_ADD12
V24
MA_ADD13
K24
MA_ADD14
K19
MA_ADD15
R20
MA_BANK0
R23
MA_BANK1
J21
MA_BANK2
R19
MA_RAS_L
T22
MA_CAS_L
T24
MA_WE_L
SOCKET_638_PIN
SOCKET_638_PIN
SMDDR_VTERM
C439
C439
4.7U/6.3V_6
4.7U/6.3V_6
SMDDR_VTERM
C477
C477
1000P/50V_4
1000P/50V_4
C443
C443
1.5P/50V_4
1.5P/50V_4
C471
C471
1.5P/50V_4
1.5P/50V_4
W10
MEM:CMD/CTRL/CLK
MEM:CMD/CTRL/CLK
VTT5 VTT6 VTT7 VTT8 VTT9
VTT_SENSE
MEMVREF
RSVD_M2
MB0_ODT0 MB0_ODT1 MB1_ODT0
MB0_CS_L0 MB0_CS_L1 MB1_CS_L0
MB_CKE0 MB_CKE1
MB_CLK_H5
MB_CLK_L5
MB_CLK_H1
MB_CLK_L1
MB_CLK_H7
MB_CLK_L7
MB_CLK_H4
MB_CLK_L4
MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8
MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15
MB_BANK0 MB_BANK1 MB_BANK2
MB_RAS_L MB_CAS_L
MB_WE_L
AC10 AB10 AA10 A10
CPU_VTT_SENSE
Y10
MEMVREF_CPU
W17
MEM_MB_RESET#
B18 W26
W23
MEM_MB1_ODT0
Y26 V26
W25 U22
J25 H26
CPU_MB_CLK_H5
P22
CPU_MB_CLK_HL5
R22 A17 A18 AF18 AF17
CPU_MB_CLK_H4
R26
CPU_MB_CLK_L4
R25 P24
N24 P26 N23 N26 L23 N25 L24 M26 K26 T26 L26 L25 W24 J23 J24
R24 U26 J26
U25 U24 U23
Place close to socket
C210
C210
4.7U/6.3V_6
4.7U/6.3V_6
C45
C45
1000P/50V_4
1000P/50V_4
Close to CPU within 1500 mils
C440
C440
4.7U/6.3V_6
4.7U/6.3V_6
C476
C476
1000P/50V_4
1000P/50V_4
B
MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15
C211
C211
4.7U/6.3V_6
4.7U/6.3V_6
C71
C71
1000P/50V_4
1000P/50V_4
MEM_MA_CLK7_P
MEM_MA_CLK7_N MEM_MA_CLK1_P
MEM_MA_CLK1_N
750 mA
CPU_VTT_SENSE (35)
T38T38
MEM_MB0_ODT0 (7,8) MEM_MB0_ODT1 (7,8)
T8T8
MEM_MB0_CS#0 (7,8) MEM_MB0_CS#1 (7,8)
T9T9
MEM_MB_CKE0 (7,8) MEM_MB_CKE1 (7,8)
T18T18 T13T13
MEM_MB_CLK1_P (7) MEM_MB_CLK1_N (7) MEM_MB_CLK7_P (7)
MEM_MB_CLK7_N (7)
T15T15 T16T16
MEM_MB_BANK0 (7,8)
MEM_MB_BANK1 (7,8)
MEM_MB_BANK2 (7,8)
MEM_MB_RAS# (7,8)
MEM_MB_CAS# (7,8)
MEM_MB_WE# (7,8)
C52
C52
0.22U/6.3V_4
0.22U/6.3V_4
C72
C72
180P/50V_4
180P/50V_4
1.8VSUS
C442
C442
0.1U/10V_4
0.1U/10V_4
1.5P/50V_4
1.5P/50V_4
1.5P/50V_4
1.5P/50V_4
R66
R66
2K/F_4
2K/F_4
R65
R65
2K/F_4
2K/F_4
MEM_MB_ADD[0..15] (7,8)
C205
C205
0.22U/6.3V_4
C66
C66
180P/50V_4
180P/50V_4
C444
C444
C472
C472
0.22U/6.3V_4
0.22U/6.3V_4
0.22U/6.3V_4
C475
C475
C206
C206
180P/50V_4
180P/50V_4
R67
R67 *0_4
*0_4
C58
C58
0.1U/10V_4
0.1U/10V_4
0.22U/6.3V_4
0.22U/6.3V_4
180P/50V_4
180P/50V_4
MEM_MB_DATA[0..63](7)
SMDDR_VREF (7,35)
Reserved
C53
C53
1000P/50V_4
1000P/50V_4
MEM_MB_DM[0..7](7)
C44
C44
C207
C207
C
Processor Memory Interface
U15C
U15C
MEM_MB_DATA0 MEM_MB_DATA1 MEM_MB_DATA2 MEM_MB_DATA3 MEM_MB_DATA4 MEM_MB_DATA5 MEM_MB_DATA6 MEM_MB_DATA7 MEM_MB_DATA8 MEM_MB_DATA9 MEM_MB_DATA10 MEM_MB_DATA11 MEM_MB_DATA12 MEM_MB_DATA13 MEM_MB_DATA14 MEM_MB_DATA15 MEM_MB_DATA16 MEM_MB_DATA17 MEM_MB_DATA18 MEM_MB_DATA19 MEM_MB_DATA20 MEM_MB_DATA21 MEM_MB_DATA22 MEM_MB_DATA23 MEM_MB_DATA24 MEM_MB_DATA25 MEM_MB_DATA26 MEM_MB_DATA27 MEM_MB_DATA28 MEM_MB_DATA29 MEM_MB_DATA30 MEM_MB_DATA31 MEM_MB_DATA32 MEM_MB_DATA33 MEM_MB_DATA34 MEM_MB_DATA35 MEM_MB_DATA36 MEM_MB_DATA37 MEM_MB_DATA38 MEM_MB_DATA39 MEM_MB_DATA40 MEM_MB_DATA41 MEM_MB_DATA42 MEM_MB_DATA43 MEM_MB_DATA44 MEM_MB_DATA45 MEM_MB_DATA46 MEM_MB_DATA47 MEM_MB_DATA48 MEM_MB_DATA49 MEM_MB_DATA50 MEM_MB_DATA51 MEM_MB_DATA52 MEM_MB_DATA53 MEM_MB_DATA54 MEM_MB_DATA55 MEM_MB_DATA56 MEM_MB_DATA57 MEM_MB_DATA58 MEM_MB_DATA59 MEM_MB_DATA60 MEM_MB_DATA61 MEM_MB_DATA62 MEM_MB_DATA63
MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7
MEM_MB_DQS0_P(7) MEM_MB_DQS0_N(7) MEM_MB_DQS1_P(7) MEM_MB_DQS1_N(7) MEM_MB_DQS2_P(7) MEM_MB_DQS2_N(7) MEM_MB_DQS3_P(7) MEM_MB_DQS3_N(7) MEM_MB_DQS4_P(7) MEM_MB_DQS4_N(7) MEM_MB_DQS5_P(7) MEM_MB_DQS5_N(7) MEM_MB_DQS6_P(7) MEM_MB_DQS6_N(7) MEM_MB_DQS7_P(7) MEM_MB_DQS7_N(7)
C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23
G24 AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11
Y11 AE14 AF14 AF11 AD11
A12
B16
A22
E25 AB26 AE22 AC16 AD12
C12
B12
D16
C16
A24
A23
F26
E26 AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12
SOCKET_638_PIN
SOCKET_638_PIN
MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63
MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7
MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7
D
MEM:DATA
MEM:DATA
MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8
MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63
MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7
MEM_MA_DATA0
G12
MEM_MA_DATA1
F12
MEM_MA_DATA2
H14
MEM_MA_DATA3
G14
MEM_MA_DATA4
H11
MEM_MA_DATA5
H12
MEM_MA_DATA6
C13
MEM_MA_DATA7
E13
MEM_MA_DATA8
H15
MEM_MA_DATA9
E15
MEM_MA_DATA10
E17
MEM_MA_DATA11
H17
MEM_MA_DATA12
E14
MEM_MA_DATA13
F14
MEM_MA_DATA14
C17
MEM_MA_DATA15
G17
MEM_MA_DATA16
G18
MEM_MA_DATA17
C19
MEM_MA_DATA18
D22
MEM_MA_DATA19
E20
MEM_MA_DATA20
E18
MEM_MA_DATA21
F18
MEM_MA_DATA22
B22
MEM_MA_DATA23
C23
MEM_MA_DATA24
F20
MEM_MA_DATA25
F22
MEM_MA_DATA26
H24
MEM_MA_DATA27
J19
MEM_MA_DATA28
E21
MEM_MA_DATA29
E22
MEM_MA_DATA30
H20
MEM_MA_DATA31
H22
MEM_MA_DATA32
Y24
MEM_MA_DATA33
AB24
MEM_MA_DATA34
AB22
MEM_MA_DATA35
AA21
MEM_MA_DATA36
W22
MEM_MA_DATA37
W21
MEM_MA_DATA38
Y22
MEM_MA_DATA39
AA22
MEM_MA_DATA40
Y20
MEM_MA_DATA41
AA20
MEM_MA_DATA42
AA18
MEM_MA_DATA43
AB18
MEM_MA_DATA44
AB21
MEM_MA_DATA45
AD21
MEM_MA_DATA46
AD19
MEM_MA_DATA47
Y18
MEM_MA_DATA48
AD17
MEM_MA_DATA49
W16
MEM_MA_DATA50
W14
MEM_MA_DATA51
Y14
MEM_MA_DATA52
Y17
MEM_MA_DATA53
AB17
MEM_MA_DATA54
AB15
MEM_MA_DATA55
AD15
MEM_MA_DATA56
AB13
MEM_MA_DATA57
AD13
MEM_MA_DATA58
Y12
MEM_MA_DATA59
W11
MEM_MA_DATA60
AB14
MEM_MA_DATA61
AA14
MEM_MA_DATA62
AB12
MEM_MA_DATA63
AA12
MEM_MA_DM0
E12
MEM_MA_DM1
C15
MEM_MA_DM2
E19
MEM_MA_DM3
F24
MEM_MA_DM4
AC24
MEM_MA_DM5
Y19
MEM_MA_DM6
AB16
MEM_MA_DM7
Y13 G13
H13 G16 G15 C22 C21 G22 G21 AD23 AC23 AB19 AB20 Y15 W15 W12 W13
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
S1G2 DDRII MEMORY I/F 2/3
S1G2 DDRII MEMORY I/F 2/3
S1G2 DDRII MEMORY I/F 2/3
MEM_MA_DATA[0..63] (7)
MEM_MA_DM[0..7] (7)
MEM_MA_DQS0_P (7) MEM_MA_DQS0_N (7) MEM_MA_DQS1_P (7) MEM_MA_DQS1_N (7) MEM_MA_DQS2_P (7) MEM_MA_DQS2_N (7) MEM_MA_DQS3_P (7) MEM_MA_DQS3_N (7) MEM_MA_DQS4_P (7) MEM_MA_DQS4_N (7) MEM_MA_DQS5_P (7) MEM_MA_DQS5_N (7) MEM_MA_DQS6_P (7) MEM_MA_DQS6_N (7) MEM_MA_DQS7_P (7) MEM_MA_DQS7_N (7)
PROJECT : PF1
PROJECT : PF1
Quanta Computer Inc.
Quanta Computer Inc.
E
05
540Wednesday, June 11, 2008
540Wednesday, June 11, 2008
540Wednesday, June 11, 2008
of
of
of
1A
1A
1A
5
U15E
U15E
G4
VDD0_1
H2
VDD0_2
J9
VDD0_3
J11
VDD0_4
J13
VDD0_5
D D
CPU VDDNB_CORE
3A
1.8VSUS
2A
C C
CNTR_VREF(4)
MBCLK(20,28,37)
MBDATA(20,28,37)
B B
MBCLK
MBDATA
THERM_ALERT#
J15
VDD0_6
K6
VDD0_7
K10
VDD0_8
K12
VDD0_9
K14
VDD0_10
L4
VDD0_11
L7
VDD0_12
L9
VDD0_13
L11
VDD0_14
L13
VDD0_15
L15
VDD0_16
M2
VDD0_17
M6
VDD0_18
M8
VDD0_19
M10
VDD0_20
N7
VDD0_21
N9
VDD0_22
N11
VDD0_23
K16
VDDNB_1
M16
VDDNB_2
P16
VDDNB_3
T16
VDDNB_4
V16
VDDNB_5
H25
VDDIO1
J17
VDDIO2
K18
VDDIO3
K21
VDDIO4
K23
VDDIO5
K25
VDDIO6
L17
VDDIO7
M18
VDDIO8
M21
VDDIO9
M23
VDDIO10
M25
VDDIO11
N17
VDDIO12
SOCKET_638_PIN
SOCKET_638_PIN
R55 *0_4R55 *0_4
R54 *0_4R54 *0_4
*BSS138_NL/SOT23
*BSS138_NL/SOT23
VDD1_1 VDD1_2 VDD1_3 VDD1_4 VDD1_5 VDD1_6 VDD1_7 VDD1_8
VDD1_9 VDD1_10 VDD1_11 VDD1_12 VDD1_13 VDD1_14 VDD1_15 VDD1_16 VDD1_17 VDD1_18 VDD1_19 VDD1_20 VDD1_21 VDD1_22 VDD1_23 VDD1_24 VDD1_25 VDD1_26
VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13
CPU_SIC
2
3
CPU_CORE1CPU_CORE0 CPU_CORE0
P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2
Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18
1.8VSUS
R59
Q10
Q10
R59 390_4
390_4
1
CPU_SID
CPU_ALERT
R58
R58 390_4
390_4
1.8VSUS
R61
R61 *1K/F_4
*1K/F_4
4
CPU_SIC (4)
CPU_SID (4)
CPU_ALERT (4)
AA4 AA11 AA13 AA15 AA17 AA19
AB2
AB7
AB9 AB23 AB25 AC11 AC13 AC15 AC17 AC19 AC21
AD6
AD8 AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23
B11
B13
B15
B17
B19
B21
B23
B25
D11
D13
D15
D17
D19
D21
D23
D25
H21
H23
B4 B6 B8 B9
D6 D8 D9
E4
F2 F11 F13 F15 F17 F19 F21 F23 F25
H7 H9
J4
U15F
U15F
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65
SOCKET_638_PIN
SOCKET_638_PIN
VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129
3
J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6
22U/6.3V_8
22U/6.3V_8
CPU_CORE1
CPU VDDNB_CORE
DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE
1.8VSUS
1.8VSUS
BOTTOM SIDE DECOUPLING
C147
C147
C114
C114
22U/6.3V_8
22U/6.3V_8
C82
C82
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
C106
C106
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
C463
C463
4.7U/6.3V_6
C64
C64
4.7U/6.3V_6
0.22U/6.3V_4
0.22U/6.3V_4
4.7U/6.3V_6
4.7U/6.3V_6
0.22U/6.3V_4
0.22U/6.3V_4
C59
C59
C120
C120
C84
C84
C57
C57
2
C137
C137
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
C123
C123
22U/6.3V_8
22U/6.3V_8
C60
C60
0.01U/16V_4
0.01U/16V_4
22U/6.3V_8
22U/6.3V_8
C121
C121
1.8VSUS
C56
C56
4.7U/6.3V_6
4.7U/6.3V_6
C138
C138
C92
C92
22U/6.3V_8
22U/6.3V_8
C83
C83 22U/6.3V_8
22U/6.3V_8
4.7U/6.3V_6
4.7U/6.3V_6
C63
C63
0.01U/16V_4
0.01U/16V_4
C132
C132
0.22U/6.3V_4
0.22U/6.3V_4
0.22U/6.3V_4
0.22U/6.3V_4
C108
C108
22U/6.3V_8
22U/6.3V_8
C462
C462
C65
C65
180P/50V_4
180P/50V_4
C74
C74
0.22U/6.3V_4
0.22U/6.3V_4
0.22U/6.3V_4
0.22U/6.3V_4
C61
C61
PROCESSOR POWER AND GROUND
C125
C125
0.01U/16V_4
0.01U/16V_4
C86
C86
0.01U/16V_4
0.01U/16V_4
C133
C133
C128
C128
180P/50V_4
180P/50V_4
C81
C81
180P/50V_4
180P/50V_4
C142
C142
0.22U/6.3V_4
0.22U/6.3V_4
C62
C62
0.22U/6.3V_4
0.22U/6.3V_4
1
C95
C95
0.01U/16V_4
0.01U/16V_4
C91
C91
180P/50V_4
180P/50V_4
06
C135
C135
180P/50V_4
180P/50V_4
VCC3
R335
R342
R342 10K_4
10K_4
8 7 6 5
R335 200_6
200_6
SMCLK SMDATA
-ALT GND
ADDRESS: 98H
4
C445
C445
0.1u/10V_4
0.1u/10V_4
VCC DXP DXN
-OVT
G786
G786
MSOP8-4_9-65
MSOP8-4_9-65
U14
U14
THER_SHD#LM86VCC
1 2 3 4
THER_SHD#
R340
VCC3
Q13
Q13
2
RHU002N06
RHU002N06
MBCLK(20,28,37)
A A
MBDATA(20,28,37)
3
3
THERM_ALERT#(14,29)
5
VCC3
2
1
Q12
Q12 RHU002N06
RHU002N06
1
VCC3
R57
R57 *8.2K_4
*8.2K_4
R340 10K_4
10K_4
VCC3
2
1 3
H_THERMDA
C446
C446 2200p/50V_4
2200p/50V_4
H_THERMDC
R60
R60 330_4
330_4
Q11
Q11 MMBT3904
MMBT3904
R34410K_4 R34410K_4
3
SYS_SHDN# (32)
H_THERMDA (4)
VCC3
R71
R71 *0_4
*0_4
H_THERMDC (4)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
CPU_CORE0 CPU_CORE1
C110 0.01U/16V_4C110 0.01U/16V_4 C434 0.01U/16V_4C434 0.01U/16V_4 C28 0.01U/16V_4C28 0.01U/16V_4 C433 0.01U/16V_4C433 0.01U/16V_4
PROJECT : PF1
PROJECT : PF1
Quanta Computer Inc.
Quanta Computer Inc.
S1G2 PWR & GND 3/3
S1G2 PWR & GND 3/3
S1G2 PWR & GND 3/3
640Wednesday, June 11, 2008
640Wednesday, June 11, 2008
640Wednesday, June 11, 2008
1
1A
1A
1A
of
of
of
5
1.8VSUS 1.8VSUS 103
111
104
112
MEM_MA_ADD[0..15](5,8)
D D
MEM_MA_BANK[0..2](5,8)
MEM_MA_DQS0_P(5) MEM_MA_DQS1_P(5) MEM_MA_DQS2_P(5) MEM_MA_DQS3_P(5) MEM_MA_DQS4_P(5) MEM_MA_DQS5_P(5) MEM_MA_DQS6_P(5)
C C
B B
A A
MEM_MA_DQS7_P(5) MEM_MA_DQS0_N(5)
MEM_MA_DQS1_N(5) MEM_MA_DQS2_N(5) MEM_MA_DQS3_N(5) MEM_MA_DQS4_N(5) MEM_MA_DQS5_N(5) MEM_MA_DQS6_N(5) MEM_MA_DQS7_N(5)
MEM_MA_CLK1_P(5) MEM_MA_CLK1_N(5) MEM_MA_CLK7_P(5) MEM_MA_CLK7_N(5)
MEM_MA_CKE0(5,8) MEM_MA_CKE1(5,8)
MEM_MA_RAS#(5,8) MEM_MA_CAS#(5,8) MEM_MA_WE#(5,8) MEM_MA0_CS#0(5,8) MEM_MA0_CS#1(5,8)
MEM_MA0_ODT0(5,8) MEM_MA0_ODT1(5,8)
PDAT_SMB(3,8,14,24) PCLK_SMB(3,8,14,24)
VCC3
C246
C246
2.2U/6.3V_6
2.2U/6.3V_6
C242
C242
0.1U/10V_4
0.1U/10V_4
MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8
MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15
MEM_MA_BANK0 MEM_MA_BANK1 MEM_MA_BANK2
MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7
DIM1_SA0 DIM1_SA1
PDAT_SMB PCLK_SMB
C435
C435
0.1U/10V_4
0.1U/10V_4
C530
C530
1000P/50V_4
1000P/50V_4
102
A0
101
A1
99 98 97 94 92 93 91
90 89
86 84
85 10
26 52 67
13 31 51 70
11 29 49 68
30 32
79 80
1 2
3 8
9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54
A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15
BA0 BA1 BA2
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7
CK0 CK0 CK1 CK1
CKE0 CKE1
RAS CAS WE S0 S1
ODT0 ODT1
SA0 SA1
SDA SCL
VDDspd VREF VSS0
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20
VDD081VDD182VDD287VDD388VDD495VDD596VDD6
SO-DIMM
SO-DIMM
59
100
105
116
107 106
130 147 170 185
131 148 169 188
129 146 167 186
164 166
108 113 109 110 115
114 119
198 200
195 197
199
117
VDD8
VDD7
VDD9
VDD10
(REVERSE)
(REVERSE)
VSS31
VSS30
VSS29
VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21
127
122
121
H=5.2
R53 10K/F_4R53 10K/F_4 R56 10K/F_4R56 10K/F_4
SMbus address A0
5
4
118
CN12
CN12
MEM_MA_DATA0
5
DQ0
MEM_MA_DATA1
7
DQ1
MEM_MA_DATA2
17
VDD11
DQ2
MEM_MA_DATA3
19
DQ3
MEM_MA_DATA4
4
DQ4
MEM_MA_DATA5
6
DQ5
MEM_MA_DATA6
14
DQ6
MEM_MA_DATA7
16
DQ7
MEM_MA_DATA8
23
DQ8
MEM_MA_DATA9
25
DQ9
MEM_MA_DATA10
35
DQ10
MEM_MA_DATA11
37
DQ11
MEM_MA_DATA12
20
DQ12
MEM_MA_DATA13
22
DQ13
MEM_MA_DATA14
36
DQ14
MEM_MA_DATA15
38
DQ15
MEM_MA_DATA16
43
DQ16
MEM_MA_DATA17
45
DQ17
MEM_MA_DATA18
55
DQ18
MEM_MA_DATA19
57
DQ19
MEM_MA_DATA20
44
DQ20
MEM_MA_DATA21
46
DQ21
MEM_MA_DATA22
56
DQ22
MEM_MA_DATA23
58
DQ23
MEM_MA_DATA24
61
DQ24
MEM_MA_DATA25
63
DQ25
MEM_MA_DATA26
73
DQ26
MEM_MA_DATA27
75
DQ27
MEM_MA_DATA28
62
DQ28
MEM_MA_DATA29
64
DQ29
MEM_MA_DATA30
74
DQ30
MEM_MA_DATA31
76
DQ31
MEM_MA_DATA36
123
DQ32
MEM_MA_DATA37
125
DQ33
MEM_MA_DATA35
135
DQ34
MEM_MA_DATA39
137
DQ35
MEM_MA_DATA38
124
DQ36
MEM_MA_DATA32
126
DQ37
MEM_MA_DATA33
134
DQ38
MEM_MA_DATA34
136
DQ39
MEM_MA_DATA40
141
DQ40
MEM_MA_DATA41
143
DQ41
MEM_MA_DATA46
151
DQ42
MEM_MA_DATA47
153
DQ43
MEM_MA_DATA44
140
DQ44
MEM_MA_DATA45
142
DQ45
MEM_MA_DATA42
152
DQ46
MEM_MA_DATA43
154
DQ47
MEM_MA_DATA52
157
DQ48
MEM_MA_DATA49
159
DQ49
MEM_MA_DATA54
173
DQ50
MEM_MA_DATA55
175
DQ51
MEM_MA_DATA53
158
DQ52
MEM_MA_DATA48
160
DQ53
MEM_MA_DATA51
174
DQ54
MEM_MA_DATA50
176
DQ55
MEM_MA_DATA61
179
DQ56
MEM_MA_DATA60
181
DQ57
MEM_MA_DATA63
189
DQ58
MEM_MA_DATA62
191
DQ59
MEM_MA_DATA56
180
DQ60
MEM_MA_DATA57
182
DQ61
MEM_MA_DATA58
192
DQ62
MEM_MA_DATA59
194
DQ63
MEMHOT_SODIMM#_1
50
NC1
MEM_MA_RESET#1
69
NC2
83
NC3
120
NC4
MEM_MA_NC5
163
NC/TEST
196
VSS56
193
VSS55
190
VSS54
187
VSS53
184
VSS52
183
VSS51
178
VSS50
177
VSS49
172
VSS48
171
VSS47
168
VSS46
165
VSS45
162
VSS44
161
VSS43
156
VSS42
155
VSS41
150
VSS40
149
VSS39
145
VSS38
144
VSS37
139
VSS36
138
VSS35
133
VSS34
VSS33
VSS32
DDR SO-DIMM SOCKET 1.8V
DDR SO-DIMM SOCKET 1.8V
132
128
DIM1_SA0 DIM1_SA1
4
3
MEM_MA_DATA[0..63] (5)
R120 0_4R120 0_4
T124T124
T116T116
0.9VSMVREF_DIMM0.9VSMVREF_DIMM
0.9VSMVREF_DIMM
SMDDR_VREF(5,35)
R162 *0_4R162 *0_4
Only for reserved
MEM_MB_ADD[0..15](5,8) MEM_MB_DATA[0..63] (5)
MEM_MB_BANK[0..2](5,8)
MEM_MB_DM[0..7](5)MEM_MA_DM[0..7](5)
MEM_MB_DQS0_P(5) MEM_MB_DQS1_P(5) MEM_MB_DQS2_P(5) MEM_MB_DQS3_P(5) MEM_MB_DQS4_P(5) MEM_MB_DQS5_P(5) MEM_MB_DQS6_P(5) MEM_MB_DQS7_P(5)
MEM_MB_DQS0_N(5) MEM_MB_DQS1_N(5) MEM_MB_DQS2_N(5) MEM_MB_DQS3_N(5) MEM_MB_DQS4_N(5) MEM_MB_DQS5_N(5) MEM_MB_DQS6_N(5) MEM_MB_DQS7_N(5)
MEM_MB_CLK1_P(5) MEM_MB_CLK1_N(5) MEM_MB_CLK7_P(5) MEM_MB_CLK7_N(5)
MEM_MB_CKE0(5,8) MEM_MB_CKE1(5,8)
MEM_MB_RAS#(5,8) MEM_MB_CAS#(5,8)
MEM_MB_WE#(5,8) MEM_MB0_CS#0(5,8) MEM_MB0_CS#1(5,8)
MEM_MB0_ODT0(5,8)
MEMHOT_SODIMM# (8)
C527
C527
2.2U/6.3V_6
2.2U/6.3V_6
0.9VSMVREF_DIMM
MEM_MB0_ODT1(5,8)
VCC3
C244
C244
0.1U/10V_4
0.1U/10V_4
1.8VSUS
R399
R399 2K/F_4
2K/F_4
R163
R163 2K/F_4
2K/F_4
MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8
MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15
MEM_MB_BANK0 MEM_MB_BANK1 MEM_MB_BANK2
MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7
DIM2_SA0 DIM2_SA1
PDAT_SMB PCLK_SMB
C436
C436
0.1U/10V_4
0.1U/10V_4
C241
C241 1000P/50V_4
1000P/50V_4
102
A0
101
A1
99 98 97 94 92 93 91
90 89
86 84
85 10
26 52 67
13 31 51 70
11 29 49 68
30 32
79 80
1 2
o
3 8
9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54
A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15
BA0 BA1 BA2
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7
CK0 CK0 CK1 CK1
CKE0 CKE1
RAS CAS WE S0 S1
ODT0 ODT1
SA0 SA1
SDA SCL
VDDspd VREF VSS0
VSS1 VSS2
o
VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20
DIM2_SA0 DIM2_SA1
VDD081VDD182VDD287VDD388VDD495VDD596VDD6
59
100
105
116
107 106
130 147 170 185
131 148 169 188
129 146 167 186
164 166
108 113 109 110 115
114 119
198 200
195 197
199
SMbus address A2
3
2
103
111
104
112
117
118
VDD8
VDD7
VDD9
VDD10
VDD11
NC/TEST
SO-DIMM
(REVERSE)
SO-DIMM
(REVERSE)
VSS33
VSS32
VSS31
VSS30
VSS29
VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21
132
128
127
122
121
R332 10K/F_4R332 10K/F_4 R334 10K/F_4R334 10K/F_4
2
CN11
CN11
MEM_MB_DATA4
5
DQ0
MEM_MB_DATA5
7
DQ1
MEM_MB_DATA2
17
DQ2
MEM_MB_DATA3
19
DQ3
MEM_MB_DATA0
4
DQ4
MEM_MB_DATA1
6
DQ5
MEM_MB_DATA6
14
DQ6
MEM_MB_DATA7
16
DQ7
MEM_MB_DATA13
23
DQ8
MEM_MB_DATA12
25
DQ9
MEM_MB_DATA11
35
DQ10
MEM_MB_DATA10
37
DQ11
MEM_MB_DATA8
20
DQ12
MEM_MB_DATA9
22
DQ13
MEM_MB_DATA14
36
DQ14
MEM_MB_DATA15
38
DQ15
MEM_MB_DATA16
43
DQ16
MEM_MB_DATA17
45
DQ17
MEM_MB_DATA18
55
DQ18
MEM_MB_DATA19
57
DQ19
MEM_MB_DATA20
44
DQ20
MEM_MB_DATA21
46
DQ21
MEM_MB_DATA22
56
DQ22
MEM_MB_DATA23
58
DQ23
MEM_MB_DATA24
61
DQ24
MEM_MB_DATA25
63
DQ25
MEM_MB_DATA26
73
DQ26
MEM_MB_DATA27
75
DQ27
MEM_MB_DATA28
62
DQ28
MEM_MB_DATA29
64
DQ29
MEM_MB_DATA30
74
DQ30
MEM_MB_DATA31
76
DQ31
MEM_MB_DATA37
123
DQ32
MEM_MB_DATA36
125
DQ33
MEM_MB_DATA34
135
DQ34
MEM_MB_DATA35
137
DQ35
MEM_MB_DATA33
124
DQ36
MEM_MB_DATA32
126
DQ37
MEM_MB_DATA38
134
DQ38
MEM_MB_DATA39
136
DQ39
MEM_MB_DATA40
141
DQ40
MEM_MB_DATA45
143
DQ41
MEM_MB_DATA47
151
DQ42
MEM_MB_DATA46
153
DQ43
MEM_MB_DATA44
140
DQ44
MEM_MB_DATA41
142
DQ45
MEM_MB_DATA43
152
DQ46
MEM_MB_DATA42
154
DQ47
MEM_MB_DATA52
157
DQ48
MEM_MB_DATA53
159
DQ49
MEM_MB_DATA50
173
DQ50
MEM_MB_DATA51
175
DQ51
MEM_MB_DATA48
158
DQ52
MEM_MB_DATA49
160
DQ53
MEM_MB_DATA54
174
DQ54
MEM_MB_DATA55
176
DQ55
MEM_MB_DATA56
179
DQ56
MEM_MB_DATA60
181
DQ57
MEM_MB_DATA58
189
DQ58
MEM_MB_DATA59
191
DQ59
MEM_MB_DATA61
180
DQ60
MEM_MB_DATA57
182
DQ61
MEM_MB_DATA62
192
DQ62
MEM_MB_DATA63
194
DQ63
MEMHOT_SODIMM#_2
50
NC1
MEM_MB_RESET#2
69
NC2
83
NC3
120
NC4
MEM_MB_NC5
163
196
VSS56
193
VSS55
190
VSS54
187
VSS53
184
VSS52
183
VSS51
178
VSS50
177
VSS49
172
VSS48
171
VSS47
168
VSS46
165
VSS45
162
VSS44
161
VSS43
156
VSS42
155
VSS41
150
VSS40
149
VSS39
145
VSS38
144
VSS37
139
VSS36
138
VSS35
133
VSS34
DDR SO-DIMM SOCKET 1.8V
DDR SO-DIMM SOCKET 1.8V
H=9.2
VCC3
1
07
R117 0_4R117 0_4 T123T123
T115T115
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
MEMHOT_SODIMM#
PROJECT : PF1
PROJECT : PF1
Quanta Computer Inc.
Quanta Computer Inc.
DDR2 SODIMMS: A/B CHANNEL
DDR2 SODIMMS: A/B CHANNEL
DDR2 SODIMMS: A/B CHANNEL
1
of
of
of
740Wednesday, June 11, 2008
740Wednesday, June 11, 2008
740Wednesday, June 11, 2008
1A
1A
1A
5
4
3
2
1
4 2 4 2 2 4 2 4 4 2 4 2 4 2 4 2
4 2 4 2
4 2
2 4
4 2
4 2
MEM_MA_ADD[0..15] MEM_MA_BANK[0..2]
SMDDR_VTERM
3 1 3 1 1 3 1 3 3 1 3 1 3 1 3 1
3 1 3 1
3 1
1 3
3 1
3 1
C150 0.1U/10V_4C150 0.1U/10V_4 C182 0.1U/10V_4C182 0.1U/10V_4 C170 0.1U/10V_4C170 0.1U/10V_4 C104 0.1U/10V_4C104 0.1U/10V_4 C166 0.1U/10V_4C166 0.1U/10V_4 C96 0.1U/10V_4C96 0.1U/10V_4 C136 0.1U/10V_4C136 0.1U/10V_4 C189 0.1U/10V_4C189 0.1U/10V_4
C145 0.1U/10V_4C145 0.1U/10V_4 C101 0.1U/10V_4C101 0.1U/10V_4 C163 0.1U/10V_4C163 0.1U/10V_4 C102 0.1U/10V_4C102 0.1U/10V_4
C111 0.1U/10V_4C111 0.1U/10V_4 C188 0.1U/10V_4C188 0.1U/10V_4 C134 0.1U/10V_4C134 0.1U/10V_4 C190 0.1U/10V_4C190 0.1U/10V_4
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
MEM_MB_ADD[0..15](5,7) MEM_MB_BANK[0..2](5,7)
MEM_MB_CKE0(5,7)
MEM_MB_WE#(5,7) MEM_MB_CAS#(5,7) MEM_MB0_ODT1(5,7) MEM_MB0_CS#1(5,7) MEM_MB_CKE1(5,7)
MEM_MB0_CS#0(5,7)MEM_MA0_CS#0(5,7) MEM_MB_RAS#(5,7)
MEM_MB0_ODT0(5,7)
MEM_MB_CKE0 MEM_MB_BANK2 MEM_MB_ADD12 MEM_MB_ADD9 MEM_MB_ADD8 MEM_MB_ADD5 MEM_MB_ADD3 MEM_MB_ADD1 MEM_MB_ADD10 MEM_MB_BANK0 MEM_MB_WE# MEM_MB_CAS# MEM_MB0_ODT1 MEM_MB0_CS#1 MEM_MB_CKE1 MEM_MB_ADD15
MEM_MB_ADD7 MEM_MB_ADD14
MEM_MB_ADD6 MEM_MB_ADD11
MEM_MB_ADD2 MEM_MB_ADD4
MEM_MB_BANK1 MEM_MB_ADD0
MEM_MB0_CS#0 MEM_MB_RAS#MEM_MA_RAS#
MEM_MB0_ODT0 MEM_MB_ADD13
1.8VSUS
MEM_MA_ADD[0..15](5,7) MEM_MA_BANK[0..2](5,7)
MEM_MA_CKE0(5,7)
D D
MEM_MA_WE#(5,7) MEM_MA_CAS#(5,7) MEM_MA0_ODT1(5,7) MEM_MA0_CS#1(5,7)
MEM_MA_CKE1(5,7)
C C
MEM_MA_RAS#(5,7)
MEM_MA0_ODT0(5,7)
MEM_MA_CKE0 MEM_MA_BANK2 MEM_MA_ADD12 MEM_MA_ADD9 MEM_MA_ADD8 MEM_MA_ADD5 MEM_MA_ADD3 MEM_MA_ADD1 MEM_MA_ADD10 MEM_MA_BANK0 MEM_MA_WE# MEM_MA_CAS# MEM_MA0_ODT1 MEM_MA0_CS#1 MEM_MA_ADD15 MEM_MA_CKE1
MEM_MA_ADD7 MEM_MA_ADD14 MEM_MA_ADD6 MEM_MA_ADD11
MEM_MA_ADD2 MEM_MA_ADD4
MEM_MA_BANK1 MEM_MA_ADD0
MEM_MA0_CS#0
MEM_MA_ADD13 MEM_MA0_ODT0
1.8VSUS
RP28 47_4P2R_4RP28 47_4P2R_4 RP24 47_4P2R_4RP24 47_4P2R_4 RP18 47_4P2R_4RP18 47_4P2R_4 RP16 47_4P2R_4RP16 47_4P2R_4 RP10 47_4P2R_4RP10 47_4P2R_4 RP8 47_4P2R_4RP8 47_4P2R_4 RP2 47_4P2R_4RP2 47_4P2R_4 RP27 47_4P2R_4RP27 47_4P2R_4
RP22 47_4P2R_4RP22 47_4P2R_4 RP19 47_4P2R_4RP19 47_4P2R_4
RP14 47_4P2R_4RP14 47_4P2R_4
RP12 47_4P2R_4RP12 47_4P2R_4
RP6 47_4P2R_4RP6 47_4P2R_4
RP4 47_4P2R_4RP4 47_4P2R_4
PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH
MEM_MB_ADD[0..15] MEM_MB_BANK[0..2]
SMDDR_VTERM
RP25 47_4P2R_4RP25 47_4P2R_4
4
3
2
RP21 47_4P2R_4RP21 47_4P2R_4 RP17 47_4P2R_4RP17 47_4P2R_4 RP15 47_4P2R_4RP15 47_4P2R_4 RP9 47_4P2R_4RP9 47_4P2R_4 RP7 47_4P2R_4RP7 47_4P2R_4 RP1 47_4P2R_4RP1 47_4P2R_4 RP26 47_4P2R_4RP26 47_4P2R_4
RP23 47_4P2R_4RP23 47_4P2R_4
RP20 47_4P2R_4RP20 47_4P2R_4
RP13 47_4P2R_4RP13 47_4P2R_4
RP11 47_4P2R_4RP11 47_4P2R_4
RP5 47_4P2R_4RP5 47_4P2R_4
RP3 47_4P2R_4RP3 47_4P2R_4
PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH
1
2
1
4
3
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
2
1
4
3
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
2
1
4
3
C159 0.1U/10V_4C159 0.1U/10V_4 C174 0.1U/10V_4C174 0.1U/10V_4 C139 0.1U/10V_4C139 0.1U/10V_4 C100 0.1U/10V_4C100 0.1U/10V_4 C129 0.1U/10V_4C129 0.1U/10V_4 C94 0.1U/10V_4C94 0.1U/10V_4 C157 0.1U/10V_4C157 0.1U/10V_4 C103 0.1U/10V_4C103 0.1U/10V_4 C144 0.1U/10V_4C144 0.1U/10V_4 C180 0.1U/10V_4C180 0.1U/10V_4 C148 0.1U/10V_4C148 0.1U/10V_4 C181 0.1U/10V_4C181 0.1U/10V_4 C122 0.1U/10V_4C122 0.1U/10V_4
C179 0.1U/10V_4C179 0.1U/10V_4 C152 0.1U/10V_4C152 0.1U/10V_4 C105 0.1U/10V_4C105 0.1U/10V_4
08
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
C185
C172
C172
0.1U/10V_4
0.1U/10V_4
C118
C118
0.1U/10V_4
0.1U/10V_4
C185
0.1U/10V_4
0.1U/10V_4
C171
C171
0.1U/10V_4
0.1U/10V_4
C70
C70
0.1U/10V_4
0.1U/10V_4
C160
C160
0.1U/10V_4
0.1U/10V_4
PLACE CLOSE TO SOCKET( PER EMI/EMC)
B B
VCC3
R331
R331 *10K/F_4
*10K/F_4
Close DDR2 socket
U13
U13
7
A0
VCC3
VCC3
PDAT_SMB PCLK_SMB
PDAT_SMB(3,7,14,24) PCLK_SMB(3,7,14,24)
A A
5
6
A1
5
A2
1
SDA
2
SCL
*DS75U+T&R
*DS75U+T&R
R328 10K/F_4R328 10K/F_4
VCC3
8
+VS
MEMHOT_SODIMM#
3
O.S
4
GND
Address:92h
MEMHOT_SODIMM#
C437 0.1U/10V_4C437 0.1U/10V_4
MEMHOT_SODIMM# (7)
4
2
Q30
Q30
*2N7002E-G
*2N7002E-G
R329 *33_4R329 *33_4
3
1
2
Q31
Q31
*2N7002E-G
*2N7002E-G
VCC3
3
1
R330
R330 *10K/F_4
*10K/F_4
3
CPU_MEMHOT# (4,14)
C119
C119
0.1U/10V_4
0.1U/10V_4
C80
C80
0.1U/10V_4
0.1U/10V_4
C167
C167
0.1U/10V_4
0.1U/10V_4
PLACE CLOSE TO SOCKET( PER EMI/EMC)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
C68
C68
0.1U/10V_4
0.1U/10V_4
C464
C67
C67
0.1U/10V_4
0.1U/10V_4
C464
0.1U/10V_4
0.1U/10V_4
PROJECT : PF1
PROJECT : PF1
Quanta Computer Inc.
Quanta Computer Inc.
DDR2 SODIMMS TERMINATIONS
DDR2 SODIMMS TERMINATIONS
DDR2 SODIMMS TERMINATIONS
840Wednesday, June 11, 2008
840Wednesday, June 11, 2008
840Wednesday, June 11, 2008
1
1A
1A
1A
of
of
of
5
HT_CPU_NB_CAD_H0 HT_CPU_NB_CAD_L0 HT_CPU_NB_CAD_H1 HT_CPU_NB_CAD_L1 HT_CPU_NB_CAD_H2 HT_CPU_NB_CAD_L2 HT_CPU_NB_CAD_H3 HT_CPU_NB_CAD_L3 HT_CPU_NB_CAD_H4 HT_CPU_NB_CAD_L4 HT_CPU_NB_CAD_H5 HT_CPU_NB_CAD_L5
D D
C C
HT_CPU_NB_CAD_H6 HT_CPU_NB_CAD_L6 HT_CPU_NB_CAD_H7 HT_CPU_NB_CAD_L7
HT_CPU_NB_CAD_H8 HT_CPU_NB_CAD_L8 HT_CPU_NB_CAD_H9 HT_CPU_NB_CAD_L9 HT_CPU_NB_CAD_H10 HT_CPU_NB_CAD_L10 HT_CPU_NB_CAD_H11 HT_CPU_NB_CAD_L11 HT_CPU_NB_CAD_H12 HT_CPU_NB_CAD_L12 HT_CPU_NB_CAD_H13 HT_CPU_NB_CAD_L13 HT_CPU_NB_CAD_H14 HT_CPU_NB_CAD_L14 HT_CPU_NB_CAD_H15 HT_CPU_NB_CAD_L15
HT_CPU_NB_CLK_H0 HT_CPU_NB_CLK_L0 HT_CPU_NB_CLK_H1 HT_CPU_NB_CLK_L1
HT_CPU_NB_CTL_H0 HT_CPU_NB_CTL_L0 HT_CPU_NB_CTL_H1 HT_CPU_NB_CTL_L1
R352 300/F_4R352 300/F_4
HT_RXCALP HT_RXCALN
4
Y25 Y24 V22 V23 V25 V24 U24 U25 T25 T24 P22 P23 P25 P24 N24 N25
AC24 AC25 AB25 AB24 AA24 AA25
Y22
Y23 W21 W20
V21
V20
U20
U21
U19
U18
T22
T23
AB23 AA22
M22 M23
R21
R20
C23
A24
U16A
U16A
HT_RXCAD0P HT_RXCAD0N HT_RXCAD1P HT_RXCAD1N HT_RXCAD2P HT_RXCAD2N HT_RXCAD3P HT_RXCAD3N HT_RXCAD4P HT_RXCAD4N HT_RXCAD5P HT_RXCAD5N HT_RXCAD6P HT_RXCAD6N HT_RXCAD7P HT_RXCAD7N
HT_RXCAD8P HT_RXCAD8N HT_RXCAD9P HT_RXCAD9N HT_RXCAD10P HT_RXCAD10N HT_RXCAD11P HT_RXCAD11N HT_RXCAD12P HT_RXCAD12N HT_RXCAD13P HT_RXCAD13N HT_RXCAD14P HT_RXCAD14N HT_RXCAD15P HT_RXCAD15N
HT_RXCLK0P HT_RXCLK0N HT_RXCLK1P HT_RXCLK1N
HT_RXCTL0P HT_RXCTL0N HT_RXCTL1P HT_RXCTL1N
HT_RXCALP HT_RXCALN
RS780(RX780)
RS780(RX780)
3
HT_NB_CPU_CAD_H0
PART 1 OF 6
PART 1 OF 6
HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N
HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P
HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N
HYPER TRANSPORT CPU I/F
HYPER TRANSPORT CPU I/F
HT_TXCTL0P HT_TXCTL0N HT_TXCTL1P HT_TXCTL1N
HT_TXCALP HT_TXCALN
D24
HT_NB_CPU_CAD_L0
D25
HT_NB_CPU_CAD_H1
E24
HT_NB_CPU_CAD_L1
E25
HT_NB_CPU_CAD_H2
F24
HT_NB_CPU_CAD_L2
F25
HT_NB_CPU_CAD_H3
F23
HT_NB_CPU_CAD_L3
F22
HT_NB_CPU_CAD_H4
H23
HT_NB_CPU_CAD_L4
H22
HT_NB_CPU_CAD_H5
J25
HT_NB_CPU_CAD_L5
J24
HT_NB_CPU_CAD_H6
K24
HT_NB_CPU_CAD_L6
K25
HT_NB_CPU_CAD_H7
K23
HT_NB_CPU_CAD_L7
K22
HT_NB_CPU_CAD_H8
F21
HT_NB_CPU_CAD_L8
G21
HT_NB_CPU_CAD_H9
G20
HT_NB_CPU_CAD_L9
H21
HT_NB_CPU_CAD_H10
J20
HT_NB_CPU_CAD_L10
J21
HT_NB_CPU_CAD_H11
J18
HT_NB_CPU_CAD_L11
K17
HT_NB_CPU_CAD_H12
L19
HT_NB_CPU_CAD_L12
J19
HT_NB_CPU_CAD_H13
M19
HT_NB_CPU_CAD_L13
L18
HT_NB_CPU_CAD_H14
M21
HT_NB_CPU_CAD_L14
P21
HT_NB_CPU_CAD_H15
P18
HT_NB_CPU_CAD_L15
M18
HT_NB_CPU_CLK_H0
H24
HT_NB_CPU_CLK_L0
H25
HT_NB_CPU_CLK_H1
L21
HT_NB_CPU_CLK_L1
L20
HT_NB_CPU_CTL_H0
M24
HT_NB_CPU_CTL_L0
M25
HT_NB_CPU_CTL_H1
P19
HT_NB_CPU_CTL_L1
R18
HT_TXCALP
B24
HT_TXCALN
B25
R641R655
R351 300/F_4R351 300/F_4
2
HT_CPU_NB_CAD_H[15..0] HT_CPU_NB_CAD_L[15..0] HT_CPU_NB_CLK_H[1..0] HT_CPU_NB_CLK_L[1..0] HT_CPU_NB_CTL_H[1..0] HT_CPU_NB_CTL_L[1..0] HT_NB_CPU_CAD_H[15..0] HT_NB_CPU_CAD_L[15..0] HT_NB_CPU_CLK_H[1..0] HT_NB_CPU_CLK_L[1..0] HT_NB_CPU_CTL_H[1..0] HT_NB_CPU_CTL_L[1..0]
signals
HT_TXCALP
HT_TXCALN
HT_RXCALP
HT_RXCALN
R351 300 ohm 1%
R352 300 ohm 1%
HT_CPU_NB_CAD_H[15..0] (4)
HT_CPU_NB_CAD_L[15..0] (4)
HT_CPU_NB_CLK_H[1..0] (4)
HT_CPU_NB_CLK_L[1..0] (4)
HT_CPU_NB_CTL_H[1..0] (4)
HT_CPU_NB_CTL_L[1..0] (4)
HT_NB_CPU_CAD_H[15..0] (4)
HT_NB_CPU_CAD_L[15..0] (4)
HT_NB_CPU_CLK_H[1..0] (4)
HT_NB_CPU_CLK_L[1..0] (4)
HT_NB_CPU_CTL_H[1..0] (4)
HT_NB_CPU_CTL_L[1..0] (4)
RS780 RX781
R351
1.21k ohm 1%
R352
1.21k ohm 1%
1
09
RES CHIP 1.21K 1/16W +-1%(0402) P/N : CS21212FB18
RES CHIP 300 1/16W +-1%(0402) P/N : CS13002FB00
This block is for UMA RS780 only , RX781 can remove all component
U16D
U16D
AB12
MEM_A0(NC)
AE16
MEM_A1(NC)
V11
MEM_A2(NC)
AE15
MEM_A3(NC)
AA12
MEM_A4(NC)
AB16
MEM_A5(NC)
AB14
MEM_A6(NC)
AD14
MEM_A7(NC)
B B
A A
5
4
AD13
MEM_A8(NC)
AD15
MEM_A9(NC)
AC16
MEM_A10(NC)
AE13
MEM_A11(NC)
AC14
MEM_A12(NC)
Y14
MEM_A13(NC)
AD16
MEM_BA0(NC)
AE17
MEM_BA1(NC)
AD17
MEM_BA2(NC)
W12
MEM_RASb(NC)
Y12
MEM_CASb(NC)
AD18
MEM_WEb(NC)
AB13
MEM_CSb(NC)
AB18
MEM_CKE(NC)
V14
MEM_ODT(NC)
V15
MEM_CKP(NC)
W14
MEM_CKN(NC)
AE12
MEM_COMPP(NC)
AD12
MEM_COMPN(NC)
RS780(RX780)
RS780(RX780)
3
PAR 4 OF 6
PAR 4 OF 6
MEM_DQ0/DVO_VSYNC(NC) MEM_DQ1/DVO_HSYNC(NC)
MEM_DQ2/DVO_DE(NC) MEM_DQ3/DVO_D0(NC)
MEM_DQ4(NC) MEM_DQ5/DVO_D1(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8/DVO_D3(NC) MEM_DQ9/DVO_D5(NC)
MEM_DQ10/DVO_D6(NC) MEM_DQ11/DVO_D7(NC)
MEM_DQ12(NC)
MEM_DQ13/DVO_D9(NC) MEM_DQ14/DVO_D10(NC) MEM_DQ15/DVO_D11(NC)
MEM_DQS0P/DVO_IDCKP(NC)
MEM_DQS0N/DVO_IDCKN(NC)
MEM_DQS1P(NC) MEM_DQS1N(NC)
MEM_DM0(NC)
MEM_DM1/DVO_D8(NC)
SBD_MEM/DVO_I/F
SBD_MEM/DVO_I/F
IOPLLVDD18(NC)
IOPLLVDD(NC)
IOPLLVSS(NC)
MEM_VREF(NC)
AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21
Y17 W18 AD20 AE21
W17 AE19
+1.8_IOPLLVDD18_NB
AE23
+1.1V_IOPLLVDD
AE24 AD23 AE18
2
IOPLLVDD18 - memory PLL not applicable to RX780
R346 0_6R346 0_6 R345 0_6R345 0_6
C450
C450
C451
C451
*2.2U/6.3V_6
*2.2U/6.3V_6
*2.2U/6.3V_6
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
*2.2U/6.3V_6
IOPLLVDD- memory PLL not applicable to RX780
PROJECT : PF1
PROJECT : PF1
Quanta Computer Inc.
Quanta Computer Inc.
RS740/RS780-HT LINK I/F 1/5
RS740/RS780-HT LINK I/F 1/5
RS740/RS780-HT LINK I/F 1/5
VCC1.8
1.1V_NB
940Wednesday, June 11, 2008
940Wednesday, June 11, 2008
940Wednesday, June 11, 2008
of
of
1
of
1A
1A
1A
5
U16B
PEG_RXP15 PEG_RXN15 PEG_RXP14 PEG_RXN14 PEG_RXP13 PEG_RXN13 PEG_RXP12 PEG_RXN12 PEG_RXP11 PEG_RXN11 PEG_RXP10
D D
C C
PCIE_SB_NB_RX0P(13) PCIE_SB_NB_RX0N(13) PCIE_SB_NB_RX1P(13) PCIE_SB_NB_RX1N(13) PCIE_SB_NB_RX2P(13) PCIE_SB_NB_RX2N(13) PCIE_SB_NB_RX3P(13) PCIE_SB_NB_RX3N(13)
PEG_RXN10 PEG_RXP9 PEG_RXN9 PEG_RXP8 PEG_RXN8 PEG_RXP7 PEG_RXN7 PEG_RXP6 PEG_RXN6 PEG_RXP5 PEG_RXN5 PEG_RXP4 PEG_RXN4 PEG_RXP3 PEG_RXN3 PEG_RXP2 PEG_RXN2 PEG_RXP1 PEG_RXN1 PEG_RXP0 PEG_RXN0
PCIE_RXP0(24) PCIE_RXN0(24) PCIE_RXP1(24) PCIE_RXN1(24) PCIE_RXP2(23)
PCIE_RXP3(24) PCIE_RXN3(24) PCIE_RXP4(25)
PCIE_RXP0 PCIE_RXN0 PCIE_RXP1 PCIE_RXN1 PCIE_RXP2 PCIE_RXN2 PCIE_TXN2_C PCIE_RXP3 PCIE_RXN3 PCIE_RXP4 PCIE_RXN4
U16B
D4
GFX_RX0P
C4
GFX_RX0N
A3
GFX_RX1P
B3
GFX_RX1N
C2
GFX_RX2P
C1
GFX_RX2N
E5
GFX_RX3P
F5
GFX_RX3N
G5
GFX_RX4P
G6
GFX_RX4N
H5
GFX_RX5P
H6
GFX_RX5N
J6
GFX_RX6P
J5
GFX_RX6N
J7
GFX_RX7P
J8
GFX_RX7N
L5
GFX_RX8P
L6
GFX_RX8N
M8
GFX_RX9P
L8
GFX_RX9N
P7
GFX_RX10P
M7
GFX_RX10N
P5
GFX_RX11P
M5
GFX_RX11N
R8
GFX_RX12P
P8
GFX_RX12N
R6
GFX_RX13P
R5
GFX_RX13N
P4
GFX_RX14P
P3
GFX_RX14N
T4
GFX_RX15P
T3
GFX_RX15N
AE3
GPP_RX0P
AD4
GPP_RX0N
AE2
GPP_RX1P
AD3
GPP_RX1N
AD1
GPP_RX2P
AD2
GPP_RX2N
V5
GPP_RX3P
W6
GPP_RX3N
U5
GPP_RX4P
U6
GPP_RX4N
U8
GPP_RX5P
U7
GPP_RX5N
AA8
SB_RX0P
Y8
SB_RX0N
AA7
SB_RX1P
Y7
SB_RX1N
AA5
SB_RX2P
AA6
SB_RX2N
W5
SB_RX3P
Y5
SB_RX3N
RS780(RX780)
RS780(RX780)
PART 2 OF 6
PART 2 OF 6
PCIE I/F GFX
PCIE I/F GFX
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
PCE_CALRP(PCE_BCALRP)
PCE_CALRN(PCE_BCALRN)
4
GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P
GFX_TX9N GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
C_PEG_TXP15
A5
C_PEG_TXN15
B5
C_PEG_TXP14
A4
C_PEG_TXN14
B4
C_PEG_TXP13
C3
C_PEG_TXN13 PEG_TXN13
B2
C_PEG_TXP12
D1
C_PEG_TXN12
D2
C_PEG_TXP11
E2
C_PEG_TXN11
E1
C_PEG_TXP10
F4
C_PEG_TXN10
F3
C_PEG_TXP9
F1
C_PEG_TXN9
F2
C_PEG_TXP8
H4
C_PEG_TXN8
H3
C_PEG_TXP7
H1
C_PEG_TXN7
H2
C_PEG_TXP6
J2
C_PEG_TXN6
J1
C_PEG_TXP5
K4
C_PEG_TXN5
K3
C_PEG_TXP4
K1
C_PEG_TXN4
K2
C_PEG_TXP3
M4
C_PEG_TXN3
M3
C_PEG_TXP2
M1
C_PEG_TXN2
M2
C_PEG_TXP1
N2
C_PEG_TXN1
N1
C_PEG_TXP0
P1
C_PEG_TXN0
P2
PCIE_TXP0_C
AC1
PCIE_TXN0_C
AC2
PCIE_TXP1_C
AB4
PCIE_TXN1_C
AB3
PCIE_TXP2_C
AA2 AA1
PCIE_TXP3_C
Y1
PCIE_TXN3_C
Y2
PCIE_TXP4_C
Y4
PCIE_TXN4_C
Y3 V1 V2
AD7 AE7 AE6 AD6 AB6 AC6 AD5 AE5
AC8 AB8
A_TX0P_CA_TX0P_C A_TX0N_CA_TX0N_C A_TX1P_CA_TX1P_C A_TX1N_CA_TX1N_C A_TX2P_C A_TX2N_C A_TX3P_C A_TX3N_C
NB_PCIECALRP NB_PCIECALRN
C511 EV@0.1U/10V_4C511 EV@0.1U/10V_4 C510 EV@0.1U/10V_4C510 EV@0.1U/10V_4 C484 EV@0.1U/10V_4C484 EV@0.1U/10V_4 C483 EV@0.1U/10V_4C483 EV@0.1U/10V_4 C508 EV@0.1U/10V_4C508 EV@0.1U/10V_4 C507 EV@0.1U/10V_4C507 EV@0.1U/10V_4 C482 EV@0.1U/10V_4C482 EV@0.1U/10V_4 C481 EV@0.1U/10V_4C481 EV@0.1U/10V_4 C506 EV@0.1U/10V_4C506 EV@0.1U/10V_4 C505 EV@0.1U/10V_4C505 EV@0.1U/10V_4 C487 EV@0.1U/10V_4C487 EV@0.1U/10V_4 C486 EV@0.1U/10V_4C486 EV@0.1U/10V_4 C500 EV@0.1U/10V_4C500 EV@0.1U/10V_4 C499 EV@0.1U/10V_4C499 EV@0.1U/10V_4 C491 EV@0.1U/10V_4C491 EV@0.1U/10V_4 C490 EV@0.1U/10V_4C490 EV@0.1U/10V_4 C502 EV@0.1U/10V_4C502 EV@0.1U/10V_4 C501 EV@0.1U/10V_4C501 EV@0.1U/10V_4 C489 EV@0.1U/10V_4C489 EV@0.1U/10V_4 C488 EV@0.1U/10V_4C488 EV@0.1U/10V_4 C504 EV@0.1U/10V_4C504 EV@0.1U/10V_4 C503 EV@0.1U/10V_4C503 EV@0.1U/10V_4 C494 EV@0.1U/10V_4C494 EV@0.1U/10V_4 C493 EV@0.1U/10V_4C493 EV@0.1U/10V_4 C496 EV@0.1U/10V_4C496 EV@0.1U/10V_4 C495 EV@0.1U/10V_4C495 EV@0.1U/10V_4 C497 EV@0.1U/10V_4C497 EV@0.1U/10V_4 C492 EV@0.1U/10V_4C492 EV@0.1U/10V_4 C509 EV@0.1U/10V_4C509 EV@0.1U/10V_4 C498 EV@0.1U/10V_4C498 EV@0.1U/10V_4 C518 EV@0.1U/10V_4C518 EV@0.1U/10V_4 C517 EV@0.1U/10V_4C517 EV@0.1U/10V_4
C48 0.1U/10V_4C48 0.1U/10V_4 C43 0.1U/10V_4C43 0.1U/10V_4 C49 0.1U/10V_4C49 0.1U/10V_4 C55 0.1U/10V_4C55 0.1U/10V_4 C76 0.1U/10V_4C76 0.1U/10V_4 C73 0.1U/10V_4C73 0.1U/10V_4 C90 0.1U/10V_4C90 0.1U/10V_4 C97 0.1U/10V_4C97 0.1U/10V_4 C112 0.1U/10V_4C112 0.1U/10V_4 C99 0.1U/10V_4C99 0.1U/10V_4
C453 0.1U/10V_4C453 0.1U/10V_4 C452 0.1U/10V_4C452 0.1U/10V_4 C455 0.1U/10V_4C455 0.1U/10V_4 C454 0.1U/10V_4C454 0.1U/10V_4 C456 0.1U/10V_4C456 0.1U/10V_4 C457 0.1U/10V_4C457 0.1U/10V_4 C459 0.1U/10V_4C459 0.1U/10V_4 C458 0.1U/10V_4C458 0.1U/10V_4
R64 1.27K/F_4R64 1.27K/F_4 R63 2K/F_4R63 2K/F_4
3
PEG_TXP15 PEG_TXN15 PEG_TXP14 PEG_TXN14 PEG_TXP13
PEG_TXP12 PEG_TXN12 PEG_TXP11 PEG_TXN11 PEG_TXP10 PEG_TXN10 PEG_TXP9 PEG_TXN9 PEG_TXP8 PEG_TXN8 PEG_TXP7 PEG_TXN7 PEG_TXP6 PEG_TXN6 PEG_TXP5 PEG_TXN5 PEG_TXP4 PEG_TXN4 PEG_TXP3 PEG_TXN3 PEG_TXP2 PEG_TXN2 PEG_TXP1 PEG_TXN1 PEG_TXP0 PEG_TXN0
PCIE_TXP0 (24) PCIE_TXN0 (24) PCIE_TXP1 (24)
PCIE_TXN1 (24) PCIE_TXP2 (23) PCIE_TXN2 (23)PCIE_RXN2(23)
PCIE_TXP3 (24)
PCIE_TXN3 (24) PCIE_TXP4 (25) PCIE_TXN4 (25)PCIE_RXN4(25)
PCIE_NB_SB_TX0P (13) PCIE_NB_SB_TX0N (13) PCIE_NB_SB_TX1P (13) PCIE_NB_SB_TX1N (13) PCIE_NB_SB_TX2P (13) PCIE_NB_SB_TX2N (13) PCIE_NB_SB_TX3P (13) PCIE_NB_SB_TX3N (13)
1.1V_NB
PEG_RXN[15:0](20)
PEG_RXP[15:0](20)
Close to North Bridge
TO WLAN TO MINI CARD TO PCIE-LAN TO EPRESS CARD TO CARD READER
2
PEG_RXN[15:0] PEG_TXN[15:0]
PEG_TXP[15:0]PEG_RXP[15:0]
Close to North Bridge
BTO
C_PEG_TXP15 C_PEG_TXN15
C_PEG_TXP14 C_PEG_TXN14
C_PEG_TXP13 C_PEG_TXN13
C_PEG_TXP12 C_PEG_TXN12
Close to North Bridge
C665 HDM@0.1u/10V_4C665 HDM@0.1u/10V_4 C660 HDM@0.1u/10V_4C660 HDM@0.1u/10V_4
C661 HDM@0.1u/10V_4C661 HDM@0.1u/10V_4 C662 HDM@0.1u/10V_4C662 HDM@0.1u/10V_4
C663 HDM@0.1u/10V_4C663 HDM@0.1u/10V_4 C664 HDM@0.1u/10V_4C664 HDM@0.1u/10V_4
C666 HDM@0.1u/10V_4C666 HDM@0.1u/10V_4 C667 HDM@0.1u/10V_4C667 HDM@0.1u/10V_4
PEG_TXN[15:0] (20) PEG_TXP[15:0] (20)
IV_HDMITX2P (18) IV_HDMITX2N (18)
IV_HDMITX1P (18) IV_HDMITX1N (18)
IV_HDMITX0P (18) IV_HDMITX0N (18)
IV_HDMICLK+ (18) IV_HDMICLK- (18)
To HDMI CONN
1
10
RX780/RS740/RS780 difference table (PCIE LINK)
RS740 RX780/RS780
NB_PCIECALRP
GPP4
B B
A A
GPP5
5
562R (GND)
NC
NC
1.27K (GND)
GPP4
GPP5
RS780 Display Port Support (muxed on GFX)
DP0
DP1
4
GFX_TX0,TX1,TX2 and TX3 AUX0 and HPD0
GFX_TX4,TX5,TX6 and TX7 AUX1 and HPD1
PROJECT : PF1
PROJECT : PF1
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
3
2
Date: Sheet
Quanta Computer Inc.
RS740/RS780-PCIE I/F 2/5
RS740/RS780-PCIE I/F 2/5
RS740/RS780-PCIE I/F 2/5
1
of
of
of
10 40Wednesday, June 11, 2008
10 40Wednesday, June 11, 2008
10 40Wednesday, June 11, 2008
1A
1A
1A
5
RX780: Powered from the 1.8-V rail and driven by SB600 LDT_RST#, or SB700 LDT_RST# or A_RST#. RS780: Powered from the 3.3-V rail and driven by SB600 LDT_RST#, or SB700 LDT_RST# or A_RST#.
RX780
CPU_LDT_RST#(4,13)
RS780
D D
NB_PLTRST#(13)
RX780
VCC3
11/30 add 2K pull up to DDCDAT /DDCCLK to VCC3 for RX780
R75 *0_4R75 *0_4
R79 0_4R79 0_4
North Bridge RESET
R104 4.7K_4R104 4.7K_4
R105 4.7K_4R105 4.7K_4
NB_RST#_IN
INT_CRT_DDCDAT
INT_CRT_DDCCLK
11/4 no stuff for RS780M/MC/RX781
+NB_CORE_ON
C C
selects Loading of straps from EPROM 1 : use default vaule , default 0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected RX780 --RS780_AUX_CAL RS780 -- SUS_ATAT
Enables Debug Bus acess
B B
through memory T/O pads and GPIO. 0 : Enable RS780 , Default 1 : Disable RS780 (RS780 use VSYNC#)
Indicates if memory Side port is available or not 0: available RS780 , Default 1: Not available RS780 ( RS780 use HSYNC#)
For extrnal EEPROM Debug only
A A
Enables Debug Bus acess through memory T/O pads and GPIO. 1 : Enable RX780 , Default 0 : Disable RX780
R103 *10K/F_4R103 *10K/F_4
R93 *10K/F_4R93 *10K/F_4
STRP_DATA
VCC3
RS780_AUX_CAL
INT_VSYNC
INT_HSYNC
R116 3K_4R116 3K_4
R114 3K_4R114 3K_4 R106 *3K_4R106 *3K_4
RS780/RX780
R92 *10K/F_4R92 *10K/F_4
R84 2.2K/F_4R84 2.2K/F_4
INT_TV_C/R
R88 *3K_4R88 *3K_4
RX780
R83 3K_4R83 3K_4
RS780
RS780
+VDDG_NB
RX780
Reserved only
5
INT_LVDS_EDIDDATA(19) INT_LVDS_EDIDCLK(19) IV_HDMI_DDCDATA(18) IV_HDMI_DDCCLK(18)
VCC3
4
+3V_AVDD_NB +1.8V_AVDDDI_NB +1.8V_AVDDQ_NB
T34T34 T21T21
INT_CRT_RED(18) INT_CRT_GRN(18) INT_CRT_BLU(18)
INT_HSYNC(18)
INT_VSYNC(18) INT_CRT_DDCDAT(18) INT_CRT_DDCCLK(18)
NB_PWRGD_IN(17)
NBHT_REFCLKP(3)
NBHT_REFCLKN(3)
EXT_NB_OSC(3)
1.1V_NB
R100
R100
RS780
4.7K_4
4.7K_4
NBGFX_CLKP(3) NBGFX_CLKN(3) NBGPP_CLKP(3) NBGPP_CLKN(3) SBLINK_CLKP(3)
SBLINK_CLKN(3)
IV_HDMI_DDCDATA IV_HDMI_DDCCLK
RX780 -->NC / RS780 --- ADD
VCC3
BLM18PG221SN1D(220,1.4A)_6
BLM18PG221SN1D(220,1.4A)_6
AVDD-DAC Analog not applicable to RX780
VCC1.8
BLM18PG221SN1D(220,1.4A)_6
BLM18PG221SN1D(220,1.4A)_6
C200
C200 10U/6.3V_8
10U/6.3V_8
PLLVDD18 - Graphics PLL not applicable to RX780
VCC3
VCC1.8
VDDA18PCIEPLL -PCIE PLL
L10
L10
BLM18PG221SN1D(220,1.4A)_6
BLM18PG221SN1D(220,1.4A)_6
T29T29
R89 IV@150/F_4R89 IV@150/F_4 R91 IV@150/F_4R91 IV@150/F_4 R90 IV@150/F_4R90 IV@150/F_4
R68 IV@715/F_6R68 IV@715/F_6
RS780
4.7K_4
4.7K_4
INT_LVDS_EDIDDATA INT_LVDS_EDIDCLK
+NB_CORE_ON(34)
L21
L21
L22
L22
VDDA18HTPLL -HT LINK PLL
L19
L19
BLM18PG221SN1D(220,1.4A)_6
BLM18PG221SN1D(220,1.4A)_6
4
INT_TV_C/R
R95 0_4R95 0_4 R94 0_4R94 0_4
R101
R101
T30T30 T31T31
T33T33
+3V_AVDD_NB
C199
C199
2.2U/6.3V_6
2.2U/6.3V_6
+1.8V_PLLVDD18
C151
C151
2.2U/6.3V_6
2.2U/6.3V_6
20mils width
+1.8V_VDDA18PCIEPLL
C154
C154
2.2U/6.3V_6
2.2U/6.3V_6
20mils width
+1.8V_VDDA18HTPLL
C127
C127
2.2U/6.3V_6
2.2U/6.3V_6
INT_CRT_RED INT_CRT_GRN INT_CRT_BLU
INT_HSYNC INT_VSYNC DDCDATA_INTDDCDATA_INT DDCCLK_INTDDCCLK_INT
DAC_RSET_NBDAC_RSET_NB +1.1V_PLLVDD
+1.8V_PLLVDD18
+1.8V_VDDA18HTPLL +1.8V_VDDA18PCIEPLL
NB_RST#_IN NB_PWRGD_IN NB_LDT_STOP# NB_ALLOW_LDTSTOP
NBHT_REFCLKP NBHT_REFCLKN
NBGFX_CLKP NBGFX_CLKN
NBGPP_CLKP NBGPP_CLKN
SBLINK_CLKP SBLINK_CLKN
RS740_DFT_GPIO1
R97 0_4R97 0_4
1.1V_NB
3
NB_REFCLK_P NB_REFCLK_N
STRP_DATA
RS780_AUX_CAL
BLM18PG221SN1D(220,1.4A)_6
BLM18PG221SN1D(220,1.4A)_6
L13
L13
VCC1.8
R82 0_6R82 0_6
BLM18PG221SN1D(220,1.4A)_6
BLM18PG221SN1D(220,1.4A)_6
L11
L11
CPU_LDT_STOP#(4,13)
CPU_LDT_REQ#(4)
ALLOW_LDTSTOP(13)
3
U16C
U16C
F12
AVDD1(NC)
E12
AVDD2(NC)
F14
AVDDDI(NC)
G15
AVSSDI(NC)
H15
AVDDQ(NC)
H14
AVSSQ(NC)
E17
C_Pr(DFT_GPIO5)
F17
Y(DFT_GPIO2)
F15
COMP_Pb(DFT_GPIO4)
G18
RED(DFT_GPIO0)
G17
REDb(NC)
E18
GREEN(DFT_GPIO1)
F18
GREENb(NC)
E19
BLUE(DFT_GPIO3)
F19
BLUEb(NC)
A11
DAC_HSYNC(PWM_GPIO4)
B11
DAC_VSYNC(PWM_GPIO6)
E8
DAC_SDA(PCE_TCALRN)
F8
DAC_SCL(PCE_RCALRN)
G14
DAC_RSET(PWM_GPIO1)
A12
PLLVDD(NC)
D14
PLLVDD18(NC)
B12
PLLVSS(NC)
H17
VDDA18HTPLL
D7
VDDA18PCIEPLL1
E7
VDDA18PCIEPLL2
D8
SYSRESETb
A10
POWERGOOD
C10
LDTSTOPb
C12
ALLOW_LDTSTOP
C25
HT_REFCLKP
C24 E11
F11
T2 T1
U1 U2
V4 V3
A9 B9 B8 A8 B7
A7 B10 G11
C8
I
HT_REFCLKN REFCLK_P/OSCIN(OSCIN)
REFCLK_N(PWM_GPIO3) GFX_REFCLKP
GFX_REFCLKN GPP_REFCLKP
GPP_REFCLKN GPPSB_REFCLKP(SB_REFCLKP)
GPPSB_REFCLKN(SB_REFCLKN) I2C_DATA
I2C_CLK DDC_DATA/AUX0N(NC) DDC_CLK/AUX0P(NC) AUX1P(NC) AUX1N(NC)
STRP_DATA RSVD AUX_CAL(NC)
RS780(RX780)
RS780(RX780)
+1.1V_PLLVDD
+1.8V_AVDDDI_NB
C143
C143
2.2U/6.3V_6
2.2U/6.3V_6
+1.8V_AVDDQ_NB
C165
C165
2.2U/6.3V_6
2.2U/6.3V_6
VCC1.8
R122
R122 300_4
300_4
R129 0_4R129 0_4
PART 3 OF 6
PART 3 OF 6
I
I/O
I/O
C162
C162
2.2U/6.3V_6
2.2U/6.3V_6
Q14
Q14 *BSS138_NL/SOT23
*BSS138_NL/SOT23
1
R125 0_4R125 0_4
RX780
RS780
Q15
Q15
*BSS138_NL/SOT23
*BSS138_NL/SOT23
1
R121 0_4R121 0_4
TXOUT_L0P(NC) TXOUT_L0N(NC) TXOUT_L1P(NC) TXOUT_L1N(NC) TXOUT_L2P(NC)
TXOUT_L2N(DBG_GPIO0)
TXOUT_L3P(NC)
TXOUT_L3N(DBG_GPIO2)
TXOUT_U0P(NC)
TXOUT_U1P(PCIE_RESET_GPIO3) TXOUT_U1N(PCIE_RESET_GPIO2)
TXOUT_U3P(PCIE_RESET_GPIO5)
CRT/TVOUT
CRT/TVOUT
PM
PM
CLOCKs PLL PWR
CLOCKs PLL PWR
MIS.
MIS.
PLLVDD - Graphics PLL not applicable to RX780
AVDDI-DAC Digital not applicable to RX780
AVDDQ-DAC Bandgap Reference not applicable to RX780
VCC1.8 +VDDG_NB
VCC1.8
TXOUT_U0N(NC)
TXOUT_U2P(NC) TXOUT_U2N(NC)
TXOUT_U3N(NC)
TXCLK_LP(DBG_GPIO1)
TXCLK_LN(DBG_GPIO3) TXCLK_UP(PCIE_RESET_GPIO4) TXCLK_UN(PCIE_RESET_GPIO1)
VDDLTP18(NC) VSSLTP18(NC)
VDDLT18_1(NC) VDDLT18_2(NC) VDDLT33_1(NC)
LVTM
LVTM
VDDLT33_2(NC)
VSSLT1(VSS) VSSLT2(VSS) VSSLT3(VSS) VSSLT4(VSS) VSSLT5(VSS) VSSLT6(VSS) VSSLT7(VSS)
LVDS_DIGON(PCE_TCALRP)
LVDS_BLON(PCE_RCALRP)
LVDS_ENA_BL(PWM_GPIO2)
TMDS_HPD(NC)
HPD(NC)
TVCLKIN(PWM_GPIO5)
THERMALDIODE_P THERMALDIODE_N
TESTMODE
R126
3
+VDDG_NB
3
R126 *4.7K_4
*4.7K_4
NB_LDT_STOP#
RS780
R108
R108 *4.7K_4
*4.7K_4
NB_ALLOW_LDTSTOP
2
2
RX780
2
A22 B22 A21 B21 B20 A20 A19 B19
B18 A18 A17 B17 D20 D21 D18 D19
B16 A16 D16 D17
+1.8V_VDDLTP18_NB
A13 B13
+1.8V_VDDLT_18_NB
A15 B15 A14 B14
C14 D15 C16 C18 C20 E20 C22
E9 F7 G12
R78 EV@1.27K/F_4R78 EV@1.27K/F_4 R77 EV@1.27K/F_4R77 EV@1.27K/F_4
TMDS_HPD0
D9 D10
SUS_STAT#_NB
D12
R_NB_THRMDA
AE8
R_NB_THRMDC
AD8
TEST_EN
D13
VCC1.8
IV@BLM18PG221SN1D(220,1.4A)_6
IV@BLM18PG221SN1D(220,1.4A)_6
L14
L14
BLM21PG221SN1D(220,100M,2A)_8
BLM21PG221SN1D(220,100M,2A)_8
L16
L16
2
INT_TXLOUT0+ (19) INT_TXLOUT0- (19) INT_TXLOUT1+ (19) INT_TXLOUT1- (19) INT_TXLOUT2+ (19) INT_TXLOUT2- (19)
T120T120 T121T121
INT_TXUOUT0+ (19) INT_TXUOUT0- (19) INT_TXUOUT1+ (19) INT_TXUOUT1- (19) INT_TXUOUT2+ (19) INT_TXUOUT2- (19)
T119T119 T122T122
INT_TXLCLKOUT+ (19) INT_TXLCLKOUT- (19) INT_TXUCLKOUT+ (19) INT_TXUCLKOUT- (19)
+3V_VDLT33_NB
11/01 exchange LVDS_PWM /LVDS_BLON
RS780 only
For RX780 only
T27T27 T22T22
R113 0_4R113 0_4
T118T118 T117T117
R96
R96
1.82K/F_4
1.82K/F_4
C153
C153
IV@2.2U/6.3V_6
IV@2.2U/6.3V_6
C175
C175
IV@4.7U/6.3V_6
IV@4.7U/6.3V_6
RX780
+1.8V_VDDLTP18_NB
VDDLTP18 - LVDS or DVI/HDMI PLL not applicable to RX780
C164
C164
IV@0.1U/10V_4
IV@0.1U/10V_4
VCC1.8 +VDDG_NB
VCC3
RS780
VCC3
*BLM21PG221SN1D(220,100M,2A)_8
*BLM21PG221SN1D(220,100M,2A)_8
VDDLT33 - LVDS or DVI/HDMI ANALOG RS740 only
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
INT_LVDS_DIGON (19) INT_LVDS_BLON (19)
SUS_STAT# (14)
+1.8V_VDDLT_18_NB
VDDLT18 - LVDS or DVI/HDMI digital not applicable to RX780
R124 EV@0_6R124 EV@0_6
R123 IV@0_6R123 IV@0_6
L15
L15
1
11
+3V_VDLT33_NB
C177
C177
*2.2U/6.3V_6
*2.2U/6.3V_6
PROJECT : PF1
PROJECT : PF1
Quanta Computer Inc.
Quanta Computer Inc.
RS740/RS780-SYSTEM I/F 3/5
RS740/RS780-SYSTEM I/F 3/5
RS740/RS780-SYSTEM I/F 3/5
11 40Wednesday, June 11, 2008
11 40Wednesday, June 11, 2008
11 40Wednesday, June 11, 2008
of
of
1
of
1A
1A
1A
5
4
3
2
1
E4
G2
H7
J4
R7
L1
L2
L4
L7
M6
N4
P6
R1
R2
R4
V7
U4
V8
V6
W1
W2
W4
W7
W8
Y6
AA4
AB5
AB1
AB7
AC3
U16F
U16F
VSSAPCIE1A2VSSAPCIE2B1VSSAPCIE3D3VSSAPCIE4D5VSSAPCIE5
VSSAPCIE6G1VSSAPCIE7
VSSAPCIE8G4VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
Y21
W25
AD25
C46
C46
0.1U/10V_4
0.1U/10V_4
C47
C47
4.7U/6.3V_6
4.7U/6.3V_6
R70 0_6R70 0_6
R347 0_6R347 0_6
VSSAPCIE30
VSS11
VSS12
L12
M14
C50
C50
4.7U/6.3V_6
4.7U/6.3V_6
C168
C168
4.7U/6.3V_6
4.7U/6.3V_6
D D
PART 6/6
PART 6/6
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT20
J22
L17
L22
L24
A25
E22
D23
G22
G24
C C
VDDHT - HT LINK digital I/O for RX780/RS780
VDDHTRX - HT LINK RX I/O for RX780/RS780
VCC1.2 2A for RS780M+SB700
L9
VCC1.2
12/11 VCC1.35 remove
B B
BLM21PG221SN1D(220,100M,2A)_8
BLM21PG221SN1D(220,100M,2A)_8
VDDA18PCIE ­PCIE TX stage I/O for RX780/RS780
A A
L9
BLM21PG221SN1D(220,100M,2A)_8
BLM21PG221SN1D(220,100M,2A)_8
VDDHTTX - HT LINK TX I/O for RX780/RS780
+1.8V 1A for RS780M+SB700
VCC1.8
L25
H19
G25
P20
N22
R19
R22
R24
R25
M20
1.1V_NB
H20
+1.1V 2A for RS780M
0.6A
L8
L8 BLM21PG221SN1D(220,100M,2A)_8
BLM21PG221SN1D(220,100M,2A)_8
0.45A
L12
L12 BLM21PG221SN1D(220,100M,2A)_8
BLM21PG221SN1D(220,100M,2A)_8
0.5A
C42
C42
4.7U/6.3V_6
4.7U/6.3V_6
L7
L7
VDD18 - RS780 I/O transform
600mA
C54
C54
4.7U/6.3V_6
4.7U/6.3V_6
VDD18_MEM For UMA RS780 only Not applicable to RX780 memory I/O transform
VCC1.8
U22
VCC1.8
V19
W22
W24
AC4
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
GROUND
GROUND
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
T12
P12
P15
N13
R11
R14
U14
C93
C93
0.1U/10V_4
0.1U/10V_4
C140
C140
0.1U/10V_4
0.1U/10V_4
C69
C69
0.1U/10V_4
0.1U/10V_4
C98
C98
C87
C87
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.005A
C141
C141 1U/10V_4
1U/10V_4
0.005A
AE1
AE4
AB2
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS20
VSS21
VSS22
VSS23
V12
U11
U15
W11
C460
C460 1U/10V_4
1U/10V_4
D11
E14
E15
AE14
VSS2
VSS3G8VSS4
VSS5
VSS1
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
Y18
W15
AA14
AB11
AB15
AC12
+1.1V_VDDHT
C115
C115
0.1U/10V_4
0.1U/10V_4
+1.1V_VDDHTRX
C161
C161
0.1U/10V_4
0.1U/10V_4
+1.2V_VDDHTTX
C85
C85
0.1U/10V_4
0.1U/10V_4
+1.8V_VDDA18PCIE
C124
C124
0.1U/10V_4
0.1U/10V_4
+1.8V_VDDG18_NB
+1.8V_VDD18_MEM
J12
J15
VSS7
VSS6
VSS30
VSS31
AB17
AB19
C109
C109
0.1U/10V_4
0.1U/10V_4
C158
C158
0.1U/10V_4
0.1U/10V_4
C75
C75
0.1U/10V_4
0.1U/10V_4
C79
C79
0.1U/10V_4
0.1U/10V_4
K14
VSS8
VSS32
AE20
M11
L15
VSS9
VSS33
K11
AB21
VSS10
VSS34
U16E
U16E
J17
VDDHT_1
K16
VDDHT_2
L16
VDDHT_3
M16
VDDHT_4
P16
VDDHT_5
R16
VDDHT_6
T16
VDDHT_7
H18
VDDHTRX_1
G19
VDDHTRX_2
F20
VDDHTRX_3
E21
VDDHTRX_4
D22
VDDHTRX_5
B23
VDDHTRX_6
A23
VDDHTRX_7
AE25
VDDHTTX_1
AD24
VDDHTTX_2
AC23
VDDHTTX_3
AB22
VDDHTTX_4
AA21
VDDHTTX_5
Y20
VDDHTTX_6
W19
VDDHTTX_7
V18
VDDHTTX_8
U17
VDDHTTX_9
T17
VDDHTTX_10
R17
VDDHTTX_11
P17
VDDHTTX_12
M17
VDDHTTX_13
J10
VDDA18PCIE_1
P10
VDDA18PCIE_2
K10
VDDA18PCIE_3
M10
VDDA18PCIE_4
L10
VDDA18PCIE_5
W9
VDDA18PCIE_6
H9
VDDA18PCIE_7
T10
VDDA18PCIE_8
R10
VDDA18PCIE_9
Y9
VDDA18PCIE_10
AA9
VDDA18PCIE_11
AB9
VDDA18PCIE_12
AD9
VDDA18PCIE_13
AE9
VDDA18PCIE_14
U10
VDDA18PCIE_15
F9
VDDG18_1(VDD18_1)
G9
VDDG18_2(VDD18_2)
AE11
VDD18_MEM1(NC)
AD11
VDD18_MEM2(NC)
RS780(RX780)
RS780(RX780)
PART 5/6
PART 5/6
PIN NAME VDDHT VDDHTRX VDDHTTX VDDA18PCIE
VDD18_MEM VDDPCIE VDDC VDD_MEM VDDG33 IOPLLVDD18
VCC1.2(3,4,13,15,16,30,34,37) VCC3(3,4,6,7,8,11,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32,33,36) VCC1.8(4,9,11,13,16,17,25,26,35,36)
1.1V_NB(9,10,11,36) NB_CORE(30,34)
VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8
VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17
VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8
VDDC_9 VDDC_10 VDDC_11
POWER
POWER
VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22
VDD_MEM1(NC) VDD_MEM2(NC) VDD_MEM3(NC) VDD_MEM4(NC) VDD_MEM5(NC) VDD_MEM6(NC)
VDDG33_1(NC) VDDG33_2(NC)
RX780/RS780 POWER DIFFERENCE TABLE
RX780
+1.1V +1.1V +1.2V +1.8V +1.8VVDDG18 NC +1.1V +1.1V +1.8V +1.1V NC
+1.8V/1.5V
NC
+1.1V_VDD_PCIE
A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9
K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16
AE10 AA11 Y11 AD10 AB10 AC10
H11 H12
C116
C116
0.1U/10V_4
0.1U/10V_4
C77
C77
0.1U/10V_4
0.1U/10V_4
C89
C89
0.1U/10V_4
0.1U/10V_4
+1.8V_VDD_MEM
C41
C41
0.1U/10V_4
0.1U/10V_4
+3V_VDDG33
C130
C130
0.1U/10V_4
0.1U/10V_4
RS780
+1.1V +1.1V +1.2V +1.8V +1.8V +1.8V
+1.1V
+3.3V +1.8VNC
PIN NAME IOPLLVDD
AVDDDI AVDDQ PLLVDD PLLVDD18 VDDA18PCIEPLL VDDA18HTPLL VDDLTP18 VDDLT18 VDDLT33
C149
C149
0.1U/10V_4
0.1U/10V_4
C117
C117
0.1U/10V_4
0.1U/10V_4
C38
C38
0.1U/10V_4
0.1U/10V_4
C131
C131
0.1U/10V_4
0.1U/10V_4
C88
C88 1U/10V_4
1U/10V_4
C126
C126
0.1U/10V_4
0.1U/10V_4
C113
C113
0.1U/10V_4
0.1U/10V_4
C40
C40
0.1U/10V_4
0.1U/10V_4
R76 0_6R76 0_6
RX780 RS780
NC
+1.1V
NC
+3.3VAVDD NC +1.8V NC +1.8V
+1.1V
NC
+1.8V
NC
+1.8V +1.8V
+1.8V
+1.8V
NC
+1.8V
NC
NC
NC
0.7A
C146
C146 1U/10V_4
1U/10V_4
C107
C107
0.1U/10V_4
0.1U/10V_4
C78
C78
0.1U/10V_4
0.1U/10V_4
1.8V(0.15A)
C39
C39
0.1U/10V_4
0.1U/10V_4
RS780
3.3V(0.03A)
VDD33 - 3.3V I/O Not applicable to RX780
VDDPCIE - PCIE-E Main power
R62 0_8R62 0_8
C51
C51
4.7U/6.3V_6
4.7U/6.3V_6
VDDC - Core Logic power
7A
C33
C33
10U/6.3V_8
10U/6.3V_8
C34
C34
10U/6.3V_8
10U/6.3V_8
L6
L6
C37
C37
4.7U/6.3V_6
4.7U/6.3V_6
BLM21PG221SN1D(220,100M,2A)_8
BLM21PG221SN1D(220,100M,2A)_8
VCC3
1.1V_NB
NB_CORE
VDD_MEM For UMA RS780 only Not applicable to RX780 memory I/O transform
VCC1.8
12
PROJECT : PF1
PROJECT : PF1
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Quanta Computer Inc.
RS740/RS780-POWER5/5
RS740/RS780-POWER5/5
RS740/RS780-POWER5/5
12 40Wednesday, June 11, 2008
12 40Wednesday, June 11, 2008
12 40Wednesday, June 11, 2008
of
of
1
of
1A
1A
1A
5
4
3
2
1
2
C323
C323 1u/10V_4
1u/10V_4
13
13
VCC3
13 40Wednesday, June 11, 2008
13 40Wednesday, June 11, 2008
13 40Wednesday, June 11, 2008
of
of
of
C326
C326
0.1u/10V_4
0.1u/10V_4
1A
1A
1A
NB_PLTRST#(11) PLTRST#(20,23,24,25,26)
PCIE_SB_NB_RX0P(10)
D D
PLACE THESE PCIE AC COUPLING CAPS CLOSE TO U19
VCC1.2
PCIE_SB_NB_RX0N(10) PCIE_SB_NB_RX1P(10) PCIE_SB_NB_RX1N(10) PCIE_SB_NB_RX2P(10) PCIE_SB_NB_RX2N(10) PCIE_SB_NB_RX3P(10) PCIE_SB_NB_RX3N(10)
PCIE_NB_SB_TX0P(10)
To RS780
PCIE_NB_SB_TX0N(10) PCIE_NB_SB_TX1P(10) PCIE_NB_SB_TX1N(10) PCIE_NB_SB_TX2P(10) PCIE_NB_SB_TX2N(10) PCIE_NB_SB_TX3P(10) PCIE_NB_SB_TX3N(10)
+1.2V_PCIE_VDDR
L53 BLM18PG221SN1D(220,1.4A)_6L53 BLM18PG221SN1D(220,1.4A)_6
PCIE_PVDD-- PCIE PLL POWER
C C
SBSRC_CLKP(3) SBSRC_CLKN(3)
B B
Y2
Y2
R150
R150
*20M_6
*20M_6
A A
4
32.768KHZ
32.768KHZ
R157 20M_6R157 20M_6
C230
C230 15P/50V_4
15P/50V_4
RTC_X1
23
RTC_X2
1
C249
C249 15P/50V_4
15P/50V_4
VCC1.8
VCC3
ALLOW_LDTSTOP(11) CPU_PROCHOT#(4)
CPU_PWRGD(4)
CPU_LDT_STOP#(4,11)
CPU_LDT_RST#(4,11)
5
R182 33_4R182 33_4 R184 33_4R184 33_4
C292 0.1U/10V_4C292 0.1U/10V_4 C293 0.1U/10V_4C293 0.1U/10V_4 C288 0.1U/10V_4C288 0.1U/10V_4 C283 0.1U/10V_4C283 0.1U/10V_4 C279 0.1U/10V_4C279 0.1U/10V_4 C284 0.1U/10V_4C284 0.1U/10V_4 C278 0.1U/10V_4C278 0.1U/10V_4 C274 0.1U/10V_4C274 0.1U/10V_4
R409 562/F_4R409 562/F_4 R412 2.05K/F_4R412 2.05K/F_4
T60T60 T137T137
T143T143 T140T140
T71T71 T69T69
T141T141 T139T139
T64T64 T53T53
T56T56 T74T74
T66T66 T63T63
T65T65 T76T76
T51T51
R164 *10K/F_4R164 *10K/F_4 R168 *10K/F_4R168 *10K/F_4
C540
C540 10U/6.3V_8
10U/6.3V_8
ALLOW_LDTSTOP CPU_PROCHOT# CPU_PWRGD CPU_LDT_STOP# CPU_LDT_RST#
A_RST#_SB
A_RX0P_C A_RX0N_C A_RX1P_C A_RX1N_C A_RX2P_C A_RX2N_C A_RX3P_C A_RX3N_C
PCIE_NB_SB_TX0P PCIE_NB_SB_TX0N PCIE_NB_SB_TX1P PCIE_NB_SB_TX1N PCIE_NB_SB_TX2P PCIE_NB_SB_TX2N PCIE_NB_SB_TX3P PCIE_NB_SB_TX3N
PCIE_CALRP_SB PCIE_CALRN_SB
+1.2V_PCIE_PVDD
40mA
C539
C539 1U/10V_4
1U/10V_4
SBSRC_CLKPSBSRC_CLKPSBSRC_CLKPSBSRC_CLKP SBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKN
NB_DISP_CLKP NB_DISP_CLKN
NB_HT_CLKP NB_HT_CLKN
CPU_HT_CLKP CPU_HT_CLKN
SLT_GFX_CLKP SLT_GFX_CLKN
GPP_CLK0P GPP_CLK0N
GPP_CLK1P GPP_CLK1N
GPP_CLK2P GPP_CLK2N
GPP_CLK3P GPP_CLK3N
T62T62
T55T55
RTC_X1
RTC_X2
4
U19A
U19A
N2
A_RST#
V23
PCIE_TX0P
V22
PCIE_TX0N
V24
PCIE_TX1P
V25
PCIE_TX1N
U25
PCIE_TX2P
U24
PCIE_TX2N
T23
PCIE_TX3P
T22
PCIE_TX3N
U22
PCIE_RX0P
U21
PCIE_RX0N
U19
PCIE_RX1P
V19
PCIE_RX1N
R20
PCIE_RX2P
R21
PCIE_RX2N
R18
PCIE_RX3P
R17
PCIE_RX3N
T25
PCIE_CALRP
T24
PCIE_CALRN
P24
PCIE_PVDD
P25
PCIE_PVSS
N25
PCIE_RCLKP/NB_LNK_CLKP
N24
PCIE_RCLKN/NB_LNK_CLKN
K23
NB_DISP_CLKP
K22
NB_DISP_CLKN
M24
NB_HT_CLKP
M25
NB_HT_CLKN
P17
CPU_HT_CLKP
M18
CPU_HT_CLKN
M23
SLT_GFX_CLKP
M22
SLT_GFX_CLKN
J19
GPP_CLK0P
J18
GPP_CLK0N
L20
GPP_CLK1P
L19
GPP_CLK1N
M19
GPP_CLK2P
M20
GPP_CLK2N
N22
GPP_CLK3P
P22
GPP_CLK3N
L18
25M_48M_66M_OSC
J21
25M_X1
J20
25M_X2
A3
X1
B3
X2
F23
ALLOW_LDTSTP
F24
PROCHOT#
F22
LDT_PG
G25
LDT_STP#
G24
LDT_RST#
SB700
SB700
IC CTRL(528P) SB700 A11(218S7EALA11FG) P/N : AJALA110T00
SB700
SB700
Part 1 of 5
Part 1 of 5
PCI EXPRESS INTERFACE
PCI EXPRESS INTERFACE
100MHZ
RTC XTAL
RTC XTAL
CPU
CPU
PCI CLKS
PCI CLKS
PCI INTERFACE
PCI INTERFACE
CLOCK GENERATOR
CLOCK GENERATOR
LPC
LPC
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65
RTC
RTC
PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4
PCICLK5/GPIO41
PCIRST#
AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30
AD31 CBE0# CBE1# CBE2# CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY# STOP#
PERR# SERR# REQ0# REQ1# REQ2#
REQ3#/GPIO70 REQ4#/GPIO71
GNT0# GNT1# GNT2#
GNT3#/GPIO72 GNT4#/GPIO73
CLKRUN#
LOCK#
INTE#/GPIO33
INTF#/GPIO34 INTG#/GPIO35 INTH#/GPIO36
LPCCLK0 LPCCLK1
LAD0 LAD1 LAD2 LAD3
LFRAME#
LDRQ0#
SERIRQ
RTCCLK
INTRUDER_ALERT#
VBAT
3
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9
PAR
P4 P3
PCI_CLK2_R
P1
PCI_CLK3_R
P2
PCI_CLK4_R
T4
PCI_CLK5_R
T3
PCIRST#_L
N1
U2 P7 V4 T1 V3 U1 V1 V2 T2 W1 T9 R6 R7 R5 U8 U5 Y7 W8 V9 Y8 AA8 Y4 Y3 Y2 AA2 AB4 AA1 AB3 AB2 AC1 AC2 AD1 W2 U7 AA7 Y1 AA6 W5 AA5 Y5 U6 W6 W4 V7 AC3 AD4 AB7 AE6 AB6 AD2 AE4 AD5 AC6 AE5 AD6 V5
AD3 AC4 AE2 AE3
G22 E22 H24 H23 J25 J24 H25 H22 AB8 AD7 V15
C3 C2 B2
R180 33_4R180 33_4
AD23 AD24 AD25 AD26 AD27 AD28
All the PCI bus has build-in Pull-UP/Down resistors
PE_GPIO1
INTE# INTF# INTG# INTH#
LPC_CLK0 LPC_CLK1 LAD0 LAD1 LAD2 LAD3 LFRAME# LDRQ0#_SB LDRQ1#_SB SB_GPIO65 SERIRQ
RTC_CLK INTRUDER_ALERT#
20MIL
R188 22_4R188 22_4 R191 22_4R191 22_4 R199 22_4R199 22_4 R195 22_4R195 22_4
T83T83
T84T84
D3E_GPIO# (25)
T92T92 T94T94
R419 0_4R419 0_4 T98T98
T79T79
T93T93 T99T99 T102T102 T100T100
R171 22_4R171 22_4 R161 22_4R161 22_4
T52T52 T90T90 T96T96
T132T132
LAD0 (24,28) LAD1 (24,28) LAD2 (24,28) LAD3 (24,28) LFRAME# (24,28)
SERIRQ (28)
RTC_CLK (17)
PCIRST#
3VPCU
T75T75 T70T70
RTC
AD23 (17) AD24 (17) AD25 (17) AD26 (17) AD27 (17) AD28 (17)
2
PCI_CLK2 (17) PCI_CLK3 (17) PCI_CLK4 (17) PCI_CLK5 (17)
PCIRST# (24,28)
D9CH501H-40PT D9CH501H-40PT
2 1
LCD_ON (19)
PCLK_EC (17,28) PCLK_DBC (17,24)
C245
C245
0.1U/10V_4
0.1U/10V_4
1/24 AMD suggest change to VCC3
SB_GPIO65
PE_GPIO1
R208 100K/F_4R208 100K/F_4 R210 8.2K_4R210 8.2K_4 R209 *8.2K_4R209 *8.2K_4
Maybe can remove
VCCRTC
D8
D8 CH501H-40PT
CH501H-40PT
2 1
R243
R243 1K_6
1K_6
12
BT1 BAT_CONN
BT1 BAT_CONN
DFHS02FS561
DFHS02FS561
5VPCU
R571+R667 = (5V - 0.2V-2V)/0.2mA = 14k
R242
R242
8.66K/F_6
8.66K/F_6
R245
R245
4.7K_4
4.7K_4
R247
R247 15K_6
15K_6
VCCRTC
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
12
G1
G1 *SHORT_PAD
*SHORT_PAD
R240
R240
1K_4
1K_4
Q19
Q19 MMBT3904
MMBT3904
R239
R239
VCCRTC_3
8.66K/F_6
8.66K/F_6
PROJECT : PF1
PROJECT : PF1
Quanta Computer Inc.
Quanta Computer Inc.
SB700-PCIE/PCI/CPU/LPC 1/4
SB700-PCIE/PCI/CPU/LPC 1/4
SB700-PCIE/PCI/CPU/LPC 1/4
1
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