Quanta PB3 Schematic
1
2
3
4
5
http://hobi-elektronika.net
PB3 Block Diagram
1
VRAM VRAM
A A
LCD
P21
DVI-I
Digital & Analog
B B
Blue Tooth
P20
HDMI
P21
USB*3 USB*1
P27 P27
Camera
P27 P21
B-Channel
500MHZ
LVDS
TMDS
R/G/B
TMDS
HDD1
HDD2
CD ROM
SATA
P27
SATA
P27
PATA
P27
USB 1.1/2.0
USB 1.1/2.0
NB8P-SE
128M/
256M
nVidia
GDDR2GDDR2
P11~15
A-Channel
500MHZ
PCIE 16Lanes
CPU
Merom
478 PIN (micro FC-PGA)
FSB 667 MHz(166X4)
FSB 800MHz(200X4)
Crestline
965GM/PM
1299 PIN (micro FCBGA)
35mm x 35mm
P5-10
DMI(2X, 4X)
ICH8-M
678 BGA
31mm x 31mm
P3,4
DDRII 533/667
DDRII 533/667
P16~19
UNBUFFERED
DDRII
SODIMM
UNBUFFERED
DDRII
SODIMM
PCIE
PCIE
PCIE
PCIE
PCIE
P10
P10
PCI BUS
14.318MHz
CLOCK GEN
ICS9PR363BGLF
LAN
88e8039
PCI-E Mini
Intel 3945
PCI-E Mini
TV Card
New Card
eSATA
JMB360
P 2
P24
P23
P23
P23
P20
RJ45
(10/100/Giga)
3.3V LPC,33MHZ
C C
Azalia Link
Richo
Modem Module
CX20548-S CX20549-12
P26
Conexant
P25
R5C832
P22
RJ11
Int. MicMIC. Jack
D D
Audio Amplifier
Headphone
P25
Int. SPK. &
Sub Woofer
TOUCH PAD
T/P SWITCH
P28
INT.K/B
Track Point
PCU
ITE IT8512, IT8511
BIOS
P29,P30P28
Keyboard LED
HDD LED
Wireless SW
P29,30
P22 P23
4 in 1 Card reader1394
Wireless LED
Bluetooth SW
Bluetooth LED
LED
Power/Speep/Batt
1
2
3
4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
PB3 Main Board
PB3 Main Board
PB3 Main Board
5
1A
1A
1A
of
135Wednesday, October 03, 2007
135Wednesday, October 03, 2007
135Wednesday, October 03, 2007
PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com
1
2
Clock Generator
3
http://hobi-elektronika.net
4
5
6
7
8
02
3
1
3
1
3
1
1
3
1
3
1
3
1
3
1
3
1
3
3
1
3
1
3
1
CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_CPU_BCLK
CLK_CPU_BCLK#
GPU_27MHZ
GPU_27MHZSS
PCLK_R5C832
933
906
868
834
797
778
720
706
671
634
C853
C853
C854
C851
C851
*2.7P
*2.7P
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
7
C854
C852
C852
*2.7P
*2.7P
*2.7P
*2.7P
*2.7P
*2.7P
CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3
CLK_MCH_BCLK 5
CLK_MCH_BCLK# 5
CLK_PCIE_MINI_TV
CLK_PCIE_MINI_TV#
GPU_27MHZ 11
DREFSSCLK
DREFSSCLK#
GPU_27MHZSS 11
CLK_PCIE_SATA 16
CLK_PCIE_SATA# 16
CLK_PCIE_VGA 15
CLK_PCIE_VGA# 15
CLK_PCIE_LAN 24
CLK_PCIE_LAN# 24
CLK_PCIE_ICH 17
CLK_PCIE_ICH# 17
CLK_PCIE_MINI_WLAN 23
CLK_PCIE_MINI_WLAN#
CLK_PCIE_3GPLL
CLK_PCIE_3GPLL#
CLK_PCIE_NEW_C 23
CLK_PCIE_NEW_C# 23
CLK_PCIE_JMB360 20
CLK_PCIE_JMB360# 20
PCIE_REQ3# 23
PCIE_REQ4# 6
PCLK_DEBUG 23
PCLK_R5C832 22
PCLK_ICH 17
PCI_CLK_8512 28
(27MHz)
For GPU Spread Spectrum used
(27MHz)
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
Clock Generator
Clock Generator
Clock Generator
8
of
235Wednesday, October 03, 2007
235Wednesday, October 03, 2007
235Wednesday, October 03, 2007
1A
1A
1A
L38
L38
1 2
BLM21PG600SN1D
BLM21PG600SN1D
A A
VCC3 VDDCPU
L39
L39
1 2
BLM21PG600SN1D
BLM21PG600SN1D
B B
PDAT_SMB18,23
PCLK_SMB18,23
14M_ICH
PCLK_DEBUG
CLKUSB_48
R_PCLK_8512
PCLK_ICH
GPU_27MHZ
C C
CPU_BSEL03
VCCP
CPU_BSEL13
CPU_BSEL23
BSEL2 BSEL1 BSEL0 CPU
0
0
0
0
0
*
1
D D
0
0
1
011
1
1
1
1
1
1
12
C439
C439
10U_0805
10U_0805
12
C477
C477
10U_0805
10U_0805
VCC3
2
Q17
Q17
2N7002E
2N7002E
3
VCC3
2
Q15
Q15
2N7002E
2N7002E
3
C475 *10P_4C475 *10P_4
C474 *15PC474 *15P
C433 *15PC433 *15P
C445 *15PC445 *15P
C430 *15PC430 *15P
C758 *15PC758 *15P
CPU Clock select
CPU_BSEL0 CLK_BSEL0
CPU_BSEL1
VCCP
CPU_BSEL2
VCCP
FSAFSBFSC
0
266.66
1
133.33
0
200.00
1
166.66
0
333.33
100.00
0
400.00
1
200.00 100 33.33
12
12
C471
C471
0.1U/10V
0.1U/10V
VDDCPU
12
C472
C472
0.1U/10V
0.1U/10V
R260
R260
10K
10K
1
1
R209 0R209 0
R208 *56R208 *56
R207 *1KR207 *1K
R222 0R222 0
R219 *0R219 *0
R221 *1KR221 *1K
R274 0R274 0
R273 *0R273 *0
R275 *1KR275 *1K
SRC
PCI
100
33.33
33.33 14.318 48 96
100
33.33 14.318 48 96
100
33.33 14.318 48 96
100
33.33 14.318 48 96
100
33.33 14.318 48 96
100
33.33 14.318 48 96
100
2
12
C470
C470
C447
C447
0.1U/10V
0.1U/10V
0.1U/10V
0.1U/10V
R254
R254
10K
10K
CGDAT_SMB
CGCLK_SMB
CLK_BSEL1
CLK_BSEL2
REF
14.318
14.318 48 96
12
PM_STPCPU#18
PM_STPPCI#18
CGCLK_SMB10
CGDAT_SMB10
CLKUSB_4818
14M_ICH18
14.318MHz
R210 0R210 0
R223 0R223 0
R276 *0R276 *0
USB48DOT
96
C444
C444
0.1U/10V
0.1U/10V
CK_PWG18
DREFCLK6
DREFCLK#6
Spread
0.5 Down
0.5 Down
0.5 Down
0.5 Down
0.5 Down
0.5 Down
0.5 Down
0.5 Down
CLK_3.3V
12
C432
C432
0.1U/10V
0.1U/10V
14M_ICH
VCC3
%
12
C443
C443
0.1U/10V
0.1U/10V
VCC3
R268
R268
*10K/F
*10K/F
CGCLK_SMB
CGDAT_SMB
CLKUSB_48
CLK_BSEL0
internal have
already build-in
33ohm damping
resisteor
R270 1K/F_4R270 1K/F_4
R271 330/F_4R271 330/F_4
RP41 *22X2RP41 *22X2
(96MHz)
MCH_BSEL0 6
MCH_BSEL1 6
MCH_BSEL2 6
3
CLK_3.3VVCC3
12
12
R267
R267
*10K/F
*10K/F
R225 47R225 47
R224 2.2K/F_4R224 2.2K/F_4
R266 33_6R266 33_6
1
3
C446
C446
0.1U/10V
0.1U/10V
Pin 34
Pin 64
Pin 32
Pin 33
Pin 9
Pin 8
Pin 5
2
4
PWRSAVE#
R_PCLK_DEBUG
PCIE_REQ3#
PCIE_REQ4#
R_PCLK_8512
R_PCLK_ICH
SELPCIEX0_LCD#
C473
C473
0.1U/10V
0.1U/10V
CLK_3.3V
VDDCPU
CLK_XIN
CLK_XOUT
CLK_BSEL1
CLK_BSEL2
R_DREFCLK
R_DREFCLK#
PWRSAVE#
R265 *10K_4R265 *10K_4
R264 *10K_4R264 *10K_4
R234 *10K_4R234 *10K_4
R257 *10K_4R257 *10K_4
R236 10K_4R236 10K_4
R237 10K_4R237 10K_4
R238 10K_4R238 10K_4
ITP_EN(PIN8)
LOW : PIN43/44 SRC
HIGH : PIN43,44 CPUITP
PCIE_REQ1#
PCIE_REQ2#
PCIE_L0
PCIE_L1
PCIE_L2PCIE_REQ3#
PCIE_REQ4# PCIE_L5
PIN 64 : High for REQ_SEL
Low for PCICLK output
PCIE_L3
4
C466 30PC466 30P
C460 30PC460 30P
U17
U17
58
X1
57
X2
62
CPU_STOP#
63
PCI/PCIEX_STOP#
54
SCLK
55
SDATA
12
FSA/USB_48MHZ
16
FSB/TEST_MODE
61
FSC/REF1/TEST_SEL
60
REF0
1
VDDPCI
7
VDDPC1
11
VDD48
56
VDDREF
21
VDDPCIEX
28
VDDPCIEX
42
VDDPCIEX
50
VDDCPU
47
VREF
45
VDDA
10
VTTPWR_GD/PD#
14
PCIET_L9/DOTT_96MHZ
15
PCIEC_L9/DOTC_96MHZL
34
*PWRSAVE#
37
GND
2
GND
6
GND
13
GND
29
GND
53
GND
59
GND
46
GNDA
* Internal pull up to VDD
**Internal pull down to GND
PCIE_L6
PCIE_L8
PCIE_L4
CLK_XIN
21
Y3
Y3
14.318MHZ/20P
14.318MHZ/20P
CLK_XOUT
ICS9PR363BGLF
ICS9PR363BGLF
CPUITPT_L2/PCIET_L8
CPUITPC_L2/PCIEC_L8
27FIX/LCD_SSCGT/PCIET_L0
27SS/LCD_SSCGC/PCIEC_L0
PEREQ1#/PCIET_L7
PEREQ2#/PCIEC_L7
**REQ_SEL/PCICLK0
*SELPCIEX0_LCD#/PCICLK3
ITP_EN/PCICLK_F4
*SELLCD_27#/PCICLK_F5
VCC3
PCIE_L7
CPUT_L0
CPUC_L0
CPUT_L1F
CPUC_L1F
SATACLKT_L
SATACLKC_L
PCIET_L1
PCIEC_L1
PCIET_L2
PCIEC_L2
PCIET_L3
PCIEC_L3
PCIET_L4
PCIEC_L4
PCIET_L5
PCIEC_L5
PCIET_L6
PCIEC_L6
*PEREQ3#
*PEREQ4#
PCICLK1
PCICLK2
VREF
Keep Rpull-up=1K ohm and variable Rpull-down to
measure CPU and PCIEX Vtop
Rpull-up Rpull-down CPU-T Vtop PCIEX-T Vtop
R703 R704
PIN 5
R717 R715
LO
HI
5
RHCLK_CPU#
51
RHCLK_MCH
49
RHCLK_MCH#
48
44
43
R_DREFSSCLK
17
R_DREFSSCLK#
18
RSRC_SATA
26
RSRC_SATA#
27
R_CLK_PCIE_VGA
19
R_CLK_PCIE_VGA#
20
RSRC1_LAN
22
RSRC1_LAN#
23
RSRC_ICH
24
RSRC_ICH#
25
CLK_PCIE_MINI_
30
CLK_PCIE_MINI_#
31
RSRC_MCH
36
RSRC_MCH#
35
CLK_PCIE_NEW
39
CLK_PCIE_NEW#
38
PCIE_JMB360
41
PCIE_JMB360#
40
R_PCIE_REQ3#
32
R_PCIE_REQ4#
33
R_PCLK_DEBUG PCLK_DEBUG
64
R_PCLK_R5C832
3
4
5
8
9
1K
1K
1K
1K
1K
1K
1K
1K
1K
1K
PIN 9
(10K)
(NC)
RHCLK_CPU
52
RP47 4P2R-S-33RP47 4P2R-S-33
4
2
RP46 4P2R-S-33RP46 4P2R-S-33
4
2
RP45 4P2R-S-33RP45 4P2R-S-33
RSRC_TV
RSRC_TV#
SELPCIEX0_LCD#
R_PCLK_ICH PCLK_ICH
R_PCLK_8512 PCI_CLK_8512
4
2
R492 E@33_6R492 E@33_6
RP40 *I@4P2R-S-0RP40 *I@4P2R-S-0
2
4
R491 E@33_6R491 E@33_6
RP36 4P2R-S-47RP36 4P2R-S-47
2
4
RP39 4P2R-S-47RP39 4P2R-S-47
2
4
RP38 4P2R-S-47RP38 4P2R-S-47
2
4
RP37 4P2R-S-47RP37 4P2R-S-47
2
4
RP35 4P2R-S-33RP35 4P2R-S-33
2
4
RP42 4P2R-S-47RP42 4P2R-S-47
4
2
RP43 4P2R-S-47RP43 4P2R-S-47
4
2
RP44 4P2R-S-47RP44 4P2R-S-47
4
2
R235 475_4R235 475_4
R259 475_4R259 475_4
R269 33_6R269 33_6
R233 33_6R233 33_6
R218 33_6R218 33_6
R232 33_6R232 33_6
(mV) (mV)
203
222
236
275
298
329
362
372
380
385
836
799
774
721
688
664
615
595
566
513
PIN 14/15
LO
HI
LO
HI
(10K)
(NC)
(10K)
(NC)
PCIEX9
DOT96
PCIEX9
DOT96
6
PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com
1
CPU-Host Bus
2
3
http://hobi-elektronika.net
4
5
6
7
8
03
H_A#[3..16]5
A A
H_ADSTB#05
H_REQ#[0..4]5
H_A#[17..35]5
B B
H_ADSTB#15
H_A20M#16
H_FERR#16
H_IGNNE#16
H_STPCLK#16
H_INTR16
H_NMI16
H_SMI#16
C C
H_A#[3..16]
H_REQ#[0..4]
ITP_TDI
ITP_TMS
ITP_TDO
ITP_BPM#5
H_A#[17..35]
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
Populate ITP700Flex for bringup
Layout Note:
Place R4,R361,R346 & R7 close to CPU.
VCCP
R393
R393
51/F
51/F
ITP debug signals
XDP_DBRESET#
D D
R395 27/FR395 27/F
R29 649/FR29 649/F
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
R392
R392
51/F
51/F
R31 150R31 150
U29A
U29A
J4
A[3]#
L5
A[4]#
L4
A[5]#
K5
A[6]#
M3
A[7]#
N2
A[8]#
J1
A[9]#
N3
A[10]#
P5
A[11]#
P2
A[12]#
L2
A[13]#
P4
A[14]#
P1
A[15]#
R1
A[16]#
M1
ADSTB[0]#
K3
REQ[0]#
H2
REQ[1]#
K2
REQ[2]#
J3
REQ[3]#
L1
REQ[4]#
Y2
A[17]#
U5
A[18]#
R3
A[19]#
W6
A[20]#
U4
A[21]#
Y5
A[22]#
U1
A[23]#
R4
A[24]#
T5
A[25]#
T3
A[26]#
W2
A[27]#
W5
A[28]#
Y4
A[29]#
U2
A[30]#
V4
A[31]#
W3
A[32]#
AA4
A[33]#
AB2
A[34]#
AA3
A[35]#
V1
ADSTB[1]#
A6
A20M#
A5
FERR#
C4
IGNNE#
D5
STPCLK#
C6
LINT0
B4
LINT1
A3
SMI#
M4
RSVD[01]
N5
RSVD[02]
T2
RSVD[03]
V3
RSVD[04]
B2
RSVD[05]
C3
RSVD[06]
D2
RSVD[07]
D22
RSVD[08]
D3
RSVD[09]
F6
RSVD[10]
Merom Ball-out Rev 1a
Merom Ball-out Rev 1a
R30
R30
R396
R396
150
150
39/F
39/F
ITP_TCK
ITP_TRST#
ADDR GROUP 0
ADDR GROUP 0
ADDR GROUP 1
ADDR GROUP 1
THERMAL
THERMAL
ICH
ICH
THERMTRIP#
RESERVED
RESERVED
VCC3
ADS#
BNR#
BPRI#
DEFER#
DRDY#
DBSY#
BR0#
IERR#
INIT#
LOCK#
CONTROLXDP/ITP SIGNALS
CONTROLXDP/ITP SIGNALS
RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#
HIT#
HITM#
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TDO
TMS
TRST#
DBR#
PROCHOT#
THERMDA
THERMDC
H CLK
H CLK
BCLK[0]
BCLK[1]
T4*PAD T4*PAD
T7*PAD T7*PAD
T128*PAD T128*PAD
T129*PAD T129*PAD
TCK
FSB
H_D#[0..63]5
H_DSTBN#05
H_DSTBP#05
H_DINV#05
H_D#[0..63]5
H_DSTBN#15
H_DSTBP#15
H_DINV#15
CPU_BSEL02
CPU_BSEL12
CPU_BSEL22
CPU_TEST1
CPU_TEST2
CPU_TEST4
CPU_TEST6
BCLK
H1
E2
G5
H5
F21
E1
F1
H_IERR#
R32 56R32 56
D20
B3
H4
H_RESET#
C1
F3
F4
G3
G2
G6
E4
ITP_BPM#0
AD4
ITP_BPM#1
AD3
ITP_BPM#2
AD1
ITP_BPM#3
AC4
ITP_BPM#4
AC2
ITP_BPM#5
AC1
ITP_TCK
AC5
ITP_TDI
AA6
TDI
ITP_TDO
AB3
ITP_TMS
AB5
ITP_TRST#
AB6
XDP_DBRESET#
C20
CPU_PROCHOT#
R33 75R33 75
D21
A24
B25
C7
R394 56R394 56
A22
A21
H_ADS# 5
H_BNR# 5
H_BPRI#
H_DEFER#
H_DRDY# 5
H_DBSY# 5
H_BR0# 5
VCCP
H_INIT# 16
H_LOCK# 5
H_RESET#
H_RS#0
H_RS#1
H_RS#2
H_TRDY#
H_HIT# 5
H_HITM# 5
T6*PAD T6*PAD
T3*PAD T3*PAD
T131*PAD T131*PAD
T5*PAD T5*PAD
T130*PAD T130*PAD
VCCP
H_THERMDA
H_THERMDC 26
PM_THRMTRIP# 6,16
VCCP
CLK_CPU_BCLK 2
CLK_CPU_BCLK# 2
Layout Note:
Place voltage
divider within
0.5" of GTLREF
pin
VCCP
R413
R413
1K/F
1K/F
1 2
R414
R414
2K/F
2K/F
1 2
R34 *1K/FR34 *1K/F
R41 *1K/FR41 *1K/F
C643 *0.1U/10VC643 *0.1U/10V
R35 *0R35 *0
Place C close to the
CPU_TEST4 pin. Make sure
CPU_TEST4 routing is
reference to GND and away
from other noisy signal.
533 0 0 1133
667
166
800
200
ITP disable guidelines
Signal Resistor Value Connect To Resistor Placement
150 ohm +/- 5%
TDI
39 ohm +/- 1%
TMS
500-680ohm +/- 5%
TRST#
27 ohm +/- 1%
TCK
150 ohm +/- 5%
TDO
Note: Populate R5, R8, C372 & R430 when ITP connector is populated.
1
2
3
4
H_D#[0..63]
H_D#[0..63]
BSEL2 BSEL1 BSEL0
0
Within 2.0" of the ITPVTT
Within 2.0" of the ITP
VTT
Within 2.0" of the ITP
GND
Within 2.0" of the ITP
GND
Within 2.0" of the ITP
VTT
5
U29B
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
V_CPU_GTLREF
CPU_TEST1
CPU_TEST2
CPU_TEST3
CPU_TEST4
CPU_TEST5
CPU_TEST6
T8PAD T8PAD
T132PAD T132PAD
For the purpose of testability, route these signals
through a ground referenced Z0 = 55ohm trace that
ends in a via that is near a GND via and is
accessible through an oscilloscope connection.
U29B
E22
D[0]#
F24
D[1]#
E26
D[2]#
G22
D[3]#
F23
D[4]#
G25
D[5]#
E25
D[6]#
E23
D[7]#
K24
D[8]#
G24
D[9]#
J24
D[10]#
J23
D[11]#
H22
D[12]#
F26
D[13]#
K22
D[14]#
H23
D[15]#
J26
DSTBN[0]#
H26
DSTBP[0]#
H25
DINV[0]#
N22
D[16]#
K25
D[17]#
P26
D[18]#
R23
D[19]#
L23
D[20]#
M24
D[21]#
L22
D[22]#
M23
D[23]#
P25
D[24]#
P23
D[25]#
P22
D[26]#
T24
D[27]#
R24
D[28]#
L25
D[29]#
T25
D[30]#
N25
D[31]#
L26
DSTBN[1]#
M26
DSTBP[1]#
N24
DINV[1]#
AD26
GTLREF
C23
TEST1
D25
TEST2
C24
TEST3
AF26
TEST4
AF1
TEST5
A26
TEST6
B22
BSEL[0]
B23
BSEL[1]
C21
BSEL[2]
Merom Ball-out Rev 1a
Merom Ball-out Rev 1a
CPU_TEST3
CPU_TEST5
DATA GRP 0 DATA GRP 1
DATA GRP 0 DATA GRP 1
MISC
MISC
DATA GRP 2DATA GRP 3
DATA GRP 2DATA GRP 3
DSTBN[2]#
DSTBP[2]#
DINV[2]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#
COMP[0]
COMP[1]
COMP[2]
COMP[3]
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
SLP#
PSI#
Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22
AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20
R26
U26
AA1
Y1
E5
B5
D24
D6
D7
AE6
1
0011
Comp0,2 connect with Zo=27.4ohm,Comp1,3
connect with Zo=55ohm, make those traces
length shorter than 0.5".Trace should be
at least 25 mils away from any other
toggling signal.
6
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
COMP0
COMP1
COMP2
COMP3
H_D#[0..63]
H_D#[0..63]
H_D#[0..63] 5
H_DSTBN#2 5
H_DSTBP#2 5
H_DINV#2 5
H_D#[0..63] 5
H_DSTBN#3 5
H_DSTBP#3 5
H_DINV#3 5
Note:
H_DPRTSTP need to daisy chain
from ICH8 to IMVP6 to CPU.
H_DPRSTP# 6
H_DPSLP#
H_DPWR# 5
H_PWRGD
H_CPUSLP#
PM_PSI# 32
Reserved for EMI.
VCCP
12
C67
C67
0.1U/10V_NC
0.1U/10V_NC
VCC1.5
COMP0
COMP1
COMP2
COMP3
R412
R412
R28
R28
R27
R27
27.4/F
27.4/F
54.9/F
54.9/F
1 2
1 2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
7
R411
R411
54.9/F
54.9/F
27.4/F
27.4/F
1 2
1 2
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
CPU-Host Bus
CPU-Host Bus
CPU-Host Bus
of
335Wednesday, October 03, 2007
335Wednesday, October 03, 2007
335Wednesday, October 03, 2007
8
1A
1A
1A
PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com
1
CPU Power & GND
A A
B B
C C
D D
VCC_CORE
C63
C63
22U/10V
22U/10V
C65
C65
22U/10V
22U/10V
12
12
C613
C613
22U/10V
22U/10V
C61
C61
22U/10V
22U/10V
12
VCC_CORE
12
8 inside cavity, north side, secondary layer.
VCC_CORE
12
VCC_CORE
12
C48
C48
22U/10V
22U/10V
C58
C58
22U/10V
22U/10V
12
12
C44
C44
22U/10V
22U/10V
C53
C53
22U/10V
22U/10V
8 inside cavity, south side, secondary layer.
VCC_CORE
12
C41
C41
22U/10V
22U/10V
12
C40
C40
22U/10V
22U/10V
6 inside cavity, north side, primary layer.
VCC_CORE
12
C612
C612
22U/10V
22U/10V
12
C614
C614
22U/10V
22U/10V
6 inside cavity, south side, primary layer.
VCCP
C55
C55
0.1U/10V
0.1U/10V
12
C54
C54
0.1U/10V
0.1U/10V
12
Layout out:
Place these inside socket cavity on North side secondary.
1
12
12
12
12
12
12
12
C615
C615
22U/10V
22U/10V
C623
C623
22U/10V
22U/10V
C59
C59
22U/10V
22U/10V
C39
C39
22U/10V
22U/10V
C38
C38
22U/10V
22U/10V
C616
C616
22U/10V
22U/10V
C49
C49
0.1U/10V
0.1U/10V
2
C46
C46
22U/10V
22U/10V
C622
C622
22U/10V
22U/10V
C45
C45
0.1U/10V
0.1U/10V
12
12
12
12
12
12
12
12
C617
C617
22U/10V
22U/10V
12
C625
C625
22U/10V
22U/10V
12
C56
C56
22U/10V
22U/10V
12
C64
C64
22U/10V
22U/10V
C43
C43
22U/10V
22U/10V
C618
C618
22U/10V
22U/10V
C51
C51
0.1U/10V
0.1U/10V
12
12
12
12
12
12
2
C619
C619
22U/10V
22U/10V
C62
C62
22U/10V
22U/10V
C52
C52
22U/10V
22U/10V
C60
C60
22U/10V
22U/10V
C50
C50
22U/10V
22U/10V
C624
C624
22U/10V
22U/10V
C47
C47
0.1U/10V
0.1U/10V
3
4
http://hobi-elektronika.net
VCC_CORE VCC_CORE
3
U29C
U29C
A7
VCC[001]
A9
VCC[002]
A10
VCC[003]
A12
VCC[004]
A13
VCC[005]
A15
VCC[006]
A17
VCC[007]
A18
VCC[008]
A20
VCC[009]
B7
VCC[010]
B9
VCC[011]
B10
VCC[012]
B12
VCC[013]
B14
VCC[014]
B15
VCC[015]
B17
VCC[016]
B18
VCC[017]
B20
VCC[018]
C9
VCC[019]
C10
VCC[020]
C12
VCC[021]
C13
VCC[022]
C15
VCC[023]
C17
VCC[024]
C18
VCC[025]
D9
VCC[026]
D10
VCC[027]
D12
VCC[028]
D14
VCC[029]
D15
VCC[030]
D17
VCC[031]
D18
VCC[032]
E7
VCC[033]
E9
VCC[034]
E10
VCC[035]
E12
VCC[036]
E13
VCC[037]
E15
VCC[038]
E17
VCC[039]
E18
VCC[040]
E20
VCC[041]
F7
VCC[042]
F9
VCC[043]
F10
VCC[044]
F12
VCC[045]
F14
VCC[046]
F15
VCC[047]
F17
VCC[048]
F18
VCC[049]
F20
VCC[050]
AA7
VCC[051]
AA9
VCC[052]
AA10
VCC[053]
AA12
VCC[054]
AA13
VCC[055]
AA15
VCC[056]
AA17
VCC[057]
AA18
VCC[058]
AA20
VCC[059]
AB9
VCC[060]
AC10
VCC[061]
AB10
VCC[062]
AB12
VCC[063]
AB14
VCC[064]
AB15
VCC[065]
AB17
VCC[066]
AB18
VCC[067]
Merom Ball-out Rev 1a
Merom Ball-out Rev 1a
VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]
VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]
VCCA[01]
VCCA[02]
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
VCCSENSE
VSSSENSE
4
5
6
7
8
04
ICCODE:
for Merom processors
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
B26
C26
AD6
AF5
AE5
AF4
AE3
AF3
AE2
AF7
AE7
.
.
recommended design
target is 44A
VCCP
12
+
+
ICCA 130mA
CPU_VID0 32
CPU_VID1 32
CPU_VID2 32
CPU_VID3 32
CPU_VID4 32
CPU_VID5 32
CPU_VID6 32
VCCSENSE
VSSSENSE
VCCSENSE 32
VSSSENSE 32
Route VCCSENSE and VSSSENSE
traces at 27.4ohms and
length matched to within 25
mil. Place PU and PD within
2 inch of CPU.
ICCP:
1before vccore stable
peak current is 4.5A
2.after vccore stable
continue current is
2.5A
C34
C34
330U/2.5V
330U/2.5V
12
C641
C641
.01U/25V
.01U/25V
Layout Note:
Place C105 near PIN
B26.
VCC_CORE
12
R398
R398
100/F
100/F
VCCSENSE
VSSSENSE
12
R397
R397
100/F
100/F
5
VCC1.5
12
C642
C642
10U/4V
10U/4V
6
U29D
U29D
A4
VSS[001]
A8
VSS[002]
A11
VSS[003]
A14
VSS[004]
A16
VSS[005]
A19
VSS[006]
A23
VSS[007]
AF2
VSS[008]
B6
VSS[009]
B8
VSS[010]
B11
VSS[011]
B13
VSS[012]
B16
VSS[013]
B19
VSS[014]
B21
VSS[015]
B24
VSS[016]
C5
VSS[017]
C8
VSS[018]
C11
VSS[019]
C14
VSS[020]
C16
VSS[021]
C19
VSS[022]
C2
VSS[023]
C22
VSS[024]
C25
VSS[025]
D1
VSS[026]
D4
VSS[027]
D8
VSS[028]
D11
VSS[029]
D13
VSS[030]
D16
VSS[031]
D19
VSS[032]
D23
VSS[033]
D26
VSS[034]
E3
VSS[035]
E6
VSS[036]
E8
VSS[037]
E11
VSS[038]
E14
VSS[039]
E16
VSS[040]
E19
VSS[041]
E21
VSS[042]
E24
VSS[043]
F5
VSS[044]
F8
VSS[045]
F11
VSS[046]
F13
VSS[047]
F16
VSS[048]
F19
VSS[049]
F2
VSS[050]
F22
VSS[051]
F25
VSS[052]
G4
VSS[053]
G1
VSS[054]
G23
VSS[055]
G26
VSS[056]
H3
VSS[057]
H6
VSS[058]
H21
VSS[059]
H24
VSS[060]
J2
VSS[061]
J5
VSS[062]
J22
VSS[063]
J25
VSS[064]
K1
VSS[065]
K4
VSS[066]
K23
VSS[067]
K26
VSS[068]
L3
VSS[069]
L6
VSS[070]
L21
VSS[071]
L24
VSS[072]
M2
VSS[073]
M5
VSS[074]
M22
VSS[075]
M25
VSS[076]
N1
VSS[077]
N4
VSS[078]
N23
VSS[079]
N26
VSS[080]
VSS[081]P3VSS[162]
Merom Ball-out Rev 1a
Merom Ball-out Rev 1a
P6
VSS[082]
P21
VSS[083]
P24
VSS[084]
R2
VSS[085]
R5
VSS[086]
R22
VSS[087]
R25
VSS[088]
T1
VSS[089]
T4
VSS[090]
T23
VSS[091]
T26
VSS[092]
U3
VSS[093]
U6
VSS[094]
U21
VSS[095]
U24
VSS[096]
V2
VSS[097]
V5
VSS[098]
V22
VSS[099]
V25
VSS[100]
W1
VSS[101]
W4
VSS[102]
W23
VSS[103]
W26
VSS[104]
Y3
VSS[105]
Y6
VSS[106]
Y21
VSS[107]
Y24
VSS[108]
AA2
VSS[109]
AA5
VSS[110]
AA8
VSS[111]
AA11
VSS[112]
AA14
VSS[113]
AA16
VSS[114]
AA19
VSS[115]
AA22
VSS[116]
AA25
VSS[117]
AB1
VSS[118]
AB4
VSS[119]
AB8
VSS[120]
AB11
VSS[121]
AB13
VSS[122]
AB16
VSS[123]
AB19
VSS[124]
AB23
VSS[125]
AB26
VSS[126]
AC3
VSS[127]
AC6
VSS[128]
AC8
VSS[129]
AC11
VSS[130]
AC14
VSS[131]
AC16
VSS[132]
AC19
VSS[133]
AC21
VSS[134]
AC24
VSS[135]
AD2
VSS[136]
AD5
VSS[137]
AD8
VSS[138]
AD11
VSS[139]
AD13
VSS[140]
AD16
VSS[141]
AD19
VSS[142]
AD22
VSS[143]
AD25
VSS[144]
AE1
VSS[145]
AE4
VSS[146]
AE8
VSS[147]
AE11
VSS[148]
AE14
VSS[149]
AE16
VSS[150]
AE19
VSS[151]
AE23
VSS[152]
AE26
VSS[153]
A2
VSS[154]
AF6
VSS[155]
AF8
VSS[156]
AF11
VSS[157]
AF13
VSS[158]
AF16
VSS[159]
AF19
VSS[160]
AF21
VSS[161]
A25
AF25
VSS[163]
.
.
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
7
CPU-Power/NC
CPU-Power/NC
CPU-Power/NC
1A
1A
1A
of
435Wednesday, October 03, 2007
435Wednesday, October 03, 2007
435Wednesday, October 03, 2007
8
PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com
1
Crestline-Host, VSS 05
H_D#[0..63]3
A A
VCCP
12
R421
R421
221/F
221/F
H_SWING
12
R420
R420
100/F
100/F
B B
VCCP
impedance 55 ohm
12
12
R42
R42
R43
R43
54.9/F
54.9/F
54.9/F
54.9/F
H_SCOMP
H_SCOMP#
Layout Note:
R416
R416
H_RCOMP trace
24.9/F
24.9/F
should be 10-mil
wide with 20-mil
spacing.
VCCP
H_RCOMP
R426
R426
1K/F
1K/F
1 2
12
R422
R422
2K/F
2K/F
12
C C
D D
H_D#[0..63]
C652
C652
0.1U/10V
0.1U/10V
1 2
H_RESET#
H_CPUSLP#
12
C662
C662
0.1U/10V
0.1U/10V
Layout Note:
Place the 0.1 uF
decoupling capacitor
within 100 mils from
GMCH pins.
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_SWING
H_RCOMP
H_SCOMP
H_SCOMP#
H_REF
2
3
4
5
6
7
8
http://hobi-elektronika.net
U36J
U36J
C46
C50
C7
D13
D24
D3
D32
D39
D45
D49
E10
E16
E24
E28
E32
E47
F19
F36
F4
F40
F50
G1
G13
G16
G19
G24
G28
G29
G33
G42
G45
G48
G8
H24
H28
H4
H45
J11
J16
J2
J24
J28
J33
J35
J39
K12
K47
K8
L1
L17
L20
L24
L28
L3
L33
L49
M28
M42
M46
M49
M5
M50
M9
N11
N14
N17
N29
N32
N36
N39
N44
N49
N7
P19
P2
P23
P3
P50
R49
T39
T43
T47
U41
U45
U50
V2
V3
CRESTLINE_1p0
CRESTLINE_1p0
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS
VSS
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
W11
W39
W43
W47
W5
W7
Y13
Y2
Y41
Y45
Y49
Y5
Y50
Y11
P29
T29
T31
T33
R28
AA32
AB32
AD32
AF28
AF29
AT27
AV25
H50
W10
AD12
AC14
AD11
AC11
AJ14
AE11
AH12
AH13
E2
G2
G7
M6
H7
H3
G4
F3
N8
H2
M10
N12
N9
H5
P13
K9
M2
Y8
V4
M3
J1
N5
N3
W6
W9
N2
Y7
Y9
P4
W3
N1
AE3
AD9
AC9
AC7
AB2
AD7
AB1
Y3
AC6
AE2
AC5
AG3
AJ9
AH8
AE9
AJ5
AH5
AJ6
AE7
AJ7
AJ2
AE5
AJ3
AH2
B3
C2
W1
W2
B6
E5
B9
A9
U36A
U36A
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
H_SWING
H_RCOMP
H_SCOMP
H_SCOMP#
H_CPURST#
H_CPUSLP#
H_AVREF
H_DVREF
CRESTLINE_1p0
CRESTLINE_1p0
HOST
HOST
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35
H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
H_RS#_0
H_RS#_1
H_RS#_2
J13
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19
G12
H17
G20
C8
E8
F12
D6
C10
AM5
AM7
H8
K7
E4
C6
G10
B7
K5
L2
AD13
AE13
M7
K3
AD2
AH11
L7
K2
AC2
AJ10
M14
E13
A11
H13
B12
E12
D7
D8
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_A#[3..35]
H_ADS# 3
H_ADSTB#0 3
H_ADSTB#1 3
H_BNR# 3
H_BPRI#
H_BR0# 3
H_DEFER#
H_DBSY# 3
CLK_MCH_BCLK 2
CLK_MCH_BCLK# 2
H_DPWR# 3
H_DRDY# 3
H_HIT# 3
H_HITM# 3
H_LOCK# 3
H_TRDY#
H_DINV#0 3
H_DINV#1 3
H_DINV#2 3
H_DINV#3 3
H_DSTBN#0 3
H_DSTBN#1 3
H_DSTBN#2 3
H_DSTBN#3 3
H_DSTBP#0 3
H_DSTBP#1 3
H_DSTBP#2 3
H_DSTBP#3 3
H_REQ#0 3
H_REQ#1 3
H_REQ#2 3
H_REQ#3 3
H_REQ#4 3
H_RS#0
H_RS#1
H_RS#2
H_A#[3..35] 3
AA21
AA24
AA29
AB20
AB23
AB26
AB28
AB31
AC10
AC13
AC39
AC43
AC47
AD21
AD26
AD29
AD41
AD45
AD49
AD50
AE10
AE14
AF20
AF23
AF24
AF31
AG2
AG38
AG43
AG47
AG50
AH3
AH40
AH41
AH7
AH9
AJ11
AJ13
AJ21
AJ24
AJ29
AJ32
AJ43
AJ45
AJ49
AK20
AK21
AK26
AK28
AK31
AK51
AM11
AM13
AM3
AM4
AM41
AM45
AN1
AN38
AN39
AN43
AN5
AN7
AP4
AP48
AP50
AR11
AR2
AR39
AR44
AR47
AR7
AT10
AT14
AT41
AT49
AU1
AU23
AU29
AU3
AU36
AU49
AU51
AV39
AV48
AW1
AW12
AW16
A13
A15
A17
A24
AC3
AD1
AD3
AD5
AD8
AE6
AL1
U36I
U36I
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
CRESTLINE_1p0
CRESTLINE_1p0
VSS
VSS
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
AW24
AW29
AW32
AW5
AW7
AY10
AY24
AY37
AY42
AY43
AY45
AY47
AY50
B10
B20
B24
B29
B30
B35
B38
B43
B46
B5
B8
BA1
BA17
BA18
BA2
BA24
BB12
BB25
BB40
BB44
BB49
BB8
BC16
BC24
BC25
BC36
BC40
BC51
BD13
BD2
BD28
BD45
BD48
BD5
BE1
BE19
BE23
BE30
BE42
BE51
BE8
BF12
BF16
BF36
BG19
BG2
BG24
BG29
BG39
BG48
BG5
BG51
BH17
BH30
BH44
BH46
BH8
BJ11
BJ13
BJ38
BJ4
BJ42
BJ46
BK15
BK17
BK25
BK29
BK36
BK40
BK44
BK6
BK8
BL11
BL13
BL19
BL22
BL37
BL47
C12
C16
C19
C28
C29
C33
C36
C41
1
2
3
4
PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
5
6
Date: Sheet of
7
Crestline-Host,VSS
Crestline-Host,VSS
Crestline-Host,VSS
535Wednesday, October 03, 2007
535Wednesday, October 03, 2007
535Wednesday, October 03, 2007
8
1A
1A
1A
of
1
Crestline-VGA, DMI 06
1.8VSUS
A A
SM_RCOMP_VOH
12
SM_RCOMP_VOL
12
WW22 update --- MA14
needs to be routedif
customers are planning on
using 2Gb technology and
width=8 (by 8) DIMMs
B B
C C
C225
C225
.01U/25V
.01U/25V
C690
C690
.01U/25V
.01U/25V
DELAY_VR_PWRGOOD18,32
12
12
PM_BMBUSY#18
PM_THRMTRIP#3,16
GMCH pwrok is 3.3v tolerant
VCC3
R65 10KR65 10K
1 2
R130 10KR130 10K
1 2
D D
CLK_PCIE_3GPLL
CLK_PCIE_3GPLL#
12
R117
R117
1K/F
1K/F
12
C248
C248
2.2U/10V
2.2U/10V
C680
C680
2.2U/10V
2.2U/10V
H_DPRSTP#3,16
PM_EXTTS#010
PM_EXTTS#110
PLT_RST-R#15,17
DPRSLPVR18,32
1
R139
R139
3.01K/F
3.01K/F
12
R452
R452
1K/F
1K/F
SA_MA14
SB_MA14
CRESTLINE new
pin define
Layout Note:
Location of all MCH_CFG strap
resistors needs to be close to
minmize stub.
MCH_BSEL02
MCH_BSEL12
MCH_BSEL22
MCH_CFG_57
MCH_CFG_97
MCH_CFG_127
MCH_CFG_137
MCH_CFG_167
MCH_CFG_197
MCH_CFG_207
C855
C855
*22P
*22P
PM_EXTTS#0
PM_EXTTS#1
C856
C856
*22P
*22P
T186 PADT186 PAD
T61 PADT61 PAD
T12T12
T150T150
T15T15
T10T10
T21T21
T27T27
T25T25
T20T20
T11T11
T23T23
T37T37
R479 0R479 0
R478 0R478 0
R129 0R129 0
R62 100R62 100
R67 *0R67 *0
R477 0R477 0
2
MCH_CFG_5
MCH_CFG_9
MCH_CFG_12
MCH_CFG_13
MCH_CFG_16
MCH_CFG_19
MCH_CFG_20
PM_BMBUSY#_R
ICH_DPRSTP#_R
PM_EXTTS#1_R
PLTRST_MCH#
PM_THRMTRIP#_GMCH
PM_DPRSLPVR_GMCH
TP_NC1
T183T183
TP_NC2
T185T185
TP_NC3
T182T182
TP_NC4
T176T176
TP_NC5
T174T174
TP_NC6
T139T139
TP_NC7
T137T137
TP_NC8
T135T135
TP_NC9
T134T134
TP_NC10
T133T133
TP_NC11
T138T138
TP_NC12
T187T187
TP_NC13
T181T181
TP_NC14
T178T178
TP_NC15
T173T173
TP_NC16
T136T136
2
CFG3
CFG4
CFG6
CFG7
CFG8
CFG10
CFG11
CFG14
CFG15
CFG17
CFG18
P36
P37
R35
N35
AR12
AR13
AM12
AN13
J12
AR37
AM36
AL36
AM37
D20
H10
B51
BJ20
BK22
BF19
BH20
BK18
BJ18
BF23
BG23
BC23
BD24
BJ29
BE24
BH39
AW20
BK20
C48
D47
B44
C44
A35
B37
B36
B34
C34
P27
N27
N24
C21
C23
F23
N23
G23
J20
C20
R24
L23
J23
E23
E20
K23
M20
M24
L32
N33
L35
G41
L39
L36
J36
AW49
AV20
N20
G36
BJ51
BK51
BK50
BL50
BL49
BL3
BL2
BK1
BJ1
E1
A5
C51
B50
A50
A49
BK2
CRESTLINE_1p0
CRESTLINE_1p0
U36B
U36B
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
RSVD30
RSVD31
SA-MA14
SB_MA14
RSVD34
RSVD35
RSVD36
LVDSA_DATA#_3
LVDSA_DATA_3
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
PM_BM_BUSY#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
DDR MUXINGCLKDMI
DDR MUXINGCLKDMI
CFGRSVD
CFGRSVD
PM
PM
GRAPHICS VIDME
GRAPHICS VIDME
NC
NC
MISC
MISC
3
SM_CK_0
SM_CK_1
SM_CK_3
SM_CK_4
SM_CK#_0
SM_CK#_1
SM_CK#_3
SM_CK#_4
SM_CKE_0
SM_CKE_1
SM_CKE_3
SM_CKE_4
SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3
SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3
SM_RCOMP
SM_RCOMP#
SM_RCOMP_VOH
SM_RCOMP_VOL
SM_VREF_0
SM_VREF_1
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
PEG_CLK
PEG_CLK#
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VR_EN
CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF
SDVO_CTRL_CLK
SDVO_CTRL_DATA
CLK_REQ#
ICH_SYNC#
TEST_1
TEST_2
3
4
5
http://hobi-elektronika.net
T47T47
BLON12
AV29
BB23
BA25
AV23
AW30
BA23
AW25
AW23
BE29
AY32
BD39
BG37
BG20
BK16
BG16
BE13
BH18
BJ15
BJ14
BE16
BL15
BK14
BK31
BL31
AR49
AW4
B42
C42
H48
H47
K44
K45
AN47
AJ38
AN42
AN46
AM47
AJ39
AN41
AN45
AJ46
AJ41
AM40
AM44
AJ47
AJ42
AM39
AM43
E35
A39
C38
B39
E36
AM49
AK50
AT43
AN49
AM50
H35
K36
G39
G40
A37
R32
DREFCLK
DREFCLK#
DREFSSCLK
DREFSSCLK#
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
M_A_CLK0 10
M_A_CLK1 10
M_B_CLK0 10
M_B_CLK1 10
M_A_CLK0# 10
M_A_CLK1# 10
M_B_CLK0# 10
M_B_CLK1# 10
M_A_CKE0 10
M_A_CKE1 10
M_B_CKE0 10
M_B_CKE1 10
M_A_CS#0 10
M_A_CS#1 10
M_B_CS#0 10
M_B_CS#1 10
M_A_ODT0 10
M_A_ODT1 10
M_B_ODT0 10
M_B_ODT1 10
SMRCOMPP
SMRCOMPN
SM_RCOMP_VOH
SM_RCOMP_VOL
SMDDR_VREF_MCHSMDDR_VREF_MCH
R185 *10K/FR185 *10K/F
R186 *10K/FR186 *10K/F
DFGT_VID_0
DFGT_VID_1
DFGT_VID_2
DFGT_VID_3
DFGT_VR_EN
CL_CLK0 18
CL_DATA0 18
ECPWROK 18,28
CL_RST#0
MCH_CLVREF
T42T42
T46T46
PCIE_REQ4# 2
MCH_ICH_SYNC# 18
R118
R118
20K
20K
1 2
1 2
R1340R134
0
4
DREFCLK 2
DREFCLK# 2
DREFSSCLK
DREFSSCLK#
CLK_PCIE_3GPLL
CLK_PCIE_3GPLL#
DMI_TXN[3:0] 17
DMI_TXP[3:0] 17
DMI_RXN[3:0] 17
DMI_RXP[3:0] 17
T41T41
T163T163
T160T160
T164T164
T44T44
<check list & CRB>
For Calero : 1.5K
For Cresstline:2.4K
C102 0.1U/10VC102 0.1U/10V
C376 0.1U/10VC376 0.1U/10V
R184 0R184 0
1.8VSUS
R107 0R107 0
<check lisr & CRB>
For Calero : 255
For Cresstline:1.3K/F
For external VGA:0 ohm
C732
C732
0.1U/10V
0.1U/10V
1 2
SMDDR_VREF
IV&EV Dis/Enable setting
In Crestline EDS Rev.1.0, Render Standby
Voltage is not finalized yet(TBD), 1.05V for
Graphic Voltage range(VCC_AXG)is between
0.9975V(min.) and 1.1025V(max.). Vgfx max at
1.1025V @ 8A (estimated)
only resever AT3/5 not
support IAMT,but design
line suggest to connection
these pin ,do not NC
CLKREQ# ( MCH drives
CLK_REQ# to control the
PCI-E diff clk inputitself )
12
R484
R484
1K/F
1K/F
12
R483
R483
392/F
392/F
EDIDCLK12,21
EDIDDATA12,21
DIGON12,21
VCC3
<FAE>
If no use can be NC
CRT_B11
CRT_G11
CRT_R11
DVICLK11,20
DVIDAT11,20
HSYNC_COM11
VSYNC_COM11
SMRCOMPPMCH_CLVREF
SMRCOMPN
VCC3
R140 *IV@2.4KR140 *IV@2.4K
IV&EV Dis/Enable
setting
R87 *2.2KR87 *2.2K
R70 *2.2KR70 *2.2K
R101 *0R101 *0
R103 *0R103 *0
R99 *0R99 *0
1.8VSUS+1.25V
12
R57
R57
20/F
20/F
12
R53
R53
20/F
20/F
5
EDIDCLK
EDIDDATA
UA_CLK#11
LA_DATAN0
LA_DATAN1
LA_DATAN2
LA_DATAP0
LA_DATAP1
LA_DATAP2
UA_DATAN0
UA_DATAN1
UA_DATAN2
UA_DATAP0
UA_DATAP1
UA_DATAP2
R123 *0R123 *0
R131 *0R131 *0
R114 *39R114 *39
R120 *39R120 *39
<check list>
HSYNC/VSYNC serial R
place close to NB
R136 *0R136 *0
R58 10KR58 10K
R122 *0R122 *0
R112 *0R112 *0
R153 *0R153 *0
LA_CLK#11
LA_CLK11
UA_CLK11
CRT_BLUE1
CRT_GREEN1
CRT_RED1
6
U36C
U36C
J40
L_BKLT_CTRL
H39
L_BKLT_EN
E39
L_CTRL_CLK
E40
L_CTRL_DATA
C37
L_DDC_CLK
D35
L_DDC_DATA
K40
LVDS_IBG
T58
T58
TV_DCONSEL_0
TV_DCONSEL_1
DDCCLK_R
DDCDATA_R
HSYNC11
CRTIREF
VSYNC11
<FAE>
If no use DREFCLK PU and DREFCLK# PD
<design guide>
If no use DREFCLK PU and DREFCLK# PD
<check list>
For EV@
Connect to GND
CRT R/G/B
TV A/B/C
HSYNC/VSYNC
L_VDD_EN
L41
LVDS_IBG
*PAD
*PAD
L43
LVDS_VBG
N41
LVDS_VREFH
N40
LVDS_VREFL
D46
LVDSA_CLK#
C45
LVDSA_CLK
D44
LVDSB_CLK#
E42
LVDSB_CLK
G51
LVDSA_DATA#_0
E51
LVDSA_DATA#_1
F49
LVDSA_DATA#_2
G50
LVDSA_DATA_0
E50
LVDSA_DATA_1
F48
LVDSA_DATA_2
G44
LVDSB_DATA#_0
B47
LVDSB_DATA#_1
B45
LVDSB_DATA#_2
E44
LVDSB_DATA_0
A47
LVDSB_DATA_1
A45
LVDSB_DATA_2
E27
TVA_DAC
G27
TVB_DAC
K27
TVC_DAC
F27
TVA_RTN
J27
TVB_RTN
L27
TVC_RTN
M35
TV_DCONSEL_0
P33
TV_DCONSEL_1
H32
CRT_BLUE
G32
CRT_BLUE#
K29
CRT_GREEN
J29
CRT_GREEN#
F29
CRT_RED
E29
CRT_RED#
K33
CRT_DDC_CLK
G35
CRT_DDC_DATA
F33
CRT_HSYNC
C32
CRT_TVO_IREF
E33
CRT_VSYNC
CRESTLINE_1p0
CRESTLINE_1p0
R159 EV@4.7KR159 EV@4.7K
DREFSSCLK
R155 EV@4.7KR155 EV@4.7K
DREFSSCLK#
IV&EV Dis/Enable setting
R149 EV@4.7KR149 EV@4.7K
DREFCLK
DREFCLK#
R145 EV@4.7KR145 EV@4.7K
R115 EV@0R115 EV@0
R119 EV@0R119 EV@0
R102 EV@0R102 EV@0
R104 EV@0R104 EV@0
R100 EV@0R100 EV@0
6
LVDS
LVDS
TV VGA
TV VGA
+1.25V
+1.25V
<check list>
For IV@
Connect to 150ohm
CRT R/G/B
TV A/B/C
Connect to 39ohm
HSYNC/VSYNC
HSYNC11
VSYNC11
CRT_BLUE1
CRT_GREEN1
CRT_RED1
7
PEG_COMPI
PEG_COMPO
PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15
PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15
PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PCI-EXPRESS GRAPHICS
PCI-EXPRESS GRAPHICS
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15
N43
M43
J51
L51
N47
T45
T50
U40
Y44
Y40
AB51
W49
AD44
AD40
AG46
AH49
AG45
AG41
J50
L50
M47
U44
T49
T41
W45
W41
AB50
Y48
AC45
AC41
AH47
AG49
AH45
AG42
N45
U39
U47
N51
R50
T42
Y43
W46
W38
AD39
AC46
AC49
AC42
AH39
AE49
AH44
M45
T38
T46
N50
R51
U43
W42
Y47
Y39
AC38
AD47
AC50
AD43
AG39
AE50
AH43
VCC3G_PCIE_R
PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15
PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15
C_PEG_TXN0
C_PEG_TXN1
C_PEG_TXN2
C_PEG_TXN3
C_PEG_TXN4
C_PEG_TXN5
C_PEG_TXN6
C_PEG_TXN7
C_PEG_TXN8
C_PEG_TXN9
C_PEG_TXN10
C_PEG_TXN11
C_PEG_TXN12
C_PEG_TXN13
C_PEG_TXN14
C_PEG_TXN15
C_PEG_TXP0
C_PEG_TXP1
C_PEG_TXP2
C_PEG_TXP3
C_PEG_TXP4
C_PEG_TXP5
C_PEG_TXP6
C_PEG_TXP7
C_PEG_TXP8
C_PEG_TXP9
C_PEG_TXP10
C_PEG_TXP11
C_PEG_TXP12
C_PEG_TXP13
C_PEG_TXP14
C_PEG_TXP15
1 2
R146 24.9/FR146 24.9/FR61 10KR61 10K
C372 .1U/10VC372 .1U/10V
C721 .1U/10VC721 .1U/10V
C393 .1U/10VC393 .1U/10V
C735 .1U/10VC735 .1U/10V
C723 .1U/10VC723 .1U/10V
C365 .1U/10VC365 .1U/10V
C737 .1U/10VC737 .1U/10V
C725 .1U/10VC725 .1U/10V
C368 .1U/10VC368 .1U/10V
C739 .1U/10VC739 .1U/10V
C727 .1U/10VC727 .1U/10V
C743 .1U/10VC743 .1U/10V
C729 .1U/10VC729 .1U/10V
C745 .1U/10VC745 .1U/10V
C731 .1U/10VC731 .1U/10V
C747 .1U/10VC747 .1U/10V
C371 .1U/10VC371 .1U/10V
C720 .1U/10VC720 .1U/10V
C392 .1U/10VC392 .1U/10V
C734 .1U/10VC734 .1U/10V
C722 .1U/10VC722 .1U/10V
C366 .1U/10VC366 .1U/10V
C736 .1U/10VC736 .1U/10V
C724 .1U/10VC724 .1U/10V
C367 .1U/10VC367 .1U/10V
C738 .1U/10VC738 .1U/10V
C726 .1U/10VC726 .1U/10V
C742 .1U/10VC742 .1U/10V
C728 .1U/10VC728 .1U/10V
C744 .1U/10VC744 .1U/10V
C730 .1U/10VC730 .1U/10V
C746 .1U/10VC746 .1U/10V
8
+VCC_PEG
PEG_RXN0 15
PEG_RXN1 15
PEG_RXN2 15
PEG_RXN3 15
PEG_RXN4 15
PEG_RXN5 15
PEG_RXN6 15
PEG_RXN7 15
PEG_RXN8 15
PEG_RXN9 15
PEG_RXN10 15
PEG_RXN11 15
PEG_RXN12 15
PEG_RXN13 15
PEG_RXN14 15
PEG_RXN15 15
PEG_RXP0 15
PEG_RXP1 15
PEG_RXP2 15
PEG_RXP3 15
PEG_RXP4 15
PEG_RXP5 15
PEG_RXP6 15
PEG_RXP7 15
PEG_RXP8 15
PEG_RXP9 15
PEG_RXP10 15
PEG_RXP11 15
PEG_RXP12 15
PEG_RXP13 15
PEG_RXP14 15
PEG_RXP15 15
PEG_TXN_C0 15
PEG_TXN_C1 15
PEG_TXN_C2 15
PEG_TXN_C3 15
PEG_TXN_C4 15
PEG_TXN_C5 15
PEG_TXN_C6 15
PEG_TXN_C7 15
PEG_TXN_C8 15
PEG_TXN_C9 15
PEG_TXN_C10 15
PEG_TXN_C11 15
PEG_TXN_C12 15
PEG_TXN_C13 15
PEG_TXN_C14 15
PEG_TXN_C15 15
PEG_TXP_C0 15
PEG_TXP_C1 15
PEG_TXP_C2 15
PEG_TXP_C3 15
PEG_TXP_C4 15
PEG_TXP_C5 15
PEG_TXP_C6 15
PEG_TXP_C7 15
PEG_TXP_C8 15
PEG_TXP_C9 15
PEG_TXP_C10 15
PEG_TXP_C11 15
PEG_TXP_C12 15
PEG_TXP_C13 15
PEG_TXP_C14 15
PEG_TXP_C15 15
IV&EV Dis/Enable setting
<check list>
SDVO/PCIE/LVDS
EMI Reserve
EDIDCLK
C213 *10P/50VC213 *10P/50V
EDIDDATA
C199 *10P/50VC199 *10P/50V
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
7
not implement 16 lanes NC
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
Crestline-VGA,DMI
Crestline-VGA,DMI
Crestline-VGA,DMI
635Wednesday, October 03, 2007
635Wednesday, October 03, 2007
635Wednesday, October 03, 2007
8
1A
1A
1A
of
PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com
1
Crestline-DDR 07
M_A_DQ[63:0]10
A A
B B
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
AR43
AW44
BA45
AY46
AR41
AR45
AT42
AW47
BB45
BF48
BG47
BJ45
BB47
BG50
BH49
BE45
AW43
BE44
BG42
BE40
BF44
BH45
BG40
BF40
AR40
AW40
AT39
AW36
AW41
AY41
AV38
AT38
AV13
AT13
AW11
AV11
AU15
AT11
BA13
BA11
BE10
BD10
BG10
AW9
AN10
AN11
BD8
AY9
BD7
BB9
BB5
AY7
AT5
AT7
AY6
BB7
AR5
AR8
AR9
AN3
AM8
AT9
AN9
AM9
2
U36D
U36D
SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63
CRESTLINE_1p0
CRESTLINE_1p0
3
4
5
6
7
8
http://hobi-elektronika.net
M_B_DQ[63:0]10
BB19
SA_BS_0
BK19
SA_BS_1
BF29
SA_BS_2
BL17
SA_CAS#
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_RAS#
SA_RCVEN#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_WE#
AT45
BD44
BD42
AW38
AW13
BG8
AY5
AN6
AT46
BE48
BB43
BC37
BB16
BH6
BB2
AP3
AT47
BD47
BC41
BA37
BA16
BH7
BC1
AP2
BJ19
BD20
BK27
BH28
BL24
BK28
BJ27
BJ25
BL28
BA28
BC19
BE28
BG30
BJ16
BE18
AY20
BA19
M_A_DQM0
M_A_DQM1
M_A_DQM2
M_A_DQM3
M_A_DQM4
M_A_DQM5
M_A_DQM6
M_A_DQM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
TP_SA_RCVEN#
M_A_BS#0 10
M_A_BS#1 10
M_A_BS#2 10
M_A_CAS# 10
M_A_DQM[0..7] 10
M_A_DQS[7:0] 10
M_A_DQS#[7:0] 10
M_A_A[13:0] 10
M_A_RAS# 10
T18T18
M_A_WE# 10
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AP49
AR51
AW50
AW51
AN51
AN50
AV50
AV49
BA50
BB50
BA49
BE50
BA51
AY49
BF50
BF49
BJ50
BJ44
BJ43
BL43
BK47
BK49
BK43
BK42
BJ41
BL41
BJ37
BJ36
BK41
BJ40
BL35
BK37
BK13
BE11
BK11
BC11
BC13
BE12
BC12
BG12
BJ10
BK10
BL9
BK5
BL5
BK9
BJ8
BJ6
BF4
BH5
BG1
BC2
BK3
BE4
BD3
BJ2
BA3
BB3
AR1
AT3
AY2
AY3
AU2
AT2
U36E
U36E
SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63
CRESTLINE_1p0
CRESTLINE_1p0
AY17
SB_BS_0
BG18
SB_BS_1
BG36
SB_BS_2
BE17
SB_CAS#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_RAS#
SB_RCVEN#
SB_WE#
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
AR50
BD49
BK45
BL39
BH12
BJ7
BF3
AW2
AT50
BD50
BK46
BK39
BJ12
BL7
BE2
AV2
AU50
BC50
BL45
BK38
BK12
BK7
BF2
AV3
BC18
BG28
BG25
AW17
BF25
BE25
BA29
BC28
AY28
BD37
BG17
BE37
BA39
BG13
AV16
AY18
BC17
M_B_DQM0
M_B_DQM1
M_B_DQM2
M_B_DQM3
M_B_DQM4
M_B_DQM5
M_B_DQM6
M_B_DQM7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
TP_SB_RCVEN#
M_B_BS#0 10
M_B_BS#1 10
M_B_BS#2 10
M_B_CAS# 10
M_B_DQM[0..7] 10
M_B_DQS[7:0] 10
M_B_DQS#[7:0] 10
M_B_A[13:0] 10
M_B_RAS# 10
T14 PADT14 PAD
M_B_WE# 10
C C
D D
MCH_CFG_5
MCH_CFG_9
MCH_CFG_16
MCH_CFG_19
MCH_CFG_20
MCH_CFG_56
MCH_CFG_96
MCH_CFG_126
MCH_CFG_136
MCH_CFG_166
MCH_CFG_196
MCH_CFG_206
Low = DMIX2
High = IDMIX4(Default)
Low = Reverse Lane
High = Normal operation(Default)
0
0
1
1
0
1
0
1
Low = ODT Disable
High = ODT Enable(Default)
Low = Normal operation(Default)
High = Reverse Lane
Low = Only SDVO or PCIE X1 is
operational(Default)
High = SDVO andPCIE X1 are operating
simultaneously via the PEG port
1
ConfigurationMCH_CFG_13MCH_CFG_12
Clock gating disable
XOR Mode Enable
ALL-z Mode Enable
Normal operation(Default)
R79 *4.02K/FR79 *4.02K/F
R64 *4.02K/FR64 *4.02K/F
R83 *4.02K/FR83 *4.02K/F
R71 *4.02K/FR71 *4.02K/F
R66 *4.02K/FR66 *4.02K/F
R97 *4.02K/FR97 *4.02K/F
R81 *4.02K/FR81 *4.02K/F
Pin Name Strap description
CFG[2:0]
CFG[4:3]
CFG5
CFG6
CFG7
CFG8
CFG9
CFG[11:10]
CFG[13:12]
CFG[15:14]
CFG16
CFG[18:17]
VCC3
SDVO_CTRLDATA
CFG19
CFG20
2
FSB Frequency Select
Reserved
DMI X2 Select
Reserved
CPU Strap
Low power PCI Express
PCI Express Graphics Lane Reversal
Reserved
XOR/ALLZ
Reserved
FSB Dynamic ODT
Reserved
SDVO Present
DMI Lane Reversal
SDVO/PCIe concurrent
3
Configuration
010 = FSB 800MHz
011 = FSB 667MHz
0 = DMI X2
1 = DMI X4(Default)
0 = Reserved
1 = Mobile CPU(Default)
0 = Normal mode
1 = Low Power mode
0 = Reverse Lanes
1 = Normal operation(Default)
00 = Reserved
01 = XOR Mode Enable
10 = All-Z Mode Enabled
11 = Normal operation(Default)
0 = Dynamic ODT disable
1 = Dynamic ODT Enable(Default)
0 = No SDVO Card present(Default)
1 = SDVO Card Present
0 = Normal operation(Default)
1 = Reverse Lanes
0 = Only SDVO or PCIE x1 is operation(Default)
1 = SDVO and PCIE x1 are operating simultaneously via the PEG port
4
5
All strap are sampled with respect to the leading edge of
the GMCH Power OK(PWROK) Signal
CFG[17:3] Have internal Pull-up
CFG[18:19] Have internal Pull-down
Any CFG signal strapping option not list below should be
left NC Pin
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
6
Date: Sheet of
7
Crestline-DDR II
Crestline-DDR II
Crestline-DDR II
1A
1A
1A
of
735Wednesday, October 03, 2007
735Wednesday, October 03, 2007
735Wednesday, October 03, 2007
8
PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com
5
Crestline-VCC, NCTF 08
4
3
2
1
http://hobi-elektronika.net
VCCP
D D
IVCCSM supply
current 1
channel
1.615A 2
1.8VSUS
channel
3.318A
C C
B B
A A
+VGFX_CORE_INT
5
AT35
AT34
AH28
AC32
AC31
AK32
AJ31
AJ28
AH32
AH31
AH29
AF32
AU32
AU33
AU35
AV33
AW33
AW35
AY35
BA32
BA33
BA35
BB33
BC32
BC33
BC35
BD32
BD35
BE32
BE33
BE35
BF33
BF34
BG32
BG33
BG35
BH32
BH34
BH35
BJ32
BJ33
BJ34
BK32
BK33
BK34
BK35
BL33
AU30
W13
W14
AA20
AA23
AA26
AA28
AB21
AB24
AB29
AC20
AC21
AC23
AC24
AC26
AC28
AC29
AD20
AD23
AD24
AD28
AF21
AF26
AA31
AH20
AH21
AH23
AH24
AH26
AD31
AJ20
AN14
R30
R20
T14
Y12
U36G
U36G
VCC_1
VCC_2
VCC_3
VCC_5
VCC_4
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
CRESTLINE_1p0
CRESTLINE_1p0
VCC CORE
VCC CORE
POWER
POWER
VCC SMVCC GFX
VCC SMVCC GFX
VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC GFX NCTF
VCC GFX NCTF
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60
VCC_AXG_NCTF_61
VCC_AXG_NCTF_62
VCC_AXG_NCTF_63
VCC_AXG_NCTF_64
VCC_AXG_NCTF_65
VCC_AXG_NCTF_66
VCC_AXG_NCTF_67
VCC_AXG_NCTF_68
VCC_AXG_NCTF_69
VCC_AXG_NCTF_70
VCC_AXG_NCTF_71
VCC_AXG_NCTF_72
VCC_AXG_NCTF_73
VCC_AXG_NCTF_74
VCC_AXG_NCTF_75
VCC_AXG_NCTF_76
VCC_AXG_NCTF_77
VCC_AXG_NCTF_78
VCC_AXG_NCTF_79
VCC_AXG_NCTF_80
VCC_AXG_NCTF_81
VCC_AXG_NCTF_82
VCC_AXG_NCTF_83
VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7
VCC SM LF
VCC SM LF
T17
T18
T19
T21
T22
T23
T25
U15
U16
U17
U19
U20
U21
U23
U26
V16
V17
V19
V20
V21
V23
V24
Y15
Y16
Y17
Y19
Y20
Y21
Y23
Y24
Y26
Y28
Y29
AA16
AA17
AB16
AB19
AC16
AC17
AC19
AD15
AD16
AD17
AF16
AF19
AH15
AH16
AH17
AH19
AJ16
AJ17
AJ19
AK16
AK19
AL16
AL17
AL19
AL20
AL21
AL23
AM15
AM16
AM19
AM20
AM21
AM23
AP15
AP16
AP17
AP19
AP20
AP21
AP23
AP24
AR20
AR21
AR23
AR24
AR26
V26
V28
V29
Y31
AW45
BC39
BE39
BD17
BD4
AW8
AT6
4
Ivcc_AXG Graphics core
supply current 7.7A
12
+
+
C647
C647
330U/6.3V
330U/6.3V
Layout Note:
Inside GMCH cavity for VCC_AXG.
12
C163
C163
0.1U/10V
0.1U/10V
GMCH 1.05V
VCC Core
VCC_AXG
VCC_AXD
VTT
VCC_PEG
VCC_AXM
VCCR_RX_DMI
VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7
12
C115
C115
0.1U/10V
0.1U/10V
Ivcc (External GFX 1.310 A,
integrate 1.572 A)
Layout Note:
370 mils from edge.
+VGFX_CORE_INT
Layout Note:
370 mils from edge.
12
12
12
C123
C123
0.1U/10V
0.1U/10V
current(A)
1.573
7.7
C141
C141
C181
C181
1U/10V
1U/10V
0.47U/10V
0.47U/10V
Remark
( 1.3A for
external
GFX )
for integrated
Gfx
0.2
0.85
1.2
0.54
0.25
FSB VCCP
for PCIEG
for IAMT
function
DMI
12.313SUM
12
12
12
C116
C116
0.1U/10V
0.1U/10V
C103
C103
0.22U/10V
0.22U/10V
VCCP
12
+
+
C131
C131
0.22U/10V
0.22U/10V
C645
C645
220U/2.5V
220U/2.5V
12
C156
C156
10U/6.3V
10U/6.3V
12
3
R415 0R415 0
R418 0R418 0
VCCP
Ivcc_AXM
Controller
supply
current
540mA
C250
C250
0.47U/10V
0.47U/10V
VCC3
R417 10R417 10
+VCC_GMCH_L
1 2
12
Layout Note:
Inside GMCH cavity.
12
12
C232
C202
C202
22U/4V
22U/4V
C142
C142
22U/4V
22U/4V
C232
0.22U/10V
0.22U/10V
VCCP
for IAMT power if not
support need to
connection to S0 power
12
C160
C160
0.1U/10V
0.1U/10V
12
C223
C223
22U/4V
22U/4V
Layout Note:
Place close to GMCH edge.
12
12
C251
C251
C304
C304
1U/10V
1U/10V
1U/10V
1U/10V
CH751H-40HPT
CH751H-40HPT
12
C226
C226
0.22U/10V
0.22U/10V
A test check
when use
external VGA can
remove or not..
andrew
Layout Note:
Inside GMCH
cavity.
12
C197
C197
0.1U/10V
0.1U/10V
12
C211
C211
0.22U/10V
0.22U/10V
D25
D25
21
12
C99
C99
0.1U/10V
0.1U/10V
12
C125
C125
0.1U/10V
0.1U/10V
12
C187
C187
0.22U/10V
0.22U/10V
1.8VSUS
12
C203
C203
0.1U/10V
0.1U/10V
Layout Note:
Place C901 where LVDS
and DDR2 taps.
+
+
12
C881
C881
330U/6.3V
330U/6.3V
2
AB33
AB36
AB37
AC33
AC35
AC36
AD35
AD36
AF33
AF36
AH33
AH35
AH36
AH37
AJ33
AJ35
AK33
AK35
AK36
AK37
AD33
AJ36
AM35
AL33
AL35
AA33
AA35
AA36
AP35
AP36
AR35
AR36
AL24
AL26
AL28
AM26
AM28
AM29
AM31
AM32
AM33
AP29
AP31
AP32
AP33
AL29
AL31
AL32
AR31
AR32
AR33
Y32
Y33
Y35
Y36
Y37
T30
T34
T35
U29
U31
U32
U33
U35
U36
V32
V33
V36
V37
U36F
U36F
CRESTLINE_1p0
CRESTLINE_1p0
+
+
VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8
VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44
VCC_NCTF_45
VCC_NCTF_46
VCC_NCTF_47
VCC_NCTF_48
VCC_NCTF_49
VCC_NCTF_50
VCC_AXM_NCTF_1
VCC_AXM_NCTF_2
VCC_AXM_NCTF_3
VCC_AXM_NCTF_4
VCC_AXM_NCTF_5
VCC_AXM_NCTF_6
VCC_AXM_NCTF_7
VCC_AXM_NCTF_8
VCC_AXM_NCTF_9
VCC_AXM_NCTF_10
VCC_AXM_NCTF_11
VCC_AXM_NCTF_12
VCC_AXM_NCTF_13
VCC_AXM_NCTF_14
VCC_AXM_NCTF_15
VCC_AXM_NCTF_16
VCC_AXM_NCTF_17
VCC_AXM_NCTF_18
VCC_AXM_NCTF_19
12
C705
C705
*330U/6.3V
*330U/6.3V
VSS_SCB1
VSS_SCB2
VSS_SCB3
VSS_SCB4
VSS_SCB5
VSS_SCB6
VCC_AXM_1
VCC_AXM_2
VCC_AXM_3
VCC_AXM_4
VCC_AXM_5
VCC_AXM_6
VCC_AXM_7
C241
C241
22U/4V
22U/4V
T27
T37
U24
U28
V31
V35
AA19
AB17
AB35
AD19
AD37
AF17
AF35
AK17
AM17
AM24
AP26
AP28
AR15
AR19
AR28
A3
B2
C1
BL1
BL51
A51
VCCP
AT33
AT31
AK29
AK24
AK23
AJ26
AJ23
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
Crestline-VCC,NCTF
Crestline-VCC,NCTF
Crestline-VCC,NCTF
1
835Wednesday, October 03, 2007
835Wednesday, October 03, 2007
835Wednesday, October 03, 2007
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS NCTF
VSS NCTF
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VCC NCTF
VCC NCTF
POWER
POWER
VSS SCBVCC AXM
VSS SCBVCC AXM
VCC AXM NCTF
VCC AXM NCTF
12
12
C209
C209
22U/4V
22U/4V
Layout Note:
Place on the edge.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
1A
1A
1A
of
PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com
5
Crestline-Power 09
IV&EV Dis/Enable setting
R63 *IV@0R63 *IV@0
FB_120ohm+-25%_100mHz
_200mA_0.2ohm DC
+1.25V
L10
L10
D D
C C
VCC1.5
B B
FB_180ohm+-25%_
100mHz_1500mA_
0.09ohm DC
1 2
VCC3
*IV@BLM18PG181SN1
*IV@BLM18PG181SN1
A A
+3V_TV_DAC
12
12
BLM11A121S
BLM11A121S
L11
L11
BLM11A121S
BLM11A121S
12
R48
R48
0.5/F/0603
0.5/F/0603
1 2
+VCCA_MPLL_L
12
C86
C86
22U/10V
22U/10V
L28
L28
1 2
*IV@BLM18PG181SN1
*IV@BLM18PG181SN1
L49
L49
R446 *0R446 *0
1 2
123
C683
C683
*IV@.1U
*IV@.1U
+1.25V_VCCA_HPLL+1.25V_VCCA_HPLL
12
C85
C85
22U/10V
22U/10V
+1.25V_VCCA_MPLL
+VCCA_MPLL_L
12
C657
C657
*IV@0.1U/10V
*IV@0.1U/10V
+VCCQ_TVDAC
12
C330
C330
*IV@.1U
*IV@.1U
12
C670
C670
*IV@10U/4V
*IV@10U/4V
+VCC_TVDACB_R
C675
C675
*IV@22N
*IV@22N
5
50mA
12
C98
C98
0.1U/10V
0.1U/10V
150mA
R427 *IV@0R427 *IV@0
1 2
123
R172 *0R172 *0
1 2
123
+3V_TV_DAC
C667
C667
12
R447
R447
EV@0
EV@0
12
C92
C92
0.1U/10V
0.1U/10V
+1.5V_VCCD_TVDAC
C660
C660
*IV@22nF/3P
*IV@22nF/3P
C344
C344
*IV@22N
*IV@22N
R443 *0R443 *0
1 2
123
*IV@.1U
*IV@.1U
+3V_TV_DAC
+1.25V
0.1Caps should be
placed 200 mils
with in its pins.
C673
C673
*IV@22N
*IV@22N
12
VCC3
<FAE>
INT VGA disable
VCCSYNC connect
to GND
1 2
VCC3
*IV@BLM18PG181SN1
*IV@BLM18PG181SN1
FB_180ohm+-25%
100mHz_1500mA
0.09ohm DC
+3V_TV_DAC
L30
L30
10uH/100MA
10uH/100MA
10uH+-20%_100mA
L31
L31
10uH/100MA
10uH/100MA
+1.5V_VCCD_TVDAC
+1.25V
+VCC_TVDACA_R
R444
R444
EV@0
EV@0
R450 *0R450 *0
1 2
123
C688
C688
*IV@.1U
*IV@.1U
L52
L52
R473
R473
*IV@0.03/F
*IV@0.03/F
12
12
R108 0R108 0
+1.5V_VCCD_TVDAC
+VCC_TVDACC_R
C681
C681
*IV@22N
*IV@22N
+1.25V
R105
R105
EV@0
EV@0
+VCCA_CRTDAC
12
C701
C701
*IV@.1U
*IV@.1U
+VCC_TVBG
12
12
C716
C716
*IV@.1U
*IV@.1U
80mA
+1.25V_VCCA_DPLLA
C312
C312
0.1U/10V
0.1U/10V
80mA
+1.25V_VCCA_DPLLB
C334
C334
0.1U/10V
0.1U/10V
R55 0R55 0
12
C100
C100
+
+
100U/6.3V
100U/6.3V
12
C207
C207
22U/4V
22U/4V
+VCCA_MPLL_L
1.8VSUS
R451
R451
EV@0
EV@0
4
+3V_VCCSYNC
C153
C153
*IV@.1U
*IV@.1U
R457 *0R457 *0
1 2
R472 *0R472 *0
123
12
12
1 2
12
C206
C206
1U/10V
1U/10V
R113 EV@0R113 EV@0
R106 *IV@0R106 *IV@0
250mA
R144 *IV@0R144 *IV@0
4
http://hobi-elektronika.net
R86
R86
EV@0
EV@0
+3V_VCCA_CRT_DAC
123
R455
R455
C702
C702
*IV@22N
*IV@22N
C713
C713
*IV@22N
*IV@22N
+1.8VSUS_VCC_TX_LVDS
VCC3
C130
C130
4.7U/6.3V
4.7U/6.3V
12
12
EV@0
EV@0
+1.8VSUS_VCC_TX_LVDS
12
R469
R469
EV@0
EV@0
IV&EV Dis/Enable setting
10mA
R467
R467
EV@0
EV@0
12
C343
C343
0.1U/10V
0.1U/10V
Ivcca_PEG_BG
supply current
100mA
12
12
C133
C133
22U/4V
22U/4V
12
C184
C184
C188
C188
1U/10V
1U/10V
0.1U/10V
0.1U/10V
12
C305
C305
C93
C93
0.1U/10V
0.1U/10V
0.1U/10V
0.1U/10V
C274
C274
C269
C269
*IV@10U
*IV@10U
*IV@1U
*IV@1U
+1.25V_VCCA_DPLLA
+1.25V_VCCA_DPLLB
+1.25V_VCCA_HPLL
+1.25V_VCCA_MPLL
C706
C706
*IV@1000P
*IV@1000P
+1.25V_VCCD_PEG_PLL
100mA
+1.25V_VCCA_SM
12
C138
C138
C129
C129
1U/10V
1U/10V
22U/4V
22U/4V
+1.25V_VCCA_SM_CK
+VCC_TVDACA_R
+VCC_TVDACB_R
+VCC_TVDACC_R
+1.5V_VCCD_CRT
+1.5V_VCCD_QDAC
+VCCA_MPLL_L
+1.25V_VCCD_PEG_PLL
+1.8V_VCCD_LVDS
150mA
R142
R142
EV@0
EV@0
3
CRT/TV Disable/Enable guideline
External VGA with EV@part,Internal VGA with IV@ part
Ball
Enable
VCCA_CRT_DAC
VCCD_CRT
3.3V
1.5V
1.5V
3.3V
3.3V
U36H
U36H
J32
VCCSYNC
A33
VCCA_CRT_DAC_1
B33
VCCA_CRT_DAC_2
A30
VCCA_DAC_BG
B32
VSSA_DAC_BG
B49
VCCA_DPLLA
H49
VCCA_DPLLB
AL2
VCCA_HPLL
AM2
VCCA_MPLL
A41
VCCA_LVDS
B41
VSSA_LVDS
K50
VCCA_PEG_BG
K49
VSSA_PEG_BG
U51
VCCA_PEG_PLL
AW18
VCCA_SM_1
AV19
VCCA_SM_2
AU19
VCCA_SM_3
AU18
VCCA_SM_4
AU17
VCCA_SM_5
AT22
VCCA_SM_7
AT21
VCCA_SM_8
AT19
VCCA_SM_9
AT18
VCCA_SM_10
AT17
VCCA_SM_11
AR17
VCCA_SM_NCTF_1
AR16
VCCA_SM_NCTF_2
BC29
VCCA_SM_CK_1
BB29
VCCA_SM_CK_2
C25
VCCA_TVA_DAC_1
B25
VCCA_TVA_DAC_2
C27
VCCA_TVB_DAC_1
B27
VCCA_TVB_DAC_2
B28
VCCA_TVC_DAC_1
A28
VCCA_TVC_DAC_2
M32
VCCD_CRT
L29
VCCD_TVDAC
N28
VCCD_QDAC
AN2
VCCD_HPLL
U48
VCCD_PEG_PLL
J41
VCCD_LVDS_1
H42
VCCD_LVDS_2
L35
L35
1 2
+1.25V
BLM21PG221SN1D
BLM21PG221SN1D
FB_220ohm+-25%_100MHz
_2A_0.1ohm DC
3
Disable
GND VCCA_TVC_DAC
GND
GND VCCA_DAC_BG
GND
GND
POWER
POWER
D TV/CRTLVDS
D TV/CRTLVDS
100mA
12
12
Ball
VCCD_TVDAC
VSS_DAC_BG
VCCSYNC
CRTPLLAPEGASMTV
CRTPLLAPEGASMTV
AXD
AXD
VCC_AXD_NCTF
AXF
AXF
VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4
SM CK
SM CK
VCC_TX_LVDS
A CK A LVDS
A CK A LVDS
+1.25V_VCCD_PEG_PLL
R200
R200
1/F/0603
1/F/0603
C415
C415
10U/6.3V
10U/6.3V
HV
HV
PEG
PEG
VCC_RXR_DMI_1
VCC_RXR_DMI_2
DMI
DMI
CRESTLINE_1p0
CRESTLINE_1p0
12
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT
VTT
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VCC_AXD_1
VCC_AXD_2
VCC_AXD_3
VCC_AXD_4
VCC_AXD_5
VCC_AXD_6
VCC_AXF_1
VCC_AXF_2
VCC_AXF_3
VCC_DMI
VCC_HV_1
VCC_HV_2
VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5
VTTLF1
VTTLF2
VTTLF3
VTTLF
VTTLF
C338
C338
0.1U/10V
0.1U/10V
Enable
3.3V
1.5V
3.3VVCCD_QDAC
GNDVCCA_TVA_DAC
3.3VVCCA_TVB_DAC
U13
U12
U11
U9
U8
U7
U5
U3
U2
U1
T13
T11
T10
T9
T7
T6
T5
T3
T2
R3
R2
R1
AT23
AU28
AU24
AT29
AT25
AT30
AR29
B23
B21
A21
AJ50
BK24
BK23
BJ24
BJ23
A43
C40
B40
AD51
W50
W51
V49
V50
AH50
AH51
A7
F2
AH1
Disable
GND
1.5V
GND
GND
GND
12
Place on the edge.
12
Place on the edge.
+1.25V_AXD
12
+1.25V_VCC_AXF
+1.25V_VCC_DMI
+1.8VSUS_VCC_SM_CK
200mA
+1.8VSUS_VCC_TX_LVDS
+3V_VCC_HV
12
C244
C244
0.1U/10V
0.1U/10V
+VCC_RXR_DMI
+VCC_RXR_DMI
+VTTLF1
+VTTLF2
+VTTLF3
+VTTLF1
+VTTLF2
+VTTLF3
12
2
LVDS Disable/Enable guideline
External VGA with EV@part,Internal VGA with IV@ part
Signal
VCCD_LVDS
VCCA_LVDS
VCC_TX_LVDS
12
C108
C224
C224
2.2U/6.3V
2.2U/6.3V
C183
C183
0.47U/6.3V
0.47U/6.3V
C161
C161
1U/10V
1U/10V
C97
C97
0.47U/10V
0.47U/10V
C108
4.7U/10V
4.7U/10V
12
C164
C164
4.7U/10V
4.7U/10V
12
C143
C143
22U/10V
22U/10V
+1.25V_VCC_DMI
R454
R454
EV@0
EV@0
12
+
+
C748
C748
220U/4V
220U/4V
12
C651
C651
0.47U/10V
0.47U/10V
2
If SDVO Disable
LVDS Disable
GND
GND
GND
Ivcc_VTT FSB
supply
current
0.85A
VCCP
12
+
+
C646
C646
220U/4V
220U/4V
+VCC_AXD_R
1 2
L15 0L15 0
Reserved L81 pad for
inductor.
Place caps close
to VCC_AXD.
Ivcc_DMI supply
current 100mA
R92 0R92 0
12
C373
C373
0.1U/10V
0.1U/10V
+1.8VSUS_VCC_TX_LVDS
100mA
12
C689
C689
*IV@1000P
*IV@1000P
+VCC_PEG
L53
L53
91nH/1.5A
91nH/1.5A
91uH+-20%_1.5A
12
C339
C339
10U/6.3V
10U/6.3V
Ivcc_RX_DMI supply
current 250mA
L33
L33
91nH/1.5A
91nH/1.5A
91uH+-20%_1.5A
12
C377
C377
10U/6.3V
10U/6.3V
12
C656
C656
0.47U/10V
0.47U/10V
If LVDS
enable
1.8V
1.8V
1.8V
+1.25V
R82 0R82 0
+1.25V
L51 *IV@1UHL51 *IV@1UH
12
+
+
12
12
12
1uH+-20%_300mA
C749
C749
*IV@220U
*IV@220U
IV&EV Dis/Enable setting
Ivcc_PEG supply
current 1.2A
VCCP
+1.8VSUS_VCC_SM_CK
VCCP
12
C669
C669
22U/10V
22U/10V
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
+3V_VCC_HV
D4
D4
CH751H-40HPT_NC
CH751H-40HPT_NC
+3V_VCC_HV
R135 0R135 0
+1.25V_VCC_AXF
12
C671
C671
1U/10V
1U/10V
Place caps close
to VCC_AXF
1.8VSUS
12
C162
C162
0.1U/10V
0.1U/10V
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
Crestline-Power
Crestline-Power
Crestline-Power
1
VCCP
21
40 mil
wide
+3V_VCC_HV_L
12
R5910R59
10
VCC3
+1.25V
R4310R431
0
12
C668
C668
10U/6.3V
10U/6.3V
L50
L50
1uH/300mA
1uH/300mA
12
12
1uH+-20%_300mA
R80
R80
1/F/0603
1/F/0603
+VCC_SM_CK_L
12
C144
C144
10U/6.3V
10U/6.3V
935Wednesday, October 03, 2007
935Wednesday, October 03, 2007
1
935Wednesday, October 03, 2007
1.8VSUS
of
1A
1A
1A
PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com
1
DDRII-SO DIMM 10
M_A_CKE[0..1]
M_A_CS#[0..1]
M_A_RAS#
M_A_CAS#
M_A_WE#
M_B_DQ5
M_B_DQ4
M_B_DQ2
A A
M_B_DQ3
M_B_DQ1
M_B_DQ0
M_B_DQ7
M_B_DQ6
M_B_DQ13
M_B_DQ12
M_B_DQ11
M_B_DQ10
M_B_DQ8
M_B_DQ9
M_B_DQ15
M_B_DQ14
M_B_DQ20
M_B_DQ17
M_B_DQ22
M_B_DQ19
M_B_DQ21
M_B_DQ16
M_B_DQ23
M_B_DQ18
M_B_DQ25
M_B_DQ28
M_B_DQ27
M_B_DQ26
M_B_DQ24
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_A0
B B
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_BS#0
M_B_BS#1
M_B_BS#2
M_B_CLK0
M_B_CLK0#
M_B_CLK1
M_B_CLK1#
CGCLK_SMB
CGDAT_SMB
DIM2_SA0
DIM2_SA1
C C
1.8VSUS
C717
C717
2.2U/6.3V
2.2U/6.3V
D D
SMDDR_VREF_DIMM
C762
C762
.1U/10V
.1U/10V
M_A_CKE[0..1] 6 M_A_CLK0 6
M_A_CS#[0..1] 6
M_A_RAS# 7
M_A_CAS# 7
M_A_WE# 7
5
DQ0
7
DQ1
17
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
DQ10
37
DQ11
20
DQ12
22
DQ13
36
DQ14
38
DQ15
43
DQ16
45
DQ17
55
DQ18
57
DQ19
44
DQ20
46
DQ21
56
DQ22
58
DQ23
61
DQ24
63
DQ25
73
DQ26
75
DQ27
62
DQ28
64
DQ29
74
DQ30
76
DQ31
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10/AP
90
A11
89
A12
107
BA0
106
BA1
85
NC/BA2
30
CLK0
32
CLK0
164
CLK1
166
CKL1
197
SCL
195
SDA
198
SA0
200
SA1
199
VDDSPD
FOX=AS0A426-M2S-TR
FOX=AS0A426-M2S-TR
CN9A
CN9A
DIM2_SA0
DIM2_SA1
PC2100 DDR2 SDRAM SO-DIMM
PC2100 DDR2 SDRAM SO-DIMM
R46 10KR46 10K
R44 10KR44 10K
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS0
DQS1
(200P)
(200P)
DQS1
DQS2
DQS2
DQS3
DQS3
DQS4
DQS4
DQS5
DQS5
DQS6
DQS6
DQS7
DQS7
CS0
CS1
RAS
CAS
WE
CKE0
CKE1
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
10
26
52
67
130
147
170
185
13
11
31
29
51
49
70
68
131
129
148
146
169
167
188
186
110
115
108
113
109
79
80
Place these Caps near So-Dimm1. Place these Caps near So-Dimm2.
1.8VSUS
C707
C718
C718
2.2U/6.3V
2.2U/6.3V
VCC3
C707
2.2U/6.3V
2.2U/6.3V
C95
C95
2.2U/6.3V
2.2U/6.3V
C711
C711
2.2U/6.3V
2.2U/6.3V
C90
C90
.1U/10V
.1U/10V
C694
C694
2.2U/6.3V
2.2U/6.3V
C760
C760
2.2U/6.3V
2.2U/6.3V
1
M_A_CLK0
M_A_CLK0#
M_A_CLK1
M_A_CLK1#
M_A_BS#[0..2]
M_A_ODT[0..1]
CKEA 0,1
VCC3
2
M_A_CLK0# 6
M_A_CLK1 6
M_A_CLK1# 6
M_A_BS#[0..2] 7 M_A_DQS#[0..7] 7
M_A_ODT[0..1] 6
M_B_DQ32
M_B_DQ38
M_B_DQ33
M_B_DQ39
M_B_DQ37
M_B_DQ36
M_B_DQ34
M_B_DQ35
M_B_DQ40
M_B_DQ41
M_B_DQ46
M_B_DQ43
M_B_DQ45
M_B_DQ44
M_B_DQ47
M_B_DQ42
M_B_DQ55
M_B_DQ49
M_B_DQ51
M_B_DQ53
M_B_DQ48
M_B_DQ52
M_B_DQ50
M_B_DQ54
M_B_DQ56
M_B_DQ60
M_B_DQ59
M_B_DQ63
M_B_DQ57
M_B_DQ61
M_B_DQ58
M_B_DQ62
M_B_DQM0
M_B_DQM1
M_B_DQM2
M_B_DQM3
M_B_DQM4
M_B_DQM5
M_B_DQM6
M_B_DQM7
M_B_DQS0
M_B_DQS#0
M_B_DQS1
M_B_DQS#1
M_B_DQS2
M_B_DQS#2
M_B_DQS3
M_B_DQS#3
M_B_DQS4
M_B_DQS#4
M_B_DQS5
M_B_DQS#5
M_B_DQS6
M_B_DQS#6
M_B_DQS7
M_B_DQS#7
M_B_CS#0
M_B_CS#1
M_B_RAS#
M_B_CAS#
M_B_WE#
M_B_CKE0
M_B_CKE1
M_A_DQ1
M_A_DQ5
M_A_DQ3
M_A_DQ2
M_A_DQ4
M_A_DQ0
M_A_DQ7
M_A_DQ6
M_A_DQ13
M_A_DQ8
M_A_DQ15
M_A_DQ10
M_A_DQ9
M_A_DQ12
M_A_DQ14
M_A_DQ11
M_A_DQ16
M_A_DQ21
M_A_DQ23
M_A_DQ19
M_A_DQ20
M_A_DQ17
M_A_DQ18
M_A_DQ22
M_A_DQ24
M_A_DQ28
M_A_DQ31
M_A_DQ30
M_A_DQ25
M_A_DQ29
M_A_DQ27
M_A_DQ26
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CLK0
M_A_CLK0#
M_A_CLK1
M_A_CLK1#
CGCLK_SMB
CGDAT_SMB
DIM1_SA0
DIM1_SA1
VCC3VCC3
17
19
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
102
101
100
99
98
97
94
92
93
91
105
90
89
107
106
85
30
32
164
166
197
195
198
200
199
R47 10KR47 10K
R45 10KR45 10K
3
M_A_DQM[0..7]
M_A_DQ[0..63]
M_A_DQS[0..7]
M_A_DQS#[0..7]
M_A_A[13..0]
5
DQ0
7
DQ1
DQ2
DQ3
4
DQ4
6
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
BA0
BA1
NC/BA2
CLK0
CLK0
CLK1
CKL1
SCL
SDA
SA0
SA1
VDDSPD
FOX=AS0A426-MAS-TR
FOX=AS0A426-MAS-TR
CN8A
CN8A
SMbus address A0SMbus address A4
PC2100 DDR2 SDRAM SO-DIMM
PC2100 DDR2 SDRAM SO-DIMM
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS0
DQS1
(200P)
(200P)
DQS1
DQS2
DQS2
DQS3
DQS3
DQS4
DQS4
DQS5
DQS5
DQS6
DQS6
DQS7
DQS7
CS0
CS1
RAS
CAS
WE
CKE0
CKE1
DIM1_SA0
DIM1_SA1
4
http://hobi-elektronika.net
M_A_DQM[0..7] 7
M_A_DQ[0..63] 7
M_A_DQS[0..7] 7
M_A_A[13..0] 7
M_A_DQ32
123
M_A_DQ35
125
M_A_DQ37
135
M_A_DQ38
137
M_A_DQ33
124
M_A_DQ36
126
M_A_DQ39
134
M_A_DQ34
136
M_A_DQ40
141
M_A_DQ41
143
M_A_DQ46
151
M_A_DQ42
153
M_A_DQ45
140
M_A_DQ44
142
M_A_DQ43
152
M_A_DQ47
154
M_A_DQ52
157
M_A_DQ48
159
M_A_DQ55
173
M_A_DQ54
175
M_A_DQ53
158
M_A_DQ49
160
M_A_DQ50
174
M_A_DQ51
176
M_A_DQ60
179
M_A_DQ56
181
M_A_DQ62
189
M_A_DQ58
191
M_A_DQ57
180
M_A_DQ61
182
M_A_DQ59
192
M_A_DQ63
194
M_A_DQM0
10
M_A_DQM1
26
M_A_DQM2
52
M_A_DQM3
67
M_A_DQM4
130
M_A_DQM5
147
M_A_DQM6
170
M_A_DQM7
185
M_A_DQS0
13
M_A_DQS#0
11
M_A_DQS1
31
M_A_DQS#1
29
M_A_DQS2
51
M_A_DQS#2
49
M_A_DQS3
70
M_A_DQS#3
68
M_A_DQS4
131
M_A_DQS#4
129
M_A_DQS5
148
M_A_DQS#5
146
M_A_DQS6
169
M_A_DQS#6
167
M_A_DQS7
188
M_A_DQS#7
186
M_A_CS#0
110
M_A_CS#1
115
M_A_RAS#
108
M_A_CAS#
113
M_A_WE#
109
M_A_CKE0
79
M_A_CKE1
80
CKEB 0,1
H 5.2H 9.2
CGCLK_SMB
CGDAT_SMB
M_B_CKE[0..1]
M_B_CS#[0..1]
M_B_RAS#
M_B_CAS#
M_B_WE#
SMDDR_VREF_DIMM SMDDR_VREF_DIMM
PM_EXTTS#06 PM_EXTTS#16
SB_MA14 SA_MA14
C850 0.01UC850 0.01U
C770 470P/50VC770 470P/50V
1 2
R493 10K/FR493 10K/F
SMDDR_VTERM
SMDDR_VTERM
DDRII A CHANNEL
SMDDR_VTERM
C221
C221
C360
C360
.1U/10V
.1U/10V
.1U/10V
.1U/10V
C319
C319
.1U/10V
.1U/10V
DDRII B CHANNEL
C208
C208
C264
C264
C255
.1U/10V
.1U/10V
C255
.1U/10V
.1U/10V
.1U/10V
.1U/10V
Layout note: Place onecap close to every 2 pullup resistors terminated to SMDDR_VTERM
1.8VSUS
1.8VSUS
C230
C335
.1U/10V
.1U/10V
.1U/10V
.1U/10V
.1U/10V
.1U/10V
.1U/10V
.1U/10V
C314
C696
C696
C335
SO-DIMM BYPASS PLACEMENT :
Place these Caps near So-Dimm1. Place these Caps near So-Dimm2
No Vias Between the Trace of PIN to CAP.
2
.1U/10V
.1U/10V
C272
C272
.1U/10V
.1U/10V
C708
C708
2.2U/6.3V
2.2U/6.3V
SMDDR_VREF_DIMM
C429
C429
.1U/10V
.1U/10V
3
C715
C715
2.2U/6.3V
2.2U/6.3V
C437
C437
2.2U/6.3V
2.2U/6.3V
C710
C710
2.2U/6.3V
2.2U/6.3V
VCC3
C700
C700
2.2U/6.3V
2.2U/6.3V
C94
C94
2.2U/6.3V
2.2U/6.3V
C719
C719
2.2U/6.3V
2.2U/6.3V
C91
C91
.1U/10V
.1U/10V
C230
C297
C297
C314
C699
C699
C229
C229
.1U/10V
.1U/10V
.1U/10V
.1U/10V
SO-DIMM BYPASS PLACEMENT :
No Vias Between the Trace of PIN to CAP.
4
CGCLK_SMB 2
CGDAT_SMB 2
M_B_CKE[0..1] 6
M_B_CS#[0..1] 6
M_B_RAS# 7
M_B_CAS# 7
M_B_WE# 7
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
103
1.8VSUS
104
1.8VSUS
111
1.8VSUS
112
1.8VSUS
117
1.8VSUS
118
M_B_ODT0
114
M_B_ODT1
119
M_B_A13
116
120
163
162
165
168
171
172
177
178
183
184
187
190
193
196
201
SMDDR_VREF_DIMM
R226 10K/FR226 10K/F
C300
C300
C374
C374
.1U/10V
.1U/10V
.1U/10V
.1U/10V
SMDDR_VTERM
C359
C359
C278
C278
.1U/10V
.1U/10V
.1U/10V
.1U/10V
C263
C263
C283
C283
.1U/10V
.1U/10V
.1U/10V
.1U/10V
5
1
VREF
81
VDD_1
82
VDD_2
87
VDD_3
88
VDD_4
95
VDD_5
96
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
ODT0
ODT1
50
NC_1
69
NC_2
83
NC_3
84
NC_4/A15
86
NC_5/A14
NC_6/A13
NC_7
NC_8
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
FOX=AS0A426-M2S-TR
FOX=AS0A426-M2S-TR
CN9B
CN9B
R239 0R239 0
C355
C355
.1U/10V
.1U/10V
C239
C239
.1U/10V
.1U/10V
C353
C353
C354
C354
.1U/10V
.1U/10V
.1U/10V
.1U/10V
5
VCC3
1.8VSUS
M_B_CLK0
M_B_CLK0#
M_B_CLK1
M_B_CLK1#
M_B_BS#[0..2]
M_B_ODT[0..1]
PC2100 DDR2 SDRAM
PC2100 DDR2 SDRAM
1.8VSUS
C313
C313
.1U/10V
.1U/10V
C345
C345
.1U/10V
.1U/10V
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
SO-DIMM (200P)
SO-DIMM (200P)
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_59
C358
C358
.1U/10V
.1U/10V
C348
C348
.1U/10V
.1U/10V
6
VCC3 2,3,6,7,8,9,11,12,13,15,16,17,18,19,20,21,22,23,25,26,27,28,29,31,32
1.8VSUS 6,8,9,21,27,29,30
2
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
202
SMDDR_VREF
C210
C210
.1U/10V
.1U/10V
C357
C357
.1U/10V
.1U/10V
M_A_CS#06
M_B_ODT06
M_B_ODT16
M_B_CS#16
M_A_ODT16
M_A_CS#16
M_B_CKE16
M_A_CKE06
M_A_BS#27
M_B_CLK0 6
M_B_CLK0# 6
M_B_CLK1 6
M_B_CLK1# 6
M_B_BS#[0..2] 7
M_B_ODT[0..1] 6
C227
C227
C364
C364
.1U/10V
.1U/10V
.1U/10V
.1U/10V
C214
C214
C362
C362
.1U/10V
.1U/10V
.1U/10V
.1U/10V
M_A_A0
M_B_A13
M_B_A11
M_B_DQM[0..7]
M_B_DQ[0..63]
M_B_DQS[0..7]
M_B_DQS#[0..7]
M_B_A[13..0]
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
M_A_ODT0
M_A_ODT1
M_A_A13
C303
C303
C279
C279
.1U/10V
.1U/10V
.1U/10V
.1U/10V
C222
C222
C219
C219
.1U/10V
.1U/10V
.1U/10V
.1U/10V
RP11 56X2RP11 56X2
1
3
RP4 56X2RP4 56X2
1
3
RP2 56X2RP2 56X2
1
3
RP1 56X2RP1 56X2
1
3
RP23 56X2RP23 56X2
1
3
RP24 56X2RP24 56X2
1
3
6
81
82
87
88
95
96
103
104
111
112
117
118
114
119
50
69
83
84
86
116
120
163
162
165
168
171
172
177
178
183
184
187
190
193
196
201
M_A_ODT06
M_A_CKE16
M_A_BS#07
M_A_WE#7
M_A_RAS#7
M_A_BS#17
M_A_CAS#7
M_B_BS#17
M_B_BS#27
M_B_CKE06
M_B_RAS#7
M_B_CS#06
M_B_BS#07
M_B_CAS#7
M_B_WE#7
2
4
2
4
2
4
2
4
2
4
2
4
M_B_DQM[0..7] 7
M_B_DQ[0..63] 7
M_B_DQS[0..7] 7
M_B_DQS#[0..7] 7
M_B_A[13..0] 7
1
7
2
VREF
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
ODT0
ODT1
NC_1
NC_2
NC_3
NC_4/A15
NC_5/A14
NC_6/A13
NC_7
NC_8
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
FOX=AS0A426-MAS-TR
FOX=AS0A426-MAS-TR
CN8B
CN8B
VSS_1
3
VSS_2
8
VSS_3
9
VSS_4
12
VSS_5
15
VSS_6
18
VSS_7
21
VSS_8
24
VSS_9
27
VSS_10
28
VSS_11
33
VSS_12
34
VSS_13
39
VSS_14
40
VSS_15
41
VSS_16
42
VSS_17
47
VSS_18
48
VSS_19
53
VSS_20
54
VSS_21
59
VSS_22
60
VSS_23
65
VSS_24
66
VSS_25
71
VSS_26
72
VSS_27
77
VSS_28
78
VSS_29
121
VSS_30
122
VSS_31
127
VSS_32
PC2100 DDR2 SDRAM
SO-DIMM (200P)
PC2100 DDR2 SDRAM
SO-DIMM (200P)
128
VSS_33
132
VSS_34
133
VSS_35
138
VSS_36
139
VSS_37
144
VSS_38
145
VSS_39
149
VSS_40
150
VSS_41
155
VSS_42
156
VSS_43
161
VSS_44
202
VSS_59
RP3 56X2RP3 56X2
M_A_ODT0
M_A_A13
M_A_A8
RP18 56X2RP18 56X2
M_A_A5
M_A_A3
RP14 56X2RP14 56X2
M_A_A1
M_A_A11
RP25 56X2RP25 56X2
M_A_CKE1
M_A_BS#0
RP8 56X2RP8 56X2
RP19 56X2RP19 56X2
M_A_A7
M_A_A6
RP15 56X2RP15 56X2
M_A_A2
M_A_A4
RP9 56X2RP9 56X2
M_A_BS#1
RP22 56X2RP22 56X2
M_A_A12
M_A_A9
RP5 56X2RP5 56X2
M_A_A10
RP12 56X2RP12 56X2
M_B_A0
RP13 56X2RP13 56X2
M_B_A5
M_B_A1
M_B_A8
RP17 56X2RP17 56X2
M_B_A3
RP16 56X2RP16 56X2
M_B_A4
M_B_A2
M_B_A12
RP21 56X2RP21 56X2
M_B_A9
M_B_A7
RP20 56X2RP20 56X2
M_B_A6
RP26 56X2RP26 56X2
RP6 56X2RP6 56X2
RP10 56X2RP10 56X2
M_B_A10
RP7 56X2RP7 56X2
SMDDR_VTERM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
7
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
DDRII SO-DIMM
DDRII SO-DIMM
DDRII SO-DIMM
8
SMDDR_VTERM
SMDDR_VTERM
SMDDR_VTERM
SMDDR_VTERM
SMDDR_VTERM
SMDDR_VTERM
of
10 35Wednesday, October 03, 2007
10 35Wednesday, October 03, 2007
10 35Wednesday, October 03, 2007
8
1A
1A
1A
PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com
5
4
3
2
1
http://hobi-elektronika.net
TXLCLKOUT+
TXLCLKOUT-
+1.8V
+2.5V
D D
C C
L24
L24
CHB1608G151
CHB1608G151
+1.8V
L21 *CHB1608G151L21 *CHB1608G151
+2.5V
IFPC_DVI_3V
IFPC_DVI_3V IFPD_IOVDD C_TXLOUT2+
VGA1.2V
L20
L20
CHB1608G151
CHB1608G151
+2.5V
+2.5V
VGA1.2V
L18 *CHB1608G151L18 *CHB1608G151
L17
L17
*CHB1608G151
*CHB1608G151
L16
L16
CHB1608G151
CHB1608G151
B B
L25 CHB1608G151L25 CHB1608G151
L22 *CHB1608G151L22 *CHB1608G151
C301 470P/50VC301 470P/50V
C290 4700P/25VC290 4700P/25V
C287 10U/6.3VC287 10U/6.3V
+1.8V
VCC3
C285 470P/50VC285 470P/50V
C284 4700P/25VC284 4700P/25V
C276 10U/6.3VC276 10U/6.3V
L27 CHB1608G151L27 CHB1608G151
C309 470P/50VC309 470P/50V
C308 4700P/25VC308 4700P/25V
C286 10U/6.3VC286 10U/6.3V
R161 0R161 0
C337 10U/6.3VC337 10U/6.3V
C333 470P/50VC333 470P/50V
C324 4700P/25VC324 4700P/25V
C341 470P/50VC341 470P/50V
C332 4700P/25VC332 4700P/25V
C350 10U/6.3VC350 10U/6.3V
L32 CHB1608G151L32 CHB1608G151
C874 *.01uF/50VC874 *.01uF/50V
R579 *1K/FR579 *1K/F
L29
L29
CHB1608G151
CHB1608G151
C318 470P/50VC318 470P/50V
C321 4700P/25VC321 4700P/25V
C302 10U/6.3VC302 10U/6.3V
C352 .01U/16VC352 .01U/16V
R175 124/FR175 124/F
R137 10K_4R137 10K_4
C361 *.01U/16VC361 *.01U/16V
R169 *1KR169 *1K
R160 10KR160 10K
C246 .1U/10VC246 .1U/10V
C245 4700P/25VC245 4700P/25V
C247 10U/6.3VC247 10U/6.3V
C240 .1U/10VC240 .1U/10V
C249 4700P/25VC249 4700P/25V
C218 10U/6.3VC218 10U/6.3V
IFPAB_PLLVDD
IFPA_IOVDD
IFPABVPROBE
IFPABRSET
DACA_VDD
DACA_VREF
DACA_RSET
IFPCDVPROBE
IFPCDRSET
IFPCD_PLLVDD
IFPC_IOVDD
NV_PLLVDD
DISP_PLLVDD
DACC_VD
AD10
AH10
AA10
AB10
AC9
AD9
AF9
AF8
AM4
AH9
AG9
AK3
AH3
AD6
AE7
AD7
AH4
AF5
AG4
U10
AL5
V8
R5
R7
V7
T9
T10
U38D
U38D
IFPAB_PLLVDD
IFPAB_PLLGND
IFPA_IOVDD
IFPB_IOVDD
IFPAB_VPROBE
IFPAB_RSET
DACA_VDD
DACA_VREF
DACA_RSET
DACA_IDUMP
DACB_VDD
DACB_VREF
DACB_RSET
DACB_IDUMP
IFPCD_VPROBE
IFPCD_RSET
IFPCD_PLLVDD
IFPCD_PLLGND
IFPC_IOVDD
IFPD_IOVDD
DACC_VDD
DACC_VREF
DACC_RSET
DACC_IDUMP
PLLVDD
VID_PLLVDD
PLLGND
U_GPU_G3
U_GPU_G3
LVDS
LVDS
DACA_HSYNC
CRT
CRT
DACA_VSYNC
DACA_GREEN
DACB_GREEN
TV
TV
TMDS
TMDS
DACC_HSYNC
DAC
DAC
DACC_VSYNC
DACC_GREEN
XTALOUTBUFF
XTAL
XTAL
IFPA_TXC#
IFPA_TXC
IFPA_TXD0#
IFPA_TXD0
IFPA_TXD1#
IFPA_TXD1
IFPA_TXD2#
IFPA_TXD2
IFPA_TXD3#
IFPA_TXD3
IFPB_TXC#
IFPB_TXC
IFPB_TXD4#
IFPB_TXD4
IFPB_TXD5#
IFPB_TXD5
IFPB_TXD6#
IFPB_TXD6
IFPB_TXD7#
IFPB_TXD7
I2CA_SCL
I2CA_SDA
DACA_RED
DACA_BLUE
DACB_RED
DACB_BLUE
IFPC_TXC#
IFPC_TXC
IFPC_TXD0#
IFPC_TXD0
IFPC_TXD1#
IFPC_TXD1
IFPC_TXD2#
IFPC_TXD2
IFPD_TXC#
IFPD_TXC
IFPD_TXD4#
IFPD_TXD4
IFPD_TXD5#
IFPD_TXD5
IFPD_TXD6#
IFPD_TXD6
I2CB_SCL
I2CB_SDA
DACC_RED
DACC_BLUE
XTALSSIN
XTALIN
XTALOUT
C_TXLCLKOUT-
AJ9
C_TXLCLKOUT+
AK9
C_TXLOUT0-
AJ6
C_TXLOUT0+
AH6
C_TXLOUT1-
AH7
C_TXLOUT1+
AH8
C_TXLOUT2-
AK8
C_TXLOUT2+
AJ8
AH5
AJ5
C_TXUCLKOUT-
AL4
C_TXUCLKOUT+
AK4
C_TXUOUT0-
AM5
C_TXUOUT0+
AM6
C_TXUOUT1-
AL7
C_TXUOUT1+
AM7
C_TXUOUT2-
AK5
C_TXUOUT2+
AK6
AL8
AK7
L_DDCCLK
K2
L_DDCDAT
J3
CRT_HSYNC
AF10
CRT_VSYNC
AK10
L_CRT_R
AH11
L_CRT_G
AJ12
L_CRT_B
AH12
R6
T5
T6
TXC_HDMI-
AM3
TXC_HDMI+
AM2
TX0_HDMI-
AE1
TX0_HDMI+
AE2
TX1_HDMI-
AF2
TX1_HDMI+
AF1
TX2_HDMI-
AH1
TX2_HDMI+
AG1
DVI_CLK-
AH2
DVI_CLK+
AG3
DVI_TX0-
AJ1
DVI_TX0+
AK1
DVI_TX1-
AL1
DVI_TX1+
AL2
DVI_TX2-
AJ3
DVI_TX2+
AJ2
HDMI_SCL
H4
HDMI_SDA
J4
DAC_HSYNC
AG7
DAC_VSYNC
AG5
DAC_RED
AF6
DAC_GRN
AG6
DAC_BLU
AE5
R458 10K_4R458 10K_4
T2
T1
R462 0_4R462 0_4
U1
R459 *301/F_4R459 *301/F_4
R464 10K_4R464 10K_4
U2
R98 0R98 0
R109 0R109 0
R192 0R192 0
R191 0R191 0
R195 0R195 0
R194 0R194 0
R193 0R193 0
T63T63
T188T188
T66T66
T68T68
T189T189
DVICLK
DVIDAT
HSYNC_COM
VSYNC_COM
CRT_R
CRT_G
CRT_B
TXC_HDMITXC_HDMI+
TX0_HDMITX0_HDMI+
TX1_HDMITX1_HDMI+
TX2_HDMITX2_HDMI+
DVI_CLKDVI_CLK+
DVI_TX0DVI_TX0+
DVI_TX1DVI_TX1+
DVI_TX2DVI_TX2+
HDMI_SCL 21
HDMI_SDA 21
GPU_27MHZSS 2
GPU_27MHZ 2
DVICLK 6,20
DVIDAT 6,20
HSYNC_COM 6,20
VSYNC_COM 6,20
CRT_R 6,20
CRT_G 6,20
CRT_B 6,20
TXLOUT0TXLOUT0+
TXLOUT1+
TXLOUT1-
TXLOUT2+
TXLOUT2-
TXUCLKOUT+
TXUCLKOUT-
TXUOUT0+
TXUOUT0TXUOUT1+
TXUOUT1-
TXUOUT2+
TXUOUT2-
C_TXLCLKOUT+
C_TXLCLKOUTC_TXLOUT0C_TXLOUT0+
C_TXLOUT1C_TXLOUT1+
C_TXLOUT2C_TXLOUT2+
C_TXUCLKOUT+
C_TXUCLKOUTC_TXUOUT0+
C_TXUOUT0C_TXUOUT1C_TXUOUT1+
C_TXUOUT2C_TXUOUT2+
RP50 *4P2R-S-0RP50 *4P2R-S-0
RP56 *4P2R-S-0RP56 *4P2R-S-0
RP54 *4P2R-S-0RP54 *4P2R-S-0
RP52 *4P2R-S-0RP52 *4P2R-S-0
RP33 *4P2R-S-0RP33 *4P2R-S-0
RP31 *4P2R-S-0RP31 *4P2R-S-0
RP27 *4P2R-S-0RP27 *4P2R-S-0
RP29 *4P2R-S-0RP29 *4P2R-S-0
RP28 4P2R-S-0RP28 4P2R-S-0
RP34 4P2R-S-0RP34 4P2R-S-0
RP32 4P2R-S-0RP32 4P2R-S-0
RP30 4P2R-S-0RP30 4P2R-S-0
RP55 4P2R-S-0RP55 4P2R-S-0
RP53 4P2R-S-0RP53 4P2R-S-0
RP49 4P2R-S-0RP49 4P2R-S-0
RP51 4P2R-S-0RP51 4P2R-S-0
L_CRT_R
L_CRT_G
L_CRT_B
R196 *220/FR196 *220/F
R199 *220/FR199 *220/F
R198 *220/FR198 *220/F
R197 *220/FR197 *220/F
R488 *220/FR488 *220/F
R487 *220/FR487 *220/F
R485 *220/FR485 *220/F
R486 *220/FR486 *220/F
R190 *220/FR190 *220/F
R163 *220/FR163 *220/F
R166 *220/FR166 *220/F
R171 *220/FR171 *220/F
R170 87/FR170 87/F
R179 87/FR179 87/F
R182 87/FR182 87/F
R176 87/FR176 87/F
R189 150/FR189 150/F
R188 150/FR188 150/F
R187 150/FR187 150/F
C_TXLCLKOUTC_TXLOUT0C_TXLOUT1C_TXLOUT2-
C_TXUOUT0C_TXUOUT1C_TXUOUT2-
TXC_HDMITX0_HDMITX1_HDMI-
DVI_CLKDVI_TX0DVI_TX1DVI_TX2- DVI_TX2+
4
3
2
1
2
1
4
3
4
3
2
1
2
1
4
3
4
3
2
1
2
1
4
3
4
3
2
1
2
1
4
3
4
3
2
1
2
1
4
3
2
1
4
3
4
3
2
1
4
3
2
1
2
1
4
3
2
1
4
3
4
3
2
1
C_TXLCLKOUT+
C_TXLOUT0+
C_TXLOUT1+
C_TXUCLKOUT+C_TXUCLKOUTC_TXUOUT0+
C_TXUOUT1+
C_TXUOUT2+
TXC_HDMI+
TX0_HDMI+
TX1_HDMI+
TX2_HDMI+TX2_HDMI-
DVI_CLK+
DVI_TX0+
DVI_TX1+
LA_CLK 6
LA_CLK# 6
LA_DATAN0
LA_DATAP0
LA_DATAP1
LA_DATAN1
LA_DATAP2
LA_DATAN2
UA_CLK 6
UA_CLK# 6
UA_DATAP0
UA_DATAN0
UA_DATAP1
UA_DATAN1
UA_DATAP2
UA_DATAN2
TXLCLKOUT+ 21
TXLCLKOUT- 21
TXLOUT0- 21
TXLOUT0+ 21
TXLOUT1- 21
TXLOUT1+ 21
TXLOUT2- 21
TXLOUT2+ 21
TXUCLKOUT+ 21
TXUCLKOUT- 21
TXUOUT0+ 21
TXUOUT0- 21
TXUOUT1- 21
TXUOUT1+ 21
TXUOUT2- 21
TXUOUT2+ 21
HDMI_SCL
R69 2KR69 2K
R85 2KR85 2K
HDMI_SDA
2 1
C375
C375
.1U/16V
.1U/16V
L34 0AL34 0A
3
Q12
Q12
AO3409
AO3409
VGA_GD#
R167 10KR167 10K
3
Q11
Q11
2N7002E
2N7002E
1
2
5
R178*0R178
*0
1
IFPC_DVI_3V
VCC3
R157
R157
A A
10K
10K
IPFC_C
2
VCC3
4
3
2
VCC3
HDMI I2C pull-high to 5V
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
NVG73M-LVDS,DVI,CRT,TV
NVG73M-LVDS,DVI,CRT,TV
NVG73M-LVDS,DVI,CRT,TV
1
of
11 35Wednesday, October 03, 2007
11 35Wednesday, October 03, 2007
11 35Wednesday, October 03, 2007
1A
1A
1A
PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com
Loading...