Quanta HP-Hawaii Schematic
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5
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8
Table of Contents
PAGE DESCRIPTION
FRONT PAGE
01
Hawaii Block Diagram
02
SKYLAKE 1/15 eDP/DDI/MISC
03
04
SKYLAKE 2/15(DDR4 I/F)
05
A A
B B
C C
D D
SKYLAKE 3/15(PowerManger)
SKYLAKE 4/15 (POWER-1)
06
SKYLAKE 5/15 (POWER-2)
07
SKYLAKE 6/15 (POWER-3)
08
SKYLAKE 7/15 (GND)
09
SKYLAKE 8/15 (RSV)
10
SKYLAKE 9/15(SPI/LPC/SM)
11
SKYLAKE 10/15(Strap)
12
SKYLAKE 11/15 (PCIE/USB)
13
SKYLAKE 12/15 (CLK/EMMC)
14
SKYLAKE 13/15 (HDA/GPIO)
15
16
SKYPAKE 14/15(PCH POWER)
SKYLAKE 15/15 XDP & APS
17
18
DDR4 DIMM0-STD H=8
19
DDR4 DIMM1-STD H=4
20
LVDS converter RTD2136
21
LCD CONN/CCD/TouchPanel
22
HDMI
23
Audio Codec(ALC3252)
24
RTL8161/RJ45
SATA RE-DEIVER
25
WLAN(NGFF)/HDD/ODD
26
Card Reader CONN
27
USB3.0 X 2/USB2.0 X 2
28
29
EC (IT8987)
30
Thermal/FAN/LEDs
31
JUMPER/LPCHeader
Blank
32
N16V-GMR (PCIE I/F) /NVDD
33
N16V-GMR (MEMORY)
34
N16V-GMR (DISPLAY)
35
36
N16V-GMR (GPIO/STRAPS)
37
N16V-GMR POWER/GND
38
VRAM DDR3 (BGA96)
39
+3V_S5/+5V_S5(RT6575AGQW)
40
+VDDQ (RT8231B)
41
+1V_S5 (TPS51211)
42
+1.8V_S5 (RT8068A)
43
CPU VR (NCP81206)
44
+VCCORE / +VCCGT
45
+VCCSA (NCP81253)
46
Load switch IC (APL3523A)
DC-IN
47
Discharge
48
+12V
49
OZ554
50
GPU_CORE (RT8812A)
51
DGPU +1.05V / +1.5V
52
5354Power Sequence
Power Sequence Diagram
SMBUS Map
55
1
2
3
Intel Skylake-U Platform
Skylake-U CPU (TDP 15W) SoC
Project Information
Phase: EVT
PCB AND SILKSCREEN COLOR
Program Phase Color of PCB
EVT
DVT
PVT/MVB /
PRODUCTION
4
5
6
RED
LIGHT BLUE
GREEN
YELLOW
YELLOW
WHITE
HP Restricted Secret
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT: HP-Hawaii
PROJECT: HP-Hawaii
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT: HP-Hawaii
Front Page
Front Page
Front Page
7
ilkscreen
S
1 58Thursday, December 17, 2015
1 58Thursday, December 17, 2015
1 58Thursday, December 17, 2015
1ACustom
1ACustom
1ACustom
8
5
WWW.AliSaler.Com
4
3
2
1
01
Intel Skylake-U Platform Block Diagram (Hawaii-G/-U)
D D
DDR4 SO-DIMM X2
1866-2133 MT/s
eDP 2 Lanes
eDP to LVDS
RTD2136
Dual Port LVDS
Panel Conn(40pin)
H
D+/FHD support
HDMI (1.65Gb/s)
HDMI Conn
-G SKU only
nVIDIA
2.5"/3.5" HDD
ODD
C C
SATA Gen3 (6Gb/s)
SATA Gen1 (1.5Gb/s)
Intel
S
kylake-U SoC
PCIE Gen2 (5Gb/s) 4 Lanes
N16V-GMR1
18W
BGA595
Size: 23 x 23 mm
DDR3 MD
15W
HP/Mic Audio
Combo Jack
BGA 1356
Size : 42x24(mm)
Speaker L/R
AUDIO CODEC
ALC3252
HDA
Array DMic
HD Camera
B B
Touch Panel
SPI Flash(128/64Mb)
W25Q128FVSIQ
PM 1.2
T
SLB9670
USB2.0 (480Mb/s)
USB2.0 (480Mb/s)
SPI
LPC
24MHz
32.768KHz
PCIE Gen2 (5Gb/s) 2 Lanes
USB2.0 (480Mb/s)
PCIE Gen1 (2.5Gb/s)
USB2.0 (480Mb/s)
USB3.0 (5Gb/s)
USB2.0 (480Mb/s)
USB2.0 (480Mb/s)
WLAN+BT
odule
M
M.2 2230
Giga Ethernet
RTL8161
Card Reader
RTS5145
USB 3.0 Port X2
USB 2.0 Port X2
RJ45 CONN
25MHz
4-in-1(SD/SDHC/SDXC/MMC) CONN
EC(ITE)
T8987
I
A A
HP Restricted Secret
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT: HP-Hawaii
PROJECT: HP-Hawaii
PROJECT: HP-Hawaii
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Block Diagram
Block Diagram
Block Diagram
5
Date: Sheet of
Date: Sheet of
4
3
2
Date: Sheet of
1
2 58Thursday, December 17, 2015
2 58Thursday, December 17, 2015
2 58Thursday, December 17, 2015
1ACustom
1ACustom
1ACustom
5
IN_D2#[22]
IN_D2[22]
D D
C C
HDMI
+VCCIO
eDP_COMPIO and ICOMPO signals should be shorted near
balls and routed with typical impedance <25 mohms
IN_D1#[22]
IN_D1[22]
IN_D0#[22]
IN_D0[22]
IN_CLK#[22]
IN_CLK[22]
SDVO_CLK[22]
SDVO_DATA[22]
R116 24.9/F_4
+3V
TP22
4
IN_D2#
IN_D2
IN_D1#
IN_D1
IN_D0#
IN_D0
IN_CLK#
IN_CLK
R208 2.2K_4
EDP_RCOMP
U21A
E55
DDI1_TXN[0]
F55
DDI1_TXP[0]
E58
DDI1_TXN[1]
F58
DDI1_TXP[1]
F53
DDI1_TXN[2]
G53
DDI1_TXP[2]
F56
DDI1_TXN[3]
G56
DDI1_TXP[3]
C50
DDI2_TXN[0]
D50
DDI2_TXP[0]
C52
DDI2_TXN[1]
D52
DDI2_TXP[1]
A50
DDI2_TXN[2]
B50
DDI2_TXP[2]
D51
DDI2_TXN[3]
C51
DDI2_TXP[3]
L13
GPP_E18/DDPB_CTRLCLK
L12
GPP_E19/DDPB_CTRLDATA
N7
GPP_E20/DDPC_CTRLCLK
N8
GPP_E21/DDPC_CTRLDATA
N11
GPP_E22/DDPD_CTRLCLK
N12
GPP_E23/DDPD_CTRLDATA
E52
EDP_RCOMP
SKL_ULT
REV = 1
SKL_ULT
DDI
DISPLAY SIDEBANDS
3
?
C47
?1 OF 20
C46
D46
C45
A45
B45
A47
B47
E45
F45
B52
G50
F50
E48
F48
G46
F46
L9
L7
L6
N9
L10
R12
R11
U13
INT_EDP_TXN0
INT_EDP_TXP0
INT_EDP_TXN1
INT_EDP_TXP1
INT_EDP_AUXN
INT_EDP_AUXP
PCH_HDMI_HPD
EDP_HPD
PCH_LVDS_BLON
PCH_DPST_PWM
PCH_LCDVCC_EN
EDP
EDP_TXN[0]
EDP_TXP[0]
EDP_TXN[1]
EDP_TXP[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]
EDP_AUXN
EDP_AUXP
EDP_DISP_UTIL
DDI1_AUXN
DDI1_AUXP
DDI2_AUXN
DDI2_AUXP
DDI3_AUXN
DDI3_AUXP
GPP_E13/DDPB_HPD0
GPP_E14/DDPC_HPD1
GPP_E15/DDPD_HPD2
GPP_E16/DDPE_HPD3
GPP_E17/EDP_HPD
EDP_BKLTEN
EDP_BKLTCTL
EDP_VDDEN
2
INT_EDP_TXN0 [20]
INT_EDP_TXP0 [20]
INT_EDP_TXN1 [20]
INT_EDP_TXP1 [20]
INT_EDP_AUXN [20]
INT_EDP_AUXP [20]
PCH_HDMI_HPD [22]
EDP_HPD [20]
PCH_EDP_BLON [21]
PCH_DPST_PWM [20]
PCH_LCDVCC_EN [21]
1
+3V[5,11,12,13,14,16,17,18,19,20,21,22,24,25,29,30,34,35,43,46,51,52]
+VCCIO[5,7,17,46,48]
+VCCSTPLL[5,6,7,10,43,46]
Reserve EDP_HPD opposites circuit!
+3V
R505
EDP_HPD
*10K_4
R504
100K_4
02
PM_THRMTRIP#
Processor pull-up (CPU)
SKL_ULT
CPU MISC
?
4 OF 20
JTAG
PROC_TCK
PROC_TDI
PROC_TDO
PROC_TMS
PROC_TRST#
PCH_JTAG_TCK
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_TRST#
PDC
JTAGX
B61
D60
A61
C60
B59
B56
D59
A56
C59
C61
A59
XDP_TCK0
XDP_TDI_CPU
XDP_TDO_CPU
XDP_TMS_CPU
XDP_TRST#_CPU
JTAG_TCK_PCH
JTAG_TDI_PCH
JTAG_TDO_PCH
JTAG_TMS_PCH
XDP_TRST#_CPU
JTAGX_PCH
XDP_TCK0 [17]
XDP_TDI_CPU [17]
XDP_TDO_CPU [17]
XDP_TMS_CPU [17]
XDP_TRST#_CPU [17]
JTAG_TCK_PCH [17]
JTAG_TDI_PCH [17]
JTAG_TDO_PCH [17]
JTAG_TMS_PCH [17]
JTAGX_PCH [17]
TP45
EC_PECI[29]
H_PROCHOT#[29,43,47]
XDP_BPM0[17]
XDP_BPM1[17]
B B
R170 49.9/F_4
R164 49.9/F_4
R79 49.9/F_4
R80 49.9/F_4
EC-PV-01
+VCCIO
A A
R428 *0/S_4
RF_OFF[26]
R431 *51_4
R440 51_4
R444 51_4
R448 51_4
R443 51_4
Close to Chipset
CATERR#
EC_PECI
R408 499/F_4
PM_THRMTRIP#
RF_OFF
PROC_POPIRCOMP
PCH_OPI_RCOMP
EDRAM_OPIO_RCOMP
EOPIO_RCOMP
JTAGX_PCH
JTAG_TMS_PCH
JTAG_TDI_PCH
JTAG_TDO_PCH
JTAG_TCK_PCH
PROCHOT#
D63
CATERR#
A54
PECI
C65
PROCHOT#
C63
THERMTRIP#
A65
SKTOCC#
C55
BPM#[0]
D55
BPM#[1]
B54
BPM#[2]
C56
BPM#[3]
A6
GPP_E3/CPU_GP0
A7
GPP_E7/CPU_GP1
BA5
GPP_B3/CPU_GP2
AY5
GPP_B4/CPU_GP3
AT16
PROC_POPIRCOMP
AU16
PCH_OPIRCOMP
H66
OPCE_RCOMP
H65
OPC_RCOMP
U21D
SKL_ULT
REV = 1
TO BE REPLACED WITH 1K OHMS FOR SKL .
470 OHM IS FOR I/P
PLACE NEAR CPU
XDP_TMS_CPU
XDP_TDI_CPU
XDP_TDO_CPU
H_PROCHOT#
XDP_TCK0
XDP_TRST#_CPU
R422 1K_4
R435 *51_4
R436
R427 *51_4
R406 1K_4
R430 51_4
R439 51_4
+VCCSTPLL
+VCCIO
*51_4
+VCCSTPLL
HP Restricted Secret
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT: HP-Hawaii
PROJECT: HP-Hawaii
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet
PROJECT: HP-Hawaii
SKL CPU eDP/DDI/MISC
SKL CPU eDP/DDI/MISC
SKL CPU eDP/DDI/MISC
1
1ACustom
1ACustom
1ACustom
of
3 58Wednesday, March 09, 2016
3 58Wednesday, March 09, 2016
3 58Wednesday, March 09, 2016
5
WWW.AliSaler.Com
4
3
2
1
M_A_DQSN[7:0][18]
M_A_DQSP[7:0][18]
M_A_DQ[63:0][18]
SkyLake ULT Processor (DDR4 IL)
D D
?
U21B
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_B_DQ0
M_B_DQ1
M_B_DQ2
C C
B B
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
AL71
DDR0_DQ[0]
AL68
DDR0_DQ[1]
AN68
DDR0_DQ[2]
AN69
DDR0_DQ[3]
AL70
DDR0_DQ[4]
AL69
DDR0_DQ[5]
AN70
DDR0_DQ[6]
AN71
DDR0_DQ[7]
AR70
DDR0_DQ[8]
AR68
DDR0_DQ[9]
AU71
DDR0_DQ[10]
AU68
DDR0_DQ[11]
AR71
DDR0_DQ[12]
AR69
DDR0_DQ[13]
AU70
DDR0_DQ[14]
AU69
DDR0_DQ[15]
AF65
DDR1_DQ[0]/DDR0_DQ[16]
AF64
DDR1_DQ[1]/DDR0_DQ[17]
AK65
DDR1_DQ[2]/DDR0_DQ[18]
AK64
DDR1_DQ[3]/DDR0_DQ[19]
AF66
DDR1_DQ[4]/DDR0_DQ[20]
AF67
DDR1_DQ[5]/DDR0_DQ[21]
AK67
DDR1_DQ[6]/DDR0_DQ[22]
AK66
DDR1_DQ[7]/DDR0_DQ[23]
AF70
DDR1_DQ[8]/DDR0_DQ[24]
AF68
DDR1_DQ[9]/DDR0_DQ[25]
AH71
DDR1_DQ[10]/DDR0_DQ[26]
AH68
DDR1_DQ[11]/DDR0_DQ[27]
AF71
DDR1_DQ[12]/DDR0_DQ[28]
AF69
DDR1_DQ[13]/DDR0_DQ[29]
AH70
DDR1_DQ[14]/DDR0_DQ[30]
AH69
DDR1_DQ[15]/DDR0_DQ[31]
BB65
DDR0_DQ[16]/DDR0_DQ[32]
AW65
DDR0_DQ[17]/DDR0_DQ[33]
AW63
DDR0_DQ[18]/DDR0_DQ[34]
AY63
DDR0_DQ[19]/DDR0_DQ[35]
BA65
DDR0_DQ[20]/DDR0_DQ[36]
AY65
DDR0_DQ[21]/DDR0_DQ[37]
BA63
DDR0_DQ[22]/DDR0_DQ[38]
BB63
DDR0_DQ[23]/DDR0_DQ[39]
BA61
DDR0_DQ[24]/DDR0_DQ[40]
AW61
DDR0_DQ[25]/DDR0_DQ[41]
BB59
DDR0_DQ[26]/DDR0_DQ[42]
AW59
DDR0_DQ[27]/DDR0_DQ[43]
BB61
DDR0_DQ[28]/DDR0_DQ[44]
AY61
DDR0_DQ[29]/DDR0_DQ[45]
BA59
DDR0_DQ[30]/DDR0_DQ[46]
AY59
DDR0_DQ[31]/DDR0_DQ[47]
AT66
DDR1_DQ[16]/DDR0_DQ[48]
AU66
DDR1_DQ[17]/DDR0_DQ[49]
AP65
DDR1_DQ[18]/DDR0_DQ[50]
AN65
DDR1_DQ[19]/DDR0_DQ[51]
AN66
DDR1_DQ[20]/DDR0_DQ[52]
AP66
DDR1_DQ[21]/DDR0_DQ[53]
AT65
DDR1_DQ[22]/DDR0_DQ[54]
AU65
DDR1_DQ[23]/DDR0_DQ[55]
AT61
DDR1_DQ[24]/DDR0_DQ[56]
AU61
DDR1_DQ[25]/DDR0_DQ[57]
AP60
DDR1_DQ[26]/DDR0_DQ[58]
AN60
DDR1_DQ[27]/DDR0_DQ[59]
AN61
DDR1_DQ[28]/DDR0_DQ[60]
AP61
DDR1_DQ[29]/DDR0_DQ[61]
AT60
DDR1_DQ[30]/DDR0_DQ[62]
AU60
DDR1_DQ[31]/DDR0_DQ[63]
SKL_ULT
REV = 1
SKL_ULT
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSP[1]/DDR0_DQSP[3]
DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSP[3]/DDR0_DQSP[7]
NIL-DDR CH ÂA
2 OF 20
DDR0_CKN[0]
DDR0_CKP[0]
DDR0_CKN[1]
DDR0_CKP[1]
DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]
DDR0_CS#[0]
DDR0_CS#[1]
DDR0_ODT[0]
DDR0_ODT[1]
DDR0_MA[3]
DDR0_MA[4]
DDR0_DQSN[0]
DDR0_DQSP[0]
DDR0_DQSN[1]
DDR0_DQSP[1]
DDR0_ALERT#
DDR0_PAR
DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ
DDR_VTT_CNTL
AU53
AT53
AU55
AT55
BA56
BB56
AW56
AY56
AU45
AU43
AT45
AT43
BA51
BB54
BA52
AY52
AW52
AY55
AW54
BA54
BA55
AY54
AU46
AU48
AT46
AU50
AU52
AY51
AT48
AT50
BB50
AY50
BA50
BB52
AM70
M_A_DQSN0
AM69
M_A_DQSP0
AT69
M_A_DQSN1
AT70
M_A_DQSP1
AH66
M_B_DQSN0
AH65
M_B_DQSP0
AG69
M_B_DQSN1
AG70
M_B_DQSP1
BA64
M_A_DQSN2
AY64
M_A_DQSP2
AY60
M_A_DQSN3
BA60
M_A_DQSP3
AR66
M_B_DQSN2
AR65
M_B_DQSP2
AR61
M_B_DQSN3
AR60
M_B_DQSP3
AW50
M_A_ALERT#
AT52
M_A_PARITY M_B_ALERT#
AY67
AY68
BA67
AW67
M_A_CLKN0 [18]
M_A_CLKP0 [18]
M_A_CLKN1 [18]
M_A_CLKP1 [18]
M_A_CKE0 [18]
M_A_CKE1 [18]
M_A_CS#0 [18]
M_A_CS#1 [18]
M_A_ODT0 [18]
M_A_ODT1 [18]
M_A_A5 [18]
M_A_A9 [18]
M_A_A6 [18]
M_A_A8 [18]
M_A_A7 [18]
M_A_BG#0 [18]
M_A_A12 [18]
M_A_A11 [18]
M_A_ACT# [18]
M_A_BG#1 [18]
M_A_A13 [18]
M_A_CAS# [18]
M_A_WE# [18]
M_A_RAS# [18]
M_A_BA#0 [18]
M_A_A2 [18]
M_A_BA#1 [18]
M_A_A10 [18]
M_A_A1 [18]
M_A_A0 [18]
M_A_A3 [18]
M_A_A4 [18]
M_A_ALERT# [18]
M_A_PARITY [18]
SM_VREF_CA [18]
TP43
SM_VREF_DQ1 [19]
DDR_VTT_CTRL [18]
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
U21C
AY39
DDR0_DQ[32]/DDR1_DQ[0]
AW39
DDR0_DQ[33]/DDR1_DQ[1]
AY37
DDR0_DQ[34]/DDR1_DQ[2]
AW37
DDR0_DQ[35]/DDR1_DQ[3]
BB39
DDR0_DQ[36]/DDR1_DQ[4]
BA39
DDR0_DQ[37]/DDR1_DQ[5]
BA37
DDR0_DQ[38]/DDR1_DQ[6]
BB37
DDR0_DQ[39]/DDR1_DQ[7]
AY35
DDR0_DQ[40]/DDR1_DQ[8]
AW35
DDR0_DQ[41]/DDR1_DQ[9]
AY33
DDR0_DQ[42]/DDR1_DQ[10]
AW33
DDR0_DQ[43]/DDR1_DQ[11]
BB35
DDR0_DQ[44]/DDR1_DQ[12]
BA35
DDR0_DQ[45]/DDR1_DQ[13]
BA33
DDR0_DQ[46]/DDR1_DQ[14]
BB33
DDR0_DQ[47]/DDR1_DQ[15]
AU40
DDR1_DQ[32]/DDR1_DQ[16]
AT40
DDR1_DQ[33]/DDR1_DQ[17]
AT37
DDR1_DQ[34]/DDR1_DQ[18]
AU37
DDR1_DQ[35]/DDR1_DQ[19]
AR40
DDR1_DQ[36]/DDR1_DQ[20]
AP40
DDR1_DQ[37]/DDR1_DQ[21]
AP37
DDR1_DQ[38]/DDR1_DQ[22]
AR37
DDR1_DQ[39]/DDR1_DQ[23]
AT33
DDR1_DQ[40]/DDR1_DQ[24]
AU33
DDR1_DQ[41]/DDR1_DQ[25]
AU30
DDR1_DQ[42]/DDR1_DQ[26]
AT30
DDR1_DQ[43]/DDR1_DQ[27]
AR33
DDR1_DQ[44]/DDR1_DQ[28]
AP33
DDR1_DQ[45]/DDR1_DQ[29]
AR30
DDR1_DQ[46]/DDR1_DQ[30]
AP30
DDR1_DQ[47]/DDR1_DQ[31]
AY31
DDR0_DQ[48]/DDR1_DQ[32]
AW31
DDR0_DQ[49]/DDR1_DQ[33]
AY29
DDR0_DQ[50]/DDR1_DQ[34]
AW29
DDR0_DQ[51]/DDR1_DQ[35]
BB31
DDR0_DQ[52]/DDR1_DQ[36]
BA31
DDR0_DQ[53]/DDR1_DQ[37]
BA29
DDR0_DQ[54]/DDR1_DQ[38]
BB29
DDR0_DQ[55]/DDR1_DQ[39]
AY27
DDR0_DQ[56]/DDR1_DQ[40]
AW27
DDR0_DQ[57]/DDR1_DQ[41]
AY25
DDR0_DQ[58]/DDR1_DQ[42]
AW25
DDR0_DQ[59]/DDR1_DQ[43]
BB27
DDR0_DQ[60]/DDR1_DQ[44]
BA27
DDR0_DQ[61]/DDR1_DQ[45]
BA25
DDR0_DQ[62]/DDR1_DQ[46]
BB25
DDR0_DQ[63]/DDR1_DQ[47]
AU27
DDR1_DQ[48]
AT27
DDR1_DQ[49]
AT25
DDR1_DQ[50]
AU25
DDR1_DQ[51]
AP27
DDR1_DQ[52]
AN27
DDR1_DQ[53]
AN25
DDR1_DQ[54]
AP25
DDR1_DQ[55]
AT22
DDR1_DQ[56]
AU22
DDR1_DQ[57]
AU21
DDR1_DQ[58]
AT21
DDR1_DQ[59]
AN22
DDR1_DQ[60]
AP22
DDR1_DQ[61]
AP21
DDR1_DQ[62]
AN21
DDR1_DQ[63]
SKL_ULT
REV = 1
?
SKL_ULT
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSN[5]/DDR1_DQSN[3]
DDR1_DQSP[5]/DDR1_DQSP[3]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSN[7]/DDR1_DQSN[5]
DDR0_DQSP[7]/DDR1_DQSP[5]
DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]
DDR1_ALERT#
DRAM_RESET#
DDR_RCOMP[0]
DDR_RCOMP[1]
NIL-DDR CH ÂB
3 OF 20
DDR_RCOMP[2]
PDC
DDR1_CKN[0]
DDR1_CKN[1]
DDR1_CKP[0]
DDR1_CKP[1]
DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]
DDR1_CS#[0]
DDR1_CS#[1]
DDR1_ODT[0]
DDR1_ODT[1]
DDR1_MA[3]
DDR1_MA[4]
DDR1_PAR
AN45
AN46
AP45
AP46
AN56
AP55
AN55
AP53
BB42
AY42
BA42
AW42
AY48
AP50
BA48
BB48
AP48
AP52
AN50
AN48
AN53
AN52
BA43
AY43
AY44
AW44
BB44
AY47
BA44
AW46
AY46
BA46
BB46
BA47
BA38
AY38
AY34
BA34
AT38
AR38
AT32
AR32
BA30
AY30
AY26
BA26
AR25
AR27
AR22
AR21
AN43
AP43
AT13
AR18
AT18
AU18
M_A_DQSN4
M_A_DQSP4
M_A_DQSN5
M_A_DQSP5
M_B_DQSN4
M_B_DQSP4
M_B_DQSN5
M_B_DQSP5
M_A_DQSN6
M_A_DQSP6
M_A_DQSN7
M_A_DQSP7
M_B_DQSN6
M_B_DQSP6
M_B_DQSN7
M_B_DQSP7
M_B_PARITY
SM_DRAMRST#
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
M_B_DQSN[7:0][19]
M_B_DQSP[7:0][19]
M_B_DQ[63:0][19]
+VDDQ[7,18,19,32,40]
M_B_CLKN0 [19]
M_B_CLKN1 [19]
M_B_CLKP0 [19]
M_B_CLKP1 [19]
M_B_CKE0 [19]
M_B_CKE1 [19]
M_B_CS#0 [19]
M_B_CS#1 [19]
M_B_ODT0 [19]
M_B_ODT1 [19]
M_B_A5 [19]
M_B_A9 [19]
M_B_A6 [19]
M_B_A8 [19]
M_B_A7 [19]
M_B_BG#0 [19]
M_B_A12 [19]
M_B_A11 [19]
M_B_ACT# [19]
M_B_BG#1 [19]
M_B_A13 [19]
M_B_CAS# [19]
M_B_WE# [19]
M_B_RAS# [19]
M_B_BA#0 [19]
M_B_A2 [19]
M_B_BA#1 [19]
M_B_A10 [19]
M_B_A1 [19]
M_B_A0 [19]
M_B_A3 [19]
M_B_A4 [19]
M_B_ALERT# [19]
M_B_PARITY [19]
R149 121/F_4
R162 80.6/F_4
R153 100/F_4
+VDDQ
R180
470_4
DDR3_DRAMRST# [18,19]
03
A A
HP Restricted Secret
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT: HP-Hawaii
PROJECT: HP-Hawaii
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet
PROJECT: HP-Hawaii
SKL CPU DDR
SKL CPU DDR
SKL CPU DDR
1
4 58Wednesday, March 09, 2016
1ACustom
1ACustom
1ACustom
of
4 58Wednesday, March 09, 2016
4 58Wednesday, March 09, 2016
5
D D
PLTRST#[24,26,29,31,33]
SYS_RESET#[17]
RSMRST#[17,29]
HWPG[17,29]
EC_SUSPWRACK[29]
EC_SUSACK#[29]
PCIE_WAKE#[24,26]
C C
TP23
TP58
TP18
RSMRST#
R403 *10K_4
EC-PV-01
R484 *0/S_4
R580*0_4
R192*0_4
RSMRST#
SYS_RESET#
PLTRST#
PLTRST#
SYS_RESET#
R485 *0/S_4
PROCPWRGD
H_VCCST_PWRGD
SYS_PWROK
PCH_PWROK
DPWROK
SUSWARN#
SUSACK#
PCIE_WAKE#
PCIE_LAN_WAKE#
LAN_DIS#
EC5
*220P/50V_4
C554
*220P/50V_4
RSMRST#_R
4
C549
*220P/50V_4
U21K
SYSTEM POWER MANAGEMENT
AN10
GPP_B13/PLTRST#
B5
SYS_RESET#
AY17
RSMRST#
A68
PROCPWRGD
B65
VCCST_PWRGD
B6
SYS_PWROK
BA20
PCH_PWROK
BB20
DSW_PW ROK
AR13
GPP_A13/SUSW ARN#/SUSPW RDNACK
AP11
GPP_A15/SUSACK#
BB15
WAKE#
AM15
GPD2/LAN_WAKE#
AW17
GPD11/LANPHYPC
AT15
GPD7/RSVD
SKL_ULT
REV = 1
SKL_ULT
?
11 OF 20
3
GPP_B12/SLP_S0#
GPD4/SLP_S3#
GPD5/SLP_S4#
GPD10/SLP_S5#
SLP_SUS#
SLP_LAN#
GPD9/SLP_WLAN#
GPD6/SLP_A#
GPD3/PWRBTN#
GPD1/ACPRESENT
GPD0/BATLOW #
GPP_A11/PME#
GPP_B11/EXT_PW R_GATE#
INTRUDER#
GPP_B2/VRALERT#
2
+3V_S5[11,12,13,15,16,17,18,21,24,26,29,31,32,39,40,41,42,46,47,48,52]
+3V[3,11,12,13,14,16,17,18,19,20,21,22,24,25,29,30,34,35,43,46,51,52]
+5V_S5[21,23,27,28,32,39,40,41,43,45,46,47,48,52]
+VCCIO[3,7,17,46,48]
+VCCSTPLL[3,6,7,10,43,46]
+3V_RTC_2[14,16]
1
04
PCH Pull-high/low(CLG)
AT11
PM_SLP_S0#
AP15
BA16
AY16
AN15
AW15
SLP_LAN#
BB17
SLP_WLAN#
AN16
BA15
DNBSWON#
AY15
AC_PRESENT_EC
AU13
PM_BATLOW_N_EC
AU11
AP16
INTRUDER#_R
AM10
EXT_PWR_GATE#
AM11
?
R177 1M_4
PM_SLP_S0# [17,29]
SUSB# [17,29]
SUSC# [17,29]
SLP_S5# [17,29]
PM_SLP_SUS# [29]
TP62
TP60
SLP_A# [17]
TP31
DNBSWON# [17,29]
AC_PRESENT_EC [29]
TP27
+3V_RTC_2
SUSWARN#
SUSACK#
PM_BATLOW_N_EC
PCIE_WAKE#
AC_PRESENT_EC
PCIE_LAN_WAKE#
EXT_PWR_GATE#
SYS_RESET#
PLTRST#
RSMRST#
DPWROK
+3V_S5
R189 *10K_4
R191 *10K_4
R181 10K_4
+3V_S5
R493 1K_4
R490 10K_4
R187 10K_4
R186 *20K/F_4
+3V
R500 10K_4
R222 *10K/F_4
R223 100K/F_4
R487 10K_4
R481 *100K/F_4
RSMRST#
EC_DPWROK[29]
EC_DPWROK
R483 *0_4
R538 *0/S_4
DPWROK
EC-PV-01
B B
A A
Close to CPU side
H_VCCST_PWRGD trace 0.3" - 1.5"
D14 RB500V-40
21
+VCCIO
H_VCCST_PWRGD_RHWPG
R401
1K_4
C512
*10P/50V_4
+VCCSTPLL
R405
*1K_4
R404 60.4_4
H_VCCST_PWRGD
+VCCIO +3V_S5+5V_S5
R478
15K_4
R480
100K_4
2
1 3
+1.0V_PWRGD_G1
C530
0.1U/16V_4
R479
100K_4
+1.0V_PWRGD_G2
Q32
METR3904-G
EC-PV-01
R496 *0/S_4
C552
R476
10K_4
System PWR_OK(CLG)
Q31
2N7002K
HWPG
R475
100K_4
3
2
1
*0.1U/16V_4
EC_PWROKSYS_PWROK
R497
100K/F_4
EC_PWROK [29]
HP Restricted Secret
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT: HP-Hawaii
PROJECT: HP-Hawaii
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet
PROJECT: HP-Hawaii
SKL CPU Power Management
SKL CPU Power Management
SKL CPU Power Management
1
1ACustom
1ACustom
1ACustom
of
5 58Wednesday, March 09, 2016
5 58Wednesday, March 09, 2016
5 58Wednesday, March 09, 2016
5
WWW.AliSaler.Com
C267
C236
10U/6.3V_4
C228
22U/6.3V_6
C225
22U/6.3V_6
C256
10U/6.3V_4
C223
22U/6.3V_6
C270
22U/6.3V_6
D D
C C
10U/6.3V_4
C233
10U/6.3V_4
C227
22U/6.3V_6
C246
10U/6.3V_4
C264
22U/6.3V_6
22U/6.3V_6
C268
10U/6.3V_4
C245
22U/6.3V_6
22U/6.3V_6
C229
C265
Close CPU
+VCC_CORE
47U/6.3V_8
+VCC_CORE
10U/6.3V_4
C501
C243
C237
47U/6.3V_8
C523
10U/6.3V_4
C211
47U/6.3V_8
C521
10U/6.3V_4
47U/6.3V_8
10U/6.3V_4
C75
C244
C502
47U/6.3V_8
C519
10U/6.3V_4
C226
22U/6.3V_6
C241
10U/6.3V_4
C230
22U/6.3V_6
C239
47U/6.3V_8
C522
10U/6.3V_4
4
SKL_ULT
22U/6.3V_6
10U/6.3V_4
C506
47U/6.3V_8
C524
10U/6.3V_4
22U/6.3V_6
Under CPU
C217
47U/6.3V_8
C520
10U/6.3V_4
+VCC_CORE +VCC_CORE
C269
AK33
AK35
AK37
AK38
AK40
AL33
AL37
AL40
AM32
AM33
AM35
AM37
AM38
AK32
AB62
AC63
AE63
AE62
AG62
AL63
AJ62
A30
A34
A39
A44
G30
K32
P62
V62
H63
G61
+VCC_CORE
U21L
CPU POWER 1 OF 4
VCC_A30
VCC_A34
33A
VCC_A39
VCC_A44
VCC_AK33
VCC_AK35
VCC_AK37
VCC_AK38
VCC_AK40
VCC_AL33
VCC_AL37
VCC_AL40
VCC_AM32
VCC_AM33
VCC_AM35
VCC_AM37
VCC_AM38
VCC_G30
RSVD_K32
RSVD_AK32
VCCOPC_AB62
VCCOPC_P62
VCCOPC_V62
VCC_OPC_1P8_H63
VCC_OPC_1P8_G61
VCCOPC_SENSE
VSSOPC_SENSE
VCCEOPIO
VCCEOPIO
VCCEOPIO_SENSE
VSSEOPIO_SENSE
SKL_ULT
REV = 1
RF RESERVE
3
?
12 OF 20
C510 *1U/6.3V_4
C505 *22U/6.3V_6
C508 *1U/6.3V_4
C503 *22U/6.3V_6
VCC_G32
VCC_G33
VCC_G35
VCC_G37
VCC_G38
VCC_G40
VCC_G42
VCC_J30
VCC_J33
VCC_J37
VCC_J40
VCC_K33
VCC_K35
VCC_K37
VCC_K38
VCC_K40
VCC_K42
VCC_K43
VCC_SENSE
VSS_SENSE
VIDALERT#
VIDSCK
VIDSOUT
VCCSTG_G20
PDC
G32
G33
G35
G37
C276
G38
1U/6.3V_4
G40
G42
J30
J33
J37
J40
K33
C240
K35
1U/6.3V_4
K37
K38
K40
K42
K43
E32
E33
B63
A63
D64
G20
?
Layout note: need routing together and ALERT need between CLK and DATA.
CLOSE TO CPU
PLACE THE PU RESISTORS
C249
1U/6.3V_4
C252
1U/6.3V_4C258
H_CPU_SVIDALRT#
VR_SVID_CLK_R
H_CPU_SVIDDAT
H_CPU_SVIDALRT#
C232
1U/6.3V_4
C251
1U/6.3V_4
2
C247
1U/6.3V_4
C250
1U/6.3V_4
R129 100/F_4
R132 100/F_4
R417 220/F_4
C274
1U/6.3V_4
C271
1U/6.3V_4
C261
1U/6.3V_4C266
C272
1U/6.3V_4
+VCCSTPLL
R418
56.2/F_4
C513
*0.1U/16V_4
Under CPU
C248
1U/6.3V_4
C259
1U/6.3V_4
+VCC_CORE[32,43,44]
+VCCSTG[7]
+VCCSTPLL[3,5,7,10,43,46]
C221
1U/6.3V_4
+VCC_CORE
VCC_SENSE [43]
VSS_SENSE [43]
+VCCSTG
SVID ALERT
VR_SVID_ALERT# [43]
1
05
100- ±1%
pull-up to VCC
near processor.
B B
PLACE THE PU RESISTORS
CLOSE TO VR
PULL UP IS IN THE VR MODULE
VR_SVID_CLK_R
CLOSE TO CPU
PLACE THE PU RESISTORS
H_CPU_SVIDDAT
A A
EC-PV-01
R423 *0/S_4
+VCCSTPLL
R424
*54.9/F_4
+VCCSTPLL
R412
100/F_4
EC-PV-01
R413 *0/S_4
SVID CLK
VR_SVID_CLK [43]
SVID DATA
VR_SVID_DATA [43]
HP Restricted Secret
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT: HP-Hawaii
PROJECT: HP-Hawaii
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT: HP-Hawaii
SKL CPU Power
SKL CPU Power
SKL CPU Power
1ACustom
1ACustom
6 58Wednesday, March 09, 2016
6 58Wednesday, March 09, 2016
1
6 58Wednesday, March 09, 2016
1ACustom
5
D D
Under CPU
C175
C277
10U/6.3V_4
10U/6.3V_4
Close CPU
C163
10U/6.3V_4
C C
+VCCIO
C301
10U/6.3V_4
10U/6.3V_4
EC-PV-01
R477 *0/S_4
R143 *0/S_6
R134 *0/S_6
C299
C165
10U/6.3V_4
+VCCSTG
+VCCPLL_OC+VDDQ
+VCCPLL+VCCSTPLL
+VDDQ
C162
1U/6.3V_4
C168
1U/6.3V_4
C180
1U/6.3V_4
Close CPU Under CPU
*1U/6.3V_4
10U/6.3V_4
4
C300
1U/6.3V_4
+VCCSTPLL
+VCCSTG
+VCCPLL_OC
+VCCPLL
AU23
AU28
AU35
AU42
BB23
BB32
BB41
BB47
BB51
AM40
AL23
A18
A22
K20
K21
SKL_ULT
U21N
CPU POWER 3 OF 4
VDDQ_AU23
VDDQ_AU28
VDDQ_AU35
VDDQ_AU42
VDDQ_BB23
VDDQ_BB32
VDDQ_BB41
VDDQ_BB47
VDDQ_BB51
VDDQC
0
VCCST
VCCSTG_A22
VCCPLL_OC
VCCPLL_K20
VCCPLL_K21
SKL_ULT
REV = 1
2A
.12A
0.04A
0.12A
?
14 OF 20
VCCIO
3.1A
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCSA
4.5A
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCIO_SENSE
VSSIO_SENSE
VSSSA_SENSE
VCCSA_SENSE
AK28
AK30
AL30
AL42
AM28
AM30
AM42
AK23
AK25
G23
G25
G27
G28
J22
J23
J27
K23
K25
K27
K28
K30
AM23
AM22
H21
H20
3
C292
1U/6.3V_4
+VCCSA
C304
1U/6.3V_4
VCCIO_VCCSENSE
VCCIO_VSSSENSE
Under CPU
C219
1U/6.3V_4
C311
1U/6.3V_4
C283
10U/6.3V_4
C290
C288
1U/6.3V_4
1U/6.3V_4
C285
C281
1U/6.3V_4C278
1U/6.3V_4
C317
C538
10U/6.3V_4
10U/6.3V_4
VSSSA_SENSE [43]
VCCSA_SENSE [43]
C287
10U/6.3V_4
C284
1U/6.3V_4
C312
10U/6.3V_4
C293
10U/6.3V_4
C533
1U/6.3V_4
C531
10U/6.3V_4
VCCIO_VCCSENSE
VCCIO_VSSSENSE
2
C279
1U/6.3V_4
C313
1U/6.3V_4
C535
10U/6.3V_4
R136 100/F_4
R141 100/F_4
Close CPU
C289
1U/6.3V_4
Under CPU
C297
10U/6.3V_4
Close CPU
C216
1U/6.3V_4
C310
10U/6.3V_4
+VCCIO
+VCCIO
C291
1U/6.3V_4
C315
10U/6.3V_4
+VCCIO[3,5,17,46,48]
+VCCSA[43,45]
+VDDQ[4,18,19,32,40]
+VCCSTPLL[3,5,6,10,43,46]
+VCCSTG[6]
C536
10U/6.3V_4
C303
10U/6.3V_4C186
1
C537
10U/6.3V_4
06
C280
10U/6.3V_4
Close CPUUnder CPU
+VCCSTG +VCCPLL_OC +VCCPLL+VCCSTPLL
B B
C528
1U/6.3V_4
C309
1U/6.3V_4
C539
1U/6.3V_4
C314
1U/6.3V_4
Close A18 Ball
+VCCSTPLL
C540
*1U/6.3V_4
C541
*22U/6.3V_6
+VDDQ
C169
10U/6.3V_6
C306
10U/6.3V_6
C307
10U/6.3V_6
C171
10U/6.3V_6
C305
10U/6.3V_6
C170
10U/6.3V_6
C193
1U/6.3V_4
C164
1U/6.3V_4
C202
1U/6.3V_4
C166
1U/6.3V_4
Close to CPU
A A
HP Restricted Secret
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT: HP-Hawaii
PROJECT: HP-Hawaii
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet
PROJECT: HP-Hawaii
SKL CPU Power
SKL CPU Power
SKL CPU Power
1
7 58Wednesday, March 09, 2016
1ACustom
1ACustom
1ACustom
of
7 58Wednesday, March 09, 2016
7 58Wednesday, March 09, 2016
5
WWW.AliSaler.Com
der CPU
D D
C207
10U/6.3V_4
C194
10U/6.3V_4
C198
C C
B B
1U/6.3V_4
C209
1U/6.3V_4
C195
1U/6.3V_4
C160
1U/6.3V_4
C210
10U/6.3V_4
C189
10U/6.3V_4
C206
1U/6.3V_4
C184
1U/6.3V_4
C146
10U/6.3V_4
10U/6.3V_4
C161
1U/6.3V_4
C178
1U/6.3V_4
VCCGT_SENSE[43]
VSSGT_SENSE[43]
10U/6.3V_4
C212
10U/6.3V_4
C183
1U/6.3V_4
C145
1U/6.3V_4
C188
10U/6.3V_4
C155
10U/6.3V_4
C151
1U/6.3V_4
C196
1U/6.3V_4
4
+VCCGT
AA63
AA64
AA66
AA67
AA69
AA70
AA71
AC64
AC65
AC66
AC67
AC68
AC69
AC70
AC71
M62
N63
N64
N66
N67
N69
A48
A53
A58
A62
A66
J43
J45
J46
J48
J50
J52
J53
J55
J56
J58
J60
K48
K50
K52
K53
K55
K56
K58
K60
L62
L63
L64
L65
L66
L67
L68
L69
L70
L71
J70
J69
SKL_ULT
U21M
CPU POWER 2 OF 4
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT_SENSE
VSSGT_SENSE
SKL_ULT
REV = 1
31A
PDC
13 OF 20
?
VCCGTX_SENSE
VSSGTX_SENSE
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGTX_AK42
VCCGTX_AK43
VCCGTX_AK45
VCCGTX_AK46
VCCGTX_AK48
VCCGTX_AK50
VCCGTX_AK52
VCCGTX_AK53
VCCGTX_AK55
VCCGTX_AK56
VCCGTX_AK58
VCCGTX_AK60
VCCGTX_AK70
VCCGTX_AL43
VCCGTX_AL46
VCCGTX_AL50
VCCGTX_AL53
VCCGTX_AL56
VCCGTX_AL60
VCCGTX_AM48
VCCGTX_AM50
VCCGTX_AM52
VCCGTX_AM53
VCCGTX_AM56
VCCGTX_AM58
VCCGTX_AU58
VCCGTX_AU63
VCCGTX_BB57
VCCGTX_BB66
N70
N71
R63
R64
R65
R66
R67
R68
R69
R70
R71
T62
U65
U68
U71
W63
W64
W65
W66
W67
W68
W69
W70
W71
Y62
AK42
AK43
AK45
AK46
AK48
AK50
AK52
AK53
AK55
AK56
AK58
AK60
AK70
AL43
AL46
AL50
AL53
AL56
AL60
AM48
AM50
AM52
AM53
AM56
AM58
AU58
AU63
BB57
BB66
AK62
AL61
3
+VCCGT
C
lose CPUUn
C504
47U/6.3V_8
C60
22U/6.3V_6
C204
22U/6.3V_6
C125
47U/6.3V_8C157
C62
22U/6.3V_6
C182
22U/6.3V_6
C102
47U/6.3V_8
C176
22U/6.3V_6
C74
22U/6.3V_6
C94
47U/6.3V_8
C185
22U/6.3V_6
C82
22U/6.3V_6
C181
22U/6.3V_6C179
2
C507
47U/6.3V_8
C511
47U/6.3V_8
C203
22U/6.3V_6
C177
22U/6.3V_6
C61
22U/6.3V_6
1
+VCCGT [43,44]
07
A A
5
4
3
2
HP Restricted Secret
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT: HP-Hawaii
PROJECT: HP-Hawaii
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT: HP-Hawaii
SKL CPU Power
SKL CPU Power
SKL CPU Power
8 58Wednesday, March 09, 2016
8 58Wednesday, March 09, 2016
8 58Wednesday, March 09, 2016
1
1ACustom
1ACustom
1ACustom
5
4
3
2
1
08
D D
U21R
?
SKL_ULT
GND 3 OF 3
F8
VSS
G10
VSS
G22
VSS
G43
VSS
G45
VSS
G48
VSS
G5
VSS
G52
VSS
C C
B B
G55
VSS
G58
VSS
G6
VSS
G60
VSS
G63
VSS
G66
VSS
H15
VSS
H18
VSS
H71
VSS
J11
VSS
J13
VSS
J25
VSS
J28
VSS
J32
VSS
J35
VSS
J38
VSS
J42
VSS
J8
VSS
K16
VSS
K18
VSS
K22
VSS
K61
VSS
K63
VSS
K64
VSS
K65
VSS
K66
VSS
K67
VSS
K68
VSS
K70
VSS
K71
VSS
L11
VSS
L16
VSS
L17
VSS
18 OF 20
SKL_ULT
REV = 1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L18
L2
L20
L4
L8
N10
N13
N19
N21
N6
N65
N68
P17
P19
P20
P21
R13
R6
T15
T17
T18
T2
T21
T4
U10
U63
U64
U66
U67
U69
U70
V16
V17
V18
W13
W6
W9
Y17
Y19
Y20
Y21
?
AA65
AA68
AB15
AB16
AB18
AB21
AD13
AD16
AD19
AD20
AD21
AD62
AE64
AE65
AE66
AE67
AE68
AE69
AF10
AF15
AF17
AF63
AG16
AG17
AG18
AG19
AG20
AG21
AG71
AH13
AH63
AH64
AH67
AJ15
AJ18
AJ20
AK11
AK16
AK18
AK21
AK22
AK27
AK63
AK68
AK69
AL28
AL32
AL35
AL38
AL45
AL48
AL52
AL55
AL58
AL64
AD8
AF1
AF2
AF4
AH6
AK8
U21P
?
SKL_ULT
GND 1 OF 3
A5
VSS
A67
VSS
A70
VSS
AA2
VSS
AA4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AB8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL2
VSS
VSS
VSS
VSS
VSS
AL4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
16 OF 20
SKL_ULT
REV = 1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL65
AL66
AM13
AM21
AM25
AM27
AM43
AM45
AM46
AM55
AM60
AM61
AM68
AM71
AM8
AN20
AN23
AN28
AN30
AN32
AN33
AN35
AN37
AN38
AN40
AN42
AN58
AN63
AP10
AP18
AP20
AP23
AP28
AP32
AP35
AP38
AP42
AP58
AP63
AP68
AP70
AR11
AR15
AR16
AR20
AR23
AR28
AR35
AR42
AR43
AR45
AR46
AR48
AR5
AR50
AR52
AR53
AR55
AR58
AR63
AR8
AT2
AT20
AT23
AT28
AT35
AT4
AT42
AT56
AT58
?
AT63
AT68
AT71
AU10
AU15
AU20
AU32
AU38
AV68
AV69
AV70
AV71
AW10
AW12
AW14
AW16
AW18
AW21
AW23
AW26
AW28
AW30
AW32
AW34
AW36
AW38
AW41
AW43
AW45
AW47
AW49
AW51
AW53
AW55
AW57
AW6
AW60
AW62
AW64
AW66
AW8
AY66
BA10
BA14
BA18
BA23
BA28
BA32
BA36
BA45
U21Q
SKL_ULT
?
GND 2 OF 3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AV1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B10
VSS
B14
VSS
B18
VSS
B22
VSS
B30
VSS
B34
VSS
B39
VSS
B44
VSS
B48
VSS
B53
VSS
B58
VSS
B62
VSS
B66
VSS
B71
VSS
BA1
VSS
VSS
VSS
VSS
BA2
VSS
VSS
VSS
VSS
VSS
F68
VSS
VSS
17 OF 20
SKL_ULT
REV = 1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
PDC
BA49
BA53
BA57
BA6
BA62
BA66
BA71
BB18
BB26
BB30
BB34
BB38
BB43
BB55
BB6
BB60
BB64
BB67
BB70
C1
C25
C5
D10
D11
D14
D18
D22
D25
D26
D30
D34
D39
D44
D45
D47
D48
D53
D58
D6
D62
D66
D69
E11
E15
E18
E21
E46
E50
E53
E56
E6
E65
E71
F1
F13
F2
F22
F23
F27
F28
F32
F33
F35
F37
F38
F4
F40
F42
BA41
?
A A
HP Restricted Secret
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT: HP-Hawaii
PROJECT: HP-Hawaii
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT: HP-Hawaii
SKL CPU GND
SKL CPU GND
SKL CPU GND
1ACustom
1ACustom
9 58Wednesday, March 09, 2016
9 58Wednesday, March 09, 2016
1
9 58Wednesday, March 09, 2016
1ACustom
5
WWW.AliSaler.Com
D D
C C
B B
CFG0[17]
CFG1[17]
CFG2[17]
CFG3[17]
CFG4[17]
CFG5[17]
CFG6[17]
CFG7[17]
CFG8[17]
CFG9[17]
CFG10[17]
CFG11[17]
CFG12[17]
CFG13[17]
CFG14[17]
CFG15[17]
CFG16[17]
CFG17[17]
CFG18[17]
CFG19[17]
ITP_PMODE[17]
+1V_S5
R85 49.9/F_4
R494 1K_4
4
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG_RCOMP
AL25
AL27
BA70
BA68
E68
B67
D65
D67
E70
C68
D68
C67
F71
G69
F70
G68
H70
G71
H69
G70
E63
F63
E66
F66
E60
E8
AY2
AY1
D1
D3
K46
K45
C71
B70
F60
A52
J71
J68
F65
G65
F61
E61
U21S
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
CFG[18]
CFG[19]
CFG_RCOMP
ITP_PMODE
RSVD_AY2
RSVD_AY1
RSVD_D1
RSVD_D3
RSVD_K46
RSVD_K45
RSVD_AL25
RSVD_AL27
RSVD_C71
RSVD_B70
RSVD_F60
RSVD_A52
RSVD_TP_BA70
RSVD_TP_BA68
RSVD_J71
RSVD_J68
VSS_F65
VSS_G65
RSVD_F61
RSVD_E61
SKL_ULT
REV = 1
SKL_ULT
RESERVED SIGNALS-1
PDC
?
19 OF 20
3
RSVD_TP_BB68
RSVD_TP_BB69
RSVD_TP_AK13
RSVD_TP_AK12
RSVD_BB2
RSVD_BA3
RSVD_D5
RSVD_D4
RSVD_B2
RSVD_C2
RSVD_B3
RSVD_A3
RSVD_AW1
RSVD_E1
RSVD_E2
RSVD_BA4
RSVD_BB4
RSVD_A4
RSVD_C4
RSVD_A69
RSVD_B69
RSVD_AY3
RSVD_D71
RSVD_C70
RSVD_C54
RSVD_D54
VSS_AY71
ZVM#
RSVD_TP_AW71
RSVD_TP_AW70
MSM#
PROC_SELECT#
2
+1V_S5[14,16,17,41,46,48]
+VCCSTPLL[3,5,6,7,43,46]
+1.8V_S5[16,29,42,46,48]
BB68
BB69
AK13
AK12
BB2
BA3
AU5
TP5
AT5
TP6
D5
D4
B2
C2
B3
A3
AW1
E1
E2
BA4
BB4
A4
C4
BB5
TP4
A69
B69
AY3
D71
C70
C54
D54
AY4
TP1
BB3
TP2
AY71
AR56
AW71
AW70
AP56
C64
?
EC-PV-01
E
C-PV-01
R511 *0/S_4
R399 *0/S_4
R407 *100K_4
+1.8V_S5
R533 *0_6
C558
Close to CPU
Placement are required for future platform
compatibility purpose only.
+VCCSTPLL
*1U/6.3V_4
AW69
AW68
AU56
AW48
C7
U12
U11
H11
U21T
RSVD_AW69
RSVD_AW68
RSVD_AU56
RSVD_AW48
RSVD_C7
RSVD_U12
RSVD_U11
RSVD_H11
SKL_ULT
REV = 1
SKL_ULT
SPARE
?
20 OF 20
RSVD_F6
RSVD_E3
RSVD_C11
RSVD_B11
RSVD_A11
RSVD_D12
RSVD_C12
RSVD_F52
1
09
F6
E3
C11
B11
A11
D12
C12
F52
?
Processor Strapping
CFG3
A A
5
(Physcial Debug Enable)
DFX Privacy
CFG4
(DP Presence Strap)
The CFG signals have a default value of '1' if not terminated on the board.
1 0
Disable: Enable: Set DFX Enable in DFX interface MSR
Disable; No physical DP attached to eDP
4
Enable; An ext DP device is connected to eDP
3
CFG3
CFG4
Circuit
R400 *1K_4
R402 1K_4
HP Restricted Secret
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT: HP-Hawaii
PROJECT: HP-Hawaii
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT: HP-Hawaii
SKL CPU RSVD
SKL CPU RSVD
SKL CPU RSVD
1ACustom
1ACustom
10 58Wednesday, March 09, 2016
10 58Wednesday, March 09, 2016
1
10 58Wednesday, March 09, 2016
1ACustom
5
D D
PCH_SPI_CS2#_TPM[31]
SIO_EXT_SMI#[29,31]
SERIRQ[29,31]
C C
GPIO Pull UP
SERIRQ
CLKRUN#
SIO_EXT_SMI#
EC_RCIN#
PCI_SERR#
R516 10K_4
R503 8.2K/F_4
R525 10K_4
R495 10K_4
R512 10K_4
+3V +3V_S5
4
PCH_SPI_CLK
PCH_SPI_MISO
PCH_SPI_MOSI
PCH_SPI_IO2
PCH_SPI_IO3
PCH_SPI_CS0#
PCH_SPI_CS2#_TPM
SIO_EXT_SMI#
PCI_SERR#
SMB_PCH_CLK
SMB_PCH_DAT
SMB_ME1_CLK
SMB_ME1_DAT
SMB_ME0_CLK
SMB_ME0_DAT
U21E
AV2
SPI0_CLK
AW3
SPI0_MISO
AV3
SPI0_MOSI
AW2
SPI0_IO2
AU4
SPI0_IO3
AU3
SPI0_CS0#
AU2
SPI0_CS1#
AU1
SPI0_CS2#
M2
GPP_D1/SPI1_CLK
M3
GPP_D2/SPI1_MISO
J4
GPP_D3/SPI1_MOSI
V1
GPP_D21/SPI1_IO2
V2
GPP_D22/SPI1_IO3
M1
GPP_D0/SPI1_CS#
G3
CL_CLK
G2
CL_DATA
G1
CL_RST#
AW13
GPP_A0/RCIN#
AY11
GPP_A6/SERIRQ
SKL_ULT
REV = 1
R206 2.2K_4
R207 2.2K_4
R234 1K_4
R233 1K_4
R217 499/F_4
R521 499/F_4
SPI - FLASH
SPI - TOUCH
C LINK
SKL_ULT
3
?
SMBUS, SMLINK
GPP_B23/SML1ALERT#/PCHHOT#
LPC
GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS#
GPP_A14/SUS_STAT#/ESPI_RESET#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
GPP_A10/CLKOUT_LPC1
PDC
5 OF 20
PCH SPI ROM(CLG)
GPP_C0/SMBCLK
GPP_C1/SMBDATA
GPP_C2/SMBALERT#
GPP_C3/SML0CLK
GPP_C4/SML0DATA
GPP_C5/SML0ALERT#
GPP_C6/SML1CLK
GPP_C7/SML1DATA
GPP_A8/CLKRUN#
R7
R8
R10
R9
W2
W1
W3
V3
AM7
AY13
BA13
BB13
AY12
BA12
BA11
AW9
AY9
AW11
SMB_PCH_CLK
SMB_PCH_DAT
SML0ALERT#
SMB_ME0_CLK
SMB_ME0_DAT
SML1ALERT#
SMB_ME1_CLK
SMB_ME1_DAT
GPP_B23
CLK_PCI_EC_R
CLK_PCI_LPC_R
CPU_CLKRUN#
2
R190 22/F_4
R195 22/F_4
R498 *0/S_4
EC_LPCCLK
CLKRUN#
SML0ALERT# [12]
SML1ALERT# [12,29,30]
TP25
LAD0 [26,29,31]
LAD1 [26,29,31]
LAD2 [26,29,31]
LAD3 [26,29,31]
LFRAME# [26,29,31]
LPCPD# [29]
CLK_33M_KBC [26,29,31]EC_RCIN#[29]
CLKRUN# [29]
+3V_S5[5,12,13,15,16,17,18,21,24,26,29,31,32,39,40,41,42,46,47,48,52]
+3V[3,5,12,13,14,16,17,18,19,20,21,22,24,25,29,30,34,35,43,46,51,52]
CLK_33M_KBC
EC_LPCCLK
1
EMI(near PCH)
C353
*18P/50V_4
10
EC-SI-13
C351
10P/50V_4
EC-PV-01
?
EC-PV-01
PCH_SPI_CS0#
PCH_SPI_CLK
PCH_SPI_MOSI
PCH_SPI_MISO
PCH_SPI_IO2
PCH_SPI_IO3
R278 *0/S_4
R255 *0/S_4
R259 *0/S_4
R270 *0/S_4
R263 *0/S_4
R251 *0/S_4
EC_SPI_CS0# [29]
EC_SPI_CLK [29]
EC_SPI_MOSI [29]
EC_SPI_MISO [29]
TP36
TP32
PCH_SPI_CS0# [31]
PCH_SPI_CLK [31]
PCH_SPI_MOSI [17,31]
PCH_SPI_MISO [31]
PCH_SPI_IO2 [17,31]
PCH_SPI_IO3 [31]
EC
ROM recovery
R253 *0/S_4
R274 *10K_4
+3V_S5
B B
SMBus/Pull-up(CLG)
+3V_S5
SMBCLK0_EC[29,36]
SMBDATA0_EC[29,36]
R236 4.7K_4
+3V
SMB_RUN_DAT[17,18,19]
A A
SMB_RUN_CLK[17,18,19]
5
+3V
R237 4.7K_4
Q15
5
2
6
*2N7002DW
Q14
4 3
1
PJT138K
C384 1U/10V_4
43
SMB_ME1_CLK
EC
1
SMB_ME1_DAT
+3V
5
SMB_PCH_DAT
2
6
SMB_PCH_CLK
4
XDP
SODIMM
Vender P/N
inbond 8MB
GD AKE2EZN0Q00 (GD25B64CSIGR)8
Socket
3
Size
AKE3EFP0N07 (W25Q64FVSSIQ)W
MB
DFHS08FS023
PCH_SPI_CS0# PCH_SPI_CS0#_R
PCH_SPI_CLK
PCH_SPI_MISO
+3VSPI
PCH_SPI_IO2
ROM recovery reserve
R277 0_4
R256 33.2/F_4
R261 33.2/F_4
R271 33.2/F_4
R265 1K/F_4
R264 33.2/F_4
PCH_SPI_CLK_R
PCH_SPI_MOSI_RPCH_SPI_MOSI
PCH_SPI_MISO_R
C394
22P/50V_4
TP39
TP34
TP35
TP38
TP37
TP33
2
U7
1
CE#
6
SCK
5
SI
2
SO
HOLD#
3
WP#
8P ROM
PCH_SPI_CS0#_R
PCH_SPI_CLK_R
PCH_SPI_MOSI_R
PCH_SPI_MISO_R
BIOS_WP#
BIOS_HOLD#
HP Restricted Secret
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
+3V_S5
8
VDD
7
4
VSS
SKL CPU SPI/LPC/SMB
SKL CPU SPI/LPC/SMB
SKL CPU SPI/LPC/SMB
EC-PV-01
+3VSPI
BIOS_HOLD#
PCH_SPI_IO3BIOS_WP#
R257 1K/F_4
R252 33.2/F_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT: HP-Hawaii
PROJECT: HP-Hawaii
PROJECT: HP-Hawaii
1
C383
0.1U/16V_4
PCH_SPI_CS0#_R [31]
of
11 58Tuesday, March 15, 2016
11 58Tuesday, March 15, 2016
11 58Tuesday, March 15, 2016
1ACustom
1ACustom
1ACustom
5
WWW.AliSaler.Com
4
3
2
1
+3V[3,5,11,13,14,16,17,18,19,20,21,22,24,25,29,30,34,35,43,46,51,52]
11
Functional Strap Definitions
D D
DESIGN NOTE:
WEAK PULL UP RESISTOR PRESENT ON THIS NET
ACZ_SPKR[15,23]
C C
B B
GSPI1_MOSI[15]
ACZ_SPKR
GSPI1_MOSI
R510
*20K/F_4
TOP SWAP OVERRIDE
HIGH - TOP SWAP ENABLE
LOW-DISABLED
HIGH: LPC SELECTED FOR SYSTEM FLASH
WEAK INTERNAL PD
+3V_S5
R209
1K_4
R183
*20K/F_4
No Boot:
The signal has a weak internal pull-down.
0 = Disable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (no confidentiality).
1 = Enable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (with confidentiality). Must be
pulled up to support Intel AMT with TLS and Intel
SBA (Small Business Advantage) with TLS.
EN_OVERRIDE[29] ACZ_SDOUT [15,31]
GPP_B18[15]SML0ALERT#[11]
SML1ALERT#[11,29,30]
R152 1K_4
ACZ_SDOUT
GPP_B18SML0ALERT#
SML1ALERT#
+3V
+3V_S5
R193
*4.7K_4
R185
10K_4
R522
*10K_4
No Boot:
The signal has a weak internal pull-down.
0 = Enable security measures defined in the Flash
Descriptor.
1 = Disable Flash Descriptor Security (override). This
strap should only be asserted high using external
pull-up in manufacturing/debug environments ONLY.
This function is useful when running ITP/XDP.
No Boot:
The signal has a weak internal pull-down.
0 = Disable No Reboot mode.
1 = Enable No Reboot mode
(PCH will disable the TCO
Timer system reboot feature).
This function is useful when running ITP/XDP.
R506
*20K/F_4
No Boot:
The signal has a weak internal pull-down.
This field determines the destination of accesses to the
BIOS memory range. Also controllable using Boot BIOS
Destination bit (Chipset Configuration Registers: Offset
3410h:Bit 10). This strap is used in conjunction with Boot
BIOS Destination Selection 0 strap.
Bit 10 Boot BIOS Destination
0 SPI
1 LPC
A A
R515
20K/F_4
No Boot:
The signal has a weak internal pull-down.
0 = LPC Is selected for EC.
1 = eSPI Is selected for EC.
HP Restricted Secret
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT: HP-Hawaii
PROJECT: HP-Hawaii
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet
PROJECT: HP-Hawaii
SKL CPU Strap
SKL CPU Strap
SKL CPU Strap
1
12 58Wednesday, March 09, 2016
1ACustom
1ACustom
1ACustom
of
12 58Wednesday, March 09, 2016
12 58Wednesday, March 09, 2016
5
4
3
2
1
?
U21H
PCIE/USB3/SATA
PCIE_RXN1_GPU[33]
dGPU
D D
dGPU
dGPU
dGPU
HDD
C C
ODD
LAN
WLAN
B B
PCIE_RXP1_GPU[33]
PCIE_TXN1_GPU[33]
PCIE_TXP1_GPU[33]
PCIE_RXN2_GPU[33]
PCIE_RXP2_GPU[33]
PCIE_TXN2_GPU[33]
PCIE_TXP2_GPU[33]
PCIE_RXN3_GPU[33]
PCIE_RXP3_GPU[33]
PCIE_TXN3_GPU[33]
PCIE_TXP3_GPU[33]
PCIE_RXN4_GPU[33]
PCIE_RXP4_GPU[33]
PCIE_TXN4_GPU[33]
PCIE_TXP4_GPU[33]
SATA_RXN0[25]
SATA_RXP0[25]
SATA_TXN0[25]
SATA_TXP0[25]
SATA_RXN1[25]
SATA_RXP1[25]
SATA_TXN1[25]
SATA_TXP1[25]
PCIE_RXN9_LAN[24]
PCIE_RXP9_LAN[24]
PCIE_TXN9_LAN[24]
PCIE_TXP9_LAN[24]
PCIE_RXN10_WLAN[26]
PCIE_RXP10_WLAN[26]
PCIE_TXN10_WLAN[26]
PCIE_TXP10_WLAN[26]
XDP_PRDY#_CPU[17]
XDP_PREQ#_CPU[17]
C545 DIS@0.22u/10V/X5R_4
C543 DIS@0.22u/10V/X5R_4
C547 DIS@0.22u/10V/X5R_4
C546 DIS@0.22u/10V/X5R_4
C542 DIS@0.22u/10V/X5R_4
C544 DIS@0.22u/10V/X5R_4
C532 DIS@0.22u/10V/X5R_4
C534 DIS@0.22u/10V/X5R_4
C296 0.1U/16V_4
C282 0.1U/16V_4
C529 0.1U/16V_4
C527 0.1U/16V_4
R499 100/F_4
R502 10K_4
+3V
PCIE_TXN1_GPU_C
PCIE_TXP1_GPU_C
PCIE_TXN2_GPU_C
PCIE_TXP2_GPU_C
PCIE_TXN3_GPU_C
PCIE_TXP3_GPU_C
PCIE_TXN4_GPU_C
PCIE_TXP4_GPU_C
PCIE_TXN9_LAN_C
PCIE_TXP9_LAN_C
PCIE_TXN10_WLAN_C
PCIE_TXP10_WLAN_C
PCIE_RCOMPN
PCIE_RCOMPP
PIRQA#
H13
PCIE1_RXN/USB3_5_RXN
G13
PCIE1_RXP/USB3_5_RXP
B17
PCIE1_TXN/USB3_5_TXN
A17
PCIE1_TXP/USB3_5_TXP
G11
PCIE2_RXN/USB3_6_RXN
F11
PCIE2_RXP/USB3_6_RXP
D16
PCIE2_TXN/USB3_6_TXN
C16
PCIE2_TXP/USB3_6_TXP
H16
PCIE3_RXN
G16
PCIE3_RXP
D17
PCIE3_TXN
C17
PCIE3_TXP
G15
PCIE4_RXN
F15
PCIE4_RXP
B19
PCIE4_TXN
A19
PCIE4_TXP
F16
PCIE5_RXN
E16
PCIE5_RXP
C19
PCIE5_TXN
D19
PCIE5_TXP
G18
PCIE6_RXN
F18
PCIE6_RXP
D20
PCIE6_TXN
C20
PCIE6_TXP
F20
PCIE7_RXN/SATA0_RXN
E20
PCIE7_RXP/SATA0_RXP
B21
PCIE7_TXN/SATA0_TXN
A21
PCIE7_TXP/SATA0_TXP
G21
PCIE8_RXN/SATA1A_RXN
F21
PCIE8_RXP/SATA1A_RXP
D21
PCIE8_TXN/SATA1A_TXN
C21
PCIE8_TXP/SATA1A_TXP
E22
PCIE9_RXN
E23
PCIE9_RXP
B23
PCIE9_TXN
A23
PCIE9_TXP
F25
PCIE10_RXN
E25
PCIE10_RXP
D23
PCIE10_TXN
C23
PCIE10_TXP
F5
PCIE_RCOMPN
E5
PCIE_RCOMPP
D56
PROC_PRDY#
D61
PROC_PREQ#
BB11
GPP_A7/PIRQA#
E28
PCIE11_RXN/SATA1B_RXN
E27
PCIE11_RXP/SATA1B_RXP
D24
PCIE11_TXN/SATA1B_TXN
C24
PCIE11_TXP/SATA1B_TXP
E30
PCIE12_RXN/SATA2_RXN
F30
PCIE12_RXP/SATA2_RXP
A25
PCIE12_TXN/SATA2_TXN
B25
PCIE12_TXP/SATA2_TXP
SKL_ULT
REV = 1
SKL_ULT
PDC
SSIC / USB3
USB2
GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2
8 OF 20
USB3_1_RXN
USB3_1_RXP
USB3_1_TXN
USB3_1_TXP
USB3_2_RXN/SSIC_1_RXN
USB3_2_RXP/SSIC_1_RXP
USB3_2_TXN/SSIC_1_TXN
USB3_2_TXP/SSIC_1_TXP
USB3_3_RXN/SSIC_2_RXN
USB3_3_RXP/SSIC_2_RXP
USB3_3_TXN/SSIC_2_TXN
USB3_3_TXP/SSIC_2_TXP
USB3_4_RXN
USB3_4_RXP
USB3_4_TXN
USB3_4_TXP
USB2N_1
USB2P_1
USB2N_2
USB2P_2
USB2N_3
USB2P_3
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
USB2N_7
USB2P_7
USB2N_8
USB2P_8
USB2N_9
USB2P_9
USB2N_10
USB2P_10
USB2_COMP
USB2_ID
USB2_VBUSSENSE
GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#
GPP_E4/DEVSLP0
GPP_E5/DEVSLP1
GPP_E6/DEVSLP2
GPP_E8/SATALED#
?
H8
G8
C13
D13
J6
H6
B13
A13
J10
H10
B15
A15
E10
F10
C15
D15
AB9
AB10
AD6
AD7
AH3
AJ3
AD9
AD10
AJ1
AJ2
AF6
AF7
AH1
AH2
AF8
AF9
AG1
AG2
AH7
AH8
AB6
AG3
AG4
A9
C9
D9
B9
J1
J2
J3
H2
H3
G4
H1
USB3_RXN1
USB3_RXP1
USB3_TXN1
USB3_TXP1
USB3_RXN2
USB3_RXP2
USB3_TXN2
USB3_TXP2
USBP1ÂUSBP1+
USBP2ÂUSBP2+
USBP3ÂUSBP3+
USBP4ÂUSBP4+
USBP5ÂUSBP5+
USBP6ÂUSBP6+
USBP7ÂUSBP7+
USBP8ÂUSBP8+
USBP9ÂUSBP9+
PLACE COMP R WITHIN 500 MILS
FROM USB2_COMP PIN WITH
TRACE IMPEDANCE LESS THAN 0.5 OHMS
USB2_COMP
R182 113/F_4
R188 *0/S_4
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
GPP_E4_RSVD
DEVSLP1
GPP_E1_RSVD
TPM_INT#
SATA_LED#
USB3_RXN1 [28]
USB3_RXP1 [28]
USB3_TXN1 [28]
USB3_TXP1 [28]
USB3_RXN2 [28]
USB3_RXP2 [28]
USB3_TXN2 [28]
USB3_TXP2 [28]
USBP1- [28]
USBP1+ [28]
USBP2- [27]
USBP2+ [27]
USBP3- [21]
USBP3+ [21]
USBP4- [28]
USBP4+ [28]
USBP5- [26]
USBP5+ [26]
TP28
TP26
USBP7- [28]
USBP7+ [28]
USBP8- [28]
USBP8+ [28]
USBP9- [21]
USBP9+ [21]
EC-PV-01
USB_OC0# [28]
USB_OC2# [28]
SATA_LED# [30]
TPM_INT# [31]
USB3 COMBO1
U
SB3 COMBO2
USB3 COMBO1
Cardreader
Camera
USB3 COMBO2
BT
RSVD
USB2 PORT1
USB2 PORT2
Touch Panel
SATA_LED#
DEVSLP1
GPP_E1_RSVD
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
GPP_E4_RSVD
+3V[3,5,11,12,14,16,17,18,19,20,21,22,24,25,29,30,34,35,43,46,51,52]
+3V_S5[5,11,12,15,16,17,18,21,24,26,29,31,32,39,40,41,42,46,47,48,52]
R527 10K_4
R513 *10K_4
R514 10K_4
R488 10K_4
R489 10K_4
R491 10K_4
R492 10K_4
R526 *10K_4
12
+3V
+3V_S5
PCI-E Port Mapping Table
FunctionPCI-E
PORT-1
PORT-2
PORT-3
PORT-4
dGPU
dGPU
dGPU
dGPU
PORT-5
PORT-6
PORT-7
PORT-8
A A
PORT-9
PORT-10
HDD
ODD
LAN
WLAN
CLK REQ
PORT-0
PORT-1
PORT-2
PORT-3
PORT-4
PORT-5
Function
dGPU
WLAN
LAN
PORT-11
PORT-12
5
USB3.0 Port Mapping Table
USB3.0 Function
4
USB3 COMBO1
USB3 COMBO2
NC
C
N
PORT-1
PORT-2
PORT-3
PORT-4
USB2.0 Port Mapping Table
USB2.0 Function
PORT-1
PORT-2
PORT-3
PORT-4
PORT-5
PORT-6
PORT-7
PORT-8
PORT-9
PORT-10
3
USB3 COMBO1
Cardreader
Camera
USB3 COMBO2
BT
NC
USB2 PORT1
USB2 PORT2
Touch Panel
C
N
HP Restricted Secret
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT: HP-Hawaii
PROJECT: HP-Hawaii
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT: HP-Hawaii
SKL CPU PCIE/USB/SATA
SKL CPU PCIE/USB/SATA
SKL CPU PCIE/USB/SATA
1
1ACustom
1ACustom
13 58Wednesday, March 09, 2016
13 58Wednesday, March 09, 2016
13 58Wednesday, March 09, 2016
1ACustom
5
WWW.AliSaler.Com
CLK_GFX_N[33]
D D
WLAN
LAN
C C
+3V
CLK_GFX_P[33]
PCIE_CLKREQ_VGA#[33]
CLK_PCIE_WLANN[26]
CLK_PCIE_WLANP[26]
PCIE_CLKREQ_WLAN#[26]
CLK_PCIE_LANN[24]
CLK_PCIE_LANP[24]
PCIE_CLKREQ_LAN#[24]
LK_REQ/Strap Pin(CLG)
C
R19610K_4
R21210K_4
R19710K_4
R21110K_4
R21010K_4
R21310K_4
4
CLK_GFX_N
CLK_GFX_P
PCIE_CLKREQ_VGA#
PCIE_CLKREQ1#
CLK_PCIE_WLANN
CLK_PCIE_WLANP
PCIE_CLKREQ_WLAN#
CLK_PCIE_LANN
CLK_PCIE_LANP
PCIE_CLKREQ_LAN#
PCIE_CLKREQ4#
PCIE_CLKREQ5#
PCIE_CLKREQ4#
PCIE_CLKREQ_WLAN#
PCIE_CLKREQ_LAN#
PCIE_CLKREQ1#
PCIE_CLKREQ5#
PCIE_CLKREQ_VGA#
U21J
D42
CLKOUT_PCIE_N0
C42
CLKOUT_PCIE_P0
AR10
GPP_B5/SRCCLKREQ0#
B42
CLKOUT_PCIE_N1
A42
CLKOUT_PCIE_P1
AT7
GPP_B6/SRCCLKREQ1#
D41
CLKOUT_PCIE_N2
C41
CLKOUT_PCIE_P2
AT8
GPP_B7/SRCCLKREQ2#
D40
CLKOUT_PCIE_N3
C40
CLKOUT_PCIE_P3
AT10
GPP_B8/SRCCLKREQ3#
B40
CLKOUT_PCIE_N4
A40
CLKOUT_PCIE_P4
AU8
GPP_B9/SRCCLKREQ4#
E40
CLKOUT_PCIE_N5
E38
CLKOUT_PCIE_P5
AU7
GPP_B10/SRCCLKREQ5#
SKL_ULT
REV = 1
A36
B36
C38
D38
C36
D36
A38
B38
C31
D31
C33
D33
A31
B31
A33
B33
A29
B29
C28
D28
A27
B27
C27
D27
U21I
CSI-2
CSI2_DN0
CSI2_DP0
CSI2_DN1
CSI2_DP1
CSI2_DN2
CSI2_DP2
CSI2_DN3
CSI2_DP3
CSI2_DN4
CSI2_DP4
CSI2_DN5
CSI2_DP5
CSI2_DN6
CSI2_DP6
CSI2_DN7
CSI2_DP7
CSI2_DN8
CSI2_DP8
CSI2_DN9
CSI2_DP9
CSI2_DN10
CSI2_DP10
CSI2_DN11
CSI2_DP11
SKL_ULT
REV = 1
SKL_ULT
CLOCK SIGNALS
SKL_ULT
?
10 OF 20
?
PDC
9 OF 20
3
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
GPD8/SUSCLK
XTAL24_IN
XTAL24_OUT
XCLK_BIASREF
SRTCRST#
CSI2_CLKN0
CSI2_CLKP0
CSI2_CLKN1
CSI2_CLKP1
CSI2_CLKN2
CSI2_CLKP2
CSI2_CLKN3
CSI2_CLKP3
CSI2_COMP
GPP_D4/FLASHTRIG
EMMC
GPP_F13/EMMC_DATA0
GPP_F14/EMMC_DATA1
GPP_F15/EMMC_DATA2
GPP_F16/EMMC_DATA3
GPP_F17/EMMC_DATA4
GPP_F18/EMMC_DATA5
GPP_F19/EMMC_DATA6
GPP_F20/EMMC_DATA7
GPP_F21/EMMC_RCLK
GPP_F22/EMMC_CLK
GPP_F12/EMMC_CMD
EMMC_RCOMP
?
RTCX1
RTCX2
RTCRST#
2
+3V_RTC_2[5,16]
+3V[3,5,11,12,13,16,17,18,19,20,21,22,24,25,29,30,34,35,43,46,51,52]
+1V_S5[10,16,17,41,46,48]
RP1 install for XDP
*0_4P2R_4
4
F43
E43
BA17
E37
E35
E42
AM18
AM20
AN18
AM16
?
C37
D37
C32
D32
C29
D29
B26
A26
E13
B7
AP2
AP1
AP3
AN3
AN1
AN2
AM4
AM1
AM2
AM3
AP4
AT1
CSI2_RCOMP
GPP_D4
EMMC_RCOMP
CK_XDP_N_R
CK_XDP_P_R
PCH_SUSCLK
XTAL24_IN
XTAL24_OUT
XCLK_BIASREF
RTC_X1
RTC_X2
SRTC_RST#
RTC_RST#
R165 100/F_4
R184 200/F_4
3
2
1
RP1
R461 2.7K/F_4
R462 *60.4/F_4
TP61
CK_XDP_N [17]
CK_XDP_P [17]
TP59
+1V_S5
Co-lay 60ohm 1% to GND
for Cannonlake use
RTC_RST# [17]
1
13
B B
RTC Clock 32.768KHz
EC-SI-12
C355 12P/50V_4
Y3
32.768KHz
C356 12P/50V_4
RTC_X1
12
R224
10M_4
RTC_X2
External Crystal
EC-SI-12
R130
1M_4
5
C260 12P/50V_4
1
2
24MHZ +-30PPM
Y2
4
3
C273 12P/50V_4
A A
XTAL24_IN
XTAL24_OUT
RTC Circuitry(RTC)
+3V_RTC_0
R555 45.3K_4
R553 1K_4
CN20
12
+ -
CONNDIPHOUSING2P
4
RTC Power trace width 20mils.
+3V_RTC_2+3V_ALW
R554
1.5K_4
2 1
D18 RB500V-40
+3V_RTC_1 EC_RTC_RST
2 1
D17 RB500V-40
C581
1U/6.3V_4
R567
20K/F_4
R566
20K/F_4
3
RTC_RST#
C589
1U/6.3V_4
C588
1U/6.3V_4
SRTC_RST#
C590
*220P/50V_4
RTC_RST#
3
2
Q35
2N7002K
1
2
R561
10K_4
EC_RTC_RST [29]
HP Restricted Secret
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT: HP-Hawaii
PROJECT: HP-Hawaii
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT: HP-Hawaii
SKL CPU CLK/eMMC
SKL CPU CLK/eMMC
SKL CPU CLK/eMMC
14 58Tuesday, March 15, 2016
14 58Tuesday, March 15, 2016
14 58Tuesday, March 15, 2016
1
1ACustom
1ACustom
1ACustom
5
D D
BIT_CLK_AUDIO
+3V_S5
TP29
TP30
TP24
TP20
GPP_B18
GSPI1_MOSI
UART0_RXD
UART0_TXD
UART0_RTS#
UART0_CTS#
SIO_EXT_SCI#
ACZ_SDIN0
GPP_C18_RSVD
GPP_C19_RSVD
GPP_F4_RSVD_1P8
GPP_F5_RSVD_1P9
EC-SI-13
C336
6.8P/50V/NPO_4
R167 *1K_4
R172 33_4
R161 33_4
R151 33_4
R16833_4
ACZ_SPKR
ACZ_SYNC
ACZ_BCLK
ACZ_SDOUT
ACZ_RST#_R
GPP_B18[12]
GSPI1_MOSI[12]
TP66
TP64
TP63
BIOS debug
C C
B B
A A
TP65
SIO_EXT_SCI#[29]
ACZ_SDOUT[12,31]
ACZ_SYNC_AUDIO[23]
BIT_CLK_AUDIO[23]
ACZ_SDOUT_AUDIO[23]
ACZ_SDIN0[23]
ACZ_RST#_AUDIO[23]
ACZ_SPKR[12,23]
U21F
AN8
GPP_B15/GSPI0_CS#
AP7
GPP_B16/GSPI0_CLK
AP8
GPP_B17/GSPI0_MISO
AR7
GPP_B18/GSPI0_MOSI
AM5
GPP_B19/GSPI1_CS#
AN7
GPP_B20/GSPI1_CLK
AP5
GPP_B21/GSPI1_MISO
AN5
GPP_B22/GSPI1_MOSI
AB1
GPP_C8/UART0_RXD
AB2
GPP_C9/UART0_TXD
W4
GPP_C10/UART0_RTS#
AB3
GPP_C11/UART0_CTS#
AD1
GPP_C20/UART2_RXD
AD2
GPP_C21/UART2_TXD
AD3
GPP_C22/UART2_RTS#
AD4
GPP_C23/UART2_CTS#
U7
GPP_C16/I2C0_SDA
U6
GPP_C17/I2C0_SCL
U8
GPP_C18/I2C1_SDA
U9
GPP_C19/I2C1_SCL
AH9
GPP_F4/I2C2_SDA
AH10
GPP_F5/I2C2_SCL
AH11
GPP_F6/I2C3_SDA
AH12
GPP_F7/I2C3_SCL
AF11
GPP_F8/I2C4_SDA
AF12
GPP_F9/I2C4_SCL
SKL_ULT
REV = 1
AW22
AW20
BA22
HDA_SYNC/I2S0_SFRM
AY22
HDA_BLK/I2S0_SCLK
BB22
HDA_SDO/I2S0_TXD
BA21
HDA_SDI0/I2S0_RXD
AY21
HDA_SDI1/I2S1_RXD
HDA_RST#/I2S1_SCLK
J5
GPP_D23/I2S_MCLK
AY20
I2S1_SFRM
I2S1_TXD
AK7
GPP_F1/I2S2_SFRM
AK6
GPP_F0/I2S2_SCLK
AK9
GPP_F2/I2S2_TXD
AK10
GPP_F3/I2S2_RXD
H5
GPP_D19/DMIC_CLK0
D7
GPP_D20/DMIC_DATA0
D8
GPP_D17/DMIC_CLK1
C8
GPP_D18/DMIC_DATA1
AW5
GPP_B14/SPKR
4
?
REV = 1
SKL_ULT
GPP_F10/I2C5_SDA/ISH_I2C2_SDA
GPP_F11/I2C5_SCL/ISH_I2C2_SCL
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
6 OF 20
?
SKL_ULT
7 OF 20
GPP_D15/ISH_UART0_RTS#
GPP_C12/UART1_RXD/ISH_UART1_RXD
GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
GPP_A12/BM_BUSY#/ISH_GP6
SDIO/SDXC
GPP_A17/SD_PWR_EN#/ISH_GP7
GPP_A16/SD_1P8_SEL
LPSS ISH
U21G
AUDIO
SKL_ULT
GPP_D9
GPP_D10
GPP_D11
GPP_D12
GPP_D5/ISH_I2C0_SDA
GPP_D6/ISH_I2C0_SCL
GPP_D7/ISH_I2C1_SDA
GPP_D8/ISH_I2C1_SCL
GPP_A18/ISH_GP0
GPP_A19/ISH_GP1
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPP_A23/ISH_GP5
GPP_G0/SD_CMD
GPP_G1/SD_DATA0
GPP_G2/SD_DATA1
GPP_G3/SD_DATA2
GPP_G4/SD_DATA3
GPP_G5/SD_CD#
GPP_G6/SD_CLK
GPP_G7/SD_WP
SD_RCOMP
GPP_F23
?
?
3
AB11
AB13
AB12
W12
W11
W10
W8
W7
BA9
BB9
AB7
AF13
P2
P3
P4
P1
M4
N3
N1
N2
AD11
AD12
U1
U2
U3
U4
AC1
AC2
AC3
AB4
AY8
BA8
BB7
BA7
AY7
AW7
AP13
SD_RCOMP
R509 DIS@0_4
TP_DETECT#
R528 *0/S_4
R531 *0/S_4
R530 *0/S_4
R529 *0/S_4
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
BOARD_ID6
BOARD_ID7
R173 200/F_4
DGPU_PWR_EN# [52]
PG_DGPU [35]
DGPU_HOLD_RST# [33]
DGPU_EVENT# [36]
TP_DETECT# [21]
BT_OFF [26]
CLR_BIOS_DATA# [31]
CLR_PASSWORD [31]
BOOT_BLK_REC# [31]
BOOT_BLK_WRITE# [31]
+3V_S5
Model
All EVT
All DVT
PVT1
PVT2+
MVB,A
1st Major ECN
2nd Major ECN
3rd Major ECN
2
dGPU CTRL
+3V_S5
BOARD_ID0
R216*10K_4
BOARD_ID1
R221*10K_4
BOARD_ID2
R21810K_4
BOARD_ID3
R524*10K_4
BOARD_ID4
R523*10K_4
BOARD_ID5
R225*10K_4 R232*10K_4
BOARD_ID6
R219*10K_4
BOARD_ID7
R220*10K_4
BOARD_ID7 BOARD_ID6
0 0
0
1
1 1
0 0
0
1
1 1
1
+3V_S5[5,11,12,13,16,17,18,21,24,26,29,31,32,39,40,41,42,46,47,48,52]
+3V[3,5,11,12,13,14,16,17,18,19,20,21,22,24,25,29,30,34,35,43,46,51,52]
TP_DETECT#
R534100K/F_4
SIO_EXT_SCI#
R53210K_4
UART0_TXD
R51849.9K_4
UART0_RXD
R51749.9K_4
R201*10K_4
R204*10K_4
R202*10K_4
R50810K_4
R507*10K_4
R20310K_4
R20010K_4
VRAM
UMA
1
Hynix
0
Micron
RSVD
BOARD_ID3 BOARD_ID2
0 0
0
1
1 1
14
1
0
1
0
HP Restricted Secret
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT: HP-Hawaii
PROJECT: HP-Hawaii
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet
PROJECT: HP-Hawaii
SKL CPU HDA/GPIO
SKL CPU HDA/GPIO
SKL CPU HDA/GPIO
1
15 58Thursday, March 10, 2016
1ACustom
1ACustom
1ACustom
of
15 58Thursday, March 10, 2016
15 58Thursday, March 10, 2016
5
WWW.AliSaler.Com
4
3
2
+3V_RTC_2[5,14]
1
+1V_S5[10,14,17,41,46,48]
+1.8V_S5[10,29,42,46,48]
+3V_S5[5,11,12,13,15,17,18,21,24,26,29,31,32,39,40,41,42,46,47,48,52]
+3V[3,5,11,12,13,14,17,18,19,20,21,22,24,25,29,30,34,35,43,46,51,52]
15
2.899A
2.57A
1.714A
0.09A
?
15 OF 20
VCCPGPPA
VCCPGPPB
VCCPGPPC
VCCPGPPD
VCCPGPPE
VCCPGPPF
VCCPGPPG
VCCPRIM_3P3_V19
VCCPRIM_1P0_T1
VCCATS_1P8
VCCRTCPRIM_3P3
VCCRTC_AK19
VCCRTC_BB14
DCPRTC
VCCCLK1
VCCCLK2
VCCCLK3
VCCCLK4
VCCCLK5
VCCCLK6
GPP_B0/CORE_VID0
GPP_B1/CORE_VID1
AK15
AG15
Y16
Y15
T16
AF16
AD15
V19
T1
AA1
AK17
AK19
BB14
BB10
A14
K19
L21
N20
L19
A10
AN11
AN13
?
+VCCPGPPA
+VCCPGPPB
+VCCPGPPC
+VCCPGPPD
+VCCPGPPE
+VCCPGPPF
+VCCPGPPG
+VCCPRIM_1.0V_T1
+VCCATS_1.8V
+VCCRTCPRIM_3.3V
+VCCRTC
DCPRTC
+VCCCLK1
+VCCCLK2
+VCCCLK3
+VCCCLK4
+VCCCLK5
+VCCCLK6
CORE_VID0
CORE_VID1
C345 1U/6.3V_4
R179 *0/S_6
R501 *0/S_6
R520 *0/S_6
R248 *0/S_6
R178 *0/S_4
C555 0.1U/16V_4
R482 *0/S_6
R166 *0/S_6
R158 *0/S_6
R175 *0/S_6
R171 *0/S_6
R486 *0/S_6
C550 1U/6.3V_4
+3V_S5
+1V_S5
+1.8V_S5
+3V_S5
+3V_RTC_2
+1V_S5
EC-PV-01
TP21
TP19
20mils
D D
C335 1U/6.3V_4
+1V_S5
+VCCDSW_1.0V
+1V_S5
+1V_S5
+1V_S5
C C
+V3.3DX_1.5DX_ADO
B B
+1V_S5
+1V_S5
+3V_S5
+3V_S5
+3V_ALW
+1V_S5
+3V_S5
+1V_S5
+1V_S5
R214 *0/S_4
RF
L17 120/2A_6
C316 1U/6.3V_4
C556 1U/6.3V_4
R174 *0/S_6
C318 1U/6.3V_4
C338 1U/6.3V_4
C348 47U/6.3V_8
R163 *0/S_6
C341 1U/6.3V_4
R155 *0/S_6
R148 *0/S_6
C337 1U/6.3V_4
C342 0.1U/10V_4
C324 0.1U/10V_4
R247 *0/S_6
R246 *0_6
R146 *0/S_6
C322 1U/6.3V_4
R169 *0/S_6
R150 *0/S_6
R154 *0/S_6
C333 1U/6.3V_4
+VCCPRIM
+VCCMPHYAON_1P0
EC-PV-01
+VCCAMPHYPLL_1P0
+VCCAPLL_1.0V
+VCCPRIM
+VCCSPI
+VCCSRAM_1.0V
+VCCPRIM_3.3V
+VCCPRIM_1.0V
+VCCAPLLEBB
U21O
AB19
VCCPRIM_1P0
AB20
VCCPRIM_1P0
P18
VCCPRIM_1P0
AF18
VCCPRIM_CORE
AF19
VCCPRIM_CORE
V20
VCCPRIM_CORE
V21
VCCPRIM_CORE
AL1
DCPDSW_1P0
K17
VCCMPHYAON_1P0
L1
VCCMPHYAON_1P0
N15
VCCMPHYGT_1P0_N15
N16
VCCMPHYGT_1P0_N16
N17
VCCMPHYGT_1P0_N17
P15
VCCMPHYGT_1P0_P15
P16
VCCMPHYGT_1P0_P16
K15
VCCAMPHYPLL_1P0
L15
VCCAMPHYPLL_1P0
V15
VCCAPLL_1P0
AB17
VCCPRIM_1P0_AB17
Y18
VCCPRIM_1P0_Y18
AD17
VCCDSW_3P3_AD17
AD18
VCCDSW_3P3_AD18
AJ17
VCCDSW_3P3_AJ17
AJ19
VCCHDA
AJ16
VCCSPI
AF20
VCCSRAM_1P0
AF21
VCCSRAM_1P0
T19
VCCSRAM_1P0
T20
VCCSRAM_1P0
AJ21
VCCPRIM_3P3_AJ21
AK20
VCCPRIM_1P0_AK20
N18
VCCAPLLEBB
SKL_ULT
REV = 1
SKL_ULT
CPU POWER 4 OF 4
0.03A
+V3.3DX_1.5DX_ADO
EC-PV-01
R176 *0/S_4
+1V_S5
A A
C548
*1U/6.3V_4
+3V
C551
*22U/6.3V_6
+VCCPGPPA
+VCCPGPPB
+VCCPGPPC
+VCCPGPPD
+VCCPGPPE
+VCCPGPPG
+VCCPGPPF
EC-PV-01
R198 *0/S_6
R226 *0/S_6
R249 *0/S_6
R250 *0/S_6
R194 *0/S_6
R215 *0/S_6
R519 *0/S_6
+3V_S5
+1.8V_S5
C557
1U/6.3V_4
+VCCPGPPB +VCCPGPPC +VCCPGPPE
C354
*1U/6.3V_4
C343
0.1U/16V_4
*1U/6.3V_4
C365
C344
1U/6.3V_4
+VCCRTCPRIM_3.3V+VCCATS_1.8V +VCCRTC
C363
1U/6.3V_4
C349
1U/6.3V_4
C364
0.1U/16V_4
HP Restricted Secret
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT: HP-Hawaii
PROJECT: HP-Hawaii
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet
PROJECT: HP-Hawaii
SKL CPU Power (PCH)
SKL CPU Power (PCH)
SKL CPU Power (PCH)
1
1ACustom
1ACustom
1ACustom
of
16 58Wednesday, March 09, 2016
16 58Wednesday, March 09, 2016
16 58Wednesday, March 09, 2016
5
4
3
2
+3V[3,5,11,12,13,14,16,18,19,20,21,22,24,25,29,30,34,35,43,46,51,52]
+1V_S5[10,14,16,41,46,48]
+VCCIO[3,5,7,46,48]
+3V_S5[5,11,12,13,15,16,18,21,24,26,29,31,32,39,40,41,42,46,47,48,52]
1
16
R70*0_4
R691K_4
R78 1K_4
R671K_4
R65 *0/S_4
R57 *0/S_4
R54 *0/S_4
CFG3
PWR_DEBUG
HOOK3
SMB_RUN_DAT_XDP
SMB_RUN_CLK_XDP XDP_TRST#
XDP_TCK1
XDP_TCK0
CFG0
CFG3
CFG0
CFG1
CFG2
CFG4
CFG5
CFG6
CFG7
D D
C C
CFG3[10]
XDP_PREQ#_CPU[13]
XDP_PRDY#_CPU[13]
CFG0[10]
CFG1[10]
CFG2[10]
TP44
XDP_BPM0[3]
XDP_BPM1[3]
CFG4[10]
CFG5[10]
CFG6[10]
CFG7[10]
RSMRST#[5,29]
DNBSWON#[5,29]
SMB_RUN_DAT[11,18,19]
SMB_RUN_CLK[11,18,19]
XDP_TCK0[3]
EC-PV-01
PCH_SPI_MOSI[11,31]
+3V
B B
A A
APS
CN2
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
*50501-0180N-001
EC-PV-01
R205 *0/S_4
+3V_S5
DNBSWON#
R199 *0_4_S
R61 *0_4
SUSB# [5,29]
SLP_S5# [5,29]
SUSC# [5,29]
SLP_A# [5]
RTC_RST# [14]
SYS_RESET# [5]
PM_SLP_S0# [5,29]
HOOK3
R59*1K_4
SYS_RESET#
C85
*0.1U/16V_4
CN1
1
XDP_PRESENT#
2
PROC_PREQ#
3
OBSFN_A1
4
GND2
5
OBSDATA_A0
6
OBSDATA_A1
7
GND4
8
OBSDATA_A2
9
OBSDATA_A3
10
GND6
11
OBSFN_B0
12
OBSFN_B1
13
GND8
14
OBSDATA_B0
15
OBSDATA_B1
16
GND10
17
OBSDATA_B2
18
OBSDATA_B3
19
GND12
20
HOOK0
21
HOOK1
22
VCC_OBS_AB
23
HOOK2
24
HOOK3
25
GND14
26
XDP_SDA
27
XDP_SCL
28
XDP_TCK1
29
XDP_TCK0
30
GND16
*Samtec BSH-030-01
R62 *1K_4
R463 *0_4_S
+3V
HWPG[5,29]
OBSDATA_C0
OBSDATA_C1
CPU XDP
XDP_TDO
XDP_TDI
XDP_TMS
XDP_TRST#
OBSDATA_C2
OBSDATA_C3
OBSDATA_D0
OBSDATA_D1
OBSDATA_D2
OBSDATA_D3
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
HOOK6/RESET#
HOOK7/DBR#
XDP_TRSTn
GND(XDP_PRESENT#)
+3V_S5
C515 0.1U/16V_4
GND1
OBSFN_C0
OBSFN_C1
GND3
GND5
GND7
OBSFN_D0
OBSFN_D1
GND9
GND11
GND13
GND15
XDP_TDO
XDP_TDI
XDP_TMS
U19
14
VCC
2
1A
1
1OE
5
2A
4
2OE
9
3A
10
3OE
12
4A
13
4OE
*SN74CBTLV3126RGYR
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
XDP_PRS
R52 *0/S_4
R53 *0_4
EC-PV-01
1B
2B
3B
4B
DPAD
GND
CFG17
CFG16
CFG8
CFG9
CFG10
CFG11
CFG19
CFG18
CFG12
CFG13
CFG14
CFG15
ITP_PMODE
SYS_RESET#
XDP_TDO
XDP_TDI
XDP_TMS
XDP_PRS
PCH_SPI_IO2 [11,31]
3
6
8
11
15
7
CFG17 [10]
CFG16 [10]
CFG8 [10]
CFG9 [10]
CFG10 [10]
CFG11 [10]
CFG19 [10]
CFG18 [10]
CFG12 [10]
CFG13 [10]
CFG14 [10]
CFG15 [10]
CK_XDP_P [14]
CK_XDP_N [14]
+1V_S5+1V_S5
ITP_PMODE [10]
TP2
XDP_TDO_CPU [3]
XDP_TDI_CPU [3]
XDP_TMS_CPU [3]
XDP_TRST#_CPU [3]
+VCCIO
R398
150/F_4
R64
*10K_4
JTAG_TMS_PCH[3]
JTAG_TDI_PCH[3]
JTAG_TDO_PCH[3]
JTAG_TCK_PCH[3]
+1V_S5
PWR_DEBUG
JTAGX_PCH[3]
C99
0.1U/16V_4
+VCCIO
R450 51_4
R449 *0_4
R446 *0_4
R445 *0_4
C97
0.1U/16V_4
XDP_TDO
XDP_TCK0
XDP_TMS
XDP_TDI
XDP_TDO
XDP_TDI
XDP_TCK0
XDP_TCK1
HP Restricted Secret
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT: HP-Hawaii
PROJECT: HP-Hawaii
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT: HP-Hawaii
SKL CPU XDP/APS
SKL CPU XDP/APS
SKL CPU XDP/APS
1ACustom
1ACustom
1ACustom
17 58Wednesday, March 09, 2016
17 58Wednesday, March 09, 2016
17 58Wednesday, March 09, 2016
1
5
WWW.AliSaler.Com
M_A_A[13:0][4]
D D
M_A_WE#[4]
M_A_CAS#[4]
M_A_RAS#[4]
TP17
TP16
M_A_ACT#[4]
M_A_PARITY[4]
M_A_ALERT#[4]
DDR3_DRAMRST#[4,19]
EC-SI-01
+3V
R159
R245
R243
*10K_4
C C
B B
CHA_SA0 CHA_SA1 CHA_SA2
R242
10K_4
*10K_4
R244
10K_4
*10K_4
R160
10K_4
SMB_RUN_CLK[11,17,19]
SMB_RUN_DAT[11,17,19]
DDR4 SODIMM ODT GENERATION
1.2V Level
E
C-PV-01
DDR_VTT_CTRL[4]
A A
R396 *0/S_4
NC1VCC
2
A
GND3Y
74AUP1G07GW
Close SODIMM within 200mil
+VDDQ
M_A_BA#0[4]
M_A_BA#1[4]
M_A_BG#0[4]
M_A_BG#1[4]
M_A_CS#0[4]
M_A_CS#1[4]
M_A_CKE0[4]
M_A_CKE1[4]
M_A_CLKP0[4]
M_A_CLKN0[4]
M_A_CLKP1[4]
M_A_CLKN1[4]
M_A_ODT0[4]
M_A_ODT1[4]
+VDDQ
+VDDQ
+VDDQ
U17
5
12
C499
*0.1U/10V/X7R_4
4
(to power on VTT)
4
C205 *0.1U/16V_4
R125 240_4
R104 240_4
R101 240_4
R114 240_4
R119 240_4
R98 240_4
R95 240_4
R112 240_4
R118 240_4
+3V_S5
R395
*10K/F_4
R394
*2M_4
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_EVENT#
M_A_EVENT#
CHA_SA0
CHA_SA1
CHA_SA2
M_A_CB0
M_A_CB1
M_A_CB2
M_A_CB3
M_A_CB4
M_A_CB5
M_A_CB6
M_A_CB7
DDR_VTT_EN [40]
3
R140
1K/F_4
VREF_CA_DIMM0
R144
1K/F_4
M_A_DQ[63:0] [4]
M_A_DQSP8
M_A_DQSN8
M_A_DQSP[7:0] [4]
M_A_DQSN[7:0] [4]
R109
240_4
R105
240_4
+VDDQ
+VDDQ
+VDDQ
C254 3.3P/50V/C0G_4
C347 1U/6.3V_4
C222 1U/6.3V_4
C357 1U/6.3V_4
C190 1U/6.3V_4
C105 10U/6.3V_4
C126 10U/6.3V_4
C329 10U/6.3V_4
C339 *10U/6.3V_4
C320 10U/6.3V_4
C159 *10U/6.3V_4
C302 10U/6.3V_4
C350 10U/6.3V_4
C275 1U/6.3V_4
C257 1U/6.3V_4
C298 1U/6.3V_4
C73 1U/6.3V_4
2250mA
+VDDQ
CON1A
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10/AP
120
A11
119
A12
158
A13
151
A14/WE#
156
A15/CAS#
152
A16/RAS#
162
S2#/C0
165
S3#/C1
114
ACT#
143
PARITY
116
ALERT#
134
EVENT#
108
RESET#
150
BA0
145
BA1
115
BG0
113
BG1
149
S0#
157
S1#
109
CKE0
110
137
139
138
140
155
161
253
254
256
260
166
101
105
100
104
178
199
220
241
DDR4 SODIMM 260 PIN
CKE1
CK0
CK0#
CK1
CK1#
ODT0
ODT1
SCL
SDA
SA0
SA1
SA2
92
CB0
91
CB1
CB2
CB3
88
CB4
87
CB5
CB6
CB7
12
DM0
33
DM1
54
DM2
75
DM3
DM4
DM5
DM6
DM7
96
DM8
8
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
(260P)
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8
M_A_DQ4
7
M_A_DQ0
20
M_A_DQ3
21
M_A_DQ2
4
M_A_DQ5
3
M_A_DQ1
16
M_A_DQ7
17
M_A_DQ6
28
M_A_DQ9
29
M_A_DQ12
41
M_A_DQ15
42
M_A_DQ10
24
M_A_DQ8
25
M_A_DQ13
38
M_A_DQ14
37
M_A_DQ11
50
M_A_DQ16
49
M_A_DQ17
62
M_A_DQ19
63
M_A_DQ22
46
M_A_DQ20
45
M_A_DQ21
58
M_A_DQ18
59
M_A_DQ23
70
M_A_DQ25
71
M_A_DQ29
83
M_A_DQ31
84
M_A_DQ26
66
M_A_DQ28
67
M_A_DQ24
79
M_A_DQ30
80
M_A_DQ27
174
M_A_DQ33
173
M_A_DQ37
187
M_A_DQ39
186
M_A_DQ35
170
M_A_DQ32
169
M_A_DQ36
183
M_A_DQ34
182
M_A_DQ38
195
M_A_DQ42
194
M_A_DQ43
207
M_A_DQ40
208
M_A_DQ41
191
M_A_DQ46
190
M_A_DQ47
203
M_A_DQ44
204
M_A_DQ45
216
M_A_DQ48
215
M_A_DQ52
228
M_A_DQ51
229
M_A_DQ55
211
M_A_DQ53
212
M_A_DQ49
224
M_A_DQ54
225
M_A_DQ50
237
M_A_DQ61
236
M_A_DQ60
249
M_A_DQ59
250
M_A_DQ58
232
M_A_DQ56
233
M_A_DQ57
245
M_A_DQ63
246
M_A_DQ62
13
M_A_DQSP0
34
M_A_DQSP1
55
M_A_DQSP2
76
M_A_DQSP3
179
M_A_DQSP4
200
M_A_DQSP5
221
M_A_DQSP6
242
M_A_DQSP7
97
M_A_DQSP8
11
M_A_DQSN0
32
M_A_DQSN1
53
M_A_DQSN2
74
M_A_DQSN3
177
M_A_DQSN4
198
M_A_DQSN5
219
M_A_DQSN6
240
M_A_DQSN7
95
M_A_DQSN8
VREF CA DIMM0 Solution
SM_VREF_CA[4]
-PV-01
EC
R135
*0/S_4
R137 2/F_4
C294
0.022U/16V/X7R_4
1 2
R133
24.9/F_4
+VDDQ
2
CON1B
111
VDD1
112
VDD2
117
VDD3
118
VDD4
123
VDD5
124
VDD6
129
VDD7
130
VDD8
135
VDD9
136
VDD10
141
VDD11
142
VDD12
147
VDD13
148
VDD14
153
VDD15
154
VDD16
159
VDD17
160
VDD18
163
VDD19
1
VSS1
5
VSS2
9
VSS3
15
VSS4
19
VSS5
23
VSS6
27
VSS7
31
VSS8
35
VSS9
39
VSS10
43
VSS11
47
VSS12
51
VSS13
57
VSS14
61
VSS15
65
VSS16
69
VSS17
73
VSS18
77
VSS19
81
VSS20
85
VSS21
89
VSS22
93
VSS23
99
VSS24
103
VSS25
107
VSS26
167
VSS27
171
VSS28
175
VSS29
181
VSS30
185
VSS31
189
VSS32
193
VSS33
197
VSS34
201
VSS35
205
VSS36
209
VSS37
213
VSS38
217
VSS39
223
VSS40
227
VSS41
231
VSS42
235
VSS43
239
VSS44
243
VSS45
247
VSS46
251
VSS47
VREF_CA_DIMM0
+0.6V_DDR_VTT[19,40,48]
255
VDDSPD
257
VPP1
259
VPP2
258
VTT
164
VREF_CA_DIMM0
VREF_CA
2
VSS48
6
VSS49
10
VSS50
14
VSS51
18
VSS52
22
VSS53
26
VSS54
30
VSS55
36
VSS56
40
VSS57
44
VSS58
48
VSS59
52
VSS60
56
VSS61
60
VSS62
64
VSS63
68
VSS64
72
VSS65
78
VSS66
82
VSS67
86
VSS68
90
(260P)
DDR4 SODIMM 260 PIN
VSS69
94
VSS70
98
VSS71
102
VSS72
106
VSS73
168
VSS74
172
VSS75
176
VSS76
180
VSS77
184
VSS78
188
VSS79
192
VSS80
196
VSS81
202
VSS82
206
VSS83
210
VSS84
214
VSS85
218
VSS86
222
VSS87
226
VSS88
230
VSS89
234
VSS90
238
VSS91
244
VSS92
248
VSS93
252
VSS94
261
GND
262
GND
+3V
+2.5V_S3
+0.6V_DDR_VTT
Place these Caps near So-Dimm0.
+0.6V_DDR_VTT
C375 3.3P/50V/C0G_4
C376 10U/6.3V_4
C378 10U/6.3V_4
C377 1U/6.3V_4 C393 1U/6.3V_4
C387 1U/6.3V_4
C388 1U/6.3V_4 C379 10U/6.3V_4
C389 1U/6.3V_4
C326 0.047U/10V_4
C325 0.1U/10V_4
C327 2.2U/6.3V_4
+2.5V_S3
+VDDQ[4,7,19,32,40]
+3V[3,5,11,12,13,14,16,17,19,20,21,22,24,25,29,30,34,35,43,46,51,52]
+3V_S5[5,11,12,13,15,16,17,21,24,26,29,31,32,39,40,41,42,46,47,48,52]
+2.5V_S3[19,40]
0.5A
C382 1U/6.3V_4C235 10U/6.3V_4
C370 10U/6.3V_4
+3V
C361 3.3P/50V/C0G_4
C368 0.1U/10V_4
C366 2.2U/6.3V_4
1
17
600mA
5
HP Restricted Secret
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT: HP-Hawaii
PROJECT: HP-Hawaii
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
4
3
2
Date: Sheet of
PROJECT: HP-Hawaii
DDR4 SODIMM H=8
DDR4 SODIMM H=8
DDR4 SODIMM H=8
1
1ACustom
1ACustom
18 58Tuesday, February 02, 2016
18 58Tuesday, February 02, 2016
18 58Tuesday, February 02, 2016
1ACustom
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