1
2
3
4
5
6
7
8
Stackup
GOLF AMD UMA/Muxless SYSTEM DIAGRAM
TOP
GND
A A
SODIMM1
Max. 4GB
PG.10
SODIMM2
DDR3
Channel A
PCI-E x 4 ( 0 ~ 3 )
AMD
Max. 4GB
PG.11
B B
WLAN
BT COMBO
PG.24
EE
LAN2
ONTARIO
19mm X 19mm
FT1 413 pin BGA
TDP 18W
ND2
UMI X4
DP Port 1
DP Port 0
PG.2~4
ATI
SEYMOUR XT
PP;PP
7'3:
PG.13~18
LVDS
PG.20
DDR3 900MHz
VRAM
128x16x4,64bit
HDMI
LVDS
PG.19
PG.19
PG.18
+3V/+5V
+1.1V/+1.1VS5
+1.2V
+VCC_CORE
IN1
IN2
VCC
BOT
PG.37
PG.37
PG.32
TOP
PG.34
+VDDNB_CPU
Card reader
RTS5229-GRT
PG.22
10/100
LAN0
C C
PORT10,11
USB3.0
Ports X 2
PG.23
KBC
KB TP ROM FAN
D D
1
LAN
RTL8105E
PG.21
10/100
LAN1
Accelerometer
ITE8518
PG.24
SMBUS
PG.26
2
PORT2
USB 2.0
3&,([
USB 3.0
LPC
AMD FCH
Hudson M3L
24.5mm X 24.5mm
656pin FCBGA
TDP 4.7W
PG.5~9
Azalia
AUDIO
CODEC
IDT92HD99
INT
3
PG.20
USB 2.0
SATA0
Speaker
HP/MIC
Analog MIC
4
USB2.0
Ports X 1
PORT0
HDD
PG.20
PG.19
PG.20
Webcam
TOP
PG.25
5
PG.19 PG.23
PORT8
+1.5VSUS
+VGACore
+1.5V_VGA
+3V_VGA
+1.0V_VGA
+1.8V_VGA
Charger
Discharger
PROJECT : GOLF
PROJECT : GOLF
PROJECT : GOLF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Block Diagram
Block Diagram
1%
1%
1%
6
7
Block Diagram
Date: Sheet
Friday, Augu st 10, 2012 1 37
Date: Sheet
Friday, Augu st 10, 2012 1 37
Date: Sheet
Friday, Augu st 10, 2012 1 37
PG.34
PG.36
PG.38,39
PG.30
PG.37
1A
1A
1A
of
of
of
8
1
2
3
4
5
6
7
8
+1.5VSUS 4,10,11,33,34,36
+3VS5 5,7,8,9,22,24,26,28,34,35,36
M_A_A[15:0] 10,11
A A
M_A_BS#[2..0] 10,11
M_A_DM[7..0 ] 10,11
B B
+1.5VSUS
R153
1K_4
M_A_EVENT# 10,11,24
C C
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQSP0 10,11
M_A_DQSN0 10,11
M_A_DQSP1 10,11
M_A_DQSN1 10,11
M_A_DQSP2 10,11
M_A_DQSN2 10,11
M_A_DQSP3 10,11
M_A_DQSN3 10,11
M_A_DQSP4 10,11
M_A_DQSN4 10,11
M_A_DQSP5 10,11
M_A_DQSN5 10,11
M_A_DQSP6 10,11
M_A_DQSN6 10,11
M_A_DQSP7 10,11
M_A_DQSN7 10,11
M_A_CLKP0 11
M_A_CLKN0 11
M_A_CLKP1 11
M_A_CLKN1 11
M_A_CLKP2 10
M_A_CLKN2 10
M_A_CLKP3 10
M_A_CLKN3 10
M_A_RST# 10,11
M_A_CKE0 10,11
M_A_CKE1 10,11
M_A_ODT0 11
M_A_ODT1 11
M_A_ODT2 10
M_A_ODT3 10
M_A_CS#0 11
M_A_CS#1 11
M_A_CS#2 10
M_A_CS#3 10
M_A_RAS# 10,11
M_A_CAS# 10,11
M_A_WE# 10,11
W17
AB20
AA16
W22
AC20
AC21
AB16
AC16
W19
W15
W16
R17
M_ADD0
H19
M_ADD1
J17
M_ADD2
H18
M_ADD3
H17
M_ADD4
G17
M_ADD5
H15
M_ADD6
G18
M_ADD7
F19
M_ADD8
E19
M_ADD9
T19
M_ADD10
F17
M_ADD11
E18
M_ADD12
M_ADD13
E16
M_ADD14
G15
M_ADD15
R18
M_BANK0
T18
M_BANK1
F16
M_BANK2
D15
M_DM0
B19
M_DM1
D21
M_DM2
H22
M_DM3
P23
M_DM4
V23
M_DM5
M_DM6
M_DM7
A16
M_DQS_H0
B16
M_DQS_L0
B20
M_DQS_H1
A20
M_DQS_L1
E23
M_DQS_H2
E22
M_DQS_L2
J22
M_DQS_H3
J23
M_DQS_L3
R22
M_DQS_H4
P22
M_DQS_L4
M_DQS_H5
V22
M_DQS_L5
M_DQS_H6
M_DQS_L6
M_DQS_H7
M_DQS_L7
M17
M_CLK_H0
M16
M_CLK_L0
M19
M_CLK_H1
M18
M_CLK_L1
N18
M_CLK_H2
N19
M_CLK_L2
L18
M_CLK_H3
L17
M_CLK_L3
L23
M_RESET_L
N17
M_EVENT_L
F15
M_CKE0
E15
M_CKE1
M0_ODT0
V15
M0_ODT1
U19
M1_ODT0
M1_ODT1
T17
M0_CS_L0
M0_CS_L1
U17
M1_CS_L0
V16
M1_CS_L1
U18
M_RAS_L
V19
M_CAS_L
V17
M_WE_L
ONTARIO (2.0)
PART 1 OF 5
U24E
MEMORY I/F
S
?
M_DATA0
M_DATA1
M_DATA2
M_DATA3
M_DATA4
M_DATA5
M_DATA6
M_DATA7
M_DATA8
M_DATA9
M_DATA10
M_DATA11
M_DATA12
M_DATA13
M_DATA14
M_DATA15
M_DATA16
M_DATA17
M_DATA18
M_DATA19
M_DATA20
M_DATA21
M_DATA22
M_DATA23
M_DATA24
M_DATA25
M_DATA26
M_DATA27
M_DATA28
M_DATA29
M_DATA30
M_DATA31
M_DATA32
M_DATA33
M_DATA34
M_DATA35
M_DATA36
M_DATA37
M_DATA38
M_DATA39
M_DATA40
M_DATA41
M_DATA42
M_DATA43
M_DATA44
M_DATA45
M_DATA46
M_DATA47
M_DATA48
M_DATA49
M_DATA50
M_DATA51
M_DATA52
M_DATA53
M_DATA54
M_DATA55
M_DATA56
M_DATA57
M_DATA58
M_DATA59
M_DATA60
M_DATA61
M_DATA62
M_DATA63
M_VREF
M_ZVDDIO_MEM_S
B14
A15
A17
D18
A14
C14
C16
D16
C18
A19
B21
D20
A18
B18
A21
C20
C23
D23
F23
F22
C22
D22
F20
F21
H21
H23
K22
K21
G23
H20
K20
K23
N23
P21
T20
T23
M20
P20
R23
T22
V20
V21
Y23
Y22
T21
U23
W23
Y21
Y20
AB22
AC19
AA18
AA23
AA20
AB19
Y18
AC17
Y16
AB14
AC14
AC18
AB18
AB15
AC15
M23
M22
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
+M_ZVDDIO
R154 39.2/J_4
M_A_DQ[0..63] 10,11
+1.5VSUS
+1.0V
C326
0.1U/10V/X7R_4
PEG_RXP0 13
PEG_RXN0 13
PEG_RXP1 13
PEG_RXN1 13
PEG_RXP2 13
PEG_RXN2 13
PEG_RXP3 13
PEG_RXN3 13
C325
1000P/50V_4
PEG_RXP0
PEG_RXN0
PEG_RXP1
PEG_RXN1
PEG_RXP2
PEG_RXN2
PEG_RXP3
PEG_RXN3
R342 2K R341 1.27K
UMI_RXP0 6
UMI_RXN0 6
UMI_RXP1 6
UMI_RXN1 6
UMI_RXP2 6
UMI_RXN2 6
UMI_RXP3 6
UMI_RXN3 6
AA6
P_GPP_RXP0
Y6
P_GPP_RXN0
AB4
P_GPP_RXP1
AC4
P_GPP_RXN1
AA1
P_GPP_RXP2
AA2
P_GPP_RXN2
Y4
P_GPP_RXP3
Y3
P_GPP_RXN3
Y14
P_ZVDDP P_ZVSS
AA12
AA10
AB10
AC10
P_ZVDD_10
P_UMI_RXP0
Y12
P_UMI_RXN0
P_UMI_RXP1
Y10
P_UMI_RXN1
P_UMI_RXP2
P_UMI_RXN2
AC7
P_UMI_RXP3
AB7
P_UMI_RXN3
ONTARIO (2.0)
PART 2 OF 5
?
U24A
AB6
P_GPP_TXP0
P_GPP_TXN0
P_GPP_TXP1
P_GPP_TXN1
P_GPP_TXP2
P_GPP_TXN2
P_GPP_TXP3
P_GPP_TXN3
PCIE I/F
P_UMI_TXP0
P_UMI_TXN0
P_UMI_TXP1
P_UMI_TXN1
P_UMI_TXP2
UMI I/F
P_UMI_TXN2
P_UMI_TXP3
P_UMI_TXN3
PEG_TXP0_C PEG_TXP0
AC6
PEG_TXN0_C PEG_TXN0
AB3
PEG_TXP1_C PEG_TP1
AC3
PEG_TXN1_C PEG_TXN1
Y1
PEG_TXP2_C PEG_TXP2
Y2
PEG_TXN2_C PEG_TXN2
V3
PEG_TXP3_C PEG_TXP3
V4
PEG_TXN3_C PEG_TXN3
AA14
P_ZVSS
AB12
UMI_TXP0_C
UMI_TXN0_C
UMI_TXP1_C
UMI_TXN1_C
UMI_TXP2_C
UMI_TXN2_C
UMI_TXP3_C
UMI_TXN3_C
C671 0.1U/10V/X7R_4
C667 0.1U/10V/X7R_4
C660 0.1U/10V/X7R_4
C655 0.1U/10V/X7R_4
AC12
AC11
AB11
AA8
Y8
AB8
AC8
+1.5VSUS
R156
1K/F_4
+M_VREF
R155
1K/F_4
UMA
ᶵᶵᶵᶵᶲᶲᶲᶲẞẞẞẞ
C648 *0.1U/10V/X7R_4
C653 *0.1U/10V/X7R_4
C642 *0.1U/10V/X7R_4
C646 *0.1U/10V/X7R_4
C636 *0.1U/10V/X7R_4
C637 *0.1U/10V/X7R_4
C635 *0.1U/10V/X7R_4
C634 *0.1U/10V/X7R_4
C673 0.1U/10V/X7R_4
C670 0.1U/10V/X7R_4
C666 0.1U/10V/X7R_4
C659 0.1U/10V/X7R_4
02
PEG_TXP0 13
PEG_TXN0 13
PEG_TXP1 13
PEG_TXN1 13
PEG_TXP2 13
PEG_TXN2 13
PEG_TXP3 13
PEG_TXN3 13
UMI_TXP0 6
UMI_TXN0 6
UMI_TXP1 6
UMI_TXN1 6
UMI_TXP2 6
UMI_TXN2 6
UMI_TXP3 6
UMI_TXN3 6
D D
PROJECT : GOLF
PROJECT : GOLF
PROJECT : GOLF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
ONTARIO MEM & PCIE I/F(1/3)
ONTARIO MEM & PCIE I/F(1/3)
1%
1%
1
2
3
4
5
6
1%
7
ONTARIO MEM & PCIE I/F(1/3)
Friday, Augu st 10, 2012 2 37
Date: Sheet
Friday, Augu st 10, 2012 2 37
Date: Sheet
Friday, Augu st 10, 2012 2 37
Date: Sheet
8
1A
1A
1A
of
of
of
1
+1.8V 4,32,36
+3V 4,5,7,8,9,10,11,13,16,19,20, 21,22,23,24,25,26,31,34,35,36
+5V 16,19,20,22,23,24,25,34
+3V
R252 1K_4
R301 1K_4
R300 1K_4
+1.8V
Can remove on MV
CPU_LDT_RST_HTPA#
A A
APU_THERMTRIP#
APU_PROCHOT#
APU_ALERT
R281 300R
APU_RST# APU_LDT_RST_HTPA#
APU_PWRGD APU_PWRGD_BUF
FCH_THERMTRIP# 5
APU_RST#
APU_PROCHOT#
+3V
U18
*TC7SH08FU
4
U19
1
1A
2
GND
3
2A
*SN74LVC2G07DCKR
Thermal
Q17
MMBT3904-7-F
THERMTRIP# shutdown t emperature 125⹎ ⹎⹎⹎C
3 5
1Y
VCC
2Y
+3V
2
1
6
5
4
R255
10K/F_4
2
1 3
C618
*0.1U/10V/X7R_4
APU_RST#
+3V
C609
*0.1U/10V/X7R_4
APU_THERMTRIP#
APU_PROCHOT# 6,26
C_TX2_HDMI+ 19
C_TX2_HDMI- 19
C_TX1_HDMI+ 19
C_TX1_HDMI- 19
C_TX0_HDMI+ 19
C_TX0_HDMI- 19
C_TXC_HDMI+ 19
C_TXC_HDMI- 19
APU_RST# 6
APU_PWRGD 6
MBCLK2 23,24
MBDATA2 23,24
*150P/50V_4
TXLOUT2+ 19
TXLOUT2- 19
TXLOUT1+ 19
TXLOUT1- 19
TXLOUT0+ 19
TXLOUT0- 19
TXLCLKOUT+ 19
TXLCLKOUT- 19
CLK_APU_P 6
CLK_APU_N 6
CLK_DP_P 6
CLK_DP_N 6
C628
C644 0.1U/10V/X7R_4
C647 0.1U/10V/X7R_4
C649 0.1U/10V/X7R_4
C654 0.1U/10V/X7R_4
C658 0.1U/10V/X7R_4
C662 0.1U/10V/X7R_4
C665 0.1U/10V/X7R_4
C669 0.1U/10V/X7R_4
APU_RST#
APU_PWRGD
*150P/50V_4
C633
PEG_HDM I_TXDP2
PEG_HDMI_TXDN2
PEG_HDM I_TXDP1
PEG_HDMI_TXDN1
PEG_HDM I_TXDP0
PEG_HDMI_TXDN0
PEG_HDM I_TXCP
PEG_HDM I_TXCN
TXLOUT2+
TXLOUT2-
TXLOUT1+
TXLOUT1-
TXLOUT0+
TXLOUT0-
R271 *0_4/S
R273 *0_4/S
APU_PROCHOT#
APU_THERMTRIP#
APU_ALERT
TXLCLKOUT+
TXLCLKOUT-
SVC
SVD
APU_SIC
APU_SID
APU_TDI
APU_TDO
APU_TCK
APU_TMS
APU_TRST#
APU_DBRDY
APU_DBREQ#
VSS_SENSE
VDDCR_CPU_SENSE
VDDIO_SUS_SENSE
VSS_SENSE
VDDCR_NB_SENSE
A8
B8
B9
A9
D10
C10
A10
B10
B5
A5
D6
C6
A6
B6
D8
C8
V2
V1
D2
D1
J1
J2
P3
P4
T3
T4
U1
U2
T2
N2
N1
P1
P2
M4
M3
M1
F4
G1
F3
F1
B4
W11
V5
TDP1_TXP0
TDP1_TXN0
TDP1_TXP1
TDP1_TXN1
TDP1_TXP2
TDP1_TXN2
TDP1_TXP3
TDP1_TXN3
LTDP0_TXP0
LTDP0_TXN0
LTDP0_TXP1
LTDP0_TXN1
LTDP0_TXP2
LTDP0_TXN2
LTDP0_TXP3
LTDP0_TXN3
CLKIN_H
CLKIN_L
DISP_CLKIN_H
DISP_CLKIN_L
SVC
SVD
SIC
SID
RESET_L
PWROK
PROCHOT_L
THERMTRIP_L
ALERT_ L
TDI
TDO
TCK
TMS
TRST_L
DBRDY
DBREQ_L
VDDCR_NB_SENSE
VDDCR_CPU_SENSE
VDDIO_MEM_S_SENSE
VSS_SENSE
RSVD_1
RSVD_2
RSVD_3
DIFFERENTIAL ROUTING
ANALOG/DIS PLAY/ MISC
DISPLAYPORT 0 DISPLAYPORT 1
CLK
SER
JTAG CTRL
ONTARIO (2.0)
PART 3 OF 5
R291 *0_4/ S
R292 *0_4/ S
R138 *0_4/ S
R290 *0_4/ S
R289 *0_4/ S
U24B
DP MISC
VGA DAC
TEST
afety
ND2
ONTARIO
CPU_VDD0_RUN_F B_L
CPU_VDD0_RUN_F B_H
VDDIO_FB_H
CPU_VDDNB_RUN_FB_L
CPU_VDDNB_RUN_FB_H
DP_ZVSS
DP_BLON
DP_DIGON
DP_VARY_BL
TDP1_AUXP
TDP1_AUXN
TDP1_HPD
LTDP0_AUXP
LTDP0_AUXN
LTDP0_HPD
DAC_RED
DAC_REDB
DAC_GREEN
DAC_GREENB
DAC_BLUE
DAC_BLUEB
DAC_HSYNC
DAC_VSYNC
DAC_SCL
DAC_SDA
DAC_ZVSS
TEST25_H
TEST25_L
TEST28_H
TEST28_L
TEST33_H
TEST33_L
TEST34_H
TEST34_L
DMAACTIVE _L
TEST4
TEST5
TEST6
TEST14
TEST15
TEST16
TEST17
TEST18
TEST19
TEST31
TEST35
TEST36
TEST37
TEST38
H3
G2
H2
H1
B2
C2
C1
A3
EDIDCLK
B3
EDIDDATA
D3
FCH_LVDS_HPD
C12
D13
A12
B12
A13
B13
E1
CRT_HSYNC
E2
CRT_VSYNC
F2
DDCCLK
D4
DDCDAT
D12
DAC_RSET_NB
R1
CPU_THERMDA_R
R2
CPU_THERMDC_R
R6
CPUTEST6
T5
CPUTEST14
E4
CPUTEST15
K4
CPUTEST16
L1
CPUTEST17
L2
CPUTEST18
M2
CPUTEST19
K1
CPUTEST25_H
K2
CPUTEST25_L
L5
CPUTEST28_H
M5
CPUTEST28_L
M21
CPUTEST31
J18
CPUTEST33_H
J19
CPUTEST33_L
U15
CPUTEST34_H
T15
CPUTEST34_L
H4
CPUTEST35
N5
CPUTEST36
R5
CPUTEST37
K3
CPUTEST38
T1
CPU_VDD0_RUN_FB_L 31
CPU_VDD0_RUN_FB_H 31
VDDIO_FB_H 33
CPU_VDDNB_RUN_FB_L 31
CPU_VDDNB_RUN_FB_H 31
R139 150/F_4
LVDS_BLON
DISP_ON
DPST_PWM
LVDS_BLON 19
DISP_ON 19
DPST_PWM 19
INT_HDMI_AUXP 19
INT_HDMI_AUXN 19
HDMI_HPD_Q 19
EDIDCLK 19
EDIDDATA 19
TP40
TP81
TP77
C322 0.1U/10V/X7R_4
C321 0.1U/10V/X7R_4
R293 *1K_4
R276
1K_4
ŖŏŏłŎņŅŠĸŠńłőŠŊĴĴĸŠŃ
TP45
TP69
TP70
TP71
TP74
TP39
TP38
TP80
TP75
TP73
TP76
TP48
TP50
TP46
TP78
TP72
TP79
R299
1K_4
CRT_R
CRT_G
CRT_B
R302 1K_4
R275 1K_4
R288 510
R287 510
R159 51R
R158 51R
+1.8V
TP85
TP86
TP87
CPUTEST15
+1.8V
CPUTEST36
CPUTEST37
TEST 35 for Enable / disable HDMI
CPUTEST14
CPUTEST16
DMAACTIVE_L 6
CPUTEST17
03
R283 1K_4
R298 1K_4
R272 *1K_4
R284 *1K_4
R125 *1K_4
R280 *1K_4
R274 *1K_4
+1.8V
R52 DB ADD
HDT(Hardware Debug Tool ) Connector
+1.8V
R296 1K_4
R285 1K_4
R270 1K_4
R297 1K_4
R269 1K_4
R260 *1K_4
R264 *1K_4
APU_DBREQ#
APU_TCK
APU_TMS
APU_TDI
APU_TRST#
APU_LDT_RST_HTPA#
APU_PWRGD_BUF
MV:non-stuff
Serial VID
R277 1K_4
R278 1K_4
R253
1K_4
CPU_PWRGD_SVID_REG 31
CPU_SVC
CPU_SVD SVD
APU_PWRGD
SVC
R268
300_4
1
Q20
AO3416
R295 *0_4/S
R294 *0_4/S
+1.8V +3V
2
3
+1.8V
CPUTEST18
CPUTEST19
APU_LDT_RST_HTPA#
CPU_LDT_RST_HTPA#
APU_DBREQ#
APU_DBRDY
APU_TCK
APU_TMS
APU_TDI
APU_TRST#
APU_TDO
APU_PWRGD_BUF
+1.8V
CPU_SVC 31
CPU_SVD 31
VFIX MODE
VID Override table (VDD)
SVD SVC
0
0
0
1100 . 9 V
1 1
CN7
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
*HDT CONN
88511-2001-20p-l
Output Voltage
1.1V
1.0V
0.8V
Thermal HW protect
Q18
*2N7002E-G
0502 modify
3920_RST#
:KHQ.17&& .
7KHUPDO7ULS &
3920_RST#
2
Q19
D13
MMBT3904-7-F
2
1 3
FCH_THERMTRIP#
3
2
1
ADD VGA TEM P_ FAIL function i s active Hi
R337 *0_4
1
BAS316/DG
2 1
R266 10K/ F_4
R513 *0_4
R265 *10K/F_4
D12 *CH501H-40PT
2 1
+3VPCU
5
+
4
-
U28
*G1331
2
*MMBT3904-7-F
Q30
1 3
ECPWROK
1
THL15+
3
THL15-
*0.1U/10V_4
3920_RST# 26
OVER_THEM# 24
ECPWROK 9,16,26
+3V
OVER_THEM#
MV:New add
TEMP_FAIL 14
HWPG 26,28,29,30,32,33
C762
*0.1U/10V_4
C761
New add 0430
R316
*200K_4
*200K_4
R303 *100K_6 NTC
R136 *100K_6 NTC
R320
*10K/F_4
+3VPCU
R315
1 2
+3VPCU
1 2
PROJECT : GOLF
PROJECT : GOLF
PROJECT : GOLF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
ONTATIO DISPLAY/CLK/MI(2/3)
ONTATIO DISPLAY/CLK/MI(2/3)
1%
1%
1%
ONTATIO DISPLAY/CLK/MI(2/3)
Friday, August 10, 2012 3 37
Date: Sheet
Friday, August 10, 2012 3 37
Date: Sheet
Friday, August 10, 2012 3 37
Date: Sheet
1A
1A
1A
of
of
of
1
04
of
of
of
1A
1A
1A
ONTARIO (2.0)
PART 5 OF 5
U24D
ONTARIO
ONTARIO (2.0)
ONTARIO
GROUND
U24C
PART 4 OF 5
POWER
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSSBG_DAC
VDD_18_1
VDD_18_2
VDD_18_3
VDD_18_4
VDD_18_5
VDD_18_6
VDD_18_7
VDD_18_DAC
VDDPL_10
VDD_10_1
VDD_10_2
VDD_10_3
VDD_10_4
VDD_33
N13
N20
N22
P10
P14
R4
R7
R20
T6
T9
T11
T13
U4
U5
U7
U12
U20
U22
V8
V9
V11
V13
W1
W2
W4
W5
W7
W12
W20
Y5
Y7
Y9
Y11
Y13
Y15
Y17
Y19
AA4
AA22
AB2
AB5
AB9
AB13
AB17
AB21
AC5
AC9
AC13
A11
U8
W8
U6
U9
W6
T7
V7
W9
U11
U13
W13
V12
T12
C314
10U/6.3V_6
A4
C258
1U/6.3V/X5R_4
1U/6.3V/X5R_ 4
C263
*10U/6.3V_6
C294
10U/6.3V_6
500mA
GND
C237
1U/6.3V/X5R_ 4
C297
C290
0.1U/10V/X7R_4
C311
10U/6.3V_6
+3V
0.1U/10V/X7R_4
200mA
5.5A
+VCORE
+VDDNB_CPU
+1.5VSUS
A A
E5
VDDCR_CPU_1
E6
VDDCR_CPU_2
F5
11A
10A
2A
GND GND
VDDCR_CPU_3
F7
VDDCR_CPU_4
G6
VDDCR_CPU_5
G8
VDDCR_CPU_6
H5
VDDCR_CPU_7
H7
VDDCR_CPU_8
J6
VDDCR_CPU_9
J8
VDDCR_CPU_10
L7
VDDCR_CPU_11
M6
VDDCR_CPU_12
M8
VDDCR_CPU_13
N7
VDDCR_CPU_14
R8
VDDCR_CPU_15
E8
VDDCR_NB_1
E11
VDDCR_NB_2
E13
VDDCR_NB_3
F9
VDDCR_NB_4
F12
VDDCR_NB_5
G11
VDDCR_NB_6
G13
VDDCR_NB_7
H9
VDDCR_NB_8
H12
VDDCR_NB_9
K11
VDDCR_NB_10
K13
VDDCR_NB_11
L10
VDDCR_NB_12
L12
VDDCR_NB_13
L14
VDDCR_NB_14
M11
VDDCR_NB_15
M12
VDDCR_NB_16
M13
VDDCR_NB_17
N10
VDDCR_NB_18
N12
VDDCR_NB_19
N14
VDDCR_NB_20
P11
VDDCR_NB_21
P13
VDDCR_NB_22
G16
VDDIO_MEM_S_1
G19
VDDIO_MEM_S_2
E17
VDDIO_MEM_S_3
J16
VDDIO_MEM_S_4
L16
VDDIO_MEM_S_5
L19
VDDIO_MEM_S_6
N16
VDDIO_MEM_S_7
R16
VDDIO_MEM_S_8
R19
VDDIO_MEM_S_9
W18
VDDIO_MEM_S_10
U16
VDDIO_MEM_S_11
A7
VSS_1
B7
VSS_2
B11
VSS_3
B17
VSS_4
B22
VSS_5
C4
VSS_6
D5
VSS_7
D7
VSS_8
D9
VSS_9
D11
VSS_10
D14
VSS_11
B15
VSS_12
D17
VSS_13
D19
VSS_14
E7
VSS_15
E9
VSS_16
E12
VSS_17
E20
VSS_18
F8
VSS_19
F11
VSS_20
F13
VSS_21
G4
VSS_22
G5
VSS_23
G7
VSS_24
G9
VSS_25
G12
VSS_26
G20
VSS_27
G22
VSS_28
H6
VSS_29
H11
VSS_30
H13
VSS_31
J4
VSS_32
J5
VSS_33
J7
VSS_34
J20
VSS_35
K10
VSS_36
K14
VSS_37
L4
VSS_38
L6
VSS_39
L8
VSS_40
L11
VSS_41
L13
VSS_42
L20
VSS_43
L22
VSS_44
M7
VSS_45
N4
VSS_46
N6
VSS_47
N8
VSS_48
N11
VSS_49
C264
10U/6.3V_6
150mA
C269
1U/6.3V/X5R_ 4
+VDDPL_10
R142 *0_6/S
C291
1U/6.3V/X5R_ 4
0.1U/10V/X7R_4
C288
1U/6.3V/X5R_ 4
1U/6.3V/X5R_ 4
180P/25V_4
2A
1U/6.3V/X5R_ 4
C259
C262
1U/6.3V/X5R_ 4
C247
+VDDAN_18_DAC
R134 *0_4/S
+1.8V
MV:short pad
+1.0V
+1.0V
0.1U/10V/X7R_4
C309
1U/6.3V/X5R_ 4
1U/6.3V/X5R_ 4
C329
1U/6.3V/X5R_ 4
0.1U/10V/X7R_4
C307
0.1U/10V/X7R_4
C300
180P/25V_4
C266
180P/25V_4
C289
+1.5VSUS
1U/6.3V/X5R_ 4
C330
C304
+1.5VSUS
C301
C323
0.1U/10V/X7R_4
place capacitors under BGA
+VCORE
C242
C281
180P/25V_4
180P/25V_4
C254
180P/25V_4
C285
C319
EMC CAPS
C328
+1.8V +VDDAN_18_DAC +1.0V +VDDPL_10 +3V
+1.8V
10U/6.3V/X5R_8
C629
10U/6.3V/X5R _8
+1.5VSUS
C324
10U/6.3V_6
+VDDNB_CPU
C310
180P/25V_4
C631
C284
10U/6.3V/X5R_8
0.1U/10V/X7R_4
C271
180P/25V_4
1
10U/6.3V/X5R _8
C327
10U/6.3V_6
C278
180P/25V_4
C623
10U/6.3V/X5R_8
0.1U/10V/X7R_4
C267
0.1U/10V/X7R_4
C626
C286
0.1U/10V/X7R_4
C320
C190
10U/6.3V_6
C230
C616
10U/6.3V/X5R _8
0.1U/10V/X7R_4
C273
0.1U/10V/X7R_4
+1.5VSUS +1.5VSUS
C236
0.1U/10V/X7R_4
+VCORE
1U/6.3V/X5R_ 4
C632
10U/6.3V/X5R_8
C188
10U/6.3V_6
C191
10U/6.3V_6
C245
1U/6.3V/X5R_4
C250
C255
1U/6.3V/X5R_ 4
+VCORE
0.1U/10V/X7R_4
C192
0.1U/10V/X7R_4
C249
C248
0.1U/10V/X7R_4
+VDDNB_CPU +VDDNB_CPU
1U/6.3V/X5R_ 4
10U/6.3V/X5R_8
C607
C605
10U/6.3V/X5R _8
C282
1U/6.3V/X5R_ 4
C283
C268
1U/6.3V/X5R_ 4
+VDDNB_CPU
C287
C274
0.1U/10V/X7R_4
0.1U/10V/X7R_4
C303
+VCORE
1U/6.3V/X5R_4
C256
1U/6.3V/X5R_ 4
C272
C279
1U/6.3V/X5R_ 4
+VCORE 31
+VDDNB_CPU 31
+1.5VSUS 2,10,11,33,34,36
+3V 3,5,7,8,9,10,11,13,16,19,20,21,22,23,24,25,26,31,34,35,36
+1.0V 2,30,34
+1.8V 3,32,36
PROJECT : GOLF
PROJECT : GOLF
PROJECT : GOLF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
ONTARIO POWER & DECOUP(1/3)
ONTARIO POWER & DECOUP(1/3)
1%
1%
1%
ONTARIO POWER & DECOUP(1/3)
Date: Sheet
Friday, Augu st 10, 2012 4 37
Date: Sheet
Friday, Augu st 10, 2012 4 37
Date: Sheet
Friday, Augu st 10, 2012 4 37
5
+3VS5
NC,no install by default
R118 *2.2K_4
R120 *2.2K_4
R122 *2.2K_4
D D
+3V
R146 2.2K_4
R148 2.2K_4 R322 *0_4/S
R326 *1K_4
+3VS5
FCH_TEST0
FCH_TEST1
FCH_TEST2
CGCLK_SMB
to DDR3 SMBUS
CGDAT_SMB
SYS_RST#
SYS_RST# internal
10K pull up
GEVENT0# internal pull Hi 8.2K to +3V
GEVENT1# internal pull Hi 8.2K to +3V
GEVENT23# internal pul l Hi 8.2K to +3V
GEVENT5# internal pull Hi 8.2K to +3VS5
PCIE_WAKE# no need to pull
Hi resistor from check list
CLK_REQ2# internal pu ll Hi 8.2K to +3V
+3VS5
R106 10K/F_4
R107 10K/F_4
R104 2.2K_4
R103 2.2K_4
C C
R323 2.2K_4
R312 2.2K_4
R111 *4.7K_4
C204 *0.01U/25V_4
R110 10K/F_4
SDA3
SCL2
SDA2
SCL1
SDA1
FCH_THERMTRIP#
DNBSWON#
CLK_REQ3# internal pu ll Hi 8.2K to +3V
CLK_REQ4# internal pu ll Hi 8.2K to +3V
This pin is used to
power down VGA DAC
regulators when CRT
no connected
GEVENT16# internal pul l Hi 8.2K to +3VS5
GEVENT15# internal pul l Hi 8.2K to +3VS5
DGPU_PWROK 6,16,26,35,36
To Azalia
R345 33_4
R354 33_4
R336 33_4
R349 33_4
D15 *RB501V-40
ACZ_SDOUT_AUDIO 20
ACZ_SYNC_AUDIO 20
BIT_CLK_AUDIO 20
ACZ_RST#_AUDIO 20
ACZ_SDIN0 20
CLK_REQ# already
internal pull up 8.2K
2 1
CLKREQ1#
R357
*10K/F_4
2
Q24
*MMBT3904-7-F
1 3
B B
ACZ_SDOUT_R
ACZ_SYNC_R
ACZ_BCLK_R
ACZ_RST#_R
ACZ_SDIN0
Pure UMA can remove
VGA_REQ 36
A A
4
remove PCIE_RST2# from AMD recommend
SUSB# 26
SUSC# 26
DNBSWON# 26
FCH_PWRGD 9
EC_A20GATE 26
EC_RCIN# 26
SIO_EXT_SMI# 26
SIO_EXT_SCI# 26
PCIE_WAKE# 21,24
FCH_THERMTRIP# 3
+3V
RSMRST# 26
PCIE_CARD_CLKREQ# 22
PCIE_LAN_CLKREQ# 21
ACZ_SPKR 20
CGCLK_SMB 10,11
CGDAT_SMB 10,11
SCL1 25
SDA1 25
PCIE_MINI_C LKREQ# 24
Remove Card EECS function form Vendor mail
RF_OFF1# 24
New add 0605 for HP
SI
PM_THERM# 24
4/19 For Comal.
For Zero ODD
HD audio
interface is
+3V_S5 voltage
BT_COMBO_OFF# 24
TP41
TP83
TP36
TP35
C625 *100P/50V_4
R140 10K/F_4
R340 *0_4/S
RF_OFF1#
PM_THERM#
TP29
TP82
TP34
TP37
R335 *10K/F_4
R332 *10K/F_4
R330 *10K/F_4
R333 *10K/F_4
R329 *10K/F_4
TP33
TP28
VGA_RSTB 13
VGA_ON_SB 26
PCIE_RST2#
RI#
SUSB#
SUSC#
DNBSWON#
FCH_PWRGD
FCH_TEST0
FCH_TEST1
FCH_TEST2
EC_A20GATE
EC_RCIN#
FCH_PME#
SIO_EXT_SMI#
GEVENT5#
SYS_RST#
PCIE_WAKE#
FCH_THERMTRIP#
WD_PWRGD
RSMRST#
PCIE_CARD_CLKREQ#
PCIE_LAN_CLKREQ#
FCH_GPIO66 SCL3
CGCLK_SMB
CGDAT_SMB
SCL1
SDA1
PCIE_MINI_C LKREQ#
CLKREQ1#
R117 *0_4
FCH_JTAG_TCK
FCH_JTAG_TDI
FCH_JTAG_RST#
ACZ_BCLK_R
ACZ_SDOUT_R
ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2_R
ACZ_SDIN3_R
ACZ_SYNC_R
ACZ_RST#_R
BT_COMBO_OFF#
VGA_RSTB
VGA_ON_SB
3
U21A
AB6
PCIE_RST2#/GEVENT4#
R2
RI#/GEVENT22#
W7
SPI_CS3#/GBE_STAT1/GEVENT21#
T3
SLP_S3#
W2
SLP_S5#
J4
PWR_BTN#
N7
PWR_GOOD
T9
TEST0
T10
TEST1/TMS
V9
TEST2
AE22
GA20IN/GEVENT0#
AG19
KBRST#/GEVENT1#
R9
PME#/GEVENT3#
C26
LPC_SMI#/GEVENT23#
T5
LPC_PD#/GEVENT5#
U4
SYS_RESET#/GEVENT19#
K1
WAKE#/GEVENT8#
V7
IR_RX1/GEVENT20#
R10
THRMTRIP#/SMBALERT#/GEVENT2#
AF19
WD_PWRGD
U2
RSMRST#
AG24
CLK_REQ4#/SATA_IS0#/GPIO64
AE24
CLK_REQ3#/SATA_IS1#/GPIO63
AE26
SMARTVOLT1/SATA_IS2#/GPIO50
AF22
CLK_REQ0#/SATA_IS3#/GPIO60
AH17
SATA_IS4#/FANOUT3/GPIO55
AG18
SATA_IS5#/FANIN3/GPIO59
AF24
SPKR/GPIO66
AD26
SCL0/GPIO43
AD25
SDA0/GPIO47
T7
SCL1/GPIO227
R7
SDA1/GPIO228
AG25
CLK_REQ2#/FANIN4/GPIO62
AG22
CLK_REQ1#/FANOUT4/GPIO61
J2
IR_LED#/LLB#/GPIO184
AG26
SMARTVOLT2/SHUTDOWN#/GPIO51
V8
DDR3_RST#/GEVENT7#/VGA_PD
W8
GBE_LED0/GPIO183
Y6
SPI_HOLD#/GBE_LED1/GEVENT9#
V10
GBE_LED2/GEVENT10#
AA8
GBE_STAT0/GEVENT11#
AF25
CLK_REQG#/GPIO65/OSCIN/IDLEEXIT#
M7
BLINK/USB_OC7#/GEVENT18#
R8
USB_OC6#/IR_TX1/GEVENT6#
T1
USB_OC5#/IR_TX0/GEVENT17#
P6
USB_OC4#/IR_RX0/GEVENT16#
F5
USB_OC3#/AC_PRES/TDO/GEVENT15#
P5
USB_OC2#/TCK/GEVENT14#
J7
USB_OC1#/TDI/GEVENT13#
T8
USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12#
AB3
AZ_BITCLK
AB1
AZ_SDOUT
AA2
AZ_SDIN0/GPIO167
Y5
AZ_SDIN1/GPIO168
Y3
AZ_SDIN2/GPIO169
Y1
AZ_SDIN3/GPIO170
AD6
AZ_SYNC
AE4
AZ_RST#
K19
PS2_DAT/SDA4/GPIO187
J19
PS2_CLK/CEC/SCL4/GPIO188
J21
SPI_CS2#/GBE_STAT2/GPIO166
D21
PS2KB_DAT/GPIO189
C20
PS2KB_CLK/GPIO190
D23
PS2M_DAT/GPIO191
C22
PS2M_CLK/GPIO192
F21
KSO_0/GPIO209
E20
KSO_1/GPIO210
F20
KSO_2/GPIO211
A22
KSO_3/GPIO212
E18
KSO_4/GPIO213
A20
KSO_5/GPIO214
J18
KSO_6/GPIO215
H18
KSO_7/GPIO216
G18
KSO_8/GPIO217
B21
KSO_9/GPIO218
K18
KSO_10/GPIO219
D19
KSO_11/GPIO220
A18
KSO_12/GPIO221
C18
KSO_13/GPIO222
B19
KSO_14/XDB0/GPIO223
B17
KSO_15/XDB1/GPIO224
A24
KSO_16/XDB2/GPIO225
D17
KSO_17/XDB3/GPIO226
Hudson-M 2-A13
HUDSON-M3
Part 4 of 5
USBCLK/14M_25M_48M_OSC
USB
MISC
USB
1.1
ACPI / WAKE UP
EVENTS
USB
GPIO
USB
OC
HD
AUDIO
EC_PWM2/E C_TIMER2/WOL_EN/GPIO199
EMBEDDED
CTRL
USB
EC_PWM0/E C_TIMER0/GPIO197
EC_PWM1/E C_TIMER1/GPIO198
EC_PWM3/E C_TIMER3/GPIO200
ND2
USB_RCOMP
USB_FSD1P/GPIO186
USB_FSD1N
USB_FSD0P/GPIO185
USB_FSD0N
USB_HSD13P
USB_HSD13N
USB_HSD12P
USB_HSD12N
USB_HSD11P
USB_HSD11N
USB_HSD10P
USB_HSD10N
USB_HSD9P
USB_HSD9N
USB_HSD8P
USB_HSD8N
USB_HSD7P
USB_HSD7N
USB_HSD6P
USB_HSD6N
2.0
USB_HSD5P
USB_HSD5N
USB_HSD4P
USB_HSD4N
USB_HSD3P
USB_HSD3N
USB_HSD2P
USB_HSD2N
USB_HSD1P
USB_HSD1N
USB_HSD0P
USB_HSD0N
USBSS_CALRP
USBSS_CALRN
USB_SS_TX3P
USB_SS_TX3N
USB_SS_RX3P
USB_SS_RX3N
USB_SS_TX2P
USB_SS_TX2N
USB_SS_RX2P
USB_SS_RX2N
USB_SS_TX1P
3.0
USB_SS_TX1N
USB_SS_RX1P
USB_SS_RX1N
USB_SS_TX0P
USB_SS_TX0N
USB_SS_RX0P
USB_SS_RX0N
SCL2/GPIO193
SDA2/GPIO194
SCL3_LV/GPIO195
SDA3_LV/GPIO196
KSI_0/GPIO201
KSI_1/GPIO202
KSI_2/GPIO203
KSI_3/GPIO204
KSI_4/GPIO205
KSI_5/GPIO206
KSI_6/GPIO207
KSI_7/GPIO208
2
G8
B9
USB_RCOMP_SB
H1
H3
H6
H5
H10
G10
K10
J12
G12
F12
K12
K13
B11
D11
E10
F10
C10
A10
H9
G9
A8
C8
F8
E8
C6
A6
C5
A5
C1
C3
E1
E3
C16
USBSS_CALRP
A16
USBSS_CALRN
A14
C14
USB 3.0 Not Implem ented: left unconnected.
C12
A12
D15
B15
E14
F14
F15
G15
H13
G13
J16
H16
J15
K15
H19
SCL2
G19
SDA2
G22
SCL3
G21
SDA3
E22
H22
J22
EC_PWM2
H21
No need for GPIO200
K21
K22
F22
F24
E24
B23
C24
F18
R261 11.8K/F_6
USBP11+ 23
USBP11- 23
USBP10+ 23
USBP10- 23
USBP8+ 19
USBP8- 19
USBP2+ 24
USBP2- 24
USBP0+ 20
USBP0- 20
R259 1K_4
R258 1K_4
USB30_TX1+ 23
USB30_TX1- 23
USB30_RX1+ 23
USB30_RX1- 23
USB30_TX0+ 23
USB30_TX0- 23
USB30_RX0+ 23
USB30_RX0- 23
EC_PWM2 9
1
05
Left side USB Combo 3.0/2.0.
Left side USB Combo 3.0/2.0.
Camera USB
WLAN Min-Card
USB2.0 Right
+1.1VS5
SCL3 of a TSI-capable APU's
thermal bus,Pulled up to
APU_VDDIO. Resistor value
verified in the relevant APU
design guide.
PROJECT : GOLF
PROJECT : GOLF
PROJECT : GOLF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Hudson-M3L GPIO/USB/AZ/RGMII
Hudson-M3L GPIO/USB/AZ/RGMII
1%
1%
5
4
3
2
1%
Hudson-M3L GPIO/USB/AZ/RGMII
Friday, August 10, 2012 5 37
Friday, August 10, 2012 5 37
Friday, August 10, 2012 5 37
Date: Sheet
Date: Sheet
Date: Sheet
1
1A
1A
1A
of
of
of
5
CARD_PCIE_RST# 22
MINI_PCIE_RST# 24
LAN_PCIE_RST# 21
GPU_RST# 13
Place these PICE AC
D D
coupling cap close to FCH
PCIE_TXP0_CARD 22
PCIE_TXN0_CARD 22
PCIE_TXP1_LAN 21
PCIE_TXN1_LAN 21
PCIE_TXP2_WLAN 24
PCIE_TXN2_WLAN 24
PCIE_RXP0_CARD 22
PCIE_RXN0_CARD 22
PCIE_RXP1_LAN 21
C C
One Channel
can remove
Pure UMA
can remove
B B
PCIE_RXN1_LAN 21
PCIE_RXP2_WLAN 24
PCIE_RXN2_WLAN 24
C686 150P/50V_4
C687 150P/50V_4
C688 150P/50V_4
C689 *150P/50V_4
CLK_DP_P 3
CLK_DP_N 3
CLK_APU_P 3
CLK_APU_N 3
CLK_VGA_P 13
CLK_VGA_N 13
CLK_WLAN_P 24
CLK_WLAN_N 24
CLK_PCIE_CARD_P 22
CLK_PCIE_CARD_N 22
UMI_RXP0 2
UMI_RXN0 2
UMI_RXP1 2
UMI_RXN1 2
UMI_RXP2 2
UMI_RXN2 2
UMI_RXP3 2
UMI_RXN3 2
UMI_TXP0 2
UMI_TXN0 2
UMI_TXP1 2
UMI_TXN1 2
UMI_TXP2 2
UMI_TXN2 2
UMI_TXP3 2
UMI_TXN3 2
+1.1V_PCIE_VDDR
PCIE_RXP0_CARD
PCIE_RXN0_CARD
PCIE_RXP1_LAN
PCIE_RXN1_LAN
PCIE_RXP2_WLAN
PCIE_RXN2_WLAN
+1.1V_CKVDD
R350 33_4
R351 33_4
R352 33_4
R353 *33_4
C663 0.1U/10V/X7R_4
C668 0.1U/10V/X7R_4
C657 0.1U/10V/X7R_4
C650 0.1U/10V/X7R_4
C270 0.1U/10V/X7R_4
C280 0.1U/10V/X7R_4
C641 0.1U/10V/X7R_4
C645 0.1U/10V/X7R_4
R131 590/F_4
R133 2K/F_4
C231 0.1U/10V/X7R_4
C639 0.1U/10V/X7R_4
C240 0.1U/10V/X7R_4
R113 2K/F_4
Note: CLK_FCH_SRCP/N is 100MHZ SSC
Note: CLK_PCIE_TRAVISP/N is 100MHZ non-SSC
Note: CLK_DP_NSSCP/N is 100MHZ non-SSC
Note: CLK_APU_HCLKP/N is 100MHZ SSC
Note: CLK_PCIE_VGAP/N is 100MHZ SSC
Note: GPP_CLK(0:8)P/N is 100MHZ SSC capable
CLK_PCIE_LANP 21
CLK_PCIE_LANN 21
C603
C621
*27P/50V_4
*27P/50V_4
R256 0_4
Y5
*25MHZ
R257
*1M/F_4
TP67
TP68
PCH_XTAL25_IN 24
A A
5
PCIE_RST#
A_RST#
UMI_RXP0_C
UMI_RXN0_C
UMI_RXP1_C
UMI_RXN1_C
UMI_RXP2_C
UMI_RXN2_C
UMI_RXP3_C
UMI_RXN3_C
PCIE_CALRP_FCH
PCIE_CALRN_FCH
PCIE_TXP0_CARD_C
C227 0.1U/10V/X7R_4
PCIE_TXN0_CARD_C
C640 0.1U/10V/X7R_4
C241 0.1U/10V/X7R_4
CLK_CALRN_FCH
4
PCIE_TXP1_C
PCIE_TXN1_C
PCIE_TXP2_C
PCIE_TXN2_C
25M_X1
25M_X2
4
U21E
AE2
PCIE_RST#
AD5
A_RST#
AE30
UMI_TX0P
AE32
UMI_TX0N
AD33
UMI_TX1P
AD31
UMI_TX1N
AD28
UMI_TX2P
AD29
UMI_TX2N
AC30
UMI_TX3P
AC32
UMI_TX3N
AB33
UMI_RX0P
AB31
UMI_RX0N
AB28
UMI_RX1P
AB29
UMI_RX1N
Y33
UMI_RX2P
Y31
UMI_RX2N
Y28
UMI_RX3P
Y29
UMI_RX3N
AF29
PCIE_CALRP
AF31
PCIE_CALRN
V33
GPP_TX0P
V31
GPP_TX0N
W30
GPP_TX1P
W32
GPP_TX1N
AB26
GPP_TX2P
AB27
GPP_TX2N
AA24
GPP_TX3P
AA23
GPP_TX3N
AA27
GPP_RX0P
AA26
GPP_RX0N
W27
GPP_RX1P
V27
GPP_RX1N
V26
GPP_RX2P
W26
GPP_RX2N
W24
GPP_RX3P
W23
GPP_RX3N
F27
CLK_CALRN
G30
PCIE_RCLKP
G28
PCIE_RCLKN
R26
DISP_CLKP
T26
DISP_CLKN
H33
DISP2_CLKP
H31
DISP2_CLKN
T24
APU_CLKP
T23
APU_CLKN
J30
SLT_GFX_CLKP
K29
SLT_GFX_CLKN
H27
GPP_CLK0P
H28
GPP_CLK0N
J27
GPP_CLK1P
K26
GPP_CLK1N
F33
GPP_CLK2P
F31
GPP_CLK2N
E33
GPP_CLK3P
E31
GPP_CLK3N
M23
GPP_CLK4P
M24
GPP_CLK4N
M27
GPP_CLK5P
M26
GPP_CLK5N
N25
GPP_CLK6P
N26
GPP_CLK6N
R23
GPP_CLK7P
R24
GPP_CLK7N
N27
GPP_CLK8P
R27
GPP_CLK8N
J26
14M_25M_48M_OSC
C31
25M_X1
C33
25M_X2
Hudson-M 2-A13
HUDSON-M3
Part 1 of 5
PCI
CLKS
PCI EXPRESS
INTERFACES
LDRQ1#/CLK_REQ6#/GPIO49
CLOCK
GENERATOR
S5
3
PCICLK0
PCICLK1/GPO36
PCICLK2/GPO37
PCICLK3/GPO38
PCICLK4/14M_OSC/GPO39
PCI
REQ2#/CLK_REQ8#/GPIO41
REQ3#/CLK_REQ5#/GPIO42
GNT3#/CLK_REQ7#/GPIO46
APU
PLUS
PCIRST#
AD0/GPIO0
AD1/GPIO1
AD2/GPIO2
AD3/GPIO3
AD4/GPIO4
AD5/GPIO5
AD6/GPIO6
AD7/GPIO7
AD8/GPIO8
AD9/GPIO9
AD10/GPIO10
AD11/GPIO11
AD12/GPIO12
AD13/GPIO13
AD14/GPIO14
AD15/GPIO15
AD16/GPIO16
AD17/GPIO17
AD18/GPIO18
AD19/GPIO19
AD20/GPIO20
AD21/GPIO21
AD22/GPIO22
AD23/GPIO23
AD24/GPIO24
AD25/GPIO25
AD26/GPIO26
AD27/GPIO27
AD28/GPIO28
AD29/GPIO29
AD30/GPIO30
AD31/GPIO31
INTERFACE
GNT2#/SD_LED/GPO45
LPC
CBE0#
CBE1#
CBE2#
CBE3#
FRAME#
DEVSEL#
TRDY#
STOP#
PERR#
SERR#
REQ0#
REQ1#/GPIO40
GNT0#
GNT1#/GPO44
CLKRUN#
LOCK#
INTE#/GPIO 32
INTF#/GPIO33
INTG#/GP IO34
INTH#/GP IO35
LPCCLK0
LPCCLK1
LFRAME#
LDRQ0#
SERIRQ/GPIO48
DMA_ACTIVE#
PROCHOT#
APU_PG
LDT_STP#
APU_RST#
32K_X1
32K_X2
S5_CORE_EN
RTCCLK
INTRUDER_ALERT#
VDDBT_RTC_G
3
IRDY#
LAD0
LAD1
LAD2
LAD3
PAR
AF3
AF1
AF5
AG2
AF6
AB5
AJ3
AL5
AG4
AL6
AH3
AJ5
AL1
AN5
AN6
AJ1
AL8
AL3
AM7
AJ6
AK7
AN8
AG9
AM11
AJ10
AL12
AK11
AN12
AG12
AE12
AC12
AE13
AF13
AH13
AH14
AD15
AC15
AE16
AN3
AJ8
AN10
AD12
AG10
AK9
AL10
AF10
AE10
AH1
AM9
AH8
AG15
AG13
AF15
AM17
AD16
AD13
AD21
AK17
AD19
AH9
AF18
AE18
AC16
AD18
B25
D25
D27
C28
A26
A29
A31
B27
AE27
AE19
G25
E28
E26
G26
F26
G2
G4
H7
F1
F3
E6
PCI_CLK1
PCI_CLK3
PCI_CLK4
PCIRST#_L
HUDSON_MEMHOT#_R
C683 100P/50V_4
FCH_GPIO44
CLKRUN#
ACCEL_INT
LPC_CLK0
LPC_CLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ#0
LDRQ#1
SERIRQ
DMAACTIVE_L
APU_PROCHOT#
APU_PWRGD_R
APU_STOP#
APU_RST#
32K_X1
32K_X2
S5_CORE_EN
CLK_RTC
INTRUDER_ALERT#
VDDBT_RTC_G
20MIL
R95 *33_4
R355 33_4
TP43
TP89
TP91
TP42
TP88
LPC_CLK0 9
LPC_CLK1 9
R100 22_4
R96 33_4
LAD0 24,26
LAD1 24,26
LAD2 24,26
LAD3 24,26
LFRAME# 24,26
TP27
TP44
SERIRQ 26
DMAACTIVE_L 3
R94 *0_4/S
TP30
APU_RST# 3
TP32
TP31
C197
0.1U/10V/X7R_4
2
CLK_33M_DEBUG 24
PCI_CLK1 9
PCI_CLK3 9
PCI_CLK4 9
DGPU_PWROK 5,16,26,35,36
C685 *150P/50V_4
KBC_RST# 26
+3V_RTC
20MIL
C694
PCI_SERR# 26
CLKRUN# 26
ACCEL_INT 23
FCH PROCHOT#--- (input 0.8V threshold )
When it isasserted, it can generate SCI or
SMI to OS/BIOS
PV change to short-pad
LDT_STP# let i s NC from schematic recommend
CLK_RTC 9
R108 510/F_4
INTRUDER_ALERT# Left n ot connected
(FCH has 50-kohm internal pull-up to
VBAT).
1U/6.3V_4
C183 *15P/50V_4
C174 *15P/50V_4
APU_PROCHOT# 3,26
APU_PWRGD 3
S5_CORE_EN is necessary to connect enable
pin of +3VPCU/+5VPCU regulator for S5+
mode implementation
+3V_RTC
2
R367 *499/F_4
1
+3VRTC_1 +3VRTC
R369 *10_4
CLK_33M_KBC 26
CLKGEN_RTC_X1 24
CLK_33M_DEBUG 24
32K_X1
R251
*20M_4
32K_X2
USE GROUND GUARD FOR 32K_X1 AND 32K_X2
PROJECT : GOLF
PROJECT : GOLF
PROJECT : GOLF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
1%
1%
1%
Date: Sheet
Friday, August 10, 2012 6 37
Friday, August 10, 2012 6 37
Friday, August 10, 2012 6 37
Date: Sheet
Date: Sheet
20MIL 20MIL
R91 0_4
C617 *15P/50V_4
2 3
Y4
*32.768KHZ
4 1
C589 *15P/50V_4
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Hudson-M3L ACPI/PCI/CLOCK
Hudson-M3L ACPI/PCI/CLOCK
Hudson-M3L ACPI/PCI/CLOCK
1
*RB500V-40
D16
*RB500V-40
20MIL
20MIL
88266-020L
D17
CN19
R366
*470_4
1
2
06
2 1
+3VPCU
2 1
+VCCRTC_2
+BAT
of
of
of
+BAT
1A
1A
1A
5
U21D
HUDSON-M3
A3
VSS_1
A33
VSS_2
B7
VSS_3
B13
VSS_4
D9
VSS_5
D13
VSS_6
E5
VSS_7
E12
VSS_8
E16
VSS_9
E29
VSS_10
F7
D D
C C
B B
F9
F11
F13
F16
F17
F19
F23
F25
F29
G6
G16
G32
H12
H15
H29
J6
J9
J10
J13
J28
J32
K7
K16
K27
K28
L6
L12
L13
L15
L16
L21
M13
M16
M21
M25
N6
N11
N13
N23
N24
P12
P18
P20
P21
P31
P33
R4
R11
R25
R28
T11
T16
T18
N8
K25
H25
Hudson-M 2-A13
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSSAN_HWM
VSSXL
VSSPL_SYS
Part 5 of 5
GROUND
VSSANQ_DAC
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSSPL_DAC
VSSAN_DAC
VSSIO_DAC
EFUSE
T25
T27
U6
U14
U17
U20
U21
U30
U32
V11
V16
V18
W4
W6
W25
W28
Y14
Y16
Y18
AA6
AA12
AA13
AA14
AA16
AA17
AA25
AA28
AA30
AA32
AB25
AC6
AC18
AC28
AD27
AE6
AE15
AE21
AE28
AF8
AF12
AF16
AF33
AG30
AG32
AH5
AH11
AH18
AH19
AH21
AH23
AH25
AH27
AJ18
AJ28
AJ29
AK21
AK25
AL18
AM21
AM25
AN1
AN18
AN28
AN33
T21
L28
K33
N28
R6
GPIO52 internal pull Hi 8.2K to +3V
GPIO53 internal pull Hi 8.2K to +3V
GPIO54 internal pull Hi 8.2K to +3V
GPIO56 internal pull Hi 8.2K to +3V
GPIO57 internal pull Hi 8.2K to +3V
GPIO58 internal pull Hi 8.2K to +3V
4
PLACE SATA AC COUPLING
CAPS CLOSE TO HUDSON-M2/ M3
SATA_TXP0 25
SATA HDD
mSATA
+1.1V_AVDD_SATA
SATA_LED# 25
SATA_TXN0 25
SATA_RXN0 25
SATA_RXP0 25
SATA_TXP1 25
SATA_TXN1 25
SATA_RXN1 25
SATA_RXP1 25
PLACE SATA_CAL RES VERY
CLOSE TO BALL OF
HUDSON-M2 /M3
R135 1K_4
R145 931/F_4
R149 *220/F_6
+3V
R147 *0_4/S
MV:short pad
Add GPIO for G-sensor LED control
RF_OFF# 24
TP90
TP49
ACC_LED# 25
LCD_BK 19
R112
10K/F_4
SATA_TXP0
SATA_TXN0
SATA_TXP1
SATA_TXN1
SATA_CALRP
SATA_CALRN
SB_SATA_LED#
Integrated Clock Mod e:
Leave unconnected.
RF_OFF#
BT_COMBO_EN#
LCD_BK
TEMPIN0
TEMPIN1
TEMPIN2
TEMPIN3
R114
10K/F_4
R262
10K/F_4
R119
10K/F_4
3
U21B
AK19
AM19
AL20
AN20
AN22
AL22
AH20
AJ20
AJ22
AH22
AM23
AK23
AH24
AJ24
AN24
AL24
AL26
AN26
AJ26
AH26
AN29
AL28
AK27
AM27
AL29
AN31
AL31
AL33
AH33
AH31
AJ33
AJ31
AF28
AF27
AD22
AF21
AG21
AH16
AM15
AJ16
AK15
AN16
AL16
K6
K5
K3
M6
Hudson-M 2-A13
TEMP( 0 - 3 )
Temp Monitor Not Implemented
10-Kȍ 5% pull-up to +3VS5
or 10-Kȍ 5% pull-down
HUDSON-M3
SATA_TX0P
SATA_TX0N
SATA_RX0N
SATA_RX0P
SATA_TX1P
SATA_TX1N
SATA_RX1N
SATA_RX1P
SATA_TX2P
SATA_TX2N
SATA_RX2N
SATA_RX2P
SATA_TX3P
SATA_TX3N
SATA_RX3N
SATA_RX3P
SATA_TX4P
SATA_TX4N
SATA_RX4N
SATA_RX4P
SATA_TX5P
SATA_TX5N
SATA_RX5N
SATA_RX5P
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
SATA_CALRP
SATA_CALRN
SATA_ACT#/GPIO67
SATA_X1
SATA_X2
FANOUT0/GPIO52
FANOUT1/GPIO53
FANOUT2/GPIO54
FANIN0/GPIO56
FANIN1/GPIO57
FANIN2/GPIO58
TEMPIN0/ GPIO171
TEMPIN1/ GPIO172
TEMPIN2/ GPIO173
TEMPIN3/TALERT#/GPIO174
SERIAL
ATA
HW
MONITOR
Part 2 of 5
SD_CLK/SCLK_2/GPIO73
SD_CMD/SLOAD_2/GPIO74
SD_DATA0/SDATI_2/GPIO77
SD_DATA1/SDATO_2/GPIO78
SD
CARD
GBE
LAN
ROM_RST#/SPI_WP#/GPIO161
SPI
ROM
VGA
DAC
VGA
MAINLINK
VIN6/GBE_STAT3/GPIO181
VIN7/GBE_LED3/GPIO182
+3VS5
SD_CD#/GPIO75
SD_WP/GPIO76
SD_DATA2/GPIO79
SD_DATA3/GPIO80
GBE_COL
GBE_CRS
GBE_MDCK
GBE_MDIO
GBE_RXCLK
GBE_RXD3
GBE_RXD2
GBE_RXD1
GBE_RXD0
GBE_RXCTL/RXDV
GBE_RXERR
GBE_TXCLK
GBE_TXD3
GBE_TXD2
GBE_TXD1
GBE_TXD0
GBE_TXCTL/TXEN
GBE_PHY_PD
GBE_PHY_RST#
GBE_PHY_INTR
SPI_DI/GPIO164
SPI_DO/GPIO163
SPI_CLK/GPIO162
SPI_CS1#/GPIO165
VGA_RED
VGA_GREEN
VGA_BLUE
VGA_HSYNC/GPO68
VGA_VSYNC/GPO69
VGA_DDC_SDA/GPO70
VGA_DDC_SCL/GPO71
VGA_DAC_RSET
AUX_VGA_CH_P
AUX_VGA_CH_N
AUXCAL
ML_VGA_L0P
ML_VGA_L0N
ML_VGA_L1P
ML_VGA_L1N
ML_VGA_L2P
ML_VGA_L2N
ML_VGA_L3P
ML_VGA_L3N
ML_VGA_HPD/GPIO229
VIN0/GPIO175
VIN1/GPIO176
VIN2/SDATI_1/GPIO177
VIN3/SDATO_1/GPIO178
VIN4/SLOAD_1/GPIO179
VIN5/SCLK_1/GPIO180
NC1
NC2
NC3
NC4
NC5
R311 10K/F_4
R314 *10K/F_4
2
AL14
AN14
AJ12
AH12
AK13
AM13
AH15
AJ14
AC4
AD3
AD9
W10
AB8
AH7
AF7
AE7
AD7
AG8
AD1
AB7
AF9
AG6
AE8
AD8
AB9
AC2
AA7
W9
GBE_PHY_INTR
V6
EC_SPI_SI
V5
EC_SPI_SO
V3
EC_BIOS_SPI_CLK_I
T6
EC_BIOS_CS#
V1
FCH_SPI_WP
L30
FCH M3L DEL
L32
M29
M28
N30
M33
N32
K31
V28
V29
U28
T31
T33
T29
T28
R32
R30
P29
P28
C29
N2
SIDE_PORT_ID0
M3
SIDE_PORT_ID1
L2
SIDE_PORT_ID2
N4
BOARD_ID0
P1
BOARD_ID1
P3
BOARD_ID2
M1
BOARD_ID3
M5
BOARD_ID4
AG16
AH10
VIN ( 0 - 7 )
A28
Voltage Monito r Not Implemented
G27
10-Kȍ 5% pull-up to +3VS5
L4
or 10-Kȍ 5% pull-down
BOARD_ID0
BOARD_ID1
R126 10K/F_4
EC_SPI_SI 26
EC_SPI_SO 26
EC_BIOS_SPI_CLK_I 26
EC_BIOS_CS# 26
TP84
R310 *10K/F_4
R313 10K/F_4
+3VS5
ID0 ID1
0
0
1
0
10
11
1
FCH SPI ROM
Vender
AMIC
WINBOND
Socket
CONFIG Item
reserve
UMA(reserve)
reserve
reserve
Size P/N
2M
2M
07
AKE38ZN0801
AKE38FP0N01
DFHS08FS023
1
2
3
4
BOARD_ID2
BOARD_ID3
BOARD_ID4
2
R317 10K/F_4
R304 10K/F_4
R306 10K/F_4
R308 10K/F_4
R286 10K/F_4
R279 10K/F_4
PROJECT : GOLF
PROJECT : GOLF
PROJECT : GOLF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Hudson-M3L SATA/HWM/SPI
Hudson-M3L SATA/HWM/SPI
1%
1%
1%
Hudson-M3L SATA/HWM/SPI
Date: Sheet
Friday, August 10, 2012 7 37
Friday, August 10, 2012 7 37
Friday, August 10, 2012 7 37
Date: Sheet
Date: Sheet
1
1A
1A
1A
of
of
of
R318 *10K/F_4
A A
5
4
3
R305 *10K/F_4
R307 *10K/F_4
R309 *10K/F_4
R282 *10K/F_4
R267 *10K/F_4
SIDE_PORT_ID0
SIDE_PORT_ID1
SIDE_PORT_ID2
5
+3V
D D
L27
+3V
PBY160808T-221Y-N(220,2A)
L28
+3V
PBY160808T-221Y-N(220,2A)
C C
R137 *0_8/S
MV:short pad
TRACE WIDTH >=15mil
C296
2.2U/6.3V_4
C298
2.2U/6.3V_4
C295
*0.1U/10V/X7R_4
TRACE WIDTH >=15mil
C299
*0.1U/10V/X7R_4
+3V_AVDD_USB +FCH_VDDPL_33_SUSB_S
L51
PBY160808T-221Y-N(220,2A)
+3.3V_VDDIO
C251
0.1U/10V/X7R_4
C608
0.1U/10V/X7R_4
C260
*0.1U/10V/X7R_4
22U/6.3VS_8
+FCH_VDDPL_33_SUSB_S
C601
2.2U/6.3V_4
C277
+FCH_VDDPL_33_SSUSB_S
4
102mA
C253
C252
0.1U/10V/X7R_4
0.1U/10V/X7R_4
+VDDPL_3.3V
M3L
+FCH_VDDPL_33_PCIE
+FCH_VDDPL_33_SATA
C201
*2.2U/6.3V_4
M3L
47mA
11mA
14mA
11mA
12mA
+LDO_CAP
3
PLACE ALL THE DECOUPLING CAPS ON
THIS SHEET CLOSE TO SB AS POSSIBLE.
U21C
AB17
VDDIO_33_PCIGP_1
AB18
VDDIO_33_PCIGP_2
AE9
VDDIO_33_PCIGP_3
AD10
VDDIO_33_PCIGP_4
AG7
VDDIO_33_PCIGP_5
AC13
VDDIO_33_PCIGP_6
AB12
VDDIO_33_PCIGP_7
AB13
VDDIO_33_PCIGP_8
AB14
VDDIO_33_PCIGP_9
AB16
VDDIO_33_PCIGP_10
H24
VDDPL_33_SYS
V22
VDDPL_33_DAC
U22
VDDPL_33_ML
T22
VDDAN_33_DAC
L18
VDDPL_33_SSUSB_S
D7
VDDPL_33_USB_S
AH29
VDDPL_33_PCIE
AG28
VDDPL_33_SATA
M31
LDO_CAP
V21
VDDPL_11_DAC
Y22
VDDAN_11_ML_1
V23
VDDAN_11_ML_2
V24
VDDAN_11_ML_3
V25
VDDAN_11_ML_4
AB10
VDDIO_33_GBE_S
AB11
VDDCR_11_GBE_S_1
AA11
VDDCR_11_GBE_S_2
AA9
VDDIO_GBE_S_1
AA10
VDDIO_GBE_S_2
HUDSON-M3
MAIN
PCI
LINK
GBE
LAN
SERIAL
PCI/GPIO I/O
CLKGEN
EXPRESS
ATA
Part 3 of 5
VDDCR_11_1
VDDCR_11_2
VDDCR_11_3
VDDCR_11_4
VDDCR_11_5
VDDCR_11_6
VDDCR_11_7
CORE
S0
VDDCR_11_8
VDDCR_11_9
VDDAN_11_CLK_1
VDDAN_11_CLK_2
VDDAN_11_CLK_3
VDDAN_11_CLK_4
VDDAN_11_CLK_5
VDDAN_11_CLK_6
VDDAN_11_CLK_7
VDDAN_11_CLK_8
I/O
VDDAN_11_PCIE_1
VDDAN_11_PCIE_2
VDDAN_11_PCIE_3
VDDAN_11_PCIE_4
VDDAN_11_PCIE_5
VDDAN_11_PCIE_6
VDDAN_11_PCIE_7
VDDAN_11_PCIE_8
VDDAN_11_SATA_1
VDDAN_11_SATA_4
VDDAN_11_SATA_2
VDDAN_11_SATA_3
VDDAN_11_SATA_5
VDDAN_11_SATA_6
VDDAN_11_SATA_7
VDDAN_11_SATA_8
VDDAN_11_SATA_9
VDDAN_11_SATA_10
T14
T17
T20
U16
U18
V14
V17
V20
Y17
H26
J25
K24
L22
M22
N21
N22
P22
AB24
Y21
AE25
AD24
AB23
AA22
AF26
AG27
AA21
Y20
AB21
AB22
AC22
AC21
AA20
AA18
AB20
AC19
340mA
1088mA
1337mA
1007mA for M3
902mA for M2
TRACE WIDTH >=100mil
C229
C233
0.1U/10V/X7R_4
0.1U/10V/X7R_4
TRACE WIDTH >=30mil
C218
C202
1U/6.3V_4
1U/6.3V_4
+1.1V_PCIE_VDDR
C293
C238
*0.1U/10V/X7R_4
*0.1U/10V/X7R_4
+1.1V_AVDD_SATA
C244
C243
1U/6.3V_4
1U/6.3V_4
C239
1U/6.3V_4
+1.1V_CKVDD
C211
0.1U/10V/X7R_4
C261
1U/6.3V_4
C276
0.1U/10V/X7R_4
+1.1V_VDDCR
C222
1U/6.3V_4
C212
0.1U/10V/X7R_4
C246
0.1U/10V/X7R_4
C275
*0.1U/10V/X7R_4
2
C674
*10U/6.3V_8
C207
22U/6.3VS_8
C675
22U/6.3VS_8
C682
22U/6.3VS_8
+1.1V
TRACE WIDTH >=100mil
R343 *0_6/S
MV:short pad
TRACE WIDTH >=50mil
R344 *0_6/S
MV:short pad
R121 *0_8/S
MV:short pad
+1.1V
+1.1VS5
L23
PBY160808T-221Y-N(220,2A)
+1.1V
1
+VDDPL_1.1V
+1.1V
C199
2.2U/6.3V_4
08
C198
0.1U/10V/X7R_4
+3V_AVDD_USB
C214
1U/6.3V_4
2.2U/6.3V_4 C221
+FCH_VDDCR_11_USB_S
TRACE WIDTH >=15mil
C586
C217
0.1U/10V/X7R_4
C158
1U/10V_4
*10U/6.3V_8
4
470mA
140mA
TRACE WIDTH >=20mil
42mA
282mA
424mA
C152
0.1U/10V/X7R_4
C208
10U/6.3V_8
+FCH_VDDAN_11_USB_S
C216
0.1U/10V/X7R_4
C150
*10U/6.3V_6
TRACE WIDTH >=50mil
C587
*10U/6.3V_8
C614 0.1U/10V/X7R_4
C223 0.1U/10V/X7R_4
+FCH_VDDAN_11_SSUSB_S_R
+FCH_VDDCR_11_SSUSB_S
L50 PBY160808T-221Y-N(220,2A)
+3VS5
C209
0.1U/10V/X7R_4
+1.1VS5
+1.1VS5
B B
+1.1VS5
PBY160808T-221Y-N(220,2A)
PBY160808T-221Y-N(220,2A)
C153
C162
1U/10V_4
0.1U/10V/X7R_4
A A
+3VS5 +FCH_VDDPL_33_SSUSB_S
L24
PBY160808T-221Y-N(220,2A)
C205
2.2U/6.3V_6
5
L53
PBY160808T-221Y-N(220,2A)
L52
PBY160808T-221Y-N(220,2A)
L18
L17
C159
0.1U/10V/X7R_4
M3 chipset need
to stuff for
support USB3.0
C203
0.1U/10V/X7R_4
G7
VDDAN_33_USB_S_1
H8
VDDAN_33_USB_S_2
J8
VDDAN_33_USB_S_3
K8
VDDAN_33_USB_S_4
K9
VDDAN_33_USB_S_5
M9
VDDAN_33_USB_S_6
M10
VDDAN_33_USB_S_7
N9
VDDAN_33_USB_S_8
N10
VDDAN_33_USB_S_9
M12
VDDAN_33_USB_S_10
N12
VDDAN_33_USB_S_11
M11
VDDAN_33_USB_S_12
U12
VDDAN_11_USB_S_1
U13
VDDAN_11_USB_S_2
T12
VDDCR_11_USB_S_1
T13
VDDCR_11_USB_S_2
P16
VDDAN_11_SSUSB_S_1
M14
VDDAN_11_SSUSB_S_2
N14
VDDAN_11_SSUSB_S_3
P13
VDDAN_11_SSUSB_S_4
P14
VDDAN_11_SSUSB_S_5
N16
VDDCR_11_SSUSB_S_1
N17
VDDCR_11_SSUSB_S_2
P17
VDDCR_11_SSUSB_S_3
M17
VDDCR_11_SSUSB_S_4
Hudson-M 2-A13
USB
POWER
L21
PBY160808T-221Y-N(220,2A)
VDDIO_33_S_1
VDDIO_33_S_2
VDDIO_33_S_3
VDDIO_33_S_4
VDDIO_33_S_5
VDDIO_33_S_6
VDDIO_33_S_7
VDDIO_33_S_8
3.3V_S5 I/O
VDDXL_33_S
VDDCR_11_S_1
VDDCR_11_S_2
VDDPL_11_SYS_S
VDDAN_33_HWM _S
VDDIO_AZ_S
USB
SS
+VDDPL_3.3V +3V
C177
2.2U/6.3V_4
3
59mA
N18
L19
M18
V12
V13
Y12
Y13
W11
5mA
G24
187mA
N20
M20
TRACE WIDTH >=15mil
70mA
J24
12mA
M8
26mA
AA4
Trace width >=2 0 mil
C180
0.1U/10V/X7R_4
TRACE WIDTH >=20mil
C187
*0.1U/10V/X7R_4
+VDDXL_3.3V
+VDDCR_1.1V
+VDDPL_1.1V
+3VS5
+3V
2.2U/6.3V_4
C257
2.2U/6.3V_4
C215
C232
2.2U/6.3V_4
C206
1U/6.3V_4
C210
0.1U/10V/X7R_4
C219
1U/6.3V_4
C213
1U/6.3V_4
+1.1VS5
C234
1U/6.3V_4
2
+VDDIO_3.3V
C186
*1U/6.3V_4
C235
*1U/6.3V_4
C179
2.2U/6.3V_4
+3VS5
L20
PBY160808T-221Y-N(220,2A)
C176
*0.1U/10V/X7R_4
PROJECT : GOLF
PROJECT : GOLF
PROJECT : GOLF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
1%
1%
1%
Friday, August 10, 2012 8 37
Friday, August 10, 2012 8 37
Friday, August 10, 2012 8 37
Date: Sheet
Date: Sheet
Date: Sheet
+3VS5
Hudson-M3L POWER/GND
Hudson-M3L POWER/GND
Hudson-M3L POWER/GND
1
1A
1A
1A
of
of
of
STRAPS PINS
5
OVERLAP COMMON PADS WHERE
POSSIBLE FOR DUAL-OP RESISTORS.
+3V +3VS5 +3VS5
4
3
2
1
DEBUG STRAPS
09
D D
PCI_CLK1 6
PCI_CLK3 6
PCI_CLK4 6
LPC_CLK0 6
LPC_CLK1 6
EC_PWM2 5
CLK_RTC 6
C C
PCI_CLK1
PCI_CLK3
PCI_CLK4
LPC_CLK0
LPC_CLK1
EC_PWM2
CLK_RTC
R348
10K/F_4
R347
10K/F_4
R346
10K/F_4
R105
10K/F_4
R102
10K/F_4
R101
2.2K_4
R109
10K/F_4
FCH has 15K Internal Pull Up for PCI_AD[27:23]
PCI_AD25 PCI_AD24
USE FC
PLL
DEFAULT
BYPASS FC
PLL
PULL
HIGH
PULL
LOW
PCI_AD27 PCI_AD26
USE PCI
PLL
DEFAULT
BYPASS
PCI PLL
DISABLE ILA
AUTORUN
DEFAULT
ENABLE ILA
AUTORUN
USE DEFAULT
PCIE STRAPS
DEFAULT
USE EEPROM
PCIE STRAPS
PCI_AD23
DISABLE PCI
MEM BOOT
DEFAULT
ENABLE PCI
MEM BOOT
REQUIRED STRAPS
--------
PULL
HIGH
PULL
LOW
B B
FCH PWRGD
--------
--------
ALLOW
PCIE Gen2
DEFAULT
FORCE
PCIE Gen1
PCI_CLK3 PCI_CLK4
USE
DEBUG
--------
STRAP
IGNORE
--------
DEBUG
STRAP
DEFAULT
non_Fusion
CLOCK MODE
FUSION
CLOCK MODE
DEFAULT
LPC_CLK0
AMD internal EC
ENABLED
EC
DISABLED
DEFAULT
LPC_CLK1
CLKGEN
ENABLED
DEFAULT
CLKGEN
DISABLED
EC_PWM2
LPC ROM
DEFAULT
SPI ROM
CLK_RTC PCI_CLK1 --------
S5 PLUS MODE
ENABLED
S5 PLUS MODE
DISABLED
DEFAULT
+3VS5
R319
D14 BAT54A
CPU_VRM8380_PG 31
ECPWROK 3,16,26
A A
5
2
3
1
4
10K/F_4
C638
0.1U/10V/X7R_4
3
FCH_PWRGD 5
PROJECT : GOLF
PROJECT : GOLF
PROJECT : GOLF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Hudson-M3L STRAP/PWRGD
Hudson-M3L STRAP/PWRGD
1%
1%
2
1%
Hudson-M3L STRAP/PWRGD
Date: Sheet
Friday, August 10, 2012 9 37
Friday, August 10, 2012 9 37
Friday, August 10, 2012 9 37
Date: Sheet
Date: Sheet
1
1A
1A
1A
of
of
of
1
2
3
4
5
6
7
8
DDR_STD(4.0mm)
M_A_A[15:0] 2,11
A A
M_A_BS#0 2,11
M_A_BS#1 2,11
M_A_BS#2 2,11
M_A_CS#2 2
M_A_CS#3 2
M_A_CLKP2 2
M_A_CLKN2 2
M_A_CLKP3 2
M_A_CLKN3 2
M_A_CKE0 2,11
M_A_CKE1 2,11
M_A_CAS# 2,11
M_A_RAS# 2,11
M_A_WE# 2,11
CGCLK_SMB 5,11
CGDAT_SMB 5,11
B B
3ODFHWKHVH&DSVQHDU6R'LPP
C C
1R9LDV%HWZHHQWKH7UDFHRI3,1WR&$3
+1.5VSUS
DE-COUPLING FOR DIMM1(ONE CAP PER POWER PIN)
C390
C436
0.1U/10V_4
0.1U/10V_4
M_A_ODT2 2
M_A_ODT3 2
M_A_DQSP[7:0] 2,11
M_A_DQSN[7:0] 2,11
C438
0.1U/10V_4
M_A_DM0 2,11
M_A_DM1 2,11
M_A_DM2 2,11
M_A_DM3 2,11
M_A_DM4 2,11
M_A_DM5 2,11
M_A_DM6 2,11
M_A_DM7 2,11
C437
0.1U/10V_4
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
DIMM1_SA0
DIMM1_SA1
PCLK_SMB
PDAT_SMB
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
C389
0.1U/10V_4
DIMM2A
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200
116
120
11
28
46
63
136
153
170
187
12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186
DDR3-DIMM0
DGMK4000327
ddr-ddrsk-20 401-tp4b-204 p-ldv
C396
0.1U/10V_4
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
ODT0
ODT1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
C408
0.1U/10V_4
PC2100 DDR3 SDRAM SO-DIMM
C439
0.1U/10V_4
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
C397
0.1U/10V_4
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
(204P)
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
M_A_DQ[0..63] 2,11
+VREF_CA_A
+1.5VSUS
0.1U/10V_4
R164
1K/F_4
+VREF_DQ
R166
1K/F_4
C428
+VREF_DQ 11
C398
1000P/50V_4
DDR_VTTREF 11,33
R175
*0_4/S
+VREF_CA_A
+1.5VSUS
2.48A
+3V
M_A_EVENT# 2,11,24
M_A_RST# 2,11
+VREF_DQ
+VREF_CA_A
C393
0.1U/10V_4
C394
1000P/50V_4
ddr-ddrsk-20 401-tp4b-204 p-ldv
DIMM2B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3-DIMM0
DGMK4000327
44
VSS16
48
VSS17
49
VSS18
54
VSS19
55
VSS20
60
VSS21
61
VSS22
65
VSS23
66
VSS24
71
VSS25
72
VSS26
127
VSS27
128
VSS28
133
VSS29
134
VSS30
138
VSS31
139
VSS32
144
VSS33
145
VSS34
150
VSS35
151
VSS36
155
VSS37
156
VSS38
161
VSS39
162
VSS40
167
VSS41
168
VSS42
172
VSS43
173
VSS44
178
VSS45
179
VSS46
184
VSS47
185
VSS48
189
VSS49
190
VSS50
195
VSS51
196
VSS52
203
(204P)
PC2100 DDR3 SDRAM SO-DIMM
VTT1
204
VTT2
GND
GND
GND
GND
206
205
207
208
+0.75V_DDR_VTT
Place close to DIMMs
10
+1.5VSUS
C434
C433
10U/6.3V_6
D D
C435
10U/6.3V_6
10U/6.3V_6
1
2
DE-COUPLING FOR DIMM1
+0.75V_DDR_VTT +3V
C411
1U/6.3V_4
C409
560P/50V_4
3
C427
4.7U/6.3V_6
+0.75V_DDR_VTT
C421 150P/50V_4
C426 0.1U/10V_4
4
+1.5VSUS
PROJECT : GOLF
PROJECT : GOLF
PROJECT : GOLF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
+1.5VSUS 2,4,11,33,34,36
+3V 3,4,5,7,8,9,11,13,16,19,20,21,22,23,24,25,26,31,34,35,36
+0.75V_DDR_VTT 11,33
5
6
1%
1%
1%
7
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDRIII SODIMM1(STD)
DDRIII SODIMM1(STD)
DDRIII SODIMM1(STD)
Friday, Augu st 10, 2012 10 37
Date: Sheet
Friday, Augu st 10, 2012 10 37
Date: Sheet
Friday, Augu st 10, 2012 10 37
Date: Sheet
of
of
of
8
1A
1A
1A
1
DDR_RVS(4.0mm)
M_A_A[15:0] 2,10
M_A_BS#0 2,10
M_A_BS#1 2,10
M_A_BS#2 2,10
M_A_CS#0 2
M_A_CS#1 2
M_A_CLKP0 2
M_A_CLKN0 2
M_A_CLKP1 2
M_A_CLKN1 2
M_A_CKE0 2,10
M_A_CKE1 2,10
M_A_CAS# 2,10
M_A_RAS# 2,10
M_A_WE# 2,10
+3V
A A
R169 4.7K_4
CGCLK_SMB 5,10
CGDAT_SMB 5,10
M_A_ODT0 2
M_A_ODT1 2
M_A_DM0 2,10
M_A_DM1 2,10
M_A_DM2 2,10
M_A_DM3 2,10
M_A_DM4 2,10
M_A_DM5 2,10
M_A_DM6 2,10
M_A_DM7 2,10
M_A_DQSP[7:0] 2,10
M_A_DQSN[7:0] 2,10
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
DIMM2_SA0
DIMM2_SA1
PCLK_SMB
PDAT_SMB
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
3ODFHWKHVH&DSVQHDU6R'LPP
1R9LDV%HWZHHQWKH7UDFHRI3,1WR&$3
DIMM1A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
ddr-ddrrk-20401-tp4b-204p-ruv
DGMK4000263
ddr-ddrrk-20401-tp4b-204p-ruv
5
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
(204P)
DQ48
PC2100 DDR3 SDRAM SO-DIMM
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
M_A_DQ0
7
M_A_DQ1
15
M_A_DQ2
17
M_A_DQ3
4
M_A_DQ4
6
M_A_DQ5
16
M_A_DQ6
18
M_A_DQ7
21
M_A_DQ8
23
M_A_DQ9
33
M_A_DQ10
35
M_A_DQ11
22
M_A_DQ12
24
M_A_DQ13
34
M_A_DQ14
36
M_A_DQ15
39
M_A_DQ16
41
M_A_DQ17
51
M_A_DQ18
53
M_A_DQ19
40
M_A_DQ20
42
M_A_DQ21
50
M_A_DQ22
52
M_A_DQ23
57
M_A_DQ24
59
M_A_DQ25
67
M_A_DQ26
69
M_A_DQ27
56
M_A_DQ28
58
M_A_DQ29
68
M_A_DQ30
70
M_A_DQ31
129
M_A_DQ32
131
M_A_DQ33
141
M_A_DQ34
143
M_A_DQ35
130
M_A_DQ36
132
M_A_DQ37
140
M_A_DQ38
142
M_A_DQ39
147
M_A_DQ40
149
M_A_DQ41
157
M_A_DQ42
159
M_A_DQ43
146
M_A_DQ44
148
M_A_DQ45
158
M_A_DQ46
160
M_A_DQ47
163
M_A_DQ48
165
M_A_DQ49
175
M_A_DQ50
177
M_A_DQ51
164
M_A_DQ52
166
M_A_DQ53
174
M_A_DQ54
176
M_A_DQ55
181
M_A_DQ56
183
M_A_DQ57
191
M_A_DQ58
193
M_A_DQ59
180
M_A_DQ60
182
M_A_DQ61
192
M_A_DQ62
194
M_A_DQ63
M_A_DQ[0..63] 2,10
+VREF_CA_B
C376
0.1U/10V_4
+VREF_DQ 10
C375
1000P/50V_4
DDR_VTTREF 10,33
R172
*0_4/S
+VREF_CA_B
+1.5VSUS
2.48A
+3V
M_A_EVENT# 2,10,24
M_A_RST# 2,10
+VREF_DQ
+VREF_CA_B
C388
0.1U/10V_4
C358
1000P/50V_4
ddr-ddrrk-20401-tp4b-204p-ruv
DIMM1B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
31
32
37
38
43
ddr-ddrrk-20401-tp4b-204p-ruv
DGMK4000263
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
PC2100 DDR3 SDRAM SO-DIMM
GND
207
44
VSS16
48
VSS17
49
VSS18
54
VSS19
55
VSS20
60
VSS21
61
VSS22
65
VSS23
66
VSS24
71
VSS25
72
VSS26
127
VSS27
128
VSS28
133
VSS29
134
VSS30
138
VSS31
139
VSS32
144
VSS33
145
VSS34
150
VSS35
151
VSS36
155
VSS37
156
VSS38
161
VSS39
162
VSS40
167
VSS41
168
VSS42
172
VSS43
173
VSS44
178
VSS45
179
VSS46
184
VSS47
185
VSS48
189
VSS49
190
VSS50
195
VSS51
196
VSS52
203
(204P)
VTT1
204
VTT2
GND
GND
GND
206
205
208
+0.75V_DDR_VTT
11
Place close to DIMMs
C344
10U/6.3V_6
+1.5VSUS
+1.5VSUS
DE-COUPLING FOR DIMM2(ONE CAP PER POWER PIN)
C353
C342
C381
0.1U/10V_4
C347
10U/6.3V_6
C354
0.1U/10V_4
10U/6.3V_6
C349
C384
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
C378
0.1U/10V_4
C356
0.1U/10V_4
C341
0.1U/10V_4
C386
0.1U/10V_4
DE-COUPLING FOR DIMM2
+3V +0.75V_DDR_VTT +0.75V_DDR_VTT
C363
1U/6.3V_4
C359
560P/50V_4
C383
4.7U/6.3V_6
C350 150P/50V_4
C352 0.1U/10V_4
+1.5VSUS
Return Path for DDR Plane
+1.5VSUS
C357
0.1U/10V_4
1
C338
0.1U/10V_4
C385
0.1U/10V_4
+0.75V_DDR_VTT 10,33
+1.5VSUS 2,4,10,33,34,36
C360
0.1U/10V_4
+3V 3,4,5,7,8,9,10,13,16,19,20,21,22,23,24,25,26,31,34,35,36
C362
0.1U/10V_4
PROJECT : GOLF
PROJECT : GOLF
PROJECT : GOLF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
1%
1%
1%
Date: Sheet
Date: Sheet
Date: Sheet
DDRIII SODIMM2(RVS)
DDRIII SODIMM2(RVS)
DDRIII SODIMM2(RVS)
Friday, Augu st 10, 2012 11 37
Friday, Augu st 10, 2012 11 37
Friday, Augu st 10, 2012 11 37
1A
1A
1A
of
of
of
5
4
3
2
1
HOLE
12
H13
H1
*H-C315D110P2
D D
1
H8
*H-C315D110P2
1
H12
*H-C315D110P2
1
H9
*h-tc315bs2d110p2
1
*h-tsbsd110p2-2
1
H4
*h-tc205bc276d110p2
1
C C
H5
*h-tc315bs1d110p2
1
H2
*H-C315D110P2
1
H25
*H-TSBSD110P2
1
H3
*H-C315D110P2
1
H10
*H-C217D110P2
1
H6
*H-C315D110P2
1
H11
*H-C217D110P2
1
H22
MBZR7001010
*h-tc167bc138d104p2
1
*spad-u52-1 np
1
H23
MBZR7001010
*h-tc167bc138d104p2
1
PAD1
H24
*h-tsbc110d110pt
1
H7
MBUL1001010
H-C217D122P2
1
H17
MBUL1001010
H-C217D122P2
1
M-SATA PCH
H16
*H-TC217BC280D150P2
1
+VIN
H18
*H-TC217BC280D150P2
1
H21
*H-TC217BC280D150P2
B B
Vin Cap
1
+VIN
H19
*H-TC217BC280D150P2
1
H20
*H-TC217BC280D150P2
1
H14
*H-TC217BC280D150P2
1
H15
*H-TC217BC280D150P2
1
+1.5VSUS Cap for EMI 06/14 add
+1.5VSUS
C417
150P/50V_4
C418
150P/50V_4
C419
150P/50V_4
C420
150P/50V_4
C763
150P/50V_4
C764
150P/50V_4
C765
150P/50V_4
C767
0.1U/25V_4
+VIN
C766
0.1U/25V_4
C768
0.1U/25V_4
C769
150P/50V_4
2
C770
150P/50V_4
1%
1%
1%
C771
150P/50V_4
C773
150P/50V_4
PROJECT : GOLF
PROJECT : GOLF
PROJECT : GOLF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
HOLE
HOLE
HOLE
Date: Sheet
Date: Sheet
Date: Sheet
C774
150P/50V_4
1
1A
1A
1A
of
of
of
12 37 Friday, Augu st 10, 2012
12 37 Friday, Augu st 10, 2012
12 37 Friday, Augu st 10, 2012
C744
0.1U/25V_4
A A
C748
0.1U/25V_4
+VIN
C745
0.1U/25V_4
C749
0.1U/25V_4
5
C746
0.1U/25V_4
C751
0.1U/25V_4
C747
0.1U/25V_4
C750
0.1U/25V_4
C752
0.1U/25V_4
C756
0.1U/25V_4
+VIN
C753
0.1U/25V_4
C757
0.1U/25V_4
4
C755
0.1U/25V_4
C759
0.1U/25V_4
C754
0.1U/25V_4
C758
0.1U/25V_4
C760
0.1U/25V_4
3