Quanta GM7 DAGM7MB1AE0, XPS 17, GM7C DAGM7MB1AE1 Schematic

1

2

3

4

5

6

7

8

POWER

System Block Diagram of GM7

+1.5V_SUS/+0.75V_DDR_VTT

A A

FAN & THERMAL

SMSC1422

PG 26

CLOCK

SLG8SP585VTR (QFN-32)

PG 02

USER INTERFACE

PG 37

CPU/NB

(Arranndale)

DDR3-SODIMM_A0

PG 13

B B

DDR3-SODIMM_B0

1067/1333 MHz DDR III

2 Core

+1.05V_RUN

+1.1V_RUN_VTT

SYSTEM RESET CIRCUIT

BATT CHARGER

RUN POWER SW

+3.3V_SUS/+5V_SUS +5V/+3.3V/+1.8V

PG 30

PG 32

PG31

PG 27

PG 28

PG 36

LVDS conn.

CPU VCOREREGULATOR

DC/DC

+3.3V_ALW/+5V_ALW/ +15V_ALW

AC/BATT CONNECTOR

GFX UMA

+1.8V_RUN

PG 16

PG 29

PG 33

PG 37

PG 34

PG 35

PG 14

(989 PGA)

PG 3-6

DP

DP Redriver

DP conn.

SN75DP120

DMI X 4FDI(ARD)

E-Module Bay SATA - ODD

SATA - HDD0 SATA - HDD1

PG 23 PG 23

PG 23

Bluetooth BTB Conn

C C

PG 32

JMicronCard Reader

conn.

PG 17

JMB389

PG 17

SATA[1] SATA[0]

SATA[5]

USB[8]

PCIE[5]

USB[1,2,3]

PCIE[7]

PCH

(HM57)

PG 7,8,9,10,11,12

LVDS HDMI PCIE[6]

SATA[4] USB[0] PCIE[1,3] USB[4,5]

SPI

LPC

SPI ROM

USB conn. X3

USB[1,2,3]

DB2 Conn.

HDMI Level Shifter

SN75DP139RGZR

PG 18

DB1 Conn.

HDMI

PCIE[6]

SATA[4] USB[1]

PCIE[1] USB[4]

PCIE[3] USB[5]

HDMI Redriver

TMDS141

LAN

RTL8111EL

eSATA Redriver

SN75LVCP412

MINI-CARD

WLAN

MINI-CARD

WWAN

HDMI conn.

RJ45 conn.

E-SATA Combo with USB CONN

Main SPK Amp

MAX9736AETJ+

Main SPK

1.5W*2

8M bytes

KBC

ITE8502

PG 22

USB 3.0

D D

uPD720200F1

SPI PS/2

FLASH 1Mbyts

PG 30 PG 24

1

2

3

19X8

PG 20

Touchpad

PG 19

Keyboard

PG 24

4

Azalia I/F

5

PG 21

Azalia I/F

6

AUDIO Codec

ALC665

Audio Jacks X3

PG 39

Subwoofer Amp

MAX9736AETJ+

Quanta Computer Inc.

Project Name:

Title

MB Block Diagram

Size Document Number Rev

Date: Sheet

Project Name:

XM2_MB D

7

SPK 3W*1

XM2

of

140Friday, January 15, 2010

8

5

L8 BLM21PG600SN1D

+3.3V_RUN

D D

+1.5V_RUN

L8 BLM21PG600SN1D

805

L10 *BLM21PG600SN1D_NC

805

C238

C238 10U

10U

0805

Reserve for SLG8SP595VTR

CK_PWRGD_R27 CLK_PCH_14M9

Place the 33 ohm resistors close to the CK 505

C C

C220

0.1U

+3.3V_RUN

CLK_PCH_14M

4

C236

0.1U

R198 10K/J_4R198 10K/J_4 R177 33/J_4R177 33/J_4

C221

0.1U

40mil

C224

0.1U

EC_SMBDAT222,26 EC_SMBCLK222,26

+3.3V_CLK_VDD

+VDDIO_CLK

C232

0.1U

0.1uF near the every power pin.

CPU_SEL

XTAL_OUT XTAL_IN

3

U7

1

VDD_USB

5

VDD_LCD

17

VDD_SRC

24

VDD_CPU

29

VDD_REF

15

VDD_SRC_IO

18

VDD_CPU_IO

9

VSS_SATA

2

VSS_USB

8

VSS_LCD

12

VSS_SRC

21

VSS_CPU

26

VSS_REF

16

CPU_STOP#

25

CK_PWRGD/PD#_3.3

30

REF_0/CPU_SEL

27

XOUT

28

XIN

31

SDATA

32

SCLK

SLG8SP585VTR

CK505

QFN32

CPU-0

CPU-0#

CPU-1

CPU-1#

DOT96T_LPR DOT96C_LPR

SRC-1

SRC-1#

SATA

SATA#

27MHz_nonSS

27MHz_SS

GND

2

23 22

20 19

3 4

13 14

10 11

6 7

33

CLK_BUF_BCLKP 9 CLK_BUF_BCLKN 9

CLK_BUF_DREFCLKP 9 CLK_BUF_DREFCLKN 9

CLK_BUF_PCIE_3GPLLP 9 CLK_BUF_PCIE_3GPLLN 9

CLK_BUF_DREFSSCLKP 9 CLK_BUF_DREFSSCLKN 9

1

Realtek: 0.1uFx3pcs, 22uFx1pcs IDT: 0.1uFx2pcs, 10uFx1pcs

CLK_PCH_14M

EMI

C225*27P_NC C225*27P_NC

EC_SMBCLK2EC_SMBDAT2

12

C222

C222 *10P_NC

*10P_NC

50

B B

12

C219

C219 *10P_NC

*10P_NC

50

XTAL_IN XTAL_OUT

C231

C231 33P

33P

Y2

21

14.318MHZ

14.318MHZ C237

C237 33P

33P

1 2

+3.3V_RUN

R206 *0_NC

+1.05V_RUN

0805

R205 0

0805

SLG,IDT: +1.05V Realtek: +3.3V

L9 BLM21PG600SN1D

805

Place each 0.1uF cap as close as possible to each VDD IO pin. Place the 10uF caps on the VDD_IO plane.

C229

C229 10U

10U

0805

+VDDIO_CLK

40mil

C233

0.1U

C228

0.1U

+VDDIO_CLK: SLG date sheet (V0.2) P15: Min 1.05V,Max3.465V.

+3.3V_RUN

R174

R174 *4.7K_NC

*4.7K_NC

1 2

CPU_SEL

R176

4.7K/J_4

1 2

A A

5

C223

C223 *10P-NC

*10P-NC

EMI Capacitor

PIN 30 CPU_0 CPU_1

0(default)

1(0.7V-1.5V)

133MHz

100MHz 100MHz

133MHz

4

CPU_SEL: SLG date sheet (V0.2) P15: High Voltage: Min 0.7V, Max 1.5V. Low Voltage: Min Vss-0.3V, Max 0.35V. Realtek date sheet(V1.2) P11: High Voltage: Min 0.7V, Max 1.5V. Low Voltage: Min Vss-0.3V, Max 0.35V. IDT date sheet(V0.7) P10: High Voltage: Min 0.7V, Max 1.5V. Low Voltage: Min Vss-0.3V, Max 0.35V.

3

2

Realtek date sheet(V1.2) P11: Min 1.05V,Max 3.3V. IDT date sheet(V0.7) P10: Min 0.9975V,Max 3.465V.

Quanta Computer Inc.

Project Name:

Title

Clock Gen

Size Document Number Rev

Date: Sheet

Project Name:

GM7B D

1

GM7B

240Friday, January 15, 2010

of

5

4

3

2

1

AUBURNDALE/CLARKSFIELD PROCESSOR (DMI,PEG,FDI) AUBURNDALE/CLARKSFIELD PROCESSOR (CLK,MISC,JTAG)

U8A

DMI_TXN07 DMI_TXN17

D D

C C

B B

DMI_TXN27 DMI_TXN37

DMI_TXP07 DMI_TXP17 DMI_TXP27 DMI_TXP37

DMI_RXN07 DMI_RXN17 DMI_RXN27 DMI_RXN37

DMI_RXP07 DMI_RXP17 DMI_RXP27 DMI_RXP37

FDI_TXN07 FDI_TXN17 FDI_TXN27 FDI_TXN37 FDI_TXN47 FDI_TXN57 FDI_TXN67 FDI_TXN77

FDI_TXP07 FDI_TXP17 FDI_TXP27 FDI_TXP37 FDI_TXP47 FDI_TXP57 FDI_TXP67 FDI_TXP77

FDI_FSYNC07 FDI_FSYNC17

FDI_INT7 FDI_LSYNC07

FDI_LSYNC17

Processor Pullups

H_CATERR# H_PROCHOT# H_CPURST#

R54

49.9

1%

+1.05V_RUN_VTT

R89

49.9

1%

A24

DMI_RX#[0]

C23

DMI_RX#[1]

B22

DMI_RX#[2]

A21

DMI_RX#[3]

B24

DMI_RX[0]

D23

DMI_RX[1]

B23

DMI_RX[2]

A22

DMI_RX[3]

D24

DMI_TX#[0]

G24

DMI_TX#[1]

F23

DMI_TX#[2]

H23

DMI_TX#[3]

D25

DMI_TX[0]

F24

DMI_TX[1]

E23

DMI_TX[2]

G23

DMI_TX[3]

E22

FDI_TX#[0]

D21

FDI_TX#[1]

D19

FDI_TX#[2]

D18

FDI_TX#[3]

G21

FDI_TX#[4]

E19

FDI_TX#[5]

F21

FDI_TX#[6]

G18

FDI_TX#[7]

D22

FDI_TX[0]

C21

FDI_TX[1]

D20

FDI_TX[2]

C18

FDI_TX[3]

G22

FDI_TX[4]

E20

FDI_TX[5]

F20

FDI_TX[6]

G19

FDI_TX[7]

F17

FDI_FSYNC[0]

E17

FDI_FSYNC[1]

C17

FDI_INT

F18

FDI_LSYNC[0]

D17

FDI_LSYNC[1]

PZ98927-3641-01F

Processor Compensation Signals

R88

R88 *68_NC

*68_NC

R272

49.9

1%

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RBIAS PEG_RX#[0]

PEG_RX#[1] PEG_RX#[2]

DMI Intel(R) FDI

PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]

PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PCI EXPRESS -- GRAPHICS

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

R38

R274

49.9

20

1%

R275

R275 20

20

1%

B26 A26 B27 A25

K35 J34 J33 G35 G32 F34 F31 D35 E33 C33 D32 B32 C31 B28 B30 A31

J35 H34 H33 F35 G33 E34 F32 D34 F33 B33 D31 A32 C30 A28 B29 A30

L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26

L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25

H_COMP0 H_COMP1 H_COMP2 H_COMP3

PEG_COMP

R228 49.9/FR228 49.9/F

R229 750R229 750

DDR3 Compensation Signals

R277

R276

24.9

130

1%

R278

R278 100

100

1%

PM_DRAM_PWRGD7

SM_RCOMP_2 SM_RCOMP_1 SM_RCOMP_0

Layout Note: Place these resistors near Processor

U8B

AT23 AT24

G16

AT26

AH24

AK14

AT15

AN26

AK15

AP26

AL15

AN14

AN27

AK13

AM15

AM26

AL14

H_THERM#

MMST3904-7-F

U8B

COMP3 COMP2 COMP1 COMP0

SKTOCC#

CATERR#

PECI

PROCHOT#

THERMTRIP#

RESET_OBS#

PM_SYNC

VCCPWRGOOD_1

VCCPWRGOOD_0

SM_DRAMPWROK

VTTPWRGOOD

TAPPWRGOOD

RSTIN#

PZ98927-3641-01F

+3.3V_RUN

R104

R104 10M

10M

2

Q21

1 3

MISC THERMAL

PWR MANAGEMENT

PM_THRMTRIP# 33

31

Q22

Q22 2N7002W-7-F

2N7002W-7-F

2

12

C183

0.1U

16

BCLK

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

CLOCKS

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

PM_EXT_TS#[0] PM_EXT_TS#[1]

DDR3

MISC

DDR3

MISC

JTAG & BPM

PRDY#

PREQ#

TRST#

TDI_M

TDO_M

DBR#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

TCK TMS

TDI

TDO

A16 B16

AR30 AT30

E16 D16

A18 A17

DDR3_DRAMRST#_R

F6

SM_RCOMP_0

AL1

SM_RCOMP_1

AM1

SM_RCOMP_2

AN1 AN15

AP15

AT28 AP27

AN28 AP28 AT27

AT29 AR27 AR29 AP29

AN25

AJ22 AK22 AK24 AJ24 AJ25 AH22 AK23 AH23

XDP_TRST#

XDP_TDI_M XDP_TDO_M

H_DBR#_R

TP15TP15

R90 0R90 0

JTAG MAPPING

H_DBR#_R

XDP_TRST#

R86 1KR86 1K

R271 51/FR271 51/F

TP41TP41 TP14TP14

TP16TP16

TP10TP10 TP11TP11 TP8TP8 TP5TP5 TP4TP4 TP7TP7 TP6TP6 TP9TP9

TP40TP40 TP42TP42

CLK_CPU_BCLK 10 CLK_CPU_BCLK# 10

TP43TP43 TP44TP44

CLK_PCIE_3GPLL 9 CLK_PCIE_3GPLL# 9

CLK_BUF_SSCLK 9 CLK_BUF_SSCLK# 9

R79 10KR79 10K R77 10KR77 10K

R80 0R80 0 R78 0R78 0

+3.3V_RUN

12 12

R76

*12.4K/F_NC

+1.05V_RUN_VTT

PM_EXTTS#0 13 PM_EXTTS#1 14

H_COMP3 H_COMP2 H_COMP1 H_COMP0

H_CPUDET#20

H_CATERR#

H_PECI10

H_PROCHOT#

PM_DRAM_PWRGD

TP17TP17

R74

R74 750

750

1%

H_THERM#

H_CPURST#

PLTRST#_R

H_THERM#10

PM_SYNC7

H_CPUPWRGD10

H_VTTPWRGD27

PLTRST#9,17,20,21

R75 1.5K 1%R75 1.5K 1%

S3 Power reduce

+1.5V_SUS_CPU

A A

Use a voltage divider with VDDQ (1.5V) rail (ON in S3) and resistor combination of 4.75K (to VDDQ)/12K(to GND) to generate the required voltage. Note: CRB uses a 3.3V (always ON) rail with 2K and 1K combination.

5

R82

R82 *1.1K/F_NC

*1.1K/F_NC

PM_DRAM_PWRGD

R83

R83 750/F

750/F

R84 1.5K/FR84 1.5K/F

4

+3.3V_ALW

U5

3 5

74AHC1G08GW

2 1

4

1.5V_DDR_PWRGD 30

S3 Power reduce

3

DDR3_DRAMRST#_R

R36 *0_NCR36 *0_NC

1

R35

R35 100K

100K

1 2

Q14

Q14 BSS138-7-F

BSS138-7-F

2

12

C40

0.047U

10

+1.5V_SUS

R371KR37 1K

3

RST_GATE 10

2

DDR3_DRAMRST# 13,14

Quanta Computer Inc.

Project Name:

Title

CPU 1/4(PEG_DMI)

Size Document Number Rev

Date: Sheet

Project Name:

XM2_MB D

1

XM2

of

340Friday, January 15, 2010

5

4

3

2

1

AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)

U8C

AA6

SA_CK[0]

AA7

SA_CK#[0]

M_A_DQ[63:0]13

D D

C C

M_A_BS#013 M_A_BS#113 M_A_BS#213

B B

M_A_CAS#13 M_A_RAS#13 M_A_WE#13

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

AJ10 AL10

AK12

AK11

AM10 AR11

AL11

AT11 AP12 AM12 AN12 AM13 AT14 AT12

AL13 AR14 AP14

A10

SA_DQ[0]

C10

SA_DQ[1]

C7

SA_DQ[2]

A7

SA_DQ[3]

B10

SA_DQ[4]

D10

SA_DQ[5]

E10

SA_DQ[6]

A8

SA_DQ[7]

D8

SA_DQ[8]

F10

SA_DQ[9]

E6

SA_DQ[10]

F7

SA_DQ[11]

E9

SA_DQ[12]

B7

SA_DQ[13]

E7

SA_DQ[14]

C6

SA_DQ[15]

H10

SA_DQ[16]

G8

SA_DQ[17]

K7

SA_DQ[18]

J8

SA_DQ[19]

G7

SA_DQ[20]

G10

SA_DQ[21]

J7

SA_DQ[22]

J10

SA_DQ[23]

L7

SA_DQ[24]

M6

SA_DQ[25]

M8

SA_DQ[26]

L9

SA_DQ[27]

L6

SA_DQ[28]

K8

SA_DQ[29]

N8

SA_DQ[30]

P9

SA_DQ[31]

AH5

SA_DQ[32]

AF5

SA_DQ[33]

AK6

SA_DQ[34]

AK7

SA_DQ[35]

AF6

SA_DQ[36]

AG5

SA_DQ[37]

AJ7

SA_DQ[38]

AJ6

SA_DQ[39] SA_DQ[40]

AJ9

SA_DQ[41] SA_DQ[42] SA_DQ[43]

AK8

SA_DQ[44]

AL7

SA_DQ[45] SA_DQ[46]

AL8

SA_DQ[47]

AN8

SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51]

AM9

SA_DQ[52]

AN9

SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

AC3

SA_BS[0]

AB2

SA_BS[1]

U7

SA_BS[2]

AE1

SA_CAS#

AB3

SA_RAS#

AE9

SA_WE#

DDR SYSTEM MEMORY A

SA_CKE[0]

SA_CK[1] SA_CK#[1] SA_CKE[1]

SA_CS#[0] SA_CS#[1]

SA_ODT[0] SA_ODT[1]

SA_DM[0]

SA_DM[1]

SA_DM[2]

SA_DM[3]

SA_DM[4]

SA_DM[5]

SA_DM[6]

SA_DM[7]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

SA_MA[0]

SA_MA[1]

SA_MA[2]

SA_MA[3]

SA_MA[4]

SA_MA[5]

SA_MA[6]

SA_MA[7]

SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

P7

Y6 Y5 P6

AE2 AE8

AD8 AF9

B9 D7 H7 M7 AG6 AM7 AN10 AN13

C9 F8 J9 N9 AH7 AK9 AP11 AT13

C8 F9 H9 M9 AH8 AK10 AN11 AR13

Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_CLK0 13 M_A_CLK0# 13 M_A_CKE0 13

M_A_CLK1 13 M_A_CLK1# 13 M_A_CKE1 13

M_A_CS#0 13 M_A_CS#1 13

M_A_ODT0 13 M_A_ODT1 13

M_A_DM[7:0] 13

M_A_DQS#[7:0] 13

M_A_DQS[7:0] 13

M_A_A[15:0] 13

M_B_DQ[63:0]14

M_B_BS#014 M_B_BS#114 M_B_BS#214

M_B_CAS#14 M_B_RAS#14 M_B_WE#14

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60M_A_A0 M_B_DQ61 M_B_DQ62 M_B_DQ63

AR10 AT10

U8D

W8

SB_CK[0]

W9

SB_CK#[0]

B5

SB_DQ[0]

A5

SB_DQ[1]

C3

SB_DQ[2]

B3

SB_DQ[3]

E4

SB_DQ[4]

A6

SB_DQ[5]

A4

SB_DQ[6]

C4

SB_DQ[7]

D1

SB_DQ[8]

D2

SB_DQ[9]

F2

SB_DQ[10]

F1

SB_DQ[11]

C2

SB_DQ[12]

F5

SB_DQ[13]

F3

SB_DQ[14]

G4

SB_DQ[15]

H6

SB_DQ[16]

G2

SB_DQ[17]

J6

SB_DQ[18]

J3

SB_DQ[19]

G1

SB_DQ[20]

G5

SB_DQ[21]

J2

SB_DQ[22]

J1

SB_DQ[23]

J5

SB_DQ[24]

K2

SB_DQ[25]

L3

SB_DQ[26]

M1

SB_DQ[27]

K5

SB_DQ[28]

K4

SB_DQ[29]

M4

SB_DQ[30]

N5

SB_DQ[31]

AF3

SB_DQ[32]

AG1

SB_DQ[33]

AJ3

SB_DQ[34]

AK1

SB_DQ[35]

AG4

SB_DQ[36]

AG3

SB_DQ[37]

AJ4

SB_DQ[38]

AH4

SB_DQ[39]

AK3

SB_DQ[40]

AK4

SB_DQ[41]

AM6

SB_DQ[42]

AN2

SB_DQ[43]

AK5

SB_DQ[44]

AK2

SB_DQ[45]

AM4

SB_DQ[46]

AM3

SB_DQ[47]

AP3

SB_DQ[48]

AN5

SB_DQ[49]

AT4

SB_DQ[50]

AN6

SB_DQ[51]

AN4

SB_DQ[52]

AN3

SB_DQ[53]

AT5

SB_DQ[54]

AT6

SB_DQ[55]

AN7

SB_DQ[56]

AP6

SB_DQ[57]

AP8

SB_DQ[58]

AT9

SB_DQ[59]

AT7

SB_DQ[60]

AP9

SB_DQ[61] SB_DQ[62] SB_DQ[63]

AB1

SB_BS[0]

W5

SB_BS[1]

R7

SB_BS[2]

AC5

SB_CAS#

Y7

SB_RAS#

AC6

SB_WE#

DDR SYSTEM MEMORY - B

SB_CKE[0]

SB_CK[1] SB_CK#[1] SB_CKE[1]

SB_CS#[0] SB_CS#[1]

SB_ODT[0] SB_ODT[1]

SB_DM[0]

SB_DM[1]

SB_DM[2]

SB_DM[3]

SB_DM[4]

SB_DM[5]

SB_DM[6]

SB_DM[7]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

SB_MA[0]

SB_MA[1]

SB_MA[2]

SB_MA[3]

SB_MA[4]

SB_MA[5]

SB_MA[6]

SB_MA[7]

SB_MA[8]

SB_MA[9]

SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

M3

V7 V6 M2

AB8 AD6

AC7 AD1

M_B_DM0

D4

M_B_DM1

E1

M_B_DM2

H3

M_B_DM3

K1

M_B_DM4

AH1

M_B_DM5

AL2

M_B_DM6

AR4

M_B_DM7

AT8

M_B_DQS#0

D5

M_B_DQS#1

F4

M_B_DQS#2

J4

M_B_DQS#3

L4

M_B_DQS#4

AH2

M_B_DQS#5

AL4

M_B_DQS#6

AR5

M_B_DQS#7

AR8

M_B_DQS0

C5

M_B_DQS1

E3

M_B_DQS2

H4

M_B_DQS3

M5

M_B_DQS4

AG2

M_B_DQS5

AL5

M_B_DQS6

AP5

M_B_DQS7

AR7

M_B_A0

U5

M_B_A1

V2

M_B_A2

T5

M_B_A3

V3

M_B_A4

R1

M_B_A5

T8

M_B_A6

R2

M_B_A7

R6

M_B_A8

R4

M_B_A9

R5

M_B_A10

AB5

M_B_A11

P3

M_B_A12

R3

M_B_A13

AF7

M_B_A14

P5

M_B_A15

N1

M_B_CLK0 14 M_B_CLK0# 14 M_B_CKE0 14

M_B_CLK1 14 M_B_CLK1# 14 M_B_CKE1 14

M_B_CS#0 14 M_B_CS#1 14

M_B_ODT0 14 M_B_ODT1 14

M_B_DM[7:0] 14

M_B_DQS#[7:0] 14

M_B_DQS[7:0] 14

M_B_A[15:0] 14

PZ98927-3641-01F

A A

Quanta Computer Inc.

Project Name:

Title

CPU 2/4(DDR)

Size Document Number Rev

Date: Sheet

5

4

3

2

Date: Sheet

Project Name:

XM2_MB D

1

XM2

of

440Friday, January 15, 2010

5

U8F

AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26 AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27 AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26

Y35 Y34 Y33 Y32 Y31 Y30 Y29 Y28 Y27 Y26 V35 V34 V33 V32 V31 V30 V29 V28 V27 V26 U35 U34 U33 U32 U31 U30 U29 U28 U27 U26 R35 R34 R33 R32 R31 R30 R29 R28 R27 R26 P35 P34 P33 P32 P31 P30 P29 P28 P27 P26

U8F

VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98 VCC99 VCC100

PZ98927-3641-01F

1.1V RAIL POWER

CPU CORE SUPPLY

POWER

PROC_DPRSLPVR

CPU VIDS

VTT_SELECT

VCC_SENSE

VSS_SENSE_VTT

SENSE LINES

VTT0_1 VTT0_2 VTT0_3 VTT0_4 VTT0_5 VTT0_6 VTT0_7 VTT0_8

VTT0_9 VTT0_10 VTT0_11 VTT0_12 VTT0_13 VTT0_14 VTT0_15 VTT0_16 VTT0_17 VTT0_18 VTT0_19 VTT0_20 VTT0_21 VTT0_22 VTT0_23 VTT0_24 VTT0_25 VTT0_26 VTT0_27 VTT0_28 VTT0_29 VTT0_30 VTT0_31 VTT0_32

VTT0_33 VTT0_34 VTT0_35 VTT0_36 VTT0_37 VTT0_38 VTT0_39 VTT0_40 VTT0_41 VTT0_42 VTT0_43 VTT0_44

PSI#

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

ISENSE

VSS_SENSE

VTT_SENSE

AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15

H_PSI#

AN33

VID0

AK35

VID1

AK33

VID2

AK34

VID3

AL35

VID4

AL33

VID5

AM33

VID6

AM35

PM_DPRSLPVR_R DPRSLPVR

AM34

G15

AN35

AJ34 AJ35

B15 A15

TP3TP3

Note: Place A and B near CPU Route VCCSENSE and VSSENSE trace at

27.4 ohms, 7 mils spacing.

CPU Core Power

+VCC_CORE

D D

C C

B B

AUBURNDALE PROCESSOR (POWER)

A A

5

C302

C302 10U

10U

C303

C303 10U

10U

A

B

4

C298

C298 10U

10U

C300

C300 10U

10U

C295

C295 22U

22U

+1.05V_RUN_VTT

C63

C69

22U

H_PSI# 29

VID0 29 VID1 29 VID2 29 VID3 29 VID4 29 VID5 29 VID6 29

I_MON 29

VTT_SENSE 31 VSS_SENSE_VTT 31

4

C33

C33 10U

10U

C108

C108 *10U_NC

*10U_NC

C313

C313 22U

22U

R175 0R175 0

+1.05V_RUN_VTT

C299

C28

10U

C327

C327 *10U_NC

*10U_NC

C103

C103 22U

22U

+

C347

C347 330U/2.5V

330U/2.5V

7343

+1.05V_RUN_VTT

+VCC_CORE

12

R57

R57 100

100

1%

12

R55

R55 100

100

1%

AUBURNDALE/CLARKSFIELD PROCESSOR (GRAPHICS POWER)

U8G

AT21

VAXG1

AT19

VAXG2

AT18

VAXG3

AT16

VAXG4

AR21

VAXG5

AR19

VAXG6

AR18

VAXG7

AR16

VAXG8

AP21

VAXG9

AP19

VAXG10

AP18

VAXG11

AP16

VAXG12

AN21

+VCC_GFX_CORE

C123

C352

10U/6.3V

0805

C344

C134

22U/6.3V

0805

+1.05V_RUN_VTT

C296

C307

22U

C32

C80

22U

VCCSENSE 29 VSSSENSE 29

Note: For Validating IMVP VR R483 should be STUFF and R2N1 NO_STUFF

C95

C95 22U

22U

C297

C297 22U

22U

DPRSLPVR 29

AN19 AN18

AN16 AM21 AM19 AM18 AM16

AL21

AL19

AL18

AL16 AK21 AK19 AK18 AK16

AJ21

AJ19

AJ18

AJ16 AH21 AH19 AH18 AH16

J24 J23

H25

K26

J27 J26

J25 H27 G28 G27 G26 F26 E26 E25

VID0 VID1 VID2 VID3 VID4 VID5 VID6 DPRSLPVR H_PSI#

VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36

VTT1_45 VTT1_46 VTT1_47

VTT1_48 VTT1_49 VTT1_50 VTT1_51 VTT1_52 VTT1_53 VTT1_54 VTT1_55 VTT1_56 VTT1_57 VTT1_58

PZ98927-3641-01F

3

GRAPHICS

FDI PEG & DMI

R2111KR211 1K

R212

R212 *1K_NC

*1K_NC

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

GFX_DPRSLPVR

GRAPHICS VIDs

POWER

DDR3 - 1.5V RAILS

1.1V1.8V

+1.05V_RUN_VTT

R2071KR207

R2091KR209

1K

R208

R210

*1K_NC

VAXG_SENSE

GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3] GFX_VID[4] GFX_VID[5] GFX_VID[6]

GFX_VR_EN

GFX_IMON

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18

VTT0_59 VTT0_60 VTT0_61 VTT0_62

VTT1_63 VTT1_64 VTT1_65 VTT1_66 VTT1_67 VTT1_68

VCCPLL1 VCCPLL2 VCCPLL3

R203

R203 *1K_NC

*1K_NC

R2041KR204 1K

AR22 AT22

AM22 AP22 AN22 AP23 AM23 AP24 AN24

AR25 AT25 AM24

AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1

P10 N10 L10 K10

J22 J20 J18 H21 H20 H19

L26 L27 M26

R201

R201 *1K_NC

*1K_NC

R2021KR202 1K

R1991KR199 1K

R200

R200 *1K_NC

*1K_NC

VCC_AXG_SENSE 34 VSS_AXG_SENSE 34

GFX_VID0 34 GFX_VID1 34 GFX_VID2 34 GFX_VID3 34 GFX_VID4 34 GFX_VID5 34 GFX_VID6 34

C1121UC112

C551UC55

1U

C106

C106 22U

22U

+1.05V_RUN_VTT

C306

C306 22U

22U

C571UC57

C561UC56

1U

R195

R1861KR186

*1K_NC

1K

R1961KR196

R187

1K

*1K_NC

2

R273 4.7KR273 4.7K

R71 *1K_NCR71 *1K_NC

+1.5V_SUS_CPU

C621UC62

C1131UC113

C491UC49

1U

S3 Power reduce

+1.05V_RUN_VTT

C79

C104

10U

+1.8V_RUN

C66

C58

22U

4.7U

C109

C109 22U

22U

C330

C330 22U

22U

1U

C52

2.2U

S3 Power reduce

+1.5V_SUS_CPU +1.5V_SUS

R190

R190 *1K_NC

*1K_NC

R1911KR191 1K

+1.5V_SUS_CPU +1.5V_SUS

C68 0.1UC68 0.1U C53 0.1UC53 0.1U C61 0.1UC61 0.1U C64 0.1UC64 0.1U

2

GFX_EN 34

GFX_IMON 34

+

C83

C83 330U

330U

7343

2.5

R41 *0_NCR41 *0_NC

1 2 1 2 1 2 1 2

876

9

2

351

R56 220R56 220

1

+VCC_CORE

C76

C98

C101 22U

22U

C329

C329 22U

22U

C323

C323 22U

22U

C321

C321 22U

22U

C305

C305 *10U_NC

*10U_NC

4

Q17

FDMS7670

R47 0R47 0

12

C105

0.1U

16

12

Title

CPU 3/4(POWER)

Size Document Number Rev

Date: Sheet

22U

C315

C319

22U

C318

C324

C328

22U

C311

C311 22U

22U

3

Quanta Computer Inc.

C328

22U

C312

C73

22U

C78

C89

*10U_NC

2

1

Q19

BSS138-7-F

Project Name:

XM2_MB D

1

C97

C72

C101

C98

22U

C326

C325

22U

C308

C75

22U

C74

C99

22U

C77

C77 *10U_NC

*10U_NC

PS_S3CNTRL_S 7

PS_S3CNTRL 7,13,30

XM2

540Friday, January 15, 2010

C316

C316 22U

22U

C100

C100 22U

22U

of

C310

C310 22U

22U

C309

C309 22U

22U

C314

C314 22U

22U

C102

C102 22U

22U

VSS

5

U8I

K27

VSS161

K9

VSS162

K6

VSS163

K3

VSS164

J32

VSS165

J30

VSS166

J21

VSS167

J19

VSS168

H35

VSS169

H32

VSS170

H28

VSS171

H26

VSS172

H24

VSS173

H22

VSS174

H18

VSS175

H15

VSS176

H13

VSS177

H11

VSS178

H8

VSS179

H5

VSS180

H2

VSS181

G34

VSS182

G31

VSS183

G20

VSS184

G9

VSS185

G6

VSS186

G3

VSS187

F30

VSS188

F27

VSS189

F25

VSS190

F22

VSS191

F19

VSS192

F16

VSS193

E35

VSS194

E32

VSS195

E29

VSS196

E24

VSS197

E21

VSS198

E18

VSS199

E13

VSS200

E11

VSS201

E8

VSS202

E5

VSS203

E2

VSS204

D33

VSS205

D30

VSS206

D26

VSS207

D9

VSS208

D6

VSS209

D3

VSS210

C34

VSS211

C32

VSS212

C29

VSS213

C28

VSS214

C24

VSS215

C22

VSS216

C20

VSS217

C19

VSS218

C16

VSS219

B31

VSS220

B25

VSS221

B21

VSS222

B18

VSS223

B17

VSS224

B13

VSS225

B11

VSS226

B8

VSS227

B6

VSS228

B4

VSS229

A29

VSS230

A27

VSS231

A23

VSS232

A9

VSS233

PZ98927-3641-01F

VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30

AUBURNDALE/CLARKSFIELD PROCESSOR (GND) AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)

U8H

AT20

VSS1

AT17

VSS2

AR31

VSS3

AR28

VSS4

AR26

VSS5

AR24

VSS6

AR23

VSS7

AR20

VSS8

AR17

VSS9

AR15

VSS10

AR12

VSS11

AR9

VSS12

AR6

AP20 AP17 AP13 AP10

AN34 AN31 AN23 AN20 AN17 AM29 AM27 AM25 AM20 AM17 AM14 AM11

AL34 AL31 AL23 AL20 AL17 AL12

AK29 AK27 AK25 AK20 AK17

AJ31 AJ23 AJ20 AJ17 AJ14 AJ11

AH35 AH34 AH33 AH32 AH31 AH30 AH29 AH28 AH27 AH26 AH20 AH17 AH13

AG10

AE35

AR3

AP7 AP4 AP2

AM8 AM5 AM2

AL9 AL6 AL3

AJ8 AJ5 AJ2

AH9 AH6 AH3

AF8 AF4 AF2

VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80

PZ98927-3641-01F

D D

C C

B B

VSS

NCTF

4

VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7

AT35 AT1 AR34 B34 B2 B1 A35

TP38TP38 TP33TP33 TP32TP32

3

U8E

AP25

RSVD1

AL25

RSVD2

AL24

RSVD3

AL22

RSVD4

AJ33

RSVD5

AG9

RSVD6

M27

RSVD7

L28

RSVD8

CFG0

CFG3 CFG4

CFG7

AM30 AM28 AP31

AL32

AL30 AM31 AN29 AM32 AK32 AK31 AK28

AJ28 AN30 AN32

AJ32

AJ29

AJ30 AK30

J17 H17 G25 G17

E31

E30

H16

B19

A19

A20

B20

U9 T9

AC9 AB9

C1 A3

J29

J28

A34

A33 C35

B35

SA_DIMM_VREF SB_DIMM_VREF RSVD11 RSVD12 RSVD13 RSVD14

CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] CFG[16] CFG[17] RSVD_TP_86

RSVD15 RSVD16

RSVD17 RSVD18

RSVD19 RSVD20

RSVD21 RSVD22

RSVD_NCTF_23 RSVD_NCTF_24

RSVD26 RSVD27

RSVD_NCTF_28 RSVD_NCTF_29

RSVD_NCTF_30 RSVD_NCTF_31

PZ98927-3641-01F

TP2TP2 TP1TP1

TP30TP30 TP31TP31

RSVD_NCTF_37

RSVD_NCTF_40 RSVD_NCTF_41

RSVD_NCTF_42 RSVD_NCTF_43

RSVD_NCTF_54 RSVD_NCTF_55 RSVD_NCTF_56 RSVD_NCTF_57

RESERVED

RSVD32 RSVD33

RSVD34 RSVD35

RSVD36

RSVD38 RSVD39

RSVD45 RSVD46 RSVD47 RSVD48 RSVD49 RSVD50 RSVD51 RSVD52 RSVD53

RSVD58

RSVD_TP_59 RSVD_TP_60

RSVD62 RSVD63 RSVD64 RSVD65

SA_CK[2] SA_CK#[2] SA_CKE[2] SA_CS#[2]

SA_ODT[2]

SA_CK[3] SA_CK#[3] SA_CKE[3] SA_CS#[3]

SA_ODT[3]

SB_CK[2] SB_CK#[2] SB_CKE[2] SB_CS#[2]

SB_ODT[2]

SB_CK[3] SB_CK#[3] SB_CKE[3] SB_CS#[3]

SB_ODT[3]

2

AJ13 AJ12

AH25 AK26

AL26 AR2

AJ26 AJ27

AP1 AT2

AT3 AR1

AL28 AL29 AP30 AP32 AL27 AT31 AT32 AP33 AR33 AT33 AT34 AP35 AR35 AR32

E15 F15 A2

KEY

D15 C15 AJ15 AH15

AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3

V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9

AP34

VSS

TP12TP12 TP13TP13

TP39TP39

1

CFG4

R63 *3.01K_NCR63 *3.01K_NC

CFG0

The Clarkfield processor's PCI Express interface may not meet PCI Express 2.0 jitter specifications. Intel recommends placing a 3.01K +/- 5% pull down resistor to VSS on CFG[7] pin for both rPGA and BGA components. This pull down resistor should be removed when this issue is fixed.

A A

5

CFG3 CFG7

R66 *3.01K_NCR66 *3.01K_NC R58 *3.01K_NCR58 *3.01K_NC R60 *3.01K_NCR60 *3.01K_NC

4

(Display Port Presence)

CFG0 (PCI-Epress Configuration Select)

CFG3 (PCI-Epress Static Lane Reversal)

CFG7 Clarksfield (only for early samples pre-ES1)

Disabled; No Physical Display Port attached to Embedded Diplay Port

10

Single PEG

Normal Operation Lane Numbers Reversed

Common motherboard design For early samples pre-ES1 CFD

3

Enabled; An external Display port device is connected to the Embedded Display port

Bifurcation enabled

Quanta Computer Inc.

Project Name:

Title

CPU 4/4( GND_RESV)

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Project Name:

XM2_MB D

1

XM2

of

640Friday, January 15, 2010

5

4

3

2

1

IBEX PEAK-M (DMI,FDI,GPIO)

U16C

PM_BATLOW#

PM_RI#

BC24

DMI0RXN

BJ22

DMI1RXN

AW20

DMI2RXN

BJ20

DMI3RXN

BD24

DMI0RXP

BG22

DMI1RXP

BA20

DMI2RXP

BG20

DMI3RXP

BE22

DMI0TXN

BF21

DMI1TXN

BD20

DMI2TXN

BE18

DMI3TXN

BD22

DMI0TXP

BH21

DMI1TXP

BC20

DMI2TXP

BD18

DMI3TXP

BH25

DMI_ZCOMP

BF25

DMI_IRCOMP

T6

SYS_RESET#

M6

SYS_PWROK

B17

PWROK

K5

MEPWROK

A10

LAN_RST#

D9

DRAMPWROK

C16

RSMRST#

M1

SUS_PWR_ACK / GPIO30

P5

PWRBTN#

P7

ACPRESENT / GPIO31

A6

BATLOW# / GPIO72

F14

RI#

IbexPeak-M_Rev0_9

CLKRUN# LCD_DDCDAT LCD_DDCCLK L_CTRL_CLK L_CTRL_DATA XDP_DBRESET#

DMI

FDI

DMI

FDI

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

System Power Management

R298 8.2KR298 8.2K R124 2.2KR124 2.2K R123 2.2KR123 2.2K R129 10KR129 10K R128 10KR128 10K R120 10KR120 10K

DMI_RXN03 DMI_RXN13 DMI_RXN23 DMI_RXN33

DMI_RXP03

D D

PCH_PWRGD20

C C

PM_DRAM_PWRGD3

PCH_RSMRST#20

SUS_PWR_ACK20

SIO_PWRBTN#20

AC_PRESENT20

B B

DMI_RXP13 DMI_RXP23 DMI_RXP33

DMI_TXN03 DMI_TXN13 DMI_TXN23 DMI_TXN33

DMI_TXP03 DMI_TXP13 DMI_TXP23 DMI_TXP33

+1.05V_RUN

PCH_PWRGD PWROK

PCH_RSMRST# PCH_LAN_RST# PCH_PWRGD

R91 49.9

1%

R133 0R133 0

R168 0R168 0

R184 0R184 0

R194 10KR194 10K R189 10KR189 10K R183 10KR183 10K

DMI_COMP

XDP_DBRESET#

SYS_PWROK_R

MEPWROK

PCH_LAN_RST#

PCH_RSMRST#

12 12

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7

FDI_INT FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1

WAKE#

SLP_S4#

SLP_S3#

SLP_M#

TP23

PMSYNCH

SLP_LAN#

+3.3V_RUN

12 12

BA18 BH17 BD16 BJ16 BA16 BE14 BA14 BC12

BB18 BF17 BC16 BG16 AW16 BD14 BB14 BD12

BJ14 BF13 BH13 BJ12 BG14

J12

Y1

P8

F3

E4

H7

P12

K8

N2

BJ10

F6

PCIE_WAKE#

CLKRUN#

SLP_S5#_R

PM_RI# PCIE_WAKE# PM_BATLOW#

R145 0R145 0

R126 0R126 0

FDI_TXN0 3 FDI_TXN1 3 FDI_TXN2 3 FDI_TXN3 3 FDI_TXN4 3 FDI_TXN5 3 FDI_TXN6 3 FDI_TXN7 3

FDI_TXP0 3 FDI_TXP1 3 FDI_TXP2 3 FDI_TXP3 3 FDI_TXP4 3 FDI_TXP5 3 FDI_TXP6 3 FDI_TXP7 3

FDI_INT 3 FDI_FSYNC0 3 FDI_FSYNC1 3 FDI_LSYNC0 3 FDI_LSYNC1 3

PCIE_WAKE# 21

CLKRUN# 20

TP22TP22

TP51TP51

TP23TP23

SIO_SLP_S3#

TP46TP46

PM_SYNC 3

TP24TP24

R181 10KR181 10K R137 1KR137 1K R152 8.2KR152 8.2K

T3

+3.3V_SUS

R100 2.37K/FR100 2.37K/F

PADT2PAD

PADT1PAD

PAD

12 12

PANEL_BKEN ENVDD

LCD_DDCCLK LCD_DDCDAT

L_CTRL_CLK L_CTRL_DATA

INT_TXLOUTN3

INT_TXLOUTP3

INT_TXUOUTN3

INT_TXUOUTP3

R115

R115 1K

1K

0.5%

PANEL_BKEN20

ENVDD16

BIA_PWM16

LCD_DDCCLK16 LCD_DDCDAT16

LVDS_VBG INT_HDMI_SDA

PADT3PAD

INT_TXLCLKOUTN16 INT_TXLCLKOUTP16

INT_TXLOUTN016 INT_TXLOUTN116 INT_TXLOUTN216

T2

INT_TXLOUTP016 INT_TXLOUTP116 INT_TXLOUTP216

T1

INT_TXUCLKOUTN16 INT_TXUCLKOUTP16

INT_TXUOUTN016 INT_TXUOUTN116 INT_TXUOUTN216

T12

INT_TXUOUTP016 INT_TXUOUTP116 INT_TXUOUTP216

T13

SIO_SLP_S5# 20

SIO_SLP_S3# 20

SLP_M# 20

PANEL_BKEN

R127 100KR127 100K

ENVDD

R131 100KR131 100K

IBEX PEAK-M (LVDS,DDI)

U16D

T48 T47

Y48

AB48

Y45

AB46

V48

AP39 AP41

AT43 AT42

AV53 AV51

BB47 BA52 AY48 AV47

BB48 BA50 AY49 AV48

AP48 AP47

AY53 AT49 AU52 AT53

AY51 AT48 AU50 AT51

AA52 AB53 AD53

V51 V53

Y53 Y51

AD48 AB51

IbexPeak-M_Rev0_9

L_BKLTEN L_VDD_EN

L_BKLTCTL L_DDC_CLK

L_DDC_DATA L_CTRL_CLK

L_CTRL_DATA LVD_IBG

LVD_VBG LVD_VREFH

LVD_VREFL

LVDSA_CLK# LVDSA_CLK

LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3

LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3

LVDSB_CLK# LVDSB_CLK

LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3

LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3

CRT_BLUE CRT_GREEN CRT_RED

CRT_DDC_CLK CRT_DDC_DATA

CRT_HSYNC CRT_VSYNC

DAC_IREF CRT_IRTN

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_STALLN SDVO_STALLP

SDVO_CTRLCLK

SDVO_CTRLDATA

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

CRT

SDVO_INTN SDVO_INTP

DDPB_AUXN DDPB_AUXP

DDPB_HPD

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_AUXN

DDPC_AUXP

DDPC_HPD

DDPC_0N

DDPC_0P

DDPC_1N

DDPC_1P

DDPC_2N

DDPC_2P

DDPC_3N

DDPC_3P

DDPD_AUXN

DDPD_AUXP

DDPD_HPD

DDPD_0N

DDPD_0P

DDPD_1N

DDPD_1P

DDPD_2N

DDPD_2P

DDPD_3N

DDPD_3P

BJ46 BG46

BJ48 BG48

BF45 BH45

T51 T53

BG44 BJ44 AU38

BD42 BC42 BJ42 BG42 BB40 BA40 AW38 BA38

Y49 AB49

BE44 BD44 AV40

BE40 BD40 BF41 BH41 BD38 BC38 BB36 BA36

U50 U52

BC46 BD46 AT38

BJ40 BG40 BJ38 BG38 BF37 BH37 BE36 BD36

INT_HDMI_SCL

INT_HDMI_HPD INT_HDMI_TXDN2

INT_HDMI_TXDP2 INT_HDMI_TXDN1 INT_HDMI_TXDP1 INT_HDMI_TXDN0 INT_HDMI_TXDP0 INT_HDMI_TXCN INT_HDMI_TXCP

INT_DP_SCL INT_DP_SDA

INT_DP_HPD

INT_HDMI_SCL 18 INT_HDMI_SDA 18

C143 0.1UC143 0.1U C146 0.1UC146 0.1U C141 0.1UC141 0.1UR91 49.9 C142 0.1UC142 0.1U C147 0.1UC147 0.1U C149 0.1UC149 0.1U C170 0.1UC170 0.1U C169 0.1UC169 0.1U

INT_DP_SCL 21 INT_DP_SDA 21

INT_AUX_SINKN 21 INT_AUX_SINKP 21

INT_DP_TXN0 21 INT_DP_TXP0 21 INT_DP_TXN1 21 INT_DP_TXP1 21 INT_DP_TXN2 21 INT_DP_TXP2 21 INT_DP_TXN3 21 INT_DP_TXP3 21

Display port D

INT_HDMI_HPD

INT_DP_HPD

+3.3V_RUN

INT_HDMI_TXDN2_C 18 INT_HDMI_TXDP2_C 18 INT_HDMI_TXDN1_C 18 INT_HDMI_TXDP1_C 18 INT_HDMI_TXDN0_C 18 INT_HDMI_TXDP0_C 18 INT_HDMI_TXCN_C 18 INT_HDMI_TXCP_C 18

+5V_RUN

Q34

2

2N7002K-T1-E3

+5V_RUN

2

1 2 1 2 1 2 1 2

3

Q32

Q32 2N7002K-T1-E3

2N7002K-T1-E3

3

1

R305 2.2KR305 2.2K R304 2.2KR304 2.2K R117 2.2KR117 2.2K R116 2.2KR116 2.2K

R250

R250 100K

100K

R230

R230 100K

100K

INT_HDMI_SCL INT_HDMI_SDA INT_DP_SCL INT_DP_SDA

INT_HDMI_HPD_Q 18

INT_DP_HPD_R 21

S3 Power reduce

SIO_SLP_S3# PS_S3CNTRL

A A

5

R130

R130 *10K_NC

*10K_NC

2

+5V_ALW

12

3

1

4

R59

R59 10K

10K

PS_S3CNTRL

Q23

Q23 BSS138-7-F

BSS138-7-F

Q18

2

+PWR_SRC

R50

R50 100K

100K

3

1

C107

0.01U

25

PS_S3CNTRL_S 5PS_S3CNTRL 5,13,30

Quanta Computer Inc.

Project Name:

Title

PCH 1/6 (DMI_VIDEO)

Size Document Number Rev

Date: Sheet

3

2

Date: Sheet

Project Name:

XM2_MB D

1

XM2

of

740Friday, January 15, 2010

5

+RTC_CELL

4

3

2

1

+3.3V_RUN

D D

R308 *8.2K_NCR308 *8.2K_NC

SPKR

R197 20KR197 20K

R1851MR185 1M

R193 20KR193 20K

C226

C226 1uF

1uF

C227

C227 1uF

1uF

No Reboot Strap

Low=Default

SPKR

High=No Reboot

INTVRMEN - Integrated SUS 1.1V VRM Enable

ICH_AZ_CODEC_BITCLK21

C C

ICH_AZ_CODEC_SYNC21 ICH_AZ_CODEC_RST#20,21 ICH_AZ_CODEC_SDOUT21

Place all series terms close to PCH except for SDIN input lines,which should be close to source.Placement of R773, R775, R776 & R777 should equal distance to the T split trace point. Basically, keep the same distance from T for all series termination resistors.

R310 51R310 51

PCH_JTAG_TCK_BUF

R159 33R159 33

C216

C216 *27P_NC

*27P_NC

50

R170 33R170 33 R160 33R160 33 R169 33R169 33

Note : Only pop when PCH is production stage & need "JTAG boundary Scan". Remember to depop XDP side Res.

ACZ_BIT_CLK

ACZ_SYNC ACZ_RST# ACZ_SDOUT

Flash Descriptor Security Override

B B

GPIO33

Low = Enabled High = Disabled

High - Enable Internal VRs

0 ohm resistor within 0.5 inch of pin

Cap values depend on Xtal

C217

18PF

W1

R157

R157 10M

10M

32.768KHZW132.768KHZ

18PF

1 2

R192 330KR192 330K

SPKR21

ICH_AZ_CODEC_SDIN021

PCH_GPIO3320

KB_LED_DET24

TP47TP47 TP48TP48 TP50TP50 TP49TP49

PCH_JTAG_TCK_BUF PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_RST#

SPI_CLK19 SPI_CS0#19

TP45TP45

SPI_SI19

SPI_SO19

TP26TP26 TP28TP28 TP27TP27

C218

+RTC_CELL

Layout need to place at the same side of PCB

IBEX PEAK-M (HDA,JTAG,SATA)

U16A

RTC_X1 RTC_X2

RTC_RST# SRTC_RST# SM_INTRUDER# PCH_INVRMEN

ACZ_BIT_CLK ACZ_SYNC SPKR ACZ_RST#

ACZ_SDOUT

PCH_GPIO33

U16A

B13

RTCX1

D13

RTCX2

C14

RTCRST#

D17

SRTCRST#

A16

INTRUDER#

A14

INTVRMEN

A30

HDA_BCLK

D29

HDA_SYNC

P1

SPKR

C30

HDA_RST#

G30

HDA_SDIN0

F30

HDA_SDIN1

E32

HDA_SDIN2

F32

HDA_SDIN3

B29

HDA_SDO

H32

HDA_DOCK_EN# / GPIO33

J30

HDA_DOCK_RST# / GPIO13

M3

JTAG_TCK

K3

JTAG_TMS

K1

JTAG_TDI

J2

JTAG_TDO

J4

JTAG_RST#

BA2

SPI_CLK

AV3

SPI_CS0#

AY3

SPI_CS1#

AY1

SPI_MOSI

AV1

SPI_MISO

IbexPeak-M_Rev0_9

RTCIHDA

SPI JTAG

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

FWH4 / LFRAME#

LDRQ1# / GPIO23

LPC

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN SATA1RXP SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP SATA4TXN

SATA

SATA4TXP SATA5RXN

SATA5RXP SATA5TXN SATA5TXP

SATAICOMPO

SATAICOMPI

SATALED#

SATA0GP / GPIO21 SATA1GP / GPIO19

LDRQ0#

SERIRQ

D33 B33 C32 A32

C34 A34

F34 AB9

AK7 AK6 AK11 AK9

AH6 AH5 AH9 AH8

AF11 AF9 AF7 AF6

AH3 AH1 AF3 AF1

AD9 AD8 AD6 AD5

AD3 AD1 AB3 AB1

AF16 AF15

T3

Y9 V1

IRQ_SERIRQ

1 2 1 2

Close to PCH <500mil

R105 37.4 1%R105 37.4 1%

R303 10KR303 10K

SATAICOMPO

R112 10KR112 10K R301 10KR301 10K

LPC_LAD0 20,21 LPC_LAD1 20,21 LPC_LAD2 20,21 LPC_LAD3 20,21

LPC_LFRAME# 20,21

TP29TP29 TP25TP25

IRQ_SERIRQ 20

SATA_RX0- 23

SATA_RX0+ 23

SATA_TX0+ 23

SATA_RX1+ 23

SATA_TX1+ 23

ESATA_ITX_DRX_P4 21

ESATA_IRX_DTX_P4_C 21

1 2

HDD

SATA_TX0- 23

SATA_RX1- 23

ODD

SATA_TX1- 23

ESATA_ITX_DRX_N4 21 ESATA_IRX_DTX_N4_C 21

SATA_RX5- 23

SATA_RX5+ 23

SATA_TX5- 23 SATA_TX5+ 23

eSATA

HDD2

+1.05V_RUN

+3.3V_RUN

SATA_ACT# 25

+3.3V_RUN

R136 *1K_NCR136 *1K_NC

PCH_GPIO33

(Internal 20K/F pull high to +3.3V_RUN)

Note : GPIO33 is a signal used for Flash Descriptor Security Override/ME Debug Mode.This signal should be only asserted lowthrough an external pull-down in manufacturing or debug environments ONLY.

A A

Quanta Computer Inc.

Project Name:

Title

PCH 2/6 (SATA_SPI)

Size Document Number Rev

Date: Sheet

5

4

3

2

Date: Sheet

Project Name:

XM2_MB D

1

XM2

of

840Friday, January 15, 2010

5

4

3

2

1

IBEX PEAK-M (PCI,USB,NVRAM)

C135 0.1U/10VC135 0.1U/10V

PCIE_TX1-21

PCIE_TX6-/GLAN_TX-21 PCIE_TX6+/GLAN_TX+21

NV_ALE 10 NV_CLE 10

USBP0- 21 USBP0+ 21 USBP1- 22 USBP1+ 22 USBP2- 22 USBP2+ 22 USBP3- 22 USBP3+ 22 USBP4- 21 USBP4+ 21 USBP5- 21 USBP5+ 21

USBP8- 22 USBP8+ 22

USBP11- 16 USBP11+ 16 USBP12- 25 USBP12+ 25

R158 22.6/FR158 22.6/F

+3.3V_SUS

+3.3V_RUN

PCIE_TX1+21 PCIE_TX2-21

PCIE_TX2+21 PCIE_TX5-17

PCIE_TX5+17

PUSB/ESATA

Left Side USB Left Side USB Left Side USB

Mini Card (WLAN) Mini Card (WWAN)

BT

Camera

Touch Screen Module

OC0# 21,22 OC1# 22

R173 10KR173 10K R144 10KR144 10K R155 10KR155 10K R125 10KR125 10K R146 10KR146 10K

R300 10KR300 10K

U16E

H40

AD0

N34

AD1

C44

AD2

A38

AD3

C36

AD4

J34

AD5

A40

AD6

D45

OC5# OC6#

OC4#

AD7

E36

AD8

H48

AD9

E40

AD10

C40

AD11

M48

AD12

M45

AD13

F53

AD14

M40

AD15

M43

AD16

J36

AD17

K48

AD18

F40

AD19

C42

AD20

K46

AD21

M51

AD22

J52

AD23

K51

AD24

L34

AD25

F42

AD26

J40

AD27

G46

AD28

F44

AD29

M47

AD30

H36

AD31

J50

C/BE0#

G42

C/BE1#

H47

C/BE2#

G34

C/BE3#

G38

PIRQA#

H51

PIRQB#

B37

PIRQC#

A44

PIRQD#

F51

REQ0#

A46

REQ1# / GPIO50

B45

REQ2# / GPIO52

M53

REQ3# / GPIO54

F48

GNT0#

K45

GNT1# / GPIO51

F36

GNT2# / GPIO53

H53

GNT3# / GPIO55

B41

PIRQE# / GPIO2

K53

PIRQF# / GPIO3

A36

PIRQG# / GPIO4

A48

PIRQH# / GPIO5

K6

PCIRST#

E44

SERR#

E50

PERR#

A42

IRDY#

H44

PAR

F46

DEVSEL#

C46

FRAME#

D49

PLOCK#

D41

STOP#

C48

TRDY#

M7

PME#

D5

PLTRST#

N52

CLKOUT_PCI0

P53

CLKOUT_PCI1

P46

CLKOUT_PCI2

P51

CLKOUT_PCI3

P48

CLKOUT_PCI4

IbexPeak-M_Rev0_9

BT_DET# PCH_IRQH_GPIO2 PCI_PIRQF# PCI_PIRQH#

6 7 8 9

10

NV_DQ0 / NV_IO0 NV_DQ1 / NV_IO1 NV_DQ2 / NV_IO2 NV_DQ3 / NV_IO3 NV_DQ4 / NV_IO4 NV_DQ5 / NV_IO5 NV_DQ6 / NV_IO6 NV_DQ7 / NV_IO7 NV_DQ8 / NV_IO8

NV_DQ9 / NV_IO9 NV_DQ10 / NV_IO10 NV_DQ11 / NV_IO11

NVRAM

NV_DQ12 / NV_IO12 NV_DQ13 / NV_IO13 NV_DQ14 / NV_IO14 NV_DQ15 / NV_IO15

PCI

NV_WR#0_RE# NV_WR#1_RE#

USB

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC6# / GPIO10 OC7# / GPIO14

R161 8.2KR161 8.2K R166 8.2KR166 8.2K R150 8.2KR150 8.2K R154 8.2KR154 8.2K

RP3

5

OC3#OC2#

4

OC0#

3

OC1#

2

OC7#

1

10P8R-8.2K

RP2

USB_MCARD1_DET# PCI_PIRQB# PCI_REQ0# PCI_TRDY# HDMI_PWR_CTRL

+3.3V_RUN

PCI_STOP# PCI_PIRQA# PCI_PIRQC# PCI_IRDY#

+3.3V_RUN

6 7 8 9

10

6 7 8 9

10

RP2

10P8R-8.2K

R163

10P8R-8.2K

D D

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

R143 22R143 22 R134 22R134 22

R141 22R141 22

4

5

PCI_REQ0# HDMI_PWR_CTRL LCD_SEL USB_MCARD1_DET#

PCI_GNT0# GNT#1

GNT3# PCH_IRQH_GPIO2

PCI_PIRQF# BT_DET# PCI_PIRQH#

PCI_SERR# PCI_PERR#

PCI_IRDY# PCI_DEVSEL#

PCI_FRAME# PCI_PLOCK# PCI_STOP#

PCI_TRDY#

PCI_PLTRST# CLK_LPC_DEBUG_R CLK_PCI_8502_R

CLK_PCI_FB_RCLK_PCI_FB

+3.3V_SUS

PLTRST# 3,17,20,21

C C

CLK_LPC_DEBUG21

B B

CLK_PCI_850220

Reserve capacitor pads for improving WWAN.

CLK_LPC_DEBUG CLK_PCI_8502

Non-iAMT

A A

PCI_PLTRST#

C215 0.047U

HDMI_PWR_CTRL18

T10T10

USB_MCARD1_DET#21

PCH_IRQH_GPIO223

BT_DET#22

T9T9

T7T7

C213 *27P_NCC213 *27P_NC

C211 *27P_NCC211 *27P_NC

Add Buffers as needed for Loading and fanout concerns.

+3.3V_SUS

5

U6

2

10

1

TC7SZ32FU(T5L,F,T)

NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3

NV_DQS0 NV_DQS1

NV_ALE NV_CLE

NV_RCOMP

NV_RB#

NV_WE#_CK0 NV_WE#_CK1

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P

USBP10N

USBP10P

USBP11N

USBP11P

USBP12N

USBP12P

USBP13N

USBP13P

USBRBIAS#

USBRBIAS

OC5# / GPIO9

+3.3V_RUN

+3.3V_SUS

4

5 4 3 2 1

AY9 BD1 AP15 BD8

AV9 BG8

AP7 AP6 AT6 AT9 BB1 AV6 BB3 BA4 BE4 BB6 BD6 BB7 BC8 BJ8 BJ6 BG6

BD3 AY6

AU2 AV7 AY8

AY5 AV11

BF5

H18 J18 A18 C18 N20 P20 J20 L20 F20 G20 A20 C20 M22 N22 B21 D21 H22 J22 E22 F22 A22 C22 G24 H24 L24 M24 A24 C24

B25 D25

N16 J16 F16 L16 E14 G16 F12 T15

LCD_SEL PCI_PIRQD#

PCI_FRAME#

PCI_SERR# PCI_DEVSEL# PCI_PLOCK# PCI_PERR#

USB_BIAS

OC0# OC1# OC2# OC3# OC4# OC5# OC6# OC7#

+3.3V_RUN

1 2

C136 0.1U/10VC136 0.1U/10V

1 2

C145 0.1U/10VC145 0.1U/10V

1 2

C144 0.1U/10VC144 0.1U/10V

1 2

C139 0.1U/10VC139 0.1U/10V

1 2

C140 0.1U/10VC140 0.1U/10V

1 2

C138 0.1U/10VC138 0.1U/10V

1 2

C137 0.1U/10VC137 0.1U/10V

1 2

CLK_PCIE_REQ3# MINI4CLK_REQ#

USB30_CLKREQ# CARD_CLK_REQ# LOM_CLKREQ#

MINI1CLK_REQ#

R309 10KR309 10K R139 *1K_NCR139 *1K_NC R135 *1K_NCR135 *1K_NC

Boot BIOS Strap

PCI_GNT0# GNT#1

00 0 1 11

1 0

PCIE_TXN1_C PCIE_TXP1_C

PCIE_TXN2_C PCIE_TXP2_C

PCIE_TXN5_C PCIE_TXP5_C

GLAN_TXN_C GLAN_TXP_C

Giga Bit LOM

WLAN

Card reader

WWAN

Giga Bit LOM

25MHz Clock

12

C195

27P/50V

MINI2CLK_REQ#

PCI_GNT0# GNT#1

Boot BIOS Location LPC Reserved (NAND) PCI SPI

3

Mini_WWAN

Mini_WLAN

Card reader

PCI-E port 7/8 are not support in HM55 . They are only in PM 55

Y1

123

25MHzY125MHz

PCIE_RX1-21 PCIE_RX1+21

PCIE_RX2-21 PCIE_RX2+21

PCIE_RX5-17 PCIE_RX5+17

PCIE_RX6-/GLAN_RX-21 PCIE_RX6+/GLAN_RX+21

CLK_PCIE_MINI1#21

CLK_PCIE_MINI121 MINI1CLK_REQ#21

CLK_PCIE_MINI2#17

CLK_PCIE_MINI217

CLK_PCIE_MINI3#21

CLK_PCIE_MINI321

CLK_PCIE_LOM#21

CLK_PCIE_LOM21 LOM_CLKREQ#21

XTAL25_IN

12

R1101MR110 1M

XTAL25_OUT

4

12

C193

C193 27P/50V

27P/50V

R149 *4.7K_NCR149 *4.7K_NC

A16 swap override Strap/Top-Block Swap Override jumper

GNT3#

IBEX PEAK-M (PCI-E,SMBUS,CLK)

U16B

BG30

PCIE_TXN1_C PCIE_TXP1_C

PCIE_TXN2_C PCIE_TXP2_C

PCIE_TXN5_C PCIE_TXP5_C

GLAN_TXN_C GLAN_TXP_C

CARD_CLK_REQ#

MINI1CLK_REQ#

MINI2CLK_REQ#

CLK_PCIE_REQ3#

MINI4CLK_REQ#

LOM_CLKREQ#

USB30_CLKREQ#

BF29 BH29

AW30

BA30 BC30 BD30

AU30 AT30 AU32 AV32

BA32 BB32 BD32 BE32

BF33 BH33 BG32

BA34

AW34

BC34 BD34

AT34 AU34 AU36 AV36

BG34 BG36

AK48 AK47

AM43 AM45

AM47 AM48

AH42 AH41

AM51 AM53

AK53 AK51

BJ30

BJ32

BJ34 BJ36

AJ50 AJ52

P9

U4

N4

A8

M9

H6

P13

IbexPeak-M_Rev0_9

SMBus/Pull-up

+3.3V_SUS

R182 10K/J_4R182 10K/J_4 R142 10K/J_4R142 10K/J_4 R122 10K/J_4R122 10K/J_4 R188 2.2K/J_4R188 2.2K/J_4 R172 2.2K/J_4R172 2.2K/J_4 R180 2.2K/J_4R180 2.2K/J_4 R167 2.2K/J_4R167 2.2K/J_4

GNT3#

Low = A16 swap override/Top-Block Swap Override enabled High = Default

PERN1 PERP1 PETN1 PETP1

PERN2 PERP2 PETN2 PETP2

PERN3 PERP3 PETN3 PETP3

PERN4 PERP4 PETN4 PETP4

PERN5 PERP5 PETN5 PETP5

PERN6 PERP6 PETN6 PETP6

PERN7 PERP7 PETN7 PETP7

PERN8 PERP8 PETN8 PETP8

CLKOUT_PCIE0N CLKOUT_PCIE0P

PCIECLKRQ0# / GPIO73

CLKOUT_PCIE1N CLKOUT_PCIE1P

PCIECLKRQ1# / GPIO18

CLKOUT_PCIE2N CLKOUT_PCIE2P

PCIECLKRQ2# / GPIO20

CLKOUT_PCIE3N CLKOUT_PCIE3P

PCIECLKRQ3# / GPIO25

CLKOUT_PCIE4N CLKOUT_PCIE4P

PCIECLKRQ4# / GPIO26

CLKOUT_PCIE5N CLKOUT_PCIE5P

PCIECLKRQ5# / GPIO44

CLKOUT_PEG_B_N CLKOUT_PEG_B_P

PEG_B_CLKRQ# / GPIO56

RSV_SMBALERT# RSV_SML0ALERT# RSV_SML1ALERT# PCH_SMBCLK PCH_SMBDATA SMB_CLK_ME0 SMB_DATA_ME0

2

PCI-E*

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SML1ALERT# / GPIO74

SMBus

SML1CLK / GPIO58

SML1DATA / GPIO75

Link

Controller

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N

PEG

CLKOUT_DP_N / CLKOUT_BCLK1_N CLKOUT_DP_P / CLKOUT_BCLK1_P

From CLK BUFFER

Clock Flex

CLKOUT_DMI_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_BCLK_N CLKIN_BCLK_P

CLKIN_DOT_96N CLKIN_DOT_96P

CLKIN_SATA_N / CKSSCD_N

CLKIN_SATA_P / CKSSCD_P

CLKIN_PCILOOPBACK

XCLK_RCOMP

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

RSV_SMBALERT#

B9

PCH_SMBCLK

H14

SMBCLK

SMBDATA

SML0CLK

SML0DATA

CL_CLK1 CL_DATA1 CL_RST1#

REFCLK14IN

XTAL25_IN

XTAL25_OUT

SMBCLK120

SMBDAT120

PCH_SMBDATA

C8

RSV_SML0ALERT#

J14

SMB_CLK_ME0

C6

SMB_DATA_ME0

G8

RSV_SML1ALERT#

M14

SMB_CLK_ME1

E10

SMB_DATA_ME1

G12

T13 T11

Non-iAMT

T9

R311 10KR311 10K

H1

AD43 AD45

AN4 AN2

AT1 AT3

AW24 BA24

AP3 AP1

F18 E18

AH13 AH12

P41

CLK_PCI_FB

J42

XTAL25_IN

AH51

XTAL25_OUT

AH53

XCLK_RCOMP

AF38

CLK_FLEX0

T45

CLK_FLEX1

P43

CLK_FLEX2

T42

CLK_FLEX3

N50

+3.3V_SUS

2

Q24 2N7002KQ24 2N7002K

3

+3.3V_SUS

2

Q25

3

Quanta Computer Inc.

Project Name:

Title

PCH 3/6 (PCI_SMBUS_CLK)

Size Document Number Rev

Date: Sheet

Project Name:

XM2_MB D

PCH_SMBCLK 21 PCH_SMBDATA 21

CLK_PCIE_3GPLL# 3 CLK_PCIE_3GPLL 3

CLK_BUF_SSCLK# 3 CLK_BUF_SSCLK 3

CLK_BUF_PCIE_3GPLLN 2 CLK_BUF_PCIE_3GPLLP 2

CLK_BUF_BCLKN 2 CLK_BUF_BCLKP 2

CLK_BUF_DREFCLKN 2 CLK_BUF_DREFCLKP 2

CLK_BUF_DREFSSCLKN 2 CLK_BUF_DREFSSCLKP 2

CLK_PCH_14M 2

Per EDS 1.0 support 33MHz and 14.31818MHz.

R107 90.9 1%R107 90.9 1%

T5T5

T6T6

T4T4

T8T8

R178

2.2K/J_4

SMB_CLK_ME1

1

R179

2.2K/J_4

2N7002K

SMB_DATA_ME1

1

XM2

940Friday, January 15, 2010

+1.05V_RUN

of

5

IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)

U16F

BMBUSY#

SIO_EXT_SMI#20 SIO_EXT_SCI#20

SIO_EXT_WAKE#20

D D

PCIE_MCARD2_DET#21 PCIE_MCARD1_DET#21

USB_MCARD2_DET#21

WLAN_RADIO_DIS#21

BT_RADIO_DIS#22

RST_GATE3

WWAN_RADIO_DIS#21

C C

B B

CPPE_N#17

SIO_EXT_SMI# SIO_EXT_SCI# SIO_EXT_WAKE# RSV_GPIO8 LAN_DISABLE# CR_WAKE# dGPU_HOLD_RST# GPIO17 PCIE_MCARD2_DET# PCIE_MCARD1_DET#_R GPIO27 TP_PCH_GPIO28 USB_MCARD2_DET# GPIO35 dGPU_PWR_EN# dGPU_PRSNT# WLAN_RADIO_DIS# BT_RADIO_DIS# GPIO45 RST_GATE WWAN_RADIO_DIS# CPPE_N# GPIO57

U16F

Y3

BMBUSY# / GPIO0

C38

TACH1 / GPIO1

D37

TACH2 / GPIO6

J32

TACH3 / GPIO7

F10

GPIO8

K9

LAN_PHY_PWR_CTRL / GPIO12

T7

GPIO15

AA2

SATA4GP / GPIO16

F38

TACH0 / GPIO17

Y7

SCLOCK / GPIO22

H10

MEM_LED / GPIO24

AB12

GPIO27

V13

GPIO28

M11

STP_PCI# / GPIO34

V6

SATACLKREQ# / GPIO35

AB7

SATA2GP / GPIO36

AB13

SATA3GP / GPIO37

V3

SLOAD / GPIO38

P3

SDATAOUT0 / GPIO39

H3

PCIECLKRQ6# / GPIO45

F1

PCIECLKRQ7# / GPIO46

AB6

SDATAOUT1 / GPIO48

AA4

SATA5GP / GPIO49

F8

GPIO57

A4

VSS_NCTF_1

A49

VSS_NCTF_2

A5

VSS_NCTF_3

A50

VSS_NCTF_4

A52

VSS_NCTF_5

A53

VSS_NCTF_6

B2

VSS_NCTF_7

B4

VSS_NCTF_8

B52

VSS_NCTF_9

B53

VSS_NCTF_10

BE1

VSS_NCTF_11

BE53

VSS_NCTF_12

BF1

VSS_NCTF_13

BF53

VSS_NCTF_14

BH1

VSS_NCTF_15

BH2

VSS_NCTF_16

BH52

VSS_NCTF_17

BH53

VSS_NCTF_18

BJ1

VSS_NCTF_19

BJ2

VSS_NCTF_20

BJ4

VSS_NCTF_21

BJ49

VSS_NCTF_22

BJ5

VSS_NCTF_23

BJ50

VSS_NCTF_24

BJ52

VSS_NCTF_25

BJ53

VSS_NCTF_26

D1

VSS_NCTF_27

D2

VSS_NCTF_28

D53

VSS_NCTF_29

E1

VSS_NCTF_30

E53

VSS_NCTF_31

IbexPeak-M_Rev0_9

4

MISC

CLKOUT_BCLK0_N / CLKOUT_PCIE8N CLKOUT_BCLK0_P / CLKOUT_PCIE8P

GPIO

CPU

NCTF

RSVD

CLKOUT_PCIE6N CLKOUT_PCIE6P

CLKOUT_PCIE7N CLKOUT_PCIE7P

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

TP10 TP11 TP12 TP13 TP14 TP15 TP16 TP17 TP18 TP19 NC_1 NC_2 NC_3 NC_4 NC_5

INIT3_3V#

TP24

TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9

AH45 AH46

AF48 AF47

U2

AM3 AM1 BG10 T1 BE10 BD10

BA22 AW22 BB22 AY45 AY46 AV43 AV45 AF13 M18 N18 AJ24 AK41 AK42 M32 N32 M30 N30 H12 AA23 AB45 AB38 AB42 AB41 T39

P6 C10

TP21TP21 TP18TP18

TP20TP20 TP19TP19

SIO_A20GATE

SIO_RCIN#

PCH_THRMTRIP#_R

SIO_A20GATE 20

CLK_CPU_BCLK# 3 CLK_CPU_BCLK 3 H_PECI 3 SIO_RCIN# 20 H_CPUPWRGD 3

3

R99 56R99 56

+1.05V_RUN_VTT

R9856R98

56

S3 Power reduce

H_THERM# 3

NV_ALE9 NV_CLE9

2

GPIO Pull-up/Pull-down

CR_WAKE# TP_PCH_GPIO28 GPIO45 RST_GATE GPIO57 LAN_DISABLE# RSV_GPIO8

CPPE_N# PCIE_MCARD2_DET# PCIE_MCARD1_DET#_R

SIO_EXT_SMI# SIO_EXT_SCI# SIO_EXT_WAKE#

dGPU_PWR_EN#

GPIO17 SIO_RCIN# SIO_A20GATE dGPU_HOLD_RST#

dGPU_PRSNT# BT_RADIO_DIS# USB_MCARD2_DET#

WLAN_RADIO_DIS# BMBUSY# WWAN_RADIO_DIS#

R121 1KR121 1K R118 10K/J_4R118 10K/J_4 R312 10K/J_4R312 10K/J_4 R313 10K/J_4R313 10K/J_4 R164 10K/J_4R164 10K/J_4 R156 10K/J_4R156 10K/J_4 R153 10K/J_4R153 10K/J_4

R294 10K/J_4R294 10K/J_4 R114 10K/J_4R114 10K/J_4 R171 10K/J_4R171 10K/J_4 R162 10K/J_4R162 10K/J_4 R165 10K/J_4R165 10K/J_4 R132 10K/J_4R132 10K/J_4

R106 10K/J_4R106 10K/J_4

R138 10K/J_4R138 10K/J_4 R302 10K/J_4R302 10K/J_4 R299 10K/J_4R299 10K/J_4 R295 10K/J_4R295 10K/J_4

R113 10K/J_4R113 10K/J_4 R306 10K/J_4R306 10K/J_4 R147 10K/J_4R147 10K/J_4

R296 10K/J_4R296 10K/J_4 R297 10K/J_4R297 10K/J_4 R111 10K/J_4R111 10K/J_4

+3.3V_SUS

+3.3V_RUN

SV_SET_UP 1-X High = Strong (Default)

R148 *1K_NCR148 *1K_NC

Integrated Clock Chip Enable

(Reserve to validate for future platforms)

RSV_GPIO8

Enable when sampled low Disable when sampled high

R119 10KR119 10K R108 *10K_NCR108 *10K_NC

R92 *8.2K_NCR92 *8.2K_NC R93 *8.2K_NCR93 *8.2K_NC

RSV_GPIO8

GPIO35 GPIO27

+V_NVRAM_VCCQ

1

DMI Termination Voltage

NV_CLE

Danbury Technology Enabled

NV_ALE

Set to Vcc when LOW Set to Vcc/2 when HIGH

High = Enable(Default) Low = Disable

A A

Quanta Computer Inc.

Project Name:

Title

PCH 4/6 (GPIO)

Size Document Number Rev

Date: Sheet

5

4

3

2

Date: Sheet

Project Name:

XM2_MB D

1

XM2

of

10 40Friday, January 15, 2010

5

U16G

C1991UC199

1U

C1741UC174 1U

+VCCAFDI_VRM

AB24 AB26 AB28 AD26 AD28 AF26 AF28 AF30 AF31 AH26 AH28 AH30 AH31 AJ30 AJ31

AK24

BJ24

AN20 AN22

AN23 AN24 AN26 AN28 BJ26 BJ28 AT26 AT28 AU26 AU28 AV26

AV28 AW26 AW28

BA26

BA28

BB26

BB28

BC26

BC28

BD26

BD28

BE26

BE28

BG26 BG28 BH27

AN30

AN31

AN35

AT22

BJ18 AM23

IbexPeak-M_Rev0_9

L19 10uHL19 10uH

L18 10uHL18 10uH

VCCCORE[1] VCCCORE[2] VCCCORE[3] VCCCORE[4] VCCCORE[5] VCCCORE[6] VCCCORE[7] VCCCORE[8] VCCCORE[9] VCCCORE[10] VCCCORE[11] VCCCORE[12] VCCCORE[13] VCCCORE[14] VCCCORE[15]

VCCIO[24]

VCCAPLLEXP

VCCIO[25] VCCIO[26] VCCIO[27] VCCIO[28] VCCIO[29] VCCIO[30] VCCIO[31] VCCIO[32] VCCIO[33] VCCIO[34] VCCIO[35] VCCIO[36] VCCIO[37] VCCIO[38] VCCIO[39] VCCIO[40] VCCIO[41] VCCIO[42] VCCIO[43] VCCIO[44] VCCIO[45] VCCIO[46] VCCIO[47] VCCIO[48] VCCIO[49] VCCIO[50] VCCIO[51] VCCIO[52] VCCIO[53]

VCCIO[54] VCCIO[55]

VCC3_3[1]

VCCVRM[1] VCCFDIPLL VCCIO[1]

+1.05V_RUN

C357

C357 220U

220U

IBEX PEAK-M (POWER)

D D

+1.05V_RUN

C C

+1.05V_RUN

B B

+1.05V_RUN

L16 *1uH_NCL16 *1uH_NC

C1481UC148

C179

1U

10U

+3.3V_RUN

L17 *1uH_NCL17 *1uH_NC

+1.05V_+1.5V_1.8V_RUN

C182

C182 10U

10U

+1.05V_RUN_PLLEXP

C351

C351 *10U_NC

*10U_NC

C1711UC171

C1861UC186

1U

C202

0.1U

+VCCAFDI_VRM

+V1.1LAN_VCCAPLL_FDI

+1.05V_RUN

C353

C353 *10U_NC

*10U_NC

R95 0R95 0

12

+1.05V_RUN

4

POWER

VCC CORE

PCI E*

FDI

+1.5V_RUN

+1.8V_RUN

+V1.1LAN_VCCA_A_DPL

+

C3561UC356 1U

+V1.1LAN_VCCA_B_DPL

+

C354

C3551UC355 1U

220U

VCCADAC[1] VCCADAC[2]

VSSA_DAC[1]

CRTLVDS

VSSA_DAC[2]

VCCALVDS

VSSA_LVDS

VCCTX_LVDS[1] VCCTX_LVDS[2] VCCTX_LVDS[3] VCCTX_LVDS[4]

VCC3_3[2] VCC3_3[3] VCC3_3[4]

HVCMOS

VCCVRM[2]

VCCDMI[1]

DMI

VCCDMI[2]

VCCPNAND[1] VCCPNAND[2] VCCPNAND[3] VCCPNAND[4] VCCPNAND[5] VCCPNAND[6] VCCPNAND[7] VCCPNAND[8] VCCPNAND[9]

VCCME3_3[1]

NAND / SPI

VCCME3_3[2] VCCME3_3[3] VCCME3_3[4]

R97

*0_0603_NC

12

R1010R101

0

12

R94

*0_0603_NC

12

AE50 AE52 AF53 AF51

AH38 AH39

AP43 AP45 AT46 AT45

AB34 AB35 AD35

AT24

AT16 AU16

AM16 AK16 AK20 AK19 AK15 AK13 AM12 AM13 AM15

AM8 AM9 AP11 AP9

+3.3V_RUN

C165

0.01U

+3.3V_RUN

C177

0.1U

+1.05V_+1.5V_1.8V_RUN

R96 0R96 0

C1721UC172 1U

+V_NVRAM_VCCQ

C181

0.1U

+3.3V_RUN

C176

0.1U

+1.05V_+1.5V_1.8V_RUN

+1.05V_RUN

C164

0.01U

R102

R103 0R103 0

L7 *10uH_NCL7 *10uH_NC

L5 0.1uHL5 0.1uH

C150

C150 22U

22U

+1.05V_RUN_VTT

*0_NC

12 12

3

+1.05V_RUN

+1.8V_RUN

+1.05V_RUN

+3.3V_RUN +1.8V_RUN

+1.05V_RUN

+3.3V_SUS

+3.3V_RUN

+1.05V_RUN_VTT

+RTC_CELL

+1.05V_RUN_VCCA_CLK

C189

C189 *10U_NC

*10U_NC

C178

C178 1U/10V

1U/10V

C200

C191

C191 22U

22U

C1971UC1971UC2011UC201

1U

C203 0.1UC203 0.1U

+1.05V_+1.5V_1.8V_RUN

+V1.1LAN_VCCA_A_DPL

+V1.1LAN_VCCA_B_DPL

C1851UC185

C1841UC184

1U

C204 0.1UC204 0.1U

C198

0.1U

C207

0.1U

C194

0.1U

C54

C88

0.1U

4.7U

C2301UC230 1U

C196

0.1U

C1681UC168 1U

C110

0.1U

C235

0.1U

C187

C187 *1U_NC

*1U_NC

C234

0.1U

AP51 AP53

AF23 AF24

AD38 AD39 AD41

AF43 AF41 AF42

AU24

BB51 BB53

BD51 BD53

AH23

AJ35

AH35

AF34

AH34

AF32

AT18

AU18

Y20

V39 V41 V42 Y39 Y41 Y42

V12

Y22

P18 U19 U20 U22

V15 V16 Y16

A12

U16J

VCCACLK[1] VCCACLK[2]

VCCLAN[1] VCCLAN[2]

DCPSUSBYP

VCCME[1] VCCME[2] VCCME[3] VCCME[4] VCCME[5] VCCME[6] VCCME[7] VCCME[8] VCCME[9] VCCME[10] VCCME[11] VCCME[12]

V9

DCPRTC

VCCVRM[3]

VCCADPLLA[1] VCCADPLLA[2]

VCCADPLLB[1] VCCADPLLB[2]

VCCIO[21] VCCIO[22] VCCIO[23]

VCCIO[2] VCCIO[3] VCCIO[4] DCPSST

DCPSUS

VCCSUS3_3[29] VCCSUS3_3[30] VCCSUS3_3[31] VCCSUS3_3[32]

VCC3_3[5] VCC3_3[6] VCC3_3[7]

V_CPU_IO[1]

V_CPU_IO[2]

VCCRTC

IbexPeak-M_Rev0_9

2

POWER

VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13]

USB

VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16] VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20] VCCSUS3_3[21] VCCSUS3_3[22] VCCSUS3_3[23] VCCSUS3_3[24] VCCSUS3_3[25] VCCSUS3_3[26] VCCSUS3_3[27]

VCCSUS3_3[28]

Clock and Miscellaneous

PCI/GPIO/LPC

VCCSATAPLL[1] VCCSATAPLL[2]

SATA

PCI/GPIO/LPC

CPU

RTC

HDA

VCCIO[5] VCCIO[6] VCCIO[7] VCCIO[8]

VCCSUS3_3[1] VCCSUS3_3[2] VCCSUS3_3[3] VCCSUS3_3[4] VCCSUS3_3[5] VCCSUS3_3[6] VCCSUS3_3[7] VCCSUS3_3[8] VCCSUS3_3[9]

VCCIO[56]

V5REF_SUS

V5REF

VCC3_3[8]

VCC3_3[9] VCC3_3[10] VCC3_3[11] VCC3_3[12] VCC3_3[13]

VCC3_3[14]

VCCIO[9]

VCCVRM[4]

VCCIO[10] VCCIO[11] VCCIO[12] VCCIO[13]

VCCIO[14] VCCIO[15] VCCIO[16]

VCCIO[17] VCCIO[18] VCCIO[19] VCCIO[20]

VCCME[13] VCCME[14] VCCME[15] VCCME[16]

VCCSUSHDA

V24 V26 Y24 Y26

V28 U28 U26 U24 P28 P26 N28 N26 M28 M26 L28 L26 J28 J26 H28 H26 G28 G26 F28 F26 E28 E26 C28 C26 B27 A28 A26

U23 V23 F24

K49

J38 L38 M36 N36 P36 U35

AD13

AK3 AK1

AH22

AT20

AH19 AD20 AF22 AD19

AF20 AF19 AH20

AB19 AB20 AB22 AD22

AA34 Y34 Y35 AA35

L30

C190 1UC190 1U

C208

C208 *0.022U_NC

*0.022U_NC

+1.05V_RUN

+V5REF_SUS

C214 1UC214 1U

+V5REF

C212 1UC212 1U

C173

0.1U

C192 0.1UC192 0.1U

+1.05V_VCCSATAPLL

C180

*1U_NC

+1.05V_+1.5V_1.8V_RUN

+1.05V_RUN

C2101UC210 1U

C205

0.1U

C175

C175 *10U_NC

*10U_NC

+3.3V_SUS

R151 100/F_4R151 100/F_4

R140 100/F_4R140 100/F_4

+1.05V_RUN

+3.3V_SUS

C206

0.1U

21

D9 SDM10K45-7-FD9 SDM10K45-7-F

21

D8 SDM10K45-7-FD8 SDM10K45-7-F

+3.3V_RUN

L6 *10uH_NCL6 *10uH_NC

R109 0R109 0

C1881UC188 1U

+5V_SUS +3.3V_SUS

+5V_RUN +3.3V_RUN

1

+1.05V_RUN

A A

Quanta Computer Inc.

Project Name:

Title

PCH 5/6 (POWER)

Size Document Number Rev

Date: Sheet

5

4

3

2

Date: Sheet

Project Name:

XM2_MB D

1

XM2

of

11 40Friday, January 15, 2010

5

IBEX PEAK-M (GND)

D D

U16H

AB16

VSS[0]

AA19

VSS[1]

AA20

VSS[2]

AA22

VSS[3]

AM19

VSS[4]

AA24

VSS[5]

AA26

VSS[6]

AA28

VSS[7]

AA30

VSS[8]

AA31

VSS[9]

AA32

VSS[10]

AB11

VSS[11]

AB15

VSS[12]

AB23

VSS[13]

AB30

VSS[14]

AB31

VSS[15]

AB32

VSS[16]

AB39

VSS[17]

AB43

VSS[18]

AB47

VSS[19]

AB5

VSS[20]

AB8

VSS[21]

AC2

VSS[22]

AC52

VSS[23]

AD11

VSS[24]

AD12

VSS[25]

AD16

C C

B B

VSS[26]

AD23

VSS[27]

AD30

VSS[28]

AD31

VSS[29]

AD32

VSS[30]

AD34

VSS[31]

AU22

VSS[32]

AD42

VSS[33]

AD46

VSS[34]

AD49

VSS[35]

AD7

VSS[36]

AE2

VSS[37]

AE4

VSS[38]

AF12

VSS[39]

Y13

VSS[40]

AH49

VSS[41]

AU4

VSS[42]

AF35

VSS[43]

AP13

VSS[44]

AN34

VSS[45]

AF45

VSS[46]

AF46

VSS[47]

AF49

VSS[48]

AF5

VSS[49]

AF8

VSS[50]

AG2

VSS[51]

AG52

VSS[52]

AH11

VSS[53]

AH15

VSS[54]

AH16

VSS[55]

AH24

VSS[56]

AH32

VSS[57]

AV18

VSS[58]

AH43

VSS[59]

AH47

VSS[60]

AH7

VSS[61]

AJ19

VSS[62]

AJ2

VSS[63]

AJ20

VSS[64]

AJ22

VSS[65]

AJ23

VSS[66]

AJ26

VSS[67]

AJ28

VSS[68]

AJ32

VSS[69]

AJ34

VSS[70]

AT5

VSS[71]

AJ4

VSS[72]

AK12

VSS[73]

AM41

VSS[74]

AN19

VSS[75]

AK26

VSS[76]

AK22

VSS[77]

AK23

VSS[78]

AK28

VSS[79]

IbexPeak-M_Rev0_9

VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]

VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158]

AK30 AK31 AK32 AK34 AK35 AK38 AK43 AK46 AK49 AK5 AK8 AL2 AL52 AM11 BB44 AD24 AM20 AM22 AM24 AM26 AM28 BA42 AM30 AM31 AM32 AM34 AM35 AM38 AM39 AM42 AU20 AM46 AV22 AM49 AM7 AA50 BB10 AN32 AN50 AN52 AP12 AP42 AP46 AP49 AP5 AP8 AR2 AR52 AT11 BA12 AH48 AT32 AT36 AT41 AT47 AT7 AV12 AV16 AV20 AV24 AV30 AV34 AV38 AV42 AV46 AV49 AV5 AV8 AW14 AW18 AW2 BF9 AW32 AW36 AW40 AW52 AY11 AY43 AY47

4

U16I

AY7

BG12 BB12 BB16 BB20 BB24 BB30 BB34 BB38 BB42 BB49

BC10 BC14 BC18

BC22 BC32 BC36 BC40 BC44 BC52

BD48 BD49

BE12 BE16 BE20 BE24 BE30 BE34 BE38 BE42 BE46 BE48 BE50

BF49 BF51 BG18 BG24

BG50 BH11 BH15 BH19 BH23 BH31 BH35 BH39 BH43 BH47

AF39

VSS[159]

B11

VSS[160]

B15

VSS[161]

B19

VSS[162]

B23

VSS[163]

B31

VSS[164]

B35

VSS[165]

B39

VSS[166]

B43

VSS[167]

B47

VSS[168]

B7

VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179]

BB5

VSS[180] VSS[181] VSS[182] VSS[183]

BC2

VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190]

BH9

VSS[191] VSS[192] VSS[193]

BD5

VSS[194] VSS[195] VSS[196] VSS[197] VSS[198] VSS[199] VSS[200] VSS[201] VSS[202] VSS[203] VSS[204] VSS[205]

BE6

VSS[206]

BE8

VSS[207]

BF3

VSS[208] VSS[209] VSS[210] VSS[211] VSS[212]

BG4

VSS[213] VSS[214] VSS[215] VSS[216] VSS[217] VSS[218] VSS[219] VSS[220] VSS[221] VSS[222] VSS[223]

BH7

VSS[224]

C12

VSS[225]

C50

VSS[226]

D51

VSS[227]

E12

VSS[228]

E16

VSS[229]

E20

VSS[230]

E24

VSS[231]

E30

VSS[232]

E34

VSS[233]

E38

VSS[234]

E42

VSS[235]

E46

VSS[236]

E48

VSS[237]

E6

VSS[238]

E8

VSS[239]

F49

VSS[240]

F5

VSS[241]

G10

VSS[242]

G14

VSS[243]

G18

VSS[244]

G2

VSS[245]

G22

VSS[246]

G32

VSS[247]

G36

VSS[248]

G40

VSS[249]

G44

VSS[250]

G52

VSS[251] VSS[252]

H16

VSS[253]

H20

VSS[254]

H30

VSS[255]

H34

VSS[256]

H38

VSS[257]

H42

VSS[258]

VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[326] VSS[327] VSS[328] VSS[329] VSS[330] VSS[331] VSS[332] VSS[333] VSS[334] VSS[335] VSS[336] VSS[337] VSS[338] VSS[339] VSS[340] VSS[341] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352] VSS[353] VSS[354] VSS[355] VSS[356] VSS[366]

H49 H5 J24 K11 K43 K47 K7 L14 L18 L2 L22 L32 L36 L40 L52 M12 M16 M20 N38 M34 M38 M42 M46 M49 M5 M8 N24 P11 AD15 P22 P30 P32 P34 P42 P45 P47 R2 R52 T12 T41 T46 T49 T5 T8 U30 U31 U32 U34 P38 V11 P16 V19 V20 V22 V30 V31 V32 V34 V35 V38 V43 V45 V46 V47 V49 V5 V7 V8 W2 W52 Y11 Y12 Y15 Y19 Y23 Y28 Y30 Y31 Y32 Y38 Y43 Y46 P49 Y5 Y6 Y8 P24 T43 AD51 AT8 AD47 Y47 AT12 AM6 AT13 AM5 AK45 AK39 AV14

3

2

1

IbexPeak-M_Rev0_9

A A

Quanta Computer Inc.

Project Name:

Title

PCH 6/6 (GND)

Size Document Number Rev

Date: Sheet

5

4

3

2

Date: Sheet

Project Name:

XM2_MB D

1

XM2

of

12 40Friday, January 15, 2010