Quanta GM7C DAGM7CMBAD0, XPS 17, GM7C DAGM7CMBAE0 Schematic

1

2

3

4

5

6

7

8

System Block Diagram of GM7C

A A

FAN & THERMAL

SMSC EMC2112

PG 31

+1.5V_SUS/+0.75V_DDR_VTT

+1.05V_RUN

+1.1V_RUN_VTT

POWER

Intel

DDR3-SODIMM_A0

CPU/NB

DDR3-SODIMM_A1

PG 14,15

B B

DDR3-SODIMM_B1

1067/1333 MHz DDR III

SandyBridge

MCH Processor

1067/1333 MHz DDR III

PG 16,17

DDR3-SODIMM_B0

(989 PGA)

PG 4,5,6,7

PCIEx16

DDR3 x 8
(1G 128bits)

[DDR3 x 12
(

3G 192bits)]

PG 25,26,27

NVIDIA N12E-GE-B

PCI EXPRESS GFX

PG 19,20,21,22,23,24

DP

LVDS

eDP

HDMI

DP

DP Redriver

PG 44

PG 46

PG 45

LCD Panel

DC/DC

+3.3V_ALW/+5V_ALW/
+15V_ALW

VGA / Nivida

VGA / Intel

+1.8V_RUN

PG 28

DP conn.

PG 43

PG 47

PG 48

PG 49

PG 50

SN75DP120

DMI X 4FDI

CPU COREREGULATOR

E-Module Bay

ODD

SATA - HDD0

PG 35

PG 35

SATA - HDD1

C C

Card Reader
conn

USB 2.0 conn
X1

Bluetooth BTB Conn

PG 37

JMicron

JMB389

PG 29

USB[1]

DB

Conn.

USB 2.0 conn
X1

D D

PG 36

USB 2.0 conn
X1

SATA[1]

HDMI

SATA[0]
SATA[5]

USB[8]

PCIE[5] USB[1]

USB[1,2,3]

PCIE[4]

PCH

Cougar Point

(HM67)

PG 8,9,10,11,12,13

PCIE[6]

SATA[4]

USB[1]

PCIE[1,3]

USB[4,5]

DB

Conn.

SPI

LPC

SPI ROM
4M bytes

KBC

ITE8518

PG 30

SPI PS/2

FLASH
1Mbyts

PG 32 PG 33

Touchpad

19X8

PG 32

Keyboard

PG 33

Azalia I/F Azalia I/F

PG 36

USER
INTERFACE

PCIE[6]

SATA[4]

PCIE[1]

USB[4]

PCIE[3]

USB[5]

PG 34

1

2

3

4

5

HDMI Redriver

TMDS141

LAN

RTL8111EL

eSATA Redriver

SN75LVCP412

MINI-CARD

WLAN

MINI-CARD

WWAN

AUDIO Codec

ALC665

Audio
Jacks X3

6

HDMI conn.

RJ45 conn.

E-SATA Combo
with USB CONN

Main SPK Amp

MAX9736AETJ+

Subwoofer Amp

MAX9736AETJ+

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project Name:

Project Name:

Title

Title

Title

MB Block Diagram

MB Block Diagram

MB Block Diagram

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Project Name:

GM7C_MB C

GM7C_MB C

GM7C_MB C

7

Main SPK

1.5W*2

SPK 2.5W*1

GM7C

GM7C

GM7C

1 59Friday, January 21, 2011

1 59Friday, January 21, 2011

1 59Friday, January 21, 2011

8

1

2

GPU PWR CTRL Option 1 (Default/ VDDR3 before VDDC)

+3V

+VIN

3

+VIN

4

+1.05V_VTT

5

+1.5V_SUS

+1.8V

6

7

8

02

PCH

A A

DGPU_PWR_EN#

P10

VDDR3

+3V_GPU (0.6A)

Main Power Rails

POWER PLANE

B B

+0.75V_DDR_VTT

+0.85V

+1.05V_LAN_M

+1.05V_M

+1.05V_PCH

+1.05V_SUS

+1.05V_VTT

+1.5V

+1.5V_CPU

+1.5V_GPU

+1.5V_SUS

+1.8V

+1.8_GPU

C C

+1V_GPU

+3V

+3V_GPU

+3V_M

+3V_S5

+3V_SUS +3.3V SUSD

+3VPCU

+5V

+5V_S5 +5V 5V power sequence

+5V_SUS +5V USB2.0 power

+5VPCU +5V Always power

+15V_ALW +15V Power sequence

D D

+SMDDR_VREF +0.75V DDR3 reference power

+VCC_CORE +1.1V

+VCC_GFX +1.52V Internal GPU Core power

+VGPU_IO +1V

+VIN +19V AC power input

VOLTAGE

+0.75V

+0.9V

+1.05V

+1.05V

+1.05V

+1.05V

+1.05V

+1.5V

+1.5V

+1.5V

+1.5V

+1.8V

+1.8V

+1V

+3.3V

+3.3V

+3.3V

+3.3V Always power

+5V I/O power

+1V+VGPU_CORE

1

DESCRIPTION

DDR3 reference voltage

Intel new power rail

LAN M power for iAMT

ME power for iAMT

PCH core power

USB3.0 chip power

CPU core logic power

I/O module power

CPU DDR3 controller power

GPU DDR3 controller power

DDR3 SODIMM power

CPU/PCH/LVDS power

I/O power

GPU power

PCH/SPI power for iAMT+3.3V

3V power sequence

USB3.0 chip power

CPU Core power

GPU Core power

GPU I/O controller power

+3V_GPU

P19

VDDC

RT8204Cougar Point

+VGPU_CORE (29A)

1.05V_VTT_PWRGD

PG_GPUIO_EN

P45

CONTROL
SIGNAL

RUN_ON

SLP_LAN#

SLP_A#

RUN_ON

SUSD

RUN_ON

RUN_ON

RUN_ON_D

PG_1.5V_EN

SUS_ON

RUN_ON

+1.5V_GPUGPU power

PG_1V_ENGPU PCIE VDDC power

RUN_ON

DGPU_PWR_EN#

SLP_A#

S5_ON

SYS_SHDN#

RUN_ON

S5_ON

SUSD

SYS_SHDN#

+VGPU_IO (4.5A)

ACTIVE IN

VDDCI

UP6111A

P46

AC/DC

Charger

ISL88731A

+VIN

SYS_PWRGD

VDDR_PWRGD

1.8V_PWRGD

1.05V_PCH_PWRGD

1.05V_VTT_PWRGD

0.85V_PWRGD

APWROK

GFX_PWRGD

SUS_ON

+1V_GPU (2A)

P53

DDR PWR

SUS PWR

MOS (AO6402A)

SUS PWR

MOS (AO6402A)

+1.05V_LAN_M

SUS PWR

MOS (AO6402A)

PCIE_VDDC

RT8204

+VIN

3V/5V ALW

RT8206B

+3V_PCU
+5V_PCU

+VIN

RT8207A

P50

+5VPCU

P54

+3VPCU

P54

P54

P45

PG_1.5V_EN

VDDR1

MOS (AO4496)MOS (SI2303)

+1.5V_GPU (5.25A)

+1.5V_GPUPG_1V_EN

P50

VDDR4

MOS (AO6402A)

+1.8V_GPU (1.9A)

PCU

+3V_PCU

P52

NBSWON# EC_PWRBTN# SLP_LAN#

EC

SUS_ON

RUN_ON

HWPG VRON

IT8502N

S5_ON

SLP_S4#

SLP_S3#

P39

S5 PWR

AO4496

PCH

Cougar Point

3

4

+VIN

+1.5V_SUS

SLP_LAN#

VDD_LAN

UP6111AQDD

P49

+3VPCU

+5V_SUS

VCC_LAN

MOS (ME3424)

P36

+3VPCU

+3V_SUS

VCCSPI

MOS (AO4496)

P49

+1.05V_LAN_M

+1.05V_SUS

SLP_A#

VCCASW

MOS (AO6402A)

P54

P52

P08

+VIN

RUN_ON

VRON

VRON

DGPU_VRON

PG_GPUIO_EN

2

3

VRON

CPU Core

ISL9583CRZ

4

P43

+VCC_CORE

+VCC_GFX

5

+1.8V_GPU

P51

+3V_S5

+5V_S5

1

2

SLP_A#

+1.05V_LAN_M

+3V_LAN

+1.05V_M

+3V_M

6

BJT

RUN_ON

dGPU_PWROK

P51

+5VPCU

RUN PWR

MOS (AO4496)

+5V

P54

+3VPCU

RUN PWR

MOS (AO4496)

+3V

P54

+1.5V_SUS

RUN PWR

MOS (AO6402A)

+1.5V

P50

+VIN

RUN PWR

UP6111A

+1.8V

P51

+1.5V_SUS

RUN PWR

RT8207A

+SMDDR_VREF

P50

+1.05V_LAN_M

C_PCH

VC

MOS (AOL1718)

+VIN

VCCIO_CPU

UP6111A

+1.05V_VTT

Title

Title

Title

PWR Status & GPU PWR CRL

PWR Status & GPU PWR CRL

PWR Status & GPU PWR CRL

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

7

+1.05V_PCH

P49

+VIN

1.05V_VTT_PWRGD

P47

VCCSA

UP6112

+0.85V

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project Name:

Project Name:

Project Name:

GM7C_MB C

GM7C_MB C

GM7C_MB C

GM7C

GM7C

GM7C

2 59Friday, January 21, 2011

2 59Friday, January 21, 2011

2 59Friday, January 21, 2011

8

P49

5

4

3

2

1

03

D D

C C

The page is blank.

B B

A A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project Name:

Project Name:

Title

Title

Title

Blank

Blank

Blank

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Project Name:

GM7C_MB C

GM7C_MB C

GM7C_MB C

GM7C

GM7C

GM7C

3 59Friday, January 21, 2011

3 59Friday, January 21, 2011

3 59Friday, January 21, 2011

1

5

4

3

2

1

Sandy Bridge Processor (CLK,MISC,JTAG)

DIS SW

NA
1K ohm
1K ohm

+3.3V_SUS

4

04

C501

C501

*0.1U/10V_NC

*0.1U/10V_NC

CPU_PLTRST#

GM7C

GM7C

GM7C

4 59Friday, January 21, 2011

4 59Friday, January 21, 2011

4 59Friday, January 21, 2011

0 ohm

NA
NA

Sandy Bridge Processor (DMI,PEG,FDI)

DMI_TXN08
DMI_TXN18
DMI_TXN28

D D

C C

B B

Programing Disable eDP interface(BIOS)

FDI Disabling (Discrete Only) eDP & PEG Compensation

A A

R501

R501
1K/J_DIS

1K/J_DIS

DMI_TXN38

DMI_TXP08
DMI_TXP18
DMI_TXP28
DMI_TXP38

DMI_RXN08
DMI_RXN18
DMI_RXN28
DMI_RXN38

DMI_RXP08
DMI_RXP18
DMI_RXP28
DMI_RXP38

FDI_TXN08
FDI_TXN18
FDI_TXN28
FDI_TXN38
FDI_TXN48
FDI_TXN58
FDI_TXN68
FDI_TXN78

FDI_TXP08
FDI_TXP18
FDI_TXP28
FDI_TXP38
FDI_TXP48
FDI_TXP58
FDI_TXP68
FDI_TXP78

FDI_FSYNC08
FDI_FSYNC18

FDI_LSYNC08
FDI_LSYNC18

DP_ICOMPO 12mil

e
eDP_COMPIO 4mil

R69 0_4_DISR69 0_4_DIS
R71 0_4_DISR71 0_4_DIS
R70 0_4_DISR70 0_4_DIS

FDI_FSYNC can gang

R72

R72

all these 4

1K/J_DIS

1K/J_DIS

signals togethe r
and tie them wi th
only one 1K

X02-17

resistor to GND
(DG V0.5 Ch2.2.9).

FDI_FSYNC0
FDI_FSYNC1

FDI_INT

FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1

5

FDI_INT

FDI_LSYNC0
FDI_LSYNC1

eDP_COMP

TP20TP20

FDI_INT8

B27
B25
A25
B24

B28
B26
A24
B23

G21
E22
F21
D21

G22
D22
F20
C21

A21
H19
E19
F18
B21
C20
D18
E17

A22
G19
E20
G18
B20
C19
D19
F17

J18
J17

H20

J19
H17

A18
A17
B16

C15
D15

C17
F16
C16
G15

C18
E16
D16
F15

U28A

U28A

DMI_RX#[0 ]
DMI_RX#[1 ]
DMI_RX#[2 ]
DMI_RX#[3 ]

DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]

DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]

DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]

FDI0_TX#[0 ]
FDI0_TX#[1 ]
FDI0_TX#[2 ]
FDI0_TX#[3 ]
FDI1_TX#[0 ]
FDI1_TX#[1 ]
FDI1_TX#[2 ]
FDI1_TX#[3 ]

FDI0_TX[0]
FDI0_TX[1]
FDI0_TX[2]
FDI0_TX[3]
FDI1_TX[0]
FDI1_TX[1]
FDI1_TX[2]
FDI1_TX[3]

FDI0_FSYNC
FDI1_FSYNC

FDI_INT

FDI0_LSYNC
FDI1_LSYNC

eDP_COMPIO
eDP_ICOMPO
eDP_HPD

eDP_AUX
eDP_AUX#

eDP_TX[0]
eDP_TX[1]
eDP_TX[2]
eDP_TX[3]

eDP_TX#[0]
eDP_TX#[1]
eDP_TX#[2]
eDP_TX#[3]

CPU-989P-rPGA

CPU-989P-rPGA

+1.05V_VTT

DMI

DMI

Intel(R) FDI

Intel(R) FDI

PCI EXPRESS* - GRAPHICS

PCI EXPRESS* - GRAPHICS

eDP

eDP

R42 24.9/F_4R42 24.9/F_4

Check with BIOS to
disable the eDP
function.

PEG_ICOM PI

PEG_ICOM PO

PEG_RCOM PO

PEG_RX# [0]
PEG_RX# [1]
PEG_RX# [2]
PEG_RX# [3]
PEG_RX# [4]
PEG_RX# [5]
PEG_RX# [6]
PEG_RX# [7]
PEG_RX# [8]

PEG_RX# [9]
PEG_RX# [10]
PEG_RX# [11]
PEG_RX# [12]
PEG_RX# [13]
PEG_RX# [14]
PEG_RX# [15]

PEG_RX[0 ]
PEG_RX[1 ]
PEG_RX[2 ]
PEG_RX[3 ]
PEG_RX[4 ]
PEG_RX[5 ]
PEG_RX[6 ]
PEG_RX[7 ]
PEG_RX[8 ]

PEG_RX[9 ]
PEG_RX[1 0]
PEG_RX[1 1]
PEG_RX[1 2]
PEG_RX[1 3]
PEG_RX[1 4]
PEG_RX[1 5]

PEG_TX#[0 ]
PEG_TX#[1 ]
PEG_TX#[2 ]
PEG_TX#[3 ]
PEG_TX#[4 ]
PEG_TX#[5 ]
PEG_TX#[6 ]
PEG_TX#[7 ]
PEG_TX#[8 ]

PEG_TX#[9 ]
PEG_TX#[1 0]
PEG_TX#[1 1]
PEG_TX#[1 2]
PEG_TX#[1 3]
PEG_TX#[1 4]
PEG_TX#[1 5]

PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]

PEG_TX[9]
PEG_TX[10 ]
PEG_TX[11 ]
PEG_TX[12 ]
PEG_TX[13 ]
PEG_TX[14 ]
PEG_TX[15 ]

eDP_COMP

PEG_COMP

J22
J21
H22

PEG_RXN0

K33

PEG_RXN1

M35

PEG_RXN2

L34

PEG_RXN3

J35

PEG_RXN4

J32

PEG_RXN5

H34

PEG_RXN6

H31

PEG_RXN7

G33

PEG_RXN8

G30

PEG_RXN9

F35

PEG_RXN10

E34

PEG_RXN11

E32

PEG_RXN12

D33

PEG_RXN13

D31

PEG_RXN14

B33

PEG_RXN15

C32

PEG_RXP0

J33

PEG_RXP1

L35

PEG_RXP2

K34

PEG_RXP3

H35

PEG_RXP4

H32

PEG_RXP5

G34

PEG_RXP6

G31

PEG_RXP7

F33

PEG_RXP8

F30

PEG_RXP9

E35

PEG_RXP10

E33

PEG_RXP11

F32

PEG_RXP12

D34

PEG_RXP13

E31

PEG_RXP14

C33

PEG_RXP15

B32

PEG_TXN0_C

M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25

M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25

0.22uF AC coupling Caps for PCIE GEN1/2/3

C182 0.1U/16V_4C182 0.1U/16V_4

PEG_TXN1_C PEG_TXN1

C178 0.1U/16V_4C178 0.1U/16V_4

PEG_TXN2_C

C156 0.1U/16V_4C156 0.1U/16V_4

PEG_TXN3_C

C170 0.1U/16V_4C170 0.1U/16V_4

PEG_TXN4_C

C155 0.1U/16V_4C155 0.1U/16V_4

PEG_TXN5_C

C138 0.1U/16V_4C138 0.1U/16V_4

PEG_TXN6_C

C169 0.1U/16V_4C169 0.1U/16V_4

PEG_TXN7_C

C126 0.1U/16V_4C126 0.1U/16V_4

PEG_TXN8_C

C127 0.1U/16V_4C127 0.1U/16V_4

PEG_TXN9_C

C108 0.1U/16V_4C108 0.1U/16V_4

PEG_TXN10_C

C86 0.1U/16V_4C86 0.1U/16V_4

PEG_TXN11_C

C82 0.1U/16V_4C82 0.1U/16V_4 T57T57

PEG_TXN12_C

C71 0.1U/16V_4C71 0.1U/16V_4

PEG_TXN13_C

C64 0.1U/16V_4C64 0.1U/16V_4

PEG_TXN14_C

C46 0.1U/16V_4C46 0.1U/16V_4

PEG_TXN15_C

C38 0.1U/16V_4C38 0.1U/16V_4

PEG_TXP0_C

C185 0.1U/16V_4C185 0.1U/16V_4

PEG_TXP1_C

C174 0.1U/16V_4C174 0.1U/16V_4

PEG_TXP2_C

C161 0.1U/16V_4C161 0.1U/16V_4

PEG_TXP3_C

C173 0.1U/16V_4C173 0.1U/16V_4

PEG_TXP4_C

C142 0.1U/16V_4C142 0.1U/16V_4

PEG_TXP5_C

C130 0.1U/16V_4C130 0.1U/16V_4

PEG_TXP6_C

C162 0.1U/16V_4C162 0.1U/16V_4

PEG_TXP7_C

C114 0.1U/16V_4C114 0.1U/16V_4

PEG_TXP8_C

C129 0.1U/16V_4C129 0.1U/16V_4

PEG_TXP9_C

C103 0.1U/16V_4C103 0.1U/16V_4

PEG_TXP10_C

C91 0.1U/16V_4C91 0.1U/16V_4

PEG_TXP11_C

C79 0.1U/16V_4C79 0.1U/16V_4

PEG_TXP12_C

C74 0.1U/16V_4C74 0.1U/16V_4

PEG_TXP13_C

C67 0.1U/16V_4C67 0.1U/16V_4

PEG_TXP14_C

C54 0.1U/16V_4C54 0.1U/16V_4

PEG_TXP15_C

C40 0.1U/16V_4C40 0.1U/16V_4

+1.05V_VTT

R68 24.9/F_4R68 24.9/F_4

PEG_ICOMPI and RCOMPO signals should
be routed withi n 500 mils
typical impedan ce = 43 mohms

PEG_ICOMPO sign als should
be routed withi n 500 mils
typical impedan ce = 14.5 mohms

4

PEG_RXN[0..15] 19

PEG_RXP[0..15] 19

PEG_TXN0

PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15

PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15

PEG_COMP

X02-15

VR_HOT#30,42,43

PEG_TXN[0..15] 19

A01-10

+1.05V_VTT

CPU_PLTRST#

PEG_TXP[0..15] 19

3/16 Change topology;
Add AND gate based on DG rev0.9

PM_DRAM_PWRGD8

Use SYS_PWROK only for further
test without change pa rt

X02-15

H_PWRGOOD11

R390 *75/J_NCR390 *75/J_NC

SYS_PWROK8

Processor pull-up(CPU)

X02-09

VR_HOT#

R395 62/F_4R395 62/F_4

XDP_TMS_R

R399 51/J_4R399 51/J_4

XDP_TDI_R

R397 51/J_4R397 51/J_4

XDP_PREQ#_R

R396 *51/J_4_NCR396 *51/J_4_NC

XDP_TCLK_R

R400 51/J_4R400 51/J_4

XDP_TRST#_R

R398 51/J_4R398 51/J_4

3

SNB_IVB# N.A at SNB EDS #27637 0.7v1

A00-3

H_CPUDET#30

H_PECI11,30

VR_HOT#

PM_THRMTRIP#11

TP6TP6

TP5TP5

R116 56R116 56

H_SNB_IVB#

TP_CATERR#

H_PROCHOT_R#

X02-15

+3.3V_SUS

2

1

74AHC1G09GW

74AHC1G09GW

H_PM_SYNC_R

R454 10KR454 10K

PM_DRAM_PWRGD_R

CPU_PLTRST#_R

C245

C245

0.1U/16V_4

0.1U/16V_4

U11

U11

4

3 5

Pin1

L L

HHLL

H

R148

R148

H_PM_SYNC8

R387 *43/J_NCR387 *43/J_NC

+1.05V_VTT

A00-12

C26

AN34

AL33

AN33

AL32

AN32

AM34

AP33

V8

AR33

+1.5V_CPU

Ra

*39/J_4_NC

*39/J_4_NC

Rc

Pin2 Pin4

H

U28B

U28B

PROC_SEL ECT#

SKTOCC#

CATERR#

PECI

PROCHOT#

THERMTRIP#

PM_SYNC

UNCOREPW RGOOD

SM_DRAMPW ROK

RESET#

CPU-989P-rPGA

CPU-989P-rPGA

02/25 Update Ra, Rb value and routing,
Add Rc follow PDG 0.71 #440484

R145

R145
200/F_4

200/F_4

Rb

R139 130/F_4R 139 130/F_4

3

Q24 *2N7002K_NCQ24 *2N7002K_NC

2

+1.5V_CPU

L

L

DRAM_PWRGD

L

SYS_PWROK

H

MISCTHERMALPWR MANAGEMENT

MISCTHERMALPWR MANAGEMENT

PM_DRAM_PWRGD_RPM_DRAM_PWRGD_Q

1

SM_DRAMPWROK

2

BCLK

BCLK#

DPLL_REF _CLK

DPLL_REF _CLK#

CLOCKS

CLOCKS

SM_DRAMRST#

SM_RCOMP[0 ]
SM_RCOMP[1 ]
SM_RCOMP[2 ]

DDR3

MISC

DDR3

MISC

PRDY#

PREQ#

TCK
TMS

TRST#

TDI

TDO

DBR#

BPM#[0]
BPM#[1]

JTAG & BPM

JTAG & BPM

BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

PS_S3CNTRL 6,8,14

CLK_CPU_BCLKP_R

A28

CLK_CPU_BCLKN_R

A27

CLK_DPLL_SSCLKP_R

A16

CLK_DPLL_SSCLKN_R

A15

R8

SM_RCOMP_0

AK1

SM_RCOMP_1

A5

SM_RCOMP_2

A4

AP29

XDP_PREQ#_R

AP27

XDP_TCLK_R

AR26

XDP_TMS_R

AR27

XDP_TRST#_R

AP30

XDP_TDI_R

AR28
AP26

AL35

AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32

PLTRST#10,19,29,30,36,37

100 ns after +1.5V_CPU
reaches 80%

4

3
1

R500 0X2R500 0X2

R48 1K/J_4_DISR48 1K/J_4_DIS

Rb

3
1

R41 0X2_SWR41 0X2_SW

Rc

CPU_DRAMRST# 5

R111 140/F_4R 111 140/F_4
R52 25.5/F_4R52 25.5/F_4
R59 200/F_4R59 200/F_4

T60T60

Ra

R47 1K/J_4_DISR47 1K/J_4_DIS

2

4
2

CLK_CPU_BCLKP 10
CLK_CPU_BCLKN 10

CLK_DPLL_SSCLKP 10
CLK_DPLL_SSCLKN 10

+1.05V_VTT

Ra
Rb
Rc

26.1 change to 25 ohm

A00-12

T59T59

T58T58

T50T50
T51T51
T52T52
T53T53
T54T54
T55T55
T56T56

[0118]IF implement U20 solution , R305 need to pop

A01-10

U20

U20

1

VCC5NC

2

IN

GND3OUT

*74LVC1G07GW_NC

*74LVC1G07GW_NC

R663

R663

1.5K/F

1.5K/F

CPU_PLTRST#_R

R664

R664
750/F

750/F

X0152

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project Name:

Project Name:

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Project Name:

SNB 1/4_PEG,DMI,FDI,MISC

SNB 1/4_PEG,DMI,FDI,MISC

SNB 1/4_PEG,DMI,FDI,MISC

GM7C_MB C

GM7C_MB C

GM7C_MB C

1

5

4

3

2

1

Sandy Bridge Processor (DDR3)

U28C

U28C

AB6

SA_CLK[0]

M_A_DQ[63:0]15

D D

C C

B B

M_A_BS#015
M_A_BS#115
M_A_BS#215

M_A_CAS#15
M_A_RAS#15
M_A_WE#15

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

AP11

AN11

AL12
AM12
AM11

AL11

AP12
AN12

AJ14

AH14

AL15

AK15

AL14

AK14

AJ15

AH15

AE10

AF10

G10

N10

M10

AG6
AG5
AK6
AK5
AH5
AH6

AK8

AK9
AH8
AH9
AL9
AL8

AE8
AD9
AF9

F10

AJ5
AJ6
AJ8

AJ9

C5
D5
D3
D2
D6
C6
C2
C3

F8

G9
F9
F7
G8
G7
K4
K5
K1

J1
J5
J4
J2

K2

M8

N8
N7

M9
N9
M7

V6

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

RSVD_TP[10]

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_CLK#[0]

SA_CKE[0]

SA_CLK[1]

SA_CLK#[1]

SA_CKE[1]

RSVD_TP[1]
RSVD_TP[2]
RSVD_TP[3]

RSVD_TP[4]
RSVD_TP[5]
RSVD_TP[6]

SA_CS#[0]

SA_CS#[1]
RSVD_TP[7]
RSVD_TP[8]

SA_ODT[0]

SA_ODT[1]
RSVD_TP[9]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]

SA_DQS[1]

SA_DQS[2]

SA_DQS[3]

SA_DQS[4]

SA_DQS[5]

SA_DQS[6]

SA_DQS[7]

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]

SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

AA6
V9

AA5
AB5
V10

AB4
AA4
W9

Intel 4 DIMM DG,Rev0.9 Intel 4 DIMM DG,Rev0.9

AB3
AA3
W10

AK3
AL3
AG1
AH1

AH3
AG3
AG2
AH2

M_A_DQSN0

C4

M_A_DQSN1

G6

M_A_DQSN2

J3

M_A_DQSN3

M6

M_A_DQSN4

AL6

M_A_DQSN5

AM8

M_A_DQSN6

AR12

M_A_DQSN7

AM15

M_A_DQSP0

D4

M_A_DQSP1

F6

M_A_DQSP2

K3

M_A_DQSP3

N6

M_A_DQSP4

AL5

M_A_DQSP5

AM9

M_A_DQSP6

AR11

M_A_DQSP7

AM14

M_A_A0

AD10

M_A_A1

W1

M_A_A2

W2

M_A_A3

W7

M_A_A4

V3

M_A_A5

V2

M_A_A6

W3

M_A_A7

W6

M_A_A8

V1

M_A_A9

W5

M_A_A10

AD8

M_A_A11

V4

M_A_A12

W4

M_A_A13

AF8

M_A_A14

V5

M_A_A15

V7

M_A_CLKP0 15
M_A_CLKN0 15
M_A_CKE0 15

M_A_CLKP1 15
M_A_CLKN1 15
M_A_CKE1 15

M_A_CLKP2
M_A_CLKN2
M_A_CKE2

M_A_CLKP3
M_A_CLKN3
M_A_CKE3

M_A_CS#0 15
M_A_CS#1 15
M_A_CS#2
M_A_CS#3

M_A_ODT0 15
M_A_ODT1 15
M_A_ODT2
M_A_ODT3

M_A_DQSN[7:0] 15

M_A_DQSP[7:0] 15

M_A_A[15:0] 15

M_B_DQ[63:0]17

M_B_BS#017
M_B_BS#117
M_B_BS#217

M_B_CAS#17
M_B_RAS#17
M_B_WE#17

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

AJ11

AH11

AJ12

AH12

AT11
AN14
AR14

AT14

AT12
AN15
AR15

AT15

AA10

D10

AM5
AM6
AR3
AP3
AN3
AN2
AN1
AP2
AP5
AN9
AT5
AT6
AP6
AN8
AR6
AR5
AR9

AT8
AT9

AR8

AA9
AA7

AB8
AB9

K10

J10

C9
A7

C8
A9
A8
D9
D8
G4
F4
F1
G1
G5
F5
F2
G2

J7
J8

K9

J9

K8
K7
M5
N4
N2
N1
M4
N5
M2
M1

R6

U28D

U28D

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

SB_BS[0]
SB_BS[1]
SB_BS[2]

SB_CAS#
SB_RAS#
SB_WE#

AE2

SB_CLK[0]

AD2

SB_CLK#[0]

R9

SB_CKE[0]

AE1

SB_CLK[1]

AD1

SB_CLK#[1]

R10

SB_CKE[1]

SB_CS#[0]
SB_CS#[1]

SB_ODT[0]
SB_ODT[1]

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

AB2
AA2
T9

AA1
AB1
T10

AD3
AE3
AD6
AE6

AE4
AD4
AD5
AE5

D7
F3
K6
N3
AN5
AP9
AK12
AP15

C7
G3
J6
M3
AN6
AP8
AK11
AP14

AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4

M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7

M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

RSVD_TP[11]
RSVD_TP[12]
RSVD_TP[13]

RSVD_TP[14]
RSVD_TP[15]
RSVD_TP[16]

RSVD_TP[17]
RSVD_TP[18]

RSVD_TP[19]
RSVD_TP[20]

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

M_B_CLKP0 17
M_B_CLKN0 17
M_B_CKE0 17

M_B_CLKP1 17
M_B_CLKN1 17
M_B_CKE1 17

M_B_CLKP2
M_B_CLKN2
M_B_CKE2

M_B_CLKP3
M_B_CLKN3
M_B_CKE3

M_B_CS#0 17
M_B_CS#1 17
M_B_CS#2
M_B_CS#3

M_B_ODT0 17
M_B_ODT1 17
M_B_ODT2
M_B_ODT3

05

M_B_DQSN[7:0] 17

M_B_DQSP[7:0] 17

M_B_A[15:0] 17

CPU-989P-rPGA

CPU-989P-rPGA

+1.5V_SUS

02/25 Add 1K ohm
#PGU 0.71 440484

A A

R40 1K/F_4R40 1K/F_4

DDR_HVREF_RST_PCH10

63 X01

+3.3V_SUS

R43

R43
1K/F_4

1K/F_4

R49 1K_4R49 1K_4

3

63 X01

1

Q9
2N7002KQ92N7002K

2

C59

C59
*0.047U/10V_NC

*0.047U/10V_NC

R54

R54

4.99K/F_4

4.99K/F_4

CPU_DRAMRST# 4DDR3_DRAMRST#15,17

10k -> 1k ohm (CRB,Dell)

5

4

3

CPU-989P-rPGA

CPU-989P-rPGA

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project Name:

Project Name:

Title

Title

Title

SNB 2/4_DDR3

SNB 2/4_DDR3

SNB 2/4_DDR3

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Project Name:

GM7C_MB C

GM7C_MB C

GM7C_MB C

GM7C

GM7C

GM7C

5 59Friday, January 21, 2011

5 59Friday, January 21, 2011

5 59Friday, January 21, 2011

1

5

4

3

2

1

C160

C160

10U/6.3V_6

10U/6.3V_6

+

+

C123

C123
330U/2V_7343

330U/2V_7343

17 X01

CPU SA

SNB 45W: 6A

3

30uF/7mohm x 1

10uF x 3

X02-32

3

1

Q59

Q59

NTMFS4921NT1G

NTMFS4921NT1G

4

3

1

Q14

Q14

NTMFS4921NT1G

NTMFS4921NT1G

4

C199

C199
*470P/50V_4_NC

*470P/50V_4_NC

2N7002K

2N7002K

GM7C

GM7C

GM7C

6 59Friday, January 21, 2011

6 59Friday, January 21, 2011

6 59Friday, January 21, 2011

06

+1.5V_CPU

+VCCSA

+1.5V_CPU+1.5V_SUS

2

Q23

Q23

R128

R128
220/J_8

220/J_8

3

1

Sandy Bridge Processor (POWER)

POWER

POWER

U28F

U28F

D D

CPU Core Power

SNB 45W:55A

470uF/4mohm x 4

22uF x 16

1

0uF x 10

X00:0717_from 22U to 10U for follow M12

C678

C678

C177

C177

C674

C116

C116

C176

C176
10U/6.3V_8

10U/6.3V_8

C C

C680

C680
10U/6.3V_8

10U/6.3V_8

B B

A A

10U/6.3V_8

10U/6.3V_8

C679

C679
10U/6.3V_8

10U/6.3V_8

10U/6.3V_8

10U/6.3V_8

C684

C684
10U/6.3V_8

10U/6.3V_8

C172

C172

10U/6.3V_6

10U/6.3V_6

C120

C120

10U/6.3V_6

10U/6.3V_6

10U/6.3V_8

10U/6.3V_8

C685

C685
10U/6.3V_8

10U/6.3V_8

C119

C119

10U/6.3V_6

10U/6.3V_6

C180

C180

10U/6.3V_6

10U/6.3V_6

C674
10U/6.3V_8

10U/6.3V_8

C675

C675
10U/6.3V_8

10U/6.3V_8

C192

C192

10U/6.3V_6

10U/6.3V_6

C181

C181

10U/6.3V_6

10U/6.3V_6

5

C117

C117
10U/6.3V_8

10U/6.3V_8

C683

C683
10U/6.3V_8

10U/6.3V_8

C186

C186

10U/6.3V_6

10U/6.3V_6

C175

C175

10U/6.3V_6

10U/6.3V_6

+VCC_CORE

C673

C673
10U/6.3V_8

10U/6.3V_8

C682

C682
10U/6.3V_8

10U/6.3V_8

C179

C179

10U/6.3V_6

10U/6.3V_6

C118

C118

10U/6.3V_6

10U/6.3V_6

AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26

Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100

CPU-989P-rPGA

CPU-989P-rPGA

VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8

VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24

VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30

PEG AND DDR

PEG AND DDR

VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39

VCCIO40

VIDALERT#

VIDSCLK

SENSE LINES SVID

SENSE LINES SVID

VIDSOUT

VCC_SENS E
VSS_SEN SE

VCCIO_SE NSE

VSSIO_S ENSE

4

CORE SUPPLY

CORE SUPPLY

CPU VTT

SNB 45W:8.5A

30uF/6mohm x 2

3

22uF x 12

22uF x 7 (Non-stuff)

AH13
AH10
AG10

X00:0717_from 22U to 10U for follow M12

AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12

E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

J23

AJ29
AJ30
AJ28

0613-Sun_Remove option RES due
to

AJ35
AJ34

B10
A10

C672

C672

C34

C34

10U/6.3V_8

10U/6.3V_8

10U/6.3V_8

10U/6.3V_8

C671

C671

C676

C676

10U/6.3V_8

10U/6.3V_8

10U/6.3V_8

10U/6.3V_8

C657

C657

C658

C658

*22U/6.3V_8_NC

*22U/6.3V_8_NC

*22U/6.3V_8_NC

*22U/6.3V_8_NC

R502 *0_shortR502 *0_short

H_CPU_SVIDALRT#
VR_VID_SCLK
H_CPU_SVIDDAT

X02-15

implementing in PWM side.

VCC_SENSE 43
VSS_SENSE 43

VTT_VCC_SENSE 45
VTT_VSS_SENSE 45

PS_S3CNTRL_S8

C35

C35
10U/6.3V_8

10U/6.3V_8

C667

C667
10U/6.3V_8

10U/6.3V_8

22uF (Reserved)

C661

C661

*22U/6.3V_8_NC

*22U/6.3V_8_NC

+1.05V_VTT

+1.05V_VTT

C681

C681
10U/6.3V_8

10U/6.3V_8

C157

C157
10U/6.3V_6

10U/6.3V_6

C31

C31
*22U/6.3V_8_NC

*22U/6.3V_8_NC

3

PS_S3CNTRL_S

CPU VGT

SNB 45W:22A

70uF/4mohm x 2

4

22uF x 12

X00:0717_from 22U to 10U for follow M12

C217

C217

C230

C25

C25
10U/6.3V_8

10U/6.3V_8

C131

C131
10U/6.3V_6

10U/6.3V_6

C686

C686
10U/6.3V_8

10U/6.3V_8

C99

C99
10U/6.3V_6

10U/6.3V_6

C230
10U/6.3V_8_SW

10U/6.3V_8_SW

C250

C250
10U/6.3V_8_SW

10U/6.3V_8_SW

C188

C188

10U/6.3V_6_SW

10U/6.3V_6_SW

10U/6.3V_8_SW

10U/6.3V_8_SW

C247

C247

10U/6.3V_8_SW

10U/6.3V_8_SW

C191

C191

10U/6.3V_6_SW

10U/6.3V_6_SW

22uF (Reserved)

C187

C187

C251

C251

*22U/6.3V_8_SW_NC

*22U/6.3V_8_SW_NC

*22U/6.3V_8_SW_NC

*22U/6.3V_8_SW_NC

R158 0/J_4_DISR158 0/J_4_DIS

Ra 0 ohm

CPU VCCPL

SNB 45W:3A

10uF x 1

1

uF x 2

63 X01

Q21

Q21
*2N7002K_NC

*2N7002K_NC

2

+1.8V_RUN

C660

C660

10U/6.3V_6

10U/6.3V_6

A00-4

+VDDR_REF_CPU+SMDDR_VREF

1

3

+1.5V_CPU

R53

R53
1K/F

1K/F

1 2

R57

R57

C616

C616

0.1U

0.1U
1K/F

1K/F

X7R

X7R

1 2

25V

25V

1 2

Sandy Bridge Processor (GRAPHIC POWER)

POWER

R137

R137
75/J_4

75/J_4

2

POWER

VAXG_SE NSE

VSSAXG_ SENSE

SENSE

LINES

SENSE

LINES

VREFMISC

VREFMISC

GRAPHICS

GRAPHICS

DDR3 -1.5V RAILS

DDR3 -1.5V RAILS

SA RAIL

SA RAIL

VCCSA_SE NSE

1.8V RAIL

1.8V RAIL

+1.05V_VTT

X0160

VCCSA_VI D1

S3 Power reduce

SVID CLK

Close to VR

R364

R364

54.9/F_4

54.9/F_4

VR_VID_SCLK 43

SVID DATA

Close to VR

R379

R379
130/F_4

130/F_4

VR_VID_SDAT 43

SVID ALERT

+VCC_iGPU_CORE

C216

C216

C246

C246

10U/6.3V_8_SW

10U/6.3V_8_SW

10U/6.3V_8_SW

10U/6.3V_8_SW

C231

C231

C229

C229

10U/6.3V_8_SW

10U/6.3V_8_SW

10U/6.3V_8_SW

10U/6.3V_8_SW

C189

C189

C190

C190

10U/6.3V_6_SW

10U/6.3V_6_SW

10U/6.3V_6_SW

10U/6.3V_6_SW

C218

C218

C244

C244

*22U/6.3V_8_SW_NC

*22U/6.3V_8_SW_NC

*22U/6.3V_8_SW_NC

*22U/6.3V_8_SW_NC

Ra

DISNASW

C666

C666

C662

C662
1U/6.3V_4

1U/6.3V_4

Layout note: need routing
together and ALERT need
between CLK and DATA

1U/6.3V_4

1U/6.3V_4

C659

C659
*22U/6.3V_8_NC

*22U/6.3V_8_NC

X02-15

Place PU resistor close to CPU

+1.05V_VTT +1.05V_VTT

H_CPU_SVIDDAT

Place PU resistor close to CPU

H_CPU_SVIDALRT#

R136 43/J_4R136 43/J_4

R138

R138
130/F_4

130/F_4

AM24
AM23
AM21
AM20
AM18
AM17

AK24
AK23
AK21
AK20
AK18
AK17

AH24
AH23
AH21
AH20
AH18
AH17

AT24
AT23
AT21
AT20
AT18
AT17
AR24
AR23
AR21
AR20
AR18
AR17
AP24
AP23
AP21
AP20
AP18
AP17
AN24
AN23
AN21
AN20
AN18
AN17

AL24
AL23
AL21
AL20
AL18
AL17

AJ24
AJ23
AJ21
AJ20
AJ18
AJ17

B6
A6
A2

U28G

U28G

VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54

VCCPLL1
VCCPLL2
VCCPLL3

CPU-989P-rPGA

CPU-989P-rPGA

VR_VID_SCLK

X0160

+1.05V_VTT

0622-Sun_Remove option RES due
to implementing in PWM side.

AK35
AK34

CAD Note: +VDDR_REF_CPU should
have 10 mil tra ce width

+VDDR_REF_CPU

AL1

SM_VREF

C198

C198
1U/6.3V_4

1U/6.3V_4

AF7

VDDQ1

AF4

VDDQ2

AF1

VDDQ3

AC7

VDDQ4

AC4

VDDQ5

AC1

VDDQ6

Y7

VDDQ7

Y4

VDDQ8

Y1

VDDQ9

U7

VDDQ10

U4

VDDQ11

U1

VDDQ12

P7

VDDQ13

P4

VDDQ14

P1

VDDQ15

M27

VCCSA1

M26

VCCSA2

L26

VCCSA3

J26

VCCSA4

J25

VCCSA5

J24

VCCSA6

H26

VCCSA7

H25

VCCSA8

H23

H_FC_C22

C22

FC_C22

C24

VR_VID_ALERT# 43

TP4TP4

VCC_AXG_SENSE 43
VSS_AXG_SENSE 43

TP2TP2

+VDDR_REF_CPU

CPU MCH

SNB 45W: 5A

330uF/6mohm x 1

10uF x 6

C112

C112

C113

10U/6.3V_6

10U/6.3V_6

C193

C193

10U/6.3V_6

10U/6.3V_6

C113

*10U/6.3V_NC

*10U/6.3V_NC

C111

C111

10U/6.3V_6

10U/6.3V_6

C167

C167

10U/6.3V_6

10U/6.3V_6

X00:0621-Sun_Reserve for PWR.

C665

C665

C664

C664

*22U_NC

*22U_NC

*22U_NC

*22U_NC

0805

0805

0805

0805

6.3V

6.3V

6.3V

6.3V

C670

C100

C100

10U/6.3V_6

10U/6.3V_6

C670

10U/6.3V_6

10U/6.3V_6

VCCSA_SENSE 48

C101

C101

10U/6.3V_6

10U/6.3V_6

0603

0603

6.3V

6.3V

X02-15

R45 10KR45 10K

VCCSA_VID 48

4.5A

9
8
762

5

9
8
762

5

PS_S3CNTRL_S8

Title

Title

Title

SNB 3/4_POWER

SNB 3/4_POWER

SNB 3/4_POWER

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

PS_S3CNTRL_S

PS_S3CNTRL4,8,14

X02-17

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project Name:

Project Name:

Project Name:

GM7C_MB C

GM7C_MB C

GM7C_MB C

1

5

4

3

2

1

Sandy Bridge Processor (GND)

U28I

T35
T34
T33
T32
T31
T30
T29
T28
T27
T26

N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
M34

K35
K32
K29
K26

H33
H30
H27
H24
H21
H18
H15
H13
H10

G35
G32
G29
G26
G23
G20
G17
G11
F34
F31
F29

U28I

VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187

L33

VSS188

L30

VSS189

L27

VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198
VSS199
VSS200
VSS201
VSS202

J34

VSS203

J31

VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233

VSS

VSS

VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285

F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3

+3.3V_RUN

Sandy Bridge Processor (RESERVED, CFG)

U28E

U28E

A00-12

TP12TP12

TP1TP1

TP7TP7

CFG0

CFG2

CFG4CFG4
CFG5
CFG6
CFG7CFG7

X02-28

R46 *10K _NCR46 *10K_NC

AK28

CFG[0]

AK29

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD5

B4

RSVD6

D1

RSVD7

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

A19

VCCIO_SEL

J15

RSVD27

CPU-989P-rPGA

CPU-989P-rPGA

RESERVED

RESERVED

VCC_DIE_SENSE

RSVD28
RSVD29
RSVD30
RSVD31
RSVD32

RSVD33
RSVD34
RSVD35

RSVD37
RSVD38
RSVD39
RSVD40

RSVD41
RSVD42
RSVD43
RSVD44
RSVD45

RSVD46
RSVD47
RSVD48
RSVD49
RSVD50

RSVD51
RSVD52

RSVD54
RSVD55

RSVD56
RSVD57
RSVD58

KEY

L7
AG7
AE7
AK2
W8

AT26
AM33
AJ27

T8
J16
H16
G16

AR35
AT34
AT33
AP35
AR34

B34
A33
A34
B35
C35

AJ32
AK32

AH27

AN35
AM35

AT2
AT1
AR1

B1

07

A00-12

TP3TP3

#27636 SNB EDS0.7v1 no function.

For rPGA socket, RSVD59 pin should be left NC

TP8TP8

U28H

U28H

AT35

VSS1

AT32

VSS2

AT29

VSS3

AT27

VSS4

AT25

VSS5

AT22

VSS6

AT19

VSS7

AT16

VSS8

AT13

D D

C C

B B

AT10

AT7
AT4

AT3
AR25
AR22
AR19
AR16
AR13
AR10

AR7

AR4

AR2
AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10

AP7

AP4

AP1
AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10

AN7

AN4
AM29
AM25
AM22
AM19
AM16
AM13
AM10

AM7

AM4

AM3

AM2

AM1

AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10

AL7

AL4

AL2
AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10

AK7

AK4

AJ25

VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80

VSS

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH26
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2

CPU-989P-rPGA

CPU-989P-rPGA

CPU-989P-rPGA

Processor Strapping

The CFG signals have a default value of '1' if not terminated on the board.

1 0

CFG2

A A

(PEG Static Lane Reversal)

CFG4
(DP Presence Strap)

CFG7
(PEG Defer Training)

Normal Operation Lane Reversed

Disable; No physical DP attached to eDP

PEG train immediately following
xxRESETB de assertion

5

CPU-989P-rPGA

Enable; An ext DP device is connected to eDP

PEG wait for BIOS training

4

CFG2

CFG4

R143 *1K/F_4_NCR143 *1K/F_4_NC

CFG7

R147 *1K/F_4_NCR147 *1K/F_4_NC

CFG5

R146 *1K/F_4_NCR146 *1K/F_4_NC

CFG6

R151 *1K/F_4_NCR151 *1K/F_4_NCR142 *1K /F_4_NCR142 *1K/F_4_NC

3

CFG[6:5] (PCIE Port Bifurcation Straps)

11: (Default) x1 6 - Device 1 fun ctions 1 and 2 d isabled
10: x8, x8 - Dev ice 1 function 1 enabled ; funct ion 2 disabled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - D evice 1 function s 1 and 2 enable d

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project Name:

Project Name:

Title

Title

Title

SNB 4/4_GND

SNB 4/4_GND

SNB 4/4_GND

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet

Project Name:

GM7C_MB C

GM7C_MB C

GM7C_MB C

GM7C

GM7C

GM7C

7 59Friday, January 21, 2011

7 59Friday, January 21, 2011

1

7 59Friday, January 21, 2011

of

5

4

3

2

1

Cougar Point (LVDS,DDI)

U31D

Cougar Point (DMI,FDI,PM)

U31C

U31C

D D

C C

PM_DRAM_PWRGD4

ME_SUS_PWR_ACK30

B B

SIO_PWRBTN#30

AC_PRESENT30

+1.05V_PCH

RSMRST#30

DMI_RXN04
DMI_RXN14
DMI_RXN24
DMI_RXN34

DMI_RXP04
DMI_RXP14
DMI_RXP24
DMI_RXP34

DMI_TXN04
DMI_TXN14
DMI_TXN24
DMI_TXN34

DMI_TXP04
DMI_TXP14
DMI_TXP24
DMI_TXP34

X02-17

R184 49.9/F_4R184 49.9/F_4

R507 750/F_4R507 750/F_4

X02-15

A00-12

SYS_PWROK4

EC_PWROK30

HWPG30,38

ME_SUS_PWR_ACK

T40T40

SYS_PWROK

EC_PWROK_REC_PWROK_R

PM_DRAM_PWRGD

RSMRST#

ME_SUS_PWR_ACK DAC_IREF

A00-12

AC_PRESENT

T20T20

NC

PCH Pull-high/low System PWR_OK

X02-18

CLKRUN#

R586 10KR586 10K

XDP_DBRST#

R593 10KR593 10K

R594 *1K/J_4_NCR594 *1K/J_4_NC

RSMRST#

SYS_PWROK

R315 10KR315 10K

R154 10KR154 10K

A A

+3.3V_RUN +3.3V_SUS

1 2

PM_RI#

PM_BATLOW#

PCIE_WAKE#

SLP_LAN#

ME_SUS_PWR_ACK

AC_PRESENT

PM_DRAM_PWRGD

3/16 Change topology; 200ohm PU to +3V_S5

5

BC24
BE20
BG18
BG20

BE24
BC20

BJ18
BJ20

AW24
AW20

BB18
AV18

AY24
AY20
AY18
AU18

BJ24

DMI_COMP

BG25

DMI2_RBIAS

BH21

C12

XDP_DBRST#

P12

L22

L10

B13

C21

K16

E20

H20

PM_BATLOW#

E10

PM_RI#

A10

X02-18

R604 10KR604 10K

R334 10KR334 10K

1 2

R603 10KR603 10K

R295 *10K/J_4_NCR295 *10K/J_4_NC

R311 10KR311 10K

R281 10KR281 10K

R336 200/F_4R336 200/F_4

DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN

DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP

DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN

DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP

DMI_ZCOMP

DMI_IRCOMP

DMI2RBIAS

SUSACK#

K3

SYS_RESET#

SYS_PWROK

PWROK

APWROK

DRAMPWROK

RSMRST#

SUSWARN#/SU SPWRDNACK/GPIO30

PWRBTN#

ACPRESENT / GPIO31

BATLOW# / GPIO72

RI#

COUGARPOINT -SLH9C-MM#908752

COUGARPOINT -SLH9C-MM#908752

+3V_S5

+3V_S5

+3V_S5

SYS_PWROK4

If populate R185,
also need to
de-populate R154
to avoid the
voltage divid on
SYS_PWROK.

BJ14

FDI_RXN0

AY14

FDI_RXN1

BE14

FDI_RXN2

BH13

FDI_RXN3

BC12

FDI_RXN4

BJ12

FDI_RXN5

BG10

FDI_RXN6

BG9

FDI_RXN7

BG14

FDI_RXP0

BB14

FDI_RXP1

BF14

FDI_RXP2

BG13

FDI_RXP3

BE12

FDI_RXP4

BG12

FDI_RXP5

BJ10

FDI_RXP6

DMI

FDI

DMI

FDI

+3V

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

+3V_S5

SUSCLK / GPIO62

+3V_S5

SLP_S5# / GPIO63

System Power Management

System Power Management

+3V_S5

DSW

SLP_LAN# / GPIO29

FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

SYS_PWROK

BH9

FDI_INT_R

AW16

FDI_FSYNC0_R

AV12

FDI_FSYNC1_R

BC10

FDI_LSYNC0_R

AV14

FDI_LSYNC1_R

BB10

A18

E22

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

R185 *0/J_4_NCR185 *0/J_4_NC

U12

U12

4

TC7SH08

TC7SH08

4

FDI_TXN0 4
FDI_TXN1 4
FDI_TXN2 4
FDI_TXN3 4
FDI_TXN4 4
FDI_TXN5 4
FDI_TXN6 4
FDI_TXN7 4

FDI_TXP0 4
FDI_TXP1 4
FDI_TXP2 4
FDI_TXP3 4
FDI_TXP4 4
FDI_TXP5 4
FDI_TXP6 4
FDI_TXP7 4

R202 0/J_4_SWR202 0/J_4_SW

4

3

2

1

DSWVREN

RSMRST#

SUS_STAT#

PCH_SUSCLK

SLP_S4#

SIO_SLP_S3#

RP6 0_SWRP6 0_SW

RP7 0_SWRP7 0_SW

X02-15

PCIE_WAKE#

CLKRUN#

3
1

T17T17

T16T16

T11T11

4
2

PCIE_WAKE# 36,37

CLKRUN# 30

W/O support

W/O support iAMT

W/O support Deep Sx

H_PM_SYNC 4

SLP_LAN#

LAN power is +3.3V_SUS on IO/B.

+3.3V_SUS

3 5

C248

0.1U/16V_4

0.1U/16V_4

2

1

W/O support iAMT

T15T15

X0154

EC_PWROK

R155

R155
100K

100K

IMVP_PWRGD 30,31,43

SIO_SLP_S5# 30

SIO_SLP_S3# 30

FDI_INT 4

FDI_FSYNC0 4
FDI_FSYNC1 4

FDI_LSYNC0 4
FDI_LSYNC1 4

On Die DSW VR E nable

High = Enable ( Default)

Low = Disable

DSWVREN

+RTC_CELL

3

PANEL_BKEN30

INT_ENVDD28

INT_LCD_PWM28

INT_LCD_DDCCLK39
INT_LCD_DDCDAT39

+3.3V_RUN

R355

R355
330K/J_4

330K/J_4C248

R354

R354
*330K/J_4_NC

*330K/J_4_NC

INT_ENVDD

INT_LCD_DDCCLK
INT_LCD_DDCDAT

R584 2.2K/J_4R584 2.2K/J_4
R589 2.2K/J_4R589 2.2K/J_4

R217 2.37K/F_4R217 2.37K/F_4

INT_LVDS_A_CLKN39
INT_LVDS_A_CLKP39

INT_LVDS_A_DN039
INT_LVDS_A_DN139
INT_LVDS_A_DN239

INT_LVDS_A_DP039
INT_LVDS_A_DP139
INT_LVDS_A_DP239

INT_LVDS_B_CLKN39

INT_LVDS_B_CLKP39

INT_LVDS_B_DN039
INT_LVDS_B_DN139
INT_LVDS_B_DN239

INT_LVDS_B_DP039
INT_LVDS_B_DP139
INT_LVDS_B_DP239

S3 Power Reduce

R2391KR239
1K

PS_S3CNTRL4,6,14

SIO_SLP_S3#

U31D

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_C LK

P39

L_CTRL_D ATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_ CLK

M40

CRT_DDC_ DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

COUGARPOINT -SLH9C-MM#908752

COUGARPOINT -SLH9C-MM#908752

+5V_ALW2

34

5

R16

R16
*10K/J_4_NC

*10K/J_4_NC

R19

R19
10K

10K

PS_S3CNTRL

PQ3A

PQ3A
2N7002DW-7-F

2N7002DW-7-F

SDVO_STALLP

SDVO_INTN
SDVO_INTP

DDPB_AUXN

DDPB_AUXP

DDPB_HPD

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

DDPC_AUXN
DDPC_AUXP

DDPC_HPD

DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

DDPD_AUXN
DDPD_AUXP

DDPD_HPD

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

AP43
AP45

AM42
AM40

AP39
AP40

P38
M39

AT49
AT47
AT40

AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49

P46
P42

AP47
AP49
AT38

AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49

M43
M36

AT45
AT43
BH41

BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_STALLN

SDVO_CTRLCL K

SDVO_CTRLDATA

LVDS

LVDS

DDPC_CTR LCLK

DDPC_CTR LDATA

Digital Display Interface

Digital Display Interface

DDPD_CTR LCLK

DDPD_CTR LDATA

CRT

CRT

+15V_ALW

R21

R21
100K

100K

PS_S3CNTRL_S

61

2

PQ3B

PQ3B
2N7002DW-7-F

2N7002DW-7-F

2

INT_DP_SCL
INT_DP_SDA

INT_DP_HPD

PS_S3CNTRL_S 6

INT_LCD_DDCCLK
INT_LCD_DDCDAT
INT_DP_SCL
INT_DP_SDA

INT_ENVDD

INT_DP_SCL 41
INT_DP_SDA 41

INT_DP_AUXN 41
INT_DP_AUXP 41

INT_DP_TXN0 41
INT_DP_TXP0 41
INT_DP_TXN1 41
INT_DP_TXP1 41
INT_DP_TXN2 41
INT_DP_TXP2 41
INT_DP_TXN3 41
INT_DP_TXP3 41

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

R403 2.2KR403 2.2K
R404 2.2KR404 2.2K
R222 2.2KR222 2.2K
R226 2.2KR226 2.2K

R592 100KR592 100K

12

INT. DP

Follow CRB

2N7002K-T1-E3 Vgs(max)=2.5V, change a small
one BSS138-7-F Vgs(max)=1.5V

INT_DP_HPD

R510

R510
100K

100K

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project Name:

Project Name:

PCH 1/6 (DMI/FDI/VIDEO)

PCH 1/6 (DMI/FDI/VIDEO)

PCH 1/6 (DMI/FDI/VIDEO)

Project Name:

GM7C_MB C

GM7C_MB C

GM7C_MB C

1

+3.3V_RUN

INT_DP_HPD 22,36

GM7C

GM7C

GM7C

8 59Friday, January 21, 2011

8 59Friday, January 21, 2011

8 59Friday, January 21, 2011

08

5

RTC Circuitry(RTC)

+RTC_CELL

R373 20K/J_4R373 20K/J_4

C458

C458
1U/6.3V_4

30mils

R374 20K/J_4R374 20K/J_4

D D

C410

C410
*1U/6.3V_NC

*1U/6.3V_NC

1U/6.3V_4

C399

C399
1U/6.3V_4

1U/6.3V_4

HDA Bus

ACZ_BITCLK36

ACZ_SYNC36

ACZ_RST#30,36

ACZ_SDOUT36

PCH JTAG Debug

C C

+3.3V_RUN

B B

A A

+3.3V_SUS

R285

R285
210/F_4

210/F_4

R266

R266

R288

R288

51/J_4

51/J_4

100/F_4

100/F_4

R377 10KR377 10K
R227 *10K/J_4_NCR227 *10K/J_4_NC

RTC_RST#

SRTC_RST#

R283 33/J_4R283 33/J_4

C592 *22P/50V_NC

C592 *22P/50V_NC

50 N PO

50 N PO

R322 33/J_4R322 33/J_4

R298 33/J_4R298 33/J_4

R316 33/J_4R316 33/J_4

R282

R282

R274

R274

210/F

210/F

210/F_4

210/F_4

R276

R276

R286

R286

100/F_4

100/F_4

100/F

100/F

WWAN_RADIO_DIS#

MODC_EN

X0163

ACZ_BITCLK_R

X02-11

ACZ_SYNC_L

ACZ_RST#_R

ACZ_SDOUT_R

A00-12

PCH_JTAG_TMS_R
PCH_JTAG_TDO_R
PCH_JTAG_TDI_R
PCH_JTAG_TCK_R

X02-05

4

C415 18P/50V_4C415 18P/50V_4

C416 18P/50V_4C416 18P/50V_4

Add MOSFET to separate
Audio codec SYNC signal
from On-Die PLL VR
Voltage select strap
sampling at RSMRST#

ACZ_SYNC_L

+5V_RUN

2N7002K

2N7002K

2

1

Q32

Q32

WWAN_RADIO_DIS#36

PCH Strap Table

Pin Name

SPKR

GNT3# / GPIO55

INTVRMEN

GNT1# / GPIO51

GPIO19

HDA_SDO

DF_TVS

GPIO28

HDA_SYNC On-Die PLL VR Voltage Select RSMRST

GPIO8

SPI_MOSI

NV_ALE

Strap description

No reboot mode setting PWROK

Top-Block Swap Override

Integrated 1.05V VRM enable ALWAYS Should be always pull-up

Boot BIOS Selection 1 [bit-1]

Boot BIOS Selection 0 [bit-0]

Flash Descriptor Security

DMI/FDI Termination voltage

On-die PLL Voltage Regulator RSMRST#

Integrated Clock Chip Enable

iTPM function Disable APWROK

Intel Anti-Theft HDD protection PWROK 0 = Disable (Internal pull-down 20kohm)

+RTC_CELL

+3.3V_SUS

23

Y2

32.768KHZY232.768KHZ

4 1

3

PCH_MELOCK30

A00-12

3

X0151

R290

R290
10M/J_4

10M/J_4

X0118

R339 1M /J_4R339 1M/J_4

SPKR36

ACZ_SDIN036

R306 1K_4R306 1K_4

WWAN_RADIO_DIS#

PCH_SPI_CLK32

PCH_SPI_CS0#32

R560 * 10K/J_4_NCR560 *10K/J_4_N C

PCH_SPI_SI32

PCH_SPI_SO32

Sampled

PWROK

PWROK

PWROK

RSMRST

PWROK

RSMRST#

Cougar Point (HDA,JTAG,SATA)

U31A

RTC_X1

RTC_X2

RTC_RST#

SRTC_RST#

SM_INTRUDER#

PCH_INVRMEN

ACZ_BITCLK_R

ACZ_SYNC_R

SPKR

ACZ_RST#_R

ACZ_SDOUT_R

TP14TP14

NC

PCH_JTAG_TCK_R

PCH_JTAG_TMS_R

PCH_JTAG_TDI_R

PCH_JTAG_TDO_R

PCH_SPI_CS1#

Configuration

0 = Default (weak pull-down 20K)
1 = Setting to No-Reboot mode

0 = "top-block swap" mode
1 = Default (weak pull-up 20K)

0 = Override
1 = Default (weak pull-up 20K)

For Sandy Bridge processor only:
DF_TVS needs to be pulled up to VccDFTERM
powerrail through 2.2 k Ohm resistor.

0 = Disable
1 = Enable (Default)

0 = Support by 1.8V (weak pull-down)
1 = Support by 1.5V

Should be pull-down
(weak pull-up 20K)

0 = Default (weak pull-down 20K)
1 = Enable

A20

C20

D20

G22

K22

C17

N34

L34

T10

K34

E34

G34

C34

A34

A36

C36

N32

H7

K5

H1

T3

Y14

T1

V4

U3

GNT0#GNT1#

11

00

U31A

RTCX1

RTCX2

RTCRST#

SRTCRST#

INTRUDER#

INTVRMEN

HDA_BCLK

HDA_SYNC

SPKR

HDA_RST#

HDA_SDIN0

HDA_SDIN1

HDA_SDIN2

HDA_SDIN3

HDA_SDO

HDA_DOCK_EN# / GPIO33

HDA_DOCK_RST# / GPIO13

J3

JTAG_TCK

JTAG_TMS

JTAG_TDI

JTAG_TDO

SPI_CLK

SPI_CS0#

SPI_CS1#

SPI_MOSI

SPI_MISO

COUGARPOINT -SLH9C-MM#908752

COUGARPOINT -SLH9C-MM#908752

Boot Location

SPI

*

LPC

2

C38

FWH0 / LAD0

A38

FWH1 / LAD1

B37

FWH2 / LAD2

C37

FWH3 / LAD3

LPC

LPC

FWH4 / LFRAME#

+3V

LDRQ1# / GPIO23

RTCIHDA

RTCIHDA

SATA 6G

SATA 6G

+3V

SATA

SATA

+3V_S5

JTAG

JTAG

SATA3RCOMPO

SPI

SPI

+3V

SATA0GP / GPIO21

+3V

SATA1GP / GPIO19

+3.3V_RUN

+RTC_CELL

Default weak pull-up on GNT0/1#
[Need external pull-down for LPC BIOS]

+3.3V_RUN

+1.8V_RUN

+3.3V_SUS

D36

E36

LDRQ0#

K36

V5

SERIRQ

AM3

SATA0RXN

AM1

SATA0RXP

AP7

SATA0TXN

AP5

SATA0TXP

AM10

SATA1RXN

AM8

SATA1RXP

AP11

SATA1TXN

AP10

SATA1TXP

AD7

SATA2RXN

AD5

SATA2RXP

AH5

SATA2TXN

AH4

SATA2TXP

AB8

SATA3RXN

AB10

SATA3RXP

AF3

SATA3TXN

AF1

SATA3TXP

Y7

SATA4RXN

Y5

SATA4RXP

AD3

SATA4TXN

AD1

SATA4TXP

Y3

SATA5RXN

Y1

SATA5RXP

AB3

SATA5TXN

AB1

SATA5TXP

Y11

SATAICOMPO

Y10

SATAICOMPI

AB12

AB13

SATA3COMPI

AH1

SATA3RBIAS

P3

SATALED#

V14

P1

R291 * 1K/J_4_NCR291 *1K/J_4_NC

R328 * 1K/J_4_NCR328 *1K/J_4_NC

R361 330K/J _4R361 330K/J_4

R329 * 1K/J_4_NCR329 *1K/J_4_NC

R582 * 1K/J_4_NCR582 *1K/J_4_NC

R317 * 1K/J_4_NCR317 *1K/J_4_NC

R512 2.2KR512 2. 2K

R357 *1K/J_4_NCR357 *1K/J _4_NC

R255 1K/J_4R255 1K/J_4

PCH_DRQ#0
eDP_SELECT#

R104 10KR104 10K

SATA_RXN3
SATA_RXP3
SATA_TXN3
SATA_TXP3

SATA_COMP

SATA3_COMP

SATA3_RBIAS

Open-drain output

MODC_EN

BBS_BIT0

SPKR

PCI_GNT3# 10

PCH_INVRMEN

BBS_BIT1 10

BBS_BIT0

ACZ_SDOUT_R

Need check schematic

TP15TP15

eDP_SELECT# 28

12

TP10TP10
TP11TP11
TP18TP18
TP17TP17

R228 37. 4/F_4R228 37.4/F _4

R225 49. 9/F_4R225 49.9/F _4

R538 750/F _4R538 750/F _4

T34T34

DF_TVS 11

PLL_ODVR_EN 11

ACZ_SYNC_R

1

LAD0 30,36
LAD1 30,36
LAD2 30,36
LAD3 30,36

LFRAME# 30,36

R635 4.7K_EDPR635 4.7K_EDP

+1.05V_PCH

+3.3V_RUN

IRQ_SERIRQ 30

SATA_RXN0 35
SATA_RXP0 35
SATA_TXN0 35
SATA_TXP0 35

SATA_RXN5 35
SATA_RXP5 35
SATA_TXN5 35
SATA_TXP5 35

SATA_RXN4 36
SATA_RXP4 36
SATA_TXN4 36
SATA_TXP4 36

SATA_RXN1 35
SATA_RXP1 35
SATA_TXN1 35
SATA_TXP1 35

R581

R581
10K

10K

SATA_ACT# 34

MODC_EN 35

SATA HDD0

SATA HDD1

ESATA

A

TA ODD

S

15 X01

15 X01

X02-05

+3.3V_RUN

NC

A00-3

New Add in CPT EDS Rev1.0 at 0316

New Add in CPT EDS Rev1.0 at 0316

3/16 Remove based on CPT EDS rev1.0

3/16 Remove based on CPT EDS rev1.0

3/16 Remove based on CPT EDS rev1.0

09

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project Name:

Project Name:

Title

Title

Title

PCH 2/6(SATA/RTC/HDA/LPC)

PCH 2/6(SATA/RTC/HDA/LPC)

PCH 2/6(SATA/RTC/HDA/LPC)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Project Name:

GM7C_MB C

GM7C_MB C

GM7C_MB C

1

GM7C

GM7C

GM7C

9 59Friday, January 21, 2011

9 59Friday, January 21, 2011

9 59Friday, January 21, 2011

5

4

3

2

1

Cougar Point-M (PCI-E,SMBUS,CLK)

Cougar Point-M (PCI,USB,NVRAM)

U31E

U31E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

D D

C C

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

A01-5

BBS_BIT19

TP19TP19

TP16TP16

R304 22/J_4R304 22/J_4

R238 22/J_4R238 22/J_4

R278 22/J_4R278 22/J_4

C424

C424
*0.1U/10V_NC

*0.1U/10V_NC

4

DGPU_HOLD_RST#
MPC_PWR_CTRL#
DGPU_PWR_EN

BBS_BIT1
PCIE_MCARD2_DET#
PCI_GNT3#

HDD_FALL_INT1
SATA_ODD_DA#

PCI_PIRQG#

EXT_HDMI_HPD_SW

PCI_PME#

PCI_PLTRST#

CLK_LPC_DEBUG_R

CLK_PCI_EC_R

PLTRST#

R305

R305
*100K_NC

*100K_NC

DGPU_HOLD_RST#19

DGPU_PWR_EN40,51

X0160

NC

PCIE_MCARD2_DET#36

PCI_GNT3#9

HDD_FALL_INT135

X02-05

SATA_ODD_DA#35

EXT_HDMI_HPD_SW40

NC

CLK_LPC_DEBUG36

CLK_PCI_EC30

B B

PCI_PLTRST#

CLK_PCI_FB CLK_PCI_FB_R

C423 *4.7P/50V_NCC423 *4.7P/50V_NC

CLK_LPC_DEBUG

C401 *4.7P/50V_NCC401 *4.7P/50V_NC

CLK_PCI_EC

+3.3V_SUS

2

1

3 5

U17

U17
*TC7SH08FU_NC

*TC7SH08FU_NC

AK43
AK45

C18
N30

H3

AH12

AM4
AM5

Y13
K24

L24
AB46
AB45

B21

M20
AY16
BG46

BE28
BC30
BE32
BJ32
BC28
BE30
BF32
BG32
AV26
BB26
AU28
AY30
AU26
AY26
AV28

AW30

K40
K38
H38
G38

C46
C44
E40

D47
E42
F46

G42
G40
C42
D44

A01-5

K10

C6

H49
H43
J48
K42
H40

COUGARPOINT -SLH9C-MM#908752

COUGARPOINT -SLH9C-MM#908752

PLTRST# 4,19,29,30,36,37

TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP20

TP21
TP22
TP23
TP24

TP25
TP26
TP27
TP28
TP29
TP30
TP31
TP32
TP33
TP34
TP35
TP36
TP37
TP38
TP39
TP40

PIRQA#
PIRQB#
PIRQC#
PIRQD#

REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54

GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55

PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5

PME#

PLTRST#

CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4

RSVD

RSVD

+3V
+3V
+3V

+3V
+3V
+3V

+3V
+3V
+3V
+3V

PCI

PCI

USB

USB

+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5

A01-2

R108 0R108 0

1 2

A00-5

X00:0613-Sun_GPU_ RST# control logic placed on GPU page.

A A

5

RSVD1
RSVD2
RSVD3
RSVD4

RSVD5
RSVD6

RSVD7
RSVD8

RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22

RSVD23
RSVD24

RSVD25

RSVD26
RSVD27

RSVD28
RSVD29

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

USBP2P

USBP3N

USBP3P

USBP4N

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP8N

USBP8P

USBP9N

USBP9P

USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43

OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

AY7
AV7
AU3
BG4

AT10
BC8

AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6

AV5
AV10

AT8

AY5
BA2

AT12
BF3

C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32

C33

B33

USB_OC0#

A14

USB_OC1#

K20

USB_OC2#

B17

USB_OC3#

C16

USB_OC4#

L16

USB_OC5#

A16

USB_OC6#

D14

SIO_EXT_WAKE#

C14

USB_OC4#
USB_OC1#
USB_OC2#
USB_OC3#

NV_ALE

TP9TP9

USBP0­USBP0+
USBP1­USBP1+

USBP4­USBP4+
USBP5­USBP5+

USBP9­USBP9+
USBP10­USBP10+
USBP11­USBP11+

USB_BIAS

USBP0- 36
USBP0+ 36
USBP1- 37
USBP1+ 37

USBP4- 36
USBP4+ 36
USBP5- 36
USBP5+ 36

X02-31

USBP9- 34
USBP9+ 34
USBP10- 39
USBP10+ 39
USBP11- 28
USBP11+ 28

R277 22.6/F_4R277 22.6/F_4

Route USB_BIAS w/50 ohm on out layer,
length < 500 mils

USB_OC0# 36
USB_OC1# 37

NC

SIO_EXT_WAKE# 30

+3.3V_SUS

R321

R321

10

1

9

2

8

3

7 4

56

10KX8

10KX8

MPC Switch Con trol

MPC_PWR_CTRL#

4

P

USB/ESATA

Left Side USB

Mini Card (WLAN)

Mini Card (WWAN)

Touch Screen Module

3D Panel Emitter.

Camera

Check USB and
OC# mapping.

58 X01

X0133

USB_OC6#
USB_OC0#
SIO_EXT_WAKE#
USB_OC5#

R268*1K/J_4_NC R268*1K/J_4_NC

Low = MPC ON
High = MPC OFF (Default)

GM7 setting

X0133

58 X01

MPC_PWR_CTRL#
PCIE_MCARD2_DET#
HDD_FALL_INT1
SATA_ODD_DA#

EHCI1

EHCI2

GM7 setting

+3.3V_RUN

GM7 setting

Mini_WWAN

Mini_WLAN

USB3.0

Card reader

Giga Bit LOM

WLAN

Card reader

WWAN

Giga Bit LOM

USB3.0

R297

R297

10

9
8
7 4

10KX8

10KX8

CLK_PCIE_MINI136

PCIE_CLKREQ_MINI1#36

BIOS needs to enable
Free-Running

PCIE_CLKREQ_MINI3#36

PCIE_CLKREQ_LOM#36

CLK_PCIE_USB30#37

CLK_PCIE_USB3037

PCIE_CLKREQ_USB3#37

X02-31
A00-8

PCI_PIRQA#

1

PCI_PIRQB#

2

PCI_PIRQC#

3

PCI_PIRQD#

56

3

PCIE_RXN136
PCIE_RXP136
PCIE_TXN136

PCIE_TXP136

PCIE_RXN236
PCIE_RXP236
PCIE_TXN236

PCIE_TXP236

PCIE_RXN437
PCIE_RXP437
PCIE_TXN437

PCIE_TXP437

PCIE_RXN529
PCIE_RXP529
PCIE_TXN529

PCIE_TXP529

PCIE_RXN636
PCIE_RXP636
PCIE_TXN636

PCIE_TXP636

CLK_PCIE_MINI1#36

CLK_PCIE_MINI2#29

CLK_PCIE_MINI229

CLK_PCIE_MINI3#36

CLK_PCIE_MINI336

CLK_PCIE_LOM#36

CLK_PCIE_LOM36

C254 0.1U/16V_ 4C254 0.1U/16V_4
C255 0.1U/16V_ 4C255 0.1U/16V_4

C253 0.1U/16V_ 4C253 0.1U/16V_4
C252 0.1U/16V_ 4C252 0.1U/16V_4

C263 0.1U/16V_ 4C263 0.1U/16V_4
C262 0.1U/16V_ 4C262 0.1U/16V_4

C278 0.1U/16V_ 4C278 0.1U/16V_4
C268 0.1U/16V_ 4C268 0.1U/16V_4

C258 0.1U/16V_ 4C258 0.1U/16V_4
C261 0.1U/16V_ 4C261 0.1U/16V_4

+3.3V_RUN

PCIE_CLKREQ_MINI3#

A00-12

PCIE_TXN1_C
PCIE_TXP1_C

PCIE_TXN2_C
PCIE_TXP2_C

PCIE_TXN4_C
PCIE_TXP4_C

PCIE_TXN5_C
PCIE_TXP5_C

PCIE_TXN6_C
PCIE_TXP6_C

PCIE_CLKREQ0#

NC

X02-12

PCIE_CLKREQ_MINI1#

R237 10KR237 10K

PCIE_CLKREQ4#

NC

PCIE_CLKREQ_LOM#

PCIE_CLKREQ_USB3#

PCIE_CLKREQ6#

NC

PCIE_CLKREQ7#

NC

CLK_PCH_ITPN

T12T12

CLK_PCH_ITPP

T41T41

LK_REQ/Strap Pin

+3.3V_SUS

R597 10KR5 97 10K
R601 10KR6 01 10K
R310 10KR3 10 10K
R313 10KR3 13 10K
R279 10KR2 79 10K
R265 10KR2 65 10K
R335 10KR3 35 10K

+3.3V_RUN

R590 10KR5 90 10K
R326 *10K/J_4_NCR326 *10K/J_4_NC
R633 10K/J_4_DISR633 10K/J_4_DIS
R639 10K/J_4_DISR639 10K/J_4_DIS
R330 10K/J_4R330 10K/J_4
R331 10K/J_4_DISR331 10K/J_4_DIS

+3.3V_SUS

R263 *10K/J_4_NCR263 *10K/J_4_NC
R262 *10K/J_4_NCR262 *10K/J_4_NC

CLK_BUF_BCLKN
CLK_BUF_BCLKP

CLK_BUF_PCIE_3GPLLN
CLK_BUF_PCIE_3GPLLP
CLK_BUF_DREFCLKN
CLK_BUF_DREFCLKP
CLK_BUF_DREFSSCLKN
CLK_BUF_DREFSSCLKP
CLK_PCH_14M

CLOCK TERMINATION for FCIM

12

PCIE_CLKREQ0#
PCIE_CLKREQ_MINI3#
PCIE_CLKREQ4#
PCIE_CLKREQ_LOM#
PCIE_CLKREQ_USB3#
PCIE_CLKREQ6#
PCIE_CLKREQ7#

PCIE_CLKREQ_MINI1#
TEST_WOOFER_EN

DGPU_HOLD_RST#
DGPU_PWR_EN
PCI_PIRQG#
EXT_HDMI_HPD_SW

PEG_CLKREQ_GPU#

R172 10KR172 10K
R167 10KR167 10K

R181 10KR181 10K
R182 10KR182 10K
R267 10KR267 10K
R275 10KR275 10K
R216 10KR216 10K
R212 10KR212 10K
R261 10KR261 10K

U31B

U31B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

COUGARPOINT -SLH9C-MM#908752

COUGARPOINT -SLH9C-MM#908752

A01-5

2

+3V_S5

PCI-E*

PCI-E*

+3V_S5

+3V

+3V

+3V_S5

+3V_S5

+3V_S5

+3V_S5

+3V_S5

+3V_S5

+3.3V_SUS

+3V_S5

SMBALERT# / GPIO11

+3V_S5

SML0ALERT# / GPIO60

SMBUSController

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

+3V_S5

SML1CLK / GPIO58

+3V_S5

SML1DATA / GPIO75

Link

Link

+3V_S5

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N

CLKOUT_PEG_A_P

CLKOUT_DMI_N

CLKIN_PCILOOPBACK

+3V

CLKOUTFLEX0 / GPIO64

+3V

CLKOUTFLEX1 / GPIO65

+3V

CLKOUTFLEX2 / GPIO66

+3V

CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

FLEX CLOCKS

CLKOUT_DMI_P

CLKOUT_DP_N
CLKOUT_DP_P

CLKIN_DMI_N
CLKIN_DMI_P

CLKIN_GND1_N

CLKIN_GND1_P

CLKIN_DOT_96N
CLKIN_DOT_96P

CLKIN_SATA_N
CLKIN_SATA_P

XCLK_RCOMP

CLOCKS

CLOCKS

SMBus/Pull-upC

SMBCLK130

SMBDAT130

R309 10KR309 10K
R294 2.2K /J_4R294 2.2K/J_4
R602 2.2K /J_4R602 2.2K/J_4
R600 2.2K /J_4R600 2.2K/J_4
R293 2.2K /J_4R293 2.2K/J_4

SMBCLK

SMBDATA

SML0CLK

SML0DATA

CL_CLK1

CL_DATA1

CL_RST1#

REFCLK14IN

XTAL25_IN

XTAL25_OUT

SMBALERT#
SMB_PCH_CLK
SMB_PCH_DAT
SMB_SML0_CLK
SMB_SML0_DAT

SMBALERT#

E12

SMB_PCH_CLK

H14

SMB_PCH_DAT

C9

DDR_HVREF_RST_PCH

A12

SMB_SML0_CLK

C8

SMB_SML0_DAT

G12

PCH_GPIO74

C13

SMB_SML1_CLK

E14

SMB_SML1_DAT

M16

M7

T11

P10

PEG_CLKREQ_GPU#

M10

AB37
AB38

AV22
AU22

AM12
AM13

CLK_BUF_PCIE_3GPLLN

BF18

CLK_BUF_PCIE_3GPLLP

BE18

CLK_BUF_BCLKN

BJ30

CLK_BUF_BCLKP

BG30

CLK_BUF_DREFCLKN

G24

CLK_BUF_DREFCLKP

E24

CLK_BUF_DREFSSCLKN

AK7

CLK_BUF_DREFSSCLKP

AK5

CLK_PCH_14M

K45

CLK_PCI_FB

H45

XTAL25_IN

V47

XTAL25_OUT

V49

XCLK_RCOMP

Y47

K43

CLK_FLEX1

F47

TEST_WOOFER_EN

H47

CLK_FLEX3

K49

+3.3V_SUS

3

+3.3V_SUS

3

SMB_PCH_CLK 36

SMB_PCH_DAT 36

DDR_HVREF_RST_PCH 5

R312 10KR312 10K

1 2

+3.3V_SUS

PEG_CLKREQ_GPU# 1 9

CLK_PCIE_VGAN 19
CLK_PCIE_VGAP 19

CLK_CPU_BCLKN 4
CLK_CPU_BCLKP 4

CLK_DPLL_SSCLKN 4
CLK_DPLL_SSCLKP 4

X02-19

R583 90.9/ F_4R583 90.9/F_4

T39T39

R270 22/J_4_DISR270 22/J _4_DIS

R352 *22/J_4_NCR352 *22/J_4_NC

2

1

Q36

Q36
2N7002K

2N7002K

2

1

Q37

Q37
2N7002K

2N7002K

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet of

Date: Sheet of

+1.05V_PCH

A00-7

TEST_WOOFER_EN 36

X02-18

R370

R370

2.2K/J_4

2.2K/J_4

SMB_SML1_CLK

X02-18

R371

R371

2.2K/J_4

2.2K/J_4

SMB_SML1_DAT

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project Name:

Project Name:

Project Name:

PCH 3/6(PCIE/USB/CLK/NV)

PCH 3/6(PCIE/USB/CLK/NV)

PCH 3/6(PCIE/USB/CLK/NV)

GM7C_MB C

GM7C_MB C

GM7C_MB C

1

A00-6

C398 27P/50VC398 27P/50V

R269

R269
1M/J_4

1M/J_4

1 2

C390 27P/50VC390 27P/50V

X02-13

CLK_VGA_27M 23

C826 *18P/5 0V_NCC826 *18P/50V_NC

CLK_VGA_27M_SS 23

C827 *18P/5 0V_NCC827 *18P/50V_NC

GM7C

GM7C

GM7C

10 59Friday, January 21, 2011

10 59Friday, January 21, 2011

10 59Friday, January 21, 2011

10

Y1
25MHzY125MHz

of

5

4

3

2

1

Cougar Point (GPIO,VSS_NCTF,RSVD)

U31F

U31F

CAMERA_ CBL_DET#28

SIO_EXT_S MI#30

D D

C C

X02-03
Change "KB_LED_DET" GPIO location

B B

NC

NC

SIO_EXT_S CI#30

SMI#37

CPPE_N#29

DGPU_PW ROK21,38

DGPU_VR EN49

PCIE_MCAR D1_DET#36

R360 10 KR360 1 0K

PLL_ODV R_EN9

USB_MCA RD2_DET#36

USB_MCA RD1_DET#36

WLAN _RADIO_DIS#36

BT_RADIO_ DIS#36

FFS_INT235

KB_LED_ DET33

TS_EN34

CAMERA_ CBL_DET#

SIO_EXT_S MI#

PCH_BOA RD_ID0

SIO_EXT_S CI#

SMI#

CPPE_N#

HOST_AL ERT#1

DGPU_PR SNT#

R347 0_4_ SWR347 0 _4_SW

R356 *0_4_ NCR 356 *0_4_NC

PCIE_MCAR D1_DET#

PCH_GPIO2 7

USB_MCA RD2_DET#

USB_MCA RD1_DET#

DMI_OVRVL TG

FDI_OVRVL TG

WLAN _RADIO_DIS#

BT_RADIO_ DIS#

TS_EN

DGPU_PW ROK_L

PCH_GPIO2 2

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

C4

G2

U2

D40

E16

M5

N2

M3

V13

D6

A44

A45

A46

B47

BD1

BD49

BE1

BE49

BF1

BF49

+3V_S5

GPIO8

LAN_PHY_PWR_CTRL / GPIO12

+3V_S5

GPIO15

SATA4GP / GPIO16

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24 / MEM_LED

DSW

GPIO27

P8

K1

K4

V8

V3

A4

A5

A6

B3

+3V_S5

GPIO28

STP_PCI# / GPIO34

+3V

GPIO35

SATA2GP / GPIO36

SATA3GP / GPIO37

SLOAD / GPIO38

SDATAOUT0 / GPIO39

SDATAOUT1 / GPIO48

SATA5GP / GPIO49

+3V_S5

GPIO57

VSS_NCTF_1

VSS_NCTF_2

VSS_NCTF_3

VSS_NCTF_4

VSS_NCTF_5

VSS_NCTF_6

VSS_NCTF_7

VSS_NCTF_8

VSS_NCTF_9

VSS_NCTF_10

VSS_NCTF_11

VSS_NCTF_12

VSS_NCTF_13

VSS_NCTF_14

COUGARP OINT -SLH9C-MM#908 752

COUGARP OINT -SLH9C-MM#908 752

+3V

+3V

+3V

+3V

+3V

+3V

+3V

+3V_S5

+3V

+3V

+3V

+3V

+3V

+3V

+3V

+3V

+3V

+3V

+3V

+3V_S5

GPIO

GPIO

NCTF

NCTF

TACH4 / GPIO68

TACH5 / GPIO69

TACH6 / GPIO70

TACH7 / GPIO71

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

INIT3_3V#

DF_TVS

CPU/MISC

CPU/MISC

TS_VSS1

TS_VSS2

TS_VSS3

TS_VSS4

NC_1

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

VSS_NCTF_23

VSS_NCTF_24

VSS_NCTF_25

VSS_NCTF_26

VSS_NCTF_27

VSS_NCTF_28

VSS_NCTF_29

VSS_NCTF_30

VSS_NCTF_31

VSS_NCTF_32

C40

PCH_GPIO6 9

B41

C41

A40

X00: Layout: Place R8478
close to CPU side to
reduce stub from CPU.

P4

PCH_PEC I

AU16

SIO_RCIN#

P5

AY11

PCH_THR MTRIP#

AY10

T14

AY1

AH8

AK11

AH10

AK10

P37

3/16 Connected to GND
DG rev0.9

BG2

BG48

BH3

BH47

BJ4

BJ44

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

F1

F49

X01: Reserve for no using by BIOS.

NC

T36T36

NC

T18T18

NC

T37T37

NC

T38T38

R191 *43/J_ 4_NCR191 *43/J_ 4_NC

R192 390/J _4R192 390/J _4

+3.3V_RU N

X0113

SIO_A20GA TE 30

H_PECI 4,30

SIO_RCIN# 30

H_PW RGOOD 4

PM_THRM TRIP# 4

DF_TVS 9

PCH_GPIO2 2

BIOS RECOVERY

R337 10KR337 10 K
R338 *0/J_4 _NCR338 *0/J_4_NC

Stuff R8490

No Stuff

*10K/J_4_ NC

*10K/J_4_ NC

R552

R552

Touch Screen LDO does not be
populate, so GPIO28 (TS_EN) pull
down by Intel check list.

R221 *10K/J _4_NCR221 *10K/J _4_NC

02/20 DEL for Pre-ES1

+3.3V_RU N

High = Disable ( Default)

Low = Enable

SWITCHABLE

R8489

DGPU_PR SNT#

UMA

R8489R8490

R551 100KR551 100K

R284 10KR284 10K

PCIE_MCAR D1_DET#
CAMERA_ CBL_DET#
BT_RADIO_ DIS#
SIO_EXT_S MI#
SIO_EXT_SCI#
WLAN_RADIO_DIS#

SIO_A20GA TE
SIO_RCIN#

USB_MCARD2_DET#
USB_MCA RD1_DET#

12 X01

PCH_GPIO6 9

PCH_BOA RD_ID0

CPPE_N#

DGPU_PW ROK_L

11

SMI#

X0113

HOST_AL ERT#1

Intel ME Crypto Transport Layer
Security (TLS) c ipher suite

Low = Disable (D efault)

High = Enable

TS_EN

R605 10KR605 10 K
R280 *10K/J _4_NCR280 *10K/J _4_NC

+3.3V_RU N

R292 10KR292 10 K
R353 10KR353 10 K
R591 10KR591 10 K
R327 10KR327 10 K
R351 10KR351 10 K
R587 10KR587 10 K

R254 10KR254 10 K
R243 10KR243 10 K

R595 10KR595 10 K
R596 10KR596 10 K
R350 *10K/J _4_NCR350 *10K/J _4_NC

R548 10KR548 10 K

R599 10KR599 10 K

R348 10KR348 10 K

+3.3V_SU S

R598 1K/J_ 4R5 98 1K/J_4

+3.3V_SU S

A A

R259 100KR259 100K

FDI TERMINATION
VOLTAGE OVERRIDE

FDI_OVRVL TG

R260 *1K/F_ 4_NCR260 *1K /F_4_NC

LOW - Tx, Rx ter minated
to same voltage

5

+3.3V_RU N

DMI TERMINATION
VOLTAGE OVERRIDE

DMI_OVRVL TG

R236 200K /F_4R236 200 K/F_4

Low = Tx, Rx ter minated to
same voltage (DC Coupling Mode)
(DEFAULT)

4

+3.3V_RU N

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project Name:

Project Name:

Title

Title

Title

PCH 4/6(GP IO/CPU)

PCH 4/6(GP IO/CPU)

PCH 4/6(GP IO/CPU)

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

Project Name:

GM7C_MB C

GM7C_MB C

GM7C_MB C

GM7C

GM7C

GM7C

11 59F riday, January 21, 2011

11 59F riday, January 21, 2011

11 59F riday, January 21, 2011

1

5

4

3

2

1

X02-15

X02-15

X02-15

??mA(??mils)

+5V_SUS

+3.3V_SUS

+5V_RUN

+3.3V_RUN

+3.3V_SUS

+3.3V_RUN

+1.05V_PCH

12

COUGAR POINT (POWER)

POWER

POWER

U31G

+1.05V_PCH

X02-15

D D

+1.05V_PCH +1.05V_VCCAPLL_EXP

+1.05V_PCH

C C

B B

+1.05V_PCH_VCC

+1.05V_PCH_VCCDPLL_EXP+1.05V_PCH

X02-15

L25 *1uH/25mA_6_NCL25 *1uH/25mA_6_NC

+1.05V_VCCIO

X02-15

+3.3V_RUN

+1.5V_RUN

+1.05V_PCH

VccCORE =1.3 A(60mils)

C353

C345

C345
1U/6.3V_4

1U/6.3V_4

C692

C692
*10U/6.3V_6_NC

*10U/6.3V_6_NC

C353
*1U/6.3V_NC

*1U/6.3V_NC

C324

C324
1U/6.3V_4

1U/6.3V_4

C354

C354
10U/6.3V_6

10U/6.3V_6

VccIO =2.925 A(140mils)

C317

C317

C308

C308

C307

C307
1U/6.3V_4

1U/6.3V_4

C302

C302
10U/6.3V_6

10U/6.3V_6

X02-15

+VCCAFDI_VRM

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4 C436

C305

C305
1U/6.3V_4

1U/6.3V_4

+3V_VCC_EXP

C690

C690

0.1U/16V_4

0.1U/16V_4

R164 *0/J_8_NCR164 *0/J_8_NC

+VCCAFDI_VRM

+1.05V_VCCAPLL_FDI

+1.05V_VCCDPLL_FDI

+1.05V_VTT

U31G

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

VccAFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

COUGARPOINT -SLH9C-MM#908752

COUGARPOINT -SLH9C-MM#908752

CRTLVDS

CRTLVDS

VCC CORE

VCC CORE

DMI

DMI

VCCIO

VCCIO

DFT / SPI HVCMOS

DFT / SPI HVCMOS

FDI

FDI

VCCADAC

VSSADAC

VCCALVDS

VSSALVDS

VCCTX_LVDS[1]

VCCTX_LVDS[2]

VCCTX_LVDS[3]

VCCTX_LVDS[4]

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCCLKDMI

VCCDFTERM[1]

VCCDFTERM[2]

VCCDFTERM[3]

VCCDFTERM[4]

VCCSPI

VccADAC =1mA(8mils)

U48

U47

AK36

AK37

VccTX_LVDS=60mA(10mils)

AM37

AM38

C304

C304

0.01U/25V_4_SW

0.01U/25V_4_SW

AP36

AP37

+3V_VCC_GIO

V33

C381

C381

0.1u/16V_4

0.1u/16V_4

V34

+VCCAFDI_VRM

AT16

AT20

+1.1V_VCC_DMI_CCI

AB36

C342

C342
1U/6.3V_4

1U/6.3V_4

AG16

AG17

AJ16

AJ17

+3V_VCCME_SPI

V1

VccALVDS=1mA(8mils)

VCCDMI = 42mA(10mils)

C332

C332
*10U/6.3V_6_NC

*10U/6.3V_6_NC

C310

C310

0.1U/16V_4

0.1U/16V_4

C723

C723
1U/6.3V_4

1U/6.3V_4

C311

C311

0.01U/25V_4_SW

0.01U/25V_4_SW

+3.3V_RUN

X02-15

+VCCAFDI_VRM

X02-15

X02-15

+3.3V_RUN

X02-15

+VCCA_DAC_1_2

+VCCALVDS

R207 0/J_4_SWR207 0/J_4_SW

R211 0/J_4_DISR211 0/J_4_DIS

L28 0.1uH_8_SWL28 0.1uH_8_SW

R514 0_DISR514 0_ DIS

C693

C693
10U/6.3V_8_SW

10U/6.3V_8_SW

Ra
Rb NA

+1.05V_PCH

VCCCLKDMI =
20mA(8mils)

+1.8V_RUN+VCCP_NAND

VCCPNAND = 190 mA(15mils)

VCCSPI = 20mA(8mils)

+3.3V_RUN

Ra

Rb

DIS SW
0 ohm NA
0 ohm

X02-15

C267

C267

1U/6.3V_4

1U/6.3V_4

VCCRTC<1mA(8mils)

+3.3V_RUN

+1.8V_RUN+VCC_TX_LVDS

+1.05V_VTT+1.05V_VCC_DMI

+1.05V_PCH

+1.05V_PCH

1mA(8mils)

X02-15

+3.3V_SUS

+VCCAPLL_CPY_PCH

L24 *10uH/100mA_8_NCL24 *10uH/100mA_8_NC

VCCME(+1.05V) = ??A(??mils)

+1.05V_VCCEPW

50 X01

+1.05V_PCH

+1.05V_PCH

R244 *0/J_6_ NCR244 *0/J_6_NC

+1.05V_VTT

+VTT_VCCPCPU

X02-15

+RTC_CELL

R545 *0/J_8_NCR545 *0/J_8_NC

+1.05V_PCH

VCCDSW3_3= 3mA

C372

C372

0.1u/16V_4

0.1u/16V_4

C691

C691
*10U/6.3V_6_NC

*10U/6.3V_6_NC

+1.05V_PCH

VccASW =1.01 A(60mils)

C363

C363

C373

C373

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

C360

C360
22U/4V/0805

22U/4V/0805

C331

C331
1U/6.3V_4

1U/6.3V_4

C329

C329
1U/6.3V_4

1U/6.3V_4

C709

C709
1U/6.3V_4

1U/6.3V_4

C384

C384
*1U/6.3V_NC

*1U/6.3V_NC

C256

C256

4.7U/6.3V_6

4.7U/6.3V_6

C402

C402
1U/6.3V_4

1U/6.3V_4

C380 0.1u/16V_4C380 0.1u/16V_4

65mA(10mils)

8mA(8mils)

VCCDIFFCLKN= 55mA(10mils)

VCCSSC= 95mA(10mils)

C368 0.1u/16V_4C368 0.1u/16V_4

C257

C257

0.1U/16V_4

0.1U/16V_4

C413

C413
*0.1U/10V_NC

*0.1U/10V_NC

C374

C374
1U/6.3V_4

1U/6.3V_4

C369

C369
22U/4V/0805

22U/4V/0805

+VCCAFDI_VRM

C260

C260

0.1U/16V_4

0.1U/16V_4

C404

C404
*0.1U/10V_NC

*0.1U/10V_NC

C371

C371
*0.1U/10V_4_NC

*0.1U/10V_4_NC

C326

C326
*1U/6.3V_4_NC

*1U/6.3V_4_NC

+V1.05M_VCCSUS

Cougar Point-M (POWER)

U31J

+VCCACLK

+VCCPDSW

PCH_VCCDSW

+3V_SUS_CLKF33

+VCCDPLL_CPY

+VCCSUS1

+VCCRTCEXT

+VCCAFDI_VRM

+1.05V_VCCA_A_DPL

+1.05V_VCCA_B_DPL

+VCCDIFFCLK
+VCCDIFFCLKN

+V1.05V_SSCVCC

+VCCSST

U31J

AD49

VCCACLK

T16

VCCDSW3_3

V12

DCPSUSBYP

T38

VCC3_3[5]

BH23

VCCAPLLDMI2

AL29

VCCIO[14]

AL24

DCPSUS[3]

AA19

VCCASW[1]

AA21

VCCASW[2]

AA24

VCCASW[3]

AA26

VCCASW[4]

AA27

VCCASW[5]

AA29

VCCASW[6]

AA31

VCCASW[7]

AC26

VCCASW[8]

AC27

VCCASW[9]

AC29

VCCASW[10]

AC31

VCCASW[11]

AD29

VCCASW[12]

AD31

VCCASW[13]

W21

VCCASW[14]

W23

VCCASW[15]

W24

VCCASW[16]

W26

VCCASW[17]

W29

VCCASW[18]

W31

VCCASW[19]

W33

VCCASW[20]

N16

DCPRTC

Y49

VCCVRM[4]

BD47

VCCADPLLA

BF47

VCCADPLLB

AF17

VCCIO[7]

AF33

VCCDIFFCLKN[1]

AF34

VCCDIFFCLKN[2]

AG34

VCCDIFFCLKN[3]

AG33

VCCSSC

V16

DCPSST

T17

DCPSUS[1]

V19

DCPSUS[2]

BJ8

V_PROC_IO

A22

VCCRTC

COUGARPOINT -SLH9C-MM#908752

COUGARPOINT -SLH9C-MM#908752

POWER

POWER

Clock and Miscellaneous

Clock and Miscellaneous

CPURTC

CPURTC

PCI/GPIO/LPCMISC

PCI/GPIO/LPCMISC

SATA USB

SATA USB

HDA

HDA

VCCIO[29]

VCCIO[30]

VCCIO[31]

VCCIO[32]

VCCIO[33]

VCCSUS3_3[7]

VCCSUS3_3[8]

VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

VCCSUS3_3[1]

V5REF

VCCSUS3_3[2]

VCCSUS3_3[3]

VCCSUS3_3[4]

VCCSUS3_3[5]

VCC3_3[1]

VCC3_3[8]

VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12]

VCCIO[13]

VCCIO[6]

VCCAPLLSATA

VCCVRM[1]

VCCIO[2]

VCCIO[3]

VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

N26

P26

P28

T27

T29

+3V_VCCPUSB

T23

T24

V23

V24

+3V_VCCAUBG

P24

+VCCAUPLL

T26

+5V_PCH_VCC5REFSUS

M26

+VCCA_USBSUS

AN23

+3V_VCCPSUS

AN24

+5V_PCH_VCC5REF

P34

N20

N22

+3V_VCCPSUS

P20

P22

AA16

+3V_VCCPCORE

W16

T34

+3.3V_RUN

C714

C714

0.1U/16V_4

0.1U/16V_4

AJ2

AF13

+V1.05S_SATA3

AH13

AH14

AF14

+V1.1LAN_VCCAPLL

AK1

VCCVRM= 114mA(15mils)

+VCCAFDI_VRM

AF11

AC16

AC17

C362

C362
1U/6.3V_4

1U/6.3V_4

AD17

T21

V21

T19

+V3.3A_1.5A_HDA_IO

P32

C467

C467
*1U/6.3V_4_NC

*1U/6.3V_4_NC

C389

C389
1U/6.3V_4

1U/6.3V_4

C391

C391

0.1u/16V_4

0.1u/16V_4

C388

C388

0.1u/16V_4

0.1u/16V_4

C436

0.1U/16V_4

0.1U/16V_4

C313

C313
*1U/6.3V_4_NC

*1U/6.3V_4_NC

C437

C437
1U/6.3V_4

1U/6.3V_4

C393

C393
1U/6.3V_4

1U/6.3V_4

C325

C325

0.1U/16V_4

0.1U/16V_4

C385

C385

0.1u/16V_4

0.1u/16V_4

C323

C323
1U/6.3V_4

1U/6.3V_4

L29 *10uH/100mA_8_NCL29 *10uH/100mA_8_NC

C704

C704
*10U/6.3V_6_NC

*10U/6.3V_6_NC

X02-15

+1.05V_PCH

VCCME = 1.01A(60mils)

Selection of I/O Voltage for the High
Definition Audio

C386

C386

0.1u/16V_4

0.1u/16V_4

+1.05V_PCH+1.05V_VCCUSBCORE

X02-15

VCCSUS3_3 = 119mA(15mils)

+3.3V_SUS

X02-15

X02-15

+1.05V_PCH

VCC5REFSUS=1mA

R345 10/F_4R345 10/F_4

D16 RB500V-40D16 RB500V-40

V5REF= 1mA

R346 10/F_4R346 10/F_4

D15 RB500V-40D15 RB500V-40

VCCSUS3_3 = 119mA(15mils)

VCCPCORE = 28mA(10mils)

+3.3V_RUN

+1.05V_PCH

+1.05V_PCH

+3.3V_SUS

VCCSUSHDA= 10mA(8mils)

L27 10uH/100mAL27 10uH/100mA

+1.05V_PCH

+3.3V_RUN

R559 *0/J_6_NCR559 *0/J_6_NC

R580 1R58 0 1

A A

5

4

3

L31 10uH/100mA_8L 31 10uH/100mA_8

C733

C733
10U/6.3V_6

10U/6.3V_6

+3V_SUS_CLKF33

C377

C377
1U/6.3V_4

1U/6.3V_4

2

L26 10uH/100mAL26 10uH/100mA

C687

C687
10U/6.3V_8

10U/6.3V_8

X5R

X5R

6.3

6.3

C688

C688
10U/6.3V_8

10U/6.3V_8

X5R

X5R

6.3

6.3

+1.05V_VCCA_A_DPL

C266

C266
1U/6.3V_4

1U/6.3V_4

+1.05V_VCCA_B_DPL

C265

C265
1U/6.3V_4

1U/6.3V_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project Name:

Project Name:

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet

Project Name:

PCH 5/6(POWER)

PCH 5/6(POWER)

PCH 5/6(POWER)

GM7C_MB C

GM7C_MB C

GM7C_MB C

1

GM7C

GM7C

GM7C

12 59Friday, January 21, 2011

12 59Friday, January 21, 2011

12 59Friday, January 21, 2011

of

5

4

3

2

1

13

U31I

U31I

AY4

VSS[159]

IBEX PEAK-M (GND)

D D

U31H

U31H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

AA33

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

C C

B B

A A

5

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD37

VSS[31]

AD38

VSS[32]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]

AD14

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

COUGARPOINT -S LH9C-MM#908752

COUGARPOINT -S LH9C-MM#908752

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]

VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28

4

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166]

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

COUGARPOINT -S LH9C-MM#908752

COUGARPOINT -S LH9C-MM#908752

3

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]

H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project Name:

Project Name:

Title

Title

Title

PCH 6/6(GND)

PCH 6/6(GND)

PCH 6/6(GND)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Project Name:

GM7C_MB C

GM7C_MB C

GM7C_MB C

1

GM7C

GM7C

GM7C

13 59Friday, January 21, 2011

13 59Friday, January 21, 2011

13 59Friday, January 21, 2011

5

4

3

2

1

1123GC: Update JDIM7002 footprint 5.2mm, Ruv type.

14

D D

X0167

C C

S3 Power Reduce (Discharge)

+0.75V_DDR_VTT

R30022R300

X0163

PS_S3CNTRL4,6,8

B B

2N7002W-7-F

2N7002W-7-F

22

31

2

Q31

Q31

+1.5V_SUS

C106

C106

C85

C85

C107

C107

*10U_NC

*10U_NC

X5R

X5R

X5R

X5R

+0.75V_DDR_VTT

A A

5

4

C224

C224
*1U/6.3V_4_NC

*1U/6.3V_4_NC

X5R

X5R

*10U_NC

*10U_NC

C223

C223
*1U/6.3V_4_NC

*1U/6.3V_4_NC

X5R

X5R

*10U_NC

*10U_NC

X5R

X5R

X5R

X5R

SODIMM# A0 Decoupling

C47

C47

C88

C88

*10U_NC

*10U_NC

*10U_NC

*10U_NC

X5R

X5R

X5R

X5R

C242

C242
*1U/6.3V_4_NC

*1U/6.3V_4_NC

X5R

X5R

3

C241

C241
*1U/6.3V_4_NC

*1U/6.3V_4_NC

C145

C145

*10U_NC

*10U_NC

X5R

X5R

X5R

X5R

C243

C243

*10U_NC

*10U_NC

X5R

X5R

C89

C89

*.1U/10V_4_NC

*.1U/10V_4_NC

C55

C55

*.1U/10V_4_NC

*.1U/10V_4_NC

X5R

X5R

C151

C151

*.1U/10V_4_NC

*.1U/10V_4_NC

X5R

X5R

C150

C150

*.1U/10V_4_NC

*.1U/10V_4_NC

X5R

X5R

C98

C98

*.1U/10V_4_NC

*.1U/10V_4_NC

X5R

X5R

+

+

C124

C124
*330U/2V_7343_NC

*330U/2V_7343_NC

<Material>

<Material>

2

X0117

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project Name:

Project Name:

Title

Title

Title

DDR3 DIMM-A0

DDR3 DIMM-A0

DDR3 DIMM-A0

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Project Name:

GM7C_MB B

GM7C_MB B

GM7C_MB B

1

GM7C

GM7C

GM7C

14 59Friday, January 21, 2011

14 59Friday, January 21, 2011

14 59Friday, January 21, 2011

5

1123GC: Update JDIM7000 footprint to 9.2mm, RVS type.

JDIM4A

M_A_A[15:0]5

D D

M_A_BS#05
M_A_BS#15
M_A_BS#25
M_A_CS#05
M_A_CS#15
M_A_CLKP05
M_A_CLKN05
M_A_CLKP15
M_A_CLKN15
M_A_CKE05
M_A_CKE15
M_A_CAS#5
M_A_RAS#5
M_A_WE#5

SMB_RUN_CLK17,35,36
SMB_RUN_DAT17,35,36

M_A_ODT05
M_A_ODT15

1 2

1 2

R126

R126
*10K_NC

*10K_NC

R134

R134
10K

10K

M_A_DQSP[7:0]5

M_A_DQSN[7:0]5

C C

+3.3V_RUN

R127

R127
*10K_NC

*10K_NC

1 2

SA1_DIM0_1 SA0_DIM0_1

R135

R135
10K

10K

1 2

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

SA0_DIM0_1

SA1_DIM0_1
SMB_RUN_CLK
SMB_RUN_DAT

M_A_DQSP0

M_A_DQSP1

M_A_DQSP2

M_A_DQSP3

M_A_DQSP4

M_A_DQSP5

M_A_DQSP6

M_A_DQSP7

M_A_DQSN0

M_A_DQSN1

M_A_DQSN2

M_A_DQSN3

M_A_DQSN4

M_A_DQSN5

M_A_DQSN6

M_A_DQSN7

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

JDIM4A

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

AS0A626-JARG-7H

AS0A626-JARG-7H

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

(204P)

(204P)

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

M_A_DQ4
M_A_DQ5
M_A_DQ7
M_A_DQ6
M_A_DQ0
M_A_DQ1
M_A_DQ3
M_A_DQ2
M_A_DQ12
M_A_DQ13
M_A_DQ15
M_A_DQ14
M_A_DQ9
M_A_DQ8
M_A_DQ11
M_A_DQ10
M_A_DQ16
M_A_DQ17
M_A_DQ22
M_A_DQ23
M_A_DQ21
M_A_DQ20
M_A_DQ19
M_A_DQ18
M_A_DQ28
M_A_DQ29
M_A_DQ27
M_A_DQ26
M_A_DQ24
M_A_DQ25
M_A_DQ31
M_A_DQ30
M_A_DQ37
M_A_DQ32
M_A_DQ35
M_A_DQ34
M_A_DQ36
M_A_DQ33
M_A_DQ39
M_A_DQ38
M_A_DQ44
M_A_DQ45
M_A_DQ43
M_A_DQ46
M_A_DQ40
M_A_DQ41
M_A_DQ47
M_A_DQ42
M_A_DQ52
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ48
M_A_DQ53
M_A_DQ55
M_A_DQ54
M_A_DQ56
M_A_DQ60
M_A_DQ62
M_A_DQ63
M_A_DQ61
M_A_DQ57
M_A_DQ58
M_A_DQ59

4

M_A_DQ[63:0] 5

CHA_DIMM1_LOW

+3.3V_RUN

C221

C221

2.2U/6.3V_6

2.2U/6.3V_6

X5R

X5R

DDR3_DRAMRST#5,17

M_VREF_DQ_DIMMA

2.2U/6.3V_6

2.2U/6.3V_6

X5R

X5R

M_VREF_CA_DIMMA

2.2U/6.3V_6

2.2U/6.3V_6

C1

C1

C164

C164

X5R

X5R

3

2.48A

C213

C213
*.1U/10V_NC

*.1U/10V_NC

X7R

X7R

R503 *10K_NCR503 *10K_NC

+3.3V_RUN

C2

C2

0.1U/16V_4

0.1U/16V_4

X7R

X7R

C154

C154

0.1U/16V_4

0.1U/16V_4

X7R

X7R

+1.5V_SUS

12

JDIM4B

JDIM4B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

AS0A626-JARG-7H

AS0A626-JARG-7H

2

1

15

44

VSS16

48

VSS17

49

VSS18

54

VSS19

55

VSS20

60

VSS21

61

VSS22

65

VSS23

66

VSS24

71

VSS25

72

VSS26

127

VSS27

128

VSS28

133

VSS29

134

VSS30

138

VSS31

139

VSS32

144

VSS33

145

VSS34

150

VSS35

151

VSS36

155

VSS37

156

VSS38

161

VSS39

162

VSS40

167

VSS41

168

VSS42

172

VSS43

173

VSS44

178

VSS45

179

VSS46

184

VSS47

185

VSS48

189

VSS49

190

VSS50

195

VSS51

196

VSS52

(204P)

(204P)

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

VTT1
VTT2

203
204

205

G1

206

G2

207

H1

208

H2

+0.75V_DDR_VTT

B B

A A

SA1 SA0

CHA0

0 0

0 1

CHA1

1 0

CHB0

1 1

CHB1

Note:
SO-DIMMA SPD Address is 0xA2
SO-DIMMA TS Address is 0x32

+1.5V_SUS

C72

C72

*10U_NC

*10U_NC

X5R

X5R

X5R

X5R

+0.75V_DDR_VTT

C211

C211
1U/6.3V_4

1U/6.3V_4

X5R

X5R

5

4

C73

C73

*10U_NC

*10U_NC

X5R

X5R

X5R

X5R

C212

C212
1U/6.3V_4

1U/6.3V_4

C139

C139

10U/6.3V_6

10U/6.3V_6

X5R

X5R

X5R

X5R

C225

C225
1U/6.3V_4

1U/6.3V_4

SODIMM# A1 Decoupling

C83

C83

C78

C78

*10U_NC

*10U_NC

10U/6.3V_6

10U/6.3V_6

X5R

X5R

X5R

X5R

C233

C233
1U/6.3V_4

1U/6.3V_4

X5R

X5R

X5R

X5R

3

C49

C49

*10U_NC

*10U_NC

C232

C232

10U/6.3V_6

10U/6.3V_6

X7R

X7R

C87

C87

0.1U/16V_4

0.1U/16V_4

X7R

X7R

C48

C48

*.1U/10V_NC

*.1U/10V_NC

X7R

X7R

C183

C183

0.1U/16V_4

0.1U/16V_4

X7R

X7R

C51

C51

0.1U/16V_4

0.1U/16V_4

X7R

X7R

C50

C50

0.1U/16V_4

0.1U/16V_4

+

+

C197

C197
*330U/2V_7343_NC

*330U/2V_7343_NC

X0117

X0161

2

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project Name:

Project Name:

Title

Title

Title

DDR3 DIMM-A1

DDR3 DIMM-A1

DDR3 DIMM-A1

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Project Name:

GM7C_MB C

GM7C_MB C

GM7C_MB C

1

GM7C

GM7C

GM7C

15 59Friday, January 21, 2011

15 59Friday, January 21, 2011

15 59Friday, January 21, 2011

5

4

3

2

1

1123GC: Update JDIM7003 footprint 5.2mm, Ruv type.

16

D D

X0167

C C

B B

+1.5V_SUS

C62

C62

C75

C75

*10U_NC

*10U_NC

*10U_NC

*10U_NC

X5R

X5R

X5R

X5R

+0.75V_DDR_VTT

C236

C236
*1U/6.3V_4_NC

*1U/6.3V_4_NC

A A

5

4

X5R

X5R

C239

C239
*1U/6.3V_4_NC

*1U/6.3V_4_NC

X5R

X5R

X5R

X5R

SODIMM# B0 Decoupling

C63

C63

C81

C81

*10U_NC

*10U_NC

*10U_NC

*10U_NC

X5R

X5R

X5R

X5R

C238

C238
*1U/6.3V_4_NC

*1U/6.3V_4_NC

X5R

X5R

X5R

X5R

C148

C148

*10U_NC

*10U_NC

C237

C237
*1U/6.3V_4_NC

*1U/6.3V_4_NC

+

C122

C122

C92

C92

C136

C102

C102

C147

C147

*10U_NC

*10U_NC

X5R

X5R

X5R

X5R

C240

C240

*10U_NC

*10U_NC

X5R

X5R

3

*.1U/10V_4_NC

*.1U/10V_4_NC

X5R

X5R

*.1U/10V_4_NC

*.1U/10V_4_NC

X5R

X5R

*.1U/10V_4_NC

*.1U/10V_4_NC

X5R

X5R

C136

*.1U/10V_4_NC

*.1U/10V_4_NC

C146

C146

*.1U/10V_4_NC

*.1U/10V_4_NC

X5R

X5R

+

C184

C184
*330U/2V_7343_NC

*330U/2V_7343_NC

X0117

X0161

2

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project Name:

Project Name:

Title

Title

Title

DDR3 DIMM-B0

DDR3 DIMM-B0

DDR3 DIMM-B0

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Project Name:

GM7C_MB B

GM7C_MB B

GM7C_MB B

1

GM7C

GM7C

GM7C

16 59Friday, January 21, 2011

16 59Friday, January 21, 2011

16 59Friday, January 21, 2011

5

1123GC: Update JDIM7001 footprint to 9.2mm, RVS type.

JDIM2A

M_B_A[15:0]5

D D

M_B_BS#05
M_B_BS#15
M_B_BS#25
M_B_CS#05
M_B_CS#15
M_B_CLKP05
M_B_CLKN05
M_B_CLKP15
M_B_CLKN15
M_B_CKE05
M_B_CKE15
M_B_CAS#5
M_B_RAS#5
M_B_WE#5

SMB_RUN_CLK15,35,36
SMB_RUN_DAT15,35,36

M_B_ODT05
M_B_ODT15

1 2

1 2

R122

R122
*10K_NC

*10K_NC

R131

R131
10K

10K

M_B_DQSP[7:0]5

M_B_DQSN[7:0]5

C C

+3.3V_RUN

R121

R121
10K

10K

1 2

SA1_DIM1_1 SA0_DIM1_1

R130

R130
*10K_NC

*10K_NC

1 2

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

SA0_DIM1_1

SA1_DIM1_1
SMB_RUN_CLK
SMB_RUN_DAT

M_B_DQSP0

M_B_DQSP1

M_B_DQSP2

M_B_DQSP3

M_B_DQSP4

M_B_DQSP5

M_B_DQSP6

M_B_DQSP7

M_B_DQSN0

M_B_DQSN1

M_B_DQSN2

M_B_DQSN3

M_B_DQSN4

M_B_DQSN5

M_B_DQSN6

M_B_DQSN7

JDIM2A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

AS0A626-JARG-7H

AS0A626-JARG-7H

8 X01

0413>Add _DIS for SODIMM

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46

(204P)

(204P)

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

4

M_B_DQ4
M_B_DQ5
M_B_DQ7
M_B_DQ3
M_B_DQ0
M_B_DQ1
M_B_DQ6
M_B_DQ2
M_B_DQ8
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ9
M_B_DQ12
M_B_DQ10
M_B_DQ11
M_B_DQ21
M_B_DQ17
M_B_DQ18
M_B_DQ23
M_B_DQ20
M_B_DQ16
M_B_DQ22
M_B_DQ19
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ31
M_B_DQ28
M_B_DQ29
M_B_DQ27
M_B_DQ30
M_B_DQ36
M_B_DQ37
M_B_DQ35
M_B_DQ34
M_B_DQ33
M_B_DQ32
M_B_DQ39
M_B_DQ38
M_B_DQ40
M_B_DQ41
M_B_DQ43
M_B_DQ42
M_B_DQ45
M_B_DQ44
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ55
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ50
M_B_DQ60
M_B_DQ56
M_B_DQ63
M_B_DQ62
M_B_DQ57
M_B_DQ61
M_B_DQ58
M_B_DQ59

Bit swap

M_B_DQ[63:0] 5

CHB_DIMM1_HEIGHT

+3.3V_RUN

DDR3_DRAMRST#5,15

M_VREF_DQ_DIMMB

2.2U/6.3V_6

2.2U/6.3V_6

M_VREF_CA_DIMMB

2.2U/6.3V_6

2.2U/6.3V_6

C214

C214

2.2U/6.3V_6

2.2U/6.3V_6

X5R

X5R

C18

C18

X5R

X5R

C152

C152

X5R

X5R

C219

C219
*.1U/10V_NC

*.1U/10V_NC

X7R

X7R

+3.3V_RUN

C19

C19

0.1U/16V_4

0.1U/16V_4

X7R

X7R

C159

C159

0.1U/16V_4

0.1U/16V_4

X7R

X7R

3

+1.5V_SUS

12

R140 *10K_NCR140 *10K_NC

JDIM2B

JDIM2B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

AS0A626-JARG-7H

AS0A626-JARG-7H

2

44

VSS16

48

VSS17

49

VSS18

54

VSS19

55

VSS20

60

VSS21

61

VSS22

65

VSS23

66

VSS24

71

VSS25

72

VSS26

127

VSS27

128

VSS28

133

VSS29

134

VSS30

138

VSS31

139

VSS32

144

VSS33

145

VSS34

150

VSS35

151

VSS36

155

VSS37

156

VSS38

161

VSS39

162

VSS40

167

VSS41

168

VSS42

172

VSS43

173

VSS44

178

VSS45

179

VSS46

184

VSS47

185

VSS48

189

VSS49

190

VSS50

195

VSS51

196

VSS52

(204P)

(204P)

VTT1
VTT2

203
204

205

G1

206

G2

207

H1

208

H2

+0.75V_DDR_VTT

1

17

SA1 SA0

CHA0

CHA1

CHB0

CHB1

0 0

0 1

1 0

1 1

+1.5V_SUS

C58

C58

10U/6.3V_6

10U/6.3V_6

X5R

X5R

X5R

X5R

+0.75V_DDR_VTT

C228

C228
1U/6.3V_4

1U/6.3V_4

X5R

X5R

5

4

X5R

X5R

C61

C61

*10U_NC

*10U_NC

C234

C234
1U/6.3V_4

1U/6.3V_4

X5R

X5R

C110

C110

10U/6.3V_6

10U/6.3V_6

C235

C235
1U/6.3V_4

1U/6.3V_4

X5R

X5R

SODIMM# B1 Decoupling

C84

C84

C144

C144

*10U_NC

*10U_NC

*10U_NC

*10U_NC

X5R

X5R

X5R

X5R

C227

C227
1U/6.3V_4

1U/6.3V_4

X5R

X5R

3

+

+

C65

C60

C52

C52

*.1U/10V_NC

*.1U/10V_NC

X7R

X7R

C60

0.1U/16V_4

0.1U/16V_4

X7R

X7R

C53

C53

*.1U/10V_NC

*.1U/10V_NC

X7R

X7R

C134

C134

C70

C70

0.1U/16V_4

0.1U/16V_4

10U/6.3V_6

10U/6.3V_6

X7R

X7R

X5R

X5R

X7R

X7R

C109

C109

0.1U/16V_4

0.1U/16V_4

2

C65
330U/2V_7343

330U/2V_7343

X0117

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Project Name:

Project Name:

Title

Title

Title

DDR3 DIMM-B1

DDR3 DIMM-B1

DDR3 DIMM-B1

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Project Name:

GM7C_MB C

GM7C_MB C

GM7C_MB C

1

GM7C

GM7C

GM7C

17 59Friday, January 21, 2011

17 59Friday, January 21, 2011

17 59Friday, January 21, 2011

B B

Note:
SO-DIMMA SPD Address is 0xA6
SO-DIMMA TS Address is 0x36

A A