Quanta GM3(B) DA0GM3MB8E0 Pacino Discrete & UMA, Studio 1735 Schematic

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GM3(B) Pacino Intel Discrete & UMA Block Diagram
VER : 3A
A A
Screw Hole
PG 45
blank Page
PG 47
Merom or Penryn
(478 Micro-FCPGA)
FAN & THERMAL
SMSC1423
PG 39
CLOCK
POWER
SYSTEM RESET CIRCUIT
PG 44
PG 3,4
BATT AC/BATT CONNECTOR
PG 54
B B
DDR2-SODIMM1
CHARGER
RUN POWER SW
+3.3V_SUS/+5V_SUS
+5V/+3.3V/+1.8V
667 MHZ DDR II
PG 46
PG 53
800 MHz FSB
Crestline
1299 uFCBGA
GDDR2 x 8 (256M)
PG 15,16
DDR2-SODIMM2
PG 15,16
667 MHZ DDR II
SATA-ODD
PG 36
SATA-HDD
SATA
SATA
PG 5,6,7,8,9,10
DMI interface
PG 36
ICH8-M
C C
IHDA USB2.0
AUDIO/AMP
STAC9228/92HD73C
Audio SPK conn
PG 40
Audio Jacks x3
Camera + D-MIC
PG 41
KBC
ITE8512
PG 40 PG 41
SPI PS/2
D D
USER INTERFACE
PG 38
FLASH 2Mbyts
PG 32
1
2
3
LPC
PG 31
676 BGA
PG 11,12,13,14
CIR
TSOP36136TR
PG 37
18X8
Keyboard
PG 37
Touchpad
PG 37
4
SLG8SP513V (QFN-64)
PCIEx16
IHDA USB2.0 x 3 PCIEx1
PCIEx1 USB2.0
PCIEx2 USB2.0 PCIEx1 USB2.0 USB2.0
Biometric
33MHz PCI
PG 17
ATI M86-M
PCI EXPRESS GFX
PG 18,19,20,21,22PG 23, 24
SiI1392
PG 38
8-in-1 Card Reader
5
POWER
+1.5V_RUN/+1.05V_VCCP
REGULATOR
+1.8V_SUS/+1.25V_RUN /+0.9V_DDR_VTT
LVDS
VGA
HDMI
PG 18
USB conn x 3
R5C833
PG 35
PG 28
6
PG 48
PG 49
DC/DC
+3.3V_ALW/+5V_ALW/ +15V_ALW
VGA Core
Panel Connector
CRT CONN.
HDMI CONN.
CPU VRREGULATOR
PG 26
PG 27
PG 25
PG 51
PG 52
PG 50
LAN BCM5784M
PG 42
RJ45/Magnetics
PG 43
EXPRESS-CARD
PG 30
MINI-CARD
WLAN
MINI-CARD
WWAN
MINI-CARD
WPAN
1394 CONN.
Card Reader CONN.
Title
Title
Title
Schematic Block Diagram1
Schematic Block Diagram1
Schematic Block Diagram1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
GM3 2B
GM3 2B
GM3 2B
Date: Sheet
Date: Sheet
Date: Sheet
PG 34
PG 33
PG 33
QUANTA
QUANTA
QUANTA COMPUTER
7
PG 29
PG 30
of
of
of
162Monday, March 24, 2008
162Monday, March 24, 2008
162Monday, March 24, 2008
8
1
2
3
4
5
6
7
8
Table of Contents Power States
PAGE DESCRIPTION
1
Schematic Block Diagram
2
Front Page
3-4
Merom
5-10
Crestline ICH8M
A A
B B
C C
11-14 15-16
DDRII SO-DIMM(200P) Clock Generator
17
VGA
18-24
HDMI
25
LCD connector
26
CRT
27
Card reader PCI interface
28
Card reader & 1394
29
Express card & card reader conn.
30
SIO
31 32
Flash/RTC WWAN/WPAN
33 34
WLAN
35
USB port SATA HDD & ODD
36 37
TP/KB/MB/CIR switch/LED
38 39
FAN/Thermal
40-41
Audio/CONN.
42-43
Docking Conn/Q-Switch
44
System Reset Circuit Screw hole & Charger
45-46
47
Blank page
1.05VCCP & 1.5VRUN
48
1.8VSUS & 0.9VTT
49 50
VGA power circuit CPU_ISL6266 (2phase)
51 52
D/D ISL6237 3.3V/5V
53
RUN Power Switch DCIN,Batt
54 55
EMI CAP
56
SMBUS BLOCK
57
Power statu & Block diagram
POWER PLANE
+PWR_SRC +RTC_CELL +3.3V_ALW +5V_ALW +15V_ALW +3.3V_LAN +5V_SUS +3.3V_SUS +1.8V_SUS +0.9V_DDR_VTT +5V_RUN +3.3V_RUN +1.8V_RUN +1.5V_RUN +1.25V_RUN +1.05V_VCCP +VCC_CORE +LCDVCC +5V_MOD +5V_HDD +5V_ALW2
10V~+19V
+3.0V~+3.3V
+3.3V +5V +15V +3.3V +5V +3.3V +1.8V +0.9V +5V +3.3V +1.8V +1.5V +1.25V +1.05V
+0.7V~+1.5V
+3.3V +5V +5V +5V
GND PLANE PAGE
8731AGND AGND_0.9V AGND_DC/DC AGND_DC2 AGND_DDR AGND_ISL6260
GND
46 49 52 48 49 51 ALL
4,26,32,34,48,49,50,51,52,55 11,14,31,32
3,13,26,31,32,34,36,37,38,44,46,49,52,53,54
35,36,46,48,49,52,53,54 26,36,37,52,53 42,43 14,38,50,51,53 3,11,12,13,14,20,30,37,38,43,48,49,50,51,53 6,8,9,15,48,49,50,53,55 16,49,53
14,20,25,27,36,37,38,39,40,41,53 6,8,9,11,12,13,14,15,17,19,20,22,25,26,27,28,
30,33,34,36,38,39,40,41,42,53,55 19,20,21,22,23,24,25,38,53
4,9,14,30,33,34,48,,53,55 6,9,14,49,53 3,4,5,6,8,9,11,14,37,48,55 4,51 26 36 36 37,38.52,53
DESCRIPTION
DESCRIPTION
MAIN POWER RTC 8051 POWER LCD/CHARGE POWER LARGE POWER LAN POWER SLP_S5# CTRLD POWER SLP_S5# CTRLD POWER SODIMM POWER SODIMM POWER SLP_S3# CTRLD POWER SLP_S3# CTRLD POWER SDVO POWER CALISTOGA/ICH8 POWER CALISTOGA/ICH8 POWER CPU/CALISTOGA/ICH8 POWER CPU CORE POWER LCD Power Module Power HDD Power LED power source
CONTROL SIGNAL
ALWON ALWON +5V_ALW AUX_ON SUS_ON
3.3V_SUS_ON DDR_ON
0.9V_DDR_VTT_ON RUN_ON
3.3V_RUN_ON RUN_ON
1.5V_RUN_ON
1.25V_RUN_ON
1.05V_RUN_ON IMVP_VR_ON
LCDVCC_TST_EN & ENVDD
MODC_EN# HDDC_EN# LDO output
ACTIVE INVOLTAGE PAGE
S0~S5 S0~S5 S0~S5 S0~S5 S0~S5
D D
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
1
2
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4
5
6
Date: Sheet
Index & Power Status
Index & Power Status
Index & Power Status
GM3 2B
GM3 2B
GM3 2B
7
of
of
of
262Monday, March 24, 2008
262Monday, March 24, 2008
262Monday, March 24, 2008
8
1
2
3
4
5
6
7
8
H_D#[0..63] H_D#[0..63]
T148
T148 PAD
PAD
H_D#[0..63]
T152
T152 PAD
PAD
Place C close to the CPU_TEST4 pin. Make sure CPU_TEST4 routing is reference to GND and away from other noisy signal.
31
Q29
Q29 2N7002W-7-F
2N7002W-7-F
2
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9
T147
T147
H_D#10
PAD
PAD
H_D#11 H_D#12 H_D#13 H_D#14 H_D#15
H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25
T156
T156
H_D#26
PAD
PAD
H_D#27 H_D#28 H_D#29 H_D#30 H_D#31
V_CPU_GTLREF CPU_TEST1 CPU_TEST2 CPU_TEST3 CPU_TEST4 CPU_TEST5 CPU_TEST6
R137 1K/F_NCR137 1K/F_NC R127 1K/F_NCR127 1K/F_NC C54 0.1U_NC
C54 0.1U_NC
10
10
R138 0_NCR138 0_NC
H_THERMTRIP# 6,52
E22 F24 E26 G22 F23 G25 E25 E23 K24 G24
J24
J23 H22 F26 K22 H23
J26 H26 H25
N22 K25 P26 R23 L23 M24 L22 M23 P25 P23 P22 T24 R24 L25 T25 N25 L26 M26 N24
AD26
C23 D25 C24
AF26
AF1 A26
B22 B23 C21
CPU_TEST1 CPU_TEST2 CPU_TEST4 CPU_TEST6
U42B
U42B
D[0]# D[1]# D[2]# D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10]# D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]#
D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]#
GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6
BSEL[0] BSEL[1] BSEL[2]
MLX_47387-4784
MLX_47387-4784
Y22
D[32]#
AB24
D[33]#
V24
D[34]#
V26
D[35]#
V23
D[36]#
T22
D[37]#
U25
D[38]# D[39]# D[40]# D[41]# D[42]# D[43]# D[44]# D[45]# D[46]#
D[47]# DSTBN[2]# DSTBP[2]#
DINV[2]#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]# DSTBN[3]# DSTBP[3]#
DINV[3]# COMP[0]
COMP[1] COMP[2] COMP[3]
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
PAD
PAD PADT3PAD
U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22
AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20
R26 U26 AA1 Y1
E5 B5 D24 D6 D7 AE6
T14
T14 T3
BCLK
133 166 200
DATA GRP 0 DATA GRP 1
DATA GRP 0 DATA GRP 1
DATA GRP 2DATA GRP 3
DATA GRP 2DATA GRP 3
MISC
MISC
For the purpose of testability, route these signals through a ground referenced Z0 = 55ohm trace that ends in a via that is near a GND via and is accessible through an oscilloscope connection.
FSB 533 0 0 667 800
ITP disable guidelines
Signal Resistor Value Connect To Resistor Placement
Within 2.0" of the ITP
150 ohm +/- 5%
TDI
39 ohm +/- 5%
TMS
680 ohm +/- 5%
TRST#
27 ohm +/- 5%
TCK
Open
TDO
ITP_EN R268 Depop +3VRUN
5
VTT
Within 2.0" of the ITP
VTT
Within 2.0" of the ITP
GND
Within 2.0" of the ITP
GND
Within 2.0" of the ITP
VTT
Close to CK410M Pin8
6
H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47
H_D#[0..63] H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
COMP0 COMP1 COMP2 COMP3
CPU_TEST3 CPU_TEST5
Note: H_DPRTSTP need to daisy chain from ICH8 to IMVP6 to CPU.
BSEL2 BSEL1 BSEL0
1
0
H_D#[0..63] 5
PAD
PAD
PAD
PAD
PAD
PAD
H_DSTBN#2 5 H_DSTBP#2 5 H_DINV#2 5
H_D#[0..63] 5
H_DSTBN#3 5 H_DSTBP#3 5 H_DINV#3 5
H_DPRSTP# 6,11,51 H_DPSLP# 11 H_DPWR# 5 H_PWRGOOD 11 H_CPUSLP# 5 H_PSI# 51
T169
T169
T172
T172
T173
T173
H_D#32
H_D#40
H_D#53
H_D#57
T168
T168
PAD
PAD
1
0011
COMP0 COMP1 COMP2 COMP3
R59
R59
R62
R62
54.9/F
54.9/F
Comp0,2 connect with Zo=27.4ohm,Comp1,3 connect with Zo=55ohm, make those traces length shorter than 0.5".Trace should be at least 25 mils away from any other toggling signal.
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
COMPUTER
Merom Processor (HOST BUS)
Merom Processor (HOST BUS)
Merom Processor (HOST BUS)
GM3 2B
GM3 2B
GM3 2B
7
27.4/F
27.4/F
R78
R78
54.9/F
54.9/F
R87
R87
27.4/F
27.4/F
of
of
of
362Monday, March 24, 2008
362Monday, March 24, 2008
362Monday, March 24, 2008
8
H_A#14 H_A#9 H_A#24 H_A#17
H_A#[3..16]
T176
T176 PAD
PAD
H_REQ#[0..4]
H_A#[17..35]
T180PADT180PAD T185PADT185PAD T184PADT184PAD
T182
T182 PAD
PAD
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35
H_A#[3..16]5
A A
H_ADSTB#05 H_REQ#[0..4]5
H_A#[17..35]5
T177PADT177PAD
B B
H_ADSTB#15
H_A20M#11
H_FERR#11
H_IGNNE#11 H_STPCLK#11
H_INTR11 H_NMI11 H_SMI#11
C C
U42A
U42A
J4
A[3]#
L5
A[4]#
L4
A[5]#
K5
A[6]#
M3
A[7]#
N2
A[8]#
J1
A[9]#
N3
A[10]#
P5
A[11]#
P2
A[12]#
L2
A[13]#
P4
A[14]#
P1
A[15]#
R1
A[16]#
M1
ADSTB[0]#
K3
REQ[0]#
H2
REQ[1]#
K2
REQ[2]#
J3
REQ[3]#
L1
REQ[4]#
Y2
A[17]#
U5
A[18]#
R3
A[19]#
W6
A[20]#
U4
A[21]#
Y5
A[22]#
U1
A[23]#
R4
A[24]#
T5
A[25]#
T3
A[26]#
W2
A[27]#
W5
A[28]#
Y4
A[29]#
U2
A[30]#
V4
A[31]#
W3
A[32]#
AA4
A[33]#
AB2
A[34]#
AA3
A[35]#
V1
ADSTB[1]#
A6
A20M#
A5
FERR#
C4
IGNNE#
D5
STPCLK#
C6
LINT0
B4
LINT1
A3
SMI#
M4
RSVD[01]
N5
RSVD[02]
T2
RSVD[03]
V3
RSVD[04]
B2
RSVD[05]
C3
RSVD[06]
D2
RSVD[07]
D22
RSVD[08]
D3
RSVD[09]
F6
RSVD[10]
MLX_47387-4784
MLX_47387-4784
ADDR GROUP 0
ADDR GROUP 0
CONTROL
CONTROL
ADDR GROUP 1
ADDR GROUP 1
XDP/ITP SIGNALS
XDP/ITP SIGNALS
THERMAL
THERMAL
PROCHOT#
THERMDA THERMDC
ICH
ICH
THERMTRIP#
H CLK
H CLK
RESERVED
RESERVED
H1
ADS#
E2
BNR#
G5
BPRI#
H5
DEFER#
F21
DRDY#
E1
DBSY#
F1
BR0#
IERR#
INIT#
LOCK#
RESET#
RS[0]# RS[1]# RS[2]#
TRDY#
HIT#
HITM#
BPM[0]# BPM[1]# BPM[2]# BPM[3]#
PRDY# PREQ#
TDO TMS
TRST#
DBR#
BCLK[0] BCLK[1]
TCK
H_IERR#
D20 B3
H4 C1
F3 F4 G3 G2
G6 E4
ITP_BPM#0
AD4
ITP_BPM#1
AD3
ITP_BPM#2
AD1
ITP_BPM#3
AC4
ITP_BPM#4
AC2
ITP_BPM#5
AC1
ITP_TCK
AC5
ITP_TDI
AA6
TDI
ITP_TDO
AB3
ITP_TMS
AB5
ITP_TRST#
AB6
ITP_DBRESET#
C20
R134 56R134 56
H_PROCHOT#
D21
H_THERMDA
A24
H_THERMDC
B25
H_THERM
C7
R118 56R118 56
A22 A21
H_THERMDA H_THERMDC
2200P_NC 50
2200P_NC 50
R132 56R132 56
R121 0R121 0
C777
C777
H_ADS# 5 H_BNR# 5 H_BPRI# 5
H_DEFER# 5 H_DRDY# 5 H_DBSY# 5 H_BR0# 5
+1.05V_VCCP H_INIT# 11 H_LOCK# 5
H_RESET#H_RESET#_L
H_RS#0 5 H_RS#1 5 H_RS#2 5 H_TRDY# 5
H_HIT# 5 H_HITM# 5
ITP_DBRESET# 13
+1.05V_VCCP
T13PAD T13PAD
H_THERMDA 39
H_THERMDC 39
+1.05V_VCCP
CLK_CPU_BCLK 17 CLK_CPU_BCLK# 17
+1.05V_VCCP
H_PROCHOT#
Layout Note: Place R421 close to
R11651R116
CPU.
51
H_RESET# 5
Layout Note: Place voltage divider within
0.5" of GTLREF pin
+1.05V_VCCP
R60
R60 1K/F
1K/F
R53
R53 2K/F
2K/F
+1.05V_VCCP
2
Q69
Q69
31
2N7002W-7-F_NC
2N7002W-7-F_NC
+3.3V_ALW
H_D#[0..63]5
H_DSTBN#05 H_DSTBP#05 H_DINV#05
H_D#[0..63]5
T165
T165 PAD
PAD
H_D#28
H_DSTBN#15 H_DSTBP#15 H_DINV#15
CPU_MCH_BSEL06,17 CPU_MCH_BSEL16,17 CPU_MCH_BSEL26,17
Voltage Level shift
R693
R693
2.2K_NC
2.2K_NC
CPU_PROCHOT#
Populate ITP700Flex for bringup
+1.05V_VCCP
R594
R595
R595 39/F
39/F
R594 150
150
JITP1
JITP1
1
TDI
2
TMS
5
TCK
7
TDO
3
TRST#
12
RESET#
11
FBO
8
BCLKN
9
BCLKP
10
GND0
14
GND1
16
GND2
18
GND3
20
GND4
22
GND5
2
R59951R599 51
ITP_TDI ITP_TMS ITP_TCK ITP_TDO ITP_TRST#
H_RESET# ITP_DBRESET#
D D
ITP_TCK
CLK_CPU_ITP#17 CLK_CPU_ITP17
R597 27/FR597 27/F
R596 649/FR596 649/F
1
R598 0_NCR598 0_NC
R600 22.6/F_NCR600 22.6/F_NC
ITP_TCK
ITP_TRST#
Layout Note: Place couple 0.1uF Decoupling caps with in 0.1" ITP connector.
+1.05V_VCCP
C673 0.1U_NC
C673 0.1U_NC
10
VTT0 VTT1
VTAP
DBR# DBA#
BPM0# BPM1# BPM2# BPM3# BPM4# BPM5#
NC0
NC1 GND_0 GND_1
ITP700Flex_NC
ITP700Flex_NC
27 28 26
25 24
ITP_BPM#0
23
ITP_BPM#1
21
ITP_BPM#2
19
ITP_BPM#3
17
ITP_BPM#4
15
ITP_BPM#5
13 4 6 29 30
10
C674 0.1U_NC
C674 0.1U_NC
10
10
R602 150R602 150
Layout nopte: Place R412,R354, R408, R409, R350 and R406 close to CPU
3
+3.3V_SUS
H_THERM
Q81
Q81
MMST3904-7-F
MMST3904-7-F
4
+3.3V_RUN
2
12
R130
R130 10M
10M
12
C976
C976
0.1U
0.1U
1 3
10
10
1
2
3
4
5
6
7
8
+VCC_CORE +VCC_CORE
+VCC_CORE
A A
+VCC_CORE
All use 10U 4V(+-20%,X6S,0805)Pb-Free.
C81
C78
C78 10U
10U
4
4 805
805
C82
C82 10U
10U
4
4 805
805
C81 10U
10U
4
4 805
805
C83
C83 10U
10U
4
4 805
805
C80
C80 10U
10U
4
4 805
805
C84
C84 10U
10U
4
4 805
805
C79
C79 10U
10U
4
4 805
805
C85
C85 10U
10U
4
4 805
805
C732
C732 10U
10U
4
4 805
805
C77
C77 10U
10U
4
4 805
805
8 inside cavity, north side, secondary layer.
+VCC_CORE
C761
C141
C143
C144
C144 10U
10U
4
4 805
805
B B
+VCC_CORE
C140
C140 10U
10U
4
4 805
805
C143 10U
10U
4
4 805
805
C139
C139 10U
10U
4
4 805
805
C142
C142 10U
10U
4
4 805
805
C138
C138 10U
10U
4
4 805
805
C141 10U
10U
4
4 805
805
C137
C137 10U
10U
4
4 805
805
C761 10U
10U
4
4 805
805
C136
C136 10U
10U
4
4 805
805
8 inside cavity, south side, secondary layer.
+VCC_CORE
C728
C729
C729 10U
10U
4
4 805
805
C728 10U
10U
4
4 805
805
C727
C727 10U
10U
4
4 805
805
C726
C726 10U
10U
4
4 805
805
C731
C731 10U
10U
4
4 805
805
C730
C730 10U
10U
4
4 805
805
6 inside cavity, north side, primary layer.
+VCC_CORE
C C
C755
C755 10U
10U
4
4 805
805
C756
C756 10U
10U
4
4 805
805
C757
C757 10U
10U
4
4 805
805
C758
C758 10U
10U
4
4 805
805
C759
C759 10U
10U
4
4 805
805
C760
C760 10U
10U
4
4 805
805
6 inside cavity, south side, primary layer.
+1.05V_VCCP
C127
C91
C91
0.1U
0.1U
10
10
Layout out: Place these inside socket cavity on North side secondary.
D D
C112
C112
0.1U
0.1U
10
10
C87
C87
0.1U
0.1U
10
10
C127
0.1U
0.1U
10
10
C88
C88
0.1U
0.1U
10
10
C128
C128
0.1U
0.1U
10
10
+PWR_SRC
+
+
C733
C733 100U
100U
25
25
Layout Note: Need to add 100uF cap on PWR_SRC for cap singing. Place on PWR_SRC near +VCC_CORE.
AA10 AA12 AA13 AA15 AA17 AA18 AA20
AC10 AB10 AB12 AB14 AB15 AB17 AB18
A10 A12 A13 A15 A17 A18 A20
B10 B12 B14 B15 B17 B18 B20
C10 C12 C13 C15 C17 C18
D10 D12 D14 D15 D17 D18
E10 E12 E13 E15 E17 E18 E20
F10 F12 F14 F15 F17 F18 F20 AA7 AA9
AB9
A7 A9
B7 B9
C9
D9
E7 E9
F7 F9
U42C
U42C
VCC[001] VCC[002] VCC[003] VCC[004] VCC[005] VCC[006] VCC[007] VCC[008] VCC[009] VCC[010] VCC[011] VCC[012] VCC[013] VCC[014] VCC[015] VCC[016] VCC[017] VCC[018] VCC[019] VCC[020] VCC[021] VCC[022] VCC[023] VCC[024] VCC[025] VCC[026] VCC[027] VCC[028] VCC[029] VCC[030] VCC[031] VCC[032] VCC[033] VCC[034] VCC[035] VCC[036] VCC[037] VCC[038] VCC[039] VCC[040] VCC[041] VCC[042] VCC[043] VCC[044] VCC[045] VCC[046] VCC[047] VCC[048] VCC[049] VCC[050] VCC[051] VCC[052] VCC[053] VCC[054] VCC[055] VCC[056] VCC[057] VCC[058] VCC[059] VCC[060] VCC[061] VCC[062] VCC[063] VCC[064]
VCCSENSE VCC[065] VCC[066] VCC[067]
VSSSENSE
MLX_47387-4784
MLX_47387-4784
+
+
C766
C766 100U
100U
25
25
VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100]
VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]
VCCA[01] VCCA[02]
VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]
AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20
G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21
B26 C26
AD6 AF5 AE5 AF4 AE3 AF3 AE2
AF7
AE7
.
.
+
+
C736
C736 100U_NC
100U_NC
25
25
+VCCSENSE
+VSSSENSE
+1.05V_VCCP
+
+
C96
C96 220U
220U
4
4
VID0 51 VID1 51 VID2 51 VID3 51 VID4 51 VID5 51 VID6 51
+VCCSENSE 51
+VSSSENSE 51
+
+
C720
C720 100U_NC
100U_NC
25
25
+1.5V_RUN
C781
+VCC_CORE
R47
R47 100/F
100/F
R48
R48 100/F
100/F
C781 10U
10U
4
4
C194
C194
0.01U
0.01U
25
25
Layout Note: Place C105 near PIN B26.
+VCCSENSE +VSSSENSE
Route VCCSENSE and VSSSENSE traces at 27.4ohms and length matched to within 25 mil. Place PU and PD within 2 inch of CPU.
U42D
U42D
A4
VSS[001]
A8
VSS[002]
A11
VSS[003]
A14
VSS[004]
A16
VSS[005]
A19
VSS[006]
A23
VSS[007]
AF2
VSS[008]
B6
VSS[009]
B8
VSS[010]
B11
VSS[011]
B13
VSS[012]
B16
VSS[013]
B19
VSS[014]
B21
VSS[015]
B24
VSS[016]
C5
VSS[017]
C8
VSS[018]
C11
VSS[019]
C14
VSS[020]
C16
VSS[021]
C19
VSS[022]
C2
VSS[023]
C22
VSS[024]
C25
VSS[025]
D1
VSS[026]
D4
VSS[027]
D8
VSS[028]
D11
VSS[029]
D13
VSS[030]
D16
VSS[031]
D19
VSS[032]
D23
VSS[033]
D26
VSS[034]
E3
VSS[035]
E6
VSS[036]
E8
VSS[037]
E11
VSS[038]
E14
VSS[039]
E16
VSS[040]
E19
VSS[041]
E21
VSS[042]
E24
VSS[043]
F5
VSS[044]
F8
VSS[045]
F11
VSS[046]
F13
VSS[047]
F16
VSS[048]
F19
VSS[049]
F2
VSS[050]
F22
VSS[051]
F25
VSS[052]
G4
VSS[053]
G1
VSS[054]
G23
VSS[055]
G26
VSS[056]
H3
VSS[057]
H6
VSS[058]
H21
VSS[059]
H24
VSS[060]
J2
VSS[061]
J5
VSS[062]
J22
VSS[063]
J25
VSS[064]
K1
VSS[065]
K4
VSS[066]
K23
VSS[067]
K26
VSS[068]
L3
VSS[069]
L6
VSS[070]
L21
VSS[071]
L24
VSS[072]
M2
VSS[073]
M5
VSS[074]
M22
VSS[075]
M25
VSS[076]
N1
VSS[077]
N4
VSS[078]
N23
VSS[079]
N26
VSS[080] VSS[081]P3VSS[162]
MLX_47387-4784
MLX_47387-4784
VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161]
VSS[163]
P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25
.
.
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet
Merom Processor (POWER)
Merom Processor (POWER)
Merom Processor (POWER)
GM3 2B
GM3 2B
GM3 2B
7
of
of
of
462Monday, March 24, 2008
462Monday, March 24, 2008
462Monday, March 24, 2008
8
1
T154
T154 PAD
PAD
2
T155
T155 PAD
PAD
3
4
5
6
7
8
1 2
C805
C805
0.1U/10V
0.1U/10V
H_D#12H_D#3
H_D#[0..63]3
+1.05V_VCCP
1 2
12
R720
R720 1K/F
1K/F
R728
R728 2K/F
2K/F
U45A
H_D#[0..63]
H_RESET#3
H_CPUSLP#3
12
C807
C807
0.1U/10V
0.1U/10V
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_SWING H_RCOMP
H_SCOMP H_SCOMP#
R192 0R192 0
1 2
H_REF
U45A
E2
H_D#_0
G2
H_D#_1
G7
H_D#_2
M6
H_D#_3
H7
H_D#_4
H3
H_D#_5
G4
H_D#_6
F3
H_D#_7
N8
H_D#_8
H2
H_D#_9
M10
H_D#_10
N12
H_D#_11
N9
H_D#_12
H5
H_D#_13
P13
H_D#_14
K9
H_D#_15
M2
H_D#_16
W10
H_D#_17
Y8
H_D#_18
V4
H_D#_19
M3
H_D#_20
J1
H_D#_21
N5
H_D#_22
N3
H_D#_23
W6
H_D#_24
W9
H_D#_25
N2
H_D#_26
Y7
H_D#_27
Y9
H_D#_28
P4
H_D#_29
W3
H_D#_30
N1
H_D#_31
AD12
H_D#_32
AE3
H_D#_33
AD9
H_D#_34
AC9
H_D#_35
AC7
H_D#_36
AC14
H_D#_37
AD11
H_D#_38
AC11
H_D#_39
AB2
H_D#_40
AD7
H_D#_41
AB1
H_D#_42
Y3
H_D#_43
AC6
H_D#_44
AE2
H_D#_45
AC5
H_D#_46
AG3
H_D#_47
AJ9
H_D#_48
AH8
H_D#_49
AJ14
H_D#_50
AE9
H_D#_51
AE11
H_D#_52
AH12
H_D#_53
AJ5
H_D#_54
AH5
H_D#_55
AJ6
H_D#_56
AE7
H_D#_57
AJ7
H_D#_58
AJ2
H_D#_59
AE5
H_D#_60
AJ3
H_D#_61
AH2
H_D#_62
AH13
H_D#_63
B3
H_SWING
C2
H_RCOMP
W1
H_SCOMP
W2
H_SCOMP#
B6
H_CPURST#
E5
H_CPUSLP#
B9
H_AVREF
A9
H_DVREF
CRESTLINE_1p0_DU
CRESTLINE_1p0_DU
HOST
HOST
H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8
H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35
H_ADS# H_ADSTB#_0 H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM# H_LOCK# H_TRDY#
H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3
H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3
H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3
H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4
H_RS#_0 H_RS#_1 H_RS#_2
J13 B11 C11 M11 C15 F16 L13 G17 C14 K16 B13 L16 J17 B14 K19 P15 R17 B16 H20 L19 D17 M17 N16 J19 B18 E19 B17 B15 E17 C18 A19 B19 N19
G12 H17 G20 C8 E8 F12 D6 C10 AM5 AM7 H8 K7 E4 C6 G10 B7
K5 L2 AD13 AE13
M7 K3 AD2 AH11
L7 K2 AC2 AJ10
M14 E13 A11 H13 B12
E12 D7 D8
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35
H_A#[3..35]
H_ADS# 3 H_ADSTB#0 3 H_ADSTB#1 3 H_BNR# 3 H_BPRI# 3 H_BR0# 3 H_DEFER# 3 H_DBSY# 3 CLK_MCH_BCLK 17 CLK_MCH_BCLK# 17 H_DPWR# 3 H_DRDY# 3 H_HIT# 3 H_HITM# 3 H_LOCK# 3 H_TRDY# 3
H_DINV#0 3 H_DINV#1 3 H_DINV#2 3 H_DINV#3 3
H_REQ#0 3 H_REQ#1 3 H_REQ#2 3 H_REQ#3 3 H_REQ#4 3
H_RS#0 3 H_RS#1 3 H_RS#2 3
H_A#[3..35] 3
T149
T149
T150
T150
PAD
PAD
PAD
PAD
T159
T159 PAD
PAD
T160
T160 PAD
PAD
H_DSTBN#0 3 H_DSTBN#1 3 H_DSTBN#2 3 H_DSTBN#3 3
H_DSTBP#0 3 H_DSTBP#1 3 H_DSTBP#2 3 H_DSTBP#3 3
T164
T164 PAD
PAD
A A
B B
C C
H_D#27 H_D#28
+1.05V_VCCP
12
R733
R733 221/F
221/F
H_SWING
12
R732
R732 100/F
100/F
+1.05V_VCCP
12
12
R268
R268
R272
R272
54.9/F
54.9/F
54.9/F
54.9/F
H_SCOMP H_SCOMP#
12
R734
R734
24.9/F
24.9/F
H_RCOMP
Layout Note: H_RCOMP trace should be 10-mil wide with 20-mil spacing.
U45 QCI PN
Layout Note: Place the 0.1 uF
D D
1
2
decoupling capacitor within 100 mils from GMCH pins.
3
4
5
DIS AJSLA5U0T11
UMA AJSLA5T0T13
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
6
Date: Sheet
Crestline (HOST)
Crestline (HOST)
Crestline (HOST)
GM3 2B
GM3 2B
GM3 2B
7
of
of
of
562Monday, March 24, 2008
562Monday, March 24, 2008
562Monday, March 24, 2008
8
1
+1.8V_SUS
R323
R323 1K/F
C390
C390
2.2U
2.2U
10
10
C412
C412
2.2U
2.2U
10
10
THERMTRIP_MCH#
1
1K/F
R319
R319
3.01K
3.01K
R322
R322 1K/F
1K/F
UMA_LCD_A3-26 UMA_LCD_A3+26 UMA_LCD_B3-26 UMA_LCD_B3+26
PM_EXTTS#0 PM_EXTTS#1
R208 0_UMAR208 0_UMA R215 0_UMAR215 0_UMA R179 0_UMAR179 0_UMA R180 0_UMAR180 0_UMA
Layout Note: Location of all MCH_CFG strap resistors needs to be close to minmize stub.
CPU_MCH_BSEL03,17 CPU_MCH_BSEL13,17 CPU_MCH_BSEL23,17
R243
R243
R214
R214
R255
R255
+3.3V_RUN
R258
R258 R246
R246
PM_BMBUSY#13
H_DPRSTP#3,11,51 PM_EXTTS#015 PM_EXTTS#115 ICH_PWRGD13,44
DPRSLPVR13,51
SB_NB_PCIE_RST#12
SM_RCOMP_VOH
C377
C377
0.01U
0.01U
25
25
A A
SM_RCOMP_VOL
C399
C399
0.01U
0.01U
25
25
Santa Rosa Platform MOW WW15 For 4Gb DRAM support, change Pin-BJ29 to DDR_A_MA14, change Pin-BE24 to DDR_B_MA14.
DDR_A_MA1415,16 DDR_B_MA1415,16
B B
+3.3V_RUN
R253 10KR253 10K R247 10KR247 10K
+1.05V_VCCP
R262 56R262 56
C C
D D
2
U45B
U45B
P36
RSVD1
P37
RSVD2
R35
RSVD3
N35
RSVD4
AR12
RSVD5
AR13
RSVD6
AM12
RSVD7
AN13
RSVD8
J12
RSVD9
AR37
RSVD10
AM36
RSVD11
AL36
RSVD12
AM37
RSVD13
D20
RSVD14
H10
RSVD20
B51
RSVD21
BJ20
RSVD22
BK22
RSVD23
BF19
RSVD24
BH20
RSVD25
BK18
RSVD26
BJ18
RSVD27
BF23
RSVD28
BG23
RSVD29
BC23
RSVD30
BD24
RSVD31
BJ29
RSVD32
BE24
RSVD33
BH39
RSVD34
AW20
RSVD35
BK20
CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20
RSVD36
C48
RSVD37
D47
RSVD38
B44
RSVD39
C44
RSVD40
A35
RSVD41
B37
RSVD42
B36
RSVD43
B34
RSVD44
C34
RSVD45
P27
CFG_0
N27
CFG_1
N24
CFG_2
C21
CFG_3
C23
CFG_4
F23
CFG_5
N23
CFG_6
G23
CFG_7
J20
CFG_8
C20
CFG_9
R24
CFG_10
L23
CFG_11
J23
CFG_12
E23
CFG_13
E20
CFG_14
K23
CFG_15
M20
CFG_16
M24
CFG_17
L32
CFG_18
N33
CFG_19
L35
CFG_20
G41
PM_BM_BUSY#
L39
PM_DPRSTP#
L36
PM_EXT_TS#_0
J36
PM_EXT_TS#_1
AW49
PWROK
AV20
RSTIN#
N20
THERMTRIP#
G36
DPRSLPVR
BJ51
NC_1
BK51
NC_2
BK50
NC_3
BL50
NC_4
BL49
NC_5
BL3
NC_6
BL2
NC_7
BK1
NC_8
BJ1
NC_9
E1
NC_10
A5
NC_11
C51
NC_12
B50
NC_13
A50
NC_14
A49
NC_15
BK2
NC_16
CRESTLINE_1p0_DU
CRESTLINE_1p0_DU
R296 100R296 100
PLTRST#_R
UMA_LCD_A3-_R UMA_LCD_A3+_R UMA_LCD_B3-_R UMA_LCD_B3+_R
T110
T110
PAD
PAD
T108
T108
PAD
PAD
4.02K_NC
4.02K_NC
T26
T26
PAD
PAD
T19
T19
PAD
PAD
T16
T16
PAD
PAD
4.02K_NC
4.02K_NC
T27
T27
PAD
PAD
T21
T21
PAD
PAD
T20
T20
PAD
PAD
T18
T18
PAD
PAD
T15
T15
PAD
PAD
T25
T25
PAD
PAD
4.02K_NC
4.02K_NC
T23
T23
PAD
PAD
T24
T24
PAD
PAD
4.02K_NC
4.02K_NC
4.02K_NC
4.02K_NC
PM_EXTTS#0 PM_EXTTS#1
PLTRST#_R THERMTRIP_MCH#
R227 0R227 0
T112
T112
PAD
PAD
T114
T114
PAD
PAD
T116
T116
PAD
PAD
T120
T120
PAD
PAD
T117
T117
PAD
PAD
T121
T121
PAD
PAD
T118
T118
PAD
PAD
T115
T115
PAD
PAD
T113
T113
PAD
PAD
T111
T111
PAD
PAD
T106
T106
PAD
PAD
T100
T100
PAD
PAD
T101
T101
PAD
PAD
T102
T102
PAD
PAD
T107
T107
PAD
PAD
T119
T119
PAD
PAD
R292 0_NCR292 0_NC
PLTRST#12,25,30,33,34,42
R291 0R291 0
2
DDR MUXINGCLKDMI
DDR MUXINGCLKDMI
CFGRSVD
CFGRSVD
PM
PM
GRAPHICS VIDME
GRAPHICS VIDME
NC
NC
MISC
MISC
3
SM_CK_0 SM_CK_1 SM_CK_3 SM_CK_4
SM_CK#_0 SM_CK#_1 SM_CK#_3
SM_CK#_4
SM_CKE_0 SM_CKE_1 SM_CKE_3 SM_CKE_4
SM_CS#_0 SM_CS#_1 SM_CS#_2 SM_CS#_3
SM_ODT_0 SM_ODT_1 SM_ODT_2 SM_ODT_3
SM_RCOMP
SM_RCOMP#
SM_RCOMP_VOH SM_RCOMP_VOL
SM_VREF_0 SM_VREF_1
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
PEG_CLK
PEG_CLK#
DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3
DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3
DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3
DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3
GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3
GFX_VR_EN
CL_CLK
CL_DATA
CL_PWROK
CL_RST# CL_VREF
SDVO_CTRL_CLK
SDVO_CTRL_DATA
CLK_REQ#
ICH_SYNC#
TEST_1 TEST_2
3
AV29 BB23 BA25 AV23
AW30 BA23 AW25 AW23
BE29 AY32 BD39 BG37
BG20 BK16 BG16 BE13
BH18 BJ15 BJ14 BE16
SMRCOMPP
BL15
SMRCOMPN
BK14
SM_RCOMP_VOH
BK31
SM_RCOMP_VOL
BL31 AR49
AW4
B42 C42 H48 H47
K44 K45
AN47 AJ38 AN42 AN46
AM47 AJ39 AN41 AN45
AJ46 AJ41 AM40 AM44
AJ47 AJ42 AM39 AM43
E35 A39 C38 B39 E36
AM49 AK50 AT43 AN49 AM50
MCH_CLVREF
SDVO_CTRLCLK_L
H35
SDVO_CTRLDATA_L
K36 G39 G40
A37 R32
M_CLK_DDR0 15 M_CLK_DDR1 15 M_CLK_DDR3 15 M_CLK_DDR4 15
M_CLK_DDR#0 15 M_CLK_DDR#1 15 M_CLK_DDR#3 15 M_CLK_DDR#4 15
DDR_CKE0_DIMMA 15,16 DDR_CKE1_DIMMA 15,16 DDR_CKE3_DIMMB 15,16 DDR_CKE4_DIMMB 15,16
DDR_CS0_DIMMA# 15,16 DDR_CS1_DIMMA# 15,16 DDR_CS2_DIMMB# 15,16 DDR_CS3_DIMMB# 15,16
M_ODT0 15,16 M_ODT1 15,16 M_ODT2 15,16 M_ODT3 15,16
+V_DDR_MCH_REF
MCH_DREFCLK_L
MCH_DREFCLK#_L DREF_SSCLK_L DREF_SSCLK#_L
CLK_MCH_3GPLL 17 CLK_MCH_3GPLL# 17
DMI_MRX_ITX_N0 12
DMI_MRX_ITX_N1 12
DMI_MRX_ITX_N2 12
DMI_MRX_ITX_N3 12
DMI_MRX_ITX_P0 12 DMI_MRX_ITX_P1 12 DMI_MRX_ITX_P2 12 DMI_MRX_ITX_P3 12
DMI_MTX_IRX_N0 12 DMI_MTX_IRX_N1 12 DMI_MTX_IRX_N2 12 DMI_MTX_IRX_N3 12
DMI_MTX_IRX_P0 12
DMI_MTX_IRX_P1 12
DMI_MTX_IRX_P2 12
DMI_MTX_IRX_P3 12
T17 PADT17 PAD T104 PADT104 PAD T103 PADT103 PAD T105 PADT105 PAD T109 PADT109 PAD
CL_CLK0 13 CL_DATA0 13 ICH_CL_PWROK 13,31
ICH_CL_RST0# 13
R157 0_DISR157 0_DIS R156 0_DISR156 0_DIS
CLK_3GPLLREQ# 17 MCH_ICH_SYNC# 13
R2090R209
R260
R260
0
20K
20K
+3.3V_RUN
POP FOR UMA
R717 0_UMAR717 0_UMA R716 0_UMAR716 0_UMA R241 0_UMAR241 0_UMA R230 0_UMAR230 0_UMA
H_THERMTRIP#3,52
4
POP FOR UMA
SMRCOMPP SMRCOMPN
R261 0_NCR261 0_NC
LCD_DDCCLK_R LCD_DDCDAT_R
+1.8V_SUS
R321
R321 20/F
20/F
R318
R318 20/F
20/F
MCH_DREFCLK 17 MCH_DREFCLK# 17 DREF_SSCLK 17 DREF_SSCLK# 17
UMA_VGA_BLU27 UMA_VGA_GRN27 UMA_VGA_RED27
UMA_CRT_CLK_DDC27 UMA_CRT_DAT_DDC27
UMA_VGAHSYNC27 UMA_VGAVSYNC27
THERMTRIP_MCH#
UMA_VGA_BLU_R UMA_VGA_GRN_R UMA_VGA_RED_R
R159 2.2K_UMAR159 2.2K_UMA R160 2.2K_UMAR160 2.2K_UMA
R213 0R213 0 R187 0R187 0
R239 0_DUR239 0_DU R249 0_DUR249 0_DU R228 0_DUR228 0_DU
UMA USE RESISTOR 150/F PN:CS11502FB21
DIS USE 0 OHM PN:CS00002JB38
Layout Note: Place 150 ohm termination resistors close to GMCH.
4
LCTLA_CLK LCTLB_DATA
UMA_BIA_PWM26 UMA_PANEL_BKEN31
UMA_LCD_DDCCLK26 UMA_LCD_DDCDAT26
UMA_ENVDD26
UMA_LCD_ACLK-_C26 UMA_LCD_ACLK+_C26 UMA_LCD_BCLK-_C26 UMA_LCD_BCLK+_C26
UMA_LCD_A0-26 UMA_LCD_A1-26 UMA_LCD_A2-26
UMA_LCD_A0+26 UMA_LCD_A1+26 UMA_LCD_A2+26
UMA_LCD_B0-26 UMA_LCD_B1-26 UMA_LCD_B2-26
UMA_LCD_B0+26 UMA_LCD_B1+26 UMA_LCD_B2+26
+1.25V_RUN
Non-iAMT
MCH_CLVREF
C344
C344
0.1U
0.1U
R153 0_UMAR153 0_UMA R152 0_UMAR152 0_UMA R154 0_UMAR154 0_UMA
R149 0_UMAR149 0_UMA R150 0_UMAR150 0_UMA
R155 30/F_UMAR155 30/F_UMA
1 2
R222 1.3K_UMAR222 1.3K_UMA
R151 30/F_UMAR151 30/F_UMA
1 2
POP FOR UMA
5
POP FOR UMA
R139 0_UMAR139 0_UMA R226 0_UMAR226 0_UMA
R144 0_UMAR144 0_UMA R145 0_UMAR145 0_UMA R181 0_UMAR181 0_UMA
T22
T22
PAD
PAD
R197 0_UMAR197 0_UMA R198 0_UMAR198 0_UMA R188 0_UMAR188 0_UMA R189 0_UMAR189 0_UMA
R173 0_UMAR173 0_UMA R195 0_UMAR195 0_UMA R177 0_UMAR177 0_UMA
R174 0_UMAR174 0_UMA R196 0_UMAR196 0_UMA R178 0_UMAR178 0_UMA
R201 0_UMAR201 0_UMA R176 0_UMAR176 0_UMA R200 0_UMAR200 0_UMA
R202 0_UMAR202 0_UMA R175 0_UMAR175 0_UMA R199 0_UMAR199 0_UMA
17
R290
R290 1K/F
1K/F
R282
R282 392/F
392/F
R158 0_DISR158 0_DIS R161 0_DISR161 0_DIS R167 0_DISR167 0_DIS R168 0_DISR168 0_DIS R244 0_DISR244 0_DIS R225 0_DISR225 0_DIS R229 0_DISR229 0_DIS R724 0_DISR724 0_DIS R723 0_DISR723 0_DIS R242 0_DISR242 0_DIS R231 0_DISR231 0_DIS
POP FOR DIS
5
UMA_BIA_PWM_R
PANEL_BKEN_R LCTLA_CLK LCTLB_DATA
LCD_DDCCLK_R
LCD_DDCDAT_R
ENVDD_R
R240 3.3K/F_UMAR240 3.3K/F_UMA
12
R248 0_UMAR248 0_UMA
UMA_LCD_ACLK­UMA_LCD_ACLK+ UMA_LCD_BCLK­UMA_LCD_BCLK+
UMA_LCD_A0-_R UMA_LCD_A1-_R UMA_LCD_A2-_R
UMA_LCD_A0+_R UMA_LCD_A1+_R UMA_LCD_A2+_R
UMA_LCD_B0-_R UMA_LCD_B1-_R UMA_LCD_B2-_R
UMA_LCD_B0+_R UMA_LCD_B1+_R UMA_LCD_B2+_R
R269 0_DUR269 0_DU R284 0_DUR284 0_DU R286 0_DUR286 0_DU
R269, R284 and R286 DIS: 0 -->CS00002JB38 UMA: 75 -->CS07502FB17
UMA_VGA_BLU_R UMA_VGA_GRN_R UMA_VGA_RED_R
UMA_CRT_CLK_DDC_R UMA_CRT_DAT_DDC_R UMA_VGAHSYNC_R CRT_TVO_IREF UMA_VGAVSYNC_R
LCD_DDCCLK_R LCD_DDCDAT_R UMA_CRT_CLK_DDC_R UMA_CRT_DAT_DDC_R UMA_VGAHSYNC_R CRT_TVO_IREF UMA_VGAVSYNC_R MCH_DREFCLK_L MCH_DREFCLK#_L DREF_SSCLK_L DREF_SSCLK#_L
CFG5
CFG9
CFG16
CFG19
CFG20
SDVO_CRTL_DATA
L_IBG
U45C
U45C
J40
L_BKLT_CTRL
H39
L_BKLT_EN
E39
L_CTRL_CLK
E40
L_CTRL_DATA
C37
L_DDC_CLK
D35
L_DDC_DATA
K40
L_VDD_EN
L41
LVDS_IBG
L43
LVDS_VBG
N41
LVDS_VREFH
N40
LVDS_VREFL
D46
LVDSA_CLK#
C45
LVDSA_CLK
D44
LVDSB_CLK#
E42
LVDSB_CLK
G51
LVDSA_DATA#_0
E51
LVDSA_DATA#_1
F49
LVDSA_DATA#_2
G50
LVDSA_DATA_0
E50
LVDSA_DATA_1
F48
LVDSA_DATA_2
G44
LVDSB_DATA#_0
B47
LVDSB_DATA#_1
B45
LVDSB_DATA#_2
E44
LVDSB_DATA_0
A47
LVDSB_DATA_1
A45
LVDSB_DATA_2
E27
TVA_DAC
G27
TVB_DAC
K27
TVC_DAC
F27
TVA_RTN
J27
TVB_RTN
L27
TVC_RTN
M35
TV_DCONSEL_0
P33
TV_DCONSEL_1
H32
CRT_BLUE
G32
CRT_BLUE#
K29
CRT_GREEN
J29
CRT_GREEN#
F29
CRT_RED
E29
CRT_RED#
K33
CRT_DDC_CLK
G35
CRT_DDC_DATA
F33
CRT_HSYNC
C32
CRT_TVO_IREF
E33
CRT_VSYNC
CRESTLINE_1p0_DU
CRESTLINE_1p0_DU
DMI X2 Select PCI Express
Graphic Lane FSB Dynamic
ODT DMI Lane
Reversal
SDVO/PCIE Concurrent Operation
SDVO Present.
6
PEG_COMPI
PEG_COMPO
PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8
LVDS
LVDS
TV VGA
TV VGA
Low=DMIx2 High=DMIx4(Default)
Low= Reveise Lane High=Normal operation
Low=Dynamic ODT Disable High=Dynamic ODT Enable(default).
Low=Normal(default). High=Lane Reversed
Low=Only SDVO or PCIEx1 is operational (defaults) High=SDVO and PCIEx1 are operating simultaneously via PEG port
Low=No SDVO Device Present (default) High=SDVO Device Present
6
PEG_RX#_9 PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15
PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8
PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15
PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9
PEG_TX#_10 PEG_TX#_11
PCI-EXPRESS GRAPHICS
PCI-EXPRESS GRAPHICS
PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15
PEG_TX_0 PEG_TX_1 PEG_TX_2 PEG_TX_3 PEG_TX_4 PEG_TX_5 PEG_TX_6 PEG_TX_7 PEG_TX_8
PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15
7
+VCC_PEG
+VCC3G_PCIE_R
N43 M43
PCIE_MRX_GTX_N0
J51
PCIE_MRX_GTX_N1_L
L51
PCIE_MRX_GTX_N2
N47
PCIE_MRX_GTX_N3
T45
PCIE_MRX_GTX_N4
T50
PCIE_MRX_GTX_N5
U40
PCIE_MRX_GTX_N6
Y44
PCIE_MRX_GTX_N7
Y40
PCIE_MRX_GTX_N8
AB51
PCIE_MRX_GTX_N9
W49
PCIE_MRX_GTX_N10
AD44
PCIE_MRX_GTX_N11
AD40
PCIE_MRX_GTX_N12
AG46
PCIE_MRX_GTX_N13
AH49
PCIE_MRX_GTX_N14
AG45
PCIE_MRX_GTX_N15
AG41
PCIE_MRX_GTX_P0
J50 L50
PCIE_MRX_GTX_P2
M47
PCIE_MRX_GTX_P3
U44
PCIE_MRX_GTX_P4
T49
PCIE_MRX_GTX_P5
T41
PCIE_MRX_GTX_P6
W45
PCIE_MRX_GTX_P7
W41
PCIE_MRX_GTX_P8
AB50
PCIE_MRX_GTX_P9
Y48
PCIE_MRX_GTX_P10
AC45
PCIE_MRX_GTX_P11
AC41
PCIE_MRX_GTX_P12
AH47
PCIE_MRX_GTX_P13
AG49
PCIE_MRX_GTX_P14
AH45
PCIE_MRX_GTX_P15
AG42
PCIE_MTX_GRX_C_N0
N45
PCIE_MTX_GRX_C_N1
U39
PCIE_MTX_GRX_C_N2
U47
PCIE_MTX_GRX_C_N3
N51
PCIE_MTX_GRX_C_N4
R50
PCIE_MTX_GRX_C_N5
T42
PCIE_MTX_GRX_C_N6
Y43
PCIE_MTX_GRX_C_N7
W46
PCIE_MTX_GRX_C_N8
W38
PCIE_MTX_GRX_C_N9
AD39
PCIE_MTX_GRX_C_N10
AC46
PCIE_MTX_GRX_C_N11
AC49
PCIE_MTX_GRX_C_N12
AC42
PCIE_MTX_GRX_C_N13
AH39
PCIE_MTX_GRX_C_N14
AE49
PCIE_MTX_GRX_C_N15
AH44
PCIE_MTX_GRX_C_P0
M45
PCIE_MTX_GRX_C_P1
T38
PCIE_MTX_GRX_C_P2
T46
PCIE_MTX_GRX_C_P3
N50
PCIE_MTX_GRX_C_P4
R51
PCIE_MTX_GRX_C_P5
U43
PCIE_MTX_GRX_C_P6
W42
PCIE_MTX_GRX_C_P7
Y47
PCIE_MTX_GRX_C_P8
Y39
PCIE_MTX_GRX_C_P9
AC38
PCIE_MTX_GRX_C_P10
AD47
PCIE_MTX_GRX_C_P11
AC50
PCIE_MTX_GRX_C_P12
AD43
PCIE_MTX_GRX_C_P13
AG39
PCIE_MTX_GRX_C_P14
AE50
PCIE_MTX_GRX_C_P15
AH43
PCIE_MTX_GRX_C_N0 PCIE_MTX_GRX_C_N1 PCIE_MTX_GRX_C_N2 PCIE_MTX_GRX_C_N3
PCIE_MTX_GRX_C_P0 PCIE_MTX_GRX_C_P1 PCIE_MTX_GRX_C_P2 PCIE_MTX_GRX_C_P3
R251 24.9/FR251 24.9/F
R238
R238
R245
R245
SDVO_CTRLCLK_L SDVO_CTRLDATA_L
PCIE_MRX_GTX_N1_L PCIE_MRX_GTX_P1_L
PCIE_MRX_GTX_N1
0_DIS
0_DIS
PCIE_MRX_GTX_P1PCIE_MRX_GTX_P1_L
0_DIS
0_DIS
R143 0_UMAR143 0_UMA R142 0_UMAR142 0_UMA
R742 0_UMAR742 0_UMA R743 0_UMAR743 0_UMA
C247 0.1U_UMAC247 0.1U_UMA C238 0.1U_UMAC238 0.1U_UMA C254 0.1U_UMAC254 0.1U_UMA C253 0.1U_UMAC253 0.1U_UMA
C240 0.1U_UMAC240 0.1U_UMA C246 0.1U_UMAC246 0.1U_UMA C261 0.1U_UMAC261 0.1U_UMA C255 0.1U_UMAC255 0.1U_UMA
DC Blocked Cap. AND POP FOR UMA
Title
Title
Title
Crestline (VGA,DMI)
Crestline (VGA,DMI)
Crestline (VGA,DMI)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
GM3 2B
GM3 2B
GM3 2B
Date: Sheet
Date: Sheet
Date: Sheet
7
PCIE_MTX_GRX_N[0..15] 18 PCIE_MTX_GRX_P[0..15] 18
PCIE_MRX_GTX_N[0..15] 18
PCIE_MRX_GTX_P[0..15] 18
C817 0.1U_DISC817 0.1U_DIS C813 0.1U_DISC813 0.1U_DIS C821 0.1U_DISC821 0.1U_DIS C819 0.1U_DISC819 0.1U_DIS C830 0.1U_DISC830 0.1U_DIS C825 0.1U_DISC825 0.1U_DIS C831 0.1U_DISC831 0.1U_DIS C833 0.1U_DISC833 0.1U_DIS C837 0.1U_DISC837 0.1U_DIS C838 0.1U_DISC838 0.1U_DIS C840 0.1U_DISC840 0.1U_DIS C841 0.1U_DISC841 0.1U_DIS C847 0.1U_DISC847 0.1U_DIS C848 0.1U_DISC848 0.1U_DIS C852 0.1U_DISC852 0.1U_DIS C851 0.1U_DISC851 0.1U_DIS
C814 0.1U_DISC814 0.1U_DIS C816 0.1U_DISC816 0.1U_DIS C824 0.1U_DISC824 0.1U_DIS C822 0.1U_DISC822 0.1U_DIS C826 0.1U_DISC826 0.1U_DIS C827 0.1U_DISC827 0.1U_DIS C832 0.1U_DISC832 0.1U_DIS C836 0.1U_DISC836 0.1U_DIS C835 0.1U_DISC835 0.1U_DIS C839 0.1U_DISC839 0.1U_DIS C842 0.1U_DISC842 0.1U_DIS C843 0.1U_DISC843 0.1U_DIS C844 0.1U_DISC844 0.1U_DIS C846 0.1U_DISC846 0.1U_DIS C850 0.1U_DISC850 0.1U_DIS C849 0.1U_DISC849 0.1U_DIS
POP FOR DIS
SDVO_CTRLCLK 25 SDVO_CTRLDATA 25
SDVOB_RED- 25 SDVOB_GREEN- 25 SDVOB_BLUE- 25 SDVOB_CLK- 25
SDVOB_RED+ 25 SDVOB_GREEN+ 25 SDVOB_BLUE+ 25 SDVOB_CLK+ 25
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
8
PCIE_MTX_GRX_N0 PCIE_MTX_GRX_N1 PCIE_MTX_GRX_N2 PCIE_MTX_GRX_N3 PCIE_MTX_GRX_N4 PCIE_MTX_GRX_N5 PCIE_MTX_GRX_N6 PCIE_MTX_GRX_N7 PCIE_MTX_GRX_N8 PCIE_MTX_GRX_N9 PCIE_MTX_GRX_N10 PCIE_MTX_GRX_N11 PCIE_MTX_GRX_N12 PCIE_MTX_GRX_N13 PCIE_MTX_GRX_N14 PCIE_MTX_GRX_N15
PCIE_MTX_GRX_P0 PCIE_MTX_GRX_P1 PCIE_MTX_GRX_P2 PCIE_MTX_GRX_P3 PCIE_MTX_GRX_P4 PCIE_MTX_GRX_P5 PCIE_MTX_GRX_P6 PCIE_MTX_GRX_P7 PCIE_MTX_GRX_P8 PCIE_MTX_GRX_P9 PCIE_MTX_GRX_P10 PCIE_MTX_GRX_P11 PCIE_MTX_GRX_P12 PCIE_MTX_GRX_P13 PCIE_MTX_GRX_P14 PCIE_MTX_GRX_P15
SDVOB_INT- 25 SDVOB_INT+ 25
662Monday, March 24, 2008
662Monday, March 24, 2008
662Monday, March 24, 2008
8
of
of
of
1
DDR_A_D[0..63]15
A A
B B
C C
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
U45D
U45D
AR43
SA_DQ_0
AW44
SA_DQ_1
BA45
SA_DQ_2
AY46
SA_DQ_3
AR41
SA_DQ_4
AR45
SA_DQ_5
AT42
SA_DQ_6
AW47
SA_DQ_7
BB45
SA_DQ_8
BF48
SA_DQ_9
BG47
SA_DQ_10
BJ45
SA_DQ_11
BB47
SA_DQ_12
BG50
SA_DQ_13
BH49
SA_DQ_14
BE45
SA_DQ_15
AW43
SA_DQ_16
BE44
SA_DQ_17
BG42
SA_DQ_18
BE40
SA_DQ_19
BF44
SA_DQ_20
BH45
SA_DQ_21
BG40
SA_DQ_22
BF40
SA_DQ_23
AR40
SA_DQ_24
AW40
SA_DQ_25
AT39
SA_DQ_26
AW36
SA_DQ_27
AW41
SA_DQ_28
AY41
SA_DQ_29
AV38
SA_DQ_30
AT38
SA_DQ_31
AV13
SA_DQ_32
AT13
SA_DQ_33
AW11
SA_DQ_34
AV11
SA_DQ_35
AU15
SA_DQ_36
AT11
SA_DQ_37
BA13
SA_DQ_38
BA11
SA_DQ_39
BE10
SA_DQ_40
BD10
SA_DQ_41
BD8
SA_DQ_42
AY9
SA_DQ_43
BG10
SA_DQ_44
AW9
SA_DQ_45
BD7
SA_DQ_46
BB9
SA_DQ_47
BB5
SA_DQ_48
AY7
SA_DQ_49
AT5
SA_DQ_50
AT7
SA_DQ_51
AY6
SA_DQ_52
BB7
SA_DQ_53
AR5
SA_DQ_54
AR8
SA_DQ_55
AR9
SA_DQ_56
AN3
SA_DQ_57
AM8
SA_DQ_58
AN10
SA_DQ_59
AT9
SA_DQ_60
AN9
SA_DQ_61
AM9
SA_DQ_62
AN11
SA_DQ_63
CRESTLINE_1p0_DU
CRESTLINE_1p0_DU
2
SA_RCVEN#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_BS_0 SA_BS_1 SA_BS_2
SA_CAS#
SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7
SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6
SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7
SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8
SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13
SA_RAS#
SA_WE#
3
DDR_A_D63 DDR_A_D34
BB19 BK19 BF29
BL17 AT45
BD44 BD42 AW38 AW13 BG8 AY5 AN6
AT46 BE48 BB43 BC37 BB16 BH6 BB2 AP3 AT47 BD47 BC41 BA37 BA16 BH7 BC1 AP2
BJ19 BD20 BK27 BH28 BL24 BK28 BJ27 BJ25 BL28 BA28 BC19 BE28 BG30 BJ16
BE18 AY20
BA19
DDR_A_D4 DDR_A_DQS#0 DDR_A_DQS0 DDR_A_MA13 DDR_A_MA1 DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#
DDR_A_BS0 DDR_A_BS1 DDR_A_BS2
DDR_A_CAS# DDR_A_DM0
DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7
DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7 DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13
DDR_A_RAS#
DDR_A_WE#
T29 PADT29 PAD
T206PAD T206PAD T208PAD T208PAD T202PAD T202PAD
T203PAD T203PAD T188PAD T188PAD T190PAD T190PAD T192PAD T192PAD
4
T201 PADT201 PAD T200 PADT200 PAD
T195 PADT195 PAD T196 PADT196 PAD
DDR_A_BS0 15,16 DDR_A_BS1 15,16 DDR_A_BS2 15,16
DDR_A_CAS# 15,16 DDR_A_DM[0..7] 15
DDR_A_DQS[0..7] 15
DDR_A_DQS#[0..7] 15
DDR_A_MA[0..13] 15,16
DDR_A_RAS# 15,16
DDR_A_WE# 15,16
5
DDR_B_D[0..63]15
DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63
U45E
U45E
AP49
SB_DQ_0
AR51
SB_DQ_1
AW50
SB_DQ_2
AW51
SB_DQ_3
AN51
SB_DQ_4
AN50
SB_DQ_5
AV50
SB_DQ_6
AV49
SB_DQ_7
BA50
SB_DQ_8
BB50
SB_DQ_9
BA49
SB_DQ_10
BE50
SB_DQ_11
BA51
SB_DQ_12
AY49
SB_DQ_13
BF50
SB_DQ_14
BF49
SB_DQ_15
BJ50
SB_DQ_16
BJ44
SB_DQ_17
BJ43
SB_DQ_18
BL43
SB_DQ_19
BK47
SB_DQ_20
BK49
SB_DQ_21
BK43
SB_DQ_22
BK42
SB_DQ_23
BJ41
SB_DQ_24
BL41
SB_DQ_25
BJ37
SB_DQ_26
BJ36
SB_DQ_27
BK41
SB_DQ_28
BJ40
SB_DQ_29
BL35
SB_DQ_30
BK37
SB_DQ_31
BK13
SB_DQ_32
BE11
SB_DQ_33
BK11
SB_DQ_34
BC11
SB_DQ_35
BC13
SB_DQ_36
BE12
SB_DQ_37
BC12
SB_DQ_38
BG12
SB_DQ_39
BJ10
SB_DQ_40
BL9
SB_DQ_41
BK5
SB_DQ_42
BL5
SB_DQ_43
BK9
SB_DQ_44
BK10
SB_DQ_45
BJ8
SB_DQ_46
BJ6
SB_DQ_47
BF4
SB_DQ_48
BH5
SB_DQ_49
BG1
SB_DQ_50
BC2
SB_DQ_51
BK3
SB_DQ_52
BE4
SB_DQ_53
BD3
SB_DQ_54
BJ2
SB_DQ_55
BA3
SB_DQ_56
BB3
SB_DQ_57
AR1
SB_DQ_58
AT3
SB_DQ_59
AY2
SB_DQ_60
AY3
SB_DQ_61
AU2
SB_DQ_62
AT2
SB_DQ_63
CRESTLINE_1p0_DU
CRESTLINE_1p0_DU
6
SB_BS_0 SB_BS_1
SB_BS_2 SB_CAS# SB_DM_0
SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7
SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6
SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7
SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8
SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13
SB_RAS#
SB_RCVEN#
SB_WE#
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
AY17 BG18 BG36
BE17 AR50
BD49 BK45 BL39 BH12 BJ7 BF3 AW2
AT50 BD50 BK46 BK39 BJ12 BL7 BE2 AV2 AU50 BC50 BL45 BK38 BK12 BK7 BF2 AV3
BC18 BG28 BG25 AW17 BF25 BE25 BA29 BC28 AY28 BD37 BG17 BE37 BA39 BG13
AV16 AY18
BC17
7
DDR_B_BS0 DDR_B_BS1 DDR_B_BS2
DDR_B_CAS# DDR_B_DM0
DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7
DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7 DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7
DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13
DDR_B_RAS#
DDR_B_WE#
T28 PADT28 PAD
DDR_B_BS0 15,16 DDR_B_BS1 15,16 DDR_B_BS2 15,16
DDR_B_CAS# 15,16 DDR_B_DM[0..7] 15
DDR_B_DQS[0..7] 15
DDR_B_DQS#[0..7] 15
DDR_B_MA[0..13] 15,16
DDR_B_RAS# 15,16
DDR_B_WE# 15,16
8
D D
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet
Crestline (DDR2)
Crestline (DDR2)
Crestline (DDR2)
GM3 2B
GM3 2B
GM3 2B
7
of
of
of
762Monday, March 24, 2008
762Monday, March 24, 2008
762Monday, March 24, 2008
8
5
+1.05V_VCCP
D D
+1.8V_SUS
C C
B B
+1.05V_VCCP
R185
R185 0_0805_UMA
0_0805_UMA
1 2
A A
R182
(3)
R182 0_0805_DIS
0_0805_DIS
1 2
U45G
U45G
AT35
VCC_1
AT34
VCC_2
AH28
VCC_3
AC32
VCC_5
AC31
VCC_4
AK32
VCC_6
AJ31
VCC_7
AJ28
VCC_8
AH32
VCC_9
AH31
VCC_10
AH29
VCC_11
AF32
VCC_12
R30
VCC_13
AU32
VCC_SM_1
AU33
VCC_SM_2
AU35
VCC_SM_3
AV33
VCC_SM_4
AW33
VCC_SM_5
AW35
VCC_SM_6
AY35
VCC_SM_7
BA32
VCC_SM_8
BA33
VCC_SM_9
BA35
VCC_SM_10
BB33
VCC_SM_11
BC32
VCC_SM_12
BC33
VCC_SM_13
BC35
VCC_SM_14
BD32
VCC_SM_15
BD35
VCC_SM_16
BE32
VCC_SM_17
BE33
VCC_SM_18
BE35
VCC_SM_19
BF33
VCC_SM_20
BF34
VCC_SM_21
BG32
VCC_SM_22
BG33
VCC_SM_23
BG35
VCC_SM_24
BH32
VCC_SM_25
BH34
VCC_SM_26
BH35
VCC_SM_27
BJ32
VCC_SM_28
BJ33
VCC_SM_29
BJ34
VCC_SM_30
BK32
VCC_SM_31
BK33
VCC_SM_32
BK34
VCC_SM_33
BK35
VCC_SM_34
BL33
VCC_SM_35
AU30
VCC_SM_36
R20
VCC_AXG_1
T14
VCC_AXG_2
W13
VCC_AXG_3
W14
VCC_AXG_4
Y12
VCC_AXG_5
AA20
VCC_AXG_6
AA23
VCC_AXG_7
AA26
VCC_AXG_8
AA28
VCC_AXG_9
AB21
VCC_AXG_10
AB24
VCC_AXG_11
AB29
VCC_AXG_12
AC20
VCC_AXG_13
AC21
VCC_AXG_14
AC23
VCC_AXG_15
AC24
VCC_AXG_16
AC26
VCC_AXG_17
AC28
VCC_AXG_18
AC29
VCC_AXG_19
AD20
VCC_AXG_20
AD23
VCC_AXG_21
AD24
VCC_AXG_22
AD28
VCC_AXG_23
AF21
VCC_AXG_24
AF26
VCC_AXG_25
AA31
VCC_AXG_26
AH20
VCC_AXG_27
AH21
VCC_AXG_28
AH23
VCC_AXG_29
AH24
VCC_AXG_30
AH26
VCC_AXG_31
AD31
VCC_AXG_32
AJ20
VCC_AXG_33
AN14
VCC_AXG_34
CRESTLINE_1p0_DU
CRESTLINE_1p0_DU
5
VCC CORE
VCC CORE
POWER
POWER
VCC SMVCC GFX
VCC SMVCC GFX
VCC_AXG_NCTF_1 VCC_AXG_NCTF_2 VCC_AXG_NCTF_3 VCC_AXG_NCTF_4 VCC_AXG_NCTF_5 VCC_AXG_NCTF_6 VCC_AXG_NCTF_7 VCC_AXG_NCTF_8
VCC_AXG_NCTF_9 VCC_AXG_NCTF_10 VCC_AXG_NCTF_11 VCC_AXG_NCTF_12 VCC_AXG_NCTF_13 VCC_AXG_NCTF_14 VCC_AXG_NCTF_15 VCC_AXG_NCTF_16 VCC_AXG_NCTF_17 VCC_AXG_NCTF_18 VCC_AXG_NCTF_19 VCC_AXG_NCTF_20 VCC_AXG_NCTF_21 VCC_AXG_NCTF_22 VCC_AXG_NCTF_23 VCC_AXG_NCTF_24 VCC_AXG_NCTF_25 VCC_AXG_NCTF_26 VCC_AXG_NCTF_27 VCC_AXG_NCTF_28 VCC_AXG_NCTF_29 VCC_AXG_NCTF_30 VCC_AXG_NCTF_31 VCC_AXG_NCTF_32 VCC_AXG_NCTF_33 VCC_AXG_NCTF_34 VCC_AXG_NCTF_35 VCC_AXG_NCTF_36 VCC_AXG_NCTF_37 VCC_AXG_NCTF_38 VCC_AXG_NCTF_39 VCC_AXG_NCTF_40 VCC_AXG_NCTF_41 VCC_AXG_NCTF_42 VCC_AXG_NCTF_43 VCC_AXG_NCTF_44 VCC_AXG_NCTF_45 VCC_AXG_NCTF_46 VCC_AXG_NCTF_47 VCC_AXG_NCTF_48 VCC_AXG_NCTF_49 VCC_AXG_NCTF_50 VCC_AXG_NCTF_51 VCC_AXG_NCTF_52 VCC_AXG_NCTF_53 VCC_AXG_NCTF_54 VCC_AXG_NCTF_55
VCC GFX NCTF
VCC GFX NCTF
VCC_AXG_NCTF_56 VCC_AXG_NCTF_57 VCC_AXG_NCTF_58 VCC_AXG_NCTF_59 VCC_AXG_NCTF_60 VCC_AXG_NCTF_61 VCC_AXG_NCTF_62 VCC_AXG_NCTF_63 VCC_AXG_NCTF_64 VCC_AXG_NCTF_65 VCC_AXG_NCTF_66 VCC_AXG_NCTF_67 VCC_AXG_NCTF_68 VCC_AXG_NCTF_69 VCC_AXG_NCTF_70 VCC_AXG_NCTF_71 VCC_AXG_NCTF_72 VCC_AXG_NCTF_73 VCC_AXG_NCTF_74 VCC_AXG_NCTF_75 VCC_AXG_NCTF_76 VCC_AXG_NCTF_77 VCC_AXG_NCTF_78 VCC_AXG_NCTF_79 VCC_AXG_NCTF_80 VCC_AXG_NCTF_81 VCC_AXG_NCTF_82 VCC_AXG_NCTF_83
VCC_SM_LF1 VCC_SM_LF2 VCC_SM_LF3 VCC_SM_LF4 VCC_SM_LF5 VCC_SM_LF6 VCC_SM_LF7
VCC SM LF
VCC SM LF
T17 T18 T19 T21 T22 T23 T25 U15 U16 U17 U19 U20 U21 U23 U26 V16 V17 V19 V20 V21 V23 V24 Y15 Y16 Y17 Y19 Y20 Y21 Y23 Y24 Y26 Y28 Y29 AA16 AA17 AB16 AB19 AC16 AC17 AC19 AD15 AD16 AD17 AF16 AF19 AH15 AH16 AH17 AH19 AJ16 AJ17 AJ19 AK16 AK19 AL16 AL17 AL19 AL20 AL21 AL23 AM15 AM16 AM19 AM20 AM21 AM23 AP15 AP16 AP17 AP19 AP20 AP21 AP23 AP24 AR20 AR21 AR23 AR24 AR26 V26 V28 V29 Y31
AW45 BC39 BE39 BD17 BD4 AW8 AT6
4
UMA POP POWER JUMP AND C234 &C233
UMA POP POWER JUMP AND ALL CAP
1 2
VCCSM_LF1 VCCSM_LF2 VCCSM_LF3 VCCSM_LF4 VCCSM_LF5 VCCSM_LF6 VCCSM_LF7
4
1 2
R63 0_0805_UMAR63 0_0805_UMA
1 2
R64 0_0805_UMAR64 0_0805_UMA
R171
C355
C355
0.1U/10V
0.1U/10V
1 2
R171 0_0805_DIS
0_0805_DIS
R65
R65 0_0805_DIS
0_0805_DIS
12
+1.05V_VCCP
Layout Note: 370 mils from edge.
Layout Note: 370 mils from edge.
+
+
C263
C263 220U_UMA
220U_UMA
2.5 7343
2.5 7343
(3)
Layout Note: Inside GMCH cavity for VCC_AXM.
C297
C297
0.1U_UMA
0.1U_UMA
(3)
12
12
C362
C362
C371
C371
0.1U/10V
0.1U/10V
0.22U/10V
0.22U/10V
12
C367
C367
0.22U/10V
0.22U/10V
3
+
+
C829
C829 220U
220U
+
+
C820
C820 220U_UMA
220U_UMA
2.5 7343
2.5 7343
C308
C308
0.1U_UMA
0.1U_UMA
3
12
C314
C314
0.47U_UMA
0.47U_UMA
603 10
603 10
+1.05V_VCCP
Non-iAMT
12
C372
C372
0.47U/10V
0.47U/10V
+3.3V_RUN
R170 10R170 10
1 2
Layout Note: Inside GMCH cavity.
12
C307
C307 22U/4V
22U/4V
C294
C294
0.22U/10V
0.22U/10V
+
+
C834
C834 220U_NC
220U_NC
2.5 7343
2.5 7343
12
C365
C365 1U/10V
1U/10V
+
+
C279
C279 220U_NC
220U_NC
2.5 7343
2.5 7343
C291
C330
C330 1U_UMA
1U_UMA
603 10
603 10
Layout Note: Place close to GMCH edge.
C291 10U_UMA
10U_UMA
Layout Note: Inside GMCH cavity.
12
C337
C337
0.1U/10V
0.1U/10V
12
C345
C345 22U/4V
22U/4V
12
C363
C363 1U/10V
1U/10V
+VCC_GMCH_L
12
C300
C300
0.22U/10V
0.22U/10V
+1.05V_VCCP
+1.05V_VCCP
C857
C857 22U_UMA
22U_UMA
805 4
805 4
6.3805
6.3805
12
C331
C331
0.1U/10V
0.1U/10V
12
C318
C318
0.22U/10V
0.22U/10V
2
D6
D6
21
SDMK0340L-7-F
SDMK0340L-7-F
12
C333
C333
0.1U/10V
0.1U/10V
12
C320
C320
0.1U/10V
0.1U/10V
12
C339
C339
0.22U/10V
0.22U/10V
+1.8V_SUS
12
C430
C430
0.1U/10V
0.1U/10V
Layout Note: Place C233 where LVDS and DDR2 taps.
2
1
U45F
U45F
AB33
VCC_NCTF_1
AB36
VCC_NCTF_2
AB37
VCC_NCTF_3
AC33
VCC_NCTF_4
AC35
VCC_NCTF_5
AC36
VCC_NCTF_6
AD35
VCC_NCTF_7
AD36
VCC_NCTF_8
AF33
VCC_NCTF_9
AF36
VCC_NCTF_10
AH33
VCC_NCTF_11
AH35
VCC_NCTF_12
AH36
VCC_NCTF_13
AH37
VCC_NCTF_14
AJ33
VCC_NCTF_15
AJ35
VCC_NCTF_16
AK33
VCC_NCTF_17
AK35
VCC_NCTF_18
AK36
VCC_NCTF_19
AK37
VCC_NCTF_20
AD33
VCC_NCTF_21
AJ36
VCC_NCTF_22
AM35
VCC_NCTF_23
AL33
VCC_NCTF_24
AL35
VCC_NCTF_25
AA33
VCC_NCTF_26
AA35
VCC_NCTF_27
AA36
VCC_NCTF_28
AP35
VCC_NCTF_29
AP36
VCC_NCTF_30
AR35
VCC_NCTF_31
AR36
VCC_NCTF_32
Y32
VCC_NCTF_33
Y33
VCC_NCTF_34
Y35
VCC_NCTF_35
Y36
VCC_NCTF_36
Y37
VCC_NCTF_37
T30
VCC_NCTF_38
T34
VCC_NCTF_39
T35
VCC_NCTF_40
U29
VCC_NCTF_41
U31
VCC_NCTF_42
U32
VCC_NCTF_43
U33
VCC_NCTF_44
U35
VCC_NCTF_45
U36
VCC_NCTF_46
V32
VCC_NCTF_47
V33
VCC_NCTF_48
V36
VCC_NCTF_49
V37
VCC_NCTF_50
AL24
VCC_AXM_NCTF_1
AL26
VCC_AXM_NCTF_2
AL28
VCC_AXM_NCTF_3
AM26
VCC_AXM_NCTF_4
AM28
VCC_AXM_NCTF_5
AM29
VCC_AXM_NCTF_6
AM31
VCC_AXM_NCTF_7
AM32
VCC_AXM_NCTF_8
AM33
VCC_AXM_NCTF_9
AP29
VCC_AXM_NCTF_10
AP31
VCC_AXM_NCTF_11
AP32
VCC_AXM_NCTF_12
AP33
VCC_AXM_NCTF_13
AL29
VCC_AXM_NCTF_14
AL31
VCC_AXM_NCTF_15
AL32
VCC_AXM_NCTF_16
AR31
VCC_AXM_NCTF_17
AR32
VCC_AXM_NCTF_18
AR33
VCC_AXM_NCTF_19
CRESTLINE_1p0_DU
CRESTLINE_1p0_DU
VSS NCTF
VSS NCTF
VCC NCTF
VCC NCTF
POWER
POWER
VCC AXM NCTF
VCC AXM NCTF
VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8
VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21
VSS SCBVCC AXM
VSS SCBVCC AXM
VCC_AXM_1 VCC_AXM_2 VCC_AXM_3 VCC_AXM_4 VCC_AXM_5 VCC_AXM_6 VCC_AXM_7
VSS_SCB1 VSS_SCB2 VSS_SCB3 VSS_SCB4 VSS_SCB5 VSS_SCB6
T27 T37 U24 U28 V31 V35 AA19 AB17 AB35 AD19 AD37 AF17 AF35 AK17 AM17 AM24 AP26 AP28 AR15 AR19 AR28
A3 B2 C1 BL1 BL51 A51
AT33 AT31 AK29 AK24 AK23 AJ26 AJ23
VCC_SM
12
+
+
C438
C438 330U/2.5V
330U/2.5V
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
12
12
C415
C415
C422
C422
22U/4V
22U/4V
22U/4V
22U/4V
Layout Note: Place on the edge.
QUANTA
QUANTA
QUANTA COMPUTER
Crestline (VCC,NCTF)
Crestline (VCC,NCTF)
Crestline (VCC,NCTF)
GM3 2B
GM3 2B
GM3 2B
862Monday, March 24, 2008
862Monday, March 24, 2008
862Monday, March 24, 2008
1
+1.05V_VCCP
of
of
of
5
FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC
+3.3V_RUN
UMA POP ALL BESIDES C462
D D
Non-iAMT
+1.25V_RUN
L30
L30 BLM18AG121SN1D
BLM18AG121SN1D
603
603
1 2
0.5/F 603
0.5/F 603
+VCCA_MPLL_L
12
C858
C858 22U
22U
1206 10V
1206 10V
BLM18PG181SN1D_UMA
BLM18PG181SN1D_UMA
L19
L19
603
603
45mA MAx.
FB_120ohm+-25%_100mHz _200mA_0.2ohm DC
+VCCA_HPLL
12
12
C856
C856 22U/10V
22U/10V
1206
1206
L33
L33 BLM18AG121SN1D
BLM18AG121SN1D
603
603
+VCCA_MPLL
12
10V
10V
R294
R294
R204 0_0402_UMAR204 0_0402_UMA
C249
C249
0.1U_UMA
0.1U_UMA
10
10
40mA MAx.
+1.25V_RUN
10uH+-20%_100mA
12
C342
C342
0.1U/10V
0.1U/10V
10V
10V
12
C352
C352
0.1U
0.1U
10V
10V
0.1Caps should be placed 200 mils with in its pins.
+1.25V_RUN
Non-iAMT
R232 0_DISR232 0_DIS R736 0_DISR736 0_DIS
C C
R711 0_DISR711 0_DIS R169 0_DISR169 0_DIS R206 0_DISR206 0_DIS R186 0_DISR186 0_DIS R210 0_DISR210 0_DIS R731 0_DISR731 0_DIS R172 0_DISR172 0_DIS R211 0_DISR211 0_DIS R224 0_DISR224 0_DIS R725 0_DISR725 0_DIS
+VCCD_LVDS_R
+VCCQ_TVDAC_RR
+VCCD_CRT_R +VCC_TVDACC_RR +VCC_TVDACB_RR +VCC_TVDACA_RR +VCC_TVDACA_RR +VCC_TX_LVDS_L +VCCA_DPLLA +VCCA_DPLLB +VCCA_DAC_BG +VCCA_CRT_DAC +VCCSYNC
1
123
C239
C239 22nF/3P_NC
22nF/3P_NC
L13
L13 10uH/100MA_UMA
10uH/100MA_UMA
805
805
L15
L15 10uH/100MA_UMA
10uH/100MA_UMA
12
C435
C435
+
+
100U
100U
7343
7343 2V
2V
+VCCA_CRT_DAC+VCCA_CRTDAC
UMA POP ALL
+VCCA_DPLLA
+
+
C188
C188 470U/ESR9_UMA
470U/ESR9_UMA
7343
7343
2.5V
2.5V
+VCCA_DPLLB
+
+
C243
C243 470U/ESR9_UMA
470U/ESR9_UMA
7343
7343
2.5V
2.5V
1
1 2
DIS POP ALL
+1.25V_RUN
FB_220ohm+-25%_100MHz _2A_0.1ohm DC
layout note: close to pin A41
B B
C801
C801 1000P_UMA
1000P_UMA
50
50
BLM21PG221SN1D
BLM21PG221SN1D
805
805
+VCC_TX_LVDS_L
L38
L38
1 2
+VCCA_PEG_PLL
12
R299
R299 1/F
1/F
603
603
12
C361
C361 10U
10U
603
603
6.3
6.3
12
C295
C295
0.1U
0.1U
10V
10V
+1.8V_SUS
4
+3.3V_RUN
UMA POP ALL
0_UMA
0_UMA R722
R722
1 2
+VCCA_CRT_DAC
0.1U_UMA 10V
0.1U_UMA 10V C802
C802
C191
C191
+3.3V_RUN
0.1U_UMA
0.1U_UMA
10
10
12
C274
C274
0.1U
R704 0_UMAR704 0_UMA
1 2
+VCCD_LVDS
C190
C190 1U_UMA
1U_UMA
603
603 10
10
12
C429
C429 22U
22U
805
805 10
10
0.1U
10V
10V
12
+1.25V_RUN
+1.25V_RUN
+VCC_TVDACB_RR +VCC_TVDACC_RR
C341
C341
0.1U
0.1U
10V
10V
C189
C189 10U_NC
10U_NC
603
603
6.3
6.3
C236
C236
0.1U_UMA
0.1U_UMA
10
10
12
C346
C346
C418
C418
4.7U
4.7U
22U
22U
805
805
805
805
6.3
6.3
10
10
(1)
+VCCD_CRT_R
+1.25V_RUN
Non-iAMT
UMA POP C493 & RESISTOR
R841
R841
12
0_UMA
0_UMA
Non-iAMT
+VCCSYNC
+VCCA_DAC_BG
+VCCA_DPLLA
+VCCA_DPLLB +VCCA_HPLL +VCCA_MPLL
+VCC_TX_LVDS_L
+VCCA_PEG_PLL
12
C347
C347 1U
1U
603
603 10
10
+VCCD_CRT_R
+VCCD_TVDAC_RR +VCCQ_TVDAC_RR
+VCCA_PEG_PLL
12
C293
C293
0.1U
0.1U
10V
10V
0_UMA
0_UMA R140
R140
1 2
+VCCD_LVDS_R
AW18
AV19 AU19 AU18 AU17
AT22 AT21 AT19 AT18 AT17 AR17 AR16
BC29 BB29
12
J32
A33 B33
A30 B32
B49 H49 AL2
AM2
A41 B41
K50 K49
U51
C25 B25 C27 B27 B28 A28
M32 L29
N28 AN2 U48
J41
H42
C427
C427 22U
22U
805
805 10
10
U45H
U45H
VCCSYNC VCCA_CRT_DAC_1
VCCA_CRT_DAC_2
VCCA_DAC_BG VSSA_DAC_BG
VCCA_DPLLA VCCA_DPLLB VCCA_HPLL VCCA_MPLL
VCCA_LVDS VSSA_LVDS
VCCA_PEG_BG VSSA_PEG_BG
VCCA_PEG_PLL
VCCA_SM_1 VCCA_SM_2 VCCA_SM_3 VCCA_SM_4 VCCA_SM_5
VCCA_SM_7 VCCA_SM_8 VCCA_SM_9 VCCA_SM_10 VCCA_SM_11 VCCA_SM_NCTF_1 VCCA_SM_NCTF_2
VCCA_SM_CK_1 VCCA_SM_CK_2
VCCA_TVA_DAC_1 VCCA_TVA_DAC_2 VCCA_TVB_DAC_1 VCCA_TVB_DAC_2 VCCA_TVC_DAC_1 VCCA_TVC_DAC_2
VCCD_CRT VCCD_TVDAC
VCCD_QDAC VCCD_HPLL VCCD_PEG_PLL VCCD_LVDS_1
VCCD_LVDS_2
+VTTLF1 +VTTLF2 +VTTLF3
12
C423
C423 1U
1U
603
603 10
10
3
CRTPLLA PEGA SMTV
CRTPLLA PEGA SMTV
POWER
POWER
A CK A LVDS
A CK A LVDS
D TV/CRTLVDS
D TV/CRTLVDS
12
C316
C316
0.47U/10V
0.47U/10V
12
C366
C366 1U
1U
603
603 10
10
12
C267
C267
0.47U/10V
0.47U/10V
AXD
AXD
DMI
DMI
VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8
VTT_9 VTT_10 VTT_11 VTT_12 VTT_13 VTT_14
VTT
VTT
VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22
VCC_AXD_1 VCC_AXD_2 VCC_AXD_3 VCC_AXD_4 VCC_AXD_5 VCC_AXD_6
VCC_AXD_NCTF
VCC_AXF_1 VCC_AXF_2 VCC_AXF_3
AXF
AXF
VCC_DMI
VCC_SM_CK_1 VCC_SM_CK_2 VCC_SM_CK_3 VCC_SM_CK_4
SM CK
SM CK
VCC_TX_LVDS
VCC_HV_1 VCC_HV_2
HV
HV
VCC_PEG_1 VCC_PEG_2 VCC_PEG_3 VCC_PEG_4 VCC_PEG_5
PEG
PEG
VCC_RXR_DMI_1 VCC_RXR_DMI_2
VTTLF1 VTTLF2 VTTLF3
VTTLF
VTTLF
CRESTLINE_1p0_DU
CRESTLINE_1p0_DU
12
C804
C804
0.47U/10V
0.47U/10V
12
C394
C394
0.1U
0.1U
10V
10V
U13 U12 U11 U9 U8 U7 U5 U3 U2 U1 T13 T11 T10 T9 T7 T6 T5 T3 T2 R3 R2 R1
AT23 AU28 AU24 AT29 AT25 AT30
AR29
B23 B21 A21
AJ50
BK24 BK23 BJ24 BJ23
A43
C40 B40
AD51 W50 W51 V49 V50
AH50 AH51
A7 F2 AH1
+VCC_SM_CK
+3.3V_RUN
+VCC_RXR_DMI
+VTTLF1 +VTTLF2 +VTTLF3
+1.05V_VCCP
12
12
C292
C292
2.2U/6.3V
2.2U/6.3V
C281
C281
4.7U/6.3V
4.7U/6.3V
Place on the edge.
12
12
Place on the edge.
+VCC_AXD_L
12
+VCC_TX_LVDS_L
12
C259
C259
0.1U/10V
0.1U/10V
10V
10V
C296
C296
0.47U/6.3V
0.47U/6.3V
C360
C360 1U/10V
1U/10V
+1.25V_RUN
C290
C290
4.7U
4.7U
603
603
6.3
6.3
1 2
12
C442
C442 22U/10V
22U/10V
Place caps close to VCC_AXD.
12
C328
C328
0.1U
0.1U
10V
10V
+VCC_PEG
12
+
+
C353
C353 220U/4V
220U/4V
2V
2V
12
+
+
C354
C354 220U/4V
220U/4V
+VCC_SM_CK
12
C405
C405 22U/10V
22U/10V
2
+1.05V_VCCP
12
+
+
C299
C299 220U/4V
220U/4V
7343
7343
2
2
L52 0L52 0
Reserved L pad for inductor.
+1.25V_RUN
0_UMA
0_UMA
R730
R730
1 2
12
C289
C289 10U/6.3V
10U/6.3V
91uH+-20%_1.5A
6.3
6.3 12
C853
C853 10U/6.3V
10U/6.3V
L49
L49 1uH/300mA
1uH/300mA
12
1uH+-20%_300mA
R314
R314
12
1/F/0603
1/F/0603
C376
C376
+VCC_SM_CK_L
0.1U/10V
0.1U/10V
12
C374
C374 10U/6.3V
10U/6.3V
+1.05V_VCCP
Non­iAMT
+1.25V_RUN
VCC_HV
D8
D8 SDMK0340L-7-F_NC
SDMK0340L-7-F_NC
21
+VCC_HV_L
12
+3.3V_RUN
+1.25V_RUN
R184
R184 10_NC
10_NC
1
12
12
1uH+-20%_300mA
+VCC_TX_LVDS +VCC_TX_LVDS_R
12
C803
C803 1000P_UMA
1000P_UMA
50
50
12
L76
L76 1uH/300MA_UMA
1uH/300MA_UMA
805
805
+
+
C818
C818 220U_UMA
220U_UMA
7343
7343
2.5
2.5
L39
L39 91nH/1.5A
91nH/1.5A
L40
L40 91nH/1.5A
91nH/1.5A
91uH+-20%_1.5A
12
C252
C252
C251
C251
10U/6.3V
10U/6.3V
1U/10V
1U/10V
Place caps close to B23, B21, A21
Place 0 ohm close to +1.8V_SUS
UMA POP ALL
+1.05V_VCCP
+1.05V_VCCP
12
+1.8V_SUS
R842
R842 0_UMA
0_UMA
1
+1.8V_SUS
12
layout shound close to BB29 & BC29
FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC
+3.3V_RUN
22nF & 0.1uF for VCC_TVDACA:C_R should be placed with in 250 mils from Crestline.
+VCCA_DAC_BG +VCC_TVBG
R710 0_UMAR710 0_UMA
A A
+1.5V_RUN
D28
D28
2 1
SDMK0340L-7-F_NC
SDMK0340L-7-F_NC
TV DAC Voltage Follower Circuit -700 mV.
UMA POP ALL BESIDES C466, C467, C463, C454, R441 & D33
L16
L16
BLM18PG181SN1D_UMA
BLM18PG181SN1D_UMA
603
603
R729
R729
0.03/F_UMA
123
C794
C794 22nF/3P_NC
22nF/3P_NC
+VCC_TVDAC_L
5
0.03/F_UMA
2010
2010
C796
C796
0.1U_UMA
0.1U_UMA
10
10
+3.3V_RUN
R697 10_NCR697 10_NC
+VCC_TVDAC +VCC_TVDACA_RR
R223 0_0402_UMAR223 0_0402_UMA
C256
C241
C241 10U_UMA
10U_UMA
805
805
6.3
6.3
C256
0.1U_UMA
0.1U_UMA
10
10
R712 0_UMAR712 0_UMA
C795
C795
0.1U_UMA
0.1U_UMA
10
10
R191 0_UMAR191 0_UMA
C250
C250
0.1U_UMA
0.1U_UMA
10
10
123
C258
C258 22nF/3P_NC
22nF/3P_NC
123
C793
C793 22nF/3P_NC
22nF/3P_NC
123
C237
C237 22nF/3P_NC
22nF/3P_NC
+VCC_TVDACB_RR
+VCC_TVDACC_RR
4
+1.5V_RUN
+1.5V_RUN
UMA POP ALL BESIDES C498 & C 506
L77
L77 BLM18PG181SN1D_UMA
BLM18PG181SN1D_UMA
FB_180ohm+-25%_
<Size>
<Size>
100mHz_1500mA_
<Voltage>
<Voltage>
0.09ohm DC
12
C779
C779 10U_DIS
10U_DIS
603
603
6.3
6.3
12
C792
C792
0.1U_DIS
0.1U_DIS
10V
10V
C790
C790
0.1U_UMA
0.1U_UMA
10
10
+VCCQ_TVDAC
C806
C806
0.1U/10V/0402_UMA
0.1U/10V/0402_UMA
0_DIS
0_DIS R162
R162
1 2
12
C780
C780
0.022U_DIS
0.022U_DIS
16
16 603
603
DIS POP ALL
R707 0_0402_UMAR707 0_0402_UMA
123
C791
C791 22nF/3P_NC
22nF/3P_NC
R727 0_0402_UMAR727 0_0402_UMA
123
C799
C799 22nF/3P_NC
22nF/3P_NC
3
+VCCD_TVDAC_RR
+VCCD_CRT_R
+VCCQ_TVDAC_RR
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
COMPUTER
Crestline (POWER)
Crestline (POWER)
Crestline (POWER)
GM3 2B
GM3 2B
GM3 2B
962Monday, March 24, 2008
962Monday, March 24, 2008
962Monday, March 24, 2008
of
of
1
of
5
U45I
U45I
A13
VSS_1
A15
VSS_2
A17
VSS_3
A24
VSS_4
AA21
VSS_5
AA24
VSS_6
AA29
VSS_7
D D
C C
B B
A A
5
AB20
VSS_8
AB23
VSS_9
AB26
VSS_10
AB28
VSS_11
AB31
VSS_12
AC10
VSS_13
AC13
VSS_14
AC3
VSS_15
AC39
VSS_16
AC43
VSS_17
AC47
VSS_18
AD1
VSS_19
AD21
VSS_20
AD26
VSS_21
AD29
VSS_22
AD3
VSS_23
AD41
VSS_24
AD45
VSS_25
AD49
VSS_26
AD5
VSS_27
AD50
VSS_28
AD8
VSS_29
AE10
VSS_30
AE14
VSS_31
AE6
VSS_32
AF20
VSS_33
AF23
VSS_34
AF24
VSS_35
AF31
VSS_36
AG2
VSS_37
AG38
VSS_38
AG43
VSS_39
AG47
VSS_40
AG50
VSS_41
AH3
VSS_42
AH40
VSS_43
AH41
VSS_44
AH7
VSS_45
AH9
VSS_46
AJ11
VSS_47
AJ13
VSS_48
AJ21
VSS_49
AJ24
VSS_50
AJ29
VSS_51
AJ32
VSS_52
AJ43
VSS_53
AJ45
VSS_54
AJ49
VSS_55
AK20
VSS_56
AK21
VSS_57
AK26
VSS_58
AK28
VSS_59
AK31
VSS_60
AK51
VSS_61
AL1
VSS_62
AM11
VSS_63
AM13
VSS_64
AM3
VSS_65
AM4
VSS_66
AM41
VSS_67
AM45
VSS_68
AN1
VSS_69
AN38
VSS_70
AN39
VSS_71
AN43
VSS_72
AN5
VSS_73
AN7
VSS_74
AP4
VSS_75
AP48
VSS_76
AP50
VSS_77
AR11
VSS_78
AR2
VSS_79
AR39
VSS_80
AR44
VSS_81
AR47
VSS_82
AR7
VSS_83
AT10
VSS_84
AT14
VSS_85
AT41
VSS_86
AT49
VSS_87
AU1
VSS_88
AU23
VSS_89
AU29
VSS_90
AU3
VSS_91
AU36
VSS_92
AU49
VSS_93
AU51
VSS_94
AV39
VSS_95
AV48
VSS_96
AW1
VSS_97
AW12
VSS_98
AW16
VSS_99
CRESTLINE_1p0_DU
CRESTLINE_1p0_DU
VSS
VSS
4
4
VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198
AW24 AW29 AW32 AW5 AW7 AY10 AY24 AY37 AY42 AY43 AY45 AY47 AY50 B10 B20 B24 B29 B30 B35 B38 B43 B46 B5 B8 BA1 BA17 BA18 BA2 BA24 BB12 BB25 BB40 BB44 BB49 BB8 BC16 BC24 BC25 BC36 BC40 BC51 BD13 BD2 BD28 BD45 BD48 BD5 BE1 BE19 BE23 BE30 BE42 BE51 BE8 BF12 BF16 BF36 BG19 BG2 BG24 BG29 BG39 BG48 BG5 BG51 BH17 BH30 BH44 BH46 BH8 BJ11 BJ13 BJ38 BJ4 BJ42 BJ46 BK15 BK17 BK25 BK29 BK36 BK40 BK44 BK6 BK8 BL11 BL13 BL19 BL22 BL37 BL47 C12 C16 C19 C28 C29 C33 C36 C41
3
U45J
U45J
C46
VSS_199
C50
VSS_200
C7
VSS_201
D13
VSS_202
D24
VSS_203
D3
VSS_204
D32
VSS_205
D39
VSS_206
D45
VSS_207
D49
VSS_208
E10
VSS_209
E16
VSS_210
E24
VSS_211
E28
VSS_212
E32
VSS_213
E47
VSS_214
F19
VSS_215
F36
VSS_216
F4
VSS_217
F40
VSS_218
F50
VSS_219
G1
VSS_220
G13
VSS_221
G16
VSS_222
G19
VSS_223
G24
VSS_224
G28
VSS_225
G29
VSS_226
G33
VSS_227
G42
VSS_228
G45
VSS_229
G48
VSS_230
G8
VSS_231
H24
VSS_232
H28
VSS_233
H4
VSS_234
H45
VSS_235
J11
VSS_236
J16
VSS_237
J2
VSS_238
J24
VSS_239
J28
VSS_240
J33
VSS_241
J35
VSS_242
J39
VSS_243
K12
VSS_245
K47
VSS_246
K8
VSS_247
L1
VSS_248
L17
VSS_249
L20
VSS_250
L24
VSS_251
L28
VSS_252
L3
VSS_253
L33
VSS_254
L49
VSS_255
M28
VSS_256
M42
VSS_257
M46
VSS_258
M49
VSS_259
M5
VSS_260
M50
VSS_261
M9
VSS_262
N11
VSS_263
N14
VSS_264
N17
VSS_265
N29
VSS_266
N32
VSS_267
N36
VSS_268
N39
VSS_269
N44
VSS_270
N49
VSS_271
N7
VSS_272
P19
VSS_273
P2
VSS_274
P23
VSS_275
P3
VSS_276
P50
VSS_277
R49
VSS_278
T39
VSS_279
T43
VSS_280
T47
VSS_281
U41
VSS_282
U45
VSS_283
U50
VSS_284
V2
VSS_285
V3
VSS_286
CRESTLINE_1p0_DU
CRESTLINE_1p0_DU
3
VSS
VSS
VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296 VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305
VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313
2
W11 W39 W43 W47 W5 W7 Y13 Y2 Y41 Y45 Y49 Y5 Y50 Y11 P29 T29 T31 T33 R28
AA32 AB32 AD32 AF28 AF29 AT27 AV25 H50
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Crestline (VSS)
Crestline (VSS)
Crestline (VSS)
GM3 2B
GM3 2B
GM3 2B
1
of
of
of
10 62Monday, March 24, 2008
10 62Monday, March 24, 2008
10 62Monday, March 24, 2008
1
1
2
3
4
5
6
7
8
+RTC_CELL +RTC_CELL
12
R550
R550 332K/F
332K/F
ICH_INTVRMEN ICH_LAN100_SLP
12
R548
R548 0_NC
0_NC
ICH8M LAN100 SLP Strap
Low = Internal VR Disabled High = Internal VR Enabled(Default)
U48A
U48A
AG25
RTCX1
AF24
RTCX2
AF23
RTCRST#
AD22
INTRUDER#
AF25
INTVRMEN
AD21
LAN100_SLP
B24
GLAN_CLK
D22
LAN_RSTSYNC
C21
LAN_RXD0
B21
LAN_RXD1
C22
LAN_RXD2
D21
LAN_TXD0
E20
LAN_TXD1
C20
LAN_TXD2
AH21
GLAN_DOCK#/GPIO13
D25
GLAN_COMPI
C25
GLAN_COMPO
AJ16
HDA_BIT_CLK
AJ15
HDA_SYNC
AE14
HDA_RST#
AJ17
HDA_SDIN0
AH17
HDA_SDIN1
AH15
HDA_SDIN2
AD13
HDA_SDIN3
AE13
HDA_SDOUT
AE10
HDA_DOCK_EN#/GPIO33
AG14
HDA_DOCK_RST#/GPIO34
AF10
SATALED#
AF6
SATA0RXN
AF5
SATA0RXP
AH5
SATA0TXN
AH6
SATA0TXP
AG3
SATA1RXN
AG4
SATA1RXP
AJ4
SATA1TXN
AJ3
SATA1TXP
AF2
SATA2RXN
AF1
SATA2RXP
AE4
SATA2TXN
AE3
SATA2TXP
AB7
SATA_CLKN
AC6
SATA_CLKP
AG1
SATARBIAS#
AG2
SATARBIAS
IC,ICH8M,BGA676,12-01,rev1p0_2
IC,ICH8M,BGA676,12-01,rev1p0_2
+3.3V_RUN
RTC
RTC
CPUPWRGD/GPIO49
LAN / GLAN
LAN / GLAN
IHDA
IHDA
SATA
SATA
(Internal VR for VccLAN1.05 and VccCL1.05)
Low = Internal VR Disabled High = Internal VR Enabled(Default)
SIO_A20GATE
H_DPRSTP# H_DPSLP#
H_FERR#
SIO_RCIN#
THERMTRIP#_ICH
IDE_IRQ IDE_DIORDY
FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3
FWH4/LFRAME#
LPC
LPC
LDRQ1#/GPIO23
A20GATE
DPRSTP#
CPU
CPU
STPCLK#
THRMTRIP#
IDE
IDE
ICH_LAN100_SLP
E5 F5 G8 F6
C4 G9
LDRQ0#
E6 AF13
AG26
A20M#
AF26 AE26
DPSLP#
AD24
FERR#
AG29 AF27
IGNNE#
AE24
INIT#
AC20
INTR
AH14
RCIN#
AD23
NMI
AG28
SMI#
AA24 AE27 AA23
TP8
V1
DD0
U2
DD1
V3
DD2
T1
DD3
V4
DD4
T5
DD5
AB2
DD6
T6
DD7
T3
DD8
R2
DD9
T4
DD10
V6
DD11
V5
DD12
U1
DD13
V2
DD14
U6
DD15
AA4
DA0
AA1
DA1
AB3
DA2
Y6
DCS1#
Y5
DCS3#
W4
DIOR#
W3
DIOW#
Y2
DDACK#
Y3
IDEIRQ
Y1
IORDY
W5
DDREQ
IDE_D0 IDE_D1 IDE_D2 IDE_D3 IDE_D4 IDE_D5 IDE_D6 IDE_D7 IDE_D8 IDE_D9 IDE_D10 IDE_D11 IDE_D12 IDE_D13 IDE_D14 IDE_D15
IDE_DA0 IDE_DA1 IDE_DA2
12
12
R532
R532 332K/F
332K/F
R528
R528 0_NC
0_NC
LPC_LAD0 31,33 LPC_LAD1 31,33 LPC_LAD2 31,33 LPC_LAD3 31,33
LPC_LFRAME# 31,33
T62PAD T62PAD T56PAD T56PAD
SIO_A20GATE 31 H_A20M# 3
H_DPRSTP# 3,6,51 H_DPSLP# 3
H_FERR# 3 H_PWRGOOD 3 H_IGNNE# 3
H_INIT# 3 H_INTR 3
SIO_RCIN# 31
H_NMI 3 H_SMI# 3
H_STPCLK# 3
T85PAD T85PAD T129PAD T129PAD
T128PAD T128PAD T36PAD T36PAD T126PAD T126PAD T39PAD T39PAD T52PAD T52PAD T131PAD T131PAD T53PAD T53PAD T47PAD T47PAD T127PAD T127PAD T37PAD T37PAD T35PAD T35PAD T42PAD T42PAD T123PAD T123PAD T122PAD T122PAD T59PAD T59PAD
T40PAD T40PAD T130PAD T130PAD T124PAD T124PAD
T51PAD T51PAD T44PAD T44PAD
T38PAD T38PAD T41PAD T41PAD T125PAD T125PAD
R425 8.2KR425 8.2K R766 4.7KR766 4.7K
12 12
T45PAD T45PAD
+3.3V_RUN
1 2
H_DPRSTP# H_DPSLP# H_FERR#
SIO_A20GATE SIO_RCIN#
THERMTRIP#_ICH
R561
R561 56_NC
56_NC
+1.05V_VCCP
R560
R560 56_NC
56_NC
1 2
R501
R501 10K
10K
1 2
+1.05V_VCCP
1 2
+3.3V_RUN
1 2
1 2
R54256R542 56
R502
R502 10K
10K
R55956R559 56
C603
C603 27P/50V_NC
27P/50V_NC
R816 10MR816 10M
W2
W2
1 4 2 3
32.768KHZ
32.768KHZ
R538
R538 20K
20K
1 2
ICH_RTCRST# ICH_INTRUDER#
12
C628
C628 1U/10V
1U/10V
12
R815 0R815 0
1 2
Master HDD
SATA ODD
Second HDD
ICH_RTCX2ICH_RTCX1
12
C944
C944 12P/50V
12P/50V
T140 PADT140 PAD
ACZ_BIT_CLK
ACZ_SYNC ACZ_RST# ACZ_SDOUT ACZ_SYNC
Reserved for Intel Nineveh design.
+3.3V_SUS
+1.5V_PCIE_ICH
ICH_AZ_CODEC_SDIN040 ICH_AZ_HDMI_SDIN125
+3.3V_SUS
SATA_ACT#38
SATA_RX0-36 SATA_RX0+36
SATA_RX1-36 SATA_RX1+36
SATA_RX2-36 SATA_RX2+36
CLK_PCIE_SATA#17
Place within 500mils of ICH8 ball
CLK_PCIE_SATA17
T80 PADT80 PAD T135 PADT135 PAD T86 PADT86 PAD T84 PADT84 PAD T71 PADT71 PAD T83 PADT83 PAD
R533 10K_NCR533 10K_NC
R545 24.9/FR545 24.9/F
1 2
PAD
PAD
T133
T133
PAD
PAD
T63
T63
R472 10K_NCR472 10K_NC R507 10K_NCR507 10K_NC
R765 24.9/FR765 24.9/F
ICH8M Internal VR Enable Strap (Internal VR for VccSus1.05, VccSus1.5, VccCL1.5)
ICH_INTVRMEN
ICH_RTCX1 ICH_RTCX2
ICH_RTCRST# ICH_INTRUDER# ICH_INTVRMEN
ICH_LAN100_SLP GLAN_CLK
LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2
12
GLAN_COMP ACZ_BIT_CLK
ACZ_RST#
ACZ_SDOUT
12 12
SATA_TX0-_C SATA_TX0+_C
SATA_TX1-_C SATA_TX1+_C
SATA_TX2-_C SATA_TX2+_C
SATABIAS
12
32.768KHZ
12
C945
A A
B B
C C
ICH_AZ_HDMI_BITCLK25 ICH_AZ_CODEC_BITCLK40
1 2
ICH_AZ_HDMI_SYNC25 ICH_AZ_CODEC_SYNC40 ICH_AZ_HDMI_RST#25 ICH_AZ_CODEC_RST#31,40 ICH_AZ_HDMI_SDOUT25 ICH_AZ_CODEC_SDOUT40
Place all series terms close to ICH8 except for SDIN input lines,which should be close to source.Placement of R603, R600, R607 & R612 should equal distance to the T split trace point as R604, R599, R606 & R608 respective. Basically,keep the same distance from T for all series termination resistors.
C553 3900P
SATA_TX0-36 SATA_TX0+36
SATA_TX1-36 SATA_TX1+36
SATA_TX2-36 SATA_TX2+36
Distance between the ICH-8 M and cap on the "P" signal should be identical distance between the ICH-8 M and cap on the "N" signal for same pair.
C553 3900P C554 3900P
C554 3900P
C900 3900P
C900 3900P C898 3900P
C898 3900P
C535 3900P
C535 3900P C536 3900P
C536 3900P
12 12
25
25 25
25
12 12
25
25 25
25
12 12
25
25 25
25
C945 12P/50V
12P/50V
+RTC_CELL
12
R506 33_UMAR506 33_UMA R508 33R508 33
C594
C594 27P/50V_UMA
27P/50V_UMA
R516 33_UMAR516 33_UMA R517 33R517 33 R503 33_UMAR503 33_UMA R504 33R504 33 R496 33_UMAR496 33_UMA R481 33R481 33
R5351MR535 1M
1 2 1 2
1 2
1 2 1 2 1 2 1 2 1 2 1 2
SATA_TX0-_C SATA_TX0+_C
SATA_TX1-_C SATA_TX1+_C
SATA_TX2-_C SATA_TX2+_C
R482
5
1 2
1 2
R482 1K_NC
1K_NC
R787
R787 1K_NC
1K_NC
ACZ_SDOUT
ICH_RSVD 13
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
6
Date: Sheet
ICH8-M (CPU,IDE,SATA,LPC,AC97,LAN)
ICH8-M (CPU,IDE,SATA,LPC,AC97,LAN)
ICH8-M (CPU,IDE,SATA,LPC,AC97,LAN)
GM3 2B
GM3 2B
GM3 2B
7
of
of
of
11 62Monday, March 24, 2008
11 62Monday, March 24, 2008
11 62Monday, March 24, 2008
8
D D
1
2
3
XOR Chain Entrance Strap
ICH RSVD
HDA SDOUT
0 0 1 1
Description
RSVD
0 1
Enter XOR Chain
0
Normal Operation (Default)
1
Set PCIE port config bit 1
4
1
Place TX DC blocking caps close ICH8.
C953 0.1U
C953 0.1U
PCIE_TX1-33 PCIE_TX1+33
PCIE_TX2-34 PCIE_TX2+34
PCIE_TX3-33
A A
B B
PCIE_TX3+33
PCIE_TX4-30 PCIE_TX4+30
PCIE_TX6-/GLAN_TX-42 PCIE_TX6+/GLAN_TX+42
ICH_SPI_CS1#_R PCI_GNT0#
1 2
R451
R451 1K_NC
1K_NC
12
1 2
C955 0.1U
C955 0.1U
1 2
10
10 10
10
C951 0.1U
C951 0.1U
1 2
C952 0.1U
C952 0.1U
1 2
10
10 10
10
C949 0.1U
C949 0.1U
1 2
C950 0.1U
C950 0.1U
1 2
10
10 10
10
C948 0.1U
C948 0.1U
1 2
C947 0.1U
C947 0.1U
1 2
10
10 10
10
C946 0.1U
C946 0.1U
1 2
C954 0.1U
C954 0.1U
1 2
10
10 10
10
R546
R546
1K_NC
1K_NC
PCI SPI1001
WWAN Noise - ICH improvements
OC6# OC4# OC5# OC7# USB_OC8# USB_OC2_3# USB_OC0_1# OC9#
C C
D D
C918 0.1U_NC
C918 0.1U_NC
1 2
C915 0.1U_NC
C915 0.1U_NC
1 2
C916 0.1U_NC
C916 0.1U_NC
1 2
C917 0.1U_NC
C917 0.1U_NC
1 2
C922 0.1U_NC
C922 0.1U_NC
1 2
C923 0.1U_NC
C923 0.1U_NC
1 2
C924 0.1U_NC
C924 0.1U_NC
1 2
C925 0.1U_NC
C925 0.1U_NC
1 2
PCI_AD[0..31]28
T55 PADT55 PAD
PCI_PIRQB#28
T132 PADT132 PAD
1
10
10 10
10 10
10 10
10 10
10 10
10 10
10 10
10
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#
2
Boot BIOS Strap
GNT0# SPI_CS1#
No stuff
11LPC
No stuff Stuff
D20 E19 D19 A20 D17 A21 A19 C19 A18 B16 A12 E16 A14 G16 A15
B6
C11
A9 D11 B12 C12 D10
C7 F13 E11 E13 E12
D8
A6 E8
D6
A3
F9 B5
C5 A10
2
PCIE_TXN1_C PCIE_TXP1_C
PCIE_TXN2_C PCIE_TXP2_C
PCIE_TXN3_C PCIE_TXP3_C
PCIE_TXN4_C PCIE_TXP4_C
GLAN_TXN_C GLAN_TXP_C
No stuff Stuff No stuff
Non-iAMT
OC6# OC4# OC5# OC7#
+3.3V_SUS
U48B
U48B
AD0
PCI
PCI
AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
Interrupt I/F
Interrupt I/F
PIRQA# PIRQB# PIRQC# PIRQD#
REQ1#/GPIO50 GNT1#/GPIO51 REQ2#/GPIO52 GNT2#/GPIO53 REQ3#/GPIO54 GNT3#/GPIO55
PIRQE#/GPIO2
PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5
PCIE_RX6-/GLAN_RX-42 PCIE_RX6+/GLAN_RX+42
REQ0# GNT0#
C/BE0# C/BE1# C/BE2# C/BE3#
IRDY#
PCIRST# DEVSEL#
PERR#
PLOCK#
SERR# STOP# TRDY#
FRAME#
PLTRST#
PCICLK
PCIE_RX1-33 PCIE_RX1+33
MiniWWAN
PCIE_RX2-34 PCIE_RX2+34
MiniWLAN
PCIE_RX3-33 PCIE_RX3+33
MiniWPAN
PCIE_RX4-30 PCIE_RX4+30
Express Card
Giga Bit LOM
USB_OC0_1#35 USB_OC2_3#54
USB_OC8#35
PAR
PME#
3
T239 PADT239 PAD T240 PADT240 PAD
T241 PADT241 PAD
T243 PADT243 PAD
T245 PADT245 PAD
T249 PADT249 PAD T247 PADT247 PAD
T87 PADT87 PAD T137 PADT137 PAD
T91 PADT91 PAD T81 PADT81 PAD
RP49
RP49
6 7 8 9
10
10KX8
10KX8
PCI_REQ0#
A4
PCI_GNT0#
D7
PCI_REQ1#
E18
PCI_GNT1#
C18
SB_WWAN_PCIE_RST#
B19
PCI_GNT2#
F18
SB_LOM_PCIE_RST#
A11
PCI_GNT3#
C10 C17
E15 F16 E17
PCI_IRDY#
C8 D9
PCI_RST#_G
G6
PCI_DEVSEL#
D16
PCI_PERR#
A7
PCI_PLOCK#
B7
PCI_SERR#
F10
PCI_STOP#
C16
PCI_TRDY#
C9
PCI_FRAME#
A17
PCI_PLTRST#
AG24
CLK_PCI_ICH
B10 G7
SB_WPAN_PCIE_RST#
F8
SB_WLAN_PCIE_RST#
G11
SB_NB_PCIE_RST#
F12
ICH_IRQH_GPIO5
B3
3
PCIE_TXN1_C PCIE_TXP1_C
PCIE_TXN2_C PCIE_TXP2_C
PCIE_TXN3_C PCIE_TXP3_C
PCIE_TXN4_C PCIE_TXP4_C
GLAN_TXN_C GLAN_TXP_C
ICH_SPI_CS1#_R
USB_OC0_1# USB_OC2_3# OC4#
OC5# OC6# OC7# USB_OC8# OC9#
+3.3V_SUS
5
USB_OC8#
4
USB_OC2_3#
3
USB_OC0_1#
2
OC9#
1
4
U48D
U48D
P27
PERN1
P26
PERP1
N29
PETN1
N28
PETP1
T242
T242
PAD
PAD
M27
PERN2
M26
PERP2
L29
PETN2
L28
PETP2
T244
T244
PAD
PAD
K27
PERN3
K26
PERP3
J29
PETN3
J28
PETP3
T246
T246
PAD
PAD
H27
PERN4
H26
PERP4
G29
PETN4
G28
PETP4
F27
PERN5
F26
PERP5
E29
PETN5
T250
T250
E28
PAD
PAD
PETP5
T248
T248
PAD
PAD
D27
PERN6/GLAN_RXN
D26
PERP6/GLAN_RXP
C29
PETN6/GLAN_TXN
C28
PETP6/GLAN_TXP
C23
SPI_CLK
B23
SPI_CS0#
E22
SPI_CS1#
D23
SPI_MOSI
F21
SPI_MISO
AJ19
OC0#
AG16
OC1#/GPIO40
AG15
OC2#/GPIO41
AE15
OC3#/GPIO42
AF15
OC4#/GPIO43
AG17
OC5#/GPIO29
AD12
OC6#/GPIO30
AJ18
OC7#/GPIO31
AD14
OC8#
AH18
OC9#
PCI_REQ0# 28 PCI_GNT0# 28
T65PAD T65PAD T75PAD T75PAD
SB_WWAN_PCIE_RST# 33
T64PAD T64PAD
SB_LOM_PCIE_RST# 42
T61PAD T61PAD
PCI_C_BE0# 28 PCI_C_BE1# 28 PCI_C_BE2# 28 PCI_C_BE3# 28
PCI_IRDY# 28 PCI_PAR 28
PCI_DEVSEL# 28 PCI_PERR# 28 PCI_PLOCK# PCI_SERR# 28 PCI_STOP# 28 PCI_TRDY# 28 PCI_FRAME# 28
CLK_PCI_ICH 17 ICH_PME# 28,31
SB_WPAN_PCIE_RST# 33 SB_WLAN_PCIE_RST# 34 SB_NB_PCIE_RST# 6PCI_PIRQC#28
T49PAD T49PAD
4
5
V27
DMI0RXN
V26
DMI0RXP
U29
DMI0TXN
U28
DMI0TXP
Y27
DMI1RXN
Y26
DMI1RXP
W29
DMI1TXN
W28
DMI1TXP
AB26
DMI2RXN
AB25
DMI2RXP
AA29
DMI2TXN
AA28
DMI2TXP
AD27
DMI3RXN
AD26
DMI3RXP
AC29
DMI3TXN
AC28
DMI3TXP
T26
DMI_CLKN
PCI-Express
PCI-Express
Direct Media Interface
Direct Media Interface
DMI_ZCOMP
DMI_IRCOMP
SPI
SPI
USB
USB
USBRBIAS#
Short F2 and F3 at the package and keep length to less than 500mils. Trace Impedance should be 60ohms +/- 15%.
DMI_CLKP
USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P
USBRBIAS
T25 Y23
DMI_COMP
Y24 G3
G2 H5 H4 H2 H1 J3 J2 K5 K4 K2 K1 L3 L2 M5 M4 M2 M1 N3 N2
F2
USBRBIAS
F3
A16 away override strap.
SB_NB_PCIE_RST#
T210 PADT210 PAD T213 PADT213 PAD
T215 PADT215 PAD T217 PADT217 PAD T219 PADT219 PAD T221 PADT221 PAD T223 PADT223 PAD
T225 PADT225 PAD T229 PADT229 PAD T234 PADT234 PAD T228 PADT228 PAD T231 PADT231 PAD T235 PADT235 PAD T237 PADT237 PAD
PCI_AD15 PCI_AD2 PCI_AD3 PCI_AD0 PCI_AD2 PCI_AD21 PCI_AD17 PCI_AD16
PCI_IRDY# PCI_TRDY# PCI_FRAME# PCI_STOP# PCI_DEVSEL# PCI_GNT0# PCI_REQ0#
5
DMI_MTX_IRX_N0 6 DMI_MTX_IRX_P0 6
DMI_MRX_ITX_N0 6 DMI_MRX_ITX_P0 6
DMI_MTX_IRX_N1 6 DMI_MTX_IRX_P1 6
DMI_MRX_ITX_N1 6 DMI_MRX_ITX_P1 6
DMI_MTX_IRX_N2 6 DMI_MTX_IRX_P2 6
DMI_MRX_ITX_N2 6 DMI_MRX_ITX_P2 6
DMI_MTX_IRX_N3 6 DMI_MTX_IRX_P3 6
DMI_MRX_ITX_N3 6 DMI_MRX_ITX_P3 6
CLK_PCIE_ICH# 17 CLK_PCIE_ICH 17
1 2
R529 24.9/FR529 24.9/F
ICH_USBP0- 35 ICH_USBP0+ 35 ICH_USBP1- 35 ICH_USBP1+ 35 ICH_USBP2- 54 ICH_USBP2+ 54 ICH_USBP3- 54 ICH_USBP3+ 54 ICH_USBP4- 41 ICH_USBP4+ 41 ICH_USBP5- 33 ICH_USBP5+ 33 ICH_USBP6- 33 ICH_USBP6+ 33 ICH_USBP7- 30 ICH_USBP7+ 30 ICH_USBP8- 35 ICH_USBP8+ 35 ICH_USBP9- 38 ICH_USBP9+ 38
R763
R763
22.6/F
22.6/F
1 2
PCI_GNT3#
12
R474
R474
1K_NC
1K_NC
Low = A16 swap override enabled. High = Default.
CLK_PCI_ICH
T209PAD T209PAD T214PAD T214PAD
T216PAD T216PAD T218PAD T218PAD T220PAD T220PAD T222PAD T222PAD T224PAD T224PAD
Reserved for EMI.Place
T226PAD T226PAD
resister and cap
T230PAD T230PAD
close to ICH.
T233PAD T233PAD T227PAD T227PAD T232PAD T232PAD T236PAD T236PAD T238PAD T238PAD
6
+1.5V_PCIE_ICH
Place within 500mils of ICH8
Side pair Top / left Side pair bottom / left Side pair top/right(DB) Side pair Bot right(DB) Camera Mini Card (WWAN) Mini Card (WPAN) Express Card left side signal USB port Biometric
R772
R772 10_NC
10_NC
1 2
C907
C907
8.2P_NC
8.2P_NC
1 2
16
16
6
7
8
PCI Pullups
PCI_FRAME# PCI_STOP# PCI_DEVSEL# PCI_REQ1#
+3.3V_RUN
PCI_IRDY# PCI_PERR# PCI_PLOCK# PCI_PIRQB#
+3.3V_RUN
SB_WPAN_PCIE_RST# SB_WWAN_PCIE_RST# SB_WLAN_PCIE_RST# SB_LOM_PCIE_RST# SB_NB_PCIE_RST#
BIOS should not enable the internal GPIO pull up resistor.
Non-iAMT
PCI_RST#_G
PCI_PLTRST#
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
+3.3V_SUS
C887
C887
1 2
0.047U
0.047U
2
10
10
1
+3.3V_SUS
C958
C958
1 2
0.047U
0.047U
2
10
10
1
ICH8-M (USB,DMI,PCIE,PCI)
ICH8-M (USB,DMI,PCIE,PCI)
ICH8-M (USB,DMI,PCIE,PCI)
GM3 2B
GM3 2B
GM3 2B
7
RP42RP42
6 7 8 9
10
RP40RP40
6 7 8 9
10
Add Buffers as needed for Loading and fanout concerns.
5
U47
U47
4
TC7SZ32FU(T5L,F,T)
TC7SZ32FU(T5L,F,T)
5
U50
U50
4
TC7SZ32FU(T5L,F,T)
TC7SZ32FU(T5L,F,T)
QUANTA
QUANTA
QUANTA COMPUTER
+3.3V_RUN
5
PCI_TRDY#
4
PCI_PIRQD#
3
PCI_PIRQB#
2
PCI_SERR#
1
+3.3V_RUN
5
PCI_PIRQA#
4
ICH_IRQH_GPIO5
3
PCI_PIRQC#
2
PCI_REQ0#
1
R468 20KR468 20K R791 20KR791 20K R467 20KR467 20K R477 20KR477 20K R495 20KR495 20K
PLTRST# 6,25,30,33,34,42
PCI_RST# 28
12 12 12 12 12
12 62Monday, March 24, 2008
12 62Monday, March 24, 2008
12 62Monday, March 24, 2008
8
of
of
of
1
2
3
4
5
6
7
8
+3.3V_SUS
RP50
RP50
1 3
2.2KX2
2.2KX2
A A
+3.3V_SUS
1 3
ICH_SMBCLK ICH_SMBDATA
+3.3V_RUN
R775
R775
8.2K
8.2K
1 2
R777
R777
B B
10_NC
10_NC
1 2
Option to " Disable " clkrun. Pulling it down will keep the clks running.
KB_LED_DET#37
PCIE_MCARD1_DET#34
R465 10KR465 10K
C C
+3.3V_RUN
R786 2.2K_NCR786 2.2K_NC R770 100KR770 100K
1 2
R771 100KR771 100K
1 2
R480 100KR480 100K
1 2
R490 100KR490 100K
1 2
R774 100KR774 100K
1 2
+3.3V_RUN
R781 10K_NCR781 10K_NC R476 10KR476 10K R500 10KR500 10K
+3.3V_SUS
R522 10KR522 10K R505 10KR505 10K R788 100KR788 100K
D D
1 2
2 4
RP45
RP45
2 4
100KX2_NC
100KX2_NC
R798 0R798 0 R524 0R524 0
CLKRUN#
12
12
12 12 12
12 12
1
Non-iAMT
ICH_SMBDATA ICH_SMBCLK
ICH_SMLINK0 ICH_SMLINK1
1 2 1 2
PCIE_MCARD1_DET#
USB_MCARD2_DET#
PCIE_MCARD1_DET#
PCIE_MCARD2_DET# PCIE_MCARD3_DET#
ASF 2.0Non-iAMT
ICH_SMLINK0 ICH_SMLINK1
12
PLTRST_DELAY#
IMVP_PWRGD
USB_MCARD3_DET#
MCH_ICH_SYNC#_R IRQ_SERIRQ THERM_ALERT#
RSV_WOL_EN SIO_EXT_SMI# USB_MCARD1_DET#
+3.3V_SUS
ICH_SMBCLK30,33,34 ICH_SMBDATA30,33,34
ITP_DBRESET#3 PM_BMBUSY#6
USB_MCARD1_DET#34
H_STP_PCI#17 H_STP_CPU#17
CLKRUN#28,31 PCIE_WAKE#30,33,34,42
IRQ_SERIRQ28,31
THERM_ALERT#39
IMVP_PWRGD31,44,51
USB_MCARD2_DET#33 USB_MCARD3_DET#33
SIO_EXT_WAKE#31 SIO_EXT_SMI#31
R267 0_NCR267 0_NC
R820 4.7KR820 4.7K
2
SIO_EXT_SCI#31
12
PCIE_MCARD2_DET#33 PCIE_MCARD3_DET#33
WLAN_RADIO_DIS#34
CAMERA_CBL_DET#41
SATA_CLKREQ#17
PLTRST_DELAY#18
WPAN_RADIO_DIS_MINI#33
WWAN_RADIO_DIS#33
MCH_ICH_SYNC#6
R789 10K_NCR789 10K_NC R519 10KR519 10K R521 10KR521 10K R509 1KR509 1K
ICH_RSVD11
T82 PADT82 PAD T139 PADT139 PAD T79 PADT79 PAD
T48 PADT48 PAD
T134 PADT134 PAD
SPKR40
+3.3V_RUN
12 12 12 12
R778 0R778 0
12
R478
R478
1K_NC
1K_NC
USB_MCARD1_DET#
PCIE_MCARD2_DET# PCIE_MCARD3_DET#
12
SPKR
No Reboot strap.
SPKR
Low = Default. High = No Reboot.
3
Non-iAMT
RSV_ICH_CL_RST1# ICH_RI# SIO_EXT_SCI# PCIE_WAKE#
ICH_SMBCLK ICH_SMBDATA RSV_ICH_CL_RST1# ICH_SMLINK0 ICH_SMLINK1
ICH_RI# RSV_LPCPD#
CLKRUN# PCIE_WAKE#
IRQ_SERIRQ THERM_ALERT#
IMVP_PWRGD
USB_MCARD2_DET# USB_MCARD3_DET#
SIO_EXT_SMI# SIO_EXT_SCI#
PLTRST_DELAY#
SPKR
MCH_ICH_SYNC#_R
U48C
U48C
AJ26
SMBCLK
AD19
SMBDATA
AG21
LINKALERT#
AC17
SMLINK0
AE19
SMLINK1
AF17
RI#
F4
SUS_STAT#/LPCPD#
AD15
SYS_RESET#
AG12
BMBUSY#/GPIO0
AG22
SMBALERT#/GPIO11
AE20
STP_PCI#/GPIO15
AG18
STP_CPU#/GPIO25
AH11
CLKRUN#/GPIO32
AE17
WAKE#
AF12
SERIRQ
AC13
THRM#
AJ20
VRMPWRGD
AJ22
TP7
AJ8
TACH1/GPIO1
AJ9
TACH2/GPIO6
AH9
TACH3/GPIO7
AE16
GPIO8
AC19
GPIO12
AG8
TACH0/GPIO17
AH12
GPIO18
AE11
GPIO20
AG10
SCLOCK/GPIO22
AH25
QRT_STATE0/GPIO27
AD16
QRT_STATE1/GPIO28
AG13
SATACLKREQ#/GPIO35
AF9
SLOAD/GPIO38
AJ11
SDATAOUT0/GPIO39
AD10
SDATAOUT1/GPIO48
AD9
SPKR
AJ13
MCH_SYNC#
AJ21
TP3
SMbus address D2
These are for backdrive issue.
ICH_SMBDATA30,33,34 MEM_SDATA 15
4
SATA0GP/GPIO21 SATA1GP/GPIO19 SATA2GP/GPIO36 SATA3GP/GPIO37
SATA
GPIO
SATA
GPIO
SMB
SMB
Clocks
Clocks
S4_STATE#/GPIO26
DPRSLPVR/GPIO16
SYS
GPIO
SYS
GPIO
LAN_RST#
Power MGTController Link
Power MGTController Link
CK_PWRGD
CLPWROK
CL_DATA0
GPIO
GPIO
MISC
MISC
CL_DATA1 CL_VREF0
CL_VREF1
MEM_LED/GPIO24 ME_EC_ALERT/GPIO10 EC_ME_ALERT/GPIO14
WOL_EN/GPIO9
+3.3V_RUN
2
Q47
Q47
3 1
2N7002W-7-F
2N7002W-7-F
+3.3V_RUN
2
Q76
Q76
3 1
2N7002W-7-F
2N7002W-7-F
CLK14
CLK48 SUSCLK SLP_S3#
SLP_S4# SLP_S5#
PWROK
BATLOW# PWRBTN#
RSMRST#
SLP_M#
CL_CLK0 CL_CLK1
CL_RST#
2
1
4
3
RP51
RP51
2.2KX2
2.2KX2
5
AJ12 AJ10 AF11 AG11
CLK_ICH_14M
AG9
CLK_ICH_48M
G5
ICH_SUSCLK
D3 AG23
AF21 AD18
AH27
ICH_PWRGD
AE23
DPRSLPVR
AJ14
ICH_BATLOW#
AE21 C2
RSV_ICH_LAN_RST#
AH20
ICH_RSMRST#
AG27 E1
ICH_CL_PWROK
E3 AJ25 F23
RSV_ICH_CL_CLK1
AE18 F22
RSV_ICH_CL_DATA1
AF19
CL_VREF0
D24
CL_VREF1
AH23 AJ23 AJ27
RSV_GPIO10
AJ24
RSV_GPIO14
AF22
RSV_WOL_EN
AG19
Non-iAMT
+3.3V_RUN
1 2
MEM_SCLK 15ICH_SMBCLK30,33,34
R773
R773
8.2K
8.2K
R537 8.2KR537 8.2K
R543 8.2KR543 8.2K
CLK_ICH_14M 17 CLK_ICH_48M 17
T43PAD T43PAD
SIO_SLP_S3# 31
T88PAD T88PAD
SIO_SLP_S5# 31
ICH_PWRGD 6,44 DPRSLPVR 6,51
12
+3.3V_SUS
SIO_PWRBTN# 31
T76PAD T76PAD
ICH_RSMRST# 31 CLK_PWRGD 17 ICH_CL_PWROK 6,31
T90PAD T90PAD
CL_CLK0 6
T69PAD T69PAD
CL_DATA0 6
T78PAD T78PAD
T138PAD T138PAD
ICH_CL_RST0# 6
T136PAD T136PAD
T92PAD T92PAD
T77PAD T77PAD
12
+3.3V_SUS
6
Place these close to ICH8.
CLK_ICH_48M
R444
R444 10_NC
10_NC
1 2 12
50
50
R473
R473 10_NC
10_NC
1 2 12
50
50
R540 10KR540 10K R784 100KR784 100K
1 2
R523 10KR523 10K R762 1MR762 1M
R795 10KR795 10K
Non-iAMT
ICH_PWRGD DPRSLPVR ICH_RSMRST# RSV_ICH_LAN_RST# ICH_CL_PWROK
RSV_GPIO10
CLK_ICH_14M
R564 10KR564 10K
DIS:ALW UMA:SUS
Non-iAMT
10
10
Title
Title
Title
ICH8-M (PM,GPIO,SMB,CL)
ICH8-M (PM,GPIO,SMB,CL)
ICH8-M (PM,GPIO,SMB,CL)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
GM3 2B
GM3 2B
GM3 2B
Date: Sheet
Date: Sheet
Date: Sheet
7
+3.3V_RUN
R531
R531
3.24K/F
3.24K/F
1 2
CL_VREF0
12
12
C621
C621
0.1U
0.1U
QUANTA
QUANTA
QUANTA COMPUTER
R534
R534 453/F
453/F
10
10
12
C926
C926
0.1U_NC
0.1U_NC
R536
R536
3.24K/F_NC
3.24K/F_NC
1 2
CL_VREF1
C564
C564
4.7P_NC
4.7P_NC
C577
C577
4.7P_NC
4.7P_NC
12
12 12 12
12
+3.3V_SUS+3.3V_ALW
1 2
12
13 62Monday, March 24, 2008
13 62Monday, March 24, 2008
13 62Monday, March 24, 2008
8
+3.3V_SUS
R796
R796
3.24K/F_NC
3.24K/F_NC
R792
R792 453/F_NC
453/F_NC
of
of
of
14
1
+RTC_CELL
R783 100R783 100
R764 100R764 100
+1.5V_RUN
L62
L62
805
805
BLM21PG331SN1D
BLM21PG331SN1D
12
+
+
C957
C957 220U
220U
4
4
7343
7343
+1.5V_RUN
12
R7690R769 0
+VCCSATPLL_L
L84
L84 10uH
10uH
10uH+-20%_100mA
+VCCSATPLL
12
805
805
C901
C901 1U
1U
10
10
603
603
C625
C625
0.1U
0.1U
1 2
10
10
1 2
D30
D30
2 1
SDMK0340L-7-F
SDMK0340L-7-F
1 2
D29
D29
2 1
SDMK0340L-7-F
SDMK0340L-7-F
10
10
1206
1206
6.3
6.3
603
603
1
+5V_RUN
+3.3V_RUN
A A
Non-iAMT
+5V_SUS
+3.3V_SUS
B B
C C
Non-iAMT
Place C625 close to A24.
+1.5V_RUN
D D
12
C616
C616 1U
1U
10
10
+ICH_V5REF_RUN
603
603
12
C608
C608 1U
1U
10
10
603
603
+ICH_V5REF_SUS
12
C896
C896 1U
1U
10
10
603
603
FB_330ohm+-25%_100mHz_
1.5A_0.09 ohm DC
12
12
C619
C619 22U
22U
C571
C571 10U
10U
12
10
10
1206
1206
+1.5V_RUN
C604
C604 22U
22U
10
10
Non-iAMT
+3.3V_RUN
+1.5V_PCIE_ICH
C618
C618
0.1U
0.1U
1 2
10
10
+1.5V_PCIE_ICH
1 2
10
10
805
805
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
C545
C545
0.1U
0.1U
1 2
T68 PADT68 PAD T67 PADT67 PAD
C606
C606
0.1U
0.1U
C615
C615
2.2U
2.2U
10
10
6.3
6.3
2
1 2
12
2
1 2
10
10
+VCCSATPLL
12
C576
C576 1U
1U
10
10
603
603
12
C588
C588 1U
1U
10
10
603
603
C540
C540
0.1U
0.1U
1 2
10
10
TP_VCCSUSLAN1 TP_VCCSUSLAN2
+1.5V_RUN
C631
C631
4.7U
4.7U
C629
C629
0.1U
0.1U
+3.3V_RUN
AD25
A16
AA25 AA26 AA27 AB27 AB28 AB29
D28 D29 E25 E26 E27 F24 F25 G24 H23 H24
K24 K25 L23 L24
L25 M24 M25 N23 N24 N25
P24
P25 R24 R25 R26 R27
T23
T24
T27
T28
T29 U24 U25
V23
V24
V25 W25
Y25
AJ6 AE7
AF7 AG7 AH7
AJ7 AC1
AC2 AC3 AC4 AC5
AC10
AC9 AA5
AA6 G12
G17
AC7 AD7
W23
F17 G18
F19 G20
A24
A26
A27
B26
B27
B28
B25
T7
G4
J23 J24
H7
D1
F1 L6
L7 M6 M7
U48F
U48F
VCCRTC V5REF[1]
V5REF[2] V5REF_SUS VCC1_5_B[01]
VCC1_5_B[02] VCC1_5_B[03] VCC1_5_B[04] VCC1_5_B[05] VCC1_5_B[06] VCC1_5_B[07] VCC1_5_B[08] VCC1_5_B[09] VCC1_5_B[10] VCC1_5_B[11] VCC1_5_B[12] VCC1_5_B[13] VCC1_5_B[14] VCC1_5_B[15] VCC1_5_B[16] VCC1_5_B[17] VCC1_5_B[18] VCC1_5_B[19] VCC1_5_B[20] VCC1_5_B[21] VCC1_5_B[22] VCC1_5_B[23] VCC1_5_B[24] VCC1_5_B[25] VCC1_5_B[26] VCC1_5_B[27] VCC1_5_B[28] VCC1_5_B[29] VCC1_5_B[30] VCC1_5_B[31] VCC1_5_B[32] VCC1_5_B[33] VCC1_5_B[34] VCC1_5_B[35] VCC1_5_B[36] VCC1_5_B[37] VCC1_5_B[38] VCC1_5_B[39] VCC1_5_B[40] VCC1_5_B[41] VCC1_5_B[42] VCC1_5_B[43] VCC1_5_B[44] VCC1_5_B[45] VCC1_5_B[46]
VCCSATAPLL VCC1_5_A[01]
VCC1_5_A[02] VCC1_5_A[03] VCC1_5_A[04] VCC1_5_A[05]
VCC1_5_A[06] VCC1_5_A[07] VCC1_5_A[08] VCC1_5_A[09] VCC1_5_A[10]
VCC1_5_A[11] VCC1_5_A[12]
VCC1_5_A[13] VCC1_5_A[14]
VCC1_5_A[15] VCC1_5_A[16] VCC1_5_A[17]
VCC1_5_A[18] VCC1_5_A[19]
VCCUSBPLL VCC1_5_A[20]
VCC1_5_A[21] VCC1_5_A[22] VCC1_5_A[23] VCC1_5_A[24]
VCC1_5_A[25] VCCLAN1_05[1]
VCCLAN1_05[2] VCCLAN3_3[1]
VCCLAN3_3[2] VCCGLANPLL VCCGLAN1_5[1]
VCCGLAN1_5[2] VCCGLAN1_5[3] VCCGLAN1_5[4] VCCGLAN1_5[5]
VCCGLAN3_3
3
VCC1_05[01] VCC1_05[02] VCC1_05[03] VCC1_05[04] VCC1_05[05] VCC1_05[06] VCC1_05[07] VCC1_05[08] VCC1_05[09] VCC1_05[10] VCC1_05[11] VCC1_05[12] VCC1_05[13] VCC1_05[14] VCC1_05[15] VCC1_05[16]
CORE
CORE
VCC1_05[17] VCC1_05[18] VCC1_05[19] VCC1_05[20] VCC1_05[21] VCC1_05[22] VCC1_05[23] VCC1_05[24] VCC1_05[25] VCC1_05[26] VCC1_05[27] VCC1_05[28]
VCCA3GP ATXARX
VCCA3GP ATXARX
VCCDMIPLL
VCC_DMI[1] VCC_DMI[2]
V_CPU_IO[1] V_CPU_IO[2]
VCC3_3[01] VCC3_3[02] VCC3_3[03]
VCC3_3[04] VCC3_3[05] VCC3_3[06]
VCCP_COREVCCPSUSVCCPUSB
VCCP_COREVCCPSUSVCCPUSB
VCC3_3[07] VCC3_3[08] VCC3_3[09] VCC3_3[10] VCC3_3[11]
IDE
IDE
VCC3_3[12] VCC3_3[13]
VCC3_3[14] VCC3_3[15] VCC3_3[16] VCC3_3[17] VCC3_3[18] VCC3_3[19] VCC3_3[20]
PCI
PCI
VCC3_3[21] VCC3_3[22] VCC3_3[23] VCC3_3[24]
VCCHDA
VCCSUSHDA
VCCSUS1_05[1] VCCSUS1_05[2]
VCCSUS1_5[1]
VCCSUS1_5[2] VCCSUS3_3[01] VCCSUS3_3[02]
VCCSUS3_3[03] VCCSUS3_3[04] VCCSUS3_3[05]
USB CORE
USB CORE
VCCSUS3_3[06] VCCSUS3_3[07]
VCCSUS3_3[08] VCCSUS3_3[09] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16] VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19]
GLAN POWER
GLAN POWER
VCCCL1_05
VCCCL1_5
VCCCL3_3[1] VCCCL3_3[2]
3
4
C598
C598
0.1U
0.1U
A13 B13 C13 C14 D14 E14 F14 G14 L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18
R29 AE28
AE29 AC23
AC24 AF29 AD2 AC8
AD8 AE8 AF8
AA3 U7 V7 W1 W6 W7 Y7
A8 B15 B18 B4 B9 C15 D13 D5 E10 E7 F11
AC12 AD11 J6
AF20 AC16 J7 C3 AC18
AC21 AC22 AG20 AH28
P6 P7 C1 N7 P1 P2 P3 P4 P5 R1 R3 R5 R6
G22 A22 F20
G21
1 2
10
1 2
+1.5V_DMIPLL
C626
C626
0.1U
0.1U
C942
C942
0.01U
0.01U
10
10
10
10
10
10
10
10
10
10
10
+1.05V_VCCP
10
10
Non-iAMT
TP_VCCSUS1.05_1 TP_VCCSUS1.05_2
TP_VCCSUS1.5_1 TP_VCCSUS1.5_2
WWAN Noise - ICH improvements
C562
C562
0.1U_NC
0.1U_NC
+3.3V_RUN
10
10
12
C544
C544
0.1U_NC
0.1U_NC
12
10
10
TP_VCCCL1.05 +VCCCL1_5
Non-iAMT
4
1 2
1 2
1 2
1 2
1 2
C596
C596
0.1U
0.1U
C640
C640
0.1U
0.1U
C574
C574
0.1U
0.1U
C570
C570
0.1U
0.1U
C558
C558
0.1U
0.1U
25
25
+1.05V_VCCP
C943
C943
10U
10U
1 2
10
10
1206
1206
10
10
10
10
T50PAD T50PAD T73PAD T73PAD
T70PAD T70PAD T58PAD T58PAD
12
C634
C634
0.1U_NC
0.1U_NC
10
10
T89PAD T89PAD
5
+1.05V_VCCP +1.5V_RUN
D16
D16
1
2
BAT54C T/R
BAT54C T/R
R469
R469
3
1 2
10
10
805
805
1uH+-20%_800mA
L88
12
C643
C643 22U
22U
C611
C611
0.1U
0.1U
1 2
L88 1uH
1uH
1 2
6.3
6.3
603
603 +1.25V_RUN
+3.3V_RUN
+1.5V_DMIPLL_R
12
R817 1R817 1
close to AC23 & AC24
12
C609
C609
0.1U
0.1U
10
10
WWAN Noise - ICH improvements
12
C552
C552
0.1U_NC
0.1U_NC
10
C569
C569
0.1U
0.1U
Non-iAMT
12
10
10
10
10
603
603
C607
C607
0.1U
0.1U
PC187
PC187 1U_NC
1U_NC
10
12
C548
C548
0.1U
0.1U
10
10
12
C559
C559
0.1U
0.1U
10
10
C589
C589
0.1U
0.1U
1 2
+3.3V_RUN+3.3V_SUS
C563
C563
1 2
0.1U
0.1U
1 2
10
10
10
10
12
C541
C541
0.1U_NC
0.1U_NC
10
10
C927
C927
0.1U_NC
0.1U_NC
1 2
10
10
5
12
10
10
+3.3V_SUS
6
+1.5V_RUN
12
12
10
10
C550
C550
0.1U_NC
0.1U_NC
6
C595
C595
0.1U
0.1U
10
10
12
C566
C566
0.1U_NC
0.1U_NC
+1.05V_VCCP
12
10
10
805
805
+3.3V_RUN
12
10
10
7
U48EU48E
A23
VSS[001]
A5
VSS[002]
AA2
VSS[003]
AA7
VSS[004]
A25
VSS[005]
AB1
VSS[006]
AB24
VSS[007]
AC11
VSS[008]
AC14
VSS[009]
AC25
VSS[010]
AC26
VSS[011]
AC27
VSS[012]
AD17
VSS[013]
AD20
VSS[014]
AD28
VSS[015]
AD29
VSS[016]
AD3
VSS[017]
AD4
VSS[018]
AD6
VSS[019]
AE1
VSS[020]
AE12
VSS[021]
AE2
VSS[022]
AE22
VSS[023]
AD1
VSS[024]
AE25
VSS[025]
AE5
VSS[026]
AE6
VSS[027]
AE9
VSS[028]
AF14
VSS[029]
AF16
VSS[030]
AF18
VSS[031]
AF3
VSS[032]
AF4
VSS[033]
AG5
VSS[034]
AG6
VSS[035]
AH10
VSS[036]
AH13
VSS[037]
AH16
VSS[038]
AH19
VSS[039]
AH2
VSS[040]
AF28
VSS[041]
AH22
VSS[042]
AH24
C585
C585
4.7U
4.7U
C573
C573
0.1U_NC
0.1U_NC
Title
Title
Title
ICH8-M (POWER,GND)
ICH8-M (POWER,GND)
ICH8-M (POWER,GND)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
GM3 2B
GM3 2B
GM3 2B
Date: Sheet
Date: Sheet
Date: Sheet
VSS[043]
AH26
VSS[044]
AH3
VSS[045]
AH4
VSS[046]
AH8
VSS[047]
AJ5
VSS[048]
B11
VSS[049]
B14
VSS[050]
B17
VSS[051]
B2
VSS[052]
B20
VSS[053]
B22
VSS[054]
B8
VSS[055]
C24
VSS[056]
C26
VSS[057]
C27
VSS[058]
C6
VSS[059]
D12
VSS[060]
D15
VSS[061]
D18
VSS[062]
D2
VSS[063]
D4
VSS[064]
E21
VSS[065]
E24
VSS[066]
E4
VSS[067]
E9
VSS[068]
F15
VSS[069]
E23
VSS[070]
F28
VSS[071]
F29
VSS[072]
F7
VSS[073]
G1
VSS[074]
E2
VSS[075]
G10
VSS[076]
G13
VSS[077]
G19
VSS[078]
G23
VSS[079]
G25
VSS[080]
G26
VSS[081]
G27
VSS[082]
H25
VSS[083]
H28
VSS[084]
H29
VSS[085]
H3
VSS[086]
H6
VSS[087]
J1
VSS[088]
J25
VSS[089]
J26
VSS[090]
J27
VSS[091]
J4
VSS[092]
J5
VSS[093]
K23
VSS[094]
K28
VSS[095]
K29
VSS[096]
K3
VSS[097]
K6
VSS[098]
QUANTA
QUANTA
QUANTA COMPUTER
7
VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184]
VSS_NCTF[01] VSS_NCTF[02] VSS_NCTF[03] VSS_NCTF[04] VSS_NCTF[05] VSS_NCTF[06] VSS_NCTF[07] VSS_NCTF[08] VSS_NCTF[09] VSS_NCTF[10] VSS_NCTF[11] VSS_NCTF[12]
K7 L1 L13 L15 L26 L27 L4 L5 M12 M13 M14 M15 M16 M17 M23 M28 M29 M3 N1 N11 N12 N13 N14 N15 N16 N17 N18 N26 N27 N4 N5 N6 P12 P13 P14 P15 P16 P17 P23 P28 P29 R11 R12 R13 R14 R15 R16 R17 R18 R28 R4 T12 T13 T14 T15 T16 T17 T2 U12 U13 U14 U15 U16 U17 U23 U26 U27 U3 U5 V13 V15 V28 V29 W2 W26 W27 Y28 Y29 Y4 AB4 AB23 AB5 AB6 AD5 U4 W24
A1 A2 A28 A29 AH1 AH29 AJ1 AJ2 AJ28 AJ29 B1 B29
14 62Monday, March 24, 2008
14 62Monday, March 24, 2008
14 62Monday, March 24, 2008
8
of
of
of
8
1
2
3
4
5
6
7
8
MASTER
+1.8V_SUS
+V_DDR_MCH_REF
JDIM1
JDIM1
1
A A
B B
DDR_CKE0_DIMMA6,16
DDR_A_BS27,16
DDR_A_BS07,16 DDR_A_WE#7,16
DDR_A_CAS#7,16
DDR_CS1_DIMMA#6,16
M_ODT16,16
C C
D D
MEM_SDATA13
MEM_SCLK13
+3.3V_RUN
DDR_A_D6 DDR_A_D5
DDR_A_DQS#0 DDR_A_DQS0
DDR_A_D3 DDR_A_D2
DDR_A_D9 DDR_A_D8
DDR_A_DQS#1 DDR_A_DQS1
DDR_A_D11 DDR_A_D14
DDR_A_D17 DDR_A_D20
DDR_A_DQS#2 DDR_A_DQS2
DDR_A_D23 DDR_A_D19
DDR_A_D28 DDR_A_D25
DDR_A_DM3
DDR_A_D31 DDR_A_D27
DDR_A_BS2 DDR_A_MA12
DDR_A_MA9 DDR_A_MA8
DDR_A_MA5 DDR_A_MA3 DDR_A_MA1
DDR_A_MA10 DDR_A_BS0 DDR_A_WE#
DDR_A_CAS#
M_ODT1 DDR_A_D37
DDR_A_D36 DDR_A_DQS#4
DDR_A_DQS4 DDR_A_D34
DDR_A_D39 DDR_A_D40
DDR_A_D41 DDR_A_DM5 DDR_A_D42
DDR_A_D46 DDR_A_D53
DDR_A_D49
DDR_A_DQS#6 DDR_A_DQS6
DDR_A_D50 DDR_A_D51
DDR_A_D60 DDR_A_D56 DDR_A_D61
DDR_A_DM7 DDR_A_D63
DDR_A_D59
MEM_SCLK
SMbus address A0
1
VREF
3
VSS47
5
DQ0
7
DQ1
9
VSS37
11
DQS#0
13
DQS0
15
VSS48
17
DQ2
19
DQ3
21
VSS38
23
DQ8
25
DQ9
27
VSS49
29
DQS#1
31
DQS1
33
VSS39
35
DQ10
37
DQ11
39
VSS50
41
VSS18
43
DQ16
45
DQ17
47
VSS1
49
DQS#2
51
DQS2
53
VSS19
55
DQ18
57
DQ19
59
VSS22
61
DQ24
63
DQ25
65
VSS23
67
DM3
69
NC4
71
VSS9
73
DQ26
75
DQ27
77
VSS4
79
CKE0
81
VDD7
83
NC1
85
A16_BA2
87
VDD9
89
A12
91
A9
93
A8
95
VDD5
97
A5
99
A3
101
A1
103
VDD10
105
A10/AP
107
BA0
109
WE#
111
VDD2
113
CAS#
115
S1#
117
VDD3
119
ODT1
121
VSS11
123
DQ32
125
DQ33
127
VSS26
129
DQS#4
131
DQS4
133
VSS2
135
DQ34
137
DQ35
139
VSS27
141
DQ40
143
DQ41
145
VSS29
147
DM5
149
VSS51
151
DQ42
153
DQ43
155
VSS40
157
DQ48
159
DQ49
161
VSS52
163
NCTEST
165
VSS30
167
DQS#6
169
DQS6
171
VSS31
173
DQ50
175
DQ51
177
VSS33
179
DQ56
181
DQ57
183
VSS3
185
DM7
187
VSS34
189
DQ58
191
DQ59
193
VSS14
195
SDA
197
SCL
199
VDD(SPD)
TYC_1-1734074-1
TYC_1-1734074-1
CLOCK 0,1
2
PC4800 DDR2 SDRAM
PC4800 DDR2 SDRAM
+1.8V_SUS
2
VSS46
DQ4 DQ5
VSS15
DM0
VSS5
DQ6 DQ7
VSS16
DQ12 DQ13
VSS17
DM1
VSS53
CK0
CK0#
VSS41
DQ14 DQ15
VSS54 VSS20
DQ20 DQ21 VSS6
NC3 DM2
VSS21
DQ22 DQ23
VSS24
DQ28
DQ29 VSS25 DQS#3
DQS3
VSS10
DQ30
DQ31
VSS8
CKE1
SO-DIMM (200P)
SO-DIMM (200P)
VDD8
A15 A14
VDD11
A11
A7 A6
VDD4
A4 A2 A0
VDD12
BA1
RAS#
S0# VDD1 ODT0
A13 VDD6
NC2
VSS12
DQ36 DQ37
VSS28
DM4
VSS42
DQ38 DQ39
VSS55
DQ44
DQ45 VSS43 DQS#5
DQS5
VSS56
DQ46
DQ47 VSS44
DQ52
DQ53 VSS57
CK1
CK1# VSS45
DM6
VSS32
DQ54
DQ55 VSS35
DQ60
DQ61
VSS7 DQS#7
DQS7
VSS36
DQ62
DQ63 VSS13
SA0 SA1
H 5.2 H 9.2
DDR_A_D4
4
DDR_A_D0
6 8
DDR_A_DM0
10 12
DDR_A_D7
14
DDR_A_D1
16 18
DDR_A_D13
20
DDR_A_D12
22 24
DDR_A_DM1
26 28 30 32 34
DDR_A_D15
36
DDR_A_D10
38 40
42
DDR_A_D16
44
DDR_A_D21
46 48
PM_EXTTS#0 PM_EXTTS#1
50
DDR_A_DM2
52 54
DDR_A_D18
56
DDR_A_D22
58 60
DDR_A_D29
62
DDR_A_D24
64 66
DDR_A_DQS#3
68
DDR_A_DQS3
70 72
DDR_A_D30
74
DDR_A_D26
76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
DDR_CKE1_DIMMA 6,16
DDR_A_MA11 DDR_A_MA7 DDR_A_MA6
DDR_A_MA4 DDR_A_MA2 DDR_A_MA0
DDR_A_BS1 DDR_A_RAS#
DDR_CS0_DIMMA# 6,16
M_ODT0
DDR_A_MA13
DDR_A_D32 DDR_A_D33
DDR_A_DM4 DDR_A_D38
DDR_A_D35 DDR_A_D44
DDR_A_D45 DDR_A_DQS#5
DDR_A_DQS5 DDR_A_D43
DDR_A_D47 DDR_A_D48
DDR_A_D52
DDR_A_DM6 DDR_A_D54
DDR_A_D55 DDR_A_D57
DDR_A_DQS#7 DDR_A_DQS7
DDR_A_D62 DDR_A_D58
R392
R392 10K
10K
1 2
1 2
3
M_CLK_DDR0 6 M_CLK_DDR#0 6
DDR_A_BS1 7,16 DDR_A_RAS# 7,16
M_ODT0 6,16
M_CLK_DDR1 6 M_CLK_DDR#1 6
R390
R390 10K
10K
DDR_A_DM[0..7] 7 DDR_A_D[0..63] 7 DDR_A_DQS[0..7] 7 DDR_A_DQS#[0..7] 7 DDR_A_MA[0..13] 7,16
+V_DDR_MCH_REF
12
C510
C510
0.1U_10V
0.1U_10V
PM_EXTTS#0 6
+3.3V_RUN
12
C504
C504
2.2U_6.3V
2.2U_6.3V
12
C508
C508
0.1U_10V
0.1U_10V
12
C509
C509
2.2U_6.3V
2.2U_6.3V
DDR_CKE3_DIMMB6,16
DDR_B_BS27,16
DDR_CS3_DIMMB#6,16
DDR_B_BS07,16 DDR_B_WE#7,16
DDR_B_CAS#7,16
+3.3V_RUN
4
M_ODT36,16
DDR_B_D5 DDR_B_D4
DDR_B_DQS#0 DDR_B_DQS0
DDR_B_D2 DDR_B_D3
DDR_B_D8 DDR_B_D9
DDR_B_DQS#1 DDR_B_DQS1
DDR_B_D11 DDR_B_D10
DDR_B_D17 DDR_B_D20
DDR_B_DQS#2 DDR_B_DQS2
DDR_B_D23 DDR_B_D29
DDR_B_D28 DDR_B_DM3
DDR_B_D31 DDR_B_D27
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9 DDR_B_MA8
DDR_B_MA5 DDR_B_MA3 DDR_B_MA1
DDR_B_MA10
DDR_B_BS0
DDR_B_WE# DDR_B_CAS#
M_ODT3 DDR_B_D37
DDR_B_D38 DDR_B_DQS#4
DDR_B_DQS4 DDR_B_D34
DDR_B_D35 DDR_B_D41 DDR_B_D44
DDR_B_D40 DDR_B_DM5 DDR_B_D46 DDR_B_D42
DDR_B_D43 DDR_B_D47 DDR_B_D53
DDR_B_D49
DDR_B_DQS#6 DDR_B_DQS6
DDR_B_D54
DDR_B_D56 DDR_B_D57
DDR_B_DM7 DDR_B_D58
DDR_B_D63 DDR_B_D62 MEM_SDATAMEM_SDATA
MEM_SCLK
SMbus address A4
SLAVE
+1.8V_SUS +1.8V_SUS
+V_DDR_MCH_REF
JDIM2
JDIM2
1
VREF
3
VSS47
5
DQ0
7
DQ1
9
VSS37
11
DQS#0
13
DQS0
15
VSS48
17
DQ2
19
DQ3
21
VSS38
23
DQ8
25
DQ9
27
VSS49
29
DQS#1
31
DQS1
33
VSS39
35
DQ10
37
DQ11
39
VSS50
41
VSS18
43
DQ16
45
DQ17
47
VSS1
49
DQS#2
51
DQS2
53
VSS19
55
DQ18
57
DQ19
59
VSS22
61
DQ24
63
DQ25
65
VSS23
67
DM3
69
NC4
71
VSS9
73
DQ26
75
DQ27
77
VSS4
79
CKE0
81
VDD7
83
NC1
85
A16_BA2
87
VDD9
89
A12
91
A9
93
A8
95
VDD5
97
A5
99
A3
101
A1
103
VDD10
105
A10/AP
107
BA0
109
WE#
111
VDD2
113
CAS#
115
S1#
117
VDD3
119
ODT1
121
VSS11
123
DQ32
125
DQ33
127
VSS26
129
DQS#4
131
DQS4
133
VSS2
135
DQ34
137
DQ35
139
VSS27
141
DQ40
143
DQ41
145
VSS29
147
DM5
149
VSS51
151
DQ42
153
DQ43
155
VSS40
157
DQ48
159
DQ49
161
VSS52
163
NCTEST
165
VSS30
167
DQS#6
169
DQS6
171
VSS31
173
DQ50
175
DQ51
177
VSS33
179
DQ56
181
DQ57
183
VSS3
185
DM7
187
VSS34
189
DQ58
191
DQ59
193
VSS14
195
SDA
197
SCL
199
VDD(SPD)
TYC_2-1734073-2
TYC_2-1734073-2
CLOCK 2,3
CKE 2,3CKE 0,1
5
2
VSS46
4
DQ4
6
DQ5
8
VSS15
10
DM0
12
VSS5
14
DQ6
16
DQ7
18
VSS16
20
DQ12
22
DQ13
24
VSS17
26
DM1
28
VSS53
30
CK0
32
CK0#
34
VSS41
36
DQ14
38
DQ15
40
VSS54
42
VSS20
44
DQ20
46
DQ21
48
VSS6
50
NC3
52
DM2
54
VSS21
56
DQ22
58
DQ23
60
VSS24
62
DQ28
64
DQ29
66
VSS25
68
DQS#3
70
DQS3
72
VSS10
74
DQ30
76
DQ31
78
VSS8
80
CKE1
82
VDD8
84
A15
86
A14
88
VDD11
90
PC4800 DDR2 SDRAM
SO-DIMM (200P)
PC4800 DDR2 SDRAM
SO-DIMM (200P)
A11
92
A7
94
A6
96
VDD4
98
A4
100
A2
102
A0
104
VDD12
106
BA1
108
RAS#
110
S0#
112
VDD1
114
ODT0
116
A13
118
VDD6
120
NC2
122
VSS12
124
DQ36
126
DQ37
128
VSS28
130
DM4
132
VSS42
134
DQ38
136
DQ39
138
VSS55
140
DQ44
142
DQ45
144
VSS43
146
DQS#5
148
DQS5
150
VSS56
152
DQ46
154
DQ47
156
VSS44
158
DQ52
160
DQ53
162
VSS57
164
CK1
166
CK1#
168
VSS45
170
DM6
172
VSS32
174
DQ54
176
DQ55
178
VSS35
180
DQ60
182
DQ61
184
VSS7
186
DQS#7
188
DQS7
190
VSS36
192
DQ62
194
DQ63
196
VSS13
198
SA0
200
SA1
1 2
DDR_B_D0 DDR_B_D1
DDR_B_DM0 DDR_B_D7
DDR_B_D6 DDR_B_D12
DDR_B_D13 DDR_B_DM1
DDR_B_D14 DDR_B_D15
DDR_B_D21 DDR_B_D16
DDR_B_DM2 DDR_B_D18DDR_B_D22
DDR_B_D19 DDR_B_D24
DDR_B_D25 DDR_B_DQS#3
DDR_B_DQS3 DDR_B_D30
DDR_B_D26
DDR_CKE4_DIMMB 6,16
DDR_B_MA14 6,16DDR_A_MA14 6,16
DDR_B_MA11 DDR_B_MA7 DDR_B_MA6
DDR_B_MA4 DDR_B_MA2 DDR_B_MA0
DDR_B_BS1 DDR_B_RAS#
DDR_CS2_DIMMB# 6,16
M_ODT2
DDR_B_MA13
DDR_B_D32 DDR_B_D36
DDR_B_DM4 DDR_B_D39
DDR_B_D33 DDR_B_D45
DDR_B_DQS#5 DDR_B_DQS5
DDR_B_D52 DDR_B_D48
DDR_B_DM6 DDR_B_D51
DDR_B_D55DDR_B_D50 DDR_B_D60
DDR_B_D61 DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D59
R411 10KR411 10K
R413
R413 10K
10K
12
6
DDR_B_DM[0..7] 7 DDR_B_D[0..63] 7 DDR_B_DQS[0..7] 7 DDR_B_DQS#[0..7] 7 DDR_B_MA[0..13] 7,16
+V_DDR_MCH_REF
12
C467
C471
C471
0.1U_10V
0.1U_10V
C467
2.2U_6.3V
2.2U_6.3V
Place these Caps near So-Dimm1.
12
12
C875
C875
2.2U_6.3V
2.2U_6.3V
C891
C891
2.2U_6.3V
2.2U_6.3V
M_CLK_DDR3 6 M_CLK_DDR#3 6
PM_EXTTS#1 6
+1.8V_SUS
12
C892
C892
2.2U_6.3V
2.2U_6.3V
+1.8V_SUS
12
Place these Caps near So-Dimm2.
12
C873
C873
2.2U_6.3V
2.2U_6.3V
12
C888
C888
0.1U_10V
0.1U_10V
12
C890
C890
0.1U_10V
0.1U_10V
12
C520
C520
0.1U_10V
0.1U_10V
12
C872
C872
2.2U_6.3V
2.2U_6.3V
12
C498
C498
0.1U_10V
0.1U_10V
12
C496
C496
0.1U_10V
0.1U_10V
12
C870
C870
2.2U_6.3V
2.2U_6.3V
DDR_B_BS1 7,16 DDR_B_RAS# 7,16
M_ODT2 6,16
M_CLK_DDR4 6 M_CLK_DDR#4 6
+3.3V_RUN
+1.8V_SUS
Place these Caps near So-Dimm1.
12
C501
C501
0.1U_10V
0.1U_10V
+1.8V_SUS
Place these Caps near So-Dimm2.
12
C497
C497
0.1U_10V
0.1U_10V
+3.3V_RUN
12
C523
C523
2.2U_6.3V
2.2U_6.3V
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
COMPUTER
DDR2_SO-DIMM (200P) X 2
DDR2_SO-DIMM (200P) X 2
DDR2_SO-DIMM (200P) X 2
GM3 2B
GM3 2B
GM3 2B
7
12
C889
C889
2.2U_6.3V
2.2U_6.3V
12
C874
C874
2.2U_6.3V
2.2U_6.3V
12
C500
C500
0.1U_10V
0.1U_10V
12
C499
C499
0.1U_10V
0.1U_10V
12
C893
C893
2.2U_6.3V
2.2U_6.3V
12
C871
C871
2.2U_6.3V
2.2U_6.3V
of
of
of
15 62Monday, March 24, 2008
15 62Monday, March 24, 2008
15 62Monday, March 24, 2008
8
1
2
3
4
5
6
7
8
+0.9V_DDR_VTT
A A
B B
C C
DDR_CS0_DIMMA#6,15
D D
1
Please these resistor closely DIMMA,all trace length<750 mil.
12
C529
C529
0.1U_10V
0.1U_10V
+0.9V_DDR_VTT
12
C469
C469
0.1U_10V
0.1U_10V
T194
T194 PAD
PAD
2
Layout note: Place 1 cap close to every 1 R-pack terminated to SMDDR_VTERM.
C468
C468
0.1U_10V
0.1U_10V
C490
C490
0.1U_10V
0.1U_10V
12
C494
C494
0.1U_10V
0.1U_10V
12
C515
C515
0.1U_10V
0.1U_10V
DDR_A_MA11 DDR_A_MA7
DDR_A_MA6 DDR_A_MA4
DDR_A_BS1 DDR_A_RAS#
DDR_A_MA13 M_ODT0
DDR_A_BS2 DDR_A_MA12
DDR_A_MA9 DDR_A_MA8
DDR_A_MA3 DDR_A_MA5
DDR_A_BS0 DDR_A_MA10
DDR_A_CAS# DDR_A_WE#
DDR_A_MA2 DDR_A_MA0
DDR_A_MA1
3
12
12
C511
C511
C527
C527
0.1U_10V
0.1U_10V
0.1U_10V
0.1U_10V
12
12
R388 56R388 56 R386 56R386 56 R402 56R402 56 R387 56R387 56 R389 56R389 56 R401 56R401 56 R400 56R400 56
C513
C513
0.1U_10V
0.1U_10V
RP25
RP25
2 4
4P2R-S-56
4P2R-S-56
RP26
RP26
2 4
4P2R-S-56
4P2R-S-56
RP28
RP28
2 4
4P2R-S-56
4P2R-S-56
RP29
RP29
2 4
4P2R-S-56
4P2R-S-56
RP13
RP13
2 4
4P2R-S-56
4P2R-S-56
RP12
RP12
2 4
4P2R-S-56
4P2R-S-56
RP9
RP9
2 4
4P2R-S-56
4P2R-S-56
RP10
RP10
2 4
4P2R-S-56
4P2R-S-56
RP11
RP11
2 4
4P2R-S-56
4P2R-S-56
RP27
RP27
2 4
4P2R-S-56
4P2R-S-56
1 2 1 2 1 2 1 2 1 2 1 2 1 2
C465
C465
0.1U_10V
0.1U_10V
1 3
1 3
1 3
1 3
1 3
1 3
1 3
1 3
1 3
1 3
12
C514
C514
0.1U_10V
0.1U_10V
12
C466
C466
0.1U_10V
0.1U_10V
+0.9V_DDR_VTT
4
12
12
C512
C512
0.1U_10V
0.1U_10V
12
12
C489
C489
0.1U_10V
0.1U_10V
DDR_A_MA[0..13]7,15 DDR_B_MA[0..13] 7,15
DDR_A_BS17,15 DDR_A_RAS#7,15
M_ODT06,15
DDR_A_BS27,15
DDR_A_BS07,15
DDR_A_CAS#7,15 DDR_A_WE#7,15
M_ODT16,15
DDR_CS1_DIMMA#6,15 DDR_CKE0_DIMMA6,15 DDR_CKE1_DIMMA6,15
DDR_A_MA146,15 DDR_B_MA14 6,15
12
12
12
C531
C531
C526
C526
0.1U_10V
0.1U_10V
0.1U_10V
0.1U_10V
12
C470
C470
C464
C464
0.1U_10V
0.1U_10V
0.1U_10V
0.1U_10V
RP36
RP36
1 3
4P2R-S-56
4P2R-S-56
RP35
RP35
1 3
4P2R-S-56
4P2R-S-56
RP38
RP38
1 3
4P2R-S-56
4P2R-S-56
RP39
RP39
1 3
4P2R-S-56
4P2R-S-56
RP34
RP34
1 3
4P2R-S-56
4P2R-S-56
RP32
RP32
1 3
4P2R-S-56
4P2R-S-56
RP33
RP33
1 3
4P2R-S-56
4P2R-S-56
RP30
RP30
1 3
4P2R-S-56
4P2R-S-56
RP31
RP31
1 3
4P2R-S-56
4P2R-S-56
RP37
RP37
1 3
4P2R-S-56
4P2R-S-56
R406 56R406 56 R403 56R403 56 R417 56R417 56 R405 56R405 56 R415 56R415 56 R404 56R404 56 R416 56R416 56
12
12
2 4
2 4
2 4
2 4
2 4
2 4
2 4
2 4
2 4
2 4
12 12 12 12 12 12 12
C528
C528
0.1U_10V
0.1U_10V
C472
C472
0.1U_10V
0.1U_10V
DDR_B_MA6 DDR_B_MA2
DDR_B_MA11 DDR_B_MA7
DDR_B_BS1 DDR_B_RAS#
M_ODT2 DDR_B_MA13
DDR_B_MA3 DDR_B_MA5
DDR_B_MA9 DDR_B_MA8
DDR_B_MA1 DDR_B_MA12
DDR_B_BS0 DDR_B_MA10
DDR_B_CAS#
DDR_B_WE#
DDR_B_MA4 DDR_B_MA0
5
C493
C493
0.1U_10V
0.1U_10V
12
C516
C516
0.1U_10V
0.1U_10V
12
C491
C491
C517
C517
0.1U_10V
0.1U_10V
0.1U_10V
0.1U_10V
12
12
DDR_B_BS1 7,15 DDR_B_RAS# 7,15
DDR_B_CAS# 7,15 DDR_B_WE# 7,15
DDR_B_BS2 7,15 DDR_CS2_DIMMB# 6,15 DDR_CS3_DIMMB# 6,15 DDR_CKE4_DIMMB 6,15 DDR_CKE3_DIMMB 6,15
C492
C492
C530
C530
0.1U_10V
0.1U_10V
0.1U_10V
0.1U_10V
M_ODT2 6,15
Please these resistor closely DIMMB,all trace length<750 mil.
DDR_B_BS0 7,15
M_ODT3 6,15
12
12
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
6
Date: Sheet
DDR2 RES. ARRAY
DDR2 RES. ARRAY
DDR2 RES. ARRAY
GM3 2B
GM3 2B
GM3 2B
7
of
of
of
16 62Monday, March 24, 2008
16 62Monday, March 24, 2008
16 62Monday, March 24, 2008
8
1
2
3
4
5
6
7
8
Add capacitor pads for improving WWAN.
Y2
Y2
21
14.318MHZ
14.318MHZ
10
10
CLK_ICH_48M CLK_ICH_14M CLK_PCI_8512 CLK_PCI_PCCARD CLK_PCI_ICH
CLK_XTAL_OUTCLK_XTAL_IN
C443
C443 33P
33P
1 2
50
50
SATA_CLKREQ# CLK_3GPLLREQ#
CLK_LPC_DEBUG CLK_PCI_PCCARD
CLK_PCI_ICH PCI_ICH CLK_ICH_48M
1 2
L55 BLM18SG260L55 BLM18SG260
CLK_ICH_14M
12
C459
C459
0.1U
0.1U
10
10
R359 2.2R359 2.2
1 2
R391 2.2R391 2.2
1 2
R358 2.2R358 2.2
1 2
R377 2.2R377 2.2
1 2
12
C476
C476
0.1U
0.1U
R365 475R365 475 R364 475/FR364 475/F
1 2
R363 22_NCR363 22_NC
1 2
R354 33R354 33 R353 33R353 33 R350 33R350 33 R375 33R375 33 R372 8.2KR372 8.2K
R374 8.2KR374 8.2K
R367 8.2KR367 8.2K R366 33R366 33
+CK_VDD_MAIN
12
C486
C486
0.1U
0.1U
10
10
+CK_VDD_PCI
+CK_VDD_PLL3
+CK_VDD_48
12
C448
C448
0.1U
0.1U
10
10
+CK_VDD_SRC
2
1 2
1 2
1 2
12
10
10
10
10
10
10
6.3
6.3
603
603
10
10
C462
C462
0.1U
0.1U
12
12
12
12
12 12 12 12
12
C446
C446
0.1U
0.1U
C447
C447
4.7U
4.7U
UMA without iAMT
C461
C461
0.1U
0.1U
C460
C460
0.1U
0.1U
12
C473
C473
0.1U
0.1U
10
10
+CK_VDD_PCI +CK_VDD_PLL3
+CK_VDD_48 +CK_VDD_SRC
+CK_VDD_MAIN
SATA_CLKREQ#_C CLK_3GPLLREQ#_C PCI_PCCARD PCI_SIOCLK_PCI_8512 27M_SEL
FSA FSB FSC
CLK_XTAL_OUT CLK_XTAL_IN
CLK_SDATA CLK_SCLK
12
C485
C485
0.1U
0.1U
10
10
3
U19
U19
9
VDD_PCI
4
VDD_REF
23
VDD_PLL3
16
VDD_48
46
VDD_SRC
62
VDD_CPU
19
VDD_IO
27
VDD_IO
33
VDD_IO
43
VDD_IO
52
VDD_IO
56
VDD_IO
15
GND
18
GND
22
GND
26
GND
30
GND
36
GND
49
GND
59
GND
1
GND
8
CR#_A/PCI-0
10
CR_B/PCI-1
11
TME/PCI-2
12
SRC5_EN/PCI-3
13
27M_SEL/PCI-4
14
ITP_EN/PCIF-5#
17
FSA/USB48
64
FSB/TEST_MODE
5
FSC/TEST_SEL/REF
55
RESET#
63
CK_PWRGD/PD#
2
XOUT
3
XIN
6
SDATA
7
SCLK
SLG8SP513V
SLG8SP513V
C487
C487 10U_NC
10U_NC
1 2
6.3
6.3
SMbus address D2
These are for backdrive issue.
CK505
CK505
QFN64
QFN64
SRC-8/CPU_ITP
SRC-8#/CPU_ITP#
SRC-0/DOT96
SRC-0#/DOT96#
SRC-1/SE1
SRC-1#/SE2
SRC-2/SATA
SRC-2#/SATA#
CR#_C/SRC-3
CR#_D/SRC-3#
PCI_STOP#/SRC-5
CPU_STOP#/SRC5-5#
CR#_F/SRC-7
CR#_E/SRC-7#
SRC-10#
CR#_H/SRC-11
CR#_G/SRC-11#
POP RESISTOR FOR UMA
DOT96_SSC DOT96_SSC#
27M_SS 27M_NSS
CPU_ITP CPU_ITP#
SMBDAT126,31,39
SMBCLK126,31,39
4 2
2 4
2 4
+3.3V_RUN
RP3
RP3
2
3 1
2N7002W-7-F
2N7002W-7-F
+3.3V_RUN
2
3 1
2N7002W-7-F
2N7002W-7-F
4
CPU-0
CPU-0#
CPU-1
CPU-1#
SRC-4
SRC-4#
SRC-6
SRC-6#
SRC-9
SRC-9# SRC-10
2.2KX2
2.2KX2
Q40
Q40
Q39
Q39
GND
3 1
1 3
1 3
CPU_BCLK
61
CPU_BCLK#
60
MCH_BCLK
58
MCH_BCLK#
57 54
53
20 21
24 25
28 29
31 32
34 35
45 44
48 47
51 50
37 38
41 42
40 39
65
RP6 0_UMARP6 0_UMA
CPU_ITP CPU_ITP#
DOT96_SSC DOT96_SSC#
27M_NSS 27M_SS
PCIE_SATA PCIE_SATA#
PCIE_MINI3 PCIE_MINI3#
MCH_3GPLL MCH_3GPLL#
PCIE_EXPCARD PCIE_EXPCARD#
MINI1CLK_REQ#_C MINI1CLK_REQ#
PCIE_MINI2 PCIE_MINI2#
PCIE_ICH PCIE_ICH#
PCIE_LOM PCIE_LOM#
to MCH DPLL_REF_CLK
13
R394 475/FR394 475/F R395 475/FR395 475/F
MCH_DREFCLK 6
MCH_DREFCLK# 6
4 2
4 2
4 2
2 4
2 4
2 4
2 4
2 4
4 2
1 2 1 2
2 4
2 4
4 2
3 1
3 1
3 1
1 3
1 3
1 3
1 3
1 3
3 1
RP21 0RP21 0
1 3
1 3
3 1
to MCH DPLL_REF_SSCLK
DREF_SSCLK# 6
RP14 0_UMARP14 0_UMA
RP15 0_NCRP15 0_NC
DREF_SSCLK 6
CLK_CPU_ITP 3 CLK_CPU_ITP# 3
POP for ITP use
Non-iAMT
2
4
1
3
CLK_SDATA
CLK_SCLK
5
+3.3V_RUN
27M_SEL
RP5 0RP5 0
RP7 0RP7 0
RP17 0RP17 0
RP4 0_DISRP4 0_DIS
RP8 0_DISRP8 0_DIS
RP16 0RP16 0
RP18 0RP18 0
RP20 0RP20 0
RP24 0RP24 0
CARD_CLK_REQ#CARD_CLK_REQ#_C
RP23 0RP23 0
RP22 0RP22 0
13
R351
R351 10K_DIS
10K_DIS
1 2
R342
R342 10K_UMA
10K_UMA
1 2
6
PCI_ICH
+3.3V_RUN
1 2
1 2
27M_SEL
27M_SEL (PIN13)
0=UMA 1 = Disc.
GRFX down
CLK_CPU_BCLK 3 CLK_CPU_BCLK# 3
CLK_MCH_BCLK 5 CLK_MCH_BCLK# 5
CLK_PCIE_MINI1 34 CLK_PCIE_MINI1# 34
CLK_PCIE_VGA 18 CLK_PCIE_VGA# 18
CLK_VGA_27M_NSS 19
CLK_VGA_27M_SS 19
CLK_PCIE_SATA 11 CLK_PCIE_SATA# 11
CLK_PCIE_MINI3 33 CLK_PCIE_MINI3# 33
CLK_MCH_3GPLL 6 CLK_MCH_3GPLL# 6
H_STP_PCI# 13 H_STP_CPU# 13
CLK_PCIE_EXPCARD 30 CLK_PCIE_EXPCARD# 30
MINI1CLK_REQ# 34 CARD_CLK_REQ# 30
CLK_PCIE_MINI2 33 CLK_PCIE_MINI2# 33
CLK_PCIE_ICH 12 CLK_PCIE_ICH# 12
CLK_PCIE_LOM 42 CLK_PCIE_LOM# 42
CLK_3GPLLREQ# SATA_CLKREQ# CARD_CLK_REQ# MINI1CLK_REQ# PCI_PCCARD
R339
R339 10K_NC
10K_NC
R340
R340 10K_NC
10K_NC
to ATI VGA
H_STP_PCI# H_STP_CPU#
R397 10KR397 10K R396 10KR396 10K
Silego need pull up but other?
R355 10KR355 10K R356 10KR356 10K R398 10KR398 10K R399 10KR399 10K
R343 10K_NCR343 10K_NC
PCI_SIO PCI_ICH
R352 10K_NCR352 10K_NC
1 2
R341 10K_NCR341 10K_NC
1 2
FSC FSB FSA CPU SRC PCI 1 0 0 0 00 1 1 1
1
100
10
133
1
1 1
0 1 1
166
0
200
0
266
0
333
0
400
1
RSVD
1 2
100 100 100 100 100 100 100 100
12 12 12 12
330 33 33 33 33 33 33 33
12 12
+3.3V_RUN
PIN20 PIN21 PIN24 PIN25
DOT96T
DOT96C
SRCT0 SRCC0
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
CLOCK GENERATOR
CLOCK GENERATOR
CLOCK GENERATOR
GM3 2B
GM3 2B
GM3 2B
7
96/ 100M_T
27Mout
96/ 100M_C
27MSSout
17 62Monday, March 24, 2008
17 62Monday, March 24, 2008
17 62Monday, March 24, 2008
8
of
of
of
+3.3V_RUN
C457 27P
C457 27P
1 2
C440 27P_NC
C440 27P_NC
1 2
C431 27P_NC
C431 27P_NC
1 2
50
50
C432 27P_NC
C432 27P_NC
1 2
50
50
C439 27P_NC
C439 27P_NC
1 2
50
50 50
50 50
50
A A
C437
C437 33P
33P
1 2
50
50
B B
CPU_MCH_BSEL03,6
14.318MHz
SATA_CLKREQ#13
CLK_3GPLLREQ#6
CLK_LPC_DEBUG33 CLK_PCI_PCCARD28
CLK_PCI_851231 CLK_PCI_ICH12 CLK_ICH_48M13
CPU_MCH_BSEL13,6 CPU_MCH_BSEL23,6
CLK_ICH_14M13 CLK_PWRGD13
CLK_LPC_DEBUG FOR DEBUG NEED POP RESISTOR
+3.3V_RUN
L58 BLM21PG600SN1D
L58 BLM21PG600SN1D
805
805
120 ohms@100Mhz
C C
L51
L51 BLM21PG600SN1D
BLM21PG600SN1D
805
805
120 ohms@100Mhz
D D
1
5
4
3
2
1
PCIE_MTX_GRX_P[0..15]6 PCIE_MTX_GRX_N[0..15]6
PCIE_MTX_GRX_P0 PCIE_MTX_GRX_N0
PCIE_MTX_GRX_P1 PCIE_MTX_GRX_N1
PCIE_MTX_GRX_P2
D D
C C
CLK_PCIE_VGA17 CLK_PCIE_VGA#17
PLTRST_DELAY#13
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_P3 PCIE_MTX_GRX_N3
PCIE_MTX_GRX_P4 PCIE_MTX_GRX_N4
PCIE_MTX_GRX_P5 PCIE_MTX_GRX_N5
PCIE_MTX_GRX_P6 PCIE_MTX_GRX_N6
PCIE_MTX_GRX_P7 PCIE_MTX_GRX_N7
PCIE_MTX_GRX_P8 PCIE_MTX_GRX_N8
PCIE_MTX_GRX_P9 PCIE_MTX_GRX_N9
PCIE_MTX_GRX_P10 PCIE_MTX_GRX_N10
PCIE_MTX_GRX_P11 PCIE_MTX_GRX_N11
PCIE_MTX_GRX_P12 PCIE_MTX_GRX_N12
PCIE_MTX_GRX_P13 PCIE_MTX_GRX_N13
PCIE_MTX_GRX_P14 PCIE_MTX_GRX_N14
PCIE_MTX_GRX_P15 PCIE_MTX_GRX_N15
R718 0_DIS
R718 0_DIS
402
402
AK33
AJ33
AJ35 AJ34
AH35 AH34
AG35 AG34
AF33 AE33
AE35 AE34
AD35 AD34
AC35 AC34
AB33 AA33
AA35 AA34
W35 W34
AJ31 AJ30
AK35 AK34
AM32
Y35 Y34
V33 U33
U35 U34
T35 T34
R35 R34
U43A
U43A
PCIE_RX0P PCIE_RX0N
PCIE_RX1P PCIE_RX1N
PCIE_RX2P PCIE_RX2N
PCIE_RX3P PCIE_RX3N
PCIE_RX4P PCIE_RX4N
PCIE_RX5P PCIE_RX5N
PCIE_RX6P PCIE_RX6N
PCIE_RX7P PCIE_RX7N
PCIE_RX8P PCIE_RX8N
PCIE_RX9P PCIE_RX9N
PCIE_RX10P PCIE_RX10N
PCIE_RX11P PCIE_RX11N
PCIE_RX12P PCIE_RX12N
PCIE_RX13P PCIE_RX13N
PCIE_RX14P PCIE_RX14N
PCIE_RX15P PCIE_RX15N
Clock
Clock
PCIE_REFCLKP PCIE_REFCLKN
SM Bus
SM Bus
NC_SMB_DATA NC_SMBCLK
PERSTB
M86-LP_DIS
M86-LP_DIS
PART 1 OF 7
PART 1 OF 7
P
P C
C I
I
-
­E
E X
X P
P R
R E
E S
S S
S
I
I N
N T
T E
E R
R F
F A
A C
C E
E
PCIE_TX0P PCIE_TX0N
PCIE_TX1P PCIE_TX1N
PCIE_TX2P PCIE_TX2N
PCIE_TX3P PCIE_TX3N
PCIE_TX4P PCIE_TX4N
PCIE_TX5P PCIE_TX5N
PCIE_TX6P PCIE_TX6N
PCIE_TX7P PCIE_TX7N
PCIE_TX8P PCIE_TX8N
PCIE_TX9P PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
Calibration
Calibration
PCIE_CALRN
PCIE_CALRP NC_DRAM_0
NC_DRAM_1
NC_AC_BATT
NC_FAN_TACH
AG31 AG30
AF31 AF30
AF28 AF27
AD31 AD30
AD28 AD27
AB31 AB30
AB28 AB27
AA31 AA30
AA28 AA27
W31 W30
W28 W27
V31 V30
V28 V27
U31 U30
U28 U27
R31 R30
AG26 AJ27 AF3
AG9 AK29 AK14
PCIE_MRX_GTX_C_P0 PCIE_MRX_GTX_C_N0
PCIE_MRX_GTX_C_P1 PCIE_MRX_GTX_C_N1
PCIE_MRX_GTX_C_P2 PCIE_MRX_GTX_C_N2
PCIE_MRX_GTX_C_P3 PCIE_MRX_GTX_C_N3
PCIE_MRX_GTX_C_P4 PCIE_MRX_GTX_C_N4
PCIE_MRX_GTX_C_P5 PCIE_MRX_GTX_C_N5
PCIE_MRX_GTX_C_P6 PCIE_MRX_GTX_C_N6
PCIE_MRX_GTX_C_P7 PCIE_MRX_GTX_C_N7
PCIE_MRX_GTX_C_P8 PCIE_MRX_GTX_C_N8
PCIE_MRX_GTX_C_P9 PCIE_MRX_GTX_C_N9
PCIE_MRX_GTX_C_P10 PCIE_MRX_GTX_C_N10
PCIE_MRX_GTX_C_P11 PCIE_MRX_GTX_C_N11
PCIE_MRX_GTX_C_P12 PCIE_MRX_GTX_C_N12
PCIE_MRX_GTX_C_P13 PCIE_MRX_GTX_C_N13
PCIE_MRX_GTX_C_P14 PCIE_MRX_GTX_C_N14
PCIE_MRX_GTX_C_P15 PCIE_MRX_GTX_C_N15
R131 2K/F_DIS
R131 2K/F_DIS
R126
R126
1.27K_DIS
1.27K_DIS
402
402
402
402
+PCIE_VDDC
PCIE_MRX_GTX_P[0..15]6 PCIE_MRX_GTX_N[0..15]6
PCIE_MRX_GTX_P0PCIE_MRX_GTX_P0 PCIE_MRX_GTX_P1 PCIE_MRX_GTX_P2PCIE_MRX_GTX_P2 PCIE_MRX_GTX_P3 PCIE_MRX_GTX_P4PCIE_MRX_GTX_P4 PCIE_MRX_GTX_P5 PCIE_MRX_GTX_P6PCIE_MRX_GTX_P6 PCIE_MRX_GTX_P7 PCIE_MRX_GTX_P8PCIE_MRX_GTX_P8 PCIE_MRX_GTX_P9 PCIE_MRX_GTX_P10PCIE_MRX_GTX_P10 PCIE_MRX_GTX_P11 PCIE_MRX_GTX_P12PCIE_MRX_GTX_P12 PCIE_MRX_GTX_P13 PCIE_MRX_GTX_P14PCIE_MRX_GTX_P14 PCIE_MRX_GTX_P15 PCIE_MRX_GTX_N0 PCIE_MRX_GTX_N1PCIE_MRX_GTX_N1 PCIE_MRX_GTX_N2 PCIE_MRX_GTX_N3PCIE_MRX_GTX_N3 PCIE_MRX_GTX_N4 PCIE_MRX_GTX_N5PCIE_MRX_GTX_N5 PCIE_MRX_GTX_N6 PCIE_MRX_GTX_N7PCIE_MRX_GTX_N7 PCIE_MRX_GTX_N8 PCIE_MRX_GTX_N9PCIE_MRX_GTX_N9 PCIE_MRX_GTX_N10 PCIE_MRX_GTX_N11PCIE_MRX_GTX_N11 PCIE_MRX_GTX_N12 PCIE_MRX_GTX_N13PCIE_MRX_GTX_N13 PCIE_MRX_GTX_N14 PCIE_MRX_GTX_N15
C213 0.1U_DIS10C213 0.1U_DIS10 C231 0.1U_DIS10C231 0.1U_DIS10 C233 0.1U_DIS10C233 0.1U_DIS10 C211 0.1U_DIS10C211 0.1U_DIS10 C230 0.1U_DIS10C230 0.1U_DIS10 C210 0.1U_DIS10C210 0.1U_DIS10 C208 0.1U_DIS10C208 0.1U_DIS10 C227 0.1U_DIS10C227 0.1U_DIS10 C206 0.1U_DIS10C206 0.1U_DIS10 C226 0.1U_DIS10C226 0.1U_DIS10 C224 0.1U_DIS10C224 0.1U_DIS10 C204 0.1U_DIS10C204 0.1U_DIS10 C220 0.1U_DIS10C220 0.1U_DIS10 C222 0.1U_DIS10C222 0.1U_DIS10 C200 0.1U_DIS10C200 0.1U_DIS10 C201 0.1U_DIS10C201 0.1U_DIS10 C214 0.1U_DIS10C214 0.1U_DIS10 C232 0.1U_DIS10C232 0.1U_DIS10 C234 0.1U_DIS10C234 0.1U_DIS10 C212 0.1U_DIS10C212 0.1U_DIS10 C229 0.1U_DIS10C229 0.1U_DIS10 C209 0.1U_DIS10C209 0.1U_DIS10 C207 0.1U_DIS10C207 0.1U_DIS10 C228 0.1U_DIS10C228 0.1U_DIS10 C205 0.1U_DIS10C205 0.1U_DIS10 C225 0.1U_DIS10C225 0.1U_DIS10 C223 0.1U_DIS10C223 0.1U_DIS10 C203 0.1U_DIS10C203 0.1U_DIS10 C219 0.1U_DIS10C219 0.1U_DIS10 C221 0.1U_DIS10C221 0.1U_DIS10 C199 0.1U_DIS10C199 0.1U_DIS10 C202 0.1U_DIS10C202 0.1U_DIS10
PCIE_MRX_GTX_C_P0 PCIE_MRX_GTX_C_P1 PCIE_MRX_GTX_C_P2 PCIE_MRX_GTX_C_P3 PCIE_MRX_GTX_C_P4 PCIE_MRX_GTX_C_P5 PCIE_MRX_GTX_C_P6 PCIE_MRX_GTX_C_P7 PCIE_MRX_GTX_C_P8 PCIE_MRX_GTX_C_P9 PCIE_MRX_GTX_C_P10 PCIE_MRX_GTX_C_P11 PCIE_MRX_GTX_C_P12 PCIE_MRX_GTX_C_P13 PCIE_MRX_GTX_C_P14 PCIE_MRX_GTX_C_P15 PCIE_MRX_GTX_C_N0 PCIE_MRX_GTX_C_N1 PCIE_MRX_GTX_C_N2 PCIE_MRX_GTX_C_N3 PCIE_MRX_GTX_C_N4 PCIE_MRX_GTX_C_N5 PCIE_MRX_GTX_C_N6 PCIE_MRX_GTX_C_N7 PCIE_MRX_GTX_C_N8 PCIE_MRX_GTX_C_N9 PCIE_MRX_GTX_C_N10 PCIE_MRX_GTX_C_N11 PCIE_MRX_GTX_C_N12 PCIE_MRX_GTX_C_N13 PCIE_MRX_GTX_C_N14 PCIE_MRX_GTX_C_N15
B B
A A
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
COMPUTER
VGA-M82-S (PCIe)
VGA-M82-S (PCIe)
VGA-M82-S (PCIe)
GM3 2B
GM3 2B
GM3 2B
1
18 62Monday, March 24, 2008
18 62Monday, March 24, 2008
18 62Monday, March 24, 2008
of
of
of
5
MEMORY APERTURE SIZE SELECT
MEMORY SIZE
128MB
256MB
64MB
512MB
D D
Memory Straps 400 MHz 256MB(16M*16) Hynix 400 MHz 256MB(16M*16) Qimonda 500 MHz 256MB(16M*16) Hynix 500 MHz 256MB(16M*16) Qimonda 500 MHz 256MB(16M*16) Samsung
+3.3V_DELAY
R644
R644 R648
R648 R659 10K_NCR659 10K_NC
R54
R54
+1.8V_RUN
R667
R667 R82
R82 R669
R669 R674
C C
B B
A A
R674
+3.3V_DELAY
CLK_VGA_27M_SS17
CLK_VGA_27M_NSS17
CFG2
CFG3
GPIO13 GPIO12 GPIO11
GPIO9
X
0
X
001
X
010
X
100
10K_DIS
10K_DIS
RAM_CFG0
10K_NC
10K_NC
RAM_CFG1 RAM_CFG2
10K_NC
10K_NC
RAM_CFG3
10K_DIS
10K_DIS
RAM_TYPE_CFG0
10K_NC
10K_NC
RAM_TYPE_CFG1
10K_DIS
10K_DIS
RAM_TYPE_CFG2
10K_DIS
10K_DIS
RAM_TYPE_CFG3
10K_DIS
10K_DIS
R651
R651
10K_DIS
10K_DIS
R661
R661
10K_NC
10K_NC
R650
R650
10K_NC
10K_NC
R662
R662
10K_NC
10K_NC
R645
R645
10K_NC
10K_NC
R660
R660
10K_NC
10K_NC
R646
R646
10K_NC
10K_NC
R649
R649
10K_NC
10K_NC
R58
R58
10K_DIS
10K_DIS
R148
R148
10K_DIS
10K_DIS
R61
R61
R666 10K_NCR666 10K_NC
1 2
GPIO_23_CLKREQB
DRIVES LOW
DURING RESET
GFX_CORE_CNTRL50
R119 10K_DISR119 10K_DIS
1 2
OSC_SPREAD22
R713 100/F_DISR713 100/F_DIS
OSC_OUT22
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6
HDMI_HD_EN
GPIO10
R714 120/F_DISR714 120/F_DIS
CLK_VGA_27M_NSS_R
12
50
50
CFG0
CFG1
00
RAM_
RAM_ TYPE_CFG3
11 1110 1
RAM_
TYPE_CFG2
TYPE_CFG1
1
1
01 0110
0111
VRAM SIZE
VRAM TYPE
ATI_VGAHSYNC GFX_CLKREQ#
TEMP_FAIL#
TEMP_FAIL#
12
Y3
21
27MHZ_NCY327MHZ_NC
R147 1M_NCR147 1M_NC
C797
C797 18P_NC
18P_NC
5
R643 0_NCR643 0_NC
1 2
R658 0_NCR658 0_NC
1 2
R709 0_DISR709 0_DIS
1 2
R706 0_NCR706 0_NC
1 2
R699 0_NCR699 0_NC
1 2
12
C778
C778 18P_NC
18P_NC
50
50
ATI_PANEL_BKEN31
R665 0_DISR665 0_DIS
1 2
R663 0_NCR663 0_NC
1 2
499R/F_DIS
499R/F_DIS
249R_DIS
249R_DIS
R719
R719
+1.8V_RUN
R99
R99
R95
R95
CLK_VGA_27M_SS_R
CLK_VGA_27M_SS_R
12
R652
R652
8/15: The strap on VIP[3] is for enabling HD Audio on M86.
RAM_ TYPE_CFG0
1
10K_NC
10K_NC
CLK_VGA_27M_SS_R
THERMAL_INT#22
TEMP_FAIL#20
PLACE VREF DIVIDER AND CAP CLOSE TO ASIC
C94
C94
100nF_DIS
100nF_DIS
R652
R652 10K_NC
10K_NC
+3.3V_DELAY
R664 0_DISR664 0_DIS
11
TEMP_FAIL#
BB_ENA20
4
10K_NC
10K_NC
R104
R104
10K_NC
10K_NC
R103
R103
10K_NC
10K_NC
R110
R110
10K_DIS
10K_DIS
R111
R111
10K_NC
10K_NC
R93
R93
10K_NC
10K_NC
R98
R98
10K_NC
10K_NC
R97
R97
10K_NC
10K_NC
R94
R94
10K_NC
10K_NC
R88
R88
10K_NC
10K_NC
R79
R79
10K_NC
10K_NC
R74
R74
RAM_TYPE_CFG0 RAM_TYPE_CFG1 RAM_TYPE_CFG2 RAM_TYPE_CFG3
ATI_PANEL_BKEN_R
1 2
R647 0_DISR647 0_DIS
GFX_CLKREQ#
R57
R57
1K_DIS
1K_DIS
+DPLL_PVDD
+PCIE_PVDD
XTAIN XTAOUT
+DPLL_VDDC
VGA_THERMDN22 VGA_THERMDP22
4
HDMI_HD_EN RAM_CFG3 GPIO10 RAM_CFG0 RAM_CFG1 RAM_CFG2
T95 PAD
T95 PAD
T4 PADT4T4 PAD
T5 PADT5T5 PAD
T8 PADT8T8 PAD T6 PADT6T6 PAD T9 PADT9T9 PAD T12 PAD
T12 PAD T11 PAD
T11 PAD T7 PADT7T7 PAD T10 PAD
T10 PAD T96 PAD
T96 PAD T97 PAD
T97 PAD T99 PAD
T99 PAD T98 PAD
T98 PAD
+MPVDD
VIP_0 VIP_1 VIP_2 VIP_3 VIP_4 VIP_5 VIP_6 VIP_7
VHAD0
PSYNC DVALID
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6
T95
T95
T4
T5
T8 T6 T9 T12
T12 T11
T11 T7 T10
T10 T96
T96 T97
T97 T99
T99 T98
T98
U43B
U43B
AM12
VIP_0
AL12
VIP_1
AJ12
VIP_2
AH12
VIP_3
AM10
VIP_4
AL10
VIP_5
AJ10
VIP_6
AH10
VIP_7
AM9
VHAD_0
AL9
VHAD_1
AJ9
VPHCTL
AL7
VPCLK0
AK7
VIPCLK
AM7
PSYNC
AJ7
DVALID
AK6
SDA
AM6
SCL
AN8
DVPCNTL__MVP_0
AP8
DVPCNTL__MVP_1
AG1
DVPCNTL_0
AH3
DVPCNTL_1
AH2
DVPCNTL_2
AH1
DVPCLK
AJ3
DVPDATA_0
AJ2
DVPDATA_1
AJ1
DVPDATA_2
AK2
DVPDATA_3
AK1
DVPDATA_4
AL3
DVPDATA_5
AL2
DVPDATA_6
AL1
DVPDATA_7
AM3
DVPDATA_8
AM2
DVPDATA_9
AN2
DVPDATA_10
AP3
DVPDATA_11
AR3
DVPDATA_12
AN4
DVPDATA_13
AR4
DVPDATA_14
AP4
DVPDATA_15
AN5
DVPDATA_16
AR5
DVPDATA_17
AP5
DVPDATA_18
AP6
DVPDATA_19
AR6
DVPDATA_20
AN7
DVPDATA_21
AP7
DVPDATA_22
AR7
DVPDATA_23
AG2
GPIO_0
AF2
GPIO_1
AF1
GPIO_2
AE3
GPIO_3
AE2
GPIO_4
AE1
GPIO_5
AD3
GPIO_6
AD2
GPIO_7_BLON
AD1
GPIO_8_ROMSO
AD5
GPIO_9_ROMSI
AD4
GPIO_10_ROMSCK
AC3
GPIO_11
AC2
GPIO_12
AC1
GPIO_13
AB3
GPIO_14_HPD2
AB2
GPIO_15_PWRCNTL_0
AB1
GPIO_16_SSIN
AF5
GPIO_17_THERMAL_INT
AF4
GPIO_18_HPD3
AG4
GPIO_19_CTF
AG3
GPIO_20_PWRCNTL_1
AD9
GPIO_21_BBEN
AD8
GPIO_22_ROMCSB
AD7
GPIO_23_CLKREQB
AB4
GPIO_24_JMODE
AB6
GPIO_25_TDI
AB7
GPIO_26_TCK
AB9
GPIO_27_TMS
AA9
GPIO_28_TDO
AF8
GEN_A
AF7
GEN_B
AG5
GEN_C
AP9
GEN_D_HPD4
AR9
GEN_E
AP13
GEN_F
AR13
GEN_G
AD12
VREFG
AR20
DPLL_PVDD
AP20
DPLL_PVSS
AM35
PCIE_PVDD
A14
MPVDD
B15
MPVSS
AR33
XTALIN
AP33
XTALOUT
AG19
DPLL_VDDC
AG21
TS_FDO
AK4
DMINUS
AM4
DPLUS
M86-LP_DIS
M86-LP_DIS
VIP / I2C
VIP / I2C
MULTI_GFX
MULTI_GFX EXTERNAL
EXTERNAL TMDS
TMDS
GENERAL
GENERAL PURPOSE
PURPOSE I/O
I/O
PLL
PLL CLOCKS
CLOCKS
THERMAL
THERMAL
PART 2 OF 7
PART 2 OF 7
INTEGRATED
INTEGRATED TMDS/DP
TMDS/DP
DAC1
DAC1
DAC2
DAC2
DDC
DDC DP AUX
DP AUX
DDC3DATA_DP3_AUXN
DDC3CLK_DP3_AUXP
DDC4DATA_DP4_AUXN
DDC4CLK_DP4_AUXP
TXCAM_DPA0P TXCAP_DPA0N
TX0M_DPA1P TX0P_DPA1N
TX1M_DPA2P TX1P_DPA2N
TX2M_DPA3P TX2P_DPA3N
TXCBM_DPB0P TXCBP_DPB0N
TX3M_DPB1P TX3P_DPB1N
TX4M_DPB2P TX4P_DPB2N
TX5M_DPB3P TX5P_DPB3N
DPA_PVDD DPA_PVSS
DPB_PVDD DPB_PVSS
DPB_VDDR_1 DPB_VDDR_2 DPA_VDDR_3 DPA_VDDR_4
DPB_VSSR_1 DPB_VSSR_2 DPB_VSSR_3 DPB_VSSR_4 DPB_VSSR_6 DPA_VSSR_5 DPA_VSSR_7 DPA_VSSR_8 DPA_VSSR_9
DPA_VSSR_10
DP_CALR NC_TPVDDC NC_TPVSSC
HPD1
HSYNC VSYNC
RSET AVDD
AVSSQ
VDD1DI VSS1DI
COMP
V2SYNC
H2SYNC
A2VDD
A2VDDQ
A2VSSQ
VDD2DI VSS2DI
R2SET
DDC1DATA
DDC1CLK
DDC2DATA
DDC2CLK
3
AN9 AN10
AR10 AP10
AR11 AP11
AR12 AP12
AR14 AP14
AR15 AP15
AR16 AP16
AR17 AP17
AM14 AL14
AH17 AG17
AN19 AN20 AP19 AR19
AN18 AP18 AR18 AN16 AN17 AN15 AN11 AN12 AN13 AN14
AG15 AH18 AG18 AG6
AR31
R
AP31
RB
AR30
G
AP30
GB
AR29
B
AP29
BB
AN29 AN30
AN31 AR32 AP32 AR28
AP28 AM19
R2
AL19
R2B
AM18
G2
AL18
G2B
AM17
B2
AL17
B2B
AK19
C
AK18
Y
AK17 AL15
AM15 AM21 AL21 AK21 AH22
AG22 AJ21 AM29
AL29 AJ15
AH15 AJ5
AJ4 AH14
AG14
3
+TPVDD
+DPB_VDDR +DPA_VDDR
150/F_DISR112 150/F_DISR112
PLACE OR RESISTORS CLOSE TO ASIC
R166
R166
R205 715/F_DISR205 715/F_DIS
R701 0_DISR701 0_DIS
R700 0_DISR700 0_DIS
R694 0_DISR694 0_DIS
12
499/F_DIS
499/F_DIS
+AVDD
+VDD1DI
12
12
12
12
ATI_VGAHSYNC
+A2VDD +A2VDDQ
+VDD2DI
ATI_LCD_DDCDAT 26 ATI_LCD_DDCCLK 26
ATI_HDMI_SDA 25 ATI_HDMI_SCL 25
ATI_CRT_DAT_DDC 27 ATI_CRT_CLK_DDC 27
ATI_HDMI_CLK- 25 ATI_HDMI_CLK+ 25
ATI_HDMI_TX0-_R 25 ATI_HDMI_TX0+_R 25
ATI_HDMI_TX1-_R 25 ATI_HDMI_TX1+_R 25
ATI_HDMI_TX2-_R 25 ATI_HDMI_TX2+_R 25
ATI_VGAHSYNC 27 ATI_VGAVSYNC 27
ATI_VGA_RED
ATI_VGA_GRN
ATI_VGA_BLU
LVDS
HDMI
CRT
2
HDMI CONN
ATI_VGA_RED 27
ATI_VGA_GRN 27
ATI_VGA_BLU 27
R695
R695
ATI_LCD_DDCDAT ATI_LCD_DDCCLK
2
ATI_VGA_BLU ATI_VGA_GRN ATI_VGA_RED
R698
R698
R696
R696
150/F_DIS
R695
R695 150/F_DIS
150/F_DIS
150/F_DIS
150/F_DIS
150/F_DIS
R698
R698
R696
R696
R141 2.2K_DISR141 2.2K_DIS R165 2.2K_DISR165 2.2K_DIS
1
+3.3V_DELAY
R135
R135 10K_DIS
10K_DIS
MMST3904-7-F_DIS
MMST3904-7-F_DIS
1 3
12 12
R90
R90 10K_DIS
10K_DIS
Q83
Q83
2
Q82
Q82
2
MMST3904-7-F_DIS
MMST3904-7-F_DIS
1 3
R85
R85 10K_DIS
10K_DIS
DIS only
Layout Note: Place 150 ohm termination resistors close to ATI CHIP.
+3.3V_DELAY
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
COMPUTER
VGA-G86GLM (VIDEO)
VGA-G86GLM (VIDEO)
VGA-G86GLM (VIDEO)
GM3 2B
GM3 2B
GM3 2B
1
ATI_HDMI_DET 25
19 62Monday, March 24, 2008
19 62Monday, March 24, 2008
19 62Monday, March 24, 2008
of
of
of
5
U43E
U43E
Part 6 of 7
PCIE_VSS_1 PCIE_VSS_2 PCIE_VSS_3 PCIE_VSS_4 PCIE_VSS_5 PCIE_VSS_6 PCIE_VSS_7 PCIE_VSS_8 PCIE_VSS_9 PCIE_VSS_10 PCIE_VSS_11 PCIE_VSS_12 PCIE_VSS_13 PCIE_VSS_14 PCIE_VSS_15 PCIE_VSS_16 PCIE_VSS_17 PCIE_VSS_18 PCIE_VSS_19 PCIE_VSS_20 PCIE_VSS_21 PCIE_VSS_22 PCIE_VSS_23 PCIE_VSS_24 PCIE_VSS_25 PCIE_VSS_26 PCIE_VSS_27 PCIE_VSS_28 PCIE_VSS_29 PCIE_VSS_30 PCIE_VSS_31 PCIE_VSS_32 PCIE_VSS_33 PCIE_VSS_34 PCIE_VSS_35 PCIE_VSS_36 PCIE_VSS_37 PCIE_VSS_38 PCIE_VSS_39 PCIE_VSS_40 PCIE_VSS_41 PCIE_VSS_42 PCIE_VSS_43
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65
U43
U43
TEMP_FAIL#19
RUN_ON26,44,48,49,53
Part 6 of 7
CORE GND
CORE GND
5
P6
VSS_66
M9
VSS_67
M26
VSS_68
K28
VSS_69
M32
VSS_70
N14
VSS_71
N17
VSS_72
N19
VSS_73
N22
VSS_74
N33
VSS_75
N3
VSS_76
R5
PCI-Express GND
PCI-Express GND
VSS_77
U8
VSS_78
P13
VSS_79
P15
VSS_80
P18
VSS_81
P21
VSS_82
P23
VSS_83
P26
VSS_84
P29
VSS_85
P30
VSS_86
R1
VSS_87
U5
VSS_88
P9
VSS_89
R10
VSS_90
R14
VSS_91
R17
VSS_92
R19
VSS_93
R22
VSS_94
V3
VSS_95
AK9
VSS_96
U10
VSS_97
U15
VSS_98
U18
VSS_99
U21
VSS_100
U23
VSS_101
V7
VSS_102
W8
VSS_103
V10
VSS_104
V14
VSS_105
V17
VSS_106
V19
VSS_107
V22
VSS_108
V1
VSS_109
AK12
VSS_110
V9
VSS_111
W10
VSS_112
W15
VSS_113
W18
VSS_114
W21
VSS_115
W23
VSS_116
AA6
VSS_117
AA10
VSS_118
AA14
VSS_119
AA17
VSS_120
AA19
VSS_121
AA22
VSS_122
AB8
VSS_123
AB10
VSS_124
AB13
VSS_125
AB15
VSS_126
AB18
VSS_127
AB21
VSS_128
AB23
VSS_129
AC14
VSS_130
AC17
VSS_131
AC19
VSS_132
AC22
VSS_133
AF9
VSS_134
AD6
VSS_135
AB5
VSS_136
AD24
VSS_137
W5
VSS_138
AF6
VSS_139
AF14
VSS_140
AF21
VSS_141
AF22
VSS_142
AK10
VSS_143
AF17
VSS_144
AF18
VSS_145
AF19
VSS_146
AA3
VSS_147
AG12
VSS_148
AJ14
VSS_149
AH21
VSS_150
D4
VSS_151
AF15
VSS_152
AG10
VSS_153
AN6
VSS_154
AK15
VSS_155
AJ17
VSS_156
AJ18
VSS_157
AJ19
VSS_158
AF24
VSS_159
AN32
VSS_160
AK3
VSS_161
AN3
VSS_162
AR8
VSS_163
AM1
VSS_164
AK30
VSS_165
V11
VSS_166
A35
MECH_1
AR1
MECH_2
AR35
MECH_3
M86-LP_DIS
M86-LP_DIS
31
Q18
Q18
2
2N7002W-7-F_NC
2N7002W-7-F_NC
R105 0_DISR105 0_DIS
+1.8V_RUN
+3.3V_DELAY
+1.8V_RUN
+3.3V_SUS +3.3V_SUS
12
R102
R102 100K_NC
100K_NC
53
1 2
C100
C100
0.1U_DIS
0.1U_DIS
25
25 603
603
C725
C725 10uF_DIS
10uF_DIS
C168
C168 1U_DIS
1U_DIS
C113
C113 1uF_DIS
1uF_DIS
C50
C50 1uF_DIS
1uF_DIS
C151
C151
10uF_DIS
10uF_DIS
C153
C153
10uF_DIS
10uF_DIS
C98
C98
1uF_DIS
1uF_DIS
4
U8
U8 74AHCT1G08GW_NC
74AHCT1G08GW_NC
R120 0_DISR120 0_DIS
C724
C724 10uF_DIS
10uF_DIS
C122
C122 1uF_DIS
1uF_DIS
C152
C152 1uF_DIS
1uF_DIS
C63
C63 1uF_DIS
1uF_DIS
C165
C165
100nF_DIS
100nF_DIS
C162
C162
1uF_DIS
1uF_DIS
+BBP
P33 P34 P35 R27 R28 R29 R32 R33 U29 U32 V29 V32
T33
AG27 AG29 AG32 AG33
AH33
AK32
W29 W32 W33 AA29 AA32 AB29 AB32
AB34 AB35 AC33 AD29 AD32 AF29 AF32 AD33 AF34 AF35
AJ29 AJ32
AL34 AL35
V34 V35
Y33
A2
A34
C3 C5
A4 C18 A21 C23 C11 C13 C14 A18 A11 C26 C33
F35
R7 G10
F15 H17 G21 D29 A29
G1 F14 J15
E19 E22 E24
D7
G9 F26
G29 D33
M5
G4
E10 E12
F17
G18 G22
F30 J35 J18
H19
J21
F7 J12 J24 J26
K30
J32 F33
K6
K9 K14 K15 K17 K18 K19 K21 K22 M28
K3
L33
D D
C C
B B
A A
C97
C97
1uF_DIS
1uF_DIS
C89
C89
1uF_DIS
1uF_DIS
C107
C107
1uF_DIS
1uF_DIS
4
C706
C706 10uF_DIS
10uF_DIS
C180
C180 1uF_DIS
1uF_DIS
C133
C133 1uF_DIS
1uF_DIS
C52
C52 1uF_DIS
1uF_DIS
C102
C102
1uF_DIS
1uF_DIS
+VDD_MEM_CLK0 +VDD_MEM_CLK1
+VDD_MEM_CLK2 +VDD_MEM_CLK3
GFX_RUN_ON 50
4
C215
C215 10uF_DIS
10uF_DIS
C103
C103 1uF_DIS
1uF_DIS
C147
C147 1uF_DIS
1uF_DIS
C90
C90 1uF_DIS
1uF_DIS
+VDD_CT
( 3.3V @ 50MA VDDR3)
C114
C114
1uF_DIS
1uF_DIS
C106
C106
1uF_DIS
1uF_DIS
R123 75K/F_DIS
R123 75K/F_DIS
OPTIONAL RC NETWORK TO FINE TUNE POWER SEQUENCING
U43D
U43D
D1
VDDR1_1
A8
VDDR1_2
A12
VDDR1_3
A16
VDDR1_4
A20
VDDR1_5
A24
VDDR1_6
A28
VDDR1_7
B1
VDDR1_8
H1
VDDR1_9
H35
VDDR1_10
L18
VDDR1_11
L19
VDDR1_12
L21
VDDR1_13
L22
VDDR1_14
M10
VDDR1_15
M35
VDDR1_16
P10
VDDR1_17
T1
VDDR1_18
Y1
VDDR1_19
B35
VDDR1_20
M1
VDDR1_21
D35
VDDR1_22
K10
VDDR1_23
K12
VDDR1_24
K24
VDDR1_25
K26
VDDR1_26
L14
VDDR1_27
L15
VDDR1_28
L17
VDDR1_29
AA11
VDD_CT_1
AB11
VDD_CT_2
AD10
VDD_CT_3
AF10
VDD_CT_4
R11
VDD_CT_5
R25
VDD_CT_6
U11
VDD_CT_7
U25
VDD_CT_8
AE14
VDDR3_1
AE15
VDDR3_2
AF12
VDDR3_3
AE17
VDDR3_4
AP2
VDDR4_1
AR2
VDDR4_2
AN1
VDDR5_1
AP1
VDDR5_2
A25
VDDRHA_1
A32
VDDRHA_2
B25 B32
B2 L1
C2
L2
W13
AA13
U13 V13
+3.3V_DELAY +3.3V_RUN
C160
C160
R123
R123
0.1U_DIS
0.1U_DIS
10
10
C160
C160
VSSRHA_1 VSSRHA_2
VDDRHB_1 VDDRHB_2
VSSRHB_1 VSSRHB_2
BBN_1 BBN_2
BBP_1 BBP_2
M86-LP_DIS
M86-LP_DIS
U43
U43
Clock
Clock
Bias
Bias
Q20
Q20 SI2303BDS-T1-E3_DIS
SI2303BDS-T1-E3_DIS
3
Q20
Q20
2
Q19
Q19
PART 5 OF 7
PART 5 OF 7
Memory I/O
Memory I/O
P
P O
O
I/O Internal
I/O Internal
W
W E
E R
R
Memory I/O
Memory I/O
Back
Back
BB_ENA19
1
12
2
R125
R125 100K_DIS
100K_DIS
R125
R125
31
Q19
Q19 2N7002W-7-F_DIS
2N7002W-7-F_DIS
PCIE_VDDR_1 PCIE_VDDR_2 PCIE_VDDR_3 PCIE_VDDR_4 PCIE_VDDR_5 PCIE_VDDR_6 PCIE_VDDR_7 PCIE_VDDR_8
PCIE_VDDC_1 PCIE_VDDC_2 PCIE_VDDC_3 PCIE_VDDC_4 PCIE_VDDC_5 PCIE_VDDC_6 PCIE_VDDC_7 PCIE_VDDC_8
PCIE_VDDC_9 PCIE_VDDC_10 PCIE_VDDC_11
PCI-Express
PCI-Express
PCIE_VDDC_12
VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8
VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16
Core
Core
VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22 VDDC_23 VDDC_24 VDDC_25 VDDC_26 VDDC_27 VDDC_28 VDDC_29 VDDC_30 VDDC_31 VDDC_32 VDDC_33 VDDC_34 VDDC_35 VDDC_36 VDDC_37 VDDC_38 VDDC_39 VDDC_40 VDDC_41 VDDC_42 VDDC_43 VDDC_44
VDDCI_1 VDDCI_2 VDDCI_3 VDDCI_4
+BBP
AR34 AL33 AM33 AN33 AN34 AN35 AP34 AP35
R26 U26 V25 V26 W25 W26 AA25 AD26 AF26 AA26 AB25 AB26
N13 N15 N18 N21 N23 P14 P17 P19 P22 V18 V21 V23 W14 W17 W19 W22 AA15 AA18 AA21 AA23 AB14 AB17 AB19 AB22 AC13 AC15 AC18 AC21 AC23 AE18 AE22 AE19 AE21 R13 R15 R18 R21 R23 U14 U17 U19 U22 V15 W11
M12 M24 P11 P25
3
12
C42
C42 1U_DIS
1U_DIS
603
603
10
10
C42
C42
R45
R45 10K_DIS
10K_DIS
R45
R45
3
Q9
Q9 SI2303BDS-T1-E3_DIS
SI2303BDS-T1-E3_DIS
2
Q9
Q9
31
Q10
Q10
2
2N7002W-7-F_DIS
2N7002W-7-F_DIS
Q10
Q10
3
+PCIE_VDDR
+PCIE_VDDC
C721
C721
10uF_DIS
10uF_DIS
C68
C68
10uF_DIS
10uF_DIS
C694
C694
10uF_DIS
10uF_DIS
C722
C722
10uF_DIS
10uF_DIS
C67
C67
10uF_DIS
10uF_DIS
1
C235
C235
10uF_DIS
10uF_DIS
+1.8V_RUN
C104
C104
1uF_DIS
1uF_DIS
C161
C161
1uF_DIS
1uF_DIS
C157
C157
1uF_DIS
1uF_DIS
C130
C130
1uF_DIS
1uF_DIS
C159
C159
1uF_DIS
1uF_DIS
C93
C93
1uF_DIS
1uF_DIS
3 1
C146
C146
C135
C135
1uF_DIS
1uF_DIS
1uF_DIS
1uF_DIS
C105
C105
C108
C108
1uF_DIS
1uF_DIS
1uF_DIS
1uF_DIS
C156
C156
C155
C155
1uF_DIS
1uF_DIS
1uF_DIS
1uF_DIS
C131
C131
C129
C129
1uF_DIS
1uF_DIS
1uF_DIS
1uF_DIS
C134
C134
C145
C145
1uF_DIS
1uF_DIS
1uF_DIS
1uF_DIS
C171
C171
1uF_DIS
1uF_DIS
+VCC_GFX_CORE
Q8
Q8 2N7002W-7-F_DIS
2N7002W-7-F_DIS
2
Q8
Q8
R49 100K_DIS
R49 100K_DIS
R49
R49
C170
C170
1uF_DIS
1uF_DIS
12
C154
C154
1uF_DIS
1uF_DIS
C158
C158
1uF_DIS
1uF_DIS
C132
C132
1uF_DIS
1uF_DIS
C111
C111
1uF_DIS
1uF_DIS
C126
C126
1uF_DIS
1uF_DIS
+VCC_GFX_CORE
L8
L8
BLM15AG121SN1D_DIS
BLM15AG121SN1D_DIS
+5V_RUN
2
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
Title
Title
Title
VGA-G86GLM (VIDEO)
VGA-G86GLM (VIDEO)
VGA-G86GLM (VIDEO)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
GM3 2B
GM3 2B
GM3 2B
Date: Sheet
Date: Sheet
Date: Sheet
2
20 62Monday, March 24, 2008
20 62Monday, March 24, 2008
20 62Monday, March 24, 2008
1
of
of
of
1
5
4
3
2
1
+LVDDR
R129
R129
R129
R129
0_DIS
0_DIS
C163
C163
C763
C763
100nF_DIS
100nF_DIS
100nF_DIS
100nF_DIS
100nF_DIS
100nF_DIS
100nF_DIS
100nF_DIS
100nF_DIS
100nF_DIS
1uF_DISC184 1uF_DISC184
1 2
+LVDDC
+LPVDD
+DPLL_PVDD
+PCIE_PVDD
+1.8V_RUN
BLM18PG471SN1D_DIS
BLM18PG471SN1D_DIS
L12
L12
D D
+1.8V_RUN
+1.8V_RUN
+1.8V_RUN
BLM15BD121SN1D_DIS
BLM15BD121SN1D_DIS
C C
+1.8V_RUN
+1.8V_RUN
L11
L11
BLM15BD121SN1D_DIS
BLM15BD121SN1D_DIS
L11
L11
BLM15BD121SN1D_DIS
BLM15BD121SN1D_DIS
L69
L69
L21
L21
BLM15BD121SN1D_DIS
BLM15BD121SN1D_DIS
L71
L71
BLM15BD121SN1D_DIS
BLM15BD121SN1D_DIS
L74
L74
C752
C752
C244
C244
C775
C775
C183
C183
C166
C166
C765
C765
10uF_DIS
10uF_DIS
C753
C753
10uF_DIS
10uF_DIS
10uF_DIS
10uF_DIS
10uF_DIS
10uF_DIS
C185
C185
C164
C164
10uF_DIS
10uF_DIS
C248
C248
C764
C764
10uF_DIS
10uF_DIS
C776
C776
1uF_DIS
1uF_DIS
1uF_DIS
1uF_DIS
C186
C186
100nF_DIS
100nF_DIS
1uF_DIS
1uF_DIS
C754
C754
C257
C257
1uF_DIS
1uF_DIS
100nF_DIS
100nF_DIS
LVDS
(1.8V @ 400MA LVDDC,LVDDR)
(1.8V @ 30MA LPVDD)
PLL_CLK
(1.8V @ 40MA DPLL_PVDD)
(1.8V @ 40MA PCIE_PVDD)
(1.8V @ 2MA A2VDDQ)
+A2VDDQ
DAC(CRT)
+VDD1DI
( 1.8V @ 100MA VDD1DI)
+VDD2DI
+1.1V_GFX_PCIE
+1.1V_GFX_PCIE
+1.1V_GFX_PCIE
+VCC_GFX_CORE
BLM15BD121SN1D_DIS
BLM15BD121SN1D_DIS
L68
L68
BLM15BD121SN1D_DIS
BLM15BD121SN1D_DIS
BLM18PG121SN1D_DIS
BLM18PG121SN1D_DIS
BLM15BD121SN1D_DIS
BLM15BD121SN1D_DIS
+3.3V_DELAY
L10
L10
L18
L18
L9
L9
BLM18PG471SN1D_DIS
BLM18PG471SN1D_DIS
L67
L67
BLM15BD121SN1D_DIS
BLM15BD121SN1D_DIS
L73
L73
C245
C245
10uF_DIS
10uF_DIS
C176
C176
1uF_DIS
1uF_DIS
C125
C125
10uF_DIS
10uF_DIS
C743
C743
10uF_DIS
10uF_DIS
C150
C150
10uF_DIS
10uF_DIS
C101
C101
10uF_DIS
10uF_DIS
C174
C174
1uF_DIS
1uF_DIS
C175
C175
1uF_DIS
1uF_DIS
C123
C123
1uF_DIS
1uF_DIS
10uF_DIS
10uF_DIS
C745
C745
100nF_DIS
100nF_DIS
C110
C110
1uF_DIS
1uF_DIS
C771
C771
C149
C149
100nF_DIS
100nF_DIS
C177
C177
100nF_DIS
100nF_DIS
C178
C178
1uF_DIS
1uF_DIS
C124
C124
100nF_DIS
100nF_DIS
1uF_DIS
1uF_DIS
C744
C744
C148
C148
1uF_DIS
1uF_DIS
+PCIE_VDDC
+DPLL_VDDC
C109
C109
100nF_DIS
100nF_DIS
C769
C769
100nF_DIS
100nF_DIS
+DPA_VDDR
+DPB_VDDR
(PCIE_VDDC 1.1V @ 1A )
(DPLL_VDDC 1.1V @ 100 MA)
+MPVDD
( .95V-1.1V @ 345MA MPVDD)
+A2VDD
C770
C770
1uF_DIS
1uF_DIS
( 1.1V @ 200MA EACH SINGLE LINK)
( 1.1V @ 200MA EACH SINGLE LINK)
(3.3V @ 135MA A2VDD)
TMDS
+1.8V_RUN
BLM15BD121SN1D_DIS
BLM15BD121SN1D_DIS
L14
L14
+1.8V_RUN
BLM15BD121SN1D_DIS
BLM15BD121SN1D_DIS
L65
L65
B B
+1.8V_RUN
BLM15BD121SN1D_DIS
BLM15BD121SN1D_DIS
L22
L22
+1.8V_RUN
BLM18PG471SN1D_DIS
BLM18PG471SN1D_DIS
L75
L75
C741
C741
C810
C810
C187
C187
10uF_DIS
10uF_DIS
10uF_DIS
10uF_DIS
10uF_DIS
10uF_DIS
C260
C260
10uF_DIS
10uF_DIS
C193
C193
100nF_DIS
100nF_DIS
C739
C739
100nF_DIS
100nF_DIS
C95
C95
100nF_DIS
100nF_DIS
C800
C800
1uF_DIS
1uF_DIS
C192
C192
1uF_DIS
1uF_DIS
C738
C738
1uF_DIS
1uF_DIS
1uF_DIS
1uF_DIS
C173
C173
C798
C798
100nF_DIS
100nF_DIS
+VDD_CT
+PCIE_VDDR
+AVDD
(1.8V @ 65MA AVDD)
+TPVDD
(1.8V @ 20 MA SINGLE LINK 1X4DP and 40mA for Dual-Link 2X4DP)
(VDD_CT 1.8V @ 110MA (VDD_CT)
(1.8V @ 400MA PCIE_VDDR)
PLACE ALL DECOUPLING AS CLOSE TO ASIC AS POSSIBLE
MEM IO CLK
+1.8V_RUN
BLM15BD121SN1D_DIS
BLM15BD121SN1D_DIS
L79
L79
+1.8V_RUN
BLM15BD121SN1D_DIS
BLM15BD121SN1D_DIS
L78
A A
+1.8V_RUN
+1.8V_RUN
L78
BLM15BD121SN1D_DIS
BLM15BD121SN1D_DIS
L63
L63
BLM15BD121SN1D_DIS
BLM15BD121SN1D_DIS
L6
L6
C181
C181
10uF_DIS
10uF_DIS
C811
C811
10uF_DIS
10uF_DIS
C717
C717
10uF_DIS
10uF_DIS
C65
C65
10uF_DIS
10uF_DIS
5
C808
C808
C718
C718
C72
C72
C179
C179
1uF_DIS
1uF_DIS
1uF_DIS
1uF_DIS
1uF_DIS
1uF_DIS
1uF_DIS
1uF_DIS
C182
C182
100nF_DIS
100nF_DIS
C809
C809
100nF_DIS
100nF_DIS
C719
C719
100nF_DIS
100nF_DIS
C66
C66
100nF_DIS
100nF_DIS
+VDD_MEM_CLK0
+VDD_MEM_CLK1
+VDD_MEM_CLK2
+VDD_MEM_CLK3
(1.8V @ MA VDDRHA_1 INCLUDED IN VDDR1)
(1.8V @ MA VDDRHA_2 INCLUDED IN VDDR1)
(1.8V @ MA VDDRHB_1 INCLUDED IN VDDR1)
(1.8V @ MA VDDRHB_2 INCLUDED IN VDDR1)
4
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
3
2
Date: Sheet
COMPUTER
VGA-G86GLM (VIDEO)
VGA-G86GLM (VIDEO)
VGA-G86GLM (VIDEO)
GM3 2B
GM3 2B
GM3 2B
1
21 62Monday, March 24, 2008
21 62Monday, March 24, 2008
21 62Monday, March 24, 2008
of
of
of
5
ODTA023
ODTA123
RASA0#23
RASA1#23
CASA0#23
CASA1#23
WEA0#23
WEA1#23
CKEA023
D D
C C
B B
CKEA123
CSA0_0#23
CSA1_0#23
CLKA023
CLKA0#23
CLKA123
CLKA1#23
QSA#[7..0]23 QSA[7..0]23 DQMA#[7..0]23
MDA[63..0]23 MAA[11..0]23
A_BA023
A_BA123 A_A1223
SMBCLK231,37
SMBDAT231,37
ODTA0 ODTA1
RASA0# RASA1#
CASA0# CASA1#
WEA0# WEA1#
CKEA0 CKEA1
CSA0_0# CSA1_0#
CLKA0 CLKA0#
CLKA1
CLKA1# QSA#[7..0] QSA[7..0] DQMA#[7..0] MDA[63..0] MAA[11..0]
A_BA0
A_BA1
A_A12
PLACE MVREF DIVIDERS AND CAPS CLOSE TO ASIC
+3.3V_DELAY
2N7002W-7-F_DIS
2N7002W-7-F_DIS
2
3 1
2N7002W-7-F_DIS
2N7002W-7-F_DIS
+1.8V_RUN
R193
R193
100/F_DIS
100/F_DIS
C242
+1.8V_RUN +1.8V_RUN
R740
R740
100/F_DIS
100/F_DIS
R741
R741
100R/F_DIS
100R/F_DIS
2
Q6
Q6
3 1
Q7
Q7
THERMAL_INT#19
R194
R194
100R/F_DIS
100R/F_DIS
C815
C815
100nF_DIS
100nF_DIS
MB_THERM# THERMAL_INT#
C242
100nF_DIS
100nF_DIS
MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 QSA#6 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63
+3.3V_DELAY
12
R35
R35
4.7K_DIS
4.7K_DIS
THERMAL_INT#
R44 10K_DISR44 10K_DIS R43 10K_DISR43 10K_DIS
12 12
4
U43C
U43C
Part 3 of 7
Part 3 of 7
DQA_0 DQA_1 DQA_2 DQA_3 DQA_4 DQA_5 DQA_6 DQA_7 DQA_8 DQA_9 DQA_10 DQA_11 DQA_12 DQA_13 DQA_14 DQA_15 DQA_16 DQA_17 DQA_18 DQA_19 DQA_20 DQA_21 DQA_22 DQA_23 DQA_24 DQA_25 DQA_26 DQA_27 DQA_28 DQA_29 DQA_30 DQA_31 DQA_32 DQA_33 DQA_34 DQA_35 DQA_36 DQA_37 DQA_38 DQA_39 DQA_40 DQA_41 DQA_42 DQA_43 DQA_44 DQA_45 DQA_46 DQA_47 DQA_48 DQA_49 DQA_50 DQA_51 DQA_52 DQA_53 DQA_54 DQA_55 DQA_56 DQA_57 DQA_58 DQA_59 DQA_60 DQA_61 DQA_62 DQA_63
MVREFDA MVREFSA
NC_1
M86-LP_DIS
M86-LP_DIS
U43
U43
THERMAL MONITOR
R39
R39
4.7K_DIS
4.7K_DIS
U1
U1
8
SCLK
7
SDATA
6
ALERT#
5
GND
ADM1032ARM_DIS
ADM1032ARM_DIS
+3.3V_DELAY
AM34
P27 P28 P31 P32 M27 K29 K31 K32 M33 M34 L34 L35 J33 J34 H33 H34 K27 J29 J30 J31 F29 F32 D30 D32 G33 G34 G35 F34 D34 C34 C35 B34 C24 B24 B23 A23 C21 B21 C20 B20 J22 H22 F22 D21 J19 G19 F19 D19 C19 B19 A19 B18 C16 B16 C15 A15 H18 F18 E18 D18 J17 G15 E15 D15
N35 N34
12
MAA_0 MAA_1 MAA_2 MAA_3 MAA_4 MAA_5 MAA_6 MAA_7 MAA_8
MAA_9 MAA_10 MAA_11
MAA_A12 MAA_BA2 MAA_BA0 MAA_BA1
DQMAb_0 DQMAb_1 DQMAb_2 DQMAb_3 DQMAb_4 DQMAb_5 DQMAb_6 DQMAb_7
MEMORY INTERFACE A
MEMORY INTERFACE A
QSA_0 QSA_1 QSA_2 QSA_3 QSA_4 QSA_5 QSA_6 QSA_7
QSA_0B QSA_1B QSA_2B QSA_3B QSA_4B QSA_5B QSA_6B QSA_7B
write strobe read strobe
write strobe read strobe
ODTA0 ODTA1
CLKA0 CLKA1
CLKA0b CLKA1b
RASA0b RASA1b
CASA0b CASA1b
CSA0b_0 CSA0b_1
CSA1b_0 CSA1b_1
CKEA0 CKEA1
WEA0b WEA1b
MAA1
B28
MAA2
B27
MAA3
G26
MAA4
F27
MAA5
E27
MAA6
D27
MAA7
J27
MAA8
E29
MAA9
C30
MAA10
E26
MAA11
A27
A_A12
G27 D26
A_BA0
C28
A_BA1
B29 M29
K33 G30 E33 C22 H21 C17 G17
QSA0
M30
QSA1
K34
QSA2
G31
QSA3
E34
QSA4
B22
QSA5
F21
QSA6
B17
QSA7
D17
QSA#0
M31
QSA#1
K35
QSA#2
G32
QSA#3
E35
QSA#4
A22
QSA#5
E21 A17
QSA#7
E17 C31
C25 A33
A26 B33
B26 A31
D24 C32
H26 A30
B30 G24
H24 B31
F24 C29
D22
MAA0
C27
NC for 16M x16 DDR2
+3.3V_DELAY
1
VDD
2
D+
3
D-
MB_THERM#
4
THERM#
12
C34
C34
0.1U_DIS
0.1U_DIS
10
10
C34
C34
DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7
ODTA0 ODTA1
CLKA0 CLKA1
CLKA0# CLKA1#
RASA0# RASA1#
CASA0# CASA1#
CSA0_0#
CSA1_0#
CKEA0 CKEA1
WEA0# WEA1#
NC for 16M x16 DDR2
VGA_THERMDP 19
12
C39
C39 2200P_DIS
2200P_DIS
50
50
C39
C39
VGA_THERMDN 19
QSB#[7..0]24 QSB[7..0]24 DQMB#[7..0]24
MAB[11..0]24
R96
R96
100R_DIS
100R_DIS
100R_DIS
100R_DIS
R107
R107
3
ODTB024 ODTB124
RASB0#24 RASB1#24
CASB0#24 CASB1#24
WEB0#24 WEB1#24
CKEB024 CKEB124
CSB0_0#24 CSB1_0#24
CLKB024 CLKB0#24
CLKB124 CLKB1#24
MDB[63..0]24
B_BA024 B_BA124
B_A1224
PLACE MVREF DIVIDERS AND CAPS CLOSE TO ASIC
100nF_DIS
100nF_DIS
C99
C99
+1.8V_RUN
R672
R672
100R_DIS
100R_DIS
R675
R675
C735
C735
100R_DIS
100R_DIS
100nF_DIS
100nF_DIS
ODTB0 ODTB1
RASB0# RASB1#
CASB0# CASB1#
WEB0# WEB1#
CKEB0 CKEB1
CSB0_0# CSB1_0#
CLKB0 CLKB0#
CLKB1
CLKB1# QSB#[7..0] QSB[7..0] DQMB#[7..0]
MDB[63..0]
MAB[11..0]
B_BA0
B_BA1
B_A12
R69
R69
4.7K_DIS
4.7K_DIS
R68
R68
4.7K_DIS
4.7K_DIS
1K_DIS R1461K_DIS R146
R67
R67
240R_DIS
240R_DIS
2
U43G
U43G
Part 4 of 7
MDB0
H15
MDB1
G14
MDB2
E14
MDB3
D14
MDB4
H12
MDB5
G12
MDB6
F12
MDB7
D10
MDB8
B13
MDB9
C12
MDB10
B12
MDB11
B11
MDB12
C9
MDB13
B9
MDB14
A9
MDB15
B8
MDB16
J10
MDB17
H10
MDB18
F10
MDB19
D9
MDB20
G7
MDB21
G6
MDB22
F6
MDB23
D6
MDB24
C8
MDB25
C7
MDB26
B7
MDB27
A7
MDB28
B5
MDB29
A5
MDB30
C4
MDB31
B4
MDB32
M3
MDB33
M2
MDB34
N2
MDB35
N1
MDB36
R3
MDB37
R2
MDB38
T3
MDB39
T2
MDB40
M8
MDB41
M7
MDB42
P5
MDB43
P4
MDB44
R9
MDB45
R8
MDB46
R6
MDB47
U4
MDB48
U3
MDB49
U2
MDB50
U1
MDB51
V2
MDB52
Y3
MDB53
Y2
MDB54
AA2
MDB55
AA1
MDB56
U9
MDB57
U7
MDB58
U6
MDB59
V4
MDB60
W9
MDB61
W7
MDB62
W6
MDB63
W4
B14 A13
AM30
AA8 AA7 AA5
AH19
Spread Spectrum
If U7070, the discrete spread spectrum chip is not used, then pop R8328 in order to pull-down BXTALOUT for EMI reasons.
OSC_OUT19
OSC_SPREAD19
Part 4 of 7
DQB_0 DQB_1 DQB_2 DQB_3 DQB_4 DQB_5 DQB_6 DQB_7 DQB_8 DQB_9 DQB_10 DQB_11 DQB_12 DQB_13 DQB_14 DQB_15 DQB_16 DQB_17 DQB_18 DQB_19 DQB_20 DQB_21 DQB_22 DQB_23 DQB_24 DQB_25 DQB_26 DQB_27 DQB_28 DQB_29 DQB_30 DQB_31 DQB_32 DQB_33 DQB_34 DQB_35 DQB_36 DQB_37 DQB_38 DQB_39 DQB_40 DQB_41 DQB_42 DQB_43 DQB_44 DQB_45 DQB_46 DQB_47 DQB_48 DQB_49 DQB_50 DQB_51 DQB_52 DQB_53 DQB_54 DQB_55 DQB_56 DQB_57 DQB_58 DQB_59 DQB_60 DQB_61 DQB_62 DQB_63
MVREFDB MVREFSB
TESTEN TEST_MCLK TEST_YCLK MEMTEST PLLTEST
M86-LP_DIS
M86-LP_DIS
R115 10K_NCR115 10K_NC
R114 0_NCR114 0_NC
1 2
H2
MAB_0
H3
MAB_1
J3
MAB_2
J5
MAB_3
J4
MAB_4
J6
MAB_5
G5
MAB_6
J9
MAB_7
F3
MAB_8
F4
MAB_9
J1
MAB_10
J2
MAB_11
J7
MAB_A12
F1
MAB_BA2
G2
MAB_BA0
G3
MAB_BA1
D12
DQMBb_0
C10
DQMBb_1
E7
DQMBb_2
C6
DQMBb_3
P3
DQMBb_4
R4
DQMBb_5
W3
DQMBb_6
V8
DQMBb_7
MEMORY INTERFACE B
MEMORY INTERFACE B
1 2 3 4
QSB_0 QSB_1 QSB_2 QSB_3 QSB_4 QSB_5 QSB_6 QSB_7
QSB_0B QSB_1B QSB_2B QSB_3B QSB_4B QSB_5B QSB_6B QSB_7B
write strobe read strobe
write strobe read strobe
ODTB0 ODTB1
CLKB0 CLKB1
CLKB0b CLKB1b
RASB0b RASB1b
CASB0b CASB1b
CSB0b_0 CSB0b_1
CSB1b_0 CSB1b_1
CKEB0 CKEB1
WEB0b WEB1b
DRAM_RST
+1.8V_RUN
U6
U6
XIN/CLKIN VSS SO SSCLK
P1819GF-08SR_NC
P1819GF-08SR_NC
XOUT
REFCLK
J14 B10 F9 B6 P2 P8 W2 V6
H14 A10 E9 A6 P1 P7 W1 V5
D2 K5
A3 K1
B3 K2
D3 K7
C1 K4
E1 E2
L3 M4
E3 K8
F2 M6
AA4
VDD
PD#
R72
R72 10K_NC
10K_NC
8 7 6 5
MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 B_A12
B_BA0 B_BA1
DQMB#0 DQMB#1 DQMB#2 DQMB#3 DQMB#4 DQMB#5 DQMB#6 DQMB#7
QSB0 QSB1 QSB2 QSB3 QSB4 QSB5 QSB6 QSB7
QSB#0 QSB#1 QSB#2 QSB#3 QSB#4 QSB#5 QSB#6 QSB#7
ODTB0 ODTB1
CLKB0 CLKB1
CLKB0# CLKB1#
RASB0# RASB1#
CASB0# CASB1#
CSB0_0#
CSB1_0#
CKEB0 CKEB1
WEB0# WEB1#
4.7K_DISR56 4.7K_DISR56
+3.3V_RUN
S0
1
NC for 16M x16 DDR2
NC for 16M x16 DDR2
R73
R73 10K_NC
10K_NC
+3VL
L7
L7
BLM18AG121SN1D_NC
BLM18AG121SN1D_NC
C76
12
C73
C73 10U_NC
10U_NC
805
805 10
10
12
C76
0.1U_NC
0.1U_NC
10
10
+3.3V_RUN
-1.75% (DOWN)10
0.85% (CENTER)
A A
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
COMPUTER
VGA-M82-S (PCIe)
VGA-M82-S (PCIe)
VGA-M82-S (PCIe)
GM3 2B
GM3 2B
GM3 2B
1
22 62Monday, March 24, 2008
22 62Monday, March 24, 2008
22 62Monday, March 24, 2008
of
of
of
5
MDA[63..0]22 MAA[11..0]22
QSA#[7..0]22
DQMA#[7..0]22 QSA[7..0]22
A_BA[1..0]22
D D
C C
A_A1222 A_A1222
RASA1#22 CASA1#22 WEA1#22 CSA1_0#22 CKEA122 ODTA122
CLKA122 CLKA1#22
B B
+1.8V_RUN
C749
C749
0.1U_DIS
0.1U_DIS
MDA[63..0]
MAA[11..0]
QSA#[7..0]
DQMA#[7..0]
QSA[7..0]
A_BA[1..0]
RASA0#22 CASA0#22 WEA0#22 CSA0_0#22 CKEA022 ODTA022
+1.8V_RUN
C61
C61
0.1U_DIS
0.1U_DIS
MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11
A_BA0 A_BA1
DQMA#4 DQMA#5
RASA1# CASA1# WEA1# CSA1_0# CKEA1 ODTA1
CLKA1 CLKA1#
C715
C715
0.1U_DIS
0.1U_DIS
1 2
1 2
10
10
10
10
MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11
A_A1222
A_BA0 A_BA1
DQMA#2 DQMA#0
RASA0# CASA0# WEA0# CSA0_0# CKEA0 ODTA0
CLKA0
CLKA022
CLKA0#
CLKA0#22
C172
C172
0.1U_DIS
0.1U_DIS
1 2
1 2
10
10
10
10
U41U41
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10
P7
A11
R2
A12
L2
BA0
L3
BA1
B3
UDM
F3
LDM
K7
RAS
L7
CAS
K3
WE
L8
CS
K2
CKE
K9
ODT
J8
CLK
K8
CLK#
J1
VDDL
J7
VSSDL
A3
VSS_0
E3
VSS_1
J3
VSS_2
N1
VSS_3
P9
VSS_4
A7
VSSQ_0
B2
VSSQ_1
B8
VSSQ_2
D2
VSSQ_3
D8
VSSQ_4
E7
VSSQ_5
F2
VSSQ_6
F8
VSSQ_7
H2
VSSQ_8
H8
VSSQ_9
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
UDQS
UDQS#
LDQS
LDQS#
VREF
VDD_0 VDD_1 VDD_2 VDD_3 VDD_4
VDDQ_0 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9
U10U10
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10
P7
A11
R2
A12
L2
BA0
L3
BA1
B3
UDM
F3
LDM
K7
RAS
L7
CAS
K3
WE
L8
CS
K2
CKE
K9
ODT
J8
CLK
K8
CLK#
J1
VDDL
J7
VSSDL
A3
VSS_0
E3
VSS_1
J3
VSS_2
N1
VSS_3
P9
VSS_4
A7
VSSQ_0
B2
VSSQ_1
B8
VSSQ_2
D2
VSSQ_3
D8
VSSQ_4
E7
VSSQ_5
F2
VSSQ_6
F8
VSSQ_7
H2
VSSQ_8
H8
VSSQ_9
MDA45
G8
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9
NC1 NC2 NC3 NC4 NC5 NC6
MDA42
G2
MDA46
H7
MDA47
H3
MDA40
H1
MDA41
H9
MDA43
F1
MDA44
F9
MDA37
C8
MDA34
C2 D7 D3
MDA33
D1
MDA38 MDA57
D9
MDA35
B1
MDA36
B9
QSA4
B7
QSA#4
A8
QSA5
F7
QSA#5
E8 A2
E2 L1 R3 R7 R8
VREF_A2
J2
A1 E1 J9 M9 R1
A9 C1 C3 C7 C9 E9 G1
6.3
6.3
G3 G7 G9
603
603
10
10
G8
DQ0
G2
DQ1
H7
DQ2
H3
DQ3
H1
DQ4
H9
DQ5
F1
DQ6
F9
DQ7
C8
DQ8
C2
DQ9
D7
DQ10
D3
DQ11
D1
DQ12
D9
DQ13
B1
DQ14
B9
DQ15
B7
UDQS
A8
UDQS#
F7
LDQS
E8
LDQS#
A2
NC1
E2
NC2
L1
NC3
R3
NC4
R7
NC5
R8
NC6
J2
VREF
A1
VDD_0
E1
VDD_1
J9
VDD_2
M9
VDD_3
R1
VDD_4
A9
VDDQ_0
C1
VDDQ_1
C3
VDDQ_2
C7
VDDQ_3
C9
VDDQ_4
E9
VDDQ_5
G1
VDDQ_6
G3
VDDQ_7
G7
VDDQ_8
G9
VDDQ_9
+1.8V_RUN +1.8V_RUN
R642
R642 499/F_DIS
499/F_DIS
1 2
+1.8V_RUN
C709
C709 10U_DIS
10U_DIS
1 2
12
C711
C711
0.1U_DIS
0.1U_DIS
C716
C716
0.1U_DIS
0.1U_DIS
1 2
10
10
C86
C86 10U_DIS
10U_DIS
1 2
6.3
6.3
603
603
12
C747
C747
0.1U_DIS
0.1U_DIS
10
10
MDA7 MDA1 MDA6 MDA5 MDA0 MDA3 MDA4 MDA2 MDA21 MDA22 MDA19 MDA20 MDA17 MDA18 MDA16 MDA23
QSA2
QSA#2
QSA0
QSA#0
VREF_A0
6.3
6.3
603
603
10
10
12
10
10
603
603
12
10
10
+1.8V_RUN
C216
C216 10U_DIS
10U_DIS
1 2
12
C120
C120
0.1U_DIS
0.1U_DIS
1 2
C708
C708 1U_DIS
1U_DIS
C750
C750
0.1U_DIS
0.1U_DIS
4
+1.8V_RUN
6.3
6.3
603
603
10
10
+1.8V_RUN
R641
R641 499/F_DIS
499/F_DIS
25
25
12
10
10
1 2
1 2
10
10
C218
C218 10U_DIS
10U_DIS
1 2
12
C784
C784
0.1U_DIS
0.1U_DIS
C748
C748
0.01U_DIS
0.01U_DIS
C714
C714
0.1U_DIS
0.1U_DIS
GDDR2 16MX16 MEMORY
Hynix: AKD5JG-TW09 Samsung: AKD5JG-T507
CLKA0 CLKA0#
R163
R163 56_DIS
56_DIS
1 2
R133
R133 499/F_DIS
499/F_DIS
C169
C169
0.1U_DIS
0.1U_DIS
RASA1#22 CASA1#22 WEA1#22 CSA1_0#22 CKEA122 ODTA122
CLKA122 CLKA1#22
C118
C118
0.1U_DIS
0.1U_DIS
R128
R128 499/F_DIS
499/F_DIS
1 2
12
C217
C217
C195
C195
1U_DIS
1U_DIS
0.01U_DIS
0.01U_DIS
10
10
25
25
603
603
12
12
C121
C121
C198
C198
0.1U_DIS
0.1U_DIS
0.1U_DIS
0.1U_DIS
10
10
10
10
MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11
A_BA0 A_BA1
DQMA#7 DQMA#6
RASA1# CASA1# WEA1# CSA1_0# CKEA1 ODTA1
CLKA1 CLKA1#
C62
C62
0.1U_DIS
0.1U_DIS
1 2
1 2
10
10
10
10
50
50
U5U5
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10
P7
A11
R2
A12
L2
BA0
L3
BA1
B3
UDM
F3
LDM
K7
RAS
L7
CAS
K3
WE
L8
CS
K2
CKE
K9
ODT
J8
CLK
K8
CLK#
J1
VDDL
J7
VSSDL
A3
VSS_0
E3
VSS_1
J3
VSS_2
N1
VSS_3
P9
VSS_4
A7
VSSQ_0
B2
VSSQ_1
B8
VSSQ_2
D2
VSSQ_3
D8
VSSQ_4
E7
VSSQ_5
F2
VSSQ_6
F8
VSSQ_7
H2
VSSQ_8
H8
VSSQ_9
12
C197
C197 470P_DIS
470P_DIS
1 2
R164
R164 56_DIS
56_DIS
VDDQ_0 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
UDQS
UDQS#
LDQS
LDQS#
VREF
VDD_0 VDD_1 VDD_2 VDD_3 VDD_4
3
MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11
A_A1222
A_BA0 A_BA1
DQMA#1 DQMA#3
CLKA022 CLKA0#22
C58
C58 10U_DIS
10U_DIS
C117
C117
0.1U_DIS
0.1U_DIS
RASA0# CASA0# WEA0# CSA0_0# CKEA0 ODTA0
CLKA0 CLKA0#
C167
C167
0.1U_DIS
0.1U_DIS
1 2
10
10
10
10
1 2
1 2
10
10
C57
C57 10U_DIS
10U_DIS
1 2
6.3
6.3
603
603
12
C59
C59
0.1U_DIS
0.1U_DIS
10
10
RASA0#22 CASA0#22 WEA0#22 CSA0_0#22 CKEA022 ODTA022
+1.8V_RUN
C785
C785
0.1U_DIS
0.1U_DIS
MDA50
G8
DQ0
MDA53
G2
DQ1
MDA51
H7
DQ2
MDA55
H3
DQ3
MDA52
H1
DQ4
MDA49
H9
DQ5
MDA54
F1
DQ6
MDA48
F9
DQ7
MDA58
C8
DQ8
MDA60
C2
DQ9
MDA56MDA39
D7
MDA62MDA32
D3
MDA61
D1 D9
MDA63
B1
MDA59
B9
QSA7
B7
QSA#7
A8
QSA6
F7
QSA#6
E8 A2
NC1
E2
NC2
L1
NC3
R3
NC4
R7
NC5
R8
NC6
VREF_A3
J2
A1
+1.8V_RUN E1 J9 M9 R1
A9 C1 C3 C7 C9
1 2 E9 G1
6.3
6.3
G3 G7 G9
603
603
12
10
10
1 2
R55
R55 499/F_DIS
499/F_DIS
C55
C55
0.1U_DIS
0.1U_DIS
12
10
10
603
603
12
10
10
C56
C56 1U_DIS
1U_DIS
C119
C119
0.1U_DIS
0.1U_DIS
M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2
L2 L3
B3
F3
K7
L7
K3
L8 K2 K9
J8 K8
J1
J7 A3
E3
J3 N1 P9
A7 B2 B8 D2 D8 E7
F2
F8 H2 H8
1 2
U44U44
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12
BA0 BA1
UDM LDM
RAS CAS WE CS CKE ODT
CLK CLK#
VDDL VSSDL VSS_0
VSS_1 VSS_2 VSS_3 VSS_4
VSSQ_0 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9
CLKA1 CLKA1#
R50
R50 499/F_DIS
499/F_DIS
25
25
12
10
10
C60
C60
0.01U_DIS
0.01U_DIS
C116
C116
0.1U_DIS
0.1U_DIS
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
UDQS
UDQS#
LDQS
LDQS#
VREF
VDD_0 VDD_1 VDD_2 VDD_3 VDD_4
VDDQ_0 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9
1 2
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9
NC1 NC2 NC3 NC4 NC5 NC6
R51
R51 56_DIS
56_DIS
50
50
12
G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9
B7 A8
F7 E8
A2 E2 L1 R3 R7 R8
J2
A1 E1 J9 M9 R1
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
1 2
C53
C53 470P_DIS
470P_DIS
R52
R52 56_DIS
56_DIS
QSA1
QSA#1
QSA3
QSA#3
6.3
6.3
603
603
10
10
MDA30 MDA25 MDA28 MDA27 MDA24 MDA31 MDA26 MDA29 MDA12 MDA10 MDA15 MDA8 MDA9 MDA14 MDA11 MDA13
VREF_A1
+1.8V_RUN
C788
C788 10U_DIS
10U_DIS
1 2
12
C115
C115
0.1U_DIS
0.1U_DIS
2
+1.8V_RUN
10
10
C787
C787 10U_DIS
10U_DIS
1 2
6.3
6.3
603
603
12
C774
C774
0.1U_DIS
0.1U_DIS
10
10
1 2
1 2
R705
R705 499/F_DIS
499/F_DIS
C789
C789
0.1U_DIS
0.1U_DIS
1
R715
R715 499/F_DIS
499/F_DIS
1 2
12
C786
C786
C783
C783
1U_DIS
1U_DIS
0.01U_DIS
0.01U_DIS
10
10
25
25
603
603
12
12
C772
C772
C773
C773
0.1U_DIS
0.1U_DIS
0.1U_DIS
0.1U_DIS
10
10
10
10
A A
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
COMPUTER
VGA-M82-S (VRAM)
VGA-M82-S (VRAM)
VGA-M82-S (VRAM)
GM3 2B
GM3 2B
GM3 2B
1
23 62Monday, March 24, 2008
23 62Monday, March 24, 2008
23 62Monday, March 24, 2008
of
of
of
5
MDB[63..0]22 MAB[11..0]22
QSB#[7..0]22
DQMB#[7..0]22 QSB[7..0]22
B_BA[1..0]22
D D
C C
B_A1222 B_A1222
RASB1#22 CASB1#22 WEB1#22 CSB1_0#22 CKEB122 ODTB122
CLKB122 CLKB1#22
B B
+1.8V_RUN
C685
C685
0.1U_DIS
0.1U_DIS
MDB[63..0]
MAB[11..0]
QSB#[7..0]
DQMB#[7..0]
QSB[7..0]
B_BA[1..0]
RASB0#22 CASB0#22 WEB0#22 CSB0_0#22 CKEB022 ODTB022
+1.8V_RUN
C75
C75
0.1U_DIS
0.1U_DIS
MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11
B_BA0 B_BA1
DQMB#4 DQMB#5
RASB1# CASB1# WEB1# CSB1_0# CKEB1 ODTB1
CLKB1 CLKB1#
C683
C683
0.1U_DIS
0.1U_DIS
1 2
1 2
10
10
10
10
MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11
B_A1222
B_BA0 B_BA1
DQMB#2 DQMB#0
RASB0# CASB0# WEB0# CSB0_0# CKEB0 ODTB0
CLKB0
CLKB022
CLKB0#
CLKB0#22
C710
C710
0.1U_DIS
0.1U_DIS
1 2
1 2
10
10
10
10
U38U38
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10
P7
A11
R2
A12
L2
BA0
L3
BA1
B3
UDM
F3
LDM
K7
RAS
L7
CAS
K3
WE
L8
CS
K2
CKE
K9
ODT
J8
CLK
K8
CLK#
J1
VDDL
J7
VSSDL
A3
VSS_0
E3
VSS_1
J3
VSS_2
N1
VSS_3
P9
VSS_4
A7
VSSQ_0
B2
VSSQ_1
B8
VSSQ_2
D2
VSSQ_3
D8
VSSQ_4
E7
VSSQ_5
F2
VSSQ_6
F8
VSSQ_7
H2
VSSQ_8
H8
VSSQ_9
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
UDQS
UDQS#
LDQS
LDQS#
VREF
VDD_0 VDD_1 VDD_2 VDD_3 VDD_4
VDDQ_0 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9
U2U2
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10
P7
A11
R2
A12
L2
BA0
L3
BA1
B3
UDM
F3
LDM
K7
RAS
L7
CAS
K3
WE
L8
CS
K2
CKE
K9
ODT
J8
CLK
K8
CLK#
J1
VDDL
J7
VSSDL
A3
VSS_0
E3
VSS_1
J3
VSS_2
N1
VSS_3
P9
VSS_4
A7
VSSQ_0
B2
VSSQ_1
B8
VSSQ_2
D2
VSSQ_3
D8
VSSQ_4
E7
VSSQ_5
F2
VSSQ_6
F8
VSSQ_7
H2
VSSQ_8
H8
VSSQ_9
MDB46
G8
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9
NC1 NC2 NC3 NC4 NC5 NC6
MDB43
G2
MDB47
H7
MDB42
H3
MDB41
H1
MDB44
H9
MDB40
F1
MDB45
F9
MDB37
C8
MDB34
C2
MDB39
D7
MDB33
D3
MDB32
D1
MDB38
D9
MDB35
B1
MDB36
B9
QSB4
B7
QSB#4
A8
QSB5
F7
QSB#5
E8 A2
E2 L1 R3 R7 R8
VREF_B2
J2
A1 E1 J9 M9 R1
A9 C1 C3 C7 C9 E9 G1
6.3
6.3
G3 G7 G9
603
603
10
10
G8
DQ0
G2
DQ1
H7
DQ2
H3
DQ3
H1
DQ4
H9
DQ5
F1
DQ6
F9
DQ7
C8
DQ8
C2
DQ9
D7
DQ10
D3
DQ11
D1
DQ12
D9
DQ13
B1
DQ14
B9
DQ15
B7
UDQS
A8
UDQS#
F7
LDQS
E8
LDQS#
A2
NC1
E2
NC2
L1
NC3
R3
NC4
R7
NC5
R8
NC6
J2
VREF
A1
VDD_0
E1
VDD_1
J9
VDD_2
M9
VDD_3
R1
VDD_4
A9
VDDQ_0
C1
VDDQ_1
C3
VDDQ_2
C7
VDDQ_3
C9
VDDQ_4
E9
VDDQ_5
G1
VDDQ_6
G3
VDDQ_7
G7
VDDQ_8
G9
VDDQ_9
+1.8V_RUN +1.8V_RUN
R637
R637 499/F_DIS
499/F_DIS
1 2
+1.8V_RUN
C690
C690 10U_DIS
10U_DIS
1 2
12
C705
C705
0.1U_DIS
0.1U_DIS
C692
C692
0.1U_DIS
0.1U_DIS
1 2
10
10
C688
C688 10U_DIS
10U_DIS
1 2
6.3
6.3
603
603
12
C697
C697
0.1U_DIS
0.1U_DIS
10
10
MDB2 MDB6 MDB3 MDB7 MDB4 MDB0 MDB5 MDB1 MDB17 MDB23 MDB18 MDB20 MDB21 MDB19 MDB22 MDB16
QSB2
QSB#2
QSB0
QSB#0
VREF_B0
6.3
6.3
603
603
10
10
12
10
10
603
603
12
10
10
+1.8V_RUN
C27
C27 10U_DIS
10U_DIS
1 2
12
C712
C712
0.1U_DIS
0.1U_DIS
1 2
C698
C698 1U_DIS
1U_DIS
C703
C703
0.1U_DIS
0.1U_DIS
4
+1.8V_RUN
6.3
6.3
603
603
10
10
+1.8V_RUN
R636
R636 499/F_DIS
499/F_DIS
25
25
12
10
10
1 2
1 2
10
10
C37
C37 10U_DIS
10U_DIS
1 2
12
C45
C45
0.1U_DIS
0.1U_DIS
C695
C695
0.01U_DIS
0.01U_DIS
C702
C702
0.1U_DIS
0.1U_DIS
GDDR2 16MX16 MEMORY
Hynix: AKD5JG-TW09 Samsung: AKD5JG-T507
CLKB0 CLKB0#
R34
R34 56_DIS
56_DIS
1 2
R31
R31 499/F_DIS
499/F_DIS
C680
C680
0.1U_DIS
0.1U_DIS
RASB1#22 CASB1#22 WEB1#22 CSB1_0#22 CKEB122 ODTB122
CLKB122 CLKB1#22
C44
C44
0.1U_DIS
0.1U_DIS
R627
R627 499/F_DIS
499/F_DIS
1 2
12
C23
C23
C40
C40
0.01U_DIS
0.01U_DIS
1U_DIS
1U_DIS
25
25
10
10
603
603
12
12
C64
C64
C20
C20
0.1U_DIS
0.1U_DIS
0.1U_DIS
0.1U_DIS
10
10
10
10
MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11
B_BA0 B_BA1
DQMB#6 DQMB#7
RASB1# CASB1# WEB1# CSB1_0# CKEB1 ODTB1
CLKB1 CLKB1#
C48
C48
0.1U_DIS
0.1U_DIS
1 2
1 2
10
10
10
10
50
50
U3U3
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10
P7
A11
R2
A12
L2
BA0
L3
BA1
B3
UDM
F3
LDM
K7
RAS
L7
CAS
K3
WE
L8
CS
K2
CKE
K9
ODT
J8
CLK
K8
CLK#
J1
VDDL
J7
VSSDL
A3
VSS_0
E3
VSS_1
J3
VSS_2
N1
VSS_3
P9
VSS_4
A7
VSSQ_0
B2
VSSQ_1
B8
VSSQ_2
D2
VSSQ_3
D8
VSSQ_4
E7
VSSQ_5
F2
VSSQ_6
F8
VSSQ_7
H2
VSSQ_8
H8
VSSQ_9
12
C30
C30 470P_DIS
470P_DIS
1 2
R38
R38 56_DIS
56_DIS
VDDQ_0 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
UDQS
UDQS#
LDQS
LDQS#
VREF
VDD_0 VDD_1 VDD_2 VDD_3 VDD_4
3
MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11
B_A1222
B_BA0 B_BA1
DQMB#3 DQMB#1
CLKB022 CLKB0#22
C24
C24 10U_DIS
10U_DIS
C704
C704
0.1U_DIS
0.1U_DIS
RASB0# CASB0# WEB0# CSB0_0# CKEB0 ODTB0
CLKB0 CLKB0#
C696
C696
0.1U_DIS
0.1U_DIS
1 2
10
10
10
10
1 2
1 2
10
10
C19
C19 10U_DIS
10U_DIS
1 2
6.3
6.3
603
603
12
C51
C51
0.1U_DIS
0.1U_DIS
10
10
RASB0#22 CASB0#22 WEB0#22 CSB0_0#22 CKEB022 ODTB022
+1.8V_RUN
C723
C723
0.1U_DIS
0.1U_DIS
MDB56
G8
DQ0
MDB62
G2
DQ1
MDB59
H7
DQ2
MDB63
H3
DQ3
MDB60
H1
DQ4
MDB57
H9
DQ5
MDB61
F1
DQ6
MDB58
F9
DQ7
MDB49
C8
DQ8
MDB52
C2
DQ9
MDB48
D7
MDB55
D3
MDB54
D1
MDB51
D9
MDB53
B1
MDB50
B9
QSB6
B7
QSB#6
A8
QSB7
F7
QSB#7
E8 A2
NC1
E2
NC2
L1
NC3
R3
NC4
R7
NC5
R8
NC6
VREF_B3
J2
A1
+1.8V_RUN E1 J9 M9 R1
A9 C1 C3 C7 C9
1 2 E9 G1
6.3
6.3
G3 G7 G9
603
603
12
10
10
1 2
R41
R41 499/F_DIS
499/F_DIS
C38
C38
0.1U_DIS
0.1U_DIS
12
10
10
603
603
12
10
10
C29
C29 1U_DIS
1U_DIS
C49
C49
0.1U_DIS
0.1U_DIS
M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2
L2 L3
B3
F3
K7
L7
K3
L8 K2 K9
J8 K8
J1
J7 A3
E3
J3 N1 P9
A7 B2 B8 D2 D8 E7
F2
F8 H2 H8
1 2
U37U37
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12
BA0 BA1
UDM LDM
RAS CAS WE CS CKE ODT
CLK CLK#
VDDL VSSDL VSS_0
VSS_1 VSS_2 VSS_3 VSS_4
VSSQ_0 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9
CLKB1 CLKB1#
R40
R40 499/F_DIS
499/F_DIS
25
25
12
10
10
C47
C47
0.01U_DIS
0.01U_DIS
C687
C687
0.1U_DIS
0.1U_DIS
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
UDQS
UDQS#
LDQS
LDQS#
VREF
VDD_0 VDD_1 VDD_2 VDD_3 VDD_4
VDDQ_0 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9
1 2
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9
NC1 NC2 NC3 NC4 NC5 NC6
R33
R33 56_DIS
56_DIS
50
50
12
G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9
B7 A8
F7 E8
A2 E2 L1 R3 R7 R8
J2
A1 E1 J9 M9 R1
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
1 2
C33
C33 470P_DIS
470P_DIS
R37
R37 56_DIS
56_DIS
QSB3
QSB#3
QSB1
QSB#1
6.3
6.3
603
603
10
10
MDB15 MDB11 MDB14 MDB10 MDB9 MDB13 MDB8 MDB12 MDB29 MDB27 MDB31 MDB24 MDB25 MDB30 MDB26 MDB28
VREF_B1
+1.8V_RUN
C686
C686 10U_DIS
10U_DIS
1 2
12
C46
C46
0.1U_DIS
0.1U_DIS
2
+1.8V_RUN
10
10
C693
C693 10U_DIS
10U_DIS
1 2
6.3
6.3
603
603
12
C684
C684
0.1U_DIS
0.1U_DIS
10
10
1 2
1 2
R634
R634 499/F_DIS
499/F_DIS
C689
C689
0.1U_DIS
0.1U_DIS
1
R630
R630 499/F_DIS
499/F_DIS
1 2
12
C691
C691
C682
C682
1U_DIS
1U_DIS
0.01U_DIS
0.01U_DIS
10
10
25
25
603
603
12
12
C699
C699
C713
C713
0.1U_DIS
0.1U_DIS
0.1U_DIS
0.1U_DIS
10
10
10
10
A A
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
COMPUTER
VGA-M82-S (VRAM)
VGA-M82-S (VRAM)
VGA-M82-S (VRAM)
GM3 2B
GM3 2B
GM3 2B
1
24 62Monday, March 24, 2008
24 62Monday, March 24, 2008
24 62Monday, March 24, 2008
of
of
of
5
UMA_HDMI_CLK+_R
R256 150_NCR256 150_NC R265 150_NCR265 150_NC
S_INT+ S_INT-
HDMI_A1
EXT_RES
R271 150_NCR271 150_NC R273 150_NCR273 150_NC
U13
U13
46
SDI+
47
SDI-
51
SDR+
52
SDR-
54
SDG+
55
SDG-
57
SDB+
58
SDB-
60
SDC+
61
SDC-
49
EXT_RES
1
RESET#
7
SDSCL
6
SDSDA
8
A1
12
SDADDC
11
SCLDDC
14
SCLROM
13
SDAROM
44
TEST
29
28
TX2-
TX2+
HDBCLK
HDAVCC37HDRST35HDSDI
39
D D
R235 3.3k_UMAR235 3.3k_UMA
+3.3V_RUN
R236 3.3k_UMAR236 3.3k_UMA
FM6 use 5.6K
C C
B B
A A
SDVOB_INT+6
SDVOB_INT-6
SDVOB_RED+6 SDVOB_RED-6
SDVOB_GREEN+6 SDVOB_GREEN-6
SDVOB_BLUE+6 SDVOB_BLUE-6
SDVOB_CLK+6 SDVOB_CLK-6
PLTRST#6,12,30,33,34,42 SDVO_CTRLCLK6 SDVO_CTRLDATA6
SDVO_CTRLCLK
SDVO_CTRLDATA
C349 0.1U_UMAC349 0.1U_UMA C350 0.1U_UMAC350 0.1U_UMA
SDVO_CTRLCLK SDVO_CTRLDATA
R234
R234 1k_UMA
1k_UMA
ICH_AZ_HDMI_BITCLK11
5
R277 1k_UMAR277 1k_UMA
HDMI_SDA_R HDMI_SCL_R
HDMI_CLK_C HDMI_TX0_CUMA_HDMI_TX0+_R UMA_HDMI_TX0-_R HDMI_TX1_CUMA_HDMI_TX1+_R UMA_HDMI_TX1-_R HDMI_TX2_CUMA_HDMI_TX2+_R UMA_HDMI_TX2-_R
23
26
20
22
25
19
TX0-
TX1-
TXC-
TX0+
TX1+
TXC+
SiI1392
SiI1392
HDASYNC
LSCL4LSDA
SPDIF/HDSDO
3
40
36
34
ICH_AZ_HDMI_SDIN1_L
L31
L31
HDAVCC
1 2
BLM18AG121SN1D_UMA
BLM18AG121SN1D_UMA
C326
C326
0.1U_UMA
0.1U_UMA
UMA_HDMI_TX2+_R UMA_HDMI_TX2-_R
UMA_HDMI_TX1+_R UMA_HDMI_TX1-_R
UMA_HDMI_TX0+_R UMA_HDMI_TX0-_R
UMA_HDMI_CLK+_R UMA_HDMI_CLK-_R
EXT_SWING
16
42
VCC
HTPLG
VCC VCC
EXT_SWING
VCC VCC
GND GND
AVCC AVCC
AGND AGND AGND
OVCC
PVCC1 PVCC2
AVCC3.3
RSVD
SVCC0 SVCC1
GND
GND SGND SGND
SPVCC
SPGND
LINT#
SiI1392_UMA
SiI1392_UMA
15
R237 4.7k_UMAR237 4.7k_UMA
+3.3V_RUN
C277 0.1U_NCC277 0.1U_NC C287 0.1U_NCC287 0.1U_NC C298 0.1U_NCC298 0.1U_NC C305 0.1U_NCC305 0.1U_NC
R278 1K_UMAR278 1K_UMA
R233 649/F_UMAR233 649/F_UMA
VCC_PWR
2 43 9 48 38
5 10
AVCC
21 27
18 24 30
OVCC
64
PVCC1
17
PVCC2
31
AVCC33V
32
VCC_PWR
33
SVCC
50 56
41 45 53 59
SPVCC
62 63
C272
C272 100P_UMA
100P_UMA
C302
C302 1000P_UMA
1000P_UMA
C280
C280 100P_UMA
100P_UMA
+3.3V_RUN
R285 0_UMAR285 0_UMA
HDMI_DETHDMI_DET_L
C271
C271 1000P_UMA
1000P_UMA
C276
C276 1000P_UMA
1000P_UMA
C283
C283 100P_UMA
100P_UMA
4
AVCC
8
C286
C286
0.1U_UMA
0.1U_UMA
C268
C268 1U_UMA
1U_UMA
4
8
C273
C273
0.1U_UMA
0.1U_UMA
C284
C284 1000P_UMA
1000P_UMA
UMA_HDMI_CLK-_R
C348
C348
C325
C325
1000P_UMA
1000P_UMA
1000P_UMA
1000P_UMA
C301
C301
C303
C303
10U_UMA
10U_UMA
1000P_UMA
1000P_UMA
1 2
C275
C275 10U_UMA
10U_UMA
C340
C340
C288
C288
1000P_UMA
1000P_UMA
10U_UMA
10U_UMA
1 2
C282
C282 10U_UMA
10U_UMA
ICH_AZ_HDMI_SDOUT 11 ICH_AZ_HDMI_SYNC 11 ICH_AZ_HDMI_SDIN1 11 ICH_AZ_HDMI_RST# 11
C322
C322
C324
C324
0.1U_UMA
0.1U_UMA
1000P_UMA
1000P_UMA
L27
L27
1 2
BLM18AG121SN1D_UMA
BLM18AG121SN1D_UMA
L23
L23
+3.3V_RUN
BLM18AG121SN1D_UMA
BLM18AG121SN1D_UMA
L24
L24
1 2
BLM18AG121SN1D_UMA
BLM18AG121SN1D_UMA
L26
L26
BLM18AG121SN1D_UMA
BLM18AG121SN1D_UMA
POP FOR UMA DEPOP FOR DIS
C335
C335
C327
C327
0.1U_UMA
0.1U_UMA
0.1U_UMA
0.1U_UMA
+1.8V_RUN
PVCC1
C270
C270
0.1U_UMA
0.1U_UMA
+1.8V_RUN
PVCC2
C311
C311
0.1U_UMA
0.1U_UMA
+3.3V_RUN
AVCC33V
C317
C317
0.1U_UMA
0.1U_UMA
3
HDMI_DET
R8430R843 0
3
ATI_HDMI_TX2+_L ATI_HDMI_TX2-_L
ATI_HDMI_TX1+_L ATI_HDMI_TX1-_L
ATI_HDMI_TX0+_L ATI_HDMI_TX0-_L
ATI_HDMI_CLK+_L ATI_HDMI_CLK-_L
HDMI_DDC_DATA
12
C71
C71
0.1U_NC
0.1U_NC
+5V_RUN
HDMI_TX2­HDMI_TX1+
HDMI_TX1­HDMI_TX0+
HDMI_TX0­HDMI_CLK+
HDMI_CLK-
HDMI_DDC_CLK HDMI_DDC_DATA
UMA_HDMI_TX2+_R HDMI_TX2+ UMA_HDMI_TX2-_R
UMA_HDMI_TX1+_R UMA_HDMI_TX1-_R
UMA_HDMI_TX0+_R UMA_HDMI_TX0-_R
UMA_HDMI_CLK+_R UMA_HDMI_CLK-_R
HDMI_SCL_R HDMI_DDC_CLK HDMI_SDA_R
ATI_HDMI_DET
+5V_RUN
L29
L29
1 2
BLM18PG181SN1_UMA
BLM18PG181SN1_UMA C351
C351 10U_UMA
10U_UMA
BLM18AG121SN1D_UMA
BLM18AG121SN1D_UMA
C269
C269
C266
C266
1000P_UMA
1000P_UMA
1U_UMA
1U_UMA
BLM18AG121SN1D_UMA
BLM18AG121SN1D_UMA
C310
C310
C323
C323
1000P_UMA
1000P_UMA
1U_UMA
1U_UMA
C334
C334
C343
C343
1000P_UMA
1000P_UMA
10U_UMA
10U_UMA
R124 0_UMAR124 0_UMA R122 0_UMAR122 0_UMA
R117 0_UMAR117 0_UMA R113 0_UMAR113 0_UMA
R92 0_UMAR92 0_UMA R86 0_UMAR86 0_UMA
R106 0_UMAR106 0_UMA R101 0_UMAR101 0_UMA
R668 0_UMAR668 0_UMA R670 0_UMAR670 0_UMA
R671
R671
+1.8V_RUN
L25
L25
1 2
L28
L28
1 2
L32
L32
1 2
BLM18AG121SN1D_UMA
BLM18AG121SN1D_UMA C321
C321 1000P_UMA
1000P_UMA
10K_DIS
10K_DIS
1 2
+1.8V_RUN
+1.8V_RUN
16
F1
F1
POLY SWITCH 1.1A_NC
POLY SWITCH 1.1A_NC
+3.3V_RUN
2
DIS:CXCG900U000 / EXC24CG900U
UMA:CXCG240U000 / EXC24CG240U
20
21
12
1
Q108
Q108 FDV301N_DIS
FDV301N_DIS
2
1
+3.3V_DELAY
Q109
Q109 FDV301N_DIS
FDV301N_DIS
JHD1
JHD1
SHELL1
1
D2+
2
D2 Shield
3
D2-
4
D1+
5
D1 Shield
6
D1-
7
D0+
8
D0 Shield
9
D0-
10
CK+
11
CK Shield
12
CK-
13
CE Remote
14
NC
15
DDC CLK
16
DDC DATA
17
GND
18
+5V
19
HP DET
SHELL2
FOX_QJ1119L-NV13-8F
FOX_QJ1119L-NV13-8F
+3.3V_RUN
R845 0_NCR845 0_NC
ATI_HDMI_SCL
ATI_HDMI_SDA HDMI_DDC_DATA
Pop for ATI Graphic
R682 499/F_DISR682 499/F_DIS
12
R679 499/F_DISR679 499/F_DIS
R692 499/F_DISR692 499/F_DIS R688 499/F_DISR688 499/F_DIS
R687 499/F_DISR687 499/F_DIS R685 499/F_DISR685 499/F_DIS
R678 499/F_DISR678 499/F_DIS R673 499/F_DISR673 499/F_DIS
31
2
Q12
Q12 2N7002W-7-F_DIS
2N7002W-7-F_DIS
ATI_HDMI_TX2+_R19 ATI_HDMI_TX2-_R19 ATI_HDMI_TX1+_R19 ATI_HDMI_TX1-_R19 ATI_HDMI_TX0+_R19 ATI_HDMI_TX0-_R19
ATI_HDMI_SCL19 ATI_HDMI_SDA19
ATI_HDMI_CLK+19 ATI_HDMI_CLK-19
ATI_HDMI_CLK-_L ATI_HDMI_CLK-
12
12
ATI_HDMI_TX2-_L
12
ATI_HDMI_TX1+_L
12
ATI_HDMI_TX1-_L
12
ATI_HDMI_TX0+_L
12
ATI_HDMI_TX0-_L
12
ATI_HDMI_DET
ATI_HDMI_TX2+_R ATI_HDMI_TX2-_R ATI_HDMI_TX1+_R ATI_HDMI_TX1-_R ATI_HDMI_TX0+_R ATI_HDMI_TX0-_R
ATI_HDMI_CLK+ ATI_HDMI_CLK-
ATI_HDMI_DET 19
2
3
2
+5V_RUN
21
12
R76
R76
2.2K_DU
2.2K_DU
3
C746 0.1U_DISC746 0.1U_DIS C742 0.1U_DISC742 0.1U_DIS
C768 0.1U_DISC768 0.1U_DIS C767 0.1U_DISC767 0.1U_DIS
C762 0.1U_DISC762 0.1U_DIS C751 0.1U_DISC751 0.1U_DIS
C737 0.1U_DISC737 0.1U_DIS C734 0.1U_DISC734 0.1U_DIS
ATI_HDMI_SCL ATI_HDMI_SDA
D3 RB751V-40D3RB751V-40
2
DIS Used 6.8K CS26802JB11 UMA Used 2.2K CS22202JB18
12
R80
R80
2.2K_DU
2.2K_DU
1
HDMI_DDC_CLK
ATI_HDMI_CLK+ATI_HDMI_CLK+_L
ATI_HDMI_TX2+_RATI_HDMI_TX2+_L ATI_HDMI_TX2-_R
ATI_HDMI_TX1+_R ATI_HDMI_TX1-_R
ATI_HDMI_TX0+_R ATI_HDMI_TX0-_R
+3.3V_DELAY
12
12
R66
R66
R100
R100
4.7K_DIS
4.7K_DIS
4.7K_DIS
4.7K_DIS
1
L72
L72
L70
L70
L64
L64
L66
L66
6 4
6 4
34
34
34
34
HDMI_TX2+ HDMI_TX2-
HDMI_TX0+ HDMI_TX0-
HDMI_TX2-
HDMI_TX2+
HDMI_TX1-
HDMI_TX1+
HDMI_TX0-
HDMI_TX0+
HDMI_CLK-
HDMI_CLK+
+5V_RUN
+5V_RUN
ATI_HDMI_TX2-_L
ATI_HDMI_TX2+_L
8
ATI_HDMI_TX1-_L
ATI_HDMI_TX1+_L
ATI_HDMI_TX0-_L
ATI_HDMI_TX0+_L
ATI_HDMI_CLK-_L
ATI_HDMI_CLK+_L
HDMI_TX1+ HDMI_TX1-
HDMI_CLK+ HDMI_CLK-
1 2
EXC24CG900U_DU
EXC24CG900U_DU
R689 0_NCR689 0_NC
1 2
R690 0_NCR690 0_NC
1 2
1 2
EXC24CG900U_DU
EXC24CG900U_DU
R684 0_NCR684 0_NC
1 2
R686 0_NCR686 0_NC
1 2
1 2
EXC24CG900U_DU
EXC24CG900U_DU
R676 0_NCR676 0_NC
1 2
R677 0_NCR677 0_NC
1 2
1 2
EXC24CG900U_DU
EXC24CG900U_DU
R680 0_NCR680 0_NC
1 2
R681 0_NCR681 0_NC
1 2
U9
I/O1I/O
2
VP5VN
I/O3I/O
SRV05-4_NCU9SRV05-4_NC
U7
I/O1I/O
2
VP5VN
I/O3I/O
SRV05-4_NCU7SRV05-4_NC
Reserve for EMI and close to HDMI CONN
1
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
Title
Title
Title
SiI 1362
SiI 1362
SiI 1362
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
GM3 2B
GM3 2B
GM3 2B
Date: Sheet
Date: Sheet
Date: Sheet
1
25 62Monday, March 24, 2008
25 62Monday, March 24, 2008
25 62Monday, March 24, 2008
of
of
of
5
D D
+15V_ALW +LCDVCC+3.3V_RUN
1 2
UMA_ENVDD
UMA_ENVDD6
C C
Support the new imbeded diagnostics.
LCDVCC_TST_EN31
1 2
ENVDD
UMA
UMA_BIA_PWM6
B B
Populate R341 for platform without DPST support. No Stuff for Discrete DSPT support due to back up plan.
A A
5
ENVDD
R593 0_UMAR593 0_UMA
R603 0_NCR603 0_NC
1 2
D24
D24
1
2
BAT54C T/R
BAT54C T/R
R109 0_NCR109 0_NC
R108 0_NCR108 0_NC
Populate R65 for DPST implementation only.
3
EN_LCDVCC
R726
R726
10K_DIS
10K_DIS
12 12
+3.3V_ALW
+3.3V_RUN
RUN_ON20,44,48,49,53
+15V_ALW
12
R589
R589 47K_NC
47K_NC
2
R721
R721 10K_UMA
10K_UMA
BACKLITE_DPST BACKLITE_DPSTATI_BIA_PWM
+PWR_SRC
65mil
12
R29
R29 100K
100K
31
12
R591
R591 47K
47K
Q64
Q64 DDTC124EUA-7-F
DDTC124EUA-7-F
1 3
Shunt capacitors on LVDS for improving WWAN.
1 2
50
50
603
603
1 2 31
2
4
Q65
Q65 FDC655BN
FDC655BN
6 5
R590
R590 330K
330K
LCDVCC_ON
R592
R592 100K_NC
100K_NC
1 2
2
Q63
Q63 2N7002W-7-F
2N7002W-7-F
LCD_ACLK-_C
LCD_ACLK+_C
LCD_BCLK-_C
LCD_BCLK+_C
4
C18
C18
0.1U
0.1U
R28
R28 100K
100K
Q5
Q5 2N7002W-7-F
2N7002W-7-F
4 2 1
3
1 2
25
25
LCD_B0­LCD_B1­LCD_B2­LCD_A0­LCD_A1­LCD_A2­LCD_A3- LCD_A3+ LCD_B3- LCD_B3+
1 2
1 2
Q4
3
FDC658APQ4FDC658AP
4
C672
C672
0.01U
0.01U
2
C11 3.3P_NC
C11 3.3P_NC C10 3.3P_NC
C10 3.3P_NC C9 3.3P_NC
C9 3.3P_NC C6 3.3P_NC
C6 3.3P_NC C15 3.3P_NC
C15 3.3P_NC C14 3.3P_NC
C14 3.3P_NC C13 3.3P_NC
C13 3.3P_NC C8 3.3P_NC
C8 3.3P_NC
R4 0_NCR40_NC
50
50
R5 0_NCR50_NC
50
50
65mil
6 5 2 1
R588
R588 47
47
1 2
805
805
31
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
C12
C12
3.3P_NC
3.3P_NC
1 2
C7
C7
3.3P_NC
3.3P_NC
1 2
+GFX_PWR_SRC
50
50
603
603
Q62
Q62 2N7002W-7-F
2N7002W-7-F
50
50 50
50 50
50 50
50 50
50 50
50 50
50 50
50
12
C17
C17
0.1U
0.1U
C677
C677
C670
C670
0.01U
0.01U
22U
22U
1 2
25
25
LCD_B0+ LCD_B1+ LCD_B2+ LCD_A0+ LCD_A1+ LCD_A2+
TUNE EMI DESIGN
12
C16
C16
0.1U
0.1U
50
50
603
603
J1
J1
50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1
IPX_20323-050ED11
IPX_20323-050ED11
3
LCD_BCLK-_C
50
LCD_BCLK+_C
49 48
LCD_B3-
47
LCD_B3+
46 45
LCD_B2-
44
LCD_B2+
43 42
LCD_B1-
41
LCD_B1+
40 39
LCD_B0-
38
LCD_B0+
37 36
LCD_ACLK-_C
35
LCD_ACLK+_C
34 33
LCD_A3-
32
LCD_A3+
31 30
LCD_A2-
29
LCD_A2+
28 27
LCD_A1-
26
LCD_A1+
25 24
LCD_A0-
23
LCD_A0+
22 21
LCD_DDCCLK
20
LCD_DDCDAT
19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
3
+3.3V_RUN
+LCDVCC
LCD_TST 31
BACKLITE_DPST
+GFX_PWR_SRC
+5V_ALW
GFX_PWR_SRC layout note: 40 mil trace for tube type 45 mil for white LED type 65mil for RGB LED type
+LVDDR
+LVDDC
+LPVDD
AJ26
AH26
AK27
AL27
AM24 AN28 AN21 AN24 AN25 AM22 AP21 AP26 AM27 AR21 AR26 AM26
AJ22 AJ24
AL22
AK22
LCD_BCLK-_C LCD_BCLK+_C LCD_B3­LCD_B3+ LCD_B2­LCD_B2+ LCD_B1­LCD_B1+ LCD_B0­LCD_B0+ LCD_ACLK-_C LCD_ACLK+_C LCD_A3­LCD_A3+ LCD_A2­LCD_A2+ LCD_A1­LCD_A1+ LCD_A0­LCD_A0+ LCD_DDCCLK LCD_DDCDAT
INVERTER_CBL_DET# 31
LCD_BAK# 31
PWM_VADJ 31 LCD_CBL_DET# 31
U43F
U43F
PART 7 OF 7
PART 7 OF 7
LVDDR_1
Control
Control
LVDDR_2
LVDDC_1 LVDDC_2
LVSSR_1 LVSSR_2 LVSSR_3 LVSSR_4 LVSSR_5 LVSSR_6 LVSSR_7 LVSSR_8 LVSSR_9 LVSSR_10 LVSSR_11
LVDS channel
LVDS channel
LVSSR_12 LVSSR_13 LVSSR_14
LPVDD LPVSS
M86-LP_DIS
M86-LP_DIS
VARY_BL
DIGON
TXCLK_UP
TXCLK_UN TXOUT_U0P TXOUT_U0N TXOUT_U1P TXOUT_U1N TXOUT_U2P TXOUT_U2N TXOUT_U3P TXOUT_U3N
TXCLK_LP
TXCLK_LN TXOUT_L0P TXOUT_L0N TXOUT_L1P TXOUT_L1N TXOUT_L2P TXOUT_L2N TXOUT_L3P TXOUT_L3N
2
50
50
10K_DIS10K_DIS
ATI_BIA_PWM
2
12
C679
C679 47P_NC
47P_NC
ATI_ENVDD_R
ATI_LCD_BCLK+ ATI_LCD_BCLK-
ATI_LCD_B0+ ATI_LCD_B0­ATI_LCD_B1+ ATI_LCD_B1­ATI_LCD_B2+ ATI_LCD_B2­ATI_LCD_B3+ ATI_LCD_B3-
ATI_LCD_ACLK+ ATI_LCD_ACLK-
ATI_LCD_A0+ ATI_LCD_A0­ATI_LCD_A1+ ATI_LCD_A1­ATI_LCD_A2+ ATI_LCD_A2­ATI_LCD_A3+ ATI_LCD_A3-
ATI_LCD_BCLK­ATI_LCD_BCLK+
ATI_LCD_B3­ATI_LCD_B3+ ATI_LCD_B2­ATI_LCD_B2+ ATI_LCD_B1­ATI_LCD_B1+ ATI_LCD_B0-
ATI_LCD_B0+ ATI_LCD_ACLK­ATI_LCD_ACLK+
ATI_LCD_A3-
ATI_LCD_A3+
ATI_LCD_A2-
ATI_LCD_A2+
ATI_LCD_A1-
ATI_LCD_A1+
ATI_LCD_A0-
ATI_LCD_A0+
SMBCLK1 17,31,39 SMBDAT1 17,31,39
R75 0_DISR75 0_DIS
12
ENVDD
UMA_LCD_BCLK-_C 6 UMA_LCD_BCLK+_C 6 UMA_LCD_B3- 6 UMA_LCD_B3+ 6 UMA_LCD_B2- 6 UMA_LCD_B2+ 6 UMA_LCD_B1- 6 UMA_LCD_B1+ 6 UMA_LCD_B0- 6 UMA_LCD_B0+ 6 UMA_LCD_ACLK-_C 6 UMA_LCD_ACLK+_C 6 UMA_LCD_A3- 6 UMA_LCD_A3+ 6 UMA_LCD_A2- 6 UMA_LCD_A2+ 6 UMA_LCD_A1- 6 UMA_LCD_A1+ 6 UMA_LCD_A0- 6
UMA_LCD_A0+ 6 ATI_LCD_DDCCLK 19 UMA_LCD_DDCCLK 6 ATI_LCD_DDCDAT 19 UMA_LCD_DDCDAT 6
Title
Title
Title
LCD CONN & CK-SSCD
LCD CONN & CK-SSCD
LCD CONN & CK-SSCD
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
GM3 2B
GM3 2B
GM3 2B
Date: Sheet
Date: Sheet
Date: Sheet
R6 0_DISR6 0_DIS
1 2
R604 0_UMAR604 0_UMA
1 2
R7 0_DISR7 0_DIS
1 2
R605 0_UMAR605 0_UMA
1 2
R8 0_DISR8 0_DIS
1 2
R606 0_UMAR606 0_UMA
1 2
R9 0_DISR9 0_DIS
1 2
R607 0_UMAR607 0_UMA
1 2
R10 0_DISR10 0_DIS
1 2
R608 0_UMAR608 0_UMA
1 2
R11 0_DISR11 0_DIS
1 2
R609 0_UMAR609 0_UMA
1 2
R12 0_DISR12 0_DIS
1 2
R610 0_UMAR610 0_UMA
1 2
R13 0_DISR13 0_DIS
1 2
R611 0_UMAR611 0_UMA
1 2
R14 0_DISR14 0_DIS
1 2
R612 0_UMAR612 0_UMA
1 2
R15 0_DISR15 0_DIS
1 2
R613 0_UMAR613 0_UMA
1 2
R16 0_DISR16 0_DIS
1 2
R614 0_UMAR614 0_UMA
1 2
R17 0_DISR17 0_DIS
1 2
R615 0_UMAR615 0_UMA
1 2
R18 0_DISR18 0_DIS
1 2
R616 0_UMAR616 0_UMA
1 2
R19 0_DISR19 0_DIS
1 2
R617 0_UMAR617 0_UMA
1 2
R20 0_DISR20 0_DIS
1 2
R618 0_UMAR618 0_UMA
1 2
R21 0_DISR21 0_DIS
1 2
R619 0_UMAR619 0_UMA
1 2
R22 0_DISR22 0_DIS
1 2
R620 0_UMAR620 0_UMA
1 2
R23 0_DISR23 0_DIS
1 2
R621 0_UMAR621 0_UMA
1 2
R24 0_DISR24 0_DIS
1 2
R622 0_UMAR622 0_UMA
1 2
R25 0_DISR25 0_DIS
1 2
R623 0_UMAR623 0_UMA
1 2
R26 0_DISR26 0_DIS
1 2
R624 0_UMAR624 0_UMA
1 2
R27 0_DISR27 0_DIS
1 2
R625 0_UMAR625 0_UMA
1 2
FOR ATI & UMA DIFFERENT LVDS PATH
12
C678
C678 47P_NC
47P_NC
50
50
AG7 AJ6
AK24 AL24 AN27 AN26 AP27 AR27 AG24 AH24 AK26 AL26
AR22 AP22 AN23 AN22 AP23 AR23 AP24 AR24 AP25 AR25
1
+LCDVCC
12
C676
C676
0.1U
0.1U
10
10
Adress : A9H --Contrast AAH --Backlight
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
1
+3.3V_RUN
12
10
10
C675
C675
0.047U
0.047U
12
C671
C671
0.1U
0.1U
10
10
26 62Monday, March 24, 2008
26 62Monday, March 24, 2008
26 62Monday, March 24, 2008
of
of
of
A
4 4
B
C
D
E
+3.3V_RUN
D27
D26
D25
D25
1
DA204U_NC
ATI & UMA RGB SWITCH
Layout Note: Setting R,G,B treac
ATI_VGA_RED19 UMA_VGA_RED6
ATI_VGA_GRN19 UMA_VGA_GRN6
ATI_VGA_BLU19
3 3
UMA_VGA_BLU6
R639 0_DISR639 0_DIS R640 0_UMAR640 0_UMA
R635 0_DISR635 0_DIS R638 0_UMAR638 0_UMA
R631 0_DISR631 0_DIS R632 0_UMAR632 0_UMA
impedance to 50 ohm.
R42
R42
R46
R36
R36 150/F
150/F
1 2
ATI_CRT_DAT_DDC19 ATI_CRT_CLK_DDC19
R46
150/F
150/F
150/F
150/F
1 2
1 2
RED_L
GREEN_L
BLUE_L
12
C31
C31 22P
22P
50
50
12
C36
C36 22P
22P
50
50
R633 0_DISR633 0_DIS R30 0_DISR30 0_DIS
603
603
603
603
603
603
12
C41
C41 22P
22P
50
50
ATI_DAT_DDC2_C ATI_CLK_DDC2_C
ATI & UMA DATA/CLK SWITCH
+5V_RUN
ATI_VGAHSYNC19 UMA_VGAHSYNC6
2 2
ATI_VGAVSYNC19
UMA_VGAVSYNC6
ATI & UMA H/V SWITCH
+CRT_VCC
D1 SDM10K45-7-FD1 SDM10K45-7-F
2 1
R657 0_DISR657 0_DIS R656 0_UMAR656 0_UMA
C707
C707
0.1U
0.1U
12
R654 0_DISR654 0_DIS R653 0_UMAR653 0_UMA
VGAHSYNC_L
74AHCT1G125GW
74AHCT1G125GW
74AHCT1G125GW
74AHCT1G125GW
2 4
2 4
NEED ADD 0 OHM ON GM SIDE
R655 1KR655 1K
VGAHSYNC_R
VGAVSYNC_RVGAVSYNC_L
12
R629 10R629 10
1 2
Place near U24,U25 < 200 mil
R628 10R628 10
1 2
1
5
U39
U39
1
5
U40
U40
R32
UMA_CRT_DAT_DDC6
UMA_CRT_CLK_DDC6
R32
0_UMA
0_UMA
R626
R626
0_UMA
0_UMA
HSYNC JVGA_HS
VSYNC
DA204U_NC
L5
L5 BLM18BB750SN1D
BLM18BB750SN1D
L4
L4 BLM18BB750SN1D
BLM18BB750SN1D
L3
L3 BLM18BB750SN1D
BLM18BB750SN1D
11
C681
C681
0.01U
0.01U
1 2
25
25
ATI_DAT_DDC2_C
ATI_CLK_DDC2_C
+3.3V_RUN
1
3
2
4
+3.3V_RUN
50
50
RP47
RP47
2.2KX2
2.2KX2
1
1
2
3
12
C32
C32 10P
10P
Q67
Q67 BSS138_NL
BSS138_NL
Q66
Q66 BSS138_NL
BSS138_NL
2 2
D26 DA204U_NC
DA204U_NC
3
3
50
50
50
50
12
12
1
50
50
C21
C21 10P_NC
10P_NC
C22
C22 10P_NC
10P_NC
D27
2
DA204U_NC
DA204U_NC
3
12
C35
C35 10P
10P
C701
C701
0.01U
0.01U
1 2
25
25
12
C700
C700 10P_NC
10P_NC
50
50
12
C26
C26 10P_NC
10P_NC
50
50
2
1
3
RED
GREEN
BLUE
12
C43
C43 10P
10P
50
50
+CRT_VCC
1
3
RP48
RP48
2.2KX2
2.2KX2
2
4
L2 BLM18AG121SN1D
L2 BLM18AG121SN1D
L1 BLM18AG121SN1D
L1 BLM18AG121SN1D
Place near JVGA1 connector < 200 mil
T2PAD T2PAD
T94PAD T94PAD
G_DAT_DDC2_C
G_CLK_DDC2_C
603
603
603
603
M_SEN#_R
M_ID2#
12
50
50
JVGA_VS
C28
C28 10P
10P
+5V_RUN
21
D2
D2 SDM10K45-7-F
SDM10K45-7-F
5V_CRT_REF
JVGA1
JVGA1
6
11
1 7
12
2 8
13
3 9
14
4 10 15
5
Suyin_070549FR015S512ZR
Suyin_070549FR015S512ZR
12
C25
C25 10P
10P
50
50
1 1
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
A
B
C
D
Date: Sheet
CRT&TV CONN
CRT&TV CONN
CRT&TV CONN
GM3 2B
GM3 2B
GM3 2B
E
of
of
of
27 62Monday, March 24, 2008
27 62Monday, March 24, 2008
27 62Monday, March 24, 2008
A
B
+3.3V_R5C833
C
D
E
C933
C933 10U
10U
12
25
25
PCI_AD[31..0]12
12
1 1
Place the power caps close to the relation pins.
6.3
6.3
603
603
PCI Bus
2 2
PowerOnReset for VccCore
GBRST# should be asserted only when system power supply is on.
C641
C641
0.01U
0.01U
+3.3V_R5C833
6.3
6.3
603
603
12
25
25
12
C965
C965 10U
10U
PCI Bus
PCI_PAR12
PCI_C_BE3#12
3 3
CoreLogic CLOCKRUN#
4 4
A
PCI_C_BE2#12 PCI_C_BE1#12 PCI_C_BE0#12
PCI_REQ0#12
PCI_GNT0#12
PCI_FRAME#12
PCI_IRDY#12 PCI_TRDY#12 PCI_DEVSEL#12
PCI_STOP#12
PCI_PERR#12
PCI_SERR#12
PCI_RST#12
CLK_PCI_PCCARD17
ICH_PME#12,31
CLKRUN#13,31
The ICH schematics need to include a pull-up resistor to implement CLKRUN#, and the ICH schematics must have a pull-down, or constantly drive thesignal low, in order to disable CLKRUN#.
C653
C653
0.01U
0.01U
12
C937
C937
0.01U
0.01U
25
25
+3.3V_R5C833
10
10
603
603
PCI_AD17
12
25
25
12
C960
C960
0.1U
0.1U
10
10
12
R818
R818 100K
100K
12
C956
C956 1U
1U
C654
C654
0.01U
0.01U
12
25
25
12
C967
C967
0.01U
0.01U
25
25
12
C966
C966
0.01U
0.01U
25
25
C936
C936
0.01U
0.01U
10
10
603
603
R572 100R572 100
R819 0R819 0
12
25
25
12
25
25
12
C969
C969
0.47U
0.47U
12
CLK_PCI_PCCARD
B
C968
C968
0.01U
0.01U
C959
C959
0.01U
0.01U
+3.3V_R5C833
U49B
U49B
10
VCC_PCI1
20
VCC_PCI2
27
VCC_PCI3
32
VCC_PCI4
41
VCC_PCI5
128
VCC_PCI6
61
VCC_RIN
16
VCC_ROUT1
34
VCC_ROUT2
12
C964
C964
0.47U
0.47U
10
10
603
603
PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0
50
50
64
VCC_ROUT3
114
VCC_ROUT4
120
VCC_ROUT5
125
AD31
126
AD30
127
AD29
1
AD28
2
AD27
3
AD26
5
AD25
6
AD24
9
AD23
11
AD22
12
AD21
14
AD20
15
AD19
17
AD18
18
AD17
19
AD16
36
AD15
37
AD14
38
AD13
39
AD12
40
AD11
42
AD10
43
AD9
44
AD8
46
AD7
47
AD6
48
AD5
49
AD4
50
AD3
51
AD2
52
AD1
53
AD0
33
PAR
7
C/BE3#
21
C/BE2#
35
C/BE1#
45
C/BE0#
8
IDSEL
124
REQ#
123
GNT#
23
FRAME#
24
IRDY#
25
TRDY#
26
DEVSEL#
29
STOP#
30
PERR#
31
SERR#
71
GBRST#
119
PCIRST#
121
PCICLK
70
PME#
117
CLKRUN#
12
R80322R803 22
12
C928
C928 1P
1P
Refer to DELL M07 schematic X06
PCI / OTHER
PCI / OTHER
UDIO0/SRIRQ#
VCC_3V
VCC_MD
GND1 GND2 GND3
GND4 GND5 GND6 GND7 GND8 GND9
GND10
AGND1 AGND2 AGND3 AGND4 AGND5
HWSPND#
MSEN XDEN
UDIO5
UDIO3 UDIO4
UDIO2 UDIO1
INTA#
INTB#
TEST
67
86
4 13 22 28 54 62 63 68 118 122
99 102 103 107 111
69
58 55
57
65 59
56 60 72
115 116
66
C
Place the power caps close to the relation pins.
C941
C941
0.1U
0.1U
12
6.3
6.3
603
603
+3.3V_R5C833
R825 10KR825 10K
12
R834
R834 100K
100K
12
10
10
1 2
T145 PADT145 PAD
C961
C961 10U
10U
+3.3V_R5C833
12
R838
R838 10K
10K
IRQ_SERIRQ 13,31
PCI Bus
PCI_PIRQB# 12 PCI_PIRQC# 12
+3.3V_R5C833
12
R839
R839
Memory Stick Enable
100K
100K
XD Card Enable
Serial ROM disable
SD Card Enable MMC Card Enable
1394 Interrupt Media card Interrupt
D
+3.3V_RUN
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
R836
R836 0
0
1 2
805
805
8 IN 1 CONTROLLER
8 IN 1 CONTROLLER
8 IN 1 CONTROLLER
GM3 2B
GM3 2B
GM3 2B
+3.3V_R5C833
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
E
28 62Monday, March 24, 2008
28 62Monday, March 24, 2008
28 62Monday, March 24, 2008
of
of
of
A
B
C
D
E
80 mils
L85
L85 BLM18PG181SN1D
+3.3V_RUN_PHY
1 1
GUARD GND
C940
C940 22P
22P
50
50
C939
C939 22P
22P
50
50
Populate C266 for R5C832 chipset.
2 2
5/14:FAE review report say RC533 don't need FILO item, so NC it
Place these caps as close to the IC as possible.
3 3
1394_XI
Y4
Y4
24.576MHZ
24.576MHZ
1394_XO
C934
C934
0.01U_NC
0.01U_NC
25
25
R793 10K/FR793 10K/F
1 2
C932
C932
0.01U
0.01U
25
25
1 2
R804 0R804 0
4
RICOH_FILO
RICOH_REXT
RICOH_VREF
94
XI
95
XO
96
FIL0
IEEE1394/SD
101
REXT
100
VREF
97
RSV
IEEE1394/SD
AVCC_PHY1 AVCC_PHY2 AVCC_PHY3 AVCC_PHY4
TPBIAS0
TPBN0 TPBP0
TPAN0 TPAP0
MDIO17 MDIO16 MDIO15 MDIO14 MDIO13 MDIO12 MDIO11 MDIO10
MDIO05 MDIO08 MDIO19 MDIO18 MDIO02
MDIO03 MDIO00
MDIO01
MDIO09
MDIO04 MDIO06
MDIO07
U49A
U49A
98 106 110 112
113
104 105
108 109
87 92 89 91 90 93 81 82
75 88 83 85 78
77 80
79
84
76 74
73
12
603
603
Place these caps as close to the R5C833 as possible.
6.3
6.3
AS CLOSE AS POSSIBLE TO R5C833
TPBIAS0
R801
R801
R802
R802
56.2/F
56.2/F
56.2/F
56.2/F
Circuit area : As small as possible.
SD_CD#
MS_INS#
C938
C938 10U
10U
R800
R800
56.2/F
56.2/F
SD_CD# 30
MS_INS# 30
R799
R799
56.2/F
56.2/F
12
10
10
T141
T141
12
C935
C935
0.1U
0.1U
25
25
C929 0.33U
C929 0.33U
603
603 16
16
C931 0.01U
C931 0.01U
25
25
TPB0N TPB0P
TPA0N TPA0P
XD/MMC_DATA7 30 XD/MMC_DATA6 30 XD/MMC_DATA5 30 XD/MMC_DATA4 30 SD/XD/MS_DATA3 30 SD/XD/MS_DATA2 30 SD/XD/MS_DATA1 30 SD/XD/MS_DATA0 30
XD_WP# 30 SD/XD/MS_CMD 30 XD_ALE 30 XD_CLE 30 XD_CE# 30
SD_WP#(XDR/B#) 30 2 1
D32 1SS355D32 1SS355
2 1
D33 1SS355D33 1SS355
SD/XD/MS_CLK 30
MC_PWR_CTRL_0 30
PAD
PAD
C636
C636
0.01U
0.01U
C930 270P
C930 270P
25
25
R794 5.11K/FR794 5.11K/F
BLM18PG181SN1D
modify
12
C635
C635
603
603
1000P
1000P
50
50
*TPA0P/TPA0N,TPB0P/TPB0N pair trace : As close as possible. *TPA0P/TPA0N,TPB0P/TPB0N pair trace : Same length electrically. *Termination resistor for TPA+/- TPB+/- : As close as possible to its cable driver (device pin out).
+3.3V_R5C833
close to the Chip
1 2
+3.3V_R5C833
R814
R814 10K_NC
10K_NC
XD_CDSW# 30
L82
L82 DLW21HN181SQ2L_NC
DLW21HN181SQ2L_NC
3 4
34
34
12
12
12
TPB0N TPB0­TPB0P TPA0N
R751 0R751 0
1 2
R750 0R750 0
1 2
R752 0R752 0
1 2
R754 0R754 0
1 2
L83
L83 DLW21HN181SQ2L_NC
DLW21HN181SQ2L_NC
3 4
34
34
12
12
12
AS CLOSE AS POSSIBLE TO 1394 CONNECTOR.
TPB0+ TPA0­TPA0+TPA0P
AS CLOSE AS POSSIBLE TO 1394 CONNECTOR.
TPB0­TPB0+ TPA0­TPA0+
CON1
CON1 FOX_UV31413-WS51P-7F
FOX_UV31413-WS51P-7F
1
1
1
1
2
2
3
3
4
4
5566778
8
33
4 4
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
A
B
C
D
Date: Sheet
COMPUTER
IEEE 1394
IEEE 1394
IEEE 1394
GM3 2B
GM3 2B
GM3 2B
E
of
of
of
29 62Monday, March 24, 2008
29 62Monday, March 24, 2008
29 62Monday, March 24, 2008
1
L59
ICH_USBP7-12
ICH_USBP7+12
A A
+3.3V_CARD
12
12
C579
C579
C582
C582
0.1U
0.1U
0.1U
0.1U
10
10
10
10
Please the cap near connector.
B B
L59
1 2
PLW3216S900SQ2T1_NC
PLW3216S900SQ2T1_NC
R418 0R418 0
1 2
R421 0R421 0
1 2
12
C572
C572 10U
10U
6.3
6.3
603
603
34
2
USBP7_D­USBP7_D+
ICH_SMBCLK13,33,34 ICH_SMBDATA13,33,34
+1.5V_CARD
PCIE_WAKE#13,33,34,42
+3.3V_CARDAUX +3.3V_CARD
CARD_CLK_REQ#17 EXPRCRD_PWREN#31 CLK_PCIE_EXPCARD#17 CLK_PCIE_EXPCARD17
3
+1.5V_CARD
4
5
6
7
8
Express Card
12
12
10
10
Please the cap near connector.
USBP7_D­USBP7_D+ CPUSB#
CARD_RESET#
EXPRCRD_PWREN#
PCIE_RX4-12 PCIE_RX4+12
PCIE_TX4-12 PCIE_TX4+12
C539
C539
0.1U
0.1U
C542
C542
0.1U
0.1U
10
10
CON2
CON2
1
GND_1
2
USB-
3
USB+
4
CPUSB#
5
RSV_0
6
RSV_1
7
SMBCLK
8
SMBDATA
9
+1.5V_0
10
+1.5V_1
11
WAKE#
12
+3.3VAUX
13
PERST#
14
+3.3V_1
15
+3.3V_2
16
CLKREQ#
17
CPPE#
18
REFCLK-
19
REFCLK+
20
GND_2
21
PERn0
22
PERp0
23
GND_3
24
PETn0
25
PETp0
26
GND_4
FOX_1CH411BAC-GM
FOX_1CH411BAC-GM
+1.5V_RUN +3.3V_RUN +3.3V_SUS
+3.3V_SUS
T54
T54
PAD
PAD
PLTRST#6,12,25,33,34,42
12
C547
C547
0.1U
0.1U
10
NC430NC329NC228NC1
27
10
Please the cap near pin 12 & 14(1.5VIN).
12
C581
C581
0.1U
0.1U
10
10
Please the cap near pin 2 & 4 (3.3VIN).
+1.5V_CARD Max. 650mA, Average 500mA. +3V_CARD Max. 1300mA, Average 1000mA.
U27
U27
17
AUXIN
2
3.3VIN_0
3.3VIN_143.3VOUT_1
12
1.5VIN_0
14
R452 100KR452 100K
EXPRCRD_STDBY#
+3.3V_SUS +3.3V_CARDAUX+3.3V_RUN+1.5V_RUN +3.3V_CARD +1.5V_CARD
12
C555
C555
0.1U
0.1U
10
10
Please the cap near pin 17 (AUXIN).
1.5VIN_1
12
20
SHDN#
1
STBY#
6
SYSRST#
16
NC
7
GND0
3.3
3.3
3.3VOUT_0
1.5VOUT_0
1.5VOUT_1
ExpressSwitch
ExpressSwitch
R5538D001-TR-F
R5538D001-TR-F
+3.3V_CARDAUX +3.3V_CARD +1.5V_CARD
15
AUXOUT
3 5 11 13
CARD_RESET#
8
PERST#
CPPE#
CPUSB#
OC#
RCLKEN
Please the cap near pin 15 (AUXOUT).
10 9 19
18
12
C546
C546
0.1U
0.1U
10
10
EXPRCRD_PWREN# CPUSB#
R439 100KR439 100K R447 100KR447 100K
12
C583
C583
0.1U
0.1U
10
10
Please the cap near pin 3 & 5 (3.3VOUT).
12 12
Please the cap near pin 11 & 13(1.5VOUT).
+3.3V_SUS
12
C551
C551
0.1U
0.1U
10
10
PCI-Express TX and RX direct to connector.
JAE PX10FS16PH-26P
+3.3V_RUN_CARD +3.3V_RUN_CARD
(65)
CON5
SD_CD# SD_WP#
XD/MMC_DATA7
C C
XD/MMC_DATA6 XD/MMC_DATA5 XD/MMC_DATA4 SD/XD/MS_DATA3 SD/XD/MS_DATA2 SD/XD/MS_DATA1
SD/XD/MS_DATA1 SD/XD/MS_CMD SD/XD/MS_DATA0 SD/XD/MS_DATA1 XD/MMC_DATA7 SD/XD/MS_DATA0 XD/MMC_DATA6 SD/XD/MS_DATA2 SD/XD/MS_CLK
C884
C884 270P_NC
270P_NC
25
25
R767 0R767 0
C883
C883 270P_NC
270P_NC
25
25
C897
C897
2.2U
2.2U
6.3
6.3
12
CON5
1
SD-CD
2
SD-WP
3
XD-VCC
4
XD-D7
5
XD-D6
6
XD-D5
7
XD-D4
8
XD-D3
9
XD-D2
10
XD-D1
11
GND
12
SD-DAT1
13
MS-BS
14
SD-DAT0
15
MS-DATA1
16
SD-DAT7
17
MS-DATA0
18
SD-DAT6
19
MS-DATA2
20
SD-CLK
21
SD-VCC
TTN_R015-B10-LV
TTN_R015-B10-LV
MS-INS
SD-DAT5
MS-DATA3
SD-CMD
MS-SCLK
SD-DAT4
MS-VCC SD-DAT3 SD-DAT2
GND
XD-D0 XD-WP XD-WE
XD-ALE
XD-CLE
XD-CE
XD-RE XD-R/B
XD-CD
GND GND
22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42
R768 0R768 0
XD/MMC_DATA5
SD/XD/MS_DATA3
SD/XD/MS_CMD
C899
C899 270P
270P
25
25
SD/XD/MS_CLK XD/MMC_DATA4
SD/XD/MS_DATA3 SD/XD/MS_DATA2
SD/XD/MS_DATA0
XD_WP#
SD/XD/MS_CMD
XD_ALE XD_CLE XD_CE#
SD/XD/MS_CLK
SD_WP#(XDR/B#)
XD_CDSW#
12
MS_INS# 29SD_CD#29
8 IN1 CARD READER
603
603
+3.3V_RUN_CARD
D D
C894
C886
C903
C903
0.01U
0.01U
25
25
C886
0.01U
0.01U
25
25
1
C894
0.01U
0.01U
25
25
R761
R761 150K
150K
2
SD_WP#(XDR/B#)
XD_CDSW#
R760 0_NCR760 0_NC
1 2
Q72
Q72 2N7002W-7-F
2N7002W-7-F
3 1
2
SD Protect
3
SD_WP#
MC_PWR_CTRL_029
4
+3.3V_R5C833
C895
C895
0.1U
0.1U
10
10
5
U46
U46
IN5OUT
3
NC EN4GND
TPS2051BDBV
TPS2051BDBV
1
2
+3.3V_RUN_CARD
C885
C885 1U
1U
10
10
603
603
6
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
XD_CDSW#29
SD_WP#(XDR/B#)29
XD/MMC_DATA729 XD/MMC_DATA629 XD/MMC_DATA529 XD/MMC_DATA429
SD/XD/MS_DATA329 SD/XD/MS_DATA229 SD/XD/MS_DATA129 SD/XD/MS_DATA029 SD/XD/MS_CMD29
XD_WP#29 XD_ALE29 XD_CLE29 XD_CE#29
SD/XD/MS_CLK29
QUANTA
QUANTA
QUANTA COMPUTER
ExpressCard/SmartCard
ExpressCard/SmartCard
ExpressCard/SmartCard
GM3 2B
GM3 2B
GM3 2B
7
of
of
of
30 62Monday, March 24, 2008
30 62Monday, March 24, 2008
30 62Monday, March 24, 2008
8
5
+3.3V_ALW
C612
C560
C560
0.1U
0.1U
C612
0.1U
0.1U
1 2
10
10
D34
D34
SDMK0340L-7-F
SDMK0340L-7-F
C599
C599
0.1U
0.1U
1 2
10
10
10
10
+3.3V_ALW
R552
R552 100K
100K
21
1 2
12
C6391UC639 1U
ICH_AZ_CODEC_RST#11,40
CLK_PCI_851217 LPC_LFRAME#11,33
LPC_LAD011,33 LPC_LAD111,33 LPC_LAD211,33 LPC_LAD311,33
CLKRUN#13,28
SIO_EXT_SMI#13 SIO_EXT_SCI#13
IRQ_SERIRQ13,28
SIO_A20GATE11
SIO_RCIN#11
LCD_BAK#26
NB_MUTE#40
ICH_PME#12,28
SMBCLK046,54 SMBDAT046,54
SMBCLK117,26,39 SMBDAT117,26,39
SMBCLK222,37 SMBDAT222,37
LED_MASK#38
IMVP_PWRGD13,44,51
RESET_OUT#44
NUM_LED#37
CLK_TP_SIO37 DAT_TP_SIO37
C620
C620 10U
10U
1 2
1 2
6.3
6.3
10
10
D D
C C
Place these caps close to ITE8512.
603
603
THERM_STP#39,52
CHARGE & BAT
CLK&LCD$thermal
G_thermal & LAN &media button
B B
CLK_PCI_8512
R55110R551 10
12
C637
C637
2.2P
2.2P
50
50
32KHz Clock.
ITE8512_XTAL2
R5470R547
A A
0
W1
W1
1 2
C632
C632 18P
18P
50
50
1 4 2 3
32.768KHZ
32.768KHZ
ITE8512_XTAL1
5
C624
C624 18P
18P
50
50
KSO[0..18]37 KSI[0..7]37
C600
C600
0.1U
0.1U
1 2
WRST#
3
D21 SDMK0340L-7-FD21 SDMK0340L-7-F
2 1
D20 SDMK0340L-7-FD20 SDMK0340L-7-F
2 1
D23 SDMK0340L-7-FD23 SDMK0340L-7-F
2 1
LCD_TST26
D17 SDMK0340L-7-FD17 SDMK0340L-7-F
2 1
ITE8512_XTAL1 ITE8512_XTAL2
ITE8512IX_JX
+3.3V_ALW
L61 BLM18AG121SN1D
L61 BLM18AG121SN1D
603
603
L60
L60
603
603
BLM18AG121SN1D
BLM18AG121SN1D
ITE8512IX_JX
12
C985
C985 1U_NC
1U_NC
0603
0603 10
10
KSO17 KSO16 KSO15 KSO14 KSO13 KSO12 KSO11 KSO10 KSO9 KSO8 KSO7 KSO6 KSO5 KSO4 KSO3 KSO2 KSO1 KSO0
KSI7 KSI6 KSI5 KSI4 KSI3 KSI2 KSI1 KSI0
CLK_PCI_8512
WRST#
LCD_BAK#
SMBCLK0 SMBDAT0
SMBCLK1 SMBDAT1
SMBCLK2 SMBDAT2
C561
C561
0.1U
0.1U
1 2
10
10
R735
R735
0.1U
0.1U
1 2
ITE8512IX pin12 connect to GND. ITE8512JX pin12 connect to 0.1uF, 1uF.
4
U30
U30
57
KSO17/GPC5
56
KSO16/GPC3
55
KSO15
54
KSO14
53
KSO13
52
KSO12/SLCT
51
KSO11/ERR
46
KSO10/PE
45
KSO9/BUSY
44
KSO8/ACK
43
KSO7/PD7
42
KSO6/PD6
41
KSO5/PD5
40
KSO4/PD4
39
KSO3/PD3
38
KSO2/PD2
37
KSO1/PD1
36
KSO0/PD0
65
KSI7
64
KSI6
63
KSI5
62
KSI4
61
KSI3/SLIN
60
KSI2/INT
59
KSI1/AFD
58
KSI0/STB
22
LPCRST/WUI4/GPD2
13
LPCCLK
6
LFRAME
10
LAD0
9
LAD1
8
LAD2
7
LAD3
93
CLKRUN/GPH0/ID0
5
SERIRQ
15
ECSMI/GPD4
23
ECSCI/GPD3
126
GA20/GPB5
17
LPCPD/WUI6/GPE6
4
KBRST/GPB6
14
WRST
16
PWUREQ/GPC7
19
L80HLAT/GPE0
20
L80LLAT/WUI7/GPE7
110
SMCLK0/GPB3
111
SMDAT0/GPB4
115
SMCLK1/GPC1
116
SMDAT1/GPC2
117
SMCLK2/GPF6
118
SMDAT2/GPF7
85
PS2CLK0/GPF0
86
PS2DAT0/GPF1
87
PS2CLK1/GPF2
88
PS2DAT1/GPF3
89
PS2CLK2/GPF4
90
PS2DAT2/GPF5
128
CK32K
2
CK32KE
1
VSS1
12
VSS2
27
VSS3
49
VSS4
91
VSS5
113
VSS6
122
VSS7
74
AVCC
75
AVSS
4
ITE8512E
ITE8512E LQFP-128L
LQFP-128L
KEYBOARD
KEYBOARD
LPC
LPC
SMBUS
SMBUS
PS/2
PS/2
3
ADC0/GPI0 ADC1/GPI1 ADC2/GPI2 ADC3/GPI3 ADC4/GPI4 ADC5/GPI5
ADC/DAC
ADC/DAC
PWM
PWM
IR/UART
IR/UART
LPC/FWH
LPC/FWH FLASH
FLASH
EGPC
EGPC
GPIO
GPIO
RING/PWRFAIL/LPCRST/GPB7
ADC6/GPI6 ADC7/GPI7
DAC0/GPJ0 DAC1/GPJ1 DAC2/GPJ2 DAC3/GPJ3 DAC4/GPJ4 DAC5/GPJ5
PWM0/GPA0 PWM1/GPA1 PWM2/GPA2 PWM3/GPA3 PWM4/GPA4 PWM5/GPA5 PWM6/GPA6 PWM7/GPA7
TACH0/GPD6 TACH1/GPD7
TMRI0/WUI2/GPC4 TMRI1/WUI3/GPC6
CRX0/GPC0
CTX0/GPB2 CRX1/GPH1/ID1 CTX1/GPH2/ID2
FLFRAME/GPG2/LF
FLRST/GPG0/TM
FLAD3/GPG6
FLAD0/SCE
EGAD/GPE1 EGCS/GPE2
EGCLK/GPE3
RI1/WUI0/GPD0 RI2/WUI1/GPD1
WUI5/GPE5
PWRSW/GPE4
GINT/GPD5
IT8512E/IX-L
IT8512E/IX-L
LQFP128-16X16-4-FX2
LQFP128-16X16-4-FX2
3
VBAT1
VCC
VSTBY1 VSTBY2 VSTBY3 VSTBY4 VSTBY5 VSTBY6
RXD/GPB0 TXD/GPB1
FLAD2/SO
FLAD1/SI
FLCLK
GPH3/ID3 GPH4/ID4 GPH5/ID5 GPH6/ID6 GPG1/ID7
3 11
26 50 92 114 121 127
HWPG
66 67 68
LCD_CBL_DET#
69
INVERTER_CBL_DET#
70 71
ADP_OC
72
SIO_SLP_S5#
73
R683 0_NCR683 0_NC R437 0_NCR437 0_NC
76 77 78 79 80 81
D15 SDMK0340L-7-FD15 SDMK0340L-7-F
24 25 28 29 30 31 32 34
47 48
120 124
108 109 119 123 94 95
SUS_ON
100 106 104
103 102 101 105
82 83 84
USB_L_SIDE_EN#
96
BID0
97
BID1
98
KSO18
99 107
18 21 35
112 125 33
+3.3V_RUN +3.3V_ALW
PANEL_BKEN
R494 0_NCR494 0_NC
1 2
IMVP_VR_ON
21
12
R553
R553 0_NC
0_NC
12 12
R513 0_UMAR513 0_UMA R510 0_DISR510 0_DIS
2
R556 0R556 0
1 2
C630
C630
0.1U
0.1U
1 2
10
10
HWPG 44
IMVP6_PROCHOT# 51
KB_DET# 37 LCD_CBL_DET# 26 INVERTER_CBL_DET# 26 PBAT_PRES# 54
SIO_SLP_S5# 13
CIR_ON/OFF# 37 ADAPT_TRIP_SEL 46 SIO_EXT_WAKE# 13 LAN_DISABLE# 42
EXPRCRD_PWREN# 30
ICH_RSMRST# 13 SIO_PWRBTN# 13
BREATH_LED# 38 BAT2_LED# 38 FAN1_PWM 39 PWM_VADJ 26 BAT1_LED# 38 KB_BACKLITE_EN 37 CAP_LED# 37
BEEP 40
FAN1_TACH 39
LID_SW# 37 MEDIA_INT# 37
WIRELESS_ON/OFF# 38 AUX_EN_WOWL 34
CIRRX 37
RUN_ON_1 44 HDDC_EN 36 IMVP_VR_ON 51
SUS_ON 49,53
USB_R_SIDE_EN# 54
ICH_CL_PWROK 6,13
EC_FLASH_SPI_DO 32 EC_FLASH_SPI_DIN 32 EC_FLASH_SPI_CS# 32 EC_FLASH_SPI_CLK 32
PS_ID 54
5V_ALW_ON 52
SNIFFER_GREEN# 38
USB_L_SIDE_EN# 35
MODC_EN 36
SIO_SLP_S3# 13 ACAV_IN 46 SNIFFER_PWR_SW# 38
USB_SIN_SIDE_EN# 35 MAIN_PWR_SW# 38
LCDVCC_TST_EN 26
2
1
UMA_PANEL_BKEN 6 ATI_PANEL_BKEN 19
SMBDAT0 SMBCLK0
SMBDAT1 SMBCLK1
SMBDAT2 SMBCLK2
SIO_SLP_S5#
IMVP_VR_ON SUS_ON HWPG
ADP_OC
LCD_BAK#
LCD_CBL_DET# INVERTER_CBL_DET#
Discrete
12
R459
R459 10K_DIS
10K_DIS
R458
R458 10K_UMA
10K_UMA
1 2
1 3
1 3
1 3
R511 100K_NCR511 100K_NC
R460 100K_NCR460 100K_NC R479 100KR479 100K
R454 0R454 0 R453 0_NCR453 0_NC
12
R776
R776 10K_NC
10K_NC
R475
R475 10K
10K
1 2
R457 100KR457 100K
1 2
12
R554 10K_NCR554 10K_NC
R456 100KR456 100K
+3.3V_ALW
R470
R470 10K_NC
10K_NC
1 2
R466
R466 10K
10K
1 2
R455 100KR455 100K
UMA
CHIPSET_ID1 (KSO18)
Title
Title
Title
Ultra I/O Controller ITE 8512
Ultra I/O Controller ITE 8512
Ultra I/O Controller ITE 8512
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
GM3 2B
GM3 2B
GM3 2B
Date: Sheet
Date: Sheet
Date: Sheet
BID1
BID0
0
1 0 0 0
0
00
0
0
01
0
QUANTA
QUANTA
QUANTA COMPUTER
GM3B (UMA) SSI (X00) PT (X01)1
1 0
ST (X02)
1
QT (A00)
0
(A01)
1
RP43
RP43
2
2.2KX2
2.2KX2
4
RP44
RP44
2
10KX2
10KX2
4
RP46
RP46
2
2.2KX2
2.2KX2
4
12
12 12 12
12
12
12
Board ID Straps
12
R461
R461 10K_NC
10K_NC
BID0 BID1 KSO18 USB_L_SIDE_EN#
R464
R464 10K
10K
1 2
VGA_IDENTIFY (USB_L_SIDE_EN#) 1 = Discrete Gfx. 0 = UMA.
GM3 (Dis) SSI (X00) PT (X01) ST (X02) QT (A00)
of
of
of
31 62Monday, March 24, 2008
31 62Monday, March 24, 2008
31 62Monday, March 24, 2008
+3.3V_ALW+RTC_CELL
IINP 46
ADAPT_OC 46
+3.3V_RUN
+3.3V_ALW
(A01)
5
4
3
2
1
21
D19
D19 SDMK0340L-7-F
SDMK0340L-7-F
40
40
21
D18
D18 SDMK0340L-7-F
SDMK0340L-7-F
40
40
RTC BATTERY
U34
U34
3
C642
C642
2.2U
2.2U
1 2
4
12
603
603
+RTC_1 +RTC
6.3
6.3
R562 1KR562 1K
OUT
IN
5/3# GND2SHDN
MAX1615EUK-T+_NC
MAX1615EUK-T+_NC
2 1
LTS_AAA-BAT-019-K01
LTS_AAA-BAT-019-K01
1
5
JRTC1
JRTC1
+PWR_SRC+3.3V_ALW
12
25
25
805
805
RTC-BATTERYRTC-BATTERY
C633
C633 1U_NC
1U_NC
16Mbit (2M Byte), SPI
12
R435
R435 10K
10K
U28
U28
EC_FLASH_SPI_CS#31
D D
C C
EC_FLASH_SPI_CLK31 EC_FLASH_SPI_DIN31 EC_FLASH_SPI_DO31
R498 15R498 15
1 2
R497 15R497 15
1 2
R436 15R436 15
1 2
C592
C592 22P
22P
50
50
1
CE#
6
SCK
5
SI
2
SO
3
WP#
SST25VF016B-50-4C-S2AF
SST25VF016B-50-4C-S2AF
VDD
HOLD#
VSS
8
7 4
+3.3V_ALW+3.3V_ALW
12
R499
R499 10K
10K
C593
C593
0.1U
0.1U
1 2
10
10
+RTC_CELL
1 2
603
603
10
10
C638
C638 1U
1U
B B
A A
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Ultra I/O Controller ECE5028
Ultra I/O Controller ECE5028
Ultra I/O Controller ECE5028
GM3 2B
GM3 2B
GM3 2B
1
of
of
of
32 62Monday, March 24, 2008
32 62Monday, March 24, 2008
32 62Monday, March 24, 2008
1
A A
PCIE_WAKE#13,30,34,42
COEX2_WLAN_ACTIVE34
COEX1_BT_ACTIVE_MINI34
T146 PADT146 PAD
CLK_PCIE_MINI3#17 CLK_PCIE_MINI317
PLTRST#6,12,25,30,34,42
CLK_LPC_DEBUG17
FOR DEBUG CARD
B B
PCI-Express TX and RX direct to connector
C C
+UIM_PWR
5
UIM_RESET +UIM_VPP
3
UIM_CLK
1
PCIE_RX3-12 PCIE_RX3+12
PCIE_TX3-12 PCIE_TX3+12
PCIE_MCARD3_DET#13
COEX2_WLAN_ACTIVE
C663
C663
R577
R577
33P_NC
33P_NC
100K_NC
100K_NC
1 2
1 2
50
50
PCIE_WAKE#13,30,34,42
T142 PADT142 PAD T144 PADT144 PAD T143 PADT143 PAD
CLK_PCIE_MINI2#17 CLK_PCIE_MINI217
PCIE_MCARD2_DET#13
JSIM1
JSIM1
VCC RST CLK
FOX_2WM610A2C-GM-7F
FOX_2WM610A2C-GM-7F
GND
DATA
VPP
Place as close as possible to WWAN connector
2
COEX2_WLAN_ACTIVE
R578 0_NCR578 0_NC R579 0_NCR579 0_NC
PCIE_RX1-12 PCIE_RX1+12
PCIE_TX1-12 PCIE_TX1+12
6 4
UIM_DATA
2
3
MiniCard Robson, UWB connector
R576 0R576 0
1 2
R575 0R575 0
1 2
1 2 1 2
+3.3V_RUN
J8
J8
1
WAKE#
3
RESERVED_1
5
RESERVED_2
7
CLKREQ#
9
GND1
11
REFCLK-
13
REFCLK+
15
GND2
17
UIM_C8
19
UIM_C4
21
GND4
23
PERn0
25
PERp0
27
GND6
29
GND7
31
PETn0
33
PETp0
35
GND9
37
RESERVED_3
39
RESERVED_4
41
RESERVED_5
43
RESERVED_6
45
RESERVED_7
47
RESERVED_8
49
RESERVED_9
51
RESERVED_10
FOX_AS0B226-S52N-7F
FOX_AS0B226-S52N-7F
3.3V_1 GND0
1.5V_1
UIM_PWR
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP
GND3
W_DISABLE#
PERST#
3.3VAUX1 GND5
1.5V_2
SMB_CLK
SMB_DATA
GND8
USB_D­USB_D+
GND10
LED_WWAN#
LED_WLAN#
LED_WPAN#
1.5V_3
GND11
3.3V_2
2 4 6 8 10 12 14 16
18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52
MiniCard WWAN connector
+3.3V_RUN
UIM_RESET +UIM_PWR+UIM_VPP UIM_CLK UIM_DATA
layout note:10 mil trace and 20 mil space for SIM card and UIM_PWR use 20mil
1 2
50
50
1 3 5 7
9 11 13 15
17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51
C2
C2 33P
33P
J9
J9
WAKE# RESERVED_1 RESERVED_2 CLKREQ# GND1 REFCLK­REFCLK+ GND2
UIM_C8 UIM_C4 GND4 PERn0 PERp0 GND6 GND7 PETn0 PETp0 GND9 RESERVED_3 RESERVED_4 RESERVED_5 RESERVED_6 RESERVED_7 RESERVED_8 RESERVED_9 RESERVED_10
FOX_AS0B226-S52N-7F
FOX_AS0B226-S52N-7F
C4
C4 33P
33P
1 2
50
50
UIM_PWR
UIM_DATA
UIM_RESET
W_DISABLE#
3.3VAUX1
SMB_CLK
SMB_DATA
LED_WWAN#
LED_WLAN# LED_WPAN#
ESD1
ESD1
1
1
2
2 334
SRV05-4.TCT
SRV05-4.TCT
3.3V_1 GND0
1.5V_1
UIM_CLK UIM_VPP
GND3
PERST#
GND5
1.5V_2
GND8
USB_D-
USB_D+
GND10
1.5V_3
GND11
3.3V_2
6 5
+3.3V_RUN
+3.3V_RUN
2 4 6 8 10 12 14 16
18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52
6 5 4
4
+1.5V_RUN
+UIM_PWR
R568 0R568 0
1 2
R567 0_NCR567 0_NC
1 2
R571 0R571 0
1 2
+1.5V_RUN
+UIM_PWR UIM_DATA UIM_CLK UIM_RESET +UIM_VPP
R570 0R570 0
1 2
R569 0_NCR569 0_NC
1 2
USBP5_D­USBP5_D+
C1
C1 33P
33P
1 2
50
50
1 2 1 2 1 2 1 2 1 2
USBP6_D­USBP6_D+
R809 0_NCR809 0_NC R808 0_NCR808 0_NC R807 0_NCR807 0_NC R806 0_NCR806 0_NC R805 0_NCR805 0_NC
C5
C5 33P
33P
1 2
50
50
+3.3V_RUN
5
PLTRST# 6,12,25,30,34,42 WPAN_RADIO_DIS_MINI# 13
SB_WPAN_PCIE_RST# 12
+3.3V_RUN
ICH_SMBCLK 13,30,34
ICH_SMBDATA 13,30,34
USB_MCARD3_DET# 13
LED_WPAN# 38
PLTRST# 6,12,25,30,34,42 WWAN_RADIO_DIS# 13 SB_WWAN_PCIE_RST# 12
ICH_SMBCLK 13,30,34 ICH_SMBDATA 13,30,34
USB_MCARD2_DET# 13
T93PAD T93PAD
C3
C3 1U
1U
1 2
10
10
603
603
FOR DEBUG CARD
LPC_LFRAME# 11,31 LPC_LAD3 11,31 LPC_LAD2 11,31 LPC_LAD1 11,31 LPC_LAD0 11,31
12
C644
C644
0.1U
0.1U
10
10
12
C650
C650
0.047U
0.047U
50
50
10
10
6
USBP6_D­USBP6_D+
12
C659
C659
0.047U
0.047U
10
10
USBP5_D­USBP5_D+
+3.3V_RUN+1.5V_RUN
12
12
C645
C645
C649
C649
33P
33P
33P
33P
10
10
50
50
PLW3216S900SQ2T1_NC
PLW3216S900SQ2T1_NC
12
C646
C646
0.1U
0.1U
10
10
12
C661
C661
0.047U
0.047U
7
L86
L86
1 2
1206
1206
1 2
R811 0R811 0
1 2
R810 0R810 0
12
C658
C658
0.047U
0.047U
10
10
PLW3216S900SQ2T1_NC
PLW3216S900SQ2T1_NC
12
C651
C651 33P
33P
50
50
34
L87
L87
1 2
R813 0R813 0
1206
1206
1 2
R812 0R812 0
1 2
12
C660
C660
0.047U
0.047U
10
10
+1.5V_RUN
12
C648
C648
0.047U
0.047U
10
10
C652
C652
4.7U
4.7U
1 2
6.3
6.3
603
603
34
Place caps close to connector.
12
+
+
6.3
6.3
7343
7343
8
ICH_USBP6- 12 ICH_USBP6+ 12
12
C647
C647
0.047U
0.047U
10
10
+3.3V_RUN
12
+
+
C656
C656 330U/6.3V_NC
330U/6.3V_NC
6.3
6.3
7343
7343
ICH_USBP5- 12 ICH_USBP5+ 12
Layout Note: R240 and R244 close to choke as possible to minimize stubs.
12
+
+
C657
C657
C655
C655
330U/6.3V_NC
330U/6.3V_NC
330U
330U
6.3
6.3
7343
7343
D D
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet
COMPUTER
WWAN, WPAN
WWAN, WPAN
WWAN, WPAN
GM3 2B
GM3 2B
GM3 2B
7
33 62Monday, March 24, 2008
33 62Monday, March 24, 2008
33 62Monday, March 24, 2008
of
of
of
8
1
2
3
4
5
6
7
8
12
C602
C602
0.1U
0.1U
+3.3V_WLAN
2
4
2
1
3
R446 0_NCR446 0_NC
1 2
+3.3V_WLAN
2
R445 0_NCR445 0_NC
1 2
2 1
D14
D14 SDMK0340L-7-F
SDMK0340L-7-F R440 0_NCR440 0_NC
1 2
Place caps close to connector.
12
C568
C568
0.047U
0.047U
10
10
Q49
Q49 2N7002W-7-F_NC
2N7002W-7-F_NC
31
Q48
Q48 2N7002W-7-F_NC
2N7002W-7-F_NC
31
Prevent backdrive when WoW is enabled.
1 2
10
10
805
805
ICH_SMBCLK 13,30,33
ICH_SMBDATA 13,30,33
WLAN_RADIO_DIS# 13
12
+
+
C902
C610
C610
4.7U
4.7U
C902 330U/6.3V_NC
330U/6.3V_NC
6.3
6.3
7343
7343
MiniCard WLAN connector
+1.5V_RUN
R483 0R483 0
1 2
WLAN_RADIO_OFF#
R484 0_NCR484 0_NC
1 2
WLAN_SMBCLK WLAN_SMBDATA
PLTRST# 6,12,25,30,33,42
SB_WLAN_PCIE_RST# 12
+3.3V_WLAN
T60PAD T60PAD T57PAD T57PAD
USB_MCARD1_DET# 13 LED_WLAN_OUT# 38
+1.5V_RUN
12
C584
C584
0.047U
0.047U
10
10
RP41
RP41
2.2KX2
2.2KX2
WLAN_SMBCLK
WLAN_SMBDATA
Suport for WoW
WLAN_RADIO_OFF#
+3.3V_WLAN
C565
C565
0.047U
0.047U
12
C575
C575
0.1U
0.1U
10
10
12
C580
C580
0.047U
0.047U
10
10
10
10
12
10
10
3.3V_1 GND0
1.5V_1
UIM_CLK UIM_VPP
GND3
PERST#
GND5
1.5V_2
GND8
USB_D-
USB_D+
GND10
1.5V_3
GND11
3.3V_2
+3.3V_WLAN+3.3V_WLAN
2 4 6 8 10 12 14 16
18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52
MINI1CLK_REQ#
12
A A
C662
C662 220P
220P
50
50
PCI-Express TX and RX direct to connector
B B
C C
AUX_EN_WOWL31
PCIE_WAKE#13,30,33,42 COEX2_WLAN_ACTIVE33 COEX1_BT_ACTIVE_MINI33
MINI1CLK_REQ#17
CLK_PCIE_MINI1#17 CLK_PCIE_MINI117
PCIE_MCARD1_DET#13
Non-iAMT
+PWR_SRC
Q53B
Q53B 2N7002DW-7-F_NC
2N7002DW-7-F_NC
2
12
R463
R463 100K_NC
100K_NC
PCIE_RX2-12 PCIE_RX2+12
PCIE_TX2-12 PCIE_TX2+12
12
61
R443
R443 100K_NC
100K_NC
12
12
R486
R486 100K_NC
100K_NC
5
R442
R442 200K_NC
200K_NC
T72 PADT72 PAD T66 PADT66 PAD T74 PADT74 PAD
+3.3V_ALW
34
Q53A
Q53A 2N7002DW-7-F_NC
2N7002DW-7-F_NC
R790 0R790 0 R520 0R520 0
MINI1CLK_REQ#
WLAN_ICH_CL_CLK1 WLAN_ICH_CL_DATA1 WLAN_ICH_CL_RST1#
Q54
Q54
FDC655BN_NC
FDC655BN_NC
6 5 2 1
3
12
R485
R485 470K_NC
470K_NC
1 2 1 2
+3.3V_WLAN
4
50
50
603
603
R471
R471 0
0
1 2
805
805
12
C587
C587 4700P_NC
4700P_NC
+3.3V_RUN
J7
J7
1
WAKE#
3
RESERVED_1
5
RESERVED_2
7
CLKREQ#
9
GND1
11
REFCLK-
13
REFCLK+
15
GND2
17
UIM_C8
19
UIM_C4
21
GND4
23
PERn0
25
PERp0
27
GND6
29
GND7
31
PETn0
33
PETp0
35
GND9
37
RESERVED_3
39
RESERVED_4
41
RESERVED_5
43
RESERVED_6
45
RESERVED_7
47
RESERVED_8
49
RESERVED_9
51
RESERVED_10
FOX_AS0B226-S68N-7F
FOX_AS0B226-S68N-7F
UIM_PWR
UIM_DATA
UIM_RESET
W_DISABLE#
3.3VAUX1
SMB_CLK
SMB_DATA
LED_WWAN#
LED_WLAN#
LED_WPAN#
D D
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet
WLAN
WLAN
WLAN
GM3 2B
GM3 2B
GM3 2B
7
of
of
of
34 62Monday, March 24, 2008
34 62Monday, March 24, 2008
34 62Monday, March 24, 2008
8
1
ICH_USBP0+12
ICH_USBP0-12
ICH_USBP1+12
A A
ICH_USBP1-12
USBP1_D+ USBP1_D-
1 2
DLW21HN900SQ2L
DLW21HN900SQ2L
R207 0_NCR207 0_NC
1 2
R203 0_NCR203 0_NC
1 2
1 2
DLW21HN900SQ2L
DLW21HN900SQ2L
R190 0_NCR190 0_NC
1 2
R183 0_NCR183 0_NC
1 2
Place ESD diodes as close as USB connector.
U11
U11
I/O1I/O
2
I/O3I/O
SRV05-4_NC
SRV05-4_NC
L20
L20
1206
1206
L17
L17
1206
1206
2
USBP0_D+
34
USBP0_D-
9
USBP1_D+ USBP1_D-
34
USBP0_D+
6
VP5VN
USBP0_D-
4
+USB_L_SIDE_PWR
3
R212 0_0805R212 0_0805
+5V_SUS
USB_L_SIDE_EN#31
FS2
FS2 455/5A_NC
455/5A_NC
1 2
12
12
10
10
C812
C812
0.1U
0.1U
10
10
10
805
805
4
2
3
4
12
C823
C823 10U_NC
10U_NC
Each channel is 1A
U12
U12
IN
EN1#
EN2#
TPS2062DR
TPS2062DR
GND
OUT1 OC1#
OUT2 OC2#
1
7 8
6 5
12
6.3
6.3
7343
7343
5
+USB_L_SIDE_PWR
+USB_L_SIDE_PWR
+
+
C262
C262 150U/6.3V_NC
150U/6.3V_NC
Side pair left
USB_OC0_1# 12
12
+
+
C828
C828 150U
150U
Place one 150uF cap by each USB connector.
6.3
6.3
7343
7343
6
+USB_L_SIDE_PWR +USB_L_SIDE_PWR
USBP0_D­USBP1_D­USBP0_D+ USBP1_D+
7
1 5 2 6 3 7 4
12
10
10
C264
C264
0.1U
0.1U
12
C265
C265
0.1U
0.1U
10
10
8
JUSB2
JUSB2 3-1734062-3
3-1734062-3
V1+ V2+ DATA1_L DATA2_L DATA1_H DATA2_H GND1 GND2
8
SHEIL3
SHEIL1
SHEIL4
SHEIL2
9
11
12
10
left side single USB port
B B
L50
L50
ICH_USBP8-12
ICH_USBP8+12
R257 0_0805R257 0_0805
+5V_SUS
USB_SIN_SIDE_EN#31
C C
FS1
FS1 455/5A_NC
455/5A_NC
1 2
12
10
12
C453
C453
0.1U
0.1U
10
10
10
10
805
805
U17
U17
2
IN
3
C458
C458 10U_NC
10U_NC
EN1#
4
EN2#
TPS2062DR
TPS2062DR
12
Each channel is 1A
OUT1 OC1#
OUT2 OC2#
GND
1
+USB_SIN_SIDE_PWR
7 8
+USB_SIN_SIDE_PWR
6 5
12
+
+
6.3
6.3
7343
7343
C441
C441 150U/6.3V_NC
150U/6.3V_NC
6.3
6.3
7343
7343
12
+
+
C867
C867 150U
150U
1 2
DLW21HN900SQ2L
DLW21HN900SQ2L
R334 0_NCR334 0_NC
1206
1206
1 2
R329 0_NCR329 0_NC
1 2
USB_OC8# 12
Place one 150uF cap by each USB connector.
9
U16
U16
I/O1I/O
2
I/O3I/O
SRV05-4_NC
SRV05-4_NC
+USB_SIN_SIDE_PWR
12
C408
C408
0.1U
0.1U
10
10
USBP8_D+
6
VP5VN
USBP8_D-
4
12
C409
C409
0.1U
0.1U
10
10
USBP8_D­USBP8_D+
+USB_SIN_SIDE_PWR
JUSB1
JUSB1
1
VCC
2
DATA-
3
DATA+
4
GND
FOX_3Q31804C-RB13B34-8F
FOX_3Q31804C-RB13B34-8F
USBP8_D-
34
USBP8_D+
Place ESD diodes as close as USB connector.
D D
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet
COMPUTER
External USB
External USB
External USB
GM3 2B
GM3 2B
GM3 2B
7
of
of
of
35 62Monday, March 24, 2008
35 62Monday, March 24, 2008
35 62Monday, March 24, 2008
8
1
Second HDD
SATA Connector.
A A
B B
C C
HDDC_EN31
D D
12
R304
R304 100K
100K
1
CON4
CON4
1
GND1
2
RXP
3
RXN
4
GND2
5
TXN
6
TXP
7
GND3
8
3.3V_0
9
3.3V_1
10
3.3V_2
11
GND4
12
GND5
13
GND6
14
5V_0
15
5V_1
16
5V_2
17
GND7
18
RSVD
19
GND8
20
12V_0
21
12V_1
22
12V_2
LD2822H-SA9L6
LD2822H-SA9L6
+3.3V_RUN
C395
+5V_HDD
+3.3V_ALW
2
60V
60V
C306
C306 10U/10V/0805
10U/10V/0805
12
R303
R303 100K
100K
61
Q37B
Q37B 2N7002DW-7-F
2N7002DW-7-F
C395 1U_10V_0603_NC
1U_10V_0603_NC
+15V_ALW
C398
C398
0.1U/16V_NC
0.1U/16V_NC
Place caps close to Second HDD connector.
C329
C329 1U/10V/0603
1U/10V/0603
+5V_ALW
Q36
Q36 FDC655BN
FDC655BN
6 524
1
3
R315
R315 100K
100K
12
34
5
60V
60V
C312
C312
0.1U/16V
0.1U/16V
HDD_EN_5V
Q37A
Q37A 2N7002DW-7-F
2N7002DW-7-F
SATA2_RXN0_C SATA2_RXP0_C
C402
C402 1000P/50V_NC
1000P/50V_NC
C332
C332
0.1U/16V
0.1U/16V
+5V_HDD
C319
C319
4.7U
4.7U
1 2
6.3
6.3
603
603
25
25
603
603
2
12
2
+3.3V_RUN
+5V_HDD
C375
C375
0.1U
0.1U
C410 3900P
C410 3900P C411 3900P
C411 3900P
C313
C313 1000P/50V
1000P/50V
for EMI
R270
R270 0_NC
0_NC
1 2
12
R293
R293
805
805
100K
100K
3
Master
CON6
CON6
SATA_TX2+ 11
+5V_RUN
SATA_TX2- 11
SATA_RX2- 11 SATA_RX2+ 11
+3.3V_RUN
+5V_HDD
3
C919
C919 10U/10V/0805_NC
10U/10V/0805_NC
Place caps close to SATA1 connector.
C904
C904 10U/10V/0805
10U/10V/0805
12 12
25
25 25
25
1
GND1
2
RXP
3
RXN
4
GND2
5
TXN
6
TXP
7
GND3
8
3.3V_0
9
3.3V_1
10
3.3V_2
11
GND4
12
GND5
13
GND6
14
5V_0
15
5V_1
16
5V_2
17
GND7
18
GND8
19
12V_0
20
12V_1
GS12201-1011-9F
GS12201-1011-9F
del pin18 and pin 22
C913
C913 1U_10V_0603_NC
1U_10V_0603_NC
Place caps close to Master connector.
C909
C909
C908
C908
1U/10V/0603
1U/10V/0603
0.1U/16V
0.1U/16V
SATA1_RXN0_C SATA1_RXP0_C
C912
C912
0.1U/16V_NC
0.1U/16V_NC
C905
C905
0.1U/16V
0.1U/16V
4
+3.3V_RUN
+5V_HDD
C910
C910
0.1U/16V_NC
0.1U/16V_NC
4
C549 3900P
C549 3900P
12
C543 3900P
C543 3900P
12
25
25 25
25
C911
C911 1000P/50V_NC
1000P/50V_NC
C906
C906 1000P/50V
1000P/50V
SATA_TX0+ 11 SATA_TX0- 11
SATA_RX0- 11 SATA_RX0+ 11
5
5
6
+3.3V_ALW
MODC_EN31
6
2
12
R295
R295 100K
100K
7
ODD Connector
JMOD1
JMOD1
GND1
RXP RXN
GND2
TXN
TXP
GND3
DP 5V_0 5V_1
MD GND4 GND5
MLX_47628-1012
MLX_47628-1012
12
R302
R302 100K
100K
+15V_ALW
61
Q35B
Q35B 2N7002DW-7-F
2N7002DW-7-F
60V
60V
7
1 2 3 4
SATA_RXN1_C
5
SATA_RXP1_C
6 7
8 9 10 11 12 13
12
C404
C404 10U_NC
10U_NC
10
10
805
805
+5V_ALW
Q70
Q70 SI4800BDY-T1-E3
SI4800BDY-T1-E3
8 762
5
R749 100KR749 100K
12
5
60V
60V
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
C869 0.01U/16VC869 0.01U/16V C868 0.01U/16VC868 0.01U/16V
+5V_MOD
+5V_MOD
12
C403
C403 1U/10V/0603
1U/10V/0603
10
10
Place caps close to connector.
+5V_MOD
3 1
12
C862
4
MOD_EN_5V
34
SATA (HDD&CD_ROM)
SATA (HDD&CD_ROM)
SATA (HDD&CD_ROM)
GM3 2B
GM3 2B
GM3 2B
C862 10U
10U
10
10
805
805
Q35A
Q35A 2N7002DW-7-F
2N7002DW-7-F
12
C866
C866
0.1U
0.1U
25
25
603
603
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
C380
C380
0.1U
0.1U
12
8
10
10
R748
R748 0_NC
0_NC
1 2
805
805
R324
R324 100K
100K
8
12
C382
C382
0.1U
0.1U
SATA_TX1+ 11 SATA_TX1- 11
SATA_RX1- 11 SATA_RX1+ 11
C381
C381 1000P/50V
1000P/50V
+5V_RUN
of
of
of
36 62Monday, March 24, 2008
36 62Monday, March 24, 2008
36 62Monday, March 24, 2008
1
+5V_RUN
CLK_TP_SIO31 DAT_TP_SIO31
A A
12
C478
C478 10P
10P
50
50
B B
MEDIA_INT#31
1
3
2
4
12
50
50
+3.3V_ALW
RP19
RP19
4.7KX2
4.7KX2
C479
C479 10P
10P
12
12
2
R259
R259 100K_0402
100K_0402
C278
C278 1U/10V/0603
1U/10V/0603
Touch Pad
L56 BLM11A601S603L56 BLM11A601S603 L57 BLM11A601S
L57 BLM11A601S
603
603
12
R266
R266 10K_0402
10K_0402
3
LID_SW#31
TP_CLK TP_DATA
+5V_RUN
12
12
C474
C474
C475
C475
10P
10P
10P
10P
50
50
50
50
8/17:add dioad to protect GPIO port
+3.3V_ALW
2
1
DA204U_NC
DA204U_NC D11
D11
3
SMBCLK222,31 SMBDAT222,31
HDD_LED38 WLAN_LED38 BT_LED38
12
C436
C436
0.1U
0.1U
10
10
+3.3V_ALW
+3.3V_ALW
12
10
10
C285
C285 10U_NC
10U_NC
4
4 805
805
4
+3.3V_ALW
R393
R393 100K
100K
1 2
12
12
C434
C434
0.047U
0.047U
C477
C477
0.1U
0.1U
C920
C920
0.047U
0.047U
10
10
Media Button
+5V_ALW
JMB1
JMB1
1
5V_PWR
2
CLK
3
DAT
4
INT
5
GND
6
LED1
7
LED2
8
LED3
9
3V_PWR
10
5V_LED
88501-1001
88501-1001
JTP1
JTP1
1 2 3 4 5 6
88502-0601
88502-0601
5
6
KSO[0..18]31 KSI[0..7]31
KB_DET#31
+3.3V_ALW
CP1
CP1
KSO10 KSO13
78 5
6
KSO17
3
4
KSO18
1
2
100PX4_NC
100PX4_NC
FOR EMI
R276 100KR276 100K
CAP_LED_R NUM_LED_R
7
KEYBOARD CONNECTOR
KSI7 KSI6 KSI4
12
R275 220R275 220
1 2
R274 220R274 220
1 2
CP3
CP3
78 5
6
3
4
1
2
100PX4_NC
100PX4_NC
CP5
CP5
78 5
6
3
4
1
2
100PX4_NC
100PX4_NC
50
50
CP7
CP7
78 5
6
1206
1206
3
4
1
2
100PX4_NC
100PX4_NC
KSI2 KSI5 KSI1 KSI3
KSI0 KSO5 KSO4 KSO7 KSO6 KSO8 KSO3 KSO1 KSO2 KSO0
KSO12 KSO16 KSO15 KSO13 KSO14
KSO9
KSO11 KSO10
KSO17 KSO18
KSO0 KSO12 KSO16 KSO15
KSO5 KSO4 KSO7 KSO6
KSI7 KSI6 KSI4 KSI2 KSI0
JKB1
JKB1
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
HRS_ FH28D-64(32)SB-1SH(86)
HRS_ FH28D-64(32)SB-1SH(86)
CP2
CP2
78
KSO14
5
6
KSO9
3
4
KSO11
1
2
100PX4_NC
100PX4_NC
CP4
CP4
KSO8
78
KSO3
5
6
KSO1
3
4
KSO2
1
2
100PX4_NC
100PX4_NC
50
50
CP6
CP6
KSI5
78
KSI1
5
6
1206
1206
KSI3
3
4
1
2
100PX4_NC
100PX4_NC
8
100P CAPS CLOSE TO JKB1
4
+3.3V_RUN
R264
R264 100K
100K
1 2
Q31
Q31 2N7002W-7-F
2N7002W-7-F
R263
R263 100K
100K
1 2
Q30
Q30 2N7002W-7-F
2N7002W-7-F
+3.3V_RUN
Consumer IR
+3.3V_ALW
+3.3V_ALW
12
CIRRX
CIRRX31
C C
CIR_ON/OFF#31
D D
CIR_VCC
+5V_ALW +3.3V_ALW
2
1
12
10
10
805
805
R844
R844 10K_NC
10K_NC
1 2
Q78
Q78 DDTC124EUA-7-F_NC
DDTC124EUA-7-F_NC
1 3
R840
R840
R585
R585
10K
10K
100
100
1 2
12
C666
C666
C667
C667
0.1U
0.1U
4.7U
4.7U
10
10
31
Q32
Q32
2
2N7002W-7-F_NC
2N7002W-7-F_NC
CIR_VCC
2
U36
U36
4
IRTX
3
VCC
2
GND1
1
GND2
SIL_TSOP36136TS
SIL_TSOP36136TS
3
CAP_LED#31
NUM_LED#31
+5V_RUN
2
31
2
13
47K
47K
Q34
Q34 DDTA114YUA-7-F
2
31
2
DDTA114YUA-7-F
10K
10K
CAP_LED_R
10K
10K
+5V_RUN
47K
47K
13
Q33
Q33 DDTA114YUA-7-F
DDTA114YUA-7-F
NUM_LED_R
5
+3.3V_RUN
KB_LED_DET#13
6
+5V_RUN +KB_LED
R252 33_NCR252 33_NC
+KB_LED
R283 100K_NCR283 100K_NC
12
12
LED_PWM
3
KB_BACKLITE_EN31
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Key board Illumination
FS3
FS3 1206L050YR
1206L050YR
1 2
1 2
J4
1
1
2
KB_LED_DEC# LED_PWM
Q46
Q46 SI2304BDS-T1-E3
SI2304BDS-T1-E3
TOUCH PAD, BULE TOOTH & FIR
TOUCH PAD, BULE TOOTH & FIR
TOUCH PAD, BULE TOOTH & FIR
GM3 2B
GM3 2B
GM3 2B
2
3
3
4
4
88502-0401J488502-0401
1
2
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
7
+KB_LED
10
10
37 62Monday, March 24, 2008
37 62Monday, March 24, 2008
37 62Monday, March 24, 2008
8
12
C921
C921
0.1U
0.1U
of
of
of
A
0_NC
0_NC
R434
R434
1 2
+3.3V_RUN
12
2
Q42
Q42 2N7002W-7-F
2N7002W-7-F
R4330R433 0
31
+5V_RUN
13
47K
47K
Q43
Q43 DDTA114YUA-7-F
HDD_LED_L
DDTA114YUA-7-F
R430 220R430 220
1 2
2
10K
10K
HDD activity LED.
LED_MASK#31
4 4
SATA_ACT#
BT / UWB LED
R427
R427 100K
100K
1 2
SATA_ACT#11
3 3
2 2
R797
R797 100K
100K
BAT1_LED#31
BAT2_LED#31
1 1
1 2
A
Q58
Q58 2N7002W-7-F
2N7002W-7-F
SATA_ACT#
+3.3V_ALW+3.3V_ALW
2
BAT2_ACT#
31
+5V_ALW2
Q55
Q55
13
DDTA114YUA-7-F
DDTA114YUA-7-F
47K
47K
2
10K
10K
+3.3V_ALW
Q57
Q57
13
DDTA114YUA-7-F
DDTA114YUA-7-F
47K
47K
2
10K
10K
B
LED_WLAN_OUT#34
HDD_LED 37
+3.3V_RUN+3.3V_RUN
R566
R566 100K
100K
LED_WPAN#33
Battery status.
BAT1_LED 54
BAT2_LED 54
B
+3.3V_WLAN
R449
R449
2
100K
100K
1 2
Q50
Q50 2N7002W-7-F
2N7002W-7-F
+3.3V_RUN
12
0_NC
0_NC
R574
R574
LED_MASK#31
1 2
1 2
This circuit is only needed if the platform has the SNIFFER.
BREATH_LED#31
SNIFFER_GREEN#31
2
Q61
Q61 2N7002W-7-F
2N7002W-7-F
C
WLAN
+5V_RUN
WLAN_ACT#
31
R5730R573 0
BT_ACT#
31
2
10K
10K
+5V_RUN
2
10K
10K
Power & Suspend.
R557
R557
2
100K
100K
1 2
31
Q56
Q56 2N7002W-7-F
2N7002W-7-F
R441
R441
2
100K
100K
1 2
Q44
Q44 2N7002W-7-F
2N7002W-7-F
FOR RF SPRING SW LED
DDTA114YUA-7-F
DDTA114YUA-7-F
SNIFFER_G_ACT#
31
C
13
47K
47K
WLAN_LED_L
13
47K
47K
BT_LED_L
Q51
Q51 DDTA114YUA-7-F
DDTA114YUA-7-F
R448 220R448 220
1 2
Q60
Q60 DTA114YUA
DTA114YUA
R565 220R565 220
1 2
+5V_SUS+3.3V_SUS +5V_SUS
53
U35
U35
2 4
TC7SZ04FU(T5L,F,T)
TC7SZ04FU(T5L,F,T)
+5V_SUS+3.3V_SUS+3.3V_SUS
Q45
Q45
2
10K
10K
BR_LED BREATH_LEDBR_LED#
13
47K
47K
2
WLAN_LED 37
R563 220R563 220
Sniffer LED
R431 220R431 220
U14
U14
6
I/O1I/O
VP5VN
4
I/O3I/O
SRV05-4_NC
SRV05-4_NC
BT_LED 37
12
USBP9_D­USBP9_D+
D
WIRELESS_ON/OFF#31
SNIFFER_PWR_SW#31
MAIN_PWR_SW#31
SLED2:AP detection
Biometric
S_LED1SNIFFER G_R
12
+3.3V_RUN
D
E
SW1
Sniffer Switch
+3.3V_ALW
12
R587
R587 100K
100K R586 0R586 0
12
C669
C669
1U_NC
1U_NC
603
603
10
10
+3.3V_ALW
PC73
PC73
1U_NC
1U_NC
603
603
10
10
+3.3V_ALW
R288
R288
100K
100K
C336
C336
1U
1U
603
603
1000P
1000P
ICH_USBP9-12
ICH_USBP9+12
Title
Title
Title
SWITCH, KEYBOARD & LED
SWITCH, KEYBOARD & LED
SWITCH, KEYBOARD & LED
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Sniffer Switch ON/OFF
+3.3V_ALW
12
R281
R281 100K
100K R280 0R280 0
12
SNIFFER1
8/17:add dioad to protect GPIO port
Power Switch
R279 10KR279 10K
C972
C972
GM3 2B
GM3 2B
GM3 2B
POWER_ SW_IN0#
50
50
C973
C973
1000P
1000P
50
50
1000P
1000P
1 2
PLW3216S900SQ2T1_NC
PLW3216S900SQ2T1_NC
R297 0R297 0
1 2
R298 0R298 0
1 2
QUANTA
QUANTA
QUANTA COMPUTER
SW1
ON
1
G
2
3
LSS12P-PC-V-T/R
LSS12P-PC-V-T/R
2
1
3
+3.3V_ALW
1
3
SNIFFER1 S_LED1
BREATH_LED POWER_ SW_IN0#
C974
C974
50
50
+1.8V_RUN
L37
L37
34
1206
1206
E
S
DA204U_NC
DA204U_NC D13
D13
2
DA204U_NC
DA204U_NC D12
D12
+3.3V_RUN
USBP9_D­USBP9_D+
38 62Monday, March 24, 2008
38 62Monday, March 24, 2008
38 62Monday, March 24, 2008
JSW1
JSW1
1
GND
2
SSW1
3
SLED1
4
SLED2
5
GND
6
PLED
7
PSW
JST_SM07B-SHLS-TF
JST_SM07B-SHLS-TF
C859
C859
1 2
12P/50V_NC
12P/50V_NC
88501-0601
88501-0601
of
of
of
J2
J2
1 2 3 4 5 6
1
2
3
4
5
6
7
8
D7
D7 SSM34PT_NC
SSM34PT_NC
R702
R702 0
0
1 2
10
10
805
805
1 2
805
805
C196
C196
2.2U
2.2U
+5V_RUN
A A
12
10
10
+5V_RUN
+FAN1_VOUT
FAN1_PWM31
C782
C782
0.1U
0.1U
FAN1_PWM
R703 4.7KR703 4.7K
21
J6
J6
4
4
3
3
2
2
1
1
MLX_53261-0471
MLX_53261-0471
FAN1_TACH 31
10/20mils
REM_DIODE1_P
12
C740
50
50
C740 2200P_NC
2200P_NC
REM_DIODE1_N H_THERMDA
H_THERMDC
Q68
Q68
MMST3904-7-F
MMST3904-7-F
H_THERMDA3
B B
H_THERMDC3
2
1 3
cap should close to thermal IC
+3.3V_RUN
Q13
Q13
2
2N7002W-7-F
2N7002W-7-F
SMBDAT117,26,31
3 1
12
R71
R71 10K
10K
+3.3V_RUN
12
R84
R84 10K
10K
THERM_SDA
+5V_RUN
2
1
DA204U_NC
DA204U_NC D5
D5
FAN1_PWM
3
8/17:add diode to protect GPIO port
2200P
2200P
C70
C70 2200P
2200P
C69
C69
+3.3V_RUN
12
50
50
12
50
50
U4
U4
1
VDD
2
DP1
3
DN1
4
DP2
5
DN2
SMSC_EMC 1423
SMSC_EMC 1423
12
C74
C74
0.1U
0.1U
10
10
SCL
SDA
ALERT#
SYS_SHDN#
GND
+3.3V_RUN
THERM_SCL
10
THERM_SDA
9 8 7 6
SYS_SHDN#
+3.3V_RUN
2
Q15
Q15 2N7002W-7-F
2N7002W-7-F
2
close to IC
Q11
Q11 2N7002W-7-F
2N7002W-7-F
12
R891MR89 1M
31
12
10
10
C92
C92
0.1U
0.1U
THERM_ALERT#THERM_ALERT#_C
31
THERM_STP# 31,52
31
Q14
Q14 2N7002W-7-F
2N7002W-7-F
2
THERM_ALERT# 13
+3.3V_RUN
Q16
Q16
2
2N7002W-7-F
C C
D D
SMBCLK117,26,31
1
3 1
2N7002W-7-F
2
THERM_SCL
3
+3.3V_RUN
OTP 85 degree C
R70 10K/FR70 10K/F
R83 6.8K/FR83 6.8K/F
4
1 2 1 2
THERM_ALERT#_C SYS_SHDN#
5
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
6
Date: Sheet
FAN & THERMAL
FAN & THERMAL
FAN & THERMAL
GM3 2B
GM3 2B
GM3 2B
7
of
of
of
39 62Monday, March 24, 2008
39 62Monday, March 24, 2008
39 62Monday, March 24, 2008
8
1
+5V_SPK_AMP
R408
R408
R409
R409
100K
100K
100K_NC
100K_NC
1 2
1 2
A A
1 2
12
C881
C881 1U
1U
603
603 10
10
Layout Note: Close to U1 Pin 34
B B
SENSEA
12
R549
R549
C C
39.2K/F
39.2K/F
31
2
Q59
Q59 2N7002W-7-F
2N7002W-7-F
D D
NB_MUTE#31
AUD_AMP_GAIN1 AUD_AMP_GAIN2
R407
R407
R410
R410
100K_NC
100K_NC
100K
100K
1 2
+5V_SPK_AMP
12
12
C880
C880
C882
C882
1U
1U
0.1U
0.1U
603
603 10
10
10
10
Layout Note: Place close U23 pin 23.
Q74
Q74
2N7002W-7-F
2N7002W-7-F
R539
R539
5.1K/F
5.1K/F
1 2
12
C627
C627 1000P
1000P
50
50
HP1_JD 41
Layout Note: Close to U1 Pin 13
+5V_SPK_AMP
AUD_SPK_ENABLE#
EAPD#
2
Q71
Q71 2N7002W-7-F
2N7002W-7-F
2
Q73
Q73 2N7002W-7-F
2N7002W-7-F
1
2
GAIN1 GAIN2 GAIN
0 0 6dB 0 1 10dB 1 0 15.6dB 1 1 21.6dB
12
12
R779
R779 20K/F
20K/F
31
31
+VDDA
R758
R758
R759
R759
100K
100K
100K
100K
1 2
1 2
31
31
2
3
LIN- HP2_OUT_L HP2_OUT_RRIN-
12
C503
C503 47P_NC
47P_NC
50
50
12
C502
C502 47P_NC
47P_NC
50
50
EMI Request
R558 0 805R558 0 805
1 2
R450 0 603R450 0 603 R555 0 603R555 0 603 R373 0 603R373 0 603 R310 0 603R310 0 603
12 12 12 12
18
C=1/2*pi*400*amp input R
C519 0.01U 501206C519 0.01U 501206
AUD_FRONT_R AUD_HP2_L0
AUD_HP2_R0
SENSEB
R780
R780
39.2K/F
39.2K/F
2
Q75
Q75 2N7002W-7-F
2N7002W-7-F
ICH_AZ_CODEC_BITCLK11
ICH_AZ_CODEC_SDIN011
ICH_AZ_CODEC_SDOUT11
ICH_AZ_CODEC_SYNC11
ICH_AZ_CODEC_RST#11,31
1206
1206
C525
50
C525
50
C524
C524
R782
R782
5.1K/F
5.1K/F
1 2
12
C914
C914 1000P
1000P
50
50
MIC1_JD 41HP2_JD41
FB_60ohm+-25%_100MHz _3A_0.05ohm DC
R493 0_0805R493 0_0805
R71,R69 close to U1, Let DVDD width be 10-mils
+3.3V_RUN
DMIC_DATA41
R4870R487
R491
R491 10K_NC
10K_NC
0
1 2
EAPD#
DMIC_CLK41
2
1 2
C518 0.01U 501206C518 0.01U 501206
1 2
2.2U
2.2U
AUD_HP2_L0_R HP2_OUT_L
2.2U501206
2.2U501206
+VDDA
12
12
C601
C601 1U
1U
10
10 603
603
12
AUD_HP2_R0_R
12
19
+3.3V_RUN
DVDD
12
C617
C617 1U
1U
10
10 603
603
R525 33R525 33
1 2
DMIC_DATA
DMIC_DATA
1 2 1 2
C505 1U 10603C505 1U 10603
1 2
12
12
C482
C482
C481
C481
1U
1U
10U
10U
603
603
805
805
10
10
10
10
C597
C597
0.1U
0.1U
10
10
R512 0_NCR512 0_NC
EAPD#
R518 0_NCR518 0_NC
DVDD
R785 0R785 0
EAPD#
R489 0R489 0
R488 0_NCR488 0_NC R515 0R515 0
3
R708
R708
15
2.2K
2.2K
HP2_OUT_R
2.2K
2.2K
R737
R737
AUD_SPK_ENABLE# AMP_HP2_EN REGEN AUD_AMP_GAIN1 AUD_AMP_GAIN2
C483 1U
C483 1U
1 2
R492 0_NCR492 0_NC
C591 1000P_NCC591 1000P_NC
1 2
AZ_CODEC_SDIN0
R514 0_NCR514 0_NC
12
C522
C522 220P
220P
50
50
LIN-AUD_FRONT_L RIN-
27 26
24 23 22 25 31 32
17
10
16805
16805
12 11
14 13
C877
C877 1U
1U
1 2
805
805 16
16
1 9
40
6 8
5 10 11
18 19 20
2
3
47 48
4
7
4
12
C521
C521 220P
220P
50
50
15
SPKR_INL-
INTERNAL SPEAKER AMP
U20
U20
3 2
9
SPKR_INL+ SPKR_INR+
HP_INL HP_INR
BIAS SPKR_EN# HP_EN REG_EN GAIN1 GAIN2
HPVDD CPVDD
C1P C1N CPGND
PVSS CPVSS
TPA6040A4
TPA6040A4
TPA6040A4
TPA6040A4 QFN 32PIN
QFN 32PIN
OUTL+
OUTL-
OUTR+
OUTR-
HPL
HPR
SPKR_INL­SPKR_INR-
VOUT
VDD
PVDD_8
PVDD_18
GND_28 PGND_5
PGND_21
6 7
20 19
16 15
4 1
29 30
8 18
28 5 21
AZALIA (HD) CODEC
U31
U31
DVDD_CORE DVDD_CORE DVDD
HDA_BITCLK HDA_SDI HDA_SDO HDA_SYNC HDA_RST#
NC/CD_L NC/CD_GND NC/CD_R
DMIC0/VOL_UP/GPIO1 DMIC1/VOL_DN/GPIO2
DMIC_CLK/GPIO0/SPDIF_IN SPDIF_OUT_0
DVSS1 DVSS2
92HD73C1X5PRGXB2X
92HD73C1X5PRGXB2X
4
GPIO4/VREFOUT_E
AVDD AVDD
SENSE_A SENSE_B
PORT_A_L
PORT_A_R
NC/VREFOUT_A
PORT_B_L
PORT_B_R
VREFOUT_B
PORT_C_L PORT_C_R
VREFOUT_C
PORT_D_L PORT_D_R
VREFOUT_D
PORT_E_L
PORT_E_R
PORT_F_L
PORT_F_R
GPIO3/VREFOUT_F
PORT_G_L
PORT_G_R
PORT_H_L PORT_H_R
PC_BEEP
CAP2
VREFFILT
AVSS1 AVSS2
5
12
C879
C879
0.033U
0.033U
16
16
AUD_SPK_L1 AUD_SPK_L2
AUD_SPK_R1 AUD_SPK_R2
SPKR_INL­SPKR_INR-
+5V_SPK_AMP
25 38
13 34
39 41 37
21 22 28
23 24 29
35 36 32
14 15 31
16 17 30
43 44
45 46
12 33 27
26 42
5
+5V_SPK_AMP
R756 0_NCR756 0_NC
AUD_HP2_L1 41
AUD_HP2_R1 41
12
Layout Note: Place close to pin 18.
12
SENSEA SENSEB
AUD_FRONT_L AUD_FRONT_R
AUD_HP2_L0 AUD_HP2_R0
AUD_PC_BEEP
12
R753
R753 100K
100K
1 2
REGEN
+5V_SPK_AMP
12
C480
C480
C488
C488
10U
10U
1U
1U
805
805
603
603
10
10
10
10
+VDDA+3.3V_RUN
12
C623
C623 1U
1U
10
10 603
603
AUD_MIC1_VREFO 41
C613
C613 10U
10U
805
805 10
10
NB_MUTE# HP1_JD
12
C495
C495
0.1U
0.1U
10
10
C590
C590
0.1U
0.1U
10
10
AUD_HP1_L 41
AUD_HP1_R 41
AUD_INT_MIC_IN 41
AUD_MIC_L 41 AUD_MIC_R 41
12
C605
C605 1U
1U
603
603 10
10
6
AUD_SPK_R1 AUD_SPK_R2 AUD_SPK_L1 AUD_SPK_L2
+3.3V_RUN
12
C533
C533
0.1U
0.1U U23
U23 TC7SZ08FU(T5L,F,T)
TC7SZ08FU(T5L,F,T)
10
10
5
1 2
3
12
C507
C507 1U
1U
603
603 10
10
Layout Note: Place close U23.
12
C538
C538
0.1U
0.1U
10
NB_MUTE# HP2_JD
10
1 2
6
1 2
4
+VDDA
12
C506
C506 1U
1U
603
603 10
10
+3.3V_RUN
7
C863
C861
C861 100P
100P
50
50
AMP_HP1_SHUD_L#
U25
U25 TC7SZ08FU(T5L,F,T)
TC7SZ08FU(T5L,F,T)
5
3
C622 1U
C622 1U
1 2
C863 100P
100P
1 2
50
50
R429 0_NCR429 0_NC
1 2
EAPD#
AMP_HP2_EN_L
4
EAPD#
R541 10KR541 10K
BEEP2AUD_PC_BEEP BEEP1
10603
10603
12
R544
R544
2.2K
2.2K
Title
Title
Title
Azelia CODEC
Azelia CODEC
Azelia CODEC
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
GM3 2B
GM3 2B
GM3 2B
Date: Sheet
Date: Sheet
Date: Sheet
7
C864
C864 100P
100P
1 2
50
50
+3.3V_RUN
12
C532
C532
0.1U
0.1U
10
10
5
1 2
12
1 2
SPKR_INR-
C878
C878
0.033U
0.033U
16
16
12
C484
C484 1U
1U
603
603 10
10
C537
C537
0.1U
0.1U
10
10
1 2
4
U22
U22 TC7SZ08FU(T5L,F,T)
TC7SZ08FU(T5L,F,T)
3
R757 2.2K_NCR757 2.2K_NC
R755
R755 0_NC
0_NC
+3.3V_RUN
5
3
BLM21PG600SN1D
BLM21PG600SN1D
L81
L81
12
FB_60ohm+-25%_100MHz
C876
C876
_3A_0.05ohm DC
10U
10U
805
805
Layout Note:
10
10
Place close to pin 8.
Close to U31
4
12
QUANTA
QUANTA
QUANTA COMPUTER
R438 0_NCR438 0_NC
1 2
4
TC7SZ08FU(T5L,F,T)
TC7SZ08FU(T5L,F,T)
+VDDA
J3
J3
1
1
2
2
3
3
4
4
MLX_48227-0401
MLX_48227-0401
C865
C865 100P
100P
1 2
50
50
12
U24
U24
+5V_RUN+5V_SPK_AMP
C614
C614
0.1U
0.1U
16
16
53
1 2
603
603
U33
U33 74LVC1G86GW
74LVC1G86GW
8
AMP_HP1_SHUD# 41
+VDDA
AMP_HP2_EN
12
40 62Monday, March 24, 2008
40 62Monday, March 24, 2008
40 62Monday, March 24, 2008
8
BEEP 31
of
of
of
SPKR 13
1
2
3
4
5
6
+3.3V_RUN
7
8
Headphone Jack Stereo MIC Jack
A A
R289
R289 100K
100K
1 2
CAMERA_CBL_DET#
DMIC_DATA40 DMIC_CLK40
CAMERA_CBL_DET#13
+3.3V_CCD trace width use 25 mils
+3.3V_RUN
B B
JAUDIO1
+3.3V_RUN
805
805 16
16
4
JAUDIO1
48227-1501
48227-1501
JP11
JP11 HS8102E
HS8102E
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
+VDDA
R5811KR581 1K
INT_MIC_C_L+
C664
C664
112
2.2U
2.2U
805
805
1 2
2
10
10
INT_MIC_2_L+ INT_MIC_2_L-
INT_MIC_C_L-
C668
C668
2.2U
2.2U
805
805
1 2
10
10
1 2
R5801KR580 1K
1 2
R5831KR583 1K
1 2
1
R5821KR582 1K
1 2
5
1 2
C665
C665
2.2U
2.2U
805
805
1 2
10
10
1 2
C962 0.1U
C962 0.1U
16603
16603
12 12
C963 0.1U
C963 0.1U
16603
16603
2
D22
D22 SM05_NC
SM05_NC
Layout Note:
3
Place close to CODEC.
+VDDA
R584
R584 100K
100K
R835
R835 100K
100K
INT_MIC_L1+ INT_MIC_L1- INT_MIC_L0-
3 2
U51A
U51A
8
LM358ADR2G
LM358ADR2G
1
4
R832 10KR832 10K
R833 10KR833 10K
6
12 12
AUD_MIC1_VREFO40
AUD_MIC_L40
JACK 2 (MIC)
JACK 1 (HP2)
JACK 3 (HP)
R419
R419
MIC1_JD
C C
+3.3V_RUN
100K
100K R414
R414
100K
100K R412
R412
100K
100K
12
12
12
HP2_JD
HP1_JD
AUD_MIC_R40
AUD_HP1_L1 AUD_HP1_R1
MIC1_JD40 HP2_JD40 HP1_JD40
AUD_HP2_L140 AUD_HP2_R140
MIC1_JD HP2_JD HP1_JD
15
C567 2.2UF
C567 2.2UF
AUD_HP1_L40
AUD_HP1_R40
D D
1
1 2
50V1206
C586 2.2UF
C586 2.2UF
12
50V1206
1 2
50V1206
50V1206
AUD_HP1_L0 AUD_HP1_R0
C986
C986 220P
220P
50
50
12
C987
C987 220P
220P
50
50
AUD_HP1_L2 AUD_HP1_R2
AMP_HP1_SHUD#40
15
R738
R738
2.2K
2.2K
1 2
2.2K
2.2K
1 2
R739
R739
C578 2.2U
C578 2.2U
1206 25
1206 25
2
1 2
AUD_HP1_R0
1 2
C556
C556
2.2U
2.2U
1206
1206 10
10
U29
U29
13
INL
15
INR
14
SHDNR
18
SHDNL
1
C1P
3
C1N
5
PVSS
7
SVSS
MAX4411ETP
MAX4411ETP
OUTL
OUTR
NC1 NC2 NC3 NC4 NC5
NC6 SVDD PVDD PGND SGND
3
AUD_HP1_R1
11 4 6 8 12 16 20 10 19 2 17
C557
C557 1U
1U
1 2
AUD_HP1_L1AUD_HP1_L0
9
Array Microphone & Camera
L36 0 603L36 0 603
22 ohm
22 ohm
L35
L41 BLM18AG121SN1D
L41 BLM18AG121SN1D
603
603
ICH_USBP4-12
ICH_USBP4+12
R826 0R826 0
INT_MIC_L0+
+3.3V_CCD
12
12
C364
C364
C373
C373
10U
10U
10U
10U
805
805
805
805
10
10
10
10
PLW3216S900SQ2T1_NC
PLW3216S900SQ2T1_NC
R312 0R312 0
R313 0R313 0
+VDDA
U51B
U51B
8
LM358ADR2G
LM358ADR2G
5 6
4
1 2
R837 100KR837 100K
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
JCAMERA1
JCAMERA1
USBP4_D­USBP4_D+
12
16603
16603
1 2 3 4 5 6 7 8 9 10
I-pex 20374-010E-1
I-pex 20374-010E-1
AUD_INT_MIC_IN 40
41 62Monday, March 24, 2008
41 62Monday, March 24, 2008
41 62Monday, March 24, 2008
8
of
of
of
USBP4_D+ USBP4_D­+3.3V_CCD
DMIC_DATA_R DMIC_CLK_R
603L35
603
CAMERA_CBL_DET#
DMIC_DATA
12
C358
C358 33P_NC
33P_NC
50
50
DMIC_CLK
12
C357
C357 33P_NC
33P_NC
50
50
L46
L46
1 2
34
1206
1206
1 2
1 2
12
C971
C971
0.1U
0.1U
10
10
C970 0.1U
INT_MIC_IN_OP
7
AUDIO CONN
AUDIO CONN
AUDIO CONN
GM3 2B
GM3 2B
GM3 2B
7
C970 0.1U
QUANTA
QUANTA
QUANTA COMPUTER
5
C456
C456
4.7U
4.7U
10
10 X5R
X5R 805
805
Y1
25MHzY125MHz
C393
C393
0.1U
0.1U
10
10 X7R
X7R
C420
C420
0.1U
0.1U
10
10 X7R
X7R
C401
C401
0.1U
0.1U
10
10 X7R
X7R
C451
C451
0.1U
0.1U
10
10 X7R
X7R
LAN_XTALO
12
LAN_XTALI
C383
C383 27P
27P
50
50 NPO
NPO
Core Power Decoupling
C391
C391
C450
C450
C445
C392
C392
0.1U
0.1U
10
10 X7R
X7R
0.1U
0.1U
10
10 X7R
X7R
C449
C449
0.1U
0.1U
10
10 X7R
X7R
PCIE_RX6+/GLAN_RX+12
PCIE_RX6-/GLAN_RX-12 PCIE_TX6+/GLAN_TX+12 PCIE_TX6-/GLAN_TX-12
SB_LOM_PCIE_RST#12
LAN_DISABLE#31
C445
0.1U
0.1U
0.1U
0.1U
10
10
10
10
X7R
X7R
X7R
X7R
+1.2V_LOM
PCIE_WAKE#13,30,33,34
PLTRST#6,12,25,30,33,34 CLK_PCIE_LOM17
CLK_PCIE_LOM#17
C370
C370
C396
C396
0.1U
0.1U
0.1U
0.1U
10
10
10
10
X7R
X7R
X7R
X7R
L54
L54 BLM18AG601SN1D
BLM18AG601SN1D
1 2
L47
L47 BLM18AG601SN1D
BLM18AG601SN1D
1 2
L45
L45 BLM18AG601SN1D
BLM18AG601SN1D
1 2
L44
L44 BLM18AG601SN1D
BLM18AG601SN1D
1 2
C387 0.1U
C387 0.1U
R337 0R337 0 R336 0_NCR336 0_NC
R385
R385
+3.3V_RUN
4.7K
4.7K
C369
C369
0.1U
0.1U
10
10 X7R
X7R
+1.2V_LOM +2.5V_LOM
+LAN_AVDDL
C452 4.7U/10V/0805C452 4.7U/10V/0805
+LAN_GPHYPLLVDDL
C397 4.7U/10V/0805C397 4.7U/10V/0805
+LAN_PCIEPLLVDDL
C379 4.7U/10V/0805C379 4.7U/10V/0805
+LAN_PCIESDSVDDL
C378 4.7U/10V/0805C378 4.7U/10V/0805
10
10
C386 0.1U
C386 0.1U
1 2
1 2
10
10
+3.3V_LAN
R8093 & R8094: Stuff only if no pull-ups on system side
12
12
R378
R378
+3.3V_LAN
4.7K
4.7K
+3.3V_LAN
R332 4.7K_NCR332 4.7K_NC
R331 0_NCR331 0_NC
R384 1KR384 1K R383 1KR383 1K
12
LOMCLK_REQ#
12
C421 0.1U/10VC421 0.1U/10V
C400 0.1U/10VC400 0.1U/10V
C385 0.1U/10VC385 0.1U/10V
C384 0.1U/10VC384 0.1U/10V
LAN_PCIETXDP LAN_PCIETXDN
+1.2V_LOM
VDDP Power Decoupling
+2.5V_LOM
C406
C406
D D
0.1U
0.1U
10
10 X7R
X7R
VDDIO Power Decoupling
+3.3V_LAN
C417
C417
4.7U
4.7U
10
10 X5R
X5R 805
805
R309 200/FR309 200/F
1 2
C368
C368 27P
27P
50
50 NPO
NPO
C C
LAN_DISABLE# is hign active
pin 57,58
B B
5784 pull-up 4.7k to 3.3V_LAN 5787M connect SM-BUS to support ASF.
Pull-down R331 for 5787M.
Table 1 - Component Stuffing Requirements
INSTALL
R575,R577,R527,R534,R563, R568,R570,R572,Q101,C1721, C1722,C1723,C1724,R579,R581,
5787M
R583,R575,L79,R648,R649
NOT INSTALL
R574,R576,R529,R562,R564, R569,R571,R573,R585,R505, R578,R580,R582
+LAN_PCIEPLLVDDL
4
R347 0 805R347 0 805 R371 0_NC 805R371 0_NC 805
R305 0R305 0 R306 0_NCR306 0_NC
R307 0R307 0 R308 0_NCR308 0_NC
LAN_XTALO LAN_XTALI
LAN_RDAC
R326
R326
1.24K/F
1.24K/F
LOMCLK_REQ#
+3.3V_LAN
61
15
19
VDDIO6VDDIO56VDDIO
VDDIO
5
VDDC_IO/VDDC
55
VDDC_IO/VDDC
13
VDDC
20
VDDC
34
VDDC
60
VDDC
BCM5784M/5787M
BCM5784M/5787M
39
AVDDL
51
AVDDL
35
GPHY_PLLVDDL
30
PCIE_PLLVDDL
27
PCIE_PLLVDDL
33
PCIE_VDDL
24
PCIE_VDDL/GND
26
PCIE_TXD_P
25
PCIE_TXD_N
31
PCIE_RXD_P
32
PCIE_RXD_N
12
WAKE#
10
PERST#
29
PCIE_REFCLK_P
28
PCIE_REFCLK_N
54
VAUX_PRSNT
53
VMAIN_PRSNT
3
LOW_PWR
58
TEST1/SMB_CLK
57
TEST2/SMB_DATA
22
XTALO
21
XTALI
37
RDAC
11
CLK_REQ#
VDDIO
10mm x 10mm
10mm x 10mm
68-Pin QFN
68-Pin QFN
Package Body
Package Body
Note:thermal pad
GND
69
3
+2.5V_LOM
R370
R370 0_NC
0_NC
805
805
68
U15
U15
BIASVDDH
DC/VDDP
XTALVDDH
AVDDL/AVDDH
DC/AVDDH
DC/AVDDH
TRD3_N
TRD3_P
AVDDH/TRD2_N
TRD2_N/TRD2_P
TRD2_P/AVDDL
AVDDH/TRD1_N
TRD1_N/TRD1_P
TRD1_P/AVDDL
TRD0_N
TRD0_P
LINKLED#
SPD100LED# SPD1000LED# TRAFFICLED#
GPIO2
UART_MODE
GPIO1_SERIALDI
GPIO0_SERIALDO
SCLK_EECLK
SO_EEDATA
ENERGY_DET
VDDC_IO/VDDP
REGOUT12_IO/REGCTL25
REGCTL12
SUPER_IDDQ/GND
BCM5784
BCM5784
(12)
SI
CS#
36
23
45
38
52
49 50
AVDDH_LAN_TRD2N
48
LAN_TRD2N_TRD2P
47
LAN_TRD2P_AVDDL
46
AVDDH_LAN_TRD1N
42
LAN_TRD1N_TRD1P
43
LAN_TRD1P_AVDDL
44 41
40 2
1 67 66
LAN_GPIO
8
9
BCM_WP
7 4
BCM_SCL
65
SI
63
BCM_SDA
64
CS#
62
LAN_ENERGY_DET
59
+2.5V_LOM
17
LAN_REGCTL25
18
LAN_REGCTL12
14
16
R311
LAN_BIASVDDH
LAN_XTALVDDH
R349 0R349 0 R346 0_NCR346 0_NC
C416 0.1U/10VC416 0.1U/10V C444 0.1U/10VC444 0.1U/10V
TRD3- 43 TRD3+ 43
TRD0- 43 TRD0+ 43
LINKLED# 43 SPD100LED# 43 SPD1000LED# 43 IO_LOM_ACTLED_YEL# 43
T30
T30
PAD
PAD
PAD
PAD
R320 0R320 0
R362 1R362 1
1
R325 0R325 0
R311 20K_NCR311 20K_NC
5784M 5787M
39k
0R325
20k *20k_NC
+LAN_AVDDL +LAN_AVDDH
+3.3V_LAN
12
R381
R381
4.7K
4.7K
T34
T34
Q41
Q41 MMJT9435T1G
MMJT9435T1G
2 3
4
12
2
+3.3V_LAN +2.5V_LOM
R301
R301
R376
R376
0_NC
0_NC
0
0
805
805
805
L48
L48 BLM18AG601SN1D
BLM18AG601SN1D
1 2
C407 0.1U/10VC407 0.1U/10V
L43
L43 BLM18AG601SN1D
BLM18AG601SN1D
1 2
C388 0.1U/10VC388 0.1U/10V
L53
L53 BLM18AG601SN1D
BLM18AG601SN1D
1 2
AVDDH_LAN_TRD2N
LAN_TRD2N_TRD2P
LAN_TRD2P_AVDDL
LAN_TRD1N_TRD1P
LAN_TRD1P_AVDDL
805
Place one cap close to each of the pins, 38,45, and 52
R357 0_NCR357 0_NC R361 0R361 0
R345 0_NCR345 0_NC R348 0R348 0
R360 0_NCR360 0_NC
R338 0R338 0 R328 0_NCR328 0_NC R327 0R327 0
R335 0_NCR335 0_NC R330 0R330 0
R333 0_NCR333 0_NC R344 0R344 0
R381 & R382: Stuff only if U18 is installed
12
R379
R379
4.7K_NC
4.7K_NC
+3.3V_LAN
12
LAN_DISABLE# 31
12
R382
R382
4.7K
4.7K
T33
T33 PAD
PAD
C419
C419
0.1U
0.1U
10
10 X7R
X7R
C455
C455
0.1U
0.1U
10
10 X7R
X7R
U18
U18
8
VCC
7
NC
6
SCL
5
SDA
24LC02BT-I/STG
24LC02BT-I/STG
T32
T32
T31
T31
PAD
PAD
PAD
PAD
Q38
Q38
1
MMJT9435T1G_NC
MMJT9435T1G_NC
C425
C425
2 3
4
4.7U
4.7U
10
10 X5R
X5R 805
805
+1.2V_LOM
C454
C454 10U
10U
10
10 X7R
X7R 805
805
+3.3V_LAN
1
A0
2
A1
3
A2
4
VSS
+3.3V_LAN
C424
C424
C428
C428
4.7U_NC
4.7U_NC
0.1U_NC
0.1U_NC
10
10
10
10
X5R
X5R
X7R
X7R
805
805
C413
C413
0.1U_NC
0.1U_NC
10
10 X7R
X7R
R8101 is required only if Q1 can not dissipate the required power
C414
C414
0.1U
0.1U
10
10 X7R
X7R
+2.5V_LOM
C426
C426 10U_NC
10U_NC
10
10 X7R
X7R 805
805
TRD2­+LAN_AVDDH
TRD2+ TRD2-
+LAN_AVDDL
TRD2+ TRD1­+LAN_AVDDHAVDDH_LAN_TRD1N
TRD1+ TRD1-
+LAN_AVDDL TRD1+
BCM_SCL SI CS#
TRD2- 43
TRD2+ 43
TRD1- 43
TRD1+ 43
R380 4.7KR380 4.7K R369 4.7KR369 4.7K R368 4.7KR368 4.7K
1
R574,R576,R529,R562,R564,
5784
R569,R571,R573,R585,R505,
A A
R578,R580,R582
5
R575,R577,R527,R534,R563, R568,R570,R572,Q101,C1721, C1722,C1723,C1724,R579,R581, R583,R575,L79,R648,R649
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
4
3
2
Date: Sheet
COMPUTER
LAN
LAN
LAN
GM3 2B
GM3 2B
GM3 2B
1
42 62Monday, March 24, 2008
42 62Monday, March 24, 2008
42 62Monday, March 24, 2008
of
of
of
A
B
C
D
E
RJ-45 Connector
CON3
R316 330R316 330
12
12
1 2
+3.3V_LAN
RJ45-TX3­RJ45-TX3+ RJ45-TX1­RJ45-TX2­RJ45-TX2+ RJ45-TX1+ RJ45-TX0­RJ45-TX0+
TRANSFORM
L80
4 4
TRD0+42
TRD0-42
TRD1+42
TRD1-42
TRD2+42
TRD2-42
TRD3+42
TRD3-42
3 3
TRD0+ TRD0­TDCT TDCT TRD1+ TRD1­TRD2+ TRD2­TDCT TDCT TRD3+ TRD3-
12
C977
C977 7p_NC
7p_NC
10
10
L80
1
TD0+
2
TD0-
3
TDCT0
4
TDCT1
5
TD1+
6
TD1-
7
TD2+
8
TD2-
9
TDCT2
10
TDCT3
11
TD3+
12
TD3-
MGG3S-00006 or H5120NL
MGG3S-00006 or H5120NL
12
C978
C978 7p_NC
7p_NC
10
10
CHIP SIDE MEDIA SIDE
CHIP SIDE MEDIA SIDE
1:1
1:1
1:1
1:1
1:1
1:1
1:1
1:1
12
C979
C979 7p_NC
7p_NC
10
10
TX0+
TX0­TXCT0 TXCT1
TX1+
TX1-
TX2+
TX2­TXCT2 TXCT3
TX3+
TX3-
12
C980
C980 7p_NC
7p_NC
10
10
RJ45-TX0-
23
TXCT0
22
TXCT1
21
RJ45-TX1+
20
RJ45-TX1-
19
RJ45-TX2+
18
RJ45-TX2-
17
TXCT2
16
TXCT3
15
RJ45-TX3+
14
RJ45-TX3-
13
12
C981
C981 7p_NC
7p_NC
10
10
12
C982
C982 7p_NC
7p_NC
10
10
SPD1000LED#42
TRD0+TRD0-TRD1+TRD1-TRD2+TRD2-TRD3+TRD3-
12
C983
C983 7p_NC
7p_NC
10
10
10
10
+3.3V_LAN
12
C984
C984 7p_NC
7p_NC
SPD100LED#42
R691 4.7KR691 4.7K
LINKLED#42
D9
D9
CH751H-40PT
CH751H-40PT
D35D35
D36
D36
CH751H-40PT
CH751H-40PT D10
D10
CH751H-40PT
CH751H-40PT
21
21
21
21
RJ45-TX0+
24
IO_LOM_ACTLED_YEL#42
+3.3V_LAN
13
Q28
Q28
DTA114YUA
DTA114YUA
47K
47K
2
10K
10K
R250 330R250 330
+3.3V_LAN
13
Q27
Q27
DTA114YUA
DTA114YUA
47K
47K
2
10K
10K
R254 330R254 330
FOR EMI requirement and should close to L80
CON3
12
LED_YN
13
LED_YP
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
10
LED_GND
9
LED_GN/AP
11
LED_GP/AN
+3.3V_SUS
1 2
R317
R317 0_0805
0_0805
Y
Y
OG
OG
CHSGND114CHSGND2
15
+3.3V_LAN
+2.5V_LOM
0603 package.
L42
L42
R300
R300
BLM18AG601SN1D_NC
BLM18AG601SN1D_NC
0_NC
0_NC
1 2
2 2
1 1
1 2
12
C359
C359
0.1U
0.1U
10
10
A
12
C356
C356
0.1U
0.1U
10
10
pop L75 for 5787M. depop L75 for 5784M.
12
C315
C315
0.1U
0.1U
10
10
TXCT0
R744 75/FR744 75/F
TXCT1
R745 75/FR745 75/F
TXCT2
R746 75/FR746 75/F
TXCT3
R747 75/FR747 75/F
TDCT
layout note:
12
C309
C309
cap should close to transformer
0.1U
0.1U
one cap mapping one pin
10
10
Reserved for EMI.
B
C338
C338 1000P
1000P
3K
3K NPO
NPO 1808
1808
3P
RJ45-TX0+ RJ45-TX1+ RJ45-TX2+ RJ45-TX2­RJ45-TX3+
layout note: cap should close to CONN
C8453PC845
RJ45-TX0-
3P
C8543PC854
RJ45-TX1-
3P
C8553PC855
3P
C8603PC860
RJ45-TX3-
Reserved for EMI.
C
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
D
Date: Sheet
LAN SWITCH
LAN SWITCH
LAN SWITCH
GM3 2B
GM3 2B
GM3 2B
E
of
of
of
43 62Monday, March 24, 2008
43 62Monday, March 24, 2008
43 62Monday, March 24, 2008
1
A A
2
3
4
+3.3V_ALW
IMVP_PWRGD13,31,51
RESET_OUT#31
U26
U26 74AHCT1G08GW
74AHCT1G08GW
2 1
3 5
5
4
ICH_PWRGD 6,13
6
7
8
Keep Away from high speed buses
+3.3V_ALW
B B
R428 0R428 0
1.25V_RUN_PWRGD49
1.5V_RUN_PWRGD48
3V_ALW_PWRGD52 5V_ALW_PWRGD52
1.05V_RUN_PWRGD48
C C
1.8V_SUS_PWRGD49 RUN_ON_131
D D
1 2
R424 0R424 0
1 2
R422 0R422 0
1 2
R420 0R420 0
1 2
R423 0R423 0
1 2
+3.3V_ALW
2 1
R527 0_NCR527 0_NC
3 5
1 2
14
U21A
U21A
1 2
SN74AHC08PW
SN74AHC08PW
U21B
U21B
4 5
SN74AHC08PW
SN74AHC08PW
U32
U32 74AHCT1G08GW
74AHCT1G08GW
4
R4260R426 0
3
U21C
U21C
9
10
SN74AHC08PW
SN74AHC08PW
6
RUN_ON 20,26,48,49,53
8
U21D
U21D
12 13
SN74AHC08PW
SN74AHC08PW
11
HWPG 31
R526 10K_NCR526 10K_NC
1 2
R530 10K_NCR530 10K_NC
1 2
1
2
3
4
RUN_ON RUN_ON_1
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
6
Date: Sheet
QUANTA
QUANTA
QUANTA COMPUTER
System Reset Circuit
System Reset Circuit
System Reset Circuit
GM3 2B
GM3 2B
GM3 2B
7
of
of
of
44 62Monday, March 24, 2008
44 62Monday, March 24, 2008
44 62Monday, March 24, 2008
8
TH1
TH1 H-C394D126P2
H-C394D126P2
1
TH2
TH2 H-TC276BC236D126P2
H-TC276BC236D126P2
TH3
TH3 H-TC276BC236D126P2
H-TC276BC236D126P2
2
TH4
TH4 H-TC394BC315D126P2
H-TC394BC315D126P2
TH5
TH5 H-TC394BC315D126P2
H-TC394BC315D126P2
TH6
TH6 H-C256D130P2
H-C256D130P2
3
TH7
TH7 H-TC276BC354D126P2
H-TC276BC354D126P2
4
5
1
A A
TH8
TH8 H-TC394BC276D126P2
H-TC394BC276D126P2
1
TH15
TH15 H-C276D126P2
H-C276D126P2
1
B B
TH24
TH24 H-TC197BC236D65P2
H-TC197BC236D65P2
1
TH31
TH31 h-tr8x9bc276d126p2
h-tr8x9bc276d126p2
1
1
TH9
TH9 h-c315d189p2
h-c315d189p2
1
TH16
TH16 H-TC394BC236D126P2
H-TC394BC236D126P2
1
TH25
TH25 H-TC197BC236D104P2
H-TC197BC236D104P2
1
TH33
TH33 H-C118D118N
H-C118D118N
1
1
TH10
TH10 H-C315D157I197P2
H-C315D157I197P2
1
TH17
TH17 H-C315D157I197P2
H-C315D157I197P2
1
TH26
TH26 H-TC197BC236D65P2
H-TC197BC236D65P2
1
TH34
TH34 h-c236d110p2
h-c236d110p2
1
1
TH11
TH11 H-C315D157I197P2
H-C315D157I197P2
1
TH18
TH18 H-C315D157I197P2
H-C315D157I197P2
1
TH27
TH27 H-TC197BC236D104P2
H-TC197BC236D104P2
1
TH35
TH35 h-c236d110p2
h-c236d110p2
1
1
TH12
TH12 H-C315D126P2
H-C315D126P2
1
TH19
TH19 H-TC276BC236D110P2
H-TC276BC236D110P2
1
TH28
TH28 H-TC197BC236D65P2
H-TC197BC236D65P2
1
TH32
TH32 h-o71x118d31x78p2
h-o71x118d31x78p2
1
1
TH13
TH13 H-C256D126P2
H-C256D126P2
1
TH20
TH20 H-C315D157I197P2
H-C315D157I197P2
1
TH29
TH29 H-TC275BC492D110P2
H-TC275BC492D110P2
1
TH36
TH36 h-o71x118d31x78p2
h-o71x118d31x78p2
1
1
TH14
TH14 H-C433D433N
H-C433D433N
1
TH23
TH23 H-TC197BC236D65P2
H-TC197BC236D65P2
1
TH30
TH30 H-TC394BC315D126P2
H-TC394BC315D126P2
1
C C
D D
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
1
2
3
4
Date: Sheet
Battery Selector
Battery Selector
Battery Selector
GM3 2B
GM3 2B
GM3 2B
5
of
of
of
45 62Monday, March 24, 2008
45 62Monday, March 24, 2008
45 62Monday, March 24, 2008
A
+DC_IN_SS
1 1
+DC_IN_SS
31
PQ9
PQ9
2
2N7002W-7-F
2N7002W-7-F
B
PQ4
PQ4 SI4835BDY-T1-E3
SI4835BDY-T1-E3
8 7 6 5
PR29
PR29
10K
10K
+PWR_SRC
PR27
PR27
0.01/F/2512
1 2 3
4
PR28
PR28
100K
100K
0.01/F/2512
1 2
3
4
CSSP
C
FL5
FL5
HI1206T161R-10
HI1206T161R-10
PC153
PC153
2200P/50V
2200P/50V
CHGR_IN
PC143
PC143
0.1U/50V/0603
0.1U/50V/0603
D
Id=9.6A@Vgs=10V
PQ24
PQ24 SI4835BDY-T1-E3
SI4835BDY-T1-E3
4
+DC_IN_SS
PR131
PR131 470K
470K
8 7 6 5
1 2 3
E
+DC_IN_SS
PR50
PR50
365K/F
365K/F
PR49
LDO
2 2
ACAV_IN31
IINP31
3 3
PR41
PR41 10K/F
10K/F
PR38
PR38
15.8K/F
15.8K/F
SMBUS Address 12
PR48
PR48
8.45K/F
8.45K/F
PR49
49.9K/F
49.9K/F
0.01U/25V
0.01U/25V PC57
PC57
PR460 PR460
+3.3V_ALW
SMBCLK031,54 SMBDAT031,54
PR150
PR150 10K/F
10K/F
PC157
PC157
PC56
PC56
0.1U/10V
0.1U/10V
0.01U/25V
0.01U/25V
IINP
PC51
PC51 1U/25V/0805
1U/25V/0805
8731_ACIN
PC53 0.1U/50V/0603PC53 0.1U/50V/0603
GNDA_CHG
PC58
PC58
PC60
PC60
0.01U/25V
0.01U/25V
0.01U/25V
0.01U/25V
22
2
13 11
10
9
14
8
6
5
4 3
8731REF
PC61
PC61
1U/10V/0603
1U/10V/0603
DCIN
ACIN
ACOK VDD
SCL SDA BATSEL
IINP
CCV
CCI
CCS REF
SEE TABLE 1
PR152
PR152
51.1K/F_NC
51.1K/F_NC
SEE TABLE 1
SEE TABLE 1
ADAPT_TRIP_SEL31
4 4
PR154 33.2K/F/0603_NCPR154 33.2K/F/0603_NC
PR1510_NC PR1510_NC
17.8K/F_NC
17.8K/F_NC
PR157
PR157
PC161
PC161
PC159
PC159
PC160
PC160
SEE TABLE 1
0.01U/25V_NC
0.01U/25V_NC
0.01U/25V_NC
PR153
PR153
348/F/0603_NC
348/F/0603_NC
SEE TABLE 1
GNDA_CHG
A
0.01U/25V_NC
For GPRS immunity place PC41 & PC39 as close to the IC as possible
B
1
12H
DAC
7
PC59
PC59
GNDA_CHG
PR148
PR148 1M/F_NC
1M/F_NC
PC158
PC158
100P/50V_NC
100P/50V_NC
28
GND
CSSP
PGND
Adress :
0.1U/10V
0.1U/10V
+5V_ALW
3 2
100P/50V_NC
100P/50V_NC
VCC
CSIP CSIN
FBSA FBSB
GND
12
+
+
-
-
CSSN
27
CSSN
BST
LDO
DHI
LX
DLO
PU3PU3
84
BST
25
21 26
DHI
24
LX
23
DLO
20 19 18 17
PR39
PR39
15
100
100
16
PR145
PR145
0/0603
0/0603
PC162
PC162
0.01U/25V_NC
0.01U/25V_NC
PU7A
PU7A
1
LM393DR2G_NC
LM393DR2G_NC
LDO
PC163
PC163
100P/50V_NC
100P/50V_NC
PR47
PR47 0/0603
0/0603
PC150 1U/10V/0603PC150 1U/10V/0603
PR40
PR40 33/F/0603
33/F/0603
1U/10V/0603
1U/10V/0603
PC55
PC55
+VCHGR
+5V_ALW
PR149
PR149 100K_NC
100K_NC
PC156
PC156
0.1U/10V_NC
0.1U/10V_NC
LDO
PR143 1/0603PR143 1/0603
RDS(ON)=21m ohm
PC54
PC54 220P/50V
220P/50V
+3.3V_ALW
2
C
21
PD12
PD12 SDM10K45-7-F
SDM10K45-7-F
PC50
PC50
0.1U/50V/0603
0.1U/50V/0603
PC151
PC151
3300P/50V
3300P/50V
PQ29
PQ29
SI4812BDY-T1-E3
SI4812BDY-T1-E3
CSIP
CSIN
PR155
PR155 100K_NC
100K_NC
31
PQ31
PQ31
2N7002W-7-F_NC
2N7002W-7-F_NC
PC152
PC152
RDS(ON)=30m ohm
876
PQ30
4
4
PQ30 SI4800BDY-T1-E3
SI4800BDY-T1-E3
5.8UH 30% 5.5A 24m(SIL104R-5R8PF)
5.8UH 30% 5.5A 24m(SIL104R-5R8PF)
2
351 876
PR147
PR147
2.2/0805
2.2/0805
2
351
PC154
PC154 1000P/50V
1000P/50V
PC144
0.1U/50V/0603
2200P/50V
2200P/50V
0.1U/50V/0603
PL3
PL3
CHG_CS
1 2
10U/25V/1206
10U/25V/1206
PR122
PR122
0.01/F/2512
0.01/F/2512
3
10U/25V/1206
10U/25V/1206
PC9
PC9
PC12
4
PC12
3300P/50V
3300P/50V
1000P/50V
1000P/50V
Max Charging current setting 4.7A
PC17
PC17
FL4
FL4
HI1206T161R-10
HI1206T161R-10
PC20
PC20
PC125
PC125
PC129
PC129
2200P/50V
2200P/50V
0.1U/50V/0603
0.1U/50V/0603 10U/25V/1206
10U/25V/1206
10U/25V/1206
10U/25V/1206
PC135
PC135
10U/25V/1206
10U/25V/1206
PC24
PC24
10U/25V/1206_NC
10U/25V/1206_NC
+VCHGR 54
PC148
PC148
PC147
PC147
PC144
TABLE 1
PR156
PR156 1K_NC
1K_NC
ADAPT_OC 31
TRIP CURRENT
(A) 65 90 130 150 200 9.75 19.1K 28K 301 36.5K
230
Note 1: PR96 is popluated if ADAPT_TRIP_SEL is used to program for the next lower adapter.
ADAPT_TRIP_SET is floating for the higher adaptor, grounded for the lower adaptor.
Note 2: 24.9K at PR96 allows the 65W adaptor seetting to switch down to 45W.
3.17
4.43
6.43
7.43
11.28
(see note3)
PR152 PR153
PR157
57.6K
51.1K
32.4K
30.9K
13K
17.8K
20.5K
24.9K
32.4K 6.49K 115 N/A
Note 3: PR35 must be 5mOhms instead of 10mOhms for the 230W adaptor.
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
D
Date: Sheet
COMPUTER
Charger (ISL88731)
Charger (ISL88731)
Charger (ISL88731)
GM3 2B
GM3 2B
GM3 2B
105 348 100 432
PR154ADAPTER(W)
N/A
33.2K
27.4K
88.7K
E
46 62Monday, March 24, 2008
46 62Monday, March 24, 2008
46 62Monday, March 24, 2008
of
of
of
1
A A
B B
2
3
4
5
BLANK PAGE FOR PAGE NUMBER SAME AS DISCRETE
C C
D D
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
1
2
3
4
Date: Sheet
GM3 2B
GM3 2B
GM3 2B
5
of
of
of
47 62Monday, March 24, 2008
47 62Monday, March 24, 2008
47 62Monday, March 24, 2008
5
2
D D
RUN_ON
6,44,49,53
+5V_ALW
1.05V_RUN_PWRGD44
C C
+3.3V_SUS
100K
100K
PR159
PR159
PC164
PC164
0.1U/16V_NC
0.1U/16V_NC
PR1580PR158 0
PR53
PR53 300/0603
300/0603
1U/10V/0603
1U/10V/0603
PC64
PC64
+1.05V_VCCP_P
51117_FB
PC63
PC63
0.1U/10V_NC
0.1U/10V_NC
1 2 3 4 5 6 7
PU8
PU8
EN_PSV TON VOUT V5FILT VFB PGOOD GND
TPS51117RGYR
TPS51117RGYR
THERM
15
PR55
PR55 237K/F
237K/F
4
VBST
DRVH
TRIP
V5DRV
DRVL
PGND
LL
PR54
PR54 0/0603
0/0603
3
+DC_PWR_SRC
PC69
PC69 2200P/50V
2200P/50V
876
9
51117DH
4
PR160
PR160 0/0603
14 13 12 11 10 9 8
0/0603
PC66
PC66 1U/10V/0603
1U/10V/0603
+5V_ALW
PC165
PC165
0.1U/50V/0603
0.1U/50V/0603
PR161
PR161 10K/F_DU
10K/F_DU
51117LX
51117DL
4
2
351
876
2
351
PQ32
PQ32 FDS8878_DU
FDS8878_DU
1.5UH 30% 10A(SIL104R-1R5PF)_DU
1.5UH 30% 10A(SIL104R-1R5PF)_DU
9
PQ33
PQ33 FDS6680AS_DU
FDS6680AS_DU
PR58
PR58
2.2/F/0603_NC
2.2/F/0603_NC
PC71
PC71 2200p/50V_NC
2200p/50V_NC
PC68
PC68
0.1U/50V/0603
0.1U/50V/0603
PL7
PL7
12
80.6K/F/0603
80.6K/F/0603
2
PC166
PC166 10U/25V/1206
10U/25V/1206
Frequency=300KHz
+1.05V_VCCP_P
PR51
PR51
51117_FB
PR52
PR52 200K/F/0603
200K/F/0603
HI1206T161R-10(160,6A)
HI1206T161R-10(160,6A)
PC167
PC167 10U/25V/1206
10U/25V/1206
6
PC62
PC62
0.015U/50V/0603_NC
0.015U/50V/0603_NC
PQ32
PC168
PC168
0.1U/10V
0.1U/10V
+PWR_SRC
+1.05V_VCCP
+
+
PC169
PC169
330U/4V/ESR25
330U/4V/ESR25
FL6
FL6
UMA(12.1A) Discrete(7A)
FDS8880_NL (BAM88800012)
1
+1.05V_VCCP(UMA) TDC : 12.1A OCP : 17.2A Iout_ripple current : 2.605A
10
+1.05V_VCCP(DIS) TDC : 7A OCP : 10A Iout_ripple current : 2.459A
FDS8878 (BAM88780020)
FDMS8672S
PQ33
(BAM86720000)
PR64
PR64 0/0805
0/0805
+1.8V_SUS
1 2
PC83
PC83
0.1U/10V
0.1U/10V
10
PC81
PC81
0.1U/10V
0.1U/10V
PC85
PC85
680P/50V
680P/50V
PC82
PC82
10U/25V/1206
10U/25V/1206
L6935_ADJ
4
PU5
PU5
8
VIN1
9
VIN2
10
VIN3
19
ADJ
5
PGOOD
6
VBIAS
7
EN
20
SS
2
GND
21
GND
L6935TR
L6935TR
VOUT1 VOUT2 VOUT3
NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8
16 17 18
PC84
PC84
1 3 4 11 12 13 14
0.1U/10V_NC
0.1U/10V_NC
15
R1
R2
+1.5V_RUN_P+1.5V_RUN_P
PR68
PR68 20K/F
20K/F
L6935_ADJ
PR67
PR67 10K/F
10K/F
Max current->2.06A
10
PC86
PC86 22U/10V/1206
22U/10V/1206
+1.5V_RUN
VOUT=0.5 x( 1+R1/R2)
3
2
B B
+3.3V_RUN
7
PR183
PR183
PR182
5
PR182
100K_NC
100K_NC
100K_NC
100K_NC
1.5V_RUN_PWRGD44
RUN_ON20,26,44,49,53
A A
+3.3V_SUS
PR66
PR66
100K
100K
7
PR65 0PR65 0
SIL105RA-1R3
PL7
(CV-13E0MZ00)
11K/F
PR161
(CS31102FB11)
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
GM3 2B
GM3 2B
GM3 2B
FDS6680AS (BAM66800061)
SIL104R-1R5PF (DC-15A00010)
10K/F (CS31002FB26)
48 62Monday, March 24, 2008
48 62Monday, March 24, 2008
48 62Monday, March 24, 2008
1
of
of
of
5
4
3
2
1
UMA(10.25A) Discrete(15.6A)
FDS8880_NL
PQ35
(BAM88800012)
PHK28NQ03LT
PQ34
PR172
(BAM28030Z12)
10.5K/F/0603 (CS31053F909)
D D
FDS6298 (BAM62980005)
FDMS8672S (BAM86720000)
13.3K/F/0603 (CS31333F919)
S3_1.8V S5_1.8V
PC179
PC179
0.1U/10V
0.1U/10V
PR169
PR169 0_NC
0_NC
PC178
PC178
0.1U/10V
0.1U/10V
+1.8V_SUS(DIS) TDC : 15.6A OCP : 22.4A Iout_ripple current : 4.896A
+1.8V_SUS(UMA) TDC : 10.25A OCP : 14.9A Iout_ripple current : 4.868A
+PWR_SRC+DC2_PWR_SRC
FL7
FL7
HI1206T161R-10
HI1206T161R-10
PC184
PC184
PC183
PC183
876
9
+1.8V_SUS_P
PC172
PC172
C C
+0.9V_DDR_VTT
PC175
PC175 10U/10V/0805
10U/10V/0805
10
PR164
+V_DDR_MCH_REF
PR163 0PR163 0
+1.8V_SUS_P
PR162 0_NCPR162 0_NC
B B
A A
0/0603
0/0603
5
PR164
DIS_MODE
PC173
PC173 3300P/50V
3300P/50V
1U/10V/0603
1U/10V/0603
PC171
PC171 10U/10V/0805
10U/10V/0805
PR165 0PR165 0
FOR DDR II
PC176
PC176
0.1U/10V_NC
0.1U/10V_NC
+1.8V_SUS
DIS_MODE
PR63
PR63 43K/F
43K/F
PR61
PR61 100K/F
100K/F
1 2 4 5 3 6 7 8 9
10
PC174
PC174
18P/50V_NC
18P/50V_NC
100K/F_NC
100K/F_NC
1.25V_RUN_PWRGD44
PU9
PU9 TPS51116_8
TPS51116_8
VLDOIN VTT VTTSNS GND VTTGND MODE VTTREF COMP VDDSNS VDDQSET
+5V_ALW
+5V_ALW2
PR167
PR167
GND21GND22GND23GND24GND25GND26GND
PR166
PR166 143K/F_NC
143K/F_NC
+1.8V_SUS
RUN_ON20,26,44,48,53
PC79
PC79
1000P/50V
1000P/50V
PGOOD
1000P/50V_NC
1000P/50V_NC
PR177 0_NCPR177 0_NC
PR181 0PR181 0
4
DRVH
VBST
DRVL
PGND
V5IN
27
19 20 18
LL
17 16 11
S3
12
S5
14 13 15
CS
PC182
PC182
5VIN
PR60 0PR60 0
0.1U/25V/0603
0.1U/25V/0603
S3_1.8V S5_1.8V
5VIN5VIN
PC96
PC96
4.7U/10V/0805
4.7U/10V/0805
PR59
PR59
100K
100K
PC80
PC80
PR168 0PR168 0
PR175 0PR175 0 PR174 0PR174 0
PR172
PR172
13.3K/F/0603_DU
13.3K/F/0603_DU
OCP Setting (Note1)
PC75
PC75
10U/4V/0805
10U/4V/0805
+3.3V_SUS
PR173 100K/FPR173 100K/F
PC77
PC77 1U/10V/0603
1U/10V/0603
PC177 0.1U/50V/0603PC177 0.1U/50V/0603
RUN_ON 20,26,44,48,53
SUS_ON 31,53
+3.3V_ALW
1.8V_SUS_PWRGD 44
PR1760PR176
Enable Delay 200us
PU4
PU4
10
IN
2
VCC
OUTS
MAX8794
MAX8794
5
PGOOD SHDN
REFIN
PGND AGND
REFOUT
BP
11
0.33U/16V/0603
0.33U/16V/0603
3
7 4
+1.8V_DH
+1.8V_LX +1.8V_DL
0
OUT
PC74
PC74
4
4
9
6
8 3
1
PQ35
PQ35 FDS6298_DU
FDS6298_DU
2
351
876
9
PQ34
PQ34 FDMS8672S_DU
FDMS8672S_DU
2
351
+1.25V_RUN_P
PC76
PC76 10U/4V/0805
10U/4V/0805
PR171
PR171
2.2/0805
2.2/0805
PC180
PC180 2200P/50V
2200P/50V
PR170
PR170
2.2/0805_NC
2.2/0805_NC
PC181
PC181 2200P/50V_NC
2200P/50V_NC
2200P/50V
2200P/50V
NEC_MPC1040LR88C_0.88uH
NEC_MPC1040LR88C_0.88uH
PC78
PC78 10U/4V/0805
10U/4V/0805
0.1U/50V/0603
0.1U/50V/0603
PL8
PL8
(Note 1) Current Limiting Setting : Rtrip(Kohm)=100*(Iocp-0.5*Iripple)*Rds(on)
10
PR620PR62
0
2
PC185
PC185
PC186
PC186
10U/25V/1206
10U/25V/1206
10U/25V/1206
10U/25V/1206
+1.8V_SUS_P
PC170
PC170
0.1U/25V/0603
0.1U/25V/0603
Max current->0.9A
+1.25V_RUN
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet
Date: Sheet
Frequency=400KHz
PC95
PC95
+
+
1.8VSUS & 0.9VTT (TPS51116)
1.8VSUS & 0.9VTT (TPS51116)
1.8VSUS & 0.9VTT (TPS51116)
GM3 2B
GM3 2B
GM3 2B
+
+
PC94
PC94
330U/2.5V/ESR15
330U/2.5V/ESR15
330U/2.5V/ESR15_DIS
330U/2.5V/ESR15_DIS
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
1
+1.8V_SUS
10
of
of
49 62Monday, March 24, 2008
49 62Monday, March 24, 2008
49 62Monday, March 24, 2008
1
2
3
4
5
+5V_SUS
PR19
PR19
10/0603_DIS
1U/10V/0603_DIS
1U/10V/0603_DIS
25
26
27
AVDD
SHDNA#
MAX8632ETI+_DIS
MAX8632ETI+_DIS
PC5
PC5
1U/10V/0603_DIS
1U/10V/0603_DIS
10/0603_DIS
PC33
PC33
24
GND
SKIP#
PC6
PC6 22U/4V/0805_DIS
22U/4V/0805_DIS
23
22
VDD
PGND1
LGATE
BOOT PHASE UGATE
VIN
OUT
FB
EPAD
EPAD
14
GFX_REF
PC11
PC11 10U/6.3V/1206_DIS
10U/6.3V/1206_DIS
PC136
PC136
2.2U/10V/0805_DIS
2.2U/10V/0805_DIS
SDM10K45-7-F_DIS
SDM10K45-7-F_DIS
PR22
PR22
21
1/0603_DIS
1/0603_DIS
20
ISL88550LX
19
ISL88550DH
18 17
ISL88550DL
16 15 32
33
+1.8V_SUS
PC7
PC7 22U/4V/0805_DIS
22U/4V/0805_DIS
PD5
PD5
+1.1V_GFX_PCIE
21
PC26
PC26
0.22U/50V/0603_DIS
0.22U/50V/0603_DIS
PQ6
PQ6
FDMS8672S_DIS
FDMS8672S_DIS
4
4
GFX_+5V_RUN
Ra
140K/F_DIS
140K/F_DIS PR13
PR13
Rb
4
GFX_RUN_ON
PR11
PR11 178K/F_DIS
178K/F_DIS
PR8
PR8 100K_DIS
100K_DIS
0.01U/16V_DIS
0.01U/16V_DIS
PR25
PR25
0/0603_NC
0/0603_NC
PC14
PC14
PU1
PU1
1
TON
2
OVP/UVP
3
REF
4
ILIM
5
POK1
6
POK2
7
STBY#
29
EPAD
30
EPAD
31
EPAD
PC8
PC8
0.047U/10V_DIS
0.047U/10V_DIS
PR7
PR7
4.99K/F/0603_DIS
4.99K/F/0603_DIS
PR2
PR2
49.9K/F/0603_DIS
49.9K/F/0603_DIS
28
TPO
SS8VTTS9VTTR10PGND211VTT12VTTI13REFIN
A A
PR18
PR18
61.9K/F_NC
61.9K/F_NC
B B
GFX_RUN_ON20
+VCC_GFX_CORE
GFX_REF
0.22U/6.3V_DIS
0.22U/6.3V_DIS
GFX_PCIE_PWRGD
GFX_CORE_PWRGD
PC23
PC23
+3.3V_SUS
PR12 0/0603_NCPR12 0/0603_NC
PR9
PR9 100K_DIS
100K_DIS
1 2
PR3
PR3 100K
100K
1 2
+GPU_PWR_SRC
PC3
PC3 10U/25V/1206_DIS
10U/25V/1206_DIS
876
9
PQ5
PQ5 FDS6298_DIS
FDS6298_DIS
2
351
NEC_MPC1040LR88C_0.88uH_DIS
NEC_MPC1040LR88C_0.88uH_DIS
876
9
PR129
PR129
2.2/0805_NC
2.2/0805_NC
2
351
PC134
PC134 1500P/50V_NC
1500P/50V_NC
PR120
PR120 0_DIS
0_DIS
PL4
PL4
PC123
PC123 1000P/50V_DIS
1000P/50V_DIS
PR118
PR118 118K/F_DIS
118K/F_DIS
PC1
PC1 10U/25V/1206_DIS
10U/25V/1206_DIS
PR119
PR119
24.9K/F/0603_DIS
24.9K/F/0603_DIS
PR116
PR116
PC18
PC18 2200P/50V_DIS
2200P/50V_DIS
HI1206T161R-10_DIS
HI1206T161R-10_DIS
PC13
PC13
0.1U/50V/0603_DIS
0.1U/50V/0603_DIS
+1.1V_RUN_VGA_P
PC149
PC149
0.1U/10V_DIS
0.1U/10V_DIS
PR117
PR117 0/0603_NC
0/0603_NC
+PWR_SRC
FL1
FL1
PC155
PC155
+
+
+
+
220U/2.5V/ESR15_DIS
220U/2.5V/ESR15_DIS
Place near GND pin24
+VCC_GFX_CORE TDC : 13A OCP : 15A Iout_ripple current : 3.9432A
+VCC_GFX_CORE
PC140
PC140
220U/2.5V/ESR15_DIS
220U/2.5V/ESR15_DIS
PR26
PR26
0/0603_DIS
0/0603_DIS
10
Frequency:300K
PC120
PC120
100P/50V_NC
2
PC128
PC128
0.01U/16V_DIS
0.01U/16V_DIS
100P/50V_NC
3
PQ1
PQ1 BSS138_NL_DIS
BSS138_NL_DIS
1
C C
+3.3V_SUS
TON
Frequency
D D
ILIM SKIP#
OVP/UVP The overvoltage limit is 116% of Vout.
Iovp=(2*(Rb/(Ra+Rb))*0.1*(1/RDSON)+(I_DELTA/2) AVDD = Low-noise, forced-PWM mode.
GND = Pulse-skipping operation.
The undervoltage limit is 70% of Vout.
1
OPEN REF 300K 450K
256MB
PR15
PR15 10K_NC
10K_NC
PR16
PR16 10K_DIS
GFX_CORE_CNTRL19
High: 1.1V Low: 0.95V
"for the 128MB sku: No Stuff PR44 for the 256MB sku: Stuff PR44".
2
10K_DIS
PR123
PR123 100K_DIS
100K_DIS
3
69.8K/F/0603_DIS
69.8K/F/0603_DIS
4
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
VGA DC/DC
VGA DC/DC
VGA DC/DC
GM3 2B
GM3 2B
GM3 2B
5
of
of
of
50 62Monday, March 24, 2008
50 62Monday, March 24, 2008
50 62Monday, March 24, 2008
5
+3.3V_SUS
PR121
PR121 10/0603
10/0603
D D
PC15
PC15
0.1U/10V
0.1U/10V
+3.3V_SUS
48
PR1350PR135
0
1
2
3
4
5
6
7
8
9
10
11
12
49
PGOOD
PSI#
PMON
RBIAS
VR_TT#
NTC
SOFT
OCSET
VW
COMP
FB
FB2
5
5
PC41
PC41
0.01U/50V
0.01U/50V
GND
3V3
VDIFF
13
PC40
PC40
0.01U/50V
0.01U/50V
PR124
PR124
1.91K/F
IMVP_PWRGD13,31,44
H_PSI#3
PWR_MON
PR126 499/FPR126 499/F
+3.3V_SUS
IMVP6_PROCHOT#31
C C
MAT ERTJ0EV474J
Close to Phase 1 Inductor
PR144 NTC_470K_NCPR144 NTC_470K_NC
PC36 1000P/50VPC36 1000P/50V
5
PC39 220P/50VPC39 220P/50V
PR31 97.6K/FPR31 97.6K/F
PC38 470P/50VPC38 470P/50V
PR21 4.02K/F_NCPR21 4.02K/F_NC
PC27 0.01U/16V_NCPC27 0.01U/16V_NC
PR24 6.81K/FPR24 6.81K/F
PC127 0.1U/10VPC127 0.1U/10V
5
5
PR139 255/FPR139 255/F
5
B B
PR138 1KPR138 1K
+VCCSENSE4
+VSSSENSE4
PC141 1000P/50VPC141 1000P/50V
5
PR14 0PR14 0
ISL6266_VO
Parallel
1.91K/F
PR125 4.99K/FPR125 4.99K/F
PR17 147K/FPR17 147K/F
PC32 0.015U/16VPC32 0.015U/16V
PR127 12.7K/FPR127 12.7K/F
PR1341KPR134 1K
PR330PR33
0
0
PR340PR34
T1
PADT1PAD
CLK_EN#
46
47
CLK_EN#
DPRSTP#
VSEN
RTN
14
15
PC142
PC142
0.22U/10V/0603
0.22U/10V/0603
ISL6266_VO
VSUM
4
45
DPRSLPVR
DROOP
16
5
PR136
PR136
4.53K/F/0603
4.53K/F/0603 PC42
PC42
180P/50V
180P/50V
PC46
PC46
0.01U/16V
0.01U/16V
44
17
PR1301KPR130
43
VR_ON
5
ISL6262A
ISL6262A
DFB
VO
VSUM19VIN20GND
18
1K
VSUM
ISL6266_VO
PC43
PC43
0.33U/16V/0603
0.33U/16V/0603
PC145
PC145
0.022U/16V
0.022U/16V
PR4 0PR4 0 PR5 499/FPR5 499/F PR6 0PR6 0
40
39
VID3
VID441VID542VID6
21
+CPU_PWR_SRC
PR140
PR140
10/0603
10/0603
PC146
PC146
0.1U/50V/0603
0.1U/50V/0603
PR141
PR141 11K/F
11K/F
VID138VID0
VID2
VDD22ISEN223ISEN1
ISEN2
PC44 0.22U/25V/0603PC44 0.22U/25V/0603
PR36
PR36 10/0603
10/0603
PC137
PC137 1U/10V/0603
1U/10V/0603
37
PU2
PU2
36
BOOT1
35
UGATE1
34
PHASE1
33
PGND1
32
LGATE1
31
PVCC
30
LGATE2
29
PGND2
28
PHASE2
27
UGATE2
26
BOOT2
25
NC
24
PC45 0.22U/25V/0603PC45 0.22U/25V/0603
ISEN1
+5V_SUS
PR142
PR142
2.61K/F
2.61K/F
PR146
PR146 10K_NTC
10K_NTC
H_DPRSTP# 3,6,11 DPRSLPVR 6,13 IMVP_VR_ON 31 VID6 4
VID5 4 VID4 4 VID3 4 VID2 4 VID1 4 VID0 4
PR10
PR10 1/0603
1/0603
UG1
PH1
LG1
LG2
PH2
UG2
PR128 1/0603PR128 1/0603
ISL6266_VO
PR137
PR137
0/0805
0/0805
3
PC25
PC25
2.2U/10V/0805
2.2U/10V/0805
PC22
PC22
0.22U/50V/0603
0.22U/50V/0603
+5V_SUS
PC34
PC34
0.22U/50V/0603
0.22U/50V/0603
VSUM
ISEN1
ISL6266_VO
ISEN2
VSUM
ISEN2
ISL6266_VO
ISEN1
NTMFS4707NT1G
NTMFS4707NT1G
UG1
PH1
NTMFS4119NT1G
NTMFS4119NT1G
LG1
PR30 3.65K/F/0603PR30 3.65K/F/0603
PR32 10K/0603PR32 10K/0603
PR37
PR37
1/0603
1/0603
PR35 10K/0603PR35 10K/0603
NTMFS4707NT1G_NC
NTMFS4707NT1G_NC
UG2
PH2
NTMFS4119NT1G
NTMFS4119NT1G
LG2
PR42 3.65K/F/0603PR42 3.65K/F/0603
PR43 10K/0603PR43 10K/0603
PR45 1/0603PR45 1/0603
PR44 10K/0603PR44 10K/0603
PQ2
PQ2
PQ25
PQ25
PQ8
PQ8
PQ27
PQ27
876
9
4
2
351
NTMFS4707NT1G_NC
NTMFS4707NT1G_NC
876
9
4
2
351
876
9
4
2
351
NTMFS4707NT1G
NTMFS4707NT1G
876
9
4
2
351
2
4
PQ3
PQ3
4
PQ26
PQ26 NTMFS4119NT1G
NTMFS4119NT1G
4
PQ7
PQ7
4
PQ28
PQ28
NTMFS4119NT1G
NTMFS4119NT1G
1
+PWR_SRC
FL2
FL2
HI1206T161R-10
0.1U/50V/0603
0.1U/50V/0603
+CPU_PWR_SRC
PC121
PC121
PC21
PC21
0.1U/50V/0603
0.1U/50V/0603
HI1206T161R-10
FL3
FL3
HI1206T161R-10
HI1206T161R-10
2200P/50V
2200P/50V
+VCC_CORE
PC122
PC122
2200P/50V
2200P/50V
+VCC_CORE
+CPU_PWR_SRC
PC19
PC19
PC126
PC126
PR20
PR20
876
9
2.2/0805_NC
2.2/0805_NC
2
351
876
9
2
351
876
9
2
351
876
9
2
351
0.1U/50V/0603
0.1U/50V/0603
PC35
PC35 1500P/50V_NC
1500P/50V_NC
PL5 0.36uH_30A_ETQP4LR36WFCPL5 0.36uH_30A_ETQP4LR36WFC
2 1
4
PR133
PR133
2.2/0805
2.2/0805
PC139
PC139 1500P/50V
1500P/50V
PC10
PC10
PR23
PR23
2.2/0805_NC
2.2/0805_NC
0.1U/50V/0603
0.1U/50V/0603
PC37
PC37 1500P/50V_NC
1500P/50V_NC
PL6 0.36uH_30A_ETQP4LR36WFCPL6 0.36uH_30A_ETQP4LR36WFC
2 1
4
PR132
PR132
2.2/0805
2.2/0805
PC138
PC138 1500P/50V
1500P/50V
PC16
PC16
3
PC28
PC28
2200P/50V
2200P/50V
3
2200P/50V
2200P/50V
10U/25V/1206
10U/25V/1206
PC52
PC52
PC31
PC31
0.1U/50V/0603
0.1U/50V/0603
10U/25V/1206
10U/25V/1206
PC49
PC49
0.1U/50V/0603
0.1U/50V/0603
PC130
PC130
10U/25V/1206
10U/25V/1206
PC48
PC48
+
+
PC30
PC30
PC133
PC133
330U/2V/ESR9
330U/2V/ESR9
10U/25V/1206_NC
10U/25V/1206_NC
+
+
PC67
PC67
330U/2V/ESR9
330U/2V/ESR9
PC132
PC132
10U/25V/1206
10U/25V/1206
PC47
PC47
+
+
10U/25V/1206_NC
10U/25V/1206_NC
PC29
PC29
10U/25V/1206
10U/25V/1206
330U/2V/ESR9
330U/2V/ESR9
PC131
PC131
+
+
PC65
PC65
330U/2V/ESR9
330U/2V/ESR9
PC124
PC124
10U/25V/1206
10U/25V/1206
Close to Phase 1 Inductor
A A
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet of
COMPUTER
CPU_Core_2Phase (ISL6266)
CPU_Core_2Phase (ISL6266)
CPU_Core_2Phase (ISL6266)
GM3 2B
GM3 2B
GM3 2B
1
51 62Monday, March 24, 2008
51 62Monday, March 24, 2008
51 62Monday, March 24, 2008
of
of
5
4
3
2
1
DC/DC +3V_ALW/+5V_SUS/+5V_ALW /+15V_ALW
PR103
PR103
PR179
PR179
HI1206T161R-10
HI1206T161R-10
PR178
PR178
HI1206T161R-10
D D
+PWR_SRC
HI1206T161R-10
PC191
PC191
PC110
PC110
PC188
PC188
PC102
PC102
+5V_ALW TDC : 7.25A OCP : 9.8A Iout_ripple current : 2.84A
10U/25V/1206
10U/25V/1206
10U/25V/1206
10U/25V/1206
10U/25V/1206
10U/25V/1206
10U/25V/1206
10U/25V/1206
Place these CAPs close to FETs
+DC1_PWR_SRC
PC112
PC112
0.1U/50V/0603
0.1U/50V/0603
PC101
PC101
2200P/50V
2200P/50V
PR101
PR101 0/0603
0/0603
Frequency=400KHz
+5V_ALW
876
+5V_DH
PQ36
10
3.3UH +-30% 8A (SIL1045R-3R3)
3.3UH +-30% 8A (SIL1045R-3R3)
PR88
PR88 0_NC
0_NC
PR870PR87
0
+5V_ALW2
+15V_ALW
C C
B B
PC103
PC103
+
+
+5V_ALWP
PC190
PC190
0.1U/50V/0603
330U/6.3V/ESR17
330U/6.3V/ESR17
0.1U/50V/0603
PQ36
FDS8884
FDS8884
PL9
PL9
PQ37
PQ37
FDS6680AS_NL
FDS6680AS_NL
PR90
PR90
39K/F
39K/F
4
2
351
+5V_LX
876
9
+5V_DL
4
2
351
PC99
PC99
0.1U/50V/0603_NC
0.1U/50V/0603_NC
1 2
PR99 200K/FPR99 200K/F
PC100
PC100
0.1U/50V/0603
0.1U/50V/0603
PC117
PC117
10U/6.3V/0603_NC
10U/6.3V/0603_NC
PC118
PC118
0.1U/50V/0603
0.1U/50V/0603
PC119
PC119
0.1U/50V/0603
0.1U/50V/0603
1 2
390K
390K
PC104
PC104
4.7U/10V1206
4.7U/10V1206
PC105
PC105
0.1U/50V/0603
0.1U/50V/0603 PC106
PC106
0.1U/50V/0603_NC
0.1U/50V/0603_NC
41 40 39 38
+5V_ALWP
9
10 11 12
POK1 POK2
13 14 15 16 37 36
PR96
PR96 1/0603
1/0603
BAT54S-7-F
BAT54S-7-F
BAT54S-7-F
BAT54S-7-F
12
PAD PAD PAD PAD BYP OUT1 FB1 ILIM1 PGOOD1 EN1 DH1 LX1 PAD PAD
35
+5V_ALW2
1U/10V/0603
1U/10V/0603
PD10
PD10
1
2
PD11
PD11
1
2
ISL6237_ONLOD
PR102
PR102 150K/F
150K/F
+5V_ALW2
8
7
42
PAD
LDOREFIN
ISL6237
ISL6237
BST117DL118VDD19NC20GND21PGND22DL223BST2
PAD33PAD34PAD
PC108
PC108
PC114
PC114
0.1U/50V/0603
0.1U/50V/0603
3
0.1U/50V/0603
0.1U/50V/0603
3
6
LDO
PC116
PC116
5
NC
VIN
PU6
PU6
SECFB
PR94
PR94
10/0603_NC
10/0603_NC
PR105
PR105 0_NC
0_NC
ISL6237_ONLOD
4
2
3
1
REF
VCC
TON
ONLDO
PGOOD2
24
0/0603
0/0603 PR104
PR104
No Install for ISL6236 Install 10 ohm for MAX8778
+5V_VCC1
PC111
PC111
PC107
PC107
1U/10V/0603
1U/10V/0603
PR106
PR106 0_NC
0_NC
32
REFIN2
31
ILIM2
30
OUT2
29
SKIP#
28
+3.3V_EN2+5V_EN1
27
EN2
+3.3V_DH
26
DH2
25
LX2
PR107
PR107 1/0603
1/0603
0.1U/10V
0.1U/10V
PR114
PR114 365K/F
365K/F
PC113
PC113
0.1U/50V/0603
0.1U/50V/0603
+3.3V_DL
SECFB
PR108
PR108 0_NC
0_NC
PR110
PR110 0_NC
0_NC
PR1110PR111 0
PR180
PR180
0_NC
0_NC
Place these CAPs close to FETs
PR1090PR109
0
4
+3.3V_LX
4
+5V_ALW2
PC189
PC189
0.1U/50V/0603
0.1U/50V/0603
876
PQ23
PQ23 SI4800BDY-T1-E3
SI4800BDY-T1-E3
2
351
3.3UH +-30% 8A (SIL1045R-3R3)
3.3UH +-30% 8A (SIL1045R-3R3)
876
PQ22
PQ22
SI4812BDY-T1-E3
SI4812BDY-T1-E3
2
351
PR98
PR98 100K
100K
POK2 POK1
PC192
PC192
+3.3V_ALW TDC : 6.2A OCP : 8.6A Iout_ripple current : 2.78A
Frequency=300KHz
+3.3V_ALWP
0.1U/50V/0603
0.1U/50V/0603
+3.3V_ALW
PC115
PC115
+
+
10
330U/6.3V/ESR17
330U/6.3V/ESR17
2200P/50V
2200P/50V
PL2
PL2
PC109
PC109
PR1120PR112
0
PR113
PR113 0_NC
0_NC
+3.3V_ALWP+3.3V_ALWP
PR115
PR115 100K
100K
3V_ALW_PWRGD 44 5V_ALW_PWRGD 44
PR890PR89
+3.3V_EN2
5V_ALW_ON31
A A
5
200K/F
200K/F PR97
PR97
+5V_EN1
0
PD9 1SS355PD9 1SS355
2 1
PR95
PR95
0_NC
0_NC
PR920PR92
0
0
PR910PR91
4
THERM_STP# 31,39
H_THERMTRIP# 3,6
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
3
2
Date: Sheet
COMPUTER
VGA DC/DC
VGA DC/DC
VGA DC/DC
GM3 2B
GM3 2B
GM3 2B
1
of
of
of
52 62Monday, March 24, 2008
52 62Monday, March 24, 2008
52 62Monday, March 24, 2008
1
2
3
4
5
+3.3V_ALW
PR93
PR93 100K
100K
12
PR86
PR86 100K_NC
100K_NC
RUN_ON#
61
2
PQ21B
PQ21B 2N7002DW-7-F
2N7002DW-7-F
RUN_ON#
2N7002W-7-F
2N7002W-7-F
PQ10
PQ10
5
2
12
PR100
PR100 100K
100K
34
+15V_ALW
12
PR56
PR56 100K
100K
31
RUN_ON#
RUN_ENABLE
PQ21A
PQ21A
12
2N7002DW-7-F
2N7002DW-7-F
50
50
603
603
RUN_ENABLE_1.8V
12
50
50
603
603
2
PQ14
PQ14
2N7002W-7-F
2N7002W-7-F
PC98
PC98 4700P
4700P
PC70
PC70
0.033U
0.033U
12
PR71
PR71 100K
100K
31
RUN_ENABLE_3.3V
12
A A
RUN_ON20,26,44,48,49
B B
C C
+5V_ALW+5V_ALW2
+1.8V_SUS +1.8V_RUN
+1.8V_RUN
PQ11
SI4800BDY-T1-E3 (BAM48000040)
+3.3V_ALW
PD6
PD6 CH751H-40H_NC
CH751H-40H_NC
21
PR700PR70 0
1 2
PQ20
PQ20 SI4800BDY-T1-E3
SI4800BDY-T1-E3
8 7 6 5
4
PQ11
PQ11 FDS6298_DU
FDS6298_DU
9 8 7 6 5
4
8 7 6 5
3 2 1
3 2 1
PQ12
PQ12 FDS8880_NL
FDS8880_NL
3 2 1
4
+5V_RUN+15V_ALW
25
25
+5V_RUN
3.5A
PC97
PC97
0.1U/50V/0603
0.1U/50V/0603
+1.8V_RUN
3.86A(DIS)
0.38A(UMA)
PC72
PC72
0.1U/50V/0603
0.1U/50V/0603
DiscreteUMA
FDS6298 (BAM62980005)
+3.3V_RUN
+3.3V_RUN+15V_ALW
5.3A
PC88
PC88
0.1U/50V/0603
0.1U/50V/0603
12
PC89
PC89 4700P
4700P
PR85
PR85 20K
20K
1 2
PR57
PR57 20K
20K
1 2
PR69
PR69 20K
20K
1 2
+5V_ALW2
SUS_ON31,49
Reserve discharge path
+1.8V_RUN
12
R216
R216
1K_NC
1K_NC
Q21
Q21
31
2
1
D D
RUN_ON#
2N7002W-7-F_NC
2N7002W-7-F_NC
R217
R217 10_NC
10_NC
2
Q26
Q26
2N7002W-7-F_NC
2N7002W-7-F_NC
1 2 31
2N7002W-7-F_NC
2N7002W-7-F_NC
Q22
Q22
12
R219
R219
1K_NC
1K_NC
31
2
+1.5V_RUN+3.3V_RUN+5V_RUN +0.9V_DDR_VTT
12
R221
R221
1K_NC
1K_NC
31
2
Q25
Q25
2N7002W-7-F_NC
2N7002W-7-F_NC
2
2
Q24
Q24
2N7002W-7-F_NC
2N7002W-7-F_NC
12
31
R218
R218
1K_NC
1K_NC
2
Q23
Q23
2N7002W-7-F_NC
2N7002W-7-F_NC
+1.25V_RUN
12
R220
R220
1K_NC
1K_NC
31
3
+3.3V_ALW
PR72
PR72 100K
100K
12
PR74
PR74 100K_NC
100K_NC
SUS_ON_3.3V#
61
2
SUS_ON_3.3V#
2N7002W-7-F
2N7002W-7-F
PQ16B
PQ16B 2N7002DW-7-F
2N7002DW-7-F
2
PQ15
PQ15
5
12
31
12
Reserve discharge path
SUS_ON_3.3V#
4
+15V_ALW +3.3V_ALW +3.3V_SUS
12
PR78
PR78 100K
100K
SUS_3.3V_ENABLE
34
PQ16A
PQ16A 2N7002DW-7-F
2N7002DW-7-F
12
PC93
PC93 4700P
4700P
50
50
603
603
8 7
PR75
PR75 100K
100K
SUS_ENABLE_5V
+1.8V_SUS +5V_SUS +3.3V_SUS
2
Q1
Q1
2N7002W-7-F_NC
2N7002W-7-F_NC
6 5
12
R1 30/F_NCR130/F_NC
31
Title
Title
Title
RUN POWER SW
RUN POWER SW
RUN POWER SW
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
GM3 2B
GM3 2B
GM3 2B
Date: Sheet
Date: Sheet
Date: Sheet
PQ17
PQ17 FDC655BN
FDC655BN
6 5
4 2 1
3
12
PR76
PR76 100K_NC
100K_NC
PQ13
PQ13 SI4800BDY-T1-E3
SI4800BDY-T1-E3
2N7002W-7-F_NC
2N7002W-7-F_NC
+5V_SUS+15V_ALW +5V_ALW
3 2 1
4
PC91
PC91 4700P
4700P
1 2
25
25
12
R2
1K_NCR21K_NC
31
2
Q2
Q2
QUANTA
QUANTA
QUANTA COMPUTER
+5V_SUS TDC : 1A
PC90
PC90
0.1U/50V/0603
0.1U/50V/0603
2N7002W-7-F_NC
2N7002W-7-F_NC
5
PC92
PC92
+3.3V_SUS
0.44A
0.1U/50V/0603
0.1U/50V/0603
PR73
PR73 20K
20K
1 2
2
Q3
Q3
53 62Monday, March 24, 2008
53 62Monday, March 24, 2008
53 62Monday, March 24, 2008
12
31
1 2
R3
1K_NCR31K_NC
of
of
of
PR77
PR77 20K
20K
A
B
C
D
E
PC2 2200P
PC2 2200P
1 2
PC4 0.1U
PC4 0.1U
1 2
50
C975
C975
50
50
50
for EMI resquirement, add Reserve on jump on +VCHGR and close to pin1 and 2 of JABT1
1 1
Adress : 16H
JBAT1
JBAT1
BATT_PRES#
1775946-2
1775946-2
2 2
BATT1+ BATT2+
SMB_CLK
SMB_DAT
SYSPRES#
BATT_VOLT
BATT1­BATT2-
1000P
1000P
1 2 3 4 5 6 7 8 9
+3.3V_ALW
PD2
PD2
1
DA204U_NC
DA204U_NC
603
603
50
50
20
10
DB_PSID DB_PSID_R
20
RP1
RP1 100X2
100X2
2
1
4
3
2
1
4
3
RP2
RP2 100X2
100X2
PL1
PL1
603
603
PD1
PD1
2
DA204U_NC
DA204U_NC
3
20
20
BLM11B102SPT
BLM11B102SPT
1
2 1
40
40
PD4
PD4
2
DA204U_NC
DA204U_NC
3
D31
D31
SSM24PT_NC
SSM24PT_NC
PD3
PD3
2
1
DA204U_NC
DA204U_NC
3
20
20
3 1
PR83
PR83 100K/F
100K/F
2
12
PR84
PR84 15K/F
15K/F
1
3
20
20
PQ19
PQ19 2N7002W-7-F
2N7002W-7-F
2
1 3
PQ18
PQ18 MMST3904-7-F
MMST3904-7-F
40
40
2
+VCHGR 46
SMBUS Address 16
SMBCLK0 31,46 SMBDAT0 31,46
+5V_ALW2
1
20
20
PR81
PR81
1 2
100
100
+5V_ALW2
PD8
PD8 DA204U_NC
DA204U_NC
PR79
PR79 10K
10K
1 2
1 2
PR80 100_NCPR80 100_NC
2
3
+5V_ALW2
20
20
PD7
PD7 DA204U
DA204U
1
+3.3V_ALW
12
+3.3V_ALW
2
3
PR1
PR1 10K
10K
12
PR82
PR82
2.2K
2.2K
PBAT_PRES# 31 PBAT_ALARM#
PS_ID 31
PS_ID_DISABLE#
3 3
J5
J5
17
GND
18
GND
19
GND
20
GND
21
GND
22
GND
23
GND
24
GND
25
GND
26
JACK_LED
27
ICH_USBP2-12 ICH_USBP2+12
BAT1_LED38
4 4
ICH_USBP2­ICH_USBP2+
8/15: move the righT side USB and DC-in connector schematic to DB. so change BTB(J14) CONN to 32pin
A
PWR
28
USB-
29
USB+
30
GND
31
BAT_LED
32
USB_OC
DC DC DC DC DC DC DC DC DC
PSID PWR
USB-
USB+
GND
BAT_LED
USB_EN
QT110326-3101G-7F
QT110326-3101G-7F
1 2 3 4 5 6 7 8 9
DB_PSID
10 11
ICH_USBP3-
12
ICH_USBP3+
13 14 15 16
B
+DC_IN_SS
+5V_SUS+5V_SUS
ICH_USBP3- 12 ICH_USBP3+ 12
BAT2_LED 38
USB_R_SIDE_EN# 31USB_OC2_3#12
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
C
D
Date: Sheet
DCIN,BATT CONNECTOR
DCIN,BATT CONNECTOR
DCIN,BATT CONNECTOR
GM3 2B
GM3 2B
GM3 2B
E
of
of
of
54 62Monday, March 24, 2008
54 62Monday, March 24, 2008
54 62Monday, March 24, 2008
5
4
3
2
1
Reserved for EMI.
Stitching caps
12
C389
C389
0.1U_NC
0.1U_NC
+1.05V_VCCP
12
C534
C534
0.1U_NC
0.1U_NC
25
25
603
603
Page 31 SIO(MEC5025)
+1.5V_RUN+PWR_SRC
12
PC87
D D
PC87
0.1U_NC
0.1U_NC
25
25
+1.5V_RUN +1.8V_SUS
603
603
Page 26 SATA (HDD&CD_ROM)
C C
Page 48
12
C463
C463
0.1U_NC
0.1U_NC
25
25
+1.05V_VCCP +3.3V_RUN
603
603
12
25
25
603
603
Page 27 PCCARD /CONN
C433
C433
0.1U_NC
0.1U_NC
+1.8V_SUS+1.5V_RUN
25
25
+1.05V_VCCP
603
603
1.5VRUN,1.05V(VTT)
Place C860,C216,C1426 close to PQ33. Place C862,C222,C1427 close to PQ73.
26
PV1
PV1
150-265525-C1(H:5.5)
150-265525-C1(H:5.5)
GND
1
Page 38 Azelia CODEC
Page 49
1.25V,1.8V,0.9V
PV2
PV2
150-265525-C1(H:5.5)
150-265525-C1(H:5.5)
GND
1
PV3
PV3
150-265525-C1(H:5.5)
150-265525-C1(H:5.5)
GND
1
Page 40 LAN(BCM5755M)
Place C867,C254,C1428 close to PQ91. Place C863,C253,C1429 close to PQ92.
Page 51 CPU_MAX8786(3phase)
B B
A A
5
4
Page 52 D/D Power
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
3
2
Date: Sheet
EMI CAP
EMI CAP
EMI CAP
GM3 2B
GM3 2B
GM3 2B
1
of
of
of
55 62Monday, March 24, 2008
55 62Monday, March 24, 2008
55 62Monday, March 24, 2008
1
2
3
4
5
6
7
8
30
+3.3V_SUS
WWAN, WPAN
32
7 8
A A
AJ26
ICH_SMBCLK
ICH8-M
AD19
ICH_SMBDATA
2.2K2.2K
+3.3V_WLAN
7002
WLAN_SMBCLK WLAN_SMBDAT
EXPRESS CARD
30
MINICARD-WLAN
32
7002
+3.3V_ALW
2.2K2.2K
110
SMBCLK0
111
SMBDAT0
B B
+3.3V_WLAN
100
100
3
4
10
9
BATTERY
CHARGER
+3.3V_ALW
6 5
LCD
7
CLOCK
6
115 116
SMBCLK1 SMBDAT1
10K 10K
+3.3V_RUN
7002
7002
SIO
+3.3V_RUN
10 9
THERMAL
ITE8512
C C
+3.3V_ALW
2.2K 2.2K
+3.3V_RUN
117
SMBCLK2
D D
118
SMBDAT2
7002
7002
+3.3V_RUN
1
2
3
4
5
2
MEDIA BUTTON
3
8
M86LP/THERMAL
7
6
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
SMBUS BLOCK
SMBUS BLOCK
SMBUS BLOCK
GM3 2B
GM3 2B
GM3 2B
7
of
of
of
56 62Monday, March 24, 2008
56 62Monday, March 24, 2008
56 62Monday, March 24, 2008
8
5
POWER STATES
Signal
State
SLP S3#
SLP S4#
SLP S5#
S4 STATE#
4
ALWAYS PLANE
SUS PLANE
RUN PLANE
CLOCKS
3
2
USB PORT#
1
DESTINATION
S0 (Full ON) / M0
D D
S3 (Suspend to RAM) / M1 LOW HIGH HIGH
S4 (Suspend to DISK) / M1
S5 (SOFT OFF) / M1 LOW HIGH LOW
HIGH HIGH
HIGH
LOW HIGH HIGH
ICH8-M
S3 (Suspend to RAM) / M-OFF
S4 (Suspend to DISK) / M-OFF HIGH
S5 (SOFT OFF) / M-OFF
LOW HIGH HIGH
LOW LOW
LOW LOW LOW
0 1 2 3 4 5 6 7
Right Top Right Bottom Side TOP Side Bottom Ext. USB TOP DIgital Camera Express Card WPAN/Bluetooth
PM TABLE
C C
State
S0
S3
S5 S4/AC
B B
S5 S4/AC don't exist
+3.3V_ALW +1.8V_SUS +3.3V_RTC_LDO
power
+3.3V_WLAN
plane
+5V_ALW +15V_ALW
ON
ON
OFF
+0.9V_DDR_VTT +1.8V_LOM +3.3V_LAN +3.3V_SUS +5V_SUS
ON ON
ON
OFF
OFF
+1.05V_VCCP
+1.25V_RUN
+1.5V_CARD
+1.5V_RUN
+3.3V_CARD
+3.3V_CARDAUX
+3.3V_R5C832
+3.3V_RUN
+3.3V_RUN_CARD +2.5V_RUN +5V_MOD +5V_RUN +5V_SPK_AMP +CPU_PWR_SRC +VCC_CORE +VDDA
OFFON
OFF
OFF
+DC_IN +DC_IN_SS +PWR_SRC +RTC_CELL
ON
ON
ON
ON
ECE 5011
PCI EXPRESS
Lane 1 Lane 2
8 9 1 2 3 4
DESTINATION MINI CARD-1 WWAN MINI CARD-2 WLAN
Ext. USB Bottom WWAN None None None None
Lane 3
PCI TABLE
PCI DEVICE IDSEL
REQ#/GNT#
PIRQ
Lane 4 Lane 5 Lane 6
BCM4401B
R5C833
A A
AD17 REQ#1 / GNT#1
5
REQ#0 / GNT#0AD16 PIRQB
PIRQC: Card reader PIEQD: 1394
4
3
MINI CARD-3 WPAN Express Card None None
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
QUANTA
QUANTA
QUANTA COMPUTER
Schematic Block Diagram1
Schematic Block Diagram1
Schematic Block Diagram1
GM3 2B
GM3 2B
GM3 2B
1
of
of
of
57 62Monday, March 24, 2008
57 62Monday, March 24, 2008
57 62Monday, March 24, 2008
5
4
GM3 Power Design Block Diagram
3
2
1
2007/09/06
+5V_SUS +3.3V_SUS
CPU POWER
ISL6266
TWO PHASE SOLUTION
Pag 51
SYSTEM POWER
ISL6237
Pag 52
1.8VSUS_PWRGD
+0.9V_DDR_VTT
+1.8V_SUS
RUN_ON
+5V_ALW
+5V_VCC1
+1.8V_SUS
MAX8794
IMVP_PWRGD
+VCC_CORE
+5V_ALW
+3.3V_ALW
+5V_ALW2
+15V_ALW
3V_ALW_PWRGD
5V_ALW_PWRGD
+1.25V_RUN
+DC_IN
SI4835
+DC_IN_SS
D D
Power Jack
Q3 FDS4835
IMVP_VR_ON
Adapter input
Charger
MAX8731A
5V_ALW_ON
Pag 46
+VCHGR
C C
SI4835
+PWR_SRC
Primary Battery
+5V_ALW2(for +3.3V_ALW)
+5V_ALW
SUS_ON
DDR POWER
TPS51116
+1.8V_SUS
RUN_ON
B B
+5V_ALW
RUN_ON
FDS6298
Pag 53
SI4800BDY
Pag 53
+1.8V_RUN
+5V_RUN
RUN POWER PLANE SWITCH
RUN_ON
Pag 49
TPS51116/LDO
RUN_ON
+3.3V_ALW +3.3V_RUN
RUN_ON
+3.3V_ALW +3.3V_SUS
FDS8880_NL
Pag 53
FDC655BN
RUN_ON
Pag 53
A A
SUS_ON
+5V_ALW +5V_SUS
SI4800BDY
SUS POWER
GFX_RUN_ON
Pag 53
SUS_ON
5
4
3
N&S BRIDGE POWER
TPS51117
Pag 48
+5V_SUS
N&S BRIDGE POWER
MAX8632ETI+
Pag 50
MAX8632/LDO
2
+1.8V_SUS
1.05V_RUN_PWRGD +1.05V_VCCP
L6935TR
RUN_ON
GFX_CORE_PWRGD +VCC_GFX_CORE
GFX_PCIE_PWRGD
+1.1V_GFX_PCIE
+1.5V_RUN
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
COMPUTER
Power Block Diagram
Power Block Diagram
Power Block Diagram
GM3 2B
GM3 2B
GM3 2B
1
58 62Monday, March 24, 2008
58 62Monday, March 24, 2008
58 62Monday, March 24, 2008
of
of
of
6
1 All
7/25 1A
39 8/132
8/13253
8/15294
8/15195
8/15654
8/15197
8/16398
37-399 8/17
8/205210
8/2011 52 1A
12 52 8/20 1A
13 52 8/20 1A
14 49 8/20 1A
15 48 8/20 1A
16 48 8/20 1A
17 48 8/20 1A
18 48 8/20 1A
19 48 8/20 1A
20 48 8/20 1A
21 38 1A8/22
22 22 8/23 1A
23 8/23 1A42
13 31 37
24 8/24
40 48 55
26 37 8/27 1A
27 8/28 1A43
28 43 8/28 1A
29 37 8/28 1A
30 31 8/28 1A
31 8/28 1A39
32
28, 12 8/29 1A
33 37 8/29 1A
34 37 8/29 1A
8/2935 48 1A
36 49 8/29 1A
37 35 8/30 1A
38 31
8/30 1A
39 25,43,38 8/30 1A
40
53 1A8/305241
42 28 8/31 1A
43 22 9/2 1A
44 48 9/3 1A
45 52 9/3 1A
5
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A8/275225
1A8/3052
Item Page Date Rev. Description
Model
Pacino of Intel
F F
E E
D D
C C
46 52 9/3 1A
47 49 9/3 1A
48 20 9/3 1A
49 54 9/3 1A
50 38
9/3 1A
9/351 46 1A
52 48 9/3 1A
53 49 9/3 1A
54 50 9/3 1A
55 48 9/3 1A
B B
56 38 9/3 1A
57 17, 33, 34 9/3 1A
58 9/3 1A
26, 6
59 31 9/4 1A
60 46 9/5 1A
61 48 9/5 1A
62 37 9/6 1A
63 37 9/6 1A
42 9/664 1A
30 9/8 1A
65
4
Base on David.Lin 070725 1400 release preliminary schematic to check the all part PCB footprint. I found there are some parts not had footprint and update it. The change location as below.
There are some concern need to highlight: 1. D1changed to CH751H-40PT. 2. L84 & L85 need to changed to Dell PSL part. 3. LAN jack need to double check. 4. JKB1, JMOD1, JP1, L15 need to get the spec for create new layout footprint and apply for new P/N. 5. JDIM1 & JDIM2 should be conbined to one JDIM.
U12, L27, L28, C225, C226, D4, L9, U3, JDIM2, D1, L84, L85, U14, U18, U22, U23, U25, BT2, CON2, CON3, L34, L35, Q10, U11, U13,ESD1, CON7, D15, D38, D39, D40, JACMER1, JKB1, JMOD1, JP1, L15, M1, Q7, Q67, SW1, U20, U41, FL1, FL3, FL4, FL7, FL8, FL9, FL10, FL11, JDCIN1, PC125, PC139, PC151, PC153, PC161, PL3, PL4, PL10, PL11, PL12, PQ13, PQ24, PQ42, PQ43, PQ44, PQ45, PR84, PU1, PU4, PU9.
FAE review schematic and recommend add C8466 & C8356 between REM_DIODE1_P and REM_DIODE1_N. This is just a reservation in case there's any noise coupling issue happening. Then have 2 different filter cap locations (one near EMC1423 and the oyher near the OTP 3904 diode) to try to reduce the noise. Of cource, only one cap can be installed.
FAE review schematic and recommend add poly switch and 0.1u cap colse to 5V_RUN of HDMI CONN to avoid NB reboot.
FAE review schematic, NC FILO pin since 5C833 don't need cap to GND
The strap on VIP[3] is for enabling HD Audio on M86. so pull to hign.
move the right side USB and DC-in connector schematic to DB. so change BTB(J2) CONN to 32pin
8/15 FAE review schematic: reverse TMDS signal for working property. change voltage allocation resistor to make sure the input clock swing level is at 1.8V
8/16:per SPEC recommend: use 7002 to avoid the leakage current from 3V_SUS.
8/17:add diode to protect below GPIO port,p39---FAN1_PWM p38---SNIFFER1 and POWER_ SW_IN0#, p37---MEDIA_INT
8/20: For FAE suggestion. Charge pump from +5V LDO, might cause high ripple voltage. Add PC116 10U/6.3V/0603.
Since FDS8878 Rg too big,change PQ44 to FDS8884.
Change PR225 to 180K and PR224 to 294K for setting current limit.
For FAE recommend , PD16 could be deleted.
Change PR85 to 143K for 1.82 output voltage
Due to output ripple current too big ,cheange PL25 from 0.88uH to 1.5uH.
PR449 should be cancelled, not necessary
Change PR452 to 9.09k for OCP
For FAE recommend. PC447 no stuff, reserved.
Add PC78 for meet output ripple current.
Change PR102 to 4.53K and PR105 to 49.9k for setting VTT=1.1V. (VTTS =REFIN/2=1V)
Added LED level shift for support white LED need used 5V drive.
add level shift circuit to protect thermal IC
add level shift circuit to provent ALW and LAN plan interconnect
Check single net and correct by JM
Due to SIL1045R-3R8PF will be EOL, change PL11,PL12 to SIL1045R-3R3.
change KB pin number to 32 pin
change LED of LAN jack control signal to LINKLED
Co-layout SIM card connector and WTB together
Dell had update K/B pin define to 34 pin and re-define pin definition
KSO18 is output pin, so change to pin 85, and KB_DET# from pin 85 change to pin 70.
reverse 1~4 pin definitiom for thermal team design
change R5c833 PCI_PIRQD# to PCI_PIRQB# for AMD platform signal control requirement
due to move keyboard light sensor to media button board, add KB_BACKLITE_SET function to media button connector pin 10.
change keyboard pin number to 32 pin
For Dell recommend,change 1.5V LDO from MAX8794 to ST L6935.
For TI FAE recommend,connect PC76 to GND.
For support power USB function, change power to 5V_ALW
change IMVP6_PROCHOT# from pin 88 to GPI 1 for design requirement. and pin88 assign to 5V_ALW_ON
for EMC team requirement, reserve cap, ESD protect, common choke at CON side
Add PC180 for reserve MAX8778 IC.
Due to Pacino need to support USB charger function,change following item.
1.Change power plan from +5V_ALW to +5V_ALW2:pin9 ,pin7,pin19, PC116 and PR156
2.Add a load switch PQ42 for +5V_ALW to +5V_SUS
refer M08 platform, change to 100 ohm
Reserve external spread spectrum circuit for ATI graphic using
change PR455 to 237K from 178K to setting switching operating frequency at around 300 KHz
For FAE recommend, change PD14 input power from "+5V_ALW2" to "+5V_ALW" and PC116 can be NA.
For FAE recommend, conncet pin20 to pin19 for ISL6236 (or MAX8778) can populate on ISL6237 location.
Change PC155 to correct net name "+1.8V_SUS_P".
M86 internal thernal protect function pin is high active, re-design protect logic circuit for it.
for EMI resquirement, add Reserve on jump on +VCHGR and close to pin1 and 2 of JABT1
Reserve ESD protector at J4 pin1 (+3V_RUN )for Biometric (close to J4 )
Add PC39 for reserve debug noise issue.
Change PU5 pin6 through PR58 to +3.3V_SUS.
Change PR79 from 10K to 0ohm.
For reserve EMI sunnber, add PR157 and PC117.
For DELL recommend , reserve PC143 and PC144 for TI controller.
For DELL recommend , Add GPIO pin to mask HDD and BT LED active
for WLAN card using CLK-REQ pin, so change CLK_PCIE_MINI1 to WLAN and CLK_PCIE_MINI3 to WPAN.
add third pair LVDS signal to support 24bit panel
delete JACK_LED_DET# pin for DC jack design, so move KSO18 to pin99.
Reserve a 0 ohm PR59 resister for EA test.
Add PC145 for ST FAE recommend.
Add KB_BACKLITE_EN control circuit on MB side
Add 3_ALW at pin 5 for Lid switch IC power pin
Reserved BCM5784M SUPER_IDDQ circuit.
add MMC card function at card reader connector
3
2
1
A A
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
Title
Title
Title
X00 change list
X00 change list
X00 change list
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
GM3 2B
GM3 2B
GM3 2B
Date: Sheet
Date: Sheet
6
5
4
Date: Sheet
3
2
59 62Monday, March 24, 2008
59 62Monday, March 24, 2008
59 62Monday, March 24, 2008
of
of
of
1
6
Item Page Date Rev. Description
Model
Pacino
1
of Intel
2
F F
3
4 10/3 2A
5
64010/15 2A
7 10/15462A
8 10/16 2A
93310/17 2A
113810/18 2A Sniffer behavior is reverse, so modify design at PT stage
12
134010/22 2A change TPA6040A4 symbol design to meet SPEC definition
E E
141910/22 2A FAE suggust: Ground R2B/G2B/B2B and Implement R2SET to GND even if DAC2 is unused.
154310/23 2A for factory requirement---increase pad length for SMT yield rate
16
17
184410/29 2A HWPG monitor change: change 3V/5V_ALW_PWRGD to GFX_PCIE/CORE_PWRGD
reserve
reserve
19
20 10/30352A add FSUSB31K8X to control USB signal can be passed above SUS,
21
reserve
22
23
24
253111/1 2A change GPIO design
D D
26
273111/5 2A change GPIO design for fix thermail no function issue
28311/5 2A
294111/6 2A
303711/8 2A
reserve
314911/12 2A
324311/12 2A
333711/13 2A
343111/13 2A
352511/13 2A
C C
362511/13 2A
37
38 2A11/13
39
40
41
42
43
44
461311/14 2A 471911/15 2A
B B
12,13, 17,25, 09
52 ,50
8
19
41
5
2A9/27
10/2 2A
10/3 2A
10/15 2A
4
modify SST design issue:
1. delete unnecessary 0 ohm resistor
2. select correct frequence for DIS/UMA(R351&R342)
3. CARD_CLK_REQ# pull high
4. PLTRST_DELAY# pull down to avoid floating.
5. NC R451 to set Boot BIOS Strap for LPC interface
For second source concern, change below item.
1. Change PD9 from BAS316 to 1SS355
2. Change PD5 from CH501H-40PT to SDM10K45-7-F
3. Change PQ1 from BSS138-7-F to BSS138_NL
use 0805 0 ohm to instead of jump(1/8W, 1.6A per resistor )
pull high the GPIO 0 & GPIO 1 to enable PCIE FULL TX OUTPUT SWING and PCIE TRANSMITTER DE-EMPHASIS function to solve no display problem.
The camera pin assignment changed : 2 pin camera power pin and they are 3.3 V ..
3
2
change resister setting for STA92HD73C chip
Due to SI4810BDY-T1-E3 will be EOL, change PQ29 and PQ22 from SI4810 to SI4812.52
19
13
42
41
31, 37
12,13, 14,31
534810/30
38,54
35
38
50
50 For EE request, set VGA voltage to 0.95V/1.1V. Change PR116 to 69.8K and PR118 to 118K.
4
52
48
48
48
49
46
Due to VDDR4 and VDDR5(option reference source voltage) use 1.8V_RUN, FAE suggust DVPDATA use 1.8V pull high
remove external SIM card CONN that on MB side
It is multi_function pin(SMBALERT#/GPIO11). Before bios programming, the PIN
2A10/1710
function is SMBALERT.If it is pull high to 3.3_RUN, the ICH8 will be alert by this pin. It cause the S3 can’t normally sleep when system cold boot first time. so change to SUS power
10/18 2A change to 5784 design
10/24 2A for DELL SPEC---change camera conn pin definition
10/25 2A modify LED Key board Illumination schematic and remove EC pin 68
10/29 2A create +3.3V_S5 and +5V_S5 power at ICH part to fix ITE chip SUS resume problem,
and move LID_SW# to pinj 68 and pin 120 for S5_ON using
and USB_SIN_SIDE_EN# can control whether USB can supply power for external device at S5 mode
For EE request , add two power rail "+3.3V_S5" and "+5V_S5" for south-bridge battery mode.
2A
1.5V_RUN_PWRGD pull-high to RUN_ON for solve glitch issue.
10/30
2A
add 1000p cap and close to connector for EMI
10/30
2A
10/30 2A change LCD connector pin definition for LED panel:
1. change pin 8 form GND to +5V_ALW
2. change pin 16 from GND to LCD_VCC
1. delete pin 83 SNIFFER_YELLOW#
2. move 5V_ALW_ON to pin 83
3. swap pin 108 WIRELESS_ON/OFF# and pin 35 SNIFFER_PWR_SW#
11/1 2A change GPIO design
1. swap WIRELESS_ON/OFF# and SNIFFER_PWR_SW#
2. remove SNIFcircuitFER_YELLOW#
1. NC ADAPT_OC and ADAPT_TRIP_SEL
2. add #V_ALW_ON function at pin 76
Modify H_THERMTRIP# Voltage Level shift circuit.
add one GND pin for Audio precision dB value
add circuit to control CIR power
Add PR181 for reserve +5V_ALW2.
for EMI requirement, add 7p cap close to LAN switch
for DELL requirement, add fuse between +5V_RUN and +KB_LED
use pin 14(WRST#) to monitor THERM_STP# function
for Silicon image FAE suggestion:
1. EMI may come from the impedance mis-match, that'll get distorted waveform . Try to replace the common choke with (i.e 22 ohm ) resistor,
2. Try to reduce the source termination resistor (i.e 300 ohm --> 150 ohm) to get cleaner eye .
3. change AVCC33V to 3.3V_RUN per FAE suggestion:change C525 and C524 to 2.2u for batter Audio precision
Chnage PR11 to 100Kohm for set correct O.C.P.
2A11/13
Base on acoustic team test ,add two EC-cap for noice issue. Stuff C733 and C766.
2A11/13
2A11/13
Base on test result, change PR114 to 294K for set OCP.
2A11/13
Change PR161 to 11K for set correct OCP.
11/13
For 1.05V jitter issue, chnage below item.
2A
UMA: Change output CAP from 390U/2.5V/ESR10 to 330U/4V/ESR25
Discrete: 1. Change output CAP from 390U/2.5V/ESR10 to 330U/4V/ESR25
2. Add PC62 1500PF
Change 1.05V UMA PQ33 from FDS6676AS to FDMS8672S for improve efficiency.
2A11/13
11/13
Base on EA report test , stuff PR171 and PC180 for reduce hiogh side VDS ring.
2A
11/1345
2A
Due to software support UL function via "IINP", no stuff UL circuit. add 4.7k on PCIE_MCARD1_DET# trace to solve WLAN card detect issue change GPIO pin from 3.3V_RUN to 3.3V_delay to solve leakage problem
between 3.3V_RUN and 3.3v_delay(4ms) when boot.
1
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
Title
Title
Title
X01 change list
X01 change list
X01 change list
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
GM3 2B
GM3 2B
GM3 2B
Date: Sheet of
Date: Sheet
Date: Sheet
A A
6
5
4
3
2
of
of
60 62Monday, March 24, 2008
60 62Monday, March 24, 2008
60 62Monday, March 24, 2008
1
6
Model
Pacino of Intel
F F
E E
D D
C C
Item Page Date Rev. Description
1
32
11/26 2B
2
31
11/26 2B
3
31
11/26 2B
4
54
11/26 2B
5
38
11/26 2B
6
43
11/26 2B
7
45
11/27 2B
17
8
31
11/30 2B9
10
37
12/04 2B
11
22
12/04 2B
12
40
12/19 2B
13
31
12/26 2B
14
37
12/26 2B
15
19
12/26 2B
16
37
12/26 2B
17
37
12/26 2B
18
48
1/3 2B
19
50
1/3 2B
20
53
1/3 2B
21
48
1/3 2B
5
4
3
2
Change RTC connector because ME modifyr. Exchange 'SNIFFER_PWR_SW#' AND 'WIRELESS_ON/OFF#. per EC limition. Change NUM_LED# from SIO pin98 to pin 88 and used Pin 98 for BID only per EC limition. Change PSID relation parts to +5V_ALW2 for power saving in S5. Change Sniffer Switch power rail from RUN plane to ALW plane. Added LINK1000# for BCM cann't support GLAN LED drived by LINKLED#/SPD100LED#. Modify Screw hole base on ME update.
2B11/29
Link to MCH DPLL clock is wrong. Change to correct link. Fine tune GPIO define for EC. Change MMB LED power source from 5V_ALW2 plane to 5V_ALW for power saving and avoid LED
flash when AC in.
Check AMD +3.3V_DELAY power plane connection component for AMD new update REF133-7 file. Change Audio AMP thermal PAD leave to NC. Change SMBus pull hihg resistor form 2.2k to 10k for LED panel flash. since we will use WLAN and BT LED to show function at factory side.
Change power supply of Cap and Num LED from 5V_ALW2, 3.3V_ALW to 5V_RUN and 3.3V_RUN.
Change HDMI detect circuit to solve external panel feed back voltage shortage then caude ATI chip can't switch to HMDI mode problem.
Change the Media board power from 3V_ALW to 5V_ALW2 to solve LED flash issue when AC/Bat plug in.
Change the lid switch IC power source from 3.3V_SUS to 3.3V_ALW to avoid system can enter S4 mode but wake up fail problem
Change PC85 to 680P for meet sequence.
Change PR7 to 4.99K for adjust +1.1V_GFX_PCIE rail.
Change PQ11 from SO8 to power package footprint.
Change PR161 ,PR172 ,PR11 ,PR114 to correct resistance for reliability request.49
1
50 52
22
35
1/4 2B
remove USB charge circuit
23
26
1/7 2B
24
31
1/7 2B
25
19
1/7 2B
26 1/7
B B
A A
55
27
31
1/11 2B
28
41
1/11 2B
29
37
1/11 2B
30
6, 19
1/11 2B
6
pull DPST signal to high for setting 100% duty cycle
pin12 should reserve 1u cap for ITE8512JX using
modify HDMI detect circuit to fix the monitor detection problem..
2B
create EMI spring
per TXC report, we should change W1 cap to 18p
per IDT FAE suggestion, serial 22 ohm on DMIC_CLK can help DMIC performance
add 10u cap at JMB1, let 3.3V_ALE get lower drop voltage on MMB side.
EMI demand add 33p cap on RGB signal.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
X02 change list
X02 change list
X02 change list
GM3 2B
GM3 2B
GM3 2B
2
of
of
of
61 62Monday, March 24, 2008
61 62Monday, March 24, 2008
61 62Monday, March 24, 2008
1
6
Item Page Date Rev. Description
Model
Pacino
1 25 2/14 3A
of Intel
F F
E E
D D
2 25 2/14 3A 3 12,28,31 2/14 3A 4 50 2/20 3A 5 51 2/20 3A
6 48 2/20 3A 7 25 2/20 3A 8 48 2/15 3A
9 35 2/23 3A
10 35 2/25 3A
5
add level shift to separate the data and CLK of VGA IC and HDMI TV, and also reduce stray capacitance.
4
3
2
change diode to reduce stray capacitance per WPI suggestion
use pin-22 monitor ICH_AZ_CODEC_RST# to delay NB_MUTE# signal for solve PO noise issue
For Reliability calculate , change PR11 from 150K to 178K.
Due to C4E hung up issue, change v_core power IC from ISL6266A to ISL6262A. Below is change list.
1. PU2: Change PN from AL006266000 to AL006262025
2. PR24: Change PN from CS28252FB15 to CS26812FB13
3. PC39: Change PN from CH11006JB18 to CH12206KB14
4. PC38: Change PN from CH12704JB07 to CH14706KB18
5. PR139: Change PN from CS11002JB32 to CS12552FB18
6. PC141: Change PN from CH22206KB16 to CH21006JB10
7. PC40,PC41: Change PN from CH1336K1B02 to CH31006KB18
8. PR136: Change PN from CS23833F911 to CS24533F921
For 1.05V OVP issue in Vista , no stuff PC62.
Due to L6935 has improved powergood issue, no stuff PR183 and stuff PR66. add HDMI solution per Silicon image suggestion
1. Change R233 to 650 ohm
2. Remove external RC between HDMI +/- signal. add HDMI EMI solution DIS:CXCG900U000 / EXC24CG900U; UMACXCG240U000 / EXC24CG240U
add common chock for EMI solution Quanta PN: DC09004A014
cange power jump to 0805 resistor
1
11 27 2/25 3A
12 13, 37 2/25 3A
13 17 2/26 3A
14 13 2/27 3A
C C
15
2/2740, 41 3A
16 19 22/29
17 9 03/03 3A
18 40 03/05 3A
B B
A A
19 40 03/20 3A
6
add filter CAP for EMI
by ICH-8 GPIO-17 dectect the LED keyboard connector
exchange 27SS and 27NSS / DREF_SSCLK# & DREF_SSCLK for follow CLK GEN spec. design.
ICH_RSMRST# pull down for RTC timer issue when plug in AC
MUST ADD 2.2K-OHM RESISTORS TO PREVENT AMPLIFIER CLIPPING and ADD 220PF CAPACITORS TO ALLOW PROPER DYNAMIC RANGE MEASUREMENTS
Add 10k ohm on HDMI_DET to ensure Vin on test fixture input 2.4V the voltage not drop under 2V spec. definition.
3A
Based on SR_check 1.6, UMA should pull down 75 ohm on TV_DAC pins if disable TV-out function.
Change C518, C519 from 0.033uF to 0.01uF per Dell audio update requirement.
Change net name of "AUD_HP2_L1" between R708 & C525 to "AUD_HP2_L0_R" and "AUD_HP2_R1" between R708 & C525 to "AUD_HP2_R0_R" for the original net name same as U20.15 & U20.16 will cause the HP2 no function.
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
COMPUTER
A00 change list
A00 change list
A00 change list
GM3 2B
GM3 2B
GM3 2B
2
of
of
of
62 62Monday, March 24, 2008
62 62Monday, March 24, 2008
62 62Monday, March 24, 2008
1
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