Quanta G38A Schematic

1

www.schematic-x.blogspot.com

2

3

4

5

6

7

8

Pavilion Gaming Griffin1.1 INTEL SKL / KABY -H SYSTEM DIAGRAM

Charge

A A

DDR4

CPU Core

+1.0V/+1.2VSUS

+3V/+5V S5

B B

+VGACORE

FBVDDQ

1V8_MAIN/PEX_VDD

C C

LAN
RTL8107ESH/ 10/100
RTL8111HSH/ Gbe(Default)

TPM 2.0 SLB9665TT2.0

D D

(OPTION)

LANE7

PG.42

PG.44

PG.45~47

PG.49~50

PG.43

PG.51~53

PG.54

PG.55

PG.37

PG.36

M.2 2280-S3 SSD

PS8527A re-driver IC

LANE5 LANE6

Card Reader
RTS5237S-GR

PG.38

G-Sensor
HP2DC

PG.36

SMBUS

KBC
ITE IT8987E/BX

KB TP

SODIMM1

Max. 8GB

RVS

SODIMM2

Max. 8GB

RVS

HDD

WLAN
BT COMBO

ROM

LPC

PG.34

PG.34

FAN

PG.17

PG.18

PG.35

PG.35

PG.12

PG.39

PG.40PG.40PG.40

DDR4 2133MHz

Channel A

DDR4 2133MHz

Channel B

SATA 6GB/s

SATA0A

PCIEx4 32GB/s

LANE9,10,11,12

SATA 6GB/s

SATA1B

PCI-E x 1 Gen1

USB 2.0

PORT7

SPI

LPC

Speaker Amplifier
ALC1004-CG

INTEL

Sky Lake - H4+2
Kaby Lake - H4+2

Processor : Quad Core
Power : 45 (Watt)
Package : BGA1440
Size : 42 x 28 (mm)
Die Size : 13.6 x 9.1 (mm)

PG.2~8

DMI

INTEL PCH

Quanta_ConfidentialQuanta_Confidential

Lynx Point

Power : Watt
Package : FCBGA837
Size : 23 x 23 (mm)

PG.32

Quanta_Confidential

PG.9~16

AUDIO CODEC

I2C/I2S

ALC3258-CG

Azalia

PEG
X16 Lanes

USB 3.0

USB 2.0

NVIDIA N17E-G2/G1

Package 37.5 x 37.5mm

65W/85

27MHz

PORT1

USB 3.0 Port
(MB)

PG.33

PORT1

PG.31

PG.19~23

DP portC

DP portE

SN75DP159RSBR
re-driver IC

eDP portD

PS8330B re-driver IC

eDP (5.4Gb/s)

PORT3

USB 3.0 Port
(MB)

PG.33

PORT3

PORT4

HD CAM
(OPTION)

PG.28

Headphone amplifier
HPA0022642RTJR

eDP

VRAM gDDR5 x 8 pcs --N17E-G2

128M x32 / 256M x32
above 3.0GHz

PG.29

PG.30

PORT2

PORT4

USB 3.0 Ports
(DB)

PG.33

PORT2

PORT5

HD+ IR CAM
(OPTION)

PG.28 +PG.36

Hp

PG.32

Combo Jack

MIC

(DB)

PG.24~27

HDMI2.0

PG.29

mini display port

PG.30

17" eDP Panel
HD/FHD/UHD

USB3.0 Re-Driving IC
PTN36241G

PG.33

PG.28

STACKUP

01

TOP
GND
IN1
IN2
VCC
GND
IN3
GND
IN4
IN5
GND
BOT

3D CAM
Intel SR300 3D

PG.34PG.34

1

2

3

Speaker

top/rear (3209B1S)

PG.32

bottom/front
(18phi, FG-18CD1-3)

4

PG.31 PG.32

Dual Digital MICSpeaker

5

3D CAM MIC

INT CAM MIC

PG.28

PROJECT : G38A

PROJECT : G38A

PROJECT : G38A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Block Diagram

Block Diagram

NB5

NB5

6

NB5

7

Block Diagram

Date: Sheet of

Date: Sheet of

Date: Sheet of

156Tuesday, May 31, 2016

156Tuesday, May 31, 2016

156Tuesday, May 31, 2016

8

1A

1A

1A

5

D D

PROCHOT# (50ohm)
Trace Length <11 inches

Cb need placment near VR

H_PROCHOT#39,45

CPU_PLTRST # (50ohm)
Trace Length: 10~17 inches

VR_SVID_CLK_R

H_CPU_SVIDALRT#

CPU_PLTRST#R11

PLTRST#12,19,35,36,37,38,39

R27 *0_4/S

R25 220/F_4

C C

CPU CORE SVID HWPD

Layout note:

1.Need routing together

2.ALERT need between CLK and DATA.

PLACE THE PU RESISTORS
CLOSE TO VR
PULL UP IS IN THE VR MODULE

B B

CLOSE TO CPU
PLACE THE PU RESISTORS

CLOSE TO CPU
PLACE THE PU RESISTORS

A A

R4 499/F_4

Cb

C3
*47P/50V_4

R11 *1.5K/F_4

+VCCSTPLL

R26
*54.9/F_4

+VCCSTPLL

R23

56.2/F_4

C5
*0.1U/16V_4

+VCCSTPLL

R28
100/F_4

H_PROCHOT#_R

CPU_PLTRST#R

R13
*750/F_4

Close to CPU

SVID CLK

VR_SVID_CLK 45

Close to CPU

SVID ALERT

VR_SVID_ALERT# 45

Close to CPU

SVID DATA

H_CPU_SVIDDAT

5

R29 *0_4/S

VR_SVID_DATA 45

4

Host CLK:
Trace length < 11000 mils
Trace spacing = 15 / 20 mils, Impendence 85 ohm

CLK_CPU_BCLKP11
CLK_CPU_BCLKN11

CPU_PCI_BCLKP11
CPU_PCI_BCLKN11

CLK_DPLL_NSCCLKP11
CLK_DPLL_NSCCLKN11

DDR_VTT_CNTL18

PM_SYNC (50ohm)
Trace Length: 1~11.25 inches

PM_SYNC11

H_PM_DOWN11

EC_PECI11,39

SKTOCC_N_R13

+VCCSTPLL

R19 20_4

R15 *0_4/S

R16 *10K_4

PROCPWRGD (50ohm)
Trace Length: 1~11.25 inches

PROCPWRGD10

THERMTRIP# (50ohm)
Trace Length: 1.1~12 inches

Rb need placment near PCH

PM_THRMTRIP#5,11,39

+VCCSTPLL

Ra(R18) Not ins tall in SKL-H

+VCCSTPLL

Ra

R18
*10K_4

PROC_SEL#

R20
*0_4

4

3

SKYLAKE Processor (CLK,MISC,JTAG)

SKYLAKE_HALO

U1E

CLK_CPU_BCLKP
CLK_CPU_BCLKN

CPU_PCI_BCLKP
CPU_PCI_BCLKN

CLK_DPLL_NSCCLKP
CLK_DPLL_NSCCLKN

H_CPU_SVIDALRT#
VR_SVID_CLK_R
H_CPU_SVIDDAT
H_PROCHOT#_R

DDR_VTT_CNTL

H_VCCST_PWRGD

PROCPWRGD
CPU_PLTRST#R

H_PM_DOWN_R
EC_PECI
PM_THRMTRIP#

SKTOCC_NSKTOCC_N_R
PROC_SEL#

CATERR#

Rb

R14 1K_4

BCLKP
BCLKN

PCI_BCLKP
PCI_BCLKN

CLK24P
CLK24N

VIDALERT#
VIDSCK
VIDSOUT
PROCHOT#

DDR_VTT_CNTL

VCCST_PWRGD

PROCPWRGD
RESET#
PM_SYNC
PM_DOWN
PECI
THERMTRIP#

SKTOCC#
PROC_SELECT#

CATERR#

*SKL_H_BGA_BG A

BGA1440

5 OF 14

3

B31
A32

D35
C36

E31
D31

BH31
BH32
BH29
BR30

BT13

H13

BT31
BP35
BM34
BP31

BT34

J31

BR33

BN1

BM30

Quanta_Confidential

PROCPWRGD

R9
*10K_4

PM_THRMTRIP#

PROC_PREQ#
PROC_PRDY#

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]

CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]

CFG[17]
CFG[16]
CFG[19]
CFG[18]

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]

PROC_TDO

PROC_TDI
PROC_TMS
PROC_TCK

PROC_TRST#

CFG_RCOMP

BN25

CFG0

BN27

CFG1

BN26

CFG2

BN28

CFG3

BR20

CFG4

BM20

CFG5

BT20

CFG6

BP20

CFG7

BR23

CFG8

BR22

CFG9

BT23

CFG10

BT22

CFG11

BM19

CFG12

BR19

CFG13

BP19

CFG14

BT19

CFG15

BN23

CFG16

BP23

CFG17

BP22

CFG18

BN22

CFG19

BR27

XDP_BPM0

BT27

XDP_BPM1

BM31

XDP_BPM2

BT30

XDP_BPM3

BT28

XDP_TDO_CPU

BL32

XDP_TDI_CPU

BP28

XDP_TMS_CPU

BR28

XDP_TRST#_CPU

BP30

XDP_TRST#

BL30

XDP_PREQ#

BP27

XDP_PRDY#

BT25

CFG_RCOMP

Design Note(CFG_RCOMP) :
DEFENSIVE DESIGN 50-OHM FOR R40 PR (SV REQ)

HWPG10,39,43,44,49,50

2

TP8532
TP8533

CFG2
CFG3
CFG4
CFG5
CFG6

TP8534
TP8535
TP8536

CFG10

TP8537

CFG12
CFG13

TP8538
TP8539

TP8540
TP8541
TP8542
TP8543

TP8544
TP8545
TP2
TP1

TP8546
TP8547
TP8548
TP8549

XDP_TRST# 15
XDP_PREQ# 15
XDP_PRDY# 15

R1749.9/F_4

Ra close to CP U side
H_VCCST_PWRG D trace 0 .3" - 1. 5"

D2 RB501V-40

2

Processor pull-up (CPU)

H_PROCHOT#

XDP_TDO_CPU
XDP_TMS_CPU
XDP_TDI_CPU
XDP_PREQ#

XDP_TRST#_CPU
XDP_TRST#

R3 1K_4

R5 51_4
R6 *51_4
R7 *51_4
R8 *51_4

R10 51_4
R12 51_4

Processor Strapping

The CFG signals have a default value of '1' if not terminated on the board.

0 Enable; SET DFX ENABLED BIT IN DEBUG

1 , Disable;

CFG3

CFG2

CFG4

CFG5

CFG6

CFG10

CFG12

CFG13

+1.0V

+VCCSTPLL

R22

R21

*1K_4

1K_4

21

H_VCCST_PWRGD_R H_VCCST_PWRGD

C4
*10P/50V_4

Ra

R24 60.4/F_4

CFG3

CFG2

CFG4

CFG5

CFG6

CFG10

CFG12

CFG13

CPU VDDQ

Note: please kee p plane is enough for VDDQ 2 .8A

Placement cl ose to CPU.

+1.2VSUS

C6 0.1U/16V_4

C7 *0.1U/16V_4

NB5

NB5

NB5

1

+1.0V

+1.0V

R60 *1K_4

R61 *1K_4

R62 1K_4

R63 *1K_4

R64 *1K_4

R65 *1K_4

R66 *1K_4

R67 *1K_4

PROJECT : G38A

PROJECT : G38A

PROJECT : G38A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

SKL 1/7 (JTAG/MISC)

SKL 1/7 (JTAG/MISC)

SKL 1/7 (JTAG/MISC)

02

256Tuesday, May 31, 2016

256Tuesday, May 31, 2016

1

256Tuesday, May 31, 2016

1A

1A

1A

5

PEG_RXP019
PEG_RXN019

PEG_RXP119
PEG_RXN119

PEG_RXP219

D D

dGPU

C C

PEG_RCOMP

Trace length < 400 MILS
Trace width = 12 MILS
Trace spacing = 15 MILS

DMI DMI

PEG_RXN219

PEG_RXP319
PEG_RXN319

PEG_RXP419
PEG_RXN419

PEG_RXP519
PEG_RXN519

PEG_RXP619
PEG_RXN619

PEG_RXP719
PEG_RXN719

PEG_RXP819
PEG_RXN819

PEG_RXP919
PEG_RXN919

PEG_RXP1019
PEG_RXN1019

PEG_RXP1119
PEG_RXN1119

PEG_RXP1219
PEG_RXN1219

PEG_RXP1319
PEG_RXN1319

PEG_RXP1419
PEG_RXN1419

PEG_RXP1519
PEG_RXN1519

+VCCIO

DMI_RXP09
DMI_RXN09

DMI_RXP19
DMI_RXN19

DMI_RXP29
DMI_RXN29

DMI_RXP39
DMI_RXN39

4

SKYLAKE Processor (DMI,PEG,FDI)

E25
D25

E24
F24

E23
D23

E22
F22

E21
D21

E20
F20

E19
D19

E18
F18

D17
E17

F16
E16

D15
E15

F14
E14

D13
E13

F12
E12

D11
E11

F10
E10

R30 24 .9/F_4

PEG_COMP

U1C

PEG_RXP[0]
PEG_RXN[0]

PEG_RXP[1]
PEG_RXN[1]

PEG_RXP[2]
PEG_RXN[2]

PEG_RXP[3]
PEG_RXN[3]

PEG_RXP[4]
PEG_RXN[4]

PEG_RXP[5]
PEG_RXN[5]

PEG_RXP[6]
PEG_RXN[6]

PEG_RXP[7]
PEG_RXN[7]

PEG_RXP[8]
PEG_RXN[8]

PEG_RXP[9]
PEG_RXN[9]

PEG_RXP[10]
PEG_RXN[10]

PEG_RXP[11]
PEG_RXN[11]

PEG_RXP[12]
PEG_RXN[12]

PEG_RXP[13]
PEG_RXN[13]

PEG_RXP[14]
PEG_RXN[14]

PEG_RXP[15]
PEG_RXN[15]

G2

PEG_RCOMP

D8

DMI_RXP[0]

E8

DMI_RXN[0]

E6

DMI_RXP[1]

F6

DMI_RXN[1]

D5

DMI_RXP[2]

E5

DMI_RXN[2]

J8

DMI_RXP[3]

J9

DMI_RXN[3]

*SKL_H_BGA_BGA

SKYLAKE_HALO

BGA1440

3 OF 14

PEG_TXP[0]
PEG_TXN[0]

PEG_TXP[1]
PEG_TXN[1]

PEG_TXP[2]
PEG_TXN[2]

PEG_TXP[3]
PEG_TXN[3]

PEG_TXP[4]
PEG_TXN[4]

PEG_TXP[5]
PEG_TXN[5]

PEG_TXP[6]
PEG_TXN[6]

PEG_TXP[7]
PEG_TXN[7]

PEG_TXP[8]
PEG_TXN[8]

PEG_TXP[9]
PEG_TXN[9]

PEG_TXP[10]
PEG_TXN[10]

PEG_TXP[11]
PEG_TXN[11]

PEG_TXP[12]
PEG_TXN[12]

PEG_TXP[13]
PEG_TXN[13]

PEG_TXP[14]
PEG_TXN[14]

PEG_TXP[15]
PEG_TXN[15]

DMI_TXP[0]
DMI_TXN[0]

DMI_TXP[1]
DMI_TXN[1]

DMI_TXP[2]
DMI_TXN[2]

DMI_TXP[3]
DMI_TXN[3]

B25
A25

B24
C24

B23
A23

B22
C22

B21
A21

B20
C20

B19
A19

B18
C18

A17
B17

C16
B16

A15
B15

C14
B14

A13
B13

C12
B12

A11
B11

C10
B10

B8
A8

C6
B6

B5
A5

D4
B4

3

PEG_TXP0_C

C8 0.22U/10V_4

PEG_TXN0_C

C9 0.22U/10V_4

PEG_TXP1_C

C10 0.22U/10V_4

PEG_TXN1_C

C11 0.22U/10V_4

PEG_TXP2_C

C12 0.22U/10V_4

PEG_TXN2_C

C13 0.22U/10V_4

PEG_TXP3_C

C14 0.22U/10V_4

PEG_TXN3_C

C15 0.22U/10V_4

PEG_TXP4_C

C16 0.22U/10V_4

PEG_TXN4_C

C17 0.22U/10V_4

PEG_TXP5_C

C18 0.22U/10V_4

PEG_TXN5_C

C19 0.22U/10V_4

PEG_TXP6_C

C20 0.22U/10V_4

PEG_TXN6_C

C21 0.22U/10V_4

PEG_TXP7_C

C22 0.22U/10V_4

PEG_TXN7_C

C23 0.22U/10V_4

PEG_TXP8_C

C329 0.22U/10V_4

PEG_TXN8_C

C330 0.22U/10V_4

PEG_TXP9_C

C331 0.22U/10V_4

PEG_TXN9_C

C332 0.22U/10V_4

PEG_TXP10_C

C333 0.22U/10V_4

PEG_TXN10_C

C334 0.22U/10V_4

PEG_TXP11_C

C335 0.22U/10V_4

PEG_TXN11_C

C336 0.22U/10V_4

PEG_TXP12_C

C337 0.22U/10V_4

PEG_TXN12_C

C338 0.22U/10V_4

PEG_TXP13_C

C339 0.22U/10V_4

PEG_TXN13_C

C340 0.22U/10V_4

PEG_TXP14_C

C341 0.22U/10V_4

PEG_TXN14_C

C342 0.22U/10V_4

PEG_TXP15_C

C343 0.22U/10V_4

PEG_TXN15_C

C344 0.22U/10V_4

Quanta_Confidential

PEG_TXP0 19
PEG_TXN0 19

PEG_TXP1 19
PEG_TXN1 19

PEG_TXP2 19
PEG_TXN2 19

PEG_TXP3 19
PEG_TXN3 19

PEG_TXP4 19
PEG_TXN4 19

PEG_TXP5 19
PEG_TXN5 19

PEG_TXP6 19
PEG_TXN6 19

PEG_TXP7 19
PEG_TXN7 19

PEG_TXP8 19
PEG_TXN8 19

PEG_TXP9 19
PEG_TXN9 19

PEG_TXP10 19
PEG_TXN10 19

PEG_TXP11 19
PEG_TXN11 19

PEG_TXP12 19
PEG_TXN12 19

PEG_TXP13 19
PEG_TXN13 19

PEG_TXP14 19
PEG_TXN14 19

PEG_TXP15 19
PEG_TXN15 19

DMI_TXP0 9
DMI_TXN0 9

DMI_TXP1 9
DMI_TXN1 9

DMI_TXP2 9
DMI_TXN2 9

DMI_TXP3 9
DMI_TXN3 9

dGPU

2

1

03

SKYLAKE_HALO

U1D

*SKL_H_BGA_BGA

BGA1440

4 OF 14

EDP_TXP[0]
EDP_TXN[0]
EDP_TXP[1]
EDP_TXN[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]

EDP_AUXP
EDP_AUXN

EDP_DISP_UTIL

EDP_RCOMP

PROC_AUDIO_CLK

PROC_AUDIO_SDI

PROC_AUDIO_SDO

D29

CPU_EDP_TXP0

E29

CPU_EDP_TXN0

F28

CPU_EDP_TXP1

E28

CPU_EDP_TXN1

B29
A29
B28
C28

C26

CPU_EDP_AUXP

B26

CPU_EDP_AUXN

A33

EDP_DISP_UTIL

D37

EDP_RCOMP

DP & PEG Compensation

y

eDP_RCOMP
Trace length < 100 Mils
Trace Width 5 Mils Tr ace Spacing 25 Mils

G27

AUD_AZACPU_SCLK

G25

AUD_AZACPU_SDO_R

G29

AUD_AZACPU_SDI_R

TP3

R31 24 .9/F_4

R32 20_4

3

CPU_EDP_TXP0 28
CPU_EDP_TXN0 28
CPU_EDP_TXP1 28
CPU_EDP_TXN1 28

CPU_EDP_AUXP 2 8
CPU_EDP_AUXN 28

+VCCIO

AUD_AZACPU_SCLK 10
AUD_AZACPU_SDO_R 10
AUD_AZACPU_SDI 10

PROJECT : G38A

PROJECT : G38A

PROJECT : G38A

Quanta Computer Inc.

Quanta Computer Inc.

+1.2VSUS 2, 6,10,17,18,44 ,50,55
+3VS5 10,12,14, 16,28,29,30,3 5,39,43,44,4 8,49,50
+3V 5,9,10,11,1 2,13,14,17,1 8,21,22,28,2 9,30,31,32,33 ,34,35,36,37,38,39,40,45,4 8,54,55

2

NB5

NB5

NB5

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

03 -- SKL 2/7 (DMI/EDP/PEG)

03 -- SKL 2/7 (DMI/EDP/PEG)

03 -- SKL 2/7 (DMI/EDP/PEG)

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

356Tuesday, May 31 , 2016

356Tuesday, May 31 , 2016

356Tuesday, May 31 , 2016

1A

1A

1A

B B

A A

5

K36

DDI1_TXP[0]

K37

DDI1_TXN[0]

J35

DDI1_TXP[1]

J34

DDI1_TXN[1]

H37

DDI1_TXP[2]

H36

DDI1_TXN[2]

J37

DDI1_TXP[3]

J38

DDI1_TXN[3]

D27

DDI1_AUXP

E27

DDI1_AUXN

H34

DDI2_TXP[0]

H33

DDI2_TXN[0]

F37

DDI2_TXP[1]

G38

DDI2_TXN[1]

F34

DDI2_TXP[2]

F35

DDI2_TXN[2]

E37

DDI2_TXP[3]

E36

DDI2_TXN[3]

F26

DDI2_AUXP

E26

DDI2_AUXN

C34

DDI3_TXP[0]

D34

DDI3_TXN[0]

B36

DDI3_TXP[1]

B34

DDI3_TXN[1]

F33

DDI3_TXP[2]

E33

DDI3_TXN[2]

C33

DDI3_TXP[3]

B33

DDI3_TXN[3]

A27

DDI3_AUXP

B27

DDI3_AUXN

4

5

4

3

2

1

SKYLAKE Processor (DDR4)

D D

C C

B B

M_A_DQ[63:0]17

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

U1A

BR6

DDR0_DQ[0]

BT6

DDR0_DQ[1]

BP3

DDR0_DQ[2]

BR3

DDR0_DQ[3]

BN5

DDR0_DQ[4]

BP6

DDR0_DQ[5]

BP2

DDR0_DQ[6]

BN3

DDR0_DQ[7]

BL4

DDR0_DQ[8]

BL5

DDR0_DQ[9]

BL2

DDR0_DQ[10]

BM1

DDR0_DQ[11]

BK4

DDR0_DQ[12]

BK5

DDR0_DQ[13]

BK1

DDR0_DQ[14]

BK2

DDR0_DQ[15]

BG4

DDR0_DQ[16]/DDR0_DQ[32]

BG5

DDR0_DQ[17]/DDR0_DQ[33]

BF4

DDR0_DQ[18]/DDR0_DQ[34]

BF5

DDR0_DQ[19]/DDR0_DQ[35]

BG2

DDR0_DQ[20]/DDR0_DQ[36]

BG1

DDR0_DQ[21]/DDR0_DQ[37]

BF1

DDR0_DQ[22]/DDR0_DQ[38]

BF2

DDR0_DQ[23]/DDR0_DQ[39]

BD2

DDR0_DQ[24]/DDR0_DQ[40]

BD1

DDR0_DQ[25]/DDR0_DQ[41]

BC4

DDR0_DQ[26]/DDR0_DQ[42]

BC5

DDR0_DQ[27]/DDR0_DQ[43]

BD5

DDR0_DQ[28]/DDR0_DQ[44]

BD4

DDR0_DQ[29]/DDR0_DQ[45]

BC1

DDR0_DQ[30]/DDR0_DQ[46]

BC2

DDR0_DQ[31]/DDR0_DQ[47]

AB1

DDR0_DQ[32]/DDR1_DQ[0]

AB2

DDR0_DQ[33]/DDR1_DQ[1]

AA4

DDR0_DQ[34]/DDR1_DQ[2]

AA5

DDR0_DQ[35]/DDR1_DQ[3]

AB5

DDR0_DQ[36]/DDR1_DQ[4]

AB4

DDR0_DQ[37]/DDR1_DQ[5]

AA2

DDR0_DQ[38]/DDR1_DQ[6]

AA1

DDR0_DQ[39]/DDR1_DQ[7]

V5

DDR0_DQ[40]/DDR1_DQ[8]

V2

DDR0_DQ[41]/DDR1_DQ[9]

U1

DDR0_DQ[42]/DDR1_DQ[10]

U2

DDR0_DQ[43]/DDR1_DQ[11]

V1

DDR0_DQ[44]/DDR1_DQ[12]

V4

DDR0_DQ[45]/DDR1_DQ[13]

U5

DDR0_DQ[46]/DDR1_DQ[14]

U4

DDR0_DQ[47]/DDR1_DQ[15]

R2

DDR0_DQ[48]/DDR1_DQ[32]

P5

DDR0_DQ[49]/DDR1_DQ[33]

R4

DDR0_DQ[50]/DDR1_DQ[34]

P4

DDR0_DQ[51]/DDR1_DQ[35]

R5

DDR0_DQ[52]/DDR1_DQ[36]

P2

DDR0_DQ[53]/DDR1_DQ[37]

R1

DDR0_DQ[54]/DDR1_DQ[38]

P1

DDR0_DQ[55]/DDR1_DQ[39]

M4

DDR0_DQ[56]/DDR1_DQ[40]

M1

DDR0_DQ[57]/DDR1_DQ[41]

L4

DDR0_DQ[58]/DDR1_DQ[42]

L2

DDR0_DQ[59]/DDR1_DQ[43]

M5

DDR0_DQ[60]/DDR1_DQ[44]

M2

DDR0_DQ[61]/DDR1_DQ[45]

L5

DDR0_DQ[62]/DDR1_DQ[46]

L1

DDR0_DQ[63]/DDR1_DQ[47]

BA2

DDR0_ECC[0]

BA1

DDR0_ECC[1]

AY4

DDR0_ECC[2]

AY5

DDR0_ECC[3]

BA5

DDR0_ECC[4]

BA4

DDR0_ECC[5]

AY1

DDR0_ECC[6]

AY2

DDR0_ECC[7]

DDR CHANNEL A

*SKL_H_BGA_BGA

SKYLAKE_HALO

BGA1440

DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]

DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]

DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]

DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]

DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]

DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]

DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]

DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#

DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSN[7]/DDR1_DQSN[5]

DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSP[7]/DDR1_DQSP[5]

1 OF 14

DDR0_CKP[0]
DDR0_CKN[0]
DDR0_CKP[1]

DDR0_CKN[1]
DDR0_CLKP[2]
DDR0_CLKN[2]
DDR0_CLKP[3]
DDR0_CLKN[3]

DDR0_CKE[0]

DDR0_CKE[1]

DDR0_CKE[2]

DDR0_CKE[3]

DDR0_CS#[0]

DDR0_CS#[1]

DDR0_CS#[2]

DDR0_CS#[3]

DDR0_ODT[0]

DDR0_ODT[1]

DDR0_ODT[2]

DDR0_ODT[3]

DDR0_MA[3]
DDR0_MA[4]

DDR0_PAR

DDR0_ALERT#

DDR0_DQSN[0]
DDR0_DQSN[1]

DDR0_DQSP[0]
DDR0_DQSP[1]

DDR0_DQSP[8]
DDR0_DQSN[8]

AG1
AG2
AK2
AK1
AL3
AK3
AL2
AL1

AT1
AT2
AT3
AT5

AD5
AE2
AD2
AE5

AD3
AE4
AE1
AD4

AH5
AH1
AU1

AH4
AG4
AD1

AH3
AP4
AN4
AP5
AP2
AP1
AP3
AN1
AN3
AT4
AH2
AN2
AU4
AE3
AU2
AU3

AG3
AU5

BR5
BL3
BG3
BD3
AA3
U3
P3
L3

BP5
BK3
BF3
BC3
AB3
V3
R3
M3

AY3
BA3

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13

M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7

M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7

M_B_DQ[63:0]18

M_A_CLKP0 17
M_A_CLKN0 17
M_A_CLKP1 17
M_A_CLKN1 17

M_A_CKE0 17
M_A_CKE1 17

M_A_CS#0 17
M_A_CS#1 17

M_A_DIM0_ODT0 17
M_A_DIM0_ODT1 17

M_A_BS#0 17
M_A_BS#1 17

M_A_BG#0 17

M_A_RAS# 17
M_A_WE# 17
M_A_CAS# 17
M_A_A[13:0] 17

Quanta_Confidential

M_A_BG#1 17
M_A_ACT# 17

M_A_PARITY 17
M_A_ALERT# 17

M_A_DQSN[7:0] 17

M_A_DQSP[7:0] 17

R33 121/F_4
R34 75/F_4
R35 100/F_4

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2

U1B

BT11

DDR1_DQ[0]/DDR0_DQ[16]

BR11

DDR1_DQ[1]/DDR0_DQ[17]

BT8

DDR1_DQ[2]/DDR0_DQ[18]

BR8

DDR1_DQ[3]/DDR0_DQ[19]

BP11

DDR1_DQ[4]/DDR0_DQ[20]

BN11

DDR1_DQ[5]/DDR0_DQ[21]

BP8

DDR1_DQ[6]/DDR0_DQ[22]

BN8

DDR1_DQ[7]/DDR0_DQ[23]

BL12

DDR1_DQ[8]/DDR0_DQ[24]

BL11

DDR1_DQ[9]/DDR0_DQ[25]

BL8

DDR1_DQ[10]/DDR0_DQ[26]

BJ8

DDR1_DQ[11]/DDR0_DQ[27]

BJ11

DDR1_DQ[12]/DDR0_DQ[28]

BJ10

DDR1_DQ[13]/DDR0_DQ[29]

BL7

DDR1_DQ[14]/DDR0_DQ[30]

BJ7

DDR1_DQ[15]/DDR0_DQ[31]

BG11

DDR1_DQ[16]/DDR0_DQ[48]

BG10

DDR1_DQ[17]/DDR0_DQ[49]

BG8

DDR1_DQ[18]/DDR0_DQ[50]

BF8

DDR1_DQ[19]/DDR0_DQ[51]

BF11

DDR1_DQ[20]/DDR0_DQ[52]

BF10

DDR1_DQ[21]/DDR0_DQ[53]

BG7

DDR1_DQ[22]/DDR0_DQ[54]

BF7

DDR1_DQ[23]/DDR0_DQ[55]

BB11

DDR1_DQ[24]/DDR0_DQ[56]

BC11

DDR1_DQ[25]/DDR0_DQ[57]

BB8

DDR1_DQ[26]/DDR0_DQ[58]

BC8

DDR1_DQ[27]/DDR0_DQ[59]

BC10

DDR1_DQ[28]/DDR0_DQ[60]

BB10

DDR1_DQ[29]/DDR0_DQ[61]

BC7

DDR1_DQ[30]/DDR0_DQ[62]

BB7

DDR1_DQ[31]/DDR0_DQ[63]

AA11

DDR1_DQ[32]/DDR1_DQ[16]

AA10

DDR1_DQ[33]/DDR1_DQ[17]

AC11

DDR1_DQ[34]/DDR1_DQ[18]

AC10

DDR1_DQ[35]/DDR1_DQ[19]

AA7

DDR1_DQ[36]/DDR1_DQ[20]

AA8

DDR1_DQ[37]/DDR1_DQ[21]

AC8

DDR1_DQ[38]/DDR1_DQ[22]

AC7

DDR1_DQ[39]/DDR1_DQ[23]

W8

DDR1_DQ[40]/DDR1_DQ[24]

W7

DDR1_DQ[41]/DDR1_DQ[25]

V10

DDR1_DQ[42]/DDR1_DQ[26]

V11

DDR1_DQ[43]/DDR1_DQ[27]

W11

DDR1_DQ[44]/DDR1_DQ[28]

W10

DDR1_DQ[45]/DDR1_DQ[29]

V7

DDR1_DQ[46]/DDR1_DQ[30]

V8

DDR1_DQ[47]/DDR1_DQ[31]

R11

DDR1_DQ[48]

P11

DDR1_DQ[49]

P7

DDR1_DQ[50]

R8

DDR1_DQ[51]

R10

DDR1_DQ[52]

P10

DDR1_DQ[53]

R7

DDR1_DQ[54]

P8

DDR1_DQ[55]

L11

DDR1_DQ[56]

M11

DDR1_DQ[57]

L7

DDR1_DQ[58]

M8

DDR1_DQ[59]

L10

DDR1_DQ[60]

M10

DDR1_DQ[61]

M7

DDR1_DQ[62]

L8

DDR1_DQ[63]

AW11

DDR1_ECC[0]

AY11

DDR1_ECC[1]

AY8

DDR1_ECC[2]

AW8

DDR1_ECC[3]

AY10

DDR1_ECC[4]

AW10

DDR1_ECC[5]

AY7

DDR1_ECC[6]

AW7

DDR1_ECC[7]

G1

DDR_RCOMP[0]

H1

DDR_RCOMP[1]

J2

DDR_RCOMP[2]

*SKL_H_BGA_BGA

DDR CHANNEL B

SKYLAKE_HALO

BGA1440

DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]

DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]

DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]

DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]

DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]

DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]

DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]

DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]

DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#

DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSN[5]/DDR1_DQSN[3]

DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSP[1]/DDR0_DQSP[3]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSP[3]/DDR0_DQSP[7]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSP[5]/DDR1_DQSP[3]

2 OF 14

DDR1_CKP[0]
DDR1_CKN[0]
DDR1_CKP[1]
DDR1_CKN[1]

DDR1_CLKP[2]

DDR1_CLKN[2]

DDR1_CLKP[3]

DDR1_CLKN[3]

DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]

DDR1_CS#[0]
DDR1_CS#[1]
DDR1_CS#[2]
DDR1_CS#[3]

DDR1_ODT[0]
DDR1_ODT[1]
DDR1_ODT[2]
DDR1_ODT[3]

DDR1_MA[3]
DDR1_MA[4]

DDR1_PAR

DDR1_ALERT#

DDR1_DQSN[6]
DDR1_DQSN[7]

DDR1_DQSP[6]
DDR1_DQSP[7]

DDR1_DQSP[8]
DDR1_DQSN[8]

DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ

AM9
AN9
AM7
AM8
AM11
AM10
AJ10
AJ11

AT8
AT10
AT7
AT11

AF11
AE7
AF10
AE10

AF7
AE8
AE9
AE11

AH10
AH11
AF8

AH8
AH9
AR9

AJ9

M_B_A0

AK6

M_B_A1

AK5

M_B_A2

AL5

M_B_A3

AL6

M_B_A4

AM6

M_B_A5

AN7

M_B_A6

AN10

M_B_A7

AN8

M_B_A8

AR11

M_B_A9

AH7

M_B_A10

AN11

M_B_A11

AR10

M_B_A12

AF9

M_B_A13

AR7
AT9

AJ7
AR8

BP9

M_B_DQSN0

BL9

M_B_DQSN1

BG9

M_B_DQSN2

BC9

M_B_DQSN3

AC9

M_B_DQSN4

W9

M_B_DQSN5

R9

M_B_DQSN6

M9

M_B_DQSN7

BR9

M_B_DQSP0

BJ9

M_B_DQSP1

BF9

M_B_DQSP2

BB9

M_B_DQSP3

AA9

M_B_DQSP4

V9

M_B_DQSP5

P9

M_B_DQSP6

L9

M_B_DQSP7

AW9
AY9

BN13

+SM_VREF

BP13
BR13

SMDDR_VREF_DQ1_M3

M_B_CLKP0 18
M_B_CLKN0 18
M_B_CLKP1 18
M_B_CLKN1 18

M_B_CKE0 18
M_B_CKE1 18

M_B_CS#0 18
M_B_CS#1 18

M_B_DIM0_ODT0 18
M_B_DIM0_ODT1 18

M_B_RAS# 18
M_B_WE# 18

M_B_CAS# 18

M_B_BS#0 18
M_B_BS#1 18

M_B_BG#0 18

M_B_A[13:0] 18

M_B_BG#1 18
M_B_ACT# 18

M_B_PARITY 18
M_B_ALERT# 18

M_B_DQSN[7:0] 18

M_B_DQSP[7:0] 18

TP8503

04

SM_VREF 17

SMDDR_VREF_DQ1_M3 18

A A

PROJECT : G38A

PROJECT : G38A

PROJECT : G38A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

NB5

NB5

NB5

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

SKL 3/7 (DDR4 I/F)

SKL 3/7 (DDR4 I/F)

SKL 3/7 (DDR4 I/F)

1

456Tuesday, May 31, 2016

456Tuesday, May 31, 2016

456Tuesday, May 31, 2016

1A

1A

1A

5

4

3

2

1

SKYLAKE Processor (POWER)

Follow SKL H EDS page 133 to 45W(GT2): +VCCGT=55A

+VCCGT

AJ29

D D

C24
22U/6.3V_6

C27
22U/6.3V_6

C38
22U/6.3VS_6

C48

C C

B B

22U/6.3VS_6

C55
10U/6.3V_6

C64
1U/6.3V_4

C71
1U/6.3V_4

C78
1U/6.3V_4

C30
22U/6.3V_6

C34
22U/6.3V_6

C39
22U/6.3VS_6

C49
22U/6.3VS_6

C56
10U/6.3V_6

C65
1U/6.3V_4

C72
1U/6.3V_4

C79
1U/6.3V_4

C31
22U/6.3V_6

C35
22U/6.3V_6

C40
22U/6.3VS_6

C50
22U/6.3VS_6

C57
10U/6.3V_6

C66
1U/6.3V_4

C73
1U/6.3V_4

C80
1U/6.3V_4

C25
22U/6.3V_6

C36
22U/6.3V_6

C41
22U/6.3VS_6

C51
22U/6.3VS_6

C58
10U/6.3V_6

C67
1U/6.3V_4

C74
1U/6.3V_4

C81
1U/6.3V_4

C32
22U/6.3V_6

C28
22U/6.3V_6

C42
22U/6.3VS_6

C52
22U/6.3VS_6

C59
10U/6.3V_6

C68
1U/6.3V_4

C75
1U/6.3V_4

C82
1U/6.3V_4

C26
22U/6.3V_6

C29
22U/6.3V_6

C43
22U/6.3VS_6

C53
22U/6.3VS_6

C60
10U/6.3V_6

C62

47U/6.3V_8

C69
1U/6.3VS_4

C76
1U/6.3VS_4

C83
1U/6.3VS_4

C33
22U/6.3V_6

C37
22U/6.3V_6

C44
22U/6.3VS_6

C54
22U/6.3VS_6

C61
10U/6.3V_6

C63

47U/6.3V_8

C70
1U/6.3V_4

C77
1U/6.3V_4

C84
1U/6.3V_4

AJ30
AJ31
AJ32
AJ33
AJ34
AJ35

AJ36
AK31
AK32
AK33
AK34
AK35
AK36
AK37
AK38

AL13

AL29

AL30

AL31

AL32

AL35

AL36

AL37

AL38
AM13
AM14
AM29
AM30
AM31
AM32
AM33
AM34
AM35
AM36
AN13
AN14
AN31
AN32
AN33
AN34
AN35
AN36
AN37
AN38
AP13
AP14
AP29
AP30
AP31
AP32
AP35
AP36
AP37
AP38
AR29
AR30
AR31
AR32
AR33
AR34
AR35
AR36
AT14
AT31
AT32
AT33
AT34
AT35
AT36
AT37
AT38
AU14
AU29
AU30
AU31
AU32
AU35
AU36
AU37
AU38

SKYLAKE_HALO

U1N

VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT

*SKL_H_BGA_BGA

BGA1440

14 OF 14

VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX

VCCGT_SENSE

VSSGTX_SENSE

VSSGT_SENSE

VCCGTX_SENSE

AF29
AF30
AF31
AF32
AF33
AF34
AG13
AG14
AG31
AG32
AG33
AG34
AG35
AG36
AH13
AH14
AH29
AH30
AH31
AH32
AJ13
AJ14

Quanta_Confidential

AH38
AH35
AH37
AH36

VCCGT_SENSE 45

VSSGT_SENSE 45

IO Thrm Protect

Location need thermal confirm

+3VPCU +3VPCU

R36
20K/F_4

For 75 degree, 1.2v limit, (HW)

THER_GPU THER_PIPE

R39
100K_4 NTC

THRM_MOINTOR2 39 THRM_MOINTOR1 39

C45

0.1U/16V_4

1 2

CPU Thermal Sensor
Location need thermal confirm

MBCLK25,10,39

MBDATA25,10,39

+3V

+1.0V

PM_THRMTRIP#2,11,39

MBCLK2

MBDATA2

CPU_THRMTRIP#

R42 *10K/F_4

R43*4.7K_4

1 3

*METR3904-G

GPU Thermal Sensor

U8

EXTTS#1_R

8

SCLK

7

SDA

6

ALERT#

4

OVERT#

*TMP431ADGKR

Need Check PN(EOD)

MBCLK25,10,39

MBDATA25,10,39

+3V

R332 10K/F_4

+3V

EXTTS#113

MBCLK2

MBDATA2

R8607 10K/F_4

R8608 *0_4

For PIPE USEFor GPU USE

R38
20K/F_4

For 75 degree, 1.2v limit, (HW)

R41
100K_4 NTC

U4

8

7

6

4

2

Q3

SCLK

SDA

ALERT#

OVERT#

*G781P8

CPU_THRMTRIP#

1

VCC

2

DXP

3

DXN

5

GND

VCC

DXP

DXN

GND

C327 *0.01U/50V_4

C47

0.1U/16V_4

1 2

C1 *0.01U/50V_4

1

2

3

5

CPU_THERMDA

C85
*2200P/50V_4

CPU_THERMDC

AL000431014

DDR_THERMDA

C328
*2200P/50V_4

DDR_THERMDC

Main:AL001412003 EMC1412-1-ACZL-TR(98h)

+VCC_CORE 7,45,46
+1.2VSUS 2,6,10,17,18,44,50,55

+3V

2

TMP431ADGKR(98h)

+3V

2

Q9
*METR3904-G

1 3

Q2
*METR3904-G

1 3

05

2nd:AL000431014 TMP431ADGKR(98h)

A A

PROJECT : G38A

PROJECT : G38A

PROJECT : G38A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

NB5

NB5

NB5

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

SKL 4/7 (POWER)

SKL 4/7 (POWER)

SKL 4/7 (POWER)

1

556Tuesday, May 31, 2016

556Tuesday, May 31, 2016

556Tuesday, May 31, 2016

1A

1A

1A

5

4

3

2

1

06

Follow SKL H EDS page 135 to 45W(GT2): VCCSA=11.1A

+VCCSA

D D

Follow SKL H EDS P136 to 45W: VCCIO
+VCCIO = 0.95V

C C

B B

C106
10U/6.3V_6

C93

C86

10U/6.3V_6

10U/6.3V_6

C90

C91

10U/6.3V_6

10U/6.3V_6

C100
1U/6.3V_4

C114
1U/6.3V_4

+VDDQC +VCCSTG +VCCPLL_OC +VCCPLL+VCCIO

C119

C118
10U/6.3V_6

+VCCIO

C94
22U/6.3VS_6

C92
10U/6.3V_6

C101
1U/6.3V_4

C112
22U/6.3VS_6

C115
1U/6.3V_4

1U/6.3V_4

+VCCIO

C120

C87
22U/6.3VS_6

C107
10U/6.3V_6

C110
1U/6.3V_4

C113
22U/6.3VS_6

C116
10U/6.3V_6

1U/6.3V_4

C121

AG12

K29
K30
K31
K32
K33
K34
K35
L31
L32
L35
L36
L37
L38
M29
M30
M31
M32
M33
M34
M35
M36

G15
G17
G19
G21
H15
H16
H17
H19
H20
H21
H26
H27

J30

J15
J16
J17
J19
J20
J21
J26
J27

VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA

VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO

Close CPUUnder CPU

1U/6.3V_4

U1I

*SKL_H_BGA_BGA

SKYLAKE_HALO

BGA1440

11.1 A 2.8 A

5.5 A

VCCPLL_OC

0.26 A

VCCPLL_OC

0.12 A

0.145 A

VCCSA_SENSE
VSSSA_SENSE

VCCIO_SENSE
VSSIO_SENSE

9 OF 14

C123

C122

1U/6.3V_4 R53 *4 9.9/F_4

Follow SKL H EDS page 135 45W: VDDQ=2.8A

+1.2VSUS

AA6

VDDQ

AE12

VDDQ

AF5

VDDQ

AF6

VDDQ

AG5

VDDQ

AG9

VDDQ

AJ12

VDDQ

AL11

VDDQ

AP6

VDDQ

AP7

VDDQ

AR12

VDDQ

AR6

VDDQ

AT12

VDDQ

AW6

VDDQ

AY6

VDDQ

J5

VDDQ

J6

VDDQ

K12

VDDQ

K6

VDDQ

L12

VDDQ

L6

VDDQ

R6

VDDQ

T6

VDDQ

W6

VDDQ

Y12

VDDQC

BH13
G11

H30

VCCST

H29

VCCSTG

G30

VCCSTG

H28

VCCPLL

J28

VCCPLL

M38
M37

H14

VCCIO_VCCSENSE

J14

VSSIO_VSSSENSE

R44 *0_6/S

+VCCPLL_OC +1.2VSUS

+VCCPLL +VCCSTPLL

R45 *0_6

R47 *0_6/S

R48 *0_6/S

C95
22U/6.3VS_6

C108
10U/6.3V_6

C102
10U/6.3V_6

+VDDQC

+VCCPLL_OC

+VCCSTG

+VCCPLL

VCCSA_SENSE 45
VSSSA_SENSE 45

C88
22U/6.3VS_6

C109
10U/6.3V_6

C103
10U/6.3V_6

+VCCSTPLL

+VCCIO

+1.2VSUS+VDDQC

+1.2V_VCCPL L_OC

C89

C96

22U/6.3VS_6

22U/6.3VS_6

C97

C98

10U/6.3V_6

10U/6.3V_6

C104

C105

10U/6.3V_6

10U/6.3V_6

C117
1U/6.3V_4

R46
100_4

R49
100_4

Quanta_Confidential

C99
10U/6.3V_6

C111
10U/6.3V_6

BJ17
BJ19

BJ20
BK17
BK19
BK20

BL16

BL17

BL18

BL19

BL20

BL21
BM17
BN17

BJ23

BJ26

BJ27
BK23
BK26
BK27

BL23

BL24

BL25

BL26

BL27

BL28
BM24

BL15
BM16

BL22
BM22

BP15
BR15

BT15

BP16
BR16

BT16

BN15
BM15

BP17
BN16

BM14

BL14

BJ35

BJ36

AT13
AW13

AU13
AY13

BT29
BR25
BP25

R54 *4 9.9/F_4
R55 *4 9.9/F_4

TP76
TP77

TP6
TP7

CPU_OPC_COMP
CPU_OPCE_COMP
CPU_OPCE_COMP2

Unconnected for Processors without OPC.

SKYLAKE_HALO

U1J

BGA1440

VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC

RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD

VCCOPC_SENSE
VSSOPC_SENSE

RSVD
RSVD

VCCEOPIO
VCCEOPIO
VCCEOPIO

RSVD
RSVD
RSVD

VCCEOPIO_SENSE
VSSEOPIO_SENSE

RSVD
RSVD

VCC_OPC_1P8
VCC_OPC_1P8

RSVD
RSVD

ZVM#
MSM#

ZVM2#
MSM2#

OPC_RCOMP
OPCE_RCOMP
OPCE_RCOMP2

10 OF 14

*SKL_H_BGA_BGA

C125

C124

22U/6.3V_6

1U/6.3V_4

A A

5

4

+VCCSTG

R50 0_4

R51 *0_4

R52 *0_4

+VCCSTPLL

+1.0V

+VCCIO

PROJECT : G38A

PROJECT : G38A

PROJECT : G38A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

SKL 5/7 (POWER&GND )

SKL 5/7 (POWER&GND )

NB5

NB5

3

2

NB5

SKL 5/7 (POWER&GND )

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

1A

1A

1A

656Tuesday, May 31 , 20 16

656Tuesday, May 31 , 20 16

656Tuesday, May 31 , 20 16

5

4

3

2

1

07

+VCC_CORE

U1G

AA13
AA31
AA32
AA33
AA34
AA35
AA36
AA37
AA38
AB29
AB30
AB31
AB32
AB35
AB36
AB37
AB38
AC13
AC14
AC29
AC30
AC31
AC32
AC33
AC34
AC35
AC36
AD13
AD14
AD31
AD32
AD33
AD34
AD35
AD36
AD37
AD38
AE13
AE14
AE30
AE31
AE32
AE35
AE36
AE37
AE38

AF35
AF36
AF37
AF38

K13
K14
L13
N13
N14
N30
N31
N32
N35
N36
N37
N38
P13

SKYLAKE_HALO

BGA1440

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

*SKL_H_BGA_BGA

7 OF 14

VCC_SENSE

VSS_SENSE

V32

VCC

V33

VCC

V34

VCC

V35

VCC

V36

VCC

V37

VCC

V38

VCC

W13

VCC

W14

VCC

W29

VCC

W30

VCC

W31

VCC

W32

VCC

W35

VCC

W36

VCC

W37

VCC

W38

VCC

Y29

VCC

Y30

VCC

Y31

VCC

Y32

VCC

Y33

VCC

Y34

VCC

Y35

VCC

Y36

VCC

L14

VCC

P29

VCC

P30

VCC

P31

VCC

P32

VCC

P33

VCC

P34

VCC

P35

VCC

P36

VCC

R13

VCC

R31

VCC

R32

VCC

R33

VCC

R34

VCC

R35

VCC

R36

VCC

R37

VCC

R38

VCC

T29

VCC

T30

VCC

T31

VCC

T32

VCC

T35

VCC

T36

VCC

T37

VCC

T38

VCC

U29

VCC

U30

VCC

U31

VCC

U32

VCC

U33

VCC

U34

VCC

U35

VCC

U36

VCC

V13

VCC

V14

VCC

V31

VCC

P14

VCC

AG37
AG38

VCC_SENSE
VSS_SENSE

1 2

1 2

1 2

C134

C133

0.1U/16V_4

C150

0.1U/16V_4

C168

0.1U/16V_4

1 2

1 2

1 2

0.1U/16V_4

C151

0.1U/16V_4

C169

0.1U/16V_4

C135

0.1U/16V_4

1 2

C152

0.1U/16V_4

1 2

C170

0.1U/16V_4

1 2

Quanta_Confidential

+VCC_CORE

R56
*100_4

VCC_SENSE 45
VSS_SENSE 45

R57
*100_4

C146

0.1U/16V_4

0.1U/16V_4

1 2

C153

0.1U/16V_4

1 2

C171

0.1U/16V_4

1 2

1 2

1 2

C154

0.1U/16V_4

1 2

1 2

C172

0.1U/16V_4

1 2

1 2

Sense resistor should be placed within 2
inches (50.8 mm) of the processor socket

0.1U/16V_4

C155

0.1U/16V_4

C173

0.1U/16V_4

0.1U/16V_4

1 2

C156

0.1U/16V_4

1 2

C174

0.1U/16V_4

1 2

C148

C136

C147

Trace Impendence 50 ohm

C137

0.1U/16V_4

1 2

C157

0.1U/16V_4

1 2

C175

0.1U/16V_4

1 2

C138

0.1U/16V_4

1 2

C158

0.1U/16V_4

1 2

C176

0.1U/16V_4

1 2

D D

C C

B B

Follow SKL H EDS page 131 to 45W(GT2): VCC_CORE=68A

C128

C126
22U/6.3V_6

C139
22U/6.3V_6

C160
22U/6.3V_6

C177
22U/6.3V_6

C185
10U/6.3V_6

C197
1U/6.3V_4

C127
22U/6.3V_6

C140
22U/6.3V_6

C161
22U/6.3V_6

C178
22U/6.3V_6

C186
10U/6.3V_6

C198
1U/6.3V_4

22U/6.3V_6

C159
22U/6.3V_6

C162
22U/6.3V_6

C179
22U/6.3V_6

C187
10U/6.3V_6

C199
1U/6.3V_4

C129
22U/6.3V_6

C141
22U/6.3V_6

C163
22U/6.3V_6

C180
22U/6.3V_6

C188
10U/6.3V_6

C200
1U/6.3V_4

C130
22U/6.3V_6

C149
22U/6.3V_6

C164
22U/6.3V_6

C181
22U/6.3V_6

C189
10U/6.3V_6

C193
10U/6.3V_6

C201
1U/6.3V_4

C131
22U/6.3V_6

C142
22U/6.3V_6

C165
22U/6.3V_6

C182
22U/6.3V_6

C190
10U/6.3V_6

C194
10U/6.3V_6

C202
1U/6.3V_4

C132
22U/6.3V_6

C143
22U/6.3V_6

C166
22U/6.3V_6

C183
22U/6.3V_6

C191
10U/6.3V_6

C195
10U/6.3V_6

C203
1U/6.3VS_4

C205

47U/6.3V_8

C145
22U/6.3V_6

C144
22U/6.3V_6

C167
22U/6.3V_6

C184
22U/6.3V_6

C192
10U/6.3V_6

C196
10U/6.3V_6

C204
1U/6.3V_4

C206

47U/6.3V_8

+VCCGT+VCC_CORE +VCCGT

U1H

SKYLAKE_HALO

BG34
BG35
BG36
BH33
BH34
BH35
BH36
BH37
BH38

BJ37

BJ38
BL36
BL37
BM36
BM37
BN36
BN37
BN38
BP37
BP38
BR37
BT37
BE38
BF13
BF14
BF29
BF30
BF31
BF32
BF35
BF36
BF37
BF38
BG29
BG30
BG31
BG32
BG33
BC36
BC37
BC38
BD13
BD14
BD29
BD30
BD31
BD32
BD33
BD34
BD35
BD36
BE31
BE32
BE37

BGA1440

VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT

*SKL_H_BGA_BGA

8 OF 14

VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT

AV29
AV30
AV31
AV32
AV33
AV34
AV35
AV36
AW14
AW31
AW32
AW33
AW34
AW35
AW36
AW37
AW38
AY29
AY30
AY31
AY32
AY35
AY36
AY37
AY38
BA13
BA14
BA29
BA30
BA31
BA32
BA33
BA34
BA35
BA36
BB13
BB14
BB31
BB32
BB33
BB34
BB35
BB36
BB37
BB38
BC29
BC30
BC31
BC32
BC35
BE33
BE34
BE35
BE36

VCC_SENSE VSS_SENSE

R58 *4 9.9/F_4

A A

PROJECT : G38A

PROJECT : G38A

PROJECT : G38A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

SKL 6/7 (POWER&GND )

SKL 6/7 (POWER&GND )

NB5

NB5

5

4

3

2

NB5

SKL 6/7 (POWER&GND )

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

+VCC_CORE 45,46

756Tuesday, May 31 , 20 16

756Tuesday, May 31 , 20 16

756Tuesday, May 31 , 20 16

1A

1A

1A

5

4

3

2

1

SKL-HProcessor (GND)

C17
C13

BT32
BT26
BT24
BT21
BT18
BT14
BT12

BT9

BT5
BR36
BR34
BR29
BR26
BR24
BR21
BR18
BR14
BR12

BR7
BP34
BP33
BP29
BP26
BP24
BP21
BP18
BP14
BP12

BP7
BN34
BN31
BN30
BN29
BN24
BN21
BN20
BN19
BN18
BN14
BN12

BN9

BN7

BN4

BN2
BM38
BM35
BM28
BM27
BM26
BM23
BM21
BM13
BM12

BM9
BM6
BM2

BL29
BK29
BK15
BK14

BJ32

BJ31

BJ25

BJ22
BH14
BH12

BH9
BH8
BH5
BH4

BH1
BG38
BG13
BG12
BF33
BF12
BE29

BE6

BD9
BC34
BC12
BB12

C9

U1L

SKYLAKE_HALO

BGA1440

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

*SKL_H_BGA_BGA

12 OF 14

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS

C25
C23
C21
C19
C15
C11
C8
C5
BM29
BM25
BM18
BM11
BM8
BM7
BM5
BM3
BL38
BL35
BL13
BL6
BK25
BK22
BK13
BK6
BJ30
BJ29
BJ15
BJ12
BH11
BH10
BH7
BH6
BH3
BH2
BG37
BG14
BG6
BF34
BF6
BE30
BE5
BE4
BE3
BE2
BE1
BD38
BD37
BD12
BD11
BD10
BD8
BD7
BD6
BC33
BC14
BC13
BC6
BB30
BB29
BB6
BB5

C2
BT36
BT35
BT4
BT3
BR38

CFG[0] Stall reset sequence after PCU PLL

U1F

SKYLAKE_HALO

BGA1440

Y38

VSS

Y37

VSS

Y14

VSS

Y13

VSS

Y11

VSS

Y10

VSS

Y9

D D

C C

B B

W34
W33
W12

U38
U37

R29
R12

N34
N33
N12

N10

M14
M13
M12

Y8
Y7

W5
W4
W3
W2

W1
V30
V29
V12

V6

U6
T34
T33
T14
T13
T12
T11
T10

T9

T8

T7

T5

T4

T3

T2

T1
R30

P38
P37
P12

P6

N11

N9

N8

N7

N6

N5

N4

N3

N2

N1

M6
L34
L33
L30
L29
K38
K11
K10

K9
K8
K7
K5
K4
K3
K2

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

*SKL_H_BGA_BGA

6 OF 14

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

NCTFVSS

K1
J36
J33
J32
J25
J22
J18
J10
J7
J4
H35
H32
H25
H22
H18
H12
H11
G28
G26
G24
G23
G22
G20
G18
G16
G14
G12
G10
G9
G8
G6
G5
G4
F36
F31
F29
F27
F25
F23
F21
F19
F17
F15
F13
F11
F9
F8
F5
F4
F3
F2
E38
E35
E34
E9
E4
D33
D30
D28
D26
D24
D22
D20
D18
D16
D14
D12
D10
D9
D6
D3
C37
C31
C29
C27

D38

CFG[2] PCI Ex press Static Lane Rev ersal

A A

CFG[4]

CFG[6:5]

CFG[7]

5

4

U1M

SKYLAKE_HALO

BGA1440

BB4

VSS

BB3

VSS

BB2

VSS

BB1

VSS

BA38

VSS

BA37

VSS

BA12

VSS

BA11

VSS

BA10

VSS

BA9

VSS

BA8

VSS

BA7

VSS

BA6

VSS

B9

VSS

AY34

VSS

AY33

VSS

AY14

VSS

AY12

VSS

AW30

VSS

AW29

VSS

AW12

VSS

AW5

VSS

AW4

VSS

AW3

VSS

AW2

VSS

AW1

VSS

AV38

VSS

AV37

VSS

AU34

VSS

AU33

VSS

AU12

VSS

AU11

VSS

AU10

VSS

AU9

VSS

AU8

VSS

AU7

VSS

AU6

VSS

AT30

VSS

AT29

VSS

AT6

VSS

AR38

VSS

AR37

VSS

AR14

VSS

AR13

VSS

AR5

VSS

AR4

VSS

AR3

VSS

AR2

VSS

AR1

VSS

AP34

VSS

AP33

VSS

AP12

VSS

AP11

VSS

AP10

VSS

AP9

VSS

AP8

VSS

AN30

VSS

AN29

VSS

AN12

VSS

AN6

VSS

AN5

VSS

AM38

VSS

AM37

VSS

AM12

VSS

AM5

VSS

AM4

VSS

AM3

VSS

AM2

VSS

AM1

VSS

AL34

VSS

AL33

VSS

AL14

VSS

AL12

VSS

AL10

VSS

AL9

VSS

AL8

VSS

AL7

VSS

AL4

VSS

*SKL_H_BGA_BGA

Configuration Signals:

lock until de-asserted

eDP enable

PCI Express Bifurcation

PEG defer training

AK30

VSS

AK29

VSS

AK4

VSS

AJ38

VSS

AJ37

VSS

AJ6

VSS

AJ5

VSS

AJ4

VSS

AJ3

VSS

AJ2

VSS

AJ1

VSS

AH34

VSS

AH33

VSS

AH12

VSS

AH6

VSS

AG30

VSS

AG29

VSS

AG11

VSS

AG10

VSS

AG8

VSS

AG7

VSS

AG6

VSS

AF14

VSS

AF13

VSS

AF12

VSS

AF4

VSS

AF3

VSS

AF2

VSS

AF1

VSS

AE34

VSS

AE33

VSS

AE6

VSS

AD30

VSS

AD29

VSS

AD12

VSS

AD11

VSS

AD10

VSS

AD9

VSS

AD8

VSS

AD7

VSS

AD6

VSS

AC38

VSS

AC37

VSS

AC12

VSS

AC6

VSS

AC5

VSS

AC4

VSS

AC3

VSS

AC2

VSS

AC1

VSS

Quanta_Confidential

13 OF 14

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS

AB34
AB33
AB6
AA30
AA29
AA12
A30
A28
A26
A24
A22
A20
A18
A16
A14
A12
A10
A9
A6

B37
B3
A34
A4
A3

PCH_2_CPU_TRIG15

The CFG signals have a default value of '1' if not terminated on the board.

Note that some of the Intel reference designs board might connect CFG[0] to
HOOK[2]. Thi s route is not needed on a OxM board.

x1 = Normal operation

x0 = Lane numbers reversed

x1 = Disabled

x0 = Enabled

x00 = 1 x8 & 2 x4 PCI Express

x01 = reserved

x10 = 2 x8 PCI Express

x11 = 1 x16 PCI Express

x1 = PEG train follow RESETB de-asseted

x0 = PEG wait for BIOS fro training

3

SKL-H Processor (RESERVED, CFG)

U1K

2

D1

RSVD_TP

E1

RSVD_TP

E3

RSVD_TP

E2

RSVD_TP

BR1

RSVD_TP

BT2

RSVD_TP

BN35

RSVD

J24

RSVD

H24

RSVD

BN33

RSVD

BL34

RSVD

N29

RSVD

R14

RSVD

AE29

RSVD

AA14

RSVD

A36

RSVD

A37

RSVD

H23

PROC_TRIGIN

J23

PROC_TRIGOUT

F30

RSVD

E30

RSVD

B30

RSVD

C30

RSVD

G3

RSVD

J3

RSVD

BR35

RSVD

BR31

RSVD

BH30

RSVD

*SKL_H_BGA_BGA

R59 30_4

TP8
TP12
TP14
TP9

TP17
TP10

CPU_2_PCH_TRIG_R

CPU_2_PCH_TRIG_R CPU_2_PCH_TRIG

SKYLAKE_HALO

BGA1440

NB5

NB5

NB5

08

BM33

RSVD_TP

BL33

RSVD_TP

BJ14

RSVD_TP

BJ13

RSVD_TP

BK28

RSVD

BJ28

RSVD

BJ18

VSS

BJ16

RSVD_TP

BK16

RSVD_TP

BK24

RSVD_TP

BJ24

RSVD_TP

BK21

RSVD

BJ21

RSVD

BT17

RSVD

BR17

RSVD

BK18

VSS

BJ34

RSVD_TP

BJ33

RSVD_TP

G13

RSVD

AJ8

RSVD

BL31

RSVD

B2

NCTF

B38

NCTF

BP1

NCTF

BR2

NCTF

C1

NCTF

C38

11 OF 14

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

NCTF

CPU_2_PCH_TRIG 15

PROJECT : G38A

PROJECT : G38A

PROJECT : G38A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

SKL 7/7 (GND)

SKL 7/7 (GND)

SKL 7/7 (GND)

1

856Tuesday, May 31, 2016

856Tuesday, May 31, 2016

856Tuesday, May 31, 2016

TP11
TP13

TP15
TP16

TP18
TP19

TP20
TP21

TP22
TP23

1A

1A

1A

5

4

3

2

1

USB

SPT-H_PCH

6 OF 12

SPT-H_PCH

DMI

USB 2.0

PCIe/USB 3

GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#

GPP_F15/USB2_OCB_4
GPP_F16/USB2_OCB_5
GPP_F17/USB2_OCB_6
GPP_F18/USB2_OCB_7

2 OF 12

LPC/eSPI

SATA

GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3

GPP_A5/LFRAME#/ESPI_CS0#

GPP_A6/SERIRQ/ESPI_CS1#

GPP_A7/PIRQA#/ESPI_ALERT0#

GPP_A0/RCIN#/ESPI_ALERT1#

GPP_A14/SUS_STAT#/ESPI_RESET#

GPP_A9/CLKOUT_LPC0/ESPI_CLK

GPP_A10/CLKOUT_LPC1

AF5

USB2N_1

AG7

USB2P_1

AD5

USB2N_2

AD7

USB2P_2

AG8

USB2N_3

AG10

USB2P_3

AE1

USB2N_4

AE2

USB2P_4

AC2

USB2N_5

AC3

USB2P_5

AF2

USB2N_6

AF3

USB2P_6

AB3

USB2N_7

AB2

USB2P_7

AL8

USB2N_8

AL7

USB2P_8

AA1

USB2N_9

AA2

USB2P_9

AJ8

USB2N_10

AJ7

USB2P_10

W2

USB2N_11

W3

USB2P_11

AD3

USB2N_12

AD2

USB2P_12

V2

USB2N_13

V1

USB2P_13

AJ11

USB2N_14

AJ13

USB2P_14

USB2_COMP

USB2_VBUSSENSE

RSVD_AB13

USB2_ID

GPD7/RSVD

DIS only

AD43

DGPU_HOLD_RST#

AD42

GPU_EVENT#

AD39

DGPU_PWR_EN

AC44

DGPU_PWROK_Q

Y43

USB_OC4#

Y41

USB_OC5#

W44

USB_OC6#

W43

PCH_AOCS#

AG3

USB2_COMP

AD10
AB13
AG2

BD14

Quanta_Confidential

AT22
AV22
AT19
BD16

BE16
BA17
AW17
AT17
BC18

BC17
AV19

GPP_G19/SMI#
GPP_G18/NMI#

GPP_E6/DEVSLP2
GPP_E5/DEVSLP1
GPP_E4/DEVSLP0
GPP_F9/DEVSLP7
GPP_F8/DEVSLP6
GPP_F7/DEVSLP5
GPP_F6/DEVSLP4
GPP_F5/DEVSLP3

M45
N43

AE45
AG43
AG42
AB39
AB36
AB43
AB42
AB41

R80 113/F_4

R405
*1K_4

SERIRQ
BOARD_ID8

BOARD_ID7

CLK_PCI_EC_R
CLK_PCI_LPC_R

GC6FBEN_Q
DEVSLP0

USBP1- 33
USBP1+ 33
USBP2- 33
USBP2+ 33
USBP3- 33
USBP3+ 33
USBP4- 28

USBP4+ 28
USBP5- 36
USBP5+ 36

USBP7- 35

USBP7+ 35

USB2.0 C ombo USB3.0 M B-1

USB2.0 C ombo USB3.0 S mall B oard

USB2.0 C ombo USB2.0 M B-2

CAMERA

IR CAM

WLAN

GFX Present

DGPU_HOLD_RST# 12,19
GPU_EVENT# 12,21
DGPU_PWR_EN 12,22,3 9

DGPU_PWROK_Q 12,21,39

If OTG is not implemented on the platform,

R406
*1K_4

then USB2_ID and USB2_VBUSSENSE should both
be connected to ground.

LAD0 35,36,39
LAD1 35,36,39
LAD2 35,36,39
LAD3 35,36,39

LFRAME# 35,36,39

BOARD_ID8 13
EC_RCIN# 39
BOARD_ID7 13

SIO_EXT_SMI# 39

GC6FBEN_Q 21
DEVSLP0 35

SERIRQ 36,39

R81 8.2K_4

R82 22/F_4
R83 22/F_4

R84 *22/F_4

Ra

+3V

EC1 18P/50V_ 4

EC2 18P/50V_ 4

Rc

EC3
*18P/50V_4

CLK_24M_KBC 39
CLK_24M_DEBUG 35

EMI(near PCH)

CLK_PCI_TPM 36

EMI(near PCH)

BOM: HW TPM need Ra, Rc Stuff

DGPU_HOLD_RST#
DGPU_PWR_EN
DGPU_PWROK_Q
SIO_EXT_SMI#
EC_RCIN#
GC6FBEN_Q

USB_OC4#
USB_OC5#
USB_OC6#
PCH_AOCS#

R78 *100K_4

GPU_EVENT#

BOM:UMA only

SG(Default)

Stuff

NC

Ra

Rb

Place to PCH

R68 *10K_4
R69 10K_4
R70 10K_4
R71 10K_4
R72 10K_4
R12101 10K_4

R74 10K_4
R75 10K_4
R76 10K_4
R77 10K_4

RaRb

R79 10K_4

BOM:DIS only

UMA

Rb

Ra

USB 2.0 PORT

PORT1

PORT2

PORT3

PORT4

PORT5

PORT6

PORT7

PORT8

PORT9-14

USB 3.0 PORT

PORT1

PORT2

PORT3

PORT4

+3V_DEEP_SUS10,12,13,14,16,18

09

+3V

+3V_DEEP_SUS

+3V

USB2 MB- 1

USB2 DB

USB2 MB- 2

CAMERA

IR CAM (OPTION)

NC

WLAN

NC

NC

USB3 MB- 1

USB3 DB

USB3 MB- 2

3D CAMERA

U2B

DMI_TXN03

DMI_TXP03

DMI_RXN03

DMI_RXP03
DMI_TXN13

DMI_TXP13

DMI_RXN13

DMI_RXP13
DMI_TXN23

C207 0.1U/16V_4
C208 0.1U/16V_4

C209 0.1U/16V_4
C210 0.1U/16V_4

C211 0.1U/16V_4
C212 0.1U/16V_4

USB30_TX1-33
USB30_TX1+33
USB30_RX1-33
USB30_RX1+33

USB30_TX2-33
USB30_TX2+33
USB30_RX2-33
USB30_RX2+33

USB30_TX3+33
USB30_TX3-33
USB30_RX3+33
USB30_RX3-33

USB30_TX4+34
USB30_TX4-34
USB30_RX4+34
USB30_RX4-34

DMI_TXP23

DMI_RXN23

DMI_RXP23
DMI_TXN33

DMI_TXP33

DMI_RXN33

DMI_RXP33

R73 100/F_4

TP30

PCIECOMP_N
PCIECOMP_P

PCIE_TXN5_CARD_C
PCIE_TXP5_CARD_C

PCIE_TXN6_WLAN_ C
PCIE_TXP6_WLAN_ C

PCIE_TXN7_LAN_C
PCIE_TXP7_LAN_C

TP28

D D

PCIE_RXN5_CARD38

CardReader

C C

WLAN

LAN

PCIE_RXP5_CARD38
PCIE_TXN5_CARD38
PCIE_TXP5_CARD38
PCIE_RXN6_WLAN35
PCIE_RXP6_WLAN35
PCIE_TXN6_WLAN35
PCIE_TXP6_WLAN35
PCIE_RXN7_LAN37
PCIE_RXP7_LAN37
PCIE_TXN7_LAN37
PCIE_TXP7_LAN37

USB3.0 (M/B-1)

B B

USB3.0 (Small Board)

USB3.0 (M/B-2)

USB3.0 (3D Camera)

L27

DMI_RXN0

N27

DMI_RXP0

C27

DMI_TXN0

B27

DMI_TXP0

E24

DMI_RXN1

G24

DMI_RXP1

B28

DMI_TXN1

A28

DMI_TXP1

G27

DMI_RXN2

E26

DMI_RXP2

B29

DMI_TXN2

C29

DMI_TXP2

L29

DMI_RXN3

K29

DMI_RXP3

B30

DMI_TXN3

A30

DMI_TXP3

B18

PCIE_RCOMPN

C17

PCIE_RCOMPP

H15

PCIE1_RXN/USB3_7_RXN

G15

PCIE1_RXP/USB3_7_RXP

A16

PCIE1_TXN/USB3_7_TXN

B16

PCIE1_TXP/USB3_7_TXP

B19

PCIE2_TXN/USB3_8_TXN

C19

PCIE2_TXP/USB3_8_TXP

E17

PCIE2_RXN/USB3_8_RXN

G17

PCIE2_RXP/USB3_8_RXP

L17

PCIE3_RXN/USB3_9_RXN

K17

PCIE3_RXP/USB3_9_RXP

B20

PCIE3_TXN/USB3_9_TXN

C20

PCIE3_TXP/USB3_9_TXP

E20

PCIE4_RXN/USB3_10_RXN

G19

PCIE4_RXP/USB3_10_RXP

B21

PCIE4_TXN/USB3_10_TXN

A21

PCIE4_TXP/USB3_10_TXP

K19

PCIE5_RXN

L19

PCIE5_RXP

D22

PCIE5_TXN

C22

PCIE5_TXP

G22

PCIE6_RXN

E22

PCIE6_RXP

B22

PCIE6_TXN

A23

PCIE6_TXP

L22

PCIE7_RXN

K22

PCIE7_RXP

C23

PCIE7_TXN

B23

PCIE7_TXP

K24

PCIE8_RXN

L24

PCIE8_RXP

C24

PCIE8_TXN

B24

PCIE8_TXP

SPT_PCH_H

U2F

C11

USB3_1_TXN

B11

USB3_1_TXP

B7

USB3_1_RXN

A7

USB3_1_RXP

B12

USB3_2_TXN/SSIC_1_TXN

A12

USB3_2_TXP/SSIC_1_TXP

C8

USB3_2_RXN/SSIC_1_RXN

B8

USB3_2_RXP/SSIC_1_RXP

B15

USB3_6_TXN

C15

USB3_6_TXP

K15

USB3_6_RXN

K13

USB3_6_RXP

B14

USB3_5_TXN

C14

USB3_5_TXP

G13

USB3_5_RXN

H13

USB3_5_RXP

D13

USB3_3_TXP/SSIC_2_TXP

C13

USB3_3_TXN/SSIC_2_TXN

A9

USB3_3_RXP/SSIC_2_RXP

B10

USB3_3_RXN/SSIC_2_RXN

B13

USB3_4_TXP

A14

USB3_4_TXN

G11

USB3_4_RXP

E11

USB3_4_RXN

SPT_PCH_H

A A

PROJECT : G38A

PROJECT : G38A

PROJECT : G38A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev

Custom

Custom

Custom

NB5

NB5

NB5

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

PCH 1/7 (DMI/USB/PCIE)

PCH 1/7 (DMI/USB/PCIE)

PCH 1/7 (DMI/USB/PCIE)

1

956Tuesday, May 31, 20 16

956Tuesday, May 31, 20 16

956Tuesday, May 31, 20 16

1A

1A

1A

HDA Bus(CLG)

5

4

3

2

1

+1.2VSUS

R109
51_4

R116
*100/F_4

10

R90
470/F_4

+3V

JTAG_TMS_PCH
JTAG_TDI_PCH
JTAG_TDO_PCH
JTAG_TCK_PCH

R117
*51_4

DSWROK_EC_R

10 56Tuesday, May 31, 2016

10 56Tuesday, May 31, 2016

10 56Tuesday, May 31, 2016

1A

1A

1A

U2D

BA9

HDA_BCLK

BD8

HDA_RST#

BE7

HDA_SDI0

BC8

HDA_SDI1

BB7

HDA_SDO

BD9

HDA_SYNC

BD1

RSVD_BD1

BE2

RSVD_BE2

AM1

DISPA_SDO

AN2

DISPA_SDI

AM2

DISPA_BCLK

AL42

GPP_D8/I2S0_ SCLK

AN42

GPP_D7/I2S0_ RXD

AM43

GPP_D6/I2S0_ TXD

AJ33

GPP_D5/I2S0_ SFRM

AH44

GPP_D20/DM IC_DATA0

AJ35

GPP_D19/DM IC_CLK0

AJ38

GPP_D18/DM IC_DATA1

AJ42

GPP_D17/DM IC_CLK1

BC10

RTCRST#

BB10

SRTCRST#

AW11

PCH_PWROK

BA11

RSMRST#

AV11

DSW_PWROK

BB41

GPP_C2/SMB ALERT#

AW44

GPP_C0/SMB CLK

BB43

GPP_C1/SMB DATA

BA40

GPP_C5/SML 0ALERT#

AY44

GPP_C3/SML 0CLK

BB39

GPP_C4/SML 0DATA

AT27

GPP_B23/SM L1ALERT#/PCHH OT#

AW42

GPP_C6/SML 1CLK

AW45

GPP_C7/SML 1DATA

SPT_PCH_H

RTC_RST# 16

EC_RTC_RST 39

R12167 10K_4

EC_SRTC_RST 39

R12168 *10K_4

AUDIO

Quanta_Confidential

System PWR_OK(CLG)

R336
*0_4

Reserve for EMI

AUD_AZACPU_SDO_R3
AUD_AZACPU_SDI3
AUD_AZACPU_SCLK3

+3V

5

2

6

+3V

5

2

6

30mils

R131

20K/F_4

R135
20K/F_4

R139 *0_6

ACZ_BCLK

C213
*10P/50V_4

Reserve for EMI
_0304

DRAMRST_CNTRL_PCH12

SMB_ME1_CLK

SMB_ME1_DAT

SMB_PCH_DAT

SMB_PCH_CLK

1 2

C217
1U/6.3V_4

C220
1U/6.3V_4

ACZ_SDIN031

R91 30_4

R93 30_4

+3V_DEEP_SUS

C9129

*22P/50V_4

ACZ_SDOUT

EC_PWROK39

RSMRST#39 AC_PRESENT_EC 39

SML0ALERT#12

SML1ALERT#_R12

TP35

CPU heat pipe local thermal sensor
GPU thermal sensor
EC

Touch Pad
XDP
DDR4

J1

*SOLDERJUMPER -2

RTC_RST#

SRTC_RST#

SRTC_RST#RTC_RST#

4

ACZ_RST#

ACZ_SDOUT
ACZ_SYNC

AUD_AZACPU_SDO
AUD_AZACPU_SDI
AUD_AZACPU_SCLK_R

R102
*4.7K_4

RTC_RST#
SRTC_RST#

RSMRST#

DSWROK_EC_R
SML0ALERT#
SMB_PCH_CLK
SMB_PCH_DAT
DRAMRST_CNTRL_PCH
SMB_ME0_CLK
SMB_ME0_DAT

SML1ALERT#_R
SMB_ME1_CLK
SMB_ME1_DAT

0309 modify RTC_RST# to clear COMS / ME

3

1

3

1

RTC_RST#

2

Q7742

2N7002K

SRTC_RST#

2

Q7743

*2N7002K

ACZ_BCLK
ACZ_RST#
ACZ_SDOUT
ACZ_SYNC

R87
*1M_4

SMB_ME0_CLK
SMB_ME0_DAT
SMB_ME1_CLK
SMB_ME1_DAT
SMB_PCH_CLK
SMB_PCH_DAT
RF_OFF_PCH
SUSWARN#
SUSACK#

ACZ_SDOUT

RSMRST#
EC_PWROK

BIT_CLK_AUDIO

R85 33_4
R86 33_4
R88 33_4
R89 33_4

R92 2.2K_4
R94 2.2K_4
R95 2.2K_4
R96 2.2K_4
R97 2.2K_4
R98 2.2K_4
R101 10K_4
R103 *10K_4
R104 *10K_4

R110 1K_4

C215 *220P/50V_4
C216 *220P/50V_4

C214 *33P/50V_4

BIT_CLK_AUDIO31

ACZ_RST#_AUDIO31

ACZ_SDOUT_AUDIO31

ACZ_SYNC_AUDIO31

D D

+3V_DEEP_SUS

GPIO33_EC39

C C

EMI

Q1

D1

R337
0_4

1U/6.3V_4

4 3

1

*2N7002DW

Q4

4 3

1

2N7002KDW

+BAT_RTC+3V_RTC_2

RaRb

+3V_RTC_D

C219

MBCLK25,39

MBDATA25,39

R122 4.7K_4

+3V

SMB_RUN_DAT17,18,40

R123 4.7K_4

B B

+3V

SMB_RUN_CLK17,18,40

RTC Circuitry(RTC)

Main BAT -->Ra
Coin BAT -->Rb (default)

+3V_RTC_0

+3V_RTC_0

12

A A

0309 change the socket

RTC Power trace width 20mils.

R138
1K_4

CN2
BAT_CONN

DFHS02FS027

BAT-23_2-4_2

+3VPCU

5

+3V_RTC_1

BAT54CW-7-F

SPT-H_PCH

GPP_A12/BM BUSY#/ISH_GP6/SX_EX IT_HOLDOFF#

GPP_A13/SU SWARN#/SUSP WRDNACK

SMBUS

JTAG

4 OF 12

R118 *0_4/S

GPP_A8/CLK RUN#

GPD11/LANP HYPC

GPD9/SLP_W LAN#

GPP_B2/VRA LERT#

GPP_G17/ADR _COMPLETE

GPP_B12/SLP _S0#

GPP_A15/SU SACK#

GPD2/LAN_W AKE#

GPD1/ACPR ESENT

EC_PWROKSYS_PWROK

For HWPG Sequence

+5VS5

+1.0V

R130
15K/F_4

+1.0V_PWRGD_G1

C218

0.1U/16V_4

3

R137
100K_4

2

1 3

+1.0V_PWRGD_G2

Q7
METR3904-G

DRAM_RESET#

GPP_B1
GPP_B0

GPP_B11

SYS_PWROK

WAKE#

GPD6/SLP_A #

SLP_LAN#

GPD4/SLP_S 3#
GPD5/SLP_S 4#

GPD10/SLP_S 5#

GPD8/SUSC LK

GPD0/BATLOW #

SLP_SUS#

GPD3/PWR BTN#

SYS_RESET#

GPP_B14/SPK R

PROCPWRGD

ITP_PMODE

JTAG_TMS
JTAG_TDO

JTAG_TDI

JTAG_TCK

R120
10K/F_4

R128
100K_4

JTAGX

2N7002K

2

Q5

BB17
AW22

AR15

AV13

BC14
BD23
AL27
AR27
N44
AN24
AY1

BC13
BC15
AV15
BC26
AW15
BD15
BA13

AN15
BD13
BB19
BD19

BD11
BB15
BB13
AT13
AW1
BD26
AM3

AT2
AR3
AR2
AP1
AP2
AN3

+3VS5

3

1

CLKRUN#

LAN_DISABLE

DDR4_DRAMRST#
GPP_B2

SYS_PWROK

PCIE_WAKE#

PCH_SLP_S0_N

RF_OFF_PCH
SUSACK#
SUSWARN#

LAN_WAKE#
AC_PRESENT_EC
SLP_SUS#_EC
DNBSWON#
SYS_RESET#
ACZ_SPKR
PROCPWRGD

ITP_PMODE
JTAGX_PCH
JTAG_TMS_PCH
JTAG_TDO_PCH
JTAG_TDI_PCH
JTAG_TCK_PCH

R126
*10K_4

+3V_DEEP_SUS9,12,13,14,16,18

HWPG

R133
100K_4

ACZ_SDOUT

2

TP31

TP32

TP33

TP8522

R105 0_4
R106 0_4

R107 *0_4

R113 1K_4

HWPG 2,39,43,44,49,50

SUSWARN#

+1.0V_DEEP_SUS

TP8552

ACZ_SDOUT 12

CLKRUN# 39

DDR4_DRAMRST# 17,18

DDR4_DRAMRST#

PCIE_WAKE# 35,37,38
SLP_A# 16

PCH_SLP_S0_N 16
SUSB# 16,39
SUSC# 16,39
SLP_S5# 16

RF_OFF_PCH 35
SUSACK#_EC 39
SUSWARN#_EC 39

SLP_SUS#_EC 39
DNBSWON# 39
SYS_RESET# 16
ACZ_SPKR 12,31
PROCPWRGD 2

SYS_RESET#

GPP_B2

+1.0V

R111
*210/F_4

R115
*100/F_4

For DS3 Sequence

For DS3 -->Ra
Non-DS3 -->Rb

RSMRST#

R119 *0_4

DSWROK_EC39

+3VS5

+3V

RSMRST#

DSWROK_EC

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

NB5

NB5

NB5

Date: Sheet of

Date: Sheet of

Date: Sheet of

R121 0_4

Add LAN_WAKE#(check)

R124 *10K_4
R125 1K_4
R127 *10K_4

R129 8.2K/F_4

PROJECT : G38A

PROJECT : G38A

PROJECT : G38A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PCH 2/7 (HDA/SMBUS)

PCH 2/7 (HDA/SMBUS)

PCH 2/7 (HDA/SMBUS)

R99 10K_4

R100 10K_4

R108
*210/F_4

R114
*100/F_4

Rb

Ra

LAN_WAKE#
PCIE_WAKE#
AC_PRESENT_EC

CLKRUN#

R132 10K_4

R134 100K_4

1

5

HSIO MUX PORT

PCIE1-4 NC

PCIE5

D D

PCIE6

PCIE7

PCIE8

PCIE9

PCIE10

PCIE11

Cardreader

Wlan

Lan

NC

SSD PCIE * 4

SSD PCIE x4 LANE

PCIE_SATA_TXP1135
PCIE_SATA_TXN1135
PCIE_SATA_RXP1135
PCIE_SATA_RXN1135

PCIE12

PCIE13

PCIE14

PCIE15

PCIE16

PCIE17

PCIE18-20

C C

The 24 MHz (50 Ohm ESR) XTAL used for Skylake-H
needs to be replaced by 38.4 MHz (30 Ohm ESR) XTAL for Cannonlake-H.

B B

Crystal Components with Surrounding 10 mil Wide GND Shield Trace
Break Out:4-10 mil Wide GND Shield Trace

NC

HDD

NC

NC

NC

NC

TP41

C221 27P/50V_4

24MHZ +-20PPM

C222 27P/50V_4

TP42

SATA_TXN1B34

SATA_TXP1B34
SATA_RXN1B34
SATA_RXP1B34

HDD1 (SATA2 6Gb/s)

PCIE_SATA_TXP1235

SSD PCIE x4 LANE

1

2

R144

1M_4

Y1

4

3

XTAL24_IN

XTAL24_OUT

+1.0V_DEEP_SUS

PCIE_SATA_TXN1235
PCIE_SATA_RXP1235
PCIE_SATA_RXN1235

GPP_A1633

CLK_DPLL_NSCCLKP2
CLK_DPLL_NSCCLKN2 CPU_PCI_BCLKN 2

CLK_CPU_BCLKP2

R146

CLK_CPU_BCLKN2

2.7K/F_4

PCIE_CLKREQ_CR#38
PCIE_CLKREQ_WLAN#35
PCIE_CLKREQ_LAN#37 CLK_VGA_N 19

PCIE_CLKREQ_SSD#35

RTC Clock 32.768KHz

C223 15P/50V_4

Y2

32.768KHZ

C224 15P/50V_4

A A

RTC_X1

R162
10M_4

2 1

RTC_X2

TP43

TP8502

TP39

TP40

TP8504

TP8505

TP8506

TP8507

4

GPP_A16

XTAL24_OUT
XTAL24_IN

XCLK_RBIAS

RTC_X1
RTC_X2

PCIE_CLKREQ0#
PCIE_CLKREQ_CR#
PCIE_CLKREQ_WLAN#
PCIE_CLKREQ_LAN#
PCIE_CLKREQ_VGA#
PCIE_CLKREQ_SSD#
PCIE_CLKREQ_TBT#_L
PCIE_CLKREQ7#
PCIE_CLKREQ8#
PCIE_CLKREQ9#
PCIE_CLKREQ10#
PCIE_CLKREQ11#
PCIE_CLKREQ12#
PCIE_CLKREQ13#
PCIE_CLKREQ14#
PCIE_CLKREQ15#

U2C

AV2

CL_CLK

AV3

CL_DATA

AW2

CL_RST#

R44

GPP_G8/FAN_PW M_0

R43

GPP_G9/FAN_PW M_1

U39

GPP_G10/FAN_PW M_2

N42

GPP_G11/FAN_PW M_3

U43

GPP_G0/FAN_TACH_0

U42

GPP_G1/FAN_TACH_1

U41

GPP_G2/FAN_TACH_2

M44

GPP_G3/FAN_TACH_3

U36

GPP_G4/FAN_TACH_4

P44

GPP_G5/FAN_TACH_5

T45

GPP_G6/FAN_TACH_6

T44

GPP_G7/FAN_TACH_7

B33

PCIE11_TXP

C33

PCIE11_TXN

K31

PCIE11_RXP

L31

PCIE11_RXN

AB33

GPP_F10/SCLOCK

AB35

GPP_F11/SLOAD

AA44

GPP_F13/SDATAOUT0

AA45

GPP_F12/SDATAOUT1

B38

PCIE14_TXN/SATA1B_TXN

C38

PCIE14_TXP/SATA1B_TXP

D39

PCIE14_RXN/SATA1B_RXN

E37

PCIE14_RXP/SATA1B_RXP

C36

PCIE13_TXN/SATA0B_TXN

B36

PCIE13_TXP/SATA0B_TXP

G35

PCIE13_RXN/SATA0B_RXN

E35

PCIE13_RXP/SATA0B_RXP

A35

PCIE12_TXP

B35

PCIE12_TXN

H33

PCIE12_RXP

G33

PCIE12_RXN

J45

PCIE20_TXP/SATA7_TXP

K44

PCIE20_TXN/SATA7_TXN

N38

PCIE20_RXP/SATA7_RXP

N39

PCIE20_RXN/SATA7_RXN

H44

PCIE19_TXP/SATA6_TXP

H43

PCIE19_TXN/SATA6_TXN

L39

PCIE19_RXP/SATA6_RXP

L37

PCIE19_RXN/SATA6_RXN

SPT_PCH_H

U2G

AR17

GPP_A16/CLKOUT_48

G1

CLKOUT_CPUNSSC_P

F1

CLKOUT_CPUNSSC

G2

CLKOUT_CPUBCLK_P

H2

CLKOUT_CPUBCLK

A5

XTAL24_OUT

A6

XTAL24_IN

E1

XCLK_BIASREF

BC9

RTCX1

BD10

RTCX2

BC24

GPP_B5/SRCCLKREQ0#

AW24

GPP_B6/SRCCLKREQ1#

AT24

GPP_B7/SRCCLKREQ2#

BD25

GPP_B8/SRCCLKREQ3#

BB24

GPP_B9/SRCCLKREQ4#

BE25

GPP_B10/SRCCLKREQ5#

AT33

GPP_H0/SRCCLKREQ6#

AR31

GPP_H1/SRCCLKREQ7#

BD32

GPP_H2/SRCCLKREQ8#

BC32

GPP_H3/SRCCLKREQ9#

BB31

GPP_H4/SRCCLKREQ10#

BC33

GPP_H5/SRCCLKREQ11#

BA33

GPP_H6/SRCCLKREQ12#

AW33

GPP_H7/SRCCLKREQ13#

BB33

GPP_H8/SRCCLKREQ14#

BD33

GPP_H9/SRCCLKREQ15#

R13

CLKOUT_PCIE_N15

R11

CLKOUT_PCIE_P1 5

P1

CLKOUT_PCIE_N14

R2

CLKOUT_PCIE_P1 4

W7

CLKOUT_PCIE_N13

Y5

CLKOUT_PCIE_P1 3

U2

CLKOUT_PCIE_N12

U3

CLKOUT_PCIE_P1 2

SPT_PCH_H

SPT-H_PCH

CLINK

FAN

PCIe/SATA

HOST

3 OF 12

Quanta_Confidential

SPT-H_PCH

CLKOUT_CPUPCIBCLK

CLKOUT_CPUPCIBCLK _P

7 OF 12

3

PCIE9_RXN/SATA0A_RXN
PCIE9_RXP/SATA0A_RXP

PCIE9_TXN/SATA0A_TXN
PCIE9_TXP/SATA0A_TXP

PCIE10_RXN/SATA1A_RXN
PCIE10_RXP/SATA1A_RXP

PCIE10_TXN/SATA1A_TXN
PCIE10_TXP/SATA1A_TXP

PCIE15_RXN/SATA2_RXN

PCIE15_RXP/SATA2_RXP
PCIE15_TXN/SATA2_TXN

PCIE15_TXP/SATA2_TXP

PCIE16_RXN/SATA3_RXN

PCIE16_RXP/SATA3_RXP
PCIE16_TXN/SATA3_TXN

PCIE16_TXP/SATA3_TXP

PCIE17_RXN/SATA4_RXN

PCIE17_RXP/SATA4_RXP
PCIE17_TXN/SATA4_TXN

PCIE17_TXP/SATA4_TXP

PCIE18_RXN/SATA5_RXN

PCIE18_RXP/SATA5_RXP
PCIE18_TXN/SATA5_TXN

PCIE18_TXP/SATA5_TXP

GPP_E8/SATALED#

GPP_E0/SATAXPCI E0/SATAGP0
GPP_E1/SATAXPCI E1/SATAGP1
GPP_E2/SATAXPCI E2/SATAGP2
GPP_F0/SATAXPCI E3/SATAGP3
GPP_F1/SATAXPCI E4/SATAGP4
GPP_F2/SATAXPCI E5/SATAGP5
GPP_F3/SATAXPCI E6/SATAGP6
GPP_F4/SATAXPCI E7/SATAGP7

GPP_F21/EDP_BKLTCTL

GPP_F20/EDP_BKLTEN

GPP_F19/EDP_VDDEN

THERMTRIP#

PECI

PM_SYNC

PLTRST_PROC#

PM_DOWN

CLKOUT_ITPXDP

CLKOUT_ITPXDP _P

CLKOUT_PCIE_N0
CLKOUT_PCIE_P0

CLKOUT_PCIE_N1
CLKOUT_PCIE_P1

CLKOUT_PCIE_N2
CLKOUT_PCIE_P2

CLKOUT_PCIE_N3
CLKOUT_PCIE_P3

CLKOUT_PCIE_N4
CLKOUT_PCIE_P4

CLKOUT_PCIE_N5
CLKOUT_PCIE_P5

CLKOUT_PCIE_N6
CLKOUT_PCIE_P6

CLKOUT_PCIE_N7
CLKOUT_PCIE_P7

CLKOUT_PCIE_N8
CLKOUT_PCIE_P8

CLKOUT_PCIE_N9
CLKOUT_PCIE_P9

CLKOUT_PCIE_N10

CLKOUT_PCIE_P1 0

CLKOUT_PCIE_N11

CLKOUT_PCIE_P1 1

L1
L2
J1
J2

N7
N8

L7
L5

D3
F2

E5
G4

D5
E6

D8
D7

R8
R7

U5
U7

W10
W11

N3
N2

P3
P2

R3
R4

G31
H31
C31
B31

G29
E29
C32
B32

F41
E41
B39
A39

D43
E42
A41
A40

H42
H40
E45
F45

K37
G37
G45
G44

AD44

AG36
AG35
AG39
AD35
AD31
AD38
AC43
AB44

W36
W35
W42

AJ3
AL3
AJ4
AK2
AH2

CK_XDP_N_R
CK_XDP_P_R

TP8525

ODD (SATA1B 3.0Gb/s)
(Remove 0119)

TP36

R140 10K_4

TP38

GPIO35:
SSD SATA IF => High
SSD PCIE IF => Low

PM_THRMTRIP#
EC_PECI_PCH
PM_SYNC_R
CPU_PLTRST#
H_PM_DOWN

R141 30_4
R142 *0_4/S

TP8550
TP8551

CPU_PCI_BCLKP 2

TP8514

CLK_PCIE_CRN 38

CLK_PCIE_CRP 38

CLK_PCIE_WLANN 35
CLK_PCIE_WLANP 35

CLK_PCIE_LANN 37
CLK_PCIE_LANP 37

CLK_VGA_P 19PCIE_CLKREQ_VGA#19

CLK_PCIE_SSDN 35
CLK_PCIE_SSDP 35

TP8509

TP8510

TP8511

TP8512

TP8513

TP37

+3V

Card Reader

WLAN

LAN

VGA

SSD

2

PCIE_SATA_RXN9 35
PCIE_SATA_RXP9 35
PCIE_SATA_TXN9 35
PCIE_SATA_TXP9 35

PCIE_SATA_RXN10 35
PCIE_SATA_RXP10 35
PCIE_SATA_TXN10 35
PCIE_SATA_TXP10 35

SATA_LED# 34

GPIO35 35

For SSD Det (SATA0A)

PCH_DPST_PWM 28
PCH_LVDS_BLON 28
PCH_DISP_ON 28

PM_THRMTRIP# 2,5,39

PM_SYNC 2
CPU_PLTRST#R 2
H_PM_DOWN 2

SSD PCIE x4 (SATA0A) LANE

SSD PCIE x4 LANE

R2 13/F_4

Ra

R143
*10K_4

H_PECI (50ohm)
Trace Length: <0.5 iches

Ra,Ca need placement c lose to PCH.

PCIE_CLKREQ_WLAN#

PCIE_CLKREQ_LAN#

PCIE_CLKREQ_CR#

BOM:DIS only

BOM:SSD only

PCIE_CLKREQ_VGA#

PCIE_CLKREQ0#

PCIE_CLKREQ_SSD#

PCIE_CLKREQ_TBT#_L

PCIE_CLKREQ7#

PCIE_CLKREQ8#

PCIE_CLKREQ9#

PCIE_CLKREQ10#

PCIE_CLKREQ11#

PCIE_CLKREQ12#

PCIE_CLKREQ13#

PCIE_CLKREQ14#

PCIE_CLKREQ15#

GPIO35

BOM:SSD only

C2
*47P/50V_4

Ca

R148 10K_4

R149 10K_4

R151 10K_4

R152 10K_4

R153 *10K_4

R154 10K_4

R155 *10K_4

R156 *10K_4

R157 *10K_4

R158 *10K_4

R159 *10K_4

R160 *10K_4

R161 *10K_4

R163 *10K_4

R164 *10K_4

R165 *10K_4

1

11

+3V

R8510 10K_4

EC_PECI 2,39

+3V

PROJECT : G38A

PROJECT : G38A

PROJECT : G38A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

PCH 3/7 (SATA/LPC/CLK)

PCH 3/7 (SATA/LPC/CLK)

NB5

NB5

5

4

3

2

NB5

PCH 3/7 (SATA/LPC/CLK)

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

11 56Tuesday, May 31, 2016

11 56Tuesday, May 31, 2016

11 56Tuesday, May 31, 2016

1A

1A

1A

5

U2A

TP44

D D

PCI_PME#

PCH_SPI1_SI
PCH_SPI1_SO
PCH_SPI_CS0#
PCH_SPI1_CLK

PCH_SPI_IO2
PCH_SPI_IO3

GPP_D130

BD17

AG15
AG14

AF17

AE17

AR19
AN17

BB29
BE30
BD31
BC31

AW31

BC29
BD30

AT31

AN36

AL39
AN41
AN38
AH43
AG44

GPP_A11/PME#

RSVD
RSVD
RSVD
RSVD

TP2
TP1

SPI0_MOSI
SPI0_MISO
SPI0_CS0#
SPI0_CLK
SPI0_CS1#

SPI0_IO2
SPI0_IO3
SPI0_CS2#

GPP_D1/SPI1_CLK
GPP_D0/SPI1_CS#
GPP_D3/SPI1_MOSI
GPP_D2/SPI1_MISO
GPP_D22/SPI1_IO3
GPP_D21/SPI1_IO2

SPT_PCH_H

SPT-H_PCH

1 OF 12

GPP_B13/PLTRST#

GPP_G16/GSXCLK

GPP_G12/GSXDOUT

GPP_G13/GSXSLOAD

GPP_G14/GSXDIN

GPP_G15/GSXSRESET#

GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3

GPP_H18/SML4ALERT#

GPP_H17/SML4DATA

GPP_H16/SML4CLK

GPP_H15/SML3ALERT#

GPP_H14/SML3DATA

GPP_H13/SML3CLK

GPP_H12/SML2ALERT#

GPP_H11/SML2DATA

GPP_H10/SML2CLK

INTRUDER #

PCH SPI ROM(CLG)

TP47
TP48
TP49
TP50
TP51
TP52

C C

Place to TOP

PCH_SPI_CS0#
PCH_SPI1_CLK

C227 1U/6.3V_4

PCH_SPI_IO2

B B

HIGH:TOP SWAP ENABLED (CRB)

LOW: Disable "No Reboot" mode. (Default)

A A

BBS_BIT113 DRAMRST_CNTRL_PCH10

PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_R

PCH_SPI1_SO_R

BIOS_WP#
HOLD#

PCH_SPI_CS0#_R39
PCH_SPI1_CLK_R39
PCH_SPI1_SI_R39
PCH_SPI1_SO_R39

R201 15/F_4
R202 15/F_4
R203 15/F_4
R205 15/F_4

+3VSPI

R211 1K_4

R212 15/F_4

Vender P/N

EON

Winbond

GigaDevice

Socket

Size

AKE3EZN0Q01 (EN25QH64-104HIP )8MB

AKE3EFP0N07 (W25Q64FVSSIQ)

8MB

8MB

AKE2EZN0Q00 (GD25B64CSIGR)

DFHS08FS023

+3V +3V_DEEP_SUS

5

PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_R
PCH_SPI1_SO_R

PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_RPCH_SPI1_SI
PCH_SPI1_SO_RPCH_SPI1_SO

C225
22P/50V_4

BIOS_WP#

R191

4.7K_4

R195
*20K/F_4

+3VS5

+3V_DEEP_SUS

U5

1

CE#

6

SCK

5

SI

2

SO

3

WP#

EN25QH64-104HIP

AKE3EFP0N07

VDD

HOLD#

VSS

8

+3VSPI

7

HOLD#

4

ESPI/LPC SELECT STRAPNO REBOOT IF SAMPLED HIGH

HIGH:eSPI Is selected for EC.

LOW: LPC Is selected for EC. (Default)

DRAMRST_CNTRL_PCHBBS_BIT1

4

BB27

P43
R39
R36
R42
R41

AF41
AE44
BC23
BD24

BC36
BE34
BD39
BB36
BA35
BC35
BD35
AW35
BD34

BE11

R197 *0_4

R200 *0_4/S

R204 1K_4
R206 15/F_4

PCH_SPI_IO3

4

PLTRST#

BOM:3D CAM only

3D_FW_GPIO_R

SML4ALERT#
SMB_ME4_DAT
SMB_ME4_CLK
SML3ALERT#
SMB_ME3_DAT
SMB_ME3_CLK
SML2ALERT#
SMB_ME2_DAT
SMB_ME2_CLK

SM_INTRUDER#

R173 0_4

TP8527

TP45

TP46

Ra

R179 *1M_4

Rb

R335 1M_4

Support HW TPM -->Ra
Support SW TPM -->Rb (default)

C226

0.1U/16V_4

TOP SWAP OVERRIDE STRAP

HIGH:TOP SWAP ENABLED (CRB)

LOW:TOP SWAP DISABLED(DEFAULT)

TLS CONFIDENTIALITY ENABLED

HIGH:T Enable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (with confidentiality). (CRB)

LOW: Disable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (no confidentiality). (Default)

R192
*4.7K_4

SML0ALERT#10

R196

4.7K_4

PLTRST#(CLG)

R167

100K_4

+BAT_RTC

+3V_RTC_2

ACZ_SPKR10,31

3

PLTRST# 2,19,35,36,37,38,39

3D_FW_GPIO 34

Quanta_Confidential

+3V

R183

*150K/F_4

ACZ_SPKR

R185
*20K/F_4

+3V_DEEP_SUS

R207

4.7K_4

SML0ALERT#

R213

*20K/F_4

3

+3V_DEEP_SUS

SMB_ME4_CLK

SMB_ME4_DAT

SMB_ME3_CLK

SMB_ME3_DAT

SMB_ME2_CLK

SMB_ME2_DAT

R169 499/F_4

R170 499/F_4

R172 499/F_4

R174 499/F_4

R175 499/F_4

R177 499/F_4

PCH Strap Pin

BOOT SELECT STRAP

HIGH:LPC

LOW: SPI. (Default)

S_GPIO13

TLS CONFIDENTIALITY ENABLED

HIGH: Flash Descriptor Security (override). This
strap should only be asserted high using external
pull-up in manufacturing/debug environments ONLY.(CRB)

LOW: security measures defined in the Flash
Descriptor. (Default)

ACZ_SDOUT10

RESERVED

This strap should sample LOW.
There should NOT be any on-board device
driving it to opposite direction during
strap sampling.

SML1ALERT#_R10

+3V_DEEP_SUS

S_GPIO

+3V_DEEP_SUS

ACZ_SDOUT

SML1ALERT#_R

R184
*4.7K_4

R186
*20K/F_4

R210
*1K_4 R189

R215
1K_4

+3V_DEEP_SUS

R178
*4.7K_4

R181
*20K/F_4

2

RESERVED

This strap should sample HIGH.
There should NOT be any on-board device
driving it to opposite direction during

strap sampling.

+3V_DEEP_SUS

PCH_SPI1_SO

RESERVED

This strap should sample HIGH.
There should NOT be any on-board device
driving it to opposite direction during

strap sampling.

+3V_DEEP_SUS

PCH_SPI1_SI

RESERVED

This strap should sample HIGH.
There should NOT be any on-board device
driving it to opposite direction during

strap sampling.

+3V_DEEP_SUS

PCH_SPI_IO2

RESERVED

This strap should sample HIGH.
There should NOT be any on-board device
driving it to opposite direction during

strap sampling.

2

+3V_DEEP_SUS

PCH_SPI_IO3

R166
*20K/F_4

R171
*4.7K_4

R208

*20K/F_4

R214
*4.7K_4

R187
*20K/F_4

*4.7K_4

R193

*20K/F_4

R198
*100_4

NB5

NB5

NB5

1

ESPI FLASH SHARING MODE

HIGH:SLAVE ATTACEHD FLASH SHARING

LOW: 0: MASTER ATTACHED FLASH SHARING

This strap should sample LOW.
There should NOT be any on-board device
driving it to opposite direction during

strap sampling.

SML2ALERT#

DFX TEST MODE QUALIFIER FOR OTHER DFX STRAP
WHEN SAMPLED LOW

PGDMON15

DFX TEST MODE

XTAL INPUT IS SINGLE ENDED IF
SAMPLED LOW ELSE DIFFERENTIAL

DGPU_PWROK_Q9,21,39

PGDMON

DGPU_PWROK_Q

RING OSCILLATOR BYPAS S

DGPU_HOLD_RST#9,19

XTAL INPUT FREQUENCY[0]

GPU_EVENT #9,21

XTAL INPUT FREQUENCY[1]

DGPU_PWR_EN9,22,39

PROJECT : G38A

PROJECT : G38A

PROJECT : G38A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

PCH 4/7 (GPIO/MISC)

PCH 4/7 (GPIO/MISC)

PCH 4/7 (GPIO/MISC)

1

12

+3V_DEEP_SUS

+3V_DEEP_SUS

+3V_DEEP_SUS

R188
*10K_4

R190
*10K_4

DGPU_HOLD_RST#

GPU_EVENT #

DGPU_PWR_EN

12 56Tuesday, May 31, 2016

12 56Tuesday, May 31, 2016

12 56Tuesday, May 31, 2016

R168
*4.7K_4

R176
*20K/F_4

R180
*1K_4

R182
*1K_4

R194
100K_4

R199
*10K_4

R209
*10K_4

1A

1A

1A

5

4

3

2

+3V_DEEP_SUS9,10,12,14,16,18

1

13

+3V_DEEP_SUS

ACC_LED#
BT_OFF
I2C0_SDA
I2C0_SCL
SPK_ID
SPKAMP_ID

PCI_SERR#

ACCEL_INTA#

BOARD_ID[2:1]

00 0󶁪󶁪󶁪󶁪UMA

15" P SKL H

01 17" P SKL H

17" SP SKL H10

11

Reserved

Q7711

*2N7002KDW

SPT-H_PCH

GPP_D9
GPP_D10
GPP_D11

GPP_D16/ISH_UART0_CTS#

GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C2_SCL

GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C2_SDA

+3V

5

2

6

GPP_D15/ISH_UART0_RTS#

GPP_H19/ISH_I2C0_SDA

GPP_H21/ISH_I2C1_SDA

11 OF 12

I2C0_SDA

Quanta_Confidential

I2C0_SCL

GPP_D12

GPP_H20/ISH_I2C0_SCL

GPP_H22/ISH_I2C1_SCL

GPP_A23/ISH_GP5
GPP_A22/ISH_GP4
GPP_A21/ISH_GP3
GPP_A20/ISH_GP2
GPP_A19/ISH_GP1
GPP_A18/ISH_GP0
GPP_A17/ISH_GP7

AL44

ACC_LED#

AL36
AL35

SPK_ID

AJ39

BT_OFF

AJ43
AL43

SPKAMP_ID

AK44
AK45

BC38
BB38

BD38
BE39

BC22

BOARD_ID6

BD18

BOARD_ID5

BE21

BOARD_ID4

BD22

BOARD_ID3

BD21

BOARD_ID2

BB22

BOARD_ID1

BC19

BOARD_ID0

Smart AMP Setting

Codec OUTPUT AMP OUTPUT

GPIO

Definition

Board ID

Model

BOARD_ID[8:7]

ID8;ID7 ID6;ID5

Definition

R1 *0_4

GPP_D11

Hi: SABLE

LOW: VECO

SKL H

3D_CAM_EN3D_CAM_EN _PCH_R

SPKAMP_ID 32

ACC_LED# 34
3D_CAM_EN 39,48

GPP_D15

SPKAMP_IDSPK_ID

Hi: SABLE

LOW: VECO

BOARD_ID[6:5]

Reserved

0001

SPK_ID 31
BT_OFF 35

Reserve

R222 *10K_4

R224 10K_4

R228 *10K_4

R231 10K_4

R233 10K_4

R235 10K_4

R237 10K_4

R239 *10K_4

R241 10K_4

Board ID [4:3]

ID3ID4

NVidia0

AMD

1

D D

+3V_DEEP_SUS

R226

49.9K/F_4

UART2_TXD33
UART2_RXD33

C C

R227

49.9K/F_4

S_GPIO12

PCI_SERR#39

BBS_BIT112

PM_EXTTS#017,18

EXTTS#15

TCH_PNL_INT#28

+3V_DEEP_SUS

SIO_EXT_SCI#39

ACCEL_INTA#36

R216 100_4

R8511 *0_4

R8517 *0_4

R230 10K_4

TP53

TP8523
TP8524

S_GPIO
PCI_GNT3#
PCI_SERR#_R

BBS_BIT1
PM_EXTTS#0_R

TCH_PNL_INT#_R

SIO_EXT_SCI#
ACCEL_INTA#
UART2_TXD
UART2_RXD

I2C1_SCL
I2C1_SDA
I2C0_SCL
I2C0_SDA

I2C_DATA_ TS28

I2C_CLK_TS28

+3V

+3V

U2K

AT29

GPP_B22/GSPI1_MOSI

AR29

GPP_B21/GSPI1_MISO

AV29

GPP_B20/GSPI1_CLK

BC27

GPP_B19/GSPI1_CS#

BD28

GPP_B18/GSPI0_MOSI

BD27

GPP_B17/GSPI0_MISO

AW27

GPP_B16/GSPI0_CLK

AR24

GPP_B15/GSPI0_CS#

AV44

GPP_C9/UART0_TXD

BA41

GPP_C8/UART0_RXD

AU44

GPP_C11/UART0_CTS#

AV43

GPP_C10/UART0_RTS#

AU41

GPP_C15/UART1_CTS#/ISH_UART1_CTS#

AT44

GPP_C14/UART1_RTS#/ISH_UART1_RTS#

AT43

GPP_C13/UART1_TXD/ISH_UART1_TXD

AU43

GPP_C12/UART1_RXD/ISH_UART1_RXD

AN43

GPP_C23/UART2_CTS#

AN44

GPP_C22/UART2_RTS#

AR39

GPP_C21/UART2_TXD

AR45

GPP_C20/UART2_RXD

AR41

GPP_C19/I2C1_SCL

AR44

GPP_C18/I2C1_SDA

AR38

GPP_C17/I2C0_SCL

AT42

GPP_C16/I2C0_SDA

AM44

GPP_D4/ISH_I2C2_SDA/ISH_I2C3_SDA

AJ44

GPP_D23/ISH_I2C2_SCL/ISH_I2C3_SCL

SPT_PCH_H

R8550 *2.2K_4

R8551 *2.2K_4

4 3

1

Reserve for Touch function

B B

BOARD_ID0

BOARD_ID1

BOARD_ID2

BOARD_ID3

BOARD_ID4

BOARD_ID5

BOARD_ID6

BOARD_ID7

BOARD_ID8

BOARD_ID7
BOARD_ID8

R218 10K_4
R219 10K_4
R8515 2.2K_4
R8516 2.2K_4
R8619 10K_4
R8620 10K_4

R220 10K_4

R8561 10K_4

R223 10K_4

R225 *10K_4

R229 10K_4

R232 *10K_4

R234 *10K_4

R236 *10K_4

R238 *10K_4

R240 10K_4

R242 *10K_4

BOARD_ID0

ID0ID2;ID1

1󶁪󶁪󶁪󶁪DIS

+3V

+3V_DEEP_SUS

BOARD_ID7 9
BOARD_ID8 9

Reserve EDP_HPD opposites circuit!

+3V

R243
*10K/F_4

CPU_EDP_HPD

R244
100K_4

A A

5

HDMI_HPD_PCH21,29
DP_HPD_PCH21,30

CPU_EDP_HPD28

HDMI_HPD_PCH
DP_HPD_PCH

CPU_EDP_HPD

4

AW4

GPP_I0/DDPB_HPD0

AY2

GPP_I1/DDPC_HPD1

AV4

GPP_I2/DDPD_HPD2

BA4

GPP_I3/DDPE_HPD3

BD7

GPP_I4/EDP_HPD

U2E

SPT_PCH_H

SPT-H_PCH

GPP_I7/DDPC_CTRLCLK

GPP_I8/DDPC_CTRLDATA

GPP_I5/DDPB_CTRLCLK

GPP_I6/DDPB_CTRLDATA

GPP_I9/DDPD_CTRLCLK

GPP_I10/DDPD_CTRLDATA

5 OF 12

GPP_F14
GPP_F23
GPP_F22

GPP_G23
GPP_G22
GPP_G21
GPP_G20
GPP_H23

This signal has a weak internal pull-down.

0 = Port C and D is not detected.

1 = Port C and D is detected.

BB3

DDPC_CTRLCLK

BD6

DDPC_CTRLDATA

BA5

SDVO_CLK

BC4

SDVO_DATA

BE5
BE6

Y44

SKTOCC_N_R

V44
W39

L43
L44
U35
R35
BD36

3

SKTOCC_N_R 2

SDVO_CLK
SDVO_DATA
DDPC_CTRLCLK
DDPC_CTRLDATA

2

R8591 *2.2K_4
R8592 2.2K_4
R8593 *2.2K_4
R8594 2.2K_4

+3V

PROJECT : G38A

PROJECT : G38A

PROJECT : G38A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

NB5

NB5

NB5

Date: Sheet of

Date: Sheet of

Date: Sheet of

PCH 5/7 (GPIO)

PCH 5/7 (GPIO)

PCH 5/7 (GPIO)

1

13 56Tuesday, May 31, 2016

13 56Tuesday, May 31, 2016

13 56Tuesday, May 31, 2016

1A

1A

1A

5

4

3

2

1

14

R245/R247/R250/R257/R262

D D

+1.0V_DEEP_SUS +VCCDSW_1.0V

R246 *0_6

R261/R263/R268/R269(down size)

Delete:R253/R254/R255

+1.0V_DEEP_SUS

R251 *0_6/S

CHECK AUDIO POWER

+3V

C C

+V3.3DX_1.5DX_ADO

R264 *0_4/S R262 *0_4/S

+V3.3DX_1.5DX_ADO+3VS5

+1.0V_DEEP_SUS

R259 *0_6/S

R260 *0_6/S

R261 *0_4/S

R263 *0_4/S

R265 *0_4/S
R267 *0_6/S

R268 *0_4/S
R269 *0_4/S

R270 *0_4/S

SPT-H_PCH

CORE

VCCGPIO

VCCRTCPRIM_3P3

MPHY

USB

8 OF 12

Quanta_Confidential

for DS3

U6

5

4

3

IC(5P ) AP2 821KT R-G 1

IN

IN

ON/OFF

OUT

GND

VCCPRIM_1P0

VCCDSW_3P3

VCCPGPPA

VCCPGPPBCH
VCCPGPPBCH

VCCPGPPEF
VCCPGPPEF

VCCPGPPG

VCCPRIM_3P3

VCCPRIM_1P0

VCCATS

VCCRTC
DCPRTC

VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0

VCCSPI
VCCSPI
VCCSPI

VCCPGPPD
VCCPGPPD
VCCPGPPD
VCCPGPPD

VCCPRIM_3P3
VCCPRIM_3P3
VCCPRIM_3P3

+3V_DEEP_SUS+3VS5

1

2

90.8mA

AL22

BA24

BA31

BC42
BD40
AJ41
AL41
AD41
AN5

AD15
AD13
BA20
BA22
BA26

AJ20
AJ21
AJ23
AJ25

BE41
BE43
BE42

BC44
BA45
BC45
BB45

BD3
BE3
BE4

C252

0.1U/16V_4

+VCCPRIM_1.0V_AL22

403mA

+VCCDSW3P3

87.9mA

+VCCPGPPA

272.62mA

+VCCPGPPBCH

+VCCPGPPEF

141.07mA

131.8mA

+VCCPGPPG

287.5mA

+VCCPRIM_3P3

+VCCPRIM_1.0V_AJ20_AD15

6.6mA

+VCCATS

2mA

+VCCRTCPRIM_3.3V
+VCCRTC
DCPRTC

**Layout Note: +VCCPRIM_1P0 total :5.5167A**

12.1mA

+VCCSPI

+VCCPGPPD

81mA

45.4mA

34.8mA

23.7mA

23.7mA

32.7mA

24.8mA

24.8mA

95mA
533mA

10mA
10mA

75mA

R271
100K_4

C253
*10P/50V_4

AC23
AC26
AC28

AC17

AN19

AA23
AA26
AA28

AE23
AE26

Y23
Y25

BA29

N17
R19
U20

V17

R17

K2
K3

U21
U23
U25
U26

V26
A43

B43
C44
C45

V28

AJ5

AL5

BA15

W15

U2H

VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
DCPDSW_1P0

VCCCLK1
VCCCLK3
VCCCLK4
VCCCLK2
VCCCLK2

VCCCLK5
VCCCLK5

VCCMPHY_1P0
VCCMPHY_1P0
VCCMPHY_1P0
VCCMPHY_1P0
VCCMPHY_1P0
VCCMPHYPLL_1P0
VCCMPHYPLL_1P0
VCCPCIE3PLL_1P0
VCCPCIE3PLL_1P0

VCCAPLLEBB_1P0
VCCPRIM_1P0
VCCUSB2PLL_1P0
VCCUSB2PLL_1P0
VCCHDAPLL_1P0

VCCHDA
VCCDSW_3P3

SPT_PCH_H

C251
1U/6.3V_4

**Layout Note: +VCCPRIM_1P0 total :5.5167A**

4.7U/6.3V_4

+VCCCLK1_2_3_4

+VCCCLK5

+VCCAMPHY_1P0

+VCCAMPHYPLL_1P0

+VCCPCIE3PLL_1P0

+VCCAPLLEBB
+VCCPRIM_1.0V_AC17

+VCCUSB2PLL_1P0
+VCCHDAPLL_1P0

+VCCDSW3P3

C230
*1U/6.3V_4

C9152

+VCCDSW_1.0V

4.7U/6.3V_4

C229 1U/6.3V_4

C91531U /6.3V_4
C91544.7U /6.3V_4

C235 1U/6.3V_4

C237 1U/6.3V_4
C238 22U/6.3V_6 C9157 4.7U/6.3V_4

C243 1U/6.3V_4

C244 1U/6.3V_4

C245 1U/6.3V_4

C246 1U/6.3V_4

C250 *1U/6.3V_4

+VCCPRIM_1.0V_AC17

C9158

4.7U/6.3V_4

SLP_SUS_ON39,49,50

C231 1U/6.3V_4
C228 1U/6.3V_4C9151

C232 0.1U/16V_4

C233 0.1U/16V_4

C234 0.1U/16V_4

C9155 4.7U/6.3V_4

C236 0.1U/16V_4

C239 0.1U/16V_4

C9156 4.7U/6.3V_4

C247 *1U/6.3V_4

R245 *0_4/S

R247 *0_4/S

R248 *0_6/S

R249 *0_6/S

R250 *0_4/S
R252 *0_6/S

R256 *0_6/S
R257 *0_4/S
R258 *0_6/S
R333 0_4

Rb

R334 *0_4

Ra

Main BAT -->Ra
Coin BAT -->Rb (default)

R266 *0_6/S

+1.0V_DEEP_SUS

+3V_DEEP_SUS

+3V_DEEP_SUS

+3V_DEEP_SUS

+3V_DEEP_SUS
+3V_DEEP_SUS

+1.0V_DEEP_SUS
+3V_DEEP_SUS
+3V_DEEP_SUS
+3V_RTC_2
+BAT_RTC

+1.0V_DEEP_SUS

+3V_DEEP_SUS

+3V_DEEP_SUS

+3V_DEEP_SUS

20mils

1U/6.3V_4

C242

1U/6.3V_4

+VCCRTCPRIM_3.3V+VCCRTC

1U/6.3V_4

C249

C248

0.1U/16V_4

+VCCATS

C241

C240

0.1U/16V_4

B B

A A

NB5

NB5

5

4

3

2

NB5

+3V_DEEP_SUS9,10,12,13,16,18

PROJECT : G38A

PROJECT : G38A

PROJECT : G38A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

PCH 6/7 (POWER)

PCH 6/7 (POWER)

PCH 6/7 (POWER)

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

14 56Tuesday, May 31, 2016

14 56Tuesday, May 31, 2016

14 56Tuesday, May 31, 2016

1A

1A

1A

5

4

3

2

1

15

SPT-H_PCH

C42
D10
D12
D15
D16
D17
D19
D21
D24
D25
D27
D29
D30
D31
D33
D35
D36
E13
E15
E31
E33
F44

G42

H17
H19
H22
H24
H27
H29

H35
J10
J11

J39

T42
U10
U11
U14
U17
U18
U28
U29
U31
U32
U33
U38

V18
V20
V21
V23
V25
V29

V45
W14
W31
W32
W33
W38

W4

W8

Y17

F8

G9

H3

J3

J5

U4
U8

V3

U2L

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

SPT_PCH_H

12 OF 12

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AB11
AB7
AB14
AB31
AB32
AB38
AB4
AB5
AC1
AC20
AC21
AC25
AC29
AC45
AB8
AD11
AD14
AB15
AD32
AD33
AD36
AD4
AD8
AE18
AE20
AE21
AE25
AE28
AL10
AL11
AL13
AL17
AL19
AL24
AL29
AL32
AL33
AL38
AM15
AM17
AM19
AM22
AM24
AM27
AM29
AM45
AN11
AN22
AN27
AN31
AN39
AN7
AN8
AP11
AP4
AR33
AR34
AR42
AR9
AT10
AT15
AT36
AT9
AU1
AU35
AU36
AU39
AU45
C4

Quanta_Confidential

U2I

SPT-H_PCH

AC18

D D

C C

B B

AN4
AN10
BE14
BE18
BE23
BE28
BE32
BE37
BE40

BE9

M35

M42

AA17
AA18
AA20
AA21
AA25
AA29

AA4
AA42
AB10

C10

C28
C37

K10
K27
K33
K36

K42
K43

L12
L13
L15

L41

N10
N15
N19
N22
N24
N35
N36

N41

P17
P19
P22
P45
R10
R14
R22
R29
R33
R38

Y18
Y20
Y21
Y26
Y28
Y29
A18
A25
A32
A37

C2

J7

K4

L4

L8

N4

N5

R5
T1
T2
T4

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

SPT_PCH_H

9 OF 12

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AR5
AR7
U15
AL4
AE29
AE4
AE42
AF18
AF20
AF21
AF23
AF25
AF26
AF28
AF29
AG11
AG13
AG31
AG32
AG33
AG38
AG4
AH1
AH17
AH18
AH20
AH21
AH23
AH25
AH26
AH28
AH29
AH45
AJ10
AJ14
AJ15
AJ17
AJ18
AJ26
AJ28
AJ29
AJ31
AJ32
AJ36
AK4
AK42
AU7
AV17
AV24
AV27
AV31
AV33
AV6
AW13
AW19
AW29
AW37
AW9
AY38
AY45
B25
B3
B37
B40
B6
BA1
BB11
BB16
BB21
BB25
BB30
BB34
BC2
BD43

BD2
BD45
BD44
BE44

BC1

D45
A42
B45
B44

BB1

A44

A4
A3
B2
A2
B1

C1
D1

U2J

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

RSVD
RSVD

SPT_PCH_H

SPT-H_PCH

10 OF 12

RSVD
RSVD
RSVD
RSVD
RSVD

RSVD
RSVD
RSVD
RSVD
RSVD
RSVD

RSVD
PREQ#
PRDY#

CPU_TRST#

PCH_TRIGOUT

PCH_TRIGIN

AR22
W13
U13
P31
N31

P27
R27
N29
P29
AN29
R24

P24
AT3
AT4
AY5
AL2
AK1

PGDMON

R272 30_4

PGDMON 12

XDP_PREQ# 2
XDP_PRDY# 2

PCH_2_CPU_TRIGPCH_2_CPU_TRIG_R

XDP_TRST# 2
PCH_2_CPU_TRIG 8
CPU_2_PCH_TRIG 8

A A

PROJECT : G38A

PROJECT : G38A

PROJECT : G38A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

NB5

NB5

NB5

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

PCH 7/7 (GND)

PCH 7/7 (GND)

PCH 7/7 (GND)

1

15 56Tuesday, May 31, 2016

15 56Tuesday, May 31, 2016

15 56Tuesday, May 31, 2016

1A

1A

1A

5

4

3

2

1

16

D D

C C

+3V_DEEP_SUS

APS

+3VS5

CN1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11
12
13
14
15
16
17
18

ON/OFFBTN_K BC#

R283 *0_4

11

B B

12
13
14
15
16
17
18

*ACES_88511-180N

SUSB# 10,16,39

SLP_S5# 10
SUSC# 10,39
SLP_A# 10

RTC_RST# 10

TP8553

SYS_RESET# 10

PCH_SLP_S0_N 10

SUSB# 10,16,39

+3VS5

Quanta_Confidential

A A

PROJECT : G38A

PROJECT : G38A

PROJECT : G38A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

+3V_DEEP_SUS9,10,12,13,14,18

5

4

3

2

Size Document Number Rev

NB5

NB5

NB5

Date: Sheet of

Date: Sheet of

Date: Sheet of

XDP & APS

XDP & APS

XDP & APS

1

1A

1A

16 56Tuesday, May 31, 2016

16 56Tuesday, May 31, 2016

16 56Tuesday, May 31, 2016

1A

5

5,9,10,11,12,13,14,18,21,22,28,29,30,31,32,33,34,35,36,37,38,39,40,45,48,54,5 5

M_A_A[13:0]4

D D

M_A_WE#4
M_A_CAS#4
M_A_RAS#4

DDR4_DRAMRST#10,18

M_A_DIM0_ODT04
M_A_DIM0_ODT14

+1.2VSUS

M_A_ACT#4
M_A_PARITY4
M_A_ALERT#4

M_A_BS#04
M_A_BS#14

M_A_BG#04
M_A_BG#14

M_A_CS#04
M_A_CS#14
M_A_CKE04
M_A_CKE14

M_A_CLKP04
M_A_CLKN04
M_A_CLKP14
M_A_CLKN14

SMB_RUN_CLK10,18,40
SMB_RUN_DAT10,18,40

R294 *240_4
R296 *240_4
R297 *240_4
R298 *240_4
R299 *240_4
R300 *240_4
R301 *240_4
R302 *240_4

+1.2VSUS

PM_EXTTS#013,18

C C

+3V

R287
*10K_4

R290
10K_4

Follow reference board DIMM0 SA0,1,2=LLL
20150527

B B

R286 240_4

PM_EXTTS#0

R288

R289

*10K_4

*10K_4

CHA_SA1CHA_SA0 CHA_SA2

R292

R291

10K_4

10K_4

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13

C259 *0.1U/16V_4

SMB_RUN_CLK
SMB_RUN_DAT

CHA_SA0
CHA_SA1
CHA_SA2

+1.2VSUS

TP62
TP61

M_A_CB0

M_A_CB1
M_A_CB2
M_A_CB3

M_A_CB4

M_A_CB5
M_A_CB6
M_A_CB7

4

JDIM1A

144

A0

133

A1

132

A2

131

A3

128

A4

126

A5

127

A6

122

A7

125

A8

121

A9

146

A10/AP

120

A11

119

A12

158

A13

151

A14/WE#

156

A15/CAS#

152

A16/RAS#

162

S2#/C0

165

S3#/C1

114

ACT#

143

PARITY

116

ALERT#

134

EVENT#

108

RESET#

150

BA0

145

BA1

115

BG0

113

BG1

149

S0#

157

S1#

109

CKE0

110

137
139
138
140

155
161

253
254

256
260
166

92

91
101
105

88

87
100
104

12

33

54

75
178
199
220
241

96

CKE1

CK0
CK0#
CK1
CK1#

ODT0
ODT1

SCL
SDA

SA0
SA1
SA2

CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8

DDR4 SODIMM 260 PIN

EZIW

(260P)

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8

DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8

8
7
20
21
4
3
16
17
28
29
41
42
24
25
38
37
50
49
62
63
46
45
58
59
70
71
83
84
66
67
79
80
174
173
187
186
170
169
183
182
195
194
207
208
191
190
203
204
216
215
228
229
211
212
224
225
237
236
249
250
232
233
245
246

13
34
55
76
179
200
221
242
97

11
32
53
74
177
198
219
240
95

M_A_DQ1
M_A_DQ0
M_A_DQ3
M_A_DQ2
M_A_DQ4
M_A_DQ5
M_A_DQ7
M_A_DQ6
M_A_DQ10
M_A_DQ11
M_A_DQ15
M_A_DQ13
M_A_DQ14
M_A_DQ8
M_A_DQ12
M_A_DQ9
M_A_DQ21
M_A_DQ20
M_A_DQ22
M_A_DQ19
M_A_DQ17
M_A_DQ16
M_A_DQ23
M_A_DQ18
M_A_DQ29
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ24
M_A_DQ31
M_A_DQ30
M_A_DQ32
M_A_DQ36
M_A_DQ35
M_A_DQ39
M_A_DQ33
M_A_DQ37
M_A_DQ34
M_A_DQ38
M_A_DQ40
M_A_DQ44
M_A_DQ46
M_A_DQ43
M_A_DQ45
M_A_DQ41
M_A_DQ47
M_A_DQ42
M_A_DQ49
M_A_DQ54
M_A_DQ55
M_A_DQ53
M_A_DQ48
M_A_DQ52
M_A_DQ50
M_A_DQ51
M_A_DQ61
M_A_DQ63
M_A_DQ59
M_A_DQ62
M_A_DQ56
M_A_DQ57
M_A_DQ60
M_A_DQ58

M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSP8

M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
M_A_DQSN8

Quanta_Confidential

M_A_DQSP[7:0] 4

M_A_DQSN[7:0] 4

3

M_A_DQ[63:0] 4

0

1

2

3

4

5

6

7

R293

240_4

M_A_DQSP8 M_A_DQSN8

+1.2VSUS +1.2VSUS

R295

240_4

2.48A

+1.2VSUS

2

JDIM1B

111

VDD1

112

VDD2

117

VDD3

118

VDD4

123

VDD5

124

VDD6

129

VDD7

130

VDD8

135

VDD9

136

VDD10

141

VDD11

142

VDD12

147

VDD13

148

VDD14

153

VDD15

154

VDD16

159

VDD17

160

VDD18

163

VDD19

1

VSS1

5

VSS2

9

VSS3

15

VSS4

19

VSS5

23

VSS6

27

VSS7

31

VSS8

35

VSS9

39

VSS10

43

VSS11

47

VSS12

51

VSS13

57

VSS14

61

VSS15

65

VSS16

69

VSS17

73

VSS18

77

VSS19

81

VSS20

85

VSS21

89
93

99
103
107
167
171
175
181
185
189
193
197
201
205
209
213
217
223
227
231
235
239
243
247
251

VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47

DDR4 SODIMM 260 PIN

VDDSPD

VREF_CA

(260P)

VPP1
VPP2

VTT

VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94

GND
GND

255

257
259

258

164

+SMDDR_VREF_DQ0 +SMDDR_VREF_DIMM

2
6
10
14
18
22
26
30
36
40
44
48
52
56
60
64
68
72
78
82
86
90
94
98
102
106
168
172
176
180
184
188
192
196
202
206
210
214
218
222
226
230
234
238
244
248
252

261
262

1

17

+3V

+2.5VSUS

DDR_VTT

R285 *0_6/S

+2.5VSUS

C260 1U/6.3V_4

C261 1U/6.3V_4

C262 10U/6.3V_6

C263 10U/6.3V_6

+1.2VSUS

C264 10U/6.3V_6

C265 10U/6.3V_6

C266 10U/6.3V_6

C267 10U/6.3V_6

C268 10U/6.3V_6

C269 10U/6.3V_6

C270 10U/6.3V_6

C271 10U/6.3V_6

C272 1U/6.3V_4

C273 1U/6.3V_4

C274 1U/6.3V_4

C275 1U/6.3V_4

C276 1U/6.3V_4

C277 1U/6.3V_4

C278 1U/6.3V_4

C279 1U/6.3V_4

DDR_VTT

C280 1U/6.3V_4

C281 1U/6.3V_4

C282 1U/6.3V_4

C283 1U/6.3V_4

C284 10U/6.3V_6

C285 10U/6.3V_6

Place these Caps near So-Dimm0.

+1.2VSUS

R303
1K_4

+SMDDR_VREF_DIMM

R305
1K_4

3

2

5

+SMDDR_VREF_DQ0

C288 *0.1U/16V_4

C289 *2.2U/10V_4

+3V

C291 0.1U/16V_4

C292 2.2U/10V_4

SM_VREF4

C290

0.022U/25V_4

2 1

4

R304 2/F_6

R306 24.9/F_4

A A

1uF/10uF 4pcs on each side of connector

Place these Caps near So-Dimm0.

+2.5VSUS 18,44
DDR_VTT 18,44
+1.2VSUS 2,6,10,18,44,50,55
+3V

PROJECT : G38A

PROJECT : G38A

PROJECT : G38A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

DDR4 DIMM0-STD(4.0H)

DDR4 DIMM0-STD(4.0H)

NB5

NB5

NB5

DDR4 DIMM0-STD(4.0H)

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

1A

1A

1A

17 56Tuesday, May 31, 2016

17 56Tuesday, May 31, 2016

17 56Tuesday, May 31, 2016