1
2
3
4
5
6
7
8
Hepburn AMD Discrete GFX
A A
VER : A00
FAN & THERMAL
DDRII-SODIMM1
PG 16,17
DDRII-SODIMM2
PG 16,17
B B
C C
Panel Connector
PG 26
HDMI CONN.
PG 28
CRT CONN.
PG 27
VRAM
PG 23
E-SATA+USB CONN
PG 38
LVDS
HDMI
VGA
SATA - HDD
Fixed SATA ODD
PG 30
PG 30
PG 18,19,20,21,
22
800 MHz DDR II
LVDS
M82-S
632 BGA
25mmX25mm
SATA
SATA
PCIEx16
SATA
USB2.0
Azalia
USB2.0
AUDIO/AMP
IDT_92HD73C
PG 31
A-MIC
PG 32
D D
SPK conn
PG 31 PG 32
Audio
Jacks x3
Camera + D-MIC
PG 32
USER
INTERFACE
PG 44
1
2
3
AMD S1G2
64 X2
(638 S1 socket)
PG 3,4,5,6
HT_LINK
RS780M
528 FCBGA
21mmX21mm
PG 7,8,9,10,11
A_LINK
SB700
528 BGA
21mmX21mm
PG 12,13,14,15
KBC
ITE8512
FLASH
16Mbits
PG 41
LPC
PG 42
18X8
PS/2 SPI
Touchpad
PG 43
4
CLOCK
SLG8SP628VTR(QFN)
PCIEx1
PCIEx1
PCIEx2
PCIEx1
USB2.0
USB2.0
USB2.0
USB2.0 x 4
USB2.0
33MHz PCI
CIR
PG 43
TSOP36136TS
Keyboard
PG 43
EMC1423
PG 29
PG 25
5
POWER
REGULATOR
+1.5V_RUN/+1.1V_RUN
PG 50
REGULATOR
+1.8V_SUS/+1.2V_ALW
/+0.9V_DDR_VTT
CPU VR
PG 53
DC/DC
+3.3V_ALW/+5V_ALW
+15V_ALW/+5V_SUS
PG 52
1.2V_ALW_SUS
PG 51,54 PG 60 PG 55
LAN
PG 33
5784M
EXPRESS-CARD
R5538
MINI-CARD
WLAN
MINI-CARD
WWAN
MINI-CARD
WPAN
USB conn x 4
Biometric
PG 37
PG 39
PG 40
PG 39
PG 38
PG 44
SYSTEM
RESET CIRCUIT
AC/BATT
CONNECTOR
M82_POWER +2.5V_RUN VCC_NB
RJ45/Magnetics
PG 34
1394
8-in-1 Card Reader
R5C833
6
PG 35
BATT
CHARGER
PG 47 PG 45
RUN POWER SW
+5V/+3.3V/+1.8V/+1.2V_RUN
+3.3V/+1.2V_SUS
1394 CONN.
Card Reader CONN.
Title
Title
Title
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
FX6 3A
FX6 3A
FX6 3A
Date: Sheet
Date: Sheet
Date: Sheet
7
PG 36
PG 36
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
PG 46 PG 54 PG 49
17 0 Tuesday, May 20, 2008
17 0 Tuesday, May 20, 2008
17 0 Tuesday, May 20, 2008
of
of
of
8
1
INDEX
Pg# Description
Schematic Block Diagram
1
Index/Power States and USB/PCI/PCIe map
2
CPU page
3-6
RS780M page
7-11
12-15
A A
B B
C C
SB700 page
DDRII SO-DIMM(200P)
16-17
M82-S
18-23
24
LCD/CRT HYBRID
Clock Generator
25
LCD Conn.
26
CRT Conn
27
HDMI
28
FAN /THERMAL
29
SATA (HDD&CD_ROM)
30
31-32
Audio CODEC(92HD73)/Phone Jack
LOM /Switch
33-34
PC CARD/1394
35-36
EXPRESS
37
USB
38
Mini Card
39
WWAN
40
Flash ROM, RTC
41
ITE8512
42
43
TP/KB/CIR/BT
Switch,Keyboard & LED
44
System Reset Circuit
45
RUN POWER
46
Battery Charger
47
DCIN,Batt
48
1.8V_SUS,0.9VTT
49
1.5V_RUN AND 1.1V_RUN
50
51
+VCC_NB
+3.3V_ALW/+5V_SUS
52
VCC_VCORE
53
54
+1.2V_ALW_SUS
55
VGA_M82
Power Rail for system
56
Power Sequence Diagram
57
SMBUS BLOCK
58
59 Stitch caps and Screw hole.
POWER STATES
State
Signal
SLP
S3#
SLP
S5#
2
ALWAYS
PLANE
SUS
PLANE
RUN
PLANE
3
4
USB PORT#
0
1
2
3
SB700
4
5
6
7
10
11
PCI TABLE
REQ#/GNT#
CardBus AD17 REQ#1/GNT#1
PM TABLE
CLOCKS
State
power
plane
+15V_ALW
+5V_ALW
+3.3V_ALW +1.8V_SUS +1.5V_RUN
5
DESTINATION
Left side USB.
Left side USB.
IO board
IO board
WLAN
WWAN
WPAN
EXPRESS
Biometric
Camera
+5V_SUS
+3.3V_SUS
+0.9V_DDR_VTT
+1.2V_ALW_SUS
6
PIRQ PCI DEVICE IDSEL
IRQ_SERIRQ
IRQD
+5V_RUN
+3.3V_RUN
+2.5V_RUN
+1.8V_RUN
+1.2V_RUN
+VCC_CORE
+NB_VCORE
7
8
PCI EXPRESS DESTINATION
Lane 1
Lane 2
Lane 3
Lane 4
WLAN
WPAN
LOM
EXPRESS CARD
Lane 5 WWAN
S0 (Full ON)
D D
S3 (Suspend to RAM)
S4 (Suspend to DISK) ON OFF
S5 (SOFT OFF) ON OFF LOW LOW
1
HIGH
HIGH
ON
LOW HIGH ON ON OFF
LOW HIGH
2
ON ON ON
OFF
OFF
OFF
OFF
OFF
3
S0
S3
S5 S4/AC
S5 S4 on Battery
4
ON
ON
ON
ON ON
ON
OFF
OFF OFF
5
OFF
OFF
OFF
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
6
Date: Sheet
COMPUTER
Index
Index
Index
FX6 3A
FX6 3A
FX6 3A
7
of
of
of
27 0 Tuesday, May 20, 2008
27 0 Tuesday, May 20, 2008
27 0 Tuesday, May 20, 2008
8
5
C672
C665
(19)
D D
C665
10U
10U
10
10
X7R
X7R
0805
0805
C672
10U
10U
10
10
X7R
X7R
0805
0805
C673
C673
10U
10U
10
10
X7R
X7R
0805
0805
4
+1.2V_RUN
C666
C666
0.22U
0.22U
10
10
X7R
X7R
0603
0603
C671
C671
0.22U
0.22U
10
10
X7R
X7R
0603
0603
C669
C669
180P
180P
50
50
NPO
NPO
C674
C674
180P
180P
50
50
NPO
NPO
3
2
1
Place close to socket
* If VLDT is connected only on one side,
one 4.7uF C101 cap should be added to
the island side
U30A
+1.2V_RUN +1.2V_RUN
C C
HT_CADIN0 7
HT_CADIN#0 7
HT_CADIN1 7
HT_CADIN#1 7
HT_CADIN2 7
HT_CADIN#2 7
HT_CADIN3 7
HT_CADIN#3 7
HT_CADIN4 7
HT_CADIN#4 7
HT_CADIN5 7
HT_CADIN#5 7
HT_CADIN6 7
HT_CADIN#6 7
HT_CADIN7 7
HT_CADIN#7 7
HT_CADIN8 7
HT_CADIN#8 7
HT_CADIN9 7
HT_CADIN#9 7
B B
A A
5
HT_CADIN10 7
HT_CADIN#10 7
HT_CADIN11 7
HT_CADIN#11 7
HT_CADIN12 7
HT_CADIN#12 7
HT_CADIN13 7
HT_CADIN#13 7
HT_CADIN14 7
HT_CADIN#14 7
HT_CADIN15 7
HT_CADIN#15 7
HT_CLKIN0 7
HT_CLKIN#0 7
HT_CLKIN1 7
HT_CLKIN#1 7
HT_CTLIN0 7
HT_CTLIN#0 7
HT_CTLIN1 7
HT_CTLIN#1 7
U30A
D1
VLDT_A0
D2
VLDT_A1
D3
VLDT_A2
D4
VLDT_A3
E3
L0_CADIN_H0
E2
L0_CADIN_L0
E1
L0_CADIN_H1
F1
L0_CADIN_L1
G3
L0_CADIN_H2
G2
L0_CADIN_L2
G1
L0_CADIN_H3
H1
L0_CADIN_L3
J1
L0_CADIN_H4
K1
L0_CADIN_L4
L3
L0_CADIN_H5
L2
L0_CADIN_L5
L1
L0_CADIN_H6
M1
L0_CADIN_L6
N3
L0_CADIN_H7
N2
L0_CADIN_L7
E5
L0_CADIN_H8
F5
L0_CADIN_L8
F3
L0_CADIN_H9
F4
L0_CADIN_L9
G5
L0_CADIN_H10
H5
L0_CADIN_L10
H3
L0_CADIN_H11
H4
L0_CADIN_L11
K3
L0_CADIN_H12
K4
L0_CADIN_L12
L5
L0_CADIN_H13
M5
L0_CADIN_L13
M3
L0_CADIN_H14
M4
L0_CADIN_L14
N5
L0_CADIN_H15
P5
L0_CADIN_L15
J3
L0_CLKIN_H0
J2
L0_CLKIN_L0
J5
L0_CLKIN_H1
K5
L0_CLKIN_L1
N1
L0_CTLIN_H0
P1
L0_CTLIN_L0
P3
L0_CTLIN_H1
P4
L0_CTLIN_L1
FOX_PZ6382A-284S-41F
FOX_PZ6382A-284S-41F
4
HT LINK
HT LINK
VLDT_B0
VLDT_B1
VLDT_B2
VLDT_B3
L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
AE2
AE3
AE4
AE5
AD1
AC1
AC2
AC3
AB1
AA1
AA2
AA3
W2
W3
V1
U1
U2
U3
T1
R1
AD4
AD3
AD5
AC5
AB4
AB3
AB5
AA5
Y5
W5
V4
V3
V5
U5
T4
T3
Y1
W1
Y4
Y3
R2
R3
T5
R5
500mA
HT_CADOUT0 7
HT_CADOUT#0 7
HT_CADOUT1 7
HT_CADOUT#1 7
HT_CADOUT2 7
HT_CADOUT#2 7
HT_CADOUT3 7
HT_CADOUT#3 7
HT_CADOUT4 7
HT_CADOUT#4 7
HT_CADOUT5 7
HT_CADOUT#5 7
HT_CADOUT6 7
HT_CADOUT#6 7
HT_CADOUT7 7
HT_CADOUT#7 7
HT_CADOUT8 7
HT_CADOUT#8 7
HT_CADOUT9 7
HT_CADOUT#9 7
HT_CADOUT10 7
HT_CADOUT#10 7
HT_CADOUT11 7
HT_CADOUT#11 7
HT_CADOUT12 7
HT_CADOUT#12 7
HT_CADOUT13 7
HT_CADOUT#13 7
HT_CADOUT14 7
HT_CADOUT#14 7
HT_CADOUT15 7
HT_CADOUT#15 7
HT_CLKOUT0 7
HT_CLKOUT#0 7
HT_CLKOUT1 7
HT_CLKOUT#1 7
HT_CTLOUT0 7
HT_CTLOUT#0 7
HT_CTLOUT1 7
HT_CTLOUT#1 7
3
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
COMPUTER
S1G2 HT I/F
S1G2 HT I/F
S1G2 HT I/F
FX6 3A
FX6 3A
FX6 3A
of
of
of
37 0 Tuesday, May 20, 2008
37 0 Tuesday, May 20, 2008
37 0 Tuesday, May 20, 2008
1
A
B
C
D
E
Notes for the SODIMM locations:
VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWER
SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE
CPU_VTT_SUS_SENSE
should be routed as 10mils
4 4
KEEP TRACE TO RESISTORS LESS
THAN 1.0" FROM CPU PIN
+1.8V_SUS
3 3
2 2
1 1
and 10mils spacing from any
adjacent signals in X, Y, Z
directions.
U30B
U30B
D10
C235
C235
0.1U
0.1U
C240
C240
0.1U
0.1U
AD10
AF10
AE10
AA16
10
10
X7R
X7R
10
10
X7R
X7R
C10
B10
H16
T19
V22
U21
V19
T20
U19
U20
V20
J22
J20
N19
N20
E16
F16
Y16
P19
P20
N21
M20
N22
M19
M22
L20
M24
L21
L19
K22
R21
L22
K20
V24
K24
K19
R20
R23
J21
R19
T22
T24
VTT1
VTT2
VTT3
VTT4
MEMZP
MEMZN
RSVD_M1
MA0_ODT0
MA0_ODT1
MA1_ODT0
MA1_ODT1
MA0_CS_L0
MA0_CS_L1
MA1_CS_L0
MA1_CS_L1
MA_CKE0
MA_CKE1
MA_CLK_H5
MA_CLK_L5
MA_CLK_H1
MA_CLK_L1
MA_CLK_H7
MA_CLK_L7
MA_CLK_H4
MA_CLK_L4
MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8
MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15
MA_BANK0
MA_BANK1
MA_BANK2
MA_RAS_L
MA_CAS_L
MA_WE_L
MEM:CMD/CTRL/CLK
MEM:CMD/CTRL/CLK
FOX_PZ6382A-284S-41F
FOX_PZ6382A-284S-41F
+0.9V_CPU_M_VREF_SUS
C290
C290
1000P
1000P
50
50
X7R
X7R
39.2/F
39.2/F
R518
R518
M_ZP
M_ZN
39.2/F
39.2/F
R513
R513
DDR_CS0_DIMMA# 16,17
DDR_CS1_DIMMA# 16,17
DDR_CKE0_DIMMA 16,17
DDR_CKE1_DIMMA 16,17
M_CLK_DDR0 16
M_CLK_DDR#0 16
M_CLK_DDR1 16
M_CLK_DDR#1 16
DDR_A_MA[0..15] 16,17 DDR_B_MA[0..15] 16,17
DDR_A_BS0 16,17
DDR_A_BS1 16,17
DDR_A_BS2 16,17
DDR_A_RAS# 16,17
DDR_A_CAS# 16,17
DDR_A_WE# 16,17
T49T49
M_ODT0 16,17
M_ODT1 16,17
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
+1.8V_SUS
R151
R151
1K/F
1K/F
0603
0603
R192
R192
1K/F
1K/F
0603
0603
PLACE CLOSE TO CPU
sensing point for
op-amp feedback
routed near CPU
A
Place Capacitors for +0.9V_CPU_M_VREF_SUS < 1" from the RS780.
+0.9V_CPU_M_VREF_SUS trace length < 6", trace width > 15mils and
20mils spacing from any adjacent signals in X, Y, Z directions.
+0.9V_DDR_VTT +0.9V_DDR_VTT
W10
VTT5
VTT6
VTT7
VTT8
VTT9
VTT_SENSE
MEMVREF
RSVD_M2
MB0_ODT0
MB0_ODT1
MB1_ODT0
MB0_CS_L0
MB0_CS_L1
MB1_CS_L0
MB_CKE0
MB_CKE1
MB_CLK_H5
MB_CLK_L5
MB_CLK_H1
MB_CLK_L1
MB_CLK_H7
MB_CLK_L7
MB_CLK_H4
MB_CLK_L4
MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15
MB_BANK0
MB_BANK1
MB_BANK2
MB_RAS_L
MB_CAS_L
MB_WE_L
AC10
AB10
AA10
A10
Y10
W17
B18
W26
W23
Y26
V26
W25
U22
J25
H26
P22
R22
A17
A18
AF18
AF17
R26
R25
P24
N24
P26
N23
N26
L23
N25
L24
M26
K26
T26
L26
L25
W24
J23
J24
R24
U26
J26
U25
U24
U23
B
1750mA
CPU_VTT_SUS_SENSE
+0.9V_CPU_M_VREF_SUS MEM_MA_RESET#
MEM_MB_RESET#
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15
C523
C523
*470P_NC
*470P_NC
50
50
X7R
X7R
T50T50
CPU_VTT_SUS_SENSE 49
M_ODT2 16,17
M_ODT3 16,17
DDR_CS0_DIMMB# 16,17
DDR_CS1_DIMMB# 16,17
DDR_CKE2_DIMMB 16,17
DDR_CKE3_DIMMB 16,17
M_CLK_DDR2 16
M_CLK_DDR#2 16
M_CLK_DDR3 16
M_CLK_DDR#3 16
DDR_B_BS0 16,17
DDR_B_BS1 16,17
DDR_B_BS2 16,17
DDR_B_RAS# 16,17
DDR_B_CAS# 16,17
DDR_B_WE# 16,17
DIMMA = CN5
DIMMB = CN6
Processor DDR2 Memory Interface
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
To SODIMM socket B (Near/TOP)
DDR_B_DM[0..7] 16 DDR_A_DM[0..7] 16
DDR_B_DQS[0..7] 16
DDR_B_DQS#[0..7] 16
C
DDR_B_D62
DDR_B_D63
DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7
DDR_B_DQS0
DDR_B_DQS#0
DDR_B_DQS1
DDR_B_DQS#1
DDR_B_DQS2
DDR_B_DQS#2
DDR_B_DQS3
DDR_B_DQS#3
DDR_B_DQS4
DDR_B_DQS#4
DDR_B_DQS5
DDR_B_DQS#5
DDR_B_DQS6
DDR_B_DQS#6
DDR_B_DQS7
DDR_B_DQS#7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
U30C
U30C
C11
MB_DATA0
A11
MB_DATA1
A14
MB_DATA2
B14
MB_DATA3
G11
MB_DATA4
E11
MB_DATA5
D12
MB_DATA6
A13
MB_DATA7
A15
MB_DATA8
A16
MB_DATA9
A19
MB_DATA10
A20
MB_DATA11
C14
MB_DATA12
D14
MB_DATA13
C18
MB_DATA14
D18
MB_DATA15
D20
MB_DATA16
A21
MB_DATA17
D24
MB_DATA18
C25
MB_DATA19
B20
MB_DATA20
C20
MB_DATA21
B24
MB_DATA22
C24
MB_DATA23
E23
MB_DATA24
E24
MB_DATA25
G25
MB_DATA26
G26
MB_DATA27
C26
MB_DATA28
D26
MB_DATA29
G23
MB_DATA30
G24
MB_DATA31
AA24
MB_DATA32
AA23
MB_DATA33
AD24
MB_DATA34
AE24
MB_DATA35
AA26
MB_DATA36
AA25
MB_DATA37
AD26
MB_DATA38
AE25
MB_DATA39
AC22
MB_DATA40
AD22
MB_DATA41
AE20
MB_DATA42
AF20
MB_DATA43
AF24
MB_DATA44
AF23
MB_DATA45
AC20
MB_DATA46
AD20
MB_DATA47
AD18
MB_DATA48
AE18
MB_DATA49
AC14
MB_DATA50
AD14
MB_DATA51
AF19
MB_DATA52
AC18
MB_DATA53
AF16
MB_DATA54
AF15
MB_DATA55
AF13
MB_DATA56
AC12
MB_DATA57
AB11
MB_DATA58
Y11
MB_DATA59
AE14
MB_DATA60
AF14
MB_DATA61
AF11
MB_DATA62
AD11
MB_DATA63
A12
MB_DM0
B16
MB_DM1
A22
MB_DM2
E25
MB_DM3
AB26
MB_DM4
AE22
MB_DM5
AC16
MB_DM6
AD12
MB_DM7
C12
MB_DQS_H0
B12
MB_DQS_L0
D16
MB_DQS_H1
C16
MB_DQS_L1
A24
MB_DQS_H2
A23
MB_DQS_L2
F26
MB_DQS_H3
E26
MB_DQS_L3
AC25
MB_DQS_H4
AC26
MB_DQS_L4
AF21
MB_DQS_H5
AF22
MB_DQS_L5
AE16
MB_DQS_H6
AD16
MB_DQS_L6
AF12
MB_DQS_H7
AE12
MB_DQS_L7
FOX_PZ6382A-284S-41F
FOX_PZ6382A-284S-41F
MEM:DATA
MEM:DATA
Athlon 64 S1
Processor Socket
D
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7
G12
F12
H14
G14
H11
H12
C13
E13
H15
E15
E17
H17
E14
F14
C17
G17
G18
C19
D22
E20
E18
F18
B22
C23
F20
F22
H24
J19
E21
E22
H20
H22
Y24
AB24
AB22
AA21
W22
W21
Y22
AA22
Y20
AA20
AA18
AB18
AB21
AD21
AD19
Y18
AD17
W16
W14
Y14
Y17
AB17
AB15
AD15
AB13
AD13
Y12
W11
AB14
AA14
AB12
AA12
E12
C15
E19
F24
AC24
Y19
AB16
Y13
G13
H13
G16
G15
C22
C21
G22
G21
AD23
AC23
AB19
AB20
Y15
W15
W12
W13
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
DDR_A_DQS0
DDR_A_DQS#0
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DQS7
DDR_A_DQS#7
DDR_A_DQS[0..7] 16
DDR_A_DQS#[0..7] 16
Title
Title
Title
S1G2 DDRII MEMORY
S1G2 DDRII MEMORY
S1G2 DDRII MEMORY
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
FX6 3A
FX6 3A
FX6 3A
Date: Sheet
Date: Sheet
Date: Sheet
DDR_A_D[0..63] 16 DDR_B_D[0..63] 16
To SODIMM socket A (Far/Bottom)
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
E
of
of
of
47 0 Tuesday, May 20, 2008
47 0 Tuesday, May 20, 2008
47 0 Tuesday, May 20, 2008
5
+3.3V_RUN
R117
R107 0 R107 0
+5V_ALW2
3
2
1
LDT_RST#
+1.8V_SUS
R484
R484
R492
R492
390
390
390
390
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
R117
*20K_NC
*20K_NC
R135
R135
10K
10K
Q29
Q29
FDV301N
FDV301N
R4941KR494
1K
CPU_SIC
CPU_SID
CPU_ALERT
2
1
Q25
Q25
*FDV301N_NC
*FDV301N_NC
R101 0 R101 0
CPU_PWRGD_SVID_REG
3
Q31
Q31
FDV301N
FDV301N
2
1
R116
R116
*34.8K_NC
*34.8K_NC
3
R131 *0_NC R131 *0_NC
+1.8V_RUN
R103
R103
300
300
CPU_LDT_REQ#_R
D D
+1.8V_RUN
R132
R132
300
300
+1.8V_RUN
+1.8V_RUN
SCLK3
SDATA3
C947
C947
*0.1U_NC
*0.1U_NC
16
16
X7R
X7R
R149
R149
300
300
R143
R143
300
300
R481 *0_NC R481 *0_NC
R487 *0_NC R487 *0_NC
50
50
X7R
X7R
50
50
X7R
X7R
CPU_PWRGD
D4
D4
*RB500V-40_NC
*RB500V-40_NC
LDT_STOP#
D9
RB500V-40D9RB500V-40
D6
RB500V-40D6RB500V-40
R502
R502
169/F
169/F
CPU_PWRGD 12
LDT_STOP# 9,12
C C
LDT_RST# 9,12
SB_PWRGD 13,45
B B
CPU_CLK 25
CPU_CLK# 25
1.KEEP TRACE TO RESISTOR LESS THAN 600MILS FROM CPU
PIN AND TRACE TO AC CAPS LESS THAN 1.2".
2.CPUCLK and CPUCLK# mismatch < 35 mils.
SCLK3 13
SDATA3 13
+1.8V_SUS
(20)
R142 0 R142 0
C681 3900P
C681 3900P
C679 3900P
C679 3900P
4
C176
C176
*0.1U_NC
*0.1U_NC
10
10
X7R
X7R
CPU_LDT_REQ# 9
CPU_PWRGD_SVID_REG 53
CPU_PWRGD_SVID_REG CPU_PWRGD
L23 is filtered with a 30-300 nH
ferrite bead. and a current rating
of at least 3000mA.
L24
L24
BLM18PG330SN1B
BLM18PG330SN1B
0603
0603
C116
C116
100U
100U
6.3
6.3
Polymer
Polymer
3528
3528
+2.5V_CPU_VDDA_RUN
+2.5V_RUN
+
+
Place R151 and R152 < 1.5".
Route CPU_HTREF1/0 with 5mils trace
width and 10mils spacing from other
signals in X, Y, Z directions
CPU_VDD0_RUN_FB_H 53
CPU_VDD0_RUN_FB_L 53
CPU_VDD1_RUN_FB_H 53
CPU_VDD1_RUN_FB_L 53
3
CPU_THERMTRIP#
+2.5V_CPU_VDDA_RUN
LAYOUT: ROUTE VDDA TRACE APPROX.
50 mils WIDE (USE 2x25 mil TRACES TO
EXIT BALL FIELD) AND 500 mils LONG.
This trace should be kept at least 20 mils away from all other signals.
C120
C120
4.7U
4.7U
10
10
X7R
X7R
0805
0805
+2.5V_CPU_VDDA_RUN
C125
C125
0.22U
0.22U
10
10
X7R
X7R
0603
0603
+1.2V_RUN
T48T48
T47T47
T27T27
T26T26
C124
C124
3300P
3300P
50
50
X7R
X7R
R92 44.2/F R92 44.2/F
R94 44.2/F R94 44.2/F
CPU_VDD0_RUN_FB_H
CPU_VDD0_RUN_FB_L
CPU_VDD1_RUN_FB_H
CPU_VDD1_RUN_FB_L
T100T100
T97T97
T101T101
T102T102
CPU_TEST23_TSTUPD
CPU_TEST18_PLLTEST1
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST21_SCANEN
CPU_TEST20_SCANCLK2
CPU_TEST24_SCANCLK1
CPU_TEST22_SCANSHIFTEN
CPU_TEST12_SCANSHIFTENB
CPU_TEST27_SINGLECHAIN
CPU_TEST9_ANALOGIN
R4710R471
0
T46T46
T44T44
T38T38
T36T36
T33T33
T35T35
T40T40
T95T95
+3.3V_RUN
R7761MR776
1M
3
Q106
Q106
FDV301N
FDV301N
2
1
40mA
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
LDT_RST#
CPU_PWRGD
LDT_STOP#
CPU_LDT_REQ#_R
CPU_SIC
CPU_SID
CPU_ALERT
CPU_HTREF0
CPU_HTREF1
CPU_VDD0_RUN_FB_H
CPU_VDD0_RUN_FB_L
CPU_VDD1_RUN_FB_H
CPU_VDD1_RUN_FB_L
CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI
3 1
Q105
Q105
2
2N7002W-7-F
2N7002W-7-F
C964
C964
0.1U
0.1U
10
10
X7R
X7R
SVC SVD
0 1.1V
0 1.0V
1 0.9V
1
F8
F9
A9
A8
B7
A7
F10
C6
AF4
AF5
AE6
R6
P6
F6
E6
Y6
AB6
G10
AA9
AC9
AD9
AF9
AD7
H10
G9
E9
E8
AB8
AF7
AE7
AE8
AC8
AF8
C2
AA6
A3
A5
B3
B5
C1
2
H_THERMTRIP# 52
2-Bit Boot VID Codes
Voltage Output
(CPU Power)
0
1
0
1
0.8V
U30D
U30D
VDDA1
VDDA2
CLKIN_H
CLKIN_L
RESET_L
PWROK
LDTSTOP_L
LDTREQ_L
SIC
SID
ALERT_L
HT_REF0
HT_REF1
VDD0_FB_H
VDD0_FB_L
VDD1_FB_H
VDD1_FB_L
DBRDY
TMS
TCK
TRST_L
TDI
TEST23
TEST18
TEST19
TEST25_H
TEST25_L
TEST21
TEST20
TEST24
TEST22
TEST12
TEST27
TEST9
TEST6
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
KEY1
KEY2
SVC
SVD
THERMTRIP_L
PROCHOT_L
MEMHOT_L
THERMDC
THERMDA
VDDIO_FB_H
VDDIO_FB_L
VDDNB_FB_H
VDDNB_FB_L
DBREQ_L
TDO
TEST28_H
TEST28_L
TEST17
TEST16
TEST15
TEST14
TEST7
TEST10
TEST8
TEST29_H
TEST29_L
RSVD10
RSVD9
RSVD8
RSVD7
RSVD6
FOX_PZ6382A-284S-41F
FOX_PZ6382A-284S-41F
CPU_MEMHOT#_L
CPU_THERMTRIP#_1.8V CPU_THERMTRIP#
CPU_PROCHOT#
+1.8V_SUS
M11
W18
CPU_SVC_R
A6
CPU_SVD_R
A4
AF6
AC7
AA8
W7
W8
W9
Y9
H6
G6
E10
AE9
J7
H8
D7
E7
F7
C7
C3
K8
C4
C9
C8
H18
H19
AA7
D5
C5
R122 0 R122 0
R97 0 R97 0
CPU_THERMTRIP#_1.8V
CPU_PROCHOT#
CPU_MEMHOT#_L
H_THERMDC
H_THERMDA
Place C212< 100mils from CPU.
CPU_DBREQ#
CPU_TDO
CPU_TEST28_H_PLLCHRZ_P
CPU_TEST28_L_PLLCHRZ_N
CPU_TEST17_BP3 CPU_TEST19_PLLTEST0
CPU_TEST16_BP2
CPU_TEST15_BP1
CPU_TEST14_BP0
CPU_TEST29_H_FBCLKOUT_P
CPU_TEST29_L_FBCLKOUT_N
R799 0 R799 0
(16)
R503
R503
R93
R93
300
300
300
300
C185
C185
*220P/50V_NC
*220P/50V_NC
CPU_TEST23_TSTUPD
CPU_TEST21_SCANEN
CPU_TEST24_SCANCLK1
+1.8V_SUS
R87
R87
10K
10K
Q22
Q22
2
MMBT3904
MMBT3904
+1.8V_SUS
R493
R493
10K
10K
Q81
Q81
2
MMBT3904
MMBT3904
1 3
2N7002W-7-F
2N7002W-7-F
R86
R86
300
300
T19T19
T29T29
T24T24
T23T23
T30T30
T25T25
T34T34
T28T28
1 3
Q110
Q110
+3.3V_RUN
R1211KR121
1K
R90
R90
*680_NC
*680_NC
3 1
R991KR99
1K
1
CPU_MEMHOT# 16
CPU_THERMTRIP# 13
2
BID1 42
CPU_SVC 53
CPU_SVD 53
CPU_PROCHOT# 12
H_THERMDC 29
H_THERMDA 29
CPU_VDDIO_SUS_FB_H 49
CPU_VDDIO_SUS_FB_L 49
CPU_VDDNB_RUN_FB_H 53
CPU_VDDNB_RUN_FB_L 53
(18)
R791 *300_NC R791 *300_NC
R777 300 R777 300
R778 300 R778 300
HDT CONNECTOR
CN1
CN1
R177 *220_NC R177 *220_NC
R171 *220_NC R171 *220_NC
R179 *220_NC R179 *220_NC
R175 *220_NC R175 *220_NC
R164 300 R164 300
CPU_DBREQ#
CPU_DBRDY
A A
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO
+1.8V_SUS
GND1GND
Resreved13GND
Resreved25GND
DBREQ_L7GND
DBRDY9GND
11
TCK
13
TMS
15
TDI
TRST_L17GND
19
TDO
VDDIO121GND
VDDIO223RESET_L
GND
GND
GND
GND
GND
*HDT conn_NC
*HDT conn_NC
2
4
6
8
10
12
*4.7K_NC
*4.7K_NC
14
16
18
20
22
24
25
*100K_NC
*100K_NC
NOTE:HDT TERMINATION IS REQUIRED FOR REV.Ax SILICON ONLY.
5
R145
R145
R146
R146
+1.8V_RUN +3.3V_RUN
2
R147 0 R147 0
R148
R148
*4.7K_NC
*4.7K_NC
Q34
Q34
*MMBT3904_NC
*MMBT3904_NC
1 3
LDT_RST# CPU_RESET#
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
4
3
2
Date: Sheet
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
S1G2 CTRL & DEBUG
S1G2 CTRL & DEBUG
S1G2 CTRL & DEBUG
FX6 3A
FX6 3A
FX6 3A
1
57 0 Tuesday, May 20, 2008
57 0 Tuesday, May 20, 2008
57 0 Tuesday, May 20, 2008
of
of
of
5
4
3
2
1
PROCESSOR POWER AND GROUND
U30F
U30E
+CPU_VDD0_RUN +CPU_VDD1_RUN
D D
+CPU_VDDNB_RUN
C C
B B
+1.8V_SUS
U30E
G4
VDD0_1
H2
VDD0_2
J9
VDD0_3
J11
VDD0_4
J13
VDD0_5
J15
VDD0_6
K6
VDD0_7
K10
VDD0_8
K12
VDD0_9
K14
VDD0_10
L4
VDD0_11
L7
VDD0_12
L9
VDD0_13
L11
VDD0_14
L13
VDD0_15
L15
VDD0_16
M2
VDD0_17
M6
VDD0_18
M8
VDD0_19
M10
VDD0_20
N7
VDD0_21
N9
VDD0_22
N11
VDD0_23
K16
VDDNB_1
M16
VDDNB_2
P16
VDDNB_3
T16
VDDNB_4
V16
VDDNB_5
H25
VDDIO1
J17
VDDIO2
K18
VDDIO3
K21
VDDIO4
K23
VDDIO5
K25
VDDIO6
L17
VDDIO7
M18
VDDIO8
M21
VDDIO9
M23
VDDIO10
M25
VDDIO11
N17
VDDIO12
FOX_PZ6382A-284S-41F
FOX_PZ6382A-284S-41F
A1
P8
VDD1_1
P10
VDD1_2
R4
VDD1_3
R7
VDD1_4
R9
VDD1_5
R11
VDD1_6
T2
VDD1_7
T6
VDD1_8
T8
VDD1_9
T10
VDD1_10
T12
VDD1_11
T14
VDD1_12
U7
VDD1_13
U9
VDD1_14
U11
VDD1_15
U13
VDD1_16
U15
VDD1_17
V6
VDD1_18
V8
VDD1_19
V10
VDD1_20
V12
VDD1_21
V14
VDD1_22
W4
VDD1_23
Y2
VDD1_24
AC4
VDD1_25
AD2
VDD1_26
Y25
VDDIO27
V25
VDDIO26
V23
VDDIO25
V21
VDDIO24
V18
VDDIO23
U17
VDDIO22
T25
VDDIO21
T23
VDDIO20
T21
VDDIO19
T18
VDDIO18
R17
VDDIO17
P25
VDDIO16
P23
VDDIO15
P21
VDDIO14
P18
VDDIO13
Athlon 64 S1
Processor Socket
+1.8V_SUS
A26
S1g2
uPGA638
A A
Top View
AF1
5
4
U30F
AA4
VSS1
AA11
VSS2
AA13
VSS3
AA15
VSS4
AA17
VSS5
AA19
VSS6
AB2
VSS7
AB7
VSS8
AB9
VSS9
AB23
VSS10
AB25
VSS11
AC11
VSS12
AC13
VSS13
AC15
VSS14
AC17
VSS15
AC19
VSS16
AC21
VSS17
AD6
VSS18
AD8
VSS19
AD25
VSS20
AE11
VSS21
AE13
VSS22
AE15
VSS23
AE17
VSS24
AE19
VSS25
AE21
VSS26
AE23
VSS27
B4
VSS28
B6
VSS29
B8
VSS30
B9
VSS31
B11
VSS32
B13
VSS33
B15
VSS34
B17
VSS35
B19
VSS36
B21
VSS37
B23
VSS38
B25
VSS39
D6
VSS40
D8
VSS41
D9
VSS42
D11
VSS43
D13
VSS44
D15
VSS45
D17
VSS46
D19
VSS47
D21
VSS48
D23
VSS49
D25
VSS50
E4
VSS51
F2
VSS52
F11
VSS53
F13
VSS54
F15
VSS55
F17
VSS56
F19
VSS57
F21
VSS58
F23
VSS59
F25
VSS60
H7
VSS61
H9
VSS62
H21
VSS63
H23
VSS64
J4
VSS65
FOX_PZ6382A-284S-41F
FOX_PZ6382A-284S-41F
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
Athlon 64 S1
Processor Socket
J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
AC6
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6
BOTTOMSIDE DECOUPLING
+CPU_VDD0_RUN
C202
C191
C191
22U
22U
4
4
X6S
X6S
0805
0805
+CPU_VDD1_RUN
C190
C190
22U
22U
4
4
X6S
X6S
0805
0805
+1.8V_SUS
C309
C309
22U
22U
4
4
X6S
X6S
0805
0805
C202
22U
22U
4
4
X6S
X6S
0805
0805
C207
C207
22U
22U
4
4
X6S
X6S
0805
0805
C233
C233
22U
22U
4
4
X6S
X6S
0805
0805
C213
C213
22U
22U
4
4
X6S
X6S
0805
0805
C214
C214
22U
22U
4
4
X6S
X6S
0805
0805
C225
C225
0.22U
0.22U
10
10
X7R
X7R
0603
0603
C218
C218
22U
22U
4
4
X6S
X6S
0805
0805
C220
C220
22U
22U
4
4
X6S
X6S
0805
0805
C236
C236
0.22U
0.22U
10
10
X7R
X7R
0603
0603
C219
C219
0.22U
0.22U
10
10
X7R
X7R
0603
0603
C184
C184
0.22U
0.22U
10
10
X7R
X7R
0603
0603
C238
C238
180P
180P
50
50
NPO
NPO
C212
C212
0.01U
0.01U
16
16
X7R
X7R
C195
C195
0.01U
0.01U
16
16
X7R
X7R
C234
C234
180P
180P
50
50
NPO
NPO
DECOUPLING BETWEEN PROCESSOR AND DIMMs
PLACE CLOSE TO PROCESSOR AS POSSIBLE
+1.8V_SUS
C293
C293
4.7U
4.7U
10
10
X7R
X7R
0805
0805
+1.8V_SUS
C227
C227
0.01U
0.01U
16
16
X7R
X7R
+0.9V_DDR_VTT
C179
C179
4.7U
4.7U
10
10
X7R
X7R
0805
0805
+0.9V_DDR_VTT
C701
C701
1000P
1000P
50
50
X7R
X7R
3
C778
C778
4.7U
4.7U
10
10
X7R
X7R
0805
0805
C323
C323
0.01U
0.01U
16
16
X7R
X7R
C694
C694
4.7U
4.7U
10
10
X7R
X7R
0805
0805
C704
C704
1000P
1000P
50
50
X7R
X7R
C292
C292
4.7U
4.7U
10
10
X7R
X7R
0805
0805
C306
C306
180P
180P
50
50
NPO
NPO
C683
C683
4.7U
4.7U
10
10
X7R
X7R
0805
0805
C196
C196
1000P
1000P
50
50
X7R
X7R
C777
C777
4.7U
4.7U
10
10
X7R
X7R
0805
0805
C322,and C237 to be evenly spaced along
the VDDIO/VSS plane split
C322
C322
180P
180P
50
50
NPO
NPO
C161
C161
4.7U
4.7U
10
10
X7R
X7R
0805
0805
C187
C187
1000P
1000P
50
50
X7R
X7R
C284
C284
0.22U
0.22U
10
10
0603
0603
X7R
X7R
C237
C237
180P
180P
50
50
NPO
NPO
C685
C685
0.22U
0.22U
10
10
0603
0603
X7R
X7R
C204
C204
180P
180P
50
50
NPO
NPO
2
C768
C768
0.22U
0.22U
10
10
0603
0603
X7R
X7R
C684
C684
0.22U
0.22U
10
10
0603
0603
X7R
X7R
C245
C245
180P
180P
50
50
NPO
NPO
C194
C194
180P
180P
50
50
NPO
NPO
C203
C203
180P
180P
50
50
NPO
NPO
+CPU_VDDNB_RUN
C223
C217
C217
22U
22U
4
4
X6S
X6S
0805
0805
C285
C285
0.22U
0.22U
10
10
0603
0603
X7R
X7R
C691
C691
0.22U
0.22U
10
10
0603
0603
X7R
X7R
C686
C686
180P
180P
50
50
NPO
NPO
Title
Title
Title
S1G2 PWR & GND
S1G2 PWR & GND
S1G2 PWR & GND
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
FX6 3A
FX6 3A
FX6 3A
Date: Sheet
Date: Sheet
Date: Sheet
C223
22U
22U
4
4
X6S
X6S
0805
0805
C767
C767
0.22U
0.22U
10
10
0603
0603
X7R
X7R
C692
C692
0.22U
0.22U
10
10
0603
0603
X7R
X7R
C689
C689
180P
180P
50
50
NPO
NPO
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
C224
C224
22U
22U
4
4
X6S
X6S
0805
0805
1
of
of
of
67 0 Tuesday, May 20, 2008
67 0 Tuesday, May 20, 2008
67 0 Tuesday, May 20, 2008
5
D D
HT_CADOUT0 3
HT_CADOUT#0 3
HT_CADOUT1 3
HT_CADOUT#1 3
HT_CADOUT2 3
HT_CADOUT#2 3
HT_CADOUT3 3
HT_CADOUT#3 3
HT_CADOUT4 3
HT_CADOUT#4 3
HT_CADOUT5 3
HT_CADOUT#5 3
HT_CADOUT6 3
HT_CADOUT#6 3
HT_CADOUT7 3
C C
B B
HT_CADOUT#7 3
HT_CADOUT8 3
HT_CADOUT#8 3
HT_CADOUT9 3
HT_CADOUT#9 3
HT_CADOUT10 3
HT_CADOUT#10 3
HT_CADOUT11 3
HT_CADOUT#11 3
HT_CADOUT12 3
HT_CADOUT#12 3
HT_CADOUT13 3
HT_CADOUT#13 3
HT_CADOUT14 3
HT_CADOUT#14 3
HT_CADOUT15 3
HT_CADOUT#15 3
HT_CLKOUT0 3
HT_CLKOUT#0 3
HT_CLKOUT1 3
HT_CLKOUT#1 3
HT_CTLOUT0 3
HT_CTLOUT#0 3
HT_CTLOUT1 3
HT_CTLOUT#1 3
4
R438 300/F R438 300/F
Y25
Y24
V22
V23
V25
V24
U24
U25
T25
T24
P22
P23
P25
P24
N24
N25
AC24
AC25
AB25
AB24
AA24
AA25
Y22
Y23
W21
W20
V21
V20
U20
U21
U19
U18
T22
T23
AB23
AA22
M22
M23
R21
R20
C23
A24
U22A
U22A
HT_RXCAD0P
HT_RXCAD0N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD7P
HT_RXCAD7N
HT_RXCAD8P
HT_RXCAD8N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD15P
HT_RXCAD15N
HT_RXCLK0P
HT_RXCLK0N
HT_RXCLK1P
HT_RXCLK1N
HT_RXCTL0P
HT_RXCTL0N
HT_RXCTL1P
HT_RXCTL1N
HT_RXCALP
HT_RXCALN
RS780M A13
RS780M A13
3
PART 1 OF 6
PART 1 OF 6
HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N
HYPER TRANSPORT CPU I/F
HYPER TRANSPORT CPU I/F
HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N
HT_TXCALP
HT_TXCALN
D24
D25
E24
E25
F24
F25
F23
F22
H23
H22
J25
J24
K24
K25
K23
K22
F21
G21
G20
H21
J20
J21
J18
K17
L19
J19
M19
L18
M21
P21
P18
M18
H24
H25
L21
L20
M24
M25
P19
R18
B24
B25
R440 300/F R440 300/F
Rev.A13
HT_CADIN0 3
HT_CADIN#0 3
HT_CADIN1 3
HT_CADIN#1 3
HT_CADIN2 3
HT_CADIN#2 3
HT_CADIN3 3
HT_CADIN#3 3
HT_CADIN4 3
HT_CADIN#4 3
HT_CADIN5 3
HT_CADIN#5 3
HT_CADIN6 3
HT_CADIN#6 3
HT_CADIN7 3
HT_CADIN#7 3
HT_CADIN8 3
HT_CADIN#8 3
HT_CADIN9 3
HT_CADIN#9 3
HT_CADIN10 3
HT_CADIN#10 3
HT_CADIN11 3
HT_CADIN#11 3
HT_CADIN12 3
HT_CADIN#12 3
HT_CADIN13 3
HT_CADIN#13 3
HT_CADIN14 3
HT_CADIN#14 3
HT_CADIN15 3
HT_CADIN#15 3
HT_CLKIN0 3
HT_CLKIN#0 3
HT_CLKIN1 3
HT_CLKIN#1 3
HT_CTLIN0 3
HT_CTLIN#0 3
HT_CTLIN1 3
HT_CTLIN#1 3
2
1
R438,R440
RS780
301
RX780 1.21K
A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
RS780-HT LINK I/F
RS780-HT LINK I/F
RS780-HT LINK I/F
FX6 3A
FX6 3A
FX6 3A
of
of
of
77 0 Tuesday, May 20, 2008
77 0 Tuesday, May 20, 2008
77 0 Tuesday, May 20, 2008
1
5
D D
4
3
2
1
U22B
AE3
AD4
AE2
AD3
AD1
AD2
AA8
AA7
AA5
AA6
D4
C4
A3
B3
C2
C1
E5
F5
G5
G6
H5
H6
J6
J5
J7
J8
L5
L6
M8
L8
P7
M7
P5
M5
R8
P8
R6
R5
P4
P3
T4
T3
V5
W6
U5
U6
U8
U7
Y8
Y7
W5
Y5
U22B
GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N
GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
GPP_RX4P
GPP_RX4N
GPP_RX5P
GPP_RX5N
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
RS780M A13
RS780M A13
PART 2 OF 6
PART 2 OF 6
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
PCIE I/F GFX
PCIE I/F GFX
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
PCE_CALRP(PCE_BCALRP)
PCE_CALRN(PCE_BCALRN)
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
PCIE_MTX_GRX_P0
A5
PCIE_MTX_GRX_N0
B5
PCIE_MTX_GRX_P1
A4
PCIE_MTX_GRX_N1
B4
PCIE_MTX_GRX_P2
C3
PCIE_MTX_GRX_N2
B2
PCIE_MTX_GRX_P3
D1
PCIE_MTX_GRX_N3
D2
PCIE_MTX_GRX_P4
E2
PCIE_MTX_GRX_N4
E1
PCIE_MTX_GRX_P5
F4
PCIE_MTX_GRX_N5
F3
PCIE_MTX_GRX_P6
F1
PCIE_MTX_GRX_N6
F2
PCIE_MTX_GRX_P7
H4
PCIE_MTX_GRX_N7
H3
PCIE_MTX_GRX_P8
H1
PCIE_MTX_GRX_N8
H2
PCIE_MTX_GRX_P9
J2
PCIE_MTX_GRX_N9
J1
PCIE_MTX_GRX_P10
K4
PCIE_MTX_GRX_N10
K3
PCIE_MTX_GRX_P11
K1
PCIE_MTX_GRX_N11
K2
PCIE_MTX_GRX_P12
M4
PCIE_MTX_GRX_N12
M3
PCIE_MTX_GRX_P13
M1
PCIE_MTX_GRX_N13
M2
PCIE_MTX_GRX_P14
N2
PCIE_MTX_GRX_N14
N1
PCIE_MTX_GRX_P15
P1
PCIE_MTX_GRX_N15
P2
AC1
AC2
PCIE_TXP1_C
AB4
PCIE_TXN1_C
AB3
PCIE_TXP2_C
AA2
PCIE_TXN2_C
AA1
GLAN_TXP_C
Y1
GLAN_TXN_C
Y2
PCIE_TXP4_C
Y4
PCIE_TXN4_C
Y3
PCIE_TXP5_C
V1
PCIE_TXN5_C
V2
ALINK_NBTX_SBRX_P0
AD7
ALINK_NBTX_SBRX_N0
AE7
ALINK_NBTX_SBRX_P1
AE6
ALINK_NBTX_SBRX_N1
AD6
ALINK_NBTX_SBRX_P2
AB6
ALINK_NBTX_SBRX_N2
AC6
ALINK_NBTX_SBRX_P3
AD5
ALINK_NBTX_SBRX_N3
AE5
PCE_PCAL
AC8
PCE_NCAL
AB8
PCIE_MRX_GTX_P[0..15] 18 PCIE_MTX_C_GRX_P[0..15] 18
PCIE_MRX_GTX_N[0..15] 18
C C
WLAN <---- WPAN <----- ----->WPAN
B B
GIGA LAN <-----
WWAN <----- ----->WWAN
PCIE_RX1+ 39
PCIE_RX1- 39
PCIE_RX2+ 39
PCIE_RX2- 39
PCIE_RX3-/GLAN_RX- 33
PCIE_RX4+ 37
PCIE_RX4- 37
PCIE_RX5+ 40
PCIE_RX5- 40
ALINK_NBRX_SBTX_P0 12
ALINK_NBRX_SBTX_N0 12
ALINK_NBRX_SBTX_P1 12
ALINK_NBRX_SBTX_N1 12
ALINK_NBRX_SBTX_P2 12
ALINK_NBRX_SBTX_N2 12
ALINK_NBRX_SBTX_P3 12
ALINK_NBRX_SBTX_N3 12
PCIE_MRX_GTX_P0
PCIE_MRX_GTX_N0
PCIE_MRX_GTX_P1
PCIE_MRX_GTX_N1
PCIE_MRX_GTX_P2
PCIE_MRX_GTX_N2
PCIE_MRX_GTX_P3
PCIE_MRX_GTX_N3
PCIE_MRX_GTX_P4
PCIE_MRX_GTX_N4
PCIE_MRX_GTX_P5
PCIE_MRX_GTX_N5
PCIE_MRX_GTX_P6
PCIE_MRX_GTX_N6
PCIE_MRX_GTX_P7
PCIE_MRX_GTX_N7
PCIE_MRX_GTX_P8
PCIE_MRX_GTX_N8
PCIE_MRX_GTX_P9
PCIE_MRX_GTX_N9
PCIE_MRX_GTX_P10
PCIE_MRX_GTX_N10
PCIE_MRX_GTX_P11
PCIE_MRX_GTX_N11
PCIE_MRX_GTX_P12
PCIE_MRX_GTX_N12
PCIE_MRX_GTX_P13
PCIE_MRX_GTX_N13
PCIE_MRX_GTX_P14
PCIE_MRX_GTX_N14
PCIE_MRX_GTX_P15
PCIE_MRX_GTX_N15
Place near RS780
C581 0.1U/10V C581 0.1U/10V
C583 0.1U/10V C583 0.1U/10V
C575 0.1U/10V C575 0.1U/10V
C578 0.1U/10V C578 0.1U/10V
C572 0.1U/10V C572 0.1U/10V
C573 0.1U/10V C573 0.1U/10V
C535 0.1U/10V C535 0.1U/10V
C534 0.1U/10V C534 0.1U/10V
C550 0.1U/10V C550 0.1U/10V
C556 0.1U/10V C556 0.1U/10V
C555 0.1U/10V C555 0.1U/10V
C557 0.1U/10V C557 0.1U/10V
C544 0.1U/10V C544 0.1U/10V
C543 0.1U/10V C543 0.1U/10V
C536 0.1U/10V C536 0.1U/10V
C545 0.1U/10V C545 0.1U/10V
C551 0.1U/10V C551 0.1U/10V
C552 0.1U/10V C552 0.1U/10V
C538 0.1U/10V C538 0.1U/10V
C537 0.1U/10V C537 0.1U/10V
C547 0.1U/10V C547 0.1U/10V
C539 0.1U/10V C539 0.1U/10V
C554 0.1U/10V C554 0.1U/10V
C553 0.1U/10V C553 0.1U/10V
C559 0.1U/10V C559 0.1U/10V
C560 0.1U/10V C560 0.1U/10V
C540 0.1U/10V C540 0.1U/10V
C541 0.1U/10V C541 0.1U/10V
C563 0.1U/10V C563 0.1U/10V
C561 0.1U/10V C561 0.1U/10V
C546 0.1U/10V C546 0.1U/10V
C542 0.1U/10V C542 0.1U/10V
C19 .1U/10V C19 .1U/10V
C13 .1U/10V C13 .1U/10V
C571 .1U/10V C571 .1U/10V
C570 .1U/10V C570 .1U/10V
C567 .1U/10V C567 .1U/10V
C566 .1U/10V C566 .1U/10V
C569 .1U/10V C569 .1U/10V
C568 .1U/10V C568 .1U/10V
C564 .1U/10V C564 .1U/10V
C565 .1U/10V C565 .1U/10V
C584 .1U/10V C584 .1U/10V
C585 .1U/10V C585 .1U/10V
C582 .1U/10V C582 .1U/10V
C579 .1U/10V C579 .1U/10V
C15 .1U/10V C15 .1U/10V
C16 .1U/10V C16 .1U/10V
C574 .1U/10V C574 .1U/10V
C576 .1U/10V C576 .1U/10V
R40 1.27K/F R40 1.27K/F
R36 2K/F R36 2K/F
+NB_VDD_MUX
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15
PCIE_TX1+ 39
PCIE_TX1- 39
PCIE_TX2+ 39
PCIE_TX2- 39
PCIE_TX3+/GLAN_TX+ 33 PCIE_RX3+/GLAN_RX+ 33
PCIE_TX3-/GLAN_TX- 33
PCIE_TX4+ 37
PCIE_TX4- 37
PCIE_TX5+ 40
PCIE_TX5- 40
ALINK_NBTX_C_SBRX_P0 12
ALINK_NBTX_C_SBRX_N0 12
ALINK_NBTX_C_SBRX_P1 12
ALINK_NBTX_C_SBRX_N1 12
ALINK_NBTX_C_SBRX_P2 12
ALINK_NBTX_C_SBRX_N2 12
ALINK_NBTX_C_SBRX_P3 12
ALINK_NBTX_C_SBRX_N3 12
PCIE_MTX_C_GRX_N[0..15] 18
----->WLAN
----->GIGA LAN
----->EXPRESS CARD EXPRESS CARD <-----
A A
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
COMPUTER
RS780-PCIE I/F
RS780-PCIE I/F
RS780-PCIE I/F
FX6 3A
FX6 3A
FX6 3A
1
87 0 Tuesday, May 20, 2008
87 0 Tuesday, May 20, 2008
87 0 Tuesday, May 20, 2008
of
of
of
C21
C21
*10U/10V/0805_NC
*10U/10V/0805_NC
+1.8V_HTPLL
C86
C86
*10U/10V/0805_NC
*10U/10V/0805_NC
R39 0 R39 0
PLTRST# 12,14,18,37,39,45
LDT_RST# 5,12
5
R38 *4.7K_NC R38 *4.7K_NC
R37 *4.7K_NC R37 *4.7K_NC
+1.8V_RUN
L3
L3
BLM15AG221SN1D
BLM15AG221SN1D
+1.8V_RUN
L13
L13
BLM15AG221SN1D
BLM15AG221SN1D
D D
220 ohm @ 100MHz
LDT_STOP# 5,12
CPU_LDT_REQ# 5
C C
ALLOW_LDTSTOP 12
+3.3V_RUN
+1.8V_RUN
1
R757 0 R757 0
1
R758 0 R758 0
+NB_VDD_MUX
BLM15AG221SN1D
BLM15AG221SN1D
C20
C20
2.2U
2.2U
220 ohm @ 100MHz 220 ohm @ 100MHz
10
10
X5R
X5R
0603
0603
BLM15AG221SN1D
BLM15AG221SN1D
C84
C84
2.2U
2.2U
220 ohm @ 100MHz
10
10
X5R
X5R
0603
0603
Q68
Q68
*BSS138_NL_NC
*BSS138_NL_NC
2
3
Q15
Q15
*BSS138_NL_NC
*BSS138_NL_NC
2
3
DDC_CLK0/AUX0P
PE_GPIO2
R32 0 R32 0
R31 *0_NC R31 *0_NC
L63
L63
L8
L8
+VDDG_NB
R414
R414
*4.7K_NC
*4.7K_NC
NB_LDT_STOP#
+VDDG_NB +1.8V_RUN
R42
R42
*4.7K_NC
*4.7K_NC
NB_ALLOW_LDTSTOP
SYSRESET#
+PLLVDD
C591
C591
*10U/10V/0805_NC
*10U/10V/0805_NC
+PLLVDD18 +1.8V_RUN
C69
C69
*10U/10V/0805_NC
*10U/10V/0805_NC
STRAP_DEBUG_BUS_GPIO_ENABLEb
Enables the Test Debug Bus using GPIO.
RX780:NB_TV_C; RS740:RS740_DFT_GPIO5; RS780:VSYNC#
RS740/RS780 RX780
1 Disable Enable
0 Enable Disable
B B
+3.3V_RUN
R759 *3K_NC R759 *3K_NC
R418 *3K_NC R418 *3K_NC
R442 *3K_NC R442 *3K_NC
INT_VGAVSYNC
NB_TV_C
RS740/RS780: Enables Side port memory
RS740:RS740_DFT_GPIO0
RS780:HSYNC#
Selects if Memory SIDE PORT is available or not
1 = Memory Side port Not available
0 = Memory Side port available
Register Readback of strap: NB_CLKCFG:CLK_TOP_SPARE_D[1]
+3.3V_RUN
R419 *3K_NC R419 *3K_NC
R420 3K R420 3K
A A
DFT_GPIO1: LOAD_EEPROM_STRAPS
Selects Loading of STRAPS from EPROM
1 : Bypass the loading of EEPROM straps and use Hardware Default Values
0 : I2C Master can load strap values from EEPROM if connected, or use
default values if not connected
RS740/RX780: RS780_AUX_CAL RS780:SUS_STAT
PLTRST# 12,14,18,37,39,45
5
INT_VGAHSYNC
D2
D2
SUS_STAT#_R
2 1
*SDMK0340L-7-F_NC
*SDMK0340L-7-F_NC
4
150mA 135mA
100mA
+3.3V_RUN
C593
C593
2.2U
2.2U
10
10
X5R
X5R
0603
0603
+1.8V_RUN
C65
C65
2.2U
2.2U
10
10
220 ohm @ 100MHz
X5R
X5R
0603
0603
R46 0 R46 0
C42
C42
49.9/F
49.9/F
L5
L5
BK1608HS220-T
BK1608HS220-T
0603
0603
220 ohm @ 100MHz
L10
L10
BLM21PG221SN1D
BLM21PG221SN1D
0805
0805
+1.8V_RUN
NB_PWRGD 45
HT_REFCLK 25
HT_REFCLK# 25
CLK_NB_14M 25
CLK_NB_GFX 25
CLK_NB_GFX# 25
CLK_GPP_REFCLK 25
CLK_GPP_REFCLK# 25
CLK_NB_SBLINK 25
CLK_NB_SBLINK# 25
T130T130
STRP_DATA 51
CLK_NB_14M
AC Term closely
clock pin for
length: 50 mils
R786 *4.7K_NC R786 *4.7K_NC
NOTE: ACCESS TO STRAP_DATA and I2C_CLK PINS IS MANDATORY.
4
+3.3V_AVDD +VDDA18PCIEPLL
C40
C40
2.2U
2.2U
10
10
X5R
X5R
0603
0603
+1.8V_AVDDQ
C80
C80
2.2U
2.2U
10
10
X5R
X5R
0603
0603
+3.3V_AVDD
+1.8V_AVDD
+1.8V_AVDDQ
+PLLVDD
+PLLVDD18
+1.8V_HTPLL
+VDDA18PCIEPLL
R416 300 R416 300
R417 0 R417 0
RX780->Pop
SUS_STAT#_R
U1
U1
1
NC
2
A1
3
A2
4
VSS
*AT24C04N-10SU-2.7_NC
*AT24C04N-10SU-2.7_NC
+1.8V_RUN +1.8V_AVDD
C72
C72
2.2U
2.2U
10
10
X5R
X5R
0603
0603
100mA
NB_TV_C
INT_VGAHSYNC
INT_VGAVSYNC
R444 715/F R444 715/F
+PLLVDD
+PLLVDD18
+VDDA18PCIEPLL
R33 0 R33 0
NB_LDT_STOP#
NB_ALLOW_LDTSTOP
CLK_NB_14M
REFCLK_N
R28 *0_NC R28 *0_NC
R27 *0_NC R27 *0_NC
INT_LCD_DDCCLK
INT_LCD_DDCDAT
DDC_CLK0/AUX0P
PE_GPIO2
R18
R18
*10K_NC
*10K_NC
C8
C8
*0.1U_NC
*0.1U_NC
16
16
X7R
X7R
T6T6
T12T12
T4T4
T5T5
T7T7
T10T10
T90T90
T89T89
SYSRESET#
T85T85
T86T86
VCC
WP
SCL
SDA
R56
R56
0/0805
0/0805
8
7
6
5
3
+VDDG_NB
3
U22C
U22C
F12
AVDD1(NC)
E12
AVDD2(NC)
F14
AVDDDI(NC)
G15
AVSSDI(NC)
H15
AVDDQ(NC)
H14
AVSSQ(NC)
E17
C_Pr(DFT_GPIO5)
F17
Y(DFT_GPIO2)
F15
COMP_Pb(DFT_GPIO4)
G18
RED(DFT_GPIO0)
G17
REDb(NC)
E18
GREEN(DFT_GPIO1)
F18
GREENb(NC)
E19
BLUE(DFT_GPIO3)
F19
BLUEb(NC)
A11
DAC_HSYNC(PWM_GPIO4)
B11
DAC_VSYNC(PWM_GPIO6)
E8
DAC_SDA(PCE_TCALRN)
F8
DAC_SCL(PCE_RCALRN)
G14
DAC_RSET(PWM_GPIO1)
A12
PLLVDD(NC)
D14
PLLVDD18(NC)
B12
PLLVSS(NC)
H17
VDDA18HTPLL
D7
VDDA18PCIEPLL1
E7
VDDA18PCIEPLL2
D8
SYSRESETb
A10
POWERGOOD
C10
LDTSTOPb
C12
ALLOW_LDTSTOP
C25
HT_REFCLKP
C24
HT_REFCLKN
E11
REFCLK_P/OSCIN(OSCIN)
F11
REFCLK_N(PWM_GPIO3)
T2
GFX_REFCLKP
T1
GFX_REFCLKN
U1
GPP_REFCLKP
U2
GPP_REFCLKN
V4
GPPSB_REFCLKP(SB_REFCLKP)
V3
GPPSB_REFCLKN(SB_REFCLKN)
B9
I2C_CLK
A9
I2C_DATA
A8
DDC_CLK0/AUX0P(NC)
B8
DDC_DATA0/AUX0N(NC)
B7
DDC_CLK1/AUX1P(NC)
A7
DDC_DATA1/AUX1N(NC)
B10
STRP_DATA
G11
RSVD
C8
AUX_CAL(NC)
R35
R35
*150/F_NC
*150/F_NC
R14
R14
*2K_NC
*2K_NC
INT_LCD_DDCCLK
STRP_DATA
R112KR11
2K
C11
C11
R30
R30
*4.7K_NC
*4.7K_NC
*10P/50V_NC
*10P/50V_NC
PART 3 OF 6
PART 3 OF 6
TXOUT_L2N(DBG_GPIO0)
TXOUT_L3N(DBG_GPIO2)
TXOUT_U1P(PCIE_RESET_GPIO3)
TXOUT_U1N(PCIE_RESET_GPIO2)
TXOUT_U3P(PCIE_RESET_GPIO5)
CRT/TVOUT
CRT/TVOUT
TXCLK_UP(PCIE_RESET_GPIO4)
TXCLK_UN(PCIE_RESET_GPIO1)
LVTM
LVTM
PM
PM
LVDS_DIGON(PCE_TCALRP)
LVDS_BLON(PCE_RCALRP)
LVDS_ENA_BL(PWM_GPIO2)
CLOCKs PLL PWR
CLOCKs PLL PWR
MIS.
MIS.
+VDDG_NB
R34
R34
*4.7K_NC
*4.7K_NC
INT_LCD_DDCCLK
INT_LCD_DDCDAT
C14
C14
*10P/50V_NC
*10P/50V_NC
2
TXOUT_L0P(NC)
TXOUT_L0N(NC)
TXOUT_L1P(NC)
TXOUT_L1N(NC)
TXOUT_L2P(NC)
TXOUT_L3P(NC)
TXOUT_U0P(NC)
TXOUT_U0N(NC)
TXOUT_U2P(NC)
TXOUT_U2N(NC)
TXOUT_U3N(NC)
TXCLK_LP(DBG_GPIO1)
TXCLK_LN(DBG_GPIO3)
VDDLTP18(NC)
VSSLTP18(NC)
VDDLT18_1(NC)
VDDLT18_2(NC)
VDDLT33_1(NC)
VDDLT33_2(NC)
VSSLT1(VSS)
VSSLT2(VSS)
VSSLT3(VSS)
VSSLT4(VSS)
VSSLT5(VSS)
VSSLT6(VSS)
VSSLT7(VSS)
TMDS_HPD(NC)
HPD(NC)
TVCLKIN(PWM_GPIO5)
THERMALDIODE_P
THERMALDIODE_N
TESTMODE
RS780M A13
RS780M A13
+1.1V_RUN
2
A22
B22
A21
B21
B20
A20
A19
B19
B18
A18
A17
B17
D20
D21
D18
D19
B16
A16
D16
D17
A13
B13
A15
B15
A14
B14
C14
D15
C16
C18
C20
E20
C22
E9
F7
G12
D9
D10
D12
AE8
AD8
D13
+LPVDD_NB
+LVDDR18D
R47 0 R47 0
SUS_STAT#_R
R49
R49
1.8K/F
1.8K/F
T91T91
T8T8
T9T9
T11T11
T13T13
T15T15
T14T14
180mA
T2T2
NB_THERMDA
C590
C590
*220P_NC
*220P_NC
50
50
NB_THERMDC
Place C590 close to U22.
R51
R51
Only for RS780
4.7K
4.7K
REFCLK_N
R48 0 R48 0
R50
R50
4.7K
4.7K
1
RS740/RX780/RS780 POWER DIFFERENCE
TABLE
PIN NAME
AVDDDI
AVDDQ
PLLVDD19
VDDA18HTPLL +1.8V +1.8V
VDDLTP18
VDDLT18
VDDLT33
C597
C597
C598
C598
2.2U/10V
2.2U/10V
0.1U/10V
0.1U/10V
0603
0603
C62
C62
C63
C63
0.1U/10V
0.1U/10V
4.7U/6.3V
4.7U/6.3V
0603
0603
SUS_STAT# 13
T88T88
RX780/RS780 DEBUG PIN MAPPING
DEBUG_OUT0
T87T87
DEBUG_OUT1
DEBUG_OUT2
DEBUG_OUT3
DEBUG_OUT4
DEBUG_OUT5
DEBUG_OUT6
DEBUG_OUT7
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
COMPUTER
RS780-LVDS
RS780-LVDS
RS780-LVDS
FX6 3A
FX6 3A
FX6 3A
RX780 RS780
NC +3.3V AVDD
NC +1.8V
NC +1.8V
NC
+1.8V +1.8V VDDA18PCIEPLL
NC
NC NC
+VDDG_NB +3.3V_RUN
R29 0 R29 0
+1.8V_RUN
L64
L64
BLM15AG221SN1D
BLM15AG221SN1D
220 ohm @ 100MHz
+1.8V_RUN
L7
L7
BLM15AG221SN1D
BLM15AG221SN1D
220 ohm @ 100MHz
SUS_STAT#
RED(DFT_GPIO0)
GREEN(DFT_GPIO1)
Y(DFT_GPIO2)
BLUE(DFT_GPIO3)
TXOUT_L2N(DBG_GPIO0)
TXCLK_LP(DBG_GPIO1)
TXOUT_L3N(DBG_GPIO2)
TXCLK_LN(DBG_GPIO3)
COMB_Pb(DFT_GPIO4)
C_Pr(DFT_GPIO5)
1
+1.1V PLLVDD NC
+1.8V
+1.8V NC
+1.8V
+3.3V_RUN
R52
R52
4.7K
4.7K
C52
C52
RS780 RX780
LVDS_DIGON
LVDS_ENA_BL
LVDS_BLON
TMDS_HPD
AUX1N
AUX1P
HPD
AUX_CAL
X
X
97 0 Tuesday, May 20, 2008
97 0 Tuesday, May 20, 2008
97 0 Tuesday, May 20, 2008
of
of
of
*10P/50V_NC
*10P/50V_NC
5
4
3
2
1
RS740/RX780/RS780 POWER DIFFERENCE TABLE
PIN NAME
VDDHT
D11
E14
E15
J12
K14
VSS3G8VSS4
VSS27
Y18
VSS28
AB11
(21)
VSS5
VSS29
AB15
J15
VSS6
VSS30
AB17
VSS7
VSS31
AB19
M11
L15
U22F
U22F
RS780M A13
RS780M A13
VSS8
VSS9
VSS10
VSS32
VSS34
VSS33
K11
AE20
AB21
U22E
U22E
J17
VDDHT_1
K16
VDDHT_2
L16
VDDHT_3
M16
VDDHT_4
P16
VDDHT_5
R16
VDDHT_6
T16
VDDHT_7
H18
VDDHTRX_1
G19
VDDHTRX_2
F20
VDDHTRX_3
E21
VDDHTRX_4
D22
VDDHTRX_5
B23
VDDHTRX_6
A23
VDDHTRX_7
AE25
VDDHTTX_1
AD24
VDDHTTX_2
AC23
VDDHTTX_3
AB22
VDDHTTX_4
AA21
VDDHTTX_5
Y20
VDDHTTX_6
W19
VDDHTTX_7
V18
VDDHTTX_8
U17
VDDHTTX_9
T17
VDDHTTX_10
R17
VDDHTTX_11
P17
VDDHTTX_12
M17
VDDHTTX_13
J10
VDDA18PCIE_1
P10
VDDA18PCIE_2
K10
VDDA18PCIE_3
M10
VDDA18PCIE_4
L10
VDDA18PCIE_5
W9
VDDA18PCIE_6
H9
VDDA18PCIE_7
T10
VDDA18PCIE_8
R10
VDDA18PCIE_9
Y9
VDDA18PCIE_10
AA9
VDDA18PCIE_11
AB9
VDDA18PCIE_12
AD9
VDDA18PCIE_13
AE9
VDDA18PCIE_14
U10
VDDA18PCIE_15
F9
VDDG18_1(VDD18_1)
G9
VDDG18_2(VDD18_2)
AE11
VDD18_MEM1(NC)
AD11
VDD18_MEM2(NC)
RS780M A13
RS780M A13
PART 5/6
PART 5/6
J4
R7
L1
L2
L4
L7
M6
N4
P6
R1
R2
R4
V7
U4
V8
V6
W1
W2
W4
W7
W8
Y6
AA4
AB5
AB1
AB7
H7
D D
C C
220 ohm @ 100MHz, 2A
B B
+3.3V_RUN
1.2V_RUN_ON 42,45,46
A A
C87
C87
*2.2U_NC
*2.2U_NC
10
10
X5R
X5R
0603
0603
VSSAPCIE1A2VSSAPCIE2B1VSSAPCIE3D3VSSAPCIE4D5VSSAPCIE5E4VSSAPCIE6G1VSSAPCIE7G2VSSAPCIE8G4VSSAPCIE9
PART 6/6
PART 6/6
VSSAHT1
VSSAHT2
VSSAHT3
A25
E22
D23
G22
+1.1V_RUN +NB_VDD_MUX
+1.8V_RUN +VDDA18PCIE
220 ohm @ 100MHz, 2A
U6
U6
3
GND1
IN
EN
*TPS72501_NC
*TPS72501_NC
OUT
RESET#/FB
GND2
2
1
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
J22
L17
L22
L24
L25
H19
G24
G25
+1.2V_RUN +VDDHTTX
+1.35V_HT_VCC
BLM21PG221SN1D
BLM21PG221SN1D
0805
0805
4
5
6
P20
N22
R19
R22
R24
M20
R80
R80
0/0805
0/0805
BLM21PG221SN1D
BLM21PG221SN1D
*BLM21PG221SN1D_NC
*BLM21PG221SN1D_NC
L4
L4
80 ohm(4A)
BLM21PG221SN1D
BLM21PG221SN1D
0805
0805
220 ohm @ 100MHz, 2A
L71
L71
0805
0805
L12
L12
0805
0805
C26
C26
4.7U
4.7U
6.3
6.3
X5R
X5R
0603
0603
+1.35V_HT_VCC
R59
R59
*12.7K_NC
*12.7K_NC
R60
R60
*120K_NC
*120K_NC
R25
L22
L22
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAHT19
VSSAHT21
VSSAHT22
VSSAHT20
V19
U22
H20
W22
C636
C636
4.7U
4.7U
6.3
6.3
X5R
X5R
0603
0603
C27
C27
4.7U
4.7U
6.3
6.3
X5R
X5R
0603
0603
C82
C82
*1U_NC
*1U_NC
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
Y21
W24
W25
AD25
+VDDHTRX
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAHT27
VSS11
L12
C12
C12
4.7U
4.7U
6.3
6.3
X5R
X5R
0603
0603
C76
C76
4.7U
4.7U
6.3
6.3
X5R
X5R
0603
0603
C55
C55
0.1U
0.1U
16
16
X7R
X7R
C32
C32
0.1U
0.1U
16
16
X7R
X7R
+1.8V_RUN
AC3
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
GROUND
GROUND
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
T12
P12
P15
N13
R11
R14
M14
C59
C59
0.1U
0.1U
16
16
X7R
X7R
C77
C77
0.1U
0.1U
16
16
X7R
X7R
C66
C66
0.1U
0.1U
16
16
X7R
X7R
40mil Width
C25
C25
0.1U
0.1U
16
16
X7R
X7R
R424
R424
0/0805
0/0805
AC4
AE1
AE4
AB2
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS18
VSS19
VSS20
VSS21
VSS22
V12
U14
U11
U15
C58
C58
0.1U
0.1U
16
16
X7R
X7R
C78
C78
0.1U
0.1U
16
16
X7R
X7R
C60
C60
0.1U
0.1U
16
16
X7R
X7R
C33
C33
0.1U
0.1U
16
16
X7R
X7R
+1.8V_RUN
+VDD18_MEM
VSS23
VSS24
W11
W15
C24
C24
1U
1U
10
10
X6S
X6S
0603
0603
C592
C592
*1U_NC
*1U_NC
10
10
X6S
X6S
0603
0603
AE14
VSS1
VSS25
AC12
VSS2
VSS26
AA14
C57
C57
0.1U
0.1U
16
16
X7R
X7R
C64
C64
0.1U
0.1U
16
16
X7R
X7R
C67
C67
0.1U
0.1U
16
16
X7R
X7R
C30
C30
0.1U
0.1U
16
16
X7R
X7R
VDDHTRX
VDDHTTX
VDDA18PCIE
VDD18_MEM
VDDPCIE
VDDC
VDD_MEM
VDDG33
***:Depopulate for RX780.
A6
VDDPCIE_1
B6
VDDPCIE_2
C6
VDDPCIE_3
D6
VDDPCIE_4
E6
VDDPCIE_5
F6
VDDPCIE_6
G7
VDDPCIE_7
H8
VDDPCIE_8
J9
VDDPCIE_9
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
K9
M9
L9
P9
R9
T9
V9
U9
K12
J14
U16
J11
K15
M12
L14
L11
M13
M15
N12
N14
P11
P13
P14
R12
R15
T11
T15
U12
T14
J16
AE10
AA11
Y11
AD10
AB10
AC10
H11
H12
VDDPCIE_10
VDDPCIE_11
VDDPCIE_12
VDDPCIE_13
VDDPCIE_14
VDDPCIE_15
VDDPCIE_16
VDDPCIE_17
POWER
POWER
VDD_MEM1(NC)
VDD_MEM2(NC)
VDD_MEM3(NC)
VDD_MEM4(NC)
VDD_MEM5(NC)
VDD_MEM6(NC)
VDDG33_1(NC)
VDDG33_2(NC)
Work around for RS780 Rev.A11 errata.
5
4
3
RX780
+1.1V
+1.1V
+1.2V
+1.8V
+1.8V VDDG18
NC
+1.1V +1.1V
+1.1V
NC
NC
C28
C28
0.1U
0.1U
16
16
X7R
X7R
C29
C29
0.1U
0.1U
10
10
X7R
X7R
80mil Width
C380C38
0
20mil Width
C45
C45
0.1U
0.1U
16
16
X7R
X7R
RS780
+1.1V
+1.1V
+1.2V
+1.8V
+1.8V
+1.8V
+1.1V
+1.8V/1.5V
DDR2/DDR3
+3.3V
100 mil Width
C17
C17
C23
C23
1U
1U
0.1U
0.1U
10
10
X6S
X6S
16
16
0603
0603
X7R
X7R
C9
C9
C10
C10
10U
10U
10U
10U
4
4
4
4
X6S
X6S
X6S
X6S
0805
0805
0805
0805
C39
C39
C43
C43
0.1U
0.1U
0.1U
0.1U
10
10
10
10
X7R
X7R
X7R
X7R
C36
C36
C37
C37
*0.1U_NC
*0.1U_NC
*0.1U_NC
*0.1U_NC
16
16
16
16
X7R
X7R
X7R
X7R
+3.3V_VDDR
BLM15AG221SN1D
BLM15AG221SN1D
C31
C31
0.1U
0.1U
16
16
X7R
X7R
2
VDD_PCIE
C18
C18
C22
C22
BLM21PG221SN1D
1U
1U
10
10
X6S
X6S
0603
0603
C41
C41
0.1U
0.1U
10
10
X7R
X7R
C51
C51
0.1U
0.1U
10
10
X7R
X7R
BLM21PG221SN1D
4.7U
4.7U
6.3
6.3
X5R
X5R
0603
0603
+NB_VCORE
C50
C50
0.1U
0.1U
10
10
X7R
X7R
220 ohm @ 100MHz, 2A
*BLM21PG221SN1D_NC
*BLM21PG221SN1D_NC
C35
C35
C44
C44
*0.1U_NC
*0.1U_NC
*4.7U_NC
*4.7U_NC
6.3
6.3
16
16
X5R
X5R
X7R
X7R
0603
0603
+3.3V_RUN
L2
L2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
+NB_VDD_MUX
L1
L1
0805
0805
C54
C54
0.1U
0.1U
10
10
X7R
X7R
+1.8V_RUN +1.8V_VDD_MEM
L6
L6
0805
0805
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
RS780-POWER
RS780-POWER
RS780-POWER
FX6 3A
FX6 3A
FX6 3A
1
10 70 Tuesday, May 20, 2008
10 70 Tuesday, May 20, 2008
10 70 Tuesday, May 20, 2008
of
of
of
1
256-Mbit DDR2 16Mbit*16(4bank)
MEM_A0
MEM_A1
MEM_A2
A A
R415 *100_NC R415 *100_NC
L67
+1.8V_MEM_VDDQ
B B
L67
*SBK160808G221_NC
*SBK160808G221_NC
MEM_A3
MEM_A4
MEM_A5
MEM_A6
MEM_A7
MEM_A8
MEM_A9
MEM_A10
MEM_A11
MEM_A12
MEM_BA0
MEM_BA1
MEM_DM1
MEM_DM0
MEM_RAS#
MEM_CAS#
MEM_WE#
MEM_CS#
MEM_CKE
MEM_ODT
MEM_CLKP
MEM_CLKN
C619
C619
*1U_NC
*1U_NC
10
10
X5R
X5R
0603
0603
Place This CAP near to
SDRAM with 0.2".
C C
+0.9V_MEM_VTT
+
+
C634
C634
*100U_NC
*100U_NC
6.3
6.3
3528
3528
+1.8V_RUN
D D
C88
C88
*22U_NC
*22U_NC
6.3
6.3
X5R
X5R
0805
0805
L62
L62
BLM21PG221SN1D
BLM21PG221SN1D
1.8V_RUN_ENABLE 46
+1.8V_MEM_VDDQ
C577
C577
22U
22U
6.3
6.3
X5R
X5R
0805
0805
Local Frame Buffer(64MB) DDRII Power
1
2
U2
U2
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10
P7
A11
R2
A12
L2
BA0
L3
BA1
B3
UDM
F3
LDM
K7
RAS
L7
CAS
K3
WE
L8
CS
K2
CKE
K9
ODT
J8
CLK
K8
CLK#
J1
VDDL
J7
VSSDL
A3
VSS_0
E3
VSS_1
J3
VSS_2
N1
VSS_3
P9
VSS_4
A7
VSSQ_0
B2
VSSQ_1
B8
VSSQ_2
D2
VSSQ_3
D8
VSSQ_4
E7
VSSQ_5
F2
VSSQ_6
F8
VSSQ_7
H2
VSSQ_8
H8
VSSQ_9
*HY5PS561621AFP-25_NC
*HY5PS561621AFP-25_NC
400M PBGA84
400M PBGA84
256M EP
256M EP
Q18
Q18
*BSC032N03S_NC
*BSC032N03S_NC
3
2
1
+
+
C580
C580
330U
330U
6.3
6.3
7343
7343
2
3
Bit
Swap
MEM_DQ6
G8
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
UDQS
UDQS#
LDQS
LDQS#
NC1
NC2
NC3
NC4
NC5
NC6
VREF
VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
VDDQ_0
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
9
8
7
6
5
4
C602
C602
C596
C596
1U
1U
1U
1U
6.3
6.3
6.3
6.3
X5R
X5R
X5R
X5R
MEM_DQ2
G2
MEM_DQ7
H7
MEM_DQ0
H3
MEM_DQ1
H1
MEM_DQ4
H9
MEM_DQ3
F1
MEM_DQ5
F9
MEM_DQ11
C8
MEM_DQ13
C2
MEM_DQ10
D7
MEM_DQ8
D3
MEM_DQ12
D1
MEM_DQ9
D9
MEM_DQ14
B1
MEM_DQ15
B9
MEM_DQS_P1
B7
MEM_DQS_N1
A8
MEM_DQS_P0
F7
MEM_DQS_N0
E8
A2
E2
MEM_BA2
L1
R3
R7
R8
MEM_VREF
J2
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
+0.9V_DDR_VTT
C595
C595
0.1U
0.1U
10
10
X7R
X7R
+1.8V_MEM_VDDQ
C611
C611
0.1U
0.1U
10
10
X7R
X7R
3
4
+1.8V_MEM_VDDQ
T3T3
R429 40.2/F R429 40.2/F
R428 40.2/F R428 40.2/F
MEM_A0
MEM_A1
MEM_A2
MEM_A3
MEM_A4
MEM_A5
MEM_A6
MEM_A7
MEM_A8
MEM_A9
MEM_A10
MEM_A11
MEM_A12
MEM_BA0
MEM_BA1
MEM_BA2
MEM_RAS#
MEM_CAS#
MEM_WE#
MEM_CS#
MEM_CKE
MEM_ODT
MEM_CLKP
MEM_CLKN
MEM_COMP_P
MEM_COMP_N
AB12
AE16
AE15
AA12
AB16
AB14
AD14
AD13
AD15
AC16
AE13
AC14
AD16
AE17
AD17
W12
AD18
AB13
AB18
W14
AE12
AD12
5
V11
Y14
Y12
V14
V15
U22D
U22D
MEM_A0(NC)
MEM_A1(NC)
MEM_A2(NC)
MEM_A3(NC)
MEM_A4(NC)
MEM_A5(NC)
MEM_A6(NC)
MEM_A7(NC)
MEM_A8(NC)
MEM_A9(NC)
MEM_A10(NC)
MEM_A11(NC)
MEM_A12(NC)
MEM_A13(NC)
MEM_BA0(NC)
MEM_BA1(NC)
MEM_BA2(NC)
MEM_RASb(NC)
MEM_CASb(NC)
MEM_WEb(NC)
MEM_CSb(NC)
MEM_CKE(NC)
MEM_ODT(NC)
MEM_CKP(NC)
MEM_CKN(NC)
MEM_COMPP(NC)
MEM_COMPN(NC)
RS780M A13
RS780M A13
MEM_COMP_P and MEM_COMP_N trace
width >=10mils and 10mils spacing from
other Signals in X,Y,Z directions
Only for RS780
C620
C620
*0.1U_NC
*0.1U_NC
10
10
X7R
X7R
C621
C621
*0.1U_NC
*0.1U_NC
10
10
X7R
X7R
4
R435
R435
*1K/F_NC
*1K/F_NC
R436
R436
*1K/F_NC
*1K/F_NC
MEM_VREF
+1.8V_MEM_VDDQ +1.8V_MEM_VDDQ
C610
C610
0.1U
0.1U
10
10
X7R
X7R
C603
C603
0.1U
0.1U
10
10
X7R
X7R
5
PAR 4 OF 6
PAR 4 OF 6
MEM_DQ0/DVO_VSYNC(NC)
MEM_DQ1/DVO_HSYNC(NC)
MEM_DQS0P/DVO_IDCKP(NC)
MEM_DQS0N/DVO_IDCKN(NC)
SBD_MEM/DVO_I/F
SBD_MEM/DVO_I/F
R432
R432
1K/F
1K/F
MEM_VREF1
R431
R431
1K/F
1K/F
6
7
8
RS740/RX780/RS780 POWER DIFFERENCE TABLE
MEM_DQ2/DVO_DE(NC)
MEM_DQ3/DVO_D0(NC)
MEM_DQ4(NC)
MEM_DQ5/DVO_D1(NC)
MEM_DQ6/DVO_D2(NC)
MEM_DQ7/DVO_D4(NC)
MEM_DQ8/DVO_D3(NC)
MEM_DQ9/DVO_D5(NC)
MEM_DQ10/DVO_D6(NC)
MEM_DQ11/DVO_D7(NC)
MEM_DQ12(NC)
MEM_DQ13/DVO_D9(NC)
MEM_DQ14/DVO_D10(NC)
MEM_DQ15/DVO_D11(NC)
MEM_DQS1P(NC)
MEM_DQS1N(NC)
MEM_DM0(NC)
MEM_DM1/DVO_D8(NC)
IOPLLVDD18(NC)
IOPLLVDD(NC)
IOPLLVSS(NC)
MEM_VREF(NC)
AA18
AA20
AA19
Y19
V17
AA17
AA15
Y15
AC20
AD19
AE22
AC18
AB20
AD22
AC22
AD21
Y17
W18
AD20
AE21
W17
AE19
AE23
AE24
AD23
AE18
MEM_DQ0
MEM_DQ1
MEM_DQ2
MEM_DQ3
MEM_DQ4
MEM_DQ5
MEM_DQ6
MEM_DQ7
MEM_DQ8
MEM_DQ9
MEM_DQ10
MEM_DQ11
MEM_DQ12
MEM_DQ13
MEM_DQ14
MEM_DQ15
MEM_DQS_P0
MEM_DQS_N0
MEM_DQS_P1
MEM_DQS_N1
MEM_DM0
MEM_DM1
+1.8V_IOPLLVDD
+1.1V_IOPLLVDD
MEM_VREF1
PIN NAME
IOPLLVDD18 NC +1.8V
IOPLLVDD NC +1.1V
RX780 RS780
220 ohm @ 100MHz
L660L66
0
0
L690L69
C618
C618
C626
C626
*2.2U_NC
*2.2U_NC
10
10
0603
0603
X7R
X7R
*2.2U_NC
*2.2U_NC
10
10
X5R
X5R
0603
0603
ALL external components connected to
SPMEM signals must be removed for RX780.
At least 200mils wide and locate after DDR2 SDRAM
MEM_A8
RP23 *4P2R-47_NC RP23 *4P2R-47_NC
MEM_A0
MEM_A2
MEM_A6
MEM_A7
MEM_A9
MEM_A11
MEM_A4
MEM_BA0
MEM_BA2
MEM_A10
MEM_A5
MEM_BA1
MEM_A1
MEM_A12
MEM_A3
MEM_CS#
MEM_ODT
MEM_CAS#
MEM_RAS#
MEM_CKE
MEM_WE#
6
4
2
4
2
RP26 *4P2R-47_NC RP26 *4P2R-47_NC
4
2
RP24 *4P2R-47_NC RP24 *4P2R-47_NC
4
2
RP29 *4P2R-47_NC RP29 *4P2R-47_NC
4
2
RP31 *4P2R-47_NC RP31 *4P2R-47_NC
4
2
RP30 *4P2R-47_NC RP30 *4P2R-47_NC
4
2
RP27 *4P2R-47_NC RP27 *4P2R-47_NC
4
2
4
2
RP22 *4P2R-47_NC RP22 *4P2R-47_NC
4
2
RP28 *4P2R-47_NC RP28 *4P2R-47_NC
4
2
+0.9V_MEM_VTT
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
C628 *0.1U/10V_NC C628 *0.1U/10V_NC
C587 *0.1U/10V_NC C587 *0.1U/10V_NC
C586 *0.1U/10V_NC C586 *0.1U/10V_NC RP25 *4P2R-47_NC RP25 *4P2R-47_NC
C589 *0.1U/10V_NC C589 *0.1U/10V_NC
C629 *0.1U/10V_NC C629 *0.1U/10V_NC
C599 *0.1U/10V_NC C599 *0.1U/10V_NC
C608 *0.1U/10V_NC C608 *0.1U/10V_NC
C605 *0.1U/10V_NC C605 *0.1U/10V_NC
C616 *0.1U/10V_NC C616 *0.1U/10V_NC
C594 *0.1U/10V_NC C594 *0.1U/10V_NC RP21 *4P2R-47_NC RP21 *4P2R-47_NC
C630 *0.1U/10V_NC C630 *0.1U/10V_NC
C627 *0.1U/10V_NC C627 *0.1U/10V_NC
C588 *0.1U/10V_NC C588 *0.1U/10V_NC
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
RS780-SIDE PORT I/O
RS780-SIDE PORT I/O
RS780-SIDE PORT I/O
FX6 3A
FX6 3A
FX6 3A
7
+1.8V_MEM_VDDQ
+1.8V_MEM_VDDQ
+1.8V_MEM_VDDQ
+1.8V_MEM_VDDQ
+1.8V_MEM_VDDQ
+1.8V_MEM_VDDQ
11 70 Tuesday, May 20, 2008
11 70 Tuesday, May 20, 2008
11 70 Tuesday, May 20, 2008
8
+1.8V_RUN
+NB_VDD_MUX
of
of
of
5
PLACE THESE PCIE AC COUPLING
CAPS CLOSE TO U39
PLTRST# 9,14,18,37,39,45
ALINK_NBRX_SBTX_P0 8
Reserved for Rubuto.
J6
J6
PLTRST#
2
2
1
D D
C C
CPU_PWRGD
B B
A A
1
*3800/2/1_NC
*3800/2/1_NC
Place R686,R683
< 100mils from pins E27,E28,E29
+1.2V_RUN
+5V_ALW2 +3.3V_ALW
(20)
R378 *0_NC R378 *0_NC
Place the translation circuit for CPU_PWRGD close to the
SB700 to minimize stubbs when the circuit is No Stuff.
PLACE THESE COMPONENTS CLOSE TO SB700, AND
USE GROUND GUARD FOR 32K_X1 AND 32K_X2
ATi Recommend
Vendor: NSK
Part Number: NXG 32.768KAE12FUD 16 PPM.
R698
R698
*20M_NC
*20M_NC
+3.3V_RUN
PCI_GNT4#
PCI_REQ4#
Y6
Y6
32.768KHZ
32.768KHZ
R709 20M R709 20M
C895
C895
18P
18P
50
50
COG
COG
R271
R271
*1K_NC
*1K_NC
C374
C374
*0.1U_NC
*0.1U_NC
2
8
7
6
5
*AT24C04N-10SI-2.7_NC
*AT24C04N-10SI-2.7_NC
5
BLM21PG221SN1D
BLM21PG221SN1D
0805
0805
R374
R374
*10K_NC
*10K_NC
3
Q57
Q57
*FDV301N_NC
*FDV301N_NC
1
R701 0 R701 0
1 4
2 3
C902
C902
18P
18P
50
50
COG
COG
VCC
WC
SCL
SDA
L47
L47
2
U18
U18
1
A0
2
A1
3
A2
4
GND
ALINK_NBRX_SBTX_N0 8
ALINK_NBRX_SBTX_P1 8
ALINK_NBRX_SBTX_N1 8
ALINK_NBRX_SBTX_P2 8
ALINK_NBRX_SBTX_N2 8
ALINK_NBRX_SBTX_P3 8
ALINK_NBRX_SBTX_N3 8
ALINK_NBTX_C_SBRX_P0 8
ALINK_NBTX_C_SBRX_N0 8
ALINK_NBTX_C_SBRX_P1 8
ALINK_NBTX_C_SBRX_N1 8
ALINK_NBTX_C_SBRX_P2 8
ALINK_NBTX_C_SBRX_N2 8
ALINK_NBTX_C_SBRX_P3 8
ALINK_NBTX_C_SBRX_N3 8
+1.2V_PCIE_PVDD_R
20mil Width
R375
R375
*10K_NC
*10K_NC
3 1
Q56
Q56
*2N7002W-7-F_NC
*2N7002W-7-F_NC
32K_X1
32K_X2
+1.2V_PCIE_VDDR
C446 AND C448 CLOSE
TO U31.P24
CLK_PCIE_SB 25
CLK_PCIE_SB# 25
CPU_PWRGD_Q 42
ALLOW_LDTSTOP 9
CPU_PROCHOT# 5
CPU_PWRGD 5
LDT_STOP# 5,9
LDT_RST# 5,9
4
PLTRST#
C411 0.1U/10V C411 0.1U/10V
C408 0.1U/10V C408 0.1U/10V
C874 0.1U/10V C874 0.1U/10V
C877
C877
C884
C884
C881 0.1U/10V C881 0.1U/10V
C425 0.1U/10V C425 0.1U/10V
C415 0.1U/10V C415 0.1U/10V
R686 562/F R686 562/F
R683 2.05K/F R683 2.05K/F
4
R678 *8.2K_NC R678 *8.2K_NC
R679 33 R679 33
ALINK_NBRX_C_SBTX_P0
ALINK_NBRX_C_SBTX_N0
ALINK_NBRX_C_SBTX_P1
0.1U/10V
0.1U/10V
ALINK_NBRX_C_SBTX_N1
ALINK_NBRX_C_SBTX_P2
0.1U/10V
0.1U/10V
ALINK_NBRX_C_SBTX_N2
ALINK_NBRX_C_SBTX_P3
ALINK_NBRX_C_SBTX_N3
C446
C446
10U
10U
4
4
X5R
X5R
0603
0603
R316 0 R316 0
+1.8V_RUN
PCIE_CALRP
PCIE_CALRN
C448
C448
1U
1U
6.3
6.3
X5R
X5R
R338
R338
*10K_NC
*10K_NC
R344 0 R344 0
R333 0 R333 0
32K_X1
32K_X2
U39A
U39A
N2
A_RST#
V23
PCIE_TX0P
V22
PCIE_TX0N
V24
PCIE_TX1P
V25
PCIE_TX1N
U25
PCIE_TX2P
U24
PCIE_TX2N
T23
PCIE_TX3P
T22
PCIE_TX3N
U22
PCIE_RX0P
U21
PCIE_RX0N
U19
PCIE_RX1P
V19
PCIE_RX1N
R20
PCIE_RX2P
R21
PCIE_RX2N
R18
PCIE_RX3P
R17
PCIE_RX3N
T25
PCIE_CALRP
T24
PCIE_CALRN
P24
PCIE_PVDD
P25
PCIE_PVSS
N25
PCIE_RCLKP/NB_LNK_CLKP
N24
PCIE_RCLKN/NB_LNK_CLKN
K23
NB_DISP_CLKP
K22
NB_DISP_CLKN
M24
NB_HT_CLKP
M25
NB_HT_CLKN
P17
CPU_HT_CLKP
M18
CPU_HT_CLKN
M23
SLT_GFX_CLKP
M22
SLT_GFX_CLKN
J19
GPP_CLK0P
J18
GPP_CLK0N
L20
GPP_CLK1P
L19
GPP_CLK1N
M19
GPP_CLK2P
M20
GPP_CLK2N
N22
GPP_CLK3P
P22
GPP_CLK3N
L18
25M_48M_66M_OSC
J21
25M_X1
J20
25M_X2
A3
X1
B3
X2
F23
ALLOW_LDTSTP
F24
PROCHOT#
F22
LDT_PG
G25
LDT_STP#
G24
LDT_RST#
SB700 A12
SB700 A12
3
SB700
SB700
Part 1 of 5
Part 1 of 5
PCI EXPRESS INTERFACE
PCI EXPRESS INTERFACE
LPC
3
CPU
CPU
LPC
RTC
RTC
RTC XTAL
RTC XTAL
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5/GPIO41
PCI CLKS
PCI CLKS
PCIRST#
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#
CBE1#
CBE2#
PCI INTERFACE
PCI INTERFACE
CLOCK GENERATOR
CLOCK GENERATOR
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65
CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
PAR
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
REQ3#/GPIO70
REQ4#/GPIO71
GNT0#
GNT1#
GNT2#
GNT3#/GPIO72
GNT4#/GPIO73
CLKRUN#
LOCK#
INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36
LPCCLK0
LPCCLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
SERIRQ
RTCCLK
INTRUDER_ALERT#
VBAT
Rev.A21
2
PCI_CLK0_R
P4
PCI_CLK1_R
P3
PCI_CLK2
P1
PCI_CLK3
P2
PCI_CLK4_R
T4
PCI_CLK5
T3
R682 *8.2K_NC R682 *8.2K_NC
N1
U2
P7
V4
T1
V3
U1
V1
V2
T2
W1
T9
R6
R7
R5
U8
U5
Y7
W8
V9
Y8
AA8
Y4
Y3
Y2
AA2
AB4
AA1
AB3
AB2
AC1
AC2
AD1
W2
U7
AA7
Y1
AA6
W5
AA5
Y5
U6
W6
W4
V7
AC3
AD4
AB7
AE6
AB6
AD2
AE4
AD5
AC6
AE5
AD6
V5
AD3
AC4
AE2
AE3
G22
E22
H24
H23
J25
J24
H25
H22
AB8
AD7
V15
C3
C2
B2
R680 33 R680 33
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_FRAME#
PCI_DEVSEL#
PCI_IRDY#
PCI_TRDY#
PCI_PAR
PCI_STOP#
PCI_PERR#
PCI_SERR#
PCI_REQ0#
PCI_REQ1#
PCI_REQ2#
PCI_REQ3#
PCI_REQ4#
PCI_GNT0#
PCI_GNT1#
PCI_GNT2#
PCI_GNT3#
PCI_GNT4#
CLKRUN#
LOCK#
PCI_PIRQA#
PCI_PIRQB#
R329 22 R329 22
R340 22 R340 22
LPC_LAD0 LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
LPC_LDRQ0#
LPC_LDRQ1#
IRQ_SERIRQ
INTRUDER_ALERT# INTRUDER_ALERT#
+VBAT_IN
C893
C893
C894
C894
0.1U/16V
0.1U/16V
1U
1U
16
16
10
10
X7R
X7R
X6S
X6S
0603
0603
R309 22 R309 22
R301 22 R301 22
T73T73
R303 22 R303 22
PCI_AD[0..31]
PCI_C_BE0# 35
PCI_C_BE1# 35
PCI_C_BE2# 35
PCI_C_BE3# 35
PCI_FRAME# 35
PCI_DEVSEL# 35
PCI_IRDY# 35
PCI_TRDY# 35
PCI_PAR 35
PCI_STOP# 35
PCI_PERR# 35
PCI_SERR# 35
T110T110
PCI_REQ1# 35
T107T107
T108T108
T66T66
T120T120
PCI_GNT1# 35
T113T113
T132T132
T57T57
CLKRUN# 35,42
T72T72
PCI_PIRQA# 35
PCI_PIRQB# 35
T131T131
LPCCLK0 14
LPCCLK1 14
LPC_LAD0 39,42
LPC_LAD1 39,42
LPC_LAD2 39,42
LPC_LAD3 39,42
LPC_LFRAME# 39,42
T77T77
T67T67
IRQ_SERIRQ 35,42
RTC_CLK 14
R708
R708
*0_NC
*0_NC
CMOS Clear
(Top or easy access place)
2
CLK_PCI_DEBUG
CLK_PCI_PCCARD
CLK_PCI_8512
PCI_AD[0..31] 35
R695 510/F R695 510/F
CLK_PCI_DEBUG 39
CLK_PCI_PCCARD 35
PCI_CLK2 14
PCI_CLK3 14
CLK_PCI_8512 14,42
PCI_CLK5 14
PCI_RST# 35
CLK_PCI_DEBUG
CLK_PCI_8512
CLK_PCI_PCCARD
PCI_REQ4#
PCI_REQ2#
PCI_REQ3#
+3.3V_RUN
+RTC_CELL
Title
Title
Title
SB700-PCIE/PCI/LPC
SB700-PCIE/PCI/LPC
SB700-PCIE/PCI/LPC
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
FX6 3A
FX6 3A
FX6 3A
Date: Sheet
Date: Sheet
Date: Sheet
6
7
8
9
10
Option to "Disable" clkrun.
Pulling it down will
keep the clocks running.
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
1
C445 *10P/50V_NC C445 *10P/50V_NC
C431 *10P/50V_NC C431 *10P/50V_NC
C406 10P/50V C406 10P/50V
1
+3.3V_RUN
5
4
3
2
1
+3.3V_RUN
R670
R670
8.2K
8.2K
R671
R671
*8.2K_NC
*8.2K_NC
R694
R694
PCI_REQ0#
PCI_REQ1#
*1M_NC
*1M_NC
12 70 Tuesday, May 20, 2008
12 70 Tuesday, May 20, 2008
12 70 Tuesday, May 20, 2008
RP33
RP33
*10P8R-8.2k_NC
*10P8R-8.2k_NC
CLKRUN#
+RTC_CELL
of
of
of
5
+3.3V_ALW
R321 *2.2K_NC R321 *2.2K_NC
R322 *2.2K_NC R322 *2.2K_NC
R326 *2.2K_NC R326 *2.2K_NC
D D
+3.3V_SUS
R343 *10K_NC R343 *10K_NC
R364 *10K_NC R364 *10K_NC
R700 *10K_NC R700 *10K_NC
R703 *10K_NC R703 *10K_NC
R704 *10K_NC R704 *10K_NC
+3.3V_SUS
R693 *10K_NC R693 *10K_NC
R690 *10K_NC R690 *10K_NC
R318 *10K_NC R318 *10K_NC
C C
B B
A A
R331 *10K_NC R331 *10K_NC
R335 *10K_NC R335 *10K_NC
R691 *10K_NC R691 *10K_NC
R689 10K R689 10K
R317 *10K_NC R317 *10K_NC
+3.3V_RUN
R299 *10K_NC R299 *10K_NC
R668 2.2K R668 2.2K
R669 2.2K R669 2.2K
R787 *10K_NC R787 *10K_NC
R788 *10K_NC R788 *10K_NC
R311 *10K_NC R311 *10K_NC
CLK_SB_48M_R
R367
R367
*10_NC
*10_NC
C498
C498
*4.7P_NC
*4.7P_NC
50
50
NPO
NPO
SB_AZ_CODEC_SDOUT 31
SB_AZ_CODEC_SYNC 31
SB_AZ_CODEC_RST# 14,31,42
SB_AZ_CODEC_BITCLK 31
Close to U39
SB_TEST2
SB_TEST1
SB_TEST0
USB_OC0_1#
USB_OC2_3#
USB_OC6#
USB_OC4#
EXPRCRD_PWREN#
SIO_EXT_WAKE# 42
SB_PCIE_WAKE# 33,37,39,40
CPU_THERMTRIP# 5
Delay 20ms after S5 powerOK
SATA_DET#
SIO_EXT_SMI#
SIO_EXT_SCI#
SB_PME#
SB_PCIE_WAKE#
SIO_EXT_WAKE#
SYS_RESET#
CPU_THERMTRIP#
SHUTDOWN#/GPIO5
SB_SMBCLK
SB_SMBDATA
EXPRCRD_PWREN# 37,42
USB_OC2_3# 38
USB_OC0_1# 38
SB_AZ_CODEC_SDIN0 31
SB_AZ_CODEC_SDIN0
SB_AZ_CODEC_BITCLK
USB_OC2_3#
USB_OC0_1#
Close to SB.(~50 mils from
clock pin).
C463 *27P/50V_NC C463 *27P/50V_NC
SB_AZ_CODEC_SDOUT
SB_AZ_CODEC_SYNC
SB_AZ_CODEC_RST#
SB_AZ_CODEC_BITCLK
5
C886 *27P/50V_NC C886 *27P/50V_NC
R685 33 R685 33
R315 33 R315 33
R313 33 R313 33
R687 33 R687 33
C888 *27P/50V_NC C888 *27P/50V_NC
C457 *27P/50V_NC C457 *27P/50V_NC
SB_PME# 35,42
SIO_SLP_S3# 42
SIO_SLP_S5# 42
SIO_PWRBTN# 42
SB_PWRGD 5,45
SUS_STAT# 9
SIO_A20GATE 42
SIO_RCIN# 42
SIO_EXT_SCI# 42
SIO_EXT_SMI# 42
WD_PWRGD 45
SB_RSMRST# 42
SB_SMBCLK 16,37,39,40
SB_SMBDATA 16,37,39,40
THERM_ALERT# 29
SPKR 31
R365 0 R365 0
R337 0 R337 0
SB_AZ_SDOUT
SB_AZ_SYNC
SB_AZ_RST#
SB_AZ_BITCLK
4
R366 0 R366 0
R330 0 R330 0
4
T127T127
T128T128
SB_AZ_CODEC_SDIN0
SB_PME#
SIO_EXT_WAKE#
SIO_SLP_S3#
SIO_SLP_S5#
SIO_PWRBTN#
SUS_STAT#
SB_TEST2
SB_TEST1
SB_TEST0
SIO_A20GATE
SIO_EXT_SCI#
SYS_RESET#
SB_PCIE_WAKE#
SIO_EXT_SMI# SIO_EXT_SMI#
SB_RSMRST#
SPKR
SB_SMBCLK
SB_SMBDATA
SATA_DET#
SHUTDOWN#/GPIO5
USB_OC6#
EXPRCRD_PWREN#
USB_OC4#
JTAG_TDO
JTAG_TCK
JTAG_TDI
SB_JTAG_RST#
SB_AZ_BITCLK
SB_AZ_SDOUT
SB_AZ_SYNC
SB_AZ_RST# SB_AZ_RST#
U39D
U39D
E1
PCI_PME#/GEVENT4#
E2
RI#/EXTEVNT0#
H7
SLP_S2/GPM9#
F5
SLP_S3#
G1
SLP_S5#
H2
PWR_BTN#
H1
PWR_GOOD
K3
SUS_STAT#
H5
TEST2
H4
TEST1
H3
TEST0
Y15
GA20IN/GEVENT0#
W15
KBRST#/GEVENT1#
K4
LPC_PME#/GEVENT3#
K24
LPC_SMI#/EXTEVNT1#
F1
S3_STATE/GEVENT5#
J2
SYS_RESET#/GPM7#
H6
WAKE#/GEVENT8#
F2
BLINK/GPM6#
J6
SMBALERT#/THRMTRIP#/GEVENT2#
W14
NB_PWRGD
D3
RSMRST#
AE18
SATA_IS0#/GPIO10
AD18
CLK_REQ3#/SATA_IS1#/GPIO6
AA19
SMARTVOLT/SATA_IS2#/GPIO4
W17
CLK_REQ0#/SATA_IS3#/GPIO0
V17
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39
W20
CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
W21
SPKR/GPIO2
AA18
SCL0/GPOC0#
W18
SDA0/GPOC1#
K1
SCL1/GPOC2#
K2
SDA1/GPOC3#
AA20
DDC1_SCL/GPIO9
Y18
DDC1_SDA/GPIO8
C1
LLB#/GPIO66
Y19
SHUTDOWN#/GPIO5
G5
DDR3_RST#/GEVENT7#
B9
USB_OC6#/IR_TX1/GEVENT6#
B8
USB_OC5#/IR_TX0/GPM5#
A8
USB_OC4#/IR_RX0/GPM4#
A9
USB_OC3#/IR_RX1/GPM3#
E5
USB_OC2#/GPM2#
F8
USB_OC1#/GPM1#
E4
USB_OC0#/GPM0#
M1
AZ_BITCLK
M2
AZ_SDOUT
J7
AZ_SDIN0/GPIO42
J8
AZ_SDIN1/GPIO43
L8
AZ_SDIN2/GPIO44
M3
AZ_SDIN3/GPIO46
L6
AZ_SYNC
M4
AZ_RST#
L5
AZ_DOCK_RST#/GPM8#
H19
PS2_DAT/EC_GPIO0
H20
PS2_CLK/EC_GPIO1
H21
SPI_CS2#/EC_GPIO2
F25
IDE_RST#/F_RST#/EC_GPO3
D22
PS2KB_DAT/EC_GPIO4
E24
PS2KB_CLK/EC_GPIO5
E25
PS2M_DAT/EC_GPIO6
D23
PS2M_CLK/EC_GPIO7
SB700 A12
SB700 A12
3
SB700
SB700
ACPI / WAKE UP EVENTS
ACPI / WAKE UP EVENTS
USB OC
USB OC
HD AUDIO
HD AUDIO
EMBEDDED CTRL
EMBEDDED CTRL
3
Part 4 of 5
Part 4 of 5
USBCLK/14M_25M_48M_OSC
USB_RCOMP
USB MISC
USB MISC
USB_FSDP13+
USB_FSDM13-
USB_FSDP12+
USB_FSDM12-
USB 1.1
USB 1.1
USB_HSDP11+
USB_HSDM11-
USB_HSDP10+
USB_HSDM10-
USB_HSDP9+
USB_HSDM9-
USB_HSDP8+
USB_HSDM8-
USB_HSDP7+
USB_HSDM7-
USB_HSDP6+
USB_HSDM6-
USB_HSDP5+
USB_HSDM5-
USB_HSDP4+
USB 2.0
USB 2.0
USB_HSDM4-
GPIO
GPIO
USB_HSDP3+
USB_HSDM3-
USB_HSDP2+
USB_HSDM2-
USB_HSDP1+
USB_HSDM1-
USB_HSDP0+
USB_HSDM0-
KSO_16/EC_GPIO8
KSO_17/EC_GPIO9
EC_PWM0/EC_GPIO10
SCL2/EC_GPIO11
SDA2/EC_GPIO12
SCL3_LV/EC_GPIO13
SDA3_LV/EC_GPIO14
EC_PWM1/EC_GPIO15
EC_PWM2/EC_GPO16
EC_PWM3/EC_GPO17
KSI_0/EC_GPIO18
KSI_1/EC_GPIO19
KSI_2/EC_GPIO20
KSI_3/EC_GPIO21
KSI_4/EC_GPIO22
KSI_5/EC_GPIO23
KSI_6/EC_GPIO24
KSI_7/EC_GPIO25
KSO_0/EC_GPIO26
KSO_1/EC_GPIO27
KSO_2/EC_GPIO28
KSO_3/EC_GPIO29
KSO_4/EC_GPIO30
KSO_5/EC_GPIO31
KSO_6/EC_GPIO32
KSO_7/EC_GPIO33
KSO_8/EC_GPIO34
KSO_9/EC_GPIO35
KSO_10/EC_GPIO36
EMBEDDED CTRL
EMBEDDED CTRL
KSO_11/EC_GPIO37
KSO_12/EC_GPIO38
KSO_13/EC_GPIO39
KSO_14/EC_GPIO40
KSO_15/EC_GPIO41
Rev.A21
2
When External Clock Gen, used as 48M Clock input
When Internal Clock Gen, used as 48M Clock output
C8
G8
E6
E7
F7
E8
H11
J10
E11
F11
A11
B11
C10
D10
G11
H12
E12
E14
C12
D12
B12
A12
G12
G14
H14
H15
A13
B13
B14
A14
A18
B18
F21
D21
F19
E20
E21
E19
D19
E18
G20
G21
D25
D24
C25
C24
B25
C23
B24
B23
A23
C22
A22
B22
B21
A21
D20
C20
A20
B20
B19
A19
D18
C18
CLK_SB_48M_R
USB_RCOMP
STRAP pin to define
use LPC or SPI ROM
R699 0 R699 0
R323 11.8K/F R323 11.8K/F
SB_USBP11+ 32
SB_USBP11- 32
SB_USBP10+ 44
SB_USBP10- 44
SB_USBP7+ 37
SB_USBP7- 37
SB_USBP6+ 39
SB_USBP6- 39
SB_USBP5+ 40
SB_USBP5- 40
SB_USBP4+ 39
SB_USBP4- 39
SB_USBP3+ 38
SB_USBP3- 38
SB_USBP2+ 38
SB_USBP2- 38
SB_USBP1+ 38
SB_USBP1- 38
SB_USBP0+ 38
SB_USBP0- 38
SCLK3 5
SDATA3 5
GP16 14
GP17 14
Symbol:
2N7002W-7-F
Camera
Biometric
EXPRESS
WPAN
WWAN
WLAN
IO board
IO board
Left side USB.
Left side USB.
D(3)
G(2)
S(1)
2
1
CLK_SB_48M 25
Place R323 near pin G8. Route it with 10mils
Trace width and 25mils spacing to any
signals in X, Y, Z directions.
SB JTAG
SB_TEST1
JTAG_TDI
JTAG_TDO
JTAG_TCK
+3.3V_SUS
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
COMPUTER
SB700-ACPI/USB/AC97
SB700-ACPI/USB/AC97
SB700-ACPI/USB/AC97
FX6 3A
FX6 3A
FX6 3A
1
T76T76
T78T78
T129T129
T81T81
T84T84
T111T111
TMS
TDI
TDO
TCK
GND
+3.3V
of
of
of
13 70 Tuesday, May 20, 2008
13 70 Tuesday, May 20, 2008
13 70 Tuesday, May 20, 2008
5
R662
R662
10M
10M
C404
C404
1U
1U
6.3
6.3
X5R
X5R
C402
C402
1U
1U
10
10
X6S
X6S
0603
0603
SATA_TX0+_C
SATA_TX0-_C
SATA_TX1+_C
SATA_TX1-_C
SATA_CAL
SATA_X1
SATA_X2
SATA_X1
SATA_X2
C403
C403
*0.1U_NC
*0.1U_NC
10
10
X7R
X7R
C424
C424
*0.1U_NC
*0.1U_NC
10
10
X7R
X7R
LPC_CLK0
ENABLE PCI
MEM BOOT
DISABLE PCI
MEM BOOT
C401
C401
22U
22U
6.3
6.3
X5R
X5R
0805
0805
SATA_TX0+ 30
HDD
ODD
D D
ESATA
C C
C860 12P/50V/COG C860 12P/50V/COG
C859 12P/50V/COG C859 12P/50V/COG
+1.2V_RUN
B B
+3.3V_RUN
SATA_TX0- 30
SATA_RX0- 30
SATA_RX0+ 30
SATA_TX1+ 30
SATA_TX1- 30
SATA_RX1- 30
SATA_RX1+ 30
SATA_TX3+_C 38
SATA_TX3-_C 38
SATA_RX3- 38
SATA_RX3+ 38
SATA_ACT# 44
L45
L45
BLM15AG221SN1D
BLM15AG221SN1D
CAPS CLOSE TO THE
BALL OF U39
L46
L46
BLM15AG221SN1D
BLM15AG221SN1D
CAPS CLOSE TO THE
BALL OF U39
PCI_CLK2
A A
PULL
HIGH
PULL
LOW
BOOTFAIL
TIMER
ENABLED
BOOTFAIL
TIMER
DISABLED
DEFAULT
C853 0.01U/16V C853 0.01U/16V
C854 0.01U/16V C854 0.01U/16V
C856 0.01U/16V C856 0.01U/16V
C855 0.01U/16V C855 0.01U/16V
PLACE SATA AC COUPLING
CAPS CLOSE TO SB700
SATA_TX3+_C
SATA_TX3-_C
R307 1K/F R307 1K/F
+1.2V_PLLVDD_SATA
+3.3V_XTLVDD_SATA
Y5
Y5
25MHz
25MHz
2 1
30PPM
30PPM
SATA_X2_R
R661 0 R661 0
+1.2V_PLLVDD_SATA
+3.3V_XTLVDD_SATA
PCI_CLK3
USE
DEBUG
STRAPS
IGNORE
DEBUG
STRAPS
DEFAULT DEFAULT DEFAULT
5
U39B
U39B
AD9
SATA_TX0+
AE9
SATA_TX0-
AB10
SATA_RX0-
AC10
SATA_RX0+
AE10
SATA_TX1+
AD10
SATA_TX1-
AD11
SATA_RX1-
AE11
SATA_RX1+
AB12
SATA_TX2+
AC12
SATA_TX2-
AE12
SATA_RX2-
AD12
SATA_RX2+
AD13
SATA_TX3+
AE13
SATA_TX3-
AB14
SATA_RX3-
AC14
SATA_RX3+
AE14
SATA_TX4+
AD14
SATA_TX4-
AD15
SATA_RX4-
AE15
SATA_RX4+
AB16
SATA_TX5+
AC16
SATA_TX5-
AE16
SATA_RX5-
AD16
SATA_RX5+
V12
SATA_CAL
Y12
SATA_X1
AA12
SATA_X2
W11
SATA_ACT#/GPIO67
AA11
PLLVDD_SATA_1
W12
XTLVDD_SATA
SB700 A12
SB700 A12
LPC_CLK1
CLKGEN
ENABLED
CLKGEN
DISABLED
RTC_CLK
INTERNAL
RTC
DEFAULT
EXT. RTC
(PD on X1,
apply
32KHz to
RTC_CLK)
4
SB700
SB700
Part 2 of 5
Part 2 of 5
SPI ROM
SPI ROM
SATA PWR SERIAL ATA
SATA PWR SERIAL ATA
TEMPIN3/TALERT#/GPIO64
HW MONITOR
HW MONITOR
SB_AZ_CODEC_RST#
EC
ENABLED
EC
DISABLED
DEFAULT
4
IDE_IORDY
IDE_DACK#
IDE_DRQ
IDE_IOR#
IDE_IOW#
IDE_CS1#
IDE_CS3#
IDE_D0/GPIO15
IDE_D1/GPIO16
IDE_D2/GPIO17
IDE_D3/GPIO18
IDE_D4/GPIO19
IDE_D5/GPIO20
IDE_D6/GPIO21
IDE_D7/GPIO22
IDE_D8/GPIO23
ATA 66/100/133
ATA 66/100/133
IDE_D9/GPIO24
IDE_D10/GPIO25
IDE_D11/GPIO26
IDE_D12/GPIO27
IDE_D13/GPIO28
IDE_D14/GPIO29
IDE_D15/GPIO30
SPI_DI/GPIO12
SPI_DO/GPIO11
SPI_CLK/GPIO47
SPI_HOLD#/GPIO31
SPI_CS#/GPIO32
LAN_RST#/GPIO13
ROM_RST#/GPIO14
FANOUT0/GPIO3
FANOUT1/GPIO48
FANOUT2/GPIO49
FANIN0/GPIO50
FANIN1/GPIO51
FANIN2/GPIO52
TEMP_COMM
TEMPIN0/GPIO61
TEMPIN1/GPIO62
TEMPIN2/GPIO63
VIN0/GPIO53
VIN1/GPIO54
VIN2/GPIO55
VIN3/GPIO56
VIN4/GPIO57
VIN5/GPIO58
VIN6/GPIO59
VIN7/GPIO60
IDE_IRQ
IDE_A0
IDE_A1
IDE_A2
AVDD
AVSS
IDE_DIORDY#
AA24
IDE_IRQ
AA25
IDE_DA0
Y22
IDE_DA1
AB23
IDE_DA2
Y23
IDE_DDACK#
AB24
IDE_DDREQ
AD25
IDE_DIOR#
AC25
IDE_DIOW#
AC24
IDE_DCS1#
Y25
IDE_DCS3#
Y24
IDE_DD0
AD24
IDE_DD1
AD23
IDE_DD2
AE22
IDE_DD3
AC22
IDE_DD4
AD21
IDE_DD5
AE20
IDE_DD6
AB20
IDE_DD7
AD19
IDE_DD8
AE19
IDE_DD9
AC20
IDE_DD10
AD20
IDE_DD11
AE21
IDE_DD12
AB22
IDE_DD13
AD22
IDE_DD14
AE23
IDE_DD15
AC23
G6
CAMERA_CBL_DET#
D2
D1
F4
F3
LAN_RST#
U15
SB700_ROM_RST#
J1
WLAN_RADIO_DIS#
M8
PCIE_MCARD1_DET#
M5
USB_MCARD1_DET#
M7
PCIE_MCARD2_DET#
P5
USB_MCARD2_DET#
P8
WPAN_RADIO_DIS_MINI#
R8
TEMP_COMM
C6
PCIE_MCARD3_DET#
B6
USB_MCARD3_DET#
A6
WWAN_RADIO_DIS#
A5
B5
SB_WWAN_PCIE_RST#
A4
SB_WLAN_PCIE_RST#
B4
SB_WPAN_PCIE_RST#
C4
SB_LOM_PCIE_RST#
D4
LBF_ID0
D5
LBF_ID1
D6
LBF_ID2
A7
B7
20mil Width
F6
G7
HWM_AGND TRACE AT
LEAST 10MIL WIDE
GP17
ROM TYPE:
H, H = Reserved
H, L = SPI ROM
L, H = LPC ROM
L, L = FWH ROM
C472
C472
2.2U
2.2U
10
10
X5R
X5R
0603
0603
HWM_AGND
GP16
DEFAULT
3
T124T124
T121T121
T68T68
T65T65
T70T70
T122T122
T60T60
T118T118
T61T61
T126T126
T71T71
T58T58
T115T115
T117T117
T63T63
T114T114
T116T116
T64T64
T123T123
T125T125
T69T69
T119T119
T62T62
T59T59
T56T56
T109T109
T112T112
R688 *0_NC R688 *0_NC
+3.3V_AVDD_HWM
L51
L51
C473
C473
0.1U
0.1U
10
10
X7R
X7R
R324 0 R324 0
3
T75T75
T74T74
T79T79
T80T80
+3.3V_SUS
BLM15AG221SN1D
BLM15AG221SN1D
Close to SB700
BIOS should not enable the
internal GPIO pull up resistor
KB_LED_DET 43
CAMERA_CBL_DET# 32
LAN_RST# 18
PLTRST# 9,12,18,37,39,45
WLAN_RADIO_DIS# 39
PCIE_MCARD1_DET# 39
USB_MCARD1_DET# 39
PCIE_MCARD2_DET# 40
USB_MCARD2_DET# 40
WPAN_RADIO_DIS_MINI# 39
PCIE_MCARD3_DET# 39
USB_MCARD3_DET# 39
WWAN_RADIO_DIS# 40
SB_WWAN_PCIE_RST# 40
SB_WLAN_PCIE_RST# 39
SB_WPAN_PCIE_RST# 39
SB_LOM_PCIE_RST# 33
(11)
CLK_PCI_8512 12,42
SB_AZ_CODEC_RST# 13,31,42
2
For Side port memory setting.
R350 10K R350 10K
R358 10K R358 10K
R363 10K R363 10K
Memory Vendor LBF_ID1 LBF_ID0 LBF_ID2
Hynix
Qimonda
Samsung
CAMERA_CBL_DET#
PCIE_MCARD1_DET#
USB_MCARD1_DET#
PCIE_MCARD2_DET#
USB_MCARD2_DET#
PCIE_MCARD3_DET#
USB_MCARD3_DET#
SB_WPAN_PCIE_RST#
SB_WWAN_PCIE_RST#
SB_WLAN_PCIE_RST#
SB_LOM_PCIE_RST#
TEMP_COMM
1
+3.3V_RUN
R359
R359
R351
R351
*10K_NC
*10K_NC
*10K_NC
*10K_NC
00
0
0
0
1
R692 *100K_NC R692 *100K_NC
R314 100K R314 100K
R312 100K R312 100K
R573 100K R573 100K
R533 100K R533 100K
R658 100K R658 100K
R641 100K R641 100K
R345 20K R345 20K
R702 20K R702 20K
R346 20K R346 20K
R339 20K R339 20K
R766 0 R766 0
R362
R362
*10K_NC
*10K_NC
LBF_ID0
LBF_ID1
LBF_ID2
0
1
0
+3.3V_ALW
+3.3V_RUN
REQUIRED
STRAPS
+3.3V_RUN +3.3V_RUN +3.3V_SUS +3.3V_SUS
R672
R672
R675
R675
R285
R285
R298
R298
*10K_NC
*10K_NC
PCI_CLK5 12
PCI_CLK2 12
PCI_CLK3 12
GP16 13
GP17 13
RTC_CLK 12
LPCCLK0 12
LPCCLK1 12
R302
R302
*10K_NC
*10K_NC
2
*10K_NC
*10K_NC
R286
R286
*10K_NC
*10K_NC
*10K_NC
*10K_NC
R677
R677
10K
10K
R355
R355
*10K_NC
*10K_NC
2.2K
2.2K
R349
R349
R674
R674
*2.2K_NC
*2.2K_NC
10K
10K
Title
Title
Title
SB700-HDD/POWER
SB700-HDD/POWER
SB700-HDD/POWER
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
FX6 3A
FX6 3A
FX6 3A
Date: Sheet
Date: Sheet
Date: Sheet
+3.3V_RUN +3.3V_ALW +3.3V_ALW +3.3V_ALW +3.3V_RUN +3.3V_RUN
R697
R697
R353
R353
*10K_NC
*10K_NC
*2.2K_NC
*2.2K_NC
R352
R352
2.2K
2.2K
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
1
R328
R328
*10K_NC
*10K_NC
R325
R325
10K
10K
R336
R336
*10K_NC
*10K_NC
R332
R332
10K
10K
14 70 Tuesday, May 20, 2008
14 70 Tuesday, May 20, 2008
14 70 Tuesday, May 20, 2008
R305
R305
*10K_NC
*10K_NC
R306
R306
10K
10K
of
of
of
5
+3.3V_RUN
C400
C400
0.1U
0.1U
10
10
X7R
L100
L100
X7R
+1.2V_PCIE_VDDR
BLM21PG221SN1D
BLM21PG221SN1D
0805
0805
L55
L55
+AVDD_USB +3.3V_SUS
D D
+1.2V_RUN
BLM21PG221SN1D
BLM21PG221SN1D
0805
0805
C C
BLM21PG221SN1D
BLM21PG221SN1D
0805
0805
B B
C399
C399
0.1U
0.1U
10
10
X7R
X7R
+3.3V_RUN
C887
C887
22U
22U
6.3
6.3
X5R
X5R
0805
0805
L44
L44
C494
C494
22U
22U
6.3
6.3
X5R
X5R
0805
0805
+
+
C375
C375
220U
220U
6.3
6.3
Polymer
Polymer
7343
7343
C447
C447
1U
1U
6.3
6.3
X5R
X5R
C412
C412
1U
1U
6.3
6.3
X5R
X5R
C407
C407
1U
1U
6.3
6.3
X5R
X5R
C444
C444
1U
1U
6.3
6.3
X5R
X5R
C461
C461
1U
1U
6.3
6.3
X5R
X5R
50mil Width
C409
C397
C397
*22U_NC
*22U_NC
6.3
6.3
X5R
X5R
0805
0805
C427
C427
*0.1U_NC
*0.1U_NC
10
10
X7R
X7R
C428
C428
*0.1U_NC
*0.1U_NC
10
10
X7R
X7R
C409
*0.1U_NC
*0.1U_NC
10
10
X7R
X7R
50mil Width
C450
C450
C890
C890
C889
C889
1U
1U
1U
1U
6.3
6.3
6.3
6.3
X5R
X5R
X5R
X5R
+1.2V_AVDD_SATA +1.2V_RUN +1.2V_ALW_SUS
C459
C459
C454
1U
1U
6.3
6.3
X5R
X5R
C454
1U
1U
0.1U
0.1U
6.3
6.3 C493
10
10
X5R
X5R
X7R
X7R
50mil Width
C398
C398
22U
22U
6.3
6.3
X5R
X5R
0805
0805
C423
C423
1U
1U
6.3
6.3
X5R
X5R
C405
C405
1U
1U
6.3
6.3
X5R
X5R
C414
C414
0.1U
0.1U
10
10
X7R
X7R
50mil Width
C486
C505
C505
1U
1U
6.3
6.3
X5R
X5R
C486
1U
1U
6.3
6.3
X5R
X5R
C489
C489
1U
1U
6.3
6.3
X5R
X5R
C476
C476
0.1U
0.1U
10
10
X7R
X7R
C484
C484
0.1U
0.1U
10
10
X7R
X7R
C469
C469
1U
1U
6.3
6.3
X5R
X5R
C426
C426
*0.1U_NC
*0.1U_NC
10
10
X7R
X7R
C460
C460
0.1U
0.1U
10
10
X7R
X7R
C413
C413
0.1U
0.1U
10
10
X7R
X7R
C479
C479
0.1U
0.1U
10
10
X7R
X7R
4
AA4
AB5
AB21
AA21
AA22
AE25
AA14
AB18
AA15
AA17
AC18
AD17
AE17
G15
G17
G18
T15
U16
U17
Y20
P18
P19
P20
P21
R22
R24
R25
A16
B16
C16
D16
D17
E17
F15
F17
F18
M9
U9
V8
W7
U39C
U39C
L9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
Y6
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
VDD33_18_1
VDD33_18_2
VDD33_18_3
VDD33_18_4
PCIE_VDDR_1
PCIE_VDDR_2
PCIE_VDDR_3
PCIE_VDDR_4
PCIE_VDDR_5
PCIE_VDDR_6
PCIE_VDDR_7
AVDD_SATA_1
AVDD_SATA_4
AVDD_SATA_2
AVDD_SATA_3
AVDD_SATA_5
AVDD_SATA_6
AVDD_SATA_7
AVDDTX_0
AVDDTX_1
AVDDTX_2
AVDDTX_3
AVDDTX_4
AVDDTX_5
AVDDRX_0
AVDDRX_1
AVDDRX_2
AVDDRX_3
AVDDRX_4
AVDDRX_5
SB700 A12
SB700 A12
SB700
SB700
Part 3 of 5
Part 3 of 5
PCI/GPIO I/O
PCI/GPIO I/O
IDE/FLSH I/O
IDE/FLSH I/O
POWER
POWER
A-LINK I/O
A-LINK I/O
3.3V_S5 I/O CORE S5
3.3V_S5 I/O CORE S5
SATA I/O
SATA I/O
USB_PHY_1.2V_1
USB_PHY_1.2V_2
PLL CLKGEN I/O
PLL CLKGEN I/O
USB I/O
USB I/O
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
CORE S0
CORE S0
VDD_9
CKVDD_1.2V_1
CKVDD_1.2V_2
CKVDD_1.2V_3
CKVDD_1.2V_4
S5_3.3V_1
S5_3.3V_2
S5_3.3V_3
S5_3.3V_4
S5_3.3V_5
S5_3.3V_6
S5_3.3V_7
S5_1.2V_1
S5_1.2V_2
V5_VREF
AVDDCK_3.3V
AVDDCK_1.2V
AVDDC
L15
M12
M14
N13
P12
P14
R11
R15
T16
L21
L22
L24
L25
A17
A24
B17
J4
J5
L1
L2
G2
G4
A10
B10
AE7
J16
K17
E9
3
+1.2V_VDD
C502
C502
1U
1U
10
10
X6S
X6S
0603
0603
+1.2V_CKVDD
C465
C465
2.2U
2.2U
10
10
X5R
X5R
0603
0603
C493
22U
22U
6.3
6.3
X5R
X5R
0805
0805
C478
C478
1U
1U
6.3
6.3
X5R
X5R
C904
C904
0.1U
0.1U
10
10
X7R
X7R
+V5_VREF1
+3.3V_AVDDCK
+1.2V_AVDDCK
+3.3V_AVDDC
100mil Width
C501
C501
C503
C503
1U
1U
1U
1U
10
10
10
10
X6S
X6S
X6S
X6S
0603
0603
0603
0603
30mil Width
C466
C467
C467
2.2U
2.2U
2.2U
2.2U
10
10
10
10
X5R
X5R
X5R
X5R
0603
0603
0603
0603
50mil Width
C519
C519
C490
C490
1U
1U
1U
1U
6.3
6.3
6.3
6.3
X5R
X5R
X5R
X5R
20mil Width
C482
C482
C487
C487
1U
1U
1U
1U
6.3
6.3
6.3
6.3
X5R
X5R
X5R
X5R
20mil Width
C903
C903
C906
C906
0.1U
0.1U
1U
1U
10
10
6.3
6.3
X7R
X7R
X5R
X5R
20mil Width
20mil Width
C474
C474
2.2U
2.2U
10
10
X5R
X5R
0603
0603
C481
C481
0.1U
0.1U
10
10
X7R
X7R
C500
C500
1U
1U
10
10
X6S
X6S
0603
0603
C464
C464
10U
10U
4
4
X5R
X5R
0603
0603
C515
C515
0.1U
0.1U
10
10
X7R
X7R
C485
C485
1U
1U
6.3
6.3
X5R
X5R
C905
C905
1U
1U
6.3
6.3
X5R
X5R
L52
L52
BLM15AG221SN1D
BLM15AG221SN1D
+3.3V_AVDDC
C506
C506
2.2U
2.2U
10
10
X5R
X5R
0603
0603
C449
C449
C499
C499
0.1U
0.1U
22U
22U
10
10
6.3
6.3
X7R
X7R
X5R
X5R
0805
0805
L48
L48
BLM21PG221SN1D
BLM21PG221SN1D
C511
C511
0.1U
0.1U
10
10
X7R
X7R
+1.2V_SUS
C910
C910
22U
22U
6.3
6.3
X5R
X5R
0805
0805
+1.2V_RUN
L54
L54
BLM15AG221SN1D
BLM15AG221SN1D
2
L56
L56
FBMJ4516HS111-T
FBMJ4516HS111-T
1806
1806
L53
L53
*FBMJ4516HS111-T_NC
*FBMJ4516HS111-T_NC
C462
C462
0.1U
0.1U
10
10
X7R
X7R
+1.2V_RUN
0805
0805C466
R361 *0_NC 0805R361 *0_NC 0805
R368 *0_NC 0805R368 *0_NC 0805
PJP10
PJP10
POWER_JP
POWER_JP
1806
1806
Note: FBMJ4516HS111-T
was 110 ohm@100MHz
4A DC 0.014ohm
+3.3V_ALW
+3.3V_SUS +3.3V_ALW_R
1 2
(5)
Use shape short Jump.
L50
L50
BLM15AG221SN1D
BLM15AG221SN1D
C471
C471
2.2U
2.2U
10
10
X5R
X5R
0603
0603
+3.3V_SUS
+3.3V_RUN
+1.2V_ALW_SUS
+1.2V_RUN
T10
U10
U11
U12
V11
V14
Y11
Y14
Y17
AA9
AB9
AB11
AB13
AB15
AB17
AC8
AD8
AE8
A15
B15
C14
D11
D13
D14
D15
E15
F12
F14
H17
K10
K12
K14
K15
H18
K25
M16
M17
M21
P16
W9
Y9
D8
D9
G9
H9
J9
J11
J12
J14
J15
J17
J22
F9
U39E
U39E
AVSS_SATA_1
AVSS_SATA_2
AVSS_SATA_3
AVSS_SATA_4
AVSS_SATA_5
AVSS_SATA_6
AVSS_SATA_7
AVSS_SATA_8
AVSS_SATA_9
AVSS_SATA_10
AVSS_SATA_11
AVSS_SATA_12
AVSS_SATA_13
AVSS_SATA_14
AVSS_SATA_15
AVSS_SATA_16
AVSS_SATA_17
AVSS_SATA_18
AVSS_SATA_19
AVSS_SATA_20
AVSS_USB_1
AVSS_USB_2
AVSS_USB_3
AVSS_USB_4
AVSS_USB_5
AVSS_USB_6
AVSS_USB_7
AVSS_USB_8
AVSS_USB_9
AVSS_USB_10
AVSS_USB_11
AVSS_USB_12
AVSS_USB_13
AVSS_USB_14
AVSS_USB_15
AVSS_USB_16
AVSS_USB_17
AVSS_USB_18
AVSS_USB_19
AVSS_USB_20
AVSS_USB_21
AVSS_USB_22
AVSS_USB_23
AVSS_USB_24
PCIE_CK_VSS_1
PCIE_CK_VSS_2
PCIE_CK_VSS_3
PCIE_CK_VSS_4
PCIE_CK_VSS_5
PCIE_CK_VSS_6
PCIE_CK_VSS_7
PCIE_CK_VSS_8
AVSSC
SB700 A12
SB700 A12
SB700
SB700
PCIE_CK_VSS_9
PCIE_CK_VSS_10
PCIE_CK_VSS_11
PCIE_CK_VSS_12
PCIE_CK_VSS_13
PCIE_CK_VSS_14
PCIE_CK_VSS_15
PCIE_CK_VSS_16
PCIE_CK_VSS_17
PCIE_CK_VSS_18
PCIE_CK_VSS_19
PCIE_CK_VSS_20
PCIE_CK_VSS_21
Part 5 of 5
Part 5 of 5
1
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
GROUND
GROUND
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
AVSSCK
A2
A25
B1
D7
F20
G19
H8
K9
K11
K16
L4
L7
L10
L11
L12
L14
L16
M6
M10
M11
M13
M15
N4
N12
N14
P6
P9
P10
P11
P13
P15
R1
R2
R4
R9
R10
R12
R14
T11
T12
T14
U4
U14
V6
Y21
AB1
AB19
AB25
AE1
AE24
P23
R16
R19
T17
U18
U20
V18
V20
V21
W19
W22
W24
W25
L17
+5V_RUN
A A
+3.3V_RUN
5
R664 1K R664 1K
D32
D32
2 1
SDMK0340L-7-F SOD-323
SDMK0340L-7-F SOD-323
+V5_VREF1
C847
C847
1U
1U
6.3
6.3
X5R
X5R
4
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
3
2
Date: Sheet
COMPUTER
SB700-POWER
SB700-POWER
SB700-POWER
FX6 3A
FX6 3A
FX6 3A
of
of
of
15 70 Tuesday, May 20, 2008
15 70 Tuesday, May 20, 2008
15 70 Tuesday, May 20, 2008
1
A
+1.8V_SUS +1.8V_SUS
CN5
CN5
1
VREF
3
DDR_A_D1
DDR_A_D0
DDR_A_DQS#0
DDR_A_DQS0
4 4
DDR_CKE0_DIMMA 4,17
3 3
DDR_A_BS2 4,17
DDR_A_BS0 4,17
DDR_A_WE# 4,17
DDR_A_CAS# 4,17
DDR_CS1_DIMMA# 4,17
2 2
SB_SMBDATA 13,37,39,40
SB_SMBCLK 13,37,39,40
+3.3V_RUN
1 1
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D14
DDR_A_D16
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D19
DDR_A_D18
DDR_A_D25
DDR_A_DM3
DDR_A_D30
DDR_A_D27
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
DDR_A_MA10
DDR_A_BS0
DDR_A_WE#
DDR_A_CAS#
M_ODT1 4,17
M_ODT1
DDR_A_D36
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D39 DDR_A_D34
DDR_A_D38
DDR_A_D40
DDR_A_D41
DDR_A_DM5
DDR_A_D46 DDR_A_D42
DDR_A_D47
DDR_A_D49 DDR_A_D48
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_DM7
DDR_A_D63
DDR_A_D62
SB_SMBDATA
SB_SMBCLK
C364
C365
C365
2.2U
2.2U
10
10
X7R
X7R
0603
0603
C364
0.1U
0.1U
10
10
X7R
X7R
A
VSS47
5
DQ0
7
DQ1
9
VSS37
11
DQS#0
13
DQS0
15
VSS48
17
DQ2
19
DQ3
21
VSS38
23
DQ8
25
DQ9
27
VSS49
29
DQS#1
31
DQS1
33
VSS39
35
DQ10
37
DQ11
39
VSS50
41
VSS18
43
DQ16
45
DQ17
47
VSS1
49
DQS#2
51
DQS2
53
VSS19
55
DQ18
57
DQ19
59
VSS22
61
DQ24
63
DQ25
65
VSS23
67
DM3
69
NC4
71
VSS9
73
DQ26
75
DQ27
77
VSS4
79
CKE0
81
VDD7
83
NC1
85
A16_BA2
87
VDD9
89
A12
91
A9
93
A8
95
VDD5
97
A5
99
A3
101
A1
103
VDD10
105
A10/AP
107
BA0
109
WE#
111
VDD2
113
CAS#
115
S1#
117
VDD3
119
ODT1
121
VSS11
123
DQ32
125
DQ33
127
VSS26
129
DQS#4
131
DQS4
133
VSS2
135
DQ34
137
DQ35
139
VSS27
141
DQ40
143
DQ41
145
VSS29
147
DM5
149
VSS51
151
DQ42
153
DQ43
155
VSS40
157
DQ48
159
DQ49
161
VSS52
163
NCTEST
165
VSS30
167
DQS#6
169
DQS6
171
VSS31
173
DQ50
175
DQ51
177
VSS33
179
DQ56
181
DQ57
183
VSS3
185
DM7
187
VSS34
189
DQ58
191
DQ59
193
VSS14
195
SDA
197
SCL
199
VDD(SPD)
201
GNDPAD1
203
H1
TYCO_1775804-2
TYCO_1775804-2
CLOCK 0,1
2
VSS46
4
DQ4
6
DQ5
8
VSS15
10
DM0
12
VSS5
14
DQ6
16
DQ7
18
VSS16
20
DQ12
22
DQ13
24
VSS17
26
DM1
28
VSS53
30
CK0
32
CK0#
34
VSS41
36
DQ14
38
DQ15
40
VSS54
42
VSS20
44
DQ20
46
DQ21
48
VSS6
50
NC3
52
DM2
54
VSS21
56
DQ22
58
DQ23
60
VSS24
62
DQ28
64
DQ29
66
VSS25
68
DQS#3
70
DQS3
72
VSS10
74
DQ30
76
DQ31
78
VSS8
80
CKE1
82
VDD8
84
A15
86
A14
88
VDD11
90
PC4800 DDR2 SDRAM
SO-DIMM (200P)
PC4800 DDR2 SDRAM
SO-DIMM (200P)
A11
92
A7
94
A6
96
VDD4
98
A4
100
A2
102
A0
104
VDD12
106
BA1
108
RAS#
110
S0#
112
VDD1
114
ODT0
116
A13
118
VDD6
120
NC2
122
VSS12
124
DQ36
126
DQ37
128
VSS28
130
DM4
132
VSS42
134
DQ38
136
DQ39
138
VSS55
140
DQ44
142
DQ45
144
VSS43
146
DQS#5
148
DQS5
150
VSS56
152
DQ46
154
DQ47
156
VSS44
158
DQ52
160
DQ53
162
VSS57
164
CK1
166
CK1#
168
VSS45
170
DM6
172
VSS32
174
DQ54
176
DQ55
178
VSS35
180
DQ60
182
DQ61
184
VSS7
186
DQS#7
188
DQS7
190
VSS36
192
DQ62
194
DQ63
196
VSS13
198
SA0
200
SA1
202
GNDPAD2
204
H2
DDR_A_D5
DDR_A_D4
DDR_A_DM0
DDR_A_D2
DDR_A_D3
DDR_A_D12
DDR_A_D13
DDR_A_DM1
M_CLK_DDR0
M_CLK_DDR#0
DDR_A_D11
DDR_A_D15
DDR_A_D20
DDR_A_D21
DDR_A_DM2
DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29 DDR_A_D24
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D31
DDR_A_D26
DDR_A_MA15
DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
DDR_A_BS1
DDR_A_RAS#
M_ODT0
DDR_A_MA13
DDR_A_D33
DDR_A_D32 DDR_A_D37
DDR_A_DM4
DDR_A_D35
DDR_A_D44
DDR_A_D45
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D43
DDR_A_D53 DDR_A_D52
M_CLK_DDR1
M_CLK_DDR#1
DDR_A_DM6
DDR_A_D50
DDR_A_D51
DDR_A_D56 DDR_A_D61
DDR_A_D57
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D58
DDR_A_D59
R270
R270
10K
10K
B
C348
C348
2.2U
2.2U
10
10
X7R
X7R
0603
0603
Place C348 2.2uF and C342 0.1uF <
500mils from DDR connector
M_CLK_DDR0 4
M_CLK_DDR#0 4
CPU_MEMHOT# CPU_MEMHOT#
R263 0 R263 0
DDR_CKE1_DIMMA 4,17
DDR_A_BS1 4,17
DDR_A_RAS# 4,17
DDR_CS0_DIMMA# 4,17
M_ODT0 4,17
M_CLK_DDR0
C246
C246
1.5P/50V
1.5P/50V
M_CLK_DDR#0
M_CLK_DDR1
C703
C703
1.5P/50V
1.5P/50V
M_CLK_DDR#1
PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH
M_CLK_DDR1 4
M_CLK_DDR#1 4
R269
R269
10K
10K
SMbus address A0 SMbus address A4
B
C342
C342
0.1U
0.1U
10
10
X7R
X7R
DDR_A_DM[0..7] 4 DDR_B_DM[0..7] 4
DDR_A_D[0..63] 4
DDR_A_DQS[0..7] 4
DDR_A_DQS#[0..7] 4
DDR_A_MA[0..15] 4,17
DDR_CKE2_DIMMB 4,17
DDR_B_BS2 4,17
DDR_B_BS0 4,17
DDR_B_WE# 4,17
DDR_B_CAS# 4,17
DDR_CS1_DIMMB# 4,17
+3.3V_RUN
DDR_B_D4
DDR_B_D5
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D3
DDR_B_D2
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10 DDR_B_D15
DDR_B_D14 DDR_B_D11
DDR_B_DQS#2
DDR_B_DQS2
M_ODT3 4,17
C390
C390
2.2U
2.2U
10
10
X7R
X7R
0603
0603
C
+1.8V_SUS +1.8V_SUS
BOT-DOWN BOT_UP
CN6
CN6
1
VREF
3
VSS47
5
DQ0
7
DQ1
9
VSS37
11
DQS#0
13
DQS0
15
VSS48
17
DQ2
19
DQ3
21
VSS38
23
DQ8
25
DQ9
27
VSS49
29
DQS#1
31
DQS1
33
VSS39
35
DQ10
37
DQ11
39
VSS50
41
DDR_B_D16
DDR_B_D21
DDR_B_D18
DDR_B_D19
DDR_B_D25
DDR_B_D29 DDR_B_D24
DDR_B_DM3
DDR_B_D27
DDR_B_D31
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
DDR_B_MA10
DDR_B_BS0
DDR_B_WE#
DDR_B_CAS#
M_ODT3
DDR_B_D37
DDR_B_D36
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D38
DDR_B_D40 DDR_B_D41
DDR_B_D45
DDR_B_DM5
DDR_B_D42
DDR_B_D46
DDR_B_D53
DDR_B_D52
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D50
DDR_B_D54
DDR_B_D60
DDR_B_DM7
DDR_B_D58
DDR_B_D59
SB_SMBDATA
SB_SMBCLK
C391
C391
0.1U
0.1U
10
10
X7R
X7R
VSS18
43
DQ16
45
DQ17
47
VSS1
49
DQS#2
51
DQS2
53
VSS19
55
DQ18
57
DQ19
59
VSS22
61
DQ24
63
DQ25
65
VSS23
67
DM3
69
NC4
71
VSS9
73
DQ26
75
DQ27
77
VSS4
79
CKE0
81
VDD7
83
NC1
85
A16_BA2
87
VDD9
89
A12
91
A9
93
A8
95
VDD5
97
A5
99
A3
101
A1
103
VDD10
105
A10/AP
107
BA0
109
WE#
111
VDD2
113
CAS#
115
S1#
117
VDD3
119
ODT1
121
VSS11
123
DQ32
125
DQ33
127
VSS26
129
DQS#4
131
DQS4
133
VSS2
135
DQ34
137
DQ35
139
VSS27
141
DQ40
143
DQ41
145
VSS29
147
DM5
149
VSS51
151
DQ42
153
DQ43
155
VSS40
157
DQ48
159
DQ49
161
VSS52
163
NCTEST
165
VSS30
167
DQS#6
169
DQS6
171
VSS31
173
DQ50
175
DQ51
177
VSS33
179
DQ56
181
DQ57
183
VSS3
185
DM7
187
VSS34
189
DQ58
191
DQ59
193
VSS14
195
SDA
197
SCL
199
VDD(SPD)
201
GNDPAD1
203
H1
TYCO_292406-4
TYCO_292406-4
CLOCK 2,3
C
2
VSS46
DQ4
DQ5
VSS15
DM0
VSS5
DQ6
DQ7
VSS16
DQ12
DQ13
VSS17
DM1
VSS53
CK0
CK0#
VSS41
DQ14
DQ15
VSS54
VSS20
DQ20
DQ21
VSS6
NC3
DM2
VSS21
DQ22
DQ23
VSS24
DQ28
DQ29
VSS25
DQS#3
DQS3
VSS10
DQ30
DQ31
VSS8
CKE1
VDD8
A15
A14
VDD11
PC4800 DDR2 SDRAM
SO-DIMM (200P)
PC4800 DDR2 SDRAM
SO-DIMM (200P)
A11
A7
A6
VDD4
A4
A2
A0
VDD12
BA1
RAS#
S0#
VDD1
ODT0
A13
VDD6
NC2
VSS12
DQ36
DQ37
VSS28
DM4
VSS42
DQ38
DQ39
VSS55
DQ44
DQ45
VSS43
DQS#5
DQS5
VSS56
DQ46
DQ47
VSS44
DQ52
DQ53
VSS57
CK1
CK1#
VSS45
DM6
VSS32
DQ54
DQ55
VSS35
DQ60
DQ61
VSS7
DQS#7
DQS7
VSS36
DQ62
DQ63
VSS13
SA0
SA1
GNDPAD2
H2
DDR_B_D1
4
DDR_B_D0
6
8
DDR_B_DM0
10
12
DDR_B_D7
14
DDR_B_D6
16
18
DDR_B_D12
20
DDR_B_D13
22
24
DDR_B_DM1
26
28
30
32
34
36
38
40
42
DDR_B_D20
44
DDR_B_D17
46
48
NC_PM_EXTTS#1 NC_PM_EXTTS#0
50
DDR_B_DM2
52
54
DDR_B_D22
56
DDR_B_D23
58
60
DDR_B_D28
62
64
66
DDR_B_DQS#3
68
DDR_B_DQS3
70
72
DDR_B_D30
74
DDR_B_D26
76
78
80
82
DDR_B_MA15
84
DDR_B_MA14
86
88
DDR_B_MA11
90
DDR_B_MA7
92
DDR_B_MA6
94
96
DDR_B_MA4
98
DDR_B_MA2
100
DDR_B_MA0
102
104
106
108
110
112
114
DDR_B_MA13
116
118
120
122
DDR_B_D33
124
DDR_B_D32
126
128
DDR_B_DM4
130
132
DDR_B_D35
134
DDR_B_D39
136
138
DDR_B_D44
140
142
144
DDR_B_DQS#5
146
DDR_B_DQS5
148
150
DDR_B_D43
152
DDR_B_D47
154
156
DDR_B_D48
158
DDR_B_D49
160
162
164
166
168
DDR_B_DM6
170
172
DDR_B_D51
174
DDR_B_D55
176
178
DDR_B_D56 DDR_B_D57
180
DDR_B_D61
182
184
DDR_B_DQS#7
186
DDR_B_DQS7
188
190
DDR_B_D62
192
DDR_B_D63
194
196
198
200
202
204
R296
R296
10K
10K
CKE 2,3 CKE 0,1
R289 0 R289 0
R297 10K R297 10K
D
C865
C865
2.2U
2.2U
10
10
X7R
X7R
0603
0603
Place C865 2.2uF and C864 0.1uF <
500mils from DDR connector
M_CLK_DDR2 4
M_CLK_DDR#2 4
DDR_B_D[0..63] 4
DDR_B_DQS[0..7] 4
DDR_B_DQS#[0..7] 4
DDR_B_MA[0..15] 4,17
DDR_CKE3_DIMMB 4,17
DDR_B_BS1 4,17
DDR_B_RAS# 4,17
DDR_CS0_DIMMB# 4,17
M_ODT2 4,17
PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH
M_CLK_DDR2
C722
C722
1.5P/50V
1.5P/50V
M_CLK_DDR#2
M_CLK_DDR3
C720
C720
1.5P/50V
1.5P/50V
M_CLK_DDR#3
M_CLK_DDR3 4
M_CLK_DDR#3 4
+3.3V_RUN
D
E
+0.9V_DDR_REF +0.9V_DDR_REF
C864
C864
0.1U
0.1U
10
10
X7R
X7R
CPU_MEMHOT# 5
+1.8V_SUS
C829 2.2U/10V/0603 C829 2.2U/10V/0603
C826 2.2U/10V/0603 C826 2.2U/10V/0603
C828 2.2U/10V/0603 C828 2.2U/10V/0603
C382 2.2U/10V/0603 C382 2.2U/10V/0603
C381 2.2U/10V/0603 C381 2.2U/10V/0603
C443 2.2U/10V/0603 C443 2.2U/10V/0603
C440 2.2U/10V/0603 C440 2.2U/10V/0603
C383 2.2U/10V/0603 C383 2.2U/10V/0603
C441 2.2U/10V/0603 C441 2.2U/10V/0603
C429 2.2U/10V/0603 C429 2.2U/10V/0603
C436 0.1U/10V C436 0.1U/10V
C380 0.1U/10V C380 0.1U/10V
C386 0.1U/10V C386 0.1U/10V
C825 0.1U/10V C825 0.1U/10V
C378 0.1U/10V C378 0.1U/10V
C827 0.1U/10V C827 0.1U/10V
C387 0.1U/10V C387 0.1U/10V
C385 0.1U/10V C385 0.1U/10V
Note:
Place C829,C826,C828,C382,C381 and
C443,C440,C383,C441,429 close to CN5
Place C436,C380,C386,C825,C378 and
C827,C387,C385 close to CN6
+1.8V_SUS
R238
R238
C339
C339
+0.9V_DDR_REF
0.1U
0.1U
1K
1K
10
10
1%
1%
X7R
X7R
R239
R239
1K
1K
1%
1%
C343
C343
0.1U
0.1U
10
10
X7R
X7R
C347
C347
1000P
1000P
50
50
X7R
X7R
Note: Place close to DIMM
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
COMPUTER
DDRII SODIMMX2
DDRII SODIMMX2
DDRII SODIMMX2
FX6 3A
FX6 3A
FX6 3A
E
of
of
of
16 70 Tuesday, May 20, 2008
16 70 Tuesday, May 20, 2008
16 70 Tuesday, May 20, 2008
1
+0.9V_DDR_VTT
C421 0.1U/10V C421 0.1U/10V
C372 0.1U/10V C372 0.1U/10V
A A
B B
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9V_DDR_VTT
C C
C358 0.1U/10V C358 0.1U/10V
C419 0.1U/10V C419 0.1U/10V
C438 0.1U/10V C438 0.1U/10V
C360 0.1U/10V C360 0.1U/10V
C418 0.1U/10V C418 0.1U/10V
C394 0.1U/10V C394 0.1U/10V
C370 0.1U/10V C370 0.1U/10V
C359 0.1U/10V C359 0.1U/10V
C389 0.1U/10V C389 0.1U/10V
C357 0.1U/10V C357 0.1U/10V
C420 0.1U/10V C420 0.1U/10V
C355 0.1U/10V C355 0.1U/10V
C422 0.1U/10V C422 0.1U/10V
C366 0.1U/10V C366 0.1U/10V
C367 0.1U/10V C367 0.1U/10V
C417 0.1U/10V C417 0.1U/10V
C416 0.1U/10V C416 0.1U/10V
C373 0.1U/10V C373 0.1U/10V
C356 0.1U/10V C356 0.1U/10V
C371 0.1U/10V C371 0.1U/10V RP7
C393 0.1U/10V C393 0.1U/10V
C369 0.1U/10V C369 0.1U/10V
C354 0.1U/10V C354 0.1U/10V
C392 0.1U/10V C392 0.1U/10V
C379 0.1U/10V C379 0.1U/10V
C395 0.1U/10V C395 0.1U/10V
C361 0.1U/10V C361 0.1U/10V
C396 0.1U/10V C396 0.1U/10V
Note: Reserve stitching function for CN5.
+1.8V_SUS
+0.9V_DDR_VTT
C439
C439
0.1U
0.1U
16
16
X7R
X7R
+1.8V_SUS
C435
C435
0.1U
0.1U
16
16
X7R
X7R
+0.9V_DDR_VTT
+1.8V_SUS
C349
C349
*0.1U_NC
*0.1U_NC
16
16
X7R
X7R
+0.9V_DDR_VTT
2
+1.8V_SUS
C353
C353
*0.1U_NC
*0.1U_NC
16
16
X7R
X7R
+0.9V_DDR_VTT
+1.8V_SUS
C377
C377
0.1U
0.1U
16
16
X7R
X7R
+0.9V_DDR_VTT
3
+1.8V_SUS
C376
C376
*0.1U_NC
*0.1U_NC
16
16
X7R
X7R
+0.9V_DDR_VTT
+1.8V_SUS
C432
C432
*0.1U_NC
*0.1U_NC
16
16
X7R
X7R
+0.9V_DDR_VTT
+1.8V_SUS
C433
C433
0.1U
0.1U
16
16
X7R
X7R
+0.9V_DDR_VTT
4
DDR_A_BS0 4,16
DDR_CKE0_DIMMA 4,16
DDR_A_BS2 4,16
DDR_CKE1_DIMMA 4,16
DDR_A_BS1 4,16
DDR_B_BS0 4,16
DDR_B_WE# 4,16
DDR_CKE2_DIMMB 4,16
DDR_B_BS2 4,16
5
DDR_A_MA[0..15] 4,16
DDR_A_MA3
DDR_A_MA1
DDR_A_MA12
DDR_A_MA9
DDR_A_MA5
DDR_A_MA8
DDR_B_MA[0..15] 4,16
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
DDR_B_MA9
DDR_B_MA12
DDR_B_MA2
DDR_B_MA0
DDR_B_MA6
DDR_B_MA4
DDR_B_BS1 4,16
DDR_A_MA[0..15]
1
3
R254 47 R254 47
1
3
R252 47 R252 47
R251 47 R251 47
R262 47 R262 47
1
3
R265 47 R265 47
DDR_B_MA[0..15]
R277 47 R277 47
R278 47 R278 47
1
3
1
3
1
3
R275 47 R275 47
R274 47 R274 47
1
3
1
3
R292 47 R292 47
4P2R-47
4P2R-47
4P2R-47
4P2R-47
4P2R-47
4P2R-47
4P2R-47
4P2R-47
4P2R-47
4P2R-47
4P2R-47
4P2R-47
4P2R-47
4P2R-47
4P2R-47
4P2R-47
6
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
RP8
RP8
RP6
RP6
RP7
RP14
RP14
RP15
RP15
RP13
RP13
RP19
RP19
RP18
RP18
+0.9V_DDR_VTT
+0.9V_DDR_VTT
RP17
RP17
RP16
RP16
RP11
RP11
RP12
RP12
R253 47 R253 47
R257 47 R257 47
R256 47 R256 47
R258 47 R258 47
R267 47 R267 47
R264 47 R264 47
R266 47 R266 47
RP10
RP10
RP9
RP9
R255 47 R255 47
R268 47 R268 47
1
3
R279 47 R279 47
R280 47 R280 47
R293 47 R293 47
R290 47 R290 47
R294 47 R294 47
R291 47 R291 47
R281 47 R281 47
1
3
R276 47 R276 47
R295 47 R295 47
1
3
4P2R-47
4P2R-47
1
3
1
3
1
3
4P2R-47
4P2R-47
4P2R-47
4P2R-47
4P2R-47
4P2R-47
4P2R-47
4P2R-47
4P2R-47
4P2R-47
7
DDR_A_MA4
2
DDR_A_MA6
4
DDR_A_MA0
2
DDR_A_MA2
4
DDR_CS0_DIMMA#
DDR_A_RAS#
M_ODT0
DDR_A_MA11
2
DDR_A_MA7
4
DDR_A_MA14
2
DDR_A_MA15
4
DDR_A_MA10
DDR_A_MA13
DDR_B_MA14
2
DDR_B_MA11
4
DDR_CS0_DIMMB#
DDR_B_RAS#
M_ODT3
DDR_B_MA15
2
DDR_B_MA7
4
DDR_B_MA10
DDR_B_MA13
8
DDR_A_WE# 4,16
DDR_A_CAS# 4,16
DDR_CS1_DIMMA# 4,16
M_ODT1 4,16
DDR_CS0_DIMMA# 4,16
DDR_A_RAS# 4,16
M_ODT0 4,16
DDR_B_CAS# 4,16
DDR_CS1_DIMMB# 4,16
M_ODT2 4,16
DDR_CKE3_DIMMB 4,16
DDR_CS0_DIMMB# 4,16
DDR_B_RAS# 4,16
M_ODT3 4,16
Note: Reserve stitching function for CN6.
D D
+1.8V_SUS
+0.9V_DDR_VTT
C384
C384
0.1U
0.1U
16
16
X7R
X7R
+1.8V_SUS
C434
C434
*0.1U_NC
*0.1U_NC
16
16
X7R
X7R
+0.9V_DDR_VTT
1
+1.8V_SUS
C350
C350
0.1U
0.1U
16
16
X7R
X7R
+0.9V_DDR_VTT
+1.8V_SUS
C437
C437
*0.1U_NC
*0.1U_NC
16
16
X7R
X7R
+0.9V_DDR_VTT
2
+1.8V_SUS
C351
C351
*0.1U_NC
*0.1U_NC
16
16
X7R
X7R
+0.9V_DDR_VTT
+1.8V_SUS
C352
C352
*0.1U_NC
*0.1U_NC
16
16
X7R
X7R
+0.9V_DDR_VTT
3
+1.8V_SUS
C388
C388
0.1U
0.1U
16
16
X7R
X7R
+0.9V_DDR_VTT
+1.8V_SUS
C430
C430
0.1U
0.1U
16
16
X7R
X7R
+0.9V_DDR_VTT
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
4
5
6
Date: Sheet
COMPUTER
DDRII TERMINATION
DDRII TERMINATION
DDRII TERMINATION
FX6 3A
FX6 3A
FX6 3A
of
of
of
17 70 Tuesday, May 20, 2008
17 70 Tuesday, May 20, 2008
7
17 70 Tuesday, May 20, 2008
8
5
D D
PCIE_MTX_C_GRX_P[0..15] 8
PCIE_MTX_C_GRX_N[0..15] 8
C C
B B
PLTRST# 9,12,14,37,39,45
LAN_RST# 14
R159
R159
R1580R158
*0_NC
*0_NC
0
A A
PCIE_RST#
4
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0
CLK_PCIE_VGA 25
CLK_PCIE_VGA# 25
AC30
AC31
AC29
AB29
AB31
AB30
AA31
AA30
W30
W31
W29
V29
V31
V30
U31
U30
P30
P31
P29
N29
N31
N30
M31
M30
K30
K31
K29
J29
J31
J30
H31
H30
AD29
AD30
AC28
AC27
AG25
U25A
U25A
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_RX8P
PCIE_RX8N
PCIE_RX9P
PCIE_RX9N
PCIE_RX10P
PCIE_RX10N
PCIE_RX11P
PCIE_RX11N
PCIE_RX12P
PCIE_RX12N
PCIE_RX13P
PCIE_RX13N
PCIE_RX14P
PCIE_RX14N
PCIE_RX15P
PCIE_RX15N
Clock
Clock
PCIE_REFCLKP
PCIE_REFCLKN
SM BUS
SM BUS
NC_SMBCLK
NC_SMBDATA
PERSTB
M82-S A11
M82-S A11
3
PART 1 OF 6
PART 1 OF 6
P
P
C
C
I
I
-
E
E
X
X
P
P
R
R
E
E
S
S
S
S
I
I
N
N
T
T
E
E
R
R
F
F
A
A
C
C
E
E
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
Calibration
Calibration
PCIE_CALRN
PCIE_CALRP
NC_1
NC_2
AA28
AA27
AA25
AA24
Y28
Y27
Y25
Y24
V28
V27
V25
V24
T28
T27
T25
T24
P28
P27
P25
P24
M28
M27
M25
M24
L28
L27
L25
L24
J28
J27
G28
G27
AF25
AE25
AE23
AH30
PCIE_MRX_GTX_C_P15
PCIE_MRX_GTX_C_N15
PCIE_MRX_GTX_C_P14
PCIE_MRX_GTX_C_N14
PCIE_MRX_GTX_C_P13
PCIE_MRX_GTX_C_N13
PCIE_MRX_GTX_C_P12
PCIE_MRX_GTX_C_N12
PCIE_MRX_GTX_C_P11
PCIE_MRX_GTX_C_N11
PCIE_MRX_GTX_C_P10
PCIE_MRX_GTX_C_N10
PCIE_MRX_GTX_C_P9
PCIE_MRX_GTX_C_N9
PCIE_MRX_GTX_C_P8
PCIE_MRX_GTX_C_N8
PCIE_MRX_GTX_C_P7
PCIE_MRX_GTX_C_N7
PCIE_MRX_GTX_C_P6
PCIE_MRX_GTX_C_N6
PCIE_MRX_GTX_C_P5
PCIE_MRX_GTX_C_N5
PCIE_MRX_GTX_C_P4
PCIE_MRX_GTX_C_N4
PCIE_MRX_GTX_C_P3
PCIE_MRX_GTX_C_N3
PCIE_MRX_GTX_C_P2
PCIE_MRX_GTX_C_N2
PCIE_MRX_GTX_C_P1
PCIE_MRX_GTX_C_N1
PCIE_MRX_GTX_C_P0
PCIE_MRX_GTX_C_N0
R84 2K/F R84 2K/F
R83
R83
1.27K/F
1.27K/F
2
+PCIE_VDDC
1
PCIE_MRX_GTX_P[0..15] 8
PCIE_MRX_GTX_N[0..15] 8
PCIE_MRX_GTX_P0 PCIE_MRX_GTX_C_P0
PCIE_MRX_GTX_P1
PCIE_MRX_GTX_P2
PCIE_MRX_GTX_P3
PCIE_MRX_GTX_P4
PCIE_MRX_GTX_P5
PCIE_MRX_GTX_P6
PCIE_MRX_GTX_P7
PCIE_MRX_GTX_P8
PCIE_MRX_GTX_P9
PCIE_MRX_GTX_P10
PCIE_MRX_GTX_P11
PCIE_MRX_GTX_P12
PCIE_MRX_GTX_P13
PCIE_MRX_GTX_P14
PCIE_MRX_GTX_P15
PCIE_MRX_GTX_N0
PCIE_MRX_GTX_N1
PCIE_MRX_GTX_N2
PCIE_MRX_GTX_N3
PCIE_MRX_GTX_N4
PCIE_MRX_GTX_N5
PCIE_MRX_GTX_N6
PCIE_MRX_GTX_N7
PCIE_MRX_GTX_N8
PCIE_MRX_GTX_N9
PCIE_MRX_GTX_N10
PCIE_MRX_GTX_N11
PCIE_MRX_GTX_N12
PCIE_MRX_GTX_N13
PCIE_MRX_GTX_N14
PCIE_MRX_GTX_N15
C198 0.1U/ 10V C198 0.1U/ 10V
C192 0.1U/ 10V C192 0.1U/ 10V
C169 0.1U/ 10V C169 0.1U/ 10V
C178 0.1U/ 10V C178 0.1U/ 10V
C154 0.1U/ 10V C154 0.1U/ 10V
C166 0.1U/ 10V C166 0.1U/ 10V
C141 0.1U/ 10V C141 0.1U/ 10V
C151 0.1U/ 10V C151 0.1U/ 10V
C134 0.1U/ 10V C134 0.1U/ 10V
C145 0.1U/ 10V C145 0.1U/ 10V
C127 0.1U/ 10V C127 0.1U/ 10V
C129 0.1U/ 10V C129 0.1U/ 10V
C121 0.1U/ 10V C121 0.1U/ 10V
C123 0.1U/ 10V C123 0.1U/ 10V
C112 0.1U/ 10V C112 0.1U/ 10V
C117 0.1U/ 10V C117 0.1U/ 10V
C189 0.1U/ 10V C189 0.1U/ 10V
C186 0.1U/ 10V C186 0.1U/ 10V
C172 0.1U/ 10V C172 0.1U/ 10V
C171 0.1U/ 10V C171 0.1U/ 10V
C163 0.1U/ 10V C163 0.1U/ 10V
C162 0.1U/ 10V C162 0.1U/ 10V
C147 0.1U/ 10V C147 0.1U/ 10V
C148 0.1U/ 10V C148 0.1U/ 10V
C140 0.1U/ 10V C140 0.1U/ 10V
C139 0.1U/ 10V C139 0.1U/ 10V
C128 0.1U/ 10V C128 0.1U/ 10V
C133 0.1U/ 10V C133 0.1U/ 10V
C119 0.1U/ 10V C119 0.1U/ 10V
C126 0.1U/ 10V C126 0.1U/ 10V
C115 0.1U/ 10V C115 0.1U/ 10V
C114 0.1U/ 10V C114 0.1U/ 10V
PCIE_MRX_GTX_C_P1
PCIE_MRX_GTX_C_P2
PCIE_MRX_GTX_C_P3
PCIE_MRX_GTX_C_P4
PCIE_MRX_GTX_C_P5
PCIE_MRX_GTX_C_P6
PCIE_MRX_GTX_C_P7
PCIE_MRX_GTX_C_P8
PCIE_MRX_GTX_C_P9
PCIE_MRX_GTX_C_P10
PCIE_MRX_GTX_C_P11
PCIE_MRX_GTX_C_P12
PCIE_MRX_GTX_C_P13
PCIE_MRX_GTX_C_P14
PCIE_MRX_GTX_C_P15
PCIE_MRX_GTX_C_N0
PCIE_MRX_GTX_C_N1
PCIE_MRX_GTX_C_N2
PCIE_MRX_GTX_C_N3
PCIE_MRX_GTX_C_N4
PCIE_MRX_GTX_C_N5
PCIE_MRX_GTX_C_N6
PCIE_MRX_GTX_C_N7
PCIE_MRX_GTX_C_N8
PCIE_MRX_GTX_C_N9
PCIE_MRX_GTX_C_N10
PCIE_MRX_GTX_C_N11
PCIE_MRX_GTX_C_N12
PCIE_MRX_GTX_C_N13
PCIE_MRX_GTX_C_N14
PCIE_MRX_GTX_C_N15
Title
Title
Title
M82S_PCIE
M82S_PCIE
M82S_PCIE
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
FX6 3A
B
FX6 3A
B
FX6 3A
B
of
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet
18 70 Tuesday, May 20, 2008
18 70 Tuesday, May 20, 2008
18 70 Tuesday, May 20, 2008
1
5
MEMORY APERTURE SIZE SELECT
RAM_CFG0
RAM_CFG1
MEMORY
SIZE
128MB
256MB
64MB
D D
512MB
+3.3V_DELAY
MEMORY STRAPS
400MHz 256MB(32M*16) Samsung
400MHz 256MB(32M*16) Hynix
500MHz 256MB(32M*16) Samsung
500MHz 256MB(32M*16) Qimonda
+1.8V_RUN
C C
GPIO Straps
table
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO10
ATI Usage
recommended settings
+3.3V_DELAY
B B
CLK_VGA_27M_SS 25
Layout Note:
Place R476, R461, R474,
R473 close to M82.
A A
CLK_VGA_27M_NSS 25
RAM_CFG2
RAM_CFG3
R497 10K R497 10K
R489 *10K_NC R489 *10K_NC
R498 *10K_NC R498 *10K_NC
R111 *10K_NC R111 *10K_NC
GPIO13 GPIO12 GPIO11
GPIO9
0
X
001
X
X
100
X
00
1 00
RAM_CFG0
RAM_CFG1
RAM_CFG2
RAM_CFG3
RAM_TYPE
_CFG3
01
0
R468 *10K_NC R468 *10K_NC
R467 *10K_NC R467 *10K_NC
R469 10K R469 10K
R470 *10K_NC R470 *10K_NC
RAM_TYPE_CFG0
RAM_TYPE_CFG1
RAM_TYPE_CFG2
RAM_TYPE_CFG3
DESCRIPTION OF DEFAULT SETTINGS
PCIE FULL TX OUTPUT SWING
PCIE TRANSMITTER DE-EMPHASIS ENABLED
ATI reserved configuration straps.
ATI reserved configuration straps.
DEBUG SIGNALS MUXED OUT
Allows either PCIe 2.5GT/s or 5.0GT/s operation
ATI Internal use only
Serial ROM clock to ROM.
R104 10K R104 10K
R485 10K R485 10K
R480 *10K_NC R480 *10K_NC
R102 *10K_NC R102 *10K_NC
R491 *10K_NC R491 *10K_NC
R490 *10K_NC R490 *10K_NC
R106 *10K_NC R106 *10K_NC
R488 *10K_NC R488 *10K_NC
R110 10K R110 10K
R126 *10K_NC R126 *10K_NC
R100 10K R100 10K
R72 10K R72 10K
R125 10K R125 10K
0= DO NOT INSTALL RESISTOR, X = DESIGN DEPENDANT,
RSVD = ATI RESERVED (DO NOT INSTALL)
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO10
HDMI_HD_EN
TEMP_FAIL#
GFX_CLKREQ#
VGAHSYNC
Strap pin for
HDMI enable.
TEMP_FAIL#
R474 100/F R474 100/F
R473 120/F R473 120/F
5
RAM_TYPE
RAM_TYPE
_CFG2
_CFG1
RAM_TYPE
_CFG0
00
1
0 01
1
10
0 00
1
ATI
FX6
Usage
Usage
X
X
RSVD
RSVD
0
X
0
1
1
0
0
0
0
0
0
R476 *0_NC R476 *0_NC
CLK_VGA_27M_SS_R CLK_VGA_27M_SS
R462 0 R462 0
R461
R461
*10K_NC
*10K_NC
4
PANEL_BKEN 42
GFX_CORE_CNTRL0 55
THERMAL_INT# 22
TEMP_FAIL# 20
GFX_CORE_CNTRL1 55
BB_ENA 20
+1.8V_RUN
VREFG VOLTAGE DIVIDER IS
(VREFG = VDDR4,5(1.8V) / 3 = .6V)
PLACE VREF DIVIDER
AND CAP CLOSE TO ASIC
R82
R82
499/F
499/F
R74
R74
249/F
249/F
4
C94
C94
0.1U
0.1U
10
10
X7R
X7R
XTAIN
RAM_TYPE_CFG0
RAM_TYPE_CFG1
RAM_TYPE_CFG2
RAM_TYPE_CFG3
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
HDMI_HD_EN
RAM_CFG3
GPIO10
RAM_CFG0
RAM_CFG1
RAM_CFG2
T98 PAD T98 PAD
R499 0 R499 0
CLK_VGA_27M_SS_R
R113 0 R113 0
T31 PAD T31 PAD
TEMP_FAIL#
R112 0 R112 0
T99 PAD T99 PAD
GFX_CLKREQ#
R127 1K R127 1K
T37 PAD T37 PAD
T42 PAD T42 PAD
T43 PAD T43 PAD
T32 PAD T32 PAD
T21 PAD T21 PAD
T20 PAD T20 PAD
T22 PAD T22 PAD
T93 PAD T93 PAD
T94 PAD T94 PAD
+DPLL_PVDD
+PCIE_PVDD
+MPVDD
+DPLL_VDDC
R70 1K R70 1K
U25B
U25B
AJ4
TXCM_DPA0P
AJ5
TXCP_DPA0N
AL5
TX0M_DPA1P
AK5
TX0P_DPA1N
AL6
TX1M_DPA2P
AK6
TX1P_DPA2N
AK8
TX2M_DPA3P
AL8
TX2P_DPA3N
AD9
DVALID
AE7
PSYNC_NEW
AK4
DVPCNTL_MVP_0
AL3
DVPCNTL_MVP_1
V2
DVPCNTL_0
V1
DVPCNTL_1
W3
DVPCNTL_2
W1
DVPCLK
Y1
DVPDATA_0
Y2
DVPDATA_1
Y3
DVPDATA_2
AA2
DVPDATA_3
AA3
DVPDATA_4
AB1
DVPDATA_5
AB2
DVPDATA_6
AB3
DVPDATA_7
AC1
DVPDATA_8
AC3
DVPDATA_9
AD1
DVPDATA_10
AD2
DVPDATA_11
AD3
DVPDATA_12
AF3
DVPDATA_13
AG3
DVPDATA_14
AH3
DVPDATA_15
AG1
DVPDATA_16
AH2
DVPDATA_17
AH1
DVPDATA_18
AJ3
DVPDATA_19
AJ1
DVPDATA_20
AJ2
DVPDATA_21
AK2
DVPDATA_22
AK3
DVPDATA_23
Y4
GPIO_0
V3
GPIO_1
V4
GPIO_2
V5
GPIO_3
U3
GPIO_4
U2
GPIO_5
T4
GPIO_6
T5
GPIO_7_BLON
T7
GPIO_8_ROMSO
T8
GPIO_9_ROMSI
R1
GPIO_10_ROMSCK
R2
GPIO_11
R3
GPIO_12
P1
GPIO_13
P3
GPIO_14_HPD2
N1
GPIO_15_PWRCNTL0
N2
GPIO_16_SSIN
P4
GPIO_17_THERMAL_INT
P7
GPIO_18_HPD3
P8
GPIO_19_CTF
P5
GPIO_20_PWRCNTL1
V7
GPIO_21_BB_EN
N3
GPIO_22_ROMCSB
Y5
GPIO_23_CLKREQB
M4
GPIO_24_JMODE
M5
GPIO_25_TDI
M7
GPIO_26_TCK
M8
GPIO_27_TMS
L8
GPIO_28_TDO
Y8
GEN_A
Y7
GEN_B
V8
GEN_C
AH6
GEN_D_HPD4
AG6
GEN_E
AC11
VREFG
AH12
DPLL_PVDD
AG12
DPLL_PVSS
AH31
PCIE_PVDD
A9
MPVDD
B9
MPVSS
AE12
DPLL_VDDC
AJ31
XTALIN
AJ30
XTALOUT
AH26
TESTEN
AD12
PLLTEST
M82-S A11
M82-S A11
3
GENERAL
GENERAL
PURPOSE
PURPOSE
I/O
I/O
3
EXT TMDS
EXT TMDS
DVO
DVO
PLL &
PLL &
XTAL
XTAL
TEST
TEST
PART 2 OF 6
PART 2 OF 6
INTEGRATED
INTEGRATED
TMDS/DP PORT
TMDS/DP PORT
DAC1 / CRT
DAC1 / CRT
DAC2 (TV/CRT2)
DAC2 (TV/CRT2)
SERIAL
SERIAL
BUSES
BUSES
DDC3DATA_DP3_AUXN
DDC3CLK_DP3_AUXP
DDC4DATA_DP4_AUXN
DDC4CLK_DP4_AUXP
THERMAL
THERMAL
TXCM_DPB0P
TXCP_DPB0N
TX0M_DPB1P
TX0P_DPB1N
TX1M_DPB2P
TX1P_DPB2N
TX2M_DPB3P
TX2P_DPB3N
DPA_PVDD
DPA_PVSS
DPB_PVDD
DPB_PVSS
DPA_VDDR_1
DPA_VDDR_2
DPB_VDDR_1
DPB_VDDR_2
DPB_VSSR_5
DPB_VSSR_4
DPB_VSSR_3
DPB_VSSR_2
DPB_VSSR_1
DPA_VSSR_5
DPA_VSSR_4
DPA_VSSR_3
DPA_VSSR_2
DPA_VSSR_1
DP_CALR
HPD1
HSYNC
VSYNC
RSET
AVDD
AVSSQ
VDD1DI
VSS1DI
R2B
G2B
B2B
COMP
V2SYNC
H2SYNC
A2VDD
A2VDDQ
A2VSSQ
VDD2DI
VSS2DI
R2SET
SCL
SDA
DDC1DATA
DDC1CLK
DDC2DATA
DDC2CLK
TS_FDO
DPLUS
DMINUS
RB
GB
BB
R
G
B
R2
G2
B2
C
Y
AK9
AL9
AJ9
AJ10
AL10
AK10
AL11
AK11
AL7
AK7
AE11
AF11
AJ12
AJ13
AK13
AL13
AL12
AK12
AJ11
AH9
AH11
AJ8
AF7
AG7
AJ7
AH7
AG11
AA8
AL28
AK28
AL27
AK27
AL26
AK26
AK29
AK30
AJ28
AL29
AH28
AJ27
AJ26
AL17
AK17
AL15
AK15
AL14
AK14
AJ17
AJ15
AJ14
AE16
AF16
AH14
AH16
AG16
AF18
AE18
AG14
AA5
AA4
AJ29
AH29
AC5
AC4
AF4
AH4
G_DAT_DDC2_L
AF9
G_CLK_DDC2_L
AG9
AE14
AE5
AE4
+TPVDD
+DPA_VDDR
+DPB_VDDR
VIP_3
R466 0 R466 0
R458 0 R458 0
R455 0 R455 0
VGAHSYNC
R76 499/F R76 499/F
+AVDD
+VDD1D_2D
+A2VDD
+A2VDDQ
+VDD1D_2D
R96 715/F R96 715/F
LCD_DDCDAT
LCD_DDCCLK
2
R472 0 R472 0
R95 150 R95 150
R79 0 R79 0
R77 0 R77 0
2
VGA_RED
VGA_GRN
VGA_BLU
LCD_DDCDAT 26
LCD_DDCCLK 26
HDMI_SDA 28
HDMI_SCL 28
G_DAT_DDC2 27
G_CLK_DDC2 27
VGA_THERMDP 22
VGA_THERMDN 22
1
HDMI_CLK- 28
HDMI_CLK+ 28
HDMI_TX0- 28
HDMI_TX0+ 28
HDMI_TX1- 28
HDMI_TX1+ 28
HDMI_TX2- 28
HDMI_TX2+ 28
HDMI_DET 28
VGA_RED 27
VGA_GRN 27
VGA_BLU 27
VGAHSYNC 27
VGAVSYNC 27
Title
Title
Title
M82S_IO
M82S_IO
M82S_IO
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
FX6 3A
Custom
FX6 3A
Custom
FX6 3A
Custom
Date: Sheet
Date: Sheet of
Date: Sheet of
WITH M8x ASIC
INSTALL M8x STRAP RESISTORS
AND
DO NOT INSTALL M7x STRAP RESISTORS
WITH M7x ASIC
INSTALL M7x STRAP RESISTORS
AND
DO NOT INSTALL M8x STRAP RESISTORS
VGA_RED
VGA_GRN
VGA_BLU
R465
R465
R464
R464
150/F
150/F
150/F
150/F
OPTIONAL 0 OHM STRAPS TO GROUND
FOR RB,GB,BB AND R2B,G2B,B2B
SEE DAC1_RGB AND DAC2_RGB SHEETS
PLACE OR RESISTORS CLOSE TO ASIC
LCD_DDCDAT
LCD_DDCCLK
3.3V TO 5V LEVEL SHIFT LOGIC REQUIRED
IF DDC1,DDC2 USED ON M8x OR DDC1,DDC2,DDC3
(DDC4 NOT AVAILABLE) USED ON M7x
DDC3,DDC4 ARE 5V TOLERANT ON M8x
DIS only
Layout Note:
R463
R463
Place 150 ohm
150/F
150/F
termination resistors
close to ATI CHIP.
+3.3V_DELAY
R1 2.2K R1 2.2K
R5 2.2K R5 2.2K
19 70 Tuesday, May 20, 2008
19 70 Tuesday, May 20, 2008
19 70 Tuesday, May 20, 2008
1
of
5
U25E
U25E
AA26
PCIE_VSS_1
AA29
PCIE_VSS_2
AC26
PCIE_VSS_3
AD31
PCIE_VSS_4
AE29
PCIE_VSS_5
AE30
D D
C C
B B
TEMP_FAIL#
is High
active.
A A
TEMP_FAIL# 19
RUN_ON 26,42,46,49,50,52,55
5
AE31
F28
G26
G29
G30
G31
H29
L26
L29
L30
L31
M26
M29
P26
R29
R30
R31
T26
U29
V26
Y26
Y29
Y30
Y31
A13
C18
A24
A30
AA1
AA11
AA14
AA17
AA20
AA6
AC2
AC7
AE3
AL4
AD14
AF12
AF14
AD16
AD18
AE6
AG2
AE9
AH25
AK1
AK31
AJ6
AL2
AL30
C13
J25
J26
A2
B1
M82-S A11
M82-S A11
PCIE_VSS_6
PCIE_VSS_7
PCIE_VSS_8
PCIE_VSS_9
PCIE_VSS_10
PCIE_VSS_11
PCIE_VSS_12
PCIE_VSS_13
PCIE_VSS_14
PCIE_VSS_15
PCIE_VSS_16
PCIE_VSS_17
PCIE_VSS_18
PCIE_VSS_19
PCIE_VSS_20
PCIE_VSS_21
PCIE_VSS_22
PCIE_VSS_23
PCIE_VSS_24
PCIE_VSS_25
PCIE_VSS_26
PCIE_VSS_27
PCIE_VSS_28
PCIE_VSS_29
PCIE_VSS_30
PCIE_VSS_31
PCIE_VSS_32
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
2
Part 5 of 6
Part 5 of 6
PCI-Express GND
PCI-Express GND
CORE GND
CORE GND
3 1
Q74
Q74
*2N7002W-7-F_NC
*2N7002W-7-F_NC
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
R456
R456
*100K_NC
*100K_NC
B25
J8
B5
D11
C17
C22
C27
D29
C3
C6
D3
D28
F29
D4
F11
F12
F14
F16
F18
F20
F21
F23
F25
F7
F9
G3
G6
H23
J3
J4
J6
K1
L12
L15
L18
L21
L6
M11
M14
M17
M20
M6
P12
P15
P18
P21
P6
AC21
R14
R17
R20
T6
U1
U12
U15
U18
U21
AE20
V14
V17
V20
P2
V6
W2
Y12
Y15
Y18
Y21
Y6
M9
+3.3V_SUS +3.3V_SUS
U23
U23
5 3
*74AHC1G08GW_NC
*74AHC1G08GW_NC
1
4
2
R443 0 R443 0
4
+1.8V_RUN
C206
C206
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C682
C682
1U
1U
10
10
X5R
X5R
0603
0603
C197
C197
1U
1U
10
10
X5R
X5R
0603
0603
+3.3V_DELAY
C90
C90
10U
10U
6.3
6.3
X5R
X5R
0603
0603
+1.8V_RUN
C229
C229
10U
10U
6.3
6.3
X5R
X5R
0603
0603
+3.3V_DELAY +3.3V_RUN
R445
R445
75K
75K
OPTIONAL RC NETWORK
TO FINE TUNE
POWER SEQUENCING
4
C698
C698
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C687
C687
1U
1U
10
10
X5R
X5R
0603
0603
C201
C201
1U
1U
10
10
X5R
X5R
0603
0603
C635
C635
0.1U
0.1U
10
10
X5R
X5R
C146
C146
1U
1U
10
10
X5R
X5R
0603
0603
C289
C289
0.1U
0.1U
10
10
X7R
X7R
0402
0402
+BBN
3
C700
C700
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C301
C301
1U
1U
10
10
X5R
X5R
0603
0603
C208
C208
1U
1U
10
10
X5R
X5R
0603
0603
( 3.3V @ 50MA VDDR3)
C142
C142
1U
1U
10
10
X5R
X5R
0603
0603
C675
C675
1U
1U
10
10
X5R
X5R
0603
0603
+VDD_MEM_CLK0
+VDD_MEM_CLK1
Q72
Q72
SI2303BDS-T1-E3
SI2303BDS-T1-E3
3
2
3
C300
C300
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C688
C688
1U
1U
10
10
X5R
X5R
0603
0603
C205
C205
1U
1U
10
10
X5R
X5R
0603
0603
+VDD_CT
C175
C175
1U
1U
10
10
X5R
X5R
0603
0603
2
3 1
Q73
Q73
2N7002W-7-F
2N7002W-7-F
C135
C135
1U
1U
10
10
X5R
X5R
0603
0603
1
C658
C658
1U
1U
10
10
X5R
X5R
0603
0603
C159
C159
1U
1U
10
10
X5R
X5R
0603
0603
R446
R446
100K
100K
C104
C104
1U
1U
10
10
X5R
X5R
0603
0603
A15
A22
A28
H11
H12
H14
H16
H18
H20
H21
B31
AA9
AC18
AC16
AC14
AC12
AF1
AF2
AE1
AE2
AD11
A10
A19
B10
B19
V11
U11
R11
P11
J11
J20
J21
A4
A8
B8
C9
D1
H1
M1
Y9
V9
T9
L9
M2
M3
L4
U25D
U25D
VDDR1_1
VDDR1_2
VDDR1_3
VDDR1_4
VDDR1_5
VDDR1_6
VDDR1_7
VDDR1_8
VDDR1_9
VDDR1_10
VDDR1_11
VDDR1_12
VDDR1_13
VDDR1_14
VDDR1_15
VDDR1_16
VDDR1_17
VDDR1_18
VDD_CT_1
VDD_CT_2
VDD_CT_3
VDD_CT_4
VDD_CT_5
VDD_CT_6
VDD_CT_7
VDD_CT_8
VDDR3_1
VDDR3_2
VDDR3_3
VDDR3_4
VDDR4_1
VDDR4_2
VDDR5_1
VDDR5_2
RSVD_1
RSVD_2
RSVD_3
RSVD_4
VDDRH_1
VDDRH_2
VSSRH_1
VSSRH_2
BBN_1
BBN_2
BBP_1
BBP_2
M82-S A11
M82-S A11
BB_ENA 19
PART 4 OF 6
PART 4 OF 6
I/O Internal
I/O Internal
Memory
I/O
Clock
Memory
I/O
Clock
+BBN
C699
C699
1U
1U
10
10
X5R
X5R
0603
0603
Memory I/O
Memory I/O
P
P
O
O
W
W
E
E
R
R
Back Bias
Back Bias
Q33
Q33
SI2303BDS-T1-E3
SI2303BDS-T1-E3
3
2
R105
R105
10K
10K
2
PCIE_VDDR_1
PCIE_VDDR_2
PCIE_VDDR_3
PCIE_VDDR_4
PCIE_VDDR_5
PCIE_VDDR_6
PCIE_VDDR_7
PCIE_VDDR_8
PCIE_VDDC_1
PCIE_VDDC_2
PCIE_VDDC_3
PCIE_VDDC_4
PCIE_VDDC_5
PCIE_VDDC_6
PCIE_VDDC_7
PCIE_VDDC_8
PCIE_VDDC_9
PCIE_VDDC_10
PCIE_VDDC_11
PCI-Express
PCI-Express
PCIE_VDDC_12
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
Core
Core
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_24
VDDC_25
VDDC_26
VDDC_27
VDDC_28
VDDC_29
VDDC_30
VDDC_31
VDDC_32
VDDC_33
VDDCI_1
VDDCI_2
VDDCI_3
VDDCI_4
2
3 1
Q32
Q32
2N7002W-7-F
2N7002W-7-F
2
1
AF30
AF31
AF29
AF27
AF28
AG29
AG30
AG31
AA23
AC24
AC25
AE26
AE27
AE28
L23
M23
P23
T23
V23
Y23
L11
L14
L17
L20
M12
M15
M18
M21
AC20
P14
P17
P20
R12
R15
R18
R21
AD20
U14
U17
U20
V12
V15
V18
V21
Y11
Y14
Y17
Y20
AA12
AA15
AA18
AA21
P9
J12
J14
J16
J18
1
+1.8V_RUN
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
Date: Sheet of
+PCIE_VDDR
+PCIE_VDDC
C97
C97
C177
C177
C152
1U
1U
10
10
X5R
X5R
0603
0603
C188
C188
1U
1U
10
10
X5R
X5R
0603
0603
C181
C181
1U
1U
10
10
X5R
X5R
0603
0603
C150
C150
1U
1U
10
10
X5R
X5R
0603
0603
C199
C199
1U
1U
10
10
X5R
X5R
0603
0603
C152
1U
1U
10
10
X5R
X5R
0603
0603
C168
C168
1U
1U
10
10
X5R
X5R
0603
0603
C155
C155
1U
1U
10
10
X5R
X5R
0603
0603
C182
C182
1U
1U
10
10
X5R
X5R
0603
0603
C209
C209
1U
1U
10
10
X5R
X5R
0603
0603
+VCC_GFX_CORE
+5V_RUN
1
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C91
C91
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C106
C106
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C174
C174
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C193
C193
1U
1U
10
10
X5R
X5R
0603
0603
Q84
Q84
2N7002W-7-F
2N7002W-7-F
3 1
2
R524 100K R524 100K
M82S_POWER
M82S_POWER
M82S_POWER
FX6 3A
FX6 3A
FX6 3A
+VCC_GFX_CORE
C89
C89
C167
C167
1U
1U
1U
1U
10
10
10
10
X5R
X5R
X5R
X5R
0603
0603
0603
0603
C180
C180
C136
C136
1U
1U
1U
1U
10
10
10
10
X5R
X5R
X5R
X5R
0603
0603
0603
0603
C156
C156
C157
C157
1U
1U
1U
1U
10
10
10
10
X5R
X5R
X5R
X5R
0603
0603
0603
0603
C170
C170
C143
C143
1U
1U
1U
1U
10
10
10
10
X5R
X5R
X5R
X5R
0603
0603
0603
0603
L80 BLM15BD121SN1D L80 BLM15BD121SN1D
C709
C709
1U
1U
10
10
X5R
X5R
0603
0603
of
20 70 Tuesday, May 20, 2008
20 70 Tuesday, May 20, 2008
20 70 Tuesday, May 20, 2008
5
L23
+1.8V_RUN
+3.3V_DELAY
D D
+1.8V_RUN
+1.8V_RUN
+1.8V_RUN
C C
+1.8V_RUN
+1.8V_RUN
B B
+1.8V_RUN
+1.8V_RUN
+1.1V_GFX_PCIE
A A
+1.1V_GFX_PCIE
L23
*BLM15BD121SN1D_NC
*BLM15BD121SN1D_NC
L15
L15
*BLM15BD121SN1D_NC
*BLM15BD121SN1D_NC
(3.3V @ 250MA LVDDR)
L17
L17
BLM18PG471SN1D
BLM18PG471SN1D
(1.8V @ 100MA LVDDC)
(1.8V @ 400MA LVDDC,LVDDR)
L21 BLM15BD121SN1D L21 BLM15BD121SN1D
(1.8V @ 30MA LPVDD)
L78 BLM15BD121SN1D L78 BLM15BD121SN1D
(1.8V @ 40MA PCIE_PVDD)
L18 BLM15BD121SN1D L18 BLM15BD121SN1D
(1.8V @ 2MA A2VDDQ)
L76 BLM15BD121SN1D L76 BLM15BD121SN1D
(1.8V @ 65MA AVDD)
BLM15BD121SN1D L26 BLM15BD121SN1D L26
(VDD_CT 1.8V
@ 110MA (VDD_CT)
L19
L19
*BLM15BD121SN1D_NC
*BLM15BD121SN1D_NC
L14
L14
BLM15BD121SN1D
BLM15BD121SN1D
L73
L73
BLM15BD121SN1D
BLM15BD121SN1D
(1.8V @ 100MA EACH SINGLE LINK)
(1.1V @ 200MA EACH SINGLE LINK)
5
C649
C649
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C158
C158
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C100
C100
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C662
C662
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C95
C95
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C109
C109
1U
1U
10
10
X5R
X5R
0603
0603
C663
C663
1U
1U
10
10
X5R
X5R
0603
0603
C144
C144
1U
1U
10
10
X5R
X5R
0603
0603
C92
C92
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C105
C105
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C102
C102
1U
1U
10
10
X5R
X5R
0603
0603
C653
C653
1U
1U
10
10
X5R
X5R
0603
0603
C103
C103
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C647
C647
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C131
C131
0.1U
0.1U
10
10
X5R
X5R
C664
C664
0.1U
0.1U
10
10
X5R
X5R
C183
C183
0.1U
0.1U
10
10
X5R
X5R
C101
C101
1U
1U
10
10
X5R
X5R
0603
0603
C132
C132
1U
1U
10
10
X5R
X5R
0603
0603
C108
C108
0.1U
0.1U
10
10
X5R
X5R
C660
C660
0.1U
0.1U
10
10
X5R
X5R
C96
C96
1U
1U
10
10
X5R
X5R
0603
0603
C655
C655
1U
1U
10
10
X5R
X5R
0603
0603
C130
C130
0.1U
0.1U
10
10
X5R
X5R
C98
C98
0.1U
0.1U
10
10
X5R
X5R
+LPVDD
+PCIE_PVDD
+A2VDDQ
+AVDD
+VDD_CT
C110
C110
0.1U
0.1U
10
10
X5R
X5R
C651
C651
0.1U
0.1U
10
10
X5R
X5R
+3.3V_DELAY
4
+LVDDR
R750R75
0
+LVDDC
+1.8V_RUN
+1.8V_RUN
+1.8V_RUN
+1.8V_RUN
R454
R454
*0_NC
*0_NC
L72 BLM15BD121SN1D L72 BLM15BD121SN1D
(1.8V @ 40MA DPLL_PVDD)
L75 BLM15BD121SN1D L75 BLM15BD121SN1D
(3.3V @ 135MA A2VDD)
L16 BLM15BD121SN1D L16 BLM15BD121SN1D
( 1.8V @ 100MA VDD1DI,VDD2DI)
L77
L77
BLM15BD121SN1D
BLM15BD121SN1D
BLM18PG471SN1D
BLM18PG471SN1D
(1.8V @ 400MA PCIE_VDDR)
+DPA_VDDR
+DPB_VDDR
4
FOR M7x
INSTALL LVDDR TO +3.3V AND
LVDDC TO 1.8V
WITH SEPARATE FILTERS
DO NOT INSTALL STRAP RESISTOR
FOR M8x
INSTALL LVDDR AND LVDDC TO +1.8V
WITH THE ONE LVDDC FILTER
DO NOT INSTALL LVDDR FILTER
INSTALL STRAP RESISTOR
+DPLL_PVDD
C644
C644
C641
C641
C646
1U
1U
10
10
X5R
X5R
0603
0603
C657
C657
1U
1U
10
10
X5R
X5R
0603
0603
C99
C99
1U
1U
10
10
X5R
X5R
0603
0603
C138
C138
1U
1U
10
10
X5R
X5R
0603
0603
C667
C667
1U
1U
10
10
X5R
X5R
0603
0603
C646
0.1U
0.1U
10
10
X5R
X5R
C650
C650
0.1U
0.1U
10
10
X5R
X5R
C93
C93
0.1U
0.1U
10
10
X5R
X5R
C661
C661
0.1U
0.1U
10
10
X5R
X5R
C668
C668
0.1U
0.1U
10
10
X5R
X5R
+A2VDD
+VDD1D_2D
+TPVDD
+PCIE_VDDR
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C645
C645
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C107
C107
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C654
C654
10U
10U
6.3
6.3
X5R
X5R
0603
( 1.8V@ 20mA for Single link and 40mA for Dual-Link )
L79
L79
FOR M8x
INSTALL DPA_VDDR TO +1.1V AND
DPB_VDDR TO +1.1V
WITH SEPARATE FILTERS
DO NOT INSTALL STRAP RESISTOR
FOR M7x
INSTALL DPA_VDDR AND DPB_VDDR TO +1.8V
WITH THE ONE DPA_VDDR FILTER
DO NOT INSTALL DPB_VDDR FILTER
INSTALL STRAP RESISTOR
0603
C670
C670
10U
10U
6.3
6.3
X5R
X5R
0603
0603
PLACE ALL DECOUPLING AS CLOSE TO ASIC AS POSSIBLE
3
3
2
+1.8V_RUN
+1.8V_RUN
120R_2A
+1.1V_GFX_PCIE
120R_450mA
+VCC_GFX_CORE
2
1
L30
L30
BLM15BD121SN1D
BLM15BD121SN1D
C242
C242
C241
C241
1U
1U
10U
10U
10
10
6.3
6.3
X5R
X5R
X5R
X5R
0603
0603
0603
L83
L83
BLM15BD121SN1D
BLM15BD121SN1D
L20 FBM-11-160808-121-A20T L20 FBM-11-160808-121-A20T
L74
L74
BLM15BD121SN1D
BLM15BD121SN1D
L81
L81
GMLB-160808-0120L-N8
GMLB-160808-0120L-N8
Title
Title
Title
M82S_POWER RAIL SELECT
M82S_POWER RAIL SELECT
M82S_POWER RAIL SELECT
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
FX6 3A
FX6 3A
FX6 3A
Date: Sheet
Date: Sheet
Date: Sheet
0603
C721
C721
C228
C228
10U
10U
1U
1U
6.3
6.3
10
10
X5R
X5R
X5R
X5R
0603
0603
0603
0603
C165
C165
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C118
C118
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C656
C656
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C696
C696
C707
C707
1U
1U
10U
10U
10
10
6.3
6.3
X5R
X5R
X5R
X5R
0603
0603
0603
0603
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
C153
C153
1U
1U
10
10
X5R
X5R
0603
0603
C113
C113
1U
1U
10
10
X5R
X5R
0603
0603
C648
C648
1U
1U
10
10
X5R
X5R
0603
0603
+VDD_MEM_CLK0
(1.8V @ MA VDDRHA_1
INCLUDED IN VDDR1)
C231
C231
0.1U
0.1U
10
10
X5R
X5R
+VDD_MEM_CLK1
(1.8V @ MA VDDRHA_2
INCLUDED IN VDDR1)
C730
C730
0.1U
0.1U
10
10
X5R
X5R
+PCIE_VDDC
(PCIE_VDDC 1.1V @ 1A )
C173
C173
0.1U
0.1U
10
10
X5R
X5R
C122
C122
0.1U
0.1U
10
10
X5R
X5R
+DPLL_VDDC
(DPLL_VDDC 1.1V @ 100 MA)
C652
C652
0.1U
0.1U
10
10
X5R
X5R
+MPVDD
( .95V-1.1V @ 230MA MPVDD)
C702
C702
0.1U
0.1U
10
10
X5R
X5R
21 70 Tuesday, May 20, 2008
21 70 Tuesday, May 20, 2008
21 70 Tuesday, May 20, 2008
1
of
of
of
5
+1.8V_RUN
R530
R530
100/F
100/F
R526
R526
100/F
100/F
ODTA0
ODTA1
RASA0#
RASA1#
CASA0#
CASA1#
WEA0#
WEA1#
CKEA0
CKEA1
CSA0_0#
CSA1_0#
CLKA0
CLKA0#
CLKA1
CLKA1#
WDQSA[7..0]
RDQSA[7..0]
DQMA#[7..0]
MDA[63..0]
MAA[11..0]
BA[1..0]
A12
+1.8V_RUN
C706
C706
0.1U
0.1U
10
10
X7R
X7R
R156
R156
100/F
100/F
R163
R163
100/F
100/F
R136
R136
4.7K
4.7K
C243
C243
0.1U
0.1U
10
10
X7R
X7R
R137
R137
4.7K
4.7K
R120
R120
240
240
ODTA0 23
ODTA1 23
RASA0# 23
D D
C C
B B
RASA1# 23
CASA0# 23
CASA1# 23
WEA0# 23
WEA1# 23
CKEA0 23
CKEA1 23
CSA0_0# 23
CSA1_0# 23
CLKA0 23
CLKA0# 23
CLKA1 23
CLKA1# 23
WDQSA[7..0] 23
RDQSA[7..0] 23
DQMA#[7..0] 23
MDA[63..0] 23
MAA[11..0] 23
BA[1..0] 23
A12 23
PLACE MVREF DIVIDERS
AND CAPS CLOSE TO ASIC
DIVIDER RESISTORS DDR2 DDR3
MVREF TO 1.8V
MVREF TO GND
40.2R 100R
100R 100R
MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
MVREFD
MVREFS
TEST_MCLK
TEST_YCLK
MEMTEST
4
U25C
U25C
Part 3 of 6
Part 3 of 6
E29
E30
E31
D31
C29
B29
B30
A29
E26
D26
E25
D25
G23
G21
E21
D21
C28
B28
B27
A27
C25
A25
C24
B24
C23
B23
A23
B22
C20
B20
A20
C19
F30
F31
C8
C7
B7
A7
A5
C4
B4
A3
G9
E9
D9
G7
G5
F5
G4
F4
B3
B2
C2
C1
E3
F3
F2
F1
G2
G1
H3
H2
K2
L3
L2
L1
L5
L7
J7
DQ_0
DQ_1
DQ_2
DQ_3
DQ_4
DQ_5
DQ_6
DQ_7
DQ_8
DQ_9
DQ_10
DQ_11
DQ_12
DQ_13
DQ_14
DQ_15
DQ_16
DQ_17
DQ_18
DQ_19
DQ_20
DQ_21
DQ_22
DQ_23
DQ_24
DQ_25
DQ_26
DQ_27
DQ_28
DQ_29
DQ_30
DQ_31
DQ_32
DQ_33
DQ_34
DQ_35
DQ_36
DQ_37
DQ_38
DQ_39
DQ_40
DQ_41
DQ_42
DQ_43
DQ_44
DQ_45
DQ_46
DQ_47
DQ_48
DQ_49
DQ_50
DQ_51
DQ_52
DQ_53
DQ_54
DQ_55
DQ_56
DQ_57
DQ_58
DQ_59
DQ_60
DQ_61
DQ_62
DQ_63
MVREFD
MVREFS
TEST_MCLK
TEST_YCLK
MEMTEST
M82-S A11
M82-S A11
SMBCLK2 42,43
MEMORY
MEMORY
INTERFACE
INTERFACE
write strobe read strobe
write strobe read strobe
B14
MA_0
A14
MA_1
B13
MA_2
E14
MA_3
B17
MA_4
A17
MA_5
C15
MA_6
G16
MA_7
E16
MA_8
C14
MA_9
A12
MA_10
B12
MA_11
C12
MA_BA0
D14
MA_BA1
B15
MA_A12
G14
MA_BA2
D30
DQMb_0
G25
DQMb_1
C26
DQMb_2
C21
DQMb_3
C5
DQMb_4
D6
DQMb_5
D2
DQMb_6
K3
DQMb_7
C30
QS_0
D23
QS_1
B26
QS_2
B21
QS_3
B6
QS_4
E7
QS_5
E2
QS_6
J2
QS_7
C31
QS_0B
E23
QS_1B
A26
QS_2B
A21
QS_3B
A6
QS_4B
D7
QS_5B
E1
QS_6B
J1
QS_7B
E20
ODT0
C11
ODT1
A18
CLK0
A11
CLK1
B18
CLK0b
B11
CLK1b
G20
RAS0b
D12
RAS1b
D20
CAS0b
E12
CAS1b
E18
CS0b_0
G18
CS0b_1
G11
CS1b_0
E11
CS1b_1
D18
CKE0
G12
CKE1
D16
WE0b
C10
WE1b
J5
DRAM_RST
+3.3V_DELAY +3.3V_DELAY
2
3 1
Q21 2N7002W-7-F Q21 2N7002W-7-F
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
BA0
BA1
A12
BA2
DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7
RDQSA0
RDQSA1
RDQSA2
RDQSA3
RDQSA4
RDQSA5
RDQSA6
RDQSA7
WDQSA0
WDQSA1
WDQSA2
WDQSA3
WDQSA4
WDQSA5
WDQSA6
WDQSA7
ODTA0
ODTA1
CLKA0
CLKA1
CLKA0#
CLKA1#
RASA0#
RASA1#
CASA0#
CASA1#
CSA0_0#
CSA0_1#
CSA1_0#
CSA1_1#
CKEA0
CKEA1
WEA0#
WEA1#
R139 4.7K R139 4.7K
R68
R68
4.7K
4.7K
R65
R65
4.7K
4.7K
GFX_SCLK
3
T39T39
FOR DUAL RANK CONNECTIONS
T45T45
T41T41
USE THE CSxB_1 CHIP SELECT PINS
+1.8V_RUN
THERMAL_INT# 19
GFX_SCLK
GFX_SDATA
R67 *0_NC R67 *0_NC
+LVDDR
+LVDDC
+LPVDD
GPIO17_INT#
2
BIA_PWM
U25F
U25F
PART 6 OF 6
PART 6 OF 6
AF20
LVDDR_1
AG20
LVDDR_2
AJ18
LVDDC_1
AH20
LVDDC_2
AF23
LVSSR_1
AF21
LVSSR_2
AL18
LVSSR_3
AJ22
LVSSR_4
AJ25
LVSSR_5
AK18
LVSSR_6
AK23
LVSSR_7
AK25
LVSSR_8
AJ21
LVSSR_9
AL23
LVSSR_10
AL25
LVSSR_11
AG18
LPVDD
AH18
LPVSS
M82-S A11
M82-S A11
THERMAL MONITOR
U8
U8
8
SCLK
7
SDATA
6
ALERT#
5
GND
ADM1032ARM
ADM1032ARM
VDD
D+
D-
THERM#
R98 10K R98 10K
VARY_BL
Control
Control
LVDS channel
LVDS channel
TXCLK_UP
TXCLK_UN
TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N
TXCLK_LP
TXCLK_LN
TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N
+3.3V_DELAY
1
2
3
MB_THERM#
4
C659
C659
0.1U
0.1U
10
10
X7R
X7R
DIGON
AA7
AC6
AD21
AE21
AJ24
AJ23
AK24
AL24
AG21
AH21
AG23
AH23
AL19
AK19
AJ20
AJ19
AK20
AL20
AK21
AL21
AK22
AL22
BIA_PWM
T18T18
T17T17
T16T16
T96T96
C137
C137
2200P
2200P
50
50
X7R
X7R
1
BIA_PWM 26
EN_LCDVDD 26
LCD_BCLK+ 26
LCD_BCLK- 26
LCD_B0+ 26
LCD_B0- 26
LCD_B1+ 26
LCD_B1- 26
LCD_B2+ 26
LCD_B2- 26
LCD_ACLK+ 26
LCD_ACLK- 26
LCD_A0+ 26
LCD_A0- 26
LCD_A1+ 26
LCD_A1- 26
LCD_A2+ 26
LCD_A2- 26
VGA_THERMDP 19
VGA_THERMDN 19
A A
SMBDAT2 42,43
5
4
+3.3V_DELAY
2
3 1
Q19 2N7002W-7-F Q19 2N7002W-7-F
GFX_SDATA
3
MB_THERM#
THERMAL_INT#
Title
Title
Title
M82S_MEMORY/LVDS/THERM
M82S_MEMORY/LVDS/THERM
M82S_MEMORY/LVDS/THERM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
FX6 3A
Custom
FX6 3A
Custom
FX6 3A
Custom
Date: Sheet
Date: Sheet of
2
Date: Sheet of
R81 10K R81 10K
R73 10K R73 10K
1
22 70 Tuesday, May 20, 2008
22 70 Tuesday, May 20, 2008
22 70 Tuesday, May 20, 2008
+3.3V_DELAY
of
5
U12
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
NC1
NC2
NC3
NC4
NC5
NC6
U12
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10
P7
A11
R2
A12
L2
BA0
L3
BA1
B3
UDM
F3
LDM
K7
RAS
L7
CAS
K3
WE
L8
CS
K2
CKE
K9
ODT
J8
CLK
K8
CLK#
J1
VDDL
J7
VSSDL
A3
VSS_0
E3
VSS_1
J3
VSS_2
N1
VSS_3
P9
VSS_4
A7
VSSQ_0
B2
VSSQ_1
B8
VSSQ_2
D2
VSSQ_3
D8
VSSQ_4
E7
VSSQ_5
F2
VSSQ_6
F8
VSSQ_7
H2
VSSQ_8
H8
VSSQ_9
HYB18T512161B2F-20
HYB18T512161B2F-20
MDA47
G8
MDA41
G2
MDA45
H7
MDA43
H3
MDA42
H1
MDA44
H9
MDA40
F1
MDA46
F9
MDA36
C8
MDA35
C2
MDA37
D7
MDA32
D3
MDA33
D1
MDA39
D9
MDA34
B1
MDA38
B9
RDQSA4
B7
WDQSA4
A8
RDQSA5
F7
WDQSA5
E8
A2
E2
L1
R3
R7
R8
VREF_2
J2
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
+1.8V_RUN
C732
C732
0.1U
0.1U
10
10
X7R
X7R
MDA[63..0]
MAA[11..0]
WDQSA[7..0]
RDQSA[7..0]
DQMA#[7..0]
+1.8V_RUN
ODTA0
ODTA1
RASA0#
RASA1#
CASA0#
CASA1#
WEA0#
WEA1#
CKEA0
CKEA1
CSA0_0#
CSA1_0#
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
BA0
BA1
DQMA#4
DQMA#5
RASA1#
CASA1#
WEA1#
CSA1_0#
CKEA1
ODTA1
CLKA1
CLKA1#
C743
C743
0.1U
0.1U
10
10
X7R
X7R
5
BA[1..0]
A12 22
CLKA0 22
CLKA0# 22
C296
C296
0.1U
0.1U
10
10
X7R
X7R
U31
U31
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10
P7
A11
R2
A12
L2
BA0
L3
BA1
B3
UDM
F3
LDM
K7
RAS
L7
CAS
K3
WE
L8
CS
K2
CKE
K9
ODT
J8
CLK
K8
CLK#
J1
VDDL
J7
VSSDL
A3
VSS_0
E3
VSS_1
J3
VSS_2
N1
VSS_3
P9
VSS_4
A7
VSSQ_0
B2
VSSQ_1
B8
VSSQ_2
D2
VSSQ_3
D8
VSSQ_4
E7
VSSQ_5
F2
VSSQ_6
F8
VSSQ_7
H2
VSSQ_8
H8
VSSQ_9
HYB18T512161B2F-20
HYB18T512161B2F-20
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
BA0
BA1
DQMA#2
DQMA#0
RASA0#
CASA0#
WEA0#
CSA0_0#
CKEA0
ODTA0
CLKA0
CLKA0#
C276
C276
0.1U
0.1U
10
10
X7R
X7R
VDDQ_0
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
UDQS
UDQS#
LDQS
LDQS#
VREF
VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
MDA[63..0] 22
MAA[11..0] 22
WDQSA[7..0] 22
RDQSA[7..0] 22
DQMA#[7..0] 22
BA[1..0] 22
D D
ODTA0 22
ODTA1 22
+1.8V_RUN
RASA0# 22
RASA1# 22
CASA0# 22
CASA1# 22
WEA0# 22
WEA1# 22
CKEA0 22
CKEA1 22
CSA0_0# 22
CSA1_0# 22
A12 22 A12 22
CLKA1 22
CLKA1# 22
C C
B B
A A
VDDQ_0
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
C756
C756
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C718
C718
0.1U
0.1U
10
10
X7R
X7R
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
UDQS
UDQS#
LDQS
LDQS#
NC1
NC2
NC3
NC4
NC5
NC6
VREF
VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
4
G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9
B7
A8
F7
E8
A2
E2
L1
R3
R7
R8
J2
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
+1.8V_RUN
C757
C757
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C726
C726
0.1U
0.1U
10
10
X7R
X7R
4
VREF_0
R552
R552
4.99K/F
4.99K/F
C739
C739
0.1U
0.1U
10
10
X7R
X7R
MDA3
MDA7
MDA0
MDA6
MDA4
MDA2
MDA5
MDA1
MDA19
MDA23
MDA17
MDA20
MDA22
MDA16
MDA21
MDA18
RDQSA2
WDQSA2
RDQSA0
WDQSA0
+1.8V_RUN
C244
C244
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C287
C287
0.1U
0.1U
10
10
X7R
X7R
C725
C725
1U
1U
10
10
X5R
X5R
0603
0603
C744
C744
0.1U
0.1U
10
10
X7R
X7R
R190
R190
4.99K/F
4.99K/F
+1.8V_RUN
R183
R183
4.99K/F
4.99K/F
C738
C738
0.1U
0.1U
10
10
X7R
X7R
C304
C304
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C261
C261
0.1U
0.1U
10
10
X7R
X7R
+1.8V_RUN
C710
C710
0.01U
0.01U
25
25
X7R
X7R
C719
C719
0.1U
0.1U
10
10
X7R
X7R
C232
C232
1U
1U
10
10
X5R
X5R
0603
0603
C248
C248
0.1U
0.1U
10
10
X7R
X7R
3
GDDR2 32MX16 MEMORY
CLKA0
CLKA0#
R18056R180
R18556R185
56
56
C275
C275
470P
470P
R189
R189
4.99K/F
4.99K/F
C267
C267
0.01U
0.01U
25
25
X7R
X7R
C735
C735
0.1U
0.1U
10
10
X7R
C286
C286
0.1U
0.1U
10
10
X7R
X7R
X7R
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
BA0
BA1
DQMA#6
DQMA#7
RASA1#
CASA1#
WEA1#
CSA1_0#
CKEA1
ODTA1
CLKA1
CLKA1#
C268
C268
0.1U
0.1U
10
10
X7R
X7R
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
L2
L3
B3
F3
K7
L7
K3
L8
K2
K9
J8
K8
J1
J7
A3
E3
J3
N1
P9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
3
U11
U11
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
BA0
BA1
UDM
LDM
RAS
CAS
WE
CS
CKE
ODT
CLK
CLK#
VDDL
VSSDL
VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSSQ_0
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
HYB18T512161B2F-20
HYB18T512161B2F-20
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
UDQS
UDQS#
LDQS
LDQS#
NC1
NC2
NC3
NC4
NC5
NC6
VREF
VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
VDDQ_0
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
+1.8V_RUN
G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9
B7
A8
F7
E8
A2
E2
L1
R3
R7
R8
J2
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A12 22
MDA58
MDA59
MDA56
MDA57
MDA60
MDA62
MDA63
MDA61
MDA55
MDA48
MDA54
MDA50
MDA51
MDA53
MDA49
MDA52
RDQSA6
WDQSA6
RDQSA7
WDQSA7
VREF_3
+1.8V_RUN
C281
C281
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C257
C257
0.1U
0.1U
10
10
X7R
X7R
C745
C745
0.1U
0.1U
10
10
X7R
X7R
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
BA0
BA1
DQMA#3
DQMA#1
RASA0#
CASA0#
WEA0#
CSA0_0#
CKEA0
ODTA0
CLKA0
CLKA0#
C754
C754
0.1U
0.1U
10
10
X7R
X7R
+1.8V_RUN
C299
C299
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C697
C697
0.1U
0.1U
10
10
X7R
X7R
2
R174
R174
4.99K/F
4.99K/F
C262
C262
0.1U
0.1U
10
10
X7R
X7R
2
U32
U32
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10
P7
A11
R2
A12
L2
BA0
L3
BA1
B3
UDM
F3
LDM
K7
RAS
L7
CAS
K3
WE
L8
CS
K2
CKE
K9
ODT
J8
CLK
K8
CLK#
J1
VDDL
J7
VSSDL
A3
VSS_0
E3
VSS_1
J3
VSS_2
N1
VSS_3
P9
VSS_4
A7
VSSQ_0
B2
VSSQ_1
B8
VSSQ_2
D2
VSSQ_3
D8
VSSQ_4
E7
VSSQ_5
F2
VSSQ_6
F8
VSSQ_7
H2
VSSQ_8
H8
VSSQ_9
HYB18T512161B2F-20
HYB18T512161B2F-20
R173
R173
4.99K/F
4.99K/F
C247
C247
1U
1U
10
10
X5R
X5R
0603
0603
C274
C274
0.1U
0.1U
10
10
X7R
X7R
1
MDA12
G8
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
UDQS
UDQS#
LDQS
LDQS#
NC1
NC2
NC3
NC4
NC5
NC6
VREF
VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
VDDQ_0
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
C266
C266
0.01U
0.01U
25
25
X7R
X7R
Title
Title
Title
C258
C258
0.1U
0.1U
Size Document Number Rev
10
10
Size Document Number Rev
Size Document Number Rev
X7R
X7R
Date: Sheet
Date: Sheet
Date: Sheet
MDA9
G2
MDA15
H7
MDA11
H3
MDA10
H1
MDA13
H9
MDA8
F1
MDA14
F9
MDA29
C8
MDA25
C2
MDA28
D7
MDA27
D3
MDA24
D1
MDA31
D9
MDA26
B1
MDA30
B9
RDQSA3
B7
WDQSA3
A8
RDQSA1
F7
WDQSA1
E8
A2
E2
L1
R3
R7
R8
VREF_1
J2
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
M82S_DDR2_256M_16X16
M82S_DDR2_256M_16X16
M82S_DDR2_256M_16X16
FX6 3A
FX6 3A
FX6 3A
+1.8V_RUN
C695
C695
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C727
C727
0.1U
0.1U
10
10
X7R
X7R
+1.8V_RUN
C761
C761
10U
10U
6.3
6.3
X5R
X5R
0603
0603
C734
C734
0.1U
0.1U
10
10
X7R
X7R
CLKA1
CLKA1#
R560
R560
4.99K/F
4.99K/F
C741
C741
0.1U
0.1U
10
10
X7R
X7R
1
C758
C758
1U
1U
10
10
X5R
X5R
0603
0603
C748
C748
0.1U
0.1U
10
10
X7R
X7R
R55756R557
56
R559
R559
4.99K/F
4.99K/F
C733
C733
470P
470P
23 70 Tuesday, May 20, 2008
23 70 Tuesday, May 20, 2008
23 70 Tuesday, May 20, 2008
R55156R551
56
C728
C728
0.01U
0.01U
25
25
X7R
X7R
C731
C731
0.1U
0.1U
10
10
X7R
X7R
of
of
of
5
D D
4
3
2
1
C C
B B
BLANK PAGE
A A
Title
Title
Title
LVDS HYBRID
LVDS HYBRID
LVDS HYBRID
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
FX6 3A
Custom
FX6 3A
Custom
FX6 3A
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet
1
of
24 70 Tuesday, May 20, 2008
24 70 Tuesday, May 20, 2008
24 70 Tuesday, May 20, 2008
1
600 ohm +-25%@100MHz
25m ohm max DC resistance
1A current rating
+3.3V_RUN
L37
L37
FBM-11-160808-601A10T 0603
FBM-11-160808-601A10T 0603
C294
C294
10U
10U
10
10
X5R
X5R
0805
A A
0805
+3.3V_CLK
C288
C288
22U
22U
6.3
6.3
X5R
X5R
0805
0805
C298
C298
0.1U
0.1U
10
10
X7R
X7R
2
Place Decoupling Cap close to
GROUP1 each VDD pin as possibble.
C759
C759
C736
C736
0.1U
0.1U
0.1U
0.1U
10
10
10
10
X7R
X7R
X7R
X7R
3
+3.3V_CLK(40 mils)
C740
C740
C724
C724
0.1U
0.1U
0.1U
0.1U
10
10
10
10
X7R
X7R
X7R
X7R
C723
C723
0.1U
0.1U
10
10
X7R
X7R
C255
C255
0.1U
0.1U
10
10
X7R
X7R
4
5
+3.3V_RUN
L40
L40
FBM-11-160808-601A10T 0603
FBM-11-160808-601A10T 0603
+3.3V_VDDIO
C302
C302
22U
22U
6.3
6.3
X5R
X5R
0805
0805
6
Place Decoupling Cap close to
GROUP2 each VDD pin as possibble.
7
+3.3V_CLK(40 mils)
C253
C253
C280
C254
C254
0.1U
0.1U
10
10
X7R
X7R
0.1U
0.1U
10
10
X7R
X7R
C280
0.1U
0.1U
10
10
X7R
X7R
C297
C297
0.1U
0.1U
10
10
X7R
X7R
C305
C305
0.1U
0.1U
10
10
X7R
X7R
C303
C303
0.1U
0.1U
10
10
X7R
X7R
C256
C256
0.1U
0.1U
10
10
X7R
X7R
8
+3.3V_RUN
L34
L34
FBM-11-160808-601A10T
FBM-11-160808-601A10T
0603
0603
+3.3V_RUN
L38
L38
FBM-11-160808-601A10T
FBM-11-160808-601A10T
0603
0603
B B
C C
EXPRESSCARD_REQ#
Place Decoupling Cap close to
each VDD pin as possibble.
Parallel Resonance Crystal
C747 33P
C747 33P
C749 33P
C749 33P
PD#
LOM_CLKREQ#
MINI1CLK_REQ#
MINI2CLK_REQ#
MINI3CLK_REQ#
SMbus address D2
These are for
backdrive issue.
SMBDAT1 26,29,42
D D
SMBCLK1 26,29,42
1
+3VS_CLK_VDDREF
C270
C270
2.2U
2.2U
10
10
X5R
X5R
0603
0603
+3VS_CLK_VDD48
C282
C282
22U
22U
6.3
6.3
X5R
X5R
0805
0805
50
50
2 1
NPO
NPO
Y3
Y3
14.318MHZ
14.318MHZ
XTALOUT_CLK_C
50
50
NPO
NPO
R547 10K R547 10K
R775 *10K_NC R775 *10K_NC
R537 10K R537 10K
R536 10K R536 10K
R172 10K R172 10K
R184 10K R184 10K
+3.3V_RUN
+3.3V_RUN
2
Q35
Q35
3 1
2N7002W-7-F
2N7002W-7-F
+3.3V_RUN
2
Q36
Q36
3 1
2N7002W-7-F
2N7002W-7-F
C272
C272
0.1U
0.1U
10
10
X7R
X7R
C283
C283
0.1U
0.1U
10
10
X7R
X7R
R569
R569
*1M_NC
*1M_NC
R572 0 R572 0
R194
R194
2.2K
2.2K
R195
R195
2.2K
2.2K
2
EXPRESSCARD_REQ# 37
LOM_CLKREQ# 33
MINI3CLK_REQ# 40
MINI2CLK_REQ# 39
MINI1CLK_REQ# 39
CLK_SDATA
GDS
231
2N7002W-7-F
CLK_SCLK
(GROUP1)
+3.3V_VDDIO
(GROUP2)
+3.3V_CLK
XTALIN_CLK
XTALOUT_CLK
CLK_SCLK
CLK_SDATA
PD#
SEL_HTT66
SEL_SATA
SEL_27
U33
U33
4
VDDDOT
16
VDDSRC
26
VDDATIG
35
VDDSB
48
VDDCPU
55
VDDHTT
56
VDDREF
40
VDD_SATA
63
VDD48
11
VDDSRC_IO
17
VDDSRC_IO
25
VDDATIG_IO
34
VDDSB_IO
47
VDDCPU_IO
1
GND48
7
GNDDOT
10
GNDSRC
18
GNDSRC
24
GNDATIG
33
GNDSB
43
GNDSATA
46
GNDCPU
52
GNDHTT
60
GNDREF
61
X1
62
X2
2
SMBCLK
3
SMBDAT
51
PD#
23
*CLKREQ0#
38
*CLKREQ4#
39
*CLKREQ3#
44
*CLKREQ2#
45
*CLKREQ1#
SLG8SP628VTR(QFN)
SLG8SP628VTR(QFN)
Pin54/53: 66MHz 3.3V single ended HTT clock
1
Pin54/53: 100MHz differential HTT clock
0
1
Pin42/41: 100MHz No_SSC-Differential SATA clock
0
Pin42/41: 100MHz SRC clock
Pin6/5: 27 MHz / 27_SSC MHz
1
Pin6/5: 100MHz SRC clock
0
3
QFN64
QFN64
TGND
65
CPUK8_0T
CPUK8_0C
ATIG0T
ATIG0C
ATIG1T
ATIG1C
SB_SRC0T
SB_SRC0C
SB_SRC1T
SB_SRC1C
SRC0T
SRC0C
SRC1T
SRC1C
SRC2T
SRC2C
SRC3T
SRC3C
SRC4T
SRC4C
SRC7T/27M_SS
SRC7C/27M
SRC6T/SATAT
SRC6C/SATAC
HTT0T/66M
HTT0C/66M
48MHz_0
REF0/SEL_HTT66
REF1/SEL_SATA
REF2/SEL_27
4
50
49
30
29
28
27
37
36
32
31
22
21
20
19
15
14
13
12
9
8
6
5
42
41
54
53
64
59
58
57
SEL_HT66
SEL_SATA
SEL_27
CPUCLK_R
CPUCLK_R#
NB_GFX
NB_GFX#
GFX_CLK
GFX_CLK#
NB_SBLINK
NB_SBLINK#
PCIE_SB
PCIE_SB#
PCIE_EXPCARD
PCIE_EXPCARD#
PCIE_MINI1
PCIE_MINI1#
PCIE_MINI2
PCIE_MINI2#
PCIE_MINI3
PCIE_MINI3#
PCIE_LOM
PCIE_LOM#
VGA_27M_SS
VGA_27M_NSS
GPP_REFCLK
GPP_REFCLK#
NBHT
NBHT#
CLK_SB
R575 33 R575 33
SEL_HT66
SEL_SATA
R186 43.2/F R186 43.2/F
SEL_27
R561
R561
10K
10K
R562
R562
*10K_NC
*10K_NC
R176 *261/F_NC R176 *261/F_NC
CLK_SB_48M
CLK_NB_14M
CPU_CLK 5
CPU_CLK# 5
CLK_NB_GFX 9
CLK_NB_GFX# 9
CLK_PCIE_VGA 18
CLK_PCIE_VGA# 18
CLK_NB_SBLINK 9
CLK_NB_SBLINK# 9
CLK_PCIE_SB 12
CLK_PCIE_SB# 12
CLK_PCIE_EXPCARD 37
CLK_PCIE_EXPCARD# 37
CLK_PCIE_MINI1 39
CLK_PCIE_MINI1# 39
CLK_PCIE_MINI2 39
CLK_PCIE_MINI2# 39
CLK_PCIE_MINI3 40
CLK_PCIE_MINI3# 40
CLK_PCIE_LOM 33
CLK_PCIE_LOM# 33
CLK_VGA_27M_SS 19
CLK_VGA_27M_NSS 19
CLK_GPP_REFCLK 9
CLK_GPP_REFCLK# 9
HT_REFCLK 9
HT_REFCLK# 9
C271
C271
10P
10P
50
50
NPO
NPO
C753
C753
10P
10P
50
50
NPO
NPO
R182
R182
90.9/F
90.9/F
R564
R564
*10K_NC
*10K_NC
R566
R566
10K
10K
R545 0 R545 0
R543 0 R543 0
R548 0 R548 0
R550 0 R550 0
R554 0 R554 0
R558 0 R558 0
R539 0 R539 0
R538 0 R538 0
R544 0 R544 0
R546 0 R546 0
R563 0 R563 0
R565 0 R565 0
R571 0 R571 0
R574 0 R574 0
R580 0 R580 0
R581 0 R581 0
R582 0 R582 0
R583 0 R583 0
R584 0 R584 0
R585 0 R585 0
R578 0 R578 0
R579 0 R579 0
R541 0 R541 0
R540 0 R540 0
R553 0 R553 0
R549 0 R549 0
R188
R188
*10K_NC
*10K_NC
R191
R191
*10K_NC
*10K_NC
CLK_SB_48M 13
CLK_NB_14M 9
+3.3V_RUN
OSC 14M_NB
R607 R637
LEVEL
RX780
RS780
5
82R 130R
+1.8V
158R
+1.1V 90.9R
6
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
COMPUTER
CLOCK GENERATOR
CLOCK GENERATOR
CLOCK GENERATOR
FX6 3A
FX6 3A
FX6 3A
7
of
of
of
25 70 Tuesday, May 20, 2008
25 70 Tuesday, May 20, 2008
25 70 Tuesday, May 20, 2008
8
5
Symbol:
2N7002W-7-F
D(3)
G(2)
S(1)
Symbol:
D D
DTC124EUA
OUT(3)
IN(2)
C C
GS
BSS138_NL
GND(1)
RUN_ON 20,42,46,49,50,52,55
D
231
BIA_PWM 22
Design current: 560mA
Max current: 800mA
SI4835BDY-T1-E3
2
SI4835BDY-T1-E3
1
2
3
C527
C527
1000P_50V
1000P_50V
R395
R395
100K
100K
3 1
Q59
Q59
2N7002W-7-F
2N7002W-7-F
R388
R388
*2K_NC
*2K_NC
+PWR_SRC
+3.3V_RUN
R747
R747
*4.7K_NC
*4.7K_NC
40mil
R396
R396
200K
200K
R387 0 R387 0
Q64
Q64
4
BACKLITEON
8
7
6
5
+INV_PWR_SRC
40mil
4
LCD_BCLK-
R9
C2
*33_NCR9*33_NC
R10
R10
*33_NC
*33_NC
*3.3P_NCC2*3.3P_NC
C1
*3.3P_NCC1*3.3P_NC
C526
C526
0.1U
0.1U
50
50
X7R
X7R
0603
0603
LCD_BCLK+
LCD_ACLK-
LCD_ACLK+
3
JAE_FI-TD44SB-LE
JAE_FI-TD44SB-LE
2
J1
J1
44
44
43
43
42
42
41
41
40
40
39
39
38
38
37
37
36
36
35
35
34
34
33
33
32
32
31
31
30
30
29
29
28
28
27
27
26
26
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
LCD_BCLKLCD_BCLK+
LCD_B2LCD_B2+
LCD_B1LCD_B1+
LCD_B0LCD_B0+
LCD_ACLKLCD_ACLK+
LCD_A2LCD_A2+
LCD_A1LCD_A1+
LCD_A0LCD_A0+
BACKLITEON
LCD_BCLK- 22
LCD_BCLK+ 22
LCD_B2- 22
LCD_B2+ 22
LCD_B1- 22
LCD_B1+ 22
LCD_B0- 22
LCD_B0+ 22
LCD_ACLK- 22
LCD_ACLK+ 22
LCD_A2- 22
LCD_A2+ 22
LCD_A1- 22
LCD_A1+ 22
LCD_A0- 22
LCD_A0+ 22
LCD_DDCCLK 19
LCD_DDCDAT 19
+3.3V_RUN
+LCDVDD
LCD_TST 42
+INV_PWR_SRC
C7
C6
*47P_NCC7*47P_NC
*47P_NCC6*47P_NC
SMBCLK1 25,29,42
SMBDAT1 25,29,42
INVERTER_CBL_DET# 42
LCD_BAK# 42
PWM_VADJ 42
LCD_CBL_DET# 42
Adress : A9H --Contrast
AAH --Backlight
1
+LCDVDD
C4
C4
0.1U
0.1U
16
16
X5R
X5R
+3.3V_RUN
C3
C3
0.1U
0.1U
16
16
X5R
X5R
+INV_PWR_SRC
C5
C5
0.1U
0.1U
50
50
X7R
X7R
0603
0603
+15V_ALW +LCDVDD +3.3V_RUN
B B
+15V_ALW
+3.3V_RUN
R402
R402
*47K_NC
R400 *0_NC R400 *0_NC
D38
D38
EN_LCDVDD 22
A A
5
LCDVCC_TST_EN 42
4
1
2
BAT54C T/R
BAT54C T/R
3
*47K_NC
2
R398
R398
47K
47K
Q63
Q63
DDTC124EUA-7-F
DDTC124EUA-7-F
1 3
3
R399
R399
100K
100K
LCDVCC_ON
3 1
2
Q61
Q61
2N7002W-7-F
2N7002W-7-F
C530
C530
0.1U
0.1U
16
16
X5R
X5R
R394
R394
*100K_NC
*100K_NC
Q65
Q65
FDC655BN
FDC655BN
6
5
2
1
4
3
C528
C528
0.1U
0.1U
50
50
X7R
X7R
0603
0603
R393
R393
470
470
3 1
2
Q60
Q60
2N7002W-7-F
2N7002W-7-F
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
COMPUTER
LCD CONN,CK-SSCD
LCD CONN,CK-SSCD
LCD CONN,CK-SSCD
FX6 3A
FX6 3A
FX6 3A
1
of
of
of
26 70 Tuesday, May 20, 2008
26 70 Tuesday, May 20, 2008
26 70 Tuesday, May 20, 2008
A
Symbol:
BSS138_NL
D(3)
G(2)
S(1)
4 4
3 3
N(1)
VGA_RED 19
VGA_GRN 19
VGA_BLU 19
Symbol:
DA204U
P(3)N
P(2)
R434
R434
150/F
150/F
R437
R437
150/F
150/F
B
L70
L70
BLM18BB600SN1D
BLM18BB600SN1D
L68
L68
BLM18BB600SN1D
BLM18BB600SN1D
L65
L65
BLM18BB600SN1D
BLM18BB600SN1D
R447
R447
150/F
150/F
C613
C613
22P
22P
50
50
NPO
NPO
C622
C622
22P
22P
50
50
NPO
NPO
G_DAT_DDC2 19
G_CLK_DDC2 19
C637
C637
22P
22P
50
50
NPO
NPO
C
2
1
3
+3.3V_DELAY
R751
R751
4.7K
4.7K
D20
D20
*DA204U_NC
*DA204U_NC
C614
C614
10P
10P
50
50
NPO
NPO
+3.3V_RUN
R752
R752
4.7K
4.7K
1
1
Q69
Q69
BSS138_NL
BSS138_NL
1
Q70
Q70
BSS138_NL
BSS138_NL
2
2
3
2
D22
D22
*DA204U_NC
*DA204U_NC
C624
C624
10P
10P
50
50
NPO
NPO
3
3
CRT_VCC
R423
R423
6.8K
6.8K
D
+3.3V_RUN
1
R425
R425
6.8K
6.8K
3
C633
C633
10P
10P
50
50
NPO
NPO
2
D24
D24
*DA204U_NC
*DA204U_NC
T92T92
RED
GREEN
BLUE
M_ID2#
C632
C632
0.1U
0.1U
16
16
X5R
X5R
+5V_RUN
2 1
D19
D19
SDM10U45-7
SDM10U45-7
5V_CRT_REF
R430
R430
0_1206
0_1206
JVGA1
JVGA1
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
SUY_070549FR015S512ZR
SUY_070549FR015S512ZR
E
C609
C609
0.01U
0.01U
16
16
X7R
X7R
D27 SDM10U45-7 D27 SDM10U45-7
+5V_RUN
2 2
VGAHSYNC 19
VGAVSYNC 19
1 1
A
R64 39 R64 39
R57 39 R57 39
CRT_HSYNC_R
2 1
CRT_VCC
1
5 3
2 4
74AHCT1G125GW
74AHCT1G125GW
1
5 3
2 4
74AHCT1G125GW
74AHCT1G125GW
C639 0.1U/10V/X7R C639 0.1U/10V/X7R
R4 1K R4 1K
U10
U10
U4
U4
B
(3)
VGAHSYNC_R
VGAVSYNC_R CRT_VSYNC_R
R62 0 R62 0
R58 0 R58 0
HSYNC
VSYNC
CRT_VCC
L11
L11
BLM18AG121SN1D
BLM18AG121SN1D
L9
L9
BLM18AG121SN1D
BLM18AG121SN1D
C74
C74
10P
10P
50
50
NPO
NPO
C
C85
C85
10P
10P
50
50
NPO
NPO
Place near JVGA1 connector <
200 mil
D
R53
R53
R63
R63
*1K_NC
*1K_NC
*1K_NC
*1K_NC
JVGA_HS
JVGA_VS
C83
C83
C73
C73
10P
10P
10P
10P
50
50
50
50
NPO
NPO
NPO
NPO
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
COMPUTER
CRT CONN
CRT CONN
CRT CONN
FX6 3A
FX6 3A
FX6 3A
E
of
of
of
27 70 Tuesday, May 20, 2008
27 70 Tuesday, May 20, 2008
27 70 Tuesday, May 20, 2008
1
2
3
4
5
6
7
8
HDMI Connector
HDMI_TX2+_C
HDMI_TX2-_C
HDMI_TX1+_C
HDMI_TX1-_C
HDMI_TX0+_C
HDMI_TX0-_C
HDMI_CLK+_C
HDMI_CLK-_C
HDMI_CEC
HDMI_CLK
HDMI_DAT
HDMI_DET_R
L61
L61
1 2
EXC24CG240U
EXC24CG240U
R408 *0_NC R408 *0_NC
1 2
R407 *0_NC R407 *0_NC
1 2
L60
L60
1 2
EXC24CG240U
EXC24CG240U
R406 *0_NC R406 *0_NC
1 2
R405 *0_NC R405 *0_NC
1 2
L58
L58
1 2
EXC24CG240U
EXC24CG240U
R397 *0_NC R397 *0_NC
1 2
R401 *0_NC R401 *0_NC
1 2
L59
L59
1 2
EXC24CG240U
EXC24CG240U
R404 *0_NC R404 *0_NC
1 2
R403 *0_NC R403 *0_NC
1 2
for EMI
6
+5V_RUN
3 4
3 4
3 4
3 4
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
CN3
CN3
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
LTS_ABA-HDM-018-K05
LTS_ABA-HDM-018-K05
HDMI_TX2+_C
HDMI_TX2-_C
HDMI_TX1+_C
HDMI_TX1-_C
HDMI_TX0+_C
HDMI_TX0-_C
HDMI_CLK+_C
HDMI_CLK-_C
HDMI
HDMI
HDMI
FX6 3A
FX6 3A
FX6 3A
7
20
SHELL1
22
D2+
GND
D2 Shield
D2D1+
D1 Shield
D1D0+
D0 Shield
D0CK+
CK Shield
CKCE Remote
NC
DDC CLK
DDC DATA
GND
+5V
23
HP DET
GND
21
SHELL2
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
of
of
of
28 70 Tuesday, May 20, 2008
28 70 Tuesday, May 20, 2008
28 70 Tuesday, May 20, 2008
8
R26
R26
499/F
499/F
D3
D3
RB500V-40
RB500V-40
R19
R19
6.8K
6.8K
HDMI_TX2+_R
HDMI_TX2-_R
HDMI_TX1+_R
HDMI_TX1-_R
HDMI_TX0+_R
HDMI_TX0-_R
HDMI_CLK+_R
HDMI_CLK-_R
R15
R15
6.8K
6.8K
HDMI_DET_R
R410
R410
10K
10K
4
HDMI_DAT
HDMI_CLK
T1T1
HDMI_TX2+_R
HDMI_TX2-_R
HDMI_TX1+_R
HDMI_TX1-_R
HDMI_TX0+_R
HDMI_TX0-_R
HDMI_CLK+_R
HDMI_CLK-_R
5
HDMI_DET 19
C562 0.1U/10V/X7R C562 0.1U/10V/X7R
C558 0.1U/10V/X7R C558 0.1U/10V/X7R
C549 0.1U/10V/X7R C549 0.1U/10V/X7R
C548 0.1U/10V/X7R C548 0.1U/10V/X7R
C529 0.1U/10V/X7R C529 0.1U/10V/X7R
C531 0.1U/10V/X7R C531 0.1U/10V/X7R
C533 0.1U/10V/X7R C533 0.1U/10V/X7R
C532 0.1U/10V/X7R C532 0.1U/10V/X7R
R20
R20
499/F
499/F
+5V_RUN
+3.3V_DELAY
R13
R13
4.7K
4.7K
2
R16
R16
R22
R22
499/F
499/F
499/F
499/F
3 1
2
R21
R21
FDV301N
FDV301N
4.7K
4.7K
Q108
Q108
1
1
Q109
Q109
FDV301N
FDV301N
1 3
R762
R762
10K
10K
2
2
Q107
Q107
2
MMST3904-7-F
MMST3904-7-F
+3.3V_DELAY
+3.3V_DELAY +3.3V_DELAY
R12
R12
499/F
499/F
Q14
Q14
2N7002W-7-F
2N7002W-7-F
3
3
3
R23
R23
499/F
499/F
3
1
R779
R779
10K
10K
(12)
Q102
Q102
2
FDV301N
FDV301N
R24
R24
R25
R25
499/F
499/F
499/F
499/F
+5V_RUN
R409 1K R409 1K
HDMI_TX2+ 19
HDMI_TX2- 19
A A
B B
C C
D D
HDMI_TX1+ 19
HDMI_TX1- 19
HDMI_TX0+ 19
HDMI_TX0- 19
HDMI_CLK+ 19
HDMI_CLK- 19
HDMI_SDA 19
HDMI_SCL 19
1
1
A A
+5V_RUN
R433 0/0805 R433 0/0805
C607
C607
2.2U
2.2U
10
10
X5R
X5R
0805
0805
FAN1_VOUT
C625
C625
0.1U
0.1U
10
10
X7R
X7R
0402
0402
2
FAN1_PWM 42
D21
D21
*SSM34PT_NC
*SSM34PT_NC
R441 4.7K R441 4.7K
+5V_RUN
3
+5V_RUN
1
3
2
*DA204U_NC
*DA204U_NC
D28
D28
J9
J9
4
4
3
3
2
2
1
1
MLX_53398-0471
MLX_53398-0471
FAN1_TACH 42
4
5
6
7
8
Place under CPU
B B
H_THERMDA 5
Q30
Q30
MMST3904-7-F
MMST3904-7-F
C215
C215
2
*2200P/50V_NC
*2200P/50V_NC
X7R
1 3
X7R
10/20mils
10/20mils
H_THERMDC 5
+3.3V_RUN
Q45
Q45
2
2N7002W-7-F
2N7002W-7-F
C C
SMBDAT1 25,26,42
SMBCLK1 25,26,42
3 1
+3.3V_RUN
2
3 1
Q44
Q44
2N7002W-7-F
2N7002W-7-F
+3.3V_RUN
R220
R220
10K
10K
R219
R219
10K
10K
THERM_SDA
THERM_SCL
C312 close to
EMC1423.
C312
C312
2200P/50V
2200P/50V
X7R
X7R
C315
C315
2200P/50V
2200P/50V
X7R
X7R
C315 close
to EMC1423.
+3.3V_RUN
U13
U13
1
C308
C308
0.1U/10V
0.1U/10V
VDD
2
DP1
3
DN1
4
DP2
5
DN2
EMC1423 (B)
EMC1423 (B)
REM_DIODE1_P THERM_SDA
REM_DIODE1_N
H_THERMDA
H_THERMDC
SCL
SDA
ALERT#
SYS_SHDN#
GND
10
9
8
7
6
THERM_SCL
THERM_ALERT#_C
Q38
Q38
2N7002W-7-F
2N7002W-7-F
OTP 85 degree C
+3.3V_RUN
R217 10K/F R217 10K/F
R198 6.8K/F R198 6.8K/F
THERM_ALERT#_C
SYS_SHDN#
SYS_SHDN#
+3.3V_RUN
2
+3.3V_RUN
R213 *0_NC R213 *0_NC
R2151MR215
1M
3 1
2
3 1
Q42
Q42
2N7002W-7-F
2N7002W-7-F
2
C313
C313
0.1U/10V
0.1U/10V
close to IC
3 1
Q37
Q37
2N7002W-7-F
2N7002W-7-F
D39
D39
RB500V-40
RB500V-40
THERM_STP# 42,52
+3.3V_SUS
THERM_ALERT# THERM_ALERT#
R222
R222
10K
10K
THERM_ALERT# 13
D D
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet
COMPUTER
FAN/THERMAL
FAN/THERMAL
FAN/THERMAL
FX6 3A
FX6 3A
FX6 3A
7
of
of
of
29 70 Tuesday, May 20, 2008
29 70 Tuesday, May 20, 2008
29 70 Tuesday, May 20, 2008
8
1
2
3
4
5
6
7
8
+3.3V_RUN
SATA Connector.
C885
C885
*10U/10V/0805_NC
*10U/10V/0805_NC
A A
B B
+5V_HDD
C842
C842
10U/10V/0805
10U/10V/0805
CON1
CON1
GND1
RXP
RXN
GND2
TXN
TXP
GND3
3.3V_0
3.3V_1
3.3V_2
GND4
GND5
GND6
5V_0
5V_1
5V_2
GND7
GND8
12V_0
12V_1
TYCO_2006114-1
TYCO_2006114-1
Place caps close to
connector.
C870
C880
C880
*1U_10V_0603_NC
*1U_10V_0603_NC
Place caps close to
connector.
C850
C850
1U/10V/0603
1U/10V/0603
C870
*0.1U/16V_NC
*0.1U/16V_NC
C848
C848
0.1U/16V
0.1U/16V
Need check footprint
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
SATA_RXN0_C SATA_RXP1_C
SATA_RXP0_C
+3.3V_RUN
+5V_HDD
C873
C876
C876
*0.1U/16V_NC
*0.1U/16V_NC
C852
C852
0.1U/16V
0.1U/16V
C892 0.01U/16V C892 0.01U/16V
C891 0.01U/16V C891 0.01U/16V
C873
*1000P/50V_NC
*1000P/50V_NC
C866
C866
0.1U/16V
0.1U/16V
NOTE:
C892,C891 Close to CON6
C861
C861
1000P/50V
1000P/50V
SATA_TX0+ 14
SATA_TX0- 14
SATA_RX0- 14
SATA_RX0+ 14
ODD Connector.
+5V_MOD
C278
C278
*10U/10V/0805_NC
*10U/10V/0805_NC
Place caps close to
connector.
C263
GND1
RXP
RXN
GND2
TXN
TXP
GND3
5V_0
5V_1
GND
GND
GND
GND
GND
MD
DP
C263
0.1U/16V
0.1U/16V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
C273
C273
1U/10V/0603
1U/10V/0603
JMOD1
JMOD1
MOLEX_47628-1022
MOLEX_47628-1022
C716
C716
0.1U/16V
0.1U/16V
SATA_RXN1_C
C259
C259
1000P/50V
1000P/50V
C295 0.01U/16V C295 0.01U/16V
C291 0.01U/16V C291 0.01U/16V
+5V_MOD
SATA_TX1+ 14
SATA_TX1- 14
SATA_RX1- 14
SATA_RX1+ 14
Design current: 1050mA
Max current: 1500mA
C C
Design current: 700mA
Max current: 1000mA
R300
R300
*0/0805_NC
*0/0805_NC
R304
R304
100K
100K
+5V_RUN
+3.3V_ALW
3 1
R519
R519
100K
100K
2
MODC_EN 42
4
5
+5V_ALW
Q53
Q53
FDC655BN
FDC655BN
R287
R287
100K
100K
6
5
2
1
2
2
+15V_ALW
+3.3V_ALW
R310
R310
100K
100K
D D
HDDC_EN 42
1
R288
R288
100K
100K
3 1
Q55
Q55
2
2N7002W-7-F
2N7002W-7-F
Current = 115m
Current = 115m
Vgs = 20
Vgs = 20
Vds = 60
Vds = 60
Type = Single N
Type = Single N
3
HDD_EN_5V
3 1
Q54
Q54
2N7002W-7-F
2N7002W-7-F
Current = 115m
Current = 115m
Vgs = 20
Vgs = 20
Vds = 60
Vds = 60
Type = Single N
Type = Single N
4
+5V_HDD
C442
C442
4.7U
4.7U
6.3
6.3
X5R
X5R
0603
0603
C410
C410
0.1U
0.1U
50
50
X7R
X7R
0603
0603
3
+15V_ALW
R520
R520
100K
100K
Q83
Q83
2N7002W-7-F
2N7002W-7-F
Current = 115m
Current = 115m
Vgs = 20
Vgs = 20
Vds = 60
Vds = 60
Type = Single N
Type = Single N
6
+5V_ALW
R525
R525
100K
100K
Q85
Q85
FDC655BN
FDC655BN
6
5
2
1
2
+5V_MOD
4
C729
C729
10U
10U
10
3
3 1
MOD_EN
Q82
Q82
10
0805
0805
X5R
X5R
C705
2N7002W-7-F
2N7002W-7-F
Current = 115m
Current = 115m
Vgs = 20
Vgs = 20
Vds = 60
Vds = 60
Type = Single N
Type = Single N
C705
0.1U
0.1U
50
50
X7R
X7R
0603
0603
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
COMPUTER
SATA (HDD&CD_ROM)
SATA (HDD&CD_ROM)
SATA (HDD&CD_ROM)
FX6 3A
FX6 3A
FX6 3A
7
R556
R556
*0/0805_NC
*0/0805_NC
R535
R535
100K
100K
+5V_RUN
Symbol:
2N7002W-7-F
D(3)
G(2)
of
of
of
30 70 Tuesday, May 20, 2008
30 70 Tuesday, May 20, 2008
30 70 Tuesday, May 20, 2008
8
S(1)
1
+5V_SPK_AMP +5V_SPK_AMP
R726
R726
R727
R727
*100K_NC
*100K_NC
100K
100K
1 2
1 2
AUD_AMP_GAIN1
AUD_AMP_GAIN2
R720
R720
R719
A A
B B
C C
D D
R719
100K
100K
1 2
1 2
1 2
1 2
C912
C912
C901
C901
1U
1U
1U
1U
0603
0603
0603
0603
10
10
10
10
X5R
X5R
X5R
X5R
Layout Note:
Close to U41
Pin 34
HP2_JD
HP2_JD
2N7002W-7-F
2N7002W-7-F
SENSEA
1 2
R714
R714
39.2K/F
39.2K/F
3 1
Q95
Q95
2N7002W-7-F
2N7002W-7-F
NB_MUTE# 42
1 2
1 2
C923
C923
1000P
1000P
50
50
X7R
X7R
HP1_JD
2
Layout Note:
Close to U41 Pin 13
AUD_SPK_ENABLE#
EAPD#
Q96
Q96
2N7002W-7-F
2N7002W-7-F
Q97
Q97
2N7002W-7-F
2N7002W-7-F
1
*100K_NC
*100K_NC
+5V_SPK_AMP
1 2
C924
C924
0.1U
0.1U
10
10
X7R
X7R
Layout Note:
Place close
U40 pin 30.
1 2
3 1
2
Q93
Q93
R715
R715
5.1K/F
5.1K/F
+5V_SPK_AMP
1 2
3 1
2
3 1
2
GAIN1 GAIN2 GAIN
0 0 6dB
0 1 10dB
1 0 15.6dB
1 1 21.6dB
SENSEB
1 2
R705
R705
R707
R707
20K/F
20K/F
39.2K/F
39.2K/F
3 1
2
Q94
Q94
2N7002W-7-F
2N7002W-7-F
+VDDA
HP1_JD 32
R729
R729
R721
R721
100K
100K
100K
100K
1 2
2
3
LIN- HP2_OUT_L HP2_OUT_R RIN-
C918
C918
*47P_NC
*47P_NC
50
50
COH
COH
C921
C921
*47P_NC
*47P_NC
50
50
COH
COH
INTERNAL SPEAKER AMP
(2)
C917 6800P 50 1206C917 6800P 50 1206
AUD_FRONT_R
AUD_HP2_R0
R706
R706
5.1K/F
5.1K/F
1 2
1 2
C907
C907
1000P
1000P
50
50
X7R
X7R
MIC1_JD 32
R725 0
R725 0
SB_AZ_CODEC_BITCLK 13
SB_AZ_CODEC_SDIN0 13
SB_AZ_CODEC_SDOUT 13
SB_AZ_CODEC_SYNC 13
SB_AZ_CODEC_RST# 13,14,42
Depop R734, R732, R711,R740
Pop R741, R716, R731 ,R742
for using 92HD73C
R732,R741 close to U41, Let DVDD width be 10-mils
+3.3V_RUN
R733
R733
*10K_NC
*10K_NC
EAPD#
2
1 2
C916 6800P 50 1206C916 6800P 50 1206
1 2
C934
C934
1U
1U
10
10
0603
0603
AUD_HP2_L0_R
AUD_HP2_R0_R
+3.3V_RUN
DVDD
1 2
C935
C935
1U
1U
10
10
0603
0603
R7420R742
0
C932 2.2U/50V/1206 C932 2.2U/50V/1206
C927 2.2U/50V/1206 C927 2.2U/50V/1206
+VDDA
FB_60ohm+-25%_100MHz
_3A_0.05ohm DC
0805
0805
1 2
Depop R710,C920
for using 92HD73C
DMIC_DATA 32
DMIC_CLK 32
C919 1U 10 0603C919 1U 10 0603
1 2
1 2
C897
C897
10U
10U
0805
0805
10
10
C933
C933
0.1U
0.1U
10
10
R730 33 R730 33
DMIC_DATA
EAPD#
DVDD
EAPD#
DMIC_DATA
3
R794 2.2K R794 2.2K
R795 2.2K R795 2.2K
1 2
C908
C908
C898 1U
C898 1U
1U
1U
0603
0603
10
10
R710 *100K_NC R710 *100K_NC
C920 *1000P_NC C920 *1000P_NC
AZ_CODEC_SDIN0
R734 *0_NC R734 *0_NC
R732 *0_NC R732 *0_NC
R741 0 R741 0
R716 0 R716 0
R711 *0_NC R711 *0_NC
R731 0 R731 0
R740 *0_NC R740 *0_NC
LIN- AUD_FRONT_L
RIN-
HP2_OUT_L AUD_HP2_L0 AUD_SPK_R1
HP2_OUT_R
AUD_SPK_ENABLE#
AMP_HP2_EN
AUD_AMP_MUTE#
AUD_AMP_GAIN1
AUD_AMP_GAIN2
1 2
1 2
4
C928
C928
220P
220P
50
50
X7R
X7R
16 0805
16 0805
C899
C899
1U
1U
0805
0805
16
16
27
26
24
23
22
25
31
32
17
10
12
11
14
13
3
2
9
U40
U40
SPKR_INL
SPKR_INR
HP_INL
HP_INR
BIAS
SPKR_EN#
HP_EN
MUTE#
GAIN1
GAIN2
HPVDD
CPVDD
C1P
C1N
CPGND
PVSS
CPVSS
TPA6040A4
TPA6040A4
C929
C929
220P
220P
50
50
X7R
X7R
(2)
TPA6040A4
TPA6040A4
QFN 32PIN
QFN 32PIN
REGEN
AZALIA (HD) CODEC
U41
U41
1
DVDD_CORE
9
DVDD_CORE
40
DVDD
6
HDA_BITCLK
8
HDA_SDI
5
HDA_SDO
10
HDA_SYNC
11
HDA_RST#
18
NC/CD_L
19
NC/CD_GND
20
NC/CD_R
2
DMIC0/VOL_UP/GPIO1
3
DMIC1/VOL_DN/GPIO2
47
DMIC_CLK/GPIO0/SPDIF_IN
48
SPDIF_OUT_0
4
DVSS1
7
DVSS2
92HD73C/STAC9228
92HD73C/STAC9228
4
NC/VREFOUT_A
GPIO4/VREFOUT_E
GPIO3/VREFOUT_F
R713 *0_NC R713 *0_NC
1 2
OUTL+
OUTL-
OUTR+
OUTR-
HPL
HPR
REGEN
SET
VOUT
VDD
PVDD_8
PVDD_18
GND_28
PGND_5
PGND_21
AVDD
AVDD
SENSE_A
SENSE_B
PORT_A_L
PORT_A_R
PORT_B_L
PORT_B_R
VREFOUT_B
PORT_C_L
PORT_C_R
VREFOUT_C
PORT_D_L
PORT_D_R
VREFOUT_D
PORT_E_L
PORT_E_R
PORT_F_L
PORT_F_R
PORT_G_L
PORT_G_R
PORT_H_L
PORT_H_R
PC_BEEP
CAP2
VREFFILT
AVSS1
AVSS2
5
1 2
C922
C922
0.033U
0.033U
16
16
X7R
X7R
TPA6040 MAX9789
Pop Depop
C922
Depop
R713
6
7
20
19
16
15
4
1
29
30
8
18
28
5
21
25
38
13
34
39
41
37
21
22
28
23
24
29
35
36
32
14
15
31
16
17
30
43
44
45
46
12
33
27
26
42
5
R712
R712
100K
100K
AUD_AMP_MUTE#
Pop
AUD_SPK_L1
AUD_SPK_L2
AUD_SPK_R2
AUD_HP2_L1 32
AUD_HP2_R1 32
REGEN
SET
1 2
SENSEA
SENSEB SENSEB
AUD_FRONT_L
AUD_FRONT_R
AUD_HP2_L0
AUD_HP2_R0
AUD_PC_BEEP
1 2
+5V_SPK_AMP
1 2
1 2
C913
C913
1U
1U
0603
0603
10
10
Layout Note:
Place close to
pin 18.
+VDDA +3.3V_RUN
C915
C915
1U
1U
10
10
0603
0603
AUD_HP1_L 32
AUD_HP1_R 32
AUD_INT_MIC_IN 32
AUD_MIC_L 32
AUD_MIC_R 32
AUD_MIC1_VREFO 32
C896
C896
10U
10U
0805
0805
10
10
1 2
C914
C914
10U
10U
0805
0805
10
10
1 2
C909
C909
0.1U
0.1U
10
10
1 2
C900
C900
1U
1U
0603
0603
10
10
6
AUD_SPK_R1
AUD_SPK_R2
AUD_SPK_L1
AUD_SPK_L2
C938 0.1U/10/X7R C938 0.1U/10/X7R
NB_MUTE#
HP1_JD
1 2
C911
C911
0.1U
0.1U
10
10
Layout Note:
Place close U40.
C939 0.1U/10/X7R C939 0.1U/10/X7R
NB_MUTE#
SET
C926
C926
R718
R718
0.033U
0.033U
*0_NC
*0_NC
1 2
16
16
C926
R718
6
+3.3V_RUN
U42
U42
5
TC7SZ08FU(T5L,F,T)
TC7SZ08FU(T5L,F,T)
1
2
3
+VDDA
1 2
C930
C930
C925
C925
1U
1U
1U
1U
0603
0603
0603
0603
10
10
10
10
+3.3V_RUN
1
2
R717 *2.2K_NC R717 *2.2K_NC
1 2
TPA6040 MAX9789
Pop Depop
Depop
C931 1U
C931 1U
R230 0/0603 R230 0/0603
R229 0/0603 R229 0/0603
R228 0/0603 R228 0/0603
R227 0/0603 R227 0/0603
C942 0.1U/10/X7R C942 0.1U/10/X7R
AMP_HP1_SHUD_L#
4
EAPD#
7
C330
C330
100P
100P
50
50
NPO
NPO
R738 *0_NC R738 *0_NC
1 2
+3.3V_RUN
5
1
2
3
C329
C329
100P
100P
50
50
NPO
NPO
U45
U45
TC7SZ08FU(T5L,F,T)
TC7SZ08FU(T5L,F,T)
4
C328
C328
100P
100P
50
50
NPO
NPO
8
JSPK1
JSPK1
1
1
2
2
3
3
4
4
TYCO_1775295-4
TYCO_1775295-4
C327
C327
100P
100P
50
50
NPO
NPO
AMP_HP1_SHUD# 32
EMI Request
R723 0 0805R723 0 0805
1 2
R577 0 0805R577 0 0805
1 2
R722 0 0805R722 0 0805
1 2
R724 0 0603R724 0 0603
R735 0 0603R735 0 0603
R696 0 0603R696 0 0603
R736 0 0603R736 0 0603
R739 *0_NC R739 *0_NC
1 2
+3.3V_RUN
U44
U44
5
TC7SZ08FU(T5L,F,T)
TC7SZ08FU(T5L,F,T)
3
+VDDA
Pop
BEEP2 AUD_PC_BEEP BEEP1
10
10
X5R
X5R
0603
0603
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
C941 0.1U/10/X7R C941 0.1U/10/X7R
U43
U43
5
TC7SZ08FU(T5L,F,T)
C936
C936
1U
1U
0603
0603
10
10
TC7SZ08FU(T5L,F,T)
1
2
3
L101
L101
BLM21PG600SN1D
BLM21PG600SN1D
FB_60ohm+-25%_100MHz
1 2
_3A_0.05ohm DC
C937
C937
10U
10U
0805
0805
Layout Note:
10
10
Place close to
U40 pin 8.
+VDDA
C940 0.1U/16/0603 C940 0.1U/16/0603
4
3 5
AMP_HP2_EN_L
4
EAPD#
+5V_SPK_AMP +5V_RUN
1 2
R737 10K R737 10K
R728
R728
2.2K
2.2K
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
AZALIA(HD) CODEC
AZALIA(HD) CODEC
AZALIA(HD) CODEC
FX6 3A
FX6 3A
FX6 3A
7
4
Close to U41.
1
2
U46
U46
74LVC1G86GW
74LVC1G86GW
31 70 Tuesday, May 20, 2008
31 70 Tuesday, May 20, 2008
31 70 Tuesday, May 20, 2008
1 2
1 2
1 2
1 2
8
AMP_HP2_EN HP2_JD
BEEP 42
SPKR 13
of
of
of
1
Headphone Jack
Stereo MIC Jack
AUD_MIC1_VREFO 31
A A
AUD_MIC_L 31
AUD_MIC_R 31
AUD_HP2_L1 31
AUD_HP2_R1 31
B B
AUD_HP1_L1
AUD_HP1_R1
C752 2.2U/10/x5R/0805 C752 2.2U/10/x5R/0805
C779 2.2U/10/x5R/0805 C779 2.2U/10/x5R/0805
R607 0 R607 0
R615 0 R615 0
R636 0 R636 0 L98 BLM18BD601SN1D L98 BLM18BD601SN1D
R645 0 R645 0
2
R590 0 R590 0
AUD_MIC_L1
AUD_MIC_R1
AUD_HP2_L2
AUD_HP2_R2
AUD_HP1_L2
AUD_HP1_R2
C764 1U/10/X5R/0603 C764 1U/10/X5R/0603
R576
R576
R589
R589
4.7K
4.7K
4.7K
4.7K
R606
R606
R614
R614
*20K_NC
*20K_NC
*20K_NC
*20K_NC
R648
R648
R639
R639
*20K_NC
*20K_NC
*20K_NC
*20K_NC
3
L86 BLM18BD601SN1D L86 BLM18BD601SN1D
L90 BLM18BD601SN1D L90 BLM18BD601SN1D
L93 BLM18BD601SN1D L93 BLM18BD601SN1D
L95 BLM18BD601SN1D L95 BLM18BD601SN1D
L99 BLM18BD601SN1D L99 BLM18BD601SN1D
4
L86,L90,L93,L95,L98,L99
FB_600ohm+-25%_100MHz
_200mA_0.6ohm DC
AUD_MIC_L3
AUD_MIC_R3
C770
C770
C751
C751
470P
470P
470P
470P
50
50
50
50
NPO
NPO
NPO
NPO
AUD_HP2_L3
AUD_HP2_R3
C800
C800
C789
C789
470P
470P
470P
470P
50
50
50
50
NPO
NPO
NPO
NPO
AUD_HP1_L3
AUD_HP1_R3
C810
C810
C821
C821
270P
270P
270P
25
25
NPO
NPO
270P
25
25
NPO
NPO
(14)
5
R596 100K R596 100K
CON3
CON3
TYCO_1770882-1
TYCO_1770882-1
2
4
3
1
6
5
R622 100K R622 100K
CON4
CON4
TYCO_1770882-1
TYCO_1770882-1
2
4
3
1
6
5
R652 100K R652 100K
CON5
CON5
TYCO_1770882-1
TYCO_1770882-1
2
4
3
1
6
5
+3.3V_RUN
MIC1_JD 31
JACK 2 (MIC)
+3.3V_RUN
HP2_JD 31
JACK 1
(HP2)
+3.3V_RUN
HP1_JD 31
JACK 3 (HP1)
6
Array Microphone & Camera
SB_USBP11- 13
SB_USBP11+ 13
C279
C279
33P
33P
50
50
COH
COH
3
2
*1U/10V/0603_NC
*1U/10V/0603_NC
L36 0 L36 0
L35 22 L35 22
R178 100K R178 100K
U56
U56
IN1OUT
EN
GND
*TPS73601DBVR_NC
*TPS73601DBVR_NC
DMIC_DATA 31
DMIC_CLK 31
CAMERA_CBL_DET# 14
+3.3V_RUN
DMIC_DATA DMIC_CLK
C277
C277
33P
33P
50
50
COH
COH
C944
C944
7
L31
L31
1 2
*DLW21SN900SQ2L_NC
*DLW21SN900SQ2L_NC
R160 0 R160 0
R157 0 R157 0
USBP11_D+
USBP11_D+CAM_VCC
DMIC_DATA_L
DMIC_CLK_L
CAMERA_CBL_DET#
+3.6V_CAMERA
+3.3V_RUN
5
4
NC/FB
3 4
L33
L33
*BLM11A05S_NC
*BLM11A05S_NC
L32
L32
BLM11A05S
BLM11A05S
R763
R763
*100K/F_NC
*100K/F_NC
USBP11_DUSBP11_D+
C945
C945
8
JCAMERA1
JCAMERA1
I-pex_20374-010E-1
I-pex_20374-010E-1
+CAM_VCC
C265
C265
10U
10U
10
10
X5R
X5R
0805
0805
C946
C946
*20P/50V_NC
*20P/50V_NC
1
2
3
4
5
6
7
8
9
10
+3.6V_CAMERA +5V_RUN
*4.7U/6.3V/0603_NC
*4.7U/6.3V/0603_NC
R764
R764
*49.9K/F_NC
*49.9K/F_NC
Reserve for camera power
C974 270P/25V/NPO C974 270P/25V/NPO
AUD_HP1_L0
C975 270P/25V/NPO C975 270P/25V/NPO
U17
U17
(3)
9
OUTL
11
OUTR
4
NC1
6
NC2
8
NC3
12
NC4
16
NC5
20
NC6
10
SVDD
19
PVDD
2
PGND
17
SGND
21
AGND
AGND22AGND23AGND24AGND
MAX4411ETP+
MAX4411ETP+
25
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
7
AUD_HP1_L1 AUD_HP1_L0
AUD_HP1_R1
AUD_HP1_R0
(2)
R792 2.2K R792 2.2K
R793 2.2K R793 2.2K
13
INL
15
INR
14
SHDNR
18
SHDNL
1
C1P
3
C1N
5
PVSS
7
SVSS
C794
C794
2.2U
2.2U
25
25
X5R
X5R
1206
1206
Title
Title
Title
AUDIO CONN
AUDIO CONN
AUDIO CONN
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
FX6 3A
FX6 3A
FX6 3A
Date: Sheet
Date: Sheet
Date: Sheet
C C
J5
J5
2
2
1
1
MLX_53780-0270
MLX_53780-0270
D D
+VDDA +VDDA
R6201KR620
C799
C799
2.2U
2.2U
10
10
X5R
X5R
0805
0805
1K
R6251KR625
1K
R6241KR624
1K
R6191KR619
1K
C762
C762
2.2U
2.2U
10
10
X5R
X5R
0805
0805
C7900.1U/16/X7R/0603 C7900.1U/16/X7R/0603
C786 0.1U/16/X7R/0603 C786 0.1U/16/X7R/0603
1
2
Layout Note:
3
Place close to CODEC.
INT_MIC_C_L+
INT_MIC_2_L-
INT_MIC_C_L-
C798
C798
2.2U
2.2U
10
10
X5R
X5R
0805
0805
1
D31
D31
*SM05_NC
*SM05_NC
2
R591
R591
100K
100K
R587
R587
100K
100K
INT_MIC_L1+ INT_MIC_2_L+
INT_MIC_L1-
U34A
U34A
8
LM358ADR2G
LM358ADR2G
3
2
4
R603 10K R603 10K
R601 10K R601 10K
1
R598 0 R598 0
INT_MIC_L0+
INT_MIC_L0-
3
+VDDA
U34B
U34B
8
LM358ADR2G
LM358ADR2G
5
7
6
4
R597 100K R597 100K
C771
C771
0.1U
0.1U
10
10
X7R
X7R
INT_MIC_IN_OP
C782
C782
0.1U/16/X7R/0603
0.1U/16/X7R/0603
4
AUD_INT_MIC_IN 31
AUD_HP1_L 31
AUD_HP1_R 31
5
C823 2.2U/50V/1206/X7R C823 2.2U/50V/1206/X7R
C814 2.2U/50V/1206/X7R C814 2.2U/50V/1206/X7R
AMP_HP1_SHUD# 31
AUD_HP1_L_R
AUD_HP1_R_R AUD_HP1_R0
C795 2.2U/25/X5R/1206 C795 2.2U/25/X5R/1206
6
32 70 Tuesday, May 20, 2008
32 70 Tuesday, May 20, 2008
32 70 Tuesday, May 20, 2008
(14)
C338
C338
1U
1U
16
16
X5R
X5R
0805
0805
8
+3.3V_RUN
of
of
of
5
+1.2V_LOM
C763
C763
4.7U
4.7U
10
10
X5R
X5R
0805
0805
VDDP Power Decoupling
D D
+2.5V_LOM
C341
C341
0.1U
0.1U
10
10
X7R
X7R
VDDIO Power Decoupling
+3.3V_LAN
C820
C820
4.7U
4.7U
10
10
X5R
X5R
0805
0805
C C
LOM_CLKREQ# 25
R628 200/F R628 200/F
B B
C812
C812
27P
27P
50
50
NPO
NPO
Core Power Decoupling
C769
C769
C792
C792
0.1U
0.1U
0.1U
0.1U
10
10
10
10
X7R
X7R
X7R
X7R
C337
C337
0.1U
0.1U
10
10
X7R
X7R
C817
C817
C797
C797
0.1U
0.1U
0.1U
0.1U
10
10
10
10
X7R
X7R
X7R
X7R
+3.3V_LAN
LAN_XTALO
Y4
25MHzY425MHz
LAN_XTALI
2 1
C813
C813
22P
22P
50
50
NPO
NPO
C793
C793
C772
C772
0.1U
0.1U
0.1U
0.1U
10
10
10
10
X7R
X7R
X7R
X7R
C336
C336
0.1U
0.1U
10
10
X7R
X7R
R650
R650
*4.7K_NC
*4.7K_NC
LOM_CLKREQ#
R6510R651
0
C334
C334
0.1U
0.1U
10
10
X7R
X7R
C819
C819
0.1U
0.1U
10
10
X7R
X7R
+1.2V_LOM
C818
C818
0.1U
0.1U
10
10
X7R
X7R
L92
L92
BLM18AG601SN1D
BLM18AG601SN1D
L87
L87
BLM18AG601SN1D
BLM18AG601SN1D
L94
L94
BLM18AG601SN1D
BLM18AG601SN1D
L91
L91
BLM18AG601SN1D
BLM18AG601SN1D
Ensure an external
pull-up at pin 12
(WAKE#).(0725)
PCIE_RX3+/GLAN_RX+ 8
PCIE_RX3-/GLAN_RX- 8
PCIE_TX3+/GLAN_TX+ 8
PCIE_TX3-/GLAN_TX- 8
SB_PCIE_WAKE# 13,37,39,40
PLTRST_SYS# 39,40,45,51
SB_LOM_PCIE_RST# 14
CLK_PCIE_LOM 25
CLK_PCIE_LOM# 25
LAN_DISABLE#
is active
high.
LAN_DISABLE# 42
C335
C335
0.1U
0.1U
10
10
X7R
X7R
LAN_AVDDL
C766 4.7U/10V/0805 C766 4.7U/10V/0805
LAN_GPHYPLLVDDL
C765 4.7U/10V/0805 C765 4.7U/10V/0805
LAN_PCIEPLLVDDL
C787 4.7U/10V/0805 C787 4.7U/10V/0805
LAN_PCIESDSVDDL
C783 4.7U/10V/0805 C783 4.7U/10V/0805
R823 & R824: Stuff only if no
pull-ups on system side
Table 1 - Component Stuffing Requirements
INSTALL NOT INSTALL
R627,R592,R626,R210,R208,
5787M
R206,R205,R203,R201,Q91,C830,
C824,C833,C822,R649,R613,
R618,L85
A A
R586,R593,R211,R209,R207,
R200,R202,R204,R653,
R644,R611,R616.
5784
5
R586,R593,R211,R209,R207,
R200,R202,R204,R653,
R644,R611,R616.
R627,R592,R626,R210,R208,
R206,R205,R203,R201,Q91,C830,
C824,C833,C822,R649,R613,
R618,L85
4
+1.2V_LOM
4
+2.5V_LOM
C776 0.1U/10V C776 0.1U/10V
C773 0.1U/10V C773 0.1U/10V
C788 0.1U/10V C788 0.1U/10V
LAN_PCIEPLLVDDL
C780
C780
0.1U/10V
0.1U/10V
C326 0.1U/10V C326 0.1U/10V
C331 0.1U/10V C331 0.1U/10V
R646 0 R646 0
R647 *0_NC R647 *0_NC
R604
R604
4.7K
4.7K
R644 0/0805 R644 0/0805
R611 0 R611 0
R613 *0_NC R613 *0_NC
R616 0 R616 0
R618 *0_NC R618 *0_NC
LAN_PCIETXDP
LAN_PCIETXDN
+3.3V_RUN +3.3V_LAN
R6001KR600
1K
R605
R605
4.7K
4.7K
LAN_XTALO
LAN_XTALI
LAN_RDAC
R212
R212
1.24K/F
1.24K/F
LOM_CLKREQ#
+3.3V_LAN
3
+3.3V_LAN
15
19
VDDIO6VDDIO56VDDIO
VDDIO
5
VDDC_IO/VDDC
55
VDDC_IO/VDDC
13
VDDC
20
VDDC
34
VDDC
60
VDDC
BCM5784M/5787M
BCM5784M/5787M
39
AVDDL
51
AVDDL
35
GPHY_PLLVDDL
30
PCIE_PLLVDDL
27
PCIE_PLLVDDL
33
PCIE_VDDL
24
PCIE_VDDL/GND
26
PCIE_TXD_P
25
PCIE_TXD_N
31
PCIE_RXD_P
32
PCIE_RXD_N
12
WAKE#
10
PERST#
29
PCIE_REFCLK_P
28
PCIE_REFCLK_N
R6021KR602
1K
54
VAUX_PRSNT
53
VMAIN_PRSNT
3
LOW_PWR
58
TEST1/SMB_CLK
57
TEST2/SMB_DATA
22
XTALO
21
XTALI
37
RDAC
11
CLK_REQ#
VDDIO
10mm x 10mm
10mm x 10mm
Package Body
Package Body
Note:thermal pad
3
61
68-Pin QFN
68-Pin QFN
GND
69
+2.5V_LOM
R626 *0/0805_NC R626 *0/0805_NC
68
U35
U35
BIASVDDH
DC/VDDP
XTALVDDH
AVDDL/AVDDH
DC/AVDDH
DC/AVDDH
TRD3_N
TRD3_P
AVDDH/TRD2_N
TRD2_N/TRD2_P
TRD2_P/AVDDL
AVDDH/TRD1_N
TRD1_N/TRD1_P
TRD1_P/AVDDL
TRD0_N
TRD0_P
LINKLED#
SPD100LED#
SPD1000LED#
TRAFFICLED#
GPIO2
UART_MODE
GPIO1_SERIALDI
GPIO0_SERIALDO
SCLK_EECLK
SO_EEDATA
ENERGY_DET
VDDC_IO/VDDP
REGOUT12_IO/REGCTL25
REGCTL12
SUPER_IDDQ/GND
2
Need check footprint
LAN_BIASVDDH
36
LAN_XTALVDDH
23
R593 0 R593 0
45
R592 *0_NC R592 *0_NC
38
C775 0.1U/10V C775 0.1U/10V
52
C781 0.1U/10V C781 0.1U/10V
49
50
AVDDH_LAN_TRD2N
48
LAN_TRD2N_TRD2P
47
LAN_TRD2P_AVDDL
46
AVDDH_LAN_TRD1N
42
LAN_TRD1N_TRD1P
43
LAN_TRD1P_AVDDL
44
41
40
2
1
67
66
8
9
7
4
65
63
SI
64
62
CS#
Pin 59 : Connect with GPIO to detect
RJ45 cable insert or not. if not used,
please NC.
59
+2.5V_LOM
17
LAN_REGCTL25
18
R926 is required only if Q1 can
not dissipate the required power
LAN_REGCTL12
14
R642 0 R642 0
16
R245 *20K_NC R245 *20K_NC
5784M 5787M
39k
R245
20k *20k_NC
2
TRD3- 34
TRD3+ 34 TRD2- 34
TRD0- 34
TRD0+ 34
LINKLED# 34
SPD100LED# 34
SPD1000LED# 34
IO_LOM_ACTLED_YEL# 34
T53T53
BCM_WP
BCM_SCL
SI
BCM_SDA
CS#
LAN_ENERGY_DET
R653 0 R653 0
R654 1
R654 1
Q92
Q92
1
MMJT9435T1G
MMJT9435T1G
2 3
4
0 R642
1
+3.3V_LAN +2.5V_LOM
R586
R586
R627
R627
0/0805
0/0805
*0/0805_NC
*0/0805_NC
L88 BLM18AG601SN1D L88 BLM18AG601SN1D
C774 0.1U/10V C774 0.1U/10V R649 *0/0805_NC R649 *0/0805_NC
L96 BLM18AG601SN1D L96 BLM18AG601SN1D
LAN_AVDDL
LAN_AVDDH
R612
R612
4.7K
4.7K
1W
1W
2512
2512
C802 0.1U/10V C802 0.1U/10V
L89 BLM18AG601SN1D L89 BLM18AG601SN1D
R210 *0_NC R210 *0_NC
R211 0 R211 0
LAN_TRD2N_TRD2P
LAN_TRD2P_AVDDL
LAN_TRD1N_TRD1P
LAN_TRD1P_AVDDL
+3.3V_LAN
R608
R608
4.7K
4.7K
T52T52
+3.3V_LAN
LAN_DISABLE# 42
Title
Title
Title
LAN(BCM5784M/5787M)
LAN(BCM5784M/5787M)
LAN(BCM5784M/5787M)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
FX6 3A
Custom
FX6 3A
Custom
FX6 3A
Custom
Date: Sheet
Date: Sheet
Date: Sheet
R208 *0_NC R208 *0_NC
R209 0 R209 0
R206 *0_NC R206 *0_NC
R207 0 R207 0
R201 *0_NC R201 *0_NC
R200 0 R200 0
R203 *0_NC R203 *0_NC
R202 0 R202 0
R205 *0_NC R205 *0_NC
R204 0 R204 0
R609
R609
*4.7K_NC
*4.7K_NC
R919 & R922: Stuff only if U8 is installed
C796
C796
0.1U
0.1U
10
10
X7R
X7R
C832
C832
0.1U
0.1U
10
10
X7R
X7R
BCM_SCL
SI
CS#
C801
C801
4.7U
4.7U
10
10
X5R
X5R
0805
0805
+1.2V_LOM
C831
C831
10U
10U
10
10
X7R
X7R
0805
0805
8
7
6
5
1
Place one cap close to each
of the pins, 38,45, and 52
TRD2LAN_AVDDH AVDDH_LAN_TRD2N
TRD2+
TRD2-
LAN_AVDDL
TRD2+
TRD1LAN_AVDDH AVDDH_LAN_TRD1N
TRD1+
TRD1-
LAN_AVDDL
TRD1+
U36
U36
VCC
NC
SCL
SDA
24LC02BT-I/STG
24LC02BT-I/STG
1
A0
2
A1
3
A2
4
VSS
R610 4.7K R610 4.7K
R621 4.7K R621 4.7K
R617 4.7K R617 4.7K
Q91
Q91
*MMJT9435T1G_NC
*MMJT9435T1G_NC
2 3
4
1
*0.1U_NC
*0.1U_NC
33 70 Tuesday, May 20, 2008
33 70 Tuesday, May 20, 2008
33 70 Tuesday, May 20, 2008
+3.3V_LAN
+3.3V_LAN
C830
C830
10
10
X7R
X7R
C833
C833
*0.1U_NC
*0.1U_NC
10
10
X7R
X7R
of
of
of
C791
C791
0.1U
0.1U
10
10
X7R
X7R
+2.5V_LOM
TRD2+ 34
TRD1- 34
TRD1+ 34
C824
C824
*4.7U_NC
*4.7U_NC
10
10
X5R
X5R
0805
0805
C822
C822
*10U_NC
*10U_NC
10
10
X7R
X7R
0805
0805
A
B
C
D
E
RJ-45 Connector
CON2
R568 330 R568 330
+3.3V_LAN
RJ45-TX3RJ45-TX3+
RJ45-TX1RJ45-TX2RJ45-TX2+
RJ45-TX1+
RJ45-TX0RJ45-TX0+
2
2
+3.3V_LAN
10K
10K
+3.3V_LAN
10K
10K
IO_LOM_ACTLED_YEL# 33
1 3
47K
47K
1 3
47K
47K
Q86
Q86
DDTA114YUA-7-F
DDTA114YUA-7-F
R567 330 R567 330
Q87
Q87
DDTA114YUA-7-F
DDTA114YUA-7-F
R570 330 R570 330
4 4
TRANSFORM
L84
L84
CHIP SIDE MEDIA SIDE
TRD3+ 33
TRD3- 33
TRD2+ 33
TRD2- 33
TRD1+ 33
TRD1- 33
3 3
TRD0+ 33
TRD0- 33
TRD3+
TRD3TDCT
TDCT
TRD2+
TRD2TRD1+
TRD1TDCT
TDCT
TRD0+
TRD0-
1
2
3
4
5
6
7
8
9
10
11
12
TD0+
TD0TDCT0
TDCT1
TD1+
TD1TD2+
TD2TDCT2
TDCT3
TD3+
TD3-
LFE9283-R
LFE9283-R
CHIP SIDE MEDIA SIDE
1:1
1:1
1:1
1:1
1:1
1:1
1:1
1:1
TX0+
TX0TXCT0
TXCT1
TX1+
TX1-
TX2+
TX2TXCT2
TXCT3
TX3+
TX3-
RJ45-TX3+
24
RJ45-TX3-
23
TXCT3
22
TXCT2
21
RJ45-TX2+
20
RJ45-TX2-
19
RJ45-TX1+
18
RJ45-TX1-
17
TXCT1
16
TXCT0
15
RJ45-TX0+
14
RJ45-TX0-
13
SPD100LED# 33
+3.3V_LAN
R774
R774
4.7K
4.7K
SPD1000LED# 33
LINKLED# 33
D29
D29
2 1
SDMK0340L-7-F
SDMK0340L-7-F
D36
D36
2 1
SDMK0340L-7-F
SDMK0340L-7-F
D37
D37
2 1
SDMK0340L-7-F
SDMK0340L-7-F
D30
D30
2 1
SDMK0340L-7-F
SDMK0340L-7-F
12
13
8
7
6
5
4
3
2
1
10
9
11
CON2
LED_YN
LED_YP
8
7
6
5
4
3
2
1
LED_GND
LED_GN/AP
LED_GP/AN
Y
Y
OG
OG
CHSGND114CHSGND2
15
pop L85 for 5787M.
+2.5V_LOM
TRD3+
depop L85 for 5784M.
2 2
1 1
A
TRD3TRD2+
TRD2TRD1+
TRD1TRD0+
TRD0-
C953 6.8P 50C953 6.8P 50
C954 6.8P 50C954 6.8P 50
C955 6.8P 50C955 6.8P 50
C956 6.8P 50C956 6.8P 50
C957 6.8P 50C957 6.8P 50
C958 6.8P 50C958 6.8P 50
C959 6.8P 50C959 6.8P 50
C960 6.8P 50C960 6.8P 50
0603 package.
L85
L85
R555
R555
*BLM18AG601SN1D_NC
*BLM18AG601SN1D_NC
*0_NC
*0_NC
0603
0603
C708
C717
C717
0.1U
0.1U
10
10
X7R
X7R
B
C737
C737
0.1U
0.1U
10
10
X7R
X7R
C708
0.1U
0.1U
10
10
X7R
X7R
C
C742
C742
0.1U
0.1U
10
10
X7R
X7R
TXCT0
TXCT1
TXCT2
TXCT3
TDCT
TDCT
TDCT
TDCT
Reserved for EMI.
R187 75/F R187 75/F
R181 75/F R181 75/F
R165 75/F R165 75/F
R162 75/F R162 75/F
C226
C226
1000P
1000P
3K
3K
NPO
NPO
1808
1808
D
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
+3.3V_LAN
R231 0
R231 0
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
LAN SWITCH
LAN SWITCH
LAN SWITCH
FX6 3A
FX6 3A
FX6 3A
+3.3V_SUS
0603
0603
E
of
of
of
34 70 Tuesday, May 20, 2008
34 70 Tuesday, May 20, 2008
34 70 Tuesday, May 20, 2008
5
+3.3V_R5C833
C495
C495
10U
10U
10
10
X5R
X5R
0805
0805
D D
C513
C492
C492
10U
10U
10
10
X5R
X5R
0805
0805
C513
0.01U
0.01U
25
25
X7R
X7R
PCI Bus
C455
C455
0.01U
0.01U
25
25
X7R
X7R
C452
C452
0.1U
0.1U
10
10
X7R
X7R
PCI_AD[31..0] 12
C512
C512
0.01U
0.01U
25
25
X7R
X7R
C458
C458
0.01U
0.01U
25
25
X7R
X7R
C453
C453
0.01U
0.01U
25
25
X7R
X7R
Place the power caps close
to the relation pins.
C470
C470
0.01U
0.01U
25
25
X7R
X7R
C451
C451
0.01U
0.01U
25
25
X7R
X7R
PowerOnReset for VccCore
C C
+3.3V_R5C833
R373
R373
100K
100K
C516
C516
1U
GBRST# should be asserted only
when system power supply is on.
1U
10
10
X5R
X5R
0603
0603
PCI Bus
PCI_PAR 12
PCI_C_BE3# 12
PCI_C_BE2# 12
B B
CoreLogic CLOCKRUN#
The ICH schematics need to include a
pull-up resistor to implement CLKRUN#,
and the ICH schematics must have a
pull-down, or constantly drive thesignal
A A
low, in order to disable CLKRUN#.
PCI_C_BE1# 12
PCI_C_BE0# 12
PCI_REQ1# 12
PCI_GNT1# 12
PCI_FRAME# 12
PCI_IRDY# 12
PCI_TRDY# 12
PCI_DEVSEL# 12
PCI_STOP# 12
PCI_PERR# 12
PCI_SERR# 12
PCI_RST# 12
CLK_PCI_PCCARD 12
SB_PME# 13,42
CLKRUN# 12,42
5
PCI_AD17
R308 100 R308 100
R372 *0_NC R372 *0_NC
C456
C456
0.01U
0.01U
25
25
X7R
X7R
4
C468
C468
0.01U
0.01U
25
25
X7R
X7R
C480
C480
0.47U
0.47U
10
10
X7R
X7R
0603
0603
CLK_PCI_PCCARD
4
C507
C507
0.47U
0.47U
10
10
X7R
X7R
0603
0603
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
+3.3V_R5C833
R32733R327
33
C475
C475
12P
12P
50
50
COG
COG
U19B
U19B
10
VCC_PCI1
20
VCC_PCI2
27
VCC_PCI3
32
VCC_PCI4
41
VCC_PCI5
128
VCC_PCI6
61
VCC_RIN
16
VCC_ROUT1
34
VCC_ROUT2
64
VCC_ROUT3
114
VCC_ROUT4
120
VCC_ROUT5
125
AD31
126
AD30
127
AD29
1
AD28
2
AD27
3
AD26
5
AD25
6
AD24
9
AD23
11
AD22
12
AD21
14
AD20
15
AD19
17
AD18
18
AD17
19
AD16
36
AD15
37
AD14
38
AD13
39
AD12
40
AD11
42
AD10
43
AD9
44
AD8
46
AD7
47
AD6
48
AD5
49
AD4
50
AD3
51
AD2
52
AD1
53
AD0
33
PAR
7
C/BE3#
21
C/BE2#
35
C/BE1#
45
C/BE0#
8
IDSEL
124
REQ#
123
GNT#
23
FRAME#
24
IRDY#
25
TRDY#
26
DEVSEL#
29
STOP#
30
PERR#
31
SERR#
71
GBRST#
119
PCIRST#
121
PCICLK
70
PME#
117
CLKRUN#
R5C833T_V00
R5C833T_V00
HWSPND#
PCI / OTHER
PCI / OTHER
UDIO0/SRIRQ#
3
VCC_3V
VCC_MD
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
AGND1
AGND2
AGND3
AGND4
AGND5
MSEN
XDEN
UDIO5
UDIO3
UDIO4
UDIO2
UDIO1
INTA#
INTB#
TEST
AJ5C8320H00
3
67
86
4
13
22
28
54
62
63
68
118
122
99
102
103
107
111
69
58
55
57
65
59
56
60
72
115
116
66
+3.3V_R5C833
R370
R370
100K
100K
Place the power caps close
to the relation pins.
C497
C497
10U
10U
10
10
X5R
X5R
0805
0805
Route to GPIOG6 (pin 94) on the
SIO companion chip ECE5011, with
the signal named CB_HWSPND#
+3.3V_R5C833
R371
R371
10K
10K
C477
C477
0.01U
0.01U
25
25
X7R
X7R
T83 PAD T83 PAD
2
IRQ_SERIRQ 12,42
PCI Bus
PCI_PIRQB# 12
PCI_PIRQA# 12
2
+3.3V_RUN
+3.3V_R5C833
R347
R347
10K
10K
1394 Interrupt
Media card Interrupt
Title
Title
Title
R5C833/PCI
R5C833/PCI
R5C833/PCI
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
FX6 3A
FX6 3A
FX6 3A
Date: Sheet
Date: Sheet
Date: Sheet
R342 0/0805 R342 0/0805
+3.3V_R5C833
R354
R354
100K
100K
Memory Stick Enable
XD Card Enable
Serial ROM disable
SD Card Enable
MMC Card Enable
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
1
+3.3V_R5C833
1
of
of
of
35 70 Tuesday, May 20, 2008
35 70 Tuesday, May 20, 2008
35 70 Tuesday, May 20, 2008
A
B
C
D
E
1 1
U19A
U19A
98
AVCC_PHY1
106
AVCC_PHY2
110
AVCC_PHY3
112
AVCC_PHY4
GUARD GND
1394_XI
C517 22P/50V C517 22P/50V
C518 27P/50V C518 27P/50V
2 2
Populate C527 for
R5C832 chip
Place these caps as close
to the U19 as possible.
3 3
4 4
2 1
Y1
Y1
24.576MHZ
24.576MHZ
1394_XO
R369 0 R369 0
C514 *0.01U/25V_NC C514 *0.01U/25V_NC
R360 10K/F R360 10K/F
C496 0.01U/25V C496 0.01U/25V
RICOH_FILO
RICOH_REXT
RICOH_VREF
A
94
XI
95
XO
96
FIL0
101
REXT
100
VREF
97
RSV
R5C833T_V00
R5C833T_V00
TPBIAS0
IEEE1394/SD
IEEE1394/SD
TPBN0
TPBP0
TPAN0
TPAP0
MDIO17
MDIO16
MDIO15
MDIO14
MDIO13
MDIO12
MDIO11
MDIO10
MDIO05
MDIO08
MDIO19
MDIO18
MDIO02
MDIO03
MDIO00
MDIO01
MDIO09
MDIO04
MDIO06
MDIO07
AS CLOSE AS POSSIBLE TO R5C833
TPBIAS0
113
R334
R334
56.2/F/0603
56.2/F/0603
104
105
108
109
Circuit area : As small as possible.
XD/MMS_DATA7
87
XD/MMS_DATA6
92
XD/MMS_DATA5
89
XD/MMS_DATA4
91
SD/XD/MS_DATA3
90
SD/XD/MS_DATA2
93
SD/XD/MS_DATA1
81
SD/XD/MS_DATA0
82
XD_WP#
75
SD/XD/MS_CMD
88
XD_ALE
83
XD_CLE
85
XD_CE#
78
SD_WP#(XDR/B#)
77
SD_CD#
80
MS_INS#
79
SD/XD/MS_CLK
84
MC_PWR_CTRL_0
76
74
73
C504
C504
10U
10U
10
10
X5R
X5R
0805
0805
80 mils
+3.3V_RUN_PHY
C509
C509
0.1U
0.1U
10
10
X7R
X7R
C508
C508
0.01U
0.01U
25
25
X7R
X7R
C510
C510
1000P
1000P
50
50
X7R
X7R
L57
L57
BLM18PG181SN1D
BLM18PG181SN1D
0603
0603
modify
Place these caps as close to the U19 as possible.
C483 0.33U
C483 0.33U
16
C488 0.01U
C488 0.01U
25
25
X7R
X7R
R356
R356
56.2/F/0603
56.2/F/0603
D17 1SS355 D17 1SS355
D16 1SS355 D16 1SS355
16
X7R
X7R
0603
0603
TPB0N
TPB0P
TPA0N
TPA0P
C491 270P
C491 270P
25
25
NPO
NPO
R357 5.11K/F R357 5.11K/F
close to the Chip
R348
R348
56.2/F/0603
56.2/F/0603
B
R341
R341
56.2/F/0603
56.2/F/0603
T82 PAD T82 PAD
+3.3V_R5C833
J7
J7
TPB0N
TPB0P
TPA0N
TPA0P
*TPA0P/TPA0N,TPB0P/TPB0N pair trace : Same length electrically.
*TPA0P/TPA0N,TPB0P/TPB0N pair trace : As close as possible.
*Termination resistor for TPA+/- TPB+/- : As close as possible to its cable driver (device pin out).
1
2
3
8
4
7
5
6
JST_06FFS-SP-TF(LF)(SN)
JST_06FFS-SP-TF(LF)(SN)
8 IN1 CARD READER
CON6
CON6
1
SD_CD#
SD_WP#
XD/MMS_DATA7
XD/MMS_DATA6
XD/MMS_DATA5
XD/MMS_DATA4
SD/XD/MS_DATA1
SD/XD/MS_DATA3
SD/XD/MS_DATA0
SD/XD/MS_DATA2
XD/MMS_DATA7
SD/XD/MS_DATA1
XD/MMS_DATA6
SD/XD/MS_CMD XD_CE#
SD/XD/MS_DATA1 SD_WP#(XDR/B#)
SD/XD/MS_DATA0
SD/XD/MS_DATA0
+3.3V_R5C833
R376
R376
*10K/F_NC
*10K/F_NC
XD_CDSW#
R673 0 R673 0
C840
C840
*270P_NC
*270P_NC
25
25
NPO
NPO
C961
C961
*27P_NC
*27P_NC
50
50
NPO
NPO
C878
C878
2.2U
2.2U
6.3
6.3
X5R
X5R
0603
0603
MC_PWR_CTRL_0
SD Protect
R377 0 R377 0
Q58
Q58
SD_WP#(XDR/B#)
XD_CDSW#
3 1
2
C
SD_WP#
*2N7002W-7-F_NC
*2N7002W-7-F_NC
SD(CD2/WP2/GND)
2
SD(CD1)
3
SD(WP1)
4
XD-18(VCC)
5
XD-17(D7)
6
XD-16(D6)
7
XD-15(D5)
8
XD-14(D4)
9
SD-8(DAT1)
10
XD-13(D3)
11
SD-7(DAT0)
12
XD-12(D2)
13
MMC-(D7)
14
XD-11(D1)
15
SD-6(GND/VSS2)
16
MS-1(VSS)
17
MMC-(D6)
18
MS-2(BS)
19
SD-5(CLK)
20
MS-3(VCC/DATA1)
21
XD-10(D0)
22
MS-4(SDIO/DATA0)
23
SD-4(VCC/VDD)
TAISOL_144-2400002900
TAISOL_144-2400002900
C835
C835
*270P_NC
*270P_NC
25
25
NPO
NPO
C520
C520
0.1U
0.1U
10
10
X7R
X7R
AAT4250 will be tested
by 2'nd source after
proto2 build.
U20
U20
IN5OUT
3
NC
EN4GND
TPS2051BDBV
TPS2051BDBV
D
MS-5(DATA2)
MS-7(DATA3)
MS-8(SCLK)
MS-10(VSS)
SD-1(DAT3)
SD-9(DAT2)
Shield46Shield1
47
+3.3V_RUN_CARD
1
2
XD-9(GND)
MS-6(INS)
SD-3(VSS1)
MMC-(D5)
SD-2(CMD)
MS-9(VCC)
MMC-(D4)
XD-8(-WP)
XD-7(WE)
XD-6(ALE)
XD-5(CLE)
XD-4(CE)
XD-3(RE)
XD-2(R/-B)
XD-1(CD)
XD-0(GND)
+3.3V_RUN_CARD +3.3V_RUN_CARD
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
C521
C521
1U
1U
10
10
X5R
X5R
0603
0603
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
R681 0 R681 0
C883
C883
C962
C962
*27P_NC
*27P_NC
270P
270P
50
50
25
25
NPO
NPO
NPO
NPO
+3.3V_RUN_CARD +3.3V_R5C833
C846
C846
0.01U
0.01U
25
25
X7R
X7R
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
IEEE1394/CARD READER
IEEE1394/CARD READER
IEEE1394/CARD READER
FX6 3A
FX6 3A
FX6 3A
SD/XD/MS_DATA2
SD/XD/MS_DATA3
SD/XD/MS_DATA3
SD/XD/MS_DATA2
(15)
C963
C963
27P
27P
50
50
NPO
NPO
C845
C845
0.01U
0.01U
25
25
X7R
X7R
XD/MMS_DATA5
SD/XD/MS_CLK
SD/XD/MS_CMD
XD/MMS_DATA4
SD/XD/MS_CMD
SD/XD/MS_CLK SD/XD/MS_CLK
MS_INS#
XD_WP#
XD_ALE
XD_CLE
XD_CDSW#
Close CON6 pin4
C844
C844
0.01U
0.01U
25
25
X7R
X7R
E
R684
R684
150K
150K
of
of
of
36 70 Tuesday, May 20, 2008
36 70 Tuesday, May 20, 2008
36 70 Tuesday, May 20, 2008
1
A A
2
3
4
5
6
7
8
L49
L49
SB_USBP7- 13
SB_USBP7+ 13
+3.3V_CARD
B B
C879
C879
0.1U
0.1U
10
10
X7R
X7R
C C
*DLW21SN900SQ2L_NC
*DLW21SN900SQ2L_NC
C875
C875
0.1U
0.1U
10
10
X7R
X7R
Please the cap
near connector.
1 2
R320 0 R320 0
R319 0 R319 0
C882
C882
10U
10U
6.3
6.3
X5R
X5R
0603
0603
PCIE_RX4- 8
PCIE_RX4+ 8
PCIE_TX4- 8
PCIE_TX4+ 8
3 4
+1.5V_CARD
SB_PCIE_WAKE# 13,33,39,40
+3.3V_CARDAUX
+3.3V_CARD
EXPRESSCARD_REQ# 25
EXPRCRD_PWREN# 13,42
CLK_PCIE_EXPCARD# 25
CLK_PCIE_EXPCARD 25
USBP7_DUSBP7_D+
SB_SMBCLK 13,16,39,40
SB_SMBDATA 13,16,39,40
+1.5V_CARD
C871
C871
0.1U
0.1U
10
10
X7R
X7R
Please the cap
near connector.
USBP7_DUSBP7_D+
CPUSB#
CARD_RESET#
EXPRCRD_PWREN#
C872
C872
0.1U
0.1U
10
10
X7R
X7R
MOLEX_48303-0033
MOLEX_48303-0033
Express Card
CN2
CN2
1
GND_1
2
USB-
3
USB+
4
CPUSB#
5
RSV_0
6
RSV_1
7
SMBCLK
8
SMBDATA
9
+1.5V_0
10
+1.5V_1
11
WAKE#
12
+3.3VAUX
13
PERST#
14
+3.3V_1
15
+3.3V_2
16
CLKREQ#
17
CPPE#
18
REFCLK-
19
REFCLK+
20
GND_2
21
PERn0
22
PERp0
23
GND_3
24
PETn0
25
PETp0
26
GND_4
NC430NC329NC228NC127NC5
31
C868
C868
0.1U
0.1U
10
10
X7R
X7R
Please the cap
near pin 12 &
14(1.5VIN).
+1.5V_RUN +3.3V_RUN +3.3V_SUS
+3.3V_SUS
T106T106
PLTRST# 9,12,14,18,39,45
C838
C838
0.1U
0.1U
10
10
X7R
X7R
Please the cap
near pin 2 & 4
(3.3VIN).
+1.5V_CARD Max. 650mA, Average 500mA.
+3V_CARD Max. 1300mA, Average 1000mA.
U37
U37
17
AUXIN
2
3.3VIN_0
3.3VIN_143.3VOUT_1
12
1.5VIN_0
14
1.5VIN_1
R665 100K R665 100K
20
16
1
6
7
SHDN#
STBY#
SYSRST#
NC
GND0
EXPRCRD_STDBY#
+3.3V_SUS +3.3V_CARDAUX +3.3V_RUN +1.5V_RUN +3.3V_CARD +1.5V_CARD
C849
C849
0.1U
0.1U
10
10
X7R
X7R
Please the cap
near pin 17
(AUXIN).
3.3VOUT_0
1.5VOUT_0
1.5VOUT_1
ExpressSwitch
ExpressSwitch
R5538D001-TR-F
R5538D001-TR-F
+3.3V_CARDAUX +3.3V_CARD +1.5V_CARD
15
AUXOUT
3
5
11
13
CARD_RESET#
8
PERST#
CPPE#
CPUSB#
OC#
RCLKEN
Please the cap
near pin 15
(AUXOUT).
10
9
19
18
C867
C867
0.1U
0.1U
10
10
X7R
X7R
EXPRCRD_PWREN#
CPUSB#
R667 100K R667 100K
R666 100K R666 100K
C839
C839
0.1U
0.1U
10
10
X7R
X7R
Please the cap
near pin 3 & 5
(3.3VOUT).
+3.3V_SUS
C869
C869
0.1U
0.1U
10
10
X7R
X7R
Please the cap
near pin 11 &
13(1.5VOUT).
PCI-Express TX and RX direct to connector.
D D
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet
COMPUTER
EXPRESS
EXPRESS
EXPRESS
FX6 3A
FX6 3A
FX6 3A
7
of
of
of
37 70 Tuesday, May 20, 2008
37 70 Tuesday, May 20, 2008
37 70 Tuesday, May 20, 2008
8
1
A A
2
3
External USB PORT hookup reference. Your design may
need more or less external ports and may be mapped
differently
SB_USBP0+ 13
SB_USBP0- 13
4
L25
L25
1 2
DLP11SN900HL2L
DLP11SN900HL2L
USBP0_D+
3 4
USBP0_D-
(6)
L27
L27
SB_USBP1- 13
SB_USBP1+ 13
DLP11SN900HL2L
DLP11SN900HL2L
1 2
3 4
USBP1_DUSBP1_D+
5
Side External USBX2
+USB_SIDE_PWR
+
+
C680
C680
150U
150U
6.3
6.3
Polymer
Polymer
7343
7343
+
+
C216
C216
*150U_NC
*150U_NC
6.3
6.3
Polymer
Polymer
7343
7343
C149
C149
150P
150P
25
25
NPO
NPO
C160
C160
150P
150P
25
25
NPO
NPO
C164
C164
0.1U
0.1U
10
10
X7R
X7R
C210
C210
0.1U
0.1U
10
10
X7R
X7R
6
USBP0_DUSBP0_D+
USBP1_DUSBP1_D+
1
GND
VBUS
2
A+
D-
3
A-
D+
4
GND
GND
B-
B+
5
VBUS
GND
6
D-
7
D+
Shield
8
GND
Shield
Shiled
Shield
CN4
CN4
ESATA+USB CONN
ESATA+USB CONN
7
(10)
9
ESATA_TX3+_R
10
ESATA_TX3-_R
11
12
13
SATA_RX3+_C ESATA_RX3+_R
14
15
16
17
18
19
C678 2200P/50V/X7R C678 2200P/50V/X7R
C677 2200P/50V/X7R C677 2200P/50V/X7R
USBx2 & ESATA COMBO
8
ESATA_RX3-_R SATA_RX3-_C
1 2
*455/5A_NC
*455/5A_NC
1 2
(7)
MB side
PJP3 PJP3
FS2
FS2
PJP5 PJP5
1 2
FS1
FS1
*455/5A_NC
*455/5A_NC
1 2
USBP3+
USBP3-
USBP2+
USBP2-
C260
C260
0.1U
0.1U
10
10
X7R
X7R
C363
C363
0.1U
0.1U
10
10
X7R
X7R
USB_BACK_PWR
ACES_88513-104N
ACES_88513-104N
6
C269
C269
*10U_NC
*10U_NC
10
10
X5R
X5R
0805
0805
C346
C346
*10U_NC
*10U_NC
10
10
X5R
X5R
0805
0805
(3)
(4)
U7
U7
2
IN
3
EN1#
4
EN2#
TPS2062DR
TPS2062DR
(3)
U16
U16
2
IN
3
EN1#
4
EN2#
TPS2062DR
TPS2062DR
JUSB1
JUSB1
10
9
8
7
6
5
4
3
2
1
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Place one 150uF cap by each
USB connector.
1
GND
7
OUT1
8
OC1#
6
OUT2
5
OC2#
Place one 150uF cap by each
USB connector.
(4)
1
GND
7
OUT1
8
OC1#
6
OUT2
5
OC2#
USB
USB
USB
FX6 3A
FX6 3A
FX6 3A
7
+USB_SIDE_PWR
USB_BACK_PWR
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
USB_OC0_1# 13
USB_OC2_3# 13
of
of
of
38 70 Tuesday, May 20, 2008
38 70 Tuesday, May 20, 2008
38 70 Tuesday, May 20, 2008
8
(7)
Platforms should put in PADS for the USB chokes if they
have the room. Chokes should be NOPOP.
B B
ESD3
USBP0_D- USBP1_DUSBP0_D+
ESD3
1
1
2
2
3
3
SRV05-4.TCT
SRV05-4.TCT
6
6
5
5
USBP1_D+
4
4
+USB_SIDE_PWR
+5V_ALW
USB_SIDE_EN# 42
E-SATA Re-driver
+5V_ALW
+1.8V_RUN
C C
C965
C965
0.1U/ 10V
0.1U/ 10V
C966
C966
0.1U/ 10V
0.1U/ 10V
C967
C967
0.1U/ 10V
0.1U/ 10V
(10)
SATA_TX3+_C 14
SATA_TX3-_C 14
SATA_RX3+ 14
SATA_RX3- 14
D D
1
C858 2200P/50V/X7R C858 2200P/50V/X7R
C857 2200P/50V/X7R C857 2200P/50V/X7R
C971 2200P/50V/X7R C971 2200P/50V/X7R
C972 2200P/50V/X7R C972 2200P/50V/X7R
SATA_TX3+
SATA_TX3-
ESATA_RX3+_L
ESATA_RX3-_L
SATA_TX3+
SATA_TX3-
ESATA_RX3+_L
ESATA_RX3-_L
C968
C968
0.1U/ 10V
0.1U/ 10V
+1.8V_RUN +1.8V_RUN
U63
R780 0 R780 0
R781 0 R781 0
R782 *0_NC R782 *0_NC
R783 *0_NC R783 *0_NC
R784 *0_NC R784 *0_NC
R785 *0_NC R785 *0_NC
2
U63
1
EQA
2
VDD
3
AI+
4
AI-
5
GND
6
VDD
7
BO+
8
BO-
9
GND
10
EQB
PI2EQX3211BHE
PI2EQX3211BHE
ESATA_TX3+_L
ESATA_TX3-_L
ESATA_RX3+_R
ESATA_RX3-_R
VDD
AO+
GND
VDD
GND
VDD
20
EN
19
18
17
AO-
16
15
14
BI+
13
BI-
12
11
3
R796 330 R796 330
ESATA_TX3+_L
ESATA_TX3-_L
ESATA_RX3+_R
ESATA_RX3-_R
C969 2200P/50V/X7R C969 2200P/50V/X7R
C970 2200P/50V/X7R C970 2200P/50V/X7R
4
ESATA_TX3+_R
ESATA_TX3-_R
USB_BACK_EN# 42
SB_USBP3+ 13
SB_USBP3- 13
SB_USBP2+ 13
SB_USBP2- 13
5
1
TH21
TH21
H-TC118BC197D63P2
H-TC118BC197D63P2
1
A A
MINI1CLK_REQ#
C362
C362
220P
220P
50
50
X7R
X7R
SB_PCIE_WAKE# 13,33,37,40
TH22
TH22
H-TC118BC197D63P2
H-TC118BC197D63P2
1
COEX2_WLAN_ACTIVE
COEX1_BT_ACTIVE_MINI
MINI1CLK_REQ# 25
CLK_PCIE_MINI1# 25
CLK_PCIE_MINI1 25
PCIE_RX1- 8
PCIE_RX1+ 8
PCIE_TX1- 8
PCIE_TX1+ 8
PCIE_MCARD1_DET# 14
PCI-Express TX and RX direct to connector
T55 PAD T55 PAD
Non-iAMT
JMINI Pin
B B
C C
DEBUG PINS
Debug Pin Name
16
HOST_DEBUG_TX
17
HOST_DEBUG_RX
8051_TX
19
42
8051_RX
+3.3V_WLAN
COEX2_WLAN_ACTIVE
R260
R260
*100K_NC
*100K_NC
R663 0_0805 R663 0_0805
C368
C368
*33P_NC
*33P_NC
50
50
COH
COH
T54 PAD T54 PAD
T105 PAD T105 PAD
+3.3V_RUN
SB_PCIE_WAKE# 13,33,37,40
MINI2CLK_REQ# 25
CLK_PCIE_MINI2# 25
CLK_PCIE_MINI2 25
PCIE_MCARD3_DET# 14
PCI-Express TX and RX direct to connector
MINI2CLK_REQ#
C834
C834
220P
220P
50
50
X7R
X7R
D D
TH17
1
TH17
H-TC118BC197D63P2
H-TC118BC197D63P2
1
TH16
TH16
H-TC118BC197D63P2
H-TC118BC197D63P2
1
2
MINI1CLK_REQ#
PCIE_MCARD1_DET#
RSV_ICH_CL_CLK1
RSV_ICH_CL_DATA1
RSV_ICH_CL_RST1#
EC Pin
70
71
82
81
COEX2_WLAN_ACTIVE
COEX1_BT_ACTIVE_MINI
PLTRST# 9,12,14,18,37,45
CLK_PCI_DEBUG 12
PCIE_RX2- 8
PCIE_RX2+ 8
PCIE_TX2- 8
PCIE_TX2+ 8
2
R657 0 R657 0
R660 0 R660 0
+3.3V_WLAN
MINI2CLK_REQ#
(17)
PCIE_MCARD3_DET#
3
MiniCard WLAN connector
J12
J12
WAKE#
Reserved
Reserved
CLKREQ#
GND
REFCLKREFCLK+
GND
Reserved
Reserved
GND
PERn0
PERp0
GND
GND
PETn0
PETp0
GND
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
LTS_AAA-PCI-041-K01
LTS_AAA-PCI-041-K01
C815
C815
0.1U
0.1U
10
10
X7R
X7R
+3.3V
GND
+1.5V
Reserved
Reserved
Reserved
Reserved
Reserved
GND
Reserved
PERST#
+3.3Vaux
GND
+1.5V
SMB_CLK
SMB_DATA
GND
USB_D-
USB_D+
GND
LED_WWAN#
LED_WLAN#
LED_WPAN#
+1.5V
GND
+3.3V
Place caps close to
connector.
C843
C843
0.047U
0.047U
10
10
X7R
X7R
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
C804
C804
4.7U
4.7U
10
10
X5R
X5R
0805
0805
C816
C816
0.1U
0.1U
10
10
X7R
X7R
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
C809
C809
0.047U
0.047U
10
10
X7R
X7R
MiniCard WPAN connector
+3.3V_RUN
J11
R656 0 R656 0
R655 0 R655 0
R259 *0_NC R259 *0_NC
R659 *0_NC R659 *0_NC
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
3
J11
WAKE#
Reserved
Reserved
CLKREQ#
GND
REFCLKREFCLK+
GND
Reserved
Reserved
GND
PERn0
PERp0
GND
GND
PETn0
PETp0
GND
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
LTS_AAA-PCI-041-K01
LTS_AAA-PCI-041-K01
+3.3V_WLAN +3.3V_WLAN
+
+
+3.3V
+1.5V
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
PERST#
+3.3Vaux
+1.5V
SMB_CLK
SMB_DATA
USB_D-
USB_D+
LED_WWAN#
LED_WLAN#
LED_WPAN#
+1.5V
+3.3V
4
C841
C841
*330U_NC
*330U_NC
6.3
6.3
POSCAP
POSCAP
7343
7343
GND
GND
GND
GND
GND
GND
4
+1.5V_RUN
USBP4_DUSBP4_D+
R248 0 R248 0
R250 *0_NC R250 *0_NC
WLAN_SMBCLK
WLAN_SMBDATA
USBP4_DUSBP4_D+
USB_MCARD1_DET#
+1.5V_RUN
+3.3V_RUN
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
+3.3V_WLAN
C345
C345
0.047U
0.047U
10
10
X7R
X7R
+1.5V_RUN
R635 *0_NC R635 *0_NC
R634 *0_NC R634 *0_NC
R633 *0_NC R633 *0_NC
R632 *0_NC R632 *0_NC
R631 *0_NC R631 *0_NC
R638 0 R638 0
R637 *0_NC R637 *0_NC
USBP6_DUSBP6_D+
USB_MCARD3_DET#
R640 0 R640 0
USBP6_DUSBP6_D+
5
PLTRST_SYS# 33,40,45,51
WLAN_RADIO_OFF#
SB_WLAN_PCIE_RST# 14
USB_MCARD1_DET# 14
LED_WLAN_OUT# 44
C344
C344
0.047U
0.047U
10
10
X7R
X7R
(17)
+3.3V_RUN
SB_SMBCLK 13,16,37,40
SB_SMBDATA 13,16,37,40
LED_WPAN#
5
L43
L43
1 2
*DLW21SN900SQ2L_NC
*DLW21SN900SQ2L_NC
R242 0 R242 0
R241 0 R241 0
LPC_LAD3 12,42
LPC_LAD2 12,42
LPC_LAD1 12,42
LPC_LAD0 12,42
3 4
LPC_LFRAME# 12,42
PLTRST_SYS# 33,40,45,51
SB_WPAN_PCIE_RST# 14
USB_MCARD3_DET# 14
LED_WPAN# 44
L97
L97
1 2
*DLW21SN900SQ2L_NC
*DLW21SN900SQ2L_NC
R630 0 R630 0
R629 0 R629 0
6
SB_USBP4- 13
SB_USBP4+ 13
Layout Note:
R242 and R241
close to choke
as possible to
minimize stubs.
AUX_EN_WOWL 42
C808
C808
*100P_NC
*100P_NC
50
50
X7R
X7R
3 4
Layout Note:
R630 and R629
close to choke
as possible to
minimize stubs.
6
RP5
RP5
4P2R-2.2K
4P2R-2.2K
WLAN_SMBCLK
WLAN_SMBDATA
Suport for WoW
WLAN_RADIO_OFF#
R225
R225
*100K_NC
*100K_NC
6 1
Q43B
Q43B
2
R534
R534
*2N7002DW-7-F_NC
*2N7002DW-7-F_NC
*100K_NC
*100K_NC
Place caps close to connector.
WPAN_RADIO_DIS_MINI# 14
SB_USBP6- 13
SB_USBP6+ 13
+1.5V_RUN
C811
C811
0.047U
0.047U
10
10
X7R
X7R
+3.3V_RUN
C805
C805
0.1U
0.1U
10
10
X7R
X7R
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
7
+3.3V_WLAN
2
4
2
Q50
R246 *0_NC R246 *0_NC
+3.3V_WLAN
2
R249 *0_NC R249 *0_NC
2 1
D15
D15
SDMK0340L-7-F
SDMK0340L-7-F
R240 *0_NC R240 *0_NC
+PWR_SRC +3.3V_WLAN +3.3V_ALW +PWR_SRC
WLAN_ENABLE
3 4
Q43A
Q43A
5
*2N7002DW-7-F_NC
*2N7002DW-7-F_NC
R224
R224
*200K_NC
*200K_NC
C806
C806
0.047U
0.047U
10
10
X7R
X7R
C836
C836
0.1U
0.1U
10
10
X7R
X7R
Q50
*2N7002W-7-F_NC
*2N7002W-7-F_NC
3 1
Q49
Q49
*2N7002W-7-F_NC
*2N7002W-7-F_NC
3 1
R676
R676
*100K_NC
*100K_NC
C837
C837
0.047U
0.047U
10
10
X7R
X7R
1
3
(3)
C807
C807
0.047U
0.047U
10
10
X7R
X7R
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
MINI CARD
MINI CARD
MINI CARD
FX6 3A
FX6 3A
FX6 3A
7
8
SB_SMBCLK 13,16,37,40
SB_SMBDATA 13,16,37,40
WLAN_RADIO_DIS# 14
Prevent backdrive when
WoW is enabled.
Q41
Q41
*SI3456DV_NC
*SI3456DV_NC
6
5
4
2
1
3
R216
R216
*470K_NC
*470K_NC
C321
C321
*4700P_NC
*4700P_NC
50
50
X7R
X7R
0603
0603
+
+
C750
C750
C803
C803
*330U_NC
*330U_NC
4.7U
4.7U
6.3
6.3
10
10
POSCAP
POSCAP
X5R
X5R
7343
7343
0805
0805
of
of
of
39 70 Tuesday, May 20, 2008
39 70 Tuesday, May 20, 2008
39 70 Tuesday, May 20, 2008
8
1
TH8
TH8
H-TC118BC197D63P2
H-TC118BC197D63P2
2
TH7
TH7
H-TC118BC197D63P2
H-TC118BC197D63P2
3
4
5
6
7
8
A A
1
1
NUT:FBFM6001010
MiniCard WWAN connector
+1.5V_RUN
+3.3V
GND
+1.5V
GND
GND
+1.5V
GND
GND
+1.5V
GND
+3.3V
+3.3V_RUN
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
6
6
5
5
4
UIM_VPP
UIM_PWR
UIM_DATA
C53
C53
*100P_NC
*100P_NC
50
50
X7R
X7R
UIM_PWR
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP
R532 0 R532 0
R531 *0_NC R531 *0_NC
USBP5_DUSBP5_D+
USB_MCARD2_DET#
C61
C61
33P
33P
50
50
COH
COH
C34
C34
33P
33P
50
50
COH
COH
UIM_PWR
Place C484 close to J10
PLTRST_SYS# 33,39,45,51
WWAN_RADIO_DIS# 14
SB_WWAN_PCIE_RST# 14
SB_SMBCLK 13,16,37,39
SB_SMBDATA 13,16,37,39
USB_MCARD2_DET# 14
T103 PAD T103 PAD
C49
C49
1U
1U
10
10
X5R
X5R
0603
0603
C712
C712
33P
33P
50
50
COH
COH
+1.5V_RUN
C713
C713
0.047U
0.047U
10
10
X7R
X7R
+3.3V_RUN
USBP5_DUSBP5_D+
C755
C755
0.047U
0.047U
10
10
X7R
X7R
C711
C711
33P
33P
50
50
COH
COH
Place caps close to connector.
+
+
C760
C760
330U
C714
C714
33P
33P
50
50
COH
COH
L82
L82
1 2
*DLW21SN900SQ2L_NC
*DLW21SN900SQ2L_NC
R529 0 R529 0
R528 0 R528 0
C715
C715
0.047U
0.047U
10
10
X7R
X7R
330U
6.3
6.3
POSCAP
POSCAP
7343
7343
3 4
Layout Note:
R529 and R528
close to choke
as possible to
minimize stubs.
+
+
C693
C693
*330U_NC
*330U_NC
6.3
6.3
POSCAP
POSCAP
7343
7343
SB_USBP5- 13
SB_USBP5+ 13
+3.3V_RUN
J10
SB_PCIE_WAKE# 13,33,37,39
T104 PAD T104 PAD
T51 PAD T51 PAD
MINI3CLK_REQ# 25
CLK_PCIE_MINI3# 25
CLK_PCIE_MINI3 25
PCIE_RX5- 8 +3.3V_RUN
PCIE_RX5+ 8
B B
PCIE_TX5- 8
PCIE_TX5+ 8
PCIE_MCARD2_DET# 14
MINI3CLK_REQ#
PCIE_MCARD2_DET#
PCI-Express TX and RX direct to connector
MINI3CLK_REQ#
C746
C746
220P
220P
50
50
X7R
X7R
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
J10
WAKE#
Reserved
Reserved
CLKREQ#
GND
REFCLKREFCLK+
GND
Reserved
Reserved
GND
PERn0
PERp0
GND
GND
PETn0
PETp0
GND
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
LTS_AAA-PCI-041-K01
LTS_AAA-PCI-041-K01
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
PERST#
+3.3Vaux
SMB_CLK
SMB_DATA
USB_D-
USB_D+
LED_WWAN#
LED_WLAN#
LED_WPAN#
Place C383, C367 close to JSIM1
ESD1
UIM_PWR
UIM_RESET UIM_VPP
UIM_CLK
C C
C1
VCC
C2
RST
C3
CLK
GND1GND2GND
C5
GND
C6
VPP
C7
DATA
JSIM1
JSIM1
3
FOX_2WM610C1C-DS-7F
FOX_2WM610C1C-DS-7F
UIM_DATA
UIM_RESET
UIM_CLK
C48
C56
C56
33P
33P
50
50
COH
COH
C48
33P
33P
50
50
COH
COH
Note: Place caps on UIMlines close to WWAN connector
ESD1
1
1
2
2
334
SRV05-4.TCT
SRV05-4.TCT
D D
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet
COMPUTER
WWAN
WWAN
WWAN
FX6 3A
FX6 3A
FX6 3A
7
of
of
of
40 70 Tuesday, May 20, 2008
40 70 Tuesday, May 20, 2008
40 70 Tuesday, May 20, 2008
8
A
B
C
D
E
RTC BATTERY
+RTC_CELL
D33
4 4
16Mbit (2M Byte), SPI
R236
R236
10K
10K
U15
U15
EC_FLASH_SPI_CS# 42
EC_FLASH_SPI_CLK 42
EC_FLASH_SPI_DIN 42
EC_FLASH_SPI_DO 42
3 3
R235 15 R235 15
R237 15 R237 15
R233 15 R233 15
C340
C340
22P
22P
50
50
NPO
NPO
1
CE#
6
SCK
5
SI
2
SO
3
WP#
SST25VF016B-50-4C-S2AF
SST25VF016B-50-4C-S2AF
VDD
HOLD#
VSS
8
7
4
+3.3V_ALW +3.3V_ALW
C333
C333
0.1U
0.1U
10
10
X7R
X7R
R232
R232
10K
10K
D33
SDMK0340L-7-F
SDMK0340L-7-F
D18
D18
SDMK0340L-7-F
SDMK0340L-7-F
C862
C862
1U
1U
25
25
X5R
X5R
0603
0603
U38
U38
2 1
+RTC_1 +RTC
2 1
3
4
C863
C863
*4.7U_NC
*4.7U_NC
6.3
6.3
X5R
X5R
0603
0603
R218 1K R218 1K
*MAX1615EUK-T+_NC
*MAX1615EUK-T+_NC
OUT
5/3#
GND2SHDN
(3)
1
IN
5
LTS_AAA-BAT-019-K01
LTS_AAA-BAT-019-K01
+PWR_SRC +3.3V_ALW
C851
C851
*1U_NC
*1U_NC
25
25
X7R
X7R
0805
BT1
BT1
2
1
0805
RTC-BATTERY RTC-BATTERY
2 2
1 1
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
A
B
C
D
Date: Sheet
COMPUTER
FLASH /RTC
FLASH /RTC
FLASH /RTC
FX6 3A
FX6 3A
FX6 3A
E
of
of
of
41 70 Tuesday, May 20, 2008
41 70 Tuesday, May 20, 2008
41 70 Tuesday, May 20, 2008
1
KSO[0..16] 43
KSI[0..7] 43
LED_MASK# 44
+3.3V_ALW
A A
C252 10U
C252 10U
6.3
6.3
0603
0603
X5R
X5R
C200 0.1U
C200 0.1U
10
10
X7R
X7R
C251 0.1U
C251 0.1U
10
10
X7R
X7R
C230 0.1U
C230 0.1U
10
10
X7R
X7R
C676 0.1U
C676 0.1U
10
10
X7R
X7R
Place these caps close to ITE8512.
SB_AZ_CODEC_RST# 13,14,31
CLK_PCI_8512 12,14
LPC_LFRAME# 12,39
LPC_LAD0 12,39
LPC_LAD1 12,39
LPC_LAD2 12,39
LPC_LAD3 12,39
CPU_VCORE_PWRGD 45,53
IRQ_SERIRQ 12,35
SIO_EXT_SMI# 13
SIO_EXT_SCI# 13
SIO_A20GATE 13
SMBCLK0 47,48
SMBDAT0 47,48
SMBCLK1 25,26,29
SMBDAT1 25,26,29
SMBCLK2 22,43
SMBDAT2 22,43
1.2V_RUN_ON 10,45,46
RESET_OUT# 45
NUM_LED# 43
CLK_TP_SIO 43
DAT_TP_SIO 43
+3.3V_ALW
WRST#
2 1
CLKRUN# 12,35
SIO_RCIN# 13
LCD_BAK# 26
NB_MUTE# 31
R141
R141
100K
100K
C221
C221
0.1U
0.1U
16
16
X7R
X7R
0603
0603
2 1
D7 SDMK0340L-7-F D7 SDMK0340L-7-F
2 1
D5 SDMK0340L-7-F D5 SDMK0340L-7-F
2 1
LCD_TST 26
SB_PME# 13,35
D14 SDMK0340L-7-F D14 SDMK0340L-7-F
2 1
WRST#
SMBCLK0
SMBDAT0
SMBCLK1
SMBDAT1
SMBCLK2
SMBDAT2
1.2V_RUN_ON
+3.3V_ALW
L28
L28
BLM11A05S
BLM11A05S
L29
L29
BLM11A05S
BLM11A05S
B B
BAT
CLK,LCD,THERMAL
GFX THM,LAN,MEDIA
C C
D10
THERM_STP# 29,52
32KHz Clock.
D10
SDMK0340L-7-F
SDMK0340L-7-F
W1 need close U13.
ITE8512_XTAL2
KSO16
KSO15
KSO14
KSO13
KSO12
KSO11
KSO10
KSO9
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSO2
KSO1
KSO0
KSI7
KSI6
KSI5
KSI4
KSI3
KSI2
KSI1
KSI0
D11
D11
SDMK0340L-7-F
SDMK0340L-7-F
ITE8512_XTAL1
ITE8512_XTAL2
ITE8512IX_JX
C211
C211
0.1U/10V
0.1U/10V
2
U9
U9
57
KSO17/GPC5
56
KSO16/GPC3
55
KSO15
54
KSO14
53
KSO13
52
KSO12/SLCT
51
KSO11/ERR
46
KSO10/PE
45
KSO9/BUSY
44
KSO8/ACK
43
KSO7/PD7
42
KSO6/PD6
41
KSO5/PD5
40
KSO4/PD4
39
KSO3/PD3
38
KSO2/PD2
37
KSO1/PD1
36
KSO0/PD0
65
KSI7
64
KSI6
63
KSI5
62
KSI4
61
KSI3/SLIN
60
KSI2/INT
59
KSI1/AFD
58
KSI0/STB
22
LPCRST/WUI4/GPD2
13
LPCCLK
6
LFRAME
10
LAD0
9
LAD1
8
LAD2
7
LAD3
93
CLKRUN/GPH0/ID0
5
SERIRQ
15
ECSMI/GPD4
23
ECSCI/GPD3
126
GA20/GPB5
17
LPCPD/WUI6/GPE6
4
KBRST/GPB6
14
WRST
16
PWUREQ/GPC7
19
L80HLAT/GPE0
20
L80LLAT/WUI7/GPE7
110
SMCLK0/GPB3
111
SMDAT0/GPB4
115
SMCLK1/GPC1
116
SMDAT1/GPC2
117
SMCLK2/GPF6
118
SMDAT2/GPF7
85
PS2CLK0/GPF0
86
PS2DAT0/GPF1
87
PS2CLK1/GPF2
88
PS2DAT1/GPF3
89
PS2CLK2/GPF4
90
PS2DAT2/GPF5
128
CK32K
2
CK32KE
1
VSS1
12
VSS2
27
VSS3
49
VSS4
91
VSS5
113
VSS6
122
VSS7
74
AVCC
75
AVSS
ITE8512E
ITE8512E
LQFP-128L
LQFP-128L
KEYBOARD
KEYBOARD
LPC
LPC
SMBUS
SMBUS
PS/2
PS/2
3
ADC0/GPI0
ADC1/GPI1
ADC2/GPI2
ADC3/GPI3
ADC4/GPI4
ADC5/GPI5
ADC/DAC
ADC/DAC
PWM
PWM
IR/UART
IR/UART
LPC/FWH
LPC/FWH
FLASH
FLASH
EGPC
EGPC
GPIO
GPIO
RING/PWRFAIL/LPCRST/GPB7
ADC6/GPI6
ADC7/GPI7
DAC0/GPJ0
DAC1/GPJ1
DAC2/GPJ2
DAC3/GPJ3
DAC4/GPJ4
DAC5/GPJ5
PWM0/GPA0
PWM1/GPA1
PWM2/GPA2
PWM3/GPA3
PWM4/GPA4
PWM5/GPA5
PWM6/GPA6
PWM7/GPA7
TACH0/GPD6
TACH1/GPD7
TMRI0/WUI2/GPC4
TMRI1/WUI3/GPC6
CRX0/GPC0
CTX0/GPB2
CRX1/GPH1/ID1
CTX1/GPH2/ID2
FLFRAME/GPG2/LF
FLRST/GPG0/TM
FLAD3/GPG6
FLAD0/SCE
EGAD/GPE1
EGCS/GPE2
EGCLK/GPE3
RI1/WUI0/GPD0
RI2/WUI1/GPD1
WUI5/GPE5
PWRSW/GPE4
GINT/GPD5
IT8512E/JX
IT8512E/JX
LQFP128-16X16-4-FX2
LQFP128-16X16-4-FX2
VBAT1
VCC
VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5
VSTBY6
RXD/GPB0
TXD/GPB1
FLAD2/SO
FLAD1/SI
FLCLK
GPH3/ID3
GPH4/ID4
GPH5/ID5
GPH6/ID6
GPG1/ID7
Need check PN
3
11
26
50
92
114
121
127
66
67
68
69
70
71
72
73
76
77
78
79
80
81
24
25
28
29
30
31
32
34
47
48
120
124
108
109
119
123
94
95
100
106
104
103
102
101
105
82
83
84
96
97
98
99
107
18
21
35
112
125
33
+3.3V_RUN
+3.3V_ALW
HWPG
CPU_PWRGD_Q
LCD_CBL_DET#
INVERTER_CBL_DET#
ADP_OC
R140 0 R140 0
2 1
D8 SDMK0340L-7-F D8 SDMK0340L-7-F
KB_BACKLITE_EN
SUS_ON
KB_DET#
USB_SIDE_EN#
USB_BACK_EN#
BID1
CHIPSET_ID1
LCDVCC_TST_EN
4
+RTC_CELL
R154 0 R154 0
C239
C239
R155
R155
0.1U
0.1U
*0_NC
*0_NC
10
10
X7R
X7R
HWPG 45
CPU_PWRGD_Q 12
GFX_PWRGD 55
LCD_CBL_DET# 26
INVERTER_CBL_DET# 26
PBAT_PRES# 48
1 2
SIO_SLP_S5# 13
ADAPT_TRIP_SEL 47
SIO_EXT_WAKE# 13
LAN_DISABLE# 33
EXPRCRD_PWREN# 13,37
SB_RSMRST# 13
SIO_PWRBTN# 13
BREATH_LED# 44
BAT2_LED# 44
FAN1_PWM 29
PWM_VADJ 26
BAT1_LED# 44
KB_BACKLITE_EN 43
CAP_LED# 43
BEEP 31
FAN1_TACH 29
PANEL_BKEN 19
LID_SW# 43
MEDIA_INT# 43
WIRELESS_ON/OFF# 44
AUX_EN_WOWL 39
CIRRX 43
RUN_ON 20,26,46,49,50,52,55
HDDC_EN 30
CPU_VCORE_ENABLE 53
IRQ_SERIRQ
LCD_BAK#
SMBDAT0
SMBCLK0
SMBDAT1
SMBCLK1
SMBDAT2
SMBCLK2
INVERTER_CBL_DET#
KB_DET#
LCD_CBL_DET#
HWPG
SUS_ON
RUN_ON
1
3
1
3
1
3
R505 100K R505 100K
R527 *100K_NC R527 *100K_NC
R8 100K R8 100K
Discrete
SUS_ON 46,49
KB_DET# 43
1.2V_ALW_SUS_ON 54
EC_FLASH_SPI_DO 41
EC_FLASH_SPI_DIN 41
EC_FLASH_SPI_CS# 41
EC_FLASH_SPI_CLK 41
PS_ID 48
5V_ALW_ON 52
SNIFFER_GREEN# 44
USB_SIDE_EN# 38
USB_BACK_EN# 38
BID1 5
MODC_EN 30
R510
R510
10K
10K
R515
R515
*10K_NC
*10K_NC
R168
R168
10K
10K
R169
R169
*10K_NC
*10K_NC
5
R150 10K R150 10K
R138 10K R138 10K
RP2
RP2
2
2.2KX2
2.2KX2
4
RP3
RP3
2
10KX2
10KX2
4
RP4
RP4
2
2.2KX2
2.2KX2
4
R509 100K R509 100K
R170 100K R170 100K
R167 100K R167 100K
+3.3V_ALW
R522
R522
R482
R482
10K
10K
10K
10K
R523
R523
R483
R483
*10K_NC
*10K_NC
*10K_NC
*10K_NC
+3.3V_RUN
+3.3V_ALW
Board ID Straps
(1)
USB_BACK_EN#
BID1
CHIPSET_ID1
USB_SIDE_EN#
UMA
1
0
1
0
VGA_IDENTIFY
USB_SIDE_EN#
1 = Discrete Gfx.
0 = UMA.
FX6A (Dis)
FX6 (UMA)
SSI (X00)
SSI (X00)
PT (X01) 0
PT (X01)
ST (X02)
ST (X02)
QT (A00)
QT (A00)
(A01)
(A01)
SIO_SLP_S3# 13
ACAV_IN 47
SNIFFER_PWR_SW# 44
NB_VCORE_RUN_ON 51
MAIN_PWR_SW# 44
LCDVCC_TST_EN 26
CHIPSET_ID1
1
1
1
1
1
1
BID1
USB_BACK_EN#
0 0
1
1
0
01
BID0
D D
R1610R161
0
C249
C249
18P
18P
50
50
COG
COG
W1
W1
32.768KHZ
32.768KHZ
ITE8512_XTAL1
1 4
2 3
1
C250
C250
18P
18P
50
50
COG
COG
CLK_PCI_8512
R14410R144
10
C222
C222
2.2P
2.2P
50
50
NPO
NPO
(8)
C948
C948
*1U_NC
*1U_NC
10
10
X5R
X5R
0603
0603
2
ITE8512IX_JX
C973
C973
0.1U
0.1U
16
16
X7R
X7R
ITE8512IX pin12 connect to GND.
ITE8512JX pin12 connect to 0.1uF, 1uF.
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
ADP_OC
R133 0 R133 0
R128 *0_NC R128 *0_NC
3
IINP 47
ADAPT_OC 47
4
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
COMPUTER
ITE8512
ITE8512
ITE8512
FX6 3A
FX6 3A
FX6 3A
5
of
of
of
42 70 Tuesday, May 20, 2008
42 70 Tuesday, May 20, 2008
42 70 Tuesday, May 20, 2008
1
2
3
4
5
6
7
8
TP
A A
LID_SW# 42
CLK_TP_SIO 42
DAT_TP_SIO 42
Media Button
B B
MEDIA_INT# 42
Consumer IR
C C
+5V_RUN
1
3
RP32
RP32
4.7KX2
4.7KX2
2
4
SMBCLK2 22,42
SMBDAT2 22,42
C316
C316
10P
10P
50
50
NPO
NPO
+5V_RUN
TP_CLK
TP_DATA
4
3
2
1
C325
C325
0.1U
0.1U
10
10
X7R
X7R
U21
U21
IRTX
VCC
GND1
GND2
TSOP36136TS
TSOP36136TS
L41 BLM11A601S L41 BLM11A601S
L42 BLM11A601S L42 BLM11A601S
C318
1
R379
R379
100
100
C522
C522
4.7U
4.7U
10
10
X5R
X5R
0805
0805
3
C318
10P
10P
50
50
NPO
NPO
2
*DA204U_NC
*DA204U_NC
D23
D23
+3.3V_ALW +3.3V_ALW
I2C
HDD_LED 44
WLAN_LED 44
BT_LED 44
R380
R380
10K
10K
C524
C524
0.1U
0.1U
10
10
X7R
X7R
C785
C785
C784
C784
10P
10P
10P
10P
50
50
50
50
NPO
NPO
NPO
NPO
+3.3V_ALW
+3.3V_ALW
R129
R129
100K
100K
R439 10K R439 10K
C631
C631
1U
1U
10
10
X5R
X5R
0603
0603
CIRRX 42
CIRRX
C324
C324
0.047U
0.047U
10
10
X7R
X7R
+3.3V_ALW
+3.3V_ALW
C320
C320
0.1U
0.1U
10
10
X7R
X7R
R599
R599
100K
100K
C317
C317
0.047U
0.047U
10
10
X7R
X7R
+5V_ALW
JP1
JP1
1
5V_PWR
2
CLK
3
DAT
4
INT
5
GND
6
LED1
7
LED2
8
LED3
9
3V_ALW
10
5V_LED
ACES_88511-1041
ACES_88511-1041
JP2
JP2
1
2
3
4
5
6
ACES_88513-064N
ACES_88513-064N
KB_DET# 42
KSO[0..16] 42
KSI[0..7] 42
+3.3V_RUN +3.3V_RUN
R115
R115
2
100K
100K
NUM_LED# 42
Q80
Q80
2N7002W-7-F
2N7002W-7-F
+3.3V_RUN +3.3V_RUN
R108
R108
2
100K
100K
CAP_LED# 42
Q78
Q78
2N7002W-7-F
2N7002W-7-F
+5V_RUN
1 3
Q79
Q79
DDTA114YUA-7-F
DDTA114YUA-7-F
47K
47K
2
3 1
10K
10K
R478 220 R478 220
+5V_RUN
1 3
Q77
Q77
DDTA114YUA-7-F
DDTA114YUA-7-F
47K
47K
2
3 1
10K
10K
R479 220 R479 220
C111
C111
KSI7
*100P_NC
*100P_NC
50
50
NPO
NPO
NUM_LED_L
CAP_LED_L
Key board Illumination
(11)
Q104
Q104
SI2304BDS-T1-E3
5
SI2304BDS-T1-E3
3
1
2
+15V_ALW +3.3V_ALW +5V_RUN +KB_LED
R223
R223
*100K_NC
5
*100K_NC
3 4
Q46A
Q46A
*2N7002DW-7-F_NC
*2N7002DW-7-F_NC
2
D D
KB_BACKLITE_EN 42
1
2
R221
R221
*100K_NC
*100K_NC
6 1
Q46B
Q46B
*2N7002DW-7-F_NC
*2N7002DW-7-F_NC
FS3
FS3
1206L050YR
1206L050YR
1 2
Q39
Q39
*SI2304BDS-T1-E3_NC
*SI2304BDS-T1-E3_NC
3
2
C319
C319
*4700P/50V/0603_NC
*4700P/50V/0603_NC
3
LED_PWM
1
C310
C310
*10U_NC
*10U_NC
6.3
6.3
X5R
X5R
0603
0603
R199
R199
*20K_NC
*20K_NC
4
KB_BACKLITE_EN 42
KB_LED_DET 14
6
KEYBOARD CONNECTOR
R85 10K R85 10K
+3.3V_ALW
KSI7
KSI6
KSI4
KSI2
KSI5
KSI1
KSI3
KSI0
KSO5
KSO4
KSO7
KSO6
KSO8
KSO3
KSO1
KSO2
KSO0
KSO12
KSO16
KSO15
KSO13
KSO14
KSO9
KSO11
CAP_LED_L
NUM_LED_L
CP5 *100PX4_NC
CP5 *100PX4_NC
7 8
5
6
3
4
1
2
50
50
NPO
NPO
1206
1206
CP2 *100PX4_NC
CP2 *100PX4_NC
7 8
5
6
3
4
1
2
50
50
NPO
NPO
1206
1206
CP4 *100PX4_NC
CP4 *100PX4_NC
7 8
5
6
3
4
1
2
50
50
NPO
NPO
1206
1206
100P CAPS CLOSE TO JKB1
+KB_LED +KB_LED
R797 100K R797 100K
R798
R798
200K
200K
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
LED_PWM
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
TP/KB/CIR/BT
TP/KB/CIR/BT
TP/KB/CIR/BT
FX6 3A
FX6 3A
FX6 3A
7
KSO10
KSI1
KSI3
KSI0
KSO5
KSO3
KSO1
KSO2
KSO0
KSO14 KSO12
KSO9 KSO16
KSO11
KSO10
J4
J4
1
1
2
2
3
3
4
4
ACES_88513-044N
ACES_88513-044N
JKB1
JKB1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
GND2 GND1
HRS_FH28-60(30)SB-1SH(05)
HRS_FH28-60(30)SB-1SH(05)
CP6 *100PX4_NC
CP6 *100PX4_NC
6
4
2
50
50
NPO
NPO
1206
1206
CP3 *100PX4_NC
CP3 *100PX4_NC
6
4
2
50
50
NPO
NPO
1206
1206
CP1 *100PX4_NC
CP1 *100PX4_NC
6
4
2
50
50
NPO
NPO
1206
1206
KSI6
7 8
KSI4
5
KSI2
3
KSI5
1
KSO4
7 8
KSO7
5
KSO6
3
KSO8
1
7 8
5
KSO15
3
KSO13
1
C311
C311
0.1U
0.1U
10
10
X7R
X7R
of
of
of
43 70 Tuesday, May 20, 2008
43 70 Tuesday, May 20, 2008
43 70 Tuesday, May 20, 2008
8
A
ESD2
Biometric
SB_USBP10- 13
SB_USBP10+ 13
4 4
HDD activity LED
LED_MASK# 42
SATA_ACT# 14
3 3
USBP10_DUSBP10_D+
+3.3V_RUN
R282
R282
100K
100K
BT / UWB LED
LED_MASK# 42
+3.3V_RUN
R243
R243
100K
100K
LED_WPAN# 39
This circuit is only needed if
the platform has the SNIFFER.
2 2
ESD2
1
1
2
2
334
*SRV05-4.TCT_NC
*SRV05-4.TCT_NC
L39
L39
1 2
*DLW21SN900SQ2L_NC
*DLW21SN900SQ2L_NC
R196 0 R196 0
R193 0 R193 0
R272
R272
*0_NC
*0_NC
2
3 1
Q52
Q52
2N7002W-7-F
2N7002W-7-F
+3.3V_RUN
R244
R244
*0_NC
*0_NC
2
3 1
Q48
Q48
2N7002W-7-F
2N7002W-7-F
3 4
2
R2470R247
0
6
5
R2730R273
0
2
10K
10K
6
5
4
+5V_RUN +3.3V_RUN
47K
47K
10K
10K
+1.8V_RUN
USBP10_DUSBP10_D+
1 3
+5V_RUN
1 3
47K
47K
+3.3V_ALW
+3.3V_RUN
ACES_88511-0641
ACES_88511-0641
Q51
Q51
DDTA114YUA-7-F
DDTA114YUA-7-F
R261
R261
220
220
Q47
Q47
DDTA114YUA-7-F
DDTA114YUA-7-F
R234
R234
220
220
J3
J3
1
2
3
4
5
6
HDD_LED 43
BT_LED 43
B
WLAN
Power Buttom
Power Switch
C
2
3 1
10K
10K
+5V_SUS
2
3 1
Q76
Q76
2N7002W-7-F
2N7002W-7-F
R449
R449
100K
100K
R450 10K R450 10K
C638
C638
1U
1U
10
10
X5R
X5R
0603
0603
+5V_RUN +3.3V_WLAN
1 3
47K
47K
R475
R475
100K
100K
2
Q89
Q89
DDTA114YUA-7-F
DDTA114YUA-7-F
R623
R623
220
220
5
U24
U24
TC7SZ04FU(T5L,F,T)
TC7SZ04FU(T5L,F,T)
3
POWER_ SW_IN0#
WLAN_LED 43
BREATH_PWRLED
4
+3.3V_WLAN
R643
R643
2
4.7K
4.7K
LED_WLAN_OUT# 39
Q90
Q90
2N7002W-7-F
2N7002W-7-F
+3.3V_SUS +3.3V_SUS +3.3V_SUS
BREATH_LED# 42
+3.3V_ALW
MAIN_PWR_SW# 42
D
Sniffer Switch ON/OFF
+3.3V_ALW
R392
R392
100K
100K
WIRELESS_ON/OFF# 42
C525
C525
*1U_NC
*1U_NC
10
10
X5R
X5R
0603
0603
Sniffer Buttom
R88
R88
100K
100K
SNIFFER_GREEN# 42
2N7002W-7-F
2N7002W-7-F
SNIFFER_PWR_SW# 42
Sniffer Switch
2
3 1
R452
R452
100K
100K
R451 0 R451 0
C640
C640
*1U_NC
*1U_NC
10
10
X5R
X5R
0603
0603
2
SNIFFER1
10K
10K
R386 0 R386 0
Q23
Q23
+3.3V_ALW
+5V_SUS +5V_SUS
1 3
47K
47K
SNIFFER2
E
SW1
SW1
1
S1
2
G
3
S0
LSS12P-PC-V-T/R
LSS12P-PC-V-T/R
Q20
Q20
DDTA114YUA-7-F
DDTA114YUA-7-F
R69 220 R69 220
SNIFFER G_R
Battery status.
+3.3V_ALW +3.3V_ALW
R123
R123
2
100K
100K
+3.3V_ALW
10K
10K
A
Q28
Q28
2N7002W-7-F
2N7002W-7-F
1 3
47K
47K
BAT2_LED
3 1
BAT1_LED# 42
1 1
BAT2_LED# 42
2
2
10K
10K
Q26
Q26
DDTA114YUA-7-F
DDTA114YUA-7-F
R11468R114
68
+5V_ALW2
1 3
47K
47K
BAT1_LED
Q27
Q27
DDTA114YUA-7-F
DDTA114YUA-7-F
R118
R118
220
220
RBAT2_LED 48
RBAT1_LED 48
+3.3V_ALW +3.3V_ALW
BREATH_PWRLED
R460 220 R460 220
SNIFFER Y_R:WLAN on/off
SNIFFER G_R:AP detection
B
2
2
1
*DA204U_NC
*DA204U_NC
D26
D26
3
SNIFFER2 POWER_ SW_IN0#
SNIFFER2
SNIFFER G_R
RBREATH_PWRLED
POWER_ SW_IN0#
1
3
J2
J2
1
GND
2
SSW1
3
SLED1
4
SLED2
5
GND
6
PLED
7
PSW
JST_SM07B-SHLS-TF(LF)(SN)
JST_SM07B-SHLS-TF(LF)(SN)
C
*DA204U_NC
*DA204U_NC
D25
D25
SNIFFER2
SNIFFER G_R
RBREATH_PWRLED
POWER_ SW_IN0#
C949 100P/50/X7R C949 100P/50/X7R
C950 100P/50/X7R C950 100P/50/X7R
C951 100P/50/X7R C951 100P/50/X7R
C952 100P/50/X7R C952 100P/50/X7R
D
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
COMPUTER
SWITCH/LED
SWITCH/LED
SWITCH/LED
FX6 3A
FX6 3A
FX6 3A
E
of
of
of
44 70 Tuesday, May 20, 2008
44 70 Tuesday, May 20, 2008
44 70 Tuesday, May 20, 2008
1
2
3
4
5
6
7
8
Symbol:
2N7002W-7-F
D(3)
G(2)
S(1)
A A
B B
1.2V_ALW_SUS_PWRGD 54
1.8V_SUS_PWRGD 49
1.5V_RUN_PWRGD 50
1.1V_RUN_PWRGD 50
C C
D D
R501 0 R501 0
R500 0 R500 0
R496 0 R496 0
R495 0 R495 0
PLTRST# 9,12,14,18,37,39
+3.3V_ALW
14
U26A
U26A
1
2
SN74AHC08PW
SN74AHC08PW
U26B
U26B
4
5
SN74AHC08PW
SN74AHC08PW
PLTRST#
R226 *0_NC R226 *0_NC
+3.3V_ALW
3
CPU_VCORE_PWRGD 42,53
6
+3.3V_SUS
C332 0.1U
C332 0.1U
16
16
X5R
X5R
5
U14
U14
2
1
4
74AHC1G08GW
74AHC1G08GW
14
U27A
U27A
1
2
SN74AHC08PW
SN74AHC08PW
PLTRST_SYS# 33,39,40,51
3
R504 0 R504 0
NB_VCORE_PWRGD 51
U27B
U27B
4
5
SN74AHC08PW
SN74AHC08PW
R506 *0_NC R506 *0_NC
6
R507 0 R507 0
WD_PWRGD 13
+3.3V_ALW
14
U29A
U29A
1
2
SN74AHC08PW
SN74AHC08PW
3
SB_PWRGD
R512 0 R512 0
1.2V_RUN_ON 10,42,46
R508 0 R508 0
RESET_OUT# 42
R517
R517
*0_NC
*0_NC
WD_PWRGD:
Push/Pull when A11SB700, OD when A12SB700.
HWPG 42
R514 0 R514 0
U28
U28
1
2
R516 0 R516 0
5
NC
VCC
A
4
GND3Y
*SN74AUC1G17DBVR_NC
*SN74AUC1G17DBVR_NC
U29B
U29B
4
5
SN74AHC08PW
SN74AHC08PW
+1.8V_RUN
R511 *33_NC R511 *33_NC
R521 0 R521 0
6
C690 *0.1U/10V/X7R_NC C690 *0.1U/10V/X7R_NC
SB_PWRGD
SB_PWRGD 5,13
NB_PWRGD 9
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet
COMPUTER
System Reset Circuit
System Reset Circuit
System Reset Circuit
FX6 3A
FX6 3A
FX6 3A
7
of
of
of
45 70 Tuesday, May 20, 2008
45 70 Tuesday, May 20, 2008
45 70 Tuesday, May 20, 2008
8
1
PR71
PR72
PR72
*100K_NC
*100K_NC
A A
SUS_ON 42,49
PR73
PR73
100K
100K
SUS_ON#
6 1
2
PQ11B
PQ11B
2N7002DW-7-F
2N7002DW-7-F
PR71
100K
100K
PQ11A
PQ11A
2N7002DW-7-F
2N7002DW-7-F
+5V_SUS_ENABLE
3 4
5
2
PQ52
+5V_ALW +5V_SUS +15V_ALW +5V_ALW2 +3.3V_ALW
PQ52
SI4800BDY-T1-E3
SI4800BDY-T1-E3
8
7
6
5
4
PC45
PC45
4700P/50V/0603
4700P/50V/0603
+5V_SUS
3
2
1
PC177
PC177
0.1U
0.1U
50
50
0603
0603
PR197
PR197
20K
20K
3
+3.3V_ALW
PR199
PR199
100K
100K
RUN_ON#
6 1
2
PQ53B
PQ53B
2N7002DW-7-F
2N7002DW-7-F
RUN_ON 20,26,42,49,50,52,55
PR198
PR198
*100K_NC
*100K_NC
4
PQ16
+5V_ALW +5V_RUN +15V_ALW +5V_ALW2
PR78
PR78
100K
100K
RUN_ENABLE
3 4
5
PQ53A
PQ53A
2N7002DW-7-F
2N7002DW-7-F
RUN_ENABLE
PQ16
SI4800BDY-T1-E3
SI4800BDY-T1-E3
8
7
6
5
4
3
2
1
PC47
PC47
4700P/50V/0603
4700P/50V/0603
5
+5V_RUN
MAX : 0.432
PC46
PC46
0.1U
0.1U
50
50
0603
0603
PR76
PR76
20K
20K
+3.3V_RUN
MAX : 5.228A
PC58
PC58
0.1U
0.1U
50
50
0603
0603
PR94
PR94
20K
20K
SUS_ON#
PQ22
+3.3V_ALW +3.3V_RUN +15V_ALW
PQ34
+3.3V_ALW +3.3V_SUS +15V_ALW
PR117
PR117
100K
100K
3 1
PQ35
PQ35
2
2N7002W-7-F
2N7002W-7-F
SUS_ENABLE
PC79
PC79
4700P/50V/0603
4700P/50V/0603
PQ34
SI4800BDY-T1-E3
SI4800BDY-T1-E3
8
7
6
5
4
+3.3V_SUS
3
2
1
MAX : 0.431A
PC73
PC73
0.1U
0.1U
50
50
0603
0603
PR107
PR107
20K
20K
RUN_ON#
PR92
PR92
680K
680K
PQ21
PQ21
2N7002W-7-F
2N7002W-7-F
3.3V_RUN_ENABLE
3 1
2
PQ22
FDS8880_NL
FDS8880_NL
8
7
6
5
3
2
1
4
PC57
PC57
4700P/50V/0603
4700P/50V/0603
B B
+15V_ALW
PR213
PR213
100K
100K
1.2V_SUS_ENABLE
3 1
PQ54
SUS_ON#
PQ54
2
2N7002W-7-F
2N7002W-7-F
+1.2V_ALW_SUS +1.2V_SUS
FL12
FL12
*FBMH3225HM202NT_NC
*FBMH3225HM202NT_NC
PQ55
PQ55
FDC655BN
FDC655BN
6
5
4
2
1
3
PC198
PC198
4700P/50V/0603
4700P/50V/0603
PC192
PC192
0.1U
0.1U
50
50
0603
0603
PR208
PR208
20K
20K
+15V_ALW +1.8V_RUN +1.8V_SUS
PR80
PR80
680K
680K
3 1
PQ15
RUN_ON#
PQ15
2
2N7002W-7-F
2N7002W-7-F
1.8V_RUN_ENABLE
1.8V_RUN_ENABLE 11
PQ18
PQ18
FDS8880_NL
FDS8880_NL
8
7
6
5
3
2
1
4
PC48
PC48
4700P/50V/0603
4700P/50V/0603
+1.8V_RUN
MAX : 2.735A
PC49
PC49
0.1U
0.1U
50
50
0603
0603
PR82
PR82
20K
20K
(19)
PQ28
8
7
6
5
PQ28
FDS6298
FDS6298
3
2
1
4
PC64
PC64
4700P/50V/0603
4700P/50V/0603
+0.9V_DDR_VTT +1.8V_SUS +3.3V_SUS +5V_SUS
C C
PR96
PR96
100K
100K
6 1
2
PQ26B
PQ26B
2N7002DW-7-F
2N7002DW-7-F
PR97
PR97
100K
100K
1.2V_RUN_ENABLE
3 4
5
PQ26A
PQ26A
2N7002DW-7-F
2N7002DW-7-F
SUS_ON#
2
PQ32
PQ32
*2N7002W-7-F_NC
*2N7002W-7-F_NC
3 1
PR103
PR103
*22_NC
*22_NC
PQ31
PQ31
*2N7002W-7-F_NC
*2N7002W-7-F_NC
PR101
PQ30
PQ30
PR101
*22_NC
*22_NC
3 1
2
PR100
PQ29
PQ29
PR100
*22_NC
*22_NC
3 1
2
*2N7002W-7-F_NC
*2N7002W-7-F_NC
PR102
PR102
*22_NC
*22_NC
3 1
2
*2N7002W-7-F_NC
*2N7002W-7-F_NC
PR95
PR95
*100K_NC
*100K_NC
1.2V_RUN_ON 10,42,45
+1.2V_RUN +15V_ALW +5V_ALW2 +3.3V_ALW +1.2V_ALW_SUS
PC66
PC66
0.1U
0.1U
50
50
0603
0603
+1.2V_RUN
MAX : 1.883A
PR98
PR98
20K
20K
Reserve discharge path
+1.5V_RUN +2.5V_RUN +3.3V_RUN +5V_RUN +1.8V_RUN
PR81
PR81
*1K_NC
*1K_NC
D D
RUN_ON#
*2N7002W-7-F_NC
*2N7002W-7-F_NC
PQ17
PQ17
3 1
2
PQ20
PQ20
*2N7002W-7-F_NC
*2N7002W-7-F_NC
Reserve discharge path
1
PR88
PR88
*1K_NC
*1K_NC
3 1
2
*2N7002W-7-F_NC
*2N7002W-7-F_NC
PQ14
PQ14
PR75
PR75
*1K_NC
*1K_NC
3 1
2
PQ19
PQ19
*2N7002W-7-F_NC
*2N7002W-7-F_NC
2
2
PR84
PR84
*1K_NC
*1K_NC
3 1
*2N7002W-7-F_NC
*2N7002W-7-F_NC
PQ13
PQ13
PR74
PR74
*1K_NC
*1K_NC
3 1
2
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
3
4
Date: Sheet
COMPUTER
RUN POWER SW
RUN POWER SW
RUN POWER SW
M-09 3A
M-09 3A
M-09 3A
5
of
of
of
46 70 Tuesday, May 20, 2008
46 70 Tuesday, May 20, 2008
46 70 Tuesday, May 20, 2008
A
LDO
PR151
PR151
10K/F
10K/F
PR152
PR152
15.8K/F
15.8K/F
PR149
PR149
8.45K
8.45K
+DC_IN_SS
3 1
2
PQ9
PQ9
2N7002W-7-F
2N7002W-7-F
PR150 0 PR150 0
+3.3V_ALW
SMBCLK0 42,48
SMBDAT0 42,48
SMBUS Address 12
PR156
PR156
10K/F
10K/F
PC115
PC115
PC112
PC112
0.01U/25V
0.01U/25V
0.1U/10V
0.1U/10V
PR159
PR159
49.9K/F
49.9K/F
PC124
PC124
0.01U/25V
0.01U/25V
+DC_IN_SS
1 1
2 2
ACAV_IN 42
IINP 42
3 3
ACAV_IN
PR160
PR160
365K/F
365K/F
PC116
PC116
0.01U/25V
0.01U/25V
PR27
PR27
10K
10K
B
PQ40
PQ40
SI4835BDY-T1-E3
SI4835BDY-T1-E3
8
7
6
5
4
+DC_IN_SS
PC128
PC128
1U/25V/0805
1U/25V/0805
8731_ACIN
PC111 0.1U/50V/0603 PC111 0.1U/50V/0603
IINP
PC118
PC118
0.01U/25V
0.01U/25V
PR26
PR26
100K
100K
+PWR_SRC
PR164
PR164
0.01/F/2512
2
9
8
6
5
4
3
PC121
PC121
1U/10V/0603
1U/10V/0603
1 2
DCIN
ACIN
ACOK
VDD
SCL
SDA
BATSEL
IINP
CCV
CCI
CCS
REF
DAC
7
0.01/F/2512
3
CSSP
1
GND
PC113
PC113
0.1U/10V
0.1U/10V
4
CSSN
27
28
CSSP
CSSN
BST
LDO
VCC
DHI
LX
DLO
PGND
CSIP
CSIN
FBSA
FBSB
GND
MAX8731AETI+
MAX8731AETI+
12
PR163
PR163
0/0603
0/0603
PC122 1U/10V/0603 PC122 1U/10V/0603
LDO
BST
25
21
26
24
23
20
19
18
17
15
16
PU8
PU8
DHI
LX
DLO
PR157
PR157
100
100
PR158
PR158
0/0603
0/0603
PR162
PR162
33/F/0603
33/F/0603
+VCHGR
1
2
3
22
13
11
10
14
8731REF
C
FL6
FL6
HI1206T161R-10(160,6A)
HI1206T161R-10(160,6A)
LDO
RB500V-40
RB500V-40
PD9
PD9
PC131
PC131
1U/10V/0603
1U/10V/0603
PR161 1/0603 PR161 1/0603
PC129
PC129
220P/50V
220P/50V
*2200P/50V_NC
*2200P/50V_NC
2 1
PC130
PC130
0.1U/50V/0603
0.1U/50V/0603
SI4812BDY-T1-E3
SI4812BDY-T1-E3
CSIP
CSIN
PC136
PC136
PC120
PC120
3300P/50V
3300P/50V
CHGR_IN
4
4
PQ41
PQ41
PC139
PC139
*0.1U/50V/0603_NC
*0.1U/50V/0603_NC
PC137
PC137
2200P/50V
2200P/50V
876
PQ42
PQ42
SI4800BDY-T1-E3
SI4800BDY-T1-E3
2
351
SIL104R-5R8PF (6A/16mOhm)
SIL104R-5R8PF (6A/16mOhm)
876
PR155
PR155
2.2/0805
2.2/0805
2
351
PC107
PC107
1000P/50V
1000P/50V
PC138
PC138
0.1U/50V/0603
0.1U/50V/0603
PL5
PL5
CHG_CS
SIL104R-5R8PF ( 5.8U +/-30%/Isat=5.5A/Irms=6A/DCR_typ=16mOhm/10X10.1X3.8 )
SI4800BDY-T1-E3 ( Vds=30V/Id=7A/Rdson=30mOhm )
SI4812BDY-T1-E3 (Vds=30V/ ID=7.7A/Rdson=21mOhm/Vsd=0.5V@1.4A)
D
PR153
PR153
0.01/F/2512
0.01/F/2512
1 2
3
4
PQ38
PQ38
SI4835BDY-T1-E3
SI4835BDY-T1-E3
8
7
1
6
2
5
3
4
+DC_IN_SS
PR141
PR141
470K
470K
PC132
PC132
10U/25V/1206
10U/25V/1206
PC123
PC123
3300P/50V/0603
3300P/50V/0603
PC125
PC125
1000P/50V
1000P/50V
PC134
PC134
10U/25V/1206
10U/25V/1206
+VCHGR_1
PC126
PC126
2200P/50V
2200P/50V
PC119
PC119
0.1U/50V/0603
0.1U/50V/0603
Max Charging current
setting 4.7A
Id=9.6A@Vgs=10V
PC106
PC106
PC117
PC117
10U/25V/1206
10U/25V/1206
10U/25V/1206
10U/25V/1206
FL3
FL3
HI1206T161R-10(160,6A)
HI1206T161R-10(160,6A)
PC110
PC110
PC114
PC114
10U/25V/1206
10U/25V/1206
10U/25V/1206
10U/25V/1206
E
+VCHGR 48
TABLE 1
+3.3V_ALW
+5V_ALW2
PR6
PR6
PR148
PR148
PR147
PR147
Ra
Rb
PC105
PC105
*0.01U/25V_NC
*0.01U/25V_NC
Rc
B
*51.1K/F_NC
*51.1K/F_NC
ADAPT_TRIP_SEL 42
PR146 *0_NC PR146 *0_NC
4 4
A
Rd
PR7 *33.2K/F_NC PR7 *33.2K/F_NC
*17.8K/F_NC
*17.8K/F_NC
*348/F/0603_NC
*348/F/0603_NC
PR145
PR145
*1M_NC
*1M_NC
PU7A
PU7A
*LM393DR2G_NC
*LM393DR2G_NC
PC104
PC104
PC102
PC103
PC103
*0.01U/25V_NC
*0.01U/25V_NC
PC102
*100P/50V_NC
*100P/50V_NC
For GPRS immunity place PC41 & PC39 as close to
the IC as possible
PC6
PC6
*0.01U/25V_NC
*0.01U/25V_NC
8 4
3
+
+
1
2
-
-
*100P/50V_NC
*100P/50V_NC
PC7
PC7
*100P/50V_NC
*100P/50V_NC
PC101
PC101
*0.1U/10V_NC
*0.1U/10V_NC
+5V_ALW2
PR144
PR144
*100K_NC
*100K_NC
2
C
PR3
PR3
*100K_NC
*100K_NC
3 1
PQ3
PQ3
*2N7002W-7-F_NC
*2N7002W-7-F_NC
PR1
PR1
*1K_NC
*1K_NC
ADAPT_OC 42
5
+
+
6
-
-
PU7B
PU7B
*LM393DR2G_NC
*LM393DR2G_NC
7
ADAPTER(W)
65
90
130
150
**PR119 is popluated if ADAPT_TRIP_SEL is used to program for the
next lower adapter.
D
TRIP CURRENT
(A)
3.17
4.43
6.43
7.43
Ra
57.6K
Rb
13K
17.8K
32.4K
30.9K
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
20.5K
24.9K
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
BATTERY CHARGER
BATTERY CHARGER
BATTERY CHARGER
FX6 3A
FX6 3A
FX6 3A
105
348
100
432
**Rd Rc
N/A
33.2K 51.1K
27.4K
88.7K
47 70 Tuesday, May 20, 2008
47 70 Tuesday, May 20, 2008
47 70 Tuesday, May 20, 2008
of
of
E
of
A
+3.3V_ALW
1
3
1
3
RP1
RP1
100/4P2R
100/4P2R
RP20
RP20
100/4P2R
100/4P2R
1
2
4
2
4
PC98 2200P/50V PC98 2200P/50V
1 1
2 2
PC100 0.1U/50V/0603 PC100 0.1U/50V/0603
SUY_200045MR009H579ZL
SUY_200045MR009H579ZL
BATT_PRES#
SYSPRES#
BATT_VOLT
JABT1
JABT1
BATT1+
BATT2+
SMB_CLK
SMB_DAT
BATT1BATT2-
1
2
3
4
5
6
7
8
9
2
PD2
PD2
3
*DA204U_NC
*DA204U_NC
B
1
2
PD1
PD1
3
*DA204U_NC
*DA204U_NC
DOCK_PSID
PD3
PD3
*SSM24PT_NC
*SSM24PT_NC
C
2
1
2
1
PD7
PD7
3
DA204U
DA204U
PR19
PR19
100K/F
100K/F
PR21
PR21
15K/F
15K/F
3
PQ4
PQ4
FDV301N
FDV301N
2
PD8
PD8
3
*DA204U_NC
*DA204U_NC
SMBUS Address=16H
PR17 100 PR17 100
1
2
1 3
PQ8
PQ8
MMST3904-7-F
MMST3904-7-F
+5V_ALW2
+3.3V_ALW
+VCHGR 47
SMBCLK0 42,47
SMBDAT0 42,47
+5V_ALW2 +3.3V_ALW
2
1
*DA204U_NC
*DA204U_NC
PD4
PD4
3
+5V_ALW2
1
PR23
PR23
10K
10K
PR25
PR25
*100_NC
*100_NC
3
PR142
PR142
10K
10K
2
*DA204U_NC
*DA204U_NC
PD5
PD5
+3.3V_ALW
PR20
PR20
2.2K
2.2K
PR143
PR143
10K
10K
PS_ID 42
PS_ID_DISABLE#
D
PBAT_PRES# 42
PBAT_ALARM#
E
RBAT2_LED 44
RBAT1_LED 44
PL1
PL1
BLM11B102SPT
J8
J8
3 3
4 4
8
BAT2_LED
7
BAT1_LED
6
LED_DET
5
PSID
4
GND
3
GND
2
DC
1
DC
MOLEX_87438-0843
MOLEX_87438-0843
+DCIN_JACK
-DCIN_JACK
RV2
PC221
PC221
1000P
1000P
A
RV2
*VZ0603M260APT_NC
*VZ0603M260APT_NC
+DCIN_JACK -DCIN_JACK
BLM11B102SPT
Change Value per GG updated
EMI requirement on 0812
FL5
FL5
BLM41PG600SN1L
BLM41PG600SN1L
0.1U/50V/0603
FL4
FL4
BLM41PG600SN1L
BLM41PG600SN1L
RV1
RV1
*VZ0603M260APT_NC
*VZ0603M260APT_NC
0.1U/50V/0603
(P2)
PC223
PC223
PC222
PC222
0.1U
0.1U
0.01U
0.01U
PC12
PC12
PC224
PC224
1000P
1000P
PC225
PC225
0.01U
0.01U
PQ39
PQ39
SI4835BDY-T1-E3
SI4835BDY-T1-E3
+DC_IN
1
2
3
4
PC17
PC17
0.47U/25V/0805
0.47U/25V/0805
PC226
PC226
0.1U
0.1U
B
PR22
PR22
240K
240K
PR24
PR24
47K
47K
C
+DC_IN_SS
8
7
6
5
PC14
PC14
0.01U/25V
0.01U/25V
PR16
PR16
10K/F/0603
10K/F/0603
PC18
PC18
0.1U/50V/0603
0.1U/50V/0603
D
PC127
PC16
PC16
0.1U/50V/0603
0.1U/50V/0603
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
PC127
10U/25V/1206
10U/25V/1206
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
DCIN & BATT
DCIN & BATT
DCIN & BATT
FX6 3A
FX6 3A
FX6 3A
E
of
of
of
48 70 Tuesday, May 20, 2008
48 70 Tuesday, May 20, 2008
48 70 Tuesday, May 20, 2008
5
4
3
2
1
FL1
FL1
HI1206T161R-10(160,6A)
+1.8V_SUS
PC202
PC202
0.1U/10V
0.1U/10V
HI1206T161R-10(160,6A)
PC68
PC68
10U/25V/1206
10U/25V/1206
+
+
PC201
PC201
220U/4V/ESR25
220U/4V/ESR25
PR1340PR134
PR113 0/0603 PR113 0/0603
PR233
PR233
11.8K/F
11.8K/F
OCP Setting
(Note 1)
PC84
PC84
4.7U/25V/0805
4.7U/25V/0805
0
51116S5 51116S3
PC76 0.1U/50V/0603 PC76 0.1U/50V/0603
PR139 *0_NC PR139 *0_NC
PR133 0 PR133 0
PR136 100K PR136 100K
CPU_VDDIO_SUS_FB_H 5
CPU_VDDIO_SUS_FB_L 5
Routing as Differential signal.
PC96
PC96
*0.1U/10V_NC
*0.1U/10V_NC
51116DH
51116LX
51116DL
RUN_ON 20,26,42,46,50,52,55
SUS_ON 42,46
+3.3V_ALW
1.8V_SUS_PWRGD 45
4
4
PR132
PR132
*0_NC
*0_NC
PR140
PR140
*0_NC
*0_NC
2
2
876
9
351
876
9
351
PQ33
PQ33
FDS6298
FDS6298
PQ37
PQ37
FDMS8672S
FDMS8672S
(5)
PR1220PR122
0
DIS_MODE
+1.8V_SUS
PC209
PC209
0.1U/10V
0.1U/10V
PU5
PU5
TPS51116PWPRG4
TPS51116PWPRG4
1
VLDOIN
2
VTT
4
VTTSNS
5
GND
3
VTTGND
6
MODE
7
VTTREF
8
COMP
9
VDDSNS
10
VDDQSET
+5V_ALW2
+5V_ALW
PC94
PC94
*18P/50V_NC
*18P/50V_NC
DRVH
VBST
DRVL
PGND
V5IN
PGOOD
GND21GND22GND23GND24GND25GND26GND
27
PR131
PR131
0/0603
0/0603
PR247
PR247
*0/0603_NC
*0/0603_NC
PC95
PC95
*0.1U/10V_NC
*0.1U/10V_NC
19
20
18
LL
17
16
11
S3
12
S5
14
13
15
CS
PC206
PC206
*1000P/50V_NC
*1000P/50V_NC
5VIN
PR137
PR137
*143K/F_NC
*143K/F_NC
PR138
PR138
*100K/F_NC
*100K/F_NC
51116S3
51116S5
5VIN 5VIN
D D
TDC : 1.925A
MAX : 1.925A
OCP : 2.75A
CPU_VTT_SUS_SENSE 4
+0.9V_DDR_VTT
PC85
+0.9V_DDR_VTT
(5)
+0.9V_DDR_REF
C C
PR230
PR230
*0_NC
*0_NC
(5)
+1.8V_SUS
PR2290PR229
0
PC85
10U/10V/0805
10U/10V/0805
PR135
PR135
*0/0603_NC
*0/0603_NC
PC204
PC204
0.033U/16V
0.033U/16V
DIS_MODE
PR124
PR124
*0_NC
*0_NC
PC86
PC86
10U/10V/0805
10U/10V/0805
FOR DDR II
PC74
PC74
1U/10V/0603
1U/10V/0603
PR2350PR235
0
Mode Discharge Mode
+1.8V
Tracking Discharge
GND
Non-Tracking Discharge
B B
1P8V_SUS_PWR_SRC
PC67
PC67
2200P/50V
2200P/50V
MPC1040LR88_0.88uH(17A/2.3mOhm)
MPC1040LR88_0.88uH(17A/2.3mOhm)
PR234
PR234
2.2/F/0603
2.2/F/0603
PC208
PC208
2200p/50V
2200p/50V
PC71
PC71
0.1U/50V/0603
0.1U/50V/0603
PL3
PL3
(P3)
PR1300PR130
0
PC69
PC69
10U/25V/1206
10U/25V/1206
+PWR_SRC
+1.8V_SUS
TDC : 13.514A
MAX : 13.514A
OCP : 19.307A
(5)
+
+
PC200
PC200
220U/4V/ESR25
220U/4V/ESR25
+1.8V_SUS
0/0603
0/0603
PR125
PR125
MPC1040LR88 (0.88U +/- 20%/Isat=24A/Irms=17A/DCR_typ=2.3mOhm/11.5X10X4)
FDS6298 ( Vds=30V/Id=13A/RDdson=12mOhm )
FDMS8670S (Vds=30V/ Id=17A/Rdson=5mOhm )
Frequency=400KHz
(Note 1) Current Limiting Setting :
Rtrip(Kohm)=100*(Iocp-0.5*Iripple)*Rds(on)
A A
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
COMPUTER
1.8V_SUS&0.9VTT
1.8V_SUS&0.9VTT
1.8V_SUS&0.9VTT
FX6 3A
FX6 3A
FX6 3A
1
of
of
of
49 70 Tuesday, May 20, 2008
49 70 Tuesday, May 20, 2008
49 70 Tuesday, May 20, 2008
5
+1.8V_SUS
D D
6237REF
+1.8V_SUS
(5)
4
PC91
PC91
10U/4V/0805
10U/4V/0805
3
2
1
+1.5V_RUN
TDC : 0.805A
MAX : 0.805A
PR251 0 PR251 0
PR252 *0_NC PR252 *0_NC
PR232 100K PR232 100K
PR116 0 PR116 0
*0.01U/16V_NC
*0.01U/16V_NC
+3.3V_SUS
+3.3V_ALW
PR83 200K PR83 200K
PC77
PC77
(5)
PR253 0 PR253 0
PR254 *0_NC PR254 *0_NC
PR85 100K PR85 100K
PC56
PC56
10U/4V/0805
10U/4V/0805
PC50
PC50
0.1U
0.1U
10
10
X7R
X7R
RUN_ON 20,26,42,46,49,52,55
PC80
PC80
1U/10V/0603
1U/10V/0603
RUN_ON 20,26,42,46,49,52,55
1U/10V/0603
1U/10V/0603
+3.3V_SUS
+3.3V_ALW
+1.8V_SUS
PC51
PC51
PR120
PR119
PR119
49.9K/F/0603
49.9K/F/0603
C C
6237REF
B B
PR87
PR87
90.9K/F/0603
90.9K/F/0603
PR120
*30K/F/0603_NC
*30K/F/0603_NC
PR123
PR123
150K/F/0603
150K/F/0603
+1.8V_SUS
PR86
PR86
*69.8/F/0603_NC
*69.8/F/0603_NC
PR89
PR89
110K/F/0603
110K/F/0603
1.5V_RUN_PWRGD 45
1.1V_RUN_PWRGD 45
10
2
5
7
4
PC88
PC88
1U/10V/0603
1U/10V/0603
PC53
PC53
1U/10V/0603
1U/10V/0603
PU6 MAX8794ETB+ PU6 MAX8794ETB+
IN
VCC
PGOOD
SHDN
REFIN
PU3 MAX8794ETB+ PU3 MAX8794ETB+
10
2
5
7
4
IN
VCC
PGOOD
SHDN
REFIN
OUT
OUTS
PGND
AGND
REFOUT
BP
11
1U/10V/0603
1U/10V/0603
REFOUT
BP
11
9
6
8
3
1
PC92
PC92
OUT
OUTS
PGND
AGND
PC55
PC55
1U/10V/0603
1U/10V/0603
+1.5V_RUN
(5)
PC81
PC81
10U/4V/0805
10U/4V/0805
PR231
PR231
0/0603
0/0603
PC87
PC87
10U/4V/0805
10U/4V/0805
+1.1V_RUN
TDC : 1.330A
MAX : 1.330A
9
6
8
3
1
PR90
PR90
0/0603
0/0603
PC54
PC54
10U/4V/0805
10U/4V/0805
(5)
PC52
PC52
10U/4V/0805
10U/4V/0805
+1.1V_RUN
A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
1.5V_RUN&1.1V_RUN
1.5V_RUN&1.1V_RUN
1.5V_RUN&1.1V_RUN
FX6 3A
FX6 3A
FX6 3A
of
of
of
50 70 Tuesday, May 20, 2008
50 70 Tuesday, May 20, 2008
50 70 Tuesday, May 20, 2008
1
5
D D
NB_VCORE_RUN_ON 42
+5VCC_NB
NB_VCORE_PWRGD 45
C C
+3.3V_ALW
PR13
PR13
0/0603
+5V_ALW2
+5V_ALW
B B
SIL104R-1R5A-R ( 1.5U +/- 30%/ Irms=10A/DCR_max=8.1mOhm/10.1X10X3.8 )
SI4800BDY-T1-E3 ( Vds=30V/Id=7A/Rdson=30mOhm )
0/0603
PR18
PR18
*0/0603_NC
*0/0603_NC
PR5
PR5
100K
100K
+5VCC_NB
PR104
PR104
*100K_NC
*100K_NC
PR140PR14
0
PR154
PR154
300/0603
300/0603
PC109
PC109
1U/10V/0603
1U/10V/0603
(5)
+NB_VCORE
PC11
PC11
0.1U/10V
0.1U/10V
NB_VCORE_FB
1
2
3
4
5
6
7
SI4812BDY-T1-E3 (Vds=30V/ ID=7.7A/Rdson=21mOhm/Vsd=0.5V@1.4A)
4
PU1 TPS51117RGYR PU1 TPS51117RGYR
EN_PSV
TON
VOUT
V5FILT
VFB
PGOOD
GND
PR15
PR15
237K/F
237K/F
VBST
DRVH
TRIP
V5DRV
DRVL
PGND
THERM
15
Frequency=300khZ
3
NBCORE_PWR_SRC
PC4
PC4
2200P/50V
2200P/50V
876
PQ1
2
351
876
2
351
PQ1
SI4800BDY-T1-E3
SI4800BDY-T1-E3
PQ2
PQ2
SI4812BDY-T1-E3
SI4812BDY-T1-E3
(P3)
SIL104R-1R5PF (10A/8.1mOhm)
SIL104R-1R5PF (10A/8.1mOhm)
51117DH
4
PR12
PR12
0/0603
+5VCC_NB
0/0603
PC8
PC8
1U/10V/0603
1U/10V/0603
PR4
PR4
0/0603
0/0603
14
13
12
LL
11
10
9
8
PC9
PC9
0.1U/50V/0603
0.1U/50V/0603
PR10
PR10
11.8K/F/0603
11.8K/F/0603
51117LX
51117DL
+3.3V_ALW
4
PL4
PL4
PR2
PR2
2.2/F/0603
2.2/F/0603
PC5
PC5
2200p/50V
2200p/50V
2
PC3
PC3
0.1U/50V/0603
0.1U/50V/0603
R1
PR8
PR8
24.9K/F/0603
24.9K/F/0603
PR11
PR11
178K/F/0603
178K/F/0603
PC2
PC2
10U/25V/1206
10U/25V/1206
PC108
PC108
*0.015U/50V/0603_NC
*0.015U/50V/0603_NC
NB_VCORE_FB
FL2
FL2
HI1206T161R-10(160,6A)
HI1206T161R-10(160,6A)
(5)
PC99
PC99
0.1U/10V
0.1U/10V
+PWR_SRC
+NB_VCORE
+
+
1
NB_VCORE
TDC : 4.9A
MAX : 4.9A
OCP : 7A
PC97
PC97
220U/4VESR25
220U/4VESR25
R2
PR250
PR250
100K
100K
STRP_DATA 9
PLTRST_SYS# 33,39,40,45
2
PQ6
PQ6
2N7002W-7-F
2N7002W-7-F
2
3 1
3 1
PR236
PR236
10K/F
10K/F
PQ5
PQ5
2N7002W-7-F
2N7002W-7-F
2
PC10
PC10
0.01U/25V
0.01U/25V
3 1
PQ57
PQ57
2N7002W-7-F
2N7002W-7-F
PR9
PR9
75K/F/0603
75K/F/0603
PLTRST_SYS# STRP_DATA +NB_VCORE
HIGH
HIGH
LOW
LOW
LOW
HIGH
LOW
HIGH
1.1V
1.0V
1.1V
1.1V
+NB_VCORE=0.75*(1+R1/R2)
A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
VCC_NB
VCC_NB
VCC_NB
FX6 3A
FX6 3A
FX6 3A
of
of
of
51 70 Tuesday, May 20, 2008
51 70 Tuesday, May 20, 2008
51 70 Tuesday, May 20, 2008
1
5
4
3
2
1
TON GND OPEN VCC
Frequency (KHz)
PC194
PC194
(103)
PC196
PC196
41
40
39
38
9
10
11
12
13
14
15
16
37
36
+5V_ALW2
(5V/3.3V)
PAD
PAD
PAD
PAD
BYP
OUT1
FB1
ILIM1
PGOOD1
EN1
DH1
LX1
PAD
PAD
35
1U/10V/0603
1U/10V/0603
PD10
PD10
BAT54S-7-F
BAT54S-7-F
1
2
1
2
+5V_ALW2
8
7
42
LDO
PAD
LDOREFIN
ISL6237IRZ-T
ISL6237IRZ-T
BST117DL118VDD19NC20GND21PGND22DL223BST2
PAD33PAD34PAD
PC184
PC184
3
PD11
PD11
BAT54S-7-F
BAT54S-7-F
3
PC179
PC179
2200P/50V
2200P/50V
+DC1_PWR_SRC
ISL6237_ONLOD
PR109
PR109
390K
390K
PR110
PR110
150K
150K
PR108
PR108
0/0603
0/0603
PC195
PC195
0.1U/50V/0603
0.1U/50V/0603
4.7U/25V/0805
4.7U/25V/0805
*1U/10V/0603_NC
*1U/10V/0603_NC
FL11
FL11
HI1206T161R-10(160,6A)
+5V_ALW
HI1206T161R-10(160,6A)
PC61
PC61
10U/25V/1206
10U/25V/1206
+5V_ALW
PC60
PC60
10U/25V/1206
10U/25V/1206
PC178
PC178
0.1U/50V/0603
0.1U/50V/0603
+PWR_SRC
D D
TDC : 5.69A
MAX : 5.69A
OCP : 8.13A
C C
+
+
PC180
PC180
220U/6.3V/ESR25
220U/6.3V/ESR25
B B
(5)
PC59
PC59
0.1U/10V
0.1U/10V
+5V_ALW2
PR205 200K PR205 200K
PR245
PR245
*100K_NC
*100K_NC
PR211
PR211
*0/0603_NC
*0/0603_NC
PR2100PR210
0
+3.3V_EN2
+5V_EN1
PR2250PR225
0
PD12 BAS316 PD12 BAS316
PR216
PR216
*0_NC
*0_NC
SI4800BDY-T1-E3
SI4800BDY-T1-E3
PL10
PL10
SIL1045R-3R3A (8A/21mOhm)
SIL1045R-3R3A (8A/21mOhm)
SI4812BDY-T1-E3
SI4812BDY-T1-E3
PR217
PR217
39K
39K
PQ24
PQ24
PQ23
PQ23
PR2240PR224
0
PR2150PR215
0
876
351
876
351
2
2
+5V_DH
4
+5V_LX
+5V_DL
4
THERM_STP# 29,42
H_THERMTRIP# 5 5V_ALW_ON 42
+15V_ALW
(5)
+5V_ALW
PR207 270K/F PR207 270K/F
PC188
PC188
0.1U/50V/0603
0.1U/50V/0603
(5)
PC189
PC189
0.1U/50V/0603
0.1U/50V/0603
(5)
POK1 POK2
PR202
PR202
1/0603
1/0603
+5V_ALW
400/500 400/300 200/300
PR218
PR218
*0_NC
*0_NC
REF
REFIN2
PGOOD2
0/0603
0/0603
PR200
PR200
PC197
PC197
1U/10V/0603
1U/10V/0603
PR219
PR219
*0_NC
*0_NC
PU11
PU11
32
31
ILIM2
30
OUT2
29
SKIP#
28
27
EN2
26
DH2
25
LX2
PR201
PR201
1/0603
1/0603
PC190
PC190
0.1U/50V/0603
0.1U/50V/0603
+5V_VCC1
*10/0603_NC
*10/0603_NC
ISL6237_ONLOD
5
6
4
3
NC
VIN
ONLDO
SECFB
PC187
PC187
0.1U/50V/0603
0.1U/50V/0603
PR223
PR223
1
TON2VCC
24
6237REF
PC193
PC193
0.1U/10V
0.1U/10V
PR212
PR212
365K/F
365K/F
+3.3V_EN2 +5V_EN1
+3.3V_DH
PC186
PC186
0.1U/50V/0603
0.1U/50V/0603
+3.3V_DL
PR220
PR220
*0_NC
*0_NC
PR214
PR214
*0_NC
*0_NC
PR2040PR204
0
PR2210PR221
0
4
+3.3V_LX
4
+5V_ALW2
PC181
PC181
0.1U/50V/0603
0.1U/50V/0603
876
PQ25
PQ25
SI4800BDY-T1-E3
SI4800BDY-T1-E3
2
351
SIL1045R-3R3A (8A/21mOhm)
SIL1045R-3R3A (8A/21mOhm)
876
PQ27
PQ27
SI4812BDY-T1-E3
SI4812BDY-T1-E3
2
351
+3.3V_ALW
PR106
PR106
100K
100K
POK2
POK1
PC182
PC182
2200P/50V
2200P/50V
PL11
PL11
PR105
PR105
100K
100K
PR99 *0_NC PR99 *0_NC
PC62
PC62
10U/25V/1206
10U/25V/1206
+3.3V_ALW
TDC : 6.04A
MAX : 6.04A
OCP : 8.63A
PR206
PR206
0/0603
0/0603
PC65
PC65
0.1U/10V
0.1U/10V
PR209
PR209
*0/0603_NC
*0/0603_NC
SECFB
PC63
PC63
10U/25V/1206
10U/25V/1206
+3.3V_ALW
+
+
(5)
PC183
PC183
220U/6.3V/ESR25
220U/6.3V/ESR25
PC191
PC146
PC147
PC147
PC146
1U/10V/0603
1U/10V/0603
PU9
PU9
IN3OUT
1
SHDN
2
GND
MAX8863SEUK+T
MAX8863SEUK+T
SET
4
5
PC32
PC29
PC29
PR47
PR47
*20P/50V_NC
*20P/50V_NC
100K
100K
PR166
PR166
100K
100K
4
PC32
10U/4V/0805
10U/4V/0805
+3.3V_SUS
(5)
PR1650PR165
RUN_ON 20,26,42,46,49,50,55
A A
5
0
*0.01U/16V_NC
*0.01U/16V_NC
PC191
0.1U/50V/0603
0.1U/50V/0603
(5)
PR52
PR52
*100K_NC
*100K_NC
3
+2.5V_RUN
SIL1045R-3R3A ( 3.3U +/- 30%/ Isat=9A/Irms=8A/DCR_max=21mOhm/10.1X10X4.5 )
SI4800BDY-T1-E3 ( Vds=30V/Id=7A/Rdson=30mOhm )
SI4812BDY-T1-E3 (Vds=30V/ ID=7.7A/Rdson=21mOhm/Vsd=0.5V@1.4A)
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
COMPUTER
3.3V_ALW & 5V_ALW
3.3V_ALW & 5V_ALW
3.3V_ALW & 5V_ALW
FX6 3A
FX6 3A
FX6 3A
1
of
of
of
52 70 Tuesday, May 20, 2008
52 70 Tuesday, May 20, 2008
52 70 Tuesday, May 20, 2008
A
OFS
VFIXEN ISL6265 Pin1
1.2V
3.3V
1 1
5V
X
V
X
V
XX
VFIXEN VID Codes
SVD
0
1
0 1
+CPU_VDD0_RUN
Output
1.1
1.0
0.9
+3.3V_RUN +1.8V_SUS
PR240
PR240
PR241
PR241
10K
10K
*10K_NC
*10K_NC
PR246
PR246
*100K_NC
*100K_NC
PR180 255/F PR180 255/F
PR181 1K/F PR181 1K/F
PR182 54.9K/F PR182 54.9K/F
PR5610PR56
10
PR5510PR55
10
PR18510PR185
10
PR18610PR186
10
SVC
0
0
1 1 0.8
CPU_VCORE_PWRGD 42,45
2 2
CPU_PWRGD_SVID_REG 5
CPU_VCORE_ENABLE 42
3 3
CPU_VDD0_RUN_FB_H 5
CPU_VDD0_RUN_FB_L 5
CPU_VDD1_RUN_FB_L 5
CPU_VDD1_RUN_FB_H 5
4 4
+CPU_VDD1_RUN
B
+5V_SUS +5V_ALW2 +5VCC
+3.3V_SUS
PR62
PR62
10K
10K
PR630PR63
0
CPU_SVD 5
CPU_SVC 5
6265AGND
PC164 4700P/25V PC164 4700P/25V
PC165 1200P/50V PC165 1200P/50V
PC42 180P/50V PC42 180P/50V
Close to
CPU
socket
Close to
CPU socket
PR58
PR58
0/0603
0/0603
6265AGND
PR54
PR54
*0/0603_NC
*0/0603_NC
+5VCC
+3.3V_ALW
6265AGND
PR68 18K/F PR68 18K/F
PR53
PR53
0/0603
0/0603
CPU_VIN0
0
PR1700PR170
*0_NC
*0_NC
PR171
PR171
PR169 *10K_NC PR169 *10K_NC
PR1740PR174
PR1770PR177
PR1790PR179
PR640PR64
PR66 100K/F PR66 100K/F
PR183 6.81K/F PR183 6.81K/F
PC166 1000P/50V PC166 1000P/50V
(P5)
PR193
PR193
22K/F
22K/F
ISP_0
ISN_0
PR167
PR167
10/0603
10/0603
0
0
0
0
PR57
PR57
10/0603
10/0603
0.01U/50V
0.01U/50V
PR191
PR191
4.02K/F
4.02K/F
PC159
PC159
1
2
3
4
5
6
7
8
9
10
11
12
CPU_VDDNB_RUN_FB_H 5
CPU_VDDNB_RUN_FB_L 5
C
6265AGND
6265AGND
6265AGND
49
OFS/VFIXEN
PGOOD
PWROK
SVD
SVC
ENABLE
RBIAS
OCSET
VDIFF_0
FB_0
COMP_0
VW_0
PC168
PC168
0.1U/16V/0603
0.1U/16V/0603
PR1900PR190
PR1890PR189
PR1880PR188
PR1870PR187
PC158
PC158
1U/10V
1U/10V
GND
CPU_VDDNB_RUN
TDC : 2.1A
OCP : 3A
6265AGND 6265AGND
PR61
PR61
22.1K/F
22.1K/F
PC160
PC160
PC156
PC156
33P/50V
33P/50V
1200P/50V
1200P/50V
PR173
PR173
44.2K/F
44.2K/F
45
46
48
47
VIN
VCC
FB_NB
COMP_NB
Pin 49 is GND Pin
ISN_0
ISP_0
VSEN_0
RTN_0
14
13
15
16
0
0
0
0
PR195
PR195
*10_NC
*10_NC
4700P/25V
4700P/25V
+1.8V_SUS
Option for
Uni-plane
PR600PR60
0
44
FSET_NB
ISL6265HRTZ-T
ISL6265HRTZ-T
RTN_1
17
PC41
PC41
PR65
PR65
255/F
255/F
PC35
PC35
1000P/50V
1000P/50V
43
VSEN_NB
VSEN_1
18
PR69
PR69
1K/F
1K/F
D
+CPU_VDDNB_RUN
PR50
PR50
47/F
47/F
PR48
PR48
47/F
47/F
PR172
PR172
11.3K/F
11.3K/F
PR590PR59
0
42
41
RTN_NB
OCSET_NB
VDIFF_119FB_120COMP_1
PR70
PR70
6.81K/F
6.81K/F
CPU_VDDNB_RUN_J
40
39
PGND_NB
LGATE_NB
VW_122ISP_123ISN_1
21
PC44
PC44
1000P/50V
1000P/50V
PC40
PC40
1200P/50V
1200P/50V
PR67
PR67
54.9K/F
54.9K/F
MPLC0730L3R3 (5.7A/30mOhm)
MPLC0730L3R3 (5.7A/30mOhm)
+
+
PC152
PC152
330U/2.5V/ESR9
330U/2.5V/ESR9
LGATE_NB
PHASE_NB
UGATE_NB
37
38
PU10
PU10
PHASE_NB
UGATE_NB
BOOT_NB
BOOT_0
UGATE_0
PHASE_0
PGND_0
LGATE_0
PVCC
LGATE_1
PGND_1
PHASE_1
UGATE_1
BOOT_1
24
ISN_1
PC169
PC169
0.1U/16V/0603
0.1U/16V/0603
PC39
PC39
180P/50V
180P/50V
E
PL7
PL7
UGATE_NB
PC161
PC161
0.1U/50V/0603
0.1U/50V/0603
PR175
PR175
1/0603
1/0603
36
35
34
33
32
31
30
29
28
27
26
25
UGATE_0
PHASE_0
LGATE_0
LGATE_1
PHASE_1
UGATE_1
PR192
PR192
4.02K/F
4.02K/F
PR184
PR184
1/0603
1/0603
PR178
PR178
1/0603
1/0603
0.22U/25V/0603
0.22U/25V/0603
+5VCC
PC167
PC167
0.22U/25V/0603
0.22U/25V/0603
(P5)
PR194
PR194
22K/F
22K/F
PC163
PC163
PC37
PC37
2.2U/10V/0603
2.2U/10V/0603
PQ46
PQ46
G1
G1
8
S1D2
S1D2
7
6
5
SI4914DY-T1-E3
SI4914DY-T1-E3
4
4
4
4
D1
D1
G2
G2
S2
S2
CPU_VIN0
CPU_VIN0
876
9
PQ43
PQ43
NTMFS4707NT1G
NTMFS4707NT1G
2
351
876
9
2
351
PQ45
PQ45
NTMFS4108NT1G
NTMFS4108NT1G
CPU_VIN1
CPU_VIN1
876
9
PQ51
PQ51
NTMFS4707NT1G
NTMFS4707NT1G
2
351
876
9
2
351
PQ50
PQ50
NTMFS4108NT1G
NTMFS4108NT1G
F
1
2
3
4
PC144
PC144
2200P/50V
2200P/50V
LGATE_NB
4
4
PC145
PC145
0.1U/50V/0603
0.1U/50V/0603
876
9
2
351
PQ47
PQ47
*NTMFS4108NT1G_NC
*NTMFS4108NT1G_NC
PC173
PC173
2200P/50V
2200P/50V
876
2
351
PQ49
PQ49
*NTMFS4108NT1G_NC
*NTMFS4108NT1G_NC
PC150
PC150
2200P/50V
2200P/50V
PC143
PC143
10U/25V/1206
10U/25V/1206
PC174
PC174
0.1U/50V/0603
0.1U/50V/0603
9
PC153
PC153
0.1U/50V/0603
0.1U/50V/0603
PC141
PC141
10U/25V/1206
10U/25V/1206
PR168
PR168
2.2/0805
2.2/0805
PC157
PC157
2200P/50V/0603
2200P/50V/0603
ISP_0
ISN_0
PC175
PC175
10U/25V/1206
10U/25V/1206
PR196
PR196
2.2/0805
2.2/0805
PC176
PC176
2200P/50V/0603
2200P/50V/0603
ISP_1
ISN_1
G
HI1206T161R-10(160,6A)
HI1206T161R-10(160,6A)
PC154
PC154
4.7U/25V/0805
4.7U/25V/0805
FL7
FL7
HI1206T161R-10(160,6A)
HI1206T161R-10(160,6A)
PC211
PC211
10U/25V/1206
10U/25V/1206
PL6
PL6
ETQP4LR36WFC_0.36UH
ETQP4LR36WFC_0.36UH
1 2
3
4
PC170
PC170
10U/25V/1206
10U/25V/1206
PL9
PL9
ETQP4LR36WFC_0.36UH
ETQP4LR36WFC_0.36UH
1 2
3
4
FL8
FL8
PC215
PC215
1000P
1000P
(P4)
PC31
PC31
470U/2V/ESR6
470U/2V/ESR6
+CPU_VDD0_RUN
TDC : 18A
FL10
FL10
HI1206T161R-10(160,6A)
HI1206T161R-10(160,6A)
PC212
PC212
10U/25V/1206
10U/25V/1206
(P4)
PC36
PC36
330U/2V/ESR9
330U/2V/ESR9
(P1)
PC213
PC213
PC185
PC185
0.01U
0.01U
1000P
1000P
(P1)
PC217
PC217
0.01U
0.01U
+
+
470U/2V/ESR6
470U/2V/ESR6
+
+
330U/2V/ESR9
330U/2V/ESR9
+CPU_VDD1_RUN
TDC : 18A
H
PC214
PC214
0.1U
0.1U
+PWR_SRC
+
+
PC216
PC216
0.1U
0.1U
+CPU_VDD0_RUN
+
+
PC33
PC33
PC218
PC218
1000P
1000P
+CPU_VDD1_RUN
+
+
PC38
PC38
PC133
PC133
100U/25V
100U/25V
470U/2V/ESR6
470U/2V/ESR6
(P1)
PC220
PC220
0.01U
0.01U
330U/2V/ESR9
330U/2V/ESR9
+PWR_SRC
+
+
PC34
PC34
+PWR_SRC
PC43
PC43
PC140
PC140
100U/25V
100U/25V
+
+
PC219
PC219
0.1U
0.1U
+
+
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
A
B
C
D
E
F
Date: Sheet
G
COMPUTER
CPU_CORE_POWER
CPU_CORE_POWER
CPU_CORE_POWER
FX6 3A
FX6 3A
FX6 3A
53 70 Tuesday, May 20, 2008
53 70 Tuesday, May 20, 2008
53 70 Tuesday, May 20, 2008
of
of
of
H
5
4
3
2
1
FL13
FL13
HI1206T161R-10(160,6A)
D D
1P2V_PWR_SRC
PC205
PC205
2200P/50V
2200P/50V
PC207
PC207
0.1U/50V/0603
0.1U/50V/0603
PC89
PC89
10U/25V/1206
10U/25V/1206
HI1206T161R-10(160,6A)
+PWR_SRC
+1.2V_ALW_SUS
+
+
PC72
PC72
220U/4V
220U/4V
TDC : 2.177A
MAX : 2.177A
OCP : 3.11A
+1.2V_ALW_SUS
PR203
PR203
100K
100K
PR1290PR129
PR112
PR112
100K
100K
PR248
PR248
0/0603
0/0603
PR249
PR249
*0/0603_NC
*0/0603_NC
0
PR126
PR126
300/0603
300/0603
1U/10V/0603
1U/10V/0603
+1.2V_ALW_SUS
PC82
PC82
+5VCC_1P2V
PC203
PC203
0.1U/10V
0.1U/10V
1P2V_FB
C C
B B
1.2V_ALW_SUS_ON 42
+5VCC_1P2V
1.2V_ALW_SUS_PWRGD 45
+3.3V_ALW
+5V_ALW2
+5V_ALW
PU4 TPS51117RGYR PU4 TPS51117RGYR
1
EN_PSV
2
TON
3
VOUT
4
V5FILT
5
VFB
6
PGOOD
7
GND
THERM
15
PR127
PR127
237K/F
237K/F
Frequency=300KHz
VBST
DRVH
TRIP
V5DRV
DRVL
PGND
14
13
12
LL
11
10
9
8
+5VCC_1P2V
PR128
PR128
0/0603
0/0603
PC75
PC75
1U/10V/0603
1U/10V/0603
PR111
PR111
0/0603
0/0603
1P2V_DH
PC83
PC83
0.1U/50V/0603
0.1U/50V/0603
1P2V_LX
1P2V_DL
PR228
PR228
7.5K/F/0603
7.5K/F/0603
PQ36
1
2
G2
G2
3
S2
S2
4
PQ36
D1
D1
S1D2
S1D2
SI4914DY-T1-E3
SI4914DY-T1-E3
G1
G1
8
7
6
5
PL2
PL2
MPLC0730L3R3 (5.7A/30mOhm)
MPLC0730L3R3 (5.7A/30mOhm)
PR227
PR227
*2.2/F/0603_NC
*2.2/F/0603_NC
PR115
PR115
47.5K/F/0603
47.5K/F/0603
PC78
*0.015U/50V/0603_NC
*0.015U/50V/0603_NC
(5) (5)
PC70
PC70
0.1U/10V
0.1U/10V PC78
(19)
1P2V_FB
PC199
PC199
*2200p/50V_NC
*2200p/50V_NC
PR114
PR114
75K/F/0603
75K/F/0603
MPLC0730L3R3 ( 3.3U +/- 20%/ Isat=5.7A/DCR_max=30mOhm/7.2X7X3 )
SI4914DY-T1-E3 ( Vds=30V/Id_U=5.6A/Id_L=6.4A/Rdson_L=27mOhm )
A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
1.2V_ALW_SUS
1.2V_ALW_SUS
1.2V_ALW_SUS
FX6 3A
FX6 3A
FX6 3A
of
of
of
54 70 Tuesday, May 20, 2008
54 70 Tuesday, May 20, 2008
54 70 Tuesday, May 20, 2008
1
1
TON
Frequency
A A
B B
GFX_PWRGD 42
C C
Single net
PR44
PR44
*61.9K/F_NC
*61.9K/F_NC
4
+VCC_GFX_CORE
GFX_REF
+3.3V_ALW
5
3
GFX_+5V_RUN
RUN_ON 20,26,42,46,49,50,52
PC142
PC142
0.22U/6.3V
0.22U/6.3V
+3.3V_ALW
PR39
PR39
100K
100K
PR40
PR40
100K
100K
GFX_PCIE_PWRGD
1
GFX_CORE_PWRGD
2
TC7SZ08FU(T5L,F,T)
TC7SZ08FU(T5L,F,T)
U59
U59
PR43
PR43
*0_NC
*0_NC
Re
PR41
PR41
11K/0402
11K/0402
PR42
PR42
9.1K/F
9.1K/F
Rf
PR37
PR37
100K/0402
100K/0402
OPEN REF
300K 450K
PR46
PR46
*0_NC
*0_NC
29
30
31
0.047U/10V
0.047U/10V
Rd
PC26
PC26
0.01U/16V
0.01U/16V
2
28
27
PU2
PU2
TPO
1
TON
2
OVP/UVP
3
REF
4
ILIM
5
POK1
6
POK2
7
STBY#
EPAD
EPAD
EPAD
SS8VTTS9VTTR10PGND211VTT12VTTI13REFIN
PC25
PC25
Rc
PR33
PR33
4.99K/F/0603
4.99K/F/0603
PR32
PR32
49.9K/F/0603
49.9K/F/0603
25
26
AVDD
SHDNA#
MAX8632ETI+
MAX8632ETI+
PC22
PC22
1U/10V/0603
1U/10V/0603
PR49
PR49
10/0603
10/0603
PC30
PC30
1U/10V/0603
1U/10V/0603
24
GND
SKIP#
PC23
PC23
22U/4V/0805
22U/4V/0805
23
PGND1
PC135
PC135
10U/4V/0805
10U/4V/0805
+5V_ALW2
22
VDD
LGATE
BOOT
PHASE
UGATE
VIN
OUT
FB
EPAD
EPAD
14
GFX_REF
Populate For
Max8632
PC28
PC28
2.2U/10V/0805
2.2U/10V/0805
21
20
19
18
17
16
15
32
33
+1.8V_SUS
PC20
PC20
22U/4V/0805
22U/4V/0805
RB500V-40
RB500V-40
3
PD6
PD6
PC27
PC27
PR45
PR45
0.22U/50V/0603
0.22U/50V/0603
1/0603
1/0603
ISL88550LX
ISL88550DH
ISL88550DL
PQ44
PQ44
FDS6676AS_NL
FDS6676AS_NL
+1.1V_GFX_PCIE
+1.1V_GFX_PCIE
= 1*(1+Rc/Rd)
+GPU_PWR_SRC
PC149
PC149
2200P/50V
2200P/50V
PC148
PC148
0.1U/50V/0603
0.1U/50V/0603
4
PC155
PC155
10U/25V/1206
10U/25V/1206
FL9
FL9
HI1206T161R-10(160,6A)
HI1206T161R-10(160,6A)
PC151
PC151
10U/25V/1206
10U/25V/1206
+PWR_SRC
5
+VCC_GFX_CORE
TDC : 9.4A
MAX :9.4A
OCP : 12.2A
876
PQ48
PQ48
FDS8880_NL
4
4
FDS8880_NL
2
351
876
2
351
PR300PR30
0
*100P/50V_NC
*100P/50V_NC
PL8
PL8
SIL104-1R0-R (11A/6mohm)
SIL104-1R0-R (11A/6mohm)
PR176
PR176
*2.2/F/0603_NC
*2.2/F/0603_NC
PC162
PC162
*2200p/50V_NC
*2200p/50V_NC
PC24
PC24
1000P/50V
1000P/50V
PR35
PR35
115K/F
115K/F
PC21
PC21
Ra
PR34
PR34
16.5K/F
16.5K/F
PR36
PR36
57.6K/F
57.6K/F
Rb
PR38
PR38
*0_NC
*0_NC
PC172
PC172
0.1U/10V
0.1U/10V
+
+
PC171
PC171
330U/2V/ESR9
330U/2V/ESR9
PR244
PR244
115K/F
115K/F
PC210
PC210
*100P/50V_NC
*100P/50V_NC
Place near GND pin24
PR2380PR238
0
+VCC_GFX_CORE
= 0.7*(1+Ra/Rb)
(5)
PR51
PR51
0/0603
0/0603
+VCC_GFX_CORE
+3.3V_SUS +3.3V_SUS
PR242
PR28
PR28
*10K_NC
*10K_NC
GFX_CORE_CNTRL0 19
PR29
PR29
10K
10K
PR31
PR31
100K
100K
2
PC19
PC19
0.01U/16V
0.01U/16V
3
1
PQ10
PQ10
BSS138_NL
BSS138_NL
GFX_CORE_CNTRL1 19
PR242
*10K_NC
*10K_NC
PR243
PR243
10K
10K
PR239
PR239
100K
100K
2
PC90
PC90
0.01U/16V
0.01U/16V
3
1
PQ56
PQ56
BSS138_NL
BSS138_NL
SIL104-1R0-R ( 1.0U +/- 30%/ Irms=14A/DCR_max=6mOhm/10.1X10X4 )
FDS8880_NL ( Vds=30V/Id=10.7A/Rdson=12mOhm )
FDS6676AS_NL (Vds=30V/ Id=14.5A/Rdson=7.25mOhm)
D D
TON AVDD=200KHz,OPEN=300KHz,REF=450KHz,GND=600KHz
ILIM
SKIP#
OVP/UVP The overvoltage limit is 116% of Vout.
Iovp=(2*(Rf/(Re+Rf))*0.1*(1/RDSON)+(I_DELTA/2)
AVDD = Low-noise, forced-PWM mode.
GND = Pulse-skipping operation.
The undervoltage limit is 70% of Vout.
1
2
GFX_CORE_CNTRL0 GFX_CORE_CNTRL1
LOW LOW
HIGH
LOW
HIGH HIGH
3
+VCC_GFX_CORE
0.9
1.0V
1.1V
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
4
Date: Sheet
COMPUTER
VGA_M82
VGA_M82
VGA_M82
FX6 3A
FX6 3A
FX6 3A
5
of
of
of
55 70 Tuesday, May 20, 2008
55 70 Tuesday, May 20, 2008
55 70 Tuesday, May 20, 2008
5
D D
4
3
2
1
BEAD
BEAD
BEAD
BEAD
BEAD
BEAD
BEAD
SW
SW
SW
SW
BEAD
BEAD
BEAD
BEAD
BEAD
BEAD
BEAD
BEAD
BEAD
BEAD
BEAD
AMD S1G2
VCCA 2.5V
VDD CORE0
0.375-1.500V 18A
0.375-1.500V 18A
VDD NB
VLDT 1.2V TPDA
VDDIO MEM TPDA
VTT_MEM TPDA
RS780
VDDHTTX 1.2V 0.5A
VDDHTRX 1.1V 0.45A
VDDHT 1.1V 0.6A
VDDPCIE 1.1V 0.7A
VDDA18HTPLL 1.8V 0.25A
VDDA18PCIE 1.8V 0.25A
VDDA18PCIEPLL 1.8V 0.25A
VDDC 1.0V-1.1V 7A
VDDG33 3.3V 0.03A
VDDG18 1.8V 0.005A
VDD18_MEM 1.8V 0.005A
VDD_MEM 1.8V 0.15A
AVDD 3.3V 0.135A
VDDLT18 0.08A
VDDLTP18 0.08A
VDDLT33 0.22A
PLLs 1.8V 0.1A
PLLs 1.1/1.2V 0.15A
SB SB700
PCIE IO 0.8A
PCIE PVDD 80mA
ATA I/O 0.2A
ATA PLL 0.01A
3.3V OR 1.8v I/O 0.45A
SB CORE 0.6A
1.2V S5 PW 0.22A
3.3V S5 PW 0.01A
USB I/O 0.2A
USB CORE 0.2A
MXM HE
MXM_VDD_1.8V
MXM_VDD_2.5V
MXM_VDD_3.3V
MXM_VDD_5V
MXM_VDD_MAIN
CPU_VDDIO_SUS
CPU_VTT_SUS
+1.8V
+1.2V
+3.3V
+3.3V
+5V
+1.2VDUAL
+2.5VDUAL
+3.3VDUAL
+3.3VDUAL
+3.3VALW
RS740/RS780
+3.3V
+5V
+5V
VDD_LED_BL_RUN
+VIN
+5VDUAL
+5VDUAL
+1.5V
+3.3V
+3.3VDUAL
+1.5V
+3.3V
+3.3VDUAL
+1.5V
+3.3V
+3.3VDUAL
+1.5V
+3.3V
+3.3VDUAL
2
DDRII SODIMMX2--SYSTEM
VDD MEM 4A
VTT_MEM 0.5A
DDRII SIDE PORT MEMORY
VDD MEM
BEAD
CLOCK GEN
1.2V 0.2A
BEAD
3.3V 0.5A
BEAD
HD CODEC
3.3V CORE 0.3A
BEAD
5V ANALOG 0.1A
BEAD
GBIT ENTHENET
1.2V 0.5A
BEAD
2.5V 0.5A
BEAD
3.3V 0.5A
BEAD
SMSC1100--EC
Jumper
3.3V 0.5A
LCD PANEL
3.3V 1.5A
SW
5V 0.5A
BEAD
BACK LIGHT
+5V
LED_BL
+VDD_MAIN
USB X2 FR
5VDual
USB X7 FR
5VDual
EXPRESS CARD
1.5V (S0, S1) 0.7A
3.3V (S0, S1) 1.3A
3.3V (S3, S5) 0.3A
MINI PCIE SLOT1
1.5V (S0, S1) 0.7A
3.3V (S0, S1) 1.3A
3.3V (S3, S5) 0.3A
MINI PCIE SLOT2
1.5V (S0, S1) 0.7A
3.3V (S0, S1) 1.3A
3.3V (S3, S5) 0.3A
MINI PCIE SLOT2
1.5V (S0, S1) 0.7A
3.3V (S0, S1) 1.3A
3.3V (S3, S5) 0.3A
AUDIO
OP
SIM
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
Title
Title
Title
Power Rail for system
Power Rail for system
Power Rail for system
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
FX6 3A
FX6 3A
FX6 3A
Date: Sheet
Date: Sheet
Date: Sheet
56 70 Tuesday, May 20, 2008
56 70 Tuesday, May 20, 2008
56 70 Tuesday, May 20, 2008
of
of
1
of
C C
+2.5V_RUN
CPU_VDD0_RUN
CPU_VDD1_RUN VDD CORE1
CPU_VDD_NB
+1.2V_RUN
+1.8V_SUS
+0.9V_DDR_VTT
+1.2V_RUN
+NB_VDD_MUX
+NB_VDD_MUX
+NB_VDD_MUX
+1.8V_RUN
+1.8V_RUN
+1.8V_RUN
+NB_VCORE
+3.3V_RUN
+1.8V_RUN
+1.8V_RUN
+1.8V_RUN
+3.3V_RUN
+1.8V_RUN
+1.8V_RUN
+3.3V_RUN
+NB_VDD_MUX
+1.2V_RUN
+1.2V_RUN
+1.2V_RUN
+1.2V_RUN
VDD33_18
+1.2V_RUN
+1.2V_ALW_SUS
+3.3V_SUS
+3.3V_SUS
+1.2V_SUS
+1.8V
+2.5V
+3.3V
+5V
+VIN
DDR2 PWM
LDO VTT
MAX8632
+5V SW
+3V SW
MAX8744
+1.5V SW
MAX8794
+1.1V SW
MAX8794
SWITCH
SWITCH
SWITCH
SWITCH
SWITCH
SWITCH
CPU_VDD0_RUN
CPU_VDD1_RUN
CPU_VDD_NB
+1.8V_SUS
+0.9V_DDR_VTT
+NB_VCORE
+1.2V_ALW_SUS
+3.3V_ALW
+5V_ALW
+1.5V_RUN
+1.1V_RUN
+3.3V_SUS+3.3V_ALW
+3.3V_RUN
+5V_SUS
+5V_RUN+5V_SUS
+1.8V_RUN
+1.1V_RUN
Jumper
RS740/RS780
+3.3V_RUN
BATTERY
AC ADAPTOR
BATTERY
CHARGER
MAX8731
+PWR_SRC
CPU core
PWM
MAX17009
+1.2V SW
+1V~+1.2V SW
MAX8717
+1.8V_SUS
B B
+3.3V_ALW
+3.3V_SUS
+5V_ALW
+1.8V_SUS
A A
+1.2V_ALW_SUS +1.2V_RUN
MXM_EN
5
4
3
5
ADAPTER
D D
4
3
2
1
+PWR_SRC
FDS4435BZ +INV_PWR_SRC
RUN_ON
BATTERY
C C
MAX8731
ISL6237
Charger
5V_ALW_ON
+5V_ALW
B B
HDDC_EN#
FDC655BN
MODC_EN#
SI4800BDY
RUN_ON
FDC655BN
RUN_ON
MAX8863
+2.5VRUN
FDC655BN
WLAN_3V_ENABLE
+3.3V_WLAN
+3.3V_ALW
SI4336DY SI4800BDY
RUN_ON
+3.3V_RUN
+5V_RUN
+5V_HDD +5V_MOD
A A
L41
+VDDA
+5V_SPK_AMP
5
4
+5V_ALW2
+15V_ALW
SI3456DV-T1-E3
ENAB_3VLAN
+3.3V_LAN
SUS_ON
+3.3VSUS
LOM_REGCTL12_PNP
MMJT9435T1G
( Q92 )
LAN_REGCTL25
5784M
( U35 )
TPS51117
1.2V_ALW_SUS_ON
+1.2V_ALW_SUS
1.2V_RUN_ON
SI4336DY
+1.2V_RUN
5784M
+1.2V_LOM
+2.5V_LOM
3
SUS_ON
+NB_VCORE
FDC655BN
+1.2V_SUS
TPS51117
NB_VCORE_RUN_ON
RUN_ON
+1.8V_RUN
+1.8V_SUS
SI4856ADY
SUS_ON
+0.9V_DDR_VTT
MAX8794
RUN_ON
+1.5V_RUN
SUS_ON
MAX8794
RUN_ON
+1.1V_RUN
2
ISL6265 TPS51116
CPU_VCORE_ENABLE
+CPU_VDD0_RUN
+CPU_VDD1_RUN
+CPU_VDDNB_RUN
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
MAX8632
GFX_RUN_ON
+VCC_GFX_CORE
+1.1V_GFX_PCIE
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
Power Sequence Diagram
Power Sequence Diagram
Power Sequence Diagram
FX6 3A
FX6 3A
FX6 3A
1
of
of
of
57 70 Tuesday, May 20, 2008
57 70 Tuesday, May 20, 2008
57 70 Tuesday, May 20, 2008
1
2
3
4
5
6
7
8
+3.3V_RUN
2.2K 2.2K
SB_SMBCLK
AA18
SB_SMBDATA
SB700
A A
W18
197
195
DIMM0
P16
197
DIMM1
195
8
7
+3.3V_ALW
2.2K 2.2K
SMBCLK0
110
SMBDAT0
B B
111
100
100
10
9
3
4
CHARGER
P47
BATTERY
CONN
P48
32
30
32
30
+3.3V_RUN
2.2K 2.2K
+3.3V_RUN
2
CLK GEN.
3
P25
SIO
115
116
SMBCLK1
SMBDAT1
+3.3V_ALW
10K 10K
+3.3V_RUN
2N7002
2N7002
+3.3V_RUN
CLK_SCLK
CLK_SDATA
P16
Express
Card
P37
MiniCard
WWAN
P40
MiniCard
WPAN
P39
10K 10K
C C
ITE8512E
+3.3V_RUN
2N7002
2N7002
+3.3V_RUN
THERM_SCL
THERM_SDA
10
EMC1423
9
P29
6
+3.3V_ALW
INVERTER
5
P26
2.2K 2.2K
SMBCLK2
117
SMBDAT2
118
+3.3V_DELAY
D D
+3.3V_DELAY
4.7K 4.7K
2N7002
2N7002
+3.3V_DELAY
1
2
3
4
5
2
3
7
8
Media
P49
Button
GFX
P49
THERMAL
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
6
Date: Sheet
7
COMPUTER
SMBUS BLOCK
SMBUS BLOCK
SMBUS BLOCK
FX6 3A
FX6 3A
FX6 3A
58 70 Tuesday, May 20, 2008
58 70 Tuesday, May 20, 2008
58 70 Tuesday, May 20, 2008
of
of
of
8
5
TH14
TH14
h-c236d126p2-v4
TH9
TH9
H-OB166X87D166X87N
H-OB166X87D166X87N
D D
1
1
TH23
TH23
h-c236d126p2-v4
h-c236d126p2-v4
3 5
1
1
h-c236d126p2-v4
3 5
4 2
TH20
TH20
h-tc315bc236d126p2-v4
h-tc315bc236d126p2-v4
3 5
4
TH6
TH6
h-tc197bc216d126p2-v4
1
h-tc197bc216d126p2-v4
3 5
4 2
3
TH4
TH4
h-tc276bc236d126p2-v4
1
h-tc276bc236d126p2-v4
3 5
4 2
1
1
TH32
TH32
h-tc216bc236d126p2-v4
h-tc216bc236d126p2-v4
3 5
2
TH28
TH28
h-tsbc315d126p2-v4
h-tsbc315d126p2-v4
3 5
4 2
1
TH29
TH29
h-tsbc315d110p2-v4
1
1
h-tsbc315d110p2-v4
3 5
4 2
TH27
TH27
h-tc354bs335d126p2-v4
h-tc354bs335d126p2-v4
3 5
TH24
TH24
h-tc335bs335d126p2-v4
1
h-tc335bs335d126p2-v4
3 5
4 2
of
59 70 Tuesday, May 20, 2008
of
59 70 Tuesday, May 20, 2008
of
59 70 Tuesday, May 20, 2008
1
PV2
PV2
4 2
GND
1
2
4 2
C C
TH1
TH1
h-tc197bc236d126p2-v4
h-tc197bc236d126p2-v4
1
3 5
4 2
B B
TH12
TH12
H-C256D154P2
H-C256D154P2
1
TH15
TH15
H-C256D154P2
H-C256D154P2
1
1
H-C126D126N
TH13
TH26
TH26
h-O126X157D126X157N
h-O126X157D126X157N
A A
1
TH13
H-C126D126N
H-C126D126N
1
5
4 2
TH2
TH2
H-TC197BC236D110P2-V4
H-TC197BC236D110P2-V4
3 5
4 2
1
H-C276D177P2
TH11
TH11
H-C276D177P2
H-C276D177P2
1
TH18
TH18
H-C276D157P2
H-C276D157P2
1
h-o71x118d32x79p2
TH33
TH33
h-o71x118d32x79p2
h-o71x118d32x79p2
1
TH3
TH3
h-tc197bc236d126p2-v4
h-tc197bc236d126p2-v4
3 5
4 2
TH19
TH19
H-C276D157P2
H-C276D157P2
1
TH34
TH34
h-o71x118d32x79p2
h-o71x118d32x79p2
1
4
1
TH25
TH25
h-tc197bc236d126p2-v4
h-tc197bc236d126p2-v4
3 5
4 2
H-C276D157I256P2 H-C256D154P2 H-C276D157P2
TH10
TH10
H-C276D157I256P2
H-C276D157I256P2
1
PV1
PV1
PAD138X98XH
PAD138X98XH
(13)
PAD158X98XH
PAD158X98XH
GND
1
3
4 2
Title
Title
Title
SCREL HOLE
SCREL HOLE
SCREL HOLE
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
FX6 3A
B
FX6 3A
B
FX6 3A
B
Date: Sheet
Date: Sheet
Date: Sheet
A
Change List
B
C
D
E
Item Page# Date
T
Issue Description
Solution Description
Rev
X00-1
4 4
1
2
3
4
5
6
7
8
9
3 3
10
11
12
13
14
15
25 8/13/2007 CLK_NB_14MB need resistor to a voltage divider. RS780 voltage level is +1.1V. Chagne R607 from 33 ohm to 158/F, added R637 90.9/F, depop R608 10k for RS780.
4 Remove R516 0 ohm.
8/13/2007
8/13/2007
8,51
8/13/2007
8/13/2007
8/13/2007
8/13/2007
14
8/13/2007
8E E 8/13/2007 S1G2 didn't use DDR_CS2_DIMMA/B# pin.
08
5
8/14/2007
8/14/2007EEEE
16 8/14/2007 EE Remove single net DDR_CS3_DIMMA/B# Remove single net CN5.120,CN6.120 X00-2
5 8/14/2007 EE Change the CPU_PWRGD,LDT_STOP#, LDT_RST# from +1.8V_RUN to +1.8V_SUS. Pull-up R193,R180,R184 from +1.8V_RUN to +1.8V_SUS(VDDIO).
5 8/14/2007 EE
5 8/14/2007 EE
16
17
18
2 2
19
20
5,53 CPU_PWRGD_SVID_REG should be level shifted to 3.3V for the ISL6265. Vih(min) is 2V. 8/14/2007 EE Added Q76,R161.
5 8/14/2007 Diode D7 blocks a low input to the CPU MEMHOT_L so the circuit would not work as drawn EE
19 8/14/2007 HDMI strap is on Hsync.Add 10k-ohm PU (to 3.3V) on VGAHSYNC before buffer U6. EE Pull up R191 10k ohm to +3.3V_RUN at VGASYNC
8/14/2007 EE DDC3 is 5V tolerance. There is no need to add level shifters, 8,28
EE
EE
Remove R516 0 ohm reserved resistor for MEMVREF. FX6/GX3 use 1.8V/2
EE
CPU_LDT_REQ#R should pull up to +1.8V_SUS.
EE
Connect STRP_DATA to VCORE PWM of NB for Power play. Connect STRP_DATA from U23.B10 to PQ1.2.
IDE_RST#/F_RST#/IMC_GPO3 defaults to output driven low. 13
EE
GP16,GP17 for ROM sel. Hepburn connect to EC spi rom. For SB, EC is on LPC bus. 14
EE
ATI recommend that AVDD should tie to +3.3V_S5 power rail. 14
EE
ATI recommend that AZ_RST#, LPCCLK0, LPCCLK1 should pull up to +3.3V_S5 with a 10-k. Chagne R378,R396,R408 from +3.3V_SUS to +3.3V_ALW.
EE
POP R38 and Depop R415. 5,12
Remove R720 PD 20k.
Depop R430 and pop R420. For LPC.
Chagne L46 from +3.3V_SUS to +3.3V_ALW.
Remove DDR_CS2_DIMMA/B# from CN5,CN6
Chagne from X00-1 to X00-2
Follow ATI recommend.
Follow ATI recommend. Modify VID table.
To save the space. There is no need to have these resister in Griffin system.
Follow ATI.The HDT we have (you have) right now is Purple Possum system. It's 1.8V level design. 5 8/14/2007 EE Pop R213 0 ohm and depop R212,Q35,R216.
Discrete only.
Discrete only.
Change Q59,Q20 from MMBT3904 to FDV301N and remove R54,R492.
Pop R536 0 ohm. Follow ATI recommend.CPU pin C2 need pull-down with 0 ohm.
Remove R556,R169,R161,R554,R553,R555,R172,R191,R165,R168,R196,R205
Remove D7 and reserved R159 680 ohm for DDRII thermal IC in the future.
Remove R18,R19,R22,R30,Q12,Q18. Remove off page HDMI_SCL,HDMI_SDA.Add TP on U23.A8
21
X00-1
X00-1
X00-1
X00-1
X00-1
X00-1
X00-1
X00-1
X00-1
X00-2
X00-2
X00-2
X00-2
X00-2
X00-2
X00-2
X00-2
X00-2
X00-2
X00-2 39 EE 8/14/2007 For LPC connect to WPAN socket: Reserve 0ohm, and NC when PD. Added R720,R763~R766 0 ohm for LPC signals.
Chagne from X00-2 to X00-3
22
23
29
29 8/15/2007 EE Added Q77 2N7002 isolation circuit. Added Q77 instead R406 ohm and change Q42 from +3.3V_SUS to +3.3V_RUN.
24
25
26
1 1
27
49 FAE Suggetion for OCP setting 8/15/2007 Change PR97 from 7.15K to 8.45K
52
8/15/2007 Add P112 to reduce ripple voltage Charge pump from +5V LDO, might cause high ripple voltage
28
PROJECT : Hepburn DOC. NO. : 204
APPROVED BY : Cory Lin
A
P
P
PR219 no need such hige rating component
P
CHECKED BY: Cory Lin
Change PR219 from 0805 to 0603 and remove one
REV:
REV:
REV:
X00
X00
X00
DATE : SHEET OF
DATE : SHEET OF
DRAWN BY :
DRAWN BY :
DRAWN BY :
B
C
DATE : SHEET OF
Aug. 13 , 2007 1 11 Leo Tseng
Aug. 13 , 2007 1 11 Leo Tseng
Aug. 13 , 2007 1 11 Leo Tseng
D
QUANTA
COMPUTER
E
X00-3 8/15/2007 EE Reserve the caps for any noise coupling issue happening. Depop C338 and close Q37. Added C920 and close EMC1423.
X00-3
X00-3
X00-3
X00-3
X00-3
X00-3 8/15/2007 52
A
Change List
B
C
D
E
Item Page# Date
29
4 4
30
31
32
33
52
52
28 EE 8/15/2007 No need to implement shunt resistors for HDMI on M82S
36
19,27 8/15/2007 EE Follow M82-S reference schematic.
8/15/2007 PC474 should populated for filter
8/15/2007
T
P
P
EE 8/15/2007 Follow vendor review. Added RC to include more different memory card. Pop C860 270pF and added C921 0.01u, R456 150k.
Issue Description
Reserve feedback circuit for testing Add PR169 and PR218
Discrete only.
Solution Description Rev
Populate PC474
Remove R159,R160,R163,R164 180 ohm.
There is double PU for CRT DDC.Remove R522,R519 2.2k and change R520,R486,R521,R485 to 2.2k.
X00-3
X00-3
X00-3
X00-3
X00-3 Discrete only.
Chagne from X00-3 to X00-4
34
35
36
37
38
3 3
42
42
42
5,29
15
39
40
19
41
42
38 Follow ATI SB700 checklist. Change C96,C208 from 0.01u to 0.1u to meet SB700 checklist.
8/16/2007
8/16/2007
8/16/2007
8/16/2007
8/16/2007
8/16/2007
8/17/2007
8/17/2007
8/17/2007
Load switch voltage drop is out of spec.
P
Load switch voltage drop is out of spec.
P
Load switch voltage drop is out of spec.
P
EE
Follow SMSC feedback.
EE
Follow ATI SB700 checklist. Change C518,C519,C529 to 1uF, C524 to 22uF.
EE
Follow ATI SB700 checklist. 15 Change C496,C494,C495,C489 to 2.2uF.
EE
Chagne from X00-4 to X00-5
EE
Move CLK_VGA_27M_SS to GPIO16 and reserved it for spread spectrum.
Added ESD diode. Added D35,D36,D37,D38 29,43,44
EE
Discrete only.
Change PQ13 from SI4800BDY to SI4856BDY
Change PQ29 from SI4800BDY to SI4336DY
Change PQ20 from SI4800BDY to SI4336DY
Change C341 from 220p to 2200p and depop C212
Reserved R196 0 ohm for EXT CLK GEN.
EE
X00-4
X00-4
X00-4
X00-4
X00-4
X00-4
X00-5
X00-5
X00-5
Chagne from X00-5 to X00-6
43
44
45
2 2
46
47
48
49
50
25 8/20/2007 Follow FAE feedback. Added Decoupling caps for U16's VDDIO. Added Decoupling caps C685,C924~C930 and L93 for U16's VDDIO. X00-6
12,20 8/20/2007 Follow ATI FAE recommend. Set GPIO to turn on M82 +3.3V_DELAY. Connect GFX_RUN_ON from SB700 pin AC6 to R513.
12,14,18 8/20/2007 Follow ATI FAE recommend to change the M82 reset signal for power express. Added R458,R457,D39,D40,R205 for power express.
14 8/20/2007 Follow ATI FAE recommend. Change R421,R429 from 10k to 2.2k.
34 8/20/2007 Follow BCM FAE recommend to remove external RC termination.
33 8/20/2007 Follow BCM recommend to add the required grounding for all the package signals and powertermination. Add U29 pin 69 thermal GND pad.
8/20/2007 Change VGAH(V)SYNC to INT_VGAH(V)SYNC from PU to PD for disable side prot memry. 8 Discrete only. Depop R497 and pop R500.
8/20/2007 25 It's no need to reserve 49.9 ohm and change R243,R235 from 47.5 to 0 ohm, depop R236 261/F. Remove 49.9 ohm, change R243,R235 from 47.5 to 0 ohm and depop R236. X00-6
EE
EE
EE
EE
EE
EE
EE
EE
Remove (R690~R697 and C794~C797)
X00-6
X00-6
X00-6
X00-6
X00-6
X00-6
Chagne from X00-6 to X00-7
51
52
53
54
1 1
42 8/21/2007 Follow Card reader vendor recommend to add PU resistor for IRQ_SERIRQ. Add R267 10K ohm to pull-up +3.3V_RUN. X00-7
41 8/21/2007 There is no +3.3V_RTC_LDO power rail. Change the +3.3V_RTC_LDO to +3.3V_ALW.
21 8/21/2007 Added +1.8V_GFX power rail for M82-S power express Change the M82-S +1.8V_RUN to +1.8V_GFX and added +1.8V_GFX power switch.
55
56
54 Connect thermal pad to AGND Add pin15 to AGND P 8/21/2007
EE
EE
EE
P 51 Connect thermal pad to AGND Add pin15 to AGND 8/21/2007
P Preserve component for MAX8778 52 Add PC115 8/21/2007
X00-7
X00-7
X00-7
X00-7
X00-7
PROJECT : Hepburn DOC. NO. : 204
APPROVED BY : Cory Lin
A
CHECKED BY: Cory Lin
REV:
REV:
REV:
X01
X01
X01
DATE : SHEET OF
DATE : SHEET OF
DRAWN BY :
DRAWN BY :
DRAWN BY :
B
C
DATE : SHEET OF
Sep. 19 , 2007 2 11 Cory Lin
Sep. 19 , 2007 2 11 Cory Lin
Sep. 19 , 2007 2 11 Cory Lin
D
QUANTA
COMPUTER
E
A
Change List
B
C
D
E
Item Page# Date
57
4 4
58
55 Change PR66 to 63.4K P Change feedback resistor for 1.1V output 8/21/2007
55 Change PR68 to 4.53K P Change feedback resistor for +1.1V_GFX_PCIE output 8/21/2007
T
Issue Description
Solution Description Rev
X00-7
X00-7
Chagne from X00-7 to X00-8
59
60
61
62
63
12,35 Change the PCI_PIRQD to PCI_PIRQB and move to U31.AC4 Change the PCI_PIRQD to PCI_PIRQB. ATI must use INTH#/GPIO36 to control M82-S reset signal.
12 ATI use INTH#/GPIO36 (PE_GPIO0) to control M82-S reset signal. Added PE_GPIO0 on U31.AE3 to control M82-S reset.
48 Pin define is wrong. Change JABT1 pin define 8/22/2007
48 8/22/2007 Remove AC_OFF function Remove PQ24
9 8/23/2007
8/22/2007
8/22/2007
64
65
66
3 3
67
68
34 8/23/2007 Follow FM6 to modify the +3.3V_LAN power source form +3.3V_ALW to +3.3V_SUS. EE Depop +3.3V_ALW to +3.3V_LAN switch circuit and added R767 to connect +3.3V_SUS to +3.3V_LAN.
55 8/23/2007 We don't use RUNPWROK and use GFX_RUN_ON to turn on GFX power. EE Remove PR169.
12 8/23/2007 EE Follow ATI checklist. Reserved J13 for Rubuto. Added J13 for Rubuto system.
34 8/23/2007 EE Follow Dell. Change the LED signals. LINKLED connect to G_LED.SPD100LED connect to amber LED. X00-8
EE
EE
P
P
Remove 0 ohm resistor for RX780 power rail option (will not support RX780) and CRT 150 ohm. Remove R490,R42,R84,R32,R63,R112,R119,R131 for RX780.
EE
Discrete only. 8/23/2007 22 Added level shift on M82-S thermal IC SMBUS2. EE Added Q88,Q87 and remove R144,R137 0 ohm.
X00-8
X00-8
X00-8
X00-8
X00-8
X00-8
X00-8
X00-8
X00-8
Chagne from X00-8 to X00-9
69
70
71
72
73
74
2 2
75
76
77
78
79
80
81
82
83
1 1
84
85
9 8/24/2007 EE Check the CLK GEN vendor (RT&CLG). They don't have PA_RS7X0A1 issue. Remove R29,R33,R37,R34 and connect to GPP_SB_REFCLK directly from CLK GEN SB_SRC CLK.
26 8/24/2007 EE Added OR gate to support backlight from EC and NB. Added U225,C932 and pop R464.
45 8/24/2007 EE Added AND gate in system reset circuit.
31,32 8/24/2007 EE
Change the audio to IDT STAC9228/92HD73C. Change the audio to IDT STAC9228/92HD73C.
25 8/24/2007 EE Follow RS780 check list to change the ferrite bead for CLK GEN power.
Remove R204,R209 and added U226,U227.
Change the L34 ,L93 and added L107,L108 to FBM-11-160808-601A10T
Added C997,C998 1U and change L15 from 4.7U to 1U. 11 8/24/2007 EE Follow RS780 check list.
Chagne from X00-9 to X00-10
8/28/2007 EE Added reduce WWAN interference solution. 22,26 X00-10 Added C1001~C1008, R835,R836.
42,43 8/28/2007 EE Chagne MEDIA_INT to active low. MEDIA_INT# need pull-up +3.3V_ALW. Move R217 to page 43, pull-up to +3.3V_ALW. Added RC to MEDIA_INT#.
44 8/28/2007 EE Chagne power switch and sniffer switch power rail.
42,53 8/28/2007 EE Chagne CPU_VCORE_PWRGD pull up power rail.
43 8/28/2007 EE Added the NUM, CAP low active circuit and swap keyboard signals. Added CP7 and Q80,Q82,Q81,Q83,R834,R832.
39 8/28/2007 EE Depop debug board's 0 ohm.
30 8/28/2007 EE ODD SATA is not need +3.3V_RUN. Remove +3.3V_RUN decoup caps for ODD SATA.
46
52
52
52
8/28/2007
8/28/2007
8/28/2007
8/28/2007
P
USB Charger Function
P
USB Charger Function
P
USB Charger Function
P
USB Charger Function
Chagne R461,R21 from +RTC_CELL to +3.3V_ALW.
Chagne PR35 from +3.3V_ALW to +3.3V_SUS and depop R574.
Depop debug board's 0 ohm R322,R685,R720,R763,R764,R765,R766
Remove R745,R747,R307,R744,R313.
Add +5V_ALW to +5V_SUS Load Switch for USB Charger
Change +5V_ALW to +5V_ALW2
Change +5V_SUS to +5V_ALW
Remove PR213 and PD1
X00-9
X00-9
X00-9
X00-9
X00-9
X00-9
X00-10
X00-10
X00-10
X00-10
X00-10
X00-10
X00-10
X00-10
X00-10
X00-10
PROJECT : Hepburn DOC. NO. : 204
APPROVED BY : Cory Lin
A
CHECKED BY: Cory Lin
REV:
REV:
REV:
X00
X00
X00
DATE : SHEET OF
DATE : SHEET OF
DRAWN BY :
DRAWN BY :
DRAWN BY :
B
C
DATE : SHEET OF
Sep. 19 , 2007 3 11 Leo Tseng
Sep. 19 , 2007 3 11 Leo Tseng
Sep. 19 , 2007 3 11 Leo Tseng
D
QUANTA
COMPUTER
E
A
Change List
B
C
D
E
Item Page# Date
86
4 4
87
88
89
90
52 8/28/2007
51
8/28/2007
54 8/28/2007
49
8/28/2008
49 8/28/2008 Follow AMD recomment. Added buffer work around circuit to NB_PWRGD. Added U234 buffer to seperate NB_PWRGD and WD_PWRGD. X00-10
T
P
P
P
P
EE
Issue Description
USB Charger Function
FAE Suggest 237K for 300KHz frequency
FAE Suggest 237K for 300KHz frequency
FAE Suggest connect to GND
Solution Description Rev
Change +3.3V_DL to +5V_DL
Change from 178K to 237K
Change from 178K to 237K
Change to connect to GND
X00-10
X00-10
X00-10
X00-10
Chagne from X00-10 to X00-11
91
92
93
94
95
3 3
96
97
25
9
28,44
24
9 8/30/2008 Added PD resistor 2.7k for INT_EN_LCDVDD. Added R863 2.7k for INT_EN_LCDVDD. X00-11
10 8/30/2008 Follow ATI checklist. Added L114 to reduce noise for VDDPCIE. Added L114 to VDD_PCIE.
8/29/2008
8/29/2008
8/29/2008
8/29/2008
8/30/2008
Added MINI3CLK_REQ#,EXPRESSCARD_REQ# pull-up resistor.
EE
pop R495 and remove PANEL_BKEN from RS7800
EE
Add ESD, Choke for Biometric and HDMI.
EE
Follow AMD recomment. Change the voltage level for hybrid IC SEL pin.
EE
Add work around TPS72501 to create 1.35V to RS780 VDDHTTX power rail. RS780 Rev.A11 only. 10 Used TPS72501 to create +1.35V_HT_VCC and added L113 for option.
EE
EE
EE
P98For more suitable RDSON 46 8/30/2007
99
100
101
102
103
104
2 2
105
106
107
48
49 P MPL104S-0R9 is not PSL Change to MPC1040LR88
52 P
52
52 P For Uni material
53 MPL73-3R3 is not PSL P
53 FAE Suggest PR43=18K, PR42=100K P Change to PR43=18K, PR42=100K
53
53 FAE Suggest PR199=16.2K, PR200=4.02K
108
109
110
111
55
56
8/30/2007
8/30/2007
8/30/2007
8/30/2007
8/30/2007
8/30/2007
8/30/2007
8/30/2007
8/30/2007
8/30/2007
8/30/2007
8/30/2007
8/30/2007 For High=1.0, Low=0.9 Output
P Footprint is not correct
Reserve GPIO for USB Charger
P FAE suggest connect to +3.3V_DL
P
P
P
FAE Suggest PR198=16.2K, PR205=4.02K
P
P
P
P
P
P
P
P
For High=1.0, Low=0.9 Output
P
Added R837,R859 10k pull up to +3.3V_RUN. X00-11
pop R495 0 ohm and remove R806.
Add ESD3 for Biometric and L109~L112 for HDMI.
Change R89 from 0 ohm to 8.2k ohm.
X00-11
X00-11
X00-11
X00-11
X00-11
Change to SI4800BDY
Change to new footprint "BAT-200045MR009H577ZR-9P-R-V"
X00-11
X00-11
X00-11
Add 5V_ALW_ON GPIO for USB charger enable
Connect to +3.3V_DL
Change to 0.1u/0603
Change to MPLC0730L3R3
X00-11
X00-11
X00-11
X00-11
X00-11
Change to PR198=16.2K, PR205=4.02K
Change to PR199=16.2K, PR200=4.02K
Change to MPLC0730L4R7 54 MPL73-4R7 is not PSL
Change PR207 to 20K/F 54 For High=1.0, Low=0.9 Output
Change PR64 to 69.8K/F
Change PR66 to 22.6K/F
X00-11
X00-11
X00-11
X00-11
X00-11
X00-11
Chagne from X00-11 to X00-12
112
113
1 1
114
115
19,20 8/31/2007 EE Follow ATI FAE. Reserved GFX thermal protect function. Added U241,Q98,Q99,R870,R871.R872
53
53
9/1/2007
9/1/2007
EE 32 8/31/2007 Follow ME feedback. Used MIC connector in MB side. Pop J14 and remove M1 X00-12
X00-12
P FAE Suggest to remove sense resistor for saving space
P
FAE Suggest to remove sense resistor for saving space
Remove PR179, PR180
Remove PR194, PR195 X00-12
X00-12
PROJECT : Hepburn DOC. NO. : 204
APPROVED BY : Cory Lin
A
CHECKED BY: Cory Lin
REV:
REV:
REV:
X00
X00
X00
Leo Tseng
Leo Tseng
DRAWN BY :
DRAWN BY :
DRAWN BY :
B
Leo Tseng
C
DATE : SHEET OF
DATE : SHEET OF
DATE : SHEET OF
Sep. 19 , 2007 4 11
Sep. 19 , 2007 4 11
Sep. 19 , 2007 4 11
D
QUANTA
COMPUTER
E
A
Change List
B
C
D
E
Item Page# Date
116
4 4
117
118
119
120
121
122
123
55
55
55
47 9/01/2008 P Cancel this function. It's no use. Remove PR74, PQ15
29
36 9/01/2008 EE Follow FAE feedback. Added C1032 270p_NC to SD_CD# Added C1032 270p_NC to CON5 pin 2 SD_CD#.
15 9/01/2008 EE Follow AMD feedback. Change SB700 VDD power rail from +1.2V_RUN to +1.2V_ALW_SUS. Added L90 and connect to +1.2V_ALW_SUS. Depop L39.
24 9/01/2008 EE Follow AMD feedback. Change R89 from 0 ohm to 8.2k ohm. Change R89 from 0 ohm to 8.2k ohm.
9/01/2008
9/01/2008
9/01/2008 EE Follow FAE feedback. Pull up resistor to +3.3V_SUS. Added R877 10k ohm to pull up +3.3V_SUS. X00-12
T
PPChange to hight rating mosfet for 9.4A
P 9/01/2008
Issue Description
Change to hight rating mosfet for 9.4A
Change to hight rating mosfet for 9.4A
124
125
126
3 3
52 P 9/03/2008
9/03/2008 55 Reserved snubber P Add PR245, PC211
127
128
Reserved for MAX8778
ITE 8512 FAE concern pin 126,pin 23,pin 4,pin 15 have leakage . Added D43~D46 to U13 pin 126, pin 23, pin 4, pin 15.
EE 5 9/03/2008
Follow AMD feedback. Added 2 * MOSFET for CPU_PWRGD_SVID_REG level shift. Added Q100,R881and modify Q76 to gate by CPU_PWRGD.
Chagne from X00-12 to X00-13
129
130
131
132
133
134
2 2
135
49,51,54 9/04/2008 P Dell suggest to add 0.1u cap near IC feedback pin to reduce feedback noise. Add 0.1u cap
51 9/04/2008 P FAE suggest to add PR460,PC451 and PQ115 for voltage shift function. Aadd PR460,PC451 and PQ115 for voltage shift function.
19 9/04/2008 EE Follow ATI feedback. Reserved R889 1M for Y2 27Mhz.
42 9/04/2008 EE Added D47 Added D47 to connect WRST# and THERM_STP#
9,27 9/04/2008 EE Add RS780 CRT I2C function. Connect U13 pin E8,F8 to CRT DDC bus.
Add RS780 HDMI I2C function. 9/04/2008 EE 9,28 Connect U13 pin A8,B8 to HDMI DDC bus and Added level shift(R886,R887,Q101,Q102)
Solution Description Rev
Change to FDS8880_NL
Change to FDS6676AS_NL
Change to SIL104R-1R0
X00-12
X00-12
X00-12
X00-12 26 9/01/2008 EE Reserved caps for reduce SMBUS1 overshoot and under shoot. Reserved C1011,C1012 47p in J1 pin5,6
Add PR114
X00-12
X00-12
X00-12 42 9/03/2008 EE
X00-12
X00-12
X00-13
X00-13
X00-13
X00-13
X00-13 33 9/04/2008 EE Reserved BCM5784M SUPER_IDDQ circuit. Reserved R888 20k ohm.
X00-13
X00-13
Chagne from X00-13 to X00-14
136
137
138
139
55 9/05/2008 Footprint is different with PL9 sepc. Change PL9 footprint to SIL104.
24 9/05/2008EEEE ATI has update power express circuit. Added R890~R897and depop Q3~Q10.
13,39 9/05/2008 EE Added SB_USBP8 to WLAN. Added L115, R902, R903.
140
141
142
1 1
43
43
143
144
9/05/2008 31 EE Added 4 * 0 ohm for EMI. Added R898~R901 to JSPK1. X00-14
X00-14
X00-14
X00-14
X00-15
X00-15
X00-15
9/06/2008 EE
EE 9/06/2008
Chagne from X00-14 to X00-15
Added KB BACKLITE power switch circuit. Added Q104,Q103,C1033,C1034,R190,R907,R908,R909 to option +KB_LED power source.
Added TP power rail and change LID_SW# power rail Added C385 and PU to +3.3V_SUS to JP2.5. Change R455 to +3.3V_ALW.
Chagne from X00-15 to X00-16
EE 9/11/2008 9
9/12/2008 EE X00-16
There is not work in DC IN LED for SSI build. Depop Q16, Q17, R44, R45 44
Depop R416 There is on need pull-up resistor to work around for RS780 A11.
X00-16
PROJECT : Hepburn DOC. NO. : 204
APPROVED BY : Cory Lin
A
CHECKED BY: Cory Lin
REV:
REV:
REV:
X00
X00
X00
DATE : SHEET OF
DATE : SHEET OF
DRAWN BY :
DRAWN BY :
DRAWN BY :
B
C
DATE : SHEET OF
Sep. 19 , 2007 5 11 Leo Tseng
Sep. 19 , 2007 5 11 Leo Tseng
Sep. 19 , 2007 5 11 Leo Tseng
D
QUANTA
COMPUTER
E
A
Change List
B
C
D
E
Item Page# Date
145
4 4
9 9/14/2007 EE Follow ATI FAE feedback. Change the RS780 strap pin. Depop R419 and pop R420. X00-16
T
Issue Description
Chagne from X00-16 to X01-1
1
2
3
4
5
6
P1
P2
P3
3 3
7
8
9
10
P4
P5
P6
P7
11
2 2
12
13
14
15
16
17
18
19
20
1 1
P8
21
9 10/01/2007 EE
9,24,27 10/01/2007 EE Added CRT power express function. Added R743,R744,R745,C943,R750~R756,Q100,Q101,U53~U55.
9,24,26 10/01/2007 EE Follow ATI FAE feedback(AN_RS780B1). Change the LVDS power express circuit.
19 10/01/2007 EE Remove M82-S Xtal circuit. Remove R459,R457,R448,C643,C642,Y2.
28 10/02/2007 EE Follow ATI FAE feedback(AN_RS780B1). Added isolation logic on HDMI_DET. Added Q102,R762.
46,47,48 Change +5V_ALW to +5V_ALW2
52
10/02/2007 P ALW_PWRGD_3V_5V is dummy net Remove PR104,PR203 and change connect to +3.3V_ALW
47 10/02/2007 P To solve EE noise made by charger
21 10/03/2007 EE +5V_ALW issue when USB charger disabled in S5 Connect power trace from +5V_ALW to +5V_ALW2
12 10/26/2007 EE Follow AMD SCL. Depop R694 1M ohm.
19 10/26/2007 EE The DVPDATA20~DVPDATA23 need pull-up with VDDR4/5 same power rail(+1.8V_GFX). Change R467~R468 pull-up power rail from +3.3V_RUN to +1.8V_GFX.
19 10/26/2007 EE Swap G_DAT_DDC2/G_CLK_DDC2 signals. Swap G_DAT_DDC2/G_CLK_DDC2 signals on R79/R77
51
51 10/30/2007 P NB_VCORE will OVP when voltage switch Follow FAE suggestion to put PR236 and PR237
10/30/2007 47,51,52 P SI4810 EOL Issue Change PQ41,PQ2,PQ23,PQ27 to SI4812
51,54 10/30/2007 P To reduce Vo jitter issue Change PC97 and PC72 to 220u/2.5V/ESR15
10 10/31/2007 EE RS780M change form A11 to A12 and don't need work around. Pop L71 and Depop L12,C87,U6,R59,R60,C82.
13 10/31/2007 EE Added Express card power enable on SB700. It's for Express card hot plug. Change U39.B8 from USB_OC5# to EXPRCRD_PWREN# and connect to CN2.
28 10/31/2007 EE Follow ANT HDMI detect circuit. Added Q102,R762, pop R43 and remove D18, R411
32 10/31/2007 EE Added +3.6V_CAMERA Camera power circuit
38 10/31/2007 EE Added USB charge circuit for leakage. Added Q103,R765,U57,U58.
42 10/31/2007 EE Swap U9.31 NUM_LED# and U9.98 KB_BACKLITE_EN Swap U9.31 NUM_LED# and U9.98 KB_BACKLITE_EN
44 10/31/2007 EE Depop SNIFFER_YELLOW LED circuit. and Swap WIRELESS_ON/OFF#, SNIFFER_PWR_SW# circuit. Depop R477,Q75,Q71,R453 and Swap R392, R452 signals
10/31/2007 43 Change KB_LED pwoer ciruit. EE Pop R214, Add Q104 and Depop R221,R223,Q46,Q39,C319,C310,R199 and modify J4 pin define.
10/31/2007 9,45 EE Depop SB700 A11 WD_PWRGD work around circuit. Depop U28,C690,R511 and pop R516,R416. X01-1
11/01/2007 42 EE Change GPIO and remove SNIFFER_YELLOW function.
55 11/01/2007 EE Added tree level GFX voltage control. Added PR238,PC210,PR242,PR243,PR239,PC90,PQ56 X01-2
19 11/01/2007 EE Added tree level GFX voltage control.
Follow ATI FAE feedback. Change the RS780 debug strap pin. Added R759 3k ohm to PU +3.3V_RUN and depop the R418.
+5V_ALW issue when USB charger disabled in S5 10/02/2007 P
P 10/30/2007 Change capacitor to resistor for reserve pull low Change PC13 to PR104
Chagne from X01-1 to X01-2
Solution Description Rev
Depop the level shift Q68,Q15,R414,R42 and added R757, R758 0 ohm.
Change charger output Cap 10U/25V from X6S to X5R CAP (PN: CH6104K9207)
Added U56,C944,C945,C946,R763,R764.Remove C264. Modify JCAMERA1 pin define and L33 power rail.
Move 5V_ALW_ON to U9.83, Move NUM_LED# to U9.88 and remove R477,Q75,Q71,R453
Pop R112 and change it from GFX_CORE_CNTRL0 to GFX_CORE_CNTRL1
X01-1 9 10/01/2007 EE Follow ATI FAE feedback. Don't need LDT_STOP#, CPU_LDT_REQ# level shift.
X01-1
X01-1
X01-1 Change LCD DDC circuit to isolation logic and LCD BACKLIGHT,PWM,LCD power to Wired OR.
X01-1
X01-1
X01-1
X01-1
X01-1
X01-1
X01-1
X01-1
X01-1
X01-1
X01-1
X01-1
X01-1
X01-1
X01-1
X01-1
X01-1
X01-1
X01-1
X01-1
X01-1
X01-1
X01-2
PROJECT : Hepburn DOC. NO. : 204
APPROVED BY : Cory Lin
A
CHECKED BY: Cory Lin
REV:
REV:
REV:
X01
X01
X01
DATE : SHEET OF
DATE : SHEET OF
DRAWN BY :
DRAWN BY :
DRAWN BY :
B
C
DATE : SHEET OF
Sep. 19 , 2007 6 11 Leo Tseng
Sep. 19 , 2007 6 11 Leo Tseng
Sep. 19 , 2007 6 11 Leo Tseng
D
QUANTA
COMPUTER
E
A
Change List
B
C
D
E
Item Page# Date
22
4 4
23
24
25
26
27
28
P9
P10
P11
P12
3 3
P13
P14
P15
P16
29
P17
30
31
5,12 11/01/2007 EE Change R135,R374 from +5V_ALW to +5V_ALW2 +5V_ALW issue when USB charger disabled in S5 X01-2
33,34 11/02/2007 EE Change BCM5787M to BCM5784M. Change BCM5787M to BCM5784M. X01-2
31 11/02/2007 EE Change STAC9228 to 92HD73C. Change STAC9228 to 92HD73C.
14 11/05/2007 EE Follow ATI SCL and feedback. Added R766 0 ohm connect U39.C6 TEMP_COMM to GND. X01-2
13,39 11/05/2007 EE Change WLAN from USB port 8 to USB port 4. Change WLAN from SB_USBP8+/- to SB_USBP4+/- and Move to U39.B12,U39.A12. X01-2
19 11/05/2007 EE Change M82-S pin straps from +3.3V_RUN to +3.3V_DELAY. It will avoid leakage during power-up. Change M82-S GPIO to +3.3V_DELAY X01-2
38 11/05/2007 EE Co-lay USB Q-switch and 0 ohm Reserved R767~R770 0 ohm with U57 pin 2,3,5,6,U58 pin 2,3,5,6. X01-2
46 11/05/2007 P Modify +5V_SUS load switch
53 11/05/2007 FAE suggest to reserve P Add PR241
54 11/05/2007 Modify current limit value P Change PR228 from 10K to 5.9K
55 11/05/2007 Update the resistor value P Update PR34,PR35,PR36,PR30,PR244,PR238
49,51,53,54,55 11/05/2007 X01-2
49 11/05/2007 P Set tracking discharge mode PR229 populate and PR230 NC
52 Add PR245
11/05/2007 P 5V_ALW_ON pull low at initial state
53
42,44,48 11/06/2007 EE
51,54
11/06/2007 P Remove PC1,PC93. For space saving. X01-2
42 11/07/2007 EE Add BID1 to EC pin98 Connect R482,R483 to U9.98 X01-2
42 11/07/2007 EE Remove double pull-up resistor. Remove R152,R542 X01-2
T
P To solve power good glitch issue
Issue Description
Remove DC IN LED circuit and change signal name DCIN_DETECT_LED# to CHIPSET_ID1. Remove R44,Q17,Q16,R45 and change U9.99 signal name DCIN_DETECT_LED# to CHIPSET_ID1.
Solution Description Rev
X01-2
Remove PQ12
Connect IC power to +5V_ALW2
Add PR246 11/05/2007 P CPU_VCORE_ENABLE pull low at initial state
X01-2
X01-2
X01-2
X01-2
X01-2
X01-2
X01-2
X01-2
Chagne from X01-2 to X01-3
2 2
32
33
P18
P19
P20
34
35
36
37
38
1 1
39
40
5 11/09/2007 EE Solve glitch from CPU_PWRGD. Added C947 0.1uF on CPU_PWRGD. X01-3
14,42 11/09/2007 EE Solve S5 leakage. Connect L51 from +3.3V_ALW to +3.3V_SUS and remove R134 for SIO_SLP_S5#. X01-3
51 11/12/2007 P Follow AMD FAE suggest +NB_VCORE dynamic voltage design
54 11/12/2007 P To solve jitter issue Change PL2 from 4R7 to 3R3
Remove PQ7,PC15,PR18,PR13
Add PR247,PR13,PR18,PR248,PR249 49,51,54 Reserve for solving giltch issue caused by IC power rail P 11/12/2007
X01-3
X01-3
X01-3
5 11/15/2007 EE Follow ANT reference to solve S3 leakage. Change R103,R149,R143,R132 pull-up from +1.8V_SUS to +1.8V_RUN. X01-3
12 11/15/2007 EE Solve CPU_PWRGD voltage too low(+1.5V). Change Q57 from MMBT3904 to FDV301N. X01-3
42 11/15/2007 EE Check with power team and EC. The charge IC INP pin can be read with EC ADC function. Pop R133 0 ohm and depop R128 0 ohm. X01-3
14,33,36,42 11/15/2007 EE
EE 11/15/2007 43
Follow XTAL vendor feedback to change the XTAL caps.
Change C249, C250 to 18pF. C518 to 27pF. C813 to 22pF, C859, C860 to 12pF X01-3
Change R214 0 ohm to FS3. Follow Dell recommend. X01-3
31,32 11/16/2007 EE Follow IDT recommend to change caps for batter Audio Precision. Change C932, C927, C823, C814 from 1uF to 2.2uF. X01-3
5,12 11/16/2007 EE Follow ANT 3.2 reference schematic to remove CPU_PROCHOT# level shift. X01-3 Remove R89, R91, Q24.
PROJECT : Hepburn DOC. NO. : 204
APPROVED BY : Cory Lin
A
CHECKED BY: Cory Lin
REV:
REV:
REV:
X01
X01
X01
DATE : SHEET OF
DATE : SHEET OF
DRAWN BY :
DRAWN BY :
DRAWN BY :
B
C
DATE : SHEET OF
Sep. 19 , 2009 7 11 Leo Tseng
Sep. 19 , 2009 7 11 Leo Tseng
Sep. 19 , 2009 7 11 Leo Tseng
D
QUANTA
COMPUTER
E
A
Change List
B
C
D
E
Item Page# Date
T
Issue Description
Solution Description Rev
Chagne from X01-3 to X01-4
4 4
41
42
43
P21
P22
44
45
P23
P24
P25
3 3
P26
P27
P28
46
47
48
49
50
51
2 2
52
53
54
P29
P30
55
56
57
58
1 1
59
60
14 Follow AMD SB700 design guideline to add series resistor. 11/19/2007 Add R771, R772 4.99 ohm at U39 AD13,AE13 SATA_TX3+/- for ESATA signals.
X01-4 EE
9,12,24,28 11/19/2007 Follow AN_RS780B1 to modify the PX circuit and update RS780M symbol. EE Move PE_GPIO2 to U22.B8), NB_LCD_BKL_EN from SB700.AE2 to R413. Remove Q12,Q13. X01-4
44 11/19/2007 EE Sniffer should be during S5.Dell define our Sniffer switch need to stay 'ON' after the WiFi can be enable. change R392 to +3.3V_ALW. X01-4
46 P Reduce RUN/SUS PW switch circuit. 11/19/2007 Remove PR(118,121,222,226,77,79,93,91) and change PQ(15,21,35,54) to 2N7002W-7-F.
PC73,PC46,PC192,PC177,PC62,PC58,PC49 from 10U/1206 to 0.1U/0603 46 Reduce RUN/SUS PW switch circuit. 11/19/2007 P
38 11/20/2007 EE Depop Q-switch function on PT build. Depop Q103,R765,U57,U58 and pop R767~R770.
Remove R66,R71 pull-up resistor. 11/20/2007 EE Remove double pull-up resistor. 19
49 11/20/2007 P Reduce Jitter Change PC201 and PC200 from 330u/ESR15 to 220u/ESR25
52 11/20/2007 P PC185 is no use for schematic Remove PC185
53 11/20/2007 P To reduce input ripple Add PC211 and PC212
55 11/20/2007 P Reduce Jitter Change PC171 to 330uF/2V/ESR9
47,48,55 11/20/2007 P 2nd Source suggest to change Change PD9 and PD6 to RB500V-40 , PQ4 to FDV301N
47 11/20/2007 P UL schemaitc are going to be replaced by EC control UL schemaitc component are NC.
42 11/21/2007 EE
Follow ITE feedback to reserve caps for ITE8512JX.
Add C948, R773 to U9 pin 12.
38 11/21/2007 EE Change USB Q-switch power rail from +3.3V_RUN to +3.3V_SUS. Change U57 pin 8, U58 pin 8 from +3.3V_RUN to +3.3V_SUS, Q103 pin2 from RUN_ON to SUS_ON.
19 11/21/2007 EE
Strengthen PCIE FULL TX OUTPUT SWING and TRANSMITTER DE-EMPHASIS.
Pop R104, R485 10k ohm. X01-4
X01-4
X01-4
X01-4
X01-4
X01-4
X01-4
X01-4
X01-4
X01-4
X01-4
X01-4
X01-4
33,34 11/21/2007 EE Modify LAN 1000 LED circuit to solve BCM5784M LED issue. Add D38,R774 to solve BCM5784M 1000 LED issue. X01-4
28 11/22/2007 EE Change HDMI connector symbol. Change CN3 connector symbol. X01-4
32 11/22/2007 EE Remove these 20K ohm resistors because it is for desktop design or codec internal headphone amplifier. Depop R606, R614, R639, and R648. X01-4
38 11/22/2007 EE For EMI solution to pop choke. Pop L25,L27 and depop R119, R109,R130,R124. X01-4
44 EE For EMI solution to add caps. Add C949~C952 100pF.
50 11/23/2007 EE
53 11/24/200748P EMI Solution Add PC185,PC213,PC214,PC215,PC217,PC216,PC218,PC220,PC219
25 11/23/2007 EE EMI Suggestion C753, C271 populate
12 11/23/2007 EE
32 11/23/2007 EE Change C770, C751 from 220pF to 47pF. IDT had found out the resonance on portA and suggested change 220pF to 47pF for EMI.
11/23/2007
Base on RS780M T13 timing. +1.8V_RUN rise need before then +1.1V_RUN. Change PR83 from 0 ohm to 200k ohm and depop PC50 from 0.01u to 0.1u.
11/24/2007 P For ESD protect EMI Suggestion PD7 populate
EMI Solution
EMI Solution EMI Suggestion C406 populate
EMI Solution 32 11/23/2007 EMI Suggestion C789,C800,C770,C751 change form 220pF to 470pF. EE
X01-4
X01-4
X01-4
X01-4
X01-4
X01-4
X01-4
X01-4
Chagne from X01-3 to X01-4
41 11/26/2007 EE BT1 connector pin define is different before. Change BT1 pin 2 to GND, pin 1 to +RTC.
42 EE 11/26/2007 Sniffer power switch needs to wake up EC, when battery only. So it needs to use WUI pin. Swap U9.108 SNIFFER_PWR_SW# and U9.35 WIRELESS_ON/OFF#
X01-5
X01-5
PROJECT : Hepburn DOC. NO. : 204
APPROVED BY : Cory Lin
A
CHECKED BY: Cory Lin
REV:
REV:
REV:
X01
X01
X01
DATE : SHEET OF
DATE : SHEET OF
DRAWN BY :
DRAWN BY :
DRAWN BY :
B
C
DATE : SHEET OF
Sep. 19 , 2007 8 11 Leo Tseng
Sep. 19 , 2007 8 11 Leo Tseng
Sep. 19 , 2007 8 11 Leo Tseng
D
QUANTA
COMPUTER
E
A
Change List
B
C
D
E
Item Page# Date
61
4 4
P31
P32
P33
62
63
64
65
66
67
3 3
1
2
3
4
5
6
7
36 11/26/2007 EE EMI Solution Add C961~C963 27pF for EMI solution. X01-5
51 11/26/2007 P FAE suggest to reserve RC to slow down voltage switch add the R/C at PQ57 to slow down PQ57 switcher to against OVP, and remove R/C in front of PQ5 X01-5
51,54 P 11/26/2007 Got more performance for jitter issue Change PC97 and PC72 from 220u/2.5V/ESR15 to 220u/4V/ESR40
49 11/26/2007 P More suitable OCP Value Change PR233 to 11.8K
32 11/26/2007 EE Follow FAE suggest. Change U16 pin 21~25 to NC. X01-5
38 11/26/2007 EE X01-5 Populate ESD3 for EMI suggest. EMI Solution
5 11/26/2007 EE Add Q105,Q106,R776,C964 and connect H_THERMTRIP# to 3V, 5V ALW circuit. Solve system shut down issue from CPU_THERMTRIP#.
5 11/26/2007 EE Follow ANT 3.2 schematic PX circuit to change M82-S reset signal from LAN_RST# to PLTRST# Depop R159 and pop R158. X01-5
12 11/28/2007 EE Follow ANT 3.2 schematic. Depop R678, R682. X01-5
33 11/28/2007 EE Follow Broadcom FAE feedback. BCM5784M CLKREQ# can't work. Pop R651 ohm and depop R650 4.7k ohm before CLKREQ can work. X01-5
5 12/28/2007 EE Follow AMD Griffin sighting Dec 18.pdf to reserve resistor for system hang or shut downboot issue. Add R777,R778 and pop R164 300 ohm for system hang or shut down issue. X02-1
43 1/2/2008 EE Change MMB pin 1 power source to 5V_ALW to fix LED flash issue when AC/Bat plug in. Change JP1.1 from +5V_ALW2 to +5V_ALW. X02-1
43 1/4/2008 EE Change Num, Cap power rail to +5V_RUN to fix Num, Cap LED flash issue when AC/Bat plug in. Change Q77~Q80, R108, R115 power rail to +5V_RUN. X02-1
38 1/10/2008 EE Connect JUSB1.8 to USB_BACK_PWR.
43 1/11/2008 Avoid system can enter S3 mode but wake up fail problem. EE Change the lid switch IC power source from 3.3V_SUS to 3.3V_ALW.
1/11/2008 32
T
EE 1/8/2008 22 X02-1 Change SMBUS(Q19, Q21), Thermal monitor (U8) power rail from +3.3V_RUN to +3.3V_DELAY.
EE Change L35 to 22 ohm. It will help DMIC_CLK_L performance. Change L35 to from 0 ohm to 22 ohm. X02-1
Issue Description
Chagne from X01-5 to X02-1
Follow REF132-9.Change M82-S GPIO/DDC to +3.3V_DELAY. It will reduce leakage to +3.3V_DELAY.
Fulfill Reliability team request.
Solution Description Rev
X01-5
X01-5
X01-5
X02-1
X02-1
38 1/11/20088EE Remove USB charge function. Remove R765, Q103, U57, U58, R767~R770. X02-1
9
2 2
10
11
12
P1
P2
P3
P4
P5
P6
13
1 1
14
38 1/14/2008 EE Follow AMD AN_SB700AB5. Added re-driver IC to increase signal stress for ESATA. Remove R771, R772 4.99 ohm. Added U63 3211B,R780~R785 0 ohm, C965~C968 0.1u, C969~C972 0.01u. X02-1
28 1/14/2008 EE Modify HDMI detect circuit. Added Q107,R779 10k and change R762 to 10k ohm. X02-1
1/14/2008 42 EE X02-1
Change EC from ITE8512IX to ITE8512JX. The pin12 need connect to 0.1uF, 1uF.
Change R773 to C973 0.1u, pop C948 1u and for EC ITE8512 rev change.
12,14, 1/16/2008 EE Follow DELL recommand to void the PCICLK5 emission issue even AMD solved it in BIOS code Move R301 22 ohm and CLK_PCI_PCCARD signal form PCICLK5 to PCICLK1.
47 1/21/2008 P Change to X6S material due to not support pulse charge Change PC114, PC110, PC106 and PC117 to X6S material X02-1
51 1/21/2008 P
51
1/21/2008 P Reduce output ripple voltage Change PC97 ESR from 40m ohm to 25m ohm.
Derating team suggest for WCETPA Change PR10 from 10K ohm to 11.8K ohm.
52 1/21/2008 P Derating team suggest for WCETPA Change PR212 from 294K ohm to 340K ohm.
54 1/21/2008 P Derating team suggest for WCETPA Change PR228 from 5.9K ohm to 7.5K ohm. X02-1
55 1/24/2008 P To combine MFG P/N Change PQ10, PQ56 P/N from BAM01380016 to BAM01380008 X02-1
28 1/25/2008 P HDMI ID 7-13: DDC Capacitance over spec 50pf. We will add level shift circuit to reduce Capacitance. Add level shift Q108, Q109 FDV301N to reduce the DDC Capacitance.
Chagne from X02-1 to X02-2
9,11,12,18~24
,26~28
1/28/2008 P Remove LCD, CRT hybrid function and depop side port memory. X02-2
Remove Power Express function.
X02-1
X02-1
X02-1
X02-1
X02-1
X02-1
PROJECT : Hepburn DOC. NO. : 204
APPROVED BY : Cory Lin
A
CHECKED BY: Cory Lin
REV:
REV:
REV:
X01
X01
X01
DATE : SHEET OF
DATE : SHEET OF
DRAWN BY :
DRAWN BY :
DRAWN BY :
B
C
DATE : SHEET OF
Sep. 19 , 2007 9 11 Leo Tseng
Sep. 19 , 2007 9 11 Leo Tseng
Sep. 19 , 2007 9 11 Leo Tseng
D
QUANTA
COMPUTER
E
A
Change List
B
C
D
E
Item Page# Date
15
4 4
16
17
18
19
20
15 1/29/2009 EE Follow AMD feedback.IDE and Flash Interface Not Implemented: Decoupling caps not used. Depop C397, C427, C428, C409, C420. X02-2
15 1/29/2010 Change L48 to BLM21PG221SN1D, C464 to 10U.
9, 13 1/29/2010 Reserve R786 4.7k and R787, R788 10k ohm.
1/29/2010 Depop RP34 8.2k ohm. 12 EE X02-2
1/30/2008 Change R416 4.7k to 300 ohm. EE 9
1/30/2008 Depop R335 10k ohm. EE 13
T
EE
EE
21
22
23
24
25
3 3
26
28 1/30/2008 Follow EMI suggest to pop comon mode choke for HDMI. Pop L58, L59, L60, L61, EXC24CG240Uand depop R397, R401, R403~R408 0 ohm.
38
29 OTP change to 85C and THERM_ALERT#_C, SYS_SHDN# leakage will affect OTP thermal limit. Change OTP resistor to 10k, 6.8k ohm. Add D39 to prevent leakage.
27 Follow EMI suggest to pop caps for CRT. EE Pop C613, C622, C637 22pF and C614, C624, C633, C83, C73 10pF. X02-2
1/30/2008
1/31/2008
1/31/2008
9,25 2/1/2008 EE Follow CLK Gen vendor feedback to solve EA fail. Change R146 to 43.2 ohm, R40 to 0 ohm, C50 to 49.9 ohm.
EE
EE
EE
27
28
29
P7
30
31
32
31 2/22/2008 EE Dell recommend change caps for IDT AP test on formal build. Change C916, C917 to 6800pF. X02-2
46 2/22/2008 EE To meet M82 sequence spec. +1.8V_RUN need ramp after +VCC_GFX_CORE. Change PR80, PR92 to 680K ohm. X02-2
2/12/2008 EE Add JP1 pin 10 to +3.3V_ALW, let +3.3V_ALW get lower drop voltage on MMB side. 43 Add JP1 pin 10 to +3.3V_ALW. X02-2
2/13/2008 P 50,52 Change PU3, PU5 and PU9 VCC power rail to reduce S5 power consumption. Change PJP.1 to +3.3V_SUS and add PR251~PR254 0 ohm. X02-2
2/22/2008 EE 38 Pop ESATA re-driver for stress ESATA signals on formal build. X02-2
Issue Description
Follow AMD SB700 checklist item 1-34, 1-35.
Follow AMD RS780M item 8-7, SB700 item 7-1, 7-2 checklist to reserve PD resistor.
Follow AMD SB700 checklist item 12-4 to depop RP33.
Follow AMD SB700 checklist item 24-17. Change PU resistor to 300 ohm.
Follow AMD SB700 checklist item 24-24. Depop PU resistor.
Follow AMD checklist 1-7~1-21,17-2,17-4,17-6. Depop resistors and caps without side port memory.
Follow EMI suggest to pop comon mode choke for USB. Pop L25, L27 DLP11SN900HL2L. Depop R119, R109, R124, R130 0 ohm.
Use ITE8512 pin 22 detect SB_AZ_CODEC_RST# to mute speaker pop noise. EE 2/12/2008 42 Connect SB_AZ_CODEC_RST# and U9 pin 22.
Follow ANT 4.1d. CPU_TEST23_TSTUPD need PD 300 ohm. EE 2/12/2008 5
Solution Description Rev
X02-2
X02-2
X02-2
X02-2
Depop R415, RP21~RP31 47 ohm, relate side port memory caps and connect VDD_MEM to GND 1/30/2008 EE 10, 11
PD R791 300 ohm for CPU_TEST23_TSTUPD.
Depop R782~R785, change C857,C858,C971, C972 to 0.01u and pop U63,C965~C968.
X02-2
X02-2
X02-2
X02-2
X02-2
X02-2
X02-2
Chagne from X02-2 to A00-1
2 2
1
P1
53 Pop PC213, PC217, PC220 0.01u and PC214, PC216, PC219 0.1u. A00-1
2
27,32,38,,39,41 3/17/2008 EE Follow Safety request. Change USB power control IC, RTC location same as Intel location. Swap U7 and U10, U16 and U17. U7 and U16 are 2062AD. Change D34 to D18. Swap R676 and R218. A00-1
3
4
5
6
7
8
1 1
38 3/18/2008 EE TI can't finish some necessary legal submission for new 2062AD. Change to old part 2062DR. Change U7, U16 to 2062DR (AL002062005). A00-1
15,49,50,51
,52,55
38 3/18/2008 EE Follow QSMC request to remove USB co-lay 0 ohm. Remove R109, R119, R124, R130 0 ohm.
38 3/19/2008 EE Change the USB Power Jump to short pad fp.
3/14/2008 EE 42 Change board ID for A00. Pop R522 and depop R523. A00-1
Follow EMI suggest. P 3/14/2008
3/14/2008 EE 31,32 Need meet WLP4.0 : 1. Add 2.2K-ohm resistors to prevent amplifier clipping.
Need meet WLP4.0 : 2. Add 220PF capacitors to allow proper dynamic range measurent.
Add R792~R795 2.2k ohm.
Add C974, C975 220pF and pop C928, C929 to 220pF.
3/18/2008 EE Short +3.3V_ALW_R Jump and Remove Power Jump for A00. Remove PJP1, PJP2, PJP4, PJP6~PJP9, PJP11~PJP18 and short PJP10
A00-1
A00-1
A00-1
A00-1
Change PJP3, PJP5 fp to SHORT-10A.
Follow IT8512JX glitch.doc FA report. Depop 1uF for ITE8512JX pin 12.
3/19/2008 42
EE Depop C948 1uF.
A00-1
A00-1
10
PROJECT : Hepburn DOC. NO. : 204
APPROVED BY : Cory Lin
A
EE 38 3/20/2008 Pericom request. Add 330ohm to reduce output swing, change AC caps to 2.2nF and set EQ to GND.
CHECKED BY: Cory Lin
Add R796 330 ohm. Chagne C677,C678,C857,C858,C969~C972 to 2.2nF and PD U63 pin1, pin10 to GND.
REV:
REV:
REV:
A00
A00
A00
DATE : SHEET OF
DATE : SHEET OF
DRAWN BY :
DRAWN BY :
DRAWN BY :
B
C
DATE : SHEET OF
Mar. 20 , 2008 9 11 Leo Tseng
Mar. 20 , 2008 9 11 Leo Tseng
Mar. 20 , 2008 9 11 Leo Tseng
D
QUANTA
COMPUTER
E
A00-1
A
Change List
B
C
D
E
Item Page# Date Issue Description
T
11
4 4
12
13
14
15
P2
P3
16
17
18
19
3 3
20
P4
28 3/20/2008 EE A00-1
59 Follow EMI team request, add two EMI SPRING near sniffer switch area nad HDMI connector. Add PV1 near SW1. PV2 near CN3. 3/26/2008 EE A00-1
32 Follow IDT request, change 220pF to 270pF will over 80db on DTM. Change C810, C821, C974, C975 from 220pF to 270pF. 3/26/2008 EE A00-1
36 3/27/2008 EE Pop C963 27pF for EMI. A00-1
Follow EMI team request, add a 27p capacitor for 8 in 1 card reader.
48 3/27/2008 EE Follow EMI team request, add two set of 1000pF, 0.01uF, 0.1uF on J8 +DCIN_JACK , -DCIN_JACK. A00-1 Add PC221~PC223 on J8 +DCINI_JACK, PC224~PC226 on J8 -DCIN_JACK.
49, 51 3/27/2008 EE Follow EMI team request, pop PR2, PC5 for NB_VCORE and pop PR234, PC208 for +1.8V_SUS pop PR2, PC5 for NB_VCORE and pop PR234, PC208 for +1.8V_SUS A00-1
5, 42 3/27/2008 EE Add Q110 2N7002W-7-F , R799 0 ohm for use BID1 to control CPU_PROCHOT#. Use BID1 to control CPU_PROCHOT#. When system need change state to P1 by HTC. A00-1
39 3/28/2008 EE Depop R631~R635, R659, R259 0 ohm. Remove debug board resistor. A00-1
4/09/2008 EE 5 Follow ANT 5.0e to depop R791 since the PD is for desktop CPU but Griffin Depop R791 300 ohm. A00-1
4/15/2008 EE 3, 46, 54 Fixed VLDTA&B Vmin not exceeded 1140mV. Change C665,C672,C673 to 10uF, PR115 to 47.5k, PQ28 to FDS6298.
5, 12 4/15/2008 EE Follow AMD feeback. CPU_PWRGD need meet 0.01V/ns. Depop C947, D4, R374, R375, R378, Q56, Q57. A00-1
53 4/15/2008 P To Solve K11 NPT Transient Response Failed Change PC31, PC33 to 470uF/ESR6 and pop PC34 to 470uF/ESR6 A00-1
Solution Description Rev
Add R797 100k ohm , PD R798 200k ohm to J4 pin2 and connect to U39 pin G6 Follow Dell request. Add LED KB BK detect function. A00-1 EE 3/20/2008 14, 43
Change Q102 from MM3904 to FDV301N. Change to FDV301N will pass HDMI 7-12 HDMI detect test.
A00-1
Change PC36, PC38 to 330uF/ESR9 and pop PC43 to 330uF/ESR9. To Solve K11 NPT Transient Response Failed A00-1 4/15/2008 P 53
P5
4/28/2008 53 P
Due to the high temperature will cause the OCP drop closed to TDC 18A. It’s margin for worst conditions,
in order to more safely without trigger OCP easily while changed the resister from 18K to 22K.
Change PR193, PR195 from 16.2K to 22K.Set OCP at 35A to meet AMD Spec. A00-1
Chagne from A00-1 to A00-2
21
44 5/20/2008 EE Tune RBAT2_LED(Amber) Light
Change R114 from 220 ohm to 68 ohm.
2 2
1 1
PROJECT : Hepburn DOC. NO. : 204
APPROVED BY : Cory Lin
A
CHECKED BY: Cory Lin
REV:
REV:
REV:
X01
X01
X01
DATE : SHEET OF
DATE : SHEET OF
DRAWN BY :
DRAWN BY :
DRAWN BY :
B
C
DATE : SHEET OF
Sep. 19 , 2007 9 11 Leo Tseng
Sep. 19 , 2007 9 11 Leo Tseng
Sep. 19 , 2007 9 11 Leo Tseng
D
QUANTA
COMPUTER
E